ar71xx: update to 3.10.1
[openwrt/openwrt.git] / target / linux / ramips / patches-3.8 / 0021-MIPS-ralink-add-RT5350-sdram-register-defines.patch
1 From 0df8c2fdd0fe1095b834fbf2b098d6f1b3e56608 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Mon, 25 Mar 2013 11:19:58 +0100
4 Subject: [PATCH 21/79] MIPS: ralink: add RT5350 sdram register defines
5
6 Add a few missing defines that are needed to make memory detection work on the
7 RT5350.
8
9 Signed-off-by: John Crispin <blogic@openwrt.org>
10 Acked-by: Gabor Juhos <juhosg@openwrt.org>
11 Patchwork: http://patchwork.linux-mips.org/patch/5169/
12 ---
13 arch/mips/include/asm/mach-ralink/rt305x.h | 8 ++++++++
14 1 file changed, 8 insertions(+)
15
16 diff --git a/arch/mips/include/asm/mach-ralink/rt305x.h b/arch/mips/include/asm/mach-ralink/rt305x.h
17 index e36c3c5..80cda8a 100644
18 --- a/arch/mips/include/asm/mach-ralink/rt305x.h
19 +++ b/arch/mips/include/asm/mach-ralink/rt305x.h
20 @@ -97,6 +97,14 @@ static inline int soc_is_rt5350(void)
21 #define RT5350_SYSCFG0_CPUCLK_320 0x2
22 #define RT5350_SYSCFG0_CPUCLK_300 0x3
23
24 +#define RT5350_SYSCFG0_DRAM_SIZE_SHIFT 12
25 +#define RT5350_SYSCFG0_DRAM_SIZE_MASK 7
26 +#define RT5350_SYSCFG0_DRAM_SIZE_2M 0
27 +#define RT5350_SYSCFG0_DRAM_SIZE_8M 1
28 +#define RT5350_SYSCFG0_DRAM_SIZE_16M 2
29 +#define RT5350_SYSCFG0_DRAM_SIZE_32M 3
30 +#define RT5350_SYSCFG0_DRAM_SIZE_64M 4
31 +
32 /* multi function gpio pins */
33 #define RT305X_GPIO_I2C_SD 1
34 #define RT305X_GPIO_I2C_SCLK 2
35 --
36 1.7.10.4
37