target/linux/ramips/patches-3.8/0041-MIPS-ralink-add-memory-definition-for-RT3883.patch

   1 From 42a816a8312734e6b438e799378044365e229a07 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Sat, 13 Apr 2013 20:23:19 +0200
   4 Subject: [PATCH 41/79] MIPS: ralink: add memory definition for RT3883
   5
   6 Populate struct soc_info with the data that describes our RAM window.
   7
   8 Signed-off-by: John Crispin <blogic@openwrt.org>
   9 Patchwork: http://patchwork.linux-mips.org/patch/5182/
  10 ---
  11  arch/mips/include/asm/mach-ralink/rt3883.h |    5 +++++
  12  arch/mips/ralink/rt3883.c                  |    4 ++++
  13  2 files changed, 9 insertions(+)
  14
  15 diff --git a/arch/mips/include/asm/mach-ralink/rt3883.h b/arch/mips/include/asm/mach-ralink/rt3883.h
  16 index b91c6c1..058382f 100644
  17 --- a/arch/mips/include/asm/mach-ralink/rt3883.h
  18 +++ b/arch/mips/include/asm/mach-ralink/rt3883.h
  19 @@ -152,6 +152,7 @@
  20  #define RT3883_GPIO_SPI_MISO           6
  21  #define RT3883_GPIO_7                  7
  22  #define RT3883_GPIO_10                 10
  23 +#define RT3883_GPIO_11                 11
  24  #define RT3883_GPIO_14                 14
  25  #define RT3883_GPIO_UART1_TXD          15
  26  #define RT3883_GPIO_UART1_RXD          16
  27 @@ -244,4 +245,8 @@
  28  #define RT3883_FLASH_CFG_WIDTH_16BIT   0x1
  29  #define RT3883_FLASH_CFG_WIDTH_32BIT   0x2
  30
  31 +#define RT3883_SDRAM_BASE              0x00000000
  32 +#define RT3883_MEM_SIZE_MIN            2
  33 +#define RT3883_MEM_SIZE_MAX            256
  34 +
  35  #endif /* _RT3883_REGS_H_ */
  36 diff --git a/arch/mips/ralink/rt3883.c b/arch/mips/ralink/rt3883.c
  37 index 2d90aa9..afbf2ce 100644
  38 --- a/arch/mips/ralink/rt3883.c
  39 +++ b/arch/mips/ralink/rt3883.c
  40 @@ -239,4 +239,8 @@ void prom_soc_init(struct ralink_soc_info *soc_info)
  41                 name,
  42                 (id >> RT3883_REVID_VER_ID_SHIFT) & RT3883_REVID_VER_ID_MASK,
  43                 (id & RT3883_REVID_ECO_ID_MASK));
  44 +
  45 +       soc_info->mem_base = RT3883_SDRAM_BASE;
  46 +       soc_info->mem_size_min = RT3883_MEM_SIZE_MIN;
  47 +       soc_info->mem_size_max = RT3883_MEM_SIZE_MAX;
  48  }
  49 --
  50 1.7.10.4
  51