ar71xx: update to 3.10.1
[openwrt/openwrt.git] / target / linux / ramips / patches-3.8 / 0056-MIPS-ralink-DTS-file-updates.patch
1 From 4f3d8fafc176d5d95957a4267c253d0c6ea5182d Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Tue, 30 Apr 2013 17:27:46 +0200
4 Subject: [PATCH 56/79] MIPS: ralink DTS file updates
5
6 Signed-off-by: John Crispin <blogic@openwrt.org>
7 ---
8 arch/mips/ralink/Kconfig | 8 +
9 arch/mips/ralink/dts/Makefile | 2 +
10 arch/mips/ralink/dts/mt7620a.dtsi | 238 ++++++++++++++++++++++++-
11 arch/mips/ralink/dts/mt7620a_eval.dts | 111 ++++++++++++
12 arch/mips/ralink/dts/mt7620a_mt7610e_eval.dts | 99 ++++++++++
13 arch/mips/ralink/dts/rt2880.dtsi | 17 ++
14 arch/mips/ralink/dts/rt2880_eval.dts | 6 +
15 arch/mips/ralink/dts/rt3050.dtsi | 31 +++-
16 arch/mips/ralink/dts/rt3052_eval.dts | 19 +-
17 arch/mips/ralink/dts/rt5350.dtsi | 227 +++++++++++++++++++++++
18 arch/mips/ralink/dts/rt5350_eval.dts | 69 +++++++
19 11 files changed, 824 insertions(+), 3 deletions(-)
20 create mode 100644 arch/mips/ralink/dts/mt7620a_mt7610e_eval.dts
21 create mode 100644 arch/mips/ralink/dts/rt5350.dtsi
22 create mode 100644 arch/mips/ralink/dts/rt5350_eval.dts
23
24 diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
25 index 026e823..38540a4 100644
26 --- a/arch/mips/ralink/Kconfig
27 +++ b/arch/mips/ralink/Kconfig
28 @@ -42,6 +42,10 @@ choice
29 bool "RT305x eval kit"
30 depends on SOC_RT305X
31
32 + config DTB_RT5350_EVAL
33 + bool "RT5350 eval kit"
34 + depends on SOC_RT305X
35 +
36 config DTB_RT3883_EVAL
37 bool "RT3883 eval kit"
38 depends on SOC_RT3883
39 @@ -50,6 +54,10 @@ choice
40 bool "MT7620A eval kit"
41 depends on SOC_MT7620
42
43 + config DTB_MT7620A_MT7610E_EVAL
44 + bool "MT7620A + MT7610E eval kit"
45 + depends on SOC_MT7620
46 +
47 endchoice
48
49 endif
50 diff --git a/arch/mips/ralink/dts/Makefile b/arch/mips/ralink/dts/Makefile
51 index 18194fa..0bd12b5 100644
52 --- a/arch/mips/ralink/dts/Makefile
53 +++ b/arch/mips/ralink/dts/Makefile
54 @@ -1,4 +1,6 @@
55 obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
56 obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
57 +obj-$(CONFIG_DTB_RT5350_EVAL) := rt5350_eval.dtb.o
58 obj-$(CONFIG_DTB_RT3883_EVAL) := rt3883_eval.dtb.o
59 obj-$(CONFIG_DTB_MT7620A_EVAL) := mt7620a_eval.dtb.o
60 +obj-$(CONFIG_DTB_MT7620A_MT7610E_EVAL) := mt7620a_mt7610e_eval.dtb.o
61 diff --git a/arch/mips/ralink/dts/mt7620a.dtsi b/arch/mips/ralink/dts/mt7620a.dtsi
62 index 08bf24f..104abfb 100644
63 --- a/arch/mips/ralink/dts/mt7620a.dtsi
64 +++ b/arch/mips/ralink/dts/mt7620a.dtsi
65 @@ -25,14 +25,36 @@
66 #size-cells = <1>;
67
68 sysc@0 {
69 - compatible = "ralink,mt7620a-sysc";
70 + compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc";
71 reg = <0x0 0x100>;
72 };
73
74 + timer@100 {
75 + compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
76 + reg = <0x100 0x20>;
77 +
78 + interrupt-parent = <&intc>;
79 + interrupts = <1>;
80 + };
81 +
82 + watchdog@120 {
83 + compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
84 + reg = <0x120 0x10>;
85 +
86 + resets = <&rstctrl 8>;
87 + reset-names = "wdt";
88 +
89 + interrupt-parent = <&intc>;
90 + interrupts = <1>;
91 + };
92 +
93 intc: intc@200 {
94 compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
95 reg = <0x200 0x100>;
96
97 + resets = <&rstctrl 19>;
98 + reset-names = "intc";
99 +
100 interrupt-controller;
101 #interrupt-cells = <1>;
102
103 @@ -43,16 +65,230 @@
104 memc@300 {
105 compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
106 reg = <0x300 0x100>;
107 +
108 + resets = <&rstctrl 20>;
109 + reset-names = "mc";
110 +
111 + interrupt-parent = <&intc>;
112 + interrupts = <3>;
113 + };
114 +
115 + uart@500 {
116 + compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
117 + reg = <0x500 0x100>;
118 +
119 + resets = <&rstctrl 12>;
120 + reset-names = "uart";
121 +
122 + interrupt-parent = <&intc>;
123 + interrupts = <5>;
124 +
125 + reg-shift = <2>;
126 +
127 + status = "disabled";
128 + };
129 +
130 + gpio0: gpio@600 {
131 + compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
132 + reg = <0x600 0x34>;
133 +
134 + resets = <&rstctrl 13>;
135 + reset-names = "pio";
136 +
137 + interrupt-parent = <&intc>;
138 + interrupts = <6>;
139 +
140 + gpio-controller;
141 + #gpio-cells = <2>;
142 +
143 + ralink,gpio-base = <0>;
144 + ralink,num-gpios = <24>;
145 + ralink,register-map = [ 00 04 08 0c
146 + 20 24 28 2c
147 + 30 34 ];
148 +
149 + status = "disabled";
150 + };
151 +
152 + gpio1: gpio@638 {
153 + compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
154 + reg = <0x638 0x24>;
155 +
156 + interrupt-parent = <&intc>;
157 + interrupts = <6>;
158 +
159 + gpio-controller;
160 + #gpio-cells = <2>;
161 +
162 + ralink,gpio-base = <24>;
163 + ralink,num-gpios = <16>;
164 + ralink,register-map = [ 00 04 08 0c
165 + 10 14 18 1c
166 + 20 24 ];
167 +
168 + status = "disabled";
169 + };
170 +
171 + gpio2: gpio@660 {
172 + compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
173 + reg = <0x660 0x24>;
174 +
175 + interrupt-parent = <&intc>;
176 + interrupts = <6>;
177 +
178 + gpio-controller;
179 + #gpio-cells = <2>;
180 +
181 + ralink,gpio-base = <40>;
182 + ralink,num-gpios = <32>;
183 + ralink,register-map = [ 00 04 08 0c
184 + 10 14 18 1c
185 + 20 24 ];
186 +
187 + status = "disabled";
188 + };
189 +
190 + i2c@900 {
191 + compatible = "link,mt7620a-i2c", "ralink,rt2880-i2c";
192 + reg = <0x900 0x100>;
193 +
194 + resets = <&rstctrl 16>;
195 + reset-names = "i2c";
196 +
197 + #address-cells = <1>;
198 + #size-cells = <0>;
199 +
200 + status = "disabled";
201 + };
202 +
203 + spi@b00 {
204 + compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
205 + reg = <0xb00 0x100>;
206 +
207 + resets = <&rstctrl 18>;
208 + reset-names = "spi";
209 +
210 + #address-cells = <1>;
211 + #size-cells = <1>;
212 +
213 + status = "disabled";
214 };
215
216 uartlite@c00 {
217 compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
218 reg = <0xc00 0x100>;
219
220 + resets = <&rstctrl 19>;
221 + reset-names = "uartl";
222 +
223 interrupt-parent = <&intc>;
224 interrupts = <12>;
225
226 reg-shift = <2>;
227 };
228 +
229 + systick@d00 {
230 + compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
231 + reg = <0xd00 0x10>;
232 +
233 + resets = <&rstctrl 28>;
234 + reset-names = "intc";
235 +
236 + interrupt-parent = <&cpuintc>;
237 + interrupts = <7>;
238 + };
239 +
240 + gdma@2800 {
241 + compatible = "ralink,mt7620a-gdma", "ralink,rt2880-gdma";
242 + reg = <0x2800 0x800>;
243 +
244 + resets = <&rstctrl 14>;
245 + reset-names = "dma";
246 +
247 + interrupt-parent = <&intc>;
248 + interrupts = <7>;
249 + };
250 + };
251 +
252 + rstctrl: rstctrl {
253 + compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
254 + #reset-cells = <1>;
255 + };
256 +
257 + ubsphy {
258 + compatible = "ralink,mt7620a-usbphy";
259 +
260 + resets = <&rstctrl 22 &rstctrl 25>;
261 + reset-names = "host", "device";
262 + };
263 +
264 + ethernet@10100000 {
265 + compatible = "ralink,mt7620a-eth";
266 + reg = <0x10100000 10000>;
267 +
268 + #address-cells = <1>;
269 + #size-cells = <0>;
270 +
271 + interrupt-parent = <&cpuintc>;
272 + interrupts = <5>;
273 +
274 + status = "disabled";
275 +
276 + mdio-bus {
277 + #address-cells = <1>;
278 + #size-cells = <0>;
279 +
280 + status = "disabled";
281 + };
282 + };
283 +
284 + gsw@10110000 {
285 + compatible = "ralink,mt7620a-gsw";
286 + reg = <0x10110000 8000>;
287 +
288 + interrupt-parent = <&intc>;
289 + interrupts = <17>;
290 +
291 + status = "disabled";
292 + };
293 +
294 + sdhci@10130000 {
295 + compatible = "ralink,mt7620a-sdhci";
296 + reg = <0x10130000 4000>;
297 +
298 + interrupt-parent = <&intc>;
299 + interrupts = <14>;
300 +
301 + status = "disabled";
302 + };
303 +
304 + ehci@101c0000 {
305 + compatible = "ralink,rt3xxx-ehci";
306 + reg = <0x101c0000 0x1000>;
307 +
308 + interrupt-parent = <&intc>;
309 + interrupts = <18>;
310 + };
311 +
312 + ohci@101c1000 {
313 + compatible = "ralink,rt3xxx-ohci";
314 + reg = <0x101c1000 0x1000>;
315 +
316 + interrupt-parent = <&intc>;
317 + interrupts = <18>;
318 + };
319 +
320 + pcie@10140000 {
321 + compatible = "ralink,mt7620a-pci";
322 + reg = <0x10140000 0x100
323 + 0x10142000 0x100>;
324 +
325 + resets = <&rstctrl 26>;
326 + reset-names = "pcie0";
327 +
328 + interrupt-parent = <&cpuintc>;
329 + interrupts = <4>;
330 +
331 + status = "disabled";
332 };
333 };
334 diff --git a/arch/mips/ralink/dts/mt7620a_eval.dts b/arch/mips/ralink/dts/mt7620a_eval.dts
335 index 35eb874..b56f449 100644
336 --- a/arch/mips/ralink/dts/mt7620a_eval.dts
337 +++ b/arch/mips/ralink/dts/mt7620a_eval.dts
338 @@ -13,4 +13,115 @@
339 chosen {
340 bootargs = "console=ttyS0,57600";
341 };
342 +
343 + palmbus@10000000 {
344 + sysc@0 {
345 + ralink,pinmux = "spi", "uartlite", "mdio", "wled", "ephy", "rgmii1", "rgmii2";
346 + ralink,gpiomux = "i2c", "jtag";
347 + ralink,uartmux = "gpio";
348 + ralink,wdtmux = <1>;
349 + };
350 +
351 + gpio0: gpio@600 {
352 + status = "okay";
353 + };
354 +
355 + spi@b00 {
356 + status = "okay";
357 +
358 + m25p80@0 {
359 + #address-cells = <1>;
360 + #size-cells = <1>;
361 + compatible = "en25q64";
362 + reg = <0 0>;
363 + linux,modalias = "m25p80", "en25q64";
364 + spi-max-frequency = <10000000>;
365 +
366 + partition@0 {
367 + label = "u-boot";
368 + reg = <0x0 0x30000>;
369 + read-only;
370 + };
371 +
372 + partition@30000 {
373 + label = "u-boot-env";
374 + reg = <0x30000 0x10000>;
375 + read-only;
376 + };
377 +
378 + factory: partition@40000 {
379 + label = "factory";
380 + reg = <0x40000 0x10000>;
381 + read-only;
382 + };
383 +
384 + partition@50000 {
385 + label = "firmware";
386 + reg = <0x50000 0x7b0000>;
387 + };
388 + };
389 + };
390 + };
391 +
392 + ethernet@10100000 {
393 + status = "okay";
394 +
395 + port@4 {
396 + compatible = "lantiq,mt7620a-gsw-port", "ralink,eth-port";
397 + reg = <4>;
398 + phy-mode = "rgmii";
399 + phy-handle = <&phy4>;
400 + };
401 +
402 + port@5 {
403 + compatible = "lantiq,mt7620a-gsw-port", "ralink,eth-port";
404 + reg = <5>;
405 + phy-mode = "rgmii";
406 + phy-handle = <&phy5>;
407 + };
408 +
409 + mdio-bus {
410 + status = "okay";
411 +
412 + phy4: ethernet-phy@4 {
413 + reg = <4>;
414 + phy-mode = "rgmii";
415 + };
416 +
417 + phy5: ethernet-phy@5 {
418 + reg = <5>;
419 + phy-mode = "rgmii";
420 + };
421 + };
422 + };
423 +
424 + gsw@10110000 {
425 + status = "okay";
426 + ralink,port4 = "gmac";
427 + };
428 +
429 + sdhci@10130000 {
430 + status = "okay";
431 + };
432 +
433 + pcie@10140000 {
434 + status = "okay";
435 + };
436 +
437 + gpio-keys-polled {
438 + compatible = "gpio-keys";
439 + #address-cells = <1>;
440 + #size-cells = <0>;
441 + poll-interval = <20>;
442 + s2 {
443 + label = "S2";
444 + gpios = <&gpio0 1 1>;
445 + linux,code = <0x100>;
446 + };
447 + s3 {
448 + label = "S3";
449 + gpios = <&gpio0 2 1>;
450 + linux,code = <0x101>;
451 + };
452 + };
453 };
454 diff --git a/arch/mips/ralink/dts/mt7620a_mt7610e_eval.dts b/arch/mips/ralink/dts/mt7620a_mt7610e_eval.dts
455 new file mode 100644
456 index 0000000..0d7755b
457 --- /dev/null
458 +++ b/arch/mips/ralink/dts/mt7620a_mt7610e_eval.dts
459 @@ -0,0 +1,99 @@
460 +/dts-v1/;
461 +
462 +/include/ "mt7620a.dtsi"
463 +
464 +/ {
465 + compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
466 + model = "Ralink MT7620A evaluation board";
467 +
468 + memory@0 {
469 + reg = <0x0 0x2000000>;
470 + };
471 +
472 + chosen {
473 + bootargs = "console=ttyS0,57600";
474 + };
475 +
476 + palmbus@10000000 {
477 + sysc@0 {
478 + ralink,pinmux = "spi", "uartlite", "mdio", "wled", "ephy", "rgmii1", "rgmii2";
479 + ralink,gpiomux = "i2c", "jtag";
480 + ralink,uartmux = "gpio";
481 + ralink,wdtmux = <1>;
482 + };
483 +
484 + gpio0: gpio@600 {
485 + status = "okay";
486 + };
487 +
488 + spi@b00 {
489 + status = "okay";
490 +
491 + m25p80@0 {
492 + #address-cells = <1>;
493 + #size-cells = <1>;
494 + compatible = "en25q64";
495 + reg = <0 0>;
496 + linux,modalias = "m25p80", "en25q64";
497 + spi-max-frequency = <10000000>;
498 +
499 + partition@0 {
500 + label = "u-boot";
501 + reg = <0x0 0x30000>;
502 + read-only;
503 + };
504 +
505 + partition@30000 {
506 + label = "u-boot-env";
507 + reg = <0x30000 0x10000>;
508 + read-only;
509 + };
510 +
511 + factory: partition@40000 {
512 + label = "factory";
513 + reg = <0x40000 0x10000>;
514 + read-only;
515 + };
516 +
517 + partition@50000 {
518 + label = "firmware";
519 + reg = <0x50000 0x7b0000>;
520 + };
521 + };
522 + };
523 + };
524 +
525 + ethernet@10100000 {
526 + status = "okay";
527 + };
528 +
529 + gsw@10110000 {
530 + status = "okay";
531 + ralink,port4 = "ephy";
532 + };
533 +
534 + sdhci@10130000 {
535 + status = "okay";
536 + };
537 +
538 + pcie@10140000 {
539 + status = "okay";
540 + };
541 +
542 + gpio-keys-polled {
543 + compatible = "gpio-keys";
544 + #address-cells = <1>;
545 + #size-cells = <0>;
546 + poll-interval = <20>;
547 + wps {
548 + label = "wps";
549 + gpios = <&gpio0 12 1>;
550 + linux,code = <0x100>;
551 + };
552 + reset {
553 + label = "reset";
554 + gpios = <&gpio0 13 1>;
555 + linux,code = <0x101>;
556 + };
557 + };
558 +};
559 diff --git a/arch/mips/ralink/dts/rt2880.dtsi b/arch/mips/ralink/dts/rt2880.dtsi
560 index 182afde..2a34b8d 100644
561 --- a/arch/mips/ralink/dts/rt2880.dtsi
562 +++ b/arch/mips/ralink/dts/rt2880.dtsi
563 @@ -55,4 +55,21 @@
564 reg-shift = <2>;
565 };
566 };
567 +
568 + ethernet@400000 {
569 + compatible = "ralink,rt2880-eth";
570 + reg = <0x00400000 10000>;
571 +
572 + interrupt-parent = <&cpuintc>;
573 + interrupts = <5>;
574 +
575 + status = "disabled";
576 +
577 + mdio-bus {
578 + #address-cells = <1>;
579 + #size-cells = <0>;
580 +
581 + status = "disabled";
582 + };
583 + };
584 };
585 diff --git a/arch/mips/ralink/dts/rt2880_eval.dts b/arch/mips/ralink/dts/rt2880_eval.dts
586 index 322d700..58a1edf 100644
587 --- a/arch/mips/ralink/dts/rt2880_eval.dts
588 +++ b/arch/mips/ralink/dts/rt2880_eval.dts
589 @@ -43,4 +43,10 @@
590 reg = <0x50000 0x3b0000>;
591 };
592 };
593 +
594 + ethernet@400000 {
595 + status = "okay";
596 +
597 + ralink,fixed-link = <1000 1 1 1>;
598 + };
599 };
600 diff --git a/arch/mips/ralink/dts/rt3050.dtsi b/arch/mips/ralink/dts/rt3050.dtsi
601 index ef7da1e..b1ac940 100644
602 --- a/arch/mips/ralink/dts/rt3050.dtsi
603 +++ b/arch/mips/ralink/dts/rt3050.dtsi
604 @@ -1,7 +1,7 @@
605 / {
606 #address-cells = <1>;
607 #size-cells = <1>;
608 - compatible = "ralink,rt3050-soc", "ralink,rt3052-soc", "ralink,rt3350-soc";
609 + compatible = "ralink,rt3050-soc", "ralink,rt3052-soc";
610
611 cpus {
612 cpu@0 {
613 @@ -45,6 +45,15 @@
614 reg = <0x300 0x100>;
615 };
616
617 + i2c@900 {
618 + compatible = "link,rt3052-i2c", "ralink,rt2880-i2c";
619 + reg = <0x900 0x100>;
620 + #address-cells = <1>;
621 + #size-cells = <0>;
622 +
623 + status = "disabled";
624 + };
625 +
626 uartlite@c00 {
627 compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a";
628 reg = <0xc00 0x100>;
629 @@ -55,4 +64,24 @@
630 reg-shift = <2>;
631 };
632 };
633 +
634 + ethernet@10100000 {
635 + compatible = "ralink,rt3050-eth";
636 + reg = <0x10100000 10000>;
637 +
638 + interrupt-parent = <&cpuintc>;
639 + interrupts = <5>;
640 +
641 + status = "disabled";
642 + };
643 +
644 + esw@10110000 {
645 + compatible = "ralink,rt3050-esw";
646 + reg = <0x10110000 8000>;
647 +
648 + interrupt-parent = <&intc>;
649 + interrupts = <17>;
650 +
651 + status = "disabled";
652 + };
653 };
654 diff --git a/arch/mips/ralink/dts/rt3052_eval.dts b/arch/mips/ralink/dts/rt3052_eval.dts
655 index df17f5f..df02957 100644
656 --- a/arch/mips/ralink/dts/rt3052_eval.dts
657 +++ b/arch/mips/ralink/dts/rt3052_eval.dts
658 @@ -3,7 +3,7 @@
659 /include/ "rt3050.dtsi"
660
661 / {
662 - compatible = "ralink,rt3052-eval-board", "ralink,rt3052-soc";
663 + compatible = "ralink,rt3052-eval-board", "ralink,rt3052-soc", "ralink,rt5350-soc";
664 model = "Ralink RT3052 evaluation board";
665
666 memory@0 {
667 @@ -14,6 +14,14 @@
668 bootargs = "console=ttyS0,57600";
669 };
670
671 + palmbus@10000000 {
672 + sysc@0 {
673 + ralink,pinmux = "i2c", "spi", "uartlite", "jtag", "mdio", "sdram", "rgmii";
674 + ralink,uartmux = "gpio";
675 + ralink,wdtmux = <1>;
676 + };
677 + };
678 +
679 cfi@1f000000 {
680 compatible = "cfi-flash";
681 reg = <0x1f000000 0x800000>;
682 @@ -43,4 +51,13 @@
683 reg = <0x50000 0x7b0000>;
684 };
685 };
686 +
687 + ethernet@10100000 {
688 + status = "okay";
689 + };
690 +
691 + esw@10110000 {
692 + status = "okay";
693 + ralink,portmap = <0x2f>;
694 + };
695 };
696 diff --git a/arch/mips/ralink/dts/rt5350.dtsi b/arch/mips/ralink/dts/rt5350.dtsi
697 new file mode 100644
698 index 0000000..3d6b3bc
699 --- /dev/null
700 +++ b/arch/mips/ralink/dts/rt5350.dtsi
701 @@ -0,0 +1,227 @@
702 +/ {
703 + #address-cells = <1>;
704 + #size-cells = <1>;
705 + compatible = "ralink,rt5350-soc";
706 +
707 + cpus {
708 + cpu@0 {
709 + compatible = "mips,mips24KEc";
710 + };
711 + };
712 +
713 + cpuintc: cpuintc@0 {
714 + #address-cells = <0>;
715 + #interrupt-cells = <1>;
716 + interrupt-controller;
717 + compatible = "mti,cpu-interrupt-controller";
718 + };
719 +
720 + palmbus@10000000 {
721 + compatible = "palmbus";
722 + reg = <0x10000000 0x200000>;
723 + ranges = <0x0 0x10000000 0x1FFFFF>;
724 +
725 + #address-cells = <1>;
726 + #size-cells = <1>;
727 +
728 + sysc@0 {
729 + compatible = "ralink,rt5350-sysc", "ralink,rt3050-sysc";
730 + reg = <0x0 0x100>;
731 + };
732 +
733 + timer@100 {
734 + compatible = "ralink,rt5350-timer", "ralink,rt2880-timer";
735 + reg = <0x100 0x20>;
736 +
737 + interrupt-parent = <&intc>;
738 + interrupts = <1>;
739 + };
740 +
741 + watchdog@120 {
742 + compatible = "ralink,rt5350-wdt", "ralink,rt2880-wdt";
743 + reg = <0x120 0x10>;
744 +
745 + resets = <&rstctrl 8>;
746 + reset-names = "wdt";
747 +
748 + interrupt-parent = <&intc>;
749 + interrupts = <1>;
750 + };
751 +
752 + intc: intc@200 {
753 + compatible = "ralink,rt5350-intc", "ralink,rt2880-intc";
754 + reg = <0x200 0x100>;
755 +
756 + resets = <&rstctrl 19>;
757 + reset-names = "intc";
758 +
759 + interrupt-controller;
760 + #interrupt-cells = <1>;
761 +
762 + interrupt-parent = <&cpuintc>;
763 + interrupts = <2>;
764 + };
765 +
766 + memc@300 {
767 + compatible = "ralink,rt5350-memc", "ralink,rt3050-memc";
768 + reg = <0x300 0x100>;
769 +
770 + resets = <&rstctrl 20>;
771 + reset-names = "mc";
772 +
773 + interrupt-parent = <&intc>;
774 + interrupts = <3>;
775 + };
776 +
777 + uart@500 {
778 + compatible = "ralink,rt5350-uart", "ralink,rt2880-uart", "ns16550a";
779 + reg = <0x500 0x100>;
780 +
781 + resets = <&rstctrl 12>;
782 + reset-names = "uart";
783 +
784 + interrupt-parent = <&intc>;
785 + interrupts = <5>;
786 +
787 + reg-shift = <2>;
788 +
789 + status = "disabled";
790 + };
791 +
792 + gpio0: gpio@600 {
793 + compatible = "ralink,rt5350-gpio", "ralink,rt2880-gpio";
794 + reg = <0x600 0x34>;
795 +
796 + resets = <&rstctrl 13>;
797 + reset-names = "pio";
798 +
799 + interrupt-parent = <&intc>;
800 + interrupts = <6>;
801 +
802 + gpio-controller;
803 + #gpio-cells = <2>;
804 +
805 + ralink,gpio-base = <0>;
806 + ralink,num-gpios = <24>;
807 + ralink,register-map = [ 00 04 08 0c
808 + 20 24 28 2c
809 + 30 34 ];
810 +
811 + status = "disabled";
812 + };
813 +
814 + gpio1: gpio@638 {
815 + compatible = "ralink,rt5350-gpio", "ralink,rt2880-gpio";
816 + reg = <0x638 0x24>;
817 +
818 + interrupt-parent = <&intc>;
819 + interrupts = <6>;
820 +
821 + gpio-controller;
822 + #gpio-cells = <2>;
823 +
824 + ralink,gpio-base = <24>;
825 + ralink,num-gpios = <16>;
826 + ralink,register-map = [ 00 04 08 0c
827 + 10 14 18 1c
828 + 20 24 ];
829 +
830 + status = "disabled";
831 + };
832 +
833 + i2c@900 {
834 + compatible = "link,rt5350-i2c", "ralink,rt2880-i2c";
835 + reg = <0x900 0x100>;
836 +
837 + resets = <&rstctrl 16>;
838 + reset-names = "i2c";
839 +
840 + #address-cells = <1>;
841 + #size-cells = <0>;
842 +
843 + status = "disabled";
844 + };
845 +
846 + spi@b00 {
847 + compatible = "ralink,rt5350-spi", "ralink,rt2880-spi";
848 + reg = <0xb00 0x100>;
849 +
850 + resets = <&rstctrl 18>;
851 + reset-names = "spi";
852 +
853 + #address-cells = <1>;
854 + #size-cells = <1>;
855 +
856 + status = "disabled";
857 + };
858 +
859 + uartlite@c00 {
860 + compatible = "ralink,rt5350-uart", "ralink,rt2880-uart", "ns16550a";
861 + reg = <0xc00 0x100>;
862 +
863 + resets = <&rstctrl 19>;
864 + reset-names = "uartl";
865 +
866 + interrupt-parent = <&intc>;
867 + interrupts = <12>;
868 +
869 + reg-shift = <2>;
870 + };
871 +
872 + systick@d00 {
873 + compatible = "ralink,rt5350-systick", "ralink,cevt-systick";
874 + reg = <0xd00 0x10>;
875 +
876 + interrupt-parent = <&cpuintc>;
877 + interrupts = <7>;
878 + };
879 + };
880 +
881 + rstctrl: rstctrl {
882 + compatible = "ralink,rt5350-reset", "ralink,rt2880-reset";
883 + #reset-cells = <1>;
884 + };
885 +
886 + ubsphy {
887 + compatible = "ralink,rt3xxx-usbphy";
888 +
889 + resets = <&rstctrl 22 &rstctrl 25>;
890 + reset-names = "host", "device";
891 + };
892 +
893 + ethernet@10100000 {
894 + compatible = "ralink,rt5350-eth";
895 + reg = <0x10100000 10000>;
896 +
897 + interrupt-parent = <&cpuintc>;
898 + interrupts = <5>;
899 +
900 + status = "disabled";
901 + };
902 +
903 + esw@10110000 {
904 + compatible = "ralink,rt3050-esw";
905 + reg = <0x10110000 8000>;
906 +
907 + interrupt-parent = <&intc>;
908 + interrupts = <17>;
909 +
910 + status = "disabled";
911 + };
912 +
913 + ehci@101c0000 {
914 + compatible = "ralink,rt3xxx-ehci";
915 + reg = <0x101c0000 0x1000>;
916 +
917 + interrupt-parent = <&intc>;
918 + interrupts = <18>;
919 + };
920 +
921 + ohci@101c1000 {
922 + compatible = "ralink,rt3xxx-ohci";
923 + reg = <0x101c1000 0x1000>;
924 +
925 + interrupt-parent = <&intc>;
926 + interrupts = <18>;
927 + };
928 +};
929 diff --git a/arch/mips/ralink/dts/rt5350_eval.dts b/arch/mips/ralink/dts/rt5350_eval.dts
930 new file mode 100644
931 index 0000000..ab92043
932 --- /dev/null
933 +++ b/arch/mips/ralink/dts/rt5350_eval.dts
934 @@ -0,0 +1,69 @@
935 +/dts-v1/;
936 +
937 +/include/ "rt5350.dtsi"
938 +
939 +/ {
940 + compatible = "ralink,rt5350-eval-board", "ralink,rt5350-soc";
941 + model = "Ralink RT5350 evaluation board";
942 +
943 + chosen {
944 + bootargs = "console=ttyS0,57600";
945 + };
946 +
947 + palmbus@10000000 {
948 + sysc@0 {
949 + ralink,pinmux = "i2c", "spi", "uartlite", "jtag", "mdio", "sdram", "rgmii";
950 + ralink,uartmux = "gpio";
951 + ralink,wdtmux = <1>;
952 + };
953 +
954 + gpio0: gpio@600 {
955 + status = "okay";
956 + };
957 +
958 + spi@b00 {
959 + status = "okay";
960 +
961 + m25p80@0 {
962 + #address-cells = <1>;
963 + #size-cells = <1>;
964 + compatible = "en25q64";
965 + reg = <0 0>;
966 + linux,modalias = "m25p80", "mx25l3205d";
967 + spi-max-frequency = <10000000>;
968 +
969 + partition@0 {
970 + label = "u-boot";
971 + reg = <0x0 0x30000>;
972 + read-only;
973 + };
974 +
975 + partition@30000 {
976 + label = "u-boot-env";
977 + reg = <0x30000 0x10000>;
978 + read-only;
979 + };
980 +
981 + factory: partition@40000 {
982 + label = "factory";
983 + reg = <0x40000 0x10000>;
984 + read-only;
985 + };
986 +
987 + partition@50000 {
988 + label = "firmware";
989 + reg = <0x50000 0x3b0000>;
990 + };
991 + };
992 + };
993 + };
994 +
995 + ethernet@10100000 {
996 + status = "okay";
997 + };
998 +
999 + esw@10110000 {
1000 + status = "okay";
1001 + ralink,portmap = <0x2f>;
1002 + };
1003 +};
1004 --
1005 1.7.10.4
1006