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ar71xx: update to 3.10.1
[openwrt/openwrt.git] / target / linux / ramips / patches-3.8 / 0079-clocksource-MIPS-ralink-add-support-for-systick-time.patch
1 From 4f3ae2a7ee1b1c9b9cab287c828f2ed7b1858495 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Thu, 20 Jun 2013 19:21:52 +0200
4 Subject: [PATCH 79/79] clocksource: MIPS: ralink: add support for systick
5 timer found on newer ralink SoC
6
7 Signed-off-by: John Crispin <blogic@openwrt.org
8 ---
9 arch/mips/pci/Makefile.rej | 10 +++
10 arch/mips/ralink/Kconfig | 2 +
11 arch/mips/ralink/Kconfig.rej | 10 +++
12 arch/mips/ralink/clk.c | 1 +
13 drivers/clocksource/Kconfig | 6 ++
14 drivers/clocksource/Makefile | 1 +
15 drivers/clocksource/cevt-rt3352.c | 162 +++++++++++++++++++++++++++++++++++++
16 7 files changed, 192 insertions(+)
17 create mode 100644 arch/mips/pci/Makefile.rej
18 create mode 100644 arch/mips/ralink/Kconfig.rej
19 create mode 100644 drivers/clocksource/cevt-rt3352.c
20
21 diff --git a/arch/mips/pci/Makefile.rej b/arch/mips/pci/Makefile.rej
22 new file mode 100644
23 index 0000000..c5761e8
24 --- /dev/null
25 +++ b/arch/mips/pci/Makefile.rej
26 @@ -0,0 +1,10 @@
27 +--- arch/mips/pci/Makefile
28 ++++ arch/mips/pci/Makefile
29 +@@ -43,6 +43,7 @@
30 + obj-$(CONFIG_PCI_LANTIQ) += pci-lantiq.o ops-lantiq.o
31 + obj-$(CONFIG_SOC_RT2880) += pci-rt2880.o
32 + obj-$(CONFIG_SOC_RT3883) += pci-rt3883.o
33 ++obj-$(CONFIG_SOC_MT7620) += pci-mt7620a.o
34 + obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o
35 + obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o
36 + obj-$(CONFIG_TANBAC_TB0287) += fixup-tb0287.o
37 diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
38 index f89fdf8..c8d5b6c 100644
39 --- a/arch/mips/ralink/Kconfig
40 +++ b/arch/mips/ralink/Kconfig
41 @@ -15,6 +15,7 @@ choice
42 select USB_ARCH_HAS_HCD
43 select USB_ARCH_HAS_OHCI
44 select USB_ARCH_HAS_EHCI
45 + select CLKEVT_RT3352
46
47 config SOC_RT3883
48 bool "RT3883"
49 @@ -24,6 +25,7 @@ choice
50
51 config SOC_MT7620
52 bool "MT7620"
53 + select CLKEVT_RT3352
54 select HW_HAS_PCI
55
56 endchoice
57 diff --git a/arch/mips/ralink/Kconfig.rej b/arch/mips/ralink/Kconfig.rej
58 new file mode 100644
59 index 0000000..d3a804f
60 --- /dev/null
61 +++ b/arch/mips/ralink/Kconfig.rej
62 @@ -0,0 +1,10 @@
63 +--- arch/mips/ralink/Kconfig
64 ++++ arch/mips/ralink/Kconfig
65 +@@ -23,6 +24,7 @@
66 +
67 + config SOC_MT7620
68 + bool "MT7620"
69 ++ select CLKEVT_RT3352
70 +
71 + endchoice
72 +
73 diff --git a/arch/mips/ralink/clk.c b/arch/mips/ralink/clk.c
74 index 8dfa22f..bba0cdf 100644
75 --- a/arch/mips/ralink/clk.c
76 +++ b/arch/mips/ralink/clk.c
77 @@ -69,4 +69,5 @@ void __init plat_time_init(void)
78 pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000);
79 mips_hpt_frequency = clk_get_rate(clk) / 2;
80 clk_put(clk);
81 + clocksource_of_init();
82 }
83 diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
84 index a32b7a9..90bed1a 100644
85 --- a/drivers/clocksource/Kconfig
86 +++ b/drivers/clocksource/Kconfig
87 @@ -7,6 +7,12 @@ config CLKSRC_I8253
88 config CLKEVT_I8253
89 bool
90
91 +config CLKEVT_RT3352
92 + bool
93 + depends on MIPS && RALINK
94 + select CLKSRC_OF
95 + select CLKSRC_MMIO
96 +
97 config I8253_LOCK
98 bool
99
100 diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
101 index a33f792..5031f82 100644
102 --- a/drivers/clocksource/Makefile
103 +++ b/drivers/clocksource/Makefile
104 @@ -10,6 +10,7 @@ obj-$(CONFIG_SH_TIMER_TMU) += sh_tmu.o
105 obj-$(CONFIG_EM_TIMER_STI) += em_sti.o
106 obj-$(CONFIG_CLKBLD_I8253) += i8253.o
107 obj-$(CONFIG_CLKSRC_MMIO) += mmio.o
108 +obj-$(CONFIG_CLKEVT_RT3352) += cevt-rt3352.o
109 obj-$(CONFIG_DW_APB_TIMER) += dw_apb_timer.o
110 obj-$(CONFIG_DW_APB_TIMER_OF) += dw_apb_timer_of.o
111 obj-$(CONFIG_CLKSRC_NOMADIK_MTU) += nomadik-mtu.o
112 diff --git a/drivers/clocksource/cevt-rt3352.c b/drivers/clocksource/cevt-rt3352.c
113 new file mode 100644
114 index 0000000..bd50edd
115 --- /dev/null
116 +++ b/drivers/clocksource/cevt-rt3352.c
117 @@ -0,0 +1,162 @@
118 +/*
119 + * This file is subject to the terms and conditions of the GNU General Public
120 + * License. See the file "COPYING" in the main directory of this archive
121 + * for more details.
122 + *
123 + * Copyright (C) 2013 by John Crispin <blogic@openwrt.org>
124 + */
125 +
126 +#include <linux/clockchips.h>
127 +#include <linux/clocksource.h>
128 +#include <linux/interrupt.h>
129 +#include <linux/reset.h>
130 +#include <linux/init.h>
131 +#include <linux/of.h>
132 +#include <linux/of_irq.h>
133 +#include <linux/of_address.h>
134 +
135 +#include <asm/mach-ralink/ralink_regs.h>
136 +#include <asm/time.h>
137 +
138 +#define SYSTICK_FREQ (50 * 1000)
139 +
140 +#define SYSTICK_CONFIG 0x00
141 +#define SYSTICK_COMPARE 0x04
142 +#define SYSTICK_COUNT 0x08
143 +
144 +/* route systick irq to mips irq 7 instead of the r4k-timer */
145 +#define CFG_EXT_STK_EN 0x2
146 +/* enable the counter */
147 +#define CFG_CNT_EN 0x1
148 +
149 +struct systick_device {
150 + void __iomem *membase;
151 + struct clock_event_device dev;
152 + int irq_requested;
153 + int freq_scale;
154 +};
155 +
156 +static void systick_set_clock_mode(enum clock_event_mode mode,
157 + struct clock_event_device *evt);
158 +
159 +static int systick_next_event(unsigned long delta,
160 + struct clock_event_device *evt)
161 +{
162 + struct systick_device *sdev = container_of(evt, struct systick_device, dev);
163 + u32 count;
164 +
165 + count = ioread32(sdev->membase + SYSTICK_COUNT);
166 + count = (count + delta) % SYSTICK_FREQ;
167 + iowrite32(count + delta, sdev->membase + SYSTICK_COMPARE);
168 +
169 + return 0;
170 +}
171 +
172 +static void systick_event_handler(struct clock_event_device *dev)
173 +{
174 + /* noting to do here */
175 +}
176 +
177 +static irqreturn_t systick_interrupt(int irq, void *dev_id)
178 +{
179 + struct clock_event_device *dev = (struct clock_event_device *) dev_id;
180 +
181 + dev->event_handler(dev);
182 +
183 + return IRQ_HANDLED;
184 +}
185 +
186 +static struct systick_device systick = {
187 + .dev = {
188 + /* cevt-r4k uses 300, make sure systick gets used if available */
189 + .rating = 310,
190 + .features = CLOCK_EVT_FEAT_ONESHOT,
191 + .set_next_event = systick_next_event,
192 + .set_mode = systick_set_clock_mode,
193 + .event_handler = systick_event_handler,
194 + },
195 +};
196 +
197 +static struct irqaction systick_irqaction = {
198 + .handler = systick_interrupt,
199 + .flags = IRQF_PERCPU | IRQF_TIMER,
200 + .dev_id = &systick.dev,
201 +};
202 +
203 +/* ugly hack */
204 +#ifdef CONFIG_SOC_MT7620
205 +
206 +#define CLK_LUT_CFG 0x40
207 +#define SLEEP_EN BIT(31)
208 +
209 +static inline void mt7620_freq_scaling(struct systick_device *sdev, int status)
210 +{
211 + if (sdev->freq_scale == status)
212 + return;
213 +
214 + sdev->freq_scale = status;
215 +
216 + pr_info("%s: %s autosleep mode\n", systick.dev.name, (status) ? ("enable") : ("disable"));
217 + if (status)
218 + rt_sysc_w32(rt_sysc_r32(CLK_LUT_CFG) | SLEEP_EN, CLK_LUT_CFG);
219 + else
220 + rt_sysc_w32(rt_sysc_r32(CLK_LUT_CFG) & ~SLEEP_EN, CLK_LUT_CFG);
221 +}
222 +#else
223 +static inline void mt7620_freq_scaling(struct systick_device *sdev, int status) {}
224 +#endif
225 +
226 +static void systick_set_clock_mode(enum clock_event_mode mode,
227 + struct clock_event_device *evt)
228 +{
229 + struct systick_device *sdev = container_of(evt, struct systick_device, dev);
230 +
231 + switch (mode) {
232 + case CLOCK_EVT_MODE_ONESHOT:
233 + if (!sdev->irq_requested)
234 + setup_irq(systick.dev.irq, &systick_irqaction);
235 + mt7620_freq_scaling(sdev, 1);
236 + sdev->irq_requested = 1;
237 + iowrite32(CFG_EXT_STK_EN | CFG_CNT_EN, systick.membase + SYSTICK_CONFIG);
238 + break;
239 +
240 + case CLOCK_EVT_MODE_SHUTDOWN:
241 + if (sdev->irq_requested)
242 + free_irq(systick.dev.irq, &systick_irqaction);
243 + mt7620_freq_scaling(sdev, 0);
244 + sdev->irq_requested = 0;
245 + iowrite32(0, systick.membase + SYSTICK_CONFIG);
246 + break;
247 +
248 + default:
249 + pr_err("%s: Unhandeled mips clock_mode\n", systick.dev.name);
250 + break;
251 + }
252 +}
253 +
254 +static void __init ralink_systick_init(struct device_node *np)
255 +{
256 + systick.membase = of_iomap(np, 0);
257 + if (!systick.membase) {
258 + pr_err("%s: of_iomap failed", np->name);
259 + return;
260 + }
261 +
262 + clocksource_mmio_init(systick.membase + SYSTICK_COUNT, np->name,
263 + SYSTICK_FREQ, 301, 16, clocksource_mmio_readl_up);
264 +
265 + systick_irqaction.name = np->name;
266 + systick.dev.name = np->name;
267 + clockevent_set_clock(&systick.dev, SYSTICK_FREQ);
268 + systick.dev.max_delta_ns = clockevent_delta2ns(0x7fff, &systick.dev);
269 + systick.dev.min_delta_ns = clockevent_delta2ns(0x3, &systick.dev);
270 + systick.dev.irq = irq_of_parse_and_map(np, 0);
271 + if (!systick.dev.irq)
272 + panic("%s: request_irq failed", np->name);
273 +
274 + clockevents_register_device(&systick.dev);
275 +
276 + pr_info("%s: runing - mult: %d, shift: %d\n", np->name, systick.dev.mult, systick.dev.shift);
277 +}
278 +
279 +CLOCKSOURCE_OF_DECLARE(systick, "ralink,cevt-systick", ralink_systick_init);
280 --
281 1.7.10.4
282
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