target/linux/ramips/patches-3.8/0118-DT-MIPS-ralink-add-RT2880-dts-files.patch

   1 From b39e659770cb71939765de8c9e73c0a0cfa832db Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Fri, 12 Apr 2013 06:27:37 +0000
   4 Subject: [PATCH 118/137] DT: MIPS: ralink: add RT2880 dts files
   5
   6 Add a dtsi file for RT2880 SoC and a sample dts file.
   7
   8 Signed-off-by: John Crispin <blogic@openwrt.org>
   9 Acked-by: Grant Likely <grant.likely@secretlab.ca>
  10 Patchwork: http://patchwork.linux-mips.org/patch/5188/
  11 ---
  12  arch/mips/ralink/Kconfig             |    4 +++
  13  arch/mips/ralink/dts/Makefile        |    1 +
  14  arch/mips/ralink/dts/rt2880.dtsi     |   58 ++++++++++++++++++++++++++++++++++
  15  arch/mips/ralink/dts/rt2880_eval.dts |   46 +++++++++++++++++++++++++++
  16  4 files changed, 109 insertions(+)
  17  create mode 100644 arch/mips/ralink/dts/rt2880.dtsi
  18  create mode 100644 arch/mips/ralink/dts/rt2880_eval.dts
  19
  20 --- a/arch/mips/ralink/Kconfig
  21 +++ b/arch/mips/ralink/Kconfig
  22 @@ -34,6 +34,10 @@ choice
  23         config DTB_RT_NONE
  24                 bool "None"
  25
  26 +       config DTB_RT2880_EVAL
  27 +               bool "RT2880 eval kit"
  28 +               depends on SOC_RT288X
  29 +
  30         config DTB_RT305X_EVAL
  31                 bool "RT305x eval kit"
  32                 depends on SOC_RT305X
  33 --- a/arch/mips/ralink/dts/Makefile
  34 +++ b/arch/mips/ralink/dts/Makefile
  35 @@ -1 +1,2 @@
  36 +obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
  37  obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
  38 --- /dev/null
  39 +++ b/arch/mips/ralink/dts/rt2880.dtsi
  40 @@ -0,0 +1,58 @@
  41 +/ {
  42 +       #address-cells = <1>;
  43 +       #size-cells = <1>;
  44 +       compatible = "ralink,rt2880-soc";
  45 +
  46 +       cpus {
  47 +               cpu@0 {
  48 +                       compatible = "mips,mips4KEc";
  49 +               };
  50 +       };
  51 +
  52 +       cpuintc: cpuintc@0 {
  53 +               #address-cells = <0>;
  54 +               #interrupt-cells = <1>;
  55 +               interrupt-controller;
  56 +               compatible = "mti,cpu-interrupt-controller";
  57 +       };
  58 +
  59 +       palmbus@300000 {
  60 +               compatible = "palmbus";
  61 +               reg = <0x300000 0x200000>;
  62 +                ranges = <0x0 0x300000 0x1FFFFF>;
  63 +
  64 +               #address-cells = <1>;
  65 +               #size-cells = <1>;
  66 +
  67 +               sysc@0 {
  68 +                       compatible = "ralink,rt2880-sysc";
  69 +                       reg = <0x0 0x100>;
  70 +               };
  71 +
  72 +               intc: intc@200 {
  73 +                       compatible = "ralink,rt2880-intc";
  74 +                       reg = <0x200 0x100>;
  75 +
  76 +                       interrupt-controller;
  77 +                       #interrupt-cells = <1>;
  78 +
  79 +                       interrupt-parent = <&cpuintc>;
  80 +                       interrupts = <2>;
  81 +               };
  82 +
  83 +               memc@300 {
  84 +                       compatible = "ralink,rt2880-memc";
  85 +                       reg = <0x300 0x100>;
  86 +               };
  87 +
  88 +               uartlite@c00 {
  89 +                       compatible = "ralink,rt2880-uart", "ns16550a";
  90 +                       reg = <0xc00 0x100>;
  91 +
  92 +                       interrupt-parent = <&intc>;
  93 +                       interrupts = <8>;
  94 +
  95 +                       reg-shift = <2>;
  96 +               };
  97 +       };
  98 +};
  99 --- /dev/null
 100 +++ b/arch/mips/ralink/dts/rt2880_eval.dts
 101 @@ -0,0 +1,46 @@
 102 +/dts-v1/;
 103 +
 104 +/include/ "rt2880.dtsi"
 105 +
 106 +/ {
 107 +       compatible = "ralink,rt2880-eval-board", "ralink,rt2880-soc";
 108 +       model = "Ralink RT2880 evaluation board";
 109 +
 110 +       memory@0 {
 111 +               reg = <0x8000000 0x2000000>;
 112 +       };
 113 +
 114 +       chosen {
 115 +               bootargs = "console=ttyS0,57600";
 116 +       };
 117 +
 118 +       cfi@1f000000 {
 119 +               compatible = "cfi-flash";
 120 +               reg = <0x1f000000 0x400000>;
 121 +
 122 +               bank-width = <2>;
 123 +               device-width = <2>;
 124 +               #address-cells = <1>;
 125 +               #size-cells = <1>;
 126 +
 127 +               partition@0 {
 128 +                       label = "uboot";
 129 +                       reg = <0x0 0x30000>;
 130 +                       read-only;
 131 +               };
 132 +               partition@30000 {
 133 +                       label = "uboot-env";
 134 +                       reg = <0x30000 0x10000>;
 135 +                       read-only;
 136 +               };
 137 +               partition@40000 {
 138 +                       label = "calibration";
 139 +                       reg = <0x40000 0x10000>;
 140 +                       read-only;
 141 +               };
 142 +               partition@50000 {
 143 +                       label = "linux";
 144 +                       reg = <0x50000 0x3b0000>;
 145 +               };
 146 +       };
 147 +};