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ralink: update patches
[openwrt/openwrt.git] / target / linux / ramips / patches-3.9 / 0162-USB-MIPS-ralink-add-rt5350-mt7620-UDC.patch
1 From 0e3b1bffd1974e6852912865a7cea481617b1c39 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Thu, 30 May 2013 16:06:35 +0200
4 Subject: [PATCH 162/164] USB: MIPS: ralink: add rt5350/mt7620 UDC
5
6 Signed-off-by: John Crispin <blogic@openwrt.org>
7 ---
8 drivers/usb/gadget/Kconfig | 8 +
9 drivers/usb/gadget/Makefile | 1 +
10 drivers/usb/gadget/rt_udc.h | 417 +++++++
11 drivers/usb/gadget/rt_udc_pdma.c | 2547 ++++++++++++++++++++++++++++++++++++++
12 4 files changed, 2973 insertions(+)
13 create mode 100644 drivers/usb/gadget/rt_udc.h
14 create mode 100644 drivers/usb/gadget/rt_udc_pdma.c
15
16 diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
17 index c7525b1..6f0e293 100644
18 --- a/drivers/usb/gadget/Kconfig
19 +++ b/drivers/usb/gadget/Kconfig
20 @@ -336,6 +336,14 @@ config USB_MV_U3D
21 MARVELL PXA2128 Processor series include a super speed USB3.0 device
22 controller, which support super speed USB peripheral.
23
24 +config USB_RT_UDC
25 + boolean "Ralink USB Device Port"
26 + depends on SOC_MT7620
27 + help
28 + Say "y" to link the driver statically, or "m" to build a
29 + dynamically linked module called "rt_udc" and force all
30 + gadget drivers to also be dynamically linked.
31 +
32 #
33 # Controllers available in both integrated and discrete versions
34 #
35 diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
36 index 82fb225..f78a3b2 100644
37 --- a/drivers/usb/gadget/Makefile
38 +++ b/drivers/usb/gadget/Makefile
39 @@ -34,6 +34,7 @@ obj-$(CONFIG_USB_MV_UDC) += mv_udc.o
40 mv_udc-y := mv_udc_core.o
41 obj-$(CONFIG_USB_FUSB300) += fusb300_udc.o
42 obj-$(CONFIG_USB_MV_U3D) += mv_u3d_core.o
43 +obj-$(CONFIG_USB_RT_UDC) += rt_udc_pdma.o
44
45 # USB Functions
46 obj-$(CONFIG_USB_F_ACM) += f_acm.o
47 diff --git a/drivers/usb/gadget/rt_udc.h b/drivers/usb/gadget/rt_udc.h
48 new file mode 100644
49 index 0000000..088e0d9
50 --- /dev/null
51 +++ b/drivers/usb/gadget/rt_udc.h
52 @@ -0,0 +1,417 @@
53 +/*
54 + * Copyright (C) 2009 Y.Y. Huang, Ralink Tech.(yy_huang@ralinktech.com)
55 + *
56 + * This udc driver is now under testing and code is based on pxa2xx_udc.h
57 + * Please use it with your own risk!
58 + *
59 + * This program is free software; you can redistribute it and/or modify
60 + * it under the terms of the GNU General Public License as published by
61 + * the Free Software Foundation; either version 2 of the License, or
62 + * (at your option) any later version.
63 + *
64 + * This program is distributed in the hope that it will be useful,
65 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
66 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
67 + * GNU General Public License for more details.
68 + */
69 +
70 +#ifndef __LINUX_USB_GADGET_RT_UDC_H
71 +#define __LINUX_USB_GADGET_RT_UDC_H
72 +
73 +#define CONFIG_RALINK_MT7620
74 +
75 +#include <linux/types.h>
76 +
77 +//#include "../host/ralink_usb.h" /* for port sharing setting and power saving purpose */
78 +
79 +#if defined (CONFIG_RALINK_RT3883) || defined (CONFIG_RALINK_RT3352) || defined (CONFIG_RALINK_MT7620)
80 +#define IN_EP_NUM 2
81 +#define OUT_EP_NUM 2
82 +#elif defined (CONFIG_RALINK_RT5350)
83 +#define IN_EP_NUM 1
84 +#define OUT_EP_NUM 1
85 +#else
86 +#error "Please define a platform."
87 +#endif
88 +
89 +/* Helper macros */
90 +#define EP_IDX(ep) ((ep->bEndpointAddress & ~USB_DIR_IN)+(EP_DIR(ep)? 0:IN_EP_NUM)) /* IN:1, OUT:0 */
91 +#define EP_NO(ep) ((ep->bEndpointAddress & ~USB_DIR_IN)) /* IN:1, OUT:0 */
92 +#define EP_DIR(ep) ((ep->bEndpointAddress) & USB_DIR_IN ? 1 : 0)
93 +#define EP_IN 1
94 +#define EP_OUT 0
95 +#define RT_USB_NB_EP (IN_EP_NUM + OUT_EP_NUM + 1)
96 +
97 +/* Driver structures */
98 +struct rt_request {
99 + struct usb_request req;
100 + struct list_head queue;
101 + unsigned int in_use;
102 + struct rt_ep_struct *rt_ep; // test for rx tasklet
103 + int zlp_dma_done; // used for DMA ZLP packet.
104 + int txd_count;
105 +};
106 +
107 +enum ep0_state {
108 + EP0_IDLE,
109 + EP0_IN_DATA_PHASE,
110 + EP0_OUT_DATA_PHASE,
111 + EP0_NO_DATA_PHASE,
112 + EP0_STALL,
113 +};
114 +
115 +struct rt_ep_struct {
116 + struct usb_ep ep;
117 + struct rt_udc_struct *rt_usb;
118 + struct list_head queue;
119 + unsigned char stopped;
120 + unsigned char bEndpointAddress;
121 + unsigned char bmAttributes;
122 +
123 + unsigned char pending;
124 + unsigned int rx_done_count; /* used by OUT EP only */
125 + unsigned int tx_done_count; /* used by OUT EP only */
126 +};
127 +
128 +struct rt_udc_struct {
129 + struct usb_gadget gadget;
130 + struct usb_gadget_driver *driver;
131 + struct device *dev;
132 + struct rt_ep_struct rt_ep[RT_USB_NB_EP];
133 + /* struct clk *clk; */
134 + struct timer_list timer;
135 + enum ep0_state ep0state;
136 + struct resource *res;
137 + void __iomem *base;
138 + unsigned char set_config;
139 + int cfg,
140 + intf,
141 + alt,
142 + interrupt;
143 +};
144 +
145 +#define USB_BASE (0xB0120000)
146 +
147 +#define OUT0BC (0x000)
148 +#define IN0BC (0x001)
149 +#define EP0CS (0x002)
150 +
151 +#define OUT1CON (0x00A)
152 +#define IN1CON (0x00E)
153 +#define OUT2CON (0x012)
154 +#define IN2CON (0x016)
155 +#define OUT3CON (0x01A)
156 +#define IN3CON (0x01E)
157 +#define OUT4CON (0x022)
158 +#define IN4CON (0x026)
159 +
160 +
161 +#define EP0INDAT (0x100)
162 +#define EP0OUTDAT (0x140)
163 +#define SETUPDATA (0x180)
164 +
165 +#define IN07IRQ (0x188)
166 +#define IN815IRQ (0x189)
167 +#define OUT07IRQ (0x18A)
168 +#define OUT815IRQ (0x18B)
169 +#define USBIRQ (0x18C)
170 +#define OUT07PNGIRQ (0x18E)
171 +#define OUT815PNGIRQ (0x18F)
172 +
173 +#define IN07IEN (0x194)
174 +#define OUT07IEN (0x196)
175 +#define USBIEN (0x198)
176 +
177 +#define OUT07PNGIEN (0x19A)
178 +#define OUT815PNGIEN (0x19B)
179 +
180 +#define ENDPRST (0x1A2)
181 +#define ENDPRST_IO (0x1 << 4)
182 +#define ENDPRST_TOGRST (0x1 << 5)
183 +#define ENDPRST_FIFORST (0x1 << 6)
184 +
185 +#define FIFOCTRL (0x1A8)
186 +
187 +#define EP_CS_EP0_STALL (0x1 << 0)
188 +#define EP_CS_EP0_HSNAK (0x1 << 1)
189 +#define EP_CS_EP0_INBSY (0x1 << 2)
190 +#define EP_CS_EP0_OUTBSY (0x1 << 3)
191 +#define EP_CS_AUTO (0x1 << 4)
192 +#define EP_CS_NPAK1 (0x1 << 3)
193 +#define EP_CS_NPAK0 (0x1 << 2)
194 +#define EP_CS_BSY (0x1 << 1)
195 +#define EP_CS_ERR (0x1 << 0)
196 +
197 +#define EP0_OUT_BSY (0x1 << 3)
198 +#define EP0_IN_BSY (0x1 << 2)
199 +
200 +#define USB_INTR_HSPEED (0x20)
201 +#define USB_INTR_RESET (0x10)
202 +#define USB_INTR_SUSPEND (0x08)
203 +#define USB_INTR_SETUP_TOKEN (0x04)
204 +#define USB_INTR_SOF (0x02)
205 +#define USB_INTR_SETUP_TOKEN_VALID (0x01)
206 +
207 +/* UDMA */
208 +#define RTUSB_UDMA_CTRL (USB_BASE + 0x800)
209 +#define RTUSB_UDMA_WRR (USB_BASE + 0x804)
210 +
211 +/* PDMA */
212 +#define RTUSB_TX_BASE_PTR0 (USB_BASE + 0x1000)
213 +#define RTUSB_TX_MAX_CNT0 (USB_BASE + 0x1004)
214 +#define RTUSB_TX_CTX_IDX0 (USB_BASE + 0x1008)
215 +#define RTUSB_TX_DTX_IDX0 (USB_BASE + 0x100C)
216 +#define RTUSB_TX_BASE_PTR1 (USB_BASE + 0x1010)
217 +#define RTUSB_TX_MAX_CNT1 (USB_BASE + 0x1014)
218 +#define RTUSB_TX_CTX_IDX1 (USB_BASE + 0x1018)
219 +#define RTUSB_TX_DTX_IDX1 (USB_BASE + 0x101C)
220 +#define RTUSB_RX_BASE_PTR0 (USB_BASE + 0x1100)
221 +#define RTUSB_RX_MAX_CNT0 (USB_BASE + 0x1104)
222 +#define RTUSB_RX_CALC_IDX0 (USB_BASE + 0x1108)
223 +#define RTUSB_RX_DRX_IDX0 (USB_BASE + 0x110C)
224 +#define RTUSB_PDMA_GLO_CFG (USB_BASE + 0x1204)
225 +
226 +#define RTUSB_TX_WB_DDONE (0x1 << 6)
227 +#define RTUSB_RX_DMA_BUSY (0x1 << 3)
228 +#define RTUSB_RX_DMA_EN (0x1 << 2)
229 +#define RTUSB_TX_DMA_BUSY (0x1 << 1)
230 +#define RTUSB_TX_DMA_EN (0x1 << 0)
231 +
232 +#define RTUSB_PDMA_RST_IDX (USB_BASE + 0x1208)
233 +
234 +#define RTUSB_RST_DRX_IDX1 (0x1 << 17)
235 +#define RTUSB_RST_DRX_IDX0 (0x1 << 16)
236 +#define RTUSB_RST_DTX_IDX3 (0x1 << 3)
237 +#define RTUSB_RST_DTX_IDX2 (0x1 << 2)
238 +#define RTUSB_RST_DTX_IDX1 (0x1 << 1)
239 +#define RTUSB_RST_DTX_IDX0 (0x1 << 0)
240 +
241 +#define RTUSB_DELAY_INT_CFG (USB_BASE + 0x120C)
242 +#define RTUSB_INT_STATUS (USB_BASE + 0x1220)
243 +#define RTUSB_RX_DONE_INT1 (0x1 << 17)
244 +#define RTUSB_RX_DONE_INT0 (0x1 << 16)
245 +#define RTUSB_TX_DONE_INT3 (0x1 << 3)
246 +#define RTUSB_TX_DONE_INT2 (0x1 << 2)
247 +#define RTUSB_TX_DONE_INT1 (0x1 << 1)
248 +#define RTUSB_TX_DONE_INT0 (0x1 << 0)
249 +
250 +#define RTUSB_INT_MASK (USB_BASE + 0x1228)
251 +#define RTUSB_RX_DONE_INT_MSK1 (0x1 << 17)
252 +#define RTUSB_RX_DONE_INT_MSK0 (0x1 << 16)
253 +#define RTUSB_TX_DONE_INT_MSK3 (0x1 << 3)
254 +#define RTUSB_TX_DONE_INT_MSK2 (0x1 << 2)
255 +#define RTUSB_TX_DONE_INT_MSK1 (0x1 << 1)
256 +#define RTUSB_TX_DONE_INT_MSK0 (0x1 << 0)
257 +
258 +
259 +/*=========================================
260 + PDMA RX Descriptor Format define
261 +=========================================*/
262 +//-------------------------------------------------
263 +typedef struct _PDMA_RXD_INFO1_ PDMA_RXD_INFO1_T;
264 +
265 +struct _PDMA_RXD_INFO1_ {
266 + unsigned int PDP0;
267 +};
268 +//-------------------------------------------------
269 +typedef struct _PDMA_RXD_INFO2_ PDMA_RXD_INFO2_T;
270 +
271 +struct _PDMA_RXD_INFO2_ {
272 + unsigned int PLEN1 : 14;
273 + unsigned int LS1 : 1;
274 + unsigned int UN_USED : 1;
275 + unsigned int PLEN0 : 14;
276 + unsigned int LS0 : 1;
277 + unsigned int DDONE_bit : 1;
278 +};
279 +//-------------------------------------------------
280 +typedef struct _PDMA_RXD_INFO3_ PDMA_RXD_INFO3_T;
281 +
282 +struct _PDMA_RXD_INFO3_ {
283 + unsigned int PDP1;
284 +};
285 +//-------------------------------------------------
286 +typedef struct _PDMA_RXD_INFO4_ PDMA_RXD_INFO4_T;
287 +
288 +struct _PDMA_RXD_INFO4_ {
289 + unsigned int Rx_bcnt:16;
290 + unsigned int Reserved1:8;
291 + unsigned int Out_ep_addr:4;
292 + unsigned int Reserved0:4;
293 +};
294 +struct PDMA_rxdesc {
295 + PDMA_RXD_INFO1_T rxd_info1;
296 + PDMA_RXD_INFO2_T rxd_info2;
297 + PDMA_RXD_INFO3_T rxd_info3;
298 + PDMA_RXD_INFO4_T rxd_info4;
299 +};
300 +/*=========================================
301 + PDMA TX Descriptor Format define
302 +=========================================*/
303 +//-------------------------------------------------
304 +typedef struct _PDMA_TXD_INFO1_ PDMA_TXD_INFO1_T;
305 +
306 +struct _PDMA_TXD_INFO1_ {
307 + unsigned int SDP0;
308 +};
309 +//-------------------------------------------------
310 +typedef struct _PDMA_TXD_INFO2_ PDMA_TXD_INFO2_T;
311 +
312 +struct _PDMA_TXD_INFO2_ {
313 + unsigned int SDL1 : 14;
314 + unsigned int LS1_bit : 1;
315 + unsigned int BURST_bit : 1;
316 + unsigned int SDL0 : 14;
317 + unsigned int LS0_bit : 1;
318 + unsigned int DDONE_bit : 1;
319 +};
320 +//-------------------------------------------------
321 +typedef struct _PDMA_TXD_INFO3_ PDMA_TXD_INFO3_T;
322 +
323 +struct _PDMA_TXD_INFO3_ {
324 + unsigned int SDP1;
325 +};
326 +//-------------------------------------------------
327 +typedef struct _PDMA_TXD_INFO4_ PDMA_TXD_INFO4_T;
328 +struct _PDMA_TXD_INFO4_ {
329 + unsigned int reserved2:17;
330 + unsigned int zlp_flag:1;
331 + unsigned int reserved1:6;
332 + unsigned int In_ep_addr:4;
333 + unsigned int rsv:4;
334 +};
335 +
336 +struct PDMA_txdesc {
337 + PDMA_TXD_INFO1_T txd_info1;
338 + PDMA_TXD_INFO2_T txd_info2;
339 + PDMA_TXD_INFO3_T txd_info3;
340 + PDMA_TXD_INFO4_T txd_info4;
341 +};
342 +
343 +
344 +#ifdef DEBUG
345 +#define DBG do{ if(debuglevel) printk("%s()\n", __FUNCTION__); }while(0);
346 +#define DD do{ printk("%s: %s %d\n", driver_name, __FUNCTION__, __LINE__); } while(0);
347 +#define xprintk(fmt, args...) do{ if(debuglevel) printk(fmt, ## args); } while(0);
348 +#else
349 +#define DBG
350 +#define DD
351 +#define xprintk(fmt, args...)
352 +#endif
353 +
354 +#define FATAL_ERROR(fmt, args...) do{ printk(fmt, ## args); printk("\n############### ERROR #####################\n %s %d\n############### ERROR #####################\n", __FUNCTION__, __LINE__); BUG(); } while(0)
355 +
356 +static void inline dump_usbirq(u32 irqreg)
357 +{
358 + if(irqreg)
359 + xprintk("U%s%s%s%s%s%s\n",
360 + (irqreg & USB_INTR_SOF) ? "sof" : "",
361 + (irqreg & USB_INTR_RESET) ? " rst" : "",
362 + (irqreg & USB_INTR_SUSPEND) ? " sus" : "",
363 + (irqreg & USB_INTR_SETUP_TOKEN) ? "st" : "",
364 + (irqreg & USB_INTR_SETUP_TOKEN_VALID) ? "sv" : "",
365 + (irqreg & USB_INTR_HSPEED) ? " HS" : "");
366 +
367 +// if(irqreg & USB_INTR_SETUP_TOKEN)
368 +// printk("ST\n");
369 +// if(irqreg & USB_INTR_SETUP_TOKEN_VALID)
370 +// printk("SV\n");
371 +
372 +}
373 +
374 +static void inline dump_epirq(u32 irqreg, u32 ienreg, int dir)
375 +{
376 + if(irqreg)
377 + xprintk("%s%x\n", dir? "I" : "O", irqreg);
378 +}
379 +
380 +static __inline__ u32 usb_read(u32 addr)
381 +{
382 + return ioread32( (void __iomem *)(USB_BASE + (addr << 2)) );
383 +}
384 +
385 +static __inline__ void usb_write(u32 addr, u32 value)
386 +{
387 + iowrite32(value, (void __iomem *)(USB_BASE + (addr << 2)) );
388 +}
389 +
390 +static __inline__ void reg_write(u32 addr, u32 value)
391 +{
392 + iowrite32(value, (void __iomem *)0x0 + addr);
393 +}
394 +
395 +static __inline__ u32 reg_read(u32 addr)
396 +{
397 + return ioread32( (void __iomem *)0x0 + addr);
398 +}
399 +
400 +
401 +static void handle_pending_epoutirq(struct rt_udc_struct *rt_usb, struct rt_ep_struct *rt_ep, struct rt_request *req);
402 +
403 +/* Debug macros */
404 +#ifdef DEBUG
405 +#define DEBUG_REQ
406 +#define DEBUG_TRX
407 +#define DEBUG_INIT
408 +#define DEBUG_EP0
409 +#define DEBUG_EPX
410 +#define DEBUG_ERR
411 +
412 +#ifdef DEBUG_REQ
413 + #define D_REQ(dev, args...) printk(args)
414 +#else
415 + #define D_REQ(dev, args...) do {} while (0)
416 +#endif /* DEBUG_REQ */
417 +
418 +#ifdef DEBUG_TRX
419 + #define D_TRX(dev, args...) printk(args)
420 +#else
421 + #define D_TRX(dev, args...) do {} while (0)
422 +#endif /* DEBUG_TRX */
423 +
424 +#ifdef DEBUG_INIT
425 + #define D_INI(dev, args...) printk(args)
426 +#else
427 + #define D_INI(dev, args...) do {} while (0)
428 +#endif /* DEBUG_INIT */
429 +
430 +#ifdef DEBUG_EP0
431 + static const char *state_name[] = {
432 + "IDLE",
433 + "IN",
434 + "OUT",
435 + "NODATA",
436 + "STALL"
437 + };
438 + #define D_EP0(dev, args...) printk(args)
439 +#else
440 + #define D_EP0(dev, args...) do {} while (0)
441 +#endif /* DEBUG_EP0 */
442 +
443 +#ifdef DEBUG_EPX
444 + #define D_EPX(dev, args...) printk(args)
445 +#else
446 + #define D_EPX(dev, args...) do {} while (0)
447 +#endif /* DEBUG_EP0 */
448 +
449 +#ifdef DEBUG_ERR
450 + #define D_ERR(dev, args...) printk(args)
451 +#else
452 + #define D_ERR(dev, args...) do {} while (0)
453 +#endif
454 +
455 +#else
456 + #define D_REQ(dev, args...) do {} while (0)
457 + #define D_TRX(dev, args...) do {} while (0)
458 + #define D_INI(dev, args...) do {} while (0)
459 + #define D_EP0(dev, args...) do {} while (0)
460 + #define D_EPX(dev, args...) do {} while (0)
461 + #define dump_ep_intr(x, y, z, i) do {} while (0)
462 + #define dump_intr(x, y, z) do {} while (0)
463 + #define dump_ep_stat(x, y) do {} while (0)
464 + #define dump_usb_stat(x, y) do {} while (0)
465 + #define dump_req(x, y, z) do {} while (0)
466 + #define D_ERR(dev, args...) do {} while (0)
467 +#endif /* DEBUG */
468 +
469 +#endif /* __LINUX_USB_GADGET_RT_UDC_H */
470 diff --git a/drivers/usb/gadget/rt_udc_pdma.c b/drivers/usb/gadget/rt_udc_pdma.c
471 new file mode 100644
472 index 0000000..d5b89a2
473 --- /dev/null
474 +++ b/drivers/usb/gadget/rt_udc_pdma.c
475 @@ -0,0 +1,2547 @@
476 +/*
477 + * driver/usb/gadget/rt_udc.c
478 + *
479 + * Copyright (C) 2009 Ying Yuan Huang, Ralink Tech. <yyhuang@ralink_tech.com>
480 + *
481 + * This program is free software; you can redistribute it and/or modify
482 + * it under the terms of the GNU General Public License as published by
483 + * the Free Software Foundation; either version 2 of the License, or
484 + * (at your option) any later version.
485 + *
486 + * This program is distributed in the hope that it will be useful,
487 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
488 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
489 + * GNU General Public License for more details.
490 + */
491 +
492 +/*
493 + * 1) [ USB composite device ]. The USB PDMA architecture is not suitable for USB composite
494 + * device support. A passive gadget driver(device) may slow down or block other gadget
495 + * (device) because they are in the same ring.
496 + */
497 +#include <linux/init.h>
498 +#include <linux/kernel.h>
499 +#include <linux/platform_device.h>
500 +#include <linux/module.h>
501 +#include <linux/errno.h>
502 +#include <linux/list.h>
503 +#include <linux/interrupt.h>
504 +#include <linux/io.h>
505 +#include <linux/irq.h>
506 +#include <linux/device.h>
507 +#include <linux/dma-mapping.h>
508 +#include <linux/clk.h>
509 +#include <linux/delay.h>
510 +#include <linux/timer.h>
511 +#include <linux/proc_fs.h>
512 +#include <linux/usb/ch9.h>
513 +#include <linux/version.h>
514 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)
515 +#include <linux/usb_gadget.h>
516 +#else
517 +#include <linux/usb/gadget.h>
518 +#endif
519 +
520 +static const char driver_name[] = "rt_udc";
521 +static const char ep0name[] = "ep0";
522 +static unsigned debuglevel = 0;
523 +module_param (debuglevel, uint, S_IRUGO);
524 +
525 +#define DEBUG
526 +#include "rt_udc.h"
527 +
528 +#define PROC_DIR driver_name
529 +#define DEBUGLEVEL_PROCFILE "debuglevel"
530 +static struct proc_dir_entry *pProcDir = NULL;
531 +static struct proc_dir_entry *pProcDebugLevel = NULL;
532 +
533 +/*
534 + * USB PDMA related
535 + */
536 +#define NUM_RX_DESC 256
537 +#define NUM_TX_DESC 256
538 +#define RX_BUFF_SZ 1600 /* 1536 */
539 +#define RING_RESET_TIMEOUT 3000 /* 3 secs */
540 +#define RX_RESCHEDULE 64
541 +#define TX_RESCHEDULE 4
542 +static unsigned dma = 0;
543 +module_param (dma, uint, S_IRUGO);
544 +static unsigned sm = 0;
545 +module_param (sm, uint, S_IRUGO);
546 +static unsigned int TXMAXCAP = 512;
547 +module_param (TXMAXCAP, uint, S_IRUGO);
548 +
549 +static struct PDMA_txdesc *tx_ring0_cache = NULL;
550 +static struct PDMA_rxdesc *rx_ring0_cache = NULL;
551 +static volatile struct PDMA_rxdesc *rx_ring0_noncache = NULL;
552 +static volatile struct PDMA_txdesc *tx_ring0_noncache = NULL;
553 +static dma_addr_t tx_ring_bus_addr;
554 +static dma_addr_t rx_ring_bus_addr;
555 +
556 +static int rx_dma_owner_idx0; /* Point to the next RXD DMA wants to use in RXD Ring#0. */
557 +static int tx_cpu_owner_idx0;
558 +static int tx_need_free_idx0;
559 +
560 +static volatile unsigned char *USBRxPackets[NUM_RX_DESC]; /* Receive packets */
561 +static unsigned char tx_zlp_dummy_buf[8];
562 +struct tasklet_struct rx_dma_tasklet;
563 +struct tasklet_struct tx_dma_tasklet;
564 +
565 +static struct rt_udc_struct controller;
566 +static struct rt_request *handle_outep(struct rt_ep_struct *rt_ep);
567 +
568 +static int debuglevel_read(char *page, char **start, off_t off,int count, int *eof, void *data)
569 +{
570 + int len;
571 + sprintf(page, "%d\n", debuglevel);
572 + len = strlen(page) + 1;
573 + *eof = 1;
574 + return len;
575 +}
576 +
577 +static int debuglevel_write(struct file *file, const char *buffer, unsigned long count, void *data)
578 +{
579 + char tmp[32];
580 + count = (count > 32) ? 32 : count;
581 + memset(tmp, 0, 32);
582 + if (copy_from_user(tmp, buffer, count))
583 + return -EFAULT;
584 + debuglevel = simple_strtol(tmp, 0, 10);
585 + return count;
586 +}
587 +
588 +static void ep0_chg_stat(const char *label, struct rt_udc_struct *rt_usb, enum ep0_state stat)
589 +{
590 + xprintk("<0st>%s->%s\n", state_name[rt_usb->ep0state], state_name[stat]);
591 +
592 + if (rt_usb->ep0state == stat)
593 + return;
594 + rt_usb->ep0state = stat;
595 +}
596 +
597 +static u8 read_epcs(struct rt_ep_struct *rt_ep)
598 +{
599 + int idx = EP_NO(rt_ep);
600 + int dir = EP_DIR(rt_ep);
601 +
602 + if(idx == 0)
603 + return usb_read(EP0CS);
604 +
605 + return (dir == EP_IN ? usb_read(0x7 + idx*8) : usb_read(0x3 + idx*8) );
606 +}
607 +
608 +static void write_epcs(struct rt_ep_struct *rt_ep, u8 val)
609 +{
610 + int idx = EP_NO(rt_ep);
611 + int dir = EP_DIR(rt_ep);
612 +
613 + if(idx == 0)
614 + usb_write(EP0CS, val);
615 + else
616 + (dir == EP_IN ? /*IN */ usb_write(0x7 + idx*8, val) : usb_write(0x3 + idx*8, val) );
617 +}
618 +
619 +static u16 read_inbc(int epnum)
620 +{
621 + u16 low, high = 0;
622 + if(epnum == 0){ /* EP0 */
623 + low = usb_read(IN0BC);
624 + }else{
625 + low = usb_read(epnum * 8 + 4);
626 + high = usb_read((epnum * 8 + 4)+1);
627 + }
628 + return (low | (high << 8));
629 +}
630 +
631 +static u16 read_outbc(int epnum)
632 +{
633 + u16 low, high = 0;
634 + if(epnum == 0){ /* EP0 */
635 + low = usb_read(OUT0BC);
636 + }else{
637 + low = usb_read(epnum * 8);
638 + high = usb_read((epnum * 8)+1);
639 + }
640 + return (low | (high << 8));
641 +}
642 +
643 +
644 +static void rt_all_eps_reset(void)
645 +{
646 + // reset(toggle & fifo) all 16 IN & 16 OUT endpoints
647 + usb_write(ENDPRST, 0x10);
648 + usb_write(ENDPRST, 0x70);
649 + usb_write(ENDPRST, 0x00);
650 + usb_write(ENDPRST, 0x60);
651 +}
652 +
653 +static void rt_ep_rst(struct rt_ep_struct *rt_ep)
654 +{
655 + u8 reg = 0;
656 + u8 idx = EP_NO(rt_ep);
657 + u8 dir = EP_DIR(rt_ep);
658 + if(dir == EP_IN )
659 + reg |= ENDPRST_IO | idx;
660 + usb_write(ENDPRST, reg);
661 +
662 + reg |= ENDPRST_TOGRST | ENDPRST_FIFORST;
663 + usb_write(ENDPRST, reg);
664 +}
665 +
666 +static void rt_ep_irq_enable(struct rt_ep_struct *rt_ep)
667 +{
668 + u8 reg;
669 + u8 idx = EP_NO(rt_ep);
670 + u8 dir = EP_DIR(rt_ep);
671 +
672 + if(idx == 0 /* ep0 */){
673 + usb_write(IN07IEN, (usb_read(IN07IEN) | 0x1) );
674 + usb_write(OUT07IEN, (usb_read(OUT07IEN) | 0x1) );
675 + }else{ /* epX */
676 + reg = usb_read(dir ? IN07IEN : OUT07IEN);
677 + reg = reg | (0x1 << idx);
678 + usb_write(dir == EP_IN ? IN07IEN : OUT07IEN, reg);
679 + reg = usb_read(dir ? IN07IEN : OUT07IEN);
680 + }
681 +}
682 +
683 +static void rt_udc_init_ep(struct rt_udc_struct *rt_usb)
684 +{
685 + DBG;
686 + if(dma){
687 +#if defined (CONFIG_RALINK_RT3883) || defined (CONFIG_RALINK_RT3352) || defined (CONFIG_RALINK_MT7620)
688 + usb_write(IN1CON, 0x8D); // InEP1 : Int, 2 subfifos
689 + usb_write(IN2CON, 0x89); // InEP2 : Bulk, 2 subfifos
690 + usb_write(OUT1CON, 0x8D); // OutEP1 : Int, 2 subfifos
691 + usb_write(OUT2CON, 0x89); // OutEP2 : Bulk, 2 subfifos
692 + //usb_write(OUT3CON, 0x89); // OutEP3 : Bulk, 2 subfifos
693 + //usb_write(OUT4CON, 0x89); // OutEP4 : Bulk, 2 subfifos
694 +#elif defined (CONFIG_RALINK_RT5350)
695 + usb_write(IN1CON, 0x89); // InEP1 : BULK, 2 subfifos
696 + usb_write(OUT1CON, 0x89); // OutEP1 : BULK, 2 subfifos
697 +#else
698 +#error "define a platform"
699 +#endif
700 + }else{
701 +#if defined (CONFIG_RALINK_RT3883) || defined (CONFIG_RALINK_RT3352) || defined (CONFIG_RALINK_MT7620)
702 + usb_write(IN1CON, 0x8C); // InEP1 : Int , 1 subfifos
703 + usb_write(IN2CON, 0x88); // InEP2 : Bulk, 1 subfifo
704 + usb_write(OUT1CON, 0x8C); // OutEP1 : Int, 1 subfifos
705 + usb_write(OUT2CON, 0x88); // OutEP2 : Bulk, 1 subfifos
706 + //usb_write(OUT3CON, 0x88); // OutEP3 : Bulk, 1 subfifo
707 + //usb_write(OUT4CON, 0x88); // OutEP4 : Bulk. 1 subfifo
708 +
709 +#elif defined (CONFIG_RALINK_RT5350)
710 + usb_write(IN1CON, 0x88); // InEP1 : BULK , 1 subfifos
711 + usb_write(OUT1CON, 0x88); // OutEP1 : BULK, 1 subfifos
712 +#else
713 +#error "define a platform"
714 +#endif
715 + }
716 + // clear all pending HW interrupts
717 + usb_write(IN07IRQ, 0xFF);
718 + usb_write(OUT07IRQ, 0xFF);
719 + rt_all_eps_reset();
720 + rt_ep_irq_enable(&rt_usb->rt_ep[0]);
721 +}
722 +
723 +static void rt_udc_init_fifo(struct rt_udc_struct *rt_usb)
724 +{
725 + // fifo control
726 + if(dma){
727 + usb_write(FIFOCTRL, 0x31); // INEP1, Autoin = 1
728 + usb_write(FIFOCTRL, 0x32); // INEP2, Autoin = 1
729 + usb_write(FIFOCTRL, 0x21); // OUTEP1, Autoin = 1
730 + usb_write(FIFOCTRL, 0x22); // OUTEP2, Autoin = 1
731 + //usb_write(FIFOCTRL, 0x23);// OUTEP3, Autoin = 1
732 + //usb_write(FIFOCTRL, 0x24);// OUTEP4, Autoin = 1
733 +
734 + usb_write(FIFOCTRL, 0x00); // Access by DMA
735 + }else{
736 + usb_write(FIFOCTRL, 0x11); // INEP1, Autoin = 0
737 + usb_write(FIFOCTRL, 0x12); // INEP2, Autoin = 0
738 + usb_write(FIFOCTRL, 0x01); // OUTEP1, Autoin = 0
739 + usb_write(FIFOCTRL, 0x02); // OUTEP2, Autoin = 0
740 + //usb_write(FIFOCTRL, 0x03);// OUTEP3, Autoin = 0
741 + //usb_write(FIFOCTRL, 0x04);// OUTEP4, Autoin = 0
742 +
743 + usb_write(FIFOCTRL, 0x80); // Access by CPU
744 + }
745 +}
746 +
747 +static void rt_udc_init(struct rt_udc_struct *rt_usb)
748 +{
749 + /* Setup & Init endpoints */
750 + rt_udc_init_ep(rt_usb);
751 +
752 + // Enable HS, reset, suspend, SETUP valid data interrupt
753 + usb_write(USBIRQ, 0xff); // clear first
754 + usb_write(USBIEN, 0x21);
755 +
756 + /* Setup ep fifos */
757 + rt_udc_init_fifo(rt_usb);
758 +}
759 +
760 +static void rt_ep_irq_disable(struct rt_ep_struct *rt_ep)
761 +{
762 + u8 reg;
763 + u8 idx = EP_NO(rt_ep);
764 + u8 dir = EP_DIR(rt_ep);
765 +
766 + if(idx == 0 /* ep0 */){
767 + usb_write(IN07IEN, (usb_read(IN07IEN) & ~(0x1)) );
768 + usb_write(OUT07IEN, (usb_read(OUT07IEN) & ~(0x1)) );
769 + }else{
770 + reg = usb_read(dir ? IN07IEN : OUT07IEN);
771 + reg = reg & ~(0x1 << idx);
772 + usb_write(dir == EP_IN ? IN07IEN : OUT07IEN, reg);
773 + reg = usb_read(dir ? IN07IEN : OUT07IEN);
774 + }
775 +}
776 +
777 +static u32 rt_fifo_bcount(struct rt_ep_struct *rt_ep)
778 +{
779 + u8 low, high;
780 + u32 rc;
781 +
782 + int idx = EP_NO(rt_ep);
783 + int dir = EP_DIR(rt_ep);
784 +
785 + if(idx == 0)
786 + return 0;
787 +
788 + if(dir /* IN */){
789 + low = usb_read(0x004 + idx*8);
790 + high = usb_read( (0x004 + idx*8)+1 );
791 + }else{ /* OUT */
792 + low = usb_read(0x000 + idx*8);
793 + high = usb_read( (0x000 + idx*8)+1 );
794 + }
795 + rc = high | low;
796 + return rc;
797 +}
798 +
799 +void rt_flush(struct rt_ep_struct *rt_ep)
800 +{
801 + rt_ep_rst(rt_ep);
802 +}
803 +
804 +void rt_ep_stall(struct rt_ep_struct *rt_ep, int value)
805 +{
806 + u8 tmp;
807 + u32 addr;
808 + int idx = EP_NO(rt_ep);
809 + int dir = EP_DIR(rt_ep);
810 +
811 + if(idx == 0){
812 + tmp = usb_read(EP0CS);
813 + if(value)
814 + tmp |= 0x1;
815 + else
816 + tmp &= ~(0x1);
817 + usb_write(EP0CS, tmp);
818 + }else{
819 + addr = (dir == EP_IN ? 0x006 : 0x002) + idx * 8;
820 + tmp = usb_read(addr);
821 + if(value)
822 + tmp |= 0x40;
823 + else
824 + tmp &= ~(0x40);
825 + usb_write(addr, tmp);
826 + }
827 +
828 + return;
829 +}
830 +
831 +static int rt_udc_get_frame(struct usb_gadget *_gadget)
832 +{
833 + return 0;
834 +}
835 +
836 +static int rt_udc_wakeup(struct usb_gadget *_gadget)
837 +{
838 + DBG;
839 + return 0;
840 +}
841 +
842 +
843 +/*******************************************************************************
844 + * USB request control functions
845 + *******************************************************************************
846 + */
847 +static inline void ep_add_request(struct rt_ep_struct *rt_ep, struct rt_request *req)
848 +{
849 + if (unlikely(!req))
850 + return;
851 + req->in_use = 1;
852 + req->zlp_dma_done = 0;
853 + req->rt_ep = rt_ep;
854 + list_add_tail(&req->queue, &rt_ep->queue);
855 +}
856 +
857 +static inline void ep_del_request(struct rt_ep_struct *rt_ep, struct rt_request *req)
858 +{
859 + if (unlikely(!req))
860 + return;
861 + list_del_init(&req->queue);
862 + req->zlp_dma_done = 0;
863 + req->in_use = 0;
864 +}
865 +
866 +static void done(struct rt_ep_struct *rt_ep, struct rt_request *req, int status)
867 +{
868 + ep_del_request(rt_ep, req);
869 +
870 + if (likely(req->req.status == -EINPROGRESS))
871 + req->req.status = status;
872 + else
873 + status = req->req.status;
874 +
875 + if (status && status != -ESHUTDOWN)
876 + D_ERR(rt_ep->rt_usb->dev, "<%s> complete %s req %p stat %d len %u/%u\n", __func__, rt_ep->ep.name, &req->req, status,req->req.actual, req->req.length);
877 +
878 + req->req.complete(&rt_ep->ep, &req->req);
879 +}
880 +
881 +#if 0
882 +/* for reference */
883 +struct tasklet_struct rx_tasklet_tmp;
884 +static void rx_done_do_tasklet(unsigned long arg)
885 +{
886 + struct rt_ep_struct *rt_ep;
887 + struct rt_request *rt_req;
888 + struct usb_request *usb_req;
889 + struct usb_ep *ep;
890 + int i, rx_count, status = 0;
891 + struct rt_udc_struct *rt_usb = &controller;
892 +
893 + for (i = (IN_EP_NUM+1); i < RT_USB_NB_EP; i++) {
894 + rt_ep = &rt_usb->rt_ep[i];
895 + ep = &rt_ep->ep;
896 +
897 + // shared by irq handler, protect it
898 + spin_lock_irqsave(&rx_done_lock, rx_done_lock_flags);
899 + rx_count = rt_ep->rx_done_count;
900 +
901 + //spin_unlock_irqrestore(&rx_done_lock, rx_done_lock_flags);
902 +
903 + for (;rx_count > 0; rx_count--) {
904 + if(unlikely(list_empty(&rt_ep->queue)))
905 + FATAL_ERROR("empty queue");
906 +
907 + rt_req = list_entry(rt_ep->queue.next, struct rt_request, queue);
908 + usb_req = &rt_req->req;
909 +
910 + ep_del_request(rt_ep, rt_req);
911 + rt_ep->rx_done_count--;
912 +
913 + spin_unlock_irqrestore(&rx_done_lock, rx_done_lock_flags);
914 +
915 + if (unlikely(rt_req->req.status == -EINPROGRESS))
916 + rt_req->req.status = status;
917 + else
918 + status = rt_req->req.status;
919 +
920 + if (unlikely(status && status != -ESHUTDOWN))
921 + D_ERR(rt_ep->rt_usb->dev, "<%s> complete %s req %p stat %d len %u/%u\n", __func__, rt_ep->ep.name, &rt_req->req, status,rt_req->req.actual, rt_req->req.length);
922 +
923 + // indicate gadget driver.
924 + usb_req->complete(ep, usb_req);
925 +
926 + spin_lock_irqsave(&rx_done_lock, rx_done_lock_flags);
927 + }
928 + spin_unlock_irqrestore(&rx_done_lock, rx_done_lock_flags);
929 + }
930 +}
931 +#endif
932 +
933 +struct tasklet_struct tx_tasklet;
934 +static void tx_do_tasklet(unsigned long arg)
935 +{
936 + return;
937 +}
938 +
939 +struct tasklet_struct rx_tasklet;
940 +static void rx_do_tasklet(unsigned long arg)
941 +{
942 + struct rt_ep_struct *rt_ep;
943 + struct rt_request *req;
944 + struct usb_ep *ep;
945 + int i;
946 + struct rt_udc_struct *rt_usb = &controller;
947 +
948 + for (i = (IN_EP_NUM+1/* EP0 */); i < RT_USB_NB_EP; i++){
949 + u8 epcs;
950 + rt_ep = &rt_usb->rt_ep[i];
951 + ep = &rt_ep->ep;
952 +
953 + epcs = read_epcs(rt_ep);
954 + while(!(epcs & EP_CS_BSY)){
955 + req = handle_outep(rt_ep);
956 + if(!req){
957 + // No usb request found.
958 + // Just set up the flag (pending) and clear int.
959 + rt_ep->pending = 1;
960 + break;
961 + }else{
962 + if(req && ( (req->req.actual % rt_ep->ep.maxpacket) || (req->req.actual >= req->req.length))){
963 + xprintk("q.l=%d,q.a=%d\n", req->req.length, req->req.actual);
964 + done(rt_ep, req, 0);
965 + }
966 + }
967 +
968 + epcs = read_epcs(rt_ep);
969 + write_epcs(rt_ep, 0x0);
970 + epcs = read_epcs(rt_ep);
971 + }
972 + }
973 +}
974 +
975 +static void nuke(struct rt_ep_struct *rt_ep, int status)
976 +{
977 + struct rt_request *req;
978 +
979 + DBG;
980 + while (!list_empty(&rt_ep->queue)) {
981 + req = list_entry(rt_ep->queue.next, struct rt_request, queue);
982 + done(rt_ep, req, status);
983 + }
984 +}
985 +
986 +/*
987 + *******************************************************************************
988 + * Data tansfer over USB functions
989 + *******************************************************************************
990 + */
991 +static int read_ep0_fifo(struct rt_ep_struct *rt_ep, struct rt_request *req)
992 +{
993 + u8 *buf;
994 + int byte_count, req_bufferspace, count, i;
995 +
996 +DBG;
997 + if(!in_irq())
998 + FATAL_ERROR("not irq context.");
999 +
1000 + byte_count = read_outbc(EP_NO(rt_ep));
1001 + req_bufferspace = req->req.length - req->req.actual;
1002 +
1003 + buf = req->req.buf + req->req.actual;
1004 +
1005 + if(!req_bufferspace)
1006 + FATAL_ERROR("zlp");
1007 +
1008 + if(byte_count > req_bufferspace)
1009 + FATAL_ERROR("buffer overflow, byte_count=%d, req->req.length=%d, req->req.actual=%d\n", byte_count, req->req.length ,req->req.actual);
1010 +
1011 + count = min(byte_count, req_bufferspace);
1012 +
1013 + //test, Access by CPU
1014 + if(dma)
1015 + usb_write(FIFOCTRL, 0x80);
1016 +
1017 + for (i = 0; i < count; i++){
1018 + *buf = usb_read(EP0OUTDAT+i);
1019 + buf++;
1020 + }
1021 + req->req.actual += count;
1022 +
1023 + //test, Access by DMA
1024 + if(dma)
1025 + usb_write(FIFOCTRL, 0x00);
1026 +
1027 + return count;
1028 +}
1029 +
1030 +
1031 +static int read_ep_fifo(struct rt_ep_struct *rt_ep, struct rt_request *req)
1032 +{
1033 + u8 *buf, ep_no, ep_no_shift;
1034 + int byte_count, req_bufferspace, count, i;
1035 +
1036 +DBG;
1037 + ep_no = EP_NO(rt_ep);
1038 +
1039 + byte_count = read_outbc(ep_no);
1040 + if(unlikely(!byte_count))
1041 + FATAL_ERROR("ep_no:%d bc = 0", ep_no);
1042 +
1043 + req_bufferspace = req->req.length - req->req.actual;
1044 +
1045 + buf = req->req.buf + req->req.actual;
1046 +
1047 + if(unlikely(!req_bufferspace))
1048 + FATAL_ERROR("zlp");
1049 +
1050 + xprintk("bc=%d,r.l=%d,r.a=%d\n", byte_count, req->req.length ,req->req.actual);
1051 + if(unlikely(byte_count > req_bufferspace))
1052 + FATAL_ERROR("buffer overflow, byte_count=%d, req->req.length=%d, req->req.actual=%d\n", byte_count, req->req.length ,req->req.actual);
1053 +
1054 + count = min(byte_count, req_bufferspace);
1055 +
1056 + ep_no_shift = 0x80+ep_no * 4;
1057 + for (i = 0; i < count; i++){
1058 + *buf = usb_read(ep_no_shift);
1059 + buf++;
1060 + }
1061 +
1062 + req->req.actual += count;
1063 +
1064 + // EP Out irq handler would arm another transaction.
1065 + return count;
1066 +}
1067 +
1068 +static int write_ep_fifo_zlp(struct rt_ep_struct *rt_ep)
1069 +{
1070 + u8 epcs;
1071 + int ep_no = EP_NO(rt_ep);
1072 +
1073 +DBG;
1074 + xprintk("w%d ZLP\n", EP_NO(rt_ep));
1075 + epcs = read_epcs(rt_ep);
1076 + if(epcs & EP_CS_BSY)
1077 + FATAL_ERROR("EP%d busy. cs=%x\n", ep_no, epcs);
1078 +
1079 + /* check INEP byte count is zero? */
1080 + if(read_inbc(ep_no))
1081 + FATAL_ERROR("EP%d bc zero. bc=%d\n", ep_no, read_inbc(ep_no));
1082 +
1083 + epcs = read_epcs(rt_ep);
1084 + write_epcs(rt_ep, epcs);
1085 + return 0;
1086 +}
1087 +
1088 +
1089 +/*
1090 + * handle_epinirq()
1091 +*/
1092 +static int write_ep_fifo(struct rt_ep_struct *rt_ep, struct rt_request *req)
1093 +{
1094 + u8 *buf, epcs;
1095 + int length, i, ep_no = EP_NO(rt_ep);
1096 +
1097 +DBG;
1098 + xprintk("w ep%d req=%p,r.l=%d,r.a=%d\n",EP_NO(rt_ep),&req->req,req->req.length,req->req.actual);
1099 + epcs = read_epcs(rt_ep);
1100 + if(epcs & EP_CS_BSY)
1101 + FATAL_ERROR("EP%d busy. epcs=%x\n", ep_no, epcs);
1102 +
1103 + /* check INEP byte count is zero? */
1104 + if(read_inbc(ep_no))
1105 + FATAL_ERROR("EP%d bc=%d\n", ep_no, read_inbc(ep_no));
1106 +
1107 + buf = req->req.buf + req->req.actual;
1108 + length = (req->req.length - req->req.actual) < rt_ep->ep.maxpacket ? (req->req.length - req->req.actual) : rt_ep->ep.maxpacket;
1109 + req->req.actual += length;
1110 + if (!length) { /* zlp */
1111 + // for debug
1112 + xprintk("<%s> zero packet\n", __func__);
1113 + write_ep_fifo_zlp(rt_ep);
1114 + return 0;
1115 + }
1116 +
1117 + // write to ep in fifo
1118 + for (i=0; i< length; i++)
1119 + usb_write(0x80+ep_no*4, *buf++);
1120 +
1121 + epcs = read_epcs(rt_ep);
1122 + write_epcs(rt_ep, epcs);
1123 +
1124 + return length;
1125 +}
1126 +
1127 +/*
1128 + *
1129 + */
1130 +static int write_ep0_fifo(struct rt_ep_struct *rt_ep, struct rt_request *req)
1131 +{
1132 + u8 *buf;
1133 + int length, i;
1134 + u32 maxpacket;
1135 +
1136 +DBG;
1137 + xprintk("q.l=%d, q.a=%d, maxp=%d\n", req->req.length, req->req.actual, rt_ep->ep.maxpacket);
1138 +
1139 + buf = req->req.buf + req->req.actual;
1140 + maxpacket = (u32)(rt_ep->ep.maxpacket);
1141 + length = min(req->req.length - req->req.actual, maxpacket);
1142 +
1143 + req->req.actual += length;
1144 +
1145 + if (!length && req->req.zero)
1146 + FATAL_ERROR("zlp");
1147 +
1148 + if(!in_irq())
1149 + FATAL_ERROR("Not in irq context");
1150 +
1151 + //test, Access by CPU
1152 + if(dma)
1153 + usb_write(FIFOCTRL, 0x80);
1154 +
1155 + //write to ep0in fifo
1156 + for (i=0; i< length; i++)
1157 + usb_write(EP0INDAT+i, *buf++);
1158 +
1159 + // arm ep0in
1160 + usb_write(IN0BC, length);
1161 + if(length != rt_ep->ep.maxpacket)
1162 + usb_write(EP0CS, 0x2); // clear NAK bit to ACK host.
1163 +
1164 + //test, Access by CPU
1165 + if(dma)
1166 + usb_write(FIFOCTRL, 0x00);
1167 +
1168 + return length;
1169 +}
1170 +
1171 +static struct rt_request *get_unhandled_req(struct rt_ep_struct *rt_ep)
1172 +{
1173 + struct list_head *p;
1174 + struct rt_request *req = NULL;
1175 +
1176 + if(EP_DIR(rt_ep) == EP_OUT)
1177 + FATAL_ERROR("Out EP");
1178 +
1179 + if(dma){
1180 + list_for_each(p, &rt_ep->queue){
1181 + req = list_entry(p, struct rt_request, queue);
1182 + if(req->req.length > req->req.actual )
1183 + return req;
1184 + else if(unlikely(req->req.length == 0 && req->zlp_dma_done == 0))
1185 + return req;
1186 + else
1187 + continue;
1188 + }
1189 + return NULL;
1190 + }else{
1191 + if (!list_empty(&rt_ep->queue)){
1192 + req = list_entry(rt_ep->queue.next, struct rt_request, queue);
1193 + }else {
1194 + FATAL_ERROR("%s No request", rt_ep->ep.name);
1195 + }
1196 + return req;
1197 + }
1198 +}
1199 +
1200 +#define PADDING_LENGTH 64
1201 +static int write_dma_txring(struct rt_ep_struct *rt_ep,struct rt_request *req)
1202 +{
1203 + u8 *buf;
1204 + int length;
1205 + int retry_times = 0;
1206 + u32 hw_current_idx;
1207 +DBG;
1208 + xprintk("w%dr=%p,r.l=%d,r.a=%d\n", EP_NO(rt_ep), &req->req,req->req.length,req->req.actual);
1209 +
1210 + length = req->req.length;
1211 +
1212 + while(length > 0 || (req->req.length == 0 && req->zlp_dma_done == 0)){
1213 +retry:
1214 + /* wait for a free TXD */
1215 + hw_current_idx = reg_read(RTUSB_TX_DTX_IDX0);
1216 + if ( tx_ring0_cache[tx_cpu_owner_idx0].txd_info2.DDONE_bit == 0 ||
1217 + ((tx_cpu_owner_idx0+1) % NUM_TX_DESC == hw_current_idx) ) {
1218 + if(retry_times > 1000)
1219 + return -1;
1220 + mdelay(1);
1221 + retry_times++;
1222 + goto retry;
1223 + }
1224 +
1225 + if(length > TXMAXCAP)
1226 + length = TXMAXCAP;
1227 +
1228 + buf = req->req.buf + req->req.actual;
1229 + req->req.actual += length;
1230 +
1231 + /* deal with ZLP.*/
1232 + if(req->req.length == 0 && req->zlp_dma_done == 0)
1233 + req->zlp_dma_done = 1;
1234 +
1235 + req->txd_count++;
1236 +
1237 +#define phys_to_bus(a) ((u32)a & 0x1FFFFFFF)
1238 + if(length){
1239 + tx_ring0_cache[tx_cpu_owner_idx0].txd_info1.SDP0 = cpu_to_le32(phys_to_bus(buf));
1240 + tx_ring0_cache[tx_cpu_owner_idx0].txd_info2.SDL0 = cpu_to_le32(length);
1241 + tx_ring0_cache[tx_cpu_owner_idx0].txd_info4.zlp_flag = 0;
1242 + dma_cache_sync(NULL, (void *)buf, length, DMA_TO_DEVICE);
1243 + }else{
1244 + tx_ring0_cache[tx_cpu_owner_idx0].txd_info1.SDP0 = cpu_to_le32(phys_to_bus(tx_zlp_dummy_buf));
1245 + tx_ring0_cache[tx_cpu_owner_idx0].txd_info2.SDL0 = cpu_to_le32(sizeof(tx_zlp_dummy_buf));
1246 + tx_ring0_cache[tx_cpu_owner_idx0].txd_info4.zlp_flag = 1;
1247 + }
1248 +
1249 + tx_ring0_cache[tx_cpu_owner_idx0].txd_info4.In_ep_addr = cpu_to_le32(EP_NO(rt_ep));
1250 + tx_ring0_cache[tx_cpu_owner_idx0].txd_info2.DDONE_bit = 0;
1251 + tx_cpu_owner_idx0 = (tx_cpu_owner_idx0 + 1) % NUM_TX_DESC;
1252 +
1253 + length = req->req.length - req->req.actual;
1254 + }
1255 +
1256 + reg_write(RTUSB_TX_CTX_IDX0, tx_cpu_owner_idx0);
1257 +
1258 + return 0;
1259 +}
1260 +
1261 +
1262 +/*******************************************************************************
1263 + * Endpoint handlers
1264 + *******************************************************************************
1265 + */
1266 +
1267 +/*
1268 + * Handle In Endpoint
1269 + * CPU(FIFO):
1270 + * Enqueue -> Write fifo -> TX_DONE -> Write fifo -> TX_DONE -> ..
1271 + *
1272 + * DMA
1273 + * Enqueue -> Kick off TxD. Enqueue -> Kick off TxD. Enqueue -> Kick off TxD.
1274 + */
1275 +static int handle_inep(struct rt_ep_struct *rt_ep)
1276 +{
1277 + struct rt_request *req;
1278 +
1279 +DBG;
1280 + if(!(req = get_unhandled_req(rt_ep)))
1281 + return -1;
1282 +
1283 + if(dma){
1284 + write_dma_txring(rt_ep, req);
1285 + }else{
1286 + write_ep_fifo(rt_ep, req);
1287 + rt_ep->tx_done_count = 1;
1288 + }
1289 + return 0;
1290 +}
1291 +
1292 +/*
1293 + * IRQ context.
1294 + */
1295 +static struct rt_request *handle_outep(struct rt_ep_struct *rt_ep)
1296 +{
1297 + struct rt_request *req;
1298 + struct list_head *p;
1299 + int count = 0;
1300 +
1301 +DBG;
1302 + if (list_empty(&rt_ep->queue)){
1303 + return NULL;
1304 + }
1305 +
1306 + list_for_each(p, &rt_ep->queue){
1307 + if(count != rt_ep->rx_done_count){
1308 + count++;
1309 + continue;
1310 + }
1311 + req = list_entry(p, struct rt_request, queue);
1312 + read_ep_fifo(rt_ep, req);
1313 + return req;
1314 + }
1315 +
1316 + return NULL;
1317 +}
1318 +
1319 +static struct rt_request *handle_inep0(struct rt_ep_struct *rt_ep)
1320 +{
1321 + struct rt_request *req = NULL;
1322 +
1323 +DBG;
1324 + if (list_empty(&rt_ep->queue)) {
1325 + D_ERR(rt_ep->rt_usb->dev, "<%s> no request on %s\n", __func__, rt_ep->ep.name);
1326 + return NULL;
1327 + }
1328 +
1329 + req = list_entry(rt_ep->queue.next, struct rt_request, queue);
1330 + switch (rt_ep->rt_usb->ep0state) {
1331 + case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR */
1332 + write_ep0_fifo(rt_ep, req);
1333 + break;
1334 +
1335 + // Impossible:
1336 + //case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR */
1337 + //case EP0_NO_DATA_PHASE: /* for no data stage control transfer */
1338 +
1339 + default:
1340 + D_ERR(rt_ep->rt_usb->dev, "<%s> ep0 i/o, odd state %d\n", __func__, rt_ep->rt_usb->ep0state);
1341 + ep_del_request(rt_ep, req);
1342 + req = NULL;
1343 + break;
1344 + }
1345 +
1346 + return req;
1347 +}
1348 +
1349 +static struct rt_request *handle_outep0(struct rt_ep_struct *rt_ep)
1350 +{
1351 + struct rt_request *req = NULL;
1352 +
1353 +DBG;
1354 + if (list_empty(&rt_ep->queue)) {
1355 + D_ERR(rt_ep->rt_usb->dev, "<%s> no request on %s\n", __func__, rt_ep->ep.name);
1356 + return NULL;
1357 + }
1358 +
1359 + if(rt_ep->rt_usb->ep0state != EP0_OUT_DATA_PHASE){
1360 + D_EP0(rt_ep->rt_usb->dev, "<%s> ep0 i/o, odd state %d\n", __func__, rt_ep->rt_usb->ep0state);
1361 + ep_del_request(rt_ep, req);
1362 + req = NULL;
1363 + }
1364 +
1365 + req = list_entry(rt_ep->queue.next, struct rt_request, queue);
1366 +
1367 + read_ep0_fifo(rt_ep, req);
1368 +
1369 + return req;
1370 +}
1371 +
1372 +/*******************************************************************************
1373 + * USB gadget callback functions
1374 + *******************************************************************************
1375 + */
1376 +static void handle_dma_rxdone(struct rt_udc_struct *rt_usb)
1377 +{
1378 + DBG;
1379 + tasklet_schedule(&rx_dma_tasklet);
1380 +}
1381 +
1382 +static void handle_dma_txdone(struct rt_udc_struct *rt_usb)
1383 +{
1384 + DBG;
1385 + tasklet_schedule(&tx_dma_tasklet);
1386 +}
1387 +
1388 +static void handle_dmairq(struct rt_udc_struct *rt_usb, u32 irq)
1389 +{
1390 + if(irq & RTUSB_RX_DONE_INT0){
1391 + handle_dma_rxdone(rt_usb);
1392 + }
1393 +
1394 + if(irq & RTUSB_TX_DONE_INT0){
1395 + handle_dma_txdone(rt_usb);
1396 + }
1397 +
1398 + reg_write(RTUSB_INT_STATUS, irq);
1399 +}
1400 +
1401 +static inline int udc_dma_reset_txring(void)
1402 +{
1403 + int count = 0;
1404 + u32 reg;
1405 +
1406 + while(count++< RING_RESET_TIMEOUT){
1407 + reg = reg_read(RTUSB_PDMA_GLO_CFG);
1408 + if(reg & RTUSB_TX_DMA_BUSY){
1409 + mdelay(1);
1410 + }else
1411 + break;
1412 +
1413 + }
1414 + if(count== RING_RESET_TIMEOUT)
1415 + return -1;
1416 +
1417 + reg = reg_read(RTUSB_PDMA_RST_IDX);
1418 + udelay(100);
1419 + reg |= (RTUSB_RST_DTX_IDX1 | RTUSB_RST_DTX_IDX0);
1420 + reg_write(RTUSB_PDMA_RST_IDX, reg);
1421 + udelay(100);
1422 + return 0;
1423 +}
1424 +
1425 +static inline int udc_dma_reset_rxring(void)
1426 +{
1427 + int count = 0;
1428 + u32 reg;
1429 +
1430 + while(count++< RING_RESET_TIMEOUT){
1431 + reg = reg_read(RTUSB_PDMA_GLO_CFG);
1432 + if(reg & RTUSB_RX_DMA_BUSY){
1433 + mdelay(1);
1434 + }else
1435 + break;
1436 + }
1437 + if(count== RING_RESET_TIMEOUT)
1438 + return -1;
1439 +
1440 + reg = reg_read(RTUSB_PDMA_RST_IDX);
1441 + udelay(100);
1442 + reg |= (RTUSB_RST_DRX_IDX1 | RTUSB_RST_DRX_IDX0);
1443 + reg_write(RTUSB_PDMA_RST_IDX, reg);
1444 + udelay(100);\
1445 + return 0;
1446 +}
1447 +
1448 +static int udc_dma_hw_reset(void)
1449 +{
1450 + if(udc_dma_reset_rxring() == -1)
1451 + return -1;
1452 + if(udc_dma_reset_txring() == -1)
1453 + return -1;
1454 + return 0;
1455 +}
1456 +
1457 +static void udc_dma_enable(int enable)
1458 +{
1459 + u32 reg;
1460 + reg = reg_read(RTUSB_PDMA_GLO_CFG);
1461 + udelay(100);
1462 + if(enable)
1463 + reg |= RTUSB_TX_WB_DDONE | RTUSB_RX_DMA_EN | RTUSB_TX_DMA_EN ;
1464 + else
1465 + reg &= ~(RTUSB_TX_WB_DDONE | RTUSB_RX_DMA_EN | RTUSB_TX_DMA_EN) ;
1466 + reg_write(RTUSB_PDMA_GLO_CFG, reg);
1467 + udelay(500);
1468 +}
1469 +
1470 +static void udc_dma_int_enable(int enable)
1471 +{
1472 + u32 reg;
1473 + reg = reg_read(RTUSB_INT_MASK);
1474 + udelay(100);
1475 + if(enable)
1476 + reg |= RTUSB_RX_DONE_INT_MSK0 | RTUSB_TX_DONE_INT_MSK0 ;
1477 + else
1478 + reg &= ~(RTUSB_RX_DONE_INT_MSK0 | RTUSB_TX_DONE_INT_MSK0) ;
1479 + reg_write(RTUSB_INT_MASK, reg);
1480 + udelay(100);
1481 +}
1482 +
1483 +static inline void udc_dma_tx_int_clear(void)
1484 +{
1485 + reg_write(RTUSB_INT_STATUS, 0x0000000F);
1486 +}
1487 +
1488 +static inline void udc_dma_rx_int_clear(void)
1489 +{
1490 + reg_write(RTUSB_INT_STATUS, 0x00030000);
1491 +}
1492 +
1493 +static inline void udc_dma_all_int_clear(void)
1494 +{
1495 + reg_write(RTUSB_INT_STATUS, 0xFFFFFFFF);
1496 +}
1497 +
1498 +static int copy_data_to_ep(void *src, int length, int ep_num)
1499 +{
1500 + struct rt_ep_struct *rt_ep;
1501 + struct rt_udc_struct *rt_usb = &controller;
1502 + struct rt_request *req;
1503 + int req_bufferspace, count;
1504 + u8 *buf;
1505 +
1506 + DBG;
1507 + rt_ep = &rt_usb->rt_ep[ep_num+IN_EP_NUM];
1508 +
1509 + if (list_empty(&rt_ep->queue)){
1510 + /* It is safe to return 0 if no req queued. */
1511 + return 0;
1512 + }
1513 +
1514 + req = list_entry(rt_ep->queue.next, struct rt_request, queue);
1515 + req_bufferspace = req->req.length - req->req.actual;
1516 +
1517 + if(unlikely(!req_bufferspace)){
1518 + // for debug
1519 + FATAL_ERROR("zlp");
1520 + return -1;
1521 + }
1522 +
1523 + if(length > req_bufferspace){
1524 + FATAL_ERROR("buffer overflow");
1525 + return -1;
1526 + }
1527 +
1528 + // sync with cache.
1529 + if(likely(length))
1530 + dma_cache_sync(NULL, src, length, DMA_FROM_DEVICE);
1531 +
1532 + buf = req->req.buf + req->req.actual;
1533 + count = min(length, req_bufferspace);
1534 + memcpy(buf, src, count);
1535 +
1536 + req->req.actual += count;
1537 +
1538 + if((req->req.actual % rt_ep->ep.maxpacket) || (req->req.actual >= req->req.length)){
1539 + done(rt_ep, req, 0); // short packet indicates transaction is done.
1540 + }
1541 + return count;
1542 +}
1543 +
1544 +static void rx_dma_done_do_tasklet(unsigned long arg)
1545 +{
1546 + u32 *rxd_info;
1547 + u32 length;
1548 + int ep, rc;
1549 + int processed_count=0;
1550 +
1551 + DBG;
1552 + for (;;){
1553 + if (rx_ring0_cache[rx_dma_owner_idx0].rxd_info2.DDONE_bit == 0)
1554 + break;
1555 +
1556 + if(processed_count++ > RX_RESCHEDULE){
1557 + tasklet_schedule(&rx_dma_tasklet);
1558 + break;
1559 + }
1560 +
1561 + length = rx_ring0_cache[rx_dma_owner_idx0].rxd_info4.Rx_bcnt;
1562 + ep = rx_ring0_cache[rx_dma_owner_idx0].rxd_info4.Out_ep_addr;
1563 +
1564 + // copy data from RXD->buffer to ep queue.
1565 + rc = copy_data_to_ep((void *)USBRxPackets[rx_dma_owner_idx0], length, ep);
1566 + if(rc <= 0)
1567 + return;
1568 +
1569 + rxd_info = (u32 *)&rx_ring0_cache[rx_dma_owner_idx0].rxd_info4;
1570 + *rxd_info = 0;
1571 +
1572 + /* clear DDONE bit*/
1573 + rxd_info = (u32 *)&rx_ring0_cache[rx_dma_owner_idx0].rxd_info2;
1574 + *rxd_info = 0;
1575 + //rx_ring0_cache[rx_dma_owner_idx0].rxd_info2.DDONE_bit = 0;
1576 + //rx_ring0_cache[i].rxd_info2.LS0= 0;
1577 + rx_ring0_cache[rx_dma_owner_idx0].rxd_info2.PLEN0= sizeof(u8) * RX_BUFF_SZ;
1578 +
1579 + /* Move point to next RXD which wants to alloc */
1580 + //OUTL(cpu_to_le32((u32) rx_dma_owner_idx0), RTUSB_RX_CALC_IDX0);
1581 + reg_write(RTUSB_RX_CALC_IDX0, rx_dma_owner_idx0);
1582 +
1583 + /* Update to Next packet point that was received.
1584 + */
1585 + rx_dma_owner_idx0 = (rx_dma_owner_idx0 + 1) % NUM_RX_DESC;
1586 + }
1587 +}
1588 +
1589 +/*
1590 + * Recycle reqs and call gadget complete callback function.
1591 + */
1592 +static void tx_dma_done_do_tasklet(unsigned long arg)
1593 +{
1594 + int ep_num;
1595 + u32 hw_current;
1596 + struct rt_ep_struct *rt_ep;
1597 + struct rt_request *rt_req;
1598 + struct rt_udc_struct *rt_usb = &controller;
1599 +
1600 + DBG;
1601 + while(tx_need_free_idx0 != (hw_current = reg_read(RTUSB_TX_DTX_IDX0))){
1602 + int retry = 0;
1603 + while(tx_ring0_cache[tx_need_free_idx0].txd_info2.DDONE_bit != 1){
1604 + mdelay(1);
1605 + retry++;
1606 + if(retry > 1000)
1607 + FATAL_ERROR("tx timeout");
1608 + }
1609 +
1610 + // rt_ep = tx_ring0_req_mapping[tx_need_free_idx0];
1611 + ep_num = tx_ring0_cache[tx_need_free_idx0].txd_info4.In_ep_addr;
1612 + if(!ep_num || ep_num > IN_EP_NUM)
1613 + FATAL_ERROR("Out of range");
1614 +
1615 + rt_ep = &rt_usb->rt_ep[ep_num];
1616 + if(list_empty(&rt_ep->queue))
1617 + FATAL_ERROR("ep[%d] No request", ep_num);
1618 +
1619 + rt_req = list_entry(rt_ep->queue.next, struct rt_request, queue);
1620 + rt_req->txd_count--;
1621 +
1622 +
1623 + if(rt_req->txd_count == 0)
1624 + done(rt_ep, rt_req, 0);
1625 +
1626 + tx_need_free_idx0 = (tx_need_free_idx0 + 1) % NUM_TX_DESC;
1627 +
1628 + }
1629 +}
1630 +
1631 +static int udc_dma_rst(void)
1632 +{
1633 + if( udc_dma_reset_txring() == -1)
1634 + return -1;
1635 + if( udc_dma_reset_rxring() == -1)
1636 + return -1;
1637 +
1638 + tx_cpu_owner_idx0 = 0;
1639 + tx_need_free_idx0 = 0;
1640 + rx_dma_owner_idx0 = 0;
1641 + reg_write(RTUSB_RX_CALC_IDX0, cpu_to_le32(NUM_RX_DESC - 1));
1642 + return 0;
1643 +}
1644 +
1645 +static int rt_udc_dma_init(void)
1646 +{
1647 + int i;
1648 +
1649 + if( udc_dma_hw_reset() == -1)
1650 + return -1;
1651 +
1652 + for(i=0; i<NUM_RX_DESC; i++){
1653 + USBRxPackets[i] = kmalloc(sizeof(u8) * RX_BUFF_SZ, GFP_ATOMIC | GFP_DMA); // todo: use GFP_KERNEL instead.
1654 + if(!USBRxPackets[i]){
1655 + for(i=i-1; i>=0; i--)
1656 + kfree((void *)USBRxPackets[i]);
1657 + printk("No mem.");
1658 + return -1;
1659 + }
1660 + }
1661 +
1662 + tx_ring0_cache = dma_alloc_coherent(NULL, sizeof(struct PDMA_txdesc) * NUM_TX_DESC, &tx_ring_bus_addr, GFP_KERNEL);
1663 + rx_ring0_cache = dma_alloc_coherent(NULL, sizeof(struct PDMA_rxdesc) * NUM_RX_DESC, &rx_ring_bus_addr, GFP_KERNEL);
1664 +
1665 + printk("USB PDMA mode enabled.\n");
1666 + printk("tx_ring=%p\n", tx_ring0_cache);
1667 + printk("rx_ring=%p\n", rx_ring0_cache);
1668 +
1669 + tx_ring0_noncache = tx_ring0_cache;
1670 + rx_ring0_noncache = rx_ring0_cache;
1671 +
1672 + for(i=0; i < NUM_RX_DESC; i++){
1673 + memset((void *)&rx_ring0_noncache[i], 0, 16 /* sizeof()*/);
1674 + rx_ring0_noncache[i].rxd_info2.DDONE_bit = 0;
1675 + rx_ring0_noncache[i].rxd_info2.LS0= 0;
1676 + rx_ring0_noncache[i].rxd_info2.PLEN0= sizeof(u8) * RX_BUFF_SZ;
1677 + rx_ring0_noncache[i].rxd_info1.PDP0 = dma_map_single(NULL, (void *)USBRxPackets[i], sizeof(u8) * RX_BUFF_SZ, DMA_FROM_DEVICE);
1678 + }
1679 +
1680 + for (i=0; i < NUM_TX_DESC; i++) {
1681 + memset((void *)&tx_ring0_noncache[i],0, 16 /* sizeof()*/);
1682 + tx_ring0_noncache[i].txd_info2.LS0_bit = 1;
1683 + tx_ring0_noncache[i].txd_info2.DDONE_bit = 1;
1684 + // we would map dma buffer dynamically in IRQ handler & ep_queue();
1685 + }
1686 +
1687 + rx_dma_owner_idx0 = 0;
1688 + tx_cpu_owner_idx0 = 0;
1689 + tx_need_free_idx0 = 0;
1690 +
1691 + /* initial UDMA register */
1692 + //OUTL(cpu_to_le32((u32) UDMA_Init_Setting), RTUSB_UDMA_CTRL);
1693 +
1694 + if(sm){
1695 + printk("Storage mode enabled.\n");
1696 + reg_write(RTUSB_UDMA_CTRL, 0x3F000063); /* enable storage mode */
1697 + }else
1698 + reg_write(RTUSB_UDMA_CTRL, 0x3F000003);
1699 +
1700 +
1701 + /* Tell the adapter where the TX/RX rings are located. */
1702 + //OUTL(phys_to_bus((u32) &rx_ring[0]), RTUSB_RX_BASE_PTR0);
1703 + reg_write(RTUSB_RX_BASE_PTR0, rx_ring_bus_addr);
1704 +
1705 + //OUTL(phys_to_bus((u32) &tx_ring0[0]), RTUSB_TX_BASE_PTR0);
1706 + reg_write(RTUSB_TX_BASE_PTR0, tx_ring_bus_addr);
1707 +
1708 + //OUTL(cpu_to_le32((u32) NUM_RX_DESC), RTUSB_RX_MAX_CNT0);
1709 + //OUTL(cpu_to_le32((u32) NUM_TX_DESC), RTUSB_TX_MAX_CNT0);
1710 + reg_write(RTUSB_RX_MAX_CNT0, cpu_to_le32(NUM_RX_DESC));
1711 + reg_write(RTUSB_TX_MAX_CNT0, cpu_to_le32(NUM_TX_DESC));
1712 +
1713 + //OUTL(cpu_to_le32((u32) tx_cpu_owner_idx0), RTUSB_TX_CTX_IDX0);
1714 + //OUTL(cpu_to_le32((u32) (NUM_RX_DESC - 1)), RTUSB_RX_CALC_IDX0);
1715 + reg_write(RTUSB_TX_CTX_IDX0, cpu_to_le32(tx_cpu_owner_idx0));
1716 + reg_write(RTUSB_RX_CALC_IDX0, cpu_to_le32(NUM_RX_DESC - 1));
1717 +
1718 + udelay(500);
1719 + return 0;
1720 +}
1721 +
1722 +static int udc_dma_fini(void)
1723 +{
1724 + int i;
1725 + u32 len;
1726 + dma_addr_t addr;
1727 +
1728 + udc_dma_enable(false);
1729 + udc_dma_int_enable(false);
1730 +
1731 + /* restore UDMA register */
1732 + reg_write(RTUSB_UDMA_CTRL, 0x0);
1733 +
1734 + // unmap & free RX buffer
1735 + for(i=0; i<NUM_RX_DESC; i++){
1736 + addr = rx_ring0_noncache[i].rxd_info1.PDP0;
1737 + if(addr)
1738 + dma_unmap_single(NULL, addr, sizeof(u8) * RX_BUFF_SZ, DMA_FROM_DEVICE);
1739 + kfree((void *)USBRxPackets[i]);
1740 + }
1741 +
1742 + // unmap Tx buffer only(but not free it)
1743 + for(i=0; i<NUM_TX_DESC; i++){
1744 + addr = tx_ring0_noncache[i].txd_info1.SDP0;
1745 + if(addr){
1746 + len = tx_ring0_noncache[i].txd_info2.SDL0;
1747 + dma_unmap_single(NULL, addr, sizeof(u8) * len, DMA_TO_DEVICE);
1748 + }
1749 + }
1750 +
1751 + dma_free_coherent(NULL, sizeof(struct PDMA_txdesc) * NUM_TX_DESC, tx_ring0_cache, tx_ring_bus_addr);
1752 + dma_free_coherent(NULL, sizeof(struct PDMA_rxdesc) * NUM_RX_DESC, rx_ring0_cache, rx_ring_bus_addr);
1753 +
1754 + return 0;
1755 +}
1756 +
1757 +static int rt_ep_enable(struct usb_ep *usb_ep, const struct usb_endpoint_descriptor *desc)
1758 +{
1759 + struct rt_ep_struct *rt_ep = container_of(usb_ep, struct rt_ep_struct, ep);
1760 + struct rt_udc_struct *rt_usb = rt_ep->rt_usb;
1761 + unsigned long flags;
1762 +
1763 + DBG;
1764 +
1765 + if (!usb_ep || !desc || !EP_NO(rt_ep) || desc->bDescriptorType != USB_DT_ENDPOINT || rt_ep->bEndpointAddress != desc->bEndpointAddress) {
1766 + D_ERR(rt_usb->dev, "<%s> bad ep or descriptor\n", __func__);
1767 + return -EINVAL;
1768 + }
1769 + if (rt_ep->bmAttributes != desc->bmAttributes) {
1770 + D_ERR(rt_usb->dev, "<%s> %s type mismatch, 0x%x, 0x%x\n", __func__, usb_ep->name, rt_ep->bmAttributes, desc->bmAttributes);
1771 + return -EINVAL;
1772 + }
1773 + if (!rt_usb->driver || rt_usb->gadget.speed == USB_SPEED_UNKNOWN) {
1774 + D_ERR(rt_usb->dev, "<%s> bogus device state\n", __func__);
1775 + return -ESHUTDOWN;
1776 + }
1777 + local_irq_save(flags);
1778 + rt_ep->stopped = 0;
1779 + if(dma){
1780 + //rt_ep_irq_enable(rt_ep);
1781 + }else
1782 + rt_ep_irq_enable(rt_ep);
1783 + local_irq_restore(flags);
1784 +
1785 + xprintk("<%s> ENABLED %s\n", __func__, usb_ep->name);
1786 + return 0;
1787 +}
1788 +
1789 +static int rt_ep_disable(struct usb_ep *usb_ep)
1790 +{
1791 + struct rt_ep_struct *rt_ep = container_of(usb_ep, struct rt_ep_struct, ep);
1792 + unsigned long flags;
1793 +
1794 +DBG;
1795 + if (!usb_ep || !EP_NO(rt_ep) /* || !list_empty(&rt_ep->queue) */) {
1796 + D_ERR(rt_ep->rt_usb->dev, "<%s> %s can not be disabled\n", __func__, usb_ep ? rt_ep->ep.name : NULL);
1797 + return -EINVAL;
1798 + }
1799 +
1800 + local_irq_save(flags);
1801 + rt_ep->stopped = 1;
1802 + nuke(rt_ep, -ESHUTDOWN);
1803 + rt_flush(rt_ep);
1804 + rt_ep_irq_disable(rt_ep);
1805 +
1806 + local_irq_restore(flags);
1807 +
1808 + xprintk("<%s> DISABLED %s\n", __func__, usb_ep->name);
1809 + return 0;
1810 +}
1811 +
1812 +static struct usb_request *rt_ep_alloc_request (struct usb_ep *usb_ep, gfp_t gfp_flags)
1813 +{
1814 + struct rt_request *req;
1815 +
1816 + DBG;
1817 + req = kzalloc(sizeof *req, gfp_flags);
1818 + if (!req || !usb_ep)
1819 + return 0;
1820 +
1821 + INIT_LIST_HEAD(&req->queue);
1822 + req->in_use = 0;
1823 + return &req->req;
1824 +}
1825 +
1826 +static void rt_ep_free_request(struct usb_ep *usb_ep, struct usb_request *usb_req)
1827 +{
1828 + struct rt_request *req;
1829 +
1830 + DBG;
1831 + req = container_of(usb_req, struct rt_request, req);
1832 + WARN_ON(!list_empty(&req->queue));
1833 + kfree(req);
1834 +}
1835 +
1836 +/*
1837 + * Two cases :
1838 + * 1) UDC TX (IN EPs)
1839 + * enqueue req -> handle_ep() -> write fifo -> TX_DONE -> handle_ep() -> write next fifo -> TX_DONE...
1840 + *
1841 + * 2) UDC RX (OUT EPs)
1842 + * enqueue req -> RX_DONE -> handle_ep() -> read_fifo -> RX_DONE -> handle_ep() -> read fifo...
1843 + */
1844 +static int rt_ep_queue(struct usb_ep *usb_ep, struct usb_request *req, gfp_t gfp_flags)
1845 +{
1846 + struct rt_ep_struct *rt_ep;
1847 + struct rt_udc_struct *rt_usb;
1848 + struct rt_request *rt_req;
1849 + unsigned long flags;
1850 + int ret = 0;
1851 + int handle_right_now = 0;
1852 +
1853 + rt_ep = container_of(usb_ep, struct rt_ep_struct, ep);
1854 + rt_usb = rt_ep->rt_usb;
1855 + rt_req = container_of(req, struct rt_request, req);
1856 + rt_req->rt_ep = rt_ep;
1857 +
1858 + if (rt_usb->set_config && !EP_NO(rt_ep)) {
1859 + rt_usb->set_config = 0;
1860 + D_ERR(rt_usb->dev, "<%s> gadget reply set config\n", __func__);
1861 + return 0;
1862 + }
1863 +
1864 + if (unlikely(!req || !rt_req || !req->complete || !req->buf)) {
1865 + D_ERR(rt_usb->dev, "<%s> bad params\n", __func__);
1866 + return -EINVAL;
1867 + }
1868 +
1869 + if (unlikely(!usb_ep || !rt_ep)) {
1870 + D_ERR(rt_usb->dev, "<%s> bad ep\n", __func__);
1871 + return -EINVAL;
1872 + }
1873 +
1874 + if (!rt_usb->driver || rt_usb->gadget.speed == USB_SPEED_UNKNOWN) {
1875 + D_ERR(rt_usb->dev, "<%s> bogus device state\n", __func__);
1876 + return -ESHUTDOWN;
1877 + }
1878 +
1879 + /* debug */
1880 + xprintk("<eq> ep%d%s %p %dB\n", EP_NO(rt_ep), ((!EP_NO(rt_ep) && rt_ep->rt_usb->ep0state == EP0_IN_DATA_PHASE) || (EP_NO(rt_ep) && EP_DIR(rt_ep) == EP_IN )) ? "IN" : "OUT", &rt_req->req, req->length);
1881 +
1882 + if (rt_ep->stopped) {
1883 + printk("EP%d -> stopped.\n", EP_NO(rt_ep));
1884 + req->status = -ESHUTDOWN;
1885 + return -ESHUTDOWN;
1886 + }
1887 +
1888 + if (rt_req->in_use) {
1889 + D_ERR(rt_usb->dev, "<%s> refusing to queue req %p (already queued)\n", __func__, req);
1890 + return -1;
1891 + }
1892 +
1893 + local_irq_save(flags);
1894 + /*
1895 + * handle No-data Ctrl transfer.
1896 + */
1897 + if(!EP_NO(rt_ep)/* EP0 */ && EP_DIR(rt_ep) == EP_OUT && !req->length){
1898 + done(rt_ep, rt_req, 0);
1899 + local_irq_restore(flags);
1900 + return ret;
1901 + }
1902 +
1903 + req->status = -EINPROGRESS;
1904 + req->actual = 0;
1905 +
1906 + if(dma || list_empty(&rt_ep->queue))
1907 + handle_right_now = 1;
1908 +
1909 + ep_add_request(rt_ep, rt_req);
1910 +
1911 + if(handle_right_now){
1912 + if(!EP_NO(rt_ep) && rt_ep->rt_usb->ep0state != EP0_OUT_DATA_PHASE){ /* ep0 && TX*/
1913 + handle_inep0(rt_ep);
1914 + }else if( EP_DIR(rt_ep) == EP_IN){ /* epin[1-x] */
1915 + handle_inep(rt_ep);
1916 + }else{
1917 + // other reqs are waiting for TX_DONE int.
1918 + }
1919 + }
1920 +
1921 + if(dma){
1922 + if(EP_NO(rt_ep) && (EP_DIR(rt_ep) == EP_OUT))
1923 + tasklet_schedule(&rx_dma_tasklet);
1924 + }else{
1925 + if( (EP_DIR(rt_ep) == EP_OUT)/* OUT EP */ && rt_ep->pending){
1926 + rt_ep->pending = 0;
1927 + handle_pending_epoutirq(rt_usb, rt_ep, rt_req);
1928 + }
1929 + }
1930 +
1931 + local_irq_restore(flags);
1932 + return ret;
1933 +}
1934 +
1935 +static int rt_ep_dequeue(struct usb_ep *usb_ep, struct usb_request *usb_req)
1936 +{
1937 + struct rt_ep_struct *rt_ep = container_of(usb_ep, struct rt_ep_struct, ep);
1938 + struct rt_request *req;
1939 + unsigned long flags;
1940 +
1941 + DBG;
1942 + if (unlikely(!usb_ep || !EP_NO(rt_ep))) {
1943 + D_ERR(rt_ep->rt_usb->dev, "<%s> bad ep\n", __func__);
1944 + return -EINVAL;
1945 + }
1946 +
1947 + local_irq_save(flags);
1948 +
1949 + /* make sure it's actually queued on this endpoint */
1950 + list_for_each_entry(req, &rt_ep->queue, queue) {
1951 + if (&req->req == usb_req)
1952 + break;
1953 + }
1954 + if (&req->req != usb_req) {
1955 + local_irq_restore(flags);
1956 + return -EINVAL;
1957 + }
1958 +
1959 + done(rt_ep, req, -ECONNRESET);
1960 +
1961 + local_irq_restore(flags);
1962 + return 0;
1963 +}
1964 +
1965 +static int rt_ep_set_halt(struct usb_ep *usb_ep, int value)
1966 +{
1967 + struct rt_ep_struct *rt_ep = container_of(usb_ep, struct rt_ep_struct, ep);
1968 + unsigned long flags;
1969 +
1970 + DBG;
1971 + if (unlikely(!usb_ep || !EP_NO(rt_ep))) {
1972 + D_ERR(rt_ep->rt_usb->dev, "<%s> bad ep\n", __func__);
1973 + return -EINVAL;
1974 + }
1975 +
1976 + local_irq_save(flags);
1977 +
1978 + if ((rt_ep->bEndpointAddress & USB_DIR_IN) && !list_empty(&rt_ep->queue)) {
1979 + local_irq_restore(flags);
1980 + return -EAGAIN;
1981 + }
1982 +
1983 + rt_ep_stall(rt_ep, 1);
1984 +
1985 + local_irq_restore(flags);
1986 +
1987 + D_EPX(rt_ep->rt_usb->dev, "<%s> %s halt\n", __func__, usb_ep->name);
1988 + return 0;
1989 +}
1990 +
1991 +static int rt_ep_fifo_status(struct usb_ep *usb_ep)
1992 +{
1993 + struct rt_ep_struct *rt_ep = container_of(usb_ep, struct rt_ep_struct, ep);
1994 +
1995 + DBG;
1996 + if (!usb_ep) {
1997 + D_ERR(rt_ep->rt_usb->dev, "<%s> bad ep\n", __func__);
1998 + return -ENODEV;
1999 + }
2000 +
2001 + if (rt_ep->rt_usb->gadget.speed == USB_SPEED_UNKNOWN)
2002 + return 0;
2003 + else
2004 + return rt_fifo_bcount(rt_ep);
2005 +}
2006 +
2007 +static void rt_ep_fifo_flush(struct usb_ep *usb_ep)
2008 +{
2009 + struct rt_ep_struct *rt_ep = container_of(usb_ep, struct rt_ep_struct, ep);
2010 + unsigned long flags;
2011 +
2012 + DBG;
2013 + local_irq_save(flags);
2014 +
2015 + if (!usb_ep || !EP_NO(rt_ep) || !list_empty(&rt_ep->queue)) {
2016 + D_ERR(rt_ep->rt_usb->dev, "<%s> bad ep\n", __func__);
2017 + local_irq_restore(flags);
2018 + return;
2019 + }
2020 +
2021 + /* toggle and halt bits stay unchanged */
2022 + rt_flush(rt_ep);
2023 +
2024 + local_irq_restore(flags);
2025 +}
2026 +
2027 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)
2028 +static void *rt_ep_alloc_buffer(struct usb_ep *_ep, unsigned bytes, dma_addr_t *dma, gfp_t gfp_flags)
2029 +{
2030 + char *retval;
2031 +
2032 + retval = kmalloc (bytes, gfp_flags & ~(__GFP_DMA|__GFP_HIGHMEM));
2033 + if (retval)
2034 +// *dma = virt_to_bus (retval);
2035 + *dma = (dma_addr_t)~0;
2036 + return retval;
2037 +}
2038 +
2039 +static void rt_ep_free_buffer(struct usb_ep *_ep, void *buf, dma_addr_t dma, unsigned bytes)
2040 +{
2041 + kfree (buf);
2042 +}
2043 +#endif
2044 +
2045 +static struct usb_ep_ops rt_ep_ops = {
2046 + .enable = rt_ep_enable,
2047 + .disable = rt_ep_disable,
2048 +
2049 + .alloc_request = rt_ep_alloc_request,
2050 + .free_request = rt_ep_free_request,
2051 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)
2052 + .alloc_buffer = rt_ep_alloc_buffer,
2053 + .free_buffer = rt_ep_free_buffer,
2054 +#endif
2055 + .queue = rt_ep_queue,
2056 + .dequeue = rt_ep_dequeue,
2057 +
2058 + .set_halt = rt_ep_set_halt,
2059 + .fifo_status= rt_ep_fifo_status,
2060 + .fifo_flush = rt_ep_fifo_flush,
2061 +};
2062 +
2063 +/*******************************************************************************
2064 + * USB endpoint control functions
2065 + *******************************************************************************
2066 + */
2067 +static void usb_init_data(struct rt_udc_struct *rt_usb)
2068 +{
2069 + struct rt_ep_struct *rt_ep;
2070 + u8 i;
2071 +
2072 + DBG;
2073 + /* device/ep0 records init */
2074 + INIT_LIST_HEAD(&rt_usb->gadget.ep_list);
2075 + INIT_LIST_HEAD(&rt_usb->gadget.ep0->ep_list);
2076 + ep0_chg_stat(__func__, rt_usb, EP0_IDLE);
2077 +
2078 + /* basic endpoint records init */
2079 + for (i = 0; i < RT_USB_NB_EP; i++) {
2080 + rt_ep = &rt_usb->rt_ep[i];
2081 +
2082 + if (i) {
2083 + list_add_tail(&rt_ep->ep.ep_list, &rt_usb->gadget.ep_list);
2084 + rt_ep->stopped = 1;
2085 + } else
2086 + rt_ep->stopped = 0;
2087 +
2088 + INIT_LIST_HEAD(&rt_ep->queue);
2089 + }
2090 +}
2091 +
2092 +static void udc_stop_activity(struct rt_udc_struct *rt_usb, struct usb_gadget_driver *driver)
2093 +{
2094 + struct rt_ep_struct *rt_ep;
2095 + int i;
2096 +
2097 + if (rt_usb->gadget.speed == USB_SPEED_UNKNOWN)
2098 + driver = NULL;
2099 +
2100 + /* prevent new request submissions, kill any outstanding requests */
2101 + for (i = 0; i < RT_USB_NB_EP; i++) {
2102 + rt_ep = &rt_usb->rt_ep[i];
2103 + if(i != 0){ /* don't have to flush EP[0]. */
2104 + rt_flush(rt_ep);
2105 + rt_ep->stopped = 1;
2106 + rt_ep_irq_disable(rt_ep);
2107 + }
2108 + nuke(rt_ep, -ESHUTDOWN);
2109 + }
2110 +
2111 + rt_usb->cfg = 0;
2112 + rt_usb->intf = 0;
2113 + rt_usb->alt = 0;
2114 +
2115 + if (driver)
2116 + driver->disconnect(&rt_usb->gadget);
2117 +}
2118 +
2119 +/*
2120 + * keep for reference.
2121 + */
2122 +static void handle_config(unsigned long data)
2123 +{
2124 + DBG;
2125 +#if 0
2126 + struct imx_udc_struct *imx_usb = (void *)data;
2127 + struct usb_ctrlrequest u;
2128 + int temp, cfg, intf, alt;
2129 +
2130 + local_irq_disable();
2131 +
2132 + temp = __raw_readl(imx_usb->base + USB_STAT);
2133 + cfg = (temp & STAT_CFG) >> 5;
2134 + intf = (temp & STAT_INTF) >> 3;
2135 + alt = temp & STAT_ALTSET;
2136 +
2137 + xprintk("<%s> orig config C=%d, I=%d, A=%d / req config C=%d, I=%d, A=%d\n", __func__, imx_usb->cfg, imx_usb->intf, imx_usb->alt, cfg, intf, alt);
2138 +
2139 + if (cfg == 1 || cfg == 2) {
2140 +
2141 + if (imx_usb->cfg != cfg) {
2142 + u.bRequest = USB_REQ_SET_CONFIGURATION;
2143 + u.bRequestType = USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE;
2144 + u.wValue = cfg;
2145 + u.wIndex = 0;
2146 + u.wLength = 0;
2147 + imx_usb->cfg = cfg;
2148 + imx_usb->driver->setup(&imx_usb->gadget, &u);
2149 +
2150 + }
2151 + if (imx_usb->intf != intf || imx_usb->alt != alt) {
2152 + u.bRequest = USB_REQ_SET_INTERFACE;
2153 + u.bRequestType = USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_INTERFACE;
2154 + u.wValue = alt;
2155 + u.wIndex = intf;
2156 + u.wLength = 0;
2157 + imx_usb->intf = intf;
2158 + imx_usb->alt = alt;
2159 + imx_usb->driver->setup(&imx_usb->gadget, &u);
2160 + }
2161 + }
2162 +
2163 + imx_usb->set_config = 0;
2164 +
2165 + local_irq_enable();
2166 +#endif
2167 +}
2168 +
2169 +static void handle_setup(struct rt_udc_struct *rt_usb)
2170 +{
2171 + u8 epcs;
2172 + int i;
2173 + union {
2174 + struct usb_ctrlrequest r;
2175 + u8 raw[8];
2176 + u32 word[2];
2177 + } u;
2178 + struct rt_ep_struct *rt_ep = &rt_usb->rt_ep[0];
2179 +
2180 + nuke(rt_ep, -EPROTO);
2181 +
2182 + // read setup packet
2183 + for (i = 0; i < 8; i++)
2184 + u.raw[i] = usb_read(SETUPDATA + i);
2185 +
2186 + le16_to_cpus(&u.r.wValue);
2187 + le16_to_cpus(&u.r.wIndex);
2188 + le16_to_cpus(&u.r.wLength);
2189 +
2190 + xprintk("<SETUP> %02x.%02x v%04x\n", u.r.bRequestType, u.r.bRequest, u.r.wValue);
2191 +
2192 + switch(u.r.bRequest){
2193 + /* HW(CUSB2) has handled it. */
2194 + case USB_REQ_SET_ADDRESS:
2195 + if (u.r.bRequestType != (USB_TYPE_STANDARD | USB_RECIP_DEVICE))
2196 + break;
2197 + return;
2198 + }
2199 +
2200 + if(!u.r.wLength){
2201 + ep0_chg_stat(__func__, rt_usb, EP0_NO_DATA_PHASE);
2202 + }else if (u.r.bRequestType & USB_DIR_IN){
2203 + ep0_chg_stat(__func__, rt_usb, EP0_IN_DATA_PHASE);
2204 + }else{
2205 + // reload and clear out0bc
2206 + usb_write(OUT0BC, 0);
2207 + ep0_chg_stat(__func__, rt_usb, EP0_OUT_DATA_PHASE);
2208 + }
2209 +
2210 + if(!rt_usb->driver){
2211 + printk("<%s> please insert gadget driver/module.\n", __func__);
2212 + goto stall;
2213 + }
2214 +
2215 + if(!rt_usb->driver->setup)
2216 + goto stall;
2217 +
2218 + i = rt_usb->driver->setup(&rt_usb->gadget, &u.r); // gadget would queue more usb req here
2219 +
2220 + if (i < 0) {
2221 + printk("<%s> device setup error %d\n", __func__, i);
2222 + goto stall;
2223 + }
2224 +
2225 + if(rt_usb->ep0state == EP0_NO_DATA_PHASE){
2226 + epcs = read_epcs(rt_ep);
2227 + epcs |= EP_CS_EP0_HSNAK; // clear hsnak to let HW ack the status stage.
2228 + write_epcs(rt_ep, epcs);
2229 + }
2230 +
2231 + return;
2232 +stall:
2233 + printk("<%s> protocol STALL\n", __func__);
2234 + rt_ep_stall(rt_ep, 1);
2235 + ep0_chg_stat(__func__, rt_usb, EP0_STALL);
2236 + return;
2237 +}
2238 +
2239 +/*
2240 + * handle TX done interrupt
2241 + */
2242 +static void handle_epinirq(struct rt_udc_struct *rt_usb, u8 epinirq)
2243 +{
2244 + u8 irq = 0x0;
2245 + struct rt_request *req;
2246 + struct rt_ep_struct *rt_ep;
2247 +
2248 + rt_ep = &rt_usb->rt_ep[epinirq];
2249 +
2250 + if (list_empty(&rt_ep->queue))
2251 + FATAL_ERROR("empty queue");
2252 +
2253 + // clear ep interrupt
2254 + if(epinirq < 8){
2255 + irq |= 1 << epinirq;
2256 + usb_write(IN07IRQ, irq);
2257 + }else{
2258 + irq |= 1 << (epinirq-8);
2259 + usb_write(IN815IRQ, irq);
2260 + }
2261 +
2262 + req = list_entry(rt_ep->queue.next, struct rt_request, queue);
2263 + xprintk("r.l=%d, r.a=%d\n", req->req.length, req->req.actual);
2264 + if(req->req.actual >= req->req.length ){
2265 + if( req->req.actual && (!(req->req.actual % rt_ep->ep.maxpacket)) && req->req.zero){
2266 + // deal with one more "zlp"
2267 + req->req.zero = 0;
2268 + write_ep_fifo_zlp(rt_ep);
2269 + return;
2270 + }
2271 +
2272 + // the first tx req in ep->queue is done.
2273 + rt_ep->tx_done_count = 0;
2274 + if(!epinirq /* EP0 */)
2275 + ep0_chg_stat(__func__, rt_usb, EP0_IDLE);
2276 + done(rt_ep, req, 0);
2277 +#if 1
2278 + // more reqs there.
2279 + if (!list_empty(&rt_ep->queue) && !rt_ep->tx_done_count){
2280 + if(!epinirq /* EP0 */){
2281 + handle_inep0(rt_ep);
2282 + }else{
2283 + handle_inep(rt_ep);
2284 + }
2285 + }
2286 +#endif
2287 + }else{
2288 + if(!epinirq /* EP0 */){
2289 + handle_inep0(rt_ep);
2290 + }else
2291 + handle_inep(rt_ep);
2292 + }
2293 +}
2294 +
2295 +static void handle_ep0outirq(struct rt_udc_struct *rt_usb, u8 epoutirq)
2296 +{
2297 + u8 epcs, irq = 0x0;
2298 + struct rt_request *req = NULL;
2299 + struct rt_ep_struct *rt_ep = NULL;
2300 +
2301 +DBG;
2302 + rt_ep = &rt_usb->rt_ep[0];
2303 +
2304 + if(rt_usb->ep0state == EP0_STALL){
2305 + printk("<%s> protocol STALL\n", __func__);
2306 + rt_ep_stall(rt_ep, 1);
2307 + return;
2308 + }
2309 +
2310 + if(rt_usb->ep0state != EP0_OUT_DATA_PHASE)
2311 + FATAL_ERROR("Odd stage");
2312 +
2313 + do{
2314 + if(unlikely(!read_outbc(0x0)))
2315 + FATAL_ERROR("EP0 BC");
2316 +
2317 + if (unlikely(list_empty(&rt_ep->queue)))
2318 + FATAL_ERROR("EP0 no req");
2319 +
2320 + req = handle_outep0(rt_ep);
2321 +
2322 + //req = list_entry(rt_ep->queue.next, struct rt_request, queue);
2323 + xprintk("q.l=%d,q.a=%d\n", req->req.length, req->req.actual);
2324 +
2325 + // clear ep interrupt
2326 + irq |= 1;
2327 + usb_write(OUT07IRQ, irq);
2328 +
2329 + if(req && ((req->req.actual % rt_ep->ep.maxpacket) || (req->req.actual >= req->req.length))){
2330 + ep0_chg_stat(__func__, rt_usb, EP0_IDLE);
2331 + done(rt_ep, req, 0); // short packet indicates transaction is done.
2332 +
2333 + epcs = read_epcs(rt_ep);
2334 + epcs |= EP_CS_EP0_HSNAK; // clear hsnak bit to let HW ack the status stage.
2335 + write_epcs(rt_ep, epcs);
2336 + break;
2337 + }
2338 +
2339 + // reload EP[0]
2340 + usb_write(OUT0BC /*out0bc*/, 0x0);
2341 + epcs = read_epcs(rt_ep);
2342 + }while(!(epcs & EP0_OUT_BSY));
2343 +}
2344 +
2345 +static void handle_pending_epoutirq(struct rt_udc_struct *rt_usb, struct rt_ep_struct *rt_ep, struct rt_request *req)
2346 +{
2347 + u8 epcs;
2348 +
2349 +DBG;
2350 + do{
2351 + if(unlikely(!read_outbc(EP_NO(rt_ep))))
2352 + FATAL_ERROR("No BC");
2353 +
2354 + handle_outep(rt_ep);
2355 + if(req && ( (req->req.actual % rt_ep->ep.maxpacket) || (req->req.actual >= req->req.length))){
2356 + xprintk("q.l=%d,q.a=%d\n", req->req.length, req->req.actual);
2357 +
2358 + //rx_done(rt_ep, req, 0);
2359 + done(rt_ep, req, 0);
2360 + }
2361 +
2362 + epcs = read_epcs(rt_ep);
2363 + write_epcs(rt_ep, 0x0);
2364 + epcs = read_epcs(rt_ep);
2365 +
2366 + }while(!(epcs & EP_CS_BSY));
2367 +}
2368 +
2369 +static void handle_epoutirq(struct rt_udc_struct *rt_usb, u8 epoutirq)
2370 +{
2371 + u8 irq = 0x0;
2372 +
2373 +DBG;
2374 + if(unlikely(epoutirq == 0x0)){
2375 + handle_ep0outirq(rt_usb, 0x0);
2376 + return;
2377 + }
2378 +
2379 + tasklet_schedule(&rx_tasklet);
2380 +
2381 + // clear ep interrupt
2382 + irq |= 1 << epoutirq;
2383 + usb_write(OUT07IRQ, irq);
2384 + return;
2385 +}
2386 +
2387 +static void eps_change_to_hs(struct rt_udc_struct *rt_usb)
2388 +{
2389 + int i;
2390 + struct rt_ep_struct *rt_ep;
2391 + for(i = 0; i < RT_USB_NB_EP; i++){
2392 + rt_ep = &rt_usb->rt_ep[i];
2393 + if(rt_ep->bmAttributes == USB_ENDPOINT_XFER_BULK){
2394 + rt_ep->ep.maxpacket = 512;
2395 + }
2396 + }
2397 +}
2398 +
2399 +static void eps_change_to_fs(struct rt_udc_struct *rt_usb)
2400 +{
2401 + int i;
2402 + struct rt_ep_struct *rt_ep;
2403 + for(i = 0; i < RT_USB_NB_EP; i++){
2404 + rt_ep = &rt_usb->rt_ep[i];
2405 + if(rt_ep->bmAttributes == USB_ENDPOINT_XFER_BULK){
2406 + rt_ep->ep.maxpacket = 64;
2407 + }
2408 + }
2409 +}
2410 +
2411 +void handle_highspeed(struct rt_udc_struct *rt_usb)
2412 +{
2413 + DBG;
2414 +
2415 + eps_change_to_hs(rt_usb);
2416 +
2417 + if(dma){
2418 +#if defined (CONFIG_RALINK_RT3883) || defined (CONFIG_RALINK_RT3352) || defined (CONFIG_RALINK_MT7620)
2419 + usb_write(IN1CON, 0x8D); // InEP1 : Int, 2 subfifos
2420 + usb_write(IN2CON, 0x89); // InEP2 : Bulk, 2 subfifo
2421 + usb_write(OUT1CON, 0x8D); // OutEP1 : Int, 2 subfifos
2422 + usb_write(OUT2CON, 0x89); // OutEP2 : Bulk, 2 subfifos
2423 + //usb_write(OUT3CON, 0x89); // OutEP3 : Bulk, 2 subfifo
2424 + //usb_write(OUT4CON, 0x89); // OutEP4 : Bulk. 2 subfifo
2425 +#elif defined (CONFIG_RALINK_RT5350)
2426 + // Access by CPU
2427 + usb_write(IN1CON, 0x89); // InEP1 : Bulk, 2 subfifos
2428 + usb_write(OUT1CON, 0x89); // OutEP1 : Bulk, 2 subfifos
2429 +#else
2430 +#error "define a platform"
2431 +#endif
2432 + }else{
2433 + // Access by CPU
2434 +#if defined (CONFIG_RALINK_RT3883) || defined (CONFIG_RALINK_RT3352) || defined (CONFIG_RALINK_MT7620)
2435 + usb_write(IN1CON, 0x8C); // InEP1 : Int , 1 subfifos
2436 + usb_write(IN2CON, 0x88); // InEP2 : Bulk, 1 subfifo
2437 +
2438 + usb_write(OUT1CON, 0x8C); // OutEP1 : Int, 1 subfifos
2439 + usb_write(OUT2CON, 0x88); // OutEP2 : Bulk, 1 subfifos
2440 + //usb_write(OUT3CON, 0x88); // OutEP3 : Bulk, 1 subfifo
2441 + //usb_write(OUT4CON, 0x88); // OutEP4 : Bulk. 1 subfifo
2442 +#elif defined (CONFIG_RALINK_RT5350)
2443 + // Access by CPU
2444 + usb_write(IN1CON, 0x88); // InEP1 : Bulk , 1 subfifos
2445 + usb_write(OUT1CON, 0x88); // OutEP1 : Bulk, 1 subfifos
2446 +#else
2447 +#error "define a platform"
2448 +#endif
2449 +
2450 + }
2451 + // clear all pending interrupts
2452 + usb_write(IN07IRQ, 0xFF);
2453 + usb_write(OUT07IRQ, 0xFF);
2454 +
2455 + rt_usb->gadget.speed = USB_SPEED_HIGH;
2456 +
2457 + // reset ALL endpoints
2458 + rt_all_eps_reset();
2459 +
2460 + // Enable ep0 interrupt.
2461 + // (EPx interrupt is enabled in EPx_enable(). )
2462 + rt_ep_irq_enable(&rt_usb->rt_ep[0]);
2463 +}
2464 +
2465 +static void handle_reset(struct rt_udc_struct *rt_usb)
2466 +{
2467 + struct rt_ep_struct *rt_ep;
2468 + int i;
2469 +
2470 + eps_change_to_fs(rt_usb);
2471 +
2472 + // remove all EPs' usb request
2473 + for (i = 0; i < RT_USB_NB_EP; i++) {
2474 + rt_ep = &rt_usb->rt_ep[i];
2475 + if(i != 0){ /* don't have to flush EP[0]. */
2476 + rt_flush(rt_ep);
2477 + rt_ep->stopped = 1;
2478 + rt_ep_irq_disable(rt_ep);
2479 + }
2480 + nuke(rt_ep, -ESHUTDOWN);
2481 + }
2482 +
2483 + rt_usb->cfg = 0;
2484 + rt_usb->intf = 0;
2485 + rt_usb->alt = 0;
2486 +
2487 + if(dma){
2488 + // clear all PDMA interrupts
2489 + udc_dma_all_int_clear();
2490 + // reset PDMA
2491 + udc_dma_rst();
2492 + }
2493 +
2494 + // clear all pending interrupts
2495 + usb_write(IN07IRQ, 0xFF);
2496 + usb_write(OUT07IRQ, 0xFF);
2497 +
2498 + // flush all EP's fifo
2499 + rt_all_eps_reset();
2500 +}
2501 +
2502 +static void handle_usbirq(struct rt_udc_struct *rt_usb, u8 usbirq)
2503 +{
2504 + if(usbirq & USB_INTR_SETUP_TOKEN_VALID){
2505 + // Setup token is arrival.
2506 + // get setup data and pass it to gadget driver.
2507 + handle_setup(rt_usb);
2508 + }
2509 +
2510 + if(usbirq & USB_INTR_RESET)
2511 + handle_reset(rt_usb);
2512 +
2513 + if(usbirq & USB_INTR_HSPEED)
2514 + handle_highspeed(rt_usb);
2515 +
2516 + /*
2517 + * DO NOT try to clear SoF and token Interrupt!
2518 + */
2519 + if( (usbirq & USB_INTR_SETUP_TOKEN_VALID) ||
2520 + (usbirq & USB_INTR_HSPEED) ||
2521 + (usbirq & USB_INTR_RESET))
2522 + usb_write(USBIRQ, usbirq);
2523 +}
2524 +
2525 +static int irq_count = 100; /* for debug */
2526 +/*
2527 + * Interrupt handler
2528 + */
2529 +irqreturn_t rt_irq_handler(int irq, void *_dev)
2530 +{
2531 + u32 usbirq,epin07irq,epin07ien,epout07irq,epout07ien;
2532 + struct rt_udc_struct *rt_usb = _dev;
2533 +#ifdef DEBUG
2534 + u32 count_tmp = irq_count;
2535 +#endif
2536 +
2537 +
2538 + DBG;
2539 + irq_count++;
2540 +
2541 + usbirq = usb_read(USBIRQ);
2542 + epin07irq = usb_read(IN07IRQ);
2543 + epin07ien = usb_read(IN07IEN);
2544 + epout07irq = usb_read(OUT07IRQ);
2545 + epout07ien = usb_read(OUT07IEN);
2546 +
2547 + //epin07irq = epin07irq & epin07ien;
2548 + //epout07irq = epout07irq & epout07ien;
2549 +
2550 + xprintk(">%x\n", count_tmp);
2551 + dump_usbirq(usbirq);
2552 + dump_epirq(epin07irq, epin07ien, 1);
2553 + dump_epirq(epout07irq, epout07ien, 0);
2554 +
2555 + if(dma){
2556 + u32 dma_irq = reg_read(RTUSB_INT_STATUS);
2557 + if(epin07irq & 0x1) // INEP0
2558 + handle_epinirq(rt_usb, 0);
2559 +
2560 + if(usbirq) // HS, Reset, SetupValid
2561 + handle_usbirq(rt_usb, usbirq);
2562 +
2563 + if(epout07irq & 0x1) // OUTEP0
2564 + handle_epoutirq(rt_usb, 0);
2565 +
2566 + if(dma_irq)
2567 + handle_dmairq(rt_usb, dma_irq);
2568 +
2569 + }else{
2570 + if(epin07irq & 0x1) // INEP0
2571 + handle_epinirq(rt_usb, 0);
2572 +
2573 + if(usbirq) // HS, Reset, SetupValid
2574 + handle_usbirq(rt_usb, usbirq);
2575 +
2576 + if(epout07irq & 0x1) // OUTEP0
2577 + handle_epoutirq(rt_usb, 0);
2578 +
2579 + if(epout07irq & 0x2) // OUTEP1
2580 + handle_epoutirq(rt_usb, 1);
2581 +
2582 + if(epin07irq & 0x2) // INEP1
2583 + handle_epinirq(rt_usb, 1);
2584 +
2585 + if(epout07irq & 0x4) // OUTEP2
2586 + handle_epoutirq(rt_usb, 2);
2587 +
2588 + if(epin07irq & 0x4) // INEP2
2589 + handle_epinirq(rt_usb, 2);
2590 +
2591 + //if(epout07irq & 0x8) // OUTEP3
2592 + // handle_epoutirq(rt_usb, 3);
2593 +
2594 + //if(epout07irq & 0x10) // OUTEP4
2595 + // handle_epoutirq(rt_usb, 4);
2596 + }
2597 + xprintk("<%x\n", count_tmp);
2598 + return IRQ_HANDLED;
2599 +}
2600 +
2601 +/*
2602 + ******************************************************************************
2603 + * Static defined Ralink UDC structure
2604 + *******************************************************************************
2605 + */
2606 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)
2607 +static void nop_release(struct device *dev)
2608 +{
2609 + return;
2610 +}
2611 +#endif
2612 +
2613 +static const struct usb_gadget_ops rt_udc_ops = {
2614 + .get_frame = rt_udc_get_frame,
2615 + .wakeup = rt_udc_wakeup,
2616 +};
2617 +
2618 +static struct rt_udc_struct controller = {
2619 + .gadget = {
2620 + .ops = &rt_udc_ops,
2621 + .ep0 = &controller.rt_ep[0].ep,
2622 + .name = driver_name,
2623 + .dev = {
2624 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)
2625 + .init_name = "gadget",
2626 + .release = nop_release,
2627 +#else
2628 + .bus_id = "gadget",
2629 +#endif
2630 + },
2631 + },
2632 + .rt_ep[0] = {
2633 + .ep = {
2634 + .name = ep0name,
2635 + .ops = &rt_ep_ops,
2636 + .maxpacket = 64,
2637 + },
2638 + .rt_usb = &controller,
2639 + .bEndpointAddress = 0,
2640 + .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
2641 + .pending = 0,
2642 + },
2643 +#if defined (CONFIG_RALINK_RT3883) || defined (CONFIG_RALINK_RT3352) || defined (CONFIG_RALINK_MT7620)
2644 + .rt_ep[1] = {
2645 + .ep = {
2646 + .name = "ep1in-int",
2647 + .ops = &rt_ep_ops,
2648 + .maxpacket = 64,
2649 + },
2650 + .rt_usb = &controller,
2651 + .bEndpointAddress = USB_DIR_IN | 1,
2652 + .bmAttributes = USB_ENDPOINT_XFER_INT,
2653 + .pending = 0,
2654 + },
2655 + .rt_ep[2] = {
2656 + .ep = {
2657 + .name = "ep2in-bulk",
2658 + .ops = &rt_ep_ops,
2659 + .maxpacket = 64,
2660 + },
2661 + .rt_usb = &controller,
2662 + .bEndpointAddress = USB_DIR_IN | 2,
2663 + .bmAttributes = USB_ENDPOINT_XFER_BULK,
2664 + .pending = 0,
2665 + },
2666 + .rt_ep[3] = {
2667 + .ep = {
2668 + .name = "ep1out-int",
2669 + .ops = &rt_ep_ops,
2670 + .maxpacket = 64,
2671 + },
2672 + .rt_usb = &controller,
2673 + .bEndpointAddress = USB_DIR_OUT | 1,
2674 + .bmAttributes = USB_ENDPOINT_XFER_INT,
2675 + .pending = 0,
2676 + },
2677 + .rt_ep[4] = {
2678 + .ep = {
2679 + .name = "ep2out-bulk",
2680 + .ops = &rt_ep_ops,
2681 + .maxpacket = 64,
2682 + },
2683 + .rt_usb = &controller,
2684 + .bEndpointAddress = USB_DIR_OUT | 2,
2685 + .bmAttributes = USB_ENDPOINT_XFER_BULK,
2686 + .pending = 0,
2687 + },
2688 + /*
2689 + .rt_ep[5] = {
2690 + .ep = {
2691 + .name = "ep3out-bulk",
2692 + .ops = &rt_ep_ops,
2693 + .maxpacket = 64,
2694 + },
2695 + .rt_usb = &controller,
2696 + .bEndpointAddress = USB_DIR_OUT | 3,
2697 + .bmAttributes = USB_ENDPOINT_XFER_BULK,
2698 + .pending = 0,
2699 + },
2700 + .rt_ep[6] = {
2701 + .ep = {
2702 + .name = "ep4out-bulk",
2703 + .ops = &rt_ep_ops,
2704 + .maxpacket = 64,
2705 + },
2706 + .rt_usb = &controller,
2707 + .bEndpointAddress = USB_DIR_OUT | 4,
2708 + .bmAttributes = USB_ENDPOINT_XFER_BULK,
2709 + .pending = 0,
2710 + },
2711 + */
2712 +
2713 +#elif defined (CONFIG_RALINK_RT5350)
2714 + .rt_ep[1] = {
2715 + .ep = {
2716 + .name = "ep1in-bulk",
2717 + .ops = &rt_ep_ops,
2718 + .maxpacket = 64,
2719 + },
2720 + .rt_usb = &controller,
2721 + .bEndpointAddress = USB_DIR_IN | 1,
2722 + .bmAttributes = USB_ENDPOINT_XFER_BULK,
2723 + .pending = 0,
2724 + },
2725 + .rt_ep[2] = {
2726 + .ep = {
2727 + .name = "ep1out-bulk",
2728 + .ops = &rt_ep_ops,
2729 + .maxpacket = 64,
2730 + },
2731 + .rt_usb = &controller,
2732 + .bEndpointAddress = USB_DIR_OUT | 1,
2733 + .bmAttributes = USB_ENDPOINT_XFER_BULK,
2734 + .pending = 0,
2735 + },
2736 +#else
2737 +#error "define a platform"
2738 +#endif
2739 +};
2740 +
2741 +/*
2742 + *******************************************************************************
2743 + * USB gadged driver functions
2744 + *******************************************************************************
2745 + */
2746 +
2747 +static void rt_udc_enable(struct rt_udc_struct *rt_usb)
2748 +{
2749 + DBG;
2750 + rt_usb->gadget.speed = USB_SPEED_FULL;
2751 + if(dma){
2752 + // enable dma interrupts
2753 + udc_dma_all_int_clear();
2754 + udc_dma_int_enable(true);
2755 +
2756 + udc_dma_rst();
2757 +
2758 + // enable dma
2759 + udc_dma_enable(true);
2760 + }
2761 +}
2762 +
2763 +static void rt_udc_disable(struct rt_udc_struct *rt_usb)
2764 +{
2765 + DBG;
2766 + ep0_chg_stat(__func__, rt_usb, EP0_IDLE);
2767 + rt_usb->gadget.speed = USB_SPEED_UNKNOWN;
2768 + if(dma){
2769 + // disable dma interrupts
2770 + udc_dma_all_int_clear();
2771 + udc_dma_int_enable(false);
2772 +
2773 + udc_dma_rst();
2774 +
2775 + // disable dma
2776 + udc_dma_enable(false);
2777 + }
2778 +}
2779 +
2780 +int usb_gadget_register_driver(struct usb_gadget_driver *driver)
2781 +{
2782 + struct rt_udc_struct *rt_usb = &controller;
2783 + int retval;
2784 +
2785 + DBG;
2786 + if (!driver || driver->speed < USB_SPEED_FULL || !driver->bind || !driver->disconnect || !driver->setup)
2787 + return -EINVAL;
2788 + if (!rt_usb)
2789 + return -ENODEV;
2790 + if (rt_usb->driver)
2791 + return -EBUSY;
2792 +
2793 + /* first hook up the driver ... */
2794 + rt_usb->driver = driver;
2795 + rt_usb->gadget.dev.driver = &driver->driver;
2796 + retval = device_add(&rt_usb->gadget.dev);
2797 + if (retval)
2798 + goto fail;
2799 +
2800 + retval = driver->bind(&rt_usb->gadget);
2801 + if (retval) {
2802 + D_ERR(rt_usb->dev, "<%s> bind to driver --> error %d\n", __func__, retval);
2803 + device_del(&rt_usb->gadget.dev);
2804 + goto fail;
2805 + }
2806 +
2807 + D_INI(rt_usb->dev, "<%s> registered gadget driver '%s'\n", __func__, driver->driver.name);
2808 + rt_udc_enable(rt_usb);
2809 + return 0;
2810 +
2811 +fail:
2812 + rt_usb->driver = NULL;
2813 + rt_usb->gadget.dev.driver = NULL;
2814 + return retval;
2815 +}
2816 +EXPORT_SYMBOL(usb_gadget_register_driver);
2817 +
2818 +int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
2819 +{
2820 + struct rt_udc_struct *rt_usb = &controller;
2821 +
2822 +DBG;
2823 + if (!rt_usb)
2824 + return -ENODEV;
2825 + if (!driver || driver != rt_usb->driver || !driver->unbind)
2826 + return -EINVAL;
2827 +
2828 + udc_stop_activity(rt_usb, driver);
2829 + rt_udc_disable(rt_usb);
2830 + del_timer(&rt_usb->timer);
2831 +
2832 + driver->unbind(&rt_usb->gadget);
2833 + rt_usb->gadget.dev.driver = NULL;
2834 + rt_usb->driver = NULL;
2835 +
2836 + device_del(&rt_usb->gadget.dev);
2837 +
2838 + D_INI(rt_usb->dev, "<%s> unregistered gadget driver '%s'\n", __func__, driver->driver.name);
2839 +
2840 + return 0;
2841 +}
2842 +EXPORT_SYMBOL(usb_gadget_unregister_driver);
2843 +
2844 +/*******************************************************************************
2845 + * Module functions
2846 + *******************************************************************************
2847 + */
2848 +static int __init rt_udc_probe(struct platform_device *pdev)
2849 +{
2850 + struct rt_udc_struct *rt_usb = &controller;
2851 + struct resource *res_mem, *res_irq;
2852 + void __iomem *base;
2853 + int ret = 0, res_mem_size;
2854 +
2855 +DBG;
2856 + res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2857 + if (!res_mem) {
2858 + dev_err(&pdev->dev, "can't get device resources\n");
2859 + return -ENODEV;
2860 + }
2861 +
2862 + res_mem_size = res_mem->end - res_mem->start + 1;
2863 + if (!request_mem_region(res_mem->start, res_mem_size, res_mem->name)) {
2864 + dev_err(&pdev->dev, "can't allocate %d bytes at %d address\n", res_mem_size, res_mem->start);
2865 + return -ENOMEM;
2866 + }
2867 +
2868 + base = ioremap(res_mem->start, res_mem_size);
2869 + if (!base) {
2870 + dev_err(&pdev->dev, "ioremap failed\n");
2871 + ret = -EIO;
2872 + goto fail1;
2873 + }
2874 +
2875 + res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2876 + if (!res_irq) {
2877 + dev_err(&pdev->dev, "can't get irq number\n");
2878 + ret = -ENODEV;
2879 + goto fail3;
2880 + }
2881 + rt_usb->interrupt = res_irq->start;
2882 +
2883 + ret = request_irq(rt_usb->interrupt, rt_irq_handler, IRQF_DISABLED, driver_name, rt_usb);
2884 + if (ret) {
2885 + dev_err(&pdev->dev, "can't get irq %i, err %d\n", rt_usb->interrupt, ret);
2886 + goto fail3;
2887 + }
2888 +
2889 + rt_usb->res = res_mem;
2890 + rt_usb->base = base;
2891 + rt_usb->dev = &pdev->dev;
2892 +
2893 + device_initialize(&rt_usb->gadget.dev);
2894 +
2895 + rt_usb->gadget.dev.parent = &pdev->dev;
2896 + rt_usb->gadget.dev.dma_mask = pdev->dev.dma_mask;
2897 +
2898 + platform_set_drvdata(pdev, rt_usb);
2899 +
2900 + usb_init_data(rt_usb);
2901 +
2902 + if(dma){
2903 + if(rt_udc_dma_init())
2904 + goto fail4;
2905 + }
2906 +
2907 + rt_udc_init(rt_usb);
2908 +
2909 + init_timer(&rt_usb->timer);
2910 + rt_usb->timer.function = handle_config;
2911 + rt_usb->timer.data = (unsigned long)rt_usb;
2912 +
2913 + return 0;
2914 +fail4:
2915 + free_irq(rt_usb->interrupt, rt_usb);
2916 +fail3:
2917 + iounmap(base);
2918 +fail1:
2919 + release_mem_region(res_mem->start, res_mem_size);
2920 + return ret;
2921 +}
2922 +
2923 +static int __exit rt_udc_remove(struct platform_device *pdev)
2924 +{
2925 + struct rt_udc_struct *rt_usb = platform_get_drvdata(pdev);
2926 +
2927 + DBG;
2928 + rt_udc_disable(rt_usb);
2929 + del_timer(&rt_usb->timer);
2930 +
2931 + free_irq(rt_usb->interrupt, rt_usb);
2932 +
2933 + iounmap(rt_usb->base);
2934 + release_mem_region(rt_usb->res->start, rt_usb->res->end - rt_usb->res->start + 1);
2935 +
2936 + //if (pdata->exit)
2937 + // pdata->exit(&pdev->dev);
2938 + platform_set_drvdata(pdev, NULL);
2939 +
2940 + return 0;
2941 +}
2942 +
2943 +static void set_device_mode(void)
2944 +{
2945 + u32 val;
2946 + val = le32_to_cpu(*(volatile u_long *)(SYSCFG1));
2947 + val = val & ~(USB0_HOST_MODE);
2948 + *(volatile u_long *)(SYSCFG1) = cpu_to_le32(val);
2949 + udelay(10000);
2950 +}
2951 +
2952 +/*----------------------------------------------------------------------------*/
2953 +static struct platform_driver udc_driver = {
2954 +
2955 + .driver = {
2956 + .name = driver_name,
2957 + .owner = THIS_MODULE,
2958 + },
2959 + .probe = rt_udc_probe,
2960 + .remove = __exit_p(rt_udc_remove),
2961 + .suspend = NULL,
2962 + .resume = NULL,
2963 +};
2964 +
2965 +static int udc_create_proc(void)
2966 +{
2967 + pProcDir = proc_mkdir(PROC_DIR, NULL);
2968 + if ((pProcDebugLevel = create_proc_entry(DEBUGLEVEL_PROCFILE, 0, pProcDir))){
2969 + pProcDebugLevel->read_proc = (read_proc_t*)&debuglevel_read;
2970 + pProcDebugLevel->write_proc = (write_proc_t*)&debuglevel_write;
2971 + }
2972 + return 0;
2973 +}
2974 +
2975 +static int udc_remove_proc(void)
2976 +{
2977 + if (pProcDebugLevel)
2978 + remove_proc_entry(DEBUGLEVEL_PROCFILE, pProcDir);
2979 + if (pProcDir)
2980 + remove_proc_entry(PROC_DIR, 0);
2981 +
2982 + return 0;
2983 +}
2984 +
2985 +static int __init udc_init(void)
2986 +{
2987 + int ret;
2988 + udc_create_proc();
2989 +
2990 + try_wake_up();
2991 + set_device_mode();
2992 +
2993 + ret = platform_driver_register(&udc_driver);
2994 +
2995 + tasklet_init(&rx_tasklet, rx_do_tasklet, 0);
2996 + tasklet_init(&tx_tasklet, tx_do_tasklet, 0);
2997 +
2998 + if(dma){
2999 + printk("DMA TXMAXCAP=%d\n", TXMAXCAP);
3000 + tasklet_init(&rx_dma_tasklet, rx_dma_done_do_tasklet, 0);
3001 + tasklet_init(&tx_dma_tasklet, tx_dma_done_do_tasklet, 0);
3002 + }
3003 +
3004 + return ret; //platform_driver_probe(&udc_driver, rt_udc_probe);
3005 +}
3006 +module_init(udc_init);
3007 +
3008 +static void __exit udc_exit(void)
3009 +{
3010 + DBG;
3011 + udc_remove_proc();
3012 + if(dma)
3013 + udc_dma_fini();
3014 + platform_driver_unregister(&udc_driver);
3015 +}
3016 +module_exit(udc_exit);
3017 +
3018 +MODULE_DESCRIPTION("Ralink USB Device Controller driver");
3019 +MODULE_AUTHOR("Ying Yuan Huang <yy_huang@ralinktech.com>");
3020 +MODULE_LICENSE("GPL");
3021 +MODULE_ALIAS("platform:rt_udc");
3022 +
3023 --
3024 1.7.10.4
3025
OpenWrt Source Repository