49dea20c6300be1551ed3a2dd6ef97782430be4b
[openwrt/openwrt.git] / target / linux / rb532 / patches-2.6.28 / 002-pci_io_map_base.patch
1 The code is rather based on trial-and-error than knowledge. Verified Via
2 Rhine functionality in PIO as well as MMIO mode.
3
4 Signed-off-by: Phil Sutter <n0-1@freewrt.org>
5 Tested-by: Florian Fainelli <florian@openwrt.org>
6 ---
7 arch/mips/pci/pci-rc32434.c | 11 +++++++++++
8 1 files changed, 11 insertions(+), 0 deletions(-)
9
10 --- a/arch/mips/pci/pci-rc32434.c
11 +++ b/arch/mips/pci/pci-rc32434.c
12 @@ -205,6 +205,8 @@ static int __init rc32434_pcibridge_init
13
14 static int __init rc32434_pci_init(void)
15 {
16 + void __iomem *io_map_base;
17 +
18 pr_info("PCI: Initializing PCI\n");
19
20 ioport_resource.start = rc32434_res_pci_io1.start;
21 @@ -212,6 +214,15 @@ static int __init rc32434_pci_init(void)
22
23 rc32434_pcibridge_init();
24
25 + io_map_base = ioremap(rc32434_res_pci_io1.start,
26 + rc32434_res_pci_io1.end - rc32434_res_pci_io1.start + 1);
27 +
28 + if (!io_map_base)
29 + return -ENOMEM;
30 +
31 + rc32434_controller.io_map_base =
32 + (unsigned long)io_map_base - rc32434_res_pci_io1.start;
33 +
34 register_pci_controller(&rc32434_controller);
35 rc32434_sync();
36