realtek: separate lock of RTL8231 from phy driver
[openwrt/openwrt.git] / target / linux / realtek / files-5.10 / drivers / gpio / gpio-rtl8231.c
1 // SPDX-License-Identifier: GPL-2.0-only
2
3 #include <linux/gpio/driver.h>
4 #include <linux/module.h>
5 #include <linux/platform_device.h>
6 #include <linux/delay.h>
7 #include <asm/mach-rtl838x/mach-rtl83xx.h>
8
9 /* RTL8231 registers for LED control */
10 #define RTL8231_LED_FUNC0 0x0000
11 #define RTL8231_LED_FUNC1 0x0001
12 #define RTL8231_READY_MASK 0x03f0
13 #define RTL8231_READY_VALUE 0x0370
14 #define RTL8231_GPIO_PIN_SEL(gpio) ((0x0002) + ((gpio) >> 4))
15 #define RTL8231_GPIO_DIR(gpio) ((0x0005) + ((gpio) >> 4))
16 #define RTL8231_GPIO_DATA(gpio) ((0x001C) + ((gpio) >> 4))
17
18 #define USEC_TIMEOUT 5000
19
20 #define RTL8231_SMI_BUS_ID_MAX 0x1F
21
22 struct rtl8231_gpios {
23 struct gpio_chip gc;
24 struct device *dev;
25 u32 id;
26 u32 smi_bus_id;
27 u16 reg_shadow[0x20];
28 u32 reg_cached;
29 int ext_gpio_indrt_access;
30 };
31
32 extern struct rtl83xx_soc_info soc_info;
33
34 DEFINE_MUTEX(miim_lock);
35
36 static u32 rtl8231_read(struct rtl8231_gpios *gpios, u32 reg)
37 {
38 u32 t = 0, n = 0;
39
40 reg &= 0x1f;
41
42 /* Calculate read register address */
43 t = (gpios->smi_bus_id << 2) | (reg << 7);
44
45 /* Set execution bit: cleared when operation completed */
46 t |= 1;
47
48 // Start execution
49 sw_w32(t, gpios->ext_gpio_indrt_access);
50 do {
51 udelay(1);
52 t = sw_r32(gpios->ext_gpio_indrt_access);
53 n++;
54 } while ((t & 1) && (n < USEC_TIMEOUT));
55
56 if (n >= USEC_TIMEOUT)
57 return 0x80000000;
58
59 pr_debug("%s: %x, %x, %x\n", __func__, gpios->smi_bus_id,
60 reg, (t & 0xffff0000) >> 16);
61
62 return (t & 0xffff0000) >> 16;
63 }
64
65 static int rtl8231_write(struct rtl8231_gpios *gpios, u32 reg, u32 data)
66 {
67 u32 t = 0, n = 0;
68
69 pr_debug("%s: %x, %x, %x\n", __func__, gpios->smi_bus_id, reg, data);
70 reg &= 0x1f;
71
72 t = (gpios->smi_bus_id << 2) | (reg << 7) | (data << 16);
73 /* Set write bit */
74 t |= 2;
75
76 /* Set execution bit: cleared when operation completed */
77 t |= 1;
78
79 // Start execution
80 sw_w32(t, gpios->ext_gpio_indrt_access);
81 do {
82 udelay(1);
83 t = sw_r32(gpios->ext_gpio_indrt_access);
84 } while ((t & 1) && (n < USEC_TIMEOUT));
85
86 if (n >= USEC_TIMEOUT)
87 return -1;
88
89 return 0;
90 }
91
92 static u32 rtl8231_read_cached(struct rtl8231_gpios *gpios, u32 reg)
93 {
94 if (reg > 0x1f)
95 return 0;
96
97 if (gpios->reg_cached & (1 << reg))
98 return gpios->reg_shadow[reg];
99
100 return rtl8231_read(gpios, reg);
101 }
102
103 /* Set Direction of the RTL8231 pin:
104 * dir 1: input
105 * dir 0: output
106 */
107 static int rtl8231_pin_dir(struct rtl8231_gpios *gpios, u32 gpio, u32 dir)
108 {
109 u32 v;
110 int pin_sel_addr = RTL8231_GPIO_PIN_SEL(gpio);
111 int pin_dir_addr = RTL8231_GPIO_DIR(gpio);
112 int dpin = gpio % 16;
113
114 if (gpio > 31) {
115 pr_debug("WARNING: HIGH pin\n");
116 dpin += 5;
117 pin_dir_addr = pin_sel_addr;
118 }
119
120 v = rtl8231_read_cached(gpios, pin_dir_addr);
121 if (v & 0x80000000) {
122 pr_err("Error reading RTL8231\n");
123 return -1;
124 }
125
126 v = (v & ~(1 << dpin)) | (dir << dpin);
127 rtl8231_write(gpios, pin_dir_addr, v);
128 gpios->reg_shadow[pin_dir_addr] = v;
129 gpios->reg_cached |= 1 << pin_dir_addr;
130 return 0;
131 }
132
133 static int rtl8231_pin_dir_get(struct rtl8231_gpios *gpios, u32 gpio, u32 *dir)
134 {
135 /* dir 1: input
136 * dir 0: output
137 */
138
139 u32 v;
140 int pin_dir_addr = RTL8231_GPIO_DIR(gpio);
141 int pin = gpio % 16;
142
143 if (gpio > 31) {
144 pin_dir_addr = RTL8231_GPIO_PIN_SEL(gpio);
145 pin += 5;
146 }
147
148 v = rtl8231_read(gpios, pin_dir_addr);
149 if (v & (1 << pin))
150 *dir = 1;
151 else
152 *dir = 0;
153 return 0;
154 }
155
156 static int rtl8231_pin_set(struct rtl8231_gpios *gpios, u32 gpio, u32 data)
157 {
158 u32 v = rtl8231_read(gpios, RTL8231_GPIO_DATA(gpio));
159
160 pr_debug("%s: %d to %d\n", __func__, gpio, data);
161 if (v & 0x80000000) {
162 pr_err("Error reading RTL8231\n");
163 return -1;
164 }
165 v = (v & ~(1 << (gpio % 16))) | (data << (gpio % 16));
166 rtl8231_write(gpios, RTL8231_GPIO_DATA(gpio), v);
167 gpios->reg_shadow[RTL8231_GPIO_DATA(gpio)] = v;
168 gpios->reg_cached |= 1 << RTL8231_GPIO_DATA(gpio);
169 return 0;
170 }
171
172 static int rtl8231_pin_get(struct rtl8231_gpios *gpios, u32 gpio, u16 *state)
173 {
174 u32 v = rtl8231_read(gpios, RTL8231_GPIO_DATA(gpio));
175
176 if (v & 0x80000000) {
177 pr_err("Error reading RTL8231\n");
178 return -1;
179 }
180
181 *state = v & 0xffff;
182 return 0;
183 }
184
185 static int rtl8231_direction_input(struct gpio_chip *gc, unsigned int offset)
186 {
187 int err;
188 struct rtl8231_gpios *gpios = gpiochip_get_data(gc);
189
190 pr_debug("%s: %d\n", __func__, offset);
191 mutex_lock(&miim_lock);
192 err = rtl8231_pin_dir(gpios, offset, 1);
193 mutex_unlock(&miim_lock);
194 return err;
195 }
196
197 static int rtl8231_direction_output(struct gpio_chip *gc, unsigned int offset, int value)
198 {
199 int err;
200 struct rtl8231_gpios *gpios = gpiochip_get_data(gc);
201
202 pr_debug("%s: %d\n", __func__, offset);
203 mutex_lock(&miim_lock);
204 err = rtl8231_pin_dir(gpios, offset, 0);
205 mutex_unlock(&miim_lock);
206 if (!err)
207 err = rtl8231_pin_set(gpios, offset, value);
208 return err;
209 }
210
211 static int rtl8231_get_direction(struct gpio_chip *gc, unsigned int offset)
212 {
213 u32 v = 0;
214 struct rtl8231_gpios *gpios = gpiochip_get_data(gc);
215
216 pr_debug("%s: %d\n", __func__, offset);
217 mutex_lock(&miim_lock);
218 rtl8231_pin_dir_get(gpios, offset, &v);
219 mutex_unlock(&miim_lock);
220 return v;
221 }
222
223 static int rtl8231_gpio_get(struct gpio_chip *gc, unsigned int offset)
224 {
225 u16 state = 0;
226 struct rtl8231_gpios *gpios = gpiochip_get_data(gc);
227
228 mutex_lock(&miim_lock);
229 rtl8231_pin_get(gpios, offset, &state);
230 mutex_unlock(&miim_lock);
231 if (state & (1 << (offset % 16)))
232 return 1;
233 return 0;
234 }
235
236 void rtl8231_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)
237 {
238 struct rtl8231_gpios *gpios = gpiochip_get_data(gc);
239
240 rtl8231_pin_set(gpios, offset, value);
241 }
242
243 int rtl8231_init(struct rtl8231_gpios *gpios)
244 {
245 u32 ret;
246
247 pr_info("%s called, MDIO bus ID: %d\n", __func__, gpios->smi_bus_id);
248
249 gpios->reg_cached = 0;
250
251 if (soc_info.family == RTL8390_FAMILY_ID) {
252 // RTL8390: Enable external gpio in global led control register
253 sw_w32_mask(0x7 << 18, 0x4 << 18, RTL839X_LED_GLB_CTRL);
254 } else if (soc_info.family == RTL8380_FAMILY_ID) {
255 // RTL8380: Enable RTL8231 indirect access mode
256 sw_w32_mask(0, 1, RTL838X_EXTRA_GPIO_CTRL);
257 sw_w32_mask(3, 1, RTL838X_DMY_REG5);
258 }
259
260 ret = rtl8231_read(gpios, RTL8231_LED_FUNC1);
261 if ((ret & 0x80000000) || ((ret & RTL8231_READY_MASK) != RTL8231_READY_VALUE))
262 return -ENXIO;
263
264 /* Select GPIO functionality and force input direction for pins 0-36 */
265 rtl8231_write(gpios, RTL8231_GPIO_PIN_SEL(0), 0xffff);
266 rtl8231_write(gpios, RTL8231_GPIO_DIR(0), 0xffff);
267 rtl8231_write(gpios, RTL8231_GPIO_PIN_SEL(16), 0xffff);
268 rtl8231_write(gpios, RTL8231_GPIO_DIR(16), 0xffff);
269 rtl8231_write(gpios, RTL8231_GPIO_PIN_SEL(32), 0x03ff);
270
271 /* Set LED_Start to enable drivers for output mode */
272 rtl8231_write(gpios, RTL8231_LED_FUNC0, 1 << 1);
273
274 return 0;
275 }
276
277 static const struct of_device_id rtl8231_gpio_of_match[] = {
278 { .compatible = "realtek,rtl8231-gpio" },
279 {},
280 };
281
282 MODULE_DEVICE_TABLE(of, rtl8231_gpio_of_match);
283
284 static int rtl8231_gpio_probe(struct platform_device *pdev)
285 {
286 struct device *dev = &pdev->dev;
287 struct device_node *np = dev->of_node;
288 struct rtl8231_gpios *gpios;
289 int err;
290
291 pr_info("Probing RTL8231 GPIOs\n");
292
293 if (!np) {
294 dev_err(&pdev->dev, "No DT found\n");
295 return -EINVAL;
296 }
297
298 gpios = devm_kzalloc(dev, sizeof(*gpios), GFP_KERNEL);
299 if (!gpios)
300 return -ENOMEM;
301
302 gpios->id = soc_info.id;
303 if (soc_info.family == RTL8380_FAMILY_ID) {
304 gpios->ext_gpio_indrt_access = RTL838X_EXT_GPIO_INDRT_ACCESS;
305 }
306
307 if (soc_info.family == RTL8390_FAMILY_ID) {
308 gpios->ext_gpio_indrt_access = RTL839X_EXT_GPIO_INDRT_ACCESS;
309 }
310
311 err = of_property_read_u32(np, "indirect-access-bus-id", &gpios->smi_bus_id);
312 if (!err && gpios->smi_bus_id > RTL8231_SMI_BUS_ID_MAX)
313 err = -EINVAL;
314
315 if (err) {
316 dev_err(dev, "invalid or missing indirect-access-bus-id\n");
317 return err;
318 }
319
320 err = rtl8231_init(gpios);
321 if (err) {
322 dev_err(dev, "no device found at bus address %d\n", gpios->smi_bus_id);
323 return err;
324 }
325
326 gpios->dev = dev;
327 gpios->gc.base = -1;
328 gpios->gc.ngpio = 37;
329 gpios->gc.label = "rtl8231";
330 gpios->gc.parent = dev;
331 gpios->gc.owner = THIS_MODULE;
332 gpios->gc.can_sleep = true;
333
334 gpios->gc.direction_input = rtl8231_direction_input;
335 gpios->gc.direction_output = rtl8231_direction_output;
336 gpios->gc.set = rtl8231_gpio_set;
337 gpios->gc.get = rtl8231_gpio_get;
338 gpios->gc.get_direction = rtl8231_get_direction;
339
340 err = devm_gpiochip_add_data(dev, &gpios->gc, gpios);
341 return err;
342 }
343
344 static struct platform_driver rtl8231_gpio_driver = {
345 .driver = {
346 .name = "rtl8231-gpio",
347 .of_match_table = rtl8231_gpio_of_match,
348 },
349 .probe = rtl8231_gpio_probe,
350 };
351
352 module_platform_driver(rtl8231_gpio_driver);
353
354 MODULE_DESCRIPTION("Realtek RTL8231 GPIO expansion chip support");
355 MODULE_LICENSE("GPL v2");