uboot-sunxi: bump u-boot version - update u-boot to 2014.01-rc1 - smp support on a20
[openwrt/openwrt.git] / target / linux / sunxi / patches-3.12 / 182-dt-sun5i-add-mmc.patch
1 From 36e4afca857c8b57bd661135d173bdf65b348f78 Mon Sep 17 00:00:00 2001
2 From: Hans de Goede <hdegoede@redhat.com>
3 Date: Sat, 14 Dec 2013 16:20:55 +0100
4 Subject: [PATCH] ARM: dts: sun5i: Add mmc support
5
6 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
7 ---
8 arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 32 ++++++++++++++++++++++
9 arch/arm/boot/dts/sun5i-a10s.dtsi | 34 ++++++++++++++++++++++++
10 arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts | 16 +++++++++++
11 arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 16 +++++++++++
12 arch/arm/boot/dts/sun5i-a13.dtsi | 17 ++++++++++++
13 5 files changed, 115 insertions(+)
14
15 diff --git a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
16 index 3c9f8b3..e53fb12 100644
17 --- a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
18 +++ b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
19 @@ -34,7 +34,39 @@
20 };
21 };
22
23 + sdc0: sdc@01c0f000 {
24 + pinctrl-names = "default";
25 + pinctrl-0 = <&sdc0_pins_a>;
26 + pinctrl-1 = <&mmc0_cd_pin_olinuxino_micro>;
27 + cd-gpios = <&pio 6 1 0>; /* PG1 */
28 + cd-mode = <1>;
29 + status = "okay";
30 + };
31 +
32 + sdc1: sdc@01c10000 {
33 + pinctrl-names = "default";
34 + pinctrl-0 = <&sdc1_pins_a>;
35 + pinctrl-1 = <&mmc1_cd_pin_olinuxino_micro>;
36 + cd-gpios = <&pio 6 13 0>; /* PG13 */
37 + cd-mode = <1>;
38 + status = "okay";
39 + };
40 +
41 pinctrl@01c20800 {
42 + mmc0_cd_pin_olinuxino_micro: mmc0_cd_pin@0 {
43 + allwinner,pins = "PG1";
44 + allwinner,function = "gpio_in";
45 + allwinner,drive = <0>;
46 + allwinner,pull = <0>;
47 + };
48 +
49 + mmc1_cd_pin_olinuxino_micro: mmc1_cd_pin@0 {
50 + allwinner,pins = "PG13";
51 + allwinner,function = "gpio_in";
52 + allwinner,drive = <0>;
53 + allwinner,pull = <0>;
54 + };
55 +
56 led_pins_olinuxino: led_pins@0 {
57 allwinner,pins = "PE3";
58 allwinner,function = "gpio_out";
59 diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
60 index 83e183c..fdbc290 100644
61 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi
62 +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
63 @@ -274,6 +274,26 @@
64 #size-cells = <0>;
65 };
66
67 + sdc0: sdc@01c0f000 {
68 + compatible = "allwinner,sun5i-mmc";
69 + reg = <0x01c0f000 0x1000>;
70 + clocks = <&ahb_gates 8>, <&mmc0>;
71 + clock-names = "ahb", "mod";
72 + interrupts = <32>;
73 + bus-width = <4>;
74 + status = "disabled";
75 + };
76 +
77 + sdc1: sdc@01c10000 {
78 + compatible = "allwinner,sun5i-mmc";
79 + reg = <0x01c10000 0x1000>;
80 + clocks = <&ahb_gates 9>, <&mmc1>;
81 + clock-names = "ahb", "mod";
82 + interrupts = <33>;
83 + bus-width = <4>;
84 + status = "disabled";
85 + };
86 +
87 intc: interrupt-controller@01c20400 {
88 compatible = "allwinner,sun4i-ic";
89 reg = <0x01c20400 0x400>;
90 @@ -344,6 +364,20 @@
91 allwinner,drive = <0>;
92 allwinner,pull = <0>;
93 };
94 +
95 + sdc0_pins_a: sdc0@0 {
96 + allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
97 + allwinner,function = "mmc0";
98 + allwinner,drive = <3>;
99 + allwinner,pull = <1>;
100 + };
101 +
102 + sdc1_pins_a: sdc1@0 {
103 + allwinner,pins = "PG3","PG4","PG5","PG6","PG7","PG8";
104 + allwinner,function = "mmc1";
105 + allwinner,drive = <3>;
106 + allwinner,pull = <1>;
107 + };
108 };
109
110 timer@01c20c00 {
111 diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
112 index fe2ce0a..fbd4e7d 100644
113 --- a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
114 +++ b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
115 @@ -20,7 +20,23 @@
116 compatible = "olimex,a13-olinuxino-micro", "allwinner,sun5i-a13";
117
118 soc@01c00000 {
119 + sdc0: sdc@01c0f000 {
120 + pinctrl-names = "default";
121 + pinctrl-0 = <&sdc0_pins_a>;
122 + pinctrl-1 = <&mmc0_cd_pin_olinuxinom>;
123 + cd-gpios = <&pio 6 0 0>; /* PG0 */
124 + cd-mode = <1>;
125 + status = "okay";
126 + };
127 +
128 pinctrl@01c20800 {
129 + mmc0_cd_pin_olinuxinom: mmc0_cd_pin@0 {
130 + allwinner,pins = "PG0";
131 + allwinner,function = "gpio_in";
132 + allwinner,drive = <0>;
133 + allwinner,pull = <0>;
134 + };
135 +
136 led_pins_olinuxinom: led_pins@0 {
137 allwinner,pins = "PG9";
138 allwinner,function = "gpio_out";
139 diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
140 index 9e508dc..ce22c81 100644
141 --- a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
142 +++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
143 @@ -23,7 +23,23 @@
144 };
145
146 soc@01c00000 {
147 + sdc0: sdc@01c0f000 {
148 + pinctrl-names = "default";
149 + pinctrl-0 = <&sdc0_pins_a>;
150 + pinctrl-1 = <&mmc0_cd_pin_olinuxino>;
151 + cd-gpios = <&pio 6 0 0>; /* PG0 */
152 + cd-mode = <1>;
153 + status = "okay";
154 + };
155 +
156 pinctrl@01c20800 {
157 + mmc0_cd_pin_olinuxino: mmc0_cd_pin@0 {
158 + allwinner,pins = "PG0";
159 + allwinner,function = "gpio_in";
160 + allwinner,drive = <0>;
161 + allwinner,pull = <0>;
162 + };
163 +
164 led_pins_olinuxino: led_pins@0 {
165 allwinner,pins = "PG9";
166 allwinner,function = "gpio_out";
167 diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
168 index 0bb4300..0ca0819 100644
169 --- a/arch/arm/boot/dts/sun5i-a13.dtsi
170 +++ b/arch/arm/boot/dts/sun5i-a13.dtsi
171 @@ -255,6 +255,16 @@
172 #size-cells = <1>;
173 ranges;
174
175 + sdc0: sdc@01c0f000 {
176 + compatible = "allwinner,sun5i-mmc";
177 + reg = <0x01c0f000 0x1000>;
178 + clocks = <&ahb_gates 8>, <&mmc0>;
179 + clock-names = "ahb", "mod";
180 + interrupts = <32>;
181 + bus-width = <4>;
182 + status = "disabled";
183 + };
184 +
185 intc: interrupt-controller@01c20400 {
186 compatible = "allwinner,sun4i-ic";
187 reg = <0x01c20400 0x400>;
188 @@ -307,6 +317,13 @@
189 allwinner,drive = <0>;
190 allwinner,pull = <0>;
191 };
192 +
193 + sdc0_pins_a: sdc0@0 {
194 + allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
195 + allwinner,function = "mmc0";
196 + allwinner,drive = <3>;
197 + allwinner,pull = <1>;
198 + };
199 };
200
201 timer@01c20c00 {
202 --
203 1.8.5.1
204