a2a430d9c1e9ad17c0fe256512f79cb6e917cb3c
[openwrt/openwrt.git] / target / linux / sunxi / patches-3.13 / 103-sunxi-clk-core-clock-protect.patch
1 From 7df19a0adca7806e081479eecb07365652c26ef5 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
3 Date: Fri, 20 Sep 2013 22:03:12 -0300
4 Subject: [PATCH] clk: sunxi: protect core clocks from accidental shutdown
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 Some important clocks may get disabled as a side effect of another clock
10 being disabled, because they have no consumers. This patch implements a
11 mechanism so those clocks can be claimed by the driver and therefore
12 remain enabled at all times.
13
14 Signed-off-by: Emilio López <emilio@elopez.com.ar>
15 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
16
17 Conflicts:
18 drivers/clk/sunxi/clk-sunxi.c
19 ---
20 drivers/clk/sunxi/clk-sunxi.c | 28 ++++++++++++++++++++++++++++
21 1 file changed, 28 insertions(+)
22
23 diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
24 index 9bbd035..8fc1375 100644
25 --- a/drivers/clk/sunxi/clk-sunxi.c
26 +++ b/drivers/clk/sunxi/clk-sunxi.c
27 @@ -616,6 +616,31 @@ static void __init of_sunxi_table_clock_setup(const struct of_device_id *clk_mat
28 }
29 }
30
31 +/**
32 + * System clock protection
33 + *
34 + * By enabling these critical clocks, we prevent their accidental gating
35 + * by the framework
36 + */
37 +static void __init sunxi_clock_protect(void)
38 +{
39 + struct clk *clk;
40 +
41 + /* memory bus clock - sun5i+ */
42 + clk = clk_get(NULL, "mbus");
43 + if (!IS_ERR(clk)) {
44 + clk_prepare_enable(clk);
45 + clk_put(clk);
46 + }
47 +
48 + /* DDR clock - sun4i+ */
49 + clk = clk_get(NULL, "pll5_ddr");
50 + if (!IS_ERR(clk)) {
51 + clk_prepare_enable(clk);
52 + clk_put(clk);
53 + }
54 +}
55 +
56 static void __init sunxi_init_clocks(struct device_node *np)
57 {
58 /* Register factor clocks */
59 @@ -629,6 +654,9 @@ static void __init sunxi_init_clocks(struct device_node *np)
60
61 /* Register gate clocks */
62 of_sunxi_table_clock_setup(clk_gates_match, sunxi_gates_clk_setup);
63 +
64 + /* Enable core system clocks */
65 + sunxi_clock_protect();
66 }
67 CLK_OF_DECLARE(sun4i_a10_clk_init, "allwinner,sun4i-a10", sunxi_init_clocks);
68 CLK_OF_DECLARE(sun5i_a10s_clk_init, "allwinner,sun5i-a10s", sunxi_init_clocks);
69 --
70 1.8.5.1
71