target/linux/sunxi/patches-3.13/130-dt-sunxi-add-mbusclk.patch

   1 From 538d4a6ca5f41039d906f28be82e0f4d26ec8ac9 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
   3 Date: Mon, 23 Dec 2013 00:32:44 -0300
   4 Subject: [PATCH] ARM: sunxi: dt: add nodes for the mbus clock
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 mbus is the memory bus clock, and it is present on both sun5i and sun7i
  10 machines. Its register layout is compatible with the mod0 one.
  11
  12 Signed-off-by: Emilio López <emilio@elopez.com.ar>
  13 Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
  14 ---
  15  arch/arm/boot/dts/sun5i-a10s.dtsi | 8 ++++++++
  16  arch/arm/boot/dts/sun5i-a13.dtsi  | 8 ++++++++
  17  arch/arm/boot/dts/sun7i-a20.dtsi  | 8 ++++++++
  18  3 files changed, 24 insertions(+)
  19
  20 diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
  21 index 96c7185..78360b3 100644
  22 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi
  23 +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
  24 @@ -261,6 +261,14 @@
  25                         clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
  26                         clock-output-names = "ir0";
  27                 };
  28 +
  29 +               mbus_clk: clk@01c2015c {
  30 +                       #clock-cells = <0>;
  31 +                       compatible = "allwinner,sun4i-mod0-clk";
  32 +                       reg = <0x01c2015c 0x4>;
  33 +                       clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
  34 +                       clock-output-names = "mbus";
  35 +               };
  36         };
  37
  38         soc@01c00000 {
  39 diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
  40 index e2505d6..2f37ca5 100644
  41 --- a/arch/arm/boot/dts/sun5i-a13.dtsi
  42 +++ b/arch/arm/boot/dts/sun5i-a13.dtsi
  43 @@ -258,6 +258,14 @@
  44                         clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
  45                         clock-output-names = "ir0";
  46                 };
  47 +
  48 +               mbus_clk: clk@01c2015c {
  49 +                       #clock-cells = <0>;
  50 +                       compatible = "allwinner,sun4i-mod0-clk";
  51 +                       reg = <0x01c2015c 0x4>;
  52 +                       clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
  53 +                       clock-output-names = "mbus";
  54 +               };
  55         };
  56
  57         soc@01c00000 {
  58 diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
  59 index f6ee631..4c25f81 100644
  60 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
  61 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
  62 @@ -294,6 +294,14 @@
  63                         clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
  64                         clock-output-names = "spi3";
  65                 };
  66 +
  67 +               mbus_clk: clk@01c2015c {
  68 +                       #clock-cells = <0>;
  69 +                       compatible = "allwinner,sun4i-mod0-clk";
  70 +                       reg = <0x01c2015c 0x4>;
  71 +                       clocks = <&osc24M>, <&pll6 2>, <&pll5 1>;
  72 +                       clock-output-names = "mbus";
  73 +               };
  74         };
  75
  76         soc@01c00000 {
  77 --
  78 1.8.5.1
  79