target/linux/sunxi/patches-3.13/151-pinctrl-sun5i-a13-port-F.patch

   1 From 33b0123664b627005728cfe7b1967b790392ceec Mon Sep 17 00:00:00 2001
   2 From: Hans de Goede <hdegoede@redhat.com>
   3 Date: Sat, 14 Dec 2013 17:20:13 +0100
   4 Subject: [PATCH] ARM: sunxi: fix sun5i-a13 port F multiplexing
   5
   6 The correct value for selecting the mmc0 function on port F pins is 2 not 4,
   7 as per the data-sheet:
   8 http://dl.linux-sunxi.org/A13/A13%20Datasheet%20-%20v1.12%20%282012-03-29%29.pdf
   9
  10 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
  11 Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
  12 ---
  13  drivers/pinctrl/pinctrl-sunxi-pins.h | 12 ++++++------
  14  1 file changed, 6 insertions(+), 6 deletions(-)
  15
  16 diff --git a/drivers/pinctrl/pinctrl-sunxi-pins.h b/drivers/pinctrl/pinctrl-sunxi-pins.h
  17 index 2c7446a..7c1b05e 100644
  18 --- a/drivers/pinctrl/pinctrl-sunxi-pins.h
  19 +++ b/drivers/pinctrl/pinctrl-sunxi-pins.h
  20 @@ -1932,27 +1932,27 @@
  21         SUNXI_PIN(SUNXI_PINCTRL_PIN_PF0,
  22                   SUNXI_FUNCTION(0x0, "gpio_in"),
  23                   SUNXI_FUNCTION(0x1, "gpio_out"),
  24 -                 SUNXI_FUNCTION(0x4, "mmc0")),         /* D1 */
  25 +                 SUNXI_FUNCTION(0x2, "mmc0")),         /* D1 */
  26         SUNXI_PIN(SUNXI_PINCTRL_PIN_PF1,
  27                   SUNXI_FUNCTION(0x0, "gpio_in"),
  28                   SUNXI_FUNCTION(0x1, "gpio_out"),
  29 -                 SUNXI_FUNCTION(0x4, "mmc0")),         /* D0 */
  30 +                 SUNXI_FUNCTION(0x2, "mmc0")),         /* D0 */
  31         SUNXI_PIN(SUNXI_PINCTRL_PIN_PF2,
  32                   SUNXI_FUNCTION(0x0, "gpio_in"),
  33                   SUNXI_FUNCTION(0x1, "gpio_out"),
  34 -                 SUNXI_FUNCTION(0x4, "mmc0")),         /* CLK */
  35 +                 SUNXI_FUNCTION(0x2, "mmc0")),         /* CLK */
  36         SUNXI_PIN(SUNXI_PINCTRL_PIN_PF3,
  37                   SUNXI_FUNCTION(0x0, "gpio_in"),
  38                   SUNXI_FUNCTION(0x1, "gpio_out"),
  39 -                 SUNXI_FUNCTION(0x4, "mmc0")),         /* CMD */
  40 +                 SUNXI_FUNCTION(0x2, "mmc0")),         /* CMD */
  41         SUNXI_PIN(SUNXI_PINCTRL_PIN_PF4,
  42                   SUNXI_FUNCTION(0x0, "gpio_in"),
  43                   SUNXI_FUNCTION(0x1, "gpio_out"),
  44 -                 SUNXI_FUNCTION(0x4, "mmc0")),         /* D3 */
  45 +                 SUNXI_FUNCTION(0x2, "mmc0")),         /* D3 */
  46         SUNXI_PIN(SUNXI_PINCTRL_PIN_PF5,
  47                   SUNXI_FUNCTION(0x0, "gpio_in"),
  48                   SUNXI_FUNCTION(0x1, "gpio_out"),
  49 -                 SUNXI_FUNCTION(0x4, "mmc0")),         /* D2 */
  50 +                 SUNXI_FUNCTION(0x2, "mmc0")),         /* D2 */
  51         /* Hole */
  52         SUNXI_PIN(SUNXI_PINCTRL_PIN_PG0,
  53                   SUNXI_FUNCTION(0x0, "gpio_in"),
  54 --
  55 1.8.5.1
  56