upgrade 3.13 targets to 3.13.2, refresh patches
[openwrt/openwrt.git] / target / linux / sunxi / patches-3.13 / 162-2-dt-sun7i-add-ahci-nodes.patch
1 From 4ce1f4c3ab04a697e9861b77582077b905b3f8a0 Mon Sep 17 00:00:00 2001
2 From: Hans de Goede <hdegoede@redhat.com>
3 Date: Fri, 3 Jan 2014 10:27:51 +0100
4 Subject: [PATCH] ARM: sun7i: dts: Add ahci / sata support
5
6 This patch adds sunxi sata support to A20 boards that have such a connector.
7 Some boards also feature a regulator via a GPIO and support for this is also
8 added.
9
10 Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
11 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
12 ---
13 arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 27 +++++++++++++++++++++++++
14 arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 27 +++++++++++++++++++++++++
15 arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 26 ++++++++++++++++++++++++
16 arch/arm/boot/dts/sun7i-a20.dtsi | 9 +++++++++
17 4 files changed, 89 insertions(+)
18
19 --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
20 +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
21 @@ -43,7 +43,19 @@
22 status = "okay";
23 };
24
25 + sata: ahci@01c18000 {
26 + pwr-supply = <&reg_ahci_5v>;
27 + status = "okay";
28 + };
29 +
30 pinctrl@01c20800 {
31 + ahci_pwr_pin_cubieboard2: ahci_pwr_pin@0 {
32 + allwinner,pins = "PB8";
33 + allwinner,function = "gpio_out";
34 + allwinner,drive = <0>;
35 + allwinner,pull = <0>;
36 + };
37 +
38 mmc0_cd_pin_cubieboard2: mmc0_cd_pin@0 {
39 allwinner,pins = "PH1";
40 allwinner,function = "gpio_in";
41 @@ -93,4 +105,19 @@
42 gpios = <&pio 7 20 0>;
43 };
44 };
45 +
46 + regulators {
47 + compatible = "simple-bus";
48 + pinctrl-names = "default";
49 +
50 + reg_ahci_5v: ahci-5v {
51 + compatible = "regulator-fixed";
52 + regulator-name = "ahci-5v";
53 + regulator-min-microvolt = <5000000>;
54 + regulator-max-microvolt = <5000000>;
55 + pinctrl-0 = <&ahci_pwr_pin_cubieboard2>;
56 + gpio = <&pio 1 8 0>;
57 + enable-active-high;
58 + };
59 + };
60 };
61 --- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
62 +++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
63 @@ -43,6 +43,11 @@
64 status = "okay";
65 };
66
67 + sata: ahci@01c18000 {
68 + pwr-supply = <&reg_ahci_5v>;
69 + status = "okay";
70 + };
71 +
72 pinctrl@01c20800 {
73 mmc0_cd_pin_cubietruck: mmc0_cd_pin@0 {
74 allwinner,pins = "PH1";
75 @@ -58,6 +63,13 @@
76 allwinner,pull = <0>;
77 };
78
79 + ahci_pwr_pin_cubietruck: ahci_pwr_pin@0 {
80 + allwinner,pins = "PH12";
81 + allwinner,function = "gpio_out";
82 + allwinner,drive = <0>;
83 + allwinner,pull = <0>;
84 + };
85 +
86 led_pins_cubietruck: led_pins@0 {
87 allwinner,pins = "PH7", "PH11", "PH20", "PH21";
88 allwinner,function = "gpio_out";
89 @@ -149,4 +161,19 @@
90 gpio = <&pio 7 3 0>;
91 };
92 };
93 +
94 + regulators {
95 + compatible = "simple-bus";
96 + pinctrl-names = "default";
97 +
98 + reg_ahci_5v: ahci-5v {
99 + compatible = "regulator-fixed";
100 + regulator-name = "ahci-5v";
101 + regulator-min-microvolt = <5000000>;
102 + regulator-max-microvolt = <5000000>;
103 + pinctrl-0 = <&ahci_pwr_pin_cubietruck>;
104 + gpio = <&pio 7 12 0>;
105 + enable-active-high;
106 + };
107 + };
108 };
109 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
110 +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
111 @@ -52,7 +52,19 @@
112 status = "okay";
113 };
114
115 + sata: ahci@01c18000 {
116 + pwr-supply = <&reg_ahci_5v>;
117 + status = "okay";
118 + };
119 +
120 pinctrl@01c20800 {
121 + ahci_pwr_pin_olinuxinom: ahci_pwr_pin@0 {
122 + allwinner,pins = "PB8";
123 + allwinner,function = "gpio_out";
124 + allwinner,drive = <0>;
125 + allwinner,pull = <0>;
126 + };
127 +
128 mmc0_cd_pin_olinuxinom: mmc0_cd_pin@0 {
129 allwinner,pins = "PH1";
130 allwinner,function = "gpio_in";
131 @@ -123,4 +135,18 @@
132 default-state = "on";
133 };
134 };
135 +
136 + regulators {
137 + compatible = "simple-bus";
138 +
139 + reg_ahci_5v: ahci-5v {
140 + compatible = "regulator-fixed";
141 + regulator-name = "ahci-5v";
142 + regulator-min-microvolt = <5000000>;
143 + regulator-max-microvolt = <5000000>;
144 + pinctrl-0 = <&ahci_pwr_pin_olinuxinom>;
145 + gpio = <&pio 1 8 0>;
146 + enable-active-high;
147 + };
148 + };
149 };
150 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
151 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
152 @@ -433,6 +433,15 @@
153 };
154 };
155
156 + sata: ahci@01c18000 {
157 + compatible = "allwinner,sun4i-a10-ahci";
158 + reg = <0x01c18000 0x1000>;
159 + interrupts = <0 56 1>;
160 + clocks = <&ahb_gates 25>, <&pll6 0>;
161 + clock-names = "ahb_sata", "pll6_sata";
162 + status = "disabled";
163 + };
164 +
165 timer@01c20c00 {
166 compatible = "allwinner,sun4i-timer";
167 reg = <0x01c20c00 0x90>;