target/linux/sunxi/patches-3.13/173-1-dt-sun4i-add-mmc.patch

   1 From 6c6bc98f6a2b1f91071564efdb77c90307610018 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?David=20Lanzend=C3=B6rfer?= <david.lanzendoerfer@o2s.ch>
   3 Date: Sat, 15 Feb 2014 14:02:51 +0100
   4 Subject: [PATCH] ARM: dts: sun4i: Add support for mmc
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch>
  10 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
  11 ---
  12  arch/arm/boot/dts/sun4i-a10-a1000.dts      |  8 +++++
  13  arch/arm/boot/dts/sun4i-a10-cubieboard.dts |  8 +++++
  14  arch/arm/boot/dts/sun4i-a10.dtsi           | 54 ++++++++++++++++++++++++++++++
  15  3 files changed, 70 insertions(+)
  16
  17 diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts b/arch/arm/boot/dts/sun4i-a10-a1000.dts
  18 index d6ec839..4b2a694 100644
  19 --- a/arch/arm/boot/dts/sun4i-a10-a1000.dts
  20 +++ b/arch/arm/boot/dts/sun4i-a10-a1000.dts
  21 @@ -35,6 +35,14 @@
  22                         };
  23                 };
  24
  25 +               mmc0: mmc@01c0f000 {
  26 +                       pinctrl-names = "default", "default";
  27 +                       pinctrl-0 = <&mmc0_pins_a>;
  28 +                       pinctrl-1 = <&mmc0_cd_pin_reference_design>;
  29 +                       cd-gpios = <&pio 7 1 0>; /* PH1 */
  30 +                       status = "okay";
  31 +               };
  32 +
  33                 ahci: sata@01c18000 {
  34                         status = "okay";
  35                 };
  36 diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
  37 index 6df237d8..ef85b8e 100644
  38 --- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
  39 +++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
  40 @@ -34,6 +34,14 @@
  41                         };
  42                 };
  43
  44 +               mmc0: mmc@01c0f000 {
  45 +                       pinctrl-names = "default", "default";
  46 +                       pinctrl-0 = <&mmc0_pins_a>;
  47 +                       pinctrl-1 = <&mmc0_cd_pin_reference_design>;
  48 +                       cd-gpios = <&pio 7 1 0>; /* PH1 */
  49 +                       status = "okay";
  50 +               };
  51 +
  52                 ahci: sata@01c18000 {
  53                         target-supply = <&reg_ahci_5v>;
  54                         status = "okay";
  55 diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
  56 index 454077a..a8e0df3 100644
  57 --- a/arch/arm/boot/dts/sun4i-a10.dtsi
  58 +++ b/arch/arm/boot/dts/sun4i-a10.dtsi
  59 @@ -338,6 +338,46 @@
  60                         #size-cells = <0>;
  61                 };
  62
  63 +               mmc0: mmc@01c0f000 {
  64 +                       compatible = "allwinner,sun5i-a13-mmc";
  65 +                       reg = <0x01c0f000 0x1000>;
  66 +                       clocks = <&ahb_gates 8>, <&mmc0_clk>;
  67 +                       clock-names = "ahb", "mod";
  68 +                       interrupts = <32>;
  69 +                       bus-width = <4>;
  70 +                       status = "disabled";
  71 +               };
  72 +
  73 +               mmc1: mmc@01c10000 {
  74 +                       compatible = "allwinner,sun5i-a13-mmc";
  75 +                       reg = <0x01c10000 0x1000>;
  76 +                       clocks = <&ahb_gates 9>, <&mmc1_clk>;
  77 +                       clock-names = "ahb", "mod";
  78 +                       interrupts = <33>;
  79 +                       bus-width = <4>;
  80 +                       status = "disabled";
  81 +               };
  82 +
  83 +               mmc2: mmc@01c11000 {
  84 +                       compatible = "allwinner,sun5i-a13-mmc";
  85 +                       reg = <0x01c11000 0x1000>;
  86 +                       clocks = <&ahb_gates 10>, <&mmc2_clk>;
  87 +                       clock-names = "ahb", "mod";
  88 +                       interrupts = <34>;
  89 +                       bus-width = <4>;
  90 +                       status = "disabled";
  91 +               };
  92 +
  93 +               mmc3: mmc@01c12000 {
  94 +                       compatible = "allwinner,sun5i-a13-mmc";
  95 +                       reg = <0x01c12000 0x1000>;
  96 +                       clocks = <&ahb_gates 11>, <&mmc3_clk>;
  97 +                       clock-names = "ahb", "mod";
  98 +                       interrupts = <35>;
  99 +                       bus-width = <4>;
 100 +                       status = "disabled";
 101 +               };
 102 +
 103                 ahci: sata@01c18000 {
 104                         compatible = "allwinner,sun4i-a10-ahci";
 105                         reg = <0x01c18000 0x1000>;
 106 @@ -416,6 +456,20 @@
 107                                 allwinner,drive = <0>;
 108                                 allwinner,pull = <0>;
 109                         };
 110 +
 111 +                       mmc0_pins_a: mmc0@0 {
 112 +                               allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
 113 +                               allwinner,function = "mmc0";
 114 +                               allwinner,drive = <3>;
 115 +                               allwinner,pull = <0>;
 116 +                       };
 117 +
 118 +                       mmc0_cd_pin_reference_design: mmc0_cd_pin@0 {
 119 +                               allwinner,pins = "PH1";
 120 +                               allwinner,function = "gpio_in";
 121 +                               allwinner,drive = <0>;
 122 +                               allwinner,pull = <1>;
 123 +                       };
 124                 };
 125
 126                 timer@01c20c00 {
 127 --
 128 1.8.5.5
 129