target/linux/sunxi/patches-3.13/185-1-dt-sun5i-add-usbclock-nodes.patch

   1 From 84e5402d6755b0563cfbe1b6b930b13b1c10d56c Mon Sep 17 00:00:00 2001
   2 From: Roman Byshko <rbyshko@gmail.com>
   3 Date: Tue, 24 Sep 2013 20:02:39 +0200
   4 Subject: [PATCH] ARM: sun5i: dt: Add bindings for USB clocks
   5
   6 Signed-off-by: Roman Byshko <rbyshko@gmail.com>
   7 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
   8 ---
   9  arch/arm/boot/dts/sun5i-a10s.dtsi | 9 +++++++++
  10  arch/arm/boot/dts/sun5i-a13.dtsi  | 9 +++++++++
  11  2 files changed, 18 insertions(+)
  12
  13 diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
  14 index 95cb245..0565040 100644
  15 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi
  16 +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
  17 @@ -268,6 +268,15 @@
  18                         clock-output-names = "ir0";
  19                 };
  20
  21 +               usb_clk: clk@01c200cc {
  22 +                       #clock-cells = <1>;
  23 +                       #reset-cells = <1>;
  24 +                       compatible = "allwinner,sun5i-a13-usb-clk";
  25 +                       reg = <0x01c200cc 0x4>;
  26 +                       clocks = <&pll6 1>;
  27 +                       clock-output-names = "usb_ohci0", "usb_phy";
  28 +               };
  29 +
  30                 mbus_clk: clk@01c2015c {
  31                         #clock-cells = <0>;
  32                         compatible = "allwinner,sun4i-mod0-clk";
  33 diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
  34 index bae0f5f..785dea5 100644
  35 --- a/arch/arm/boot/dts/sun5i-a13.dtsi
  36 +++ b/arch/arm/boot/dts/sun5i-a13.dtsi
  37 @@ -266,6 +266,15 @@
  38                         clock-output-names = "ir0";
  39                 };
  40
  41 +               usb_clk: clk@01c200cc {
  42 +                       #clock-cells = <1>;
  43 +                       #reset-cells = <1>;
  44 +                       compatible = "allwinner,sun5i-a13-usb-clk";
  45 +                       reg = <0x01c200cc 0x4>;
  46 +                       clocks = <&pll6 1>;
  47 +                       clock-output-names = "usb_ohci0", "usb_phy";
  48 +               };
  49 +
  50                 mbus_clk: clk@01c2015c {
  51                         #clock-cells = <0>;
  52                         compatible = "allwinner,sun4i-mod0-clk";
  53 --
  54 1.8.5.5
  55