target/linux/sunxi/patches-3.14/131-dt-sun5i-add-usbclock-bindings.patch

   1 From 5b08dd0d672b59fff16d02239ca6a36aaecdb1ca Mon Sep 17 00:00:00 2001
   2 From: Roman Byshko <rbyshko@gmail.com>
   3 Date: Fri, 7 Feb 2014 16:21:52 +0100
   4 Subject: [PATCH] ARM: sun5i: dt: Add bindings for USB clocks
   5
   6 Signed-off-by: Roman Byshko <rbyshko@gmail.com>
   7 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
   8 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
   9 ---
  10  arch/arm/boot/dts/sun5i-a10s.dtsi | 9 +++++++++
  11  arch/arm/boot/dts/sun5i-a13.dtsi  | 9 +++++++++
  12  2 files changed, 18 insertions(+)
  13
  14 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi
  15 +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
  16 @@ -272,6 +272,15 @@
  17                         clock-output-names = "ir0";
  18                 };
  19
  20 +               usb_clk: clk@01c200cc {
  21 +                       #clock-cells = <1>;
  22 +                       #reset-cells = <1>;
  23 +                       compatible = "allwinner,sun5i-a13-usb-clk";
  24 +                       reg = <0x01c200cc 0x4>;
  25 +                       clocks = <&pll6 1>;
  26 +                       clock-output-names = "usb_ohci0", "usb_phy";
  27 +               };
  28 +
  29                 mbus_clk: clk@01c2015c {
  30                         #clock-cells = <0>;
  31                         compatible = "allwinner,sun4i-mod0-clk";
  32 --- a/arch/arm/boot/dts/sun5i-a13.dtsi
  33 +++ b/arch/arm/boot/dts/sun5i-a13.dtsi
  34 @@ -274,6 +274,15 @@
  35                         clock-output-names = "ir0";
  36                 };
  37
  38 +               usb_clk: clk@01c200cc {
  39 +                       #clock-cells = <1>;
  40 +                       #reset-cells = <1>;
  41 +                       compatible = "allwinner,sun5i-a13-usb-clk";
  42 +                       reg = <0x01c200cc 0x4>;
  43 +                       clocks = <&pll6 1>;
  44 +                       clock-output-names = "usb_ohci0", "usb_phy";
  45 +               };
  46 +
  47                 mbus_clk: clk@01c2015c {
  48                         #clock-cells = <0>;
  49                         compatible = "allwinner,sun4i-mod0-clk";