target/linux/sunxi/patches-3.14/145-1-dt-sun7i-add-a20-spi.patch

   1 From c9bfaadf8973cb4d9074e80c4bf8708deca62712 Mon Sep 17 00:00:00 2001
   2 From: Maxime Ripard <maxime.ripard@free-electrons.com>
   3 Date: Sat, 22 Feb 2014 22:35:54 +0100
   4 Subject: [PATCH] ARM: dt: sun7i: Add A20 SPI controller nodes
   5
   6 The A20 has 4 SPI controllers compatible with the one found in the A10. Add
   7 them in the DT.
   8
   9 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
  10 ---
  11  arch/arm/boot/dts/sun7i-a20.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++
  12  1 file changed, 44 insertions(+)
  13
  14 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
  15 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
  16 @@ -401,6 +401,28 @@
  17                 #size-cells = <1>;
  18                 ranges;
  19
  20 +               spi0: spi@01c05000 {
  21 +                       compatible = "allwinner,sun4i-a10-spi";
  22 +                       reg = <0x01c05000 0x1000>;
  23 +                       interrupts = <0 10 4>;
  24 +                       clocks = <&ahb_gates 20>, <&spi0_clk>;
  25 +                       clock-names = "ahb", "mod";
  26 +                       status = "disabled";
  27 +                       #address-cells = <1>;
  28 +                       #size-cells = <0>;
  29 +               };
  30 +
  31 +               spi1: spi@01c06000 {
  32 +                       compatible = "allwinner,sun4i-a10-spi";
  33 +                       reg = <0x01c06000 0x1000>;
  34 +                       interrupts = <0 11 4>;
  35 +                       clocks = <&ahb_gates 21>, <&spi1_clk>;
  36 +                       clock-names = "ahb", "mod";
  37 +                       status = "disabled";
  38 +                       #address-cells = <1>;
  39 +                       #size-cells = <0>;
  40 +               };
  41 +
  42                 emac: ethernet@01c0b000 {
  43                         compatible = "allwinner,sun4i-a10-emac";
  44                         reg = <0x01c0b000 0x1000>;
  45 @@ -417,6 +439,28 @@
  46                         #size-cells = <0>;
  47                 };
  48
  49 +               spi2: spi@01c17000 {
  50 +                       compatible = "allwinner,sun4i-a10-spi";
  51 +                       reg = <0x01c17000 0x1000>;
  52 +                       interrupts = <0 12 4>;
  53 +                       clocks = <&ahb_gates 22>, <&spi2_clk>;
  54 +                       clock-names = "ahb", "mod";
  55 +                       status = "disabled";
  56 +                       #address-cells = <1>;
  57 +                       #size-cells = <0>;
  58 +               };
  59 +
  60 +               spi3: spi@01c1f000 {
  61 +                       compatible = "allwinner,sun4i-a10-spi";
  62 +                       reg = <0x01c1f000 0x1000>;
  63 +                       interrupts = <0 50 4>;
  64 +                       clocks = <&ahb_gates 23>, <&spi3_clk>;
  65 +                       clock-names = "ahb", "mod";
  66 +                       status = "disabled";
  67 +                       #address-cells = <1>;
  68 +                       #size-cells = <0>;
  69 +               };
  70 +
  71                 pio: pinctrl@01c20800 {
  72                         compatible = "allwinner,sun7i-a20-pinctrl";
  73                         reg = <0x01c20800 0x400>;