target/linux/sunxi/patches-4.9/0012-arm64-dts-fix-build-errors-from-missing-dependencies.patch

   1 From f98121f3ef3d36f4d040b11ab38f15387f6eefa2 Mon Sep 17 00:00:00 2001
   2 From: Arnd Bergmann <arnd@arndb.de>
   3 Date: Wed, 30 Nov 2016 15:08:55 +0100
   4 Subject: arm64: dts: fix build errors from missing dependencies
   5
   6 Two branches were incorrectly sent without having the necessary
   7 header file changes. Rather than back those out now, I'm replacing
   8 the symbolic names for the clks and resets with the numeric
   9 values to get 'make allmodconfig dtbs' back to work.
  10
  11 After the header file changes are merged, we can revert this
  12 patch.
  13
  14 Fixes: 6bc37fa ("arm64: dts: add Allwinner A64 SoC .dtsi")
  15 Fixes: 50784e6 ("dts: arm64: db820c: add pmic pins specific dts file")
  16 Acked-by: Andre Przywara <andre.przywara@arm.com>
  17 Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
  18 Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
  19 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
  20 ---
  21  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi      | 36 ++++++++++------------
  22  .../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi    |  2 +-
  23  2 files changed, 18 insertions(+), 20 deletions(-)
  24
  25 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
  26 +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
  27 @@ -42,10 +42,8 @@
  28   *     OTHER DEALINGS IN THE SOFTWARE.
  29   */
  30
  31 -#include <dt-bindings/clock/sun50i-a64-ccu.h>
  32  #include <dt-bindings/interrupt-controller/arm-gic.h>
  33  #include <dt-bindings/pinctrl/sun4i-a10.h>
  34 -#include <dt-bindings/reset/sun50i-a64-ccu.h>
  35
  36  / {
  37         interrupt-parent = <&gic>;
  38 @@ -137,7 +135,7 @@
  39                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
  40                                      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
  41                                      <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
  42 -                       clocks = <&ccu CLK_BUS_PIO>;
  43 +                       clocks = <&ccu 58>;
  44                         gpio-controller;
  45                         #gpio-cells = <3>;
  46                         interrupt-controller;
  47 @@ -160,8 +158,8 @@
  48                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
  49                         reg-shift = <2>;
  50                         reg-io-width = <4>;
  51 -                       clocks = <&ccu CLK_BUS_UART0>;
  52 -                       resets = <&ccu RST_BUS_UART0>;
  53 +                       clocks = <&ccu 67>;
  54 +                       resets = <&ccu 46>;
  55                         status = "disabled";
  56                 };
  57
  58 @@ -171,8 +169,8 @@
  59                         interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
  60                         reg-shift = <2>;
  61                         reg-io-width = <4>;
  62 -                       clocks = <&ccu CLK_BUS_UART1>;
  63 -                       resets = <&ccu RST_BUS_UART1>;
  64 +                       clocks = <&ccu 68>;
  65 +                       resets = <&ccu 47>;
  66                         status = "disabled";
  67                 };
  68
  69 @@ -182,8 +180,8 @@
  70                         interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
  71                         reg-shift = <2>;
  72                         reg-io-width = <4>;
  73 -                       clocks = <&ccu CLK_BUS_UART2>;
  74 -                       resets = <&ccu RST_BUS_UART2>;
  75 +                       clocks = <&ccu 69>;
  76 +                       resets = <&ccu 48>;
  77                         status = "disabled";
  78                 };
  79
  80 @@ -193,8 +191,8 @@
  81                         interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
  82                         reg-shift = <2>;
  83                         reg-io-width = <4>;
  84 -                       clocks = <&ccu CLK_BUS_UART3>;
  85 -                       resets = <&ccu RST_BUS_UART3>;
  86 +                       clocks = <&ccu 70>;
  87 +                       resets = <&ccu 49>;
  88                         status = "disabled";
  89                 };
  90
  91 @@ -204,8 +202,8 @@
  92                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
  93                         reg-shift = <2>;
  94                         reg-io-width = <4>;
  95 -                       clocks = <&ccu CLK_BUS_UART4>;
  96 -                       resets = <&ccu RST_BUS_UART4>;
  97 +                       clocks = <&ccu 71>;
  98 +                       resets = <&ccu 50>;
  99                         status = "disabled";
 100                 };
 101
 102 @@ -213,8 +211,8 @@
 103                         compatible = "allwinner,sun6i-a31-i2c";
 104                         reg = <0x01c2ac00 0x400>;
 105                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 106 -                       clocks = <&ccu CLK_BUS_I2C0>;
 107 -                       resets = <&ccu RST_BUS_I2C0>;
 108 +                       clocks = <&ccu 63>;
 109 +                       resets = <&ccu 42>;
 110                         status = "disabled";
 111                         #address-cells = <1>;
 112                         #size-cells = <0>;
 113 @@ -224,8 +222,8 @@
 114                         compatible = "allwinner,sun6i-a31-i2c";
 115                         reg = <0x01c2b000 0x400>;
 116                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 117 -                       clocks = <&ccu CLK_BUS_I2C1>;
 118 -                       resets = <&ccu RST_BUS_I2C1>;
 119 +                       clocks = <&ccu 64>;
 120 +                       resets = <&ccu 43>;
 121                         status = "disabled";
 122                         #address-cells = <1>;
 123                         #size-cells = <0>;
 124 @@ -235,8 +233,8 @@
 125                         compatible = "allwinner,sun6i-a31-i2c";
 126                         reg = <0x01c2b400 0x400>;
 127                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 128 -                       clocks = <&ccu CLK_BUS_I2C2>;
 129 -                       resets = <&ccu RST_BUS_I2C2>;
 130 +                       clocks = <&ccu 65>;
 131 +                       resets = <&ccu 44>;
 132                         status = "disabled";
 133                         #address-cells = <1>;
 134                         #size-cells = <0>;