target/linux/sunxi/patches-4.9/0024-arm64-allwinner-a64-add-r_ccu-node.patch

   1 From 791a9e001d3ba3b552888b0bf3c592a50b71f57e Mon Sep 17 00:00:00 2001
   2 From: Icenowy Zheng <icenowy@aosc.xyz>
   3 Date: Tue, 4 Apr 2017 17:50:58 +0800
   4 Subject: arm64: allwinner: a64: add r_ccu node
   5
   6 A64 SoC have a CCU (r_ccu) in PRCM block.
   7
   8 Add the device node for it.
   9
  10 The mux 3 of R_CCU is an internal oscillator, which is 16MHz according
  11 to the user manual, and has only 30% accuracy based on our experience
  12 on older SoCs. The real mesaured value of it on two Pine64 boards is
  13 around 11MHz, which is around 70% of 16MHz.
  14
  15 Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
  16 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
  17 ---
  18  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 17 +++++++++++++++++
  19  1 file changed, 17 insertions(+)
  20
  21 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
  22 +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
  23 @@ -98,6 +98,14 @@
  24                 clock-output-names = "osc32k";
  25         };
  26
  27 +       iosc: internal-osc-clk {
  28 +               #clock-cells = <0>;
  29 +               compatible = "fixed-clock";
  30 +               clock-frequency = <16000000>;
  31 +               clock-accuracy = <300000000>;
  32 +               clock-output-names = "iosc";
  33 +       };
  34 +
  35         psci {
  36                 compatible = "arm,psci-0.2";
  37                 method = "smc";
  38 @@ -389,5 +397,14 @@
  39                         interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
  40                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
  41                 };
  42 +
  43 +               r_ccu: clock@1f01400 {
  44 +                       compatible = "allwinner,sun50i-a64-r-ccu";
  45 +                       reg = <0x01f01400 0x100>;
  46 +                       clocks = <&osc24M>, <&osc32k>, <&iosc>;
  47 +                       clock-names = "hosc", "losc", "iosc";
  48 +                       #clock-cells = <1>;
  49 +                       #reset-cells = <1>;
  50 +               };
  51         };
  52  };