target/linux/sunxi/patches-5.4/450-arm64-dts-enable-wifi-on-pine64-boards.patch

   1 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
   2 +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
   3 @@ -78,6 +78,11 @@
   4                 regulator-min-microvolt = <1800000>;
   5                 regulator-max-microvolt = <1800000>;
   6         };
   7 +
   8 +       wifi_pwrseq: wifi_pwrseq {
   9 +               compatible = "mmc-pwrseq-simple";
  10 +               reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
  11 +       };
  12  };
  13
  14  &ac_power_supply {
  15 @@ -138,6 +143,21 @@
  16                 reg = <1>;
  17         };
  18  };
  19 +
  20 +&mmc1 {
  21 +       pinctrl-names = "default";
  22 +       pinctrl-0 = <&mmc1_pins>;
  23 +       vmmc-supply = <&reg_dldo4>;
  24 +       vqmmc-supply = <&reg_eldo1>;
  25 +       mmc-pwrseq = <&wifi_pwrseq>;
  26 +       bus-width = <4>;
  27 +       non-removable;
  28 +       status = "okay";
  29 +
  30 +       rtl8723cs: wifi@1 {
  31 +               reg = <1>;
  32 +       };
  33 +};
  34
  35  &mmc2 {
  36         pinctrl-names = "default";
  37 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
  38 +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
  39 @@ -73,6 +73,11 @@
  40                         };
  41                 };
  42         };
  43 +
  44 +       wifi_pwrseq: wifi_pwrseq {
  45 +               compatible = "mmc-pwrseq-simple";
  46 +               reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
  47 +       };
  48  };
  49
  50  &codec {
  51 @@ -146,6 +151,21 @@
  52         status = "okay";
  53  };
  54
  55 +&mmc1 {
  56 +       pinctrl-names = "default";
  57 +       pinctrl-0 = <&mmc1_pins>;
  58 +       vmmc-supply = <&reg_dldo4>;
  59 +       vqmmc-supply = <&reg_eldo1>;
  60 +       mmc-pwrseq = <&wifi_pwrseq>;
  61 +       bus-width = <4>;
  62 +       non-removable;
  63 +       status = "okay";
  64 +
  65 +       rtl8723cs: wifi@1 {
  66 +               reg = <1>;
  67 +       };
  68 +};
  69 +
  70  &ohci0 {
  71         status = "okay";
  72  };