ath79: Add support for OpenMesh OM5P

[openwrt/openwrt.git] / target / linux / ath79 / dts / ar934x.dtsi

diff --git a/target/linux/ath79/dts/ar934x.dtsi b/target/linux/ath79/dts/ar934x.dtsi
index c17623511b809d389a8d87ed42c66bc665680509..aa1003cdb5be3dd917152a1f6383874fe538e130 100644 (file)
--- a/target/linux/ath79/dts/ar934x.dtsi
+++ b/target/linux/ath79/dts/ar934x.dtsi
@@ -1,7 +1,5 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 
-#include <dt-bindings/clock/ath79-clk.h>
-
 #include "ath79.dtsi"
 
 / {
@@ -133,24 +131,19 @@
 
                                #reset-cells = <1>;
                        };
-               };
-
-               nand: nand@1b000200 {
-                       compatible = "qca,ar934x-nand";
-                       reg = <0x1b000200 0xb8>;
-
-                       interrupts = <21>;
-                       interrupt-parent = <&miscintc>;
 
-                       resets = <&rst 14>;
-                       reset-names = "nand";
+                       hs_uart: uart@18500000 {
+                               compatible = "qca,ar9330-uart";
+                               reg = <0x18500000 0x14>;
 
-                       nand-ecc-mode = "hw";
+                               interrupts = <6>;
+                               interrupt-parent = <&miscintc>;
 
-                       #address-cells = <1>;
-                       #size-cells = <0>;
+                               clocks = <&pll ATH79_CLK_UART1>;
+                               clock-names = "uart";
 
-                       status = "disabled";
+                               status = "disabled";
+                       };
                };
 
                gmac: gmac@18070000 {
@@ -182,6 +175,24 @@
                        status = "disabled";
                };
 
+               nand: nand@1b000200 {
+                       compatible = "qca,ar934x-nand";
+                       reg = <0x1b000200 0xb8>;
+
+                       interrupts = <21>;
+                       interrupt-parent = <&miscintc>;
+
+                       resets = <&rst 14>;
+                       reset-names = "nand";
+
+                       nand-ecc-mode = "hw";
+
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       status = "disabled";
+               };
+
                spi: spi@1f000000 {
                        compatible = "qca,ar934x-spi";
                        reg = <0x1f000000 0x1c>;
@@ -219,6 +230,8 @@
        pll-handle = <&pll>;
        resets = <&rst 9>, <&rst 22>;
        reset-names = "mac", "mdio";
+       clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>;
+       clock-names = "eth", "mdio";
 };
 
 &mdio1 {
@@ -261,6 +274,8 @@
 
        resets = <&rst 13>;
        reset-names = "mac";
+       clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>;
+       clock-names = "eth", "mdio";
        phy-mode = "gmii";
 
        fixed-link {