#include "vr9.dtsi"
#include <dt-bindings/input/input.h>
+#include <dt-bindings/mips/lantiq_rcu_gphy.h>
/ {
compatible = "avm,fritz3370", "lantiq,xway", "lantiq,vr9";
reg = <0x0 0x8000000>;
};
- fpi@10000000 {
- localbus@0 {
- nand-parts@0 {
- compatible = "lantiq,nand-xway";
- bank-width = <2>;
- reg = <1 0x0 0x2000000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition@0 {
- label = "kernel";
- reg = <0x0 0x400000>;
- };
-
- partition@400000 {
- label = "rootfs_ubi";
- reg = <0x400000 0x3000000>;
- };
-
- partition@3400000 {
- label = "vr9_firmware";
- reg = <0x3400000 0x400000>;
- };
- partition@3800000 {
- label = "reserved";
- reg = <0x3800000 0x3000000>;
- };
- partition@6800000 {
- label = "config";
- reg = <0x6800000 0x200000>;
- };
- partition@6a00000 {
- label = "nand-filesystem";
- reg = <0x6a00000 0x1600000>;
- };
- };
- };
- };
-
- gpio: pinmux@E100B10 {
- pinctrl-names = "default";
- pinctrl-0 = <&state_default>;
-
- state_default: pinmux {
- mdio {
- lantiq,groups = "mdio";
- lantiq,function = "mdio";
- };
- nand {
- lantiq,groups = "nand cle", "nand ale",
- "nand rd", "nand cs1", "nand rdy";
- lantiq,function = "ebu";
- lantiq,pull = <1>;
- };
- phy-rst {
- lantiq,pins = "io37", "io44";
- lantiq,pull = <0>;
- lantiq,open-drain = <0>;
- lantiq,output = <1>;
- };
- pcie-rst {
- lantiq,pins = "io38";
- lantiq,pull = <0>;
- lantiq,output = <1>;
- };
- };
- pins_spi_default: pins_spi_default {
- spi_in {
- lantiq,groups = "spi_di";
- lantiq,function = "spi";
- };
- spi_out {
- lantiq,groups = "spi_do", "spi_clk",
- "spi_cs4";
- lantiq,function = "spi";
- lantiq,output = <1>;
- };
- };
- };
-
- ifxhcd@E101000 {
- status = "okay";
- gpios = <&gpio 5 GPIO_ACTIVE_HIGH
- &gpio 14 GPIO_ACTIVE_HIGH>;
- lantiq,portmask = <0x3>;
- };
- };
-
- gphy-xrx200 {
- compatible = "lantiq,phy-xrx200";
- firmware = "lantiq/xrx200_phy11g_a14.bin";
- phys = [ 00 01 ];
- };
-
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
};
};
-&spi {
- pinctrl-names = "default";
- pinctrl-0 = <&pins_spi_default>;
-
- status = "ok";
-
- m25p80@4 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- reg = <4 0>;
- spi-max-frequency = <1000000>;
-
- urlader: partition@0 {
- reg = <0x0 0x20000>;
- label = "urlader";
- read-only;
- };
-
- partition@20000 {
- reg = <0x20000 0x10000>;
- label = "tffs (1)";
- read-only;
- };
-
- partition@30000 {
- reg = <0x30000 0x10000>;
- label = "tffs (2)";
- read-only;
- };
- };
-};
-
ð0 {
lan: interface@0 {
compatible = "lantiq,xrx200-pdi";
#address-cells = <1>;
#size-cells = <0>;
compatible = "lantiq,xrx200-mdio";
+ reg = <0>;
+
phy0: ethernet-phy@0 {
reg = <0x0>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
};
};
+&gphy0 {
+ lantiq,gphy-mode = <GPHY_MODE_GE>;
+};
+
+&gphy1 {
+ lantiq,gphy-mode = <GPHY_MODE_GE>;
+};
+
+&gpio {
+ pinctrl-names = "default";
+ pinctrl-0 = <&state_default>;
+
+ state_default: pinmux {
+ mdio {
+ lantiq,groups = "mdio";
+ lantiq,function = "mdio";
+ };
+ nand {
+ lantiq,groups = "nand cle", "nand ale",
+ "nand rd", "nand cs1", "nand rdy";
+ lantiq,function = "ebu";
+ lantiq,pull = <1>;
+ };
+ phy-rst {
+ lantiq,pins = "io37", "io44";
+ lantiq,pull = <0>;
+ lantiq,open-drain = <0>;
+ lantiq,output = <1>;
+ };
+ pcie-rst {
+ lantiq,pins = "io38";
+ lantiq,pull = <0>;
+ lantiq,output = <1>;
+ };
+ };
+ pins_spi_default: pins_spi_default {
+ spi_in {
+ lantiq,groups = "spi_di";
+ lantiq,function = "spi";
+ };
+ spi_out {
+ lantiq,groups = "spi_do", "spi_clk",
+ "spi_cs4";
+ lantiq,function = "spi";
+ lantiq,output = <1>;
+ };
+ };
+};
+
+&localbus {
+ nand@1 {
+ compatible = "lantiq,nand-xway";
+ bank-width = <2>;
+ reg = <1 0x0 0x2000000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "kernel";
+ reg = <0x0 0x400000>;
+ };
+
+ partition@400000 {
+ label = "rootfs_ubi";
+ reg = <0x400000 0x3000000>;
+ };
+
+ partition@3400000 {
+ label = "vr9_firmware";
+ reg = <0x3400000 0x400000>;
+ };
+ partition@3800000 {
+ label = "reserved";
+ reg = <0x3800000 0x3000000>;
+ };
+ partition@6800000 {
+ label = "config";
+ reg = <0x6800000 0x200000>;
+ };
+ partition@6a00000 {
+ label = "nand-filesystem";
+ reg = <0x6a00000 0x1600000>;
+ };
+ };
+ };
+};
+
&pcie0 {
pcie@0 {
reg = <0 0 0 0 0>;
};
};
};
+
+&spi {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_spi_default>;
+
+ m25p80@4 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <4 0>;
+ spi-max-frequency = <1000000>;
+
+ urlader: partition@0 {
+ reg = <0x0 0x20000>;
+ label = "urlader";
+ read-only;
+ };
+
+ partition@20000 {
+ reg = <0x20000 0x10000>;
+ label = "tffs (1)";
+ read-only;
+ };
+
+ partition@30000 {
+ reg = <0x30000 0x10000>;
+ label = "tffs (2)";
+ read-only;
+ };
+ };
+};
+
+/*
+ * TODO: add phy-supply, gpio 5 GPIO_ACTIVE_HIGH and gpio 14 GPIO_ACTIVE_HIGH are
+ * related
+ */
+&usb_phy0 {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};