lantiq: tweak DWC2 default parameters
authorJohn Crispin <john@openwrt.org>
Sat, 21 Nov 2015 21:25:20 +0000 (21:25 +0000)
committerJohn Crispin <john@openwrt.org>
Sat, 21 Nov 2015 21:25:20 +0000 (21:25 +0000)
This patch improves the default configuration of DWC2 on lantiq SoCs
somewhat:
 * Set maximum packet count to largest allowed value by the DWC2 (511)
 * Use 16-bit DMA bursts
 * Divide fifo buffers more evenly

Default fifo buffer sizes from original ltq-hcd driver seem really
irrational. For example according to DWC2 data book rxfifo size of 240
will not fit even a single full length USB packet. On the other hand
non-periodic tx fifo size of 240 is more than enough to fit one complete
packet.

Change the sizes around to improve the situation and to fix some issues
especially with isochronous USB transfers.

Signed-off-by: Antti Seppälä <a.seppala@gmail.com>
SVN-Revision: 47563

target/linux/lantiq/patches-3.18/0041-USB-DWC2-add-ltq-params.patch
target/linux/lantiq/patches-4.1/0041-USB-DWC2-add-ltq-params.patch

index a0af123..2d9cb0f 100644 (file)
 +      .speed                          = -1,
 +      .enable_dynamic_fifo            = -1,
 +      .en_multiple_tx_fifo            = -1,
-+      .host_rx_fifo_size              = 240,  /* 240 DWORDs */
-+      .host_nperio_tx_fifo_size       = 240,  /* 240 DWORDs */
-+      .host_perio_tx_fifo_size        = 32,   /* 32 DWORDs */
++      .host_rx_fifo_size              = 288,  /* 288 DWORDs */
++      .host_nperio_tx_fifo_size       = 128,  /* 128 DWORDs */
++      .host_perio_tx_fifo_size        = 96,   /* 96 DWORDs */
 +      .max_transfer_size              = -1,
-+      .max_packet_count               = -1,
++      .max_packet_count               = 511,
 +      .host_channels                  = -1,
 +      .phy_type                       = -1,
 +      .phy_utmi_width                 = -1,
@@ -28,7 +28,7 @@
 +      .host_ls_low_power_phy_clk      = -1,
 +      .ts_dline                       = -1,
 +      .reload_ctl                     = -1,
-+      .ahbcfg                         = -1,
++      .ahbcfg                         = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT,
 +      .uframe_sched                   = -1,
 +};
 +
index c55f5b6..0b5d09b 100644 (file)
 +      .speed                          = -1,
 +      .enable_dynamic_fifo            = -1,
 +      .en_multiple_tx_fifo            = -1,
-+      .host_rx_fifo_size              = 240,  /* 240 DWORDs */
-+      .host_nperio_tx_fifo_size       = 240,  /* 240 DWORDs */
-+      .host_perio_tx_fifo_size        = 32,   /* 32 DWORDs */
++      .host_rx_fifo_size              = 288,  /* 288 DWORDs */
++      .host_nperio_tx_fifo_size       = 128,  /* 128 DWORDs */
++      .host_perio_tx_fifo_size        = 96,   /* 96 DWORDs */
 +      .max_transfer_size              = -1,
-+      .max_packet_count               = -1,
++      .max_packet_count               = 511,
 +      .host_channels                  = -1,
 +      .phy_type                       = -1,
 +      .phy_utmi_width                 = -1,
@@ -28,7 +28,7 @@
 +      .host_ls_low_power_phy_clk      = -1,
 +      .ts_dline                       = -1,
 +      .reload_ctl                     = -1,
-+      .ahbcfg                         = -1,
++      .ahbcfg                         = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT,
 +      .uframe_sched                   = -1,
 +};
 +