package/ifxmips-dsl-api: refresh patches
authorGabor Juhos <juhosg@openwrt.org>
Fri, 26 Mar 2010 14:28:31 +0000 (14:28 +0000)
committerGabor Juhos <juhosg@openwrt.org>
Fri, 26 Mar 2010 14:28:31 +0000 (14:28 +0000)
SVN-Revision: 20463

package/ifxmips-dsl-api/patches/100-dsl_compat.patch
package/ifxmips-dsl-api/patches/200-mei_compat.patch
package/ifxmips-dsl-api/patches/300-atm_compat.patch
package/ifxmips-dsl-api/patches/400-debug-output.patch

index a3b9930c2063afc1fd2487409c3e22f152ae0722..dea82f03048df860c0922647ca0bc7ddcd7a8236 100644 (file)
@@ -1,7 +1,5 @@
-Index: drv_dsl_cpe_api-3.24.4.4/src/include/drv_dsl_cpe_device_danube.h
-===================================================================
---- drv_dsl_cpe_api-3.24.4.4.orig/src/include/drv_dsl_cpe_device_danube.h      2009-05-12 20:02:16.000000000 +0200
-+++ drv_dsl_cpe_api-3.24.4.4/src/include/drv_dsl_cpe_device_danube.h   2009-11-01 00:57:23.000000000 +0100
+--- a/src/include/drv_dsl_cpe_device_danube.h
++++ b/src/include/drv_dsl_cpe_device_danube.h
 @@ -24,7 +24,7 @@
     #include "drv_dsl_cpe_simulator_danube.h"
  #else
@@ -11,10 +9,8 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/include/drv_dsl_cpe_device_danube.h
  #endif /* defined(DSL_CPE_SIMULATOR_DRIVER) && defined(WIN32)*/
  
  #define DSL_MAX_LINE_NUMBER 1
-Index: drv_dsl_cpe_api-3.24.4.4/src/common/drv_dsl_cpe_os_linux.c
-===================================================================
---- drv_dsl_cpe_api-3.24.4.4.orig/src/common/drv_dsl_cpe_os_linux.c    2009-11-01 01:00:08.000000000 +0100
-+++ drv_dsl_cpe_api-3.24.4.4/src/common/drv_dsl_cpe_os_linux.c 2009-11-01 01:03:51.000000000 +0100
+--- a/src/common/drv_dsl_cpe_os_linux.c
++++ b/src/common/drv_dsl_cpe_os_linux.c
 @@ -11,6 +11,7 @@
  #ifdef __LINUX__
  
@@ -23,7 +19,7 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/common/drv_dsl_cpe_os_linux.c
  
  #include "drv_dsl_cpe_api.h"
  #include "drv_dsl_cpe_api_ioctl.h"
-@@ -1058,6 +1059,7 @@
+@@ -1058,6 +1059,7 @@ static void DSL_DRV_DebugInit(void)
  /* Entry point of driver */
  int __init DSL_ModuleInit(void)
  {
@@ -31,7 +27,7 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/common/drv_dsl_cpe_os_linux.c
     DSL_int_t i;
  
     printk(DSL_DRV_CRLF DSL_DRV_CRLF "Infineon CPE API Driver version: %s" DSL_DRV_CRLF,
-@@ -1104,7 +1106,8 @@
+@@ -1104,7 +1106,8 @@ int __init DSL_ModuleInit(void)
     }
  
     DSL_DRV_DevNodeInit();
index 58a1081ccca86ba3511c3e3596720384c5b2ac3b..352a974e60cfe6ef3be3925739007c55a2803ee4 100644 (file)
@@ -1,7 +1,5 @@
-Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_mei.c
-===================================================================
---- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_mei.c        2009-10-31 23:30:20.000000000 +0100
-+++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_mei.c     2010-01-24 14:21:32.000000000 +0100
+--- a/src/mei/ifxmips_mei.c
++++ b/src/mei/ifxmips_mei.c
 @@ -41,18 +41,20 @@
  #include <linux/init.h>
  #include <linux/ioport.h>
@@ -39,7 +37,7 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_mei.c
  #define IFX_MEI_EMSG(fmt, args...) printk(KERN_ERR  "[%s %d]: " fmt,__FUNCTION__, __LINE__, ## args)
  #define IFX_MEI_DMSG(fmt, args...) printk(KERN_INFO "[%s %d]: " fmt,__FUNCTION__, __LINE__, ## args)
  
-@@ -173,7 +175,8 @@
+@@ -173,7 +175,8 @@ static u32 *mei_arc_swap_buff = NULL;      //
  extern void ifxmips_mask_and_ack_irq(unsigned int irq_nr);
  #define MEI_MASK_AND_ACK_IRQ ifxmips_mask_and_ack_irq
  
@@ -49,7 +47,7 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_mei.c
  
  static struct file_operations bsp_mei_operations = {
        owner:THIS_MODULE,
-@@ -2294,10 +2297,10 @@
+@@ -2294,10 +2297,10 @@ IFX_MEI_InitDevice (int num)
                IFX_MEI_EMSG ("request_irq %d failed!\n", pDev->nIrq[IFX_DFEIR]);
                return -1;
        }
@@ -62,7 +60,7 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_mei.c
  //    IFX_MEI_DMSG("Device %d initialized. IER %#x\n", num, bsp_get_irq_ier(pDev->nIrq[IFX_DYING_GASP]));
        return 0;
  }
-@@ -2922,6 +2925,7 @@
+@@ -2922,6 +2925,7 @@ int __init
  IFX_MEI_ModuleInit (void)
  {
        int i = 0;
@@ -70,7 +68,7 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_mei.c
  
        printk ("IFX MEI Version %ld.%02ld.%02ld", bsp_mei_version.major, bsp_mei_version.minor, bsp_mei_version.revision);
  
-@@ -2935,14 +2939,15 @@
+@@ -2935,14 +2939,15 @@ IFX_MEI_ModuleInit (void)
                IFX_MEI_InitProcFS (i);
  #endif
        }
@@ -88,7 +86,7 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_mei.c
        return 0;
  }
  
-@@ -2996,3 +3001,5 @@
+@@ -2996,3 +3001,5 @@ EXPORT_SYMBOL (DSL_BSP_EventCBUnregister
  
  module_init (IFX_MEI_ModuleInit);
  module_exit (IFX_MEI_ModuleExit);
index 35c7b13f800c991867a6a8eeed7f7b279ab33921..27dc1630791c3693ef2215e1cb28d817cf5c3dbe 100644 (file)
@@ -1,7 +1,5 @@
-Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.c
-===================================================================
---- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_core.c   2009-11-01 14:29:05.000000000 +0100
-+++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.c        2009-11-01 16:07:46.000000000 +0100
+--- a/src/mei/ifxmips_atm_core.c
++++ b/src/mei/ifxmips_atm_core.c
 @@ -58,9 +58,8 @@
  /*
   *  Chip Specific Head File
@@ -14,7 +12,7 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.c
  #include "ifxmips_atm_core.h"
  
  
-@@ -1146,7 +1145,7 @@
+@@ -1146,7 +1145,7 @@ static INLINE void mailbox_signal(unsign
  
  static void set_qsb(struct atm_vcc *vcc, struct atm_qos *qos, unsigned int queue)
  {
@@ -23,7 +21,7 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.c
      unsigned int qsb_qid = queue + FIRST_QSB_QID;
      union qsb_queue_parameter_table qsb_queue_parameter_table = {{0}};
      union qsb_queue_vbr_parameter_table qsb_queue_vbr_parameter_table = {{0}};
-@@ -1318,7 +1317,7 @@
+@@ -1318,7 +1317,7 @@ static void set_qsb(struct atm_vcc *vcc,
  
  static void qsb_global_set(void)
  {
@@ -32,15 +30,13 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.c
      int i;
      unsigned int tmp1, tmp2, tmp3;
  
-@@ -2505,3 +2504,4 @@
+@@ -2505,3 +2504,4 @@ static void __exit ifx_atm_exit(void)
  
  module_init(ifx_atm_init);
  module_exit(ifx_atm_exit);
 +MODULE_LICENSE("Dual BSD/GPL");
-Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_common.h
-===================================================================
---- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_ppe_common.h     2009-11-01 14:30:55.000000000 +0100
-+++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_common.h  2009-11-01 15:58:50.000000000 +0100
+--- a/src/mei/ifxmips_atm_ppe_common.h
++++ b/src/mei/ifxmips_atm_ppe_common.h
 @@ -1,9 +1,10 @@
  #ifndef IFXMIPS_ATM_PPE_COMMON_H
  #define IFXMIPS_ATM_PPE_COMMON_H
@@ -63,10 +59,8 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_common.h
  /*
   *  Code/Data Memory (CDM) Interface Configuration Register
   */
-Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.h
-===================================================================
---- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_core.h   2009-11-01 14:30:55.000000000 +0100
-+++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.h        2009-11-01 15:58:50.000000000 +0100
+--- a/src/mei/ifxmips_atm_core.h
++++ b/src/mei/ifxmips_atm_core.h
 @@ -25,8 +25,8 @@
  #define IFXMIPS_ATM_CORE_H
  
@@ -78,10 +72,8 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.h
  #include "ifxmips_atm_ppe_common.h"
  #include "ifxmips_atm_fw_regs_common.h"
  
-Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_compat.h
-===================================================================
---- /dev/null  1970-01-01 00:00:00.000000000 +0000
-+++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_compat.h  2009-11-01 15:58:50.000000000 +0100
+--- /dev/null
++++ b/src/mei/ifxmips_compat.h
 @@ -0,0 +1,43 @@
 +#ifndef _IFXMIPS_COMPAT_H__
 +#define _IFXMIPS_COMPAT_H__
@@ -126,10 +118,8 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_compat.h
 +#define CONFIG_IFXMIPS_DSL_CPE_MEI    y
 +
 +#endif
-Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_danube.h
-===================================================================
---- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_ppe_danube.h     2009-11-01 14:30:55.000000000 +0100
-+++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_danube.h  2009-11-01 15:58:50.000000000 +0100
+--- a/src/mei/ifxmips_atm_ppe_danube.h
++++ b/src/mei/ifxmips_atm_ppe_danube.h
 @@ -1,7 +1,7 @@
  #ifndef IFXMIPS_ATM_PPE_DANUBE_H
  #define IFXMIPS_ATM_PPE_DANUBE_H
@@ -148,10 +138,8 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_danube.h
  
  
  
-Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_danube.c
-===================================================================
---- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_danube.c 2009-11-01 14:29:18.000000000 +0100
-+++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_danube.c      2009-11-01 15:58:50.000000000 +0100
+--- a/src/mei/ifxmips_atm_danube.c
++++ b/src/mei/ifxmips_atm_danube.c
 @@ -45,10 +45,9 @@
  /*
   *  Chip Specific Head File
index d3b05b1b20089d35c81e5cd2504d8a9ce1263fde..59d4b41cc42c7e03cdf67c6868cdf2cba972adcd 100644 (file)
@@ -1,6 +1,6 @@
---- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_mei.c        2010-03-14 02:59:49.000000000 +0100
-+++ drv_dsl_cpe_api-3.24.4.4/src/mei//ifxmips_mei.c    2010-03-14 03:02:13.000000000 +0100
-@@ -78,8 +78,8 @@
+--- a/src/mei/ifxmips_mei.c
++++ b/src/mei/ifxmips_mei.c
+@@ -79,8 +79,8 @@
  #define ifxmips_w32(val, reg)                   __raw_writel(val, reg)
  #define ifxmips_w32_mask(clear, set, reg)       ifxmips_w32((ifxmips_r32(reg) & ~clear) | set, reg)
  */
@@ -11,7 +11,7 @@
  
  #ifdef CONFIG_IFXMIPS_MEI_FW_LOOPBACK
  //#define DFE_MEM_TEST
-@@ -1300,7 +1300,7 @@ IFX_MEI_RunAdslModem (DSL_DEV_Device_t *
+@@ -1301,7 +1301,7 @@ IFX_MEI_RunAdslModem (DSL_DEV_Device_t *
                        IFX_MEI_EMSG (">>> malloc fail for codeswap buff!!! <<<\n");
                        return DSL_DEV_MEI_ERR_FAILURE;
                }
@@ -20,7 +20,7 @@
        }
  
        DSL_DEV_PRIVATE(pDev)->img_hdr =
-@@ -1475,7 +1475,7 @@ IFX_MEI_DFEMemoryFree (DSL_DEV_Device_t 
+@@ -1476,7 +1476,7 @@ IFX_MEI_DFEMemoryFree (DSL_DEV_Device_t 
          }
  
        if(mei_arc_swap_buff != NULL){
@@ -29,7 +29,7 @@
                kfree(mei_arc_swap_buff);
                mei_arc_swap_buff=NULL;
        }
-@@ -1495,7 +1495,7 @@ IFX_MEI_DFEMemoryAlloc (DSL_DEV_Device_t
+@@ -1496,7 +1496,7 @@ IFX_MEI_DFEMemoryAlloc (DSL_DEV_Device_t
  //            DSL_DEV_PRIVATE(pDev)->adsl_mem_info;
        int allocate_size = SDRAM_SEGMENT_SIZE;
  
@@ -38,7 +38,7 @@
        // Alloc Swap Pages
        for (idx = 0; size > 0 && idx < MAX_BAR_REGISTERS; idx++) {
                // skip bar15 for XDATA usage.
-@@ -1595,7 +1595,7 @@ DSL_BSP_FWDownload (DSL_DEV_Device_t * p
+@@ -1596,7 +1596,7 @@ DSL_BSP_FWDownload (DSL_DEV_Device_t * p
        ssize_t retval = -ENOMEM;
        int idx = 0;
  
@@ -47,7 +47,7 @@
  
        if (*loff == 0) {
                if (size < sizeof (img_hdr_tmp)) {
-@@ -1647,7 +1647,7 @@ DSL_BSP_FWDownload (DSL_DEV_Device_t * p
+@@ -1648,7 +1648,7 @@ DSL_BSP_FWDownload (DSL_DEV_Device_t * p
                        goto error;
                }
                adsl_mem_info[XDATA_REGISTER].type = FREE_RELOAD;
@@ -56,7 +56,7 @@
                IFX_MEI_BarUpdate (pDev, (DSL_DEV_PRIVATE(pDev)->nBar));
        }
        else if (DSL_DEV_PRIVATE(pDev)-> image_size == 0) {
-@@ -1926,7 +1926,7 @@ static void
+@@ -1927,7 +1927,7 @@ static void
  WriteMbox (u32 * mboxarray, u32 size)
  {
        IFX_MEI_DebugWrite (&dsl_devices[0], IMBOX_BASE, mboxarray, size);
@@ -65,7 +65,7 @@
        IFX_MEI_LongWordWriteOffset (&dsl_devices[0], (u32) ME_ME2ARC_INT, MEI_TO_ARC_MSGAV);
  }
  
-@@ -1935,7 +1935,7 @@ static void
+@@ -1936,7 +1936,7 @@ static void
  ReadMbox (u32 * mboxarray, u32 size)
  {
        IFX_MEI_DebugRead (&dsl_devices[0], OMBOX_BASE, mboxarray, size);
@@ -74,7 +74,7 @@
  }
  
  static void
-@@ -1965,7 +1965,7 @@ arc_code_page_download (uint32_t arc_cod
+@@ -1966,7 +1966,7 @@ arc_code_page_download (uint32_t arc_cod
  {
        int count;
  
@@ -83,7 +83,7 @@
        IFX_MEI_ControlModeSet (&dsl_devices[0], MEI_MASTER_MODE);
        IFX_MEI_HaltArc (&dsl_devices[0]);
        IFX_MEI_LongWordWriteOffset (&dsl_devices[0], (u32) ME_DX_AD, 0);
-@@ -2004,21 +2004,21 @@ dfe_loopback_irq_handler (DSL_DEV_Device
+@@ -2005,21 +2005,21 @@ dfe_loopback_irq_handler (DSL_DEV_Device
        memset (&rd_mbox[0], 0, 10 * 4);
        ReadMbox (&rd_mbox[0], 6);
        if (rd_mbox[0] == 0x0) {
                        }
                }
        }
-@@ -2036,21 +2036,21 @@ wait_mem_test_result (void)
+@@ -2037,21 +2037,21 @@ wait_mem_test_result (void)
        uint32_t mbox[5];
        mbox[0] = 0;
  
        }
  }
  
-@@ -2066,7 +2066,7 @@ arc_ping_testing (DSL_DEV_Device_t *pDev
+@@ -2067,7 +2067,7 @@ arc_ping_testing (DSL_DEV_Device_t *pDev
                rd_mbox[i] = 0;
        }
  
        wr_mbox[0] = MEI_PING;
        WriteMbox (&wr_mbox[0], 10);
  
-@@ -2074,7 +2074,7 @@ arc_ping_testing (DSL_DEV_Device_t *pDev
+@@ -2075,7 +2075,7 @@ arc_ping_testing (DSL_DEV_Device_t *pDev
                MEI_WAIT (100);
        }
  
        got_int = 0;
  
        wr_mbox[0] = 0x4;
-@@ -2093,14 +2093,14 @@ arc_ping_testing (DSL_DEV_Device_t *pDev
+@@ -2094,14 +2094,14 @@ arc_ping_testing (DSL_DEV_Device_t *pDev
        IFX_MEI_LongWordWriteOffset (&dsl_devices[0],
                                           (u32) ME_ME2ARC_INT,
                                           MEI_TO_ARC_MSGAV);
                        got_int = 0;
                        //schedule();
                        DSL_ENABLE_IRQ (pDev->nIrq[IFX_DFEIR]);
-@@ -2151,7 +2151,7 @@ DFE_Loopback_Test (void)
+@@ -2152,7 +2152,7 @@ DFE_Loopback_Test (void)
                        DSL_DEV_PRIVATE(pDev)->adsl_mem_info[idx].type = FREE_RELOAD;
                        IFX_MEI_WRITE_REGISTER_L ((((uint32_t) DSL_DEV_PRIVATE(pDev)->adsl_mem_info[idx].address) & 0x0fffffff),
                                                        IFXMIPS_MEI_BASE_ADDR + ME_XMEM_BAR_BASE  + idx * 4);
                                IFXMIPS_MEI_BASE_ADDR + ME_XMEM_BAR_BASE  +
                                idx * 4, (((uint32_t)
                                           ((ifx_mei_device_private_t *)
-@@ -2168,20 +2168,20 @@ DFE_Loopback_Test (void)
+@@ -2169,20 +2169,20 @@ DFE_Loopback_Test (void)
                return DSL_DEV_MEI_ERR_FAILURE;
        }
        //WriteARCreg(AUX_IC_CTRL,2);
        memcpy ((u8 *) (DSL_DEV_PRIVATE(pDev)->
                        adsl_mem_info[0].address + 0x1004),
                &arc_ahb_access_code[0], sizeof (arc_ahb_access_code));
-@@ -2189,13 +2189,13 @@ DFE_Loopback_Test (void)
+@@ -2190,13 +2190,13 @@ DFE_Loopback_Test (void)
  
  #endif //DFE_PING_TEST
  
  #endif //DFE_MEM_TEST
  #ifdef DFE_ATM_LOOPBACK
        arc_debug_data = 0xf;
-@@ -2214,7 +2214,7 @@ DFE_Loopback_Test (void)
+@@ -2215,7 +2215,7 @@ DFE_Loopback_Test (void)
        IFX_MEI_DebugWrite (&dsl_devices[0], 0x32010, &arc_debug_data, 1);
  #endif //DFE_ATM_LOOPBACK
        IFX_MEI_IRQEnable (pDev);
        IFX_MEI_RunArc (&dsl_devices[0]);
  
  #ifdef DFE_PING_TEST
-@@ -2525,7 +2525,7 @@ IFX_MEI_Ioctls (DSL_DEV_Device_t * pDev,
+@@ -2526,7 +2526,7 @@ IFX_MEI_Ioctls (DSL_DEV_Device_t * pDev,
                break;
  
        case DSL_FIO_BSP_DSL_START:
                if ((meierr = IFX_MEI_RunAdslModem (pDev)) != DSL_DEV_MEI_ERR_SUCCESS) {
                        IFX_MEI_EMSG ("IFX_MEI_RunAdslModem() error...");
                        meierr = DSL_DEV_MEI_ERR_FAILURE;
-@@ -2926,11 +2926,11 @@ IFX_MEI_ModuleInit (void)
+@@ -2927,11 +2927,11 @@ IFX_MEI_ModuleInit (void)
        int i = 0;
        static struct class *dsl_class;
  
                        return -EIO;
                }
                IFX_MEI_InitDevNode (i);
-@@ -2942,7 +2942,7 @@ IFX_MEI_ModuleInit (void)
+@@ -2943,7 +2943,7 @@ IFX_MEI_ModuleInit (void)
                dsl_bsp_event_callback[i].function = NULL;
  
  #ifdef CONFIG_IFXMIPS_MEI_FW_LOOPBACK
        DFE_Loopback_Test ();
  #endif
        dsl_class = class_create(THIS_MODULE, "ifx_mei");
---- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_core.c   2010-03-13 16:42:49.000000000 +0100
-+++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.c        2010-03-14 03:39:05.000000000 +0100
-@@ -2336,7 +2335,7 @@ static int atm_showtime_enter(struct por
+--- a/src/mei/ifxmips_atm_core.c
++++ b/src/mei/ifxmips_atm_core.c
+@@ -2335,7 +2335,7 @@ static int atm_showtime_enter(struct por
      IFX_REG_W32(0x0F, UTP_CFG);
  #endif
  
  
      return IFX_SUCCESS;
  }
-@@ -2352,7 +2351,7 @@ static int atm_showtime_exit(void)
+@@ -2351,7 +2351,7 @@ static int atm_showtime_exit(void)
      //  TODO: ReTX clean state
      g_xdata_addr = NULL;
  
  
      return IFX_SUCCESS;
  }
-