intel-microcode: update to 20180312
authorZoltan HERPAI <wigyori@uid0.hu>
Tue, 20 Mar 2018 13:02:20 +0000 (14:02 +0100)
committerZoltan HERPAI <wigyori@uid0.hu>
Wed, 21 Mar 2018 22:24:09 +0000 (23:24 +0100)
- Update microcode for 24 CPU types
- Implements IBRS/IBPB/STIPB support, Spectre-v2 mitigation for:
  Sandybridge, Ivy Bridge, Haswell, Broadwell, Skylake, Kaby Lake,
  Coffee Lake
- Missing production updates:
   - Broadwell-E/EX Xeons (sig 0x406f1)
   - Anniedale/Morefield, Apollo Lake, Avoton, Cherry Trail, Braswell,
     Gemini Lake, Denverton
- New Microcodes:
   - sig 0x00050653, pf_mask 0x97, 2018-01-29, rev 0x1000140
   - sig 0x00050665, pf_mask 0x10, 2018-01-22, rev 0xe000009

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>

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