bcm53xx: delete old kernel versions
authorFelix Fietkau <nbd@nbd.name>
Thu, 12 May 2016 15:54:14 +0000 (17:54 +0200)
committerFelix Fietkau <nbd@nbd.name>
Thu, 12 May 2016 15:54:14 +0000 (17:54 +0200)
Signed-off-by: Felix Fietkau <nbd@nbd.name>
137 files changed:
target/linux/bcm53xx/config-4.1 [deleted file]
target/linux/bcm53xx/config-4.3 [deleted file]
target/linux/bcm53xx/files-4.1/drivers/firmware/broadcom/Kconfig [deleted file]
target/linux/bcm53xx/files-4.1/drivers/firmware/broadcom/Makefile [deleted file]
target/linux/bcm53xx/files-4.1/drivers/firmware/broadcom/bcm47xx_nvram.c [deleted file]
target/linux/bcm53xx/patches-4.1/020-ARM-BCM5310X-activate-erratas-needed-for-SoC.patch [deleted file]
target/linux/bcm53xx/patches-4.1/030-0001-PCI-iproc-Allow-override-of-device-tree-IRQ-mapping-.patch [deleted file]
target/linux/bcm53xx/patches-4.1/030-0002-PCI-iproc-Add-BCMA-PCIe-driver.patch [deleted file]
target/linux/bcm53xx/patches-4.1/031-0001-PCI-iproc-Directly-add-PCI-resources.patch [deleted file]
target/linux/bcm53xx/patches-4.1/031-0002-PCI-iproc-Free-resource-list-after-registration.patch [deleted file]
target/linux/bcm53xx/patches-4.1/032-PCI-iproc-Delete-unnecessary-checks-before-phy-calls.patch [deleted file]
target/linux/bcm53xx/patches-4.1/033-0001-PCI-iproc-enable-arm64-support-for-iProc-PCIe.patch [deleted file]
target/linux/bcm53xx/patches-4.1/033-0002-PCI-iproc-Fix-ARM64-dependency-in-Kconfig.patch [deleted file]
target/linux/bcm53xx/patches-4.1/034-PCI-iproc-Fix-BCMA-dependency-in-Kconfig.patch [deleted file]
target/linux/bcm53xx/patches-4.1/035-PCI-iproc-Allow-BCMA-bus-driver-to-be-built-as-modul.patch [deleted file]
target/linux/bcm53xx/patches-4.1/036-0001-PCI-iproc-Fix-code-comment-to-match-code.patch [deleted file]
target/linux/bcm53xx/patches-4.1/036-0002-PCI-iproc-Remove-unused-struct-iproc_pcie.irqs.patch [deleted file]
target/linux/bcm53xx/patches-4.1/036-0003-PCI-iproc-Call-pci_fixup_irqs-for-ARM64-as-well-as-A.patch [deleted file]
target/linux/bcm53xx/patches-4.1/036-0004-PCI-iproc-Fix-PCIe-reset-logic.patch [deleted file]
target/linux/bcm53xx/patches-4.1/036-0005-PCI-iproc-Improve-link-detection-logic.patch [deleted file]
target/linux/bcm53xx/patches-4.1/036-0006-PCI-iproc-Update-PCIe-device-tree-bindings.patch [deleted file]
target/linux/bcm53xx/patches-4.1/036-0007-PCI-iproc-Add-outbound-mapping-support.patch [deleted file]
target/linux/bcm53xx/patches-4.1/037-PCI-iproc-Fix-header-comment-Corporation-misspelling.patch [deleted file]
target/linux/bcm53xx/patches-4.1/038-PCI-iproc-Hide-CONFIG_PCIE_IPROC.patch [deleted file]
target/linux/bcm53xx/patches-4.1/039-PCI-iproc-Do-not-use-0x-in-front-of-pap.patch [deleted file]
target/linux/bcm53xx/patches-4.1/040-0001-PCI-iproc-Update-iProc-PCIe-device-tree-binding.patch [deleted file]
target/linux/bcm53xx/patches-4.1/040-0002-PCI-iproc-Add-PAXC-interface-support.patch [deleted file]
target/linux/bcm53xx/patches-4.1/040-0003-PCI-iproc-Add-iProc-PCIe-MSI-device-tree-binding.patch [deleted file]
target/linux/bcm53xx/patches-4.1/040-0004-PCI-iproc-Add-iProc-PCIe-MSI-support.patch [deleted file]
target/linux/bcm53xx/patches-4.1/041-PCI-iproc-Allow-multiple-devices-except-on-PAXC.patch [deleted file]
target/linux/bcm53xx/patches-4.1/058-ARM-BCM5301X-Add-USB-LED-for-Buffalo-WZR-1750DHP.patch [deleted file]
target/linux/bcm53xx/patches-4.1/059-ARM-BCM5301X-Add-DT-for-Buffalo-WXR-1900DHP.patch [deleted file]
target/linux/bcm53xx/patches-4.1/060-ARM-BCM5301X-Add-DT-for-SmartRG-SR400ac.patch [deleted file]
target/linux/bcm53xx/patches-4.1/061-ARM-BCM5301X-Add-DT-for-Asus-RT-AC68U.patch [deleted file]
target/linux/bcm53xx/patches-4.1/062-ARM-BCM5301X-Add-DT-for-Asus-RT-AC56U.patch [deleted file]
target/linux/bcm53xx/patches-4.1/063-ARM-BCM5301X-Ignore-another-BCM4709-specific-fault-c.patch [deleted file]
target/linux/bcm53xx/patches-4.1/064-ARM-BCM5301X-add-NAND-flash-chip-description.patch [deleted file]
target/linux/bcm53xx/patches-4.1/065-ARM-BCM5301X-add-IRQ-numbers-for-PCIe-controller.patch [deleted file]
target/linux/bcm53xx/patches-4.1/066-ARM-BCM5301X-Add-DT-for-Asus-RT-AC87U.patch [deleted file]
target/linux/bcm53xx/patches-4.1/067-ARM-BCM5301X-add-NAND-flash-chip-description-for-Asu.patch [deleted file]
target/linux/bcm53xx/patches-4.1/070-ARM-l2c-restore-the-behaviour-documented-above-l2c_e.patch [deleted file]
target/linux/bcm53xx/patches-4.1/071-ARM-l2c-write-auxiliary-control-register-first.patch [deleted file]
target/linux/bcm53xx/patches-4.1/072-ARM-l2c-clean-up-l2c_configure.patch [deleted file]
target/linux/bcm53xx/patches-4.1/073-ARM-l2c-only-unlock-caches-if-NS_LOCKDOWN-bit-is-set.patch [deleted file]
target/linux/bcm53xx/patches-4.1/074-ARM-l2c-avoid-passing-auxiliary-control-register-thr.patch [deleted file]
target/linux/bcm53xx/patches-4.1/075-ARM-8391-1-l2c-add-options-to-overwrite-prefetching-.patch [deleted file]
target/linux/bcm53xx/patches-4.1/077-ARM-l2c-Add-support-for-the-arm-shared-override-prop.patch [deleted file]
target/linux/bcm53xx/patches-4.1/079-ARM-BCM5301X-activate-some-additional-options-in-pl3.patch [deleted file]
target/linux/bcm53xx/patches-4.1/080-ARM-BCM5301X-Enable-UART0-on-tested-devices.patch [deleted file]
target/linux/bcm53xx/patches-4.1/081-ARM-BCM5301X-Add-profiling-support.patch [deleted file]
target/linux/bcm53xx/patches-4.1/082-ARM-BCM5301X-Add-DT-for-Netgear-R7000.patch [deleted file]
target/linux/bcm53xx/patches-4.1/083-ARM-dts-bcm5301x-Add-BCM-SVK-DT-files.patch [deleted file]
target/linux/bcm53xx/patches-4.1/090-mtd-nand-add-common-DT-init-code.patch [deleted file]
target/linux/bcm53xx/patches-4.1/092-Add-Broadcom-STB-NAND.patch [deleted file]
target/linux/bcm53xx/patches-4.1/101-use-part-parser.patch [deleted file]
target/linux/bcm53xx/patches-4.1/110-firmware-backport-NVRAM-driver.patch [deleted file]
target/linux/bcm53xx/patches-4.1/130-dt-bindings-add-SMP-enable-method-for-Broadcom-NSP.patch [deleted file]
target/linux/bcm53xx/patches-4.1/131-ARM-BCM-Clean-up-SMP-support-for-Broadcom-Kona.patch [deleted file]
target/linux/bcm53xx/patches-4.1/133-ARM-BCM-Add-SMP-support-for-Broadcom-NSP.patch [deleted file]
target/linux/bcm53xx/patches-4.1/134-ARM-BCM-Add-SMP-support-for-Broadcom-4708.patch [deleted file]
target/linux/bcm53xx/patches-4.1/170-ARM-BCM5301X-Add-missing-Netgear-R8000-LEDs.patch [deleted file]
target/linux/bcm53xx/patches-4.1/180-USB-bcma-remove-chip-id-check.patch [deleted file]
target/linux/bcm53xx/patches-4.1/181-USB-bcma-replace-numbers-with-constants.patch [deleted file]
target/linux/bcm53xx/patches-4.1/182-USB-bcma-use-devm_kzalloc.patch [deleted file]
target/linux/bcm53xx/patches-4.1/183-USB-bcma-fix-error-handling-in-bcma_hcd_create_pdev.patch [deleted file]
target/linux/bcm53xx/patches-4.1/184-USB-bcma-add-bcm53xx-support.patch [deleted file]
target/linux/bcm53xx/patches-4.1/185-USB-bcma-add-support-for-controlling-bus-power-throu.patch [deleted file]
target/linux/bcm53xx/patches-4.1/186-USB-bcma-switch-to-GPIO-descriptor-for-power-control.patch [deleted file]
target/linux/bcm53xx/patches-4.1/190-usb-xhci-plat-fix-adding-usb3-lpm-capable-quirk.patch [deleted file]
target/linux/bcm53xx/patches-4.1/191-usb-xhci-add-Broadcom-specific-fake-doorbell.patch [deleted file]
target/linux/bcm53xx/patches-4.1/195-USB-bcma-make-helper-creating-platform-dev-more-gene.patch [deleted file]
target/linux/bcm53xx/patches-4.1/196-USB-bcma-use-separated-function-for-USB-2.0-initiali.patch [deleted file]
target/linux/bcm53xx/patches-4.1/197-USB-bcma-add-USB-3.0-support.patch [deleted file]
target/linux/bcm53xx/patches-4.1/300-ARM-BCM5301X-Disable-MMU-and-Dcache-for-decompression.patch [deleted file]
target/linux/bcm53xx/patches-4.1/305-ARM-BCM5301X-Add-DT-for-Linksys-EA6300-V1.patch [deleted file]
target/linux/bcm53xx/patches-4.1/320-ARM-BCM5301X-Add-Buffalo-WXR-1900DHP-clock-and-USB-p.patch [deleted file]
target/linux/bcm53xx/patches-4.1/321-ARM-BCM5301X-Set-vcc-gpio-for-USB-controllers.patch [deleted file]
target/linux/bcm53xx/patches-4.1/330-ARM-BCM5310X-Enable-earlyprintk-on-tested-devices.patch [deleted file]
target/linux/bcm53xx/patches-4.1/331-ARM-BCM5301X-Specify-RAM-on-devices-by-including-HIG.patch [deleted file]
target/linux/bcm53xx/patches-4.1/332-ARM-BCM5301X-Add-power-button-for-Buffalo-WZR-1750DHP.patch [deleted file]
target/linux/bcm53xx/patches-4.1/351-ARM-BCM5301X-Enable-ChipCommon-UART-on-untested-devi.patch [deleted file]
target/linux/bcm53xx/patches-4.1/404-mtd-bcm53xxspiflash-new-driver-for-SPI-flahes-on-Bro.patch [deleted file]
target/linux/bcm53xx/patches-4.1/500-UBI-Detect-EOF-mark-and-erase-all-remaining-blocks.patch [deleted file]
target/linux/bcm53xx/patches-4.1/700-bgmac-add-support-for-the-3rd-bus-core-device.patch [deleted file]
target/linux/bcm53xx/patches-4.1/710-b53-add-hacky-CPU-port-fixes-for-devices-not-using-p.patch [deleted file]
target/linux/bcm53xx/patches-4.1/810-USB-bcma-use-simpler-devm_gpiod_get.patch [deleted file]
target/linux/bcm53xx/patches-4.1/901-mtd-bcm47xxpart-workaround-for-Asus-RT-AC87U-asus-pa.patch [deleted file]
target/linux/bcm53xx/patches-4.1/902-mtd-bcm47xxpart-print-buffer-used-for-determining-pa.patch [deleted file]
target/linux/bcm53xx/patches-4.3/020-ARM-BCM5310X-activate-erratas-needed-for-SoC.patch [deleted file]
target/linux/bcm53xx/patches-4.3/044-clk-cygnus-Convert-all-macros-to-all-caps.patch [deleted file]
target/linux/bcm53xx/patches-4.3/045-clk-iproc-Add-PWRCTRL-support.patch [deleted file]
target/linux/bcm53xx/patches-4.3/046-clk-nsp-add-clock-support-for-Broadcom-Northstar-Plu.patch [deleted file]
target/linux/bcm53xx/patches-4.3/047-clk-iproc-Add-PLL-base-write-function.patch [deleted file]
target/linux/bcm53xx/patches-4.3/048-clk-iproc-Split-off-dig_filter.patch [deleted file]
target/linux/bcm53xx/patches-4.3/049-clk-iproc-Separate-status-and-control-variables.patch [deleted file]
target/linux/bcm53xx/patches-4.3/050-ARM-dts-enable-clock-support-for-BCM5301X.patch [deleted file]
target/linux/bcm53xx/patches-4.3/067-ARM-BCM5301X-add-NAND-flash-chip-description-for-Asu.patch [deleted file]
target/linux/bcm53xx/patches-4.3/082-ARM-BCM5301X-Add-DT-for-Netgear-R7000.patch [deleted file]
target/linux/bcm53xx/patches-4.3/083-ARM-dts-bcm5301x-Add-BCM-SVK-DT-files.patch [deleted file]
target/linux/bcm53xx/patches-4.3/101-use-part-parser.patch [deleted file]
target/linux/bcm53xx/patches-4.3/130-dt-bindings-add-SMP-enable-method-for-Broadcom-NSP.patch [deleted file]
target/linux/bcm53xx/patches-4.3/131-ARM-BCM-Clean-up-SMP-support-for-Broadcom-Kona.patch [deleted file]
target/linux/bcm53xx/patches-4.3/133-ARM-BCM-Add-SMP-support-for-Broadcom-NSP.patch [deleted file]
target/linux/bcm53xx/patches-4.3/134-ARM-BCM-Add-SMP-support-for-Broadcom-4708.patch [deleted file]
target/linux/bcm53xx/patches-4.3/140-PCI-iproc-Fix-code-comment-to-match-code.patch [deleted file]
target/linux/bcm53xx/patches-4.3/141-PCI-iproc-Remove-unused-struct-iproc_pcie.irqs.patch [deleted file]
target/linux/bcm53xx/patches-4.3/142-PCI-iproc-Call-pci_fixup_irqs-for-ARM64-as-well-as-A.patch [deleted file]
target/linux/bcm53xx/patches-4.3/143-PCI-iproc-Fix-PCIe-reset-logic.patch [deleted file]
target/linux/bcm53xx/patches-4.3/144-PCI-iproc-Improve-link-detection-logic.patch [deleted file]
target/linux/bcm53xx/patches-4.3/145-PCI-iproc-Update-PCIe-device-tree-bindings.patch [deleted file]
target/linux/bcm53xx/patches-4.3/146-PCI-iproc-Add-outbound-mapping-support.patch [deleted file]
target/linux/bcm53xx/patches-4.3/147-PCI-iproc-Fix-header-comment-Corporation-misspelling.patch [deleted file]
target/linux/bcm53xx/patches-4.3/150-PCI-iproc-Update-iProc-PCIe-device-tree-binding.patch [deleted file]
target/linux/bcm53xx/patches-4.3/151-PCI-iproc-Add-PAXC-interface-support.patch [deleted file]
target/linux/bcm53xx/patches-4.3/152-PCI-iproc-Add-iProc-PCIe-MSI-device-tree-binding.patch [deleted file]
target/linux/bcm53xx/patches-4.3/153-PCI-iproc-Add-iProc-PCIe-MSI-support.patch [deleted file]
target/linux/bcm53xx/patches-4.3/154-PCI-iproc-Allow-multiple-devices-except-on-PAXC.patch [deleted file]
target/linux/bcm53xx/patches-4.3/170-ARM-BCM5301X-Add-missing-Netgear-R8000-LEDs.patch [deleted file]
target/linux/bcm53xx/patches-4.3/186-USB-bcma-switch-to-GPIO-descriptor-for-power-control.patch [deleted file]
target/linux/bcm53xx/patches-4.3/190-usb-xhci-plat-fix-adding-usb3-lpm-capable-quirk.patch [deleted file]
target/linux/bcm53xx/patches-4.3/191-usb-xhci-add-Broadcom-specific-fake-doorbell.patch [deleted file]
target/linux/bcm53xx/patches-4.3/195-USB-bcma-make-helper-creating-platform-dev-more-gene.patch [deleted file]
target/linux/bcm53xx/patches-4.3/196-USB-bcma-use-separated-function-for-USB-2.0-initiali.patch [deleted file]
target/linux/bcm53xx/patches-4.3/197-USB-bcma-add-USB-3.0-support.patch [deleted file]
target/linux/bcm53xx/patches-4.3/300-ARM-BCM5301X-Disable-MMU-and-Dcache-for-decompression.patch [deleted file]
target/linux/bcm53xx/patches-4.3/301-ARM-BCM5301X-Add-SPROM.patch [deleted file]
target/linux/bcm53xx/patches-4.3/305-ARM-BCM5301X-Add-DT-for-Linksys-EA6300-V1.patch [deleted file]
target/linux/bcm53xx/patches-4.3/320-ARM-BCM5301X-Add-Buffalo-WXR-1900DHP-clock-and-USB-p.patch [deleted file]
target/linux/bcm53xx/patches-4.3/321-ARM-BCM5301X-Set-vcc-gpio-for-USB-controllers.patch [deleted file]
target/linux/bcm53xx/patches-4.3/330-ARM-BCM5310X-Enable-earlyprintk-on-tested-devices.patch [deleted file]
target/linux/bcm53xx/patches-4.3/331-ARM-BCM5301X-Specify-RAM-on-devices-by-including-HIG.patch [deleted file]
target/linux/bcm53xx/patches-4.3/332-ARM-BCM5301X-Add-power-button-for-Buffalo-WZR-1750DHP.patch [deleted file]
target/linux/bcm53xx/patches-4.3/351-ARM-BCM5301X-Enable-ChipCommon-UART-on-untested-devi.patch [deleted file]
target/linux/bcm53xx/patches-4.3/404-mtd-bcm53xxspiflash-new-driver-for-SPI-flahes-on-Bro.patch [deleted file]
target/linux/bcm53xx/patches-4.3/500-UBI-Detect-EOF-mark-and-erase-all-remaining-blocks.patch [deleted file]
target/linux/bcm53xx/patches-4.3/710-b53-add-hacky-CPU-port-fixes-for-devices-not-using-p.patch [deleted file]
target/linux/bcm53xx/patches-4.3/901-mtd-bcm47xxpart-workaround-for-Asus-RT-AC87U-asus-pa.patch [deleted file]

diff --git a/target/linux/bcm53xx/config-4.1 b/target/linux/bcm53xx/config-4.1
deleted file mode 100644 (file)
index 560e3d7..0000000
+++ /dev/null
@@ -1,305 +0,0 @@
-CONFIG_ALIGNMENT_TRAP=y
-CONFIG_ARCH_BCM=y
-# CONFIG_ARCH_BCM_21664 is not set
-# CONFIG_ARCH_BCM_281XX is not set
-CONFIG_ARCH_BCM_5301X=y
-# CONFIG_ARCH_BCM_63XX is not set
-# CONFIG_ARCH_BCM_CYGNUS is not set
-CONFIG_ARCH_BCM_IPROC=y
-# CONFIG_ARCH_BRCMSTB is not set
-CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
-CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
-CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
-CONFIG_ARCH_HAS_SG_CHAIN=y
-CONFIG_ARCH_HAS_TICK_BROADCAST=y
-CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
-CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
-CONFIG_ARCH_MULTIPLATFORM=y
-# CONFIG_ARCH_MULTI_CPU_AUTO is not set
-CONFIG_ARCH_MULTI_V6_V7=y
-CONFIG_ARCH_MULTI_V7=y
-CONFIG_ARCH_NR_GPIO=0
-CONFIG_ARCH_REQUIRE_GPIOLIB=y
-# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
-# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
-CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
-CONFIG_ARCH_SUPPORTS_UPROBES=y
-CONFIG_ARCH_SUSPEND_POSSIBLE=y
-CONFIG_ARCH_USE_BUILTIN_BSWAP=y
-CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
-CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
-CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
-CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
-CONFIG_ARM=y
-CONFIG_ARM_AMBA=y
-CONFIG_ARM_APPENDED_DTB=y
-# CONFIG_ARM_ATAG_DTB_COMPAT is not set
-# CONFIG_ARM_CPU_SUSPEND is not set
-CONFIG_ARM_ERRATA_754322=y
-CONFIG_ARM_ERRATA_764369=y
-CONFIG_ARM_ERRATA_775420=y
-CONFIG_ARM_GIC=y
-CONFIG_ARM_GLOBAL_TIMER=y
-CONFIG_ARM_HAS_SG_CHAIN=y
-CONFIG_ARM_L1_CACHE_SHIFT=6
-CONFIG_ARM_L1_CACHE_SHIFT_6=y
-# CONFIG_ARM_LPAE is not set
-CONFIG_ARM_PATCH_PHYS_VIRT=y
-# CONFIG_ARM_SP805_WATCHDOG is not set
-CONFIG_ARM_THUMB=y
-# CONFIG_ARM_THUMBEE is not set
-CONFIG_ARM_VIRT_EXT=y
-CONFIG_ATAGS=y
-CONFIG_AUTO_ZRELADDR=y
-CONFIG_B53=y
-# CONFIG_B53_MMAP_DRIVER is not set
-# CONFIG_B53_PHY_DRIVER is not set
-CONFIG_B53_SRAB_DRIVER=y
-CONFIG_BCM47XX_NVRAM=y
-CONFIG_BCM47XX_SPROM=y
-CONFIG_BCM47XX_WDT=y
-CONFIG_BCMA=y
-CONFIG_BCMA_BLOCKIO=y
-CONFIG_BCMA_DEBUG=y
-CONFIG_BCMA_DRIVER_GMAC_CMN=y
-CONFIG_BCMA_DRIVER_GPIO=y
-CONFIG_BCMA_DRIVER_PCI=y
-CONFIG_BCMA_HOST_PCI=y
-CONFIG_BCMA_HOST_PCI_POSSIBLE=y
-CONFIG_BCMA_HOST_SOC=y
-CONFIG_BGMAC=y
-CONFIG_BOUNCE=y
-CONFIG_CACHE_L2X0=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_CLKDEV_LOOKUP=y
-CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y
-CONFIG_CLKSRC_MMIO=y
-CONFIG_CLKSRC_OF=y
-CONFIG_CLONE_BACKWARDS=y
-CONFIG_COMMON_CLK=y
-CONFIG_CPU_32v6K=y
-CONFIG_CPU_32v7=y
-CONFIG_CPU_ABRT_EV7=y
-# CONFIG_CPU_BPREDICT_DISABLE is not set
-CONFIG_CPU_CACHE_V7=y
-CONFIG_CPU_CACHE_VIPT=y
-CONFIG_CPU_COPY_V6=y
-CONFIG_CPU_CP15=y
-CONFIG_CPU_CP15_MMU=y
-CONFIG_CPU_HAS_ASID=y
-# CONFIG_CPU_ICACHE_DISABLE is not set
-CONFIG_CPU_PABRT_V7=y
-CONFIG_CPU_RMAP=y
-CONFIG_CPU_TLB_V7=y
-CONFIG_CPU_V7=y
-CONFIG_CRC16=y
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_LZO=y
-CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_WORKQUEUE=y
-CONFIG_CRYPTO_XZ=y
-CONFIG_DCACHE_WORD_ACCESS=y
-CONFIG_DEBUG_BCM_5301X=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_LL=y
-CONFIG_DEBUG_LL_INCLUDE="debug/8250.S"
-CONFIG_DEBUG_UART_8250=y
-# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set
-CONFIG_DEBUG_UART_8250_SHIFT=0
-CONFIG_DEBUG_UART_PHYS=0x18000300
-CONFIG_DEBUG_UART_VIRT=0xf1000300
-CONFIG_DEBUG_UNCOMPRESS=y
-CONFIG_DEBUG_USER=y
-CONFIG_DTC=y
-CONFIG_EARLY_PRINTK=y
-CONFIG_FIXED_PHY=y
-CONFIG_FRAME_POINTER=y
-CONFIG_GENERIC_ALLOCATOR=y
-CONFIG_GENERIC_BUG=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
-CONFIG_GENERIC_IDLE_POLL_SETUP=y
-CONFIG_GENERIC_IO=y
-CONFIG_GENERIC_IRQ_SHOW=y
-CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
-CONFIG_GENERIC_PCI_IOMAP=y
-CONFIG_GENERIC_PINCONF=y
-CONFIG_GENERIC_SCHED_CLOCK=y
-CONFIG_GENERIC_SMP_IDLE_THREAD=y
-CONFIG_GENERIC_STRNCPY_FROM_USER=y
-CONFIG_GENERIC_STRNLEN_USER=y
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_74X164=y
-CONFIG_GPIO_DEVRES=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_HANDLE_DOMAIN_IRQ=y
-CONFIG_HARDIRQS_SW_RESEND=y
-CONFIG_HAS_DMA=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT_MAP=y
-# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
-CONFIG_HAVE_ARCH_AUDITSYSCALL=y
-CONFIG_HAVE_ARCH_BITREVERSE=y
-CONFIG_HAVE_ARCH_JUMP_LABEL=y
-CONFIG_HAVE_ARCH_KGDB=y
-CONFIG_HAVE_ARCH_PFN_VALID=y
-CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
-CONFIG_HAVE_ARCH_TRACEHOOK=y
-CONFIG_HAVE_ARM_SCU=y
-CONFIG_HAVE_ARM_TWD=y
-# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
-CONFIG_HAVE_BPF_JIT=y
-CONFIG_HAVE_CC_STACKPROTECTOR=y
-CONFIG_HAVE_CLK=y
-CONFIG_HAVE_CLK_PREPARE=y
-CONFIG_HAVE_CONTEXT_TRACKING=y
-CONFIG_HAVE_C_RECORDMCOUNT=y
-CONFIG_HAVE_DEBUG_KMEMLEAK=y
-CONFIG_HAVE_DMA_API_DEBUG=y
-CONFIG_HAVE_DMA_ATTRS=y
-CONFIG_HAVE_DMA_CONTIGUOUS=y
-CONFIG_HAVE_DYNAMIC_FTRACE=y
-CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
-CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
-CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
-CONFIG_HAVE_FUNCTION_TRACER=y
-CONFIG_HAVE_GENERIC_DMA_COHERENT=y
-CONFIG_HAVE_IDE=y
-CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
-CONFIG_HAVE_KERNEL_GZIP=y
-CONFIG_HAVE_KERNEL_LZ4=y
-CONFIG_HAVE_KERNEL_LZMA=y
-CONFIG_HAVE_KERNEL_LZO=y
-CONFIG_HAVE_KERNEL_XZ=y
-CONFIG_HAVE_MEMBLOCK=y
-CONFIG_HAVE_NET_DSA=y
-CONFIG_HAVE_OPROFILE=y
-CONFIG_HAVE_OPTPROBES=y
-CONFIG_HAVE_PERF_EVENTS=y
-CONFIG_HAVE_PERF_REGS=y
-CONFIG_HAVE_PERF_USER_STACK_DUMP=y
-CONFIG_HAVE_PROC_CPU=y
-CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
-CONFIG_HAVE_SMP=y
-CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
-CONFIG_HAVE_UID16=y
-CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
-CONFIG_HIGHMEM=y
-# CONFIG_HIGHPTE is not set
-CONFIG_HZ_FIXED=0
-CONFIG_HZ_PERIODIC=y
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_IOMMU_HELPER=y
-CONFIG_IRQCHIP=y
-CONFIG_IRQ_DOMAIN=y
-CONFIG_IRQ_DOMAIN_HIERARCHY=y
-CONFIG_IRQ_FORCED_THREADING=y
-CONFIG_IRQ_WORK=y
-CONFIG_LIBFDT=y
-CONFIG_LOCK_SPIN_ON_OWNER=y
-CONFIG_LZO_COMPRESS=y
-CONFIG_LZO_DECOMPRESS=y
-CONFIG_MDIO_BOARDINFO=y
-CONFIG_MIGHT_HAVE_CACHE_L2X0=y
-CONFIG_MIGHT_HAVE_PCI=y
-CONFIG_MODULES_USE_ELF_REL=y
-CONFIG_MTD_BCM47XX_PARTS=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_BRCMNAND=y
-CONFIG_MTD_NAND_ECC=y
-# CONFIG_MTD_PHYSMAP_OF is not set
-CONFIG_MTD_SPI_BCM53XXSPIFLASH=y
-CONFIG_MTD_SPI_NOR=y
-CONFIG_MTD_UBI=y
-CONFIG_MTD_UBI_BEB_LIMIT=20
-CONFIG_MTD_UBI_BLOCK=y
-# CONFIG_MTD_UBI_FASTMAP is not set
-# CONFIG_MTD_UBI_GLUEBI is not set
-CONFIG_MTD_UBI_WL_THRESHOLD=4096
-CONFIG_MULTI_IRQ_HANDLER=y
-CONFIG_MUTEX_SPIN_ON_OWNER=y
-CONFIG_NEED_DMA_MAP_STATE=y
-CONFIG_NET_FLOW_LIMIT=y
-CONFIG_NO_BOOTMEM=y
-CONFIG_NR_CPUS=2
-CONFIG_OF=y
-CONFIG_OF_ADDRESS=y
-CONFIG_OF_ADDRESS_PCI=y
-CONFIG_OF_EARLY_FLATTREE=y
-CONFIG_OF_FLATTREE=y
-CONFIG_OF_GPIO=y
-CONFIG_OF_IRQ=y
-CONFIG_OF_MDIO=y
-CONFIG_OF_MTD=y
-CONFIG_OF_NET=y
-CONFIG_OF_PCI=y
-CONFIG_OF_PCI_IRQ=y
-CONFIG_OF_RESERVED_MEM=y
-CONFIG_OLD_SIGACTION=y
-CONFIG_OLD_SIGSUSPEND3=y
-CONFIG_OUTER_CACHE=y
-CONFIG_OUTER_CACHE_SYNC=y
-CONFIG_PAGEFLAGS_EXTENDED=y
-CONFIG_PAGE_OFFSET=0xC0000000
-CONFIG_PCI=y
-CONFIG_PCIE_IPROC=y
-CONFIG_PCIE_IPROC_BCMA=y
-# CONFIG_PCIE_IPROC_PLATFORM is not set
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_DOMAINS_GENERIC=y
-CONFIG_PERF_USE_VMALLOC=y
-CONFIG_PGTABLE_LEVELS=2
-CONFIG_PHYLIB=y
-CONFIG_PINCTRL=y
-# CONFIG_PL310_ERRATA_588369 is not set
-# CONFIG_PL310_ERRATA_727915 is not set
-# CONFIG_PL310_ERRATA_753970 is not set
-# CONFIG_PL310_ERRATA_769419 is not set
-CONFIG_RCU_STALL_COMMON=y
-CONFIG_RFS_ACCEL=y
-CONFIG_RPS=y
-CONFIG_RWSEM_SPIN_ON_OWNER=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_SCHED_HRTICK=y
-# CONFIG_SCSI_DMA is not set
-# CONFIG_SERIAL_AMBA_PL010 is not set
-# CONFIG_SERIAL_AMBA_PL011 is not set
-CONFIG_SERIAL_OF_PLATFORM=y
-CONFIG_SMP=y
-CONFIG_SMP_ON_UP=y
-CONFIG_SPARSE_IRQ=y
-CONFIG_SPI=y
-CONFIG_SPI_BCM53XX=y
-CONFIG_SPI_BITBANG=y
-CONFIG_SPI_GPIO=y
-CONFIG_SPI_MASTER=y
-CONFIG_SRCU=y
-CONFIG_STOP_MACHINE=y
-CONFIG_SWCONFIG=y
-CONFIG_SWIOTLB=y
-CONFIG_SWP_EMULATE=y
-CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-# CONFIG_THUMB2_KERNEL is not set
-CONFIG_TICK_CPU_ACCOUNTING=y
-CONFIG_TREE_RCU=y
-CONFIG_UBIFS_FS=y
-# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
-CONFIG_UBIFS_FS_LZO=y
-CONFIG_UBIFS_FS_XZ=y
-CONFIG_UBIFS_FS_ZLIB=y
-CONFIG_UID16=y
-CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
-CONFIG_USB_SUPPORT=y
-CONFIG_USE_OF=y
-CONFIG_VECTORS_BASE=0xffff0000
-# CONFIG_VFP is not set
-CONFIG_WATCHDOG_CORE=y
-CONFIG_XPS=y
-CONFIG_XZ_DEC_ARM=y
-CONFIG_XZ_DEC_BCJ=y
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZLIB_DEFLATE=y
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZONE_DMA_FLAG=0
diff --git a/target/linux/bcm53xx/config-4.3 b/target/linux/bcm53xx/config-4.3
deleted file mode 100644 (file)
index 337c598..0000000
+++ /dev/null
@@ -1,314 +0,0 @@
-CONFIG_ALIGNMENT_TRAP=y
-CONFIG_ARCH_BCM=y
-# CONFIG_ARCH_BCM_21664 is not set
-# CONFIG_ARCH_BCM_281XX is not set
-CONFIG_ARCH_BCM_5301X=y
-# CONFIG_ARCH_BCM_63XX is not set
-# CONFIG_ARCH_BCM_CYGNUS is not set
-CONFIG_ARCH_BCM_IPROC=y
-# CONFIG_ARCH_BRCMSTB is not set
-CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
-CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
-CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
-CONFIG_ARCH_HAS_SG_CHAIN=y
-CONFIG_ARCH_HAS_TICK_BROADCAST=y
-CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
-CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
-CONFIG_ARCH_MULTIPLATFORM=y
-# CONFIG_ARCH_MULTI_CPU_AUTO is not set
-CONFIG_ARCH_MULTI_V6_V7=y
-CONFIG_ARCH_MULTI_V7=y
-CONFIG_ARCH_NR_GPIO=0
-CONFIG_ARCH_REQUIRE_GPIOLIB=y
-# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
-# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
-CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
-CONFIG_ARCH_SUPPORTS_UPROBES=y
-CONFIG_ARCH_SUSPEND_POSSIBLE=y
-CONFIG_ARCH_USE_BUILTIN_BSWAP=y
-CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
-CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
-CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
-CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
-CONFIG_ARM=y
-CONFIG_ARM_AMBA=y
-CONFIG_ARM_APPENDED_DTB=y
-# CONFIG_ARM_ATAG_DTB_COMPAT is not set
-# CONFIG_ARM_CPU_SUSPEND is not set
-CONFIG_ARM_ERRATA_754322=y
-CONFIG_ARM_ERRATA_764369=y
-CONFIG_ARM_ERRATA_775420=y
-CONFIG_ARM_GIC=y
-CONFIG_ARM_GLOBAL_TIMER=y
-CONFIG_ARM_HAS_SG_CHAIN=y
-CONFIG_ARM_HEAVY_MB=y
-CONFIG_ARM_L1_CACHE_SHIFT=6
-CONFIG_ARM_L1_CACHE_SHIFT_6=y
-# CONFIG_ARM_LPAE is not set
-CONFIG_ARM_PATCH_PHYS_VIRT=y
-# CONFIG_ARM_SP805_WATCHDOG is not set
-CONFIG_ARM_THUMB=y
-# CONFIG_ARM_THUMBEE is not set
-CONFIG_ARM_VIRT_EXT=y
-CONFIG_ATAGS=y
-CONFIG_AUTO_ZRELADDR=y
-CONFIG_B53=y
-# CONFIG_B53_MMAP_DRIVER is not set
-# CONFIG_B53_PHY_DRIVER is not set
-CONFIG_B53_SRAB_DRIVER=y
-CONFIG_BCM47XX_NVRAM=y
-CONFIG_BCM47XX_SPROM=y
-CONFIG_BCM47XX_WDT=y
-CONFIG_BCMA=y
-CONFIG_BCMA_BLOCKIO=y
-CONFIG_BCMA_DEBUG=y
-CONFIG_BCMA_DRIVER_GMAC_CMN=y
-CONFIG_BCMA_DRIVER_GPIO=y
-CONFIG_BCMA_DRIVER_PCI=y
-CONFIG_BCMA_HOST_PCI=y
-CONFIG_BCMA_HOST_PCI_POSSIBLE=y
-CONFIG_BCMA_HOST_SOC=y
-CONFIG_BGMAC=y
-CONFIG_BOUNCE=y
-CONFIG_CACHE_L2X0=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_CLKDEV_LOOKUP=y
-CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y
-CONFIG_CLKSRC_MMIO=y
-CONFIG_CLKSRC_OF=y
-CONFIG_CLONE_BACKWARDS=y
-CONFIG_COMMON_CLK=y
-CONFIG_COMMON_CLK_IPROC=y
-CONFIG_CPU_32v6K=y
-CONFIG_CPU_32v7=y
-CONFIG_CPU_ABRT_EV7=y
-# CONFIG_CPU_BPREDICT_DISABLE is not set
-CONFIG_CPU_CACHE_V7=y
-CONFIG_CPU_CACHE_VIPT=y
-CONFIG_CPU_COPY_V6=y
-CONFIG_CPU_CP15=y
-CONFIG_CPU_CP15_MMU=y
-CONFIG_CPU_HAS_ASID=y
-# CONFIG_CPU_ICACHE_DISABLE is not set
-CONFIG_CPU_PABRT_V7=y
-CONFIG_CPU_RMAP=y
-CONFIG_CPU_TLB_V7=y
-CONFIG_CPU_V7=y
-CONFIG_CRC16=y
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_LZO=y
-CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_WORKQUEUE=y
-CONFIG_CRYPTO_XZ=y
-CONFIG_DCACHE_WORD_ACCESS=y
-CONFIG_DEBUG_BCM_5301X=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_LL=y
-CONFIG_DEBUG_LL_INCLUDE="debug/8250.S"
-CONFIG_DEBUG_UART_8250=y
-# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set
-CONFIG_DEBUG_UART_8250_SHIFT=0
-CONFIG_DEBUG_UART_PHYS=0x18000300
-CONFIG_DEBUG_UART_VIRT=0xf1000300
-CONFIG_DEBUG_UNCOMPRESS=y
-CONFIG_DEBUG_USER=y
-CONFIG_DTC=y
-CONFIG_EARLY_PRINTK=y
-CONFIG_EDAC_ATOMIC_SCRUB=y
-CONFIG_EDAC_SUPPORT=y
-CONFIG_FIXED_PHY=y
-CONFIG_FIX_EARLYCON_MEM=y
-CONFIG_FRAME_POINTER=y
-CONFIG_GENERIC_ALLOCATOR=y
-CONFIG_GENERIC_BUG=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
-CONFIG_GENERIC_IDLE_POLL_SETUP=y
-CONFIG_GENERIC_IO=y
-CONFIG_GENERIC_IRQ_SHOW=y
-CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
-CONFIG_GENERIC_PCI_IOMAP=y
-CONFIG_GENERIC_PINCONF=y
-CONFIG_GENERIC_SCHED_CLOCK=y
-CONFIG_GENERIC_SMP_IDLE_THREAD=y
-CONFIG_GENERIC_STRNCPY_FROM_USER=y
-CONFIG_GENERIC_STRNLEN_USER=y
-CONFIG_GPIOLIB=y
-CONFIG_GPIOLIB_IRQCHIP=y
-CONFIG_GPIO_74X164=y
-CONFIG_GPIO_DEVRES=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_HANDLE_DOMAIN_IRQ=y
-CONFIG_HARDIRQS_SW_RESEND=y
-CONFIG_HAS_DMA=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT_MAP=y
-# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
-CONFIG_HAVE_ARCH_AUDITSYSCALL=y
-CONFIG_HAVE_ARCH_BITREVERSE=y
-CONFIG_HAVE_ARCH_JUMP_LABEL=y
-CONFIG_HAVE_ARCH_KGDB=y
-CONFIG_HAVE_ARCH_PFN_VALID=y
-CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
-CONFIG_HAVE_ARCH_TRACEHOOK=y
-CONFIG_HAVE_ARM_SCU=y
-CONFIG_HAVE_ARM_TWD=y
-# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
-CONFIG_HAVE_BPF_JIT=y
-CONFIG_HAVE_CC_STACKPROTECTOR=y
-CONFIG_HAVE_CLK=y
-CONFIG_HAVE_CLK_PREPARE=y
-CONFIG_HAVE_CONTEXT_TRACKING=y
-CONFIG_HAVE_C_RECORDMCOUNT=y
-CONFIG_HAVE_DEBUG_KMEMLEAK=y
-CONFIG_HAVE_DMA_API_DEBUG=y
-CONFIG_HAVE_DMA_ATTRS=y
-CONFIG_HAVE_DMA_CONTIGUOUS=y
-CONFIG_HAVE_DYNAMIC_FTRACE=y
-CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
-CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
-CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
-CONFIG_HAVE_FUNCTION_TRACER=y
-CONFIG_HAVE_GENERIC_DMA_COHERENT=y
-CONFIG_HAVE_IDE=y
-CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
-CONFIG_HAVE_KERNEL_GZIP=y
-CONFIG_HAVE_KERNEL_LZ4=y
-CONFIG_HAVE_KERNEL_LZMA=y
-CONFIG_HAVE_KERNEL_LZO=y
-CONFIG_HAVE_KERNEL_XZ=y
-CONFIG_HAVE_MEMBLOCK=y
-CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
-CONFIG_HAVE_NET_DSA=y
-CONFIG_HAVE_OPROFILE=y
-CONFIG_HAVE_OPTPROBES=y
-CONFIG_HAVE_PERF_EVENTS=y
-CONFIG_HAVE_PERF_REGS=y
-CONFIG_HAVE_PERF_USER_STACK_DUMP=y
-CONFIG_HAVE_PROC_CPU=y
-CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
-CONFIG_HAVE_SMP=y
-CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
-CONFIG_HAVE_UID16=y
-CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
-CONFIG_HIGHMEM=y
-# CONFIG_HIGHPTE is not set
-CONFIG_HZ_FIXED=0
-CONFIG_HZ_PERIODIC=y
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_IOMMU_HELPER=y
-CONFIG_IRQCHIP=y
-CONFIG_IRQ_DOMAIN=y
-CONFIG_IRQ_DOMAIN_HIERARCHY=y
-CONFIG_IRQ_FORCED_THREADING=y
-CONFIG_IRQ_WORK=y
-CONFIG_LIBFDT=y
-CONFIG_LOCK_SPIN_ON_OWNER=y
-CONFIG_LZO_COMPRESS=y
-CONFIG_LZO_DECOMPRESS=y
-CONFIG_MDIO_BOARDINFO=y
-CONFIG_MIGHT_HAVE_CACHE_L2X0=y
-CONFIG_MIGHT_HAVE_PCI=y
-CONFIG_MODULES_USE_ELF_REL=y
-CONFIG_MTD_BCM47XX_PARTS=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_BRCMNAND=y
-CONFIG_MTD_NAND_ECC=y
-# CONFIG_MTD_PHYSMAP_OF is not set
-CONFIG_MTD_SPI_BCM53XXSPIFLASH=y
-CONFIG_MTD_SPI_NOR=y
-CONFIG_MTD_UBI=y
-CONFIG_MTD_UBI_BEB_LIMIT=20
-CONFIG_MTD_UBI_BLOCK=y
-# CONFIG_MTD_UBI_FASTMAP is not set
-# CONFIG_MTD_UBI_GLUEBI is not set
-CONFIG_MTD_UBI_WL_THRESHOLD=4096
-CONFIG_MULTI_IRQ_HANDLER=y
-CONFIG_MUTEX_SPIN_ON_OWNER=y
-CONFIG_NEED_DMA_MAP_STATE=y
-CONFIG_NET_FLOW_LIMIT=y
-CONFIG_NO_BOOTMEM=y
-CONFIG_NR_CPUS=2
-CONFIG_OF=y
-CONFIG_OF_ADDRESS=y
-CONFIG_OF_ADDRESS_PCI=y
-CONFIG_OF_EARLY_FLATTREE=y
-CONFIG_OF_FLATTREE=y
-CONFIG_OF_GPIO=y
-CONFIG_OF_IRQ=y
-CONFIG_OF_MDIO=y
-CONFIG_OF_MTD=y
-CONFIG_OF_NET=y
-CONFIG_OF_PCI=y
-CONFIG_OF_PCI_IRQ=y
-CONFIG_OF_RESERVED_MEM=y
-CONFIG_OLD_SIGACTION=y
-CONFIG_OLD_SIGSUSPEND3=y
-CONFIG_OUTER_CACHE=y
-CONFIG_OUTER_CACHE_SYNC=y
-CONFIG_PAGEFLAGS_EXTENDED=y
-CONFIG_PAGE_OFFSET=0xC0000000
-CONFIG_PCI=y
-CONFIG_PCIE_IPROC=y
-CONFIG_PCIE_IPROC_BCMA=y
-# CONFIG_PCIE_IPROC_PLATFORM is not set
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_DOMAINS_GENERIC=y
-CONFIG_PERF_USE_VMALLOC=y
-CONFIG_PGTABLE_LEVELS=2
-CONFIG_PHYLIB=y
-CONFIG_PINCTRL=y
-# CONFIG_PL310_ERRATA_588369 is not set
-# CONFIG_PL310_ERRATA_727915 is not set
-# CONFIG_PL310_ERRATA_753970 is not set
-# CONFIG_PL310_ERRATA_769419 is not set
-CONFIG_RCU_STALL_COMMON=y
-CONFIG_RFS_ACCEL=y
-CONFIG_RPS=y
-CONFIG_RWSEM_SPIN_ON_OWNER=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_SCHED_HRTICK=y
-# CONFIG_SCHED_INFO is not set
-# CONFIG_SCSI_DMA is not set
-# CONFIG_SERIAL_AMBA_PL010 is not set
-# CONFIG_SERIAL_AMBA_PL011 is not set
-CONFIG_SERIAL_OF_PLATFORM=y
-# CONFIG_SG_SPLIT is not set
-CONFIG_SMP=y
-CONFIG_SMP_ON_UP=y
-CONFIG_SPARSE_IRQ=y
-CONFIG_SPI=y
-CONFIG_SPI_BCM53XX=y
-CONFIG_SPI_BITBANG=y
-CONFIG_SPI_GPIO=y
-CONFIG_SPI_MASTER=y
-CONFIG_SRCU=y
-CONFIG_STOP_MACHINE=y
-# CONFIG_SUNXI_SRAM is not set
-CONFIG_SWCONFIG=y
-CONFIG_SWIOTLB=y
-CONFIG_SWP_EMULATE=y
-CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-# CONFIG_THUMB2_KERNEL is not set
-CONFIG_TICK_CPU_ACCOUNTING=y
-CONFIG_TREE_RCU=y
-CONFIG_UBIFS_FS=y
-# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
-CONFIG_UBIFS_FS_LZO=y
-CONFIG_UBIFS_FS_XZ=y
-CONFIG_UBIFS_FS_ZLIB=y
-CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
-CONFIG_USB_SUPPORT=y
-CONFIG_USE_OF=y
-CONFIG_VECTORS_BASE=0xffff0000
-# CONFIG_VFP is not set
-CONFIG_WATCHDOG_CORE=y
-CONFIG_XPS=y
-CONFIG_XZ_DEC_ARM=y
-CONFIG_XZ_DEC_BCJ=y
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZLIB_DEFLATE=y
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZONE_DMA_FLAG=0
diff --git a/target/linux/bcm53xx/files-4.1/drivers/firmware/broadcom/Kconfig b/target/linux/bcm53xx/files-4.1/drivers/firmware/broadcom/Kconfig
deleted file mode 100644 (file)
index 3c7e5b7..0000000
+++ /dev/null
@@ -1,22 +0,0 @@
-config BCM47XX_NVRAM
-       bool "Broadcom NVRAM driver"
-       depends on BCM47XX || ARCH_BCM_5301X
-       help
-         Broadcom home routers contain flash partition called "nvram" with all
-         important hardware configuration as well as some minor user setup.
-         NVRAM partition contains a text-like data representing name=value
-         pairs.
-         This driver provides an easy way to get value of requested parameter.
-         It simply reads content of NVRAM and parses it. It doesn't control any
-         hardware part itself.
-
-config BCM47XX_SPROM
-       bool "Broadcom SPROM driver"
-       depends on BCM47XX_NVRAM
-       help
-         Broadcom devices store configuration data in SPROM. Accessing it is
-         specific to the bus host type, e.g. PCI(e) devices have it mapped in
-         a PCI BAR.
-         In case of SoC devices SPROM content is stored on a flash used by
-         bootloader firmware CFE. This driver provides method to ssb and bcma
-         drivers to read SPROM on SoC.
diff --git a/target/linux/bcm53xx/files-4.1/drivers/firmware/broadcom/Makefile b/target/linux/bcm53xx/files-4.1/drivers/firmware/broadcom/Makefile
deleted file mode 100644 (file)
index f93efc4..0000000
+++ /dev/null
@@ -1,2 +0,0 @@
-obj-$(CONFIG_BCM47XX_NVRAM)            += bcm47xx_nvram.o
-obj-$(CONFIG_BCM47XX_SPROM)            += bcm47xx_sprom.o
diff --git a/target/linux/bcm53xx/files-4.1/drivers/firmware/broadcom/bcm47xx_nvram.c b/target/linux/bcm53xx/files-4.1/drivers/firmware/broadcom/bcm47xx_nvram.c
deleted file mode 100644 (file)
index 87add3f..0000000
+++ /dev/null
@@ -1,248 +0,0 @@
-/*
- * BCM947xx nvram variable access
- *
- * Copyright (C) 2005 Broadcom Corporation
- * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
- * Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under  the terms of the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-#include <linux/io.h>
-#include <linux/types.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/mtd/mtd.h>
-#include <linux/bcm47xx_nvram.h>
-
-#define NVRAM_MAGIC                    0x48534C46      /* 'FLSH' */
-#define NVRAM_SPACE                    0x10000
-#define NVRAM_MAX_GPIO_ENTRIES         32
-#define NVRAM_MAX_GPIO_VALUE_LEN       30
-
-#define FLASH_MIN              0x00020000      /* Minimum flash size */
-
-struct nvram_header {
-       u32 magic;
-       u32 len;
-       u32 crc_ver_init;       /* 0:7 crc, 8:15 ver, 16:31 sdram_init */
-       u32 config_refresh;     /* 0:15 sdram_config, 16:31 sdram_refresh */
-       u32 config_ncdl;        /* ncdl values for memc */
-};
-
-static char nvram_buf[NVRAM_SPACE];
-static size_t nvram_len;
-static const u32 nvram_sizes[] = {0x8000, 0xF000, 0x10000};
-
-static u32 find_nvram_size(void __iomem *end)
-{
-       struct nvram_header __iomem *header;
-       int i;
-
-       for (i = 0; i < ARRAY_SIZE(nvram_sizes); i++) {
-               header = (struct nvram_header *)(end - nvram_sizes[i]);
-               if (header->magic == NVRAM_MAGIC)
-                       return nvram_sizes[i];
-       }
-
-       return 0;
-}
-
-/* Probe for NVRAM header */
-static int nvram_find_and_copy(void __iomem *iobase, u32 lim)
-{
-       struct nvram_header __iomem *header;
-       int i;
-       u32 off;
-       u32 *src, *dst;
-       u32 size;
-
-       if (nvram_len) {
-               pr_warn("nvram already initialized\n");
-               return -EEXIST;
-       }
-
-       /* TODO: when nvram is on nand flash check for bad blocks first. */
-       off = FLASH_MIN;
-       while (off <= lim) {
-               /* Windowed flash access */
-               size = find_nvram_size(iobase + off);
-               if (size) {
-                       header = (struct nvram_header *)(iobase + off - size);
-                       goto found;
-               }
-               off <<= 1;
-       }
-
-       /* Try embedded NVRAM at 4 KB and 1 KB as last resorts */
-       header = (struct nvram_header *)(iobase + 4096);
-       if (header->magic == NVRAM_MAGIC) {
-               size = NVRAM_SPACE;
-               goto found;
-       }
-
-       header = (struct nvram_header *)(iobase + 1024);
-       if (header->magic == NVRAM_MAGIC) {
-               size = NVRAM_SPACE;
-               goto found;
-       }
-
-       pr_err("no nvram found\n");
-       return -ENXIO;
-
-found:
-       src = (u32 *)header;
-       dst = (u32 *)nvram_buf;
-       for (i = 0; i < sizeof(struct nvram_header); i += 4)
-               *dst++ = __raw_readl(src++);
-       header = (struct nvram_header *)nvram_buf;
-       nvram_len = header->len;
-       if (nvram_len > size) {
-               pr_err("The nvram size according to the header seems to be bigger than the partition on flash\n");
-               nvram_len = size;
-       }
-       if (nvram_len >= NVRAM_SPACE) {
-               pr_err("nvram on flash (%i bytes) is bigger than the reserved space in memory, will just copy the first %i bytes\n",
-                      header->len, NVRAM_SPACE - 1);
-               nvram_len = NVRAM_SPACE - 1;
-       }
-       /* proceed reading data after header */
-       for (; i < nvram_len; i += 4)
-               *dst++ = readl(src++);
-       nvram_buf[NVRAM_SPACE - 1] = '\0';
-
-       return 0;
-}
-
-/*
- * On bcm47xx we need access to the NVRAM very early, so we can't use mtd
- * subsystem to access flash. We can't even use platform device / driver to
- * store memory offset.
- * To handle this we provide following symbol. It's supposed to be called as
- * soon as we get info about flash device, before any NVRAM entry is needed.
- */
-int bcm47xx_nvram_init_from_mem(u32 base, u32 lim)
-{
-       void __iomem *iobase;
-       int err;
-
-       iobase = ioremap_nocache(base, lim);
-       if (!iobase)
-               return -ENOMEM;
-
-       err = nvram_find_and_copy(iobase, lim);
-
-       iounmap(iobase);
-
-       return err;
-}
-
-static int nvram_init(void)
-{
-#ifdef CONFIG_MTD
-       struct mtd_info *mtd;
-       struct nvram_header header;
-       size_t bytes_read;
-       int err;
-
-       mtd = get_mtd_device_nm("nvram");
-       if (IS_ERR(mtd))
-               return -ENODEV;
-
-       err = mtd_read(mtd, 0, sizeof(header), &bytes_read, (uint8_t *)&header);
-       if (!err && header.magic == NVRAM_MAGIC &&
-           header.len > sizeof(header)) {
-               nvram_len = header.len;
-               if (nvram_len >= NVRAM_SPACE) {
-                       pr_err("nvram on flash (%i bytes) is bigger than the reserved space in memory, will just copy the first %i bytes\n",
-                               header.len, NVRAM_SPACE);
-                       nvram_len = NVRAM_SPACE - 1;
-               }
-
-               err = mtd_read(mtd, 0, nvram_len, &nvram_len,
-                              (u8 *)nvram_buf);
-               return err;
-       }
-#endif
-
-       return -ENXIO;
-}
-
-int bcm47xx_nvram_getenv(const char *name, char *val, size_t val_len)
-{
-       char *var, *value, *end, *eq;
-       int err;
-
-       if (!name)
-               return -EINVAL;
-
-       if (!nvram_len) {
-               err = nvram_init();
-               if (err)
-                       return err;
-       }
-
-       /* Look for name=value and return value */
-       var = &nvram_buf[sizeof(struct nvram_header)];
-       end = nvram_buf + sizeof(nvram_buf);
-       while (var < end && *var) {
-               eq = strchr(var, '=');
-               if (!eq)
-                       break;
-               value = eq + 1;
-               if (eq - var == strlen(name) &&
-                   strncmp(var, name, eq - var) == 0)
-                       return snprintf(val, val_len, "%s", value);
-               var = value + strlen(value) + 1;
-       }
-       return -ENOENT;
-}
-EXPORT_SYMBOL(bcm47xx_nvram_getenv);
-
-int bcm47xx_nvram_gpio_pin(const char *name)
-{
-       int i, err;
-       char nvram_var[] = "gpioXX";
-       char buf[NVRAM_MAX_GPIO_VALUE_LEN];
-
-       /* TODO: Optimize it to don't call getenv so many times */
-       for (i = 0; i < NVRAM_MAX_GPIO_ENTRIES; i++) {
-               err = snprintf(nvram_var, sizeof(nvram_var), "gpio%i", i);
-               if (err <= 0)
-                       continue;
-               err = bcm47xx_nvram_getenv(nvram_var, buf, sizeof(buf));
-               if (err <= 0)
-                       continue;
-               if (!strcmp(name, buf))
-                       return i;
-       }
-       return -ENOENT;
-}
-EXPORT_SYMBOL(bcm47xx_nvram_gpio_pin);
-
-char *bcm47xx_nvram_get_contents(size_t *nvram_size)
-{
-       int err;
-       char *nvram;
-
-       if (!nvram_len) {
-               err = nvram_init();
-               if (err)
-                       return NULL;
-       }
-
-       *nvram_size = nvram_len - sizeof(struct nvram_header);
-       nvram = vmalloc(*nvram_size);
-       if (!nvram)
-               return NULL;
-       memcpy(nvram, &nvram_buf[sizeof(struct nvram_header)], *nvram_size);
-
-       return nvram;
-}
-EXPORT_SYMBOL(bcm47xx_nvram_get_contents);
-
-MODULE_LICENSE("GPLv2");
diff --git a/target/linux/bcm53xx/patches-4.1/020-ARM-BCM5310X-activate-erratas-needed-for-SoC.patch b/target/linux/bcm53xx/patches-4.1/020-ARM-BCM5310X-activate-erratas-needed-for-SoC.patch
deleted file mode 100644 (file)
index d1868f3..0000000
+++ /dev/null
@@ -1,31 +0,0 @@
-From f4ce7effe2253a325f8ba182903cbdf0d8698593 Mon Sep 17 00:00:00 2001
-From: Hauke Mehrtens <hauke@hauke-m.de>
-Date: Sat, 21 Nov 2015 15:29:47 +0100
-Subject: [PATCH] ARM: BCM5310X: activate erratas needed for SoC
-
-The BCM4708 I have, which is probably the first generation which got
-to the consumer market, is using a ARM Cortex-A9 rev r3p0 and a
-L2C-310 rev r3p2 L2 cache controller. There are 3 workarounds for known
-erratas in the Linux kernel which could be activated and will be in
-this patch. There are currently no workarounds which have to be
-activated for the L2C-310 rev r3p2 in Linux.
-
-Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
-Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
----
- arch/arm/mach-bcm/Kconfig | 4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/arch/arm/mach-bcm/Kconfig
-+++ b/arch/arm/mach-bcm/Kconfig
-@@ -38,6 +38,10 @@ config ARCH_BCM_CYGNUS
- config ARCH_BCM_5301X
-       bool "Broadcom BCM470X / BCM5301X ARM SoC" if ARCH_MULTI_V7
-       select ARCH_BCM_IPROC
-+      select ARM_ERRATA_754322
-+      select ARM_ERRATA_775420
-+      select ARM_ERRATA_764369 if SMP
-+
-       help
-         Support for Broadcom BCM470X and BCM5301X SoCs with ARM CPU cores.
diff --git a/target/linux/bcm53xx/patches-4.1/030-0001-PCI-iproc-Allow-override-of-device-tree-IRQ-mapping-.patch b/target/linux/bcm53xx/patches-4.1/030-0001-PCI-iproc-Allow-override-of-device-tree-IRQ-mapping-.patch
deleted file mode 100644 (file)
index 9050f72..0000000
+++ /dev/null
@@ -1,53 +0,0 @@
-From c1e02ceaf5739d32f092ac07bf886a0281ec40b1 Mon Sep 17 00:00:00 2001
-From: Hauke Mehrtens <hauke@hauke-m.de>
-Date: Tue, 12 May 2015 23:23:00 +0200
-Subject: [PATCH 1/2] PCI: iproc: Allow override of device tree IRQ mapping
- function
-
-The iProc core PCIe driver defaults to using of_irq_parse_and_map_pci() for
-IRQ mapping.  Add iproc_pcie.map_irq so bus interfaces that don't use
-device tree can override this by supplying their own IRQ mapping function.
-
-[bhelgaas: changelog]
-Posting: http://lkml.kernel.org/r/1431465781-10753-1-git-send-email-hauke@hauke-m.de
-Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Reviewed-by: Ray Jui <rjui@broadcom.com.com>
----
- drivers/pci/host/pcie-iproc-platform.c | 2 ++
- drivers/pci/host/pcie-iproc.c          | 2 +-
- drivers/pci/host/pcie-iproc.h          | 1 +
- 3 files changed, 4 insertions(+), 1 deletion(-)
-
---- a/drivers/pci/host/pcie-iproc-platform.c
-+++ b/drivers/pci/host/pcie-iproc-platform.c
-@@ -71,6 +71,8 @@ static int iproc_pcie_pltfm_probe(struct
-       pcie->resources = &res;
-+      pcie->map_irq = of_irq_parse_and_map_pci;
-+
-       ret = iproc_pcie_setup(pcie);
-       if (ret) {
-               dev_err(pcie->dev, "PCIe controller setup failed\n");
---- a/drivers/pci/host/pcie-iproc.c
-+++ b/drivers/pci/host/pcie-iproc.c
-@@ -229,7 +229,7 @@ int iproc_pcie_setup(struct iproc_pcie *
-       pci_scan_child_bus(bus);
-       pci_assign_unassigned_bus_resources(bus);
--      pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
-+      pci_fixup_irqs(pci_common_swizzle, pcie->map_irq);
-       pci_bus_add_devices(bus);
-       return 0;
---- a/drivers/pci/host/pcie-iproc.h
-+++ b/drivers/pci/host/pcie-iproc.h
-@@ -34,6 +34,7 @@ struct iproc_pcie {
-       struct pci_bus *root_bus;
-       struct phy *phy;
-       int irqs[IPROC_PCIE_MAX_NUM_IRQS];
-+      int (*map_irq)(const struct pci_dev *, u8, u8);
- };
- int iproc_pcie_setup(struct iproc_pcie *pcie);
diff --git a/target/linux/bcm53xx/patches-4.1/030-0002-PCI-iproc-Add-BCMA-PCIe-driver.patch b/target/linux/bcm53xx/patches-4.1/030-0002-PCI-iproc-Add-BCMA-PCIe-driver.patch
deleted file mode 100644 (file)
index a850baf..0000000
+++ /dev/null
@@ -1,177 +0,0 @@
-From 4785ffbdc9b52e308e43b9e2dcc1dca44f056d76 Mon Sep 17 00:00:00 2001
-From: Hauke Mehrtens <hauke@hauke-m.de>
-Date: Tue, 12 May 2015 23:23:01 +0200
-Subject: [PATCH 2/2] PCI: iproc: Add BCMA PCIe driver
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This driver adds support for the PCIe 2.0 controller found on the BCMA bus.
-This controller can be found on (mostly) all Broadcom BCM470X / BCM5301X
-ARM SoCs.
-
-The driver found in the Broadcom SDK does some more stuff, like setting up
-some DMA memory areas, chaining MPS and MRRS to 512 and also some PHY
-changes like "improving" the PCIe jitter and doing some special
-initialization for the 3rd PCIe port.
-
-This was tested on a bcm4708 board with 2 PCIe ports and wireless cards
-connected to them.
-
-PCI_DOMAINS is needed by this driver, because normally there is more than
-one PCIe controller and without PCI_DOMAINS only the first controller gets
-registered.  This controller gets 6 IRQs; the last one is trigged by all
-IRQ events.
-
-[bhelgaas: fix "GPLv2" MODULE_LICENSE typo]
-Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Acked-by: Rafał Miłecki <zajec5@gmail.com>
-Acked-by: Ray Jui <rjui@broadcom.com.com>
----
- drivers/pci/host/Kconfig           |  11 ++++
- drivers/pci/host/Makefile          |   1 +
- drivers/pci/host/pcie-iproc-bcma.c | 112 +++++++++++++++++++++++++++++++++++++
- 3 files changed, 124 insertions(+)
- create mode 100644 drivers/pci/host/pcie-iproc-bcma.c
-
---- a/drivers/pci/host/Kconfig
-+++ b/drivers/pci/host/Kconfig
-@@ -125,4 +125,15 @@ config PCIE_IPROC_PLATFORM
-         Say Y here if you want to use the Broadcom iProc PCIe controller
-         through the generic platform bus interface
-+config PCIE_IPROC_BCMA
-+      bool "Broadcom iProc PCIe BCMA bus driver"
-+      depends on ARCH_BCM_IPROC || (ARM && COMPILE_TEST)
-+      select PCIE_IPROC
-+      select BCMA
-+      select PCI_DOMAINS
-+      default ARCH_BCM_5301X
-+      help
-+        Say Y here if you want to use the Broadcom iProc PCIe controller
-+        through the BCMA bus interface
-+
- endmenu
---- a/drivers/pci/host/Makefile
-+++ b/drivers/pci/host/Makefile
-@@ -15,3 +15,4 @@ obj-$(CONFIG_PCI_LAYERSCAPE) += pci-laye
- obj-$(CONFIG_PCI_VERSATILE) += pci-versatile.o
- obj-$(CONFIG_PCIE_IPROC) += pcie-iproc.o
- obj-$(CONFIG_PCIE_IPROC_PLATFORM) += pcie-iproc-platform.o
-+obj-$(CONFIG_PCIE_IPROC_BCMA) += pcie-iproc-bcma.o
---- /dev/null
-+++ b/drivers/pci/host/pcie-iproc-bcma.c
-@@ -0,0 +1,112 @@
-+/*
-+ * Copyright (C) 2015 Broadcom Corporation
-+ * Copyright (C) 2015 Hauke Mehrtens <hauke@hauke-m.de>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation version 2.
-+ *
-+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
-+ * kind, whether express or implied; without even the implied warranty
-+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/pci.h>
-+#include <linux/module.h>
-+#include <linux/slab.h>
-+#include <linux/phy/phy.h>
-+#include <linux/bcma/bcma.h>
-+#include <linux/ioport.h>
-+
-+#include "pcie-iproc.h"
-+
-+
-+/* NS: CLASS field is R/O, and set to wrong 0x200 value */
-+static void bcma_pcie2_fixup_class(struct pci_dev *dev)
-+{
-+      dev->class = PCI_CLASS_BRIDGE_PCI << 8;
-+}
-+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_BROADCOM, 0x8011, bcma_pcie2_fixup_class);
-+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_BROADCOM, 0x8012, bcma_pcie2_fixup_class);
-+
-+static int iproc_pcie_bcma_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-+{
-+      struct pci_sys_data *sys = dev->sysdata;
-+      struct iproc_pcie *pcie = sys->private_data;
-+      struct bcma_device *bdev = container_of(pcie->dev, struct bcma_device, dev);
-+
-+      return bcma_core_irq(bdev, 5);
-+}
-+
-+static int iproc_pcie_bcma_probe(struct bcma_device *bdev)
-+{
-+      struct iproc_pcie *pcie;
-+      LIST_HEAD(res);
-+      struct resource res_mem;
-+      int ret;
-+
-+      pcie = devm_kzalloc(&bdev->dev, sizeof(*pcie), GFP_KERNEL);
-+      if (!pcie)
-+              return -ENOMEM;
-+
-+      pcie->dev = &bdev->dev;
-+      bcma_set_drvdata(bdev, pcie);
-+
-+      pcie->base = bdev->io_addr;
-+
-+      res_mem.start = bdev->addr_s[0];
-+      res_mem.end = bdev->addr_s[0] + SZ_128M - 1;
-+      res_mem.name = "PCIe MEM space";
-+      res_mem.flags = IORESOURCE_MEM;
-+      pci_add_resource(&res, &res_mem);
-+
-+      pcie->resources = &res;
-+
-+      pcie->map_irq = iproc_pcie_bcma_map_irq;
-+
-+      ret = iproc_pcie_setup(pcie);
-+      if (ret) {
-+              dev_err(pcie->dev, "PCIe controller setup failed\n");
-+              return ret;
-+      }
-+
-+      return 0;
-+}
-+
-+static void iproc_pcie_bcma_remove(struct bcma_device *bdev)
-+{
-+      struct iproc_pcie *pcie = bcma_get_drvdata(bdev);
-+
-+      iproc_pcie_remove(pcie);
-+}
-+
-+static const struct bcma_device_id iproc_pcie_bcma_table[] = {
-+      BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_PCIEG2, BCMA_ANY_REV, BCMA_ANY_CLASS),
-+      {},
-+};
-+MODULE_DEVICE_TABLE(bcma, iproc_pcie_bcma_table);
-+
-+static struct bcma_driver iproc_pcie_bcma_driver = {
-+      .name           = KBUILD_MODNAME,
-+      .id_table       = iproc_pcie_bcma_table,
-+      .probe          = iproc_pcie_bcma_probe,
-+      .remove         = iproc_pcie_bcma_remove,
-+};
-+
-+static int __init iproc_pcie_bcma_init(void)
-+{
-+      return bcma_driver_register(&iproc_pcie_bcma_driver);
-+}
-+module_init(iproc_pcie_bcma_init);
-+
-+static void __exit iproc_pcie_bcma_exit(void)
-+{
-+      bcma_driver_unregister(&iproc_pcie_bcma_driver);
-+}
-+module_exit(iproc_pcie_bcma_exit);
-+
-+MODULE_AUTHOR("Hauke Mehrtens");
-+MODULE_DESCRIPTION("Broadcom iProc PCIe BCMA driver");
-+MODULE_LICENSE("GPL v2");
diff --git a/target/linux/bcm53xx/patches-4.1/031-0001-PCI-iproc-Directly-add-PCI-resources.patch b/target/linux/bcm53xx/patches-4.1/031-0001-PCI-iproc-Directly-add-PCI-resources.patch
deleted file mode 100644 (file)
index 09d8226..0000000
+++ /dev/null
@@ -1,90 +0,0 @@
-From 18c4342aa56d70176eea85021e6fe8f6f8f39c7b Mon Sep 17 00:00:00 2001
-From: Hauke Mehrtens <hauke@hauke-m.de>
-Date: Sun, 24 May 2015 22:37:02 +0200
-Subject: [PATCH 1/2] PCI: iproc: Directly add PCI resources
-
-The struct iproc_pcie.resources member was pointing to a stack variable and
-is invalid after the registration function returned.
-
-Remove this pointer and add a parameter to the function.
-
-Tested-by: Ray Jui <rjui@broadcom.com>
-Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Reviewed-by: Ray Jui <rjui@broadcom.com>
----
- drivers/pci/host/pcie-iproc-bcma.c     | 4 +---
- drivers/pci/host/pcie-iproc-platform.c | 4 +---
- drivers/pci/host/pcie-iproc.c          | 4 ++--
- drivers/pci/host/pcie-iproc.h          | 3 +--
- 4 files changed, 5 insertions(+), 10 deletions(-)
-
---- a/drivers/pci/host/pcie-iproc-bcma.c
-+++ b/drivers/pci/host/pcie-iproc-bcma.c
-@@ -62,11 +62,9 @@ static int iproc_pcie_bcma_probe(struct
-       res_mem.flags = IORESOURCE_MEM;
-       pci_add_resource(&res, &res_mem);
--      pcie->resources = &res;
--
-       pcie->map_irq = iproc_pcie_bcma_map_irq;
--      ret = iproc_pcie_setup(pcie);
-+      ret = iproc_pcie_setup(pcie, &res);
-       if (ret) {
-               dev_err(pcie->dev, "PCIe controller setup failed\n");
-               return ret;
---- a/drivers/pci/host/pcie-iproc-platform.c
-+++ b/drivers/pci/host/pcie-iproc-platform.c
-@@ -69,11 +69,9 @@ static int iproc_pcie_pltfm_probe(struct
-               return ret;
-       }
--      pcie->resources = &res;
--
-       pcie->map_irq = of_irq_parse_and_map_pci;
--      ret = iproc_pcie_setup(pcie);
-+      ret = iproc_pcie_setup(pcie, &res);
-       if (ret) {
-               dev_err(pcie->dev, "PCIe controller setup failed\n");
-               return ret;
---- a/drivers/pci/host/pcie-iproc.c
-+++ b/drivers/pci/host/pcie-iproc.c
-@@ -183,7 +183,7 @@ static void iproc_pcie_enable(struct ipr
-       writel(SYS_RC_INTX_MASK, pcie->base + SYS_RC_INTX_EN);
- }
--int iproc_pcie_setup(struct iproc_pcie *pcie)
-+int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
- {
-       int ret;
-       struct pci_bus *bus;
-@@ -211,7 +211,7 @@ int iproc_pcie_setup(struct iproc_pcie *
-       pcie->sysdata.private_data = pcie;
-       bus = pci_create_root_bus(pcie->dev, 0, &iproc_pcie_ops,
--                                &pcie->sysdata, pcie->resources);
-+                                &pcie->sysdata, res);
-       if (!bus) {
-               dev_err(pcie->dev, "unable to create PCI root bus\n");
-               ret = -ENOMEM;
---- a/drivers/pci/host/pcie-iproc.h
-+++ b/drivers/pci/host/pcie-iproc.h
-@@ -29,7 +29,6 @@
- struct iproc_pcie {
-       struct device *dev;
-       void __iomem *base;
--      struct list_head *resources;
-       struct pci_sys_data sysdata;
-       struct pci_bus *root_bus;
-       struct phy *phy;
-@@ -37,7 +36,7 @@ struct iproc_pcie {
-       int (*map_irq)(const struct pci_dev *, u8, u8);
- };
--int iproc_pcie_setup(struct iproc_pcie *pcie);
-+int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res);
- int iproc_pcie_remove(struct iproc_pcie *pcie);
- #endif /* _PCIE_IPROC_H */
diff --git a/target/linux/bcm53xx/patches-4.1/031-0002-PCI-iproc-Free-resource-list-after-registration.patch b/target/linux/bcm53xx/patches-4.1/031-0002-PCI-iproc-Free-resource-list-after-registration.patch
deleted file mode 100644 (file)
index bbd3164..0000000
+++ /dev/null
@@ -1,57 +0,0 @@
-From ef07991a95de76b07594448c3521361831ec2cfe Mon Sep 17 00:00:00 2001
-From: Hauke Mehrtens <hauke@hauke-m.de>
-Date: Sun, 24 May 2015 22:37:03 +0200
-Subject: [PATCH 2/2] PCI: iproc: Free resource list after registration
-
-The resource list is only used in the setup process and was never freed.
-pci_add_resource() allocates a memory area to store the list item.
-
-Fix the memory leak.
-
-Tested-by: Ray Jui <rjui@broadcom.com>
-Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Reviewed-by: Ray Jui <rjui@broadcom.com>
----
- drivers/pci/host/pcie-iproc-bcma.c     | 8 ++++----
- drivers/pci/host/pcie-iproc-platform.c | 8 ++++----
- 2 files changed, 8 insertions(+), 8 deletions(-)
-
---- a/drivers/pci/host/pcie-iproc-bcma.c
-+++ b/drivers/pci/host/pcie-iproc-bcma.c
-@@ -65,12 +65,12 @@ static int iproc_pcie_bcma_probe(struct
-       pcie->map_irq = iproc_pcie_bcma_map_irq;
-       ret = iproc_pcie_setup(pcie, &res);
--      if (ret) {
-+      if (ret)
-               dev_err(pcie->dev, "PCIe controller setup failed\n");
--              return ret;
--      }
--      return 0;
-+      pci_free_resource_list(&res);
-+
-+      return ret;
- }
- static void iproc_pcie_bcma_remove(struct bcma_device *bdev)
---- a/drivers/pci/host/pcie-iproc-platform.c
-+++ b/drivers/pci/host/pcie-iproc-platform.c
-@@ -72,12 +72,12 @@ static int iproc_pcie_pltfm_probe(struct
-       pcie->map_irq = of_irq_parse_and_map_pci;
-       ret = iproc_pcie_setup(pcie, &res);
--      if (ret) {
-+      if (ret)
-               dev_err(pcie->dev, "PCIe controller setup failed\n");
--              return ret;
--      }
--      return 0;
-+      pci_free_resource_list(&res);
-+
-+      return ret;
- }
- static int iproc_pcie_pltfm_remove(struct platform_device *pdev)
diff --git a/target/linux/bcm53xx/patches-4.1/032-PCI-iproc-Delete-unnecessary-checks-before-phy-calls.patch b/target/linux/bcm53xx/patches-4.1/032-PCI-iproc-Delete-unnecessary-checks-before-phy-calls.patch
deleted file mode 100644 (file)
index fc83337..0000000
+++ /dev/null
@@ -1,79 +0,0 @@
-From 93972d18bbaba6f34e21742400b6e7461edc4837 Mon Sep 17 00:00:00 2001
-From: Markus Elfring <elfring@users.sourceforge.net>
-Date: Sun, 28 Jun 2015 16:42:04 +0200
-Subject: [PATCH] PCI: iproc: Delete unnecessary checks before phy calls
-
-The functions phy_exit() and phy_power_off() test whether their argument is
-NULL and then return immediately.  Thus the test around the calls is not
-needed.
-
-This issue was detected by using the Coccinelle software.
-
-[bhelgaas: also phy_init() and phy_power_on(), as Ray Jui suggested]
-[bhelgaas: also remove tests in iproc_pcie_remove()]
-Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Reviewed-by: Ray Jui <rjui@broadcom.com>
----
- drivers/pci/host/pcie-iproc.c | 34 +++++++++++++---------------------
- 1 file changed, 13 insertions(+), 21 deletions(-)
-
---- a/drivers/pci/host/pcie-iproc.c
-+++ b/drivers/pci/host/pcie-iproc.c
-@@ -191,19 +191,16 @@ int iproc_pcie_setup(struct iproc_pcie *
-       if (!pcie || !pcie->dev || !pcie->base)
-               return -EINVAL;
--      if (pcie->phy) {
--              ret = phy_init(pcie->phy);
--              if (ret) {
--                      dev_err(pcie->dev, "unable to initialize PCIe PHY\n");
--                      return ret;
--              }
--
--              ret = phy_power_on(pcie->phy);
--              if (ret) {
--                      dev_err(pcie->dev, "unable to power on PCIe PHY\n");
--                      goto err_exit_phy;
--              }
-+      ret = phy_init(pcie->phy);
-+      if (ret) {
-+              dev_err(pcie->dev, "unable to initialize PCIe PHY\n");
-+              return ret;
-+      }
-+      ret = phy_power_on(pcie->phy);
-+      if (ret) {
-+              dev_err(pcie->dev, "unable to power on PCIe PHY\n");
-+              goto err_exit_phy;
-       }
-       iproc_pcie_reset(pcie);
-@@ -239,12 +236,9 @@ err_rm_root_bus:
-       pci_remove_root_bus(bus);
- err_power_off_phy:
--      if (pcie->phy)
--              phy_power_off(pcie->phy);
-+      phy_power_off(pcie->phy);
- err_exit_phy:
--      if (pcie->phy)
--              phy_exit(pcie->phy);
--
-+      phy_exit(pcie->phy);
-       return ret;
- }
- EXPORT_SYMBOL(iproc_pcie_setup);
-@@ -254,10 +248,8 @@ int iproc_pcie_remove(struct iproc_pcie
-       pci_stop_root_bus(pcie->root_bus);
-       pci_remove_root_bus(pcie->root_bus);
--      if (pcie->phy) {
--              phy_power_off(pcie->phy);
--              phy_exit(pcie->phy);
--      }
-+      phy_power_off(pcie->phy);
-+      phy_exit(pcie->phy);
-       return 0;
- }
diff --git a/target/linux/bcm53xx/patches-4.1/033-0001-PCI-iproc-enable-arm64-support-for-iProc-PCIe.patch b/target/linux/bcm53xx/patches-4.1/033-0001-PCI-iproc-enable-arm64-support-for-iProc-PCIe.patch
deleted file mode 100644 (file)
index 78160f0..0000000
+++ /dev/null
@@ -1,116 +0,0 @@
-From db9d6d790968fd6df9faa7fa1f51967e05afd492 Mon Sep 17 00:00:00 2001
-From: Ray Jui <rjui@broadcom.com>
-Date: Mon, 27 Jul 2015 15:42:18 -0700
-Subject: [PATCH 1/4] PCI: iproc: enable arm64 support for iProc PCIe
-
-PCI: iproc: Add arm64 support
-
-Add arm64 support to the iProc PCIe driver.
-
-Note that on arm32, bus->sysdata points to the arm32-specific
-pci_sys_data struct, and pci_sys_data.private_data contains the
-iproc_pcie pointer. For arm64, there's nothing corresponding to
-pci_sys_data, so we keep the iproc_pcie pointer directly in
-bus->sysdata.
-
-In addition, arm64 does IRQ mapping in pcibios_add_device(), so it
-doesn't need pci_fixup_irqs() as arm32 does.
-
-Signed-off-by: Ray Jui <rjui@broadcom.com>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Reviewed-by: Scott Branden <sbranden@broadcom.com>
-Acked-by: Bjorn Helgaas <bhelgaas@google.com>
-Signed-off-by: Olof Johansson <olof@lixom.net>
----
- drivers/pci/host/pcie-iproc.c | 27 ++++++++++++++++++++-------
- drivers/pci/host/pcie-iproc.h |  4 +++-
- 2 files changed, 23 insertions(+), 8 deletions(-)
-
---- a/drivers/pci/host/pcie-iproc.c
-+++ b/drivers/pci/host/pcie-iproc.c
-@@ -58,9 +58,17 @@
- #define SYS_RC_INTX_EN               0x330
- #define SYS_RC_INTX_MASK             0xf
--static inline struct iproc_pcie *sys_to_pcie(struct pci_sys_data *sys)
-+static inline struct iproc_pcie *iproc_data(struct pci_bus *bus)
- {
--      return sys->private_data;
-+      struct iproc_pcie *pcie;
-+#ifdef CONFIG_ARM
-+      struct pci_sys_data *sys = bus->sysdata;
-+
-+      pcie = sys->private_data;
-+#else
-+      pcie = bus->sysdata;
-+#endif
-+      return pcie;
- }
- /**
-@@ -71,8 +79,7 @@ static void __iomem *iproc_pcie_map_cfg_
-                                           unsigned int devfn,
-                                           int where)
- {
--      struct pci_sys_data *sys = bus->sysdata;
--      struct iproc_pcie *pcie = sys_to_pcie(sys);
-+      struct iproc_pcie *pcie = iproc_data(bus);
-       unsigned slot = PCI_SLOT(devfn);
-       unsigned fn = PCI_FUNC(devfn);
-       unsigned busno = bus->number;
-@@ -186,6 +193,7 @@ static void iproc_pcie_enable(struct ipr
- int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
- {
-       int ret;
-+      void *sysdata;
-       struct pci_bus *bus;
-       if (!pcie || !pcie->dev || !pcie->base)
-@@ -205,10 +213,13 @@ int iproc_pcie_setup(struct iproc_pcie *
-       iproc_pcie_reset(pcie);
-+#ifdef CONFIG_ARM
-       pcie->sysdata.private_data = pcie;
--
--      bus = pci_create_root_bus(pcie->dev, 0, &iproc_pcie_ops,
--                                &pcie->sysdata, res);
-+      sysdata = &pcie->sysdata;
-+#else
-+      sysdata = pcie;
-+#endif
-+      bus = pci_create_root_bus(pcie->dev, 0, &iproc_pcie_ops, sysdata, res);
-       if (!bus) {
-               dev_err(pcie->dev, "unable to create PCI root bus\n");
-               ret = -ENOMEM;
-@@ -226,7 +237,9 @@ int iproc_pcie_setup(struct iproc_pcie *
-       pci_scan_child_bus(bus);
-       pci_assign_unassigned_bus_resources(bus);
-+#ifdef CONFIG_ARM
-       pci_fixup_irqs(pci_common_swizzle, pcie->map_irq);
-+#endif
-       pci_bus_add_devices(bus);
-       return 0;
---- a/drivers/pci/host/pcie-iproc.h
-+++ b/drivers/pci/host/pcie-iproc.h
-@@ -21,7 +21,7 @@
-  * @dev: pointer to device data structure
-  * @base: PCIe host controller I/O register base
-  * @resources: linked list of all PCI resources
-- * @sysdata: Per PCI controller data
-+ * @sysdata: Per PCI controller data (ARM-specific)
-  * @root_bus: pointer to root bus
-  * @phy: optional PHY device that controls the Serdes
-  * @irqs: interrupt IDs
-@@ -29,7 +29,9 @@
- struct iproc_pcie {
-       struct device *dev;
-       void __iomem *base;
-+#ifdef CONFIG_ARM
-       struct pci_sys_data sysdata;
-+#endif
-       struct pci_bus *root_bus;
-       struct phy *phy;
-       int irqs[IPROC_PCIE_MAX_NUM_IRQS];
diff --git a/target/linux/bcm53xx/patches-4.1/033-0002-PCI-iproc-Fix-ARM64-dependency-in-Kconfig.patch b/target/linux/bcm53xx/patches-4.1/033-0002-PCI-iproc-Fix-ARM64-dependency-in-Kconfig.patch
deleted file mode 100644 (file)
index 414a83f..0000000
+++ /dev/null
@@ -1,27 +0,0 @@
-From b00c4415fb231f276221c634a47ce7328df9aae5 Mon Sep 17 00:00:00 2001
-From: Ray Jui <rjui@broadcom.com>
-Date: Mon, 27 Jul 2015 15:42:19 -0700
-Subject: [PATCH 2/4] PCI: iproc: Fix ARM64 dependency in Kconfig
-
-Allow Broadcom iProc PCIe core driver to be compiled for ARM64
-
-Signed-off-by: Ray Jui <rjui@broadcom.com>
-Reviewed-by: Vikram Prakash <vikramp@broadcom.com>
-Reviewed-by: Scott Branden <sbranden@broadcom.com>
-Acked-by: Bjorn Helgaas <bhelgaas@google.com>
-Signed-off-by: Olof Johansson <olof@lixom.net>
----
- drivers/pci/host/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/pci/host/Kconfig
-+++ b/drivers/pci/host/Kconfig
-@@ -108,7 +108,7 @@ config PCI_VERSATILE
- config PCIE_IPROC
-       tristate "Broadcom iProc PCIe controller"
--      depends on OF && ARM
-+      depends on OF && (ARM || ARM64)
-       default n
-       help
-         This enables the iProc PCIe core controller support for Broadcom's
diff --git a/target/linux/bcm53xx/patches-4.1/034-PCI-iproc-Fix-BCMA-dependency-in-Kconfig.patch b/target/linux/bcm53xx/patches-4.1/034-PCI-iproc-Fix-BCMA-dependency-in-Kconfig.patch
deleted file mode 100644 (file)
index 23896d5..0000000
+++ /dev/null
@@ -1,28 +0,0 @@
-From 70d334ca71b0e35ef21493d86799cec83f452d94 Mon Sep 17 00:00:00 2001
-From: Ray Jui <rjui@broadcom.com>
-Date: Wed, 29 Jul 2015 10:12:53 -0700
-Subject: [PATCH] PCI: iproc: Fix BCMA dependency in Kconfig
-
-The current iProc BCMA front-end driver can only work on ARM32 based
-platforms; therefore its config option in Kconfig should be changed to
-reflect that. This fixes arm64 allmodconfig build failure when compiling
-the the iProc BCMA driver that contains struct pci_sys_data that is
-arm32 specific
-
-Signed-off-by: Ray Jui <rjui@broadcom.com>
-Signed-off-by: Olof Johansson <olof@lixom.net>
----
- drivers/pci/host/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/pci/host/Kconfig
-+++ b/drivers/pci/host/Kconfig
-@@ -127,7 +127,7 @@ config PCIE_IPROC_PLATFORM
- config PCIE_IPROC_BCMA
-       bool "Broadcom iProc PCIe BCMA bus driver"
--      depends on ARCH_BCM_IPROC || (ARM && COMPILE_TEST)
-+      depends on ARM && (ARCH_BCM_IPROC || COMPILE_TEST)
-       select PCIE_IPROC
-       select BCMA
-       select PCI_DOMAINS
diff --git a/target/linux/bcm53xx/patches-4.1/035-PCI-iproc-Allow-BCMA-bus-driver-to-be-built-as-modul.patch b/target/linux/bcm53xx/patches-4.1/035-PCI-iproc-Allow-BCMA-bus-driver-to-be-built-as-modul.patch
deleted file mode 100644 (file)
index 110ba24..0000000
+++ /dev/null
@@ -1,26 +0,0 @@
-From 05aa7d6a72c1fca809e4d8bfdc5fa202cb8bed37 Mon Sep 17 00:00:00 2001
-From: Hauke Mehrtens <hauke@hauke-m.de>
-Date: Sat, 25 Jul 2015 21:15:24 +0200
-Subject: [PATCH] PCI: iproc: Allow BCMA bus driver to be built as module
-
-Change CONFIG_PCIE_IPROC_BCMA to tristate to make it possible to build this
-driver as a module.
-
-Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Acked-by: Ray Jui <rjui@broadcom.com>
----
- drivers/pci/host/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/pci/host/Kconfig
-+++ b/drivers/pci/host/Kconfig
-@@ -126,7 +126,7 @@ config PCIE_IPROC_PLATFORM
-         through the generic platform bus interface
- config PCIE_IPROC_BCMA
--      bool "Broadcom iProc PCIe BCMA bus driver"
-+      tristate "Broadcom iProc PCIe BCMA bus driver"
-       depends on ARM && (ARCH_BCM_IPROC || COMPILE_TEST)
-       select PCIE_IPROC
-       select BCMA
diff --git a/target/linux/bcm53xx/patches-4.1/036-0001-PCI-iproc-Fix-code-comment-to-match-code.patch b/target/linux/bcm53xx/patches-4.1/036-0001-PCI-iproc-Fix-code-comment-to-match-code.patch
deleted file mode 100644 (file)
index edcfd55..0000000
+++ /dev/null
@@ -1,28 +0,0 @@
-From 5d92f41c48c5e3c6fa5be87e3d6fca57e2fbb127 Mon Sep 17 00:00:00 2001
-From: Ray Jui <rjui@broadcom.com>
-Date: Tue, 15 Sep 2015 17:39:15 -0700
-Subject: [PATCH 1/7] PCI: iproc: Fix code comment to match code
-
-Fix code comment in pcie-iproc.h so it matches the code.
-
-Signed-off-by: Ray Jui <rjui@broadcom.com>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
----
- drivers/pci/host/pcie-iproc.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/pci/host/pcie-iproc.h
-+++ b/drivers/pci/host/pcie-iproc.h
-@@ -20,11 +20,11 @@
-  * iProc PCIe device
-  * @dev: pointer to device data structure
-  * @base: PCIe host controller I/O register base
-- * @resources: linked list of all PCI resources
-  * @sysdata: Per PCI controller data (ARM-specific)
-  * @root_bus: pointer to root bus
-  * @phy: optional PHY device that controls the Serdes
-  * @irqs: interrupt IDs
-+ * @map_irq: function callback to map interrupts
-  */
- struct iproc_pcie {
-       struct device *dev;
diff --git a/target/linux/bcm53xx/patches-4.1/036-0002-PCI-iproc-Remove-unused-struct-iproc_pcie.irqs.patch b/target/linux/bcm53xx/patches-4.1/036-0002-PCI-iproc-Remove-unused-struct-iproc_pcie.irqs.patch
deleted file mode 100644 (file)
index b81ff6d..0000000
+++ /dev/null
@@ -1,33 +0,0 @@
-From 98aac697a83db6e1d004e5d61cf6c976a0b1c35a Mon Sep 17 00:00:00 2001
-From: Ray Jui <rjui@broadcom.com>
-Date: Tue, 15 Sep 2015 17:39:16 -0700
-Subject: [PATCH 2/7] PCI: iproc: Remove unused struct iproc_pcie.irqs[]
-
-Remove unused struct iproc_pcie member irqs[] and unused #define
-IPROC_PCIE_MAX_NUM_IRQS.
-
-Signed-off-by: Ray Jui <rjui@broadcom.com>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
----
- drivers/pci/host/pcie-iproc.h | 3 ---
- 1 file changed, 3 deletions(-)
-
---- a/drivers/pci/host/pcie-iproc.h
-+++ b/drivers/pci/host/pcie-iproc.h
-@@ -14,8 +14,6 @@
- #ifndef _PCIE_IPROC_H
- #define _PCIE_IPROC_H
--#define IPROC_PCIE_MAX_NUM_IRQS 6
--
- /**
-  * iProc PCIe device
-  * @dev: pointer to device data structure
-@@ -34,7 +32,6 @@ struct iproc_pcie {
- #endif
-       struct pci_bus *root_bus;
-       struct phy *phy;
--      int irqs[IPROC_PCIE_MAX_NUM_IRQS];
-       int (*map_irq)(const struct pci_dev *, u8, u8);
- };
diff --git a/target/linux/bcm53xx/patches-4.1/036-0003-PCI-iproc-Call-pci_fixup_irqs-for-ARM64-as-well-as-A.patch b/target/linux/bcm53xx/patches-4.1/036-0003-PCI-iproc-Call-pci_fixup_irqs-for-ARM64-as-well-as-A.patch
deleted file mode 100644 (file)
index 2b4b3ff..0000000
+++ /dev/null
@@ -1,31 +0,0 @@
-From bdb8a1844f3113ec08915d1e8e3fd5686fb2fb78 Mon Sep 17 00:00:00 2001
-From: Ray Jui <rjui@broadcom.com>
-Date: Tue, 15 Sep 2015 17:39:17 -0700
-Subject: [PATCH 3/7] PCI: iproc: Call pci_fixup_irqs() for ARM64 as well as
- ARM
-
-After 459a07721c11 ("PCI: Build setup-irq.o for arm64"), we build
-setup-irq.o for arm64, so we can use pci_fixup_irqs() on both arm and
-arm64.
-
-Remove the "#ifdef CONFIG_ARM" around the call to pci_fixup_irqs().
-
-[bhelgaas: changelog]
-Signed-off-by: Ray Jui <rjui@broadcom.com>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
----
- drivers/pci/host/pcie-iproc.c | 2 --
- 1 file changed, 2 deletions(-)
-
---- a/drivers/pci/host/pcie-iproc.c
-+++ b/drivers/pci/host/pcie-iproc.c
-@@ -237,9 +237,7 @@ int iproc_pcie_setup(struct iproc_pcie *
-       pci_scan_child_bus(bus);
-       pci_assign_unassigned_bus_resources(bus);
--#ifdef CONFIG_ARM
-       pci_fixup_irqs(pci_common_swizzle, pcie->map_irq);
--#endif
-       pci_bus_add_devices(bus);
-       return 0;
diff --git a/target/linux/bcm53xx/patches-4.1/036-0004-PCI-iproc-Fix-PCIe-reset-logic.patch b/target/linux/bcm53xx/patches-4.1/036-0004-PCI-iproc-Fix-PCIe-reset-logic.patch
deleted file mode 100644 (file)
index 4da305a..0000000
+++ /dev/null
@@ -1,62 +0,0 @@
-From 199ff14100095d52cd1b232cc0f3b12f348b5b07 Mon Sep 17 00:00:00 2001
-From: Ray Jui <rjui@broadcom.com>
-Date: Tue, 15 Sep 2015 17:39:18 -0700
-Subject: [PATCH 4/7] PCI: iproc: Fix PCIe reset logic
-
-The current reset logic does not always properly reset the device.  For
-example, in the case when the perst_b signal is already de-asserted in the
-bootloader, the current reset logic fails to trigger a proper assert ->
-de-assert reset sequence.
-
-Fix the issue by always triggering the proper reset sequence.
-
-Also explicitly select the desired reset source, i.e., perst_b, and reduce
-the wait time after the device comes out of reset from 250 ms to 100 ms,
-based on recommendation from the ASIC team.
-
-Tested-by: Vladimir Dreizin <vdreizin@broadcom.com>
-Tested-by: Darren Edamura <dedamura@broadcom.com>
-Signed-off-by: Ray Jui <rjui@broadcom.com>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Reviewed-by: Vladimir Dreizin <vdreizin@broadcom.com>
-Reviewed-by: Trac Hoang <trhoang@broadcom.com>
-Reviewed-by: Scott Branden <sbranden@broadcom.com>
----
- drivers/pci/host/pcie-iproc.c | 15 ++++++++++-----
- 1 file changed, 10 insertions(+), 5 deletions(-)
-
---- a/drivers/pci/host/pcie-iproc.c
-+++ b/drivers/pci/host/pcie-iproc.c
-@@ -31,6 +31,8 @@
- #include "pcie-iproc.h"
- #define CLK_CONTROL_OFFSET           0x000
-+#define EP_PERST_SOURCE_SELECT_SHIFT 2
-+#define EP_PERST_SOURCE_SELECT       BIT(EP_PERST_SOURCE_SELECT_SHIFT)
- #define EP_MODE_SURVIVE_PERST_SHIFT  1
- #define EP_MODE_SURVIVE_PERST        BIT(EP_MODE_SURVIVE_PERST_SHIFT)
- #define RC_PCIE_RST_OUTPUT_SHIFT     0
-@@ -119,15 +121,18 @@ static void iproc_pcie_reset(struct ipro
-       u32 val;
-       /*
--       * Configure the PCIe controller as root complex and send a downstream
--       * reset
-+       * Select perst_b signal as reset source. Put the device into reset,
-+       * and then bring it out of reset
-        */
--      val = EP_MODE_SURVIVE_PERST | RC_PCIE_RST_OUTPUT;
-+      val = readl(pcie->base + CLK_CONTROL_OFFSET);
-+      val &= ~EP_PERST_SOURCE_SELECT & ~EP_MODE_SURVIVE_PERST &
-+              ~RC_PCIE_RST_OUTPUT;
-       writel(val, pcie->base + CLK_CONTROL_OFFSET);
-       udelay(250);
--      val &= ~EP_MODE_SURVIVE_PERST;
-+
-+      val |= RC_PCIE_RST_OUTPUT;
-       writel(val, pcie->base + CLK_CONTROL_OFFSET);
--      msleep(250);
-+      msleep(100);
- }
- static int iproc_pcie_check_link(struct iproc_pcie *pcie, struct pci_bus *bus)
diff --git a/target/linux/bcm53xx/patches-4.1/036-0005-PCI-iproc-Improve-link-detection-logic.patch b/target/linux/bcm53xx/patches-4.1/036-0005-PCI-iproc-Improve-link-detection-logic.patch
deleted file mode 100644 (file)
index 4d71230..0000000
+++ /dev/null
@@ -1,84 +0,0 @@
-From aaf22ab4e916afa68a2e1aed4e913b76cbd58276 Mon Sep 17 00:00:00 2001
-From: Ray Jui <rjui@broadcom.com>
-Date: Tue, 15 Sep 2015 17:39:19 -0700
-Subject: [PATCH 5/7] PCI: iproc: Improve link detection logic
-
-Improve the link detection logic by explicitly querying the link status
-register to ensure link is active.
-
-Also force class to PCI_CLASS_BRIDGE_PCI (0x0604) through the host
-configuration space register.
-
-Signed-off-by: Ray Jui <rjui@broadcom.com>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Reviewed-by: Anup Patel <anup.patel@broadcom.com>
-Reviewed-by: Scott Branden <sbranden@broadcom.com>
----
- drivers/pci/host/pcie-iproc.c | 29 +++++++++++++++++++++++------
- 1 file changed, 23 insertions(+), 6 deletions(-)
-
---- a/drivers/pci/host/pcie-iproc.c
-+++ b/drivers/pci/host/pcie-iproc.c
-@@ -60,6 +60,12 @@
- #define SYS_RC_INTX_EN               0x330
- #define SYS_RC_INTX_MASK             0xf
-+#define PCIE_LINK_STATUS_OFFSET      0xf0c
-+#define PCIE_PHYLINKUP_SHIFT         3
-+#define PCIE_PHYLINKUP               BIT(PCIE_PHYLINKUP_SHIFT)
-+#define PCIE_DL_ACTIVE_SHIFT         2
-+#define PCIE_DL_ACTIVE               BIT(PCIE_DL_ACTIVE_SHIFT)
-+
- static inline struct iproc_pcie *iproc_data(struct pci_bus *bus)
- {
-       struct iproc_pcie *pcie;
-@@ -138,9 +144,15 @@ static void iproc_pcie_reset(struct ipro
- static int iproc_pcie_check_link(struct iproc_pcie *pcie, struct pci_bus *bus)
- {
-       u8 hdr_type;
--      u32 link_ctrl;
-+      u32 link_ctrl, class, val;
-       u16 pos, link_status;
--      int link_is_active = 0;
-+      bool link_is_active = false;
-+
-+      val = readl(pcie->base + PCIE_LINK_STATUS_OFFSET);
-+      if (!(val & PCIE_PHYLINKUP) || !(val & PCIE_DL_ACTIVE)) {
-+              dev_err(pcie->dev, "PHY or data link is INACTIVE!\n");
-+              return -ENODEV;
-+      }
-       /* make sure we are not in EP mode */
-       pci_bus_read_config_byte(bus, 0, PCI_HEADER_TYPE, &hdr_type);
-@@ -150,14 +162,19 @@ static int iproc_pcie_check_link(struct
-       }
-       /* force class to PCI_CLASS_BRIDGE_PCI (0x0604) */
--      pci_bus_write_config_word(bus, 0, PCI_CLASS_DEVICE,
--                                PCI_CLASS_BRIDGE_PCI);
-+#define PCI_BRIDGE_CTRL_REG_OFFSET 0x43c
-+#define PCI_CLASS_BRIDGE_MASK      0xffff00
-+#define PCI_CLASS_BRIDGE_SHIFT     8
-+      pci_bus_read_config_dword(bus, 0, PCI_BRIDGE_CTRL_REG_OFFSET, &class);
-+      class &= ~PCI_CLASS_BRIDGE_MASK;
-+      class |= (PCI_CLASS_BRIDGE_PCI << PCI_CLASS_BRIDGE_SHIFT);
-+      pci_bus_write_config_dword(bus, 0, PCI_BRIDGE_CTRL_REG_OFFSET, class);
-       /* check link status to see if link is active */
-       pos = pci_bus_find_capability(bus, 0, PCI_CAP_ID_EXP);
-       pci_bus_read_config_word(bus, 0, pos + PCI_EXP_LNKSTA, &link_status);
-       if (link_status & PCI_EXP_LNKSTA_NLW)
--              link_is_active = 1;
-+              link_is_active = true;
-       if (!link_is_active) {
-               /* try GEN 1 link speed */
-@@ -181,7 +198,7 @@ static int iproc_pcie_check_link(struct
-                       pci_bus_read_config_word(bus, 0, pos + PCI_EXP_LNKSTA,
-                                                &link_status);
-                       if (link_status & PCI_EXP_LNKSTA_NLW)
--                              link_is_active = 1;
-+                              link_is_active = true;
-               }
-       }
diff --git a/target/linux/bcm53xx/patches-4.1/036-0006-PCI-iproc-Update-PCIe-device-tree-bindings.patch b/target/linux/bcm53xx/patches-4.1/036-0006-PCI-iproc-Update-PCIe-device-tree-bindings.patch
deleted file mode 100644 (file)
index 01db86c..0000000
+++ /dev/null
@@ -1,50 +0,0 @@
-From 8d0afa1a93be2da954c85392bbc7b2264c9d241c Mon Sep 17 00:00:00 2001
-From: Ray Jui <rjui@broadcom.com>
-Date: Tue, 15 Sep 2015 17:39:20 -0700
-Subject: [PATCH 6/7] PCI: iproc: Update PCIe device tree bindings
-
-Update the device tree bindings with added support for outbound mapping
-configurations.
-
-Signed-off-by: Ray Jui <rjui@broadcom.com>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
----
- .../devicetree/bindings/pci/brcm,iproc-pcie.txt      | 20 ++++++++++++++++++++
- 1 file changed, 20 insertions(+)
-
---- a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
-+++ b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
-@@ -17,6 +17,21 @@ Optional properties:
- - phys: phandle of the PCIe PHY device
- - phy-names: must be "pcie-phy"
-+- brcm,pcie-ob: Some iProc SoCs do not have the outbound address mapping done
-+by the ASIC after power on reset. In this case, SW needs to configure it
-+
-+If the brcm,pcie-ob property is present, the following properties become
-+effective:
-+
-+Required:
-+- brcm,pcie-ob-axi-offset: The offset from the AXI address to the internal
-+address used by the iProc PCIe core (not the PCIe address)
-+- brcm,pcie-ob-window-size: The outbound address mapping window size (in MB)
-+
-+Optional:
-+- brcm,pcie-ob-oarr-size: Some iProc SoCs need the OARR size bit to be set to
-+increase the outbound window size
-+
- Example:
-       pcie0: pcie@18012000 {
-               compatible = "brcm,iproc-pcie";
-@@ -38,6 +53,11 @@ Example:
-               phys = <&phy 0 5>;
-               phy-names = "pcie-phy";
-+
-+              brcm,pcie-ob;
-+              brcm,pcie-ob-oarr-size;
-+              brcm,pcie-ob-axi-offset = <0x00000000>;
-+              brcm,pcie-ob-window-size = <256>;
-       };
-       pcie1: pcie@18013000 {
diff --git a/target/linux/bcm53xx/patches-4.1/036-0007-PCI-iproc-Add-outbound-mapping-support.patch b/target/linux/bcm53xx/patches-4.1/036-0007-PCI-iproc-Add-outbound-mapping-support.patch
deleted file mode 100644 (file)
index e335f45..0000000
+++ /dev/null
@@ -1,236 +0,0 @@
-From e99a187b5c5f60fe55ca586f82ac1a3557fb166a Mon Sep 17 00:00:00 2001
-From: Ray Jui <rjui@broadcom.com>
-Date: Fri, 16 Oct 2015 08:18:24 -0500
-Subject: [PATCH 7/7] PCI: iproc: Add outbound mapping support
-
-Certain SoCs require the PCIe outbound mapping to be configured in
-software.  Add support for those chips.
-
-[jonmason: Use %pap format when printing size_t to avoid warnings in 32-bit
-build.]
-[arnd: Use div64_u64() instead of "%" to avoid __aeabi_uldivmod link error
-in 32-bit build.]
-Signed-off-by: Ray Jui <rjui@broadcom.com>
-Signed-off-by: Jon Mason <jonmason@broadcom.com>
-Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
----
- drivers/pci/host/pcie-iproc-platform.c |  27 ++++++++
- drivers/pci/host/pcie-iproc.c          | 115 +++++++++++++++++++++++++++++++++
- drivers/pci/host/pcie-iproc.h          |  17 +++++
- 3 files changed, 159 insertions(+)
-
---- a/drivers/pci/host/pcie-iproc-platform.c
-+++ b/drivers/pci/host/pcie-iproc-platform.c
-@@ -54,6 +54,33 @@ static int iproc_pcie_pltfm_probe(struct
-               return -ENOMEM;
-       }
-+      if (of_property_read_bool(np, "brcm,pcie-ob")) {
-+              u32 val;
-+
-+              ret = of_property_read_u32(np, "brcm,pcie-ob-axi-offset",
-+                                         &val);
-+              if (ret) {
-+                      dev_err(pcie->dev,
-+                              "missing brcm,pcie-ob-axi-offset property\n");
-+                      return ret;
-+              }
-+              pcie->ob.axi_offset = val;
-+
-+              ret = of_property_read_u32(np, "brcm,pcie-ob-window-size",
-+                                         &val);
-+              if (ret) {
-+                      dev_err(pcie->dev,
-+                              "missing brcm,pcie-ob-window-size property\n");
-+                      return ret;
-+              }
-+              pcie->ob.window_size = (resource_size_t)val * SZ_1M;
-+
-+              if (of_property_read_bool(np, "brcm,pcie-ob-oarr-size"))
-+                      pcie->ob.set_oarr_size = true;
-+
-+              pcie->need_ob_cfg = true;
-+      }
-+
-       /* PHY use is optional */
-       pcie->phy = devm_phy_get(&pdev->dev, "pcie-phy");
-       if (IS_ERR(pcie->phy)) {
---- a/drivers/pci/host/pcie-iproc.c
-+++ b/drivers/pci/host/pcie-iproc.c
-@@ -66,6 +66,18 @@
- #define PCIE_DL_ACTIVE_SHIFT         2
- #define PCIE_DL_ACTIVE               BIT(PCIE_DL_ACTIVE_SHIFT)
-+#define OARR_VALID_SHIFT             0
-+#define OARR_VALID                   BIT(OARR_VALID_SHIFT)
-+#define OARR_SIZE_CFG_SHIFT          1
-+#define OARR_SIZE_CFG                BIT(OARR_SIZE_CFG_SHIFT)
-+
-+#define OARR_LO(window)              (0xd20 + (window) * 8)
-+#define OARR_HI(window)              (0xd24 + (window) * 8)
-+#define OMAP_LO(window)              (0xd40 + (window) * 8)
-+#define OMAP_HI(window)              (0xd44 + (window) * 8)
-+
-+#define MAX_NUM_OB_WINDOWS           2
-+
- static inline struct iproc_pcie *iproc_data(struct pci_bus *bus)
- {
-       struct iproc_pcie *pcie;
-@@ -212,6 +224,101 @@ static void iproc_pcie_enable(struct ipr
-       writel(SYS_RC_INTX_MASK, pcie->base + SYS_RC_INTX_EN);
- }
-+/**
-+ * Some iProc SoCs require the SW to configure the outbound address mapping
-+ *
-+ * Outbound address translation:
-+ *
-+ * iproc_pcie_address = axi_address - axi_offset
-+ * OARR = iproc_pcie_address
-+ * OMAP = pci_addr
-+ *
-+ * axi_addr -> iproc_pcie_address -> OARR -> OMAP -> pci_address
-+ */
-+static int iproc_pcie_setup_ob(struct iproc_pcie *pcie, u64 axi_addr,
-+                             u64 pci_addr, resource_size_t size)
-+{
-+      struct iproc_pcie_ob *ob = &pcie->ob;
-+      unsigned i;
-+      u64 max_size = (u64)ob->window_size * MAX_NUM_OB_WINDOWS;
-+      u64 remainder;
-+
-+      if (size > max_size) {
-+              dev_err(pcie->dev,
-+                      "res size 0x%pap exceeds max supported size 0x%llx\n",
-+                      &size, max_size);
-+              return -EINVAL;
-+      }
-+
-+      div64_u64_rem(size, ob->window_size, &remainder);
-+      if (remainder) {
-+              dev_err(pcie->dev,
-+                      "res size %pap needs to be multiple of window size %pap\n",
-+                      &size, &ob->window_size);
-+              return -EINVAL;
-+      }
-+
-+      if (axi_addr < ob->axi_offset) {
-+              dev_err(pcie->dev,
-+                      "axi address %pap less than offset %pap\n",
-+                      &axi_addr, &ob->axi_offset);
-+              return -EINVAL;
-+      }
-+
-+      /*
-+       * Translate the AXI address to the internal address used by the iProc
-+       * PCIe core before programming the OARR
-+       */
-+      axi_addr -= ob->axi_offset;
-+
-+      for (i = 0; i < MAX_NUM_OB_WINDOWS; i++) {
-+              writel(lower_32_bits(axi_addr) | OARR_VALID |
-+                     (ob->set_oarr_size ? 1 : 0), pcie->base + OARR_LO(i));
-+              writel(upper_32_bits(axi_addr), pcie->base + OARR_HI(i));
-+              writel(lower_32_bits(pci_addr), pcie->base + OMAP_LO(i));
-+              writel(upper_32_bits(pci_addr), pcie->base + OMAP_HI(i));
-+
-+              size -= ob->window_size;
-+              if (size == 0)
-+                      break;
-+
-+              axi_addr += ob->window_size;
-+              pci_addr += ob->window_size;
-+      }
-+
-+      return 0;
-+}
-+
-+static int iproc_pcie_map_ranges(struct iproc_pcie *pcie,
-+                               struct list_head *resources)
-+{
-+      struct resource_entry *window;
-+      int ret;
-+
-+      resource_list_for_each_entry(window, resources) {
-+              struct resource *res = window->res;
-+              u64 res_type = resource_type(res);
-+
-+              switch (res_type) {
-+              case IORESOURCE_IO:
-+              case IORESOURCE_BUS:
-+                      break;
-+              case IORESOURCE_MEM:
-+                      ret = iproc_pcie_setup_ob(pcie, res->start,
-+                                                res->start - window->offset,
-+                                                resource_size(res));
-+                      if (ret)
-+                              return ret;
-+                      break;
-+              default:
-+                      dev_err(pcie->dev, "invalid resource %pR\n", res);
-+                      return -EINVAL;
-+              }
-+      }
-+
-+      return 0;
-+}
-+
- int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
- {
-       int ret;
-@@ -235,6 +342,14 @@ int iproc_pcie_setup(struct iproc_pcie *
-       iproc_pcie_reset(pcie);
-+      if (pcie->need_ob_cfg) {
-+              ret = iproc_pcie_map_ranges(pcie, res);
-+              if (ret) {
-+                      dev_err(pcie->dev, "map failed\n");
-+                      goto err_power_off_phy;
-+              }
-+      }
-+
- #ifdef CONFIG_ARM
-       pcie->sysdata.private_data = pcie;
-       sysdata = &pcie->sysdata;
---- a/drivers/pci/host/pcie-iproc.h
-+++ b/drivers/pci/host/pcie-iproc.h
-@@ -15,6 +15,19 @@
- #define _PCIE_IPROC_H
- /**
-+ * iProc PCIe outbound mapping
-+ * @set_oarr_size: indicates the OARR size bit needs to be set
-+ * @axi_offset: offset from the AXI address to the internal address used by
-+ * the iProc PCIe core
-+ * @window_size: outbound window size
-+ */
-+struct iproc_pcie_ob {
-+      bool set_oarr_size;
-+      resource_size_t axi_offset;
-+      resource_size_t window_size;
-+};
-+
-+/**
-  * iProc PCIe device
-  * @dev: pointer to device data structure
-  * @base: PCIe host controller I/O register base
-@@ -23,6 +36,8 @@
-  * @phy: optional PHY device that controls the Serdes
-  * @irqs: interrupt IDs
-  * @map_irq: function callback to map interrupts
-+ * @need_ob_cfg: indidates SW needs to configure the outbound mapping window
-+ * @ob: outbound mapping parameters
-  */
- struct iproc_pcie {
-       struct device *dev;
-@@ -33,6 +48,8 @@ struct iproc_pcie {
-       struct pci_bus *root_bus;
-       struct phy *phy;
-       int (*map_irq)(const struct pci_dev *, u8, u8);
-+      bool need_ob_cfg;
-+      struct iproc_pcie_ob ob;
- };
- int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res);
diff --git a/target/linux/bcm53xx/patches-4.1/037-PCI-iproc-Fix-header-comment-Corporation-misspelling.patch b/target/linux/bcm53xx/patches-4.1/037-PCI-iproc-Fix-header-comment-Corporation-misspelling.patch
deleted file mode 100644 (file)
index ed581dd..0000000
+++ /dev/null
@@ -1,24 +0,0 @@
-From be908d21b2e9c2cab1ef568dfca4f9777611b3dd Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <f.fainelli@gmail.com>
-Date: Fri, 16 Oct 2015 12:04:04 -0700
-Subject: [PATCH] PCI: iproc: Fix header comment "Corporation" misspelling
-
-Fix an obvious "Broadcom Corporation" typo in a header comment.
-
-Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Acked-by: Ray Jui <rjui@broadcom.com>
----
- drivers/pci/host/pcie-iproc.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/pci/host/pcie-iproc.c
-+++ b/drivers/pci/host/pcie-iproc.c
-@@ -1,6 +1,6 @@
- /*
-  * Copyright (C) 2014 Hauke Mehrtens <hauke@hauke-m.de>
-- * Copyright (C) 2015 Broadcom Corporatcommon ion
-+ * Copyright (C) 2015 Broadcom Corporation
-  *
-  * This program is free software; you can redistribute it and/or
-  * modify it under the terms of the GNU General Public License as
diff --git a/target/linux/bcm53xx/patches-4.1/038-PCI-iproc-Hide-CONFIG_PCIE_IPROC.patch b/target/linux/bcm53xx/patches-4.1/038-PCI-iproc-Hide-CONFIG_PCIE_IPROC.patch
deleted file mode 100644 (file)
index 93e3300..0000000
+++ /dev/null
@@ -1,42 +0,0 @@
-From c1b98e41b356a1807d7083d958790da2027c0d9d Mon Sep 17 00:00:00 2001
-From: Arnd Bergmann <arnd@arndb.de>
-Date: Tue, 24 Nov 2015 15:28:48 -0600
-Subject: [PATCH] PCI: iproc: Hide CONFIG_PCIE_IPROC
-
-PCIE_IPROC_BCMA does not require CONFIG_OF in Kconfig, but
-CONFIG_PCIE_IPROC does, so we can get a warning when building for an ARM
-platform without DT support:
-
-  warning: (PCIE_IPROC_PLATFORM && PCIE_IPROC_BCMA) selects PCIE_IPROC which has unmet direct dependencies (PCI && OF && (ARM || ARM64))
-
-It turns out that CONFIG_PCIE_IPROC never needs to be enabled by a user
-anyway, we can simply rely on it being selected implictly through either
-PCIE_IPROC_PLATFORM or PCIE_IPROC_BCMA.
-
-Fixes: 4785ffbdc9b5 ("PCI: iproc: Add BCMA PCIe driver")
-Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
----
- drivers/pci/host/Kconfig | 8 +++-----
- 1 file changed, 3 insertions(+), 5 deletions(-)
-
---- a/drivers/pci/host/Kconfig
-+++ b/drivers/pci/host/Kconfig
-@@ -107,13 +107,11 @@ config PCI_VERSATILE
-       depends on ARCH_VERSATILE
- config PCIE_IPROC
--      tristate "Broadcom iProc PCIe controller"
--      depends on OF && (ARM || ARM64)
--      default n
-+      tristate
-       help
-         This enables the iProc PCIe core controller support for Broadcom's
--        iProc family of SoCs. An appropriate bus interface driver also needs
--        to be enabled
-+        iProc family of SoCs. An appropriate bus interface driver needs
-+        to be enabled to select this.
- config PCIE_IPROC_PLATFORM
-       tristate "Broadcom iProc PCIe platform bus driver"
diff --git a/target/linux/bcm53xx/patches-4.1/039-PCI-iproc-Do-not-use-0x-in-front-of-pap.patch b/target/linux/bcm53xx/patches-4.1/039-PCI-iproc-Do-not-use-0x-in-front-of-pap.patch
deleted file mode 100644 (file)
index 5736af8..0000000
+++ /dev/null
@@ -1,27 +0,0 @@
-From 57303e92f48a0e307fd86977ec9be5aa6a7ea681 Mon Sep 17 00:00:00 2001
-From: "Dmitry V. Krivenok" <krivenok.dmitry@gmail.com>
-Date: Mon, 30 Nov 2015 23:45:49 +0300
-Subject: [PATCH] PCI: iproc: Do not use 0x in front of %pap
-
-The "%pap" format adds a "0x" prefix, so using "0x%pap" results in output
-of "0x0x...".  Drop the "0x" prefix in the format string.
-
-[bhelgaas: changelog]
-Signed-off-by: Dmitry V. Krivenok <krivenok.dmitry@gmail.com>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Acked-by: Ray Jui <rjui@broadcom.com>
----
- drivers/pci/host/pcie-iproc.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/pci/host/pcie-iproc.c
-+++ b/drivers/pci/host/pcie-iproc.c
-@@ -245,7 +245,7 @@ static int iproc_pcie_setup_ob(struct ip
-       if (size > max_size) {
-               dev_err(pcie->dev,
--                      "res size 0x%pap exceeds max supported size 0x%llx\n",
-+                      "res size %pap exceeds max supported size 0x%llx\n",
-                       &size, max_size);
-               return -EINVAL;
-       }
diff --git a/target/linux/bcm53xx/patches-4.1/040-0001-PCI-iproc-Update-iProc-PCIe-device-tree-binding.patch b/target/linux/bcm53xx/patches-4.1/040-0001-PCI-iproc-Update-iProc-PCIe-device-tree-binding.patch
deleted file mode 100644 (file)
index b5e5675..0000000
+++ /dev/null
@@ -1,30 +0,0 @@
-From e8b8318de645c04f8600cb5af6f6773a1878ee9d Mon Sep 17 00:00:00 2001
-From: Ray Jui <rjui@broadcom.com>
-Date: Fri, 4 Dec 2015 09:34:58 -0800
-Subject: [PATCH 1/5] PCI: iproc: Update iProc PCIe device tree binding
-
-Add a new compatible string "brcm,iproc-pcie-paxc", for PAXC-based iProc
-PCIe root complex.  A PAXC-based PCIe root complex is connected to emulated
-endpoint devices internal to the ASIC.
-
-Signed-off-by: Ray Jui <rjui@broadcom.com>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Reviewed-by: Scott Branden <sbranden@broadcom.com>
----
- Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
---- a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
-+++ b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
-@@ -1,7 +1,10 @@
- * Broadcom iProc PCIe controller with the platform bus interface
- Required properties:
--- compatible: Must be "brcm,iproc-pcie"
-+- compatible: Must be "brcm,iproc-pcie" for PAXB, or "brcm,iproc-pcie-paxc"
-+  for PAXC.  PAXB-based root complex is used for external endpoint devices.
-+  PAXC-based root complex is connected to emulated endpoint devices
-+  internal to the ASIC
- - reg: base address and length of the PCIe controller I/O register space
- - #interrupt-cells: set to <1>
- - interrupt-map-mask and interrupt-map, standard PCI properties to define the
diff --git a/target/linux/bcm53xx/patches-4.1/040-0002-PCI-iproc-Add-PAXC-interface-support.patch b/target/linux/bcm53xx/patches-4.1/040-0002-PCI-iproc-Add-PAXC-interface-support.patch
deleted file mode 100644 (file)
index b011328..0000000
+++ /dev/null
@@ -1,429 +0,0 @@
-From 943ebae781f519ecfecbfa1b997f15f59116e41d Mon Sep 17 00:00:00 2001
-From: Ray Jui <rjui@broadcom.com>
-Date: Fri, 4 Dec 2015 09:34:59 -0800
-Subject: [PATCH 2/5] PCI: iproc: Add PAXC interface support
-
-Traditionally, all iProc PCIe root complexes use PAXB-based wrapper, with
-an integrated on-chip Serdes to support external endpoint devices.  On
-newer iProc platforms, a PAXC-based wrapper is introduced, for connection
-with internally emulated PCIe endpoint devices in the ASIC.
-
-Add support for PAXC-based iProc PCIe root complex in the iProc PCIe core
-driver.  This change factors out common logic between PAXB and PAXC, and
-uses tables to store register offsets that are different between PAXB and
-PAXC.  This allows the driver to be scaled to support subsequent PAXC
-revisions in the future.
-
-Signed-off-by: Ray Jui <rjui@broadcom.com>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Reviewed-by: Scott Branden <sbranden@broadcom.com>
----
- drivers/pci/host/pcie-iproc-platform.c |  24 +++-
- drivers/pci/host/pcie-iproc.c          | 202 +++++++++++++++++++++++++++------
- drivers/pci/host/pcie-iproc.h          |  19 ++++
- 3 files changed, 205 insertions(+), 40 deletions(-)
-
---- a/drivers/pci/host/pcie-iproc-platform.c
-+++ b/drivers/pci/host/pcie-iproc-platform.c
-@@ -26,8 +26,21 @@
- #include "pcie-iproc.h"
-+static const struct of_device_id iproc_pcie_of_match_table[] = {
-+      {
-+              .compatible = "brcm,iproc-pcie",
-+              .data = (int *)IPROC_PCIE_PAXB,
-+      }, {
-+              .compatible = "brcm,iproc-pcie-paxc",
-+              .data = (int *)IPROC_PCIE_PAXC,
-+      },
-+      { /* sentinel */ }
-+};
-+MODULE_DEVICE_TABLE(of, iproc_pcie_of_match_table);
-+
- static int iproc_pcie_pltfm_probe(struct platform_device *pdev)
- {
-+      const struct of_device_id *of_id;
-       struct iproc_pcie *pcie;
-       struct device_node *np = pdev->dev.of_node;
-       struct resource reg;
-@@ -35,11 +48,16 @@ static int iproc_pcie_pltfm_probe(struct
-       LIST_HEAD(res);
-       int ret;
-+      of_id = of_match_device(iproc_pcie_of_match_table, &pdev->dev);
-+      if (!of_id)
-+              return -EINVAL;
-+
-       pcie = devm_kzalloc(&pdev->dev, sizeof(struct iproc_pcie), GFP_KERNEL);
-       if (!pcie)
-               return -ENOMEM;
-       pcie->dev = &pdev->dev;
-+      pcie->type = (enum iproc_pcie_type)of_id->data;
-       platform_set_drvdata(pdev, pcie);
-       ret = of_address_to_resource(np, 0, &reg);
-@@ -114,12 +132,6 @@ static int iproc_pcie_pltfm_remove(struc
-       return iproc_pcie_remove(pcie);
- }
--static const struct of_device_id iproc_pcie_of_match_table[] = {
--      { .compatible = "brcm,iproc-pcie", },
--      { /* sentinel */ }
--};
--MODULE_DEVICE_TABLE(of, iproc_pcie_of_match_table);
--
- static struct platform_driver iproc_pcie_pltfm_driver = {
-       .driver = {
-               .name = "iproc-pcie",
---- a/drivers/pci/host/pcie-iproc.c
-+++ b/drivers/pci/host/pcie-iproc.c
-@@ -30,20 +30,16 @@
- #include "pcie-iproc.h"
--#define CLK_CONTROL_OFFSET           0x000
- #define EP_PERST_SOURCE_SELECT_SHIFT 2
- #define EP_PERST_SOURCE_SELECT       BIT(EP_PERST_SOURCE_SELECT_SHIFT)
- #define EP_MODE_SURVIVE_PERST_SHIFT  1
- #define EP_MODE_SURVIVE_PERST        BIT(EP_MODE_SURVIVE_PERST_SHIFT)
- #define RC_PCIE_RST_OUTPUT_SHIFT     0
- #define RC_PCIE_RST_OUTPUT           BIT(RC_PCIE_RST_OUTPUT_SHIFT)
-+#define PAXC_RESET_MASK              0x7f
--#define CFG_IND_ADDR_OFFSET          0x120
- #define CFG_IND_ADDR_MASK            0x00001ffc
--#define CFG_IND_DATA_OFFSET          0x124
--
--#define CFG_ADDR_OFFSET              0x1f8
- #define CFG_ADDR_BUS_NUM_SHIFT       20
- #define CFG_ADDR_BUS_NUM_MASK        0x0ff00000
- #define CFG_ADDR_DEV_NUM_SHIFT       15
-@@ -55,12 +51,8 @@
- #define CFG_ADDR_CFG_TYPE_SHIFT      0
- #define CFG_ADDR_CFG_TYPE_MASK       0x00000003
--#define CFG_DATA_OFFSET              0x1fc
--
--#define SYS_RC_INTX_EN               0x330
- #define SYS_RC_INTX_MASK             0xf
--#define PCIE_LINK_STATUS_OFFSET      0xf0c
- #define PCIE_PHYLINKUP_SHIFT         3
- #define PCIE_PHYLINKUP               BIT(PCIE_PHYLINKUP_SHIFT)
- #define PCIE_DL_ACTIVE_SHIFT         2
-@@ -71,12 +63,54 @@
- #define OARR_SIZE_CFG_SHIFT          1
- #define OARR_SIZE_CFG                BIT(OARR_SIZE_CFG_SHIFT)
--#define OARR_LO(window)              (0xd20 + (window) * 8)
--#define OARR_HI(window)              (0xd24 + (window) * 8)
--#define OMAP_LO(window)              (0xd40 + (window) * 8)
--#define OMAP_HI(window)              (0xd44 + (window) * 8)
--
- #define MAX_NUM_OB_WINDOWS           2
-+#define MAX_NUM_PAXC_PF              4
-+
-+#define IPROC_PCIE_REG_INVALID 0xffff
-+
-+enum iproc_pcie_reg {
-+      IPROC_PCIE_CLK_CTRL = 0,
-+      IPROC_PCIE_CFG_IND_ADDR,
-+      IPROC_PCIE_CFG_IND_DATA,
-+      IPROC_PCIE_CFG_ADDR,
-+      IPROC_PCIE_CFG_DATA,
-+      IPROC_PCIE_INTX_EN,
-+      IPROC_PCIE_OARR_LO,
-+      IPROC_PCIE_OARR_HI,
-+      IPROC_PCIE_OMAP_LO,
-+      IPROC_PCIE_OMAP_HI,
-+      IPROC_PCIE_LINK_STATUS,
-+};
-+
-+/* iProc PCIe PAXB registers */
-+static const u16 iproc_pcie_reg_paxb[] = {
-+      [IPROC_PCIE_CLK_CTRL]     = 0x000,
-+      [IPROC_PCIE_CFG_IND_ADDR] = 0x120,
-+      [IPROC_PCIE_CFG_IND_DATA] = 0x124,
-+      [IPROC_PCIE_CFG_ADDR]     = 0x1f8,
-+      [IPROC_PCIE_CFG_DATA]     = 0x1fc,
-+      [IPROC_PCIE_INTX_EN]      = 0x330,
-+      [IPROC_PCIE_OARR_LO]      = 0xd20,
-+      [IPROC_PCIE_OARR_HI]      = 0xd24,
-+      [IPROC_PCIE_OMAP_LO]      = 0xd40,
-+      [IPROC_PCIE_OMAP_HI]      = 0xd44,
-+      [IPROC_PCIE_LINK_STATUS]  = 0xf0c,
-+};
-+
-+/* iProc PCIe PAXC v1 registers */
-+static const u16 iproc_pcie_reg_paxc[] = {
-+      [IPROC_PCIE_CLK_CTRL]     = 0x000,
-+      [IPROC_PCIE_CFG_IND_ADDR] = 0x1f0,
-+      [IPROC_PCIE_CFG_IND_DATA] = 0x1f4,
-+      [IPROC_PCIE_CFG_ADDR]     = 0x1f8,
-+      [IPROC_PCIE_CFG_DATA]     = 0x1fc,
-+      [IPROC_PCIE_INTX_EN]      = IPROC_PCIE_REG_INVALID,
-+      [IPROC_PCIE_OARR_LO]      = IPROC_PCIE_REG_INVALID,
-+      [IPROC_PCIE_OARR_HI]      = IPROC_PCIE_REG_INVALID,
-+      [IPROC_PCIE_OMAP_LO]      = IPROC_PCIE_REG_INVALID,
-+      [IPROC_PCIE_OMAP_HI]      = IPROC_PCIE_REG_INVALID,
-+      [IPROC_PCIE_LINK_STATUS]  = IPROC_PCIE_REG_INVALID,
-+};
- static inline struct iproc_pcie *iproc_data(struct pci_bus *bus)
- {
-@@ -91,6 +125,65 @@ static inline struct iproc_pcie *iproc_d
-       return pcie;
- }
-+static inline bool iproc_pcie_reg_is_invalid(u16 reg_offset)
-+{
-+      return !!(reg_offset == IPROC_PCIE_REG_INVALID);
-+}
-+
-+static inline u16 iproc_pcie_reg_offset(struct iproc_pcie *pcie,
-+                                      enum iproc_pcie_reg reg)
-+{
-+      return pcie->reg_offsets[reg];
-+}
-+
-+static inline u32 iproc_pcie_read_reg(struct iproc_pcie *pcie,
-+                                    enum iproc_pcie_reg reg)
-+{
-+      u16 offset = iproc_pcie_reg_offset(pcie, reg);
-+
-+      if (iproc_pcie_reg_is_invalid(offset))
-+              return 0;
-+
-+      return readl(pcie->base + offset);
-+}
-+
-+static inline void iproc_pcie_write_reg(struct iproc_pcie *pcie,
-+                                      enum iproc_pcie_reg reg, u32 val)
-+{
-+      u16 offset = iproc_pcie_reg_offset(pcie, reg);
-+
-+      if (iproc_pcie_reg_is_invalid(offset))
-+              return;
-+
-+      writel(val, pcie->base + offset);
-+}
-+
-+static inline void iproc_pcie_ob_write(struct iproc_pcie *pcie,
-+                                     enum iproc_pcie_reg reg,
-+                                     unsigned window, u32 val)
-+{
-+      u16 offset = iproc_pcie_reg_offset(pcie, reg);
-+
-+      if (iproc_pcie_reg_is_invalid(offset))
-+              return;
-+
-+      writel(val, pcie->base + offset + (window * 8));
-+}
-+
-+static inline bool iproc_pcie_device_is_valid(struct iproc_pcie *pcie,
-+                                            unsigned int slot,
-+                                            unsigned int fn)
-+{
-+      if (slot > 0)
-+              return false;
-+
-+      /* PAXC can only support limited number of functions */
-+      if (pcie->type == IPROC_PCIE_PAXC && fn >= MAX_NUM_PAXC_PF)
-+              return false;
-+
-+      return true;
-+}
-+
- /**
-  * Note access to the configuration registers are protected at the higher layer
-  * by 'pci_lock' in drivers/pci/access.c
-@@ -104,28 +197,34 @@ static void __iomem *iproc_pcie_map_cfg_
-       unsigned fn = PCI_FUNC(devfn);
-       unsigned busno = bus->number;
-       u32 val;
-+      u16 offset;
-+
-+      if (!iproc_pcie_device_is_valid(pcie, slot, fn))
-+              return NULL;
-       /* root complex access */
-       if (busno == 0) {
--              if (slot >= 1)
-+              iproc_pcie_write_reg(pcie, IPROC_PCIE_CFG_IND_ADDR,
-+                                   where & CFG_IND_ADDR_MASK);
-+              offset = iproc_pcie_reg_offset(pcie, IPROC_PCIE_CFG_IND_DATA);
-+              if (iproc_pcie_reg_is_invalid(offset))
-                       return NULL;
--              writel(where & CFG_IND_ADDR_MASK,
--                     pcie->base + CFG_IND_ADDR_OFFSET);
--              return (pcie->base + CFG_IND_DATA_OFFSET);
-+              else
-+                      return (pcie->base + offset);
-       }
--      if (fn > 1)
--              return NULL;
--
-       /* EP device access */
-       val = (busno << CFG_ADDR_BUS_NUM_SHIFT) |
-               (slot << CFG_ADDR_DEV_NUM_SHIFT) |
-               (fn << CFG_ADDR_FUNC_NUM_SHIFT) |
-               (where & CFG_ADDR_REG_NUM_MASK) |
-               (1 & CFG_ADDR_CFG_TYPE_MASK);
--      writel(val, pcie->base + CFG_ADDR_OFFSET);
--
--      return (pcie->base + CFG_DATA_OFFSET);
-+      iproc_pcie_write_reg(pcie, IPROC_PCIE_CFG_ADDR, val);
-+      offset = iproc_pcie_reg_offset(pcie, IPROC_PCIE_CFG_DATA);
-+      if (iproc_pcie_reg_is_invalid(offset))
-+              return NULL;
-+      else
-+              return (pcie->base + offset);
- }
- static struct pci_ops iproc_pcie_ops = {
-@@ -138,18 +237,29 @@ static void iproc_pcie_reset(struct ipro
- {
-       u32 val;
-+      if (pcie->type == IPROC_PCIE_PAXC) {
-+              val = iproc_pcie_read_reg(pcie, IPROC_PCIE_CLK_CTRL);
-+              val &= ~PAXC_RESET_MASK;
-+              iproc_pcie_write_reg(pcie, IPROC_PCIE_CLK_CTRL, val);
-+              udelay(100);
-+              val |= PAXC_RESET_MASK;
-+              iproc_pcie_write_reg(pcie, IPROC_PCIE_CLK_CTRL, val);
-+              udelay(100);
-+              return;
-+      }
-+
-       /*
-        * Select perst_b signal as reset source. Put the device into reset,
-        * and then bring it out of reset
-        */
--      val = readl(pcie->base + CLK_CONTROL_OFFSET);
-+      val = iproc_pcie_read_reg(pcie, IPROC_PCIE_CLK_CTRL);
-       val &= ~EP_PERST_SOURCE_SELECT & ~EP_MODE_SURVIVE_PERST &
-               ~RC_PCIE_RST_OUTPUT;
--      writel(val, pcie->base + CLK_CONTROL_OFFSET);
-+      iproc_pcie_write_reg(pcie, IPROC_PCIE_CLK_CTRL, val);
-       udelay(250);
-       val |= RC_PCIE_RST_OUTPUT;
--      writel(val, pcie->base + CLK_CONTROL_OFFSET);
-+      iproc_pcie_write_reg(pcie, IPROC_PCIE_CLK_CTRL, val);
-       msleep(100);
- }
-@@ -160,7 +270,14 @@ static int iproc_pcie_check_link(struct
-       u16 pos, link_status;
-       bool link_is_active = false;
--      val = readl(pcie->base + PCIE_LINK_STATUS_OFFSET);
-+      /*
-+       * PAXC connects to emulated endpoint devices directly and does not
-+       * have a Serdes.  Therefore skip the link detection logic here.
-+       */
-+      if (pcie->type == IPROC_PCIE_PAXC)
-+              return 0;
-+
-+      val = iproc_pcie_read_reg(pcie, IPROC_PCIE_LINK_STATUS);
-       if (!(val & PCIE_PHYLINKUP) || !(val & PCIE_DL_ACTIVE)) {
-               dev_err(pcie->dev, "PHY or data link is INACTIVE!\n");
-               return -ENODEV;
-@@ -221,7 +338,7 @@ static int iproc_pcie_check_link(struct
- static void iproc_pcie_enable(struct iproc_pcie *pcie)
- {
--      writel(SYS_RC_INTX_MASK, pcie->base + SYS_RC_INTX_EN);
-+      iproc_pcie_write_reg(pcie, IPROC_PCIE_INTX_EN, SYS_RC_INTX_MASK);
- }
- /**
-@@ -272,11 +389,15 @@ static int iproc_pcie_setup_ob(struct ip
-       axi_addr -= ob->axi_offset;
-       for (i = 0; i < MAX_NUM_OB_WINDOWS; i++) {
--              writel(lower_32_bits(axi_addr) | OARR_VALID |
--                     (ob->set_oarr_size ? 1 : 0), pcie->base + OARR_LO(i));
--              writel(upper_32_bits(axi_addr), pcie->base + OARR_HI(i));
--              writel(lower_32_bits(pci_addr), pcie->base + OMAP_LO(i));
--              writel(upper_32_bits(pci_addr), pcie->base + OMAP_HI(i));
-+              iproc_pcie_ob_write(pcie, IPROC_PCIE_OARR_LO, i,
-+                                  lower_32_bits(axi_addr) | OARR_VALID |
-+                                  (ob->set_oarr_size ? 1 : 0));
-+              iproc_pcie_ob_write(pcie, IPROC_PCIE_OARR_HI, i,
-+                                  upper_32_bits(axi_addr));
-+              iproc_pcie_ob_write(pcie, IPROC_PCIE_OMAP_LO, i,
-+                                  lower_32_bits(pci_addr));
-+              iproc_pcie_ob_write(pcie, IPROC_PCIE_OMAP_HI, i,
-+                                  upper_32_bits(pci_addr));
-               size -= ob->window_size;
-               if (size == 0)
-@@ -340,6 +461,19 @@ int iproc_pcie_setup(struct iproc_pcie *
-               goto err_exit_phy;
-       }
-+      switch (pcie->type) {
-+      case IPROC_PCIE_PAXB:
-+              pcie->reg_offsets = iproc_pcie_reg_paxb;
-+              break;
-+      case IPROC_PCIE_PAXC:
-+              pcie->reg_offsets = iproc_pcie_reg_paxc;
-+              break;
-+      default:
-+              dev_err(pcie->dev, "incompatible iProc PCIe interface\n");
-+              ret = -EINVAL;
-+              goto err_power_off_phy;
-+      }
-+
-       iproc_pcie_reset(pcie);
-       if (pcie->need_ob_cfg) {
---- a/drivers/pci/host/pcie-iproc.h
-+++ b/drivers/pci/host/pcie-iproc.h
-@@ -15,6 +15,20 @@
- #define _PCIE_IPROC_H
- /**
-+ * iProc PCIe interface type
-+ *
-+ * PAXB is the wrapper used in root complex that can be connected to an
-+ * external endpoint device.
-+ *
-+ * PAXC is the wrapper used in root complex dedicated for internal emulated
-+ * endpoint devices.
-+ */
-+enum iproc_pcie_type {
-+      IPROC_PCIE_PAXB = 0,
-+      IPROC_PCIE_PAXC,
-+};
-+
-+/**
-  * iProc PCIe outbound mapping
-  * @set_oarr_size: indicates the OARR size bit needs to be set
-  * @axi_offset: offset from the AXI address to the internal address used by
-@@ -29,7 +43,10 @@ struct iproc_pcie_ob {
- /**
-  * iProc PCIe device
-+ *
-  * @dev: pointer to device data structure
-+ * @type: iProc PCIe interface type
-+ * @reg_offsets: register offsets
-  * @base: PCIe host controller I/O register base
-  * @sysdata: Per PCI controller data (ARM-specific)
-  * @root_bus: pointer to root bus
-@@ -41,6 +58,8 @@ struct iproc_pcie_ob {
-  */
- struct iproc_pcie {
-       struct device *dev;
-+      enum iproc_pcie_type type;
-+      const u16 *reg_offsets;
-       void __iomem *base;
- #ifdef CONFIG_ARM
-       struct pci_sys_data sysdata;
diff --git a/target/linux/bcm53xx/patches-4.1/040-0003-PCI-iproc-Add-iProc-PCIe-MSI-device-tree-binding.patch b/target/linux/bcm53xx/patches-4.1/040-0003-PCI-iproc-Add-iProc-PCIe-MSI-device-tree-binding.patch
deleted file mode 100644 (file)
index b02b121..0000000
+++ /dev/null
@@ -1,68 +0,0 @@
-From c7bd48195377435ecaf38869b936be8e7abe3489 Mon Sep 17 00:00:00 2001
-From: Ray Jui <rjui@broadcom.com>
-Date: Fri, 4 Dec 2015 09:35:00 -0800
-Subject: [PATCH 3/5] PCI: iproc: Add iProc PCIe MSI device tree binding
-
-Update the iProc PCIe device tree bindings with added binding information
-for MSI.
-
-Signed-off-by: Ray Jui <rjui@broadcom.com>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Reviewed-by: Anup Patel <anup.patel@broadcom.com>
-Reviewed-by: Vikram Prakash <vikramp@broadcom.com>
-Reviewed-by: Scott Branden <sbranden@broadcom.com>
----
- .../devicetree/bindings/pci/brcm,iproc-pcie.txt    | 35 ++++++++++++++++++++++
- 1 file changed, 35 insertions(+)
-
---- a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
-+++ b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
-@@ -35,6 +35,28 @@ Optional:
- - brcm,pcie-ob-oarr-size: Some iProc SoCs need the OARR size bit to be set to
- increase the outbound window size
-+MSI support (optional):
-+
-+For older platforms without MSI integrated in the GIC, iProc PCIe core provides
-+an event queue based MSI support.  The iProc MSI uses host memories to store
-+MSI posted writes in the event queues
-+
-+- msi-parent: Link to the device node of the MSI controller.  On newer iProc
-+platforms, the MSI controller may be gicv2m or gicv3-its.  On older iProc
-+platforms without MSI support in its interrupt controller, one may use the
-+event queue based MSI support integrated within the iProc PCIe core.
-+
-+When the iProc event queue based MSI is used, one needs to define the
-+following properties in the MSI device node:
-+- compatible: Must be "brcm,iproc-msi"
-+- msi-controller: claims itself as an MSI controller
-+- interrupt-parent: Link to its parent interrupt device
-+- interrupts: List of interrupt IDs from its parent interrupt device
-+
-+Optional properties:
-+- brcm,pcie-msi-inten: Needs to be present for some older iProc platforms that
-+require the interrupt enable registers to be set explicitly to enable MSI
-+
- Example:
-       pcie0: pcie@18012000 {
-               compatible = "brcm,iproc-pcie";
-@@ -61,6 +83,19 @@ Example:
-               brcm,pcie-ob-oarr-size;
-               brcm,pcie-ob-axi-offset = <0x00000000>;
-               brcm,pcie-ob-window-size = <256>;
-+
-+              msi-parent = <&msi0>;
-+
-+              /* iProc event queue based MSI */
-+              msi0: msi@18012000 {
-+                      compatible = "brcm,iproc-msi";
-+                      msi-controller;
-+                      interrupt-parent = <&gic>;
-+                      interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>,
-+                                   <GIC_SPI 97 IRQ_TYPE_NONE>,
-+                                   <GIC_SPI 98 IRQ_TYPE_NONE>,
-+                                   <GIC_SPI 99 IRQ_TYPE_NONE>,
-+              };
-       };
-       pcie1: pcie@18013000 {
diff --git a/target/linux/bcm53xx/patches-4.1/040-0004-PCI-iproc-Add-iProc-PCIe-MSI-support.patch b/target/linux/bcm53xx/patches-4.1/040-0004-PCI-iproc-Add-iProc-PCIe-MSI-support.patch
deleted file mode 100644 (file)
index 9eef065..0000000
+++ /dev/null
@@ -1,889 +0,0 @@
-From 3bc2b2348835f6edd33c383a2fbcf15fe3dac3b2 Mon Sep 17 00:00:00 2001
-From: Ray Jui <rjui@broadcom.com>
-Date: Wed, 6 Jan 2016 18:04:35 -0600
-Subject: [PATCH 4/5] PCI: iproc: Add iProc PCIe MSI support
-
-Add PCIe MSI support for both PAXB and PAXC interfaces on all iProc-based
-platforms.
-
-The iProc PCIe MSI support deploys an event queue-based implementation.
-Each event queue is serviced by a GIC interrupt and can support up to 64
-MSI vectors.  Host memory is allocated for the event queues, and each event
-queue consists of 64 word-sized entries.  MSI data is written to the lower
-16-bit of each entry, whereas the upper 16-bit of the entry is reserved for
-the controller for internal processing.
-
-Each event queue is tracked by a head pointer and tail pointer.  Head
-pointer indicates the next entry in the event queue to be processed by
-the driver and is updated by the driver after processing is done.
-The controller uses the tail pointer as the next MSI data insertion
-point.  The controller ensures MSI data is flushed to host memory before
-updating the tail pointer and then triggering the interrupt.
-
-MSI IRQ affinity is supported by evenly distributing the interrupts to each
-CPU core.  MSI vector is moved from one GIC interrupt to another in order
-to steer to the target CPU.
-
-Therefore, the actual number of supported MSI vectors is:
-
-  M * 64 / N
-
-where M denotes the number of GIC interrupts (event queues), and N denotes
-the number of CPU cores.
-
-This iProc event queue-based MSI support should not be used with newer
-platforms with integrated MSI support in the GIC (e.g., giv2m or
-gicv3-its).
-
-[bhelgaas: fold in Kconfig fixes from Arnd Bergmann <arnd@arndb.de>]
-Signed-off-by: Ray Jui <rjui@broadcom.com>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Reviewed-by: Anup Patel <anup.patel@broadcom.com>
-Reviewed-by: Vikram Prakash <vikramp@broadcom.com>
-Reviewed-by: Scott Branden <sbranden@broadcom.com>
-Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
----
- drivers/pci/host/Kconfig               |  10 +
- drivers/pci/host/Makefile              |   1 +
- drivers/pci/host/pcie-iproc-bcma.c     |   1 +
- drivers/pci/host/pcie-iproc-msi.c      | 675 +++++++++++++++++++++++++++++++++
- drivers/pci/host/pcie-iproc-platform.c |   1 +
- drivers/pci/host/pcie-iproc.c          |  26 ++
- drivers/pci/host/pcie-iproc.h          |  23 +-
- 7 files changed, 735 insertions(+), 2 deletions(-)
- create mode 100644 drivers/pci/host/pcie-iproc-msi.c
-
---- a/drivers/pci/host/Kconfig
-+++ b/drivers/pci/host/Kconfig
-@@ -133,5 +133,15 @@ config PCIE_IPROC_BCMA
-       help
-         Say Y here if you want to use the Broadcom iProc PCIe controller
-         through the BCMA bus interface
-+ 
-+config PCIE_IPROC_MSI
-+      bool "Broadcom iProc PCIe MSI support"
-+      depends on PCIE_IPROC_PLATFORM || PCIE_IPROC_BCMA
-+      depends on PCI_MSI
-+      select PCI_MSI_IRQ_DOMAIN
-+      default ARCH_BCM_IPROC
-+      help
-+        Say Y here if you want to enable MSI support for Broadcom's iProc
-+        PCIe controller
- endmenu
---- a/drivers/pci/host/Makefile
-+++ b/drivers/pci/host/Makefile
-@@ -14,5 +14,6 @@ obj-$(CONFIG_PCI_XGENE) += pci-xgene.o
- obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o
- obj-$(CONFIG_PCI_VERSATILE) += pci-versatile.o
- obj-$(CONFIG_PCIE_IPROC) += pcie-iproc.o
-+obj-$(CONFIG_PCIE_IPROC_MSI) += pcie-iproc-msi.o
- obj-$(CONFIG_PCIE_IPROC_PLATFORM) += pcie-iproc-platform.o
- obj-$(CONFIG_PCIE_IPROC_BCMA) += pcie-iproc-bcma.o
---- a/drivers/pci/host/pcie-iproc-bcma.c
-+++ b/drivers/pci/host/pcie-iproc-bcma.c
-@@ -55,6 +55,7 @@ static int iproc_pcie_bcma_probe(struct
-       bcma_set_drvdata(bdev, pcie);
-       pcie->base = bdev->io_addr;
-+      pcie->base_addr = bdev->addr;
-       res_mem.start = bdev->addr_s[0];
-       res_mem.end = bdev->addr_s[0] + SZ_128M - 1;
---- /dev/null
-+++ b/drivers/pci/host/pcie-iproc-msi.c
-@@ -0,0 +1,675 @@
-+/*
-+ * Copyright (C) 2015 Broadcom Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation version 2.
-+ *
-+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
-+ * kind, whether express or implied; without even the implied warranty
-+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ */
-+
-+#include <linux/interrupt.h>
-+#include <linux/irqchip/chained_irq.h>
-+#include <linux/irqdomain.h>
-+#include <linux/msi.h>
-+#include <linux/of_irq.h>
-+#include <linux/of_pci.h>
-+#include <linux/pci.h>
-+
-+#include "pcie-iproc.h"
-+
-+#define IPROC_MSI_INTR_EN_SHIFT        11
-+#define IPROC_MSI_INTR_EN              BIT(IPROC_MSI_INTR_EN_SHIFT)
-+#define IPROC_MSI_INT_N_EVENT_SHIFT    1
-+#define IPROC_MSI_INT_N_EVENT          BIT(IPROC_MSI_INT_N_EVENT_SHIFT)
-+#define IPROC_MSI_EQ_EN_SHIFT          0
-+#define IPROC_MSI_EQ_EN                BIT(IPROC_MSI_EQ_EN_SHIFT)
-+
-+#define IPROC_MSI_EQ_MASK              0x3f
-+
-+/* Max number of GIC interrupts */
-+#define NR_HW_IRQS                     6
-+
-+/* Number of entries in each event queue */
-+#define EQ_LEN                         64
-+
-+/* Size of each event queue memory region */
-+#define EQ_MEM_REGION_SIZE             SZ_4K
-+
-+/* Size of each MSI address region */
-+#define MSI_MEM_REGION_SIZE            SZ_4K
-+
-+enum iproc_msi_reg {
-+      IPROC_MSI_EQ_PAGE = 0,
-+      IPROC_MSI_EQ_PAGE_UPPER,
-+      IPROC_MSI_PAGE,
-+      IPROC_MSI_PAGE_UPPER,
-+      IPROC_MSI_CTRL,
-+      IPROC_MSI_EQ_HEAD,
-+      IPROC_MSI_EQ_TAIL,
-+      IPROC_MSI_INTS_EN,
-+      IPROC_MSI_REG_SIZE,
-+};
-+
-+struct iproc_msi;
-+
-+/**
-+ * iProc MSI group
-+ *
-+ * One MSI group is allocated per GIC interrupt, serviced by one iProc MSI
-+ * event queue.
-+ *
-+ * @msi: pointer to iProc MSI data
-+ * @gic_irq: GIC interrupt
-+ * @eq: Event queue number
-+ */
-+struct iproc_msi_grp {
-+      struct iproc_msi *msi;
-+      int gic_irq;
-+      unsigned int eq;
-+};
-+
-+/**
-+ * iProc event queue based MSI
-+ *
-+ * Only meant to be used on platforms without MSI support integrated into the
-+ * GIC.
-+ *
-+ * @pcie: pointer to iProc PCIe data
-+ * @reg_offsets: MSI register offsets
-+ * @grps: MSI groups
-+ * @nr_irqs: number of total interrupts connected to GIC
-+ * @nr_cpus: number of toal CPUs
-+ * @has_inten_reg: indicates the MSI interrupt enable register needs to be
-+ * set explicitly (required for some legacy platforms)
-+ * @bitmap: MSI vector bitmap
-+ * @bitmap_lock: lock to protect access to the MSI bitmap
-+ * @nr_msi_vecs: total number of MSI vectors
-+ * @inner_domain: inner IRQ domain
-+ * @msi_domain: MSI IRQ domain
-+ * @nr_eq_region: required number of 4K aligned memory region for MSI event
-+ * queues
-+ * @nr_msi_region: required number of 4K aligned address region for MSI posted
-+ * writes
-+ * @eq_cpu: pointer to allocated memory region for MSI event queues
-+ * @eq_dma: DMA address of MSI event queues
-+ * @msi_addr: MSI address
-+ */
-+struct iproc_msi {
-+      struct iproc_pcie *pcie;
-+      const u16 (*reg_offsets)[IPROC_MSI_REG_SIZE];
-+      struct iproc_msi_grp *grps;
-+      int nr_irqs;
-+      int nr_cpus;
-+      bool has_inten_reg;
-+      unsigned long *bitmap;
-+      struct mutex bitmap_lock;
-+      unsigned int nr_msi_vecs;
-+      struct irq_domain *inner_domain;
-+      struct irq_domain *msi_domain;
-+      unsigned int nr_eq_region;
-+      unsigned int nr_msi_region;
-+      void *eq_cpu;
-+      dma_addr_t eq_dma;
-+      phys_addr_t msi_addr;
-+};
-+
-+static const u16 iproc_msi_reg_paxb[NR_HW_IRQS][IPROC_MSI_REG_SIZE] = {
-+      { 0x200, 0x2c0, 0x204, 0x2c4, 0x210, 0x250, 0x254, 0x208 },
-+      { 0x200, 0x2c0, 0x204, 0x2c4, 0x214, 0x258, 0x25c, 0x208 },
-+      { 0x200, 0x2c0, 0x204, 0x2c4, 0x218, 0x260, 0x264, 0x208 },
-+      { 0x200, 0x2c0, 0x204, 0x2c4, 0x21c, 0x268, 0x26c, 0x208 },
-+      { 0x200, 0x2c0, 0x204, 0x2c4, 0x220, 0x270, 0x274, 0x208 },
-+      { 0x200, 0x2c0, 0x204, 0x2c4, 0x224, 0x278, 0x27c, 0x208 },
-+};
-+
-+static const u16 iproc_msi_reg_paxc[NR_HW_IRQS][IPROC_MSI_REG_SIZE] = {
-+      { 0xc00, 0xc04, 0xc08, 0xc0c, 0xc40, 0xc50, 0xc60 },
-+      { 0xc10, 0xc14, 0xc18, 0xc1c, 0xc44, 0xc54, 0xc64 },
-+      { 0xc20, 0xc24, 0xc28, 0xc2c, 0xc48, 0xc58, 0xc68 },
-+      { 0xc30, 0xc34, 0xc38, 0xc3c, 0xc4c, 0xc5c, 0xc6c },
-+};
-+
-+static inline u32 iproc_msi_read_reg(struct iproc_msi *msi,
-+                                   enum iproc_msi_reg reg,
-+                                   unsigned int eq)
-+{
-+      struct iproc_pcie *pcie = msi->pcie;
-+
-+      return readl_relaxed(pcie->base + msi->reg_offsets[eq][reg]);
-+}
-+
-+static inline void iproc_msi_write_reg(struct iproc_msi *msi,
-+                                     enum iproc_msi_reg reg,
-+                                     int eq, u32 val)
-+{
-+      struct iproc_pcie *pcie = msi->pcie;
-+
-+      writel_relaxed(val, pcie->base + msi->reg_offsets[eq][reg]);
-+}
-+
-+static inline u32 hwirq_to_group(struct iproc_msi *msi, unsigned long hwirq)
-+{
-+      return (hwirq % msi->nr_irqs);
-+}
-+
-+static inline unsigned int iproc_msi_addr_offset(struct iproc_msi *msi,
-+                                               unsigned long hwirq)
-+{
-+      if (msi->nr_msi_region > 1)
-+              return hwirq_to_group(msi, hwirq) * MSI_MEM_REGION_SIZE;
-+      else
-+              return hwirq_to_group(msi, hwirq) * sizeof(u32);
-+}
-+
-+static inline unsigned int iproc_msi_eq_offset(struct iproc_msi *msi, u32 eq)
-+{
-+      if (msi->nr_eq_region > 1)
-+              return eq * EQ_MEM_REGION_SIZE;
-+      else
-+              return eq * EQ_LEN * sizeof(u32);
-+}
-+
-+static struct irq_chip iproc_msi_irq_chip = {
-+      .name = "iProc-MSI",
-+};
-+
-+static struct msi_domain_info iproc_msi_domain_info = {
-+      .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
-+              MSI_FLAG_PCI_MSIX,
-+      .chip = &iproc_msi_irq_chip,
-+};
-+
-+/*
-+ * In iProc PCIe core, each MSI group is serviced by a GIC interrupt and a
-+ * dedicated event queue.  Each MSI group can support up to 64 MSI vectors.
-+ *
-+ * The number of MSI groups varies between different iProc SoCs.  The total
-+ * number of CPU cores also varies.  To support MSI IRQ affinity, we
-+ * distribute GIC interrupts across all available CPUs.  MSI vector is moved
-+ * from one GIC interrupt to another to steer to the target CPU.
-+ *
-+ * Assuming:
-+ * - the number of MSI groups is M
-+ * - the number of CPU cores is N
-+ * - M is always a multiple of N
-+ *
-+ * Total number of raw MSI vectors = M * 64
-+ * Total number of supported MSI vectors = (M * 64) / N
-+ */
-+static inline int hwirq_to_cpu(struct iproc_msi *msi, unsigned long hwirq)
-+{
-+      return (hwirq % msi->nr_cpus);
-+}
-+
-+static inline unsigned long hwirq_to_canonical_hwirq(struct iproc_msi *msi,
-+                                                   unsigned long hwirq)
-+{
-+      return (hwirq - hwirq_to_cpu(msi, hwirq));
-+}
-+
-+static int iproc_msi_irq_set_affinity(struct irq_data *data,
-+                                    const struct cpumask *mask, bool force)
-+{
-+      struct iproc_msi *msi = irq_data_get_irq_chip_data(data);
-+      int target_cpu = cpumask_first(mask);
-+      int curr_cpu;
-+
-+      curr_cpu = hwirq_to_cpu(msi, data->hwirq);
-+      if (curr_cpu == target_cpu)
-+              return IRQ_SET_MASK_OK_DONE;
-+
-+      /* steer MSI to the target CPU */
-+      data->hwirq = hwirq_to_canonical_hwirq(msi, data->hwirq) + target_cpu;
-+
-+      return IRQ_SET_MASK_OK;
-+}
-+
-+static void iproc_msi_irq_compose_msi_msg(struct irq_data *data,
-+                                        struct msi_msg *msg)
-+{
-+      struct iproc_msi *msi = irq_data_get_irq_chip_data(data);
-+      dma_addr_t addr;
-+
-+      addr = msi->msi_addr + iproc_msi_addr_offset(msi, data->hwirq);
-+      msg->address_lo = lower_32_bits(addr);
-+      msg->address_hi = upper_32_bits(addr);
-+      msg->data = data->hwirq;
-+}
-+
-+static struct irq_chip iproc_msi_bottom_irq_chip = {
-+      .name = "MSI",
-+      .irq_set_affinity = iproc_msi_irq_set_affinity,
-+      .irq_compose_msi_msg = iproc_msi_irq_compose_msi_msg,
-+};
-+
-+static int iproc_msi_irq_domain_alloc(struct irq_domain *domain,
-+                                    unsigned int virq, unsigned int nr_irqs,
-+                                    void *args)
-+{
-+      struct iproc_msi *msi = domain->host_data;
-+      int hwirq;
-+
-+      mutex_lock(&msi->bitmap_lock);
-+
-+      /* Allocate 'nr_cpus' number of MSI vectors each time */
-+      hwirq = bitmap_find_next_zero_area(msi->bitmap, msi->nr_msi_vecs, 0,
-+                                         msi->nr_cpus, 0);
-+      if (hwirq < msi->nr_msi_vecs) {
-+              bitmap_set(msi->bitmap, hwirq, msi->nr_cpus);
-+      } else {
-+              mutex_unlock(&msi->bitmap_lock);
-+              return -ENOSPC;
-+      }
-+
-+      mutex_unlock(&msi->bitmap_lock);
-+
-+      irq_domain_set_info(domain, virq, hwirq, &iproc_msi_bottom_irq_chip,
-+                          domain->host_data, handle_simple_irq, NULL, NULL);
-+
-+      return 0;
-+}
-+
-+static void iproc_msi_irq_domain_free(struct irq_domain *domain,
-+                                    unsigned int virq, unsigned int nr_irqs)
-+{
-+      struct irq_data *data = irq_domain_get_irq_data(domain, virq);
-+      struct iproc_msi *msi = irq_data_get_irq_chip_data(data);
-+      unsigned int hwirq;
-+
-+      mutex_lock(&msi->bitmap_lock);
-+
-+      hwirq = hwirq_to_canonical_hwirq(msi, data->hwirq);
-+      bitmap_clear(msi->bitmap, hwirq, msi->nr_cpus);
-+
-+      mutex_unlock(&msi->bitmap_lock);
-+
-+      irq_domain_free_irqs_parent(domain, virq, nr_irqs);
-+}
-+
-+static const struct irq_domain_ops msi_domain_ops = {
-+      .alloc = iproc_msi_irq_domain_alloc,
-+      .free = iproc_msi_irq_domain_free,
-+};
-+
-+static inline u32 decode_msi_hwirq(struct iproc_msi *msi, u32 eq, u32 head)
-+{
-+      u32 *msg, hwirq;
-+      unsigned int offs;
-+
-+      offs = iproc_msi_eq_offset(msi, eq) + head * sizeof(u32);
-+      msg = (u32 *)(msi->eq_cpu + offs);
-+      hwirq = *msg & IPROC_MSI_EQ_MASK;
-+
-+      /*
-+       * Since we have multiple hwirq mapped to a single MSI vector,
-+       * now we need to derive the hwirq at CPU0.  It can then be used to
-+       * mapped back to virq.
-+       */
-+      return hwirq_to_canonical_hwirq(msi, hwirq);
-+}
-+
-+static void iproc_msi_handler(struct irq_desc *desc)
-+{
-+      struct irq_chip *chip = irq_desc_get_chip(desc);
-+      struct iproc_msi_grp *grp;
-+      struct iproc_msi *msi;
-+      struct iproc_pcie *pcie;
-+      u32 eq, head, tail, nr_events;
-+      unsigned long hwirq;
-+      int virq;
-+
-+      chained_irq_enter(chip, desc);
-+
-+      grp = irq_desc_get_handler_data(desc);
-+      msi = grp->msi;
-+      pcie = msi->pcie;
-+      eq = grp->eq;
-+
-+      /*
-+       * iProc MSI event queue is tracked by head and tail pointers.  Head
-+       * pointer indicates the next entry (MSI data) to be consumed by SW in
-+       * the queue and needs to be updated by SW.  iProc MSI core uses the
-+       * tail pointer as the next data insertion point.
-+       *
-+       * Entries between head and tail pointers contain valid MSI data.  MSI
-+       * data is guaranteed to be in the event queue memory before the tail
-+       * pointer is updated by the iProc MSI core.
-+       */
-+      head = iproc_msi_read_reg(msi, IPROC_MSI_EQ_HEAD,
-+                                eq) & IPROC_MSI_EQ_MASK;
-+      do {
-+              tail = iproc_msi_read_reg(msi, IPROC_MSI_EQ_TAIL,
-+                                        eq) & IPROC_MSI_EQ_MASK;
-+
-+              /*
-+               * Figure out total number of events (MSI data) to be
-+               * processed.
-+               */
-+              nr_events = (tail < head) ?
-+                      (EQ_LEN - (head - tail)) : (tail - head);
-+              if (!nr_events)
-+                      break;
-+
-+              /* process all outstanding events */
-+              while (nr_events--) {
-+                      hwirq = decode_msi_hwirq(msi, eq, head);
-+                      virq = irq_find_mapping(msi->inner_domain, hwirq);
-+                      generic_handle_irq(virq);
-+
-+                      head++;
-+                      head %= EQ_LEN;
-+              }
-+
-+              /*
-+               * Now all outstanding events have been processed.  Update the
-+               * head pointer.
-+               */
-+              iproc_msi_write_reg(msi, IPROC_MSI_EQ_HEAD, eq, head);
-+
-+              /*
-+               * Now go read the tail pointer again to see if there are new
-+               * oustanding events that came in during the above window.
-+               */
-+      } while (true);
-+
-+      chained_irq_exit(chip, desc);
-+}
-+
-+static void iproc_msi_enable(struct iproc_msi *msi)
-+{
-+      int i, eq;
-+      u32 val;
-+
-+      /* Program memory region for each event queue */
-+      for (i = 0; i < msi->nr_eq_region; i++) {
-+              dma_addr_t addr = msi->eq_dma + (i * EQ_MEM_REGION_SIZE);
-+
-+              iproc_msi_write_reg(msi, IPROC_MSI_EQ_PAGE, i,
-+                                  lower_32_bits(addr));
-+              iproc_msi_write_reg(msi, IPROC_MSI_EQ_PAGE_UPPER, i,
-+                                  upper_32_bits(addr));
-+      }
-+
-+      /* Program address region for MSI posted writes */
-+      for (i = 0; i < msi->nr_msi_region; i++) {
-+              phys_addr_t addr = msi->msi_addr + (i * MSI_MEM_REGION_SIZE);
-+
-+              iproc_msi_write_reg(msi, IPROC_MSI_PAGE, i,
-+                                  lower_32_bits(addr));
-+              iproc_msi_write_reg(msi, IPROC_MSI_PAGE_UPPER, i,
-+                                  upper_32_bits(addr));
-+      }
-+
-+      for (eq = 0; eq < msi->nr_irqs; eq++) {
-+              /* Enable MSI event queue */
-+              val = IPROC_MSI_INTR_EN | IPROC_MSI_INT_N_EVENT |
-+                      IPROC_MSI_EQ_EN;
-+              iproc_msi_write_reg(msi, IPROC_MSI_CTRL, eq, val);
-+
-+              /*
-+               * Some legacy platforms require the MSI interrupt enable
-+               * register to be set explicitly.
-+               */
-+              if (msi->has_inten_reg) {
-+                      val = iproc_msi_read_reg(msi, IPROC_MSI_INTS_EN, eq);
-+                      val |= BIT(eq);
-+                      iproc_msi_write_reg(msi, IPROC_MSI_INTS_EN, eq, val);
-+              }
-+      }
-+}
-+
-+static void iproc_msi_disable(struct iproc_msi *msi)
-+{
-+      u32 eq, val;
-+
-+      for (eq = 0; eq < msi->nr_irqs; eq++) {
-+              if (msi->has_inten_reg) {
-+                      val = iproc_msi_read_reg(msi, IPROC_MSI_INTS_EN, eq);
-+                      val &= ~BIT(eq);
-+                      iproc_msi_write_reg(msi, IPROC_MSI_INTS_EN, eq, val);
-+              }
-+
-+              val = iproc_msi_read_reg(msi, IPROC_MSI_CTRL, eq);
-+              val &= ~(IPROC_MSI_INTR_EN | IPROC_MSI_INT_N_EVENT |
-+                       IPROC_MSI_EQ_EN);
-+              iproc_msi_write_reg(msi, IPROC_MSI_CTRL, eq, val);
-+      }
-+}
-+
-+static int iproc_msi_alloc_domains(struct device_node *node,
-+                                 struct iproc_msi *msi)
-+{
-+      msi->inner_domain = irq_domain_add_linear(NULL, msi->nr_msi_vecs,
-+                                                &msi_domain_ops, msi);
-+      if (!msi->inner_domain)
-+              return -ENOMEM;
-+
-+      msi->msi_domain = pci_msi_create_irq_domain(of_node_to_fwnode(node),
-+                                                  &iproc_msi_domain_info,
-+                                                  msi->inner_domain);
-+      if (!msi->msi_domain) {
-+              irq_domain_remove(msi->inner_domain);
-+              return -ENOMEM;
-+      }
-+
-+      return 0;
-+}
-+
-+static void iproc_msi_free_domains(struct iproc_msi *msi)
-+{
-+      if (msi->msi_domain)
-+              irq_domain_remove(msi->msi_domain);
-+
-+      if (msi->inner_domain)
-+              irq_domain_remove(msi->inner_domain);
-+}
-+
-+static void iproc_msi_irq_free(struct iproc_msi *msi, unsigned int cpu)
-+{
-+      int i;
-+
-+      for (i = cpu; i < msi->nr_irqs; i += msi->nr_cpus) {
-+              irq_set_chained_handler_and_data(msi->grps[i].gic_irq,
-+                                               NULL, NULL);
-+      }
-+}
-+
-+static int iproc_msi_irq_setup(struct iproc_msi *msi, unsigned int cpu)
-+{
-+      int i, ret;
-+      cpumask_var_t mask;
-+      struct iproc_pcie *pcie = msi->pcie;
-+
-+      for (i = cpu; i < msi->nr_irqs; i += msi->nr_cpus) {
-+              irq_set_chained_handler_and_data(msi->grps[i].gic_irq,
-+                                               iproc_msi_handler,
-+                                               &msi->grps[i]);
-+              /* Dedicate GIC interrupt to each CPU core */
-+              if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
-+                      cpumask_clear(mask);
-+                      cpumask_set_cpu(cpu, mask);
-+                      ret = irq_set_affinity(msi->grps[i].gic_irq, mask);
-+                      if (ret)
-+                              dev_err(pcie->dev,
-+                                      "failed to set affinity for IRQ%d\n",
-+                                      msi->grps[i].gic_irq);
-+                      free_cpumask_var(mask);
-+              } else {
-+                      dev_err(pcie->dev, "failed to alloc CPU mask\n");
-+                      ret = -EINVAL;
-+              }
-+
-+              if (ret) {
-+                      /* Free all configured/unconfigured IRQs */
-+                      iproc_msi_irq_free(msi, cpu);
-+                      return ret;
-+              }
-+      }
-+
-+      return 0;
-+}
-+
-+int iproc_msi_init(struct iproc_pcie *pcie, struct device_node *node)
-+{
-+      struct iproc_msi *msi;
-+      int i, ret;
-+      unsigned int cpu;
-+
-+      if (!of_device_is_compatible(node, "brcm,iproc-msi"))
-+              return -ENODEV;
-+
-+      if (!of_find_property(node, "msi-controller", NULL))
-+              return -ENODEV;
-+
-+      if (pcie->msi)
-+              return -EBUSY;
-+
-+      msi = devm_kzalloc(pcie->dev, sizeof(*msi), GFP_KERNEL);
-+      if (!msi)
-+              return -ENOMEM;
-+
-+      msi->pcie = pcie;
-+      pcie->msi = msi;
-+      msi->msi_addr = pcie->base_addr;
-+      mutex_init(&msi->bitmap_lock);
-+      msi->nr_cpus = num_possible_cpus();
-+
-+      msi->nr_irqs = of_irq_count(node);
-+      if (!msi->nr_irqs) {
-+              dev_err(pcie->dev, "found no MSI GIC interrupt\n");
-+              return -ENODEV;
-+      }
-+
-+      if (msi->nr_irqs > NR_HW_IRQS) {
-+              dev_warn(pcie->dev, "too many MSI GIC interrupts defined %d\n",
-+                       msi->nr_irqs);
-+              msi->nr_irqs = NR_HW_IRQS;
-+      }
-+
-+      if (msi->nr_irqs < msi->nr_cpus) {
-+              dev_err(pcie->dev,
-+                      "not enough GIC interrupts for MSI affinity\n");
-+              return -EINVAL;
-+      }
-+
-+      if (msi->nr_irqs % msi->nr_cpus != 0) {
-+              msi->nr_irqs -= msi->nr_irqs % msi->nr_cpus;
-+              dev_warn(pcie->dev, "Reducing number of interrupts to %d\n",
-+                       msi->nr_irqs);
-+      }
-+
-+      switch (pcie->type) {
-+      case IPROC_PCIE_PAXB:
-+              msi->reg_offsets = iproc_msi_reg_paxb;
-+              msi->nr_eq_region = 1;
-+              msi->nr_msi_region = 1;
-+              break;
-+      case IPROC_PCIE_PAXC:
-+              msi->reg_offsets = iproc_msi_reg_paxc;
-+              msi->nr_eq_region = msi->nr_irqs;
-+              msi->nr_msi_region = msi->nr_irqs;
-+              break;
-+      default:
-+              dev_err(pcie->dev, "incompatible iProc PCIe interface\n");
-+              return -EINVAL;
-+      }
-+
-+      if (of_find_property(node, "brcm,pcie-msi-inten", NULL))
-+              msi->has_inten_reg = true;
-+
-+      msi->nr_msi_vecs = msi->nr_irqs * EQ_LEN;
-+      msi->bitmap = devm_kcalloc(pcie->dev, BITS_TO_LONGS(msi->nr_msi_vecs),
-+                                 sizeof(*msi->bitmap), GFP_KERNEL);
-+      if (!msi->bitmap)
-+              return -ENOMEM;
-+
-+      msi->grps = devm_kcalloc(pcie->dev, msi->nr_irqs, sizeof(*msi->grps),
-+                               GFP_KERNEL);
-+      if (!msi->grps)
-+              return -ENOMEM;
-+
-+      for (i = 0; i < msi->nr_irqs; i++) {
-+              unsigned int irq = irq_of_parse_and_map(node, i);
-+
-+              if (!irq) {
-+                      dev_err(pcie->dev, "unable to parse/map interrupt\n");
-+                      ret = -ENODEV;
-+                      goto free_irqs;
-+              }
-+              msi->grps[i].gic_irq = irq;
-+              msi->grps[i].msi = msi;
-+              msi->grps[i].eq = i;
-+      }
-+
-+      /* Reserve memory for event queue and make sure memories are zeroed */
-+      msi->eq_cpu = dma_zalloc_coherent(pcie->dev,
-+                                        msi->nr_eq_region * EQ_MEM_REGION_SIZE,
-+                                        &msi->eq_dma, GFP_KERNEL);
-+      if (!msi->eq_cpu) {
-+              ret = -ENOMEM;
-+              goto free_irqs;
-+      }
-+
-+      ret = iproc_msi_alloc_domains(node, msi);
-+      if (ret) {
-+              dev_err(pcie->dev, "failed to create MSI domains\n");
-+              goto free_eq_dma;
-+      }
-+
-+      for_each_online_cpu(cpu) {
-+              ret = iproc_msi_irq_setup(msi, cpu);
-+              if (ret)
-+                      goto free_msi_irq;
-+      }
-+
-+      iproc_msi_enable(msi);
-+
-+      return 0;
-+
-+free_msi_irq:
-+      for_each_online_cpu(cpu)
-+              iproc_msi_irq_free(msi, cpu);
-+      iproc_msi_free_domains(msi);
-+
-+free_eq_dma:
-+      dma_free_coherent(pcie->dev, msi->nr_eq_region * EQ_MEM_REGION_SIZE,
-+                        msi->eq_cpu, msi->eq_dma);
-+
-+free_irqs:
-+      for (i = 0; i < msi->nr_irqs; i++) {
-+              if (msi->grps[i].gic_irq)
-+                      irq_dispose_mapping(msi->grps[i].gic_irq);
-+      }
-+      pcie->msi = NULL;
-+      return ret;
-+}
-+EXPORT_SYMBOL(iproc_msi_init);
-+
-+void iproc_msi_exit(struct iproc_pcie *pcie)
-+{
-+      struct iproc_msi *msi = pcie->msi;
-+      unsigned int i, cpu;
-+
-+      if (!msi)
-+              return;
-+
-+      iproc_msi_disable(msi);
-+
-+      for_each_online_cpu(cpu)
-+              iproc_msi_irq_free(msi, cpu);
-+
-+      iproc_msi_free_domains(msi);
-+
-+      dma_free_coherent(pcie->dev, msi->nr_eq_region * EQ_MEM_REGION_SIZE,
-+                        msi->eq_cpu, msi->eq_dma);
-+
-+      for (i = 0; i < msi->nr_irqs; i++) {
-+              if (msi->grps[i].gic_irq)
-+                      irq_dispose_mapping(msi->grps[i].gic_irq);
-+      }
-+}
-+EXPORT_SYMBOL(iproc_msi_exit);
---- a/drivers/pci/host/pcie-iproc-platform.c
-+++ b/drivers/pci/host/pcie-iproc-platform.c
-@@ -71,6 +71,7 @@ static int iproc_pcie_pltfm_probe(struct
-               dev_err(pcie->dev, "unable to map controller registers\n");
-               return -ENOMEM;
-       }
-+      pcie->base_addr = reg.start;
-       if (of_property_read_bool(np, "brcm,pcie-ob")) {
-               u32 val;
---- a/drivers/pci/host/pcie-iproc.c
-+++ b/drivers/pci/host/pcie-iproc.c
-@@ -440,6 +440,26 @@ static int iproc_pcie_map_ranges(struct
-       return 0;
- }
-+static int iproc_pcie_msi_enable(struct iproc_pcie *pcie)
-+{
-+      struct device_node *msi_node;
-+
-+      msi_node = of_parse_phandle(pcie->dev->of_node, "msi-parent", 0);
-+      if (!msi_node)
-+              return -ENODEV;
-+
-+      /*
-+       * If another MSI controller is being used, the call below should fail
-+       * but that is okay
-+       */
-+      return iproc_msi_init(pcie, msi_node);
-+}
-+
-+static void iproc_pcie_msi_disable(struct iproc_pcie *pcie)
-+{
-+      iproc_msi_exit(pcie);
-+}
-+
- int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
- {
-       int ret;
-@@ -506,6 +526,10 @@ int iproc_pcie_setup(struct iproc_pcie *
-       iproc_pcie_enable(pcie);
-+      if (IS_ENABLED(CONFIG_PCI_MSI))
-+              if (iproc_pcie_msi_enable(pcie))
-+                      dev_info(pcie->dev, "not using iProc MSI\n");
-+
-       pci_scan_child_bus(bus);
-       pci_assign_unassigned_bus_resources(bus);
-       pci_fixup_irqs(pci_common_swizzle, pcie->map_irq);
-@@ -530,6 +554,8 @@ int iproc_pcie_remove(struct iproc_pcie
-       pci_stop_root_bus(pcie->root_bus);
-       pci_remove_root_bus(pcie->root_bus);
-+      iproc_pcie_msi_disable(pcie);
-+
-       phy_power_off(pcie->phy);
-       phy_exit(pcie->phy);
---- a/drivers/pci/host/pcie-iproc.h
-+++ b/drivers/pci/host/pcie-iproc.h
-@@ -41,6 +41,8 @@ struct iproc_pcie_ob {
-       resource_size_t window_size;
- };
-+struct iproc_msi;
-+
- /**
-  * iProc PCIe device
-  *
-@@ -48,19 +50,21 @@ struct iproc_pcie_ob {
-  * @type: iProc PCIe interface type
-  * @reg_offsets: register offsets
-  * @base: PCIe host controller I/O register base
-+ * @base_addr: PCIe host controller register base physical address
-  * @sysdata: Per PCI controller data (ARM-specific)
-  * @root_bus: pointer to root bus
-  * @phy: optional PHY device that controls the Serdes
-- * @irqs: interrupt IDs
-  * @map_irq: function callback to map interrupts
-- * @need_ob_cfg: indidates SW needs to configure the outbound mapping window
-+ * @need_ob_cfg: indicates SW needs to configure the outbound mapping window
-  * @ob: outbound mapping parameters
-+ * @msi: MSI data
-  */
- struct iproc_pcie {
-       struct device *dev;
-       enum iproc_pcie_type type;
-       const u16 *reg_offsets;
-       void __iomem *base;
-+      phys_addr_t base_addr;
- #ifdef CONFIG_ARM
-       struct pci_sys_data sysdata;
- #endif
-@@ -69,9 +73,24 @@ struct iproc_pcie {
-       int (*map_irq)(const struct pci_dev *, u8, u8);
-       bool need_ob_cfg;
-       struct iproc_pcie_ob ob;
-+      struct iproc_msi *msi;
- };
- int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res);
- int iproc_pcie_remove(struct iproc_pcie *pcie);
-+#ifdef CONFIG_PCIE_IPROC_MSI
-+int iproc_msi_init(struct iproc_pcie *pcie, struct device_node *node);
-+void iproc_msi_exit(struct iproc_pcie *pcie);
-+#else
-+static inline int iproc_msi_init(struct iproc_pcie *pcie,
-+                               struct device_node *node)
-+{
-+      return -ENODEV;
-+}
-+static inline void iproc_msi_exit(struct iproc_pcie *pcie)
-+{
-+}
-+#endif
-+
- #endif /* _PCIE_IPROC_H */
diff --git a/target/linux/bcm53xx/patches-4.1/041-PCI-iproc-Allow-multiple-devices-except-on-PAXC.patch b/target/linux/bcm53xx/patches-4.1/041-PCI-iproc-Allow-multiple-devices-except-on-PAXC.patch
deleted file mode 100644 (file)
index 1955c01..0000000
+++ /dev/null
@@ -1,83 +0,0 @@
-From 46560388c476c8471fde7712c10f9fad8d0d1875 Mon Sep 17 00:00:00 2001
-From: Ray Jui <rjui@broadcom.com>
-Date: Wed, 27 Jan 2016 16:52:24 -0600
-Subject: [PATCH] PCI: iproc: Allow multiple devices except on PAXC
-
-Commit 943ebae781f5 ("PCI: iproc: Add PAXC interface support") only allowed
-device 0, which is a regression on BCMA-based platforms.
-
-All systems support only one device, a Root Port at 00:00.0, on the root
-bus.  PAXC-based systems support only the Root Port (00:00.0) and a single
-device (with multiple functions) below it, e.g., 01:00.0, 01:00.1, etc.
-Non-PAXC systems support arbitrary devices below the Root Port.
-
-[bhelgaas: changelog, fold in removal of MAX_NUM_PAXC_PF check]
-Fixes: 943ebae781f5 ("PCI: iproc: Add PAXC interface support")
-Reported-by: Rafal Milecki <zajec5@gmail.com>
-Signed-off-by: Ray Jui <rjui@broadcom.com>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
----
- drivers/pci/host/pcie-iproc.c | 29 +++++++++++------------------
- 1 file changed, 11 insertions(+), 18 deletions(-)
-
---- a/drivers/pci/host/pcie-iproc.c
-+++ b/drivers/pci/host/pcie-iproc.c
-@@ -64,7 +64,6 @@
- #define OARR_SIZE_CFG                BIT(OARR_SIZE_CFG_SHIFT)
- #define MAX_NUM_OB_WINDOWS           2
--#define MAX_NUM_PAXC_PF              4
- #define IPROC_PCIE_REG_INVALID 0xffff
-@@ -170,20 +169,6 @@ static inline void iproc_pcie_ob_write(struct iproc_pcie *pcie,
-       writel(val, pcie->base + offset + (window * 8));
- }
--static inline bool iproc_pcie_device_is_valid(struct iproc_pcie *pcie,
--                                            unsigned int slot,
--                                            unsigned int fn)
--{
--      if (slot > 0)
--              return false;
--
--      /* PAXC can only support limited number of functions */
--      if (pcie->type == IPROC_PCIE_PAXC && fn >= MAX_NUM_PAXC_PF)
--              return false;
--
--      return true;
--}
--
- /**
-  * Note access to the configuration registers are protected at the higher layer
-  * by 'pci_lock' in drivers/pci/access.c
-@@ -199,11 +184,11 @@ static void __iomem *iproc_pcie_map_cfg_bus(struct pci_bus *bus,
-       u32 val;
-       u16 offset;
--      if (!iproc_pcie_device_is_valid(pcie, slot, fn))
--              return NULL;
--
-       /* root complex access */
-       if (busno == 0) {
-+              if (slot > 0 || fn > 0)
-+                      return NULL;
-+
-               iproc_pcie_write_reg(pcie, IPROC_PCIE_CFG_IND_ADDR,
-                                    where & CFG_IND_ADDR_MASK);
-               offset = iproc_pcie_reg_offset(pcie, IPROC_PCIE_CFG_IND_DATA);
-@@ -213,6 +198,14 @@ static void __iomem *iproc_pcie_map_cfg_bus(struct pci_bus *bus,
-                       return (pcie->base + offset);
-       }
-+      /*
-+       * PAXC is connected to an internally emulated EP within the SoC.  It
-+       * allows only one device.
-+       */
-+      if (pcie->type == IPROC_PCIE_PAXC)
-+              if (slot > 0)
-+                      return NULL;
-+
-       /* EP device access */
-       val = (busno << CFG_ADDR_BUS_NUM_SHIFT) |
-               (slot << CFG_ADDR_DEV_NUM_SHIFT) |
diff --git a/target/linux/bcm53xx/patches-4.1/058-ARM-BCM5301X-Add-USB-LED-for-Buffalo-WZR-1750DHP.patch b/target/linux/bcm53xx/patches-4.1/058-ARM-BCM5301X-Add-USB-LED-for-Buffalo-WZR-1750DHP.patch
deleted file mode 100644 (file)
index 290ea0a..0000000
+++ /dev/null
@@ -1,26 +0,0 @@
-From 35ad0e50bd6683c6699586e3bd5045f0695586d9 Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@openwrt.org>
-Date: Wed, 13 May 2015 09:10:51 +0200
-Subject: [PATCH] ARM: BCM5301X: Add USB LED for Buffalo WZR-1750DHP
-
-Signed-off-by: Felix Fietkau <nbd@openwrt.org>
-Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
----
- arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts | 6 ++++++
- 1 file changed, 6 insertions(+)
-
---- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
-+++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
-@@ -47,6 +47,12 @@
-       leds {
-               compatible = "gpio-leds";
-+              usb {
-+                      label = "bcm53xx:blue:usb";
-+                      gpios = <&hc595 0 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-               power0 {
-                       label = "bcm53xx:red:power";
-                       gpios = <&hc595 1 GPIO_ACTIVE_HIGH>;
diff --git a/target/linux/bcm53xx/patches-4.1/059-ARM-BCM5301X-Add-DT-for-Buffalo-WXR-1900DHP.patch b/target/linux/bcm53xx/patches-4.1/059-ARM-BCM5301X-Add-DT-for-Buffalo-WXR-1900DHP.patch
deleted file mode 100644 (file)
index e16d39b..0000000
+++ /dev/null
@@ -1,157 +0,0 @@
-From 35eecd10ee57b9d4f31e12598296b235ed2b34ae Mon Sep 17 00:00:00 2001
-From: Felix Fietkau <nbd@openwrt.org>
-Date: Wed, 13 May 2015 09:10:52 +0200
-Subject: [PATCH] ARM: BCM5301X: Add DT for Buffalo WXR-1900DHP
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Felix Fietkau <nbd@openwrt.org>
-Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
-Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
----
- arch/arm/boot/dts/Makefile                        |   1 +
- arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts | 127 ++++++++++++++++++++++
- 2 files changed, 128 insertions(+)
- create mode 100644 arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts
-
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -63,6 +63,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
-       bcm47081-asus-rt-n18u.dtb \
-       bcm47081-buffalo-wzr-600dhp2.dtb \
-       bcm47081-buffalo-wzr-900dhp.dtb \
-+      bcm4709-buffalo-wxr-1900dhp.dtb \
-       bcm4709-netgear-r8000.dtb
- dtb-$(CONFIG_ARCH_BCM_63XX) += \
-       bcm963138dvt.dtb
---- /dev/null
-+++ b/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts
-@@ -0,0 +1,127 @@
-+/*
-+ * Broadcom BCM470X / BCM5301X ARM platform code.
-+ * DTS for Buffalo WXR-1900DHP
-+ *
-+ * Copyright (C) 2015 Felix Fietkau <nbd@openwrt.org>
-+ *
-+ * Licensed under the GNU/GPL. See COPYING for details.
-+ */
-+
-+/dts-v1/;
-+
-+#include "bcm4708.dtsi"
-+
-+/ {
-+      compatible = "buffalo,wxr-1900dhp", "brcm,bcm4709", "brcm,bcm4708";
-+      model = "Buffalo WXR-1900DHP";
-+
-+      chosen {
-+              bootargs = "console=ttyS0,115200";
-+      };
-+
-+      memory {
-+              reg = <0x00000000 0x08000000>;
-+      };
-+
-+      leds {
-+              compatible = "gpio-leds";
-+
-+              usb {
-+                      label = "bcm53xx:green:usb";
-+                      gpios = <&chipcommon 4 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              power-amber {
-+                      label = "bcm53xx:amber:power";
-+                      gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              power-white {
-+                      label = "bcm53xx:white:power";
-+                      gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "default-on";
-+              };
-+
-+              router-amber {
-+                      label = "bcm53xx:amber:router";
-+                      gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              router-white {
-+                      label = "bcm53xx:white:router";
-+                      gpios = <&chipcommon 8 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              wan-amber {
-+                      label = "bcm53xx:amber:wan";
-+                      gpios = <&chipcommon 9 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              wan-white {
-+                      label = "bcm53xx:white:wan";
-+                      gpios = <&chipcommon 10 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              wireless-amber {
-+                      label = "bcm53xx:amber:wireless";
-+                      gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              wireless-white {
-+                      label = "bcm53xx:white:wireless";
-+                      gpios = <&chipcommon 12 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "default-off";
-+              };
-+      };
-+
-+      gpio-keys {
-+              compatible = "gpio-keys";
-+              #address-cells = <1>;
-+              #size-cells = <0>;
-+
-+              power {
-+                      label = "Power";
-+                      linux,code = <KEY_POWER>;
-+                      gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>;
-+              };
-+
-+              restart {
-+                      label = "Reset";
-+                      linux,code = <KEY_RESTART>;
-+                      gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>;
-+              };
-+
-+              aoss {
-+                      label = "AOSS";
-+                      linux,code = <KEY_WPS_BUTTON>;
-+                      gpios = <&chipcommon 16 GPIO_ACTIVE_LOW>;
-+              };
-+
-+              /* Commit mode set by switch? */
-+              mode {
-+                      label = "Mode";
-+                      linux,code = <KEY_SETUP>;
-+                      gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
-+              };
-+
-+              /* Switch: AP mode */
-+              sw_ap {
-+                      label = "AP";
-+                      linux,code = <BTN_0>;
-+                      gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>;
-+              };
-+
-+              eject {
-+                      label = "USB eject";
-+                      linux,code = <KEY_EJECTCD>;
-+                      gpios = <&chipcommon 20 GPIO_ACTIVE_LOW>;
-+              };
-+      };
-+};
diff --git a/target/linux/bcm53xx/patches-4.1/060-ARM-BCM5301X-Add-DT-for-SmartRG-SR400ac.patch b/target/linux/bcm53xx/patches-4.1/060-ARM-BCM5301X-Add-DT-for-SmartRG-SR400ac.patch
deleted file mode 100644 (file)
index dafae7b..0000000
+++ /dev/null
@@ -1,148 +0,0 @@
-From 691917f20cae813d242f7123a4dc97e7d48e6ff1 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
-Date: Wed, 13 May 2015 09:10:53 +0200
-Subject: [PATCH] ARM: BCM5301X: Add DT for SmartRG SR400ac
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
-Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
----
- arch/arm/boot/dts/Makefile                    |   1 +
- arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts | 119 ++++++++++++++++++++++++++
- 2 files changed, 120 insertions(+)
- create mode 100644 arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
-
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -60,6 +60,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
-       bcm4708-luxul-xwc-1000.dtb \
-       bcm4708-netgear-r6250.dtb \
-       bcm4708-netgear-r6300-v2.dtb \
-+      bcm4708-smartrg-sr400ac.dtb \
-       bcm47081-asus-rt-n18u.dtb \
-       bcm47081-buffalo-wzr-600dhp2.dtb \
-       bcm47081-buffalo-wzr-900dhp.dtb \
---- /dev/null
-+++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
-@@ -0,0 +1,119 @@
-+/*
-+ * Broadcom BCM470X / BCM5301X arm platform code.
-+ * DTS for SmartRG SR400ac
-+ *
-+ * Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com>
-+ *
-+ * Licensed under the GNU/GPL. See COPYING for details.
-+ */
-+
-+/dts-v1/;
-+
-+#include "bcm4708.dtsi"
-+
-+/ {
-+      compatible = "smartrg,sr400ac", "brcm,bcm4708";
-+      model = "SmartRG SR400ac";
-+
-+      chosen {
-+              bootargs = "console=ttyS0,115200";
-+      };
-+
-+      memory {
-+              reg = <0x00000000 0x08000000>;
-+      };
-+
-+      leds {
-+              compatible = "gpio-leds";
-+
-+              power-white {
-+                      label = "bcm53xx:white:power";
-+                      gpios = <&chipcommon 1 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "default-on";
-+              };
-+
-+              power-amber {
-+                      label = "bcm53xx:amber:power";
-+                      gpios = <&chipcommon 2 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              usb2 {
-+                      label = "bcm53xx:white:usb2";
-+                      gpios = <&chipcommon 3 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              usb3-white {
-+                      label = "bcm53xx:white:usb3";
-+                      gpios = <&chipcommon 4 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              usb3-green {
-+                      label = "bcm53xx:green:usb3";
-+                      gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              wps {
-+                      label = "bcm53xx:white:wps";
-+                      gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              status-red {
-+                      label = "bcm53xx:red:status";
-+                      gpios = <&chipcommon 8 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              status-green {
-+                      label = "bcm53xx:green:status";
-+                      gpios = <&chipcommon 9 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              status-blue {
-+                      label = "bcm53xx:blue:status";
-+                      gpios = <&chipcommon 10 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              wan-white {
-+                      label = "bcm53xx:white:wan";
-+                      gpios = <&chipcommon 12 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              wan-red {
-+                      label = "bcm53xx:red:wan";
-+                      gpios = <&chipcommon 13 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "default-off";
-+              };
-+      };
-+
-+      gpio-keys {
-+              compatible = "gpio-keys";
-+              #address-cells = <1>;
-+              #size-cells = <0>;
-+
-+              rfkill {
-+                      label = "WiFi";
-+                      linux,code = <KEY_RFKILL>;
-+                      gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>;
-+              };
-+
-+              wps {
-+                      label = "WPS";
-+                      linux,code = <KEY_WPS_BUTTON>;
-+                      gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
-+              };
-+
-+              restart {
-+                      label = "Reset";
-+                      linux,code = <KEY_RESTART>;
-+                      gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
-+              };
-+      };
-+};
diff --git a/target/linux/bcm53xx/patches-4.1/061-ARM-BCM5301X-Add-DT-for-Asus-RT-AC68U.patch b/target/linux/bcm53xx/patches-4.1/061-ARM-BCM5301X-Add-DT-for-Asus-RT-AC68U.patch
deleted file mode 100644 (file)
index 02e644e..0000000
+++ /dev/null
@@ -1,112 +0,0 @@
-From b5f350c790ae6aaf3dda5a825d7e3fdeed731164 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
-Date: Sat, 28 Mar 2015 15:01:38 +0100
-Subject: [PATCH] ARM: BCM5301X: Add DT for Asus RT-AC68U
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
-Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
----
- arch/arm/boot/dts/Makefile                  |  1 +
- arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts | 83 +++++++++++++++++++++++++++++
- 2 files changed, 84 insertions(+)
- create mode 100644 arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts
-
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -56,6 +56,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
-       bcm2835-rpi-b.dtb \
-       bcm2835-rpi-b-plus.dtb
- dtb-$(CONFIG_ARCH_BCM_5301X) += \
-+      bcm4708-asus-rt-ac68u.dtb \
-       bcm4708-buffalo-wzr-1750dhp.dtb \
-       bcm4708-luxul-xwc-1000.dtb \
-       bcm4708-netgear-r6250.dtb \
---- /dev/null
-+++ b/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts
-@@ -0,0 +1,83 @@
-+/*
-+ * Broadcom BCM470X / BCM5301X ARM platform code.
-+ * DTS for Asus RT-AC68U
-+ *
-+ * Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com>
-+ *
-+ * Licensed under the GNU/GPL. See COPYING for details.
-+ */
-+
-+/dts-v1/;
-+
-+#include "bcm4708.dtsi"
-+
-+/ {
-+      compatible = "asus,rt-ac68u", "brcm,bcm4708";
-+      model = "Asus RT-AC68U (BCM4708)";
-+
-+      chosen {
-+              bootargs = "console=ttyS0,115200";
-+      };
-+
-+      memory {
-+              reg = <0x00000000 0x08000000>;
-+      };
-+
-+      leds {
-+              compatible = "gpio-leds";
-+
-+              usb2 {
-+                      label = "bcm53xx:blue:usb2";
-+                      gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              power {
-+                      label = "bcm53xx:blue:power";
-+                      gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
-+                      linux,default-trigger = "default-on";
-+              };
-+
-+              logo {
-+                      label = "bcm53xx:white:logo";
-+                      gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>;
-+                      linux,default-trigger = "default-on";
-+              };
-+
-+              usb3 {
-+                      label = "bcm53xx:blue:usb3";
-+                      gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>;
-+                      linux,default-trigger = "default-off";
-+              };
-+      };
-+
-+      gpio-keys {
-+              compatible = "gpio-keys";
-+              #address-cells = <1>;
-+              #size-cells = <0>;
-+
-+              brightness {
-+                      label = "Backlight";
-+                      linux,code = <KEY_BRIGHTNESS_ZERO>;
-+                      gpios = <&chipcommon 5 GPIO_ACTIVE_LOW>;
-+              };
-+
-+              wps {
-+                      label = "WPS";
-+                      linux,code = <KEY_WPS_BUTTON>;
-+                      gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
-+              };
-+
-+              restart {
-+                      label = "Reset";
-+                      linux,code = <KEY_RESTART>;
-+                      gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
-+              };
-+
-+              rfkill {
-+                      label = "WiFi";
-+                      linux,code = <KEY_RFKILL>;
-+                      gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>;
-+              };
-+      };
-+};
diff --git a/target/linux/bcm53xx/patches-4.1/062-ARM-BCM5301X-Add-DT-for-Asus-RT-AC56U.patch b/target/linux/bcm53xx/patches-4.1/062-ARM-BCM5301X-Add-DT-for-Asus-RT-AC56U.patch
deleted file mode 100644 (file)
index e72835b..0000000
+++ /dev/null
@@ -1,125 +0,0 @@
-From 16dc3bac722252a10e396546f44135ae1b6a7ff3 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
-Date: Tue, 31 Mar 2015 17:29:18 +0200
-Subject: [PATCH] ARM: BCM5301X: Add DT for Asus RT-AC56U
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
-Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
----
- arch/arm/boot/dts/Makefile                  |  1 +
- arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts | 96 +++++++++++++++++++++++++++++
- 2 files changed, 97 insertions(+)
- create mode 100644 arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts
-
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -56,6 +56,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
-       bcm2835-rpi-b.dtb \
-       bcm2835-rpi-b-plus.dtb
- dtb-$(CONFIG_ARCH_BCM_5301X) += \
-+      bcm4708-asus-rt-ac56u.dtb \
-       bcm4708-asus-rt-ac68u.dtb \
-       bcm4708-buffalo-wzr-1750dhp.dtb \
-       bcm4708-luxul-xwc-1000.dtb \
---- /dev/null
-+++ b/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts
-@@ -0,0 +1,96 @@
-+/*
-+ * Broadcom BCM470X / BCM5301X ARM platform code.
-+ * DTS for Asus RT-AC56U
-+ *
-+ * Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com>
-+ *
-+ * Licensed under the GNU/GPL. See COPYING for details.
-+ */
-+
-+/dts-v1/;
-+
-+#include "bcm4708.dtsi"
-+
-+/ {
-+      compatible = "asus,rt-ac56u", "brcm,bcm4708";
-+      model = "Asus RT-AC56U (BCM4708)";
-+
-+      chosen {
-+              bootargs = "console=ttyS0,115200";
-+      };
-+
-+      memory {
-+              reg = <0x00000000 0x08000000>;
-+      };
-+
-+      leds {
-+              compatible = "gpio-leds";
-+
-+              usb3 {
-+                      label = "bcm53xx:blue:usb3";
-+                      gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              wan {
-+                      label = "bcm53xx:blue:wan";
-+                      gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              lan {
-+                      label = "bcm53xx:blue:lan";
-+                      gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              power {
-+                      label = "bcm53xx:blue:power";
-+                      gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
-+                      linux,default-trigger = "default-on";
-+              };
-+
-+              all {
-+                      label = "bcm53xx:blue:all";
-+                      gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>;
-+                      linux,default-trigger = "default-on";
-+              };
-+
-+              2ghz {
-+                      label = "bcm53xx:blue:2ghz";
-+                      gpios = <&chipcommon 6 GPIO_ACTIVE_LOW>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+
-+              usb2 {
-+                      label = "bcm53xx:blue:usb2";
-+                      gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>;
-+                      linux,default-trigger = "default-off";
-+              };
-+      };
-+
-+      gpio-keys {
-+              compatible = "gpio-keys";
-+              #address-cells = <1>;
-+              #size-cells = <0>;
-+
-+              rfkill {
-+                      label = "WiFi";
-+                      linux,code = <KEY_RFKILL>;
-+                      gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
-+              };
-+
-+              restart {
-+                      label = "Reset";
-+                      linux,code = <KEY_RESTART>;
-+                      gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
-+              };
-+
-+              wps {
-+                      label = "WPS";
-+                      linux,code = <KEY_WPS_BUTTON>;
-+                      gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>;
-+              };
-+      };
-+};
diff --git a/target/linux/bcm53xx/patches-4.1/063-ARM-BCM5301X-Ignore-another-BCM4709-specific-fault-c.patch b/target/linux/bcm53xx/patches-4.1/063-ARM-BCM5301X-Ignore-another-BCM4709-specific-fault-c.patch
deleted file mode 100644 (file)
index 8716a0d..0000000
+++ /dev/null
@@ -1,41 +0,0 @@
-From 7eb68a2a0519a77b93184c695d4d293c92dc2286 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
-Date: Wed, 11 Feb 2015 16:40:58 +0100
-Subject: [PATCH] ARM: BCM5301X: Ignore another (BCM4709 specific) fault code
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Broadcom ARM devices seem to generate some fault once per boot. We
-already have an ignoring handler for BCM4707/BCM4708, but BCM4709
-generates different code.
-
-Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
-Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
----
- arch/arm/mach-bcm/bcm_5301x.c | 9 +++++----
- 1 file changed, 5 insertions(+), 4 deletions(-)
-
---- a/arch/arm/mach-bcm/bcm_5301x.c
-+++ b/arch/arm/mach-bcm/bcm_5301x.c
-@@ -18,15 +18,16 @@ static bool first_fault = true;
- static int bcm5301x_abort_handler(unsigned long addr, unsigned int fsr,
-                                struct pt_regs *regs)
- {
--      if (fsr == 0x1c06 && first_fault) {
-+      if ((fsr == 0x1406 || fsr == 0x1c06) && first_fault) {
-               first_fault = false;
-               /*
--               * These faults with code 0x1c06 happens for no good reason,
--               * possibly left over from the CFE boot loader.
-+               * These faults with codes 0x1406 (BCM4709) or 0x1c06 happens
-+               * for no good reason, possibly left over from the CFE boot
-+               * loader.
-                */
-               pr_warn("External imprecise Data abort at addr=%#lx, fsr=%#x ignored.\n",
--              addr, fsr);
-+                      addr, fsr);
-               /* Returning non-zero causes fault display and panic */
-               return 0;
diff --git a/target/linux/bcm53xx/patches-4.1/064-ARM-BCM5301X-add-NAND-flash-chip-description.patch b/target/linux/bcm53xx/patches-4.1/064-ARM-BCM5301X-add-NAND-flash-chip-description.patch
deleted file mode 100644 (file)
index aa99f37..0000000
+++ /dev/null
@@ -1,210 +0,0 @@
-From 9faa5960eef3204cae6637b530f5e23e53b5a9ef Mon Sep 17 00:00:00 2001
-From: Hauke Mehrtens <hauke@hauke-m.de>
-Date: Fri, 29 May 2015 23:39:47 +0200
-Subject: [PATCH] ARM: BCM5301X: add NAND flash chip description
-
-This adds the NAND flash chip description for a standard chip found
-connected to this SoC. This makes use of generic Broadcom NAND driver
-with the iProc interface.
-
-Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
-Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
----
- arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts        |  1 +
- arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts        |  1 +
- arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts  |  1 +
- arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts       |  9 +++-----
- arch/arm/boot/dts/bcm4708-netgear-r6250.dts        |  1 +
- arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts     |  1 +
- arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts      |  1 +
- arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts        |  1 +
- arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts |  1 +
- arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts  |  1 +
- arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts  |  1 +
- arch/arm/boot/dts/bcm4709-netgear-r8000.dts        |  1 +
- arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi      | 24 ++++++++++++++++++++++
- arch/arm/boot/dts/bcm5301x.dtsi                    | 12 +++++++++++
- 14 files changed, 50 insertions(+), 6 deletions(-)
- create mode 100644 arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi
-
---- a/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts
-+++ b/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts
-@@ -10,6 +10,7 @@
- /dts-v1/;
- #include "bcm4708.dtsi"
-+#include "bcm5301x-nand-cs0-bch8.dtsi"
- / {
-       compatible = "asus,rt-ac56u", "brcm,bcm4708";
---- a/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts
-+++ b/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts
-@@ -10,6 +10,7 @@
- /dts-v1/;
- #include "bcm4708.dtsi"
-+#include "bcm5301x-nand-cs0-bch8.dtsi"
- / {
-       compatible = "asus,rt-ac68u", "brcm,bcm4708";
---- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
-+++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
-@@ -10,6 +10,7 @@
- /dts-v1/;
- #include "bcm4708.dtsi"
-+#include "bcm5301x-nand-cs0-bch8.dtsi"
- / {
-       compatible = "buffalo,wzr-1750dhp", "brcm,bcm4708";
---- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
-+++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
-@@ -10,6 +10,7 @@
- /dts-v1/;
- #include "bcm4708.dtsi"
-+#include "bcm5301x-nand-cs0-bch8.dtsi"
- / {
-       compatible = "luxul,xwc-1000", "brcm,bcm4708";
-@@ -23,12 +24,8 @@
-               reg = <0x00000000 0x08000000>;
-       };
--      axi@18000000 {
--              nand@28000 {
--                      reg = <0x00028000 0x1000>;
--                      #address-cells = <1>;
--                      #size-cells = <1>;
--
-+      nand: nand@18028000 {
-+              nandcs@0 {
-                       partition@0 {
-                               label = "ubi";
-                               reg = <0x00000000 0x08000000>;
---- a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
-+++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
-@@ -10,6 +10,7 @@
- /dts-v1/;
- #include "bcm4708.dtsi"
-+#include "bcm5301x-nand-cs0-bch8.dtsi"
- / {
-       compatible = "netgear,r6250v1", "brcm,bcm4708";
---- a/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts
-+++ b/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts
-@@ -10,6 +10,7 @@
- /dts-v1/;
- #include "bcm4708.dtsi"
-+#include "bcm5301x-nand-cs0-bch8.dtsi"
- / {
-       compatible = "netgear,r6300v2", "brcm,bcm4708";
---- a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
-+++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
-@@ -10,6 +10,7 @@
- /dts-v1/;
- #include "bcm4708.dtsi"
-+#include "bcm5301x-nand-cs0-bch8.dtsi"
- / {
-       compatible = "smartrg,sr400ac", "brcm,bcm4708";
---- a/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts
-+++ b/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts
-@@ -10,6 +10,7 @@
- /dts-v1/;
- #include "bcm47081.dtsi"
-+#include "bcm5301x-nand-cs0-bch8.dtsi"
- / {
-       compatible = "asus,rt-n18u", "brcm,bcm47081", "brcm,bcm4708";
---- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
-+++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
-@@ -10,6 +10,7 @@
- /dts-v1/;
- #include "bcm47081.dtsi"
-+#include "bcm5301x-nand-cs0-bch8.dtsi"
- / {
-       compatible = "buffalo,wzr-600dhp2", "brcm,bcm47081", "brcm,bcm4708";
---- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts
-+++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts
-@@ -10,6 +10,7 @@
- /dts-v1/;
- #include "bcm47081.dtsi"
-+#include "bcm5301x-nand-cs0-bch8.dtsi"
- / {
-       compatible = "buffalo,wzr-900dhp", "brcm,bcm47081", "brcm,bcm4708";
---- a/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts
-+++ b/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts
-@@ -10,6 +10,7 @@
- /dts-v1/;
- #include "bcm4708.dtsi"
-+#include "bcm5301x-nand-cs0-bch8.dtsi"
- / {
-       compatible = "buffalo,wxr-1900dhp", "brcm,bcm4709", "brcm,bcm4708";
---- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
-+++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
-@@ -10,6 +10,7 @@
- /dts-v1/;
- #include "bcm4708.dtsi"
-+#include "bcm5301x-nand-cs0-bch8.dtsi"
- / {
-       compatible = "netgear,r8000", "brcm,bcm4709", "brcm,bcm4708";
---- /dev/null
-+++ b/arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi
-@@ -0,0 +1,24 @@
-+/*
-+ * Broadcom BCM470X / BCM5301X Nand chip defaults.
-+ *
-+ * This should be included if the NAND controller is on chip select 0
-+ * and uses 8 bit ECC.
-+ *
-+ * Copyright (C) 2015 Hauke Mehrtens <hauke@hauke-m.de>
-+ *
-+ * Licensed under the GNU/GPL. See COPYING for details.
-+ */
-+
-+/ {
-+      nand@18028000 {
-+              nandcs@0 {
-+                      compatible = "brcm,nandcs";
-+                      reg = <0>;
-+                      #address-cells = <1>;
-+                      #size-cells = <1>;
-+
-+                      nand-ecc-strength = <8>;
-+                      nand-ecc-step-size = <512>;
-+              };
-+      };
-+};
---- a/arch/arm/boot/dts/bcm5301x.dtsi
-+++ b/arch/arm/boot/dts/bcm5301x.dtsi
-@@ -143,4 +143,16 @@
-                       #gpio-cells = <2>;
-               };
-       };
-+
-+      nand: nand@18028000 {
-+              compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
-+              reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;
-+              reg-names = "nand", "iproc-idm", "iproc-ext";
-+              interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
-+
-+              #address-cells = <1>;
-+              #size-cells = <0>;
-+
-+              brcm,nand-has-wp;
-+      };
- };
diff --git a/target/linux/bcm53xx/patches-4.1/065-ARM-BCM5301X-add-IRQ-numbers-for-PCIe-controller.patch b/target/linux/bcm53xx/patches-4.1/065-ARM-BCM5301X-add-IRQ-numbers-for-PCIe-controller.patch
deleted file mode 100644 (file)
index 1422115..0000000
+++ /dev/null
@@ -1,48 +0,0 @@
-From 1f80de6863ca0e36cabc622e858168fe5beb1e92 Mon Sep 17 00:00:00 2001
-From: Hauke Mehrtens <hauke@hauke-m.de>
-Date: Sun, 24 May 2015 21:08:14 +0200
-Subject: [PATCH] ARM: BCM5301X: add IRQ numbers for PCIe controller
-
-The driver for the PCIe controller was just added, this adds the
-missing definition of the IRQ numbers to device tree. The driver itself
-will be automatically detected by bcma.
-
-Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
-Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
----
- arch/arm/boot/dts/bcm5301x.dtsi | 24 ++++++++++++++++++++++++
- 1 file changed, 24 insertions(+)
-
---- a/arch/arm/boot/dts/bcm5301x.dtsi
-+++ b/arch/arm/boot/dts/bcm5301x.dtsi
-@@ -108,6 +108,30 @@
-                       /* ChipCommon */
-                       <0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
-+                      /* PCIe Controller 0 */
-+                      <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
-+                      <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
-+                      <0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
-+                      <0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
-+                      <0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
-+                      <0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
-+
-+                      /* PCIe Controller 1 */
-+                      <0x00013000 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
-+                      <0x00013000 1 &gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
-+                      <0x00013000 2 &gic GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
-+                      <0x00013000 3 &gic GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
-+                      <0x00013000 4 &gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
-+                      <0x00013000 5 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
-+
-+                      /* PCIe Controller 2 */
-+                      <0x00014000 0 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
-+                      <0x00014000 1 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
-+                      <0x00014000 2 &gic GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
-+                      <0x00014000 3 &gic GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
-+                      <0x00014000 4 &gic GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
-+                      <0x00014000 5 &gic GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
-+
-                       /* USB 2.0 Controller */
-                       <0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
diff --git a/target/linux/bcm53xx/patches-4.1/066-ARM-BCM5301X-Add-DT-for-Asus-RT-AC87U.patch b/target/linux/bcm53xx/patches-4.1/066-ARM-BCM5301X-Add-DT-for-Asus-RT-AC87U.patch
deleted file mode 100644 (file)
index 5790c9a..0000000
+++ /dev/null
@@ -1,95 +0,0 @@
-From 26343bdacfcdbf6ee3303d6078a015b908f90193 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
-Date: Sat, 16 May 2015 16:55:39 +0200
-Subject: [PATCH] ARM: BCM5301X: Add DT for Asus RT-AC87U
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
-Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
-Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
----
- arch/arm/boot/dts/Makefile                  |  1 +
- arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts | 65 +++++++++++++++++++++++++++++
- 2 files changed, 66 insertions(+)
- create mode 100644 arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
-
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -66,6 +66,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
-       bcm47081-asus-rt-n18u.dtb \
-       bcm47081-buffalo-wzr-600dhp2.dtb \
-       bcm47081-buffalo-wzr-900dhp.dtb \
-+      bcm4709-asus-rt-ac87u.dtb \
-       bcm4709-buffalo-wxr-1900dhp.dtb \
-       bcm4709-netgear-r8000.dtb
- dtb-$(CONFIG_ARCH_BCM_63XX) += \
---- /dev/null
-+++ b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
-@@ -0,0 +1,65 @@
-+/*
-+ * Broadcom BCM470X / BCM5301X ARM platform code.
-+ * DTS for Asus RT-AC87U
-+ *
-+ * Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com>
-+ *
-+ * Licensed under the GNU/GPL. See COPYING for details.
-+ */
-+
-+/dts-v1/;
-+
-+#include "bcm4708.dtsi"
-+
-+/ {
-+      compatible = "asus,rt-ac87u", "brcm,bcm4709", "brcm,bcm4708";
-+      model = "Asus RT-AC87U";
-+
-+      chosen {
-+              bootargs = "console=ttyS0,115200";
-+      };
-+
-+      memory {
-+              reg = <0x00000000 0x08000000>;
-+      };
-+
-+      leds {
-+              compatible = "gpio-leds";
-+
-+              wps {
-+                      label = "bcm53xx:blue:wps";
-+                      gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              power {
-+                      label = "bcm53xx:blue:power";
-+                      gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
-+                      linux,default-trigger = "default-on";
-+              };
-+
-+              wan {
-+                      label = "bcm53xx:red:wan";
-+                      gpios = <&chipcommon 5 GPIO_ACTIVE_LOW>;
-+                      linux,default-trigger = "default-off";
-+              };
-+      };
-+
-+      gpio-keys {
-+              compatible = "gpio-keys";
-+              #address-cells = <1>;
-+              #size-cells = <0>;
-+
-+              wps {
-+                      label = "WPS";
-+                      linux,code = <KEY_WPS_BUTTON>;
-+                      gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>;
-+              };
-+
-+              restart {
-+                      label = "Reset";
-+                      linux,code = <KEY_RESTART>;
-+                      gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
-+              };
-+      };
-+};
diff --git a/target/linux/bcm53xx/patches-4.1/067-ARM-BCM5301X-add-NAND-flash-chip-description-for-Asu.patch b/target/linux/bcm53xx/patches-4.1/067-ARM-BCM5301X-add-NAND-flash-chip-description-for-Asu.patch
deleted file mode 100644 (file)
index ccb8e27..0000000
+++ /dev/null
@@ -1,32 +0,0 @@
-From af8fe7176ec13de08b1bfb7ea2ae9cc147b2429a Mon Sep 17 00:00:00 2001
-From: Hauke Mehrtens <hauke@hauke-m.de>
-Date: Sat, 12 Sep 2015 12:56:37 +0200
-Subject: [PATCH] ARM: BCM5301X: add NAND flash chip description for Asus
- RT-AC87U
-
-The NAND flash chip description were not imported for the Asus RT-AC87U
-dts file when this was done for all the other dts files, because these
-patches were send in parallel.
-
-This adds a missing NAND flash chip description to this patch:
-commit 9faa5960eef3204cae6637b530f5e23e53b5a9ef
-Author: Hauke Mehrtens <hauke@hauke-m.de>
-Date: Fri May 29 23:39:47 2015 +0200
-
-ARM: BCM5301X: add NAND flash chip description
-
-Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
----
- arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
-+++ b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
-@@ -10,6 +10,7 @@
- /dts-v1/;
- #include "bcm4708.dtsi"
-+#include "bcm5301x-nand-cs0-bch8.dtsi"
- / {
-       compatible = "asus,rt-ac87u", "brcm,bcm4709", "brcm,bcm4708";
diff --git a/target/linux/bcm53xx/patches-4.1/070-ARM-l2c-restore-the-behaviour-documented-above-l2c_e.patch b/target/linux/bcm53xx/patches-4.1/070-ARM-l2c-restore-the-behaviour-documented-above-l2c_e.patch
deleted file mode 100644 (file)
index abee99d..0000000
+++ /dev/null
@@ -1,43 +0,0 @@
-From d965b0fca7dcde3f82c982e0bf1631069fdeb8c9 Mon Sep 17 00:00:00 2001
-From: Russell King <rmk+kernel@arm.linux.org.uk>
-Date: Fri, 15 May 2015 11:56:45 +0100
-Subject: [PATCH 70/74] ARM: l2c: restore the behaviour documented above
- l2c_enable()
-
-l2c_enable() is documented that it must not be called if the cache has
-already been enabled.  Unfortunately, commit 6b49241ac252 ("ARM: 8259/1:
-l2c: Refactor the driver to use commit-like interface") changed this
-without updating the comment, for very little reason.  Revert this
-change and restore the expected behaviour.
-
-Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
----
- arch/arm/mm/cache-l2x0.c | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
---- a/arch/arm/mm/cache-l2x0.c
-+++ b/arch/arm/mm/cache-l2x0.c
-@@ -129,10 +129,6 @@ static void l2c_enable(void __iomem *bas
- {
-       unsigned long flags;
--      /* Do not touch the controller if already enabled. */
--      if (readl_relaxed(base + L2X0_CTRL) & L2X0_CTRL_EN)
--              return;
--
-       l2x0_saved_regs.aux_ctrl = aux;
-       l2c_configure(base);
-@@ -163,7 +159,11 @@ static void l2c_save(void __iomem *base)
- static void l2c_resume(void)
- {
--      l2c_enable(l2x0_base, l2x0_saved_regs.aux_ctrl, l2x0_data->num_lock);
-+      void __iomem *base = l2x0_base;
-+
-+      /* Do not touch the controller if already enabled. */
-+      if (!(readl_relaxed(base + L2X0_CTRL) & L2X0_CTRL_EN))
-+              l2c_enable(base, l2x0_saved_regs.aux_ctrl, l2x0_data->num_lock);
- }
- /*
diff --git a/target/linux/bcm53xx/patches-4.1/071-ARM-l2c-write-auxiliary-control-register-first.patch b/target/linux/bcm53xx/patches-4.1/071-ARM-l2c-write-auxiliary-control-register-first.patch
deleted file mode 100644 (file)
index a9cca83..0000000
+++ /dev/null
@@ -1,30 +0,0 @@
-From 7705dd256ce363f8b01429efb2f0dc4d1ee23c89 Mon Sep 17 00:00:00 2001
-From: Russell King <rmk+kernel@arm.linux.org.uk>
-Date: Fri, 15 May 2015 11:07:14 +0100
-Subject: [PATCH 71/74] ARM: l2c: write auxiliary control register first
-
-Before calling the controller specific configuration function, write
-the auxiliary control register first, so that bits shared with other
-registers (such as the prefetch control register) are not overwritten
-by the later write to the auxctrl register.
-
-Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
----
- arch/arm/mm/cache-l2x0.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/arch/arm/mm/cache-l2x0.c
-+++ b/arch/arm/mm/cache-l2x0.c
-@@ -115,10 +115,10 @@ static void l2c_configure(void __iomem *
-               return;
-       }
-+      l2c_write_sec(l2x0_saved_regs.aux_ctrl, base, L2X0_AUX_CTRL);
-+
-       if (l2x0_data->configure)
-               l2x0_data->configure(base);
--
--      l2c_write_sec(l2x0_saved_regs.aux_ctrl, base, L2X0_AUX_CTRL);
- }
- /*
diff --git a/target/linux/bcm53xx/patches-4.1/072-ARM-l2c-clean-up-l2c_configure.patch b/target/linux/bcm53xx/patches-4.1/072-ARM-l2c-clean-up-l2c_configure.patch
deleted file mode 100644 (file)
index 72e9e76..0000000
+++ /dev/null
@@ -1,109 +0,0 @@
-From 50beefde30224888d6d63224405ace4bdd4b32a0 Mon Sep 17 00:00:00 2001
-From: Russell King <rmk+kernel@arm.linux.org.uk>
-Date: Fri, 15 May 2015 11:05:54 +0100
-Subject: [PATCH 72/74] ARM: l2c: clean up l2c_configure()
-
-l2c_configure() does not follow the pattern of other l2c_* functions.
-Fix this so that it does to avoid future confusion.
-
-Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
----
- arch/arm/mm/cache-l2x0.c | 23 ++++++++++++++---------
- 1 file changed, 14 insertions(+), 9 deletions(-)
-
---- a/arch/arm/mm/cache-l2x0.c
-+++ b/arch/arm/mm/cache-l2x0.c
-@@ -110,15 +110,7 @@ static inline void l2c_unlock(void __iom
- static void l2c_configure(void __iomem *base)
- {
--      if (outer_cache.configure) {
--              outer_cache.configure(&l2x0_saved_regs);
--              return;
--      }
--
-       l2c_write_sec(l2x0_saved_regs.aux_ctrl, base, L2X0_AUX_CTRL);
--
--      if (l2x0_data->configure)
--              l2x0_data->configure(base);
- }
- /*
-@@ -130,7 +122,11 @@ static void l2c_enable(void __iomem *bas
-       unsigned long flags;
-       l2x0_saved_regs.aux_ctrl = aux;
--      l2c_configure(base);
-+
-+      if (outer_cache.configure)
-+              outer_cache.configure(&l2x0_saved_regs);
-+      else
-+              l2x0_data->configure(base);
-       l2c_unlock(base, num_lock);
-@@ -252,6 +248,7 @@ static const struct l2c_init_data l2c210
-       .num_lock = 1,
-       .enable = l2c_enable,
-       .save = l2c_save,
-+      .configure = l2c_configure,
-       .outer_cache = {
-               .inv_range = l2c210_inv_range,
-               .clean_range = l2c210_clean_range,
-@@ -409,6 +406,7 @@ static const struct l2c_init_data l2c220
-       .num_lock = 1,
-       .enable = l2c220_enable,
-       .save = l2c_save,
-+      .configure = l2c_configure,
-       .outer_cache = {
-               .inv_range = l2c220_inv_range,
-               .clean_range = l2c220_clean_range,
-@@ -569,6 +567,8 @@ static void l2c310_configure(void __iome
- {
-       unsigned revision;
-+      l2c_configure(base);
-+
-       /* restore pl310 setup */
-       l2c_write_sec(l2x0_saved_regs.tag_latency, base,
-                     L310_TAG_LATENCY_CTRL);
-@@ -1066,6 +1066,7 @@ static const struct l2c_init_data of_l2c
-       .of_parse = l2x0_of_parse,
-       .enable = l2c_enable,
-       .save = l2c_save,
-+      .configure = l2c_configure,
-       .outer_cache = {
-               .inv_range   = l2c210_inv_range,
-               .clean_range = l2c210_clean_range,
-@@ -1084,6 +1085,7 @@ static const struct l2c_init_data of_l2c
-       .of_parse = l2x0_of_parse,
-       .enable = l2c220_enable,
-       .save = l2c_save,
-+      .configure = l2c_configure,
-       .outer_cache = {
-               .inv_range   = l2c220_inv_range,
-               .clean_range = l2c220_clean_range,
-@@ -1416,6 +1418,7 @@ static const struct l2c_init_data of_aur
-       .enable = l2c_enable,
-       .fixup = aurora_fixup,
-       .save  = aurora_save,
-+      .configure = l2c_configure,
-       .outer_cache = {
-               .inv_range   = aurora_inv_range,
-               .clean_range = aurora_clean_range,
-@@ -1435,6 +1438,7 @@ static const struct l2c_init_data of_aur
-       .enable = aurora_enable_no_outer,
-       .fixup = aurora_fixup,
-       .save  = aurora_save,
-+      .configure = l2c_configure,
-       .outer_cache = {
-               .resume      = l2c_resume,
-       },
-@@ -1608,6 +1612,7 @@ static void __init tauros3_save(void __i
- static void tauros3_configure(void __iomem *base)
- {
-+      l2c_configure(base);
-       writel_relaxed(l2x0_saved_regs.aux2_ctrl,
-                      base + TAUROS3_AUX2_CTRL);
-       writel_relaxed(l2x0_saved_regs.prefetch_ctrl,
diff --git a/target/linux/bcm53xx/patches-4.1/073-ARM-l2c-only-unlock-caches-if-NS_LOCKDOWN-bit-is-set.patch b/target/linux/bcm53xx/patches-4.1/073-ARM-l2c-only-unlock-caches-if-NS_LOCKDOWN-bit-is-set.patch
deleted file mode 100644 (file)
index 852dd02..0000000
+++ /dev/null
@@ -1,149 +0,0 @@
-From e946a8cbe4a47a7c2615ffb0d45712e72c7d0f3a Mon Sep 17 00:00:00 2001
-From: Russell King <rmk+kernel@arm.linux.org.uk>
-Date: Fri, 15 May 2015 11:51:51 +0100
-Subject: [PATCH 73/74] ARM: l2c: only unlock caches if NS_LOCKDOWN bit is set
-
-Some L2C caches have a bit which allows non-secure software to control
-the cache lockdown.  Some platforms are unable to set this bit.  To
-avoid receiving an abort while trying to unlock the cache lines, check
-the state of this bit before unlocking.  We do this by providing a new
-method in the l2c_init_data to perform the unlocking.
-
-Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
----
- arch/arm/mm/cache-l2x0.c | 26 +++++++++++++++++++++++++-
- 1 file changed, 25 insertions(+), 1 deletion(-)
-
---- a/arch/arm/mm/cache-l2x0.c
-+++ b/arch/arm/mm/cache-l2x0.c
-@@ -42,6 +42,7 @@ struct l2c_init_data {
-       void (*fixup)(void __iomem *, u32, struct outer_cache_fns *);
-       void (*save)(void __iomem *);
-       void (*configure)(void __iomem *);
-+      void (*unlock)(void __iomem *, unsigned);
-       struct outer_cache_fns outer_cache;
- };
-@@ -128,7 +129,7 @@ static void l2c_enable(void __iomem *bas
-       else
-               l2x0_data->configure(base);
--      l2c_unlock(base, num_lock);
-+      l2x0_data->unlock(base, num_lock);
-       local_irq_save(flags);
-       __l2c_op_way(base + L2X0_INV_WAY);
-@@ -249,6 +250,7 @@ static const struct l2c_init_data l2c210
-       .enable = l2c_enable,
-       .save = l2c_save,
-       .configure = l2c_configure,
-+      .unlock = l2c_unlock,
-       .outer_cache = {
-               .inv_range = l2c210_inv_range,
-               .clean_range = l2c210_clean_range,
-@@ -400,6 +402,12 @@ static void l2c220_enable(void __iomem *
-       l2c_enable(base, aux, num_lock);
- }
-+static void l2c220_unlock(void __iomem *base, unsigned num_lock)
-+{
-+      if (readl_relaxed(base + L2X0_AUX_CTRL) & L220_AUX_CTRL_NS_LOCKDOWN)
-+              l2c_unlock(base, num_lock);
-+}
-+
- static const struct l2c_init_data l2c220_data = {
-       .type = "L2C-220",
-       .way_size_0 = SZ_8K,
-@@ -407,6 +415,7 @@ static const struct l2c_init_data l2c220
-       .enable = l2c220_enable,
-       .save = l2c_save,
-       .configure = l2c_configure,
-+      .unlock = l2c220_unlock,
-       .outer_cache = {
-               .inv_range = l2c220_inv_range,
-               .clean_range = l2c220_clean_range,
-@@ -755,6 +764,12 @@ static void l2c310_resume(void)
-               set_auxcr(get_auxcr() | BIT(3) | BIT(2) | BIT(1));
- }
-+static void l2c310_unlock(void __iomem *base, unsigned num_lock)
-+{
-+      if (readl_relaxed(base + L2X0_AUX_CTRL) & L310_AUX_CTRL_NS_LOCKDOWN)
-+              l2c_unlock(base, num_lock);
-+}
-+
- static const struct l2c_init_data l2c310_init_fns __initconst = {
-       .type = "L2C-310",
-       .way_size_0 = SZ_8K,
-@@ -763,6 +778,7 @@ static const struct l2c_init_data l2c310
-       .fixup = l2c310_fixup,
-       .save = l2c310_save,
-       .configure = l2c310_configure,
-+      .unlock = l2c310_unlock,
-       .outer_cache = {
-               .inv_range = l2c210_inv_range,
-               .clean_range = l2c210_clean_range,
-@@ -1067,6 +1083,7 @@ static const struct l2c_init_data of_l2c
-       .enable = l2c_enable,
-       .save = l2c_save,
-       .configure = l2c_configure,
-+      .unlock = l2c_unlock,
-       .outer_cache = {
-               .inv_range   = l2c210_inv_range,
-               .clean_range = l2c210_clean_range,
-@@ -1086,6 +1103,7 @@ static const struct l2c_init_data of_l2c
-       .enable = l2c220_enable,
-       .save = l2c_save,
-       .configure = l2c_configure,
-+      .unlock = l2c220_unlock,
-       .outer_cache = {
-               .inv_range   = l2c220_inv_range,
-               .clean_range = l2c220_clean_range,
-@@ -1213,6 +1231,7 @@ static const struct l2c_init_data of_l2c
-       .fixup = l2c310_fixup,
-       .save  = l2c310_save,
-       .configure = l2c310_configure,
-+      .unlock = l2c310_unlock,
-       .outer_cache = {
-               .inv_range   = l2c210_inv_range,
-               .clean_range = l2c210_clean_range,
-@@ -1242,6 +1261,7 @@ static const struct l2c_init_data of_l2c
-       .fixup = l2c310_fixup,
-       .save  = l2c310_save,
-       .configure = l2c310_configure,
-+      .unlock = l2c310_unlock,
-       .outer_cache = {
-               .inv_range   = l2c210_inv_range,
-               .clean_range = l2c210_clean_range,
-@@ -1419,6 +1439,7 @@ static const struct l2c_init_data of_aur
-       .fixup = aurora_fixup,
-       .save  = aurora_save,
-       .configure = l2c_configure,
-+      .unlock = l2c_unlock,
-       .outer_cache = {
-               .inv_range   = aurora_inv_range,
-               .clean_range = aurora_clean_range,
-@@ -1439,6 +1460,7 @@ static const struct l2c_init_data of_aur
-       .fixup = aurora_fixup,
-       .save  = aurora_save,
-       .configure = l2c_configure,
-+      .unlock = l2c_unlock,
-       .outer_cache = {
-               .resume      = l2c_resume,
-       },
-@@ -1589,6 +1611,7 @@ static const struct l2c_init_data of_bcm
-       .enable = l2c310_enable,
-       .save  = l2c310_save,
-       .configure = l2c310_configure,
-+      .unlock = l2c310_unlock,
-       .outer_cache = {
-               .inv_range   = bcm_inv_range,
-               .clean_range = bcm_clean_range,
-@@ -1626,6 +1649,7 @@ static const struct l2c_init_data of_tau
-       .enable = l2c_enable,
-       .save  = tauros3_save,
-       .configure = tauros3_configure,
-+      .unlock = l2c_unlock,
-       /* Tauros3 broadcasts L1 cache operations to L2 */
-       .outer_cache = {
-               .resume      = l2c_resume,
diff --git a/target/linux/bcm53xx/patches-4.1/074-ARM-l2c-avoid-passing-auxiliary-control-register-thr.patch b/target/linux/bcm53xx/patches-4.1/074-ARM-l2c-avoid-passing-auxiliary-control-register-thr.patch
deleted file mode 100644 (file)
index 05e739f..0000000
+++ /dev/null
@@ -1,129 +0,0 @@
-From 5b290ec2074c68b9f4f8f8789fa9b3e1782869e7 Mon Sep 17 00:00:00 2001
-From: Russell King <rmk+kernel@arm.linux.org.uk>
-Date: Fri, 15 May 2015 12:03:29 +0100
-Subject: [PATCH 74/74] ARM: l2c: avoid passing auxiliary control register
- through enable method
-
-Avoid passing the auxiliary control register value through the enable
-method.  In the resume path, we have to read the value stored in
-l2x0_saved_regs.aux_ctrl, only to have it immediately written back by
-l2c_enable().  We can avoid this if we have __l2c_init() save the value
-directly to l2x0_saved_regs.aux_ctrl before calling the specific enable
-method.
-
-Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
----
- arch/arm/mm/cache-l2x0.c | 32 +++++++++++++++++---------------
- 1 file changed, 17 insertions(+), 15 deletions(-)
-
---- a/arch/arm/mm/cache-l2x0.c
-+++ b/arch/arm/mm/cache-l2x0.c
-@@ -38,7 +38,7 @@ struct l2c_init_data {
-       unsigned way_size_0;
-       unsigned num_lock;
-       void (*of_parse)(const struct device_node *, u32 *, u32 *);
--      void (*enable)(void __iomem *, u32, unsigned);
-+      void (*enable)(void __iomem *, unsigned);
-       void (*fixup)(void __iomem *, u32, struct outer_cache_fns *);
-       void (*save)(void __iomem *);
-       void (*configure)(void __iomem *);
-@@ -118,12 +118,10 @@ static void l2c_configure(void __iomem *
-  * Enable the L2 cache controller.  This function must only be
-  * called when the cache controller is known to be disabled.
-  */
--static void l2c_enable(void __iomem *base, u32 aux, unsigned num_lock)
-+static void l2c_enable(void __iomem *base, unsigned num_lock)
- {
-       unsigned long flags;
--      l2x0_saved_regs.aux_ctrl = aux;
--
-       if (outer_cache.configure)
-               outer_cache.configure(&l2x0_saved_regs);
-       else
-@@ -160,7 +158,7 @@ static void l2c_resume(void)
-       /* Do not touch the controller if already enabled. */
-       if (!(readl_relaxed(base + L2X0_CTRL) & L2X0_CTRL_EN))
--              l2c_enable(base, l2x0_saved_regs.aux_ctrl, l2x0_data->num_lock);
-+              l2c_enable(base, l2x0_data->num_lock);
- }
- /*
-@@ -390,16 +388,16 @@ static void l2c220_sync(void)
-       raw_spin_unlock_irqrestore(&l2x0_lock, flags);
- }
--static void l2c220_enable(void __iomem *base, u32 aux, unsigned num_lock)
-+static void l2c220_enable(void __iomem *base, unsigned num_lock)
- {
-       /*
-        * Always enable non-secure access to the lockdown registers -
-        * we write to them as part of the L2C enable sequence so they
-        * need to be accessible.
-        */
--      aux |= L220_AUX_CTRL_NS_LOCKDOWN;
-+      l2x0_saved_regs.aux_ctrl |= L220_AUX_CTRL_NS_LOCKDOWN;
--      l2c_enable(base, aux, num_lock);
-+      l2c_enable(base, num_lock);
- }
- static void l2c220_unlock(void __iomem *base, unsigned num_lock)
-@@ -612,10 +610,11 @@ static int l2c310_cpu_enable_flz(struct
-       return NOTIFY_OK;
- }
--static void __init l2c310_enable(void __iomem *base, u32 aux, unsigned num_lock)
-+static void __init l2c310_enable(void __iomem *base, unsigned num_lock)
- {
-       unsigned rev = readl_relaxed(base + L2X0_CACHE_ID) & L2X0_CACHE_ID_RTL_MASK;
-       bool cortex_a9 = read_cpuid_part() == ARM_CPU_PART_CORTEX_A9;
-+      u32 aux = l2x0_saved_regs.aux_ctrl;
-       if (rev >= L310_CACHE_ID_RTL_R2P0) {
-               if (cortex_a9) {
-@@ -658,9 +657,9 @@ static void __init l2c310_enable(void __
-        * we write to them as part of the L2C enable sequence so they
-        * need to be accessible.
-        */
--      aux |= L310_AUX_CTRL_NS_LOCKDOWN;
-+      l2x0_saved_regs.aux_ctrl = aux | L310_AUX_CTRL_NS_LOCKDOWN;
--      l2c_enable(base, aux, num_lock);
-+      l2c_enable(base, num_lock);
-       /* Read back resulting AUX_CTRL value as it could have been altered. */
-       aux = readl_relaxed(base + L2X0_AUX_CTRL);
-@@ -872,8 +871,11 @@ static int __init __l2c_init(const struc
-        * Check if l2x0 controller is already enabled.  If we are booting
-        * in non-secure mode accessing the below registers will fault.
-        */
--      if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN))
--              data->enable(l2x0_base, aux, data->num_lock);
-+      if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
-+              l2x0_saved_regs.aux_ctrl = aux;
-+
-+              data->enable(l2x0_base, data->num_lock);
-+      }
-       outer_cache = fns;
-@@ -1388,7 +1390,7 @@ static void aurora_save(void __iomem *ba
-  * For Aurora cache in no outer mode, enable via the CP15 coprocessor
-  * broadcasting of cache commands to L2.
-  */
--static void __init aurora_enable_no_outer(void __iomem *base, u32 aux,
-+static void __init aurora_enable_no_outer(void __iomem *base,
-       unsigned num_lock)
- {
-       u32 u;
-@@ -1399,7 +1401,7 @@ static void __init aurora_enable_no_oute
-       isb();
--      l2c_enable(base, aux, num_lock);
-+      l2c_enable(base, num_lock);
- }
- static void __init aurora_fixup(void __iomem *base, u32 cache_id,
diff --git a/target/linux/bcm53xx/patches-4.1/075-ARM-8391-1-l2c-add-options-to-overwrite-prefetching-.patch b/target/linux/bcm53xx/patches-4.1/075-ARM-8391-1-l2c-add-options-to-overwrite-prefetching-.patch
deleted file mode 100644 (file)
index 857d2c4..0000000
+++ /dev/null
@@ -1,60 +0,0 @@
-From ec3bd0e68a679a7af2c46af1ddc9af8b534a8b0e Mon Sep 17 00:00:00 2001
-From: Hauke Mehrtens <hauke@hauke-m.de>
-Date: Wed, 10 Jun 2015 20:23:24 +0100
-Subject: [PATCH] ARM: 8391/1: l2c: add options to overwrite prefetching
- behavior
-
-These options make it possible to overwrites the data and instruction
-prefetching behavior of the arm pl310 cache controller.
-
-Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
-Acked-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
----
- Documentation/devicetree/bindings/arm/l2cc.txt |  5 +++++
- arch/arm/mm/cache-l2x0.c                       | 20 ++++++++++++++++++++
- 2 files changed, 25 insertions(+)
-
---- a/Documentation/devicetree/bindings/arm/l2cc.txt
-+++ b/Documentation/devicetree/bindings/arm/l2cc.txt
-@@ -67,6 +67,11 @@ Optional properties:
-   disable if zero.
- - arm,prefetch-offset : Override prefetch offset value. Valid values are
-   0-7, 15, 23, and 31.
-+- prefetch-data : Data prefetch. Value: <0> (forcibly disable), <1>
-+  (forcibly enable), property absent (retain settings set by firmware)
-+- prefetch-instr : Instruction prefetch. Value: <0> (forcibly disable),
-+  <1> (forcibly enable), property absent (retain settings set by
-+  firmware)
- Example:
---- a/arch/arm/mm/cache-l2x0.c
-+++ b/arch/arm/mm/cache-l2x0.c
-@@ -1221,6 +1221,26 @@ static void __init l2c310_of_parse(const
-               pr_err("L2C-310 OF arm,prefetch-offset property value is missing\n");
-       }
-+      ret = of_property_read_u32(np, "prefetch-data", &val);
-+      if (ret == 0) {
-+              if (val)
-+                      prefetch |= L310_PREFETCH_CTRL_DATA_PREFETCH;
-+              else
-+                      prefetch &= ~L310_PREFETCH_CTRL_DATA_PREFETCH;
-+      } else if (ret != -EINVAL) {
-+              pr_err("L2C-310 OF prefetch-data property value is missing\n");
-+      }
-+
-+      ret = of_property_read_u32(np, "prefetch-instr", &val);
-+      if (ret == 0) {
-+              if (val)
-+                      prefetch |= L310_PREFETCH_CTRL_INSTR_PREFETCH;
-+              else
-+                      prefetch &= ~L310_PREFETCH_CTRL_INSTR_PREFETCH;
-+      } else if (ret != -EINVAL) {
-+              pr_err("L2C-310 OF prefetch-instr property value is missing\n");
-+      }
-+
-       l2x0_saved_regs.prefetch_ctrl = prefetch;
- }
diff --git a/target/linux/bcm53xx/patches-4.1/077-ARM-l2c-Add-support-for-the-arm-shared-override-prop.patch b/target/linux/bcm53xx/patches-4.1/077-ARM-l2c-Add-support-for-the-arm-shared-override-prop.patch
deleted file mode 100644 (file)
index cac4c0c..0000000
+++ /dev/null
@@ -1,81 +0,0 @@
-From 1bc7c02e7f37ddfa09cb0db330ee8cd4034d6410 Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert+renesas@glider.be>
-Date: Thu, 7 May 2015 11:27:11 +0200
-Subject: [PATCH 1/4] ARM: l2c: Add support for the "arm, shared-override"
- property
-
-"CoreLink Level 2 Cache Controller L2C-310", p. 2-15, section 2.3.2
-Shareable attribute" states:
-
-    "The default behavior of the cache controller with respect to the
-     shareable attribute is to transform Normal Memory Non-cacheable
-     transactions into:
-        - cacheable no allocate for reads
-        - write through no write allocate for writes."
-
-Depending on the system architecture, this may cause memory corruption
-in the presence of bus mastering devices (e.g. OHCI). To avoid such
-corruption, the default behavior can be disabled by setting the Shared
-Override bit in the Auxiliary Control register.
-
-Currently the Shared Override bit can be set only using C code:
-  - by calling l2x0_init() directly, which is deprecated,
-  - by setting/clearing the bit in the machine_desc.l2c_aux_val/mask
-    fields, but using values differing from 0/~0 is also deprecated.
-
-Hence add support for an "arm,shared-override" device tree property for
-the l2c device node. By specifying this property, affected systems can
-indicate that non-cacheable transactions must not be transformed.
-Then, it's up to the OS to decide. The current behavior is to set the
-"shared attribute override enable" bit, as there may exist kernel linear
-mappings and cacheable aliases for the DMA buffers, even if CMA is
-enabled.
-
-See also commit 1a8e41cd672f894b ("ARM: 6395/1: VExpress: Set bit 22 in
-the PL310 (cache controller) AuxCtlr register"):
-
-    "Clearing bit 22 in the PL310 Auxiliary Control register (shared
-     attribute override enable) has the side effect of transforming
-     Normal Shared Non-cacheable reads into Cacheable no-allocate reads.
-
-     Coherent DMA buffers in Linux always have a Cacheable alias via the
-     kernel linear mapping and the processor can speculatively load
-     cache lines into the PL310 controller. With bit 22 cleared,
-     Non-cacheable reads would unexpectedly hit such cache lines leading
-     to buffer corruption."
-
-Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
----
- Documentation/devicetree/bindings/arm/l2cc.txt | 6 ++++++
- arch/arm/mm/cache-l2x0.c                       | 5 +++++
- 2 files changed, 11 insertions(+)
-
---- a/Documentation/devicetree/bindings/arm/l2cc.txt
-+++ b/Documentation/devicetree/bindings/arm/l2cc.txt
-@@ -72,6 +72,12 @@ Optional properties:
- - prefetch-instr : Instruction prefetch. Value: <0> (forcibly disable),
-   <1> (forcibly enable), property absent (retain settings set by
-   firmware)
-+- arm,shared-override : The default behavior of the pl310 cache controller with
-+  respect to the shareable attribute is to transform "normal memory
-+  non-cacheable transactions" into "cacheable no allocate" (for reads) or
-+  "write through no write allocate" (for writes).
-+  On systems where this may cause DMA buffer corruption, this property must be
-+  specified to indicate that such transforms are precluded.
- Example:
---- a/arch/arm/mm/cache-l2x0.c
-+++ b/arch/arm/mm/cache-l2x0.c
-@@ -1171,6 +1171,11 @@ static void __init l2c310_of_parse(const
-               }
-       }
-+      if (of_property_read_bool(np, "arm,shared-override")) {
-+              *aux_val |= L2C_AUX_CTRL_SHARED_OVERRIDE;
-+              *aux_mask &= ~L2C_AUX_CTRL_SHARED_OVERRIDE;
-+      }
-+
-       prefetch = l2x0_saved_regs.prefetch_ctrl;
-       ret = of_property_read_u32(np, "arm,double-linefill", &val);
diff --git a/target/linux/bcm53xx/patches-4.1/079-ARM-BCM5301X-activate-some-additional-options-in-pl3.patch b/target/linux/bcm53xx/patches-4.1/079-ARM-BCM5301X-activate-some-additional-options-in-pl3.patch
deleted file mode 100644 (file)
index bfe4304..0000000
+++ /dev/null
@@ -1,29 +0,0 @@
-From e8ec653c767f56346eb1fadbc07e0706d6dbd56f Mon Sep 17 00:00:00 2001
-From: Hauke Mehrtens <hauke@hauke-m.de>
-Date: Thu, 14 May 2015 00:38:28 +0200
-Subject: [PATCH 3/3] ARM: BCM5301X: activate some additional options in pl310
- cache controller
-
-In the default Broadcom SDK the shared override is activated for this
-cache controller, do the same in the upstream code. Data and
-instruction prefetching is not activated by default for this cache
-controller on the bcm53xx SoC, do it manually like it is done in the
-vendor SDK.
-
-Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
----
- arch/arm/boot/dts/bcm5301x.dtsi | 3 +++
- 1 file changed, 3 insertions(+)
-
---- a/arch/arm/boot/dts/bcm5301x.dtsi
-+++ b/arch/arm/boot/dts/bcm5301x.dtsi
-@@ -78,6 +78,9 @@
-                       compatible = "arm,pl310-cache";
-                       reg = <0x2000 0x1000>;
-                       cache-unified;
-+                      arm,shared-override;
-+                      prefetch-data = <1>;
-+                      prefetch-instr = <1>;
-                       cache-level = <2>;
-               };
-       };
diff --git a/target/linux/bcm53xx/patches-4.1/080-ARM-BCM5301X-Enable-UART0-on-tested-devices.patch b/target/linux/bcm53xx/patches-4.1/080-ARM-BCM5301X-Enable-UART0-on-tested-devices.patch
deleted file mode 100644 (file)
index ce69cca..0000000
+++ /dev/null
@@ -1,83 +0,0 @@
-From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
-Date: Mon, 29 Jun 2015 07:22:16 +0200
-Subject: [PATCH] ARM: BCM5301X: Enable UART0 on tested devices
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-There are two possible UARTs so we have (both of) them disabled by
-default. Override uart0 status on devices that were verified to use it.
-In case of Netgear R6250 also drop an old (and invalid) overwrite. It
-doesn't have uart1 connected.
-
-Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
-Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
-Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
----
---- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
-+++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
-@@ -135,3 +135,7 @@
-               };
-       };
- };
-+
-+&uart0 {
-+      status = "okay";
-+};
---- a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
-+++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
-@@ -55,3 +55,7 @@
-               };
-       };
- };
-+
-+&uart0 {
-+      status = "okay";
-+};
---- a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
-+++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
-@@ -24,16 +24,6 @@
-               reg = <0x00000000 0x08000000>;
-       };
--      chipcommonA {
--              uart0: serial@0300 {
--                      status = "okay";
--              };
--
--              uart1: serial@0400 {
--                      status = "okay";
--              };
--      };
--
-       leds {
-               compatible = "gpio-leds";
-@@ -92,3 +82,7 @@
-               };
-       };
- };
-+
-+&uart0 {
-+      status = "okay";
-+};
---- a/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
-+++ b/arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
-@@ -118,3 +118,7 @@
-               };
-       };
- };
-+
-+&uart0 {
-+      status = "okay";
-+};
---- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
-+++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
-@@ -122,3 +122,7 @@
-               };
-       };
- };
-+
-+&uart0 {
-+      status = "okay";
-+};
diff --git a/target/linux/bcm53xx/patches-4.1/081-ARM-BCM5301X-Add-profiling-support.patch b/target/linux/bcm53xx/patches-4.1/081-ARM-BCM5301X-Add-profiling-support.patch
deleted file mode 100644 (file)
index afd73f5..0000000
+++ /dev/null
@@ -1,25 +0,0 @@
-From: Felix Fietkau <nbd@openwrt.org>
-Date: Wed, 29 Jul 2015 23:51:00 +0200
-Subject: [PATCH] ARM: BCM5301X: Add profiling support
-
-Signed-off-by: Felix Fietkau <nbd@openwrt.org>
-Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
-Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: Olof Johansson <olof@lixom.net>
----
---- a/arch/arm/boot/dts/bcm5301x.dtsi
-+++ b/arch/arm/boot/dts/bcm5301x.dtsi
-@@ -85,6 +85,13 @@
-               };
-       };
-+      pmu {
-+              compatible = "arm,cortex-a9-pmu";
-+              interrupts =
-+                      <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
-+                      <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
-+      };
-+
-       clocks {
-               #address-cells = <1>;
-               #size-cells = <0>;
diff --git a/target/linux/bcm53xx/patches-4.1/082-ARM-BCM5301X-Add-DT-for-Netgear-R7000.patch b/target/linux/bcm53xx/patches-4.1/082-ARM-BCM5301X-Add-DT-for-Netgear-R7000.patch
deleted file mode 100644 (file)
index 02856d0..0000000
+++ /dev/null
@@ -1,128 +0,0 @@
-From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
-Date: Wed, 26 Aug 2015 16:11:38 +0200
-Subject: [PATCH] ARM: BCM5301X: Add DT for Netgear R7000
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
----
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -68,6 +68,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
-       bcm47081-buffalo-wzr-900dhp.dtb \
-       bcm4709-asus-rt-ac87u.dtb \
-       bcm4709-buffalo-wxr-1900dhp.dtb \
-+      bcm4709-netgear-r7000.dtb \
-       bcm4709-netgear-r8000.dtb
- dtb-$(CONFIG_ARCH_BCM_63XX) += \
-       bcm963138dvt.dtb
---- /dev/null
-+++ b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
-@@ -0,0 +1,106 @@
-+/*
-+ * Broadcom BCM470X / BCM5301X ARM platform code.
-+ * DTS for Netgear R7000
-+ *
-+ * Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com>
-+ *
-+ * Licensed under the GNU/GPL. See COPYING for details.
-+ */
-+
-+/dts-v1/;
-+
-+#include "bcm4708.dtsi"
-+#include "bcm5301x-nand-cs0-bch8.dtsi"
-+
-+/ {
-+      compatible = "netgear,r7000", "brcm,bcm4709", "brcm,bcm4708";
-+      model = "Netgear R7000";
-+
-+      chosen {
-+              bootargs = "console=ttyS0,115200";
-+      };
-+
-+      memory {
-+              reg = <0x00000000 0x08000000>;
-+      };
-+
-+      leds {
-+              compatible = "gpio-leds";
-+
-+              power-white {
-+                      label = "bcm53xx:white:power";
-+                      gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>;
-+                      linux,default-trigger = "default-on";
-+              };
-+
-+              power-amber {
-+                      label = "bcm53xx:amber:power";
-+                      gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              5ghz {
-+                      label = "bcm53xx:white:5ghz";
-+                      gpios = <&chipcommon 12 GPIO_ACTIVE_LOW>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              2ghz {
-+                      label = "bcm53xx:white:2ghz";
-+                      gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              wps {
-+                      label = "bcm53xx:white:wps";
-+                      gpios = <&chipcommon 14 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              wireless {
-+                      label = "bcm53xx:white:wireless";
-+                      gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              usb3 {
-+                      label = "bcm53xx:white:usb3";
-+                      gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
-+                      linux,default-trigger = "default-off";
-+              };
-+
-+              usb2 {
-+                      label = "bcm53xx:white:usb2";
-+                      gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>;
-+                      linux,default-trigger = "default-off";
-+              };
-+      };
-+
-+      gpio-keys {
-+              compatible = "gpio-keys";
-+              #address-cells = <1>;
-+              #size-cells = <0>;
-+
-+              wps {
-+                      label = "WPS";
-+                      linux,code = <KEY_WPS_BUTTON>;
-+                      gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>;
-+              };
-+
-+              rfkill {
-+                      label = "WiFi";
-+                      linux,code = <KEY_RFKILL>;
-+                      gpios = <&chipcommon 5 GPIO_ACTIVE_LOW>;
-+              };
-+
-+              restart {
-+                      label = "Reset";
-+                      linux,code = <KEY_RESTART>;
-+                      gpios = <&chipcommon 6 GPIO_ACTIVE_LOW>;
-+              };
-+      };
-+};
-+
-+&uart0 {
-+      status = "okay";
-+};
diff --git a/target/linux/bcm53xx/patches-4.1/083-ARM-dts-bcm5301x-Add-BCM-SVK-DT-files.patch b/target/linux/bcm53xx/patches-4.1/083-ARM-dts-bcm5301x-Add-BCM-SVK-DT-files.patch
deleted file mode 100644 (file)
index 1d2c250..0000000
+++ /dev/null
@@ -1,218 +0,0 @@
-From a0aef7fbab0d8b5a0d445c74990e5233beda246e Mon Sep 17 00:00:00 2001
-From: Jon Mason <jonmason@broadcom.com>
-Date: Wed, 21 Oct 2015 18:46:04 -0400
-Subject: [PATCH] ARM: dts: bcm5301x: Add BCM SVK DT files
-
-Add device tree files for Broadcom Northstar based SVKs.  Since the
-bcm5301x.dtsi already exists, all that is necessary is the dts files to
-enable the UARTs.  With these files, the SVKs are able to boot to shell.
-
-Signed-off-by: Jon Mason <jonmason@broadcom.com>
----
- arch/arm/boot/dts/Makefile       |  5 +++-
- arch/arm/boot/dts/bcm94708.dts   | 56 +++++++++++++++++++++++++++++++++++
- arch/arm/boot/dts/bcm94709.dts   | 56 +++++++++++++++++++++++++++++++++++
- arch/arm/boot/dts/bcm953012k.dts | 63 ++++++++++++++++++++++++++++++++++++++++
- 4 files changed, 179 insertions(+), 1 deletion(-)
- create mode 100644 arch/arm/boot/dts/bcm94708.dts
- create mode 100644 arch/arm/boot/dts/bcm94709.dts
- create mode 100644 arch/arm/boot/dts/bcm953012k.dts
-
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -69,7 +69,10 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
-       bcm4709-asus-rt-ac87u.dtb \
-       bcm4709-buffalo-wxr-1900dhp.dtb \
-       bcm4709-netgear-r7000.dtb \
--      bcm4709-netgear-r8000.dtb
-+      bcm4709-netgear-r8000.dtb \
-+      bcm94708.dtb \
-+      bcm94709.dtb \
-+      bcm953012k.dtb
- dtb-$(CONFIG_ARCH_BCM_63XX) += \
-       bcm963138dvt.dtb
- dtb-$(CONFIG_ARCH_BCM_CYGNUS) += \
---- /dev/null
-+++ b/arch/arm/boot/dts/bcm94708.dts
-@@ -0,0 +1,56 @@
-+/*
-+ *  BSD LICENSE
-+ *
-+ *  Copyright(c) 2015 Broadcom Corporation.  All rights reserved.
-+ *
-+ *  Redistribution and use in source and binary forms, with or without
-+ *  modification, are permitted provided that the following conditions
-+ *  are met:
-+ *
-+ *    * Redistributions of source code must retain the above copyright
-+ *      notice, this list of conditions and the following disclaimer.
-+ *    * Redistributions in binary form must reproduce the above copyright
-+ *      notice, this list of conditions and the following disclaimer in
-+ *      the documentation and/or other materials provided with the
-+ *      distribution.
-+ *    * Neither the name of Broadcom Corporation nor the names of its
-+ *      contributors may be used to endorse or promote products derived
-+ *      from this software without specific prior written permission.
-+ *
-+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ */
-+
-+/dts-v1/;
-+
-+#include "bcm4708.dtsi"
-+
-+/ {
-+      model = "NorthStar SVK (BCM94708)";
-+      compatible = "brcm,bcm94708", "brcm,bcm4708";
-+
-+      aliases {
-+              serial0 = &uart0;
-+      };
-+
-+      chosen {
-+              stdout-path = "serial0:115200n8";
-+      };
-+
-+      memory {
-+              reg = <0x00000000 0x08000000>;
-+      };
-+};
-+
-+&uart0 {
-+      status = "okay";
-+};
---- /dev/null
-+++ b/arch/arm/boot/dts/bcm94709.dts
-@@ -0,0 +1,56 @@
-+/*
-+ *  BSD LICENSE
-+ *
-+ *  Copyright(c) 2015 Broadcom Corporation.  All rights reserved.
-+ *
-+ *  Redistribution and use in source and binary forms, with or without
-+ *  modification, are permitted provided that the following conditions
-+ *  are met:
-+ *
-+ *    * Redistributions of source code must retain the above copyright
-+ *      notice, this list of conditions and the following disclaimer.
-+ *    * Redistributions in binary form must reproduce the above copyright
-+ *      notice, this list of conditions and the following disclaimer in
-+ *      the documentation and/or other materials provided with the
-+ *      distribution.
-+ *    * Neither the name of Broadcom Corporation nor the names of its
-+ *      contributors may be used to endorse or promote products derived
-+ *      from this software without specific prior written permission.
-+ *
-+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ */
-+
-+/dts-v1/;
-+
-+#include "bcm4708.dtsi"
-+
-+/ {
-+      model = "NorthStar SVK (BCM94709)";
-+      compatible = "brcm,bcm94709", "brcm,bcm4709", "brcm,bcm4708";
-+
-+      aliases {
-+              serial0 = &uart0;
-+      };
-+
-+      chosen {
-+              stdout-path = "serial0:115200n8";
-+      };
-+
-+      memory {
-+              reg = <0x00000000 0x08000000>;
-+      };
-+};
-+
-+&uart0 {
-+      status = "okay";
-+};
---- /dev/null
-+++ b/arch/arm/boot/dts/bcm953012k.dts
-@@ -0,0 +1,63 @@
-+/*
-+ *  BSD LICENSE
-+ *
-+ *  Copyright(c) 2015 Broadcom Corporation.  All rights reserved.
-+ *
-+ *  Redistribution and use in source and binary forms, with or without
-+ *  modification, are permitted provided that the following conditions
-+ *  are met:
-+ *
-+ *    * Redistributions of source code must retain the above copyright
-+ *      notice, this list of conditions and the following disclaimer.
-+ *    * Redistributions in binary form must reproduce the above copyright
-+ *      notice, this list of conditions and the following disclaimer in
-+ *      the documentation and/or other materials provided with the
-+ *      distribution.
-+ *    * Neither the name of Broadcom Corporation nor the names of its
-+ *      contributors may be used to endorse or promote products derived
-+ *      from this software without specific prior written permission.
-+ *
-+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-+ */
-+
-+/dts-v1/;
-+
-+#include "bcm4708.dtsi"
-+
-+/ {
-+      model = "NorthStar SVK (BCM953012K)";
-+      compatible = "brcm,bcm953012k", "brcm,brcm53012", "brcm,bcm4708";
-+
-+      aliases {
-+              serial0 = &uart0;
-+              serial1 = &uart1;
-+      };
-+
-+      chosen {
-+              stdout-path = "serial0:115200n8";
-+      };
-+
-+      memory {
-+              reg = <0x00000000 0x10000000>;
-+      };
-+};
-+
-+&uart0 {
-+      clock-frequency = <62499840>;
-+      status = "okay";
-+};
-+
-+&uart1 {
-+      clock-frequency = <62499840>;
-+      status = "okay";
-+};
diff --git a/target/linux/bcm53xx/patches-4.1/090-mtd-nand-add-common-DT-init-code.patch b/target/linux/bcm53xx/patches-4.1/090-mtd-nand-add-common-DT-init-code.patch
deleted file mode 100644 (file)
index cb2141a..0000000
+++ /dev/null
@@ -1,111 +0,0 @@
-From 5844feeaa4154d1c46d3462c7a4653d22356d8b4 Mon Sep 17 00:00:00 2001
-From: Brian Norris <computersforpeace@gmail.com>
-Date: Fri, 23 Jan 2015 00:22:27 -0800
-Subject: [PATCH 20/32] mtd: nand: add common DT init code
-
-These are already-documented common bindings for NAND chips. Let's
-handle them in nand_base.
-
-If NAND controller drivers need to act on this data before bringing up
-the NAND chip (e.g., fill out ECC callback functions, change HW modes,
-etc.), then they can do so between calling nand_scan_ident() and
-nand_scan_tail().
-
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
----
- drivers/mtd/nand/nand_base.c | 41 +++++++++++++++++++++++++++++++++++++++++
- include/linux/mtd/nand.h     |  5 +++++
- 2 files changed, 46 insertions(+)
-
---- a/drivers/mtd/nand/nand_base.c
-+++ b/drivers/mtd/nand/nand_base.c
-@@ -48,6 +48,7 @@
- #include <linux/leds.h>
- #include <linux/io.h>
- #include <linux/mtd/partitions.h>
-+#include <linux/of_mtd.h>
- /* Define default oob placement schemes for large and small page devices */
- static struct nand_ecclayout nand_oob_8 = {
-@@ -3798,6 +3799,39 @@ ident_done:
-       return type;
- }
-+static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip,
-+                      struct device_node *dn)
-+{
-+      int ecc_mode, ecc_strength, ecc_step;
-+
-+      if (of_get_nand_bus_width(dn) == 16)
-+              chip->options |= NAND_BUSWIDTH_16;
-+
-+      if (of_get_nand_on_flash_bbt(dn))
-+              chip->bbt_options |= NAND_BBT_USE_FLASH;
-+
-+      ecc_mode = of_get_nand_ecc_mode(dn);
-+      ecc_strength = of_get_nand_ecc_strength(dn);
-+      ecc_step = of_get_nand_ecc_step_size(dn);
-+
-+      if ((ecc_step >= 0 && !(ecc_strength >= 0)) ||
-+          (!(ecc_step >= 0) && ecc_strength >= 0)) {
-+              pr_err("must set both strength and step size in DT\n");
-+              return -EINVAL;
-+      }
-+
-+      if (ecc_mode >= 0)
-+              chip->ecc.mode = ecc_mode;
-+
-+      if (ecc_strength >= 0)
-+              chip->ecc.strength = ecc_strength;
-+
-+      if (ecc_step > 0)
-+              chip->ecc.size = ecc_step;
-+
-+      return 0;
-+}
-+
- /**
-  * nand_scan_ident - [NAND Interface] Scan for the NAND device
-  * @mtd: MTD device structure
-@@ -3815,6 +3849,13 @@ int nand_scan_ident(struct mtd_info *mtd
-       int i, nand_maf_id, nand_dev_id;
-       struct nand_chip *chip = mtd->priv;
-       struct nand_flash_dev *type;
-+      int ret;
-+
-+      if (chip->dn) {
-+              ret = nand_dt_init(mtd, chip, chip->dn);
-+              if (ret)
-+                      return ret;
-+      }
-       /* Set the default functions */
-       nand_set_defaults(chip, chip->options & NAND_BUSWIDTH_16);
---- a/include/linux/mtd/nand.h
-+++ b/include/linux/mtd/nand.h
-@@ -26,6 +26,8 @@
- struct mtd_info;
- struct nand_flash_dev;
-+struct device_node;
-+
- /* Scan and identify a NAND device */
- extern int nand_scan(struct mtd_info *mtd, int max_chips);
- /*
-@@ -542,6 +544,7 @@ struct nand_buffers {
-  *                    flash device
-  * @IO_ADDR_W:                [BOARDSPECIFIC] address to write the 8 I/O lines of the
-  *                    flash device.
-+ * @dn:                       [BOARDSPECIFIC] device node describing this instance
-  * @read_byte:                [REPLACEABLE] read one byte from the chip
-  * @read_word:                [REPLACEABLE] read one word from the chip
-  * @write_byte:               [REPLACEABLE] write a single byte to the chip on the
-@@ -644,6 +647,8 @@ struct nand_chip {
-       void __iomem *IO_ADDR_R;
-       void __iomem *IO_ADDR_W;
-+      struct device_node *dn;
-+
-       uint8_t (*read_byte)(struct mtd_info *mtd);
-       u16 (*read_word)(struct mtd_info *mtd);
-       void (*write_byte)(struct mtd_info *mtd, uint8_t byte);
diff --git a/target/linux/bcm53xx/patches-4.1/092-Add-Broadcom-STB-NAND.patch b/target/linux/bcm53xx/patches-4.1/092-Add-Broadcom-STB-NAND.patch
deleted file mode 100644 (file)
index a6cf211..0000000
+++ /dev/null
@@ -1,2765 +0,0 @@
-This contains the following commits:
-
-commit bcb83a19d3ac95fe3c0e79e942fb628120738853
-Author: Hauke Mehrtens <hauke@hauke-m.de>
-Date:   Sun May 17 17:41:01 2015 +0200
-
-    mtd: brcmnand: do not make local variable static
-    
-    Remove static in front of ctrl. This variable should not be shared
-    between different instances of brcmnand_probe(), it should be local to
-    this function and stored on the stack.
-    
-    Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
-    Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-
-commit 802041247a0abbeaf1dddb8a8d56f491762ae357
-Author: Hauke Mehrtens <hauke@hauke-m.de>
-Date:   Sun May 17 17:41:00 2015 +0200
-
-    mtd: brcmnand: remove double new line from print
-    
-    The caller already adds a new line and in the other cases there is no
-    new line added.
-    
-    Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
-    Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-
-commit f628ece6636c2f0354a52566cafdea6d2f963b3d
-Author: Brian Norris <computersforpeace@gmail.com>
-Date:   Tue May 12 12:13:14 2015 -0700
-
-    mtd: brcmnand: add BCM63138 support
-    
-    Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-    Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-    Tested-by: Florian Fainelli <f.fainelli@gmail.com>
-
-commit ca22f040dd145fc4d8069ce174f6eb0bc3ebd19f
-Author: Brian Norris <computersforpeace@gmail.com>
-Date:   Tue May 12 12:12:02 2015 -0700
-
-    mtd: brcmnand: add support for Broadcom's IPROC family
-    
-    Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-
-
-commit c26211d37f11d5913d9803fdede6d053f918ba7b
-Author: Brian Norris <computersforpeace@gmail.com>
-Date:   Tue May 12 12:09:28 2015 -0700
-
-    mtd: brcmnand: add extra SoC support to library
-    
-    There are a few small hooks required for chips like BCM63138 and the
-    iProc family. Let's introduce those now.
-    
-    Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-    Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-    Tested-by: Florian Fainelli <f.fainelli@gmail.com>
-
-commit 303b4420ff1896b444017b5b0eb8252ce197797d
-Author: Brian Norris <computersforpeace@gmail.com>
-Date:   Tue May 12 17:00:57 2015 -0700
-
-    mtd: brcmnand: add support for STB chips
-    
-    BCM7xxx chips are supported entirely by the library code, since they use
-    generic irqchip interfaces and don't need any extra SoC-specific
-    configuration.
-    
-    Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-
-commit 27c5b17cd1b10564fa36f8f51e4b4b41436ecc32
-Author: Brian Norris <computersforpeace@gmail.com>
-Date:   Fri Mar 6 11:38:08 2015 -0800
-
-    mtd: nand: add NAND driver "library" for Broadcom STB NAND controller
-    
-    This core originated in Set-Top Box chips (BCM7xxx) but is used in a
-    variety of other Broadcom chips, including some BCM63xxx, BCM33xx, and
-    iProc/Cygnus. It's been used only on ARM and MIPS SoCs, so restrict it
-    to those architectures.
-    
-    There are multiple revisions of this core throughout the years, and
-    almost every version broke register compatibility in some small way, but
-    with some effort, this driver is able to support v4.0, v5.0, v6.x, v7.0,
-    and v7.1. It's been tested on v5.0, v6.0, v6.1, v7.0, and v7.1 recently,
-    so there hopefully are no more lurking inconsistencies.
-    
-    This patch adds just some library support, on which platform drivers can
-    be built.
-    
-    Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-    Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-    Tested-by: Florian Fainelli <f.fainelli@gmail.com>
-
---- a/drivers/mtd/nand/Kconfig
-+++ b/drivers/mtd/nand/Kconfig
-@@ -394,6 +394,14 @@ config MTD_NAND_GPMI_NAND
-        block, such as SD card. So pay attention to it when you enable
-        the GPMI.
-+config MTD_NAND_BRCMNAND
-+      tristate "Broadcom STB NAND controller"
-+      depends on ARM || MIPS
-+      help
-+        Enables the Broadcom NAND controller driver. The controller was
-+        originally designed for Set-Top Box but is used on various BCM7xxx,
-+        BCM3xxx, BCM63xxx, iProc/Cygnus and more.
-+
- config MTD_NAND_BCM47XXNFLASH
-       tristate "Support for NAND flash on BCM4706 BCMA bus"
-       depends on BCMA_NFLASH
---- a/drivers/mtd/nand/Makefile
-+++ b/drivers/mtd/nand/Makefile
-@@ -52,5 +52,6 @@ obj-$(CONFIG_MTD_NAND_XWAY)          += xway_nan
- obj-$(CONFIG_MTD_NAND_BCM47XXNFLASH)  += bcm47xxnflash/
- obj-$(CONFIG_MTD_NAND_SUNXI)          += sunxi_nand.o
- obj-$(CONFIG_MTD_NAND_HISI504)                += hisi504_nand.o
-+obj-$(CONFIG_MTD_NAND_BRCMNAND)               += brcmnand/
- nand-objs := nand_base.o nand_bbt.o nand_timings.o
---- /dev/null
-+++ b/drivers/mtd/nand/brcmnand/Makefile
-@@ -0,0 +1,6 @@
-+# link order matters; don't link the more generic brcmstb_nand.o before the
-+# more specific iproc_nand.o, for instance
-+obj-$(CONFIG_MTD_NAND_BRCMNAND)               += iproc_nand.o
-+obj-$(CONFIG_MTD_NAND_BRCMNAND)               += bcm63138_nand.o
-+obj-$(CONFIG_MTD_NAND_BRCMNAND)               += brcmstb_nand.o
-+obj-$(CONFIG_MTD_NAND_BRCMNAND)               += brcmnand.o
---- /dev/null
-+++ b/drivers/mtd/nand/brcmnand/bcm63138_nand.c
-@@ -0,0 +1,109 @@
-+/*
-+ * Copyright © 2015 Broadcom Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ */
-+
-+#include <linux/device.h>
-+#include <linux/io.h>
-+#include <linux/ioport.h>
-+#include <linux/module.h>
-+#include <linux/of.h>
-+#include <linux/of_address.h>
-+#include <linux/platform_device.h>
-+#include <linux/slab.h>
-+
-+#include "brcmnand.h"
-+
-+struct bcm63138_nand_soc {
-+      struct brcmnand_soc soc;
-+      void __iomem *base;
-+};
-+
-+#define BCM63138_NAND_INT_STATUS              0x00
-+#define BCM63138_NAND_INT_EN                  0x04
-+
-+enum {
-+      BCM63138_CTLRDY         = BIT(4),
-+};
-+
-+static bool bcm63138_nand_intc_ack(struct brcmnand_soc *soc)
-+{
-+      struct bcm63138_nand_soc *priv =
-+                      container_of(soc, struct bcm63138_nand_soc, soc);
-+      void __iomem *mmio = priv->base + BCM63138_NAND_INT_STATUS;
-+      u32 val = brcmnand_readl(mmio);
-+
-+      if (val & BCM63138_CTLRDY) {
-+              brcmnand_writel(val & ~BCM63138_CTLRDY, mmio);
-+              return true;
-+      }
-+
-+      return false;
-+}
-+
-+static void bcm63138_nand_intc_set(struct brcmnand_soc *soc, bool en)
-+{
-+      struct bcm63138_nand_soc *priv =
-+                      container_of(soc, struct bcm63138_nand_soc, soc);
-+      void __iomem *mmio = priv->base + BCM63138_NAND_INT_EN;
-+      u32 val = brcmnand_readl(mmio);
-+
-+      if (en)
-+              val |= BCM63138_CTLRDY;
-+      else
-+              val &= ~BCM63138_CTLRDY;
-+
-+      brcmnand_writel(val, mmio);
-+}
-+
-+static int bcm63138_nand_probe(struct platform_device *pdev)
-+{
-+      struct device *dev = &pdev->dev;
-+      struct bcm63138_nand_soc *priv;
-+      struct brcmnand_soc *soc;
-+      struct resource *res;
-+
-+      priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
-+      if (!priv)
-+              return -ENOMEM;
-+      soc = &priv->soc;
-+
-+      res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nand-int-base");
-+      priv->base = devm_ioremap_resource(dev, res);
-+      if (IS_ERR(priv->base))
-+              return PTR_ERR(priv->base);
-+
-+      soc->ctlrdy_ack = bcm63138_nand_intc_ack;
-+      soc->ctlrdy_set_enabled = bcm63138_nand_intc_set;
-+
-+      return brcmnand_probe(pdev, soc);
-+}
-+
-+static const struct of_device_id bcm63138_nand_of_match[] = {
-+      { .compatible = "brcm,nand-bcm63138" },
-+      {},
-+};
-+MODULE_DEVICE_TABLE(of, bcm63138_nand_of_match);
-+
-+static struct platform_driver bcm63138_nand_driver = {
-+      .probe                  = bcm63138_nand_probe,
-+      .remove                 = brcmnand_remove,
-+      .driver = {
-+              .name           = "bcm63138_nand",
-+              .pm             = &brcmnand_pm_ops,
-+              .of_match_table = bcm63138_nand_of_match,
-+      }
-+};
-+module_platform_driver(bcm63138_nand_driver);
-+
-+MODULE_LICENSE("GPL v2");
-+MODULE_AUTHOR("Brian Norris");
-+MODULE_DESCRIPTION("NAND driver for BCM63138");
---- /dev/null
-+++ b/drivers/mtd/nand/brcmnand/brcmnand.c
-@@ -0,0 +1,2246 @@
-+/*
-+ * Copyright © 2010-2015 Broadcom Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ */
-+
-+#include <linux/version.h>
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/delay.h>
-+#include <linux/device.h>
-+#include <linux/platform_device.h>
-+#include <linux/err.h>
-+#include <linux/completion.h>
-+#include <linux/interrupt.h>
-+#include <linux/spinlock.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/ioport.h>
-+#include <linux/bug.h>
-+#include <linux/kernel.h>
-+#include <linux/bitops.h>
-+#include <linux/mm.h>
-+#include <linux/mtd/mtd.h>
-+#include <linux/mtd/nand.h>
-+#include <linux/mtd/partitions.h>
-+#include <linux/of.h>
-+#include <linux/of_mtd.h>
-+#include <linux/of_platform.h>
-+#include <linux/slab.h>
-+#include <linux/list.h>
-+#include <linux/log2.h>
-+
-+#include "brcmnand.h"
-+
-+/*
-+ * This flag controls if WP stays on between erase/write commands to mitigate
-+ * flash corruption due to power glitches. Values:
-+ * 0: NAND_WP is not used or not available
-+ * 1: NAND_WP is set by default, cleared for erase/write operations
-+ * 2: NAND_WP is always cleared
-+ */
-+static int wp_on = 1;
-+module_param(wp_on, int, 0444);
-+
-+/***********************************************************************
-+ * Definitions
-+ ***********************************************************************/
-+
-+#define DRV_NAME                      "brcmnand"
-+
-+#define CMD_NULL                      0x00
-+#define CMD_PAGE_READ                 0x01
-+#define CMD_SPARE_AREA_READ           0x02
-+#define CMD_STATUS_READ                       0x03
-+#define CMD_PROGRAM_PAGE              0x04
-+#define CMD_PROGRAM_SPARE_AREA                0x05
-+#define CMD_COPY_BACK                 0x06
-+#define CMD_DEVICE_ID_READ            0x07
-+#define CMD_BLOCK_ERASE                       0x08
-+#define CMD_FLASH_RESET                       0x09
-+#define CMD_BLOCKS_LOCK                       0x0a
-+#define CMD_BLOCKS_LOCK_DOWN          0x0b
-+#define CMD_BLOCKS_UNLOCK             0x0c
-+#define CMD_READ_BLOCKS_LOCK_STATUS   0x0d
-+#define CMD_PARAMETER_READ            0x0e
-+#define CMD_PARAMETER_CHANGE_COL      0x0f
-+#define CMD_LOW_LEVEL_OP              0x10
-+
-+struct brcm_nand_dma_desc {
-+      u32 next_desc;
-+      u32 next_desc_ext;
-+      u32 cmd_irq;
-+      u32 dram_addr;
-+      u32 dram_addr_ext;
-+      u32 tfr_len;
-+      u32 total_len;
-+      u32 flash_addr;
-+      u32 flash_addr_ext;
-+      u32 cs;
-+      u32 pad2[5];
-+      u32 status_valid;
-+} __packed;
-+
-+/* Bitfields for brcm_nand_dma_desc::status_valid */
-+#define FLASH_DMA_ECC_ERROR   (1 << 8)
-+#define FLASH_DMA_CORR_ERROR  (1 << 9)
-+
-+/* 512B flash cache in the NAND controller HW */
-+#define FC_SHIFT              9U
-+#define FC_BYTES              512U
-+#define FC_WORDS              (FC_BYTES >> 2)
-+
-+#define BRCMNAND_MIN_PAGESIZE 512
-+#define BRCMNAND_MIN_BLOCKSIZE        (8 * 1024)
-+#define BRCMNAND_MIN_DEVSIZE  (4ULL * 1024 * 1024)
-+
-+/* Controller feature flags */
-+enum {
-+      BRCMNAND_HAS_1K_SECTORS                 = BIT(0),
-+      BRCMNAND_HAS_PREFETCH                   = BIT(1),
-+      BRCMNAND_HAS_CACHE_MODE                 = BIT(2),
-+      BRCMNAND_HAS_WP                         = BIT(3),
-+};
-+
-+struct brcmnand_controller {
-+      struct device           *dev;
-+      struct nand_hw_control  controller;
-+      void __iomem            *nand_base;
-+      void __iomem            *nand_fc; /* flash cache */
-+      void __iomem            *flash_dma_base;
-+      unsigned int            irq;
-+      unsigned int            dma_irq;
-+      int                     nand_version;
-+
-+      /* Some SoCs provide custom interrupt status register(s) */
-+      struct brcmnand_soc     *soc;
-+
-+      int                     cmd_pending;
-+      bool                    dma_pending;
-+      struct completion       done;
-+      struct completion       dma_done;
-+
-+      /* List of NAND hosts (one for each chip-select) */
-+      struct list_head host_list;
-+
-+      struct brcm_nand_dma_desc *dma_desc;
-+      dma_addr_t              dma_pa;
-+
-+      /* in-memory cache of the FLASH_CACHE, used only for some commands */
-+      u32                     flash_cache[FC_WORDS];
-+
-+      /* Controller revision details */
-+      const u16               *reg_offsets;
-+      unsigned int            reg_spacing; /* between CS1, CS2, ... regs */
-+      const u8                *cs_offsets; /* within each chip-select */
-+      const u8                *cs0_offsets; /* within CS0, if different */
-+      unsigned int            max_block_size;
-+      const unsigned int      *block_sizes;
-+      unsigned int            max_page_size;
-+      const unsigned int      *page_sizes;
-+      unsigned int            max_oob;
-+      u32                     features;
-+
-+      /* for low-power standby/resume only */
-+      u32                     nand_cs_nand_select;
-+      u32                     nand_cs_nand_xor;
-+      u32                     corr_stat_threshold;
-+      u32                     flash_dma_mode;
-+};
-+
-+struct brcmnand_cfg {
-+      u64                     device_size;
-+      unsigned int            block_size;
-+      unsigned int            page_size;
-+      unsigned int            spare_area_size;
-+      unsigned int            device_width;
-+      unsigned int            col_adr_bytes;
-+      unsigned int            blk_adr_bytes;
-+      unsigned int            ful_adr_bytes;
-+      unsigned int            sector_size_1k;
-+      unsigned int            ecc_level;
-+      /* use for low-power standby/resume only */
-+      u32                     acc_control;
-+      u32                     config;
-+      u32                     config_ext;
-+      u32                     timing_1;
-+      u32                     timing_2;
-+};
-+
-+struct brcmnand_host {
-+      struct list_head        node;
-+      struct device_node      *of_node;
-+
-+      struct nand_chip        chip;
-+      struct mtd_info         mtd;
-+      struct platform_device  *pdev;
-+      int                     cs;
-+
-+      unsigned int            last_cmd;
-+      unsigned int            last_byte;
-+      u64                     last_addr;
-+      struct brcmnand_cfg     hwcfg;
-+      struct brcmnand_controller *ctrl;
-+};
-+
-+enum brcmnand_reg {
-+      BRCMNAND_CMD_START = 0,
-+      BRCMNAND_CMD_EXT_ADDRESS,
-+      BRCMNAND_CMD_ADDRESS,
-+      BRCMNAND_INTFC_STATUS,
-+      BRCMNAND_CS_SELECT,
-+      BRCMNAND_CS_XOR,
-+      BRCMNAND_LL_OP,
-+      BRCMNAND_CS0_BASE,
-+      BRCMNAND_CS1_BASE,              /* CS1 regs, if non-contiguous */
-+      BRCMNAND_CORR_THRESHOLD,
-+      BRCMNAND_CORR_THRESHOLD_EXT,
-+      BRCMNAND_UNCORR_COUNT,
-+      BRCMNAND_CORR_COUNT,
-+      BRCMNAND_CORR_EXT_ADDR,
-+      BRCMNAND_CORR_ADDR,
-+      BRCMNAND_UNCORR_EXT_ADDR,
-+      BRCMNAND_UNCORR_ADDR,
-+      BRCMNAND_SEMAPHORE,
-+      BRCMNAND_ID,
-+      BRCMNAND_ID_EXT,
-+      BRCMNAND_LL_RDATA,
-+      BRCMNAND_OOB_READ_BASE,
-+      BRCMNAND_OOB_READ_10_BASE,      /* offset 0x10, if non-contiguous */
-+      BRCMNAND_OOB_WRITE_BASE,
-+      BRCMNAND_OOB_WRITE_10_BASE,     /* offset 0x10, if non-contiguous */
-+      BRCMNAND_FC_BASE,
-+};
-+
-+/* BRCMNAND v4.0 */
-+static const u16 brcmnand_regs_v40[] = {
-+      [BRCMNAND_CMD_START]            =  0x04,
-+      [BRCMNAND_CMD_EXT_ADDRESS]      =  0x08,
-+      [BRCMNAND_CMD_ADDRESS]          =  0x0c,
-+      [BRCMNAND_INTFC_STATUS]         =  0x6c,
-+      [BRCMNAND_CS_SELECT]            =  0x14,
-+      [BRCMNAND_CS_XOR]               =  0x18,
-+      [BRCMNAND_LL_OP]                = 0x178,
-+      [BRCMNAND_CS0_BASE]             =  0x40,
-+      [BRCMNAND_CS1_BASE]             =  0xd0,
-+      [BRCMNAND_CORR_THRESHOLD]       =  0x84,
-+      [BRCMNAND_CORR_THRESHOLD_EXT]   =     0,
-+      [BRCMNAND_UNCORR_COUNT]         =     0,
-+      [BRCMNAND_CORR_COUNT]           =     0,
-+      [BRCMNAND_CORR_EXT_ADDR]        =  0x70,
-+      [BRCMNAND_CORR_ADDR]            =  0x74,
-+      [BRCMNAND_UNCORR_EXT_ADDR]      =  0x78,
-+      [BRCMNAND_UNCORR_ADDR]          =  0x7c,
-+      [BRCMNAND_SEMAPHORE]            =  0x58,
-+      [BRCMNAND_ID]                   =  0x60,
-+      [BRCMNAND_ID_EXT]               =  0x64,
-+      [BRCMNAND_LL_RDATA]             = 0x17c,
-+      [BRCMNAND_OOB_READ_BASE]        =  0x20,
-+      [BRCMNAND_OOB_READ_10_BASE]     = 0x130,
-+      [BRCMNAND_OOB_WRITE_BASE]       =  0x30,
-+      [BRCMNAND_OOB_WRITE_10_BASE]    =     0,
-+      [BRCMNAND_FC_BASE]              = 0x200,
-+};
-+
-+/* BRCMNAND v5.0 */
-+static const u16 brcmnand_regs_v50[] = {
-+      [BRCMNAND_CMD_START]            =  0x04,
-+      [BRCMNAND_CMD_EXT_ADDRESS]      =  0x08,
-+      [BRCMNAND_CMD_ADDRESS]          =  0x0c,
-+      [BRCMNAND_INTFC_STATUS]         =  0x6c,
-+      [BRCMNAND_CS_SELECT]            =  0x14,
-+      [BRCMNAND_CS_XOR]               =  0x18,
-+      [BRCMNAND_LL_OP]                = 0x178,
-+      [BRCMNAND_CS0_BASE]             =  0x40,
-+      [BRCMNAND_CS1_BASE]             =  0xd0,
-+      [BRCMNAND_CORR_THRESHOLD]       =  0x84,
-+      [BRCMNAND_CORR_THRESHOLD_EXT]   =     0,
-+      [BRCMNAND_UNCORR_COUNT]         =     0,
-+      [BRCMNAND_CORR_COUNT]           =     0,
-+      [BRCMNAND_CORR_EXT_ADDR]        =  0x70,
-+      [BRCMNAND_CORR_ADDR]            =  0x74,
-+      [BRCMNAND_UNCORR_EXT_ADDR]      =  0x78,
-+      [BRCMNAND_UNCORR_ADDR]          =  0x7c,
-+      [BRCMNAND_SEMAPHORE]            =  0x58,
-+      [BRCMNAND_ID]                   =  0x60,
-+      [BRCMNAND_ID_EXT]               =  0x64,
-+      [BRCMNAND_LL_RDATA]             = 0x17c,
-+      [BRCMNAND_OOB_READ_BASE]        =  0x20,
-+      [BRCMNAND_OOB_READ_10_BASE]     = 0x130,
-+      [BRCMNAND_OOB_WRITE_BASE]       =  0x30,
-+      [BRCMNAND_OOB_WRITE_10_BASE]    = 0x140,
-+      [BRCMNAND_FC_BASE]              = 0x200,
-+};
-+
-+/* BRCMNAND v6.0 - v7.1 */
-+static const u16 brcmnand_regs_v60[] = {
-+      [BRCMNAND_CMD_START]            =  0x04,
-+      [BRCMNAND_CMD_EXT_ADDRESS]      =  0x08,
-+      [BRCMNAND_CMD_ADDRESS]          =  0x0c,
-+      [BRCMNAND_INTFC_STATUS]         =  0x14,
-+      [BRCMNAND_CS_SELECT]            =  0x18,
-+      [BRCMNAND_CS_XOR]               =  0x1c,
-+      [BRCMNAND_LL_OP]                =  0x20,
-+      [BRCMNAND_CS0_BASE]             =  0x50,
-+      [BRCMNAND_CS1_BASE]             =     0,
-+      [BRCMNAND_CORR_THRESHOLD]       =  0xc0,
-+      [BRCMNAND_CORR_THRESHOLD_EXT]   =  0xc4,
-+      [BRCMNAND_UNCORR_COUNT]         =  0xfc,
-+      [BRCMNAND_CORR_COUNT]           = 0x100,
-+      [BRCMNAND_CORR_EXT_ADDR]        = 0x10c,
-+      [BRCMNAND_CORR_ADDR]            = 0x110,
-+      [BRCMNAND_UNCORR_EXT_ADDR]      = 0x114,
-+      [BRCMNAND_UNCORR_ADDR]          = 0x118,
-+      [BRCMNAND_SEMAPHORE]            = 0x150,
-+      [BRCMNAND_ID]                   = 0x194,
-+      [BRCMNAND_ID_EXT]               = 0x198,
-+      [BRCMNAND_LL_RDATA]             = 0x19c,
-+      [BRCMNAND_OOB_READ_BASE]        = 0x200,
-+      [BRCMNAND_OOB_READ_10_BASE]     =     0,
-+      [BRCMNAND_OOB_WRITE_BASE]       = 0x280,
-+      [BRCMNAND_OOB_WRITE_10_BASE]    =     0,
-+      [BRCMNAND_FC_BASE]              = 0x400,
-+};
-+
-+enum brcmnand_cs_reg {
-+      BRCMNAND_CS_CFG_EXT = 0,
-+      BRCMNAND_CS_CFG,
-+      BRCMNAND_CS_ACC_CONTROL,
-+      BRCMNAND_CS_TIMING1,
-+      BRCMNAND_CS_TIMING2,
-+};
-+
-+/* Per chip-select offsets for v7.1 */
-+static const u8 brcmnand_cs_offsets_v71[] = {
-+      [BRCMNAND_CS_ACC_CONTROL]       = 0x00,
-+      [BRCMNAND_CS_CFG_EXT]           = 0x04,
-+      [BRCMNAND_CS_CFG]               = 0x08,
-+      [BRCMNAND_CS_TIMING1]           = 0x0c,
-+      [BRCMNAND_CS_TIMING2]           = 0x10,
-+};
-+
-+/* Per chip-select offsets for pre v7.1, except CS0 on <= v5.0 */
-+static const u8 brcmnand_cs_offsets[] = {
-+      [BRCMNAND_CS_ACC_CONTROL]       = 0x00,
-+      [BRCMNAND_CS_CFG_EXT]           = 0x04,
-+      [BRCMNAND_CS_CFG]               = 0x04,
-+      [BRCMNAND_CS_TIMING1]           = 0x08,
-+      [BRCMNAND_CS_TIMING2]           = 0x0c,
-+};
-+
-+/* Per chip-select offset for <= v5.0 on CS0 only */
-+static const u8 brcmnand_cs_offsets_cs0[] = {
-+      [BRCMNAND_CS_ACC_CONTROL]       = 0x00,
-+      [BRCMNAND_CS_CFG_EXT]           = 0x08,
-+      [BRCMNAND_CS_CFG]               = 0x08,
-+      [BRCMNAND_CS_TIMING1]           = 0x10,
-+      [BRCMNAND_CS_TIMING2]           = 0x14,
-+};
-+
-+/* BRCMNAND_INTFC_STATUS */
-+enum {
-+      INTFC_FLASH_STATUS              = GENMASK(7, 0),
-+
-+      INTFC_ERASED                    = BIT(27),
-+      INTFC_OOB_VALID                 = BIT(28),
-+      INTFC_CACHE_VALID               = BIT(29),
-+      INTFC_FLASH_READY               = BIT(30),
-+      INTFC_CTLR_READY                = BIT(31),
-+};
-+
-+static inline u32 nand_readreg(struct brcmnand_controller *ctrl, u32 offs)
-+{
-+      return brcmnand_readl(ctrl->nand_base + offs);
-+}
-+
-+static inline void nand_writereg(struct brcmnand_controller *ctrl, u32 offs,
-+                               u32 val)
-+{
-+      brcmnand_writel(val, ctrl->nand_base + offs);
-+}
-+
-+static int brcmnand_revision_init(struct brcmnand_controller *ctrl)
-+{
-+      static const unsigned int block_sizes_v6[] = { 8, 16, 128, 256, 512, 1024, 2048, 0 };
-+      static const unsigned int block_sizes_v4[] = { 16, 128, 8, 512, 256, 1024, 2048, 0 };
-+      static const unsigned int page_sizes[] = { 512, 2048, 4096, 8192, 0 };
-+
-+      ctrl->nand_version = nand_readreg(ctrl, 0) & 0xffff;
-+
-+      /* Only support v4.0+? */
-+      if (ctrl->nand_version < 0x0400) {
-+              dev_err(ctrl->dev, "version %#x not supported\n",
-+                      ctrl->nand_version);
-+              return -ENODEV;
-+      }
-+
-+      /* Register offsets */
-+      if (ctrl->nand_version >= 0x0600)
-+              ctrl->reg_offsets = brcmnand_regs_v60;
-+      else if (ctrl->nand_version >= 0x0500)
-+              ctrl->reg_offsets = brcmnand_regs_v50;
-+      else if (ctrl->nand_version >= 0x0400)
-+              ctrl->reg_offsets = brcmnand_regs_v40;
-+
-+      /* Chip-select stride */
-+      if (ctrl->nand_version >= 0x0701)
-+              ctrl->reg_spacing = 0x14;
-+      else
-+              ctrl->reg_spacing = 0x10;
-+
-+      /* Per chip-select registers */
-+      if (ctrl->nand_version >= 0x0701) {
-+              ctrl->cs_offsets = brcmnand_cs_offsets_v71;
-+      } else {
-+              ctrl->cs_offsets = brcmnand_cs_offsets;
-+
-+              /* v5.0 and earlier has a different CS0 offset layout */
-+              if (ctrl->nand_version <= 0x0500)
-+                      ctrl->cs0_offsets = brcmnand_cs_offsets_cs0;
-+      }
-+
-+      /* Page / block sizes */
-+      if (ctrl->nand_version >= 0x0701) {
-+              /* >= v7.1 use nice power-of-2 values! */
-+              ctrl->max_page_size = 16 * 1024;
-+              ctrl->max_block_size = 2 * 1024 * 1024;
-+      } else {
-+              ctrl->page_sizes = page_sizes;
-+              if (ctrl->nand_version >= 0x0600)
-+                      ctrl->block_sizes = block_sizes_v6;
-+              else
-+                      ctrl->block_sizes = block_sizes_v4;
-+
-+              if (ctrl->nand_version < 0x0400) {
-+                      ctrl->max_page_size = 4096;
-+                      ctrl->max_block_size = 512 * 1024;
-+              }
-+      }
-+
-+      /* Maximum spare area sector size (per 512B) */
-+      if (ctrl->nand_version >= 0x0600)
-+              ctrl->max_oob = 64;
-+      else if (ctrl->nand_version >= 0x0500)
-+              ctrl->max_oob = 32;
-+      else
-+              ctrl->max_oob = 16;
-+
-+      /* v6.0 and newer (except v6.1) have prefetch support */
-+      if (ctrl->nand_version >= 0x0600 && ctrl->nand_version != 0x0601)
-+              ctrl->features |= BRCMNAND_HAS_PREFETCH;
-+
-+      /*
-+       * v6.x has cache mode, but it's implemented differently. Ignore it for
-+       * now.
-+       */
-+      if (ctrl->nand_version >= 0x0700)
-+              ctrl->features |= BRCMNAND_HAS_CACHE_MODE;
-+
-+      if (ctrl->nand_version >= 0x0500)
-+              ctrl->features |= BRCMNAND_HAS_1K_SECTORS;
-+
-+      if (ctrl->nand_version >= 0x0700)
-+              ctrl->features |= BRCMNAND_HAS_WP;
-+      else if (of_property_read_bool(ctrl->dev->of_node, "brcm,nand-has-wp"))
-+              ctrl->features |= BRCMNAND_HAS_WP;
-+
-+      return 0;
-+}
-+
-+static inline u32 brcmnand_read_reg(struct brcmnand_controller *ctrl,
-+              enum brcmnand_reg reg)
-+{
-+      u16 offs = ctrl->reg_offsets[reg];
-+
-+      if (offs)
-+              return nand_readreg(ctrl, offs);
-+      else
-+              return 0;
-+}
-+
-+static inline void brcmnand_write_reg(struct brcmnand_controller *ctrl,
-+                                    enum brcmnand_reg reg, u32 val)
-+{
-+      u16 offs = ctrl->reg_offsets[reg];
-+
-+      if (offs)
-+              nand_writereg(ctrl, offs, val);
-+}
-+
-+static inline void brcmnand_rmw_reg(struct brcmnand_controller *ctrl,
-+                                  enum brcmnand_reg reg, u32 mask, unsigned
-+                                  int shift, u32 val)
-+{
-+      u32 tmp = brcmnand_read_reg(ctrl, reg);
-+
-+      tmp &= ~mask;
-+      tmp |= val << shift;
-+      brcmnand_write_reg(ctrl, reg, tmp);
-+}
-+
-+static inline u32 brcmnand_read_fc(struct brcmnand_controller *ctrl, int word)
-+{
-+      return __raw_readl(ctrl->nand_fc + word * 4);
-+}
-+
-+static inline void brcmnand_write_fc(struct brcmnand_controller *ctrl,
-+                                   int word, u32 val)
-+{
-+      __raw_writel(val, ctrl->nand_fc + word * 4);
-+}
-+
-+static inline u16 brcmnand_cs_offset(struct brcmnand_controller *ctrl, int cs,
-+                                   enum brcmnand_cs_reg reg)
-+{
-+      u16 offs_cs0 = ctrl->reg_offsets[BRCMNAND_CS0_BASE];
-+      u16 offs_cs1 = ctrl->reg_offsets[BRCMNAND_CS1_BASE];
-+      u8 cs_offs;
-+
-+      if (cs == 0 && ctrl->cs0_offsets)
-+              cs_offs = ctrl->cs0_offsets[reg];
-+      else
-+              cs_offs = ctrl->cs_offsets[reg];
-+
-+      if (cs && offs_cs1)
-+              return offs_cs1 + (cs - 1) * ctrl->reg_spacing + cs_offs;
-+
-+      return offs_cs0 + cs * ctrl->reg_spacing + cs_offs;
-+}
-+
-+static inline u32 brcmnand_count_corrected(struct brcmnand_controller *ctrl)
-+{
-+      if (ctrl->nand_version < 0x0600)
-+              return 1;
-+      return brcmnand_read_reg(ctrl, BRCMNAND_CORR_COUNT);
-+}
-+
-+static void brcmnand_wr_corr_thresh(struct brcmnand_host *host, u8 val)
-+{
-+      struct brcmnand_controller *ctrl = host->ctrl;
-+      unsigned int shift = 0, bits;
-+      enum brcmnand_reg reg = BRCMNAND_CORR_THRESHOLD;
-+      int cs = host->cs;
-+
-+      if (ctrl->nand_version >= 0x0600)
-+              bits = 6;
-+      else if (ctrl->nand_version >= 0x0500)
-+              bits = 5;
-+      else
-+              bits = 4;
-+
-+      if (ctrl->nand_version >= 0x0600) {
-+              if (cs >= 5)
-+                      reg = BRCMNAND_CORR_THRESHOLD_EXT;
-+              shift = (cs % 5) * bits;
-+      }
-+      brcmnand_rmw_reg(ctrl, reg, (bits - 1) << shift, shift, val);
-+}
-+
-+static inline int brcmnand_cmd_shift(struct brcmnand_controller *ctrl)
-+{
-+      if (ctrl->nand_version < 0x0700)
-+              return 24;
-+      return 0;
-+}
-+
-+/***********************************************************************
-+ * NAND ACC CONTROL bitfield
-+ *
-+ * Some bits have remained constant throughout hardware revision, while
-+ * others have shifted around.
-+ ***********************************************************************/
-+
-+/* Constant for all versions (where supported) */
-+enum {
-+      /* See BRCMNAND_HAS_CACHE_MODE */
-+      ACC_CONTROL_CACHE_MODE                          = BIT(22),
-+
-+      /* See BRCMNAND_HAS_PREFETCH */
-+      ACC_CONTROL_PREFETCH                            = BIT(23),
-+
-+      ACC_CONTROL_PAGE_HIT                            = BIT(24),
-+      ACC_CONTROL_WR_PREEMPT                          = BIT(25),
-+      ACC_CONTROL_PARTIAL_PAGE                        = BIT(26),
-+      ACC_CONTROL_RD_ERASED                           = BIT(27),
-+      ACC_CONTROL_FAST_PGM_RDIN                       = BIT(28),
-+      ACC_CONTROL_WR_ECC                              = BIT(30),
-+      ACC_CONTROL_RD_ECC                              = BIT(31),
-+};
-+
-+static inline u32 brcmnand_spare_area_mask(struct brcmnand_controller *ctrl)
-+{
-+      if (ctrl->nand_version >= 0x0600)
-+              return GENMASK(6, 0);
-+      else
-+              return GENMASK(5, 0);
-+}
-+
-+#define NAND_ACC_CONTROL_ECC_SHIFT    16
-+
-+static inline u32 brcmnand_ecc_level_mask(struct brcmnand_controller *ctrl)
-+{
-+      u32 mask = (ctrl->nand_version >= 0x0600) ? 0x1f : 0x0f;
-+
-+      return mask << NAND_ACC_CONTROL_ECC_SHIFT;
-+}
-+
-+static void brcmnand_set_ecc_enabled(struct brcmnand_host *host, int en)
-+{
-+      struct brcmnand_controller *ctrl = host->ctrl;
-+      u16 offs = brcmnand_cs_offset(ctrl, host->cs, BRCMNAND_CS_ACC_CONTROL);
-+      u32 acc_control = nand_readreg(ctrl, offs);
-+      u32 ecc_flags = ACC_CONTROL_WR_ECC | ACC_CONTROL_RD_ECC;
-+
-+      if (en) {
-+              acc_control |= ecc_flags; /* enable RD/WR ECC */
-+              acc_control |= host->hwcfg.ecc_level
-+                             << NAND_ACC_CONTROL_ECC_SHIFT;
-+      } else {
-+              acc_control &= ~ecc_flags; /* disable RD/WR ECC */
-+              acc_control &= ~brcmnand_ecc_level_mask(ctrl);
-+      }
-+
-+      nand_writereg(ctrl, offs, acc_control);
-+}
-+
-+static inline int brcmnand_sector_1k_shift(struct brcmnand_controller *ctrl)
-+{
-+      if (ctrl->nand_version >= 0x0600)
-+              return 7;
-+      else if (ctrl->nand_version >= 0x0500)
-+              return 6;
-+      else
-+              return -1;
-+}
-+
-+static int brcmnand_get_sector_size_1k(struct brcmnand_host *host)
-+{
-+      struct brcmnand_controller *ctrl = host->ctrl;
-+      int shift = brcmnand_sector_1k_shift(ctrl);
-+      u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs,
-+                                                BRCMNAND_CS_ACC_CONTROL);
-+
-+      if (shift < 0)
-+              return 0;
-+
-+      return (nand_readreg(ctrl, acc_control_offs) >> shift) & 0x1;
-+}
-+
-+static void brcmnand_set_sector_size_1k(struct brcmnand_host *host, int val)
-+{
-+      struct brcmnand_controller *ctrl = host->ctrl;
-+      int shift = brcmnand_sector_1k_shift(ctrl);
-+      u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs,
-+                                                BRCMNAND_CS_ACC_CONTROL);
-+      u32 tmp;
-+
-+      if (shift < 0)
-+              return;
-+
-+      tmp = nand_readreg(ctrl, acc_control_offs);
-+      tmp &= ~(1 << shift);
-+      tmp |= (!!val) << shift;
-+      nand_writereg(ctrl, acc_control_offs, tmp);
-+}
-+
-+/***********************************************************************
-+ * CS_NAND_SELECT
-+ ***********************************************************************/
-+
-+enum {
-+      CS_SELECT_NAND_WP                       = BIT(29),
-+      CS_SELECT_AUTO_DEVICE_ID_CFG            = BIT(30),
-+};
-+
-+static inline void brcmnand_set_wp(struct brcmnand_controller *ctrl, bool en)
-+{
-+      u32 val = en ? CS_SELECT_NAND_WP : 0;
-+
-+      brcmnand_rmw_reg(ctrl, BRCMNAND_CS_SELECT, CS_SELECT_NAND_WP, 0, val);
-+}
-+
-+/***********************************************************************
-+ * Flash DMA
-+ ***********************************************************************/
-+
-+enum flash_dma_reg {
-+      FLASH_DMA_REVISION              = 0x00,
-+      FLASH_DMA_FIRST_DESC            = 0x04,
-+      FLASH_DMA_FIRST_DESC_EXT        = 0x08,
-+      FLASH_DMA_CTRL                  = 0x0c,
-+      FLASH_DMA_MODE                  = 0x10,
-+      FLASH_DMA_STATUS                = 0x14,
-+      FLASH_DMA_INTERRUPT_DESC        = 0x18,
-+      FLASH_DMA_INTERRUPT_DESC_EXT    = 0x1c,
-+      FLASH_DMA_ERROR_STATUS          = 0x20,
-+      FLASH_DMA_CURRENT_DESC          = 0x24,
-+      FLASH_DMA_CURRENT_DESC_EXT      = 0x28,
-+};
-+
-+static inline bool has_flash_dma(struct brcmnand_controller *ctrl)
-+{
-+      return ctrl->flash_dma_base;
-+}
-+
-+static inline bool flash_dma_buf_ok(const void *buf)
-+{
-+      return buf && !is_vmalloc_addr(buf) &&
-+              likely(IS_ALIGNED((uintptr_t)buf, 4));
-+}
-+
-+static inline void flash_dma_writel(struct brcmnand_controller *ctrl, u8 offs,
-+                                  u32 val)
-+{
-+      brcmnand_writel(val, ctrl->flash_dma_base + offs);
-+}
-+
-+static inline u32 flash_dma_readl(struct brcmnand_controller *ctrl, u8 offs)
-+{
-+      return brcmnand_readl(ctrl->flash_dma_base + offs);
-+}
-+
-+/* Low-level operation types: command, address, write, or read */
-+enum brcmnand_llop_type {
-+      LL_OP_CMD,
-+      LL_OP_ADDR,
-+      LL_OP_WR,
-+      LL_OP_RD,
-+};
-+
-+/***********************************************************************
-+ * Internal support functions
-+ ***********************************************************************/
-+
-+static inline bool is_hamming_ecc(struct brcmnand_cfg *cfg)
-+{
-+      return cfg->sector_size_1k == 0 && cfg->spare_area_size == 16 &&
-+              cfg->ecc_level == 15;
-+}
-+
-+/*
-+ * Returns a nand_ecclayout strucutre for the given layout/configuration.
-+ * Returns NULL on failure.
-+ */
-+static struct nand_ecclayout *brcmnand_create_layout(int ecc_level,
-+                                                   struct brcmnand_host *host)
-+{
-+      struct brcmnand_cfg *cfg = &host->hwcfg;
-+      int i, j;
-+      struct nand_ecclayout *layout;
-+      int req;
-+      int sectors;
-+      int sas;
-+      int idx1, idx2;
-+
-+      layout = devm_kzalloc(&host->pdev->dev, sizeof(*layout), GFP_KERNEL);
-+      if (!layout)
-+              return NULL;
-+
-+      sectors = cfg->page_size / (512 << cfg->sector_size_1k);
-+      sas = cfg->spare_area_size << cfg->sector_size_1k;
-+
-+      /* Hamming */
-+      if (is_hamming_ecc(cfg)) {
-+              for (i = 0, idx1 = 0, idx2 = 0; i < sectors; i++) {
-+                      /* First sector of each page may have BBI */
-+                      if (i == 0) {
-+                              layout->oobfree[idx2].offset = i * sas + 1;
-+                              /* Small-page NAND use byte 6 for BBI */
-+                              if (cfg->page_size == 512)
-+                                      layout->oobfree[idx2].offset--;
-+                              layout->oobfree[idx2].length = 5;
-+                      } else {
-+                              layout->oobfree[idx2].offset = i * sas;
-+                              layout->oobfree[idx2].length = 6;
-+                      }
-+                      idx2++;
-+                      layout->eccpos[idx1++] = i * sas + 6;
-+                      layout->eccpos[idx1++] = i * sas + 7;
-+                      layout->eccpos[idx1++] = i * sas + 8;
-+                      layout->oobfree[idx2].offset = i * sas + 9;
-+                      layout->oobfree[idx2].length = 7;
-+                      idx2++;
-+                      /* Leave zero-terminated entry for OOBFREE */
-+                      if (idx1 >= MTD_MAX_ECCPOS_ENTRIES_LARGE ||
-+                                  idx2 >= MTD_MAX_OOBFREE_ENTRIES_LARGE - 1)
-+                              break;
-+              }
-+              goto out;
-+      }
-+
-+      /*
-+       * CONTROLLER_VERSION:
-+       *   < v5.0: ECC_REQ = ceil(BCH_T * 13/8)
-+       *  >= v5.0: ECC_REQ = ceil(BCH_T * 14/8)
-+       * But we will just be conservative.
-+       */
-+      req = DIV_ROUND_UP(ecc_level * 14, 8);
-+      if (req >= sas) {
-+              dev_err(&host->pdev->dev,
-+                      "error: ECC too large for OOB (ECC bytes %d, spare sector %d)\n",
-+                      req, sas);
-+              return NULL;
-+      }
-+
-+      layout->eccbytes = req * sectors;
-+      for (i = 0, idx1 = 0, idx2 = 0; i < sectors; i++) {
-+              for (j = sas - req; j < sas && idx1 <
-+                              MTD_MAX_ECCPOS_ENTRIES_LARGE; j++, idx1++)
-+                      layout->eccpos[idx1] = i * sas + j;
-+
-+              /* First sector of each page may have BBI */
-+              if (i == 0) {
-+                      if (cfg->page_size == 512 && (sas - req >= 6)) {
-+                              /* Small-page NAND use byte 6 for BBI */
-+                              layout->oobfree[idx2].offset = 0;
-+                              layout->oobfree[idx2].length = 5;
-+                              idx2++;
-+                              if (sas - req > 6) {
-+                                      layout->oobfree[idx2].offset = 6;
-+                                      layout->oobfree[idx2].length =
-+                                              sas - req - 6;
-+                                      idx2++;
-+                              }
-+                      } else if (sas > req + 1) {
-+                              layout->oobfree[idx2].offset = i * sas + 1;
-+                              layout->oobfree[idx2].length = sas - req - 1;
-+                              idx2++;
-+                      }
-+              } else if (sas > req) {
-+                      layout->oobfree[idx2].offset = i * sas;
-+                      layout->oobfree[idx2].length = sas - req;
-+                      idx2++;
-+              }
-+              /* Leave zero-terminated entry for OOBFREE */
-+              if (idx1 >= MTD_MAX_ECCPOS_ENTRIES_LARGE ||
-+                              idx2 >= MTD_MAX_OOBFREE_ENTRIES_LARGE - 1)
-+                      break;
-+      }
-+out:
-+      /* Sum available OOB */
-+      for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES_LARGE; i++)
-+              layout->oobavail += layout->oobfree[i].length;
-+      return layout;
-+}
-+
-+static struct nand_ecclayout *brcmstb_choose_ecc_layout(
-+              struct brcmnand_host *host)
-+{
-+      struct nand_ecclayout *layout;
-+      struct brcmnand_cfg *p = &host->hwcfg;
-+      unsigned int ecc_level = p->ecc_level;
-+
-+      if (p->sector_size_1k)
-+              ecc_level <<= 1;
-+
-+      layout = brcmnand_create_layout(ecc_level, host);
-+      if (!layout) {
-+              dev_err(&host->pdev->dev,
-+                              "no proper ecc_layout for this NAND cfg\n");
-+              return NULL;
-+      }
-+
-+      return layout;
-+}
-+
-+static void brcmnand_wp(struct mtd_info *mtd, int wp)
-+{
-+      struct nand_chip *chip = mtd->priv;
-+      struct brcmnand_host *host = chip->priv;
-+      struct brcmnand_controller *ctrl = host->ctrl;
-+
-+      if ((ctrl->features & BRCMNAND_HAS_WP) && wp_on == 1) {
-+              static int old_wp = -1;
-+
-+              if (old_wp != wp) {
-+                      dev_dbg(ctrl->dev, "WP %s\n", wp ? "on" : "off");
-+                      old_wp = wp;
-+              }
-+              brcmnand_set_wp(ctrl, wp);
-+      }
-+}
-+
-+/* Helper functions for reading and writing OOB registers */
-+static inline u8 oob_reg_read(struct brcmnand_controller *ctrl, u32 offs)
-+{
-+      u16 offset0, offset10, reg_offs;
-+
-+      offset0 = ctrl->reg_offsets[BRCMNAND_OOB_READ_BASE];
-+      offset10 = ctrl->reg_offsets[BRCMNAND_OOB_READ_10_BASE];
-+
-+      if (offs >= ctrl->max_oob)
-+              return 0x77;
-+
-+      if (offs >= 16 && offset10)
-+              reg_offs = offset10 + ((offs - 0x10) & ~0x03);
-+      else
-+              reg_offs = offset0 + (offs & ~0x03);
-+
-+      return nand_readreg(ctrl, reg_offs) >> (24 - ((offs & 0x03) << 3));
-+}
-+
-+static inline void oob_reg_write(struct brcmnand_controller *ctrl, u32 offs,
-+                               u32 data)
-+{
-+      u16 offset0, offset10, reg_offs;
-+
-+      offset0 = ctrl->reg_offsets[BRCMNAND_OOB_WRITE_BASE];
-+      offset10 = ctrl->reg_offsets[BRCMNAND_OOB_WRITE_10_BASE];
-+
-+      if (offs >= ctrl->max_oob)
-+              return;
-+
-+      if (offs >= 16 && offset10)
-+              reg_offs = offset10 + ((offs - 0x10) & ~0x03);
-+      else
-+              reg_offs = offset0 + (offs & ~0x03);
-+
-+      nand_writereg(ctrl, reg_offs, data);
-+}
-+
-+/*
-+ * read_oob_from_regs - read data from OOB registers
-+ * @ctrl: NAND controller
-+ * @i: sub-page sector index
-+ * @oob: buffer to read to
-+ * @sas: spare area sector size (i.e., OOB size per FLASH_CACHE)
-+ * @sector_1k: 1 for 1KiB sectors, 0 for 512B, other values are illegal
-+ */
-+static int read_oob_from_regs(struct brcmnand_controller *ctrl, int i, u8 *oob,
-+                            int sas, int sector_1k)
-+{
-+      int tbytes = sas << sector_1k;
-+      int j;
-+
-+      /* Adjust OOB values for 1K sector size */
-+      if (sector_1k && (i & 0x01))
-+              tbytes = max(0, tbytes - (int)ctrl->max_oob);
-+      tbytes = min_t(int, tbytes, ctrl->max_oob);
-+
-+      for (j = 0; j < tbytes; j++)
-+              oob[j] = oob_reg_read(ctrl, j);
-+      return tbytes;
-+}
-+
-+/*
-+ * write_oob_to_regs - write data to OOB registers
-+ * @i: sub-page sector index
-+ * @oob: buffer to write from
-+ * @sas: spare area sector size (i.e., OOB size per FLASH_CACHE)
-+ * @sector_1k: 1 for 1KiB sectors, 0 for 512B, other values are illegal
-+ */
-+static int write_oob_to_regs(struct brcmnand_controller *ctrl, int i,
-+                           const u8 *oob, int sas, int sector_1k)
-+{
-+      int tbytes = sas << sector_1k;
-+      int j;
-+
-+      /* Adjust OOB values for 1K sector size */
-+      if (sector_1k && (i & 0x01))
-+              tbytes = max(0, tbytes - (int)ctrl->max_oob);
-+      tbytes = min_t(int, tbytes, ctrl->max_oob);
-+
-+      for (j = 0; j < tbytes; j += 4)
-+              oob_reg_write(ctrl, j,
-+                              (oob[j + 0] << 24) |
-+                              (oob[j + 1] << 16) |
-+                              (oob[j + 2] <<  8) |
-+                              (oob[j + 3] <<  0));
-+      return tbytes;
-+}
-+
-+static irqreturn_t brcmnand_ctlrdy_irq(int irq, void *data)
-+{
-+      struct brcmnand_controller *ctrl = data;
-+
-+      /* Discard all NAND_CTLRDY interrupts during DMA */
-+      if (ctrl->dma_pending)
-+              return IRQ_HANDLED;
-+
-+      complete(&ctrl->done);
-+      return IRQ_HANDLED;
-+}
-+
-+/* Handle SoC-specific interrupt hardware */
-+static irqreturn_t brcmnand_irq(int irq, void *data)
-+{
-+      struct brcmnand_controller *ctrl = data;
-+
-+      if (ctrl->soc->ctlrdy_ack(ctrl->soc))
-+              return brcmnand_ctlrdy_irq(irq, data);
-+
-+      return IRQ_NONE;
-+}
-+
-+static irqreturn_t brcmnand_dma_irq(int irq, void *data)
-+{
-+      struct brcmnand_controller *ctrl = data;
-+
-+      complete(&ctrl->dma_done);
-+
-+      return IRQ_HANDLED;
-+}
-+
-+static void brcmnand_send_cmd(struct brcmnand_host *host, int cmd)
-+{
-+      struct brcmnand_controller *ctrl = host->ctrl;
-+      u32 intfc;
-+
-+      dev_dbg(ctrl->dev, "send native cmd %d addr_lo 0x%x\n", cmd,
-+              brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS));
-+      BUG_ON(ctrl->cmd_pending != 0);
-+      ctrl->cmd_pending = cmd;
-+
-+      intfc = brcmnand_read_reg(ctrl, BRCMNAND_INTFC_STATUS);
-+      BUG_ON(!(intfc & INTFC_CTLR_READY));
-+
-+      mb(); /* flush previous writes */
-+      brcmnand_write_reg(ctrl, BRCMNAND_CMD_START,
-+                         cmd << brcmnand_cmd_shift(ctrl));
-+}
-+
-+/***********************************************************************
-+ * NAND MTD API: read/program/erase
-+ ***********************************************************************/
-+
-+static void brcmnand_cmd_ctrl(struct mtd_info *mtd, int dat,
-+      unsigned int ctrl)
-+{
-+      /* intentionally left blank */
-+}
-+
-+static int brcmnand_waitfunc(struct mtd_info *mtd, struct nand_chip *this)
-+{
-+      struct nand_chip *chip = mtd->priv;
-+      struct brcmnand_host *host = chip->priv;
-+      struct brcmnand_controller *ctrl = host->ctrl;
-+      unsigned long timeo = msecs_to_jiffies(100);
-+
-+      dev_dbg(ctrl->dev, "wait on native cmd %d\n", ctrl->cmd_pending);
-+      if (ctrl->cmd_pending &&
-+                      wait_for_completion_timeout(&ctrl->done, timeo) <= 0) {
-+              u32 cmd = brcmnand_read_reg(ctrl, BRCMNAND_CMD_START)
-+                                      >> brcmnand_cmd_shift(ctrl);
-+
-+              dev_err_ratelimited(ctrl->dev,
-+                      "timeout waiting for command %#02x\n", cmd);
-+              dev_err_ratelimited(ctrl->dev, "intfc status %08x\n",
-+                      brcmnand_read_reg(ctrl, BRCMNAND_INTFC_STATUS));
-+      }
-+      ctrl->cmd_pending = 0;
-+      return brcmnand_read_reg(ctrl, BRCMNAND_INTFC_STATUS) &
-+                               INTFC_FLASH_STATUS;
-+}
-+
-+enum {
-+      LLOP_RE                         = BIT(16),
-+      LLOP_WE                         = BIT(17),
-+      LLOP_ALE                        = BIT(18),
-+      LLOP_CLE                        = BIT(19),
-+      LLOP_RETURN_IDLE                = BIT(31),
-+
-+      LLOP_DATA_MASK                  = GENMASK(15, 0),
-+};
-+
-+static int brcmnand_low_level_op(struct brcmnand_host *host,
-+                               enum brcmnand_llop_type type, u32 data,
-+                               bool last_op)
-+{
-+      struct mtd_info *mtd = &host->mtd;
-+      struct nand_chip *chip = &host->chip;
-+      struct brcmnand_controller *ctrl = host->ctrl;
-+      u32 tmp;
-+
-+      tmp = data & LLOP_DATA_MASK;
-+      switch (type) {
-+      case LL_OP_CMD:
-+              tmp |= LLOP_WE | LLOP_CLE;
-+              break;
-+      case LL_OP_ADDR:
-+              /* WE | ALE */
-+              tmp |= LLOP_WE | LLOP_ALE;
-+              break;
-+      case LL_OP_WR:
-+              /* WE */
-+              tmp |= LLOP_WE;
-+              break;
-+      case LL_OP_RD:
-+              /* RE */
-+              tmp |= LLOP_RE;
-+              break;
-+      }
-+      if (last_op)
-+              /* RETURN_IDLE */
-+              tmp |= LLOP_RETURN_IDLE;
-+
-+      dev_dbg(ctrl->dev, "ll_op cmd %#x\n", tmp);
-+
-+      brcmnand_write_reg(ctrl, BRCMNAND_LL_OP, tmp);
-+      (void)brcmnand_read_reg(ctrl, BRCMNAND_LL_OP);
-+
-+      brcmnand_send_cmd(host, CMD_LOW_LEVEL_OP);
-+      return brcmnand_waitfunc(mtd, chip);
-+}
-+
-+static void brcmnand_cmdfunc(struct mtd_info *mtd, unsigned command,
-+                           int column, int page_addr)
-+{
-+      struct nand_chip *chip = mtd->priv;
-+      struct brcmnand_host *host = chip->priv;
-+      struct brcmnand_controller *ctrl = host->ctrl;
-+      u64 addr = (u64)page_addr << chip->page_shift;
-+      int native_cmd = 0;
-+
-+      if (command == NAND_CMD_READID || command == NAND_CMD_PARAM ||
-+                      command == NAND_CMD_RNDOUT)
-+              addr = (u64)column;
-+      /* Avoid propagating a negative, don't-care address */
-+      else if (page_addr < 0)
-+              addr = 0;
-+
-+      dev_dbg(ctrl->dev, "cmd 0x%x addr 0x%llx\n", command,
-+              (unsigned long long)addr);
-+
-+      host->last_cmd = command;
-+      host->last_byte = 0;
-+      host->last_addr = addr;
-+
-+      switch (command) {
-+      case NAND_CMD_RESET:
-+              native_cmd = CMD_FLASH_RESET;
-+              break;
-+      case NAND_CMD_STATUS:
-+              native_cmd = CMD_STATUS_READ;
-+              break;
-+      case NAND_CMD_READID:
-+              native_cmd = CMD_DEVICE_ID_READ;
-+              break;
-+      case NAND_CMD_READOOB:
-+              native_cmd = CMD_SPARE_AREA_READ;
-+              break;
-+      case NAND_CMD_ERASE1:
-+              native_cmd = CMD_BLOCK_ERASE;
-+              brcmnand_wp(mtd, 0);
-+              break;
-+      case NAND_CMD_PARAM:
-+              native_cmd = CMD_PARAMETER_READ;
-+              break;
-+      case NAND_CMD_SET_FEATURES:
-+      case NAND_CMD_GET_FEATURES:
-+              brcmnand_low_level_op(host, LL_OP_CMD, command, false);
-+              brcmnand_low_level_op(host, LL_OP_ADDR, column, false);
-+              break;
-+      case NAND_CMD_RNDOUT:
-+              native_cmd = CMD_PARAMETER_CHANGE_COL;
-+              addr &= ~((u64)(FC_BYTES - 1));
-+              /*
-+               * HW quirk: PARAMETER_CHANGE_COL requires SECTOR_SIZE_1K=0
-+               * NB: hwcfg.sector_size_1k may not be initialized yet
-+               */
-+              if (brcmnand_get_sector_size_1k(host)) {
-+                      host->hwcfg.sector_size_1k =
-+                              brcmnand_get_sector_size_1k(host);
-+                      brcmnand_set_sector_size_1k(host, 0);
-+              }
-+              break;
-+      }
-+
-+      if (!native_cmd)
-+              return;
-+
-+      brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS,
-+              (host->cs << 16) | ((addr >> 32) & 0xffff));
-+      (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS);
-+      brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS, lower_32_bits(addr));
-+      (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS);
-+
-+      brcmnand_send_cmd(host, native_cmd);
-+      brcmnand_waitfunc(mtd, chip);
-+
-+      if (native_cmd == CMD_PARAMETER_READ ||
-+                      native_cmd == CMD_PARAMETER_CHANGE_COL) {
-+              int i;
-+
-+              brcmnand_soc_data_bus_prepare(ctrl->soc);
-+
-+              /*
-+               * Must cache the FLASH_CACHE now, since changes in
-+               * SECTOR_SIZE_1K may invalidate it
-+               */
-+              for (i = 0; i < FC_WORDS; i++)
-+                      ctrl->flash_cache[i] = brcmnand_read_fc(ctrl, i);
-+
-+              brcmnand_soc_data_bus_unprepare(ctrl->soc);
-+
-+              /* Cleanup from HW quirk: restore SECTOR_SIZE_1K */
-+              if (host->hwcfg.sector_size_1k)
-+                      brcmnand_set_sector_size_1k(host,
-+                                                  host->hwcfg.sector_size_1k);
-+      }
-+
-+      /* Re-enable protection is necessary only after erase */
-+      if (command == NAND_CMD_ERASE1)
-+              brcmnand_wp(mtd, 1);
-+}
-+
-+static uint8_t brcmnand_read_byte(struct mtd_info *mtd)
-+{
-+      struct nand_chip *chip = mtd->priv;
-+      struct brcmnand_host *host = chip->priv;
-+      struct brcmnand_controller *ctrl = host->ctrl;
-+      uint8_t ret = 0;
-+      int addr, offs;
-+
-+      switch (host->last_cmd) {
-+      case NAND_CMD_READID:
-+              if (host->last_byte < 4)
-+                      ret = brcmnand_read_reg(ctrl, BRCMNAND_ID) >>
-+                              (24 - (host->last_byte << 3));
-+              else if (host->last_byte < 8)
-+                      ret = brcmnand_read_reg(ctrl, BRCMNAND_ID_EXT) >>
-+                              (56 - (host->last_byte << 3));
-+              break;
-+
-+      case NAND_CMD_READOOB:
-+              ret = oob_reg_read(ctrl, host->last_byte);
-+              break;
-+
-+      case NAND_CMD_STATUS:
-+              ret = brcmnand_read_reg(ctrl, BRCMNAND_INTFC_STATUS) &
-+                                      INTFC_FLASH_STATUS;
-+              if (wp_on) /* hide WP status */
-+                      ret |= NAND_STATUS_WP;
-+              break;
-+
-+      case NAND_CMD_PARAM:
-+      case NAND_CMD_RNDOUT:
-+              addr = host->last_addr + host->last_byte;
-+              offs = addr & (FC_BYTES - 1);
-+
-+              /* At FC_BYTES boundary, switch to next column */
-+              if (host->last_byte > 0 && offs == 0)
-+                      chip->cmdfunc(mtd, NAND_CMD_RNDOUT, addr, -1);
-+
-+              ret = ctrl->flash_cache[offs >> 2] >>
-+                                      (24 - ((offs & 0x03) << 3));
-+              break;
-+      case NAND_CMD_GET_FEATURES:
-+              if (host->last_byte >= ONFI_SUBFEATURE_PARAM_LEN) {
-+                      ret = 0;
-+              } else {
-+                      bool last = host->last_byte ==
-+                              ONFI_SUBFEATURE_PARAM_LEN - 1;
-+                      brcmnand_low_level_op(host, LL_OP_RD, 0, last);
-+                      ret = brcmnand_read_reg(ctrl, BRCMNAND_LL_RDATA) & 0xff;
-+              }
-+      }
-+
-+      dev_dbg(ctrl->dev, "read byte = 0x%02x\n", ret);
-+      host->last_byte++;
-+
-+      return ret;
-+}
-+
-+static void brcmnand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
-+{
-+      int i;
-+
-+      for (i = 0; i < len; i++, buf++)
-+              *buf = brcmnand_read_byte(mtd);
-+}
-+
-+static void brcmnand_write_buf(struct mtd_info *mtd, const uint8_t *buf,
-+                                 int len)
-+{
-+      int i;
-+      struct nand_chip *chip = mtd->priv;
-+      struct brcmnand_host *host = chip->priv;
-+
-+      switch (host->last_cmd) {
-+      case NAND_CMD_SET_FEATURES:
-+              for (i = 0; i < len; i++)
-+                      brcmnand_low_level_op(host, LL_OP_WR, buf[i],
-+                                                (i + 1) == len);
-+              break;
-+      default:
-+              BUG();
-+              break;
-+      }
-+}
-+
-+/**
-+ * Construct a FLASH_DMA descriptor as part of a linked list. You must know the
-+ * following ahead of time:
-+ *  - Is this descriptor the beginning or end of a linked list?
-+ *  - What is the (DMA) address of the next descriptor in the linked list?
-+ */
-+static int brcmnand_fill_dma_desc(struct brcmnand_host *host,
-+                                struct brcm_nand_dma_desc *desc, u64 addr,
-+                                dma_addr_t buf, u32 len, u8 dma_cmd,
-+                                bool begin, bool end,
-+                                dma_addr_t next_desc)
-+{
-+      memset(desc, 0, sizeof(*desc));
-+      /* Descriptors are written in native byte order (wordwise) */
-+      desc->next_desc = lower_32_bits(next_desc);
-+      desc->next_desc_ext = upper_32_bits(next_desc);
-+      desc->cmd_irq = (dma_cmd << 24) |
-+              (end ? (0x03 << 8) : 0) | /* IRQ | STOP */
-+              (!!begin) | ((!!end) << 1); /* head, tail */
-+#ifdef CONFIG_CPU_BIG_ENDIAN
-+      desc->cmd_irq |= 0x01 << 12;
-+#endif
-+      desc->dram_addr = lower_32_bits(buf);
-+      desc->dram_addr_ext = upper_32_bits(buf);
-+      desc->tfr_len = len;
-+      desc->total_len = len;
-+      desc->flash_addr = lower_32_bits(addr);
-+      desc->flash_addr_ext = upper_32_bits(addr);
-+      desc->cs = host->cs;
-+      desc->status_valid = 0x01;
-+      return 0;
-+}
-+
-+/**
-+ * Kick the FLASH_DMA engine, with a given DMA descriptor
-+ */
-+static void brcmnand_dma_run(struct brcmnand_host *host, dma_addr_t desc)
-+{
-+      struct brcmnand_controller *ctrl = host->ctrl;
-+      unsigned long timeo = msecs_to_jiffies(100);
-+
-+      flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC, lower_32_bits(desc));
-+      (void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC);
-+      flash_dma_writel(ctrl, FLASH_DMA_FIRST_DESC_EXT, upper_32_bits(desc));
-+      (void)flash_dma_readl(ctrl, FLASH_DMA_FIRST_DESC_EXT);
-+
-+      /* Start FLASH_DMA engine */
-+      ctrl->dma_pending = true;
-+      mb(); /* flush previous writes */
-+      flash_dma_writel(ctrl, FLASH_DMA_CTRL, 0x03); /* wake | run */
-+
-+      if (wait_for_completion_timeout(&ctrl->dma_done, timeo) <= 0) {
-+              dev_err(ctrl->dev,
-+                              "timeout waiting for DMA; status %#x, error status %#x\n",
-+                              flash_dma_readl(ctrl, FLASH_DMA_STATUS),
-+                              flash_dma_readl(ctrl, FLASH_DMA_ERROR_STATUS));
-+      }
-+      ctrl->dma_pending = false;
-+      flash_dma_writel(ctrl, FLASH_DMA_CTRL, 0); /* force stop */
-+}
-+
-+static int brcmnand_dma_trans(struct brcmnand_host *host, u64 addr, u32 *buf,
-+                            u32 len, u8 dma_cmd)
-+{
-+      struct brcmnand_controller *ctrl = host->ctrl;
-+      dma_addr_t buf_pa;
-+      int dir = dma_cmd == CMD_PAGE_READ ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
-+
-+      buf_pa = dma_map_single(ctrl->dev, buf, len, dir);
-+      if (dma_mapping_error(ctrl->dev, buf_pa)) {
-+              dev_err(ctrl->dev, "unable to map buffer for DMA\n");
-+              return -ENOMEM;
-+      }
-+
-+      brcmnand_fill_dma_desc(host, ctrl->dma_desc, addr, buf_pa, len,
-+                                 dma_cmd, true, true, 0);
-+
-+      brcmnand_dma_run(host, ctrl->dma_pa);
-+
-+      dma_unmap_single(ctrl->dev, buf_pa, len, dir);
-+
-+      if (ctrl->dma_desc->status_valid & FLASH_DMA_ECC_ERROR)
-+              return -EBADMSG;
-+      else if (ctrl->dma_desc->status_valid & FLASH_DMA_CORR_ERROR)
-+              return -EUCLEAN;
-+
-+      return 0;
-+}
-+
-+/*
-+ * Assumes proper CS is already set
-+ */
-+static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip,
-+                              u64 addr, unsigned int trans, u32 *buf,
-+                              u8 *oob, u64 *err_addr)
-+{
-+      struct brcmnand_host *host = chip->priv;
-+      struct brcmnand_controller *ctrl = host->ctrl;
-+      int i, j, ret = 0;
-+
-+      /* Clear error addresses */
-+      brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_ADDR, 0);
-+      brcmnand_write_reg(ctrl, BRCMNAND_CORR_ADDR, 0);
-+
-+      brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS,
-+                      (host->cs << 16) | ((addr >> 32) & 0xffff));
-+      (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS);
-+
-+      for (i = 0; i < trans; i++, addr += FC_BYTES) {
-+              brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS,
-+                                 lower_32_bits(addr));
-+              (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS);
-+              /* SPARE_AREA_READ does not use ECC, so just use PAGE_READ */
-+              brcmnand_send_cmd(host, CMD_PAGE_READ);
-+              brcmnand_waitfunc(mtd, chip);
-+
-+              if (likely(buf)) {
-+                      brcmnand_soc_data_bus_prepare(ctrl->soc);
-+
-+                      for (j = 0; j < FC_WORDS; j++, buf++)
-+                              *buf = brcmnand_read_fc(ctrl, j);
-+
-+                      brcmnand_soc_data_bus_unprepare(ctrl->soc);
-+              }
-+
-+              if (oob)
-+                      oob += read_oob_from_regs(ctrl, i, oob,
-+                                      mtd->oobsize / trans,
-+                                      host->hwcfg.sector_size_1k);
-+
-+              if (!ret) {
-+                      *err_addr = brcmnand_read_reg(ctrl,
-+                                      BRCMNAND_UNCORR_ADDR) |
-+                              ((u64)(brcmnand_read_reg(ctrl,
-+                                              BRCMNAND_UNCORR_EXT_ADDR)
-+                                      & 0xffff) << 32);
-+                      if (*err_addr)
-+                              ret = -EBADMSG;
-+              }
-+
-+              if (!ret) {
-+                      *err_addr = brcmnand_read_reg(ctrl,
-+                                      BRCMNAND_CORR_ADDR) |
-+                              ((u64)(brcmnand_read_reg(ctrl,
-+                                              BRCMNAND_CORR_EXT_ADDR)
-+                                      & 0xffff) << 32);
-+                      if (*err_addr)
-+                              ret = -EUCLEAN;
-+              }
-+      }
-+
-+      return ret;
-+}
-+
-+static int brcmnand_read(struct mtd_info *mtd, struct nand_chip *chip,
-+                       u64 addr, unsigned int trans, u32 *buf, u8 *oob)
-+{
-+      struct brcmnand_host *host = chip->priv;
-+      struct brcmnand_controller *ctrl = host->ctrl;
-+      u64 err_addr = 0;
-+      int err;
-+
-+      dev_dbg(ctrl->dev, "read %llx -> %p\n", (unsigned long long)addr, buf);
-+
-+      brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_COUNT, 0);
-+
-+      if (has_flash_dma(ctrl) && !oob && flash_dma_buf_ok(buf)) {
-+              err = brcmnand_dma_trans(host, addr, buf, trans * FC_BYTES,
-+                                           CMD_PAGE_READ);
-+              if (err) {
-+                      if (mtd_is_bitflip_or_eccerr(err))
-+                              err_addr = addr;
-+                      else
-+                              return -EIO;
-+              }
-+      } else {
-+              if (oob)
-+                      memset(oob, 0x99, mtd->oobsize);
-+
-+              err = brcmnand_read_by_pio(mtd, chip, addr, trans, buf,
-+                                             oob, &err_addr);
-+      }
-+
-+      if (mtd_is_eccerr(err)) {
-+              dev_dbg(ctrl->dev, "uncorrectable error at 0x%llx\n",
-+                      (unsigned long long)err_addr);
-+              mtd->ecc_stats.failed++;
-+              /* NAND layer expects zero on ECC errors */
-+              return 0;
-+      }
-+
-+      if (mtd_is_bitflip(err)) {
-+              unsigned int corrected = brcmnand_count_corrected(ctrl);
-+
-+              dev_dbg(ctrl->dev, "corrected error at 0x%llx\n",
-+                      (unsigned long long)err_addr);
-+              mtd->ecc_stats.corrected += corrected;
-+              /* Always exceed the software-imposed threshold */
-+              return max(mtd->bitflip_threshold, corrected);
-+      }
-+
-+      return 0;
-+}
-+
-+static int brcmnand_read_page(struct mtd_info *mtd, struct nand_chip *chip,
-+                            uint8_t *buf, int oob_required, int page)
-+{
-+      struct brcmnand_host *host = chip->priv;
-+      u8 *oob = oob_required ? (u8 *)chip->oob_poi : NULL;
-+
-+      return brcmnand_read(mtd, chip, host->last_addr,
-+                      mtd->writesize >> FC_SHIFT, (u32 *)buf, oob);
-+}
-+
-+static int brcmnand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
-+                                uint8_t *buf, int oob_required, int page)
-+{
-+      struct brcmnand_host *host = chip->priv;
-+      u8 *oob = oob_required ? (u8 *)chip->oob_poi : NULL;
-+      int ret;
-+
-+      brcmnand_set_ecc_enabled(host, 0);
-+      ret = brcmnand_read(mtd, chip, host->last_addr,
-+                      mtd->writesize >> FC_SHIFT, (u32 *)buf, oob);
-+      brcmnand_set_ecc_enabled(host, 1);
-+      return ret;
-+}
-+
-+static int brcmnand_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
-+                           int page)
-+{
-+      return brcmnand_read(mtd, chip, (u64)page << chip->page_shift,
-+                      mtd->writesize >> FC_SHIFT,
-+                      NULL, (u8 *)chip->oob_poi);
-+}
-+
-+static int brcmnand_read_oob_raw(struct mtd_info *mtd, struct nand_chip *chip,
-+                               int page)
-+{
-+      struct brcmnand_host *host = chip->priv;
-+
-+      brcmnand_set_ecc_enabled(host, 0);
-+      brcmnand_read(mtd, chip, (u64)page << chip->page_shift,
-+              mtd->writesize >> FC_SHIFT,
-+              NULL, (u8 *)chip->oob_poi);
-+      brcmnand_set_ecc_enabled(host, 1);
-+      return 0;
-+}
-+
-+static int brcmnand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
-+                               uint32_t data_offs, uint32_t readlen,
-+                               uint8_t *bufpoi, int page)
-+{
-+      struct brcmnand_host *host = chip->priv;
-+
-+      return brcmnand_read(mtd, chip, host->last_addr + data_offs,
-+                      readlen >> FC_SHIFT, (u32 *)bufpoi, NULL);
-+}
-+
-+static int brcmnand_write(struct mtd_info *mtd, struct nand_chip *chip,
-+                        u64 addr, const u32 *buf, u8 *oob)
-+{
-+      struct brcmnand_host *host = chip->priv;
-+      struct brcmnand_controller *ctrl = host->ctrl;
-+      unsigned int i, j, trans = mtd->writesize >> FC_SHIFT;
-+      int status, ret = 0;
-+
-+      dev_dbg(ctrl->dev, "write %llx <- %p\n", (unsigned long long)addr, buf);
-+
-+      if (unlikely((u32)buf & 0x03)) {
-+              dev_warn(ctrl->dev, "unaligned buffer: %p\n", buf);
-+              buf = (u32 *)((u32)buf & ~0x03);
-+      }
-+
-+      brcmnand_wp(mtd, 0);
-+
-+      for (i = 0; i < ctrl->max_oob; i += 4)
-+              oob_reg_write(ctrl, i, 0xffffffff);
-+
-+      if (has_flash_dma(ctrl) && !oob && flash_dma_buf_ok(buf)) {
-+              if (brcmnand_dma_trans(host, addr, (u32 *)buf,
-+                                      mtd->writesize, CMD_PROGRAM_PAGE))
-+                      ret = -EIO;
-+              goto out;
-+      }
-+
-+      brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS,
-+                      (host->cs << 16) | ((addr >> 32) & 0xffff));
-+      (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS);
-+
-+      for (i = 0; i < trans; i++, addr += FC_BYTES) {
-+              /* full address MUST be set before populating FC */
-+              brcmnand_write_reg(ctrl, BRCMNAND_CMD_ADDRESS,
-+                                 lower_32_bits(addr));
-+              (void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS);
-+
-+              if (buf) {
-+                      brcmnand_soc_data_bus_prepare(ctrl->soc);
-+
-+                      for (j = 0; j < FC_WORDS; j++, buf++)
-+                              brcmnand_write_fc(ctrl, j, *buf);
-+
-+                      brcmnand_soc_data_bus_unprepare(ctrl->soc);
-+              } else if (oob) {
-+                      for (j = 0; j < FC_WORDS; j++)
-+                              brcmnand_write_fc(ctrl, j, 0xffffffff);
-+              }
-+
-+              if (oob) {
-+                      oob += write_oob_to_regs(ctrl, i, oob,
-+                                      mtd->oobsize / trans,
-+                                      host->hwcfg.sector_size_1k);
-+              }
-+
-+              /* we cannot use SPARE_AREA_PROGRAM when PARTIAL_PAGE_EN=0 */
-+              brcmnand_send_cmd(host, CMD_PROGRAM_PAGE);
-+              status = brcmnand_waitfunc(mtd, chip);
-+
-+              if (status & NAND_STATUS_FAIL) {
-+                      dev_info(ctrl->dev, "program failed at %llx\n",
-+                              (unsigned long long)addr);
-+                      ret = -EIO;
-+                      goto out;
-+              }
-+      }
-+out:
-+      brcmnand_wp(mtd, 1);
-+      return ret;
-+}
-+
-+static int brcmnand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
-+                             const uint8_t *buf, int oob_required)
-+{
-+      struct brcmnand_host *host = chip->priv;
-+      void *oob = oob_required ? chip->oob_poi : NULL;
-+
-+      brcmnand_write(mtd, chip, host->last_addr, (const u32 *)buf, oob);
-+      return 0;
-+}
-+
-+static int brcmnand_write_page_raw(struct mtd_info *mtd,
-+                                 struct nand_chip *chip, const uint8_t *buf,
-+                                 int oob_required)
-+{
-+      struct brcmnand_host *host = chip->priv;
-+      void *oob = oob_required ? chip->oob_poi : NULL;
-+
-+      brcmnand_set_ecc_enabled(host, 0);
-+      brcmnand_write(mtd, chip, host->last_addr, (const u32 *)buf, oob);
-+      brcmnand_set_ecc_enabled(host, 1);
-+      return 0;
-+}
-+
-+static int brcmnand_write_oob(struct mtd_info *mtd, struct nand_chip *chip,
-+                                int page)
-+{
-+      return brcmnand_write(mtd, chip, (u64)page << chip->page_shift,
-+                                NULL, chip->oob_poi);
-+}
-+
-+static int brcmnand_write_oob_raw(struct mtd_info *mtd, struct nand_chip *chip,
-+                                int page)
-+{
-+      struct brcmnand_host *host = chip->priv;
-+      int ret;
-+
-+      brcmnand_set_ecc_enabled(host, 0);
-+      ret = brcmnand_write(mtd, chip, (u64)page << chip->page_shift, NULL,
-+                               (u8 *)chip->oob_poi);
-+      brcmnand_set_ecc_enabled(host, 1);
-+
-+      return ret;
-+}
-+
-+/***********************************************************************
-+ * Per-CS setup (1 NAND device)
-+ ***********************************************************************/
-+
-+static int brcmnand_set_cfg(struct brcmnand_host *host,
-+                          struct brcmnand_cfg *cfg)
-+{
-+      struct brcmnand_controller *ctrl = host->ctrl;
-+      struct nand_chip *chip = &host->chip;
-+      u16 cfg_offs = brcmnand_cs_offset(ctrl, host->cs, BRCMNAND_CS_CFG);
-+      u16 cfg_ext_offs = brcmnand_cs_offset(ctrl, host->cs,
-+                      BRCMNAND_CS_CFG_EXT);
-+      u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs,
-+                      BRCMNAND_CS_ACC_CONTROL);
-+      u8 block_size = 0, page_size = 0, device_size = 0;
-+      u32 tmp;
-+
-+      if (ctrl->block_sizes) {
-+              int i, found;
-+
-+              for (i = 0, found = 0; ctrl->block_sizes[i]; i++)
-+                      if (ctrl->block_sizes[i] * 1024 == cfg->block_size) {
-+                              block_size = i;
-+                              found = 1;
-+                      }
-+              if (!found) {
-+                      dev_warn(ctrl->dev, "invalid block size %u\n",
-+                                      cfg->block_size);
-+                      return -EINVAL;
-+              }
-+      } else {
-+              block_size = ffs(cfg->block_size) - ffs(BRCMNAND_MIN_BLOCKSIZE);
-+      }
-+
-+      if (cfg->block_size < BRCMNAND_MIN_BLOCKSIZE || (ctrl->max_block_size &&
-+                              cfg->block_size > ctrl->max_block_size)) {
-+              dev_warn(ctrl->dev, "invalid block size %u\n",
-+                              cfg->block_size);
-+              block_size = 0;
-+      }
-+
-+      if (ctrl->page_sizes) {
-+              int i, found;
-+
-+              for (i = 0, found = 0; ctrl->page_sizes[i]; i++)
-+                      if (ctrl->page_sizes[i] == cfg->page_size) {
-+                              page_size = i;
-+                              found = 1;
-+                      }
-+              if (!found) {
-+                      dev_warn(ctrl->dev, "invalid page size %u\n",
-+                                      cfg->page_size);
-+                      return -EINVAL;
-+              }
-+      } else {
-+              page_size = ffs(cfg->page_size) - ffs(BRCMNAND_MIN_PAGESIZE);
-+      }
-+
-+      if (cfg->page_size < BRCMNAND_MIN_PAGESIZE || (ctrl->max_page_size &&
-+                              cfg->page_size > ctrl->max_page_size)) {
-+              dev_warn(ctrl->dev, "invalid page size %u\n", cfg->page_size);
-+              return -EINVAL;
-+      }
-+
-+      if (fls64(cfg->device_size) < fls64(BRCMNAND_MIN_DEVSIZE)) {
-+              dev_warn(ctrl->dev, "invalid device size 0x%llx\n",
-+                      (unsigned long long)cfg->device_size);
-+              return -EINVAL;
-+      }
-+      device_size = fls64(cfg->device_size) - fls64(BRCMNAND_MIN_DEVSIZE);
-+
-+      tmp = (cfg->blk_adr_bytes << 8) |
-+              (cfg->col_adr_bytes << 12) |
-+              (cfg->ful_adr_bytes << 16) |
-+              (!!(cfg->device_width == 16) << 23) |
-+              (device_size << 24);
-+      if (cfg_offs == cfg