-LINUX_VERSION-5.15 = .74
-LINUX_KERNEL_HASH-5.15.74 = 2c1539a2f85b835c36c4a07c8270b52b0bec38fdda7339477d07f0c3af8c4265
+LINUX_VERSION-5.15 = .75
+LINUX_KERNEL_HASH-5.15.75 = d9a65bdd3659ccf55acf42268a27f7989b1500815ae51223aadbad9aeec45fc6
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
-@@ -257,7 +257,7 @@ compressor-$(CONFIG_KERNEL_LZO) := lzo
+@@ -258,7 +258,7 @@ compressor-$(CONFIG_KERNEL_LZO) := lzo
# args (to if_changed): 1 = (this rule), 2 = platform, 3 = dts 4=dtb 5=initrd
quiet_cmd_wrap = WRAP $@
#define UDP_CORK 1 /* Never send partially complete segments */
--- a/net/netfilter/nf_conntrack_core.c
+++ b/net/netfilter/nf_conntrack_core.c
-@@ -305,8 +305,8 @@ nf_ct_get_tuple(const struct sk_buff *sk
+@@ -308,8 +308,8 @@ nf_ct_get_tuple(const struct sk_buff *sk
switch (l3num) {
case NFPROTO_IPV4:
| TCPOLEN_TIMESTAMP))
--- a/net/xfrm/xfrm_input.c
+++ b/net/xfrm/xfrm_input.c
-@@ -165,8 +165,8 @@ int xfrm_parse_spi(struct sk_buff *skb,
+@@ -166,8 +166,8 @@ int xfrm_parse_spi(struct sk_buff *skb,
if (!pskb_may_pull(skb, hlen))
return -EINVAL;
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -2289,8 +2289,15 @@ static int bcm2835_clk_probe(struct plat
+@@ -2320,8 +2320,15 @@ static int bcm2835_clk_probe(struct plat
if (ret)
return ret;
}
static const struct cprman_plat_data cprman_bcm2835_plat_data = {
-@@ -2316,7 +2323,11 @@ static struct platform_driver bcm2835_cl
+@@ -2347,7 +2354,11 @@ static struct platform_driver bcm2835_cl
.probe = bcm2835_clk_probe,
};
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1378,6 +1378,11 @@ bcm2835_register_pll_divider(struct bcm2
+@@ -1408,6 +1408,11 @@ bcm2835_register_pll_divider(struct bcm2
divider->div.hw.init = &init;
divider->div.table = NULL;
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1306,6 +1306,8 @@ static const struct clk_ops bcm2835_vpu_
+@@ -1336,6 +1336,8 @@ static const struct clk_ops bcm2835_vpu_
.debug_init = bcm2835_clock_debug_init,
};
static struct clk_hw *bcm2835_register_pll(struct bcm2835_cprman *cprman,
const void *data)
{
-@@ -1323,6 +1325,9 @@ static struct clk_hw *bcm2835_register_p
+@@ -1353,6 +1355,9 @@ static struct clk_hw *bcm2835_register_p
init.ops = &bcm2835_pll_clk_ops;
init.flags = pll_data->flags | CLK_IGNORE_UNUSED;
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
if (!pll)
return NULL;
-@@ -1378,9 +1383,11 @@ bcm2835_register_pll_divider(struct bcm2
+@@ -1408,9 +1413,11 @@ bcm2835_register_pll_divider(struct bcm2
divider->div.hw.init = &init;
divider->div.table = NULL;
}
divider->cprman = cprman;
-@@ -1437,6 +1444,15 @@ static struct clk_hw *bcm2835_register_c
+@@ -1467,6 +1474,15 @@ static struct clk_hw *bcm2835_register_c
init.flags = clock_data->flags | CLK_IGNORE_UNUSED;
/*
* Pass the CLK_SET_RATE_PARENT flag if we are allowed to propagate
* rate changes on at least of the parents.
*/
-@@ -2215,6 +2231,8 @@ static const struct bcm2835_clk_desc clk
+@@ -2246,6 +2262,8 @@ static const struct bcm2835_clk_desc clk
.ctl_reg = CM_PERIICTL),
};
/*
* Permanently take a reference on the parent of the SDRAM clock.
*
-@@ -2234,6 +2252,19 @@ static int bcm2835_mark_sdc_parent_criti
+@@ -2265,6 +2283,19 @@ static int bcm2835_mark_sdc_parent_criti
return clk_prepare_enable(parent);
}
static int bcm2835_clk_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
-@@ -2243,6 +2274,7 @@ static int bcm2835_clk_probe(struct plat
+@@ -2274,6 +2305,7 @@ static int bcm2835_clk_probe(struct plat
const size_t asize = ARRAY_SIZE(clk_desc_array);
const struct cprman_plat_data *pdata;
size_t i;
int ret;
pdata = of_device_get_match_data(&pdev->dev);
-@@ -2261,6 +2293,13 @@ static int bcm2835_clk_probe(struct plat
+@@ -2292,6 +2324,13 @@ static int bcm2835_clk_probe(struct plat
if (IS_ERR(cprman->regs))
return PTR_ERR(cprman->regs);
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -35,6 +35,7 @@
+@@ -36,6 +36,7 @@
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <dt-bindings/clock/bcm2835.h>
#define CM_PASSWORD 0x5a000000
-@@ -295,6 +296,8 @@
+@@ -296,6 +297,8 @@
#define SOC_BCM2711 BIT(1)
#define SOC_ALL (SOC_BCM2835 | SOC_BCM2711)
/*
* Names of clocks used within the driver that need to be replaced
* with an external parent's name. This array is in the order that
-@@ -313,6 +316,7 @@ static const char *const cprman_parent_n
+@@ -314,6 +317,7 @@ static const char *const cprman_parent_n
struct bcm2835_cprman {
struct device *dev;
void __iomem *regs;
spinlock_t regs_lock; /* spinlock for all clocks */
unsigned int soc;
-@@ -1010,6 +1014,30 @@ static unsigned long bcm2835_clock_get_r
- return bcm2835_clock_rate_from_divisor(clock, parent_rate, div);
+@@ -1040,6 +1044,30 @@ static unsigned long bcm2835_clock_get_r
+ return rate;
}
+static unsigned long bcm2835_clock_get_rate_vpu(struct clk_hw *hw,
static void bcm2835_clock_wait_busy(struct bcm2835_clock *clock)
{
struct bcm2835_cprman *cprman = clock->cprman;
-@@ -1298,7 +1326,7 @@ static int bcm2835_vpu_clock_is_on(struc
+@@ -1328,7 +1356,7 @@ static int bcm2835_vpu_clock_is_on(struc
*/
static const struct clk_ops bcm2835_vpu_clock_clk_ops = {
.is_prepared = bcm2835_vpu_clock_is_on,
.set_rate = bcm2835_clock_set_rate,
.determine_rate = bcm2835_clock_determine_rate,
.set_parent = bcm2835_clock_set_parent,
-@@ -2273,6 +2301,7 @@ static int bcm2835_clk_probe(struct plat
+@@ -2304,6 +2332,7 @@ static int bcm2835_clk_probe(struct plat
const struct bcm2835_clk_desc *desc;
const size_t asize = ARRAY_SIZE(clk_desc_array);
const struct cprman_plat_data *pdata;
size_t i;
u32 clk_id;
int ret;
-@@ -2293,6 +2322,14 @@ static int bcm2835_clk_probe(struct plat
+@@ -2324,6 +2353,14 @@ static int bcm2835_clk_probe(struct plat
if (IS_ERR(cprman->regs))
return PTR_ERR(cprman->regs);
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -2376,7 +2376,7 @@ static int bcm2835_clk_probe(struct plat
+@@ -2407,7 +2407,7 @@ static int bcm2835_clk_probe(struct plat
return ret;
/* note that we have registered all the clocks */
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -644,15 +644,17 @@ static int bcm2835_pll_on(struct clk_hw
+@@ -647,15 +647,17 @@ static int bcm2835_pll_on(struct clk_hw
spin_unlock(&cprman->regs_lock);
/* Wait for the PLL to lock. */
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1109,15 +1109,19 @@ static int bcm2835_clock_set_rate(struct
+@@ -1139,15 +1139,19 @@ static int bcm2835_clock_set_rate(struct
spin_lock(&cprman->regs_lock);
ctl |= (div & CM_DIV_FRAC_MASK) ? CM_FRAC : 0;
cprman_write(cprman, data->ctl_reg, ctl);
-@@ -1493,7 +1497,7 @@ static struct clk_hw *bcm2835_register_c
+@@ -1523,7 +1527,7 @@ static struct clk_hw *bcm2835_register_c
init.ops = &bcm2835_vpu_clock_clk_ops;
} else {
init.ops = &bcm2835_clock_clk_ops;
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1098,8 +1098,10 @@ static int bcm2835_clock_on(struct clk_h
+@@ -1128,8 +1128,10 @@ static int bcm2835_clock_on(struct clk_h
return 0;
}
{
struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
struct bcm2835_cprman *cprman = clock->cprman;
-@@ -1121,6 +1123,11 @@ static int bcm2835_clock_set_rate(struct
+@@ -1151,6 +1153,11 @@ static int bcm2835_clock_set_rate(struct
bcm2835_clock_wait_busy(clock);
}
ctl &= ~CM_FRAC;
ctl |= (div & CM_DIV_FRAC_MASK) ? CM_FRAC : 0;
cprman_write(cprman, data->ctl_reg, ctl);
-@@ -1132,6 +1139,12 @@ static int bcm2835_clock_set_rate(struct
+@@ -1162,6 +1169,12 @@ static int bcm2835_clock_set_rate(struct
return 0;
}
static bool
bcm2835_clk_is_pllc(struct clk_hw *hw)
{
-@@ -1315,6 +1328,7 @@ static const struct clk_ops bcm2835_cloc
+@@ -1345,6 +1358,7 @@ static const struct clk_ops bcm2835_cloc
.unprepare = bcm2835_clock_off,
.recalc_rate = bcm2835_clock_get_rate,
.set_rate = bcm2835_clock_set_rate,
.determine_rate = bcm2835_clock_determine_rate,
.set_parent = bcm2835_clock_set_parent,
.get_parent = bcm2835_clock_get_parent,
-@@ -1497,7 +1511,6 @@ static struct clk_hw *bcm2835_register_c
+@@ -1527,7 +1541,6 @@ static struct clk_hw *bcm2835_register_c
init.ops = &bcm2835_vpu_clock_clk_ops;
} else {
init.ops = &bcm2835_clock_clk_ops;
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
-@@ -1611,6 +1611,109 @@ command_cleanup:
+@@ -1612,6 +1612,109 @@ command_cleanup:
}
/*
* non-error returns are a promise to giveback() the urb later
* we drop ownership so next owner (or urb unlink) can get it
*/
-@@ -5436,6 +5539,7 @@ static const struct hc_driver xhci_hc_dr
+@@ -5437,6 +5540,7 @@ static const struct hc_driver xhci_hc_dr
.endpoint_reset = xhci_endpoint_reset,
.check_bandwidth = xhci_check_bandwidth,
.reset_bandwidth = xhci_reset_bandwidth,
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -2304,9 +2304,11 @@ static bool bcm2835_clk_is_claimed(const
+@@ -2335,9 +2335,11 @@ static bool bcm2835_clk_is_claimed(const
int i;
for (i = 0; i < ARRAY_SIZE(clk_desc_array); i++) {
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
-@@ -2511,9 +2511,11 @@ int xhci_mem_init(struct xhci_hcd *xhci,
+@@ -2516,9 +2516,11 @@ int xhci_mem_init(struct xhci_hcd *xhci,
* Event ring setup: Allocate a normal ring, but also setup
* the event ring segment table (ERST). Section 4.9.3.
*/
if (!xhci->event_ring)
goto fail;
if (xhci_check_trb_in_td_math(xhci) < 0)
-@@ -2526,7 +2528,7 @@ int xhci_mem_init(struct xhci_hcd *xhci,
+@@ -2531,7 +2533,7 @@ int xhci_mem_init(struct xhci_hcd *xhci,
/* set ERST count with the number of entries in the segment table */
val = readl(&xhci->ir_set->erst_size);
val &= ERST_SIZE_MASK;
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1735,16 +1735,12 @@ static const struct bcm2835_clk_desc clk
+@@ -1765,16 +1765,12 @@ static const struct bcm2835_clk_desc clk
.hold_mask = CM_PLLA_HOLDCORE,
.fixed_divider = 1,
.flags = CLK_SET_RATE_PARENT),
[BCM2835_PLLA_DSI0] = REGISTER_PLL_DIV(
SOC_ALL,
.name = "plla_dsi0",
-@@ -2045,14 +2041,12 @@ static const struct bcm2835_clk_desc clk
+@@ -2075,14 +2071,12 @@ static const struct bcm2835_clk_desc clk
.int_bits = 6,
.frac_bits = 0,
.tcnt_mux = 3),
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -2423,7 +2423,7 @@ static int __init __bcm2835_clk_driver_i
+@@ -2454,7 +2454,7 @@ static int __init __bcm2835_clk_driver_i
{
return platform_driver_register(&bcm2835_clk_driver);
}
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
-@@ -3478,6 +3478,7 @@ static int __spi_validate_bits_per_word(
+@@ -3480,6 +3480,7 @@ static int __spi_validate_bits_per_word(
*/
int spi_setup(struct spi_device *spi)
{
unsigned bad_bits, ugly_bits;
int status;
-@@ -3499,6 +3500,14 @@ int spi_setup(struct spi_device *spi)
+@@ -3501,6 +3502,14 @@ int spi_setup(struct spi_device *spi)
(SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL |
SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL)))
return -EINVAL;
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -2339,7 +2339,7 @@ static int bcm2835_clk_probe(struct plat
+@@ -2370,7 +2370,7 @@ static int bcm2835_clk_probe(struct plat
fw_node = of_parse_phandle(dev->of_node, "firmware", 0);
if (fw_node) {
+++ /dev/null
-From 3edc6e2d440803dfe22288c3ea7d77b4ab934ec8 Mon Sep 17 00:00:00 2001
-From: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
-Date: Thu, 15 Jul 2021 01:07:30 +0200
-Subject: [PATCH] drm/vc4: Fix timings for VEC modes
-
-This commit fixes vertical timings of the VEC (composite output) modes
-to accurately represent the 525-line ("NTSC") and 625-line ("PAL") ITU-R
-standards.
-
-Previous timings were actually defined as 502 and 601 lines, resulting
-in non-standard 62.69 Hz and 52 Hz signals being generated,
-respectively.
-
-Changes to vc4_crtc.c have also been made, to make the PixelValve
-vertical timings accurately correspond to the DRM modeline in interlaced
-modes. The resulting VERTA/VERTB register values have been verified
-against the reference values set by the Raspberry Pi firmware.
-
-Signed-off-by: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
----
- drivers/gpu/drm/vc4/vc4_crtc.c | 70 +++++++++++++++++++++-------------
- drivers/gpu/drm/vc4/vc4_vec.c | 4 +-
- 2 files changed, 45 insertions(+), 29 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_crtc.c
-+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -318,8 +318,14 @@ static void vc4_crtc_config_pv(struct dr
- bool is_dsi = (vc4_encoder->type == VC4_ENCODER_TYPE_DSI0 ||
- vc4_encoder->type == VC4_ENCODER_TYPE_DSI1);
- bool is_dsi1 = vc4_encoder->type == VC4_ENCODER_TYPE_DSI1;
-+ bool is_vec = vc4_encoder->type == VC4_ENCODER_TYPE_VEC;
- u32 format = is_dsi1 ? PV_CONTROL_FORMAT_DSIV_24 : PV_CONTROL_FORMAT_24;
- u8 ppc = pv_data->pixels_per_clock;
-+
-+ u16 vert_bp = mode->crtc_vtotal - mode->crtc_vsync_end;
-+ u16 vert_sync = mode->crtc_vsync_end - mode->crtc_vsync_start;
-+ u16 vert_fp = mode->crtc_vsync_start - mode->crtc_vdisplay;
-+
- bool debug_dump_regs = false;
-
- if (debug_dump_regs) {
-@@ -343,49 +349,59 @@ static void vc4_crtc_config_pv(struct dr
- VC4_SET_FIELD(mode->hdisplay * pixel_rep / ppc,
- PV_HORZB_HACTIVE));
-
-- CRTC_WRITE(PV_VERTA,
-- VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end +
-- interlace,
-- PV_VERTA_VBP) |
-- VC4_SET_FIELD(mode->crtc_vsync_end - mode->crtc_vsync_start,
-- PV_VERTA_VSYNC));
-- CRTC_WRITE(PV_VERTB,
-- VC4_SET_FIELD(mode->crtc_vsync_start - mode->crtc_vdisplay,
-- PV_VERTB_VFP) |
-- VC4_SET_FIELD(mode->crtc_vdisplay, PV_VERTB_VACTIVE));
--
- if (interlace) {
-+ bool odd_field_first = false;
-+ u32 field_delay = mode->htotal * pixel_rep / (2 * ppc);
-+ u16 vert_bp_even = vert_bp;
-+ u16 vert_fp_even = vert_fp;
-+
-+ if (is_vec) {
-+ /* VEC (composite output) */
-+ ++field_delay;
-+ if (mode->htotal == 858) {
-+ /* 525-line mode (NTSC or PAL-M) */
-+ odd_field_first = true;
-+ }
-+ }
-+
-+ if (odd_field_first)
-+ ++vert_fp_even;
-+ else
-+ ++vert_bp;
-+
- CRTC_WRITE(PV_VERTA_EVEN,
-- VC4_SET_FIELD(mode->crtc_vtotal -
-- mode->crtc_vsync_end,
-- PV_VERTA_VBP) |
-- VC4_SET_FIELD(mode->crtc_vsync_end -
-- mode->crtc_vsync_start,
-- PV_VERTA_VSYNC));
-+ VC4_SET_FIELD(vert_bp_even, PV_VERTA_VBP) |
-+ VC4_SET_FIELD(vert_sync, PV_VERTA_VSYNC));
- CRTC_WRITE(PV_VERTB_EVEN,
-- VC4_SET_FIELD(mode->crtc_vsync_start -
-- mode->crtc_vdisplay,
-- PV_VERTB_VFP) |
-+ VC4_SET_FIELD(vert_fp_even, PV_VERTB_VFP) |
- VC4_SET_FIELD(mode->crtc_vdisplay, PV_VERTB_VACTIVE));
-
-- /* We set up first field even mode for HDMI. VEC's
-- * NTSC mode would want first field odd instead, once
-- * we support it (to do so, set ODD_FIRST and put the
-- * delay in VSYNCD_EVEN instead).
-+ /* We set up first field even mode for HDMI and VEC's PAL.
-+ * For NTSC, we need first field odd.
- */
- CRTC_WRITE(PV_V_CONTROL,
- PV_VCONTROL_CONTINUOUS |
- (is_dsi ? PV_VCONTROL_DSI : 0) |
- PV_VCONTROL_INTERLACE |
-- VC4_SET_FIELD(mode->htotal * pixel_rep / (2 * ppc),
-- PV_VCONTROL_ODD_DELAY));
-- CRTC_WRITE(PV_VSYNCD_EVEN, 0);
-+ (odd_field_first
-+ ? PV_VCONTROL_ODD_FIRST
-+ : VC4_SET_FIELD(field_delay,
-+ PV_VCONTROL_ODD_DELAY)));
-+ CRTC_WRITE(PV_VSYNCD_EVEN,
-+ (odd_field_first ? field_delay : 0));
- } else {
- CRTC_WRITE(PV_V_CONTROL,
- PV_VCONTROL_CONTINUOUS |
- (is_dsi ? PV_VCONTROL_DSI : 0));
- }
-
-+ CRTC_WRITE(PV_VERTA,
-+ VC4_SET_FIELD(vert_bp, PV_VERTA_VBP) |
-+ VC4_SET_FIELD(vert_sync, PV_VERTA_VSYNC));
-+ CRTC_WRITE(PV_VERTB,
-+ VC4_SET_FIELD(vert_fp, PV_VERTB_VFP) |
-+ VC4_SET_FIELD(mode->crtc_vdisplay, PV_VERTB_VACTIVE));
-+
- if (is_dsi)
- CRTC_WRITE(PV_HACT_ACT, mode->hdisplay * pixel_rep);
-
---- a/drivers/gpu/drm/vc4/vc4_vec.c
-+++ b/drivers/gpu/drm/vc4/vc4_vec.c
-@@ -256,7 +256,7 @@ static void vc4_vec_ntsc_j_mode_set(stru
- static const struct drm_display_mode ntsc_mode = {
- DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 13500,
- 720, 720 + 14, 720 + 14 + 64, 720 + 14 + 64 + 60, 0,
-- 480, 480 + 3, 480 + 3 + 3, 480 + 3 + 3 + 16, 0,
-+ 480, 480 + 7, 480 + 7 + 6, 525, 0,
- DRM_MODE_FLAG_INTERLACE)
- };
-
-@@ -278,7 +278,7 @@ static void vc4_vec_pal_m_mode_set(struc
- static const struct drm_display_mode pal_mode = {
- DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 13500,
- 720, 720 + 20, 720 + 20 + 64, 720 + 20 + 64 + 60, 0,
-- 576, 576 + 2, 576 + 2 + 3, 576 + 2 + 3 + 20, 0,
-+ 576, 576 + 4, 576 + 4 + 6, 625, 0,
- DRM_MODE_FLAG_INTERLACE)
- };
-
--- a/sound/usb/quirks.c
+++ b/sound/usb/quirks.c
-@@ -1925,6 +1925,8 @@ static const struct usb_audio_quirk_flag
+@@ -1883,6 +1883,8 @@ static const struct usb_audio_quirk_flag
QUIRK_FLAG_GENERIC_IMPLICIT_FB),
DEVICE_FLG(0x2b53, 0x0031, /* Fiero SC-01 (firmware v1.1.0) */
QUIRK_FLAG_GENERIC_IMPLICIT_FB),
--- a/sound/usb/card.c
+++ b/sound/usb/card.c
-@@ -825,8 +825,14 @@ static int usb_audio_probe(struct usb_in
+@@ -843,8 +843,14 @@ static int usb_audio_probe(struct usb_in
if (ignore_ctl_error)
chip->quirk_flags |= QUIRK_FLAG_IGNORE_CTL_ERROR;
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -2208,21 +2208,6 @@ static const struct bcm2835_clk_desc clk
- .frac_bits = 12,
- .tcnt_mux = 28),
+@@ -2239,21 +2239,6 @@ static const struct bcm2835_clk_desc clk
+ .tcnt_mux = 28,
+ .round_up = true),
- /* TV encoder clock. Only operating frequency is 108Mhz. */
- [BCM2835_CLOCK_VEC] = REGISTER_PER_CLK(
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -1164,19 +1164,42 @@ int vc4_crtc_init(struct drm_device *drm
+@@ -1148,19 +1148,42 @@ int vc4_crtc_init(struct drm_device *drm
if (!vc4->hvs->hvs5) {
drm_mode_crtc_set_gamma_size(crtc, ARRAY_SIZE(vc4_crtc->lut_r));
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -410,6 +410,7 @@ static void vc4_crtc_config_pv(struct dr
+@@ -401,6 +401,7 @@ static void vc4_crtc_config_pv(struct dr
CRTC_WRITE(PV_V_CONTROL,
PV_VCONTROL_CONTINUOUS |
(is_dsi ? PV_VCONTROL_DSI : 0));
+ CRTC_WRITE(PV_VSYNCD_EVEN, 0);
}
- CRTC_WRITE(PV_VERTA,
+ if (is_dsi)
--- a/drivers/gpu/drm/vc4/vc4_vec.c
+++ b/drivers/gpu/drm/vc4/vc4_vec.c
@@ -423,18 +423,11 @@ static int vc4_vec_connector_atomic_chec
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -1196,7 +1196,7 @@ int vc4_crtc_init(struct drm_device *drm
+@@ -1180,7 +1180,7 @@ int vc4_crtc_init(struct drm_device *drm
/* We support CTM, but only for one CRTC at a time. It's therefore
* implemented as private driver state in vc4_kms, not here.
*/
addr = xhci_trb_virt_to_dma(new_seg, new_deq);
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
-@@ -1903,6 +1903,7 @@ struct xhci_hcd {
- #define XHCI_NO_SOFT_RETRY BIT_ULL(40)
+@@ -1904,6 +1904,7 @@ struct xhci_hcd {
#define XHCI_BROKEN_D3COLD BIT_ULL(41)
#define XHCI_EP_CTX_BROKEN_DCS BIT_ULL(42)
-+#define XHCI_AVOID_DQ_ON_LINK BIT_ULL(43)
+ #define XHCI_SUSPEND_RESUME_CLKS BIT_ULL(43)
++#define XHCI_AVOID_DQ_ON_LINK BIT_ULL(44)
unsigned int num_active_eps;
unsigned int limit_active_eps;
if (ret)
return -ENOMEM;
-@@ -1811,7 +1815,7 @@ int xhci_alloc_erst(struct xhci_hcd *xhc
+@@ -1816,7 +1820,7 @@ int xhci_alloc_erst(struct xhci_hcd *xhc
for (val = 0; val < evt_ring->num_segs; val++) {
entry = &erst->entries[val];
entry->seg_addr = cpu_to_le64(seg->dma);
if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
-@@ -1905,6 +1905,7 @@ struct xhci_hcd {
- #define XHCI_BROKEN_D3COLD BIT_ULL(41)
+@@ -1906,6 +1906,7 @@ struct xhci_hcd {
#define XHCI_EP_CTX_BROKEN_DCS BIT_ULL(42)
- #define XHCI_AVOID_DQ_ON_LINK BIT_ULL(43)
-+#define XHCI_VLI_TRB_CACHE_BUG BIT_ULL(44)
+ #define XHCI_SUSPEND_RESUME_CLKS BIT_ULL(43)
+ #define XHCI_AVOID_DQ_ON_LINK BIT_ULL(44)
++#define XHCI_VLI_TRB_CACHE_BUG BIT_ULL(45)
unsigned int num_active_eps;
unsigned int limit_active_eps;
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -1182,15 +1182,9 @@ int vc4_crtc_init(struct drm_device *drm
+@@ -1166,15 +1166,9 @@ int vc4_crtc_init(struct drm_device *drm
if (!vc4->hvs->hvs5) {
drm_mode_crtc_set_gamma_size(crtc, ARRAY_SIZE(vc4_crtc->lut_r));
first_trb = false;
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
-@@ -1906,6 +1906,7 @@ struct xhci_hcd {
- #define XHCI_EP_CTX_BROKEN_DCS BIT_ULL(42)
- #define XHCI_AVOID_DQ_ON_LINK BIT_ULL(43)
- #define XHCI_VLI_TRB_CACHE_BUG BIT_ULL(44)
-+#define XHCI_VLI_SS_BULK_OUT_BUG BIT_ULL(45)
+@@ -1907,6 +1907,7 @@ struct xhci_hcd {
+ #define XHCI_SUSPEND_RESUME_CLKS BIT_ULL(43)
+ #define XHCI_AVOID_DQ_ON_LINK BIT_ULL(44)
+ #define XHCI_VLI_TRB_CACHE_BUG BIT_ULL(45)
++#define XHCI_VLI_SS_BULK_OUT_BUG BIT_ULL(46)
unsigned int num_active_eps;
unsigned int limit_active_eps;
*hpos += mode->crtc_htotal / 2;
}
-@@ -449,6 +451,7 @@ static void vc4_crtc_config_pv(struct dr
+@@ -433,6 +435,7 @@ static void vc4_crtc_config_pv(struct dr
static void require_hvs_enabled(struct drm_device *dev)
{
struct vc4_dev *vc4 = to_vc4_dev(dev);
WARN_ON_ONCE((HVS_READ(SCALER_DISPCTRL) & SCALER_DISPCTRL_ENABLE) !=
SCALER_DISPCTRL_ENABLE);
-@@ -462,6 +465,7 @@ static int vc4_crtc_disable(struct drm_c
+@@ -446,6 +449,7 @@ static int vc4_crtc_disable(struct drm_c
struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder);
struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
struct drm_device *dev = crtc->dev;
int ret;
CRTC_WRITE(PV_V_CONTROL,
-@@ -491,7 +495,7 @@ static int vc4_crtc_disable(struct drm_c
+@@ -475,7 +479,7 @@ static int vc4_crtc_disable(struct drm_c
vc4_encoder->post_crtc_disable(encoder, state);
vc4_crtc_pixelvalve_reset(crtc);
if (vc4_encoder && vc4_encoder->post_crtc_powerdown)
vc4_encoder->post_crtc_powerdown(encoder, state);
-@@ -517,6 +521,7 @@ static struct drm_encoder *vc4_crtc_get_
+@@ -501,6 +505,7 @@ static struct drm_encoder *vc4_crtc_get_
int vc4_crtc_disable_at_boot(struct drm_crtc *crtc)
{
struct drm_device *drm = crtc->dev;
struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
enum vc4_encoder_type encoder_type;
const struct vc4_pv_data *pv_data;
-@@ -538,7 +543,7 @@ int vc4_crtc_disable_at_boot(struct drm_
+@@ -522,7 +527,7 @@ int vc4_crtc_disable_at_boot(struct drm_
if (!(CRTC_READ(PV_V_CONTROL) & PV_VCONTROL_VIDEN))
return 0;
if (channel < 0)
return 0;
-@@ -754,6 +759,7 @@ static void vc4_crtc_handle_page_flip(st
+@@ -738,6 +743,7 @@ static void vc4_crtc_handle_page_flip(st
struct drm_crtc *crtc = &vc4_crtc->base;
struct drm_device *dev = crtc->dev;
struct vc4_dev *vc4 = to_vc4_dev(dev);
u32 chan = vc4_crtc->current_hvs_channel;
unsigned long flags;
-@@ -772,7 +778,7 @@ static void vc4_crtc_handle_page_flip(st
+@@ -756,7 +762,7 @@ static void vc4_crtc_handle_page_flip(st
* the CRTC and encoder already reconfigured, leading to
* underruns. This can be seen when reconfiguring the CRTC.
*/
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -959,14 +959,8 @@ void vc4_crtc_destroy_state(struct drm_c
+@@ -943,14 +943,8 @@ void vc4_crtc_destroy_state(struct drm_c
struct vc4_dev *vc4 = to_vc4_dev(crtc->dev);
struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(state);
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -813,6 +813,7 @@ struct vc4_async_flip_state {
+@@ -797,6 +797,7 @@ struct vc4_async_flip_state {
struct drm_pending_vblank_event *event;
struct vc4_seqno_cb cb;
};
/* Called when the V3D execution for the BO being flipped to is done, so that
-@@ -858,6 +859,39 @@ vc4_async_page_flip_complete(struct vc4_
+@@ -842,6 +843,39 @@ vc4_async_page_flip_complete(struct vc4_
kfree(flip_state);
}
/* Implements async (non-vblank-synced) page flips.
*
* The page flip ioctl needs to return immediately, so we grab the
-@@ -918,8 +952,7 @@ static int vc4_async_page_flip(struct dr
+@@ -902,8 +936,7 @@ static int vc4_async_page_flip(struct dr
*/
drm_atomic_set_fb_for_plane(plane->state, fb);
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -728,10 +728,16 @@ static int vc4_crtc_atomic_check(struct
+@@ -712,10 +712,16 @@ static int vc4_crtc_atomic_check(struct
if (conn_state->crtc != crtc)
continue;
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -998,8 +998,14 @@ void vc4_crtc_destroy_state(struct drm_c
+@@ -982,8 +982,14 @@ void vc4_crtc_destroy_state(struct drm_c
struct vc4_dev *vc4 = to_vc4_dev(crtc->dev);
struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(state);
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -2408,7 +2408,11 @@ static int __init __bcm2835_clk_driver_i
+@@ -2439,7 +2439,11 @@ static int __init __bcm2835_clk_driver_i
{
return platform_driver_register(&bcm2835_clk_driver);
}
return fifo_len_bytes - 3 * HVS_FIFO_LATENCY_PIX - 1;
return fifo_len_bytes - 3 * HVS_FIFO_LATENCY_PIX;
-@@ -425,7 +425,7 @@ static void vc4_crtc_config_pv(struct dr
+@@ -409,7 +409,7 @@ static void vc4_crtc_config_pv(struct dr
if (is_dsi)
CRTC_WRITE(PV_HACT_ACT, mode->hdisplay * pixel_rep);
CRTC_WRITE(PV_MUX_CFG,
VC4_SET_FIELD(PV_MUX_CFG_RGB_PIXEL_MUX_MODE_NO_SWAP,
PV_MUX_CFG_RGB_PIXEL_MUX_MODE));
-@@ -883,7 +883,7 @@ static int vc4_async_set_fence_cb(struct
+@@ -867,7 +867,7 @@ static int vc4_async_set_fence_cb(struct
struct vc4_dev *vc4 = to_vc4_dev(dev);
struct dma_fence *fence;
struct vc4_bo *bo = to_vc4_bo(&cma_bo->base);
return vc4_queue_seqno_cb(dev, &flip_state->cb, bo->seqno,
-@@ -1225,13 +1225,13 @@ int vc4_crtc_init(struct drm_device *drm
+@@ -1209,13 +1209,13 @@ int vc4_crtc_init(struct drm_device *drm
crtc_funcs, NULL);
drm_crtc_helper_add(crtc, crtc_helper_funcs);
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -818,18 +818,18 @@ struct vc4_async_flip_state {
+@@ -802,18 +802,18 @@ struct vc4_async_flip_state {
struct drm_framebuffer *old_fb;
struct drm_pending_vblank_event *event;
struct drm_crtc *crtc = flip_state->crtc;
struct drm_device *dev = crtc->dev;
struct drm_plane *plane = crtc->primary;
-@@ -865,13 +865,21 @@ vc4_async_page_flip_complete(struct vc4_
+@@ -849,13 +849,21 @@ vc4_async_page_flip_complete(struct vc4_
kfree(flip_state);
}
dma_fence_put(fence);
}
-@@ -886,14 +894,14 @@ static int vc4_async_set_fence_cb(struct
+@@ -870,14 +878,14 @@ static int vc4_async_set_fence_cb(struct
if (!vc4->is_vc5) {
struct vc4_bo *bo = to_vc4_bo(&cma_bo->base);
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -846,21 +846,8 @@ vc4_async_page_flip_complete(struct vc4_
+@@ -830,21 +830,8 @@ vc4_async_page_flip_complete(struct vc4_
drm_crtc_vblank_put(crtc);
drm_framebuffer_put(flip_state->fb);
kfree(flip_state);
}
-@@ -869,8 +856,27 @@ static void vc4_async_page_flip_seqno_co
+@@ -853,8 +840,27 @@ static void vc4_async_page_flip_seqno_co
{
struct vc4_async_flip_state *flip_state =
container_of(cb, struct vc4_async_flip_state, cb.seqno);
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -912,40 +912,19 @@ static int vc4_async_set_fence_cb(struct
+@@ -896,40 +896,19 @@ static int vc4_async_set_fence_cb(struct
return 0;
}
drm_framebuffer_get(fb);
flip_state->fb = fb;
-@@ -978,6 +957,48 @@ static int vc4_async_page_flip(struct dr
+@@ -962,6 +941,48 @@ static int vc4_async_page_flip(struct dr
return 0;
}
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -999,16 +999,31 @@ static int vc4_async_page_flip(struct dr
+@@ -983,16 +983,31 @@ static int vc4_async_page_flip(struct dr
return 0;
}
/*
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
-@@ -1903,6 +1903,7 @@ struct xhci_hcd {
- #define XHCI_NO_SOFT_RETRY BIT_ULL(40)
+@@ -1904,6 +1904,7 @@ struct xhci_hcd {
#define XHCI_BROKEN_D3COLD BIT_ULL(41)
#define XHCI_EP_CTX_BROKEN_DCS BIT_ULL(42)
+ #define XHCI_SUSPEND_RESUME_CLKS BIT_ULL(43)
+#define XHCI_FAKE_DOORBELL BIT_ULL(44)
unsigned int num_active_eps;
static void btusb_mtk_wmt_recv(struct urb *urb)
{
struct hci_dev *hdev = urb->context;
-@@ -3900,6 +3917,7 @@ static int btusb_probe(struct usb_interf
+@@ -3914,6 +3931,7 @@ static int btusb_probe(struct usb_interf
hdev->shutdown = btusb_mtk_shutdown;
hdev->manufacturer = 70;
hdev->cmd_timeout = btusb_mtk_cmd_timeout;
--- a/net/netfilter/nf_conntrack_core.c
+++ b/net/netfilter/nf_conntrack_core.c
-@@ -2727,7 +2727,7 @@ int nf_conntrack_init_start(void)
+@@ -2735,7 +2735,7 @@ int nf_conntrack_init_start(void)
if (!nf_conntrack_htable_size) {
nf_conntrack_htable_size
*/
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
-@@ -2852,6 +2852,10 @@ static inline int pskb_trim(struct sk_bu
+@@ -2854,6 +2854,10 @@ static inline int pskb_trim(struct sk_bu
return (len < skb->len) ? __pskb_trim(skb, len) : 0;
}
/**
* pskb_trim_unique - remove end from a paged unique (not cloned) buffer
* @skb: buffer to alter
-@@ -3002,16 +3006,6 @@ static inline struct sk_buff *dev_alloc_
+@@ -3004,16 +3008,6 @@ static inline struct sk_buff *dev_alloc_
}
#include <linux/crc32.h>
#include <linux/if_vlan.h>
#include <linux/uaccess.h>
-@@ -6861,6 +6862,22 @@ static void rtl_tally_reset(struct r8152
+@@ -6863,6 +6864,22 @@ static void rtl_tally_reset(struct r8152
ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
}
static void r8152b_init(struct r8152 *tp)
{
u32 ocp_data;
-@@ -6902,6 +6919,8 @@ static void r8152b_init(struct r8152 *tp
+@@ -6904,6 +6921,8 @@ static void r8152b_init(struct r8152 *tp
ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
}
static void r8153_init(struct r8152 *tp)
-@@ -7042,6 +7061,8 @@ static void r8153_init(struct r8152 *tp)
+@@ -7044,6 +7063,8 @@ static void r8153_init(struct r8152 *tp)
tp->coalesce = COALESCE_SLOW;
break;
}
}
static void r8153b_init(struct r8152 *tp)
-@@ -7124,6 +7145,8 @@ static void r8153b_init(struct r8152 *tp
+@@ -7126,6 +7147,8 @@ static void r8153b_init(struct r8152 *tp
rtl_tally_reset(tp);
tp->coalesce = 15000; /* 15 us */
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
-@@ -2818,7 +2818,7 @@ static inline int pskb_network_may_pull(
+@@ -2820,7 +2820,7 @@ static inline int pskb_network_may_pull(
* NET_IP_ALIGN(2) + ethernet_header(14) + IP_header(20/40) + ports(8)
*/
#ifndef NET_SKB_PAD
#endif
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
-@@ -891,6 +891,7 @@ struct sk_buff {
+@@ -892,6 +892,7 @@ struct sk_buff {
#ifdef CONFIG_IPV6_NDISC_NODETYPE
__u8 ndisc_nodetype:2;
#endif
--- a/arch/arm/boot/compressed/vmlinux.lds.S
+++ b/arch/arm/boot/compressed/vmlinux.lds.S
-@@ -101,6 +101,13 @@ SECTIONS
+@@ -103,6 +103,13 @@ SECTIONS
_edata = .;
/*
* The image_end section appears after any additional loadable sections
* that the linker may decide to insert in the binary image. Having
-@@ -138,4 +145,4 @@ SECTIONS
+@@ -140,4 +147,4 @@ SECTIONS
ARM_ASSERTS
}
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
-@@ -2446,7 +2446,7 @@ MODULE_DEVICE_TABLE(of, sdhci_msm_dt_mat
+@@ -2447,7 +2447,7 @@ MODULE_DEVICE_TABLE(of, sdhci_msm_dt_mat
static const struct sdhci_ops sdhci_msm_ops = {
.reset = sdhci_msm_reset,
tmp = readl(u3_banks->phya + U3P_U3_PHYA_DA_REG0);
tmp &= ~(P3A_RG_XTAL_EXT_PE1H | P3A_RG_XTAL_EXT_PE2H);
tmp |= P3A_RG_XTAL_EXT_PE1H_VAL(0x2) | P3A_RG_XTAL_EXT_PE2H_VAL(0x2);
-@@ -1436,6 +1446,16 @@ static int mtk_tphy_probe(struct platfor
+@@ -1437,6 +1447,16 @@ static int mtk_tphy_probe(struct platfor
&tphy->src_coef);
}
},
[PORT_NPCM] = {
.name = "Nuvoton 16550",
-@@ -2745,6 +2745,11 @@ serial8250_do_set_termios(struct uart_po
+@@ -2748,6 +2748,11 @@ serial8250_do_set_termios(struct uart_po
unsigned long flags;
unsigned int baud, quot, frac = 0;
static void phy_parse_property(struct mtk_tphy *tphy,
struct mtk_phy_instance *instance)
{
-@@ -1143,6 +1186,40 @@ static int phy_efuse_get(struct mtk_tphy
+@@ -1144,6 +1187,40 @@ static int phy_efuse_get(struct mtk_tphy
dev_dbg(dev, "u3 efuse - intr %x, rx_imp %x, tx_imp %x\n",
instance->efuse_intr, instance->efuse_rx_imp,instance->efuse_tx_imp);
break;
default:
dev_err(dev, "no sw efuse for type %d\n", instance->type);
-@@ -1174,6 +1251,31 @@ static void phy_efuse_set(struct mtk_phy
+@@ -1175,6 +1252,31 @@ static void phy_efuse_set(struct mtk_phy
writel(tmp, u2_banks->com + U3P_USBPHYACR1);
break;
case PHY_TYPE_USB3:
case PHY_TYPE_PCIE:
tmp = readl(u3_banks->phyd + U3P_U3_PHYD_RSV);
tmp |= P3D_RG_EFUSE_AUTO_LOAD_DIS;
-@@ -1195,6 +1297,34 @@ static void phy_efuse_set(struct mtk_phy
+@@ -1196,6 +1298,34 @@ static void phy_efuse_set(struct mtk_phy
tmp &= ~P3A_RG_IEXT_INTR;
tmp |= P3A_RG_IEXT_INTR_VAL(instance->efuse_intr);
writel(tmp, u3_banks->phya + U3P_U3_PHYA_REG0);
break;
default:
dev_warn(dev, "no sw efuse for type %d\n", instance->type);
-@@ -1334,6 +1464,9 @@ static struct phy *mtk_phy_xlate(struct
+@@ -1335,6 +1465,9 @@ static struct phy *mtk_phy_xlate(struct
case MTK_PHY_V3:
phy_v2_banks_init(tphy, instance);
break;
default:
dev_err(dev, "phy version is not supported\n");
return ERR_PTR(-EINVAL);
-@@ -1374,6 +1507,12 @@ static const struct mtk_phy_pdata tphy_v
+@@ -1375,6 +1508,12 @@ static const struct mtk_phy_pdata tphy_v
.version = MTK_PHY_V3,
};
static const struct mtk_phy_pdata mt8173_pdata = {
.avoid_rx_sen_degradation = true,
.version = MTK_PHY_V1,
-@@ -1393,6 +1532,7 @@ static const struct of_device_id mtk_tph
+@@ -1394,6 +1533,7 @@ static const struct of_device_id mtk_tph
{ .compatible = "mediatek,generic-tphy-v1", .data = &tphy_v1_pdata },
{ .compatible = "mediatek,generic-tphy-v2", .data = &tphy_v2_pdata },
{ .compatible = "mediatek,generic-tphy-v3", .data = &tphy_v3_pdata },
u32 efuse_intr_ln1;
u32 efuse_tx_imp_ln1;
u32 efuse_rx_imp_ln1;
-@@ -1125,6 +1129,7 @@ static int phy_efuse_get(struct mtk_tphy
+@@ -1126,6 +1130,7 @@ static int phy_efuse_get(struct mtk_tphy
{
struct device *dev = &instance->phy->dev;
int ret = 0;
/* tphy v1 doesn't support sw efuse, skip it */
if (!tphy->pdata->sw_efuse_supported) {
-@@ -1139,6 +1144,20 @@ static int phy_efuse_get(struct mtk_tphy
+@@ -1140,6 +1145,20 @@ static int phy_efuse_get(struct mtk_tphy
switch (instance->type) {
case PHY_TYPE_USB2:
ret = nvmem_cell_read_variable_le_u32(dev, "intr", &instance->efuse_intr);
if (ret) {
dev_err(dev, "fail to get u2 intr efuse, %d\n", ret);
-@@ -1157,6 +1176,20 @@ static int phy_efuse_get(struct mtk_tphy
+@@ -1158,6 +1177,20 @@ static int phy_efuse_get(struct mtk_tphy
case PHY_TYPE_USB3:
case PHY_TYPE_PCIE:
ret = nvmem_cell_read_variable_le_u32(dev, "intr", &instance->efuse_intr);
if (ret) {
dev_err(dev, "fail to get u3 intr efuse, %d\n", ret);
-@@ -1190,6 +1223,20 @@ static int phy_efuse_get(struct mtk_tphy
+@@ -1191,6 +1224,20 @@ static int phy_efuse_get(struct mtk_tphy
if (tphy->pdata->version != MTK_PHY_V4)
break;
ret = nvmem_cell_read_variable_le_u32(dev, "intr_ln1", &instance->efuse_intr_ln1);
if (ret) {
dev_err(dev, "fail to get u3 lane1 intr efuse, %d\n", ret);
-@@ -1241,6 +1288,10 @@ static void phy_efuse_set(struct mtk_phy
+@@ -1242,6 +1289,10 @@ static void phy_efuse_set(struct mtk_phy
switch (instance->type) {
case PHY_TYPE_USB2:
tmp = readl(u2_banks->misc + U3P_MISC_REG1);
tmp |= MR1_EFUSE_AUTO_LOAD_DIS;
writel(tmp, u2_banks->misc + U3P_MISC_REG1);
-@@ -1251,6 +1302,10 @@ static void phy_efuse_set(struct mtk_phy
+@@ -1252,6 +1303,10 @@ static void phy_efuse_set(struct mtk_phy
writel(tmp, u2_banks->com + U3P_USBPHYACR1);
break;
case PHY_TYPE_USB3:
tmp = readl(u3_banks->phyd + U3P_U3_PHYD_RSV);
tmp |= P3D_RG_EFUSE_AUTO_LOAD_DIS;
writel(tmp, u3_banks->phyd + U3P_U3_PHYD_RSV);
-@@ -1277,6 +1332,10 @@ static void phy_efuse_set(struct mtk_phy
+@@ -1278,6 +1333,10 @@ static void phy_efuse_set(struct mtk_phy
break;
case PHY_TYPE_PCIE:
tmp = readl(u3_banks->phyd + U3P_U3_PHYD_RSV);
tmp |= P3D_RG_EFUSE_AUTO_LOAD_DIS;
writel(tmp, u3_banks->phyd + U3P_U3_PHYD_RSV);
-@@ -1297,9 +1356,12 @@ static void phy_efuse_set(struct mtk_phy
+@@ -1298,9 +1357,12 @@ static void phy_efuse_set(struct mtk_phy
tmp &= ~P3A_RG_IEXT_INTR;
tmp |= P3A_RG_IEXT_INTR_VAL(instance->efuse_intr);
writel(tmp, u3_banks->phya + U3P_U3_PHYA_REG0);
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
-@@ -162,6 +162,7 @@ src-plat-$(CONFIG_PPC_PSERIES) += pserie
+@@ -163,6 +163,7 @@ src-plat-$(CONFIG_PPC_PSERIES) += pserie
src-plat-$(CONFIG_PPC_POWERNV) += pseries-head.S
src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S
src-plat-$(CONFIG_MVME7100) += motload-head.S mvme7100.c
src-plat-$(CONFIG_PPC_MICROWATT) += fixed-head.S microwatt.c
-@@ -342,7 +343,7 @@ image-$(CONFIG_TQM8548) += cuImage.tqm
+@@ -343,7 +344,7 @@ image-$(CONFIG_TQM8548) += cuImage.tqm
image-$(CONFIG_TQM8555) += cuImage.tqm8555
image-$(CONFIG_TQM8560) += cuImage.tqm8560
image-$(CONFIG_KSI8560) += cuImage.ksi8560
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
-@@ -271,7 +271,6 @@ image-$(CONFIG_PPC_CHRP) += zImage.chrp
+@@ -272,7 +272,6 @@ image-$(CONFIG_PPC_CHRP) += zImage.chrp
image-$(CONFIG_PPC_EFIKA) += zImage.chrp
image-$(CONFIG_PPC_PMAC) += zImage.pmac
image-$(CONFIG_PPC_HOLLY) += dtbImage.holly
image-$(CONFIG_EPAPR_BOOT) += zImage.epapr
#
-@@ -403,15 +402,6 @@ $(obj)/dtbImage.%: vmlinux $(wrapperbits
+@@ -404,15 +403,6 @@ $(obj)/dtbImage.%: vmlinux $(wrapperbits
$(obj)/vmlinux.strip: vmlinux
$(STRIP) -s -R .comment $< -o $@
static inline struct clk_oxnas_gate *to_clk_oxnas_gate(struct clk_hw *hw)
{
return container_of(hw, struct clk_oxnas_gate, hw);
-@@ -249,3 +401,42 @@ static struct platform_driver oxnas_stdc
+@@ -251,3 +403,42 @@ static struct platform_driver oxnas_stdc
},
};
builtin_platform_driver(oxnas_stdclk_driver);
projects / openwrt / openwrt.git / commitdiff