ramips_eth: update register offsets

SVN-Revision: 19463

diff --git a/target/linux/ramips/files/drivers/net/ramips_eth.h b/target/linux/ramips/files/drivers/net/ramips_eth.h
index 31c4fc08eb8865889fb98ca5adf4467f1c155704..593dd1d87aab9acb40a10bae3bc0099a3d46ffb0 100644 (file)
--- a/target/linux/ramips/files/drivers/net/ramips_eth.h
+++ b/target/linux/ramips/files/drivers/net/ramips_eth.h
@@ -105,6 +105,10 @@
 #define RAMIPS_TX_MAX_CNT1             (RAMIPS_PDMA_OFFSET + 0x24)
 #define RAMIPS_TX_CTX_IDX1             (RAMIPS_PDMA_OFFSET + 0x28)
 #define RAMIPS_TX_DTX_IDX1             (RAMIPS_PDMA_OFFSET + 0x2C)
 #define RAMIPS_TX_MAX_CNT1             (RAMIPS_PDMA_OFFSET + 0x24)
 #define RAMIPS_TX_CTX_IDX1             (RAMIPS_PDMA_OFFSET + 0x28)
 #define RAMIPS_TX_DTX_IDX1             (RAMIPS_PDMA_OFFSET + 0x2C)

+#define RAMIPS_RX_BASE_PTR0            (RAMIPS_PDMA_OFFSET + 0x30)
+#define RAMIPS_RX_MAX_CNT0             (RAMIPS_PDMA_OFFSET + 0x34)
+#define RAMIPS_RX_CALC_IDX0            (RAMIPS_PDMA_OFFSET + 0x38)
+#define RAMIPS_RX_DRX_IDX0             (RAMIPS_PDMA_OFFSET + 0x3C)

 #define RAMIPS_TX_BASE_PTR2            (RAMIPS_PDMA_OFFSET + 0x40)
 #define RAMIPS_TX_MAX_CNT2             (RAMIPS_PDMA_OFFSET + 0x44)
 #define RAMIPS_TX_CTX_IDX2             (RAMIPS_PDMA_OFFSET + 0x48)
 #define RAMIPS_TX_BASE_PTR2            (RAMIPS_PDMA_OFFSET + 0x40)
 #define RAMIPS_TX_MAX_CNT2             (RAMIPS_PDMA_OFFSET + 0x44)
 #define RAMIPS_TX_CTX_IDX2             (RAMIPS_PDMA_OFFSET + 0x48)


@@ -113,14 +117,10 @@
 #define RAMIPS_TX_MAX_CNT3             (RAMIPS_PDMA_OFFSET + 0x54)
 #define RAMIPS_TX_CTX_IDX3             (RAMIPS_PDMA_OFFSET + 0x58)
 #define RAMIPS_TX_DTX_IDX3             (RAMIPS_PDMA_OFFSET + 0x5C)
 #define RAMIPS_TX_MAX_CNT3             (RAMIPS_PDMA_OFFSET + 0x54)
 #define RAMIPS_TX_CTX_IDX3             (RAMIPS_PDMA_OFFSET + 0x58)
 #define RAMIPS_TX_DTX_IDX3             (RAMIPS_PDMA_OFFSET + 0x5C)

-#define RAMIPS_RX_BASE_PTR0            (RAMIPS_PDMA_OFFSET + 0x30)
-#define RAMIPS_RX_MAX_CNT0             (RAMIPS_PDMA_OFFSET + 0x34)
-#define RAMIPS_RX_CALC_IDX0            (RAMIPS_PDMA_OFFSET + 0x38)
-#define RAMIPS_RX_DRX_IDX0             (RAMIPS_PDMA_OFFSET + 0x3C)
-#define RAMIPS_RX_BASE_PTR1            (RAMIPS_PDMA_OFFSET + 0x40)
-#define RAMIPS_RX_MAX_CNT1             (RAMIPS_PDMA_OFFSET + 0x44)
-#define RAMIPS_RX_CALC_IDX1            (RAMIPS_PDMA_OFFSET + 0x48)
-#define RAMIPS_RX_DRX_IDX1             (RAMIPS_PDMA_OFFSET + 0x4C)
+#define RAMIPS_RX_BASE_PTR1            (RAMIPS_PDMA_OFFSET + 0x60)
+#define RAMIPS_RX_MAX_CNT1             (RAMIPS_PDMA_OFFSET + 0x64)
+#define RAMIPS_RX_CALC_IDX1            (RAMIPS_PDMA_OFFSET + 0x68)
+#define RAMIPS_RX_DRX_IDX1             (RAMIPS_PDMA_OFFSET + 0x6C)

 
 /* uni-cast port */
 #define RAMIPS_GDM1_ICS_EN             BIT(22)
 
 /* uni-cast port */
 #define RAMIPS_GDM1_ICS_EN             BIT(22)