ap121 |\
ap121-mini |\
+ap143 |\
ap96 |\
airrouter |\
dir-600-a1 |\
*"AP135-020 reference board")
name="ap135-020"
;;
+ *"AP143 reference board")
+ name="ap143"
+ ;;
*AP81)
name="ap81"
;;
CONFIG_ATH79_MACH_AP121=y
CONFIG_ATH79_MACH_AP132=y
CONFIG_ATH79_MACH_AP136=y
+CONFIG_ATH79_MACH_AP143=y
CONFIG_ATH79_MACH_AP81=y
CONFIG_ATH79_MACH_AP83=y
CONFIG_ATH79_MACH_AP96=y
--- /dev/null
+/*
+ * Atheros AP143 reference board support
+ *
+ * Copyright (c) 2013-2015 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
+
+#include <linux/platform_device.h>
+#include <linux/ath9k_platform.h>
+#include <linux/ar8216_platform.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include "common.h"
+#include "dev-eth.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-spi.h"
+#include "dev-usb.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+
+#define AP143_GPIO_LED_WLAN 12
+#define AP143_GPIO_LED_WPS 13
+#define AP143_GPIO_LED_STATUS 13
+
+#define AP143_GPIO_LED_WAN 4
+#define AP143_GPIO_LED_LAN1 16
+#define AP143_GPIO_LED_LAN2 15
+#define AP143_GPIO_LED_LAN3 14
+#define AP143_GPIO_LED_LAN4 11
+
+#define AP143_GPIO_BTN_WPS 17
+
+#define AP143_KEYS_POLL_INTERVAL 20 /* msecs */
+#define AP143_KEYS_DEBOUNCE_INTERVAL (3 * AP143_KEYS_POLL_INTERVAL)
+
+#define AP143_MAC0_OFFSET 0
+#define AP143_MAC1_OFFSET 6
+#define AP143_WMAC_CALDATA_OFFSET 0x1000
+
+static struct gpio_led ap143_leds_gpio[] __initdata = {
+ {
+ .name = "ap143:green:status",
+ .gpio = AP143_GPIO_LED_STATUS,
+ .active_low = 1,
+ },
+ {
+ .name = "ap143:green:wlan",
+ .gpio = AP143_GPIO_LED_WLAN,
+ .active_low = 1,
+ }
+};
+
+static struct gpio_keys_button ap143_gpio_keys[] __initdata = {
+ {
+ .desc = "WPS button",
+ .type = EV_KEY,
+ .code = KEY_WPS_BUTTON,
+ .debounce_interval = AP143_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = AP143_GPIO_BTN_WPS,
+ .active_low = 1,
+ },
+};
+
+static void __init ap143_gpio_led_setup(void)
+{
+ ath79_gpio_direction_select(AP143_GPIO_LED_WAN, true);
+ ath79_gpio_direction_select(AP143_GPIO_LED_LAN1, true);
+ ath79_gpio_direction_select(AP143_GPIO_LED_LAN2, true);
+ ath79_gpio_direction_select(AP143_GPIO_LED_LAN3, true);
+ ath79_gpio_direction_select(AP143_GPIO_LED_LAN4, true);
+
+ ath79_gpio_output_select(AP143_GPIO_LED_WAN,
+ QCA953X_GPIO_OUT_MUX_LED_LINK5);
+ ath79_gpio_output_select(AP143_GPIO_LED_LAN1,
+ QCA953X_GPIO_OUT_MUX_LED_LINK1);
+ ath79_gpio_output_select(AP143_GPIO_LED_LAN2,
+ QCA953X_GPIO_OUT_MUX_LED_LINK2);
+ ath79_gpio_output_select(AP143_GPIO_LED_LAN3,
+ QCA953X_GPIO_OUT_MUX_LED_LINK3);
+ ath79_gpio_output_select(AP143_GPIO_LED_LAN4,
+ QCA953X_GPIO_OUT_MUX_LED_LINK4);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap143_leds_gpio),
+ ap143_leds_gpio);
+ ath79_register_gpio_keys_polled(-1, AP143_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(ap143_gpio_keys),
+ ap143_gpio_keys);
+}
+
+static void __init ap143_setup(void)
+{
+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
+
+ ath79_register_m25p80(NULL);
+
+ ap143_gpio_led_setup();
+
+ ath79_register_usb();
+
+ ath79_wmac_set_led_pin(AP143_GPIO_LED_WLAN);
+ ath79_register_wmac(art + AP143_WMAC_CALDATA_OFFSET, NULL);
+
+ ath79_register_mdio(0, 0x0);
+ ath79_register_mdio(1, 0x0);
+
+ ath79_init_mac(ath79_eth0_data.mac_addr, art + AP143_MAC0_OFFSET, 0);
+ ath79_init_mac(ath79_eth1_data.mac_addr, art + AP143_MAC1_OFFSET, 0);
+
+ /* WAN port */
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
+ ath79_eth0_data.speed = SPEED_100;
+ ath79_eth0_data.duplex = DUPLEX_FULL;
+ ath79_eth0_data.phy_mask = BIT(4);
+ ath79_register_eth(0);
+
+ /* LAN ports */
+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
+ ath79_eth1_data.speed = SPEED_1000;
+ ath79_eth1_data.duplex = DUPLEX_FULL;
+ ath79_switch_data.phy_poll_mask |= BIT(4);
+ ath79_switch_data.phy4_mii_en = 1;
+ ath79_register_eth(1);
+}
+
+MIPS_MACHINE(ATH79_MACH_AP143, "AP143", "Qualcomm Atheros AP143 reference board",
+ ap143_setup);
$(eval $(call Profile,AP136))
+define Profile/AP143
+ NAME:=Qualcomm Atheros AP143 reference board
+ PACKAGES:=kmod-usb-core kmod-usb2 kmod-usb-storage
+endef
+
+define Profile/AP143/Description
+ Package set optimized for the Qualcomm Atheros AP143 reference board.
+endef
+
+$(eval $(call Profile,AP143))
+
+
define Profile/AP81
NAME:=Atheros AP81 reference board
PACKAGES:=kmod-usb-core kmod-usb2
ap132_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),6400k(rootfs),64k(art),7808k@0x50000(firmware)
ap135_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,14528k(rootfs),1472k(kernel),64k(art)ro,16000k@0x50000(firmware)
ap136_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,6336k(rootfs),1408k(kernel),64k(mib0),64k(art)ro,7744k@0x50000(firmware)
+ap143_mtdlayout_8M=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,6336k(rootfs),1472k(kernel),64k(art)ro,7744k@0x50000(firmware)
+ap143_mtdlayout_16M=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,14528k(rootfs),1472k(kernel),64k(art)ro,16000k@0x50000(firmware)
bxu2000n2_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),8448k(rootfs),6016k(user),64k(cfg),64k(oem),64k(art)ro
cameo_ap81_mtdlayout=mtdparts=spi0.0:128k(u-boot)ro,64k(config)ro,3840k(firmware),64k(art)ro
cameo_ap91_mtdlayout=mtdparts=spi0.0:192k(u-boot)ro,64k(nvram)ro,3712k(firmware),64k(mac)ro,64k(art)ro
$(eval $(call SingleProfile,AthLzma,64k,AP135,ap135-020,AP135-020,ttyS0,115200,$$(ap135_mtdlayout),RKuImage))
$(eval $(call SingleProfile,AthLzma,64k,AP136_010,ap136-010,AP136-010,ttyS0,115200,$$(ap136_mtdlayout),RKuImage))
$(eval $(call SingleProfile,AthLzma,64k,AP136_020,ap136-020,AP136-020,ttyS0,115200,$$(ap136_mtdlayout),RKuImage))
+$(eval $(call SingleProfile,AthLzma,64k,AP143_8M,ap143-8M,AP143,ttyS0,115200,$$(ap143_mtdlayout_8M),RKuImage))
+$(eval $(call SingleProfile,AthLzma,64k,AP143_16M,ap143-16M,AP143,ttyS0,115200,$$(ap143_mtdlayout_16M),RKuImage))
$(eval $(call SingleProfile,AthLzma,64k,BXU2000N2,bxu2000n-2-a1,BXU2000n-2-A1,ttyS0,115200,$$(bxu2000n2_mtdlayout),RKuImage))
$(eval $(call SingleProfile,AthLzma,64k,CAP4200AG,cap4200ag,CAP4200AG,ttyS0,115200,$$(cap4200ag_mtdlayout),KRuImage))
$(eval $(call SingleProfile,AthLzma,64k,DB120,db120,DB120,ttyS0,115200,$$(db120_mtdlayout),RKuImage))
$(eval $(call MultiProfile,AP121,AP121_2M AP121_4M))
$(eval $(call MultiProfile,AP136,AP136_010 AP136_020))
+$(eval $(call MultiProfile,AP143,AP143_8M AP143_16M))
$(eval $(call MultiProfile,EWDORIN, EWDORINAP EWDORINRT EWDORIN16M))
$(eval $(call MultiProfile,OPENMESH,OM2P OM5P MR600 MR900))
$(eval $(call MultiProfile,TEW652BRP,TEW652BRP_FW TEW652BRP_RECOVERY))
--- /dev/null
+--- a/arch/mips/ath79/dev-wmac.c
++++ b/arch/mips/ath79/dev-wmac.c
+@@ -398,6 +398,11 @@ void __init ath79_wmac_set_ext_lna_gpio(unsigned chain, int gpio)
+ ar934x_set_ext_lna_gpio(chain, gpio);
+ }
+
++void __init ath79_wmac_set_led_pin(int gpio)
++{
++ ath79_wmac_data.led_pin = gpio;
++}
++
+ void __init ath79_register_wmac(u8 *cal_data, u8 *mac_addr)
+ {
+ if (soc_is_ar913x())
+--- a/arch/mips/ath79/dev-wmac.h
++++ b/arch/mips/ath79/dev-wmac.h
+@@ -18,6 +18,7 @@ void ath79_wmac_disable_2ghz(void);
+ void ath79_wmac_disable_5ghz(void);
+ void ath79_wmac_set_tx_gain_buffalo(void);
+ void ath79_wmac_set_ext_lna_gpio(unsigned chain, int gpio);
++void ath79_wmac_set_led_pin(int gpio);
+
+ bool ar93xx_wmac_read_mac_address(u8 *dest);
+
--- /dev/null
+--- a/arch/mips/ath79/common.h
++++ b/arch/mips/ath79/common.h
+@@ -28,6 +28,7 @@ void ath79_gpio_function_enable(u32 mask);
+ void ath79_gpio_function_disable(u32 mask);
+ void ath79_gpio_function_setup(u32 set, u32 clear);
+ void ath79_gpio_output_select(unsigned gpio, u8 val);
++int ath79_gpio_direction_select(unsigned gpio, bool oe);
+ void ath79_gpio_init(void);
+
+ #endif /* __ATH79_COMMON_H */
+--- a/arch/mips/ath79/gpio.c
++++ b/arch/mips/ath79/gpio.c
+@@ -130,6 +130,30 @@ static int ar934x_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
+ return 0;
+ }
+
++int ath79_gpio_direction_select(unsigned gpio, bool oe)
++{
++ void __iomem *base = ath79_gpio_base;
++ unsigned long flags;
++ bool ieq_1 = (soc_is_ar934x() ||
++ soc_is_qca953x());
++
++ if (gpio >= ath79_gpio_count)
++ return -1;
++
++ spin_lock_irqsave(&ath79_gpio_lock, flags);
++
++ if ((ieq_1 && oe) || (!ieq_1 && !oe))
++ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << gpio),
++ base + AR71XX_GPIO_REG_OE);
++ else
++ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << gpio),
++ base + AR71XX_GPIO_REG_OE);
++
++ spin_unlock_irqrestore(&ath79_gpio_lock, flags);
++
++ return 0;
++}
++
+ static struct gpio_chip ath79_gpio_chip = {
+ .label = "ath79",
+ .get = ath79_gpio_get_value,
--- /dev/null
+--- a/arch/mips/ath79/Kconfig
++++ b/arch/mips/ath79/Kconfig
+@@ -114,6 +114,20 @@ config ATH79_MACH_AP136
+ Say 'Y' here if you want your kernel to support the
+ Atheros AP136 or AP135 reference boards.
+
++config ATH79_MACH_AP143
++ bool "Atheros AP143 reference board"
++ select SOC_QCA953X
++ select ATH79_DEV_GPIO_BUTTONS
++ select ATH79_DEV_LEDS_GPIO
++ select ATH79_DEV_SPI
++ select ATH79_DEV_USB
++ select ATH79_DEV_WMAC
++ select ATH79_DEV_ETH
++ select ATH79_DEV_M25P80
++ help
++ Say 'Y' here if you want your kernel to support the
++ Atheros AP143 reference board.
++
+ config ATH79_MACH_AP81
+ bool "Atheros AP81 reference board"
+ select SOC_AR913X
+--- a/arch/mips/ath79/Makefile
++++ b/arch/mips/ath79/Makefile
+@@ -47,6 +47,7 @@ obj-$(CONFIG_ATH79_MACH_AP113) += mach-ap113.o
+ obj-$(CONFIG_ATH79_MACH_AP121) += mach-ap121.o
+ obj-$(CONFIG_ATH79_MACH_AP132) += mach-ap132.o
+ obj-$(CONFIG_ATH79_MACH_AP136) += mach-ap136.o
++obj-$(CONFIG_ATH79_MACH_AP143) += mach-ap143.o
+ obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o
+ obj-$(CONFIG_ATH79_MACH_AP83) += mach-ap83.o
+ obj-$(CONFIG_ATH79_MACH_AP96) += mach-ap96.o
+--- a/arch/mips/ath79/machtypes.h
++++ b/arch/mips/ath79/machtypes.h
+@@ -29,6 +29,7 @@ enum ath79_mach_type {
+ ATH79_MACH_AP135_020, /* Atheros AP135-020 reference board */
+ ATH79_MACH_AP136_010, /* Atheros AP136-010 reference board */
+ ATH79_MACH_AP136_020, /* Atheros AP136-020 reference board */
++ ATH79_MACH_AP143, /* Atheros AP143 reference board */
+ ATH79_MACH_AP81, /* Atheros AP81 reference board */
+ ATH79_MACH_AP83, /* Atheros AP83 */
+ ATH79_MACH_AP96, /* Atheros AP96 */
projects / openwrt / openwrt.git / commitdiff