--- /dev/null
+#
+# Copyright (C) 2006 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+include $(TOPDIR)/rules.mk
+
+ARCH:=cris
+BOARD:=etrax
+BOARDNAME:=FOXBOARD (ETRAX 100LX)
+FEATURES:=squashfs jffs2
+LINUX_VERSION:=2.6.19.2
+
+include $(INCLUDE_DIR)/kernel-build.mk
+
+define Target/Description
+ Build fimware images for the FOXBOARD made by acmesystems.it
+endef
+
+define Kernel/Prepare/Fox
+ bzcat $(DL_DIR)/$(LINUX_SOURCE) | tar -C $(KERNEL_BUILD_DIR) $(TAR_OPTIONS)
+ if [ -d ./files ]; then $(CP) ./files/* $(LINUX_DIR)/; fi
+ if [ -d ./patches/generic_2.6 ]; then $(PATCH) $(LINUX_DIR) ./patches/generic_2.6; fi
+ if [ -d ./patches/cris ]; then $(PATCH) $(LINUX_DIR) ./patches/cris; fi
+ ln -sf $(KERNEL_BUILD_DIR)/linux-$(LINUX_VERSION)/include/asm-cris/arch-v10 $(KERNEL_BUILD_DIR)/linux-$(LINUX_VERSION)/include/asm-cris/arch
+ ln -sf $(KERNEL_BUILD_DIR)/linux-$(LINUX_VERSION)/arch/cris/arch-v10 $(KERNEL_BUILD_DIR)/linux-$(LINUX_VERSION)/arch/cris/arch
+endef
+
+define Kernel/Prepare
+ $(call Kernel/Prepare/Fox)
+endef
+
+include $(INCLUDE_DIR)/prereq.mk
+
+$(eval $(call RequireCommand,/usr/local/cris/gcc-cris, \
+ Please install the binary cris toolchain. \
+))
+
+#include the profiles
+-include profiles/*.mk
+
+KERNELNAME:="zImage"
+$(eval $(call BuildKernel))
--- /dev/null
+::sysinit:/etc/init.d/rcS S boot
+::shutdown:/etc/init.d/rcS K stop
+console::askfirst:/bin/ash --login
+tts/0::askfirst:/bin/ash --login
+tty1::askfirst:/bin/ash --login
--- /dev/null
+CONFIG_BASE_SMALL=0
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CRIS=y
+# CONFIG_ETRAX100LX is not set
+CONFIG_ETRAX100LX_V2=y
+# CONFIG_ETRAXFS is not set
+# CONFIG_ETRAXFS_SIM is not set
+CONFIG_ETRAX_ARCH_V10=y
+# CONFIG_ETRAX_ARCH_V32 is not set
+CONFIG_ETRAX_AXISFLASHMAP=y
+# CONFIG_ETRAX_AXISFLASHMAP_MTD0WHOLE is not set
+CONFIG_ETRAX_CMDLINE="root=/dev/mtdblock1 rootfstype=squashfs,jffs2 init=/etc/preinit noinitrd console=ttyS0,115200"
+# CONFIG_ETRAX_CSP0_LEDS is not set
+# CONFIG_ETRAX_DEBUG_PORT0 is not set
+# CONFIG_ETRAX_DEBUG_PORT1 is not set
+# CONFIG_ETRAX_DEBUG_PORT2 is not set
+# CONFIG_ETRAX_DEBUG_PORT3 is not set
+CONFIG_ETRAX_DEBUG_PORT_NULL=y
+CONFIG_ETRAX_DEF_R_BUS_CONFIG=0x4
+# CONFIG_ETRAX_DEF_R_PORT_G_DIR is not set
+CONFIG_ETRAX_DEF_R_PORT_PA_DATA=0xf0
+CONFIG_ETRAX_DEF_R_PORT_PA_DIR=0x1c
+CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG=0x00
+CONFIG_ETRAX_DEF_R_PORT_PB_DATA=0x03
+CONFIG_ETRAX_DEF_R_PORT_PB_DIR=0xce
+CONFIG_ETRAX_DEF_R_SDRAM_CONFIG=0x09603737
+CONFIG_ETRAX_DEF_R_SDRAM_TIMING=0x80008002
+CONFIG_ETRAX_DEF_R_WAITSTATES=0x95f8
+CONFIG_ETRAX_DRAM_SIZE=32
+CONFIG_ETRAX_DRAM_VIRTUAL_BASE=c0000000
+CONFIG_ETRAX_DS1302=y
+CONFIG_ETRAX_DS1302_RSTBIT=2
+CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT=y
+CONFIG_ETRAX_DS1302_SCLBIT=1
+CONFIG_ETRAX_DS1302_SDABIT=0
+CONFIG_ETRAX_DS1302_TRICKLE_CHARGE=0
+CONFIG_ETRAX_ETHERNET=y
+CONFIG_ETRAX_FAST_TIMER=y
+CONFIG_ETRAX_FLASH1_SIZE=0
+CONFIG_ETRAX_FLASH_BUSWIDTH=2
+CONFIG_ETRAX_GPIO=y
+CONFIG_ETRAX_I2C=y
+CONFIG_ETRAX_I2C_CLK_PORT=1
+CONFIG_ETRAX_I2C_DATA_PORT=0
+# CONFIG_ETRAX_I2C_EEPROM is not set
+CONFIG_ETRAX_I2C_USES_PB_NOT_PB_I2C=y
+# CONFIG_ETRAX_IDE is not set
+CONFIG_ETRAX_LED1G=2
+CONFIG_ETRAX_LED1R=2
+CONFIG_ETRAX_LED2G=3
+CONFIG_ETRAX_LED2R=3
+CONFIG_ETRAX_LED3G=2
+CONFIG_ETRAX_LED3R=2
+CONFIG_ETRAX_NANDFLASH_BUSWIDTH=1
+CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY=y
+# CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK is not set
+# CONFIG_ETRAX_NO_LEDS is not set
+# CONFIG_ETRAX_NO_PHY is not set
+CONFIG_ETRAX_PA_CHANGEABLE_BITS=0xFF
+CONFIG_ETRAX_PA_CHANGEABLE_DIR=0xFF
+CONFIG_ETRAX_PA_LEDS=y
+CONFIG_ETRAX_PB_CHANGEABLE_BITS=0xFF
+CONFIG_ETRAX_PB_CHANGEABLE_DIR=0xFF
+# CONFIG_ETRAX_PB_LEDS is not set
+# CONFIG_ETRAX_PCF8563 is not set
+CONFIG_ETRAX_PTABLE_SECTOR=0
+CONFIG_ETRAX_RESCUE_SER0=y
+# CONFIG_ETRAX_RESCUE_SER1 is not set
+# CONFIG_ETRAX_RESCUE_SER2 is not set
+# CONFIG_ETRAX_RESCUE_SER3 is not set
+# CONFIG_ETRAX_RS485 is not set
+CONFIG_ETRAX_RTC=y
+CONFIG_ETRAX_SDRAM=y
+CONFIG_ETRAX_SER0_CD_ON_PA_BIT=-1
+CONFIG_ETRAX_SER0_CD_ON_PB_BIT=-1
+CONFIG_ETRAX_SER0_DSR_ON_PA_BIT=-1
+CONFIG_ETRAX_SER0_DSR_ON_PB_BIT=-1
+CONFIG_ETRAX_SER0_DTR_ON_PA_BIT=-1
+CONFIG_ETRAX_SER0_DTR_ON_PB_BIT=-1
+# CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED is not set
+CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_ON_NONE=y
+# CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_ON_PA is not set
+# CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_ON_PB is not set
+CONFIG_ETRAX_SER0_RI_ON_PA_BIT=-1
+CONFIG_ETRAX_SER0_RI_ON_PB_BIT=-1
+CONFIG_ETRAX_SER2_CD_ON_PA_BIT=7
+CONFIG_ETRAX_SER2_CD_ON_PB_BIT=-1
+CONFIG_ETRAX_SER2_DSR_ON_PA_BIT=6
+CONFIG_ETRAX_SER2_DSR_ON_PB_BIT=-1
+CONFIG_ETRAX_SER2_DTR_ON_PA_BIT=4
+CONFIG_ETRAX_SER2_DTR_ON_PB_BIT=-1
+# CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED is not set
+# CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_ON_NONE is not set
+CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_ON_PA=y
+# CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_ON_PB is not set
+CONFIG_ETRAX_SER2_RI_ON_PA_BIT=5
+CONFIG_ETRAX_SER2_RI_ON_PB_BIT=-1
+CONFIG_ETRAX_SER3_CD_ON_PA_BIT=-1
+CONFIG_ETRAX_SER3_CD_ON_PB_BIT=-1
+CONFIG_ETRAX_SER3_DSR_ON_PA_BIT=-1
+CONFIG_ETRAX_SER3_DSR_ON_PB_BIT=-1
+CONFIG_ETRAX_SER3_DTR_ON_PA_BIT=-1
+CONFIG_ETRAX_SER3_DTR_ON_PB_BIT=-1
+# CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED is not set
+CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_ON_NONE=y
+# CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_ON_PA is not set
+# CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_ON_PB is not set
+CONFIG_ETRAX_SER3_RI_ON_PA_BIT=-1
+CONFIG_ETRAX_SER3_RI_ON_PB_BIT=-1
+CONFIG_ETRAX_SERIAL=y
+# CONFIG_ETRAX_SERIAL_FAST_TIMER is not set
+# CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST is not set
+CONFIG_ETRAX_SERIAL_PORT0=y
+# CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT is not set
+# CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN is not set
+CONFIG_ETRAX_SERIAL_PORT0_NO_DMA_IN=y
+CONFIG_ETRAX_SERIAL_PORT0_NO_DMA_OUT=y
+# CONFIG_ETRAX_SERIAL_PORT1 is not set
+CONFIG_ETRAX_SERIAL_PORT2=y
+CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT=y
+CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN=y
+# CONFIG_ETRAX_SERIAL_PORT2_NO_DMA_IN is not set
+# CONFIG_ETRAX_SERIAL_PORT2_NO_DMA_OUT is not set
+CONFIG_ETRAX_SERIAL_PORT3=y
+CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT=y
+CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN=y
+# CONFIG_ETRAX_SERIAL_PORT3_NO_DMA_IN is not set
+# CONFIG_ETRAX_SERIAL_PORT3_NO_DMA_OUT is not set
+CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS=5
+# CONFIG_ETRAX_SOFT_SHUTDOWN is not set
+# CONFIG_ETRAX_SYNCHRONOUS_SERIAL is not set
+CONFIG_ETRAX_SYSFS_NODES=y
+CONFIG_ETRAX_USB_HOST=y
+CONFIG_ETRAX_USB_HOST_PORT1=y
+CONFIG_ETRAX_USB_HOST_PORT2=y
+# CONFIG_ETRAX_WATCHDOG is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_IOMAP=y
+# CONFIG_GEN_RTC is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_IDE is not set
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_IRQ_PER_CPU=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_MTD=y
+CONFIG_MTDRAM_ABS_POS=0x0
+CONFIG_MTDRAM_ERASE_SIZE=128
+CONFIG_MTDRAM_TOTAL_SIZE=0
+# CONFIG_MTD_ABSENT is not set
+CONFIG_MTD_BLOCK=y
+# CONFIG_MTD_BLOCK2MTD is not set
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_GEOMETRY is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+CONFIG_MTD_CHAR=y
+# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+CONFIG_MTD_CONCAT=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+CONFIG_MTD_MTDRAM=y
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+# CONFIG_MTD_ONENAND is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_PHYSMAP is not set
+# CONFIG_MTD_PLATRAM is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_OOM_REBOOT is not set
+# CONFIG_OVERRIDE_SCHED_STARVATION_LIMIT is not set
+# CONFIG_RTC is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_SERIAL_8250 is not set
+# CONFIG_SMP is not set
+# CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SVINTO_SIM is not set
+# CONFIG_SYSTEM_PROFILER is not set
+CONFIG_UID16=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_UNWIND_INFO is not set
+CONFIG_USB=y
+# CONFIG_USBPCWATCHDOG is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_SERIAL_IR is not set
+# CONFIG_BLK_DEV_INITRD is not set
--- /dev/null
+/*
+ * Simple bitbanged-GPIO SPI driver for ETRAX FS et al.
+ *
+ * Copyright (c) 2007 Axis Communications AB
+ *
+ * Author: Hans-Peter Nilsson, inspired by earlier work by
+ * Andre Spanberg but mostly by copying large parts of
+ * spi_s3c24xx_gpio.c, hence also:
+ * Copyright (c) 2006 Ben Dooks
+ * Copyright (c) 2006 Simtec Electronics
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/types.h>
+#include <linux/device.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/spi_bitbang.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <asm/io.h>
+#include <asm/arch/board.h>
+
+/* Our main driver state. */
+
+struct crisv32_spi_hw_info {
+ struct crisv32_iopin sclk;
+ struct crisv32_iopin mosi;
+ struct crisv32_iopin miso;
+ struct crisv32_iopin cs;
+};
+
+/*
+ * The driver state hides behind the spi_bitbang state. We're
+ * responsible for allocating that, so we can get a little something
+ * for ourselves.
+ */
+
+struct crisv32_spi_gpio_devdata {
+ struct spi_bitbang bitbang;
+ struct crisv32_spi_hw_info pins;
+};
+
+/* Helper function getting the driver state from a spi_device. */
+
+static inline struct crisv32_spi_hw_info *spidev_to_hw(struct spi_device *spi)
+{
+ struct crisv32_spi_gpio_devdata *dd = spi_master_get_devdata(spi->master);
+ return &dd->pins;
+}
+
+/* The SPI-bitbang functions: see spi_bitbang.h at EXPAND_BITBANG_TXRX. */
+
+static inline void setsck(struct spi_device *spi, int is_on)
+{
+ crisv32_io_set(&spidev_to_hw(spi)->sclk, is_on != 0);
+}
+
+static inline void setmosi(struct spi_device *spi, int is_on)
+{
+ crisv32_io_set(&spidev_to_hw(spi)->mosi, is_on != 0);
+}
+
+static inline u32 getmiso(struct spi_device *spi)
+{
+ return crisv32_io_rd(&spidev_to_hw(spi)->miso) != 0 ? 1 : 0;
+}
+
+#define spidelay(x) ndelay(x)
+
+#define EXPAND_BITBANG_TXRX
+#include <linux/spi/spi_bitbang.h>
+
+/*
+ * SPI-bitbang word transmit-functions for the four SPI modes,
+ * dispatching to the inlined functions we just included.
+ */
+
+static u32 crisv32_spi_gpio_txrx_mode0(struct spi_device *spi,
+ unsigned nsecs, u32 word, u8 bits)
+{
+ return bitbang_txrx_be_cpha0(spi, nsecs, 0, word, bits);
+}
+
+static u32 crisv32_spi_gpio_txrx_mode1(struct spi_device *spi,
+ unsigned nsecs, u32 word, u8 bits)
+{
+ return bitbang_txrx_be_cpha1(spi, nsecs, 0, word, bits);
+}
+
+static u32 crisv32_spi_gpio_txrx_mode2(struct spi_device *spi,
+ unsigned nsecs, u32 word, u8 bits)
+{
+ return bitbang_txrx_be_cpha0(spi, nsecs, 1, word, bits);
+}
+
+static u32 crisv32_spi_gpio_txrx_mode3(struct spi_device *spi,
+ unsigned nsecs, u32 word, u8 bits)
+{
+ return bitbang_txrx_be_cpha1(spi, nsecs, 1, word, bits);
+}
+
+/* SPI-bitbang chip-select function. */
+
+static void crisv32_spi_gpio_chipselect(struct spi_device *spi, int value)
+{
+ if (spi->mode & SPI_CS_HIGH)
+ crisv32_io_set(&spidev_to_hw(spi)->cs,
+ value == BITBANG_CS_ACTIVE ? 1 : 0);
+ else
+ crisv32_io_set(&spidev_to_hw(spi)->cs,
+ value == BITBANG_CS_ACTIVE ? 0 : 1);
+}
+
+/* Platform-device probe function. */
+
+static int __devinit crisv32_spi_gpio_probe(struct platform_device *dev)
+{
+ struct spi_master *master;
+ struct crisv32_spi_gpio_devdata *dd;
+ struct resource *res;
+ struct crisv32_spi_gpio_controller_data *gc;
+ int ret = 0;
+
+ /*
+ * We need to get the controller data as a hardware resource,
+ * or else it wouldn't be available until *after* the
+ * spi_bitbang_start call!
+ */
+ res = platform_get_resource_byname(dev, 0, "controller_data_ptr");
+ if (res == NULL) {
+ dev_err(&dev->dev, "can't get controller_data resource\n");
+ return -EIO;
+ }
+
+ gc = (struct crisv32_spi_gpio_controller_data *) res->start;
+
+ master = spi_alloc_master(&dev->dev, sizeof *dd);
+ if (master == NULL) {
+ dev_err(&dev->dev, "failed to allocate spi master\n");
+ ret = -ENOMEM;
+ goto err;
+ }
+
+ dd = spi_master_get_devdata(master);
+ platform_set_drvdata(dev, dd);
+
+ /*
+ * The device data asks for this driver, and holds the id
+ * number, which must be unique among the same-type devices.
+ * We use this as the number of this SPI bus.
+ */
+ master->bus_num = dev->id;
+
+ /*
+ * Allocate pins. Note that thus being allocated as GPIO, we
+ * don't have to deconfigure them at the end or if something
+ * fails.
+ */
+ if ((ret = crisv32_io_get_name(&dd->pins.cs, gc->cs)) != 0
+ || (ret = crisv32_io_get_name(&dd->pins.miso, gc->miso)) != 0
+ || (ret = crisv32_io_get_name(&dd->pins.mosi, gc->mosi)) != 0
+ || (ret = crisv32_io_get_name(&dd->pins.sclk, gc->sclk)) != 0)
+ goto err_no_pins;
+
+ /* Set directions of the SPI pins. */
+ crisv32_io_set_dir(&dd->pins.cs, crisv32_io_dir_out);
+ crisv32_io_set_dir(&dd->pins.sclk, crisv32_io_dir_out);
+ crisv32_io_set_dir(&dd->pins.miso, crisv32_io_dir_in);
+ crisv32_io_set_dir(&dd->pins.mosi, crisv32_io_dir_out);
+
+ /* Set state of the SPI pins. */
+ dev_dbg(&dev->dev, "cs.port 0x%x, pin: %d\n"
+ dd->pins.cs.port, dd->pins.cs.bit);
+
+ /*
+ * Can't use crisv32_spi_gpio_chipselect(spi, 1) here; we
+ * don't have a proper "spi" until after spi_bitbang_start.
+ */
+ crisv32_io_set(&dd->pins.cs, 1);
+ crisv32_io_set(&dd->pins.sclk, 0);
+ crisv32_io_set(&dd->pins.mosi, 0);
+
+ /* Setup SPI bitbang adapter hooks. */
+ dd->bitbang.master = spi_master_get(master);
+ dd->bitbang.chipselect = crisv32_spi_gpio_chipselect;
+
+ dd->bitbang.txrx_word[SPI_MODE_0] = crisv32_spi_gpio_txrx_mode0;
+ dd->bitbang.txrx_word[SPI_MODE_1] = crisv32_spi_gpio_txrx_mode1;
+ dd->bitbang.txrx_word[SPI_MODE_2] = crisv32_spi_gpio_txrx_mode2;
+ dd->bitbang.txrx_word[SPI_MODE_3] = crisv32_spi_gpio_txrx_mode3;
+
+ ret = spi_bitbang_start(&dd->bitbang);
+ if (ret)
+ goto err_no_bitbang;
+
+ printk (KERN_INFO "CRIS v32 SPI driver for GPIO"
+ " (cs: %s, miso: %s, mosi: %s, sclk: %s)\n",
+ gc->cs, gc->miso, gc->mosi, gc->sclk);
+
+ return 0;
+
+ err_no_bitbang:
+ spi_master_put(dd->bitbang.master);
+ err_no_pins:
+ platform_set_drvdata(dev, NULL);
+ err:
+ return ret;
+}
+
+/* Platform-device remove-function. */
+
+static int __devexit crisv32_spi_gpio_remove(struct platform_device *dev)
+{
+ struct crisv32_spi_gpio_devdata *dd = platform_get_drvdata(dev);
+ int ret;
+
+ ret = spi_bitbang_stop(&dd->bitbang);
+ if (ret != 0)
+ return ret;
+
+ spi_master_put(dd->bitbang.master);
+ platform_set_drvdata(dev, NULL);
+ return 0;
+}
+
+/*
+ * For the time being, there's no suspend/resume support to care
+ * about, so we let those handlers default to NULL.
+ */
+static struct platform_driver crisv32_spi_gpio_drv = {
+ .probe = crisv32_spi_gpio_probe,
+ .remove = __devexit_p(crisv32_spi_gpio_remove),
+ .driver = {
+ .name = "spi_crisv32_gpio",
+ .owner = THIS_MODULE,
+ },
+};
+
+/* Module init function. */
+
+static int __devinit crisv32_spi_gpio_init(void)
+{
+ return platform_driver_register(&crisv32_spi_gpio_drv);
+}
+
+/* Module exit function. */
+
+static void __devexit crisv32_spi_gpio_exit(void)
+{
+ platform_driver_unregister(&crisv32_spi_gpio_drv);
+}
+
+module_init(crisv32_spi_gpio_init);
+module_exit(crisv32_spi_gpio_exit);
+
+MODULE_DESCRIPTION("CRIS v32 SPI-GPIO Driver");
+MODULE_AUTHOR("Hans-Peter Nilsson, <hp@axis.com>");
+MODULE_LICENSE("GPL");
--- /dev/null
+/*
+ * SPI port driver for ETRAX FS et al. using a synchronous serial
+ * port, but simplified by using the spi_bitbang framework.
+ *
+ * Copyright (c) 2007 Axis Communications AB
+ *
+ * Author: Hans-Peter Nilsson, though copying parts of
+ * spi_s3c24xx_gpio.c, hence also:
+ * Copyright (c) 2006 Ben Dooks
+ * Copyright (c) 2006 Simtec Electronics
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This driver restricts frequency, polarity, "word" length and endian
+ * much more than the hardware does. I'm happy to unrestrict it, but
+ * only with what I can test myself (at time of writing, just SD/MMC
+ * SPI) and what people actually test and report.
+ */
+
+#include <linux/types.h>
+#include <linux/device.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/spi_bitbang.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <asm/io.h>
+#include <asm/arch/board.h>
+#include <asm/arch/hwregs/reg_map.h>
+#include <asm/arch/hwregs/reg_rdwr.h>
+#include <asm/arch/hwregs/sser_defs.h>
+#include <asm/arch/dma.h>
+#include <asm/arch/hwregs/dma.h>
+
+/* A size "not much larger" than the max typical transfer size. */
+#define DMA_CHUNKSIZ 512
+
+/*
+ * For a transfer expected to take this long, we busy-wait instead of enabling
+ * interrupts.
+ */
+#define IRQ_USAGE_THRESHOLD_NS 14000
+
+/* A few register access macros to avoid verbiage and reduce typos. */
+#define REG_RD_DI(reg) REG_RD(dma, regi_dmain, reg)
+#define REG_RD_DO(reg) REG_RD(dma, regi_dmaout, reg)
+#define REG_RD_SSER(reg) REG_RD(sser, regi_sser, reg)
+#define REG_WR_DI(reg, val) REG_WR(dma, regi_dmain, reg, val)
+#define REG_WR_DO(reg, val) REG_WR(dma, regi_dmaout, reg, val)
+#define REG_WR_SSER(reg, val) REG_WR(sser, regi_sser, reg, val)
+#define REG_WRINT_DI(reg, val) REG_WR_INT(dma, regi_dmain, reg, val)
+#define REG_WRINT_DO(reg, val) REG_WR_INT(dma, regi_dmaout, reg, val)
+#define REG_WRINT_SSER(reg, val) REG_WR_INT(sser, regi_sser, reg, val)
+#define REG_RDINT_DI(reg) REG_RD_INT(dma, regi_dmain, reg)
+#define REG_RDINT_DO(reg) REG_RD_INT(dma, regi_dmaout, reg)
+#define REG_RDINT_SSER(reg) REG_RD_INT(sser, regi_sser, reg)
+
+#define DMA_WAIT_UNTIL_RESET(inst) \
+ do { \
+ reg_dma_rw_stat r; \
+ do { \
+ r = REG_RD(dma, (inst), rw_stat); \
+ } while (r.mode != regk_dma_rst); \
+ } while (0)
+
+#define DMA_BUSY(inst) (REG_RD(dma, inst, rw_stream_cmd)).busy
+
+/* Our main driver state. */
+struct crisv32_spi_hw_info {
+ struct crisv32_regi_n_int sser;
+ struct crisv32_regi_n_int dmain;
+ struct crisv32_regi_n_int dmaout;
+
+ reg_sser_rw_cfg cfg;
+ reg_sser_rw_frm_cfg frm_cfg;
+ reg_sser_rw_tr_cfg tr_cfg;
+ reg_sser_rw_rec_cfg rec_cfg;
+ reg_sser_rw_extra extra;
+
+ /* We store the speed in kHz, so we can have expressions
+ * multiplying 100MHz by * 4 before dividing by it, and still
+ * keep it in an u32. */
+ u32 effective_speed_kHz;
+
+ /*
+ * The time in 10s of nanoseconds for half a cycles.
+ * For convenience and performance; derived from the above.
+ */
+ u32 half_cycle_delay_ns;
+
+ /* This should be overridable by a module parameter. */
+ u32 max_speed_Hz;
+
+ /* Pre-computed timout for the max transfer chunk-size. */
+ u32 dma_timeout;
+
+ struct completion dma_done;
+
+ /*
+ * If we get a timeout from wait_for_completion_timeout on the
+ * above, first look at this before panicking.
+ */
+ u32 dma_actually_done;
+
+ /*
+ * Resources don't seem available at the remove call, so we
+ * have to save information we get through them.
+ */
+ struct crisv32_spi_sser_controller_data *gc;
+};
+
+/*
+ * The driver state hides behind the spi_bitbang state; we're
+ * responsible for allocating that, so we can get a little something
+ * for ourselves.
+ */
+struct crisv32_spi_sser_devdata {
+ struct spi_bitbang bitbang;
+ struct crisv32_spi_hw_info hw;
+};
+
+/* Our DMA descriptors that need alignment. */
+struct crisv32_spi_dma_descrs {
+ dma_descr_context in_ctxt __attribute__ ((__aligned__(32)));
+ dma_descr_context out_ctxt __attribute__ ((__aligned__(32)));
+
+ /*
+ * The code takes advantage of the fact that in_descr and
+ * out_descr are on the same cache-line when working around
+ * the cache-bug in TR 106.
+ */
+ dma_descr_data in_descr __attribute__ ((__aligned__(16)));
+ dma_descr_data out_descr __attribute__ ((__aligned__(16)));
+};
+
+/*
+ * Whatever needs DMA access is here, besides whatever DMA-able memory
+ * comes in transfers.
+ */
+struct crisv32_spi_dma_cs {
+ struct crisv32_spi_dma_descrs *descrp;
+
+ /* Scratch-buffers when the original was non-DMA. */
+ u8 rx_buf[DMA_CHUNKSIZ];
+ u8 tx_buf[DMA_CHUNKSIZ];
+};
+
+/*
+ * Max speed. If set, we won't go faster, promise. May be useful
+ * when dealing with weak hardware; misrouted signal paths or various
+ * debug-situations.
+ */
+static ulong crisv32_spi_speed_limit_Hz = 0;
+
+/* Helper function getting the driver state from a spi_device. */
+
+static inline struct crisv32_spi_hw_info *spidev_to_hw(struct spi_device *spi)
+{
+ struct crisv32_spi_sser_devdata *dd = spi_master_get_devdata(spi->master);
+ return &dd->hw;
+}
+
+/* SPI-bitbang word transmit-function for non-DMA. */
+
+static u32 crisv32_spi_sser_txrx_mode3(struct spi_device *spi,
+ unsigned nsecs, u32 word, u8 bits)
+{
+ struct crisv32_spi_hw_info *hw = spidev_to_hw(spi);
+ u32 regi_sser = hw->sser.regi;
+ reg_sser_rw_ack_intr ack_intr = { .trdy = 1, .rdav = 1 };
+ reg_sser_r_intr intr = {0};
+ reg_sser_rw_tr_data w_data = { .data = (u8) word };
+ reg_sser_r_rec_data r_data;
+ u32 i;
+
+ /*
+ * The timeout reflects one iteration per 10ns (impossible at
+ * 200MHz clock even without the ndelay) and a wait for a full
+ * byte.
+ */
+ u32 timeout = 1000000/10*8/hw->effective_speed_kHz;
+
+ BUG_ON(bits != 8);
+
+ intr = REG_RD_SSER(r_intr);
+
+ /*
+ * We should never get xruns when we control the transmitter
+ * and receiver in register mode. And if we don't have
+ * transmitter-ready and data-ready on entry, something's
+ * seriously fishy.
+ */
+ if (!intr.trdy || !intr.rdav || intr.orun || intr.urun)
+ panic("sser hardware or SPI driver broken (1) 0x%x\n",
+ REG_TYPE_CONV(u32, reg_sser_r_intr, intr));
+
+ REG_WR_SSER(rw_ack_intr, ack_intr);
+ REG_WR_SSER(rw_tr_data, w_data);
+
+ for (i = 0; i < timeout; i++) {
+ intr = REG_RD_SSER(r_intr);
+ /* Wait for received data. */
+ if (intr.rdav)
+ break;
+ ndelay(10);
+ }
+
+ if (!(intr.trdy && intr.rdav) || intr.orun || intr.urun)
+ panic("sser hardware or SPI driver broken (2) 0x%x\n",
+ REG_TYPE_CONV(u32, reg_sser_r_intr, intr));
+
+ r_data = REG_RD_SSER(r_rec_data);
+ return r_data.data & 0xff;
+}
+
+/*
+ * Wait for 1/2 bit-time if the transmitter or receiver is enabled.
+ * We need to do this as the data-available indications may arrive
+ * right at the edge, with half the last cycle remaining.
+ */
+static void inline crisv32_spi_sser_wait_halfabit(struct crisv32_spi_hw_info
+ *hw)
+{
+ if (hw->cfg.en)
+ ndelay(hw->half_cycle_delay_ns);
+}
+
+/*
+ * Assert or de-assert chip-select.
+ * We have two functions, with the active one assigned to the bitbang
+ * slot at setup, to avoid a performance penalty (1% on reads).
+ */
+static void crisv32_spi_sser_chip_select_active_high(struct spi_device *spi,
+ int value)
+{
+ struct crisv32_spi_hw_info *hw = spidev_to_hw(spi);
+ u32 regi_sser = hw->sser.regi;
+
+ /*
+ * We may have received data at the "last producing clock
+ * edge". Thus we delay for another half a clock cycle.
+ */
+ crisv32_spi_sser_wait_halfabit(hw);
+
+ hw->frm_cfg.frame_pin_use
+ = value == BITBANG_CS_ACTIVE ? regk_sser_gio1 : regk_sser_gio0;
+ REG_WR_SSER(rw_frm_cfg, hw->frm_cfg);
+}
+
+static void crisv32_spi_sser_chip_select_active_low(struct spi_device *spi,
+ int value)
+{
+ struct crisv32_spi_hw_info *hw = spidev_to_hw(spi);
+ u32 regi_sser = hw->sser.regi;
+
+ crisv32_spi_sser_wait_halfabit(hw);
+ hw->frm_cfg.frame_pin_use
+ = value == BITBANG_CS_ACTIVE ? regk_sser_gio0 : regk_sser_gio1;
+ REG_WR_SSER(rw_frm_cfg, hw->frm_cfg);
+}
+
+/* Set the transmission speed in Hz. */
+
+static int crisv32_spi_sser_set_speed_Hz(struct crisv32_spi_hw_info *hw,
+ u32 Hz)
+{
+ u32 kHz;
+ u32 ns_delay;
+ u32 regi_sser = hw->sser.regi;
+
+ if (Hz > hw->max_speed_Hz)
+ /*
+ * Should we complain? Return error? Current caller
+ * sequences want just the max speed.
+ */
+ Hz = hw->max_speed_Hz;
+
+ kHz = Hz/1000;
+
+ /*
+ * If absolutely needed, we *could* change the base frequency
+ * and go lower. Usually, a frequency set higher than wanted
+ * is a problem but lower isn't.
+ */
+ if (Hz < 100000000 / 65536 + 1) {
+ printk(KERN_ERR "attempt to set invalid sser speed: %u Hz\n",
+ Hz);
+ Hz = 100000000 / 65536 + 1;
+ }
+
+ pr_debug("setting sser speed to %u Hz\n", Hz);
+
+ /*
+ * Avoid going above the requested speed if there's a
+ * remainder for the 100 MHz clock-divider calculation, but
+ * don't unnecessarily go below if it's even.
+ */
+ hw->cfg.clk_div = 100000000/Hz - ((100000000 % Hz) == 0);
+
+ /* Make sure there's no ongoing transmission. */
+ crisv32_spi_sser_wait_halfabit(hw);
+
+ /*
+ * Wait for 3 times max of the old and the new clock before and after
+ * changing the frequency. Not because of documentation or empirical
+ * need, but because it seems sane to do so. The three-bit-times
+ * value is because that's the documented time it takes for a reset to
+ * take effect.
+ */
+ ns_delay = 1000000*3/(kHz > hw->effective_speed_kHz
+ ? kHz : hw->effective_speed_kHz);
+ ndelay(ns_delay);
+ REG_WR_SSER(rw_cfg, hw->cfg);
+ ndelay(ns_delay);
+
+ hw->effective_speed_kHz = kHz;
+
+ /*
+ * A timeout of twice the time for the largest chunk (not
+ * counting DMA overhead) plus one jiffy, should be more than
+ * enough for the transmission.
+ */
+ hw->dma_timeout = 1 + usecs_to_jiffies(1000*2*DMA_CHUNKSIZ*8/kHz);
+
+ hw->half_cycle_delay_ns
+ = 1000000/2/hw->effective_speed_kHz;
+
+ pr_debug(".clk_div %d, half %d, eff %d\n",
+ hw->cfg.clk_div, hw->half_cycle_delay_ns,
+ hw->effective_speed_kHz);
+ return 0;
+}
+
+/*
+ * Set up transmitter and receiver for non-DMA access.
+ * Unfortunately, it doesn't seem like hispeed works for this mode
+ * (mea culpa), so we're stuck with lospeed-mode. A little slower,
+ * but that's what you get for not allocating DMA.
+ */
+static int crisv32_setup_spi_sser_for_reg_access(struct crisv32_spi_hw_info *hw)
+{
+ u32 regi_sser = hw->sser.regi;
+
+ reg_sser_rw_cfg cfg = {0};
+ reg_sser_rw_frm_cfg frm_cfg = {0};
+ reg_sser_rw_tr_cfg tr_cfg = {0};
+ reg_sser_rw_rec_cfg rec_cfg = {0};
+ reg_sser_rw_intr_mask mask = {0};
+ reg_sser_rw_extra extra = {0};
+ reg_sser_rw_tr_data tr_data = {0};
+ reg_sser_r_intr intr;
+
+ cfg.en = 0;
+ tr_cfg.tr_en = 1;
+ rec_cfg.rec_en = 1;
+ REG_WR_SSER(rw_cfg, cfg);
+ REG_WR_SSER(rw_tr_cfg, tr_cfg);
+ REG_WR_SSER(rw_rec_cfg, rec_cfg);
+ REG_WR_SSER(rw_intr_mask, mask);
+
+ /*
+ * See 23.7.2 SPI in the hardware documentation.
+ * Except our configuration uses bulk mode; MMC/SD-SPI
+ * isn't isochronous in nature.
+ * Step 1.
+ */
+ cfg.gate_clk = regk_sser_yes;
+ cfg.clkgate_in = regk_sser_no;
+ cfg.clkgate_ctrl = regk_sser_tr;
+
+ /* Step 2. */
+ cfg.out_clk_pol = regk_sser_pos;
+ cfg.out_clk_src = regk_sser_intern_clk;
+
+ /* Step 3. */
+ tr_cfg.clk_src = regk_sser_intern;
+ rec_cfg.clk_src = regk_sser_intern;
+ frm_cfg.clk_src = regk_sser_intern;
+
+ /* Step 4. */
+ tr_cfg.clk_pol = regk_sser_neg;
+ rec_cfg.clk_pol = regk_sser_pos;
+ frm_cfg.clk_pol = regk_sser_neg;
+
+ /*
+ * Step 5: frame pin (PC03 or PD03) is frame; the status pin
+ * (PC02, PD02) is configured as input.
+ */
+ frm_cfg.frame_pin_dir = regk_sser_out;
+
+ /*
+ * Contrary to the doc example, we don't generate the frame
+ * signal "automatically". This setting of the frame pin as
+ * constant 1, reflects an inactive /CS setting, for just idle
+ * clocking. When we need to transmit or receive data, we
+ * change it.
+ */
+ frm_cfg.frame_pin_use = regk_sser_gio1;
+ frm_cfg.status_pin_dir = regk_sser_in;
+
+ /*
+ * Step 6. This is probably not necessary, as we don't
+ * generate the frame signal automatically. Nevertheless,
+ * modified for bulk transmission.
+ */
+ frm_cfg.out_on = regk_sser_tr;
+ frm_cfg.out_off = regk_sser_tr;
+
+ /* Step 7. Similarly, maybe not necessary. */
+ frm_cfg.type = regk_sser_level;
+ frm_cfg.level = regk_sser_neg_lo;
+
+ /* Step 8. These we have to set according to the bulk mode,
+ * which for tr_delay is the same as for iso; a value of 1
+ * means in sync with the frame signal. For rec_delay, we
+ * start it at the same time as the transmitter. See figure
+ * 23.7 in the hw documentation. */
+ frm_cfg.tr_delay = 1;
+ frm_cfg.rec_delay = 0;
+
+ /* Step 9. */
+ tr_cfg.sample_size = 7;
+ rec_cfg.sample_size = 7;
+
+ /* Step 10. */
+ frm_cfg.wordrate = 7;
+
+ /* Step 11 (but for bulk). */
+ tr_cfg.rate_ctrl = regk_sser_bulk;
+
+ /*
+ * Step 12. Similarly, maybe not necessary; still, modified
+ * for bulk.
+ */
+ tr_cfg.frm_src = regk_sser_intern;
+ rec_cfg.frm_src = regk_sser_tx_bulk;
+
+ /* Step 13. */
+ tr_cfg.mode = regk_sser_lospeed;
+ rec_cfg.mode = regk_sser_lospeed;
+
+ /* Step 14. */
+ tr_cfg.sh_dir = regk_sser_msbfirst;
+ rec_cfg.sh_dir = regk_sser_msbfirst;
+
+ /*
+ * Extra step for bulk-specific settings and other general
+ * settings not specified in the SPI config example.
+ * It's uncertain whether all of these are needed.
+ */
+ tr_cfg.bulk_wspace = 1;
+ tr_cfg.use_dma = 0;
+
+ tr_cfg.urun_stop = 1;
+ rec_cfg.orun_stop = 1;
+ rec_cfg.use_dma = 0;
+
+ rec_cfg.fifo_thr = regk_sser_inf;
+ frm_cfg.early_wend = regk_sser_yes;
+
+ cfg.clk_dir = regk_sser_out;
+ tr_cfg.data_pin_use = regk_sser_dout;
+ cfg.base_freq = regk_sser_f100;
+
+ /* Setup for the initial frequency given to us. */
+ hw->cfg = cfg;
+ crisv32_spi_sser_set_speed_Hz(hw, hw->max_speed_Hz);
+ cfg = hw->cfg;
+
+ /*
+ * Write it all, except cfg which is already written by
+ * crisv32_spi_sser_set_speed_Hz.
+ */
+ REG_WR_SSER(rw_frm_cfg, frm_cfg);
+ REG_WR_SSER(rw_tr_cfg, tr_cfg);
+ REG_WR_SSER(rw_rec_cfg, rec_cfg);
+ REG_WR_SSER(rw_extra, extra);
+
+ /*
+ * The transmit-register needs to be written before the
+ * transmitter is enabled, and to get a valid trdy signal
+ * waiting for us when we want to transmit a byte. Because
+ * the "frame event" is that the transmitter is written, this
+ * will cause a dummy 0xff-byte to be transmitted, but that's
+ * ok, because /CS is inactive.
+ */
+ tr_data.data = 0xffff;
+ REG_WR_SSER(rw_tr_data, tr_data);
+
+ /*
+ * We ack everything interrupt-wise; left-over indicators don't have
+ * to come from *this* code.
+ */
+ REG_WRINT_SSER(rw_ack_intr, -1);
+
+ /*
+ * Wait 3 cycles before enabling, after the transmit register
+ * has been written. (This'll be just a few microseconds for
+ * e.g. 400 KHz.)
+ */
+ ndelay(3 * 2 * hw->half_cycle_delay_ns);
+ cfg.en = 1;
+
+ REG_WR_SSER(rw_cfg, cfg);
+
+ /*
+ * Now wait for 8 + 3 cycles. The 0xff byte should now have
+ * been transmitted and dummy data received.
+ */
+ ndelay((8 + 3) * 2 * hw->half_cycle_delay_ns);
+
+ /*
+ * Sanity-check that we have data-available and the
+ * transmitter is ready to send new data.
+ */
+ intr = REG_RD_SSER(r_intr);
+ if (!intr.rdav || !intr.trdy)
+ panic("sser hw or SPI driver broken (3) 0x%x",
+ REG_TYPE_CONV(u32, reg_sser_r_intr, intr));
+
+ hw->frm_cfg = frm_cfg;
+ hw->tr_cfg = tr_cfg;
+ hw->rec_cfg = rec_cfg;
+ hw->extra = extra;
+ hw->cfg = cfg;
+ return 0;
+}
+
+/* Initialization, maybe fault recovery. */
+
+static void crisv32_reset_dma_hw(u32 regi)
+{
+ REG_WR_INT(dma, regi, rw_intr_mask, 0);
+
+ DMA_RESET(regi);
+ DMA_WAIT_UNTIL_RESET(regi);
+ DMA_ENABLE(regi);
+ REG_WR_INT(dma, regi, rw_ack_intr, -1);
+
+ DMA_WR_CMD(regi, regk_dma_set_w_size1);
+}
+
+/* Interrupt from SSER, for use with DMA when only the transmitter is used. */
+
+static irqreturn_t sser_interrupt(int irqno, void *arg)
+{
+ struct crisv32_spi_hw_info *hw = arg;
+ u32 regi_sser = hw->sser.regi;
+ reg_sser_r_intr intr = REG_RD_SSER(r_intr);
+
+ if (intr.tidle == 0 && intr.urun == 0) {
+ printk(KERN_ERR
+ "sser @0x%x: spurious sser intr, flags: 0x%x\n",
+ regi_sser, REG_TYPE_CONV(u32, reg_sser_r_intr, intr));
+ } else if (intr.urun == 0) {
+ hw->dma_actually_done = 1;
+ complete(&hw->dma_done);
+ } else {
+ /*
+ * Make any reception time out and notice the error,
+ * which it might not otherwise do data was *received*
+ * successfully.
+ */
+ u32 regi_dmain = hw->dmain.regi;
+
+ /*
+ * Recommended practice before acking urun is to turn
+ * off sser. That might not be enough to stop DMA-in
+ * from signalling success if the underrun was late in
+ * the transmission, so we disable the DMA-in
+ * interrupts too.
+ */
+ REG_WRINT_SSER(rw_cfg, 0);
+ REG_WRINT_DI(rw_intr_mask, 0);
+ REG_WRINT_DI(rw_ack_intr, -1);
+ }
+
+ REG_WRINT_SSER(rw_intr_mask, 0);
+
+ /*
+ * We must at least ack urun together with tidle, but keep it
+ * simple and ack them all.
+ */
+ REG_WRINT_SSER(rw_ack_intr, -1);
+
+ return IRQ_HANDLED;
+}
+
+/*
+ * Interrupt from receiver DMA connected to SSER, for use when the
+ * receiver is used, with or without the transmitter.
+ */
+static irqreturn_t rec_dma_interrupt(int irqno, void *arg)
+{
+ struct crisv32_spi_hw_info *hw = arg;
+ u32 regi_dmain = hw->dmain.regi;
+ u32 regi_sser = hw->sser.regi;
+ reg_dma_r_intr intr = REG_RD_DI(r_intr);
+
+ if (intr.data == 0) {
+ printk(KERN_ERR
+ "sser @0x%x: spurious rec dma intr, flags: 0x%x\n",
+ regi_dmain, REG_TYPE_CONV(u32, reg_dma_r_intr, intr));
+ } else {
+ hw->dma_actually_done = 1;
+ complete(&hw->dma_done);
+ }
+
+ REG_WRINT_DI(rw_intr_mask, 0);
+
+ /* Avoid false underrun indications; stop all sser interrupts. */
+ REG_WRINT_SSER(rw_intr_mask, 0);
+ REG_WRINT_SSER(rw_ack_intr, -1);
+
+ REG_WRINT_DI(rw_ack_intr, -1);
+ return IRQ_HANDLED;
+}
+
+/*
+ * Set up transmitter and receiver for DMA access. We use settings
+ * from the "Atmel fast flash" example.
+ */
+static int crisv32_setup_spi_sser_for_dma_access(struct crisv32_spi_hw_info
+ *hw)
+{
+ int ret;
+ u32 regi_sser = hw->sser.regi;
+
+ reg_sser_rw_cfg cfg = {0};
+ reg_sser_rw_frm_cfg frm_cfg = {0};
+ reg_sser_rw_tr_cfg tr_cfg = {0};
+ reg_sser_rw_rec_cfg rec_cfg = {0};
+ reg_sser_rw_intr_mask mask = {0};
+ reg_sser_rw_extra extra = {0};
+
+ cfg.en = 0;
+ tr_cfg.tr_en = 1;
+ rec_cfg.rec_en = 1;
+ REG_WR_SSER(rw_cfg, cfg);
+ REG_WR_SSER(rw_tr_cfg, tr_cfg);
+ REG_WR_SSER(rw_rec_cfg, rec_cfg);
+ REG_WR_SSER(rw_intr_mask, mask);
+
+ /*
+ * See 23.7.5.2 (Atmel fast flash) in the hardware documentation.
+ * Step 1.
+ */
+ cfg.gate_clk = regk_sser_no;
+
+ /* Step 2. */
+ cfg.out_clk_pol = regk_sser_pos;
+
+ /* Step 3. */
+ cfg.out_clk_src = regk_sser_intern_clk;
+
+ /* Step 4. */
+ tr_cfg.sample_size = 1;
+ rec_cfg.sample_size = 1;
+
+ /* Step 5. */
+ frm_cfg.wordrate = 7;
+
+ /* Step 6. */
+ tr_cfg.clk_src = regk_sser_intern;
+ rec_cfg.clk_src = regk_sser_intern;
+ frm_cfg.clk_src = regk_sser_intern;
+ tr_cfg.clk_pol = regk_sser_neg;
+ frm_cfg.clk_pol = regk_sser_neg;
+
+ /* Step 7. */
+ rec_cfg.clk_pol = regk_sser_pos;
+
+ /* Step 8. */
+ frm_cfg.tr_delay = 1;
+
+ /* Step 9. */
+ frm_cfg.rec_delay = 1;
+
+ /* Step 10. */
+ tr_cfg.sh_dir = regk_sser_msbfirst;
+ rec_cfg.sh_dir = regk_sser_msbfirst;
+
+ /* Step 11. */
+ tr_cfg.frm_src = regk_sser_intern;
+ rec_cfg.frm_src = regk_sser_intern;
+
+ /* Step 12. */
+ tr_cfg.rate_ctrl = regk_sser_iso;
+
+ /*
+ * Step 13. Note that 0 != tx_null, so we're good regarding
+ * the descriptor .md field.
+ */
+ tr_cfg.eop_stop = 1;
+
+ /* Step 14. */
+ frm_cfg.frame_pin_use = regk_sser_gio1;
+ frm_cfg.frame_pin_dir = regk_sser_out;
+
+ /* Step 15. */
+ extra.clkon_en = 1;
+ extra.clkoff_en = 1;
+
+ /* Step 16. We'll modify this value for each "burst". */
+ extra.clkoff_cycles = 7;
+
+ /* Step 17. */
+ cfg.prepare = 1;
+
+ /*
+ * Things left out from the documented startup procedure.
+ * It's uncertain whether all of these are needed.
+ */
+ frm_cfg.status_pin_dir = regk_sser_in;
+ tr_cfg.mode = regk_sser_hispeed;
+ rec_cfg.mode = regk_sser_hispeed;
+ frm_cfg.out_on = regk_sser_intern_tb;
+ frm_cfg.out_off = regk_sser_rec;
+ frm_cfg.type = regk_sser_level;
+ tr_cfg.use_dma = 1;
+ tr_cfg.urun_stop = 1;
+ rec_cfg.orun_stop = 1;
+ rec_cfg.use_dma = 1;
+ rec_cfg.fifo_thr = regk_sser_inf;
+ frm_cfg.early_wend = regk_sser_yes;
+ cfg.clk_dir = regk_sser_out;
+
+ tr_cfg.data_pin_use = regk_sser_dout;
+ cfg.base_freq = regk_sser_f100;
+
+ REG_WR_SSER(rw_frm_cfg, frm_cfg);
+ REG_WR_SSER(rw_tr_cfg, tr_cfg);
+ REG_WR_SSER(rw_rec_cfg, rec_cfg);
+ REG_WR_SSER(rw_extra, extra);
+ REG_WR_SSER(rw_cfg, cfg);
+ hw->frm_cfg = frm_cfg;
+ hw->tr_cfg = tr_cfg;
+ hw->rec_cfg = rec_cfg;
+ hw->extra = extra;
+ hw->cfg = cfg;
+
+ crisv32_spi_sser_set_speed_Hz(hw, hw->max_speed_Hz);
+
+ ret = request_irq(hw->sser.irq, sser_interrupt, 0, "sser", hw);
+ if (ret != 0)
+ goto noirq;
+
+ ret = request_irq(hw->dmain.irq, rec_dma_interrupt, 0, "sser rec", hw);
+ if (ret != 0)
+ goto free_outirq;
+
+ crisv32_reset_dma_hw(hw->dmain.regi);
+ crisv32_reset_dma_hw(hw->dmaout.regi);
+ return 0;
+
+ free_outirq:
+ free_irq(hw->sser.irq, hw);
+ noirq:
+ return ret;
+}
+
+/* SPI-master setup function for non-DMA. */
+
+static int crisv32_spi_sser_regs_master_setup(struct spi_device *spi)
+{
+ struct crisv32_spi_hw_info *hw = spidev_to_hw(spi);
+ struct spi_bitbang *bitbang = spi_master_get_devdata(spi->master);
+ int ret = 0;
+
+ /* Just do a little initial constraining checks. */
+ if (spi->bits_per_word == 0)
+ spi->bits_per_word = 8;
+
+ if (spi->bits_per_word != 8)
+ return -EINVAL;
+
+ bitbang->chipselect = (spi->mode & SPI_CS_HIGH) != 0
+ ? crisv32_spi_sser_chip_select_active_high
+ : crisv32_spi_sser_chip_select_active_low;
+
+ if (hw->max_speed_Hz == 0) {
+ u32 max_speed_Hz;
+
+ /*
+ * At this time; at the first call to the SPI master
+ * setup function, spi->max_speed_hz reflects the
+ * board-init value. It will be changed later on by
+ * the protocol master, but at the master setup call
+ * is the only time we actually get to see the hw max
+ * and thus a reasonable time to init the hw field.
+ */
+
+ /* The module parameter overrides everything. */
+ if (crisv32_spi_speed_limit_Hz != 0)
+ max_speed_Hz = crisv32_spi_speed_limit_Hz;
+ /*
+ * I never could get hispeed mode to work for non-DMA.
+ * We adjust the max speed here (where we could
+ * presumably fix it), not in the board info file.
+ */
+ else if (spi->max_speed_hz > 16667000)
+ max_speed_Hz = 16667000;
+ else
+ max_speed_Hz = spi->max_speed_hz;
+
+ hw->max_speed_Hz = max_speed_Hz;
+ spi->max_speed_hz = max_speed_Hz;
+
+ /*
+ * We also do one-time initialization of the hardware at this
+ * point. We could defer to the return to the probe-function
+ * from spi_bitbang_start, but other hardware setup (like
+ * subsequent calls to this function before that) would have
+ * to be deferred until then too.
+ */
+ ret = crisv32_setup_spi_sser_for_reg_access(hw);
+ if (ret != 0)
+ return ret;
+
+ ret = spi_bitbang_setup(spi);
+ if (ret != 0)
+ return ret;
+
+ dev_info(&spi->dev,
+ "CRIS v32 SPI driver for sser%d\n",
+ spi->master->bus_num);
+ }
+
+ return 0;
+}
+
+/*
+ * SPI-master setup_transfer-function used for both DMA and non-DMA
+ * (single function for DMA, together with spi_bitbang_setup_transfer
+ * for non-DMA).
+ */
+
+static int crisv32_spi_sser_common_setup_transfer(struct spi_device *spi,
+ struct spi_transfer *t)
+{
+ struct crisv32_spi_hw_info *hw = spidev_to_hw(spi);
+ u8 bits_per_word;
+ u32 hz;
+ int ret = 0;
+
+ if (t) {
+ bits_per_word = t->bits_per_word;
+ hz = t->speed_hz;
+ } else {
+ bits_per_word = 0;
+ hz = 0;
+ }
+
+ if (bits_per_word == 0)
+ bits_per_word = spi->bits_per_word;
+
+ if (bits_per_word != 8)
+ return -EINVAL;
+
+ if (hz == 0)
+ hz = spi->max_speed_hz;
+
+ if (hz != hw->effective_speed_kHz*1000 && hz != 0)
+ ret = crisv32_spi_sser_set_speed_Hz(hw, hz);
+
+ return ret;
+}
+
+/* Helper for a SPI-master setup_transfer function for non-DMA. */
+
+static int crisv32_spi_sser_regs_setup_transfer(struct spi_device *spi,
+ struct spi_transfer *t)
+{
+ int ret = crisv32_spi_sser_common_setup_transfer(spi, t);
+
+ if (ret != 0)
+ return ret;
+
+ /* Set up the loop-over-buffer parts. */
+ return spi_bitbang_setup_transfer (spi, t);
+}
+
+/* SPI-master setup function for DMA. */
+
+static int crisv32_spi_sser_dma_master_setup(struct spi_device *spi)
+{
+ /*
+ * As we don't dispatch to the spi_bitbang default function,
+ * we need to do whatever tests it does; keep it in sync. On
+ * the bright side, we can use the spi->controller_state slot;
+ * we use it for DMA:able memory for the descriptors and
+ * temporary buffers to copy non-DMA:able transfers.
+ */
+ struct crisv32_spi_hw_info *hw = spidev_to_hw(spi);
+ struct spi_bitbang *bitbang = spi_master_get_devdata(spi->master);
+ struct crisv32_spi_dma_cs *cs;
+ u32 dmasize;
+ int ret = 0;
+
+ if (hw->max_speed_Hz == 0) {
+ struct crisv32_spi_dma_descrs *descrp;
+ u32 descrp_dma;
+ u32 max_speed_Hz;
+
+ /* The module parameter overrides everything. */
+ if (crisv32_spi_speed_limit_Hz != 0)
+ max_speed_Hz = crisv32_spi_speed_limit_Hz;
+ /*
+ * See comment at corresponding statement in
+ * crisv32_spi_sser_regs_master_setup.
+ */
+ else
+ max_speed_Hz = spi->max_speed_hz;
+
+ hw->max_speed_Hz = max_speed_Hz;
+ spi->max_speed_hz = max_speed_Hz;
+
+ ret = crisv32_setup_spi_sser_for_dma_access(hw);
+ if (ret != 0)
+ return ret;
+
+ /* Allocate some extra for necessary alignment. */
+ dmasize = sizeof *cs + 31
+ + sizeof(struct crisv32_spi_dma_descrs);
+
+ cs = kzalloc(dmasize, GFP_KERNEL | GFP_DMA);
+ if (cs == NULL)
+ return -ENOMEM;
+
+ /*
+ * Make descriptors aligned within the allocated area,
+ * some-place after cs.
+ */
+ descrp = (struct crisv32_spi_dma_descrs *)
+ (((u32) (cs + 1) + 31) & ~31);
+ descrp_dma = virt_to_phys(descrp);
+
+ /* Set up the "constant" parts of the descriptors. */
+ descrp->out_descr.eol = 1;
+ descrp->out_descr.intr = 1;
+ descrp->out_descr.out_eop = 1;
+ descrp->out_ctxt.saved_data = (dma_descr_data *)
+ (descrp_dma
+ + offsetof(struct crisv32_spi_dma_descrs, out_descr));
+ descrp->out_ctxt.next = 0;
+
+ descrp->in_descr.eol = 1;
+ descrp->in_descr.intr = 1;
+ descrp->in_ctxt.saved_data = (dma_descr_data *)
+ (descrp_dma
+ + offsetof(struct crisv32_spi_dma_descrs, in_descr));
+ descrp->in_ctxt.next = 0;
+
+ cs->descrp = descrp;
+ spi->controller_state = cs;
+
+ init_completion(&hw->dma_done);
+
+ dev_info(&spi->dev,
+ "CRIS v32 SPI driver for sser%d/DMA\n",
+ spi->master->bus_num);
+ }
+
+ /* Do our extra constraining checks. */
+ if (spi->bits_per_word == 0)
+ spi->bits_per_word = 8;
+
+ if (spi->bits_per_word != 8)
+ return -EINVAL;
+
+ /* SPI_LSB_FIRST deliberately left out, and we only support mode 3. */
+ if ((spi->mode & ~(SPI_TX_1|SPI_CS_HIGH)) != SPI_MODE_3)
+ return -EINVAL;
+
+ bitbang->chipselect = (spi->mode & SPI_CS_HIGH) != 0
+ ? crisv32_spi_sser_chip_select_active_high
+ : crisv32_spi_sser_chip_select_active_low;
+
+ ret = bitbang->setup_transfer(spi, NULL);
+ if (ret != 0)
+ return ret;
+
+ /* Remember to de-assert chip-select before the first transfer. */
+ spin_lock(&bitbang->lock);
+ if (!bitbang->busy) {
+ bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
+ ndelay(hw->half_cycle_delay_ns);
+ }
+ spin_unlock(&bitbang->lock);
+
+ return 0;
+}
+
+/* SPI-master cleanup function for DMA. */
+
+static void crisv32_spi_sser_dma_cleanup(struct spi_device *spi)
+{
+ kfree(spi->controller_state);
+ spi->controller_state = NULL;
+}
+
+/*
+ * Set up DMA transmitter descriptors for a chunk of data.
+ * The caller is responsible for working around TR 106.
+ */
+static void crisv32_spi_sser_setup_dma_descr_out(u32 regi,
+ struct crisv32_spi_dma_cs *cs,
+ u32 out_phys, u32 chunk_len)
+{
+ BUG_ON(chunk_len > DMA_CHUNKSIZ);
+ struct crisv32_spi_dma_descrs *descrp = cs->descrp;
+ u32 descrp_dma = virt_to_phys(descrp);
+
+ descrp->out_descr.buf = (u8 *) out_phys;
+ descrp->out_descr.after = (u8 *) out_phys + chunk_len;
+ descrp->out_ctxt.saved_data_buf = (u8 *) out_phys;
+
+ DMA_START_CONTEXT(regi,
+ descrp_dma
+ + offsetof(struct crisv32_spi_dma_descrs, out_ctxt));
+}
+
+/*
+ * Set up DMA receiver descriptors for a chunk of data.
+ * Also, work around TR 106.
+ */
+static void crisv32_spi_sser_setup_dma_descr_in(u32 regi_dmain,
+ struct crisv32_spi_dma_cs *cs,
+ u32 in_phys, u32 chunk_len)
+{
+ BUG_ON(chunk_len > DMA_CHUNKSIZ);
+ struct crisv32_spi_dma_descrs *descrp = cs->descrp;
+ u32 descrp_dma = virt_to_phys(descrp);
+
+ descrp->in_descr.buf = (u8 *) in_phys;
+ descrp->in_descr.after = (u8 *) in_phys + chunk_len;
+ descrp->in_ctxt.saved_data_buf = (u8 *) in_phys;
+
+ flush_dma_descr(&descrp->in_descr, 1);
+
+ DMA_START_CONTEXT(regi_dmain,
+ descrp_dma
+ + offsetof(struct crisv32_spi_dma_descrs, in_ctxt));
+}
+
+/*
+ * SPI-bitbang txrx_bufs function for DMA.
+ * FIXME: We have SG DMA descriptors; use them.
+ * (Requires abandoning the spi_bitbang framework if done reasonably.)
+ */
+static int crisv32_spi_sser_dma_txrx_bufs(struct spi_device *spi,
+ struct spi_transfer *t)
+{
+ struct crisv32_spi_dma_cs *cs = spi->controller_state;
+ struct crisv32_spi_hw_info *hw = spidev_to_hw(spi);
+ u32 len = t->len;
+ reg_sser_rw_cfg cfg = hw->cfg;
+ reg_sser_rw_tr_cfg tr_cfg = hw->tr_cfg;
+ reg_sser_rw_rec_cfg rec_cfg = hw->rec_cfg;
+ reg_sser_rw_extra extra = hw->extra;
+ u32 regi_sser = hw->sser.regi;
+ u32 dmain = 0;
+ u32 dmaout = 0;
+ u32 regi_dmain = hw->dmain.regi;
+ u8 *rx_buf = t->rx_buf;
+
+ /*
+ * Using IRQ+completion is measured to give an overhead of 14
+ * us, so let's instead busy-wait for the time that would be
+ * wasted anyway, and get back sooner. We're not counting in
+ * other overhead such as the DMA descriptor in the
+ * time-expression, which causes us to use busy-wait for
+ * data-lengths that actually take a bit longer than
+ * IRQ_USAGE_THRESHOLD_NS. Still, with IRQ_USAGE_THRESHOLD_NS
+ * = 14000, the threshold is for 20 MHz => 35 bytes, 25 => 44
+ * and 50 => 88 and the typical SPI transfer lengths for
+ * SDcard are { 1, 2, 7, 512 } bytes so a more complicated
+ * would likely give nothing but worse performance due to
+ * complexity.
+ */
+ int use_irq = len * hw->half_cycle_delay_ns
+ > IRQ_USAGE_THRESHOLD_NS / 8 / 2;
+
+ if (len > DMA_CHUNKSIZ) {
+ /*
+ * It should be quite easy to adjust the code if the need
+ * arises for something much larger than the preallocated
+ * buffers (which could themselves easily just be increased)
+ * but still what fits in extra.clkoff_cycles: kmalloc a
+ * temporary dmaable buffer in this function and free it at
+ * the end. No need to optimize rare requests. Until then,
+ * we'll keep the code as simple as performance allows.
+ * Alternatively or if we need to send even larger data,
+ * consider calling self with the required number of "faked"
+ * shorter transfers here.
+ */
+ dev_err(&spi->dev,
+ "Trying to transfer %d > max %d bytes:"
+ " need to adjust the SPI driver\n",
+ len, DMA_CHUNKSIZ);
+ return -EMSGSIZE;
+ }
+
+ /*
+ * Need to separately tell the hispeed machinery the number of
+ * bits in this transmission.
+ */
+ extra.clkoff_cycles = len * 8 - 1;
+
+ if (t->tx_buf != NULL) {
+ if (t->tx_dma == 0) {
+ memcpy(cs->tx_buf, t->tx_buf, len);
+ dmaout = virt_to_phys(cs->tx_buf);
+ } else
+ dmaout = t->tx_dma;
+
+ crisv32_spi_sser_setup_dma_descr_out(hw->dmaout.regi,
+ cs, dmaout,
+ len);
+
+ /* No need to do anything for TR 106; this DMA only reads. */
+ tr_cfg.tr_en = 1;
+ tr_cfg.data_pin_use = regk_sser_dout;
+ } else {
+ tr_cfg.data_pin_use = (spi->mode & SPI_TX_1)
+ ? regk_sser_gio1 : regk_sser_gio0;
+ tr_cfg.tr_en = 0;
+ }
+
+ if (rx_buf != 0) {
+ if (t->rx_dma == 0)
+ dmain = virt_to_phys(cs->rx_buf);
+ else
+ dmain = t->rx_dma;
+
+ crisv32_spi_sser_setup_dma_descr_in(regi_dmain, cs,
+ dmain, len);
+ rec_cfg.rec_en = 1;
+
+ REG_WRINT_SSER(rw_ack_intr, -1);
+ REG_WRINT_DI(rw_ack_intr, -1);
+
+ /*
+ * If we're receiving, use the rec data interrupt from DMA as
+ * a signal that the HW is done.
+ */
+ if (use_irq) {
+ reg_sser_rw_intr_mask mask = { .urun = 1 };
+ reg_dma_rw_intr_mask dmask = { .data = 1 };
+
+ REG_WR_DI(rw_intr_mask, dmask);
+
+ /*
+ * Catch transmitter underruns too. We don't
+ * have to conditionalize that on the
+ * transmitter being enabled; it's off when
+ * the transmitter is off. Any overruns will
+ * be indicated by a timeout, so we don't have
+ * to check for that specifically.
+ */
+ REG_WR_SSER(rw_intr_mask, mask);
+ }
+ } else {
+ rec_cfg.rec_en = 0;
+
+ /*
+ * Ack previous overrun, underrun and tidle interrupts. Or
+ * why not all. We'll get orun and urun "normally" due to the
+ * way hispeed is (documented to) work and need to clear them,
+ * and we'll have a tidle from a previous transmit if we used
+ * to both receive and transmit, but now only transmit.
+ */
+ REG_WRINT_SSER(rw_ack_intr, -1);
+
+ if (use_irq) {
+ reg_sser_rw_intr_mask mask = { .urun = 1, .tidle = 1 };
+ REG_WR_SSER(rw_intr_mask, mask);
+ }
+ }
+
+ REG_WR_SSER(rw_rec_cfg, rec_cfg);
+ REG_WR_SSER(rw_tr_cfg, tr_cfg);
+ REG_WR_SSER(rw_extra, extra);
+
+ /*
+ * Barriers are needed to make sure that the completion inits don't
+ * migrate past the register writes due to gcc scheduling.
+ */
+ mb();
+ hw->dma_actually_done = 0;
+ INIT_COMPLETION(hw->dma_done);
+ mb();
+
+ /*
+ * Wait until DMA tx FIFO has more than one byte (it reads one
+ * directly then one "very quickly") before starting sser tx.
+ */
+ if (tr_cfg.tr_en) {
+ u32 regi_dmaout = hw->dmaout.regi;
+ u32 minlen = len > 2 ? 2 : len;
+ while ((REG_RD_DO(rw_stat)).buf < minlen)
+ ;
+ }
+
+ /* Wait until DMA-in is finished reading the descriptors. */
+ if (rec_cfg.rec_en)
+ while (DMA_BUSY(regi_dmain))
+ ;
+ /*
+ * Wait 3 cycles before enabling (with .prepare = 1).
+ * FIXME: Can we cut this by some time already passed?
+ */
+ ndelay(3 * 2 * hw->half_cycle_delay_ns);
+ cfg.en = 1;
+ REG_WR_SSER(rw_cfg, cfg);
+
+ /*
+ * Wait 3 more cycles plus 30 ns before letting go.
+ * FIXME: Can we do something else before but after the
+ * previous cfg write and cut this by the time already passed?
+ */
+ cfg.prepare = 0;
+ hw->cfg = cfg;
+ ndelay(3 * 2 * hw->half_cycle_delay_ns + 30);
+
+ REG_WR_SSER(rw_cfg, cfg);
+
+ /*, We'll disable sser next the time we change the configuration. */
+ cfg.en = 0;
+ cfg.prepare = 1;
+ hw->cfg = cfg;
+
+ if (!use_irq) {
+ /*
+ * We use a timeout corresponding to one iteration per ns,
+ * which of course is at least five * insns / loop times as
+ * much as reality, but we'll avoid a need for reading hw
+ * timers directly.
+ */
+ u32 countdown = IRQ_USAGE_THRESHOLD_NS;
+
+ do
+ if (rec_cfg.rec_en == 0) {
+ /* Using the transmitter only. */
+ reg_sser_r_intr intr = REG_RD_SSER(r_intr);
+
+ if (intr.tidle != 0) {
+ /*
+ * Almost done... Just check if we
+ * had a transmitter underrun too.
+ */
+ if (!intr.urun)
+ goto transmission_done;
+
+ /*
+ * Fall over to the "time is up" case;
+ * no need to provide a special path
+ * for the error case.
+ */
+ countdown = 1;
+ }
+ } else {
+ /* Using at least the receiver. */
+ if ((REG_RD_DI(r_intr)).data != 0) {
+ if ((REG_RD_SSER(r_intr)).urun == 0)
+ goto transmission_done;
+ countdown = 1;
+ }
+ }
+ while (--countdown != 0);
+
+ /*
+ * The time is up. Something might be wrong, or perhaps we've
+ * started using data lengths where the threshold was about a
+ * magnitude wrong. Fall over to IRQ. Remember not to ack
+ * interrupts here (but always above, before starting), else
+ * we'll have a race condition with the interrupt.
+ */
+ if (!rec_cfg.rec_en) {
+ reg_sser_rw_intr_mask mask = { .urun = 1, .tidle = 1 };
+ REG_WR_SSER(rw_intr_mask, mask);
+ } else {
+ reg_dma_rw_intr_mask dmask = { .data = 1 };
+ reg_sser_rw_intr_mask mask = { .urun = 1 };
+
+ /*
+ * Never mind checking for tr being disabled; urun
+ * won't happen then.
+ */
+ REG_WR_SSER(rw_intr_mask, mask);
+ REG_WR_DI(rw_intr_mask, dmask);
+ }
+ }
+
+ if (!wait_for_completion_timeout(&hw->dma_done, hw->dma_timeout)
+ /*
+ * Have to keep track manually too, else we'll get a timeout
+ * indication for being scheduled out too long, while the
+ * completion will still have trigged.
+ */
+ && !hw->dma_actually_done) {
+ u32 regi_dmaout = hw->dmaout.regi;
+
+ /*
+ * Transfer timed out. Should not happen for a
+ * working controller, except perhaps if the system is
+ * badly conditioned, causing DMA memory bandwidth
+ * starvation. Not much to do afterwards, but perhaps
+ * reset DMA and sser and hope it works the next time.
+ */
+ REG_WRINT_SSER(rw_cfg, 0);
+ REG_WR_SSER(rw_cfg, cfg);
+ REG_WRINT_SSER(rw_intr_mask, 0);
+ REG_WRINT_DI(rw_intr_mask, 0);
+ REG_WRINT_SSER(rw_ack_intr, -1);
+ crisv32_reset_dma_hw(hw->dmain.regi);
+ crisv32_reset_dma_hw(hw->dmaout.regi);
+
+ dev_err(&spi->dev, "timeout %u bytes %u kHz\n",
+ len, hw->effective_speed_kHz);
+ dev_err(&spi->dev, "sser=(%x,%x,%x,%x,%x)\n",
+ REG_RDINT_SSER(rw_cfg), REG_RDINT_SSER(rw_tr_cfg),
+ REG_RDINT_SSER(rw_rec_cfg), REG_RDINT_SSER(rw_extra),
+ REG_RDINT_SSER(r_intr));
+ dev_err(&spi->dev, "tx=(%x,%x,%x,%x)\n",
+ dmaout, REG_RDINT_DO(rw_stat), REG_RDINT_DO(rw_data),
+ REG_RDINT_DO(r_intr));
+ dev_err(&spi->dev, "rx=(%x,%x,%x,%x)\n",
+ dmain, REG_RDINT_DI(rw_stat), REG_RDINT_DI(rw_data),
+ REG_RDINT_DI(r_intr));
+ return -EIO;
+ }
+
+ transmission_done:
+ /* Wait for the last half-cycle of the last cycle. */
+ crisv32_spi_sser_wait_halfabit(hw);
+
+ /* Reset for another call. */
+ REG_WR_SSER(rw_cfg, cfg);
+
+ /*
+ * If we had to use the temp DMAable rec buffer, copy it to the right
+ * position.
+ */
+ if (t->rx_buf != 0 && t->rx_dma == 0)
+ memcpy (t->rx_buf, cs->rx_buf, len);
+
+ /*
+ * All clear. The interrupt function disabled the interrupt, we don't
+ * have to do more.
+ */
+ return len;
+}
+
+/* Platform-device probe function. */
+
+static int __devinit crisv32_spi_sser_probe(struct platform_device *dev)
+{
+ struct spi_master *master;
+ struct crisv32_spi_sser_devdata *dd;
+ struct crisv32_spi_hw_info *hw;
+ struct resource *res;
+ struct crisv32_spi_sser_controller_data *gc;
+ int ret;
+
+ /*
+ * We need to get the controller data as a hardware resource,
+ * or else it wouldn't be available until *after* the
+ * spi_bitbang_start call!
+ */
+ res = platform_get_resource_byname(dev, 0, "controller_data_ptr");
+ if (res == NULL) {
+ dev_err(&dev->dev,
+ "can't get controller_data resource at probe\n");
+ return -EIO;
+ }
+
+ gc = (struct crisv32_spi_sser_controller_data *) res->start;
+
+ master = spi_alloc_master(&dev->dev, sizeof *dd);
+ if (master == NULL) {
+ dev_err(&dev->dev, "failed to allocate spi master\n");
+ ret = -ENOMEM;
+ goto err;
+ }
+
+ dd = spi_master_get_devdata(master);
+ platform_set_drvdata(dev, dd);
+
+ /*
+ * The device data asks for this driver, and holds the id
+ * number, which must be unique among the same-type devices.
+ * We use this as the number of this SPI bus.
+ */
+ master->bus_num = dev->id;
+
+ /* Setup SPI bitbang adapter hooks. */
+ dd->bitbang.master = spi_master_get(master);
+ dd->bitbang.chipselect = crisv32_spi_sser_chip_select_active_low;
+
+ hw = &dd->hw;
+ hw->gc = gc;
+
+ /* Pre-spi_bitbang_start setup. */
+ if (gc->using_dma) {
+ /* Setup DMA and interrupts. */
+ ret = gc->iface_allocate(&hw->sser, &hw->dmain, &hw->dmaout);
+ if (ret != 0)
+ goto err_no_regs;
+
+ dd->bitbang.master->setup = crisv32_spi_sser_dma_master_setup;
+ dd->bitbang.setup_transfer
+ = crisv32_spi_sser_common_setup_transfer;
+ dd->bitbang.txrx_bufs = crisv32_spi_sser_dma_txrx_bufs;
+ dd->bitbang.master->cleanup = crisv32_spi_sser_dma_cleanup;
+ } else {
+ /* Just registers, then. */
+ ret = gc->iface_allocate(&hw->sser, NULL, NULL);
+ if (ret != 0)
+ goto err_no_regs;
+
+ dd->bitbang.master->setup
+ = crisv32_spi_sser_regs_master_setup;
+ dd->bitbang.setup_transfer
+ = crisv32_spi_sser_regs_setup_transfer;
+ dd->bitbang.master->cleanup = spi_bitbang_cleanup;
+
+ /*
+ * We can do all modes pretty simply, but I have no
+ * simple enough way to test them, so I won't.
+ */
+ dd->bitbang.txrx_word[SPI_MODE_3]
+ = crisv32_spi_sser_txrx_mode3;
+ }
+
+ ret = spi_bitbang_start(&dd->bitbang);
+ if (ret)
+ goto err_no_bitbang;
+
+ /*
+ * We don't have a dev_info here, as initialization that may fail is
+ * postponed to the first master->setup call. It's called from
+ * spi_bitbang_start (above), where the call-chain doesn't look too
+ * close at error return values; we'll get here successfully anyway,
+ * so emitting a separate message here is at most confusing.
+ */
+ dev_dbg(&dev->dev,
+ "CRIS v32 SPI driver for sser%d%s present\n",
+ master->bus_num,
+ gc->using_dma ? "/DMA" : "");
+
+ return 0;
+
+ err_no_bitbang:
+ gc->iface_free();
+
+ err_no_regs:
+ platform_set_drvdata(dev, NULL);
+ spi_master_put(dd->bitbang.master);
+
+ err:
+ return ret;
+}
+
+/* Platform-device remove-function. */
+
+static int __devexit crisv32_spi_sser_remove(struct platform_device *dev)
+{
+ struct crisv32_spi_sser_devdata *dd = platform_get_drvdata(dev);
+ struct crisv32_spi_hw_info *hw = &dd->hw;
+ struct crisv32_spi_sser_controller_data *gc = hw->gc;
+ int ret;
+
+ /* We need to stop all bitbanging activity separately. */
+ ret = spi_bitbang_stop(&dd->bitbang);
+ if (ret != 0)
+ return ret;
+
+ spi_master_put(dd->bitbang.master);
+
+ /*
+ * If we get here, the queue is empty and there's no activity;
+ * it's safe to flip the switch on the interfaces.
+ */
+ if (gc->using_dma) {
+ u32 regi_dmain = hw->dmain.regi;
+ u32 regi_dmaout = hw->dmaout.regi;
+ u32 regi_sser = hw->sser.regi;
+
+ REG_WRINT_SSER(rw_intr_mask, 0);
+ REG_WRINT_DI(rw_intr_mask, 0);
+ REG_WRINT_DO(rw_intr_mask, 0);
+ hw->cfg.en = 0;
+ REG_WR_SSER(rw_cfg, hw->cfg);
+ DMA_RESET(regi_dmain);
+ DMA_RESET(regi_dmaout);
+ free_irq(hw->sser.irq, hw);
+ free_irq(hw->dmain.irq, hw);
+ }
+
+ gc->iface_free();
+
+ platform_set_drvdata(dev, NULL);
+ return 0;
+}
+
+/*
+ * For the time being, there's no suspend/resume support to care
+ * about, so those handlers default to NULL.
+ */
+static struct platform_driver crisv32_spi_sser_drv = {
+ .probe = crisv32_spi_sser_probe,
+ .remove = __devexit_p(crisv32_spi_sser_remove),
+ .driver = {
+ .name = "spi_crisv32_sser",
+ .owner = THIS_MODULE,
+ },
+};
+
+/* Module init function. */
+
+static int __devinit crisv32_spi_sser_init(void)
+{
+ return platform_driver_register(&crisv32_spi_sser_drv);
+}
+
+/* Module exit function. */
+
+static void __devexit crisv32_spi_sser_exit(void)
+{
+ platform_driver_unregister(&crisv32_spi_sser_drv);
+}
+
+/* Setter function for speed limit. */
+
+static int crisv32_spi_speed_limit_Hz_setter(const char *val,
+ struct kernel_param *kp)
+{
+ char *endp;
+ ulong num = simple_strtoul(val, &endp, 0);
+ if (endp == val
+ || *endp != 0
+ || num <= 0
+ /*
+ * We can't go above 100 MHz speed. Actually we can't go
+ * above 50 MHz using the sser support but it might make
+ * sense trying.
+ */
+ || num > 100000000)
+ return -EINVAL;
+ *(ulong *) kp->arg = num;
+ return 0;
+}
+
+module_param_call(crisv32_spi_max_speed_hz,
+ crisv32_spi_speed_limit_Hz_setter, param_get_ulong,
+ &crisv32_spi_speed_limit_Hz, 0644);
+
+module_init(crisv32_spi_sser_init);
+module_exit(crisv32_spi_sser_exit);
+
+MODULE_DESCRIPTION("CRIS v32 SPI-SSER Driver");
+MODULE_AUTHOR("Hans-Peter Nilsson, <hp@axis.com>");
+MODULE_LICENSE("GPL");
--- /dev/null
+
+/* macros for debug output */
+
+#define hcd_dbg(hcd, fmt, args...) \
+ dev_info(hcd->self.controller, fmt, ## args)
+#define hcd_err(hcd, fmt, args...) \
+ dev_err(hcd->self.controller, fmt, ## args)
+#define hcd_info(hcd, fmt, args...) \
+ dev_info(hcd->self.controller, fmt, ## args)
+#define hcd_warn(hcd, fmt, args...) \
+ dev_warn(hcd->self.controller, fmt, ## args)
+
+/*
+#define devdrv_dbg(fmt, args...) \
+ printk(KERN_INFO "usb_devdrv dbg: ");printk(fmt, ## args)
+*/
+#define devdrv_dbg(fmt, args...) {}
+
+#define devdrv_err(fmt, args...) \
+ printk(KERN_ERR "usb_devdrv error: ");printk(fmt, ## args)
+#define devdrv_info(fmt, args...) \
+ printk(KERN_INFO "usb_devdrv: ");printk(fmt, ## args)
+
+#define irq_dbg(fmt, args...) \
+ printk(KERN_INFO "crisv10_irq dbg: ");printk(fmt, ## args)
+#define irq_err(fmt, args...) \
+ printk(KERN_ERR "crisv10_irq error: ");printk(fmt, ## args)
+#define irq_warn(fmt, args...) \
+ printk(KERN_INFO "crisv10_irq warn: ");printk(fmt, ## args)
+#define irq_info(fmt, args...) \
+ printk(KERN_INFO "crisv10_hcd: ");printk(fmt, ## args)
+
+/*
+#define rh_dbg(fmt, args...) \
+ printk(KERN_DEBUG "crisv10_rh dbg: ");printk(fmt, ## args)
+*/
+#define rh_dbg(fmt, args...) {}
+
+#define rh_err(fmt, args...) \
+ printk(KERN_ERR "crisv10_rh error: ");printk(fmt, ## args)
+#define rh_warn(fmt, args...) \
+ printk(KERN_INFO "crisv10_rh warning: ");printk(fmt, ## args)
+#define rh_info(fmt, args...) \
+ printk(KERN_INFO "crisv10_rh: ");printk(fmt, ## args)
+
+/*
+#define tc_dbg(fmt, args...) \
+ printk(KERN_INFO "crisv10_tc dbg: ");printk(fmt, ## args)
+*/
+#define tc_dbg(fmt, args...) {while(0){}}
+
+#define tc_err(fmt, args...) \
+ printk(KERN_ERR "crisv10_tc error: ");printk(fmt, ## args)
+/*
+#define tc_warn(fmt, args...) \
+ printk(KERN_INFO "crisv10_tc warning: ");printk(fmt, ## args)
+*/
+#define tc_warn(fmt, args...) {while(0){}}
+
+#define tc_info(fmt, args...) \
+ printk(KERN_INFO "crisv10_tc: ");printk(fmt, ## args)
+
+
+/* Debug print-outs for various traffic types */
+
+#define intr_warn(fmt, args...) \
+ printk(KERN_INFO "crisv10_intr warning: ");printk(fmt, ## args)
+/*
+#define intr_dbg(fmt, args...) \
+ printk(KERN_DEBUG "crisv10_intr dbg: ");printk(fmt, ## args)
+*/
+#define intr_dbg(fmt, args...) {while(0){}}
+
+
+#define isoc_err(fmt, args...) \
+ printk(KERN_ERR "crisv10_isoc error: ");printk(fmt, ## args)
+/*
+#define isoc_warn(fmt, args...) \
+ printk(KERN_INFO "crisv10_isoc warning: ");printk(fmt, ## args)
+*/
+#define isoc_warn(fmt, args...) {while(0){}}
+
+/*
+#define isoc_dbg(fmt, args...) \
+ printk(KERN_INFO "crisv10_isoc dbg: ");printk(fmt, ## args)
+*/
+#define isoc_dbg(fmt, args...) {while(0){}}
+
+/*
+#define timer_warn(fmt, args...) \
+ printk(KERN_INFO "crisv10_timer warning: ");printk(fmt, ## args)
+*/
+#define timer_warn(fmt, args...) {while(0){}}
+
+/*
+#define timer_dbg(fmt, args...) \
+ printk(KERN_INFO "crisv10_timer dbg: ");printk(fmt, ## args)
+*/
+#define timer_dbg(fmt, args...) {while(0){}}
+
+
+/* Debug printouts for events related to late finishing of URBs */
+/*
+#define late_dbg(fmt, args...) \
+ printk(KERN_INFO "crisv10_late dbg: ");printk(fmt, ## args)
+*/
+#define late_dbg(fmt, args...) {while(0){}}
+
+#define late_warn(fmt, args...) \
+ printk(KERN_INFO "crisv10_late warning: ");printk(fmt, ## args)
+/*
+#define errno_dbg(fmt, args...) \
+ printk(KERN_INFO "crisv10_errno dbg: ");printk(fmt, ## args)
+*/
+#define errno_dbg(fmt, args...) {while(0){}}
+
+
+#define dma_dbg(fmt, args...) \
+ printk(KERN_INFO "crisv10_dma dbg: ");printk(fmt, ## args)
+#define dma_err(fmt, args...) \
+ printk(KERN_ERR "crisv10_dma error: ");printk(fmt, ## args)
+#define dma_warn(fmt, args...) \
+ printk(KERN_INFO "crisv10_dma warning: ");printk(fmt, ## args)
+#define dma_info(fmt, args...) \
+ printk(KERN_INFO "crisv10_dma: ");printk(fmt, ## args)
+
+
+
+#define str_dir(pipe) \
+ (usb_pipeout(pipe) ? "out" : "in")
+#define str_type(pipe) \
+ ({ \
+ char *s = "?"; \
+ switch (usb_pipetype(pipe)) { \
+ case PIPE_ISOCHRONOUS: s = "iso"; break; \
+ case PIPE_INTERRUPT: s = "intr"; break; \
+ case PIPE_CONTROL: s = "ctrl"; break; \
+ case PIPE_BULK: s = "bulk"; break; \
+ }; \
+ s; \
+ })
--- /dev/null
+#ifndef __MTD_MTDRAM_H__
+#define __MTD_MTDRAM_H__
+
+#ifdef __KERNEL__
+#include <linux/mtd/mtd.h>
+int mtdram_init_device(struct mtd_info *mtd, void *mapped_address,
+ unsigned long size, char *name);
+
+#endif /* __KERNEL__ */
+#endif /* __MTD_MTDRAM_H__ */
--- /dev/null
+config AXIS_FIMAGE
+ bool "Build fimage"
+ depends LINUX_2_6_ETRAX
+ default y
+
--- /dev/null
+#
+# Copyright (C) 2006 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/image.mk
+
+FOXBOARD:=custom MCM 416 816 832
+FOXBOARD_4MB:=MCM 416
+FOXBOARD_8MB:=custom 816 832
+
+define Image/BuildKernel
+ for f in $(FOXBOARD); do \
+ cp $(KDIR)/vmlinuz_$$$$f $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-zImage_$$$$f; \
+ done
+endef
+
+define Image/Prepare
+ for f in $(FOXBOARD); do \
+ cp $(LINUX_DIR)/arch/cris/boot/zImage_$$$$f $(KDIR)/vmlinuz_$$$$f; \
+ done
+ $(MAKE) -C ./e100boot/
+ $(MAKE) -C ./mkfimage/
+ $(INSTALL_BIN) ./boot_linux $(BIN_DIR)
+endef
+
+define Image/Build/generic
+ for f in $(2); do \
+ mkfimage $(KDIR)/vmlinuz_$$$$f $(KDIR)/vmlinuz_$$$$f.tmp ; \
+ cat $(KDIR)/vmlinuz_$$$$f.tmp $(KDIR)/root.$(1) > $(KDIR)/fimage.$(1)_$$$$f.tmp; \
+ dd if=$(KDIR)/fimage.$(1)_$$$$f.tmp of=$(KDIR)/fimage.$(1)_$$$$f bs=$(3) conv=sync; \
+ cp $(KDIR)/fimage.$(1)_$$$$f $(BIN_DIR)/openwrt-$(BOARD)-$(KERNEL)-$(1)-fimage_$$$$f; \
+ done
+endef
+
+define Image/Build/jffs2-64k
+ $(call prepare_generic_jffs-64k,$(KDIR)/root.jff2-64k)
+ $(call Image/Build/generic,$(1),$(FOXBOARD_4MB),4194304)
+ $(call Image/Build/generic,$(1),$(FOXBOARD_8MB),8388608)
+endef
+
+define Image/Build/squashfs
+ $(call prepare_generic_squashfs,$(KDIR)/root.squashfs)
+ $(call Image/Build/generic,$(1),$(FOXBOARD_4MB),4194304)
+ $(call Image/Build/generic,$(1),$(FOXBOARD_8MB),8388608)
+endef
+
+define Image/Build
+ $(call Image/Build/$(1),$(1))
+endef
+
+$(eval $(call BuildImage))
--- /dev/null
+#!/usr/bin/perl -w
+
+#*****************************************************************************
+#!
+#! FILE NAME : boot_linux
+#!
+#! PARAMETERS : -b <bootimage> the name of the boot image to use
+#! -d <device> the interface to use, e.g., eth1
+#! (defaults is eth0)
+#! -f save it in flash memory at address 0x10000
+#! -F save it in flash memory at address 0
+#! -h show some help
+#! -i <image> name of the image to use (default is fimage)
+#! -o <offset> the offset in the flash where the flashing
+#! starts
+#! -O <offset> the offset in the image file where the
+#! flashing starts from
+#! -p print the resulting etrax100boot command
+#! instead of executing it
+#! -s <size> how much to flash (default is the size of
+#! the flash minus the offset specified using
+#! -o or -f)
+#! -S <size> the size of the flash
+#!
+#! All sizes and offsets above can be specified as decimal
+#! numbers, or as hexadecimal numbers by prefixing them with 0x.
+#! It is also possible to use the suffixes k and M to specify
+#! kilo (1024) or mega (1048576).
+#!
+#! DESCRIPTION: Extract the start of the image and any registers that should
+#! be set from the kimage or fimage file, and then boot it.
+#!
+#! FUNCTIONS : convert_size
+#! extract_hw_settings
+#! get_dword
+#! calculate_sdram_init
+#! sdram_command
+#! print_help
+#!
+#!----------------------------------------------------------------------------
+#! HISTORY
+#!
+#! $Log: boot_linux,v $
+#! Revision 1.16 2004/11/01 16:32:27 starvik
+#! Corrected help text to avoid confusion
+#!
+#! Revision 1.15 2003/01/29 11:48:57 pkj
+#! Calculate a flash size large enough for the given image if the
+#! -S option is not specified.
+#!
+#! Revision 1.14 2002/11/18 14:40:09 pkj
+#! Make use of the --loop option to etrax100boot when initialising
+#! SDRAM memories. This requires a lot fewer options to be passed
+#! to the boot loader.
+#!
+#! Revision 1.13 2002/08/15 16:29:02 pkj
+#! * The -S option now accepts the size in bytes (just like the -s option).
+#! For backwards compatibility it still assumes sizes of 16 and less to
+#! be specified in MB.
+#! * The suffixes k and M can now be used with all sizes and offsets to
+#! specify them in kilo or mega.
+#!
+#! Revision 1.12 2002/08/15 15:27:34 pkj
+#! Use $opts{'x'} instead of $opt_x.
+#!
+#! Revision 1.11 2002/07/04 17:06:39 pkj
+#! * No longer specifies a bootfile by default (not needed any longer).
+#! * Implemented option -b to specify a bootfile.
+#! * Removed references to option -l (it was never implemented).
+#!
+#! Revision 1.10 2002/06/04 11:50:23 starvik
+#! Check if mrs_data is specified in kernelconfig (necessary for MCM)
+#!
+#! Revision 1.9 2002/01/29 10:38:26 pkj
+#! Change illegal to invalid.
+#!
+#! Revision 1.8 2001/09/13 12:32:10 pkj
+#! * Added option -S to specify the size of the flash (in MB), as -s
+#! is used to specify how much to flash nowadays.
+#! * Made the default size of the flash depend on the size of the image
+#! file. If it is bigger than 0x200100 then the flash is assumed to
+#! be 4 MB, otherwise it is assumed to be 2 MB.
+#! * Added verification of various options.
+#!
+#! Revision 1.7 2001/09/13 10:25:11 pkj
+#! Minor clean-up.
+#!
+#! Revision 1.6 2001/06/29 10:05:16 pkj
+#! Corrected check for SDRAM.
+#!
+#! Revision 1.5 2001/06/29 09:11:55 pkj
+#! Synchronised boot_elinux and boot_linux.
+#!
+#!----------------------------------------------------------------------------
+#! (C) Copyright 2001, Axis Communications AB, LUND, SWEDEN
+#!****************************************************************************
+# $Id: boot_linux,v 1.16 2004/11/01 16:32:27 starvik Exp $
+
+#****************** INCLUDE FILES SECTION ************************************
+
+use strict;
+
+use Getopt::Std;
+use File::Basename;
+
+#****************** VARIABLE DECLARATION SECTION *****************************
+
+use vars qw($my_name %opts);
+use vars qw($text_start $cmd);
+use vars qw($image_name $image_size);
+use vars qw($offset $source_offset $flash_size $flashing_size);
+use vars qw($sdram_timing_address $sdram_config_address);
+use vars qw($sdram_precharge $sdram_nop $sdram_refresh $sdram_mrs);
+
+#****************** CONSTANT SECTION *****************************************
+
+# Register addresses
+$sdram_timing_address = "b0000008";
+$sdram_config_address = "b000000c";
+
+# SDRAM commands
+$sdram_precharge = 3;
+$sdram_nop = 0;
+$sdram_refresh = 2;
+$sdram_mrs = 1;
+
+#****************** MAIN PROGRAM SECTION *************************************
+
+# The name of this program.
+$my_name = basename($0);
+
+# Get options
+getopts('b:d:fFhi:o:O:ps:S:', \%opts);
+
+&print_help if ($opts{'h'});
+
+# Name and existance of the image
+$image_name = ($opts{'i'} ? $opts{'i'} : 'fimage');
+die "Could not find the image $image_name!\n" unless (-s $image_name);
+
+if ($opts{'f'} || $opts{'F'})
+{
+ $image_size = -s $image_name;
+
+ $offset = ($opts{'f'} ? 0x10000 : 0);
+
+ $offset = &convert_size($opts{'o'}) if (defined($opts{'o'}));
+
+ die("$my_name: Invalid destination offset\n") if ($offset !~ /^\d+$/);
+
+ my $base_name = basename($image_name);
+ if ($base_name eq 'timage' || $base_name eq 'flash1.img')
+ {
+ $source_offset = 0;
+ }
+ else
+ {
+ $source_offset = $offset;
+ }
+
+ $source_offset = &convert_size($opts{'O'}) if (defined($opts{'O'}));
+
+ die("$my_name: Invalid source offset\n") if ($source_offset !~ /^\d+$/);
+ die("$my_name: Source offset > image size\n") if ($source_offset > $image_size);
+
+ if (defined($opts{'S'}))
+ {
+ # Backwards compatibility to allow specifying the flash size in MB
+ # without using an M suffix
+ $opts{'S'} .= 'M' if ($opts{'S'} =~ /^\d+$/ && $opts{'S'} <= 16);
+
+ $flash_size = &convert_size($opts{'S'});
+ }
+ else
+ {
+ # Calculate a flash size large enough for the image without the checksum
+ # and HWID.
+ $flash_size = ($image_size - $source_offset + $offset) & 0xFFFF0000;
+ }
+
+ die("$my_name: Invalid flash size\n") if ($flash_size !~ /^\d+$/);
+ die("$my_name: Destination offset > flash size\n") if ($offset > $flash_size);
+ if (defined($opts{'s'}))
+ {
+ $flashing_size = &convert_size($opts{'s'});
+ }
+ else
+ {
+ $flashing_size = $flash_size - $offset;
+ }
+
+ die("$my_name: Invalid size to flash\n") if ($flashing_size !~ /^\d+$/);
+
+ if ($flashing_size > $flash_size - $offset)
+ {
+ $flashing_size = $flash_size - $offset;
+ printf("Warning: Flashing size limited to 0x%lx due to the offset (0x%lx) and flash size (0x%lx).\n", $flashing_size, $offset, $flash_size);
+ }
+
+ if ($flashing_size > $image_size - $source_offset)
+ {
+ $flashing_size = $image_size - $source_offset;
+ printf("Warning: Flashing size limited to 0x%lx due to the offset (0x%lx) and image size (0x%lx).\n", $flashing_size, $source_offset, $image_size);
+ }
+}
+
+# Create the command line to boot the image
+if (system('./etrax100boot --help > /dev/null') == 0)
+{
+ $cmd = './etrax100boot';
+}
+elsif (system('svinto_boot --help > /dev/null') == 0)
+{
+ $cmd = 'svinto_boot';
+}
+else
+{
+ die("Cannot find e100boot program in your PATH!\n");
+}
+
+$cmd .= " --device $opts{'d'}" if ($opts{'d'});
+
+$cmd .= &extract_hw_settings;
+
+$cmd .= " --bootfile $opts{'b'}" if ($opts{'b'});
+$cmd .= " --file $image_name $text_start";
+
+if ($opts{'f'} || $opts{'F'})
+{
+ $cmd .= sprintf(" --flash %lx %lx %lx --jump 0",
+ hex($text_start) + $source_offset, $offset, $flashing_size);
+}
+else
+{
+ $cmd .= " --jump $text_start";
+}
+
+if ($opts{'p'})
+{
+ print "Command:\n$cmd\n";
+}
+else
+{
+ system($cmd);
+}
+
+exit 0;
+
+#****************** FUNCTION DEFINITION SECTION ******************************
+
+#*****************************************************************************
+##
+## FUNCTION NAME: convert_size
+##
+##****************************************************************************
+
+sub convert_size
+{
+ my($arg) = @_;
+ my $size;
+
+ if ($arg =~ /^0x([\da-fA-F]+)([kM])?$/)
+ {
+ $size = hex($1);
+ }
+ elsif ($arg =~ /^(\d+)([kM])?$/)
+ {
+ $size = $1;
+ }
+ else
+ {
+ return -1;
+ }
+
+ if (!defined($2))
+ {
+ return $size;
+ }
+ elsif ($2 eq 'k')
+ {
+ return $size * 1024;
+ }
+ elsif ($2 eq 'M')
+ {
+ return $size * 1048576;
+ }
+}
+
+#*****************************************************************************
+##
+## FUNCTION NAME: extract_hw_settings
+##
+##****************************************************************************
+
+sub extract_hw_settings
+{
+ my $data;
+ my $dbg_port;
+ my $sdram_enabled;
+ my $return_value = "";
+ my $sdram_config;
+
+ # The hw information table has the following format
+ #
+ # "HW_PARAM_MAGIC"
+ # text_start (dword)
+ # serial debg port (dword)
+ # sdram enabled (dword)
+ # register address (dword)
+ # register value (dword)
+ # ...
+ # 0
+
+ open(FILE, "$image_name") || die("Could not open '$image_name'");
+
+ while (<FILE>)
+ {
+ if (m/HW_PARAM_MAGIC/g)
+ {
+ # Seek to first byte after magic
+ seek(FILE, -length($_) + pos($_), 1);
+ last;
+ }
+ }
+
+ $text_start = &get_dword;
+ $dbg_port = &get_dword;
+ $sdram_enabled = int(&get_dword);
+
+ while (1)
+ {
+ my $register = &get_dword;
+ my $value = &get_dword;
+
+ last if ($register eq "00000000");
+
+ if ($sdram_enabled)
+ {
+ if ($register eq $sdram_config_address)
+ {
+ $sdram_config = $value;
+ }
+ elsif ($register eq $sdram_timing_address)
+ {
+ $return_value .= &calculate_sdram_init($value, $sdram_config);
+ next;
+ }
+ }
+
+ $return_value .= " --setreg $register $value";
+ }
+
+ close(FILE);
+
+ return $return_value;
+}
+
+#*****************************************************************************
+##
+## FUNCTION NAME: get_dword
+##
+##****************************************************************************
+
+sub get_dword
+{
+ my $data;
+
+ read(FILE, $data, 4);
+ return unpack("H8", pack("V", unpack("N", $data)));
+}
+
+#*****************************************************************************
+##
+## FUNCTION NAME: calculate_sdram_init
+##
+##****************************************************************************
+
+sub calculate_sdram_init
+{
+ # Refer to ETRAX 100LX Designers Reference for a description of SDRAM
+ # initialization
+ my $sdram_init_val = hex($_[0]);
+ my $sdram_config_val = hex($_[1]);
+ my $bus_width = $sdram_config_val & 0x00800000;
+ my $speed;
+ my $cas_latency;
+ my $mrs_data;
+ my $temp;
+ my $return_value;
+ my $value;
+
+ $mrs_data = ($sdram_init_val & 0x00ff0000) >> 16;
+ $sdram_init_val &= 0x8000ffff; # Make sure mrs data is 0
+ $sdram_init_val |= 0x80000000; # Make sure sdram is enabled
+ $speed = $sdram_init_val & 0x1000;
+ $cas_latency = $sdram_init_val & 0x3;
+ if ($speed) # 100 MHz
+ {
+ $cas_latency += 2;
+ }
+ else # 50 MHz
+ {
+ $cas_latency += 1;
+ }
+
+ # Calculate value of mrs_data
+ # CAS latency = 2 && bus_width = 32 => 0x40
+ # CAS latency = 3 && bus_width = 32 => 0x60
+ # CAS latency = 2 && bus_width = 16 => 0x20
+ # CAS latency = 3 && bus_width = 16 => 0x30
+ if ($mrs_data == 0)
+ {
+ if ($bus_width == 0) # 16 bits
+ {
+ $mrs_data = $cas_latency == 2 ? 0x20 : 0x30;
+ }
+ else # 32 bits
+ {
+ $mrs_data = $cas_latency == 2 ? 0x40 : 0x60;
+ }
+ }
+
+ $temp = $sdram_init_val | 0x0000c000; # Disable refresh
+ $return_value .= &sdram_command($temp);
+ $return_value .= " --pause 20000";
+
+ $return_value .= &sdram_command($temp, $sdram_precharge);
+ $return_value .= &sdram_command($temp, $sdram_nop);
+
+ $return_value .= " --setreg +0 7";
+ $return_value .= " --label label1";
+ $return_value .= &sdram_command($temp, $sdram_refresh);
+ $return_value .= &sdram_command($temp, $sdram_nop);
+ $return_value .= " --loop +0 label1";
+
+ $return_value .= &sdram_command($temp, $sdram_mrs, $mrs_data);
+ $return_value .= &sdram_command($temp, $sdram_nop);
+
+ $return_value .= &sdram_command($sdram_init_val);
+
+ return $return_value;
+}
+
+#*****************************************************************************
+##
+## FUNCTION NAME: sdram_command
+##
+##****************************************************************************
+
+sub sdram_command
+{
+ my($temp, $value, $mrs_data) = @_;
+
+ $value ||= 0;
+ if ($value == $sdram_mrs)
+ {
+ $value = sprintf("%lx", $temp | ($value << 9) | ($mrs_data << 16));
+ }
+ else
+ {
+ $value = sprintf("%lx", $temp | ($value << 9));
+ }
+
+ return " --setreg $sdram_timing_address $value";
+}
+
+#*****************************************************************************
+##
+## FUNCTION NAME: print_help
+##
+##****************************************************************************
+
+sub print_help
+{
+ print "\nAXIS $my_name, ", '$Revision: 1.16 $ $Date: 2004/11/01 16:32:27 $ ', "\n";
+ die <<EOT;
+Copyright (C) 2001-2002 Axis Communications AB
+
+DESCRIPTION:
+ This program is used to boot (and flash) a linux image to a box.
+ It tries to extract the required ETRAX 100 settings from the image file.
+
+SYNTAX:
+ $my_name [options]
+
+OPTIONS:
+ -b <bootfile> : The boot image to use.
+ -d <device> : The network interface to use, default is eth0.
+ -f : Save the image in the flash memory starting at
+ address 0x10000.
+ -F : Save the image in the flash memory starting at
+ address 0.
+ -h : Print this help text.
+ -i <image> : The path and name of the image to use, default
+ is fimage.
+ -o <offset> : The offset in the flash where the flashing starts.
+ -O <offset> : The offset in the image file where the flashing
+ starts from.
+ -p : Print the resulting etrax100boot command instead
+ of executing it.
+ -s <size> : How much to flash (default is the size of the
+ flash minus the offset specified using -o or -f).
+ -S <size> : The size of the flash.
+
+ All sizes and offsets above can be specified as decimal numbers, or as
+ hexadecimal numbers by prefixing them with 0x. It is also possible to use
+ the suffixes k and M to specify kilo (1024) or mega (1048576).
+
+EOT
+}
+
+#****************** END OF FILE boot_linux ***********************************
--- /dev/null
+#
+# Copyright (C) 2006 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+# $Id$
+
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/kernel.mk
+
+PKG_NAME:=e100boot
+PKG_VERSION:=0.1
+PKG_RELEASE:=1
+
+PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)
+
+CRLF_WORKAROUND=1
+
+include $(INCLUDE_DIR)/package.mk
+
+define Build/Compile
+ mkdir -p $(PKG_BUILD_DIR)
+ cp -r ./src/* $(PKG_BUILD_DIR)
+ make -C $(PKG_BUILD_DIR)
+endef
+
+define Build/InstallDev
+ $(INSTALL_BIN) $(PKG_BUILD_DIR)/sbl/e100boot $(BIN_DIR)/etrax100boot
+endef
+
+$(eval $(call Build/DefaultTargets))
--- /dev/null
+Copyright (c) 2004, 2005 Axis Communications AB. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+
+1. Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+3. Neither the name of Axis Communications AB nor the names of its
+ contributors may be used to endorse or promote products derived
+ from this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY AXIS COMMUNCATIONS AB ``AS IS'' AND
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+SUCH DAMAGE.
--- /dev/null
+#
+# Top Makefile for e100boot
+# $Id: Makefile,v 1.20 2003/06/04 12:22:23 pkj Exp $
+#
+
+# Change these paths if necessary. Can also be specified on cmdline as
+# 'make INSTALL_PATH=/foo/bar/'.
+
+INSTALL_NAME = e100boot
+INSTALL_PATH = /usr/local
+INSTALL_PATH_BIN = $(INSTALL_PATH)/bin
+INSTALL_PATH_DOC = $(INSTALL_PATH)/man/man1
+
+DIRS = libpcap-0.4 sbl doc
+
+-include $(AXIS_TOP_DIR)/tools/build/Rules.axis
+ifdef prefix
+INSTALL_PATH = $(prefix)
+endif
+
+INSTALL ?= install
+
+all: conf $(DIRS)
+ @for d in $(DIRS); do \
+ echo -e "\n### Making $$d"; \
+ $(MAKE) -C $$d || exit; \
+ done
+
+conf: $(DIRS)
+ @for d in $(DIRS); do \
+ if [ -x $$d/configure ] && [ ! -e $$d/Makefile ]; then \
+ echo -e "\n### Configuring $$d"; \
+ cd $$d; ./configure ||Â exit; cd ..; \
+ fi; \
+ done
+
+tar: clean
+ @echo -e "\n### Making tarball."
+ tar -C ../ -zcf e100boot.tgz --exclude e100boot.tgz --exclude RCS --exclude CVS e100boot
+
+
+install: all
+ $(INSTALL) -d $(INSTALL_PATH_BIN) $(INSTALL_PATH_DOC)
+ $(INSTALL) sbl/e100boot.stripped $(INSTALL_PATH_BIN)/$(INSTALL_NAME)
+ $(INSTALL) -m 0644 doc/e100boot.1 $(INSTALL_PATH_DOC)/$(INSTALL_NAME).1
+
+install.setuid:
+ @echo -e "\n### Make install.setuid"; \
+ if ! [ -e $(INSTALL_PATH_BIN)/$(INSTALL_NAME) ]; then \
+ echo -e "\n### Binary $(INSTALL_PATH_BIN)/$(INSTALL_NAME) does not exist! Make install first."; \
+ elif [ `id -u` = 0 ]; then \
+ chown root.root $(INSTALL_PATH_BIN)/$(INSTALL_NAME); \
+ chmod +s $(INSTALL_PATH_BIN)/$(INSTALL_NAME); \
+ else \
+ echo "### You must do this as root!"; \
+ fi
+
+clean:
+ @for d in $(DIRS); do \
+ if [ -e $$d/Makefile ]; then \
+ echo -e "\n### Cleaning $$d"; \
+ $(MAKE) -C $$d clean || exit; \
+ fi; \
+ done
+
+configsubs: conf configsubs-dirs
+
+configsubs-dirs:
+ $(MAKE) -C libpcap-0.4 configsubs
+ $(MAKE) -C sbl configsubs
--- /dev/null
+#
+# Makefile to generate .ima files for e100boot
+#
+# Hacked by ronny, rehacked by ronny
+#
+# $Id: Makefile,v 1.26 2003/03/13 14:18:31 cii Exp $
+#
+
+DIRS := net net_noleds ser ser_noleds
+
+all: $(DIRS)
+ @for d in $(DIRS); do \
+ echo -e "\n### Making $$d"; \
+ make -C $$d || exit; \
+ done
+ @echo "***************************************************************"
+ @./free_size
+ @echo "***************************************************************"
+
+clean:
+ rm -f *.ima
+ @for d in $(DIRS); do \
+ echo -e "\n### Cleaning $$d"; \
+ make -C $$d clean || exit; \
+ done;
--- /dev/null
+#!/bin/sh
+#
+# Calculates the size left in ETRAX cache when bootloader is loaded.
+#
+
+BOOT_FILE=`dirname $0`/net/net.out
+HEADER_FILE=`dirname $0`/src/e100boot.h
+
+for FILE in $BOOT_FILE $HEADER_FILE; do
+ if [ ! -f $FILE ]; then
+ echo "Could not find the file \"$FILE\"!"
+ exit 1
+ fi
+done
+
+# The cache size is given in hex
+CACHE_SIZE=2000
+
+BSS_SIZE=`nm-cris $BOOT_FILE | grep Ebss | cut -d ' ' -f 1 | tr a-f A-F`
+
+TEXT_SIZE=`nm-cris $BOOT_FILE | grep Stext | cut -d ' ' -f 1 | tr a-f A-F`
+
+IO_BUF_END=`grep IO_BUF_END $HEADER_FILE | awk '{ print $3 }' | \
+ cut -d x -f 2 | tr a-f A-F`
+
+IO_BUF_START=`grep IO_BUF_START $HEADER_FILE | awk '{ print $3 }' | \
+ cut -d x -f 2 | tr a-f A-F`
+
+FREE_SIZE=`echo "ibase=16 ; \
+ $CACHE_SIZE - \
+ ($BSS_SIZE - $TEXT_SIZE + $IO_BUF_END - $IO_BUF_START)" | \
+ bc`
+
+echo "Free cache size when cbl is loaded will be:"
+echo -e "\t$FREE_SIZE bytes - size of stack"
+
+if [ $FREE_SIZE -lt 0 ]; then
+ echo "Bootloader is too large! You will have to do some optimizing..."
+ exit 1
+fi
+
+exit 0
--- /dev/null
+#
+# $Id: Makefile,v 1.1 2002/07/01 14:36:40 pkj Exp $
+#
+
+IMAGE := net.ima
+include ../rules.cbl
--- /dev/null
+common.o: ../src/common.c ../src/hwregs.h ../src/compiler.h \
+ ../src/debug.h ../src/project.h ../src/hwregs_def.h ../src/hwregs_int.h \
+ ../src/e100boot.h
--- /dev/null
+common_init.o: ../src/common_init.c ../src/hwregs.h ../src/compiler.h \
+ ../src/debug.h ../src/project.h ../src/hwregs_def.h ../src/hwregs_int.h \
+ ../src/e100boot.h
--- /dev/null
+crt0.o: ../src/crt0.S
--- /dev/null
+char e100boot_version[] = "This bootloader was built by root on Wed May 16 21:31:41 CEST 2007.\r\n";
--- /dev/null
+e100boot_version.o: e100boot_version.c
--- /dev/null
+flash.o: ../src/flash.c ../src/e100boot.h ../src/compiler.h
--- /dev/null
+hwregs.o: ../src/hwregs.c ../src/compiler.h ../src/hwregs.h \
+ ../src/debug.h ../src/project.h ../src/hwregs_def.h ../src/hwregs_int.h
--- /dev/null
+net_init.o: ../src/net_init.c ../src/sv_addr_ag.h ../src/sv_addr.agh \
+ ../src/e100boot.h ../src/compiler.h
--- /dev/null
+#
+# $Id: Makefile,v 1.1 2002/07/01 14:36:51 pkj Exp $
+#
+
+IMAGE := net_noleds.ima
+include ../rules.cbl
--- /dev/null
+common.o: ../src/common.c ../src/hwregs.h ../src/compiler.h \
+ ../src/debug.h ../src/project.h ../src/hwregs_def.h ../src/hwregs_int.h \
+ ../src/e100boot.h
--- /dev/null
+common_init.o: ../src/common_init.c ../src/hwregs.h ../src/compiler.h \
+ ../src/debug.h ../src/project.h ../src/hwregs_def.h ../src/hwregs_int.h \
+ ../src/e100boot.h
--- /dev/null
+crt0.o: ../src/crt0.S
--- /dev/null
+char e100boot_version[] = "This bootloader was built by root on Wed May 16 21:31:43 CEST 2007.\r\n";
--- /dev/null
+e100boot_version.o: e100boot_version.c
--- /dev/null
+flash.o: ../src/flash.c ../src/e100boot.h ../src/compiler.h
--- /dev/null
+hwregs.o: ../src/hwregs.c ../src/compiler.h ../src/hwregs.h \
+ ../src/debug.h ../src/project.h ../src/hwregs_def.h ../src/hwregs_int.h
--- /dev/null
+net_init.o: ../src/net_init.c ../src/sv_addr_ag.h ../src/sv_addr.agh \
+ ../src/e100boot.h ../src/compiler.h
--- /dev/null
+#
+# $Id: rules.cbl,v 1.4 2005/04/20 11:18:54 starvik Exp $
+#
+
+VPATH := .:../src
+
+ifeq ($(findstring _noleds,$(IMAGE)),_noleds)
+USE_LEDS := 0
+else
+USE_LEDS := 1
+endif
+
+MAKEFLAGS := r
+INCS := -I.
+DEFS := -DUSE_LEDS=$(USE_LEDS)
+CFLAGS := -Os -Wall -Wmissing-prototypes -W -Wa,-N -nostdinc $(INCS) $(DEFS) -MMD
+ASFLAGS := $(CFLAGS)
+LNFLAGS := -Wl,--section-start,.startup=0x380000f0 -nostdlib -Os -Wl,-T../src/ldscript
+CC := cris-axis-elf-gcc
+
+OUT := $(patsubst %.ima,%.out,$(IMAGE))
+
+OBJS = crt0.o common_init.o
+ifeq ($(findstring net,$(IMAGE)),net)
+OBJS += net_init.o
+else
+OBJS += ser_init.o
+endif
+OBJS += common.o flash.o hwregs.o e100boot_version.o
+
+all: ../$(IMAGE)
+
+$(OUT): $(OBJS) ldscript
+ $(CC) -o $@ $(LNFLAGS) $(OBJS)
+
+../%.ima: %.out
+ bin-cris -o $@ $<
+ @find $@ -printf '# Size of image $@ is %s bytes.\n\n'
+
+$(OBJS): ../rules.cbl Makefile
+
+# We don't want this to be a dummy and be recreated every time we build,
+# only after a make clean
+e100boot_version.c:
+ @echo "Generating version file....."
+ @echo 'char e100boot_version[] = "This bootloader was built by '`id -u -n`' on '`date`'.\r\n";' > $@
+
+dummy:
+
+clean:
+ rm -rf *.o *.d *.out *.ima deps e100boot_version.c
+
+ifneq ($(MAKECMDGOALS),clean)
+-include *.d
+endif
--- /dev/null
+#
+# $Id: Makefile,v 1.1 2002/07/01 14:37:01 pkj Exp $
+#
+
+IMAGE := ser.ima
+include ../rules.cbl
--- /dev/null
+common.o: ../src/common.c ../src/hwregs.h ../src/compiler.h \
+ ../src/debug.h ../src/project.h ../src/hwregs_def.h ../src/hwregs_int.h \
+ ../src/e100boot.h
--- /dev/null
+common_init.o: ../src/common_init.c ../src/hwregs.h ../src/compiler.h \
+ ../src/debug.h ../src/project.h ../src/hwregs_def.h ../src/hwregs_int.h \
+ ../src/e100boot.h
--- /dev/null
+crt0.o: ../src/crt0.S
--- /dev/null
+char e100boot_version[] = "This bootloader was built by root on Wed May 16 21:31:44 CEST 2007.\r\n";
--- /dev/null
+e100boot_version.o: e100boot_version.c
--- /dev/null
+flash.o: ../src/flash.c ../src/e100boot.h ../src/compiler.h
--- /dev/null
+hwregs.o: ../src/hwregs.c ../src/compiler.h ../src/hwregs.h \
+ ../src/debug.h ../src/project.h ../src/hwregs_def.h ../src/hwregs_int.h
--- /dev/null
+ser_init.o: ../src/ser_init.c ../src/hwregs.h ../src/compiler.h \
+ ../src/debug.h ../src/project.h ../src/hwregs_def.h ../src/hwregs_int.h \
+ ../src/sv_addr_ag.h ../src/sv_addr.agh ../src/e100boot.h
--- /dev/null
+#
+# $Id: Makefile,v 1.1 2002/07/01 14:37:10 pkj Exp $
+#
+
+IMAGE := ser_noleds.ima
+include ../rules.cbl
--- /dev/null
+common.o: ../src/common.c ../src/hwregs.h ../src/compiler.h \
+ ../src/debug.h ../src/project.h ../src/hwregs_def.h ../src/hwregs_int.h \
+ ../src/e100boot.h
--- /dev/null
+common_init.o: ../src/common_init.c ../src/hwregs.h ../src/compiler.h \
+ ../src/debug.h ../src/project.h ../src/hwregs_def.h ../src/hwregs_int.h \
+ ../src/e100boot.h
--- /dev/null
+crt0.o: ../src/crt0.S
--- /dev/null
+char e100boot_version[] = "This bootloader was built by root on Wed May 16 21:31:46 CEST 2007.\r\n";
--- /dev/null
+e100boot_version.o: e100boot_version.c
--- /dev/null
+flash.o: ../src/flash.c ../src/e100boot.h ../src/compiler.h
--- /dev/null
+hwregs.o: ../src/hwregs.c ../src/compiler.h ../src/hwregs.h \
+ ../src/debug.h ../src/project.h ../src/hwregs_def.h ../src/hwregs_int.h
--- /dev/null
+ser_init.o: ../src/ser_init.c ../src/hwregs.h ../src/compiler.h \
+ ../src/debug.h ../src/project.h ../src/hwregs_def.h ../src/hwregs_int.h \
+ ../src/sv_addr_ag.h ../src/sv_addr.agh ../src/e100boot.h
--- /dev/null
+#include "hwregs.h"
+#include "e100boot.h"
+
+static void toggle_led(void);
+
+static void read_load_info(void);
+static void decode_load_info(void);
+
+static void read_file(byte* addr, udword size);
+
+#if USE_PRINT_DESCR
+static void print_descr(dma_descr_T *d);
+#endif
+
+static int memory_test(udword addr, udword size, udword *failed_address);
+static void memory_dump(udword *from, udword *to);
+
+extern byte _Stext[];
+extern byte _Edata[];
+
+#ifdef USE_BAUDRATE_CHANGING
+byte change_baudrate;
+udword new_baudrate;
+#endif
+
+void
+level2_boot(void)
+{
+#if USE_LEDS
+ REG_SET(R_PORT_PA_DATA, data_out, 0xaa);
+#endif
+
+#if 0
+ io_buf_next = (byte*)IO_BUF_START;
+ io_buf_cur = (byte*)IO_BUF_START;
+#endif
+
+#if 1
+ send_string("\r\n\r\nDevice ID = ");
+ send_hex(ntohl(tx_header.id), NL);
+ send_string(e100boot_version);
+#endif
+
+#if 1
+ {
+ udword sum = 0;
+ byte *b;
+
+ for (b = (byte*)_Stext; b != (byte*)_Edata; b++) {
+ sum += *b;
+ }
+ send_string("Checksum of bootloader is ");
+ send_hex(sum, NL);
+ }
+#endif
+
+ read_load_info();
+
+ __asm__ volatile ("jump _start");
+}
+
+void
+toggle_led(void)
+{
+#if USE_LEDS
+ REG_SET(R_PORT_PA_DATA, data_out, 0x55);
+
+ while (1) {
+ REG_SET(R_PORT_PA_DATA, data_out, ~REG_GET(R_PORT_PA_READ, data_in));
+ {
+ volatile udword i;
+
+ for (i = 0; i != 2000000; i++)
+ ;
+ }
+ }
+#else
+ while (1) {
+ }
+#endif
+}
+
+void
+read_load_info(void)
+{
+#ifdef USE_BAUDRATE_CHANGING
+ change_baudrate = 0;
+#endif
+
+ send_string("Waiting for load info.\r\n");
+
+ send_ack();
+
+ read_file((byte*)IO_BUF_START, IO_BUF_END - IO_BUF_START - CRC_LEN);
+ send_string("Got load info.\r\n");
+ decode_load_info();
+
+#ifdef USE_BAUDRATE_CHANGING
+ if (change_baudrate) {
+ REG_WR(R_SERIAL0_BAUD, new_baudrate);
+ {
+ udword i = 0;
+
+ while (i++ < 1000000)
+ ;
+ }
+ send_ack();
+ }
+#endif
+
+ toggle_led();
+}
+
+void
+decode_load_info(void)
+{
+ udword *type_p = (udword*)IO_BUF_START;
+ udword failed_address;
+ udword i;
+ command_T *cmd;
+
+ while (type_p != (udword*)(IO_BUF_END - CRC_LEN)) { /* !!! */
+// send_hex(type_p, NL);
+ *type_p = ntohl(*type_p);
+// send_hex(*type_p, NL);
+ type_p++;
+ }
+
+// memory_dump(IO_BUF_START, IO_BUF_END);
+
+ cmd = (command_T*)IO_BUF_START;
+ while (cmd->type) {
+ switch (cmd->type) {
+ case PACKET_INFO:
+ send_string("PACKET_INFO\r\n");
+ send_hex(cmd->args.packet_info.addr, NL);
+ send_hex(cmd->args.packet_info.size, NL);
+
+ seq--;
+ send_ack();
+ seq++;
+
+ read_file((byte*)cmd->args.packet_info.addr, cmd->args.packet_info.size);
+
+ (byte*)cmd += sizeof cmd->type + sizeof cmd->args.packet_info;
+ break;
+
+ case SET_REGISTER:
+ send_string("SET_REGISTER\r\n");
+ send_hex(cmd->args.set_register.addr, NL);
+ send_hex(cmd->args.set_register.val, NL);
+
+ *(udword*)cmd->args.set_register.addr = cmd->args.set_register.val;
+
+ (byte*)cmd += sizeof cmd->type + sizeof cmd->args.set_register;
+ break;
+
+ case GET_REGISTER:
+ send_string("GET_REGISTER\r\n");
+ send_hex(cmd->args.get_register.addr, NL);
+ send_hex(*(udword*)cmd->args.get_register.addr, NL);
+
+ (byte*)cmd += sizeof cmd->type + sizeof cmd->args.get_register;
+ break;
+
+ case PAUSE_LOOP:
+ send_string("PAUSE_LOOP\r\n");
+ send_hex(cmd->args.pause_loop.pause, NL);
+
+ for (i = cmd->args.pause_loop.pause; i; i--)
+ ;
+
+ (byte*)cmd += sizeof cmd->type + sizeof cmd->args.pause_loop;
+ break;
+
+ case MEM_VERIFY:
+ send_string("MEM_VERIFY\r\n");
+ send_hex(cmd->args.mem_verify.addr, NL);
+ send_hex(cmd->args.mem_verify.val, NL);
+
+ if (*(udword*)cmd->args.mem_verify.addr != cmd->args.mem_verify.val) {
+ send_string("verify failed\r\n");
+ goto decode_failed;
+ }
+
+ (byte*)cmd += sizeof cmd->type + sizeof cmd->args.mem_verify;
+ break;
+
+ case MEM_TEST:
+ send_string("MEM_TEST\r\n");
+ send_hex(cmd->args.mem_test.from, NL);
+ send_hex(cmd->args.mem_test.to, NL);
+
+ if (!memory_test(cmd->args.mem_test.from,
+ cmd->args.mem_test.to,
+ &failed_address)) {
+ send_string("### Memory test failed at ");
+ send_hex(failed_address, NL);
+ memory_dump((udword*)DWORD_ALIGN(failed_address - 64),
+ (udword*)DWORD_ALIGN(failed_address + 64));
+ goto decode_failed;
+ }
+ send_string("Passed memory test.\r\n");
+
+ (byte*)cmd += sizeof cmd->type + sizeof cmd->args.mem_test;
+ break;
+
+ case MEM_DUMP:
+ send_string("MEM_DUMP\r\n");
+ send_hex(cmd->args.mem_dump.from_addr, NL);
+ send_hex(cmd->args.mem_dump.to_addr, NL);
+
+ memory_dump((udword*)cmd->args.mem_dump.from_addr,
+ (udword*)cmd->args.mem_dump.to_addr);
+
+ (byte*)cmd += sizeof cmd->type + sizeof cmd->args.mem_dump;
+ break;
+
+ case MEM_CLEAR:
+ send_string("MEM_CLEAR\r\n");
+ send_hex(cmd->args.mem_clear.from_addr, NL);
+ send_hex(cmd->args.mem_clear.to_addr, NL);
+
+ for (i = cmd->args.mem_clear.from_addr;
+ i <= cmd->args.mem_clear.to_addr;
+ i++) {
+ *(byte*)i = 0x00;
+ }
+
+ (byte*)cmd += sizeof cmd->type + sizeof cmd->args.mem_clear;
+ break;
+
+ case FLASH:
+ send_string("FLASH\r\n");
+ send_hex((udword)cmd->args.flash.source, NL);
+ send_hex(cmd->args.flash.offset, NL);
+ send_hex(cmd->args.flash.size, NL);
+
+ if ((i = flash_write(cmd->args.flash.source,
+ cmd->args.flash.offset,
+ cmd->args.flash.size)) != ERR_FLASH_OK) {
+ if (i == ERR_FLASH_VERIFY) {
+ udword size =
+ (cmd->args.flash.size < 65536 ? cmd->args.flash.size : 65536);
+
+ /* Try to erase the first block(s) we tried to flash to prevent a
+ unit which failed to flash correctly from booting */
+ flash_write(NULL, cmd->args.flash.offset, size);
+ }
+
+ goto decode_failed;
+ }
+
+ (byte*)cmd += sizeof cmd->type + sizeof cmd->args.flash;
+ break;
+
+ case JUMP:
+#if 1
+ /* for the printf function in our libc */
+ REG_WR(R_DMA_CH8_FIRST, *(udword*)&tx_header.dest[0]);
+ REG_WR(R_DMA_CH9_FIRST, *(uword*)&tx_header.dest[4]);
+// REG_WR(R_NETWORK_SA_1, &tx_header.dest[4]);
+// REG_WR(R_NETWORK_SA_2, tx_header.id);
+#endif
+ send_string("JUMP\r\n");
+ send_hex(cmd->args.jump.addr, NL);
+ send_string("END\r\n");
+
+ __asm__ volatile ("jump %0" :: "r" (cmd->args.jump.addr));
+
+ (byte*)cmd += sizeof cmd->type + sizeof cmd->args.jump;
+ break;
+
+ case LOOP:
+ send_string("LOOP\r\n");
+ send_hex(cmd->args.bne.addr, NL);
+ send_hex(cmd->args.bne.target, NL);
+
+ if (*(udword*)cmd->args.bne.addr) {
+ (*(udword*)cmd->args.bne.addr)--;
+ (byte*)cmd = cmd->args.bne.target;
+ }
+ else {
+ (byte*)cmd += sizeof cmd->type + sizeof cmd->args.bne;
+ }
+ break;
+
+#ifdef USE_BAUDRATE_CHANGING
+ case BAUDRATE:
+ send_string("BAUDRATE\r\n");
+ send_hex(cmd->args.br.baudrate, NL);
+
+ new_baudrate = cmd->args.br.baudrate;
+
+ (byte*)cmd += sizeof cmd->type + sizeof cmd->args.br;
+ break;
+#endif
+
+ default:
+ send_string("### Unknown type: ");
+ send_hex(cmd->type, NL);
+
+ goto decode_failed;
+ break;
+ }
+ }
+
+decode_failed:
+ send_string("END\r\n");
+}
+
+void
+read_file(byte* addr, udword size)
+{
+ udword nbr_read_last;
+ udword sum;
+ byte *b;
+ byte *from;
+
+/* send_string(">read_file\r\n"); */
+
+ nbr_read = 0;
+ nbr_read_last = 0;
+ target_address = (udword)addr;
+
+ if (interface == NETWORK) {
+ rx_descr2.buf = (udword)addr;
+ bytes_to_read = size;
+ rx_descr2.sw_len = size + CRC_LEN > 1500 ? 1500 : size + CRC_LEN;
+/* rx_descr2.sw_len = 1500; */
+
+ REG_SET(R_DMA_CH1_FIRST, first, (udword)&rx_descr);
+
+ /* Restart receiver so descriptor is re-read. */
+ REG_SET(R_DMA_CH1_CMD, cmd, reset);
+ while (REG_EQL(R_DMA_CH1_CMD, cmd, reset)) {
+ }
+
+ REG_SET(R_DMA_CH1_CMD, cmd, start);
+
+ while (1) {
+/* send_hex(rx_descr2.hw_len, NL); */
+ from = (byte*)rx_descr2.buf;
+ if (read_data()) {
+ if (nbr_read < size) {
+ REG_SET(R_DMA_CH1_CMD, cmd, start);
+ }
+
+#if USE_PRINT_DESCR
+ print_descr(&rx_descr);
+ print_descr(&rx_descr2);
+#endif
+
+#if 0
+ send_string("Read ");
+ send_hex(rx_descr2.hw_len - CRC_LEN, NO_NL);
+ send_string(" bytes. ");
+ send_hex((udword)from, NO_NL);
+ send_string(" - ");
+ send_hex(rx_descr2.buf-1, NO_NL);
+ send_string(" (");
+ send_hex(nbr_read, NO_NL);
+ send_string("/");
+ send_hex(size, NO_NL);
+ send_string(")\r\n");
+#endif
+
+ nbr_read_last = nbr_read;
+/* from = (byte*)rx_descr2.buf; */
+
+ if (nbr_read >= size) {
+ break;
+ }
+ }
+ }
+ }
+ else { /* interface != NETWORK */
+ while (nbr_read < size) {
+ read_data();
+ }
+ }
+
+ sum = 0;
+ for (b = addr; b != (byte*)(addr+size); b++) {
+ sum += *b;
+ }
+ send_string("Checksum of file is ");
+ send_hex(sum, NL);
+
+/* memory_dump((udword*)addr, (udword*)addr+size); */
+/* send_string("<read_file\r\n"); */
+}
+
+#if USE_PRINT_DESCR
+void
+print_descr(dma_descr_T *d)
+{
+ send_string("Descriptor at ");
+ send_hex((udword)d, NL);
+
+ send_string("ctrl : ");
+ send_hex(d->ctrl, NL);
+
+ send_string("sw_len : ");
+ send_hex(d->sw_len, NL);
+
+ send_string("next : ");
+ send_hex(d->next, NL);
+
+ send_string("buf : ");
+ send_hex(d->buf, NL);
+
+ send_string("status : ");
+ send_hex(d->status, NL);
+
+ send_string("hw_len : ");
+ send_hex(d->hw_len, NL);
+}
+#endif
+
+int
+memory_test(udword from, udword to, udword *failed_address)
+{
+ udword i;
+ udword j;
+ byte b;
+
+ /* At each dword (but bytewise) write the inverse of the adress,
+ check that it worked, then write the inverse of the last byte
+ written. Exit on fail. The memory after a successfull test will
+ be:
+
+ 0xC0000000 : 0xC0000000 0xC0000004 0xC0000008 0xC000000C
+ 0xC0000010 : 0xC0000010 0xC0000014 0xC0000018 0xC000001C
+ */
+
+ for (i = from; i < to; i += 4) {
+ for (j = 0; (j != sizeof(udword)) && (i+j < to); j++) {
+ b = ((~i) >> (j*8)) & 0xff;
+ *(volatile byte*)(i+j) = b;
+ if (*(volatile byte*)(i+j) == b) {
+ *(volatile byte*)(i+j) = ~b;
+ }
+ else {
+ *failed_address = i+j;
+ send_string("### Memory test 1 failed at ");
+ send_hex(*failed_address, NL);
+ return FALSE;
+ }
+ }
+ }
+
+ /* Run through entire region, check bytewise that the dwords contain
+ the address to the dword. Exit on fail. */
+
+ for (i = from; i < to; i += 4) {
+ for (j = 0; (j != sizeof(udword)) && (i+j < to); j++) {
+ b = (i >> (j*8)) & 0xff;
+ if (*(volatile byte*)(i+j) != b) {
+ *failed_address = i+j;
+ send_string("### Memory test 2 failed at ");
+ send_hex(*failed_address, NL);
+ return FALSE;
+ }
+ }
+ }
+
+ return TRUE;
+}
+
+void
+memory_dump(udword *from, udword *to)
+{
+ udword *i = from;
+ int j;
+
+ for (; i <= to; i += 4) {
+ send_hex((udword)i, NO_NL);
+ send_string(" :");
+ for(j = 0; j != 4 && (i+j <= to); j++) {
+ send_string(" ");
+ send_hex(*(udword*)(i+j), NO_NL);
+ }
+ send_string("\r\n");
+ }
+}
--- /dev/null
+/*****************************************************************************
+*!
+*! FILE NAME : common_init.c
+*!
+*! DESCRIPTION: This piece of code is loaded at bootstrap and is put in the
+*! cache at 0x380000F0. Depending of how R_BUS_STATUS<2:1> is
+*! set different kinds of bootstrap is performed.
+*!
+*! 00 - Normal boot. No bootstrap is performed and this code
+*! is never loaded.
+*! 01 - Serial boot. 784 bytes is loaded and execution starts
+*! at 0x380000F0.
+*! 11 - Parallel boot. 784 bytes is loaded and execution starts
+*! at 0x380000F0.
+*! 10 - Network boot. 1484 bytes is loaded and execution start
+*! at 0x380000F4.
+*!
+*! ---------------------------------------------------------------------------
+*! HISTORY
+*!
+*! DATE NAME CHANGES
+*! ---- ---- -------
+*! 980326 Ronny Ranerup Initial version
+*! Sep 20 1999 Jonas Dellenvall Added port3 debug support
+*! 20020206 ronny Yeah, and I removed it again...
+*!
+*! ---------------------------------------------------------------------------
+*! (C) Copyright 1998-2002, Axis Communications AB, LUND, SWEDEN
+*!***************************************************************************/
+
+/*
+
+ Misc notes:
+
+ It is very important to keep this file short. This and the boot
+ interface specific parts must fit into the first boot packet.
+
+*/
+
+/****************** INCLUDE FILES SECTION ***********************************/
+
+#include "hwregs.h"
+#include "e100boot.h"
+
+/****************** CONSTANT AND MACRO SECTION ******************************/
+
+/****************** TYPE DEFINITION SECTION *********************************/
+
+/****************** LOCAL FUNCTION DECLARATION SECTION **********************/
+
+static int timeout(void);
+
+/****************** GLOBAL VARIABLE DECLARATION SECTION *********************/
+
+udword nbr_read; /* How many bytes has been read from current file */
+byte interface; /* Which I/O interface is the current one */
+byte set_dest; /* Have we set the destination address in tx_header */
+udword last_timeout;
+
+struct packet_header_T tx_header;
+dma_descr_T tx_descr; /* For packet header */
+dma_descr_T tx_descr2; /* packet data */
+
+struct packet_header_T rx_header;
+dma_descr_T rx_descr; /* For packet header */
+dma_descr_T rx_descr2; /* packet data */
+
+udword seq; /* Sequence number of next wanted packet */
+byte serial_up;
+
+/****************** LOCAL VARIABLE DECLARATION SECTION **********************/
+
+/****************** FUNCTION DEFINITION SECTION *****************************/
+
+void
+crt1(void)
+{
+ /* Do this only once so we don't reset the timers and destroy the 32
+ bit timer-register used as random number generator */
+
+ REG_SET__R_TIMER_CTRL(
+ timerdiv1, 0,
+ timerdiv0, 0,
+ presc_timer1, normal,
+ i1, clr,
+ tm1, run,
+ clksel1, cascade0,
+ presc_ext, prescale,
+ i0, clr,
+ tm0, run,
+ clksel0, c9600Hz);
+
+ REG_SET__R_TIMER_CTRL(
+ timerdiv1, 0,
+ timerdiv0, 0,
+ presc_timer1, normal,
+ i1, nop,
+ tm1, run,
+ clksel1, cascade0,
+ presc_ext, prescale,
+ i0, nop,
+ tm0, run,
+ clksel0, c9600Hz);
+
+ start();
+}
+
+void
+start(void)
+{
+#if USE_LEDS
+ REG_SET__R_PORT_PA_DIR(
+ dir7, output,
+ dir6, output,
+ dir5, output,
+ dir4, output,
+ dir3, output,
+ dir2, output,
+ dir1, output,
+ dir0, input); /* not for prodtest */
+
+ REG_SET__R_PORT_PA_DATA(data_out, 0);
+
+ REG_SET__R_PORT_PB_DIR(
+ dir7, output,
+ dir6, output,
+ dir5, output,
+ dir4, output,
+ dir3, output,
+ dir2, output,
+ dir1, output,
+ dir0, output);
+
+ REG_SET__R_PORT_PB_DATA(data_out, 0xff);
+#endif
+
+ /* We must initialize all (global) variables here, since the .data
+ and .bss area are used before they are loaded. */
+
+ //serial_up = FALSE;
+ nbr_read = 0;
+
+ /* Get a random value to use as id. */
+ tx_header.id = htonl(REG_RD(R_TIMER_DATA));
+
+ /* timer01 is used as timer. */
+ last_timeout = REG_GET(R_TIMER01_DATA, count);
+
+ interface = REG_GET(R_BUS_STATUS, boot) - 1; /* 0,1,2 */
+ rx_descr2.status = 0;
+
+ /* Initialize the boot interface */
+ init_interface();
+ send_ack(); /* Ack the first bootpacket, i.e. this code. seq 0. */
+
+ while (1) {
+ if (read_data()) {
+ if (nbr_read >= (udword)bytes_to_read) {
+ break;
+ }
+ else if (interface == NETWORK) {
+ REG_SET(R_DMA_CH1_CMD, cmd, start);
+ }
+ }
+ }
+
+#if USE_LEDS
+ REG_SET(R_PORT_PA_DATA, data_out, 0x55);
+#endif
+
+ level2_boot();
+}
+
+int
+read_data(void)
+{
+ if (handle_read()) {
+ return TRUE;
+ }
+
+ if (timeout()) {
+ send_ack();
+ }
+
+ return FALSE;
+}
+
+int
+timeout(void)
+{
+ volatile int now = REG_GET(R_TIMER01_DATA, count);
+ int elapsed;
+ int wait_time = 9600;
+
+ elapsed = last_timeout - now;
+
+ if (elapsed < 0) {
+ elapsed = -elapsed;
+ }
+
+ if (elapsed > wait_time) {
+ last_timeout = now;
+ return TRUE;
+ }
+
+ return FALSE;
+}
+
+/****************** END OF FILE common_init.c *******************************/
--- /dev/null
+#ifndef _COMPILER_H
+#define _COMPILER_H
+
+typedef int dword;
+typedef unsigned int udword;
+typedef signed short word;
+typedef unsigned short uword;
+typedef unsigned char byte;
+
+#endif
--- /dev/null
+ .global crt0 ; Needed because of a bug in binutils
+ .global _target_address
+ .global _bytes_to_read
+
+ .section .startup, "ax"
+
+ nop
+ nop
+
+
+crt0:
+ move.d 0x38001f00, sp
+ jump _crt1
+
+_bytes_to_read: .dword 0x12345678
+_target_address: .dword 0x87654321
+
--- /dev/null
+/* $Id: e100boot.h,v 1.9 2003/12/16 09:04:07 magnusmn Exp $ */
+
+#include "compiler.h"
+
+#define DMA_DESCR__out_priority__BITNR 5
+#define DMA_DESCR__out_priority__WIDTH 1
+#define DMA_DESCR__out_priority__normal 0
+#define DMA_DESCR__out_priority__high 1
+
+#define DMA_DESCR__ecp_cmd__BITNR 4
+#define DMA_DESCR__ecp_cmd__WIDTH 1
+#define DMA_DESCR__ecp_cmd__normal 0
+#define DMA_DESCR__ecp_cmd__high 1
+
+#define DMA_DESCR__tx_err__BITNR 4
+#define DMA_DESCR__tx_err__WIDTH 1
+#define DMA_DESCR__tx_err__enable 1
+#define DMA_DESCR__tx_err__disable 0
+
+#define DMA_DESCR__intr__BITNR 3
+#define DMA_DESCR__intr__WIDTH 1
+#define DMA_DESCR__intr__enable 1
+#define DMA_DESCR__intr__disable 0
+
+#define DMA_DESCR__wait__BITNR 2
+#define DMA_DESCR__wait__WIDTH 1
+#define DMA_DESCR__wait__enable 1
+#define DMA_DESCR__wait__disable 0
+
+#define DMA_DESCR__eop__BITNR 1
+#define DMA_DESCR__eop__WIDTH 1
+#define DMA_DESCR__eop__enable 1
+#define DMA_DESCR__eop__disable 0
+
+#define DMA_DESCR__eol__BITNR 0
+#define DMA_DESCR__eol__WIDTH 1
+#define DMA_DESCR__eol__enable 1
+#define DMA_DESCR__eol__disable 0
+
+#define DMA_DESCR__sw_len__BITNR 0
+#define DMA_DESCR__sw_len__WIDTH 16
+
+#define DMA_DESCR__next__BITNR 0
+#define DMA_DESCR__next__WIDTH 32
+
+#define DMA_DESCR__buf__BITNR 0
+#define DMA_DESCR__buf__WIDTH 32
+
+#define DMA_DESCR__fifo_len__BITNR 8
+#define DMA_DESCR__fifo_len__WIDTH 7
+
+#define DMA_DESCR__crc_err__BITNR 7
+#define DMA_DESCR__crc_err__WIDTH 1
+#define DMA_DESCR__crc_err__enable 1
+#define DMA_DESCR__crc_err__disable 0
+
+#define DMA_DESCR__align_err__BITNR 6
+#define DMA_DESCR__align_err__WIDTH 1
+#define DMA_DESCR__align_err__enable 1
+#define DMA_DESCR__align_err__disable 0
+
+#define DMA_DESCR__in_priority__BITNR 5
+#define DMA_DESCR__in_priority__WIDTH 1
+#define DMA_DESCR__in_priority__high 1
+#define DMA_DESCR__in_priority__normal 0
+
+#define DMA_DESCR__stop__BITNR 4
+#define DMA_DESCR__stop__WIDTH 1
+
+#define DMA_DESCR__rd_eop__BITNR 1
+#define DMA_DESCR__rd_eop__WIDTH 1
+
+#define DMA_DESCR__hw_len__BITNR 0
+#define DMA_DESCR__hw_len__WIDTH 16
+
+#define SET_ETHER_ADDR(a0_0,a0_1,a0_2,a0_3,a0_4,a0_5,a1_0,a1_1,a1_2,a1_3,a1_4,a1_5) \
+ *R_NETWORK_SA_0 = a0_0 | (a0_1 << 8) | (a0_2 << 16) | (a0_3 << 24); \
+ *R_NETWORK_SA_1 = a0_4 | (a0_5 << 8) | (a1_0 << 16) | (a1_1 << 24); \
+ *R_NETWORK_SA_2 = a1_2 | (a1_3 << 8) | (a1_4 << 16) | (a1_5 << 24);
+
+#define DWORD_ALIGN(x) ((x) & 0xfffffffc)
+
+#define CRC_LEN 4
+
+#define TRUE 1
+#define FALSE 0
+
+#define NL 1
+#define NO_NL 0
+
+#define SERIAL 0
+#define NETWORK 1
+#define PARALLEL 2
+
+#define STRING 0
+#define INT 1
+#define ACK 2
+#define BOOT_PACKET 3
+#define BOOT_CMDS 4
+#define NET_INT 5
+#define NET_INT_NL 6
+
+#define JUMP 1
+#define MEM_TEST 2
+#define PACKET_INFO 3
+#define SET_REGISTER 4
+#define GET_REGISTER 5
+#define MEM_DUMP 6
+#define MEM_CLEAR 7
+#define MEM_VERIFY 8
+#define FLASH 9
+#define PAUSE_LOOP 10
+#define LOOP 11
+#define BAUDRATE 12
+
+#define ERR_FLASH_OK 0
+#define ERR_FLASH_NONE 1
+#define ERR_FLASH_TOO_SMALL 2
+#define ERR_FLASH_VERIFY 3
+#define ERR_FLASH_ERASE 4
+
+#define TIMEOUT_LIMIT ( ((6250 * 1000) / 0xffff) / 2)
+
+#define TX_CTRL_EOP \
+(IO_STATE(DMA_DESCR, intr, disable) |\
+ IO_STATE(DMA_DESCR, wait, enable) |\
+ IO_STATE(DMA_DESCR, eop, enable) |\
+ IO_STATE(DMA_DESCR, eol, enable))
+
+#define TX_CTRL \
+ (IO_STATE(DMA_DESCR, intr, disable) |\
+ IO_STATE(DMA_DESCR, wait, disable) |\
+ IO_STATE(DMA_DESCR, eop, disable) |\
+ IO_STATE(DMA_DESCR, eol, disable))
+
+#define LOAD_ADDRESS 0x38001000
+#define SIZEOF_BOOT_LEVEL_1 2048
+
+/* This is where the commands are transfered to. */
+#define IO_BUF_START 0x38001f00
+#define IO_BUF_END 0x380020f0 /* bootcode start + cache size */
+
+/* This should only be used in the cbl, but if we compile the sbl for
+ * elinux then __CRIS__ will be defined, and these are already defined
+ * in uC-libc. Check that __linux__ is not defined as well!
+ */
+
+#if defined(__CRIS__) && !defined(__linux__)
+#define NULL ((void*)0)
+
+static inline udword
+htonl(udword x)
+{
+ __asm__ ("swapwb %0" : "=r" (x) : "0" (x));
+
+ return(x);
+}
+#ifndef ntohl
+#define ntohl(x) htonl(x)
+#endif
+
+static inline uword
+htons(uword x)
+{
+ __asm__ ("swapb %0" : "=r" (x) : "0" (x));
+
+ return(x);
+}
+#ifndef ntohs
+#define ntohs(x) htons(x)
+#endif
+#endif
+
+/*#define ntohs(x) \*/
+/*((unsigned short)((((unsigned short)(x) & 0x00ffU) << 8) | \*/
+/* (((unsigned short)(x) & 0xff00U) >> 8)))*/
+/* */
+
+/*#define ntohl(x) \*/
+/*((unsigned long int)((((unsigned long int)(x) & 0x000000ffU) << 24) | \*/
+/* (((unsigned long int)(x) & 0x0000ff00U) << 8) | \*/
+/* (((unsigned long int)(x) & 0x00ff0000U) >> 8) | \*/
+/* (((unsigned long int)(x) & 0xff000000U) >> 24)))*/
+
+struct packet_header_T /* Size = 38 */
+{
+ byte dest[6];
+ byte src[6];
+ uword length;
+ udword snap1;
+ udword snap2;
+ udword tag;
+ udword seq;
+ udword type;
+ udword id;
+} __attribute__ ((packed));
+
+typedef struct dma_descr_T {
+ uword sw_len; /* 0-1 */
+ uword ctrl; /* 2-3 */
+ udword next; /* 4-7 */
+ udword buf; /* 8-11 */
+ uword hw_len; /* 12-13 */
+ uword status; /* 14-15 */
+} dma_descr_T;
+
+typedef struct packet_info_T {
+ udword addr;
+ udword size;
+} packet_info_T;
+
+typedef struct set_register_T {
+ udword addr;
+ udword val;
+} set_register_T;
+
+typedef struct get_register_T {
+ udword addr;
+} get_register_T;
+
+typedef struct pause_loop_T {
+ udword pause;
+} pause_loop_T;
+
+typedef struct mem_verify_T {
+ udword addr;
+ udword val;
+} mem_verify_T;
+
+typedef struct mem_test_T {
+ udword from;
+ udword to;
+} mem_test_T;
+
+typedef struct mem_dump_T {
+ udword from_addr;
+ udword to_addr;
+} mem_dump_T;
+
+typedef struct mem_clear_T {
+ udword from_addr;
+ udword to_addr;
+} mem_clear_T;
+
+typedef struct flash_T {
+ unsigned char *source;
+ udword offset;
+ udword size;
+} flash_T;
+
+typedef struct jump_T {
+ udword addr;
+} jump_T;
+
+typedef struct bne_T {
+ udword addr;
+ udword target;
+} bne_T;
+
+typedef struct br_T {
+ udword baudrate;
+} br_T;
+
+typedef struct command_T {
+ udword type;
+ union {
+ packet_info_T packet_info;
+ set_register_T set_register;
+ get_register_T get_register;
+ pause_loop_T pause_loop;
+ mem_verify_T mem_verify;
+ mem_test_T mem_test;
+ mem_dump_T mem_dump;
+ mem_clear_T mem_clear;
+ flash_T flash;
+ jump_T jump;
+ bne_T bne;
+ br_T br;
+ } args;
+} command_T;
+
+#define NETWORK_HEADER_LENGTH sizeof(struct packet_header_T)
+
+void crt1(void);
+void start(void);
+void level2_boot(void);
+int read_data(void);
+int handle_network_read(void);
+int flash_write(const unsigned char *source, unsigned int offset, unsigned int size);
+
+void init_interface(void);
+int handle_read(void);
+void send_ack(void);
+void send_string(char *str);
+void send_hex(udword v, byte nl);
+
+extern char e100boot_version[];
+
+extern volatile udword bytes_to_read;
+extern volatile udword target_address;
+
+extern udword nbr_read;
+extern byte interface;
+extern byte set_dest;
+extern udword last_timeout;
+extern byte *io_buf_next;
+extern byte *io_buf_cur;
+
+extern struct packet_header_T tx_header;
+extern dma_descr_T tx_descr;
+extern dma_descr_T tx_descr2;
+
+extern struct packet_header_T rx_header;
+extern dma_descr_T rx_descr;
+extern dma_descr_T rx_descr2;
+
+extern uword timeout_limit;
+extern udword seq;
+extern byte serial_up;
+
+enum { /* Available in: */
+ d_eol = (1 << 0), /* flags */
+ d_eop = (1 << 1), /* flags & status */
+ d_wait = (1 << 2), /* flags */
+ d_int = (1 << 3), /* flags */
+ d_txerr = (1 << 4), /* flags */
+ d_stop = (1 << 4), /* status */
+ d_ecp = (1 << 4), /* flags & status */
+ d_pri = (1 << 5), /* flags & status */
+ d_alignerr = (1 << 6), /* status */
+ d_crcerr = (1 << 7) /* status */
+};
--- /dev/null
+/* $Id: flash.c,v 1.39 2004/04/20 07:57:57 jonashg Exp $
+ *
+ * Stolen from the eLinux kernel and stripped down.
+ *
+ * HISTORY:
+ *
+ * $Log: flash.c,v $
+ * Revision 1.39 2004/04/20 07:57:57 jonashg
+ * Clear flash_status fields to make it possible to flash several images
+ * sequentially.
+ *
+ * Revision 1.38 2003/12/16 09:04:07 magnusmn
+ * Removed FLASHFILL command
+ *
+ * Revision 1.37 2003/12/16 08:49:01 magnusmn
+ * Merging change_branch--fast_flash
+ *
+ * Revision 1.36.2.6 2003/12/15 17:21:27 magnusmn
+ * Reset counter when continuing with operations the next sector.
+ *
+ * Revision 1.36.2.5 2003/12/15 11:35:57 magnusmn
+ * Bail out if we try to erase the same sector more that 10 times
+ *
+ * Revision 1.36.2.4 2003/12/12 12:07:10 magnusmn
+ * FIX for ST M29W320DT
+ * Some chip need a reset to bring them back to read mode again.
+ *
+ * Revision 1.36.2.3 2003/11/10 16:38:04 orjanf
+ * Unified Erasing/Writing messages
+ *
+ * Revision 1.36.2.2 2003/11/10 15:52:34 magnusmn
+ * More info on a sector basis
+ *
+ * Revision 1.36.2.1 2003/11/07 16:23:20 magnusmn
+ * o Only erase a flash sector if we need to, that is if the source content isn't already is in place.
+ * o Don't erase a flash sector that already contain ones.
+ * o Don't write ones to a (d)word that already contain ones.
+ * o If there are two flashes, switch flash after an erase operation is started on one of them.
+ * o Flash fill doesn't work yet.
+ * o No timeout implemented, we will continue to erase/program until we succeed.
+ * o Interleave not tested.
+ *
+ * Revision 1.36 2003/10/16 17:08:51 jonashg
+ * Bugfix: reversed CFI-tables wasn't handled correctly since regions support was
+ * merged.
+ *
+ * Revision 1.35 2003/10/14 13:43:41 pkj
+ * Fixed compiler warnings.
+ *
+ * Revision 1.34 2003/10/14 10:48:13 magnusmn
+ * No need to write ones to a (d)word where there already are ones. This will save time during flash programming.
+ *
+ * Revision 1.33 2003/10/10 11:46:25 jonashg
+ * Merged change_branch--regions_support.
+ *
+ * Revision 1.32.2.3 2003/10/10 09:38:13 jonashg
+ * Corrected calculation of current region and sector before erase.
+ *
+ * Revision 1.32.2.2 2003/10/09 16:31:26 jonashg
+ * Regions support in JEDEC probe.
+ *
+ * Revision 1.32.2.1 2003/09/19 15:28:22 jonashg
+ * Support for unusual region layouts. It only works for CFI compliant chips (yet).
+ *
+ * Revision 1.32 2002/12/13 15:55:54 jonashg
+ * Fix for ST M29W160ET. It seems to need a reset before erase (even though the
+ * probe functions did reset it).
+ *
+ * Revision 1.31 2002/07/01 14:37:25 pkj
+ * Merged with the ASIC version of e100boot. Main difference is that
+ * information about the executed commands are sent back to e100boot
+ * instead of being sent to the debug port. This means there is no
+ * longer any need to use different boot loaders for different
+ * debug ports.
+ *
+ * Revision 1.30 2002/06/26 13:28:29 pkj
+ * flash_write() can now be used to erase an area (by specifying
+ * source as NULL), and to fill an area with the first udword of
+ * source by setting do_fill to TRUE).
+ *
+ * Revision 1.29 2002/06/26 13:19:37 pkj
+ * * flash_write() now returns a status code.
+ * * timeout is now decremented correctly in flash_write_part() to
+ * actually be able to trigger the timeout message.
+ * * Fixed all compiler warnings.
+ *
+ * Revision 1.28 2002/06/20 12:58:18 pkj
+ * Changed svinto_boot.h to e100boot.h
+ *
+ * Revision 1.27 2002/06/19 14:00:29 pkj
+ * * Broke out the probing of the flash chips from flash_write()
+ * into flash_probe_chips().
+ * * flash_probe_chips() is not limited to two chips or that the
+ * first chip exists.
+ *
+ * Revision 1.26 2002/02/21 14:37:52 jonashg
+ * Optimized away my sanity. It's back now I think.
+ *
+ * Revision 1.25 2002/02/21 14:28:24 jonashg
+ * Added support for Atmel AT49?V16?T (had to optimize a bit to make room).
+ *
+ * Revision 1.24 2002/01/31 14:36:14 jonashg
+ * * Added support for Atmel AT49[BL]V16[01] (the chip used in the ETRAX MCM).
+ * * Replaced concurrent sector erase with sequential (we have found three
+ * different chips that cannot erase multiple sectors at the same time,
+ * one of the is the chip in the MCM). I haven't noticed any performance
+ * loss on chips (CFI and non-CFI) that can erase all sectors at the same
+ * time either (maybe they don't really erase them at the same time in
+ * hardware).
+ * * Added check for manufacturer id as well as device id (should have been
+ * done a long time ago).
+ *
+ * Revision 1.23 2001/11/21 15:52:44 jonashg
+ * Almost readable.
+ *
+ * Revision 1.22 2001/11/21 15:24:38 jonashg
+ * Increased readability and decreased size some 40bytes.
+ *
+ * Revision 1.21 2001/11/20 13:40:12 starvik
+ * Corrected handling for CFI capable bottom boot flashes
+ * Shorted some strings to make more space available
+ *
+ * Revision 1.20 2001/08/08 17:51:28 pkj
+ * Made it possible to flash at a start offset other than zero when
+ * there are more than one physical flash chip available. Previously
+ * it always started flashing from the start of the first flash if
+ * there were more than one, even though the start offset was set to
+ * something else...
+ *
+ * Revision 1.19 2001/06/19 14:51:17 jonashg
+ * Added support for non-CFI flash Toshiba TC58FVT800.
+ *
+ * Revision 1.18 2001/04/05 06:32:39 starvik
+ * Works with flashes with multiple banks
+ *
+ * Revision 1.17 2001/03/06 15:21:16 jonashg
+ * More output to user.
+ *
+ * Revision 1.16 2001/03/06 14:11:16 jonashg
+ * * Switch to second device correctly when flashing images that extend past the
+ * first device.
+ * * Only enter autoselect mode once saves a few bytes (not needed before reading
+ * device id, since it was done before reading manufacturer id).
+ * * A few unnecessary resets removed to save another few bytes.
+ *
+ * Revision 1.15 2001/02/28 14:52:43 jonashg
+ * * Reverted to old sector erase sequence (that was correct).
+ * * A bit of executable size optimization (a few hundred bytes).
+ * * Cleanup.
+ *
+ * Revision 1.14 2001/02/27 14:18:59 jonashg
+ * * Write full erase command sequence to all sectors that should be erased.
+ * * Write 16bit erase command to non-interleaved chips.
+ *
+ * Revision 1.13 2001/02/23 11:03:41 jonashg
+ * Added support for 2 x 16Mb flashes (32-bits buswidth).
+ * The CFI probe does not detect two parallel flash devices, but the normal
+ * probe does (it should be easy to add that in the CFI-probe, but I didn't
+ * have any hardware to try it on and the size of the executable is getting
+ * pretty close to the size of the ETRAX cache).
+ *
+ * Revision 1.12 2001/02/12 13:59:00 jonashg
+ * Bugfix: pointer arithmetics made bootsector calculation go wrong.
+ *
+ * Revision 1.11 2000/11/10 08:02:23 starvik
+ * Added CFI support
+ *
+ * Revision 1.10 2000/10/26 13:47:32 johana
+ * Added support for Fujitsu flash 16MBit (2MByte) MBM29LV160BE and MBM29LV160TE.
+ * NOT VERIFIED YET!
+ *
+ * Revision 1.9 2000/06/28 13:02:50 bjornw
+ * * Added support for SST39LF800 and SST39LF160 flashes
+ * * Fixed some indentation issues
+ *
+ * Revision 1.8 2000/06/13 11:51:11 starvik
+ * Support for two flashes. Second flash is erased and programmed if program
+ * is larger than first flash.
+ *
+ * Revision 1.7 2000/04/13 16:06:15 macce
+ * See if flash is empty before erasing it. Might save some production time.
+ *
+ * Revision 1.6 2000/01/27 17:52:07 bjornw
+ * * Added Toshiba flashes
+ * * Added proper bootblock erase for the different flashes
+ * (this caused the verify errors when trying to do ./flashitall before)
+ *
+ * Revision 1.5 2000/01/20 11:41:28 finn
+ * Improved the verify error printouts in flash_write.
+ *
+ * Revision 1.4 1999/12/21 19:32:53 bjornw
+ * Dont choke on full chip erases even though we dont implement it efficiently.
+ *
+ * Revision 1.3 1999/11/12 01:30:04 bjornw
+ * Added wait for busy to be ready. Removed some warnings.
+ *
+ * Revision 1.2 1999/10/27 07:42:42 johana
+ * Added support for ST M29W800T flash used in 5600
+ *
+ * Revision 1.1 1999/10/27 01:37:12 bjornw
+ * Wrote routines to erase and flash data into a flash ROM.
+ *
+ */
+
+#include "e100boot.h"
+
+//#define DEBUG
+
+#ifdef DEBUG
+#define FDEBUG(x) x
+#else
+#define FDEBUG(x)
+#endif
+
+/* Try turning of some of these if you run into space problems. */
+#define CFI_PROBE
+#define JEDEC_PROBE
+#define INTERLEAVE
+
+#define TYPE_X16 (16 / 8)
+
+#define nop() __asm__("nop")
+
+#define safe_printk send_string
+
+static char *message_bottom_boot_8 = "8Mb BB";
+static char *message_top_boot_8 = "8Mb TB";
+static char *message_bottom_boot_16 = "16Mb BB";
+static char *message_top_boot_16 = "16Mb TB";
+static char *message_top_boot_32 = "32Mb TB";
+
+enum {
+ /* Addresses */
+ ADDR_UNLOCK_1 = 0x0555,
+ ADDR_UNLOCK_2 = 0x02AA,
+ ADDR_MANUFACTURER = 0x0000,
+ ADDR_DEVICE_ID = 0x0001,
+ ADDR_CFI_QUERY = 0x0055,
+
+ /* Commands */
+ CMD_UNLOCK_DATA_1 = 0x00AA,
+ CMD_UNLOCK_DATA_2 = 0x0055,
+ CMD_MANUFACTURER_UNLOCK_DATA = 0x0090,
+ CMD_PROGRAM_UNLOCK_DATA = 0x00A0,
+ CMD_RESET_DATA = 0x00F0,
+ CMD_SECTOR_ERASE_UNLOCK_DATA_1 = 0x0080,
+ CMD_SECTOR_ERASE_UNLOCK_DATA_2 = 0x0030,
+ CMD_CFI_QUERY_DATA = 0x0098,
+
+ /* Offsets */
+ OFFSET_CFI_ID = 0x10,
+ OFFSET_CFI_SIZE = 0x27,
+ OFFSET_CFI_BLOCK_COUNT = 0x2C,
+ OFFSET_CFI_BLOCK = 0x2D,
+
+ /* Manufacturers */
+ MANUFACTURER_AMD = 0x01,
+ MANUFACTURER_ATMEL = 0x1F,
+ MANUFACTURER_FUJITSU = 0x04,
+ MANUFACTURER_SST = 0xBF,
+ MANUFACTURER_ST = 0x20,
+ MANUFACTURER_TOSHIBA = 0x98,
+
+
+ /* To save precious space we store mfr and dev id together */
+
+ /* AMD devices */
+ AM29F800BB = 0x00012258,
+ AM29F800BT = 0x000122D6,
+ AM29LV800BB = 0x0001225B,
+ AM29LV800BT = 0x000122DA,
+ AM29LV160BT = 0x000122C4,
+
+ /* Atmel devices */
+ AT49xV16x = 0x001F00C0,
+ AT49xV16xT = 0x001F00C2,
+ AT49BV32xAT = 0x001F00C9,
+
+ /* Fujitsu devices */
+ MBM29LV160TE = 0x000422C4,
+ MBM29LV160BE = 0x00042249,
+
+ /* SST devices */
+ SST39LF800 = 0x00BF2781,
+ SST39LF160 = 0x00BF2782,
+
+ /* ST devices */
+ M29W800T = 0x002000D7, /* Used in 5600, similar
+ * to AM29LV800, but no
+ * unlock bypass
+ */
+ /* Toshiba devices */
+ TC58FVT160 = 0x009800C2,
+ TC58FVB160 = 0x00980043,
+ TC58FVT800 = 0x0098004F,
+
+ /* Toggle bit mask */
+ D6_MASK = 0x40
+};
+
+struct region {
+ unsigned long offset;
+ unsigned int sector_size;
+ unsigned int numsectors;
+};
+
+#define MAXREGIONS 8
+
+struct chip {
+ volatile unsigned char *base;
+#ifdef INTERLEAVE
+ byte interleave;
+ byte buswidth;
+#endif
+ unsigned int size;
+ unsigned short numregions;
+ struct region regions[MAXREGIONS];
+};
+
+/* Allocate flash structures and initialize base. */
+static struct chip chips[2] = {
+ { (unsigned char *)0x80000000,
+#ifdef INTERLEAVE
+ 0, 0,
+#endif
+ 0, 0, { } },
+ { (unsigned char *)0x84000000,
+#ifdef INTERLEAVE
+ 0, 0,
+#endif
+ 0, 0, { } }
+};
+
+
+
+static unsigned int
+wide_read(struct chip *flash, unsigned long offset)
+{
+#ifdef INTERLEAVE
+ switch (flash->buswidth) {
+ case 2:
+#endif
+ return *((uword *)(flash->base + offset));
+
+#ifdef INTERLEAVE
+ case 4:
+ return *((udword *)(flash->base + offset));
+ }
+
+ return 0;
+#endif
+}
+
+static int
+wide_write_chunk(struct chip *flash, unsigned long offset, const void *chunk)
+{
+#ifdef INTERLEAVE
+ switch (flash->buswidth) {
+ case 2:
+#endif
+ *((uword *)(flash->base + offset)) = *((uword *)chunk);
+ return 2;
+
+#ifdef INTERLEAVE
+ case 4:
+ *((udword *)(flash->base + offset)) = *((udword *)chunk);
+ return 4;
+ }
+
+ return 0;
+#endif
+}
+
+static void
+wide_cmd(struct chip *flash, udword cmd, unsigned long offset)
+{
+#ifdef INTERLEAVE
+ if (flash->interleave == 1) {
+#endif
+ offset <<= 1;
+#ifdef INTERLEAVE
+ } else if (flash->interleave == 2) {
+ cmd |= (cmd << 16);
+ offset <<= 2;
+ } else {
+ safe_printk("Unsupported interleave!\n");
+ return;
+ }
+#endif
+
+ wide_write_chunk(flash, offset, &cmd);
+}
+
+static void
+flash_unlock(struct chip *flash)
+{
+ wide_cmd(flash, CMD_UNLOCK_DATA_1, ADDR_UNLOCK_1);
+ wide_cmd(flash, CMD_UNLOCK_DATA_2, ADDR_UNLOCK_2);
+}
+
+static int
+flash_is_busy(struct chip *flash, unsigned long offset)
+{
+#ifdef INTERLEAVE
+ if (flash->interleave == 2) {
+ udword read1, read2;
+
+ read1 = wide_read(flash, offset);
+ read2 = wide_read(flash, offset);
+ return (((read1 >> 16) & D6_MASK) !=
+ ((read2 >> 16) & D6_MASK)) ||
+ (((read1 & 0xffff) & D6_MASK) !=
+ ((read2 & 0xffff) & D6_MASK));
+ }
+#endif
+
+ return ((wide_read(flash, offset) & D6_MASK) !=
+ (wide_read(flash, offset) & D6_MASK));
+}
+
+
+
+#ifdef CFI_PROBE
+static int
+try_cfi(struct chip *flash)
+{
+ int offset_shift = 1;
+
+#ifdef INTERLEAVE
+ if (flash->interleave == 2) {
+ offset_shift = 2;
+ }
+#endif
+
+ /* Enter CFI mode */
+ wide_cmd(flash, CMD_CFI_QUERY_DATA, ADDR_CFI_QUERY);
+
+ /* Check if flash responds correctly */
+ if ((byte)wide_read(flash, (OFFSET_CFI_ID+0) << offset_shift) == 'Q' &&
+ (byte)wide_read(flash, (OFFSET_CFI_ID+1) << offset_shift) == 'R' &&
+ (byte)wide_read(flash, (OFFSET_CFI_ID+2) << offset_shift) == 'Y') {
+ int block; /* Current block */
+ int block_count; /* Number of blocks */
+ unsigned int offset = 0; /* Offset into flash */
+ int reverse = 0; /* Reverse block table */
+ int primary; /* Offset to vendor specific table */
+
+ safe_printk("Found 1 x CFI at ");
+ send_hex((udword)flash->base, NL);
+
+ flash->size =
+ 1 << wide_read(flash, OFFSET_CFI_SIZE << offset_shift);
+
+ /* CFI stores flash organization in blocks. Each block contains
+ * a number of sectors with the same size
+ */
+ block_count = wide_read(flash, OFFSET_CFI_BLOCK_COUNT <<
+ offset_shift);
+
+ /* Check if table is reversed */
+ primary = wide_read(flash, (OFFSET_CFI_ID+5) << offset_shift);
+ /* For CFI version 1.0 we don't know. Assume that id & 0x80 */
+ /* indicates top boot */
+ if ((byte)wide_read(flash, (primary+4) << offset_shift) == 0x30)
+ {
+ /* read device id */
+ wide_cmd(flash, CMD_RESET_DATA, ADDR_UNLOCK_1);
+ flash_unlock(flash);
+ wide_cmd(flash, CMD_MANUFACTURER_UNLOCK_DATA,
+ ADDR_UNLOCK_1);
+ reverse = wide_read(flash, ADDR_DEVICE_ID * TYPE_X16
+#ifdef INTERLEAVE
+ * flash->interleave
+#endif
+ ) & 0x80;
+ wide_cmd(flash, CMD_CFI_QUERY_DATA, ADDR_CFI_QUERY);
+ } else {
+ reverse = ((byte)wide_read(flash,
+ (primary+15) << offset_shift) == 3);
+ }
+
+ flash->numregions = block_count;
+ if (block_count > MAXREGIONS) {
+ safe_printk("Too many regions on chip!\n");
+ return 0;
+ }
+
+ /* Blocks are stored backwards compared to flash organization */
+ for (block = reverse ? block_count - 1 : 0;
+ reverse ? block >= 0 : block < block_count;
+ reverse ? block-- : block++) {
+ int region;
+
+ /* Size of each sector in block. Size is stored as
+ * sector_size / 256.
+ */
+ int sector_size =
+ (wide_read(flash, (OFFSET_CFI_BLOCK+block * 4+2) <<
+ offset_shift)
+ |
+ (wide_read(flash, (OFFSET_CFI_BLOCK+block * 4+3) <<
+ offset_shift) << 8)
+ ) << 8;
+
+ /* Number of sectors */
+ int sector_count =
+ (wide_read(flash, (OFFSET_CFI_BLOCK+block * 4+0) <<
+ offset_shift)
+ |
+ (wide_read(flash, (OFFSET_CFI_BLOCK+block * 4+1) <<
+ offset_shift) << 8)
+ ) + 1;
+
+ region = reverse? block_count - 1 - block : block;
+ flash->regions[region].offset = offset;
+ flash->regions[region].sector_size = sector_size;
+ flash->regions[region].numsectors = sector_count;
+
+ /* Can't use multiplication (we have no lib). */
+ {
+ int temp;
+ for (temp = 0 ; temp < sector_count ; temp++) {
+ offset += sector_size;
+ }
+ }
+
+FDEBUG(
+ if (reverse) {
+ safe_printk("NOTE! reversed table:\n");
+ }
+ safe_printk("region: ");
+ send_hex((udword)region, NL);
+ safe_printk(" offset: ");
+ send_hex((udword)flash->regions[region].offset, NL);
+ safe_printk(" sector_size: ");
+ send_hex((udword)flash->regions[region].sector_size, NL);
+ safe_printk(" numsectors: ");
+ send_hex((udword)flash->regions[region].numsectors, NL);
+)
+
+ /* Some flashes (SST) store information about alternate
+ * block sizes. Ignore those by breaking when the sum
+ * of the sector sizes == flash size.
+ */
+ if (offset == flash->size) {
+ break;
+ }
+ }
+
+ /* reset */
+ wide_cmd(flash, CMD_RESET_DATA, ADDR_UNLOCK_1);
+
+ return 1;
+ }
+
+ /* reset */
+ wide_cmd(flash, CMD_RESET_DATA, ADDR_UNLOCK_1);
+
+ return 0;
+}
+#endif
+
+
+
+static int
+flash_probe(struct chip *flash)
+{
+ char *message;
+ udword dev_id;
+ udword mfr_id;
+ udword id;
+
+ if (flash->size
+#ifdef CFI_PROBE
+ || try_cfi(flash)
+#endif
+ ) {
+ return 1;
+ }
+
+#ifdef JEDEC_PROBE
+ /* Read manufacturer ID. */
+ flash_unlock(flash);
+ wide_cmd(flash, CMD_MANUFACTURER_UNLOCK_DATA, ADDR_UNLOCK_1);
+ mfr_id = wide_read(flash, ADDR_MANUFACTURER * TYPE_X16
+#ifdef INTERLEAVE
+ * flash->interleave
+#endif
+ );
+ /* Read device ID. */
+ dev_id = wide_read(flash, ADDR_DEVICE_ID * TYPE_X16
+#ifdef INTERLEAVE
+ * flash->interleave
+#endif
+ );
+FDEBUG(
+ safe_printk("mfr_id: ");
+ send_hex(mfr_id, NL);
+ safe_printk("dev_id: ");
+ send_hex(dev_id, NL);
+)
+
+#ifdef INTERLEAVE
+ if ((flash->interleave == 2) &&
+ ((mfr_id >> 16) == (mfr_id & 0xffff)) &&
+ ((dev_id >> 16) == (dev_id & 0xffff))) {
+ mfr_id &= 0xffff;
+ dev_id &= 0xffff;
+ }
+#endif
+
+ id = (mfr_id << 16) | dev_id;
+
+ /* reset */
+ wide_cmd(flash, CMD_RESET_DATA, ADDR_UNLOCK_1);
+
+ /* Check device type and fill in correct sizes. */
+ switch (id) {
+ case AM29LV160BT:
+ case TC58FVT160:
+ // case MBM29LV160TE: /* This is same id as AM29LV160BT */
+ message = message_top_boot_16;
+
+ flash->size = 0x00200000;
+
+ flash->regions[0].offset = 0x00000000;
+ flash->regions[0].sector_size = 0x10000;
+ flash->regions[0].numsectors = 31;
+
+ flash->regions[1].offset = 0x001F0000;
+ flash->regions[1].sector_size = 0x08000;
+ flash->regions[1].numsectors = 1;
+
+ flash->regions[2].offset = 0x001F8000;
+ flash->regions[2].sector_size = 0x02000;
+ flash->regions[2].numsectors = 2;
+
+ flash->regions[3].offset = 0x001FC000;
+ flash->regions[3].sector_size = 0x04000;
+ flash->regions[3].numsectors = 1;
+ break;
+
+ // case AM29LV160BB:
+ case TC58FVB160:
+ case MBM29LV160BE:
+ message = message_bottom_boot_16;
+
+ flash->size = 0x00200000;
+
+ flash->regions[0].offset = 0x00000000;
+ flash->regions[0].sector_size = 0x04000;
+ flash->regions[0].numsectors = 1;
+
+ flash->regions[1].offset = 0x00004000;
+ flash->regions[1].sector_size = 0x02000;
+ flash->regions[1].numsectors = 2;
+
+ flash->regions[2].offset = 0x00008000;
+ flash->regions[2].sector_size = 0x08000;
+ flash->regions[2].numsectors = 1;
+
+ flash->regions[3].offset = 0x00010000;
+ flash->regions[3].sector_size = 0x10000;
+ flash->regions[3].numsectors = 31;
+ break;
+
+ case AM29LV800BB:
+ case AM29F800BB:
+ message = message_bottom_boot_8;
+
+ flash->size = 0x00100000;
+
+ flash->regions[0].offset = 0x00000000;
+ flash->regions[0].sector_size = 0x04000;
+ flash->regions[0].numsectors = 1;
+
+ flash->regions[1].offset = 0x00004000;
+ flash->regions[1].sector_size = 0x02000;
+ flash->regions[1].numsectors = 2;
+
+ flash->regions[2].offset = 0x00008000;
+ flash->regions[2].sector_size = 0x08000;
+ flash->regions[2].numsectors = 1;
+
+ flash->regions[3].offset = 0x00010000;
+ flash->regions[3].sector_size = 0x10000;
+ flash->regions[3].numsectors = 15;
+ break;
+
+ case M29W800T:
+ case AM29LV800BT:
+ case AM29F800BT:
+ case TC58FVT800:
+ message = message_top_boot_8;
+
+ flash->size = 0x00100000;
+
+ flash->regions[0].offset = 0x00000000;
+ flash->regions[0].sector_size = 0x10000;
+ flash->regions[0].numsectors = 15;
+
+ flash->regions[1].offset = 0x000F0000;
+ flash->regions[1].sector_size = 0x08000;
+ flash->regions[1].numsectors = 1;
+
+ flash->regions[2].offset = 0x000F8000;
+ flash->regions[2].sector_size = 0x02000;
+ flash->regions[2].numsectors = 2;
+
+ flash->regions[3].offset = 0x000FC000;
+ flash->regions[3].sector_size = 0x04000;
+ flash->regions[3].numsectors = 1;
+
+ break;
+
+ case AT49xV16x:
+ message = message_bottom_boot_16;
+
+ flash->size = 0x00200000;
+
+ flash->regions[0].offset = 0x00000000;
+ flash->regions[0].sector_size = 0x02000;
+ flash->regions[0].numsectors = 8;
+
+ flash->regions[1].offset = 0x00010000;
+ flash->regions[1].sector_size = 0x10000;
+ flash->regions[1].numsectors = 31;
+
+ break;
+
+ case AT49xV16xT:
+ message = message_top_boot_16;
+
+ flash->size = 0x00200000;
+
+ flash->regions[0].offset = 0x00000000;
+ flash->regions[0].sector_size = 0x10000;
+ flash->regions[0].numsectors = 31;
+
+ flash->regions[1].offset = 0x001F0000;
+ flash->regions[1].sector_size = 0x02000;
+ flash->regions[1].numsectors = 8;
+
+ break;
+
+ case AT49BV32xAT:
+ message = message_top_boot_32;
+
+ flash->size = 0x00400000;
+
+ flash->regions[0].offset = 0x00000000;
+ flash->regions[0].sector_size = 0x10000;
+ flash->regions[0].numsectors = 63;
+
+ flash->regions[1].offset = 0x001F0000;
+ flash->regions[1].sector_size = 0x02000;
+ flash->regions[1].numsectors = 8;
+
+ break;
+
+ default:
+#endif
+#ifdef INTERLEAVE
+ if (flash->interleave == 1) {
+#endif
+ safe_printk("No single x16 at ");
+#ifdef INTERLEAVE
+ } else {
+ safe_printk("No interleaved x16 at ");
+ }
+#endif
+ send_hex((udword)flash->base, NL);
+
+ return 0;
+#ifdef JEDEC_PROBE
+ }
+
+ safe_printk("Found ");
+#ifdef INTERLEAVE
+ if (flash->interleave == 1) {
+#endif
+ safe_printk("1");
+#ifdef INTERLEAVE
+ }
+ if (flash->interleave == 2) {
+ int count = 0;
+
+ flash->size <<= 1;
+ while (count < MAXREGIONS) {
+ flash->regions[count].offset <<= 1;
+ flash->regions[count].sector_size <<= 1;
+ count++;
+ }
+ safe_printk("2");
+ }
+#endif
+ safe_printk(" x ");
+ safe_printk(message);
+ safe_printk(" at ");
+ send_hex((udword)flash->base, NL);
+
+ return 1;
+#endif
+}
+
+/* Start erase of a sector but do no wait for completion */
+static void
+start_sector_erase(struct chip *flash, unsigned long offset)
+{
+ flash_unlock(flash);
+ wide_cmd(flash, CMD_SECTOR_ERASE_UNLOCK_DATA_1, ADDR_UNLOCK_1);
+ flash_unlock(flash);
+
+#ifdef INTERLEAVE
+ if (flash->interleave == 2) {
+ *(udword *)(flash->base+offset) = (CMD_SECTOR_ERASE_UNLOCK_DATA_2 << 16) |
+ CMD_SECTOR_ERASE_UNLOCK_DATA_2;
+ } else {
+#endif
+ *(uword *)(flash->base+offset) = CMD_SECTOR_ERASE_UNLOCK_DATA_2;
+#ifdef INTERLEAVE
+ }
+#endif
+}
+
+/* Return the size of the sector at the given offset */
+static int
+find_sector_size(struct chip *flash, unsigned long offset)
+{
+ unsigned int i, j;
+ int region_size;
+ /* Sanity check */
+ if (offset >= flash->size)
+ return 0;
+
+ for(i=0; i < MAXREGIONS; i++)
+ if (offset >= flash->regions[i].offset) {
+ region_size=0;
+ for (j=0; j < flash->regions[i].numsectors; j++)
+ region_size += flash->regions[i].sector_size;
+ if (offset < flash->regions[i].offset + region_size)
+ return flash->regions[i].sector_size;
+ }
+
+ /* Should not happen */
+ return 0;
+}
+
+/* Check and see if we need to erase the sector */
+/* The return values mean */
+/* 0: The source and destination are the same. */
+/* 1: The source and destination are not the same, but flash sector already contains only ones. */
+/* 2: The source and destination are not the same and the flash sector is tainted by some zeroes. */
+static char
+need_to_erase(struct chip *flash, unsigned long offset, const unsigned char *source, int size)
+{
+ int i;
+ unsigned long j;
+
+ for (i = 0; i < size; i+=2)
+ if (*(uword*)(flash->base + i + offset) != *(uword*)(source + i)) {
+ /* Check if the sector only contain zeroes */
+ for (j = offset; j < (size + offset); j+=2) {
+ if (*(uword*)(flash->base + j) != 0xffff)
+ return 2;
+ }
+ return 1;
+ }
+
+ /* The source is equal to the destination */
+ return 0;
+}
+
+static unsigned int
+flash_probe_chips(void)
+{
+ unsigned int tot_size = 0;
+ unsigned int i = 0;
+
+ for (; i < sizeof chips/sizeof *chips; i++) {
+#ifdef INTERLEAVE
+ byte interleave;
+
+ for (interleave = 1; interleave < 4; interleave *= 2) {
+ chips[i].interleave = interleave;
+ if (interleave == 1) {
+ chips[i].buswidth = sizeof(uword);
+ } else {
+ chips[i].buswidth = sizeof(udword);
+ }
+
+ if (flash_probe(&chips[i])) {
+ break;
+ }
+ }
+#else
+ flash_probe(&chips[i]);
+#endif
+
+ tot_size += chips[i].size;
+ }
+
+ return tot_size;
+}
+
+/* Program a sector (given by size) at the given offset. Do not write only ones. */
+static void
+program_sector(struct chip *flash, unsigned long offset, const unsigned char *source, int size)
+{
+ int chunk_size = 0;
+ int bytes_written = 0;
+
+
+ while (bytes_written < size) {
+ if (
+#ifdef INTERLEAVE
+ (flash->buswidth == 2) &&
+#endif
+ *(uword*)(source + bytes_written) == 0xffff) {
+ chunk_size=2;
+ }
+#ifdef INTERLEAVE
+ else if ((flash->buswidth == 4) && *(udword*)(source + bytes_written) == 0xffffffff) {
+ chunk_size=4;
+ }
+#endif
+ else {
+ flash_unlock(flash);
+ wide_cmd(flash, CMD_PROGRAM_UNLOCK_DATA, ADDR_UNLOCK_1);
+ chunk_size = wide_write_chunk(flash, offset + bytes_written, source + bytes_written);
+ while(flash_is_busy(flash, offset + bytes_written))
+ /* Nothing */
+ ;
+ }
+
+ bytes_written += chunk_size;
+ }
+}
+
+int
+flash_write(const unsigned char *source, unsigned int offset, unsigned int size)
+{
+ struct flash_status {
+ unsigned char busy; /* Indicates if the flash is busy */
+ const unsigned char *src; /* From where to get the source info */
+ unsigned long offset; /* Start operations in flash at this offset */
+ unsigned int size; /* Size to erase/program (if needed) */
+ unsigned int bytes_done; /* Bytes written (if needed) */
+ unsigned int erase_attempts; /* Keep track how many times we try to erase the same sector */
+ };
+
+ unsigned int tot_size = flash_probe_chips();
+ unsigned int i, j;
+ unsigned int current_sector_size;
+ unsigned long current_offset;
+ const unsigned char *current_src;
+ char need_erase;
+ struct flash_status *current_flash = NULL;
+
+ static struct flash_status flash_status[2] = {
+ { 0, NULL, 0, 0, 0, 0 },
+ { 0, NULL, 0, 0, 0, 0 }
+ };
+
+ if (!tot_size) {
+ /* No chips found, bail out. */
+ return ERR_FLASH_NONE;
+ }
+
+ if (offset + size > tot_size) {
+ safe_printk("Fatal: flash is too small.\n");
+ return ERR_FLASH_TOO_SMALL;
+ }
+
+ /* Initiate the flash_status structs so that we can keep track of what needs to be done
+ on the different flash chips */
+
+ /* Operations only on flash chip 1 */
+ if (offset >= (&chips[0])->size) {
+ flash_status[0].size = 0;
+ flash_status[1].src = source;
+ flash_status[1].offset = offset - (&chips[0])->size;
+ flash_status[1].size = size;
+ }
+ /* Operations on both flash chips */
+ else if ((offset < (&chips[0])->size) && ((offset+size) > (&chips[0])->size)) {
+ flash_status[0].src = source;
+ flash_status[0].offset = offset;
+ flash_status[0].size = (&chips[0])->size - offset;
+ flash_status[1].src = source + flash_status[0].size;
+ flash_status[1].offset = 0;
+ flash_status[1].size = size - flash_status[0].size;
+ }
+ /* Operations only on flash chip 0 */
+ else {
+ flash_status[0].src = source;
+ flash_status[0].offset = offset;
+ flash_status[0].size = size;
+ flash_status[1].size = 0;
+ }
+ flash_status[0].busy = 0;
+ flash_status[0].bytes_done = 0;
+ flash_status[0].erase_attempts = 0;
+ flash_status[1].busy = 0;
+ flash_status[1].bytes_done = 0;
+ flash_status[1].erase_attempts = 0;
+#if 0
+ for (i = 0; i < 2; i++) {
+ safe_printk("\nFlash ");
+ send_hex(i, NL);
+ safe_printk("src:\t");
+ send_hex((int)flash_status[i].src, NL);
+ safe_printk("offset:\t");
+ send_hex(flash_status[i].offset, NL);
+ safe_printk("size:\t");
+ send_hex(flash_status[i].size, NL);
+ safe_printk("\n");
+ }
+#endif
+
+ /* Erase and write */
+
+ i = 0; /* Start operations on flash 0 */
+
+#define CHANGE_FLASH
+
+ while (((&flash_status[0])->bytes_done + (&flash_status[1])->bytes_done) < size) {
+
+ struct flash_status *previous_flash = &flash_status[i ? 0 : 1];
+ current_flash = &flash_status[i];
+
+#ifdef CHANGE_FLASH
+ /* Change flash only if:
+ - There is a flash to change to and operations should be made on that flash *AND*
+ - There is more to write to the previous flash *AND*
+ - Operations should be made on the current flash *OR*
+ - The current flash is busy *OR*
+ - All has been written to the current flash */
+
+ if (previous_flash->size && (previous_flash->bytes_done < previous_flash->size) &&
+ (!current_flash->size || current_flash->busy ||
+ current_flash->bytes_done == current_flash->size))
+ i = i ? 0 : 1; /* Change flash chip */
+#else
+ /* Finish one flash chip before continuing on the next one */
+
+ if ((&flash_status[i])->bytes_done == (&flash_status[i])->size)
+ i = i ? 0 : 1; /* Change flash chip */
+#endif
+ /* Bail out if we have tried to erase the same sector more that 10 times. */
+ if(current_flash->erase_attempts > 10) {
+ safe_printk("Sector erase error\n");
+ return ERR_FLASH_ERASE;
+ }
+
+ /* Get the current status from the chip we are about to access */
+ current_flash = &flash_status[i];
+ current_offset = current_flash->offset + current_flash->bytes_done;
+ current_src = current_flash->src + current_flash->bytes_done;
+ current_sector_size = find_sector_size(&chips[i], current_offset);
+
+ /* Make sure that the chip we are about to access has finished erasing */
+ if (current_flash->busy) {
+ while (flash_is_busy(&chips[i], current_offset))
+ /* nothing */
+ ;
+ current_flash->busy = 0;
+ }
+
+ /* Some flash chip need a reset to bring them back to read mode again. */
+ wide_cmd(&chips[i], CMD_RESET_DATA, ADDR_UNLOCK_1);
+
+ /* Find out if we need to erase the sector or not */
+ need_erase = need_to_erase(&chips[i], current_offset, current_src, current_sector_size);
+
+ if (need_erase == 0) {
+ current_flash->bytes_done += current_sector_size;
+ current_flash->erase_attempts = 0;
+ send_hex((int)(&chips[i])->base + current_offset, 0);
+ safe_printk(": No need to write\n");
+ continue;
+ } else if (need_erase == 1) {
+ /* Erased, not worth printing. */
+ }
+ else if (need_erase == 2) {
+ send_hex((int)(&chips[i])->base + current_offset, 0);
+ safe_printk(": Erasing ");
+ send_hex(current_sector_size, 0);
+ safe_printk(" bytes\n");
+ start_sector_erase(&chips[i], current_offset);
+ current_flash->busy=1;
+ current_flash->erase_attempts++;
+ continue;
+ }
+
+ /* The sector is ready to be programmed */
+ send_hex((int)(&chips[i])->base + current_offset, 0);
+ safe_printk(": Writing ");
+ send_hex(current_sector_size, 0);
+ safe_printk(" bytes\n");
+ program_sector(&chips[i], current_offset, current_src, current_sector_size);
+ current_flash->bytes_done += current_sector_size;
+ current_flash->erase_attempts = 0;
+ }
+
+ /* Verify that the flash chip(s) have the correct content */
+ for (i = 0; i < 2; i++) {
+ current_flash = &flash_status[i];
+ if (!current_flash->size)
+ continue;
+ send_hex((int)(&chips[i])->base, 0);
+ safe_printk(": Verifying...");
+ for (j = 0; j < current_flash->size; j+=2) {
+ if (*(uword*)(current_flash->offset + j + (&chips[i])->base) !=
+ *(uword*)(current_flash->src + j)) {
+ safe_printk("Error at ");
+ send_hex(j, NL);
+ return ERR_FLASH_VERIFY;
+ }
+ }
+ safe_printk("OK\n");
+ }
+
+ return ERR_FLASH_OK;
+}
--- /dev/null
+/*!**********************************************************************
+*!
+*! FILE NAME: hwregs.c
+*!
+*! DESCRIPTION: Shadow register and initiated flag variables,
+*! and a function for initialization of these variables.
+*!
+*!
+*! FUNCTIONS: void init_shadow__hwregs( void )
+*!
+*! NOTE: This file is automatically generated, do _not_ edit.
+*! Created: Thu Oct 3 01:21:27 2002
+*! By: Id: shadow_gen,v 1.14 2002/10/02 20:31:22 hp Exp
+*! From: /n/asic/projects/etrax_ng/doc/work/etrax_ng_regs.rd 1.168
+*! /n/asic/projects/etrax_ng/include//hwregs.ctrl 1.3
+*!
+*! NOTE: init_shadow__hwregs() initiate all write only registers
+*! described in /n/asic/projects/etrax_ng/doc/work/etrax_ng_regs.rd.
+*! Since one physical register may have several logical names you
+*! must choose which of the logical registers to initiate.
+*! This is done by the 'USE_GROUP__group-name' macro in the
+*! hwregs_def.h file.
+*!
+*! As an example, in Etrax100 the following logical registers are
+*! all the same physical register at address 0xb0000044:
+*!
+*! R_ATA_CONFIG
+*! R_PAR0_CONFIG
+*! R_SCSI0_CTRL
+*! R_SHARED_RAM_ADDR
+*!
+*!----------------------------------------------------------------------
+*! HISTORY
+*!
+*! DATE NAME CHANGES
+*! ---- ---- -------
+*! Apr 01 1998 Jan Bengtsson Initial version
+*!----------------------------------------------------------------------
+*!
+*! (C) Copyright 1998, Axis Communications AB, LUND, SWEDEN
+*!
+*!**********************************************************************/
+/* %Z% %M% %I% %G% */
+
+/********************** INCLUDE FILES SECTION **************************/
+
+#include "compiler.h"
+#include "hwregs.h"
+
+#if REG_DEBUG
+#include <string.h>
+#endif
+
+/********************** CONSTANT AND MACRO SECTION *********************/
+
+/********************** TYPE DEFINITION SECTION ************************/
+
+/********************** LOCAL FUNCTION DECLARATION SECTION *************/
+
+/********************** GLOBAL VARIABLE DECLARATION SECTION ************/
+
+#ifndef REG_NO_SHADOW
+/* Shadows for write only registers. */
+reg_shadow_type__hwregs reg_shadow__hwregs;
+#else
+/* Use constant zero as shadow when there isn't a shadow register. */
+reg_shadow_type__hwregs reg_shadow__hwregs = 0;
+#endif
+
+#if REG_DEBUG
+#ifndef REG_NO_SHADOW
+/* Initiated flags for shadow registers. */
+reg_initiated_type__hwregs reg_initiated__hwregs;
+#else
+/* No need for initiated flags when there isn't a shadow register. */
+reg_initiated_type__hwregs reg_initiated__hwregs = 0;
+#endif
+#endif
+
+/********************** FUNCTION DEFINITION SECTION ********************/
+
+/*#**********************************************************************
+*#
+*# FUNCTION NAME: init_shadow__hwregs
+*#
+*# PARAMETERS : none
+*#
+*# RETURNS : nothing
+*#
+*# SIDE EFFECTS : Writes initial values to all write only registers
+*# and their associated shadow registers. If REG_DEBUG
+*# is non zero the reg_initiated struct is also initiated.
+*#
+*# DESCRIPTION : Initiate write only registers, their shadows, and in
+*# debug mode the initiated flags. Default values for
+*# the initialization are defined in hwregs_def.h.
+*#
+*# Note that one physical register may have several
+*# logical names, and that you have to modify this
+*# function to only initiate the physical register once!
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*#
+*#**********************************************************************/
+
+void init_shadow__hwregs( void )
+{
+#if REG_DEBUG && !defined(REG_NO_SHADOW)
+ /* Initiate reg_initiated__hwregs struct to 0xff. */
+ memset( ®_initiated__hwregs, 0xff, sizeof(reg_initiated_type__hwregs) );
+#endif
+
+#ifndef REG_NO_INIT_SHADOW
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_ALT_SER_BAUDRATE(
+ ser3_tr, R_ALT_SER_BAUDRATE__ser3_tr__DEFAULT,
+ ser3_rec, R_ALT_SER_BAUDRATE__ser3_rec__DEFAULT,
+ ser2_tr, R_ALT_SER_BAUDRATE__ser2_tr__DEFAULT,
+ ser2_rec, R_ALT_SER_BAUDRATE__ser2_rec__DEFAULT,
+ ser1_tr, R_ALT_SER_BAUDRATE__ser1_tr__DEFAULT,
+ ser1_rec, R_ALT_SER_BAUDRATE__ser1_rec__DEFAULT,
+ ser0_tr, R_ALT_SER_BAUDRATE__ser0_tr__DEFAULT,
+ ser0_rec, R_ALT_SER_BAUDRATE__ser0_rec__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__ATA_interface_registers
+ REG_SET__R_ATA_CONFIG(
+ enable, R_ATA_CONFIG__enable__DEFAULT,
+ dma_strobe, R_ATA_CONFIG__dma_strobe__DEFAULT,
+ dma_hold, R_ATA_CONFIG__dma_hold__DEFAULT,
+ pio_setup, R_ATA_CONFIG__pio_setup__DEFAULT,
+ pio_strobe, R_ATA_CONFIG__pio_strobe__DEFAULT,
+ pio_hold, R_ATA_CONFIG__pio_hold__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__ATA_interface_registers
+ REG_SET__R_ATA_CTRL_DATA(
+ sel, R_ATA_CTRL_DATA__sel__DEFAULT,
+ cs1, R_ATA_CTRL_DATA__cs1__DEFAULT,
+ cs0, R_ATA_CTRL_DATA__cs0__DEFAULT,
+ addr, R_ATA_CTRL_DATA__addr__DEFAULT,
+ rw, R_ATA_CTRL_DATA__rw__DEFAULT,
+ src_dst, R_ATA_CTRL_DATA__src_dst__DEFAULT,
+ handsh, R_ATA_CTRL_DATA__handsh__DEFAULT,
+ multi, R_ATA_CTRL_DATA__multi__DEFAULT,
+ dma_size, R_ATA_CTRL_DATA__dma_size__DEFAULT,
+ data, R_ATA_CTRL_DATA__data__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Bus_interface_configuration_registers
+ REG_SET__R_BUS_CONFIG(
+ sram_type, R_BUS_CONFIG__sram_type__DEFAULT,
+ dma_burst, R_BUS_CONFIG__dma_burst__DEFAULT,
+ pcs4_7_wr, R_BUS_CONFIG__pcs4_7_wr__DEFAULT,
+ pcs0_3_wr, R_BUS_CONFIG__pcs0_3_wr__DEFAULT,
+ sram_wr, R_BUS_CONFIG__sram_wr__DEFAULT,
+ flash_wr, R_BUS_CONFIG__flash_wr__DEFAULT,
+ pcs4_7_bw, R_BUS_CONFIG__pcs4_7_bw__DEFAULT,
+ pcs0_3_bw, R_BUS_CONFIG__pcs0_3_bw__DEFAULT,
+ sram_bw, R_BUS_CONFIG__sram_bw__DEFAULT,
+ flash_bw, R_BUS_CONFIG__flash_bw__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Timer_registers
+ REG_SET__R_CLOCK_PRESCALE(
+ ser_presc, R_CLOCK_PRESCALE__ser_presc__DEFAULT,
+ tim_presc, R_CLOCK_PRESCALE__tim_presc__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__DMA_registers
+ REG_SET__R_DMA_CH0_CLR_INTR(
+ clr_eop, R_DMA_CH0_CLR_INTR__clr_eop__DEFAULT,
+ clr_descr, R_DMA_CH0_CLR_INTR__clr_descr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__DMA_registers
+ REG_SET__R_DMA_CH1_CLR_INTR(
+ clr_eop, R_DMA_CH1_CLR_INTR__clr_eop__DEFAULT,
+ clr_descr, R_DMA_CH1_CLR_INTR__clr_descr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__DMA_registers
+ REG_SET__R_DMA_CH2_CLR_INTR(
+ clr_eop, R_DMA_CH2_CLR_INTR__clr_eop__DEFAULT,
+ clr_descr, R_DMA_CH2_CLR_INTR__clr_descr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__DMA_registers
+ REG_SET__R_DMA_CH3_CLR_INTR(
+ clr_eop, R_DMA_CH3_CLR_INTR__clr_eop__DEFAULT,
+ clr_descr, R_DMA_CH3_CLR_INTR__clr_descr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__DMA_registers
+ REG_SET__R_DMA_CH4_CLR_INTR(
+ clr_eop, R_DMA_CH4_CLR_INTR__clr_eop__DEFAULT,
+ clr_descr, R_DMA_CH4_CLR_INTR__clr_descr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__DMA_registers
+ REG_SET__R_DMA_CH5_CLR_INTR(
+ clr_eop, R_DMA_CH5_CLR_INTR__clr_eop__DEFAULT,
+ clr_descr, R_DMA_CH5_CLR_INTR__clr_descr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__DMA_registers
+ REG_SET__R_DMA_CH6_CLR_INTR(
+ clr_eop, R_DMA_CH6_CLR_INTR__clr_eop__DEFAULT,
+ clr_descr, R_DMA_CH6_CLR_INTR__clr_descr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__DMA_registers
+ REG_SET__R_DMA_CH7_CLR_INTR(
+ clr_eop, R_DMA_CH7_CLR_INTR__clr_eop__DEFAULT,
+ clr_descr, R_DMA_CH7_CLR_INTR__clr_descr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__DMA_registers
+ REG_SET__R_DMA_CH8_CLR_INTR(
+ clr_eop, R_DMA_CH8_CLR_INTR__clr_eop__DEFAULT,
+ clr_descr, R_DMA_CH8_CLR_INTR__clr_descr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__DMA_registers
+ REG_SET__R_DMA_CH8_SUB0_CLR_INTR(
+ clr_descr, R_DMA_CH8_SUB0_CLR_INTR__clr_descr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__DMA_registers
+ REG_SET__R_DMA_CH8_SUB1_CLR_INTR(
+ clr_descr, R_DMA_CH8_SUB1_CLR_INTR__clr_descr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__DMA_registers
+ REG_SET__R_DMA_CH8_SUB2_CLR_INTR(
+ clr_descr, R_DMA_CH8_SUB2_CLR_INTR__clr_descr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__DMA_registers
+ REG_SET__R_DMA_CH8_SUB3_CLR_INTR(
+ clr_descr, R_DMA_CH8_SUB3_CLR_INTR__clr_descr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__DMA_registers
+ REG_SET__R_DMA_CH9_CLR_INTR(
+ clr_eop, R_DMA_CH9_CLR_INTR__clr_eop__DEFAULT,
+ clr_descr, R_DMA_CH9_CLR_INTR__clr_descr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Bus_interface_configuration_registers
+ REG_SET__R_DRAM_CONFIG(
+ wmm1, R_DRAM_CONFIG__wmm1__DEFAULT,
+ wmm0, R_DRAM_CONFIG__wmm0__DEFAULT,
+ sh1, R_DRAM_CONFIG__sh1__DEFAULT,
+ sh0, R_DRAM_CONFIG__sh0__DEFAULT,
+ w, R_DRAM_CONFIG__w__DEFAULT,
+ c, R_DRAM_CONFIG__c__DEFAULT,
+ e, R_DRAM_CONFIG__e__DEFAULT,
+ group_sel, R_DRAM_CONFIG__group_sel__DEFAULT,
+ ca1, R_DRAM_CONFIG__ca1__DEFAULT,
+ bank23sel, R_DRAM_CONFIG__bank23sel__DEFAULT,
+ ca0, R_DRAM_CONFIG__ca0__DEFAULT,
+ bank01sel, R_DRAM_CONFIG__bank01sel__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Bus_interface_configuration_registers
+ REG_SET__R_DRAM_TIMING(
+ sdram, R_DRAM_TIMING__sdram__DEFAULT,
+ ref, R_DRAM_TIMING__ref__DEFAULT,
+ rp, R_DRAM_TIMING__rp__DEFAULT,
+ rs, R_DRAM_TIMING__rs__DEFAULT,
+ rh, R_DRAM_TIMING__rh__DEFAULT,
+ w, R_DRAM_TIMING__w__DEFAULT,
+ c, R_DRAM_TIMING__c__DEFAULT,
+ cz, R_DRAM_TIMING__cz__DEFAULT,
+ cp, R_DRAM_TIMING__cp__DEFAULT,
+ cw, R_DRAM_TIMING__cw__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__External_DMA_registers
+ REG_SET__R_EXT_DMA_0_ADDR(
+ ext0_addr, R_EXT_DMA_0_ADDR__ext0_addr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__External_DMA_registers
+ REG_SET__R_EXT_DMA_0_CMD(
+ cnt, R_EXT_DMA_0_CMD__cnt__DEFAULT,
+ rqpol, R_EXT_DMA_0_CMD__rqpol__DEFAULT,
+ apol, R_EXT_DMA_0_CMD__apol__DEFAULT,
+ rq_ack, R_EXT_DMA_0_CMD__rq_ack__DEFAULT,
+ wid, R_EXT_DMA_0_CMD__wid__DEFAULT,
+ dir, R_EXT_DMA_0_CMD__dir__DEFAULT,
+ run, R_EXT_DMA_0_CMD__run__DEFAULT,
+ trf_count, R_EXT_DMA_0_CMD__trf_count__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__External_DMA_registers
+ REG_SET__R_EXT_DMA_1_ADDR(
+ ext0_addr, R_EXT_DMA_1_ADDR__ext0_addr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__External_DMA_registers
+ REG_SET__R_EXT_DMA_1_CMD(
+ cnt, R_EXT_DMA_1_CMD__cnt__DEFAULT,
+ rqpol, R_EXT_DMA_1_CMD__rqpol__DEFAULT,
+ apol, R_EXT_DMA_1_CMD__apol__DEFAULT,
+ rq_ack, R_EXT_DMA_1_CMD__rq_ack__DEFAULT,
+ wid, R_EXT_DMA_1_CMD__wid__DEFAULT,
+ dir, R_EXT_DMA_1_CMD__dir__DEFAULT,
+ run, R_EXT_DMA_1_CMD__run__DEFAULT,
+ trf_count, R_EXT_DMA_1_CMD__trf_count__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__General_config_registers
+ REG_SET__R_GEN_CONFIG(
+ par_w, R_GEN_CONFIG__par_w__DEFAULT,
+ usb2, R_GEN_CONFIG__usb2__DEFAULT,
+ usb1, R_GEN_CONFIG__usb1__DEFAULT,
+ g24dir, R_GEN_CONFIG__g24dir__DEFAULT,
+ g16_23dir, R_GEN_CONFIG__g16_23dir__DEFAULT,
+ g8_15dir, R_GEN_CONFIG__g8_15dir__DEFAULT,
+ g0dir, R_GEN_CONFIG__g0dir__DEFAULT,
+ dma9, R_GEN_CONFIG__dma9__DEFAULT,
+ dma8, R_GEN_CONFIG__dma8__DEFAULT,
+ dma7, R_GEN_CONFIG__dma7__DEFAULT,
+ dma6, R_GEN_CONFIG__dma6__DEFAULT,
+ dma5, R_GEN_CONFIG__dma5__DEFAULT,
+ dma4, R_GEN_CONFIG__dma4__DEFAULT,
+ dma3, R_GEN_CONFIG__dma3__DEFAULT,
+ dma2, R_GEN_CONFIG__dma2__DEFAULT,
+ mio_w, R_GEN_CONFIG__mio_w__DEFAULT,
+ ser3, R_GEN_CONFIG__ser3__DEFAULT,
+ par1, R_GEN_CONFIG__par1__DEFAULT,
+ scsi0w, R_GEN_CONFIG__scsi0w__DEFAULT,
+ scsi1, R_GEN_CONFIG__scsi1__DEFAULT,
+ mio, R_GEN_CONFIG__mio__DEFAULT,
+ ser2, R_GEN_CONFIG__ser2__DEFAULT,
+ par0, R_GEN_CONFIG__par0__DEFAULT,
+ ata, R_GEN_CONFIG__ata__DEFAULT,
+ scsi0, R_GEN_CONFIG__scsi0__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__General_config_registers
+ REG_SET__R_GEN_CONFIG_II(
+ sermode3, R_GEN_CONFIG_II__sermode3__DEFAULT,
+ sermode1, R_GEN_CONFIG_II__sermode1__DEFAULT,
+ ext_clk, R_GEN_CONFIG_II__ext_clk__DEFAULT,
+ ser3, R_GEN_CONFIG_II__ser3__DEFAULT,
+ ser2, R_GEN_CONFIG_II__ser2__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+ REG_SET__R_IRQ_MASK0_CLR(
+ nmi_pin, R_IRQ_MASK0_CLR__nmi_pin__DEFAULT,
+ watchdog_nmi, R_IRQ_MASK0_CLR__watchdog_nmi__DEFAULT,
+ sqe_test_error, R_IRQ_MASK0_CLR__sqe_test_error__DEFAULT,
+ carrier_loss, R_IRQ_MASK0_CLR__carrier_loss__DEFAULT,
+ deferred, R_IRQ_MASK0_CLR__deferred__DEFAULT,
+ late_col, R_IRQ_MASK0_CLR__late_col__DEFAULT,
+ multiple_col, R_IRQ_MASK0_CLR__multiple_col__DEFAULT,
+ single_col, R_IRQ_MASK0_CLR__single_col__DEFAULT,
+ congestion, R_IRQ_MASK0_CLR__congestion__DEFAULT,
+ oversize, R_IRQ_MASK0_CLR__oversize__DEFAULT,
+ alignment_error, R_IRQ_MASK0_CLR__alignment_error__DEFAULT,
+ crc_error, R_IRQ_MASK0_CLR__crc_error__DEFAULT,
+ overrun, R_IRQ_MASK0_CLR__overrun__DEFAULT,
+ underrun, R_IRQ_MASK0_CLR__underrun__DEFAULT,
+ excessive_col, R_IRQ_MASK0_CLR__excessive_col__DEFAULT,
+ mdio, R_IRQ_MASK0_CLR__mdio__DEFAULT,
+ ata_drq3, R_IRQ_MASK0_CLR__ata_drq3__DEFAULT,
+ ata_drq2, R_IRQ_MASK0_CLR__ata_drq2__DEFAULT,
+ ata_drq1, R_IRQ_MASK0_CLR__ata_drq1__DEFAULT,
+ ata_drq0, R_IRQ_MASK0_CLR__ata_drq0__DEFAULT,
+ par0_ecp_cmd, R_IRQ_MASK0_CLR__par0_ecp_cmd__DEFAULT,
+ par0_peri, R_IRQ_MASK0_CLR__par0_peri__DEFAULT,
+ par0_data, R_IRQ_MASK0_CLR__par0_data__DEFAULT,
+ par0_ready, R_IRQ_MASK0_CLR__par0_ready__DEFAULT,
+ ata_dmaend, R_IRQ_MASK0_CLR__ata_dmaend__DEFAULT,
+ irq_ext_vector_nr, R_IRQ_MASK0_CLR__irq_ext_vector_nr__DEFAULT,
+ irq_int_vector_nr, R_IRQ_MASK0_CLR__irq_int_vector_nr__DEFAULT,
+ ext_dma1, R_IRQ_MASK0_CLR__ext_dma1__DEFAULT,
+ ext_dma0, R_IRQ_MASK0_CLR__ext_dma0__DEFAULT,
+ timer1, R_IRQ_MASK0_CLR__timer1__DEFAULT,
+ timer0, R_IRQ_MASK0_CLR__timer0__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+ REG_SET__R_IRQ_MASK0_SET(
+ nmi_pin, R_IRQ_MASK0_SET__nmi_pin__DEFAULT,
+ watchdog_nmi, R_IRQ_MASK0_SET__watchdog_nmi__DEFAULT,
+ sqe_test_error, R_IRQ_MASK0_SET__sqe_test_error__DEFAULT,
+ carrier_loss, R_IRQ_MASK0_SET__carrier_loss__DEFAULT,
+ deferred, R_IRQ_MASK0_SET__deferred__DEFAULT,
+ late_col, R_IRQ_MASK0_SET__late_col__DEFAULT,
+ multiple_col, R_IRQ_MASK0_SET__multiple_col__DEFAULT,
+ single_col, R_IRQ_MASK0_SET__single_col__DEFAULT,
+ congestion, R_IRQ_MASK0_SET__congestion__DEFAULT,
+ oversize, R_IRQ_MASK0_SET__oversize__DEFAULT,
+ alignment_error, R_IRQ_MASK0_SET__alignment_error__DEFAULT,
+ crc_error, R_IRQ_MASK0_SET__crc_error__DEFAULT,
+ overrun, R_IRQ_MASK0_SET__overrun__DEFAULT,
+ underrun, R_IRQ_MASK0_SET__underrun__DEFAULT,
+ excessive_col, R_IRQ_MASK0_SET__excessive_col__DEFAULT,
+ mdio, R_IRQ_MASK0_SET__mdio__DEFAULT,
+ ata_drq3, R_IRQ_MASK0_SET__ata_drq3__DEFAULT,
+ ata_drq2, R_IRQ_MASK0_SET__ata_drq2__DEFAULT,
+ ata_drq1, R_IRQ_MASK0_SET__ata_drq1__DEFAULT,
+ ata_drq0, R_IRQ_MASK0_SET__ata_drq0__DEFAULT,
+ par0_ecp_cmd, R_IRQ_MASK0_SET__par0_ecp_cmd__DEFAULT,
+ par0_peri, R_IRQ_MASK0_SET__par0_peri__DEFAULT,
+ par0_data, R_IRQ_MASK0_SET__par0_data__DEFAULT,
+ par0_ready, R_IRQ_MASK0_SET__par0_ready__DEFAULT,
+ ata_dmaend, R_IRQ_MASK0_SET__ata_dmaend__DEFAULT,
+ irq_ext_vector_nr, R_IRQ_MASK0_SET__irq_ext_vector_nr__DEFAULT,
+ irq_int_vector_nr, R_IRQ_MASK0_SET__irq_int_vector_nr__DEFAULT,
+ ext_dma1, R_IRQ_MASK0_SET__ext_dma1__DEFAULT,
+ ext_dma0, R_IRQ_MASK0_SET__ext_dma0__DEFAULT,
+ timer1, R_IRQ_MASK0_SET__timer1__DEFAULT,
+ timer0, R_IRQ_MASK0_SET__timer0__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+ REG_SET__R_IRQ_MASK1_CLR(
+ sw_int7, R_IRQ_MASK1_CLR__sw_int7__DEFAULT,
+ sw_int6, R_IRQ_MASK1_CLR__sw_int6__DEFAULT,
+ sw_int5, R_IRQ_MASK1_CLR__sw_int5__DEFAULT,
+ sw_int4, R_IRQ_MASK1_CLR__sw_int4__DEFAULT,
+ sw_int3, R_IRQ_MASK1_CLR__sw_int3__DEFAULT,
+ sw_int2, R_IRQ_MASK1_CLR__sw_int2__DEFAULT,
+ sw_int1, R_IRQ_MASK1_CLR__sw_int1__DEFAULT,
+ sw_int0, R_IRQ_MASK1_CLR__sw_int0__DEFAULT,
+ par1_ecp_cmd, R_IRQ_MASK1_CLR__par1_ecp_cmd__DEFAULT,
+ par1_peri, R_IRQ_MASK1_CLR__par1_peri__DEFAULT,
+ par1_data, R_IRQ_MASK1_CLR__par1_data__DEFAULT,
+ par1_ready, R_IRQ_MASK1_CLR__par1_ready__DEFAULT,
+ ser3_ready, R_IRQ_MASK1_CLR__ser3_ready__DEFAULT,
+ ser3_data, R_IRQ_MASK1_CLR__ser3_data__DEFAULT,
+ ser2_ready, R_IRQ_MASK1_CLR__ser2_ready__DEFAULT,
+ ser2_data, R_IRQ_MASK1_CLR__ser2_data__DEFAULT,
+ ser1_ready, R_IRQ_MASK1_CLR__ser1_ready__DEFAULT,
+ ser1_data, R_IRQ_MASK1_CLR__ser1_data__DEFAULT,
+ ser0_ready, R_IRQ_MASK1_CLR__ser0_ready__DEFAULT,
+ ser0_data, R_IRQ_MASK1_CLR__ser0_data__DEFAULT,
+ pa7, R_IRQ_MASK1_CLR__pa7__DEFAULT,
+ pa6, R_IRQ_MASK1_CLR__pa6__DEFAULT,
+ pa5, R_IRQ_MASK1_CLR__pa5__DEFAULT,
+ pa4, R_IRQ_MASK1_CLR__pa4__DEFAULT,
+ pa3, R_IRQ_MASK1_CLR__pa3__DEFAULT,
+ pa2, R_IRQ_MASK1_CLR__pa2__DEFAULT,
+ pa1, R_IRQ_MASK1_CLR__pa1__DEFAULT,
+ pa0, R_IRQ_MASK1_CLR__pa0__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+ REG_SET__R_IRQ_MASK1_SET(
+ sw_int7, R_IRQ_MASK1_SET__sw_int7__DEFAULT,
+ sw_int6, R_IRQ_MASK1_SET__sw_int6__DEFAULT,
+ sw_int5, R_IRQ_MASK1_SET__sw_int5__DEFAULT,
+ sw_int4, R_IRQ_MASK1_SET__sw_int4__DEFAULT,
+ sw_int3, R_IRQ_MASK1_SET__sw_int3__DEFAULT,
+ sw_int2, R_IRQ_MASK1_SET__sw_int2__DEFAULT,
+ sw_int1, R_IRQ_MASK1_SET__sw_int1__DEFAULT,
+ sw_int0, R_IRQ_MASK1_SET__sw_int0__DEFAULT,
+ par1_ecp_cmd, R_IRQ_MASK1_SET__par1_ecp_cmd__DEFAULT,
+ par1_peri, R_IRQ_MASK1_SET__par1_peri__DEFAULT,
+ par1_data, R_IRQ_MASK1_SET__par1_data__DEFAULT,
+ par1_ready, R_IRQ_MASK1_SET__par1_ready__DEFAULT,
+ ser3_ready, R_IRQ_MASK1_SET__ser3_ready__DEFAULT,
+ ser3_data, R_IRQ_MASK1_SET__ser3_data__DEFAULT,
+ ser2_ready, R_IRQ_MASK1_SET__ser2_ready__DEFAULT,
+ ser2_data, R_IRQ_MASK1_SET__ser2_data__DEFAULT,
+ ser1_ready, R_IRQ_MASK1_SET__ser1_ready__DEFAULT,
+ ser1_data, R_IRQ_MASK1_SET__ser1_data__DEFAULT,
+ ser0_ready, R_IRQ_MASK1_SET__ser0_ready__DEFAULT,
+ ser0_data, R_IRQ_MASK1_SET__ser0_data__DEFAULT,
+ pa7, R_IRQ_MASK1_SET__pa7__DEFAULT,
+ pa6, R_IRQ_MASK1_SET__pa6__DEFAULT,
+ pa5, R_IRQ_MASK1_SET__pa5__DEFAULT,
+ pa4, R_IRQ_MASK1_SET__pa4__DEFAULT,
+ pa3, R_IRQ_MASK1_SET__pa3__DEFAULT,
+ pa2, R_IRQ_MASK1_SET__pa2__DEFAULT,
+ pa1, R_IRQ_MASK1_SET__pa1__DEFAULT,
+ pa0, R_IRQ_MASK1_SET__pa0__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+ REG_SET__R_IRQ_MASK2_CLR(
+ dma8_sub3_descr, R_IRQ_MASK2_CLR__dma8_sub3_descr__DEFAULT,
+ dma8_sub2_descr, R_IRQ_MASK2_CLR__dma8_sub2_descr__DEFAULT,
+ dma8_sub1_descr, R_IRQ_MASK2_CLR__dma8_sub1_descr__DEFAULT,
+ dma8_sub0_descr, R_IRQ_MASK2_CLR__dma8_sub0_descr__DEFAULT,
+ dma9_eop, R_IRQ_MASK2_CLR__dma9_eop__DEFAULT,
+ dma9_descr, R_IRQ_MASK2_CLR__dma9_descr__DEFAULT,
+ dma8_eop, R_IRQ_MASK2_CLR__dma8_eop__DEFAULT,
+ dma8_descr, R_IRQ_MASK2_CLR__dma8_descr__DEFAULT,
+ dma7_eop, R_IRQ_MASK2_CLR__dma7_eop__DEFAULT,
+ dma7_descr, R_IRQ_MASK2_CLR__dma7_descr__DEFAULT,
+ dma6_eop, R_IRQ_MASK2_CLR__dma6_eop__DEFAULT,
+ dma6_descr, R_IRQ_MASK2_CLR__dma6_descr__DEFAULT,
+ dma5_eop, R_IRQ_MASK2_CLR__dma5_eop__DEFAULT,
+ dma5_descr, R_IRQ_MASK2_CLR__dma5_descr__DEFAULT,
+ dma4_eop, R_IRQ_MASK2_CLR__dma4_eop__DEFAULT,
+ dma4_descr, R_IRQ_MASK2_CLR__dma4_descr__DEFAULT,
+ dma3_eop, R_IRQ_MASK2_CLR__dma3_eop__DEFAULT,
+ dma3_descr, R_IRQ_MASK2_CLR__dma3_descr__DEFAULT,
+ dma2_eop, R_IRQ_MASK2_CLR__dma2_eop__DEFAULT,
+ dma2_descr, R_IRQ_MASK2_CLR__dma2_descr__DEFAULT,
+ dma1_eop, R_IRQ_MASK2_CLR__dma1_eop__DEFAULT,
+ dma1_descr, R_IRQ_MASK2_CLR__dma1_descr__DEFAULT,
+ dma0_eop, R_IRQ_MASK2_CLR__dma0_eop__DEFAULT,
+ dma0_descr, R_IRQ_MASK2_CLR__dma0_descr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+ REG_SET__R_IRQ_MASK2_SET(
+ dma8_sub3_descr, R_IRQ_MASK2_SET__dma8_sub3_descr__DEFAULT,
+ dma8_sub2_descr, R_IRQ_MASK2_SET__dma8_sub2_descr__DEFAULT,
+ dma8_sub1_descr, R_IRQ_MASK2_SET__dma8_sub1_descr__DEFAULT,
+ dma8_sub0_descr, R_IRQ_MASK2_SET__dma8_sub0_descr__DEFAULT,
+ dma9_eop, R_IRQ_MASK2_SET__dma9_eop__DEFAULT,
+ dma9_descr, R_IRQ_MASK2_SET__dma9_descr__DEFAULT,
+ dma8_eop, R_IRQ_MASK2_SET__dma8_eop__DEFAULT,
+ dma8_descr, R_IRQ_MASK2_SET__dma8_descr__DEFAULT,
+ dma7_eop, R_IRQ_MASK2_SET__dma7_eop__DEFAULT,
+ dma7_descr, R_IRQ_MASK2_SET__dma7_descr__DEFAULT,
+ dma6_eop, R_IRQ_MASK2_SET__dma6_eop__DEFAULT,
+ dma6_descr, R_IRQ_MASK2_SET__dma6_descr__DEFAULT,
+ dma5_eop, R_IRQ_MASK2_SET__dma5_eop__DEFAULT,
+ dma5_descr, R_IRQ_MASK2_SET__dma5_descr__DEFAULT,
+ dma4_eop, R_IRQ_MASK2_SET__dma4_eop__DEFAULT,
+ dma4_descr, R_IRQ_MASK2_SET__dma4_descr__DEFAULT,
+ dma3_eop, R_IRQ_MASK2_SET__dma3_eop__DEFAULT,
+ dma3_descr, R_IRQ_MASK2_SET__dma3_descr__DEFAULT,
+ dma2_eop, R_IRQ_MASK2_SET__dma2_eop__DEFAULT,
+ dma2_descr, R_IRQ_MASK2_SET__dma2_descr__DEFAULT,
+ dma1_eop, R_IRQ_MASK2_SET__dma1_eop__DEFAULT,
+ dma1_descr, R_IRQ_MASK2_SET__dma1_descr__DEFAULT,
+ dma0_eop, R_IRQ_MASK2_SET__dma0_eop__DEFAULT,
+ dma0_descr, R_IRQ_MASK2_SET__dma0_descr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__MMU_registers
+ REG_SET__R_MMU_CONFIG(
+ mmu_enable, R_MMU_CONFIG__mmu_enable__DEFAULT,
+ inv_excp, R_MMU_CONFIG__inv_excp__DEFAULT,
+ acc_excp, R_MMU_CONFIG__acc_excp__DEFAULT,
+ we_excp, R_MMU_CONFIG__we_excp__DEFAULT,
+ seg_f, R_MMU_CONFIG__seg_f__DEFAULT,
+ seg_e, R_MMU_CONFIG__seg_e__DEFAULT,
+ seg_d, R_MMU_CONFIG__seg_d__DEFAULT,
+ seg_c, R_MMU_CONFIG__seg_c__DEFAULT,
+ seg_b, R_MMU_CONFIG__seg_b__DEFAULT,
+ seg_a, R_MMU_CONFIG__seg_a__DEFAULT,
+ seg_9, R_MMU_CONFIG__seg_9__DEFAULT,
+ seg_8, R_MMU_CONFIG__seg_8__DEFAULT,
+ seg_7, R_MMU_CONFIG__seg_7__DEFAULT,
+ seg_6, R_MMU_CONFIG__seg_6__DEFAULT,
+ seg_5, R_MMU_CONFIG__seg_5__DEFAULT,
+ seg_4, R_MMU_CONFIG__seg_4__DEFAULT,
+ seg_3, R_MMU_CONFIG__seg_3__DEFAULT,
+ seg_2, R_MMU_CONFIG__seg_2__DEFAULT,
+ seg_1, R_MMU_CONFIG__seg_1__DEFAULT,
+ seg_0, R_MMU_CONFIG__seg_0__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__MMU_registers
+ REG_SET__R_MMU_CTRL(
+ inv_excp, R_MMU_CTRL__inv_excp__DEFAULT,
+ acc_excp, R_MMU_CTRL__acc_excp__DEFAULT,
+ we_excp, R_MMU_CTRL__we_excp__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__MMU_registers
+ REG_SET__R_MMU_ENABLE(
+ mmu_enable, R_MMU_ENABLE__mmu_enable__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__MMU_registers
+ REG_SET__R_MMU_KBASE_HI(
+ base_f, R_MMU_KBASE_HI__base_f__DEFAULT,
+ base_e, R_MMU_KBASE_HI__base_e__DEFAULT,
+ base_d, R_MMU_KBASE_HI__base_d__DEFAULT,
+ base_c, R_MMU_KBASE_HI__base_c__DEFAULT,
+ base_b, R_MMU_KBASE_HI__base_b__DEFAULT,
+ base_a, R_MMU_KBASE_HI__base_a__DEFAULT,
+ base_9, R_MMU_KBASE_HI__base_9__DEFAULT,
+ base_8, R_MMU_KBASE_HI__base_8__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__MMU_registers
+ REG_SET__R_MMU_KBASE_LO(
+ base_7, R_MMU_KBASE_LO__base_7__DEFAULT,
+ base_6, R_MMU_KBASE_LO__base_6__DEFAULT,
+ base_5, R_MMU_KBASE_LO__base_5__DEFAULT,
+ base_4, R_MMU_KBASE_LO__base_4__DEFAULT,
+ base_3, R_MMU_KBASE_LO__base_3__DEFAULT,
+ base_2, R_MMU_KBASE_LO__base_2__DEFAULT,
+ base_1, R_MMU_KBASE_LO__base_1__DEFAULT,
+ base_0, R_MMU_KBASE_LO__base_0__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__MMU_registers
+ REG_SET__R_MMU_KSEG(
+ seg_f, R_MMU_KSEG__seg_f__DEFAULT,
+ seg_e, R_MMU_KSEG__seg_e__DEFAULT,
+ seg_d, R_MMU_KSEG__seg_d__DEFAULT,
+ seg_c, R_MMU_KSEG__seg_c__DEFAULT,
+ seg_b, R_MMU_KSEG__seg_b__DEFAULT,
+ seg_a, R_MMU_KSEG__seg_a__DEFAULT,
+ seg_9, R_MMU_KSEG__seg_9__DEFAULT,
+ seg_8, R_MMU_KSEG__seg_8__DEFAULT,
+ seg_7, R_MMU_KSEG__seg_7__DEFAULT,
+ seg_6, R_MMU_KSEG__seg_6__DEFAULT,
+ seg_5, R_MMU_KSEG__seg_5__DEFAULT,
+ seg_4, R_MMU_KSEG__seg_4__DEFAULT,
+ seg_3, R_MMU_KSEG__seg_3__DEFAULT,
+ seg_2, R_MMU_KSEG__seg_2__DEFAULT,
+ seg_1, R_MMU_KSEG__seg_1__DEFAULT,
+ seg_0, R_MMU_KSEG__seg_0__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Network_interface_registers
+ REG_SET__R_NETWORK_GA_0(
+ ga_low, R_NETWORK_GA_0__ga_low__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Network_interface_registers
+ REG_SET__R_NETWORK_GA_1(
+ ga_high, R_NETWORK_GA_1__ga_high__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Network_interface_registers
+ REG_SET__R_NETWORK_GEN_CONFIG(
+ loopback, R_NETWORK_GEN_CONFIG__loopback__DEFAULT,
+ frame, R_NETWORK_GEN_CONFIG__frame__DEFAULT,
+ vg, R_NETWORK_GEN_CONFIG__vg__DEFAULT,
+ phy, R_NETWORK_GEN_CONFIG__phy__DEFAULT,
+ enable, R_NETWORK_GEN_CONFIG__enable__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Network_interface_registers
+ REG_SET__R_NETWORK_MGM_CTRL(
+ txd_pins, R_NETWORK_MGM_CTRL__txd_pins__DEFAULT,
+ txer_pin, R_NETWORK_MGM_CTRL__txer_pin__DEFAULT,
+ mdck, R_NETWORK_MGM_CTRL__mdck__DEFAULT,
+ mdoe, R_NETWORK_MGM_CTRL__mdoe__DEFAULT,
+ mdio, R_NETWORK_MGM_CTRL__mdio__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Network_interface_registers
+ REG_SET__R_NETWORK_REC_CONFIG(
+ max_size, R_NETWORK_REC_CONFIG__max_size__DEFAULT,
+ duplex, R_NETWORK_REC_CONFIG__duplex__DEFAULT,
+ bad_crc, R_NETWORK_REC_CONFIG__bad_crc__DEFAULT,
+ oversize, R_NETWORK_REC_CONFIG__oversize__DEFAULT,
+ undersize, R_NETWORK_REC_CONFIG__undersize__DEFAULT,
+ all_roots, R_NETWORK_REC_CONFIG__all_roots__DEFAULT,
+ tr_broadcast, R_NETWORK_REC_CONFIG__tr_broadcast__DEFAULT,
+ broadcast, R_NETWORK_REC_CONFIG__broadcast__DEFAULT,
+ individual, R_NETWORK_REC_CONFIG__individual__DEFAULT,
+ ma1, R_NETWORK_REC_CONFIG__ma1__DEFAULT,
+ ma0, R_NETWORK_REC_CONFIG__ma0__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Network_interface_registers
+ REG_SET__R_NETWORK_SA_0(
+ ma0_low, R_NETWORK_SA_0__ma0_low__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Network_interface_registers
+ REG_SET__R_NETWORK_SA_1(
+ ma1_low, R_NETWORK_SA_1__ma1_low__DEFAULT,
+ ma0_high, R_NETWORK_SA_1__ma0_high__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Network_interface_registers
+ REG_SET__R_NETWORK_SA_2(
+ ma1_high, R_NETWORK_SA_2__ma1_high__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Network_interface_registers
+ REG_SET__R_NETWORK_TR_CTRL(
+ clr_error, R_NETWORK_TR_CTRL__clr_error__DEFAULT,
+ delay, R_NETWORK_TR_CTRL__delay__DEFAULT,
+ cancel, R_NETWORK_TR_CTRL__cancel__DEFAULT,
+ cd, R_NETWORK_TR_CTRL__cd__DEFAULT,
+ retry, R_NETWORK_TR_CTRL__retry__DEFAULT,
+ pad, R_NETWORK_TR_CTRL__pad__DEFAULT,
+ crc, R_NETWORK_TR_CTRL__crc__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Parallel_printer_port_registers
+ REG_SET__R_PAR0_CONFIG(
+ ioe, R_PAR0_CONFIG__ioe__DEFAULT,
+ iseli, R_PAR0_CONFIG__iseli__DEFAULT,
+ iautofd, R_PAR0_CONFIG__iautofd__DEFAULT,
+ istrb, R_PAR0_CONFIG__istrb__DEFAULT,
+ iinit, R_PAR0_CONFIG__iinit__DEFAULT,
+ iperr, R_PAR0_CONFIG__iperr__DEFAULT,
+ iack, R_PAR0_CONFIG__iack__DEFAULT,
+ ibusy, R_PAR0_CONFIG__ibusy__DEFAULT,
+ ifault, R_PAR0_CONFIG__ifault__DEFAULT,
+ isel, R_PAR0_CONFIG__isel__DEFAULT,
+ ext_mode, R_PAR0_CONFIG__ext_mode__DEFAULT,
+ wide, R_PAR0_CONFIG__wide__DEFAULT,
+ dma, R_PAR0_CONFIG__dma__DEFAULT,
+ rle_in, R_PAR0_CONFIG__rle_in__DEFAULT,
+ rle_out, R_PAR0_CONFIG__rle_out__DEFAULT,
+ enable, R_PAR0_CONFIG__enable__DEFAULT,
+ force, R_PAR0_CONFIG__force__DEFAULT,
+ ign_ack, R_PAR0_CONFIG__ign_ack__DEFAULT,
+ oe_ack, R_PAR0_CONFIG__oe_ack__DEFAULT,
+ mode, R_PAR0_CONFIG__mode__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Parallel_printer_port_registers
+ REG_SET__R_PAR0_CTRL(
+ ctrl, R_PAR0_CTRL__ctrl__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Parallel_printer_port_registers
+ REG_SET__R_PAR0_CTRL_DATA(
+ peri_int, R_PAR0_CTRL_DATA__peri_int__DEFAULT,
+ oe, R_PAR0_CTRL_DATA__oe__DEFAULT,
+ seli, R_PAR0_CTRL_DATA__seli__DEFAULT,
+ autofd, R_PAR0_CTRL_DATA__autofd__DEFAULT,
+ strb, R_PAR0_CTRL_DATA__strb__DEFAULT,
+ init, R_PAR0_CTRL_DATA__init__DEFAULT,
+ ecp_cmd, R_PAR0_CTRL_DATA__ecp_cmd__DEFAULT,
+ data, R_PAR0_CTRL_DATA__data__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Parallel_printer_port_registers
+ REG_SET__R_PAR0_DELAY(
+ fine_hold, R_PAR0_DELAY__fine_hold__DEFAULT,
+ hold, R_PAR0_DELAY__hold__DEFAULT,
+ fine_strb, R_PAR0_DELAY__fine_strb__DEFAULT,
+ strobe, R_PAR0_DELAY__strobe__DEFAULT,
+ fine_setup, R_PAR0_DELAY__fine_setup__DEFAULT,
+ setup, R_PAR0_DELAY__setup__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Parallel_printer_port_registers
+ REG_SET__R_PAR1_CONFIG(
+ ioe, R_PAR1_CONFIG__ioe__DEFAULT,
+ iseli, R_PAR1_CONFIG__iseli__DEFAULT,
+ iautofd, R_PAR1_CONFIG__iautofd__DEFAULT,
+ istrb, R_PAR1_CONFIG__istrb__DEFAULT,
+ iinit, R_PAR1_CONFIG__iinit__DEFAULT,
+ iperr, R_PAR1_CONFIG__iperr__DEFAULT,
+ iack, R_PAR1_CONFIG__iack__DEFAULT,
+ ibusy, R_PAR1_CONFIG__ibusy__DEFAULT,
+ ifault, R_PAR1_CONFIG__ifault__DEFAULT,
+ isel, R_PAR1_CONFIG__isel__DEFAULT,
+ ext_mode, R_PAR1_CONFIG__ext_mode__DEFAULT,
+ dma, R_PAR1_CONFIG__dma__DEFAULT,
+ rle_in, R_PAR1_CONFIG__rle_in__DEFAULT,
+ rle_out, R_PAR1_CONFIG__rle_out__DEFAULT,
+ enable, R_PAR1_CONFIG__enable__DEFAULT,
+ force, R_PAR1_CONFIG__force__DEFAULT,
+ ign_ack, R_PAR1_CONFIG__ign_ack__DEFAULT,
+ oe_ack, R_PAR1_CONFIG__oe_ack__DEFAULT,
+ mode, R_PAR1_CONFIG__mode__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Parallel_printer_port_registers
+ REG_SET__R_PAR1_CTRL(
+ ctrl, R_PAR1_CTRL__ctrl__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Parallel_printer_port_registers
+ REG_SET__R_PAR1_CTRL_DATA(
+ peri_int, R_PAR1_CTRL_DATA__peri_int__DEFAULT,
+ oe, R_PAR1_CTRL_DATA__oe__DEFAULT,
+ seli, R_PAR1_CTRL_DATA__seli__DEFAULT,
+ autofd, R_PAR1_CTRL_DATA__autofd__DEFAULT,
+ strb, R_PAR1_CTRL_DATA__strb__DEFAULT,
+ init, R_PAR1_CTRL_DATA__init__DEFAULT,
+ ecp_cmd, R_PAR1_CTRL_DATA__ecp_cmd__DEFAULT,
+ data, R_PAR1_CTRL_DATA__data__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Parallel_printer_port_registers
+ REG_SET__R_PAR1_DELAY(
+ fine_hold, R_PAR1_DELAY__fine_hold__DEFAULT,
+ hold, R_PAR1_DELAY__hold__DEFAULT,
+ fine_strb, R_PAR1_DELAY__fine_strb__DEFAULT,
+ strobe, R_PAR1_DELAY__strobe__DEFAULT,
+ fine_setup, R_PAR1_DELAY__fine_setup__DEFAULT,
+ setup, R_PAR1_DELAY__setup__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__General_port_configuration_registers
+ REG_SET__R_PORT_PA_DATA(
+ data_out, R_PORT_PA_DATA__data_out__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__General_port_configuration_registers
+ REG_SET__R_PORT_PA_DIR(
+ dir7, R_PORT_PA_DIR__dir7__DEFAULT,
+ dir6, R_PORT_PA_DIR__dir6__DEFAULT,
+ dir5, R_PORT_PA_DIR__dir5__DEFAULT,
+ dir4, R_PORT_PA_DIR__dir4__DEFAULT,
+ dir3, R_PORT_PA_DIR__dir3__DEFAULT,
+ dir2, R_PORT_PA_DIR__dir2__DEFAULT,
+ dir1, R_PORT_PA_DIR__dir1__DEFAULT,
+ dir0, R_PORT_PA_DIR__dir0__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__General_port_configuration_registers
+ REG_SET__R_PORT_PA_SET(
+ dir7, R_PORT_PA_SET__dir7__DEFAULT,
+ dir6, R_PORT_PA_SET__dir6__DEFAULT,
+ dir5, R_PORT_PA_SET__dir5__DEFAULT,
+ dir4, R_PORT_PA_SET__dir4__DEFAULT,
+ dir3, R_PORT_PA_SET__dir3__DEFAULT,
+ dir2, R_PORT_PA_SET__dir2__DEFAULT,
+ dir1, R_PORT_PA_SET__dir1__DEFAULT,
+ dir0, R_PORT_PA_SET__dir0__DEFAULT,
+ data_out, R_PORT_PA_SET__data_out__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__General_port_configuration_registers
+ REG_SET__R_PORT_PB_CONFIG(
+ cs7, R_PORT_PB_CONFIG__cs7__DEFAULT,
+ cs6, R_PORT_PB_CONFIG__cs6__DEFAULT,
+ cs5, R_PORT_PB_CONFIG__cs5__DEFAULT,
+ cs4, R_PORT_PB_CONFIG__cs4__DEFAULT,
+ cs3, R_PORT_PB_CONFIG__cs3__DEFAULT,
+ cs2, R_PORT_PB_CONFIG__cs2__DEFAULT,
+ scsi1, R_PORT_PB_CONFIG__scsi1__DEFAULT,
+ scsi0, R_PORT_PB_CONFIG__scsi0__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__General_port_configuration_registers
+ REG_SET__R_PORT_PB_DATA(
+ data_out, R_PORT_PB_DATA__data_out__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__General_port_configuration_registers
+ REG_SET__R_PORT_PB_DIR(
+ dir7, R_PORT_PB_DIR__dir7__DEFAULT,
+ dir6, R_PORT_PB_DIR__dir6__DEFAULT,
+ dir5, R_PORT_PB_DIR__dir5__DEFAULT,
+ dir4, R_PORT_PB_DIR__dir4__DEFAULT,
+ dir3, R_PORT_PB_DIR__dir3__DEFAULT,
+ dir2, R_PORT_PB_DIR__dir2__DEFAULT,
+ dir1, R_PORT_PB_DIR__dir1__DEFAULT,
+ dir0, R_PORT_PB_DIR__dir0__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__General_port_configuration_registers
+ REG_SET__R_PORT_PB_I2C(
+ syncser3, R_PORT_PB_I2C__syncser3__DEFAULT,
+ syncser1, R_PORT_PB_I2C__syncser1__DEFAULT,
+ i2c_en, R_PORT_PB_I2C__i2c_en__DEFAULT,
+ i2c_d, R_PORT_PB_I2C__i2c_d__DEFAULT,
+ i2c_clk, R_PORT_PB_I2C__i2c_clk__DEFAULT,
+ i2c_oe_, R_PORT_PB_I2C__i2c_oe___DEFAULT
+ );
+#endif
+
+#if USE_GROUP__General_port_configuration_registers
+ REG_SET__R_PORT_PB_SET(
+ syncser3, R_PORT_PB_SET__syncser3__DEFAULT,
+ syncser1, R_PORT_PB_SET__syncser1__DEFAULT,
+ i2c_en, R_PORT_PB_SET__i2c_en__DEFAULT,
+ i2c_d, R_PORT_PB_SET__i2c_d__DEFAULT,
+ i2c_clk, R_PORT_PB_SET__i2c_clk__DEFAULT,
+ i2c_oe_, R_PORT_PB_SET__i2c_oe___DEFAULT,
+ cs7, R_PORT_PB_SET__cs7__DEFAULT,
+ cs6, R_PORT_PB_SET__cs6__DEFAULT,
+ cs5, R_PORT_PB_SET__cs5__DEFAULT,
+ cs4, R_PORT_PB_SET__cs4__DEFAULT,
+ cs3, R_PORT_PB_SET__cs3__DEFAULT,
+ cs2, R_PORT_PB_SET__cs2__DEFAULT,
+ scsi1, R_PORT_PB_SET__scsi1__DEFAULT,
+ scsi0, R_PORT_PB_SET__scsi0__DEFAULT,
+ dir7, R_PORT_PB_SET__dir7__DEFAULT,
+ dir6, R_PORT_PB_SET__dir6__DEFAULT,
+ dir5, R_PORT_PB_SET__dir5__DEFAULT,
+ dir4, R_PORT_PB_SET__dir4__DEFAULT,
+ dir3, R_PORT_PB_SET__dir3__DEFAULT,
+ dir2, R_PORT_PB_SET__dir2__DEFAULT,
+ dir1, R_PORT_PB_SET__dir1__DEFAULT,
+ dir0, R_PORT_PB_SET__dir0__DEFAULT,
+ data_out, R_PORT_PB_SET__data_out__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__SCSI_registers
+ REG_SET__R_SCSI0_CMD(
+ asynch_setup, R_SCSI0_CMD__asynch_setup__DEFAULT,
+ command, R_SCSI0_CMD__command__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__SCSI_registers
+ REG_SET__R_SCSI0_CMD_DATA(
+ parity_in, R_SCSI0_CMD_DATA__parity_in__DEFAULT,
+ skip, R_SCSI0_CMD_DATA__skip__DEFAULT,
+ clr_status, R_SCSI0_CMD_DATA__clr_status__DEFAULT,
+ asynch_setup, R_SCSI0_CMD_DATA__asynch_setup__DEFAULT,
+ command, R_SCSI0_CMD_DATA__command__DEFAULT,
+ data_out, R_SCSI0_CMD_DATA__data_out__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__SCSI_registers
+ REG_SET__R_SCSI0_CTRL(
+ id_type, R_SCSI0_CTRL__id_type__DEFAULT,
+ sel_timeout, R_SCSI0_CTRL__sel_timeout__DEFAULT,
+ synch_per, R_SCSI0_CTRL__synch_per__DEFAULT,
+ rst, R_SCSI0_CTRL__rst__DEFAULT,
+ atn, R_SCSI0_CTRL__atn__DEFAULT,
+ my_id, R_SCSI0_CTRL__my_id__DEFAULT,
+ target_id, R_SCSI0_CTRL__target_id__DEFAULT,
+ fast_20, R_SCSI0_CTRL__fast_20__DEFAULT,
+ bus_width, R_SCSI0_CTRL__bus_width__DEFAULT,
+ synch, R_SCSI0_CTRL__synch__DEFAULT,
+ enable, R_SCSI0_CTRL__enable__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__SCSI_registers
+ REG_SET__R_SCSI0_DATA(
+ data_out, R_SCSI0_DATA__data_out__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__SCSI_registers
+ REG_SET__R_SCSI0_STATUS_CTRL(
+ parity_in, R_SCSI0_STATUS_CTRL__parity_in__DEFAULT,
+ skip, R_SCSI0_STATUS_CTRL__skip__DEFAULT,
+ clr_status, R_SCSI0_STATUS_CTRL__clr_status__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__SCSI_registers
+ REG_SET__R_SCSI1_CMD(
+ asynch_setup, R_SCSI1_CMD__asynch_setup__DEFAULT,
+ command, R_SCSI1_CMD__command__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__SCSI_registers
+ REG_SET__R_SCSI1_CMD_DATA(
+ parity_in, R_SCSI1_CMD_DATA__parity_in__DEFAULT,
+ skip, R_SCSI1_CMD_DATA__skip__DEFAULT,
+ clr_status, R_SCSI1_CMD_DATA__clr_status__DEFAULT,
+ asynch_setup, R_SCSI1_CMD_DATA__asynch_setup__DEFAULT,
+ command, R_SCSI1_CMD_DATA__command__DEFAULT,
+ data_out, R_SCSI1_CMD_DATA__data_out__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__SCSI_registers
+ REG_SET__R_SCSI1_CTRL(
+ id_type, R_SCSI1_CTRL__id_type__DEFAULT,
+ sel_timeout, R_SCSI1_CTRL__sel_timeout__DEFAULT,
+ synch_per, R_SCSI1_CTRL__synch_per__DEFAULT,
+ rst, R_SCSI1_CTRL__rst__DEFAULT,
+ atn, R_SCSI1_CTRL__atn__DEFAULT,
+ my_id, R_SCSI1_CTRL__my_id__DEFAULT,
+ target_id, R_SCSI1_CTRL__target_id__DEFAULT,
+ fast_20, R_SCSI1_CTRL__fast_20__DEFAULT,
+ bus_width, R_SCSI1_CTRL__bus_width__DEFAULT,
+ synch, R_SCSI1_CTRL__synch__DEFAULT,
+ enable, R_SCSI1_CTRL__enable__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__SCSI_registers
+ REG_SET__R_SCSI1_DATA(
+ data_out, R_SCSI1_DATA__data_out__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__SCSI_registers
+ REG_SET__R_SCSI1_STATUS_CTRL(
+ parity_in, R_SCSI1_STATUS_CTRL__parity_in__DEFAULT,
+ skip, R_SCSI1_STATUS_CTRL__skip__DEFAULT,
+ clr_status, R_SCSI1_STATUS_CTRL__clr_status__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Bus_interface_configuration_registers
+ REG_SET__R_SDRAM_CONFIG(
+ wmm1, R_SDRAM_CONFIG__wmm1__DEFAULT,
+ wmm0, R_SDRAM_CONFIG__wmm0__DEFAULT,
+ sh1, R_SDRAM_CONFIG__sh1__DEFAULT,
+ sh0, R_SDRAM_CONFIG__sh0__DEFAULT,
+ w, R_SDRAM_CONFIG__w__DEFAULT,
+ type1, R_SDRAM_CONFIG__type1__DEFAULT,
+ type0, R_SDRAM_CONFIG__type0__DEFAULT,
+ group_sel, R_SDRAM_CONFIG__group_sel__DEFAULT,
+ ca1, R_SDRAM_CONFIG__ca1__DEFAULT,
+ bank_sel1, R_SDRAM_CONFIG__bank_sel1__DEFAULT,
+ ca0, R_SDRAM_CONFIG__ca0__DEFAULT,
+ bank_sel0, R_SDRAM_CONFIG__bank_sel0__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Bus_interface_configuration_registers
+ REG_SET__R_SDRAM_TIMING(
+ sdram, R_SDRAM_TIMING__sdram__DEFAULT,
+ mrs_data, R_SDRAM_TIMING__mrs_data__DEFAULT,
+ ref, R_SDRAM_TIMING__ref__DEFAULT,
+ ddr, R_SDRAM_TIMING__ddr__DEFAULT,
+ clk100, R_SDRAM_TIMING__clk100__DEFAULT,
+ ps, R_SDRAM_TIMING__ps__DEFAULT,
+ cmd, R_SDRAM_TIMING__cmd__DEFAULT,
+ pde, R_SDRAM_TIMING__pde__DEFAULT,
+ rc, R_SDRAM_TIMING__rc__DEFAULT,
+ rp, R_SDRAM_TIMING__rp__DEFAULT,
+ rcd, R_SDRAM_TIMING__rcd__DEFAULT,
+ cl, R_SDRAM_TIMING__cl__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL0_BAUD(
+ tr_baud, R_SERIAL0_BAUD__tr_baud__DEFAULT,
+ rec_baud, R_SERIAL0_BAUD__rec_baud__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL0_CTRL(
+ tr_baud, R_SERIAL0_CTRL__tr_baud__DEFAULT,
+ rec_baud, R_SERIAL0_CTRL__rec_baud__DEFAULT,
+ dma_err, R_SERIAL0_CTRL__dma_err__DEFAULT,
+ rec_enable, R_SERIAL0_CTRL__rec_enable__DEFAULT,
+ rts_, R_SERIAL0_CTRL__rts___DEFAULT,
+ sampling, R_SERIAL0_CTRL__sampling__DEFAULT,
+ rec_stick_par, R_SERIAL0_CTRL__rec_stick_par__DEFAULT,
+ rec_par, R_SERIAL0_CTRL__rec_par__DEFAULT,
+ rec_par_en, R_SERIAL0_CTRL__rec_par_en__DEFAULT,
+ rec_bitnr, R_SERIAL0_CTRL__rec_bitnr__DEFAULT,
+ txd, R_SERIAL0_CTRL__txd__DEFAULT,
+ tr_enable, R_SERIAL0_CTRL__tr_enable__DEFAULT,
+ auto_cts, R_SERIAL0_CTRL__auto_cts__DEFAULT,
+ stop_bits, R_SERIAL0_CTRL__stop_bits__DEFAULT,
+ tr_stick_par, R_SERIAL0_CTRL__tr_stick_par__DEFAULT,
+ tr_par, R_SERIAL0_CTRL__tr_par__DEFAULT,
+ tr_par_en, R_SERIAL0_CTRL__tr_par_en__DEFAULT,
+ tr_bitnr, R_SERIAL0_CTRL__tr_bitnr__DEFAULT,
+ data_out, R_SERIAL0_CTRL__data_out__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL0_REC_CTRL(
+ dma_err, R_SERIAL0_REC_CTRL__dma_err__DEFAULT,
+ rec_enable, R_SERIAL0_REC_CTRL__rec_enable__DEFAULT,
+ rts_, R_SERIAL0_REC_CTRL__rts___DEFAULT,
+ sampling, R_SERIAL0_REC_CTRL__sampling__DEFAULT,
+ rec_stick_par, R_SERIAL0_REC_CTRL__rec_stick_par__DEFAULT,
+ rec_par, R_SERIAL0_REC_CTRL__rec_par__DEFAULT,
+ rec_par_en, R_SERIAL0_REC_CTRL__rec_par_en__DEFAULT,
+ rec_bitnr, R_SERIAL0_REC_CTRL__rec_bitnr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL0_TR_CTRL(
+ txd, R_SERIAL0_TR_CTRL__txd__DEFAULT,
+ tr_enable, R_SERIAL0_TR_CTRL__tr_enable__DEFAULT,
+ auto_cts, R_SERIAL0_TR_CTRL__auto_cts__DEFAULT,
+ stop_bits, R_SERIAL0_TR_CTRL__stop_bits__DEFAULT,
+ tr_stick_par, R_SERIAL0_TR_CTRL__tr_stick_par__DEFAULT,
+ tr_par, R_SERIAL0_TR_CTRL__tr_par__DEFAULT,
+ tr_par_en, R_SERIAL0_TR_CTRL__tr_par_en__DEFAULT,
+ tr_bitnr, R_SERIAL0_TR_CTRL__tr_bitnr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL0_TR_DATA(
+ data_out, R_SERIAL0_TR_DATA__data_out__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL0_XOFF(
+ tx_stop, R_SERIAL0_XOFF__tx_stop__DEFAULT,
+ auto_xoff, R_SERIAL0_XOFF__auto_xoff__DEFAULT,
+ xoff_char, R_SERIAL0_XOFF__xoff_char__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL1_BAUD(
+ tr_baud, R_SERIAL1_BAUD__tr_baud__DEFAULT,
+ rec_baud, R_SERIAL1_BAUD__rec_baud__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL1_CTRL(
+ tr_baud, R_SERIAL1_CTRL__tr_baud__DEFAULT,
+ rec_baud, R_SERIAL1_CTRL__rec_baud__DEFAULT,
+ dma_err, R_SERIAL1_CTRL__dma_err__DEFAULT,
+ rec_enable, R_SERIAL1_CTRL__rec_enable__DEFAULT,
+ rts_, R_SERIAL1_CTRL__rts___DEFAULT,
+ sampling, R_SERIAL1_CTRL__sampling__DEFAULT,
+ rec_stick_par, R_SERIAL1_CTRL__rec_stick_par__DEFAULT,
+ rec_par, R_SERIAL1_CTRL__rec_par__DEFAULT,
+ rec_par_en, R_SERIAL1_CTRL__rec_par_en__DEFAULT,
+ rec_bitnr, R_SERIAL1_CTRL__rec_bitnr__DEFAULT,
+ txd, R_SERIAL1_CTRL__txd__DEFAULT,
+ tr_enable, R_SERIAL1_CTRL__tr_enable__DEFAULT,
+ auto_cts, R_SERIAL1_CTRL__auto_cts__DEFAULT,
+ stop_bits, R_SERIAL1_CTRL__stop_bits__DEFAULT,
+ tr_stick_par, R_SERIAL1_CTRL__tr_stick_par__DEFAULT,
+ tr_par, R_SERIAL1_CTRL__tr_par__DEFAULT,
+ tr_par_en, R_SERIAL1_CTRL__tr_par_en__DEFAULT,
+ tr_bitnr, R_SERIAL1_CTRL__tr_bitnr__DEFAULT,
+ data_out, R_SERIAL1_CTRL__data_out__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL1_REC_CTRL(
+ dma_err, R_SERIAL1_REC_CTRL__dma_err__DEFAULT,
+ rec_enable, R_SERIAL1_REC_CTRL__rec_enable__DEFAULT,
+ rts_, R_SERIAL1_REC_CTRL__rts___DEFAULT,
+ sampling, R_SERIAL1_REC_CTRL__sampling__DEFAULT,
+ rec_stick_par, R_SERIAL1_REC_CTRL__rec_stick_par__DEFAULT,
+ rec_par, R_SERIAL1_REC_CTRL__rec_par__DEFAULT,
+ rec_par_en, R_SERIAL1_REC_CTRL__rec_par_en__DEFAULT,
+ rec_bitnr, R_SERIAL1_REC_CTRL__rec_bitnr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL1_TR_CTRL(
+ txd, R_SERIAL1_TR_CTRL__txd__DEFAULT,
+ tr_enable, R_SERIAL1_TR_CTRL__tr_enable__DEFAULT,
+ auto_cts, R_SERIAL1_TR_CTRL__auto_cts__DEFAULT,
+ stop_bits, R_SERIAL1_TR_CTRL__stop_bits__DEFAULT,
+ tr_stick_par, R_SERIAL1_TR_CTRL__tr_stick_par__DEFAULT,
+ tr_par, R_SERIAL1_TR_CTRL__tr_par__DEFAULT,
+ tr_par_en, R_SERIAL1_TR_CTRL__tr_par_en__DEFAULT,
+ tr_bitnr, R_SERIAL1_TR_CTRL__tr_bitnr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL1_TR_DATA(
+ data_out, R_SERIAL1_TR_DATA__data_out__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL1_XOFF(
+ tx_stop, R_SERIAL1_XOFF__tx_stop__DEFAULT,
+ auto_xoff, R_SERIAL1_XOFF__auto_xoff__DEFAULT,
+ xoff_char, R_SERIAL1_XOFF__xoff_char__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL2_BAUD(
+ tr_baud, R_SERIAL2_BAUD__tr_baud__DEFAULT,
+ rec_baud, R_SERIAL2_BAUD__rec_baud__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL2_CTRL(
+ tr_baud, R_SERIAL2_CTRL__tr_baud__DEFAULT,
+ rec_baud, R_SERIAL2_CTRL__rec_baud__DEFAULT,
+ dma_err, R_SERIAL2_CTRL__dma_err__DEFAULT,
+ rec_enable, R_SERIAL2_CTRL__rec_enable__DEFAULT,
+ rts_, R_SERIAL2_CTRL__rts___DEFAULT,
+ sampling, R_SERIAL2_CTRL__sampling__DEFAULT,
+ rec_stick_par, R_SERIAL2_CTRL__rec_stick_par__DEFAULT,
+ rec_par, R_SERIAL2_CTRL__rec_par__DEFAULT,
+ rec_par_en, R_SERIAL2_CTRL__rec_par_en__DEFAULT,
+ rec_bitnr, R_SERIAL2_CTRL__rec_bitnr__DEFAULT,
+ txd, R_SERIAL2_CTRL__txd__DEFAULT,
+ tr_enable, R_SERIAL2_CTRL__tr_enable__DEFAULT,
+ auto_cts, R_SERIAL2_CTRL__auto_cts__DEFAULT,
+ stop_bits, R_SERIAL2_CTRL__stop_bits__DEFAULT,
+ tr_stick_par, R_SERIAL2_CTRL__tr_stick_par__DEFAULT,
+ tr_par, R_SERIAL2_CTRL__tr_par__DEFAULT,
+ tr_par_en, R_SERIAL2_CTRL__tr_par_en__DEFAULT,
+ tr_bitnr, R_SERIAL2_CTRL__tr_bitnr__DEFAULT,
+ data_out, R_SERIAL2_CTRL__data_out__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL2_REC_CTRL(
+ dma_err, R_SERIAL2_REC_CTRL__dma_err__DEFAULT,
+ rec_enable, R_SERIAL2_REC_CTRL__rec_enable__DEFAULT,
+ rts_, R_SERIAL2_REC_CTRL__rts___DEFAULT,
+ sampling, R_SERIAL2_REC_CTRL__sampling__DEFAULT,
+ rec_stick_par, R_SERIAL2_REC_CTRL__rec_stick_par__DEFAULT,
+ rec_par, R_SERIAL2_REC_CTRL__rec_par__DEFAULT,
+ rec_par_en, R_SERIAL2_REC_CTRL__rec_par_en__DEFAULT,
+ rec_bitnr, R_SERIAL2_REC_CTRL__rec_bitnr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL2_TR_CTRL(
+ txd, R_SERIAL2_TR_CTRL__txd__DEFAULT,
+ tr_enable, R_SERIAL2_TR_CTRL__tr_enable__DEFAULT,
+ auto_cts, R_SERIAL2_TR_CTRL__auto_cts__DEFAULT,
+ stop_bits, R_SERIAL2_TR_CTRL__stop_bits__DEFAULT,
+ tr_stick_par, R_SERIAL2_TR_CTRL__tr_stick_par__DEFAULT,
+ tr_par, R_SERIAL2_TR_CTRL__tr_par__DEFAULT,
+ tr_par_en, R_SERIAL2_TR_CTRL__tr_par_en__DEFAULT,
+ tr_bitnr, R_SERIAL2_TR_CTRL__tr_bitnr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL2_TR_DATA(
+ data_out, R_SERIAL2_TR_DATA__data_out__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL2_XOFF(
+ tx_stop, R_SERIAL2_XOFF__tx_stop__DEFAULT,
+ auto_xoff, R_SERIAL2_XOFF__auto_xoff__DEFAULT,
+ xoff_char, R_SERIAL2_XOFF__xoff_char__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL3_BAUD(
+ tr_baud, R_SERIAL3_BAUD__tr_baud__DEFAULT,
+ rec_baud, R_SERIAL3_BAUD__rec_baud__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL3_CTRL(
+ tr_baud, R_SERIAL3_CTRL__tr_baud__DEFAULT,
+ rec_baud, R_SERIAL3_CTRL__rec_baud__DEFAULT,
+ dma_err, R_SERIAL3_CTRL__dma_err__DEFAULT,
+ rec_enable, R_SERIAL3_CTRL__rec_enable__DEFAULT,
+ rts_, R_SERIAL3_CTRL__rts___DEFAULT,
+ sampling, R_SERIAL3_CTRL__sampling__DEFAULT,
+ rec_stick_par, R_SERIAL3_CTRL__rec_stick_par__DEFAULT,
+ rec_par, R_SERIAL3_CTRL__rec_par__DEFAULT,
+ rec_par_en, R_SERIAL3_CTRL__rec_par_en__DEFAULT,
+ rec_bitnr, R_SERIAL3_CTRL__rec_bitnr__DEFAULT,
+ txd, R_SERIAL3_CTRL__txd__DEFAULT,
+ tr_enable, R_SERIAL3_CTRL__tr_enable__DEFAULT,
+ auto_cts, R_SERIAL3_CTRL__auto_cts__DEFAULT,
+ stop_bits, R_SERIAL3_CTRL__stop_bits__DEFAULT,
+ tr_stick_par, R_SERIAL3_CTRL__tr_stick_par__DEFAULT,
+ tr_par, R_SERIAL3_CTRL__tr_par__DEFAULT,
+ tr_par_en, R_SERIAL3_CTRL__tr_par_en__DEFAULT,
+ tr_bitnr, R_SERIAL3_CTRL__tr_bitnr__DEFAULT,
+ data_out, R_SERIAL3_CTRL__data_out__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL3_REC_CTRL(
+ dma_err, R_SERIAL3_REC_CTRL__dma_err__DEFAULT,
+ rec_enable, R_SERIAL3_REC_CTRL__rec_enable__DEFAULT,
+ rts_, R_SERIAL3_REC_CTRL__rts___DEFAULT,
+ sampling, R_SERIAL3_REC_CTRL__sampling__DEFAULT,
+ rec_stick_par, R_SERIAL3_REC_CTRL__rec_stick_par__DEFAULT,
+ rec_par, R_SERIAL3_REC_CTRL__rec_par__DEFAULT,
+ rec_par_en, R_SERIAL3_REC_CTRL__rec_par_en__DEFAULT,
+ rec_bitnr, R_SERIAL3_REC_CTRL__rec_bitnr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL3_TR_CTRL(
+ txd, R_SERIAL3_TR_CTRL__txd__DEFAULT,
+ tr_enable, R_SERIAL3_TR_CTRL__tr_enable__DEFAULT,
+ auto_cts, R_SERIAL3_TR_CTRL__auto_cts__DEFAULT,
+ stop_bits, R_SERIAL3_TR_CTRL__stop_bits__DEFAULT,
+ tr_stick_par, R_SERIAL3_TR_CTRL__tr_stick_par__DEFAULT,
+ tr_par, R_SERIAL3_TR_CTRL__tr_par__DEFAULT,
+ tr_par_en, R_SERIAL3_TR_CTRL__tr_par_en__DEFAULT,
+ tr_bitnr, R_SERIAL3_TR_CTRL__tr_bitnr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL3_TR_DATA(
+ data_out, R_SERIAL3_TR_DATA__data_out__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Serial_port_registers
+ REG_SET__R_SERIAL3_XOFF(
+ tx_stop, R_SERIAL3_XOFF__tx_stop__DEFAULT,
+ auto_xoff, R_SERIAL3_XOFF__auto_xoff__DEFAULT,
+ xoff_char, R_SERIAL3_XOFF__xoff_char__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Timer_registers
+ REG_SET__R_SERIAL_PRESCALE(
+ ser_presc, R_SERIAL_PRESCALE__ser_presc__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__DMA_registers
+ REG_SET__R_SET_EOP(
+ ch9_eop, R_SET_EOP__ch9_eop__DEFAULT,
+ ch7_eop, R_SET_EOP__ch7_eop__DEFAULT,
+ ch5_eop, R_SET_EOP__ch5_eop__DEFAULT,
+ ch3_eop, R_SET_EOP__ch3_eop__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Shared_RAM_interface_registers
+ REG_SET__R_SHARED_RAM_ADDR(
+ base_addr, R_SHARED_RAM_ADDR__base_addr__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Shared_RAM_interface_registers
+ REG_SET__R_SHARED_RAM_CONFIG(
+ width, R_SHARED_RAM_CONFIG__width__DEFAULT,
+ enable, R_SHARED_RAM_CONFIG__enable__DEFAULT,
+ pint, R_SHARED_RAM_CONFIG__pint__DEFAULT,
+ clri, R_SHARED_RAM_CONFIG__clri__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Test_mode_registers
+ REG_SET__R_SINGLE_STEP(
+ single_step, R_SINGLE_STEP__single_step__DEFAULT,
+ step_wr, R_SINGLE_STEP__step_wr__DEFAULT,
+ step_rd, R_SINGLE_STEP__step_rd__DEFAULT,
+ step_fetch, R_SINGLE_STEP__step_fetch__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+ REG_SET__R_SYNC_SERIAL1_CTRL(
+ tr_baud, R_SYNC_SERIAL1_CTRL__tr_baud__DEFAULT,
+ dma_enable, R_SYNC_SERIAL1_CTRL__dma_enable__DEFAULT,
+ mode, R_SYNC_SERIAL1_CTRL__mode__DEFAULT,
+ error, R_SYNC_SERIAL1_CTRL__error__DEFAULT,
+ rec_enable, R_SYNC_SERIAL1_CTRL__rec_enable__DEFAULT,
+ f_synctype, R_SYNC_SERIAL1_CTRL__f_synctype__DEFAULT,
+ f_syncsize, R_SYNC_SERIAL1_CTRL__f_syncsize__DEFAULT,
+ f_sync, R_SYNC_SERIAL1_CTRL__f_sync__DEFAULT,
+ clk_mode, R_SYNC_SERIAL1_CTRL__clk_mode__DEFAULT,
+ clk_halt, R_SYNC_SERIAL1_CTRL__clk_halt__DEFAULT,
+ bitorder, R_SYNC_SERIAL1_CTRL__bitorder__DEFAULT,
+ tr_enable, R_SYNC_SERIAL1_CTRL__tr_enable__DEFAULT,
+ wordsize, R_SYNC_SERIAL1_CTRL__wordsize__DEFAULT,
+ buf_empty, R_SYNC_SERIAL1_CTRL__buf_empty__DEFAULT,
+ buf_full, R_SYNC_SERIAL1_CTRL__buf_full__DEFAULT,
+ flow_ctrl, R_SYNC_SERIAL1_CTRL__flow_ctrl__DEFAULT,
+ clk_polarity, R_SYNC_SERIAL1_CTRL__clk_polarity__DEFAULT,
+ frame_polarity, R_SYNC_SERIAL1_CTRL__frame_polarity__DEFAULT,
+ status_polarity, R_SYNC_SERIAL1_CTRL__status_polarity__DEFAULT,
+ clk_driver, R_SYNC_SERIAL1_CTRL__clk_driver__DEFAULT,
+ frame_driver, R_SYNC_SERIAL1_CTRL__frame_driver__DEFAULT,
+ status_driver, R_SYNC_SERIAL1_CTRL__status_driver__DEFAULT,
+ def_out0, R_SYNC_SERIAL1_CTRL__def_out0__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+ REG_SET__R_SYNC_SERIAL1_TR_BYTE(
+ data_out, R_SYNC_SERIAL1_TR_BYTE__data_out__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+ REG_SET__R_SYNC_SERIAL1_TR_DATA(
+ data_out, R_SYNC_SERIAL1_TR_DATA__data_out__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+ REG_SET__R_SYNC_SERIAL1_TR_WORD(
+ data_out, R_SYNC_SERIAL1_TR_WORD__data_out__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+ REG_SET__R_SYNC_SERIAL3_CTRL(
+ tr_baud, R_SYNC_SERIAL3_CTRL__tr_baud__DEFAULT,
+ dma_enable, R_SYNC_SERIAL3_CTRL__dma_enable__DEFAULT,
+ mode, R_SYNC_SERIAL3_CTRL__mode__DEFAULT,
+ error, R_SYNC_SERIAL3_CTRL__error__DEFAULT,
+ rec_enable, R_SYNC_SERIAL3_CTRL__rec_enable__DEFAULT,
+ f_synctype, R_SYNC_SERIAL3_CTRL__f_synctype__DEFAULT,
+ f_syncsize, R_SYNC_SERIAL3_CTRL__f_syncsize__DEFAULT,
+ f_sync, R_SYNC_SERIAL3_CTRL__f_sync__DEFAULT,
+ clk_mode, R_SYNC_SERIAL3_CTRL__clk_mode__DEFAULT,
+ clk_halt, R_SYNC_SERIAL3_CTRL__clk_halt__DEFAULT,
+ bitorder, R_SYNC_SERIAL3_CTRL__bitorder__DEFAULT,
+ tr_enable, R_SYNC_SERIAL3_CTRL__tr_enable__DEFAULT,
+ wordsize, R_SYNC_SERIAL3_CTRL__wordsize__DEFAULT,
+ buf_empty, R_SYNC_SERIAL3_CTRL__buf_empty__DEFAULT,
+ buf_full, R_SYNC_SERIAL3_CTRL__buf_full__DEFAULT,
+ flow_ctrl, R_SYNC_SERIAL3_CTRL__flow_ctrl__DEFAULT,
+ clk_polarity, R_SYNC_SERIAL3_CTRL__clk_polarity__DEFAULT,
+ frame_polarity, R_SYNC_SERIAL3_CTRL__frame_polarity__DEFAULT,
+ status_polarity, R_SYNC_SERIAL3_CTRL__status_polarity__DEFAULT,
+ clk_driver, R_SYNC_SERIAL3_CTRL__clk_driver__DEFAULT,
+ frame_driver, R_SYNC_SERIAL3_CTRL__frame_driver__DEFAULT,
+ status_driver, R_SYNC_SERIAL3_CTRL__status_driver__DEFAULT,
+ def_out0, R_SYNC_SERIAL3_CTRL__def_out0__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+ REG_SET__R_SYNC_SERIAL3_TR_BYTE(
+ data_out, R_SYNC_SERIAL3_TR_BYTE__data_out__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+ REG_SET__R_SYNC_SERIAL3_TR_DATA(
+ data_out, R_SYNC_SERIAL3_TR_DATA__data_out__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+ REG_SET__R_SYNC_SERIAL3_TR_WORD(
+ data_out, R_SYNC_SERIAL3_TR_WORD__data_out__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Timer_registers
+ REG_SET__R_SYNC_SERIAL_PRESCALE(
+ clk_sel_u3, R_SYNC_SERIAL_PRESCALE__clk_sel_u3__DEFAULT,
+ word_stb_sel_u3, R_SYNC_SERIAL_PRESCALE__word_stb_sel_u3__DEFAULT,
+ clk_sel_u1, R_SYNC_SERIAL_PRESCALE__clk_sel_u1__DEFAULT,
+ word_stb_sel_u1, R_SYNC_SERIAL_PRESCALE__word_stb_sel_u1__DEFAULT,
+ prescaler, R_SYNC_SERIAL_PRESCALE__prescaler__DEFAULT,
+ warp_mode, R_SYNC_SERIAL_PRESCALE__warp_mode__DEFAULT,
+ frame_rate, R_SYNC_SERIAL_PRESCALE__frame_rate__DEFAULT,
+ word_rate, R_SYNC_SERIAL_PRESCALE__word_rate__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Test_mode_registers
+ REG_SET__R_TEST_MODE(
+ single_step, R_TEST_MODE__single_step__DEFAULT,
+ step_wr, R_TEST_MODE__step_wr__DEFAULT,
+ step_rd, R_TEST_MODE__step_rd__DEFAULT,
+ step_fetch, R_TEST_MODE__step_fetch__DEFAULT,
+ mmu_test, R_TEST_MODE__mmu_test__DEFAULT,
+ usb_test, R_TEST_MODE__usb_test__DEFAULT,
+ scsi_timer_test, R_TEST_MODE__scsi_timer_test__DEFAULT,
+ backoff, R_TEST_MODE__backoff__DEFAULT,
+ snmp_test, R_TEST_MODE__snmp_test__DEFAULT,
+ snmp_inc, R_TEST_MODE__snmp_inc__DEFAULT,
+ ser_loop, R_TEST_MODE__ser_loop__DEFAULT,
+ baudrate, R_TEST_MODE__baudrate__DEFAULT,
+ timer, R_TEST_MODE__timer__DEFAULT,
+ cache_test, R_TEST_MODE__cache_test__DEFAULT,
+ tag_test, R_TEST_MODE__tag_test__DEFAULT,
+ cache_enable, R_TEST_MODE__cache_enable__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Timer_registers
+ REG_SET__R_TIMER_CTRL(
+ timerdiv1, R_TIMER_CTRL__timerdiv1__DEFAULT,
+ timerdiv0, R_TIMER_CTRL__timerdiv0__DEFAULT,
+ presc_timer1, R_TIMER_CTRL__presc_timer1__DEFAULT,
+ i1, R_TIMER_CTRL__i1__DEFAULT,
+ tm1, R_TIMER_CTRL__tm1__DEFAULT,
+ clksel1, R_TIMER_CTRL__clksel1__DEFAULT,
+ presc_ext, R_TIMER_CTRL__presc_ext__DEFAULT,
+ i0, R_TIMER_CTRL__i0__DEFAULT,
+ tm0, R_TIMER_CTRL__tm0__DEFAULT,
+ clksel0, R_TIMER_CTRL__clksel0__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Timer_registers
+ REG_SET__R_TIMER_PRESCALE(
+ tim_presc, R_TIMER_PRESCALE__tim_presc__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__USB_interface_control_registers
+ REG_SET__R_USB_IRQ_MASK_CLR(
+ iso_eof, R_USB_IRQ_MASK_CLR__iso_eof__DEFAULT,
+ intr_eof, R_USB_IRQ_MASK_CLR__intr_eof__DEFAULT,
+ iso_eot, R_USB_IRQ_MASK_CLR__iso_eot__DEFAULT,
+ intr_eot, R_USB_IRQ_MASK_CLR__intr_eot__DEFAULT,
+ ctl_eot, R_USB_IRQ_MASK_CLR__ctl_eot__DEFAULT,
+ bulk_eot, R_USB_IRQ_MASK_CLR__bulk_eot__DEFAULT,
+ epid_attn, R_USB_IRQ_MASK_CLR__epid_attn__DEFAULT,
+ sof, R_USB_IRQ_MASK_CLR__sof__DEFAULT,
+ port_status, R_USB_IRQ_MASK_CLR__port_status__DEFAULT,
+ ctl_status, R_USB_IRQ_MASK_CLR__ctl_status__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__USB_interface_control_registers
+ REG_SET__R_USB_IRQ_MASK_CLR_DEV(
+ out_eot, R_USB_IRQ_MASK_CLR_DEV__out_eot__DEFAULT,
+ ep3_in_eot, R_USB_IRQ_MASK_CLR_DEV__ep3_in_eot__DEFAULT,
+ ep2_in_eot, R_USB_IRQ_MASK_CLR_DEV__ep2_in_eot__DEFAULT,
+ ep1_in_eot, R_USB_IRQ_MASK_CLR_DEV__ep1_in_eot__DEFAULT,
+ ep0_in_eot, R_USB_IRQ_MASK_CLR_DEV__ep0_in_eot__DEFAULT,
+ epid_attn, R_USB_IRQ_MASK_CLR_DEV__epid_attn__DEFAULT,
+ sof, R_USB_IRQ_MASK_CLR_DEV__sof__DEFAULT,
+ port_status, R_USB_IRQ_MASK_CLR_DEV__port_status__DEFAULT,
+ ctl_status, R_USB_IRQ_MASK_CLR_DEV__ctl_status__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__USB_interface_control_registers
+ REG_SET__R_USB_IRQ_MASK_SET(
+ iso_eof, R_USB_IRQ_MASK_SET__iso_eof__DEFAULT,
+ intr_eof, R_USB_IRQ_MASK_SET__intr_eof__DEFAULT,
+ iso_eot, R_USB_IRQ_MASK_SET__iso_eot__DEFAULT,
+ intr_eot, R_USB_IRQ_MASK_SET__intr_eot__DEFAULT,
+ ctl_eot, R_USB_IRQ_MASK_SET__ctl_eot__DEFAULT,
+ bulk_eot, R_USB_IRQ_MASK_SET__bulk_eot__DEFAULT,
+ epid_attn, R_USB_IRQ_MASK_SET__epid_attn__DEFAULT,
+ sof, R_USB_IRQ_MASK_SET__sof__DEFAULT,
+ port_status, R_USB_IRQ_MASK_SET__port_status__DEFAULT,
+ ctl_status, R_USB_IRQ_MASK_SET__ctl_status__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__USB_interface_control_registers
+ REG_SET__R_USB_IRQ_MASK_SET_DEV(
+ out_eot, R_USB_IRQ_MASK_SET_DEV__out_eot__DEFAULT,
+ ep3_in_eot, R_USB_IRQ_MASK_SET_DEV__ep3_in_eot__DEFAULT,
+ ep2_in_eot, R_USB_IRQ_MASK_SET_DEV__ep2_in_eot__DEFAULT,
+ ep1_in_eot, R_USB_IRQ_MASK_SET_DEV__ep1_in_eot__DEFAULT,
+ ep0_in_eot, R_USB_IRQ_MASK_SET_DEV__ep0_in_eot__DEFAULT,
+ epid_attn, R_USB_IRQ_MASK_SET_DEV__epid_attn__DEFAULT,
+ sof, R_USB_IRQ_MASK_SET_DEV__sof__DEFAULT,
+ port_status, R_USB_IRQ_MASK_SET_DEV__port_status__DEFAULT,
+ ctl_status, R_USB_IRQ_MASK_SET_DEV__ctl_status__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__USB_interface_control_registers
+ REG_SET__R_USB_PORT1_DISABLE(
+ disable, R_USB_PORT1_DISABLE__disable__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__USB_interface_control_registers
+ REG_SET__R_USB_PORT2_DISABLE(
+ disable, R_USB_PORT2_DISABLE__disable__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+ REG_SET__R_VECT_MASK_CLR(
+ usb, R_VECT_MASK_CLR__usb__DEFAULT,
+ dma9, R_VECT_MASK_CLR__dma9__DEFAULT,
+ dma8, R_VECT_MASK_CLR__dma8__DEFAULT,
+ dma7, R_VECT_MASK_CLR__dma7__DEFAULT,
+ dma6, R_VECT_MASK_CLR__dma6__DEFAULT,
+ dma5, R_VECT_MASK_CLR__dma5__DEFAULT,
+ dma4, R_VECT_MASK_CLR__dma4__DEFAULT,
+ dma3, R_VECT_MASK_CLR__dma3__DEFAULT,
+ dma2, R_VECT_MASK_CLR__dma2__DEFAULT,
+ dma1, R_VECT_MASK_CLR__dma1__DEFAULT,
+ dma0, R_VECT_MASK_CLR__dma0__DEFAULT,
+ ext_dma1, R_VECT_MASK_CLR__ext_dma1__DEFAULT,
+ ext_dma0, R_VECT_MASK_CLR__ext_dma0__DEFAULT,
+ pa, R_VECT_MASK_CLR__pa__DEFAULT,
+ irq_intnr, R_VECT_MASK_CLR__irq_intnr__DEFAULT,
+ sw, R_VECT_MASK_CLR__sw__DEFAULT,
+ serial, R_VECT_MASK_CLR__serial__DEFAULT,
+ snmp, R_VECT_MASK_CLR__snmp__DEFAULT,
+ network, R_VECT_MASK_CLR__network__DEFAULT,
+ scsi1, R_VECT_MASK_CLR__scsi1__DEFAULT,
+ scsi0, R_VECT_MASK_CLR__scsi0__DEFAULT,
+ timer1, R_VECT_MASK_CLR__timer1__DEFAULT,
+ timer0, R_VECT_MASK_CLR__timer0__DEFAULT,
+ nmi, R_VECT_MASK_CLR__nmi__DEFAULT,
+ some, R_VECT_MASK_CLR__some__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+ REG_SET__R_VECT_MASK_SET(
+ usb, R_VECT_MASK_SET__usb__DEFAULT,
+ dma9, R_VECT_MASK_SET__dma9__DEFAULT,
+ dma8, R_VECT_MASK_SET__dma8__DEFAULT,
+ dma7, R_VECT_MASK_SET__dma7__DEFAULT,
+ dma6, R_VECT_MASK_SET__dma6__DEFAULT,
+ dma5, R_VECT_MASK_SET__dma5__DEFAULT,
+ dma4, R_VECT_MASK_SET__dma4__DEFAULT,
+ dma3, R_VECT_MASK_SET__dma3__DEFAULT,
+ dma2, R_VECT_MASK_SET__dma2__DEFAULT,
+ dma1, R_VECT_MASK_SET__dma1__DEFAULT,
+ dma0, R_VECT_MASK_SET__dma0__DEFAULT,
+ ext_dma1, R_VECT_MASK_SET__ext_dma1__DEFAULT,
+ ext_dma0, R_VECT_MASK_SET__ext_dma0__DEFAULT,
+ pa, R_VECT_MASK_SET__pa__DEFAULT,
+ irq_intnr, R_VECT_MASK_SET__irq_intnr__DEFAULT,
+ sw, R_VECT_MASK_SET__sw__DEFAULT,
+ serial, R_VECT_MASK_SET__serial__DEFAULT,
+ snmp, R_VECT_MASK_SET__snmp__DEFAULT,
+ network, R_VECT_MASK_SET__network__DEFAULT,
+ scsi1, R_VECT_MASK_SET__scsi1__DEFAULT,
+ scsi0, R_VECT_MASK_SET__scsi0__DEFAULT,
+ timer1, R_VECT_MASK_SET__timer1__DEFAULT,
+ timer0, R_VECT_MASK_SET__timer0__DEFAULT,
+ nmi, R_VECT_MASK_SET__nmi__DEFAULT,
+ some, R_VECT_MASK_SET__some__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Bus_interface_configuration_registers
+ REG_SET__R_WAITSTATES(
+ pcs4_7_zw, R_WAITSTATES__pcs4_7_zw__DEFAULT,
+ pcs4_7_ew, R_WAITSTATES__pcs4_7_ew__DEFAULT,
+ pcs4_7_lw, R_WAITSTATES__pcs4_7_lw__DEFAULT,
+ pcs0_3_zw, R_WAITSTATES__pcs0_3_zw__DEFAULT,
+ pcs0_3_ew, R_WAITSTATES__pcs0_3_ew__DEFAULT,
+ pcs0_3_lw, R_WAITSTATES__pcs0_3_lw__DEFAULT,
+ sram_zw, R_WAITSTATES__sram_zw__DEFAULT,
+ sram_ew, R_WAITSTATES__sram_ew__DEFAULT,
+ sram_lw, R_WAITSTATES__sram_lw__DEFAULT,
+ flash_zw, R_WAITSTATES__flash_zw__DEFAULT,
+ flash_ew, R_WAITSTATES__flash_ew__DEFAULT,
+ flash_lw, R_WAITSTATES__flash_lw__DEFAULT
+ );
+#endif
+
+#if USE_GROUP__Timer_registers
+ REG_SET__R_WATCHDOG(
+ key, R_WATCHDOG__key__DEFAULT,
+ enable, R_WATCHDOG__enable__DEFAULT
+ );
+#endif
+#endif
+} /* init_shadow__hwregs */
--- /dev/null
+/*!**********************************************************************
+*!
+*! FILE NAME: hwregs.h
+*!
+*! DESCRIPTION: Interface to shadow registers.
+*!
+*! FUNCTIONS: none
+*!
+*! NOTE: This file is automatically generated, do _not_ edit.
+*! Created: Thu Oct 3 01:21:27 2002
+*! By: Id: shadow_gen,v 1.14 2002/10/02 20:31:22 hp Exp
+*! From: /n/asic/projects/etrax_ng/doc/work/etrax_ng_regs.rd 1.168
+*! /n/asic/projects/etrax_ng/include//hwregs.ctrl 1.3
+*!
+*! MACROS: REG_GET
+*! REG_IGET
+*! REG_VGET
+*! REG_SET
+*! REG_ISET
+*! REG_VSET
+*! REG_SET_VAL
+*! REG_SET__register-name (one for each register)
+*! REG_SET__register-name__SHADOW (one for each register)
+*! REG_MASK__register-name (one for each register)
+*! REG_VAL__register-name (one for each register)
+*! REG_EQL
+*! REG_IEQL
+*! REG_VEQL
+*! REG_VAL
+*! REG_CHK_VAL
+*! REG_RD
+*! REG_IRD
+*! REG_WR
+*! REG_IWR
+*! REG_ADDR
+*! REG_BITNR
+*!
+*!----------------------------------------------------------------------
+*! HISTORY
+*!
+*! DATE NAME CHANGES
+*! ---- ---- -------
+*! Apr 01 1998 Jan Bengtsson Initial version
+*! Oct 01 2002 Hans-Peter Nilsson Large mechanical changes to correct
+*! use of the ## operator.
+*!----------------------------------------------------------------------
+*!
+*! (C) Copyright 1998, 2002 Axis Communications AB, LUND, SWEDEN
+*!
+*!**********************************************************************/
+/* %Z% %M% %I% %G% */
+
+#ifndef __HWREGS_H__
+#define __HWREGS_H__
+
+/********************** INCLUDE FILES SECTION **************************/
+#ifndef __ASSEMBLER__
+#include "compiler.h"
+#include "debug.h"
+#endif /* __ASSEMBLER__ */
+
+#include "project.h"
+#include "hwregs_def.h"
+
+#ifndef __ASSEMBLER__
+
+#ifndef __REG_GENERAL_1_H__
+#define __REG_GENERAL_1_H__
+
+/*
+** This part of hwregs.h is common to all shadow
+** register modules, and should therefore only be included once to
+** avoid macro redefinitions.
+*/
+
+/* REG_DEBUG is by default controlled by DEBUG from debug.h. */
+#ifndef REG_DEBUG
+#ifdef DEBUG
+#define REG_DEBUG 1
+#else
+#define REG_DEBUG 0
+#endif /* DEBUG */
+#endif /* REG_DEBUG */
+
+#endif /* __REG_GENERAL_1_H__ */
+
+#endif /* __ASSEMBLER__ */
+
+/********************** TYPE DEFINITION SECTION ************************/
+#ifndef __ASSEMBLER__
+
+#ifndef REG_NO_SHADOW
+
+/* Only write only registers need a shadow register. */
+
+typedef struct {
+#if USE_GROUP__Bus_interface_configuration_registers
+ byte R_WAITSTATES[4];
+ byte R_BUS_CONFIG[4];
+ byte R_DRAM_TIMING[4];
+ byte R_DRAM_CONFIG[4];
+#endif
+#if USE_GROUP__External_DMA_registers
+ byte R_EXT_DMA_0_CMD[4];
+ byte R_EXT_DMA_0_ADDR[4];
+ byte R_EXT_DMA_1_CMD[4];
+ byte R_EXT_DMA_1_ADDR[4];
+#endif
+#if USE_GROUP__Timer_registers
+ byte R_TIMER_CTRL[4];
+ byte R_WATCHDOG[4];
+#endif
+#if USE_GROUP__General_config_registers
+ byte R_GEN_CONFIG[4];
+#endif
+#if USE_GROUP__General_port_configuration_registers
+ byte R_PORT_PA_SET[4];
+#endif
+#if USE_GROUP__General_config_registers
+ byte R_GEN_CONFIG_II[4];
+#endif
+#if USE_GROUP__General_port_configuration_registers
+ byte R_PORT_PB_SET[4];
+#endif
+#if USE_GROUP__DMA_registers
+ byte R_SET_EOP[4];
+#endif
+#if USE_GROUP__ATA_interface_registers || \
+ USE_GROUP__Parallel_printer_port_registers || \
+ USE_GROUP__SCSI_registers || \
+ USE_GROUP__Shared_RAM_interface_registers
+ byte R_ATA_CTRL_DATA[4];
+ byte R_ATA_CONFIG[4];
+#endif
+#if USE_GROUP__Parallel_printer_port_registers
+ byte R_PAR0_DELAY[4];
+#endif
+#if USE_GROUP__Parallel_printer_port_registers || \
+ USE_GROUP__SCSI_registers || \
+ USE_GROUP__USB_interface_control_registers
+ byte R_PAR1_CTRL_DATA[4];
+#endif
+#if USE_GROUP__Parallel_printer_port_registers || \
+ USE_GROUP__SCSI_registers
+ byte R_PAR1_CONFIG[4];
+#endif
+#if USE_GROUP__Parallel_printer_port_registers
+ byte R_PAR1_DELAY[4];
+#endif
+#if USE_GROUP__Serial_port_registers
+ byte R_ALT_SER_BAUDRATE[4];
+ byte R_SERIAL0_CTRL[4];
+ byte R_SERIAL0_XOFF[4];
+#endif
+#if USE_GROUP__Serial_port_registers || \
+ USE_GROUP__Syncrounous_serial_port_registers || \
+ USE_GROUP__USB_interface_control_registers
+ byte R_SERIAL1_CTRL[4];
+#endif
+#if USE_GROUP__Serial_port_registers || \
+ USE_GROUP__Syncrounous_serial_port_registers
+ byte R_SERIAL1_XOFF[4];
+#endif
+#if USE_GROUP__Serial_port_registers
+ byte R_SERIAL2_CTRL[4];
+ byte R_SERIAL2_XOFF[4];
+#endif
+#if USE_GROUP__Serial_port_registers || \
+ USE_GROUP__Syncrounous_serial_port_registers
+ byte R_SERIAL3_CTRL[4];
+ byte R_SERIAL3_XOFF[4];
+#endif
+#if USE_GROUP__Network_interface_registers
+ byte R_NETWORK_SA_0[4];
+ byte R_NETWORK_SA_1[4];
+ byte R_NETWORK_SA_2[4];
+ byte R_NETWORK_GA_0[4];
+ byte R_NETWORK_GA_1[4];
+ byte R_NETWORK_REC_CONFIG[4];
+ byte R_NETWORK_GEN_CONFIG[4];
+ byte R_NETWORK_TR_CTRL[4];
+ byte R_NETWORK_MGM_CTRL[4];
+#endif
+#if USE_GROUP__Interrupt_mask_and_status_registers
+ byte R_IRQ_MASK0_CLR[4];
+ byte R_IRQ_MASK0_SET[4];
+ byte R_IRQ_MASK1_CLR[4];
+ byte R_IRQ_MASK1_SET[4];
+ byte R_IRQ_MASK2_CLR[4];
+ byte R_IRQ_MASK2_SET[4];
+ byte R_VECT_MASK_CLR[4];
+ byte R_VECT_MASK_SET[4];
+#endif
+#if USE_GROUP__Timer_registers
+ byte R_CLOCK_PRESCALE[4];
+ byte R_SYNC_SERIAL_PRESCALE[4];
+#endif
+#if USE_GROUP__Test_mode_registers
+ byte R_TEST_MODE[4];
+#endif
+#if USE_GROUP__DMA_registers
+ byte R_DMA_CH0_CLR_INTR[1];
+ byte R_DMA_CH1_CLR_INTR[1];
+ byte R_DMA_CH2_CLR_INTR[1];
+ byte R_DMA_CH3_CLR_INTR[1];
+ byte R_DMA_CH4_CLR_INTR[1];
+ byte R_DMA_CH8_SUB0_CLR_INTR[1];
+ byte R_DMA_CH5_CLR_INTR[1];
+ byte R_DMA_CH8_SUB1_CLR_INTR[1];
+ byte R_DMA_CH6_CLR_INTR[1];
+ byte R_DMA_CH8_SUB2_CLR_INTR[1];
+ byte R_DMA_CH7_CLR_INTR[1];
+ byte R_DMA_CH8_SUB3_CLR_INTR[1];
+ byte R_DMA_CH8_CLR_INTR[1];
+ byte R_DMA_CH9_CLR_INTR[1];
+#endif
+#if USE_GROUP__USB_interface_control_registers
+ byte R_USB_IRQ_MASK_SET[2];
+ byte R_USB_IRQ_MASK_CLR[2];
+#endif
+#if USE_GROUP__MMU_registers
+ byte R_MMU_CONFIG[4];
+ byte R_MMU_KBASE_LO[4];
+ byte R_MMU_KBASE_HI[4];
+#endif
+} reg_shadow_type__hwregs;
+
+#else /* REG_NO_SHADOW */
+
+typedef const udword reg_shadow_type__hwregs;
+
+#endif /* REG_NO_SHADOW */
+
+extern reg_shadow_type__hwregs reg_shadow__hwregs;
+
+#if REG_DEBUG
+
+/*
+ * Only write only registers need an initiated flag.
+ * Flag is set to all ones at startup, and cleared to
+ * zero when initiated.
+ */
+
+#ifndef REG_NO_SHADOW
+
+typedef struct {
+#if USE_GROUP__Bus_interface_configuration_registers
+ byte R_WAITSTATES[4];
+ byte R_BUS_CONFIG[4];
+ byte R_DRAM_TIMING[4];
+ byte R_DRAM_CONFIG[4];
+#endif
+#if USE_GROUP__External_DMA_registers
+ byte R_EXT_DMA_0_CMD[4];
+ byte R_EXT_DMA_0_ADDR[4];
+ byte R_EXT_DMA_1_CMD[4];
+ byte R_EXT_DMA_1_ADDR[4];
+#endif
+#if USE_GROUP__Timer_registers
+ byte R_TIMER_CTRL[4];
+ byte R_WATCHDOG[4];
+#endif
+#if USE_GROUP__General_config_registers
+ byte R_GEN_CONFIG[4];
+#endif
+#if USE_GROUP__General_port_configuration_registers
+ byte R_PORT_PA_SET[4];
+#endif
+#if USE_GROUP__General_config_registers
+ byte R_GEN_CONFIG_II[4];
+#endif
+#if USE_GROUP__General_port_configuration_registers
+ byte R_PORT_PB_SET[4];
+#endif
+#if USE_GROUP__DMA_registers
+ byte R_SET_EOP[4];
+#endif
+#if USE_GROUP__ATA_interface_registers || \
+ USE_GROUP__Parallel_printer_port_registers || \
+ USE_GROUP__SCSI_registers || \
+ USE_GROUP__Shared_RAM_interface_registers
+ byte R_ATA_CTRL_DATA[4];
+ byte R_ATA_CONFIG[4];
+#endif
+#if USE_GROUP__Parallel_printer_port_registers
+ byte R_PAR0_DELAY[4];
+#endif
+#if USE_GROUP__Parallel_printer_port_registers || \
+ USE_GROUP__SCSI_registers || \
+ USE_GROUP__USB_interface_control_registers
+ byte R_PAR1_CTRL_DATA[4];
+#endif
+#if USE_GROUP__Parallel_printer_port_registers || \
+ USE_GROUP__SCSI_registers
+ byte R_PAR1_CONFIG[4];
+#endif
+#if USE_GROUP__Parallel_printer_port_registers
+ byte R_PAR1_DELAY[4];
+#endif
+#if USE_GROUP__Serial_port_registers
+ byte R_ALT_SER_BAUDRATE[4];
+ byte R_SERIAL0_CTRL[4];
+ byte R_SERIAL0_XOFF[4];
+#endif
+#if USE_GROUP__Serial_port_registers || \
+ USE_GROUP__Syncrounous_serial_port_registers || \
+ USE_GROUP__USB_interface_control_registers
+ byte R_SERIAL1_CTRL[4];
+#endif
+#if USE_GROUP__Serial_port_registers || \
+ USE_GROUP__Syncrounous_serial_port_registers
+ byte R_SERIAL1_XOFF[4];
+#endif
+#if USE_GROUP__Serial_port_registers
+ byte R_SERIAL2_CTRL[4];
+ byte R_SERIAL2_XOFF[4];
+#endif
+#if USE_GROUP__Serial_port_registers || \
+ USE_GROUP__Syncrounous_serial_port_registers
+ byte R_SERIAL3_CTRL[4];
+ byte R_SERIAL3_XOFF[4];
+#endif
+#if USE_GROUP__Network_interface_registers
+ byte R_NETWORK_SA_0[4];
+ byte R_NETWORK_SA_1[4];
+ byte R_NETWORK_SA_2[4];
+ byte R_NETWORK_GA_0[4];
+ byte R_NETWORK_GA_1[4];
+ byte R_NETWORK_REC_CONFIG[4];
+ byte R_NETWORK_GEN_CONFIG[4];
+ byte R_NETWORK_TR_CTRL[4];
+ byte R_NETWORK_MGM_CTRL[4];
+#endif
+#if USE_GROUP__Interrupt_mask_and_status_registers
+ byte R_IRQ_MASK0_CLR[4];
+ byte R_IRQ_MASK0_SET[4];
+ byte R_IRQ_MASK1_CLR[4];
+ byte R_IRQ_MASK1_SET[4];
+ byte R_IRQ_MASK2_CLR[4];
+ byte R_IRQ_MASK2_SET[4];
+ byte R_VECT_MASK_CLR[4];
+ byte R_VECT_MASK_SET[4];
+#endif
+#if USE_GROUP__Timer_registers
+ byte R_CLOCK_PRESCALE[4];
+ byte R_SYNC_SERIAL_PRESCALE[4];
+#endif
+#if USE_GROUP__Test_mode_registers
+ byte R_TEST_MODE[4];
+#endif
+#if USE_GROUP__DMA_registers
+ byte R_DMA_CH0_CLR_INTR[1];
+ byte R_DMA_CH1_CLR_INTR[1];
+ byte R_DMA_CH2_CLR_INTR[1];
+ byte R_DMA_CH3_CLR_INTR[1];
+ byte R_DMA_CH4_CLR_INTR[1];
+ byte R_DMA_CH8_SUB0_CLR_INTR[1];
+ byte R_DMA_CH5_CLR_INTR[1];
+ byte R_DMA_CH8_SUB1_CLR_INTR[1];
+ byte R_DMA_CH6_CLR_INTR[1];
+ byte R_DMA_CH8_SUB2_CLR_INTR[1];
+ byte R_DMA_CH7_CLR_INTR[1];
+ byte R_DMA_CH8_SUB3_CLR_INTR[1];
+ byte R_DMA_CH8_CLR_INTR[1];
+ byte R_DMA_CH9_CLR_INTR[1];
+#endif
+#if USE_GROUP__USB_interface_control_registers
+ byte R_USB_IRQ_MASK_SET[2];
+ byte R_USB_IRQ_MASK_CLR[2];
+#endif
+#if USE_GROUP__MMU_registers
+ byte R_MMU_CONFIG[4];
+ byte R_MMU_KBASE_LO[4];
+ byte R_MMU_KBASE_HI[4];
+#endif
+} reg_initiated_type__hwregs;
+
+#else /* REG_NO_SHADOW */
+
+typedef const udword reg_initiated_type__hwregs;
+
+#endif /* REG_NO_SHADOW */
+
+extern reg_initiated_type__hwregs reg_initiated__hwregs;
+
+#endif /* REG_DEBUG */
+
+extern void init_shadow__hwregs();
+
+#endif /* __ASSEMBLER__ */
+
+
+/********************** CONSTANT AND MACRO SECTION *********************/
+#ifndef __REG_GENERAL_2_H__
+#define __REG_GENERAL_2_H__
+
+/*
+** This part of hwregs.h is common to all shadow
+** register modules, and should therefore only be included once to
+** avoid macro redefinitions.
+*/
+
+#ifndef __ASSEMBLER__
+
+/*
+ * Register type-casts
+ */
+#define REG_TYPECAST_UDWORD (volatile udword*)
+#define REG_TYPECAST_RO_UDWORD (const volatile udword*)
+#define REG_TYPECAST_UWORD (volatile uword*)
+#define REG_TYPECAST_RO_UWORD (const volatile uword*)
+#define REG_TYPECAST_BYTE (volatile byte*)
+#define REG_TYPECAST_RO_BYTE (const volatile byte*)
+
+/*
+ * Shadow register type-casts
+ */
+#define REG_STYPECAST_UDWORD (udword*)
+#define REG_STYPECAST_UWORD (uword*)
+#define REG_STYPECAST_BYTE (byte*)
+
+#else
+
+/*
+ * Register type-casts
+ */
+#define REG_TYPECAST_UDWORD
+#define REG_TYPECAST_RO_UDWORD
+#define REG_TYPECAST_UWORD
+#define REG_TYPECAST_RO_UWORD
+#define REG_TYPECAST_BYTE
+#define REG_TYPECAST_RO_BYTE
+
+/*
+ * Shadow register type-casts
+ */
+#define REG_STYPECAST_UDWORD
+#define REG_STYPECAST_UWORD
+#define REG_STYPECAST_BYTE
+
+#endif
+
+
+#define REG_UDWORD udword
+#define REG_UWORD uword
+#define REG_BYTE byte
+
+#define REG__on 0xffffffffU
+#define REG__off 0
+
+#endif /* __REG_GENERAL_2_H__ */
+
+#include "hwregs_int.h"
+
+#ifndef __REG_GENERAL_3_H__
+#define __REG_GENERAL_3_H__
+
+/*
+** This part of hwregs.h is common to all shadow
+** register modules, and should therefore only be included once to
+** avoid macro redefinitions.
+*/
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_GET
+*#
+*# PARAMETERS : reg : Name of a register.
+*# field : Name of a field.
+*#
+*# RETURNS : Value of field field in register reg.
+*#
+*# SIDE EFFECTS: May evaluate REG_SERROR.
+*#
+*# DESCRIPTION : Read a field in a register. Also see description
+*# of REG_GET_WO, REG_GET_RO, and REG_GET_RW.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to reg and field parameters when
+*# passing on to other macros.
+*#**********************************************************************/
+
+#define REG_GET(reg,field) ( \
+ reg##__GET(reg##_, field##_) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_IGET
+*#
+*# PARAMETERS : i : Interface number.
+*# reg : Name of a register.
+*# field : Name of a field.
+*#
+*# RETURNS : Value of field field in register reg.
+*#
+*# SIDE EFFECTS: May evaluate REG_SERROR, and REG_IERROR.
+*#
+*# DESCRIPTION : Read a field in a register for interface i.
+*# Also see description of REG_IGET_WO, REG_IGET_RO,
+*# and REG_IGET_RW.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to reg and field parameters when
+*# passing on to other macros.
+*#**********************************************************************/
+
+#define REG_IGET(i,reg,field) ( \
+ reg##__IGET(i, reg##_, field##_) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VGET
+*#
+*# PARAMETERS : reg : Name of a register.
+*# field : Name of a field.
+*# var : Variable or value to read from.
+*#
+*# RETURNS : Value of field field in variable var.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Interprets variable var as register reg, and read field
+*# field from variable var.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*#**********************************************************************/
+
+#define REG_VGET(reg,field,var) ( \
+ ((reg##__TYPE var) & reg##__##field##__##field##__MASK) >> \
+ reg##__##field##__BITNR \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET
+*#
+*# PARAMETERS : reg : Name of a register.
+*# field : Name of a field.
+*# val : Value to write to field.
+*#
+*# RETURNS : Integer value written to complete register.
+*#
+*# SIDE EFFECTS: May evaluate REG_SERROR and REG_VERROR.
+*#
+*# DESCRIPTION : Write val parameter to field field in register reg.
+*# Parameter reg must be a write only or read write
+*# register. Also see description of REG_SET_WO, and
+*# REG_SET_RW.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to reg and field parameters when
+*# passing on to other macros.
+*#**********************************************************************/
+
+#define REG_SET(reg,field,val) ( \
+ reg##__SET(reg##_, field##_, val) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_ISET
+*#
+*# PARAMETERS : i : Interface number.
+*# reg : Name of a register.
+*# field : Name of a field.
+*# val : Value to write to field.
+*#
+*# RETURNS : Integer value written to complete register.
+*#
+*# SIDE EFFECTS: May evaluate REG_IERROR, REG_SERROR, and REG_VERROR.
+*#
+*# DESCRIPTION : Write val parameter to field field in register reg
+*# of interface i. Parameter reg must be a write only
+*# or read write register. Also see description of
+*# REG_ISET_WO, and REG_ISET_RW.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to reg and field parameters when
+*# passing on to other macros.
+*#**********************************************************************/
+
+#define REG_ISET(i,reg,field,val) ( \
+ reg##__ISET(i, reg##_, field##_, val) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VSET
+*#
+*# PARAMETERS : reg : Name of a register.
+*# field : Name of a field.
+*# val : Value to write to field.
+*# var : Variable to write to.
+*#
+*# RETURNS : Integer value of variable var after write.
+*#
+*# SIDE EFFECTS: May evaluate REG_VERROR.
+*#
+*# DESCRIPTION : Interpret variable var as register reg, and write val
+*# parameter to field field in variable var.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to reg and field parameters when
+*# passing on to other macros.
+*#**********************************************************************/
+
+#define REG_VSET(reg,field,val,var) ( \
+ var = \
+ ((reg##__TYPE var) & REG_IMASK (reg##_, field##_)) | \
+ (reg##__##field##__##field##__VAL(reg##_, field##_, val) << \
+ reg##__##field##__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET_VAL
+*#
+*# PARAMETERS : reg : Name of a register.
+*# field : Name of a field.
+*# val : Integer value to write to symbolic field.
+*#
+*# RETURNS : Integer value written to complete register.
+*#
+*# SIDE EFFECTS: May evaluate REG_SERROR and REG_VERROR.
+*#
+*# DESCRIPTION : Write val parameter to field field in register reg.
+*# Parameter reg must be a write only or read write register.
+*# Also see description of REG_SET_VAL_WO, and REG_SET_VAL_RW.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to reg and field parameters when
+*# passing on to other macros.
+*#**********************************************************************/
+
+#define REG_SET_VAL(reg,field,val) ( \
+ reg##__SET_VAL(reg##_, field##_, val) \
+)
+
+/*
+ * See end of file for these.
+ *
+ * #define REG_SET__register-name
+ * #define REG_SET__register-name__SHADOW
+ * #define REG_MASK__register-name
+ * #define REG_VAL__register-name
+ */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_EQL
+*#
+*# PARAMETERS : reg : Name of a register.
+*# field : Name of a field.
+*# val : Value to compare with field.
+*#
+*# RETURNS : TRUE, FALSE
+*#
+*# SIDE EFFECTS: May evaluate REG_SERROR and REG_VERROR.
+*#
+*# DESCRIPTION : Compare val parameter with field field in register reg.
+*# Also description of REG_EQL_WO, REG_EQL_RO, and
+*# REG_EQL_RW.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to reg and field parameters when
+*# passing on to other macros.
+*#**********************************************************************/
+#define REG_EQL(reg,field,val) ( \
+ reg##__EQL(reg##_, field##_, val) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_IEQL
+*#
+*# PARAMETERS : i : Interface number.
+*# reg : Name of a register.
+*# field : Name of a field.
+*# val : Value to compare with field.
+*#
+*# RETURNS : TRUE, FALSE
+*#
+*# SIDE EFFECTS: May evaluate REG_VERROR, REG_IERROR, and REG_SERROR.
+*#
+*# DESCRIPTION : Compare val parameter with field field in register reg
+*# of interface i. Also see description of REG_IEQL_WO,
+*# REG_IEQ_RO, and REG_IEQL_RW.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to reg and field parameters when
+*# passing on to other macros.
+*#**********************************************************************/
+
+#define REG_IEQL(i,reg,field,val) ( \
+ reg##__IEQL(i,reg##_,field##_,val) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VEQL
+*#
+*# PARAMETERS : reg : Name of a register.
+*# field : Name of a field.
+*# val : Value to compare with field.
+*# var : Variable (or value) to compare with.
+*#
+*# RETURNS : TRUE, FALSE
+*#
+*# SIDE EFFECTS: May evaluate REG_VERROR.
+*#
+*# DESCRIPTION : Interprets variable var as register reg, and compare
+*# compare field field with parameter val.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to reg and field parameters when
+*# passing on to other macros.
+*#**********************************************************************/
+
+#define REG_VEQL(reg,field,val,var) ( \
+ ( ((reg##__TYPE (var)) & reg##__##field##__##field##__MASK) >> \
+ reg##__##field##__BITNR \
+ ) == reg##__##field##__##field##__VAL(reg##_, field##_, val) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL
+*#
+*# PARAMETERS : reg : Name of a register.
+*# field : Name of a field.
+*# val : A symbolic constant.
+*#
+*# RETURNS : val or (val << REG_VERROR()) macro.
+*#
+*# SIDE EFFECTS: May evaluate REG_VERROR macro.
+*#
+*# DESCRIPTION : Convert a symbolic constant to an integer value.
+*# Intended to be used for enumerated fields. Also
+*# Also works for value fields, in which case the val
+*# parameter is checked for range and returned if OK,
+*# and if val is out of range (val << REG_VERROR) is
+*# returned. Also see description of REG_VAL_VAL, and
+*# REG_VAL_ENUM.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to reg and field parameters when
+*# passing on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL(reg,field,val) ( \
+ reg##__##field##__##field##__VAL(reg##_, field##_, val) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_CHK_VAL
+*#
+*# PARAMETERS : reg : Name of a register.
+*# field : Name of a field.
+*# val : An integer value.
+*#
+*# RETURNS : 1 if val is within allowed range for field, otherwise 0.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Check if parameter val is within the field range,
+*# and return 1 if it is, otherwise 0.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*#**********************************************************************/
+
+#define REG_CHK_VAL(reg,field,val) ( \
+ (udword)(~(val)) <= (udword)(~(reg##__##field##__MIN)) && \
+ (udword)(val) <= (udword)(reg##__##field##__MAX) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_RD
+*#
+*# PARAMETERS : reg : Name of a register.
+*#
+*# RETURNS : Contents of register reg.
+*#
+*# SIDE EFFECTS: May evaluate REG_SERROR.
+*#
+*# DESCRIPTION : Read contents of register reg. Also see description of
+*# REG_RD_WO, REG_RD_RO, and REG_RD_RW.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to reg parameter when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_RD(reg) ( \
+ reg##__RD(reg##_) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_IRD
+*#
+*# PARAMETERS : i : Interface number.
+*# reg : Name of a register.
+*#
+*# RETURNS : Contents of register reg.
+*#
+*# SIDE EFFECTS: May evaluate REG_SERROR and REG_IERROR.
+*#
+*# DESCRIPTION : Read contents of register reg. Also see description of
+*# REG_IRD_WO, REG_IRD_RO, and REG_IRD_RW.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to reg parameter when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_IRD(i,reg) ( \
+ reg##__IRD(i,reg##_) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_WR
+*#
+*# PARAMETERS : reg : Name of a register.
+*# var : Variable (or value) to write to reg.
+*#
+*# RETURNS : integer value written to register reg.
+*#
+*# SIDE EFFECTS: May evaluate REG_SERROR.
+*#
+*# DESCRIPTION : Write value of var parameter to register reg. Also see
+*# description of REG_WR_WO, and REG_WR_RW.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to reg parameter when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_WR(reg,var) ( \
+ reg##__WR(reg##_,var) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_IWR
+*#
+*# PARAMETERS : i : Interface number.
+*# reg : Name of a register.
+*# var : Variable (or value) to write to reg.
+*#
+*# RETURNS : integer value written to register reg.
+*#
+*# SIDE EFFECTS: May evaluate REG_SERROR.
+*#
+*# DESCRIPTION : Write value of var parameter to register reg of
+*# interface i. Also see description of REG_IWR_WO,
+*# and REG_IWR_RW.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to reg parameter when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_IWR(i,reg,var) ( \
+ reg##__IWR(i##_, reg##_, var) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_ADDR
+*#
+*# PARAMETERS : reg : Name of a register.
+*#
+*# RETURNS : Address to register reg.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Calculate address to register reg.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*#**********************************************************************/
+
+#define REG_ADDR(reg) ( \
+ reg##__ADDR \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_BITNR
+*#
+*# PARAMETERS : reg : Name of a register.
+*# field : Name of a field in register reg.
+*#
+*# RETURNS : Position of least significant bit of field in reg..
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Calculate position of least significant bit of
+*# field field in register reg.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*#**********************************************************************/
+
+#define REG_BITNR(reg,field) ( \
+ reg##__##field##__BITNR \
+)
+
+#endif /* __REG_GENERAL_3_H__ */
+
+
+/*
+ * R_ALT_SER_BAUDRATE
+ * - type: WO
+ * - addr: 0xb000005c
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_ALT_SER_BAUDRATE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_ALT_SER_BAUDRATE.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_ALT_SER_BAUDRATE.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_ALT_SER_BAUDRATE(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_ALT_SER_BAUDRATE__SADDR = ( \
+ REG_INITIATED(R_ALT_SER_BAUDRATE_) \
+ REG_VAL__R_ALT_SER_BAUDRATE_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ), \
+ R_ALT_SER_BAUDRATE__WRITE(R_ALT_SER_BAUDRATE__ADDR, *R_ALT_SER_BAUDRATE__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_ALT_SER_BAUDRATE__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_ALT_SER_BAUDRATE.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_ALT_SER_BAUDRATE.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_ALT_SER_BAUDRATE__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_ALT_SER_BAUDRATE__SADDR = ( \
+ REG_INITIATED(R_ALT_SER_BAUDRATE_) \
+ REG_VAL__R_ALT_SER_BAUDRATE_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_ALT_SER_BAUDRATE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_ALT_SER_BAUDRATE(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_ALT_SER_BAUDRATE__ser3_tr__##f1##__MASK & REG__##v1) | \
+ (R_ALT_SER_BAUDRATE__ser3_rec__##f2##__MASK & REG__##v2) | \
+ (R_ALT_SER_BAUDRATE__ser2_tr__##f3##__MASK & REG__##v3) | \
+ (R_ALT_SER_BAUDRATE__ser2_rec__##f4##__MASK & REG__##v4) | \
+ (R_ALT_SER_BAUDRATE__ser1_tr__##f5##__MASK & REG__##v5) | \
+ (R_ALT_SER_BAUDRATE__ser1_rec__##f6##__MASK & REG__##v6) | \
+ (R_ALT_SER_BAUDRATE__ser0_tr__##f7##__MASK & REG__##v7) | \
+ (R_ALT_SER_BAUDRATE__ser0_rec__##f8##__MASK & REG__##v8) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_ALT_SER_BAUDRATE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_ALT_SER_BAUDRATE.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_ALT_SER_BAUDRATE(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_ALT_SER_BAUDRATE__ser3_tr__##f1##__VAL(R_ALT_SER_BAUDRATE_, ser3_tr_, v1) << R_ALT_SER_BAUDRATE__ser3_tr__BITNR) | \
+ (R_ALT_SER_BAUDRATE__ser3_rec__##f2##__VAL(R_ALT_SER_BAUDRATE_, ser3_rec_, v2) << R_ALT_SER_BAUDRATE__ser3_rec__BITNR) | \
+ (R_ALT_SER_BAUDRATE__ser2_tr__##f3##__VAL(R_ALT_SER_BAUDRATE_, ser2_tr_, v3) << R_ALT_SER_BAUDRATE__ser2_tr__BITNR) | \
+ (R_ALT_SER_BAUDRATE__ser2_rec__##f4##__VAL(R_ALT_SER_BAUDRATE_, ser2_rec_, v4) << R_ALT_SER_BAUDRATE__ser2_rec__BITNR) | \
+ (R_ALT_SER_BAUDRATE__ser1_tr__##f5##__VAL(R_ALT_SER_BAUDRATE_, ser1_tr_, v5) << R_ALT_SER_BAUDRATE__ser1_tr__BITNR) | \
+ (R_ALT_SER_BAUDRATE__ser1_rec__##f6##__VAL(R_ALT_SER_BAUDRATE_, ser1_rec_, v6) << R_ALT_SER_BAUDRATE__ser1_rec__BITNR) | \
+ (R_ALT_SER_BAUDRATE__ser0_tr__##f7##__VAL(R_ALT_SER_BAUDRATE_, ser0_tr_, v7) << R_ALT_SER_BAUDRATE__ser0_tr__BITNR) | \
+ (R_ALT_SER_BAUDRATE__ser0_rec__##f8##__VAL(R_ALT_SER_BAUDRATE_, ser0_rec_, v8) << R_ALT_SER_BAUDRATE__ser0_rec__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_ALT_SER_BAUDRATE_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_ALT_SER_BAUDRATE.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_ALT_SER_BAUDRATE_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8) ( \
+ (R_ALT_SER_BAUDRATE__ser3_tr__##f1_##_VAL(R_ALT_SER_BAUDRATE_, ser3_tr_, v1) << R_ALT_SER_BAUDRATE__ser3_tr__BITNR) | \
+ (R_ALT_SER_BAUDRATE__ser3_rec__##f2_##_VAL(R_ALT_SER_BAUDRATE_, ser3_rec_, v2) << R_ALT_SER_BAUDRATE__ser3_rec__BITNR) | \
+ (R_ALT_SER_BAUDRATE__ser2_tr__##f3_##_VAL(R_ALT_SER_BAUDRATE_, ser2_tr_, v3) << R_ALT_SER_BAUDRATE__ser2_tr__BITNR) | \
+ (R_ALT_SER_BAUDRATE__ser2_rec__##f4_##_VAL(R_ALT_SER_BAUDRATE_, ser2_rec_, v4) << R_ALT_SER_BAUDRATE__ser2_rec__BITNR) | \
+ (R_ALT_SER_BAUDRATE__ser1_tr__##f5_##_VAL(R_ALT_SER_BAUDRATE_, ser1_tr_, v5) << R_ALT_SER_BAUDRATE__ser1_tr__BITNR) | \
+ (R_ALT_SER_BAUDRATE__ser1_rec__##f6_##_VAL(R_ALT_SER_BAUDRATE_, ser1_rec_, v6) << R_ALT_SER_BAUDRATE__ser1_rec__BITNR) | \
+ (R_ALT_SER_BAUDRATE__ser0_tr__##f7_##_VAL(R_ALT_SER_BAUDRATE_, ser0_tr_, v7) << R_ALT_SER_BAUDRATE__ser0_tr__BITNR) | \
+ (R_ALT_SER_BAUDRATE__ser0_rec__##f8_##_VAL(R_ALT_SER_BAUDRATE_, ser0_rec_, v8) << R_ALT_SER_BAUDRATE__ser0_rec__BITNR) \
+)
+
+#endif
+
+/*
+ * R_ATA_CONFIG
+ * - type: WO
+ * - addr: 0xb0000044
+ * - group: ATA interface registers
+ */
+
+#if USE_GROUP__ATA_interface_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_ATA_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_ATA_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_ATA_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_ATA_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ *R_ATA_CONFIG__SADDR = ( \
+ REG_INITIATED(R_ATA_CONFIG_) \
+ REG_VAL__R_ATA_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6) \
+ ), \
+ R_ATA_CONFIG__WRITE(R_ATA_CONFIG__ADDR, *R_ATA_CONFIG__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_ATA_CONFIG__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_ATA_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_ATA_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_ATA_CONFIG__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ *R_ATA_CONFIG__SADDR = ( \
+ REG_INITIATED(R_ATA_CONFIG_) \
+ REG_VAL__R_ATA_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_ATA_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_ATA_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ (R_ATA_CONFIG__enable__##f1##__MASK & REG__##v1) | \
+ (R_ATA_CONFIG__dma_strobe__##f2##__MASK & REG__##v2) | \
+ (R_ATA_CONFIG__dma_hold__##f3##__MASK & REG__##v3) | \
+ (R_ATA_CONFIG__pio_setup__##f4##__MASK & REG__##v4) | \
+ (R_ATA_CONFIG__pio_strobe__##f5##__MASK & REG__##v5) | \
+ (R_ATA_CONFIG__pio_hold__##f6##__MASK & REG__##v6) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_ATA_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_ATA_CONFIG.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_ATA_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ (R_ATA_CONFIG__enable__##f1##__VAL(R_ATA_CONFIG_, enable_, v1) << R_ATA_CONFIG__enable__BITNR) | \
+ (R_ATA_CONFIG__dma_strobe__##f2##__VAL(R_ATA_CONFIG_, dma_strobe_, v2) << R_ATA_CONFIG__dma_strobe__BITNR) | \
+ (R_ATA_CONFIG__dma_hold__##f3##__VAL(R_ATA_CONFIG_, dma_hold_, v3) << R_ATA_CONFIG__dma_hold__BITNR) | \
+ (R_ATA_CONFIG__pio_setup__##f4##__VAL(R_ATA_CONFIG_, pio_setup_, v4) << R_ATA_CONFIG__pio_setup__BITNR) | \
+ (R_ATA_CONFIG__pio_strobe__##f5##__VAL(R_ATA_CONFIG_, pio_strobe_, v5) << R_ATA_CONFIG__pio_strobe__BITNR) | \
+ (R_ATA_CONFIG__pio_hold__##f6##__VAL(R_ATA_CONFIG_, pio_hold_, v6) << R_ATA_CONFIG__pio_hold__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_ATA_CONFIG_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_ATA_CONFIG.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_ATA_CONFIG_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6) ( \
+ (R_ATA_CONFIG__enable__##f1_##_VAL(R_ATA_CONFIG_, enable_, v1) << R_ATA_CONFIG__enable__BITNR) | \
+ (R_ATA_CONFIG__dma_strobe__##f2_##_VAL(R_ATA_CONFIG_, dma_strobe_, v2) << R_ATA_CONFIG__dma_strobe__BITNR) | \
+ (R_ATA_CONFIG__dma_hold__##f3_##_VAL(R_ATA_CONFIG_, dma_hold_, v3) << R_ATA_CONFIG__dma_hold__BITNR) | \
+ (R_ATA_CONFIG__pio_setup__##f4_##_VAL(R_ATA_CONFIG_, pio_setup_, v4) << R_ATA_CONFIG__pio_setup__BITNR) | \
+ (R_ATA_CONFIG__pio_strobe__##f5_##_VAL(R_ATA_CONFIG_, pio_strobe_, v5) << R_ATA_CONFIG__pio_strobe__BITNR) | \
+ (R_ATA_CONFIG__pio_hold__##f6_##_VAL(R_ATA_CONFIG_, pio_hold_, v6) << R_ATA_CONFIG__pio_hold__BITNR) \
+)
+
+#endif
+
+/*
+ * R_ATA_CTRL_DATA
+ * - type: WO
+ * - addr: 0xb0000040
+ * - group: ATA interface registers
+ */
+
+#if USE_GROUP__ATA_interface_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_ATA_CTRL_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_ATA_CTRL_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_ATA_CTRL_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_ATA_CTRL_DATA(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ *R_ATA_CTRL_DATA__SADDR = ( \
+ REG_INITIATED(R_ATA_CTRL_DATA_) \
+ REG_VAL__R_ATA_CTRL_DATA_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10) \
+ ), \
+ R_ATA_CTRL_DATA__WRITE(R_ATA_CTRL_DATA__ADDR, *R_ATA_CTRL_DATA__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_ATA_CTRL_DATA__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_ATA_CTRL_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_ATA_CTRL_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_ATA_CTRL_DATA__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ *R_ATA_CTRL_DATA__SADDR = ( \
+ REG_INITIATED(R_ATA_CTRL_DATA_) \
+ REG_VAL__R_ATA_CTRL_DATA_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_ATA_CTRL_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_ATA_CTRL_DATA(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ (R_ATA_CTRL_DATA__sel__##f1##__MASK & REG__##v1) | \
+ (R_ATA_CTRL_DATA__cs1__##f2##__MASK & REG__##v2) | \
+ (R_ATA_CTRL_DATA__cs0__##f3##__MASK & REG__##v3) | \
+ (R_ATA_CTRL_DATA__addr__##f4##__MASK & REG__##v4) | \
+ (R_ATA_CTRL_DATA__rw__##f5##__MASK & REG__##v5) | \
+ (R_ATA_CTRL_DATA__src_dst__##f6##__MASK & REG__##v6) | \
+ (R_ATA_CTRL_DATA__handsh__##f7##__MASK & REG__##v7) | \
+ (R_ATA_CTRL_DATA__multi__##f8##__MASK & REG__##v8) | \
+ (R_ATA_CTRL_DATA__dma_size__##f9##__MASK & REG__##v9) | \
+ (R_ATA_CTRL_DATA__data__##f10##__MASK & REG__##v10) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_ATA_CTRL_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_ATA_CTRL_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_ATA_CTRL_DATA(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ (R_ATA_CTRL_DATA__sel__##f1##__VAL(R_ATA_CTRL_DATA_, sel_, v1) << R_ATA_CTRL_DATA__sel__BITNR) | \
+ (R_ATA_CTRL_DATA__cs1__##f2##__VAL(R_ATA_CTRL_DATA_, cs1_, v2) << R_ATA_CTRL_DATA__cs1__BITNR) | \
+ (R_ATA_CTRL_DATA__cs0__##f3##__VAL(R_ATA_CTRL_DATA_, cs0_, v3) << R_ATA_CTRL_DATA__cs0__BITNR) | \
+ (R_ATA_CTRL_DATA__addr__##f4##__VAL(R_ATA_CTRL_DATA_, addr_, v4) << R_ATA_CTRL_DATA__addr__BITNR) | \
+ (R_ATA_CTRL_DATA__rw__##f5##__VAL(R_ATA_CTRL_DATA_, rw_, v5) << R_ATA_CTRL_DATA__rw__BITNR) | \
+ (R_ATA_CTRL_DATA__src_dst__##f6##__VAL(R_ATA_CTRL_DATA_, src_dst_, v6) << R_ATA_CTRL_DATA__src_dst__BITNR) | \
+ (R_ATA_CTRL_DATA__handsh__##f7##__VAL(R_ATA_CTRL_DATA_, handsh_, v7) << R_ATA_CTRL_DATA__handsh__BITNR) | \
+ (R_ATA_CTRL_DATA__multi__##f8##__VAL(R_ATA_CTRL_DATA_, multi_, v8) << R_ATA_CTRL_DATA__multi__BITNR) | \
+ (R_ATA_CTRL_DATA__dma_size__##f9##__VAL(R_ATA_CTRL_DATA_, dma_size_, v9) << R_ATA_CTRL_DATA__dma_size__BITNR) | \
+ (R_ATA_CTRL_DATA__data__##f10##__VAL(R_ATA_CTRL_DATA_, data_, v10) << R_ATA_CTRL_DATA__data__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_ATA_CTRL_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_ATA_CTRL_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_ATA_CTRL_DATA_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10) ( \
+ (R_ATA_CTRL_DATA__sel__##f1_##_VAL(R_ATA_CTRL_DATA_, sel_, v1) << R_ATA_CTRL_DATA__sel__BITNR) | \
+ (R_ATA_CTRL_DATA__cs1__##f2_##_VAL(R_ATA_CTRL_DATA_, cs1_, v2) << R_ATA_CTRL_DATA__cs1__BITNR) | \
+ (R_ATA_CTRL_DATA__cs0__##f3_##_VAL(R_ATA_CTRL_DATA_, cs0_, v3) << R_ATA_CTRL_DATA__cs0__BITNR) | \
+ (R_ATA_CTRL_DATA__addr__##f4_##_VAL(R_ATA_CTRL_DATA_, addr_, v4) << R_ATA_CTRL_DATA__addr__BITNR) | \
+ (R_ATA_CTRL_DATA__rw__##f5_##_VAL(R_ATA_CTRL_DATA_, rw_, v5) << R_ATA_CTRL_DATA__rw__BITNR) | \
+ (R_ATA_CTRL_DATA__src_dst__##f6_##_VAL(R_ATA_CTRL_DATA_, src_dst_, v6) << R_ATA_CTRL_DATA__src_dst__BITNR) | \
+ (R_ATA_CTRL_DATA__handsh__##f7_##_VAL(R_ATA_CTRL_DATA_, handsh_, v7) << R_ATA_CTRL_DATA__handsh__BITNR) | \
+ (R_ATA_CTRL_DATA__multi__##f8_##_VAL(R_ATA_CTRL_DATA_, multi_, v8) << R_ATA_CTRL_DATA__multi__BITNR) | \
+ (R_ATA_CTRL_DATA__dma_size__##f9_##_VAL(R_ATA_CTRL_DATA_, dma_size_, v9) << R_ATA_CTRL_DATA__dma_size__BITNR) | \
+ (R_ATA_CTRL_DATA__data__##f10_##_VAL(R_ATA_CTRL_DATA_, data_, v10) << R_ATA_CTRL_DATA__data__BITNR) \
+)
+
+#endif
+
+/*
+ * R_ATA_STATUS_DATA
+ * - type: RO
+ * - addr: 0xb0000040
+ * - group: ATA interface registers
+ */
+
+#if USE_GROUP__ATA_interface_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_ATA_STATUS_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_ATA_STATUS_DATA(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ (R_ATA_STATUS_DATA__busy__##f1##__MASK & REG__##v1) | \
+ (R_ATA_STATUS_DATA__tr_rdy__##f2##__MASK & REG__##v2) | \
+ (R_ATA_STATUS_DATA__dav__##f3##__MASK & REG__##v3) | \
+ (R_ATA_STATUS_DATA__data__##f4##__MASK & REG__##v4) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_ATA_STATUS_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_ATA_STATUS_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_ATA_STATUS_DATA(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ (R_ATA_STATUS_DATA__busy__##f1##__VAL(R_ATA_STATUS_DATA_, busy_, v1) << R_ATA_STATUS_DATA__busy__BITNR) | \
+ (R_ATA_STATUS_DATA__tr_rdy__##f2##__VAL(R_ATA_STATUS_DATA_, tr_rdy_, v2) << R_ATA_STATUS_DATA__tr_rdy__BITNR) | \
+ (R_ATA_STATUS_DATA__dav__##f3##__VAL(R_ATA_STATUS_DATA_, dav_, v3) << R_ATA_STATUS_DATA__dav__BITNR) | \
+ (R_ATA_STATUS_DATA__data__##f4##__VAL(R_ATA_STATUS_DATA_, data_, v4) << R_ATA_STATUS_DATA__data__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_ATA_STATUS_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_ATA_STATUS_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_ATA_STATUS_DATA_(f1_,v1,f2_,v2,f3_,v3,f4_,v4) ( \
+ (R_ATA_STATUS_DATA__busy__##f1_##_VAL(R_ATA_STATUS_DATA_, busy_, v1) << R_ATA_STATUS_DATA__busy__BITNR) | \
+ (R_ATA_STATUS_DATA__tr_rdy__##f2_##_VAL(R_ATA_STATUS_DATA_, tr_rdy_, v2) << R_ATA_STATUS_DATA__tr_rdy__BITNR) | \
+ (R_ATA_STATUS_DATA__dav__##f3_##_VAL(R_ATA_STATUS_DATA_, dav_, v3) << R_ATA_STATUS_DATA__dav__BITNR) | \
+ (R_ATA_STATUS_DATA__data__##f4_##_VAL(R_ATA_STATUS_DATA_, data_, v4) << R_ATA_STATUS_DATA__data__BITNR) \
+)
+
+#endif
+
+/*
+ * R_ATA_TRANSFER_CNT
+ * - type: RW
+ * - addr: 0xb0000048
+ * - group: ATA interface registers
+ */
+
+#if USE_GROUP__ATA_interface_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_ATA_TRANSFER_CNT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_ATA_TRANSFER_CNT.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_ATA_TRANSFER_CNT.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_ATA_TRANSFER_CNT(f1,v1) ( \
+ R_ATA_TRANSFER_CNT__WRITE(R_ATA_TRANSFER_CNT__ADDR, ( \
+ REG_VAL__R_ATA_TRANSFER_CNT_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_ATA_TRANSFER_CNT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_ATA_TRANSFER_CNT(f1,v1) ( \
+ (R_ATA_TRANSFER_CNT__count__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_ATA_TRANSFER_CNT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_ATA_TRANSFER_CNT.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_ATA_TRANSFER_CNT(f1,v1) ( \
+ (R_ATA_TRANSFER_CNT__count__##f1##__VAL(R_ATA_TRANSFER_CNT_, count_, v1) << R_ATA_TRANSFER_CNT__count__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_ATA_TRANSFER_CNT_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_ATA_TRANSFER_CNT.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_ATA_TRANSFER_CNT_(f1_,v1) ( \
+ (R_ATA_TRANSFER_CNT__count__##f1_##_VAL(R_ATA_TRANSFER_CNT_, count_, v1) << R_ATA_TRANSFER_CNT__count__BITNR) \
+)
+
+#endif
+
+/*
+ * R_BUS_CONFIG
+ * - type: WO
+ * - addr: 0xb0000004
+ * - group: Bus interface configuration registers
+ */
+
+#if USE_GROUP__Bus_interface_configuration_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_BUS_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_BUS_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_BUS_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_BUS_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ *R_BUS_CONFIG__SADDR = ( \
+ REG_INITIATED(R_BUS_CONFIG_) \
+ REG_VAL__R_BUS_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10) \
+ ), \
+ R_BUS_CONFIG__WRITE(R_BUS_CONFIG__ADDR, *R_BUS_CONFIG__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_BUS_CONFIG__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_BUS_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_BUS_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_BUS_CONFIG__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ *R_BUS_CONFIG__SADDR = ( \
+ REG_INITIATED(R_BUS_CONFIG_) \
+ REG_VAL__R_BUS_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_BUS_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_BUS_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ (R_BUS_CONFIG__sram_type__##f1##__MASK & REG__##v1) | \
+ (R_BUS_CONFIG__dma_burst__##f2##__MASK & REG__##v2) | \
+ (R_BUS_CONFIG__pcs4_7_wr__##f3##__MASK & REG__##v3) | \
+ (R_BUS_CONFIG__pcs0_3_wr__##f4##__MASK & REG__##v4) | \
+ (R_BUS_CONFIG__sram_wr__##f5##__MASK & REG__##v5) | \
+ (R_BUS_CONFIG__flash_wr__##f6##__MASK & REG__##v6) | \
+ (R_BUS_CONFIG__pcs4_7_bw__##f7##__MASK & REG__##v7) | \
+ (R_BUS_CONFIG__pcs0_3_bw__##f8##__MASK & REG__##v8) | \
+ (R_BUS_CONFIG__sram_bw__##f9##__MASK & REG__##v9) | \
+ (R_BUS_CONFIG__flash_bw__##f10##__MASK & REG__##v10) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_BUS_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_BUS_CONFIG.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_BUS_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ (R_BUS_CONFIG__sram_type__##f1##__VAL(R_BUS_CONFIG_, sram_type_, v1) << R_BUS_CONFIG__sram_type__BITNR) | \
+ (R_BUS_CONFIG__dma_burst__##f2##__VAL(R_BUS_CONFIG_, dma_burst_, v2) << R_BUS_CONFIG__dma_burst__BITNR) | \
+ (R_BUS_CONFIG__pcs4_7_wr__##f3##__VAL(R_BUS_CONFIG_, pcs4_7_wr_, v3) << R_BUS_CONFIG__pcs4_7_wr__BITNR) | \
+ (R_BUS_CONFIG__pcs0_3_wr__##f4##__VAL(R_BUS_CONFIG_, pcs0_3_wr_, v4) << R_BUS_CONFIG__pcs0_3_wr__BITNR) | \
+ (R_BUS_CONFIG__sram_wr__##f5##__VAL(R_BUS_CONFIG_, sram_wr_, v5) << R_BUS_CONFIG__sram_wr__BITNR) | \
+ (R_BUS_CONFIG__flash_wr__##f6##__VAL(R_BUS_CONFIG_, flash_wr_, v6) << R_BUS_CONFIG__flash_wr__BITNR) | \
+ (R_BUS_CONFIG__pcs4_7_bw__##f7##__VAL(R_BUS_CONFIG_, pcs4_7_bw_, v7) << R_BUS_CONFIG__pcs4_7_bw__BITNR) | \
+ (R_BUS_CONFIG__pcs0_3_bw__##f8##__VAL(R_BUS_CONFIG_, pcs0_3_bw_, v8) << R_BUS_CONFIG__pcs0_3_bw__BITNR) | \
+ (R_BUS_CONFIG__sram_bw__##f9##__VAL(R_BUS_CONFIG_, sram_bw_, v9) << R_BUS_CONFIG__sram_bw__BITNR) | \
+ (R_BUS_CONFIG__flash_bw__##f10##__VAL(R_BUS_CONFIG_, flash_bw_, v10) << R_BUS_CONFIG__flash_bw__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_BUS_CONFIG_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_BUS_CONFIG.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_BUS_CONFIG_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10) ( \
+ (R_BUS_CONFIG__sram_type__##f1_##_VAL(R_BUS_CONFIG_, sram_type_, v1) << R_BUS_CONFIG__sram_type__BITNR) | \
+ (R_BUS_CONFIG__dma_burst__##f2_##_VAL(R_BUS_CONFIG_, dma_burst_, v2) << R_BUS_CONFIG__dma_burst__BITNR) | \
+ (R_BUS_CONFIG__pcs4_7_wr__##f3_##_VAL(R_BUS_CONFIG_, pcs4_7_wr_, v3) << R_BUS_CONFIG__pcs4_7_wr__BITNR) | \
+ (R_BUS_CONFIG__pcs0_3_wr__##f4_##_VAL(R_BUS_CONFIG_, pcs0_3_wr_, v4) << R_BUS_CONFIG__pcs0_3_wr__BITNR) | \
+ (R_BUS_CONFIG__sram_wr__##f5_##_VAL(R_BUS_CONFIG_, sram_wr_, v5) << R_BUS_CONFIG__sram_wr__BITNR) | \
+ (R_BUS_CONFIG__flash_wr__##f6_##_VAL(R_BUS_CONFIG_, flash_wr_, v6) << R_BUS_CONFIG__flash_wr__BITNR) | \
+ (R_BUS_CONFIG__pcs4_7_bw__##f7_##_VAL(R_BUS_CONFIG_, pcs4_7_bw_, v7) << R_BUS_CONFIG__pcs4_7_bw__BITNR) | \
+ (R_BUS_CONFIG__pcs0_3_bw__##f8_##_VAL(R_BUS_CONFIG_, pcs0_3_bw_, v8) << R_BUS_CONFIG__pcs0_3_bw__BITNR) | \
+ (R_BUS_CONFIG__sram_bw__##f9_##_VAL(R_BUS_CONFIG_, sram_bw_, v9) << R_BUS_CONFIG__sram_bw__BITNR) | \
+ (R_BUS_CONFIG__flash_bw__##f10_##_VAL(R_BUS_CONFIG_, flash_bw_, v10) << R_BUS_CONFIG__flash_bw__BITNR) \
+)
+
+#endif
+
+/*
+ * R_BUS_STATUS
+ * - type: RO
+ * - addr: 0xb0000004
+ * - group: Bus interface configuration registers
+ */
+
+#if USE_GROUP__Bus_interface_configuration_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_BUS_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_BUS_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) ( \
+ (R_BUS_STATUS__pll_lock_tm__##f1##__MASK & REG__##v1) | \
+ (R_BUS_STATUS__both_faults__##f2##__MASK & REG__##v2) | \
+ (R_BUS_STATUS__bsen___##f3##__MASK & REG__##v3) | \
+ (R_BUS_STATUS__boot__##f4##__MASK & REG__##v4) | \
+ (R_BUS_STATUS__flashw__##f5##__MASK & REG__##v5) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_BUS_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_BUS_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_BUS_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) ( \
+ (R_BUS_STATUS__pll_lock_tm__##f1##__VAL(R_BUS_STATUS_, pll_lock_tm_, v1) << R_BUS_STATUS__pll_lock_tm__BITNR) | \
+ (R_BUS_STATUS__both_faults__##f2##__VAL(R_BUS_STATUS_, both_faults_, v2) << R_BUS_STATUS__both_faults__BITNR) | \
+ (R_BUS_STATUS__bsen___##f3##__VAL(R_BUS_STATUS_, bsen__, v3) << R_BUS_STATUS__bsen___BITNR) | \
+ (R_BUS_STATUS__boot__##f4##__VAL(R_BUS_STATUS_, boot_, v4) << R_BUS_STATUS__boot__BITNR) | \
+ (R_BUS_STATUS__flashw__##f5##__VAL(R_BUS_STATUS_, flashw_, v5) << R_BUS_STATUS__flashw__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_BUS_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_BUS_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_BUS_STATUS_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5) ( \
+ (R_BUS_STATUS__pll_lock_tm__##f1_##_VAL(R_BUS_STATUS_, pll_lock_tm_, v1) << R_BUS_STATUS__pll_lock_tm__BITNR) | \
+ (R_BUS_STATUS__both_faults__##f2_##_VAL(R_BUS_STATUS_, both_faults_, v2) << R_BUS_STATUS__both_faults__BITNR) | \
+ (R_BUS_STATUS__bsen___##f3_##_VAL(R_BUS_STATUS_, bsen__, v3) << R_BUS_STATUS__bsen___BITNR) | \
+ (R_BUS_STATUS__boot__##f4_##_VAL(R_BUS_STATUS_, boot_, v4) << R_BUS_STATUS__boot__BITNR) | \
+ (R_BUS_STATUS__flashw__##f5_##_VAL(R_BUS_STATUS_, flashw_, v5) << R_BUS_STATUS__flashw__BITNR) \
+)
+
+#endif
+
+/*
+ * R_CLOCK_PRESCALE
+ * - type: WO
+ * - addr: 0xb00000f0
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_CLOCK_PRESCALE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_CLOCK_PRESCALE.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_CLOCK_PRESCALE.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_CLOCK_PRESCALE(f1,v1,f2,v2) ( \
+ *R_CLOCK_PRESCALE__SADDR = ( \
+ REG_INITIATED(R_CLOCK_PRESCALE_) \
+ REG_VAL__R_CLOCK_PRESCALE_(f1##_,v1,f2##_,v2) \
+ ), \
+ R_CLOCK_PRESCALE__WRITE(R_CLOCK_PRESCALE__ADDR, *R_CLOCK_PRESCALE__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_CLOCK_PRESCALE__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_CLOCK_PRESCALE.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_CLOCK_PRESCALE.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_CLOCK_PRESCALE__SHADOW(f1,v1,f2,v2) ( \
+ *R_CLOCK_PRESCALE__SADDR = ( \
+ REG_INITIATED(R_CLOCK_PRESCALE_) \
+ REG_VAL__R_CLOCK_PRESCALE_(f1##_,v1,f2##_,v2) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_CLOCK_PRESCALE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_CLOCK_PRESCALE(f1,v1,f2,v2) ( \
+ (R_CLOCK_PRESCALE__ser_presc__##f1##__MASK & REG__##v1) | \
+ (R_CLOCK_PRESCALE__tim_presc__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_CLOCK_PRESCALE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_CLOCK_PRESCALE.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_CLOCK_PRESCALE(f1,v1,f2,v2) ( \
+ (R_CLOCK_PRESCALE__ser_presc__##f1##__VAL(R_CLOCK_PRESCALE_, ser_presc_, v1) << R_CLOCK_PRESCALE__ser_presc__BITNR) | \
+ (R_CLOCK_PRESCALE__tim_presc__##f2##__VAL(R_CLOCK_PRESCALE_, tim_presc_, v2) << R_CLOCK_PRESCALE__tim_presc__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_CLOCK_PRESCALE_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_CLOCK_PRESCALE.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_CLOCK_PRESCALE_(f1_,v1,f2_,v2) ( \
+ (R_CLOCK_PRESCALE__ser_presc__##f1_##_VAL(R_CLOCK_PRESCALE_, ser_presc_, v1) << R_CLOCK_PRESCALE__ser_presc__BITNR) | \
+ (R_CLOCK_PRESCALE__tim_presc__##f2_##_VAL(R_CLOCK_PRESCALE_, tim_presc_, v2) << R_CLOCK_PRESCALE__tim_presc__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH0_BUF
+ * - type: RW
+ * - addr: 0xb0000108
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH0_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH0_BUF.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH0_BUF.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH0_BUF(f1,v1) ( \
+ R_DMA_CH0_BUF__WRITE(R_DMA_CH0_BUF__ADDR, ( \
+ REG_VAL__R_DMA_CH0_BUF_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH0_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH0_BUF(f1,v1) ( \
+ (R_DMA_CH0_BUF__buf__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH0_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH0_BUF.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH0_BUF(f1,v1) ( \
+ (R_DMA_CH0_BUF__buf__##f1##__VAL(R_DMA_CH0_BUF_, buf_, v1) << R_DMA_CH0_BUF__buf__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH0_BUF_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH0_BUF.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH0_BUF_(f1_,v1) ( \
+ (R_DMA_CH0_BUF__buf__##f1_##_VAL(R_DMA_CH0_BUF_, buf_, v1) << R_DMA_CH0_BUF__buf__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH0_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001d1
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH0_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH0_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH0_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH0_CLR_INTR(f1,v1,f2,v2) ( \
+ *R_DMA_CH0_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH0_CLR_INTR_) \
+ REG_VAL__R_DMA_CH0_CLR_INTR_(f1##_,v1,f2##_,v2) \
+ ), \
+ R_DMA_CH0_CLR_INTR__WRITE(R_DMA_CH0_CLR_INTR__ADDR, *R_DMA_CH0_CLR_INTR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH0_CLR_INTR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH0_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_DMA_CH0_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH0_CLR_INTR__SHADOW(f1,v1,f2,v2) ( \
+ *R_DMA_CH0_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH0_CLR_INTR_) \
+ REG_VAL__R_DMA_CH0_CLR_INTR_(f1##_,v1,f2##_,v2) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH0_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH0_CLR_INTR(f1,v1,f2,v2) ( \
+ (R_DMA_CH0_CLR_INTR__clr_eop__##f1##__MASK & REG__##v1) | \
+ (R_DMA_CH0_CLR_INTR__clr_descr__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH0_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH0_CLR_INTR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH0_CLR_INTR(f1,v1,f2,v2) ( \
+ (R_DMA_CH0_CLR_INTR__clr_eop__##f1##__VAL(R_DMA_CH0_CLR_INTR_, clr_eop_, v1) << R_DMA_CH0_CLR_INTR__clr_eop__BITNR) | \
+ (R_DMA_CH0_CLR_INTR__clr_descr__##f2##__VAL(R_DMA_CH0_CLR_INTR_, clr_descr_, v2) << R_DMA_CH0_CLR_INTR__clr_descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH0_CLR_INTR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH0_CLR_INTR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH0_CLR_INTR_(f1_,v1,f2_,v2) ( \
+ (R_DMA_CH0_CLR_INTR__clr_eop__##f1_##_VAL(R_DMA_CH0_CLR_INTR_, clr_eop_, v1) << R_DMA_CH0_CLR_INTR__clr_eop__BITNR) | \
+ (R_DMA_CH0_CLR_INTR__clr_descr__##f2_##_VAL(R_DMA_CH0_CLR_INTR_, clr_descr_, v2) << R_DMA_CH0_CLR_INTR__clr_descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH0_CMD
+ * - type: RW
+ * - addr: 0xb00001d0
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH0_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH0_CMD.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH0_CMD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH0_CMD(f1,v1) ( \
+ R_DMA_CH0_CMD__WRITE(R_DMA_CH0_CMD__ADDR, ( \
+ REG_VAL__R_DMA_CH0_CMD_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH0_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH0_CMD(f1,v1) ( \
+ (R_DMA_CH0_CMD__cmd__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH0_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH0_CMD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH0_CMD(f1,v1) ( \
+ (R_DMA_CH0_CMD__cmd__##f1##__VAL(R_DMA_CH0_CMD_, cmd_, v1) << R_DMA_CH0_CMD__cmd__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH0_CMD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH0_CMD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH0_CMD_(f1_,v1) ( \
+ (R_DMA_CH0_CMD__cmd__##f1_##_VAL(R_DMA_CH0_CMD_, cmd_, v1) << R_DMA_CH0_CMD__cmd__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH0_DESCR
+ * - type: RW
+ * - addr: 0xb000010c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH0_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH0_DESCR.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH0_DESCR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH0_DESCR(f1,v1) ( \
+ R_DMA_CH0_DESCR__WRITE(R_DMA_CH0_DESCR__ADDR, ( \
+ REG_VAL__R_DMA_CH0_DESCR_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH0_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH0_DESCR(f1,v1) ( \
+ (R_DMA_CH0_DESCR__descr__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH0_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH0_DESCR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH0_DESCR(f1,v1) ( \
+ (R_DMA_CH0_DESCR__descr__##f1##__VAL(R_DMA_CH0_DESCR_, descr_, v1) << R_DMA_CH0_DESCR__descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH0_DESCR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH0_DESCR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH0_DESCR_(f1_,v1) ( \
+ (R_DMA_CH0_DESCR__descr__##f1_##_VAL(R_DMA_CH0_DESCR_, descr_, v1) << R_DMA_CH0_DESCR__descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH0_FIRST
+ * - type: RW
+ * - addr: 0xb00001a0
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH0_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH0_FIRST.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH0_FIRST.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH0_FIRST(f1,v1) ( \
+ R_DMA_CH0_FIRST__WRITE(R_DMA_CH0_FIRST__ADDR, ( \
+ REG_VAL__R_DMA_CH0_FIRST_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH0_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH0_FIRST(f1,v1) ( \
+ (R_DMA_CH0_FIRST__first__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH0_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH0_FIRST.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH0_FIRST(f1,v1) ( \
+ (R_DMA_CH0_FIRST__first__##f1##__VAL(R_DMA_CH0_FIRST_, first_, v1) << R_DMA_CH0_FIRST__first__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH0_FIRST_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH0_FIRST.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH0_FIRST_(f1_,v1) ( \
+ (R_DMA_CH0_FIRST__first__##f1_##_VAL(R_DMA_CH0_FIRST_, first_, v1) << R_DMA_CH0_FIRST__first__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH0_HWSW
+ * - type: RW
+ * - addr: 0xb0000100
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH0_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH0_HWSW.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH0_HWSW.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH0_HWSW(f1,v1,f2,v2) ( \
+ R_DMA_CH0_HWSW__WRITE(R_DMA_CH0_HWSW__ADDR, ( \
+ REG_VAL__R_DMA_CH0_HWSW_(f1##_,v1,f2##_,v2) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH0_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH0_HWSW(f1,v1,f2,v2) ( \
+ (R_DMA_CH0_HWSW__hw__##f1##__MASK & REG__##v1) | \
+ (R_DMA_CH0_HWSW__sw__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH0_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH0_HWSW.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH0_HWSW(f1,v1,f2,v2) ( \
+ (R_DMA_CH0_HWSW__hw__##f1##__VAL(R_DMA_CH0_HWSW_, hw_, v1) << R_DMA_CH0_HWSW__hw__BITNR) | \
+ (R_DMA_CH0_HWSW__sw__##f2##__VAL(R_DMA_CH0_HWSW_, sw_, v2) << R_DMA_CH0_HWSW__sw__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH0_HWSW_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH0_HWSW.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH0_HWSW_(f1_,v1,f2_,v2) ( \
+ (R_DMA_CH0_HWSW__hw__##f1_##_VAL(R_DMA_CH0_HWSW_, hw_, v1) << R_DMA_CH0_HWSW__hw__BITNR) | \
+ (R_DMA_CH0_HWSW__sw__##f2_##_VAL(R_DMA_CH0_HWSW_, sw_, v2) << R_DMA_CH0_HWSW__sw__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH0_NEXT
+ * - type: RW
+ * - addr: 0xb0000104
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH0_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH0_NEXT.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH0_NEXT.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH0_NEXT(f1,v1) ( \
+ R_DMA_CH0_NEXT__WRITE(R_DMA_CH0_NEXT__ADDR, ( \
+ REG_VAL__R_DMA_CH0_NEXT_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH0_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH0_NEXT(f1,v1) ( \
+ (R_DMA_CH0_NEXT__next__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH0_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH0_NEXT.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH0_NEXT(f1,v1) ( \
+ (R_DMA_CH0_NEXT__next__##f1##__VAL(R_DMA_CH0_NEXT_, next_, v1) << R_DMA_CH0_NEXT__next__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH0_NEXT_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH0_NEXT.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH0_NEXT_(f1_,v1) ( \
+ (R_DMA_CH0_NEXT__next__##f1_##_VAL(R_DMA_CH0_NEXT_, next_, v1) << R_DMA_CH0_NEXT__next__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH0_STATUS
+ * - type: RO
+ * - addr: 0xb00001d2
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH0_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH0_STATUS(f1,v1) ( \
+ (R_DMA_CH0_STATUS__avail__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH0_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH0_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH0_STATUS(f1,v1) ( \
+ (R_DMA_CH0_STATUS__avail__##f1##__VAL(R_DMA_CH0_STATUS_, avail_, v1) << R_DMA_CH0_STATUS__avail__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH0_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH0_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH0_STATUS_(f1_,v1) ( \
+ (R_DMA_CH0_STATUS__avail__##f1_##_VAL(R_DMA_CH0_STATUS_, avail_, v1) << R_DMA_CH0_STATUS__avail__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH1_BUF
+ * - type: RW
+ * - addr: 0xb0000118
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH1_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH1_BUF.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH1_BUF.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH1_BUF(f1,v1) ( \
+ R_DMA_CH1_BUF__WRITE(R_DMA_CH1_BUF__ADDR, ( \
+ REG_VAL__R_DMA_CH1_BUF_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH1_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH1_BUF(f1,v1) ( \
+ (R_DMA_CH1_BUF__buf__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH1_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH1_BUF.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH1_BUF(f1,v1) ( \
+ (R_DMA_CH1_BUF__buf__##f1##__VAL(R_DMA_CH1_BUF_, buf_, v1) << R_DMA_CH1_BUF__buf__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH1_BUF_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH1_BUF.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH1_BUF_(f1_,v1) ( \
+ (R_DMA_CH1_BUF__buf__##f1_##_VAL(R_DMA_CH1_BUF_, buf_, v1) << R_DMA_CH1_BUF__buf__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH1_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001d5
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH1_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH1_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH1_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH1_CLR_INTR(f1,v1,f2,v2) ( \
+ *R_DMA_CH1_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH1_CLR_INTR_) \
+ REG_VAL__R_DMA_CH1_CLR_INTR_(f1##_,v1,f2##_,v2) \
+ ), \
+ R_DMA_CH1_CLR_INTR__WRITE(R_DMA_CH1_CLR_INTR__ADDR, *R_DMA_CH1_CLR_INTR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH1_CLR_INTR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH1_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_DMA_CH1_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH1_CLR_INTR__SHADOW(f1,v1,f2,v2) ( \
+ *R_DMA_CH1_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH1_CLR_INTR_) \
+ REG_VAL__R_DMA_CH1_CLR_INTR_(f1##_,v1,f2##_,v2) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH1_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH1_CLR_INTR(f1,v1,f2,v2) ( \
+ (R_DMA_CH1_CLR_INTR__clr_eop__##f1##__MASK & REG__##v1) | \
+ (R_DMA_CH1_CLR_INTR__clr_descr__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH1_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH1_CLR_INTR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH1_CLR_INTR(f1,v1,f2,v2) ( \
+ (R_DMA_CH1_CLR_INTR__clr_eop__##f1##__VAL(R_DMA_CH1_CLR_INTR_, clr_eop_, v1) << R_DMA_CH1_CLR_INTR__clr_eop__BITNR) | \
+ (R_DMA_CH1_CLR_INTR__clr_descr__##f2##__VAL(R_DMA_CH1_CLR_INTR_, clr_descr_, v2) << R_DMA_CH1_CLR_INTR__clr_descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH1_CLR_INTR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH1_CLR_INTR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH1_CLR_INTR_(f1_,v1,f2_,v2) ( \
+ (R_DMA_CH1_CLR_INTR__clr_eop__##f1_##_VAL(R_DMA_CH1_CLR_INTR_, clr_eop_, v1) << R_DMA_CH1_CLR_INTR__clr_eop__BITNR) | \
+ (R_DMA_CH1_CLR_INTR__clr_descr__##f2_##_VAL(R_DMA_CH1_CLR_INTR_, clr_descr_, v2) << R_DMA_CH1_CLR_INTR__clr_descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH1_CMD
+ * - type: RW
+ * - addr: 0xb00001d4
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH1_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH1_CMD.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH1_CMD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH1_CMD(f1,v1) ( \
+ R_DMA_CH1_CMD__WRITE(R_DMA_CH1_CMD__ADDR, ( \
+ REG_VAL__R_DMA_CH1_CMD_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH1_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH1_CMD(f1,v1) ( \
+ (R_DMA_CH1_CMD__cmd__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH1_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH1_CMD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH1_CMD(f1,v1) ( \
+ (R_DMA_CH1_CMD__cmd__##f1##__VAL(R_DMA_CH1_CMD_, cmd_, v1) << R_DMA_CH1_CMD__cmd__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH1_CMD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH1_CMD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH1_CMD_(f1_,v1) ( \
+ (R_DMA_CH1_CMD__cmd__##f1_##_VAL(R_DMA_CH1_CMD_, cmd_, v1) << R_DMA_CH1_CMD__cmd__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH1_DESCR
+ * - type: RW
+ * - addr: 0xb000011c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH1_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH1_DESCR.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH1_DESCR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH1_DESCR(f1,v1) ( \
+ R_DMA_CH1_DESCR__WRITE(R_DMA_CH1_DESCR__ADDR, ( \
+ REG_VAL__R_DMA_CH1_DESCR_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH1_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH1_DESCR(f1,v1) ( \
+ (R_DMA_CH1_DESCR__descr__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH1_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH1_DESCR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH1_DESCR(f1,v1) ( \
+ (R_DMA_CH1_DESCR__descr__##f1##__VAL(R_DMA_CH1_DESCR_, descr_, v1) << R_DMA_CH1_DESCR__descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH1_DESCR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH1_DESCR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH1_DESCR_(f1_,v1) ( \
+ (R_DMA_CH1_DESCR__descr__##f1_##_VAL(R_DMA_CH1_DESCR_, descr_, v1) << R_DMA_CH1_DESCR__descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH1_FIRST
+ * - type: RW
+ * - addr: 0xb00001a4
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH1_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH1_FIRST.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH1_FIRST.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH1_FIRST(f1,v1) ( \
+ R_DMA_CH1_FIRST__WRITE(R_DMA_CH1_FIRST__ADDR, ( \
+ REG_VAL__R_DMA_CH1_FIRST_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH1_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH1_FIRST(f1,v1) ( \
+ (R_DMA_CH1_FIRST__first__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH1_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH1_FIRST.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH1_FIRST(f1,v1) ( \
+ (R_DMA_CH1_FIRST__first__##f1##__VAL(R_DMA_CH1_FIRST_, first_, v1) << R_DMA_CH1_FIRST__first__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH1_FIRST_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH1_FIRST.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH1_FIRST_(f1_,v1) ( \
+ (R_DMA_CH1_FIRST__first__##f1_##_VAL(R_DMA_CH1_FIRST_, first_, v1) << R_DMA_CH1_FIRST__first__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH1_HWSW
+ * - type: RW
+ * - addr: 0xb0000110
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH1_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH1_HWSW.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH1_HWSW.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH1_HWSW(f1,v1,f2,v2) ( \
+ R_DMA_CH1_HWSW__WRITE(R_DMA_CH1_HWSW__ADDR, ( \
+ REG_VAL__R_DMA_CH1_HWSW_(f1##_,v1,f2##_,v2) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH1_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH1_HWSW(f1,v1,f2,v2) ( \
+ (R_DMA_CH1_HWSW__hw__##f1##__MASK & REG__##v1) | \
+ (R_DMA_CH1_HWSW__sw__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH1_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH1_HWSW.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH1_HWSW(f1,v1,f2,v2) ( \
+ (R_DMA_CH1_HWSW__hw__##f1##__VAL(R_DMA_CH1_HWSW_, hw_, v1) << R_DMA_CH1_HWSW__hw__BITNR) | \
+ (R_DMA_CH1_HWSW__sw__##f2##__VAL(R_DMA_CH1_HWSW_, sw_, v2) << R_DMA_CH1_HWSW__sw__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH1_HWSW_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH1_HWSW.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH1_HWSW_(f1_,v1,f2_,v2) ( \
+ (R_DMA_CH1_HWSW__hw__##f1_##_VAL(R_DMA_CH1_HWSW_, hw_, v1) << R_DMA_CH1_HWSW__hw__BITNR) | \
+ (R_DMA_CH1_HWSW__sw__##f2_##_VAL(R_DMA_CH1_HWSW_, sw_, v2) << R_DMA_CH1_HWSW__sw__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH1_NEXT
+ * - type: RW
+ * - addr: 0xb0000114
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH1_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH1_NEXT.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH1_NEXT.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH1_NEXT(f1,v1) ( \
+ R_DMA_CH1_NEXT__WRITE(R_DMA_CH1_NEXT__ADDR, ( \
+ REG_VAL__R_DMA_CH1_NEXT_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH1_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH1_NEXT(f1,v1) ( \
+ (R_DMA_CH1_NEXT__next__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH1_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH1_NEXT.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH1_NEXT(f1,v1) ( \
+ (R_DMA_CH1_NEXT__next__##f1##__VAL(R_DMA_CH1_NEXT_, next_, v1) << R_DMA_CH1_NEXT__next__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH1_NEXT_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH1_NEXT.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH1_NEXT_(f1_,v1) ( \
+ (R_DMA_CH1_NEXT__next__##f1_##_VAL(R_DMA_CH1_NEXT_, next_, v1) << R_DMA_CH1_NEXT__next__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH1_STATUS
+ * - type: RO
+ * - addr: 0xb00001d6
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH1_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH1_STATUS(f1,v1) ( \
+ (R_DMA_CH1_STATUS__avail__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH1_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH1_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH1_STATUS(f1,v1) ( \
+ (R_DMA_CH1_STATUS__avail__##f1##__VAL(R_DMA_CH1_STATUS_, avail_, v1) << R_DMA_CH1_STATUS__avail__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH1_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH1_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH1_STATUS_(f1_,v1) ( \
+ (R_DMA_CH1_STATUS__avail__##f1_##_VAL(R_DMA_CH1_STATUS_, avail_, v1) << R_DMA_CH1_STATUS__avail__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH2_BUF
+ * - type: RW
+ * - addr: 0xb0000128
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH2_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH2_BUF.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH2_BUF.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH2_BUF(f1,v1) ( \
+ R_DMA_CH2_BUF__WRITE(R_DMA_CH2_BUF__ADDR, ( \
+ REG_VAL__R_DMA_CH2_BUF_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH2_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH2_BUF(f1,v1) ( \
+ (R_DMA_CH2_BUF__buf__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH2_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH2_BUF.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH2_BUF(f1,v1) ( \
+ (R_DMA_CH2_BUF__buf__##f1##__VAL(R_DMA_CH2_BUF_, buf_, v1) << R_DMA_CH2_BUF__buf__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH2_BUF_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH2_BUF.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH2_BUF_(f1_,v1) ( \
+ (R_DMA_CH2_BUF__buf__##f1_##_VAL(R_DMA_CH2_BUF_, buf_, v1) << R_DMA_CH2_BUF__buf__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH2_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001d9
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH2_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH2_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH2_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH2_CLR_INTR(f1,v1,f2,v2) ( \
+ *R_DMA_CH2_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH2_CLR_INTR_) \
+ REG_VAL__R_DMA_CH2_CLR_INTR_(f1##_,v1,f2##_,v2) \
+ ), \
+ R_DMA_CH2_CLR_INTR__WRITE(R_DMA_CH2_CLR_INTR__ADDR, *R_DMA_CH2_CLR_INTR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH2_CLR_INTR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH2_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_DMA_CH2_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH2_CLR_INTR__SHADOW(f1,v1,f2,v2) ( \
+ *R_DMA_CH2_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH2_CLR_INTR_) \
+ REG_VAL__R_DMA_CH2_CLR_INTR_(f1##_,v1,f2##_,v2) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH2_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH2_CLR_INTR(f1,v1,f2,v2) ( \
+ (R_DMA_CH2_CLR_INTR__clr_eop__##f1##__MASK & REG__##v1) | \
+ (R_DMA_CH2_CLR_INTR__clr_descr__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH2_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH2_CLR_INTR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH2_CLR_INTR(f1,v1,f2,v2) ( \
+ (R_DMA_CH2_CLR_INTR__clr_eop__##f1##__VAL(R_DMA_CH2_CLR_INTR_, clr_eop_, v1) << R_DMA_CH2_CLR_INTR__clr_eop__BITNR) | \
+ (R_DMA_CH2_CLR_INTR__clr_descr__##f2##__VAL(R_DMA_CH2_CLR_INTR_, clr_descr_, v2) << R_DMA_CH2_CLR_INTR__clr_descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH2_CLR_INTR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH2_CLR_INTR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH2_CLR_INTR_(f1_,v1,f2_,v2) ( \
+ (R_DMA_CH2_CLR_INTR__clr_eop__##f1_##_VAL(R_DMA_CH2_CLR_INTR_, clr_eop_, v1) << R_DMA_CH2_CLR_INTR__clr_eop__BITNR) | \
+ (R_DMA_CH2_CLR_INTR__clr_descr__##f2_##_VAL(R_DMA_CH2_CLR_INTR_, clr_descr_, v2) << R_DMA_CH2_CLR_INTR__clr_descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH2_CMD
+ * - type: RW
+ * - addr: 0xb00001d8
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH2_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH2_CMD.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH2_CMD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH2_CMD(f1,v1) ( \
+ R_DMA_CH2_CMD__WRITE(R_DMA_CH2_CMD__ADDR, ( \
+ REG_VAL__R_DMA_CH2_CMD_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH2_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH2_CMD(f1,v1) ( \
+ (R_DMA_CH2_CMD__cmd__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH2_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH2_CMD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH2_CMD(f1,v1) ( \
+ (R_DMA_CH2_CMD__cmd__##f1##__VAL(R_DMA_CH2_CMD_, cmd_, v1) << R_DMA_CH2_CMD__cmd__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH2_CMD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH2_CMD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH2_CMD_(f1_,v1) ( \
+ (R_DMA_CH2_CMD__cmd__##f1_##_VAL(R_DMA_CH2_CMD_, cmd_, v1) << R_DMA_CH2_CMD__cmd__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH2_DESCR
+ * - type: RW
+ * - addr: 0xb000012c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH2_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH2_DESCR.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH2_DESCR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH2_DESCR(f1,v1) ( \
+ R_DMA_CH2_DESCR__WRITE(R_DMA_CH2_DESCR__ADDR, ( \
+ REG_VAL__R_DMA_CH2_DESCR_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH2_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH2_DESCR(f1,v1) ( \
+ (R_DMA_CH2_DESCR__descr__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH2_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH2_DESCR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH2_DESCR(f1,v1) ( \
+ (R_DMA_CH2_DESCR__descr__##f1##__VAL(R_DMA_CH2_DESCR_, descr_, v1) << R_DMA_CH2_DESCR__descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH2_DESCR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH2_DESCR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH2_DESCR_(f1_,v1) ( \
+ (R_DMA_CH2_DESCR__descr__##f1_##_VAL(R_DMA_CH2_DESCR_, descr_, v1) << R_DMA_CH2_DESCR__descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH2_FIRST
+ * - type: RW
+ * - addr: 0xb00001a8
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH2_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH2_FIRST.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH2_FIRST.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH2_FIRST(f1,v1) ( \
+ R_DMA_CH2_FIRST__WRITE(R_DMA_CH2_FIRST__ADDR, ( \
+ REG_VAL__R_DMA_CH2_FIRST_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH2_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH2_FIRST(f1,v1) ( \
+ (R_DMA_CH2_FIRST__first__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH2_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH2_FIRST.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH2_FIRST(f1,v1) ( \
+ (R_DMA_CH2_FIRST__first__##f1##__VAL(R_DMA_CH2_FIRST_, first_, v1) << R_DMA_CH2_FIRST__first__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH2_FIRST_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH2_FIRST.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH2_FIRST_(f1_,v1) ( \
+ (R_DMA_CH2_FIRST__first__##f1_##_VAL(R_DMA_CH2_FIRST_, first_, v1) << R_DMA_CH2_FIRST__first__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH2_HWSW
+ * - type: RW
+ * - addr: 0xb0000120
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH2_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH2_HWSW.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH2_HWSW.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH2_HWSW(f1,v1,f2,v2) ( \
+ R_DMA_CH2_HWSW__WRITE(R_DMA_CH2_HWSW__ADDR, ( \
+ REG_VAL__R_DMA_CH2_HWSW_(f1##_,v1,f2##_,v2) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH2_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH2_HWSW(f1,v1,f2,v2) ( \
+ (R_DMA_CH2_HWSW__hw__##f1##__MASK & REG__##v1) | \
+ (R_DMA_CH2_HWSW__sw__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH2_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH2_HWSW.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH2_HWSW(f1,v1,f2,v2) ( \
+ (R_DMA_CH2_HWSW__hw__##f1##__VAL(R_DMA_CH2_HWSW_, hw_, v1) << R_DMA_CH2_HWSW__hw__BITNR) | \
+ (R_DMA_CH2_HWSW__sw__##f2##__VAL(R_DMA_CH2_HWSW_, sw_, v2) << R_DMA_CH2_HWSW__sw__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH2_HWSW_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH2_HWSW.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH2_HWSW_(f1_,v1,f2_,v2) ( \
+ (R_DMA_CH2_HWSW__hw__##f1_##_VAL(R_DMA_CH2_HWSW_, hw_, v1) << R_DMA_CH2_HWSW__hw__BITNR) | \
+ (R_DMA_CH2_HWSW__sw__##f2_##_VAL(R_DMA_CH2_HWSW_, sw_, v2) << R_DMA_CH2_HWSW__sw__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH2_NEXT
+ * - type: RW
+ * - addr: 0xb0000124
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH2_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH2_NEXT.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH2_NEXT.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH2_NEXT(f1,v1) ( \
+ R_DMA_CH2_NEXT__WRITE(R_DMA_CH2_NEXT__ADDR, ( \
+ REG_VAL__R_DMA_CH2_NEXT_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH2_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH2_NEXT(f1,v1) ( \
+ (R_DMA_CH2_NEXT__next__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH2_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH2_NEXT.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH2_NEXT(f1,v1) ( \
+ (R_DMA_CH2_NEXT__next__##f1##__VAL(R_DMA_CH2_NEXT_, next_, v1) << R_DMA_CH2_NEXT__next__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH2_NEXT_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH2_NEXT.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH2_NEXT_(f1_,v1) ( \
+ (R_DMA_CH2_NEXT__next__##f1_##_VAL(R_DMA_CH2_NEXT_, next_, v1) << R_DMA_CH2_NEXT__next__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH2_STATUS
+ * - type: RO
+ * - addr: 0xb00001da
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH2_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH2_STATUS(f1,v1) ( \
+ (R_DMA_CH2_STATUS__avail__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH2_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH2_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH2_STATUS(f1,v1) ( \
+ (R_DMA_CH2_STATUS__avail__##f1##__VAL(R_DMA_CH2_STATUS_, avail_, v1) << R_DMA_CH2_STATUS__avail__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH2_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH2_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH2_STATUS_(f1_,v1) ( \
+ (R_DMA_CH2_STATUS__avail__##f1_##_VAL(R_DMA_CH2_STATUS_, avail_, v1) << R_DMA_CH2_STATUS__avail__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH3_BUF
+ * - type: RW
+ * - addr: 0xb0000138
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH3_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH3_BUF.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH3_BUF.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH3_BUF(f1,v1) ( \
+ R_DMA_CH3_BUF__WRITE(R_DMA_CH3_BUF__ADDR, ( \
+ REG_VAL__R_DMA_CH3_BUF_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH3_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH3_BUF(f1,v1) ( \
+ (R_DMA_CH3_BUF__buf__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH3_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH3_BUF.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH3_BUF(f1,v1) ( \
+ (R_DMA_CH3_BUF__buf__##f1##__VAL(R_DMA_CH3_BUF_, buf_, v1) << R_DMA_CH3_BUF__buf__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH3_BUF_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH3_BUF.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH3_BUF_(f1_,v1) ( \
+ (R_DMA_CH3_BUF__buf__##f1_##_VAL(R_DMA_CH3_BUF_, buf_, v1) << R_DMA_CH3_BUF__buf__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH3_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001dd
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH3_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH3_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH3_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH3_CLR_INTR(f1,v1,f2,v2) ( \
+ *R_DMA_CH3_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH3_CLR_INTR_) \
+ REG_VAL__R_DMA_CH3_CLR_INTR_(f1##_,v1,f2##_,v2) \
+ ), \
+ R_DMA_CH3_CLR_INTR__WRITE(R_DMA_CH3_CLR_INTR__ADDR, *R_DMA_CH3_CLR_INTR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH3_CLR_INTR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH3_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_DMA_CH3_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH3_CLR_INTR__SHADOW(f1,v1,f2,v2) ( \
+ *R_DMA_CH3_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH3_CLR_INTR_) \
+ REG_VAL__R_DMA_CH3_CLR_INTR_(f1##_,v1,f2##_,v2) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH3_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH3_CLR_INTR(f1,v1,f2,v2) ( \
+ (R_DMA_CH3_CLR_INTR__clr_eop__##f1##__MASK & REG__##v1) | \
+ (R_DMA_CH3_CLR_INTR__clr_descr__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH3_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH3_CLR_INTR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH3_CLR_INTR(f1,v1,f2,v2) ( \
+ (R_DMA_CH3_CLR_INTR__clr_eop__##f1##__VAL(R_DMA_CH3_CLR_INTR_, clr_eop_, v1) << R_DMA_CH3_CLR_INTR__clr_eop__BITNR) | \
+ (R_DMA_CH3_CLR_INTR__clr_descr__##f2##__VAL(R_DMA_CH3_CLR_INTR_, clr_descr_, v2) << R_DMA_CH3_CLR_INTR__clr_descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH3_CLR_INTR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH3_CLR_INTR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH3_CLR_INTR_(f1_,v1,f2_,v2) ( \
+ (R_DMA_CH3_CLR_INTR__clr_eop__##f1_##_VAL(R_DMA_CH3_CLR_INTR_, clr_eop_, v1) << R_DMA_CH3_CLR_INTR__clr_eop__BITNR) | \
+ (R_DMA_CH3_CLR_INTR__clr_descr__##f2_##_VAL(R_DMA_CH3_CLR_INTR_, clr_descr_, v2) << R_DMA_CH3_CLR_INTR__clr_descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH3_CMD
+ * - type: RW
+ * - addr: 0xb00001dc
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH3_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH3_CMD.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH3_CMD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH3_CMD(f1,v1) ( \
+ R_DMA_CH3_CMD__WRITE(R_DMA_CH3_CMD__ADDR, ( \
+ REG_VAL__R_DMA_CH3_CMD_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH3_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH3_CMD(f1,v1) ( \
+ (R_DMA_CH3_CMD__cmd__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH3_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH3_CMD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH3_CMD(f1,v1) ( \
+ (R_DMA_CH3_CMD__cmd__##f1##__VAL(R_DMA_CH3_CMD_, cmd_, v1) << R_DMA_CH3_CMD__cmd__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH3_CMD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH3_CMD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH3_CMD_(f1_,v1) ( \
+ (R_DMA_CH3_CMD__cmd__##f1_##_VAL(R_DMA_CH3_CMD_, cmd_, v1) << R_DMA_CH3_CMD__cmd__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH3_DESCR
+ * - type: RW
+ * - addr: 0xb000013c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH3_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH3_DESCR.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH3_DESCR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH3_DESCR(f1,v1) ( \
+ R_DMA_CH3_DESCR__WRITE(R_DMA_CH3_DESCR__ADDR, ( \
+ REG_VAL__R_DMA_CH3_DESCR_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH3_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH3_DESCR(f1,v1) ( \
+ (R_DMA_CH3_DESCR__descr__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH3_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH3_DESCR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH3_DESCR(f1,v1) ( \
+ (R_DMA_CH3_DESCR__descr__##f1##__VAL(R_DMA_CH3_DESCR_, descr_, v1) << R_DMA_CH3_DESCR__descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH3_DESCR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH3_DESCR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH3_DESCR_(f1_,v1) ( \
+ (R_DMA_CH3_DESCR__descr__##f1_##_VAL(R_DMA_CH3_DESCR_, descr_, v1) << R_DMA_CH3_DESCR__descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH3_FIRST
+ * - type: RW
+ * - addr: 0xb00001ac
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH3_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH3_FIRST.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH3_FIRST.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH3_FIRST(f1,v1) ( \
+ R_DMA_CH3_FIRST__WRITE(R_DMA_CH3_FIRST__ADDR, ( \
+ REG_VAL__R_DMA_CH3_FIRST_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH3_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH3_FIRST(f1,v1) ( \
+ (R_DMA_CH3_FIRST__first__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH3_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH3_FIRST.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH3_FIRST(f1,v1) ( \
+ (R_DMA_CH3_FIRST__first__##f1##__VAL(R_DMA_CH3_FIRST_, first_, v1) << R_DMA_CH3_FIRST__first__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH3_FIRST_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH3_FIRST.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH3_FIRST_(f1_,v1) ( \
+ (R_DMA_CH3_FIRST__first__##f1_##_VAL(R_DMA_CH3_FIRST_, first_, v1) << R_DMA_CH3_FIRST__first__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH3_HWSW
+ * - type: RW
+ * - addr: 0xb0000130
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH3_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH3_HWSW.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH3_HWSW.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH3_HWSW(f1,v1,f2,v2) ( \
+ R_DMA_CH3_HWSW__WRITE(R_DMA_CH3_HWSW__ADDR, ( \
+ REG_VAL__R_DMA_CH3_HWSW_(f1##_,v1,f2##_,v2) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH3_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH3_HWSW(f1,v1,f2,v2) ( \
+ (R_DMA_CH3_HWSW__hw__##f1##__MASK & REG__##v1) | \
+ (R_DMA_CH3_HWSW__sw__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH3_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH3_HWSW.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH3_HWSW(f1,v1,f2,v2) ( \
+ (R_DMA_CH3_HWSW__hw__##f1##__VAL(R_DMA_CH3_HWSW_, hw_, v1) << R_DMA_CH3_HWSW__hw__BITNR) | \
+ (R_DMA_CH3_HWSW__sw__##f2##__VAL(R_DMA_CH3_HWSW_, sw_, v2) << R_DMA_CH3_HWSW__sw__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH3_HWSW_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH3_HWSW.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH3_HWSW_(f1_,v1,f2_,v2) ( \
+ (R_DMA_CH3_HWSW__hw__##f1_##_VAL(R_DMA_CH3_HWSW_, hw_, v1) << R_DMA_CH3_HWSW__hw__BITNR) | \
+ (R_DMA_CH3_HWSW__sw__##f2_##_VAL(R_DMA_CH3_HWSW_, sw_, v2) << R_DMA_CH3_HWSW__sw__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH3_NEXT
+ * - type: RW
+ * - addr: 0xb0000134
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH3_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH3_NEXT.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH3_NEXT.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH3_NEXT(f1,v1) ( \
+ R_DMA_CH3_NEXT__WRITE(R_DMA_CH3_NEXT__ADDR, ( \
+ REG_VAL__R_DMA_CH3_NEXT_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH3_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH3_NEXT(f1,v1) ( \
+ (R_DMA_CH3_NEXT__next__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH3_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH3_NEXT.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH3_NEXT(f1,v1) ( \
+ (R_DMA_CH3_NEXT__next__##f1##__VAL(R_DMA_CH3_NEXT_, next_, v1) << R_DMA_CH3_NEXT__next__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH3_NEXT_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH3_NEXT.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH3_NEXT_(f1_,v1) ( \
+ (R_DMA_CH3_NEXT__next__##f1_##_VAL(R_DMA_CH3_NEXT_, next_, v1) << R_DMA_CH3_NEXT__next__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH3_STATUS
+ * - type: RO
+ * - addr: 0xb00001de
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH3_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH3_STATUS(f1,v1) ( \
+ (R_DMA_CH3_STATUS__avail__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH3_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH3_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH3_STATUS(f1,v1) ( \
+ (R_DMA_CH3_STATUS__avail__##f1##__VAL(R_DMA_CH3_STATUS_, avail_, v1) << R_DMA_CH3_STATUS__avail__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH3_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH3_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH3_STATUS_(f1_,v1) ( \
+ (R_DMA_CH3_STATUS__avail__##f1_##_VAL(R_DMA_CH3_STATUS_, avail_, v1) << R_DMA_CH3_STATUS__avail__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH4_BUF
+ * - type: RW
+ * - addr: 0xb0000148
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH4_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH4_BUF.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH4_BUF.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH4_BUF(f1,v1) ( \
+ R_DMA_CH4_BUF__WRITE(R_DMA_CH4_BUF__ADDR, ( \
+ REG_VAL__R_DMA_CH4_BUF_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH4_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH4_BUF(f1,v1) ( \
+ (R_DMA_CH4_BUF__buf__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH4_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH4_BUF.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH4_BUF(f1,v1) ( \
+ (R_DMA_CH4_BUF__buf__##f1##__VAL(R_DMA_CH4_BUF_, buf_, v1) << R_DMA_CH4_BUF__buf__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH4_BUF_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH4_BUF.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH4_BUF_(f1_,v1) ( \
+ (R_DMA_CH4_BUF__buf__##f1_##_VAL(R_DMA_CH4_BUF_, buf_, v1) << R_DMA_CH4_BUF__buf__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH4_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001e1
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH4_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH4_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH4_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH4_CLR_INTR(f1,v1,f2,v2) ( \
+ *R_DMA_CH4_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH4_CLR_INTR_) \
+ REG_VAL__R_DMA_CH4_CLR_INTR_(f1##_,v1,f2##_,v2) \
+ ), \
+ R_DMA_CH4_CLR_INTR__WRITE(R_DMA_CH4_CLR_INTR__ADDR, *R_DMA_CH4_CLR_INTR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH4_CLR_INTR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH4_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_DMA_CH4_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH4_CLR_INTR__SHADOW(f1,v1,f2,v2) ( \
+ *R_DMA_CH4_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH4_CLR_INTR_) \
+ REG_VAL__R_DMA_CH4_CLR_INTR_(f1##_,v1,f2##_,v2) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH4_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH4_CLR_INTR(f1,v1,f2,v2) ( \
+ (R_DMA_CH4_CLR_INTR__clr_eop__##f1##__MASK & REG__##v1) | \
+ (R_DMA_CH4_CLR_INTR__clr_descr__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH4_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH4_CLR_INTR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH4_CLR_INTR(f1,v1,f2,v2) ( \
+ (R_DMA_CH4_CLR_INTR__clr_eop__##f1##__VAL(R_DMA_CH4_CLR_INTR_, clr_eop_, v1) << R_DMA_CH4_CLR_INTR__clr_eop__BITNR) | \
+ (R_DMA_CH4_CLR_INTR__clr_descr__##f2##__VAL(R_DMA_CH4_CLR_INTR_, clr_descr_, v2) << R_DMA_CH4_CLR_INTR__clr_descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH4_CLR_INTR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH4_CLR_INTR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH4_CLR_INTR_(f1_,v1,f2_,v2) ( \
+ (R_DMA_CH4_CLR_INTR__clr_eop__##f1_##_VAL(R_DMA_CH4_CLR_INTR_, clr_eop_, v1) << R_DMA_CH4_CLR_INTR__clr_eop__BITNR) | \
+ (R_DMA_CH4_CLR_INTR__clr_descr__##f2_##_VAL(R_DMA_CH4_CLR_INTR_, clr_descr_, v2) << R_DMA_CH4_CLR_INTR__clr_descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH4_CMD
+ * - type: RW
+ * - addr: 0xb00001e0
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH4_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH4_CMD.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH4_CMD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH4_CMD(f1,v1) ( \
+ R_DMA_CH4_CMD__WRITE(R_DMA_CH4_CMD__ADDR, ( \
+ REG_VAL__R_DMA_CH4_CMD_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH4_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH4_CMD(f1,v1) ( \
+ (R_DMA_CH4_CMD__cmd__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH4_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH4_CMD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH4_CMD(f1,v1) ( \
+ (R_DMA_CH4_CMD__cmd__##f1##__VAL(R_DMA_CH4_CMD_, cmd_, v1) << R_DMA_CH4_CMD__cmd__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH4_CMD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH4_CMD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH4_CMD_(f1_,v1) ( \
+ (R_DMA_CH4_CMD__cmd__##f1_##_VAL(R_DMA_CH4_CMD_, cmd_, v1) << R_DMA_CH4_CMD__cmd__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH4_DESCR
+ * - type: RW
+ * - addr: 0xb000014c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH4_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH4_DESCR.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH4_DESCR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH4_DESCR(f1,v1) ( \
+ R_DMA_CH4_DESCR__WRITE(R_DMA_CH4_DESCR__ADDR, ( \
+ REG_VAL__R_DMA_CH4_DESCR_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH4_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH4_DESCR(f1,v1) ( \
+ (R_DMA_CH4_DESCR__descr__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH4_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH4_DESCR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH4_DESCR(f1,v1) ( \
+ (R_DMA_CH4_DESCR__descr__##f1##__VAL(R_DMA_CH4_DESCR_, descr_, v1) << R_DMA_CH4_DESCR__descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH4_DESCR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH4_DESCR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH4_DESCR_(f1_,v1) ( \
+ (R_DMA_CH4_DESCR__descr__##f1_##_VAL(R_DMA_CH4_DESCR_, descr_, v1) << R_DMA_CH4_DESCR__descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH4_FIRST
+ * - type: RW
+ * - addr: 0xb00001b0
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH4_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH4_FIRST.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH4_FIRST.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH4_FIRST(f1,v1) ( \
+ R_DMA_CH4_FIRST__WRITE(R_DMA_CH4_FIRST__ADDR, ( \
+ REG_VAL__R_DMA_CH4_FIRST_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH4_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH4_FIRST(f1,v1) ( \
+ (R_DMA_CH4_FIRST__first__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH4_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH4_FIRST.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH4_FIRST(f1,v1) ( \
+ (R_DMA_CH4_FIRST__first__##f1##__VAL(R_DMA_CH4_FIRST_, first_, v1) << R_DMA_CH4_FIRST__first__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH4_FIRST_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH4_FIRST.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH4_FIRST_(f1_,v1) ( \
+ (R_DMA_CH4_FIRST__first__##f1_##_VAL(R_DMA_CH4_FIRST_, first_, v1) << R_DMA_CH4_FIRST__first__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH4_HWSW
+ * - type: RW
+ * - addr: 0xb0000140
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH4_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH4_HWSW.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH4_HWSW.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH4_HWSW(f1,v1,f2,v2) ( \
+ R_DMA_CH4_HWSW__WRITE(R_DMA_CH4_HWSW__ADDR, ( \
+ REG_VAL__R_DMA_CH4_HWSW_(f1##_,v1,f2##_,v2) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH4_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH4_HWSW(f1,v1,f2,v2) ( \
+ (R_DMA_CH4_HWSW__hw__##f1##__MASK & REG__##v1) | \
+ (R_DMA_CH4_HWSW__sw__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH4_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH4_HWSW.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH4_HWSW(f1,v1,f2,v2) ( \
+ (R_DMA_CH4_HWSW__hw__##f1##__VAL(R_DMA_CH4_HWSW_, hw_, v1) << R_DMA_CH4_HWSW__hw__BITNR) | \
+ (R_DMA_CH4_HWSW__sw__##f2##__VAL(R_DMA_CH4_HWSW_, sw_, v2) << R_DMA_CH4_HWSW__sw__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH4_HWSW_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH4_HWSW.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH4_HWSW_(f1_,v1,f2_,v2) ( \
+ (R_DMA_CH4_HWSW__hw__##f1_##_VAL(R_DMA_CH4_HWSW_, hw_, v1) << R_DMA_CH4_HWSW__hw__BITNR) | \
+ (R_DMA_CH4_HWSW__sw__##f2_##_VAL(R_DMA_CH4_HWSW_, sw_, v2) << R_DMA_CH4_HWSW__sw__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH4_NEXT
+ * - type: RW
+ * - addr: 0xb0000144
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH4_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH4_NEXT.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH4_NEXT.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH4_NEXT(f1,v1) ( \
+ R_DMA_CH4_NEXT__WRITE(R_DMA_CH4_NEXT__ADDR, ( \
+ REG_VAL__R_DMA_CH4_NEXT_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH4_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH4_NEXT(f1,v1) ( \
+ (R_DMA_CH4_NEXT__next__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH4_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH4_NEXT.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH4_NEXT(f1,v1) ( \
+ (R_DMA_CH4_NEXT__next__##f1##__VAL(R_DMA_CH4_NEXT_, next_, v1) << R_DMA_CH4_NEXT__next__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH4_NEXT_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH4_NEXT.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH4_NEXT_(f1_,v1) ( \
+ (R_DMA_CH4_NEXT__next__##f1_##_VAL(R_DMA_CH4_NEXT_, next_, v1) << R_DMA_CH4_NEXT__next__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH4_STATUS
+ * - type: RO
+ * - addr: 0xb00001e2
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH4_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH4_STATUS(f1,v1) ( \
+ (R_DMA_CH4_STATUS__avail__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH4_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH4_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH4_STATUS(f1,v1) ( \
+ (R_DMA_CH4_STATUS__avail__##f1##__VAL(R_DMA_CH4_STATUS_, avail_, v1) << R_DMA_CH4_STATUS__avail__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH4_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH4_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH4_STATUS_(f1_,v1) ( \
+ (R_DMA_CH4_STATUS__avail__##f1_##_VAL(R_DMA_CH4_STATUS_, avail_, v1) << R_DMA_CH4_STATUS__avail__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH5_BUF
+ * - type: RW
+ * - addr: 0xb0000158
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH5_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH5_BUF.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH5_BUF.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH5_BUF(f1,v1) ( \
+ R_DMA_CH5_BUF__WRITE(R_DMA_CH5_BUF__ADDR, ( \
+ REG_VAL__R_DMA_CH5_BUF_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH5_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH5_BUF(f1,v1) ( \
+ (R_DMA_CH5_BUF__buf__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH5_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH5_BUF.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH5_BUF(f1,v1) ( \
+ (R_DMA_CH5_BUF__buf__##f1##__VAL(R_DMA_CH5_BUF_, buf_, v1) << R_DMA_CH5_BUF__buf__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH5_BUF_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH5_BUF.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH5_BUF_(f1_,v1) ( \
+ (R_DMA_CH5_BUF__buf__##f1_##_VAL(R_DMA_CH5_BUF_, buf_, v1) << R_DMA_CH5_BUF__buf__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH5_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001e5
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH5_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH5_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH5_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH5_CLR_INTR(f1,v1,f2,v2) ( \
+ *R_DMA_CH5_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH5_CLR_INTR_) \
+ REG_VAL__R_DMA_CH5_CLR_INTR_(f1##_,v1,f2##_,v2) \
+ ), \
+ R_DMA_CH5_CLR_INTR__WRITE(R_DMA_CH5_CLR_INTR__ADDR, *R_DMA_CH5_CLR_INTR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH5_CLR_INTR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH5_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_DMA_CH5_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH5_CLR_INTR__SHADOW(f1,v1,f2,v2) ( \
+ *R_DMA_CH5_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH5_CLR_INTR_) \
+ REG_VAL__R_DMA_CH5_CLR_INTR_(f1##_,v1,f2##_,v2) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH5_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH5_CLR_INTR(f1,v1,f2,v2) ( \
+ (R_DMA_CH5_CLR_INTR__clr_eop__##f1##__MASK & REG__##v1) | \
+ (R_DMA_CH5_CLR_INTR__clr_descr__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH5_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH5_CLR_INTR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH5_CLR_INTR(f1,v1,f2,v2) ( \
+ (R_DMA_CH5_CLR_INTR__clr_eop__##f1##__VAL(R_DMA_CH5_CLR_INTR_, clr_eop_, v1) << R_DMA_CH5_CLR_INTR__clr_eop__BITNR) | \
+ (R_DMA_CH5_CLR_INTR__clr_descr__##f2##__VAL(R_DMA_CH5_CLR_INTR_, clr_descr_, v2) << R_DMA_CH5_CLR_INTR__clr_descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH5_CLR_INTR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH5_CLR_INTR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH5_CLR_INTR_(f1_,v1,f2_,v2) ( \
+ (R_DMA_CH5_CLR_INTR__clr_eop__##f1_##_VAL(R_DMA_CH5_CLR_INTR_, clr_eop_, v1) << R_DMA_CH5_CLR_INTR__clr_eop__BITNR) | \
+ (R_DMA_CH5_CLR_INTR__clr_descr__##f2_##_VAL(R_DMA_CH5_CLR_INTR_, clr_descr_, v2) << R_DMA_CH5_CLR_INTR__clr_descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH5_CMD
+ * - type: RW
+ * - addr: 0xb00001e4
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH5_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH5_CMD.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH5_CMD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH5_CMD(f1,v1) ( \
+ R_DMA_CH5_CMD__WRITE(R_DMA_CH5_CMD__ADDR, ( \
+ REG_VAL__R_DMA_CH5_CMD_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH5_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH5_CMD(f1,v1) ( \
+ (R_DMA_CH5_CMD__cmd__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH5_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH5_CMD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH5_CMD(f1,v1) ( \
+ (R_DMA_CH5_CMD__cmd__##f1##__VAL(R_DMA_CH5_CMD_, cmd_, v1) << R_DMA_CH5_CMD__cmd__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH5_CMD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH5_CMD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH5_CMD_(f1_,v1) ( \
+ (R_DMA_CH5_CMD__cmd__##f1_##_VAL(R_DMA_CH5_CMD_, cmd_, v1) << R_DMA_CH5_CMD__cmd__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH5_DESCR
+ * - type: RW
+ * - addr: 0xb000015c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH5_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH5_DESCR.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH5_DESCR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH5_DESCR(f1,v1) ( \
+ R_DMA_CH5_DESCR__WRITE(R_DMA_CH5_DESCR__ADDR, ( \
+ REG_VAL__R_DMA_CH5_DESCR_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH5_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH5_DESCR(f1,v1) ( \
+ (R_DMA_CH5_DESCR__descr__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH5_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH5_DESCR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH5_DESCR(f1,v1) ( \
+ (R_DMA_CH5_DESCR__descr__##f1##__VAL(R_DMA_CH5_DESCR_, descr_, v1) << R_DMA_CH5_DESCR__descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH5_DESCR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH5_DESCR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH5_DESCR_(f1_,v1) ( \
+ (R_DMA_CH5_DESCR__descr__##f1_##_VAL(R_DMA_CH5_DESCR_, descr_, v1) << R_DMA_CH5_DESCR__descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH5_FIRST
+ * - type: RW
+ * - addr: 0xb00001b4
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH5_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH5_FIRST.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH5_FIRST.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH5_FIRST(f1,v1) ( \
+ R_DMA_CH5_FIRST__WRITE(R_DMA_CH5_FIRST__ADDR, ( \
+ REG_VAL__R_DMA_CH5_FIRST_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH5_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH5_FIRST(f1,v1) ( \
+ (R_DMA_CH5_FIRST__first__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH5_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH5_FIRST.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH5_FIRST(f1,v1) ( \
+ (R_DMA_CH5_FIRST__first__##f1##__VAL(R_DMA_CH5_FIRST_, first_, v1) << R_DMA_CH5_FIRST__first__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH5_FIRST_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH5_FIRST.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH5_FIRST_(f1_,v1) ( \
+ (R_DMA_CH5_FIRST__first__##f1_##_VAL(R_DMA_CH5_FIRST_, first_, v1) << R_DMA_CH5_FIRST__first__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH5_HWSW
+ * - type: RW
+ * - addr: 0xb0000150
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH5_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH5_HWSW.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH5_HWSW.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH5_HWSW(f1,v1,f2,v2) ( \
+ R_DMA_CH5_HWSW__WRITE(R_DMA_CH5_HWSW__ADDR, ( \
+ REG_VAL__R_DMA_CH5_HWSW_(f1##_,v1,f2##_,v2) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH5_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH5_HWSW(f1,v1,f2,v2) ( \
+ (R_DMA_CH5_HWSW__hw__##f1##__MASK & REG__##v1) | \
+ (R_DMA_CH5_HWSW__sw__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH5_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH5_HWSW.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH5_HWSW(f1,v1,f2,v2) ( \
+ (R_DMA_CH5_HWSW__hw__##f1##__VAL(R_DMA_CH5_HWSW_, hw_, v1) << R_DMA_CH5_HWSW__hw__BITNR) | \
+ (R_DMA_CH5_HWSW__sw__##f2##__VAL(R_DMA_CH5_HWSW_, sw_, v2) << R_DMA_CH5_HWSW__sw__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH5_HWSW_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH5_HWSW.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH5_HWSW_(f1_,v1,f2_,v2) ( \
+ (R_DMA_CH5_HWSW__hw__##f1_##_VAL(R_DMA_CH5_HWSW_, hw_, v1) << R_DMA_CH5_HWSW__hw__BITNR) | \
+ (R_DMA_CH5_HWSW__sw__##f2_##_VAL(R_DMA_CH5_HWSW_, sw_, v2) << R_DMA_CH5_HWSW__sw__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH5_NEXT
+ * - type: RW
+ * - addr: 0xb0000154
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH5_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH5_NEXT.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH5_NEXT.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH5_NEXT(f1,v1) ( \
+ R_DMA_CH5_NEXT__WRITE(R_DMA_CH5_NEXT__ADDR, ( \
+ REG_VAL__R_DMA_CH5_NEXT_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH5_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH5_NEXT(f1,v1) ( \
+ (R_DMA_CH5_NEXT__next__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH5_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH5_NEXT.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH5_NEXT(f1,v1) ( \
+ (R_DMA_CH5_NEXT__next__##f1##__VAL(R_DMA_CH5_NEXT_, next_, v1) << R_DMA_CH5_NEXT__next__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH5_NEXT_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH5_NEXT.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH5_NEXT_(f1_,v1) ( \
+ (R_DMA_CH5_NEXT__next__##f1_##_VAL(R_DMA_CH5_NEXT_, next_, v1) << R_DMA_CH5_NEXT__next__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH5_STATUS
+ * - type: RO
+ * - addr: 0xb00001e6
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH5_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH5_STATUS(f1,v1) ( \
+ (R_DMA_CH5_STATUS__avail__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH5_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH5_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH5_STATUS(f1,v1) ( \
+ (R_DMA_CH5_STATUS__avail__##f1##__VAL(R_DMA_CH5_STATUS_, avail_, v1) << R_DMA_CH5_STATUS__avail__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH5_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH5_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH5_STATUS_(f1_,v1) ( \
+ (R_DMA_CH5_STATUS__avail__##f1_##_VAL(R_DMA_CH5_STATUS_, avail_, v1) << R_DMA_CH5_STATUS__avail__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH6_BUF
+ * - type: RW
+ * - addr: 0xb0000168
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH6_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH6_BUF.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH6_BUF.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH6_BUF(f1,v1) ( \
+ R_DMA_CH6_BUF__WRITE(R_DMA_CH6_BUF__ADDR, ( \
+ REG_VAL__R_DMA_CH6_BUF_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH6_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH6_BUF(f1,v1) ( \
+ (R_DMA_CH6_BUF__buf__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH6_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH6_BUF.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH6_BUF(f1,v1) ( \
+ (R_DMA_CH6_BUF__buf__##f1##__VAL(R_DMA_CH6_BUF_, buf_, v1) << R_DMA_CH6_BUF__buf__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH6_BUF_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH6_BUF.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH6_BUF_(f1_,v1) ( \
+ (R_DMA_CH6_BUF__buf__##f1_##_VAL(R_DMA_CH6_BUF_, buf_, v1) << R_DMA_CH6_BUF__buf__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH6_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001e9
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH6_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH6_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH6_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH6_CLR_INTR(f1,v1,f2,v2) ( \
+ *R_DMA_CH6_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH6_CLR_INTR_) \
+ REG_VAL__R_DMA_CH6_CLR_INTR_(f1##_,v1,f2##_,v2) \
+ ), \
+ R_DMA_CH6_CLR_INTR__WRITE(R_DMA_CH6_CLR_INTR__ADDR, *R_DMA_CH6_CLR_INTR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH6_CLR_INTR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH6_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_DMA_CH6_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH6_CLR_INTR__SHADOW(f1,v1,f2,v2) ( \
+ *R_DMA_CH6_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH6_CLR_INTR_) \
+ REG_VAL__R_DMA_CH6_CLR_INTR_(f1##_,v1,f2##_,v2) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH6_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH6_CLR_INTR(f1,v1,f2,v2) ( \
+ (R_DMA_CH6_CLR_INTR__clr_eop__##f1##__MASK & REG__##v1) | \
+ (R_DMA_CH6_CLR_INTR__clr_descr__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH6_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH6_CLR_INTR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH6_CLR_INTR(f1,v1,f2,v2) ( \
+ (R_DMA_CH6_CLR_INTR__clr_eop__##f1##__VAL(R_DMA_CH6_CLR_INTR_, clr_eop_, v1) << R_DMA_CH6_CLR_INTR__clr_eop__BITNR) | \
+ (R_DMA_CH6_CLR_INTR__clr_descr__##f2##__VAL(R_DMA_CH6_CLR_INTR_, clr_descr_, v2) << R_DMA_CH6_CLR_INTR__clr_descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH6_CLR_INTR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH6_CLR_INTR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH6_CLR_INTR_(f1_,v1,f2_,v2) ( \
+ (R_DMA_CH6_CLR_INTR__clr_eop__##f1_##_VAL(R_DMA_CH6_CLR_INTR_, clr_eop_, v1) << R_DMA_CH6_CLR_INTR__clr_eop__BITNR) | \
+ (R_DMA_CH6_CLR_INTR__clr_descr__##f2_##_VAL(R_DMA_CH6_CLR_INTR_, clr_descr_, v2) << R_DMA_CH6_CLR_INTR__clr_descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH6_CMD
+ * - type: RW
+ * - addr: 0xb00001e8
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH6_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH6_CMD.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH6_CMD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH6_CMD(f1,v1) ( \
+ R_DMA_CH6_CMD__WRITE(R_DMA_CH6_CMD__ADDR, ( \
+ REG_VAL__R_DMA_CH6_CMD_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH6_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH6_CMD(f1,v1) ( \
+ (R_DMA_CH6_CMD__cmd__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH6_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH6_CMD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH6_CMD(f1,v1) ( \
+ (R_DMA_CH6_CMD__cmd__##f1##__VAL(R_DMA_CH6_CMD_, cmd_, v1) << R_DMA_CH6_CMD__cmd__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH6_CMD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH6_CMD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH6_CMD_(f1_,v1) ( \
+ (R_DMA_CH6_CMD__cmd__##f1_##_VAL(R_DMA_CH6_CMD_, cmd_, v1) << R_DMA_CH6_CMD__cmd__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH6_DESCR
+ * - type: RW
+ * - addr: 0xb000016c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH6_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH6_DESCR.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH6_DESCR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH6_DESCR(f1,v1) ( \
+ R_DMA_CH6_DESCR__WRITE(R_DMA_CH6_DESCR__ADDR, ( \
+ REG_VAL__R_DMA_CH6_DESCR_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH6_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH6_DESCR(f1,v1) ( \
+ (R_DMA_CH6_DESCR__descr__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH6_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH6_DESCR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH6_DESCR(f1,v1) ( \
+ (R_DMA_CH6_DESCR__descr__##f1##__VAL(R_DMA_CH6_DESCR_, descr_, v1) << R_DMA_CH6_DESCR__descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH6_DESCR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH6_DESCR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH6_DESCR_(f1_,v1) ( \
+ (R_DMA_CH6_DESCR__descr__##f1_##_VAL(R_DMA_CH6_DESCR_, descr_, v1) << R_DMA_CH6_DESCR__descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH6_FIRST
+ * - type: RW
+ * - addr: 0xb00001b8
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH6_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH6_FIRST.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH6_FIRST.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH6_FIRST(f1,v1) ( \
+ R_DMA_CH6_FIRST__WRITE(R_DMA_CH6_FIRST__ADDR, ( \
+ REG_VAL__R_DMA_CH6_FIRST_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH6_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH6_FIRST(f1,v1) ( \
+ (R_DMA_CH6_FIRST__first__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH6_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH6_FIRST.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH6_FIRST(f1,v1) ( \
+ (R_DMA_CH6_FIRST__first__##f1##__VAL(R_DMA_CH6_FIRST_, first_, v1) << R_DMA_CH6_FIRST__first__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH6_FIRST_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH6_FIRST.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH6_FIRST_(f1_,v1) ( \
+ (R_DMA_CH6_FIRST__first__##f1_##_VAL(R_DMA_CH6_FIRST_, first_, v1) << R_DMA_CH6_FIRST__first__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH6_HWSW
+ * - type: RW
+ * - addr: 0xb0000160
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH6_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH6_HWSW.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH6_HWSW.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH6_HWSW(f1,v1,f2,v2) ( \
+ R_DMA_CH6_HWSW__WRITE(R_DMA_CH6_HWSW__ADDR, ( \
+ REG_VAL__R_DMA_CH6_HWSW_(f1##_,v1,f2##_,v2) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH6_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH6_HWSW(f1,v1,f2,v2) ( \
+ (R_DMA_CH6_HWSW__hw__##f1##__MASK & REG__##v1) | \
+ (R_DMA_CH6_HWSW__sw__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH6_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH6_HWSW.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH6_HWSW(f1,v1,f2,v2) ( \
+ (R_DMA_CH6_HWSW__hw__##f1##__VAL(R_DMA_CH6_HWSW_, hw_, v1) << R_DMA_CH6_HWSW__hw__BITNR) | \
+ (R_DMA_CH6_HWSW__sw__##f2##__VAL(R_DMA_CH6_HWSW_, sw_, v2) << R_DMA_CH6_HWSW__sw__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH6_HWSW_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH6_HWSW.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH6_HWSW_(f1_,v1,f2_,v2) ( \
+ (R_DMA_CH6_HWSW__hw__##f1_##_VAL(R_DMA_CH6_HWSW_, hw_, v1) << R_DMA_CH6_HWSW__hw__BITNR) | \
+ (R_DMA_CH6_HWSW__sw__##f2_##_VAL(R_DMA_CH6_HWSW_, sw_, v2) << R_DMA_CH6_HWSW__sw__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH6_NEXT
+ * - type: RW
+ * - addr: 0xb0000164
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH6_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH6_NEXT.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH6_NEXT.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH6_NEXT(f1,v1) ( \
+ R_DMA_CH6_NEXT__WRITE(R_DMA_CH6_NEXT__ADDR, ( \
+ REG_VAL__R_DMA_CH6_NEXT_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH6_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH6_NEXT(f1,v1) ( \
+ (R_DMA_CH6_NEXT__next__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH6_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH6_NEXT.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH6_NEXT(f1,v1) ( \
+ (R_DMA_CH6_NEXT__next__##f1##__VAL(R_DMA_CH6_NEXT_, next_, v1) << R_DMA_CH6_NEXT__next__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH6_NEXT_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH6_NEXT.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH6_NEXT_(f1_,v1) ( \
+ (R_DMA_CH6_NEXT__next__##f1_##_VAL(R_DMA_CH6_NEXT_, next_, v1) << R_DMA_CH6_NEXT__next__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH6_STATUS
+ * - type: RO
+ * - addr: 0xb00001ea
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH6_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH6_STATUS(f1,v1) ( \
+ (R_DMA_CH6_STATUS__avail__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH6_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH6_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH6_STATUS(f1,v1) ( \
+ (R_DMA_CH6_STATUS__avail__##f1##__VAL(R_DMA_CH6_STATUS_, avail_, v1) << R_DMA_CH6_STATUS__avail__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH6_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH6_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH6_STATUS_(f1_,v1) ( \
+ (R_DMA_CH6_STATUS__avail__##f1_##_VAL(R_DMA_CH6_STATUS_, avail_, v1) << R_DMA_CH6_STATUS__avail__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH7_BUF
+ * - type: RW
+ * - addr: 0xb0000178
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH7_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH7_BUF.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH7_BUF.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH7_BUF(f1,v1) ( \
+ R_DMA_CH7_BUF__WRITE(R_DMA_CH7_BUF__ADDR, ( \
+ REG_VAL__R_DMA_CH7_BUF_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH7_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH7_BUF(f1,v1) ( \
+ (R_DMA_CH7_BUF__buf__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH7_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH7_BUF.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH7_BUF(f1,v1) ( \
+ (R_DMA_CH7_BUF__buf__##f1##__VAL(R_DMA_CH7_BUF_, buf_, v1) << R_DMA_CH7_BUF__buf__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH7_BUF_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH7_BUF.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH7_BUF_(f1_,v1) ( \
+ (R_DMA_CH7_BUF__buf__##f1_##_VAL(R_DMA_CH7_BUF_, buf_, v1) << R_DMA_CH7_BUF__buf__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH7_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001ed
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH7_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH7_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH7_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH7_CLR_INTR(f1,v1,f2,v2) ( \
+ *R_DMA_CH7_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH7_CLR_INTR_) \
+ REG_VAL__R_DMA_CH7_CLR_INTR_(f1##_,v1,f2##_,v2) \
+ ), \
+ R_DMA_CH7_CLR_INTR__WRITE(R_DMA_CH7_CLR_INTR__ADDR, *R_DMA_CH7_CLR_INTR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH7_CLR_INTR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH7_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_DMA_CH7_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH7_CLR_INTR__SHADOW(f1,v1,f2,v2) ( \
+ *R_DMA_CH7_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH7_CLR_INTR_) \
+ REG_VAL__R_DMA_CH7_CLR_INTR_(f1##_,v1,f2##_,v2) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH7_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH7_CLR_INTR(f1,v1,f2,v2) ( \
+ (R_DMA_CH7_CLR_INTR__clr_eop__##f1##__MASK & REG__##v1) | \
+ (R_DMA_CH7_CLR_INTR__clr_descr__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH7_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH7_CLR_INTR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH7_CLR_INTR(f1,v1,f2,v2) ( \
+ (R_DMA_CH7_CLR_INTR__clr_eop__##f1##__VAL(R_DMA_CH7_CLR_INTR_, clr_eop_, v1) << R_DMA_CH7_CLR_INTR__clr_eop__BITNR) | \
+ (R_DMA_CH7_CLR_INTR__clr_descr__##f2##__VAL(R_DMA_CH7_CLR_INTR_, clr_descr_, v2) << R_DMA_CH7_CLR_INTR__clr_descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH7_CLR_INTR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH7_CLR_INTR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH7_CLR_INTR_(f1_,v1,f2_,v2) ( \
+ (R_DMA_CH7_CLR_INTR__clr_eop__##f1_##_VAL(R_DMA_CH7_CLR_INTR_, clr_eop_, v1) << R_DMA_CH7_CLR_INTR__clr_eop__BITNR) | \
+ (R_DMA_CH7_CLR_INTR__clr_descr__##f2_##_VAL(R_DMA_CH7_CLR_INTR_, clr_descr_, v2) << R_DMA_CH7_CLR_INTR__clr_descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH7_CMD
+ * - type: RW
+ * - addr: 0xb00001ec
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH7_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH7_CMD.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH7_CMD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH7_CMD(f1,v1) ( \
+ R_DMA_CH7_CMD__WRITE(R_DMA_CH7_CMD__ADDR, ( \
+ REG_VAL__R_DMA_CH7_CMD_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH7_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH7_CMD(f1,v1) ( \
+ (R_DMA_CH7_CMD__cmd__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH7_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH7_CMD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH7_CMD(f1,v1) ( \
+ (R_DMA_CH7_CMD__cmd__##f1##__VAL(R_DMA_CH7_CMD_, cmd_, v1) << R_DMA_CH7_CMD__cmd__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH7_CMD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH7_CMD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH7_CMD_(f1_,v1) ( \
+ (R_DMA_CH7_CMD__cmd__##f1_##_VAL(R_DMA_CH7_CMD_, cmd_, v1) << R_DMA_CH7_CMD__cmd__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH7_DESCR
+ * - type: RW
+ * - addr: 0xb000017c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH7_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH7_DESCR.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH7_DESCR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH7_DESCR(f1,v1) ( \
+ R_DMA_CH7_DESCR__WRITE(R_DMA_CH7_DESCR__ADDR, ( \
+ REG_VAL__R_DMA_CH7_DESCR_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH7_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH7_DESCR(f1,v1) ( \
+ (R_DMA_CH7_DESCR__descr__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH7_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH7_DESCR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH7_DESCR(f1,v1) ( \
+ (R_DMA_CH7_DESCR__descr__##f1##__VAL(R_DMA_CH7_DESCR_, descr_, v1) << R_DMA_CH7_DESCR__descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH7_DESCR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH7_DESCR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH7_DESCR_(f1_,v1) ( \
+ (R_DMA_CH7_DESCR__descr__##f1_##_VAL(R_DMA_CH7_DESCR_, descr_, v1) << R_DMA_CH7_DESCR__descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH7_FIRST
+ * - type: RW
+ * - addr: 0xb00001bc
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH7_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH7_FIRST.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH7_FIRST.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH7_FIRST(f1,v1) ( \
+ R_DMA_CH7_FIRST__WRITE(R_DMA_CH7_FIRST__ADDR, ( \
+ REG_VAL__R_DMA_CH7_FIRST_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH7_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH7_FIRST(f1,v1) ( \
+ (R_DMA_CH7_FIRST__first__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH7_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH7_FIRST.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH7_FIRST(f1,v1) ( \
+ (R_DMA_CH7_FIRST__first__##f1##__VAL(R_DMA_CH7_FIRST_, first_, v1) << R_DMA_CH7_FIRST__first__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH7_FIRST_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH7_FIRST.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH7_FIRST_(f1_,v1) ( \
+ (R_DMA_CH7_FIRST__first__##f1_##_VAL(R_DMA_CH7_FIRST_, first_, v1) << R_DMA_CH7_FIRST__first__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH7_HWSW
+ * - type: RW
+ * - addr: 0xb0000170
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH7_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH7_HWSW.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH7_HWSW.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH7_HWSW(f1,v1,f2,v2) ( \
+ R_DMA_CH7_HWSW__WRITE(R_DMA_CH7_HWSW__ADDR, ( \
+ REG_VAL__R_DMA_CH7_HWSW_(f1##_,v1,f2##_,v2) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH7_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH7_HWSW(f1,v1,f2,v2) ( \
+ (R_DMA_CH7_HWSW__hw__##f1##__MASK & REG__##v1) | \
+ (R_DMA_CH7_HWSW__sw__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH7_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH7_HWSW.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH7_HWSW(f1,v1,f2,v2) ( \
+ (R_DMA_CH7_HWSW__hw__##f1##__VAL(R_DMA_CH7_HWSW_, hw_, v1) << R_DMA_CH7_HWSW__hw__BITNR) | \
+ (R_DMA_CH7_HWSW__sw__##f2##__VAL(R_DMA_CH7_HWSW_, sw_, v2) << R_DMA_CH7_HWSW__sw__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH7_HWSW_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH7_HWSW.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH7_HWSW_(f1_,v1,f2_,v2) ( \
+ (R_DMA_CH7_HWSW__hw__##f1_##_VAL(R_DMA_CH7_HWSW_, hw_, v1) << R_DMA_CH7_HWSW__hw__BITNR) | \
+ (R_DMA_CH7_HWSW__sw__##f2_##_VAL(R_DMA_CH7_HWSW_, sw_, v2) << R_DMA_CH7_HWSW__sw__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH7_NEXT
+ * - type: RW
+ * - addr: 0xb0000174
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH7_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH7_NEXT.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH7_NEXT.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH7_NEXT(f1,v1) ( \
+ R_DMA_CH7_NEXT__WRITE(R_DMA_CH7_NEXT__ADDR, ( \
+ REG_VAL__R_DMA_CH7_NEXT_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH7_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH7_NEXT(f1,v1) ( \
+ (R_DMA_CH7_NEXT__next__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH7_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH7_NEXT.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH7_NEXT(f1,v1) ( \
+ (R_DMA_CH7_NEXT__next__##f1##__VAL(R_DMA_CH7_NEXT_, next_, v1) << R_DMA_CH7_NEXT__next__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH7_NEXT_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH7_NEXT.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH7_NEXT_(f1_,v1) ( \
+ (R_DMA_CH7_NEXT__next__##f1_##_VAL(R_DMA_CH7_NEXT_, next_, v1) << R_DMA_CH7_NEXT__next__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH7_STATUS
+ * - type: RO
+ * - addr: 0xb00001ee
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH7_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH7_STATUS(f1,v1) ( \
+ (R_DMA_CH7_STATUS__avail__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH7_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH7_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH7_STATUS(f1,v1) ( \
+ (R_DMA_CH7_STATUS__avail__##f1##__VAL(R_DMA_CH7_STATUS_, avail_, v1) << R_DMA_CH7_STATUS__avail__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH7_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH7_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH7_STATUS_(f1_,v1) ( \
+ (R_DMA_CH7_STATUS__avail__##f1_##_VAL(R_DMA_CH7_STATUS_, avail_, v1) << R_DMA_CH7_STATUS__avail__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH8_BUF
+ * - type: RW
+ * - addr: 0xb0000188
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_BUF.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH8_BUF.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_BUF(f1,v1) ( \
+ R_DMA_CH8_BUF__WRITE(R_DMA_CH8_BUF__ADDR, ( \
+ REG_VAL__R_DMA_CH8_BUF_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH8_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH8_BUF(f1,v1) ( \
+ (R_DMA_CH8_BUF__buf__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_BUF.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_BUF(f1,v1) ( \
+ (R_DMA_CH8_BUF__buf__##f1##__VAL(R_DMA_CH8_BUF_, buf_, v1) << R_DMA_CH8_BUF__buf__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_BUF_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_BUF.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_BUF_(f1_,v1) ( \
+ (R_DMA_CH8_BUF__buf__##f1_##_VAL(R_DMA_CH8_BUF_, buf_, v1) << R_DMA_CH8_BUF__buf__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH8_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001f1
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH8_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_CLR_INTR(f1,v1,f2,v2) ( \
+ *R_DMA_CH8_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH8_CLR_INTR_) \
+ REG_VAL__R_DMA_CH8_CLR_INTR_(f1##_,v1,f2##_,v2) \
+ ), \
+ R_DMA_CH8_CLR_INTR__WRITE(R_DMA_CH8_CLR_INTR__ADDR, *R_DMA_CH8_CLR_INTR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_CLR_INTR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_DMA_CH8_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_CLR_INTR__SHADOW(f1,v1,f2,v2) ( \
+ *R_DMA_CH8_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH8_CLR_INTR_) \
+ REG_VAL__R_DMA_CH8_CLR_INTR_(f1##_,v1,f2##_,v2) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH8_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH8_CLR_INTR(f1,v1,f2,v2) ( \
+ (R_DMA_CH8_CLR_INTR__clr_eop__##f1##__MASK & REG__##v1) | \
+ (R_DMA_CH8_CLR_INTR__clr_descr__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_CLR_INTR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_CLR_INTR(f1,v1,f2,v2) ( \
+ (R_DMA_CH8_CLR_INTR__clr_eop__##f1##__VAL(R_DMA_CH8_CLR_INTR_, clr_eop_, v1) << R_DMA_CH8_CLR_INTR__clr_eop__BITNR) | \
+ (R_DMA_CH8_CLR_INTR__clr_descr__##f2##__VAL(R_DMA_CH8_CLR_INTR_, clr_descr_, v2) << R_DMA_CH8_CLR_INTR__clr_descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_CLR_INTR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_CLR_INTR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_CLR_INTR_(f1_,v1,f2_,v2) ( \
+ (R_DMA_CH8_CLR_INTR__clr_eop__##f1_##_VAL(R_DMA_CH8_CLR_INTR_, clr_eop_, v1) << R_DMA_CH8_CLR_INTR__clr_eop__BITNR) | \
+ (R_DMA_CH8_CLR_INTR__clr_descr__##f2_##_VAL(R_DMA_CH8_CLR_INTR_, clr_descr_, v2) << R_DMA_CH8_CLR_INTR__clr_descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH8_CMD
+ * - type: RW
+ * - addr: 0xb00001f0
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_CMD.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH8_CMD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_CMD(f1,v1) ( \
+ R_DMA_CH8_CMD__WRITE(R_DMA_CH8_CMD__ADDR, ( \
+ REG_VAL__R_DMA_CH8_CMD_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH8_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH8_CMD(f1,v1) ( \
+ (R_DMA_CH8_CMD__cmd__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_CMD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_CMD(f1,v1) ( \
+ (R_DMA_CH8_CMD__cmd__##f1##__VAL(R_DMA_CH8_CMD_, cmd_, v1) << R_DMA_CH8_CMD__cmd__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_CMD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_CMD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_CMD_(f1_,v1) ( \
+ (R_DMA_CH8_CMD__cmd__##f1_##_VAL(R_DMA_CH8_CMD_, cmd_, v1) << R_DMA_CH8_CMD__cmd__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH8_DESCR
+ * - type: RW
+ * - addr: 0xb000018c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_DESCR.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH8_DESCR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_DESCR(f1,v1) ( \
+ R_DMA_CH8_DESCR__WRITE(R_DMA_CH8_DESCR__ADDR, ( \
+ REG_VAL__R_DMA_CH8_DESCR_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH8_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH8_DESCR(f1,v1) ( \
+ (R_DMA_CH8_DESCR__descr__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_DESCR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_DESCR(f1,v1) ( \
+ (R_DMA_CH8_DESCR__descr__##f1##__VAL(R_DMA_CH8_DESCR_, descr_, v1) << R_DMA_CH8_DESCR__descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_DESCR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_DESCR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_DESCR_(f1_,v1) ( \
+ (R_DMA_CH8_DESCR__descr__##f1_##_VAL(R_DMA_CH8_DESCR_, descr_, v1) << R_DMA_CH8_DESCR__descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH8_FIRST
+ * - type: RW
+ * - addr: 0xb00001c0
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_FIRST.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH8_FIRST.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_FIRST(f1,v1) ( \
+ R_DMA_CH8_FIRST__WRITE(R_DMA_CH8_FIRST__ADDR, ( \
+ REG_VAL__R_DMA_CH8_FIRST_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH8_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH8_FIRST(f1,v1) ( \
+ (R_DMA_CH8_FIRST__first__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_FIRST.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_FIRST(f1,v1) ( \
+ (R_DMA_CH8_FIRST__first__##f1##__VAL(R_DMA_CH8_FIRST_, first_, v1) << R_DMA_CH8_FIRST__first__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_FIRST_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_FIRST.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_FIRST_(f1_,v1) ( \
+ (R_DMA_CH8_FIRST__first__##f1_##_VAL(R_DMA_CH8_FIRST_, first_, v1) << R_DMA_CH8_FIRST__first__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH8_HWSW
+ * - type: RW
+ * - addr: 0xb0000180
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_HWSW.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH8_HWSW.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_HWSW(f1,v1,f2,v2) ( \
+ R_DMA_CH8_HWSW__WRITE(R_DMA_CH8_HWSW__ADDR, ( \
+ REG_VAL__R_DMA_CH8_HWSW_(f1##_,v1,f2##_,v2) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH8_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH8_HWSW(f1,v1,f2,v2) ( \
+ (R_DMA_CH8_HWSW__hw__##f1##__MASK & REG__##v1) | \
+ (R_DMA_CH8_HWSW__sw__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_HWSW.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_HWSW(f1,v1,f2,v2) ( \
+ (R_DMA_CH8_HWSW__hw__##f1##__VAL(R_DMA_CH8_HWSW_, hw_, v1) << R_DMA_CH8_HWSW__hw__BITNR) | \
+ (R_DMA_CH8_HWSW__sw__##f2##__VAL(R_DMA_CH8_HWSW_, sw_, v2) << R_DMA_CH8_HWSW__sw__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_HWSW_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_HWSW.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_HWSW_(f1_,v1,f2_,v2) ( \
+ (R_DMA_CH8_HWSW__hw__##f1_##_VAL(R_DMA_CH8_HWSW_, hw_, v1) << R_DMA_CH8_HWSW__hw__BITNR) | \
+ (R_DMA_CH8_HWSW__sw__##f2_##_VAL(R_DMA_CH8_HWSW_, sw_, v2) << R_DMA_CH8_HWSW__sw__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH8_NEP
+ * - type: RW
+ * - addr: 0xb00001c0
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_NEP
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_NEP.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH8_NEP.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_NEP(f1,v1) ( \
+ R_DMA_CH8_NEP__WRITE(R_DMA_CH8_NEP__ADDR, ( \
+ REG_VAL__R_DMA_CH8_NEP_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH8_NEP
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH8_NEP(f1,v1) ( \
+ (R_DMA_CH8_NEP__nep__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_NEP
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_NEP.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_NEP(f1,v1) ( \
+ (R_DMA_CH8_NEP__nep__##f1##__VAL(R_DMA_CH8_NEP_, nep_, v1) << R_DMA_CH8_NEP__nep__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_NEP_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_NEP.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_NEP_(f1_,v1) ( \
+ (R_DMA_CH8_NEP__nep__##f1_##_VAL(R_DMA_CH8_NEP_, nep_, v1) << R_DMA_CH8_NEP__nep__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH8_NEXT
+ * - type: RW
+ * - addr: 0xb0000184
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_NEXT.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH8_NEXT.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_NEXT(f1,v1) ( \
+ R_DMA_CH8_NEXT__WRITE(R_DMA_CH8_NEXT__ADDR, ( \
+ REG_VAL__R_DMA_CH8_NEXT_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH8_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH8_NEXT(f1,v1) ( \
+ (R_DMA_CH8_NEXT__next__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_NEXT.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_NEXT(f1,v1) ( \
+ (R_DMA_CH8_NEXT__next__##f1##__VAL(R_DMA_CH8_NEXT_, next_, v1) << R_DMA_CH8_NEXT__next__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_NEXT_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_NEXT.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_NEXT_(f1_,v1) ( \
+ (R_DMA_CH8_NEXT__next__##f1_##_VAL(R_DMA_CH8_NEXT_, next_, v1) << R_DMA_CH8_NEXT__next__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH8_STATUS
+ * - type: RO
+ * - addr: 0xb00001f2
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH8_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH8_STATUS(f1,v1) ( \
+ (R_DMA_CH8_STATUS__avail__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_STATUS(f1,v1) ( \
+ (R_DMA_CH8_STATUS__avail__##f1##__VAL(R_DMA_CH8_STATUS_, avail_, v1) << R_DMA_CH8_STATUS__avail__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_STATUS_(f1_,v1) ( \
+ (R_DMA_CH8_STATUS__avail__##f1_##_VAL(R_DMA_CH8_STATUS_, avail_, v1) << R_DMA_CH8_STATUS__avail__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB
+ * - type: RW
+ * - addr: 0xb000018c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_SUB
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_SUB.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH8_SUB.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_SUB(f1,v1) ( \
+ R_DMA_CH8_SUB__WRITE(R_DMA_CH8_SUB__ADDR, ( \
+ REG_VAL__R_DMA_CH8_SUB_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH8_SUB
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH8_SUB(f1,v1) ( \
+ (R_DMA_CH8_SUB__sub__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB(f1,v1) ( \
+ (R_DMA_CH8_SUB__sub__##f1##__VAL(R_DMA_CH8_SUB_, sub_, v1) << R_DMA_CH8_SUB__sub__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB_(f1_,v1) ( \
+ (R_DMA_CH8_SUB__sub__##f1_##_VAL(R_DMA_CH8_SUB_, sub_, v1) << R_DMA_CH8_SUB__sub__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB0_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001e3
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_SUB0_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_SUB0_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH8_SUB0_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_SUB0_CLR_INTR(f1,v1) ( \
+ *R_DMA_CH8_SUB0_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH8_SUB0_CLR_INTR_) \
+ REG_VAL__R_DMA_CH8_SUB0_CLR_INTR_(f1##_,v1) \
+ ), \
+ R_DMA_CH8_SUB0_CLR_INTR__WRITE(R_DMA_CH8_SUB0_CLR_INTR__ADDR, *R_DMA_CH8_SUB0_CLR_INTR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_SUB0_CLR_INTR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_SUB0_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_DMA_CH8_SUB0_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_SUB0_CLR_INTR__SHADOW(f1,v1) ( \
+ *R_DMA_CH8_SUB0_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH8_SUB0_CLR_INTR_) \
+ REG_VAL__R_DMA_CH8_SUB0_CLR_INTR_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH8_SUB0_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH8_SUB0_CLR_INTR(f1,v1) ( \
+ (R_DMA_CH8_SUB0_CLR_INTR__clr_descr__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB0_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB0_CLR_INTR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB0_CLR_INTR(f1,v1) ( \
+ (R_DMA_CH8_SUB0_CLR_INTR__clr_descr__##f1##__VAL(R_DMA_CH8_SUB0_CLR_INTR_, clr_descr_, v1) << R_DMA_CH8_SUB0_CLR_INTR__clr_descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB0_CLR_INTR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB0_CLR_INTR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB0_CLR_INTR_(f1_,v1) ( \
+ (R_DMA_CH8_SUB0_CLR_INTR__clr_descr__##f1_##_VAL(R_DMA_CH8_SUB0_CLR_INTR_, clr_descr_, v1) << R_DMA_CH8_SUB0_CLR_INTR__clr_descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB0_CMD
+ * - type: RW
+ * - addr: 0xb00001d3
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_SUB0_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_SUB0_CMD.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH8_SUB0_CMD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_SUB0_CMD(f1,v1) ( \
+ R_DMA_CH8_SUB0_CMD__WRITE(R_DMA_CH8_SUB0_CMD__ADDR, ( \
+ REG_VAL__R_DMA_CH8_SUB0_CMD_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH8_SUB0_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH8_SUB0_CMD(f1,v1) ( \
+ (R_DMA_CH8_SUB0_CMD__cmd__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB0_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB0_CMD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB0_CMD(f1,v1) ( \
+ (R_DMA_CH8_SUB0_CMD__cmd__##f1##__VAL(R_DMA_CH8_SUB0_CMD_, cmd_, v1) << R_DMA_CH8_SUB0_CMD__cmd__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB0_CMD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB0_CMD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB0_CMD_(f1_,v1) ( \
+ (R_DMA_CH8_SUB0_CMD__cmd__##f1_##_VAL(R_DMA_CH8_SUB0_CMD_, cmd_, v1) << R_DMA_CH8_SUB0_CMD__cmd__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB0_EP
+ * - type: RW
+ * - addr: 0xb00001c8
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_SUB0_EP
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_SUB0_EP.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH8_SUB0_EP.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_SUB0_EP(f1,v1) ( \
+ R_DMA_CH8_SUB0_EP__WRITE(R_DMA_CH8_SUB0_EP__ADDR, ( \
+ REG_VAL__R_DMA_CH8_SUB0_EP_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH8_SUB0_EP
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH8_SUB0_EP(f1,v1) ( \
+ (R_DMA_CH8_SUB0_EP__ep__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB0_EP
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB0_EP.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB0_EP(f1,v1) ( \
+ (R_DMA_CH8_SUB0_EP__ep__##f1##__VAL(R_DMA_CH8_SUB0_EP_, ep_, v1) << R_DMA_CH8_SUB0_EP__ep__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB0_EP_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB0_EP.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB0_EP_(f1_,v1) ( \
+ (R_DMA_CH8_SUB0_EP__ep__##f1_##_VAL(R_DMA_CH8_SUB0_EP_, ep_, v1) << R_DMA_CH8_SUB0_EP__ep__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB1_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001e7
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_SUB1_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_SUB1_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH8_SUB1_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_SUB1_CLR_INTR(f1,v1) ( \
+ *R_DMA_CH8_SUB1_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH8_SUB1_CLR_INTR_) \
+ REG_VAL__R_DMA_CH8_SUB1_CLR_INTR_(f1##_,v1) \
+ ), \
+ R_DMA_CH8_SUB1_CLR_INTR__WRITE(R_DMA_CH8_SUB1_CLR_INTR__ADDR, *R_DMA_CH8_SUB1_CLR_INTR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_SUB1_CLR_INTR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_SUB1_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_DMA_CH8_SUB1_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_SUB1_CLR_INTR__SHADOW(f1,v1) ( \
+ *R_DMA_CH8_SUB1_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH8_SUB1_CLR_INTR_) \
+ REG_VAL__R_DMA_CH8_SUB1_CLR_INTR_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH8_SUB1_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH8_SUB1_CLR_INTR(f1,v1) ( \
+ (R_DMA_CH8_SUB1_CLR_INTR__clr_descr__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB1_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB1_CLR_INTR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB1_CLR_INTR(f1,v1) ( \
+ (R_DMA_CH8_SUB1_CLR_INTR__clr_descr__##f1##__VAL(R_DMA_CH8_SUB1_CLR_INTR_, clr_descr_, v1) << R_DMA_CH8_SUB1_CLR_INTR__clr_descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB1_CLR_INTR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB1_CLR_INTR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB1_CLR_INTR_(f1_,v1) ( \
+ (R_DMA_CH8_SUB1_CLR_INTR__clr_descr__##f1_##_VAL(R_DMA_CH8_SUB1_CLR_INTR_, clr_descr_, v1) << R_DMA_CH8_SUB1_CLR_INTR__clr_descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB1_CMD
+ * - type: RW
+ * - addr: 0xb00001d7
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_SUB1_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_SUB1_CMD.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH8_SUB1_CMD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_SUB1_CMD(f1,v1) ( \
+ R_DMA_CH8_SUB1_CMD__WRITE(R_DMA_CH8_SUB1_CMD__ADDR, ( \
+ REG_VAL__R_DMA_CH8_SUB1_CMD_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH8_SUB1_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH8_SUB1_CMD(f1,v1) ( \
+ (R_DMA_CH8_SUB1_CMD__cmd__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB1_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB1_CMD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB1_CMD(f1,v1) ( \
+ (R_DMA_CH8_SUB1_CMD__cmd__##f1##__VAL(R_DMA_CH8_SUB1_CMD_, cmd_, v1) << R_DMA_CH8_SUB1_CMD__cmd__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB1_CMD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB1_CMD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB1_CMD_(f1_,v1) ( \
+ (R_DMA_CH8_SUB1_CMD__cmd__##f1_##_VAL(R_DMA_CH8_SUB1_CMD_, cmd_, v1) << R_DMA_CH8_SUB1_CMD__cmd__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB1_EP
+ * - type: RW
+ * - addr: 0xb00001cc
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_SUB1_EP
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_SUB1_EP.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH8_SUB1_EP.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_SUB1_EP(f1,v1) ( \
+ R_DMA_CH8_SUB1_EP__WRITE(R_DMA_CH8_SUB1_EP__ADDR, ( \
+ REG_VAL__R_DMA_CH8_SUB1_EP_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH8_SUB1_EP
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH8_SUB1_EP(f1,v1) ( \
+ (R_DMA_CH8_SUB1_EP__ep__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB1_EP
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB1_EP.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB1_EP(f1,v1) ( \
+ (R_DMA_CH8_SUB1_EP__ep__##f1##__VAL(R_DMA_CH8_SUB1_EP_, ep_, v1) << R_DMA_CH8_SUB1_EP__ep__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB1_EP_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB1_EP.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB1_EP_(f1_,v1) ( \
+ (R_DMA_CH8_SUB1_EP__ep__##f1_##_VAL(R_DMA_CH8_SUB1_EP_, ep_, v1) << R_DMA_CH8_SUB1_EP__ep__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB2_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001eb
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_SUB2_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_SUB2_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH8_SUB2_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_SUB2_CLR_INTR(f1,v1) ( \
+ *R_DMA_CH8_SUB2_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH8_SUB2_CLR_INTR_) \
+ REG_VAL__R_DMA_CH8_SUB2_CLR_INTR_(f1##_,v1) \
+ ), \
+ R_DMA_CH8_SUB2_CLR_INTR__WRITE(R_DMA_CH8_SUB2_CLR_INTR__ADDR, *R_DMA_CH8_SUB2_CLR_INTR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_SUB2_CLR_INTR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_SUB2_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_DMA_CH8_SUB2_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_SUB2_CLR_INTR__SHADOW(f1,v1) ( \
+ *R_DMA_CH8_SUB2_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH8_SUB2_CLR_INTR_) \
+ REG_VAL__R_DMA_CH8_SUB2_CLR_INTR_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH8_SUB2_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH8_SUB2_CLR_INTR(f1,v1) ( \
+ (R_DMA_CH8_SUB2_CLR_INTR__clr_descr__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB2_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB2_CLR_INTR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB2_CLR_INTR(f1,v1) ( \
+ (R_DMA_CH8_SUB2_CLR_INTR__clr_descr__##f1##__VAL(R_DMA_CH8_SUB2_CLR_INTR_, clr_descr_, v1) << R_DMA_CH8_SUB2_CLR_INTR__clr_descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB2_CLR_INTR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB2_CLR_INTR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB2_CLR_INTR_(f1_,v1) ( \
+ (R_DMA_CH8_SUB2_CLR_INTR__clr_descr__##f1_##_VAL(R_DMA_CH8_SUB2_CLR_INTR_, clr_descr_, v1) << R_DMA_CH8_SUB2_CLR_INTR__clr_descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB2_CMD
+ * - type: RW
+ * - addr: 0xb00001db
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_SUB2_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_SUB2_CMD.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH8_SUB2_CMD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_SUB2_CMD(f1,v1) ( \
+ R_DMA_CH8_SUB2_CMD__WRITE(R_DMA_CH8_SUB2_CMD__ADDR, ( \
+ REG_VAL__R_DMA_CH8_SUB2_CMD_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH8_SUB2_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH8_SUB2_CMD(f1,v1) ( \
+ (R_DMA_CH8_SUB2_CMD__cmd__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB2_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB2_CMD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB2_CMD(f1,v1) ( \
+ (R_DMA_CH8_SUB2_CMD__cmd__##f1##__VAL(R_DMA_CH8_SUB2_CMD_, cmd_, v1) << R_DMA_CH8_SUB2_CMD__cmd__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB2_CMD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB2_CMD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB2_CMD_(f1_,v1) ( \
+ (R_DMA_CH8_SUB2_CMD__cmd__##f1_##_VAL(R_DMA_CH8_SUB2_CMD_, cmd_, v1) << R_DMA_CH8_SUB2_CMD__cmd__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB2_EP
+ * - type: RW
+ * - addr: 0xb00001f8
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_SUB2_EP
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_SUB2_EP.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH8_SUB2_EP.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_SUB2_EP(f1,v1) ( \
+ R_DMA_CH8_SUB2_EP__WRITE(R_DMA_CH8_SUB2_EP__ADDR, ( \
+ REG_VAL__R_DMA_CH8_SUB2_EP_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH8_SUB2_EP
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH8_SUB2_EP(f1,v1) ( \
+ (R_DMA_CH8_SUB2_EP__ep__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB2_EP
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB2_EP.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB2_EP(f1,v1) ( \
+ (R_DMA_CH8_SUB2_EP__ep__##f1##__VAL(R_DMA_CH8_SUB2_EP_, ep_, v1) << R_DMA_CH8_SUB2_EP__ep__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB2_EP_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB2_EP.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB2_EP_(f1_,v1) ( \
+ (R_DMA_CH8_SUB2_EP__ep__##f1_##_VAL(R_DMA_CH8_SUB2_EP_, ep_, v1) << R_DMA_CH8_SUB2_EP__ep__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB3_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001ef
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_SUB3_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_SUB3_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH8_SUB3_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_SUB3_CLR_INTR(f1,v1) ( \
+ *R_DMA_CH8_SUB3_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH8_SUB3_CLR_INTR_) \
+ REG_VAL__R_DMA_CH8_SUB3_CLR_INTR_(f1##_,v1) \
+ ), \
+ R_DMA_CH8_SUB3_CLR_INTR__WRITE(R_DMA_CH8_SUB3_CLR_INTR__ADDR, *R_DMA_CH8_SUB3_CLR_INTR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_SUB3_CLR_INTR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_SUB3_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_DMA_CH8_SUB3_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_SUB3_CLR_INTR__SHADOW(f1,v1) ( \
+ *R_DMA_CH8_SUB3_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH8_SUB3_CLR_INTR_) \
+ REG_VAL__R_DMA_CH8_SUB3_CLR_INTR_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH8_SUB3_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH8_SUB3_CLR_INTR(f1,v1) ( \
+ (R_DMA_CH8_SUB3_CLR_INTR__clr_descr__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB3_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB3_CLR_INTR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB3_CLR_INTR(f1,v1) ( \
+ (R_DMA_CH8_SUB3_CLR_INTR__clr_descr__##f1##__VAL(R_DMA_CH8_SUB3_CLR_INTR_, clr_descr_, v1) << R_DMA_CH8_SUB3_CLR_INTR__clr_descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB3_CLR_INTR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB3_CLR_INTR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB3_CLR_INTR_(f1_,v1) ( \
+ (R_DMA_CH8_SUB3_CLR_INTR__clr_descr__##f1_##_VAL(R_DMA_CH8_SUB3_CLR_INTR_, clr_descr_, v1) << R_DMA_CH8_SUB3_CLR_INTR__clr_descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB3_CMD
+ * - type: RW
+ * - addr: 0xb00001df
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_SUB3_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_SUB3_CMD.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH8_SUB3_CMD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_SUB3_CMD(f1,v1) ( \
+ R_DMA_CH8_SUB3_CMD__WRITE(R_DMA_CH8_SUB3_CMD__ADDR, ( \
+ REG_VAL__R_DMA_CH8_SUB3_CMD_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH8_SUB3_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH8_SUB3_CMD(f1,v1) ( \
+ (R_DMA_CH8_SUB3_CMD__cmd__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB3_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB3_CMD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB3_CMD(f1,v1) ( \
+ (R_DMA_CH8_SUB3_CMD__cmd__##f1##__VAL(R_DMA_CH8_SUB3_CMD_, cmd_, v1) << R_DMA_CH8_SUB3_CMD__cmd__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB3_CMD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB3_CMD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB3_CMD_(f1_,v1) ( \
+ (R_DMA_CH8_SUB3_CMD__cmd__##f1_##_VAL(R_DMA_CH8_SUB3_CMD_, cmd_, v1) << R_DMA_CH8_SUB3_CMD__cmd__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB3_EP
+ * - type: RW
+ * - addr: 0xb00001fc
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH8_SUB3_EP
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH8_SUB3_EP.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH8_SUB3_EP.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH8_SUB3_EP(f1,v1) ( \
+ R_DMA_CH8_SUB3_EP__WRITE(R_DMA_CH8_SUB3_EP__ADDR, ( \
+ REG_VAL__R_DMA_CH8_SUB3_EP_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH8_SUB3_EP
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH8_SUB3_EP(f1,v1) ( \
+ (R_DMA_CH8_SUB3_EP__ep__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB3_EP
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB3_EP.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB3_EP(f1,v1) ( \
+ (R_DMA_CH8_SUB3_EP__ep__##f1##__VAL(R_DMA_CH8_SUB3_EP_, ep_, v1) << R_DMA_CH8_SUB3_EP__ep__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH8_SUB3_EP_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH8_SUB3_EP.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH8_SUB3_EP_(f1_,v1) ( \
+ (R_DMA_CH8_SUB3_EP__ep__##f1_##_VAL(R_DMA_CH8_SUB3_EP_, ep_, v1) << R_DMA_CH8_SUB3_EP__ep__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH9_BUF
+ * - type: RW
+ * - addr: 0xb0000198
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH9_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH9_BUF.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH9_BUF.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH9_BUF(f1,v1) ( \
+ R_DMA_CH9_BUF__WRITE(R_DMA_CH9_BUF__ADDR, ( \
+ REG_VAL__R_DMA_CH9_BUF_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH9_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH9_BUF(f1,v1) ( \
+ (R_DMA_CH9_BUF__buf__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH9_BUF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH9_BUF.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH9_BUF(f1,v1) ( \
+ (R_DMA_CH9_BUF__buf__##f1##__VAL(R_DMA_CH9_BUF_, buf_, v1) << R_DMA_CH9_BUF__buf__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH9_BUF_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH9_BUF.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH9_BUF_(f1_,v1) ( \
+ (R_DMA_CH9_BUF__buf__##f1_##_VAL(R_DMA_CH9_BUF_, buf_, v1) << R_DMA_CH9_BUF__buf__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH9_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001f5
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH9_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH9_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH9_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH9_CLR_INTR(f1,v1,f2,v2) ( \
+ *R_DMA_CH9_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH9_CLR_INTR_) \
+ REG_VAL__R_DMA_CH9_CLR_INTR_(f1##_,v1,f2##_,v2) \
+ ), \
+ R_DMA_CH9_CLR_INTR__WRITE(R_DMA_CH9_CLR_INTR__ADDR, *R_DMA_CH9_CLR_INTR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH9_CLR_INTR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH9_CLR_INTR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_DMA_CH9_CLR_INTR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH9_CLR_INTR__SHADOW(f1,v1,f2,v2) ( \
+ *R_DMA_CH9_CLR_INTR__SADDR = ( \
+ REG_INITIATED(R_DMA_CH9_CLR_INTR_) \
+ REG_VAL__R_DMA_CH9_CLR_INTR_(f1##_,v1,f2##_,v2) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH9_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH9_CLR_INTR(f1,v1,f2,v2) ( \
+ (R_DMA_CH9_CLR_INTR__clr_eop__##f1##__MASK & REG__##v1) | \
+ (R_DMA_CH9_CLR_INTR__clr_descr__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH9_CLR_INTR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH9_CLR_INTR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH9_CLR_INTR(f1,v1,f2,v2) ( \
+ (R_DMA_CH9_CLR_INTR__clr_eop__##f1##__VAL(R_DMA_CH9_CLR_INTR_, clr_eop_, v1) << R_DMA_CH9_CLR_INTR__clr_eop__BITNR) | \
+ (R_DMA_CH9_CLR_INTR__clr_descr__##f2##__VAL(R_DMA_CH9_CLR_INTR_, clr_descr_, v2) << R_DMA_CH9_CLR_INTR__clr_descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH9_CLR_INTR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH9_CLR_INTR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH9_CLR_INTR_(f1_,v1,f2_,v2) ( \
+ (R_DMA_CH9_CLR_INTR__clr_eop__##f1_##_VAL(R_DMA_CH9_CLR_INTR_, clr_eop_, v1) << R_DMA_CH9_CLR_INTR__clr_eop__BITNR) | \
+ (R_DMA_CH9_CLR_INTR__clr_descr__##f2_##_VAL(R_DMA_CH9_CLR_INTR_, clr_descr_, v2) << R_DMA_CH9_CLR_INTR__clr_descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH9_CMD
+ * - type: RW
+ * - addr: 0xb00001f4
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH9_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH9_CMD.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH9_CMD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH9_CMD(f1,v1) ( \
+ R_DMA_CH9_CMD__WRITE(R_DMA_CH9_CMD__ADDR, ( \
+ REG_VAL__R_DMA_CH9_CMD_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH9_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH9_CMD(f1,v1) ( \
+ (R_DMA_CH9_CMD__cmd__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH9_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH9_CMD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH9_CMD(f1,v1) ( \
+ (R_DMA_CH9_CMD__cmd__##f1##__VAL(R_DMA_CH9_CMD_, cmd_, v1) << R_DMA_CH9_CMD__cmd__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH9_CMD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH9_CMD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH9_CMD_(f1_,v1) ( \
+ (R_DMA_CH9_CMD__cmd__##f1_##_VAL(R_DMA_CH9_CMD_, cmd_, v1) << R_DMA_CH9_CMD__cmd__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH9_DESCR
+ * - type: RW
+ * - addr: 0xb000019c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH9_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH9_DESCR.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH9_DESCR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH9_DESCR(f1,v1) ( \
+ R_DMA_CH9_DESCR__WRITE(R_DMA_CH9_DESCR__ADDR, ( \
+ REG_VAL__R_DMA_CH9_DESCR_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH9_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH9_DESCR(f1,v1) ( \
+ (R_DMA_CH9_DESCR__descr__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH9_DESCR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH9_DESCR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH9_DESCR(f1,v1) ( \
+ (R_DMA_CH9_DESCR__descr__##f1##__VAL(R_DMA_CH9_DESCR_, descr_, v1) << R_DMA_CH9_DESCR__descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH9_DESCR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH9_DESCR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH9_DESCR_(f1_,v1) ( \
+ (R_DMA_CH9_DESCR__descr__##f1_##_VAL(R_DMA_CH9_DESCR_, descr_, v1) << R_DMA_CH9_DESCR__descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH9_FIRST
+ * - type: RW
+ * - addr: 0xb00001c4
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH9_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH9_FIRST.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH9_FIRST.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH9_FIRST(f1,v1) ( \
+ R_DMA_CH9_FIRST__WRITE(R_DMA_CH9_FIRST__ADDR, ( \
+ REG_VAL__R_DMA_CH9_FIRST_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH9_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH9_FIRST(f1,v1) ( \
+ (R_DMA_CH9_FIRST__first__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH9_FIRST
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH9_FIRST.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH9_FIRST(f1,v1) ( \
+ (R_DMA_CH9_FIRST__first__##f1##__VAL(R_DMA_CH9_FIRST_, first_, v1) << R_DMA_CH9_FIRST__first__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH9_FIRST_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH9_FIRST.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH9_FIRST_(f1_,v1) ( \
+ (R_DMA_CH9_FIRST__first__##f1_##_VAL(R_DMA_CH9_FIRST_, first_, v1) << R_DMA_CH9_FIRST__first__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH9_HWSW
+ * - type: RW
+ * - addr: 0xb0000190
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH9_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH9_HWSW.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH9_HWSW.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH9_HWSW(f1,v1,f2,v2) ( \
+ R_DMA_CH9_HWSW__WRITE(R_DMA_CH9_HWSW__ADDR, ( \
+ REG_VAL__R_DMA_CH9_HWSW_(f1##_,v1,f2##_,v2) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH9_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH9_HWSW(f1,v1,f2,v2) ( \
+ (R_DMA_CH9_HWSW__hw__##f1##__MASK & REG__##v1) | \
+ (R_DMA_CH9_HWSW__sw__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH9_HWSW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH9_HWSW.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH9_HWSW(f1,v1,f2,v2) ( \
+ (R_DMA_CH9_HWSW__hw__##f1##__VAL(R_DMA_CH9_HWSW_, hw_, v1) << R_DMA_CH9_HWSW__hw__BITNR) | \
+ (R_DMA_CH9_HWSW__sw__##f2##__VAL(R_DMA_CH9_HWSW_, sw_, v2) << R_DMA_CH9_HWSW__sw__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH9_HWSW_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH9_HWSW.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH9_HWSW_(f1_,v1,f2_,v2) ( \
+ (R_DMA_CH9_HWSW__hw__##f1_##_VAL(R_DMA_CH9_HWSW_, hw_, v1) << R_DMA_CH9_HWSW__hw__BITNR) | \
+ (R_DMA_CH9_HWSW__sw__##f2_##_VAL(R_DMA_CH9_HWSW_, sw_, v2) << R_DMA_CH9_HWSW__sw__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH9_NEXT
+ * - type: RW
+ * - addr: 0xb0000194
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DMA_CH9_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DMA_CH9_NEXT.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DMA_CH9_NEXT.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DMA_CH9_NEXT(f1,v1) ( \
+ R_DMA_CH9_NEXT__WRITE(R_DMA_CH9_NEXT__ADDR, ( \
+ REG_VAL__R_DMA_CH9_NEXT_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH9_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH9_NEXT(f1,v1) ( \
+ (R_DMA_CH9_NEXT__next__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH9_NEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH9_NEXT.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH9_NEXT(f1,v1) ( \
+ (R_DMA_CH9_NEXT__next__##f1##__VAL(R_DMA_CH9_NEXT_, next_, v1) << R_DMA_CH9_NEXT__next__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH9_NEXT_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH9_NEXT.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH9_NEXT_(f1_,v1) ( \
+ (R_DMA_CH9_NEXT__next__##f1_##_VAL(R_DMA_CH9_NEXT_, next_, v1) << R_DMA_CH9_NEXT__next__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DMA_CH9_STATUS
+ * - type: RO
+ * - addr: 0xb00001f6
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DMA_CH9_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DMA_CH9_STATUS(f1,v1) ( \
+ (R_DMA_CH9_STATUS__avail__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH9_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH9_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH9_STATUS(f1,v1) ( \
+ (R_DMA_CH9_STATUS__avail__##f1##__VAL(R_DMA_CH9_STATUS_, avail_, v1) << R_DMA_CH9_STATUS__avail__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DMA_CH9_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DMA_CH9_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DMA_CH9_STATUS_(f1_,v1) ( \
+ (R_DMA_CH9_STATUS__avail__##f1_##_VAL(R_DMA_CH9_STATUS_, avail_, v1) << R_DMA_CH9_STATUS__avail__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DRAM_CONFIG
+ * - type: WO
+ * - addr: 0xb000000c
+ * - group: Bus interface configuration registers
+ */
+
+#if USE_GROUP__Bus_interface_configuration_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DRAM_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DRAM_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DRAM_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DRAM_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ *R_DRAM_CONFIG__SADDR = ( \
+ REG_INITIATED(R_DRAM_CONFIG_) \
+ REG_VAL__R_DRAM_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12) \
+ ), \
+ R_DRAM_CONFIG__WRITE(R_DRAM_CONFIG__ADDR, *R_DRAM_CONFIG__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DRAM_CONFIG__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DRAM_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_DRAM_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DRAM_CONFIG__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ *R_DRAM_CONFIG__SADDR = ( \
+ REG_INITIATED(R_DRAM_CONFIG_) \
+ REG_VAL__R_DRAM_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DRAM_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DRAM_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ (R_DRAM_CONFIG__wmm1__##f1##__MASK & REG__##v1) | \
+ (R_DRAM_CONFIG__wmm0__##f2##__MASK & REG__##v2) | \
+ (R_DRAM_CONFIG__sh1__##f3##__MASK & REG__##v3) | \
+ (R_DRAM_CONFIG__sh0__##f4##__MASK & REG__##v4) | \
+ (R_DRAM_CONFIG__w__##f5##__MASK & REG__##v5) | \
+ (R_DRAM_CONFIG__c__##f6##__MASK & REG__##v6) | \
+ (R_DRAM_CONFIG__e__##f7##__MASK & REG__##v7) | \
+ (R_DRAM_CONFIG__group_sel__##f8##__MASK & REG__##v8) | \
+ (R_DRAM_CONFIG__ca1__##f9##__MASK & REG__##v9) | \
+ (R_DRAM_CONFIG__bank23sel__##f10##__MASK & REG__##v10) | \
+ (R_DRAM_CONFIG__ca0__##f11##__MASK & REG__##v11) | \
+ (R_DRAM_CONFIG__bank01sel__##f12##__MASK & REG__##v12) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DRAM_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DRAM_CONFIG.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DRAM_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ (R_DRAM_CONFIG__wmm1__##f1##__VAL(R_DRAM_CONFIG_, wmm1_, v1) << R_DRAM_CONFIG__wmm1__BITNR) | \
+ (R_DRAM_CONFIG__wmm0__##f2##__VAL(R_DRAM_CONFIG_, wmm0_, v2) << R_DRAM_CONFIG__wmm0__BITNR) | \
+ (R_DRAM_CONFIG__sh1__##f3##__VAL(R_DRAM_CONFIG_, sh1_, v3) << R_DRAM_CONFIG__sh1__BITNR) | \
+ (R_DRAM_CONFIG__sh0__##f4##__VAL(R_DRAM_CONFIG_, sh0_, v4) << R_DRAM_CONFIG__sh0__BITNR) | \
+ (R_DRAM_CONFIG__w__##f5##__VAL(R_DRAM_CONFIG_, w_, v5) << R_DRAM_CONFIG__w__BITNR) | \
+ (R_DRAM_CONFIG__c__##f6##__VAL(R_DRAM_CONFIG_, c_, v6) << R_DRAM_CONFIG__c__BITNR) | \
+ (R_DRAM_CONFIG__e__##f7##__VAL(R_DRAM_CONFIG_, e_, v7) << R_DRAM_CONFIG__e__BITNR) | \
+ (R_DRAM_CONFIG__group_sel__##f8##__VAL(R_DRAM_CONFIG_, group_sel_, v8) << R_DRAM_CONFIG__group_sel__BITNR) | \
+ (R_DRAM_CONFIG__ca1__##f9##__VAL(R_DRAM_CONFIG_, ca1_, v9) << R_DRAM_CONFIG__ca1__BITNR) | \
+ (R_DRAM_CONFIG__bank23sel__##f10##__VAL(R_DRAM_CONFIG_, bank23sel_, v10) << R_DRAM_CONFIG__bank23sel__BITNR) | \
+ (R_DRAM_CONFIG__ca0__##f11##__VAL(R_DRAM_CONFIG_, ca0_, v11) << R_DRAM_CONFIG__ca0__BITNR) | \
+ (R_DRAM_CONFIG__bank01sel__##f12##__VAL(R_DRAM_CONFIG_, bank01sel_, v12) << R_DRAM_CONFIG__bank01sel__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DRAM_CONFIG_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DRAM_CONFIG.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DRAM_CONFIG_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12) ( \
+ (R_DRAM_CONFIG__wmm1__##f1_##_VAL(R_DRAM_CONFIG_, wmm1_, v1) << R_DRAM_CONFIG__wmm1__BITNR) | \
+ (R_DRAM_CONFIG__wmm0__##f2_##_VAL(R_DRAM_CONFIG_, wmm0_, v2) << R_DRAM_CONFIG__wmm0__BITNR) | \
+ (R_DRAM_CONFIG__sh1__##f3_##_VAL(R_DRAM_CONFIG_, sh1_, v3) << R_DRAM_CONFIG__sh1__BITNR) | \
+ (R_DRAM_CONFIG__sh0__##f4_##_VAL(R_DRAM_CONFIG_, sh0_, v4) << R_DRAM_CONFIG__sh0__BITNR) | \
+ (R_DRAM_CONFIG__w__##f5_##_VAL(R_DRAM_CONFIG_, w_, v5) << R_DRAM_CONFIG__w__BITNR) | \
+ (R_DRAM_CONFIG__c__##f6_##_VAL(R_DRAM_CONFIG_, c_, v6) << R_DRAM_CONFIG__c__BITNR) | \
+ (R_DRAM_CONFIG__e__##f7_##_VAL(R_DRAM_CONFIG_, e_, v7) << R_DRAM_CONFIG__e__BITNR) | \
+ (R_DRAM_CONFIG__group_sel__##f8_##_VAL(R_DRAM_CONFIG_, group_sel_, v8) << R_DRAM_CONFIG__group_sel__BITNR) | \
+ (R_DRAM_CONFIG__ca1__##f9_##_VAL(R_DRAM_CONFIG_, ca1_, v9) << R_DRAM_CONFIG__ca1__BITNR) | \
+ (R_DRAM_CONFIG__bank23sel__##f10_##_VAL(R_DRAM_CONFIG_, bank23sel_, v10) << R_DRAM_CONFIG__bank23sel__BITNR) | \
+ (R_DRAM_CONFIG__ca0__##f11_##_VAL(R_DRAM_CONFIG_, ca0_, v11) << R_DRAM_CONFIG__ca0__BITNR) | \
+ (R_DRAM_CONFIG__bank01sel__##f12_##_VAL(R_DRAM_CONFIG_, bank01sel_, v12) << R_DRAM_CONFIG__bank01sel__BITNR) \
+)
+
+#endif
+
+/*
+ * R_DRAM_TIMING
+ * - type: WO
+ * - addr: 0xb0000008
+ * - group: Bus interface configuration registers
+ */
+
+#if USE_GROUP__Bus_interface_configuration_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DRAM_TIMING
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DRAM_TIMING.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_DRAM_TIMING.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DRAM_TIMING(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ *R_DRAM_TIMING__SADDR = ( \
+ REG_INITIATED(R_DRAM_TIMING_) \
+ REG_VAL__R_DRAM_TIMING_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10) \
+ ), \
+ R_DRAM_TIMING__WRITE(R_DRAM_TIMING__ADDR, *R_DRAM_TIMING__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_DRAM_TIMING__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_DRAM_TIMING.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_DRAM_TIMING.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_DRAM_TIMING__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ *R_DRAM_TIMING__SADDR = ( \
+ REG_INITIATED(R_DRAM_TIMING_) \
+ REG_VAL__R_DRAM_TIMING_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_DRAM_TIMING
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_DRAM_TIMING(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ (R_DRAM_TIMING__sdram__##f1##__MASK & REG__##v1) | \
+ (R_DRAM_TIMING__ref__##f2##__MASK & REG__##v2) | \
+ (R_DRAM_TIMING__rp__##f3##__MASK & REG__##v3) | \
+ (R_DRAM_TIMING__rs__##f4##__MASK & REG__##v4) | \
+ (R_DRAM_TIMING__rh__##f5##__MASK & REG__##v5) | \
+ (R_DRAM_TIMING__w__##f6##__MASK & REG__##v6) | \
+ (R_DRAM_TIMING__c__##f7##__MASK & REG__##v7) | \
+ (R_DRAM_TIMING__cz__##f8##__MASK & REG__##v8) | \
+ (R_DRAM_TIMING__cp__##f9##__MASK & REG__##v9) | \
+ (R_DRAM_TIMING__cw__##f10##__MASK & REG__##v10) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DRAM_TIMING
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DRAM_TIMING.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_DRAM_TIMING(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ (R_DRAM_TIMING__sdram__##f1##__VAL(R_DRAM_TIMING_, sdram_, v1) << R_DRAM_TIMING__sdram__BITNR) | \
+ (R_DRAM_TIMING__ref__##f2##__VAL(R_DRAM_TIMING_, ref_, v2) << R_DRAM_TIMING__ref__BITNR) | \
+ (R_DRAM_TIMING__rp__##f3##__VAL(R_DRAM_TIMING_, rp_, v3) << R_DRAM_TIMING__rp__BITNR) | \
+ (R_DRAM_TIMING__rs__##f4##__VAL(R_DRAM_TIMING_, rs_, v4) << R_DRAM_TIMING__rs__BITNR) | \
+ (R_DRAM_TIMING__rh__##f5##__VAL(R_DRAM_TIMING_, rh_, v5) << R_DRAM_TIMING__rh__BITNR) | \
+ (R_DRAM_TIMING__w__##f6##__VAL(R_DRAM_TIMING_, w_, v6) << R_DRAM_TIMING__w__BITNR) | \
+ (R_DRAM_TIMING__c__##f7##__VAL(R_DRAM_TIMING_, c_, v7) << R_DRAM_TIMING__c__BITNR) | \
+ (R_DRAM_TIMING__cz__##f8##__VAL(R_DRAM_TIMING_, cz_, v8) << R_DRAM_TIMING__cz__BITNR) | \
+ (R_DRAM_TIMING__cp__##f9##__VAL(R_DRAM_TIMING_, cp_, v9) << R_DRAM_TIMING__cp__BITNR) | \
+ (R_DRAM_TIMING__cw__##f10##__VAL(R_DRAM_TIMING_, cw_, v10) << R_DRAM_TIMING__cw__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_DRAM_TIMING_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_DRAM_TIMING.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_DRAM_TIMING_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10) ( \
+ (R_DRAM_TIMING__sdram__##f1_##_VAL(R_DRAM_TIMING_, sdram_, v1) << R_DRAM_TIMING__sdram__BITNR) | \
+ (R_DRAM_TIMING__ref__##f2_##_VAL(R_DRAM_TIMING_, ref_, v2) << R_DRAM_TIMING__ref__BITNR) | \
+ (R_DRAM_TIMING__rp__##f3_##_VAL(R_DRAM_TIMING_, rp_, v3) << R_DRAM_TIMING__rp__BITNR) | \
+ (R_DRAM_TIMING__rs__##f4_##_VAL(R_DRAM_TIMING_, rs_, v4) << R_DRAM_TIMING__rs__BITNR) | \
+ (R_DRAM_TIMING__rh__##f5_##_VAL(R_DRAM_TIMING_, rh_, v5) << R_DRAM_TIMING__rh__BITNR) | \
+ (R_DRAM_TIMING__w__##f6_##_VAL(R_DRAM_TIMING_, w_, v6) << R_DRAM_TIMING__w__BITNR) | \
+ (R_DRAM_TIMING__c__##f7_##_VAL(R_DRAM_TIMING_, c_, v7) << R_DRAM_TIMING__c__BITNR) | \
+ (R_DRAM_TIMING__cz__##f8_##_VAL(R_DRAM_TIMING_, cz_, v8) << R_DRAM_TIMING__cz__BITNR) | \
+ (R_DRAM_TIMING__cp__##f9_##_VAL(R_DRAM_TIMING_, cp_, v9) << R_DRAM_TIMING__cp__BITNR) | \
+ (R_DRAM_TIMING__cw__##f10_##_VAL(R_DRAM_TIMING_, cw_, v10) << R_DRAM_TIMING__cw__BITNR) \
+)
+
+#endif
+
+/*
+ * R_EXT_DMA_0_ADDR
+ * - type: WO
+ * - addr: 0xb0000014
+ * - group: External DMA registers
+ */
+
+#if USE_GROUP__External_DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_EXT_DMA_0_ADDR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_EXT_DMA_0_ADDR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_EXT_DMA_0_ADDR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_EXT_DMA_0_ADDR(f1,v1) ( \
+ *R_EXT_DMA_0_ADDR__SADDR = ( \
+ REG_INITIATED(R_EXT_DMA_0_ADDR_) \
+ REG_VAL__R_EXT_DMA_0_ADDR_(f1##_,v1) \
+ ), \
+ R_EXT_DMA_0_ADDR__WRITE(R_EXT_DMA_0_ADDR__ADDR, *R_EXT_DMA_0_ADDR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_EXT_DMA_0_ADDR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_EXT_DMA_0_ADDR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_EXT_DMA_0_ADDR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_EXT_DMA_0_ADDR__SHADOW(f1,v1) ( \
+ *R_EXT_DMA_0_ADDR__SADDR = ( \
+ REG_INITIATED(R_EXT_DMA_0_ADDR_) \
+ REG_VAL__R_EXT_DMA_0_ADDR_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_EXT_DMA_0_ADDR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_EXT_DMA_0_ADDR(f1,v1) ( \
+ (R_EXT_DMA_0_ADDR__ext0_addr__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_EXT_DMA_0_ADDR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_EXT_DMA_0_ADDR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_EXT_DMA_0_ADDR(f1,v1) ( \
+ (R_EXT_DMA_0_ADDR__ext0_addr__##f1##__VAL(R_EXT_DMA_0_ADDR_, ext0_addr_, v1) << R_EXT_DMA_0_ADDR__ext0_addr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_EXT_DMA_0_ADDR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_EXT_DMA_0_ADDR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_EXT_DMA_0_ADDR_(f1_,v1) ( \
+ (R_EXT_DMA_0_ADDR__ext0_addr__##f1_##_VAL(R_EXT_DMA_0_ADDR_, ext0_addr_, v1) << R_EXT_DMA_0_ADDR__ext0_addr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_EXT_DMA_0_CMD
+ * - type: WO
+ * - addr: 0xb0000010
+ * - group: External DMA registers
+ */
+
+#if USE_GROUP__External_DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_EXT_DMA_0_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_EXT_DMA_0_CMD.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_EXT_DMA_0_CMD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_EXT_DMA_0_CMD(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_EXT_DMA_0_CMD__SADDR = ( \
+ REG_INITIATED(R_EXT_DMA_0_CMD_) \
+ REG_VAL__R_EXT_DMA_0_CMD_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ), \
+ R_EXT_DMA_0_CMD__WRITE(R_EXT_DMA_0_CMD__ADDR, *R_EXT_DMA_0_CMD__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_EXT_DMA_0_CMD__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_EXT_DMA_0_CMD.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_EXT_DMA_0_CMD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_EXT_DMA_0_CMD__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_EXT_DMA_0_CMD__SADDR = ( \
+ REG_INITIATED(R_EXT_DMA_0_CMD_) \
+ REG_VAL__R_EXT_DMA_0_CMD_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_EXT_DMA_0_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_EXT_DMA_0_CMD(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_EXT_DMA_0_CMD__cnt__##f1##__MASK & REG__##v1) | \
+ (R_EXT_DMA_0_CMD__rqpol__##f2##__MASK & REG__##v2) | \
+ (R_EXT_DMA_0_CMD__apol__##f3##__MASK & REG__##v3) | \
+ (R_EXT_DMA_0_CMD__rq_ack__##f4##__MASK & REG__##v4) | \
+ (R_EXT_DMA_0_CMD__wid__##f5##__MASK & REG__##v5) | \
+ (R_EXT_DMA_0_CMD__dir__##f6##__MASK & REG__##v6) | \
+ (R_EXT_DMA_0_CMD__run__##f7##__MASK & REG__##v7) | \
+ (R_EXT_DMA_0_CMD__trf_count__##f8##__MASK & REG__##v8) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_EXT_DMA_0_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_EXT_DMA_0_CMD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_EXT_DMA_0_CMD(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_EXT_DMA_0_CMD__cnt__##f1##__VAL(R_EXT_DMA_0_CMD_, cnt_, v1) << R_EXT_DMA_0_CMD__cnt__BITNR) | \
+ (R_EXT_DMA_0_CMD__rqpol__##f2##__VAL(R_EXT_DMA_0_CMD_, rqpol_, v2) << R_EXT_DMA_0_CMD__rqpol__BITNR) | \
+ (R_EXT_DMA_0_CMD__apol__##f3##__VAL(R_EXT_DMA_0_CMD_, apol_, v3) << R_EXT_DMA_0_CMD__apol__BITNR) | \
+ (R_EXT_DMA_0_CMD__rq_ack__##f4##__VAL(R_EXT_DMA_0_CMD_, rq_ack_, v4) << R_EXT_DMA_0_CMD__rq_ack__BITNR) | \
+ (R_EXT_DMA_0_CMD__wid__##f5##__VAL(R_EXT_DMA_0_CMD_, wid_, v5) << R_EXT_DMA_0_CMD__wid__BITNR) | \
+ (R_EXT_DMA_0_CMD__dir__##f6##__VAL(R_EXT_DMA_0_CMD_, dir_, v6) << R_EXT_DMA_0_CMD__dir__BITNR) | \
+ (R_EXT_DMA_0_CMD__run__##f7##__VAL(R_EXT_DMA_0_CMD_, run_, v7) << R_EXT_DMA_0_CMD__run__BITNR) | \
+ (R_EXT_DMA_0_CMD__trf_count__##f8##__VAL(R_EXT_DMA_0_CMD_, trf_count_, v8) << R_EXT_DMA_0_CMD__trf_count__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_EXT_DMA_0_CMD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_EXT_DMA_0_CMD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_EXT_DMA_0_CMD_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8) ( \
+ (R_EXT_DMA_0_CMD__cnt__##f1_##_VAL(R_EXT_DMA_0_CMD_, cnt_, v1) << R_EXT_DMA_0_CMD__cnt__BITNR) | \
+ (R_EXT_DMA_0_CMD__rqpol__##f2_##_VAL(R_EXT_DMA_0_CMD_, rqpol_, v2) << R_EXT_DMA_0_CMD__rqpol__BITNR) | \
+ (R_EXT_DMA_0_CMD__apol__##f3_##_VAL(R_EXT_DMA_0_CMD_, apol_, v3) << R_EXT_DMA_0_CMD__apol__BITNR) | \
+ (R_EXT_DMA_0_CMD__rq_ack__##f4_##_VAL(R_EXT_DMA_0_CMD_, rq_ack_, v4) << R_EXT_DMA_0_CMD__rq_ack__BITNR) | \
+ (R_EXT_DMA_0_CMD__wid__##f5_##_VAL(R_EXT_DMA_0_CMD_, wid_, v5) << R_EXT_DMA_0_CMD__wid__BITNR) | \
+ (R_EXT_DMA_0_CMD__dir__##f6_##_VAL(R_EXT_DMA_0_CMD_, dir_, v6) << R_EXT_DMA_0_CMD__dir__BITNR) | \
+ (R_EXT_DMA_0_CMD__run__##f7_##_VAL(R_EXT_DMA_0_CMD_, run_, v7) << R_EXT_DMA_0_CMD__run__BITNR) | \
+ (R_EXT_DMA_0_CMD__trf_count__##f8_##_VAL(R_EXT_DMA_0_CMD_, trf_count_, v8) << R_EXT_DMA_0_CMD__trf_count__BITNR) \
+)
+
+#endif
+
+/*
+ * R_EXT_DMA_0_STAT
+ * - type: RO
+ * - addr: 0xb0000010
+ * - group: External DMA registers
+ */
+
+#if USE_GROUP__External_DMA_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_EXT_DMA_0_STAT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_EXT_DMA_0_STAT(f1,v1,f2,v2) ( \
+ (R_EXT_DMA_0_STAT__run__##f1##__MASK & REG__##v1) | \
+ (R_EXT_DMA_0_STAT__trf_count__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_EXT_DMA_0_STAT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_EXT_DMA_0_STAT.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_EXT_DMA_0_STAT(f1,v1,f2,v2) ( \
+ (R_EXT_DMA_0_STAT__run__##f1##__VAL(R_EXT_DMA_0_STAT_, run_, v1) << R_EXT_DMA_0_STAT__run__BITNR) | \
+ (R_EXT_DMA_0_STAT__trf_count__##f2##__VAL(R_EXT_DMA_0_STAT_, trf_count_, v2) << R_EXT_DMA_0_STAT__trf_count__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_EXT_DMA_0_STAT_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_EXT_DMA_0_STAT.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_EXT_DMA_0_STAT_(f1_,v1,f2_,v2) ( \
+ (R_EXT_DMA_0_STAT__run__##f1_##_VAL(R_EXT_DMA_0_STAT_, run_, v1) << R_EXT_DMA_0_STAT__run__BITNR) | \
+ (R_EXT_DMA_0_STAT__trf_count__##f2_##_VAL(R_EXT_DMA_0_STAT_, trf_count_, v2) << R_EXT_DMA_0_STAT__trf_count__BITNR) \
+)
+
+#endif
+
+/*
+ * R_EXT_DMA_1_ADDR
+ * - type: WO
+ * - addr: 0xb000001c
+ * - group: External DMA registers
+ */
+
+#if USE_GROUP__External_DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_EXT_DMA_1_ADDR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_EXT_DMA_1_ADDR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_EXT_DMA_1_ADDR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_EXT_DMA_1_ADDR(f1,v1) ( \
+ *R_EXT_DMA_1_ADDR__SADDR = ( \
+ REG_INITIATED(R_EXT_DMA_1_ADDR_) \
+ REG_VAL__R_EXT_DMA_1_ADDR_(f1##_,v1) \
+ ), \
+ R_EXT_DMA_1_ADDR__WRITE(R_EXT_DMA_1_ADDR__ADDR, *R_EXT_DMA_1_ADDR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_EXT_DMA_1_ADDR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_EXT_DMA_1_ADDR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_EXT_DMA_1_ADDR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_EXT_DMA_1_ADDR__SHADOW(f1,v1) ( \
+ *R_EXT_DMA_1_ADDR__SADDR = ( \
+ REG_INITIATED(R_EXT_DMA_1_ADDR_) \
+ REG_VAL__R_EXT_DMA_1_ADDR_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_EXT_DMA_1_ADDR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_EXT_DMA_1_ADDR(f1,v1) ( \
+ (R_EXT_DMA_1_ADDR__ext0_addr__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_EXT_DMA_1_ADDR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_EXT_DMA_1_ADDR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_EXT_DMA_1_ADDR(f1,v1) ( \
+ (R_EXT_DMA_1_ADDR__ext0_addr__##f1##__VAL(R_EXT_DMA_1_ADDR_, ext0_addr_, v1) << R_EXT_DMA_1_ADDR__ext0_addr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_EXT_DMA_1_ADDR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_EXT_DMA_1_ADDR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_EXT_DMA_1_ADDR_(f1_,v1) ( \
+ (R_EXT_DMA_1_ADDR__ext0_addr__##f1_##_VAL(R_EXT_DMA_1_ADDR_, ext0_addr_, v1) << R_EXT_DMA_1_ADDR__ext0_addr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_EXT_DMA_1_CMD
+ * - type: WO
+ * - addr: 0xb0000018
+ * - group: External DMA registers
+ */
+
+#if USE_GROUP__External_DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_EXT_DMA_1_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_EXT_DMA_1_CMD.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_EXT_DMA_1_CMD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_EXT_DMA_1_CMD(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_EXT_DMA_1_CMD__SADDR = ( \
+ REG_INITIATED(R_EXT_DMA_1_CMD_) \
+ REG_VAL__R_EXT_DMA_1_CMD_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ), \
+ R_EXT_DMA_1_CMD__WRITE(R_EXT_DMA_1_CMD__ADDR, *R_EXT_DMA_1_CMD__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_EXT_DMA_1_CMD__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_EXT_DMA_1_CMD.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_EXT_DMA_1_CMD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_EXT_DMA_1_CMD__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_EXT_DMA_1_CMD__SADDR = ( \
+ REG_INITIATED(R_EXT_DMA_1_CMD_) \
+ REG_VAL__R_EXT_DMA_1_CMD_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_EXT_DMA_1_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_EXT_DMA_1_CMD(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_EXT_DMA_1_CMD__cnt__##f1##__MASK & REG__##v1) | \
+ (R_EXT_DMA_1_CMD__rqpol__##f2##__MASK & REG__##v2) | \
+ (R_EXT_DMA_1_CMD__apol__##f3##__MASK & REG__##v3) | \
+ (R_EXT_DMA_1_CMD__rq_ack__##f4##__MASK & REG__##v4) | \
+ (R_EXT_DMA_1_CMD__wid__##f5##__MASK & REG__##v5) | \
+ (R_EXT_DMA_1_CMD__dir__##f6##__MASK & REG__##v6) | \
+ (R_EXT_DMA_1_CMD__run__##f7##__MASK & REG__##v7) | \
+ (R_EXT_DMA_1_CMD__trf_count__##f8##__MASK & REG__##v8) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_EXT_DMA_1_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_EXT_DMA_1_CMD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_EXT_DMA_1_CMD(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_EXT_DMA_1_CMD__cnt__##f1##__VAL(R_EXT_DMA_1_CMD_, cnt_, v1) << R_EXT_DMA_1_CMD__cnt__BITNR) | \
+ (R_EXT_DMA_1_CMD__rqpol__##f2##__VAL(R_EXT_DMA_1_CMD_, rqpol_, v2) << R_EXT_DMA_1_CMD__rqpol__BITNR) | \
+ (R_EXT_DMA_1_CMD__apol__##f3##__VAL(R_EXT_DMA_1_CMD_, apol_, v3) << R_EXT_DMA_1_CMD__apol__BITNR) | \
+ (R_EXT_DMA_1_CMD__rq_ack__##f4##__VAL(R_EXT_DMA_1_CMD_, rq_ack_, v4) << R_EXT_DMA_1_CMD__rq_ack__BITNR) | \
+ (R_EXT_DMA_1_CMD__wid__##f5##__VAL(R_EXT_DMA_1_CMD_, wid_, v5) << R_EXT_DMA_1_CMD__wid__BITNR) | \
+ (R_EXT_DMA_1_CMD__dir__##f6##__VAL(R_EXT_DMA_1_CMD_, dir_, v6) << R_EXT_DMA_1_CMD__dir__BITNR) | \
+ (R_EXT_DMA_1_CMD__run__##f7##__VAL(R_EXT_DMA_1_CMD_, run_, v7) << R_EXT_DMA_1_CMD__run__BITNR) | \
+ (R_EXT_DMA_1_CMD__trf_count__##f8##__VAL(R_EXT_DMA_1_CMD_, trf_count_, v8) << R_EXT_DMA_1_CMD__trf_count__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_EXT_DMA_1_CMD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_EXT_DMA_1_CMD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_EXT_DMA_1_CMD_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8) ( \
+ (R_EXT_DMA_1_CMD__cnt__##f1_##_VAL(R_EXT_DMA_1_CMD_, cnt_, v1) << R_EXT_DMA_1_CMD__cnt__BITNR) | \
+ (R_EXT_DMA_1_CMD__rqpol__##f2_##_VAL(R_EXT_DMA_1_CMD_, rqpol_, v2) << R_EXT_DMA_1_CMD__rqpol__BITNR) | \
+ (R_EXT_DMA_1_CMD__apol__##f3_##_VAL(R_EXT_DMA_1_CMD_, apol_, v3) << R_EXT_DMA_1_CMD__apol__BITNR) | \
+ (R_EXT_DMA_1_CMD__rq_ack__##f4_##_VAL(R_EXT_DMA_1_CMD_, rq_ack_, v4) << R_EXT_DMA_1_CMD__rq_ack__BITNR) | \
+ (R_EXT_DMA_1_CMD__wid__##f5_##_VAL(R_EXT_DMA_1_CMD_, wid_, v5) << R_EXT_DMA_1_CMD__wid__BITNR) | \
+ (R_EXT_DMA_1_CMD__dir__##f6_##_VAL(R_EXT_DMA_1_CMD_, dir_, v6) << R_EXT_DMA_1_CMD__dir__BITNR) | \
+ (R_EXT_DMA_1_CMD__run__##f7_##_VAL(R_EXT_DMA_1_CMD_, run_, v7) << R_EXT_DMA_1_CMD__run__BITNR) | \
+ (R_EXT_DMA_1_CMD__trf_count__##f8_##_VAL(R_EXT_DMA_1_CMD_, trf_count_, v8) << R_EXT_DMA_1_CMD__trf_count__BITNR) \
+)
+
+#endif
+
+/*
+ * R_EXT_DMA_1_STAT
+ * - type: RO
+ * - addr: 0xb0000018
+ * - group: External DMA registers
+ */
+
+#if USE_GROUP__External_DMA_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_EXT_DMA_1_STAT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_EXT_DMA_1_STAT(f1,v1,f2,v2) ( \
+ (R_EXT_DMA_1_STAT__run__##f1##__MASK & REG__##v1) | \
+ (R_EXT_DMA_1_STAT__trf_count__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_EXT_DMA_1_STAT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_EXT_DMA_1_STAT.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_EXT_DMA_1_STAT(f1,v1,f2,v2) ( \
+ (R_EXT_DMA_1_STAT__run__##f1##__VAL(R_EXT_DMA_1_STAT_, run_, v1) << R_EXT_DMA_1_STAT__run__BITNR) | \
+ (R_EXT_DMA_1_STAT__trf_count__##f2##__VAL(R_EXT_DMA_1_STAT_, trf_count_, v2) << R_EXT_DMA_1_STAT__trf_count__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_EXT_DMA_1_STAT_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_EXT_DMA_1_STAT.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_EXT_DMA_1_STAT_(f1_,v1,f2_,v2) ( \
+ (R_EXT_DMA_1_STAT__run__##f1_##_VAL(R_EXT_DMA_1_STAT_, run_, v1) << R_EXT_DMA_1_STAT__run__BITNR) | \
+ (R_EXT_DMA_1_STAT__trf_count__##f2_##_VAL(R_EXT_DMA_1_STAT_, trf_count_, v2) << R_EXT_DMA_1_STAT__trf_count__BITNR) \
+)
+
+#endif
+
+/*
+ * R_GEN_CONFIG
+ * - type: WO
+ * - addr: 0xb000002c
+ * - group: General config registers
+ */
+
+#if USE_GROUP__General_config_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_GEN_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_GEN_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_GEN_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_GEN_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25) ( \
+ *R_GEN_CONFIG__SADDR = ( \
+ REG_INITIATED(R_GEN_CONFIG_) \
+ REG_VAL__R_GEN_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23,f24##_,v24,f25##_,v25) \
+ ), \
+ R_GEN_CONFIG__WRITE(R_GEN_CONFIG__ADDR, *R_GEN_CONFIG__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_GEN_CONFIG__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_GEN_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_GEN_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_GEN_CONFIG__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25) ( \
+ *R_GEN_CONFIG__SADDR = ( \
+ REG_INITIATED(R_GEN_CONFIG_) \
+ REG_VAL__R_GEN_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23,f24##_,v24,f25##_,v25) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_GEN_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_GEN_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25) ( \
+ (R_GEN_CONFIG__par_w__##f1##__MASK & REG__##v1) | \
+ (R_GEN_CONFIG__usb2__##f2##__MASK & REG__##v2) | \
+ (R_GEN_CONFIG__usb1__##f3##__MASK & REG__##v3) | \
+ (R_GEN_CONFIG__g24dir__##f4##__MASK & REG__##v4) | \
+ (R_GEN_CONFIG__g16_23dir__##f5##__MASK & REG__##v5) | \
+ (R_GEN_CONFIG__g8_15dir__##f6##__MASK & REG__##v6) | \
+ (R_GEN_CONFIG__g0dir__##f7##__MASK & REG__##v7) | \
+ (R_GEN_CONFIG__dma9__##f8##__MASK & REG__##v8) | \
+ (R_GEN_CONFIG__dma8__##f9##__MASK & REG__##v9) | \
+ (R_GEN_CONFIG__dma7__##f10##__MASK & REG__##v10) | \
+ (R_GEN_CONFIG__dma6__##f11##__MASK & REG__##v11) | \
+ (R_GEN_CONFIG__dma5__##f12##__MASK & REG__##v12) | \
+ (R_GEN_CONFIG__dma4__##f13##__MASK & REG__##v13) | \
+ (R_GEN_CONFIG__dma3__##f14##__MASK & REG__##v14) | \
+ (R_GEN_CONFIG__dma2__##f15##__MASK & REG__##v15) | \
+ (R_GEN_CONFIG__mio_w__##f16##__MASK & REG__##v16) | \
+ (R_GEN_CONFIG__ser3__##f17##__MASK & REG__##v17) | \
+ (R_GEN_CONFIG__par1__##f18##__MASK & REG__##v18) | \
+ (R_GEN_CONFIG__scsi0w__##f19##__MASK & REG__##v19) | \
+ (R_GEN_CONFIG__scsi1__##f20##__MASK & REG__##v20) | \
+ (R_GEN_CONFIG__mio__##f21##__MASK & REG__##v21) | \
+ (R_GEN_CONFIG__ser2__##f22##__MASK & REG__##v22) | \
+ (R_GEN_CONFIG__par0__##f23##__MASK & REG__##v23) | \
+ (R_GEN_CONFIG__ata__##f24##__MASK & REG__##v24) | \
+ (R_GEN_CONFIG__scsi0__##f25##__MASK & REG__##v25) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_GEN_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_GEN_CONFIG.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_GEN_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25) ( \
+ (R_GEN_CONFIG__par_w__##f1##__VAL(R_GEN_CONFIG_, par_w_, v1) << R_GEN_CONFIG__par_w__BITNR) | \
+ (R_GEN_CONFIG__usb2__##f2##__VAL(R_GEN_CONFIG_, usb2_, v2) << R_GEN_CONFIG__usb2__BITNR) | \
+ (R_GEN_CONFIG__usb1__##f3##__VAL(R_GEN_CONFIG_, usb1_, v3) << R_GEN_CONFIG__usb1__BITNR) | \
+ (R_GEN_CONFIG__g24dir__##f4##__VAL(R_GEN_CONFIG_, g24dir_, v4) << R_GEN_CONFIG__g24dir__BITNR) | \
+ (R_GEN_CONFIG__g16_23dir__##f5##__VAL(R_GEN_CONFIG_, g16_23dir_, v5) << R_GEN_CONFIG__g16_23dir__BITNR) | \
+ (R_GEN_CONFIG__g8_15dir__##f6##__VAL(R_GEN_CONFIG_, g8_15dir_, v6) << R_GEN_CONFIG__g8_15dir__BITNR) | \
+ (R_GEN_CONFIG__g0dir__##f7##__VAL(R_GEN_CONFIG_, g0dir_, v7) << R_GEN_CONFIG__g0dir__BITNR) | \
+ (R_GEN_CONFIG__dma9__##f8##__VAL(R_GEN_CONFIG_, dma9_, v8) << R_GEN_CONFIG__dma9__BITNR) | \
+ (R_GEN_CONFIG__dma8__##f9##__VAL(R_GEN_CONFIG_, dma8_, v9) << R_GEN_CONFIG__dma8__BITNR) | \
+ (R_GEN_CONFIG__dma7__##f10##__VAL(R_GEN_CONFIG_, dma7_, v10) << R_GEN_CONFIG__dma7__BITNR) | \
+ (R_GEN_CONFIG__dma6__##f11##__VAL(R_GEN_CONFIG_, dma6_, v11) << R_GEN_CONFIG__dma6__BITNR) | \
+ (R_GEN_CONFIG__dma5__##f12##__VAL(R_GEN_CONFIG_, dma5_, v12) << R_GEN_CONFIG__dma5__BITNR) | \
+ (R_GEN_CONFIG__dma4__##f13##__VAL(R_GEN_CONFIG_, dma4_, v13) << R_GEN_CONFIG__dma4__BITNR) | \
+ (R_GEN_CONFIG__dma3__##f14##__VAL(R_GEN_CONFIG_, dma3_, v14) << R_GEN_CONFIG__dma3__BITNR) | \
+ (R_GEN_CONFIG__dma2__##f15##__VAL(R_GEN_CONFIG_, dma2_, v15) << R_GEN_CONFIG__dma2__BITNR) | \
+ (R_GEN_CONFIG__mio_w__##f16##__VAL(R_GEN_CONFIG_, mio_w_, v16) << R_GEN_CONFIG__mio_w__BITNR) | \
+ (R_GEN_CONFIG__ser3__##f17##__VAL(R_GEN_CONFIG_, ser3_, v17) << R_GEN_CONFIG__ser3__BITNR) | \
+ (R_GEN_CONFIG__par1__##f18##__VAL(R_GEN_CONFIG_, par1_, v18) << R_GEN_CONFIG__par1__BITNR) | \
+ (R_GEN_CONFIG__scsi0w__##f19##__VAL(R_GEN_CONFIG_, scsi0w_, v19) << R_GEN_CONFIG__scsi0w__BITNR) | \
+ (R_GEN_CONFIG__scsi1__##f20##__VAL(R_GEN_CONFIG_, scsi1_, v20) << R_GEN_CONFIG__scsi1__BITNR) | \
+ (R_GEN_CONFIG__mio__##f21##__VAL(R_GEN_CONFIG_, mio_, v21) << R_GEN_CONFIG__mio__BITNR) | \
+ (R_GEN_CONFIG__ser2__##f22##__VAL(R_GEN_CONFIG_, ser2_, v22) << R_GEN_CONFIG__ser2__BITNR) | \
+ (R_GEN_CONFIG__par0__##f23##__VAL(R_GEN_CONFIG_, par0_, v23) << R_GEN_CONFIG__par0__BITNR) | \
+ (R_GEN_CONFIG__ata__##f24##__VAL(R_GEN_CONFIG_, ata_, v24) << R_GEN_CONFIG__ata__BITNR) | \
+ (R_GEN_CONFIG__scsi0__##f25##__VAL(R_GEN_CONFIG_, scsi0_, v25) << R_GEN_CONFIG__scsi0__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_GEN_CONFIG_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_GEN_CONFIG.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_GEN_CONFIG_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19,f20_,v20,f21_,v21,f22_,v22,f23_,v23,f24_,v24,f25_,v25) ( \
+ (R_GEN_CONFIG__par_w__##f1_##_VAL(R_GEN_CONFIG_, par_w_, v1) << R_GEN_CONFIG__par_w__BITNR) | \
+ (R_GEN_CONFIG__usb2__##f2_##_VAL(R_GEN_CONFIG_, usb2_, v2) << R_GEN_CONFIG__usb2__BITNR) | \
+ (R_GEN_CONFIG__usb1__##f3_##_VAL(R_GEN_CONFIG_, usb1_, v3) << R_GEN_CONFIG__usb1__BITNR) | \
+ (R_GEN_CONFIG__g24dir__##f4_##_VAL(R_GEN_CONFIG_, g24dir_, v4) << R_GEN_CONFIG__g24dir__BITNR) | \
+ (R_GEN_CONFIG__g16_23dir__##f5_##_VAL(R_GEN_CONFIG_, g16_23dir_, v5) << R_GEN_CONFIG__g16_23dir__BITNR) | \
+ (R_GEN_CONFIG__g8_15dir__##f6_##_VAL(R_GEN_CONFIG_, g8_15dir_, v6) << R_GEN_CONFIG__g8_15dir__BITNR) | \
+ (R_GEN_CONFIG__g0dir__##f7_##_VAL(R_GEN_CONFIG_, g0dir_, v7) << R_GEN_CONFIG__g0dir__BITNR) | \
+ (R_GEN_CONFIG__dma9__##f8_##_VAL(R_GEN_CONFIG_, dma9_, v8) << R_GEN_CONFIG__dma9__BITNR) | \
+ (R_GEN_CONFIG__dma8__##f9_##_VAL(R_GEN_CONFIG_, dma8_, v9) << R_GEN_CONFIG__dma8__BITNR) | \
+ (R_GEN_CONFIG__dma7__##f10_##_VAL(R_GEN_CONFIG_, dma7_, v10) << R_GEN_CONFIG__dma7__BITNR) | \
+ (R_GEN_CONFIG__dma6__##f11_##_VAL(R_GEN_CONFIG_, dma6_, v11) << R_GEN_CONFIG__dma6__BITNR) | \
+ (R_GEN_CONFIG__dma5__##f12_##_VAL(R_GEN_CONFIG_, dma5_, v12) << R_GEN_CONFIG__dma5__BITNR) | \
+ (R_GEN_CONFIG__dma4__##f13_##_VAL(R_GEN_CONFIG_, dma4_, v13) << R_GEN_CONFIG__dma4__BITNR) | \
+ (R_GEN_CONFIG__dma3__##f14_##_VAL(R_GEN_CONFIG_, dma3_, v14) << R_GEN_CONFIG__dma3__BITNR) | \
+ (R_GEN_CONFIG__dma2__##f15_##_VAL(R_GEN_CONFIG_, dma2_, v15) << R_GEN_CONFIG__dma2__BITNR) | \
+ (R_GEN_CONFIG__mio_w__##f16_##_VAL(R_GEN_CONFIG_, mio_w_, v16) << R_GEN_CONFIG__mio_w__BITNR) | \
+ (R_GEN_CONFIG__ser3__##f17_##_VAL(R_GEN_CONFIG_, ser3_, v17) << R_GEN_CONFIG__ser3__BITNR) | \
+ (R_GEN_CONFIG__par1__##f18_##_VAL(R_GEN_CONFIG_, par1_, v18) << R_GEN_CONFIG__par1__BITNR) | \
+ (R_GEN_CONFIG__scsi0w__##f19_##_VAL(R_GEN_CONFIG_, scsi0w_, v19) << R_GEN_CONFIG__scsi0w__BITNR) | \
+ (R_GEN_CONFIG__scsi1__##f20_##_VAL(R_GEN_CONFIG_, scsi1_, v20) << R_GEN_CONFIG__scsi1__BITNR) | \
+ (R_GEN_CONFIG__mio__##f21_##_VAL(R_GEN_CONFIG_, mio_, v21) << R_GEN_CONFIG__mio__BITNR) | \
+ (R_GEN_CONFIG__ser2__##f22_##_VAL(R_GEN_CONFIG_, ser2_, v22) << R_GEN_CONFIG__ser2__BITNR) | \
+ (R_GEN_CONFIG__par0__##f23_##_VAL(R_GEN_CONFIG_, par0_, v23) << R_GEN_CONFIG__par0__BITNR) | \
+ (R_GEN_CONFIG__ata__##f24_##_VAL(R_GEN_CONFIG_, ata_, v24) << R_GEN_CONFIG__ata__BITNR) | \
+ (R_GEN_CONFIG__scsi0__##f25_##_VAL(R_GEN_CONFIG_, scsi0_, v25) << R_GEN_CONFIG__scsi0__BITNR) \
+)
+
+#endif
+
+/*
+ * R_GEN_CONFIG_II
+ * - type: WO
+ * - addr: 0xb0000034
+ * - group: General config registers
+ */
+
+#if USE_GROUP__General_config_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_GEN_CONFIG_II
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_GEN_CONFIG_II.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_GEN_CONFIG_II.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_GEN_CONFIG_II(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) ( \
+ *R_GEN_CONFIG_II__SADDR = ( \
+ REG_INITIATED(R_GEN_CONFIG_II_) \
+ REG_VAL__R_GEN_CONFIG_II_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5) \
+ ), \
+ R_GEN_CONFIG_II__WRITE(R_GEN_CONFIG_II__ADDR, *R_GEN_CONFIG_II__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_GEN_CONFIG_II__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_GEN_CONFIG_II.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_GEN_CONFIG_II.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_GEN_CONFIG_II__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) ( \
+ *R_GEN_CONFIG_II__SADDR = ( \
+ REG_INITIATED(R_GEN_CONFIG_II_) \
+ REG_VAL__R_GEN_CONFIG_II_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_GEN_CONFIG_II
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_GEN_CONFIG_II(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) ( \
+ (R_GEN_CONFIG_II__sermode3__##f1##__MASK & REG__##v1) | \
+ (R_GEN_CONFIG_II__sermode1__##f2##__MASK & REG__##v2) | \
+ (R_GEN_CONFIG_II__ext_clk__##f3##__MASK & REG__##v3) | \
+ (R_GEN_CONFIG_II__ser3__##f4##__MASK & REG__##v4) | \
+ (R_GEN_CONFIG_II__ser2__##f5##__MASK & REG__##v5) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_GEN_CONFIG_II
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_GEN_CONFIG_II.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_GEN_CONFIG_II(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) ( \
+ (R_GEN_CONFIG_II__sermode3__##f1##__VAL(R_GEN_CONFIG_II_, sermode3_, v1) << R_GEN_CONFIG_II__sermode3__BITNR) | \
+ (R_GEN_CONFIG_II__sermode1__##f2##__VAL(R_GEN_CONFIG_II_, sermode1_, v2) << R_GEN_CONFIG_II__sermode1__BITNR) | \
+ (R_GEN_CONFIG_II__ext_clk__##f3##__VAL(R_GEN_CONFIG_II_, ext_clk_, v3) << R_GEN_CONFIG_II__ext_clk__BITNR) | \
+ (R_GEN_CONFIG_II__ser3__##f4##__VAL(R_GEN_CONFIG_II_, ser3_, v4) << R_GEN_CONFIG_II__ser3__BITNR) | \
+ (R_GEN_CONFIG_II__ser2__##f5##__VAL(R_GEN_CONFIG_II_, ser2_, v5) << R_GEN_CONFIG_II__ser2__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_GEN_CONFIG_II_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_GEN_CONFIG_II.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_GEN_CONFIG_II_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5) ( \
+ (R_GEN_CONFIG_II__sermode3__##f1_##_VAL(R_GEN_CONFIG_II_, sermode3_, v1) << R_GEN_CONFIG_II__sermode3__BITNR) | \
+ (R_GEN_CONFIG_II__sermode1__##f2_##_VAL(R_GEN_CONFIG_II_, sermode1_, v2) << R_GEN_CONFIG_II__sermode1__BITNR) | \
+ (R_GEN_CONFIG_II__ext_clk__##f3_##_VAL(R_GEN_CONFIG_II_, ext_clk_, v3) << R_GEN_CONFIG_II__ext_clk__BITNR) | \
+ (R_GEN_CONFIG_II__ser3__##f4_##_VAL(R_GEN_CONFIG_II_, ser3_, v4) << R_GEN_CONFIG_II__ser3__BITNR) | \
+ (R_GEN_CONFIG_II__ser2__##f5_##_VAL(R_GEN_CONFIG_II_, ser2_, v5) << R_GEN_CONFIG_II__ser2__BITNR) \
+)
+
+#endif
+
+/*
+ * R_IRQ_MASK0_CLR
+ * - type: WO
+ * - addr: 0xb00000c0
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_IRQ_MASK0_CLR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_IRQ_MASK0_CLR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_IRQ_MASK0_CLR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_IRQ_MASK0_CLR(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28,f29,v29,f30,v30,f31,v31) ( \
+ *R_IRQ_MASK0_CLR__SADDR = ( \
+ REG_INITIATED(R_IRQ_MASK0_CLR_) \
+ REG_VAL__R_IRQ_MASK0_CLR_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23,f24##_,v24,f25##_,v25,f26##_,v26,f27##_,v27,f28##_,v28,f29##_,v29,f30##_,v30,f31##_,v31) \
+ ), \
+ R_IRQ_MASK0_CLR__WRITE(R_IRQ_MASK0_CLR__ADDR, *R_IRQ_MASK0_CLR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_IRQ_MASK0_CLR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_IRQ_MASK0_CLR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_IRQ_MASK0_CLR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_IRQ_MASK0_CLR__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28,f29,v29,f30,v30,f31,v31) ( \
+ *R_IRQ_MASK0_CLR__SADDR = ( \
+ REG_INITIATED(R_IRQ_MASK0_CLR_) \
+ REG_VAL__R_IRQ_MASK0_CLR_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23,f24##_,v24,f25##_,v25,f26##_,v26,f27##_,v27,f28##_,v28,f29##_,v29,f30##_,v30,f31##_,v31) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_IRQ_MASK0_CLR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_IRQ_MASK0_CLR(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28,f29,v29,f30,v30,f31,v31) ( \
+ (R_IRQ_MASK0_CLR__nmi_pin__##f1##__MASK & REG__##v1) | \
+ (R_IRQ_MASK0_CLR__watchdog_nmi__##f2##__MASK & REG__##v2) | \
+ (R_IRQ_MASK0_CLR__sqe_test_error__##f3##__MASK & REG__##v3) | \
+ (R_IRQ_MASK0_CLR__carrier_loss__##f4##__MASK & REG__##v4) | \
+ (R_IRQ_MASK0_CLR__deferred__##f5##__MASK & REG__##v5) | \
+ (R_IRQ_MASK0_CLR__late_col__##f6##__MASK & REG__##v6) | \
+ (R_IRQ_MASK0_CLR__multiple_col__##f7##__MASK & REG__##v7) | \
+ (R_IRQ_MASK0_CLR__single_col__##f8##__MASK & REG__##v8) | \
+ (R_IRQ_MASK0_CLR__congestion__##f9##__MASK & REG__##v9) | \
+ (R_IRQ_MASK0_CLR__oversize__##f10##__MASK & REG__##v10) | \
+ (R_IRQ_MASK0_CLR__alignment_error__##f11##__MASK & REG__##v11) | \
+ (R_IRQ_MASK0_CLR__crc_error__##f12##__MASK & REG__##v12) | \
+ (R_IRQ_MASK0_CLR__overrun__##f13##__MASK & REG__##v13) | \
+ (R_IRQ_MASK0_CLR__underrun__##f14##__MASK & REG__##v14) | \
+ (R_IRQ_MASK0_CLR__excessive_col__##f15##__MASK & REG__##v15) | \
+ (R_IRQ_MASK0_CLR__mdio__##f16##__MASK & REG__##v16) | \
+ (R_IRQ_MASK0_CLR__ata_drq3__##f17##__MASK & REG__##v17) | \
+ (R_IRQ_MASK0_CLR__ata_drq2__##f18##__MASK & REG__##v18) | \
+ (R_IRQ_MASK0_CLR__ata_drq1__##f19##__MASK & REG__##v19) | \
+ (R_IRQ_MASK0_CLR__ata_drq0__##f20##__MASK & REG__##v20) | \
+ (R_IRQ_MASK0_CLR__par0_ecp_cmd__##f21##__MASK & REG__##v21) | \
+ (R_IRQ_MASK0_CLR__par0_peri__##f22##__MASK & REG__##v22) | \
+ (R_IRQ_MASK0_CLR__par0_data__##f23##__MASK & REG__##v23) | \
+ (R_IRQ_MASK0_CLR__par0_ready__##f24##__MASK & REG__##v24) | \
+ (R_IRQ_MASK0_CLR__ata_dmaend__##f25##__MASK & REG__##v25) | \
+ (R_IRQ_MASK0_CLR__irq_ext_vector_nr__##f26##__MASK & REG__##v26) | \
+ (R_IRQ_MASK0_CLR__irq_int_vector_nr__##f27##__MASK & REG__##v27) | \
+ (R_IRQ_MASK0_CLR__ext_dma1__##f28##__MASK & REG__##v28) | \
+ (R_IRQ_MASK0_CLR__ext_dma0__##f29##__MASK & REG__##v29) | \
+ (R_IRQ_MASK0_CLR__timer1__##f30##__MASK & REG__##v30) | \
+ (R_IRQ_MASK0_CLR__timer0__##f31##__MASK & REG__##v31) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_MASK0_CLR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_MASK0_CLR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_MASK0_CLR(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28,f29,v29,f30,v30,f31,v31) ( \
+ (R_IRQ_MASK0_CLR__nmi_pin__##f1##__VAL(R_IRQ_MASK0_CLR_, nmi_pin_, v1) << R_IRQ_MASK0_CLR__nmi_pin__BITNR) | \
+ (R_IRQ_MASK0_CLR__watchdog_nmi__##f2##__VAL(R_IRQ_MASK0_CLR_, watchdog_nmi_, v2) << R_IRQ_MASK0_CLR__watchdog_nmi__BITNR) | \
+ (R_IRQ_MASK0_CLR__sqe_test_error__##f3##__VAL(R_IRQ_MASK0_CLR_, sqe_test_error_, v3) << R_IRQ_MASK0_CLR__sqe_test_error__BITNR) | \
+ (R_IRQ_MASK0_CLR__carrier_loss__##f4##__VAL(R_IRQ_MASK0_CLR_, carrier_loss_, v4) << R_IRQ_MASK0_CLR__carrier_loss__BITNR) | \
+ (R_IRQ_MASK0_CLR__deferred__##f5##__VAL(R_IRQ_MASK0_CLR_, deferred_, v5) << R_IRQ_MASK0_CLR__deferred__BITNR) | \
+ (R_IRQ_MASK0_CLR__late_col__##f6##__VAL(R_IRQ_MASK0_CLR_, late_col_, v6) << R_IRQ_MASK0_CLR__late_col__BITNR) | \
+ (R_IRQ_MASK0_CLR__multiple_col__##f7##__VAL(R_IRQ_MASK0_CLR_, multiple_col_, v7) << R_IRQ_MASK0_CLR__multiple_col__BITNR) | \
+ (R_IRQ_MASK0_CLR__single_col__##f8##__VAL(R_IRQ_MASK0_CLR_, single_col_, v8) << R_IRQ_MASK0_CLR__single_col__BITNR) | \
+ (R_IRQ_MASK0_CLR__congestion__##f9##__VAL(R_IRQ_MASK0_CLR_, congestion_, v9) << R_IRQ_MASK0_CLR__congestion__BITNR) | \
+ (R_IRQ_MASK0_CLR__oversize__##f10##__VAL(R_IRQ_MASK0_CLR_, oversize_, v10) << R_IRQ_MASK0_CLR__oversize__BITNR) | \
+ (R_IRQ_MASK0_CLR__alignment_error__##f11##__VAL(R_IRQ_MASK0_CLR_, alignment_error_, v11) << R_IRQ_MASK0_CLR__alignment_error__BITNR) | \
+ (R_IRQ_MASK0_CLR__crc_error__##f12##__VAL(R_IRQ_MASK0_CLR_, crc_error_, v12) << R_IRQ_MASK0_CLR__crc_error__BITNR) | \
+ (R_IRQ_MASK0_CLR__overrun__##f13##__VAL(R_IRQ_MASK0_CLR_, overrun_, v13) << R_IRQ_MASK0_CLR__overrun__BITNR) | \
+ (R_IRQ_MASK0_CLR__underrun__##f14##__VAL(R_IRQ_MASK0_CLR_, underrun_, v14) << R_IRQ_MASK0_CLR__underrun__BITNR) | \
+ (R_IRQ_MASK0_CLR__excessive_col__##f15##__VAL(R_IRQ_MASK0_CLR_, excessive_col_, v15) << R_IRQ_MASK0_CLR__excessive_col__BITNR) | \
+ (R_IRQ_MASK0_CLR__mdio__##f16##__VAL(R_IRQ_MASK0_CLR_, mdio_, v16) << R_IRQ_MASK0_CLR__mdio__BITNR) | \
+ (R_IRQ_MASK0_CLR__ata_drq3__##f17##__VAL(R_IRQ_MASK0_CLR_, ata_drq3_, v17) << R_IRQ_MASK0_CLR__ata_drq3__BITNR) | \
+ (R_IRQ_MASK0_CLR__ata_drq2__##f18##__VAL(R_IRQ_MASK0_CLR_, ata_drq2_, v18) << R_IRQ_MASK0_CLR__ata_drq2__BITNR) | \
+ (R_IRQ_MASK0_CLR__ata_drq1__##f19##__VAL(R_IRQ_MASK0_CLR_, ata_drq1_, v19) << R_IRQ_MASK0_CLR__ata_drq1__BITNR) | \
+ (R_IRQ_MASK0_CLR__ata_drq0__##f20##__VAL(R_IRQ_MASK0_CLR_, ata_drq0_, v20) << R_IRQ_MASK0_CLR__ata_drq0__BITNR) | \
+ (R_IRQ_MASK0_CLR__par0_ecp_cmd__##f21##__VAL(R_IRQ_MASK0_CLR_, par0_ecp_cmd_, v21) << R_IRQ_MASK0_CLR__par0_ecp_cmd__BITNR) | \
+ (R_IRQ_MASK0_CLR__par0_peri__##f22##__VAL(R_IRQ_MASK0_CLR_, par0_peri_, v22) << R_IRQ_MASK0_CLR__par0_peri__BITNR) | \
+ (R_IRQ_MASK0_CLR__par0_data__##f23##__VAL(R_IRQ_MASK0_CLR_, par0_data_, v23) << R_IRQ_MASK0_CLR__par0_data__BITNR) | \
+ (R_IRQ_MASK0_CLR__par0_ready__##f24##__VAL(R_IRQ_MASK0_CLR_, par0_ready_, v24) << R_IRQ_MASK0_CLR__par0_ready__BITNR) | \
+ (R_IRQ_MASK0_CLR__ata_dmaend__##f25##__VAL(R_IRQ_MASK0_CLR_, ata_dmaend_, v25) << R_IRQ_MASK0_CLR__ata_dmaend__BITNR) | \
+ (R_IRQ_MASK0_CLR__irq_ext_vector_nr__##f26##__VAL(R_IRQ_MASK0_CLR_, irq_ext_vector_nr_, v26) << R_IRQ_MASK0_CLR__irq_ext_vector_nr__BITNR) | \
+ (R_IRQ_MASK0_CLR__irq_int_vector_nr__##f27##__VAL(R_IRQ_MASK0_CLR_, irq_int_vector_nr_, v27) << R_IRQ_MASK0_CLR__irq_int_vector_nr__BITNR) | \
+ (R_IRQ_MASK0_CLR__ext_dma1__##f28##__VAL(R_IRQ_MASK0_CLR_, ext_dma1_, v28) << R_IRQ_MASK0_CLR__ext_dma1__BITNR) | \
+ (R_IRQ_MASK0_CLR__ext_dma0__##f29##__VAL(R_IRQ_MASK0_CLR_, ext_dma0_, v29) << R_IRQ_MASK0_CLR__ext_dma0__BITNR) | \
+ (R_IRQ_MASK0_CLR__timer1__##f30##__VAL(R_IRQ_MASK0_CLR_, timer1_, v30) << R_IRQ_MASK0_CLR__timer1__BITNR) | \
+ (R_IRQ_MASK0_CLR__timer0__##f31##__VAL(R_IRQ_MASK0_CLR_, timer0_, v31) << R_IRQ_MASK0_CLR__timer0__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_MASK0_CLR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_MASK0_CLR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_MASK0_CLR_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19,f20_,v20,f21_,v21,f22_,v22,f23_,v23,f24_,v24,f25_,v25,f26_,v26,f27_,v27,f28_,v28,f29_,v29,f30_,v30,f31_,v31) ( \
+ (R_IRQ_MASK0_CLR__nmi_pin__##f1_##_VAL(R_IRQ_MASK0_CLR_, nmi_pin_, v1) << R_IRQ_MASK0_CLR__nmi_pin__BITNR) | \
+ (R_IRQ_MASK0_CLR__watchdog_nmi__##f2_##_VAL(R_IRQ_MASK0_CLR_, watchdog_nmi_, v2) << R_IRQ_MASK0_CLR__watchdog_nmi__BITNR) | \
+ (R_IRQ_MASK0_CLR__sqe_test_error__##f3_##_VAL(R_IRQ_MASK0_CLR_, sqe_test_error_, v3) << R_IRQ_MASK0_CLR__sqe_test_error__BITNR) | \
+ (R_IRQ_MASK0_CLR__carrier_loss__##f4_##_VAL(R_IRQ_MASK0_CLR_, carrier_loss_, v4) << R_IRQ_MASK0_CLR__carrier_loss__BITNR) | \
+ (R_IRQ_MASK0_CLR__deferred__##f5_##_VAL(R_IRQ_MASK0_CLR_, deferred_, v5) << R_IRQ_MASK0_CLR__deferred__BITNR) | \
+ (R_IRQ_MASK0_CLR__late_col__##f6_##_VAL(R_IRQ_MASK0_CLR_, late_col_, v6) << R_IRQ_MASK0_CLR__late_col__BITNR) | \
+ (R_IRQ_MASK0_CLR__multiple_col__##f7_##_VAL(R_IRQ_MASK0_CLR_, multiple_col_, v7) << R_IRQ_MASK0_CLR__multiple_col__BITNR) | \
+ (R_IRQ_MASK0_CLR__single_col__##f8_##_VAL(R_IRQ_MASK0_CLR_, single_col_, v8) << R_IRQ_MASK0_CLR__single_col__BITNR) | \
+ (R_IRQ_MASK0_CLR__congestion__##f9_##_VAL(R_IRQ_MASK0_CLR_, congestion_, v9) << R_IRQ_MASK0_CLR__congestion__BITNR) | \
+ (R_IRQ_MASK0_CLR__oversize__##f10_##_VAL(R_IRQ_MASK0_CLR_, oversize_, v10) << R_IRQ_MASK0_CLR__oversize__BITNR) | \
+ (R_IRQ_MASK0_CLR__alignment_error__##f11_##_VAL(R_IRQ_MASK0_CLR_, alignment_error_, v11) << R_IRQ_MASK0_CLR__alignment_error__BITNR) | \
+ (R_IRQ_MASK0_CLR__crc_error__##f12_##_VAL(R_IRQ_MASK0_CLR_, crc_error_, v12) << R_IRQ_MASK0_CLR__crc_error__BITNR) | \
+ (R_IRQ_MASK0_CLR__overrun__##f13_##_VAL(R_IRQ_MASK0_CLR_, overrun_, v13) << R_IRQ_MASK0_CLR__overrun__BITNR) | \
+ (R_IRQ_MASK0_CLR__underrun__##f14_##_VAL(R_IRQ_MASK0_CLR_, underrun_, v14) << R_IRQ_MASK0_CLR__underrun__BITNR) | \
+ (R_IRQ_MASK0_CLR__excessive_col__##f15_##_VAL(R_IRQ_MASK0_CLR_, excessive_col_, v15) << R_IRQ_MASK0_CLR__excessive_col__BITNR) | \
+ (R_IRQ_MASK0_CLR__mdio__##f16_##_VAL(R_IRQ_MASK0_CLR_, mdio_, v16) << R_IRQ_MASK0_CLR__mdio__BITNR) | \
+ (R_IRQ_MASK0_CLR__ata_drq3__##f17_##_VAL(R_IRQ_MASK0_CLR_, ata_drq3_, v17) << R_IRQ_MASK0_CLR__ata_drq3__BITNR) | \
+ (R_IRQ_MASK0_CLR__ata_drq2__##f18_##_VAL(R_IRQ_MASK0_CLR_, ata_drq2_, v18) << R_IRQ_MASK0_CLR__ata_drq2__BITNR) | \
+ (R_IRQ_MASK0_CLR__ata_drq1__##f19_##_VAL(R_IRQ_MASK0_CLR_, ata_drq1_, v19) << R_IRQ_MASK0_CLR__ata_drq1__BITNR) | \
+ (R_IRQ_MASK0_CLR__ata_drq0__##f20_##_VAL(R_IRQ_MASK0_CLR_, ata_drq0_, v20) << R_IRQ_MASK0_CLR__ata_drq0__BITNR) | \
+ (R_IRQ_MASK0_CLR__par0_ecp_cmd__##f21_##_VAL(R_IRQ_MASK0_CLR_, par0_ecp_cmd_, v21) << R_IRQ_MASK0_CLR__par0_ecp_cmd__BITNR) | \
+ (R_IRQ_MASK0_CLR__par0_peri__##f22_##_VAL(R_IRQ_MASK0_CLR_, par0_peri_, v22) << R_IRQ_MASK0_CLR__par0_peri__BITNR) | \
+ (R_IRQ_MASK0_CLR__par0_data__##f23_##_VAL(R_IRQ_MASK0_CLR_, par0_data_, v23) << R_IRQ_MASK0_CLR__par0_data__BITNR) | \
+ (R_IRQ_MASK0_CLR__par0_ready__##f24_##_VAL(R_IRQ_MASK0_CLR_, par0_ready_, v24) << R_IRQ_MASK0_CLR__par0_ready__BITNR) | \
+ (R_IRQ_MASK0_CLR__ata_dmaend__##f25_##_VAL(R_IRQ_MASK0_CLR_, ata_dmaend_, v25) << R_IRQ_MASK0_CLR__ata_dmaend__BITNR) | \
+ (R_IRQ_MASK0_CLR__irq_ext_vector_nr__##f26_##_VAL(R_IRQ_MASK0_CLR_, irq_ext_vector_nr_, v26) << R_IRQ_MASK0_CLR__irq_ext_vector_nr__BITNR) | \
+ (R_IRQ_MASK0_CLR__irq_int_vector_nr__##f27_##_VAL(R_IRQ_MASK0_CLR_, irq_int_vector_nr_, v27) << R_IRQ_MASK0_CLR__irq_int_vector_nr__BITNR) | \
+ (R_IRQ_MASK0_CLR__ext_dma1__##f28_##_VAL(R_IRQ_MASK0_CLR_, ext_dma1_, v28) << R_IRQ_MASK0_CLR__ext_dma1__BITNR) | \
+ (R_IRQ_MASK0_CLR__ext_dma0__##f29_##_VAL(R_IRQ_MASK0_CLR_, ext_dma0_, v29) << R_IRQ_MASK0_CLR__ext_dma0__BITNR) | \
+ (R_IRQ_MASK0_CLR__timer1__##f30_##_VAL(R_IRQ_MASK0_CLR_, timer1_, v30) << R_IRQ_MASK0_CLR__timer1__BITNR) | \
+ (R_IRQ_MASK0_CLR__timer0__##f31_##_VAL(R_IRQ_MASK0_CLR_, timer0_, v31) << R_IRQ_MASK0_CLR__timer0__BITNR) \
+)
+
+#endif
+
+/*
+ * R_IRQ_MASK0_RD
+ * - type: RO
+ * - addr: 0xb00000c0
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_IRQ_MASK0_RD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_IRQ_MASK0_RD(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28,f29,v29,f30,v30,f31,v31) ( \
+ (R_IRQ_MASK0_RD__nmi_pin__##f1##__MASK & REG__##v1) | \
+ (R_IRQ_MASK0_RD__watchdog_nmi__##f2##__MASK & REG__##v2) | \
+ (R_IRQ_MASK0_RD__sqe_test_error__##f3##__MASK & REG__##v3) | \
+ (R_IRQ_MASK0_RD__carrier_loss__##f4##__MASK & REG__##v4) | \
+ (R_IRQ_MASK0_RD__deferred__##f5##__MASK & REG__##v5) | \
+ (R_IRQ_MASK0_RD__late_col__##f6##__MASK & REG__##v6) | \
+ (R_IRQ_MASK0_RD__multiple_col__##f7##__MASK & REG__##v7) | \
+ (R_IRQ_MASK0_RD__single_col__##f8##__MASK & REG__##v8) | \
+ (R_IRQ_MASK0_RD__congestion__##f9##__MASK & REG__##v9) | \
+ (R_IRQ_MASK0_RD__oversize__##f10##__MASK & REG__##v10) | \
+ (R_IRQ_MASK0_RD__alignment_error__##f11##__MASK & REG__##v11) | \
+ (R_IRQ_MASK0_RD__crc_error__##f12##__MASK & REG__##v12) | \
+ (R_IRQ_MASK0_RD__overrun__##f13##__MASK & REG__##v13) | \
+ (R_IRQ_MASK0_RD__underrun__##f14##__MASK & REG__##v14) | \
+ (R_IRQ_MASK0_RD__excessive_col__##f15##__MASK & REG__##v15) | \
+ (R_IRQ_MASK0_RD__mdio__##f16##__MASK & REG__##v16) | \
+ (R_IRQ_MASK0_RD__ata_drq3__##f17##__MASK & REG__##v17) | \
+ (R_IRQ_MASK0_RD__ata_drq2__##f18##__MASK & REG__##v18) | \
+ (R_IRQ_MASK0_RD__ata_drq1__##f19##__MASK & REG__##v19) | \
+ (R_IRQ_MASK0_RD__ata_drq0__##f20##__MASK & REG__##v20) | \
+ (R_IRQ_MASK0_RD__par0_ecp_cmd__##f21##__MASK & REG__##v21) | \
+ (R_IRQ_MASK0_RD__par0_peri__##f22##__MASK & REG__##v22) | \
+ (R_IRQ_MASK0_RD__par0_data__##f23##__MASK & REG__##v23) | \
+ (R_IRQ_MASK0_RD__par0_ready__##f24##__MASK & REG__##v24) | \
+ (R_IRQ_MASK0_RD__ata_dmaend__##f25##__MASK & REG__##v25) | \
+ (R_IRQ_MASK0_RD__irq_ext_vector_nr__##f26##__MASK & REG__##v26) | \
+ (R_IRQ_MASK0_RD__irq_int_vector_nr__##f27##__MASK & REG__##v27) | \
+ (R_IRQ_MASK0_RD__ext_dma1__##f28##__MASK & REG__##v28) | \
+ (R_IRQ_MASK0_RD__ext_dma0__##f29##__MASK & REG__##v29) | \
+ (R_IRQ_MASK0_RD__timer1__##f30##__MASK & REG__##v30) | \
+ (R_IRQ_MASK0_RD__timer0__##f31##__MASK & REG__##v31) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_MASK0_RD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_MASK0_RD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_MASK0_RD(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28,f29,v29,f30,v30,f31,v31) ( \
+ (R_IRQ_MASK0_RD__nmi_pin__##f1##__VAL(R_IRQ_MASK0_RD_, nmi_pin_, v1) << R_IRQ_MASK0_RD__nmi_pin__BITNR) | \
+ (R_IRQ_MASK0_RD__watchdog_nmi__##f2##__VAL(R_IRQ_MASK0_RD_, watchdog_nmi_, v2) << R_IRQ_MASK0_RD__watchdog_nmi__BITNR) | \
+ (R_IRQ_MASK0_RD__sqe_test_error__##f3##__VAL(R_IRQ_MASK0_RD_, sqe_test_error_, v3) << R_IRQ_MASK0_RD__sqe_test_error__BITNR) | \
+ (R_IRQ_MASK0_RD__carrier_loss__##f4##__VAL(R_IRQ_MASK0_RD_, carrier_loss_, v4) << R_IRQ_MASK0_RD__carrier_loss__BITNR) | \
+ (R_IRQ_MASK0_RD__deferred__##f5##__VAL(R_IRQ_MASK0_RD_, deferred_, v5) << R_IRQ_MASK0_RD__deferred__BITNR) | \
+ (R_IRQ_MASK0_RD__late_col__##f6##__VAL(R_IRQ_MASK0_RD_, late_col_, v6) << R_IRQ_MASK0_RD__late_col__BITNR) | \
+ (R_IRQ_MASK0_RD__multiple_col__##f7##__VAL(R_IRQ_MASK0_RD_, multiple_col_, v7) << R_IRQ_MASK0_RD__multiple_col__BITNR) | \
+ (R_IRQ_MASK0_RD__single_col__##f8##__VAL(R_IRQ_MASK0_RD_, single_col_, v8) << R_IRQ_MASK0_RD__single_col__BITNR) | \
+ (R_IRQ_MASK0_RD__congestion__##f9##__VAL(R_IRQ_MASK0_RD_, congestion_, v9) << R_IRQ_MASK0_RD__congestion__BITNR) | \
+ (R_IRQ_MASK0_RD__oversize__##f10##__VAL(R_IRQ_MASK0_RD_, oversize_, v10) << R_IRQ_MASK0_RD__oversize__BITNR) | \
+ (R_IRQ_MASK0_RD__alignment_error__##f11##__VAL(R_IRQ_MASK0_RD_, alignment_error_, v11) << R_IRQ_MASK0_RD__alignment_error__BITNR) | \
+ (R_IRQ_MASK0_RD__crc_error__##f12##__VAL(R_IRQ_MASK0_RD_, crc_error_, v12) << R_IRQ_MASK0_RD__crc_error__BITNR) | \
+ (R_IRQ_MASK0_RD__overrun__##f13##__VAL(R_IRQ_MASK0_RD_, overrun_, v13) << R_IRQ_MASK0_RD__overrun__BITNR) | \
+ (R_IRQ_MASK0_RD__underrun__##f14##__VAL(R_IRQ_MASK0_RD_, underrun_, v14) << R_IRQ_MASK0_RD__underrun__BITNR) | \
+ (R_IRQ_MASK0_RD__excessive_col__##f15##__VAL(R_IRQ_MASK0_RD_, excessive_col_, v15) << R_IRQ_MASK0_RD__excessive_col__BITNR) | \
+ (R_IRQ_MASK0_RD__mdio__##f16##__VAL(R_IRQ_MASK0_RD_, mdio_, v16) << R_IRQ_MASK0_RD__mdio__BITNR) | \
+ (R_IRQ_MASK0_RD__ata_drq3__##f17##__VAL(R_IRQ_MASK0_RD_, ata_drq3_, v17) << R_IRQ_MASK0_RD__ata_drq3__BITNR) | \
+ (R_IRQ_MASK0_RD__ata_drq2__##f18##__VAL(R_IRQ_MASK0_RD_, ata_drq2_, v18) << R_IRQ_MASK0_RD__ata_drq2__BITNR) | \
+ (R_IRQ_MASK0_RD__ata_drq1__##f19##__VAL(R_IRQ_MASK0_RD_, ata_drq1_, v19) << R_IRQ_MASK0_RD__ata_drq1__BITNR) | \
+ (R_IRQ_MASK0_RD__ata_drq0__##f20##__VAL(R_IRQ_MASK0_RD_, ata_drq0_, v20) << R_IRQ_MASK0_RD__ata_drq0__BITNR) | \
+ (R_IRQ_MASK0_RD__par0_ecp_cmd__##f21##__VAL(R_IRQ_MASK0_RD_, par0_ecp_cmd_, v21) << R_IRQ_MASK0_RD__par0_ecp_cmd__BITNR) | \
+ (R_IRQ_MASK0_RD__par0_peri__##f22##__VAL(R_IRQ_MASK0_RD_, par0_peri_, v22) << R_IRQ_MASK0_RD__par0_peri__BITNR) | \
+ (R_IRQ_MASK0_RD__par0_data__##f23##__VAL(R_IRQ_MASK0_RD_, par0_data_, v23) << R_IRQ_MASK0_RD__par0_data__BITNR) | \
+ (R_IRQ_MASK0_RD__par0_ready__##f24##__VAL(R_IRQ_MASK0_RD_, par0_ready_, v24) << R_IRQ_MASK0_RD__par0_ready__BITNR) | \
+ (R_IRQ_MASK0_RD__ata_dmaend__##f25##__VAL(R_IRQ_MASK0_RD_, ata_dmaend_, v25) << R_IRQ_MASK0_RD__ata_dmaend__BITNR) | \
+ (R_IRQ_MASK0_RD__irq_ext_vector_nr__##f26##__VAL(R_IRQ_MASK0_RD_, irq_ext_vector_nr_, v26) << R_IRQ_MASK0_RD__irq_ext_vector_nr__BITNR) | \
+ (R_IRQ_MASK0_RD__irq_int_vector_nr__##f27##__VAL(R_IRQ_MASK0_RD_, irq_int_vector_nr_, v27) << R_IRQ_MASK0_RD__irq_int_vector_nr__BITNR) | \
+ (R_IRQ_MASK0_RD__ext_dma1__##f28##__VAL(R_IRQ_MASK0_RD_, ext_dma1_, v28) << R_IRQ_MASK0_RD__ext_dma1__BITNR) | \
+ (R_IRQ_MASK0_RD__ext_dma0__##f29##__VAL(R_IRQ_MASK0_RD_, ext_dma0_, v29) << R_IRQ_MASK0_RD__ext_dma0__BITNR) | \
+ (R_IRQ_MASK0_RD__timer1__##f30##__VAL(R_IRQ_MASK0_RD_, timer1_, v30) << R_IRQ_MASK0_RD__timer1__BITNR) | \
+ (R_IRQ_MASK0_RD__timer0__##f31##__VAL(R_IRQ_MASK0_RD_, timer0_, v31) << R_IRQ_MASK0_RD__timer0__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_MASK0_RD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_MASK0_RD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_MASK0_RD_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19,f20_,v20,f21_,v21,f22_,v22,f23_,v23,f24_,v24,f25_,v25,f26_,v26,f27_,v27,f28_,v28,f29_,v29,f30_,v30,f31_,v31) ( \
+ (R_IRQ_MASK0_RD__nmi_pin__##f1_##_VAL(R_IRQ_MASK0_RD_, nmi_pin_, v1) << R_IRQ_MASK0_RD__nmi_pin__BITNR) | \
+ (R_IRQ_MASK0_RD__watchdog_nmi__##f2_##_VAL(R_IRQ_MASK0_RD_, watchdog_nmi_, v2) << R_IRQ_MASK0_RD__watchdog_nmi__BITNR) | \
+ (R_IRQ_MASK0_RD__sqe_test_error__##f3_##_VAL(R_IRQ_MASK0_RD_, sqe_test_error_, v3) << R_IRQ_MASK0_RD__sqe_test_error__BITNR) | \
+ (R_IRQ_MASK0_RD__carrier_loss__##f4_##_VAL(R_IRQ_MASK0_RD_, carrier_loss_, v4) << R_IRQ_MASK0_RD__carrier_loss__BITNR) | \
+ (R_IRQ_MASK0_RD__deferred__##f5_##_VAL(R_IRQ_MASK0_RD_, deferred_, v5) << R_IRQ_MASK0_RD__deferred__BITNR) | \
+ (R_IRQ_MASK0_RD__late_col__##f6_##_VAL(R_IRQ_MASK0_RD_, late_col_, v6) << R_IRQ_MASK0_RD__late_col__BITNR) | \
+ (R_IRQ_MASK0_RD__multiple_col__##f7_##_VAL(R_IRQ_MASK0_RD_, multiple_col_, v7) << R_IRQ_MASK0_RD__multiple_col__BITNR) | \
+ (R_IRQ_MASK0_RD__single_col__##f8_##_VAL(R_IRQ_MASK0_RD_, single_col_, v8) << R_IRQ_MASK0_RD__single_col__BITNR) | \
+ (R_IRQ_MASK0_RD__congestion__##f9_##_VAL(R_IRQ_MASK0_RD_, congestion_, v9) << R_IRQ_MASK0_RD__congestion__BITNR) | \
+ (R_IRQ_MASK0_RD__oversize__##f10_##_VAL(R_IRQ_MASK0_RD_, oversize_, v10) << R_IRQ_MASK0_RD__oversize__BITNR) | \
+ (R_IRQ_MASK0_RD__alignment_error__##f11_##_VAL(R_IRQ_MASK0_RD_, alignment_error_, v11) << R_IRQ_MASK0_RD__alignment_error__BITNR) | \
+ (R_IRQ_MASK0_RD__crc_error__##f12_##_VAL(R_IRQ_MASK0_RD_, crc_error_, v12) << R_IRQ_MASK0_RD__crc_error__BITNR) | \
+ (R_IRQ_MASK0_RD__overrun__##f13_##_VAL(R_IRQ_MASK0_RD_, overrun_, v13) << R_IRQ_MASK0_RD__overrun__BITNR) | \
+ (R_IRQ_MASK0_RD__underrun__##f14_##_VAL(R_IRQ_MASK0_RD_, underrun_, v14) << R_IRQ_MASK0_RD__underrun__BITNR) | \
+ (R_IRQ_MASK0_RD__excessive_col__##f15_##_VAL(R_IRQ_MASK0_RD_, excessive_col_, v15) << R_IRQ_MASK0_RD__excessive_col__BITNR) | \
+ (R_IRQ_MASK0_RD__mdio__##f16_##_VAL(R_IRQ_MASK0_RD_, mdio_, v16) << R_IRQ_MASK0_RD__mdio__BITNR) | \
+ (R_IRQ_MASK0_RD__ata_drq3__##f17_##_VAL(R_IRQ_MASK0_RD_, ata_drq3_, v17) << R_IRQ_MASK0_RD__ata_drq3__BITNR) | \
+ (R_IRQ_MASK0_RD__ata_drq2__##f18_##_VAL(R_IRQ_MASK0_RD_, ata_drq2_, v18) << R_IRQ_MASK0_RD__ata_drq2__BITNR) | \
+ (R_IRQ_MASK0_RD__ata_drq1__##f19_##_VAL(R_IRQ_MASK0_RD_, ata_drq1_, v19) << R_IRQ_MASK0_RD__ata_drq1__BITNR) | \
+ (R_IRQ_MASK0_RD__ata_drq0__##f20_##_VAL(R_IRQ_MASK0_RD_, ata_drq0_, v20) << R_IRQ_MASK0_RD__ata_drq0__BITNR) | \
+ (R_IRQ_MASK0_RD__par0_ecp_cmd__##f21_##_VAL(R_IRQ_MASK0_RD_, par0_ecp_cmd_, v21) << R_IRQ_MASK0_RD__par0_ecp_cmd__BITNR) | \
+ (R_IRQ_MASK0_RD__par0_peri__##f22_##_VAL(R_IRQ_MASK0_RD_, par0_peri_, v22) << R_IRQ_MASK0_RD__par0_peri__BITNR) | \
+ (R_IRQ_MASK0_RD__par0_data__##f23_##_VAL(R_IRQ_MASK0_RD_, par0_data_, v23) << R_IRQ_MASK0_RD__par0_data__BITNR) | \
+ (R_IRQ_MASK0_RD__par0_ready__##f24_##_VAL(R_IRQ_MASK0_RD_, par0_ready_, v24) << R_IRQ_MASK0_RD__par0_ready__BITNR) | \
+ (R_IRQ_MASK0_RD__ata_dmaend__##f25_##_VAL(R_IRQ_MASK0_RD_, ata_dmaend_, v25) << R_IRQ_MASK0_RD__ata_dmaend__BITNR) | \
+ (R_IRQ_MASK0_RD__irq_ext_vector_nr__##f26_##_VAL(R_IRQ_MASK0_RD_, irq_ext_vector_nr_, v26) << R_IRQ_MASK0_RD__irq_ext_vector_nr__BITNR) | \
+ (R_IRQ_MASK0_RD__irq_int_vector_nr__##f27_##_VAL(R_IRQ_MASK0_RD_, irq_int_vector_nr_, v27) << R_IRQ_MASK0_RD__irq_int_vector_nr__BITNR) | \
+ (R_IRQ_MASK0_RD__ext_dma1__##f28_##_VAL(R_IRQ_MASK0_RD_, ext_dma1_, v28) << R_IRQ_MASK0_RD__ext_dma1__BITNR) | \
+ (R_IRQ_MASK0_RD__ext_dma0__##f29_##_VAL(R_IRQ_MASK0_RD_, ext_dma0_, v29) << R_IRQ_MASK0_RD__ext_dma0__BITNR) | \
+ (R_IRQ_MASK0_RD__timer1__##f30_##_VAL(R_IRQ_MASK0_RD_, timer1_, v30) << R_IRQ_MASK0_RD__timer1__BITNR) | \
+ (R_IRQ_MASK0_RD__timer0__##f31_##_VAL(R_IRQ_MASK0_RD_, timer0_, v31) << R_IRQ_MASK0_RD__timer0__BITNR) \
+)
+
+#endif
+
+/*
+ * R_IRQ_MASK0_SET
+ * - type: WO
+ * - addr: 0xb00000c4
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_IRQ_MASK0_SET
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_IRQ_MASK0_SET.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_IRQ_MASK0_SET.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_IRQ_MASK0_SET(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28,f29,v29,f30,v30,f31,v31) ( \
+ *R_IRQ_MASK0_SET__SADDR = ( \
+ REG_INITIATED(R_IRQ_MASK0_SET_) \
+ REG_VAL__R_IRQ_MASK0_SET_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23,f24##_,v24,f25##_,v25,f26##_,v26,f27##_,v27,f28##_,v28,f29##_,v29,f30##_,v30,f31##_,v31) \
+ ), \
+ R_IRQ_MASK0_SET__WRITE(R_IRQ_MASK0_SET__ADDR, *R_IRQ_MASK0_SET__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_IRQ_MASK0_SET__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_IRQ_MASK0_SET.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_IRQ_MASK0_SET.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_IRQ_MASK0_SET__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28,f29,v29,f30,v30,f31,v31) ( \
+ *R_IRQ_MASK0_SET__SADDR = ( \
+ REG_INITIATED(R_IRQ_MASK0_SET_) \
+ REG_VAL__R_IRQ_MASK0_SET_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23,f24##_,v24,f25##_,v25,f26##_,v26,f27##_,v27,f28##_,v28,f29##_,v29,f30##_,v30,f31##_,v31) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_IRQ_MASK0_SET
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_IRQ_MASK0_SET(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28,f29,v29,f30,v30,f31,v31) ( \
+ (R_IRQ_MASK0_SET__nmi_pin__##f1##__MASK & REG__##v1) | \
+ (R_IRQ_MASK0_SET__watchdog_nmi__##f2##__MASK & REG__##v2) | \
+ (R_IRQ_MASK0_SET__sqe_test_error__##f3##__MASK & REG__##v3) | \
+ (R_IRQ_MASK0_SET__carrier_loss__##f4##__MASK & REG__##v4) | \
+ (R_IRQ_MASK0_SET__deferred__##f5##__MASK & REG__##v5) | \
+ (R_IRQ_MASK0_SET__late_col__##f6##__MASK & REG__##v6) | \
+ (R_IRQ_MASK0_SET__multiple_col__##f7##__MASK & REG__##v7) | \
+ (R_IRQ_MASK0_SET__single_col__##f8##__MASK & REG__##v8) | \
+ (R_IRQ_MASK0_SET__congestion__##f9##__MASK & REG__##v9) | \
+ (R_IRQ_MASK0_SET__oversize__##f10##__MASK & REG__##v10) | \
+ (R_IRQ_MASK0_SET__alignment_error__##f11##__MASK & REG__##v11) | \
+ (R_IRQ_MASK0_SET__crc_error__##f12##__MASK & REG__##v12) | \
+ (R_IRQ_MASK0_SET__overrun__##f13##__MASK & REG__##v13) | \
+ (R_IRQ_MASK0_SET__underrun__##f14##__MASK & REG__##v14) | \
+ (R_IRQ_MASK0_SET__excessive_col__##f15##__MASK & REG__##v15) | \
+ (R_IRQ_MASK0_SET__mdio__##f16##__MASK & REG__##v16) | \
+ (R_IRQ_MASK0_SET__ata_drq3__##f17##__MASK & REG__##v17) | \
+ (R_IRQ_MASK0_SET__ata_drq2__##f18##__MASK & REG__##v18) | \
+ (R_IRQ_MASK0_SET__ata_drq1__##f19##__MASK & REG__##v19) | \
+ (R_IRQ_MASK0_SET__ata_drq0__##f20##__MASK & REG__##v20) | \
+ (R_IRQ_MASK0_SET__par0_ecp_cmd__##f21##__MASK & REG__##v21) | \
+ (R_IRQ_MASK0_SET__par0_peri__##f22##__MASK & REG__##v22) | \
+ (R_IRQ_MASK0_SET__par0_data__##f23##__MASK & REG__##v23) | \
+ (R_IRQ_MASK0_SET__par0_ready__##f24##__MASK & REG__##v24) | \
+ (R_IRQ_MASK0_SET__ata_dmaend__##f25##__MASK & REG__##v25) | \
+ (R_IRQ_MASK0_SET__irq_ext_vector_nr__##f26##__MASK & REG__##v26) | \
+ (R_IRQ_MASK0_SET__irq_int_vector_nr__##f27##__MASK & REG__##v27) | \
+ (R_IRQ_MASK0_SET__ext_dma1__##f28##__MASK & REG__##v28) | \
+ (R_IRQ_MASK0_SET__ext_dma0__##f29##__MASK & REG__##v29) | \
+ (R_IRQ_MASK0_SET__timer1__##f30##__MASK & REG__##v30) | \
+ (R_IRQ_MASK0_SET__timer0__##f31##__MASK & REG__##v31) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_MASK0_SET
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_MASK0_SET.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_MASK0_SET(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28,f29,v29,f30,v30,f31,v31) ( \
+ (R_IRQ_MASK0_SET__nmi_pin__##f1##__VAL(R_IRQ_MASK0_SET_, nmi_pin_, v1) << R_IRQ_MASK0_SET__nmi_pin__BITNR) | \
+ (R_IRQ_MASK0_SET__watchdog_nmi__##f2##__VAL(R_IRQ_MASK0_SET_, watchdog_nmi_, v2) << R_IRQ_MASK0_SET__watchdog_nmi__BITNR) | \
+ (R_IRQ_MASK0_SET__sqe_test_error__##f3##__VAL(R_IRQ_MASK0_SET_, sqe_test_error_, v3) << R_IRQ_MASK0_SET__sqe_test_error__BITNR) | \
+ (R_IRQ_MASK0_SET__carrier_loss__##f4##__VAL(R_IRQ_MASK0_SET_, carrier_loss_, v4) << R_IRQ_MASK0_SET__carrier_loss__BITNR) | \
+ (R_IRQ_MASK0_SET__deferred__##f5##__VAL(R_IRQ_MASK0_SET_, deferred_, v5) << R_IRQ_MASK0_SET__deferred__BITNR) | \
+ (R_IRQ_MASK0_SET__late_col__##f6##__VAL(R_IRQ_MASK0_SET_, late_col_, v6) << R_IRQ_MASK0_SET__late_col__BITNR) | \
+ (R_IRQ_MASK0_SET__multiple_col__##f7##__VAL(R_IRQ_MASK0_SET_, multiple_col_, v7) << R_IRQ_MASK0_SET__multiple_col__BITNR) | \
+ (R_IRQ_MASK0_SET__single_col__##f8##__VAL(R_IRQ_MASK0_SET_, single_col_, v8) << R_IRQ_MASK0_SET__single_col__BITNR) | \
+ (R_IRQ_MASK0_SET__congestion__##f9##__VAL(R_IRQ_MASK0_SET_, congestion_, v9) << R_IRQ_MASK0_SET__congestion__BITNR) | \
+ (R_IRQ_MASK0_SET__oversize__##f10##__VAL(R_IRQ_MASK0_SET_, oversize_, v10) << R_IRQ_MASK0_SET__oversize__BITNR) | \
+ (R_IRQ_MASK0_SET__alignment_error__##f11##__VAL(R_IRQ_MASK0_SET_, alignment_error_, v11) << R_IRQ_MASK0_SET__alignment_error__BITNR) | \
+ (R_IRQ_MASK0_SET__crc_error__##f12##__VAL(R_IRQ_MASK0_SET_, crc_error_, v12) << R_IRQ_MASK0_SET__crc_error__BITNR) | \
+ (R_IRQ_MASK0_SET__overrun__##f13##__VAL(R_IRQ_MASK0_SET_, overrun_, v13) << R_IRQ_MASK0_SET__overrun__BITNR) | \
+ (R_IRQ_MASK0_SET__underrun__##f14##__VAL(R_IRQ_MASK0_SET_, underrun_, v14) << R_IRQ_MASK0_SET__underrun__BITNR) | \
+ (R_IRQ_MASK0_SET__excessive_col__##f15##__VAL(R_IRQ_MASK0_SET_, excessive_col_, v15) << R_IRQ_MASK0_SET__excessive_col__BITNR) | \
+ (R_IRQ_MASK0_SET__mdio__##f16##__VAL(R_IRQ_MASK0_SET_, mdio_, v16) << R_IRQ_MASK0_SET__mdio__BITNR) | \
+ (R_IRQ_MASK0_SET__ata_drq3__##f17##__VAL(R_IRQ_MASK0_SET_, ata_drq3_, v17) << R_IRQ_MASK0_SET__ata_drq3__BITNR) | \
+ (R_IRQ_MASK0_SET__ata_drq2__##f18##__VAL(R_IRQ_MASK0_SET_, ata_drq2_, v18) << R_IRQ_MASK0_SET__ata_drq2__BITNR) | \
+ (R_IRQ_MASK0_SET__ata_drq1__##f19##__VAL(R_IRQ_MASK0_SET_, ata_drq1_, v19) << R_IRQ_MASK0_SET__ata_drq1__BITNR) | \
+ (R_IRQ_MASK0_SET__ata_drq0__##f20##__VAL(R_IRQ_MASK0_SET_, ata_drq0_, v20) << R_IRQ_MASK0_SET__ata_drq0__BITNR) | \
+ (R_IRQ_MASK0_SET__par0_ecp_cmd__##f21##__VAL(R_IRQ_MASK0_SET_, par0_ecp_cmd_, v21) << R_IRQ_MASK0_SET__par0_ecp_cmd__BITNR) | \
+ (R_IRQ_MASK0_SET__par0_peri__##f22##__VAL(R_IRQ_MASK0_SET_, par0_peri_, v22) << R_IRQ_MASK0_SET__par0_peri__BITNR) | \
+ (R_IRQ_MASK0_SET__par0_data__##f23##__VAL(R_IRQ_MASK0_SET_, par0_data_, v23) << R_IRQ_MASK0_SET__par0_data__BITNR) | \
+ (R_IRQ_MASK0_SET__par0_ready__##f24##__VAL(R_IRQ_MASK0_SET_, par0_ready_, v24) << R_IRQ_MASK0_SET__par0_ready__BITNR) | \
+ (R_IRQ_MASK0_SET__ata_dmaend__##f25##__VAL(R_IRQ_MASK0_SET_, ata_dmaend_, v25) << R_IRQ_MASK0_SET__ata_dmaend__BITNR) | \
+ (R_IRQ_MASK0_SET__irq_ext_vector_nr__##f26##__VAL(R_IRQ_MASK0_SET_, irq_ext_vector_nr_, v26) << R_IRQ_MASK0_SET__irq_ext_vector_nr__BITNR) | \
+ (R_IRQ_MASK0_SET__irq_int_vector_nr__##f27##__VAL(R_IRQ_MASK0_SET_, irq_int_vector_nr_, v27) << R_IRQ_MASK0_SET__irq_int_vector_nr__BITNR) | \
+ (R_IRQ_MASK0_SET__ext_dma1__##f28##__VAL(R_IRQ_MASK0_SET_, ext_dma1_, v28) << R_IRQ_MASK0_SET__ext_dma1__BITNR) | \
+ (R_IRQ_MASK0_SET__ext_dma0__##f29##__VAL(R_IRQ_MASK0_SET_, ext_dma0_, v29) << R_IRQ_MASK0_SET__ext_dma0__BITNR) | \
+ (R_IRQ_MASK0_SET__timer1__##f30##__VAL(R_IRQ_MASK0_SET_, timer1_, v30) << R_IRQ_MASK0_SET__timer1__BITNR) | \
+ (R_IRQ_MASK0_SET__timer0__##f31##__VAL(R_IRQ_MASK0_SET_, timer0_, v31) << R_IRQ_MASK0_SET__timer0__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_MASK0_SET_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_MASK0_SET.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_MASK0_SET_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19,f20_,v20,f21_,v21,f22_,v22,f23_,v23,f24_,v24,f25_,v25,f26_,v26,f27_,v27,f28_,v28,f29_,v29,f30_,v30,f31_,v31) ( \
+ (R_IRQ_MASK0_SET__nmi_pin__##f1_##_VAL(R_IRQ_MASK0_SET_, nmi_pin_, v1) << R_IRQ_MASK0_SET__nmi_pin__BITNR) | \
+ (R_IRQ_MASK0_SET__watchdog_nmi__##f2_##_VAL(R_IRQ_MASK0_SET_, watchdog_nmi_, v2) << R_IRQ_MASK0_SET__watchdog_nmi__BITNR) | \
+ (R_IRQ_MASK0_SET__sqe_test_error__##f3_##_VAL(R_IRQ_MASK0_SET_, sqe_test_error_, v3) << R_IRQ_MASK0_SET__sqe_test_error__BITNR) | \
+ (R_IRQ_MASK0_SET__carrier_loss__##f4_##_VAL(R_IRQ_MASK0_SET_, carrier_loss_, v4) << R_IRQ_MASK0_SET__carrier_loss__BITNR) | \
+ (R_IRQ_MASK0_SET__deferred__##f5_##_VAL(R_IRQ_MASK0_SET_, deferred_, v5) << R_IRQ_MASK0_SET__deferred__BITNR) | \
+ (R_IRQ_MASK0_SET__late_col__##f6_##_VAL(R_IRQ_MASK0_SET_, late_col_, v6) << R_IRQ_MASK0_SET__late_col__BITNR) | \
+ (R_IRQ_MASK0_SET__multiple_col__##f7_##_VAL(R_IRQ_MASK0_SET_, multiple_col_, v7) << R_IRQ_MASK0_SET__multiple_col__BITNR) | \
+ (R_IRQ_MASK0_SET__single_col__##f8_##_VAL(R_IRQ_MASK0_SET_, single_col_, v8) << R_IRQ_MASK0_SET__single_col__BITNR) | \
+ (R_IRQ_MASK0_SET__congestion__##f9_##_VAL(R_IRQ_MASK0_SET_, congestion_, v9) << R_IRQ_MASK0_SET__congestion__BITNR) | \
+ (R_IRQ_MASK0_SET__oversize__##f10_##_VAL(R_IRQ_MASK0_SET_, oversize_, v10) << R_IRQ_MASK0_SET__oversize__BITNR) | \
+ (R_IRQ_MASK0_SET__alignment_error__##f11_##_VAL(R_IRQ_MASK0_SET_, alignment_error_, v11) << R_IRQ_MASK0_SET__alignment_error__BITNR) | \
+ (R_IRQ_MASK0_SET__crc_error__##f12_##_VAL(R_IRQ_MASK0_SET_, crc_error_, v12) << R_IRQ_MASK0_SET__crc_error__BITNR) | \
+ (R_IRQ_MASK0_SET__overrun__##f13_##_VAL(R_IRQ_MASK0_SET_, overrun_, v13) << R_IRQ_MASK0_SET__overrun__BITNR) | \
+ (R_IRQ_MASK0_SET__underrun__##f14_##_VAL(R_IRQ_MASK0_SET_, underrun_, v14) << R_IRQ_MASK0_SET__underrun__BITNR) | \
+ (R_IRQ_MASK0_SET__excessive_col__##f15_##_VAL(R_IRQ_MASK0_SET_, excessive_col_, v15) << R_IRQ_MASK0_SET__excessive_col__BITNR) | \
+ (R_IRQ_MASK0_SET__mdio__##f16_##_VAL(R_IRQ_MASK0_SET_, mdio_, v16) << R_IRQ_MASK0_SET__mdio__BITNR) | \
+ (R_IRQ_MASK0_SET__ata_drq3__##f17_##_VAL(R_IRQ_MASK0_SET_, ata_drq3_, v17) << R_IRQ_MASK0_SET__ata_drq3__BITNR) | \
+ (R_IRQ_MASK0_SET__ata_drq2__##f18_##_VAL(R_IRQ_MASK0_SET_, ata_drq2_, v18) << R_IRQ_MASK0_SET__ata_drq2__BITNR) | \
+ (R_IRQ_MASK0_SET__ata_drq1__##f19_##_VAL(R_IRQ_MASK0_SET_, ata_drq1_, v19) << R_IRQ_MASK0_SET__ata_drq1__BITNR) | \
+ (R_IRQ_MASK0_SET__ata_drq0__##f20_##_VAL(R_IRQ_MASK0_SET_, ata_drq0_, v20) << R_IRQ_MASK0_SET__ata_drq0__BITNR) | \
+ (R_IRQ_MASK0_SET__par0_ecp_cmd__##f21_##_VAL(R_IRQ_MASK0_SET_, par0_ecp_cmd_, v21) << R_IRQ_MASK0_SET__par0_ecp_cmd__BITNR) | \
+ (R_IRQ_MASK0_SET__par0_peri__##f22_##_VAL(R_IRQ_MASK0_SET_, par0_peri_, v22) << R_IRQ_MASK0_SET__par0_peri__BITNR) | \
+ (R_IRQ_MASK0_SET__par0_data__##f23_##_VAL(R_IRQ_MASK0_SET_, par0_data_, v23) << R_IRQ_MASK0_SET__par0_data__BITNR) | \
+ (R_IRQ_MASK0_SET__par0_ready__##f24_##_VAL(R_IRQ_MASK0_SET_, par0_ready_, v24) << R_IRQ_MASK0_SET__par0_ready__BITNR) | \
+ (R_IRQ_MASK0_SET__ata_dmaend__##f25_##_VAL(R_IRQ_MASK0_SET_, ata_dmaend_, v25) << R_IRQ_MASK0_SET__ata_dmaend__BITNR) | \
+ (R_IRQ_MASK0_SET__irq_ext_vector_nr__##f26_##_VAL(R_IRQ_MASK0_SET_, irq_ext_vector_nr_, v26) << R_IRQ_MASK0_SET__irq_ext_vector_nr__BITNR) | \
+ (R_IRQ_MASK0_SET__irq_int_vector_nr__##f27_##_VAL(R_IRQ_MASK0_SET_, irq_int_vector_nr_, v27) << R_IRQ_MASK0_SET__irq_int_vector_nr__BITNR) | \
+ (R_IRQ_MASK0_SET__ext_dma1__##f28_##_VAL(R_IRQ_MASK0_SET_, ext_dma1_, v28) << R_IRQ_MASK0_SET__ext_dma1__BITNR) | \
+ (R_IRQ_MASK0_SET__ext_dma0__##f29_##_VAL(R_IRQ_MASK0_SET_, ext_dma0_, v29) << R_IRQ_MASK0_SET__ext_dma0__BITNR) | \
+ (R_IRQ_MASK0_SET__timer1__##f30_##_VAL(R_IRQ_MASK0_SET_, timer1_, v30) << R_IRQ_MASK0_SET__timer1__BITNR) | \
+ (R_IRQ_MASK0_SET__timer0__##f31_##_VAL(R_IRQ_MASK0_SET_, timer0_, v31) << R_IRQ_MASK0_SET__timer0__BITNR) \
+)
+
+#endif
+
+/*
+ * R_IRQ_MASK1_CLR
+ * - type: WO
+ * - addr: 0xb00000c8
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_IRQ_MASK1_CLR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_IRQ_MASK1_CLR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_IRQ_MASK1_CLR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_IRQ_MASK1_CLR(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28) ( \
+ *R_IRQ_MASK1_CLR__SADDR = ( \
+ REG_INITIATED(R_IRQ_MASK1_CLR_) \
+ REG_VAL__R_IRQ_MASK1_CLR_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23,f24##_,v24,f25##_,v25,f26##_,v26,f27##_,v27,f28##_,v28) \
+ ), \
+ R_IRQ_MASK1_CLR__WRITE(R_IRQ_MASK1_CLR__ADDR, *R_IRQ_MASK1_CLR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_IRQ_MASK1_CLR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_IRQ_MASK1_CLR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_IRQ_MASK1_CLR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_IRQ_MASK1_CLR__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28) ( \
+ *R_IRQ_MASK1_CLR__SADDR = ( \
+ REG_INITIATED(R_IRQ_MASK1_CLR_) \
+ REG_VAL__R_IRQ_MASK1_CLR_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23,f24##_,v24,f25##_,v25,f26##_,v26,f27##_,v27,f28##_,v28) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_IRQ_MASK1_CLR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_IRQ_MASK1_CLR(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28) ( \
+ (R_IRQ_MASK1_CLR__sw_int7__##f1##__MASK & REG__##v1) | \
+ (R_IRQ_MASK1_CLR__sw_int6__##f2##__MASK & REG__##v2) | \
+ (R_IRQ_MASK1_CLR__sw_int5__##f3##__MASK & REG__##v3) | \
+ (R_IRQ_MASK1_CLR__sw_int4__##f4##__MASK & REG__##v4) | \
+ (R_IRQ_MASK1_CLR__sw_int3__##f5##__MASK & REG__##v5) | \
+ (R_IRQ_MASK1_CLR__sw_int2__##f6##__MASK & REG__##v6) | \
+ (R_IRQ_MASK1_CLR__sw_int1__##f7##__MASK & REG__##v7) | \
+ (R_IRQ_MASK1_CLR__sw_int0__##f8##__MASK & REG__##v8) | \
+ (R_IRQ_MASK1_CLR__par1_ecp_cmd__##f9##__MASK & REG__##v9) | \
+ (R_IRQ_MASK1_CLR__par1_peri__##f10##__MASK & REG__##v10) | \
+ (R_IRQ_MASK1_CLR__par1_data__##f11##__MASK & REG__##v11) | \
+ (R_IRQ_MASK1_CLR__par1_ready__##f12##__MASK & REG__##v12) | \
+ (R_IRQ_MASK1_CLR__ser3_ready__##f13##__MASK & REG__##v13) | \
+ (R_IRQ_MASK1_CLR__ser3_data__##f14##__MASK & REG__##v14) | \
+ (R_IRQ_MASK1_CLR__ser2_ready__##f15##__MASK & REG__##v15) | \
+ (R_IRQ_MASK1_CLR__ser2_data__##f16##__MASK & REG__##v16) | \
+ (R_IRQ_MASK1_CLR__ser1_ready__##f17##__MASK & REG__##v17) | \
+ (R_IRQ_MASK1_CLR__ser1_data__##f18##__MASK & REG__##v18) | \
+ (R_IRQ_MASK1_CLR__ser0_ready__##f19##__MASK & REG__##v19) | \
+ (R_IRQ_MASK1_CLR__ser0_data__##f20##__MASK & REG__##v20) | \
+ (R_IRQ_MASK1_CLR__pa7__##f21##__MASK & REG__##v21) | \
+ (R_IRQ_MASK1_CLR__pa6__##f22##__MASK & REG__##v22) | \
+ (R_IRQ_MASK1_CLR__pa5__##f23##__MASK & REG__##v23) | \
+ (R_IRQ_MASK1_CLR__pa4__##f24##__MASK & REG__##v24) | \
+ (R_IRQ_MASK1_CLR__pa3__##f25##__MASK & REG__##v25) | \
+ (R_IRQ_MASK1_CLR__pa2__##f26##__MASK & REG__##v26) | \
+ (R_IRQ_MASK1_CLR__pa1__##f27##__MASK & REG__##v27) | \
+ (R_IRQ_MASK1_CLR__pa0__##f28##__MASK & REG__##v28) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_MASK1_CLR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_MASK1_CLR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_MASK1_CLR(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28) ( \
+ (R_IRQ_MASK1_CLR__sw_int7__##f1##__VAL(R_IRQ_MASK1_CLR_, sw_int7_, v1) << R_IRQ_MASK1_CLR__sw_int7__BITNR) | \
+ (R_IRQ_MASK1_CLR__sw_int6__##f2##__VAL(R_IRQ_MASK1_CLR_, sw_int6_, v2) << R_IRQ_MASK1_CLR__sw_int6__BITNR) | \
+ (R_IRQ_MASK1_CLR__sw_int5__##f3##__VAL(R_IRQ_MASK1_CLR_, sw_int5_, v3) << R_IRQ_MASK1_CLR__sw_int5__BITNR) | \
+ (R_IRQ_MASK1_CLR__sw_int4__##f4##__VAL(R_IRQ_MASK1_CLR_, sw_int4_, v4) << R_IRQ_MASK1_CLR__sw_int4__BITNR) | \
+ (R_IRQ_MASK1_CLR__sw_int3__##f5##__VAL(R_IRQ_MASK1_CLR_, sw_int3_, v5) << R_IRQ_MASK1_CLR__sw_int3__BITNR) | \
+ (R_IRQ_MASK1_CLR__sw_int2__##f6##__VAL(R_IRQ_MASK1_CLR_, sw_int2_, v6) << R_IRQ_MASK1_CLR__sw_int2__BITNR) | \
+ (R_IRQ_MASK1_CLR__sw_int1__##f7##__VAL(R_IRQ_MASK1_CLR_, sw_int1_, v7) << R_IRQ_MASK1_CLR__sw_int1__BITNR) | \
+ (R_IRQ_MASK1_CLR__sw_int0__##f8##__VAL(R_IRQ_MASK1_CLR_, sw_int0_, v8) << R_IRQ_MASK1_CLR__sw_int0__BITNR) | \
+ (R_IRQ_MASK1_CLR__par1_ecp_cmd__##f9##__VAL(R_IRQ_MASK1_CLR_, par1_ecp_cmd_, v9) << R_IRQ_MASK1_CLR__par1_ecp_cmd__BITNR) | \
+ (R_IRQ_MASK1_CLR__par1_peri__##f10##__VAL(R_IRQ_MASK1_CLR_, par1_peri_, v10) << R_IRQ_MASK1_CLR__par1_peri__BITNR) | \
+ (R_IRQ_MASK1_CLR__par1_data__##f11##__VAL(R_IRQ_MASK1_CLR_, par1_data_, v11) << R_IRQ_MASK1_CLR__par1_data__BITNR) | \
+ (R_IRQ_MASK1_CLR__par1_ready__##f12##__VAL(R_IRQ_MASK1_CLR_, par1_ready_, v12) << R_IRQ_MASK1_CLR__par1_ready__BITNR) | \
+ (R_IRQ_MASK1_CLR__ser3_ready__##f13##__VAL(R_IRQ_MASK1_CLR_, ser3_ready_, v13) << R_IRQ_MASK1_CLR__ser3_ready__BITNR) | \
+ (R_IRQ_MASK1_CLR__ser3_data__##f14##__VAL(R_IRQ_MASK1_CLR_, ser3_data_, v14) << R_IRQ_MASK1_CLR__ser3_data__BITNR) | \
+ (R_IRQ_MASK1_CLR__ser2_ready__##f15##__VAL(R_IRQ_MASK1_CLR_, ser2_ready_, v15) << R_IRQ_MASK1_CLR__ser2_ready__BITNR) | \
+ (R_IRQ_MASK1_CLR__ser2_data__##f16##__VAL(R_IRQ_MASK1_CLR_, ser2_data_, v16) << R_IRQ_MASK1_CLR__ser2_data__BITNR) | \
+ (R_IRQ_MASK1_CLR__ser1_ready__##f17##__VAL(R_IRQ_MASK1_CLR_, ser1_ready_, v17) << R_IRQ_MASK1_CLR__ser1_ready__BITNR) | \
+ (R_IRQ_MASK1_CLR__ser1_data__##f18##__VAL(R_IRQ_MASK1_CLR_, ser1_data_, v18) << R_IRQ_MASK1_CLR__ser1_data__BITNR) | \
+ (R_IRQ_MASK1_CLR__ser0_ready__##f19##__VAL(R_IRQ_MASK1_CLR_, ser0_ready_, v19) << R_IRQ_MASK1_CLR__ser0_ready__BITNR) | \
+ (R_IRQ_MASK1_CLR__ser0_data__##f20##__VAL(R_IRQ_MASK1_CLR_, ser0_data_, v20) << R_IRQ_MASK1_CLR__ser0_data__BITNR) | \
+ (R_IRQ_MASK1_CLR__pa7__##f21##__VAL(R_IRQ_MASK1_CLR_, pa7_, v21) << R_IRQ_MASK1_CLR__pa7__BITNR) | \
+ (R_IRQ_MASK1_CLR__pa6__##f22##__VAL(R_IRQ_MASK1_CLR_, pa6_, v22) << R_IRQ_MASK1_CLR__pa6__BITNR) | \
+ (R_IRQ_MASK1_CLR__pa5__##f23##__VAL(R_IRQ_MASK1_CLR_, pa5_, v23) << R_IRQ_MASK1_CLR__pa5__BITNR) | \
+ (R_IRQ_MASK1_CLR__pa4__##f24##__VAL(R_IRQ_MASK1_CLR_, pa4_, v24) << R_IRQ_MASK1_CLR__pa4__BITNR) | \
+ (R_IRQ_MASK1_CLR__pa3__##f25##__VAL(R_IRQ_MASK1_CLR_, pa3_, v25) << R_IRQ_MASK1_CLR__pa3__BITNR) | \
+ (R_IRQ_MASK1_CLR__pa2__##f26##__VAL(R_IRQ_MASK1_CLR_, pa2_, v26) << R_IRQ_MASK1_CLR__pa2__BITNR) | \
+ (R_IRQ_MASK1_CLR__pa1__##f27##__VAL(R_IRQ_MASK1_CLR_, pa1_, v27) << R_IRQ_MASK1_CLR__pa1__BITNR) | \
+ (R_IRQ_MASK1_CLR__pa0__##f28##__VAL(R_IRQ_MASK1_CLR_, pa0_, v28) << R_IRQ_MASK1_CLR__pa0__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_MASK1_CLR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_MASK1_CLR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_MASK1_CLR_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19,f20_,v20,f21_,v21,f22_,v22,f23_,v23,f24_,v24,f25_,v25,f26_,v26,f27_,v27,f28_,v28) ( \
+ (R_IRQ_MASK1_CLR__sw_int7__##f1_##_VAL(R_IRQ_MASK1_CLR_, sw_int7_, v1) << R_IRQ_MASK1_CLR__sw_int7__BITNR) | \
+ (R_IRQ_MASK1_CLR__sw_int6__##f2_##_VAL(R_IRQ_MASK1_CLR_, sw_int6_, v2) << R_IRQ_MASK1_CLR__sw_int6__BITNR) | \
+ (R_IRQ_MASK1_CLR__sw_int5__##f3_##_VAL(R_IRQ_MASK1_CLR_, sw_int5_, v3) << R_IRQ_MASK1_CLR__sw_int5__BITNR) | \
+ (R_IRQ_MASK1_CLR__sw_int4__##f4_##_VAL(R_IRQ_MASK1_CLR_, sw_int4_, v4) << R_IRQ_MASK1_CLR__sw_int4__BITNR) | \
+ (R_IRQ_MASK1_CLR__sw_int3__##f5_##_VAL(R_IRQ_MASK1_CLR_, sw_int3_, v5) << R_IRQ_MASK1_CLR__sw_int3__BITNR) | \
+ (R_IRQ_MASK1_CLR__sw_int2__##f6_##_VAL(R_IRQ_MASK1_CLR_, sw_int2_, v6) << R_IRQ_MASK1_CLR__sw_int2__BITNR) | \
+ (R_IRQ_MASK1_CLR__sw_int1__##f7_##_VAL(R_IRQ_MASK1_CLR_, sw_int1_, v7) << R_IRQ_MASK1_CLR__sw_int1__BITNR) | \
+ (R_IRQ_MASK1_CLR__sw_int0__##f8_##_VAL(R_IRQ_MASK1_CLR_, sw_int0_, v8) << R_IRQ_MASK1_CLR__sw_int0__BITNR) | \
+ (R_IRQ_MASK1_CLR__par1_ecp_cmd__##f9_##_VAL(R_IRQ_MASK1_CLR_, par1_ecp_cmd_, v9) << R_IRQ_MASK1_CLR__par1_ecp_cmd__BITNR) | \
+ (R_IRQ_MASK1_CLR__par1_peri__##f10_##_VAL(R_IRQ_MASK1_CLR_, par1_peri_, v10) << R_IRQ_MASK1_CLR__par1_peri__BITNR) | \
+ (R_IRQ_MASK1_CLR__par1_data__##f11_##_VAL(R_IRQ_MASK1_CLR_, par1_data_, v11) << R_IRQ_MASK1_CLR__par1_data__BITNR) | \
+ (R_IRQ_MASK1_CLR__par1_ready__##f12_##_VAL(R_IRQ_MASK1_CLR_, par1_ready_, v12) << R_IRQ_MASK1_CLR__par1_ready__BITNR) | \
+ (R_IRQ_MASK1_CLR__ser3_ready__##f13_##_VAL(R_IRQ_MASK1_CLR_, ser3_ready_, v13) << R_IRQ_MASK1_CLR__ser3_ready__BITNR) | \
+ (R_IRQ_MASK1_CLR__ser3_data__##f14_##_VAL(R_IRQ_MASK1_CLR_, ser3_data_, v14) << R_IRQ_MASK1_CLR__ser3_data__BITNR) | \
+ (R_IRQ_MASK1_CLR__ser2_ready__##f15_##_VAL(R_IRQ_MASK1_CLR_, ser2_ready_, v15) << R_IRQ_MASK1_CLR__ser2_ready__BITNR) | \
+ (R_IRQ_MASK1_CLR__ser2_data__##f16_##_VAL(R_IRQ_MASK1_CLR_, ser2_data_, v16) << R_IRQ_MASK1_CLR__ser2_data__BITNR) | \
+ (R_IRQ_MASK1_CLR__ser1_ready__##f17_##_VAL(R_IRQ_MASK1_CLR_, ser1_ready_, v17) << R_IRQ_MASK1_CLR__ser1_ready__BITNR) | \
+ (R_IRQ_MASK1_CLR__ser1_data__##f18_##_VAL(R_IRQ_MASK1_CLR_, ser1_data_, v18) << R_IRQ_MASK1_CLR__ser1_data__BITNR) | \
+ (R_IRQ_MASK1_CLR__ser0_ready__##f19_##_VAL(R_IRQ_MASK1_CLR_, ser0_ready_, v19) << R_IRQ_MASK1_CLR__ser0_ready__BITNR) | \
+ (R_IRQ_MASK1_CLR__ser0_data__##f20_##_VAL(R_IRQ_MASK1_CLR_, ser0_data_, v20) << R_IRQ_MASK1_CLR__ser0_data__BITNR) | \
+ (R_IRQ_MASK1_CLR__pa7__##f21_##_VAL(R_IRQ_MASK1_CLR_, pa7_, v21) << R_IRQ_MASK1_CLR__pa7__BITNR) | \
+ (R_IRQ_MASK1_CLR__pa6__##f22_##_VAL(R_IRQ_MASK1_CLR_, pa6_, v22) << R_IRQ_MASK1_CLR__pa6__BITNR) | \
+ (R_IRQ_MASK1_CLR__pa5__##f23_##_VAL(R_IRQ_MASK1_CLR_, pa5_, v23) << R_IRQ_MASK1_CLR__pa5__BITNR) | \
+ (R_IRQ_MASK1_CLR__pa4__##f24_##_VAL(R_IRQ_MASK1_CLR_, pa4_, v24) << R_IRQ_MASK1_CLR__pa4__BITNR) | \
+ (R_IRQ_MASK1_CLR__pa3__##f25_##_VAL(R_IRQ_MASK1_CLR_, pa3_, v25) << R_IRQ_MASK1_CLR__pa3__BITNR) | \
+ (R_IRQ_MASK1_CLR__pa2__##f26_##_VAL(R_IRQ_MASK1_CLR_, pa2_, v26) << R_IRQ_MASK1_CLR__pa2__BITNR) | \
+ (R_IRQ_MASK1_CLR__pa1__##f27_##_VAL(R_IRQ_MASK1_CLR_, pa1_, v27) << R_IRQ_MASK1_CLR__pa1__BITNR) | \
+ (R_IRQ_MASK1_CLR__pa0__##f28_##_VAL(R_IRQ_MASK1_CLR_, pa0_, v28) << R_IRQ_MASK1_CLR__pa0__BITNR) \
+)
+
+#endif
+
+/*
+ * R_IRQ_MASK1_RD
+ * - type: RO
+ * - addr: 0xb00000c8
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_IRQ_MASK1_RD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_IRQ_MASK1_RD(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28) ( \
+ (R_IRQ_MASK1_RD__sw_int7__##f1##__MASK & REG__##v1) | \
+ (R_IRQ_MASK1_RD__sw_int6__##f2##__MASK & REG__##v2) | \
+ (R_IRQ_MASK1_RD__sw_int5__##f3##__MASK & REG__##v3) | \
+ (R_IRQ_MASK1_RD__sw_int4__##f4##__MASK & REG__##v4) | \
+ (R_IRQ_MASK1_RD__sw_int3__##f5##__MASK & REG__##v5) | \
+ (R_IRQ_MASK1_RD__sw_int2__##f6##__MASK & REG__##v6) | \
+ (R_IRQ_MASK1_RD__sw_int1__##f7##__MASK & REG__##v7) | \
+ (R_IRQ_MASK1_RD__sw_int0__##f8##__MASK & REG__##v8) | \
+ (R_IRQ_MASK1_RD__par1_ecp_cmd__##f9##__MASK & REG__##v9) | \
+ (R_IRQ_MASK1_RD__par1_peri__##f10##__MASK & REG__##v10) | \
+ (R_IRQ_MASK1_RD__par1_data__##f11##__MASK & REG__##v11) | \
+ (R_IRQ_MASK1_RD__par1_ready__##f12##__MASK & REG__##v12) | \
+ (R_IRQ_MASK1_RD__ser3_ready__##f13##__MASK & REG__##v13) | \
+ (R_IRQ_MASK1_RD__ser3_data__##f14##__MASK & REG__##v14) | \
+ (R_IRQ_MASK1_RD__ser2_ready__##f15##__MASK & REG__##v15) | \
+ (R_IRQ_MASK1_RD__ser2_data__##f16##__MASK & REG__##v16) | \
+ (R_IRQ_MASK1_RD__ser1_ready__##f17##__MASK & REG__##v17) | \
+ (R_IRQ_MASK1_RD__ser1_data__##f18##__MASK & REG__##v18) | \
+ (R_IRQ_MASK1_RD__ser0_ready__##f19##__MASK & REG__##v19) | \
+ (R_IRQ_MASK1_RD__ser0_data__##f20##__MASK & REG__##v20) | \
+ (R_IRQ_MASK1_RD__pa7__##f21##__MASK & REG__##v21) | \
+ (R_IRQ_MASK1_RD__pa6__##f22##__MASK & REG__##v22) | \
+ (R_IRQ_MASK1_RD__pa5__##f23##__MASK & REG__##v23) | \
+ (R_IRQ_MASK1_RD__pa4__##f24##__MASK & REG__##v24) | \
+ (R_IRQ_MASK1_RD__pa3__##f25##__MASK & REG__##v25) | \
+ (R_IRQ_MASK1_RD__pa2__##f26##__MASK & REG__##v26) | \
+ (R_IRQ_MASK1_RD__pa1__##f27##__MASK & REG__##v27) | \
+ (R_IRQ_MASK1_RD__pa0__##f28##__MASK & REG__##v28) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_MASK1_RD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_MASK1_RD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_MASK1_RD(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28) ( \
+ (R_IRQ_MASK1_RD__sw_int7__##f1##__VAL(R_IRQ_MASK1_RD_, sw_int7_, v1) << R_IRQ_MASK1_RD__sw_int7__BITNR) | \
+ (R_IRQ_MASK1_RD__sw_int6__##f2##__VAL(R_IRQ_MASK1_RD_, sw_int6_, v2) << R_IRQ_MASK1_RD__sw_int6__BITNR) | \
+ (R_IRQ_MASK1_RD__sw_int5__##f3##__VAL(R_IRQ_MASK1_RD_, sw_int5_, v3) << R_IRQ_MASK1_RD__sw_int5__BITNR) | \
+ (R_IRQ_MASK1_RD__sw_int4__##f4##__VAL(R_IRQ_MASK1_RD_, sw_int4_, v4) << R_IRQ_MASK1_RD__sw_int4__BITNR) | \
+ (R_IRQ_MASK1_RD__sw_int3__##f5##__VAL(R_IRQ_MASK1_RD_, sw_int3_, v5) << R_IRQ_MASK1_RD__sw_int3__BITNR) | \
+ (R_IRQ_MASK1_RD__sw_int2__##f6##__VAL(R_IRQ_MASK1_RD_, sw_int2_, v6) << R_IRQ_MASK1_RD__sw_int2__BITNR) | \
+ (R_IRQ_MASK1_RD__sw_int1__##f7##__VAL(R_IRQ_MASK1_RD_, sw_int1_, v7) << R_IRQ_MASK1_RD__sw_int1__BITNR) | \
+ (R_IRQ_MASK1_RD__sw_int0__##f8##__VAL(R_IRQ_MASK1_RD_, sw_int0_, v8) << R_IRQ_MASK1_RD__sw_int0__BITNR) | \
+ (R_IRQ_MASK1_RD__par1_ecp_cmd__##f9##__VAL(R_IRQ_MASK1_RD_, par1_ecp_cmd_, v9) << R_IRQ_MASK1_RD__par1_ecp_cmd__BITNR) | \
+ (R_IRQ_MASK1_RD__par1_peri__##f10##__VAL(R_IRQ_MASK1_RD_, par1_peri_, v10) << R_IRQ_MASK1_RD__par1_peri__BITNR) | \
+ (R_IRQ_MASK1_RD__par1_data__##f11##__VAL(R_IRQ_MASK1_RD_, par1_data_, v11) << R_IRQ_MASK1_RD__par1_data__BITNR) | \
+ (R_IRQ_MASK1_RD__par1_ready__##f12##__VAL(R_IRQ_MASK1_RD_, par1_ready_, v12) << R_IRQ_MASK1_RD__par1_ready__BITNR) | \
+ (R_IRQ_MASK1_RD__ser3_ready__##f13##__VAL(R_IRQ_MASK1_RD_, ser3_ready_, v13) << R_IRQ_MASK1_RD__ser3_ready__BITNR) | \
+ (R_IRQ_MASK1_RD__ser3_data__##f14##__VAL(R_IRQ_MASK1_RD_, ser3_data_, v14) << R_IRQ_MASK1_RD__ser3_data__BITNR) | \
+ (R_IRQ_MASK1_RD__ser2_ready__##f15##__VAL(R_IRQ_MASK1_RD_, ser2_ready_, v15) << R_IRQ_MASK1_RD__ser2_ready__BITNR) | \
+ (R_IRQ_MASK1_RD__ser2_data__##f16##__VAL(R_IRQ_MASK1_RD_, ser2_data_, v16) << R_IRQ_MASK1_RD__ser2_data__BITNR) | \
+ (R_IRQ_MASK1_RD__ser1_ready__##f17##__VAL(R_IRQ_MASK1_RD_, ser1_ready_, v17) << R_IRQ_MASK1_RD__ser1_ready__BITNR) | \
+ (R_IRQ_MASK1_RD__ser1_data__##f18##__VAL(R_IRQ_MASK1_RD_, ser1_data_, v18) << R_IRQ_MASK1_RD__ser1_data__BITNR) | \
+ (R_IRQ_MASK1_RD__ser0_ready__##f19##__VAL(R_IRQ_MASK1_RD_, ser0_ready_, v19) << R_IRQ_MASK1_RD__ser0_ready__BITNR) | \
+ (R_IRQ_MASK1_RD__ser0_data__##f20##__VAL(R_IRQ_MASK1_RD_, ser0_data_, v20) << R_IRQ_MASK1_RD__ser0_data__BITNR) | \
+ (R_IRQ_MASK1_RD__pa7__##f21##__VAL(R_IRQ_MASK1_RD_, pa7_, v21) << R_IRQ_MASK1_RD__pa7__BITNR) | \
+ (R_IRQ_MASK1_RD__pa6__##f22##__VAL(R_IRQ_MASK1_RD_, pa6_, v22) << R_IRQ_MASK1_RD__pa6__BITNR) | \
+ (R_IRQ_MASK1_RD__pa5__##f23##__VAL(R_IRQ_MASK1_RD_, pa5_, v23) << R_IRQ_MASK1_RD__pa5__BITNR) | \
+ (R_IRQ_MASK1_RD__pa4__##f24##__VAL(R_IRQ_MASK1_RD_, pa4_, v24) << R_IRQ_MASK1_RD__pa4__BITNR) | \
+ (R_IRQ_MASK1_RD__pa3__##f25##__VAL(R_IRQ_MASK1_RD_, pa3_, v25) << R_IRQ_MASK1_RD__pa3__BITNR) | \
+ (R_IRQ_MASK1_RD__pa2__##f26##__VAL(R_IRQ_MASK1_RD_, pa2_, v26) << R_IRQ_MASK1_RD__pa2__BITNR) | \
+ (R_IRQ_MASK1_RD__pa1__##f27##__VAL(R_IRQ_MASK1_RD_, pa1_, v27) << R_IRQ_MASK1_RD__pa1__BITNR) | \
+ (R_IRQ_MASK1_RD__pa0__##f28##__VAL(R_IRQ_MASK1_RD_, pa0_, v28) << R_IRQ_MASK1_RD__pa0__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_MASK1_RD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_MASK1_RD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_MASK1_RD_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19,f20_,v20,f21_,v21,f22_,v22,f23_,v23,f24_,v24,f25_,v25,f26_,v26,f27_,v27,f28_,v28) ( \
+ (R_IRQ_MASK1_RD__sw_int7__##f1_##_VAL(R_IRQ_MASK1_RD_, sw_int7_, v1) << R_IRQ_MASK1_RD__sw_int7__BITNR) | \
+ (R_IRQ_MASK1_RD__sw_int6__##f2_##_VAL(R_IRQ_MASK1_RD_, sw_int6_, v2) << R_IRQ_MASK1_RD__sw_int6__BITNR) | \
+ (R_IRQ_MASK1_RD__sw_int5__##f3_##_VAL(R_IRQ_MASK1_RD_, sw_int5_, v3) << R_IRQ_MASK1_RD__sw_int5__BITNR) | \
+ (R_IRQ_MASK1_RD__sw_int4__##f4_##_VAL(R_IRQ_MASK1_RD_, sw_int4_, v4) << R_IRQ_MASK1_RD__sw_int4__BITNR) | \
+ (R_IRQ_MASK1_RD__sw_int3__##f5_##_VAL(R_IRQ_MASK1_RD_, sw_int3_, v5) << R_IRQ_MASK1_RD__sw_int3__BITNR) | \
+ (R_IRQ_MASK1_RD__sw_int2__##f6_##_VAL(R_IRQ_MASK1_RD_, sw_int2_, v6) << R_IRQ_MASK1_RD__sw_int2__BITNR) | \
+ (R_IRQ_MASK1_RD__sw_int1__##f7_##_VAL(R_IRQ_MASK1_RD_, sw_int1_, v7) << R_IRQ_MASK1_RD__sw_int1__BITNR) | \
+ (R_IRQ_MASK1_RD__sw_int0__##f8_##_VAL(R_IRQ_MASK1_RD_, sw_int0_, v8) << R_IRQ_MASK1_RD__sw_int0__BITNR) | \
+ (R_IRQ_MASK1_RD__par1_ecp_cmd__##f9_##_VAL(R_IRQ_MASK1_RD_, par1_ecp_cmd_, v9) << R_IRQ_MASK1_RD__par1_ecp_cmd__BITNR) | \
+ (R_IRQ_MASK1_RD__par1_peri__##f10_##_VAL(R_IRQ_MASK1_RD_, par1_peri_, v10) << R_IRQ_MASK1_RD__par1_peri__BITNR) | \
+ (R_IRQ_MASK1_RD__par1_data__##f11_##_VAL(R_IRQ_MASK1_RD_, par1_data_, v11) << R_IRQ_MASK1_RD__par1_data__BITNR) | \
+ (R_IRQ_MASK1_RD__par1_ready__##f12_##_VAL(R_IRQ_MASK1_RD_, par1_ready_, v12) << R_IRQ_MASK1_RD__par1_ready__BITNR) | \
+ (R_IRQ_MASK1_RD__ser3_ready__##f13_##_VAL(R_IRQ_MASK1_RD_, ser3_ready_, v13) << R_IRQ_MASK1_RD__ser3_ready__BITNR) | \
+ (R_IRQ_MASK1_RD__ser3_data__##f14_##_VAL(R_IRQ_MASK1_RD_, ser3_data_, v14) << R_IRQ_MASK1_RD__ser3_data__BITNR) | \
+ (R_IRQ_MASK1_RD__ser2_ready__##f15_##_VAL(R_IRQ_MASK1_RD_, ser2_ready_, v15) << R_IRQ_MASK1_RD__ser2_ready__BITNR) | \
+ (R_IRQ_MASK1_RD__ser2_data__##f16_##_VAL(R_IRQ_MASK1_RD_, ser2_data_, v16) << R_IRQ_MASK1_RD__ser2_data__BITNR) | \
+ (R_IRQ_MASK1_RD__ser1_ready__##f17_##_VAL(R_IRQ_MASK1_RD_, ser1_ready_, v17) << R_IRQ_MASK1_RD__ser1_ready__BITNR) | \
+ (R_IRQ_MASK1_RD__ser1_data__##f18_##_VAL(R_IRQ_MASK1_RD_, ser1_data_, v18) << R_IRQ_MASK1_RD__ser1_data__BITNR) | \
+ (R_IRQ_MASK1_RD__ser0_ready__##f19_##_VAL(R_IRQ_MASK1_RD_, ser0_ready_, v19) << R_IRQ_MASK1_RD__ser0_ready__BITNR) | \
+ (R_IRQ_MASK1_RD__ser0_data__##f20_##_VAL(R_IRQ_MASK1_RD_, ser0_data_, v20) << R_IRQ_MASK1_RD__ser0_data__BITNR) | \
+ (R_IRQ_MASK1_RD__pa7__##f21_##_VAL(R_IRQ_MASK1_RD_, pa7_, v21) << R_IRQ_MASK1_RD__pa7__BITNR) | \
+ (R_IRQ_MASK1_RD__pa6__##f22_##_VAL(R_IRQ_MASK1_RD_, pa6_, v22) << R_IRQ_MASK1_RD__pa6__BITNR) | \
+ (R_IRQ_MASK1_RD__pa5__##f23_##_VAL(R_IRQ_MASK1_RD_, pa5_, v23) << R_IRQ_MASK1_RD__pa5__BITNR) | \
+ (R_IRQ_MASK1_RD__pa4__##f24_##_VAL(R_IRQ_MASK1_RD_, pa4_, v24) << R_IRQ_MASK1_RD__pa4__BITNR) | \
+ (R_IRQ_MASK1_RD__pa3__##f25_##_VAL(R_IRQ_MASK1_RD_, pa3_, v25) << R_IRQ_MASK1_RD__pa3__BITNR) | \
+ (R_IRQ_MASK1_RD__pa2__##f26_##_VAL(R_IRQ_MASK1_RD_, pa2_, v26) << R_IRQ_MASK1_RD__pa2__BITNR) | \
+ (R_IRQ_MASK1_RD__pa1__##f27_##_VAL(R_IRQ_MASK1_RD_, pa1_, v27) << R_IRQ_MASK1_RD__pa1__BITNR) | \
+ (R_IRQ_MASK1_RD__pa0__##f28_##_VAL(R_IRQ_MASK1_RD_, pa0_, v28) << R_IRQ_MASK1_RD__pa0__BITNR) \
+)
+
+#endif
+
+/*
+ * R_IRQ_MASK1_SET
+ * - type: WO
+ * - addr: 0xb00000cc
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_IRQ_MASK1_SET
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_IRQ_MASK1_SET.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_IRQ_MASK1_SET.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_IRQ_MASK1_SET(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28) ( \
+ *R_IRQ_MASK1_SET__SADDR = ( \
+ REG_INITIATED(R_IRQ_MASK1_SET_) \
+ REG_VAL__R_IRQ_MASK1_SET_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23,f24##_,v24,f25##_,v25,f26##_,v26,f27##_,v27,f28##_,v28) \
+ ), \
+ R_IRQ_MASK1_SET__WRITE(R_IRQ_MASK1_SET__ADDR, *R_IRQ_MASK1_SET__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_IRQ_MASK1_SET__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_IRQ_MASK1_SET.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_IRQ_MASK1_SET.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_IRQ_MASK1_SET__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28) ( \
+ *R_IRQ_MASK1_SET__SADDR = ( \
+ REG_INITIATED(R_IRQ_MASK1_SET_) \
+ REG_VAL__R_IRQ_MASK1_SET_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23,f24##_,v24,f25##_,v25,f26##_,v26,f27##_,v27,f28##_,v28) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_IRQ_MASK1_SET
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_IRQ_MASK1_SET(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28) ( \
+ (R_IRQ_MASK1_SET__sw_int7__##f1##__MASK & REG__##v1) | \
+ (R_IRQ_MASK1_SET__sw_int6__##f2##__MASK & REG__##v2) | \
+ (R_IRQ_MASK1_SET__sw_int5__##f3##__MASK & REG__##v3) | \
+ (R_IRQ_MASK1_SET__sw_int4__##f4##__MASK & REG__##v4) | \
+ (R_IRQ_MASK1_SET__sw_int3__##f5##__MASK & REG__##v5) | \
+ (R_IRQ_MASK1_SET__sw_int2__##f6##__MASK & REG__##v6) | \
+ (R_IRQ_MASK1_SET__sw_int1__##f7##__MASK & REG__##v7) | \
+ (R_IRQ_MASK1_SET__sw_int0__##f8##__MASK & REG__##v8) | \
+ (R_IRQ_MASK1_SET__par1_ecp_cmd__##f9##__MASK & REG__##v9) | \
+ (R_IRQ_MASK1_SET__par1_peri__##f10##__MASK & REG__##v10) | \
+ (R_IRQ_MASK1_SET__par1_data__##f11##__MASK & REG__##v11) | \
+ (R_IRQ_MASK1_SET__par1_ready__##f12##__MASK & REG__##v12) | \
+ (R_IRQ_MASK1_SET__ser3_ready__##f13##__MASK & REG__##v13) | \
+ (R_IRQ_MASK1_SET__ser3_data__##f14##__MASK & REG__##v14) | \
+ (R_IRQ_MASK1_SET__ser2_ready__##f15##__MASK & REG__##v15) | \
+ (R_IRQ_MASK1_SET__ser2_data__##f16##__MASK & REG__##v16) | \
+ (R_IRQ_MASK1_SET__ser1_ready__##f17##__MASK & REG__##v17) | \
+ (R_IRQ_MASK1_SET__ser1_data__##f18##__MASK & REG__##v18) | \
+ (R_IRQ_MASK1_SET__ser0_ready__##f19##__MASK & REG__##v19) | \
+ (R_IRQ_MASK1_SET__ser0_data__##f20##__MASK & REG__##v20) | \
+ (R_IRQ_MASK1_SET__pa7__##f21##__MASK & REG__##v21) | \
+ (R_IRQ_MASK1_SET__pa6__##f22##__MASK & REG__##v22) | \
+ (R_IRQ_MASK1_SET__pa5__##f23##__MASK & REG__##v23) | \
+ (R_IRQ_MASK1_SET__pa4__##f24##__MASK & REG__##v24) | \
+ (R_IRQ_MASK1_SET__pa3__##f25##__MASK & REG__##v25) | \
+ (R_IRQ_MASK1_SET__pa2__##f26##__MASK & REG__##v26) | \
+ (R_IRQ_MASK1_SET__pa1__##f27##__MASK & REG__##v27) | \
+ (R_IRQ_MASK1_SET__pa0__##f28##__MASK & REG__##v28) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_MASK1_SET
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_MASK1_SET.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_MASK1_SET(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28) ( \
+ (R_IRQ_MASK1_SET__sw_int7__##f1##__VAL(R_IRQ_MASK1_SET_, sw_int7_, v1) << R_IRQ_MASK1_SET__sw_int7__BITNR) | \
+ (R_IRQ_MASK1_SET__sw_int6__##f2##__VAL(R_IRQ_MASK1_SET_, sw_int6_, v2) << R_IRQ_MASK1_SET__sw_int6__BITNR) | \
+ (R_IRQ_MASK1_SET__sw_int5__##f3##__VAL(R_IRQ_MASK1_SET_, sw_int5_, v3) << R_IRQ_MASK1_SET__sw_int5__BITNR) | \
+ (R_IRQ_MASK1_SET__sw_int4__##f4##__VAL(R_IRQ_MASK1_SET_, sw_int4_, v4) << R_IRQ_MASK1_SET__sw_int4__BITNR) | \
+ (R_IRQ_MASK1_SET__sw_int3__##f5##__VAL(R_IRQ_MASK1_SET_, sw_int3_, v5) << R_IRQ_MASK1_SET__sw_int3__BITNR) | \
+ (R_IRQ_MASK1_SET__sw_int2__##f6##__VAL(R_IRQ_MASK1_SET_, sw_int2_, v6) << R_IRQ_MASK1_SET__sw_int2__BITNR) | \
+ (R_IRQ_MASK1_SET__sw_int1__##f7##__VAL(R_IRQ_MASK1_SET_, sw_int1_, v7) << R_IRQ_MASK1_SET__sw_int1__BITNR) | \
+ (R_IRQ_MASK1_SET__sw_int0__##f8##__VAL(R_IRQ_MASK1_SET_, sw_int0_, v8) << R_IRQ_MASK1_SET__sw_int0__BITNR) | \
+ (R_IRQ_MASK1_SET__par1_ecp_cmd__##f9##__VAL(R_IRQ_MASK1_SET_, par1_ecp_cmd_, v9) << R_IRQ_MASK1_SET__par1_ecp_cmd__BITNR) | \
+ (R_IRQ_MASK1_SET__par1_peri__##f10##__VAL(R_IRQ_MASK1_SET_, par1_peri_, v10) << R_IRQ_MASK1_SET__par1_peri__BITNR) | \
+ (R_IRQ_MASK1_SET__par1_data__##f11##__VAL(R_IRQ_MASK1_SET_, par1_data_, v11) << R_IRQ_MASK1_SET__par1_data__BITNR) | \
+ (R_IRQ_MASK1_SET__par1_ready__##f12##__VAL(R_IRQ_MASK1_SET_, par1_ready_, v12) << R_IRQ_MASK1_SET__par1_ready__BITNR) | \
+ (R_IRQ_MASK1_SET__ser3_ready__##f13##__VAL(R_IRQ_MASK1_SET_, ser3_ready_, v13) << R_IRQ_MASK1_SET__ser3_ready__BITNR) | \
+ (R_IRQ_MASK1_SET__ser3_data__##f14##__VAL(R_IRQ_MASK1_SET_, ser3_data_, v14) << R_IRQ_MASK1_SET__ser3_data__BITNR) | \
+ (R_IRQ_MASK1_SET__ser2_ready__##f15##__VAL(R_IRQ_MASK1_SET_, ser2_ready_, v15) << R_IRQ_MASK1_SET__ser2_ready__BITNR) | \
+ (R_IRQ_MASK1_SET__ser2_data__##f16##__VAL(R_IRQ_MASK1_SET_, ser2_data_, v16) << R_IRQ_MASK1_SET__ser2_data__BITNR) | \
+ (R_IRQ_MASK1_SET__ser1_ready__##f17##__VAL(R_IRQ_MASK1_SET_, ser1_ready_, v17) << R_IRQ_MASK1_SET__ser1_ready__BITNR) | \
+ (R_IRQ_MASK1_SET__ser1_data__##f18##__VAL(R_IRQ_MASK1_SET_, ser1_data_, v18) << R_IRQ_MASK1_SET__ser1_data__BITNR) | \
+ (R_IRQ_MASK1_SET__ser0_ready__##f19##__VAL(R_IRQ_MASK1_SET_, ser0_ready_, v19) << R_IRQ_MASK1_SET__ser0_ready__BITNR) | \
+ (R_IRQ_MASK1_SET__ser0_data__##f20##__VAL(R_IRQ_MASK1_SET_, ser0_data_, v20) << R_IRQ_MASK1_SET__ser0_data__BITNR) | \
+ (R_IRQ_MASK1_SET__pa7__##f21##__VAL(R_IRQ_MASK1_SET_, pa7_, v21) << R_IRQ_MASK1_SET__pa7__BITNR) | \
+ (R_IRQ_MASK1_SET__pa6__##f22##__VAL(R_IRQ_MASK1_SET_, pa6_, v22) << R_IRQ_MASK1_SET__pa6__BITNR) | \
+ (R_IRQ_MASK1_SET__pa5__##f23##__VAL(R_IRQ_MASK1_SET_, pa5_, v23) << R_IRQ_MASK1_SET__pa5__BITNR) | \
+ (R_IRQ_MASK1_SET__pa4__##f24##__VAL(R_IRQ_MASK1_SET_, pa4_, v24) << R_IRQ_MASK1_SET__pa4__BITNR) | \
+ (R_IRQ_MASK1_SET__pa3__##f25##__VAL(R_IRQ_MASK1_SET_, pa3_, v25) << R_IRQ_MASK1_SET__pa3__BITNR) | \
+ (R_IRQ_MASK1_SET__pa2__##f26##__VAL(R_IRQ_MASK1_SET_, pa2_, v26) << R_IRQ_MASK1_SET__pa2__BITNR) | \
+ (R_IRQ_MASK1_SET__pa1__##f27##__VAL(R_IRQ_MASK1_SET_, pa1_, v27) << R_IRQ_MASK1_SET__pa1__BITNR) | \
+ (R_IRQ_MASK1_SET__pa0__##f28##__VAL(R_IRQ_MASK1_SET_, pa0_, v28) << R_IRQ_MASK1_SET__pa0__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_MASK1_SET_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_MASK1_SET.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_MASK1_SET_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19,f20_,v20,f21_,v21,f22_,v22,f23_,v23,f24_,v24,f25_,v25,f26_,v26,f27_,v27,f28_,v28) ( \
+ (R_IRQ_MASK1_SET__sw_int7__##f1_##_VAL(R_IRQ_MASK1_SET_, sw_int7_, v1) << R_IRQ_MASK1_SET__sw_int7__BITNR) | \
+ (R_IRQ_MASK1_SET__sw_int6__##f2_##_VAL(R_IRQ_MASK1_SET_, sw_int6_, v2) << R_IRQ_MASK1_SET__sw_int6__BITNR) | \
+ (R_IRQ_MASK1_SET__sw_int5__##f3_##_VAL(R_IRQ_MASK1_SET_, sw_int5_, v3) << R_IRQ_MASK1_SET__sw_int5__BITNR) | \
+ (R_IRQ_MASK1_SET__sw_int4__##f4_##_VAL(R_IRQ_MASK1_SET_, sw_int4_, v4) << R_IRQ_MASK1_SET__sw_int4__BITNR) | \
+ (R_IRQ_MASK1_SET__sw_int3__##f5_##_VAL(R_IRQ_MASK1_SET_, sw_int3_, v5) << R_IRQ_MASK1_SET__sw_int3__BITNR) | \
+ (R_IRQ_MASK1_SET__sw_int2__##f6_##_VAL(R_IRQ_MASK1_SET_, sw_int2_, v6) << R_IRQ_MASK1_SET__sw_int2__BITNR) | \
+ (R_IRQ_MASK1_SET__sw_int1__##f7_##_VAL(R_IRQ_MASK1_SET_, sw_int1_, v7) << R_IRQ_MASK1_SET__sw_int1__BITNR) | \
+ (R_IRQ_MASK1_SET__sw_int0__##f8_##_VAL(R_IRQ_MASK1_SET_, sw_int0_, v8) << R_IRQ_MASK1_SET__sw_int0__BITNR) | \
+ (R_IRQ_MASK1_SET__par1_ecp_cmd__##f9_##_VAL(R_IRQ_MASK1_SET_, par1_ecp_cmd_, v9) << R_IRQ_MASK1_SET__par1_ecp_cmd__BITNR) | \
+ (R_IRQ_MASK1_SET__par1_peri__##f10_##_VAL(R_IRQ_MASK1_SET_, par1_peri_, v10) << R_IRQ_MASK1_SET__par1_peri__BITNR) | \
+ (R_IRQ_MASK1_SET__par1_data__##f11_##_VAL(R_IRQ_MASK1_SET_, par1_data_, v11) << R_IRQ_MASK1_SET__par1_data__BITNR) | \
+ (R_IRQ_MASK1_SET__par1_ready__##f12_##_VAL(R_IRQ_MASK1_SET_, par1_ready_, v12) << R_IRQ_MASK1_SET__par1_ready__BITNR) | \
+ (R_IRQ_MASK1_SET__ser3_ready__##f13_##_VAL(R_IRQ_MASK1_SET_, ser3_ready_, v13) << R_IRQ_MASK1_SET__ser3_ready__BITNR) | \
+ (R_IRQ_MASK1_SET__ser3_data__##f14_##_VAL(R_IRQ_MASK1_SET_, ser3_data_, v14) << R_IRQ_MASK1_SET__ser3_data__BITNR) | \
+ (R_IRQ_MASK1_SET__ser2_ready__##f15_##_VAL(R_IRQ_MASK1_SET_, ser2_ready_, v15) << R_IRQ_MASK1_SET__ser2_ready__BITNR) | \
+ (R_IRQ_MASK1_SET__ser2_data__##f16_##_VAL(R_IRQ_MASK1_SET_, ser2_data_, v16) << R_IRQ_MASK1_SET__ser2_data__BITNR) | \
+ (R_IRQ_MASK1_SET__ser1_ready__##f17_##_VAL(R_IRQ_MASK1_SET_, ser1_ready_, v17) << R_IRQ_MASK1_SET__ser1_ready__BITNR) | \
+ (R_IRQ_MASK1_SET__ser1_data__##f18_##_VAL(R_IRQ_MASK1_SET_, ser1_data_, v18) << R_IRQ_MASK1_SET__ser1_data__BITNR) | \
+ (R_IRQ_MASK1_SET__ser0_ready__##f19_##_VAL(R_IRQ_MASK1_SET_, ser0_ready_, v19) << R_IRQ_MASK1_SET__ser0_ready__BITNR) | \
+ (R_IRQ_MASK1_SET__ser0_data__##f20_##_VAL(R_IRQ_MASK1_SET_, ser0_data_, v20) << R_IRQ_MASK1_SET__ser0_data__BITNR) | \
+ (R_IRQ_MASK1_SET__pa7__##f21_##_VAL(R_IRQ_MASK1_SET_, pa7_, v21) << R_IRQ_MASK1_SET__pa7__BITNR) | \
+ (R_IRQ_MASK1_SET__pa6__##f22_##_VAL(R_IRQ_MASK1_SET_, pa6_, v22) << R_IRQ_MASK1_SET__pa6__BITNR) | \
+ (R_IRQ_MASK1_SET__pa5__##f23_##_VAL(R_IRQ_MASK1_SET_, pa5_, v23) << R_IRQ_MASK1_SET__pa5__BITNR) | \
+ (R_IRQ_MASK1_SET__pa4__##f24_##_VAL(R_IRQ_MASK1_SET_, pa4_, v24) << R_IRQ_MASK1_SET__pa4__BITNR) | \
+ (R_IRQ_MASK1_SET__pa3__##f25_##_VAL(R_IRQ_MASK1_SET_, pa3_, v25) << R_IRQ_MASK1_SET__pa3__BITNR) | \
+ (R_IRQ_MASK1_SET__pa2__##f26_##_VAL(R_IRQ_MASK1_SET_, pa2_, v26) << R_IRQ_MASK1_SET__pa2__BITNR) | \
+ (R_IRQ_MASK1_SET__pa1__##f27_##_VAL(R_IRQ_MASK1_SET_, pa1_, v27) << R_IRQ_MASK1_SET__pa1__BITNR) | \
+ (R_IRQ_MASK1_SET__pa0__##f28_##_VAL(R_IRQ_MASK1_SET_, pa0_, v28) << R_IRQ_MASK1_SET__pa0__BITNR) \
+)
+
+#endif
+
+/*
+ * R_IRQ_MASK2_CLR
+ * - type: WO
+ * - addr: 0xb00000d0
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_IRQ_MASK2_CLR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_IRQ_MASK2_CLR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_IRQ_MASK2_CLR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_IRQ_MASK2_CLR(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24) ( \
+ *R_IRQ_MASK2_CLR__SADDR = ( \
+ REG_INITIATED(R_IRQ_MASK2_CLR_) \
+ REG_VAL__R_IRQ_MASK2_CLR_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23,f24##_,v24) \
+ ), \
+ R_IRQ_MASK2_CLR__WRITE(R_IRQ_MASK2_CLR__ADDR, *R_IRQ_MASK2_CLR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_IRQ_MASK2_CLR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_IRQ_MASK2_CLR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_IRQ_MASK2_CLR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_IRQ_MASK2_CLR__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24) ( \
+ *R_IRQ_MASK2_CLR__SADDR = ( \
+ REG_INITIATED(R_IRQ_MASK2_CLR_) \
+ REG_VAL__R_IRQ_MASK2_CLR_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23,f24##_,v24) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_IRQ_MASK2_CLR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_IRQ_MASK2_CLR(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24) ( \
+ (R_IRQ_MASK2_CLR__dma8_sub3_descr__##f1##__MASK & REG__##v1) | \
+ (R_IRQ_MASK2_CLR__dma8_sub2_descr__##f2##__MASK & REG__##v2) | \
+ (R_IRQ_MASK2_CLR__dma8_sub1_descr__##f3##__MASK & REG__##v3) | \
+ (R_IRQ_MASK2_CLR__dma8_sub0_descr__##f4##__MASK & REG__##v4) | \
+ (R_IRQ_MASK2_CLR__dma9_eop__##f5##__MASK & REG__##v5) | \
+ (R_IRQ_MASK2_CLR__dma9_descr__##f6##__MASK & REG__##v6) | \
+ (R_IRQ_MASK2_CLR__dma8_eop__##f7##__MASK & REG__##v7) | \
+ (R_IRQ_MASK2_CLR__dma8_descr__##f8##__MASK & REG__##v8) | \
+ (R_IRQ_MASK2_CLR__dma7_eop__##f9##__MASK & REG__##v9) | \
+ (R_IRQ_MASK2_CLR__dma7_descr__##f10##__MASK & REG__##v10) | \
+ (R_IRQ_MASK2_CLR__dma6_eop__##f11##__MASK & REG__##v11) | \
+ (R_IRQ_MASK2_CLR__dma6_descr__##f12##__MASK & REG__##v12) | \
+ (R_IRQ_MASK2_CLR__dma5_eop__##f13##__MASK & REG__##v13) | \
+ (R_IRQ_MASK2_CLR__dma5_descr__##f14##__MASK & REG__##v14) | \
+ (R_IRQ_MASK2_CLR__dma4_eop__##f15##__MASK & REG__##v15) | \
+ (R_IRQ_MASK2_CLR__dma4_descr__##f16##__MASK & REG__##v16) | \
+ (R_IRQ_MASK2_CLR__dma3_eop__##f17##__MASK & REG__##v17) | \
+ (R_IRQ_MASK2_CLR__dma3_descr__##f18##__MASK & REG__##v18) | \
+ (R_IRQ_MASK2_CLR__dma2_eop__##f19##__MASK & REG__##v19) | \
+ (R_IRQ_MASK2_CLR__dma2_descr__##f20##__MASK & REG__##v20) | \
+ (R_IRQ_MASK2_CLR__dma1_eop__##f21##__MASK & REG__##v21) | \
+ (R_IRQ_MASK2_CLR__dma1_descr__##f22##__MASK & REG__##v22) | \
+ (R_IRQ_MASK2_CLR__dma0_eop__##f23##__MASK & REG__##v23) | \
+ (R_IRQ_MASK2_CLR__dma0_descr__##f24##__MASK & REG__##v24) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_MASK2_CLR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_MASK2_CLR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_MASK2_CLR(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24) ( \
+ (R_IRQ_MASK2_CLR__dma8_sub3_descr__##f1##__VAL(R_IRQ_MASK2_CLR_, dma8_sub3_descr_, v1) << R_IRQ_MASK2_CLR__dma8_sub3_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma8_sub2_descr__##f2##__VAL(R_IRQ_MASK2_CLR_, dma8_sub2_descr_, v2) << R_IRQ_MASK2_CLR__dma8_sub2_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma8_sub1_descr__##f3##__VAL(R_IRQ_MASK2_CLR_, dma8_sub1_descr_, v3) << R_IRQ_MASK2_CLR__dma8_sub1_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma8_sub0_descr__##f4##__VAL(R_IRQ_MASK2_CLR_, dma8_sub0_descr_, v4) << R_IRQ_MASK2_CLR__dma8_sub0_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma9_eop__##f5##__VAL(R_IRQ_MASK2_CLR_, dma9_eop_, v5) << R_IRQ_MASK2_CLR__dma9_eop__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma9_descr__##f6##__VAL(R_IRQ_MASK2_CLR_, dma9_descr_, v6) << R_IRQ_MASK2_CLR__dma9_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma8_eop__##f7##__VAL(R_IRQ_MASK2_CLR_, dma8_eop_, v7) << R_IRQ_MASK2_CLR__dma8_eop__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma8_descr__##f8##__VAL(R_IRQ_MASK2_CLR_, dma8_descr_, v8) << R_IRQ_MASK2_CLR__dma8_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma7_eop__##f9##__VAL(R_IRQ_MASK2_CLR_, dma7_eop_, v9) << R_IRQ_MASK2_CLR__dma7_eop__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma7_descr__##f10##__VAL(R_IRQ_MASK2_CLR_, dma7_descr_, v10) << R_IRQ_MASK2_CLR__dma7_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma6_eop__##f11##__VAL(R_IRQ_MASK2_CLR_, dma6_eop_, v11) << R_IRQ_MASK2_CLR__dma6_eop__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma6_descr__##f12##__VAL(R_IRQ_MASK2_CLR_, dma6_descr_, v12) << R_IRQ_MASK2_CLR__dma6_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma5_eop__##f13##__VAL(R_IRQ_MASK2_CLR_, dma5_eop_, v13) << R_IRQ_MASK2_CLR__dma5_eop__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma5_descr__##f14##__VAL(R_IRQ_MASK2_CLR_, dma5_descr_, v14) << R_IRQ_MASK2_CLR__dma5_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma4_eop__##f15##__VAL(R_IRQ_MASK2_CLR_, dma4_eop_, v15) << R_IRQ_MASK2_CLR__dma4_eop__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma4_descr__##f16##__VAL(R_IRQ_MASK2_CLR_, dma4_descr_, v16) << R_IRQ_MASK2_CLR__dma4_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma3_eop__##f17##__VAL(R_IRQ_MASK2_CLR_, dma3_eop_, v17) << R_IRQ_MASK2_CLR__dma3_eop__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma3_descr__##f18##__VAL(R_IRQ_MASK2_CLR_, dma3_descr_, v18) << R_IRQ_MASK2_CLR__dma3_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma2_eop__##f19##__VAL(R_IRQ_MASK2_CLR_, dma2_eop_, v19) << R_IRQ_MASK2_CLR__dma2_eop__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma2_descr__##f20##__VAL(R_IRQ_MASK2_CLR_, dma2_descr_, v20) << R_IRQ_MASK2_CLR__dma2_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma1_eop__##f21##__VAL(R_IRQ_MASK2_CLR_, dma1_eop_, v21) << R_IRQ_MASK2_CLR__dma1_eop__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma1_descr__##f22##__VAL(R_IRQ_MASK2_CLR_, dma1_descr_, v22) << R_IRQ_MASK2_CLR__dma1_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma0_eop__##f23##__VAL(R_IRQ_MASK2_CLR_, dma0_eop_, v23) << R_IRQ_MASK2_CLR__dma0_eop__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma0_descr__##f24##__VAL(R_IRQ_MASK2_CLR_, dma0_descr_, v24) << R_IRQ_MASK2_CLR__dma0_descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_MASK2_CLR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_MASK2_CLR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_MASK2_CLR_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19,f20_,v20,f21_,v21,f22_,v22,f23_,v23,f24_,v24) ( \
+ (R_IRQ_MASK2_CLR__dma8_sub3_descr__##f1_##_VAL(R_IRQ_MASK2_CLR_, dma8_sub3_descr_, v1) << R_IRQ_MASK2_CLR__dma8_sub3_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma8_sub2_descr__##f2_##_VAL(R_IRQ_MASK2_CLR_, dma8_sub2_descr_, v2) << R_IRQ_MASK2_CLR__dma8_sub2_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma8_sub1_descr__##f3_##_VAL(R_IRQ_MASK2_CLR_, dma8_sub1_descr_, v3) << R_IRQ_MASK2_CLR__dma8_sub1_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma8_sub0_descr__##f4_##_VAL(R_IRQ_MASK2_CLR_, dma8_sub0_descr_, v4) << R_IRQ_MASK2_CLR__dma8_sub0_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma9_eop__##f5_##_VAL(R_IRQ_MASK2_CLR_, dma9_eop_, v5) << R_IRQ_MASK2_CLR__dma9_eop__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma9_descr__##f6_##_VAL(R_IRQ_MASK2_CLR_, dma9_descr_, v6) << R_IRQ_MASK2_CLR__dma9_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma8_eop__##f7_##_VAL(R_IRQ_MASK2_CLR_, dma8_eop_, v7) << R_IRQ_MASK2_CLR__dma8_eop__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma8_descr__##f8_##_VAL(R_IRQ_MASK2_CLR_, dma8_descr_, v8) << R_IRQ_MASK2_CLR__dma8_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma7_eop__##f9_##_VAL(R_IRQ_MASK2_CLR_, dma7_eop_, v9) << R_IRQ_MASK2_CLR__dma7_eop__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma7_descr__##f10_##_VAL(R_IRQ_MASK2_CLR_, dma7_descr_, v10) << R_IRQ_MASK2_CLR__dma7_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma6_eop__##f11_##_VAL(R_IRQ_MASK2_CLR_, dma6_eop_, v11) << R_IRQ_MASK2_CLR__dma6_eop__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma6_descr__##f12_##_VAL(R_IRQ_MASK2_CLR_, dma6_descr_, v12) << R_IRQ_MASK2_CLR__dma6_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma5_eop__##f13_##_VAL(R_IRQ_MASK2_CLR_, dma5_eop_, v13) << R_IRQ_MASK2_CLR__dma5_eop__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma5_descr__##f14_##_VAL(R_IRQ_MASK2_CLR_, dma5_descr_, v14) << R_IRQ_MASK2_CLR__dma5_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma4_eop__##f15_##_VAL(R_IRQ_MASK2_CLR_, dma4_eop_, v15) << R_IRQ_MASK2_CLR__dma4_eop__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma4_descr__##f16_##_VAL(R_IRQ_MASK2_CLR_, dma4_descr_, v16) << R_IRQ_MASK2_CLR__dma4_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma3_eop__##f17_##_VAL(R_IRQ_MASK2_CLR_, dma3_eop_, v17) << R_IRQ_MASK2_CLR__dma3_eop__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma3_descr__##f18_##_VAL(R_IRQ_MASK2_CLR_, dma3_descr_, v18) << R_IRQ_MASK2_CLR__dma3_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma2_eop__##f19_##_VAL(R_IRQ_MASK2_CLR_, dma2_eop_, v19) << R_IRQ_MASK2_CLR__dma2_eop__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma2_descr__##f20_##_VAL(R_IRQ_MASK2_CLR_, dma2_descr_, v20) << R_IRQ_MASK2_CLR__dma2_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma1_eop__##f21_##_VAL(R_IRQ_MASK2_CLR_, dma1_eop_, v21) << R_IRQ_MASK2_CLR__dma1_eop__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma1_descr__##f22_##_VAL(R_IRQ_MASK2_CLR_, dma1_descr_, v22) << R_IRQ_MASK2_CLR__dma1_descr__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma0_eop__##f23_##_VAL(R_IRQ_MASK2_CLR_, dma0_eop_, v23) << R_IRQ_MASK2_CLR__dma0_eop__BITNR) | \
+ (R_IRQ_MASK2_CLR__dma0_descr__##f24_##_VAL(R_IRQ_MASK2_CLR_, dma0_descr_, v24) << R_IRQ_MASK2_CLR__dma0_descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_IRQ_MASK2_RD
+ * - type: RO
+ * - addr: 0xb00000d0
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_IRQ_MASK2_RD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_IRQ_MASK2_RD(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24) ( \
+ (R_IRQ_MASK2_RD__dma8_sub3_descr__##f1##__MASK & REG__##v1) | \
+ (R_IRQ_MASK2_RD__dma8_sub2_descr__##f2##__MASK & REG__##v2) | \
+ (R_IRQ_MASK2_RD__dma8_sub1_descr__##f3##__MASK & REG__##v3) | \
+ (R_IRQ_MASK2_RD__dma8_sub0_descr__##f4##__MASK & REG__##v4) | \
+ (R_IRQ_MASK2_RD__dma9_eop__##f5##__MASK & REG__##v5) | \
+ (R_IRQ_MASK2_RD__dma9_descr__##f6##__MASK & REG__##v6) | \
+ (R_IRQ_MASK2_RD__dma8_eop__##f7##__MASK & REG__##v7) | \
+ (R_IRQ_MASK2_RD__dma8_descr__##f8##__MASK & REG__##v8) | \
+ (R_IRQ_MASK2_RD__dma7_eop__##f9##__MASK & REG__##v9) | \
+ (R_IRQ_MASK2_RD__dma7_descr__##f10##__MASK & REG__##v10) | \
+ (R_IRQ_MASK2_RD__dma6_eop__##f11##__MASK & REG__##v11) | \
+ (R_IRQ_MASK2_RD__dma6_descr__##f12##__MASK & REG__##v12) | \
+ (R_IRQ_MASK2_RD__dma5_eop__##f13##__MASK & REG__##v13) | \
+ (R_IRQ_MASK2_RD__dma5_descr__##f14##__MASK & REG__##v14) | \
+ (R_IRQ_MASK2_RD__dma4_eop__##f15##__MASK & REG__##v15) | \
+ (R_IRQ_MASK2_RD__dma4_descr__##f16##__MASK & REG__##v16) | \
+ (R_IRQ_MASK2_RD__dma3_eop__##f17##__MASK & REG__##v17) | \
+ (R_IRQ_MASK2_RD__dma3_descr__##f18##__MASK & REG__##v18) | \
+ (R_IRQ_MASK2_RD__dma2_eop__##f19##__MASK & REG__##v19) | \
+ (R_IRQ_MASK2_RD__dma2_descr__##f20##__MASK & REG__##v20) | \
+ (R_IRQ_MASK2_RD__dma1_eop__##f21##__MASK & REG__##v21) | \
+ (R_IRQ_MASK2_RD__dma1_descr__##f22##__MASK & REG__##v22) | \
+ (R_IRQ_MASK2_RD__dma0_eop__##f23##__MASK & REG__##v23) | \
+ (R_IRQ_MASK2_RD__dma0_descr__##f24##__MASK & REG__##v24) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_MASK2_RD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_MASK2_RD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_MASK2_RD(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24) ( \
+ (R_IRQ_MASK2_RD__dma8_sub3_descr__##f1##__VAL(R_IRQ_MASK2_RD_, dma8_sub3_descr_, v1) << R_IRQ_MASK2_RD__dma8_sub3_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma8_sub2_descr__##f2##__VAL(R_IRQ_MASK2_RD_, dma8_sub2_descr_, v2) << R_IRQ_MASK2_RD__dma8_sub2_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma8_sub1_descr__##f3##__VAL(R_IRQ_MASK2_RD_, dma8_sub1_descr_, v3) << R_IRQ_MASK2_RD__dma8_sub1_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma8_sub0_descr__##f4##__VAL(R_IRQ_MASK2_RD_, dma8_sub0_descr_, v4) << R_IRQ_MASK2_RD__dma8_sub0_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma9_eop__##f5##__VAL(R_IRQ_MASK2_RD_, dma9_eop_, v5) << R_IRQ_MASK2_RD__dma9_eop__BITNR) | \
+ (R_IRQ_MASK2_RD__dma9_descr__##f6##__VAL(R_IRQ_MASK2_RD_, dma9_descr_, v6) << R_IRQ_MASK2_RD__dma9_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma8_eop__##f7##__VAL(R_IRQ_MASK2_RD_, dma8_eop_, v7) << R_IRQ_MASK2_RD__dma8_eop__BITNR) | \
+ (R_IRQ_MASK2_RD__dma8_descr__##f8##__VAL(R_IRQ_MASK2_RD_, dma8_descr_, v8) << R_IRQ_MASK2_RD__dma8_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma7_eop__##f9##__VAL(R_IRQ_MASK2_RD_, dma7_eop_, v9) << R_IRQ_MASK2_RD__dma7_eop__BITNR) | \
+ (R_IRQ_MASK2_RD__dma7_descr__##f10##__VAL(R_IRQ_MASK2_RD_, dma7_descr_, v10) << R_IRQ_MASK2_RD__dma7_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma6_eop__##f11##__VAL(R_IRQ_MASK2_RD_, dma6_eop_, v11) << R_IRQ_MASK2_RD__dma6_eop__BITNR) | \
+ (R_IRQ_MASK2_RD__dma6_descr__##f12##__VAL(R_IRQ_MASK2_RD_, dma6_descr_, v12) << R_IRQ_MASK2_RD__dma6_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma5_eop__##f13##__VAL(R_IRQ_MASK2_RD_, dma5_eop_, v13) << R_IRQ_MASK2_RD__dma5_eop__BITNR) | \
+ (R_IRQ_MASK2_RD__dma5_descr__##f14##__VAL(R_IRQ_MASK2_RD_, dma5_descr_, v14) << R_IRQ_MASK2_RD__dma5_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma4_eop__##f15##__VAL(R_IRQ_MASK2_RD_, dma4_eop_, v15) << R_IRQ_MASK2_RD__dma4_eop__BITNR) | \
+ (R_IRQ_MASK2_RD__dma4_descr__##f16##__VAL(R_IRQ_MASK2_RD_, dma4_descr_, v16) << R_IRQ_MASK2_RD__dma4_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma3_eop__##f17##__VAL(R_IRQ_MASK2_RD_, dma3_eop_, v17) << R_IRQ_MASK2_RD__dma3_eop__BITNR) | \
+ (R_IRQ_MASK2_RD__dma3_descr__##f18##__VAL(R_IRQ_MASK2_RD_, dma3_descr_, v18) << R_IRQ_MASK2_RD__dma3_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma2_eop__##f19##__VAL(R_IRQ_MASK2_RD_, dma2_eop_, v19) << R_IRQ_MASK2_RD__dma2_eop__BITNR) | \
+ (R_IRQ_MASK2_RD__dma2_descr__##f20##__VAL(R_IRQ_MASK2_RD_, dma2_descr_, v20) << R_IRQ_MASK2_RD__dma2_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma1_eop__##f21##__VAL(R_IRQ_MASK2_RD_, dma1_eop_, v21) << R_IRQ_MASK2_RD__dma1_eop__BITNR) | \
+ (R_IRQ_MASK2_RD__dma1_descr__##f22##__VAL(R_IRQ_MASK2_RD_, dma1_descr_, v22) << R_IRQ_MASK2_RD__dma1_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma0_eop__##f23##__VAL(R_IRQ_MASK2_RD_, dma0_eop_, v23) << R_IRQ_MASK2_RD__dma0_eop__BITNR) | \
+ (R_IRQ_MASK2_RD__dma0_descr__##f24##__VAL(R_IRQ_MASK2_RD_, dma0_descr_, v24) << R_IRQ_MASK2_RD__dma0_descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_MASK2_RD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_MASK2_RD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_MASK2_RD_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19,f20_,v20,f21_,v21,f22_,v22,f23_,v23,f24_,v24) ( \
+ (R_IRQ_MASK2_RD__dma8_sub3_descr__##f1_##_VAL(R_IRQ_MASK2_RD_, dma8_sub3_descr_, v1) << R_IRQ_MASK2_RD__dma8_sub3_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma8_sub2_descr__##f2_##_VAL(R_IRQ_MASK2_RD_, dma8_sub2_descr_, v2) << R_IRQ_MASK2_RD__dma8_sub2_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma8_sub1_descr__##f3_##_VAL(R_IRQ_MASK2_RD_, dma8_sub1_descr_, v3) << R_IRQ_MASK2_RD__dma8_sub1_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma8_sub0_descr__##f4_##_VAL(R_IRQ_MASK2_RD_, dma8_sub0_descr_, v4) << R_IRQ_MASK2_RD__dma8_sub0_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma9_eop__##f5_##_VAL(R_IRQ_MASK2_RD_, dma9_eop_, v5) << R_IRQ_MASK2_RD__dma9_eop__BITNR) | \
+ (R_IRQ_MASK2_RD__dma9_descr__##f6_##_VAL(R_IRQ_MASK2_RD_, dma9_descr_, v6) << R_IRQ_MASK2_RD__dma9_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma8_eop__##f7_##_VAL(R_IRQ_MASK2_RD_, dma8_eop_, v7) << R_IRQ_MASK2_RD__dma8_eop__BITNR) | \
+ (R_IRQ_MASK2_RD__dma8_descr__##f8_##_VAL(R_IRQ_MASK2_RD_, dma8_descr_, v8) << R_IRQ_MASK2_RD__dma8_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma7_eop__##f9_##_VAL(R_IRQ_MASK2_RD_, dma7_eop_, v9) << R_IRQ_MASK2_RD__dma7_eop__BITNR) | \
+ (R_IRQ_MASK2_RD__dma7_descr__##f10_##_VAL(R_IRQ_MASK2_RD_, dma7_descr_, v10) << R_IRQ_MASK2_RD__dma7_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma6_eop__##f11_##_VAL(R_IRQ_MASK2_RD_, dma6_eop_, v11) << R_IRQ_MASK2_RD__dma6_eop__BITNR) | \
+ (R_IRQ_MASK2_RD__dma6_descr__##f12_##_VAL(R_IRQ_MASK2_RD_, dma6_descr_, v12) << R_IRQ_MASK2_RD__dma6_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma5_eop__##f13_##_VAL(R_IRQ_MASK2_RD_, dma5_eop_, v13) << R_IRQ_MASK2_RD__dma5_eop__BITNR) | \
+ (R_IRQ_MASK2_RD__dma5_descr__##f14_##_VAL(R_IRQ_MASK2_RD_, dma5_descr_, v14) << R_IRQ_MASK2_RD__dma5_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma4_eop__##f15_##_VAL(R_IRQ_MASK2_RD_, dma4_eop_, v15) << R_IRQ_MASK2_RD__dma4_eop__BITNR) | \
+ (R_IRQ_MASK2_RD__dma4_descr__##f16_##_VAL(R_IRQ_MASK2_RD_, dma4_descr_, v16) << R_IRQ_MASK2_RD__dma4_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma3_eop__##f17_##_VAL(R_IRQ_MASK2_RD_, dma3_eop_, v17) << R_IRQ_MASK2_RD__dma3_eop__BITNR) | \
+ (R_IRQ_MASK2_RD__dma3_descr__##f18_##_VAL(R_IRQ_MASK2_RD_, dma3_descr_, v18) << R_IRQ_MASK2_RD__dma3_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma2_eop__##f19_##_VAL(R_IRQ_MASK2_RD_, dma2_eop_, v19) << R_IRQ_MASK2_RD__dma2_eop__BITNR) | \
+ (R_IRQ_MASK2_RD__dma2_descr__##f20_##_VAL(R_IRQ_MASK2_RD_, dma2_descr_, v20) << R_IRQ_MASK2_RD__dma2_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma1_eop__##f21_##_VAL(R_IRQ_MASK2_RD_, dma1_eop_, v21) << R_IRQ_MASK2_RD__dma1_eop__BITNR) | \
+ (R_IRQ_MASK2_RD__dma1_descr__##f22_##_VAL(R_IRQ_MASK2_RD_, dma1_descr_, v22) << R_IRQ_MASK2_RD__dma1_descr__BITNR) | \
+ (R_IRQ_MASK2_RD__dma0_eop__##f23_##_VAL(R_IRQ_MASK2_RD_, dma0_eop_, v23) << R_IRQ_MASK2_RD__dma0_eop__BITNR) | \
+ (R_IRQ_MASK2_RD__dma0_descr__##f24_##_VAL(R_IRQ_MASK2_RD_, dma0_descr_, v24) << R_IRQ_MASK2_RD__dma0_descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_IRQ_MASK2_SET
+ * - type: WO
+ * - addr: 0xb00000d4
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_IRQ_MASK2_SET
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_IRQ_MASK2_SET.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_IRQ_MASK2_SET.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_IRQ_MASK2_SET(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24) ( \
+ *R_IRQ_MASK2_SET__SADDR = ( \
+ REG_INITIATED(R_IRQ_MASK2_SET_) \
+ REG_VAL__R_IRQ_MASK2_SET_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23,f24##_,v24) \
+ ), \
+ R_IRQ_MASK2_SET__WRITE(R_IRQ_MASK2_SET__ADDR, *R_IRQ_MASK2_SET__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_IRQ_MASK2_SET__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_IRQ_MASK2_SET.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_IRQ_MASK2_SET.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_IRQ_MASK2_SET__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24) ( \
+ *R_IRQ_MASK2_SET__SADDR = ( \
+ REG_INITIATED(R_IRQ_MASK2_SET_) \
+ REG_VAL__R_IRQ_MASK2_SET_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23,f24##_,v24) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_IRQ_MASK2_SET
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_IRQ_MASK2_SET(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24) ( \
+ (R_IRQ_MASK2_SET__dma8_sub3_descr__##f1##__MASK & REG__##v1) | \
+ (R_IRQ_MASK2_SET__dma8_sub2_descr__##f2##__MASK & REG__##v2) | \
+ (R_IRQ_MASK2_SET__dma8_sub1_descr__##f3##__MASK & REG__##v3) | \
+ (R_IRQ_MASK2_SET__dma8_sub0_descr__##f4##__MASK & REG__##v4) | \
+ (R_IRQ_MASK2_SET__dma9_eop__##f5##__MASK & REG__##v5) | \
+ (R_IRQ_MASK2_SET__dma9_descr__##f6##__MASK & REG__##v6) | \
+ (R_IRQ_MASK2_SET__dma8_eop__##f7##__MASK & REG__##v7) | \
+ (R_IRQ_MASK2_SET__dma8_descr__##f8##__MASK & REG__##v8) | \
+ (R_IRQ_MASK2_SET__dma7_eop__##f9##__MASK & REG__##v9) | \
+ (R_IRQ_MASK2_SET__dma7_descr__##f10##__MASK & REG__##v10) | \
+ (R_IRQ_MASK2_SET__dma6_eop__##f11##__MASK & REG__##v11) | \
+ (R_IRQ_MASK2_SET__dma6_descr__##f12##__MASK & REG__##v12) | \
+ (R_IRQ_MASK2_SET__dma5_eop__##f13##__MASK & REG__##v13) | \
+ (R_IRQ_MASK2_SET__dma5_descr__##f14##__MASK & REG__##v14) | \
+ (R_IRQ_MASK2_SET__dma4_eop__##f15##__MASK & REG__##v15) | \
+ (R_IRQ_MASK2_SET__dma4_descr__##f16##__MASK & REG__##v16) | \
+ (R_IRQ_MASK2_SET__dma3_eop__##f17##__MASK & REG__##v17) | \
+ (R_IRQ_MASK2_SET__dma3_descr__##f18##__MASK & REG__##v18) | \
+ (R_IRQ_MASK2_SET__dma2_eop__##f19##__MASK & REG__##v19) | \
+ (R_IRQ_MASK2_SET__dma2_descr__##f20##__MASK & REG__##v20) | \
+ (R_IRQ_MASK2_SET__dma1_eop__##f21##__MASK & REG__##v21) | \
+ (R_IRQ_MASK2_SET__dma1_descr__##f22##__MASK & REG__##v22) | \
+ (R_IRQ_MASK2_SET__dma0_eop__##f23##__MASK & REG__##v23) | \
+ (R_IRQ_MASK2_SET__dma0_descr__##f24##__MASK & REG__##v24) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_MASK2_SET
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_MASK2_SET.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_MASK2_SET(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24) ( \
+ (R_IRQ_MASK2_SET__dma8_sub3_descr__##f1##__VAL(R_IRQ_MASK2_SET_, dma8_sub3_descr_, v1) << R_IRQ_MASK2_SET__dma8_sub3_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma8_sub2_descr__##f2##__VAL(R_IRQ_MASK2_SET_, dma8_sub2_descr_, v2) << R_IRQ_MASK2_SET__dma8_sub2_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma8_sub1_descr__##f3##__VAL(R_IRQ_MASK2_SET_, dma8_sub1_descr_, v3) << R_IRQ_MASK2_SET__dma8_sub1_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma8_sub0_descr__##f4##__VAL(R_IRQ_MASK2_SET_, dma8_sub0_descr_, v4) << R_IRQ_MASK2_SET__dma8_sub0_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma9_eop__##f5##__VAL(R_IRQ_MASK2_SET_, dma9_eop_, v5) << R_IRQ_MASK2_SET__dma9_eop__BITNR) | \
+ (R_IRQ_MASK2_SET__dma9_descr__##f6##__VAL(R_IRQ_MASK2_SET_, dma9_descr_, v6) << R_IRQ_MASK2_SET__dma9_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma8_eop__##f7##__VAL(R_IRQ_MASK2_SET_, dma8_eop_, v7) << R_IRQ_MASK2_SET__dma8_eop__BITNR) | \
+ (R_IRQ_MASK2_SET__dma8_descr__##f8##__VAL(R_IRQ_MASK2_SET_, dma8_descr_, v8) << R_IRQ_MASK2_SET__dma8_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma7_eop__##f9##__VAL(R_IRQ_MASK2_SET_, dma7_eop_, v9) << R_IRQ_MASK2_SET__dma7_eop__BITNR) | \
+ (R_IRQ_MASK2_SET__dma7_descr__##f10##__VAL(R_IRQ_MASK2_SET_, dma7_descr_, v10) << R_IRQ_MASK2_SET__dma7_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma6_eop__##f11##__VAL(R_IRQ_MASK2_SET_, dma6_eop_, v11) << R_IRQ_MASK2_SET__dma6_eop__BITNR) | \
+ (R_IRQ_MASK2_SET__dma6_descr__##f12##__VAL(R_IRQ_MASK2_SET_, dma6_descr_, v12) << R_IRQ_MASK2_SET__dma6_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma5_eop__##f13##__VAL(R_IRQ_MASK2_SET_, dma5_eop_, v13) << R_IRQ_MASK2_SET__dma5_eop__BITNR) | \
+ (R_IRQ_MASK2_SET__dma5_descr__##f14##__VAL(R_IRQ_MASK2_SET_, dma5_descr_, v14) << R_IRQ_MASK2_SET__dma5_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma4_eop__##f15##__VAL(R_IRQ_MASK2_SET_, dma4_eop_, v15) << R_IRQ_MASK2_SET__dma4_eop__BITNR) | \
+ (R_IRQ_MASK2_SET__dma4_descr__##f16##__VAL(R_IRQ_MASK2_SET_, dma4_descr_, v16) << R_IRQ_MASK2_SET__dma4_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma3_eop__##f17##__VAL(R_IRQ_MASK2_SET_, dma3_eop_, v17) << R_IRQ_MASK2_SET__dma3_eop__BITNR) | \
+ (R_IRQ_MASK2_SET__dma3_descr__##f18##__VAL(R_IRQ_MASK2_SET_, dma3_descr_, v18) << R_IRQ_MASK2_SET__dma3_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma2_eop__##f19##__VAL(R_IRQ_MASK2_SET_, dma2_eop_, v19) << R_IRQ_MASK2_SET__dma2_eop__BITNR) | \
+ (R_IRQ_MASK2_SET__dma2_descr__##f20##__VAL(R_IRQ_MASK2_SET_, dma2_descr_, v20) << R_IRQ_MASK2_SET__dma2_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma1_eop__##f21##__VAL(R_IRQ_MASK2_SET_, dma1_eop_, v21) << R_IRQ_MASK2_SET__dma1_eop__BITNR) | \
+ (R_IRQ_MASK2_SET__dma1_descr__##f22##__VAL(R_IRQ_MASK2_SET_, dma1_descr_, v22) << R_IRQ_MASK2_SET__dma1_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma0_eop__##f23##__VAL(R_IRQ_MASK2_SET_, dma0_eop_, v23) << R_IRQ_MASK2_SET__dma0_eop__BITNR) | \
+ (R_IRQ_MASK2_SET__dma0_descr__##f24##__VAL(R_IRQ_MASK2_SET_, dma0_descr_, v24) << R_IRQ_MASK2_SET__dma0_descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_MASK2_SET_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_MASK2_SET.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_MASK2_SET_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19,f20_,v20,f21_,v21,f22_,v22,f23_,v23,f24_,v24) ( \
+ (R_IRQ_MASK2_SET__dma8_sub3_descr__##f1_##_VAL(R_IRQ_MASK2_SET_, dma8_sub3_descr_, v1) << R_IRQ_MASK2_SET__dma8_sub3_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma8_sub2_descr__##f2_##_VAL(R_IRQ_MASK2_SET_, dma8_sub2_descr_, v2) << R_IRQ_MASK2_SET__dma8_sub2_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma8_sub1_descr__##f3_##_VAL(R_IRQ_MASK2_SET_, dma8_sub1_descr_, v3) << R_IRQ_MASK2_SET__dma8_sub1_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma8_sub0_descr__##f4_##_VAL(R_IRQ_MASK2_SET_, dma8_sub0_descr_, v4) << R_IRQ_MASK2_SET__dma8_sub0_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma9_eop__##f5_##_VAL(R_IRQ_MASK2_SET_, dma9_eop_, v5) << R_IRQ_MASK2_SET__dma9_eop__BITNR) | \
+ (R_IRQ_MASK2_SET__dma9_descr__##f6_##_VAL(R_IRQ_MASK2_SET_, dma9_descr_, v6) << R_IRQ_MASK2_SET__dma9_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma8_eop__##f7_##_VAL(R_IRQ_MASK2_SET_, dma8_eop_, v7) << R_IRQ_MASK2_SET__dma8_eop__BITNR) | \
+ (R_IRQ_MASK2_SET__dma8_descr__##f8_##_VAL(R_IRQ_MASK2_SET_, dma8_descr_, v8) << R_IRQ_MASK2_SET__dma8_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma7_eop__##f9_##_VAL(R_IRQ_MASK2_SET_, dma7_eop_, v9) << R_IRQ_MASK2_SET__dma7_eop__BITNR) | \
+ (R_IRQ_MASK2_SET__dma7_descr__##f10_##_VAL(R_IRQ_MASK2_SET_, dma7_descr_, v10) << R_IRQ_MASK2_SET__dma7_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma6_eop__##f11_##_VAL(R_IRQ_MASK2_SET_, dma6_eop_, v11) << R_IRQ_MASK2_SET__dma6_eop__BITNR) | \
+ (R_IRQ_MASK2_SET__dma6_descr__##f12_##_VAL(R_IRQ_MASK2_SET_, dma6_descr_, v12) << R_IRQ_MASK2_SET__dma6_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma5_eop__##f13_##_VAL(R_IRQ_MASK2_SET_, dma5_eop_, v13) << R_IRQ_MASK2_SET__dma5_eop__BITNR) | \
+ (R_IRQ_MASK2_SET__dma5_descr__##f14_##_VAL(R_IRQ_MASK2_SET_, dma5_descr_, v14) << R_IRQ_MASK2_SET__dma5_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma4_eop__##f15_##_VAL(R_IRQ_MASK2_SET_, dma4_eop_, v15) << R_IRQ_MASK2_SET__dma4_eop__BITNR) | \
+ (R_IRQ_MASK2_SET__dma4_descr__##f16_##_VAL(R_IRQ_MASK2_SET_, dma4_descr_, v16) << R_IRQ_MASK2_SET__dma4_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma3_eop__##f17_##_VAL(R_IRQ_MASK2_SET_, dma3_eop_, v17) << R_IRQ_MASK2_SET__dma3_eop__BITNR) | \
+ (R_IRQ_MASK2_SET__dma3_descr__##f18_##_VAL(R_IRQ_MASK2_SET_, dma3_descr_, v18) << R_IRQ_MASK2_SET__dma3_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma2_eop__##f19_##_VAL(R_IRQ_MASK2_SET_, dma2_eop_, v19) << R_IRQ_MASK2_SET__dma2_eop__BITNR) | \
+ (R_IRQ_MASK2_SET__dma2_descr__##f20_##_VAL(R_IRQ_MASK2_SET_, dma2_descr_, v20) << R_IRQ_MASK2_SET__dma2_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma1_eop__##f21_##_VAL(R_IRQ_MASK2_SET_, dma1_eop_, v21) << R_IRQ_MASK2_SET__dma1_eop__BITNR) | \
+ (R_IRQ_MASK2_SET__dma1_descr__##f22_##_VAL(R_IRQ_MASK2_SET_, dma1_descr_, v22) << R_IRQ_MASK2_SET__dma1_descr__BITNR) | \
+ (R_IRQ_MASK2_SET__dma0_eop__##f23_##_VAL(R_IRQ_MASK2_SET_, dma0_eop_, v23) << R_IRQ_MASK2_SET__dma0_eop__BITNR) | \
+ (R_IRQ_MASK2_SET__dma0_descr__##f24_##_VAL(R_IRQ_MASK2_SET_, dma0_descr_, v24) << R_IRQ_MASK2_SET__dma0_descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_IRQ_READ0
+ * - type: RO
+ * - addr: 0xb00000c4
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_IRQ_READ0
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_IRQ_READ0(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28,f29,v29,f30,v30,f31,v31) ( \
+ (R_IRQ_READ0__nmi_pin__##f1##__MASK & REG__##v1) | \
+ (R_IRQ_READ0__watchdog_nmi__##f2##__MASK & REG__##v2) | \
+ (R_IRQ_READ0__sqe_test_error__##f3##__MASK & REG__##v3) | \
+ (R_IRQ_READ0__carrier_loss__##f4##__MASK & REG__##v4) | \
+ (R_IRQ_READ0__deferred__##f5##__MASK & REG__##v5) | \
+ (R_IRQ_READ0__late_col__##f6##__MASK & REG__##v6) | \
+ (R_IRQ_READ0__multiple_col__##f7##__MASK & REG__##v7) | \
+ (R_IRQ_READ0__single_col__##f8##__MASK & REG__##v8) | \
+ (R_IRQ_READ0__congestion__##f9##__MASK & REG__##v9) | \
+ (R_IRQ_READ0__oversize__##f10##__MASK & REG__##v10) | \
+ (R_IRQ_READ0__alignment_error__##f11##__MASK & REG__##v11) | \
+ (R_IRQ_READ0__crc_error__##f12##__MASK & REG__##v12) | \
+ (R_IRQ_READ0__overrun__##f13##__MASK & REG__##v13) | \
+ (R_IRQ_READ0__underrun__##f14##__MASK & REG__##v14) | \
+ (R_IRQ_READ0__excessive_col__##f15##__MASK & REG__##v15) | \
+ (R_IRQ_READ0__mdio__##f16##__MASK & REG__##v16) | \
+ (R_IRQ_READ0__ata_drq3__##f17##__MASK & REG__##v17) | \
+ (R_IRQ_READ0__ata_drq2__##f18##__MASK & REG__##v18) | \
+ (R_IRQ_READ0__ata_drq1__##f19##__MASK & REG__##v19) | \
+ (R_IRQ_READ0__ata_drq0__##f20##__MASK & REG__##v20) | \
+ (R_IRQ_READ0__par0_ecp_cmd__##f21##__MASK & REG__##v21) | \
+ (R_IRQ_READ0__par0_peri__##f22##__MASK & REG__##v22) | \
+ (R_IRQ_READ0__par0_data__##f23##__MASK & REG__##v23) | \
+ (R_IRQ_READ0__par0_ready__##f24##__MASK & REG__##v24) | \
+ (R_IRQ_READ0__ata_dmaend__##f25##__MASK & REG__##v25) | \
+ (R_IRQ_READ0__irq_ext_vector_nr__##f26##__MASK & REG__##v26) | \
+ (R_IRQ_READ0__irq_int_vector_nr__##f27##__MASK & REG__##v27) | \
+ (R_IRQ_READ0__ext_dma1__##f28##__MASK & REG__##v28) | \
+ (R_IRQ_READ0__ext_dma0__##f29##__MASK & REG__##v29) | \
+ (R_IRQ_READ0__timer1__##f30##__MASK & REG__##v30) | \
+ (R_IRQ_READ0__timer0__##f31##__MASK & REG__##v31) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_READ0
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_READ0.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_READ0(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28,f29,v29,f30,v30,f31,v31) ( \
+ (R_IRQ_READ0__nmi_pin__##f1##__VAL(R_IRQ_READ0_, nmi_pin_, v1) << R_IRQ_READ0__nmi_pin__BITNR) | \
+ (R_IRQ_READ0__watchdog_nmi__##f2##__VAL(R_IRQ_READ0_, watchdog_nmi_, v2) << R_IRQ_READ0__watchdog_nmi__BITNR) | \
+ (R_IRQ_READ0__sqe_test_error__##f3##__VAL(R_IRQ_READ0_, sqe_test_error_, v3) << R_IRQ_READ0__sqe_test_error__BITNR) | \
+ (R_IRQ_READ0__carrier_loss__##f4##__VAL(R_IRQ_READ0_, carrier_loss_, v4) << R_IRQ_READ0__carrier_loss__BITNR) | \
+ (R_IRQ_READ0__deferred__##f5##__VAL(R_IRQ_READ0_, deferred_, v5) << R_IRQ_READ0__deferred__BITNR) | \
+ (R_IRQ_READ0__late_col__##f6##__VAL(R_IRQ_READ0_, late_col_, v6) << R_IRQ_READ0__late_col__BITNR) | \
+ (R_IRQ_READ0__multiple_col__##f7##__VAL(R_IRQ_READ0_, multiple_col_, v7) << R_IRQ_READ0__multiple_col__BITNR) | \
+ (R_IRQ_READ0__single_col__##f8##__VAL(R_IRQ_READ0_, single_col_, v8) << R_IRQ_READ0__single_col__BITNR) | \
+ (R_IRQ_READ0__congestion__##f9##__VAL(R_IRQ_READ0_, congestion_, v9) << R_IRQ_READ0__congestion__BITNR) | \
+ (R_IRQ_READ0__oversize__##f10##__VAL(R_IRQ_READ0_, oversize_, v10) << R_IRQ_READ0__oversize__BITNR) | \
+ (R_IRQ_READ0__alignment_error__##f11##__VAL(R_IRQ_READ0_, alignment_error_, v11) << R_IRQ_READ0__alignment_error__BITNR) | \
+ (R_IRQ_READ0__crc_error__##f12##__VAL(R_IRQ_READ0_, crc_error_, v12) << R_IRQ_READ0__crc_error__BITNR) | \
+ (R_IRQ_READ0__overrun__##f13##__VAL(R_IRQ_READ0_, overrun_, v13) << R_IRQ_READ0__overrun__BITNR) | \
+ (R_IRQ_READ0__underrun__##f14##__VAL(R_IRQ_READ0_, underrun_, v14) << R_IRQ_READ0__underrun__BITNR) | \
+ (R_IRQ_READ0__excessive_col__##f15##__VAL(R_IRQ_READ0_, excessive_col_, v15) << R_IRQ_READ0__excessive_col__BITNR) | \
+ (R_IRQ_READ0__mdio__##f16##__VAL(R_IRQ_READ0_, mdio_, v16) << R_IRQ_READ0__mdio__BITNR) | \
+ (R_IRQ_READ0__ata_drq3__##f17##__VAL(R_IRQ_READ0_, ata_drq3_, v17) << R_IRQ_READ0__ata_drq3__BITNR) | \
+ (R_IRQ_READ0__ata_drq2__##f18##__VAL(R_IRQ_READ0_, ata_drq2_, v18) << R_IRQ_READ0__ata_drq2__BITNR) | \
+ (R_IRQ_READ0__ata_drq1__##f19##__VAL(R_IRQ_READ0_, ata_drq1_, v19) << R_IRQ_READ0__ata_drq1__BITNR) | \
+ (R_IRQ_READ0__ata_drq0__##f20##__VAL(R_IRQ_READ0_, ata_drq0_, v20) << R_IRQ_READ0__ata_drq0__BITNR) | \
+ (R_IRQ_READ0__par0_ecp_cmd__##f21##__VAL(R_IRQ_READ0_, par0_ecp_cmd_, v21) << R_IRQ_READ0__par0_ecp_cmd__BITNR) | \
+ (R_IRQ_READ0__par0_peri__##f22##__VAL(R_IRQ_READ0_, par0_peri_, v22) << R_IRQ_READ0__par0_peri__BITNR) | \
+ (R_IRQ_READ0__par0_data__##f23##__VAL(R_IRQ_READ0_, par0_data_, v23) << R_IRQ_READ0__par0_data__BITNR) | \
+ (R_IRQ_READ0__par0_ready__##f24##__VAL(R_IRQ_READ0_, par0_ready_, v24) << R_IRQ_READ0__par0_ready__BITNR) | \
+ (R_IRQ_READ0__ata_dmaend__##f25##__VAL(R_IRQ_READ0_, ata_dmaend_, v25) << R_IRQ_READ0__ata_dmaend__BITNR) | \
+ (R_IRQ_READ0__irq_ext_vector_nr__##f26##__VAL(R_IRQ_READ0_, irq_ext_vector_nr_, v26) << R_IRQ_READ0__irq_ext_vector_nr__BITNR) | \
+ (R_IRQ_READ0__irq_int_vector_nr__##f27##__VAL(R_IRQ_READ0_, irq_int_vector_nr_, v27) << R_IRQ_READ0__irq_int_vector_nr__BITNR) | \
+ (R_IRQ_READ0__ext_dma1__##f28##__VAL(R_IRQ_READ0_, ext_dma1_, v28) << R_IRQ_READ0__ext_dma1__BITNR) | \
+ (R_IRQ_READ0__ext_dma0__##f29##__VAL(R_IRQ_READ0_, ext_dma0_, v29) << R_IRQ_READ0__ext_dma0__BITNR) | \
+ (R_IRQ_READ0__timer1__##f30##__VAL(R_IRQ_READ0_, timer1_, v30) << R_IRQ_READ0__timer1__BITNR) | \
+ (R_IRQ_READ0__timer0__##f31##__VAL(R_IRQ_READ0_, timer0_, v31) << R_IRQ_READ0__timer0__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_READ0_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_READ0.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_READ0_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19,f20_,v20,f21_,v21,f22_,v22,f23_,v23,f24_,v24,f25_,v25,f26_,v26,f27_,v27,f28_,v28,f29_,v29,f30_,v30,f31_,v31) ( \
+ (R_IRQ_READ0__nmi_pin__##f1_##_VAL(R_IRQ_READ0_, nmi_pin_, v1) << R_IRQ_READ0__nmi_pin__BITNR) | \
+ (R_IRQ_READ0__watchdog_nmi__##f2_##_VAL(R_IRQ_READ0_, watchdog_nmi_, v2) << R_IRQ_READ0__watchdog_nmi__BITNR) | \
+ (R_IRQ_READ0__sqe_test_error__##f3_##_VAL(R_IRQ_READ0_, sqe_test_error_, v3) << R_IRQ_READ0__sqe_test_error__BITNR) | \
+ (R_IRQ_READ0__carrier_loss__##f4_##_VAL(R_IRQ_READ0_, carrier_loss_, v4) << R_IRQ_READ0__carrier_loss__BITNR) | \
+ (R_IRQ_READ0__deferred__##f5_##_VAL(R_IRQ_READ0_, deferred_, v5) << R_IRQ_READ0__deferred__BITNR) | \
+ (R_IRQ_READ0__late_col__##f6_##_VAL(R_IRQ_READ0_, late_col_, v6) << R_IRQ_READ0__late_col__BITNR) | \
+ (R_IRQ_READ0__multiple_col__##f7_##_VAL(R_IRQ_READ0_, multiple_col_, v7) << R_IRQ_READ0__multiple_col__BITNR) | \
+ (R_IRQ_READ0__single_col__##f8_##_VAL(R_IRQ_READ0_, single_col_, v8) << R_IRQ_READ0__single_col__BITNR) | \
+ (R_IRQ_READ0__congestion__##f9_##_VAL(R_IRQ_READ0_, congestion_, v9) << R_IRQ_READ0__congestion__BITNR) | \
+ (R_IRQ_READ0__oversize__##f10_##_VAL(R_IRQ_READ0_, oversize_, v10) << R_IRQ_READ0__oversize__BITNR) | \
+ (R_IRQ_READ0__alignment_error__##f11_##_VAL(R_IRQ_READ0_, alignment_error_, v11) << R_IRQ_READ0__alignment_error__BITNR) | \
+ (R_IRQ_READ0__crc_error__##f12_##_VAL(R_IRQ_READ0_, crc_error_, v12) << R_IRQ_READ0__crc_error__BITNR) | \
+ (R_IRQ_READ0__overrun__##f13_##_VAL(R_IRQ_READ0_, overrun_, v13) << R_IRQ_READ0__overrun__BITNR) | \
+ (R_IRQ_READ0__underrun__##f14_##_VAL(R_IRQ_READ0_, underrun_, v14) << R_IRQ_READ0__underrun__BITNR) | \
+ (R_IRQ_READ0__excessive_col__##f15_##_VAL(R_IRQ_READ0_, excessive_col_, v15) << R_IRQ_READ0__excessive_col__BITNR) | \
+ (R_IRQ_READ0__mdio__##f16_##_VAL(R_IRQ_READ0_, mdio_, v16) << R_IRQ_READ0__mdio__BITNR) | \
+ (R_IRQ_READ0__ata_drq3__##f17_##_VAL(R_IRQ_READ0_, ata_drq3_, v17) << R_IRQ_READ0__ata_drq3__BITNR) | \
+ (R_IRQ_READ0__ata_drq2__##f18_##_VAL(R_IRQ_READ0_, ata_drq2_, v18) << R_IRQ_READ0__ata_drq2__BITNR) | \
+ (R_IRQ_READ0__ata_drq1__##f19_##_VAL(R_IRQ_READ0_, ata_drq1_, v19) << R_IRQ_READ0__ata_drq1__BITNR) | \
+ (R_IRQ_READ0__ata_drq0__##f20_##_VAL(R_IRQ_READ0_, ata_drq0_, v20) << R_IRQ_READ0__ata_drq0__BITNR) | \
+ (R_IRQ_READ0__par0_ecp_cmd__##f21_##_VAL(R_IRQ_READ0_, par0_ecp_cmd_, v21) << R_IRQ_READ0__par0_ecp_cmd__BITNR) | \
+ (R_IRQ_READ0__par0_peri__##f22_##_VAL(R_IRQ_READ0_, par0_peri_, v22) << R_IRQ_READ0__par0_peri__BITNR) | \
+ (R_IRQ_READ0__par0_data__##f23_##_VAL(R_IRQ_READ0_, par0_data_, v23) << R_IRQ_READ0__par0_data__BITNR) | \
+ (R_IRQ_READ0__par0_ready__##f24_##_VAL(R_IRQ_READ0_, par0_ready_, v24) << R_IRQ_READ0__par0_ready__BITNR) | \
+ (R_IRQ_READ0__ata_dmaend__##f25_##_VAL(R_IRQ_READ0_, ata_dmaend_, v25) << R_IRQ_READ0__ata_dmaend__BITNR) | \
+ (R_IRQ_READ0__irq_ext_vector_nr__##f26_##_VAL(R_IRQ_READ0_, irq_ext_vector_nr_, v26) << R_IRQ_READ0__irq_ext_vector_nr__BITNR) | \
+ (R_IRQ_READ0__irq_int_vector_nr__##f27_##_VAL(R_IRQ_READ0_, irq_int_vector_nr_, v27) << R_IRQ_READ0__irq_int_vector_nr__BITNR) | \
+ (R_IRQ_READ0__ext_dma1__##f28_##_VAL(R_IRQ_READ0_, ext_dma1_, v28) << R_IRQ_READ0__ext_dma1__BITNR) | \
+ (R_IRQ_READ0__ext_dma0__##f29_##_VAL(R_IRQ_READ0_, ext_dma0_, v29) << R_IRQ_READ0__ext_dma0__BITNR) | \
+ (R_IRQ_READ0__timer1__##f30_##_VAL(R_IRQ_READ0_, timer1_, v30) << R_IRQ_READ0__timer1__BITNR) | \
+ (R_IRQ_READ0__timer0__##f31_##_VAL(R_IRQ_READ0_, timer0_, v31) << R_IRQ_READ0__timer0__BITNR) \
+)
+
+#endif
+
+/*
+ * R_IRQ_READ1
+ * - type: RO
+ * - addr: 0xb00000cc
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_IRQ_READ1
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_IRQ_READ1(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28) ( \
+ (R_IRQ_READ1__sw_int7__##f1##__MASK & REG__##v1) | \
+ (R_IRQ_READ1__sw_int6__##f2##__MASK & REG__##v2) | \
+ (R_IRQ_READ1__sw_int5__##f3##__MASK & REG__##v3) | \
+ (R_IRQ_READ1__sw_int4__##f4##__MASK & REG__##v4) | \
+ (R_IRQ_READ1__sw_int3__##f5##__MASK & REG__##v5) | \
+ (R_IRQ_READ1__sw_int2__##f6##__MASK & REG__##v6) | \
+ (R_IRQ_READ1__sw_int1__##f7##__MASK & REG__##v7) | \
+ (R_IRQ_READ1__sw_int0__##f8##__MASK & REG__##v8) | \
+ (R_IRQ_READ1__par1_ecp_cmd__##f9##__MASK & REG__##v9) | \
+ (R_IRQ_READ1__par1_peri__##f10##__MASK & REG__##v10) | \
+ (R_IRQ_READ1__par1_data__##f11##__MASK & REG__##v11) | \
+ (R_IRQ_READ1__par1_ready__##f12##__MASK & REG__##v12) | \
+ (R_IRQ_READ1__ser3_ready__##f13##__MASK & REG__##v13) | \
+ (R_IRQ_READ1__ser3_data__##f14##__MASK & REG__##v14) | \
+ (R_IRQ_READ1__ser2_ready__##f15##__MASK & REG__##v15) | \
+ (R_IRQ_READ1__ser2_data__##f16##__MASK & REG__##v16) | \
+ (R_IRQ_READ1__ser1_ready__##f17##__MASK & REG__##v17) | \
+ (R_IRQ_READ1__ser1_data__##f18##__MASK & REG__##v18) | \
+ (R_IRQ_READ1__ser0_ready__##f19##__MASK & REG__##v19) | \
+ (R_IRQ_READ1__ser0_data__##f20##__MASK & REG__##v20) | \
+ (R_IRQ_READ1__pa7__##f21##__MASK & REG__##v21) | \
+ (R_IRQ_READ1__pa6__##f22##__MASK & REG__##v22) | \
+ (R_IRQ_READ1__pa5__##f23##__MASK & REG__##v23) | \
+ (R_IRQ_READ1__pa4__##f24##__MASK & REG__##v24) | \
+ (R_IRQ_READ1__pa3__##f25##__MASK & REG__##v25) | \
+ (R_IRQ_READ1__pa2__##f26##__MASK & REG__##v26) | \
+ (R_IRQ_READ1__pa1__##f27##__MASK & REG__##v27) | \
+ (R_IRQ_READ1__pa0__##f28##__MASK & REG__##v28) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_READ1
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_READ1.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_READ1(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25,f26,v26,f27,v27,f28,v28) ( \
+ (R_IRQ_READ1__sw_int7__##f1##__VAL(R_IRQ_READ1_, sw_int7_, v1) << R_IRQ_READ1__sw_int7__BITNR) | \
+ (R_IRQ_READ1__sw_int6__##f2##__VAL(R_IRQ_READ1_, sw_int6_, v2) << R_IRQ_READ1__sw_int6__BITNR) | \
+ (R_IRQ_READ1__sw_int5__##f3##__VAL(R_IRQ_READ1_, sw_int5_, v3) << R_IRQ_READ1__sw_int5__BITNR) | \
+ (R_IRQ_READ1__sw_int4__##f4##__VAL(R_IRQ_READ1_, sw_int4_, v4) << R_IRQ_READ1__sw_int4__BITNR) | \
+ (R_IRQ_READ1__sw_int3__##f5##__VAL(R_IRQ_READ1_, sw_int3_, v5) << R_IRQ_READ1__sw_int3__BITNR) | \
+ (R_IRQ_READ1__sw_int2__##f6##__VAL(R_IRQ_READ1_, sw_int2_, v6) << R_IRQ_READ1__sw_int2__BITNR) | \
+ (R_IRQ_READ1__sw_int1__##f7##__VAL(R_IRQ_READ1_, sw_int1_, v7) << R_IRQ_READ1__sw_int1__BITNR) | \
+ (R_IRQ_READ1__sw_int0__##f8##__VAL(R_IRQ_READ1_, sw_int0_, v8) << R_IRQ_READ1__sw_int0__BITNR) | \
+ (R_IRQ_READ1__par1_ecp_cmd__##f9##__VAL(R_IRQ_READ1_, par1_ecp_cmd_, v9) << R_IRQ_READ1__par1_ecp_cmd__BITNR) | \
+ (R_IRQ_READ1__par1_peri__##f10##__VAL(R_IRQ_READ1_, par1_peri_, v10) << R_IRQ_READ1__par1_peri__BITNR) | \
+ (R_IRQ_READ1__par1_data__##f11##__VAL(R_IRQ_READ1_, par1_data_, v11) << R_IRQ_READ1__par1_data__BITNR) | \
+ (R_IRQ_READ1__par1_ready__##f12##__VAL(R_IRQ_READ1_, par1_ready_, v12) << R_IRQ_READ1__par1_ready__BITNR) | \
+ (R_IRQ_READ1__ser3_ready__##f13##__VAL(R_IRQ_READ1_, ser3_ready_, v13) << R_IRQ_READ1__ser3_ready__BITNR) | \
+ (R_IRQ_READ1__ser3_data__##f14##__VAL(R_IRQ_READ1_, ser3_data_, v14) << R_IRQ_READ1__ser3_data__BITNR) | \
+ (R_IRQ_READ1__ser2_ready__##f15##__VAL(R_IRQ_READ1_, ser2_ready_, v15) << R_IRQ_READ1__ser2_ready__BITNR) | \
+ (R_IRQ_READ1__ser2_data__##f16##__VAL(R_IRQ_READ1_, ser2_data_, v16) << R_IRQ_READ1__ser2_data__BITNR) | \
+ (R_IRQ_READ1__ser1_ready__##f17##__VAL(R_IRQ_READ1_, ser1_ready_, v17) << R_IRQ_READ1__ser1_ready__BITNR) | \
+ (R_IRQ_READ1__ser1_data__##f18##__VAL(R_IRQ_READ1_, ser1_data_, v18) << R_IRQ_READ1__ser1_data__BITNR) | \
+ (R_IRQ_READ1__ser0_ready__##f19##__VAL(R_IRQ_READ1_, ser0_ready_, v19) << R_IRQ_READ1__ser0_ready__BITNR) | \
+ (R_IRQ_READ1__ser0_data__##f20##__VAL(R_IRQ_READ1_, ser0_data_, v20) << R_IRQ_READ1__ser0_data__BITNR) | \
+ (R_IRQ_READ1__pa7__##f21##__VAL(R_IRQ_READ1_, pa7_, v21) << R_IRQ_READ1__pa7__BITNR) | \
+ (R_IRQ_READ1__pa6__##f22##__VAL(R_IRQ_READ1_, pa6_, v22) << R_IRQ_READ1__pa6__BITNR) | \
+ (R_IRQ_READ1__pa5__##f23##__VAL(R_IRQ_READ1_, pa5_, v23) << R_IRQ_READ1__pa5__BITNR) | \
+ (R_IRQ_READ1__pa4__##f24##__VAL(R_IRQ_READ1_, pa4_, v24) << R_IRQ_READ1__pa4__BITNR) | \
+ (R_IRQ_READ1__pa3__##f25##__VAL(R_IRQ_READ1_, pa3_, v25) << R_IRQ_READ1__pa3__BITNR) | \
+ (R_IRQ_READ1__pa2__##f26##__VAL(R_IRQ_READ1_, pa2_, v26) << R_IRQ_READ1__pa2__BITNR) | \
+ (R_IRQ_READ1__pa1__##f27##__VAL(R_IRQ_READ1_, pa1_, v27) << R_IRQ_READ1__pa1__BITNR) | \
+ (R_IRQ_READ1__pa0__##f28##__VAL(R_IRQ_READ1_, pa0_, v28) << R_IRQ_READ1__pa0__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_READ1_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_READ1.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_READ1_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19,f20_,v20,f21_,v21,f22_,v22,f23_,v23,f24_,v24,f25_,v25,f26_,v26,f27_,v27,f28_,v28) ( \
+ (R_IRQ_READ1__sw_int7__##f1_##_VAL(R_IRQ_READ1_, sw_int7_, v1) << R_IRQ_READ1__sw_int7__BITNR) | \
+ (R_IRQ_READ1__sw_int6__##f2_##_VAL(R_IRQ_READ1_, sw_int6_, v2) << R_IRQ_READ1__sw_int6__BITNR) | \
+ (R_IRQ_READ1__sw_int5__##f3_##_VAL(R_IRQ_READ1_, sw_int5_, v3) << R_IRQ_READ1__sw_int5__BITNR) | \
+ (R_IRQ_READ1__sw_int4__##f4_##_VAL(R_IRQ_READ1_, sw_int4_, v4) << R_IRQ_READ1__sw_int4__BITNR) | \
+ (R_IRQ_READ1__sw_int3__##f5_##_VAL(R_IRQ_READ1_, sw_int3_, v5) << R_IRQ_READ1__sw_int3__BITNR) | \
+ (R_IRQ_READ1__sw_int2__##f6_##_VAL(R_IRQ_READ1_, sw_int2_, v6) << R_IRQ_READ1__sw_int2__BITNR) | \
+ (R_IRQ_READ1__sw_int1__##f7_##_VAL(R_IRQ_READ1_, sw_int1_, v7) << R_IRQ_READ1__sw_int1__BITNR) | \
+ (R_IRQ_READ1__sw_int0__##f8_##_VAL(R_IRQ_READ1_, sw_int0_, v8) << R_IRQ_READ1__sw_int0__BITNR) | \
+ (R_IRQ_READ1__par1_ecp_cmd__##f9_##_VAL(R_IRQ_READ1_, par1_ecp_cmd_, v9) << R_IRQ_READ1__par1_ecp_cmd__BITNR) | \
+ (R_IRQ_READ1__par1_peri__##f10_##_VAL(R_IRQ_READ1_, par1_peri_, v10) << R_IRQ_READ1__par1_peri__BITNR) | \
+ (R_IRQ_READ1__par1_data__##f11_##_VAL(R_IRQ_READ1_, par1_data_, v11) << R_IRQ_READ1__par1_data__BITNR) | \
+ (R_IRQ_READ1__par1_ready__##f12_##_VAL(R_IRQ_READ1_, par1_ready_, v12) << R_IRQ_READ1__par1_ready__BITNR) | \
+ (R_IRQ_READ1__ser3_ready__##f13_##_VAL(R_IRQ_READ1_, ser3_ready_, v13) << R_IRQ_READ1__ser3_ready__BITNR) | \
+ (R_IRQ_READ1__ser3_data__##f14_##_VAL(R_IRQ_READ1_, ser3_data_, v14) << R_IRQ_READ1__ser3_data__BITNR) | \
+ (R_IRQ_READ1__ser2_ready__##f15_##_VAL(R_IRQ_READ1_, ser2_ready_, v15) << R_IRQ_READ1__ser2_ready__BITNR) | \
+ (R_IRQ_READ1__ser2_data__##f16_##_VAL(R_IRQ_READ1_, ser2_data_, v16) << R_IRQ_READ1__ser2_data__BITNR) | \
+ (R_IRQ_READ1__ser1_ready__##f17_##_VAL(R_IRQ_READ1_, ser1_ready_, v17) << R_IRQ_READ1__ser1_ready__BITNR) | \
+ (R_IRQ_READ1__ser1_data__##f18_##_VAL(R_IRQ_READ1_, ser1_data_, v18) << R_IRQ_READ1__ser1_data__BITNR) | \
+ (R_IRQ_READ1__ser0_ready__##f19_##_VAL(R_IRQ_READ1_, ser0_ready_, v19) << R_IRQ_READ1__ser0_ready__BITNR) | \
+ (R_IRQ_READ1__ser0_data__##f20_##_VAL(R_IRQ_READ1_, ser0_data_, v20) << R_IRQ_READ1__ser0_data__BITNR) | \
+ (R_IRQ_READ1__pa7__##f21_##_VAL(R_IRQ_READ1_, pa7_, v21) << R_IRQ_READ1__pa7__BITNR) | \
+ (R_IRQ_READ1__pa6__##f22_##_VAL(R_IRQ_READ1_, pa6_, v22) << R_IRQ_READ1__pa6__BITNR) | \
+ (R_IRQ_READ1__pa5__##f23_##_VAL(R_IRQ_READ1_, pa5_, v23) << R_IRQ_READ1__pa5__BITNR) | \
+ (R_IRQ_READ1__pa4__##f24_##_VAL(R_IRQ_READ1_, pa4_, v24) << R_IRQ_READ1__pa4__BITNR) | \
+ (R_IRQ_READ1__pa3__##f25_##_VAL(R_IRQ_READ1_, pa3_, v25) << R_IRQ_READ1__pa3__BITNR) | \
+ (R_IRQ_READ1__pa2__##f26_##_VAL(R_IRQ_READ1_, pa2_, v26) << R_IRQ_READ1__pa2__BITNR) | \
+ (R_IRQ_READ1__pa1__##f27_##_VAL(R_IRQ_READ1_, pa1_, v27) << R_IRQ_READ1__pa1__BITNR) | \
+ (R_IRQ_READ1__pa0__##f28_##_VAL(R_IRQ_READ1_, pa0_, v28) << R_IRQ_READ1__pa0__BITNR) \
+)
+
+#endif
+
+/*
+ * R_IRQ_READ2
+ * - type: RO
+ * - addr: 0xb00000d4
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_IRQ_READ2
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_IRQ_READ2(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24) ( \
+ (R_IRQ_READ2__dma8_sub3_descr__##f1##__MASK & REG__##v1) | \
+ (R_IRQ_READ2__dma8_sub2_descr__##f2##__MASK & REG__##v2) | \
+ (R_IRQ_READ2__dma8_sub1_descr__##f3##__MASK & REG__##v3) | \
+ (R_IRQ_READ2__dma8_sub0_descr__##f4##__MASK & REG__##v4) | \
+ (R_IRQ_READ2__dma9_eop__##f5##__MASK & REG__##v5) | \
+ (R_IRQ_READ2__dma9_descr__##f6##__MASK & REG__##v6) | \
+ (R_IRQ_READ2__dma8_eop__##f7##__MASK & REG__##v7) | \
+ (R_IRQ_READ2__dma8_descr__##f8##__MASK & REG__##v8) | \
+ (R_IRQ_READ2__dma7_eop__##f9##__MASK & REG__##v9) | \
+ (R_IRQ_READ2__dma7_descr__##f10##__MASK & REG__##v10) | \
+ (R_IRQ_READ2__dma6_eop__##f11##__MASK & REG__##v11) | \
+ (R_IRQ_READ2__dma6_descr__##f12##__MASK & REG__##v12) | \
+ (R_IRQ_READ2__dma5_eop__##f13##__MASK & REG__##v13) | \
+ (R_IRQ_READ2__dma5_descr__##f14##__MASK & REG__##v14) | \
+ (R_IRQ_READ2__dma4_eop__##f15##__MASK & REG__##v15) | \
+ (R_IRQ_READ2__dma4_descr__##f16##__MASK & REG__##v16) | \
+ (R_IRQ_READ2__dma3_eop__##f17##__MASK & REG__##v17) | \
+ (R_IRQ_READ2__dma3_descr__##f18##__MASK & REG__##v18) | \
+ (R_IRQ_READ2__dma2_eop__##f19##__MASK & REG__##v19) | \
+ (R_IRQ_READ2__dma2_descr__##f20##__MASK & REG__##v20) | \
+ (R_IRQ_READ2__dma1_eop__##f21##__MASK & REG__##v21) | \
+ (R_IRQ_READ2__dma1_descr__##f22##__MASK & REG__##v22) | \
+ (R_IRQ_READ2__dma0_eop__##f23##__MASK & REG__##v23) | \
+ (R_IRQ_READ2__dma0_descr__##f24##__MASK & REG__##v24) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_READ2
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_READ2.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_READ2(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24) ( \
+ (R_IRQ_READ2__dma8_sub3_descr__##f1##__VAL(R_IRQ_READ2_, dma8_sub3_descr_, v1) << R_IRQ_READ2__dma8_sub3_descr__BITNR) | \
+ (R_IRQ_READ2__dma8_sub2_descr__##f2##__VAL(R_IRQ_READ2_, dma8_sub2_descr_, v2) << R_IRQ_READ2__dma8_sub2_descr__BITNR) | \
+ (R_IRQ_READ2__dma8_sub1_descr__##f3##__VAL(R_IRQ_READ2_, dma8_sub1_descr_, v3) << R_IRQ_READ2__dma8_sub1_descr__BITNR) | \
+ (R_IRQ_READ2__dma8_sub0_descr__##f4##__VAL(R_IRQ_READ2_, dma8_sub0_descr_, v4) << R_IRQ_READ2__dma8_sub0_descr__BITNR) | \
+ (R_IRQ_READ2__dma9_eop__##f5##__VAL(R_IRQ_READ2_, dma9_eop_, v5) << R_IRQ_READ2__dma9_eop__BITNR) | \
+ (R_IRQ_READ2__dma9_descr__##f6##__VAL(R_IRQ_READ2_, dma9_descr_, v6) << R_IRQ_READ2__dma9_descr__BITNR) | \
+ (R_IRQ_READ2__dma8_eop__##f7##__VAL(R_IRQ_READ2_, dma8_eop_, v7) << R_IRQ_READ2__dma8_eop__BITNR) | \
+ (R_IRQ_READ2__dma8_descr__##f8##__VAL(R_IRQ_READ2_, dma8_descr_, v8) << R_IRQ_READ2__dma8_descr__BITNR) | \
+ (R_IRQ_READ2__dma7_eop__##f9##__VAL(R_IRQ_READ2_, dma7_eop_, v9) << R_IRQ_READ2__dma7_eop__BITNR) | \
+ (R_IRQ_READ2__dma7_descr__##f10##__VAL(R_IRQ_READ2_, dma7_descr_, v10) << R_IRQ_READ2__dma7_descr__BITNR) | \
+ (R_IRQ_READ2__dma6_eop__##f11##__VAL(R_IRQ_READ2_, dma6_eop_, v11) << R_IRQ_READ2__dma6_eop__BITNR) | \
+ (R_IRQ_READ2__dma6_descr__##f12##__VAL(R_IRQ_READ2_, dma6_descr_, v12) << R_IRQ_READ2__dma6_descr__BITNR) | \
+ (R_IRQ_READ2__dma5_eop__##f13##__VAL(R_IRQ_READ2_, dma5_eop_, v13) << R_IRQ_READ2__dma5_eop__BITNR) | \
+ (R_IRQ_READ2__dma5_descr__##f14##__VAL(R_IRQ_READ2_, dma5_descr_, v14) << R_IRQ_READ2__dma5_descr__BITNR) | \
+ (R_IRQ_READ2__dma4_eop__##f15##__VAL(R_IRQ_READ2_, dma4_eop_, v15) << R_IRQ_READ2__dma4_eop__BITNR) | \
+ (R_IRQ_READ2__dma4_descr__##f16##__VAL(R_IRQ_READ2_, dma4_descr_, v16) << R_IRQ_READ2__dma4_descr__BITNR) | \
+ (R_IRQ_READ2__dma3_eop__##f17##__VAL(R_IRQ_READ2_, dma3_eop_, v17) << R_IRQ_READ2__dma3_eop__BITNR) | \
+ (R_IRQ_READ2__dma3_descr__##f18##__VAL(R_IRQ_READ2_, dma3_descr_, v18) << R_IRQ_READ2__dma3_descr__BITNR) | \
+ (R_IRQ_READ2__dma2_eop__##f19##__VAL(R_IRQ_READ2_, dma2_eop_, v19) << R_IRQ_READ2__dma2_eop__BITNR) | \
+ (R_IRQ_READ2__dma2_descr__##f20##__VAL(R_IRQ_READ2_, dma2_descr_, v20) << R_IRQ_READ2__dma2_descr__BITNR) | \
+ (R_IRQ_READ2__dma1_eop__##f21##__VAL(R_IRQ_READ2_, dma1_eop_, v21) << R_IRQ_READ2__dma1_eop__BITNR) | \
+ (R_IRQ_READ2__dma1_descr__##f22##__VAL(R_IRQ_READ2_, dma1_descr_, v22) << R_IRQ_READ2__dma1_descr__BITNR) | \
+ (R_IRQ_READ2__dma0_eop__##f23##__VAL(R_IRQ_READ2_, dma0_eop_, v23) << R_IRQ_READ2__dma0_eop__BITNR) | \
+ (R_IRQ_READ2__dma0_descr__##f24##__VAL(R_IRQ_READ2_, dma0_descr_, v24) << R_IRQ_READ2__dma0_descr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_IRQ_READ2_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_IRQ_READ2.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_IRQ_READ2_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19,f20_,v20,f21_,v21,f22_,v22,f23_,v23,f24_,v24) ( \
+ (R_IRQ_READ2__dma8_sub3_descr__##f1_##_VAL(R_IRQ_READ2_, dma8_sub3_descr_, v1) << R_IRQ_READ2__dma8_sub3_descr__BITNR) | \
+ (R_IRQ_READ2__dma8_sub2_descr__##f2_##_VAL(R_IRQ_READ2_, dma8_sub2_descr_, v2) << R_IRQ_READ2__dma8_sub2_descr__BITNR) | \
+ (R_IRQ_READ2__dma8_sub1_descr__##f3_##_VAL(R_IRQ_READ2_, dma8_sub1_descr_, v3) << R_IRQ_READ2__dma8_sub1_descr__BITNR) | \
+ (R_IRQ_READ2__dma8_sub0_descr__##f4_##_VAL(R_IRQ_READ2_, dma8_sub0_descr_, v4) << R_IRQ_READ2__dma8_sub0_descr__BITNR) | \
+ (R_IRQ_READ2__dma9_eop__##f5_##_VAL(R_IRQ_READ2_, dma9_eop_, v5) << R_IRQ_READ2__dma9_eop__BITNR) | \
+ (R_IRQ_READ2__dma9_descr__##f6_##_VAL(R_IRQ_READ2_, dma9_descr_, v6) << R_IRQ_READ2__dma9_descr__BITNR) | \
+ (R_IRQ_READ2__dma8_eop__##f7_##_VAL(R_IRQ_READ2_, dma8_eop_, v7) << R_IRQ_READ2__dma8_eop__BITNR) | \
+ (R_IRQ_READ2__dma8_descr__##f8_##_VAL(R_IRQ_READ2_, dma8_descr_, v8) << R_IRQ_READ2__dma8_descr__BITNR) | \
+ (R_IRQ_READ2__dma7_eop__##f9_##_VAL(R_IRQ_READ2_, dma7_eop_, v9) << R_IRQ_READ2__dma7_eop__BITNR) | \
+ (R_IRQ_READ2__dma7_descr__##f10_##_VAL(R_IRQ_READ2_, dma7_descr_, v10) << R_IRQ_READ2__dma7_descr__BITNR) | \
+ (R_IRQ_READ2__dma6_eop__##f11_##_VAL(R_IRQ_READ2_, dma6_eop_, v11) << R_IRQ_READ2__dma6_eop__BITNR) | \
+ (R_IRQ_READ2__dma6_descr__##f12_##_VAL(R_IRQ_READ2_, dma6_descr_, v12) << R_IRQ_READ2__dma6_descr__BITNR) | \
+ (R_IRQ_READ2__dma5_eop__##f13_##_VAL(R_IRQ_READ2_, dma5_eop_, v13) << R_IRQ_READ2__dma5_eop__BITNR) | \
+ (R_IRQ_READ2__dma5_descr__##f14_##_VAL(R_IRQ_READ2_, dma5_descr_, v14) << R_IRQ_READ2__dma5_descr__BITNR) | \
+ (R_IRQ_READ2__dma4_eop__##f15_##_VAL(R_IRQ_READ2_, dma4_eop_, v15) << R_IRQ_READ2__dma4_eop__BITNR) | \
+ (R_IRQ_READ2__dma4_descr__##f16_##_VAL(R_IRQ_READ2_, dma4_descr_, v16) << R_IRQ_READ2__dma4_descr__BITNR) | \
+ (R_IRQ_READ2__dma3_eop__##f17_##_VAL(R_IRQ_READ2_, dma3_eop_, v17) << R_IRQ_READ2__dma3_eop__BITNR) | \
+ (R_IRQ_READ2__dma3_descr__##f18_##_VAL(R_IRQ_READ2_, dma3_descr_, v18) << R_IRQ_READ2__dma3_descr__BITNR) | \
+ (R_IRQ_READ2__dma2_eop__##f19_##_VAL(R_IRQ_READ2_, dma2_eop_, v19) << R_IRQ_READ2__dma2_eop__BITNR) | \
+ (R_IRQ_READ2__dma2_descr__##f20_##_VAL(R_IRQ_READ2_, dma2_descr_, v20) << R_IRQ_READ2__dma2_descr__BITNR) | \
+ (R_IRQ_READ2__dma1_eop__##f21_##_VAL(R_IRQ_READ2_, dma1_eop_, v21) << R_IRQ_READ2__dma1_eop__BITNR) | \
+ (R_IRQ_READ2__dma1_descr__##f22_##_VAL(R_IRQ_READ2_, dma1_descr_, v22) << R_IRQ_READ2__dma1_descr__BITNR) | \
+ (R_IRQ_READ2__dma0_eop__##f23_##_VAL(R_IRQ_READ2_, dma0_eop_, v23) << R_IRQ_READ2__dma0_eop__BITNR) | \
+ (R_IRQ_READ2__dma0_descr__##f24_##_VAL(R_IRQ_READ2_, dma0_descr_, v24) << R_IRQ_READ2__dma0_descr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_MMU_CAUSE
+ * - type: RO
+ * - addr: 0xb0000250
+ * - group: MMU registers
+ */
+
+#if USE_GROUP__MMU_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_MMU_CAUSE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_MMU_CAUSE(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7) ( \
+ (R_MMU_CAUSE__vpn__##f1##__MASK & REG__##v1) | \
+ (R_MMU_CAUSE__miss_excp__##f2##__MASK & REG__##v2) | \
+ (R_MMU_CAUSE__inv_excp__##f3##__MASK & REG__##v3) | \
+ (R_MMU_CAUSE__acc_excp__##f4##__MASK & REG__##v4) | \
+ (R_MMU_CAUSE__we_excp__##f5##__MASK & REG__##v5) | \
+ (R_MMU_CAUSE__wr_rd__##f6##__MASK & REG__##v6) | \
+ (R_MMU_CAUSE__page_id__##f7##__MASK & REG__##v7) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_MMU_CAUSE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_MMU_CAUSE.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_MMU_CAUSE(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7) ( \
+ (R_MMU_CAUSE__vpn__##f1##__VAL(R_MMU_CAUSE_, vpn_, v1) << R_MMU_CAUSE__vpn__BITNR) | \
+ (R_MMU_CAUSE__miss_excp__##f2##__VAL(R_MMU_CAUSE_, miss_excp_, v2) << R_MMU_CAUSE__miss_excp__BITNR) | \
+ (R_MMU_CAUSE__inv_excp__##f3##__VAL(R_MMU_CAUSE_, inv_excp_, v3) << R_MMU_CAUSE__inv_excp__BITNR) | \
+ (R_MMU_CAUSE__acc_excp__##f4##__VAL(R_MMU_CAUSE_, acc_excp_, v4) << R_MMU_CAUSE__acc_excp__BITNR) | \
+ (R_MMU_CAUSE__we_excp__##f5##__VAL(R_MMU_CAUSE_, we_excp_, v5) << R_MMU_CAUSE__we_excp__BITNR) | \
+ (R_MMU_CAUSE__wr_rd__##f6##__VAL(R_MMU_CAUSE_, wr_rd_, v6) << R_MMU_CAUSE__wr_rd__BITNR) | \
+ (R_MMU_CAUSE__page_id__##f7##__VAL(R_MMU_CAUSE_, page_id_, v7) << R_MMU_CAUSE__page_id__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_MMU_CAUSE_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_MMU_CAUSE.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_MMU_CAUSE_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7) ( \
+ (R_MMU_CAUSE__vpn__##f1_##_VAL(R_MMU_CAUSE_, vpn_, v1) << R_MMU_CAUSE__vpn__BITNR) | \
+ (R_MMU_CAUSE__miss_excp__##f2_##_VAL(R_MMU_CAUSE_, miss_excp_, v2) << R_MMU_CAUSE__miss_excp__BITNR) | \
+ (R_MMU_CAUSE__inv_excp__##f3_##_VAL(R_MMU_CAUSE_, inv_excp_, v3) << R_MMU_CAUSE__inv_excp__BITNR) | \
+ (R_MMU_CAUSE__acc_excp__##f4_##_VAL(R_MMU_CAUSE_, acc_excp_, v4) << R_MMU_CAUSE__acc_excp__BITNR) | \
+ (R_MMU_CAUSE__we_excp__##f5_##_VAL(R_MMU_CAUSE_, we_excp_, v5) << R_MMU_CAUSE__we_excp__BITNR) | \
+ (R_MMU_CAUSE__wr_rd__##f6_##_VAL(R_MMU_CAUSE_, wr_rd_, v6) << R_MMU_CAUSE__wr_rd__BITNR) | \
+ (R_MMU_CAUSE__page_id__##f7_##_VAL(R_MMU_CAUSE_, page_id_, v7) << R_MMU_CAUSE__page_id__BITNR) \
+)
+
+#endif
+
+/*
+ * R_MMU_CONFIG
+ * - type: WO
+ * - addr: 0xb0000240
+ * - group: MMU registers
+ */
+
+#if USE_GROUP__MMU_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_MMU_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_MMU_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_MMU_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_MMU_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20) ( \
+ *R_MMU_CONFIG__SADDR = ( \
+ REG_INITIATED(R_MMU_CONFIG_) \
+ REG_VAL__R_MMU_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20) \
+ ), \
+ R_MMU_CONFIG__WRITE(R_MMU_CONFIG__ADDR, *R_MMU_CONFIG__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_MMU_CONFIG__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_MMU_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_MMU_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_MMU_CONFIG__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20) ( \
+ *R_MMU_CONFIG__SADDR = ( \
+ REG_INITIATED(R_MMU_CONFIG_) \
+ REG_VAL__R_MMU_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_MMU_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_MMU_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20) ( \
+ (R_MMU_CONFIG__mmu_enable__##f1##__MASK & REG__##v1) | \
+ (R_MMU_CONFIG__inv_excp__##f2##__MASK & REG__##v2) | \
+ (R_MMU_CONFIG__acc_excp__##f3##__MASK & REG__##v3) | \
+ (R_MMU_CONFIG__we_excp__##f4##__MASK & REG__##v4) | \
+ (R_MMU_CONFIG__seg_f__##f5##__MASK & REG__##v5) | \
+ (R_MMU_CONFIG__seg_e__##f6##__MASK & REG__##v6) | \
+ (R_MMU_CONFIG__seg_d__##f7##__MASK & REG__##v7) | \
+ (R_MMU_CONFIG__seg_c__##f8##__MASK & REG__##v8) | \
+ (R_MMU_CONFIG__seg_b__##f9##__MASK & REG__##v9) | \
+ (R_MMU_CONFIG__seg_a__##f10##__MASK & REG__##v10) | \
+ (R_MMU_CONFIG__seg_9__##f11##__MASK & REG__##v11) | \
+ (R_MMU_CONFIG__seg_8__##f12##__MASK & REG__##v12) | \
+ (R_MMU_CONFIG__seg_7__##f13##__MASK & REG__##v13) | \
+ (R_MMU_CONFIG__seg_6__##f14##__MASK & REG__##v14) | \
+ (R_MMU_CONFIG__seg_5__##f15##__MASK & REG__##v15) | \
+ (R_MMU_CONFIG__seg_4__##f16##__MASK & REG__##v16) | \
+ (R_MMU_CONFIG__seg_3__##f17##__MASK & REG__##v17) | \
+ (R_MMU_CONFIG__seg_2__##f18##__MASK & REG__##v18) | \
+ (R_MMU_CONFIG__seg_1__##f19##__MASK & REG__##v19) | \
+ (R_MMU_CONFIG__seg_0__##f20##__MASK & REG__##v20) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_MMU_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_MMU_CONFIG.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_MMU_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20) ( \
+ (R_MMU_CONFIG__mmu_enable__##f1##__VAL(R_MMU_CONFIG_, mmu_enable_, v1) << R_MMU_CONFIG__mmu_enable__BITNR) | \
+ (R_MMU_CONFIG__inv_excp__##f2##__VAL(R_MMU_CONFIG_, inv_excp_, v2) << R_MMU_CONFIG__inv_excp__BITNR) | \
+ (R_MMU_CONFIG__acc_excp__##f3##__VAL(R_MMU_CONFIG_, acc_excp_, v3) << R_MMU_CONFIG__acc_excp__BITNR) | \
+ (R_MMU_CONFIG__we_excp__##f4##__VAL(R_MMU_CONFIG_, we_excp_, v4) << R_MMU_CONFIG__we_excp__BITNR) | \
+ (R_MMU_CONFIG__seg_f__##f5##__VAL(R_MMU_CONFIG_, seg_f_, v5) << R_MMU_CONFIG__seg_f__BITNR) | \
+ (R_MMU_CONFIG__seg_e__##f6##__VAL(R_MMU_CONFIG_, seg_e_, v6) << R_MMU_CONFIG__seg_e__BITNR) | \
+ (R_MMU_CONFIG__seg_d__##f7##__VAL(R_MMU_CONFIG_, seg_d_, v7) << R_MMU_CONFIG__seg_d__BITNR) | \
+ (R_MMU_CONFIG__seg_c__##f8##__VAL(R_MMU_CONFIG_, seg_c_, v8) << R_MMU_CONFIG__seg_c__BITNR) | \
+ (R_MMU_CONFIG__seg_b__##f9##__VAL(R_MMU_CONFIG_, seg_b_, v9) << R_MMU_CONFIG__seg_b__BITNR) | \
+ (R_MMU_CONFIG__seg_a__##f10##__VAL(R_MMU_CONFIG_, seg_a_, v10) << R_MMU_CONFIG__seg_a__BITNR) | \
+ (R_MMU_CONFIG__seg_9__##f11##__VAL(R_MMU_CONFIG_, seg_9_, v11) << R_MMU_CONFIG__seg_9__BITNR) | \
+ (R_MMU_CONFIG__seg_8__##f12##__VAL(R_MMU_CONFIG_, seg_8_, v12) << R_MMU_CONFIG__seg_8__BITNR) | \
+ (R_MMU_CONFIG__seg_7__##f13##__VAL(R_MMU_CONFIG_, seg_7_, v13) << R_MMU_CONFIG__seg_7__BITNR) | \
+ (R_MMU_CONFIG__seg_6__##f14##__VAL(R_MMU_CONFIG_, seg_6_, v14) << R_MMU_CONFIG__seg_6__BITNR) | \
+ (R_MMU_CONFIG__seg_5__##f15##__VAL(R_MMU_CONFIG_, seg_5_, v15) << R_MMU_CONFIG__seg_5__BITNR) | \
+ (R_MMU_CONFIG__seg_4__##f16##__VAL(R_MMU_CONFIG_, seg_4_, v16) << R_MMU_CONFIG__seg_4__BITNR) | \
+ (R_MMU_CONFIG__seg_3__##f17##__VAL(R_MMU_CONFIG_, seg_3_, v17) << R_MMU_CONFIG__seg_3__BITNR) | \
+ (R_MMU_CONFIG__seg_2__##f18##__VAL(R_MMU_CONFIG_, seg_2_, v18) << R_MMU_CONFIG__seg_2__BITNR) | \
+ (R_MMU_CONFIG__seg_1__##f19##__VAL(R_MMU_CONFIG_, seg_1_, v19) << R_MMU_CONFIG__seg_1__BITNR) | \
+ (R_MMU_CONFIG__seg_0__##f20##__VAL(R_MMU_CONFIG_, seg_0_, v20) << R_MMU_CONFIG__seg_0__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_MMU_CONFIG_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_MMU_CONFIG.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_MMU_CONFIG_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19,f20_,v20) ( \
+ (R_MMU_CONFIG__mmu_enable__##f1_##_VAL(R_MMU_CONFIG_, mmu_enable_, v1) << R_MMU_CONFIG__mmu_enable__BITNR) | \
+ (R_MMU_CONFIG__inv_excp__##f2_##_VAL(R_MMU_CONFIG_, inv_excp_, v2) << R_MMU_CONFIG__inv_excp__BITNR) | \
+ (R_MMU_CONFIG__acc_excp__##f3_##_VAL(R_MMU_CONFIG_, acc_excp_, v3) << R_MMU_CONFIG__acc_excp__BITNR) | \
+ (R_MMU_CONFIG__we_excp__##f4_##_VAL(R_MMU_CONFIG_, we_excp_, v4) << R_MMU_CONFIG__we_excp__BITNR) | \
+ (R_MMU_CONFIG__seg_f__##f5_##_VAL(R_MMU_CONFIG_, seg_f_, v5) << R_MMU_CONFIG__seg_f__BITNR) | \
+ (R_MMU_CONFIG__seg_e__##f6_##_VAL(R_MMU_CONFIG_, seg_e_, v6) << R_MMU_CONFIG__seg_e__BITNR) | \
+ (R_MMU_CONFIG__seg_d__##f7_##_VAL(R_MMU_CONFIG_, seg_d_, v7) << R_MMU_CONFIG__seg_d__BITNR) | \
+ (R_MMU_CONFIG__seg_c__##f8_##_VAL(R_MMU_CONFIG_, seg_c_, v8) << R_MMU_CONFIG__seg_c__BITNR) | \
+ (R_MMU_CONFIG__seg_b__##f9_##_VAL(R_MMU_CONFIG_, seg_b_, v9) << R_MMU_CONFIG__seg_b__BITNR) | \
+ (R_MMU_CONFIG__seg_a__##f10_##_VAL(R_MMU_CONFIG_, seg_a_, v10) << R_MMU_CONFIG__seg_a__BITNR) | \
+ (R_MMU_CONFIG__seg_9__##f11_##_VAL(R_MMU_CONFIG_, seg_9_, v11) << R_MMU_CONFIG__seg_9__BITNR) | \
+ (R_MMU_CONFIG__seg_8__##f12_##_VAL(R_MMU_CONFIG_, seg_8_, v12) << R_MMU_CONFIG__seg_8__BITNR) | \
+ (R_MMU_CONFIG__seg_7__##f13_##_VAL(R_MMU_CONFIG_, seg_7_, v13) << R_MMU_CONFIG__seg_7__BITNR) | \
+ (R_MMU_CONFIG__seg_6__##f14_##_VAL(R_MMU_CONFIG_, seg_6_, v14) << R_MMU_CONFIG__seg_6__BITNR) | \
+ (R_MMU_CONFIG__seg_5__##f15_##_VAL(R_MMU_CONFIG_, seg_5_, v15) << R_MMU_CONFIG__seg_5__BITNR) | \
+ (R_MMU_CONFIG__seg_4__##f16_##_VAL(R_MMU_CONFIG_, seg_4_, v16) << R_MMU_CONFIG__seg_4__BITNR) | \
+ (R_MMU_CONFIG__seg_3__##f17_##_VAL(R_MMU_CONFIG_, seg_3_, v17) << R_MMU_CONFIG__seg_3__BITNR) | \
+ (R_MMU_CONFIG__seg_2__##f18_##_VAL(R_MMU_CONFIG_, seg_2_, v18) << R_MMU_CONFIG__seg_2__BITNR) | \
+ (R_MMU_CONFIG__seg_1__##f19_##_VAL(R_MMU_CONFIG_, seg_1_, v19) << R_MMU_CONFIG__seg_1__BITNR) | \
+ (R_MMU_CONFIG__seg_0__##f20_##_VAL(R_MMU_CONFIG_, seg_0_, v20) << R_MMU_CONFIG__seg_0__BITNR) \
+)
+
+#endif
+
+/*
+ * R_MMU_CONTEXT
+ * - type: RW
+ * - addr: 0xb000024c
+ * - group: MMU registers
+ */
+
+#if USE_GROUP__MMU_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_MMU_CONTEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_MMU_CONTEXT.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_MMU_CONTEXT.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_MMU_CONTEXT(f1,v1) ( \
+ R_MMU_CONTEXT__WRITE(R_MMU_CONTEXT__ADDR, ( \
+ REG_VAL__R_MMU_CONTEXT_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_MMU_CONTEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_MMU_CONTEXT(f1,v1) ( \
+ (R_MMU_CONTEXT__page_id__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_MMU_CONTEXT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_MMU_CONTEXT.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_MMU_CONTEXT(f1,v1) ( \
+ (R_MMU_CONTEXT__page_id__##f1##__VAL(R_MMU_CONTEXT_, page_id_, v1) << R_MMU_CONTEXT__page_id__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_MMU_CONTEXT_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_MMU_CONTEXT.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_MMU_CONTEXT_(f1_,v1) ( \
+ (R_MMU_CONTEXT__page_id__##f1_##_VAL(R_MMU_CONTEXT_, page_id_, v1) << R_MMU_CONTEXT__page_id__BITNR) \
+)
+
+#endif
+
+/*
+ * R_MMU_CTRL
+ * - type: WO
+ * - addr: 0xb0000242
+ * - group: MMU registers
+ */
+
+#if USE_GROUP__MMU_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_MMU_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_MMU_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_MMU_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_MMU_CTRL(f1,v1,f2,v2,f3,v3) ( \
+ *R_MMU_CTRL__SADDR = ( \
+ REG_INITIATED(R_MMU_CTRL_) \
+ REG_VAL__R_MMU_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3) \
+ ), \
+ R_MMU_CTRL__WRITE(R_MMU_CTRL__ADDR, *R_MMU_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_MMU_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_MMU_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_MMU_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_MMU_CTRL__SHADOW(f1,v1,f2,v2,f3,v3) ( \
+ *R_MMU_CTRL__SADDR = ( \
+ REG_INITIATED(R_MMU_CTRL_) \
+ REG_VAL__R_MMU_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_MMU_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_MMU_CTRL(f1,v1,f2,v2,f3,v3) ( \
+ (R_MMU_CTRL__inv_excp__##f1##__MASK & REG__##v1) | \
+ (R_MMU_CTRL__acc_excp__##f2##__MASK & REG__##v2) | \
+ (R_MMU_CTRL__we_excp__##f3##__MASK & REG__##v3) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_MMU_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_MMU_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_MMU_CTRL(f1,v1,f2,v2,f3,v3) ( \
+ (R_MMU_CTRL__inv_excp__##f1##__VAL(R_MMU_CTRL_, inv_excp_, v1) << R_MMU_CTRL__inv_excp__BITNR) | \
+ (R_MMU_CTRL__acc_excp__##f2##__VAL(R_MMU_CTRL_, acc_excp_, v2) << R_MMU_CTRL__acc_excp__BITNR) | \
+ (R_MMU_CTRL__we_excp__##f3##__VAL(R_MMU_CTRL_, we_excp_, v3) << R_MMU_CTRL__we_excp__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_MMU_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_MMU_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_MMU_CTRL_(f1_,v1,f2_,v2,f3_,v3) ( \
+ (R_MMU_CTRL__inv_excp__##f1_##_VAL(R_MMU_CTRL_, inv_excp_, v1) << R_MMU_CTRL__inv_excp__BITNR) | \
+ (R_MMU_CTRL__acc_excp__##f2_##_VAL(R_MMU_CTRL_, acc_excp_, v2) << R_MMU_CTRL__acc_excp__BITNR) | \
+ (R_MMU_CTRL__we_excp__##f3_##_VAL(R_MMU_CTRL_, we_excp_, v3) << R_MMU_CTRL__we_excp__BITNR) \
+)
+
+#endif
+
+/*
+ * R_MMU_ENABLE
+ * - type: WO
+ * - addr: 0xb0000243
+ * - group: MMU registers
+ */
+
+#if USE_GROUP__MMU_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_MMU_ENABLE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_MMU_ENABLE.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_MMU_ENABLE.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_MMU_ENABLE(f1,v1) ( \
+ *R_MMU_ENABLE__SADDR = ( \
+ REG_INITIATED(R_MMU_ENABLE_) \
+ REG_VAL__R_MMU_ENABLE_(f1##_,v1) \
+ ), \
+ R_MMU_ENABLE__WRITE(R_MMU_ENABLE__ADDR, *R_MMU_ENABLE__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_MMU_ENABLE__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_MMU_ENABLE.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_MMU_ENABLE.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_MMU_ENABLE__SHADOW(f1,v1) ( \
+ *R_MMU_ENABLE__SADDR = ( \
+ REG_INITIATED(R_MMU_ENABLE_) \
+ REG_VAL__R_MMU_ENABLE_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_MMU_ENABLE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_MMU_ENABLE(f1,v1) ( \
+ (R_MMU_ENABLE__mmu_enable__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_MMU_ENABLE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_MMU_ENABLE.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_MMU_ENABLE(f1,v1) ( \
+ (R_MMU_ENABLE__mmu_enable__##f1##__VAL(R_MMU_ENABLE_, mmu_enable_, v1) << R_MMU_ENABLE__mmu_enable__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_MMU_ENABLE_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_MMU_ENABLE.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_MMU_ENABLE_(f1_,v1) ( \
+ (R_MMU_ENABLE__mmu_enable__##f1_##_VAL(R_MMU_ENABLE_, mmu_enable_, v1) << R_MMU_ENABLE__mmu_enable__BITNR) \
+)
+
+#endif
+
+/*
+ * R_MMU_KBASE_HI
+ * - type: WO
+ * - addr: 0xb0000248
+ * - group: MMU registers
+ */
+
+#if USE_GROUP__MMU_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_MMU_KBASE_HI
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_MMU_KBASE_HI.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_MMU_KBASE_HI.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_MMU_KBASE_HI(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_MMU_KBASE_HI__SADDR = ( \
+ REG_INITIATED(R_MMU_KBASE_HI_) \
+ REG_VAL__R_MMU_KBASE_HI_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ), \
+ R_MMU_KBASE_HI__WRITE(R_MMU_KBASE_HI__ADDR, *R_MMU_KBASE_HI__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_MMU_KBASE_HI__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_MMU_KBASE_HI.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_MMU_KBASE_HI.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_MMU_KBASE_HI__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_MMU_KBASE_HI__SADDR = ( \
+ REG_INITIATED(R_MMU_KBASE_HI_) \
+ REG_VAL__R_MMU_KBASE_HI_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_MMU_KBASE_HI
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_MMU_KBASE_HI(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_MMU_KBASE_HI__base_f__##f1##__MASK & REG__##v1) | \
+ (R_MMU_KBASE_HI__base_e__##f2##__MASK & REG__##v2) | \
+ (R_MMU_KBASE_HI__base_d__##f3##__MASK & REG__##v3) | \
+ (R_MMU_KBASE_HI__base_c__##f4##__MASK & REG__##v4) | \
+ (R_MMU_KBASE_HI__base_b__##f5##__MASK & REG__##v5) | \
+ (R_MMU_KBASE_HI__base_a__##f6##__MASK & REG__##v6) | \
+ (R_MMU_KBASE_HI__base_9__##f7##__MASK & REG__##v7) | \
+ (R_MMU_KBASE_HI__base_8__##f8##__MASK & REG__##v8) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_MMU_KBASE_HI
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_MMU_KBASE_HI.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_MMU_KBASE_HI(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_MMU_KBASE_HI__base_f__##f1##__VAL(R_MMU_KBASE_HI_, base_f_, v1) << R_MMU_KBASE_HI__base_f__BITNR) | \
+ (R_MMU_KBASE_HI__base_e__##f2##__VAL(R_MMU_KBASE_HI_, base_e_, v2) << R_MMU_KBASE_HI__base_e__BITNR) | \
+ (R_MMU_KBASE_HI__base_d__##f3##__VAL(R_MMU_KBASE_HI_, base_d_, v3) << R_MMU_KBASE_HI__base_d__BITNR) | \
+ (R_MMU_KBASE_HI__base_c__##f4##__VAL(R_MMU_KBASE_HI_, base_c_, v4) << R_MMU_KBASE_HI__base_c__BITNR) | \
+ (R_MMU_KBASE_HI__base_b__##f5##__VAL(R_MMU_KBASE_HI_, base_b_, v5) << R_MMU_KBASE_HI__base_b__BITNR) | \
+ (R_MMU_KBASE_HI__base_a__##f6##__VAL(R_MMU_KBASE_HI_, base_a_, v6) << R_MMU_KBASE_HI__base_a__BITNR) | \
+ (R_MMU_KBASE_HI__base_9__##f7##__VAL(R_MMU_KBASE_HI_, base_9_, v7) << R_MMU_KBASE_HI__base_9__BITNR) | \
+ (R_MMU_KBASE_HI__base_8__##f8##__VAL(R_MMU_KBASE_HI_, base_8_, v8) << R_MMU_KBASE_HI__base_8__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_MMU_KBASE_HI_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_MMU_KBASE_HI.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_MMU_KBASE_HI_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8) ( \
+ (R_MMU_KBASE_HI__base_f__##f1_##_VAL(R_MMU_KBASE_HI_, base_f_, v1) << R_MMU_KBASE_HI__base_f__BITNR) | \
+ (R_MMU_KBASE_HI__base_e__##f2_##_VAL(R_MMU_KBASE_HI_, base_e_, v2) << R_MMU_KBASE_HI__base_e__BITNR) | \
+ (R_MMU_KBASE_HI__base_d__##f3_##_VAL(R_MMU_KBASE_HI_, base_d_, v3) << R_MMU_KBASE_HI__base_d__BITNR) | \
+ (R_MMU_KBASE_HI__base_c__##f4_##_VAL(R_MMU_KBASE_HI_, base_c_, v4) << R_MMU_KBASE_HI__base_c__BITNR) | \
+ (R_MMU_KBASE_HI__base_b__##f5_##_VAL(R_MMU_KBASE_HI_, base_b_, v5) << R_MMU_KBASE_HI__base_b__BITNR) | \
+ (R_MMU_KBASE_HI__base_a__##f6_##_VAL(R_MMU_KBASE_HI_, base_a_, v6) << R_MMU_KBASE_HI__base_a__BITNR) | \
+ (R_MMU_KBASE_HI__base_9__##f7_##_VAL(R_MMU_KBASE_HI_, base_9_, v7) << R_MMU_KBASE_HI__base_9__BITNR) | \
+ (R_MMU_KBASE_HI__base_8__##f8_##_VAL(R_MMU_KBASE_HI_, base_8_, v8) << R_MMU_KBASE_HI__base_8__BITNR) \
+)
+
+#endif
+
+/*
+ * R_MMU_KBASE_LO
+ * - type: WO
+ * - addr: 0xb0000244
+ * - group: MMU registers
+ */
+
+#if USE_GROUP__MMU_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_MMU_KBASE_LO
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_MMU_KBASE_LO.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_MMU_KBASE_LO.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_MMU_KBASE_LO(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_MMU_KBASE_LO__SADDR = ( \
+ REG_INITIATED(R_MMU_KBASE_LO_) \
+ REG_VAL__R_MMU_KBASE_LO_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ), \
+ R_MMU_KBASE_LO__WRITE(R_MMU_KBASE_LO__ADDR, *R_MMU_KBASE_LO__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_MMU_KBASE_LO__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_MMU_KBASE_LO.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_MMU_KBASE_LO.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_MMU_KBASE_LO__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_MMU_KBASE_LO__SADDR = ( \
+ REG_INITIATED(R_MMU_KBASE_LO_) \
+ REG_VAL__R_MMU_KBASE_LO_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_MMU_KBASE_LO
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_MMU_KBASE_LO(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_MMU_KBASE_LO__base_7__##f1##__MASK & REG__##v1) | \
+ (R_MMU_KBASE_LO__base_6__##f2##__MASK & REG__##v2) | \
+ (R_MMU_KBASE_LO__base_5__##f3##__MASK & REG__##v3) | \
+ (R_MMU_KBASE_LO__base_4__##f4##__MASK & REG__##v4) | \
+ (R_MMU_KBASE_LO__base_3__##f5##__MASK & REG__##v5) | \
+ (R_MMU_KBASE_LO__base_2__##f6##__MASK & REG__##v6) | \
+ (R_MMU_KBASE_LO__base_1__##f7##__MASK & REG__##v7) | \
+ (R_MMU_KBASE_LO__base_0__##f8##__MASK & REG__##v8) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_MMU_KBASE_LO
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_MMU_KBASE_LO.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_MMU_KBASE_LO(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_MMU_KBASE_LO__base_7__##f1##__VAL(R_MMU_KBASE_LO_, base_7_, v1) << R_MMU_KBASE_LO__base_7__BITNR) | \
+ (R_MMU_KBASE_LO__base_6__##f2##__VAL(R_MMU_KBASE_LO_, base_6_, v2) << R_MMU_KBASE_LO__base_6__BITNR) | \
+ (R_MMU_KBASE_LO__base_5__##f3##__VAL(R_MMU_KBASE_LO_, base_5_, v3) << R_MMU_KBASE_LO__base_5__BITNR) | \
+ (R_MMU_KBASE_LO__base_4__##f4##__VAL(R_MMU_KBASE_LO_, base_4_, v4) << R_MMU_KBASE_LO__base_4__BITNR) | \
+ (R_MMU_KBASE_LO__base_3__##f5##__VAL(R_MMU_KBASE_LO_, base_3_, v5) << R_MMU_KBASE_LO__base_3__BITNR) | \
+ (R_MMU_KBASE_LO__base_2__##f6##__VAL(R_MMU_KBASE_LO_, base_2_, v6) << R_MMU_KBASE_LO__base_2__BITNR) | \
+ (R_MMU_KBASE_LO__base_1__##f7##__VAL(R_MMU_KBASE_LO_, base_1_, v7) << R_MMU_KBASE_LO__base_1__BITNR) | \
+ (R_MMU_KBASE_LO__base_0__##f8##__VAL(R_MMU_KBASE_LO_, base_0_, v8) << R_MMU_KBASE_LO__base_0__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_MMU_KBASE_LO_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_MMU_KBASE_LO.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_MMU_KBASE_LO_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8) ( \
+ (R_MMU_KBASE_LO__base_7__##f1_##_VAL(R_MMU_KBASE_LO_, base_7_, v1) << R_MMU_KBASE_LO__base_7__BITNR) | \
+ (R_MMU_KBASE_LO__base_6__##f2_##_VAL(R_MMU_KBASE_LO_, base_6_, v2) << R_MMU_KBASE_LO__base_6__BITNR) | \
+ (R_MMU_KBASE_LO__base_5__##f3_##_VAL(R_MMU_KBASE_LO_, base_5_, v3) << R_MMU_KBASE_LO__base_5__BITNR) | \
+ (R_MMU_KBASE_LO__base_4__##f4_##_VAL(R_MMU_KBASE_LO_, base_4_, v4) << R_MMU_KBASE_LO__base_4__BITNR) | \
+ (R_MMU_KBASE_LO__base_3__##f5_##_VAL(R_MMU_KBASE_LO_, base_3_, v5) << R_MMU_KBASE_LO__base_3__BITNR) | \
+ (R_MMU_KBASE_LO__base_2__##f6_##_VAL(R_MMU_KBASE_LO_, base_2_, v6) << R_MMU_KBASE_LO__base_2__BITNR) | \
+ (R_MMU_KBASE_LO__base_1__##f7_##_VAL(R_MMU_KBASE_LO_, base_1_, v7) << R_MMU_KBASE_LO__base_1__BITNR) | \
+ (R_MMU_KBASE_LO__base_0__##f8_##_VAL(R_MMU_KBASE_LO_, base_0_, v8) << R_MMU_KBASE_LO__base_0__BITNR) \
+)
+
+#endif
+
+/*
+ * R_MMU_KSEG
+ * - type: WO
+ * - addr: 0xb0000240
+ * - group: MMU registers
+ */
+
+#if USE_GROUP__MMU_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_MMU_KSEG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_MMU_KSEG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_MMU_KSEG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_MMU_KSEG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16) ( \
+ *R_MMU_KSEG__SADDR = ( \
+ REG_INITIATED(R_MMU_KSEG_) \
+ REG_VAL__R_MMU_KSEG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16) \
+ ), \
+ R_MMU_KSEG__WRITE(R_MMU_KSEG__ADDR, *R_MMU_KSEG__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_MMU_KSEG__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_MMU_KSEG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_MMU_KSEG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_MMU_KSEG__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16) ( \
+ *R_MMU_KSEG__SADDR = ( \
+ REG_INITIATED(R_MMU_KSEG_) \
+ REG_VAL__R_MMU_KSEG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_MMU_KSEG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_MMU_KSEG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16) ( \
+ (R_MMU_KSEG__seg_f__##f1##__MASK & REG__##v1) | \
+ (R_MMU_KSEG__seg_e__##f2##__MASK & REG__##v2) | \
+ (R_MMU_KSEG__seg_d__##f3##__MASK & REG__##v3) | \
+ (R_MMU_KSEG__seg_c__##f4##__MASK & REG__##v4) | \
+ (R_MMU_KSEG__seg_b__##f5##__MASK & REG__##v5) | \
+ (R_MMU_KSEG__seg_a__##f6##__MASK & REG__##v6) | \
+ (R_MMU_KSEG__seg_9__##f7##__MASK & REG__##v7) | \
+ (R_MMU_KSEG__seg_8__##f8##__MASK & REG__##v8) | \
+ (R_MMU_KSEG__seg_7__##f9##__MASK & REG__##v9) | \
+ (R_MMU_KSEG__seg_6__##f10##__MASK & REG__##v10) | \
+ (R_MMU_KSEG__seg_5__##f11##__MASK & REG__##v11) | \
+ (R_MMU_KSEG__seg_4__##f12##__MASK & REG__##v12) | \
+ (R_MMU_KSEG__seg_3__##f13##__MASK & REG__##v13) | \
+ (R_MMU_KSEG__seg_2__##f14##__MASK & REG__##v14) | \
+ (R_MMU_KSEG__seg_1__##f15##__MASK & REG__##v15) | \
+ (R_MMU_KSEG__seg_0__##f16##__MASK & REG__##v16) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_MMU_KSEG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_MMU_KSEG.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_MMU_KSEG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16) ( \
+ (R_MMU_KSEG__seg_f__##f1##__VAL(R_MMU_KSEG_, seg_f_, v1) << R_MMU_KSEG__seg_f__BITNR) | \
+ (R_MMU_KSEG__seg_e__##f2##__VAL(R_MMU_KSEG_, seg_e_, v2) << R_MMU_KSEG__seg_e__BITNR) | \
+ (R_MMU_KSEG__seg_d__##f3##__VAL(R_MMU_KSEG_, seg_d_, v3) << R_MMU_KSEG__seg_d__BITNR) | \
+ (R_MMU_KSEG__seg_c__##f4##__VAL(R_MMU_KSEG_, seg_c_, v4) << R_MMU_KSEG__seg_c__BITNR) | \
+ (R_MMU_KSEG__seg_b__##f5##__VAL(R_MMU_KSEG_, seg_b_, v5) << R_MMU_KSEG__seg_b__BITNR) | \
+ (R_MMU_KSEG__seg_a__##f6##__VAL(R_MMU_KSEG_, seg_a_, v6) << R_MMU_KSEG__seg_a__BITNR) | \
+ (R_MMU_KSEG__seg_9__##f7##__VAL(R_MMU_KSEG_, seg_9_, v7) << R_MMU_KSEG__seg_9__BITNR) | \
+ (R_MMU_KSEG__seg_8__##f8##__VAL(R_MMU_KSEG_, seg_8_, v8) << R_MMU_KSEG__seg_8__BITNR) | \
+ (R_MMU_KSEG__seg_7__##f9##__VAL(R_MMU_KSEG_, seg_7_, v9) << R_MMU_KSEG__seg_7__BITNR) | \
+ (R_MMU_KSEG__seg_6__##f10##__VAL(R_MMU_KSEG_, seg_6_, v10) << R_MMU_KSEG__seg_6__BITNR) | \
+ (R_MMU_KSEG__seg_5__##f11##__VAL(R_MMU_KSEG_, seg_5_, v11) << R_MMU_KSEG__seg_5__BITNR) | \
+ (R_MMU_KSEG__seg_4__##f12##__VAL(R_MMU_KSEG_, seg_4_, v12) << R_MMU_KSEG__seg_4__BITNR) | \
+ (R_MMU_KSEG__seg_3__##f13##__VAL(R_MMU_KSEG_, seg_3_, v13) << R_MMU_KSEG__seg_3__BITNR) | \
+ (R_MMU_KSEG__seg_2__##f14##__VAL(R_MMU_KSEG_, seg_2_, v14) << R_MMU_KSEG__seg_2__BITNR) | \
+ (R_MMU_KSEG__seg_1__##f15##__VAL(R_MMU_KSEG_, seg_1_, v15) << R_MMU_KSEG__seg_1__BITNR) | \
+ (R_MMU_KSEG__seg_0__##f16##__VAL(R_MMU_KSEG_, seg_0_, v16) << R_MMU_KSEG__seg_0__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_MMU_KSEG_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_MMU_KSEG.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_MMU_KSEG_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16) ( \
+ (R_MMU_KSEG__seg_f__##f1_##_VAL(R_MMU_KSEG_, seg_f_, v1) << R_MMU_KSEG__seg_f__BITNR) | \
+ (R_MMU_KSEG__seg_e__##f2_##_VAL(R_MMU_KSEG_, seg_e_, v2) << R_MMU_KSEG__seg_e__BITNR) | \
+ (R_MMU_KSEG__seg_d__##f3_##_VAL(R_MMU_KSEG_, seg_d_, v3) << R_MMU_KSEG__seg_d__BITNR) | \
+ (R_MMU_KSEG__seg_c__##f4_##_VAL(R_MMU_KSEG_, seg_c_, v4) << R_MMU_KSEG__seg_c__BITNR) | \
+ (R_MMU_KSEG__seg_b__##f5_##_VAL(R_MMU_KSEG_, seg_b_, v5) << R_MMU_KSEG__seg_b__BITNR) | \
+ (R_MMU_KSEG__seg_a__##f6_##_VAL(R_MMU_KSEG_, seg_a_, v6) << R_MMU_KSEG__seg_a__BITNR) | \
+ (R_MMU_KSEG__seg_9__##f7_##_VAL(R_MMU_KSEG_, seg_9_, v7) << R_MMU_KSEG__seg_9__BITNR) | \
+ (R_MMU_KSEG__seg_8__##f8_##_VAL(R_MMU_KSEG_, seg_8_, v8) << R_MMU_KSEG__seg_8__BITNR) | \
+ (R_MMU_KSEG__seg_7__##f9_##_VAL(R_MMU_KSEG_, seg_7_, v9) << R_MMU_KSEG__seg_7__BITNR) | \
+ (R_MMU_KSEG__seg_6__##f10_##_VAL(R_MMU_KSEG_, seg_6_, v10) << R_MMU_KSEG__seg_6__BITNR) | \
+ (R_MMU_KSEG__seg_5__##f11_##_VAL(R_MMU_KSEG_, seg_5_, v11) << R_MMU_KSEG__seg_5__BITNR) | \
+ (R_MMU_KSEG__seg_4__##f12_##_VAL(R_MMU_KSEG_, seg_4_, v12) << R_MMU_KSEG__seg_4__BITNR) | \
+ (R_MMU_KSEG__seg_3__##f13_##_VAL(R_MMU_KSEG_, seg_3_, v13) << R_MMU_KSEG__seg_3__BITNR) | \
+ (R_MMU_KSEG__seg_2__##f14_##_VAL(R_MMU_KSEG_, seg_2_, v14) << R_MMU_KSEG__seg_2__BITNR) | \
+ (R_MMU_KSEG__seg_1__##f15_##_VAL(R_MMU_KSEG_, seg_1_, v15) << R_MMU_KSEG__seg_1__BITNR) | \
+ (R_MMU_KSEG__seg_0__##f16_##_VAL(R_MMU_KSEG_, seg_0_, v16) << R_MMU_KSEG__seg_0__BITNR) \
+)
+
+#endif
+
+/*
+ * R_NETWORK_GA_0
+ * - type: WO
+ * - addr: 0xb000008c
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_NETWORK_GA_0
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_NETWORK_GA_0.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_NETWORK_GA_0.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_NETWORK_GA_0(f1,v1) ( \
+ *R_NETWORK_GA_0__SADDR = ( \
+ REG_INITIATED(R_NETWORK_GA_0_) \
+ REG_VAL__R_NETWORK_GA_0_(f1##_,v1) \
+ ), \
+ R_NETWORK_GA_0__WRITE(R_NETWORK_GA_0__ADDR, *R_NETWORK_GA_0__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_NETWORK_GA_0__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_NETWORK_GA_0.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_NETWORK_GA_0.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_NETWORK_GA_0__SHADOW(f1,v1) ( \
+ *R_NETWORK_GA_0__SADDR = ( \
+ REG_INITIATED(R_NETWORK_GA_0_) \
+ REG_VAL__R_NETWORK_GA_0_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_NETWORK_GA_0
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_NETWORK_GA_0(f1,v1) ( \
+ (R_NETWORK_GA_0__ga_low__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_NETWORK_GA_0
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_NETWORK_GA_0.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_NETWORK_GA_0(f1,v1) ( \
+ (R_NETWORK_GA_0__ga_low__##f1##__VAL(R_NETWORK_GA_0_, ga_low_, v1) << R_NETWORK_GA_0__ga_low__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_NETWORK_GA_0_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_NETWORK_GA_0.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_NETWORK_GA_0_(f1_,v1) ( \
+ (R_NETWORK_GA_0__ga_low__##f1_##_VAL(R_NETWORK_GA_0_, ga_low_, v1) << R_NETWORK_GA_0__ga_low__BITNR) \
+)
+
+#endif
+
+/*
+ * R_NETWORK_GA_1
+ * - type: WO
+ * - addr: 0xb0000090
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_NETWORK_GA_1
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_NETWORK_GA_1.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_NETWORK_GA_1.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_NETWORK_GA_1(f1,v1) ( \
+ *R_NETWORK_GA_1__SADDR = ( \
+ REG_INITIATED(R_NETWORK_GA_1_) \
+ REG_VAL__R_NETWORK_GA_1_(f1##_,v1) \
+ ), \
+ R_NETWORK_GA_1__WRITE(R_NETWORK_GA_1__ADDR, *R_NETWORK_GA_1__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_NETWORK_GA_1__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_NETWORK_GA_1.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_NETWORK_GA_1.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_NETWORK_GA_1__SHADOW(f1,v1) ( \
+ *R_NETWORK_GA_1__SADDR = ( \
+ REG_INITIATED(R_NETWORK_GA_1_) \
+ REG_VAL__R_NETWORK_GA_1_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_NETWORK_GA_1
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_NETWORK_GA_1(f1,v1) ( \
+ (R_NETWORK_GA_1__ga_high__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_NETWORK_GA_1
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_NETWORK_GA_1.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_NETWORK_GA_1(f1,v1) ( \
+ (R_NETWORK_GA_1__ga_high__##f1##__VAL(R_NETWORK_GA_1_, ga_high_, v1) << R_NETWORK_GA_1__ga_high__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_NETWORK_GA_1_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_NETWORK_GA_1.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_NETWORK_GA_1_(f1_,v1) ( \
+ (R_NETWORK_GA_1__ga_high__##f1_##_VAL(R_NETWORK_GA_1_, ga_high_, v1) << R_NETWORK_GA_1__ga_high__BITNR) \
+)
+
+#endif
+
+/*
+ * R_NETWORK_GEN_CONFIG
+ * - type: WO
+ * - addr: 0xb0000098
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_NETWORK_GEN_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_NETWORK_GEN_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_NETWORK_GEN_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_NETWORK_GEN_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) ( \
+ *R_NETWORK_GEN_CONFIG__SADDR = ( \
+ REG_INITIATED(R_NETWORK_GEN_CONFIG_) \
+ REG_VAL__R_NETWORK_GEN_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5) \
+ ), \
+ R_NETWORK_GEN_CONFIG__WRITE(R_NETWORK_GEN_CONFIG__ADDR, *R_NETWORK_GEN_CONFIG__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_NETWORK_GEN_CONFIG__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_NETWORK_GEN_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_NETWORK_GEN_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_NETWORK_GEN_CONFIG__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) ( \
+ *R_NETWORK_GEN_CONFIG__SADDR = ( \
+ REG_INITIATED(R_NETWORK_GEN_CONFIG_) \
+ REG_VAL__R_NETWORK_GEN_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_NETWORK_GEN_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_NETWORK_GEN_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) ( \
+ (R_NETWORK_GEN_CONFIG__loopback__##f1##__MASK & REG__##v1) | \
+ (R_NETWORK_GEN_CONFIG__frame__##f2##__MASK & REG__##v2) | \
+ (R_NETWORK_GEN_CONFIG__vg__##f3##__MASK & REG__##v3) | \
+ (R_NETWORK_GEN_CONFIG__phy__##f4##__MASK & REG__##v4) | \
+ (R_NETWORK_GEN_CONFIG__enable__##f5##__MASK & REG__##v5) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_NETWORK_GEN_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_NETWORK_GEN_CONFIG.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_NETWORK_GEN_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) ( \
+ (R_NETWORK_GEN_CONFIG__loopback__##f1##__VAL(R_NETWORK_GEN_CONFIG_, loopback_, v1) << R_NETWORK_GEN_CONFIG__loopback__BITNR) | \
+ (R_NETWORK_GEN_CONFIG__frame__##f2##__VAL(R_NETWORK_GEN_CONFIG_, frame_, v2) << R_NETWORK_GEN_CONFIG__frame__BITNR) | \
+ (R_NETWORK_GEN_CONFIG__vg__##f3##__VAL(R_NETWORK_GEN_CONFIG_, vg_, v3) << R_NETWORK_GEN_CONFIG__vg__BITNR) | \
+ (R_NETWORK_GEN_CONFIG__phy__##f4##__VAL(R_NETWORK_GEN_CONFIG_, phy_, v4) << R_NETWORK_GEN_CONFIG__phy__BITNR) | \
+ (R_NETWORK_GEN_CONFIG__enable__##f5##__VAL(R_NETWORK_GEN_CONFIG_, enable_, v5) << R_NETWORK_GEN_CONFIG__enable__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_NETWORK_GEN_CONFIG_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_NETWORK_GEN_CONFIG.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_NETWORK_GEN_CONFIG_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5) ( \
+ (R_NETWORK_GEN_CONFIG__loopback__##f1_##_VAL(R_NETWORK_GEN_CONFIG_, loopback_, v1) << R_NETWORK_GEN_CONFIG__loopback__BITNR) | \
+ (R_NETWORK_GEN_CONFIG__frame__##f2_##_VAL(R_NETWORK_GEN_CONFIG_, frame_, v2) << R_NETWORK_GEN_CONFIG__frame__BITNR) | \
+ (R_NETWORK_GEN_CONFIG__vg__##f3_##_VAL(R_NETWORK_GEN_CONFIG_, vg_, v3) << R_NETWORK_GEN_CONFIG__vg__BITNR) | \
+ (R_NETWORK_GEN_CONFIG__phy__##f4_##_VAL(R_NETWORK_GEN_CONFIG_, phy_, v4) << R_NETWORK_GEN_CONFIG__phy__BITNR) | \
+ (R_NETWORK_GEN_CONFIG__enable__##f5_##_VAL(R_NETWORK_GEN_CONFIG_, enable_, v5) << R_NETWORK_GEN_CONFIG__enable__BITNR) \
+)
+
+#endif
+
+/*
+ * R_NETWORK_MGM_CTRL
+ * - type: WO
+ * - addr: 0xb00000a0
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_NETWORK_MGM_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_NETWORK_MGM_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_NETWORK_MGM_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_NETWORK_MGM_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) ( \
+ *R_NETWORK_MGM_CTRL__SADDR = ( \
+ REG_INITIATED(R_NETWORK_MGM_CTRL_) \
+ REG_VAL__R_NETWORK_MGM_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5) \
+ ), \
+ R_NETWORK_MGM_CTRL__WRITE(R_NETWORK_MGM_CTRL__ADDR, *R_NETWORK_MGM_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_NETWORK_MGM_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_NETWORK_MGM_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_NETWORK_MGM_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_NETWORK_MGM_CTRL__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) ( \
+ *R_NETWORK_MGM_CTRL__SADDR = ( \
+ REG_INITIATED(R_NETWORK_MGM_CTRL_) \
+ REG_VAL__R_NETWORK_MGM_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_NETWORK_MGM_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_NETWORK_MGM_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) ( \
+ (R_NETWORK_MGM_CTRL__txd_pins__##f1##__MASK & REG__##v1) | \
+ (R_NETWORK_MGM_CTRL__txer_pin__##f2##__MASK & REG__##v2) | \
+ (R_NETWORK_MGM_CTRL__mdck__##f3##__MASK & REG__##v3) | \
+ (R_NETWORK_MGM_CTRL__mdoe__##f4##__MASK & REG__##v4) | \
+ (R_NETWORK_MGM_CTRL__mdio__##f5##__MASK & REG__##v5) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_NETWORK_MGM_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_NETWORK_MGM_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_NETWORK_MGM_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) ( \
+ (R_NETWORK_MGM_CTRL__txd_pins__##f1##__VAL(R_NETWORK_MGM_CTRL_, txd_pins_, v1) << R_NETWORK_MGM_CTRL__txd_pins__BITNR) | \
+ (R_NETWORK_MGM_CTRL__txer_pin__##f2##__VAL(R_NETWORK_MGM_CTRL_, txer_pin_, v2) << R_NETWORK_MGM_CTRL__txer_pin__BITNR) | \
+ (R_NETWORK_MGM_CTRL__mdck__##f3##__VAL(R_NETWORK_MGM_CTRL_, mdck_, v3) << R_NETWORK_MGM_CTRL__mdck__BITNR) | \
+ (R_NETWORK_MGM_CTRL__mdoe__##f4##__VAL(R_NETWORK_MGM_CTRL_, mdoe_, v4) << R_NETWORK_MGM_CTRL__mdoe__BITNR) | \
+ (R_NETWORK_MGM_CTRL__mdio__##f5##__VAL(R_NETWORK_MGM_CTRL_, mdio_, v5) << R_NETWORK_MGM_CTRL__mdio__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_NETWORK_MGM_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_NETWORK_MGM_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_NETWORK_MGM_CTRL_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5) ( \
+ (R_NETWORK_MGM_CTRL__txd_pins__##f1_##_VAL(R_NETWORK_MGM_CTRL_, txd_pins_, v1) << R_NETWORK_MGM_CTRL__txd_pins__BITNR) | \
+ (R_NETWORK_MGM_CTRL__txer_pin__##f2_##_VAL(R_NETWORK_MGM_CTRL_, txer_pin_, v2) << R_NETWORK_MGM_CTRL__txer_pin__BITNR) | \
+ (R_NETWORK_MGM_CTRL__mdck__##f3_##_VAL(R_NETWORK_MGM_CTRL_, mdck_, v3) << R_NETWORK_MGM_CTRL__mdck__BITNR) | \
+ (R_NETWORK_MGM_CTRL__mdoe__##f4_##_VAL(R_NETWORK_MGM_CTRL_, mdoe_, v4) << R_NETWORK_MGM_CTRL__mdoe__BITNR) | \
+ (R_NETWORK_MGM_CTRL__mdio__##f5_##_VAL(R_NETWORK_MGM_CTRL_, mdio_, v5) << R_NETWORK_MGM_CTRL__mdio__BITNR) \
+)
+
+#endif
+
+/*
+ * R_NETWORK_REC_CONFIG
+ * - type: WO
+ * - addr: 0xb0000094
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_NETWORK_REC_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_NETWORK_REC_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_NETWORK_REC_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_NETWORK_REC_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11) ( \
+ *R_NETWORK_REC_CONFIG__SADDR = ( \
+ REG_INITIATED(R_NETWORK_REC_CONFIG_) \
+ REG_VAL__R_NETWORK_REC_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11) \
+ ), \
+ R_NETWORK_REC_CONFIG__WRITE(R_NETWORK_REC_CONFIG__ADDR, *R_NETWORK_REC_CONFIG__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_NETWORK_REC_CONFIG__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_NETWORK_REC_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_NETWORK_REC_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_NETWORK_REC_CONFIG__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11) ( \
+ *R_NETWORK_REC_CONFIG__SADDR = ( \
+ REG_INITIATED(R_NETWORK_REC_CONFIG_) \
+ REG_VAL__R_NETWORK_REC_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_NETWORK_REC_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_NETWORK_REC_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11) ( \
+ (R_NETWORK_REC_CONFIG__max_size__##f1##__MASK & REG__##v1) | \
+ (R_NETWORK_REC_CONFIG__duplex__##f2##__MASK & REG__##v2) | \
+ (R_NETWORK_REC_CONFIG__bad_crc__##f3##__MASK & REG__##v3) | \
+ (R_NETWORK_REC_CONFIG__oversize__##f4##__MASK & REG__##v4) | \
+ (R_NETWORK_REC_CONFIG__undersize__##f5##__MASK & REG__##v5) | \
+ (R_NETWORK_REC_CONFIG__all_roots__##f6##__MASK & REG__##v6) | \
+ (R_NETWORK_REC_CONFIG__tr_broadcast__##f7##__MASK & REG__##v7) | \
+ (R_NETWORK_REC_CONFIG__broadcast__##f8##__MASK & REG__##v8) | \
+ (R_NETWORK_REC_CONFIG__individual__##f9##__MASK & REG__##v9) | \
+ (R_NETWORK_REC_CONFIG__ma1__##f10##__MASK & REG__##v10) | \
+ (R_NETWORK_REC_CONFIG__ma0__##f11##__MASK & REG__##v11) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_NETWORK_REC_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_NETWORK_REC_CONFIG.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_NETWORK_REC_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11) ( \
+ (R_NETWORK_REC_CONFIG__max_size__##f1##__VAL(R_NETWORK_REC_CONFIG_, max_size_, v1) << R_NETWORK_REC_CONFIG__max_size__BITNR) | \
+ (R_NETWORK_REC_CONFIG__duplex__##f2##__VAL(R_NETWORK_REC_CONFIG_, duplex_, v2) << R_NETWORK_REC_CONFIG__duplex__BITNR) | \
+ (R_NETWORK_REC_CONFIG__bad_crc__##f3##__VAL(R_NETWORK_REC_CONFIG_, bad_crc_, v3) << R_NETWORK_REC_CONFIG__bad_crc__BITNR) | \
+ (R_NETWORK_REC_CONFIG__oversize__##f4##__VAL(R_NETWORK_REC_CONFIG_, oversize_, v4) << R_NETWORK_REC_CONFIG__oversize__BITNR) | \
+ (R_NETWORK_REC_CONFIG__undersize__##f5##__VAL(R_NETWORK_REC_CONFIG_, undersize_, v5) << R_NETWORK_REC_CONFIG__undersize__BITNR) | \
+ (R_NETWORK_REC_CONFIG__all_roots__##f6##__VAL(R_NETWORK_REC_CONFIG_, all_roots_, v6) << R_NETWORK_REC_CONFIG__all_roots__BITNR) | \
+ (R_NETWORK_REC_CONFIG__tr_broadcast__##f7##__VAL(R_NETWORK_REC_CONFIG_, tr_broadcast_, v7) << R_NETWORK_REC_CONFIG__tr_broadcast__BITNR) | \
+ (R_NETWORK_REC_CONFIG__broadcast__##f8##__VAL(R_NETWORK_REC_CONFIG_, broadcast_, v8) << R_NETWORK_REC_CONFIG__broadcast__BITNR) | \
+ (R_NETWORK_REC_CONFIG__individual__##f9##__VAL(R_NETWORK_REC_CONFIG_, individual_, v9) << R_NETWORK_REC_CONFIG__individual__BITNR) | \
+ (R_NETWORK_REC_CONFIG__ma1__##f10##__VAL(R_NETWORK_REC_CONFIG_, ma1_, v10) << R_NETWORK_REC_CONFIG__ma1__BITNR) | \
+ (R_NETWORK_REC_CONFIG__ma0__##f11##__VAL(R_NETWORK_REC_CONFIG_, ma0_, v11) << R_NETWORK_REC_CONFIG__ma0__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_NETWORK_REC_CONFIG_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_NETWORK_REC_CONFIG.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_NETWORK_REC_CONFIG_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11) ( \
+ (R_NETWORK_REC_CONFIG__max_size__##f1_##_VAL(R_NETWORK_REC_CONFIG_, max_size_, v1) << R_NETWORK_REC_CONFIG__max_size__BITNR) | \
+ (R_NETWORK_REC_CONFIG__duplex__##f2_##_VAL(R_NETWORK_REC_CONFIG_, duplex_, v2) << R_NETWORK_REC_CONFIG__duplex__BITNR) | \
+ (R_NETWORK_REC_CONFIG__bad_crc__##f3_##_VAL(R_NETWORK_REC_CONFIG_, bad_crc_, v3) << R_NETWORK_REC_CONFIG__bad_crc__BITNR) | \
+ (R_NETWORK_REC_CONFIG__oversize__##f4_##_VAL(R_NETWORK_REC_CONFIG_, oversize_, v4) << R_NETWORK_REC_CONFIG__oversize__BITNR) | \
+ (R_NETWORK_REC_CONFIG__undersize__##f5_##_VAL(R_NETWORK_REC_CONFIG_, undersize_, v5) << R_NETWORK_REC_CONFIG__undersize__BITNR) | \
+ (R_NETWORK_REC_CONFIG__all_roots__##f6_##_VAL(R_NETWORK_REC_CONFIG_, all_roots_, v6) << R_NETWORK_REC_CONFIG__all_roots__BITNR) | \
+ (R_NETWORK_REC_CONFIG__tr_broadcast__##f7_##_VAL(R_NETWORK_REC_CONFIG_, tr_broadcast_, v7) << R_NETWORK_REC_CONFIG__tr_broadcast__BITNR) | \
+ (R_NETWORK_REC_CONFIG__broadcast__##f8_##_VAL(R_NETWORK_REC_CONFIG_, broadcast_, v8) << R_NETWORK_REC_CONFIG__broadcast__BITNR) | \
+ (R_NETWORK_REC_CONFIG__individual__##f9_##_VAL(R_NETWORK_REC_CONFIG_, individual_, v9) << R_NETWORK_REC_CONFIG__individual__BITNR) | \
+ (R_NETWORK_REC_CONFIG__ma1__##f10_##_VAL(R_NETWORK_REC_CONFIG_, ma1_, v10) << R_NETWORK_REC_CONFIG__ma1__BITNR) | \
+ (R_NETWORK_REC_CONFIG__ma0__##f11_##_VAL(R_NETWORK_REC_CONFIG_, ma0_, v11) << R_NETWORK_REC_CONFIG__ma0__BITNR) \
+)
+
+#endif
+
+/*
+ * R_NETWORK_SA_0
+ * - type: WO
+ * - addr: 0xb0000080
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_NETWORK_SA_0
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_NETWORK_SA_0.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_NETWORK_SA_0.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_NETWORK_SA_0(f1,v1) ( \
+ *R_NETWORK_SA_0__SADDR = ( \
+ REG_INITIATED(R_NETWORK_SA_0_) \
+ REG_VAL__R_NETWORK_SA_0_(f1##_,v1) \
+ ), \
+ R_NETWORK_SA_0__WRITE(R_NETWORK_SA_0__ADDR, *R_NETWORK_SA_0__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_NETWORK_SA_0__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_NETWORK_SA_0.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_NETWORK_SA_0.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_NETWORK_SA_0__SHADOW(f1,v1) ( \
+ *R_NETWORK_SA_0__SADDR = ( \
+ REG_INITIATED(R_NETWORK_SA_0_) \
+ REG_VAL__R_NETWORK_SA_0_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_NETWORK_SA_0
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_NETWORK_SA_0(f1,v1) ( \
+ (R_NETWORK_SA_0__ma0_low__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_NETWORK_SA_0
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_NETWORK_SA_0.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_NETWORK_SA_0(f1,v1) ( \
+ (R_NETWORK_SA_0__ma0_low__##f1##__VAL(R_NETWORK_SA_0_, ma0_low_, v1) << R_NETWORK_SA_0__ma0_low__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_NETWORK_SA_0_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_NETWORK_SA_0.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_NETWORK_SA_0_(f1_,v1) ( \
+ (R_NETWORK_SA_0__ma0_low__##f1_##_VAL(R_NETWORK_SA_0_, ma0_low_, v1) << R_NETWORK_SA_0__ma0_low__BITNR) \
+)
+
+#endif
+
+/*
+ * R_NETWORK_SA_1
+ * - type: WO
+ * - addr: 0xb0000084
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_NETWORK_SA_1
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_NETWORK_SA_1.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_NETWORK_SA_1.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_NETWORK_SA_1(f1,v1,f2,v2) ( \
+ *R_NETWORK_SA_1__SADDR = ( \
+ REG_INITIATED(R_NETWORK_SA_1_) \
+ REG_VAL__R_NETWORK_SA_1_(f1##_,v1,f2##_,v2) \
+ ), \
+ R_NETWORK_SA_1__WRITE(R_NETWORK_SA_1__ADDR, *R_NETWORK_SA_1__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_NETWORK_SA_1__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_NETWORK_SA_1.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_NETWORK_SA_1.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_NETWORK_SA_1__SHADOW(f1,v1,f2,v2) ( \
+ *R_NETWORK_SA_1__SADDR = ( \
+ REG_INITIATED(R_NETWORK_SA_1_) \
+ REG_VAL__R_NETWORK_SA_1_(f1##_,v1,f2##_,v2) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_NETWORK_SA_1
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_NETWORK_SA_1(f1,v1,f2,v2) ( \
+ (R_NETWORK_SA_1__ma1_low__##f1##__MASK & REG__##v1) | \
+ (R_NETWORK_SA_1__ma0_high__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_NETWORK_SA_1
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_NETWORK_SA_1.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_NETWORK_SA_1(f1,v1,f2,v2) ( \
+ (R_NETWORK_SA_1__ma1_low__##f1##__VAL(R_NETWORK_SA_1_, ma1_low_, v1) << R_NETWORK_SA_1__ma1_low__BITNR) | \
+ (R_NETWORK_SA_1__ma0_high__##f2##__VAL(R_NETWORK_SA_1_, ma0_high_, v2) << R_NETWORK_SA_1__ma0_high__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_NETWORK_SA_1_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_NETWORK_SA_1.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_NETWORK_SA_1_(f1_,v1,f2_,v2) ( \
+ (R_NETWORK_SA_1__ma1_low__##f1_##_VAL(R_NETWORK_SA_1_, ma1_low_, v1) << R_NETWORK_SA_1__ma1_low__BITNR) | \
+ (R_NETWORK_SA_1__ma0_high__##f2_##_VAL(R_NETWORK_SA_1_, ma0_high_, v2) << R_NETWORK_SA_1__ma0_high__BITNR) \
+)
+
+#endif
+
+/*
+ * R_NETWORK_SA_2
+ * - type: WO
+ * - addr: 0xb0000088
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_NETWORK_SA_2
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_NETWORK_SA_2.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_NETWORK_SA_2.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_NETWORK_SA_2(f1,v1) ( \
+ *R_NETWORK_SA_2__SADDR = ( \
+ REG_INITIATED(R_NETWORK_SA_2_) \
+ REG_VAL__R_NETWORK_SA_2_(f1##_,v1) \
+ ), \
+ R_NETWORK_SA_2__WRITE(R_NETWORK_SA_2__ADDR, *R_NETWORK_SA_2__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_NETWORK_SA_2__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_NETWORK_SA_2.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_NETWORK_SA_2.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_NETWORK_SA_2__SHADOW(f1,v1) ( \
+ *R_NETWORK_SA_2__SADDR = ( \
+ REG_INITIATED(R_NETWORK_SA_2_) \
+ REG_VAL__R_NETWORK_SA_2_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_NETWORK_SA_2
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_NETWORK_SA_2(f1,v1) ( \
+ (R_NETWORK_SA_2__ma1_high__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_NETWORK_SA_2
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_NETWORK_SA_2.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_NETWORK_SA_2(f1,v1) ( \
+ (R_NETWORK_SA_2__ma1_high__##f1##__VAL(R_NETWORK_SA_2_, ma1_high_, v1) << R_NETWORK_SA_2__ma1_high__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_NETWORK_SA_2_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_NETWORK_SA_2.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_NETWORK_SA_2_(f1_,v1) ( \
+ (R_NETWORK_SA_2__ma1_high__##f1_##_VAL(R_NETWORK_SA_2_, ma1_high_, v1) << R_NETWORK_SA_2__ma1_high__BITNR) \
+)
+
+#endif
+
+/*
+ * R_NETWORK_STAT
+ * - type: RO
+ * - addr: 0xb00000a0
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_NETWORK_STAT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_NETWORK_STAT(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) ( \
+ (R_NETWORK_STAT__rxd_pins__##f1##__MASK & REG__##v1) | \
+ (R_NETWORK_STAT__rxer__##f2##__MASK & REG__##v2) | \
+ (R_NETWORK_STAT__underrun__##f3##__MASK & REG__##v3) | \
+ (R_NETWORK_STAT__exc_col__##f4##__MASK & REG__##v4) | \
+ (R_NETWORK_STAT__mdio__##f5##__MASK & REG__##v5) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_NETWORK_STAT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_NETWORK_STAT.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_NETWORK_STAT(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) ( \
+ (R_NETWORK_STAT__rxd_pins__##f1##__VAL(R_NETWORK_STAT_, rxd_pins_, v1) << R_NETWORK_STAT__rxd_pins__BITNR) | \
+ (R_NETWORK_STAT__rxer__##f2##__VAL(R_NETWORK_STAT_, rxer_, v2) << R_NETWORK_STAT__rxer__BITNR) | \
+ (R_NETWORK_STAT__underrun__##f3##__VAL(R_NETWORK_STAT_, underrun_, v3) << R_NETWORK_STAT__underrun__BITNR) | \
+ (R_NETWORK_STAT__exc_col__##f4##__VAL(R_NETWORK_STAT_, exc_col_, v4) << R_NETWORK_STAT__exc_col__BITNR) | \
+ (R_NETWORK_STAT__mdio__##f5##__VAL(R_NETWORK_STAT_, mdio_, v5) << R_NETWORK_STAT__mdio__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_NETWORK_STAT_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_NETWORK_STAT.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_NETWORK_STAT_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5) ( \
+ (R_NETWORK_STAT__rxd_pins__##f1_##_VAL(R_NETWORK_STAT_, rxd_pins_, v1) << R_NETWORK_STAT__rxd_pins__BITNR) | \
+ (R_NETWORK_STAT__rxer__##f2_##_VAL(R_NETWORK_STAT_, rxer_, v2) << R_NETWORK_STAT__rxer__BITNR) | \
+ (R_NETWORK_STAT__underrun__##f3_##_VAL(R_NETWORK_STAT_, underrun_, v3) << R_NETWORK_STAT__underrun__BITNR) | \
+ (R_NETWORK_STAT__exc_col__##f4_##_VAL(R_NETWORK_STAT_, exc_col_, v4) << R_NETWORK_STAT__exc_col__BITNR) | \
+ (R_NETWORK_STAT__mdio__##f5_##_VAL(R_NETWORK_STAT_, mdio_, v5) << R_NETWORK_STAT__mdio__BITNR) \
+)
+
+#endif
+
+/*
+ * R_NETWORK_TR_CTRL
+ * - type: WO
+ * - addr: 0xb000009c
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_NETWORK_TR_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_NETWORK_TR_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_NETWORK_TR_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_NETWORK_TR_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7) ( \
+ *R_NETWORK_TR_CTRL__SADDR = ( \
+ REG_INITIATED(R_NETWORK_TR_CTRL_) \
+ REG_VAL__R_NETWORK_TR_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7) \
+ ), \
+ R_NETWORK_TR_CTRL__WRITE(R_NETWORK_TR_CTRL__ADDR, *R_NETWORK_TR_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_NETWORK_TR_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_NETWORK_TR_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_NETWORK_TR_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_NETWORK_TR_CTRL__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7) ( \
+ *R_NETWORK_TR_CTRL__SADDR = ( \
+ REG_INITIATED(R_NETWORK_TR_CTRL_) \
+ REG_VAL__R_NETWORK_TR_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_NETWORK_TR_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_NETWORK_TR_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7) ( \
+ (R_NETWORK_TR_CTRL__clr_error__##f1##__MASK & REG__##v1) | \
+ (R_NETWORK_TR_CTRL__delay__##f2##__MASK & REG__##v2) | \
+ (R_NETWORK_TR_CTRL__cancel__##f3##__MASK & REG__##v3) | \
+ (R_NETWORK_TR_CTRL__cd__##f4##__MASK & REG__##v4) | \
+ (R_NETWORK_TR_CTRL__retry__##f5##__MASK & REG__##v5) | \
+ (R_NETWORK_TR_CTRL__pad__##f6##__MASK & REG__##v6) | \
+ (R_NETWORK_TR_CTRL__crc__##f7##__MASK & REG__##v7) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_NETWORK_TR_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_NETWORK_TR_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_NETWORK_TR_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7) ( \
+ (R_NETWORK_TR_CTRL__clr_error__##f1##__VAL(R_NETWORK_TR_CTRL_, clr_error_, v1) << R_NETWORK_TR_CTRL__clr_error__BITNR) | \
+ (R_NETWORK_TR_CTRL__delay__##f2##__VAL(R_NETWORK_TR_CTRL_, delay_, v2) << R_NETWORK_TR_CTRL__delay__BITNR) | \
+ (R_NETWORK_TR_CTRL__cancel__##f3##__VAL(R_NETWORK_TR_CTRL_, cancel_, v3) << R_NETWORK_TR_CTRL__cancel__BITNR) | \
+ (R_NETWORK_TR_CTRL__cd__##f4##__VAL(R_NETWORK_TR_CTRL_, cd_, v4) << R_NETWORK_TR_CTRL__cd__BITNR) | \
+ (R_NETWORK_TR_CTRL__retry__##f5##__VAL(R_NETWORK_TR_CTRL_, retry_, v5) << R_NETWORK_TR_CTRL__retry__BITNR) | \
+ (R_NETWORK_TR_CTRL__pad__##f6##__VAL(R_NETWORK_TR_CTRL_, pad_, v6) << R_NETWORK_TR_CTRL__pad__BITNR) | \
+ (R_NETWORK_TR_CTRL__crc__##f7##__VAL(R_NETWORK_TR_CTRL_, crc_, v7) << R_NETWORK_TR_CTRL__crc__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_NETWORK_TR_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_NETWORK_TR_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_NETWORK_TR_CTRL_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7) ( \
+ (R_NETWORK_TR_CTRL__clr_error__##f1_##_VAL(R_NETWORK_TR_CTRL_, clr_error_, v1) << R_NETWORK_TR_CTRL__clr_error__BITNR) | \
+ (R_NETWORK_TR_CTRL__delay__##f2_##_VAL(R_NETWORK_TR_CTRL_, delay_, v2) << R_NETWORK_TR_CTRL__delay__BITNR) | \
+ (R_NETWORK_TR_CTRL__cancel__##f3_##_VAL(R_NETWORK_TR_CTRL_, cancel_, v3) << R_NETWORK_TR_CTRL__cancel__BITNR) | \
+ (R_NETWORK_TR_CTRL__cd__##f4_##_VAL(R_NETWORK_TR_CTRL_, cd_, v4) << R_NETWORK_TR_CTRL__cd__BITNR) | \
+ (R_NETWORK_TR_CTRL__retry__##f5_##_VAL(R_NETWORK_TR_CTRL_, retry_, v5) << R_NETWORK_TR_CTRL__retry__BITNR) | \
+ (R_NETWORK_TR_CTRL__pad__##f6_##_VAL(R_NETWORK_TR_CTRL_, pad_, v6) << R_NETWORK_TR_CTRL__pad__BITNR) | \
+ (R_NETWORK_TR_CTRL__crc__##f7_##_VAL(R_NETWORK_TR_CTRL_, crc_, v7) << R_NETWORK_TR_CTRL__crc__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PAR0_CONFIG
+ * - type: WO
+ * - addr: 0xb0000044
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PAR0_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PAR0_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_PAR0_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PAR0_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20) ( \
+ *R_PAR0_CONFIG__SADDR = ( \
+ REG_INITIATED(R_PAR0_CONFIG_) \
+ REG_VAL__R_PAR0_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20) \
+ ), \
+ R_PAR0_CONFIG__WRITE(R_PAR0_CONFIG__ADDR, *R_PAR0_CONFIG__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PAR0_CONFIG__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PAR0_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_PAR0_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PAR0_CONFIG__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20) ( \
+ *R_PAR0_CONFIG__SADDR = ( \
+ REG_INITIATED(R_PAR0_CONFIG_) \
+ REG_VAL__R_PAR0_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PAR0_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PAR0_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20) ( \
+ (R_PAR0_CONFIG__ioe__##f1##__MASK & REG__##v1) | \
+ (R_PAR0_CONFIG__iseli__##f2##__MASK & REG__##v2) | \
+ (R_PAR0_CONFIG__iautofd__##f3##__MASK & REG__##v3) | \
+ (R_PAR0_CONFIG__istrb__##f4##__MASK & REG__##v4) | \
+ (R_PAR0_CONFIG__iinit__##f5##__MASK & REG__##v5) | \
+ (R_PAR0_CONFIG__iperr__##f6##__MASK & REG__##v6) | \
+ (R_PAR0_CONFIG__iack__##f7##__MASK & REG__##v7) | \
+ (R_PAR0_CONFIG__ibusy__##f8##__MASK & REG__##v8) | \
+ (R_PAR0_CONFIG__ifault__##f9##__MASK & REG__##v9) | \
+ (R_PAR0_CONFIG__isel__##f10##__MASK & REG__##v10) | \
+ (R_PAR0_CONFIG__ext_mode__##f11##__MASK & REG__##v11) | \
+ (R_PAR0_CONFIG__wide__##f12##__MASK & REG__##v12) | \
+ (R_PAR0_CONFIG__dma__##f13##__MASK & REG__##v13) | \
+ (R_PAR0_CONFIG__rle_in__##f14##__MASK & REG__##v14) | \
+ (R_PAR0_CONFIG__rle_out__##f15##__MASK & REG__##v15) | \
+ (R_PAR0_CONFIG__enable__##f16##__MASK & REG__##v16) | \
+ (R_PAR0_CONFIG__force__##f17##__MASK & REG__##v17) | \
+ (R_PAR0_CONFIG__ign_ack__##f18##__MASK & REG__##v18) | \
+ (R_PAR0_CONFIG__oe_ack__##f19##__MASK & REG__##v19) | \
+ (R_PAR0_CONFIG__mode__##f20##__MASK & REG__##v20) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR0_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR0_CONFIG.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR0_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20) ( \
+ (R_PAR0_CONFIG__ioe__##f1##__VAL(R_PAR0_CONFIG_, ioe_, v1) << R_PAR0_CONFIG__ioe__BITNR) | \
+ (R_PAR0_CONFIG__iseli__##f2##__VAL(R_PAR0_CONFIG_, iseli_, v2) << R_PAR0_CONFIG__iseli__BITNR) | \
+ (R_PAR0_CONFIG__iautofd__##f3##__VAL(R_PAR0_CONFIG_, iautofd_, v3) << R_PAR0_CONFIG__iautofd__BITNR) | \
+ (R_PAR0_CONFIG__istrb__##f4##__VAL(R_PAR0_CONFIG_, istrb_, v4) << R_PAR0_CONFIG__istrb__BITNR) | \
+ (R_PAR0_CONFIG__iinit__##f5##__VAL(R_PAR0_CONFIG_, iinit_, v5) << R_PAR0_CONFIG__iinit__BITNR) | \
+ (R_PAR0_CONFIG__iperr__##f6##__VAL(R_PAR0_CONFIG_, iperr_, v6) << R_PAR0_CONFIG__iperr__BITNR) | \
+ (R_PAR0_CONFIG__iack__##f7##__VAL(R_PAR0_CONFIG_, iack_, v7) << R_PAR0_CONFIG__iack__BITNR) | \
+ (R_PAR0_CONFIG__ibusy__##f8##__VAL(R_PAR0_CONFIG_, ibusy_, v8) << R_PAR0_CONFIG__ibusy__BITNR) | \
+ (R_PAR0_CONFIG__ifault__##f9##__VAL(R_PAR0_CONFIG_, ifault_, v9) << R_PAR0_CONFIG__ifault__BITNR) | \
+ (R_PAR0_CONFIG__isel__##f10##__VAL(R_PAR0_CONFIG_, isel_, v10) << R_PAR0_CONFIG__isel__BITNR) | \
+ (R_PAR0_CONFIG__ext_mode__##f11##__VAL(R_PAR0_CONFIG_, ext_mode_, v11) << R_PAR0_CONFIG__ext_mode__BITNR) | \
+ (R_PAR0_CONFIG__wide__##f12##__VAL(R_PAR0_CONFIG_, wide_, v12) << R_PAR0_CONFIG__wide__BITNR) | \
+ (R_PAR0_CONFIG__dma__##f13##__VAL(R_PAR0_CONFIG_, dma_, v13) << R_PAR0_CONFIG__dma__BITNR) | \
+ (R_PAR0_CONFIG__rle_in__##f14##__VAL(R_PAR0_CONFIG_, rle_in_, v14) << R_PAR0_CONFIG__rle_in__BITNR) | \
+ (R_PAR0_CONFIG__rle_out__##f15##__VAL(R_PAR0_CONFIG_, rle_out_, v15) << R_PAR0_CONFIG__rle_out__BITNR) | \
+ (R_PAR0_CONFIG__enable__##f16##__VAL(R_PAR0_CONFIG_, enable_, v16) << R_PAR0_CONFIG__enable__BITNR) | \
+ (R_PAR0_CONFIG__force__##f17##__VAL(R_PAR0_CONFIG_, force_, v17) << R_PAR0_CONFIG__force__BITNR) | \
+ (R_PAR0_CONFIG__ign_ack__##f18##__VAL(R_PAR0_CONFIG_, ign_ack_, v18) << R_PAR0_CONFIG__ign_ack__BITNR) | \
+ (R_PAR0_CONFIG__oe_ack__##f19##__VAL(R_PAR0_CONFIG_, oe_ack_, v19) << R_PAR0_CONFIG__oe_ack__BITNR) | \
+ (R_PAR0_CONFIG__mode__##f20##__VAL(R_PAR0_CONFIG_, mode_, v20) << R_PAR0_CONFIG__mode__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR0_CONFIG_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR0_CONFIG.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR0_CONFIG_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19,f20_,v20) ( \
+ (R_PAR0_CONFIG__ioe__##f1_##_VAL(R_PAR0_CONFIG_, ioe_, v1) << R_PAR0_CONFIG__ioe__BITNR) | \
+ (R_PAR0_CONFIG__iseli__##f2_##_VAL(R_PAR0_CONFIG_, iseli_, v2) << R_PAR0_CONFIG__iseli__BITNR) | \
+ (R_PAR0_CONFIG__iautofd__##f3_##_VAL(R_PAR0_CONFIG_, iautofd_, v3) << R_PAR0_CONFIG__iautofd__BITNR) | \
+ (R_PAR0_CONFIG__istrb__##f4_##_VAL(R_PAR0_CONFIG_, istrb_, v4) << R_PAR0_CONFIG__istrb__BITNR) | \
+ (R_PAR0_CONFIG__iinit__##f5_##_VAL(R_PAR0_CONFIG_, iinit_, v5) << R_PAR0_CONFIG__iinit__BITNR) | \
+ (R_PAR0_CONFIG__iperr__##f6_##_VAL(R_PAR0_CONFIG_, iperr_, v6) << R_PAR0_CONFIG__iperr__BITNR) | \
+ (R_PAR0_CONFIG__iack__##f7_##_VAL(R_PAR0_CONFIG_, iack_, v7) << R_PAR0_CONFIG__iack__BITNR) | \
+ (R_PAR0_CONFIG__ibusy__##f8_##_VAL(R_PAR0_CONFIG_, ibusy_, v8) << R_PAR0_CONFIG__ibusy__BITNR) | \
+ (R_PAR0_CONFIG__ifault__##f9_##_VAL(R_PAR0_CONFIG_, ifault_, v9) << R_PAR0_CONFIG__ifault__BITNR) | \
+ (R_PAR0_CONFIG__isel__##f10_##_VAL(R_PAR0_CONFIG_, isel_, v10) << R_PAR0_CONFIG__isel__BITNR) | \
+ (R_PAR0_CONFIG__ext_mode__##f11_##_VAL(R_PAR0_CONFIG_, ext_mode_, v11) << R_PAR0_CONFIG__ext_mode__BITNR) | \
+ (R_PAR0_CONFIG__wide__##f12_##_VAL(R_PAR0_CONFIG_, wide_, v12) << R_PAR0_CONFIG__wide__BITNR) | \
+ (R_PAR0_CONFIG__dma__##f13_##_VAL(R_PAR0_CONFIG_, dma_, v13) << R_PAR0_CONFIG__dma__BITNR) | \
+ (R_PAR0_CONFIG__rle_in__##f14_##_VAL(R_PAR0_CONFIG_, rle_in_, v14) << R_PAR0_CONFIG__rle_in__BITNR) | \
+ (R_PAR0_CONFIG__rle_out__##f15_##_VAL(R_PAR0_CONFIG_, rle_out_, v15) << R_PAR0_CONFIG__rle_out__BITNR) | \
+ (R_PAR0_CONFIG__enable__##f16_##_VAL(R_PAR0_CONFIG_, enable_, v16) << R_PAR0_CONFIG__enable__BITNR) | \
+ (R_PAR0_CONFIG__force__##f17_##_VAL(R_PAR0_CONFIG_, force_, v17) << R_PAR0_CONFIG__force__BITNR) | \
+ (R_PAR0_CONFIG__ign_ack__##f18_##_VAL(R_PAR0_CONFIG_, ign_ack_, v18) << R_PAR0_CONFIG__ign_ack__BITNR) | \
+ (R_PAR0_CONFIG__oe_ack__##f19_##_VAL(R_PAR0_CONFIG_, oe_ack_, v19) << R_PAR0_CONFIG__oe_ack__BITNR) | \
+ (R_PAR0_CONFIG__mode__##f20_##_VAL(R_PAR0_CONFIG_, mode_, v20) << R_PAR0_CONFIG__mode__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PAR0_CTRL
+ * - type: WO
+ * - addr: 0xb0000042
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PAR0_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PAR0_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_PAR0_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PAR0_CTRL(f1,v1) ( \
+ *R_PAR0_CTRL__SADDR = ( \
+ REG_INITIATED(R_PAR0_CTRL_) \
+ REG_VAL__R_PAR0_CTRL_(f1##_,v1) \
+ ), \
+ R_PAR0_CTRL__WRITE(R_PAR0_CTRL__ADDR, *R_PAR0_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PAR0_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PAR0_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_PAR0_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PAR0_CTRL__SHADOW(f1,v1) ( \
+ *R_PAR0_CTRL__SADDR = ( \
+ REG_INITIATED(R_PAR0_CTRL_) \
+ REG_VAL__R_PAR0_CTRL_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PAR0_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PAR0_CTRL(f1,v1) ( \
+ (R_PAR0_CTRL__ctrl__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR0_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR0_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR0_CTRL(f1,v1) ( \
+ (R_PAR0_CTRL__ctrl__##f1##__VAL(R_PAR0_CTRL_, ctrl_, v1) << R_PAR0_CTRL__ctrl__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR0_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR0_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR0_CTRL_(f1_,v1) ( \
+ (R_PAR0_CTRL__ctrl__##f1_##_VAL(R_PAR0_CTRL_, ctrl_, v1) << R_PAR0_CTRL__ctrl__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PAR0_CTRL_DATA
+ * - type: WO
+ * - addr: 0xb0000040
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PAR0_CTRL_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PAR0_CTRL_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_PAR0_CTRL_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PAR0_CTRL_DATA(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_PAR0_CTRL_DATA__SADDR = ( \
+ REG_INITIATED(R_PAR0_CTRL_DATA_) \
+ REG_VAL__R_PAR0_CTRL_DATA_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ), \
+ R_PAR0_CTRL_DATA__WRITE(R_PAR0_CTRL_DATA__ADDR, *R_PAR0_CTRL_DATA__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PAR0_CTRL_DATA__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PAR0_CTRL_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_PAR0_CTRL_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PAR0_CTRL_DATA__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_PAR0_CTRL_DATA__SADDR = ( \
+ REG_INITIATED(R_PAR0_CTRL_DATA_) \
+ REG_VAL__R_PAR0_CTRL_DATA_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PAR0_CTRL_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PAR0_CTRL_DATA(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_PAR0_CTRL_DATA__peri_int__##f1##__MASK & REG__##v1) | \
+ (R_PAR0_CTRL_DATA__oe__##f2##__MASK & REG__##v2) | \
+ (R_PAR0_CTRL_DATA__seli__##f3##__MASK & REG__##v3) | \
+ (R_PAR0_CTRL_DATA__autofd__##f4##__MASK & REG__##v4) | \
+ (R_PAR0_CTRL_DATA__strb__##f5##__MASK & REG__##v5) | \
+ (R_PAR0_CTRL_DATA__init__##f6##__MASK & REG__##v6) | \
+ (R_PAR0_CTRL_DATA__ecp_cmd__##f7##__MASK & REG__##v7) | \
+ (R_PAR0_CTRL_DATA__data__##f8##__MASK & REG__##v8) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR0_CTRL_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR0_CTRL_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR0_CTRL_DATA(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_PAR0_CTRL_DATA__peri_int__##f1##__VAL(R_PAR0_CTRL_DATA_, peri_int_, v1) << R_PAR0_CTRL_DATA__peri_int__BITNR) | \
+ (R_PAR0_CTRL_DATA__oe__##f2##__VAL(R_PAR0_CTRL_DATA_, oe_, v2) << R_PAR0_CTRL_DATA__oe__BITNR) | \
+ (R_PAR0_CTRL_DATA__seli__##f3##__VAL(R_PAR0_CTRL_DATA_, seli_, v3) << R_PAR0_CTRL_DATA__seli__BITNR) | \
+ (R_PAR0_CTRL_DATA__autofd__##f4##__VAL(R_PAR0_CTRL_DATA_, autofd_, v4) << R_PAR0_CTRL_DATA__autofd__BITNR) | \
+ (R_PAR0_CTRL_DATA__strb__##f5##__VAL(R_PAR0_CTRL_DATA_, strb_, v5) << R_PAR0_CTRL_DATA__strb__BITNR) | \
+ (R_PAR0_CTRL_DATA__init__##f6##__VAL(R_PAR0_CTRL_DATA_, init_, v6) << R_PAR0_CTRL_DATA__init__BITNR) | \
+ (R_PAR0_CTRL_DATA__ecp_cmd__##f7##__VAL(R_PAR0_CTRL_DATA_, ecp_cmd_, v7) << R_PAR0_CTRL_DATA__ecp_cmd__BITNR) | \
+ (R_PAR0_CTRL_DATA__data__##f8##__VAL(R_PAR0_CTRL_DATA_, data_, v8) << R_PAR0_CTRL_DATA__data__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR0_CTRL_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR0_CTRL_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR0_CTRL_DATA_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8) ( \
+ (R_PAR0_CTRL_DATA__peri_int__##f1_##_VAL(R_PAR0_CTRL_DATA_, peri_int_, v1) << R_PAR0_CTRL_DATA__peri_int__BITNR) | \
+ (R_PAR0_CTRL_DATA__oe__##f2_##_VAL(R_PAR0_CTRL_DATA_, oe_, v2) << R_PAR0_CTRL_DATA__oe__BITNR) | \
+ (R_PAR0_CTRL_DATA__seli__##f3_##_VAL(R_PAR0_CTRL_DATA_, seli_, v3) << R_PAR0_CTRL_DATA__seli__BITNR) | \
+ (R_PAR0_CTRL_DATA__autofd__##f4_##_VAL(R_PAR0_CTRL_DATA_, autofd_, v4) << R_PAR0_CTRL_DATA__autofd__BITNR) | \
+ (R_PAR0_CTRL_DATA__strb__##f5_##_VAL(R_PAR0_CTRL_DATA_, strb_, v5) << R_PAR0_CTRL_DATA__strb__BITNR) | \
+ (R_PAR0_CTRL_DATA__init__##f6_##_VAL(R_PAR0_CTRL_DATA_, init_, v6) << R_PAR0_CTRL_DATA__init__BITNR) | \
+ (R_PAR0_CTRL_DATA__ecp_cmd__##f7_##_VAL(R_PAR0_CTRL_DATA_, ecp_cmd_, v7) << R_PAR0_CTRL_DATA__ecp_cmd__BITNR) | \
+ (R_PAR0_CTRL_DATA__data__##f8_##_VAL(R_PAR0_CTRL_DATA_, data_, v8) << R_PAR0_CTRL_DATA__data__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PAR0_DELAY
+ * - type: WO
+ * - addr: 0xb0000048
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PAR0_DELAY
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PAR0_DELAY.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_PAR0_DELAY.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PAR0_DELAY(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ *R_PAR0_DELAY__SADDR = ( \
+ REG_INITIATED(R_PAR0_DELAY_) \
+ REG_VAL__R_PAR0_DELAY_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6) \
+ ), \
+ R_PAR0_DELAY__WRITE(R_PAR0_DELAY__ADDR, *R_PAR0_DELAY__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PAR0_DELAY__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PAR0_DELAY.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_PAR0_DELAY.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PAR0_DELAY__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ *R_PAR0_DELAY__SADDR = ( \
+ REG_INITIATED(R_PAR0_DELAY_) \
+ REG_VAL__R_PAR0_DELAY_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PAR0_DELAY
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PAR0_DELAY(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ (R_PAR0_DELAY__fine_hold__##f1##__MASK & REG__##v1) | \
+ (R_PAR0_DELAY__hold__##f2##__MASK & REG__##v2) | \
+ (R_PAR0_DELAY__fine_strb__##f3##__MASK & REG__##v3) | \
+ (R_PAR0_DELAY__strobe__##f4##__MASK & REG__##v4) | \
+ (R_PAR0_DELAY__fine_setup__##f5##__MASK & REG__##v5) | \
+ (R_PAR0_DELAY__setup__##f6##__MASK & REG__##v6) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR0_DELAY
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR0_DELAY.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR0_DELAY(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ (R_PAR0_DELAY__fine_hold__##f1##__VAL(R_PAR0_DELAY_, fine_hold_, v1) << R_PAR0_DELAY__fine_hold__BITNR) | \
+ (R_PAR0_DELAY__hold__##f2##__VAL(R_PAR0_DELAY_, hold_, v2) << R_PAR0_DELAY__hold__BITNR) | \
+ (R_PAR0_DELAY__fine_strb__##f3##__VAL(R_PAR0_DELAY_, fine_strb_, v3) << R_PAR0_DELAY__fine_strb__BITNR) | \
+ (R_PAR0_DELAY__strobe__##f4##__VAL(R_PAR0_DELAY_, strobe_, v4) << R_PAR0_DELAY__strobe__BITNR) | \
+ (R_PAR0_DELAY__fine_setup__##f5##__VAL(R_PAR0_DELAY_, fine_setup_, v5) << R_PAR0_DELAY__fine_setup__BITNR) | \
+ (R_PAR0_DELAY__setup__##f6##__VAL(R_PAR0_DELAY_, setup_, v6) << R_PAR0_DELAY__setup__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR0_DELAY_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR0_DELAY.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR0_DELAY_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6) ( \
+ (R_PAR0_DELAY__fine_hold__##f1_##_VAL(R_PAR0_DELAY_, fine_hold_, v1) << R_PAR0_DELAY__fine_hold__BITNR) | \
+ (R_PAR0_DELAY__hold__##f2_##_VAL(R_PAR0_DELAY_, hold_, v2) << R_PAR0_DELAY__hold__BITNR) | \
+ (R_PAR0_DELAY__fine_strb__##f3_##_VAL(R_PAR0_DELAY_, fine_strb_, v3) << R_PAR0_DELAY__fine_strb__BITNR) | \
+ (R_PAR0_DELAY__strobe__##f4_##_VAL(R_PAR0_DELAY_, strobe_, v4) << R_PAR0_DELAY__strobe__BITNR) | \
+ (R_PAR0_DELAY__fine_setup__##f5_##_VAL(R_PAR0_DELAY_, fine_setup_, v5) << R_PAR0_DELAY__fine_setup__BITNR) | \
+ (R_PAR0_DELAY__setup__##f6_##_VAL(R_PAR0_DELAY_, setup_, v6) << R_PAR0_DELAY__setup__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PAR0_STATUS
+ * - type: RO
+ * - addr: 0xb0000042
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PAR0_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PAR0_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ (R_PAR0_STATUS__mode__##f1##__MASK & REG__##v1) | \
+ (R_PAR0_STATUS__perr__##f2##__MASK & REG__##v2) | \
+ (R_PAR0_STATUS__ack__##f3##__MASK & REG__##v3) | \
+ (R_PAR0_STATUS__busy__##f4##__MASK & REG__##v4) | \
+ (R_PAR0_STATUS__fault__##f5##__MASK & REG__##v5) | \
+ (R_PAR0_STATUS__sel__##f6##__MASK & REG__##v6) | \
+ (R_PAR0_STATUS__ext_mode__##f7##__MASK & REG__##v7) | \
+ (R_PAR0_STATUS__ecp_16__##f8##__MASK & REG__##v8) | \
+ (R_PAR0_STATUS__tr_rdy__##f9##__MASK & REG__##v9) | \
+ (R_PAR0_STATUS__dav__##f10##__MASK & REG__##v10) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR0_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR0_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR0_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ (R_PAR0_STATUS__mode__##f1##__VAL(R_PAR0_STATUS_, mode_, v1) << R_PAR0_STATUS__mode__BITNR) | \
+ (R_PAR0_STATUS__perr__##f2##__VAL(R_PAR0_STATUS_, perr_, v2) << R_PAR0_STATUS__perr__BITNR) | \
+ (R_PAR0_STATUS__ack__##f3##__VAL(R_PAR0_STATUS_, ack_, v3) << R_PAR0_STATUS__ack__BITNR) | \
+ (R_PAR0_STATUS__busy__##f4##__VAL(R_PAR0_STATUS_, busy_, v4) << R_PAR0_STATUS__busy__BITNR) | \
+ (R_PAR0_STATUS__fault__##f5##__VAL(R_PAR0_STATUS_, fault_, v5) << R_PAR0_STATUS__fault__BITNR) | \
+ (R_PAR0_STATUS__sel__##f6##__VAL(R_PAR0_STATUS_, sel_, v6) << R_PAR0_STATUS__sel__BITNR) | \
+ (R_PAR0_STATUS__ext_mode__##f7##__VAL(R_PAR0_STATUS_, ext_mode_, v7) << R_PAR0_STATUS__ext_mode__BITNR) | \
+ (R_PAR0_STATUS__ecp_16__##f8##__VAL(R_PAR0_STATUS_, ecp_16_, v8) << R_PAR0_STATUS__ecp_16__BITNR) | \
+ (R_PAR0_STATUS__tr_rdy__##f9##__VAL(R_PAR0_STATUS_, tr_rdy_, v9) << R_PAR0_STATUS__tr_rdy__BITNR) | \
+ (R_PAR0_STATUS__dav__##f10##__VAL(R_PAR0_STATUS_, dav_, v10) << R_PAR0_STATUS__dav__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR0_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR0_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR0_STATUS_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10) ( \
+ (R_PAR0_STATUS__mode__##f1_##_VAL(R_PAR0_STATUS_, mode_, v1) << R_PAR0_STATUS__mode__BITNR) | \
+ (R_PAR0_STATUS__perr__##f2_##_VAL(R_PAR0_STATUS_, perr_, v2) << R_PAR0_STATUS__perr__BITNR) | \
+ (R_PAR0_STATUS__ack__##f3_##_VAL(R_PAR0_STATUS_, ack_, v3) << R_PAR0_STATUS__ack__BITNR) | \
+ (R_PAR0_STATUS__busy__##f4_##_VAL(R_PAR0_STATUS_, busy_, v4) << R_PAR0_STATUS__busy__BITNR) | \
+ (R_PAR0_STATUS__fault__##f5_##_VAL(R_PAR0_STATUS_, fault_, v5) << R_PAR0_STATUS__fault__BITNR) | \
+ (R_PAR0_STATUS__sel__##f6_##_VAL(R_PAR0_STATUS_, sel_, v6) << R_PAR0_STATUS__sel__BITNR) | \
+ (R_PAR0_STATUS__ext_mode__##f7_##_VAL(R_PAR0_STATUS_, ext_mode_, v7) << R_PAR0_STATUS__ext_mode__BITNR) | \
+ (R_PAR0_STATUS__ecp_16__##f8_##_VAL(R_PAR0_STATUS_, ecp_16_, v8) << R_PAR0_STATUS__ecp_16__BITNR) | \
+ (R_PAR0_STATUS__tr_rdy__##f9_##_VAL(R_PAR0_STATUS_, tr_rdy_, v9) << R_PAR0_STATUS__tr_rdy__BITNR) | \
+ (R_PAR0_STATUS__dav__##f10_##_VAL(R_PAR0_STATUS_, dav_, v10) << R_PAR0_STATUS__dav__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PAR0_STATUS_DATA
+ * - type: RO
+ * - addr: 0xb0000040
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PAR0_STATUS_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PAR0_STATUS_DATA(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ (R_PAR0_STATUS_DATA__mode__##f1##__MASK & REG__##v1) | \
+ (R_PAR0_STATUS_DATA__perr__##f2##__MASK & REG__##v2) | \
+ (R_PAR0_STATUS_DATA__ack__##f3##__MASK & REG__##v3) | \
+ (R_PAR0_STATUS_DATA__busy__##f4##__MASK & REG__##v4) | \
+ (R_PAR0_STATUS_DATA__fault__##f5##__MASK & REG__##v5) | \
+ (R_PAR0_STATUS_DATA__sel__##f6##__MASK & REG__##v6) | \
+ (R_PAR0_STATUS_DATA__ext_mode__##f7##__MASK & REG__##v7) | \
+ (R_PAR0_STATUS_DATA__ecp_16__##f8##__MASK & REG__##v8) | \
+ (R_PAR0_STATUS_DATA__tr_rdy__##f9##__MASK & REG__##v9) | \
+ (R_PAR0_STATUS_DATA__dav__##f10##__MASK & REG__##v10) | \
+ (R_PAR0_STATUS_DATA__ecp_cmd__##f11##__MASK & REG__##v11) | \
+ (R_PAR0_STATUS_DATA__data__##f12##__MASK & REG__##v12) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR0_STATUS_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR0_STATUS_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR0_STATUS_DATA(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ (R_PAR0_STATUS_DATA__mode__##f1##__VAL(R_PAR0_STATUS_DATA_, mode_, v1) << R_PAR0_STATUS_DATA__mode__BITNR) | \
+ (R_PAR0_STATUS_DATA__perr__##f2##__VAL(R_PAR0_STATUS_DATA_, perr_, v2) << R_PAR0_STATUS_DATA__perr__BITNR) | \
+ (R_PAR0_STATUS_DATA__ack__##f3##__VAL(R_PAR0_STATUS_DATA_, ack_, v3) << R_PAR0_STATUS_DATA__ack__BITNR) | \
+ (R_PAR0_STATUS_DATA__busy__##f4##__VAL(R_PAR0_STATUS_DATA_, busy_, v4) << R_PAR0_STATUS_DATA__busy__BITNR) | \
+ (R_PAR0_STATUS_DATA__fault__##f5##__VAL(R_PAR0_STATUS_DATA_, fault_, v5) << R_PAR0_STATUS_DATA__fault__BITNR) | \
+ (R_PAR0_STATUS_DATA__sel__##f6##__VAL(R_PAR0_STATUS_DATA_, sel_, v6) << R_PAR0_STATUS_DATA__sel__BITNR) | \
+ (R_PAR0_STATUS_DATA__ext_mode__##f7##__VAL(R_PAR0_STATUS_DATA_, ext_mode_, v7) << R_PAR0_STATUS_DATA__ext_mode__BITNR) | \
+ (R_PAR0_STATUS_DATA__ecp_16__##f8##__VAL(R_PAR0_STATUS_DATA_, ecp_16_, v8) << R_PAR0_STATUS_DATA__ecp_16__BITNR) | \
+ (R_PAR0_STATUS_DATA__tr_rdy__##f9##__VAL(R_PAR0_STATUS_DATA_, tr_rdy_, v9) << R_PAR0_STATUS_DATA__tr_rdy__BITNR) | \
+ (R_PAR0_STATUS_DATA__dav__##f10##__VAL(R_PAR0_STATUS_DATA_, dav_, v10) << R_PAR0_STATUS_DATA__dav__BITNR) | \
+ (R_PAR0_STATUS_DATA__ecp_cmd__##f11##__VAL(R_PAR0_STATUS_DATA_, ecp_cmd_, v11) << R_PAR0_STATUS_DATA__ecp_cmd__BITNR) | \
+ (R_PAR0_STATUS_DATA__data__##f12##__VAL(R_PAR0_STATUS_DATA_, data_, v12) << R_PAR0_STATUS_DATA__data__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR0_STATUS_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR0_STATUS_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR0_STATUS_DATA_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12) ( \
+ (R_PAR0_STATUS_DATA__mode__##f1_##_VAL(R_PAR0_STATUS_DATA_, mode_, v1) << R_PAR0_STATUS_DATA__mode__BITNR) | \
+ (R_PAR0_STATUS_DATA__perr__##f2_##_VAL(R_PAR0_STATUS_DATA_, perr_, v2) << R_PAR0_STATUS_DATA__perr__BITNR) | \
+ (R_PAR0_STATUS_DATA__ack__##f3_##_VAL(R_PAR0_STATUS_DATA_, ack_, v3) << R_PAR0_STATUS_DATA__ack__BITNR) | \
+ (R_PAR0_STATUS_DATA__busy__##f4_##_VAL(R_PAR0_STATUS_DATA_, busy_, v4) << R_PAR0_STATUS_DATA__busy__BITNR) | \
+ (R_PAR0_STATUS_DATA__fault__##f5_##_VAL(R_PAR0_STATUS_DATA_, fault_, v5) << R_PAR0_STATUS_DATA__fault__BITNR) | \
+ (R_PAR0_STATUS_DATA__sel__##f6_##_VAL(R_PAR0_STATUS_DATA_, sel_, v6) << R_PAR0_STATUS_DATA__sel__BITNR) | \
+ (R_PAR0_STATUS_DATA__ext_mode__##f7_##_VAL(R_PAR0_STATUS_DATA_, ext_mode_, v7) << R_PAR0_STATUS_DATA__ext_mode__BITNR) | \
+ (R_PAR0_STATUS_DATA__ecp_16__##f8_##_VAL(R_PAR0_STATUS_DATA_, ecp_16_, v8) << R_PAR0_STATUS_DATA__ecp_16__BITNR) | \
+ (R_PAR0_STATUS_DATA__tr_rdy__##f9_##_VAL(R_PAR0_STATUS_DATA_, tr_rdy_, v9) << R_PAR0_STATUS_DATA__tr_rdy__BITNR) | \
+ (R_PAR0_STATUS_DATA__dav__##f10_##_VAL(R_PAR0_STATUS_DATA_, dav_, v10) << R_PAR0_STATUS_DATA__dav__BITNR) | \
+ (R_PAR0_STATUS_DATA__ecp_cmd__##f11_##_VAL(R_PAR0_STATUS_DATA_, ecp_cmd_, v11) << R_PAR0_STATUS_DATA__ecp_cmd__BITNR) | \
+ (R_PAR0_STATUS_DATA__data__##f12_##_VAL(R_PAR0_STATUS_DATA_, data_, v12) << R_PAR0_STATUS_DATA__data__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PAR1_CONFIG
+ * - type: WO
+ * - addr: 0xb0000054
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PAR1_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PAR1_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_PAR1_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PAR1_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19) ( \
+ *R_PAR1_CONFIG__SADDR = ( \
+ REG_INITIATED(R_PAR1_CONFIG_) \
+ REG_VAL__R_PAR1_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19) \
+ ), \
+ R_PAR1_CONFIG__WRITE(R_PAR1_CONFIG__ADDR, *R_PAR1_CONFIG__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PAR1_CONFIG__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PAR1_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_PAR1_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PAR1_CONFIG__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19) ( \
+ *R_PAR1_CONFIG__SADDR = ( \
+ REG_INITIATED(R_PAR1_CONFIG_) \
+ REG_VAL__R_PAR1_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PAR1_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PAR1_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19) ( \
+ (R_PAR1_CONFIG__ioe__##f1##__MASK & REG__##v1) | \
+ (R_PAR1_CONFIG__iseli__##f2##__MASK & REG__##v2) | \
+ (R_PAR1_CONFIG__iautofd__##f3##__MASK & REG__##v3) | \
+ (R_PAR1_CONFIG__istrb__##f4##__MASK & REG__##v4) | \
+ (R_PAR1_CONFIG__iinit__##f5##__MASK & REG__##v5) | \
+ (R_PAR1_CONFIG__iperr__##f6##__MASK & REG__##v6) | \
+ (R_PAR1_CONFIG__iack__##f7##__MASK & REG__##v7) | \
+ (R_PAR1_CONFIG__ibusy__##f8##__MASK & REG__##v8) | \
+ (R_PAR1_CONFIG__ifault__##f9##__MASK & REG__##v9) | \
+ (R_PAR1_CONFIG__isel__##f10##__MASK & REG__##v10) | \
+ (R_PAR1_CONFIG__ext_mode__##f11##__MASK & REG__##v11) | \
+ (R_PAR1_CONFIG__dma__##f12##__MASK & REG__##v12) | \
+ (R_PAR1_CONFIG__rle_in__##f13##__MASK & REG__##v13) | \
+ (R_PAR1_CONFIG__rle_out__##f14##__MASK & REG__##v14) | \
+ (R_PAR1_CONFIG__enable__##f15##__MASK & REG__##v15) | \
+ (R_PAR1_CONFIG__force__##f16##__MASK & REG__##v16) | \
+ (R_PAR1_CONFIG__ign_ack__##f17##__MASK & REG__##v17) | \
+ (R_PAR1_CONFIG__oe_ack__##f18##__MASK & REG__##v18) | \
+ (R_PAR1_CONFIG__mode__##f19##__MASK & REG__##v19) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR1_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR1_CONFIG.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR1_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19) ( \
+ (R_PAR1_CONFIG__ioe__##f1##__VAL(R_PAR1_CONFIG_, ioe_, v1) << R_PAR1_CONFIG__ioe__BITNR) | \
+ (R_PAR1_CONFIG__iseli__##f2##__VAL(R_PAR1_CONFIG_, iseli_, v2) << R_PAR1_CONFIG__iseli__BITNR) | \
+ (R_PAR1_CONFIG__iautofd__##f3##__VAL(R_PAR1_CONFIG_, iautofd_, v3) << R_PAR1_CONFIG__iautofd__BITNR) | \
+ (R_PAR1_CONFIG__istrb__##f4##__VAL(R_PAR1_CONFIG_, istrb_, v4) << R_PAR1_CONFIG__istrb__BITNR) | \
+ (R_PAR1_CONFIG__iinit__##f5##__VAL(R_PAR1_CONFIG_, iinit_, v5) << R_PAR1_CONFIG__iinit__BITNR) | \
+ (R_PAR1_CONFIG__iperr__##f6##__VAL(R_PAR1_CONFIG_, iperr_, v6) << R_PAR1_CONFIG__iperr__BITNR) | \
+ (R_PAR1_CONFIG__iack__##f7##__VAL(R_PAR1_CONFIG_, iack_, v7) << R_PAR1_CONFIG__iack__BITNR) | \
+ (R_PAR1_CONFIG__ibusy__##f8##__VAL(R_PAR1_CONFIG_, ibusy_, v8) << R_PAR1_CONFIG__ibusy__BITNR) | \
+ (R_PAR1_CONFIG__ifault__##f9##__VAL(R_PAR1_CONFIG_, ifault_, v9) << R_PAR1_CONFIG__ifault__BITNR) | \
+ (R_PAR1_CONFIG__isel__##f10##__VAL(R_PAR1_CONFIG_, isel_, v10) << R_PAR1_CONFIG__isel__BITNR) | \
+ (R_PAR1_CONFIG__ext_mode__##f11##__VAL(R_PAR1_CONFIG_, ext_mode_, v11) << R_PAR1_CONFIG__ext_mode__BITNR) | \
+ (R_PAR1_CONFIG__dma__##f12##__VAL(R_PAR1_CONFIG_, dma_, v12) << R_PAR1_CONFIG__dma__BITNR) | \
+ (R_PAR1_CONFIG__rle_in__##f13##__VAL(R_PAR1_CONFIG_, rle_in_, v13) << R_PAR1_CONFIG__rle_in__BITNR) | \
+ (R_PAR1_CONFIG__rle_out__##f14##__VAL(R_PAR1_CONFIG_, rle_out_, v14) << R_PAR1_CONFIG__rle_out__BITNR) | \
+ (R_PAR1_CONFIG__enable__##f15##__VAL(R_PAR1_CONFIG_, enable_, v15) << R_PAR1_CONFIG__enable__BITNR) | \
+ (R_PAR1_CONFIG__force__##f16##__VAL(R_PAR1_CONFIG_, force_, v16) << R_PAR1_CONFIG__force__BITNR) | \
+ (R_PAR1_CONFIG__ign_ack__##f17##__VAL(R_PAR1_CONFIG_, ign_ack_, v17) << R_PAR1_CONFIG__ign_ack__BITNR) | \
+ (R_PAR1_CONFIG__oe_ack__##f18##__VAL(R_PAR1_CONFIG_, oe_ack_, v18) << R_PAR1_CONFIG__oe_ack__BITNR) | \
+ (R_PAR1_CONFIG__mode__##f19##__VAL(R_PAR1_CONFIG_, mode_, v19) << R_PAR1_CONFIG__mode__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR1_CONFIG_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR1_CONFIG.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR1_CONFIG_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19) ( \
+ (R_PAR1_CONFIG__ioe__##f1_##_VAL(R_PAR1_CONFIG_, ioe_, v1) << R_PAR1_CONFIG__ioe__BITNR) | \
+ (R_PAR1_CONFIG__iseli__##f2_##_VAL(R_PAR1_CONFIG_, iseli_, v2) << R_PAR1_CONFIG__iseli__BITNR) | \
+ (R_PAR1_CONFIG__iautofd__##f3_##_VAL(R_PAR1_CONFIG_, iautofd_, v3) << R_PAR1_CONFIG__iautofd__BITNR) | \
+ (R_PAR1_CONFIG__istrb__##f4_##_VAL(R_PAR1_CONFIG_, istrb_, v4) << R_PAR1_CONFIG__istrb__BITNR) | \
+ (R_PAR1_CONFIG__iinit__##f5_##_VAL(R_PAR1_CONFIG_, iinit_, v5) << R_PAR1_CONFIG__iinit__BITNR) | \
+ (R_PAR1_CONFIG__iperr__##f6_##_VAL(R_PAR1_CONFIG_, iperr_, v6) << R_PAR1_CONFIG__iperr__BITNR) | \
+ (R_PAR1_CONFIG__iack__##f7_##_VAL(R_PAR1_CONFIG_, iack_, v7) << R_PAR1_CONFIG__iack__BITNR) | \
+ (R_PAR1_CONFIG__ibusy__##f8_##_VAL(R_PAR1_CONFIG_, ibusy_, v8) << R_PAR1_CONFIG__ibusy__BITNR) | \
+ (R_PAR1_CONFIG__ifault__##f9_##_VAL(R_PAR1_CONFIG_, ifault_, v9) << R_PAR1_CONFIG__ifault__BITNR) | \
+ (R_PAR1_CONFIG__isel__##f10_##_VAL(R_PAR1_CONFIG_, isel_, v10) << R_PAR1_CONFIG__isel__BITNR) | \
+ (R_PAR1_CONFIG__ext_mode__##f11_##_VAL(R_PAR1_CONFIG_, ext_mode_, v11) << R_PAR1_CONFIG__ext_mode__BITNR) | \
+ (R_PAR1_CONFIG__dma__##f12_##_VAL(R_PAR1_CONFIG_, dma_, v12) << R_PAR1_CONFIG__dma__BITNR) | \
+ (R_PAR1_CONFIG__rle_in__##f13_##_VAL(R_PAR1_CONFIG_, rle_in_, v13) << R_PAR1_CONFIG__rle_in__BITNR) | \
+ (R_PAR1_CONFIG__rle_out__##f14_##_VAL(R_PAR1_CONFIG_, rle_out_, v14) << R_PAR1_CONFIG__rle_out__BITNR) | \
+ (R_PAR1_CONFIG__enable__##f15_##_VAL(R_PAR1_CONFIG_, enable_, v15) << R_PAR1_CONFIG__enable__BITNR) | \
+ (R_PAR1_CONFIG__force__##f16_##_VAL(R_PAR1_CONFIG_, force_, v16) << R_PAR1_CONFIG__force__BITNR) | \
+ (R_PAR1_CONFIG__ign_ack__##f17_##_VAL(R_PAR1_CONFIG_, ign_ack_, v17) << R_PAR1_CONFIG__ign_ack__BITNR) | \
+ (R_PAR1_CONFIG__oe_ack__##f18_##_VAL(R_PAR1_CONFIG_, oe_ack_, v18) << R_PAR1_CONFIG__oe_ack__BITNR) | \
+ (R_PAR1_CONFIG__mode__##f19_##_VAL(R_PAR1_CONFIG_, mode_, v19) << R_PAR1_CONFIG__mode__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PAR1_CTRL
+ * - type: WO
+ * - addr: 0xb0000052
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PAR1_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PAR1_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_PAR1_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PAR1_CTRL(f1,v1) ( \
+ *R_PAR1_CTRL__SADDR = ( \
+ REG_INITIATED(R_PAR1_CTRL_) \
+ REG_VAL__R_PAR1_CTRL_(f1##_,v1) \
+ ), \
+ R_PAR1_CTRL__WRITE(R_PAR1_CTRL__ADDR, *R_PAR1_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PAR1_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PAR1_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_PAR1_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PAR1_CTRL__SHADOW(f1,v1) ( \
+ *R_PAR1_CTRL__SADDR = ( \
+ REG_INITIATED(R_PAR1_CTRL_) \
+ REG_VAL__R_PAR1_CTRL_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PAR1_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PAR1_CTRL(f1,v1) ( \
+ (R_PAR1_CTRL__ctrl__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR1_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR1_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR1_CTRL(f1,v1) ( \
+ (R_PAR1_CTRL__ctrl__##f1##__VAL(R_PAR1_CTRL_, ctrl_, v1) << R_PAR1_CTRL__ctrl__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR1_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR1_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR1_CTRL_(f1_,v1) ( \
+ (R_PAR1_CTRL__ctrl__##f1_##_VAL(R_PAR1_CTRL_, ctrl_, v1) << R_PAR1_CTRL__ctrl__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PAR1_CTRL_DATA
+ * - type: WO
+ * - addr: 0xb0000050
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PAR1_CTRL_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PAR1_CTRL_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_PAR1_CTRL_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PAR1_CTRL_DATA(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_PAR1_CTRL_DATA__SADDR = ( \
+ REG_INITIATED(R_PAR1_CTRL_DATA_) \
+ REG_VAL__R_PAR1_CTRL_DATA_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ), \
+ R_PAR1_CTRL_DATA__WRITE(R_PAR1_CTRL_DATA__ADDR, *R_PAR1_CTRL_DATA__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PAR1_CTRL_DATA__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PAR1_CTRL_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_PAR1_CTRL_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PAR1_CTRL_DATA__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_PAR1_CTRL_DATA__SADDR = ( \
+ REG_INITIATED(R_PAR1_CTRL_DATA_) \
+ REG_VAL__R_PAR1_CTRL_DATA_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PAR1_CTRL_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PAR1_CTRL_DATA(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_PAR1_CTRL_DATA__peri_int__##f1##__MASK & REG__##v1) | \
+ (R_PAR1_CTRL_DATA__oe__##f2##__MASK & REG__##v2) | \
+ (R_PAR1_CTRL_DATA__seli__##f3##__MASK & REG__##v3) | \
+ (R_PAR1_CTRL_DATA__autofd__##f4##__MASK & REG__##v4) | \
+ (R_PAR1_CTRL_DATA__strb__##f5##__MASK & REG__##v5) | \
+ (R_PAR1_CTRL_DATA__init__##f6##__MASK & REG__##v6) | \
+ (R_PAR1_CTRL_DATA__ecp_cmd__##f7##__MASK & REG__##v7) | \
+ (R_PAR1_CTRL_DATA__data__##f8##__MASK & REG__##v8) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR1_CTRL_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR1_CTRL_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR1_CTRL_DATA(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_PAR1_CTRL_DATA__peri_int__##f1##__VAL(R_PAR1_CTRL_DATA_, peri_int_, v1) << R_PAR1_CTRL_DATA__peri_int__BITNR) | \
+ (R_PAR1_CTRL_DATA__oe__##f2##__VAL(R_PAR1_CTRL_DATA_, oe_, v2) << R_PAR1_CTRL_DATA__oe__BITNR) | \
+ (R_PAR1_CTRL_DATA__seli__##f3##__VAL(R_PAR1_CTRL_DATA_, seli_, v3) << R_PAR1_CTRL_DATA__seli__BITNR) | \
+ (R_PAR1_CTRL_DATA__autofd__##f4##__VAL(R_PAR1_CTRL_DATA_, autofd_, v4) << R_PAR1_CTRL_DATA__autofd__BITNR) | \
+ (R_PAR1_CTRL_DATA__strb__##f5##__VAL(R_PAR1_CTRL_DATA_, strb_, v5) << R_PAR1_CTRL_DATA__strb__BITNR) | \
+ (R_PAR1_CTRL_DATA__init__##f6##__VAL(R_PAR1_CTRL_DATA_, init_, v6) << R_PAR1_CTRL_DATA__init__BITNR) | \
+ (R_PAR1_CTRL_DATA__ecp_cmd__##f7##__VAL(R_PAR1_CTRL_DATA_, ecp_cmd_, v7) << R_PAR1_CTRL_DATA__ecp_cmd__BITNR) | \
+ (R_PAR1_CTRL_DATA__data__##f8##__VAL(R_PAR1_CTRL_DATA_, data_, v8) << R_PAR1_CTRL_DATA__data__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR1_CTRL_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR1_CTRL_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR1_CTRL_DATA_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8) ( \
+ (R_PAR1_CTRL_DATA__peri_int__##f1_##_VAL(R_PAR1_CTRL_DATA_, peri_int_, v1) << R_PAR1_CTRL_DATA__peri_int__BITNR) | \
+ (R_PAR1_CTRL_DATA__oe__##f2_##_VAL(R_PAR1_CTRL_DATA_, oe_, v2) << R_PAR1_CTRL_DATA__oe__BITNR) | \
+ (R_PAR1_CTRL_DATA__seli__##f3_##_VAL(R_PAR1_CTRL_DATA_, seli_, v3) << R_PAR1_CTRL_DATA__seli__BITNR) | \
+ (R_PAR1_CTRL_DATA__autofd__##f4_##_VAL(R_PAR1_CTRL_DATA_, autofd_, v4) << R_PAR1_CTRL_DATA__autofd__BITNR) | \
+ (R_PAR1_CTRL_DATA__strb__##f5_##_VAL(R_PAR1_CTRL_DATA_, strb_, v5) << R_PAR1_CTRL_DATA__strb__BITNR) | \
+ (R_PAR1_CTRL_DATA__init__##f6_##_VAL(R_PAR1_CTRL_DATA_, init_, v6) << R_PAR1_CTRL_DATA__init__BITNR) | \
+ (R_PAR1_CTRL_DATA__ecp_cmd__##f7_##_VAL(R_PAR1_CTRL_DATA_, ecp_cmd_, v7) << R_PAR1_CTRL_DATA__ecp_cmd__BITNR) | \
+ (R_PAR1_CTRL_DATA__data__##f8_##_VAL(R_PAR1_CTRL_DATA_, data_, v8) << R_PAR1_CTRL_DATA__data__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PAR1_DELAY
+ * - type: WO
+ * - addr: 0xb0000058
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PAR1_DELAY
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PAR1_DELAY.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_PAR1_DELAY.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PAR1_DELAY(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ *R_PAR1_DELAY__SADDR = ( \
+ REG_INITIATED(R_PAR1_DELAY_) \
+ REG_VAL__R_PAR1_DELAY_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6) \
+ ), \
+ R_PAR1_DELAY__WRITE(R_PAR1_DELAY__ADDR, *R_PAR1_DELAY__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PAR1_DELAY__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PAR1_DELAY.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_PAR1_DELAY.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PAR1_DELAY__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ *R_PAR1_DELAY__SADDR = ( \
+ REG_INITIATED(R_PAR1_DELAY_) \
+ REG_VAL__R_PAR1_DELAY_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PAR1_DELAY
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PAR1_DELAY(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ (R_PAR1_DELAY__fine_hold__##f1##__MASK & REG__##v1) | \
+ (R_PAR1_DELAY__hold__##f2##__MASK & REG__##v2) | \
+ (R_PAR1_DELAY__fine_strb__##f3##__MASK & REG__##v3) | \
+ (R_PAR1_DELAY__strobe__##f4##__MASK & REG__##v4) | \
+ (R_PAR1_DELAY__fine_setup__##f5##__MASK & REG__##v5) | \
+ (R_PAR1_DELAY__setup__##f6##__MASK & REG__##v6) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR1_DELAY
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR1_DELAY.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR1_DELAY(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ (R_PAR1_DELAY__fine_hold__##f1##__VAL(R_PAR1_DELAY_, fine_hold_, v1) << R_PAR1_DELAY__fine_hold__BITNR) | \
+ (R_PAR1_DELAY__hold__##f2##__VAL(R_PAR1_DELAY_, hold_, v2) << R_PAR1_DELAY__hold__BITNR) | \
+ (R_PAR1_DELAY__fine_strb__##f3##__VAL(R_PAR1_DELAY_, fine_strb_, v3) << R_PAR1_DELAY__fine_strb__BITNR) | \
+ (R_PAR1_DELAY__strobe__##f4##__VAL(R_PAR1_DELAY_, strobe_, v4) << R_PAR1_DELAY__strobe__BITNR) | \
+ (R_PAR1_DELAY__fine_setup__##f5##__VAL(R_PAR1_DELAY_, fine_setup_, v5) << R_PAR1_DELAY__fine_setup__BITNR) | \
+ (R_PAR1_DELAY__setup__##f6##__VAL(R_PAR1_DELAY_, setup_, v6) << R_PAR1_DELAY__setup__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR1_DELAY_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR1_DELAY.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR1_DELAY_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6) ( \
+ (R_PAR1_DELAY__fine_hold__##f1_##_VAL(R_PAR1_DELAY_, fine_hold_, v1) << R_PAR1_DELAY__fine_hold__BITNR) | \
+ (R_PAR1_DELAY__hold__##f2_##_VAL(R_PAR1_DELAY_, hold_, v2) << R_PAR1_DELAY__hold__BITNR) | \
+ (R_PAR1_DELAY__fine_strb__##f3_##_VAL(R_PAR1_DELAY_, fine_strb_, v3) << R_PAR1_DELAY__fine_strb__BITNR) | \
+ (R_PAR1_DELAY__strobe__##f4_##_VAL(R_PAR1_DELAY_, strobe_, v4) << R_PAR1_DELAY__strobe__BITNR) | \
+ (R_PAR1_DELAY__fine_setup__##f5_##_VAL(R_PAR1_DELAY_, fine_setup_, v5) << R_PAR1_DELAY__fine_setup__BITNR) | \
+ (R_PAR1_DELAY__setup__##f6_##_VAL(R_PAR1_DELAY_, setup_, v6) << R_PAR1_DELAY__setup__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PAR1_STATUS
+ * - type: RO
+ * - addr: 0xb0000052
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PAR1_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PAR1_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_PAR1_STATUS__mode__##f1##__MASK & REG__##v1) | \
+ (R_PAR1_STATUS__perr__##f2##__MASK & REG__##v2) | \
+ (R_PAR1_STATUS__ack__##f3##__MASK & REG__##v3) | \
+ (R_PAR1_STATUS__busy__##f4##__MASK & REG__##v4) | \
+ (R_PAR1_STATUS__fault__##f5##__MASK & REG__##v5) | \
+ (R_PAR1_STATUS__sel__##f6##__MASK & REG__##v6) | \
+ (R_PAR1_STATUS__ext_mode__##f7##__MASK & REG__##v7) | \
+ (R_PAR1_STATUS__tr_rdy__##f8##__MASK & REG__##v8) | \
+ (R_PAR1_STATUS__dav__##f9##__MASK & REG__##v9) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR1_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR1_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR1_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_PAR1_STATUS__mode__##f1##__VAL(R_PAR1_STATUS_, mode_, v1) << R_PAR1_STATUS__mode__BITNR) | \
+ (R_PAR1_STATUS__perr__##f2##__VAL(R_PAR1_STATUS_, perr_, v2) << R_PAR1_STATUS__perr__BITNR) | \
+ (R_PAR1_STATUS__ack__##f3##__VAL(R_PAR1_STATUS_, ack_, v3) << R_PAR1_STATUS__ack__BITNR) | \
+ (R_PAR1_STATUS__busy__##f4##__VAL(R_PAR1_STATUS_, busy_, v4) << R_PAR1_STATUS__busy__BITNR) | \
+ (R_PAR1_STATUS__fault__##f5##__VAL(R_PAR1_STATUS_, fault_, v5) << R_PAR1_STATUS__fault__BITNR) | \
+ (R_PAR1_STATUS__sel__##f6##__VAL(R_PAR1_STATUS_, sel_, v6) << R_PAR1_STATUS__sel__BITNR) | \
+ (R_PAR1_STATUS__ext_mode__##f7##__VAL(R_PAR1_STATUS_, ext_mode_, v7) << R_PAR1_STATUS__ext_mode__BITNR) | \
+ (R_PAR1_STATUS__tr_rdy__##f8##__VAL(R_PAR1_STATUS_, tr_rdy_, v8) << R_PAR1_STATUS__tr_rdy__BITNR) | \
+ (R_PAR1_STATUS__dav__##f9##__VAL(R_PAR1_STATUS_, dav_, v9) << R_PAR1_STATUS__dav__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR1_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR1_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR1_STATUS_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9) ( \
+ (R_PAR1_STATUS__mode__##f1_##_VAL(R_PAR1_STATUS_, mode_, v1) << R_PAR1_STATUS__mode__BITNR) | \
+ (R_PAR1_STATUS__perr__##f2_##_VAL(R_PAR1_STATUS_, perr_, v2) << R_PAR1_STATUS__perr__BITNR) | \
+ (R_PAR1_STATUS__ack__##f3_##_VAL(R_PAR1_STATUS_, ack_, v3) << R_PAR1_STATUS__ack__BITNR) | \
+ (R_PAR1_STATUS__busy__##f4_##_VAL(R_PAR1_STATUS_, busy_, v4) << R_PAR1_STATUS__busy__BITNR) | \
+ (R_PAR1_STATUS__fault__##f5_##_VAL(R_PAR1_STATUS_, fault_, v5) << R_PAR1_STATUS__fault__BITNR) | \
+ (R_PAR1_STATUS__sel__##f6_##_VAL(R_PAR1_STATUS_, sel_, v6) << R_PAR1_STATUS__sel__BITNR) | \
+ (R_PAR1_STATUS__ext_mode__##f7_##_VAL(R_PAR1_STATUS_, ext_mode_, v7) << R_PAR1_STATUS__ext_mode__BITNR) | \
+ (R_PAR1_STATUS__tr_rdy__##f8_##_VAL(R_PAR1_STATUS_, tr_rdy_, v8) << R_PAR1_STATUS__tr_rdy__BITNR) | \
+ (R_PAR1_STATUS__dav__##f9_##_VAL(R_PAR1_STATUS_, dav_, v9) << R_PAR1_STATUS__dav__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PAR1_STATUS_DATA
+ * - type: RO
+ * - addr: 0xb0000050
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PAR1_STATUS_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PAR1_STATUS_DATA(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11) ( \
+ (R_PAR1_STATUS_DATA__mode__##f1##__MASK & REG__##v1) | \
+ (R_PAR1_STATUS_DATA__perr__##f2##__MASK & REG__##v2) | \
+ (R_PAR1_STATUS_DATA__ack__##f3##__MASK & REG__##v3) | \
+ (R_PAR1_STATUS_DATA__busy__##f4##__MASK & REG__##v4) | \
+ (R_PAR1_STATUS_DATA__fault__##f5##__MASK & REG__##v5) | \
+ (R_PAR1_STATUS_DATA__sel__##f6##__MASK & REG__##v6) | \
+ (R_PAR1_STATUS_DATA__ext_mode__##f7##__MASK & REG__##v7) | \
+ (R_PAR1_STATUS_DATA__tr_rdy__##f8##__MASK & REG__##v8) | \
+ (R_PAR1_STATUS_DATA__dav__##f9##__MASK & REG__##v9) | \
+ (R_PAR1_STATUS_DATA__ecp_cmd__##f10##__MASK & REG__##v10) | \
+ (R_PAR1_STATUS_DATA__data__##f11##__MASK & REG__##v11) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR1_STATUS_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR1_STATUS_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR1_STATUS_DATA(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11) ( \
+ (R_PAR1_STATUS_DATA__mode__##f1##__VAL(R_PAR1_STATUS_DATA_, mode_, v1) << R_PAR1_STATUS_DATA__mode__BITNR) | \
+ (R_PAR1_STATUS_DATA__perr__##f2##__VAL(R_PAR1_STATUS_DATA_, perr_, v2) << R_PAR1_STATUS_DATA__perr__BITNR) | \
+ (R_PAR1_STATUS_DATA__ack__##f3##__VAL(R_PAR1_STATUS_DATA_, ack_, v3) << R_PAR1_STATUS_DATA__ack__BITNR) | \
+ (R_PAR1_STATUS_DATA__busy__##f4##__VAL(R_PAR1_STATUS_DATA_, busy_, v4) << R_PAR1_STATUS_DATA__busy__BITNR) | \
+ (R_PAR1_STATUS_DATA__fault__##f5##__VAL(R_PAR1_STATUS_DATA_, fault_, v5) << R_PAR1_STATUS_DATA__fault__BITNR) | \
+ (R_PAR1_STATUS_DATA__sel__##f6##__VAL(R_PAR1_STATUS_DATA_, sel_, v6) << R_PAR1_STATUS_DATA__sel__BITNR) | \
+ (R_PAR1_STATUS_DATA__ext_mode__##f7##__VAL(R_PAR1_STATUS_DATA_, ext_mode_, v7) << R_PAR1_STATUS_DATA__ext_mode__BITNR) | \
+ (R_PAR1_STATUS_DATA__tr_rdy__##f8##__VAL(R_PAR1_STATUS_DATA_, tr_rdy_, v8) << R_PAR1_STATUS_DATA__tr_rdy__BITNR) | \
+ (R_PAR1_STATUS_DATA__dav__##f9##__VAL(R_PAR1_STATUS_DATA_, dav_, v9) << R_PAR1_STATUS_DATA__dav__BITNR) | \
+ (R_PAR1_STATUS_DATA__ecp_cmd__##f10##__VAL(R_PAR1_STATUS_DATA_, ecp_cmd_, v10) << R_PAR1_STATUS_DATA__ecp_cmd__BITNR) | \
+ (R_PAR1_STATUS_DATA__data__##f11##__VAL(R_PAR1_STATUS_DATA_, data_, v11) << R_PAR1_STATUS_DATA__data__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR1_STATUS_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR1_STATUS_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR1_STATUS_DATA_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11) ( \
+ (R_PAR1_STATUS_DATA__mode__##f1_##_VAL(R_PAR1_STATUS_DATA_, mode_, v1) << R_PAR1_STATUS_DATA__mode__BITNR) | \
+ (R_PAR1_STATUS_DATA__perr__##f2_##_VAL(R_PAR1_STATUS_DATA_, perr_, v2) << R_PAR1_STATUS_DATA__perr__BITNR) | \
+ (R_PAR1_STATUS_DATA__ack__##f3_##_VAL(R_PAR1_STATUS_DATA_, ack_, v3) << R_PAR1_STATUS_DATA__ack__BITNR) | \
+ (R_PAR1_STATUS_DATA__busy__##f4_##_VAL(R_PAR1_STATUS_DATA_, busy_, v4) << R_PAR1_STATUS_DATA__busy__BITNR) | \
+ (R_PAR1_STATUS_DATA__fault__##f5_##_VAL(R_PAR1_STATUS_DATA_, fault_, v5) << R_PAR1_STATUS_DATA__fault__BITNR) | \
+ (R_PAR1_STATUS_DATA__sel__##f6_##_VAL(R_PAR1_STATUS_DATA_, sel_, v6) << R_PAR1_STATUS_DATA__sel__BITNR) | \
+ (R_PAR1_STATUS_DATA__ext_mode__##f7_##_VAL(R_PAR1_STATUS_DATA_, ext_mode_, v7) << R_PAR1_STATUS_DATA__ext_mode__BITNR) | \
+ (R_PAR1_STATUS_DATA__tr_rdy__##f8_##_VAL(R_PAR1_STATUS_DATA_, tr_rdy_, v8) << R_PAR1_STATUS_DATA__tr_rdy__BITNR) | \
+ (R_PAR1_STATUS_DATA__dav__##f9_##_VAL(R_PAR1_STATUS_DATA_, dav_, v9) << R_PAR1_STATUS_DATA__dav__BITNR) | \
+ (R_PAR1_STATUS_DATA__ecp_cmd__##f10_##_VAL(R_PAR1_STATUS_DATA_, ecp_cmd_, v10) << R_PAR1_STATUS_DATA__ecp_cmd__BITNR) | \
+ (R_PAR1_STATUS_DATA__data__##f11_##_VAL(R_PAR1_STATUS_DATA_, data_, v11) << R_PAR1_STATUS_DATA__data__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PAR_ECP16_DATA
+ * - type: RW
+ * - addr: 0xb0000040
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PAR_ECP16_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PAR_ECP16_DATA.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_PAR_ECP16_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PAR_ECP16_DATA(f1,v1) ( \
+ R_PAR_ECP16_DATA__WRITE(R_PAR_ECP16_DATA__ADDR, ( \
+ REG_VAL__R_PAR_ECP16_DATA_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PAR_ECP16_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PAR_ECP16_DATA(f1,v1) ( \
+ (R_PAR_ECP16_DATA__data__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR_ECP16_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR_ECP16_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR_ECP16_DATA(f1,v1) ( \
+ (R_PAR_ECP16_DATA__data__##f1##__VAL(R_PAR_ECP16_DATA_, data_, v1) << R_PAR_ECP16_DATA__data__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PAR_ECP16_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PAR_ECP16_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PAR_ECP16_DATA_(f1_,v1) ( \
+ (R_PAR_ECP16_DATA__data__##f1_##_VAL(R_PAR_ECP16_DATA_, data_, v1) << R_PAR_ECP16_DATA__data__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PHY_COUNTERS
+ * - type: RO
+ * - addr: 0xb00000ac
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PHY_COUNTERS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PHY_COUNTERS(f1,v1,f2,v2) ( \
+ (R_PHY_COUNTERS__sqe_test_error__##f1##__MASK & REG__##v1) | \
+ (R_PHY_COUNTERS__carrier_loss__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PHY_COUNTERS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PHY_COUNTERS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PHY_COUNTERS(f1,v1,f2,v2) ( \
+ (R_PHY_COUNTERS__sqe_test_error__##f1##__VAL(R_PHY_COUNTERS_, sqe_test_error_, v1) << R_PHY_COUNTERS__sqe_test_error__BITNR) | \
+ (R_PHY_COUNTERS__carrier_loss__##f2##__VAL(R_PHY_COUNTERS_, carrier_loss_, v2) << R_PHY_COUNTERS__carrier_loss__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PHY_COUNTERS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PHY_COUNTERS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PHY_COUNTERS_(f1_,v1,f2_,v2) ( \
+ (R_PHY_COUNTERS__sqe_test_error__##f1_##_VAL(R_PHY_COUNTERS_, sqe_test_error_, v1) << R_PHY_COUNTERS__sqe_test_error__BITNR) | \
+ (R_PHY_COUNTERS__carrier_loss__##f2_##_VAL(R_PHY_COUNTERS_, carrier_loss_, v2) << R_PHY_COUNTERS__carrier_loss__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PORT_G_DATA
+ * - type: RW
+ * - addr: 0xb0000028
+ * - group: General config registers
+ */
+
+#if USE_GROUP__General_config_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PORT_G_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PORT_G_DATA.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_PORT_G_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PORT_G_DATA(f1,v1) ( \
+ R_PORT_G_DATA__WRITE(R_PORT_G_DATA__ADDR, ( \
+ REG_VAL__R_PORT_G_DATA_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PORT_G_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PORT_G_DATA(f1,v1) ( \
+ (R_PORT_G_DATA__data__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PORT_G_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PORT_G_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PORT_G_DATA(f1,v1) ( \
+ (R_PORT_G_DATA__data__##f1##__VAL(R_PORT_G_DATA_, data_, v1) << R_PORT_G_DATA__data__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PORT_G_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PORT_G_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PORT_G_DATA_(f1_,v1) ( \
+ (R_PORT_G_DATA__data__##f1_##_VAL(R_PORT_G_DATA_, data_, v1) << R_PORT_G_DATA__data__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PORT_PA_DATA
+ * - type: WO
+ * - addr: 0xb0000030
+ * - group: General port configuration registers
+ */
+
+#if USE_GROUP__General_port_configuration_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PORT_PA_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PORT_PA_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_PORT_PA_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PORT_PA_DATA(f1,v1) ( \
+ *R_PORT_PA_DATA__SADDR = ( \
+ REG_INITIATED(R_PORT_PA_DATA_) \
+ REG_VAL__R_PORT_PA_DATA_(f1##_,v1) \
+ ), \
+ R_PORT_PA_DATA__WRITE(R_PORT_PA_DATA__ADDR, *R_PORT_PA_DATA__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PORT_PA_DATA__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PORT_PA_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_PORT_PA_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PORT_PA_DATA__SHADOW(f1,v1) ( \
+ *R_PORT_PA_DATA__SADDR = ( \
+ REG_INITIATED(R_PORT_PA_DATA_) \
+ REG_VAL__R_PORT_PA_DATA_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PORT_PA_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PORT_PA_DATA(f1,v1) ( \
+ (R_PORT_PA_DATA__data_out__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PORT_PA_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PORT_PA_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PORT_PA_DATA(f1,v1) ( \
+ (R_PORT_PA_DATA__data_out__##f1##__VAL(R_PORT_PA_DATA_, data_out_, v1) << R_PORT_PA_DATA__data_out__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PORT_PA_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PORT_PA_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PORT_PA_DATA_(f1_,v1) ( \
+ (R_PORT_PA_DATA__data_out__##f1_##_VAL(R_PORT_PA_DATA_, data_out_, v1) << R_PORT_PA_DATA__data_out__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PORT_PA_DIR
+ * - type: WO
+ * - addr: 0xb0000031
+ * - group: General port configuration registers
+ */
+
+#if USE_GROUP__General_port_configuration_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PORT_PA_DIR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PORT_PA_DIR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_PORT_PA_DIR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PORT_PA_DIR(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_PORT_PA_DIR__SADDR = ( \
+ REG_INITIATED(R_PORT_PA_DIR_) \
+ REG_VAL__R_PORT_PA_DIR_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ), \
+ R_PORT_PA_DIR__WRITE(R_PORT_PA_DIR__ADDR, *R_PORT_PA_DIR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PORT_PA_DIR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PORT_PA_DIR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_PORT_PA_DIR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PORT_PA_DIR__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_PORT_PA_DIR__SADDR = ( \
+ REG_INITIATED(R_PORT_PA_DIR_) \
+ REG_VAL__R_PORT_PA_DIR_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PORT_PA_DIR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PORT_PA_DIR(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_PORT_PA_DIR__dir7__##f1##__MASK & REG__##v1) | \
+ (R_PORT_PA_DIR__dir6__##f2##__MASK & REG__##v2) | \
+ (R_PORT_PA_DIR__dir5__##f3##__MASK & REG__##v3) | \
+ (R_PORT_PA_DIR__dir4__##f4##__MASK & REG__##v4) | \
+ (R_PORT_PA_DIR__dir3__##f5##__MASK & REG__##v5) | \
+ (R_PORT_PA_DIR__dir2__##f6##__MASK & REG__##v6) | \
+ (R_PORT_PA_DIR__dir1__##f7##__MASK & REG__##v7) | \
+ (R_PORT_PA_DIR__dir0__##f8##__MASK & REG__##v8) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PORT_PA_DIR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PORT_PA_DIR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PORT_PA_DIR(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_PORT_PA_DIR__dir7__##f1##__VAL(R_PORT_PA_DIR_, dir7_, v1) << R_PORT_PA_DIR__dir7__BITNR) | \
+ (R_PORT_PA_DIR__dir6__##f2##__VAL(R_PORT_PA_DIR_, dir6_, v2) << R_PORT_PA_DIR__dir6__BITNR) | \
+ (R_PORT_PA_DIR__dir5__##f3##__VAL(R_PORT_PA_DIR_, dir5_, v3) << R_PORT_PA_DIR__dir5__BITNR) | \
+ (R_PORT_PA_DIR__dir4__##f4##__VAL(R_PORT_PA_DIR_, dir4_, v4) << R_PORT_PA_DIR__dir4__BITNR) | \
+ (R_PORT_PA_DIR__dir3__##f5##__VAL(R_PORT_PA_DIR_, dir3_, v5) << R_PORT_PA_DIR__dir3__BITNR) | \
+ (R_PORT_PA_DIR__dir2__##f6##__VAL(R_PORT_PA_DIR_, dir2_, v6) << R_PORT_PA_DIR__dir2__BITNR) | \
+ (R_PORT_PA_DIR__dir1__##f7##__VAL(R_PORT_PA_DIR_, dir1_, v7) << R_PORT_PA_DIR__dir1__BITNR) | \
+ (R_PORT_PA_DIR__dir0__##f8##__VAL(R_PORT_PA_DIR_, dir0_, v8) << R_PORT_PA_DIR__dir0__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PORT_PA_DIR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PORT_PA_DIR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PORT_PA_DIR_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8) ( \
+ (R_PORT_PA_DIR__dir7__##f1_##_VAL(R_PORT_PA_DIR_, dir7_, v1) << R_PORT_PA_DIR__dir7__BITNR) | \
+ (R_PORT_PA_DIR__dir6__##f2_##_VAL(R_PORT_PA_DIR_, dir6_, v2) << R_PORT_PA_DIR__dir6__BITNR) | \
+ (R_PORT_PA_DIR__dir5__##f3_##_VAL(R_PORT_PA_DIR_, dir5_, v3) << R_PORT_PA_DIR__dir5__BITNR) | \
+ (R_PORT_PA_DIR__dir4__##f4_##_VAL(R_PORT_PA_DIR_, dir4_, v4) << R_PORT_PA_DIR__dir4__BITNR) | \
+ (R_PORT_PA_DIR__dir3__##f5_##_VAL(R_PORT_PA_DIR_, dir3_, v5) << R_PORT_PA_DIR__dir3__BITNR) | \
+ (R_PORT_PA_DIR__dir2__##f6_##_VAL(R_PORT_PA_DIR_, dir2_, v6) << R_PORT_PA_DIR__dir2__BITNR) | \
+ (R_PORT_PA_DIR__dir1__##f7_##_VAL(R_PORT_PA_DIR_, dir1_, v7) << R_PORT_PA_DIR__dir1__BITNR) | \
+ (R_PORT_PA_DIR__dir0__##f8_##_VAL(R_PORT_PA_DIR_, dir0_, v8) << R_PORT_PA_DIR__dir0__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PORT_PA_READ
+ * - type: RO
+ * - addr: 0xb0000030
+ * - group: General port configuration registers
+ */
+
+#if USE_GROUP__General_port_configuration_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PORT_PA_READ
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PORT_PA_READ(f1,v1) ( \
+ (R_PORT_PA_READ__data_in__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PORT_PA_READ
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PORT_PA_READ.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PORT_PA_READ(f1,v1) ( \
+ (R_PORT_PA_READ__data_in__##f1##__VAL(R_PORT_PA_READ_, data_in_, v1) << R_PORT_PA_READ__data_in__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PORT_PA_READ_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PORT_PA_READ.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PORT_PA_READ_(f1_,v1) ( \
+ (R_PORT_PA_READ__data_in__##f1_##_VAL(R_PORT_PA_READ_, data_in_, v1) << R_PORT_PA_READ__data_in__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PORT_PA_SET
+ * - type: WO
+ * - addr: 0xb0000030
+ * - group: General port configuration registers
+ */
+
+#if USE_GROUP__General_port_configuration_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PORT_PA_SET
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PORT_PA_SET.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_PORT_PA_SET.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PORT_PA_SET(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ *R_PORT_PA_SET__SADDR = ( \
+ REG_INITIATED(R_PORT_PA_SET_) \
+ REG_VAL__R_PORT_PA_SET_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9) \
+ ), \
+ R_PORT_PA_SET__WRITE(R_PORT_PA_SET__ADDR, *R_PORT_PA_SET__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PORT_PA_SET__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PORT_PA_SET.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_PORT_PA_SET.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PORT_PA_SET__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ *R_PORT_PA_SET__SADDR = ( \
+ REG_INITIATED(R_PORT_PA_SET_) \
+ REG_VAL__R_PORT_PA_SET_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PORT_PA_SET
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PORT_PA_SET(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_PORT_PA_SET__dir7__##f1##__MASK & REG__##v1) | \
+ (R_PORT_PA_SET__dir6__##f2##__MASK & REG__##v2) | \
+ (R_PORT_PA_SET__dir5__##f3##__MASK & REG__##v3) | \
+ (R_PORT_PA_SET__dir4__##f4##__MASK & REG__##v4) | \
+ (R_PORT_PA_SET__dir3__##f5##__MASK & REG__##v5) | \
+ (R_PORT_PA_SET__dir2__##f6##__MASK & REG__##v6) | \
+ (R_PORT_PA_SET__dir1__##f7##__MASK & REG__##v7) | \
+ (R_PORT_PA_SET__dir0__##f8##__MASK & REG__##v8) | \
+ (R_PORT_PA_SET__data_out__##f9##__MASK & REG__##v9) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PORT_PA_SET
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PORT_PA_SET.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PORT_PA_SET(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_PORT_PA_SET__dir7__##f1##__VAL(R_PORT_PA_SET_, dir7_, v1) << R_PORT_PA_SET__dir7__BITNR) | \
+ (R_PORT_PA_SET__dir6__##f2##__VAL(R_PORT_PA_SET_, dir6_, v2) << R_PORT_PA_SET__dir6__BITNR) | \
+ (R_PORT_PA_SET__dir5__##f3##__VAL(R_PORT_PA_SET_, dir5_, v3) << R_PORT_PA_SET__dir5__BITNR) | \
+ (R_PORT_PA_SET__dir4__##f4##__VAL(R_PORT_PA_SET_, dir4_, v4) << R_PORT_PA_SET__dir4__BITNR) | \
+ (R_PORT_PA_SET__dir3__##f5##__VAL(R_PORT_PA_SET_, dir3_, v5) << R_PORT_PA_SET__dir3__BITNR) | \
+ (R_PORT_PA_SET__dir2__##f6##__VAL(R_PORT_PA_SET_, dir2_, v6) << R_PORT_PA_SET__dir2__BITNR) | \
+ (R_PORT_PA_SET__dir1__##f7##__VAL(R_PORT_PA_SET_, dir1_, v7) << R_PORT_PA_SET__dir1__BITNR) | \
+ (R_PORT_PA_SET__dir0__##f8##__VAL(R_PORT_PA_SET_, dir0_, v8) << R_PORT_PA_SET__dir0__BITNR) | \
+ (R_PORT_PA_SET__data_out__##f9##__VAL(R_PORT_PA_SET_, data_out_, v9) << R_PORT_PA_SET__data_out__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PORT_PA_SET_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PORT_PA_SET.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PORT_PA_SET_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9) ( \
+ (R_PORT_PA_SET__dir7__##f1_##_VAL(R_PORT_PA_SET_, dir7_, v1) << R_PORT_PA_SET__dir7__BITNR) | \
+ (R_PORT_PA_SET__dir6__##f2_##_VAL(R_PORT_PA_SET_, dir6_, v2) << R_PORT_PA_SET__dir6__BITNR) | \
+ (R_PORT_PA_SET__dir5__##f3_##_VAL(R_PORT_PA_SET_, dir5_, v3) << R_PORT_PA_SET__dir5__BITNR) | \
+ (R_PORT_PA_SET__dir4__##f4_##_VAL(R_PORT_PA_SET_, dir4_, v4) << R_PORT_PA_SET__dir4__BITNR) | \
+ (R_PORT_PA_SET__dir3__##f5_##_VAL(R_PORT_PA_SET_, dir3_, v5) << R_PORT_PA_SET__dir3__BITNR) | \
+ (R_PORT_PA_SET__dir2__##f6_##_VAL(R_PORT_PA_SET_, dir2_, v6) << R_PORT_PA_SET__dir2__BITNR) | \
+ (R_PORT_PA_SET__dir1__##f7_##_VAL(R_PORT_PA_SET_, dir1_, v7) << R_PORT_PA_SET__dir1__BITNR) | \
+ (R_PORT_PA_SET__dir0__##f8_##_VAL(R_PORT_PA_SET_, dir0_, v8) << R_PORT_PA_SET__dir0__BITNR) | \
+ (R_PORT_PA_SET__data_out__##f9_##_VAL(R_PORT_PA_SET_, data_out_, v9) << R_PORT_PA_SET__data_out__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PORT_PB_CONFIG
+ * - type: WO
+ * - addr: 0xb000003a
+ * - group: General port configuration registers
+ */
+
+#if USE_GROUP__General_port_configuration_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PORT_PB_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PORT_PB_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_PORT_PB_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PORT_PB_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_PORT_PB_CONFIG__SADDR = ( \
+ REG_INITIATED(R_PORT_PB_CONFIG_) \
+ REG_VAL__R_PORT_PB_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ), \
+ R_PORT_PB_CONFIG__WRITE(R_PORT_PB_CONFIG__ADDR, *R_PORT_PB_CONFIG__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PORT_PB_CONFIG__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PORT_PB_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_PORT_PB_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PORT_PB_CONFIG__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_PORT_PB_CONFIG__SADDR = ( \
+ REG_INITIATED(R_PORT_PB_CONFIG_) \
+ REG_VAL__R_PORT_PB_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PORT_PB_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PORT_PB_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_PORT_PB_CONFIG__cs7__##f1##__MASK & REG__##v1) | \
+ (R_PORT_PB_CONFIG__cs6__##f2##__MASK & REG__##v2) | \
+ (R_PORT_PB_CONFIG__cs5__##f3##__MASK & REG__##v3) | \
+ (R_PORT_PB_CONFIG__cs4__##f4##__MASK & REG__##v4) | \
+ (R_PORT_PB_CONFIG__cs3__##f5##__MASK & REG__##v5) | \
+ (R_PORT_PB_CONFIG__cs2__##f6##__MASK & REG__##v6) | \
+ (R_PORT_PB_CONFIG__scsi1__##f7##__MASK & REG__##v7) | \
+ (R_PORT_PB_CONFIG__scsi0__##f8##__MASK & REG__##v8) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PORT_PB_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PORT_PB_CONFIG.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PORT_PB_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_PORT_PB_CONFIG__cs7__##f1##__VAL(R_PORT_PB_CONFIG_, cs7_, v1) << R_PORT_PB_CONFIG__cs7__BITNR) | \
+ (R_PORT_PB_CONFIG__cs6__##f2##__VAL(R_PORT_PB_CONFIG_, cs6_, v2) << R_PORT_PB_CONFIG__cs6__BITNR) | \
+ (R_PORT_PB_CONFIG__cs5__##f3##__VAL(R_PORT_PB_CONFIG_, cs5_, v3) << R_PORT_PB_CONFIG__cs5__BITNR) | \
+ (R_PORT_PB_CONFIG__cs4__##f4##__VAL(R_PORT_PB_CONFIG_, cs4_, v4) << R_PORT_PB_CONFIG__cs4__BITNR) | \
+ (R_PORT_PB_CONFIG__cs3__##f5##__VAL(R_PORT_PB_CONFIG_, cs3_, v5) << R_PORT_PB_CONFIG__cs3__BITNR) | \
+ (R_PORT_PB_CONFIG__cs2__##f6##__VAL(R_PORT_PB_CONFIG_, cs2_, v6) << R_PORT_PB_CONFIG__cs2__BITNR) | \
+ (R_PORT_PB_CONFIG__scsi1__##f7##__VAL(R_PORT_PB_CONFIG_, scsi1_, v7) << R_PORT_PB_CONFIG__scsi1__BITNR) | \
+ (R_PORT_PB_CONFIG__scsi0__##f8##__VAL(R_PORT_PB_CONFIG_, scsi0_, v8) << R_PORT_PB_CONFIG__scsi0__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PORT_PB_CONFIG_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PORT_PB_CONFIG.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PORT_PB_CONFIG_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8) ( \
+ (R_PORT_PB_CONFIG__cs7__##f1_##_VAL(R_PORT_PB_CONFIG_, cs7_, v1) << R_PORT_PB_CONFIG__cs7__BITNR) | \
+ (R_PORT_PB_CONFIG__cs6__##f2_##_VAL(R_PORT_PB_CONFIG_, cs6_, v2) << R_PORT_PB_CONFIG__cs6__BITNR) | \
+ (R_PORT_PB_CONFIG__cs5__##f3_##_VAL(R_PORT_PB_CONFIG_, cs5_, v3) << R_PORT_PB_CONFIG__cs5__BITNR) | \
+ (R_PORT_PB_CONFIG__cs4__##f4_##_VAL(R_PORT_PB_CONFIG_, cs4_, v4) << R_PORT_PB_CONFIG__cs4__BITNR) | \
+ (R_PORT_PB_CONFIG__cs3__##f5_##_VAL(R_PORT_PB_CONFIG_, cs3_, v5) << R_PORT_PB_CONFIG__cs3__BITNR) | \
+ (R_PORT_PB_CONFIG__cs2__##f6_##_VAL(R_PORT_PB_CONFIG_, cs2_, v6) << R_PORT_PB_CONFIG__cs2__BITNR) | \
+ (R_PORT_PB_CONFIG__scsi1__##f7_##_VAL(R_PORT_PB_CONFIG_, scsi1_, v7) << R_PORT_PB_CONFIG__scsi1__BITNR) | \
+ (R_PORT_PB_CONFIG__scsi0__##f8_##_VAL(R_PORT_PB_CONFIG_, scsi0_, v8) << R_PORT_PB_CONFIG__scsi0__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PORT_PB_DATA
+ * - type: WO
+ * - addr: 0xb0000038
+ * - group: General port configuration registers
+ */
+
+#if USE_GROUP__General_port_configuration_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PORT_PB_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PORT_PB_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_PORT_PB_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PORT_PB_DATA(f1,v1) ( \
+ *R_PORT_PB_DATA__SADDR = ( \
+ REG_INITIATED(R_PORT_PB_DATA_) \
+ REG_VAL__R_PORT_PB_DATA_(f1##_,v1) \
+ ), \
+ R_PORT_PB_DATA__WRITE(R_PORT_PB_DATA__ADDR, *R_PORT_PB_DATA__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PORT_PB_DATA__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PORT_PB_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_PORT_PB_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PORT_PB_DATA__SHADOW(f1,v1) ( \
+ *R_PORT_PB_DATA__SADDR = ( \
+ REG_INITIATED(R_PORT_PB_DATA_) \
+ REG_VAL__R_PORT_PB_DATA_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PORT_PB_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PORT_PB_DATA(f1,v1) ( \
+ (R_PORT_PB_DATA__data_out__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PORT_PB_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PORT_PB_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PORT_PB_DATA(f1,v1) ( \
+ (R_PORT_PB_DATA__data_out__##f1##__VAL(R_PORT_PB_DATA_, data_out_, v1) << R_PORT_PB_DATA__data_out__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PORT_PB_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PORT_PB_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PORT_PB_DATA_(f1_,v1) ( \
+ (R_PORT_PB_DATA__data_out__##f1_##_VAL(R_PORT_PB_DATA_, data_out_, v1) << R_PORT_PB_DATA__data_out__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PORT_PB_DIR
+ * - type: WO
+ * - addr: 0xb0000039
+ * - group: General port configuration registers
+ */
+
+#if USE_GROUP__General_port_configuration_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PORT_PB_DIR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PORT_PB_DIR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_PORT_PB_DIR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PORT_PB_DIR(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_PORT_PB_DIR__SADDR = ( \
+ REG_INITIATED(R_PORT_PB_DIR_) \
+ REG_VAL__R_PORT_PB_DIR_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ), \
+ R_PORT_PB_DIR__WRITE(R_PORT_PB_DIR__ADDR, *R_PORT_PB_DIR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PORT_PB_DIR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PORT_PB_DIR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_PORT_PB_DIR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PORT_PB_DIR__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_PORT_PB_DIR__SADDR = ( \
+ REG_INITIATED(R_PORT_PB_DIR_) \
+ REG_VAL__R_PORT_PB_DIR_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PORT_PB_DIR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PORT_PB_DIR(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_PORT_PB_DIR__dir7__##f1##__MASK & REG__##v1) | \
+ (R_PORT_PB_DIR__dir6__##f2##__MASK & REG__##v2) | \
+ (R_PORT_PB_DIR__dir5__##f3##__MASK & REG__##v3) | \
+ (R_PORT_PB_DIR__dir4__##f4##__MASK & REG__##v4) | \
+ (R_PORT_PB_DIR__dir3__##f5##__MASK & REG__##v5) | \
+ (R_PORT_PB_DIR__dir2__##f6##__MASK & REG__##v6) | \
+ (R_PORT_PB_DIR__dir1__##f7##__MASK & REG__##v7) | \
+ (R_PORT_PB_DIR__dir0__##f8##__MASK & REG__##v8) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PORT_PB_DIR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PORT_PB_DIR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PORT_PB_DIR(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_PORT_PB_DIR__dir7__##f1##__VAL(R_PORT_PB_DIR_, dir7_, v1) << R_PORT_PB_DIR__dir7__BITNR) | \
+ (R_PORT_PB_DIR__dir6__##f2##__VAL(R_PORT_PB_DIR_, dir6_, v2) << R_PORT_PB_DIR__dir6__BITNR) | \
+ (R_PORT_PB_DIR__dir5__##f3##__VAL(R_PORT_PB_DIR_, dir5_, v3) << R_PORT_PB_DIR__dir5__BITNR) | \
+ (R_PORT_PB_DIR__dir4__##f4##__VAL(R_PORT_PB_DIR_, dir4_, v4) << R_PORT_PB_DIR__dir4__BITNR) | \
+ (R_PORT_PB_DIR__dir3__##f5##__VAL(R_PORT_PB_DIR_, dir3_, v5) << R_PORT_PB_DIR__dir3__BITNR) | \
+ (R_PORT_PB_DIR__dir2__##f6##__VAL(R_PORT_PB_DIR_, dir2_, v6) << R_PORT_PB_DIR__dir2__BITNR) | \
+ (R_PORT_PB_DIR__dir1__##f7##__VAL(R_PORT_PB_DIR_, dir1_, v7) << R_PORT_PB_DIR__dir1__BITNR) | \
+ (R_PORT_PB_DIR__dir0__##f8##__VAL(R_PORT_PB_DIR_, dir0_, v8) << R_PORT_PB_DIR__dir0__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PORT_PB_DIR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PORT_PB_DIR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PORT_PB_DIR_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8) ( \
+ (R_PORT_PB_DIR__dir7__##f1_##_VAL(R_PORT_PB_DIR_, dir7_, v1) << R_PORT_PB_DIR__dir7__BITNR) | \
+ (R_PORT_PB_DIR__dir6__##f2_##_VAL(R_PORT_PB_DIR_, dir6_, v2) << R_PORT_PB_DIR__dir6__BITNR) | \
+ (R_PORT_PB_DIR__dir5__##f3_##_VAL(R_PORT_PB_DIR_, dir5_, v3) << R_PORT_PB_DIR__dir5__BITNR) | \
+ (R_PORT_PB_DIR__dir4__##f4_##_VAL(R_PORT_PB_DIR_, dir4_, v4) << R_PORT_PB_DIR__dir4__BITNR) | \
+ (R_PORT_PB_DIR__dir3__##f5_##_VAL(R_PORT_PB_DIR_, dir3_, v5) << R_PORT_PB_DIR__dir3__BITNR) | \
+ (R_PORT_PB_DIR__dir2__##f6_##_VAL(R_PORT_PB_DIR_, dir2_, v6) << R_PORT_PB_DIR__dir2__BITNR) | \
+ (R_PORT_PB_DIR__dir1__##f7_##_VAL(R_PORT_PB_DIR_, dir1_, v7) << R_PORT_PB_DIR__dir1__BITNR) | \
+ (R_PORT_PB_DIR__dir0__##f8_##_VAL(R_PORT_PB_DIR_, dir0_, v8) << R_PORT_PB_DIR__dir0__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PORT_PB_I2C
+ * - type: WO
+ * - addr: 0xb000003b
+ * - group: General port configuration registers
+ */
+
+#if USE_GROUP__General_port_configuration_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PORT_PB_I2C
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PORT_PB_I2C.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_PORT_PB_I2C.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PORT_PB_I2C(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ *R_PORT_PB_I2C__SADDR = ( \
+ REG_INITIATED(R_PORT_PB_I2C_) \
+ REG_VAL__R_PORT_PB_I2C_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6) \
+ ), \
+ R_PORT_PB_I2C__WRITE(R_PORT_PB_I2C__ADDR, *R_PORT_PB_I2C__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PORT_PB_I2C__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PORT_PB_I2C.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_PORT_PB_I2C.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PORT_PB_I2C__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ *R_PORT_PB_I2C__SADDR = ( \
+ REG_INITIATED(R_PORT_PB_I2C_) \
+ REG_VAL__R_PORT_PB_I2C_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PORT_PB_I2C
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PORT_PB_I2C(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ (R_PORT_PB_I2C__syncser3__##f1##__MASK & REG__##v1) | \
+ (R_PORT_PB_I2C__syncser1__##f2##__MASK & REG__##v2) | \
+ (R_PORT_PB_I2C__i2c_en__##f3##__MASK & REG__##v3) | \
+ (R_PORT_PB_I2C__i2c_d__##f4##__MASK & REG__##v4) | \
+ (R_PORT_PB_I2C__i2c_clk__##f5##__MASK & REG__##v5) | \
+ (R_PORT_PB_I2C__i2c_oe___##f6##__MASK & REG__##v6) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PORT_PB_I2C
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PORT_PB_I2C.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PORT_PB_I2C(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ (R_PORT_PB_I2C__syncser3__##f1##__VAL(R_PORT_PB_I2C_, syncser3_, v1) << R_PORT_PB_I2C__syncser3__BITNR) | \
+ (R_PORT_PB_I2C__syncser1__##f2##__VAL(R_PORT_PB_I2C_, syncser1_, v2) << R_PORT_PB_I2C__syncser1__BITNR) | \
+ (R_PORT_PB_I2C__i2c_en__##f3##__VAL(R_PORT_PB_I2C_, i2c_en_, v3) << R_PORT_PB_I2C__i2c_en__BITNR) | \
+ (R_PORT_PB_I2C__i2c_d__##f4##__VAL(R_PORT_PB_I2C_, i2c_d_, v4) << R_PORT_PB_I2C__i2c_d__BITNR) | \
+ (R_PORT_PB_I2C__i2c_clk__##f5##__VAL(R_PORT_PB_I2C_, i2c_clk_, v5) << R_PORT_PB_I2C__i2c_clk__BITNR) | \
+ (R_PORT_PB_I2C__i2c_oe___##f6##__VAL(R_PORT_PB_I2C_, i2c_oe__, v6) << R_PORT_PB_I2C__i2c_oe___BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PORT_PB_I2C_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PORT_PB_I2C.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PORT_PB_I2C_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6) ( \
+ (R_PORT_PB_I2C__syncser3__##f1_##_VAL(R_PORT_PB_I2C_, syncser3_, v1) << R_PORT_PB_I2C__syncser3__BITNR) | \
+ (R_PORT_PB_I2C__syncser1__##f2_##_VAL(R_PORT_PB_I2C_, syncser1_, v2) << R_PORT_PB_I2C__syncser1__BITNR) | \
+ (R_PORT_PB_I2C__i2c_en__##f3_##_VAL(R_PORT_PB_I2C_, i2c_en_, v3) << R_PORT_PB_I2C__i2c_en__BITNR) | \
+ (R_PORT_PB_I2C__i2c_d__##f4_##_VAL(R_PORT_PB_I2C_, i2c_d_, v4) << R_PORT_PB_I2C__i2c_d__BITNR) | \
+ (R_PORT_PB_I2C__i2c_clk__##f5_##_VAL(R_PORT_PB_I2C_, i2c_clk_, v5) << R_PORT_PB_I2C__i2c_clk__BITNR) | \
+ (R_PORT_PB_I2C__i2c_oe___##f6_##_VAL(R_PORT_PB_I2C_, i2c_oe__, v6) << R_PORT_PB_I2C__i2c_oe___BITNR) \
+)
+
+#endif
+
+/*
+ * R_PORT_PB_READ
+ * - type: RO
+ * - addr: 0xb0000038
+ * - group: General port configuration registers
+ */
+
+#if USE_GROUP__General_port_configuration_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PORT_PB_READ
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PORT_PB_READ(f1,v1) ( \
+ (R_PORT_PB_READ__data_in__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PORT_PB_READ
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PORT_PB_READ.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PORT_PB_READ(f1,v1) ( \
+ (R_PORT_PB_READ__data_in__##f1##__VAL(R_PORT_PB_READ_, data_in_, v1) << R_PORT_PB_READ__data_in__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PORT_PB_READ_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PORT_PB_READ.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PORT_PB_READ_(f1_,v1) ( \
+ (R_PORT_PB_READ__data_in__##f1_##_VAL(R_PORT_PB_READ_, data_in_, v1) << R_PORT_PB_READ__data_in__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PORT_PB_SET
+ * - type: WO
+ * - addr: 0xb0000038
+ * - group: General port configuration registers
+ */
+
+#if USE_GROUP__General_port_configuration_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PORT_PB_SET
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PORT_PB_SET.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_PORT_PB_SET.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PORT_PB_SET(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23) ( \
+ *R_PORT_PB_SET__SADDR = ( \
+ REG_INITIATED(R_PORT_PB_SET_) \
+ REG_VAL__R_PORT_PB_SET_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23) \
+ ), \
+ R_PORT_PB_SET__WRITE(R_PORT_PB_SET__ADDR, *R_PORT_PB_SET__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_PORT_PB_SET__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_PORT_PB_SET.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_PORT_PB_SET.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_PORT_PB_SET__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23) ( \
+ *R_PORT_PB_SET__SADDR = ( \
+ REG_INITIATED(R_PORT_PB_SET_) \
+ REG_VAL__R_PORT_PB_SET_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PORT_PB_SET
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PORT_PB_SET(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23) ( \
+ (R_PORT_PB_SET__syncser3__##f1##__MASK & REG__##v1) | \
+ (R_PORT_PB_SET__syncser1__##f2##__MASK & REG__##v2) | \
+ (R_PORT_PB_SET__i2c_en__##f3##__MASK & REG__##v3) | \
+ (R_PORT_PB_SET__i2c_d__##f4##__MASK & REG__##v4) | \
+ (R_PORT_PB_SET__i2c_clk__##f5##__MASK & REG__##v5) | \
+ (R_PORT_PB_SET__i2c_oe___##f6##__MASK & REG__##v6) | \
+ (R_PORT_PB_SET__cs7__##f7##__MASK & REG__##v7) | \
+ (R_PORT_PB_SET__cs6__##f8##__MASK & REG__##v8) | \
+ (R_PORT_PB_SET__cs5__##f9##__MASK & REG__##v9) | \
+ (R_PORT_PB_SET__cs4__##f10##__MASK & REG__##v10) | \
+ (R_PORT_PB_SET__cs3__##f11##__MASK & REG__##v11) | \
+ (R_PORT_PB_SET__cs2__##f12##__MASK & REG__##v12) | \
+ (R_PORT_PB_SET__scsi1__##f13##__MASK & REG__##v13) | \
+ (R_PORT_PB_SET__scsi0__##f14##__MASK & REG__##v14) | \
+ (R_PORT_PB_SET__dir7__##f15##__MASK & REG__##v15) | \
+ (R_PORT_PB_SET__dir6__##f16##__MASK & REG__##v16) | \
+ (R_PORT_PB_SET__dir5__##f17##__MASK & REG__##v17) | \
+ (R_PORT_PB_SET__dir4__##f18##__MASK & REG__##v18) | \
+ (R_PORT_PB_SET__dir3__##f19##__MASK & REG__##v19) | \
+ (R_PORT_PB_SET__dir2__##f20##__MASK & REG__##v20) | \
+ (R_PORT_PB_SET__dir1__##f21##__MASK & REG__##v21) | \
+ (R_PORT_PB_SET__dir0__##f22##__MASK & REG__##v22) | \
+ (R_PORT_PB_SET__data_out__##f23##__MASK & REG__##v23) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PORT_PB_SET
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PORT_PB_SET.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PORT_PB_SET(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23) ( \
+ (R_PORT_PB_SET__syncser3__##f1##__VAL(R_PORT_PB_SET_, syncser3_, v1) << R_PORT_PB_SET__syncser3__BITNR) | \
+ (R_PORT_PB_SET__syncser1__##f2##__VAL(R_PORT_PB_SET_, syncser1_, v2) << R_PORT_PB_SET__syncser1__BITNR) | \
+ (R_PORT_PB_SET__i2c_en__##f3##__VAL(R_PORT_PB_SET_, i2c_en_, v3) << R_PORT_PB_SET__i2c_en__BITNR) | \
+ (R_PORT_PB_SET__i2c_d__##f4##__VAL(R_PORT_PB_SET_, i2c_d_, v4) << R_PORT_PB_SET__i2c_d__BITNR) | \
+ (R_PORT_PB_SET__i2c_clk__##f5##__VAL(R_PORT_PB_SET_, i2c_clk_, v5) << R_PORT_PB_SET__i2c_clk__BITNR) | \
+ (R_PORT_PB_SET__i2c_oe___##f6##__VAL(R_PORT_PB_SET_, i2c_oe__, v6) << R_PORT_PB_SET__i2c_oe___BITNR) | \
+ (R_PORT_PB_SET__cs7__##f7##__VAL(R_PORT_PB_SET_, cs7_, v7) << R_PORT_PB_SET__cs7__BITNR) | \
+ (R_PORT_PB_SET__cs6__##f8##__VAL(R_PORT_PB_SET_, cs6_, v8) << R_PORT_PB_SET__cs6__BITNR) | \
+ (R_PORT_PB_SET__cs5__##f9##__VAL(R_PORT_PB_SET_, cs5_, v9) << R_PORT_PB_SET__cs5__BITNR) | \
+ (R_PORT_PB_SET__cs4__##f10##__VAL(R_PORT_PB_SET_, cs4_, v10) << R_PORT_PB_SET__cs4__BITNR) | \
+ (R_PORT_PB_SET__cs3__##f11##__VAL(R_PORT_PB_SET_, cs3_, v11) << R_PORT_PB_SET__cs3__BITNR) | \
+ (R_PORT_PB_SET__cs2__##f12##__VAL(R_PORT_PB_SET_, cs2_, v12) << R_PORT_PB_SET__cs2__BITNR) | \
+ (R_PORT_PB_SET__scsi1__##f13##__VAL(R_PORT_PB_SET_, scsi1_, v13) << R_PORT_PB_SET__scsi1__BITNR) | \
+ (R_PORT_PB_SET__scsi0__##f14##__VAL(R_PORT_PB_SET_, scsi0_, v14) << R_PORT_PB_SET__scsi0__BITNR) | \
+ (R_PORT_PB_SET__dir7__##f15##__VAL(R_PORT_PB_SET_, dir7_, v15) << R_PORT_PB_SET__dir7__BITNR) | \
+ (R_PORT_PB_SET__dir6__##f16##__VAL(R_PORT_PB_SET_, dir6_, v16) << R_PORT_PB_SET__dir6__BITNR) | \
+ (R_PORT_PB_SET__dir5__##f17##__VAL(R_PORT_PB_SET_, dir5_, v17) << R_PORT_PB_SET__dir5__BITNR) | \
+ (R_PORT_PB_SET__dir4__##f18##__VAL(R_PORT_PB_SET_, dir4_, v18) << R_PORT_PB_SET__dir4__BITNR) | \
+ (R_PORT_PB_SET__dir3__##f19##__VAL(R_PORT_PB_SET_, dir3_, v19) << R_PORT_PB_SET__dir3__BITNR) | \
+ (R_PORT_PB_SET__dir2__##f20##__VAL(R_PORT_PB_SET_, dir2_, v20) << R_PORT_PB_SET__dir2__BITNR) | \
+ (R_PORT_PB_SET__dir1__##f21##__VAL(R_PORT_PB_SET_, dir1_, v21) << R_PORT_PB_SET__dir1__BITNR) | \
+ (R_PORT_PB_SET__dir0__##f22##__VAL(R_PORT_PB_SET_, dir0_, v22) << R_PORT_PB_SET__dir0__BITNR) | \
+ (R_PORT_PB_SET__data_out__##f23##__VAL(R_PORT_PB_SET_, data_out_, v23) << R_PORT_PB_SET__data_out__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PORT_PB_SET_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PORT_PB_SET.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PORT_PB_SET_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19,f20_,v20,f21_,v21,f22_,v22,f23_,v23) ( \
+ (R_PORT_PB_SET__syncser3__##f1_##_VAL(R_PORT_PB_SET_, syncser3_, v1) << R_PORT_PB_SET__syncser3__BITNR) | \
+ (R_PORT_PB_SET__syncser1__##f2_##_VAL(R_PORT_PB_SET_, syncser1_, v2) << R_PORT_PB_SET__syncser1__BITNR) | \
+ (R_PORT_PB_SET__i2c_en__##f3_##_VAL(R_PORT_PB_SET_, i2c_en_, v3) << R_PORT_PB_SET__i2c_en__BITNR) | \
+ (R_PORT_PB_SET__i2c_d__##f4_##_VAL(R_PORT_PB_SET_, i2c_d_, v4) << R_PORT_PB_SET__i2c_d__BITNR) | \
+ (R_PORT_PB_SET__i2c_clk__##f5_##_VAL(R_PORT_PB_SET_, i2c_clk_, v5) << R_PORT_PB_SET__i2c_clk__BITNR) | \
+ (R_PORT_PB_SET__i2c_oe___##f6_##_VAL(R_PORT_PB_SET_, i2c_oe__, v6) << R_PORT_PB_SET__i2c_oe___BITNR) | \
+ (R_PORT_PB_SET__cs7__##f7_##_VAL(R_PORT_PB_SET_, cs7_, v7) << R_PORT_PB_SET__cs7__BITNR) | \
+ (R_PORT_PB_SET__cs6__##f8_##_VAL(R_PORT_PB_SET_, cs6_, v8) << R_PORT_PB_SET__cs6__BITNR) | \
+ (R_PORT_PB_SET__cs5__##f9_##_VAL(R_PORT_PB_SET_, cs5_, v9) << R_PORT_PB_SET__cs5__BITNR) | \
+ (R_PORT_PB_SET__cs4__##f10_##_VAL(R_PORT_PB_SET_, cs4_, v10) << R_PORT_PB_SET__cs4__BITNR) | \
+ (R_PORT_PB_SET__cs3__##f11_##_VAL(R_PORT_PB_SET_, cs3_, v11) << R_PORT_PB_SET__cs3__BITNR) | \
+ (R_PORT_PB_SET__cs2__##f12_##_VAL(R_PORT_PB_SET_, cs2_, v12) << R_PORT_PB_SET__cs2__BITNR) | \
+ (R_PORT_PB_SET__scsi1__##f13_##_VAL(R_PORT_PB_SET_, scsi1_, v13) << R_PORT_PB_SET__scsi1__BITNR) | \
+ (R_PORT_PB_SET__scsi0__##f14_##_VAL(R_PORT_PB_SET_, scsi0_, v14) << R_PORT_PB_SET__scsi0__BITNR) | \
+ (R_PORT_PB_SET__dir7__##f15_##_VAL(R_PORT_PB_SET_, dir7_, v15) << R_PORT_PB_SET__dir7__BITNR) | \
+ (R_PORT_PB_SET__dir6__##f16_##_VAL(R_PORT_PB_SET_, dir6_, v16) << R_PORT_PB_SET__dir6__BITNR) | \
+ (R_PORT_PB_SET__dir5__##f17_##_VAL(R_PORT_PB_SET_, dir5_, v17) << R_PORT_PB_SET__dir5__BITNR) | \
+ (R_PORT_PB_SET__dir4__##f18_##_VAL(R_PORT_PB_SET_, dir4_, v18) << R_PORT_PB_SET__dir4__BITNR) | \
+ (R_PORT_PB_SET__dir3__##f19_##_VAL(R_PORT_PB_SET_, dir3_, v19) << R_PORT_PB_SET__dir3__BITNR) | \
+ (R_PORT_PB_SET__dir2__##f20_##_VAL(R_PORT_PB_SET_, dir2_, v20) << R_PORT_PB_SET__dir2__BITNR) | \
+ (R_PORT_PB_SET__dir1__##f21_##_VAL(R_PORT_PB_SET_, dir1_, v21) << R_PORT_PB_SET__dir1__BITNR) | \
+ (R_PORT_PB_SET__dir0__##f22_##_VAL(R_PORT_PB_SET_, dir0_, v22) << R_PORT_PB_SET__dir0__BITNR) | \
+ (R_PORT_PB_SET__data_out__##f23_##_VAL(R_PORT_PB_SET_, data_out_, v23) << R_PORT_PB_SET__data_out__BITNR) \
+)
+
+#endif
+
+/*
+ * R_PRESCALE_STATUS
+ * - type: RO
+ * - addr: 0xb00000f0
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_PRESCALE_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_PRESCALE_STATUS(f1,v1,f2,v2) ( \
+ (R_PRESCALE_STATUS__ser_status__##f1##__MASK & REG__##v1) | \
+ (R_PRESCALE_STATUS__tim_status__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PRESCALE_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PRESCALE_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_PRESCALE_STATUS(f1,v1,f2,v2) ( \
+ (R_PRESCALE_STATUS__ser_status__##f1##__VAL(R_PRESCALE_STATUS_, ser_status_, v1) << R_PRESCALE_STATUS__ser_status__BITNR) | \
+ (R_PRESCALE_STATUS__tim_status__##f2##__VAL(R_PRESCALE_STATUS_, tim_status_, v2) << R_PRESCALE_STATUS__tim_status__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_PRESCALE_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_PRESCALE_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_PRESCALE_STATUS_(f1_,v1,f2_,v2) ( \
+ (R_PRESCALE_STATUS__ser_status__##f1_##_VAL(R_PRESCALE_STATUS_, ser_status_, v1) << R_PRESCALE_STATUS__ser_status__BITNR) | \
+ (R_PRESCALE_STATUS__tim_status__##f2_##_VAL(R_PRESCALE_STATUS_, tim_status_, v2) << R_PRESCALE_STATUS__tim_status__BITNR) \
+)
+
+#endif
+
+/*
+ * R_REC_COUNTERS
+ * - type: RO
+ * - addr: 0xb00000a4
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_REC_COUNTERS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_REC_COUNTERS(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ (R_REC_COUNTERS__congestion__##f1##__MASK & REG__##v1) | \
+ (R_REC_COUNTERS__oversize__##f2##__MASK & REG__##v2) | \
+ (R_REC_COUNTERS__alignment_error__##f3##__MASK & REG__##v3) | \
+ (R_REC_COUNTERS__crc_error__##f4##__MASK & REG__##v4) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_REC_COUNTERS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_REC_COUNTERS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_REC_COUNTERS(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ (R_REC_COUNTERS__congestion__##f1##__VAL(R_REC_COUNTERS_, congestion_, v1) << R_REC_COUNTERS__congestion__BITNR) | \
+ (R_REC_COUNTERS__oversize__##f2##__VAL(R_REC_COUNTERS_, oversize_, v2) << R_REC_COUNTERS__oversize__BITNR) | \
+ (R_REC_COUNTERS__alignment_error__##f3##__VAL(R_REC_COUNTERS_, alignment_error_, v3) << R_REC_COUNTERS__alignment_error__BITNR) | \
+ (R_REC_COUNTERS__crc_error__##f4##__VAL(R_REC_COUNTERS_, crc_error_, v4) << R_REC_COUNTERS__crc_error__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_REC_COUNTERS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_REC_COUNTERS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_REC_COUNTERS_(f1_,v1,f2_,v2,f3_,v3,f4_,v4) ( \
+ (R_REC_COUNTERS__congestion__##f1_##_VAL(R_REC_COUNTERS_, congestion_, v1) << R_REC_COUNTERS__congestion__BITNR) | \
+ (R_REC_COUNTERS__oversize__##f2_##_VAL(R_REC_COUNTERS_, oversize_, v2) << R_REC_COUNTERS__oversize__BITNR) | \
+ (R_REC_COUNTERS__alignment_error__##f3_##_VAL(R_REC_COUNTERS_, alignment_error_, v3) << R_REC_COUNTERS__alignment_error__BITNR) | \
+ (R_REC_COUNTERS__crc_error__##f4_##_VAL(R_REC_COUNTERS_, crc_error_, v4) << R_REC_COUNTERS__crc_error__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SCSI0_CMD
+ * - type: WO
+ * - addr: 0xb0000042
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SCSI0_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SCSI0_CMD.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SCSI0_CMD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SCSI0_CMD(f1,v1,f2,v2) ( \
+ *R_SCSI0_CMD__SADDR = ( \
+ REG_INITIATED(R_SCSI0_CMD_) \
+ REG_VAL__R_SCSI0_CMD_(f1##_,v1,f2##_,v2) \
+ ), \
+ R_SCSI0_CMD__WRITE(R_SCSI0_CMD__ADDR, *R_SCSI0_CMD__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SCSI0_CMD__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SCSI0_CMD.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SCSI0_CMD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SCSI0_CMD__SHADOW(f1,v1,f2,v2) ( \
+ *R_SCSI0_CMD__SADDR = ( \
+ REG_INITIATED(R_SCSI0_CMD_) \
+ REG_VAL__R_SCSI0_CMD_(f1##_,v1,f2##_,v2) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SCSI0_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SCSI0_CMD(f1,v1,f2,v2) ( \
+ (R_SCSI0_CMD__asynch_setup__##f1##__MASK & REG__##v1) | \
+ (R_SCSI0_CMD__command__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI0_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI0_CMD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI0_CMD(f1,v1,f2,v2) ( \
+ (R_SCSI0_CMD__asynch_setup__##f1##__VAL(R_SCSI0_CMD_, asynch_setup_, v1) << R_SCSI0_CMD__asynch_setup__BITNR) | \
+ (R_SCSI0_CMD__command__##f2##__VAL(R_SCSI0_CMD_, command_, v2) << R_SCSI0_CMD__command__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI0_CMD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI0_CMD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI0_CMD_(f1_,v1,f2_,v2) ( \
+ (R_SCSI0_CMD__asynch_setup__##f1_##_VAL(R_SCSI0_CMD_, asynch_setup_, v1) << R_SCSI0_CMD__asynch_setup__BITNR) | \
+ (R_SCSI0_CMD__command__##f2_##_VAL(R_SCSI0_CMD_, command_, v2) << R_SCSI0_CMD__command__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SCSI0_CMD_DATA
+ * - type: WO
+ * - addr: 0xb0000040
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SCSI0_CMD_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SCSI0_CMD_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SCSI0_CMD_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SCSI0_CMD_DATA(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ *R_SCSI0_CMD_DATA__SADDR = ( \
+ REG_INITIATED(R_SCSI0_CMD_DATA_) \
+ REG_VAL__R_SCSI0_CMD_DATA_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6) \
+ ), \
+ R_SCSI0_CMD_DATA__WRITE(R_SCSI0_CMD_DATA__ADDR, *R_SCSI0_CMD_DATA__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SCSI0_CMD_DATA__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SCSI0_CMD_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SCSI0_CMD_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SCSI0_CMD_DATA__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ *R_SCSI0_CMD_DATA__SADDR = ( \
+ REG_INITIATED(R_SCSI0_CMD_DATA_) \
+ REG_VAL__R_SCSI0_CMD_DATA_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SCSI0_CMD_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SCSI0_CMD_DATA(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ (R_SCSI0_CMD_DATA__parity_in__##f1##__MASK & REG__##v1) | \
+ (R_SCSI0_CMD_DATA__skip__##f2##__MASK & REG__##v2) | \
+ (R_SCSI0_CMD_DATA__clr_status__##f3##__MASK & REG__##v3) | \
+ (R_SCSI0_CMD_DATA__asynch_setup__##f4##__MASK & REG__##v4) | \
+ (R_SCSI0_CMD_DATA__command__##f5##__MASK & REG__##v5) | \
+ (R_SCSI0_CMD_DATA__data_out__##f6##__MASK & REG__##v6) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI0_CMD_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI0_CMD_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI0_CMD_DATA(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ (R_SCSI0_CMD_DATA__parity_in__##f1##__VAL(R_SCSI0_CMD_DATA_, parity_in_, v1) << R_SCSI0_CMD_DATA__parity_in__BITNR) | \
+ (R_SCSI0_CMD_DATA__skip__##f2##__VAL(R_SCSI0_CMD_DATA_, skip_, v2) << R_SCSI0_CMD_DATA__skip__BITNR) | \
+ (R_SCSI0_CMD_DATA__clr_status__##f3##__VAL(R_SCSI0_CMD_DATA_, clr_status_, v3) << R_SCSI0_CMD_DATA__clr_status__BITNR) | \
+ (R_SCSI0_CMD_DATA__asynch_setup__##f4##__VAL(R_SCSI0_CMD_DATA_, asynch_setup_, v4) << R_SCSI0_CMD_DATA__asynch_setup__BITNR) | \
+ (R_SCSI0_CMD_DATA__command__##f5##__VAL(R_SCSI0_CMD_DATA_, command_, v5) << R_SCSI0_CMD_DATA__command__BITNR) | \
+ (R_SCSI0_CMD_DATA__data_out__##f6##__VAL(R_SCSI0_CMD_DATA_, data_out_, v6) << R_SCSI0_CMD_DATA__data_out__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI0_CMD_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI0_CMD_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI0_CMD_DATA_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6) ( \
+ (R_SCSI0_CMD_DATA__parity_in__##f1_##_VAL(R_SCSI0_CMD_DATA_, parity_in_, v1) << R_SCSI0_CMD_DATA__parity_in__BITNR) | \
+ (R_SCSI0_CMD_DATA__skip__##f2_##_VAL(R_SCSI0_CMD_DATA_, skip_, v2) << R_SCSI0_CMD_DATA__skip__BITNR) | \
+ (R_SCSI0_CMD_DATA__clr_status__##f3_##_VAL(R_SCSI0_CMD_DATA_, clr_status_, v3) << R_SCSI0_CMD_DATA__clr_status__BITNR) | \
+ (R_SCSI0_CMD_DATA__asynch_setup__##f4_##_VAL(R_SCSI0_CMD_DATA_, asynch_setup_, v4) << R_SCSI0_CMD_DATA__asynch_setup__BITNR) | \
+ (R_SCSI0_CMD_DATA__command__##f5_##_VAL(R_SCSI0_CMD_DATA_, command_, v5) << R_SCSI0_CMD_DATA__command__BITNR) | \
+ (R_SCSI0_CMD_DATA__data_out__##f6_##_VAL(R_SCSI0_CMD_DATA_, data_out_, v6) << R_SCSI0_CMD_DATA__data_out__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SCSI0_CTRL
+ * - type: WO
+ * - addr: 0xb0000044
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SCSI0_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SCSI0_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SCSI0_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SCSI0_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11) ( \
+ *R_SCSI0_CTRL__SADDR = ( \
+ REG_INITIATED(R_SCSI0_CTRL_) \
+ REG_VAL__R_SCSI0_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11) \
+ ), \
+ R_SCSI0_CTRL__WRITE(R_SCSI0_CTRL__ADDR, *R_SCSI0_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SCSI0_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SCSI0_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SCSI0_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SCSI0_CTRL__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11) ( \
+ *R_SCSI0_CTRL__SADDR = ( \
+ REG_INITIATED(R_SCSI0_CTRL_) \
+ REG_VAL__R_SCSI0_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SCSI0_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SCSI0_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11) ( \
+ (R_SCSI0_CTRL__id_type__##f1##__MASK & REG__##v1) | \
+ (R_SCSI0_CTRL__sel_timeout__##f2##__MASK & REG__##v2) | \
+ (R_SCSI0_CTRL__synch_per__##f3##__MASK & REG__##v3) | \
+ (R_SCSI0_CTRL__rst__##f4##__MASK & REG__##v4) | \
+ (R_SCSI0_CTRL__atn__##f5##__MASK & REG__##v5) | \
+ (R_SCSI0_CTRL__my_id__##f6##__MASK & REG__##v6) | \
+ (R_SCSI0_CTRL__target_id__##f7##__MASK & REG__##v7) | \
+ (R_SCSI0_CTRL__fast_20__##f8##__MASK & REG__##v8) | \
+ (R_SCSI0_CTRL__bus_width__##f9##__MASK & REG__##v9) | \
+ (R_SCSI0_CTRL__synch__##f10##__MASK & REG__##v10) | \
+ (R_SCSI0_CTRL__enable__##f11##__MASK & REG__##v11) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI0_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI0_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI0_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11) ( \
+ (R_SCSI0_CTRL__id_type__##f1##__VAL(R_SCSI0_CTRL_, id_type_, v1) << R_SCSI0_CTRL__id_type__BITNR) | \
+ (R_SCSI0_CTRL__sel_timeout__##f2##__VAL(R_SCSI0_CTRL_, sel_timeout_, v2) << R_SCSI0_CTRL__sel_timeout__BITNR) | \
+ (R_SCSI0_CTRL__synch_per__##f3##__VAL(R_SCSI0_CTRL_, synch_per_, v3) << R_SCSI0_CTRL__synch_per__BITNR) | \
+ (R_SCSI0_CTRL__rst__##f4##__VAL(R_SCSI0_CTRL_, rst_, v4) << R_SCSI0_CTRL__rst__BITNR) | \
+ (R_SCSI0_CTRL__atn__##f5##__VAL(R_SCSI0_CTRL_, atn_, v5) << R_SCSI0_CTRL__atn__BITNR) | \
+ (R_SCSI0_CTRL__my_id__##f6##__VAL(R_SCSI0_CTRL_, my_id_, v6) << R_SCSI0_CTRL__my_id__BITNR) | \
+ (R_SCSI0_CTRL__target_id__##f7##__VAL(R_SCSI0_CTRL_, target_id_, v7) << R_SCSI0_CTRL__target_id__BITNR) | \
+ (R_SCSI0_CTRL__fast_20__##f8##__VAL(R_SCSI0_CTRL_, fast_20_, v8) << R_SCSI0_CTRL__fast_20__BITNR) | \
+ (R_SCSI0_CTRL__bus_width__##f9##__VAL(R_SCSI0_CTRL_, bus_width_, v9) << R_SCSI0_CTRL__bus_width__BITNR) | \
+ (R_SCSI0_CTRL__synch__##f10##__VAL(R_SCSI0_CTRL_, synch_, v10) << R_SCSI0_CTRL__synch__BITNR) | \
+ (R_SCSI0_CTRL__enable__##f11##__VAL(R_SCSI0_CTRL_, enable_, v11) << R_SCSI0_CTRL__enable__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI0_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI0_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI0_CTRL_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11) ( \
+ (R_SCSI0_CTRL__id_type__##f1_##_VAL(R_SCSI0_CTRL_, id_type_, v1) << R_SCSI0_CTRL__id_type__BITNR) | \
+ (R_SCSI0_CTRL__sel_timeout__##f2_##_VAL(R_SCSI0_CTRL_, sel_timeout_, v2) << R_SCSI0_CTRL__sel_timeout__BITNR) | \
+ (R_SCSI0_CTRL__synch_per__##f3_##_VAL(R_SCSI0_CTRL_, synch_per_, v3) << R_SCSI0_CTRL__synch_per__BITNR) | \
+ (R_SCSI0_CTRL__rst__##f4_##_VAL(R_SCSI0_CTRL_, rst_, v4) << R_SCSI0_CTRL__rst__BITNR) | \
+ (R_SCSI0_CTRL__atn__##f5_##_VAL(R_SCSI0_CTRL_, atn_, v5) << R_SCSI0_CTRL__atn__BITNR) | \
+ (R_SCSI0_CTRL__my_id__##f6_##_VAL(R_SCSI0_CTRL_, my_id_, v6) << R_SCSI0_CTRL__my_id__BITNR) | \
+ (R_SCSI0_CTRL__target_id__##f7_##_VAL(R_SCSI0_CTRL_, target_id_, v7) << R_SCSI0_CTRL__target_id__BITNR) | \
+ (R_SCSI0_CTRL__fast_20__##f8_##_VAL(R_SCSI0_CTRL_, fast_20_, v8) << R_SCSI0_CTRL__fast_20__BITNR) | \
+ (R_SCSI0_CTRL__bus_width__##f9_##_VAL(R_SCSI0_CTRL_, bus_width_, v9) << R_SCSI0_CTRL__bus_width__BITNR) | \
+ (R_SCSI0_CTRL__synch__##f10_##_VAL(R_SCSI0_CTRL_, synch_, v10) << R_SCSI0_CTRL__synch__BITNR) | \
+ (R_SCSI0_CTRL__enable__##f11_##_VAL(R_SCSI0_CTRL_, enable_, v11) << R_SCSI0_CTRL__enable__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SCSI0_DATA
+ * - type: WO
+ * - addr: 0xb0000040
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SCSI0_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SCSI0_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SCSI0_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SCSI0_DATA(f1,v1) ( \
+ *R_SCSI0_DATA__SADDR = ( \
+ REG_INITIATED(R_SCSI0_DATA_) \
+ REG_VAL__R_SCSI0_DATA_(f1##_,v1) \
+ ), \
+ R_SCSI0_DATA__WRITE(R_SCSI0_DATA__ADDR, *R_SCSI0_DATA__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SCSI0_DATA__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SCSI0_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SCSI0_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SCSI0_DATA__SHADOW(f1,v1) ( \
+ *R_SCSI0_DATA__SADDR = ( \
+ REG_INITIATED(R_SCSI0_DATA_) \
+ REG_VAL__R_SCSI0_DATA_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SCSI0_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SCSI0_DATA(f1,v1) ( \
+ (R_SCSI0_DATA__data_out__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI0_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI0_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI0_DATA(f1,v1) ( \
+ (R_SCSI0_DATA__data_out__##f1##__VAL(R_SCSI0_DATA_, data_out_, v1) << R_SCSI0_DATA__data_out__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI0_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI0_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI0_DATA_(f1_,v1) ( \
+ (R_SCSI0_DATA__data_out__##f1_##_VAL(R_SCSI0_DATA_, data_out_, v1) << R_SCSI0_DATA__data_out__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SCSI0_DATA_IN
+ * - type: RO
+ * - addr: 0xb0000040
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SCSI0_DATA_IN
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SCSI0_DATA_IN(f1,v1) ( \
+ (R_SCSI0_DATA_IN__data_in__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI0_DATA_IN
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI0_DATA_IN.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI0_DATA_IN(f1,v1) ( \
+ (R_SCSI0_DATA_IN__data_in__##f1##__VAL(R_SCSI0_DATA_IN_, data_in_, v1) << R_SCSI0_DATA_IN__data_in__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI0_DATA_IN_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI0_DATA_IN.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI0_DATA_IN_(f1_,v1) ( \
+ (R_SCSI0_DATA_IN__data_in__##f1_##_VAL(R_SCSI0_DATA_IN_, data_in_, v1) << R_SCSI0_DATA_IN__data_in__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SCSI0_STATUS
+ * - type: RO
+ * - addr: 0xb0000048
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SCSI0_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SCSI0_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ (R_SCSI0_STATUS__tst_arb_won__##f1##__MASK & REG__##v1) | \
+ (R_SCSI0_STATUS__tst_resel__##f2##__MASK & REG__##v2) | \
+ (R_SCSI0_STATUS__parity_error__##f3##__MASK & REG__##v3) | \
+ (R_SCSI0_STATUS__bus_reset__##f4##__MASK & REG__##v4) | \
+ (R_SCSI0_STATUS__resel_target__##f5##__MASK & REG__##v5) | \
+ (R_SCSI0_STATUS__resel__##f6##__MASK & REG__##v6) | \
+ (R_SCSI0_STATUS__curr_phase__##f7##__MASK & REG__##v7) | \
+ (R_SCSI0_STATUS__last_seq_step__##f8##__MASK & REG__##v8) | \
+ (R_SCSI0_STATUS__valid_status__##f9##__MASK & REG__##v9) | \
+ (R_SCSI0_STATUS__seq_status__##f10##__MASK & REG__##v10) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI0_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI0_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI0_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ (R_SCSI0_STATUS__tst_arb_won__##f1##__VAL(R_SCSI0_STATUS_, tst_arb_won_, v1) << R_SCSI0_STATUS__tst_arb_won__BITNR) | \
+ (R_SCSI0_STATUS__tst_resel__##f2##__VAL(R_SCSI0_STATUS_, tst_resel_, v2) << R_SCSI0_STATUS__tst_resel__BITNR) | \
+ (R_SCSI0_STATUS__parity_error__##f3##__VAL(R_SCSI0_STATUS_, parity_error_, v3) << R_SCSI0_STATUS__parity_error__BITNR) | \
+ (R_SCSI0_STATUS__bus_reset__##f4##__VAL(R_SCSI0_STATUS_, bus_reset_, v4) << R_SCSI0_STATUS__bus_reset__BITNR) | \
+ (R_SCSI0_STATUS__resel_target__##f5##__VAL(R_SCSI0_STATUS_, resel_target_, v5) << R_SCSI0_STATUS__resel_target__BITNR) | \
+ (R_SCSI0_STATUS__resel__##f6##__VAL(R_SCSI0_STATUS_, resel_, v6) << R_SCSI0_STATUS__resel__BITNR) | \
+ (R_SCSI0_STATUS__curr_phase__##f7##__VAL(R_SCSI0_STATUS_, curr_phase_, v7) << R_SCSI0_STATUS__curr_phase__BITNR) | \
+ (R_SCSI0_STATUS__last_seq_step__##f8##__VAL(R_SCSI0_STATUS_, last_seq_step_, v8) << R_SCSI0_STATUS__last_seq_step__BITNR) | \
+ (R_SCSI0_STATUS__valid_status__##f9##__VAL(R_SCSI0_STATUS_, valid_status_, v9) << R_SCSI0_STATUS__valid_status__BITNR) | \
+ (R_SCSI0_STATUS__seq_status__##f10##__VAL(R_SCSI0_STATUS_, seq_status_, v10) << R_SCSI0_STATUS__seq_status__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI0_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI0_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI0_STATUS_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10) ( \
+ (R_SCSI0_STATUS__tst_arb_won__##f1_##_VAL(R_SCSI0_STATUS_, tst_arb_won_, v1) << R_SCSI0_STATUS__tst_arb_won__BITNR) | \
+ (R_SCSI0_STATUS__tst_resel__##f2_##_VAL(R_SCSI0_STATUS_, tst_resel_, v2) << R_SCSI0_STATUS__tst_resel__BITNR) | \
+ (R_SCSI0_STATUS__parity_error__##f3_##_VAL(R_SCSI0_STATUS_, parity_error_, v3) << R_SCSI0_STATUS__parity_error__BITNR) | \
+ (R_SCSI0_STATUS__bus_reset__##f4_##_VAL(R_SCSI0_STATUS_, bus_reset_, v4) << R_SCSI0_STATUS__bus_reset__BITNR) | \
+ (R_SCSI0_STATUS__resel_target__##f5_##_VAL(R_SCSI0_STATUS_, resel_target_, v5) << R_SCSI0_STATUS__resel_target__BITNR) | \
+ (R_SCSI0_STATUS__resel__##f6_##_VAL(R_SCSI0_STATUS_, resel_, v6) << R_SCSI0_STATUS__resel__BITNR) | \
+ (R_SCSI0_STATUS__curr_phase__##f7_##_VAL(R_SCSI0_STATUS_, curr_phase_, v7) << R_SCSI0_STATUS__curr_phase__BITNR) | \
+ (R_SCSI0_STATUS__last_seq_step__##f8_##_VAL(R_SCSI0_STATUS_, last_seq_step_, v8) << R_SCSI0_STATUS__last_seq_step__BITNR) | \
+ (R_SCSI0_STATUS__valid_status__##f9_##_VAL(R_SCSI0_STATUS_, valid_status_, v9) << R_SCSI0_STATUS__valid_status__BITNR) | \
+ (R_SCSI0_STATUS__seq_status__##f10_##_VAL(R_SCSI0_STATUS_, seq_status_, v10) << R_SCSI0_STATUS__seq_status__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SCSI0_STATUS_CTRL
+ * - type: WO
+ * - addr: 0xb0000043
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SCSI0_STATUS_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SCSI0_STATUS_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SCSI0_STATUS_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SCSI0_STATUS_CTRL(f1,v1,f2,v2,f3,v3) ( \
+ *R_SCSI0_STATUS_CTRL__SADDR = ( \
+ REG_INITIATED(R_SCSI0_STATUS_CTRL_) \
+ REG_VAL__R_SCSI0_STATUS_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3) \
+ ), \
+ R_SCSI0_STATUS_CTRL__WRITE(R_SCSI0_STATUS_CTRL__ADDR, *R_SCSI0_STATUS_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SCSI0_STATUS_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SCSI0_STATUS_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SCSI0_STATUS_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SCSI0_STATUS_CTRL__SHADOW(f1,v1,f2,v2,f3,v3) ( \
+ *R_SCSI0_STATUS_CTRL__SADDR = ( \
+ REG_INITIATED(R_SCSI0_STATUS_CTRL_) \
+ REG_VAL__R_SCSI0_STATUS_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SCSI0_STATUS_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SCSI0_STATUS_CTRL(f1,v1,f2,v2,f3,v3) ( \
+ (R_SCSI0_STATUS_CTRL__parity_in__##f1##__MASK & REG__##v1) | \
+ (R_SCSI0_STATUS_CTRL__skip__##f2##__MASK & REG__##v2) | \
+ (R_SCSI0_STATUS_CTRL__clr_status__##f3##__MASK & REG__##v3) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI0_STATUS_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI0_STATUS_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI0_STATUS_CTRL(f1,v1,f2,v2,f3,v3) ( \
+ (R_SCSI0_STATUS_CTRL__parity_in__##f1##__VAL(R_SCSI0_STATUS_CTRL_, parity_in_, v1) << R_SCSI0_STATUS_CTRL__parity_in__BITNR) | \
+ (R_SCSI0_STATUS_CTRL__skip__##f2##__VAL(R_SCSI0_STATUS_CTRL_, skip_, v2) << R_SCSI0_STATUS_CTRL__skip__BITNR) | \
+ (R_SCSI0_STATUS_CTRL__clr_status__##f3##__VAL(R_SCSI0_STATUS_CTRL_, clr_status_, v3) << R_SCSI0_STATUS_CTRL__clr_status__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI0_STATUS_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI0_STATUS_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI0_STATUS_CTRL_(f1_,v1,f2_,v2,f3_,v3) ( \
+ (R_SCSI0_STATUS_CTRL__parity_in__##f1_##_VAL(R_SCSI0_STATUS_CTRL_, parity_in_, v1) << R_SCSI0_STATUS_CTRL__parity_in__BITNR) | \
+ (R_SCSI0_STATUS_CTRL__skip__##f2_##_VAL(R_SCSI0_STATUS_CTRL_, skip_, v2) << R_SCSI0_STATUS_CTRL__skip__BITNR) | \
+ (R_SCSI0_STATUS_CTRL__clr_status__##f3_##_VAL(R_SCSI0_STATUS_CTRL_, clr_status_, v3) << R_SCSI0_STATUS_CTRL__clr_status__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SCSI1_CMD
+ * - type: WO
+ * - addr: 0xb0000052
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SCSI1_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SCSI1_CMD.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SCSI1_CMD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SCSI1_CMD(f1,v1,f2,v2) ( \
+ *R_SCSI1_CMD__SADDR = ( \
+ REG_INITIATED(R_SCSI1_CMD_) \
+ REG_VAL__R_SCSI1_CMD_(f1##_,v1,f2##_,v2) \
+ ), \
+ R_SCSI1_CMD__WRITE(R_SCSI1_CMD__ADDR, *R_SCSI1_CMD__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SCSI1_CMD__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SCSI1_CMD.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SCSI1_CMD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SCSI1_CMD__SHADOW(f1,v1,f2,v2) ( \
+ *R_SCSI1_CMD__SADDR = ( \
+ REG_INITIATED(R_SCSI1_CMD_) \
+ REG_VAL__R_SCSI1_CMD_(f1##_,v1,f2##_,v2) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SCSI1_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SCSI1_CMD(f1,v1,f2,v2) ( \
+ (R_SCSI1_CMD__asynch_setup__##f1##__MASK & REG__##v1) | \
+ (R_SCSI1_CMD__command__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI1_CMD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI1_CMD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI1_CMD(f1,v1,f2,v2) ( \
+ (R_SCSI1_CMD__asynch_setup__##f1##__VAL(R_SCSI1_CMD_, asynch_setup_, v1) << R_SCSI1_CMD__asynch_setup__BITNR) | \
+ (R_SCSI1_CMD__command__##f2##__VAL(R_SCSI1_CMD_, command_, v2) << R_SCSI1_CMD__command__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI1_CMD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI1_CMD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI1_CMD_(f1_,v1,f2_,v2) ( \
+ (R_SCSI1_CMD__asynch_setup__##f1_##_VAL(R_SCSI1_CMD_, asynch_setup_, v1) << R_SCSI1_CMD__asynch_setup__BITNR) | \
+ (R_SCSI1_CMD__command__##f2_##_VAL(R_SCSI1_CMD_, command_, v2) << R_SCSI1_CMD__command__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SCSI1_CMD_DATA
+ * - type: WO
+ * - addr: 0xb0000050
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SCSI1_CMD_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SCSI1_CMD_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SCSI1_CMD_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SCSI1_CMD_DATA(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ *R_SCSI1_CMD_DATA__SADDR = ( \
+ REG_INITIATED(R_SCSI1_CMD_DATA_) \
+ REG_VAL__R_SCSI1_CMD_DATA_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6) \
+ ), \
+ R_SCSI1_CMD_DATA__WRITE(R_SCSI1_CMD_DATA__ADDR, *R_SCSI1_CMD_DATA__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SCSI1_CMD_DATA__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SCSI1_CMD_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SCSI1_CMD_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SCSI1_CMD_DATA__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ *R_SCSI1_CMD_DATA__SADDR = ( \
+ REG_INITIATED(R_SCSI1_CMD_DATA_) \
+ REG_VAL__R_SCSI1_CMD_DATA_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SCSI1_CMD_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SCSI1_CMD_DATA(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ (R_SCSI1_CMD_DATA__parity_in__##f1##__MASK & REG__##v1) | \
+ (R_SCSI1_CMD_DATA__skip__##f2##__MASK & REG__##v2) | \
+ (R_SCSI1_CMD_DATA__clr_status__##f3##__MASK & REG__##v3) | \
+ (R_SCSI1_CMD_DATA__asynch_setup__##f4##__MASK & REG__##v4) | \
+ (R_SCSI1_CMD_DATA__command__##f5##__MASK & REG__##v5) | \
+ (R_SCSI1_CMD_DATA__data_out__##f6##__MASK & REG__##v6) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI1_CMD_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI1_CMD_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI1_CMD_DATA(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ (R_SCSI1_CMD_DATA__parity_in__##f1##__VAL(R_SCSI1_CMD_DATA_, parity_in_, v1) << R_SCSI1_CMD_DATA__parity_in__BITNR) | \
+ (R_SCSI1_CMD_DATA__skip__##f2##__VAL(R_SCSI1_CMD_DATA_, skip_, v2) << R_SCSI1_CMD_DATA__skip__BITNR) | \
+ (R_SCSI1_CMD_DATA__clr_status__##f3##__VAL(R_SCSI1_CMD_DATA_, clr_status_, v3) << R_SCSI1_CMD_DATA__clr_status__BITNR) | \
+ (R_SCSI1_CMD_DATA__asynch_setup__##f4##__VAL(R_SCSI1_CMD_DATA_, asynch_setup_, v4) << R_SCSI1_CMD_DATA__asynch_setup__BITNR) | \
+ (R_SCSI1_CMD_DATA__command__##f5##__VAL(R_SCSI1_CMD_DATA_, command_, v5) << R_SCSI1_CMD_DATA__command__BITNR) | \
+ (R_SCSI1_CMD_DATA__data_out__##f6##__VAL(R_SCSI1_CMD_DATA_, data_out_, v6) << R_SCSI1_CMD_DATA__data_out__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI1_CMD_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI1_CMD_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI1_CMD_DATA_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6) ( \
+ (R_SCSI1_CMD_DATA__parity_in__##f1_##_VAL(R_SCSI1_CMD_DATA_, parity_in_, v1) << R_SCSI1_CMD_DATA__parity_in__BITNR) | \
+ (R_SCSI1_CMD_DATA__skip__##f2_##_VAL(R_SCSI1_CMD_DATA_, skip_, v2) << R_SCSI1_CMD_DATA__skip__BITNR) | \
+ (R_SCSI1_CMD_DATA__clr_status__##f3_##_VAL(R_SCSI1_CMD_DATA_, clr_status_, v3) << R_SCSI1_CMD_DATA__clr_status__BITNR) | \
+ (R_SCSI1_CMD_DATA__asynch_setup__##f4_##_VAL(R_SCSI1_CMD_DATA_, asynch_setup_, v4) << R_SCSI1_CMD_DATA__asynch_setup__BITNR) | \
+ (R_SCSI1_CMD_DATA__command__##f5_##_VAL(R_SCSI1_CMD_DATA_, command_, v5) << R_SCSI1_CMD_DATA__command__BITNR) | \
+ (R_SCSI1_CMD_DATA__data_out__##f6_##_VAL(R_SCSI1_CMD_DATA_, data_out_, v6) << R_SCSI1_CMD_DATA__data_out__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SCSI1_CTRL
+ * - type: WO
+ * - addr: 0xb0000054
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SCSI1_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SCSI1_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SCSI1_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SCSI1_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11) ( \
+ *R_SCSI1_CTRL__SADDR = ( \
+ REG_INITIATED(R_SCSI1_CTRL_) \
+ REG_VAL__R_SCSI1_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11) \
+ ), \
+ R_SCSI1_CTRL__WRITE(R_SCSI1_CTRL__ADDR, *R_SCSI1_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SCSI1_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SCSI1_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SCSI1_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SCSI1_CTRL__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11) ( \
+ *R_SCSI1_CTRL__SADDR = ( \
+ REG_INITIATED(R_SCSI1_CTRL_) \
+ REG_VAL__R_SCSI1_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SCSI1_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SCSI1_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11) ( \
+ (R_SCSI1_CTRL__id_type__##f1##__MASK & REG__##v1) | \
+ (R_SCSI1_CTRL__sel_timeout__##f2##__MASK & REG__##v2) | \
+ (R_SCSI1_CTRL__synch_per__##f3##__MASK & REG__##v3) | \
+ (R_SCSI1_CTRL__rst__##f4##__MASK & REG__##v4) | \
+ (R_SCSI1_CTRL__atn__##f5##__MASK & REG__##v5) | \
+ (R_SCSI1_CTRL__my_id__##f6##__MASK & REG__##v6) | \
+ (R_SCSI1_CTRL__target_id__##f7##__MASK & REG__##v7) | \
+ (R_SCSI1_CTRL__fast_20__##f8##__MASK & REG__##v8) | \
+ (R_SCSI1_CTRL__bus_width__##f9##__MASK & REG__##v9) | \
+ (R_SCSI1_CTRL__synch__##f10##__MASK & REG__##v10) | \
+ (R_SCSI1_CTRL__enable__##f11##__MASK & REG__##v11) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI1_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI1_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI1_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11) ( \
+ (R_SCSI1_CTRL__id_type__##f1##__VAL(R_SCSI1_CTRL_, id_type_, v1) << R_SCSI1_CTRL__id_type__BITNR) | \
+ (R_SCSI1_CTRL__sel_timeout__##f2##__VAL(R_SCSI1_CTRL_, sel_timeout_, v2) << R_SCSI1_CTRL__sel_timeout__BITNR) | \
+ (R_SCSI1_CTRL__synch_per__##f3##__VAL(R_SCSI1_CTRL_, synch_per_, v3) << R_SCSI1_CTRL__synch_per__BITNR) | \
+ (R_SCSI1_CTRL__rst__##f4##__VAL(R_SCSI1_CTRL_, rst_, v4) << R_SCSI1_CTRL__rst__BITNR) | \
+ (R_SCSI1_CTRL__atn__##f5##__VAL(R_SCSI1_CTRL_, atn_, v5) << R_SCSI1_CTRL__atn__BITNR) | \
+ (R_SCSI1_CTRL__my_id__##f6##__VAL(R_SCSI1_CTRL_, my_id_, v6) << R_SCSI1_CTRL__my_id__BITNR) | \
+ (R_SCSI1_CTRL__target_id__##f7##__VAL(R_SCSI1_CTRL_, target_id_, v7) << R_SCSI1_CTRL__target_id__BITNR) | \
+ (R_SCSI1_CTRL__fast_20__##f8##__VAL(R_SCSI1_CTRL_, fast_20_, v8) << R_SCSI1_CTRL__fast_20__BITNR) | \
+ (R_SCSI1_CTRL__bus_width__##f9##__VAL(R_SCSI1_CTRL_, bus_width_, v9) << R_SCSI1_CTRL__bus_width__BITNR) | \
+ (R_SCSI1_CTRL__synch__##f10##__VAL(R_SCSI1_CTRL_, synch_, v10) << R_SCSI1_CTRL__synch__BITNR) | \
+ (R_SCSI1_CTRL__enable__##f11##__VAL(R_SCSI1_CTRL_, enable_, v11) << R_SCSI1_CTRL__enable__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI1_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI1_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI1_CTRL_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11) ( \
+ (R_SCSI1_CTRL__id_type__##f1_##_VAL(R_SCSI1_CTRL_, id_type_, v1) << R_SCSI1_CTRL__id_type__BITNR) | \
+ (R_SCSI1_CTRL__sel_timeout__##f2_##_VAL(R_SCSI1_CTRL_, sel_timeout_, v2) << R_SCSI1_CTRL__sel_timeout__BITNR) | \
+ (R_SCSI1_CTRL__synch_per__##f3_##_VAL(R_SCSI1_CTRL_, synch_per_, v3) << R_SCSI1_CTRL__synch_per__BITNR) | \
+ (R_SCSI1_CTRL__rst__##f4_##_VAL(R_SCSI1_CTRL_, rst_, v4) << R_SCSI1_CTRL__rst__BITNR) | \
+ (R_SCSI1_CTRL__atn__##f5_##_VAL(R_SCSI1_CTRL_, atn_, v5) << R_SCSI1_CTRL__atn__BITNR) | \
+ (R_SCSI1_CTRL__my_id__##f6_##_VAL(R_SCSI1_CTRL_, my_id_, v6) << R_SCSI1_CTRL__my_id__BITNR) | \
+ (R_SCSI1_CTRL__target_id__##f7_##_VAL(R_SCSI1_CTRL_, target_id_, v7) << R_SCSI1_CTRL__target_id__BITNR) | \
+ (R_SCSI1_CTRL__fast_20__##f8_##_VAL(R_SCSI1_CTRL_, fast_20_, v8) << R_SCSI1_CTRL__fast_20__BITNR) | \
+ (R_SCSI1_CTRL__bus_width__##f9_##_VAL(R_SCSI1_CTRL_, bus_width_, v9) << R_SCSI1_CTRL__bus_width__BITNR) | \
+ (R_SCSI1_CTRL__synch__##f10_##_VAL(R_SCSI1_CTRL_, synch_, v10) << R_SCSI1_CTRL__synch__BITNR) | \
+ (R_SCSI1_CTRL__enable__##f11_##_VAL(R_SCSI1_CTRL_, enable_, v11) << R_SCSI1_CTRL__enable__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SCSI1_DATA
+ * - type: WO
+ * - addr: 0xb0000050
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SCSI1_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SCSI1_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SCSI1_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SCSI1_DATA(f1,v1) ( \
+ *R_SCSI1_DATA__SADDR = ( \
+ REG_INITIATED(R_SCSI1_DATA_) \
+ REG_VAL__R_SCSI1_DATA_(f1##_,v1) \
+ ), \
+ R_SCSI1_DATA__WRITE(R_SCSI1_DATA__ADDR, *R_SCSI1_DATA__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SCSI1_DATA__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SCSI1_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SCSI1_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SCSI1_DATA__SHADOW(f1,v1) ( \
+ *R_SCSI1_DATA__SADDR = ( \
+ REG_INITIATED(R_SCSI1_DATA_) \
+ REG_VAL__R_SCSI1_DATA_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SCSI1_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SCSI1_DATA(f1,v1) ( \
+ (R_SCSI1_DATA__data_out__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI1_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI1_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI1_DATA(f1,v1) ( \
+ (R_SCSI1_DATA__data_out__##f1##__VAL(R_SCSI1_DATA_, data_out_, v1) << R_SCSI1_DATA__data_out__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI1_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI1_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI1_DATA_(f1_,v1) ( \
+ (R_SCSI1_DATA__data_out__##f1_##_VAL(R_SCSI1_DATA_, data_out_, v1) << R_SCSI1_DATA__data_out__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SCSI1_DATA_IN
+ * - type: RO
+ * - addr: 0xb0000050
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SCSI1_DATA_IN
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SCSI1_DATA_IN(f1,v1) ( \
+ (R_SCSI1_DATA_IN__data_in__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI1_DATA_IN
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI1_DATA_IN.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI1_DATA_IN(f1,v1) ( \
+ (R_SCSI1_DATA_IN__data_in__##f1##__VAL(R_SCSI1_DATA_IN_, data_in_, v1) << R_SCSI1_DATA_IN__data_in__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI1_DATA_IN_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI1_DATA_IN.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI1_DATA_IN_(f1_,v1) ( \
+ (R_SCSI1_DATA_IN__data_in__##f1_##_VAL(R_SCSI1_DATA_IN_, data_in_, v1) << R_SCSI1_DATA_IN__data_in__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SCSI1_STATUS
+ * - type: RO
+ * - addr: 0xb0000058
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SCSI1_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SCSI1_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ (R_SCSI1_STATUS__tst_arb_won__##f1##__MASK & REG__##v1) | \
+ (R_SCSI1_STATUS__tst_resel__##f2##__MASK & REG__##v2) | \
+ (R_SCSI1_STATUS__parity_error__##f3##__MASK & REG__##v3) | \
+ (R_SCSI1_STATUS__bus_reset__##f4##__MASK & REG__##v4) | \
+ (R_SCSI1_STATUS__resel_target__##f5##__MASK & REG__##v5) | \
+ (R_SCSI1_STATUS__resel__##f6##__MASK & REG__##v6) | \
+ (R_SCSI1_STATUS__curr_phase__##f7##__MASK & REG__##v7) | \
+ (R_SCSI1_STATUS__last_seq_step__##f8##__MASK & REG__##v8) | \
+ (R_SCSI1_STATUS__valid_status__##f9##__MASK & REG__##v9) | \
+ (R_SCSI1_STATUS__seq_status__##f10##__MASK & REG__##v10) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI1_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI1_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI1_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ (R_SCSI1_STATUS__tst_arb_won__##f1##__VAL(R_SCSI1_STATUS_, tst_arb_won_, v1) << R_SCSI1_STATUS__tst_arb_won__BITNR) | \
+ (R_SCSI1_STATUS__tst_resel__##f2##__VAL(R_SCSI1_STATUS_, tst_resel_, v2) << R_SCSI1_STATUS__tst_resel__BITNR) | \
+ (R_SCSI1_STATUS__parity_error__##f3##__VAL(R_SCSI1_STATUS_, parity_error_, v3) << R_SCSI1_STATUS__parity_error__BITNR) | \
+ (R_SCSI1_STATUS__bus_reset__##f4##__VAL(R_SCSI1_STATUS_, bus_reset_, v4) << R_SCSI1_STATUS__bus_reset__BITNR) | \
+ (R_SCSI1_STATUS__resel_target__##f5##__VAL(R_SCSI1_STATUS_, resel_target_, v5) << R_SCSI1_STATUS__resel_target__BITNR) | \
+ (R_SCSI1_STATUS__resel__##f6##__VAL(R_SCSI1_STATUS_, resel_, v6) << R_SCSI1_STATUS__resel__BITNR) | \
+ (R_SCSI1_STATUS__curr_phase__##f7##__VAL(R_SCSI1_STATUS_, curr_phase_, v7) << R_SCSI1_STATUS__curr_phase__BITNR) | \
+ (R_SCSI1_STATUS__last_seq_step__##f8##__VAL(R_SCSI1_STATUS_, last_seq_step_, v8) << R_SCSI1_STATUS__last_seq_step__BITNR) | \
+ (R_SCSI1_STATUS__valid_status__##f9##__VAL(R_SCSI1_STATUS_, valid_status_, v9) << R_SCSI1_STATUS__valid_status__BITNR) | \
+ (R_SCSI1_STATUS__seq_status__##f10##__VAL(R_SCSI1_STATUS_, seq_status_, v10) << R_SCSI1_STATUS__seq_status__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI1_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI1_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI1_STATUS_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10) ( \
+ (R_SCSI1_STATUS__tst_arb_won__##f1_##_VAL(R_SCSI1_STATUS_, tst_arb_won_, v1) << R_SCSI1_STATUS__tst_arb_won__BITNR) | \
+ (R_SCSI1_STATUS__tst_resel__##f2_##_VAL(R_SCSI1_STATUS_, tst_resel_, v2) << R_SCSI1_STATUS__tst_resel__BITNR) | \
+ (R_SCSI1_STATUS__parity_error__##f3_##_VAL(R_SCSI1_STATUS_, parity_error_, v3) << R_SCSI1_STATUS__parity_error__BITNR) | \
+ (R_SCSI1_STATUS__bus_reset__##f4_##_VAL(R_SCSI1_STATUS_, bus_reset_, v4) << R_SCSI1_STATUS__bus_reset__BITNR) | \
+ (R_SCSI1_STATUS__resel_target__##f5_##_VAL(R_SCSI1_STATUS_, resel_target_, v5) << R_SCSI1_STATUS__resel_target__BITNR) | \
+ (R_SCSI1_STATUS__resel__##f6_##_VAL(R_SCSI1_STATUS_, resel_, v6) << R_SCSI1_STATUS__resel__BITNR) | \
+ (R_SCSI1_STATUS__curr_phase__##f7_##_VAL(R_SCSI1_STATUS_, curr_phase_, v7) << R_SCSI1_STATUS__curr_phase__BITNR) | \
+ (R_SCSI1_STATUS__last_seq_step__##f8_##_VAL(R_SCSI1_STATUS_, last_seq_step_, v8) << R_SCSI1_STATUS__last_seq_step__BITNR) | \
+ (R_SCSI1_STATUS__valid_status__##f9_##_VAL(R_SCSI1_STATUS_, valid_status_, v9) << R_SCSI1_STATUS__valid_status__BITNR) | \
+ (R_SCSI1_STATUS__seq_status__##f10_##_VAL(R_SCSI1_STATUS_, seq_status_, v10) << R_SCSI1_STATUS__seq_status__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SCSI1_STATUS_CTRL
+ * - type: WO
+ * - addr: 0xb0000053
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SCSI1_STATUS_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SCSI1_STATUS_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SCSI1_STATUS_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SCSI1_STATUS_CTRL(f1,v1,f2,v2,f3,v3) ( \
+ *R_SCSI1_STATUS_CTRL__SADDR = ( \
+ REG_INITIATED(R_SCSI1_STATUS_CTRL_) \
+ REG_VAL__R_SCSI1_STATUS_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3) \
+ ), \
+ R_SCSI1_STATUS_CTRL__WRITE(R_SCSI1_STATUS_CTRL__ADDR, *R_SCSI1_STATUS_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SCSI1_STATUS_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SCSI1_STATUS_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SCSI1_STATUS_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SCSI1_STATUS_CTRL__SHADOW(f1,v1,f2,v2,f3,v3) ( \
+ *R_SCSI1_STATUS_CTRL__SADDR = ( \
+ REG_INITIATED(R_SCSI1_STATUS_CTRL_) \
+ REG_VAL__R_SCSI1_STATUS_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SCSI1_STATUS_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SCSI1_STATUS_CTRL(f1,v1,f2,v2,f3,v3) ( \
+ (R_SCSI1_STATUS_CTRL__parity_in__##f1##__MASK & REG__##v1) | \
+ (R_SCSI1_STATUS_CTRL__skip__##f2##__MASK & REG__##v2) | \
+ (R_SCSI1_STATUS_CTRL__clr_status__##f3##__MASK & REG__##v3) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI1_STATUS_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI1_STATUS_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI1_STATUS_CTRL(f1,v1,f2,v2,f3,v3) ( \
+ (R_SCSI1_STATUS_CTRL__parity_in__##f1##__VAL(R_SCSI1_STATUS_CTRL_, parity_in_, v1) << R_SCSI1_STATUS_CTRL__parity_in__BITNR) | \
+ (R_SCSI1_STATUS_CTRL__skip__##f2##__VAL(R_SCSI1_STATUS_CTRL_, skip_, v2) << R_SCSI1_STATUS_CTRL__skip__BITNR) | \
+ (R_SCSI1_STATUS_CTRL__clr_status__##f3##__VAL(R_SCSI1_STATUS_CTRL_, clr_status_, v3) << R_SCSI1_STATUS_CTRL__clr_status__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SCSI1_STATUS_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SCSI1_STATUS_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SCSI1_STATUS_CTRL_(f1_,v1,f2_,v2,f3_,v3) ( \
+ (R_SCSI1_STATUS_CTRL__parity_in__##f1_##_VAL(R_SCSI1_STATUS_CTRL_, parity_in_, v1) << R_SCSI1_STATUS_CTRL__parity_in__BITNR) | \
+ (R_SCSI1_STATUS_CTRL__skip__##f2_##_VAL(R_SCSI1_STATUS_CTRL_, skip_, v2) << R_SCSI1_STATUS_CTRL__skip__BITNR) | \
+ (R_SCSI1_STATUS_CTRL__clr_status__##f3_##_VAL(R_SCSI1_STATUS_CTRL_, clr_status_, v3) << R_SCSI1_STATUS_CTRL__clr_status__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SDRAM_CONFIG
+ * - type: WO
+ * - addr: 0xb000000c
+ * - group: Bus interface configuration registers
+ */
+
+#if USE_GROUP__Bus_interface_configuration_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SDRAM_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SDRAM_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SDRAM_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SDRAM_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ *R_SDRAM_CONFIG__SADDR = ( \
+ REG_INITIATED(R_SDRAM_CONFIG_) \
+ REG_VAL__R_SDRAM_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12) \
+ ), \
+ R_SDRAM_CONFIG__WRITE(R_SDRAM_CONFIG__ADDR, *R_SDRAM_CONFIG__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SDRAM_CONFIG__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SDRAM_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SDRAM_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SDRAM_CONFIG__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ *R_SDRAM_CONFIG__SADDR = ( \
+ REG_INITIATED(R_SDRAM_CONFIG_) \
+ REG_VAL__R_SDRAM_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SDRAM_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SDRAM_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ (R_SDRAM_CONFIG__wmm1__##f1##__MASK & REG__##v1) | \
+ (R_SDRAM_CONFIG__wmm0__##f2##__MASK & REG__##v2) | \
+ (R_SDRAM_CONFIG__sh1__##f3##__MASK & REG__##v3) | \
+ (R_SDRAM_CONFIG__sh0__##f4##__MASK & REG__##v4) | \
+ (R_SDRAM_CONFIG__w__##f5##__MASK & REG__##v5) | \
+ (R_SDRAM_CONFIG__type1__##f6##__MASK & REG__##v6) | \
+ (R_SDRAM_CONFIG__type0__##f7##__MASK & REG__##v7) | \
+ (R_SDRAM_CONFIG__group_sel__##f8##__MASK & REG__##v8) | \
+ (R_SDRAM_CONFIG__ca1__##f9##__MASK & REG__##v9) | \
+ (R_SDRAM_CONFIG__bank_sel1__##f10##__MASK & REG__##v10) | \
+ (R_SDRAM_CONFIG__ca0__##f11##__MASK & REG__##v11) | \
+ (R_SDRAM_CONFIG__bank_sel0__##f12##__MASK & REG__##v12) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SDRAM_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SDRAM_CONFIG.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SDRAM_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ (R_SDRAM_CONFIG__wmm1__##f1##__VAL(R_SDRAM_CONFIG_, wmm1_, v1) << R_SDRAM_CONFIG__wmm1__BITNR) | \
+ (R_SDRAM_CONFIG__wmm0__##f2##__VAL(R_SDRAM_CONFIG_, wmm0_, v2) << R_SDRAM_CONFIG__wmm0__BITNR) | \
+ (R_SDRAM_CONFIG__sh1__##f3##__VAL(R_SDRAM_CONFIG_, sh1_, v3) << R_SDRAM_CONFIG__sh1__BITNR) | \
+ (R_SDRAM_CONFIG__sh0__##f4##__VAL(R_SDRAM_CONFIG_, sh0_, v4) << R_SDRAM_CONFIG__sh0__BITNR) | \
+ (R_SDRAM_CONFIG__w__##f5##__VAL(R_SDRAM_CONFIG_, w_, v5) << R_SDRAM_CONFIG__w__BITNR) | \
+ (R_SDRAM_CONFIG__type1__##f6##__VAL(R_SDRAM_CONFIG_, type1_, v6) << R_SDRAM_CONFIG__type1__BITNR) | \
+ (R_SDRAM_CONFIG__type0__##f7##__VAL(R_SDRAM_CONFIG_, type0_, v7) << R_SDRAM_CONFIG__type0__BITNR) | \
+ (R_SDRAM_CONFIG__group_sel__##f8##__VAL(R_SDRAM_CONFIG_, group_sel_, v8) << R_SDRAM_CONFIG__group_sel__BITNR) | \
+ (R_SDRAM_CONFIG__ca1__##f9##__VAL(R_SDRAM_CONFIG_, ca1_, v9) << R_SDRAM_CONFIG__ca1__BITNR) | \
+ (R_SDRAM_CONFIG__bank_sel1__##f10##__VAL(R_SDRAM_CONFIG_, bank_sel1_, v10) << R_SDRAM_CONFIG__bank_sel1__BITNR) | \
+ (R_SDRAM_CONFIG__ca0__##f11##__VAL(R_SDRAM_CONFIG_, ca0_, v11) << R_SDRAM_CONFIG__ca0__BITNR) | \
+ (R_SDRAM_CONFIG__bank_sel0__##f12##__VAL(R_SDRAM_CONFIG_, bank_sel0_, v12) << R_SDRAM_CONFIG__bank_sel0__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SDRAM_CONFIG_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SDRAM_CONFIG.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SDRAM_CONFIG_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12) ( \
+ (R_SDRAM_CONFIG__wmm1__##f1_##_VAL(R_SDRAM_CONFIG_, wmm1_, v1) << R_SDRAM_CONFIG__wmm1__BITNR) | \
+ (R_SDRAM_CONFIG__wmm0__##f2_##_VAL(R_SDRAM_CONFIG_, wmm0_, v2) << R_SDRAM_CONFIG__wmm0__BITNR) | \
+ (R_SDRAM_CONFIG__sh1__##f3_##_VAL(R_SDRAM_CONFIG_, sh1_, v3) << R_SDRAM_CONFIG__sh1__BITNR) | \
+ (R_SDRAM_CONFIG__sh0__##f4_##_VAL(R_SDRAM_CONFIG_, sh0_, v4) << R_SDRAM_CONFIG__sh0__BITNR) | \
+ (R_SDRAM_CONFIG__w__##f5_##_VAL(R_SDRAM_CONFIG_, w_, v5) << R_SDRAM_CONFIG__w__BITNR) | \
+ (R_SDRAM_CONFIG__type1__##f6_##_VAL(R_SDRAM_CONFIG_, type1_, v6) << R_SDRAM_CONFIG__type1__BITNR) | \
+ (R_SDRAM_CONFIG__type0__##f7_##_VAL(R_SDRAM_CONFIG_, type0_, v7) << R_SDRAM_CONFIG__type0__BITNR) | \
+ (R_SDRAM_CONFIG__group_sel__##f8_##_VAL(R_SDRAM_CONFIG_, group_sel_, v8) << R_SDRAM_CONFIG__group_sel__BITNR) | \
+ (R_SDRAM_CONFIG__ca1__##f9_##_VAL(R_SDRAM_CONFIG_, ca1_, v9) << R_SDRAM_CONFIG__ca1__BITNR) | \
+ (R_SDRAM_CONFIG__bank_sel1__##f10_##_VAL(R_SDRAM_CONFIG_, bank_sel1_, v10) << R_SDRAM_CONFIG__bank_sel1__BITNR) | \
+ (R_SDRAM_CONFIG__ca0__##f11_##_VAL(R_SDRAM_CONFIG_, ca0_, v11) << R_SDRAM_CONFIG__ca0__BITNR) | \
+ (R_SDRAM_CONFIG__bank_sel0__##f12_##_VAL(R_SDRAM_CONFIG_, bank_sel0_, v12) << R_SDRAM_CONFIG__bank_sel0__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SDRAM_TIMING
+ * - type: WO
+ * - addr: 0xb0000008
+ * - group: Bus interface configuration registers
+ */
+
+#if USE_GROUP__Bus_interface_configuration_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SDRAM_TIMING
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SDRAM_TIMING.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SDRAM_TIMING.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SDRAM_TIMING(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ *R_SDRAM_TIMING__SADDR = ( \
+ REG_INITIATED(R_SDRAM_TIMING_) \
+ REG_VAL__R_SDRAM_TIMING_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12) \
+ ), \
+ R_SDRAM_TIMING__WRITE(R_SDRAM_TIMING__ADDR, *R_SDRAM_TIMING__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SDRAM_TIMING__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SDRAM_TIMING.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SDRAM_TIMING.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SDRAM_TIMING__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ *R_SDRAM_TIMING__SADDR = ( \
+ REG_INITIATED(R_SDRAM_TIMING_) \
+ REG_VAL__R_SDRAM_TIMING_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SDRAM_TIMING
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SDRAM_TIMING(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ (R_SDRAM_TIMING__sdram__##f1##__MASK & REG__##v1) | \
+ (R_SDRAM_TIMING__mrs_data__##f2##__MASK & REG__##v2) | \
+ (R_SDRAM_TIMING__ref__##f3##__MASK & REG__##v3) | \
+ (R_SDRAM_TIMING__ddr__##f4##__MASK & REG__##v4) | \
+ (R_SDRAM_TIMING__clk100__##f5##__MASK & REG__##v5) | \
+ (R_SDRAM_TIMING__ps__##f6##__MASK & REG__##v6) | \
+ (R_SDRAM_TIMING__cmd__##f7##__MASK & REG__##v7) | \
+ (R_SDRAM_TIMING__pde__##f8##__MASK & REG__##v8) | \
+ (R_SDRAM_TIMING__rc__##f9##__MASK & REG__##v9) | \
+ (R_SDRAM_TIMING__rp__##f10##__MASK & REG__##v10) | \
+ (R_SDRAM_TIMING__rcd__##f11##__MASK & REG__##v11) | \
+ (R_SDRAM_TIMING__cl__##f12##__MASK & REG__##v12) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SDRAM_TIMING
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SDRAM_TIMING.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SDRAM_TIMING(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ (R_SDRAM_TIMING__sdram__##f1##__VAL(R_SDRAM_TIMING_, sdram_, v1) << R_SDRAM_TIMING__sdram__BITNR) | \
+ (R_SDRAM_TIMING__mrs_data__##f2##__VAL(R_SDRAM_TIMING_, mrs_data_, v2) << R_SDRAM_TIMING__mrs_data__BITNR) | \
+ (R_SDRAM_TIMING__ref__##f3##__VAL(R_SDRAM_TIMING_, ref_, v3) << R_SDRAM_TIMING__ref__BITNR) | \
+ (R_SDRAM_TIMING__ddr__##f4##__VAL(R_SDRAM_TIMING_, ddr_, v4) << R_SDRAM_TIMING__ddr__BITNR) | \
+ (R_SDRAM_TIMING__clk100__##f5##__VAL(R_SDRAM_TIMING_, clk100_, v5) << R_SDRAM_TIMING__clk100__BITNR) | \
+ (R_SDRAM_TIMING__ps__##f6##__VAL(R_SDRAM_TIMING_, ps_, v6) << R_SDRAM_TIMING__ps__BITNR) | \
+ (R_SDRAM_TIMING__cmd__##f7##__VAL(R_SDRAM_TIMING_, cmd_, v7) << R_SDRAM_TIMING__cmd__BITNR) | \
+ (R_SDRAM_TIMING__pde__##f8##__VAL(R_SDRAM_TIMING_, pde_, v8) << R_SDRAM_TIMING__pde__BITNR) | \
+ (R_SDRAM_TIMING__rc__##f9##__VAL(R_SDRAM_TIMING_, rc_, v9) << R_SDRAM_TIMING__rc__BITNR) | \
+ (R_SDRAM_TIMING__rp__##f10##__VAL(R_SDRAM_TIMING_, rp_, v10) << R_SDRAM_TIMING__rp__BITNR) | \
+ (R_SDRAM_TIMING__rcd__##f11##__VAL(R_SDRAM_TIMING_, rcd_, v11) << R_SDRAM_TIMING__rcd__BITNR) | \
+ (R_SDRAM_TIMING__cl__##f12##__VAL(R_SDRAM_TIMING_, cl_, v12) << R_SDRAM_TIMING__cl__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SDRAM_TIMING_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SDRAM_TIMING.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SDRAM_TIMING_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12) ( \
+ (R_SDRAM_TIMING__sdram__##f1_##_VAL(R_SDRAM_TIMING_, sdram_, v1) << R_SDRAM_TIMING__sdram__BITNR) | \
+ (R_SDRAM_TIMING__mrs_data__##f2_##_VAL(R_SDRAM_TIMING_, mrs_data_, v2) << R_SDRAM_TIMING__mrs_data__BITNR) | \
+ (R_SDRAM_TIMING__ref__##f3_##_VAL(R_SDRAM_TIMING_, ref_, v3) << R_SDRAM_TIMING__ref__BITNR) | \
+ (R_SDRAM_TIMING__ddr__##f4_##_VAL(R_SDRAM_TIMING_, ddr_, v4) << R_SDRAM_TIMING__ddr__BITNR) | \
+ (R_SDRAM_TIMING__clk100__##f5_##_VAL(R_SDRAM_TIMING_, clk100_, v5) << R_SDRAM_TIMING__clk100__BITNR) | \
+ (R_SDRAM_TIMING__ps__##f6_##_VAL(R_SDRAM_TIMING_, ps_, v6) << R_SDRAM_TIMING__ps__BITNR) | \
+ (R_SDRAM_TIMING__cmd__##f7_##_VAL(R_SDRAM_TIMING_, cmd_, v7) << R_SDRAM_TIMING__cmd__BITNR) | \
+ (R_SDRAM_TIMING__pde__##f8_##_VAL(R_SDRAM_TIMING_, pde_, v8) << R_SDRAM_TIMING__pde__BITNR) | \
+ (R_SDRAM_TIMING__rc__##f9_##_VAL(R_SDRAM_TIMING_, rc_, v9) << R_SDRAM_TIMING__rc__BITNR) | \
+ (R_SDRAM_TIMING__rp__##f10_##_VAL(R_SDRAM_TIMING_, rp_, v10) << R_SDRAM_TIMING__rp__BITNR) | \
+ (R_SDRAM_TIMING__rcd__##f11_##_VAL(R_SDRAM_TIMING_, rcd_, v11) << R_SDRAM_TIMING__rcd__BITNR) | \
+ (R_SDRAM_TIMING__cl__##f12_##_VAL(R_SDRAM_TIMING_, cl_, v12) << R_SDRAM_TIMING__cl__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL0_BAUD
+ * - type: WO
+ * - addr: 0xb0000063
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL0_BAUD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL0_BAUD.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL0_BAUD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL0_BAUD(f1,v1,f2,v2) ( \
+ *R_SERIAL0_BAUD__SADDR = ( \
+ REG_INITIATED(R_SERIAL0_BAUD_) \
+ REG_VAL__R_SERIAL0_BAUD_(f1##_,v1,f2##_,v2) \
+ ), \
+ R_SERIAL0_BAUD__WRITE(R_SERIAL0_BAUD__ADDR, *R_SERIAL0_BAUD__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL0_BAUD__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL0_BAUD.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL0_BAUD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL0_BAUD__SHADOW(f1,v1,f2,v2) ( \
+ *R_SERIAL0_BAUD__SADDR = ( \
+ REG_INITIATED(R_SERIAL0_BAUD_) \
+ REG_VAL__R_SERIAL0_BAUD_(f1##_,v1,f2##_,v2) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL0_BAUD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL0_BAUD(f1,v1,f2,v2) ( \
+ (R_SERIAL0_BAUD__tr_baud__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL0_BAUD__rec_baud__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL0_BAUD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL0_BAUD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL0_BAUD(f1,v1,f2,v2) ( \
+ (R_SERIAL0_BAUD__tr_baud__##f1##__VAL(R_SERIAL0_BAUD_, tr_baud_, v1) << R_SERIAL0_BAUD__tr_baud__BITNR) | \
+ (R_SERIAL0_BAUD__rec_baud__##f2##__VAL(R_SERIAL0_BAUD_, rec_baud_, v2) << R_SERIAL0_BAUD__rec_baud__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL0_BAUD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL0_BAUD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL0_BAUD_(f1_,v1,f2_,v2) ( \
+ (R_SERIAL0_BAUD__tr_baud__##f1_##_VAL(R_SERIAL0_BAUD_, tr_baud_, v1) << R_SERIAL0_BAUD__tr_baud__BITNR) | \
+ (R_SERIAL0_BAUD__rec_baud__##f2_##_VAL(R_SERIAL0_BAUD_, rec_baud_, v2) << R_SERIAL0_BAUD__rec_baud__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL0_CTRL
+ * - type: WO
+ * - addr: 0xb0000060
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL0_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL0_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL0_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL0_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19) ( \
+ *R_SERIAL0_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL0_CTRL_) \
+ REG_VAL__R_SERIAL0_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19) \
+ ), \
+ R_SERIAL0_CTRL__WRITE(R_SERIAL0_CTRL__ADDR, *R_SERIAL0_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL0_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL0_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL0_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL0_CTRL__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19) ( \
+ *R_SERIAL0_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL0_CTRL_) \
+ REG_VAL__R_SERIAL0_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL0_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL0_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19) ( \
+ (R_SERIAL0_CTRL__tr_baud__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL0_CTRL__rec_baud__##f2##__MASK & REG__##v2) | \
+ (R_SERIAL0_CTRL__dma_err__##f3##__MASK & REG__##v3) | \
+ (R_SERIAL0_CTRL__rec_enable__##f4##__MASK & REG__##v4) | \
+ (R_SERIAL0_CTRL__rts___##f5##__MASK & REG__##v5) | \
+ (R_SERIAL0_CTRL__sampling__##f6##__MASK & REG__##v6) | \
+ (R_SERIAL0_CTRL__rec_stick_par__##f7##__MASK & REG__##v7) | \
+ (R_SERIAL0_CTRL__rec_par__##f8##__MASK & REG__##v8) | \
+ (R_SERIAL0_CTRL__rec_par_en__##f9##__MASK & REG__##v9) | \
+ (R_SERIAL0_CTRL__rec_bitnr__##f10##__MASK & REG__##v10) | \
+ (R_SERIAL0_CTRL__txd__##f11##__MASK & REG__##v11) | \
+ (R_SERIAL0_CTRL__tr_enable__##f12##__MASK & REG__##v12) | \
+ (R_SERIAL0_CTRL__auto_cts__##f13##__MASK & REG__##v13) | \
+ (R_SERIAL0_CTRL__stop_bits__##f14##__MASK & REG__##v14) | \
+ (R_SERIAL0_CTRL__tr_stick_par__##f15##__MASK & REG__##v15) | \
+ (R_SERIAL0_CTRL__tr_par__##f16##__MASK & REG__##v16) | \
+ (R_SERIAL0_CTRL__tr_par_en__##f17##__MASK & REG__##v17) | \
+ (R_SERIAL0_CTRL__tr_bitnr__##f18##__MASK & REG__##v18) | \
+ (R_SERIAL0_CTRL__data_out__##f19##__MASK & REG__##v19) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL0_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL0_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL0_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19) ( \
+ (R_SERIAL0_CTRL__tr_baud__##f1##__VAL(R_SERIAL0_CTRL_, tr_baud_, v1) << R_SERIAL0_CTRL__tr_baud__BITNR) | \
+ (R_SERIAL0_CTRL__rec_baud__##f2##__VAL(R_SERIAL0_CTRL_, rec_baud_, v2) << R_SERIAL0_CTRL__rec_baud__BITNR) | \
+ (R_SERIAL0_CTRL__dma_err__##f3##__VAL(R_SERIAL0_CTRL_, dma_err_, v3) << R_SERIAL0_CTRL__dma_err__BITNR) | \
+ (R_SERIAL0_CTRL__rec_enable__##f4##__VAL(R_SERIAL0_CTRL_, rec_enable_, v4) << R_SERIAL0_CTRL__rec_enable__BITNR) | \
+ (R_SERIAL0_CTRL__rts___##f5##__VAL(R_SERIAL0_CTRL_, rts__, v5) << R_SERIAL0_CTRL__rts___BITNR) | \
+ (R_SERIAL0_CTRL__sampling__##f6##__VAL(R_SERIAL0_CTRL_, sampling_, v6) << R_SERIAL0_CTRL__sampling__BITNR) | \
+ (R_SERIAL0_CTRL__rec_stick_par__##f7##__VAL(R_SERIAL0_CTRL_, rec_stick_par_, v7) << R_SERIAL0_CTRL__rec_stick_par__BITNR) | \
+ (R_SERIAL0_CTRL__rec_par__##f8##__VAL(R_SERIAL0_CTRL_, rec_par_, v8) << R_SERIAL0_CTRL__rec_par__BITNR) | \
+ (R_SERIAL0_CTRL__rec_par_en__##f9##__VAL(R_SERIAL0_CTRL_, rec_par_en_, v9) << R_SERIAL0_CTRL__rec_par_en__BITNR) | \
+ (R_SERIAL0_CTRL__rec_bitnr__##f10##__VAL(R_SERIAL0_CTRL_, rec_bitnr_, v10) << R_SERIAL0_CTRL__rec_bitnr__BITNR) | \
+ (R_SERIAL0_CTRL__txd__##f11##__VAL(R_SERIAL0_CTRL_, txd_, v11) << R_SERIAL0_CTRL__txd__BITNR) | \
+ (R_SERIAL0_CTRL__tr_enable__##f12##__VAL(R_SERIAL0_CTRL_, tr_enable_, v12) << R_SERIAL0_CTRL__tr_enable__BITNR) | \
+ (R_SERIAL0_CTRL__auto_cts__##f13##__VAL(R_SERIAL0_CTRL_, auto_cts_, v13) << R_SERIAL0_CTRL__auto_cts__BITNR) | \
+ (R_SERIAL0_CTRL__stop_bits__##f14##__VAL(R_SERIAL0_CTRL_, stop_bits_, v14) << R_SERIAL0_CTRL__stop_bits__BITNR) | \
+ (R_SERIAL0_CTRL__tr_stick_par__##f15##__VAL(R_SERIAL0_CTRL_, tr_stick_par_, v15) << R_SERIAL0_CTRL__tr_stick_par__BITNR) | \
+ (R_SERIAL0_CTRL__tr_par__##f16##__VAL(R_SERIAL0_CTRL_, tr_par_, v16) << R_SERIAL0_CTRL__tr_par__BITNR) | \
+ (R_SERIAL0_CTRL__tr_par_en__##f17##__VAL(R_SERIAL0_CTRL_, tr_par_en_, v17) << R_SERIAL0_CTRL__tr_par_en__BITNR) | \
+ (R_SERIAL0_CTRL__tr_bitnr__##f18##__VAL(R_SERIAL0_CTRL_, tr_bitnr_, v18) << R_SERIAL0_CTRL__tr_bitnr__BITNR) | \
+ (R_SERIAL0_CTRL__data_out__##f19##__VAL(R_SERIAL0_CTRL_, data_out_, v19) << R_SERIAL0_CTRL__data_out__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL0_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL0_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL0_CTRL_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19) ( \
+ (R_SERIAL0_CTRL__tr_baud__##f1_##_VAL(R_SERIAL0_CTRL_, tr_baud_, v1) << R_SERIAL0_CTRL__tr_baud__BITNR) | \
+ (R_SERIAL0_CTRL__rec_baud__##f2_##_VAL(R_SERIAL0_CTRL_, rec_baud_, v2) << R_SERIAL0_CTRL__rec_baud__BITNR) | \
+ (R_SERIAL0_CTRL__dma_err__##f3_##_VAL(R_SERIAL0_CTRL_, dma_err_, v3) << R_SERIAL0_CTRL__dma_err__BITNR) | \
+ (R_SERIAL0_CTRL__rec_enable__##f4_##_VAL(R_SERIAL0_CTRL_, rec_enable_, v4) << R_SERIAL0_CTRL__rec_enable__BITNR) | \
+ (R_SERIAL0_CTRL__rts___##f5_##_VAL(R_SERIAL0_CTRL_, rts__, v5) << R_SERIAL0_CTRL__rts___BITNR) | \
+ (R_SERIAL0_CTRL__sampling__##f6_##_VAL(R_SERIAL0_CTRL_, sampling_, v6) << R_SERIAL0_CTRL__sampling__BITNR) | \
+ (R_SERIAL0_CTRL__rec_stick_par__##f7_##_VAL(R_SERIAL0_CTRL_, rec_stick_par_, v7) << R_SERIAL0_CTRL__rec_stick_par__BITNR) | \
+ (R_SERIAL0_CTRL__rec_par__##f8_##_VAL(R_SERIAL0_CTRL_, rec_par_, v8) << R_SERIAL0_CTRL__rec_par__BITNR) | \
+ (R_SERIAL0_CTRL__rec_par_en__##f9_##_VAL(R_SERIAL0_CTRL_, rec_par_en_, v9) << R_SERIAL0_CTRL__rec_par_en__BITNR) | \
+ (R_SERIAL0_CTRL__rec_bitnr__##f10_##_VAL(R_SERIAL0_CTRL_, rec_bitnr_, v10) << R_SERIAL0_CTRL__rec_bitnr__BITNR) | \
+ (R_SERIAL0_CTRL__txd__##f11_##_VAL(R_SERIAL0_CTRL_, txd_, v11) << R_SERIAL0_CTRL__txd__BITNR) | \
+ (R_SERIAL0_CTRL__tr_enable__##f12_##_VAL(R_SERIAL0_CTRL_, tr_enable_, v12) << R_SERIAL0_CTRL__tr_enable__BITNR) | \
+ (R_SERIAL0_CTRL__auto_cts__##f13_##_VAL(R_SERIAL0_CTRL_, auto_cts_, v13) << R_SERIAL0_CTRL__auto_cts__BITNR) | \
+ (R_SERIAL0_CTRL__stop_bits__##f14_##_VAL(R_SERIAL0_CTRL_, stop_bits_, v14) << R_SERIAL0_CTRL__stop_bits__BITNR) | \
+ (R_SERIAL0_CTRL__tr_stick_par__##f15_##_VAL(R_SERIAL0_CTRL_, tr_stick_par_, v15) << R_SERIAL0_CTRL__tr_stick_par__BITNR) | \
+ (R_SERIAL0_CTRL__tr_par__##f16_##_VAL(R_SERIAL0_CTRL_, tr_par_, v16) << R_SERIAL0_CTRL__tr_par__BITNR) | \
+ (R_SERIAL0_CTRL__tr_par_en__##f17_##_VAL(R_SERIAL0_CTRL_, tr_par_en_, v17) << R_SERIAL0_CTRL__tr_par_en__BITNR) | \
+ (R_SERIAL0_CTRL__tr_bitnr__##f18_##_VAL(R_SERIAL0_CTRL_, tr_bitnr_, v18) << R_SERIAL0_CTRL__tr_bitnr__BITNR) | \
+ (R_SERIAL0_CTRL__data_out__##f19_##_VAL(R_SERIAL0_CTRL_, data_out_, v19) << R_SERIAL0_CTRL__data_out__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL0_READ
+ * - type: RO
+ * - addr: 0xb0000060
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL0_READ
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL0_READ(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_SERIAL0_READ__xoff_detect__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL0_READ__cts___##f2##__MASK & REG__##v2) | \
+ (R_SERIAL0_READ__tr_ready__##f3##__MASK & REG__##v3) | \
+ (R_SERIAL0_READ__rxd__##f4##__MASK & REG__##v4) | \
+ (R_SERIAL0_READ__overrun__##f5##__MASK & REG__##v5) | \
+ (R_SERIAL0_READ__par_err__##f6##__MASK & REG__##v6) | \
+ (R_SERIAL0_READ__framing_err__##f7##__MASK & REG__##v7) | \
+ (R_SERIAL0_READ__data_avail__##f8##__MASK & REG__##v8) | \
+ (R_SERIAL0_READ__data_in__##f9##__MASK & REG__##v9) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL0_READ
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL0_READ.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL0_READ(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_SERIAL0_READ__xoff_detect__##f1##__VAL(R_SERIAL0_READ_, xoff_detect_, v1) << R_SERIAL0_READ__xoff_detect__BITNR) | \
+ (R_SERIAL0_READ__cts___##f2##__VAL(R_SERIAL0_READ_, cts__, v2) << R_SERIAL0_READ__cts___BITNR) | \
+ (R_SERIAL0_READ__tr_ready__##f3##__VAL(R_SERIAL0_READ_, tr_ready_, v3) << R_SERIAL0_READ__tr_ready__BITNR) | \
+ (R_SERIAL0_READ__rxd__##f4##__VAL(R_SERIAL0_READ_, rxd_, v4) << R_SERIAL0_READ__rxd__BITNR) | \
+ (R_SERIAL0_READ__overrun__##f5##__VAL(R_SERIAL0_READ_, overrun_, v5) << R_SERIAL0_READ__overrun__BITNR) | \
+ (R_SERIAL0_READ__par_err__##f6##__VAL(R_SERIAL0_READ_, par_err_, v6) << R_SERIAL0_READ__par_err__BITNR) | \
+ (R_SERIAL0_READ__framing_err__##f7##__VAL(R_SERIAL0_READ_, framing_err_, v7) << R_SERIAL0_READ__framing_err__BITNR) | \
+ (R_SERIAL0_READ__data_avail__##f8##__VAL(R_SERIAL0_READ_, data_avail_, v8) << R_SERIAL0_READ__data_avail__BITNR) | \
+ (R_SERIAL0_READ__data_in__##f9##__VAL(R_SERIAL0_READ_, data_in_, v9) << R_SERIAL0_READ__data_in__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL0_READ_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL0_READ.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL0_READ_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9) ( \
+ (R_SERIAL0_READ__xoff_detect__##f1_##_VAL(R_SERIAL0_READ_, xoff_detect_, v1) << R_SERIAL0_READ__xoff_detect__BITNR) | \
+ (R_SERIAL0_READ__cts___##f2_##_VAL(R_SERIAL0_READ_, cts__, v2) << R_SERIAL0_READ__cts___BITNR) | \
+ (R_SERIAL0_READ__tr_ready__##f3_##_VAL(R_SERIAL0_READ_, tr_ready_, v3) << R_SERIAL0_READ__tr_ready__BITNR) | \
+ (R_SERIAL0_READ__rxd__##f4_##_VAL(R_SERIAL0_READ_, rxd_, v4) << R_SERIAL0_READ__rxd__BITNR) | \
+ (R_SERIAL0_READ__overrun__##f5_##_VAL(R_SERIAL0_READ_, overrun_, v5) << R_SERIAL0_READ__overrun__BITNR) | \
+ (R_SERIAL0_READ__par_err__##f6_##_VAL(R_SERIAL0_READ_, par_err_, v6) << R_SERIAL0_READ__par_err__BITNR) | \
+ (R_SERIAL0_READ__framing_err__##f7_##_VAL(R_SERIAL0_READ_, framing_err_, v7) << R_SERIAL0_READ__framing_err__BITNR) | \
+ (R_SERIAL0_READ__data_avail__##f8_##_VAL(R_SERIAL0_READ_, data_avail_, v8) << R_SERIAL0_READ__data_avail__BITNR) | \
+ (R_SERIAL0_READ__data_in__##f9_##_VAL(R_SERIAL0_READ_, data_in_, v9) << R_SERIAL0_READ__data_in__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL0_REC_CTRL
+ * - type: WO
+ * - addr: 0xb0000062
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL0_REC_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL0_REC_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL0_REC_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL0_REC_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_SERIAL0_REC_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL0_REC_CTRL_) \
+ REG_VAL__R_SERIAL0_REC_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ), \
+ R_SERIAL0_REC_CTRL__WRITE(R_SERIAL0_REC_CTRL__ADDR, *R_SERIAL0_REC_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL0_REC_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL0_REC_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL0_REC_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL0_REC_CTRL__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_SERIAL0_REC_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL0_REC_CTRL_) \
+ REG_VAL__R_SERIAL0_REC_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL0_REC_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL0_REC_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL0_REC_CTRL__dma_err__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL0_REC_CTRL__rec_enable__##f2##__MASK & REG__##v2) | \
+ (R_SERIAL0_REC_CTRL__rts___##f3##__MASK & REG__##v3) | \
+ (R_SERIAL0_REC_CTRL__sampling__##f4##__MASK & REG__##v4) | \
+ (R_SERIAL0_REC_CTRL__rec_stick_par__##f5##__MASK & REG__##v5) | \
+ (R_SERIAL0_REC_CTRL__rec_par__##f6##__MASK & REG__##v6) | \
+ (R_SERIAL0_REC_CTRL__rec_par_en__##f7##__MASK & REG__##v7) | \
+ (R_SERIAL0_REC_CTRL__rec_bitnr__##f8##__MASK & REG__##v8) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL0_REC_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL0_REC_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL0_REC_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL0_REC_CTRL__dma_err__##f1##__VAL(R_SERIAL0_REC_CTRL_, dma_err_, v1) << R_SERIAL0_REC_CTRL__dma_err__BITNR) | \
+ (R_SERIAL0_REC_CTRL__rec_enable__##f2##__VAL(R_SERIAL0_REC_CTRL_, rec_enable_, v2) << R_SERIAL0_REC_CTRL__rec_enable__BITNR) | \
+ (R_SERIAL0_REC_CTRL__rts___##f3##__VAL(R_SERIAL0_REC_CTRL_, rts__, v3) << R_SERIAL0_REC_CTRL__rts___BITNR) | \
+ (R_SERIAL0_REC_CTRL__sampling__##f4##__VAL(R_SERIAL0_REC_CTRL_, sampling_, v4) << R_SERIAL0_REC_CTRL__sampling__BITNR) | \
+ (R_SERIAL0_REC_CTRL__rec_stick_par__##f5##__VAL(R_SERIAL0_REC_CTRL_, rec_stick_par_, v5) << R_SERIAL0_REC_CTRL__rec_stick_par__BITNR) | \
+ (R_SERIAL0_REC_CTRL__rec_par__##f6##__VAL(R_SERIAL0_REC_CTRL_, rec_par_, v6) << R_SERIAL0_REC_CTRL__rec_par__BITNR) | \
+ (R_SERIAL0_REC_CTRL__rec_par_en__##f7##__VAL(R_SERIAL0_REC_CTRL_, rec_par_en_, v7) << R_SERIAL0_REC_CTRL__rec_par_en__BITNR) | \
+ (R_SERIAL0_REC_CTRL__rec_bitnr__##f8##__VAL(R_SERIAL0_REC_CTRL_, rec_bitnr_, v8) << R_SERIAL0_REC_CTRL__rec_bitnr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL0_REC_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL0_REC_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL0_REC_CTRL_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8) ( \
+ (R_SERIAL0_REC_CTRL__dma_err__##f1_##_VAL(R_SERIAL0_REC_CTRL_, dma_err_, v1) << R_SERIAL0_REC_CTRL__dma_err__BITNR) | \
+ (R_SERIAL0_REC_CTRL__rec_enable__##f2_##_VAL(R_SERIAL0_REC_CTRL_, rec_enable_, v2) << R_SERIAL0_REC_CTRL__rec_enable__BITNR) | \
+ (R_SERIAL0_REC_CTRL__rts___##f3_##_VAL(R_SERIAL0_REC_CTRL_, rts__, v3) << R_SERIAL0_REC_CTRL__rts___BITNR) | \
+ (R_SERIAL0_REC_CTRL__sampling__##f4_##_VAL(R_SERIAL0_REC_CTRL_, sampling_, v4) << R_SERIAL0_REC_CTRL__sampling__BITNR) | \
+ (R_SERIAL0_REC_CTRL__rec_stick_par__##f5_##_VAL(R_SERIAL0_REC_CTRL_, rec_stick_par_, v5) << R_SERIAL0_REC_CTRL__rec_stick_par__BITNR) | \
+ (R_SERIAL0_REC_CTRL__rec_par__##f6_##_VAL(R_SERIAL0_REC_CTRL_, rec_par_, v6) << R_SERIAL0_REC_CTRL__rec_par__BITNR) | \
+ (R_SERIAL0_REC_CTRL__rec_par_en__##f7_##_VAL(R_SERIAL0_REC_CTRL_, rec_par_en_, v7) << R_SERIAL0_REC_CTRL__rec_par_en__BITNR) | \
+ (R_SERIAL0_REC_CTRL__rec_bitnr__##f8_##_VAL(R_SERIAL0_REC_CTRL_, rec_bitnr_, v8) << R_SERIAL0_REC_CTRL__rec_bitnr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL0_REC_DATA
+ * - type: RO
+ * - addr: 0xb0000060
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL0_REC_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL0_REC_DATA(f1,v1) ( \
+ (R_SERIAL0_REC_DATA__data_in__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL0_REC_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL0_REC_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL0_REC_DATA(f1,v1) ( \
+ (R_SERIAL0_REC_DATA__data_in__##f1##__VAL(R_SERIAL0_REC_DATA_, data_in_, v1) << R_SERIAL0_REC_DATA__data_in__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL0_REC_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL0_REC_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL0_REC_DATA_(f1_,v1) ( \
+ (R_SERIAL0_REC_DATA__data_in__##f1_##_VAL(R_SERIAL0_REC_DATA_, data_in_, v1) << R_SERIAL0_REC_DATA__data_in__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL0_STATUS
+ * - type: RO
+ * - addr: 0xb0000061
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL0_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL0_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL0_STATUS__xoff_detect__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL0_STATUS__cts___##f2##__MASK & REG__##v2) | \
+ (R_SERIAL0_STATUS__tr_ready__##f3##__MASK & REG__##v3) | \
+ (R_SERIAL0_STATUS__rxd__##f4##__MASK & REG__##v4) | \
+ (R_SERIAL0_STATUS__overrun__##f5##__MASK & REG__##v5) | \
+ (R_SERIAL0_STATUS__par_err__##f6##__MASK & REG__##v6) | \
+ (R_SERIAL0_STATUS__framing_err__##f7##__MASK & REG__##v7) | \
+ (R_SERIAL0_STATUS__data_avail__##f8##__MASK & REG__##v8) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL0_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL0_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL0_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL0_STATUS__xoff_detect__##f1##__VAL(R_SERIAL0_STATUS_, xoff_detect_, v1) << R_SERIAL0_STATUS__xoff_detect__BITNR) | \
+ (R_SERIAL0_STATUS__cts___##f2##__VAL(R_SERIAL0_STATUS_, cts__, v2) << R_SERIAL0_STATUS__cts___BITNR) | \
+ (R_SERIAL0_STATUS__tr_ready__##f3##__VAL(R_SERIAL0_STATUS_, tr_ready_, v3) << R_SERIAL0_STATUS__tr_ready__BITNR) | \
+ (R_SERIAL0_STATUS__rxd__##f4##__VAL(R_SERIAL0_STATUS_, rxd_, v4) << R_SERIAL0_STATUS__rxd__BITNR) | \
+ (R_SERIAL0_STATUS__overrun__##f5##__VAL(R_SERIAL0_STATUS_, overrun_, v5) << R_SERIAL0_STATUS__overrun__BITNR) | \
+ (R_SERIAL0_STATUS__par_err__##f6##__VAL(R_SERIAL0_STATUS_, par_err_, v6) << R_SERIAL0_STATUS__par_err__BITNR) | \
+ (R_SERIAL0_STATUS__framing_err__##f7##__VAL(R_SERIAL0_STATUS_, framing_err_, v7) << R_SERIAL0_STATUS__framing_err__BITNR) | \
+ (R_SERIAL0_STATUS__data_avail__##f8##__VAL(R_SERIAL0_STATUS_, data_avail_, v8) << R_SERIAL0_STATUS__data_avail__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL0_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL0_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL0_STATUS_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8) ( \
+ (R_SERIAL0_STATUS__xoff_detect__##f1_##_VAL(R_SERIAL0_STATUS_, xoff_detect_, v1) << R_SERIAL0_STATUS__xoff_detect__BITNR) | \
+ (R_SERIAL0_STATUS__cts___##f2_##_VAL(R_SERIAL0_STATUS_, cts__, v2) << R_SERIAL0_STATUS__cts___BITNR) | \
+ (R_SERIAL0_STATUS__tr_ready__##f3_##_VAL(R_SERIAL0_STATUS_, tr_ready_, v3) << R_SERIAL0_STATUS__tr_ready__BITNR) | \
+ (R_SERIAL0_STATUS__rxd__##f4_##_VAL(R_SERIAL0_STATUS_, rxd_, v4) << R_SERIAL0_STATUS__rxd__BITNR) | \
+ (R_SERIAL0_STATUS__overrun__##f5_##_VAL(R_SERIAL0_STATUS_, overrun_, v5) << R_SERIAL0_STATUS__overrun__BITNR) | \
+ (R_SERIAL0_STATUS__par_err__##f6_##_VAL(R_SERIAL0_STATUS_, par_err_, v6) << R_SERIAL0_STATUS__par_err__BITNR) | \
+ (R_SERIAL0_STATUS__framing_err__##f7_##_VAL(R_SERIAL0_STATUS_, framing_err_, v7) << R_SERIAL0_STATUS__framing_err__BITNR) | \
+ (R_SERIAL0_STATUS__data_avail__##f8_##_VAL(R_SERIAL0_STATUS_, data_avail_, v8) << R_SERIAL0_STATUS__data_avail__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL0_TR_CTRL
+ * - type: WO
+ * - addr: 0xb0000061
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL0_TR_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL0_TR_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL0_TR_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL0_TR_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_SERIAL0_TR_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL0_TR_CTRL_) \
+ REG_VAL__R_SERIAL0_TR_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ), \
+ R_SERIAL0_TR_CTRL__WRITE(R_SERIAL0_TR_CTRL__ADDR, *R_SERIAL0_TR_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL0_TR_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL0_TR_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL0_TR_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL0_TR_CTRL__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_SERIAL0_TR_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL0_TR_CTRL_) \
+ REG_VAL__R_SERIAL0_TR_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL0_TR_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL0_TR_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL0_TR_CTRL__txd__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL0_TR_CTRL__tr_enable__##f2##__MASK & REG__##v2) | \
+ (R_SERIAL0_TR_CTRL__auto_cts__##f3##__MASK & REG__##v3) | \
+ (R_SERIAL0_TR_CTRL__stop_bits__##f4##__MASK & REG__##v4) | \
+ (R_SERIAL0_TR_CTRL__tr_stick_par__##f5##__MASK & REG__##v5) | \
+ (R_SERIAL0_TR_CTRL__tr_par__##f6##__MASK & REG__##v6) | \
+ (R_SERIAL0_TR_CTRL__tr_par_en__##f7##__MASK & REG__##v7) | \
+ (R_SERIAL0_TR_CTRL__tr_bitnr__##f8##__MASK & REG__##v8) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL0_TR_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL0_TR_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL0_TR_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL0_TR_CTRL__txd__##f1##__VAL(R_SERIAL0_TR_CTRL_, txd_, v1) << R_SERIAL0_TR_CTRL__txd__BITNR) | \
+ (R_SERIAL0_TR_CTRL__tr_enable__##f2##__VAL(R_SERIAL0_TR_CTRL_, tr_enable_, v2) << R_SERIAL0_TR_CTRL__tr_enable__BITNR) | \
+ (R_SERIAL0_TR_CTRL__auto_cts__##f3##__VAL(R_SERIAL0_TR_CTRL_, auto_cts_, v3) << R_SERIAL0_TR_CTRL__auto_cts__BITNR) | \
+ (R_SERIAL0_TR_CTRL__stop_bits__##f4##__VAL(R_SERIAL0_TR_CTRL_, stop_bits_, v4) << R_SERIAL0_TR_CTRL__stop_bits__BITNR) | \
+ (R_SERIAL0_TR_CTRL__tr_stick_par__##f5##__VAL(R_SERIAL0_TR_CTRL_, tr_stick_par_, v5) << R_SERIAL0_TR_CTRL__tr_stick_par__BITNR) | \
+ (R_SERIAL0_TR_CTRL__tr_par__##f6##__VAL(R_SERIAL0_TR_CTRL_, tr_par_, v6) << R_SERIAL0_TR_CTRL__tr_par__BITNR) | \
+ (R_SERIAL0_TR_CTRL__tr_par_en__##f7##__VAL(R_SERIAL0_TR_CTRL_, tr_par_en_, v7) << R_SERIAL0_TR_CTRL__tr_par_en__BITNR) | \
+ (R_SERIAL0_TR_CTRL__tr_bitnr__##f8##__VAL(R_SERIAL0_TR_CTRL_, tr_bitnr_, v8) << R_SERIAL0_TR_CTRL__tr_bitnr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL0_TR_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL0_TR_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL0_TR_CTRL_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8) ( \
+ (R_SERIAL0_TR_CTRL__txd__##f1_##_VAL(R_SERIAL0_TR_CTRL_, txd_, v1) << R_SERIAL0_TR_CTRL__txd__BITNR) | \
+ (R_SERIAL0_TR_CTRL__tr_enable__##f2_##_VAL(R_SERIAL0_TR_CTRL_, tr_enable_, v2) << R_SERIAL0_TR_CTRL__tr_enable__BITNR) | \
+ (R_SERIAL0_TR_CTRL__auto_cts__##f3_##_VAL(R_SERIAL0_TR_CTRL_, auto_cts_, v3) << R_SERIAL0_TR_CTRL__auto_cts__BITNR) | \
+ (R_SERIAL0_TR_CTRL__stop_bits__##f4_##_VAL(R_SERIAL0_TR_CTRL_, stop_bits_, v4) << R_SERIAL0_TR_CTRL__stop_bits__BITNR) | \
+ (R_SERIAL0_TR_CTRL__tr_stick_par__##f5_##_VAL(R_SERIAL0_TR_CTRL_, tr_stick_par_, v5) << R_SERIAL0_TR_CTRL__tr_stick_par__BITNR) | \
+ (R_SERIAL0_TR_CTRL__tr_par__##f6_##_VAL(R_SERIAL0_TR_CTRL_, tr_par_, v6) << R_SERIAL0_TR_CTRL__tr_par__BITNR) | \
+ (R_SERIAL0_TR_CTRL__tr_par_en__##f7_##_VAL(R_SERIAL0_TR_CTRL_, tr_par_en_, v7) << R_SERIAL0_TR_CTRL__tr_par_en__BITNR) | \
+ (R_SERIAL0_TR_CTRL__tr_bitnr__##f8_##_VAL(R_SERIAL0_TR_CTRL_, tr_bitnr_, v8) << R_SERIAL0_TR_CTRL__tr_bitnr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL0_TR_DATA
+ * - type: WO
+ * - addr: 0xb0000060
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL0_TR_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL0_TR_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL0_TR_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL0_TR_DATA(f1,v1) ( \
+ *R_SERIAL0_TR_DATA__SADDR = ( \
+ REG_INITIATED(R_SERIAL0_TR_DATA_) \
+ REG_VAL__R_SERIAL0_TR_DATA_(f1##_,v1) \
+ ), \
+ R_SERIAL0_TR_DATA__WRITE(R_SERIAL0_TR_DATA__ADDR, *R_SERIAL0_TR_DATA__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL0_TR_DATA__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL0_TR_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL0_TR_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL0_TR_DATA__SHADOW(f1,v1) ( \
+ *R_SERIAL0_TR_DATA__SADDR = ( \
+ REG_INITIATED(R_SERIAL0_TR_DATA_) \
+ REG_VAL__R_SERIAL0_TR_DATA_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL0_TR_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL0_TR_DATA(f1,v1) ( \
+ (R_SERIAL0_TR_DATA__data_out__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL0_TR_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL0_TR_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL0_TR_DATA(f1,v1) ( \
+ (R_SERIAL0_TR_DATA__data_out__##f1##__VAL(R_SERIAL0_TR_DATA_, data_out_, v1) << R_SERIAL0_TR_DATA__data_out__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL0_TR_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL0_TR_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL0_TR_DATA_(f1_,v1) ( \
+ (R_SERIAL0_TR_DATA__data_out__##f1_##_VAL(R_SERIAL0_TR_DATA_, data_out_, v1) << R_SERIAL0_TR_DATA__data_out__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL0_XOFF
+ * - type: WO
+ * - addr: 0xb0000064
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL0_XOFF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL0_XOFF.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL0_XOFF.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL0_XOFF(f1,v1,f2,v2,f3,v3) ( \
+ *R_SERIAL0_XOFF__SADDR = ( \
+ REG_INITIATED(R_SERIAL0_XOFF_) \
+ REG_VAL__R_SERIAL0_XOFF_(f1##_,v1,f2##_,v2,f3##_,v3) \
+ ), \
+ R_SERIAL0_XOFF__WRITE(R_SERIAL0_XOFF__ADDR, *R_SERIAL0_XOFF__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL0_XOFF__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL0_XOFF.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL0_XOFF.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL0_XOFF__SHADOW(f1,v1,f2,v2,f3,v3) ( \
+ *R_SERIAL0_XOFF__SADDR = ( \
+ REG_INITIATED(R_SERIAL0_XOFF_) \
+ REG_VAL__R_SERIAL0_XOFF_(f1##_,v1,f2##_,v2,f3##_,v3) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL0_XOFF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL0_XOFF(f1,v1,f2,v2,f3,v3) ( \
+ (R_SERIAL0_XOFF__tx_stop__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL0_XOFF__auto_xoff__##f2##__MASK & REG__##v2) | \
+ (R_SERIAL0_XOFF__xoff_char__##f3##__MASK & REG__##v3) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL0_XOFF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL0_XOFF.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL0_XOFF(f1,v1,f2,v2,f3,v3) ( \
+ (R_SERIAL0_XOFF__tx_stop__##f1##__VAL(R_SERIAL0_XOFF_, tx_stop_, v1) << R_SERIAL0_XOFF__tx_stop__BITNR) | \
+ (R_SERIAL0_XOFF__auto_xoff__##f2##__VAL(R_SERIAL0_XOFF_, auto_xoff_, v2) << R_SERIAL0_XOFF__auto_xoff__BITNR) | \
+ (R_SERIAL0_XOFF__xoff_char__##f3##__VAL(R_SERIAL0_XOFF_, xoff_char_, v3) << R_SERIAL0_XOFF__xoff_char__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL0_XOFF_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL0_XOFF.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL0_XOFF_(f1_,v1,f2_,v2,f3_,v3) ( \
+ (R_SERIAL0_XOFF__tx_stop__##f1_##_VAL(R_SERIAL0_XOFF_, tx_stop_, v1) << R_SERIAL0_XOFF__tx_stop__BITNR) | \
+ (R_SERIAL0_XOFF__auto_xoff__##f2_##_VAL(R_SERIAL0_XOFF_, auto_xoff_, v2) << R_SERIAL0_XOFF__auto_xoff__BITNR) | \
+ (R_SERIAL0_XOFF__xoff_char__##f3_##_VAL(R_SERIAL0_XOFF_, xoff_char_, v3) << R_SERIAL0_XOFF__xoff_char__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL1_BAUD
+ * - type: WO
+ * - addr: 0xb000006b
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL1_BAUD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL1_BAUD.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL1_BAUD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL1_BAUD(f1,v1,f2,v2) ( \
+ *R_SERIAL1_BAUD__SADDR = ( \
+ REG_INITIATED(R_SERIAL1_BAUD_) \
+ REG_VAL__R_SERIAL1_BAUD_(f1##_,v1,f2##_,v2) \
+ ), \
+ R_SERIAL1_BAUD__WRITE(R_SERIAL1_BAUD__ADDR, *R_SERIAL1_BAUD__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL1_BAUD__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL1_BAUD.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL1_BAUD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL1_BAUD__SHADOW(f1,v1,f2,v2) ( \
+ *R_SERIAL1_BAUD__SADDR = ( \
+ REG_INITIATED(R_SERIAL1_BAUD_) \
+ REG_VAL__R_SERIAL1_BAUD_(f1##_,v1,f2##_,v2) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL1_BAUD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL1_BAUD(f1,v1,f2,v2) ( \
+ (R_SERIAL1_BAUD__tr_baud__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL1_BAUD__rec_baud__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL1_BAUD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL1_BAUD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL1_BAUD(f1,v1,f2,v2) ( \
+ (R_SERIAL1_BAUD__tr_baud__##f1##__VAL(R_SERIAL1_BAUD_, tr_baud_, v1) << R_SERIAL1_BAUD__tr_baud__BITNR) | \
+ (R_SERIAL1_BAUD__rec_baud__##f2##__VAL(R_SERIAL1_BAUD_, rec_baud_, v2) << R_SERIAL1_BAUD__rec_baud__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL1_BAUD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL1_BAUD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL1_BAUD_(f1_,v1,f2_,v2) ( \
+ (R_SERIAL1_BAUD__tr_baud__##f1_##_VAL(R_SERIAL1_BAUD_, tr_baud_, v1) << R_SERIAL1_BAUD__tr_baud__BITNR) | \
+ (R_SERIAL1_BAUD__rec_baud__##f2_##_VAL(R_SERIAL1_BAUD_, rec_baud_, v2) << R_SERIAL1_BAUD__rec_baud__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL1_CTRL
+ * - type: WO
+ * - addr: 0xb0000068
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL1_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL1_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL1_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL1_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19) ( \
+ *R_SERIAL1_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL1_CTRL_) \
+ REG_VAL__R_SERIAL1_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19) \
+ ), \
+ R_SERIAL1_CTRL__WRITE(R_SERIAL1_CTRL__ADDR, *R_SERIAL1_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL1_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL1_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL1_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL1_CTRL__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19) ( \
+ *R_SERIAL1_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL1_CTRL_) \
+ REG_VAL__R_SERIAL1_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL1_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL1_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19) ( \
+ (R_SERIAL1_CTRL__tr_baud__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL1_CTRL__rec_baud__##f2##__MASK & REG__##v2) | \
+ (R_SERIAL1_CTRL__dma_err__##f3##__MASK & REG__##v3) | \
+ (R_SERIAL1_CTRL__rec_enable__##f4##__MASK & REG__##v4) | \
+ (R_SERIAL1_CTRL__rts___##f5##__MASK & REG__##v5) | \
+ (R_SERIAL1_CTRL__sampling__##f6##__MASK & REG__##v6) | \
+ (R_SERIAL1_CTRL__rec_stick_par__##f7##__MASK & REG__##v7) | \
+ (R_SERIAL1_CTRL__rec_par__##f8##__MASK & REG__##v8) | \
+ (R_SERIAL1_CTRL__rec_par_en__##f9##__MASK & REG__##v9) | \
+ (R_SERIAL1_CTRL__rec_bitnr__##f10##__MASK & REG__##v10) | \
+ (R_SERIAL1_CTRL__txd__##f11##__MASK & REG__##v11) | \
+ (R_SERIAL1_CTRL__tr_enable__##f12##__MASK & REG__##v12) | \
+ (R_SERIAL1_CTRL__auto_cts__##f13##__MASK & REG__##v13) | \
+ (R_SERIAL1_CTRL__stop_bits__##f14##__MASK & REG__##v14) | \
+ (R_SERIAL1_CTRL__tr_stick_par__##f15##__MASK & REG__##v15) | \
+ (R_SERIAL1_CTRL__tr_par__##f16##__MASK & REG__##v16) | \
+ (R_SERIAL1_CTRL__tr_par_en__##f17##__MASK & REG__##v17) | \
+ (R_SERIAL1_CTRL__tr_bitnr__##f18##__MASK & REG__##v18) | \
+ (R_SERIAL1_CTRL__data_out__##f19##__MASK & REG__##v19) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL1_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL1_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL1_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19) ( \
+ (R_SERIAL1_CTRL__tr_baud__##f1##__VAL(R_SERIAL1_CTRL_, tr_baud_, v1) << R_SERIAL1_CTRL__tr_baud__BITNR) | \
+ (R_SERIAL1_CTRL__rec_baud__##f2##__VAL(R_SERIAL1_CTRL_, rec_baud_, v2) << R_SERIAL1_CTRL__rec_baud__BITNR) | \
+ (R_SERIAL1_CTRL__dma_err__##f3##__VAL(R_SERIAL1_CTRL_, dma_err_, v3) << R_SERIAL1_CTRL__dma_err__BITNR) | \
+ (R_SERIAL1_CTRL__rec_enable__##f4##__VAL(R_SERIAL1_CTRL_, rec_enable_, v4) << R_SERIAL1_CTRL__rec_enable__BITNR) | \
+ (R_SERIAL1_CTRL__rts___##f5##__VAL(R_SERIAL1_CTRL_, rts__, v5) << R_SERIAL1_CTRL__rts___BITNR) | \
+ (R_SERIAL1_CTRL__sampling__##f6##__VAL(R_SERIAL1_CTRL_, sampling_, v6) << R_SERIAL1_CTRL__sampling__BITNR) | \
+ (R_SERIAL1_CTRL__rec_stick_par__##f7##__VAL(R_SERIAL1_CTRL_, rec_stick_par_, v7) << R_SERIAL1_CTRL__rec_stick_par__BITNR) | \
+ (R_SERIAL1_CTRL__rec_par__##f8##__VAL(R_SERIAL1_CTRL_, rec_par_, v8) << R_SERIAL1_CTRL__rec_par__BITNR) | \
+ (R_SERIAL1_CTRL__rec_par_en__##f9##__VAL(R_SERIAL1_CTRL_, rec_par_en_, v9) << R_SERIAL1_CTRL__rec_par_en__BITNR) | \
+ (R_SERIAL1_CTRL__rec_bitnr__##f10##__VAL(R_SERIAL1_CTRL_, rec_bitnr_, v10) << R_SERIAL1_CTRL__rec_bitnr__BITNR) | \
+ (R_SERIAL1_CTRL__txd__##f11##__VAL(R_SERIAL1_CTRL_, txd_, v11) << R_SERIAL1_CTRL__txd__BITNR) | \
+ (R_SERIAL1_CTRL__tr_enable__##f12##__VAL(R_SERIAL1_CTRL_, tr_enable_, v12) << R_SERIAL1_CTRL__tr_enable__BITNR) | \
+ (R_SERIAL1_CTRL__auto_cts__##f13##__VAL(R_SERIAL1_CTRL_, auto_cts_, v13) << R_SERIAL1_CTRL__auto_cts__BITNR) | \
+ (R_SERIAL1_CTRL__stop_bits__##f14##__VAL(R_SERIAL1_CTRL_, stop_bits_, v14) << R_SERIAL1_CTRL__stop_bits__BITNR) | \
+ (R_SERIAL1_CTRL__tr_stick_par__##f15##__VAL(R_SERIAL1_CTRL_, tr_stick_par_, v15) << R_SERIAL1_CTRL__tr_stick_par__BITNR) | \
+ (R_SERIAL1_CTRL__tr_par__##f16##__VAL(R_SERIAL1_CTRL_, tr_par_, v16) << R_SERIAL1_CTRL__tr_par__BITNR) | \
+ (R_SERIAL1_CTRL__tr_par_en__##f17##__VAL(R_SERIAL1_CTRL_, tr_par_en_, v17) << R_SERIAL1_CTRL__tr_par_en__BITNR) | \
+ (R_SERIAL1_CTRL__tr_bitnr__##f18##__VAL(R_SERIAL1_CTRL_, tr_bitnr_, v18) << R_SERIAL1_CTRL__tr_bitnr__BITNR) | \
+ (R_SERIAL1_CTRL__data_out__##f19##__VAL(R_SERIAL1_CTRL_, data_out_, v19) << R_SERIAL1_CTRL__data_out__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL1_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL1_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL1_CTRL_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19) ( \
+ (R_SERIAL1_CTRL__tr_baud__##f1_##_VAL(R_SERIAL1_CTRL_, tr_baud_, v1) << R_SERIAL1_CTRL__tr_baud__BITNR) | \
+ (R_SERIAL1_CTRL__rec_baud__##f2_##_VAL(R_SERIAL1_CTRL_, rec_baud_, v2) << R_SERIAL1_CTRL__rec_baud__BITNR) | \
+ (R_SERIAL1_CTRL__dma_err__##f3_##_VAL(R_SERIAL1_CTRL_, dma_err_, v3) << R_SERIAL1_CTRL__dma_err__BITNR) | \
+ (R_SERIAL1_CTRL__rec_enable__##f4_##_VAL(R_SERIAL1_CTRL_, rec_enable_, v4) << R_SERIAL1_CTRL__rec_enable__BITNR) | \
+ (R_SERIAL1_CTRL__rts___##f5_##_VAL(R_SERIAL1_CTRL_, rts__, v5) << R_SERIAL1_CTRL__rts___BITNR) | \
+ (R_SERIAL1_CTRL__sampling__##f6_##_VAL(R_SERIAL1_CTRL_, sampling_, v6) << R_SERIAL1_CTRL__sampling__BITNR) | \
+ (R_SERIAL1_CTRL__rec_stick_par__##f7_##_VAL(R_SERIAL1_CTRL_, rec_stick_par_, v7) << R_SERIAL1_CTRL__rec_stick_par__BITNR) | \
+ (R_SERIAL1_CTRL__rec_par__##f8_##_VAL(R_SERIAL1_CTRL_, rec_par_, v8) << R_SERIAL1_CTRL__rec_par__BITNR) | \
+ (R_SERIAL1_CTRL__rec_par_en__##f9_##_VAL(R_SERIAL1_CTRL_, rec_par_en_, v9) << R_SERIAL1_CTRL__rec_par_en__BITNR) | \
+ (R_SERIAL1_CTRL__rec_bitnr__##f10_##_VAL(R_SERIAL1_CTRL_, rec_bitnr_, v10) << R_SERIAL1_CTRL__rec_bitnr__BITNR) | \
+ (R_SERIAL1_CTRL__txd__##f11_##_VAL(R_SERIAL1_CTRL_, txd_, v11) << R_SERIAL1_CTRL__txd__BITNR) | \
+ (R_SERIAL1_CTRL__tr_enable__##f12_##_VAL(R_SERIAL1_CTRL_, tr_enable_, v12) << R_SERIAL1_CTRL__tr_enable__BITNR) | \
+ (R_SERIAL1_CTRL__auto_cts__##f13_##_VAL(R_SERIAL1_CTRL_, auto_cts_, v13) << R_SERIAL1_CTRL__auto_cts__BITNR) | \
+ (R_SERIAL1_CTRL__stop_bits__##f14_##_VAL(R_SERIAL1_CTRL_, stop_bits_, v14) << R_SERIAL1_CTRL__stop_bits__BITNR) | \
+ (R_SERIAL1_CTRL__tr_stick_par__##f15_##_VAL(R_SERIAL1_CTRL_, tr_stick_par_, v15) << R_SERIAL1_CTRL__tr_stick_par__BITNR) | \
+ (R_SERIAL1_CTRL__tr_par__##f16_##_VAL(R_SERIAL1_CTRL_, tr_par_, v16) << R_SERIAL1_CTRL__tr_par__BITNR) | \
+ (R_SERIAL1_CTRL__tr_par_en__##f17_##_VAL(R_SERIAL1_CTRL_, tr_par_en_, v17) << R_SERIAL1_CTRL__tr_par_en__BITNR) | \
+ (R_SERIAL1_CTRL__tr_bitnr__##f18_##_VAL(R_SERIAL1_CTRL_, tr_bitnr_, v18) << R_SERIAL1_CTRL__tr_bitnr__BITNR) | \
+ (R_SERIAL1_CTRL__data_out__##f19_##_VAL(R_SERIAL1_CTRL_, data_out_, v19) << R_SERIAL1_CTRL__data_out__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL1_READ
+ * - type: RO
+ * - addr: 0xb0000068
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL1_READ
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL1_READ(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_SERIAL1_READ__xoff_detect__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL1_READ__cts___##f2##__MASK & REG__##v2) | \
+ (R_SERIAL1_READ__tr_ready__##f3##__MASK & REG__##v3) | \
+ (R_SERIAL1_READ__rxd__##f4##__MASK & REG__##v4) | \
+ (R_SERIAL1_READ__overrun__##f5##__MASK & REG__##v5) | \
+ (R_SERIAL1_READ__par_err__##f6##__MASK & REG__##v6) | \
+ (R_SERIAL1_READ__framing_err__##f7##__MASK & REG__##v7) | \
+ (R_SERIAL1_READ__data_avail__##f8##__MASK & REG__##v8) | \
+ (R_SERIAL1_READ__data_in__##f9##__MASK & REG__##v9) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL1_READ
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL1_READ.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL1_READ(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_SERIAL1_READ__xoff_detect__##f1##__VAL(R_SERIAL1_READ_, xoff_detect_, v1) << R_SERIAL1_READ__xoff_detect__BITNR) | \
+ (R_SERIAL1_READ__cts___##f2##__VAL(R_SERIAL1_READ_, cts__, v2) << R_SERIAL1_READ__cts___BITNR) | \
+ (R_SERIAL1_READ__tr_ready__##f3##__VAL(R_SERIAL1_READ_, tr_ready_, v3) << R_SERIAL1_READ__tr_ready__BITNR) | \
+ (R_SERIAL1_READ__rxd__##f4##__VAL(R_SERIAL1_READ_, rxd_, v4) << R_SERIAL1_READ__rxd__BITNR) | \
+ (R_SERIAL1_READ__overrun__##f5##__VAL(R_SERIAL1_READ_, overrun_, v5) << R_SERIAL1_READ__overrun__BITNR) | \
+ (R_SERIAL1_READ__par_err__##f6##__VAL(R_SERIAL1_READ_, par_err_, v6) << R_SERIAL1_READ__par_err__BITNR) | \
+ (R_SERIAL1_READ__framing_err__##f7##__VAL(R_SERIAL1_READ_, framing_err_, v7) << R_SERIAL1_READ__framing_err__BITNR) | \
+ (R_SERIAL1_READ__data_avail__##f8##__VAL(R_SERIAL1_READ_, data_avail_, v8) << R_SERIAL1_READ__data_avail__BITNR) | \
+ (R_SERIAL1_READ__data_in__##f9##__VAL(R_SERIAL1_READ_, data_in_, v9) << R_SERIAL1_READ__data_in__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL1_READ_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL1_READ.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL1_READ_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9) ( \
+ (R_SERIAL1_READ__xoff_detect__##f1_##_VAL(R_SERIAL1_READ_, xoff_detect_, v1) << R_SERIAL1_READ__xoff_detect__BITNR) | \
+ (R_SERIAL1_READ__cts___##f2_##_VAL(R_SERIAL1_READ_, cts__, v2) << R_SERIAL1_READ__cts___BITNR) | \
+ (R_SERIAL1_READ__tr_ready__##f3_##_VAL(R_SERIAL1_READ_, tr_ready_, v3) << R_SERIAL1_READ__tr_ready__BITNR) | \
+ (R_SERIAL1_READ__rxd__##f4_##_VAL(R_SERIAL1_READ_, rxd_, v4) << R_SERIAL1_READ__rxd__BITNR) | \
+ (R_SERIAL1_READ__overrun__##f5_##_VAL(R_SERIAL1_READ_, overrun_, v5) << R_SERIAL1_READ__overrun__BITNR) | \
+ (R_SERIAL1_READ__par_err__##f6_##_VAL(R_SERIAL1_READ_, par_err_, v6) << R_SERIAL1_READ__par_err__BITNR) | \
+ (R_SERIAL1_READ__framing_err__##f7_##_VAL(R_SERIAL1_READ_, framing_err_, v7) << R_SERIAL1_READ__framing_err__BITNR) | \
+ (R_SERIAL1_READ__data_avail__##f8_##_VAL(R_SERIAL1_READ_, data_avail_, v8) << R_SERIAL1_READ__data_avail__BITNR) | \
+ (R_SERIAL1_READ__data_in__##f9_##_VAL(R_SERIAL1_READ_, data_in_, v9) << R_SERIAL1_READ__data_in__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL1_REC_CTRL
+ * - type: WO
+ * - addr: 0xb000006a
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL1_REC_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL1_REC_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL1_REC_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL1_REC_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_SERIAL1_REC_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL1_REC_CTRL_) \
+ REG_VAL__R_SERIAL1_REC_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ), \
+ R_SERIAL1_REC_CTRL__WRITE(R_SERIAL1_REC_CTRL__ADDR, *R_SERIAL1_REC_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL1_REC_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL1_REC_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL1_REC_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL1_REC_CTRL__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_SERIAL1_REC_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL1_REC_CTRL_) \
+ REG_VAL__R_SERIAL1_REC_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL1_REC_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL1_REC_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL1_REC_CTRL__dma_err__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL1_REC_CTRL__rec_enable__##f2##__MASK & REG__##v2) | \
+ (R_SERIAL1_REC_CTRL__rts___##f3##__MASK & REG__##v3) | \
+ (R_SERIAL1_REC_CTRL__sampling__##f4##__MASK & REG__##v4) | \
+ (R_SERIAL1_REC_CTRL__rec_stick_par__##f5##__MASK & REG__##v5) | \
+ (R_SERIAL1_REC_CTRL__rec_par__##f6##__MASK & REG__##v6) | \
+ (R_SERIAL1_REC_CTRL__rec_par_en__##f7##__MASK & REG__##v7) | \
+ (R_SERIAL1_REC_CTRL__rec_bitnr__##f8##__MASK & REG__##v8) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL1_REC_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL1_REC_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL1_REC_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL1_REC_CTRL__dma_err__##f1##__VAL(R_SERIAL1_REC_CTRL_, dma_err_, v1) << R_SERIAL1_REC_CTRL__dma_err__BITNR) | \
+ (R_SERIAL1_REC_CTRL__rec_enable__##f2##__VAL(R_SERIAL1_REC_CTRL_, rec_enable_, v2) << R_SERIAL1_REC_CTRL__rec_enable__BITNR) | \
+ (R_SERIAL1_REC_CTRL__rts___##f3##__VAL(R_SERIAL1_REC_CTRL_, rts__, v3) << R_SERIAL1_REC_CTRL__rts___BITNR) | \
+ (R_SERIAL1_REC_CTRL__sampling__##f4##__VAL(R_SERIAL1_REC_CTRL_, sampling_, v4) << R_SERIAL1_REC_CTRL__sampling__BITNR) | \
+ (R_SERIAL1_REC_CTRL__rec_stick_par__##f5##__VAL(R_SERIAL1_REC_CTRL_, rec_stick_par_, v5) << R_SERIAL1_REC_CTRL__rec_stick_par__BITNR) | \
+ (R_SERIAL1_REC_CTRL__rec_par__##f6##__VAL(R_SERIAL1_REC_CTRL_, rec_par_, v6) << R_SERIAL1_REC_CTRL__rec_par__BITNR) | \
+ (R_SERIAL1_REC_CTRL__rec_par_en__##f7##__VAL(R_SERIAL1_REC_CTRL_, rec_par_en_, v7) << R_SERIAL1_REC_CTRL__rec_par_en__BITNR) | \
+ (R_SERIAL1_REC_CTRL__rec_bitnr__##f8##__VAL(R_SERIAL1_REC_CTRL_, rec_bitnr_, v8) << R_SERIAL1_REC_CTRL__rec_bitnr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL1_REC_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL1_REC_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL1_REC_CTRL_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8) ( \
+ (R_SERIAL1_REC_CTRL__dma_err__##f1_##_VAL(R_SERIAL1_REC_CTRL_, dma_err_, v1) << R_SERIAL1_REC_CTRL__dma_err__BITNR) | \
+ (R_SERIAL1_REC_CTRL__rec_enable__##f2_##_VAL(R_SERIAL1_REC_CTRL_, rec_enable_, v2) << R_SERIAL1_REC_CTRL__rec_enable__BITNR) | \
+ (R_SERIAL1_REC_CTRL__rts___##f3_##_VAL(R_SERIAL1_REC_CTRL_, rts__, v3) << R_SERIAL1_REC_CTRL__rts___BITNR) | \
+ (R_SERIAL1_REC_CTRL__sampling__##f4_##_VAL(R_SERIAL1_REC_CTRL_, sampling_, v4) << R_SERIAL1_REC_CTRL__sampling__BITNR) | \
+ (R_SERIAL1_REC_CTRL__rec_stick_par__##f5_##_VAL(R_SERIAL1_REC_CTRL_, rec_stick_par_, v5) << R_SERIAL1_REC_CTRL__rec_stick_par__BITNR) | \
+ (R_SERIAL1_REC_CTRL__rec_par__##f6_##_VAL(R_SERIAL1_REC_CTRL_, rec_par_, v6) << R_SERIAL1_REC_CTRL__rec_par__BITNR) | \
+ (R_SERIAL1_REC_CTRL__rec_par_en__##f7_##_VAL(R_SERIAL1_REC_CTRL_, rec_par_en_, v7) << R_SERIAL1_REC_CTRL__rec_par_en__BITNR) | \
+ (R_SERIAL1_REC_CTRL__rec_bitnr__##f8_##_VAL(R_SERIAL1_REC_CTRL_, rec_bitnr_, v8) << R_SERIAL1_REC_CTRL__rec_bitnr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL1_REC_DATA
+ * - type: RO
+ * - addr: 0xb0000068
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL1_REC_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL1_REC_DATA(f1,v1) ( \
+ (R_SERIAL1_REC_DATA__data_in__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL1_REC_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL1_REC_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL1_REC_DATA(f1,v1) ( \
+ (R_SERIAL1_REC_DATA__data_in__##f1##__VAL(R_SERIAL1_REC_DATA_, data_in_, v1) << R_SERIAL1_REC_DATA__data_in__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL1_REC_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL1_REC_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL1_REC_DATA_(f1_,v1) ( \
+ (R_SERIAL1_REC_DATA__data_in__##f1_##_VAL(R_SERIAL1_REC_DATA_, data_in_, v1) << R_SERIAL1_REC_DATA__data_in__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL1_STATUS
+ * - type: RO
+ * - addr: 0xb0000069
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL1_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL1_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL1_STATUS__xoff_detect__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL1_STATUS__cts___##f2##__MASK & REG__##v2) | \
+ (R_SERIAL1_STATUS__tr_ready__##f3##__MASK & REG__##v3) | \
+ (R_SERIAL1_STATUS__rxd__##f4##__MASK & REG__##v4) | \
+ (R_SERIAL1_STATUS__overrun__##f5##__MASK & REG__##v5) | \
+ (R_SERIAL1_STATUS__par_err__##f6##__MASK & REG__##v6) | \
+ (R_SERIAL1_STATUS__framing_err__##f7##__MASK & REG__##v7) | \
+ (R_SERIAL1_STATUS__data_avail__##f8##__MASK & REG__##v8) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL1_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL1_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL1_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL1_STATUS__xoff_detect__##f1##__VAL(R_SERIAL1_STATUS_, xoff_detect_, v1) << R_SERIAL1_STATUS__xoff_detect__BITNR) | \
+ (R_SERIAL1_STATUS__cts___##f2##__VAL(R_SERIAL1_STATUS_, cts__, v2) << R_SERIAL1_STATUS__cts___BITNR) | \
+ (R_SERIAL1_STATUS__tr_ready__##f3##__VAL(R_SERIAL1_STATUS_, tr_ready_, v3) << R_SERIAL1_STATUS__tr_ready__BITNR) | \
+ (R_SERIAL1_STATUS__rxd__##f4##__VAL(R_SERIAL1_STATUS_, rxd_, v4) << R_SERIAL1_STATUS__rxd__BITNR) | \
+ (R_SERIAL1_STATUS__overrun__##f5##__VAL(R_SERIAL1_STATUS_, overrun_, v5) << R_SERIAL1_STATUS__overrun__BITNR) | \
+ (R_SERIAL1_STATUS__par_err__##f6##__VAL(R_SERIAL1_STATUS_, par_err_, v6) << R_SERIAL1_STATUS__par_err__BITNR) | \
+ (R_SERIAL1_STATUS__framing_err__##f7##__VAL(R_SERIAL1_STATUS_, framing_err_, v7) << R_SERIAL1_STATUS__framing_err__BITNR) | \
+ (R_SERIAL1_STATUS__data_avail__##f8##__VAL(R_SERIAL1_STATUS_, data_avail_, v8) << R_SERIAL1_STATUS__data_avail__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL1_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL1_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL1_STATUS_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8) ( \
+ (R_SERIAL1_STATUS__xoff_detect__##f1_##_VAL(R_SERIAL1_STATUS_, xoff_detect_, v1) << R_SERIAL1_STATUS__xoff_detect__BITNR) | \
+ (R_SERIAL1_STATUS__cts___##f2_##_VAL(R_SERIAL1_STATUS_, cts__, v2) << R_SERIAL1_STATUS__cts___BITNR) | \
+ (R_SERIAL1_STATUS__tr_ready__##f3_##_VAL(R_SERIAL1_STATUS_, tr_ready_, v3) << R_SERIAL1_STATUS__tr_ready__BITNR) | \
+ (R_SERIAL1_STATUS__rxd__##f4_##_VAL(R_SERIAL1_STATUS_, rxd_, v4) << R_SERIAL1_STATUS__rxd__BITNR) | \
+ (R_SERIAL1_STATUS__overrun__##f5_##_VAL(R_SERIAL1_STATUS_, overrun_, v5) << R_SERIAL1_STATUS__overrun__BITNR) | \
+ (R_SERIAL1_STATUS__par_err__##f6_##_VAL(R_SERIAL1_STATUS_, par_err_, v6) << R_SERIAL1_STATUS__par_err__BITNR) | \
+ (R_SERIAL1_STATUS__framing_err__##f7_##_VAL(R_SERIAL1_STATUS_, framing_err_, v7) << R_SERIAL1_STATUS__framing_err__BITNR) | \
+ (R_SERIAL1_STATUS__data_avail__##f8_##_VAL(R_SERIAL1_STATUS_, data_avail_, v8) << R_SERIAL1_STATUS__data_avail__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL1_TR_CTRL
+ * - type: WO
+ * - addr: 0xb0000069
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL1_TR_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL1_TR_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL1_TR_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL1_TR_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_SERIAL1_TR_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL1_TR_CTRL_) \
+ REG_VAL__R_SERIAL1_TR_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ), \
+ R_SERIAL1_TR_CTRL__WRITE(R_SERIAL1_TR_CTRL__ADDR, *R_SERIAL1_TR_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL1_TR_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL1_TR_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL1_TR_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL1_TR_CTRL__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_SERIAL1_TR_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL1_TR_CTRL_) \
+ REG_VAL__R_SERIAL1_TR_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL1_TR_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL1_TR_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL1_TR_CTRL__txd__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL1_TR_CTRL__tr_enable__##f2##__MASK & REG__##v2) | \
+ (R_SERIAL1_TR_CTRL__auto_cts__##f3##__MASK & REG__##v3) | \
+ (R_SERIAL1_TR_CTRL__stop_bits__##f4##__MASK & REG__##v4) | \
+ (R_SERIAL1_TR_CTRL__tr_stick_par__##f5##__MASK & REG__##v5) | \
+ (R_SERIAL1_TR_CTRL__tr_par__##f6##__MASK & REG__##v6) | \
+ (R_SERIAL1_TR_CTRL__tr_par_en__##f7##__MASK & REG__##v7) | \
+ (R_SERIAL1_TR_CTRL__tr_bitnr__##f8##__MASK & REG__##v8) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL1_TR_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL1_TR_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL1_TR_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL1_TR_CTRL__txd__##f1##__VAL(R_SERIAL1_TR_CTRL_, txd_, v1) << R_SERIAL1_TR_CTRL__txd__BITNR) | \
+ (R_SERIAL1_TR_CTRL__tr_enable__##f2##__VAL(R_SERIAL1_TR_CTRL_, tr_enable_, v2) << R_SERIAL1_TR_CTRL__tr_enable__BITNR) | \
+ (R_SERIAL1_TR_CTRL__auto_cts__##f3##__VAL(R_SERIAL1_TR_CTRL_, auto_cts_, v3) << R_SERIAL1_TR_CTRL__auto_cts__BITNR) | \
+ (R_SERIAL1_TR_CTRL__stop_bits__##f4##__VAL(R_SERIAL1_TR_CTRL_, stop_bits_, v4) << R_SERIAL1_TR_CTRL__stop_bits__BITNR) | \
+ (R_SERIAL1_TR_CTRL__tr_stick_par__##f5##__VAL(R_SERIAL1_TR_CTRL_, tr_stick_par_, v5) << R_SERIAL1_TR_CTRL__tr_stick_par__BITNR) | \
+ (R_SERIAL1_TR_CTRL__tr_par__##f6##__VAL(R_SERIAL1_TR_CTRL_, tr_par_, v6) << R_SERIAL1_TR_CTRL__tr_par__BITNR) | \
+ (R_SERIAL1_TR_CTRL__tr_par_en__##f7##__VAL(R_SERIAL1_TR_CTRL_, tr_par_en_, v7) << R_SERIAL1_TR_CTRL__tr_par_en__BITNR) | \
+ (R_SERIAL1_TR_CTRL__tr_bitnr__##f8##__VAL(R_SERIAL1_TR_CTRL_, tr_bitnr_, v8) << R_SERIAL1_TR_CTRL__tr_bitnr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL1_TR_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL1_TR_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL1_TR_CTRL_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8) ( \
+ (R_SERIAL1_TR_CTRL__txd__##f1_##_VAL(R_SERIAL1_TR_CTRL_, txd_, v1) << R_SERIAL1_TR_CTRL__txd__BITNR) | \
+ (R_SERIAL1_TR_CTRL__tr_enable__##f2_##_VAL(R_SERIAL1_TR_CTRL_, tr_enable_, v2) << R_SERIAL1_TR_CTRL__tr_enable__BITNR) | \
+ (R_SERIAL1_TR_CTRL__auto_cts__##f3_##_VAL(R_SERIAL1_TR_CTRL_, auto_cts_, v3) << R_SERIAL1_TR_CTRL__auto_cts__BITNR) | \
+ (R_SERIAL1_TR_CTRL__stop_bits__##f4_##_VAL(R_SERIAL1_TR_CTRL_, stop_bits_, v4) << R_SERIAL1_TR_CTRL__stop_bits__BITNR) | \
+ (R_SERIAL1_TR_CTRL__tr_stick_par__##f5_##_VAL(R_SERIAL1_TR_CTRL_, tr_stick_par_, v5) << R_SERIAL1_TR_CTRL__tr_stick_par__BITNR) | \
+ (R_SERIAL1_TR_CTRL__tr_par__##f6_##_VAL(R_SERIAL1_TR_CTRL_, tr_par_, v6) << R_SERIAL1_TR_CTRL__tr_par__BITNR) | \
+ (R_SERIAL1_TR_CTRL__tr_par_en__##f7_##_VAL(R_SERIAL1_TR_CTRL_, tr_par_en_, v7) << R_SERIAL1_TR_CTRL__tr_par_en__BITNR) | \
+ (R_SERIAL1_TR_CTRL__tr_bitnr__##f8_##_VAL(R_SERIAL1_TR_CTRL_, tr_bitnr_, v8) << R_SERIAL1_TR_CTRL__tr_bitnr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL1_TR_DATA
+ * - type: WO
+ * - addr: 0xb0000068
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL1_TR_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL1_TR_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL1_TR_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL1_TR_DATA(f1,v1) ( \
+ *R_SERIAL1_TR_DATA__SADDR = ( \
+ REG_INITIATED(R_SERIAL1_TR_DATA_) \
+ REG_VAL__R_SERIAL1_TR_DATA_(f1##_,v1) \
+ ), \
+ R_SERIAL1_TR_DATA__WRITE(R_SERIAL1_TR_DATA__ADDR, *R_SERIAL1_TR_DATA__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL1_TR_DATA__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL1_TR_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL1_TR_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL1_TR_DATA__SHADOW(f1,v1) ( \
+ *R_SERIAL1_TR_DATA__SADDR = ( \
+ REG_INITIATED(R_SERIAL1_TR_DATA_) \
+ REG_VAL__R_SERIAL1_TR_DATA_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL1_TR_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL1_TR_DATA(f1,v1) ( \
+ (R_SERIAL1_TR_DATA__data_out__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL1_TR_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL1_TR_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL1_TR_DATA(f1,v1) ( \
+ (R_SERIAL1_TR_DATA__data_out__##f1##__VAL(R_SERIAL1_TR_DATA_, data_out_, v1) << R_SERIAL1_TR_DATA__data_out__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL1_TR_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL1_TR_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL1_TR_DATA_(f1_,v1) ( \
+ (R_SERIAL1_TR_DATA__data_out__##f1_##_VAL(R_SERIAL1_TR_DATA_, data_out_, v1) << R_SERIAL1_TR_DATA__data_out__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL1_XOFF
+ * - type: WO
+ * - addr: 0xb000006c
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL1_XOFF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL1_XOFF.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL1_XOFF.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL1_XOFF(f1,v1,f2,v2,f3,v3) ( \
+ *R_SERIAL1_XOFF__SADDR = ( \
+ REG_INITIATED(R_SERIAL1_XOFF_) \
+ REG_VAL__R_SERIAL1_XOFF_(f1##_,v1,f2##_,v2,f3##_,v3) \
+ ), \
+ R_SERIAL1_XOFF__WRITE(R_SERIAL1_XOFF__ADDR, *R_SERIAL1_XOFF__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL1_XOFF__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL1_XOFF.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL1_XOFF.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL1_XOFF__SHADOW(f1,v1,f2,v2,f3,v3) ( \
+ *R_SERIAL1_XOFF__SADDR = ( \
+ REG_INITIATED(R_SERIAL1_XOFF_) \
+ REG_VAL__R_SERIAL1_XOFF_(f1##_,v1,f2##_,v2,f3##_,v3) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL1_XOFF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL1_XOFF(f1,v1,f2,v2,f3,v3) ( \
+ (R_SERIAL1_XOFF__tx_stop__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL1_XOFF__auto_xoff__##f2##__MASK & REG__##v2) | \
+ (R_SERIAL1_XOFF__xoff_char__##f3##__MASK & REG__##v3) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL1_XOFF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL1_XOFF.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL1_XOFF(f1,v1,f2,v2,f3,v3) ( \
+ (R_SERIAL1_XOFF__tx_stop__##f1##__VAL(R_SERIAL1_XOFF_, tx_stop_, v1) << R_SERIAL1_XOFF__tx_stop__BITNR) | \
+ (R_SERIAL1_XOFF__auto_xoff__##f2##__VAL(R_SERIAL1_XOFF_, auto_xoff_, v2) << R_SERIAL1_XOFF__auto_xoff__BITNR) | \
+ (R_SERIAL1_XOFF__xoff_char__##f3##__VAL(R_SERIAL1_XOFF_, xoff_char_, v3) << R_SERIAL1_XOFF__xoff_char__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL1_XOFF_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL1_XOFF.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL1_XOFF_(f1_,v1,f2_,v2,f3_,v3) ( \
+ (R_SERIAL1_XOFF__tx_stop__##f1_##_VAL(R_SERIAL1_XOFF_, tx_stop_, v1) << R_SERIAL1_XOFF__tx_stop__BITNR) | \
+ (R_SERIAL1_XOFF__auto_xoff__##f2_##_VAL(R_SERIAL1_XOFF_, auto_xoff_, v2) << R_SERIAL1_XOFF__auto_xoff__BITNR) | \
+ (R_SERIAL1_XOFF__xoff_char__##f3_##_VAL(R_SERIAL1_XOFF_, xoff_char_, v3) << R_SERIAL1_XOFF__xoff_char__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL2_BAUD
+ * - type: WO
+ * - addr: 0xb0000073
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL2_BAUD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL2_BAUD.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL2_BAUD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL2_BAUD(f1,v1,f2,v2) ( \
+ *R_SERIAL2_BAUD__SADDR = ( \
+ REG_INITIATED(R_SERIAL2_BAUD_) \
+ REG_VAL__R_SERIAL2_BAUD_(f1##_,v1,f2##_,v2) \
+ ), \
+ R_SERIAL2_BAUD__WRITE(R_SERIAL2_BAUD__ADDR, *R_SERIAL2_BAUD__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL2_BAUD__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL2_BAUD.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL2_BAUD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL2_BAUD__SHADOW(f1,v1,f2,v2) ( \
+ *R_SERIAL2_BAUD__SADDR = ( \
+ REG_INITIATED(R_SERIAL2_BAUD_) \
+ REG_VAL__R_SERIAL2_BAUD_(f1##_,v1,f2##_,v2) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL2_BAUD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL2_BAUD(f1,v1,f2,v2) ( \
+ (R_SERIAL2_BAUD__tr_baud__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL2_BAUD__rec_baud__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL2_BAUD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL2_BAUD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL2_BAUD(f1,v1,f2,v2) ( \
+ (R_SERIAL2_BAUD__tr_baud__##f1##__VAL(R_SERIAL2_BAUD_, tr_baud_, v1) << R_SERIAL2_BAUD__tr_baud__BITNR) | \
+ (R_SERIAL2_BAUD__rec_baud__##f2##__VAL(R_SERIAL2_BAUD_, rec_baud_, v2) << R_SERIAL2_BAUD__rec_baud__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL2_BAUD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL2_BAUD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL2_BAUD_(f1_,v1,f2_,v2) ( \
+ (R_SERIAL2_BAUD__tr_baud__##f1_##_VAL(R_SERIAL2_BAUD_, tr_baud_, v1) << R_SERIAL2_BAUD__tr_baud__BITNR) | \
+ (R_SERIAL2_BAUD__rec_baud__##f2_##_VAL(R_SERIAL2_BAUD_, rec_baud_, v2) << R_SERIAL2_BAUD__rec_baud__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL2_CTRL
+ * - type: WO
+ * - addr: 0xb0000070
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL2_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL2_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL2_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL2_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19) ( \
+ *R_SERIAL2_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL2_CTRL_) \
+ REG_VAL__R_SERIAL2_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19) \
+ ), \
+ R_SERIAL2_CTRL__WRITE(R_SERIAL2_CTRL__ADDR, *R_SERIAL2_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL2_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL2_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL2_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL2_CTRL__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19) ( \
+ *R_SERIAL2_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL2_CTRL_) \
+ REG_VAL__R_SERIAL2_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL2_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL2_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19) ( \
+ (R_SERIAL2_CTRL__tr_baud__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL2_CTRL__rec_baud__##f2##__MASK & REG__##v2) | \
+ (R_SERIAL2_CTRL__dma_err__##f3##__MASK & REG__##v3) | \
+ (R_SERIAL2_CTRL__rec_enable__##f4##__MASK & REG__##v4) | \
+ (R_SERIAL2_CTRL__rts___##f5##__MASK & REG__##v5) | \
+ (R_SERIAL2_CTRL__sampling__##f6##__MASK & REG__##v6) | \
+ (R_SERIAL2_CTRL__rec_stick_par__##f7##__MASK & REG__##v7) | \
+ (R_SERIAL2_CTRL__rec_par__##f8##__MASK & REG__##v8) | \
+ (R_SERIAL2_CTRL__rec_par_en__##f9##__MASK & REG__##v9) | \
+ (R_SERIAL2_CTRL__rec_bitnr__##f10##__MASK & REG__##v10) | \
+ (R_SERIAL2_CTRL__txd__##f11##__MASK & REG__##v11) | \
+ (R_SERIAL2_CTRL__tr_enable__##f12##__MASK & REG__##v12) | \
+ (R_SERIAL2_CTRL__auto_cts__##f13##__MASK & REG__##v13) | \
+ (R_SERIAL2_CTRL__stop_bits__##f14##__MASK & REG__##v14) | \
+ (R_SERIAL2_CTRL__tr_stick_par__##f15##__MASK & REG__##v15) | \
+ (R_SERIAL2_CTRL__tr_par__##f16##__MASK & REG__##v16) | \
+ (R_SERIAL2_CTRL__tr_par_en__##f17##__MASK & REG__##v17) | \
+ (R_SERIAL2_CTRL__tr_bitnr__##f18##__MASK & REG__##v18) | \
+ (R_SERIAL2_CTRL__data_out__##f19##__MASK & REG__##v19) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL2_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL2_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL2_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19) ( \
+ (R_SERIAL2_CTRL__tr_baud__##f1##__VAL(R_SERIAL2_CTRL_, tr_baud_, v1) << R_SERIAL2_CTRL__tr_baud__BITNR) | \
+ (R_SERIAL2_CTRL__rec_baud__##f2##__VAL(R_SERIAL2_CTRL_, rec_baud_, v2) << R_SERIAL2_CTRL__rec_baud__BITNR) | \
+ (R_SERIAL2_CTRL__dma_err__##f3##__VAL(R_SERIAL2_CTRL_, dma_err_, v3) << R_SERIAL2_CTRL__dma_err__BITNR) | \
+ (R_SERIAL2_CTRL__rec_enable__##f4##__VAL(R_SERIAL2_CTRL_, rec_enable_, v4) << R_SERIAL2_CTRL__rec_enable__BITNR) | \
+ (R_SERIAL2_CTRL__rts___##f5##__VAL(R_SERIAL2_CTRL_, rts__, v5) << R_SERIAL2_CTRL__rts___BITNR) | \
+ (R_SERIAL2_CTRL__sampling__##f6##__VAL(R_SERIAL2_CTRL_, sampling_, v6) << R_SERIAL2_CTRL__sampling__BITNR) | \
+ (R_SERIAL2_CTRL__rec_stick_par__##f7##__VAL(R_SERIAL2_CTRL_, rec_stick_par_, v7) << R_SERIAL2_CTRL__rec_stick_par__BITNR) | \
+ (R_SERIAL2_CTRL__rec_par__##f8##__VAL(R_SERIAL2_CTRL_, rec_par_, v8) << R_SERIAL2_CTRL__rec_par__BITNR) | \
+ (R_SERIAL2_CTRL__rec_par_en__##f9##__VAL(R_SERIAL2_CTRL_, rec_par_en_, v9) << R_SERIAL2_CTRL__rec_par_en__BITNR) | \
+ (R_SERIAL2_CTRL__rec_bitnr__##f10##__VAL(R_SERIAL2_CTRL_, rec_bitnr_, v10) << R_SERIAL2_CTRL__rec_bitnr__BITNR) | \
+ (R_SERIAL2_CTRL__txd__##f11##__VAL(R_SERIAL2_CTRL_, txd_, v11) << R_SERIAL2_CTRL__txd__BITNR) | \
+ (R_SERIAL2_CTRL__tr_enable__##f12##__VAL(R_SERIAL2_CTRL_, tr_enable_, v12) << R_SERIAL2_CTRL__tr_enable__BITNR) | \
+ (R_SERIAL2_CTRL__auto_cts__##f13##__VAL(R_SERIAL2_CTRL_, auto_cts_, v13) << R_SERIAL2_CTRL__auto_cts__BITNR) | \
+ (R_SERIAL2_CTRL__stop_bits__##f14##__VAL(R_SERIAL2_CTRL_, stop_bits_, v14) << R_SERIAL2_CTRL__stop_bits__BITNR) | \
+ (R_SERIAL2_CTRL__tr_stick_par__##f15##__VAL(R_SERIAL2_CTRL_, tr_stick_par_, v15) << R_SERIAL2_CTRL__tr_stick_par__BITNR) | \
+ (R_SERIAL2_CTRL__tr_par__##f16##__VAL(R_SERIAL2_CTRL_, tr_par_, v16) << R_SERIAL2_CTRL__tr_par__BITNR) | \
+ (R_SERIAL2_CTRL__tr_par_en__##f17##__VAL(R_SERIAL2_CTRL_, tr_par_en_, v17) << R_SERIAL2_CTRL__tr_par_en__BITNR) | \
+ (R_SERIAL2_CTRL__tr_bitnr__##f18##__VAL(R_SERIAL2_CTRL_, tr_bitnr_, v18) << R_SERIAL2_CTRL__tr_bitnr__BITNR) | \
+ (R_SERIAL2_CTRL__data_out__##f19##__VAL(R_SERIAL2_CTRL_, data_out_, v19) << R_SERIAL2_CTRL__data_out__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL2_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL2_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL2_CTRL_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19) ( \
+ (R_SERIAL2_CTRL__tr_baud__##f1_##_VAL(R_SERIAL2_CTRL_, tr_baud_, v1) << R_SERIAL2_CTRL__tr_baud__BITNR) | \
+ (R_SERIAL2_CTRL__rec_baud__##f2_##_VAL(R_SERIAL2_CTRL_, rec_baud_, v2) << R_SERIAL2_CTRL__rec_baud__BITNR) | \
+ (R_SERIAL2_CTRL__dma_err__##f3_##_VAL(R_SERIAL2_CTRL_, dma_err_, v3) << R_SERIAL2_CTRL__dma_err__BITNR) | \
+ (R_SERIAL2_CTRL__rec_enable__##f4_##_VAL(R_SERIAL2_CTRL_, rec_enable_, v4) << R_SERIAL2_CTRL__rec_enable__BITNR) | \
+ (R_SERIAL2_CTRL__rts___##f5_##_VAL(R_SERIAL2_CTRL_, rts__, v5) << R_SERIAL2_CTRL__rts___BITNR) | \
+ (R_SERIAL2_CTRL__sampling__##f6_##_VAL(R_SERIAL2_CTRL_, sampling_, v6) << R_SERIAL2_CTRL__sampling__BITNR) | \
+ (R_SERIAL2_CTRL__rec_stick_par__##f7_##_VAL(R_SERIAL2_CTRL_, rec_stick_par_, v7) << R_SERIAL2_CTRL__rec_stick_par__BITNR) | \
+ (R_SERIAL2_CTRL__rec_par__##f8_##_VAL(R_SERIAL2_CTRL_, rec_par_, v8) << R_SERIAL2_CTRL__rec_par__BITNR) | \
+ (R_SERIAL2_CTRL__rec_par_en__##f9_##_VAL(R_SERIAL2_CTRL_, rec_par_en_, v9) << R_SERIAL2_CTRL__rec_par_en__BITNR) | \
+ (R_SERIAL2_CTRL__rec_bitnr__##f10_##_VAL(R_SERIAL2_CTRL_, rec_bitnr_, v10) << R_SERIAL2_CTRL__rec_bitnr__BITNR) | \
+ (R_SERIAL2_CTRL__txd__##f11_##_VAL(R_SERIAL2_CTRL_, txd_, v11) << R_SERIAL2_CTRL__txd__BITNR) | \
+ (R_SERIAL2_CTRL__tr_enable__##f12_##_VAL(R_SERIAL2_CTRL_, tr_enable_, v12) << R_SERIAL2_CTRL__tr_enable__BITNR) | \
+ (R_SERIAL2_CTRL__auto_cts__##f13_##_VAL(R_SERIAL2_CTRL_, auto_cts_, v13) << R_SERIAL2_CTRL__auto_cts__BITNR) | \
+ (R_SERIAL2_CTRL__stop_bits__##f14_##_VAL(R_SERIAL2_CTRL_, stop_bits_, v14) << R_SERIAL2_CTRL__stop_bits__BITNR) | \
+ (R_SERIAL2_CTRL__tr_stick_par__##f15_##_VAL(R_SERIAL2_CTRL_, tr_stick_par_, v15) << R_SERIAL2_CTRL__tr_stick_par__BITNR) | \
+ (R_SERIAL2_CTRL__tr_par__##f16_##_VAL(R_SERIAL2_CTRL_, tr_par_, v16) << R_SERIAL2_CTRL__tr_par__BITNR) | \
+ (R_SERIAL2_CTRL__tr_par_en__##f17_##_VAL(R_SERIAL2_CTRL_, tr_par_en_, v17) << R_SERIAL2_CTRL__tr_par_en__BITNR) | \
+ (R_SERIAL2_CTRL__tr_bitnr__##f18_##_VAL(R_SERIAL2_CTRL_, tr_bitnr_, v18) << R_SERIAL2_CTRL__tr_bitnr__BITNR) | \
+ (R_SERIAL2_CTRL__data_out__##f19_##_VAL(R_SERIAL2_CTRL_, data_out_, v19) << R_SERIAL2_CTRL__data_out__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL2_READ
+ * - type: RO
+ * - addr: 0xb0000070
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL2_READ
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL2_READ(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_SERIAL2_READ__xoff_detect__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL2_READ__cts___##f2##__MASK & REG__##v2) | \
+ (R_SERIAL2_READ__tr_ready__##f3##__MASK & REG__##v3) | \
+ (R_SERIAL2_READ__rxd__##f4##__MASK & REG__##v4) | \
+ (R_SERIAL2_READ__overrun__##f5##__MASK & REG__##v5) | \
+ (R_SERIAL2_READ__par_err__##f6##__MASK & REG__##v6) | \
+ (R_SERIAL2_READ__framing_err__##f7##__MASK & REG__##v7) | \
+ (R_SERIAL2_READ__data_avail__##f8##__MASK & REG__##v8) | \
+ (R_SERIAL2_READ__data_in__##f9##__MASK & REG__##v9) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL2_READ
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL2_READ.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL2_READ(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_SERIAL2_READ__xoff_detect__##f1##__VAL(R_SERIAL2_READ_, xoff_detect_, v1) << R_SERIAL2_READ__xoff_detect__BITNR) | \
+ (R_SERIAL2_READ__cts___##f2##__VAL(R_SERIAL2_READ_, cts__, v2) << R_SERIAL2_READ__cts___BITNR) | \
+ (R_SERIAL2_READ__tr_ready__##f3##__VAL(R_SERIAL2_READ_, tr_ready_, v3) << R_SERIAL2_READ__tr_ready__BITNR) | \
+ (R_SERIAL2_READ__rxd__##f4##__VAL(R_SERIAL2_READ_, rxd_, v4) << R_SERIAL2_READ__rxd__BITNR) | \
+ (R_SERIAL2_READ__overrun__##f5##__VAL(R_SERIAL2_READ_, overrun_, v5) << R_SERIAL2_READ__overrun__BITNR) | \
+ (R_SERIAL2_READ__par_err__##f6##__VAL(R_SERIAL2_READ_, par_err_, v6) << R_SERIAL2_READ__par_err__BITNR) | \
+ (R_SERIAL2_READ__framing_err__##f7##__VAL(R_SERIAL2_READ_, framing_err_, v7) << R_SERIAL2_READ__framing_err__BITNR) | \
+ (R_SERIAL2_READ__data_avail__##f8##__VAL(R_SERIAL2_READ_, data_avail_, v8) << R_SERIAL2_READ__data_avail__BITNR) | \
+ (R_SERIAL2_READ__data_in__##f9##__VAL(R_SERIAL2_READ_, data_in_, v9) << R_SERIAL2_READ__data_in__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL2_READ_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL2_READ.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL2_READ_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9) ( \
+ (R_SERIAL2_READ__xoff_detect__##f1_##_VAL(R_SERIAL2_READ_, xoff_detect_, v1) << R_SERIAL2_READ__xoff_detect__BITNR) | \
+ (R_SERIAL2_READ__cts___##f2_##_VAL(R_SERIAL2_READ_, cts__, v2) << R_SERIAL2_READ__cts___BITNR) | \
+ (R_SERIAL2_READ__tr_ready__##f3_##_VAL(R_SERIAL2_READ_, tr_ready_, v3) << R_SERIAL2_READ__tr_ready__BITNR) | \
+ (R_SERIAL2_READ__rxd__##f4_##_VAL(R_SERIAL2_READ_, rxd_, v4) << R_SERIAL2_READ__rxd__BITNR) | \
+ (R_SERIAL2_READ__overrun__##f5_##_VAL(R_SERIAL2_READ_, overrun_, v5) << R_SERIAL2_READ__overrun__BITNR) | \
+ (R_SERIAL2_READ__par_err__##f6_##_VAL(R_SERIAL2_READ_, par_err_, v6) << R_SERIAL2_READ__par_err__BITNR) | \
+ (R_SERIAL2_READ__framing_err__##f7_##_VAL(R_SERIAL2_READ_, framing_err_, v7) << R_SERIAL2_READ__framing_err__BITNR) | \
+ (R_SERIAL2_READ__data_avail__##f8_##_VAL(R_SERIAL2_READ_, data_avail_, v8) << R_SERIAL2_READ__data_avail__BITNR) | \
+ (R_SERIAL2_READ__data_in__##f9_##_VAL(R_SERIAL2_READ_, data_in_, v9) << R_SERIAL2_READ__data_in__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL2_REC_CTRL
+ * - type: WO
+ * - addr: 0xb0000072
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL2_REC_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL2_REC_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL2_REC_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL2_REC_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_SERIAL2_REC_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL2_REC_CTRL_) \
+ REG_VAL__R_SERIAL2_REC_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ), \
+ R_SERIAL2_REC_CTRL__WRITE(R_SERIAL2_REC_CTRL__ADDR, *R_SERIAL2_REC_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL2_REC_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL2_REC_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL2_REC_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL2_REC_CTRL__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_SERIAL2_REC_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL2_REC_CTRL_) \
+ REG_VAL__R_SERIAL2_REC_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL2_REC_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL2_REC_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL2_REC_CTRL__dma_err__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL2_REC_CTRL__rec_enable__##f2##__MASK & REG__##v2) | \
+ (R_SERIAL2_REC_CTRL__rts___##f3##__MASK & REG__##v3) | \
+ (R_SERIAL2_REC_CTRL__sampling__##f4##__MASK & REG__##v4) | \
+ (R_SERIAL2_REC_CTRL__rec_stick_par__##f5##__MASK & REG__##v5) | \
+ (R_SERIAL2_REC_CTRL__rec_par__##f6##__MASK & REG__##v6) | \
+ (R_SERIAL2_REC_CTRL__rec_par_en__##f7##__MASK & REG__##v7) | \
+ (R_SERIAL2_REC_CTRL__rec_bitnr__##f8##__MASK & REG__##v8) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL2_REC_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL2_REC_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL2_REC_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL2_REC_CTRL__dma_err__##f1##__VAL(R_SERIAL2_REC_CTRL_, dma_err_, v1) << R_SERIAL2_REC_CTRL__dma_err__BITNR) | \
+ (R_SERIAL2_REC_CTRL__rec_enable__##f2##__VAL(R_SERIAL2_REC_CTRL_, rec_enable_, v2) << R_SERIAL2_REC_CTRL__rec_enable__BITNR) | \
+ (R_SERIAL2_REC_CTRL__rts___##f3##__VAL(R_SERIAL2_REC_CTRL_, rts__, v3) << R_SERIAL2_REC_CTRL__rts___BITNR) | \
+ (R_SERIAL2_REC_CTRL__sampling__##f4##__VAL(R_SERIAL2_REC_CTRL_, sampling_, v4) << R_SERIAL2_REC_CTRL__sampling__BITNR) | \
+ (R_SERIAL2_REC_CTRL__rec_stick_par__##f5##__VAL(R_SERIAL2_REC_CTRL_, rec_stick_par_, v5) << R_SERIAL2_REC_CTRL__rec_stick_par__BITNR) | \
+ (R_SERIAL2_REC_CTRL__rec_par__##f6##__VAL(R_SERIAL2_REC_CTRL_, rec_par_, v6) << R_SERIAL2_REC_CTRL__rec_par__BITNR) | \
+ (R_SERIAL2_REC_CTRL__rec_par_en__##f7##__VAL(R_SERIAL2_REC_CTRL_, rec_par_en_, v7) << R_SERIAL2_REC_CTRL__rec_par_en__BITNR) | \
+ (R_SERIAL2_REC_CTRL__rec_bitnr__##f8##__VAL(R_SERIAL2_REC_CTRL_, rec_bitnr_, v8) << R_SERIAL2_REC_CTRL__rec_bitnr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL2_REC_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL2_REC_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL2_REC_CTRL_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8) ( \
+ (R_SERIAL2_REC_CTRL__dma_err__##f1_##_VAL(R_SERIAL2_REC_CTRL_, dma_err_, v1) << R_SERIAL2_REC_CTRL__dma_err__BITNR) | \
+ (R_SERIAL2_REC_CTRL__rec_enable__##f2_##_VAL(R_SERIAL2_REC_CTRL_, rec_enable_, v2) << R_SERIAL2_REC_CTRL__rec_enable__BITNR) | \
+ (R_SERIAL2_REC_CTRL__rts___##f3_##_VAL(R_SERIAL2_REC_CTRL_, rts__, v3) << R_SERIAL2_REC_CTRL__rts___BITNR) | \
+ (R_SERIAL2_REC_CTRL__sampling__##f4_##_VAL(R_SERIAL2_REC_CTRL_, sampling_, v4) << R_SERIAL2_REC_CTRL__sampling__BITNR) | \
+ (R_SERIAL2_REC_CTRL__rec_stick_par__##f5_##_VAL(R_SERIAL2_REC_CTRL_, rec_stick_par_, v5) << R_SERIAL2_REC_CTRL__rec_stick_par__BITNR) | \
+ (R_SERIAL2_REC_CTRL__rec_par__##f6_##_VAL(R_SERIAL2_REC_CTRL_, rec_par_, v6) << R_SERIAL2_REC_CTRL__rec_par__BITNR) | \
+ (R_SERIAL2_REC_CTRL__rec_par_en__##f7_##_VAL(R_SERIAL2_REC_CTRL_, rec_par_en_, v7) << R_SERIAL2_REC_CTRL__rec_par_en__BITNR) | \
+ (R_SERIAL2_REC_CTRL__rec_bitnr__##f8_##_VAL(R_SERIAL2_REC_CTRL_, rec_bitnr_, v8) << R_SERIAL2_REC_CTRL__rec_bitnr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL2_REC_DATA
+ * - type: RO
+ * - addr: 0xb0000070
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL2_REC_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL2_REC_DATA(f1,v1) ( \
+ (R_SERIAL2_REC_DATA__data_in__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL2_REC_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL2_REC_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL2_REC_DATA(f1,v1) ( \
+ (R_SERIAL2_REC_DATA__data_in__##f1##__VAL(R_SERIAL2_REC_DATA_, data_in_, v1) << R_SERIAL2_REC_DATA__data_in__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL2_REC_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL2_REC_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL2_REC_DATA_(f1_,v1) ( \
+ (R_SERIAL2_REC_DATA__data_in__##f1_##_VAL(R_SERIAL2_REC_DATA_, data_in_, v1) << R_SERIAL2_REC_DATA__data_in__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL2_STATUS
+ * - type: RO
+ * - addr: 0xb0000071
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL2_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL2_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL2_STATUS__xoff_detect__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL2_STATUS__cts___##f2##__MASK & REG__##v2) | \
+ (R_SERIAL2_STATUS__tr_ready__##f3##__MASK & REG__##v3) | \
+ (R_SERIAL2_STATUS__rxd__##f4##__MASK & REG__##v4) | \
+ (R_SERIAL2_STATUS__overrun__##f5##__MASK & REG__##v5) | \
+ (R_SERIAL2_STATUS__par_err__##f6##__MASK & REG__##v6) | \
+ (R_SERIAL2_STATUS__framing_err__##f7##__MASK & REG__##v7) | \
+ (R_SERIAL2_STATUS__data_avail__##f8##__MASK & REG__##v8) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL2_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL2_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL2_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL2_STATUS__xoff_detect__##f1##__VAL(R_SERIAL2_STATUS_, xoff_detect_, v1) << R_SERIAL2_STATUS__xoff_detect__BITNR) | \
+ (R_SERIAL2_STATUS__cts___##f2##__VAL(R_SERIAL2_STATUS_, cts__, v2) << R_SERIAL2_STATUS__cts___BITNR) | \
+ (R_SERIAL2_STATUS__tr_ready__##f3##__VAL(R_SERIAL2_STATUS_, tr_ready_, v3) << R_SERIAL2_STATUS__tr_ready__BITNR) | \
+ (R_SERIAL2_STATUS__rxd__##f4##__VAL(R_SERIAL2_STATUS_, rxd_, v4) << R_SERIAL2_STATUS__rxd__BITNR) | \
+ (R_SERIAL2_STATUS__overrun__##f5##__VAL(R_SERIAL2_STATUS_, overrun_, v5) << R_SERIAL2_STATUS__overrun__BITNR) | \
+ (R_SERIAL2_STATUS__par_err__##f6##__VAL(R_SERIAL2_STATUS_, par_err_, v6) << R_SERIAL2_STATUS__par_err__BITNR) | \
+ (R_SERIAL2_STATUS__framing_err__##f7##__VAL(R_SERIAL2_STATUS_, framing_err_, v7) << R_SERIAL2_STATUS__framing_err__BITNR) | \
+ (R_SERIAL2_STATUS__data_avail__##f8##__VAL(R_SERIAL2_STATUS_, data_avail_, v8) << R_SERIAL2_STATUS__data_avail__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL2_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL2_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL2_STATUS_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8) ( \
+ (R_SERIAL2_STATUS__xoff_detect__##f1_##_VAL(R_SERIAL2_STATUS_, xoff_detect_, v1) << R_SERIAL2_STATUS__xoff_detect__BITNR) | \
+ (R_SERIAL2_STATUS__cts___##f2_##_VAL(R_SERIAL2_STATUS_, cts__, v2) << R_SERIAL2_STATUS__cts___BITNR) | \
+ (R_SERIAL2_STATUS__tr_ready__##f3_##_VAL(R_SERIAL2_STATUS_, tr_ready_, v3) << R_SERIAL2_STATUS__tr_ready__BITNR) | \
+ (R_SERIAL2_STATUS__rxd__##f4_##_VAL(R_SERIAL2_STATUS_, rxd_, v4) << R_SERIAL2_STATUS__rxd__BITNR) | \
+ (R_SERIAL2_STATUS__overrun__##f5_##_VAL(R_SERIAL2_STATUS_, overrun_, v5) << R_SERIAL2_STATUS__overrun__BITNR) | \
+ (R_SERIAL2_STATUS__par_err__##f6_##_VAL(R_SERIAL2_STATUS_, par_err_, v6) << R_SERIAL2_STATUS__par_err__BITNR) | \
+ (R_SERIAL2_STATUS__framing_err__##f7_##_VAL(R_SERIAL2_STATUS_, framing_err_, v7) << R_SERIAL2_STATUS__framing_err__BITNR) | \
+ (R_SERIAL2_STATUS__data_avail__##f8_##_VAL(R_SERIAL2_STATUS_, data_avail_, v8) << R_SERIAL2_STATUS__data_avail__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL2_TR_CTRL
+ * - type: WO
+ * - addr: 0xb0000071
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL2_TR_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL2_TR_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL2_TR_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL2_TR_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_SERIAL2_TR_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL2_TR_CTRL_) \
+ REG_VAL__R_SERIAL2_TR_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ), \
+ R_SERIAL2_TR_CTRL__WRITE(R_SERIAL2_TR_CTRL__ADDR, *R_SERIAL2_TR_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL2_TR_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL2_TR_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL2_TR_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL2_TR_CTRL__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_SERIAL2_TR_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL2_TR_CTRL_) \
+ REG_VAL__R_SERIAL2_TR_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL2_TR_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL2_TR_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL2_TR_CTRL__txd__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL2_TR_CTRL__tr_enable__##f2##__MASK & REG__##v2) | \
+ (R_SERIAL2_TR_CTRL__auto_cts__##f3##__MASK & REG__##v3) | \
+ (R_SERIAL2_TR_CTRL__stop_bits__##f4##__MASK & REG__##v4) | \
+ (R_SERIAL2_TR_CTRL__tr_stick_par__##f5##__MASK & REG__##v5) | \
+ (R_SERIAL2_TR_CTRL__tr_par__##f6##__MASK & REG__##v6) | \
+ (R_SERIAL2_TR_CTRL__tr_par_en__##f7##__MASK & REG__##v7) | \
+ (R_SERIAL2_TR_CTRL__tr_bitnr__##f8##__MASK & REG__##v8) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL2_TR_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL2_TR_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL2_TR_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL2_TR_CTRL__txd__##f1##__VAL(R_SERIAL2_TR_CTRL_, txd_, v1) << R_SERIAL2_TR_CTRL__txd__BITNR) | \
+ (R_SERIAL2_TR_CTRL__tr_enable__##f2##__VAL(R_SERIAL2_TR_CTRL_, tr_enable_, v2) << R_SERIAL2_TR_CTRL__tr_enable__BITNR) | \
+ (R_SERIAL2_TR_CTRL__auto_cts__##f3##__VAL(R_SERIAL2_TR_CTRL_, auto_cts_, v3) << R_SERIAL2_TR_CTRL__auto_cts__BITNR) | \
+ (R_SERIAL2_TR_CTRL__stop_bits__##f4##__VAL(R_SERIAL2_TR_CTRL_, stop_bits_, v4) << R_SERIAL2_TR_CTRL__stop_bits__BITNR) | \
+ (R_SERIAL2_TR_CTRL__tr_stick_par__##f5##__VAL(R_SERIAL2_TR_CTRL_, tr_stick_par_, v5) << R_SERIAL2_TR_CTRL__tr_stick_par__BITNR) | \
+ (R_SERIAL2_TR_CTRL__tr_par__##f6##__VAL(R_SERIAL2_TR_CTRL_, tr_par_, v6) << R_SERIAL2_TR_CTRL__tr_par__BITNR) | \
+ (R_SERIAL2_TR_CTRL__tr_par_en__##f7##__VAL(R_SERIAL2_TR_CTRL_, tr_par_en_, v7) << R_SERIAL2_TR_CTRL__tr_par_en__BITNR) | \
+ (R_SERIAL2_TR_CTRL__tr_bitnr__##f8##__VAL(R_SERIAL2_TR_CTRL_, tr_bitnr_, v8) << R_SERIAL2_TR_CTRL__tr_bitnr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL2_TR_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL2_TR_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL2_TR_CTRL_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8) ( \
+ (R_SERIAL2_TR_CTRL__txd__##f1_##_VAL(R_SERIAL2_TR_CTRL_, txd_, v1) << R_SERIAL2_TR_CTRL__txd__BITNR) | \
+ (R_SERIAL2_TR_CTRL__tr_enable__##f2_##_VAL(R_SERIAL2_TR_CTRL_, tr_enable_, v2) << R_SERIAL2_TR_CTRL__tr_enable__BITNR) | \
+ (R_SERIAL2_TR_CTRL__auto_cts__##f3_##_VAL(R_SERIAL2_TR_CTRL_, auto_cts_, v3) << R_SERIAL2_TR_CTRL__auto_cts__BITNR) | \
+ (R_SERIAL2_TR_CTRL__stop_bits__##f4_##_VAL(R_SERIAL2_TR_CTRL_, stop_bits_, v4) << R_SERIAL2_TR_CTRL__stop_bits__BITNR) | \
+ (R_SERIAL2_TR_CTRL__tr_stick_par__##f5_##_VAL(R_SERIAL2_TR_CTRL_, tr_stick_par_, v5) << R_SERIAL2_TR_CTRL__tr_stick_par__BITNR) | \
+ (R_SERIAL2_TR_CTRL__tr_par__##f6_##_VAL(R_SERIAL2_TR_CTRL_, tr_par_, v6) << R_SERIAL2_TR_CTRL__tr_par__BITNR) | \
+ (R_SERIAL2_TR_CTRL__tr_par_en__##f7_##_VAL(R_SERIAL2_TR_CTRL_, tr_par_en_, v7) << R_SERIAL2_TR_CTRL__tr_par_en__BITNR) | \
+ (R_SERIAL2_TR_CTRL__tr_bitnr__##f8_##_VAL(R_SERIAL2_TR_CTRL_, tr_bitnr_, v8) << R_SERIAL2_TR_CTRL__tr_bitnr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL2_TR_DATA
+ * - type: WO
+ * - addr: 0xb0000070
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL2_TR_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL2_TR_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL2_TR_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL2_TR_DATA(f1,v1) ( \
+ *R_SERIAL2_TR_DATA__SADDR = ( \
+ REG_INITIATED(R_SERIAL2_TR_DATA_) \
+ REG_VAL__R_SERIAL2_TR_DATA_(f1##_,v1) \
+ ), \
+ R_SERIAL2_TR_DATA__WRITE(R_SERIAL2_TR_DATA__ADDR, *R_SERIAL2_TR_DATA__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL2_TR_DATA__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL2_TR_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL2_TR_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL2_TR_DATA__SHADOW(f1,v1) ( \
+ *R_SERIAL2_TR_DATA__SADDR = ( \
+ REG_INITIATED(R_SERIAL2_TR_DATA_) \
+ REG_VAL__R_SERIAL2_TR_DATA_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL2_TR_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL2_TR_DATA(f1,v1) ( \
+ (R_SERIAL2_TR_DATA__data_out__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL2_TR_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL2_TR_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL2_TR_DATA(f1,v1) ( \
+ (R_SERIAL2_TR_DATA__data_out__##f1##__VAL(R_SERIAL2_TR_DATA_, data_out_, v1) << R_SERIAL2_TR_DATA__data_out__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL2_TR_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL2_TR_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL2_TR_DATA_(f1_,v1) ( \
+ (R_SERIAL2_TR_DATA__data_out__##f1_##_VAL(R_SERIAL2_TR_DATA_, data_out_, v1) << R_SERIAL2_TR_DATA__data_out__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL2_XOFF
+ * - type: WO
+ * - addr: 0xb0000074
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL2_XOFF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL2_XOFF.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL2_XOFF.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL2_XOFF(f1,v1,f2,v2,f3,v3) ( \
+ *R_SERIAL2_XOFF__SADDR = ( \
+ REG_INITIATED(R_SERIAL2_XOFF_) \
+ REG_VAL__R_SERIAL2_XOFF_(f1##_,v1,f2##_,v2,f3##_,v3) \
+ ), \
+ R_SERIAL2_XOFF__WRITE(R_SERIAL2_XOFF__ADDR, *R_SERIAL2_XOFF__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL2_XOFF__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL2_XOFF.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL2_XOFF.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL2_XOFF__SHADOW(f1,v1,f2,v2,f3,v3) ( \
+ *R_SERIAL2_XOFF__SADDR = ( \
+ REG_INITIATED(R_SERIAL2_XOFF_) \
+ REG_VAL__R_SERIAL2_XOFF_(f1##_,v1,f2##_,v2,f3##_,v3) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL2_XOFF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL2_XOFF(f1,v1,f2,v2,f3,v3) ( \
+ (R_SERIAL2_XOFF__tx_stop__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL2_XOFF__auto_xoff__##f2##__MASK & REG__##v2) | \
+ (R_SERIAL2_XOFF__xoff_char__##f3##__MASK & REG__##v3) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL2_XOFF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL2_XOFF.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL2_XOFF(f1,v1,f2,v2,f3,v3) ( \
+ (R_SERIAL2_XOFF__tx_stop__##f1##__VAL(R_SERIAL2_XOFF_, tx_stop_, v1) << R_SERIAL2_XOFF__tx_stop__BITNR) | \
+ (R_SERIAL2_XOFF__auto_xoff__##f2##__VAL(R_SERIAL2_XOFF_, auto_xoff_, v2) << R_SERIAL2_XOFF__auto_xoff__BITNR) | \
+ (R_SERIAL2_XOFF__xoff_char__##f3##__VAL(R_SERIAL2_XOFF_, xoff_char_, v3) << R_SERIAL2_XOFF__xoff_char__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL2_XOFF_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL2_XOFF.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL2_XOFF_(f1_,v1,f2_,v2,f3_,v3) ( \
+ (R_SERIAL2_XOFF__tx_stop__##f1_##_VAL(R_SERIAL2_XOFF_, tx_stop_, v1) << R_SERIAL2_XOFF__tx_stop__BITNR) | \
+ (R_SERIAL2_XOFF__auto_xoff__##f2_##_VAL(R_SERIAL2_XOFF_, auto_xoff_, v2) << R_SERIAL2_XOFF__auto_xoff__BITNR) | \
+ (R_SERIAL2_XOFF__xoff_char__##f3_##_VAL(R_SERIAL2_XOFF_, xoff_char_, v3) << R_SERIAL2_XOFF__xoff_char__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL3_BAUD
+ * - type: WO
+ * - addr: 0xb000007b
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL3_BAUD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL3_BAUD.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL3_BAUD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL3_BAUD(f1,v1,f2,v2) ( \
+ *R_SERIAL3_BAUD__SADDR = ( \
+ REG_INITIATED(R_SERIAL3_BAUD_) \
+ REG_VAL__R_SERIAL3_BAUD_(f1##_,v1,f2##_,v2) \
+ ), \
+ R_SERIAL3_BAUD__WRITE(R_SERIAL3_BAUD__ADDR, *R_SERIAL3_BAUD__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL3_BAUD__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL3_BAUD.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL3_BAUD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL3_BAUD__SHADOW(f1,v1,f2,v2) ( \
+ *R_SERIAL3_BAUD__SADDR = ( \
+ REG_INITIATED(R_SERIAL3_BAUD_) \
+ REG_VAL__R_SERIAL3_BAUD_(f1##_,v1,f2##_,v2) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL3_BAUD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL3_BAUD(f1,v1,f2,v2) ( \
+ (R_SERIAL3_BAUD__tr_baud__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL3_BAUD__rec_baud__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL3_BAUD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL3_BAUD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL3_BAUD(f1,v1,f2,v2) ( \
+ (R_SERIAL3_BAUD__tr_baud__##f1##__VAL(R_SERIAL3_BAUD_, tr_baud_, v1) << R_SERIAL3_BAUD__tr_baud__BITNR) | \
+ (R_SERIAL3_BAUD__rec_baud__##f2##__VAL(R_SERIAL3_BAUD_, rec_baud_, v2) << R_SERIAL3_BAUD__rec_baud__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL3_BAUD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL3_BAUD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL3_BAUD_(f1_,v1,f2_,v2) ( \
+ (R_SERIAL3_BAUD__tr_baud__##f1_##_VAL(R_SERIAL3_BAUD_, tr_baud_, v1) << R_SERIAL3_BAUD__tr_baud__BITNR) | \
+ (R_SERIAL3_BAUD__rec_baud__##f2_##_VAL(R_SERIAL3_BAUD_, rec_baud_, v2) << R_SERIAL3_BAUD__rec_baud__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL3_CTRL
+ * - type: WO
+ * - addr: 0xb0000078
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL3_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL3_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL3_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL3_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19) ( \
+ *R_SERIAL3_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL3_CTRL_) \
+ REG_VAL__R_SERIAL3_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19) \
+ ), \
+ R_SERIAL3_CTRL__WRITE(R_SERIAL3_CTRL__ADDR, *R_SERIAL3_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL3_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL3_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL3_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL3_CTRL__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19) ( \
+ *R_SERIAL3_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL3_CTRL_) \
+ REG_VAL__R_SERIAL3_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL3_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL3_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19) ( \
+ (R_SERIAL3_CTRL__tr_baud__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL3_CTRL__rec_baud__##f2##__MASK & REG__##v2) | \
+ (R_SERIAL3_CTRL__dma_err__##f3##__MASK & REG__##v3) | \
+ (R_SERIAL3_CTRL__rec_enable__##f4##__MASK & REG__##v4) | \
+ (R_SERIAL3_CTRL__rts___##f5##__MASK & REG__##v5) | \
+ (R_SERIAL3_CTRL__sampling__##f6##__MASK & REG__##v6) | \
+ (R_SERIAL3_CTRL__rec_stick_par__##f7##__MASK & REG__##v7) | \
+ (R_SERIAL3_CTRL__rec_par__##f8##__MASK & REG__##v8) | \
+ (R_SERIAL3_CTRL__rec_par_en__##f9##__MASK & REG__##v9) | \
+ (R_SERIAL3_CTRL__rec_bitnr__##f10##__MASK & REG__##v10) | \
+ (R_SERIAL3_CTRL__txd__##f11##__MASK & REG__##v11) | \
+ (R_SERIAL3_CTRL__tr_enable__##f12##__MASK & REG__##v12) | \
+ (R_SERIAL3_CTRL__auto_cts__##f13##__MASK & REG__##v13) | \
+ (R_SERIAL3_CTRL__stop_bits__##f14##__MASK & REG__##v14) | \
+ (R_SERIAL3_CTRL__tr_stick_par__##f15##__MASK & REG__##v15) | \
+ (R_SERIAL3_CTRL__tr_par__##f16##__MASK & REG__##v16) | \
+ (R_SERIAL3_CTRL__tr_par_en__##f17##__MASK & REG__##v17) | \
+ (R_SERIAL3_CTRL__tr_bitnr__##f18##__MASK & REG__##v18) | \
+ (R_SERIAL3_CTRL__data_out__##f19##__MASK & REG__##v19) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL3_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL3_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL3_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19) ( \
+ (R_SERIAL3_CTRL__tr_baud__##f1##__VAL(R_SERIAL3_CTRL_, tr_baud_, v1) << R_SERIAL3_CTRL__tr_baud__BITNR) | \
+ (R_SERIAL3_CTRL__rec_baud__##f2##__VAL(R_SERIAL3_CTRL_, rec_baud_, v2) << R_SERIAL3_CTRL__rec_baud__BITNR) | \
+ (R_SERIAL3_CTRL__dma_err__##f3##__VAL(R_SERIAL3_CTRL_, dma_err_, v3) << R_SERIAL3_CTRL__dma_err__BITNR) | \
+ (R_SERIAL3_CTRL__rec_enable__##f4##__VAL(R_SERIAL3_CTRL_, rec_enable_, v4) << R_SERIAL3_CTRL__rec_enable__BITNR) | \
+ (R_SERIAL3_CTRL__rts___##f5##__VAL(R_SERIAL3_CTRL_, rts__, v5) << R_SERIAL3_CTRL__rts___BITNR) | \
+ (R_SERIAL3_CTRL__sampling__##f6##__VAL(R_SERIAL3_CTRL_, sampling_, v6) << R_SERIAL3_CTRL__sampling__BITNR) | \
+ (R_SERIAL3_CTRL__rec_stick_par__##f7##__VAL(R_SERIAL3_CTRL_, rec_stick_par_, v7) << R_SERIAL3_CTRL__rec_stick_par__BITNR) | \
+ (R_SERIAL3_CTRL__rec_par__##f8##__VAL(R_SERIAL3_CTRL_, rec_par_, v8) << R_SERIAL3_CTRL__rec_par__BITNR) | \
+ (R_SERIAL3_CTRL__rec_par_en__##f9##__VAL(R_SERIAL3_CTRL_, rec_par_en_, v9) << R_SERIAL3_CTRL__rec_par_en__BITNR) | \
+ (R_SERIAL3_CTRL__rec_bitnr__##f10##__VAL(R_SERIAL3_CTRL_, rec_bitnr_, v10) << R_SERIAL3_CTRL__rec_bitnr__BITNR) | \
+ (R_SERIAL3_CTRL__txd__##f11##__VAL(R_SERIAL3_CTRL_, txd_, v11) << R_SERIAL3_CTRL__txd__BITNR) | \
+ (R_SERIAL3_CTRL__tr_enable__##f12##__VAL(R_SERIAL3_CTRL_, tr_enable_, v12) << R_SERIAL3_CTRL__tr_enable__BITNR) | \
+ (R_SERIAL3_CTRL__auto_cts__##f13##__VAL(R_SERIAL3_CTRL_, auto_cts_, v13) << R_SERIAL3_CTRL__auto_cts__BITNR) | \
+ (R_SERIAL3_CTRL__stop_bits__##f14##__VAL(R_SERIAL3_CTRL_, stop_bits_, v14) << R_SERIAL3_CTRL__stop_bits__BITNR) | \
+ (R_SERIAL3_CTRL__tr_stick_par__##f15##__VAL(R_SERIAL3_CTRL_, tr_stick_par_, v15) << R_SERIAL3_CTRL__tr_stick_par__BITNR) | \
+ (R_SERIAL3_CTRL__tr_par__##f16##__VAL(R_SERIAL3_CTRL_, tr_par_, v16) << R_SERIAL3_CTRL__tr_par__BITNR) | \
+ (R_SERIAL3_CTRL__tr_par_en__##f17##__VAL(R_SERIAL3_CTRL_, tr_par_en_, v17) << R_SERIAL3_CTRL__tr_par_en__BITNR) | \
+ (R_SERIAL3_CTRL__tr_bitnr__##f18##__VAL(R_SERIAL3_CTRL_, tr_bitnr_, v18) << R_SERIAL3_CTRL__tr_bitnr__BITNR) | \
+ (R_SERIAL3_CTRL__data_out__##f19##__VAL(R_SERIAL3_CTRL_, data_out_, v19) << R_SERIAL3_CTRL__data_out__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL3_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL3_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL3_CTRL_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19) ( \
+ (R_SERIAL3_CTRL__tr_baud__##f1_##_VAL(R_SERIAL3_CTRL_, tr_baud_, v1) << R_SERIAL3_CTRL__tr_baud__BITNR) | \
+ (R_SERIAL3_CTRL__rec_baud__##f2_##_VAL(R_SERIAL3_CTRL_, rec_baud_, v2) << R_SERIAL3_CTRL__rec_baud__BITNR) | \
+ (R_SERIAL3_CTRL__dma_err__##f3_##_VAL(R_SERIAL3_CTRL_, dma_err_, v3) << R_SERIAL3_CTRL__dma_err__BITNR) | \
+ (R_SERIAL3_CTRL__rec_enable__##f4_##_VAL(R_SERIAL3_CTRL_, rec_enable_, v4) << R_SERIAL3_CTRL__rec_enable__BITNR) | \
+ (R_SERIAL3_CTRL__rts___##f5_##_VAL(R_SERIAL3_CTRL_, rts__, v5) << R_SERIAL3_CTRL__rts___BITNR) | \
+ (R_SERIAL3_CTRL__sampling__##f6_##_VAL(R_SERIAL3_CTRL_, sampling_, v6) << R_SERIAL3_CTRL__sampling__BITNR) | \
+ (R_SERIAL3_CTRL__rec_stick_par__##f7_##_VAL(R_SERIAL3_CTRL_, rec_stick_par_, v7) << R_SERIAL3_CTRL__rec_stick_par__BITNR) | \
+ (R_SERIAL3_CTRL__rec_par__##f8_##_VAL(R_SERIAL3_CTRL_, rec_par_, v8) << R_SERIAL3_CTRL__rec_par__BITNR) | \
+ (R_SERIAL3_CTRL__rec_par_en__##f9_##_VAL(R_SERIAL3_CTRL_, rec_par_en_, v9) << R_SERIAL3_CTRL__rec_par_en__BITNR) | \
+ (R_SERIAL3_CTRL__rec_bitnr__##f10_##_VAL(R_SERIAL3_CTRL_, rec_bitnr_, v10) << R_SERIAL3_CTRL__rec_bitnr__BITNR) | \
+ (R_SERIAL3_CTRL__txd__##f11_##_VAL(R_SERIAL3_CTRL_, txd_, v11) << R_SERIAL3_CTRL__txd__BITNR) | \
+ (R_SERIAL3_CTRL__tr_enable__##f12_##_VAL(R_SERIAL3_CTRL_, tr_enable_, v12) << R_SERIAL3_CTRL__tr_enable__BITNR) | \
+ (R_SERIAL3_CTRL__auto_cts__##f13_##_VAL(R_SERIAL3_CTRL_, auto_cts_, v13) << R_SERIAL3_CTRL__auto_cts__BITNR) | \
+ (R_SERIAL3_CTRL__stop_bits__##f14_##_VAL(R_SERIAL3_CTRL_, stop_bits_, v14) << R_SERIAL3_CTRL__stop_bits__BITNR) | \
+ (R_SERIAL3_CTRL__tr_stick_par__##f15_##_VAL(R_SERIAL3_CTRL_, tr_stick_par_, v15) << R_SERIAL3_CTRL__tr_stick_par__BITNR) | \
+ (R_SERIAL3_CTRL__tr_par__##f16_##_VAL(R_SERIAL3_CTRL_, tr_par_, v16) << R_SERIAL3_CTRL__tr_par__BITNR) | \
+ (R_SERIAL3_CTRL__tr_par_en__##f17_##_VAL(R_SERIAL3_CTRL_, tr_par_en_, v17) << R_SERIAL3_CTRL__tr_par_en__BITNR) | \
+ (R_SERIAL3_CTRL__tr_bitnr__##f18_##_VAL(R_SERIAL3_CTRL_, tr_bitnr_, v18) << R_SERIAL3_CTRL__tr_bitnr__BITNR) | \
+ (R_SERIAL3_CTRL__data_out__##f19_##_VAL(R_SERIAL3_CTRL_, data_out_, v19) << R_SERIAL3_CTRL__data_out__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL3_READ
+ * - type: RO
+ * - addr: 0xb0000078
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL3_READ
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL3_READ(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_SERIAL3_READ__xoff_detect__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL3_READ__cts___##f2##__MASK & REG__##v2) | \
+ (R_SERIAL3_READ__tr_ready__##f3##__MASK & REG__##v3) | \
+ (R_SERIAL3_READ__rxd__##f4##__MASK & REG__##v4) | \
+ (R_SERIAL3_READ__overrun__##f5##__MASK & REG__##v5) | \
+ (R_SERIAL3_READ__par_err__##f6##__MASK & REG__##v6) | \
+ (R_SERIAL3_READ__framing_err__##f7##__MASK & REG__##v7) | \
+ (R_SERIAL3_READ__data_avail__##f8##__MASK & REG__##v8) | \
+ (R_SERIAL3_READ__data_in__##f9##__MASK & REG__##v9) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL3_READ
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL3_READ.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL3_READ(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_SERIAL3_READ__xoff_detect__##f1##__VAL(R_SERIAL3_READ_, xoff_detect_, v1) << R_SERIAL3_READ__xoff_detect__BITNR) | \
+ (R_SERIAL3_READ__cts___##f2##__VAL(R_SERIAL3_READ_, cts__, v2) << R_SERIAL3_READ__cts___BITNR) | \
+ (R_SERIAL3_READ__tr_ready__##f3##__VAL(R_SERIAL3_READ_, tr_ready_, v3) << R_SERIAL3_READ__tr_ready__BITNR) | \
+ (R_SERIAL3_READ__rxd__##f4##__VAL(R_SERIAL3_READ_, rxd_, v4) << R_SERIAL3_READ__rxd__BITNR) | \
+ (R_SERIAL3_READ__overrun__##f5##__VAL(R_SERIAL3_READ_, overrun_, v5) << R_SERIAL3_READ__overrun__BITNR) | \
+ (R_SERIAL3_READ__par_err__##f6##__VAL(R_SERIAL3_READ_, par_err_, v6) << R_SERIAL3_READ__par_err__BITNR) | \
+ (R_SERIAL3_READ__framing_err__##f7##__VAL(R_SERIAL3_READ_, framing_err_, v7) << R_SERIAL3_READ__framing_err__BITNR) | \
+ (R_SERIAL3_READ__data_avail__##f8##__VAL(R_SERIAL3_READ_, data_avail_, v8) << R_SERIAL3_READ__data_avail__BITNR) | \
+ (R_SERIAL3_READ__data_in__##f9##__VAL(R_SERIAL3_READ_, data_in_, v9) << R_SERIAL3_READ__data_in__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL3_READ_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL3_READ.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL3_READ_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9) ( \
+ (R_SERIAL3_READ__xoff_detect__##f1_##_VAL(R_SERIAL3_READ_, xoff_detect_, v1) << R_SERIAL3_READ__xoff_detect__BITNR) | \
+ (R_SERIAL3_READ__cts___##f2_##_VAL(R_SERIAL3_READ_, cts__, v2) << R_SERIAL3_READ__cts___BITNR) | \
+ (R_SERIAL3_READ__tr_ready__##f3_##_VAL(R_SERIAL3_READ_, tr_ready_, v3) << R_SERIAL3_READ__tr_ready__BITNR) | \
+ (R_SERIAL3_READ__rxd__##f4_##_VAL(R_SERIAL3_READ_, rxd_, v4) << R_SERIAL3_READ__rxd__BITNR) | \
+ (R_SERIAL3_READ__overrun__##f5_##_VAL(R_SERIAL3_READ_, overrun_, v5) << R_SERIAL3_READ__overrun__BITNR) | \
+ (R_SERIAL3_READ__par_err__##f6_##_VAL(R_SERIAL3_READ_, par_err_, v6) << R_SERIAL3_READ__par_err__BITNR) | \
+ (R_SERIAL3_READ__framing_err__##f7_##_VAL(R_SERIAL3_READ_, framing_err_, v7) << R_SERIAL3_READ__framing_err__BITNR) | \
+ (R_SERIAL3_READ__data_avail__##f8_##_VAL(R_SERIAL3_READ_, data_avail_, v8) << R_SERIAL3_READ__data_avail__BITNR) | \
+ (R_SERIAL3_READ__data_in__##f9_##_VAL(R_SERIAL3_READ_, data_in_, v9) << R_SERIAL3_READ__data_in__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL3_REC_CTRL
+ * - type: WO
+ * - addr: 0xb000007a
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL3_REC_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL3_REC_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL3_REC_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL3_REC_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_SERIAL3_REC_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL3_REC_CTRL_) \
+ REG_VAL__R_SERIAL3_REC_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ), \
+ R_SERIAL3_REC_CTRL__WRITE(R_SERIAL3_REC_CTRL__ADDR, *R_SERIAL3_REC_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL3_REC_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL3_REC_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL3_REC_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL3_REC_CTRL__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_SERIAL3_REC_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL3_REC_CTRL_) \
+ REG_VAL__R_SERIAL3_REC_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL3_REC_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL3_REC_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL3_REC_CTRL__dma_err__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL3_REC_CTRL__rec_enable__##f2##__MASK & REG__##v2) | \
+ (R_SERIAL3_REC_CTRL__rts___##f3##__MASK & REG__##v3) | \
+ (R_SERIAL3_REC_CTRL__sampling__##f4##__MASK & REG__##v4) | \
+ (R_SERIAL3_REC_CTRL__rec_stick_par__##f5##__MASK & REG__##v5) | \
+ (R_SERIAL3_REC_CTRL__rec_par__##f6##__MASK & REG__##v6) | \
+ (R_SERIAL3_REC_CTRL__rec_par_en__##f7##__MASK & REG__##v7) | \
+ (R_SERIAL3_REC_CTRL__rec_bitnr__##f8##__MASK & REG__##v8) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL3_REC_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL3_REC_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL3_REC_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL3_REC_CTRL__dma_err__##f1##__VAL(R_SERIAL3_REC_CTRL_, dma_err_, v1) << R_SERIAL3_REC_CTRL__dma_err__BITNR) | \
+ (R_SERIAL3_REC_CTRL__rec_enable__##f2##__VAL(R_SERIAL3_REC_CTRL_, rec_enable_, v2) << R_SERIAL3_REC_CTRL__rec_enable__BITNR) | \
+ (R_SERIAL3_REC_CTRL__rts___##f3##__VAL(R_SERIAL3_REC_CTRL_, rts__, v3) << R_SERIAL3_REC_CTRL__rts___BITNR) | \
+ (R_SERIAL3_REC_CTRL__sampling__##f4##__VAL(R_SERIAL3_REC_CTRL_, sampling_, v4) << R_SERIAL3_REC_CTRL__sampling__BITNR) | \
+ (R_SERIAL3_REC_CTRL__rec_stick_par__##f5##__VAL(R_SERIAL3_REC_CTRL_, rec_stick_par_, v5) << R_SERIAL3_REC_CTRL__rec_stick_par__BITNR) | \
+ (R_SERIAL3_REC_CTRL__rec_par__##f6##__VAL(R_SERIAL3_REC_CTRL_, rec_par_, v6) << R_SERIAL3_REC_CTRL__rec_par__BITNR) | \
+ (R_SERIAL3_REC_CTRL__rec_par_en__##f7##__VAL(R_SERIAL3_REC_CTRL_, rec_par_en_, v7) << R_SERIAL3_REC_CTRL__rec_par_en__BITNR) | \
+ (R_SERIAL3_REC_CTRL__rec_bitnr__##f8##__VAL(R_SERIAL3_REC_CTRL_, rec_bitnr_, v8) << R_SERIAL3_REC_CTRL__rec_bitnr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL3_REC_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL3_REC_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL3_REC_CTRL_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8) ( \
+ (R_SERIAL3_REC_CTRL__dma_err__##f1_##_VAL(R_SERIAL3_REC_CTRL_, dma_err_, v1) << R_SERIAL3_REC_CTRL__dma_err__BITNR) | \
+ (R_SERIAL3_REC_CTRL__rec_enable__##f2_##_VAL(R_SERIAL3_REC_CTRL_, rec_enable_, v2) << R_SERIAL3_REC_CTRL__rec_enable__BITNR) | \
+ (R_SERIAL3_REC_CTRL__rts___##f3_##_VAL(R_SERIAL3_REC_CTRL_, rts__, v3) << R_SERIAL3_REC_CTRL__rts___BITNR) | \
+ (R_SERIAL3_REC_CTRL__sampling__##f4_##_VAL(R_SERIAL3_REC_CTRL_, sampling_, v4) << R_SERIAL3_REC_CTRL__sampling__BITNR) | \
+ (R_SERIAL3_REC_CTRL__rec_stick_par__##f5_##_VAL(R_SERIAL3_REC_CTRL_, rec_stick_par_, v5) << R_SERIAL3_REC_CTRL__rec_stick_par__BITNR) | \
+ (R_SERIAL3_REC_CTRL__rec_par__##f6_##_VAL(R_SERIAL3_REC_CTRL_, rec_par_, v6) << R_SERIAL3_REC_CTRL__rec_par__BITNR) | \
+ (R_SERIAL3_REC_CTRL__rec_par_en__##f7_##_VAL(R_SERIAL3_REC_CTRL_, rec_par_en_, v7) << R_SERIAL3_REC_CTRL__rec_par_en__BITNR) | \
+ (R_SERIAL3_REC_CTRL__rec_bitnr__##f8_##_VAL(R_SERIAL3_REC_CTRL_, rec_bitnr_, v8) << R_SERIAL3_REC_CTRL__rec_bitnr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL3_REC_DATA
+ * - type: RO
+ * - addr: 0xb0000078
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL3_REC_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL3_REC_DATA(f1,v1) ( \
+ (R_SERIAL3_REC_DATA__data_in__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL3_REC_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL3_REC_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL3_REC_DATA(f1,v1) ( \
+ (R_SERIAL3_REC_DATA__data_in__##f1##__VAL(R_SERIAL3_REC_DATA_, data_in_, v1) << R_SERIAL3_REC_DATA__data_in__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL3_REC_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL3_REC_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL3_REC_DATA_(f1_,v1) ( \
+ (R_SERIAL3_REC_DATA__data_in__##f1_##_VAL(R_SERIAL3_REC_DATA_, data_in_, v1) << R_SERIAL3_REC_DATA__data_in__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL3_STATUS
+ * - type: RO
+ * - addr: 0xb0000079
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL3_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL3_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL3_STATUS__xoff_detect__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL3_STATUS__cts___##f2##__MASK & REG__##v2) | \
+ (R_SERIAL3_STATUS__tr_ready__##f3##__MASK & REG__##v3) | \
+ (R_SERIAL3_STATUS__rxd__##f4##__MASK & REG__##v4) | \
+ (R_SERIAL3_STATUS__overrun__##f5##__MASK & REG__##v5) | \
+ (R_SERIAL3_STATUS__par_err__##f6##__MASK & REG__##v6) | \
+ (R_SERIAL3_STATUS__framing_err__##f7##__MASK & REG__##v7) | \
+ (R_SERIAL3_STATUS__data_avail__##f8##__MASK & REG__##v8) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL3_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL3_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL3_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL3_STATUS__xoff_detect__##f1##__VAL(R_SERIAL3_STATUS_, xoff_detect_, v1) << R_SERIAL3_STATUS__xoff_detect__BITNR) | \
+ (R_SERIAL3_STATUS__cts___##f2##__VAL(R_SERIAL3_STATUS_, cts__, v2) << R_SERIAL3_STATUS__cts___BITNR) | \
+ (R_SERIAL3_STATUS__tr_ready__##f3##__VAL(R_SERIAL3_STATUS_, tr_ready_, v3) << R_SERIAL3_STATUS__tr_ready__BITNR) | \
+ (R_SERIAL3_STATUS__rxd__##f4##__VAL(R_SERIAL3_STATUS_, rxd_, v4) << R_SERIAL3_STATUS__rxd__BITNR) | \
+ (R_SERIAL3_STATUS__overrun__##f5##__VAL(R_SERIAL3_STATUS_, overrun_, v5) << R_SERIAL3_STATUS__overrun__BITNR) | \
+ (R_SERIAL3_STATUS__par_err__##f6##__VAL(R_SERIAL3_STATUS_, par_err_, v6) << R_SERIAL3_STATUS__par_err__BITNR) | \
+ (R_SERIAL3_STATUS__framing_err__##f7##__VAL(R_SERIAL3_STATUS_, framing_err_, v7) << R_SERIAL3_STATUS__framing_err__BITNR) | \
+ (R_SERIAL3_STATUS__data_avail__##f8##__VAL(R_SERIAL3_STATUS_, data_avail_, v8) << R_SERIAL3_STATUS__data_avail__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL3_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL3_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL3_STATUS_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8) ( \
+ (R_SERIAL3_STATUS__xoff_detect__##f1_##_VAL(R_SERIAL3_STATUS_, xoff_detect_, v1) << R_SERIAL3_STATUS__xoff_detect__BITNR) | \
+ (R_SERIAL3_STATUS__cts___##f2_##_VAL(R_SERIAL3_STATUS_, cts__, v2) << R_SERIAL3_STATUS__cts___BITNR) | \
+ (R_SERIAL3_STATUS__tr_ready__##f3_##_VAL(R_SERIAL3_STATUS_, tr_ready_, v3) << R_SERIAL3_STATUS__tr_ready__BITNR) | \
+ (R_SERIAL3_STATUS__rxd__##f4_##_VAL(R_SERIAL3_STATUS_, rxd_, v4) << R_SERIAL3_STATUS__rxd__BITNR) | \
+ (R_SERIAL3_STATUS__overrun__##f5_##_VAL(R_SERIAL3_STATUS_, overrun_, v5) << R_SERIAL3_STATUS__overrun__BITNR) | \
+ (R_SERIAL3_STATUS__par_err__##f6_##_VAL(R_SERIAL3_STATUS_, par_err_, v6) << R_SERIAL3_STATUS__par_err__BITNR) | \
+ (R_SERIAL3_STATUS__framing_err__##f7_##_VAL(R_SERIAL3_STATUS_, framing_err_, v7) << R_SERIAL3_STATUS__framing_err__BITNR) | \
+ (R_SERIAL3_STATUS__data_avail__##f8_##_VAL(R_SERIAL3_STATUS_, data_avail_, v8) << R_SERIAL3_STATUS__data_avail__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL3_TR_CTRL
+ * - type: WO
+ * - addr: 0xb0000079
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL3_TR_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL3_TR_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL3_TR_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL3_TR_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_SERIAL3_TR_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL3_TR_CTRL_) \
+ REG_VAL__R_SERIAL3_TR_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ), \
+ R_SERIAL3_TR_CTRL__WRITE(R_SERIAL3_TR_CTRL__ADDR, *R_SERIAL3_TR_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL3_TR_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL3_TR_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL3_TR_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL3_TR_CTRL__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_SERIAL3_TR_CTRL__SADDR = ( \
+ REG_INITIATED(R_SERIAL3_TR_CTRL_) \
+ REG_VAL__R_SERIAL3_TR_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL3_TR_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL3_TR_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL3_TR_CTRL__txd__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL3_TR_CTRL__tr_enable__##f2##__MASK & REG__##v2) | \
+ (R_SERIAL3_TR_CTRL__auto_cts__##f3##__MASK & REG__##v3) | \
+ (R_SERIAL3_TR_CTRL__stop_bits__##f4##__MASK & REG__##v4) | \
+ (R_SERIAL3_TR_CTRL__tr_stick_par__##f5##__MASK & REG__##v5) | \
+ (R_SERIAL3_TR_CTRL__tr_par__##f6##__MASK & REG__##v6) | \
+ (R_SERIAL3_TR_CTRL__tr_par_en__##f7##__MASK & REG__##v7) | \
+ (R_SERIAL3_TR_CTRL__tr_bitnr__##f8##__MASK & REG__##v8) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL3_TR_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL3_TR_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL3_TR_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SERIAL3_TR_CTRL__txd__##f1##__VAL(R_SERIAL3_TR_CTRL_, txd_, v1) << R_SERIAL3_TR_CTRL__txd__BITNR) | \
+ (R_SERIAL3_TR_CTRL__tr_enable__##f2##__VAL(R_SERIAL3_TR_CTRL_, tr_enable_, v2) << R_SERIAL3_TR_CTRL__tr_enable__BITNR) | \
+ (R_SERIAL3_TR_CTRL__auto_cts__##f3##__VAL(R_SERIAL3_TR_CTRL_, auto_cts_, v3) << R_SERIAL3_TR_CTRL__auto_cts__BITNR) | \
+ (R_SERIAL3_TR_CTRL__stop_bits__##f4##__VAL(R_SERIAL3_TR_CTRL_, stop_bits_, v4) << R_SERIAL3_TR_CTRL__stop_bits__BITNR) | \
+ (R_SERIAL3_TR_CTRL__tr_stick_par__##f5##__VAL(R_SERIAL3_TR_CTRL_, tr_stick_par_, v5) << R_SERIAL3_TR_CTRL__tr_stick_par__BITNR) | \
+ (R_SERIAL3_TR_CTRL__tr_par__##f6##__VAL(R_SERIAL3_TR_CTRL_, tr_par_, v6) << R_SERIAL3_TR_CTRL__tr_par__BITNR) | \
+ (R_SERIAL3_TR_CTRL__tr_par_en__##f7##__VAL(R_SERIAL3_TR_CTRL_, tr_par_en_, v7) << R_SERIAL3_TR_CTRL__tr_par_en__BITNR) | \
+ (R_SERIAL3_TR_CTRL__tr_bitnr__##f8##__VAL(R_SERIAL3_TR_CTRL_, tr_bitnr_, v8) << R_SERIAL3_TR_CTRL__tr_bitnr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL3_TR_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL3_TR_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL3_TR_CTRL_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8) ( \
+ (R_SERIAL3_TR_CTRL__txd__##f1_##_VAL(R_SERIAL3_TR_CTRL_, txd_, v1) << R_SERIAL3_TR_CTRL__txd__BITNR) | \
+ (R_SERIAL3_TR_CTRL__tr_enable__##f2_##_VAL(R_SERIAL3_TR_CTRL_, tr_enable_, v2) << R_SERIAL3_TR_CTRL__tr_enable__BITNR) | \
+ (R_SERIAL3_TR_CTRL__auto_cts__##f3_##_VAL(R_SERIAL3_TR_CTRL_, auto_cts_, v3) << R_SERIAL3_TR_CTRL__auto_cts__BITNR) | \
+ (R_SERIAL3_TR_CTRL__stop_bits__##f4_##_VAL(R_SERIAL3_TR_CTRL_, stop_bits_, v4) << R_SERIAL3_TR_CTRL__stop_bits__BITNR) | \
+ (R_SERIAL3_TR_CTRL__tr_stick_par__##f5_##_VAL(R_SERIAL3_TR_CTRL_, tr_stick_par_, v5) << R_SERIAL3_TR_CTRL__tr_stick_par__BITNR) | \
+ (R_SERIAL3_TR_CTRL__tr_par__##f6_##_VAL(R_SERIAL3_TR_CTRL_, tr_par_, v6) << R_SERIAL3_TR_CTRL__tr_par__BITNR) | \
+ (R_SERIAL3_TR_CTRL__tr_par_en__##f7_##_VAL(R_SERIAL3_TR_CTRL_, tr_par_en_, v7) << R_SERIAL3_TR_CTRL__tr_par_en__BITNR) | \
+ (R_SERIAL3_TR_CTRL__tr_bitnr__##f8_##_VAL(R_SERIAL3_TR_CTRL_, tr_bitnr_, v8) << R_SERIAL3_TR_CTRL__tr_bitnr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL3_TR_DATA
+ * - type: WO
+ * - addr: 0xb0000078
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL3_TR_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL3_TR_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL3_TR_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL3_TR_DATA(f1,v1) ( \
+ *R_SERIAL3_TR_DATA__SADDR = ( \
+ REG_INITIATED(R_SERIAL3_TR_DATA_) \
+ REG_VAL__R_SERIAL3_TR_DATA_(f1##_,v1) \
+ ), \
+ R_SERIAL3_TR_DATA__WRITE(R_SERIAL3_TR_DATA__ADDR, *R_SERIAL3_TR_DATA__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL3_TR_DATA__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL3_TR_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL3_TR_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL3_TR_DATA__SHADOW(f1,v1) ( \
+ *R_SERIAL3_TR_DATA__SADDR = ( \
+ REG_INITIATED(R_SERIAL3_TR_DATA_) \
+ REG_VAL__R_SERIAL3_TR_DATA_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL3_TR_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL3_TR_DATA(f1,v1) ( \
+ (R_SERIAL3_TR_DATA__data_out__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL3_TR_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL3_TR_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL3_TR_DATA(f1,v1) ( \
+ (R_SERIAL3_TR_DATA__data_out__##f1##__VAL(R_SERIAL3_TR_DATA_, data_out_, v1) << R_SERIAL3_TR_DATA__data_out__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL3_TR_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL3_TR_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL3_TR_DATA_(f1_,v1) ( \
+ (R_SERIAL3_TR_DATA__data_out__##f1_##_VAL(R_SERIAL3_TR_DATA_, data_out_, v1) << R_SERIAL3_TR_DATA__data_out__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL3_XOFF
+ * - type: WO
+ * - addr: 0xb000007c
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL3_XOFF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL3_XOFF.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL3_XOFF.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL3_XOFF(f1,v1,f2,v2,f3,v3) ( \
+ *R_SERIAL3_XOFF__SADDR = ( \
+ REG_INITIATED(R_SERIAL3_XOFF_) \
+ REG_VAL__R_SERIAL3_XOFF_(f1##_,v1,f2##_,v2,f3##_,v3) \
+ ), \
+ R_SERIAL3_XOFF__WRITE(R_SERIAL3_XOFF__ADDR, *R_SERIAL3_XOFF__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL3_XOFF__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL3_XOFF.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL3_XOFF.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL3_XOFF__SHADOW(f1,v1,f2,v2,f3,v3) ( \
+ *R_SERIAL3_XOFF__SADDR = ( \
+ REG_INITIATED(R_SERIAL3_XOFF_) \
+ REG_VAL__R_SERIAL3_XOFF_(f1##_,v1,f2##_,v2,f3##_,v3) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL3_XOFF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL3_XOFF(f1,v1,f2,v2,f3,v3) ( \
+ (R_SERIAL3_XOFF__tx_stop__##f1##__MASK & REG__##v1) | \
+ (R_SERIAL3_XOFF__auto_xoff__##f2##__MASK & REG__##v2) | \
+ (R_SERIAL3_XOFF__xoff_char__##f3##__MASK & REG__##v3) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL3_XOFF
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL3_XOFF.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL3_XOFF(f1,v1,f2,v2,f3,v3) ( \
+ (R_SERIAL3_XOFF__tx_stop__##f1##__VAL(R_SERIAL3_XOFF_, tx_stop_, v1) << R_SERIAL3_XOFF__tx_stop__BITNR) | \
+ (R_SERIAL3_XOFF__auto_xoff__##f2##__VAL(R_SERIAL3_XOFF_, auto_xoff_, v2) << R_SERIAL3_XOFF__auto_xoff__BITNR) | \
+ (R_SERIAL3_XOFF__xoff_char__##f3##__VAL(R_SERIAL3_XOFF_, xoff_char_, v3) << R_SERIAL3_XOFF__xoff_char__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL3_XOFF_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL3_XOFF.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL3_XOFF_(f1_,v1,f2_,v2,f3_,v3) ( \
+ (R_SERIAL3_XOFF__tx_stop__##f1_##_VAL(R_SERIAL3_XOFF_, tx_stop_, v1) << R_SERIAL3_XOFF__tx_stop__BITNR) | \
+ (R_SERIAL3_XOFF__auto_xoff__##f2_##_VAL(R_SERIAL3_XOFF_, auto_xoff_, v2) << R_SERIAL3_XOFF__auto_xoff__BITNR) | \
+ (R_SERIAL3_XOFF__xoff_char__##f3_##_VAL(R_SERIAL3_XOFF_, xoff_char_, v3) << R_SERIAL3_XOFF__xoff_char__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SERIAL_PRESCALE
+ * - type: WO
+ * - addr: 0xb00000f2
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL_PRESCALE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL_PRESCALE.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SERIAL_PRESCALE.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL_PRESCALE(f1,v1) ( \
+ *R_SERIAL_PRESCALE__SADDR = ( \
+ REG_INITIATED(R_SERIAL_PRESCALE_) \
+ REG_VAL__R_SERIAL_PRESCALE_(f1##_,v1) \
+ ), \
+ R_SERIAL_PRESCALE__WRITE(R_SERIAL_PRESCALE__ADDR, *R_SERIAL_PRESCALE__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SERIAL_PRESCALE__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SERIAL_PRESCALE.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SERIAL_PRESCALE.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SERIAL_PRESCALE__SHADOW(f1,v1) ( \
+ *R_SERIAL_PRESCALE__SADDR = ( \
+ REG_INITIATED(R_SERIAL_PRESCALE_) \
+ REG_VAL__R_SERIAL_PRESCALE_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SERIAL_PRESCALE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SERIAL_PRESCALE(f1,v1) ( \
+ (R_SERIAL_PRESCALE__ser_presc__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL_PRESCALE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL_PRESCALE.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL_PRESCALE(f1,v1) ( \
+ (R_SERIAL_PRESCALE__ser_presc__##f1##__VAL(R_SERIAL_PRESCALE_, ser_presc_, v1) << R_SERIAL_PRESCALE__ser_presc__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SERIAL_PRESCALE_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SERIAL_PRESCALE.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SERIAL_PRESCALE_(f1_,v1) ( \
+ (R_SERIAL_PRESCALE__ser_presc__##f1_##_VAL(R_SERIAL_PRESCALE_, ser_presc_, v1) << R_SERIAL_PRESCALE__ser_presc__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SER_PRESC_STATUS
+ * - type: RO
+ * - addr: 0xb00000f2
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SER_PRESC_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SER_PRESC_STATUS(f1,v1) ( \
+ (R_SER_PRESC_STATUS__ser_status__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SER_PRESC_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SER_PRESC_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SER_PRESC_STATUS(f1,v1) ( \
+ (R_SER_PRESC_STATUS__ser_status__##f1##__VAL(R_SER_PRESC_STATUS_, ser_status_, v1) << R_SER_PRESC_STATUS__ser_status__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SER_PRESC_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SER_PRESC_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SER_PRESC_STATUS_(f1_,v1) ( \
+ (R_SER_PRESC_STATUS__ser_status__##f1_##_VAL(R_SER_PRESC_STATUS_, ser_status_, v1) << R_SER_PRESC_STATUS__ser_status__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SET_EOP
+ * - type: WO
+ * - addr: 0xb000003c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SET_EOP
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SET_EOP.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SET_EOP.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SET_EOP(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ *R_SET_EOP__SADDR = ( \
+ REG_INITIATED(R_SET_EOP_) \
+ REG_VAL__R_SET_EOP_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4) \
+ ), \
+ R_SET_EOP__WRITE(R_SET_EOP__ADDR, *R_SET_EOP__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SET_EOP__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SET_EOP.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SET_EOP.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SET_EOP__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ *R_SET_EOP__SADDR = ( \
+ REG_INITIATED(R_SET_EOP_) \
+ REG_VAL__R_SET_EOP_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SET_EOP
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SET_EOP(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ (R_SET_EOP__ch9_eop__##f1##__MASK & REG__##v1) | \
+ (R_SET_EOP__ch7_eop__##f2##__MASK & REG__##v2) | \
+ (R_SET_EOP__ch5_eop__##f3##__MASK & REG__##v3) | \
+ (R_SET_EOP__ch3_eop__##f4##__MASK & REG__##v4) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SET_EOP
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SET_EOP.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SET_EOP(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ (R_SET_EOP__ch9_eop__##f1##__VAL(R_SET_EOP_, ch9_eop_, v1) << R_SET_EOP__ch9_eop__BITNR) | \
+ (R_SET_EOP__ch7_eop__##f2##__VAL(R_SET_EOP_, ch7_eop_, v2) << R_SET_EOP__ch7_eop__BITNR) | \
+ (R_SET_EOP__ch5_eop__##f3##__VAL(R_SET_EOP_, ch5_eop_, v3) << R_SET_EOP__ch5_eop__BITNR) | \
+ (R_SET_EOP__ch3_eop__##f4##__VAL(R_SET_EOP_, ch3_eop_, v4) << R_SET_EOP__ch3_eop__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SET_EOP_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SET_EOP.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SET_EOP_(f1_,v1,f2_,v2,f3_,v3,f4_,v4) ( \
+ (R_SET_EOP__ch9_eop__##f1_##_VAL(R_SET_EOP_, ch9_eop_, v1) << R_SET_EOP__ch9_eop__BITNR) | \
+ (R_SET_EOP__ch7_eop__##f2_##_VAL(R_SET_EOP_, ch7_eop_, v2) << R_SET_EOP__ch7_eop__BITNR) | \
+ (R_SET_EOP__ch5_eop__##f3_##_VAL(R_SET_EOP_, ch5_eop_, v3) << R_SET_EOP__ch5_eop__BITNR) | \
+ (R_SET_EOP__ch3_eop__##f4_##_VAL(R_SET_EOP_, ch3_eop_, v4) << R_SET_EOP__ch3_eop__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SHARED_RAM_ADDR
+ * - type: WO
+ * - addr: 0xb0000044
+ * - group: Shared RAM interface registers
+ */
+
+#if USE_GROUP__Shared_RAM_interface_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SHARED_RAM_ADDR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SHARED_RAM_ADDR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SHARED_RAM_ADDR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SHARED_RAM_ADDR(f1,v1) ( \
+ *R_SHARED_RAM_ADDR__SADDR = ( \
+ REG_INITIATED(R_SHARED_RAM_ADDR_) \
+ REG_VAL__R_SHARED_RAM_ADDR_(f1##_,v1) \
+ ), \
+ R_SHARED_RAM_ADDR__WRITE(R_SHARED_RAM_ADDR__ADDR, *R_SHARED_RAM_ADDR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SHARED_RAM_ADDR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SHARED_RAM_ADDR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SHARED_RAM_ADDR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SHARED_RAM_ADDR__SHADOW(f1,v1) ( \
+ *R_SHARED_RAM_ADDR__SADDR = ( \
+ REG_INITIATED(R_SHARED_RAM_ADDR_) \
+ REG_VAL__R_SHARED_RAM_ADDR_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SHARED_RAM_ADDR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SHARED_RAM_ADDR(f1,v1) ( \
+ (R_SHARED_RAM_ADDR__base_addr__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SHARED_RAM_ADDR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SHARED_RAM_ADDR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SHARED_RAM_ADDR(f1,v1) ( \
+ (R_SHARED_RAM_ADDR__base_addr__##f1##__VAL(R_SHARED_RAM_ADDR_, base_addr_, v1) << R_SHARED_RAM_ADDR__base_addr__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SHARED_RAM_ADDR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SHARED_RAM_ADDR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SHARED_RAM_ADDR_(f1_,v1) ( \
+ (R_SHARED_RAM_ADDR__base_addr__##f1_##_VAL(R_SHARED_RAM_ADDR_, base_addr_, v1) << R_SHARED_RAM_ADDR__base_addr__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SHARED_RAM_CONFIG
+ * - type: WO
+ * - addr: 0xb0000040
+ * - group: Shared RAM interface registers
+ */
+
+#if USE_GROUP__Shared_RAM_interface_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SHARED_RAM_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SHARED_RAM_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SHARED_RAM_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SHARED_RAM_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ *R_SHARED_RAM_CONFIG__SADDR = ( \
+ REG_INITIATED(R_SHARED_RAM_CONFIG_) \
+ REG_VAL__R_SHARED_RAM_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4) \
+ ), \
+ R_SHARED_RAM_CONFIG__WRITE(R_SHARED_RAM_CONFIG__ADDR, *R_SHARED_RAM_CONFIG__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SHARED_RAM_CONFIG__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SHARED_RAM_CONFIG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SHARED_RAM_CONFIG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SHARED_RAM_CONFIG__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ *R_SHARED_RAM_CONFIG__SADDR = ( \
+ REG_INITIATED(R_SHARED_RAM_CONFIG_) \
+ REG_VAL__R_SHARED_RAM_CONFIG_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SHARED_RAM_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SHARED_RAM_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ (R_SHARED_RAM_CONFIG__width__##f1##__MASK & REG__##v1) | \
+ (R_SHARED_RAM_CONFIG__enable__##f2##__MASK & REG__##v2) | \
+ (R_SHARED_RAM_CONFIG__pint__##f3##__MASK & REG__##v3) | \
+ (R_SHARED_RAM_CONFIG__clri__##f4##__MASK & REG__##v4) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SHARED_RAM_CONFIG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SHARED_RAM_CONFIG.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SHARED_RAM_CONFIG(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ (R_SHARED_RAM_CONFIG__width__##f1##__VAL(R_SHARED_RAM_CONFIG_, width_, v1) << R_SHARED_RAM_CONFIG__width__BITNR) | \
+ (R_SHARED_RAM_CONFIG__enable__##f2##__VAL(R_SHARED_RAM_CONFIG_, enable_, v2) << R_SHARED_RAM_CONFIG__enable__BITNR) | \
+ (R_SHARED_RAM_CONFIG__pint__##f3##__VAL(R_SHARED_RAM_CONFIG_, pint_, v3) << R_SHARED_RAM_CONFIG__pint__BITNR) | \
+ (R_SHARED_RAM_CONFIG__clri__##f4##__VAL(R_SHARED_RAM_CONFIG_, clri_, v4) << R_SHARED_RAM_CONFIG__clri__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SHARED_RAM_CONFIG_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SHARED_RAM_CONFIG.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SHARED_RAM_CONFIG_(f1_,v1,f2_,v2,f3_,v3,f4_,v4) ( \
+ (R_SHARED_RAM_CONFIG__width__##f1_##_VAL(R_SHARED_RAM_CONFIG_, width_, v1) << R_SHARED_RAM_CONFIG__width__BITNR) | \
+ (R_SHARED_RAM_CONFIG__enable__##f2_##_VAL(R_SHARED_RAM_CONFIG_, enable_, v2) << R_SHARED_RAM_CONFIG__enable__BITNR) | \
+ (R_SHARED_RAM_CONFIG__pint__##f3_##_VAL(R_SHARED_RAM_CONFIG_, pint_, v3) << R_SHARED_RAM_CONFIG__pint__BITNR) | \
+ (R_SHARED_RAM_CONFIG__clri__##f4_##_VAL(R_SHARED_RAM_CONFIG_, clri_, v4) << R_SHARED_RAM_CONFIG__clri__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SINGLE_STEP
+ * - type: WO
+ * - addr: 0xb00000fe
+ * - group: Test mode registers
+ */
+
+#if USE_GROUP__Test_mode_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SINGLE_STEP
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SINGLE_STEP.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SINGLE_STEP.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SINGLE_STEP(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ *R_SINGLE_STEP__SADDR = ( \
+ REG_INITIATED(R_SINGLE_STEP_) \
+ REG_VAL__R_SINGLE_STEP_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4) \
+ ), \
+ R_SINGLE_STEP__WRITE(R_SINGLE_STEP__ADDR, *R_SINGLE_STEP__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SINGLE_STEP__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SINGLE_STEP.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SINGLE_STEP.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SINGLE_STEP__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ *R_SINGLE_STEP__SADDR = ( \
+ REG_INITIATED(R_SINGLE_STEP_) \
+ REG_VAL__R_SINGLE_STEP_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SINGLE_STEP
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SINGLE_STEP(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ (R_SINGLE_STEP__single_step__##f1##__MASK & REG__##v1) | \
+ (R_SINGLE_STEP__step_wr__##f2##__MASK & REG__##v2) | \
+ (R_SINGLE_STEP__step_rd__##f3##__MASK & REG__##v3) | \
+ (R_SINGLE_STEP__step_fetch__##f4##__MASK & REG__##v4) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SINGLE_STEP
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SINGLE_STEP.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SINGLE_STEP(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ (R_SINGLE_STEP__single_step__##f1##__VAL(R_SINGLE_STEP_, single_step_, v1) << R_SINGLE_STEP__single_step__BITNR) | \
+ (R_SINGLE_STEP__step_wr__##f2##__VAL(R_SINGLE_STEP_, step_wr_, v2) << R_SINGLE_STEP__step_wr__BITNR) | \
+ (R_SINGLE_STEP__step_rd__##f3##__VAL(R_SINGLE_STEP_, step_rd_, v3) << R_SINGLE_STEP__step_rd__BITNR) | \
+ (R_SINGLE_STEP__step_fetch__##f4##__VAL(R_SINGLE_STEP_, step_fetch_, v4) << R_SINGLE_STEP__step_fetch__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SINGLE_STEP_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SINGLE_STEP.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SINGLE_STEP_(f1_,v1,f2_,v2,f3_,v3,f4_,v4) ( \
+ (R_SINGLE_STEP__single_step__##f1_##_VAL(R_SINGLE_STEP_, single_step_, v1) << R_SINGLE_STEP__single_step__BITNR) | \
+ (R_SINGLE_STEP__step_wr__##f2_##_VAL(R_SINGLE_STEP_, step_wr_, v2) << R_SINGLE_STEP__step_wr__BITNR) | \
+ (R_SINGLE_STEP__step_rd__##f3_##_VAL(R_SINGLE_STEP_, step_rd_, v3) << R_SINGLE_STEP__step_rd__BITNR) | \
+ (R_SINGLE_STEP__step_fetch__##f4_##_VAL(R_SINGLE_STEP_, step_fetch_, v4) << R_SINGLE_STEP__step_fetch__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SYNC_SERIAL1_CTRL
+ * - type: WO
+ * - addr: 0xb0000068
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SYNC_SERIAL1_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SYNC_SERIAL1_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SYNC_SERIAL1_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SYNC_SERIAL1_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23) ( \
+ *R_SYNC_SERIAL1_CTRL__SADDR = ( \
+ REG_INITIATED(R_SYNC_SERIAL1_CTRL_) \
+ REG_VAL__R_SYNC_SERIAL1_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23) \
+ ), \
+ R_SYNC_SERIAL1_CTRL__WRITE(R_SYNC_SERIAL1_CTRL__ADDR, *R_SYNC_SERIAL1_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SYNC_SERIAL1_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SYNC_SERIAL1_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SYNC_SERIAL1_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SYNC_SERIAL1_CTRL__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23) ( \
+ *R_SYNC_SERIAL1_CTRL__SADDR = ( \
+ REG_INITIATED(R_SYNC_SERIAL1_CTRL_) \
+ REG_VAL__R_SYNC_SERIAL1_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SYNC_SERIAL1_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SYNC_SERIAL1_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23) ( \
+ (R_SYNC_SERIAL1_CTRL__tr_baud__##f1##__MASK & REG__##v1) | \
+ (R_SYNC_SERIAL1_CTRL__dma_enable__##f2##__MASK & REG__##v2) | \
+ (R_SYNC_SERIAL1_CTRL__mode__##f3##__MASK & REG__##v3) | \
+ (R_SYNC_SERIAL1_CTRL__error__##f4##__MASK & REG__##v4) | \
+ (R_SYNC_SERIAL1_CTRL__rec_enable__##f5##__MASK & REG__##v5) | \
+ (R_SYNC_SERIAL1_CTRL__f_synctype__##f6##__MASK & REG__##v6) | \
+ (R_SYNC_SERIAL1_CTRL__f_syncsize__##f7##__MASK & REG__##v7) | \
+ (R_SYNC_SERIAL1_CTRL__f_sync__##f8##__MASK & REG__##v8) | \
+ (R_SYNC_SERIAL1_CTRL__clk_mode__##f9##__MASK & REG__##v9) | \
+ (R_SYNC_SERIAL1_CTRL__clk_halt__##f10##__MASK & REG__##v10) | \
+ (R_SYNC_SERIAL1_CTRL__bitorder__##f11##__MASK & REG__##v11) | \
+ (R_SYNC_SERIAL1_CTRL__tr_enable__##f12##__MASK & REG__##v12) | \
+ (R_SYNC_SERIAL1_CTRL__wordsize__##f13##__MASK & REG__##v13) | \
+ (R_SYNC_SERIAL1_CTRL__buf_empty__##f14##__MASK & REG__##v14) | \
+ (R_SYNC_SERIAL1_CTRL__buf_full__##f15##__MASK & REG__##v15) | \
+ (R_SYNC_SERIAL1_CTRL__flow_ctrl__##f16##__MASK & REG__##v16) | \
+ (R_SYNC_SERIAL1_CTRL__clk_polarity__##f17##__MASK & REG__##v17) | \
+ (R_SYNC_SERIAL1_CTRL__frame_polarity__##f18##__MASK & REG__##v18) | \
+ (R_SYNC_SERIAL1_CTRL__status_polarity__##f19##__MASK & REG__##v19) | \
+ (R_SYNC_SERIAL1_CTRL__clk_driver__##f20##__MASK & REG__##v20) | \
+ (R_SYNC_SERIAL1_CTRL__frame_driver__##f21##__MASK & REG__##v21) | \
+ (R_SYNC_SERIAL1_CTRL__status_driver__##f22##__MASK & REG__##v22) | \
+ (R_SYNC_SERIAL1_CTRL__def_out0__##f23##__MASK & REG__##v23) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL1_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL1_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL1_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23) ( \
+ (R_SYNC_SERIAL1_CTRL__tr_baud__##f1##__VAL(R_SYNC_SERIAL1_CTRL_, tr_baud_, v1) << R_SYNC_SERIAL1_CTRL__tr_baud__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__dma_enable__##f2##__VAL(R_SYNC_SERIAL1_CTRL_, dma_enable_, v2) << R_SYNC_SERIAL1_CTRL__dma_enable__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__mode__##f3##__VAL(R_SYNC_SERIAL1_CTRL_, mode_, v3) << R_SYNC_SERIAL1_CTRL__mode__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__error__##f4##__VAL(R_SYNC_SERIAL1_CTRL_, error_, v4) << R_SYNC_SERIAL1_CTRL__error__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__rec_enable__##f5##__VAL(R_SYNC_SERIAL1_CTRL_, rec_enable_, v5) << R_SYNC_SERIAL1_CTRL__rec_enable__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__f_synctype__##f6##__VAL(R_SYNC_SERIAL1_CTRL_, f_synctype_, v6) << R_SYNC_SERIAL1_CTRL__f_synctype__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__f_syncsize__##f7##__VAL(R_SYNC_SERIAL1_CTRL_, f_syncsize_, v7) << R_SYNC_SERIAL1_CTRL__f_syncsize__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__f_sync__##f8##__VAL(R_SYNC_SERIAL1_CTRL_, f_sync_, v8) << R_SYNC_SERIAL1_CTRL__f_sync__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__clk_mode__##f9##__VAL(R_SYNC_SERIAL1_CTRL_, clk_mode_, v9) << R_SYNC_SERIAL1_CTRL__clk_mode__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__clk_halt__##f10##__VAL(R_SYNC_SERIAL1_CTRL_, clk_halt_, v10) << R_SYNC_SERIAL1_CTRL__clk_halt__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__bitorder__##f11##__VAL(R_SYNC_SERIAL1_CTRL_, bitorder_, v11) << R_SYNC_SERIAL1_CTRL__bitorder__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__tr_enable__##f12##__VAL(R_SYNC_SERIAL1_CTRL_, tr_enable_, v12) << R_SYNC_SERIAL1_CTRL__tr_enable__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__wordsize__##f13##__VAL(R_SYNC_SERIAL1_CTRL_, wordsize_, v13) << R_SYNC_SERIAL1_CTRL__wordsize__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__buf_empty__##f14##__VAL(R_SYNC_SERIAL1_CTRL_, buf_empty_, v14) << R_SYNC_SERIAL1_CTRL__buf_empty__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__buf_full__##f15##__VAL(R_SYNC_SERIAL1_CTRL_, buf_full_, v15) << R_SYNC_SERIAL1_CTRL__buf_full__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__flow_ctrl__##f16##__VAL(R_SYNC_SERIAL1_CTRL_, flow_ctrl_, v16) << R_SYNC_SERIAL1_CTRL__flow_ctrl__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__clk_polarity__##f17##__VAL(R_SYNC_SERIAL1_CTRL_, clk_polarity_, v17) << R_SYNC_SERIAL1_CTRL__clk_polarity__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__frame_polarity__##f18##__VAL(R_SYNC_SERIAL1_CTRL_, frame_polarity_, v18) << R_SYNC_SERIAL1_CTRL__frame_polarity__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__status_polarity__##f19##__VAL(R_SYNC_SERIAL1_CTRL_, status_polarity_, v19) << R_SYNC_SERIAL1_CTRL__status_polarity__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__clk_driver__##f20##__VAL(R_SYNC_SERIAL1_CTRL_, clk_driver_, v20) << R_SYNC_SERIAL1_CTRL__clk_driver__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__frame_driver__##f21##__VAL(R_SYNC_SERIAL1_CTRL_, frame_driver_, v21) << R_SYNC_SERIAL1_CTRL__frame_driver__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__status_driver__##f22##__VAL(R_SYNC_SERIAL1_CTRL_, status_driver_, v22) << R_SYNC_SERIAL1_CTRL__status_driver__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__def_out0__##f23##__VAL(R_SYNC_SERIAL1_CTRL_, def_out0_, v23) << R_SYNC_SERIAL1_CTRL__def_out0__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL1_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL1_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL1_CTRL_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19,f20_,v20,f21_,v21,f22_,v22,f23_,v23) ( \
+ (R_SYNC_SERIAL1_CTRL__tr_baud__##f1_##_VAL(R_SYNC_SERIAL1_CTRL_, tr_baud_, v1) << R_SYNC_SERIAL1_CTRL__tr_baud__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__dma_enable__##f2_##_VAL(R_SYNC_SERIAL1_CTRL_, dma_enable_, v2) << R_SYNC_SERIAL1_CTRL__dma_enable__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__mode__##f3_##_VAL(R_SYNC_SERIAL1_CTRL_, mode_, v3) << R_SYNC_SERIAL1_CTRL__mode__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__error__##f4_##_VAL(R_SYNC_SERIAL1_CTRL_, error_, v4) << R_SYNC_SERIAL1_CTRL__error__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__rec_enable__##f5_##_VAL(R_SYNC_SERIAL1_CTRL_, rec_enable_, v5) << R_SYNC_SERIAL1_CTRL__rec_enable__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__f_synctype__##f6_##_VAL(R_SYNC_SERIAL1_CTRL_, f_synctype_, v6) << R_SYNC_SERIAL1_CTRL__f_synctype__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__f_syncsize__##f7_##_VAL(R_SYNC_SERIAL1_CTRL_, f_syncsize_, v7) << R_SYNC_SERIAL1_CTRL__f_syncsize__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__f_sync__##f8_##_VAL(R_SYNC_SERIAL1_CTRL_, f_sync_, v8) << R_SYNC_SERIAL1_CTRL__f_sync__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__clk_mode__##f9_##_VAL(R_SYNC_SERIAL1_CTRL_, clk_mode_, v9) << R_SYNC_SERIAL1_CTRL__clk_mode__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__clk_halt__##f10_##_VAL(R_SYNC_SERIAL1_CTRL_, clk_halt_, v10) << R_SYNC_SERIAL1_CTRL__clk_halt__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__bitorder__##f11_##_VAL(R_SYNC_SERIAL1_CTRL_, bitorder_, v11) << R_SYNC_SERIAL1_CTRL__bitorder__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__tr_enable__##f12_##_VAL(R_SYNC_SERIAL1_CTRL_, tr_enable_, v12) << R_SYNC_SERIAL1_CTRL__tr_enable__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__wordsize__##f13_##_VAL(R_SYNC_SERIAL1_CTRL_, wordsize_, v13) << R_SYNC_SERIAL1_CTRL__wordsize__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__buf_empty__##f14_##_VAL(R_SYNC_SERIAL1_CTRL_, buf_empty_, v14) << R_SYNC_SERIAL1_CTRL__buf_empty__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__buf_full__##f15_##_VAL(R_SYNC_SERIAL1_CTRL_, buf_full_, v15) << R_SYNC_SERIAL1_CTRL__buf_full__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__flow_ctrl__##f16_##_VAL(R_SYNC_SERIAL1_CTRL_, flow_ctrl_, v16) << R_SYNC_SERIAL1_CTRL__flow_ctrl__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__clk_polarity__##f17_##_VAL(R_SYNC_SERIAL1_CTRL_, clk_polarity_, v17) << R_SYNC_SERIAL1_CTRL__clk_polarity__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__frame_polarity__##f18_##_VAL(R_SYNC_SERIAL1_CTRL_, frame_polarity_, v18) << R_SYNC_SERIAL1_CTRL__frame_polarity__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__status_polarity__##f19_##_VAL(R_SYNC_SERIAL1_CTRL_, status_polarity_, v19) << R_SYNC_SERIAL1_CTRL__status_polarity__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__clk_driver__##f20_##_VAL(R_SYNC_SERIAL1_CTRL_, clk_driver_, v20) << R_SYNC_SERIAL1_CTRL__clk_driver__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__frame_driver__##f21_##_VAL(R_SYNC_SERIAL1_CTRL_, frame_driver_, v21) << R_SYNC_SERIAL1_CTRL__frame_driver__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__status_driver__##f22_##_VAL(R_SYNC_SERIAL1_CTRL_, status_driver_, v22) << R_SYNC_SERIAL1_CTRL__status_driver__BITNR) | \
+ (R_SYNC_SERIAL1_CTRL__def_out0__##f23_##_VAL(R_SYNC_SERIAL1_CTRL_, def_out0_, v23) << R_SYNC_SERIAL1_CTRL__def_out0__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SYNC_SERIAL1_REC_BYTE
+ * - type: RO
+ * - addr: 0xb000006c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SYNC_SERIAL1_REC_BYTE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SYNC_SERIAL1_REC_BYTE(f1,v1) ( \
+ (R_SYNC_SERIAL1_REC_BYTE__data_in__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL1_REC_BYTE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL1_REC_BYTE.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL1_REC_BYTE(f1,v1) ( \
+ (R_SYNC_SERIAL1_REC_BYTE__data_in__##f1##__VAL(R_SYNC_SERIAL1_REC_BYTE_, data_in_, v1) << R_SYNC_SERIAL1_REC_BYTE__data_in__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL1_REC_BYTE_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL1_REC_BYTE.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL1_REC_BYTE_(f1_,v1) ( \
+ (R_SYNC_SERIAL1_REC_BYTE__data_in__##f1_##_VAL(R_SYNC_SERIAL1_REC_BYTE_, data_in_, v1) << R_SYNC_SERIAL1_REC_BYTE__data_in__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SYNC_SERIAL1_REC_DATA
+ * - type: RO
+ * - addr: 0xb000006c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SYNC_SERIAL1_REC_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SYNC_SERIAL1_REC_DATA(f1,v1) ( \
+ (R_SYNC_SERIAL1_REC_DATA__data_in__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL1_REC_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL1_REC_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL1_REC_DATA(f1,v1) ( \
+ (R_SYNC_SERIAL1_REC_DATA__data_in__##f1##__VAL(R_SYNC_SERIAL1_REC_DATA_, data_in_, v1) << R_SYNC_SERIAL1_REC_DATA__data_in__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL1_REC_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL1_REC_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL1_REC_DATA_(f1_,v1) ( \
+ (R_SYNC_SERIAL1_REC_DATA__data_in__##f1_##_VAL(R_SYNC_SERIAL1_REC_DATA_, data_in_, v1) << R_SYNC_SERIAL1_REC_DATA__data_in__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SYNC_SERIAL1_REC_WORD
+ * - type: RO
+ * - addr: 0xb000006c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SYNC_SERIAL1_REC_WORD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SYNC_SERIAL1_REC_WORD(f1,v1) ( \
+ (R_SYNC_SERIAL1_REC_WORD__data_in__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL1_REC_WORD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL1_REC_WORD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL1_REC_WORD(f1,v1) ( \
+ (R_SYNC_SERIAL1_REC_WORD__data_in__##f1##__VAL(R_SYNC_SERIAL1_REC_WORD_, data_in_, v1) << R_SYNC_SERIAL1_REC_WORD__data_in__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL1_REC_WORD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL1_REC_WORD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL1_REC_WORD_(f1_,v1) ( \
+ (R_SYNC_SERIAL1_REC_WORD__data_in__##f1_##_VAL(R_SYNC_SERIAL1_REC_WORD_, data_in_, v1) << R_SYNC_SERIAL1_REC_WORD__data_in__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SYNC_SERIAL1_STATUS
+ * - type: RO
+ * - addr: 0xb0000068
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SYNC_SERIAL1_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SYNC_SERIAL1_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_SYNC_SERIAL1_STATUS__rec_status__##f1##__MASK & REG__##v1) | \
+ (R_SYNC_SERIAL1_STATUS__tr_empty__##f2##__MASK & REG__##v2) | \
+ (R_SYNC_SERIAL1_STATUS__tr_ready__##f3##__MASK & REG__##v3) | \
+ (R_SYNC_SERIAL1_STATUS__pin_1__##f4##__MASK & REG__##v4) | \
+ (R_SYNC_SERIAL1_STATUS__pin_0__##f5##__MASK & REG__##v5) | \
+ (R_SYNC_SERIAL1_STATUS__underflow__##f6##__MASK & REG__##v6) | \
+ (R_SYNC_SERIAL1_STATUS__overrun__##f7##__MASK & REG__##v7) | \
+ (R_SYNC_SERIAL1_STATUS__data_avail__##f8##__MASK & REG__##v8) | \
+ (R_SYNC_SERIAL1_STATUS__data__##f9##__MASK & REG__##v9) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL1_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL1_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL1_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_SYNC_SERIAL1_STATUS__rec_status__##f1##__VAL(R_SYNC_SERIAL1_STATUS_, rec_status_, v1) << R_SYNC_SERIAL1_STATUS__rec_status__BITNR) | \
+ (R_SYNC_SERIAL1_STATUS__tr_empty__##f2##__VAL(R_SYNC_SERIAL1_STATUS_, tr_empty_, v2) << R_SYNC_SERIAL1_STATUS__tr_empty__BITNR) | \
+ (R_SYNC_SERIAL1_STATUS__tr_ready__##f3##__VAL(R_SYNC_SERIAL1_STATUS_, tr_ready_, v3) << R_SYNC_SERIAL1_STATUS__tr_ready__BITNR) | \
+ (R_SYNC_SERIAL1_STATUS__pin_1__##f4##__VAL(R_SYNC_SERIAL1_STATUS_, pin_1_, v4) << R_SYNC_SERIAL1_STATUS__pin_1__BITNR) | \
+ (R_SYNC_SERIAL1_STATUS__pin_0__##f5##__VAL(R_SYNC_SERIAL1_STATUS_, pin_0_, v5) << R_SYNC_SERIAL1_STATUS__pin_0__BITNR) | \
+ (R_SYNC_SERIAL1_STATUS__underflow__##f6##__VAL(R_SYNC_SERIAL1_STATUS_, underflow_, v6) << R_SYNC_SERIAL1_STATUS__underflow__BITNR) | \
+ (R_SYNC_SERIAL1_STATUS__overrun__##f7##__VAL(R_SYNC_SERIAL1_STATUS_, overrun_, v7) << R_SYNC_SERIAL1_STATUS__overrun__BITNR) | \
+ (R_SYNC_SERIAL1_STATUS__data_avail__##f8##__VAL(R_SYNC_SERIAL1_STATUS_, data_avail_, v8) << R_SYNC_SERIAL1_STATUS__data_avail__BITNR) | \
+ (R_SYNC_SERIAL1_STATUS__data__##f9##__VAL(R_SYNC_SERIAL1_STATUS_, data_, v9) << R_SYNC_SERIAL1_STATUS__data__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL1_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL1_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL1_STATUS_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9) ( \
+ (R_SYNC_SERIAL1_STATUS__rec_status__##f1_##_VAL(R_SYNC_SERIAL1_STATUS_, rec_status_, v1) << R_SYNC_SERIAL1_STATUS__rec_status__BITNR) | \
+ (R_SYNC_SERIAL1_STATUS__tr_empty__##f2_##_VAL(R_SYNC_SERIAL1_STATUS_, tr_empty_, v2) << R_SYNC_SERIAL1_STATUS__tr_empty__BITNR) | \
+ (R_SYNC_SERIAL1_STATUS__tr_ready__##f3_##_VAL(R_SYNC_SERIAL1_STATUS_, tr_ready_, v3) << R_SYNC_SERIAL1_STATUS__tr_ready__BITNR) | \
+ (R_SYNC_SERIAL1_STATUS__pin_1__##f4_##_VAL(R_SYNC_SERIAL1_STATUS_, pin_1_, v4) << R_SYNC_SERIAL1_STATUS__pin_1__BITNR) | \
+ (R_SYNC_SERIAL1_STATUS__pin_0__##f5_##_VAL(R_SYNC_SERIAL1_STATUS_, pin_0_, v5) << R_SYNC_SERIAL1_STATUS__pin_0__BITNR) | \
+ (R_SYNC_SERIAL1_STATUS__underflow__##f6_##_VAL(R_SYNC_SERIAL1_STATUS_, underflow_, v6) << R_SYNC_SERIAL1_STATUS__underflow__BITNR) | \
+ (R_SYNC_SERIAL1_STATUS__overrun__##f7_##_VAL(R_SYNC_SERIAL1_STATUS_, overrun_, v7) << R_SYNC_SERIAL1_STATUS__overrun__BITNR) | \
+ (R_SYNC_SERIAL1_STATUS__data_avail__##f8_##_VAL(R_SYNC_SERIAL1_STATUS_, data_avail_, v8) << R_SYNC_SERIAL1_STATUS__data_avail__BITNR) | \
+ (R_SYNC_SERIAL1_STATUS__data__##f9_##_VAL(R_SYNC_SERIAL1_STATUS_, data_, v9) << R_SYNC_SERIAL1_STATUS__data__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SYNC_SERIAL1_TR_BYTE
+ * - type: WO
+ * - addr: 0xb000006c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SYNC_SERIAL1_TR_BYTE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SYNC_SERIAL1_TR_BYTE.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SYNC_SERIAL1_TR_BYTE.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SYNC_SERIAL1_TR_BYTE(f1,v1) ( \
+ *R_SYNC_SERIAL1_TR_BYTE__SADDR = ( \
+ REG_INITIATED(R_SYNC_SERIAL1_TR_BYTE_) \
+ REG_VAL__R_SYNC_SERIAL1_TR_BYTE_(f1##_,v1) \
+ ), \
+ R_SYNC_SERIAL1_TR_BYTE__WRITE(R_SYNC_SERIAL1_TR_BYTE__ADDR, *R_SYNC_SERIAL1_TR_BYTE__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SYNC_SERIAL1_TR_BYTE__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SYNC_SERIAL1_TR_BYTE.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SYNC_SERIAL1_TR_BYTE.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SYNC_SERIAL1_TR_BYTE__SHADOW(f1,v1) ( \
+ *R_SYNC_SERIAL1_TR_BYTE__SADDR = ( \
+ REG_INITIATED(R_SYNC_SERIAL1_TR_BYTE_) \
+ REG_VAL__R_SYNC_SERIAL1_TR_BYTE_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SYNC_SERIAL1_TR_BYTE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SYNC_SERIAL1_TR_BYTE(f1,v1) ( \
+ (R_SYNC_SERIAL1_TR_BYTE__data_out__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL1_TR_BYTE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL1_TR_BYTE.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL1_TR_BYTE(f1,v1) ( \
+ (R_SYNC_SERIAL1_TR_BYTE__data_out__##f1##__VAL(R_SYNC_SERIAL1_TR_BYTE_, data_out_, v1) << R_SYNC_SERIAL1_TR_BYTE__data_out__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL1_TR_BYTE_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL1_TR_BYTE.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL1_TR_BYTE_(f1_,v1) ( \
+ (R_SYNC_SERIAL1_TR_BYTE__data_out__##f1_##_VAL(R_SYNC_SERIAL1_TR_BYTE_, data_out_, v1) << R_SYNC_SERIAL1_TR_BYTE__data_out__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SYNC_SERIAL1_TR_DATA
+ * - type: WO
+ * - addr: 0xb000006c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SYNC_SERIAL1_TR_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SYNC_SERIAL1_TR_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SYNC_SERIAL1_TR_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SYNC_SERIAL1_TR_DATA(f1,v1) ( \
+ *R_SYNC_SERIAL1_TR_DATA__SADDR = ( \
+ REG_INITIATED(R_SYNC_SERIAL1_TR_DATA_) \
+ REG_VAL__R_SYNC_SERIAL1_TR_DATA_(f1##_,v1) \
+ ), \
+ R_SYNC_SERIAL1_TR_DATA__WRITE(R_SYNC_SERIAL1_TR_DATA__ADDR, *R_SYNC_SERIAL1_TR_DATA__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SYNC_SERIAL1_TR_DATA__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SYNC_SERIAL1_TR_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SYNC_SERIAL1_TR_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SYNC_SERIAL1_TR_DATA__SHADOW(f1,v1) ( \
+ *R_SYNC_SERIAL1_TR_DATA__SADDR = ( \
+ REG_INITIATED(R_SYNC_SERIAL1_TR_DATA_) \
+ REG_VAL__R_SYNC_SERIAL1_TR_DATA_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SYNC_SERIAL1_TR_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SYNC_SERIAL1_TR_DATA(f1,v1) ( \
+ (R_SYNC_SERIAL1_TR_DATA__data_out__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL1_TR_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL1_TR_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL1_TR_DATA(f1,v1) ( \
+ (R_SYNC_SERIAL1_TR_DATA__data_out__##f1##__VAL(R_SYNC_SERIAL1_TR_DATA_, data_out_, v1) << R_SYNC_SERIAL1_TR_DATA__data_out__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL1_TR_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL1_TR_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL1_TR_DATA_(f1_,v1) ( \
+ (R_SYNC_SERIAL1_TR_DATA__data_out__##f1_##_VAL(R_SYNC_SERIAL1_TR_DATA_, data_out_, v1) << R_SYNC_SERIAL1_TR_DATA__data_out__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SYNC_SERIAL1_TR_WORD
+ * - type: WO
+ * - addr: 0xb000006c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SYNC_SERIAL1_TR_WORD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SYNC_SERIAL1_TR_WORD.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SYNC_SERIAL1_TR_WORD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SYNC_SERIAL1_TR_WORD(f1,v1) ( \
+ *R_SYNC_SERIAL1_TR_WORD__SADDR = ( \
+ REG_INITIATED(R_SYNC_SERIAL1_TR_WORD_) \
+ REG_VAL__R_SYNC_SERIAL1_TR_WORD_(f1##_,v1) \
+ ), \
+ R_SYNC_SERIAL1_TR_WORD__WRITE(R_SYNC_SERIAL1_TR_WORD__ADDR, *R_SYNC_SERIAL1_TR_WORD__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SYNC_SERIAL1_TR_WORD__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SYNC_SERIAL1_TR_WORD.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SYNC_SERIAL1_TR_WORD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SYNC_SERIAL1_TR_WORD__SHADOW(f1,v1) ( \
+ *R_SYNC_SERIAL1_TR_WORD__SADDR = ( \
+ REG_INITIATED(R_SYNC_SERIAL1_TR_WORD_) \
+ REG_VAL__R_SYNC_SERIAL1_TR_WORD_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SYNC_SERIAL1_TR_WORD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SYNC_SERIAL1_TR_WORD(f1,v1) ( \
+ (R_SYNC_SERIAL1_TR_WORD__data_out__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL1_TR_WORD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL1_TR_WORD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL1_TR_WORD(f1,v1) ( \
+ (R_SYNC_SERIAL1_TR_WORD__data_out__##f1##__VAL(R_SYNC_SERIAL1_TR_WORD_, data_out_, v1) << R_SYNC_SERIAL1_TR_WORD__data_out__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL1_TR_WORD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL1_TR_WORD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL1_TR_WORD_(f1_,v1) ( \
+ (R_SYNC_SERIAL1_TR_WORD__data_out__##f1_##_VAL(R_SYNC_SERIAL1_TR_WORD_, data_out_, v1) << R_SYNC_SERIAL1_TR_WORD__data_out__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SYNC_SERIAL3_CTRL
+ * - type: WO
+ * - addr: 0xb0000078
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SYNC_SERIAL3_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SYNC_SERIAL3_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SYNC_SERIAL3_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SYNC_SERIAL3_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23) ( \
+ *R_SYNC_SERIAL3_CTRL__SADDR = ( \
+ REG_INITIATED(R_SYNC_SERIAL3_CTRL_) \
+ REG_VAL__R_SYNC_SERIAL3_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23) \
+ ), \
+ R_SYNC_SERIAL3_CTRL__WRITE(R_SYNC_SERIAL3_CTRL__ADDR, *R_SYNC_SERIAL3_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SYNC_SERIAL3_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SYNC_SERIAL3_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SYNC_SERIAL3_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SYNC_SERIAL3_CTRL__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23) ( \
+ *R_SYNC_SERIAL3_CTRL__SADDR = ( \
+ REG_INITIATED(R_SYNC_SERIAL3_CTRL_) \
+ REG_VAL__R_SYNC_SERIAL3_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SYNC_SERIAL3_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SYNC_SERIAL3_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23) ( \
+ (R_SYNC_SERIAL3_CTRL__tr_baud__##f1##__MASK & REG__##v1) | \
+ (R_SYNC_SERIAL3_CTRL__dma_enable__##f2##__MASK & REG__##v2) | \
+ (R_SYNC_SERIAL3_CTRL__mode__##f3##__MASK & REG__##v3) | \
+ (R_SYNC_SERIAL3_CTRL__error__##f4##__MASK & REG__##v4) | \
+ (R_SYNC_SERIAL3_CTRL__rec_enable__##f5##__MASK & REG__##v5) | \
+ (R_SYNC_SERIAL3_CTRL__f_synctype__##f6##__MASK & REG__##v6) | \
+ (R_SYNC_SERIAL3_CTRL__f_syncsize__##f7##__MASK & REG__##v7) | \
+ (R_SYNC_SERIAL3_CTRL__f_sync__##f8##__MASK & REG__##v8) | \
+ (R_SYNC_SERIAL3_CTRL__clk_mode__##f9##__MASK & REG__##v9) | \
+ (R_SYNC_SERIAL3_CTRL__clk_halt__##f10##__MASK & REG__##v10) | \
+ (R_SYNC_SERIAL3_CTRL__bitorder__##f11##__MASK & REG__##v11) | \
+ (R_SYNC_SERIAL3_CTRL__tr_enable__##f12##__MASK & REG__##v12) | \
+ (R_SYNC_SERIAL3_CTRL__wordsize__##f13##__MASK & REG__##v13) | \
+ (R_SYNC_SERIAL3_CTRL__buf_empty__##f14##__MASK & REG__##v14) | \
+ (R_SYNC_SERIAL3_CTRL__buf_full__##f15##__MASK & REG__##v15) | \
+ (R_SYNC_SERIAL3_CTRL__flow_ctrl__##f16##__MASK & REG__##v16) | \
+ (R_SYNC_SERIAL3_CTRL__clk_polarity__##f17##__MASK & REG__##v17) | \
+ (R_SYNC_SERIAL3_CTRL__frame_polarity__##f18##__MASK & REG__##v18) | \
+ (R_SYNC_SERIAL3_CTRL__status_polarity__##f19##__MASK & REG__##v19) | \
+ (R_SYNC_SERIAL3_CTRL__clk_driver__##f20##__MASK & REG__##v20) | \
+ (R_SYNC_SERIAL3_CTRL__frame_driver__##f21##__MASK & REG__##v21) | \
+ (R_SYNC_SERIAL3_CTRL__status_driver__##f22##__MASK & REG__##v22) | \
+ (R_SYNC_SERIAL3_CTRL__def_out0__##f23##__MASK & REG__##v23) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL3_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL3_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL3_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23) ( \
+ (R_SYNC_SERIAL3_CTRL__tr_baud__##f1##__VAL(R_SYNC_SERIAL3_CTRL_, tr_baud_, v1) << R_SYNC_SERIAL3_CTRL__tr_baud__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__dma_enable__##f2##__VAL(R_SYNC_SERIAL3_CTRL_, dma_enable_, v2) << R_SYNC_SERIAL3_CTRL__dma_enable__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__mode__##f3##__VAL(R_SYNC_SERIAL3_CTRL_, mode_, v3) << R_SYNC_SERIAL3_CTRL__mode__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__error__##f4##__VAL(R_SYNC_SERIAL3_CTRL_, error_, v4) << R_SYNC_SERIAL3_CTRL__error__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__rec_enable__##f5##__VAL(R_SYNC_SERIAL3_CTRL_, rec_enable_, v5) << R_SYNC_SERIAL3_CTRL__rec_enable__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__f_synctype__##f6##__VAL(R_SYNC_SERIAL3_CTRL_, f_synctype_, v6) << R_SYNC_SERIAL3_CTRL__f_synctype__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__f_syncsize__##f7##__VAL(R_SYNC_SERIAL3_CTRL_, f_syncsize_, v7) << R_SYNC_SERIAL3_CTRL__f_syncsize__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__f_sync__##f8##__VAL(R_SYNC_SERIAL3_CTRL_, f_sync_, v8) << R_SYNC_SERIAL3_CTRL__f_sync__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__clk_mode__##f9##__VAL(R_SYNC_SERIAL3_CTRL_, clk_mode_, v9) << R_SYNC_SERIAL3_CTRL__clk_mode__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__clk_halt__##f10##__VAL(R_SYNC_SERIAL3_CTRL_, clk_halt_, v10) << R_SYNC_SERIAL3_CTRL__clk_halt__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__bitorder__##f11##__VAL(R_SYNC_SERIAL3_CTRL_, bitorder_, v11) << R_SYNC_SERIAL3_CTRL__bitorder__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__tr_enable__##f12##__VAL(R_SYNC_SERIAL3_CTRL_, tr_enable_, v12) << R_SYNC_SERIAL3_CTRL__tr_enable__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__wordsize__##f13##__VAL(R_SYNC_SERIAL3_CTRL_, wordsize_, v13) << R_SYNC_SERIAL3_CTRL__wordsize__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__buf_empty__##f14##__VAL(R_SYNC_SERIAL3_CTRL_, buf_empty_, v14) << R_SYNC_SERIAL3_CTRL__buf_empty__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__buf_full__##f15##__VAL(R_SYNC_SERIAL3_CTRL_, buf_full_, v15) << R_SYNC_SERIAL3_CTRL__buf_full__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__flow_ctrl__##f16##__VAL(R_SYNC_SERIAL3_CTRL_, flow_ctrl_, v16) << R_SYNC_SERIAL3_CTRL__flow_ctrl__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__clk_polarity__##f17##__VAL(R_SYNC_SERIAL3_CTRL_, clk_polarity_, v17) << R_SYNC_SERIAL3_CTRL__clk_polarity__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__frame_polarity__##f18##__VAL(R_SYNC_SERIAL3_CTRL_, frame_polarity_, v18) << R_SYNC_SERIAL3_CTRL__frame_polarity__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__status_polarity__##f19##__VAL(R_SYNC_SERIAL3_CTRL_, status_polarity_, v19) << R_SYNC_SERIAL3_CTRL__status_polarity__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__clk_driver__##f20##__VAL(R_SYNC_SERIAL3_CTRL_, clk_driver_, v20) << R_SYNC_SERIAL3_CTRL__clk_driver__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__frame_driver__##f21##__VAL(R_SYNC_SERIAL3_CTRL_, frame_driver_, v21) << R_SYNC_SERIAL3_CTRL__frame_driver__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__status_driver__##f22##__VAL(R_SYNC_SERIAL3_CTRL_, status_driver_, v22) << R_SYNC_SERIAL3_CTRL__status_driver__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__def_out0__##f23##__VAL(R_SYNC_SERIAL3_CTRL_, def_out0_, v23) << R_SYNC_SERIAL3_CTRL__def_out0__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL3_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL3_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL3_CTRL_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19,f20_,v20,f21_,v21,f22_,v22,f23_,v23) ( \
+ (R_SYNC_SERIAL3_CTRL__tr_baud__##f1_##_VAL(R_SYNC_SERIAL3_CTRL_, tr_baud_, v1) << R_SYNC_SERIAL3_CTRL__tr_baud__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__dma_enable__##f2_##_VAL(R_SYNC_SERIAL3_CTRL_, dma_enable_, v2) << R_SYNC_SERIAL3_CTRL__dma_enable__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__mode__##f3_##_VAL(R_SYNC_SERIAL3_CTRL_, mode_, v3) << R_SYNC_SERIAL3_CTRL__mode__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__error__##f4_##_VAL(R_SYNC_SERIAL3_CTRL_, error_, v4) << R_SYNC_SERIAL3_CTRL__error__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__rec_enable__##f5_##_VAL(R_SYNC_SERIAL3_CTRL_, rec_enable_, v5) << R_SYNC_SERIAL3_CTRL__rec_enable__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__f_synctype__##f6_##_VAL(R_SYNC_SERIAL3_CTRL_, f_synctype_, v6) << R_SYNC_SERIAL3_CTRL__f_synctype__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__f_syncsize__##f7_##_VAL(R_SYNC_SERIAL3_CTRL_, f_syncsize_, v7) << R_SYNC_SERIAL3_CTRL__f_syncsize__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__f_sync__##f8_##_VAL(R_SYNC_SERIAL3_CTRL_, f_sync_, v8) << R_SYNC_SERIAL3_CTRL__f_sync__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__clk_mode__##f9_##_VAL(R_SYNC_SERIAL3_CTRL_, clk_mode_, v9) << R_SYNC_SERIAL3_CTRL__clk_mode__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__clk_halt__##f10_##_VAL(R_SYNC_SERIAL3_CTRL_, clk_halt_, v10) << R_SYNC_SERIAL3_CTRL__clk_halt__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__bitorder__##f11_##_VAL(R_SYNC_SERIAL3_CTRL_, bitorder_, v11) << R_SYNC_SERIAL3_CTRL__bitorder__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__tr_enable__##f12_##_VAL(R_SYNC_SERIAL3_CTRL_, tr_enable_, v12) << R_SYNC_SERIAL3_CTRL__tr_enable__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__wordsize__##f13_##_VAL(R_SYNC_SERIAL3_CTRL_, wordsize_, v13) << R_SYNC_SERIAL3_CTRL__wordsize__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__buf_empty__##f14_##_VAL(R_SYNC_SERIAL3_CTRL_, buf_empty_, v14) << R_SYNC_SERIAL3_CTRL__buf_empty__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__buf_full__##f15_##_VAL(R_SYNC_SERIAL3_CTRL_, buf_full_, v15) << R_SYNC_SERIAL3_CTRL__buf_full__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__flow_ctrl__##f16_##_VAL(R_SYNC_SERIAL3_CTRL_, flow_ctrl_, v16) << R_SYNC_SERIAL3_CTRL__flow_ctrl__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__clk_polarity__##f17_##_VAL(R_SYNC_SERIAL3_CTRL_, clk_polarity_, v17) << R_SYNC_SERIAL3_CTRL__clk_polarity__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__frame_polarity__##f18_##_VAL(R_SYNC_SERIAL3_CTRL_, frame_polarity_, v18) << R_SYNC_SERIAL3_CTRL__frame_polarity__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__status_polarity__##f19_##_VAL(R_SYNC_SERIAL3_CTRL_, status_polarity_, v19) << R_SYNC_SERIAL3_CTRL__status_polarity__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__clk_driver__##f20_##_VAL(R_SYNC_SERIAL3_CTRL_, clk_driver_, v20) << R_SYNC_SERIAL3_CTRL__clk_driver__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__frame_driver__##f21_##_VAL(R_SYNC_SERIAL3_CTRL_, frame_driver_, v21) << R_SYNC_SERIAL3_CTRL__frame_driver__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__status_driver__##f22_##_VAL(R_SYNC_SERIAL3_CTRL_, status_driver_, v22) << R_SYNC_SERIAL3_CTRL__status_driver__BITNR) | \
+ (R_SYNC_SERIAL3_CTRL__def_out0__##f23_##_VAL(R_SYNC_SERIAL3_CTRL_, def_out0_, v23) << R_SYNC_SERIAL3_CTRL__def_out0__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SYNC_SERIAL3_REC_BYTE
+ * - type: RO
+ * - addr: 0xb000007c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SYNC_SERIAL3_REC_BYTE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SYNC_SERIAL3_REC_BYTE(f1,v1) ( \
+ (R_SYNC_SERIAL3_REC_BYTE__data_in__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL3_REC_BYTE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL3_REC_BYTE.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL3_REC_BYTE(f1,v1) ( \
+ (R_SYNC_SERIAL3_REC_BYTE__data_in__##f1##__VAL(R_SYNC_SERIAL3_REC_BYTE_, data_in_, v1) << R_SYNC_SERIAL3_REC_BYTE__data_in__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL3_REC_BYTE_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL3_REC_BYTE.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL3_REC_BYTE_(f1_,v1) ( \
+ (R_SYNC_SERIAL3_REC_BYTE__data_in__##f1_##_VAL(R_SYNC_SERIAL3_REC_BYTE_, data_in_, v1) << R_SYNC_SERIAL3_REC_BYTE__data_in__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SYNC_SERIAL3_REC_DATA
+ * - type: RO
+ * - addr: 0xb000007c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SYNC_SERIAL3_REC_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SYNC_SERIAL3_REC_DATA(f1,v1) ( \
+ (R_SYNC_SERIAL3_REC_DATA__data_in__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL3_REC_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL3_REC_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL3_REC_DATA(f1,v1) ( \
+ (R_SYNC_SERIAL3_REC_DATA__data_in__##f1##__VAL(R_SYNC_SERIAL3_REC_DATA_, data_in_, v1) << R_SYNC_SERIAL3_REC_DATA__data_in__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL3_REC_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL3_REC_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL3_REC_DATA_(f1_,v1) ( \
+ (R_SYNC_SERIAL3_REC_DATA__data_in__##f1_##_VAL(R_SYNC_SERIAL3_REC_DATA_, data_in_, v1) << R_SYNC_SERIAL3_REC_DATA__data_in__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SYNC_SERIAL3_REC_WORD
+ * - type: RO
+ * - addr: 0xb000007c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SYNC_SERIAL3_REC_WORD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SYNC_SERIAL3_REC_WORD(f1,v1) ( \
+ (R_SYNC_SERIAL3_REC_WORD__data_in__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL3_REC_WORD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL3_REC_WORD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL3_REC_WORD(f1,v1) ( \
+ (R_SYNC_SERIAL3_REC_WORD__data_in__##f1##__VAL(R_SYNC_SERIAL3_REC_WORD_, data_in_, v1) << R_SYNC_SERIAL3_REC_WORD__data_in__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL3_REC_WORD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL3_REC_WORD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL3_REC_WORD_(f1_,v1) ( \
+ (R_SYNC_SERIAL3_REC_WORD__data_in__##f1_##_VAL(R_SYNC_SERIAL3_REC_WORD_, data_in_, v1) << R_SYNC_SERIAL3_REC_WORD__data_in__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SYNC_SERIAL3_STATUS
+ * - type: RO
+ * - addr: 0xb0000078
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SYNC_SERIAL3_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SYNC_SERIAL3_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_SYNC_SERIAL3_STATUS__rec_status__##f1##__MASK & REG__##v1) | \
+ (R_SYNC_SERIAL3_STATUS__tr_empty__##f2##__MASK & REG__##v2) | \
+ (R_SYNC_SERIAL3_STATUS__tr_ready__##f3##__MASK & REG__##v3) | \
+ (R_SYNC_SERIAL3_STATUS__pin_1__##f4##__MASK & REG__##v4) | \
+ (R_SYNC_SERIAL3_STATUS__pin_0__##f5##__MASK & REG__##v5) | \
+ (R_SYNC_SERIAL3_STATUS__underflow__##f6##__MASK & REG__##v6) | \
+ (R_SYNC_SERIAL3_STATUS__overrun__##f7##__MASK & REG__##v7) | \
+ (R_SYNC_SERIAL3_STATUS__data_avail__##f8##__MASK & REG__##v8) | \
+ (R_SYNC_SERIAL3_STATUS__data__##f9##__MASK & REG__##v9) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL3_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL3_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL3_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_SYNC_SERIAL3_STATUS__rec_status__##f1##__VAL(R_SYNC_SERIAL3_STATUS_, rec_status_, v1) << R_SYNC_SERIAL3_STATUS__rec_status__BITNR) | \
+ (R_SYNC_SERIAL3_STATUS__tr_empty__##f2##__VAL(R_SYNC_SERIAL3_STATUS_, tr_empty_, v2) << R_SYNC_SERIAL3_STATUS__tr_empty__BITNR) | \
+ (R_SYNC_SERIAL3_STATUS__tr_ready__##f3##__VAL(R_SYNC_SERIAL3_STATUS_, tr_ready_, v3) << R_SYNC_SERIAL3_STATUS__tr_ready__BITNR) | \
+ (R_SYNC_SERIAL3_STATUS__pin_1__##f4##__VAL(R_SYNC_SERIAL3_STATUS_, pin_1_, v4) << R_SYNC_SERIAL3_STATUS__pin_1__BITNR) | \
+ (R_SYNC_SERIAL3_STATUS__pin_0__##f5##__VAL(R_SYNC_SERIAL3_STATUS_, pin_0_, v5) << R_SYNC_SERIAL3_STATUS__pin_0__BITNR) | \
+ (R_SYNC_SERIAL3_STATUS__underflow__##f6##__VAL(R_SYNC_SERIAL3_STATUS_, underflow_, v6) << R_SYNC_SERIAL3_STATUS__underflow__BITNR) | \
+ (R_SYNC_SERIAL3_STATUS__overrun__##f7##__VAL(R_SYNC_SERIAL3_STATUS_, overrun_, v7) << R_SYNC_SERIAL3_STATUS__overrun__BITNR) | \
+ (R_SYNC_SERIAL3_STATUS__data_avail__##f8##__VAL(R_SYNC_SERIAL3_STATUS_, data_avail_, v8) << R_SYNC_SERIAL3_STATUS__data_avail__BITNR) | \
+ (R_SYNC_SERIAL3_STATUS__data__##f9##__VAL(R_SYNC_SERIAL3_STATUS_, data_, v9) << R_SYNC_SERIAL3_STATUS__data__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL3_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL3_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL3_STATUS_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9) ( \
+ (R_SYNC_SERIAL3_STATUS__rec_status__##f1_##_VAL(R_SYNC_SERIAL3_STATUS_, rec_status_, v1) << R_SYNC_SERIAL3_STATUS__rec_status__BITNR) | \
+ (R_SYNC_SERIAL3_STATUS__tr_empty__##f2_##_VAL(R_SYNC_SERIAL3_STATUS_, tr_empty_, v2) << R_SYNC_SERIAL3_STATUS__tr_empty__BITNR) | \
+ (R_SYNC_SERIAL3_STATUS__tr_ready__##f3_##_VAL(R_SYNC_SERIAL3_STATUS_, tr_ready_, v3) << R_SYNC_SERIAL3_STATUS__tr_ready__BITNR) | \
+ (R_SYNC_SERIAL3_STATUS__pin_1__##f4_##_VAL(R_SYNC_SERIAL3_STATUS_, pin_1_, v4) << R_SYNC_SERIAL3_STATUS__pin_1__BITNR) | \
+ (R_SYNC_SERIAL3_STATUS__pin_0__##f5_##_VAL(R_SYNC_SERIAL3_STATUS_, pin_0_, v5) << R_SYNC_SERIAL3_STATUS__pin_0__BITNR) | \
+ (R_SYNC_SERIAL3_STATUS__underflow__##f6_##_VAL(R_SYNC_SERIAL3_STATUS_, underflow_, v6) << R_SYNC_SERIAL3_STATUS__underflow__BITNR) | \
+ (R_SYNC_SERIAL3_STATUS__overrun__##f7_##_VAL(R_SYNC_SERIAL3_STATUS_, overrun_, v7) << R_SYNC_SERIAL3_STATUS__overrun__BITNR) | \
+ (R_SYNC_SERIAL3_STATUS__data_avail__##f8_##_VAL(R_SYNC_SERIAL3_STATUS_, data_avail_, v8) << R_SYNC_SERIAL3_STATUS__data_avail__BITNR) | \
+ (R_SYNC_SERIAL3_STATUS__data__##f9_##_VAL(R_SYNC_SERIAL3_STATUS_, data_, v9) << R_SYNC_SERIAL3_STATUS__data__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SYNC_SERIAL3_TR_BYTE
+ * - type: WO
+ * - addr: 0xb000007c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SYNC_SERIAL3_TR_BYTE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SYNC_SERIAL3_TR_BYTE.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SYNC_SERIAL3_TR_BYTE.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SYNC_SERIAL3_TR_BYTE(f1,v1) ( \
+ *R_SYNC_SERIAL3_TR_BYTE__SADDR = ( \
+ REG_INITIATED(R_SYNC_SERIAL3_TR_BYTE_) \
+ REG_VAL__R_SYNC_SERIAL3_TR_BYTE_(f1##_,v1) \
+ ), \
+ R_SYNC_SERIAL3_TR_BYTE__WRITE(R_SYNC_SERIAL3_TR_BYTE__ADDR, *R_SYNC_SERIAL3_TR_BYTE__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SYNC_SERIAL3_TR_BYTE__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SYNC_SERIAL3_TR_BYTE.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SYNC_SERIAL3_TR_BYTE.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SYNC_SERIAL3_TR_BYTE__SHADOW(f1,v1) ( \
+ *R_SYNC_SERIAL3_TR_BYTE__SADDR = ( \
+ REG_INITIATED(R_SYNC_SERIAL3_TR_BYTE_) \
+ REG_VAL__R_SYNC_SERIAL3_TR_BYTE_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SYNC_SERIAL3_TR_BYTE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SYNC_SERIAL3_TR_BYTE(f1,v1) ( \
+ (R_SYNC_SERIAL3_TR_BYTE__data_out__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL3_TR_BYTE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL3_TR_BYTE.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL3_TR_BYTE(f1,v1) ( \
+ (R_SYNC_SERIAL3_TR_BYTE__data_out__##f1##__VAL(R_SYNC_SERIAL3_TR_BYTE_, data_out_, v1) << R_SYNC_SERIAL3_TR_BYTE__data_out__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL3_TR_BYTE_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL3_TR_BYTE.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL3_TR_BYTE_(f1_,v1) ( \
+ (R_SYNC_SERIAL3_TR_BYTE__data_out__##f1_##_VAL(R_SYNC_SERIAL3_TR_BYTE_, data_out_, v1) << R_SYNC_SERIAL3_TR_BYTE__data_out__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SYNC_SERIAL3_TR_DATA
+ * - type: WO
+ * - addr: 0xb000007c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SYNC_SERIAL3_TR_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SYNC_SERIAL3_TR_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SYNC_SERIAL3_TR_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SYNC_SERIAL3_TR_DATA(f1,v1) ( \
+ *R_SYNC_SERIAL3_TR_DATA__SADDR = ( \
+ REG_INITIATED(R_SYNC_SERIAL3_TR_DATA_) \
+ REG_VAL__R_SYNC_SERIAL3_TR_DATA_(f1##_,v1) \
+ ), \
+ R_SYNC_SERIAL3_TR_DATA__WRITE(R_SYNC_SERIAL3_TR_DATA__ADDR, *R_SYNC_SERIAL3_TR_DATA__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SYNC_SERIAL3_TR_DATA__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SYNC_SERIAL3_TR_DATA.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SYNC_SERIAL3_TR_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SYNC_SERIAL3_TR_DATA__SHADOW(f1,v1) ( \
+ *R_SYNC_SERIAL3_TR_DATA__SADDR = ( \
+ REG_INITIATED(R_SYNC_SERIAL3_TR_DATA_) \
+ REG_VAL__R_SYNC_SERIAL3_TR_DATA_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SYNC_SERIAL3_TR_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SYNC_SERIAL3_TR_DATA(f1,v1) ( \
+ (R_SYNC_SERIAL3_TR_DATA__data_out__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL3_TR_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL3_TR_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL3_TR_DATA(f1,v1) ( \
+ (R_SYNC_SERIAL3_TR_DATA__data_out__##f1##__VAL(R_SYNC_SERIAL3_TR_DATA_, data_out_, v1) << R_SYNC_SERIAL3_TR_DATA__data_out__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL3_TR_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL3_TR_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL3_TR_DATA_(f1_,v1) ( \
+ (R_SYNC_SERIAL3_TR_DATA__data_out__##f1_##_VAL(R_SYNC_SERIAL3_TR_DATA_, data_out_, v1) << R_SYNC_SERIAL3_TR_DATA__data_out__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SYNC_SERIAL3_TR_WORD
+ * - type: WO
+ * - addr: 0xb000007c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SYNC_SERIAL3_TR_WORD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SYNC_SERIAL3_TR_WORD.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SYNC_SERIAL3_TR_WORD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SYNC_SERIAL3_TR_WORD(f1,v1) ( \
+ *R_SYNC_SERIAL3_TR_WORD__SADDR = ( \
+ REG_INITIATED(R_SYNC_SERIAL3_TR_WORD_) \
+ REG_VAL__R_SYNC_SERIAL3_TR_WORD_(f1##_,v1) \
+ ), \
+ R_SYNC_SERIAL3_TR_WORD__WRITE(R_SYNC_SERIAL3_TR_WORD__ADDR, *R_SYNC_SERIAL3_TR_WORD__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SYNC_SERIAL3_TR_WORD__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SYNC_SERIAL3_TR_WORD.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SYNC_SERIAL3_TR_WORD.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SYNC_SERIAL3_TR_WORD__SHADOW(f1,v1) ( \
+ *R_SYNC_SERIAL3_TR_WORD__SADDR = ( \
+ REG_INITIATED(R_SYNC_SERIAL3_TR_WORD_) \
+ REG_VAL__R_SYNC_SERIAL3_TR_WORD_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SYNC_SERIAL3_TR_WORD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SYNC_SERIAL3_TR_WORD(f1,v1) ( \
+ (R_SYNC_SERIAL3_TR_WORD__data_out__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL3_TR_WORD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL3_TR_WORD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL3_TR_WORD(f1,v1) ( \
+ (R_SYNC_SERIAL3_TR_WORD__data_out__##f1##__VAL(R_SYNC_SERIAL3_TR_WORD_, data_out_, v1) << R_SYNC_SERIAL3_TR_WORD__data_out__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL3_TR_WORD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL3_TR_WORD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL3_TR_WORD_(f1_,v1) ( \
+ (R_SYNC_SERIAL3_TR_WORD__data_out__##f1_##_VAL(R_SYNC_SERIAL3_TR_WORD_, data_out_, v1) << R_SYNC_SERIAL3_TR_WORD__data_out__BITNR) \
+)
+
+#endif
+
+/*
+ * R_SYNC_SERIAL_PRESCALE
+ * - type: WO
+ * - addr: 0xb00000f4
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SYNC_SERIAL_PRESCALE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SYNC_SERIAL_PRESCALE.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_SYNC_SERIAL_PRESCALE.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SYNC_SERIAL_PRESCALE(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_SYNC_SERIAL_PRESCALE__SADDR = ( \
+ REG_INITIATED(R_SYNC_SERIAL_PRESCALE_) \
+ REG_VAL__R_SYNC_SERIAL_PRESCALE_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ), \
+ R_SYNC_SERIAL_PRESCALE__WRITE(R_SYNC_SERIAL_PRESCALE__ADDR, *R_SYNC_SERIAL_PRESCALE__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_SYNC_SERIAL_PRESCALE__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_SYNC_SERIAL_PRESCALE.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_SYNC_SERIAL_PRESCALE.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_SYNC_SERIAL_PRESCALE__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ *R_SYNC_SERIAL_PRESCALE__SADDR = ( \
+ REG_INITIATED(R_SYNC_SERIAL_PRESCALE_) \
+ REG_VAL__R_SYNC_SERIAL_PRESCALE_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_SYNC_SERIAL_PRESCALE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_SYNC_SERIAL_PRESCALE(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SYNC_SERIAL_PRESCALE__clk_sel_u3__##f1##__MASK & REG__##v1) | \
+ (R_SYNC_SERIAL_PRESCALE__word_stb_sel_u3__##f2##__MASK & REG__##v2) | \
+ (R_SYNC_SERIAL_PRESCALE__clk_sel_u1__##f3##__MASK & REG__##v3) | \
+ (R_SYNC_SERIAL_PRESCALE__word_stb_sel_u1__##f4##__MASK & REG__##v4) | \
+ (R_SYNC_SERIAL_PRESCALE__prescaler__##f5##__MASK & REG__##v5) | \
+ (R_SYNC_SERIAL_PRESCALE__warp_mode__##f6##__MASK & REG__##v6) | \
+ (R_SYNC_SERIAL_PRESCALE__frame_rate__##f7##__MASK & REG__##v7) | \
+ (R_SYNC_SERIAL_PRESCALE__word_rate__##f8##__MASK & REG__##v8) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL_PRESCALE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL_PRESCALE.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL_PRESCALE(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8) ( \
+ (R_SYNC_SERIAL_PRESCALE__clk_sel_u3__##f1##__VAL(R_SYNC_SERIAL_PRESCALE_, clk_sel_u3_, v1) << R_SYNC_SERIAL_PRESCALE__clk_sel_u3__BITNR) | \
+ (R_SYNC_SERIAL_PRESCALE__word_stb_sel_u3__##f2##__VAL(R_SYNC_SERIAL_PRESCALE_, word_stb_sel_u3_, v2) << R_SYNC_SERIAL_PRESCALE__word_stb_sel_u3__BITNR) | \
+ (R_SYNC_SERIAL_PRESCALE__clk_sel_u1__##f3##__VAL(R_SYNC_SERIAL_PRESCALE_, clk_sel_u1_, v3) << R_SYNC_SERIAL_PRESCALE__clk_sel_u1__BITNR) | \
+ (R_SYNC_SERIAL_PRESCALE__word_stb_sel_u1__##f4##__VAL(R_SYNC_SERIAL_PRESCALE_, word_stb_sel_u1_, v4) << R_SYNC_SERIAL_PRESCALE__word_stb_sel_u1__BITNR) | \
+ (R_SYNC_SERIAL_PRESCALE__prescaler__##f5##__VAL(R_SYNC_SERIAL_PRESCALE_, prescaler_, v5) << R_SYNC_SERIAL_PRESCALE__prescaler__BITNR) | \
+ (R_SYNC_SERIAL_PRESCALE__warp_mode__##f6##__VAL(R_SYNC_SERIAL_PRESCALE_, warp_mode_, v6) << R_SYNC_SERIAL_PRESCALE__warp_mode__BITNR) | \
+ (R_SYNC_SERIAL_PRESCALE__frame_rate__##f7##__VAL(R_SYNC_SERIAL_PRESCALE_, frame_rate_, v7) << R_SYNC_SERIAL_PRESCALE__frame_rate__BITNR) | \
+ (R_SYNC_SERIAL_PRESCALE__word_rate__##f8##__VAL(R_SYNC_SERIAL_PRESCALE_, word_rate_, v8) << R_SYNC_SERIAL_PRESCALE__word_rate__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_SYNC_SERIAL_PRESCALE_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_SYNC_SERIAL_PRESCALE.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_SYNC_SERIAL_PRESCALE_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8) ( \
+ (R_SYNC_SERIAL_PRESCALE__clk_sel_u3__##f1_##_VAL(R_SYNC_SERIAL_PRESCALE_, clk_sel_u3_, v1) << R_SYNC_SERIAL_PRESCALE__clk_sel_u3__BITNR) | \
+ (R_SYNC_SERIAL_PRESCALE__word_stb_sel_u3__##f2_##_VAL(R_SYNC_SERIAL_PRESCALE_, word_stb_sel_u3_, v2) << R_SYNC_SERIAL_PRESCALE__word_stb_sel_u3__BITNR) | \
+ (R_SYNC_SERIAL_PRESCALE__clk_sel_u1__##f3_##_VAL(R_SYNC_SERIAL_PRESCALE_, clk_sel_u1_, v3) << R_SYNC_SERIAL_PRESCALE__clk_sel_u1__BITNR) | \
+ (R_SYNC_SERIAL_PRESCALE__word_stb_sel_u1__##f4_##_VAL(R_SYNC_SERIAL_PRESCALE_, word_stb_sel_u1_, v4) << R_SYNC_SERIAL_PRESCALE__word_stb_sel_u1__BITNR) | \
+ (R_SYNC_SERIAL_PRESCALE__prescaler__##f5_##_VAL(R_SYNC_SERIAL_PRESCALE_, prescaler_, v5) << R_SYNC_SERIAL_PRESCALE__prescaler__BITNR) | \
+ (R_SYNC_SERIAL_PRESCALE__warp_mode__##f6_##_VAL(R_SYNC_SERIAL_PRESCALE_, warp_mode_, v6) << R_SYNC_SERIAL_PRESCALE__warp_mode__BITNR) | \
+ (R_SYNC_SERIAL_PRESCALE__frame_rate__##f7_##_VAL(R_SYNC_SERIAL_PRESCALE_, frame_rate_, v7) << R_SYNC_SERIAL_PRESCALE__frame_rate__BITNR) | \
+ (R_SYNC_SERIAL_PRESCALE__word_rate__##f8_##_VAL(R_SYNC_SERIAL_PRESCALE_, word_rate_, v8) << R_SYNC_SERIAL_PRESCALE__word_rate__BITNR) \
+)
+
+#endif
+
+/*
+ * R_TEST_MODE
+ * - type: WO
+ * - addr: 0xb00000fc
+ * - group: Test mode registers
+ */
+
+#if USE_GROUP__Test_mode_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_TEST_MODE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_TEST_MODE.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_TEST_MODE.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_TEST_MODE(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16) ( \
+ *R_TEST_MODE__SADDR = ( \
+ REG_INITIATED(R_TEST_MODE_) \
+ REG_VAL__R_TEST_MODE_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16) \
+ ), \
+ R_TEST_MODE__WRITE(R_TEST_MODE__ADDR, *R_TEST_MODE__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_TEST_MODE__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_TEST_MODE.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_TEST_MODE.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_TEST_MODE__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16) ( \
+ *R_TEST_MODE__SADDR = ( \
+ REG_INITIATED(R_TEST_MODE_) \
+ REG_VAL__R_TEST_MODE_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_TEST_MODE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_TEST_MODE(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16) ( \
+ (R_TEST_MODE__single_step__##f1##__MASK & REG__##v1) | \
+ (R_TEST_MODE__step_wr__##f2##__MASK & REG__##v2) | \
+ (R_TEST_MODE__step_rd__##f3##__MASK & REG__##v3) | \
+ (R_TEST_MODE__step_fetch__##f4##__MASK & REG__##v4) | \
+ (R_TEST_MODE__mmu_test__##f5##__MASK & REG__##v5) | \
+ (R_TEST_MODE__usb_test__##f6##__MASK & REG__##v6) | \
+ (R_TEST_MODE__scsi_timer_test__##f7##__MASK & REG__##v7) | \
+ (R_TEST_MODE__backoff__##f8##__MASK & REG__##v8) | \
+ (R_TEST_MODE__snmp_test__##f9##__MASK & REG__##v9) | \
+ (R_TEST_MODE__snmp_inc__##f10##__MASK & REG__##v10) | \
+ (R_TEST_MODE__ser_loop__##f11##__MASK & REG__##v11) | \
+ (R_TEST_MODE__baudrate__##f12##__MASK & REG__##v12) | \
+ (R_TEST_MODE__timer__##f13##__MASK & REG__##v13) | \
+ (R_TEST_MODE__cache_test__##f14##__MASK & REG__##v14) | \
+ (R_TEST_MODE__tag_test__##f15##__MASK & REG__##v15) | \
+ (R_TEST_MODE__cache_enable__##f16##__MASK & REG__##v16) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TEST_MODE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TEST_MODE.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_TEST_MODE(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16) ( \
+ (R_TEST_MODE__single_step__##f1##__VAL(R_TEST_MODE_, single_step_, v1) << R_TEST_MODE__single_step__BITNR) | \
+ (R_TEST_MODE__step_wr__##f2##__VAL(R_TEST_MODE_, step_wr_, v2) << R_TEST_MODE__step_wr__BITNR) | \
+ (R_TEST_MODE__step_rd__##f3##__VAL(R_TEST_MODE_, step_rd_, v3) << R_TEST_MODE__step_rd__BITNR) | \
+ (R_TEST_MODE__step_fetch__##f4##__VAL(R_TEST_MODE_, step_fetch_, v4) << R_TEST_MODE__step_fetch__BITNR) | \
+ (R_TEST_MODE__mmu_test__##f5##__VAL(R_TEST_MODE_, mmu_test_, v5) << R_TEST_MODE__mmu_test__BITNR) | \
+ (R_TEST_MODE__usb_test__##f6##__VAL(R_TEST_MODE_, usb_test_, v6) << R_TEST_MODE__usb_test__BITNR) | \
+ (R_TEST_MODE__scsi_timer_test__##f7##__VAL(R_TEST_MODE_, scsi_timer_test_, v7) << R_TEST_MODE__scsi_timer_test__BITNR) | \
+ (R_TEST_MODE__backoff__##f8##__VAL(R_TEST_MODE_, backoff_, v8) << R_TEST_MODE__backoff__BITNR) | \
+ (R_TEST_MODE__snmp_test__##f9##__VAL(R_TEST_MODE_, snmp_test_, v9) << R_TEST_MODE__snmp_test__BITNR) | \
+ (R_TEST_MODE__snmp_inc__##f10##__VAL(R_TEST_MODE_, snmp_inc_, v10) << R_TEST_MODE__snmp_inc__BITNR) | \
+ (R_TEST_MODE__ser_loop__##f11##__VAL(R_TEST_MODE_, ser_loop_, v11) << R_TEST_MODE__ser_loop__BITNR) | \
+ (R_TEST_MODE__baudrate__##f12##__VAL(R_TEST_MODE_, baudrate_, v12) << R_TEST_MODE__baudrate__BITNR) | \
+ (R_TEST_MODE__timer__##f13##__VAL(R_TEST_MODE_, timer_, v13) << R_TEST_MODE__timer__BITNR) | \
+ (R_TEST_MODE__cache_test__##f14##__VAL(R_TEST_MODE_, cache_test_, v14) << R_TEST_MODE__cache_test__BITNR) | \
+ (R_TEST_MODE__tag_test__##f15##__VAL(R_TEST_MODE_, tag_test_, v15) << R_TEST_MODE__tag_test__BITNR) | \
+ (R_TEST_MODE__cache_enable__##f16##__VAL(R_TEST_MODE_, cache_enable_, v16) << R_TEST_MODE__cache_enable__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TEST_MODE_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TEST_MODE.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_TEST_MODE_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16) ( \
+ (R_TEST_MODE__single_step__##f1_##_VAL(R_TEST_MODE_, single_step_, v1) << R_TEST_MODE__single_step__BITNR) | \
+ (R_TEST_MODE__step_wr__##f2_##_VAL(R_TEST_MODE_, step_wr_, v2) << R_TEST_MODE__step_wr__BITNR) | \
+ (R_TEST_MODE__step_rd__##f3_##_VAL(R_TEST_MODE_, step_rd_, v3) << R_TEST_MODE__step_rd__BITNR) | \
+ (R_TEST_MODE__step_fetch__##f4_##_VAL(R_TEST_MODE_, step_fetch_, v4) << R_TEST_MODE__step_fetch__BITNR) | \
+ (R_TEST_MODE__mmu_test__##f5_##_VAL(R_TEST_MODE_, mmu_test_, v5) << R_TEST_MODE__mmu_test__BITNR) | \
+ (R_TEST_MODE__usb_test__##f6_##_VAL(R_TEST_MODE_, usb_test_, v6) << R_TEST_MODE__usb_test__BITNR) | \
+ (R_TEST_MODE__scsi_timer_test__##f7_##_VAL(R_TEST_MODE_, scsi_timer_test_, v7) << R_TEST_MODE__scsi_timer_test__BITNR) | \
+ (R_TEST_MODE__backoff__##f8_##_VAL(R_TEST_MODE_, backoff_, v8) << R_TEST_MODE__backoff__BITNR) | \
+ (R_TEST_MODE__snmp_test__##f9_##_VAL(R_TEST_MODE_, snmp_test_, v9) << R_TEST_MODE__snmp_test__BITNR) | \
+ (R_TEST_MODE__snmp_inc__##f10_##_VAL(R_TEST_MODE_, snmp_inc_, v10) << R_TEST_MODE__snmp_inc__BITNR) | \
+ (R_TEST_MODE__ser_loop__##f11_##_VAL(R_TEST_MODE_, ser_loop_, v11) << R_TEST_MODE__ser_loop__BITNR) | \
+ (R_TEST_MODE__baudrate__##f12_##_VAL(R_TEST_MODE_, baudrate_, v12) << R_TEST_MODE__baudrate__BITNR) | \
+ (R_TEST_MODE__timer__##f13_##_VAL(R_TEST_MODE_, timer_, v13) << R_TEST_MODE__timer__BITNR) | \
+ (R_TEST_MODE__cache_test__##f14_##_VAL(R_TEST_MODE_, cache_test_, v14) << R_TEST_MODE__cache_test__BITNR) | \
+ (R_TEST_MODE__tag_test__##f15_##_VAL(R_TEST_MODE_, tag_test_, v15) << R_TEST_MODE__tag_test__BITNR) | \
+ (R_TEST_MODE__cache_enable__##f16_##_VAL(R_TEST_MODE_, cache_enable_, v16) << R_TEST_MODE__cache_enable__BITNR) \
+)
+
+#endif
+
+/*
+ * R_TIMER01_DATA
+ * - type: RO
+ * - addr: 0xb0000022
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_TIMER01_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_TIMER01_DATA(f1,v1) ( \
+ (R_TIMER01_DATA__count__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TIMER01_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TIMER01_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_TIMER01_DATA(f1,v1) ( \
+ (R_TIMER01_DATA__count__##f1##__VAL(R_TIMER01_DATA_, count_, v1) << R_TIMER01_DATA__count__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TIMER01_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TIMER01_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_TIMER01_DATA_(f1_,v1) ( \
+ (R_TIMER01_DATA__count__##f1_##_VAL(R_TIMER01_DATA_, count_, v1) << R_TIMER01_DATA__count__BITNR) \
+)
+
+#endif
+
+/*
+ * R_TIMER0_DATA
+ * - type: RO
+ * - addr: 0xb0000022
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_TIMER0_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_TIMER0_DATA(f1,v1) ( \
+ (R_TIMER0_DATA__count__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TIMER0_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TIMER0_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_TIMER0_DATA(f1,v1) ( \
+ (R_TIMER0_DATA__count__##f1##__VAL(R_TIMER0_DATA_, count_, v1) << R_TIMER0_DATA__count__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TIMER0_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TIMER0_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_TIMER0_DATA_(f1_,v1) ( \
+ (R_TIMER0_DATA__count__##f1_##_VAL(R_TIMER0_DATA_, count_, v1) << R_TIMER0_DATA__count__BITNR) \
+)
+
+#endif
+
+/*
+ * R_TIMER1_DATA
+ * - type: RO
+ * - addr: 0xb0000023
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_TIMER1_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_TIMER1_DATA(f1,v1) ( \
+ (R_TIMER1_DATA__count__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TIMER1_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TIMER1_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_TIMER1_DATA(f1,v1) ( \
+ (R_TIMER1_DATA__count__##f1##__VAL(R_TIMER1_DATA_, count_, v1) << R_TIMER1_DATA__count__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TIMER1_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TIMER1_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_TIMER1_DATA_(f1_,v1) ( \
+ (R_TIMER1_DATA__count__##f1_##_VAL(R_TIMER1_DATA_, count_, v1) << R_TIMER1_DATA__count__BITNR) \
+)
+
+#endif
+
+/*
+ * R_TIMER_CTRL
+ * - type: WO
+ * - addr: 0xb0000020
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_TIMER_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_TIMER_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_TIMER_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_TIMER_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ *R_TIMER_CTRL__SADDR = ( \
+ REG_INITIATED(R_TIMER_CTRL_) \
+ REG_VAL__R_TIMER_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10) \
+ ), \
+ R_TIMER_CTRL__WRITE(R_TIMER_CTRL__ADDR, *R_TIMER_CTRL__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_TIMER_CTRL__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_TIMER_CTRL.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_TIMER_CTRL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_TIMER_CTRL__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ *R_TIMER_CTRL__SADDR = ( \
+ REG_INITIATED(R_TIMER_CTRL_) \
+ REG_VAL__R_TIMER_CTRL_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_TIMER_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_TIMER_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ (R_TIMER_CTRL__timerdiv1__##f1##__MASK & REG__##v1) | \
+ (R_TIMER_CTRL__timerdiv0__##f2##__MASK & REG__##v2) | \
+ (R_TIMER_CTRL__presc_timer1__##f3##__MASK & REG__##v3) | \
+ (R_TIMER_CTRL__i1__##f4##__MASK & REG__##v4) | \
+ (R_TIMER_CTRL__tm1__##f5##__MASK & REG__##v5) | \
+ (R_TIMER_CTRL__clksel1__##f6##__MASK & REG__##v6) | \
+ (R_TIMER_CTRL__presc_ext__##f7##__MASK & REG__##v7) | \
+ (R_TIMER_CTRL__i0__##f8##__MASK & REG__##v8) | \
+ (R_TIMER_CTRL__tm0__##f9##__MASK & REG__##v9) | \
+ (R_TIMER_CTRL__clksel0__##f10##__MASK & REG__##v10) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TIMER_CTRL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TIMER_CTRL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_TIMER_CTRL(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ (R_TIMER_CTRL__timerdiv1__##f1##__VAL(R_TIMER_CTRL_, timerdiv1_, v1) << R_TIMER_CTRL__timerdiv1__BITNR) | \
+ (R_TIMER_CTRL__timerdiv0__##f2##__VAL(R_TIMER_CTRL_, timerdiv0_, v2) << R_TIMER_CTRL__timerdiv0__BITNR) | \
+ (R_TIMER_CTRL__presc_timer1__##f3##__VAL(R_TIMER_CTRL_, presc_timer1_, v3) << R_TIMER_CTRL__presc_timer1__BITNR) | \
+ (R_TIMER_CTRL__i1__##f4##__VAL(R_TIMER_CTRL_, i1_, v4) << R_TIMER_CTRL__i1__BITNR) | \
+ (R_TIMER_CTRL__tm1__##f5##__VAL(R_TIMER_CTRL_, tm1_, v5) << R_TIMER_CTRL__tm1__BITNR) | \
+ (R_TIMER_CTRL__clksel1__##f6##__VAL(R_TIMER_CTRL_, clksel1_, v6) << R_TIMER_CTRL__clksel1__BITNR) | \
+ (R_TIMER_CTRL__presc_ext__##f7##__VAL(R_TIMER_CTRL_, presc_ext_, v7) << R_TIMER_CTRL__presc_ext__BITNR) | \
+ (R_TIMER_CTRL__i0__##f8##__VAL(R_TIMER_CTRL_, i0_, v8) << R_TIMER_CTRL__i0__BITNR) | \
+ (R_TIMER_CTRL__tm0__##f9##__VAL(R_TIMER_CTRL_, tm0_, v9) << R_TIMER_CTRL__tm0__BITNR) | \
+ (R_TIMER_CTRL__clksel0__##f10##__VAL(R_TIMER_CTRL_, clksel0_, v10) << R_TIMER_CTRL__clksel0__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TIMER_CTRL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TIMER_CTRL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_TIMER_CTRL_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10) ( \
+ (R_TIMER_CTRL__timerdiv1__##f1_##_VAL(R_TIMER_CTRL_, timerdiv1_, v1) << R_TIMER_CTRL__timerdiv1__BITNR) | \
+ (R_TIMER_CTRL__timerdiv0__##f2_##_VAL(R_TIMER_CTRL_, timerdiv0_, v2) << R_TIMER_CTRL__timerdiv0__BITNR) | \
+ (R_TIMER_CTRL__presc_timer1__##f3_##_VAL(R_TIMER_CTRL_, presc_timer1_, v3) << R_TIMER_CTRL__presc_timer1__BITNR) | \
+ (R_TIMER_CTRL__i1__##f4_##_VAL(R_TIMER_CTRL_, i1_, v4) << R_TIMER_CTRL__i1__BITNR) | \
+ (R_TIMER_CTRL__tm1__##f5_##_VAL(R_TIMER_CTRL_, tm1_, v5) << R_TIMER_CTRL__tm1__BITNR) | \
+ (R_TIMER_CTRL__clksel1__##f6_##_VAL(R_TIMER_CTRL_, clksel1_, v6) << R_TIMER_CTRL__clksel1__BITNR) | \
+ (R_TIMER_CTRL__presc_ext__##f7_##_VAL(R_TIMER_CTRL_, presc_ext_, v7) << R_TIMER_CTRL__presc_ext__BITNR) | \
+ (R_TIMER_CTRL__i0__##f8_##_VAL(R_TIMER_CTRL_, i0_, v8) << R_TIMER_CTRL__i0__BITNR) | \
+ (R_TIMER_CTRL__tm0__##f9_##_VAL(R_TIMER_CTRL_, tm0_, v9) << R_TIMER_CTRL__tm0__BITNR) | \
+ (R_TIMER_CTRL__clksel0__##f10_##_VAL(R_TIMER_CTRL_, clksel0_, v10) << R_TIMER_CTRL__clksel0__BITNR) \
+)
+
+#endif
+
+/*
+ * R_TIMER_DATA
+ * - type: RO
+ * - addr: 0xb0000020
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_TIMER_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_TIMER_DATA(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ (R_TIMER_DATA__timer1__##f1##__MASK & REG__##v1) | \
+ (R_TIMER_DATA__timer0__##f2##__MASK & REG__##v2) | \
+ (R_TIMER_DATA__clkdiv_high__##f3##__MASK & REG__##v3) | \
+ (R_TIMER_DATA__clkdiv_low__##f4##__MASK & REG__##v4) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TIMER_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TIMER_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_TIMER_DATA(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ (R_TIMER_DATA__timer1__##f1##__VAL(R_TIMER_DATA_, timer1_, v1) << R_TIMER_DATA__timer1__BITNR) | \
+ (R_TIMER_DATA__timer0__##f2##__VAL(R_TIMER_DATA_, timer0_, v2) << R_TIMER_DATA__timer0__BITNR) | \
+ (R_TIMER_DATA__clkdiv_high__##f3##__VAL(R_TIMER_DATA_, clkdiv_high_, v3) << R_TIMER_DATA__clkdiv_high__BITNR) | \
+ (R_TIMER_DATA__clkdiv_low__##f4##__VAL(R_TIMER_DATA_, clkdiv_low_, v4) << R_TIMER_DATA__clkdiv_low__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TIMER_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TIMER_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_TIMER_DATA_(f1_,v1,f2_,v2,f3_,v3,f4_,v4) ( \
+ (R_TIMER_DATA__timer1__##f1_##_VAL(R_TIMER_DATA_, timer1_, v1) << R_TIMER_DATA__timer1__BITNR) | \
+ (R_TIMER_DATA__timer0__##f2_##_VAL(R_TIMER_DATA_, timer0_, v2) << R_TIMER_DATA__timer0__BITNR) | \
+ (R_TIMER_DATA__clkdiv_high__##f3_##_VAL(R_TIMER_DATA_, clkdiv_high_, v3) << R_TIMER_DATA__clkdiv_high__BITNR) | \
+ (R_TIMER_DATA__clkdiv_low__##f4_##_VAL(R_TIMER_DATA_, clkdiv_low_, v4) << R_TIMER_DATA__clkdiv_low__BITNR) \
+)
+
+#endif
+
+/*
+ * R_TIMER_PRESCALE
+ * - type: WO
+ * - addr: 0xb00000f0
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_TIMER_PRESCALE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_TIMER_PRESCALE.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_TIMER_PRESCALE.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_TIMER_PRESCALE(f1,v1) ( \
+ *R_TIMER_PRESCALE__SADDR = ( \
+ REG_INITIATED(R_TIMER_PRESCALE_) \
+ REG_VAL__R_TIMER_PRESCALE_(f1##_,v1) \
+ ), \
+ R_TIMER_PRESCALE__WRITE(R_TIMER_PRESCALE__ADDR, *R_TIMER_PRESCALE__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_TIMER_PRESCALE__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_TIMER_PRESCALE.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_TIMER_PRESCALE.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_TIMER_PRESCALE__SHADOW(f1,v1) ( \
+ *R_TIMER_PRESCALE__SADDR = ( \
+ REG_INITIATED(R_TIMER_PRESCALE_) \
+ REG_VAL__R_TIMER_PRESCALE_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_TIMER_PRESCALE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_TIMER_PRESCALE(f1,v1) ( \
+ (R_TIMER_PRESCALE__tim_presc__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TIMER_PRESCALE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TIMER_PRESCALE.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_TIMER_PRESCALE(f1,v1) ( \
+ (R_TIMER_PRESCALE__tim_presc__##f1##__VAL(R_TIMER_PRESCALE_, tim_presc_, v1) << R_TIMER_PRESCALE__tim_presc__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TIMER_PRESCALE_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TIMER_PRESCALE.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_TIMER_PRESCALE_(f1_,v1) ( \
+ (R_TIMER_PRESCALE__tim_presc__##f1_##_VAL(R_TIMER_PRESCALE_, tim_presc_, v1) << R_TIMER_PRESCALE__tim_presc__BITNR) \
+)
+
+#endif
+
+/*
+ * R_TIM_PRESC_STATUS
+ * - type: RO
+ * - addr: 0xb00000f0
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_TIM_PRESC_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_TIM_PRESC_STATUS(f1,v1) ( \
+ (R_TIM_PRESC_STATUS__tim_status__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TIM_PRESC_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TIM_PRESC_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_TIM_PRESC_STATUS(f1,v1) ( \
+ (R_TIM_PRESC_STATUS__tim_status__##f1##__VAL(R_TIM_PRESC_STATUS_, tim_status_, v1) << R_TIM_PRESC_STATUS__tim_status__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TIM_PRESC_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TIM_PRESC_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_TIM_PRESC_STATUS_(f1_,v1) ( \
+ (R_TIM_PRESC_STATUS__tim_status__##f1_##_VAL(R_TIM_PRESC_STATUS_, tim_status_, v1) << R_TIM_PRESC_STATUS__tim_status__BITNR) \
+)
+
+#endif
+
+/*
+ * R_TLB_HI
+ * - type: RW
+ * - addr: 0xb000025c
+ * - group: MMU registers
+ */
+
+#if USE_GROUP__MMU_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_TLB_HI
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_TLB_HI.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_TLB_HI.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_TLB_HI(f1,v1,f2,v2) ( \
+ R_TLB_HI__WRITE(R_TLB_HI__ADDR, ( \
+ REG_VAL__R_TLB_HI_(f1##_,v1,f2##_,v2) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_TLB_HI
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_TLB_HI(f1,v1,f2,v2) ( \
+ (R_TLB_HI__vpn__##f1##__MASK & REG__##v1) | \
+ (R_TLB_HI__page_id__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TLB_HI
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TLB_HI.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_TLB_HI(f1,v1,f2,v2) ( \
+ (R_TLB_HI__vpn__##f1##__VAL(R_TLB_HI_, vpn_, v1) << R_TLB_HI__vpn__BITNR) | \
+ (R_TLB_HI__page_id__##f2##__VAL(R_TLB_HI_, page_id_, v2) << R_TLB_HI__page_id__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TLB_HI_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TLB_HI.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_TLB_HI_(f1_,v1,f2_,v2) ( \
+ (R_TLB_HI__vpn__##f1_##_VAL(R_TLB_HI_, vpn_, v1) << R_TLB_HI__vpn__BITNR) | \
+ (R_TLB_HI__page_id__##f2_##_VAL(R_TLB_HI_, page_id_, v2) << R_TLB_HI__page_id__BITNR) \
+)
+
+#endif
+
+/*
+ * R_TLB_LO
+ * - type: RW
+ * - addr: 0xb0000258
+ * - group: MMU registers
+ */
+
+#if USE_GROUP__MMU_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_TLB_LO
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_TLB_LO.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_TLB_LO.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_TLB_LO(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) ( \
+ R_TLB_LO__WRITE(R_TLB_LO__ADDR, ( \
+ REG_VAL__R_TLB_LO_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_TLB_LO
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_TLB_LO(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) ( \
+ (R_TLB_LO__pfn__##f1##__MASK & REG__##v1) | \
+ (R_TLB_LO__global__##f2##__MASK & REG__##v2) | \
+ (R_TLB_LO__valid__##f3##__MASK & REG__##v3) | \
+ (R_TLB_LO__kernel__##f4##__MASK & REG__##v4) | \
+ (R_TLB_LO__we__##f5##__MASK & REG__##v5) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TLB_LO
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TLB_LO.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_TLB_LO(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) ( \
+ (R_TLB_LO__pfn__##f1##__VAL(R_TLB_LO_, pfn_, v1) << R_TLB_LO__pfn__BITNR) | \
+ (R_TLB_LO__global__##f2##__VAL(R_TLB_LO_, global_, v2) << R_TLB_LO__global__BITNR) | \
+ (R_TLB_LO__valid__##f3##__VAL(R_TLB_LO_, valid_, v3) << R_TLB_LO__valid__BITNR) | \
+ (R_TLB_LO__kernel__##f4##__VAL(R_TLB_LO_, kernel_, v4) << R_TLB_LO__kernel__BITNR) | \
+ (R_TLB_LO__we__##f5##__VAL(R_TLB_LO_, we_, v5) << R_TLB_LO__we__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TLB_LO_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TLB_LO.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_TLB_LO_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5) ( \
+ (R_TLB_LO__pfn__##f1_##_VAL(R_TLB_LO_, pfn_, v1) << R_TLB_LO__pfn__BITNR) | \
+ (R_TLB_LO__global__##f2_##_VAL(R_TLB_LO_, global_, v2) << R_TLB_LO__global__BITNR) | \
+ (R_TLB_LO__valid__##f3_##_VAL(R_TLB_LO_, valid_, v3) << R_TLB_LO__valid__BITNR) | \
+ (R_TLB_LO__kernel__##f4_##_VAL(R_TLB_LO_, kernel_, v4) << R_TLB_LO__kernel__BITNR) | \
+ (R_TLB_LO__we__##f5_##_VAL(R_TLB_LO_, we_, v5) << R_TLB_LO__we__BITNR) \
+)
+
+#endif
+
+/*
+ * R_TLB_SELECT
+ * - type: RW
+ * - addr: 0xb0000254
+ * - group: MMU registers
+ */
+
+#if USE_GROUP__MMU_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_TLB_SELECT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_TLB_SELECT.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_TLB_SELECT.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_TLB_SELECT(f1,v1) ( \
+ R_TLB_SELECT__WRITE(R_TLB_SELECT__ADDR, ( \
+ REG_VAL__R_TLB_SELECT_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_TLB_SELECT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_TLB_SELECT(f1,v1) ( \
+ (R_TLB_SELECT__index__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TLB_SELECT
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TLB_SELECT.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_TLB_SELECT(f1,v1) ( \
+ (R_TLB_SELECT__index__##f1##__VAL(R_TLB_SELECT_, index_, v1) << R_TLB_SELECT__index__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TLB_SELECT_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TLB_SELECT.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_TLB_SELECT_(f1_,v1) ( \
+ (R_TLB_SELECT__index__##f1_##_VAL(R_TLB_SELECT_, index_, v1) << R_TLB_SELECT__index__BITNR) \
+)
+
+#endif
+
+/*
+ * R_TR_COUNTERS
+ * - type: RO
+ * - addr: 0xb00000a8
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_TR_COUNTERS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_TR_COUNTERS(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ (R_TR_COUNTERS__deferred__##f1##__MASK & REG__##v1) | \
+ (R_TR_COUNTERS__late_col__##f2##__MASK & REG__##v2) | \
+ (R_TR_COUNTERS__multiple_col__##f3##__MASK & REG__##v3) | \
+ (R_TR_COUNTERS__single_col__##f4##__MASK & REG__##v4) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TR_COUNTERS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TR_COUNTERS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_TR_COUNTERS(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ (R_TR_COUNTERS__deferred__##f1##__VAL(R_TR_COUNTERS_, deferred_, v1) << R_TR_COUNTERS__deferred__BITNR) | \
+ (R_TR_COUNTERS__late_col__##f2##__VAL(R_TR_COUNTERS_, late_col_, v2) << R_TR_COUNTERS__late_col__BITNR) | \
+ (R_TR_COUNTERS__multiple_col__##f3##__VAL(R_TR_COUNTERS_, multiple_col_, v3) << R_TR_COUNTERS__multiple_col__BITNR) | \
+ (R_TR_COUNTERS__single_col__##f4##__VAL(R_TR_COUNTERS_, single_col_, v4) << R_TR_COUNTERS__single_col__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_TR_COUNTERS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_TR_COUNTERS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_TR_COUNTERS_(f1_,v1,f2_,v2,f3_,v3,f4_,v4) ( \
+ (R_TR_COUNTERS__deferred__##f1_##_VAL(R_TR_COUNTERS_, deferred_, v1) << R_TR_COUNTERS__deferred__BITNR) | \
+ (R_TR_COUNTERS__late_col__##f2_##_VAL(R_TR_COUNTERS_, late_col_, v2) << R_TR_COUNTERS__late_col__BITNR) | \
+ (R_TR_COUNTERS__multiple_col__##f3_##_VAL(R_TR_COUNTERS_, multiple_col_, v3) << R_TR_COUNTERS__multiple_col__BITNR) | \
+ (R_TR_COUNTERS__single_col__##f4_##_VAL(R_TR_COUNTERS_, single_col_, v4) << R_TR_COUNTERS__single_col__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_COMMAND
+ * - type: RW
+ * - addr: 0xb0000201
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_USB_COMMAND
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_USB_COMMAND.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_USB_COMMAND.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_USB_COMMAND(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ R_USB_COMMAND__WRITE(R_USB_COMMAND__ADDR, ( \
+ REG_VAL__R_USB_COMMAND_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_COMMAND
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_COMMAND(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ (R_USB_COMMAND__port_sel__##f1##__MASK & REG__##v1) | \
+ (R_USB_COMMAND__port_cmd__##f2##__MASK & REG__##v2) | \
+ (R_USB_COMMAND__busy__##f3##__MASK & REG__##v3) | \
+ (R_USB_COMMAND__ctrl_cmd__##f4##__MASK & REG__##v4) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_COMMAND
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_COMMAND.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_COMMAND(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ (R_USB_COMMAND__port_sel__##f1##__VAL(R_USB_COMMAND_, port_sel_, v1) << R_USB_COMMAND__port_sel__BITNR) | \
+ (R_USB_COMMAND__port_cmd__##f2##__VAL(R_USB_COMMAND_, port_cmd_, v2) << R_USB_COMMAND__port_cmd__BITNR) | \
+ (R_USB_COMMAND__busy__##f3##__VAL(R_USB_COMMAND_, busy_, v3) << R_USB_COMMAND__busy__BITNR) | \
+ (R_USB_COMMAND__ctrl_cmd__##f4##__VAL(R_USB_COMMAND_, ctrl_cmd_, v4) << R_USB_COMMAND__ctrl_cmd__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_COMMAND_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_COMMAND.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_COMMAND_(f1_,v1,f2_,v2,f3_,v3,f4_,v4) ( \
+ (R_USB_COMMAND__port_sel__##f1_##_VAL(R_USB_COMMAND_, port_sel_, v1) << R_USB_COMMAND__port_sel__BITNR) | \
+ (R_USB_COMMAND__port_cmd__##f2_##_VAL(R_USB_COMMAND_, port_cmd_, v2) << R_USB_COMMAND__port_cmd__BITNR) | \
+ (R_USB_COMMAND__busy__##f3_##_VAL(R_USB_COMMAND_, busy_, v3) << R_USB_COMMAND__busy__BITNR) | \
+ (R_USB_COMMAND__ctrl_cmd__##f4_##_VAL(R_USB_COMMAND_, ctrl_cmd_, v4) << R_USB_COMMAND__ctrl_cmd__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_COMMAND_DEV
+ * - type: RW
+ * - addr: 0xb0000201
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_USB_COMMAND_DEV
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_USB_COMMAND_DEV.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_USB_COMMAND_DEV.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_USB_COMMAND_DEV(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ R_USB_COMMAND_DEV__WRITE(R_USB_COMMAND_DEV__ADDR, ( \
+ REG_VAL__R_USB_COMMAND_DEV_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_COMMAND_DEV
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_COMMAND_DEV(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ (R_USB_COMMAND_DEV__port_sel__##f1##__MASK & REG__##v1) | \
+ (R_USB_COMMAND_DEV__port_cmd__##f2##__MASK & REG__##v2) | \
+ (R_USB_COMMAND_DEV__busy__##f3##__MASK & REG__##v3) | \
+ (R_USB_COMMAND_DEV__ctrl_cmd__##f4##__MASK & REG__##v4) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_COMMAND_DEV
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_COMMAND_DEV.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_COMMAND_DEV(f1,v1,f2,v2,f3,v3,f4,v4) ( \
+ (R_USB_COMMAND_DEV__port_sel__##f1##__VAL(R_USB_COMMAND_DEV_, port_sel_, v1) << R_USB_COMMAND_DEV__port_sel__BITNR) | \
+ (R_USB_COMMAND_DEV__port_cmd__##f2##__VAL(R_USB_COMMAND_DEV_, port_cmd_, v2) << R_USB_COMMAND_DEV__port_cmd__BITNR) | \
+ (R_USB_COMMAND_DEV__busy__##f3##__VAL(R_USB_COMMAND_DEV_, busy_, v3) << R_USB_COMMAND_DEV__busy__BITNR) | \
+ (R_USB_COMMAND_DEV__ctrl_cmd__##f4##__VAL(R_USB_COMMAND_DEV_, ctrl_cmd_, v4) << R_USB_COMMAND_DEV__ctrl_cmd__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_COMMAND_DEV_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_COMMAND_DEV.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_COMMAND_DEV_(f1_,v1,f2_,v2,f3_,v3,f4_,v4) ( \
+ (R_USB_COMMAND_DEV__port_sel__##f1_##_VAL(R_USB_COMMAND_DEV_, port_sel_, v1) << R_USB_COMMAND_DEV__port_sel__BITNR) | \
+ (R_USB_COMMAND_DEV__port_cmd__##f2_##_VAL(R_USB_COMMAND_DEV_, port_cmd_, v2) << R_USB_COMMAND_DEV__port_cmd__BITNR) | \
+ (R_USB_COMMAND_DEV__busy__##f3_##_VAL(R_USB_COMMAND_DEV_, busy_, v3) << R_USB_COMMAND_DEV__busy__BITNR) | \
+ (R_USB_COMMAND_DEV__ctrl_cmd__##f4_##_VAL(R_USB_COMMAND_DEV_, ctrl_cmd_, v4) << R_USB_COMMAND_DEV__ctrl_cmd__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_EPID_ATTN
+ * - type: RO
+ * - addr: 0xb0000224
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_EPID_ATTN
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_EPID_ATTN(f1,v1) ( \
+ (R_USB_EPID_ATTN__value__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_EPID_ATTN
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_EPID_ATTN.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_EPID_ATTN(f1,v1) ( \
+ (R_USB_EPID_ATTN__value__##f1##__VAL(R_USB_EPID_ATTN_, value_, v1) << R_USB_EPID_ATTN__value__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_EPID_ATTN_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_EPID_ATTN.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_EPID_ATTN_(f1_,v1) ( \
+ (R_USB_EPID_ATTN__value__##f1_##_VAL(R_USB_EPID_ATTN_, value_, v1) << R_USB_EPID_ATTN__value__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_EPT_DATA
+ * - type: RW
+ * - addr: 0xb000021c
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_USB_EPT_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_USB_EPT_DATA.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_USB_EPT_DATA.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_USB_EPT_DATA(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ R_USB_EPT_DATA__WRITE(R_USB_EPT_DATA__ADDR, ( \
+ REG_VAL__R_USB_EPT_DATA_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_EPT_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_EPT_DATA(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ (R_USB_EPT_DATA__valid__##f1##__MASK & REG__##v1) | \
+ (R_USB_EPT_DATA__hold__##f2##__MASK & REG__##v2) | \
+ (R_USB_EPT_DATA__error_count_in__##f3##__MASK & REG__##v3) | \
+ (R_USB_EPT_DATA__t_in__##f4##__MASK & REG__##v4) | \
+ (R_USB_EPT_DATA__low_speed__##f5##__MASK & REG__##v5) | \
+ (R_USB_EPT_DATA__port__##f6##__MASK & REG__##v6) | \
+ (R_USB_EPT_DATA__error_code__##f7##__MASK & REG__##v7) | \
+ (R_USB_EPT_DATA__t_out__##f8##__MASK & REG__##v8) | \
+ (R_USB_EPT_DATA__error_count_out__##f9##__MASK & REG__##v9) | \
+ (R_USB_EPT_DATA__max_len__##f10##__MASK & REG__##v10) | \
+ (R_USB_EPT_DATA__ep__##f11##__MASK & REG__##v11) | \
+ (R_USB_EPT_DATA__dev__##f12##__MASK & REG__##v12) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_EPT_DATA
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_EPT_DATA.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_EPT_DATA(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ (R_USB_EPT_DATA__valid__##f1##__VAL(R_USB_EPT_DATA_, valid_, v1) << R_USB_EPT_DATA__valid__BITNR) | \
+ (R_USB_EPT_DATA__hold__##f2##__VAL(R_USB_EPT_DATA_, hold_, v2) << R_USB_EPT_DATA__hold__BITNR) | \
+ (R_USB_EPT_DATA__error_count_in__##f3##__VAL(R_USB_EPT_DATA_, error_count_in_, v3) << R_USB_EPT_DATA__error_count_in__BITNR) | \
+ (R_USB_EPT_DATA__t_in__##f4##__VAL(R_USB_EPT_DATA_, t_in_, v4) << R_USB_EPT_DATA__t_in__BITNR) | \
+ (R_USB_EPT_DATA__low_speed__##f5##__VAL(R_USB_EPT_DATA_, low_speed_, v5) << R_USB_EPT_DATA__low_speed__BITNR) | \
+ (R_USB_EPT_DATA__port__##f6##__VAL(R_USB_EPT_DATA_, port_, v6) << R_USB_EPT_DATA__port__BITNR) | \
+ (R_USB_EPT_DATA__error_code__##f7##__VAL(R_USB_EPT_DATA_, error_code_, v7) << R_USB_EPT_DATA__error_code__BITNR) | \
+ (R_USB_EPT_DATA__t_out__##f8##__VAL(R_USB_EPT_DATA_, t_out_, v8) << R_USB_EPT_DATA__t_out__BITNR) | \
+ (R_USB_EPT_DATA__error_count_out__##f9##__VAL(R_USB_EPT_DATA_, error_count_out_, v9) << R_USB_EPT_DATA__error_count_out__BITNR) | \
+ (R_USB_EPT_DATA__max_len__##f10##__VAL(R_USB_EPT_DATA_, max_len_, v10) << R_USB_EPT_DATA__max_len__BITNR) | \
+ (R_USB_EPT_DATA__ep__##f11##__VAL(R_USB_EPT_DATA_, ep_, v11) << R_USB_EPT_DATA__ep__BITNR) | \
+ (R_USB_EPT_DATA__dev__##f12##__VAL(R_USB_EPT_DATA_, dev_, v12) << R_USB_EPT_DATA__dev__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_EPT_DATA_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_EPT_DATA.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_EPT_DATA_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12) ( \
+ (R_USB_EPT_DATA__valid__##f1_##_VAL(R_USB_EPT_DATA_, valid_, v1) << R_USB_EPT_DATA__valid__BITNR) | \
+ (R_USB_EPT_DATA__hold__##f2_##_VAL(R_USB_EPT_DATA_, hold_, v2) << R_USB_EPT_DATA__hold__BITNR) | \
+ (R_USB_EPT_DATA__error_count_in__##f3_##_VAL(R_USB_EPT_DATA_, error_count_in_, v3) << R_USB_EPT_DATA__error_count_in__BITNR) | \
+ (R_USB_EPT_DATA__t_in__##f4_##_VAL(R_USB_EPT_DATA_, t_in_, v4) << R_USB_EPT_DATA__t_in__BITNR) | \
+ (R_USB_EPT_DATA__low_speed__##f5_##_VAL(R_USB_EPT_DATA_, low_speed_, v5) << R_USB_EPT_DATA__low_speed__BITNR) | \
+ (R_USB_EPT_DATA__port__##f6_##_VAL(R_USB_EPT_DATA_, port_, v6) << R_USB_EPT_DATA__port__BITNR) | \
+ (R_USB_EPT_DATA__error_code__##f7_##_VAL(R_USB_EPT_DATA_, error_code_, v7) << R_USB_EPT_DATA__error_code__BITNR) | \
+ (R_USB_EPT_DATA__t_out__##f8_##_VAL(R_USB_EPT_DATA_, t_out_, v8) << R_USB_EPT_DATA__t_out__BITNR) | \
+ (R_USB_EPT_DATA__error_count_out__##f9_##_VAL(R_USB_EPT_DATA_, error_count_out_, v9) << R_USB_EPT_DATA__error_count_out__BITNR) | \
+ (R_USB_EPT_DATA__max_len__##f10_##_VAL(R_USB_EPT_DATA_, max_len_, v10) << R_USB_EPT_DATA__max_len__BITNR) | \
+ (R_USB_EPT_DATA__ep__##f11_##_VAL(R_USB_EPT_DATA_, ep_, v11) << R_USB_EPT_DATA__ep__BITNR) | \
+ (R_USB_EPT_DATA__dev__##f12_##_VAL(R_USB_EPT_DATA_, dev_, v12) << R_USB_EPT_DATA__dev__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_EPT_DATA_DEV
+ * - type: RW
+ * - addr: 0xb000021c
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_USB_EPT_DATA_DEV
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_USB_EPT_DATA_DEV.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_USB_EPT_DATA_DEV.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_USB_EPT_DATA_DEV(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ R_USB_EPT_DATA_DEV__WRITE(R_USB_EPT_DATA_DEV__ADDR, ( \
+ REG_VAL__R_USB_EPT_DATA_DEV_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_EPT_DATA_DEV
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_EPT_DATA_DEV(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ (R_USB_EPT_DATA_DEV__valid__##f1##__MASK & REG__##v1) | \
+ (R_USB_EPT_DATA_DEV__hold__##f2##__MASK & REG__##v2) | \
+ (R_USB_EPT_DATA_DEV__stall__##f3##__MASK & REG__##v3) | \
+ (R_USB_EPT_DATA_DEV__iso_resp__##f4##__MASK & REG__##v4) | \
+ (R_USB_EPT_DATA_DEV__ctrl__##f5##__MASK & REG__##v5) | \
+ (R_USB_EPT_DATA_DEV__iso__##f6##__MASK & REG__##v6) | \
+ (R_USB_EPT_DATA_DEV__port__##f7##__MASK & REG__##v7) | \
+ (R_USB_EPT_DATA_DEV__control_phase__##f8##__MASK & REG__##v8) | \
+ (R_USB_EPT_DATA_DEV__t__##f9##__MASK & REG__##v9) | \
+ (R_USB_EPT_DATA_DEV__max_len__##f10##__MASK & REG__##v10) | \
+ (R_USB_EPT_DATA_DEV__ep__##f11##__MASK & REG__##v11) | \
+ (R_USB_EPT_DATA_DEV__dev__##f12##__MASK & REG__##v12) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_EPT_DATA_DEV
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_EPT_DATA_DEV.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_EPT_DATA_DEV(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ (R_USB_EPT_DATA_DEV__valid__##f1##__VAL(R_USB_EPT_DATA_DEV_, valid_, v1) << R_USB_EPT_DATA_DEV__valid__BITNR) | \
+ (R_USB_EPT_DATA_DEV__hold__##f2##__VAL(R_USB_EPT_DATA_DEV_, hold_, v2) << R_USB_EPT_DATA_DEV__hold__BITNR) | \
+ (R_USB_EPT_DATA_DEV__stall__##f3##__VAL(R_USB_EPT_DATA_DEV_, stall_, v3) << R_USB_EPT_DATA_DEV__stall__BITNR) | \
+ (R_USB_EPT_DATA_DEV__iso_resp__##f4##__VAL(R_USB_EPT_DATA_DEV_, iso_resp_, v4) << R_USB_EPT_DATA_DEV__iso_resp__BITNR) | \
+ (R_USB_EPT_DATA_DEV__ctrl__##f5##__VAL(R_USB_EPT_DATA_DEV_, ctrl_, v5) << R_USB_EPT_DATA_DEV__ctrl__BITNR) | \
+ (R_USB_EPT_DATA_DEV__iso__##f6##__VAL(R_USB_EPT_DATA_DEV_, iso_, v6) << R_USB_EPT_DATA_DEV__iso__BITNR) | \
+ (R_USB_EPT_DATA_DEV__port__##f7##__VAL(R_USB_EPT_DATA_DEV_, port_, v7) << R_USB_EPT_DATA_DEV__port__BITNR) | \
+ (R_USB_EPT_DATA_DEV__control_phase__##f8##__VAL(R_USB_EPT_DATA_DEV_, control_phase_, v8) << R_USB_EPT_DATA_DEV__control_phase__BITNR) | \
+ (R_USB_EPT_DATA_DEV__t__##f9##__VAL(R_USB_EPT_DATA_DEV_, t_, v9) << R_USB_EPT_DATA_DEV__t__BITNR) | \
+ (R_USB_EPT_DATA_DEV__max_len__##f10##__VAL(R_USB_EPT_DATA_DEV_, max_len_, v10) << R_USB_EPT_DATA_DEV__max_len__BITNR) | \
+ (R_USB_EPT_DATA_DEV__ep__##f11##__VAL(R_USB_EPT_DATA_DEV_, ep_, v11) << R_USB_EPT_DATA_DEV__ep__BITNR) | \
+ (R_USB_EPT_DATA_DEV__dev__##f12##__VAL(R_USB_EPT_DATA_DEV_, dev_, v12) << R_USB_EPT_DATA_DEV__dev__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_EPT_DATA_DEV_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_EPT_DATA_DEV.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_EPT_DATA_DEV_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12) ( \
+ (R_USB_EPT_DATA_DEV__valid__##f1_##_VAL(R_USB_EPT_DATA_DEV_, valid_, v1) << R_USB_EPT_DATA_DEV__valid__BITNR) | \
+ (R_USB_EPT_DATA_DEV__hold__##f2_##_VAL(R_USB_EPT_DATA_DEV_, hold_, v2) << R_USB_EPT_DATA_DEV__hold__BITNR) | \
+ (R_USB_EPT_DATA_DEV__stall__##f3_##_VAL(R_USB_EPT_DATA_DEV_, stall_, v3) << R_USB_EPT_DATA_DEV__stall__BITNR) | \
+ (R_USB_EPT_DATA_DEV__iso_resp__##f4_##_VAL(R_USB_EPT_DATA_DEV_, iso_resp_, v4) << R_USB_EPT_DATA_DEV__iso_resp__BITNR) | \
+ (R_USB_EPT_DATA_DEV__ctrl__##f5_##_VAL(R_USB_EPT_DATA_DEV_, ctrl_, v5) << R_USB_EPT_DATA_DEV__ctrl__BITNR) | \
+ (R_USB_EPT_DATA_DEV__iso__##f6_##_VAL(R_USB_EPT_DATA_DEV_, iso_, v6) << R_USB_EPT_DATA_DEV__iso__BITNR) | \
+ (R_USB_EPT_DATA_DEV__port__##f7_##_VAL(R_USB_EPT_DATA_DEV_, port_, v7) << R_USB_EPT_DATA_DEV__port__BITNR) | \
+ (R_USB_EPT_DATA_DEV__control_phase__##f8_##_VAL(R_USB_EPT_DATA_DEV_, control_phase_, v8) << R_USB_EPT_DATA_DEV__control_phase__BITNR) | \
+ (R_USB_EPT_DATA_DEV__t__##f9_##_VAL(R_USB_EPT_DATA_DEV_, t_, v9) << R_USB_EPT_DATA_DEV__t__BITNR) | \
+ (R_USB_EPT_DATA_DEV__max_len__##f10_##_VAL(R_USB_EPT_DATA_DEV_, max_len_, v10) << R_USB_EPT_DATA_DEV__max_len__BITNR) | \
+ (R_USB_EPT_DATA_DEV__ep__##f11_##_VAL(R_USB_EPT_DATA_DEV_, ep_, v11) << R_USB_EPT_DATA_DEV__ep__BITNR) | \
+ (R_USB_EPT_DATA_DEV__dev__##f12_##_VAL(R_USB_EPT_DATA_DEV_, dev_, v12) << R_USB_EPT_DATA_DEV__dev__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_EPT_DATA_ISO
+ * - type: RW
+ * - addr: 0xb000021c
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_USB_EPT_DATA_ISO
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_USB_EPT_DATA_ISO.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_USB_EPT_DATA_ISO.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_USB_EPT_DATA_ISO(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ R_USB_EPT_DATA_ISO__WRITE(R_USB_EPT_DATA_ISO__ADDR, ( \
+ REG_VAL__R_USB_EPT_DATA_ISO_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_EPT_DATA_ISO
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_EPT_DATA_ISO(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ (R_USB_EPT_DATA_ISO__valid__##f1##__MASK & REG__##v1) | \
+ (R_USB_EPT_DATA_ISO__port__##f2##__MASK & REG__##v2) | \
+ (R_USB_EPT_DATA_ISO__error_code__##f3##__MASK & REG__##v3) | \
+ (R_USB_EPT_DATA_ISO__max_len__##f4##__MASK & REG__##v4) | \
+ (R_USB_EPT_DATA_ISO__ep__##f5##__MASK & REG__##v5) | \
+ (R_USB_EPT_DATA_ISO__dev__##f6##__MASK & REG__##v6) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_EPT_DATA_ISO
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_EPT_DATA_ISO.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_EPT_DATA_ISO(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ (R_USB_EPT_DATA_ISO__valid__##f1##__VAL(R_USB_EPT_DATA_ISO_, valid_, v1) << R_USB_EPT_DATA_ISO__valid__BITNR) | \
+ (R_USB_EPT_DATA_ISO__port__##f2##__VAL(R_USB_EPT_DATA_ISO_, port_, v2) << R_USB_EPT_DATA_ISO__port__BITNR) | \
+ (R_USB_EPT_DATA_ISO__error_code__##f3##__VAL(R_USB_EPT_DATA_ISO_, error_code_, v3) << R_USB_EPT_DATA_ISO__error_code__BITNR) | \
+ (R_USB_EPT_DATA_ISO__max_len__##f4##__VAL(R_USB_EPT_DATA_ISO_, max_len_, v4) << R_USB_EPT_DATA_ISO__max_len__BITNR) | \
+ (R_USB_EPT_DATA_ISO__ep__##f5##__VAL(R_USB_EPT_DATA_ISO_, ep_, v5) << R_USB_EPT_DATA_ISO__ep__BITNR) | \
+ (R_USB_EPT_DATA_ISO__dev__##f6##__VAL(R_USB_EPT_DATA_ISO_, dev_, v6) << R_USB_EPT_DATA_ISO__dev__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_EPT_DATA_ISO_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_EPT_DATA_ISO.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_EPT_DATA_ISO_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6) ( \
+ (R_USB_EPT_DATA_ISO__valid__##f1_##_VAL(R_USB_EPT_DATA_ISO_, valid_, v1) << R_USB_EPT_DATA_ISO__valid__BITNR) | \
+ (R_USB_EPT_DATA_ISO__port__##f2_##_VAL(R_USB_EPT_DATA_ISO_, port_, v2) << R_USB_EPT_DATA_ISO__port__BITNR) | \
+ (R_USB_EPT_DATA_ISO__error_code__##f3_##_VAL(R_USB_EPT_DATA_ISO_, error_code_, v3) << R_USB_EPT_DATA_ISO__error_code__BITNR) | \
+ (R_USB_EPT_DATA_ISO__max_len__##f4_##_VAL(R_USB_EPT_DATA_ISO_, max_len_, v4) << R_USB_EPT_DATA_ISO__max_len__BITNR) | \
+ (R_USB_EPT_DATA_ISO__ep__##f5_##_VAL(R_USB_EPT_DATA_ISO_, ep_, v5) << R_USB_EPT_DATA_ISO__ep__BITNR) | \
+ (R_USB_EPT_DATA_ISO__dev__##f6_##_VAL(R_USB_EPT_DATA_ISO_, dev_, v6) << R_USB_EPT_DATA_ISO__dev__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_EPT_INDEX
+ * - type: RW
+ * - addr: 0xb0000208
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_USB_EPT_INDEX
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_USB_EPT_INDEX.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_USB_EPT_INDEX.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_USB_EPT_INDEX(f1,v1) ( \
+ R_USB_EPT_INDEX__WRITE(R_USB_EPT_INDEX__ADDR, ( \
+ REG_VAL__R_USB_EPT_INDEX_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_EPT_INDEX
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_EPT_INDEX(f1,v1) ( \
+ (R_USB_EPT_INDEX__value__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_EPT_INDEX
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_EPT_INDEX.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_EPT_INDEX(f1,v1) ( \
+ (R_USB_EPT_INDEX__value__##f1##__VAL(R_USB_EPT_INDEX_, value_, v1) << R_USB_EPT_INDEX__value__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_EPT_INDEX_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_EPT_INDEX.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_EPT_INDEX_(f1_,v1) ( \
+ (R_USB_EPT_INDEX__value__##f1_##_VAL(R_USB_EPT_INDEX_, value_, v1) << R_USB_EPT_INDEX__value__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_FM_INTERVAL
+ * - type: RW
+ * - addr: 0xb0000210
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_USB_FM_INTERVAL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_USB_FM_INTERVAL.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_USB_FM_INTERVAL.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_USB_FM_INTERVAL(f1,v1,f2,v2) ( \
+ R_USB_FM_INTERVAL__WRITE(R_USB_FM_INTERVAL__ADDR, ( \
+ REG_VAL__R_USB_FM_INTERVAL_(f1##_,v1,f2##_,v2) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_FM_INTERVAL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_FM_INTERVAL(f1,v1,f2,v2) ( \
+ (R_USB_FM_INTERVAL__fixed__##f1##__MASK & REG__##v1) | \
+ (R_USB_FM_INTERVAL__adj__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_FM_INTERVAL
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_FM_INTERVAL.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_FM_INTERVAL(f1,v1,f2,v2) ( \
+ (R_USB_FM_INTERVAL__fixed__##f1##__VAL(R_USB_FM_INTERVAL_, fixed_, v1) << R_USB_FM_INTERVAL__fixed__BITNR) | \
+ (R_USB_FM_INTERVAL__adj__##f2##__VAL(R_USB_FM_INTERVAL_, adj_, v2) << R_USB_FM_INTERVAL__adj__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_FM_INTERVAL_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_FM_INTERVAL.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_FM_INTERVAL_(f1_,v1,f2_,v2) ( \
+ (R_USB_FM_INTERVAL__fixed__##f1_##_VAL(R_USB_FM_INTERVAL_, fixed_, v1) << R_USB_FM_INTERVAL__fixed__BITNR) | \
+ (R_USB_FM_INTERVAL__adj__##f2_##_VAL(R_USB_FM_INTERVAL_, adj_, v2) << R_USB_FM_INTERVAL__adj__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_FM_NUMBER
+ * - type: RW
+ * - addr: 0xb000020c
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_USB_FM_NUMBER
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_USB_FM_NUMBER.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_USB_FM_NUMBER.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_USB_FM_NUMBER(f1,v1) ( \
+ R_USB_FM_NUMBER__WRITE(R_USB_FM_NUMBER__ADDR, ( \
+ REG_VAL__R_USB_FM_NUMBER_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_FM_NUMBER
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_FM_NUMBER(f1,v1) ( \
+ (R_USB_FM_NUMBER__value__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_FM_NUMBER
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_FM_NUMBER.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_FM_NUMBER(f1,v1) ( \
+ (R_USB_FM_NUMBER__value__##f1##__VAL(R_USB_FM_NUMBER_, value_, v1) << R_USB_FM_NUMBER__value__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_FM_NUMBER_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_FM_NUMBER.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_FM_NUMBER_(f1_,v1) ( \
+ (R_USB_FM_NUMBER__value__##f1_##_VAL(R_USB_FM_NUMBER_, value_, v1) << R_USB_FM_NUMBER__value__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_FM_NUMBER_DEV
+ * - type: RW
+ * - addr: 0xb000020c
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_USB_FM_NUMBER_DEV
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_USB_FM_NUMBER_DEV.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_USB_FM_NUMBER_DEV.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_USB_FM_NUMBER_DEV(f1,v1,f2,v2,f3,v3) ( \
+ R_USB_FM_NUMBER_DEV__WRITE(R_USB_FM_NUMBER_DEV__ADDR, ( \
+ REG_VAL__R_USB_FM_NUMBER_DEV_(f1##_,v1,f2##_,v2,f3##_,v3) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_FM_NUMBER_DEV
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_FM_NUMBER_DEV(f1,v1,f2,v2,f3,v3) ( \
+ (R_USB_FM_NUMBER_DEV__sign__##f1##__MASK & REG__##v1) | \
+ (R_USB_FM_NUMBER_DEV__deviation__##f2##__MASK & REG__##v2) | \
+ (R_USB_FM_NUMBER_DEV__fm_number__##f3##__MASK & REG__##v3) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_FM_NUMBER_DEV
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_FM_NUMBER_DEV.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_FM_NUMBER_DEV(f1,v1,f2,v2,f3,v3) ( \
+ (R_USB_FM_NUMBER_DEV__sign__##f1##__VAL(R_USB_FM_NUMBER_DEV_, sign_, v1) << R_USB_FM_NUMBER_DEV__sign__BITNR) | \
+ (R_USB_FM_NUMBER_DEV__deviation__##f2##__VAL(R_USB_FM_NUMBER_DEV_, deviation_, v2) << R_USB_FM_NUMBER_DEV__deviation__BITNR) | \
+ (R_USB_FM_NUMBER_DEV__fm_number__##f3##__VAL(R_USB_FM_NUMBER_DEV_, fm_number_, v3) << R_USB_FM_NUMBER_DEV__fm_number__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_FM_NUMBER_DEV_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_FM_NUMBER_DEV.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_FM_NUMBER_DEV_(f1_,v1,f2_,v2,f3_,v3) ( \
+ (R_USB_FM_NUMBER_DEV__sign__##f1_##_VAL(R_USB_FM_NUMBER_DEV_, sign_, v1) << R_USB_FM_NUMBER_DEV__sign__BITNR) | \
+ (R_USB_FM_NUMBER_DEV__deviation__##f2_##_VAL(R_USB_FM_NUMBER_DEV_, deviation_, v2) << R_USB_FM_NUMBER_DEV__deviation__BITNR) | \
+ (R_USB_FM_NUMBER_DEV__fm_number__##f3_##_VAL(R_USB_FM_NUMBER_DEV_, fm_number_, v3) << R_USB_FM_NUMBER_DEV__fm_number__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_FM_PSTART
+ * - type: RW
+ * - addr: 0xb0000214
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_USB_FM_PSTART
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_USB_FM_PSTART.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_USB_FM_PSTART.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_USB_FM_PSTART(f1,v1) ( \
+ R_USB_FM_PSTART__WRITE(R_USB_FM_PSTART__ADDR, ( \
+ REG_VAL__R_USB_FM_PSTART_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_FM_PSTART
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_FM_PSTART(f1,v1) ( \
+ (R_USB_FM_PSTART__value__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_FM_PSTART
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_FM_PSTART.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_FM_PSTART(f1,v1) ( \
+ (R_USB_FM_PSTART__value__##f1##__VAL(R_USB_FM_PSTART_, value_, v1) << R_USB_FM_PSTART__value__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_FM_PSTART_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_FM_PSTART.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_FM_PSTART_(f1_,v1) ( \
+ (R_USB_FM_PSTART__value__##f1_##_VAL(R_USB_FM_PSTART_, value_, v1) << R_USB_FM_PSTART__value__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_FM_REMAINING
+ * - type: RO
+ * - addr: 0xb0000212
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_FM_REMAINING
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_FM_REMAINING(f1,v1) ( \
+ (R_USB_FM_REMAINING__value__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_FM_REMAINING
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_FM_REMAINING.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_FM_REMAINING(f1,v1) ( \
+ (R_USB_FM_REMAINING__value__##f1##__VAL(R_USB_FM_REMAINING_, value_, v1) << R_USB_FM_REMAINING__value__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_FM_REMAINING_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_FM_REMAINING.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_FM_REMAINING_(f1_,v1) ( \
+ (R_USB_FM_REMAINING__value__##f1_##_VAL(R_USB_FM_REMAINING_, value_, v1) << R_USB_FM_REMAINING__value__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_IRQ_MASK_CLR
+ * - type: WO
+ * - addr: 0xb0000206
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_USB_IRQ_MASK_CLR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_USB_IRQ_MASK_CLR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_USB_IRQ_MASK_CLR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_USB_IRQ_MASK_CLR(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ *R_USB_IRQ_MASK_CLR__SADDR = ( \
+ REG_INITIATED(R_USB_IRQ_MASK_CLR_) \
+ REG_VAL__R_USB_IRQ_MASK_CLR_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10) \
+ ), \
+ R_USB_IRQ_MASK_CLR__WRITE(R_USB_IRQ_MASK_CLR__ADDR, *R_USB_IRQ_MASK_CLR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_USB_IRQ_MASK_CLR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_USB_IRQ_MASK_CLR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_USB_IRQ_MASK_CLR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_USB_IRQ_MASK_CLR__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ *R_USB_IRQ_MASK_CLR__SADDR = ( \
+ REG_INITIATED(R_USB_IRQ_MASK_CLR_) \
+ REG_VAL__R_USB_IRQ_MASK_CLR_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_IRQ_MASK_CLR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_IRQ_MASK_CLR(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ (R_USB_IRQ_MASK_CLR__iso_eof__##f1##__MASK & REG__##v1) | \
+ (R_USB_IRQ_MASK_CLR__intr_eof__##f2##__MASK & REG__##v2) | \
+ (R_USB_IRQ_MASK_CLR__iso_eot__##f3##__MASK & REG__##v3) | \
+ (R_USB_IRQ_MASK_CLR__intr_eot__##f4##__MASK & REG__##v4) | \
+ (R_USB_IRQ_MASK_CLR__ctl_eot__##f5##__MASK & REG__##v5) | \
+ (R_USB_IRQ_MASK_CLR__bulk_eot__##f6##__MASK & REG__##v6) | \
+ (R_USB_IRQ_MASK_CLR__epid_attn__##f7##__MASK & REG__##v7) | \
+ (R_USB_IRQ_MASK_CLR__sof__##f8##__MASK & REG__##v8) | \
+ (R_USB_IRQ_MASK_CLR__port_status__##f9##__MASK & REG__##v9) | \
+ (R_USB_IRQ_MASK_CLR__ctl_status__##f10##__MASK & REG__##v10) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_IRQ_MASK_CLR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_IRQ_MASK_CLR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_IRQ_MASK_CLR(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ (R_USB_IRQ_MASK_CLR__iso_eof__##f1##__VAL(R_USB_IRQ_MASK_CLR_, iso_eof_, v1) << R_USB_IRQ_MASK_CLR__iso_eof__BITNR) | \
+ (R_USB_IRQ_MASK_CLR__intr_eof__##f2##__VAL(R_USB_IRQ_MASK_CLR_, intr_eof_, v2) << R_USB_IRQ_MASK_CLR__intr_eof__BITNR) | \
+ (R_USB_IRQ_MASK_CLR__iso_eot__##f3##__VAL(R_USB_IRQ_MASK_CLR_, iso_eot_, v3) << R_USB_IRQ_MASK_CLR__iso_eot__BITNR) | \
+ (R_USB_IRQ_MASK_CLR__intr_eot__##f4##__VAL(R_USB_IRQ_MASK_CLR_, intr_eot_, v4) << R_USB_IRQ_MASK_CLR__intr_eot__BITNR) | \
+ (R_USB_IRQ_MASK_CLR__ctl_eot__##f5##__VAL(R_USB_IRQ_MASK_CLR_, ctl_eot_, v5) << R_USB_IRQ_MASK_CLR__ctl_eot__BITNR) | \
+ (R_USB_IRQ_MASK_CLR__bulk_eot__##f6##__VAL(R_USB_IRQ_MASK_CLR_, bulk_eot_, v6) << R_USB_IRQ_MASK_CLR__bulk_eot__BITNR) | \
+ (R_USB_IRQ_MASK_CLR__epid_attn__##f7##__VAL(R_USB_IRQ_MASK_CLR_, epid_attn_, v7) << R_USB_IRQ_MASK_CLR__epid_attn__BITNR) | \
+ (R_USB_IRQ_MASK_CLR__sof__##f8##__VAL(R_USB_IRQ_MASK_CLR_, sof_, v8) << R_USB_IRQ_MASK_CLR__sof__BITNR) | \
+ (R_USB_IRQ_MASK_CLR__port_status__##f9##__VAL(R_USB_IRQ_MASK_CLR_, port_status_, v9) << R_USB_IRQ_MASK_CLR__port_status__BITNR) | \
+ (R_USB_IRQ_MASK_CLR__ctl_status__##f10##__VAL(R_USB_IRQ_MASK_CLR_, ctl_status_, v10) << R_USB_IRQ_MASK_CLR__ctl_status__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_IRQ_MASK_CLR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_IRQ_MASK_CLR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_IRQ_MASK_CLR_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10) ( \
+ (R_USB_IRQ_MASK_CLR__iso_eof__##f1_##_VAL(R_USB_IRQ_MASK_CLR_, iso_eof_, v1) << R_USB_IRQ_MASK_CLR__iso_eof__BITNR) | \
+ (R_USB_IRQ_MASK_CLR__intr_eof__##f2_##_VAL(R_USB_IRQ_MASK_CLR_, intr_eof_, v2) << R_USB_IRQ_MASK_CLR__intr_eof__BITNR) | \
+ (R_USB_IRQ_MASK_CLR__iso_eot__##f3_##_VAL(R_USB_IRQ_MASK_CLR_, iso_eot_, v3) << R_USB_IRQ_MASK_CLR__iso_eot__BITNR) | \
+ (R_USB_IRQ_MASK_CLR__intr_eot__##f4_##_VAL(R_USB_IRQ_MASK_CLR_, intr_eot_, v4) << R_USB_IRQ_MASK_CLR__intr_eot__BITNR) | \
+ (R_USB_IRQ_MASK_CLR__ctl_eot__##f5_##_VAL(R_USB_IRQ_MASK_CLR_, ctl_eot_, v5) << R_USB_IRQ_MASK_CLR__ctl_eot__BITNR) | \
+ (R_USB_IRQ_MASK_CLR__bulk_eot__##f6_##_VAL(R_USB_IRQ_MASK_CLR_, bulk_eot_, v6) << R_USB_IRQ_MASK_CLR__bulk_eot__BITNR) | \
+ (R_USB_IRQ_MASK_CLR__epid_attn__##f7_##_VAL(R_USB_IRQ_MASK_CLR_, epid_attn_, v7) << R_USB_IRQ_MASK_CLR__epid_attn__BITNR) | \
+ (R_USB_IRQ_MASK_CLR__sof__##f8_##_VAL(R_USB_IRQ_MASK_CLR_, sof_, v8) << R_USB_IRQ_MASK_CLR__sof__BITNR) | \
+ (R_USB_IRQ_MASK_CLR__port_status__##f9_##_VAL(R_USB_IRQ_MASK_CLR_, port_status_, v9) << R_USB_IRQ_MASK_CLR__port_status__BITNR) | \
+ (R_USB_IRQ_MASK_CLR__ctl_status__##f10_##_VAL(R_USB_IRQ_MASK_CLR_, ctl_status_, v10) << R_USB_IRQ_MASK_CLR__ctl_status__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_IRQ_MASK_CLR_DEV
+ * - type: WO
+ * - addr: 0xb0000206
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_USB_IRQ_MASK_CLR_DEV
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_USB_IRQ_MASK_CLR_DEV.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_USB_IRQ_MASK_CLR_DEV.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_USB_IRQ_MASK_CLR_DEV(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ *R_USB_IRQ_MASK_CLR_DEV__SADDR = ( \
+ REG_INITIATED(R_USB_IRQ_MASK_CLR_DEV_) \
+ REG_VAL__R_USB_IRQ_MASK_CLR_DEV_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9) \
+ ), \
+ R_USB_IRQ_MASK_CLR_DEV__WRITE(R_USB_IRQ_MASK_CLR_DEV__ADDR, *R_USB_IRQ_MASK_CLR_DEV__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_USB_IRQ_MASK_CLR_DEV__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_USB_IRQ_MASK_CLR_DEV.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_USB_IRQ_MASK_CLR_DEV.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_USB_IRQ_MASK_CLR_DEV__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ *R_USB_IRQ_MASK_CLR_DEV__SADDR = ( \
+ REG_INITIATED(R_USB_IRQ_MASK_CLR_DEV_) \
+ REG_VAL__R_USB_IRQ_MASK_CLR_DEV_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_IRQ_MASK_CLR_DEV
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_IRQ_MASK_CLR_DEV(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_USB_IRQ_MASK_CLR_DEV__out_eot__##f1##__MASK & REG__##v1) | \
+ (R_USB_IRQ_MASK_CLR_DEV__ep3_in_eot__##f2##__MASK & REG__##v2) | \
+ (R_USB_IRQ_MASK_CLR_DEV__ep2_in_eot__##f3##__MASK & REG__##v3) | \
+ (R_USB_IRQ_MASK_CLR_DEV__ep1_in_eot__##f4##__MASK & REG__##v4) | \
+ (R_USB_IRQ_MASK_CLR_DEV__ep0_in_eot__##f5##__MASK & REG__##v5) | \
+ (R_USB_IRQ_MASK_CLR_DEV__epid_attn__##f6##__MASK & REG__##v6) | \
+ (R_USB_IRQ_MASK_CLR_DEV__sof__##f7##__MASK & REG__##v7) | \
+ (R_USB_IRQ_MASK_CLR_DEV__port_status__##f8##__MASK & REG__##v8) | \
+ (R_USB_IRQ_MASK_CLR_DEV__ctl_status__##f9##__MASK & REG__##v9) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_IRQ_MASK_CLR_DEV
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_IRQ_MASK_CLR_DEV.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_IRQ_MASK_CLR_DEV(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_USB_IRQ_MASK_CLR_DEV__out_eot__##f1##__VAL(R_USB_IRQ_MASK_CLR_DEV_, out_eot_, v1) << R_USB_IRQ_MASK_CLR_DEV__out_eot__BITNR) | \
+ (R_USB_IRQ_MASK_CLR_DEV__ep3_in_eot__##f2##__VAL(R_USB_IRQ_MASK_CLR_DEV_, ep3_in_eot_, v2) << R_USB_IRQ_MASK_CLR_DEV__ep3_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_CLR_DEV__ep2_in_eot__##f3##__VAL(R_USB_IRQ_MASK_CLR_DEV_, ep2_in_eot_, v3) << R_USB_IRQ_MASK_CLR_DEV__ep2_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_CLR_DEV__ep1_in_eot__##f4##__VAL(R_USB_IRQ_MASK_CLR_DEV_, ep1_in_eot_, v4) << R_USB_IRQ_MASK_CLR_DEV__ep1_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_CLR_DEV__ep0_in_eot__##f5##__VAL(R_USB_IRQ_MASK_CLR_DEV_, ep0_in_eot_, v5) << R_USB_IRQ_MASK_CLR_DEV__ep0_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_CLR_DEV__epid_attn__##f6##__VAL(R_USB_IRQ_MASK_CLR_DEV_, epid_attn_, v6) << R_USB_IRQ_MASK_CLR_DEV__epid_attn__BITNR) | \
+ (R_USB_IRQ_MASK_CLR_DEV__sof__##f7##__VAL(R_USB_IRQ_MASK_CLR_DEV_, sof_, v7) << R_USB_IRQ_MASK_CLR_DEV__sof__BITNR) | \
+ (R_USB_IRQ_MASK_CLR_DEV__port_status__##f8##__VAL(R_USB_IRQ_MASK_CLR_DEV_, port_status_, v8) << R_USB_IRQ_MASK_CLR_DEV__port_status__BITNR) | \
+ (R_USB_IRQ_MASK_CLR_DEV__ctl_status__##f9##__VAL(R_USB_IRQ_MASK_CLR_DEV_, ctl_status_, v9) << R_USB_IRQ_MASK_CLR_DEV__ctl_status__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_IRQ_MASK_CLR_DEV_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_IRQ_MASK_CLR_DEV.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_IRQ_MASK_CLR_DEV_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9) ( \
+ (R_USB_IRQ_MASK_CLR_DEV__out_eot__##f1_##_VAL(R_USB_IRQ_MASK_CLR_DEV_, out_eot_, v1) << R_USB_IRQ_MASK_CLR_DEV__out_eot__BITNR) | \
+ (R_USB_IRQ_MASK_CLR_DEV__ep3_in_eot__##f2_##_VAL(R_USB_IRQ_MASK_CLR_DEV_, ep3_in_eot_, v2) << R_USB_IRQ_MASK_CLR_DEV__ep3_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_CLR_DEV__ep2_in_eot__##f3_##_VAL(R_USB_IRQ_MASK_CLR_DEV_, ep2_in_eot_, v3) << R_USB_IRQ_MASK_CLR_DEV__ep2_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_CLR_DEV__ep1_in_eot__##f4_##_VAL(R_USB_IRQ_MASK_CLR_DEV_, ep1_in_eot_, v4) << R_USB_IRQ_MASK_CLR_DEV__ep1_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_CLR_DEV__ep0_in_eot__##f5_##_VAL(R_USB_IRQ_MASK_CLR_DEV_, ep0_in_eot_, v5) << R_USB_IRQ_MASK_CLR_DEV__ep0_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_CLR_DEV__epid_attn__##f6_##_VAL(R_USB_IRQ_MASK_CLR_DEV_, epid_attn_, v6) << R_USB_IRQ_MASK_CLR_DEV__epid_attn__BITNR) | \
+ (R_USB_IRQ_MASK_CLR_DEV__sof__##f7_##_VAL(R_USB_IRQ_MASK_CLR_DEV_, sof_, v7) << R_USB_IRQ_MASK_CLR_DEV__sof__BITNR) | \
+ (R_USB_IRQ_MASK_CLR_DEV__port_status__##f8_##_VAL(R_USB_IRQ_MASK_CLR_DEV_, port_status_, v8) << R_USB_IRQ_MASK_CLR_DEV__port_status__BITNR) | \
+ (R_USB_IRQ_MASK_CLR_DEV__ctl_status__##f9_##_VAL(R_USB_IRQ_MASK_CLR_DEV_, ctl_status_, v9) << R_USB_IRQ_MASK_CLR_DEV__ctl_status__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_IRQ_MASK_READ
+ * - type: RO
+ * - addr: 0xb0000204
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_IRQ_MASK_READ
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_IRQ_MASK_READ(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ (R_USB_IRQ_MASK_READ__iso_eof__##f1##__MASK & REG__##v1) | \
+ (R_USB_IRQ_MASK_READ__intr_eof__##f2##__MASK & REG__##v2) | \
+ (R_USB_IRQ_MASK_READ__iso_eot__##f3##__MASK & REG__##v3) | \
+ (R_USB_IRQ_MASK_READ__intr_eot__##f4##__MASK & REG__##v4) | \
+ (R_USB_IRQ_MASK_READ__ctl_eot__##f5##__MASK & REG__##v5) | \
+ (R_USB_IRQ_MASK_READ__bulk_eot__##f6##__MASK & REG__##v6) | \
+ (R_USB_IRQ_MASK_READ__epid_attn__##f7##__MASK & REG__##v7) | \
+ (R_USB_IRQ_MASK_READ__sof__##f8##__MASK & REG__##v8) | \
+ (R_USB_IRQ_MASK_READ__port_status__##f9##__MASK & REG__##v9) | \
+ (R_USB_IRQ_MASK_READ__ctl_status__##f10##__MASK & REG__##v10) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_IRQ_MASK_READ
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_IRQ_MASK_READ.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_IRQ_MASK_READ(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ (R_USB_IRQ_MASK_READ__iso_eof__##f1##__VAL(R_USB_IRQ_MASK_READ_, iso_eof_, v1) << R_USB_IRQ_MASK_READ__iso_eof__BITNR) | \
+ (R_USB_IRQ_MASK_READ__intr_eof__##f2##__VAL(R_USB_IRQ_MASK_READ_, intr_eof_, v2) << R_USB_IRQ_MASK_READ__intr_eof__BITNR) | \
+ (R_USB_IRQ_MASK_READ__iso_eot__##f3##__VAL(R_USB_IRQ_MASK_READ_, iso_eot_, v3) << R_USB_IRQ_MASK_READ__iso_eot__BITNR) | \
+ (R_USB_IRQ_MASK_READ__intr_eot__##f4##__VAL(R_USB_IRQ_MASK_READ_, intr_eot_, v4) << R_USB_IRQ_MASK_READ__intr_eot__BITNR) | \
+ (R_USB_IRQ_MASK_READ__ctl_eot__##f5##__VAL(R_USB_IRQ_MASK_READ_, ctl_eot_, v5) << R_USB_IRQ_MASK_READ__ctl_eot__BITNR) | \
+ (R_USB_IRQ_MASK_READ__bulk_eot__##f6##__VAL(R_USB_IRQ_MASK_READ_, bulk_eot_, v6) << R_USB_IRQ_MASK_READ__bulk_eot__BITNR) | \
+ (R_USB_IRQ_MASK_READ__epid_attn__##f7##__VAL(R_USB_IRQ_MASK_READ_, epid_attn_, v7) << R_USB_IRQ_MASK_READ__epid_attn__BITNR) | \
+ (R_USB_IRQ_MASK_READ__sof__##f8##__VAL(R_USB_IRQ_MASK_READ_, sof_, v8) << R_USB_IRQ_MASK_READ__sof__BITNR) | \
+ (R_USB_IRQ_MASK_READ__port_status__##f9##__VAL(R_USB_IRQ_MASK_READ_, port_status_, v9) << R_USB_IRQ_MASK_READ__port_status__BITNR) | \
+ (R_USB_IRQ_MASK_READ__ctl_status__##f10##__VAL(R_USB_IRQ_MASK_READ_, ctl_status_, v10) << R_USB_IRQ_MASK_READ__ctl_status__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_IRQ_MASK_READ_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_IRQ_MASK_READ.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_IRQ_MASK_READ_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10) ( \
+ (R_USB_IRQ_MASK_READ__iso_eof__##f1_##_VAL(R_USB_IRQ_MASK_READ_, iso_eof_, v1) << R_USB_IRQ_MASK_READ__iso_eof__BITNR) | \
+ (R_USB_IRQ_MASK_READ__intr_eof__##f2_##_VAL(R_USB_IRQ_MASK_READ_, intr_eof_, v2) << R_USB_IRQ_MASK_READ__intr_eof__BITNR) | \
+ (R_USB_IRQ_MASK_READ__iso_eot__##f3_##_VAL(R_USB_IRQ_MASK_READ_, iso_eot_, v3) << R_USB_IRQ_MASK_READ__iso_eot__BITNR) | \
+ (R_USB_IRQ_MASK_READ__intr_eot__##f4_##_VAL(R_USB_IRQ_MASK_READ_, intr_eot_, v4) << R_USB_IRQ_MASK_READ__intr_eot__BITNR) | \
+ (R_USB_IRQ_MASK_READ__ctl_eot__##f5_##_VAL(R_USB_IRQ_MASK_READ_, ctl_eot_, v5) << R_USB_IRQ_MASK_READ__ctl_eot__BITNR) | \
+ (R_USB_IRQ_MASK_READ__bulk_eot__##f6_##_VAL(R_USB_IRQ_MASK_READ_, bulk_eot_, v6) << R_USB_IRQ_MASK_READ__bulk_eot__BITNR) | \
+ (R_USB_IRQ_MASK_READ__epid_attn__##f7_##_VAL(R_USB_IRQ_MASK_READ_, epid_attn_, v7) << R_USB_IRQ_MASK_READ__epid_attn__BITNR) | \
+ (R_USB_IRQ_MASK_READ__sof__##f8_##_VAL(R_USB_IRQ_MASK_READ_, sof_, v8) << R_USB_IRQ_MASK_READ__sof__BITNR) | \
+ (R_USB_IRQ_MASK_READ__port_status__##f9_##_VAL(R_USB_IRQ_MASK_READ_, port_status_, v9) << R_USB_IRQ_MASK_READ__port_status__BITNR) | \
+ (R_USB_IRQ_MASK_READ__ctl_status__##f10_##_VAL(R_USB_IRQ_MASK_READ_, ctl_status_, v10) << R_USB_IRQ_MASK_READ__ctl_status__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_IRQ_MASK_READ_DEV
+ * - type: RO
+ * - addr: 0xb0000204
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_IRQ_MASK_READ_DEV
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_IRQ_MASK_READ_DEV(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_USB_IRQ_MASK_READ_DEV__out_eot__##f1##__MASK & REG__##v1) | \
+ (R_USB_IRQ_MASK_READ_DEV__ep3_in_eot__##f2##__MASK & REG__##v2) | \
+ (R_USB_IRQ_MASK_READ_DEV__ep2_in_eot__##f3##__MASK & REG__##v3) | \
+ (R_USB_IRQ_MASK_READ_DEV__ep1_in_eot__##f4##__MASK & REG__##v4) | \
+ (R_USB_IRQ_MASK_READ_DEV__ep0_in_eot__##f5##__MASK & REG__##v5) | \
+ (R_USB_IRQ_MASK_READ_DEV__epid_attn__##f6##__MASK & REG__##v6) | \
+ (R_USB_IRQ_MASK_READ_DEV__sof__##f7##__MASK & REG__##v7) | \
+ (R_USB_IRQ_MASK_READ_DEV__port_status__##f8##__MASK & REG__##v8) | \
+ (R_USB_IRQ_MASK_READ_DEV__ctl_status__##f9##__MASK & REG__##v9) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_IRQ_MASK_READ_DEV
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_IRQ_MASK_READ_DEV.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_IRQ_MASK_READ_DEV(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_USB_IRQ_MASK_READ_DEV__out_eot__##f1##__VAL(R_USB_IRQ_MASK_READ_DEV_, out_eot_, v1) << R_USB_IRQ_MASK_READ_DEV__out_eot__BITNR) | \
+ (R_USB_IRQ_MASK_READ_DEV__ep3_in_eot__##f2##__VAL(R_USB_IRQ_MASK_READ_DEV_, ep3_in_eot_, v2) << R_USB_IRQ_MASK_READ_DEV__ep3_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_READ_DEV__ep2_in_eot__##f3##__VAL(R_USB_IRQ_MASK_READ_DEV_, ep2_in_eot_, v3) << R_USB_IRQ_MASK_READ_DEV__ep2_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_READ_DEV__ep1_in_eot__##f4##__VAL(R_USB_IRQ_MASK_READ_DEV_, ep1_in_eot_, v4) << R_USB_IRQ_MASK_READ_DEV__ep1_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_READ_DEV__ep0_in_eot__##f5##__VAL(R_USB_IRQ_MASK_READ_DEV_, ep0_in_eot_, v5) << R_USB_IRQ_MASK_READ_DEV__ep0_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_READ_DEV__epid_attn__##f6##__VAL(R_USB_IRQ_MASK_READ_DEV_, epid_attn_, v6) << R_USB_IRQ_MASK_READ_DEV__epid_attn__BITNR) | \
+ (R_USB_IRQ_MASK_READ_DEV__sof__##f7##__VAL(R_USB_IRQ_MASK_READ_DEV_, sof_, v7) << R_USB_IRQ_MASK_READ_DEV__sof__BITNR) | \
+ (R_USB_IRQ_MASK_READ_DEV__port_status__##f8##__VAL(R_USB_IRQ_MASK_READ_DEV_, port_status_, v8) << R_USB_IRQ_MASK_READ_DEV__port_status__BITNR) | \
+ (R_USB_IRQ_MASK_READ_DEV__ctl_status__##f9##__VAL(R_USB_IRQ_MASK_READ_DEV_, ctl_status_, v9) << R_USB_IRQ_MASK_READ_DEV__ctl_status__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_IRQ_MASK_READ_DEV_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_IRQ_MASK_READ_DEV.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_IRQ_MASK_READ_DEV_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9) ( \
+ (R_USB_IRQ_MASK_READ_DEV__out_eot__##f1_##_VAL(R_USB_IRQ_MASK_READ_DEV_, out_eot_, v1) << R_USB_IRQ_MASK_READ_DEV__out_eot__BITNR) | \
+ (R_USB_IRQ_MASK_READ_DEV__ep3_in_eot__##f2_##_VAL(R_USB_IRQ_MASK_READ_DEV_, ep3_in_eot_, v2) << R_USB_IRQ_MASK_READ_DEV__ep3_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_READ_DEV__ep2_in_eot__##f3_##_VAL(R_USB_IRQ_MASK_READ_DEV_, ep2_in_eot_, v3) << R_USB_IRQ_MASK_READ_DEV__ep2_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_READ_DEV__ep1_in_eot__##f4_##_VAL(R_USB_IRQ_MASK_READ_DEV_, ep1_in_eot_, v4) << R_USB_IRQ_MASK_READ_DEV__ep1_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_READ_DEV__ep0_in_eot__##f5_##_VAL(R_USB_IRQ_MASK_READ_DEV_, ep0_in_eot_, v5) << R_USB_IRQ_MASK_READ_DEV__ep0_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_READ_DEV__epid_attn__##f6_##_VAL(R_USB_IRQ_MASK_READ_DEV_, epid_attn_, v6) << R_USB_IRQ_MASK_READ_DEV__epid_attn__BITNR) | \
+ (R_USB_IRQ_MASK_READ_DEV__sof__##f7_##_VAL(R_USB_IRQ_MASK_READ_DEV_, sof_, v7) << R_USB_IRQ_MASK_READ_DEV__sof__BITNR) | \
+ (R_USB_IRQ_MASK_READ_DEV__port_status__##f8_##_VAL(R_USB_IRQ_MASK_READ_DEV_, port_status_, v8) << R_USB_IRQ_MASK_READ_DEV__port_status__BITNR) | \
+ (R_USB_IRQ_MASK_READ_DEV__ctl_status__##f9_##_VAL(R_USB_IRQ_MASK_READ_DEV_, ctl_status_, v9) << R_USB_IRQ_MASK_READ_DEV__ctl_status__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_IRQ_MASK_SET
+ * - type: WO
+ * - addr: 0xb0000204
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_USB_IRQ_MASK_SET
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_USB_IRQ_MASK_SET.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_USB_IRQ_MASK_SET.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_USB_IRQ_MASK_SET(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ *R_USB_IRQ_MASK_SET__SADDR = ( \
+ REG_INITIATED(R_USB_IRQ_MASK_SET_) \
+ REG_VAL__R_USB_IRQ_MASK_SET_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10) \
+ ), \
+ R_USB_IRQ_MASK_SET__WRITE(R_USB_IRQ_MASK_SET__ADDR, *R_USB_IRQ_MASK_SET__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_USB_IRQ_MASK_SET__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_USB_IRQ_MASK_SET.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_USB_IRQ_MASK_SET.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_USB_IRQ_MASK_SET__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ *R_USB_IRQ_MASK_SET__SADDR = ( \
+ REG_INITIATED(R_USB_IRQ_MASK_SET_) \
+ REG_VAL__R_USB_IRQ_MASK_SET_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_IRQ_MASK_SET
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_IRQ_MASK_SET(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ (R_USB_IRQ_MASK_SET__iso_eof__##f1##__MASK & REG__##v1) | \
+ (R_USB_IRQ_MASK_SET__intr_eof__##f2##__MASK & REG__##v2) | \
+ (R_USB_IRQ_MASK_SET__iso_eot__##f3##__MASK & REG__##v3) | \
+ (R_USB_IRQ_MASK_SET__intr_eot__##f4##__MASK & REG__##v4) | \
+ (R_USB_IRQ_MASK_SET__ctl_eot__##f5##__MASK & REG__##v5) | \
+ (R_USB_IRQ_MASK_SET__bulk_eot__##f6##__MASK & REG__##v6) | \
+ (R_USB_IRQ_MASK_SET__epid_attn__##f7##__MASK & REG__##v7) | \
+ (R_USB_IRQ_MASK_SET__sof__##f8##__MASK & REG__##v8) | \
+ (R_USB_IRQ_MASK_SET__port_status__##f9##__MASK & REG__##v9) | \
+ (R_USB_IRQ_MASK_SET__ctl_status__##f10##__MASK & REG__##v10) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_IRQ_MASK_SET
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_IRQ_MASK_SET.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_IRQ_MASK_SET(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ (R_USB_IRQ_MASK_SET__iso_eof__##f1##__VAL(R_USB_IRQ_MASK_SET_, iso_eof_, v1) << R_USB_IRQ_MASK_SET__iso_eof__BITNR) | \
+ (R_USB_IRQ_MASK_SET__intr_eof__##f2##__VAL(R_USB_IRQ_MASK_SET_, intr_eof_, v2) << R_USB_IRQ_MASK_SET__intr_eof__BITNR) | \
+ (R_USB_IRQ_MASK_SET__iso_eot__##f3##__VAL(R_USB_IRQ_MASK_SET_, iso_eot_, v3) << R_USB_IRQ_MASK_SET__iso_eot__BITNR) | \
+ (R_USB_IRQ_MASK_SET__intr_eot__##f4##__VAL(R_USB_IRQ_MASK_SET_, intr_eot_, v4) << R_USB_IRQ_MASK_SET__intr_eot__BITNR) | \
+ (R_USB_IRQ_MASK_SET__ctl_eot__##f5##__VAL(R_USB_IRQ_MASK_SET_, ctl_eot_, v5) << R_USB_IRQ_MASK_SET__ctl_eot__BITNR) | \
+ (R_USB_IRQ_MASK_SET__bulk_eot__##f6##__VAL(R_USB_IRQ_MASK_SET_, bulk_eot_, v6) << R_USB_IRQ_MASK_SET__bulk_eot__BITNR) | \
+ (R_USB_IRQ_MASK_SET__epid_attn__##f7##__VAL(R_USB_IRQ_MASK_SET_, epid_attn_, v7) << R_USB_IRQ_MASK_SET__epid_attn__BITNR) | \
+ (R_USB_IRQ_MASK_SET__sof__##f8##__VAL(R_USB_IRQ_MASK_SET_, sof_, v8) << R_USB_IRQ_MASK_SET__sof__BITNR) | \
+ (R_USB_IRQ_MASK_SET__port_status__##f9##__VAL(R_USB_IRQ_MASK_SET_, port_status_, v9) << R_USB_IRQ_MASK_SET__port_status__BITNR) | \
+ (R_USB_IRQ_MASK_SET__ctl_status__##f10##__VAL(R_USB_IRQ_MASK_SET_, ctl_status_, v10) << R_USB_IRQ_MASK_SET__ctl_status__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_IRQ_MASK_SET_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_IRQ_MASK_SET.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_IRQ_MASK_SET_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10) ( \
+ (R_USB_IRQ_MASK_SET__iso_eof__##f1_##_VAL(R_USB_IRQ_MASK_SET_, iso_eof_, v1) << R_USB_IRQ_MASK_SET__iso_eof__BITNR) | \
+ (R_USB_IRQ_MASK_SET__intr_eof__##f2_##_VAL(R_USB_IRQ_MASK_SET_, intr_eof_, v2) << R_USB_IRQ_MASK_SET__intr_eof__BITNR) | \
+ (R_USB_IRQ_MASK_SET__iso_eot__##f3_##_VAL(R_USB_IRQ_MASK_SET_, iso_eot_, v3) << R_USB_IRQ_MASK_SET__iso_eot__BITNR) | \
+ (R_USB_IRQ_MASK_SET__intr_eot__##f4_##_VAL(R_USB_IRQ_MASK_SET_, intr_eot_, v4) << R_USB_IRQ_MASK_SET__intr_eot__BITNR) | \
+ (R_USB_IRQ_MASK_SET__ctl_eot__##f5_##_VAL(R_USB_IRQ_MASK_SET_, ctl_eot_, v5) << R_USB_IRQ_MASK_SET__ctl_eot__BITNR) | \
+ (R_USB_IRQ_MASK_SET__bulk_eot__##f6_##_VAL(R_USB_IRQ_MASK_SET_, bulk_eot_, v6) << R_USB_IRQ_MASK_SET__bulk_eot__BITNR) | \
+ (R_USB_IRQ_MASK_SET__epid_attn__##f7_##_VAL(R_USB_IRQ_MASK_SET_, epid_attn_, v7) << R_USB_IRQ_MASK_SET__epid_attn__BITNR) | \
+ (R_USB_IRQ_MASK_SET__sof__##f8_##_VAL(R_USB_IRQ_MASK_SET_, sof_, v8) << R_USB_IRQ_MASK_SET__sof__BITNR) | \
+ (R_USB_IRQ_MASK_SET__port_status__##f9_##_VAL(R_USB_IRQ_MASK_SET_, port_status_, v9) << R_USB_IRQ_MASK_SET__port_status__BITNR) | \
+ (R_USB_IRQ_MASK_SET__ctl_status__##f10_##_VAL(R_USB_IRQ_MASK_SET_, ctl_status_, v10) << R_USB_IRQ_MASK_SET__ctl_status__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_IRQ_MASK_SET_DEV
+ * - type: WO
+ * - addr: 0xb0000204
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_USB_IRQ_MASK_SET_DEV
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_USB_IRQ_MASK_SET_DEV.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_USB_IRQ_MASK_SET_DEV.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_USB_IRQ_MASK_SET_DEV(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ *R_USB_IRQ_MASK_SET_DEV__SADDR = ( \
+ REG_INITIATED(R_USB_IRQ_MASK_SET_DEV_) \
+ REG_VAL__R_USB_IRQ_MASK_SET_DEV_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9) \
+ ), \
+ R_USB_IRQ_MASK_SET_DEV__WRITE(R_USB_IRQ_MASK_SET_DEV__ADDR, *R_USB_IRQ_MASK_SET_DEV__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_USB_IRQ_MASK_SET_DEV__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_USB_IRQ_MASK_SET_DEV.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_USB_IRQ_MASK_SET_DEV.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_USB_IRQ_MASK_SET_DEV__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ *R_USB_IRQ_MASK_SET_DEV__SADDR = ( \
+ REG_INITIATED(R_USB_IRQ_MASK_SET_DEV_) \
+ REG_VAL__R_USB_IRQ_MASK_SET_DEV_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_IRQ_MASK_SET_DEV
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_IRQ_MASK_SET_DEV(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_USB_IRQ_MASK_SET_DEV__out_eot__##f1##__MASK & REG__##v1) | \
+ (R_USB_IRQ_MASK_SET_DEV__ep3_in_eot__##f2##__MASK & REG__##v2) | \
+ (R_USB_IRQ_MASK_SET_DEV__ep2_in_eot__##f3##__MASK & REG__##v3) | \
+ (R_USB_IRQ_MASK_SET_DEV__ep1_in_eot__##f4##__MASK & REG__##v4) | \
+ (R_USB_IRQ_MASK_SET_DEV__ep0_in_eot__##f5##__MASK & REG__##v5) | \
+ (R_USB_IRQ_MASK_SET_DEV__epid_attn__##f6##__MASK & REG__##v6) | \
+ (R_USB_IRQ_MASK_SET_DEV__sof__##f7##__MASK & REG__##v7) | \
+ (R_USB_IRQ_MASK_SET_DEV__port_status__##f8##__MASK & REG__##v8) | \
+ (R_USB_IRQ_MASK_SET_DEV__ctl_status__##f9##__MASK & REG__##v9) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_IRQ_MASK_SET_DEV
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_IRQ_MASK_SET_DEV.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_IRQ_MASK_SET_DEV(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_USB_IRQ_MASK_SET_DEV__out_eot__##f1##__VAL(R_USB_IRQ_MASK_SET_DEV_, out_eot_, v1) << R_USB_IRQ_MASK_SET_DEV__out_eot__BITNR) | \
+ (R_USB_IRQ_MASK_SET_DEV__ep3_in_eot__##f2##__VAL(R_USB_IRQ_MASK_SET_DEV_, ep3_in_eot_, v2) << R_USB_IRQ_MASK_SET_DEV__ep3_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_SET_DEV__ep2_in_eot__##f3##__VAL(R_USB_IRQ_MASK_SET_DEV_, ep2_in_eot_, v3) << R_USB_IRQ_MASK_SET_DEV__ep2_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_SET_DEV__ep1_in_eot__##f4##__VAL(R_USB_IRQ_MASK_SET_DEV_, ep1_in_eot_, v4) << R_USB_IRQ_MASK_SET_DEV__ep1_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_SET_DEV__ep0_in_eot__##f5##__VAL(R_USB_IRQ_MASK_SET_DEV_, ep0_in_eot_, v5) << R_USB_IRQ_MASK_SET_DEV__ep0_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_SET_DEV__epid_attn__##f6##__VAL(R_USB_IRQ_MASK_SET_DEV_, epid_attn_, v6) << R_USB_IRQ_MASK_SET_DEV__epid_attn__BITNR) | \
+ (R_USB_IRQ_MASK_SET_DEV__sof__##f7##__VAL(R_USB_IRQ_MASK_SET_DEV_, sof_, v7) << R_USB_IRQ_MASK_SET_DEV__sof__BITNR) | \
+ (R_USB_IRQ_MASK_SET_DEV__port_status__##f8##__VAL(R_USB_IRQ_MASK_SET_DEV_, port_status_, v8) << R_USB_IRQ_MASK_SET_DEV__port_status__BITNR) | \
+ (R_USB_IRQ_MASK_SET_DEV__ctl_status__##f9##__VAL(R_USB_IRQ_MASK_SET_DEV_, ctl_status_, v9) << R_USB_IRQ_MASK_SET_DEV__ctl_status__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_IRQ_MASK_SET_DEV_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_IRQ_MASK_SET_DEV.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_IRQ_MASK_SET_DEV_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9) ( \
+ (R_USB_IRQ_MASK_SET_DEV__out_eot__##f1_##_VAL(R_USB_IRQ_MASK_SET_DEV_, out_eot_, v1) << R_USB_IRQ_MASK_SET_DEV__out_eot__BITNR) | \
+ (R_USB_IRQ_MASK_SET_DEV__ep3_in_eot__##f2_##_VAL(R_USB_IRQ_MASK_SET_DEV_, ep3_in_eot_, v2) << R_USB_IRQ_MASK_SET_DEV__ep3_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_SET_DEV__ep2_in_eot__##f3_##_VAL(R_USB_IRQ_MASK_SET_DEV_, ep2_in_eot_, v3) << R_USB_IRQ_MASK_SET_DEV__ep2_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_SET_DEV__ep1_in_eot__##f4_##_VAL(R_USB_IRQ_MASK_SET_DEV_, ep1_in_eot_, v4) << R_USB_IRQ_MASK_SET_DEV__ep1_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_SET_DEV__ep0_in_eot__##f5_##_VAL(R_USB_IRQ_MASK_SET_DEV_, ep0_in_eot_, v5) << R_USB_IRQ_MASK_SET_DEV__ep0_in_eot__BITNR) | \
+ (R_USB_IRQ_MASK_SET_DEV__epid_attn__##f6_##_VAL(R_USB_IRQ_MASK_SET_DEV_, epid_attn_, v6) << R_USB_IRQ_MASK_SET_DEV__epid_attn__BITNR) | \
+ (R_USB_IRQ_MASK_SET_DEV__sof__##f7_##_VAL(R_USB_IRQ_MASK_SET_DEV_, sof_, v7) << R_USB_IRQ_MASK_SET_DEV__sof__BITNR) | \
+ (R_USB_IRQ_MASK_SET_DEV__port_status__##f8_##_VAL(R_USB_IRQ_MASK_SET_DEV_, port_status_, v8) << R_USB_IRQ_MASK_SET_DEV__port_status__BITNR) | \
+ (R_USB_IRQ_MASK_SET_DEV__ctl_status__##f9_##_VAL(R_USB_IRQ_MASK_SET_DEV_, ctl_status_, v9) << R_USB_IRQ_MASK_SET_DEV__ctl_status__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_IRQ_READ
+ * - type: RO
+ * - addr: 0xb0000206
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_IRQ_READ
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_IRQ_READ(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ (R_USB_IRQ_READ__iso_eof__##f1##__MASK & REG__##v1) | \
+ (R_USB_IRQ_READ__intr_eof__##f2##__MASK & REG__##v2) | \
+ (R_USB_IRQ_READ__iso_eot__##f3##__MASK & REG__##v3) | \
+ (R_USB_IRQ_READ__intr_eot__##f4##__MASK & REG__##v4) | \
+ (R_USB_IRQ_READ__ctl_eot__##f5##__MASK & REG__##v5) | \
+ (R_USB_IRQ_READ__bulk_eot__##f6##__MASK & REG__##v6) | \
+ (R_USB_IRQ_READ__epid_attn__##f7##__MASK & REG__##v7) | \
+ (R_USB_IRQ_READ__sof__##f8##__MASK & REG__##v8) | \
+ (R_USB_IRQ_READ__port_status__##f9##__MASK & REG__##v9) | \
+ (R_USB_IRQ_READ__ctl_status__##f10##__MASK & REG__##v10) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_IRQ_READ
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_IRQ_READ.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_IRQ_READ(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10) ( \
+ (R_USB_IRQ_READ__iso_eof__##f1##__VAL(R_USB_IRQ_READ_, iso_eof_, v1) << R_USB_IRQ_READ__iso_eof__BITNR) | \
+ (R_USB_IRQ_READ__intr_eof__##f2##__VAL(R_USB_IRQ_READ_, intr_eof_, v2) << R_USB_IRQ_READ__intr_eof__BITNR) | \
+ (R_USB_IRQ_READ__iso_eot__##f3##__VAL(R_USB_IRQ_READ_, iso_eot_, v3) << R_USB_IRQ_READ__iso_eot__BITNR) | \
+ (R_USB_IRQ_READ__intr_eot__##f4##__VAL(R_USB_IRQ_READ_, intr_eot_, v4) << R_USB_IRQ_READ__intr_eot__BITNR) | \
+ (R_USB_IRQ_READ__ctl_eot__##f5##__VAL(R_USB_IRQ_READ_, ctl_eot_, v5) << R_USB_IRQ_READ__ctl_eot__BITNR) | \
+ (R_USB_IRQ_READ__bulk_eot__##f6##__VAL(R_USB_IRQ_READ_, bulk_eot_, v6) << R_USB_IRQ_READ__bulk_eot__BITNR) | \
+ (R_USB_IRQ_READ__epid_attn__##f7##__VAL(R_USB_IRQ_READ_, epid_attn_, v7) << R_USB_IRQ_READ__epid_attn__BITNR) | \
+ (R_USB_IRQ_READ__sof__##f8##__VAL(R_USB_IRQ_READ_, sof_, v8) << R_USB_IRQ_READ__sof__BITNR) | \
+ (R_USB_IRQ_READ__port_status__##f9##__VAL(R_USB_IRQ_READ_, port_status_, v9) << R_USB_IRQ_READ__port_status__BITNR) | \
+ (R_USB_IRQ_READ__ctl_status__##f10##__VAL(R_USB_IRQ_READ_, ctl_status_, v10) << R_USB_IRQ_READ__ctl_status__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_IRQ_READ_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_IRQ_READ.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_IRQ_READ_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10) ( \
+ (R_USB_IRQ_READ__iso_eof__##f1_##_VAL(R_USB_IRQ_READ_, iso_eof_, v1) << R_USB_IRQ_READ__iso_eof__BITNR) | \
+ (R_USB_IRQ_READ__intr_eof__##f2_##_VAL(R_USB_IRQ_READ_, intr_eof_, v2) << R_USB_IRQ_READ__intr_eof__BITNR) | \
+ (R_USB_IRQ_READ__iso_eot__##f3_##_VAL(R_USB_IRQ_READ_, iso_eot_, v3) << R_USB_IRQ_READ__iso_eot__BITNR) | \
+ (R_USB_IRQ_READ__intr_eot__##f4_##_VAL(R_USB_IRQ_READ_, intr_eot_, v4) << R_USB_IRQ_READ__intr_eot__BITNR) | \
+ (R_USB_IRQ_READ__ctl_eot__##f5_##_VAL(R_USB_IRQ_READ_, ctl_eot_, v5) << R_USB_IRQ_READ__ctl_eot__BITNR) | \
+ (R_USB_IRQ_READ__bulk_eot__##f6_##_VAL(R_USB_IRQ_READ_, bulk_eot_, v6) << R_USB_IRQ_READ__bulk_eot__BITNR) | \
+ (R_USB_IRQ_READ__epid_attn__##f7_##_VAL(R_USB_IRQ_READ_, epid_attn_, v7) << R_USB_IRQ_READ__epid_attn__BITNR) | \
+ (R_USB_IRQ_READ__sof__##f8_##_VAL(R_USB_IRQ_READ_, sof_, v8) << R_USB_IRQ_READ__sof__BITNR) | \
+ (R_USB_IRQ_READ__port_status__##f9_##_VAL(R_USB_IRQ_READ_, port_status_, v9) << R_USB_IRQ_READ__port_status__BITNR) | \
+ (R_USB_IRQ_READ__ctl_status__##f10_##_VAL(R_USB_IRQ_READ_, ctl_status_, v10) << R_USB_IRQ_READ__ctl_status__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_IRQ_READ_DEV
+ * - type: RO
+ * - addr: 0xb0000206
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_IRQ_READ_DEV
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_IRQ_READ_DEV(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_USB_IRQ_READ_DEV__out_eot__##f1##__MASK & REG__##v1) | \
+ (R_USB_IRQ_READ_DEV__ep3_in_eot__##f2##__MASK & REG__##v2) | \
+ (R_USB_IRQ_READ_DEV__ep2_in_eot__##f3##__MASK & REG__##v3) | \
+ (R_USB_IRQ_READ_DEV__ep1_in_eot__##f4##__MASK & REG__##v4) | \
+ (R_USB_IRQ_READ_DEV__ep0_in_eot__##f5##__MASK & REG__##v5) | \
+ (R_USB_IRQ_READ_DEV__epid_attn__##f6##__MASK & REG__##v6) | \
+ (R_USB_IRQ_READ_DEV__sof__##f7##__MASK & REG__##v7) | \
+ (R_USB_IRQ_READ_DEV__port_status__##f8##__MASK & REG__##v8) | \
+ (R_USB_IRQ_READ_DEV__ctl_status__##f9##__MASK & REG__##v9) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_IRQ_READ_DEV
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_IRQ_READ_DEV.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_IRQ_READ_DEV(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9) ( \
+ (R_USB_IRQ_READ_DEV__out_eot__##f1##__VAL(R_USB_IRQ_READ_DEV_, out_eot_, v1) << R_USB_IRQ_READ_DEV__out_eot__BITNR) | \
+ (R_USB_IRQ_READ_DEV__ep3_in_eot__##f2##__VAL(R_USB_IRQ_READ_DEV_, ep3_in_eot_, v2) << R_USB_IRQ_READ_DEV__ep3_in_eot__BITNR) | \
+ (R_USB_IRQ_READ_DEV__ep2_in_eot__##f3##__VAL(R_USB_IRQ_READ_DEV_, ep2_in_eot_, v3) << R_USB_IRQ_READ_DEV__ep2_in_eot__BITNR) | \
+ (R_USB_IRQ_READ_DEV__ep1_in_eot__##f4##__VAL(R_USB_IRQ_READ_DEV_, ep1_in_eot_, v4) << R_USB_IRQ_READ_DEV__ep1_in_eot__BITNR) | \
+ (R_USB_IRQ_READ_DEV__ep0_in_eot__##f5##__VAL(R_USB_IRQ_READ_DEV_, ep0_in_eot_, v5) << R_USB_IRQ_READ_DEV__ep0_in_eot__BITNR) | \
+ (R_USB_IRQ_READ_DEV__epid_attn__##f6##__VAL(R_USB_IRQ_READ_DEV_, epid_attn_, v6) << R_USB_IRQ_READ_DEV__epid_attn__BITNR) | \
+ (R_USB_IRQ_READ_DEV__sof__##f7##__VAL(R_USB_IRQ_READ_DEV_, sof_, v7) << R_USB_IRQ_READ_DEV__sof__BITNR) | \
+ (R_USB_IRQ_READ_DEV__port_status__##f8##__VAL(R_USB_IRQ_READ_DEV_, port_status_, v8) << R_USB_IRQ_READ_DEV__port_status__BITNR) | \
+ (R_USB_IRQ_READ_DEV__ctl_status__##f9##__VAL(R_USB_IRQ_READ_DEV_, ctl_status_, v9) << R_USB_IRQ_READ_DEV__ctl_status__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_IRQ_READ_DEV_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_IRQ_READ_DEV.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_IRQ_READ_DEV_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9) ( \
+ (R_USB_IRQ_READ_DEV__out_eot__##f1_##_VAL(R_USB_IRQ_READ_DEV_, out_eot_, v1) << R_USB_IRQ_READ_DEV__out_eot__BITNR) | \
+ (R_USB_IRQ_READ_DEV__ep3_in_eot__##f2_##_VAL(R_USB_IRQ_READ_DEV_, ep3_in_eot_, v2) << R_USB_IRQ_READ_DEV__ep3_in_eot__BITNR) | \
+ (R_USB_IRQ_READ_DEV__ep2_in_eot__##f3_##_VAL(R_USB_IRQ_READ_DEV_, ep2_in_eot_, v3) << R_USB_IRQ_READ_DEV__ep2_in_eot__BITNR) | \
+ (R_USB_IRQ_READ_DEV__ep1_in_eot__##f4_##_VAL(R_USB_IRQ_READ_DEV_, ep1_in_eot_, v4) << R_USB_IRQ_READ_DEV__ep1_in_eot__BITNR) | \
+ (R_USB_IRQ_READ_DEV__ep0_in_eot__##f5_##_VAL(R_USB_IRQ_READ_DEV_, ep0_in_eot_, v5) << R_USB_IRQ_READ_DEV__ep0_in_eot__BITNR) | \
+ (R_USB_IRQ_READ_DEV__epid_attn__##f6_##_VAL(R_USB_IRQ_READ_DEV_, epid_attn_, v6) << R_USB_IRQ_READ_DEV__epid_attn__BITNR) | \
+ (R_USB_IRQ_READ_DEV__sof__##f7_##_VAL(R_USB_IRQ_READ_DEV_, sof_, v7) << R_USB_IRQ_READ_DEV__sof__BITNR) | \
+ (R_USB_IRQ_READ_DEV__port_status__##f8_##_VAL(R_USB_IRQ_READ_DEV_, port_status_, v8) << R_USB_IRQ_READ_DEV__port_status__BITNR) | \
+ (R_USB_IRQ_READ_DEV__ctl_status__##f9_##_VAL(R_USB_IRQ_READ_DEV_, ctl_status_, v9) << R_USB_IRQ_READ_DEV__ctl_status__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_PORT1_DISABLE
+ * - type: WO
+ * - addr: 0xb000006a
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_USB_PORT1_DISABLE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_USB_PORT1_DISABLE.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_USB_PORT1_DISABLE.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_USB_PORT1_DISABLE(f1,v1) ( \
+ *R_USB_PORT1_DISABLE__SADDR = ( \
+ REG_INITIATED(R_USB_PORT1_DISABLE_) \
+ REG_VAL__R_USB_PORT1_DISABLE_(f1##_,v1) \
+ ), \
+ R_USB_PORT1_DISABLE__WRITE(R_USB_PORT1_DISABLE__ADDR, *R_USB_PORT1_DISABLE__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_USB_PORT1_DISABLE__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_USB_PORT1_DISABLE.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_USB_PORT1_DISABLE.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_USB_PORT1_DISABLE__SHADOW(f1,v1) ( \
+ *R_USB_PORT1_DISABLE__SADDR = ( \
+ REG_INITIATED(R_USB_PORT1_DISABLE_) \
+ REG_VAL__R_USB_PORT1_DISABLE_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_PORT1_DISABLE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_PORT1_DISABLE(f1,v1) ( \
+ (R_USB_PORT1_DISABLE__disable__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_PORT1_DISABLE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_PORT1_DISABLE.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_PORT1_DISABLE(f1,v1) ( \
+ (R_USB_PORT1_DISABLE__disable__##f1##__VAL(R_USB_PORT1_DISABLE_, disable_, v1) << R_USB_PORT1_DISABLE__disable__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_PORT1_DISABLE_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_PORT1_DISABLE.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_PORT1_DISABLE_(f1_,v1) ( \
+ (R_USB_PORT1_DISABLE__disable__##f1_##_VAL(R_USB_PORT1_DISABLE_, disable_, v1) << R_USB_PORT1_DISABLE__disable__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_PORT2_DISABLE
+ * - type: WO
+ * - addr: 0xb0000052
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_USB_PORT2_DISABLE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_USB_PORT2_DISABLE.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_USB_PORT2_DISABLE.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_USB_PORT2_DISABLE(f1,v1) ( \
+ *R_USB_PORT2_DISABLE__SADDR = ( \
+ REG_INITIATED(R_USB_PORT2_DISABLE_) \
+ REG_VAL__R_USB_PORT2_DISABLE_(f1##_,v1) \
+ ), \
+ R_USB_PORT2_DISABLE__WRITE(R_USB_PORT2_DISABLE__ADDR, *R_USB_PORT2_DISABLE__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_USB_PORT2_DISABLE__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_USB_PORT2_DISABLE.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_USB_PORT2_DISABLE.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_USB_PORT2_DISABLE__SHADOW(f1,v1) ( \
+ *R_USB_PORT2_DISABLE__SADDR = ( \
+ REG_INITIATED(R_USB_PORT2_DISABLE_) \
+ REG_VAL__R_USB_PORT2_DISABLE_(f1##_,v1) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_PORT2_DISABLE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_PORT2_DISABLE(f1,v1) ( \
+ (R_USB_PORT2_DISABLE__disable__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_PORT2_DISABLE
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_PORT2_DISABLE.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_PORT2_DISABLE(f1,v1) ( \
+ (R_USB_PORT2_DISABLE__disable__##f1##__VAL(R_USB_PORT2_DISABLE_, disable_, v1) << R_USB_PORT2_DISABLE__disable__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_PORT2_DISABLE_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_PORT2_DISABLE.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_PORT2_DISABLE_(f1_,v1) ( \
+ (R_USB_PORT2_DISABLE__disable__##f1_##_VAL(R_USB_PORT2_DISABLE_, disable_, v1) << R_USB_PORT2_DISABLE__disable__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_REVISION
+ * - type: RO
+ * - addr: 0xb0000200
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_REVISION
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_REVISION(f1,v1,f2,v2) ( \
+ (R_USB_REVISION__major__##f1##__MASK & REG__##v1) | \
+ (R_USB_REVISION__minor__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_REVISION
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_REVISION.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_REVISION(f1,v1,f2,v2) ( \
+ (R_USB_REVISION__major__##f1##__VAL(R_USB_REVISION_, major_, v1) << R_USB_REVISION__major__BITNR) | \
+ (R_USB_REVISION__minor__##f2##__VAL(R_USB_REVISION_, minor_, v2) << R_USB_REVISION__minor__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_REVISION_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_REVISION.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_REVISION_(f1_,v1,f2_,v2) ( \
+ (R_USB_REVISION__major__##f1_##_VAL(R_USB_REVISION_, major_, v1) << R_USB_REVISION__major__BITNR) | \
+ (R_USB_REVISION__minor__##f2_##_VAL(R_USB_REVISION_, minor_, v2) << R_USB_REVISION__minor__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_RH_PORT_STATUS_1
+ * - type: RO
+ * - addr: 0xb0000218
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_RH_PORT_STATUS_1
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_RH_PORT_STATUS_1(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7) ( \
+ (R_USB_RH_PORT_STATUS_1__speed__##f1##__MASK & REG__##v1) | \
+ (R_USB_RH_PORT_STATUS_1__power__##f2##__MASK & REG__##v2) | \
+ (R_USB_RH_PORT_STATUS_1__reset__##f3##__MASK & REG__##v3) | \
+ (R_USB_RH_PORT_STATUS_1__overcurrent__##f4##__MASK & REG__##v4) | \
+ (R_USB_RH_PORT_STATUS_1__suspended__##f5##__MASK & REG__##v5) | \
+ (R_USB_RH_PORT_STATUS_1__enabled__##f6##__MASK & REG__##v6) | \
+ (R_USB_RH_PORT_STATUS_1__connected__##f7##__MASK & REG__##v7) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_RH_PORT_STATUS_1
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_RH_PORT_STATUS_1.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_RH_PORT_STATUS_1(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7) ( \
+ (R_USB_RH_PORT_STATUS_1__speed__##f1##__VAL(R_USB_RH_PORT_STATUS_1_, speed_, v1) << R_USB_RH_PORT_STATUS_1__speed__BITNR) | \
+ (R_USB_RH_PORT_STATUS_1__power__##f2##__VAL(R_USB_RH_PORT_STATUS_1_, power_, v2) << R_USB_RH_PORT_STATUS_1__power__BITNR) | \
+ (R_USB_RH_PORT_STATUS_1__reset__##f3##__VAL(R_USB_RH_PORT_STATUS_1_, reset_, v3) << R_USB_RH_PORT_STATUS_1__reset__BITNR) | \
+ (R_USB_RH_PORT_STATUS_1__overcurrent__##f4##__VAL(R_USB_RH_PORT_STATUS_1_, overcurrent_, v4) << R_USB_RH_PORT_STATUS_1__overcurrent__BITNR) | \
+ (R_USB_RH_PORT_STATUS_1__suspended__##f5##__VAL(R_USB_RH_PORT_STATUS_1_, suspended_, v5) << R_USB_RH_PORT_STATUS_1__suspended__BITNR) | \
+ (R_USB_RH_PORT_STATUS_1__enabled__##f6##__VAL(R_USB_RH_PORT_STATUS_1_, enabled_, v6) << R_USB_RH_PORT_STATUS_1__enabled__BITNR) | \
+ (R_USB_RH_PORT_STATUS_1__connected__##f7##__VAL(R_USB_RH_PORT_STATUS_1_, connected_, v7) << R_USB_RH_PORT_STATUS_1__connected__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_RH_PORT_STATUS_1_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_RH_PORT_STATUS_1.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_RH_PORT_STATUS_1_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7) ( \
+ (R_USB_RH_PORT_STATUS_1__speed__##f1_##_VAL(R_USB_RH_PORT_STATUS_1_, speed_, v1) << R_USB_RH_PORT_STATUS_1__speed__BITNR) | \
+ (R_USB_RH_PORT_STATUS_1__power__##f2_##_VAL(R_USB_RH_PORT_STATUS_1_, power_, v2) << R_USB_RH_PORT_STATUS_1__power__BITNR) | \
+ (R_USB_RH_PORT_STATUS_1__reset__##f3_##_VAL(R_USB_RH_PORT_STATUS_1_, reset_, v3) << R_USB_RH_PORT_STATUS_1__reset__BITNR) | \
+ (R_USB_RH_PORT_STATUS_1__overcurrent__##f4_##_VAL(R_USB_RH_PORT_STATUS_1_, overcurrent_, v4) << R_USB_RH_PORT_STATUS_1__overcurrent__BITNR) | \
+ (R_USB_RH_PORT_STATUS_1__suspended__##f5_##_VAL(R_USB_RH_PORT_STATUS_1_, suspended_, v5) << R_USB_RH_PORT_STATUS_1__suspended__BITNR) | \
+ (R_USB_RH_PORT_STATUS_1__enabled__##f6_##_VAL(R_USB_RH_PORT_STATUS_1_, enabled_, v6) << R_USB_RH_PORT_STATUS_1__enabled__BITNR) | \
+ (R_USB_RH_PORT_STATUS_1__connected__##f7_##_VAL(R_USB_RH_PORT_STATUS_1_, connected_, v7) << R_USB_RH_PORT_STATUS_1__connected__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_RH_PORT_STATUS_2
+ * - type: RO
+ * - addr: 0xb000021a
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_RH_PORT_STATUS_2
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_RH_PORT_STATUS_2(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7) ( \
+ (R_USB_RH_PORT_STATUS_2__speed__##f1##__MASK & REG__##v1) | \
+ (R_USB_RH_PORT_STATUS_2__power__##f2##__MASK & REG__##v2) | \
+ (R_USB_RH_PORT_STATUS_2__reset__##f3##__MASK & REG__##v3) | \
+ (R_USB_RH_PORT_STATUS_2__overcurrent__##f4##__MASK & REG__##v4) | \
+ (R_USB_RH_PORT_STATUS_2__suspended__##f5##__MASK & REG__##v5) | \
+ (R_USB_RH_PORT_STATUS_2__enabled__##f6##__MASK & REG__##v6) | \
+ (R_USB_RH_PORT_STATUS_2__connected__##f7##__MASK & REG__##v7) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_RH_PORT_STATUS_2
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_RH_PORT_STATUS_2.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_RH_PORT_STATUS_2(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7) ( \
+ (R_USB_RH_PORT_STATUS_2__speed__##f1##__VAL(R_USB_RH_PORT_STATUS_2_, speed_, v1) << R_USB_RH_PORT_STATUS_2__speed__BITNR) | \
+ (R_USB_RH_PORT_STATUS_2__power__##f2##__VAL(R_USB_RH_PORT_STATUS_2_, power_, v2) << R_USB_RH_PORT_STATUS_2__power__BITNR) | \
+ (R_USB_RH_PORT_STATUS_2__reset__##f3##__VAL(R_USB_RH_PORT_STATUS_2_, reset_, v3) << R_USB_RH_PORT_STATUS_2__reset__BITNR) | \
+ (R_USB_RH_PORT_STATUS_2__overcurrent__##f4##__VAL(R_USB_RH_PORT_STATUS_2_, overcurrent_, v4) << R_USB_RH_PORT_STATUS_2__overcurrent__BITNR) | \
+ (R_USB_RH_PORT_STATUS_2__suspended__##f5##__VAL(R_USB_RH_PORT_STATUS_2_, suspended_, v5) << R_USB_RH_PORT_STATUS_2__suspended__BITNR) | \
+ (R_USB_RH_PORT_STATUS_2__enabled__##f6##__VAL(R_USB_RH_PORT_STATUS_2_, enabled_, v6) << R_USB_RH_PORT_STATUS_2__enabled__BITNR) | \
+ (R_USB_RH_PORT_STATUS_2__connected__##f7##__VAL(R_USB_RH_PORT_STATUS_2_, connected_, v7) << R_USB_RH_PORT_STATUS_2__connected__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_RH_PORT_STATUS_2_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_RH_PORT_STATUS_2.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_RH_PORT_STATUS_2_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7) ( \
+ (R_USB_RH_PORT_STATUS_2__speed__##f1_##_VAL(R_USB_RH_PORT_STATUS_2_, speed_, v1) << R_USB_RH_PORT_STATUS_2__speed__BITNR) | \
+ (R_USB_RH_PORT_STATUS_2__power__##f2_##_VAL(R_USB_RH_PORT_STATUS_2_, power_, v2) << R_USB_RH_PORT_STATUS_2__power__BITNR) | \
+ (R_USB_RH_PORT_STATUS_2__reset__##f3_##_VAL(R_USB_RH_PORT_STATUS_2_, reset_, v3) << R_USB_RH_PORT_STATUS_2__reset__BITNR) | \
+ (R_USB_RH_PORT_STATUS_2__overcurrent__##f4_##_VAL(R_USB_RH_PORT_STATUS_2_, overcurrent_, v4) << R_USB_RH_PORT_STATUS_2__overcurrent__BITNR) | \
+ (R_USB_RH_PORT_STATUS_2__suspended__##f5_##_VAL(R_USB_RH_PORT_STATUS_2_, suspended_, v5) << R_USB_RH_PORT_STATUS_2__suspended__BITNR) | \
+ (R_USB_RH_PORT_STATUS_2__enabled__##f6_##_VAL(R_USB_RH_PORT_STATUS_2_, enabled_, v6) << R_USB_RH_PORT_STATUS_2__enabled__BITNR) | \
+ (R_USB_RH_PORT_STATUS_2__connected__##f7_##_VAL(R_USB_RH_PORT_STATUS_2_, connected_, v7) << R_USB_RH_PORT_STATUS_2__connected__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_RH_STATUS
+ * - type: RO
+ * - addr: 0xb0000203
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_RH_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_RH_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) ( \
+ (R_USB_RH_STATUS__babble2__##f1##__MASK & REG__##v1) | \
+ (R_USB_RH_STATUS__babble1__##f2##__MASK & REG__##v2) | \
+ (R_USB_RH_STATUS__bus1__##f3##__MASK & REG__##v3) | \
+ (R_USB_RH_STATUS__bus2__##f4##__MASK & REG__##v4) | \
+ (R_USB_RH_STATUS__nports__##f5##__MASK & REG__##v5) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_RH_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_RH_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_RH_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5) ( \
+ (R_USB_RH_STATUS__babble2__##f1##__VAL(R_USB_RH_STATUS_, babble2_, v1) << R_USB_RH_STATUS__babble2__BITNR) | \
+ (R_USB_RH_STATUS__babble1__##f2##__VAL(R_USB_RH_STATUS_, babble1_, v2) << R_USB_RH_STATUS__babble1__BITNR) | \
+ (R_USB_RH_STATUS__bus1__##f3##__VAL(R_USB_RH_STATUS_, bus1_, v3) << R_USB_RH_STATUS__bus1__BITNR) | \
+ (R_USB_RH_STATUS__bus2__##f4##__VAL(R_USB_RH_STATUS_, bus2_, v4) << R_USB_RH_STATUS__bus2__BITNR) | \
+ (R_USB_RH_STATUS__nports__##f5##__VAL(R_USB_RH_STATUS_, nports_, v5) << R_USB_RH_STATUS__nports__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_RH_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_RH_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_RH_STATUS_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5) ( \
+ (R_USB_RH_STATUS__babble2__##f1_##_VAL(R_USB_RH_STATUS_, babble2_, v1) << R_USB_RH_STATUS__babble2__BITNR) | \
+ (R_USB_RH_STATUS__babble1__##f2_##_VAL(R_USB_RH_STATUS_, babble1_, v2) << R_USB_RH_STATUS__babble1__BITNR) | \
+ (R_USB_RH_STATUS__bus1__##f3_##_VAL(R_USB_RH_STATUS_, bus1_, v3) << R_USB_RH_STATUS__bus1__BITNR) | \
+ (R_USB_RH_STATUS__bus2__##f4_##_VAL(R_USB_RH_STATUS_, bus2_, v4) << R_USB_RH_STATUS__bus2__BITNR) | \
+ (R_USB_RH_STATUS__nports__##f5_##_VAL(R_USB_RH_STATUS_, nports_, v5) << R_USB_RH_STATUS__nports__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_SNMP_TERROR
+ * - type: RW
+ * - addr: 0xb0000220
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_USB_SNMP_TERROR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_USB_SNMP_TERROR.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_USB_SNMP_TERROR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_USB_SNMP_TERROR(f1,v1) ( \
+ R_USB_SNMP_TERROR__WRITE(R_USB_SNMP_TERROR__ADDR, ( \
+ REG_VAL__R_USB_SNMP_TERROR_(f1##_,v1) ) \
+ ) \
+)
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_SNMP_TERROR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_SNMP_TERROR(f1,v1) ( \
+ (R_USB_SNMP_TERROR__value__##f1##__MASK & REG__##v1) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_SNMP_TERROR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_SNMP_TERROR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_SNMP_TERROR(f1,v1) ( \
+ (R_USB_SNMP_TERROR__value__##f1##__VAL(R_USB_SNMP_TERROR_, value_, v1) << R_USB_SNMP_TERROR__value__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_SNMP_TERROR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_SNMP_TERROR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_SNMP_TERROR_(f1_,v1) ( \
+ (R_USB_SNMP_TERROR__value__##f1_##_VAL(R_USB_SNMP_TERROR_, value_, v1) << R_USB_SNMP_TERROR__value__BITNR) \
+)
+
+#endif
+
+/*
+ * R_USB_STATUS
+ * - type: RO
+ * - addr: 0xb0000202
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_USB_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_USB_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ (R_USB_STATUS__ourun__##f1##__MASK & REG__##v1) | \
+ (R_USB_STATUS__perror__##f2##__MASK & REG__##v2) | \
+ (R_USB_STATUS__device_mode__##f3##__MASK & REG__##v3) | \
+ (R_USB_STATUS__host_mode__##f4##__MASK & REG__##v4) | \
+ (R_USB_STATUS__started__##f5##__MASK & REG__##v5) | \
+ (R_USB_STATUS__running__##f6##__MASK & REG__##v6) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_STATUS
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_STATUS.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_STATUS(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6) ( \
+ (R_USB_STATUS__ourun__##f1##__VAL(R_USB_STATUS_, ourun_, v1) << R_USB_STATUS__ourun__BITNR) | \
+ (R_USB_STATUS__perror__##f2##__VAL(R_USB_STATUS_, perror_, v2) << R_USB_STATUS__perror__BITNR) | \
+ (R_USB_STATUS__device_mode__##f3##__VAL(R_USB_STATUS_, device_mode_, v3) << R_USB_STATUS__device_mode__BITNR) | \
+ (R_USB_STATUS__host_mode__##f4##__VAL(R_USB_STATUS_, host_mode_, v4) << R_USB_STATUS__host_mode__BITNR) | \
+ (R_USB_STATUS__started__##f5##__VAL(R_USB_STATUS_, started_, v5) << R_USB_STATUS__started__BITNR) | \
+ (R_USB_STATUS__running__##f6##__VAL(R_USB_STATUS_, running_, v6) << R_USB_STATUS__running__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_USB_STATUS_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_USB_STATUS.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_USB_STATUS_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6) ( \
+ (R_USB_STATUS__ourun__##f1_##_VAL(R_USB_STATUS_, ourun_, v1) << R_USB_STATUS__ourun__BITNR) | \
+ (R_USB_STATUS__perror__##f2_##_VAL(R_USB_STATUS_, perror_, v2) << R_USB_STATUS__perror__BITNR) | \
+ (R_USB_STATUS__device_mode__##f3_##_VAL(R_USB_STATUS_, device_mode_, v3) << R_USB_STATUS__device_mode__BITNR) | \
+ (R_USB_STATUS__host_mode__##f4_##_VAL(R_USB_STATUS_, host_mode_, v4) << R_USB_STATUS__host_mode__BITNR) | \
+ (R_USB_STATUS__started__##f5_##_VAL(R_USB_STATUS_, started_, v5) << R_USB_STATUS__started__BITNR) | \
+ (R_USB_STATUS__running__##f6_##_VAL(R_USB_STATUS_, running_, v6) << R_USB_STATUS__running__BITNR) \
+)
+
+#endif
+
+/*
+ * R_VECT_MASK_CLR
+ * - type: WO
+ * - addr: 0xb00000d8
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_VECT_MASK_CLR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_VECT_MASK_CLR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_VECT_MASK_CLR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_VECT_MASK_CLR(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25) ( \
+ *R_VECT_MASK_CLR__SADDR = ( \
+ REG_INITIATED(R_VECT_MASK_CLR_) \
+ REG_VAL__R_VECT_MASK_CLR_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23,f24##_,v24,f25##_,v25) \
+ ), \
+ R_VECT_MASK_CLR__WRITE(R_VECT_MASK_CLR__ADDR, *R_VECT_MASK_CLR__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_VECT_MASK_CLR__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_VECT_MASK_CLR.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_VECT_MASK_CLR.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_VECT_MASK_CLR__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25) ( \
+ *R_VECT_MASK_CLR__SADDR = ( \
+ REG_INITIATED(R_VECT_MASK_CLR_) \
+ REG_VAL__R_VECT_MASK_CLR_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23,f24##_,v24,f25##_,v25) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_VECT_MASK_CLR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_VECT_MASK_CLR(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25) ( \
+ (R_VECT_MASK_CLR__usb__##f1##__MASK & REG__##v1) | \
+ (R_VECT_MASK_CLR__dma9__##f2##__MASK & REG__##v2) | \
+ (R_VECT_MASK_CLR__dma8__##f3##__MASK & REG__##v3) | \
+ (R_VECT_MASK_CLR__dma7__##f4##__MASK & REG__##v4) | \
+ (R_VECT_MASK_CLR__dma6__##f5##__MASK & REG__##v5) | \
+ (R_VECT_MASK_CLR__dma5__##f6##__MASK & REG__##v6) | \
+ (R_VECT_MASK_CLR__dma4__##f7##__MASK & REG__##v7) | \
+ (R_VECT_MASK_CLR__dma3__##f8##__MASK & REG__##v8) | \
+ (R_VECT_MASK_CLR__dma2__##f9##__MASK & REG__##v9) | \
+ (R_VECT_MASK_CLR__dma1__##f10##__MASK & REG__##v10) | \
+ (R_VECT_MASK_CLR__dma0__##f11##__MASK & REG__##v11) | \
+ (R_VECT_MASK_CLR__ext_dma1__##f12##__MASK & REG__##v12) | \
+ (R_VECT_MASK_CLR__ext_dma0__##f13##__MASK & REG__##v13) | \
+ (R_VECT_MASK_CLR__pa__##f14##__MASK & REG__##v14) | \
+ (R_VECT_MASK_CLR__irq_intnr__##f15##__MASK & REG__##v15) | \
+ (R_VECT_MASK_CLR__sw__##f16##__MASK & REG__##v16) | \
+ (R_VECT_MASK_CLR__serial__##f17##__MASK & REG__##v17) | \
+ (R_VECT_MASK_CLR__snmp__##f18##__MASK & REG__##v18) | \
+ (R_VECT_MASK_CLR__network__##f19##__MASK & REG__##v19) | \
+ (R_VECT_MASK_CLR__scsi1__##f20##__MASK & REG__##v20) | \
+ (R_VECT_MASK_CLR__scsi0__##f21##__MASK & REG__##v21) | \
+ (R_VECT_MASK_CLR__timer1__##f22##__MASK & REG__##v22) | \
+ (R_VECT_MASK_CLR__timer0__##f23##__MASK & REG__##v23) | \
+ (R_VECT_MASK_CLR__nmi__##f24##__MASK & REG__##v24) | \
+ (R_VECT_MASK_CLR__some__##f25##__MASK & REG__##v25) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_VECT_MASK_CLR
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_VECT_MASK_CLR.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_VECT_MASK_CLR(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25) ( \
+ (R_VECT_MASK_CLR__usb__##f1##__VAL(R_VECT_MASK_CLR_, usb_, v1) << R_VECT_MASK_CLR__usb__BITNR) | \
+ (R_VECT_MASK_CLR__dma9__##f2##__VAL(R_VECT_MASK_CLR_, dma9_, v2) << R_VECT_MASK_CLR__dma9__BITNR) | \
+ (R_VECT_MASK_CLR__dma8__##f3##__VAL(R_VECT_MASK_CLR_, dma8_, v3) << R_VECT_MASK_CLR__dma8__BITNR) | \
+ (R_VECT_MASK_CLR__dma7__##f4##__VAL(R_VECT_MASK_CLR_, dma7_, v4) << R_VECT_MASK_CLR__dma7__BITNR) | \
+ (R_VECT_MASK_CLR__dma6__##f5##__VAL(R_VECT_MASK_CLR_, dma6_, v5) << R_VECT_MASK_CLR__dma6__BITNR) | \
+ (R_VECT_MASK_CLR__dma5__##f6##__VAL(R_VECT_MASK_CLR_, dma5_, v6) << R_VECT_MASK_CLR__dma5__BITNR) | \
+ (R_VECT_MASK_CLR__dma4__##f7##__VAL(R_VECT_MASK_CLR_, dma4_, v7) << R_VECT_MASK_CLR__dma4__BITNR) | \
+ (R_VECT_MASK_CLR__dma3__##f8##__VAL(R_VECT_MASK_CLR_, dma3_, v8) << R_VECT_MASK_CLR__dma3__BITNR) | \
+ (R_VECT_MASK_CLR__dma2__##f9##__VAL(R_VECT_MASK_CLR_, dma2_, v9) << R_VECT_MASK_CLR__dma2__BITNR) | \
+ (R_VECT_MASK_CLR__dma1__##f10##__VAL(R_VECT_MASK_CLR_, dma1_, v10) << R_VECT_MASK_CLR__dma1__BITNR) | \
+ (R_VECT_MASK_CLR__dma0__##f11##__VAL(R_VECT_MASK_CLR_, dma0_, v11) << R_VECT_MASK_CLR__dma0__BITNR) | \
+ (R_VECT_MASK_CLR__ext_dma1__##f12##__VAL(R_VECT_MASK_CLR_, ext_dma1_, v12) << R_VECT_MASK_CLR__ext_dma1__BITNR) | \
+ (R_VECT_MASK_CLR__ext_dma0__##f13##__VAL(R_VECT_MASK_CLR_, ext_dma0_, v13) << R_VECT_MASK_CLR__ext_dma0__BITNR) | \
+ (R_VECT_MASK_CLR__pa__##f14##__VAL(R_VECT_MASK_CLR_, pa_, v14) << R_VECT_MASK_CLR__pa__BITNR) | \
+ (R_VECT_MASK_CLR__irq_intnr__##f15##__VAL(R_VECT_MASK_CLR_, irq_intnr_, v15) << R_VECT_MASK_CLR__irq_intnr__BITNR) | \
+ (R_VECT_MASK_CLR__sw__##f16##__VAL(R_VECT_MASK_CLR_, sw_, v16) << R_VECT_MASK_CLR__sw__BITNR) | \
+ (R_VECT_MASK_CLR__serial__##f17##__VAL(R_VECT_MASK_CLR_, serial_, v17) << R_VECT_MASK_CLR__serial__BITNR) | \
+ (R_VECT_MASK_CLR__snmp__##f18##__VAL(R_VECT_MASK_CLR_, snmp_, v18) << R_VECT_MASK_CLR__snmp__BITNR) | \
+ (R_VECT_MASK_CLR__network__##f19##__VAL(R_VECT_MASK_CLR_, network_, v19) << R_VECT_MASK_CLR__network__BITNR) | \
+ (R_VECT_MASK_CLR__scsi1__##f20##__VAL(R_VECT_MASK_CLR_, scsi1_, v20) << R_VECT_MASK_CLR__scsi1__BITNR) | \
+ (R_VECT_MASK_CLR__scsi0__##f21##__VAL(R_VECT_MASK_CLR_, scsi0_, v21) << R_VECT_MASK_CLR__scsi0__BITNR) | \
+ (R_VECT_MASK_CLR__timer1__##f22##__VAL(R_VECT_MASK_CLR_, timer1_, v22) << R_VECT_MASK_CLR__timer1__BITNR) | \
+ (R_VECT_MASK_CLR__timer0__##f23##__VAL(R_VECT_MASK_CLR_, timer0_, v23) << R_VECT_MASK_CLR__timer0__BITNR) | \
+ (R_VECT_MASK_CLR__nmi__##f24##__VAL(R_VECT_MASK_CLR_, nmi_, v24) << R_VECT_MASK_CLR__nmi__BITNR) | \
+ (R_VECT_MASK_CLR__some__##f25##__VAL(R_VECT_MASK_CLR_, some_, v25) << R_VECT_MASK_CLR__some__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_VECT_MASK_CLR_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_VECT_MASK_CLR.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_VECT_MASK_CLR_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19,f20_,v20,f21_,v21,f22_,v22,f23_,v23,f24_,v24,f25_,v25) ( \
+ (R_VECT_MASK_CLR__usb__##f1_##_VAL(R_VECT_MASK_CLR_, usb_, v1) << R_VECT_MASK_CLR__usb__BITNR) | \
+ (R_VECT_MASK_CLR__dma9__##f2_##_VAL(R_VECT_MASK_CLR_, dma9_, v2) << R_VECT_MASK_CLR__dma9__BITNR) | \
+ (R_VECT_MASK_CLR__dma8__##f3_##_VAL(R_VECT_MASK_CLR_, dma8_, v3) << R_VECT_MASK_CLR__dma8__BITNR) | \
+ (R_VECT_MASK_CLR__dma7__##f4_##_VAL(R_VECT_MASK_CLR_, dma7_, v4) << R_VECT_MASK_CLR__dma7__BITNR) | \
+ (R_VECT_MASK_CLR__dma6__##f5_##_VAL(R_VECT_MASK_CLR_, dma6_, v5) << R_VECT_MASK_CLR__dma6__BITNR) | \
+ (R_VECT_MASK_CLR__dma5__##f6_##_VAL(R_VECT_MASK_CLR_, dma5_, v6) << R_VECT_MASK_CLR__dma5__BITNR) | \
+ (R_VECT_MASK_CLR__dma4__##f7_##_VAL(R_VECT_MASK_CLR_, dma4_, v7) << R_VECT_MASK_CLR__dma4__BITNR) | \
+ (R_VECT_MASK_CLR__dma3__##f8_##_VAL(R_VECT_MASK_CLR_, dma3_, v8) << R_VECT_MASK_CLR__dma3__BITNR) | \
+ (R_VECT_MASK_CLR__dma2__##f9_##_VAL(R_VECT_MASK_CLR_, dma2_, v9) << R_VECT_MASK_CLR__dma2__BITNR) | \
+ (R_VECT_MASK_CLR__dma1__##f10_##_VAL(R_VECT_MASK_CLR_, dma1_, v10) << R_VECT_MASK_CLR__dma1__BITNR) | \
+ (R_VECT_MASK_CLR__dma0__##f11_##_VAL(R_VECT_MASK_CLR_, dma0_, v11) << R_VECT_MASK_CLR__dma0__BITNR) | \
+ (R_VECT_MASK_CLR__ext_dma1__##f12_##_VAL(R_VECT_MASK_CLR_, ext_dma1_, v12) << R_VECT_MASK_CLR__ext_dma1__BITNR) | \
+ (R_VECT_MASK_CLR__ext_dma0__##f13_##_VAL(R_VECT_MASK_CLR_, ext_dma0_, v13) << R_VECT_MASK_CLR__ext_dma0__BITNR) | \
+ (R_VECT_MASK_CLR__pa__##f14_##_VAL(R_VECT_MASK_CLR_, pa_, v14) << R_VECT_MASK_CLR__pa__BITNR) | \
+ (R_VECT_MASK_CLR__irq_intnr__##f15_##_VAL(R_VECT_MASK_CLR_, irq_intnr_, v15) << R_VECT_MASK_CLR__irq_intnr__BITNR) | \
+ (R_VECT_MASK_CLR__sw__##f16_##_VAL(R_VECT_MASK_CLR_, sw_, v16) << R_VECT_MASK_CLR__sw__BITNR) | \
+ (R_VECT_MASK_CLR__serial__##f17_##_VAL(R_VECT_MASK_CLR_, serial_, v17) << R_VECT_MASK_CLR__serial__BITNR) | \
+ (R_VECT_MASK_CLR__snmp__##f18_##_VAL(R_VECT_MASK_CLR_, snmp_, v18) << R_VECT_MASK_CLR__snmp__BITNR) | \
+ (R_VECT_MASK_CLR__network__##f19_##_VAL(R_VECT_MASK_CLR_, network_, v19) << R_VECT_MASK_CLR__network__BITNR) | \
+ (R_VECT_MASK_CLR__scsi1__##f20_##_VAL(R_VECT_MASK_CLR_, scsi1_, v20) << R_VECT_MASK_CLR__scsi1__BITNR) | \
+ (R_VECT_MASK_CLR__scsi0__##f21_##_VAL(R_VECT_MASK_CLR_, scsi0_, v21) << R_VECT_MASK_CLR__scsi0__BITNR) | \
+ (R_VECT_MASK_CLR__timer1__##f22_##_VAL(R_VECT_MASK_CLR_, timer1_, v22) << R_VECT_MASK_CLR__timer1__BITNR) | \
+ (R_VECT_MASK_CLR__timer0__##f23_##_VAL(R_VECT_MASK_CLR_, timer0_, v23) << R_VECT_MASK_CLR__timer0__BITNR) | \
+ (R_VECT_MASK_CLR__nmi__##f24_##_VAL(R_VECT_MASK_CLR_, nmi_, v24) << R_VECT_MASK_CLR__nmi__BITNR) | \
+ (R_VECT_MASK_CLR__some__##f25_##_VAL(R_VECT_MASK_CLR_, some_, v25) << R_VECT_MASK_CLR__some__BITNR) \
+)
+
+#endif
+
+/*
+ * R_VECT_MASK_RD
+ * - type: RO
+ * - addr: 0xb00000d8
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_VECT_MASK_RD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_VECT_MASK_RD(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25) ( \
+ (R_VECT_MASK_RD__usb__##f1##__MASK & REG__##v1) | \
+ (R_VECT_MASK_RD__dma9__##f2##__MASK & REG__##v2) | \
+ (R_VECT_MASK_RD__dma8__##f3##__MASK & REG__##v3) | \
+ (R_VECT_MASK_RD__dma7__##f4##__MASK & REG__##v4) | \
+ (R_VECT_MASK_RD__dma6__##f5##__MASK & REG__##v5) | \
+ (R_VECT_MASK_RD__dma5__##f6##__MASK & REG__##v6) | \
+ (R_VECT_MASK_RD__dma4__##f7##__MASK & REG__##v7) | \
+ (R_VECT_MASK_RD__dma3__##f8##__MASK & REG__##v8) | \
+ (R_VECT_MASK_RD__dma2__##f9##__MASK & REG__##v9) | \
+ (R_VECT_MASK_RD__dma1__##f10##__MASK & REG__##v10) | \
+ (R_VECT_MASK_RD__dma0__##f11##__MASK & REG__##v11) | \
+ (R_VECT_MASK_RD__ext_dma1__##f12##__MASK & REG__##v12) | \
+ (R_VECT_MASK_RD__ext_dma0__##f13##__MASK & REG__##v13) | \
+ (R_VECT_MASK_RD__pa__##f14##__MASK & REG__##v14) | \
+ (R_VECT_MASK_RD__irq_intnr__##f15##__MASK & REG__##v15) | \
+ (R_VECT_MASK_RD__sw__##f16##__MASK & REG__##v16) | \
+ (R_VECT_MASK_RD__serial__##f17##__MASK & REG__##v17) | \
+ (R_VECT_MASK_RD__snmp__##f18##__MASK & REG__##v18) | \
+ (R_VECT_MASK_RD__network__##f19##__MASK & REG__##v19) | \
+ (R_VECT_MASK_RD__scsi1__##f20##__MASK & REG__##v20) | \
+ (R_VECT_MASK_RD__scsi0__##f21##__MASK & REG__##v21) | \
+ (R_VECT_MASK_RD__timer1__##f22##__MASK & REG__##v22) | \
+ (R_VECT_MASK_RD__timer0__##f23##__MASK & REG__##v23) | \
+ (R_VECT_MASK_RD__nmi__##f24##__MASK & REG__##v24) | \
+ (R_VECT_MASK_RD__some__##f25##__MASK & REG__##v25) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_VECT_MASK_RD
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_VECT_MASK_RD.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_VECT_MASK_RD(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25) ( \
+ (R_VECT_MASK_RD__usb__##f1##__VAL(R_VECT_MASK_RD_, usb_, v1) << R_VECT_MASK_RD__usb__BITNR) | \
+ (R_VECT_MASK_RD__dma9__##f2##__VAL(R_VECT_MASK_RD_, dma9_, v2) << R_VECT_MASK_RD__dma9__BITNR) | \
+ (R_VECT_MASK_RD__dma8__##f3##__VAL(R_VECT_MASK_RD_, dma8_, v3) << R_VECT_MASK_RD__dma8__BITNR) | \
+ (R_VECT_MASK_RD__dma7__##f4##__VAL(R_VECT_MASK_RD_, dma7_, v4) << R_VECT_MASK_RD__dma7__BITNR) | \
+ (R_VECT_MASK_RD__dma6__##f5##__VAL(R_VECT_MASK_RD_, dma6_, v5) << R_VECT_MASK_RD__dma6__BITNR) | \
+ (R_VECT_MASK_RD__dma5__##f6##__VAL(R_VECT_MASK_RD_, dma5_, v6) << R_VECT_MASK_RD__dma5__BITNR) | \
+ (R_VECT_MASK_RD__dma4__##f7##__VAL(R_VECT_MASK_RD_, dma4_, v7) << R_VECT_MASK_RD__dma4__BITNR) | \
+ (R_VECT_MASK_RD__dma3__##f8##__VAL(R_VECT_MASK_RD_, dma3_, v8) << R_VECT_MASK_RD__dma3__BITNR) | \
+ (R_VECT_MASK_RD__dma2__##f9##__VAL(R_VECT_MASK_RD_, dma2_, v9) << R_VECT_MASK_RD__dma2__BITNR) | \
+ (R_VECT_MASK_RD__dma1__##f10##__VAL(R_VECT_MASK_RD_, dma1_, v10) << R_VECT_MASK_RD__dma1__BITNR) | \
+ (R_VECT_MASK_RD__dma0__##f11##__VAL(R_VECT_MASK_RD_, dma0_, v11) << R_VECT_MASK_RD__dma0__BITNR) | \
+ (R_VECT_MASK_RD__ext_dma1__##f12##__VAL(R_VECT_MASK_RD_, ext_dma1_, v12) << R_VECT_MASK_RD__ext_dma1__BITNR) | \
+ (R_VECT_MASK_RD__ext_dma0__##f13##__VAL(R_VECT_MASK_RD_, ext_dma0_, v13) << R_VECT_MASK_RD__ext_dma0__BITNR) | \
+ (R_VECT_MASK_RD__pa__##f14##__VAL(R_VECT_MASK_RD_, pa_, v14) << R_VECT_MASK_RD__pa__BITNR) | \
+ (R_VECT_MASK_RD__irq_intnr__##f15##__VAL(R_VECT_MASK_RD_, irq_intnr_, v15) << R_VECT_MASK_RD__irq_intnr__BITNR) | \
+ (R_VECT_MASK_RD__sw__##f16##__VAL(R_VECT_MASK_RD_, sw_, v16) << R_VECT_MASK_RD__sw__BITNR) | \
+ (R_VECT_MASK_RD__serial__##f17##__VAL(R_VECT_MASK_RD_, serial_, v17) << R_VECT_MASK_RD__serial__BITNR) | \
+ (R_VECT_MASK_RD__snmp__##f18##__VAL(R_VECT_MASK_RD_, snmp_, v18) << R_VECT_MASK_RD__snmp__BITNR) | \
+ (R_VECT_MASK_RD__network__##f19##__VAL(R_VECT_MASK_RD_, network_, v19) << R_VECT_MASK_RD__network__BITNR) | \
+ (R_VECT_MASK_RD__scsi1__##f20##__VAL(R_VECT_MASK_RD_, scsi1_, v20) << R_VECT_MASK_RD__scsi1__BITNR) | \
+ (R_VECT_MASK_RD__scsi0__##f21##__VAL(R_VECT_MASK_RD_, scsi0_, v21) << R_VECT_MASK_RD__scsi0__BITNR) | \
+ (R_VECT_MASK_RD__timer1__##f22##__VAL(R_VECT_MASK_RD_, timer1_, v22) << R_VECT_MASK_RD__timer1__BITNR) | \
+ (R_VECT_MASK_RD__timer0__##f23##__VAL(R_VECT_MASK_RD_, timer0_, v23) << R_VECT_MASK_RD__timer0__BITNR) | \
+ (R_VECT_MASK_RD__nmi__##f24##__VAL(R_VECT_MASK_RD_, nmi_, v24) << R_VECT_MASK_RD__nmi__BITNR) | \
+ (R_VECT_MASK_RD__some__##f25##__VAL(R_VECT_MASK_RD_, some_, v25) << R_VECT_MASK_RD__some__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_VECT_MASK_RD_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_VECT_MASK_RD.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_VECT_MASK_RD_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19,f20_,v20,f21_,v21,f22_,v22,f23_,v23,f24_,v24,f25_,v25) ( \
+ (R_VECT_MASK_RD__usb__##f1_##_VAL(R_VECT_MASK_RD_, usb_, v1) << R_VECT_MASK_RD__usb__BITNR) | \
+ (R_VECT_MASK_RD__dma9__##f2_##_VAL(R_VECT_MASK_RD_, dma9_, v2) << R_VECT_MASK_RD__dma9__BITNR) | \
+ (R_VECT_MASK_RD__dma8__##f3_##_VAL(R_VECT_MASK_RD_, dma8_, v3) << R_VECT_MASK_RD__dma8__BITNR) | \
+ (R_VECT_MASK_RD__dma7__##f4_##_VAL(R_VECT_MASK_RD_, dma7_, v4) << R_VECT_MASK_RD__dma7__BITNR) | \
+ (R_VECT_MASK_RD__dma6__##f5_##_VAL(R_VECT_MASK_RD_, dma6_, v5) << R_VECT_MASK_RD__dma6__BITNR) | \
+ (R_VECT_MASK_RD__dma5__##f6_##_VAL(R_VECT_MASK_RD_, dma5_, v6) << R_VECT_MASK_RD__dma5__BITNR) | \
+ (R_VECT_MASK_RD__dma4__##f7_##_VAL(R_VECT_MASK_RD_, dma4_, v7) << R_VECT_MASK_RD__dma4__BITNR) | \
+ (R_VECT_MASK_RD__dma3__##f8_##_VAL(R_VECT_MASK_RD_, dma3_, v8) << R_VECT_MASK_RD__dma3__BITNR) | \
+ (R_VECT_MASK_RD__dma2__##f9_##_VAL(R_VECT_MASK_RD_, dma2_, v9) << R_VECT_MASK_RD__dma2__BITNR) | \
+ (R_VECT_MASK_RD__dma1__##f10_##_VAL(R_VECT_MASK_RD_, dma1_, v10) << R_VECT_MASK_RD__dma1__BITNR) | \
+ (R_VECT_MASK_RD__dma0__##f11_##_VAL(R_VECT_MASK_RD_, dma0_, v11) << R_VECT_MASK_RD__dma0__BITNR) | \
+ (R_VECT_MASK_RD__ext_dma1__##f12_##_VAL(R_VECT_MASK_RD_, ext_dma1_, v12) << R_VECT_MASK_RD__ext_dma1__BITNR) | \
+ (R_VECT_MASK_RD__ext_dma0__##f13_##_VAL(R_VECT_MASK_RD_, ext_dma0_, v13) << R_VECT_MASK_RD__ext_dma0__BITNR) | \
+ (R_VECT_MASK_RD__pa__##f14_##_VAL(R_VECT_MASK_RD_, pa_, v14) << R_VECT_MASK_RD__pa__BITNR) | \
+ (R_VECT_MASK_RD__irq_intnr__##f15_##_VAL(R_VECT_MASK_RD_, irq_intnr_, v15) << R_VECT_MASK_RD__irq_intnr__BITNR) | \
+ (R_VECT_MASK_RD__sw__##f16_##_VAL(R_VECT_MASK_RD_, sw_, v16) << R_VECT_MASK_RD__sw__BITNR) | \
+ (R_VECT_MASK_RD__serial__##f17_##_VAL(R_VECT_MASK_RD_, serial_, v17) << R_VECT_MASK_RD__serial__BITNR) | \
+ (R_VECT_MASK_RD__snmp__##f18_##_VAL(R_VECT_MASK_RD_, snmp_, v18) << R_VECT_MASK_RD__snmp__BITNR) | \
+ (R_VECT_MASK_RD__network__##f19_##_VAL(R_VECT_MASK_RD_, network_, v19) << R_VECT_MASK_RD__network__BITNR) | \
+ (R_VECT_MASK_RD__scsi1__##f20_##_VAL(R_VECT_MASK_RD_, scsi1_, v20) << R_VECT_MASK_RD__scsi1__BITNR) | \
+ (R_VECT_MASK_RD__scsi0__##f21_##_VAL(R_VECT_MASK_RD_, scsi0_, v21) << R_VECT_MASK_RD__scsi0__BITNR) | \
+ (R_VECT_MASK_RD__timer1__##f22_##_VAL(R_VECT_MASK_RD_, timer1_, v22) << R_VECT_MASK_RD__timer1__BITNR) | \
+ (R_VECT_MASK_RD__timer0__##f23_##_VAL(R_VECT_MASK_RD_, timer0_, v23) << R_VECT_MASK_RD__timer0__BITNR) | \
+ (R_VECT_MASK_RD__nmi__##f24_##_VAL(R_VECT_MASK_RD_, nmi_, v24) << R_VECT_MASK_RD__nmi__BITNR) | \
+ (R_VECT_MASK_RD__some__##f25_##_VAL(R_VECT_MASK_RD_, some_, v25) << R_VECT_MASK_RD__some__BITNR) \
+)
+
+#endif
+
+/*
+ * R_VECT_MASK_SET
+ * - type: WO
+ * - addr: 0xb00000dc
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_VECT_MASK_SET
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_VECT_MASK_SET.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_VECT_MASK_SET.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_VECT_MASK_SET(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25) ( \
+ *R_VECT_MASK_SET__SADDR = ( \
+ REG_INITIATED(R_VECT_MASK_SET_) \
+ REG_VAL__R_VECT_MASK_SET_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23,f24##_,v24,f25##_,v25) \
+ ), \
+ R_VECT_MASK_SET__WRITE(R_VECT_MASK_SET__ADDR, *R_VECT_MASK_SET__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_VECT_MASK_SET__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_VECT_MASK_SET.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_VECT_MASK_SET.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_VECT_MASK_SET__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25) ( \
+ *R_VECT_MASK_SET__SADDR = ( \
+ REG_INITIATED(R_VECT_MASK_SET_) \
+ REG_VAL__R_VECT_MASK_SET_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12,f13##_,v13,f14##_,v14,f15##_,v15,f16##_,v16,f17##_,v17,f18##_,v18,f19##_,v19,f20##_,v20,f21##_,v21,f22##_,v22,f23##_,v23,f24##_,v24,f25##_,v25) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_VECT_MASK_SET
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_VECT_MASK_SET(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25) ( \
+ (R_VECT_MASK_SET__usb__##f1##__MASK & REG__##v1) | \
+ (R_VECT_MASK_SET__dma9__##f2##__MASK & REG__##v2) | \
+ (R_VECT_MASK_SET__dma8__##f3##__MASK & REG__##v3) | \
+ (R_VECT_MASK_SET__dma7__##f4##__MASK & REG__##v4) | \
+ (R_VECT_MASK_SET__dma6__##f5##__MASK & REG__##v5) | \
+ (R_VECT_MASK_SET__dma5__##f6##__MASK & REG__##v6) | \
+ (R_VECT_MASK_SET__dma4__##f7##__MASK & REG__##v7) | \
+ (R_VECT_MASK_SET__dma3__##f8##__MASK & REG__##v8) | \
+ (R_VECT_MASK_SET__dma2__##f9##__MASK & REG__##v9) | \
+ (R_VECT_MASK_SET__dma1__##f10##__MASK & REG__##v10) | \
+ (R_VECT_MASK_SET__dma0__##f11##__MASK & REG__##v11) | \
+ (R_VECT_MASK_SET__ext_dma1__##f12##__MASK & REG__##v12) | \
+ (R_VECT_MASK_SET__ext_dma0__##f13##__MASK & REG__##v13) | \
+ (R_VECT_MASK_SET__pa__##f14##__MASK & REG__##v14) | \
+ (R_VECT_MASK_SET__irq_intnr__##f15##__MASK & REG__##v15) | \
+ (R_VECT_MASK_SET__sw__##f16##__MASK & REG__##v16) | \
+ (R_VECT_MASK_SET__serial__##f17##__MASK & REG__##v17) | \
+ (R_VECT_MASK_SET__snmp__##f18##__MASK & REG__##v18) | \
+ (R_VECT_MASK_SET__network__##f19##__MASK & REG__##v19) | \
+ (R_VECT_MASK_SET__scsi1__##f20##__MASK & REG__##v20) | \
+ (R_VECT_MASK_SET__scsi0__##f21##__MASK & REG__##v21) | \
+ (R_VECT_MASK_SET__timer1__##f22##__MASK & REG__##v22) | \
+ (R_VECT_MASK_SET__timer0__##f23##__MASK & REG__##v23) | \
+ (R_VECT_MASK_SET__nmi__##f24##__MASK & REG__##v24) | \
+ (R_VECT_MASK_SET__some__##f25##__MASK & REG__##v25) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_VECT_MASK_SET
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_VECT_MASK_SET.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_VECT_MASK_SET(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25) ( \
+ (R_VECT_MASK_SET__usb__##f1##__VAL(R_VECT_MASK_SET_, usb_, v1) << R_VECT_MASK_SET__usb__BITNR) | \
+ (R_VECT_MASK_SET__dma9__##f2##__VAL(R_VECT_MASK_SET_, dma9_, v2) << R_VECT_MASK_SET__dma9__BITNR) | \
+ (R_VECT_MASK_SET__dma8__##f3##__VAL(R_VECT_MASK_SET_, dma8_, v3) << R_VECT_MASK_SET__dma8__BITNR) | \
+ (R_VECT_MASK_SET__dma7__##f4##__VAL(R_VECT_MASK_SET_, dma7_, v4) << R_VECT_MASK_SET__dma7__BITNR) | \
+ (R_VECT_MASK_SET__dma6__##f5##__VAL(R_VECT_MASK_SET_, dma6_, v5) << R_VECT_MASK_SET__dma6__BITNR) | \
+ (R_VECT_MASK_SET__dma5__##f6##__VAL(R_VECT_MASK_SET_, dma5_, v6) << R_VECT_MASK_SET__dma5__BITNR) | \
+ (R_VECT_MASK_SET__dma4__##f7##__VAL(R_VECT_MASK_SET_, dma4_, v7) << R_VECT_MASK_SET__dma4__BITNR) | \
+ (R_VECT_MASK_SET__dma3__##f8##__VAL(R_VECT_MASK_SET_, dma3_, v8) << R_VECT_MASK_SET__dma3__BITNR) | \
+ (R_VECT_MASK_SET__dma2__##f9##__VAL(R_VECT_MASK_SET_, dma2_, v9) << R_VECT_MASK_SET__dma2__BITNR) | \
+ (R_VECT_MASK_SET__dma1__##f10##__VAL(R_VECT_MASK_SET_, dma1_, v10) << R_VECT_MASK_SET__dma1__BITNR) | \
+ (R_VECT_MASK_SET__dma0__##f11##__VAL(R_VECT_MASK_SET_, dma0_, v11) << R_VECT_MASK_SET__dma0__BITNR) | \
+ (R_VECT_MASK_SET__ext_dma1__##f12##__VAL(R_VECT_MASK_SET_, ext_dma1_, v12) << R_VECT_MASK_SET__ext_dma1__BITNR) | \
+ (R_VECT_MASK_SET__ext_dma0__##f13##__VAL(R_VECT_MASK_SET_, ext_dma0_, v13) << R_VECT_MASK_SET__ext_dma0__BITNR) | \
+ (R_VECT_MASK_SET__pa__##f14##__VAL(R_VECT_MASK_SET_, pa_, v14) << R_VECT_MASK_SET__pa__BITNR) | \
+ (R_VECT_MASK_SET__irq_intnr__##f15##__VAL(R_VECT_MASK_SET_, irq_intnr_, v15) << R_VECT_MASK_SET__irq_intnr__BITNR) | \
+ (R_VECT_MASK_SET__sw__##f16##__VAL(R_VECT_MASK_SET_, sw_, v16) << R_VECT_MASK_SET__sw__BITNR) | \
+ (R_VECT_MASK_SET__serial__##f17##__VAL(R_VECT_MASK_SET_, serial_, v17) << R_VECT_MASK_SET__serial__BITNR) | \
+ (R_VECT_MASK_SET__snmp__##f18##__VAL(R_VECT_MASK_SET_, snmp_, v18) << R_VECT_MASK_SET__snmp__BITNR) | \
+ (R_VECT_MASK_SET__network__##f19##__VAL(R_VECT_MASK_SET_, network_, v19) << R_VECT_MASK_SET__network__BITNR) | \
+ (R_VECT_MASK_SET__scsi1__##f20##__VAL(R_VECT_MASK_SET_, scsi1_, v20) << R_VECT_MASK_SET__scsi1__BITNR) | \
+ (R_VECT_MASK_SET__scsi0__##f21##__VAL(R_VECT_MASK_SET_, scsi0_, v21) << R_VECT_MASK_SET__scsi0__BITNR) | \
+ (R_VECT_MASK_SET__timer1__##f22##__VAL(R_VECT_MASK_SET_, timer1_, v22) << R_VECT_MASK_SET__timer1__BITNR) | \
+ (R_VECT_MASK_SET__timer0__##f23##__VAL(R_VECT_MASK_SET_, timer0_, v23) << R_VECT_MASK_SET__timer0__BITNR) | \
+ (R_VECT_MASK_SET__nmi__##f24##__VAL(R_VECT_MASK_SET_, nmi_, v24) << R_VECT_MASK_SET__nmi__BITNR) | \
+ (R_VECT_MASK_SET__some__##f25##__VAL(R_VECT_MASK_SET_, some_, v25) << R_VECT_MASK_SET__some__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_VECT_MASK_SET_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_VECT_MASK_SET.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_VECT_MASK_SET_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19,f20_,v20,f21_,v21,f22_,v22,f23_,v23,f24_,v24,f25_,v25) ( \
+ (R_VECT_MASK_SET__usb__##f1_##_VAL(R_VECT_MASK_SET_, usb_, v1) << R_VECT_MASK_SET__usb__BITNR) | \
+ (R_VECT_MASK_SET__dma9__##f2_##_VAL(R_VECT_MASK_SET_, dma9_, v2) << R_VECT_MASK_SET__dma9__BITNR) | \
+ (R_VECT_MASK_SET__dma8__##f3_##_VAL(R_VECT_MASK_SET_, dma8_, v3) << R_VECT_MASK_SET__dma8__BITNR) | \
+ (R_VECT_MASK_SET__dma7__##f4_##_VAL(R_VECT_MASK_SET_, dma7_, v4) << R_VECT_MASK_SET__dma7__BITNR) | \
+ (R_VECT_MASK_SET__dma6__##f5_##_VAL(R_VECT_MASK_SET_, dma6_, v5) << R_VECT_MASK_SET__dma6__BITNR) | \
+ (R_VECT_MASK_SET__dma5__##f6_##_VAL(R_VECT_MASK_SET_, dma5_, v6) << R_VECT_MASK_SET__dma5__BITNR) | \
+ (R_VECT_MASK_SET__dma4__##f7_##_VAL(R_VECT_MASK_SET_, dma4_, v7) << R_VECT_MASK_SET__dma4__BITNR) | \
+ (R_VECT_MASK_SET__dma3__##f8_##_VAL(R_VECT_MASK_SET_, dma3_, v8) << R_VECT_MASK_SET__dma3__BITNR) | \
+ (R_VECT_MASK_SET__dma2__##f9_##_VAL(R_VECT_MASK_SET_, dma2_, v9) << R_VECT_MASK_SET__dma2__BITNR) | \
+ (R_VECT_MASK_SET__dma1__##f10_##_VAL(R_VECT_MASK_SET_, dma1_, v10) << R_VECT_MASK_SET__dma1__BITNR) | \
+ (R_VECT_MASK_SET__dma0__##f11_##_VAL(R_VECT_MASK_SET_, dma0_, v11) << R_VECT_MASK_SET__dma0__BITNR) | \
+ (R_VECT_MASK_SET__ext_dma1__##f12_##_VAL(R_VECT_MASK_SET_, ext_dma1_, v12) << R_VECT_MASK_SET__ext_dma1__BITNR) | \
+ (R_VECT_MASK_SET__ext_dma0__##f13_##_VAL(R_VECT_MASK_SET_, ext_dma0_, v13) << R_VECT_MASK_SET__ext_dma0__BITNR) | \
+ (R_VECT_MASK_SET__pa__##f14_##_VAL(R_VECT_MASK_SET_, pa_, v14) << R_VECT_MASK_SET__pa__BITNR) | \
+ (R_VECT_MASK_SET__irq_intnr__##f15_##_VAL(R_VECT_MASK_SET_, irq_intnr_, v15) << R_VECT_MASK_SET__irq_intnr__BITNR) | \
+ (R_VECT_MASK_SET__sw__##f16_##_VAL(R_VECT_MASK_SET_, sw_, v16) << R_VECT_MASK_SET__sw__BITNR) | \
+ (R_VECT_MASK_SET__serial__##f17_##_VAL(R_VECT_MASK_SET_, serial_, v17) << R_VECT_MASK_SET__serial__BITNR) | \
+ (R_VECT_MASK_SET__snmp__##f18_##_VAL(R_VECT_MASK_SET_, snmp_, v18) << R_VECT_MASK_SET__snmp__BITNR) | \
+ (R_VECT_MASK_SET__network__##f19_##_VAL(R_VECT_MASK_SET_, network_, v19) << R_VECT_MASK_SET__network__BITNR) | \
+ (R_VECT_MASK_SET__scsi1__##f20_##_VAL(R_VECT_MASK_SET_, scsi1_, v20) << R_VECT_MASK_SET__scsi1__BITNR) | \
+ (R_VECT_MASK_SET__scsi0__##f21_##_VAL(R_VECT_MASK_SET_, scsi0_, v21) << R_VECT_MASK_SET__scsi0__BITNR) | \
+ (R_VECT_MASK_SET__timer1__##f22_##_VAL(R_VECT_MASK_SET_, timer1_, v22) << R_VECT_MASK_SET__timer1__BITNR) | \
+ (R_VECT_MASK_SET__timer0__##f23_##_VAL(R_VECT_MASK_SET_, timer0_, v23) << R_VECT_MASK_SET__timer0__BITNR) | \
+ (R_VECT_MASK_SET__nmi__##f24_##_VAL(R_VECT_MASK_SET_, nmi_, v24) << R_VECT_MASK_SET__nmi__BITNR) | \
+ (R_VECT_MASK_SET__some__##f25_##_VAL(R_VECT_MASK_SET_, some_, v25) << R_VECT_MASK_SET__some__BITNR) \
+)
+
+#endif
+
+/*
+ * R_VECT_READ
+ * - type: RO
+ * - addr: 0xb00000dc
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+/* No REG_SET__register-name for read only registers. */
+
+/* No REG_SET__register-name__SHADOW for read only and read write registers. */
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_VECT_READ
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_VECT_READ(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25) ( \
+ (R_VECT_READ__usb__##f1##__MASK & REG__##v1) | \
+ (R_VECT_READ__dma9__##f2##__MASK & REG__##v2) | \
+ (R_VECT_READ__dma8__##f3##__MASK & REG__##v3) | \
+ (R_VECT_READ__dma7__##f4##__MASK & REG__##v4) | \
+ (R_VECT_READ__dma6__##f5##__MASK & REG__##v5) | \
+ (R_VECT_READ__dma5__##f6##__MASK & REG__##v6) | \
+ (R_VECT_READ__dma4__##f7##__MASK & REG__##v7) | \
+ (R_VECT_READ__dma3__##f8##__MASK & REG__##v8) | \
+ (R_VECT_READ__dma2__##f9##__MASK & REG__##v9) | \
+ (R_VECT_READ__dma1__##f10##__MASK & REG__##v10) | \
+ (R_VECT_READ__dma0__##f11##__MASK & REG__##v11) | \
+ (R_VECT_READ__ext_dma1__##f12##__MASK & REG__##v12) | \
+ (R_VECT_READ__ext_dma0__##f13##__MASK & REG__##v13) | \
+ (R_VECT_READ__pa__##f14##__MASK & REG__##v14) | \
+ (R_VECT_READ__irq_intnr__##f15##__MASK & REG__##v15) | \
+ (R_VECT_READ__sw__##f16##__MASK & REG__##v16) | \
+ (R_VECT_READ__serial__##f17##__MASK & REG__##v17) | \
+ (R_VECT_READ__snmp__##f18##__MASK & REG__##v18) | \
+ (R_VECT_READ__network__##f19##__MASK & REG__##v19) | \
+ (R_VECT_READ__scsi1__##f20##__MASK & REG__##v20) | \
+ (R_VECT_READ__scsi0__##f21##__MASK & REG__##v21) | \
+ (R_VECT_READ__timer1__##f22##__MASK & REG__##v22) | \
+ (R_VECT_READ__timer0__##f23##__MASK & REG__##v23) | \
+ (R_VECT_READ__nmi__##f24##__MASK & REG__##v24) | \
+ (R_VECT_READ__some__##f25##__MASK & REG__##v25) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_VECT_READ
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_VECT_READ.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_VECT_READ(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12,f13,v13,f14,v14,f15,v15,f16,v16,f17,v17,f18,v18,f19,v19,f20,v20,f21,v21,f22,v22,f23,v23,f24,v24,f25,v25) ( \
+ (R_VECT_READ__usb__##f1##__VAL(R_VECT_READ_, usb_, v1) << R_VECT_READ__usb__BITNR) | \
+ (R_VECT_READ__dma9__##f2##__VAL(R_VECT_READ_, dma9_, v2) << R_VECT_READ__dma9__BITNR) | \
+ (R_VECT_READ__dma8__##f3##__VAL(R_VECT_READ_, dma8_, v3) << R_VECT_READ__dma8__BITNR) | \
+ (R_VECT_READ__dma7__##f4##__VAL(R_VECT_READ_, dma7_, v4) << R_VECT_READ__dma7__BITNR) | \
+ (R_VECT_READ__dma6__##f5##__VAL(R_VECT_READ_, dma6_, v5) << R_VECT_READ__dma6__BITNR) | \
+ (R_VECT_READ__dma5__##f6##__VAL(R_VECT_READ_, dma5_, v6) << R_VECT_READ__dma5__BITNR) | \
+ (R_VECT_READ__dma4__##f7##__VAL(R_VECT_READ_, dma4_, v7) << R_VECT_READ__dma4__BITNR) | \
+ (R_VECT_READ__dma3__##f8##__VAL(R_VECT_READ_, dma3_, v8) << R_VECT_READ__dma3__BITNR) | \
+ (R_VECT_READ__dma2__##f9##__VAL(R_VECT_READ_, dma2_, v9) << R_VECT_READ__dma2__BITNR) | \
+ (R_VECT_READ__dma1__##f10##__VAL(R_VECT_READ_, dma1_, v10) << R_VECT_READ__dma1__BITNR) | \
+ (R_VECT_READ__dma0__##f11##__VAL(R_VECT_READ_, dma0_, v11) << R_VECT_READ__dma0__BITNR) | \
+ (R_VECT_READ__ext_dma1__##f12##__VAL(R_VECT_READ_, ext_dma1_, v12) << R_VECT_READ__ext_dma1__BITNR) | \
+ (R_VECT_READ__ext_dma0__##f13##__VAL(R_VECT_READ_, ext_dma0_, v13) << R_VECT_READ__ext_dma0__BITNR) | \
+ (R_VECT_READ__pa__##f14##__VAL(R_VECT_READ_, pa_, v14) << R_VECT_READ__pa__BITNR) | \
+ (R_VECT_READ__irq_intnr__##f15##__VAL(R_VECT_READ_, irq_intnr_, v15) << R_VECT_READ__irq_intnr__BITNR) | \
+ (R_VECT_READ__sw__##f16##__VAL(R_VECT_READ_, sw_, v16) << R_VECT_READ__sw__BITNR) | \
+ (R_VECT_READ__serial__##f17##__VAL(R_VECT_READ_, serial_, v17) << R_VECT_READ__serial__BITNR) | \
+ (R_VECT_READ__snmp__##f18##__VAL(R_VECT_READ_, snmp_, v18) << R_VECT_READ__snmp__BITNR) | \
+ (R_VECT_READ__network__##f19##__VAL(R_VECT_READ_, network_, v19) << R_VECT_READ__network__BITNR) | \
+ (R_VECT_READ__scsi1__##f20##__VAL(R_VECT_READ_, scsi1_, v20) << R_VECT_READ__scsi1__BITNR) | \
+ (R_VECT_READ__scsi0__##f21##__VAL(R_VECT_READ_, scsi0_, v21) << R_VECT_READ__scsi0__BITNR) | \
+ (R_VECT_READ__timer1__##f22##__VAL(R_VECT_READ_, timer1_, v22) << R_VECT_READ__timer1__BITNR) | \
+ (R_VECT_READ__timer0__##f23##__VAL(R_VECT_READ_, timer0_, v23) << R_VECT_READ__timer0__BITNR) | \
+ (R_VECT_READ__nmi__##f24##__VAL(R_VECT_READ_, nmi_, v24) << R_VECT_READ__nmi__BITNR) | \
+ (R_VECT_READ__some__##f25##__VAL(R_VECT_READ_, some_, v25) << R_VECT_READ__some__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_VECT_READ_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_VECT_READ.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_VECT_READ_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12,f13_,v13,f14_,v14,f15_,v15,f16_,v16,f17_,v17,f18_,v18,f19_,v19,f20_,v20,f21_,v21,f22_,v22,f23_,v23,f24_,v24,f25_,v25) ( \
+ (R_VECT_READ__usb__##f1_##_VAL(R_VECT_READ_, usb_, v1) << R_VECT_READ__usb__BITNR) | \
+ (R_VECT_READ__dma9__##f2_##_VAL(R_VECT_READ_, dma9_, v2) << R_VECT_READ__dma9__BITNR) | \
+ (R_VECT_READ__dma8__##f3_##_VAL(R_VECT_READ_, dma8_, v3) << R_VECT_READ__dma8__BITNR) | \
+ (R_VECT_READ__dma7__##f4_##_VAL(R_VECT_READ_, dma7_, v4) << R_VECT_READ__dma7__BITNR) | \
+ (R_VECT_READ__dma6__##f5_##_VAL(R_VECT_READ_, dma6_, v5) << R_VECT_READ__dma6__BITNR) | \
+ (R_VECT_READ__dma5__##f6_##_VAL(R_VECT_READ_, dma5_, v6) << R_VECT_READ__dma5__BITNR) | \
+ (R_VECT_READ__dma4__##f7_##_VAL(R_VECT_READ_, dma4_, v7) << R_VECT_READ__dma4__BITNR) | \
+ (R_VECT_READ__dma3__##f8_##_VAL(R_VECT_READ_, dma3_, v8) << R_VECT_READ__dma3__BITNR) | \
+ (R_VECT_READ__dma2__##f9_##_VAL(R_VECT_READ_, dma2_, v9) << R_VECT_READ__dma2__BITNR) | \
+ (R_VECT_READ__dma1__##f10_##_VAL(R_VECT_READ_, dma1_, v10) << R_VECT_READ__dma1__BITNR) | \
+ (R_VECT_READ__dma0__##f11_##_VAL(R_VECT_READ_, dma0_, v11) << R_VECT_READ__dma0__BITNR) | \
+ (R_VECT_READ__ext_dma1__##f12_##_VAL(R_VECT_READ_, ext_dma1_, v12) << R_VECT_READ__ext_dma1__BITNR) | \
+ (R_VECT_READ__ext_dma0__##f13_##_VAL(R_VECT_READ_, ext_dma0_, v13) << R_VECT_READ__ext_dma0__BITNR) | \
+ (R_VECT_READ__pa__##f14_##_VAL(R_VECT_READ_, pa_, v14) << R_VECT_READ__pa__BITNR) | \
+ (R_VECT_READ__irq_intnr__##f15_##_VAL(R_VECT_READ_, irq_intnr_, v15) << R_VECT_READ__irq_intnr__BITNR) | \
+ (R_VECT_READ__sw__##f16_##_VAL(R_VECT_READ_, sw_, v16) << R_VECT_READ__sw__BITNR) | \
+ (R_VECT_READ__serial__##f17_##_VAL(R_VECT_READ_, serial_, v17) << R_VECT_READ__serial__BITNR) | \
+ (R_VECT_READ__snmp__##f18_##_VAL(R_VECT_READ_, snmp_, v18) << R_VECT_READ__snmp__BITNR) | \
+ (R_VECT_READ__network__##f19_##_VAL(R_VECT_READ_, network_, v19) << R_VECT_READ__network__BITNR) | \
+ (R_VECT_READ__scsi1__##f20_##_VAL(R_VECT_READ_, scsi1_, v20) << R_VECT_READ__scsi1__BITNR) | \
+ (R_VECT_READ__scsi0__##f21_##_VAL(R_VECT_READ_, scsi0_, v21) << R_VECT_READ__scsi0__BITNR) | \
+ (R_VECT_READ__timer1__##f22_##_VAL(R_VECT_READ_, timer1_, v22) << R_VECT_READ__timer1__BITNR) | \
+ (R_VECT_READ__timer0__##f23_##_VAL(R_VECT_READ_, timer0_, v23) << R_VECT_READ__timer0__BITNR) | \
+ (R_VECT_READ__nmi__##f24_##_VAL(R_VECT_READ_, nmi_, v24) << R_VECT_READ__nmi__BITNR) | \
+ (R_VECT_READ__some__##f25_##_VAL(R_VECT_READ_, some_, v25) << R_VECT_READ__some__BITNR) \
+)
+
+#endif
+
+/*
+ * R_WAITSTATES
+ * - type: WO
+ * - addr: 0xb0000000
+ * - group: Bus interface configuration registers
+ */
+
+#if USE_GROUP__Bus_interface_configuration_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_WAITSTATES
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_WAITSTATES.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_WAITSTATES.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_WAITSTATES(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ *R_WAITSTATES__SADDR = ( \
+ REG_INITIATED(R_WAITSTATES_) \
+ REG_VAL__R_WAITSTATES_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12) \
+ ), \
+ R_WAITSTATES__WRITE(R_WAITSTATES__ADDR, *R_WAITSTATES__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_WAITSTATES__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_WAITSTATES.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_WAITSTATES.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_WAITSTATES__SHADOW(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ *R_WAITSTATES__SADDR = ( \
+ REG_INITIATED(R_WAITSTATES_) \
+ REG_VAL__R_WAITSTATES_(f1##_,v1,f2##_,v2,f3##_,v3,f4##_,v4,f5##_,v5,f6##_,v6,f7##_,v7,f8##_,v8,f9##_,v9,f10##_,v10,f11##_,v11,f12##_,v12) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_WAITSTATES
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_WAITSTATES(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ (R_WAITSTATES__pcs4_7_zw__##f1##__MASK & REG__##v1) | \
+ (R_WAITSTATES__pcs4_7_ew__##f2##__MASK & REG__##v2) | \
+ (R_WAITSTATES__pcs4_7_lw__##f3##__MASK & REG__##v3) | \
+ (R_WAITSTATES__pcs0_3_zw__##f4##__MASK & REG__##v4) | \
+ (R_WAITSTATES__pcs0_3_ew__##f5##__MASK & REG__##v5) | \
+ (R_WAITSTATES__pcs0_3_lw__##f6##__MASK & REG__##v6) | \
+ (R_WAITSTATES__sram_zw__##f7##__MASK & REG__##v7) | \
+ (R_WAITSTATES__sram_ew__##f8##__MASK & REG__##v8) | \
+ (R_WAITSTATES__sram_lw__##f9##__MASK & REG__##v9) | \
+ (R_WAITSTATES__flash_zw__##f10##__MASK & REG__##v10) | \
+ (R_WAITSTATES__flash_ew__##f11##__MASK & REG__##v11) | \
+ (R_WAITSTATES__flash_lw__##f12##__MASK & REG__##v12) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_WAITSTATES
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_WAITSTATES.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_WAITSTATES(f1,v1,f2,v2,f3,v3,f4,v4,f5,v5,f6,v6,f7,v7,f8,v8,f9,v9,f10,v10,f11,v11,f12,v12) ( \
+ (R_WAITSTATES__pcs4_7_zw__##f1##__VAL(R_WAITSTATES_, pcs4_7_zw_, v1) << R_WAITSTATES__pcs4_7_zw__BITNR) | \
+ (R_WAITSTATES__pcs4_7_ew__##f2##__VAL(R_WAITSTATES_, pcs4_7_ew_, v2) << R_WAITSTATES__pcs4_7_ew__BITNR) | \
+ (R_WAITSTATES__pcs4_7_lw__##f3##__VAL(R_WAITSTATES_, pcs4_7_lw_, v3) << R_WAITSTATES__pcs4_7_lw__BITNR) | \
+ (R_WAITSTATES__pcs0_3_zw__##f4##__VAL(R_WAITSTATES_, pcs0_3_zw_, v4) << R_WAITSTATES__pcs0_3_zw__BITNR) | \
+ (R_WAITSTATES__pcs0_3_ew__##f5##__VAL(R_WAITSTATES_, pcs0_3_ew_, v5) << R_WAITSTATES__pcs0_3_ew__BITNR) | \
+ (R_WAITSTATES__pcs0_3_lw__##f6##__VAL(R_WAITSTATES_, pcs0_3_lw_, v6) << R_WAITSTATES__pcs0_3_lw__BITNR) | \
+ (R_WAITSTATES__sram_zw__##f7##__VAL(R_WAITSTATES_, sram_zw_, v7) << R_WAITSTATES__sram_zw__BITNR) | \
+ (R_WAITSTATES__sram_ew__##f8##__VAL(R_WAITSTATES_, sram_ew_, v8) << R_WAITSTATES__sram_ew__BITNR) | \
+ (R_WAITSTATES__sram_lw__##f9##__VAL(R_WAITSTATES_, sram_lw_, v9) << R_WAITSTATES__sram_lw__BITNR) | \
+ (R_WAITSTATES__flash_zw__##f10##__VAL(R_WAITSTATES_, flash_zw_, v10) << R_WAITSTATES__flash_zw__BITNR) | \
+ (R_WAITSTATES__flash_ew__##f11##__VAL(R_WAITSTATES_, flash_ew_, v11) << R_WAITSTATES__flash_ew__BITNR) | \
+ (R_WAITSTATES__flash_lw__##f12##__VAL(R_WAITSTATES_, flash_lw_, v12) << R_WAITSTATES__flash_lw__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_WAITSTATES_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_WAITSTATES.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_WAITSTATES_(f1_,v1,f2_,v2,f3_,v3,f4_,v4,f5_,v5,f6_,v6,f7_,v7,f8_,v8,f9_,v9,f10_,v10,f11_,v11,f12_,v12) ( \
+ (R_WAITSTATES__pcs4_7_zw__##f1_##_VAL(R_WAITSTATES_, pcs4_7_zw_, v1) << R_WAITSTATES__pcs4_7_zw__BITNR) | \
+ (R_WAITSTATES__pcs4_7_ew__##f2_##_VAL(R_WAITSTATES_, pcs4_7_ew_, v2) << R_WAITSTATES__pcs4_7_ew__BITNR) | \
+ (R_WAITSTATES__pcs4_7_lw__##f3_##_VAL(R_WAITSTATES_, pcs4_7_lw_, v3) << R_WAITSTATES__pcs4_7_lw__BITNR) | \
+ (R_WAITSTATES__pcs0_3_zw__##f4_##_VAL(R_WAITSTATES_, pcs0_3_zw_, v4) << R_WAITSTATES__pcs0_3_zw__BITNR) | \
+ (R_WAITSTATES__pcs0_3_ew__##f5_##_VAL(R_WAITSTATES_, pcs0_3_ew_, v5) << R_WAITSTATES__pcs0_3_ew__BITNR) | \
+ (R_WAITSTATES__pcs0_3_lw__##f6_##_VAL(R_WAITSTATES_, pcs0_3_lw_, v6) << R_WAITSTATES__pcs0_3_lw__BITNR) | \
+ (R_WAITSTATES__sram_zw__##f7_##_VAL(R_WAITSTATES_, sram_zw_, v7) << R_WAITSTATES__sram_zw__BITNR) | \
+ (R_WAITSTATES__sram_ew__##f8_##_VAL(R_WAITSTATES_, sram_ew_, v8) << R_WAITSTATES__sram_ew__BITNR) | \
+ (R_WAITSTATES__sram_lw__##f9_##_VAL(R_WAITSTATES_, sram_lw_, v9) << R_WAITSTATES__sram_lw__BITNR) | \
+ (R_WAITSTATES__flash_zw__##f10_##_VAL(R_WAITSTATES_, flash_zw_, v10) << R_WAITSTATES__flash_zw__BITNR) | \
+ (R_WAITSTATES__flash_ew__##f11_##_VAL(R_WAITSTATES_, flash_ew_, v11) << R_WAITSTATES__flash_ew__BITNR) | \
+ (R_WAITSTATES__flash_lw__##f12_##_VAL(R_WAITSTATES_, flash_lw_, v12) << R_WAITSTATES__flash_lw__BITNR) \
+)
+
+#endif
+
+/*
+ * R_WATCHDOG
+ * - type: WO
+ * - addr: 0xb0000024
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_WATCHDOG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_WATCHDOG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in register
+*# R_WATCHDOG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_WATCHDOG(f1,v1,f2,v2) ( \
+ *R_WATCHDOG__SADDR = ( \
+ REG_INITIATED(R_WATCHDOG_) \
+ REG_VAL__R_WATCHDOG_(f1##_,v1,f2##_,v2) \
+ ), \
+ R_WATCHDOG__WRITE(R_WATCHDOG__ADDR, *R_WATCHDOG__SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET__R_WATCHDOG__SHADOW
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Integer value to write to field N.
+*#
+*# RETURNS : integer value written to register R_WATCHDOG.
+*#
+*# SIDE EFFECTS: REG_INITIATED evaluated.
+*#
+*# DESCRIPTION : Write value of vn parameters to fields fn in the
+*# shadow register for R_WATCHDOG.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_SET__R_WATCHDOG__SHADOW(f1,v1,f2,v2) ( \
+ *R_WATCHDOG__SADDR = ( \
+ REG_INITIATED(R_WATCHDOG_) \
+ REG_VAL__R_WATCHDOG_(f1##_,v1,f2##_,v2) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_MASK__R_WATCHDOG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : REG__on, or REG__off
+*#
+*# RETURNS : Integer value with 1s in all on-fields,
+*# and 0s in all off-fields.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Create a mask with 1s in all fields with vn == REG__on,
+*# and 0s in fields with vn == REG_off.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Only put ## where necessary to stop
+*# premature macro evaluation.
+*#**********************************************************************/
+
+#define REG_MASK__R_WATCHDOG(f1,v1,f2,v2) ( \
+ (R_WATCHDOG__key__##f1##__MASK & REG__##v1) | \
+ (R_WATCHDOG__enable__##f2##__MASK & REG__##v2) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_WATCHDOG
+*#
+*# PARAMETERS : fn : Name of field N.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_WATCHDOG.
+*# Parameters vn are checked for validity.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson To stop premature evaluation, append
+*# _ to fn parameters when passing
+*# on to other macros.
+*#**********************************************************************/
+
+#define REG_VAL__R_WATCHDOG(f1,v1,f2,v2) ( \
+ (R_WATCHDOG__key__##f1##__VAL(R_WATCHDOG_, key_, v1) << R_WATCHDOG__key__BITNR) | \
+ (R_WATCHDOG__enable__##f2##__VAL(R_WATCHDOG_, enable_, v2) << R_WATCHDOG__enable__BITNR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL__R_WATCHDOG_
+*#
+*# PARAMETERS : fn_ : Name of field N, with "_" appended.
+*# vn : Value in field N.
+*#
+*# RETURNS : Integer value.
+*#
+*# SIDE EFFECTS: REG_VERROR may be evaluated.
+*#
+*# DESCRIPTION : Create a value by combining the vn parameters according
+*# to the fields in register R_WATCHDOG.
+*# Parameters vn are checked for validity.
+*# INTERNAL: for use by other macros in this file only.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Sep 30 2002 Hans-Peter Nilsson Initial version
+*#**********************************************************************/
+
+#define REG_VAL__R_WATCHDOG_(f1_,v1,f2_,v2) ( \
+ (R_WATCHDOG__key__##f1_##_VAL(R_WATCHDOG_, key_, v1) << R_WATCHDOG__key__BITNR) | \
+ (R_WATCHDOG__enable__##f2_##_VAL(R_WATCHDOG_, enable_, v2) << R_WATCHDOG__enable__BITNR) \
+)
+
+#endif
+
+#endif
--- /dev/null
+/*!**********************************************************************
+*!
+*! FILE NAME: hwregs_def.h
+*!
+*! DESCRIPTION: Template file for register field default values used by
+*! the init_shadow() function defined in hwregs.c
+*! For each field in each register select a default value
+*! from the listed set of valid values.
+*! Only write only registers need default values.
+*! This file is included in hwregs.h
+*!
+*! FUNCTIONS: none
+*!
+*! NOTE: This file is automatically generated, do _not_ edit.
+*! Created: Thu Oct 3 01:21:27 2002
+*! By: Id: shadow_gen,v 1.14 2002/10/02 20:31:22 hp Exp
+*! From: /n/asic/projects/etrax_ng/doc/work/etrax_ng_regs.rd 1.168
+*! /n/asic/projects/etrax_ng/include//hwregs.ctrl 1.3
+*!
+*! NOTE: There are default constants for all write only registers described
+*! in /n/asic/projects/etrax_ng/doc/work/etrax_ng_regs.rd.
+*! Since one physical register may have several logical names you
+*! only need default constants for those registers that are
+*! initiated in init_shadow(). This is done by the
+*! 'USE_GROUP__group-name' macros in this file.
+*!
+*! As an example, in Etrax100 the following logical registers are
+*! all the same physical register at address 0xb0000044:
+*!
+*! R_ATA_CONFIG
+*! R_PAR0_CONFIG
+*! R_SCSI0_CTRL
+*! R_SHARED_RAM_ADDR
+*!
+*!----------------------------------------------------------------------
+*! HISTORY
+*!
+*! DATE NAME CHANGES
+*! ---- ---- -------
+*! Apr 01 1998 Jan Bengtsson Initial version
+*!----------------------------------------------------------------------
+*!
+*! (C) Copyright 1998, Axis Communications AB, LUND, SWEDEN
+*!
+*!**********************************************************************/
+/* %Z% %M% %I% %G% */
+
+#ifndef __HWREGS_DEF_H__
+#define __HWREGS_DEF_H__
+
+/********************** INCLUDE FILES SECTION **************************/
+
+/********************** CONSTANT AND MACRO SECTION *********************/
+
+/*
+** To use shadow registers for a register_group, define the following
+** macros to TRUE in a project specific file.
+*/
+
+#ifndef USE_GROUP__Serial_port_registers
+#define USE_GROUP__Serial_port_registers 1
+#endif
+
+#ifndef USE_GROUP__ATA_interface_registers
+#define USE_GROUP__ATA_interface_registers 1
+#endif
+
+#ifndef USE_GROUP__Bus_interface_configuration_registers
+#define USE_GROUP__Bus_interface_configuration_registers 1
+#endif
+
+#ifndef USE_GROUP__Timer_registers
+#define USE_GROUP__Timer_registers 1
+#endif
+
+#ifndef USE_GROUP__DMA_registers
+#define USE_GROUP__DMA_registers 1
+#endif
+
+#ifndef USE_GROUP__External_DMA_registers
+#define USE_GROUP__External_DMA_registers 1
+#endif
+
+#ifndef USE_GROUP__General_config_registers
+#define USE_GROUP__General_config_registers 1
+#endif
+
+#ifndef USE_GROUP__Interrupt_mask_and_status_registers
+#define USE_GROUP__Interrupt_mask_and_status_registers 1
+#endif
+
+#ifndef USE_GROUP__MMU_registers
+#define USE_GROUP__MMU_registers 1
+#endif
+
+#ifndef USE_GROUP__Network_interface_registers
+#define USE_GROUP__Network_interface_registers 1
+#endif
+
+#ifndef USE_GROUP__Parallel_printer_port_registers
+#define USE_GROUP__Parallel_printer_port_registers 1
+#endif
+
+#ifndef USE_GROUP__General_port_configuration_registers
+#define USE_GROUP__General_port_configuration_registers 1
+#endif
+
+#ifndef USE_GROUP__SCSI_registers
+#define USE_GROUP__SCSI_registers 1
+#endif
+
+#ifndef USE_GROUP__Shared_RAM_interface_registers
+#define USE_GROUP__Shared_RAM_interface_registers 1
+#endif
+
+#ifndef USE_GROUP__Test_mode_registers
+#define USE_GROUP__Test_mode_registers 1
+#endif
+
+#ifndef USE_GROUP__Syncrounous_serial_port_registers
+#define USE_GROUP__Syncrounous_serial_port_registers 1
+#endif
+
+#ifndef USE_GROUP__USB_interface_control_registers
+#define USE_GROUP__USB_interface_control_registers 1
+#endif
+
+
+/*
+** Default values for register R_ALT_SER_BAUDRATE
+*/
+
+/* timer normal extern prescale */
+#ifndef R_ALT_SER_BAUDRATE__ser3_tr__DEFAULT
+#define R_ALT_SER_BAUDRATE__ser3_tr__DEFAULT timer
+#endif
+
+/* timer normal extern prescale */
+#ifndef R_ALT_SER_BAUDRATE__ser3_rec__DEFAULT
+#define R_ALT_SER_BAUDRATE__ser3_rec__DEFAULT timer
+#endif
+
+/* timer normal extern prescale */
+#ifndef R_ALT_SER_BAUDRATE__ser2_tr__DEFAULT
+#define R_ALT_SER_BAUDRATE__ser2_tr__DEFAULT timer
+#endif
+
+/* timer normal extern prescale */
+#ifndef R_ALT_SER_BAUDRATE__ser2_rec__DEFAULT
+#define R_ALT_SER_BAUDRATE__ser2_rec__DEFAULT timer
+#endif
+
+/* timer normal extern prescale */
+#ifndef R_ALT_SER_BAUDRATE__ser1_tr__DEFAULT
+#define R_ALT_SER_BAUDRATE__ser1_tr__DEFAULT timer
+#endif
+
+/* timer normal extern prescale */
+#ifndef R_ALT_SER_BAUDRATE__ser1_rec__DEFAULT
+#define R_ALT_SER_BAUDRATE__ser1_rec__DEFAULT timer
+#endif
+
+/* timer normal extern prescale */
+#ifndef R_ALT_SER_BAUDRATE__ser0_tr__DEFAULT
+#define R_ALT_SER_BAUDRATE__ser0_tr__DEFAULT timer
+#endif
+
+/* timer normal extern prescale */
+#ifndef R_ALT_SER_BAUDRATE__ser0_rec__DEFAULT
+#define R_ALT_SER_BAUDRATE__ser0_rec__DEFAULT timer
+#endif
+
+/*
+** Default values for register R_ATA_CONFIG
+*/
+
+/* off on */
+#ifndef R_ATA_CONFIG__enable__DEFAULT
+#define R_ATA_CONFIG__enable__DEFAULT off
+#endif
+
+/* 0 - 31 */
+#ifndef R_ATA_CONFIG__dma_strobe__DEFAULT
+#define R_ATA_CONFIG__dma_strobe__DEFAULT 0
+#endif
+
+/* 0 - 31 */
+#ifndef R_ATA_CONFIG__dma_hold__DEFAULT
+#define R_ATA_CONFIG__dma_hold__DEFAULT 0
+#endif
+
+/* 0 - 31 */
+#ifndef R_ATA_CONFIG__pio_setup__DEFAULT
+#define R_ATA_CONFIG__pio_setup__DEFAULT 0
+#endif
+
+/* 0 - 31 */
+#ifndef R_ATA_CONFIG__pio_strobe__DEFAULT
+#define R_ATA_CONFIG__pio_strobe__DEFAULT 0
+#endif
+
+/* 0 - 31 */
+#ifndef R_ATA_CONFIG__pio_hold__DEFAULT
+#define R_ATA_CONFIG__pio_hold__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_ATA_CTRL_DATA
+*/
+
+/* 0 - 3 */
+#ifndef R_ATA_CTRL_DATA__sel__DEFAULT
+#define R_ATA_CTRL_DATA__sel__DEFAULT 0
+#endif
+
+/* inactive active */
+#ifndef R_ATA_CTRL_DATA__cs1__DEFAULT
+#define R_ATA_CTRL_DATA__cs1__DEFAULT inactive
+#endif
+
+/* inactive active */
+#ifndef R_ATA_CTRL_DATA__cs0__DEFAULT
+#define R_ATA_CTRL_DATA__cs0__DEFAULT inactive
+#endif
+
+/* 0 - 7 */
+#ifndef R_ATA_CTRL_DATA__addr__DEFAULT
+#define R_ATA_CTRL_DATA__addr__DEFAULT 0
+#endif
+
+/* write read */
+#ifndef R_ATA_CTRL_DATA__rw__DEFAULT
+#define R_ATA_CTRL_DATA__rw__DEFAULT write
+#endif
+
+/* dma register */
+#ifndef R_ATA_CTRL_DATA__src_dst__DEFAULT
+#define R_ATA_CTRL_DATA__src_dst__DEFAULT dma
+#endif
+
+/* pio dma */
+#ifndef R_ATA_CTRL_DATA__handsh__DEFAULT
+#define R_ATA_CTRL_DATA__handsh__DEFAULT pio
+#endif
+
+/* off on */
+#ifndef R_ATA_CTRL_DATA__multi__DEFAULT
+#define R_ATA_CTRL_DATA__multi__DEFAULT off
+#endif
+
+/* word byte */
+#ifndef R_ATA_CTRL_DATA__dma_size__DEFAULT
+#define R_ATA_CTRL_DATA__dma_size__DEFAULT word
+#endif
+
+/* 0 - 0xffff */
+#ifndef R_ATA_CTRL_DATA__data__DEFAULT
+#define R_ATA_CTRL_DATA__data__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_BUS_CONFIG
+*/
+
+/* bwe cwe */
+#ifndef R_BUS_CONFIG__sram_type__DEFAULT
+#define R_BUS_CONFIG__sram_type__DEFAULT bwe
+#endif
+
+/* burst32 burst16 */
+#ifndef R_BUS_CONFIG__dma_burst__DEFAULT
+#define R_BUS_CONFIG__dma_burst__DEFAULT burst32
+#endif
+
+/* ext norm */
+#ifndef R_BUS_CONFIG__pcs4_7_wr__DEFAULT
+#define R_BUS_CONFIG__pcs4_7_wr__DEFAULT ext
+#endif
+
+/* ext norm */
+#ifndef R_BUS_CONFIG__pcs0_3_wr__DEFAULT
+#define R_BUS_CONFIG__pcs0_3_wr__DEFAULT ext
+#endif
+
+/* ext norm */
+#ifndef R_BUS_CONFIG__sram_wr__DEFAULT
+#define R_BUS_CONFIG__sram_wr__DEFAULT ext
+#endif
+
+/* ext norm */
+#ifndef R_BUS_CONFIG__flash_wr__DEFAULT
+#define R_BUS_CONFIG__flash_wr__DEFAULT ext
+#endif
+
+/* bw16 bw32 */
+#ifndef R_BUS_CONFIG__pcs4_7_bw__DEFAULT
+#define R_BUS_CONFIG__pcs4_7_bw__DEFAULT bw16
+#endif
+
+/* bw16 bw32 */
+#ifndef R_BUS_CONFIG__pcs0_3_bw__DEFAULT
+#define R_BUS_CONFIG__pcs0_3_bw__DEFAULT bw16
+#endif
+
+/* bw16 bw32 */
+#ifndef R_BUS_CONFIG__sram_bw__DEFAULT
+#define R_BUS_CONFIG__sram_bw__DEFAULT bw16
+#endif
+
+/* bw16 bw32 */
+#ifndef R_BUS_CONFIG__flash_bw__DEFAULT
+#define R_BUS_CONFIG__flash_bw__DEFAULT bw16
+#endif
+
+/*
+** Default values for register R_CLOCK_PRESCALE
+*/
+
+/* 0 - 0xffff */
+#ifndef R_CLOCK_PRESCALE__ser_presc__DEFAULT
+#define R_CLOCK_PRESCALE__ser_presc__DEFAULT 0
+#endif
+
+/* 0 - 0xffff */
+#ifndef R_CLOCK_PRESCALE__tim_presc__DEFAULT
+#define R_CLOCK_PRESCALE__tim_presc__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_DMA_CH0_CLR_INTR
+*/
+
+/* do dont */
+#ifndef R_DMA_CH0_CLR_INTR__clr_eop__DEFAULT
+#define R_DMA_CH0_CLR_INTR__clr_eop__DEFAULT do
+#endif
+
+/* do dont */
+#ifndef R_DMA_CH0_CLR_INTR__clr_descr__DEFAULT
+#define R_DMA_CH0_CLR_INTR__clr_descr__DEFAULT do
+#endif
+
+/*
+** Default values for register R_DMA_CH1_CLR_INTR
+*/
+
+/* do dont */
+#ifndef R_DMA_CH1_CLR_INTR__clr_eop__DEFAULT
+#define R_DMA_CH1_CLR_INTR__clr_eop__DEFAULT do
+#endif
+
+/* do dont */
+#ifndef R_DMA_CH1_CLR_INTR__clr_descr__DEFAULT
+#define R_DMA_CH1_CLR_INTR__clr_descr__DEFAULT do
+#endif
+
+/*
+** Default values for register R_DMA_CH2_CLR_INTR
+*/
+
+/* do dont */
+#ifndef R_DMA_CH2_CLR_INTR__clr_eop__DEFAULT
+#define R_DMA_CH2_CLR_INTR__clr_eop__DEFAULT do
+#endif
+
+/* do dont */
+#ifndef R_DMA_CH2_CLR_INTR__clr_descr__DEFAULT
+#define R_DMA_CH2_CLR_INTR__clr_descr__DEFAULT do
+#endif
+
+/*
+** Default values for register R_DMA_CH3_CLR_INTR
+*/
+
+/* do dont */
+#ifndef R_DMA_CH3_CLR_INTR__clr_eop__DEFAULT
+#define R_DMA_CH3_CLR_INTR__clr_eop__DEFAULT do
+#endif
+
+/* do dont */
+#ifndef R_DMA_CH3_CLR_INTR__clr_descr__DEFAULT
+#define R_DMA_CH3_CLR_INTR__clr_descr__DEFAULT do
+#endif
+
+/*
+** Default values for register R_DMA_CH4_CLR_INTR
+*/
+
+/* do dont */
+#ifndef R_DMA_CH4_CLR_INTR__clr_eop__DEFAULT
+#define R_DMA_CH4_CLR_INTR__clr_eop__DEFAULT do
+#endif
+
+/* do dont */
+#ifndef R_DMA_CH4_CLR_INTR__clr_descr__DEFAULT
+#define R_DMA_CH4_CLR_INTR__clr_descr__DEFAULT do
+#endif
+
+/*
+** Default values for register R_DMA_CH5_CLR_INTR
+*/
+
+/* do dont */
+#ifndef R_DMA_CH5_CLR_INTR__clr_eop__DEFAULT
+#define R_DMA_CH5_CLR_INTR__clr_eop__DEFAULT do
+#endif
+
+/* do dont */
+#ifndef R_DMA_CH5_CLR_INTR__clr_descr__DEFAULT
+#define R_DMA_CH5_CLR_INTR__clr_descr__DEFAULT do
+#endif
+
+/*
+** Default values for register R_DMA_CH6_CLR_INTR
+*/
+
+/* do dont */
+#ifndef R_DMA_CH6_CLR_INTR__clr_eop__DEFAULT
+#define R_DMA_CH6_CLR_INTR__clr_eop__DEFAULT do
+#endif
+
+/* do dont */
+#ifndef R_DMA_CH6_CLR_INTR__clr_descr__DEFAULT
+#define R_DMA_CH6_CLR_INTR__clr_descr__DEFAULT do
+#endif
+
+/*
+** Default values for register R_DMA_CH7_CLR_INTR
+*/
+
+/* do dont */
+#ifndef R_DMA_CH7_CLR_INTR__clr_eop__DEFAULT
+#define R_DMA_CH7_CLR_INTR__clr_eop__DEFAULT do
+#endif
+
+/* do dont */
+#ifndef R_DMA_CH7_CLR_INTR__clr_descr__DEFAULT
+#define R_DMA_CH7_CLR_INTR__clr_descr__DEFAULT do
+#endif
+
+/*
+** Default values for register R_DMA_CH8_CLR_INTR
+*/
+
+/* do dont */
+#ifndef R_DMA_CH8_CLR_INTR__clr_eop__DEFAULT
+#define R_DMA_CH8_CLR_INTR__clr_eop__DEFAULT do
+#endif
+
+/* do dont */
+#ifndef R_DMA_CH8_CLR_INTR__clr_descr__DEFAULT
+#define R_DMA_CH8_CLR_INTR__clr_descr__DEFAULT do
+#endif
+
+/*
+** Default values for register R_DMA_CH8_SUB0_CLR_INTR
+*/
+
+/* do dont */
+#ifndef R_DMA_CH8_SUB0_CLR_INTR__clr_descr__DEFAULT
+#define R_DMA_CH8_SUB0_CLR_INTR__clr_descr__DEFAULT do
+#endif
+
+/*
+** Default values for register R_DMA_CH8_SUB1_CLR_INTR
+*/
+
+/* do dont */
+#ifndef R_DMA_CH8_SUB1_CLR_INTR__clr_descr__DEFAULT
+#define R_DMA_CH8_SUB1_CLR_INTR__clr_descr__DEFAULT do
+#endif
+
+/*
+** Default values for register R_DMA_CH8_SUB2_CLR_INTR
+*/
+
+/* do dont */
+#ifndef R_DMA_CH8_SUB2_CLR_INTR__clr_descr__DEFAULT
+#define R_DMA_CH8_SUB2_CLR_INTR__clr_descr__DEFAULT do
+#endif
+
+/*
+** Default values for register R_DMA_CH8_SUB3_CLR_INTR
+*/
+
+/* do dont */
+#ifndef R_DMA_CH8_SUB3_CLR_INTR__clr_descr__DEFAULT
+#define R_DMA_CH8_SUB3_CLR_INTR__clr_descr__DEFAULT do
+#endif
+
+/*
+** Default values for register R_DMA_CH9_CLR_INTR
+*/
+
+/* do dont */
+#ifndef R_DMA_CH9_CLR_INTR__clr_eop__DEFAULT
+#define R_DMA_CH9_CLR_INTR__clr_eop__DEFAULT do
+#endif
+
+/* do dont */
+#ifndef R_DMA_CH9_CLR_INTR__clr_descr__DEFAULT
+#define R_DMA_CH9_CLR_INTR__clr_descr__DEFAULT do
+#endif
+
+/*
+** Default values for register R_DRAM_CONFIG
+*/
+
+/* wmm norm */
+#ifndef R_DRAM_CONFIG__wmm1__DEFAULT
+#define R_DRAM_CONFIG__wmm1__DEFAULT wmm
+#endif
+
+/* wmm norm */
+#ifndef R_DRAM_CONFIG__wmm0__DEFAULT
+#define R_DRAM_CONFIG__wmm0__DEFAULT wmm
+#endif
+
+/* 0 - 7 */
+#ifndef R_DRAM_CONFIG__sh1__DEFAULT
+#define R_DRAM_CONFIG__sh1__DEFAULT 0
+#endif
+
+/* 0 - 7 */
+#ifndef R_DRAM_CONFIG__sh0__DEFAULT
+#define R_DRAM_CONFIG__sh0__DEFAULT 0
+#endif
+
+/* bw16 bw32 */
+#ifndef R_DRAM_CONFIG__w__DEFAULT
+#define R_DRAM_CONFIG__w__DEFAULT bw16
+#endif
+
+/* bank byte */
+#ifndef R_DRAM_CONFIG__c__DEFAULT
+#define R_DRAM_CONFIG__c__DEFAULT bank
+#endif
+
+/* edo fast */
+#ifndef R_DRAM_CONFIG__e__DEFAULT
+#define R_DRAM_CONFIG__e__DEFAULT edo
+#endif
+
+/* bit10 bit20 bit11 bit21 bit12 bit22 bit13 bit23 bit14 bit24 bit15 bit25 bit16 bit26 bit17 bit27 bit18 bit9 bit28 bit19 grp0 bit29 grp1 */
+#ifndef R_DRAM_CONFIG__group_sel__DEFAULT
+#define R_DRAM_CONFIG__group_sel__DEFAULT bit10
+#endif
+
+/* 0 - 7 */
+#ifndef R_DRAM_CONFIG__ca1__DEFAULT
+#define R_DRAM_CONFIG__ca1__DEFAULT 0
+#endif
+
+/* bit10 bit20 bit11 bit21 bit12 bit22 bit13 bit23 bit14 bit24 bit15 bit25 bit16 bit26 bit17 bit27 bit18 bit28 bit19 bit29 bank0 bank1 bit9 */
+#ifndef R_DRAM_CONFIG__bank23sel__DEFAULT
+#define R_DRAM_CONFIG__bank23sel__DEFAULT bit10
+#endif
+
+/* 0 - 7 */
+#ifndef R_DRAM_CONFIG__ca0__DEFAULT
+#define R_DRAM_CONFIG__ca0__DEFAULT 0
+#endif
+
+/* bit10 bit20 bit11 bit21 bit12 bit22 bit13 bit23 bit14 bit24 bit15 bit25 bit16 bit26 bit17 bit27 bit18 bit28 bit19 bit29 bank0 bank1 bit9 */
+#ifndef R_DRAM_CONFIG__bank01sel__DEFAULT
+#define R_DRAM_CONFIG__bank01sel__DEFAULT bit10
+#endif
+
+/*
+** Default values for register R_DRAM_TIMING
+*/
+
+/* disable enable */
+#ifndef R_DRAM_TIMING__sdram__DEFAULT
+#define R_DRAM_TIMING__sdram__DEFAULT disable
+#endif
+
+/* e13us disable e52us e8700ns */
+#ifndef R_DRAM_TIMING__ref__DEFAULT
+#define R_DRAM_TIMING__ref__DEFAULT e13us
+#endif
+
+/* 0 - 3 */
+#ifndef R_DRAM_TIMING__rp__DEFAULT
+#define R_DRAM_TIMING__rp__DEFAULT 0
+#endif
+
+/* 0 - 3 */
+#ifndef R_DRAM_TIMING__rs__DEFAULT
+#define R_DRAM_TIMING__rs__DEFAULT 0
+#endif
+
+/* 0 - 3 */
+#ifndef R_DRAM_TIMING__rh__DEFAULT
+#define R_DRAM_TIMING__rh__DEFAULT 0
+#endif
+
+/* ext norm */
+#ifndef R_DRAM_TIMING__w__DEFAULT
+#define R_DRAM_TIMING__w__DEFAULT ext
+#endif
+
+/* ext norm */
+#ifndef R_DRAM_TIMING__c__DEFAULT
+#define R_DRAM_TIMING__c__DEFAULT ext
+#endif
+
+/* 0 - 3 */
+#ifndef R_DRAM_TIMING__cz__DEFAULT
+#define R_DRAM_TIMING__cz__DEFAULT 0
+#endif
+
+/* 0 - 3 */
+#ifndef R_DRAM_TIMING__cp__DEFAULT
+#define R_DRAM_TIMING__cp__DEFAULT 0
+#endif
+
+/* 0 - 3 */
+#ifndef R_DRAM_TIMING__cw__DEFAULT
+#define R_DRAM_TIMING__cw__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_EXT_DMA_0_ADDR
+*/
+
+/* 0 - 0xfffffff */
+#ifndef R_EXT_DMA_0_ADDR__ext0_addr__DEFAULT
+#define R_EXT_DMA_0_ADDR__ext0_addr__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_EXT_DMA_0_CMD
+*/
+
+/* disable enable */
+#ifndef R_EXT_DMA_0_CMD__cnt__DEFAULT
+#define R_EXT_DMA_0_CMD__cnt__DEFAULT disable
+#endif
+
+/* ahigh alow */
+#ifndef R_EXT_DMA_0_CMD__rqpol__DEFAULT
+#define R_EXT_DMA_0_CMD__rqpol__DEFAULT ahigh
+#endif
+
+/* ahigh alow */
+#ifndef R_EXT_DMA_0_CMD__apol__DEFAULT
+#define R_EXT_DMA_0_CMD__apol__DEFAULT ahigh
+#endif
+
+/* burst handsh */
+#ifndef R_EXT_DMA_0_CMD__rq_ack__DEFAULT
+#define R_EXT_DMA_0_CMD__rq_ack__DEFAULT burst
+#endif
+
+/* dword word byte */
+#ifndef R_EXT_DMA_0_CMD__wid__DEFAULT
+#define R_EXT_DMA_0_CMD__wid__DEFAULT dword
+#endif
+
+/* input output */
+#ifndef R_EXT_DMA_0_CMD__dir__DEFAULT
+#define R_EXT_DMA_0_CMD__dir__DEFAULT input
+#endif
+
+/* stop start */
+#ifndef R_EXT_DMA_0_CMD__run__DEFAULT
+#define R_EXT_DMA_0_CMD__run__DEFAULT stop
+#endif
+
+/* 0 - 0xffff */
+#ifndef R_EXT_DMA_0_CMD__trf_count__DEFAULT
+#define R_EXT_DMA_0_CMD__trf_count__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_EXT_DMA_1_ADDR
+*/
+
+/* 0 - 0xfffffff */
+#ifndef R_EXT_DMA_1_ADDR__ext0_addr__DEFAULT
+#define R_EXT_DMA_1_ADDR__ext0_addr__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_EXT_DMA_1_CMD
+*/
+
+/* disable enable */
+#ifndef R_EXT_DMA_1_CMD__cnt__DEFAULT
+#define R_EXT_DMA_1_CMD__cnt__DEFAULT disable
+#endif
+
+/* ahigh alow */
+#ifndef R_EXT_DMA_1_CMD__rqpol__DEFAULT
+#define R_EXT_DMA_1_CMD__rqpol__DEFAULT ahigh
+#endif
+
+/* ahigh alow */
+#ifndef R_EXT_DMA_1_CMD__apol__DEFAULT
+#define R_EXT_DMA_1_CMD__apol__DEFAULT ahigh
+#endif
+
+/* burst handsh */
+#ifndef R_EXT_DMA_1_CMD__rq_ack__DEFAULT
+#define R_EXT_DMA_1_CMD__rq_ack__DEFAULT burst
+#endif
+
+/* dword word byte */
+#ifndef R_EXT_DMA_1_CMD__wid__DEFAULT
+#define R_EXT_DMA_1_CMD__wid__DEFAULT dword
+#endif
+
+/* input output */
+#ifndef R_EXT_DMA_1_CMD__dir__DEFAULT
+#define R_EXT_DMA_1_CMD__dir__DEFAULT input
+#endif
+
+/* stop start */
+#ifndef R_EXT_DMA_1_CMD__run__DEFAULT
+#define R_EXT_DMA_1_CMD__run__DEFAULT stop
+#endif
+
+/* 0 - 0xffff */
+#ifndef R_EXT_DMA_1_CMD__trf_count__DEFAULT
+#define R_EXT_DMA_1_CMD__trf_count__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_GEN_CONFIG
+*/
+
+/* select disable */
+#ifndef R_GEN_CONFIG__par_w__DEFAULT
+#define R_GEN_CONFIG__par_w__DEFAULT select
+#endif
+
+/* select disable */
+#ifndef R_GEN_CONFIG__usb2__DEFAULT
+#define R_GEN_CONFIG__usb2__DEFAULT select
+#endif
+
+/* select disable */
+#ifndef R_GEN_CONFIG__usb1__DEFAULT
+#define R_GEN_CONFIG__usb1__DEFAULT select
+#endif
+
+/* out in */
+#ifndef R_GEN_CONFIG__g24dir__DEFAULT
+#define R_GEN_CONFIG__g24dir__DEFAULT out
+#endif
+
+/* out in */
+#ifndef R_GEN_CONFIG__g16_23dir__DEFAULT
+#define R_GEN_CONFIG__g16_23dir__DEFAULT out
+#endif
+
+/* out in */
+#ifndef R_GEN_CONFIG__g8_15dir__DEFAULT
+#define R_GEN_CONFIG__g8_15dir__DEFAULT out
+#endif
+
+/* out in */
+#ifndef R_GEN_CONFIG__g0dir__DEFAULT
+#define R_GEN_CONFIG__g0dir__DEFAULT out
+#endif
+
+/* serial1 usb */
+#ifndef R_GEN_CONFIG__dma9__DEFAULT
+#define R_GEN_CONFIG__dma9__DEFAULT serial1
+#endif
+
+/* serial1 usb */
+#ifndef R_GEN_CONFIG__dma8__DEFAULT
+#define R_GEN_CONFIG__dma8__DEFAULT serial1
+#endif
+
+/* serial0 intdma6 extdma1 unused */
+#ifndef R_GEN_CONFIG__dma7__DEFAULT
+#define R_GEN_CONFIG__dma7__DEFAULT serial0
+#endif
+
+/* serial0 intdma7 extdma1 unused */
+#ifndef R_GEN_CONFIG__dma6__DEFAULT
+#define R_GEN_CONFIG__dma6__DEFAULT serial0
+#endif
+
+/* extdma0 serial3 scsi1 par1 */
+#ifndef R_GEN_CONFIG__dma5__DEFAULT
+#define R_GEN_CONFIG__dma5__DEFAULT extdma0
+#endif
+
+/* extdma0 serial3 scsi1 par1 */
+#ifndef R_GEN_CONFIG__dma4__DEFAULT
+#define R_GEN_CONFIG__dma4__DEFAULT extdma0
+#endif
+
+/* serial2 scsi0 par0 ata */
+#ifndef R_GEN_CONFIG__dma3__DEFAULT
+#define R_GEN_CONFIG__dma3__DEFAULT serial2
+#endif
+
+/* serial2 scsi0 par0 ata */
+#ifndef R_GEN_CONFIG__dma2__DEFAULT
+#define R_GEN_CONFIG__dma2__DEFAULT serial2
+#endif
+
+/* select disable */
+#ifndef R_GEN_CONFIG__mio_w__DEFAULT
+#define R_GEN_CONFIG__mio_w__DEFAULT select
+#endif
+
+/* select disable */
+#ifndef R_GEN_CONFIG__ser3__DEFAULT
+#define R_GEN_CONFIG__ser3__DEFAULT select
+#endif
+
+/* select disable */
+#ifndef R_GEN_CONFIG__par1__DEFAULT
+#define R_GEN_CONFIG__par1__DEFAULT select
+#endif
+
+/* select disable */
+#ifndef R_GEN_CONFIG__scsi0w__DEFAULT
+#define R_GEN_CONFIG__scsi0w__DEFAULT select
+#endif
+
+/* select disable */
+#ifndef R_GEN_CONFIG__scsi1__DEFAULT
+#define R_GEN_CONFIG__scsi1__DEFAULT select
+#endif
+
+/* select disable */
+#ifndef R_GEN_CONFIG__mio__DEFAULT
+#define R_GEN_CONFIG__mio__DEFAULT select
+#endif
+
+/* select disable */
+#ifndef R_GEN_CONFIG__ser2__DEFAULT
+#define R_GEN_CONFIG__ser2__DEFAULT select
+#endif
+
+/* select disable */
+#ifndef R_GEN_CONFIG__par0__DEFAULT
+#define R_GEN_CONFIG__par0__DEFAULT select
+#endif
+
+/* select disable */
+#ifndef R_GEN_CONFIG__ata__DEFAULT
+#define R_GEN_CONFIG__ata__DEFAULT select
+#endif
+
+/* select disable */
+#ifndef R_GEN_CONFIG__scsi0__DEFAULT
+#define R_GEN_CONFIG__scsi0__DEFAULT select
+#endif
+
+/*
+** Default values for register R_GEN_CONFIG_II
+*/
+
+/* sync async */
+#ifndef R_GEN_CONFIG_II__sermode3__DEFAULT
+#define R_GEN_CONFIG_II__sermode3__DEFAULT sync
+#endif
+
+/* sync async */
+#ifndef R_GEN_CONFIG_II__sermode1__DEFAULT
+#define R_GEN_CONFIG_II__sermode1__DEFAULT sync
+#endif
+
+/* select disable */
+#ifndef R_GEN_CONFIG_II__ext_clk__DEFAULT
+#define R_GEN_CONFIG_II__ext_clk__DEFAULT select
+#endif
+
+/* select disable */
+#ifndef R_GEN_CONFIG_II__ser3__DEFAULT
+#define R_GEN_CONFIG_II__ser3__DEFAULT select
+#endif
+
+/* select disable */
+#ifndef R_GEN_CONFIG_II__ser2__DEFAULT
+#define R_GEN_CONFIG_II__ser2__DEFAULT select
+#endif
+
+/*
+** Default values for register R_IRQ_MASK0_CLR
+*/
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__nmi_pin__DEFAULT
+#define R_IRQ_MASK0_CLR__nmi_pin__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__watchdog_nmi__DEFAULT
+#define R_IRQ_MASK0_CLR__watchdog_nmi__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__sqe_test_error__DEFAULT
+#define R_IRQ_MASK0_CLR__sqe_test_error__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__carrier_loss__DEFAULT
+#define R_IRQ_MASK0_CLR__carrier_loss__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__deferred__DEFAULT
+#define R_IRQ_MASK0_CLR__deferred__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__late_col__DEFAULT
+#define R_IRQ_MASK0_CLR__late_col__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__multiple_col__DEFAULT
+#define R_IRQ_MASK0_CLR__multiple_col__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__single_col__DEFAULT
+#define R_IRQ_MASK0_CLR__single_col__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__congestion__DEFAULT
+#define R_IRQ_MASK0_CLR__congestion__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__oversize__DEFAULT
+#define R_IRQ_MASK0_CLR__oversize__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__alignment_error__DEFAULT
+#define R_IRQ_MASK0_CLR__alignment_error__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__crc_error__DEFAULT
+#define R_IRQ_MASK0_CLR__crc_error__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__overrun__DEFAULT
+#define R_IRQ_MASK0_CLR__overrun__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__underrun__DEFAULT
+#define R_IRQ_MASK0_CLR__underrun__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__excessive_col__DEFAULT
+#define R_IRQ_MASK0_CLR__excessive_col__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__mdio__DEFAULT
+#define R_IRQ_MASK0_CLR__mdio__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__ata_drq3__DEFAULT
+#define R_IRQ_MASK0_CLR__ata_drq3__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__ata_drq2__DEFAULT
+#define R_IRQ_MASK0_CLR__ata_drq2__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__ata_drq1__DEFAULT
+#define R_IRQ_MASK0_CLR__ata_drq1__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__ata_drq0__DEFAULT
+#define R_IRQ_MASK0_CLR__ata_drq0__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__par0_ecp_cmd__DEFAULT
+#define R_IRQ_MASK0_CLR__par0_ecp_cmd__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__par0_peri__DEFAULT
+#define R_IRQ_MASK0_CLR__par0_peri__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__par0_data__DEFAULT
+#define R_IRQ_MASK0_CLR__par0_data__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__par0_ready__DEFAULT
+#define R_IRQ_MASK0_CLR__par0_ready__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__ata_dmaend__DEFAULT
+#define R_IRQ_MASK0_CLR__ata_dmaend__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__irq_ext_vector_nr__DEFAULT
+#define R_IRQ_MASK0_CLR__irq_ext_vector_nr__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__irq_int_vector_nr__DEFAULT
+#define R_IRQ_MASK0_CLR__irq_int_vector_nr__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__ext_dma1__DEFAULT
+#define R_IRQ_MASK0_CLR__ext_dma1__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__ext_dma0__DEFAULT
+#define R_IRQ_MASK0_CLR__ext_dma0__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__timer1__DEFAULT
+#define R_IRQ_MASK0_CLR__timer1__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK0_CLR__timer0__DEFAULT
+#define R_IRQ_MASK0_CLR__timer0__DEFAULT clr
+#endif
+
+/*
+** Default values for register R_IRQ_MASK0_SET
+*/
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__nmi_pin__DEFAULT
+#define R_IRQ_MASK0_SET__nmi_pin__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__watchdog_nmi__DEFAULT
+#define R_IRQ_MASK0_SET__watchdog_nmi__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__sqe_test_error__DEFAULT
+#define R_IRQ_MASK0_SET__sqe_test_error__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__carrier_loss__DEFAULT
+#define R_IRQ_MASK0_SET__carrier_loss__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__deferred__DEFAULT
+#define R_IRQ_MASK0_SET__deferred__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__late_col__DEFAULT
+#define R_IRQ_MASK0_SET__late_col__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__multiple_col__DEFAULT
+#define R_IRQ_MASK0_SET__multiple_col__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__single_col__DEFAULT
+#define R_IRQ_MASK0_SET__single_col__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__congestion__DEFAULT
+#define R_IRQ_MASK0_SET__congestion__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__oversize__DEFAULT
+#define R_IRQ_MASK0_SET__oversize__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__alignment_error__DEFAULT
+#define R_IRQ_MASK0_SET__alignment_error__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__crc_error__DEFAULT
+#define R_IRQ_MASK0_SET__crc_error__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__overrun__DEFAULT
+#define R_IRQ_MASK0_SET__overrun__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__underrun__DEFAULT
+#define R_IRQ_MASK0_SET__underrun__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__excessive_col__DEFAULT
+#define R_IRQ_MASK0_SET__excessive_col__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__mdio__DEFAULT
+#define R_IRQ_MASK0_SET__mdio__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__ata_drq3__DEFAULT
+#define R_IRQ_MASK0_SET__ata_drq3__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__ata_drq2__DEFAULT
+#define R_IRQ_MASK0_SET__ata_drq2__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__ata_drq1__DEFAULT
+#define R_IRQ_MASK0_SET__ata_drq1__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__ata_drq0__DEFAULT
+#define R_IRQ_MASK0_SET__ata_drq0__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__par0_ecp_cmd__DEFAULT
+#define R_IRQ_MASK0_SET__par0_ecp_cmd__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__par0_peri__DEFAULT
+#define R_IRQ_MASK0_SET__par0_peri__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__par0_data__DEFAULT
+#define R_IRQ_MASK0_SET__par0_data__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__par0_ready__DEFAULT
+#define R_IRQ_MASK0_SET__par0_ready__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__ata_dmaend__DEFAULT
+#define R_IRQ_MASK0_SET__ata_dmaend__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__irq_ext_vector_nr__DEFAULT
+#define R_IRQ_MASK0_SET__irq_ext_vector_nr__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__irq_int_vector_nr__DEFAULT
+#define R_IRQ_MASK0_SET__irq_int_vector_nr__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__ext_dma1__DEFAULT
+#define R_IRQ_MASK0_SET__ext_dma1__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__ext_dma0__DEFAULT
+#define R_IRQ_MASK0_SET__ext_dma0__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__timer1__DEFAULT
+#define R_IRQ_MASK0_SET__timer1__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK0_SET__timer0__DEFAULT
+#define R_IRQ_MASK0_SET__timer0__DEFAULT set
+#endif
+
+/*
+** Default values for register R_IRQ_MASK1_CLR
+*/
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__sw_int7__DEFAULT
+#define R_IRQ_MASK1_CLR__sw_int7__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__sw_int6__DEFAULT
+#define R_IRQ_MASK1_CLR__sw_int6__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__sw_int5__DEFAULT
+#define R_IRQ_MASK1_CLR__sw_int5__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__sw_int4__DEFAULT
+#define R_IRQ_MASK1_CLR__sw_int4__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__sw_int3__DEFAULT
+#define R_IRQ_MASK1_CLR__sw_int3__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__sw_int2__DEFAULT
+#define R_IRQ_MASK1_CLR__sw_int2__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__sw_int1__DEFAULT
+#define R_IRQ_MASK1_CLR__sw_int1__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__sw_int0__DEFAULT
+#define R_IRQ_MASK1_CLR__sw_int0__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__par1_ecp_cmd__DEFAULT
+#define R_IRQ_MASK1_CLR__par1_ecp_cmd__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__par1_peri__DEFAULT
+#define R_IRQ_MASK1_CLR__par1_peri__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__par1_data__DEFAULT
+#define R_IRQ_MASK1_CLR__par1_data__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__par1_ready__DEFAULT
+#define R_IRQ_MASK1_CLR__par1_ready__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__ser3_ready__DEFAULT
+#define R_IRQ_MASK1_CLR__ser3_ready__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__ser3_data__DEFAULT
+#define R_IRQ_MASK1_CLR__ser3_data__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__ser2_ready__DEFAULT
+#define R_IRQ_MASK1_CLR__ser2_ready__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__ser2_data__DEFAULT
+#define R_IRQ_MASK1_CLR__ser2_data__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__ser1_ready__DEFAULT
+#define R_IRQ_MASK1_CLR__ser1_ready__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__ser1_data__DEFAULT
+#define R_IRQ_MASK1_CLR__ser1_data__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__ser0_ready__DEFAULT
+#define R_IRQ_MASK1_CLR__ser0_ready__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__ser0_data__DEFAULT
+#define R_IRQ_MASK1_CLR__ser0_data__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__pa7__DEFAULT
+#define R_IRQ_MASK1_CLR__pa7__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__pa6__DEFAULT
+#define R_IRQ_MASK1_CLR__pa6__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__pa5__DEFAULT
+#define R_IRQ_MASK1_CLR__pa5__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__pa4__DEFAULT
+#define R_IRQ_MASK1_CLR__pa4__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__pa3__DEFAULT
+#define R_IRQ_MASK1_CLR__pa3__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__pa2__DEFAULT
+#define R_IRQ_MASK1_CLR__pa2__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__pa1__DEFAULT
+#define R_IRQ_MASK1_CLR__pa1__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK1_CLR__pa0__DEFAULT
+#define R_IRQ_MASK1_CLR__pa0__DEFAULT clr
+#endif
+
+/*
+** Default values for register R_IRQ_MASK1_SET
+*/
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__sw_int7__DEFAULT
+#define R_IRQ_MASK1_SET__sw_int7__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__sw_int6__DEFAULT
+#define R_IRQ_MASK1_SET__sw_int6__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__sw_int5__DEFAULT
+#define R_IRQ_MASK1_SET__sw_int5__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__sw_int4__DEFAULT
+#define R_IRQ_MASK1_SET__sw_int4__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__sw_int3__DEFAULT
+#define R_IRQ_MASK1_SET__sw_int3__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__sw_int2__DEFAULT
+#define R_IRQ_MASK1_SET__sw_int2__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__sw_int1__DEFAULT
+#define R_IRQ_MASK1_SET__sw_int1__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__sw_int0__DEFAULT
+#define R_IRQ_MASK1_SET__sw_int0__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__par1_ecp_cmd__DEFAULT
+#define R_IRQ_MASK1_SET__par1_ecp_cmd__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__par1_peri__DEFAULT
+#define R_IRQ_MASK1_SET__par1_peri__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__par1_data__DEFAULT
+#define R_IRQ_MASK1_SET__par1_data__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__par1_ready__DEFAULT
+#define R_IRQ_MASK1_SET__par1_ready__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__ser3_ready__DEFAULT
+#define R_IRQ_MASK1_SET__ser3_ready__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__ser3_data__DEFAULT
+#define R_IRQ_MASK1_SET__ser3_data__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__ser2_ready__DEFAULT
+#define R_IRQ_MASK1_SET__ser2_ready__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__ser2_data__DEFAULT
+#define R_IRQ_MASK1_SET__ser2_data__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__ser1_ready__DEFAULT
+#define R_IRQ_MASK1_SET__ser1_ready__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__ser1_data__DEFAULT
+#define R_IRQ_MASK1_SET__ser1_data__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__ser0_ready__DEFAULT
+#define R_IRQ_MASK1_SET__ser0_ready__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__ser0_data__DEFAULT
+#define R_IRQ_MASK1_SET__ser0_data__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__pa7__DEFAULT
+#define R_IRQ_MASK1_SET__pa7__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__pa6__DEFAULT
+#define R_IRQ_MASK1_SET__pa6__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__pa5__DEFAULT
+#define R_IRQ_MASK1_SET__pa5__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__pa4__DEFAULT
+#define R_IRQ_MASK1_SET__pa4__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__pa3__DEFAULT
+#define R_IRQ_MASK1_SET__pa3__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__pa2__DEFAULT
+#define R_IRQ_MASK1_SET__pa2__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__pa1__DEFAULT
+#define R_IRQ_MASK1_SET__pa1__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK1_SET__pa0__DEFAULT
+#define R_IRQ_MASK1_SET__pa0__DEFAULT set
+#endif
+
+/*
+** Default values for register R_IRQ_MASK2_CLR
+*/
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma8_sub3_descr__DEFAULT
+#define R_IRQ_MASK2_CLR__dma8_sub3_descr__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma8_sub2_descr__DEFAULT
+#define R_IRQ_MASK2_CLR__dma8_sub2_descr__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma8_sub1_descr__DEFAULT
+#define R_IRQ_MASK2_CLR__dma8_sub1_descr__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma8_sub0_descr__DEFAULT
+#define R_IRQ_MASK2_CLR__dma8_sub0_descr__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma9_eop__DEFAULT
+#define R_IRQ_MASK2_CLR__dma9_eop__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma9_descr__DEFAULT
+#define R_IRQ_MASK2_CLR__dma9_descr__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma8_eop__DEFAULT
+#define R_IRQ_MASK2_CLR__dma8_eop__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma8_descr__DEFAULT
+#define R_IRQ_MASK2_CLR__dma8_descr__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma7_eop__DEFAULT
+#define R_IRQ_MASK2_CLR__dma7_eop__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma7_descr__DEFAULT
+#define R_IRQ_MASK2_CLR__dma7_descr__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma6_eop__DEFAULT
+#define R_IRQ_MASK2_CLR__dma6_eop__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma6_descr__DEFAULT
+#define R_IRQ_MASK2_CLR__dma6_descr__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma5_eop__DEFAULT
+#define R_IRQ_MASK2_CLR__dma5_eop__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma5_descr__DEFAULT
+#define R_IRQ_MASK2_CLR__dma5_descr__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma4_eop__DEFAULT
+#define R_IRQ_MASK2_CLR__dma4_eop__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma4_descr__DEFAULT
+#define R_IRQ_MASK2_CLR__dma4_descr__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma3_eop__DEFAULT
+#define R_IRQ_MASK2_CLR__dma3_eop__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma3_descr__DEFAULT
+#define R_IRQ_MASK2_CLR__dma3_descr__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma2_eop__DEFAULT
+#define R_IRQ_MASK2_CLR__dma2_eop__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma2_descr__DEFAULT
+#define R_IRQ_MASK2_CLR__dma2_descr__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma1_eop__DEFAULT
+#define R_IRQ_MASK2_CLR__dma1_eop__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma1_descr__DEFAULT
+#define R_IRQ_MASK2_CLR__dma1_descr__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma0_eop__DEFAULT
+#define R_IRQ_MASK2_CLR__dma0_eop__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_IRQ_MASK2_CLR__dma0_descr__DEFAULT
+#define R_IRQ_MASK2_CLR__dma0_descr__DEFAULT clr
+#endif
+
+/*
+** Default values for register R_IRQ_MASK2_SET
+*/
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma8_sub3_descr__DEFAULT
+#define R_IRQ_MASK2_SET__dma8_sub3_descr__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma8_sub2_descr__DEFAULT
+#define R_IRQ_MASK2_SET__dma8_sub2_descr__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma8_sub1_descr__DEFAULT
+#define R_IRQ_MASK2_SET__dma8_sub1_descr__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma8_sub0_descr__DEFAULT
+#define R_IRQ_MASK2_SET__dma8_sub0_descr__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma9_eop__DEFAULT
+#define R_IRQ_MASK2_SET__dma9_eop__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma9_descr__DEFAULT
+#define R_IRQ_MASK2_SET__dma9_descr__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma8_eop__DEFAULT
+#define R_IRQ_MASK2_SET__dma8_eop__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma8_descr__DEFAULT
+#define R_IRQ_MASK2_SET__dma8_descr__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma7_eop__DEFAULT
+#define R_IRQ_MASK2_SET__dma7_eop__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma7_descr__DEFAULT
+#define R_IRQ_MASK2_SET__dma7_descr__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma6_eop__DEFAULT
+#define R_IRQ_MASK2_SET__dma6_eop__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma6_descr__DEFAULT
+#define R_IRQ_MASK2_SET__dma6_descr__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma5_eop__DEFAULT
+#define R_IRQ_MASK2_SET__dma5_eop__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma5_descr__DEFAULT
+#define R_IRQ_MASK2_SET__dma5_descr__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma4_eop__DEFAULT
+#define R_IRQ_MASK2_SET__dma4_eop__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma4_descr__DEFAULT
+#define R_IRQ_MASK2_SET__dma4_descr__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma3_eop__DEFAULT
+#define R_IRQ_MASK2_SET__dma3_eop__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma3_descr__DEFAULT
+#define R_IRQ_MASK2_SET__dma3_descr__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma2_eop__DEFAULT
+#define R_IRQ_MASK2_SET__dma2_eop__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma2_descr__DEFAULT
+#define R_IRQ_MASK2_SET__dma2_descr__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma1_eop__DEFAULT
+#define R_IRQ_MASK2_SET__dma1_eop__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma1_descr__DEFAULT
+#define R_IRQ_MASK2_SET__dma1_descr__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma0_eop__DEFAULT
+#define R_IRQ_MASK2_SET__dma0_eop__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_IRQ_MASK2_SET__dma0_descr__DEFAULT
+#define R_IRQ_MASK2_SET__dma0_descr__DEFAULT set
+#endif
+
+/*
+** Default values for register R_MMU_CONFIG
+*/
+
+/* disable enable */
+#ifndef R_MMU_CONFIG__mmu_enable__DEFAULT
+#define R_MMU_CONFIG__mmu_enable__DEFAULT disable
+#endif
+
+/* disable enable */
+#ifndef R_MMU_CONFIG__inv_excp__DEFAULT
+#define R_MMU_CONFIG__inv_excp__DEFAULT disable
+#endif
+
+/* disable enable */
+#ifndef R_MMU_CONFIG__acc_excp__DEFAULT
+#define R_MMU_CONFIG__acc_excp__DEFAULT disable
+#endif
+
+/* disable enable */
+#ifndef R_MMU_CONFIG__we_excp__DEFAULT
+#define R_MMU_CONFIG__we_excp__DEFAULT disable
+#endif
+
+/* page seg */
+#ifndef R_MMU_CONFIG__seg_f__DEFAULT
+#define R_MMU_CONFIG__seg_f__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_CONFIG__seg_e__DEFAULT
+#define R_MMU_CONFIG__seg_e__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_CONFIG__seg_d__DEFAULT
+#define R_MMU_CONFIG__seg_d__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_CONFIG__seg_c__DEFAULT
+#define R_MMU_CONFIG__seg_c__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_CONFIG__seg_b__DEFAULT
+#define R_MMU_CONFIG__seg_b__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_CONFIG__seg_a__DEFAULT
+#define R_MMU_CONFIG__seg_a__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_CONFIG__seg_9__DEFAULT
+#define R_MMU_CONFIG__seg_9__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_CONFIG__seg_8__DEFAULT
+#define R_MMU_CONFIG__seg_8__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_CONFIG__seg_7__DEFAULT
+#define R_MMU_CONFIG__seg_7__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_CONFIG__seg_6__DEFAULT
+#define R_MMU_CONFIG__seg_6__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_CONFIG__seg_5__DEFAULT
+#define R_MMU_CONFIG__seg_5__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_CONFIG__seg_4__DEFAULT
+#define R_MMU_CONFIG__seg_4__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_CONFIG__seg_3__DEFAULT
+#define R_MMU_CONFIG__seg_3__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_CONFIG__seg_2__DEFAULT
+#define R_MMU_CONFIG__seg_2__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_CONFIG__seg_1__DEFAULT
+#define R_MMU_CONFIG__seg_1__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_CONFIG__seg_0__DEFAULT
+#define R_MMU_CONFIG__seg_0__DEFAULT page
+#endif
+
+/*
+** Default values for register R_MMU_CTRL
+*/
+
+/* disable enable */
+#ifndef R_MMU_CTRL__inv_excp__DEFAULT
+#define R_MMU_CTRL__inv_excp__DEFAULT disable
+#endif
+
+/* disable enable */
+#ifndef R_MMU_CTRL__acc_excp__DEFAULT
+#define R_MMU_CTRL__acc_excp__DEFAULT disable
+#endif
+
+/* disable enable */
+#ifndef R_MMU_CTRL__we_excp__DEFAULT
+#define R_MMU_CTRL__we_excp__DEFAULT disable
+#endif
+
+/*
+** Default values for register R_MMU_ENABLE
+*/
+
+/* disable enable */
+#ifndef R_MMU_ENABLE__mmu_enable__DEFAULT
+#define R_MMU_ENABLE__mmu_enable__DEFAULT disable
+#endif
+
+/*
+** Default values for register R_MMU_KBASE_HI
+*/
+
+/* 0 - 15 */
+#ifndef R_MMU_KBASE_HI__base_f__DEFAULT
+#define R_MMU_KBASE_HI__base_f__DEFAULT 0
+#endif
+
+/* 0 - 15 */
+#ifndef R_MMU_KBASE_HI__base_e__DEFAULT
+#define R_MMU_KBASE_HI__base_e__DEFAULT 0
+#endif
+
+/* 0 - 15 */
+#ifndef R_MMU_KBASE_HI__base_d__DEFAULT
+#define R_MMU_KBASE_HI__base_d__DEFAULT 0
+#endif
+
+/* 0 - 15 */
+#ifndef R_MMU_KBASE_HI__base_c__DEFAULT
+#define R_MMU_KBASE_HI__base_c__DEFAULT 0
+#endif
+
+/* 0 - 15 */
+#ifndef R_MMU_KBASE_HI__base_b__DEFAULT
+#define R_MMU_KBASE_HI__base_b__DEFAULT 0
+#endif
+
+/* 0 - 15 */
+#ifndef R_MMU_KBASE_HI__base_a__DEFAULT
+#define R_MMU_KBASE_HI__base_a__DEFAULT 0
+#endif
+
+/* 0 - 15 */
+#ifndef R_MMU_KBASE_HI__base_9__DEFAULT
+#define R_MMU_KBASE_HI__base_9__DEFAULT 0
+#endif
+
+/* 0 - 15 */
+#ifndef R_MMU_KBASE_HI__base_8__DEFAULT
+#define R_MMU_KBASE_HI__base_8__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_MMU_KBASE_LO
+*/
+
+/* 0 - 15 */
+#ifndef R_MMU_KBASE_LO__base_7__DEFAULT
+#define R_MMU_KBASE_LO__base_7__DEFAULT 0
+#endif
+
+/* 0 - 15 */
+#ifndef R_MMU_KBASE_LO__base_6__DEFAULT
+#define R_MMU_KBASE_LO__base_6__DEFAULT 0
+#endif
+
+/* 0 - 15 */
+#ifndef R_MMU_KBASE_LO__base_5__DEFAULT
+#define R_MMU_KBASE_LO__base_5__DEFAULT 0
+#endif
+
+/* 0 - 15 */
+#ifndef R_MMU_KBASE_LO__base_4__DEFAULT
+#define R_MMU_KBASE_LO__base_4__DEFAULT 0
+#endif
+
+/* 0 - 15 */
+#ifndef R_MMU_KBASE_LO__base_3__DEFAULT
+#define R_MMU_KBASE_LO__base_3__DEFAULT 0
+#endif
+
+/* 0 - 15 */
+#ifndef R_MMU_KBASE_LO__base_2__DEFAULT
+#define R_MMU_KBASE_LO__base_2__DEFAULT 0
+#endif
+
+/* 0 - 15 */
+#ifndef R_MMU_KBASE_LO__base_1__DEFAULT
+#define R_MMU_KBASE_LO__base_1__DEFAULT 0
+#endif
+
+/* 0 - 15 */
+#ifndef R_MMU_KBASE_LO__base_0__DEFAULT
+#define R_MMU_KBASE_LO__base_0__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_MMU_KSEG
+*/
+
+/* page seg */
+#ifndef R_MMU_KSEG__seg_f__DEFAULT
+#define R_MMU_KSEG__seg_f__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_KSEG__seg_e__DEFAULT
+#define R_MMU_KSEG__seg_e__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_KSEG__seg_d__DEFAULT
+#define R_MMU_KSEG__seg_d__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_KSEG__seg_c__DEFAULT
+#define R_MMU_KSEG__seg_c__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_KSEG__seg_b__DEFAULT
+#define R_MMU_KSEG__seg_b__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_KSEG__seg_a__DEFAULT
+#define R_MMU_KSEG__seg_a__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_KSEG__seg_9__DEFAULT
+#define R_MMU_KSEG__seg_9__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_KSEG__seg_8__DEFAULT
+#define R_MMU_KSEG__seg_8__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_KSEG__seg_7__DEFAULT
+#define R_MMU_KSEG__seg_7__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_KSEG__seg_6__DEFAULT
+#define R_MMU_KSEG__seg_6__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_KSEG__seg_5__DEFAULT
+#define R_MMU_KSEG__seg_5__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_KSEG__seg_4__DEFAULT
+#define R_MMU_KSEG__seg_4__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_KSEG__seg_3__DEFAULT
+#define R_MMU_KSEG__seg_3__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_KSEG__seg_2__DEFAULT
+#define R_MMU_KSEG__seg_2__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_KSEG__seg_1__DEFAULT
+#define R_MMU_KSEG__seg_1__DEFAULT page
+#endif
+
+/* page seg */
+#ifndef R_MMU_KSEG__seg_0__DEFAULT
+#define R_MMU_KSEG__seg_0__DEFAULT page
+#endif
+
+/*
+** Default values for register R_NETWORK_GA_0
+*/
+
+/* 0 - 0xffffffff */
+#ifndef R_NETWORK_GA_0__ga_low__DEFAULT
+#define R_NETWORK_GA_0__ga_low__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_NETWORK_GA_1
+*/
+
+/* 0 - 0xffffffff */
+#ifndef R_NETWORK_GA_1__ga_high__DEFAULT
+#define R_NETWORK_GA_1__ga_high__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_NETWORK_GEN_CONFIG
+*/
+
+/* off on */
+#ifndef R_NETWORK_GEN_CONFIG__loopback__DEFAULT
+#define R_NETWORK_GEN_CONFIG__loopback__DEFAULT off
+#endif
+
+/* ether tokenr */
+#ifndef R_NETWORK_GEN_CONFIG__frame__DEFAULT
+#define R_NETWORK_GEN_CONFIG__frame__DEFAULT ether
+#endif
+
+/* off on */
+#ifndef R_NETWORK_GEN_CONFIG__vg__DEFAULT
+#define R_NETWORK_GEN_CONFIG__vg__DEFAULT off
+#endif
+
+/* mii_clk sni mii_req mii_err */
+#ifndef R_NETWORK_GEN_CONFIG__phy__DEFAULT
+#define R_NETWORK_GEN_CONFIG__phy__DEFAULT mii_clk
+#endif
+
+/* off on */
+#ifndef R_NETWORK_GEN_CONFIG__enable__DEFAULT
+#define R_NETWORK_GEN_CONFIG__enable__DEFAULT off
+#endif
+
+/*
+** Default values for register R_NETWORK_MGM_CTRL
+*/
+
+/* 0 - 0xf */
+#ifndef R_NETWORK_MGM_CTRL__txd_pins__DEFAULT
+#define R_NETWORK_MGM_CTRL__txd_pins__DEFAULT 0
+#endif
+
+/* 0 - 0x1 */
+#ifndef R_NETWORK_MGM_CTRL__txer_pin__DEFAULT
+#define R_NETWORK_MGM_CTRL__txer_pin__DEFAULT 0
+#endif
+
+/* 0 - 0x1 */
+#ifndef R_NETWORK_MGM_CTRL__mdck__DEFAULT
+#define R_NETWORK_MGM_CTRL__mdck__DEFAULT 0
+#endif
+
+/* disable enable */
+#ifndef R_NETWORK_MGM_CTRL__mdoe__DEFAULT
+#define R_NETWORK_MGM_CTRL__mdoe__DEFAULT disable
+#endif
+
+/* 0 - 0x1 */
+#ifndef R_NETWORK_MGM_CTRL__mdio__DEFAULT
+#define R_NETWORK_MGM_CTRL__mdio__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_NETWORK_REC_CONFIG
+*/
+
+/* size1518 size1522 */
+#ifndef R_NETWORK_REC_CONFIG__max_size__DEFAULT
+#define R_NETWORK_REC_CONFIG__max_size__DEFAULT size1518
+#endif
+
+/* half full */
+#ifndef R_NETWORK_REC_CONFIG__duplex__DEFAULT
+#define R_NETWORK_REC_CONFIG__duplex__DEFAULT half
+#endif
+
+/* discard receive */
+#ifndef R_NETWORK_REC_CONFIG__bad_crc__DEFAULT
+#define R_NETWORK_REC_CONFIG__bad_crc__DEFAULT discard
+#endif
+
+/* discard receive */
+#ifndef R_NETWORK_REC_CONFIG__oversize__DEFAULT
+#define R_NETWORK_REC_CONFIG__oversize__DEFAULT discard
+#endif
+
+/* discard receive */
+#ifndef R_NETWORK_REC_CONFIG__undersize__DEFAULT
+#define R_NETWORK_REC_CONFIG__undersize__DEFAULT discard
+#endif
+
+/* discard receive */
+#ifndef R_NETWORK_REC_CONFIG__all_roots__DEFAULT
+#define R_NETWORK_REC_CONFIG__all_roots__DEFAULT discard
+#endif
+
+/* discard receive */
+#ifndef R_NETWORK_REC_CONFIG__tr_broadcast__DEFAULT
+#define R_NETWORK_REC_CONFIG__tr_broadcast__DEFAULT discard
+#endif
+
+/* discard receive */
+#ifndef R_NETWORK_REC_CONFIG__broadcast__DEFAULT
+#define R_NETWORK_REC_CONFIG__broadcast__DEFAULT discard
+#endif
+
+/* discard receive */
+#ifndef R_NETWORK_REC_CONFIG__individual__DEFAULT
+#define R_NETWORK_REC_CONFIG__individual__DEFAULT discard
+#endif
+
+/* disable enable */
+#ifndef R_NETWORK_REC_CONFIG__ma1__DEFAULT
+#define R_NETWORK_REC_CONFIG__ma1__DEFAULT disable
+#endif
+
+/* disable enable */
+#ifndef R_NETWORK_REC_CONFIG__ma0__DEFAULT
+#define R_NETWORK_REC_CONFIG__ma0__DEFAULT disable
+#endif
+
+/*
+** Default values for register R_NETWORK_SA_0
+*/
+
+/* 0 - 0xffffffff */
+#ifndef R_NETWORK_SA_0__ma0_low__DEFAULT
+#define R_NETWORK_SA_0__ma0_low__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_NETWORK_SA_1
+*/
+
+/* 0 - 0xffff */
+#ifndef R_NETWORK_SA_1__ma1_low__DEFAULT
+#define R_NETWORK_SA_1__ma1_low__DEFAULT 0
+#endif
+
+/* 0 - 0xffff */
+#ifndef R_NETWORK_SA_1__ma0_high__DEFAULT
+#define R_NETWORK_SA_1__ma0_high__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_NETWORK_SA_2
+*/
+
+/* 0 - 0xffffffff */
+#ifndef R_NETWORK_SA_2__ma1_high__DEFAULT
+#define R_NETWORK_SA_2__ma1_high__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_NETWORK_TR_CTRL
+*/
+
+/* clr nop */
+#ifndef R_NETWORK_TR_CTRL__clr_error__DEFAULT
+#define R_NETWORK_TR_CTRL__clr_error__DEFAULT clr
+#endif
+
+/* none d2us */
+#ifndef R_NETWORK_TR_CTRL__delay__DEFAULT
+#define R_NETWORK_TR_CTRL__delay__DEFAULT none
+#endif
+
+/* do dont */
+#ifndef R_NETWORK_TR_CTRL__cancel__DEFAULT
+#define R_NETWORK_TR_CTRL__cancel__DEFAULT do
+#endif
+
+/* ack_col disable ack_crs enable */
+#ifndef R_NETWORK_TR_CTRL__cd__DEFAULT
+#define R_NETWORK_TR_CTRL__cd__DEFAULT ack_col
+#endif
+
+/* disable enable */
+#ifndef R_NETWORK_TR_CTRL__retry__DEFAULT
+#define R_NETWORK_TR_CTRL__retry__DEFAULT disable
+#endif
+
+/* disable enable */
+#ifndef R_NETWORK_TR_CTRL__pad__DEFAULT
+#define R_NETWORK_TR_CTRL__pad__DEFAULT disable
+#endif
+
+/* disable enable */
+#ifndef R_NETWORK_TR_CTRL__crc__DEFAULT
+#define R_NETWORK_TR_CTRL__crc__DEFAULT disable
+#endif
+
+/*
+** Default values for register R_PAR0_CONFIG
+*/
+
+/* noninv inv */
+#ifndef R_PAR0_CONFIG__ioe__DEFAULT
+#define R_PAR0_CONFIG__ioe__DEFAULT noninv
+#endif
+
+/* noninv inv */
+#ifndef R_PAR0_CONFIG__iseli__DEFAULT
+#define R_PAR0_CONFIG__iseli__DEFAULT noninv
+#endif
+
+/* noninv inv */
+#ifndef R_PAR0_CONFIG__iautofd__DEFAULT
+#define R_PAR0_CONFIG__iautofd__DEFAULT noninv
+#endif
+
+/* noninv inv */
+#ifndef R_PAR0_CONFIG__istrb__DEFAULT
+#define R_PAR0_CONFIG__istrb__DEFAULT noninv
+#endif
+
+/* noninv inv */
+#ifndef R_PAR0_CONFIG__iinit__DEFAULT
+#define R_PAR0_CONFIG__iinit__DEFAULT noninv
+#endif
+
+/* noninv inv */
+#ifndef R_PAR0_CONFIG__iperr__DEFAULT
+#define R_PAR0_CONFIG__iperr__DEFAULT noninv
+#endif
+
+/* noninv inv */
+#ifndef R_PAR0_CONFIG__iack__DEFAULT
+#define R_PAR0_CONFIG__iack__DEFAULT noninv
+#endif
+
+/* noninv inv */
+#ifndef R_PAR0_CONFIG__ibusy__DEFAULT
+#define R_PAR0_CONFIG__ibusy__DEFAULT noninv
+#endif
+
+/* noninv inv */
+#ifndef R_PAR0_CONFIG__ifault__DEFAULT
+#define R_PAR0_CONFIG__ifault__DEFAULT noninv
+#endif
+
+/* noninv inv */
+#ifndef R_PAR0_CONFIG__isel__DEFAULT
+#define R_PAR0_CONFIG__isel__DEFAULT noninv
+#endif
+
+/* disable enable */
+#ifndef R_PAR0_CONFIG__ext_mode__DEFAULT
+#define R_PAR0_CONFIG__ext_mode__DEFAULT disable
+#endif
+
+/* disable enable */
+#ifndef R_PAR0_CONFIG__wide__DEFAULT
+#define R_PAR0_CONFIG__wide__DEFAULT disable
+#endif
+
+/* disable enable */
+#ifndef R_PAR0_CONFIG__dma__DEFAULT
+#define R_PAR0_CONFIG__dma__DEFAULT disable
+#endif
+
+/* disable enable */
+#ifndef R_PAR0_CONFIG__rle_in__DEFAULT
+#define R_PAR0_CONFIG__rle_in__DEFAULT disable
+#endif
+
+/* disable enable */
+#ifndef R_PAR0_CONFIG__rle_out__DEFAULT
+#define R_PAR0_CONFIG__rle_out__DEFAULT disable
+#endif
+
+/* reset on */
+#ifndef R_PAR0_CONFIG__enable__DEFAULT
+#define R_PAR0_CONFIG__enable__DEFAULT reset
+#endif
+
+/* off on */
+#ifndef R_PAR0_CONFIG__force__DEFAULT
+#define R_PAR0_CONFIG__force__DEFAULT off
+#endif
+
+/* ignore wait */
+#ifndef R_PAR0_CONFIG__ign_ack__DEFAULT
+#define R_PAR0_CONFIG__ign_ack__DEFAULT ignore
+#endif
+
+/* wait_oe dont_wait epp_data epp_addr */
+#ifndef R_PAR0_CONFIG__oe_ack__DEFAULT
+#define R_PAR0_CONFIG__oe_ack__DEFAULT wait_oe
+#endif
+
+/* epp_wr3 fastbyte ecp_rev byte centronics ecp_fwd epp_rd off nibble epp_wr1 manual epp_wr2 */
+#ifndef R_PAR0_CONFIG__mode__DEFAULT
+#define R_PAR0_CONFIG__mode__DEFAULT epp_wr3
+#endif
+
+/*
+** Default values for register R_PAR0_CTRL
+*/
+
+/* 0 - 31 */
+#ifndef R_PAR0_CTRL__ctrl__DEFAULT
+#define R_PAR0_CTRL__ctrl__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_PAR0_CTRL_DATA
+*/
+
+/* nop ack */
+#ifndef R_PAR0_CTRL_DATA__peri_int__DEFAULT
+#define R_PAR0_CTRL_DATA__peri_int__DEFAULT nop
+#endif
+
+/* disable enable */
+#ifndef R_PAR0_CTRL_DATA__oe__DEFAULT
+#define R_PAR0_CTRL_DATA__oe__DEFAULT disable
+#endif
+
+/* inactive active */
+#ifndef R_PAR0_CTRL_DATA__seli__DEFAULT
+#define R_PAR0_CTRL_DATA__seli__DEFAULT inactive
+#endif
+
+/* inactive active */
+#ifndef R_PAR0_CTRL_DATA__autofd__DEFAULT
+#define R_PAR0_CTRL_DATA__autofd__DEFAULT inactive
+#endif
+
+/* inactive active */
+#ifndef R_PAR0_CTRL_DATA__strb__DEFAULT
+#define R_PAR0_CTRL_DATA__strb__DEFAULT inactive
+#endif
+
+/* inactive active */
+#ifndef R_PAR0_CTRL_DATA__init__DEFAULT
+#define R_PAR0_CTRL_DATA__init__DEFAULT inactive
+#endif
+
+/* data command */
+#ifndef R_PAR0_CTRL_DATA__ecp_cmd__DEFAULT
+#define R_PAR0_CTRL_DATA__ecp_cmd__DEFAULT data
+#endif
+
+/* 0 - 0xff */
+#ifndef R_PAR0_CTRL_DATA__data__DEFAULT
+#define R_PAR0_CTRL_DATA__data__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_PAR0_DELAY
+*/
+
+/* 0 - 0x7 */
+#ifndef R_PAR0_DELAY__fine_hold__DEFAULT
+#define R_PAR0_DELAY__fine_hold__DEFAULT 0
+#endif
+
+/* 0 - 0x1f */
+#ifndef R_PAR0_DELAY__hold__DEFAULT
+#define R_PAR0_DELAY__hold__DEFAULT 0
+#endif
+
+/* 0 - 0x7 */
+#ifndef R_PAR0_DELAY__fine_strb__DEFAULT
+#define R_PAR0_DELAY__fine_strb__DEFAULT 0
+#endif
+
+/* 0 - 0x1f */
+#ifndef R_PAR0_DELAY__strobe__DEFAULT
+#define R_PAR0_DELAY__strobe__DEFAULT 0
+#endif
+
+/* 0 - 0x7 */
+#ifndef R_PAR0_DELAY__fine_setup__DEFAULT
+#define R_PAR0_DELAY__fine_setup__DEFAULT 0
+#endif
+
+/* 0 - 0x1f */
+#ifndef R_PAR0_DELAY__setup__DEFAULT
+#define R_PAR0_DELAY__setup__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_PAR1_CONFIG
+*/
+
+/* noninv inv */
+#ifndef R_PAR1_CONFIG__ioe__DEFAULT
+#define R_PAR1_CONFIG__ioe__DEFAULT noninv
+#endif
+
+/* noninv inv */
+#ifndef R_PAR1_CONFIG__iseli__DEFAULT
+#define R_PAR1_CONFIG__iseli__DEFAULT noninv
+#endif
+
+/* noninv inv */
+#ifndef R_PAR1_CONFIG__iautofd__DEFAULT
+#define R_PAR1_CONFIG__iautofd__DEFAULT noninv
+#endif
+
+/* noninv inv */
+#ifndef R_PAR1_CONFIG__istrb__DEFAULT
+#define R_PAR1_CONFIG__istrb__DEFAULT noninv
+#endif
+
+/* noninv inv */
+#ifndef R_PAR1_CONFIG__iinit__DEFAULT
+#define R_PAR1_CONFIG__iinit__DEFAULT noninv
+#endif
+
+/* noninv inv */
+#ifndef R_PAR1_CONFIG__iperr__DEFAULT
+#define R_PAR1_CONFIG__iperr__DEFAULT noninv
+#endif
+
+/* noninv inv */
+#ifndef R_PAR1_CONFIG__iack__DEFAULT
+#define R_PAR1_CONFIG__iack__DEFAULT noninv
+#endif
+
+/* noninv inv */
+#ifndef R_PAR1_CONFIG__ibusy__DEFAULT
+#define R_PAR1_CONFIG__ibusy__DEFAULT noninv
+#endif
+
+/* noninv inv */
+#ifndef R_PAR1_CONFIG__ifault__DEFAULT
+#define R_PAR1_CONFIG__ifault__DEFAULT noninv
+#endif
+
+/* noninv inv */
+#ifndef R_PAR1_CONFIG__isel__DEFAULT
+#define R_PAR1_CONFIG__isel__DEFAULT noninv
+#endif
+
+/* disable enable */
+#ifndef R_PAR1_CONFIG__ext_mode__DEFAULT
+#define R_PAR1_CONFIG__ext_mode__DEFAULT disable
+#endif
+
+/* disable enable */
+#ifndef R_PAR1_CONFIG__dma__DEFAULT
+#define R_PAR1_CONFIG__dma__DEFAULT disable
+#endif
+
+/* disable enable */
+#ifndef R_PAR1_CONFIG__rle_in__DEFAULT
+#define R_PAR1_CONFIG__rle_in__DEFAULT disable
+#endif
+
+/* disable enable */
+#ifndef R_PAR1_CONFIG__rle_out__DEFAULT
+#define R_PAR1_CONFIG__rle_out__DEFAULT disable
+#endif
+
+/* reset on */
+#ifndef R_PAR1_CONFIG__enable__DEFAULT
+#define R_PAR1_CONFIG__enable__DEFAULT reset
+#endif
+
+/* off on */
+#ifndef R_PAR1_CONFIG__force__DEFAULT
+#define R_PAR1_CONFIG__force__DEFAULT off
+#endif
+
+/* ignore wait */
+#ifndef R_PAR1_CONFIG__ign_ack__DEFAULT
+#define R_PAR1_CONFIG__ign_ack__DEFAULT ignore
+#endif
+
+/* wait_oe dont_wait epp_data epp_addr */
+#ifndef R_PAR1_CONFIG__oe_ack__DEFAULT
+#define R_PAR1_CONFIG__oe_ack__DEFAULT wait_oe
+#endif
+
+/* epp_wr3 fastbyte ecp_rev byte centronics ecp_fwd epp_rd off nibble epp_wr1 manual epp_wr2 */
+#ifndef R_PAR1_CONFIG__mode__DEFAULT
+#define R_PAR1_CONFIG__mode__DEFAULT epp_wr3
+#endif
+
+/*
+** Default values for register R_PAR1_CTRL
+*/
+
+/* 0 - 31 */
+#ifndef R_PAR1_CTRL__ctrl__DEFAULT
+#define R_PAR1_CTRL__ctrl__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_PAR1_CTRL_DATA
+*/
+
+/* nop ack */
+#ifndef R_PAR1_CTRL_DATA__peri_int__DEFAULT
+#define R_PAR1_CTRL_DATA__peri_int__DEFAULT nop
+#endif
+
+/* disable enable */
+#ifndef R_PAR1_CTRL_DATA__oe__DEFAULT
+#define R_PAR1_CTRL_DATA__oe__DEFAULT disable
+#endif
+
+/* inactive active */
+#ifndef R_PAR1_CTRL_DATA__seli__DEFAULT
+#define R_PAR1_CTRL_DATA__seli__DEFAULT inactive
+#endif
+
+/* inactive active */
+#ifndef R_PAR1_CTRL_DATA__autofd__DEFAULT
+#define R_PAR1_CTRL_DATA__autofd__DEFAULT inactive
+#endif
+
+/* inactive active */
+#ifndef R_PAR1_CTRL_DATA__strb__DEFAULT
+#define R_PAR1_CTRL_DATA__strb__DEFAULT inactive
+#endif
+
+/* inactive active */
+#ifndef R_PAR1_CTRL_DATA__init__DEFAULT
+#define R_PAR1_CTRL_DATA__init__DEFAULT inactive
+#endif
+
+/* data command */
+#ifndef R_PAR1_CTRL_DATA__ecp_cmd__DEFAULT
+#define R_PAR1_CTRL_DATA__ecp_cmd__DEFAULT data
+#endif
+
+/* 0 - 0xff */
+#ifndef R_PAR1_CTRL_DATA__data__DEFAULT
+#define R_PAR1_CTRL_DATA__data__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_PAR1_DELAY
+*/
+
+/* 0 - 0x7 */
+#ifndef R_PAR1_DELAY__fine_hold__DEFAULT
+#define R_PAR1_DELAY__fine_hold__DEFAULT 0
+#endif
+
+/* 0 - 0x1f */
+#ifndef R_PAR1_DELAY__hold__DEFAULT
+#define R_PAR1_DELAY__hold__DEFAULT 0
+#endif
+
+/* 0 - 0x7 */
+#ifndef R_PAR1_DELAY__fine_strb__DEFAULT
+#define R_PAR1_DELAY__fine_strb__DEFAULT 0
+#endif
+
+/* 0 - 0x1f */
+#ifndef R_PAR1_DELAY__strobe__DEFAULT
+#define R_PAR1_DELAY__strobe__DEFAULT 0
+#endif
+
+/* 0 - 0x7 */
+#ifndef R_PAR1_DELAY__fine_setup__DEFAULT
+#define R_PAR1_DELAY__fine_setup__DEFAULT 0
+#endif
+
+/* 0 - 0x1f */
+#ifndef R_PAR1_DELAY__setup__DEFAULT
+#define R_PAR1_DELAY__setup__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_PORT_PA_DATA
+*/
+
+/* 0 - 255 */
+#ifndef R_PORT_PA_DATA__data_out__DEFAULT
+#define R_PORT_PA_DATA__data_out__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_PORT_PA_DIR
+*/
+
+/* input output */
+#ifndef R_PORT_PA_DIR__dir7__DEFAULT
+#define R_PORT_PA_DIR__dir7__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PA_DIR__dir6__DEFAULT
+#define R_PORT_PA_DIR__dir6__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PA_DIR__dir5__DEFAULT
+#define R_PORT_PA_DIR__dir5__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PA_DIR__dir4__DEFAULT
+#define R_PORT_PA_DIR__dir4__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PA_DIR__dir3__DEFAULT
+#define R_PORT_PA_DIR__dir3__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PA_DIR__dir2__DEFAULT
+#define R_PORT_PA_DIR__dir2__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PA_DIR__dir1__DEFAULT
+#define R_PORT_PA_DIR__dir1__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PA_DIR__dir0__DEFAULT
+#define R_PORT_PA_DIR__dir0__DEFAULT input
+#endif
+
+/*
+** Default values for register R_PORT_PA_SET
+*/
+
+/* input output */
+#ifndef R_PORT_PA_SET__dir7__DEFAULT
+#define R_PORT_PA_SET__dir7__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PA_SET__dir6__DEFAULT
+#define R_PORT_PA_SET__dir6__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PA_SET__dir5__DEFAULT
+#define R_PORT_PA_SET__dir5__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PA_SET__dir4__DEFAULT
+#define R_PORT_PA_SET__dir4__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PA_SET__dir3__DEFAULT
+#define R_PORT_PA_SET__dir3__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PA_SET__dir2__DEFAULT
+#define R_PORT_PA_SET__dir2__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PA_SET__dir1__DEFAULT
+#define R_PORT_PA_SET__dir1__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PA_SET__dir0__DEFAULT
+#define R_PORT_PA_SET__dir0__DEFAULT input
+#endif
+
+/* 0 - 255 */
+#ifndef R_PORT_PA_SET__data_out__DEFAULT
+#define R_PORT_PA_SET__data_out__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_PORT_PB_CONFIG
+*/
+
+/* port cs */
+#ifndef R_PORT_PB_CONFIG__cs7__DEFAULT
+#define R_PORT_PB_CONFIG__cs7__DEFAULT port
+#endif
+
+/* port cs */
+#ifndef R_PORT_PB_CONFIG__cs6__DEFAULT
+#define R_PORT_PB_CONFIG__cs6__DEFAULT port
+#endif
+
+/* port cs */
+#ifndef R_PORT_PB_CONFIG__cs5__DEFAULT
+#define R_PORT_PB_CONFIG__cs5__DEFAULT port
+#endif
+
+/* port cs */
+#ifndef R_PORT_PB_CONFIG__cs4__DEFAULT
+#define R_PORT_PB_CONFIG__cs4__DEFAULT port
+#endif
+
+/* port cs */
+#ifndef R_PORT_PB_CONFIG__cs3__DEFAULT
+#define R_PORT_PB_CONFIG__cs3__DEFAULT port
+#endif
+
+/* port cs */
+#ifndef R_PORT_PB_CONFIG__cs2__DEFAULT
+#define R_PORT_PB_CONFIG__cs2__DEFAULT port
+#endif
+
+/* port_cs enph */
+#ifndef R_PORT_PB_CONFIG__scsi1__DEFAULT
+#define R_PORT_PB_CONFIG__scsi1__DEFAULT port_cs
+#endif
+
+/* port_cs enph */
+#ifndef R_PORT_PB_CONFIG__scsi0__DEFAULT
+#define R_PORT_PB_CONFIG__scsi0__DEFAULT port_cs
+#endif
+
+/*
+** Default values for register R_PORT_PB_DATA
+*/
+
+/* 0 - 255 */
+#ifndef R_PORT_PB_DATA__data_out__DEFAULT
+#define R_PORT_PB_DATA__data_out__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_PORT_PB_DIR
+*/
+
+/* input output */
+#ifndef R_PORT_PB_DIR__dir7__DEFAULT
+#define R_PORT_PB_DIR__dir7__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PB_DIR__dir6__DEFAULT
+#define R_PORT_PB_DIR__dir6__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PB_DIR__dir5__DEFAULT
+#define R_PORT_PB_DIR__dir5__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PB_DIR__dir4__DEFAULT
+#define R_PORT_PB_DIR__dir4__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PB_DIR__dir3__DEFAULT
+#define R_PORT_PB_DIR__dir3__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PB_DIR__dir2__DEFAULT
+#define R_PORT_PB_DIR__dir2__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PB_DIR__dir1__DEFAULT
+#define R_PORT_PB_DIR__dir1__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PB_DIR__dir0__DEFAULT
+#define R_PORT_PB_DIR__dir0__DEFAULT input
+#endif
+
+/*
+** Default values for register R_PORT_PB_I2C
+*/
+
+/* port_cs ss3extra */
+#ifndef R_PORT_PB_I2C__syncser3__DEFAULT
+#define R_PORT_PB_I2C__syncser3__DEFAULT port_cs
+#endif
+
+/* port_cs ss1extra */
+#ifndef R_PORT_PB_I2C__syncser1__DEFAULT
+#define R_PORT_PB_I2C__syncser1__DEFAULT port_cs
+#endif
+
+/* off on */
+#ifndef R_PORT_PB_I2C__i2c_en__DEFAULT
+#define R_PORT_PB_I2C__i2c_en__DEFAULT off
+#endif
+
+/* 0 - 1 */
+#ifndef R_PORT_PB_I2C__i2c_d__DEFAULT
+#define R_PORT_PB_I2C__i2c_d__DEFAULT 0
+#endif
+
+/* 0 - 1 */
+#ifndef R_PORT_PB_I2C__i2c_clk__DEFAULT
+#define R_PORT_PB_I2C__i2c_clk__DEFAULT 0
+#endif
+
+/* disable enable */
+#ifndef R_PORT_PB_I2C__i2c_oe___DEFAULT
+#define R_PORT_PB_I2C__i2c_oe___DEFAULT disable
+#endif
+
+/*
+** Default values for register R_PORT_PB_SET
+*/
+
+/* port_cs ss3extra */
+#ifndef R_PORT_PB_SET__syncser3__DEFAULT
+#define R_PORT_PB_SET__syncser3__DEFAULT port_cs
+#endif
+
+/* port_cs ss1extra */
+#ifndef R_PORT_PB_SET__syncser1__DEFAULT
+#define R_PORT_PB_SET__syncser1__DEFAULT port_cs
+#endif
+
+/* off on */
+#ifndef R_PORT_PB_SET__i2c_en__DEFAULT
+#define R_PORT_PB_SET__i2c_en__DEFAULT off
+#endif
+
+/* 0 - 1 */
+#ifndef R_PORT_PB_SET__i2c_d__DEFAULT
+#define R_PORT_PB_SET__i2c_d__DEFAULT 0
+#endif
+
+/* 0 - 1 */
+#ifndef R_PORT_PB_SET__i2c_clk__DEFAULT
+#define R_PORT_PB_SET__i2c_clk__DEFAULT 0
+#endif
+
+/* disable enable */
+#ifndef R_PORT_PB_SET__i2c_oe___DEFAULT
+#define R_PORT_PB_SET__i2c_oe___DEFAULT disable
+#endif
+
+/* port cs */
+#ifndef R_PORT_PB_SET__cs7__DEFAULT
+#define R_PORT_PB_SET__cs7__DEFAULT port
+#endif
+
+/* port cs */
+#ifndef R_PORT_PB_SET__cs6__DEFAULT
+#define R_PORT_PB_SET__cs6__DEFAULT port
+#endif
+
+/* port cs */
+#ifndef R_PORT_PB_SET__cs5__DEFAULT
+#define R_PORT_PB_SET__cs5__DEFAULT port
+#endif
+
+/* port cs */
+#ifndef R_PORT_PB_SET__cs4__DEFAULT
+#define R_PORT_PB_SET__cs4__DEFAULT port
+#endif
+
+/* port cs */
+#ifndef R_PORT_PB_SET__cs3__DEFAULT
+#define R_PORT_PB_SET__cs3__DEFAULT port
+#endif
+
+/* port cs */
+#ifndef R_PORT_PB_SET__cs2__DEFAULT
+#define R_PORT_PB_SET__cs2__DEFAULT port
+#endif
+
+/* port_cs enph */
+#ifndef R_PORT_PB_SET__scsi1__DEFAULT
+#define R_PORT_PB_SET__scsi1__DEFAULT port_cs
+#endif
+
+/* port_cs enph */
+#ifndef R_PORT_PB_SET__scsi0__DEFAULT
+#define R_PORT_PB_SET__scsi0__DEFAULT port_cs
+#endif
+
+/* input output */
+#ifndef R_PORT_PB_SET__dir7__DEFAULT
+#define R_PORT_PB_SET__dir7__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PB_SET__dir6__DEFAULT
+#define R_PORT_PB_SET__dir6__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PB_SET__dir5__DEFAULT
+#define R_PORT_PB_SET__dir5__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PB_SET__dir4__DEFAULT
+#define R_PORT_PB_SET__dir4__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PB_SET__dir3__DEFAULT
+#define R_PORT_PB_SET__dir3__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PB_SET__dir2__DEFAULT
+#define R_PORT_PB_SET__dir2__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PB_SET__dir1__DEFAULT
+#define R_PORT_PB_SET__dir1__DEFAULT input
+#endif
+
+/* input output */
+#ifndef R_PORT_PB_SET__dir0__DEFAULT
+#define R_PORT_PB_SET__dir0__DEFAULT input
+#endif
+
+/* 0 - 255 */
+#ifndef R_PORT_PB_SET__data_out__DEFAULT
+#define R_PORT_PB_SET__data_out__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SCSI0_CMD
+*/
+
+/* 0 - 0xf */
+#ifndef R_SCSI0_CMD__asynch_setup__DEFAULT
+#define R_SCSI0_CMD__asynch_setup__DEFAULT 0
+#endif
+
+/* full_stat_3 full_dout_3 man_rat resel_din arb_only resel_stat resel_dout man_data_in man_data_out full_din_1 full_dout_1 full_stat_1 full_din_3 */
+#ifndef R_SCSI0_CMD__command__DEFAULT
+#define R_SCSI0_CMD__command__DEFAULT full_stat_3
+#endif
+
+/*
+** Default values for register R_SCSI0_CMD_DATA
+*/
+
+/* off on */
+#ifndef R_SCSI0_CMD_DATA__parity_in__DEFAULT
+#define R_SCSI0_CMD_DATA__parity_in__DEFAULT off
+#endif
+
+/* off on */
+#ifndef R_SCSI0_CMD_DATA__skip__DEFAULT
+#define R_SCSI0_CMD_DATA__skip__DEFAULT off
+#endif
+
+/* yes nop */
+#ifndef R_SCSI0_CMD_DATA__clr_status__DEFAULT
+#define R_SCSI0_CMD_DATA__clr_status__DEFAULT yes
+#endif
+
+/* 0 - 0xf */
+#ifndef R_SCSI0_CMD_DATA__asynch_setup__DEFAULT
+#define R_SCSI0_CMD_DATA__asynch_setup__DEFAULT 0
+#endif
+
+/* full_stat_3 full_dout_3 man_rat resel_din arb_only resel_stat resel_dout man_data_in man_data_out full_din_1 full_dout_1 full_stat_1 full_din_3 */
+#ifndef R_SCSI0_CMD_DATA__command__DEFAULT
+#define R_SCSI0_CMD_DATA__command__DEFAULT full_stat_3
+#endif
+
+/* 0 - 0xffff */
+#ifndef R_SCSI0_CMD_DATA__data_out__DEFAULT
+#define R_SCSI0_CMD_DATA__data_out__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SCSI0_CTRL
+*/
+
+/* software hardware */
+#ifndef R_SCSI0_CTRL__id_type__DEFAULT
+#define R_SCSI0_CTRL__id_type__DEFAULT software
+#endif
+
+/* 0 - 0x7f */
+#ifndef R_SCSI0_CTRL__sel_timeout__DEFAULT
+#define R_SCSI0_CTRL__sel_timeout__DEFAULT 0
+#endif
+
+/* 0 - 0xff */
+#ifndef R_SCSI0_CTRL__synch_per__DEFAULT
+#define R_SCSI0_CTRL__synch_per__DEFAULT 0
+#endif
+
+/* yes no */
+#ifndef R_SCSI0_CTRL__rst__DEFAULT
+#define R_SCSI0_CTRL__rst__DEFAULT yes
+#endif
+
+/* yes no */
+#ifndef R_SCSI0_CTRL__atn__DEFAULT
+#define R_SCSI0_CTRL__atn__DEFAULT yes
+#endif
+
+/* 0 - 0xf */
+#ifndef R_SCSI0_CTRL__my_id__DEFAULT
+#define R_SCSI0_CTRL__my_id__DEFAULT 0
+#endif
+
+/* 0 - 0xf */
+#ifndef R_SCSI0_CTRL__target_id__DEFAULT
+#define R_SCSI0_CTRL__target_id__DEFAULT 0
+#endif
+
+/* yes no */
+#ifndef R_SCSI0_CTRL__fast_20__DEFAULT
+#define R_SCSI0_CTRL__fast_20__DEFAULT yes
+#endif
+
+/* narrow wide */
+#ifndef R_SCSI0_CTRL__bus_width__DEFAULT
+#define R_SCSI0_CTRL__bus_width__DEFAULT narrow
+#endif
+
+/* synch asynch */
+#ifndef R_SCSI0_CTRL__synch__DEFAULT
+#define R_SCSI0_CTRL__synch__DEFAULT synch
+#endif
+
+/* off on */
+#ifndef R_SCSI0_CTRL__enable__DEFAULT
+#define R_SCSI0_CTRL__enable__DEFAULT off
+#endif
+
+/*
+** Default values for register R_SCSI0_DATA
+*/
+
+/* 0 - 0xffff */
+#ifndef R_SCSI0_DATA__data_out__DEFAULT
+#define R_SCSI0_DATA__data_out__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SCSI0_STATUS_CTRL
+*/
+
+/* off on */
+#ifndef R_SCSI0_STATUS_CTRL__parity_in__DEFAULT
+#define R_SCSI0_STATUS_CTRL__parity_in__DEFAULT off
+#endif
+
+/* off on */
+#ifndef R_SCSI0_STATUS_CTRL__skip__DEFAULT
+#define R_SCSI0_STATUS_CTRL__skip__DEFAULT off
+#endif
+
+/* yes nop */
+#ifndef R_SCSI0_STATUS_CTRL__clr_status__DEFAULT
+#define R_SCSI0_STATUS_CTRL__clr_status__DEFAULT yes
+#endif
+
+/*
+** Default values for register R_SCSI1_CMD
+*/
+
+/* 0 - 0xf */
+#ifndef R_SCSI1_CMD__asynch_setup__DEFAULT
+#define R_SCSI1_CMD__asynch_setup__DEFAULT 0
+#endif
+
+/* full_stat_3 full_dout_3 man_rat resel_din arb_only resel_stat resel_dout man_data_in man_data_out full_din_1 full_dout_1 full_stat_1 full_din_3 */
+#ifndef R_SCSI1_CMD__command__DEFAULT
+#define R_SCSI1_CMD__command__DEFAULT full_stat_3
+#endif
+
+/*
+** Default values for register R_SCSI1_CMD_DATA
+*/
+
+/* off on */
+#ifndef R_SCSI1_CMD_DATA__parity_in__DEFAULT
+#define R_SCSI1_CMD_DATA__parity_in__DEFAULT off
+#endif
+
+/* off on */
+#ifndef R_SCSI1_CMD_DATA__skip__DEFAULT
+#define R_SCSI1_CMD_DATA__skip__DEFAULT off
+#endif
+
+/* yes nop */
+#ifndef R_SCSI1_CMD_DATA__clr_status__DEFAULT
+#define R_SCSI1_CMD_DATA__clr_status__DEFAULT yes
+#endif
+
+/* 0 - 0xf */
+#ifndef R_SCSI1_CMD_DATA__asynch_setup__DEFAULT
+#define R_SCSI1_CMD_DATA__asynch_setup__DEFAULT 0
+#endif
+
+/* full_stat_3 full_dout_3 man_rat resel_din arb_only resel_stat resel_dout man_data_in man_data_out full_din_1 full_dout_1 full_stat_1 full_din_3 */
+#ifndef R_SCSI1_CMD_DATA__command__DEFAULT
+#define R_SCSI1_CMD_DATA__command__DEFAULT full_stat_3
+#endif
+
+/* 0 - 0xffff */
+#ifndef R_SCSI1_CMD_DATA__data_out__DEFAULT
+#define R_SCSI1_CMD_DATA__data_out__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SCSI1_CTRL
+*/
+
+/* software hardware */
+#ifndef R_SCSI1_CTRL__id_type__DEFAULT
+#define R_SCSI1_CTRL__id_type__DEFAULT software
+#endif
+
+/* 0 - 0x7f */
+#ifndef R_SCSI1_CTRL__sel_timeout__DEFAULT
+#define R_SCSI1_CTRL__sel_timeout__DEFAULT 0
+#endif
+
+/* 0 - 0xff */
+#ifndef R_SCSI1_CTRL__synch_per__DEFAULT
+#define R_SCSI1_CTRL__synch_per__DEFAULT 0
+#endif
+
+/* yes no */
+#ifndef R_SCSI1_CTRL__rst__DEFAULT
+#define R_SCSI1_CTRL__rst__DEFAULT yes
+#endif
+
+/* yes no */
+#ifndef R_SCSI1_CTRL__atn__DEFAULT
+#define R_SCSI1_CTRL__atn__DEFAULT yes
+#endif
+
+/* 0 - 0xf */
+#ifndef R_SCSI1_CTRL__my_id__DEFAULT
+#define R_SCSI1_CTRL__my_id__DEFAULT 0
+#endif
+
+/* 0 - 0xf */
+#ifndef R_SCSI1_CTRL__target_id__DEFAULT
+#define R_SCSI1_CTRL__target_id__DEFAULT 0
+#endif
+
+/* yes no */
+#ifndef R_SCSI1_CTRL__fast_20__DEFAULT
+#define R_SCSI1_CTRL__fast_20__DEFAULT yes
+#endif
+
+/* narrow wide */
+#ifndef R_SCSI1_CTRL__bus_width__DEFAULT
+#define R_SCSI1_CTRL__bus_width__DEFAULT narrow
+#endif
+
+/* synch asynch */
+#ifndef R_SCSI1_CTRL__synch__DEFAULT
+#define R_SCSI1_CTRL__synch__DEFAULT synch
+#endif
+
+/* off on */
+#ifndef R_SCSI1_CTRL__enable__DEFAULT
+#define R_SCSI1_CTRL__enable__DEFAULT off
+#endif
+
+/*
+** Default values for register R_SCSI1_DATA
+*/
+
+/* 0 - 0xffff */
+#ifndef R_SCSI1_DATA__data_out__DEFAULT
+#define R_SCSI1_DATA__data_out__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SCSI1_STATUS_CTRL
+*/
+
+/* off on */
+#ifndef R_SCSI1_STATUS_CTRL__parity_in__DEFAULT
+#define R_SCSI1_STATUS_CTRL__parity_in__DEFAULT off
+#endif
+
+/* off on */
+#ifndef R_SCSI1_STATUS_CTRL__skip__DEFAULT
+#define R_SCSI1_STATUS_CTRL__skip__DEFAULT off
+#endif
+
+/* yes nop */
+#ifndef R_SCSI1_STATUS_CTRL__clr_status__DEFAULT
+#define R_SCSI1_STATUS_CTRL__clr_status__DEFAULT yes
+#endif
+
+/*
+** Default values for register R_SDRAM_CONFIG
+*/
+
+/* wmm norm */
+#ifndef R_SDRAM_CONFIG__wmm1__DEFAULT
+#define R_SDRAM_CONFIG__wmm1__DEFAULT wmm
+#endif
+
+/* wmm norm */
+#ifndef R_SDRAM_CONFIG__wmm0__DEFAULT
+#define R_SDRAM_CONFIG__wmm0__DEFAULT wmm
+#endif
+
+/* 0 - 7 */
+#ifndef R_SDRAM_CONFIG__sh1__DEFAULT
+#define R_SDRAM_CONFIG__sh1__DEFAULT 0
+#endif
+
+/* 0 - 7 */
+#ifndef R_SDRAM_CONFIG__sh0__DEFAULT
+#define R_SDRAM_CONFIG__sh0__DEFAULT 0
+#endif
+
+/* bw16 bw32 */
+#ifndef R_SDRAM_CONFIG__w__DEFAULT
+#define R_SDRAM_CONFIG__w__DEFAULT bw16
+#endif
+
+/* bank4 bank2 */
+#ifndef R_SDRAM_CONFIG__type1__DEFAULT
+#define R_SDRAM_CONFIG__type1__DEFAULT bank4
+#endif
+
+/* bank4 bank2 */
+#ifndef R_SDRAM_CONFIG__type0__DEFAULT
+#define R_SDRAM_CONFIG__type0__DEFAULT bank4
+#endif
+
+/* bit10 bit20 bit11 bit21 bit12 bit22 bit13 bit23 bit14 bit24 bit15 bit25 bit16 bit26 bit17 bit27 bit18 bit9 bit28 bit19 grp0 bit29 grp1 */
+#ifndef R_SDRAM_CONFIG__group_sel__DEFAULT
+#define R_SDRAM_CONFIG__group_sel__DEFAULT bit10
+#endif
+
+/* 0 - 7 */
+#ifndef R_SDRAM_CONFIG__ca1__DEFAULT
+#define R_SDRAM_CONFIG__ca1__DEFAULT 0
+#endif
+
+/* bit10 bit20 bit11 bit21 bit12 bit22 bit13 bit23 bit14 bit24 bit15 bit25 bit16 bit26 bit17 bit27 bit18 bit28 bit19 bit29 bit9 */
+#ifndef R_SDRAM_CONFIG__bank_sel1__DEFAULT
+#define R_SDRAM_CONFIG__bank_sel1__DEFAULT bit10
+#endif
+
+/* 0 - 7 */
+#ifndef R_SDRAM_CONFIG__ca0__DEFAULT
+#define R_SDRAM_CONFIG__ca0__DEFAULT 0
+#endif
+
+/* bit10 bit20 bit11 bit21 bit12 bit22 bit13 bit23 bit14 bit24 bit15 bit25 bit16 bit26 bit17 bit27 bit18 bit28 bit19 bit29 bit9 */
+#ifndef R_SDRAM_CONFIG__bank_sel0__DEFAULT
+#define R_SDRAM_CONFIG__bank_sel0__DEFAULT bit10
+#endif
+
+/*
+** Default values for register R_SDRAM_TIMING
+*/
+
+/* disable enable */
+#ifndef R_SDRAM_TIMING__sdram__DEFAULT
+#define R_SDRAM_TIMING__sdram__DEFAULT disable
+#endif
+
+/* 0 - 0x7fff */
+#ifndef R_SDRAM_TIMING__mrs_data__DEFAULT
+#define R_SDRAM_TIMING__mrs_data__DEFAULT 0
+#endif
+
+/* e6500ns e13us disable e52us */
+#ifndef R_SDRAM_TIMING__ref__DEFAULT
+#define R_SDRAM_TIMING__ref__DEFAULT e6500ns
+#endif
+
+/* off on */
+#ifndef R_SDRAM_TIMING__ddr__DEFAULT
+#define R_SDRAM_TIMING__ddr__DEFAULT off
+#endif
+
+/* off on */
+#ifndef R_SDRAM_TIMING__clk100__DEFAULT
+#define R_SDRAM_TIMING__clk100__DEFAULT off
+#endif
+
+/* off on */
+#ifndef R_SDRAM_TIMING__ps__DEFAULT
+#define R_SDRAM_TIMING__ps__DEFAULT off
+#endif
+
+/* mrs nop ref pre */
+#ifndef R_SDRAM_TIMING__cmd__DEFAULT
+#define R_SDRAM_TIMING__cmd__DEFAULT mrs
+#endif
+
+/* 0 - 1 */
+#ifndef R_SDRAM_TIMING__pde__DEFAULT
+#define R_SDRAM_TIMING__pde__DEFAULT 0
+#endif
+
+/* 0 - 3 */
+#ifndef R_SDRAM_TIMING__rc__DEFAULT
+#define R_SDRAM_TIMING__rc__DEFAULT 0
+#endif
+
+/* 0 - 3 */
+#ifndef R_SDRAM_TIMING__rp__DEFAULT
+#define R_SDRAM_TIMING__rp__DEFAULT 0
+#endif
+
+/* 0 - 3 */
+#ifndef R_SDRAM_TIMING__rcd__DEFAULT
+#define R_SDRAM_TIMING__rcd__DEFAULT 0
+#endif
+
+/* 0 - 2 */
+#ifndef R_SDRAM_TIMING__cl__DEFAULT
+#define R_SDRAM_TIMING__cl__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SERIAL0_BAUD
+*/
+
+/* c4800Hz c1843k2Hz c921k6Hz c460k8Hz c57k6Hz c9600Hz c300Hz c1200Hz c230k4Hz c115k2Hz c600Hz c2400Hz c19k2Hz c6250kHz c38k4Hz */
+#ifndef R_SERIAL0_BAUD__tr_baud__DEFAULT
+#define R_SERIAL0_BAUD__tr_baud__DEFAULT c4800Hz
+#endif
+
+/* c4800Hz c1843k2Hz c921k6Hz c460k8Hz c57k6Hz c9600Hz c300Hz c1200Hz c230k4Hz c115k2Hz c600Hz c2400Hz c19k2Hz c6250kHz c38k4Hz */
+#ifndef R_SERIAL0_BAUD__rec_baud__DEFAULT
+#define R_SERIAL0_BAUD__rec_baud__DEFAULT c4800Hz
+#endif
+
+/*
+** Default values for register R_SERIAL0_CTRL
+*/
+
+/* c4800Hz c1843k2Hz c921k6Hz c460k8Hz c57k6Hz c9600Hz c300Hz c1200Hz c230k4Hz c115k2Hz c600Hz c2400Hz c19k2Hz c6250kHz c38k4Hz */
+#ifndef R_SERIAL0_CTRL__tr_baud__DEFAULT
+#define R_SERIAL0_CTRL__tr_baud__DEFAULT c4800Hz
+#endif
+
+/* c4800Hz c1843k2Hz c921k6Hz c460k8Hz c57k6Hz c9600Hz c300Hz c1200Hz c230k4Hz c115k2Hz c600Hz c2400Hz c19k2Hz c6250kHz c38k4Hz */
+#ifndef R_SERIAL0_CTRL__rec_baud__DEFAULT
+#define R_SERIAL0_CTRL__rec_baud__DEFAULT c4800Hz
+#endif
+
+/* ignore stop */
+#ifndef R_SERIAL0_CTRL__dma_err__DEFAULT
+#define R_SERIAL0_CTRL__dma_err__DEFAULT ignore
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL0_CTRL__rec_enable__DEFAULT
+#define R_SERIAL0_CTRL__rec_enable__DEFAULT disable
+#endif
+
+/* inactive active */
+#ifndef R_SERIAL0_CTRL__rts___DEFAULT
+#define R_SERIAL0_CTRL__rts___DEFAULT inactive
+#endif
+
+/* majority middle */
+#ifndef R_SERIAL0_CTRL__sampling__DEFAULT
+#define R_SERIAL0_CTRL__sampling__DEFAULT majority
+#endif
+
+/* normal stick */
+#ifndef R_SERIAL0_CTRL__rec_stick_par__DEFAULT
+#define R_SERIAL0_CTRL__rec_stick_par__DEFAULT normal
+#endif
+
+/* even odd */
+#ifndef R_SERIAL0_CTRL__rec_par__DEFAULT
+#define R_SERIAL0_CTRL__rec_par__DEFAULT even
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL0_CTRL__rec_par_en__DEFAULT
+#define R_SERIAL0_CTRL__rec_par_en__DEFAULT disable
+#endif
+
+/* rec_8bit rec_7bit */
+#ifndef R_SERIAL0_CTRL__rec_bitnr__DEFAULT
+#define R_SERIAL0_CTRL__rec_bitnr__DEFAULT rec_8bit
+#endif
+
+/* 0 - 0x1 */
+#ifndef R_SERIAL0_CTRL__txd__DEFAULT
+#define R_SERIAL0_CTRL__txd__DEFAULT 0
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL0_CTRL__tr_enable__DEFAULT
+#define R_SERIAL0_CTRL__tr_enable__DEFAULT disable
+#endif
+
+/* disabled active */
+#ifndef R_SERIAL0_CTRL__auto_cts__DEFAULT
+#define R_SERIAL0_CTRL__auto_cts__DEFAULT disabled
+#endif
+
+/* one_bit two_bits */
+#ifndef R_SERIAL0_CTRL__stop_bits__DEFAULT
+#define R_SERIAL0_CTRL__stop_bits__DEFAULT one_bit
+#endif
+
+/* normal stick */
+#ifndef R_SERIAL0_CTRL__tr_stick_par__DEFAULT
+#define R_SERIAL0_CTRL__tr_stick_par__DEFAULT normal
+#endif
+
+/* even odd */
+#ifndef R_SERIAL0_CTRL__tr_par__DEFAULT
+#define R_SERIAL0_CTRL__tr_par__DEFAULT even
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL0_CTRL__tr_par_en__DEFAULT
+#define R_SERIAL0_CTRL__tr_par_en__DEFAULT disable
+#endif
+
+/* tr_7bit tr_8bit */
+#ifndef R_SERIAL0_CTRL__tr_bitnr__DEFAULT
+#define R_SERIAL0_CTRL__tr_bitnr__DEFAULT tr_7bit
+#endif
+
+/* 0 - 0xff */
+#ifndef R_SERIAL0_CTRL__data_out__DEFAULT
+#define R_SERIAL0_CTRL__data_out__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SERIAL0_REC_CTRL
+*/
+
+/* ignore stop */
+#ifndef R_SERIAL0_REC_CTRL__dma_err__DEFAULT
+#define R_SERIAL0_REC_CTRL__dma_err__DEFAULT ignore
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL0_REC_CTRL__rec_enable__DEFAULT
+#define R_SERIAL0_REC_CTRL__rec_enable__DEFAULT disable
+#endif
+
+/* inactive active */
+#ifndef R_SERIAL0_REC_CTRL__rts___DEFAULT
+#define R_SERIAL0_REC_CTRL__rts___DEFAULT inactive
+#endif
+
+/* majority middle */
+#ifndef R_SERIAL0_REC_CTRL__sampling__DEFAULT
+#define R_SERIAL0_REC_CTRL__sampling__DEFAULT majority
+#endif
+
+/* normal stick */
+#ifndef R_SERIAL0_REC_CTRL__rec_stick_par__DEFAULT
+#define R_SERIAL0_REC_CTRL__rec_stick_par__DEFAULT normal
+#endif
+
+/* even odd */
+#ifndef R_SERIAL0_REC_CTRL__rec_par__DEFAULT
+#define R_SERIAL0_REC_CTRL__rec_par__DEFAULT even
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL0_REC_CTRL__rec_par_en__DEFAULT
+#define R_SERIAL0_REC_CTRL__rec_par_en__DEFAULT disable
+#endif
+
+/* rec_8bit rec_7bit */
+#ifndef R_SERIAL0_REC_CTRL__rec_bitnr__DEFAULT
+#define R_SERIAL0_REC_CTRL__rec_bitnr__DEFAULT rec_8bit
+#endif
+
+/*
+** Default values for register R_SERIAL0_TR_CTRL
+*/
+
+/* 0 - 0x1 */
+#ifndef R_SERIAL0_TR_CTRL__txd__DEFAULT
+#define R_SERIAL0_TR_CTRL__txd__DEFAULT 0
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL0_TR_CTRL__tr_enable__DEFAULT
+#define R_SERIAL0_TR_CTRL__tr_enable__DEFAULT disable
+#endif
+
+/* disabled active */
+#ifndef R_SERIAL0_TR_CTRL__auto_cts__DEFAULT
+#define R_SERIAL0_TR_CTRL__auto_cts__DEFAULT disabled
+#endif
+
+/* one_bit two_bits */
+#ifndef R_SERIAL0_TR_CTRL__stop_bits__DEFAULT
+#define R_SERIAL0_TR_CTRL__stop_bits__DEFAULT one_bit
+#endif
+
+/* normal stick */
+#ifndef R_SERIAL0_TR_CTRL__tr_stick_par__DEFAULT
+#define R_SERIAL0_TR_CTRL__tr_stick_par__DEFAULT normal
+#endif
+
+/* even odd */
+#ifndef R_SERIAL0_TR_CTRL__tr_par__DEFAULT
+#define R_SERIAL0_TR_CTRL__tr_par__DEFAULT even
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL0_TR_CTRL__tr_par_en__DEFAULT
+#define R_SERIAL0_TR_CTRL__tr_par_en__DEFAULT disable
+#endif
+
+/* tr_7bit tr_8bit */
+#ifndef R_SERIAL0_TR_CTRL__tr_bitnr__DEFAULT
+#define R_SERIAL0_TR_CTRL__tr_bitnr__DEFAULT tr_7bit
+#endif
+
+/*
+** Default values for register R_SERIAL0_TR_DATA
+*/
+
+/* 0 - 0xff */
+#ifndef R_SERIAL0_TR_DATA__data_out__DEFAULT
+#define R_SERIAL0_TR_DATA__data_out__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SERIAL0_XOFF
+*/
+
+/* stop enable */
+#ifndef R_SERIAL0_XOFF__tx_stop__DEFAULT
+#define R_SERIAL0_XOFF__tx_stop__DEFAULT stop
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL0_XOFF__auto_xoff__DEFAULT
+#define R_SERIAL0_XOFF__auto_xoff__DEFAULT disable
+#endif
+
+/* 0 - 0xff */
+#ifndef R_SERIAL0_XOFF__xoff_char__DEFAULT
+#define R_SERIAL0_XOFF__xoff_char__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SERIAL1_BAUD
+*/
+
+/* c4800Hz c1843k2Hz c921k6Hz c460k8Hz c57k6Hz c9600Hz c300Hz c1200Hz c230k4Hz c115k2Hz c600Hz c2400Hz c19k2Hz c6250kHz c38k4Hz */
+#ifndef R_SERIAL1_BAUD__tr_baud__DEFAULT
+#define R_SERIAL1_BAUD__tr_baud__DEFAULT c4800Hz
+#endif
+
+/* c4800Hz c1843k2Hz c921k6Hz c460k8Hz c57k6Hz c9600Hz c300Hz c1200Hz c230k4Hz c115k2Hz c600Hz c2400Hz c19k2Hz c6250kHz c38k4Hz */
+#ifndef R_SERIAL1_BAUD__rec_baud__DEFAULT
+#define R_SERIAL1_BAUD__rec_baud__DEFAULT c4800Hz
+#endif
+
+/*
+** Default values for register R_SERIAL1_CTRL
+*/
+
+/* c4800Hz c1843k2Hz c921k6Hz c460k8Hz c57k6Hz c9600Hz c300Hz c1200Hz c230k4Hz c115k2Hz c600Hz c2400Hz c19k2Hz c6250kHz c38k4Hz */
+#ifndef R_SERIAL1_CTRL__tr_baud__DEFAULT
+#define R_SERIAL1_CTRL__tr_baud__DEFAULT c4800Hz
+#endif
+
+/* c4800Hz c1843k2Hz c921k6Hz c460k8Hz c57k6Hz c9600Hz c300Hz c1200Hz c230k4Hz c115k2Hz c600Hz c2400Hz c19k2Hz c6250kHz c38k4Hz */
+#ifndef R_SERIAL1_CTRL__rec_baud__DEFAULT
+#define R_SERIAL1_CTRL__rec_baud__DEFAULT c4800Hz
+#endif
+
+/* ignore stop */
+#ifndef R_SERIAL1_CTRL__dma_err__DEFAULT
+#define R_SERIAL1_CTRL__dma_err__DEFAULT ignore
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL1_CTRL__rec_enable__DEFAULT
+#define R_SERIAL1_CTRL__rec_enable__DEFAULT disable
+#endif
+
+/* inactive active */
+#ifndef R_SERIAL1_CTRL__rts___DEFAULT
+#define R_SERIAL1_CTRL__rts___DEFAULT inactive
+#endif
+
+/* majority middle */
+#ifndef R_SERIAL1_CTRL__sampling__DEFAULT
+#define R_SERIAL1_CTRL__sampling__DEFAULT majority
+#endif
+
+/* normal stick */
+#ifndef R_SERIAL1_CTRL__rec_stick_par__DEFAULT
+#define R_SERIAL1_CTRL__rec_stick_par__DEFAULT normal
+#endif
+
+/* even odd */
+#ifndef R_SERIAL1_CTRL__rec_par__DEFAULT
+#define R_SERIAL1_CTRL__rec_par__DEFAULT even
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL1_CTRL__rec_par_en__DEFAULT
+#define R_SERIAL1_CTRL__rec_par_en__DEFAULT disable
+#endif
+
+/* rec_8bit rec_7bit */
+#ifndef R_SERIAL1_CTRL__rec_bitnr__DEFAULT
+#define R_SERIAL1_CTRL__rec_bitnr__DEFAULT rec_8bit
+#endif
+
+/* 0 - 0x1 */
+#ifndef R_SERIAL1_CTRL__txd__DEFAULT
+#define R_SERIAL1_CTRL__txd__DEFAULT 0
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL1_CTRL__tr_enable__DEFAULT
+#define R_SERIAL1_CTRL__tr_enable__DEFAULT disable
+#endif
+
+/* disabled active */
+#ifndef R_SERIAL1_CTRL__auto_cts__DEFAULT
+#define R_SERIAL1_CTRL__auto_cts__DEFAULT disabled
+#endif
+
+/* one_bit two_bits */
+#ifndef R_SERIAL1_CTRL__stop_bits__DEFAULT
+#define R_SERIAL1_CTRL__stop_bits__DEFAULT one_bit
+#endif
+
+/* normal stick */
+#ifndef R_SERIAL1_CTRL__tr_stick_par__DEFAULT
+#define R_SERIAL1_CTRL__tr_stick_par__DEFAULT normal
+#endif
+
+/* even odd */
+#ifndef R_SERIAL1_CTRL__tr_par__DEFAULT
+#define R_SERIAL1_CTRL__tr_par__DEFAULT even
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL1_CTRL__tr_par_en__DEFAULT
+#define R_SERIAL1_CTRL__tr_par_en__DEFAULT disable
+#endif
+
+/* tr_7bit tr_8bit */
+#ifndef R_SERIAL1_CTRL__tr_bitnr__DEFAULT
+#define R_SERIAL1_CTRL__tr_bitnr__DEFAULT tr_7bit
+#endif
+
+/* 0 - 0xff */
+#ifndef R_SERIAL1_CTRL__data_out__DEFAULT
+#define R_SERIAL1_CTRL__data_out__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SERIAL1_REC_CTRL
+*/
+
+/* ignore stop */
+#ifndef R_SERIAL1_REC_CTRL__dma_err__DEFAULT
+#define R_SERIAL1_REC_CTRL__dma_err__DEFAULT ignore
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL1_REC_CTRL__rec_enable__DEFAULT
+#define R_SERIAL1_REC_CTRL__rec_enable__DEFAULT disable
+#endif
+
+/* inactive active */
+#ifndef R_SERIAL1_REC_CTRL__rts___DEFAULT
+#define R_SERIAL1_REC_CTRL__rts___DEFAULT inactive
+#endif
+
+/* majority middle */
+#ifndef R_SERIAL1_REC_CTRL__sampling__DEFAULT
+#define R_SERIAL1_REC_CTRL__sampling__DEFAULT majority
+#endif
+
+/* normal stick */
+#ifndef R_SERIAL1_REC_CTRL__rec_stick_par__DEFAULT
+#define R_SERIAL1_REC_CTRL__rec_stick_par__DEFAULT normal
+#endif
+
+/* even odd */
+#ifndef R_SERIAL1_REC_CTRL__rec_par__DEFAULT
+#define R_SERIAL1_REC_CTRL__rec_par__DEFAULT even
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL1_REC_CTRL__rec_par_en__DEFAULT
+#define R_SERIAL1_REC_CTRL__rec_par_en__DEFAULT disable
+#endif
+
+/* rec_8bit rec_7bit */
+#ifndef R_SERIAL1_REC_CTRL__rec_bitnr__DEFAULT
+#define R_SERIAL1_REC_CTRL__rec_bitnr__DEFAULT rec_8bit
+#endif
+
+/*
+** Default values for register R_SERIAL1_TR_CTRL
+*/
+
+/* 0 - 0x1 */
+#ifndef R_SERIAL1_TR_CTRL__txd__DEFAULT
+#define R_SERIAL1_TR_CTRL__txd__DEFAULT 0
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL1_TR_CTRL__tr_enable__DEFAULT
+#define R_SERIAL1_TR_CTRL__tr_enable__DEFAULT disable
+#endif
+
+/* disabled active */
+#ifndef R_SERIAL1_TR_CTRL__auto_cts__DEFAULT
+#define R_SERIAL1_TR_CTRL__auto_cts__DEFAULT disabled
+#endif
+
+/* one_bit two_bits */
+#ifndef R_SERIAL1_TR_CTRL__stop_bits__DEFAULT
+#define R_SERIAL1_TR_CTRL__stop_bits__DEFAULT one_bit
+#endif
+
+/* normal stick */
+#ifndef R_SERIAL1_TR_CTRL__tr_stick_par__DEFAULT
+#define R_SERIAL1_TR_CTRL__tr_stick_par__DEFAULT normal
+#endif
+
+/* even odd */
+#ifndef R_SERIAL1_TR_CTRL__tr_par__DEFAULT
+#define R_SERIAL1_TR_CTRL__tr_par__DEFAULT even
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL1_TR_CTRL__tr_par_en__DEFAULT
+#define R_SERIAL1_TR_CTRL__tr_par_en__DEFAULT disable
+#endif
+
+/* tr_7bit tr_8bit */
+#ifndef R_SERIAL1_TR_CTRL__tr_bitnr__DEFAULT
+#define R_SERIAL1_TR_CTRL__tr_bitnr__DEFAULT tr_7bit
+#endif
+
+/*
+** Default values for register R_SERIAL1_TR_DATA
+*/
+
+/* 0 - 0xff */
+#ifndef R_SERIAL1_TR_DATA__data_out__DEFAULT
+#define R_SERIAL1_TR_DATA__data_out__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SERIAL1_XOFF
+*/
+
+/* stop enable */
+#ifndef R_SERIAL1_XOFF__tx_stop__DEFAULT
+#define R_SERIAL1_XOFF__tx_stop__DEFAULT stop
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL1_XOFF__auto_xoff__DEFAULT
+#define R_SERIAL1_XOFF__auto_xoff__DEFAULT disable
+#endif
+
+/* 0 - 0xff */
+#ifndef R_SERIAL1_XOFF__xoff_char__DEFAULT
+#define R_SERIAL1_XOFF__xoff_char__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SERIAL2_BAUD
+*/
+
+/* c4800Hz c1843k2Hz c921k6Hz c460k8Hz c57k6Hz c9600Hz c300Hz c1200Hz c230k4Hz c115k2Hz c600Hz c2400Hz c19k2Hz c6250kHz c38k4Hz */
+#ifndef R_SERIAL2_BAUD__tr_baud__DEFAULT
+#define R_SERIAL2_BAUD__tr_baud__DEFAULT c4800Hz
+#endif
+
+/* c4800Hz c1843k2Hz c921k6Hz c460k8Hz c57k6Hz c9600Hz c300Hz c1200Hz c230k4Hz c115k2Hz c600Hz c2400Hz c19k2Hz c6250kHz c38k4Hz */
+#ifndef R_SERIAL2_BAUD__rec_baud__DEFAULT
+#define R_SERIAL2_BAUD__rec_baud__DEFAULT c4800Hz
+#endif
+
+/*
+** Default values for register R_SERIAL2_CTRL
+*/
+
+/* c4800Hz c1843k2Hz c921k6Hz c460k8Hz c57k6Hz c9600Hz c300Hz c1200Hz c230k4Hz c115k2Hz c600Hz c2400Hz c19k2Hz c6250kHz c38k4Hz */
+#ifndef R_SERIAL2_CTRL__tr_baud__DEFAULT
+#define R_SERIAL2_CTRL__tr_baud__DEFAULT c4800Hz
+#endif
+
+/* c4800Hz c1843k2Hz c921k6Hz c460k8Hz c57k6Hz c9600Hz c300Hz c1200Hz c230k4Hz c115k2Hz c600Hz c2400Hz c19k2Hz c6250kHz c38k4Hz */
+#ifndef R_SERIAL2_CTRL__rec_baud__DEFAULT
+#define R_SERIAL2_CTRL__rec_baud__DEFAULT c4800Hz
+#endif
+
+/* ignore stop */
+#ifndef R_SERIAL2_CTRL__dma_err__DEFAULT
+#define R_SERIAL2_CTRL__dma_err__DEFAULT ignore
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL2_CTRL__rec_enable__DEFAULT
+#define R_SERIAL2_CTRL__rec_enable__DEFAULT disable
+#endif
+
+/* inactive active */
+#ifndef R_SERIAL2_CTRL__rts___DEFAULT
+#define R_SERIAL2_CTRL__rts___DEFAULT inactive
+#endif
+
+/* majority middle */
+#ifndef R_SERIAL2_CTRL__sampling__DEFAULT
+#define R_SERIAL2_CTRL__sampling__DEFAULT majority
+#endif
+
+/* normal stick */
+#ifndef R_SERIAL2_CTRL__rec_stick_par__DEFAULT
+#define R_SERIAL2_CTRL__rec_stick_par__DEFAULT normal
+#endif
+
+/* even odd */
+#ifndef R_SERIAL2_CTRL__rec_par__DEFAULT
+#define R_SERIAL2_CTRL__rec_par__DEFAULT even
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL2_CTRL__rec_par_en__DEFAULT
+#define R_SERIAL2_CTRL__rec_par_en__DEFAULT disable
+#endif
+
+/* rec_8bit rec_7bit */
+#ifndef R_SERIAL2_CTRL__rec_bitnr__DEFAULT
+#define R_SERIAL2_CTRL__rec_bitnr__DEFAULT rec_8bit
+#endif
+
+/* 0 - 0x1 */
+#ifndef R_SERIAL2_CTRL__txd__DEFAULT
+#define R_SERIAL2_CTRL__txd__DEFAULT 0
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL2_CTRL__tr_enable__DEFAULT
+#define R_SERIAL2_CTRL__tr_enable__DEFAULT disable
+#endif
+
+/* disabled active */
+#ifndef R_SERIAL2_CTRL__auto_cts__DEFAULT
+#define R_SERIAL2_CTRL__auto_cts__DEFAULT disabled
+#endif
+
+/* one_bit two_bits */
+#ifndef R_SERIAL2_CTRL__stop_bits__DEFAULT
+#define R_SERIAL2_CTRL__stop_bits__DEFAULT one_bit
+#endif
+
+/* normal stick */
+#ifndef R_SERIAL2_CTRL__tr_stick_par__DEFAULT
+#define R_SERIAL2_CTRL__tr_stick_par__DEFAULT normal
+#endif
+
+/* even odd */
+#ifndef R_SERIAL2_CTRL__tr_par__DEFAULT
+#define R_SERIAL2_CTRL__tr_par__DEFAULT even
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL2_CTRL__tr_par_en__DEFAULT
+#define R_SERIAL2_CTRL__tr_par_en__DEFAULT disable
+#endif
+
+/* tr_7bit tr_8bit */
+#ifndef R_SERIAL2_CTRL__tr_bitnr__DEFAULT
+#define R_SERIAL2_CTRL__tr_bitnr__DEFAULT tr_7bit
+#endif
+
+/* 0 - 0xff */
+#ifndef R_SERIAL2_CTRL__data_out__DEFAULT
+#define R_SERIAL2_CTRL__data_out__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SERIAL2_REC_CTRL
+*/
+
+/* ignore stop */
+#ifndef R_SERIAL2_REC_CTRL__dma_err__DEFAULT
+#define R_SERIAL2_REC_CTRL__dma_err__DEFAULT ignore
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL2_REC_CTRL__rec_enable__DEFAULT
+#define R_SERIAL2_REC_CTRL__rec_enable__DEFAULT disable
+#endif
+
+/* inactive active */
+#ifndef R_SERIAL2_REC_CTRL__rts___DEFAULT
+#define R_SERIAL2_REC_CTRL__rts___DEFAULT inactive
+#endif
+
+/* majority middle */
+#ifndef R_SERIAL2_REC_CTRL__sampling__DEFAULT
+#define R_SERIAL2_REC_CTRL__sampling__DEFAULT majority
+#endif
+
+/* normal stick */
+#ifndef R_SERIAL2_REC_CTRL__rec_stick_par__DEFAULT
+#define R_SERIAL2_REC_CTRL__rec_stick_par__DEFAULT normal
+#endif
+
+/* even odd */
+#ifndef R_SERIAL2_REC_CTRL__rec_par__DEFAULT
+#define R_SERIAL2_REC_CTRL__rec_par__DEFAULT even
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL2_REC_CTRL__rec_par_en__DEFAULT
+#define R_SERIAL2_REC_CTRL__rec_par_en__DEFAULT disable
+#endif
+
+/* rec_8bit rec_7bit */
+#ifndef R_SERIAL2_REC_CTRL__rec_bitnr__DEFAULT
+#define R_SERIAL2_REC_CTRL__rec_bitnr__DEFAULT rec_8bit
+#endif
+
+/*
+** Default values for register R_SERIAL2_TR_CTRL
+*/
+
+/* 0 - 0x1 */
+#ifndef R_SERIAL2_TR_CTRL__txd__DEFAULT
+#define R_SERIAL2_TR_CTRL__txd__DEFAULT 0
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL2_TR_CTRL__tr_enable__DEFAULT
+#define R_SERIAL2_TR_CTRL__tr_enable__DEFAULT disable
+#endif
+
+/* disabled active */
+#ifndef R_SERIAL2_TR_CTRL__auto_cts__DEFAULT
+#define R_SERIAL2_TR_CTRL__auto_cts__DEFAULT disabled
+#endif
+
+/* one_bit two_bits */
+#ifndef R_SERIAL2_TR_CTRL__stop_bits__DEFAULT
+#define R_SERIAL2_TR_CTRL__stop_bits__DEFAULT one_bit
+#endif
+
+/* normal stick */
+#ifndef R_SERIAL2_TR_CTRL__tr_stick_par__DEFAULT
+#define R_SERIAL2_TR_CTRL__tr_stick_par__DEFAULT normal
+#endif
+
+/* even odd */
+#ifndef R_SERIAL2_TR_CTRL__tr_par__DEFAULT
+#define R_SERIAL2_TR_CTRL__tr_par__DEFAULT even
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL2_TR_CTRL__tr_par_en__DEFAULT
+#define R_SERIAL2_TR_CTRL__tr_par_en__DEFAULT disable
+#endif
+
+/* tr_7bit tr_8bit */
+#ifndef R_SERIAL2_TR_CTRL__tr_bitnr__DEFAULT
+#define R_SERIAL2_TR_CTRL__tr_bitnr__DEFAULT tr_7bit
+#endif
+
+/*
+** Default values for register R_SERIAL2_TR_DATA
+*/
+
+/* 0 - 0xff */
+#ifndef R_SERIAL2_TR_DATA__data_out__DEFAULT
+#define R_SERIAL2_TR_DATA__data_out__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SERIAL2_XOFF
+*/
+
+/* stop enable */
+#ifndef R_SERIAL2_XOFF__tx_stop__DEFAULT
+#define R_SERIAL2_XOFF__tx_stop__DEFAULT stop
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL2_XOFF__auto_xoff__DEFAULT
+#define R_SERIAL2_XOFF__auto_xoff__DEFAULT disable
+#endif
+
+/* 0 - 0xff */
+#ifndef R_SERIAL2_XOFF__xoff_char__DEFAULT
+#define R_SERIAL2_XOFF__xoff_char__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SERIAL3_BAUD
+*/
+
+/* c4800Hz c1843k2Hz c921k6Hz c460k8Hz c57k6Hz c9600Hz c300Hz c1200Hz c230k4Hz c115k2Hz c600Hz c2400Hz c19k2Hz c6250kHz c38k4Hz */
+#ifndef R_SERIAL3_BAUD__tr_baud__DEFAULT
+#define R_SERIAL3_BAUD__tr_baud__DEFAULT c4800Hz
+#endif
+
+/* c4800Hz c1843k2Hz c921k6Hz c460k8Hz c57k6Hz c9600Hz c300Hz c1200Hz c230k4Hz c115k2Hz c600Hz c2400Hz c19k2Hz c6250kHz c38k4Hz */
+#ifndef R_SERIAL3_BAUD__rec_baud__DEFAULT
+#define R_SERIAL3_BAUD__rec_baud__DEFAULT c4800Hz
+#endif
+
+/*
+** Default values for register R_SERIAL3_CTRL
+*/
+
+/* c4800Hz c1843k2Hz c921k6Hz c460k8Hz c57k6Hz c9600Hz c300Hz c1200Hz c230k4Hz c115k2Hz c600Hz c2400Hz c19k2Hz c6250kHz c38k4Hz */
+#ifndef R_SERIAL3_CTRL__tr_baud__DEFAULT
+#define R_SERIAL3_CTRL__tr_baud__DEFAULT c4800Hz
+#endif
+
+/* c4800Hz c1843k2Hz c921k6Hz c460k8Hz c57k6Hz c9600Hz c300Hz c1200Hz c230k4Hz c115k2Hz c600Hz c2400Hz c19k2Hz c6250kHz c38k4Hz */
+#ifndef R_SERIAL3_CTRL__rec_baud__DEFAULT
+#define R_SERIAL3_CTRL__rec_baud__DEFAULT c4800Hz
+#endif
+
+/* ignore stop */
+#ifndef R_SERIAL3_CTRL__dma_err__DEFAULT
+#define R_SERIAL3_CTRL__dma_err__DEFAULT ignore
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL3_CTRL__rec_enable__DEFAULT
+#define R_SERIAL3_CTRL__rec_enable__DEFAULT disable
+#endif
+
+/* inactive active */
+#ifndef R_SERIAL3_CTRL__rts___DEFAULT
+#define R_SERIAL3_CTRL__rts___DEFAULT inactive
+#endif
+
+/* majority middle */
+#ifndef R_SERIAL3_CTRL__sampling__DEFAULT
+#define R_SERIAL3_CTRL__sampling__DEFAULT majority
+#endif
+
+/* normal stick */
+#ifndef R_SERIAL3_CTRL__rec_stick_par__DEFAULT
+#define R_SERIAL3_CTRL__rec_stick_par__DEFAULT normal
+#endif
+
+/* even odd */
+#ifndef R_SERIAL3_CTRL__rec_par__DEFAULT
+#define R_SERIAL3_CTRL__rec_par__DEFAULT even
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL3_CTRL__rec_par_en__DEFAULT
+#define R_SERIAL3_CTRL__rec_par_en__DEFAULT disable
+#endif
+
+/* rec_8bit rec_7bit */
+#ifndef R_SERIAL3_CTRL__rec_bitnr__DEFAULT
+#define R_SERIAL3_CTRL__rec_bitnr__DEFAULT rec_8bit
+#endif
+
+/* 0 - 0x1 */
+#ifndef R_SERIAL3_CTRL__txd__DEFAULT
+#define R_SERIAL3_CTRL__txd__DEFAULT 0
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL3_CTRL__tr_enable__DEFAULT
+#define R_SERIAL3_CTRL__tr_enable__DEFAULT disable
+#endif
+
+/* disabled active */
+#ifndef R_SERIAL3_CTRL__auto_cts__DEFAULT
+#define R_SERIAL3_CTRL__auto_cts__DEFAULT disabled
+#endif
+
+/* one_bit two_bits */
+#ifndef R_SERIAL3_CTRL__stop_bits__DEFAULT
+#define R_SERIAL3_CTRL__stop_bits__DEFAULT one_bit
+#endif
+
+/* normal stick */
+#ifndef R_SERIAL3_CTRL__tr_stick_par__DEFAULT
+#define R_SERIAL3_CTRL__tr_stick_par__DEFAULT normal
+#endif
+
+/* even odd */
+#ifndef R_SERIAL3_CTRL__tr_par__DEFAULT
+#define R_SERIAL3_CTRL__tr_par__DEFAULT even
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL3_CTRL__tr_par_en__DEFAULT
+#define R_SERIAL3_CTRL__tr_par_en__DEFAULT disable
+#endif
+
+/* tr_7bit tr_8bit */
+#ifndef R_SERIAL3_CTRL__tr_bitnr__DEFAULT
+#define R_SERIAL3_CTRL__tr_bitnr__DEFAULT tr_7bit
+#endif
+
+/* 0 - 0xff */
+#ifndef R_SERIAL3_CTRL__data_out__DEFAULT
+#define R_SERIAL3_CTRL__data_out__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SERIAL3_REC_CTRL
+*/
+
+/* ignore stop */
+#ifndef R_SERIAL3_REC_CTRL__dma_err__DEFAULT
+#define R_SERIAL3_REC_CTRL__dma_err__DEFAULT ignore
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL3_REC_CTRL__rec_enable__DEFAULT
+#define R_SERIAL3_REC_CTRL__rec_enable__DEFAULT disable
+#endif
+
+/* inactive active */
+#ifndef R_SERIAL3_REC_CTRL__rts___DEFAULT
+#define R_SERIAL3_REC_CTRL__rts___DEFAULT inactive
+#endif
+
+/* majority middle */
+#ifndef R_SERIAL3_REC_CTRL__sampling__DEFAULT
+#define R_SERIAL3_REC_CTRL__sampling__DEFAULT majority
+#endif
+
+/* normal stick */
+#ifndef R_SERIAL3_REC_CTRL__rec_stick_par__DEFAULT
+#define R_SERIAL3_REC_CTRL__rec_stick_par__DEFAULT normal
+#endif
+
+/* even odd */
+#ifndef R_SERIAL3_REC_CTRL__rec_par__DEFAULT
+#define R_SERIAL3_REC_CTRL__rec_par__DEFAULT even
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL3_REC_CTRL__rec_par_en__DEFAULT
+#define R_SERIAL3_REC_CTRL__rec_par_en__DEFAULT disable
+#endif
+
+/* rec_8bit rec_7bit */
+#ifndef R_SERIAL3_REC_CTRL__rec_bitnr__DEFAULT
+#define R_SERIAL3_REC_CTRL__rec_bitnr__DEFAULT rec_8bit
+#endif
+
+/*
+** Default values for register R_SERIAL3_TR_CTRL
+*/
+
+/* 0 - 0x1 */
+#ifndef R_SERIAL3_TR_CTRL__txd__DEFAULT
+#define R_SERIAL3_TR_CTRL__txd__DEFAULT 0
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL3_TR_CTRL__tr_enable__DEFAULT
+#define R_SERIAL3_TR_CTRL__tr_enable__DEFAULT disable
+#endif
+
+/* disabled active */
+#ifndef R_SERIAL3_TR_CTRL__auto_cts__DEFAULT
+#define R_SERIAL3_TR_CTRL__auto_cts__DEFAULT disabled
+#endif
+
+/* one_bit two_bits */
+#ifndef R_SERIAL3_TR_CTRL__stop_bits__DEFAULT
+#define R_SERIAL3_TR_CTRL__stop_bits__DEFAULT one_bit
+#endif
+
+/* normal stick */
+#ifndef R_SERIAL3_TR_CTRL__tr_stick_par__DEFAULT
+#define R_SERIAL3_TR_CTRL__tr_stick_par__DEFAULT normal
+#endif
+
+/* even odd */
+#ifndef R_SERIAL3_TR_CTRL__tr_par__DEFAULT
+#define R_SERIAL3_TR_CTRL__tr_par__DEFAULT even
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL3_TR_CTRL__tr_par_en__DEFAULT
+#define R_SERIAL3_TR_CTRL__tr_par_en__DEFAULT disable
+#endif
+
+/* tr_7bit tr_8bit */
+#ifndef R_SERIAL3_TR_CTRL__tr_bitnr__DEFAULT
+#define R_SERIAL3_TR_CTRL__tr_bitnr__DEFAULT tr_7bit
+#endif
+
+/*
+** Default values for register R_SERIAL3_TR_DATA
+*/
+
+/* 0 - 0xff */
+#ifndef R_SERIAL3_TR_DATA__data_out__DEFAULT
+#define R_SERIAL3_TR_DATA__data_out__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SERIAL3_XOFF
+*/
+
+/* stop enable */
+#ifndef R_SERIAL3_XOFF__tx_stop__DEFAULT
+#define R_SERIAL3_XOFF__tx_stop__DEFAULT stop
+#endif
+
+/* disable enable */
+#ifndef R_SERIAL3_XOFF__auto_xoff__DEFAULT
+#define R_SERIAL3_XOFF__auto_xoff__DEFAULT disable
+#endif
+
+/* 0 - 0xff */
+#ifndef R_SERIAL3_XOFF__xoff_char__DEFAULT
+#define R_SERIAL3_XOFF__xoff_char__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SERIAL_PRESCALE
+*/
+
+/* 0 - 0xffff */
+#ifndef R_SERIAL_PRESCALE__ser_presc__DEFAULT
+#define R_SERIAL_PRESCALE__ser_presc__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SET_EOP
+*/
+
+/* set nop */
+#ifndef R_SET_EOP__ch9_eop__DEFAULT
+#define R_SET_EOP__ch9_eop__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_SET_EOP__ch7_eop__DEFAULT
+#define R_SET_EOP__ch7_eop__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_SET_EOP__ch5_eop__DEFAULT
+#define R_SET_EOP__ch5_eop__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_SET_EOP__ch3_eop__DEFAULT
+#define R_SET_EOP__ch3_eop__DEFAULT set
+#endif
+
+/*
+** Default values for register R_SHARED_RAM_ADDR
+*/
+
+/* 0 - 0x3fffff */
+#ifndef R_SHARED_RAM_ADDR__base_addr__DEFAULT
+#define R_SHARED_RAM_ADDR__base_addr__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SHARED_RAM_CONFIG
+*/
+
+/* word byte */
+#ifndef R_SHARED_RAM_CONFIG__width__DEFAULT
+#define R_SHARED_RAM_CONFIG__width__DEFAULT word
+#endif
+
+/* yes no */
+#ifndef R_SHARED_RAM_CONFIG__enable__DEFAULT
+#define R_SHARED_RAM_CONFIG__enable__DEFAULT yes
+#endif
+
+/* int nop */
+#ifndef R_SHARED_RAM_CONFIG__pint__DEFAULT
+#define R_SHARED_RAM_CONFIG__pint__DEFAULT int
+#endif
+
+/* clr nop */
+#ifndef R_SHARED_RAM_CONFIG__clri__DEFAULT
+#define R_SHARED_RAM_CONFIG__clri__DEFAULT clr
+#endif
+
+/*
+** Default values for register R_SINGLE_STEP
+*/
+
+/* off on */
+#ifndef R_SINGLE_STEP__single_step__DEFAULT
+#define R_SINGLE_STEP__single_step__DEFAULT off
+#endif
+
+/* off on */
+#ifndef R_SINGLE_STEP__step_wr__DEFAULT
+#define R_SINGLE_STEP__step_wr__DEFAULT off
+#endif
+
+/* off on */
+#ifndef R_SINGLE_STEP__step_rd__DEFAULT
+#define R_SINGLE_STEP__step_rd__DEFAULT off
+#endif
+
+/* off on */
+#ifndef R_SINGLE_STEP__step_fetch__DEFAULT
+#define R_SINGLE_STEP__step_fetch__DEFAULT off
+#endif
+
+/*
+** Default values for register R_SYNC_SERIAL1_CTRL
+*/
+
+/* c4800Hz c921k6Hz c460k8Hz c57k6Hz c28k8Hz c9600Hz c300Hz c1200Hz c230k4Hz c115k2Hz c3125kHz c150Hz c600Hz c2400Hz c19k2Hz */
+#ifndef R_SYNC_SERIAL1_CTRL__tr_baud__DEFAULT
+#define R_SYNC_SERIAL1_CTRL__tr_baud__DEFAULT c4800Hz
+#endif
+
+/* off on */
+#ifndef R_SYNC_SERIAL1_CTRL__dma_enable__DEFAULT
+#define R_SYNC_SERIAL1_CTRL__dma_enable__DEFAULT off
+#endif
+
+/* slave_input master_input slave_output slave_bidir master_output master_bidir */
+#ifndef R_SYNC_SERIAL1_CTRL__mode__DEFAULT
+#define R_SYNC_SERIAL1_CTRL__mode__DEFAULT slave_input
+#endif
+
+/* normal ignore */
+#ifndef R_SYNC_SERIAL1_CTRL__error__DEFAULT
+#define R_SYNC_SERIAL1_CTRL__error__DEFAULT normal
+#endif
+
+/* disable enable */
+#ifndef R_SYNC_SERIAL1_CTRL__rec_enable__DEFAULT
+#define R_SYNC_SERIAL1_CTRL__rec_enable__DEFAULT disable
+#endif
+
+/* normal early */
+#ifndef R_SYNC_SERIAL1_CTRL__f_synctype__DEFAULT
+#define R_SYNC_SERIAL1_CTRL__f_synctype__DEFAULT normal
+#endif
+
+/* extended word bit */
+#ifndef R_SYNC_SERIAL1_CTRL__f_syncsize__DEFAULT
+#define R_SYNC_SERIAL1_CTRL__f_syncsize__DEFAULT extended
+#endif
+
+/* off on */
+#ifndef R_SYNC_SERIAL1_CTRL__f_sync__DEFAULT
+#define R_SYNC_SERIAL1_CTRL__f_sync__DEFAULT off
+#endif
+
+/* normal gated */
+#ifndef R_SYNC_SERIAL1_CTRL__clk_mode__DEFAULT
+#define R_SYNC_SERIAL1_CTRL__clk_mode__DEFAULT normal
+#endif
+
+/* running stopped */
+#ifndef R_SYNC_SERIAL1_CTRL__clk_halt__DEFAULT
+#define R_SYNC_SERIAL1_CTRL__clk_halt__DEFAULT running
+#endif
+
+/* lsb msb */
+#ifndef R_SYNC_SERIAL1_CTRL__bitorder__DEFAULT
+#define R_SYNC_SERIAL1_CTRL__bitorder__DEFAULT lsb
+#endif
+
+/* disable enable */
+#ifndef R_SYNC_SERIAL1_CTRL__tr_enable__DEFAULT
+#define R_SYNC_SERIAL1_CTRL__tr_enable__DEFAULT disable
+#endif
+
+/* size24bit size16bit size8bit size12bit size32bit */
+#ifndef R_SYNC_SERIAL1_CTRL__wordsize__DEFAULT
+#define R_SYNC_SERIAL1_CTRL__wordsize__DEFAULT size24bit
+#endif
+
+/* lmt_0 lmt_8 */
+#ifndef R_SYNC_SERIAL1_CTRL__buf_empty__DEFAULT
+#define R_SYNC_SERIAL1_CTRL__buf_empty__DEFAULT lmt_0
+#endif
+
+/* lmt_32 lmt_8 */
+#ifndef R_SYNC_SERIAL1_CTRL__buf_full__DEFAULT
+#define R_SYNC_SERIAL1_CTRL__buf_full__DEFAULT lmt_32
+#endif
+
+/* disabled enabled */
+#ifndef R_SYNC_SERIAL1_CTRL__flow_ctrl__DEFAULT
+#define R_SYNC_SERIAL1_CTRL__flow_ctrl__DEFAULT disabled
+#endif
+
+/* neg pos */
+#ifndef R_SYNC_SERIAL1_CTRL__clk_polarity__DEFAULT
+#define R_SYNC_SERIAL1_CTRL__clk_polarity__DEFAULT neg
+#endif
+
+/* inverted normal */
+#ifndef R_SYNC_SERIAL1_CTRL__frame_polarity__DEFAULT
+#define R_SYNC_SERIAL1_CTRL__frame_polarity__DEFAULT inverted
+#endif
+
+/* inverted normal */
+#ifndef R_SYNC_SERIAL1_CTRL__status_polarity__DEFAULT
+#define R_SYNC_SERIAL1_CTRL__status_polarity__DEFAULT inverted
+#endif
+
+/* inverted normal */
+#ifndef R_SYNC_SERIAL1_CTRL__clk_driver__DEFAULT
+#define R_SYNC_SERIAL1_CTRL__clk_driver__DEFAULT inverted
+#endif
+
+/* inverted normal */
+#ifndef R_SYNC_SERIAL1_CTRL__frame_driver__DEFAULT
+#define R_SYNC_SERIAL1_CTRL__frame_driver__DEFAULT inverted
+#endif
+
+/* inverted normal */
+#ifndef R_SYNC_SERIAL1_CTRL__status_driver__DEFAULT
+#define R_SYNC_SERIAL1_CTRL__status_driver__DEFAULT inverted
+#endif
+
+/* high low */
+#ifndef R_SYNC_SERIAL1_CTRL__def_out0__DEFAULT
+#define R_SYNC_SERIAL1_CTRL__def_out0__DEFAULT high
+#endif
+
+/*
+** Default values for register R_SYNC_SERIAL1_TR_BYTE
+*/
+
+/* 0 - 0xff */
+#ifndef R_SYNC_SERIAL1_TR_BYTE__data_out__DEFAULT
+#define R_SYNC_SERIAL1_TR_BYTE__data_out__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SYNC_SERIAL1_TR_DATA
+*/
+
+/* 0 - 0xffffffff */
+#ifndef R_SYNC_SERIAL1_TR_DATA__data_out__DEFAULT
+#define R_SYNC_SERIAL1_TR_DATA__data_out__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SYNC_SERIAL1_TR_WORD
+*/
+
+/* 0 - 0xffff */
+#ifndef R_SYNC_SERIAL1_TR_WORD__data_out__DEFAULT
+#define R_SYNC_SERIAL1_TR_WORD__data_out__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SYNC_SERIAL3_CTRL
+*/
+
+/* c4800Hz c921k6Hz c460k8Hz c57k6Hz c28k8Hz c9600Hz c300Hz c1200Hz c230k4Hz c115k2Hz c3125kHz c150Hz c600Hz c2400Hz c19k2Hz */
+#ifndef R_SYNC_SERIAL3_CTRL__tr_baud__DEFAULT
+#define R_SYNC_SERIAL3_CTRL__tr_baud__DEFAULT c4800Hz
+#endif
+
+/* off on */
+#ifndef R_SYNC_SERIAL3_CTRL__dma_enable__DEFAULT
+#define R_SYNC_SERIAL3_CTRL__dma_enable__DEFAULT off
+#endif
+
+/* slave_input master_input slave_output slave_bidir master_output master_bidir */
+#ifndef R_SYNC_SERIAL3_CTRL__mode__DEFAULT
+#define R_SYNC_SERIAL3_CTRL__mode__DEFAULT slave_input
+#endif
+
+/* normal ignore */
+#ifndef R_SYNC_SERIAL3_CTRL__error__DEFAULT
+#define R_SYNC_SERIAL3_CTRL__error__DEFAULT normal
+#endif
+
+/* disable enable */
+#ifndef R_SYNC_SERIAL3_CTRL__rec_enable__DEFAULT
+#define R_SYNC_SERIAL3_CTRL__rec_enable__DEFAULT disable
+#endif
+
+/* normal early */
+#ifndef R_SYNC_SERIAL3_CTRL__f_synctype__DEFAULT
+#define R_SYNC_SERIAL3_CTRL__f_synctype__DEFAULT normal
+#endif
+
+/* extended word bit */
+#ifndef R_SYNC_SERIAL3_CTRL__f_syncsize__DEFAULT
+#define R_SYNC_SERIAL3_CTRL__f_syncsize__DEFAULT extended
+#endif
+
+/* off on */
+#ifndef R_SYNC_SERIAL3_CTRL__f_sync__DEFAULT
+#define R_SYNC_SERIAL3_CTRL__f_sync__DEFAULT off
+#endif
+
+/* normal gated */
+#ifndef R_SYNC_SERIAL3_CTRL__clk_mode__DEFAULT
+#define R_SYNC_SERIAL3_CTRL__clk_mode__DEFAULT normal
+#endif
+
+/* running stopped */
+#ifndef R_SYNC_SERIAL3_CTRL__clk_halt__DEFAULT
+#define R_SYNC_SERIAL3_CTRL__clk_halt__DEFAULT running
+#endif
+
+/* lsb msb */
+#ifndef R_SYNC_SERIAL3_CTRL__bitorder__DEFAULT
+#define R_SYNC_SERIAL3_CTRL__bitorder__DEFAULT lsb
+#endif
+
+/* disable enable */
+#ifndef R_SYNC_SERIAL3_CTRL__tr_enable__DEFAULT
+#define R_SYNC_SERIAL3_CTRL__tr_enable__DEFAULT disable
+#endif
+
+/* size24bit size16bit size8bit size12bit size32bit */
+#ifndef R_SYNC_SERIAL3_CTRL__wordsize__DEFAULT
+#define R_SYNC_SERIAL3_CTRL__wordsize__DEFAULT size24bit
+#endif
+
+/* lmt_0 lmt_8 */
+#ifndef R_SYNC_SERIAL3_CTRL__buf_empty__DEFAULT
+#define R_SYNC_SERIAL3_CTRL__buf_empty__DEFAULT lmt_0
+#endif
+
+/* lmt_32 lmt_8 */
+#ifndef R_SYNC_SERIAL3_CTRL__buf_full__DEFAULT
+#define R_SYNC_SERIAL3_CTRL__buf_full__DEFAULT lmt_32
+#endif
+
+/* disabled enabled */
+#ifndef R_SYNC_SERIAL3_CTRL__flow_ctrl__DEFAULT
+#define R_SYNC_SERIAL3_CTRL__flow_ctrl__DEFAULT disabled
+#endif
+
+/* neg pos */
+#ifndef R_SYNC_SERIAL3_CTRL__clk_polarity__DEFAULT
+#define R_SYNC_SERIAL3_CTRL__clk_polarity__DEFAULT neg
+#endif
+
+/* inverted normal */
+#ifndef R_SYNC_SERIAL3_CTRL__frame_polarity__DEFAULT
+#define R_SYNC_SERIAL3_CTRL__frame_polarity__DEFAULT inverted
+#endif
+
+/* inverted normal */
+#ifndef R_SYNC_SERIAL3_CTRL__status_polarity__DEFAULT
+#define R_SYNC_SERIAL3_CTRL__status_polarity__DEFAULT inverted
+#endif
+
+/* inverted normal */
+#ifndef R_SYNC_SERIAL3_CTRL__clk_driver__DEFAULT
+#define R_SYNC_SERIAL3_CTRL__clk_driver__DEFAULT inverted
+#endif
+
+/* inverted normal */
+#ifndef R_SYNC_SERIAL3_CTRL__frame_driver__DEFAULT
+#define R_SYNC_SERIAL3_CTRL__frame_driver__DEFAULT inverted
+#endif
+
+/* inverted normal */
+#ifndef R_SYNC_SERIAL3_CTRL__status_driver__DEFAULT
+#define R_SYNC_SERIAL3_CTRL__status_driver__DEFAULT inverted
+#endif
+
+/* high low */
+#ifndef R_SYNC_SERIAL3_CTRL__def_out0__DEFAULT
+#define R_SYNC_SERIAL3_CTRL__def_out0__DEFAULT high
+#endif
+
+/*
+** Default values for register R_SYNC_SERIAL3_TR_BYTE
+*/
+
+/* 0 - 0xff */
+#ifndef R_SYNC_SERIAL3_TR_BYTE__data_out__DEFAULT
+#define R_SYNC_SERIAL3_TR_BYTE__data_out__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SYNC_SERIAL3_TR_DATA
+*/
+
+/* 0 - 0xffffffff */
+#ifndef R_SYNC_SERIAL3_TR_DATA__data_out__DEFAULT
+#define R_SYNC_SERIAL3_TR_DATA__data_out__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SYNC_SERIAL3_TR_WORD
+*/
+
+/* 0 - 0xffff */
+#ifndef R_SYNC_SERIAL3_TR_WORD__data_out__DEFAULT
+#define R_SYNC_SERIAL3_TR_WORD__data_out__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_SYNC_SERIAL_PRESCALE
+*/
+
+/* baudrate codec */
+#ifndef R_SYNC_SERIAL_PRESCALE__clk_sel_u3__DEFAULT
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u3__DEFAULT baudrate
+#endif
+
+/* external internal */
+#ifndef R_SYNC_SERIAL_PRESCALE__word_stb_sel_u3__DEFAULT
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u3__DEFAULT external
+#endif
+
+/* baudrate codec */
+#ifndef R_SYNC_SERIAL_PRESCALE__clk_sel_u1__DEFAULT
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u1__DEFAULT baudrate
+#endif
+
+/* external internal */
+#ifndef R_SYNC_SERIAL_PRESCALE__word_stb_sel_u1__DEFAULT
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u1__DEFAULT external
+#endif
+
+/* div1 div2 div4 div32 div16 div8 div64 div128 */
+#ifndef R_SYNC_SERIAL_PRESCALE__prescaler__DEFAULT
+#define R_SYNC_SERIAL_PRESCALE__prescaler__DEFAULT div1
+#endif
+
+/* normal enabled */
+#ifndef R_SYNC_SERIAL_PRESCALE__warp_mode__DEFAULT
+#define R_SYNC_SERIAL_PRESCALE__warp_mode__DEFAULT normal
+#endif
+
+/* 0 - 0xf */
+#ifndef R_SYNC_SERIAL_PRESCALE__frame_rate__DEFAULT
+#define R_SYNC_SERIAL_PRESCALE__frame_rate__DEFAULT 0
+#endif
+
+/* 0 - 0x3ff */
+#ifndef R_SYNC_SERIAL_PRESCALE__word_rate__DEFAULT
+#define R_SYNC_SERIAL_PRESCALE__word_rate__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_TEST_MODE
+*/
+
+/* off on */
+#ifndef R_TEST_MODE__single_step__DEFAULT
+#define R_TEST_MODE__single_step__DEFAULT off
+#endif
+
+/* off on */
+#ifndef R_TEST_MODE__step_wr__DEFAULT
+#define R_TEST_MODE__step_wr__DEFAULT off
+#endif
+
+/* off on */
+#ifndef R_TEST_MODE__step_rd__DEFAULT
+#define R_TEST_MODE__step_rd__DEFAULT off
+#endif
+
+/* off on */
+#ifndef R_TEST_MODE__step_fetch__DEFAULT
+#define R_TEST_MODE__step_fetch__DEFAULT off
+#endif
+
+/* off on */
+#ifndef R_TEST_MODE__mmu_test__DEFAULT
+#define R_TEST_MODE__mmu_test__DEFAULT off
+#endif
+
+/* off on */
+#ifndef R_TEST_MODE__usb_test__DEFAULT
+#define R_TEST_MODE__usb_test__DEFAULT off
+#endif
+
+/* off on */
+#ifndef R_TEST_MODE__scsi_timer_test__DEFAULT
+#define R_TEST_MODE__scsi_timer_test__DEFAULT off
+#endif
+
+/* off on */
+#ifndef R_TEST_MODE__backoff__DEFAULT
+#define R_TEST_MODE__backoff__DEFAULT off
+#endif
+
+/* off on */
+#ifndef R_TEST_MODE__snmp_test__DEFAULT
+#define R_TEST_MODE__snmp_test__DEFAULT off
+#endif
+
+/* do dont */
+#ifndef R_TEST_MODE__snmp_inc__DEFAULT
+#define R_TEST_MODE__snmp_inc__DEFAULT do
+#endif
+
+/* off on */
+#ifndef R_TEST_MODE__ser_loop__DEFAULT
+#define R_TEST_MODE__ser_loop__DEFAULT off
+#endif
+
+/* off on */
+#ifndef R_TEST_MODE__baudrate__DEFAULT
+#define R_TEST_MODE__baudrate__DEFAULT off
+#endif
+
+/* all off even odd */
+#ifndef R_TEST_MODE__timer__DEFAULT
+#define R_TEST_MODE__timer__DEFAULT all
+#endif
+
+/* test normal */
+#ifndef R_TEST_MODE__cache_test__DEFAULT
+#define R_TEST_MODE__cache_test__DEFAULT test
+#endif
+
+/* test normal */
+#ifndef R_TEST_MODE__tag_test__DEFAULT
+#define R_TEST_MODE__tag_test__DEFAULT test
+#endif
+
+/* disable enable */
+#ifndef R_TEST_MODE__cache_enable__DEFAULT
+#define R_TEST_MODE__cache_enable__DEFAULT disable
+#endif
+
+/*
+** Default values for register R_TIMER_CTRL
+*/
+
+/* 0 - 0xff */
+#ifndef R_TIMER_CTRL__timerdiv1__DEFAULT
+#define R_TIMER_CTRL__timerdiv1__DEFAULT 0
+#endif
+
+/* 0 - 0xff */
+#ifndef R_TIMER_CTRL__timerdiv0__DEFAULT
+#define R_TIMER_CTRL__timerdiv0__DEFAULT 0
+#endif
+
+/* normal prescale */
+#ifndef R_TIMER_CTRL__presc_timer1__DEFAULT
+#define R_TIMER_CTRL__presc_timer1__DEFAULT normal
+#endif
+
+/* clr nop */
+#ifndef R_TIMER_CTRL__i1__DEFAULT
+#define R_TIMER_CTRL__i1__DEFAULT clr
+#endif
+
+/* freeze run stop_ld */
+#ifndef R_TIMER_CTRL__tm1__DEFAULT
+#define R_TIMER_CTRL__tm1__DEFAULT freeze
+#endif
+
+/* c4800Hz c1843k2Hz c921k6Hz c460k8Hz c57k6Hz cascade0 c9600Hz c300Hz c1200Hz c230k4Hz c115k2Hz c600Hz c2400Hz c19k2Hz c6250kHz c38k4Hz */
+#ifndef R_TIMER_CTRL__clksel1__DEFAULT
+#define R_TIMER_CTRL__clksel1__DEFAULT c4800Hz
+#endif
+
+/* external prescale */
+#ifndef R_TIMER_CTRL__presc_ext__DEFAULT
+#define R_TIMER_CTRL__presc_ext__DEFAULT external
+#endif
+
+/* clr nop */
+#ifndef R_TIMER_CTRL__i0__DEFAULT
+#define R_TIMER_CTRL__i0__DEFAULT clr
+#endif
+
+/* freeze run stop_ld */
+#ifndef R_TIMER_CTRL__tm0__DEFAULT
+#define R_TIMER_CTRL__tm0__DEFAULT freeze
+#endif
+
+/* c4800Hz c1843k2Hz c921k6Hz c460k8Hz c57k6Hz c9600Hz c300Hz c1200Hz c230k4Hz c115k2Hz flexible c600Hz c2400Hz c19k2Hz c6250kHz c38k4Hz */
+#ifndef R_TIMER_CTRL__clksel0__DEFAULT
+#define R_TIMER_CTRL__clksel0__DEFAULT c4800Hz
+#endif
+
+/*
+** Default values for register R_TIMER_PRESCALE
+*/
+
+/* 0 - 0xffff */
+#ifndef R_TIMER_PRESCALE__tim_presc__DEFAULT
+#define R_TIMER_PRESCALE__tim_presc__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_USB_IRQ_MASK_CLR
+*/
+
+/* clr nop */
+#ifndef R_USB_IRQ_MASK_CLR__iso_eof__DEFAULT
+#define R_USB_IRQ_MASK_CLR__iso_eof__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_USB_IRQ_MASK_CLR__intr_eof__DEFAULT
+#define R_USB_IRQ_MASK_CLR__intr_eof__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_USB_IRQ_MASK_CLR__iso_eot__DEFAULT
+#define R_USB_IRQ_MASK_CLR__iso_eot__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_USB_IRQ_MASK_CLR__intr_eot__DEFAULT
+#define R_USB_IRQ_MASK_CLR__intr_eot__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_USB_IRQ_MASK_CLR__ctl_eot__DEFAULT
+#define R_USB_IRQ_MASK_CLR__ctl_eot__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_USB_IRQ_MASK_CLR__bulk_eot__DEFAULT
+#define R_USB_IRQ_MASK_CLR__bulk_eot__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_USB_IRQ_MASK_CLR__epid_attn__DEFAULT
+#define R_USB_IRQ_MASK_CLR__epid_attn__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_USB_IRQ_MASK_CLR__sof__DEFAULT
+#define R_USB_IRQ_MASK_CLR__sof__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_USB_IRQ_MASK_CLR__port_status__DEFAULT
+#define R_USB_IRQ_MASK_CLR__port_status__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_USB_IRQ_MASK_CLR__ctl_status__DEFAULT
+#define R_USB_IRQ_MASK_CLR__ctl_status__DEFAULT clr
+#endif
+
+/*
+** Default values for register R_USB_IRQ_MASK_CLR_DEV
+*/
+
+/* clr nop */
+#ifndef R_USB_IRQ_MASK_CLR_DEV__out_eot__DEFAULT
+#define R_USB_IRQ_MASK_CLR_DEV__out_eot__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_USB_IRQ_MASK_CLR_DEV__ep3_in_eot__DEFAULT
+#define R_USB_IRQ_MASK_CLR_DEV__ep3_in_eot__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_USB_IRQ_MASK_CLR_DEV__ep2_in_eot__DEFAULT
+#define R_USB_IRQ_MASK_CLR_DEV__ep2_in_eot__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_USB_IRQ_MASK_CLR_DEV__ep1_in_eot__DEFAULT
+#define R_USB_IRQ_MASK_CLR_DEV__ep1_in_eot__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_USB_IRQ_MASK_CLR_DEV__ep0_in_eot__DEFAULT
+#define R_USB_IRQ_MASK_CLR_DEV__ep0_in_eot__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_USB_IRQ_MASK_CLR_DEV__epid_attn__DEFAULT
+#define R_USB_IRQ_MASK_CLR_DEV__epid_attn__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_USB_IRQ_MASK_CLR_DEV__sof__DEFAULT
+#define R_USB_IRQ_MASK_CLR_DEV__sof__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_USB_IRQ_MASK_CLR_DEV__port_status__DEFAULT
+#define R_USB_IRQ_MASK_CLR_DEV__port_status__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_USB_IRQ_MASK_CLR_DEV__ctl_status__DEFAULT
+#define R_USB_IRQ_MASK_CLR_DEV__ctl_status__DEFAULT clr
+#endif
+
+/*
+** Default values for register R_USB_IRQ_MASK_SET
+*/
+
+/* set nop */
+#ifndef R_USB_IRQ_MASK_SET__iso_eof__DEFAULT
+#define R_USB_IRQ_MASK_SET__iso_eof__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_USB_IRQ_MASK_SET__intr_eof__DEFAULT
+#define R_USB_IRQ_MASK_SET__intr_eof__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_USB_IRQ_MASK_SET__iso_eot__DEFAULT
+#define R_USB_IRQ_MASK_SET__iso_eot__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_USB_IRQ_MASK_SET__intr_eot__DEFAULT
+#define R_USB_IRQ_MASK_SET__intr_eot__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_USB_IRQ_MASK_SET__ctl_eot__DEFAULT
+#define R_USB_IRQ_MASK_SET__ctl_eot__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_USB_IRQ_MASK_SET__bulk_eot__DEFAULT
+#define R_USB_IRQ_MASK_SET__bulk_eot__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_USB_IRQ_MASK_SET__epid_attn__DEFAULT
+#define R_USB_IRQ_MASK_SET__epid_attn__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_USB_IRQ_MASK_SET__sof__DEFAULT
+#define R_USB_IRQ_MASK_SET__sof__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_USB_IRQ_MASK_SET__port_status__DEFAULT
+#define R_USB_IRQ_MASK_SET__port_status__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_USB_IRQ_MASK_SET__ctl_status__DEFAULT
+#define R_USB_IRQ_MASK_SET__ctl_status__DEFAULT set
+#endif
+
+/*
+** Default values for register R_USB_IRQ_MASK_SET_DEV
+*/
+
+/* set nop */
+#ifndef R_USB_IRQ_MASK_SET_DEV__out_eot__DEFAULT
+#define R_USB_IRQ_MASK_SET_DEV__out_eot__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_USB_IRQ_MASK_SET_DEV__ep3_in_eot__DEFAULT
+#define R_USB_IRQ_MASK_SET_DEV__ep3_in_eot__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_USB_IRQ_MASK_SET_DEV__ep2_in_eot__DEFAULT
+#define R_USB_IRQ_MASK_SET_DEV__ep2_in_eot__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_USB_IRQ_MASK_SET_DEV__ep1_in_eot__DEFAULT
+#define R_USB_IRQ_MASK_SET_DEV__ep1_in_eot__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_USB_IRQ_MASK_SET_DEV__ep0_in_eot__DEFAULT
+#define R_USB_IRQ_MASK_SET_DEV__ep0_in_eot__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_USB_IRQ_MASK_SET_DEV__epid_attn__DEFAULT
+#define R_USB_IRQ_MASK_SET_DEV__epid_attn__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_USB_IRQ_MASK_SET_DEV__sof__DEFAULT
+#define R_USB_IRQ_MASK_SET_DEV__sof__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_USB_IRQ_MASK_SET_DEV__port_status__DEFAULT
+#define R_USB_IRQ_MASK_SET_DEV__port_status__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_USB_IRQ_MASK_SET_DEV__ctl_status__DEFAULT
+#define R_USB_IRQ_MASK_SET_DEV__ctl_status__DEFAULT set
+#endif
+
+/*
+** Default values for register R_USB_PORT1_DISABLE
+*/
+
+/* yes no */
+#ifndef R_USB_PORT1_DISABLE__disable__DEFAULT
+#define R_USB_PORT1_DISABLE__disable__DEFAULT yes
+#endif
+
+/*
+** Default values for register R_USB_PORT2_DISABLE
+*/
+
+/* yes no */
+#ifndef R_USB_PORT2_DISABLE__disable__DEFAULT
+#define R_USB_PORT2_DISABLE__disable__DEFAULT yes
+#endif
+
+/*
+** Default values for register R_VECT_MASK_CLR
+*/
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__usb__DEFAULT
+#define R_VECT_MASK_CLR__usb__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__dma9__DEFAULT
+#define R_VECT_MASK_CLR__dma9__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__dma8__DEFAULT
+#define R_VECT_MASK_CLR__dma8__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__dma7__DEFAULT
+#define R_VECT_MASK_CLR__dma7__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__dma6__DEFAULT
+#define R_VECT_MASK_CLR__dma6__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__dma5__DEFAULT
+#define R_VECT_MASK_CLR__dma5__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__dma4__DEFAULT
+#define R_VECT_MASK_CLR__dma4__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__dma3__DEFAULT
+#define R_VECT_MASK_CLR__dma3__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__dma2__DEFAULT
+#define R_VECT_MASK_CLR__dma2__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__dma1__DEFAULT
+#define R_VECT_MASK_CLR__dma1__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__dma0__DEFAULT
+#define R_VECT_MASK_CLR__dma0__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__ext_dma1__DEFAULT
+#define R_VECT_MASK_CLR__ext_dma1__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__ext_dma0__DEFAULT
+#define R_VECT_MASK_CLR__ext_dma0__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__pa__DEFAULT
+#define R_VECT_MASK_CLR__pa__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__irq_intnr__DEFAULT
+#define R_VECT_MASK_CLR__irq_intnr__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__sw__DEFAULT
+#define R_VECT_MASK_CLR__sw__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__serial__DEFAULT
+#define R_VECT_MASK_CLR__serial__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__snmp__DEFAULT
+#define R_VECT_MASK_CLR__snmp__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__network__DEFAULT
+#define R_VECT_MASK_CLR__network__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__scsi1__DEFAULT
+#define R_VECT_MASK_CLR__scsi1__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__scsi0__DEFAULT
+#define R_VECT_MASK_CLR__scsi0__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__timer1__DEFAULT
+#define R_VECT_MASK_CLR__timer1__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__timer0__DEFAULT
+#define R_VECT_MASK_CLR__timer0__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__nmi__DEFAULT
+#define R_VECT_MASK_CLR__nmi__DEFAULT clr
+#endif
+
+/* clr nop */
+#ifndef R_VECT_MASK_CLR__some__DEFAULT
+#define R_VECT_MASK_CLR__some__DEFAULT clr
+#endif
+
+/*
+** Default values for register R_VECT_MASK_SET
+*/
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__usb__DEFAULT
+#define R_VECT_MASK_SET__usb__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__dma9__DEFAULT
+#define R_VECT_MASK_SET__dma9__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__dma8__DEFAULT
+#define R_VECT_MASK_SET__dma8__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__dma7__DEFAULT
+#define R_VECT_MASK_SET__dma7__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__dma6__DEFAULT
+#define R_VECT_MASK_SET__dma6__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__dma5__DEFAULT
+#define R_VECT_MASK_SET__dma5__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__dma4__DEFAULT
+#define R_VECT_MASK_SET__dma4__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__dma3__DEFAULT
+#define R_VECT_MASK_SET__dma3__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__dma2__DEFAULT
+#define R_VECT_MASK_SET__dma2__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__dma1__DEFAULT
+#define R_VECT_MASK_SET__dma1__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__dma0__DEFAULT
+#define R_VECT_MASK_SET__dma0__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__ext_dma1__DEFAULT
+#define R_VECT_MASK_SET__ext_dma1__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__ext_dma0__DEFAULT
+#define R_VECT_MASK_SET__ext_dma0__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__pa__DEFAULT
+#define R_VECT_MASK_SET__pa__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__irq_intnr__DEFAULT
+#define R_VECT_MASK_SET__irq_intnr__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__sw__DEFAULT
+#define R_VECT_MASK_SET__sw__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__serial__DEFAULT
+#define R_VECT_MASK_SET__serial__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__snmp__DEFAULT
+#define R_VECT_MASK_SET__snmp__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__network__DEFAULT
+#define R_VECT_MASK_SET__network__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__scsi1__DEFAULT
+#define R_VECT_MASK_SET__scsi1__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__scsi0__DEFAULT
+#define R_VECT_MASK_SET__scsi0__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__timer1__DEFAULT
+#define R_VECT_MASK_SET__timer1__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__timer0__DEFAULT
+#define R_VECT_MASK_SET__timer0__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__nmi__DEFAULT
+#define R_VECT_MASK_SET__nmi__DEFAULT set
+#endif
+
+/* set nop */
+#ifndef R_VECT_MASK_SET__some__DEFAULT
+#define R_VECT_MASK_SET__some__DEFAULT set
+#endif
+
+/*
+** Default values for register R_WAITSTATES
+*/
+
+/* 0 - 3 */
+#ifndef R_WAITSTATES__pcs4_7_zw__DEFAULT
+#define R_WAITSTATES__pcs4_7_zw__DEFAULT 0
+#endif
+
+/* 0 - 3 */
+#ifndef R_WAITSTATES__pcs4_7_ew__DEFAULT
+#define R_WAITSTATES__pcs4_7_ew__DEFAULT 0
+#endif
+
+/* 0 - 15 */
+#ifndef R_WAITSTATES__pcs4_7_lw__DEFAULT
+#define R_WAITSTATES__pcs4_7_lw__DEFAULT 0
+#endif
+
+/* 0 - 3 */
+#ifndef R_WAITSTATES__pcs0_3_zw__DEFAULT
+#define R_WAITSTATES__pcs0_3_zw__DEFAULT 0
+#endif
+
+/* 0 - 3 */
+#ifndef R_WAITSTATES__pcs0_3_ew__DEFAULT
+#define R_WAITSTATES__pcs0_3_ew__DEFAULT 0
+#endif
+
+/* 0 - 15 */
+#ifndef R_WAITSTATES__pcs0_3_lw__DEFAULT
+#define R_WAITSTATES__pcs0_3_lw__DEFAULT 0
+#endif
+
+/* 0 - 3 */
+#ifndef R_WAITSTATES__sram_zw__DEFAULT
+#define R_WAITSTATES__sram_zw__DEFAULT 0
+#endif
+
+/* 0 - 3 */
+#ifndef R_WAITSTATES__sram_ew__DEFAULT
+#define R_WAITSTATES__sram_ew__DEFAULT 0
+#endif
+
+/* 0 - 15 */
+#ifndef R_WAITSTATES__sram_lw__DEFAULT
+#define R_WAITSTATES__sram_lw__DEFAULT 0
+#endif
+
+/* 0 - 3 */
+#ifndef R_WAITSTATES__flash_zw__DEFAULT
+#define R_WAITSTATES__flash_zw__DEFAULT 0
+#endif
+
+/* 0 - 3 */
+#ifndef R_WAITSTATES__flash_ew__DEFAULT
+#define R_WAITSTATES__flash_ew__DEFAULT 0
+#endif
+
+/* 0 - 15 */
+#ifndef R_WAITSTATES__flash_lw__DEFAULT
+#define R_WAITSTATES__flash_lw__DEFAULT 0
+#endif
+
+/*
+** Default values for register R_WATCHDOG
+*/
+
+/* 0 - 7 */
+#ifndef R_WATCHDOG__key__DEFAULT
+#define R_WATCHDOG__key__DEFAULT 0
+#endif
+
+/* start stop */
+#ifndef R_WATCHDOG__enable__DEFAULT
+#define R_WATCHDOG__enable__DEFAULT start
+#endif
+
+/********************** TYPE DEFINITION SECTION ************************/
+
+/********************** LOCAL FUNCTION DECLARATION SECTION *************/
+
+/********************** GLOBAL VARIABLE DECLARATION SECTION ************/
+
+/********************** FUNCTION DEFINITION SECTION ********************/
+
+#endif
--- /dev/null
+/*!**********************************************************************
+*!
+*! FILE NAME: hwregs_int.h
+*!
+*! DESCRIPTION: Internal shadow register implementation.
+*! Not intended for general use.
+*! This file is include in hwregs.h
+*!
+*! FUNCTIONS: none
+*!
+*! NOTE: This file is automatically generated, do _not_ edit.
+*! Created: Thu Oct 3 01:21:27 2002
+*! By: Id: shadow_gen,v 1.14 2002/10/02 20:31:22 hp Exp
+*! From: /n/asic/projects/etrax_ng/doc/work/etrax_ng_regs.rd 1.168
+*! /n/asic/projects/etrax_ng/include//hwregs.ctrl 1.3
+*!
+*! MACROS: REG_INITIATED
+*! REG_CHECK_INIT
+*! REG_ICHECK_INIT
+*! REG_CHECK_INR
+*! REG_VAL_VAL
+*! REG_SVAL
+*! REG_SVAL_ZERO
+*! REG_SVAL_SHADOW
+*! REG_SVAL_I
+*! REG_SVAL_I_ZERO
+*! REG_SVAL_I_SHADOW
+*!
+*! REG_IMASK
+*! REG_ADDR_I
+*! REG_SADDR_I
+*! REG_IADDR_I
+*! REG_VAL_ENUM
+*! REG_GET_WO
+*! REG_GET_RO
+*! REG_GET_RW
+*! REG_IGET_WO
+*! REG_IGET_RO
+*! REG_IGET_RW
+*! REG_SET_WO
+*! REG_ISET_WO
+*! REG_SET_VAL_WO
+*! REG_SET_RW
+*! REG_ISET_RW
+*! REG_SET_VAL_RW
+*! REG_EQL_WO
+*! REG_EQL_RO
+*! REG_EQL_RW
+*! REG_IEQL_WO
+*! REG_IEQL_RO
+*! REG_IEQL_RW
+*! REG_RD_WO
+*! REG_RD_RO
+*! REG_RD_RW
+*! REG_IRD_WO
+*! REG_IRD_RO
+*! REG_IRD_RW
+*! REG_WR_WO
+*! REG_WR_RW
+*! REG_IWR_WO
+*! REG_IWR_RW
+*!
+*!----------------------------------------------------------------------
+*! HISTORY
+*!
+*! DATE NAME CHANGES
+*! ---- ---- -------
+*! Apr 01 1998 Jan Bengtsson Initial version
+*! Oct 01 2002 Hans-Peter Nilsson Large mechanical changes to correct
+*! use of the ## operator.
+*!----------------------------------------------------------------------
+*!
+*! (C) Copyright 1998, 2002 Axis Communications AB, LUND, SWEDEN
+*!
+*!**********************************************************************/
+/* %Z% %M% %I% %G% */
+
+#ifndef __HWREGS_INT_H__
+#define __HWREGS_INT_H__
+
+/********************** INCLUDE FILES SECTION **************************/
+
+/********************** CONSTANT AND MACRO SECTION *********************/
+#ifndef __REG_GENERAL_INT_H__
+#define __REG_GENERAL_INT_H__
+
+/*
+** The first part of hwregs_int.h is common to all shadow
+** register modules, and should therefore only be included once to
+** avoid macro redefinitions.
+*/
+
+#if REG_DEBUG && !defined(__ASSEMBLER__)
+
+#ifndef REG_SERROR
+#define REG_SERROR(ok,reg) \
+ assert( ok ),
+#endif
+
+#ifndef REG_VERROR
+#define REG_VERROR(ok,val) \
+ assert( ok ),
+#endif
+
+#ifndef REG_IERROR
+#define REG_IERROR(ok,i,reg) \
+ assert( ok ),
+#endif
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_INITIATED
+*#
+*# PARAMETERS : reg_ : Name of a register, with "_" appended.
+*#
+*# RETURNS : 0
+*#
+*# SIDE EFFECTS: Clears initiated flag in reg_initiated_type struct.
+*#
+*# DESCRIPTION : Clears initiated flag in reg_initiated_type struct.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Parameter now has "_" appended.
+*#**********************************************************************/
+
+#define REG_INITIATED(reg_) \
+ *reg_##_IADDR = 0,
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_CHECK_INIT
+*#
+*# PARAMETERS : reg_ : Name of a register, with "_" appended.
+*#
+*# RETURNS : Value of REG_SERROR macro.
+*#
+*# SIDE EFFECTS: Evaluates REG_SERROR macro.
+*#
+*# DESCRIPTION : Check that shadow is initiated, by
+*# evaluating REG_SERROR macro.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Parameter now has "_" appended.
+*# Correct stringization.
+*#**********************************************************************/
+
+#define REG_CHECK_INIT(reg_) \
+ REG_SERROR(*reg_##_IADDR == 0, #reg_)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_ICHECK_INIT
+*#
+*# PARAMETERS : i : Interface number.
+*# reg_: Name of a register, with "_" appended.
+*#
+*# RETURNS : Value of REG_SERROR macro.
+*#
+*# SIDE EFFECTS: Evaluates REG_SERROR macro.
+*#
+*# DESCRIPTION : Check that shadow is initiated, by
+*# evaluating REG_SERROR macro.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg parameter now has "_" appended.
+*# Correct stringization.
+*#**********************************************************************/
+
+#define REG_ICHECK_INIT(i, reg_) \
+ REG_SERROR(*REG_IADDR_I(i, reg_) == 0, #reg_)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_CHECK_INR
+*#
+*# PARAMETERS : i : Interface number.
+*# reg_: Name of a register, with "_" appended.
+*#
+*# RETURNS : Value of REG_IERROR macro.
+*#
+*# SIDE EFFECTS: Evaluates REG_IERROR macro.
+*#
+*# DESCRIPTION : Check that interface number is valid.
+*# If an invalid interface number is found at compile
+*# time gcc report the following warning:
+*# 'warning: right shift count >= width of type'
+*# If an invalid interface number is found at run time
+*# the REG_IERROR macro is evaluated.
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg parameter now has "_" appended.
+*# Correct stringization.
+*#**********************************************************************/
+
+#define REG_CHECK_INR(i, reg_) \
+ REG_IERROR( \
+ 1 >> ( \
+ ( \
+ (udword)(~(i)) > (udword)(~(reg_##_FIRST)) || \
+ (udword)(i) > (udword)(reg_##_LAST) \
+ ) ? 32 : 0 \
+ ), \
+ i, #reg_ \
+ )
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL_VAL
+*#
+*# PARAMETERS : reg_ : Name of a register, with "_" appended.
+*# field_: Name of a field, with "_" appended.
+*# val : Integer value
+*#
+*# RETURNS : val
+*#
+*# SIDE EFFECTS: Evaluate REG_VERROR macro.
+*#
+*# DESCRIPTION : Check that an integer value is within field range.
+*# If val parameter is found to be out of range at compile
+*# time gcc report the following warning:
+*# 'left shift count >= width of type'
+*# If an invalid integer value is found at run time
+*# the REG_VERROR macro is evaluated.
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg and field name parameters now
+*# have "_" appended.
+*#**********************************************************************/
+
+#define REG_VAL_VAL(reg_, field_, val) ( \
+ REG_VERROR( \
+ 1 << ( \
+ ( \
+ (udword)(~(val)) > (udword)(~(reg_##_##field_##_MIN)) || \
+ (udword)(val) > (udword)(reg_##_##field_##_MAX) \
+ ) ? 32 : 0 \
+ ), \
+ val \
+ ) \
+ val \
+)
+
+#else /* ! REG_DEBUG || __ASSEMBER__ */
+
+/* Checks only done in debug mode. */
+/* No need for REG_VERROR, REG_SERROR, and REG_IERROR. */
+
+#define REG_INITIATED(reg)
+#define REG_CHECK_INIT(reg)
+#define REG_ICHECK_INIT(i,reg)
+#define REG_CHECK_INR(i,reg)
+#define REG_VAL_VAL(reg,field,val) (val)
+
+#endif
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SVAL
+*#
+*# PARAMETERS : reg_ : Name of a register, with "_" appended.
+*#
+*# RETURNS : Value of shadow register associated with a WO register,
+*# or 0.
+*#
+*# SIDE EFFECTS: None
+*#
+*# DESCRIPTION : Read contents of a shadow register. By using this macro
+*# it's possible to force special values for some registers,
+*# e.g. zero for set/clr registers.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg parameter now has "_" appended.
+*#**********************************************************************/
+#define REG_SVAL(reg_) ( \
+ reg_##_SVAL(reg_) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SVAL_ZERO
+*#
+*# PARAMETERS : reg : Name of a register.
+*#
+*# RETURNS : Zero.
+*#
+*# SIDE EFFECTS: None
+*#
+*# DESCRIPTION : Force contents of shadow register to zero, used by
+*# the set/clr registers.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*#**********************************************************************/
+#define REG_SVAL_ZERO(reg) ( \
+ 0 \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SVAL_SHADOW
+*#
+*# PARAMETERS : reg_ : Name of a register, with "_" appended.
+*#
+*# RETURNS : Value of shadow register associated with a WO register.
+*#
+*# SIDE EFFECTS: None
+*#
+*# DESCRIPTION : Read shadow register contents.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg parameter now has "_" appended.
+*#**********************************************************************/
+#define REG_SVAL_SHADOW(reg_) ( \
+ *reg_##_SADDR \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SVAL_I
+*#
+*# PARAMETERS : reg_ : Name of a register, with "_" appended.
+*# i : Interface number.
+*#
+*# RETURNS : Value of shadow register associated with a WO register,
+*# or 0, for interface i.
+*#
+*# SIDE EFFECTS: None
+*#
+*# DESCRIPTION : Read contents of a shadow register. By using this macro
+*# it's possible to force special values for some registers,
+*# e.g. zero for set/clr registers.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg parameter now has "_" appended.
+*#**********************************************************************/
+#define REG_SVAL_I(i, reg_) ( \
+ reg_##_SVAL_I(i, reg_) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SVAL_I_ZERO
+*#
+*# PARAMETERS : reg_ : Name of a register, with "_" appended.
+*# i : Interface number.
+*#
+*# RETURNS : Zero.
+*#
+*# SIDE EFFECTS: None
+*#
+*# DESCRIPTION : Force contents of shadow register to zero, used by
+*# the set/clr registers, for interface i.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg parameter now has "_" appended.
+*#**********************************************************************/
+#define REG_SVAL_I_ZERO(i,reg) ( \
+ 0 \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SVAL_I_SHADOW
+*#
+*# PARAMETERS : reg_ : Name of a register.
+*# i : Interface number.
+*#
+*# RETURNS : Value of shadow register associated with a WO register,
+*# for interface i.
+*#
+*# SIDE EFFECTS: None
+*#
+*# DESCRIPTION : Read shadow register contents, of interface i.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg parameter now has "_" appended.
+*#**********************************************************************/
+#define REG_SVAL_I_SHADOW(i, reg_) ( \
+ *REG_SADDR_I(i, reg_) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_IMASK
+*#
+*# PARAMETERS : reg_ : Name of a register, with "_" appended.
+*# field_ : Name of a field, with "_" appended.
+*#
+*# RETURNS : Inverse of field mask.
+*#
+*# SIDE EFFECTS: none
+*#
+*# DESCRIPTION : Create a mask with zeros matching the field,
+*# and ones matching the rest.
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg and field name parameters now
+*# have "_" appended.
+*#**********************************************************************/
+
+#define REG_IMASK(reg_, field_) ( \
+ ~reg_##_##field_##_##field_##_MASK \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_ADDR_I
+*#
+*# PARAMETERS : i : interface number.
+*# reg_ : Name of a register, with "_" appended.
+*#
+*# RETURNS : Address to reg for interface i.
+*#
+*# SIDE EFFECTS: May evaluate REG_IERROR.
+*#
+*# DESCRIPTION : Calculate address to reg for interface i.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg parameter now has "_" appended.
+*#**********************************************************************/
+
+#define REG_ADDR_I(i, reg_) ( \
+ reg_##_TYPECAST ( \
+ REG_CHECK_INR(i, reg_) \
+ ((udword) reg_##_ADDR) + reg_##_OFFSET * (i) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SADDR_I
+*#
+*# PARAMETERS : i : interface number.
+*# reg_ : Name of a register, with "_" appended.
+*#
+*# RETURNS : Address to shadow register for interface i.
+*#
+*# SIDE EFFECTS: May evaluate REG_IERROR.
+*#
+*# DESCRIPTION : Calculate address to shadow register for interface i.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg parameter now has "_" appended.
+*#**********************************************************************/
+
+#define REG_SADDR_I(i, reg_) ( \
+ reg_##_STYPECAST ( \
+ REG_CHECK_INR(i, reg_) \
+ ((udword) reg_##_SADDR) + reg_##_SOFFSET * (i) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_IADDR_I
+*#
+*# PARAMETERS : i : interface number.
+*# reg_ : Name of a register, with "_" appended.
+*#
+*# RETURNS : Address to initiated flag for interface i.
+*#
+*# SIDE EFFECTS: May evaluate REG_IERROR.
+*#
+*# DESCRIPTION : Calculate address to initiated flag for interface i.
+*# The reg_initiated_type struct has the same layout as
+*# the reg_shadow_type struct, i.e. it's possible to use
+*# <reg>__SOFFSET here to.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg parameter now has "_" appended.
+*#**********************************************************************/
+
+#define REG_IADDR_I(i, reg_) ( \
+ reg_##_STYPECAST ( \
+ REG_CHECK_INR(i, reg_) \
+ ((udword) reg_##_IADDR) + reg_##_SOFFSET * (i) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_VAL_ENUM
+*#
+*# PARAMETERS : reg_ : Name of a register, with "_" appended.
+*# field_: Name of a field, with "_" appended.
+*# sym : Symbolic value.
+*#
+*# RETURNS : Integer value for sym.
+*#
+*# SIDE EFFECTS: none
+*#
+*# DESCRIPTION : Convert symbolic value to an integer value.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg and field name parameters now
+*# have "_" appended.
+*#**********************************************************************/
+
+#define REG_VAL_ENUM(reg_, field_, sym) ( \
+ reg_##_##field_##_##field_##_##sym \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_GET_WO
+*#
+*# PARAMETERS : reg_ : Name of a register, with "_" appended.
+*# field_ : Name of a field, with "_" appended.
+*#
+*# RETURNS : Value of field field in register reg.
+*#
+*# SIDE EFFECTS: May evaluate REG_SERROR.
+*#
+*# DESCRIPTION : Read a field in a write only shadow register,
+*# i.e. from the shadow register. If the shadow register
+*# isn't initiated the REG_SERROR macro is evaluated.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg and field name parameters now
+*# have "_" appended.
+*#**********************************************************************/
+
+#define REG_GET_WO(reg_, field_) ( \
+ REG_CHECK_INIT(reg_) \
+ (REG_SVAL(reg_) & reg_##_##field_##_##field_##_MASK) >> \
+ reg_##_##field_##_BITNR \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_GET_RO, REG_GET_RW
+*#
+*# PARAMETERS : reg_ : Name of a register, with "_" appended.
+*# field_ : Name of a field, with "_" appended.
+*#
+*# RETURNS : Value of field field in register reg.
+*#
+*# SIDE EFFECTS: none
+*#
+*# DESCRIPTION : Read a field in a read only or read write shadow register.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg and field name parameters now
+*# have "_" appended.
+*#**********************************************************************/
+
+#define REG_GET_RO(reg_, field_) ( \
+ (reg_##_READ(reg_##_ADDR) & reg_##_##field_##_##field_##_MASK) >> \
+ reg_##_##field_##_BITNR \
+)
+
+#define REG_GET_RW REG_GET_RO
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_IGET_WO
+*#
+*# PARAMETERS : i : Interface number.
+*# reg_ : Name of a register, with "_" appended.
+*# field_: Name of a field, with "_" appended.
+*#
+*# RETURNS : Value of field field in register reg.
+*#
+*# SIDE EFFECTS: May evaluate REG_SERROR, and REG_IERROR.
+*#
+*# DESCRIPTION : Read a field in a write only register for interface i,
+*# i.e. from the shadow register. If the shadow register
+*# isn't initiated the REG_SERROR macro is evaluated,
+*# and if i is out of range REG_IERROR is evaluated.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg and field name parameters now
+*# have "_" appended.
+*#**********************************************************************/
+
+#define REG_IGET_WO(i, reg_, field_) ( \
+ REG_ICHECK_INIT(i, reg_) \
+ (REG_SVAL_I(i, reg_) & reg_##_##field_##_##field_##_MASK) >> \
+ reg_##_##field_##_BITNR \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_IGET_RO, REG_IGET_RW
+*#
+*# PARAMETERS : i : Interface number.
+*# reg_ : Name of a register, with "_" appended.
+*# field_: Name of a field, with "_" appended.
+*#
+*# RETURNS : Value of field field in register reg.
+*#
+*# SIDE EFFECTS: May evaluate REG_IERROR.
+*#
+*# DESCRIPTION : Read a field in a read only or read write register for
+*# interface i. If i is out of range REG_IERROR is evaluated.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg and field name parameters now
+*# have "_" appended.
+*#**********************************************************************/
+
+#define REG_IGET_RO(i, reg_, field_) ( \
+ (reg_##_READ(REG_ADDR_I(i, reg_) ) & \
+ reg_##_##field_##_##field_##_MASK) >> reg_##_##field_##_BITNR \
+)
+
+#define REG_IGET_RW REG_IGET_RO
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET_WO
+*#
+*# PARAMETERS : reg_ : Name of a register, with "_" appended.
+*# field_: Name of a field, with "_" appended.
+*# val : Value to write to field.
+*#
+*# RETURNS : Integer value written to complete register.
+*#
+*# SIDE EFFECTS: May evaluate REG_SERROR and REG_VERROR.
+*#
+*# DESCRIPTION : Write val parameter to field field in write only register
+*# reg and in the shadow register. If the shadow register
+*# isn't initiated REG_SERROR is evaluated, and if the
+*# val parameter is out of range REG_VERROR is evaluated.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg and field name parameters now
+*# have "_" appended.
+*#**********************************************************************/
+
+#define REG_SET_WO(reg_, field_, val) ( \
+ *reg_##_SADDR = ( \
+ REG_CHECK_INIT(reg_) \
+ (REG_SVAL(reg_) & REG_IMASK(reg_, field_)) | \
+ (reg_##_##field_##_##field_##_VAL(reg_, field_, val) << \
+ reg_##_##field_##_BITNR) \
+ ), \
+ reg_##_WRITE(reg_##_ADDR, *reg_##_SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_ISET_WO
+*#
+*# PARAMETERS : i : Interface number.
+*# reg_ : Name of a register, with "_" appended.
+*# field_: Name of a field, with "_" appended.
+*# val : Value to write to field.
+*#
+*# RETURNS : Integer value written to complete register.
+*#
+*# SIDE EFFECTS: May evaluate REG_IERROR, REG_SERROR, and REG_VERROR.
+*#
+*# DESCRIPTION : Write val parameter to field field in write only register
+*# reg of interface i and in the shadow register. If the
+*# shadow register isn't initiated REG_SERROR is evaluated,
+*# and if the val parameter is out of range REG_VERROR is
+*# evaluated, and if the interface number is out of range
+*# REG_IERROR is evaluated.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg and field name parameters now
+*# have "_" appended.
+*#**********************************************************************/
+
+#define REG_ISET_WO(i, reg_, field_, val) ( \
+ *REG_SADDR_I(i, reg_) = ( \
+ REG_ICHECK_INIT(i, reg_) \
+ (REG_SVAL_I(i, reg_) & REG_IMASK(reg_, field_)) | \
+ (reg_##_##field_##_##field_##_VAL(reg_, field_, val) << \
+ reg_##_##field_##_BITNR) \
+ ), \
+ reg_##_WRITE(REG_ADDR_I(i, reg_), *REG_SADDR_I(i, reg_)) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET_VAL_WO
+*#
+*# PARAMETERS : reg_ : Name of a register, with "_" appended.
+*# field_: Name of a field, with "_" appended.
+*# val : Integer value to write to symbolic field.
+*#
+*# RETURNS : Integer value written to complete register.
+*#
+*# SIDE EFFECTS: May evaluate REG_SERROR and REG_VERROR.
+*#
+*# DESCRIPTION : Write val parameter to field field in write only register
+*# reg and in the shadow register. If the shadow register
+*# isn't initiated REG_SERROR is evaluated, and if the
+*# val parameter is out of range REG_VERROR is evaluated.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg and field name parameters now
+*# have "_" appended.
+*#**********************************************************************/
+
+#define REG_SET_VAL_WO(reg_, field_, val) ( \
+ *reg_##_SADDR = ( \
+ REG_CHECK_INIT(reg_) \
+ (REG_SVAL(reg_) & REG_IMASK(reg_, field_)) | \
+ (REG_VAL_VAL(reg_, field_, val) << reg_##_##field_##_BITNR) \
+ ), \
+ reg_##_WRITE(reg_##_ADDR, *reg_##_SADDR) \
+)
+
+/*#**********************************************************************
+*# Can't write to a read only register, i.e. NO REG_SET_RO, REG_ISET_RO,
+*# and REG_SET_VAL_RO macros.
+*#**********************************************************************/
+
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET_RW
+*#
+*# PARAMETERS : reg_ : Name of a register, with "_" appended.
+*# field_: Name of a field, with "_" appended.
+*# val : Value to write to field.
+*#
+*# RETURNS : Integer value written to complete register.
+*#
+*# SIDE EFFECTS: May evaluate REG_VERROR.
+*#
+*# DESCRIPTION : Write val parameter to field field in read write register
+*# reg. If the val parameter is out of range REG_VERROR is
+*# evaluated.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg and field name parameters now
+*# have "_" appended.
+*#**********************************************************************/
+
+#define REG_SET_RW(reg_, field_, val) ( \
+ reg_##_WRITE(reg_##_ADDR, ( \
+ (reg_##_READ(reg_##_ADDR) & REG_IMASK(reg_, field_)) | \
+ (reg_##_##field_##_##field_##_VAL(reg_, field_, val) << \
+ reg_##_##field_##_BITNR) ) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_ISET_RW
+*#
+*# PARAMETERS : i : Interface number.
+*# reg_ : Name of a register, with "_" appended.
+*# field_: Name of a field, with "_" appended.
+*# val : Value to write to field.
+*#
+*# RETURNS : Integer value written to complete register.
+*#
+*# SIDE EFFECTS: May evaluate REG_VERROR and REG_IERROR.
+*#
+*# DESCRIPTION : Write val parameter to field field in read write register
+*# reg of interface i. If the val parameter is out of range
+*# REG_VERROR is evaluated, and if the interface number is
+*# out of range REG_IERROR is evaluated.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg and field name parameters now
+*# have "_" appended.
+*#**********************************************************************/
+
+#define REG_ISET_RW(i, reg_, field_, val) ( \
+ reg_##_WRITE(REG_ADDR_I(i, reg_), ( \
+ (reg_##_READ(REG_ADDR_I(i, reg_)) & REG_IMASK(reg_, field_))\
+ | (reg_##_##field_##_##field_##_VAL(reg_, field_, val) << \
+ reg_##_##field_##_BITNR) ) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_SET_VAL_RW
+*#
+*# PARAMETERS : reg_ : Name of a register, with "_" appended.
+*# field_: Name of a field, with "_" appended.
+*# val : Integer value to write to symbolic field.
+*#
+*# RETURNS : Integer value written to complete register.
+*#
+*# SIDE EFFECTS: May evaluate REG_VERROR.
+*#
+*# DESCRIPTION : Write val parameter to field field in read write register
+*# reg. If the val parameter is out of range REG_VERROR is
+*# evaluated.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg and field name parameters now
+*# have "_" appended.
+*#**********************************************************************/
+
+#define REG_SET_VAL_RW(reg_, field_, val) ( \
+ reg_##_WRITE(reg_##_ADDR, ( \
+ (reg_##_READ(reg_##_ADDR) & REG_IMASK(reg_, field_)) | \
+ (REG_VAL_VAL(reg_, field_, val) << reg_##_##field_##_BITNR) ) \
+ ) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_EQL_WO
+*#
+*# PARAMETERS : reg_ : Name of a register, with "_" appended.
+*# field_: Name of a field, with "_" appended.
+*# val : Value to compare with field.
+*#
+*# RETURNS : TRUE, FALSE
+*#
+*# SIDE EFFECTS: May evaluate REG_SERROR and REG_VERROR.
+*#
+*# DESCRIPTION : Compare val parameter with field field in write only
+*# register reg. If the val parameter is out of range
+*# REG_VERROR is evaluated, and if the shadow register
+*# isn't initiated REG_SERROR is evaluated.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg and field name parameters now
+*# have "_" appended.
+*#**********************************************************************/
+
+#define REG_EQL_WO(reg_, field_, val) ( \
+ REG_CHECK_INIT(reg_) \
+ ( (REG_SVAL(reg_) & reg_##_##field_##_##field_##_MASK) >> \
+ reg_##_##field_##_BITNR \
+ ) == reg_##_##field_##_##field_##_VAL(reg_, field_, val) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_EQL_RO, REG_EQL_RW
+*#
+*# PARAMETERS : reg_ : Name of a register, with "_" appended.
+*# field_: Name of a field, with "_" appended.
+*# val : Value to compare with field.
+*#
+*# RETURNS : TRUE, FALSE
+*#
+*# SIDE EFFECTS: May evaluate REG_VERROR.
+*#
+*# DESCRIPTION : Compare val parameter with field field in read only
+*# or read write register reg. If the val parameter is
+*# out of range REG_VERROR is evaluated.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg and field name parameters now
+*# have "_" appended.
+*#**********************************************************************/
+
+#define REG_EQL_RO(reg_, field_, val) ( \
+ ( (reg_##_READ(reg_##_ADDR) & reg_##_##field_##_##field_##_MASK) >> \
+ reg_##_##field_##_BITNR \
+ ) == reg_##_##field_##_##field_##_VAL(reg_, field_, val) \
+)
+
+#define REG_EQL_RW REG_EQL_RO
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_IEQL_WO
+*#
+*# PARAMETERS : i : Interface number.
+*# reg_ : Name of a register, with "_" appended.
+*# field_: Name of a field, with "_" appended.
+*# val : Value to compare with field.
+*#
+*# RETURNS : TRUE, FALSE
+*#
+*# SIDE EFFECTS: May evaluate REG_VERROR, REG_IERROR, and REG_SERROR.
+*#
+*# DESCRIPTION : Compare val parameter with field field in write only
+*# register reg of interface i. If the val parameter is
+*# out of range REG_VERROR is evaluated, and if the
+*# interface number is out of range REG_IERROR is evaluated,
+*# and if the shadow register isn't initiated REG_SERROR
+*# is evaluated.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg and field name parameters now
+*# have "_" appended.
+*#**********************************************************************/
+
+#define REG_IEQL_WO(i, reg_, field_, val) ( \
+ REG_ICHECK_INIT(i, reg_) \
+ ( (REG_SVAL_I(i, reg_) & reg_##_##field_##_##field_##_MASK) >> \
+ reg_##_##field_##_BITNR \
+ ) == reg_##_##field_##_##field_##_VAL(reg_, field_, val) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_IEQL_RO, REG_IEQL_RW
+*#
+*# PARAMETERS : i : Interface number.
+*# reg_ : Name of a register.
+*# field_: Name of a field.
+*# val : Value to compare with field.
+*#
+*# RETURNS : TRUE, FALSE
+*#
+*# SIDE EFFECTS: May evaluate REG_VERROR and REG_IERROR.
+*#
+*# DESCRIPTION : Compare val parameter with field field in read only
+*# or read write register reg of interface i. If the val
+*# parameter is out of range REG_VERROR is evaluated, and
+*# if the interface number is out of range REG_IERROR is
+*# evaluated.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg and field name parameters now
+*# have "_" appended.
+*#**********************************************************************/
+
+#define REG_IEQL_RO(i, reg_, field_, val) ( \
+ ( (reg_##_READ(REG_ADDR_I(i, reg_)) & \
+ reg_##_##field_##_##field_##_MASK) >> reg_##_##field_##_BITNR \
+ ) == reg_##_##field_##_##field_##_VAL(reg_, field_, val) \
+)
+
+#define REG_IEQL_RW REG_IEQL_RO
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_RD_WO
+*#
+*# PARAMETERS : reg_ : Name of a register, with "_" appended.
+*#
+*# RETURNS : Contents of register reg.
+*#
+*# SIDE EFFECTS: May evaluate REG_SERROR.
+*#
+*# DESCRIPTION : Read contents of write only register reg, i.e. read
+*# the shadow register. If the shadow register isn't
+*# initiated REG_SERROR is evaluated.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg parameter now has "_" appended.
+*#**********************************************************************/
+
+#define REG_RD_WO(reg_) ( \
+ REG_CHECK_INIT(reg_) \
+ REG_SVAL(reg_) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_RD_RO, REG_RD_RW
+*#
+*# PARAMETERS : reg_ : Name of a register, with "_" appended.
+*#
+*# RETURNS : Contents of register reg.
+*#
+*# SIDE EFFECTS: none
+*#
+*# DESCRIPTION : Read contents of read only or read write register reg.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg parameter now has "_" appended.
+*#**********************************************************************/
+
+#define REG_RD_RO(reg_) ( \
+ reg_##_READ(reg_##_ADDR) \
+)
+
+#define REG_RD_RW REG_RD_RO
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_IRD_WO
+*#
+*# PARAMETERS : i : Interface number.
+*# reg_ : Name of a register, with "_" appended.
+*#
+*# RETURNS : Contents of register reg.
+*#
+*# SIDE EFFECTS: May evaluate REG_SERROR and REG_IERROR.
+*#
+*# DESCRIPTION : Read contents of write only register reg, i.e. read
+*# the shadow register of interface i. If the shadow register
+*# isn't initiated REG_SERROR is evaluated, and if the
+*# interface number is out of range REG_IERROR is evaluated.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg parameter now has "_" appended.
+*#**********************************************************************/
+
+#define REG_IRD_WO(i, reg_) ( \
+ REG_ICHECK_INIT(i, reg_) \
+ REG_SVAL_I(i, reg_) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_IRD_RO, REG_IRD_RW
+*#
+*# PARAMETERS : i : Interface number.
+*# reg_ : Name of a register.
+*#
+*# RETURNS : Contents of register reg.
+*#
+*# SIDE EFFECTS: none
+*#
+*# DESCRIPTION : Read contents of read only or read write register reg
+*# of interface i.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg parameter now has "_" appended.
+*#**********************************************************************/
+
+#define REG_IRD_RO(i, reg_) ( \
+ reg_##_READ(REG_ADDR_I(i, reg_)) \
+)
+
+#define REG_IRD_RW REG_IRD_RO
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_WR_WO
+*#
+*# PARAMETERS : reg_ : Name of a register, with "_" appended.
+*# var : Variable (or value) to write to reg.
+*#
+*# RETURNS : integer value written to register reg.
+*#
+*# SIDE EFFECTS: May evaluate REG_SERROR.
+*#
+*# DESCRIPTION : Write value of var parameter to register reg and to
+*# the shadow register. If the shadow register
+*# isn't initiated REG_SERROR is evaluated.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg parameter now has "_" appended.
+*#**********************************************************************/
+
+#define REG_WR_WO(reg_, var) ( \
+ *reg_##_SADDR = ( \
+ REG_CHECK_INIT(reg_) \
+ (reg_##_TYPE var) \
+ ), \
+ reg_##_WRITE(reg_##_ADDR, *reg_##_SADDR) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_WR_RW
+*#
+*# PARAMETERS : reg_ : Name of a register, with "_" appended.
+*# var : Variable (or value) to write to reg.
+*#
+*# RETURNS : integer value written to register reg.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of var parameter to register reg.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg parameter now has "_" appended.
+*#**********************************************************************/
+
+#define REG_WR_RW(reg_, var) ( \
+ reg_##_WRITE(reg_##_ADDR, (reg_##_TYPE (var))) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_IWR_WO
+*#
+*# PARAMETERS : i : Interface number.
+*# reg_ : Name of a register, with "_" appended.
+*# var : Variable (or value) to write to reg.
+*#
+*# RETURNS : integer value written to register reg.
+*#
+*# SIDE EFFECTS: May evaluate REG_SERROR.
+*#
+*# DESCRIPTION : Write value of var parameter to register reg and to
+*# the shadow register of interface i. If the shadow
+*# register isn't initiated REG_SERROR is evaluated.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg parameter now has "_" appended.
+*#**********************************************************************/
+
+#define REG_IWR_WO(i, reg_, var) ( \
+ *REG_SADDR_I(i, reg_) = ( \
+ REG_ICHECK_INIT(i, reg_) \
+ reg_##_TYPE (var) \
+ ), \
+ reg_##_WRITE(REG_ADDR_I(i, reg_), *REG_SADDR_I(i, reg_)) \
+)
+
+/*#**********************************************************************
+*#
+*# MACRO NAME : REG_IWR_RW
+*#
+*# PARAMETERS : i : Interface number.
+*# reg_ : Name of a register.
+*# var : Variable (or value) to write to reg.
+*#
+*# RETURNS : integer value written to register reg.
+*#
+*# SIDE EFFECTS: None.
+*#
+*# DESCRIPTION : Write value of var parameter to register reg of
+*# interface i.
+*#
+*#----------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# Apr 01 1998 Jan Bengtsson Initial version
+*# Oct 01 2002 Hans-Peter Nilsson Reg parameter now has "_" appended.
+*#**********************************************************************/
+
+#define REG_IWR_RW(i, reg_, var) ( \
+ reg_##_WRITE(REG_ADDR_I(i, reg_), (reg_##_TYPE (var))) \
+)
+
+/*
+ * Can't write to a read only register, i.e. NO REG_WR_RO, REG_IWR_RO
+ * macros.
+ */
+
+#endif /* __REG_GENERAL_INT_H__ */
+
+/*
+ * R_ALT_SER_BAUDRATE
+ * - type: WO
+ * - addr: 0xb000005c
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_ALT_SER_BAUDRATE__ADDR (REG_TYPECAST_UDWORD 0xb000005c)
+
+#ifndef REG_NO_SHADOW
+#define R_ALT_SER_BAUDRATE__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_ALT_SER_BAUDRATE + 0))
+#define R_ALT_SER_BAUDRATE__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_ALT_SER_BAUDRATE + 0))
+#else /* REG_NO_SHADOW */
+#define R_ALT_SER_BAUDRATE__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_ALT_SER_BAUDRATE__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_ALT_SER_BAUDRATE__STYPECAST REG_STYPECAST_UDWORD
+#define R_ALT_SER_BAUDRATE__SVAL REG_SVAL_SHADOW
+#define R_ALT_SER_BAUDRATE__SVAL_I REG_SVAL_I_SHADOW
+#define R_ALT_SER_BAUDRATE__TYPECAST REG_TYPECAST_UDWORD
+#define R_ALT_SER_BAUDRATE__TYPE (REG_UDWORD)
+#define R_ALT_SER_BAUDRATE__GET REG_GET_WO
+#define R_ALT_SER_BAUDRATE__IGET REG_IGET_WO
+#define R_ALT_SER_BAUDRATE__SET REG_SET_WO
+#define R_ALT_SER_BAUDRATE__ISET REG_ISET_WO
+#define R_ALT_SER_BAUDRATE__SET_VAL REG_SET_VAL_WO
+#define R_ALT_SER_BAUDRATE__EQL REG_EQL_WO
+#define R_ALT_SER_BAUDRATE__IEQL REG_IEQL_WO
+#define R_ALT_SER_BAUDRATE__RD REG_RD_WO
+#define R_ALT_SER_BAUDRATE__IRD REG_IRD_WO
+#define R_ALT_SER_BAUDRATE__WR REG_WR_WO
+#define R_ALT_SER_BAUDRATE__IWR REG_IWR_WO
+
+#define R_ALT_SER_BAUDRATE__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_ALT_SER_BAUDRATE__ser3_tr__ser3_tr__MASK 0x30000000U
+#define R_ALT_SER_BAUDRATE__ser3_rec__ser3_rec__MASK 0x03000000U
+#define R_ALT_SER_BAUDRATE__ser2_tr__ser2_tr__MASK 0x00300000U
+#define R_ALT_SER_BAUDRATE__ser2_rec__ser2_rec__MASK 0x00030000U
+#define R_ALT_SER_BAUDRATE__ser1_tr__ser1_tr__MASK 0x00003000U
+#define R_ALT_SER_BAUDRATE__ser1_rec__ser1_rec__MASK 0x00000300U
+#define R_ALT_SER_BAUDRATE__ser0_tr__ser0_tr__MASK 0x00000030U
+#define R_ALT_SER_BAUDRATE__ser0_rec__ser0_rec__MASK 0x00000003U
+
+#define R_ALT_SER_BAUDRATE__ser3_tr__MAX 0x3
+#define R_ALT_SER_BAUDRATE__ser3_rec__MAX 0x3
+#define R_ALT_SER_BAUDRATE__ser2_tr__MAX 0x3
+#define R_ALT_SER_BAUDRATE__ser2_rec__MAX 0x3
+#define R_ALT_SER_BAUDRATE__ser1_tr__MAX 0x3
+#define R_ALT_SER_BAUDRATE__ser1_rec__MAX 0x3
+#define R_ALT_SER_BAUDRATE__ser0_tr__MAX 0x3
+#define R_ALT_SER_BAUDRATE__ser0_rec__MAX 0x3
+
+#define R_ALT_SER_BAUDRATE__ser3_tr__MIN 0
+#define R_ALT_SER_BAUDRATE__ser3_rec__MIN 0
+#define R_ALT_SER_BAUDRATE__ser2_tr__MIN 0
+#define R_ALT_SER_BAUDRATE__ser2_rec__MIN 0
+#define R_ALT_SER_BAUDRATE__ser1_tr__MIN 0
+#define R_ALT_SER_BAUDRATE__ser1_rec__MIN 0
+#define R_ALT_SER_BAUDRATE__ser0_tr__MIN 0
+#define R_ALT_SER_BAUDRATE__ser0_rec__MIN 0
+
+#define R_ALT_SER_BAUDRATE__ser3_tr__BITNR 28
+#define R_ALT_SER_BAUDRATE__ser3_rec__BITNR 24
+#define R_ALT_SER_BAUDRATE__ser2_tr__BITNR 20
+#define R_ALT_SER_BAUDRATE__ser2_rec__BITNR 16
+#define R_ALT_SER_BAUDRATE__ser1_tr__BITNR 12
+#define R_ALT_SER_BAUDRATE__ser1_rec__BITNR 8
+#define R_ALT_SER_BAUDRATE__ser0_tr__BITNR 4
+#define R_ALT_SER_BAUDRATE__ser0_rec__BITNR 0
+
+#define R_ALT_SER_BAUDRATE__ser3_tr__ser3_tr__VAL REG_VAL_ENUM
+#define R_ALT_SER_BAUDRATE__ser3_rec__ser3_rec__VAL REG_VAL_ENUM
+#define R_ALT_SER_BAUDRATE__ser2_tr__ser2_tr__VAL REG_VAL_ENUM
+#define R_ALT_SER_BAUDRATE__ser2_rec__ser2_rec__VAL REG_VAL_ENUM
+#define R_ALT_SER_BAUDRATE__ser1_tr__ser1_tr__VAL REG_VAL_ENUM
+#define R_ALT_SER_BAUDRATE__ser1_rec__ser1_rec__VAL REG_VAL_ENUM
+#define R_ALT_SER_BAUDRATE__ser0_tr__ser0_tr__VAL REG_VAL_ENUM
+#define R_ALT_SER_BAUDRATE__ser0_rec__ser0_rec__VAL REG_VAL_ENUM
+
+#define R_ALT_SER_BAUDRATE__ser3_tr__ser3_tr__extern 2
+#define R_ALT_SER_BAUDRATE__ser3_tr__ser3_tr__normal 0
+#define R_ALT_SER_BAUDRATE__ser3_tr__ser3_tr__prescale 1
+#define R_ALT_SER_BAUDRATE__ser3_tr__ser3_tr__timer 3
+#define R_ALT_SER_BAUDRATE__ser3_rec__ser3_rec__extern 2
+#define R_ALT_SER_BAUDRATE__ser3_rec__ser3_rec__normal 0
+#define R_ALT_SER_BAUDRATE__ser3_rec__ser3_rec__prescale 1
+#define R_ALT_SER_BAUDRATE__ser3_rec__ser3_rec__timer 3
+#define R_ALT_SER_BAUDRATE__ser2_tr__ser2_tr__extern 2
+#define R_ALT_SER_BAUDRATE__ser2_tr__ser2_tr__normal 0
+#define R_ALT_SER_BAUDRATE__ser2_tr__ser2_tr__prescale 1
+#define R_ALT_SER_BAUDRATE__ser2_tr__ser2_tr__timer 3
+#define R_ALT_SER_BAUDRATE__ser2_rec__ser2_rec__extern 2
+#define R_ALT_SER_BAUDRATE__ser2_rec__ser2_rec__normal 0
+#define R_ALT_SER_BAUDRATE__ser2_rec__ser2_rec__prescale 1
+#define R_ALT_SER_BAUDRATE__ser2_rec__ser2_rec__timer 3
+#define R_ALT_SER_BAUDRATE__ser1_tr__ser1_tr__extern 2
+#define R_ALT_SER_BAUDRATE__ser1_tr__ser1_tr__normal 0
+#define R_ALT_SER_BAUDRATE__ser1_tr__ser1_tr__prescale 1
+#define R_ALT_SER_BAUDRATE__ser1_tr__ser1_tr__timer 3
+#define R_ALT_SER_BAUDRATE__ser1_rec__ser1_rec__extern 2
+#define R_ALT_SER_BAUDRATE__ser1_rec__ser1_rec__normal 0
+#define R_ALT_SER_BAUDRATE__ser1_rec__ser1_rec__prescale 1
+#define R_ALT_SER_BAUDRATE__ser1_rec__ser1_rec__timer 3
+#define R_ALT_SER_BAUDRATE__ser0_tr__ser0_tr__extern 2
+#define R_ALT_SER_BAUDRATE__ser0_tr__ser0_tr__normal 0
+#define R_ALT_SER_BAUDRATE__ser0_tr__ser0_tr__prescale 1
+#define R_ALT_SER_BAUDRATE__ser0_tr__ser0_tr__timer 3
+#define R_ALT_SER_BAUDRATE__ser0_rec__ser0_rec__extern 2
+#define R_ALT_SER_BAUDRATE__ser0_rec__ser0_rec__normal 0
+#define R_ALT_SER_BAUDRATE__ser0_rec__ser0_rec__prescale 1
+#define R_ALT_SER_BAUDRATE__ser0_rec__ser0_rec__timer 3
+
+#endif
+
+/*
+ * R_ATA_CONFIG
+ * - type: WO
+ * - addr: 0xb0000044
+ * - group: ATA interface registers
+ */
+
+#if USE_GROUP__ATA_interface_registers
+
+#define R_ATA_CONFIG__ADDR (REG_TYPECAST_UDWORD 0xb0000044)
+
+#ifndef REG_NO_SHADOW
+#define R_ATA_CONFIG__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_ATA_CONFIG + 0))
+#define R_ATA_CONFIG__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_ATA_CONFIG + 0))
+#else /* REG_NO_SHADOW */
+#define R_ATA_CONFIG__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_ATA_CONFIG__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_ATA_CONFIG__STYPECAST REG_STYPECAST_UDWORD
+#define R_ATA_CONFIG__SVAL REG_SVAL_SHADOW
+#define R_ATA_CONFIG__SVAL_I REG_SVAL_I_SHADOW
+#define R_ATA_CONFIG__TYPECAST REG_TYPECAST_UDWORD
+#define R_ATA_CONFIG__TYPE (REG_UDWORD)
+#define R_ATA_CONFIG__GET REG_GET_WO
+#define R_ATA_CONFIG__IGET REG_IGET_WO
+#define R_ATA_CONFIG__SET REG_SET_WO
+#define R_ATA_CONFIG__ISET REG_ISET_WO
+#define R_ATA_CONFIG__SET_VAL REG_SET_VAL_WO
+#define R_ATA_CONFIG__EQL REG_EQL_WO
+#define R_ATA_CONFIG__IEQL REG_IEQL_WO
+#define R_ATA_CONFIG__RD REG_RD_WO
+#define R_ATA_CONFIG__IRD REG_IRD_WO
+#define R_ATA_CONFIG__WR REG_WR_WO
+#define R_ATA_CONFIG__IWR REG_IWR_WO
+
+#define R_ATA_CONFIG__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_ATA_CONFIG__enable__enable__MASK 0x02000000U
+#define R_ATA_CONFIG__dma_strobe__dma_strobe__MASK 0x01f00000U
+#define R_ATA_CONFIG__dma_hold__dma_hold__MASK 0x000f8000U
+#define R_ATA_CONFIG__pio_setup__pio_setup__MASK 0x00007c00U
+#define R_ATA_CONFIG__pio_strobe__pio_strobe__MASK 0x000003e0U
+#define R_ATA_CONFIG__pio_hold__pio_hold__MASK 0x0000001fU
+
+#define R_ATA_CONFIG__enable__MAX 0x1
+#define R_ATA_CONFIG__dma_strobe__MAX 31
+#define R_ATA_CONFIG__dma_hold__MAX 31
+#define R_ATA_CONFIG__pio_setup__MAX 31
+#define R_ATA_CONFIG__pio_strobe__MAX 31
+#define R_ATA_CONFIG__pio_hold__MAX 31
+
+#define R_ATA_CONFIG__enable__MIN 0
+#define R_ATA_CONFIG__dma_strobe__MIN 0
+#define R_ATA_CONFIG__dma_hold__MIN 0
+#define R_ATA_CONFIG__pio_setup__MIN 0
+#define R_ATA_CONFIG__pio_strobe__MIN 0
+#define R_ATA_CONFIG__pio_hold__MIN 0
+
+#define R_ATA_CONFIG__enable__BITNR 25
+#define R_ATA_CONFIG__dma_strobe__BITNR 20
+#define R_ATA_CONFIG__dma_hold__BITNR 15
+#define R_ATA_CONFIG__pio_setup__BITNR 10
+#define R_ATA_CONFIG__pio_strobe__BITNR 5
+#define R_ATA_CONFIG__pio_hold__BITNR 0
+
+#define R_ATA_CONFIG__enable__enable__VAL REG_VAL_ENUM
+#define R_ATA_CONFIG__dma_strobe__dma_strobe__VAL REG_VAL_VAL
+#define R_ATA_CONFIG__dma_hold__dma_hold__VAL REG_VAL_VAL
+#define R_ATA_CONFIG__pio_setup__pio_setup__VAL REG_VAL_VAL
+#define R_ATA_CONFIG__pio_strobe__pio_strobe__VAL REG_VAL_VAL
+#define R_ATA_CONFIG__pio_hold__pio_hold__VAL REG_VAL_VAL
+
+#define R_ATA_CONFIG__enable__enable__off 0
+#define R_ATA_CONFIG__enable__enable__on 1
+
+#endif
+
+/*
+ * R_ATA_CTRL_DATA
+ * - type: WO
+ * - addr: 0xb0000040
+ * - group: ATA interface registers
+ */
+
+#if USE_GROUP__ATA_interface_registers
+
+#define R_ATA_CTRL_DATA__ADDR (REG_TYPECAST_UDWORD 0xb0000040)
+
+#ifndef REG_NO_SHADOW
+#define R_ATA_CTRL_DATA__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_ATA_CTRL_DATA + 0))
+#define R_ATA_CTRL_DATA__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_ATA_CTRL_DATA + 0))
+#else /* REG_NO_SHADOW */
+#define R_ATA_CTRL_DATA__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_ATA_CTRL_DATA__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_ATA_CTRL_DATA__STYPECAST REG_STYPECAST_UDWORD
+#define R_ATA_CTRL_DATA__SVAL REG_SVAL_SHADOW
+#define R_ATA_CTRL_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_ATA_CTRL_DATA__TYPECAST REG_TYPECAST_UDWORD
+#define R_ATA_CTRL_DATA__TYPE (REG_UDWORD)
+#define R_ATA_CTRL_DATA__GET REG_GET_WO
+#define R_ATA_CTRL_DATA__IGET REG_IGET_WO
+#define R_ATA_CTRL_DATA__SET REG_SET_WO
+#define R_ATA_CTRL_DATA__ISET REG_ISET_WO
+#define R_ATA_CTRL_DATA__SET_VAL REG_SET_VAL_WO
+#define R_ATA_CTRL_DATA__EQL REG_EQL_WO
+#define R_ATA_CTRL_DATA__IEQL REG_IEQL_WO
+#define R_ATA_CTRL_DATA__RD REG_RD_WO
+#define R_ATA_CTRL_DATA__IRD REG_IRD_WO
+#define R_ATA_CTRL_DATA__WR REG_WR_WO
+#define R_ATA_CTRL_DATA__IWR REG_IWR_WO
+
+#define R_ATA_CTRL_DATA__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_ATA_CTRL_DATA__sel__sel__MASK 0xc0000000U
+#define R_ATA_CTRL_DATA__cs1__cs1__MASK 0x20000000U
+#define R_ATA_CTRL_DATA__cs0__cs0__MASK 0x10000000U
+#define R_ATA_CTRL_DATA__addr__addr__MASK 0x0e000000U
+#define R_ATA_CTRL_DATA__rw__rw__MASK 0x01000000U
+#define R_ATA_CTRL_DATA__src_dst__src_dst__MASK 0x00800000U
+#define R_ATA_CTRL_DATA__handsh__handsh__MASK 0x00400000U
+#define R_ATA_CTRL_DATA__multi__multi__MASK 0x00200000U
+#define R_ATA_CTRL_DATA__dma_size__dma_size__MASK 0x00100000U
+#define R_ATA_CTRL_DATA__data__data__MASK 0x0000ffffU
+
+#define R_ATA_CTRL_DATA__sel__MAX 3
+#define R_ATA_CTRL_DATA__cs1__MAX 0x1
+#define R_ATA_CTRL_DATA__cs0__MAX 0x1
+#define R_ATA_CTRL_DATA__addr__MAX 7
+#define R_ATA_CTRL_DATA__rw__MAX 0x1
+#define R_ATA_CTRL_DATA__src_dst__MAX 0x1
+#define R_ATA_CTRL_DATA__handsh__MAX 0x1
+#define R_ATA_CTRL_DATA__multi__MAX 0x1
+#define R_ATA_CTRL_DATA__dma_size__MAX 0x1
+#define R_ATA_CTRL_DATA__data__MAX 0xffff
+
+#define R_ATA_CTRL_DATA__sel__MIN 0
+#define R_ATA_CTRL_DATA__cs1__MIN 0
+#define R_ATA_CTRL_DATA__cs0__MIN 0
+#define R_ATA_CTRL_DATA__addr__MIN 0
+#define R_ATA_CTRL_DATA__rw__MIN 0
+#define R_ATA_CTRL_DATA__src_dst__MIN 0
+#define R_ATA_CTRL_DATA__handsh__MIN 0
+#define R_ATA_CTRL_DATA__multi__MIN 0
+#define R_ATA_CTRL_DATA__dma_size__MIN 0
+#define R_ATA_CTRL_DATA__data__MIN 0
+
+#define R_ATA_CTRL_DATA__sel__BITNR 30
+#define R_ATA_CTRL_DATA__cs1__BITNR 29
+#define R_ATA_CTRL_DATA__cs0__BITNR 28
+#define R_ATA_CTRL_DATA__addr__BITNR 25
+#define R_ATA_CTRL_DATA__rw__BITNR 24
+#define R_ATA_CTRL_DATA__src_dst__BITNR 23
+#define R_ATA_CTRL_DATA__handsh__BITNR 22
+#define R_ATA_CTRL_DATA__multi__BITNR 21
+#define R_ATA_CTRL_DATA__dma_size__BITNR 20
+#define R_ATA_CTRL_DATA__data__BITNR 0
+
+#define R_ATA_CTRL_DATA__sel__sel__VAL REG_VAL_VAL
+#define R_ATA_CTRL_DATA__cs1__cs1__VAL REG_VAL_ENUM
+#define R_ATA_CTRL_DATA__cs0__cs0__VAL REG_VAL_ENUM
+#define R_ATA_CTRL_DATA__addr__addr__VAL REG_VAL_VAL
+#define R_ATA_CTRL_DATA__rw__rw__VAL REG_VAL_ENUM
+#define R_ATA_CTRL_DATA__src_dst__src_dst__VAL REG_VAL_ENUM
+#define R_ATA_CTRL_DATA__handsh__handsh__VAL REG_VAL_ENUM
+#define R_ATA_CTRL_DATA__multi__multi__VAL REG_VAL_ENUM
+#define R_ATA_CTRL_DATA__dma_size__dma_size__VAL REG_VAL_ENUM
+#define R_ATA_CTRL_DATA__data__data__VAL REG_VAL_VAL
+
+#define R_ATA_CTRL_DATA__cs1__cs1__active 1
+#define R_ATA_CTRL_DATA__cs1__cs1__inactive 0
+#define R_ATA_CTRL_DATA__cs0__cs0__active 1
+#define R_ATA_CTRL_DATA__cs0__cs0__inactive 0
+#define R_ATA_CTRL_DATA__rw__rw__read 1
+#define R_ATA_CTRL_DATA__rw__rw__write 0
+#define R_ATA_CTRL_DATA__src_dst__src_dst__dma 1
+#define R_ATA_CTRL_DATA__src_dst__src_dst__register 0
+#define R_ATA_CTRL_DATA__handsh__handsh__dma 1
+#define R_ATA_CTRL_DATA__handsh__handsh__pio 0
+#define R_ATA_CTRL_DATA__multi__multi__off 0
+#define R_ATA_CTRL_DATA__multi__multi__on 1
+#define R_ATA_CTRL_DATA__dma_size__dma_size__byte 1
+#define R_ATA_CTRL_DATA__dma_size__dma_size__word 0
+
+#endif
+
+/*
+ * R_ATA_STATUS_DATA
+ * - type: RO
+ * - addr: 0xb0000040
+ * - group: ATA interface registers
+ */
+
+#if USE_GROUP__ATA_interface_registers
+
+#define R_ATA_STATUS_DATA__ADDR (REG_TYPECAST_UDWORD 0xb0000040)
+#define R_ATA_STATUS_DATA__SVAL REG_SVAL_SHADOW
+#define R_ATA_STATUS_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_ATA_STATUS_DATA__TYPECAST REG_TYPECAST_UDWORD
+#define R_ATA_STATUS_DATA__TYPE (REG_UDWORD)
+#define R_ATA_STATUS_DATA__GET REG_GET_RO
+#define R_ATA_STATUS_DATA__IGET REG_IGET_RO
+#define R_ATA_STATUS_DATA__SET REG_SET_RO
+#define R_ATA_STATUS_DATA__ISET REG_ISET_RO
+#define R_ATA_STATUS_DATA__SET_VAL REG_SET_VAL_RO
+#define R_ATA_STATUS_DATA__EQL REG_EQL_RO
+#define R_ATA_STATUS_DATA__IEQL REG_IEQL_RO
+#define R_ATA_STATUS_DATA__RD REG_RD_RO
+#define R_ATA_STATUS_DATA__IRD REG_IRD_RO
+#define R_ATA_STATUS_DATA__WR REG_WR_RO
+#define R_ATA_STATUS_DATA__IWR REG_IWR_RO
+
+#define R_ATA_STATUS_DATA__READ(addr) \
+ (*(addr))
+
+#define R_ATA_STATUS_DATA__busy__busy__MASK 0x00040000U
+#define R_ATA_STATUS_DATA__tr_rdy__tr_rdy__MASK 0x00020000U
+#define R_ATA_STATUS_DATA__dav__dav__MASK 0x00010000U
+#define R_ATA_STATUS_DATA__data__data__MASK 0x0000ffffU
+
+#define R_ATA_STATUS_DATA__busy__MAX 0x1
+#define R_ATA_STATUS_DATA__tr_rdy__MAX 0x1
+#define R_ATA_STATUS_DATA__dav__MAX 0x1
+#define R_ATA_STATUS_DATA__data__MAX 0xffff
+
+#define R_ATA_STATUS_DATA__busy__MIN 0
+#define R_ATA_STATUS_DATA__tr_rdy__MIN 0
+#define R_ATA_STATUS_DATA__dav__MIN 0
+#define R_ATA_STATUS_DATA__data__MIN 0
+
+#define R_ATA_STATUS_DATA__busy__BITNR 18
+#define R_ATA_STATUS_DATA__tr_rdy__BITNR 17
+#define R_ATA_STATUS_DATA__dav__BITNR 16
+#define R_ATA_STATUS_DATA__data__BITNR 0
+
+#define R_ATA_STATUS_DATA__busy__busy__VAL REG_VAL_ENUM
+#define R_ATA_STATUS_DATA__tr_rdy__tr_rdy__VAL REG_VAL_ENUM
+#define R_ATA_STATUS_DATA__dav__dav__VAL REG_VAL_ENUM
+#define R_ATA_STATUS_DATA__data__data__VAL REG_VAL_VAL
+
+#define R_ATA_STATUS_DATA__busy__busy__no 0
+#define R_ATA_STATUS_DATA__busy__busy__yes 1
+#define R_ATA_STATUS_DATA__tr_rdy__tr_rdy__busy 0
+#define R_ATA_STATUS_DATA__tr_rdy__tr_rdy__ready 1
+#define R_ATA_STATUS_DATA__dav__dav__data 1
+#define R_ATA_STATUS_DATA__dav__dav__nodata 0
+
+#endif
+
+/*
+ * R_ATA_TRANSFER_CNT
+ * - type: RW
+ * - addr: 0xb0000048
+ * - group: ATA interface registers
+ */
+
+#if USE_GROUP__ATA_interface_registers
+
+#define R_ATA_TRANSFER_CNT__ADDR (REG_TYPECAST_UDWORD 0xb0000048)
+#define R_ATA_TRANSFER_CNT__SVAL REG_SVAL_SHADOW
+#define R_ATA_TRANSFER_CNT__SVAL_I REG_SVAL_I_SHADOW
+#define R_ATA_TRANSFER_CNT__TYPECAST REG_TYPECAST_UDWORD
+#define R_ATA_TRANSFER_CNT__TYPE (REG_UDWORD)
+#define R_ATA_TRANSFER_CNT__GET REG_GET_RW
+#define R_ATA_TRANSFER_CNT__IGET REG_IGET_RW
+#define R_ATA_TRANSFER_CNT__SET REG_SET_RW
+#define R_ATA_TRANSFER_CNT__ISET REG_ISET_RW
+#define R_ATA_TRANSFER_CNT__SET_VAL REG_SET_VAL_RW
+#define R_ATA_TRANSFER_CNT__EQL REG_EQL_RW
+#define R_ATA_TRANSFER_CNT__IEQL REG_IEQL_RW
+#define R_ATA_TRANSFER_CNT__RD REG_RD_RW
+#define R_ATA_TRANSFER_CNT__IRD REG_IRD_RW
+#define R_ATA_TRANSFER_CNT__WR REG_WR_RW
+#define R_ATA_TRANSFER_CNT__IWR REG_IWR_RW
+
+#define R_ATA_TRANSFER_CNT__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_ATA_TRANSFER_CNT__READ(addr) \
+ (*(addr))
+
+#define R_ATA_TRANSFER_CNT__count__count__MASK 0x0001ffffU
+
+#define R_ATA_TRANSFER_CNT__count__MAX 0x1ffff
+
+#define R_ATA_TRANSFER_CNT__count__MIN 0
+
+#define R_ATA_TRANSFER_CNT__count__BITNR 0
+
+#define R_ATA_TRANSFER_CNT__count__count__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_BUS_CONFIG
+ * - type: WO
+ * - addr: 0xb0000004
+ * - group: Bus interface configuration registers
+ */
+
+#if USE_GROUP__Bus_interface_configuration_registers
+
+#define R_BUS_CONFIG__ADDR (REG_TYPECAST_UDWORD 0xb0000004)
+
+#ifndef REG_NO_SHADOW
+#define R_BUS_CONFIG__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_BUS_CONFIG + 0))
+#define R_BUS_CONFIG__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_BUS_CONFIG + 0))
+#else /* REG_NO_SHADOW */
+#define R_BUS_CONFIG__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_BUS_CONFIG__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_BUS_CONFIG__STYPECAST REG_STYPECAST_UDWORD
+#define R_BUS_CONFIG__SVAL REG_SVAL_SHADOW
+#define R_BUS_CONFIG__SVAL_I REG_SVAL_I_SHADOW
+#define R_BUS_CONFIG__TYPECAST REG_TYPECAST_UDWORD
+#define R_BUS_CONFIG__TYPE (REG_UDWORD)
+#define R_BUS_CONFIG__GET REG_GET_WO
+#define R_BUS_CONFIG__IGET REG_IGET_WO
+#define R_BUS_CONFIG__SET REG_SET_WO
+#define R_BUS_CONFIG__ISET REG_ISET_WO
+#define R_BUS_CONFIG__SET_VAL REG_SET_VAL_WO
+#define R_BUS_CONFIG__EQL REG_EQL_WO
+#define R_BUS_CONFIG__IEQL REG_IEQL_WO
+#define R_BUS_CONFIG__RD REG_RD_WO
+#define R_BUS_CONFIG__IRD REG_IRD_WO
+#define R_BUS_CONFIG__WR REG_WR_WO
+#define R_BUS_CONFIG__IWR REG_IWR_WO
+
+#define R_BUS_CONFIG__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_BUS_CONFIG__sram_type__sram_type__MASK 0x00000200U
+#define R_BUS_CONFIG__dma_burst__dma_burst__MASK 0x00000100U
+#define R_BUS_CONFIG__pcs4_7_wr__pcs4_7_wr__MASK 0x00000080U
+#define R_BUS_CONFIG__pcs0_3_wr__pcs0_3_wr__MASK 0x00000040U
+#define R_BUS_CONFIG__sram_wr__sram_wr__MASK 0x00000020U
+#define R_BUS_CONFIG__flash_wr__flash_wr__MASK 0x00000010U
+#define R_BUS_CONFIG__pcs4_7_bw__pcs4_7_bw__MASK 0x00000008U
+#define R_BUS_CONFIG__pcs0_3_bw__pcs0_3_bw__MASK 0x00000004U
+#define R_BUS_CONFIG__sram_bw__sram_bw__MASK 0x00000002U
+#define R_BUS_CONFIG__flash_bw__flash_bw__MASK 0x00000001U
+
+#define R_BUS_CONFIG__sram_type__MAX 0x1
+#define R_BUS_CONFIG__dma_burst__MAX 0x1
+#define R_BUS_CONFIG__pcs4_7_wr__MAX 0x1
+#define R_BUS_CONFIG__pcs0_3_wr__MAX 0x1
+#define R_BUS_CONFIG__sram_wr__MAX 0x1
+#define R_BUS_CONFIG__flash_wr__MAX 0x1
+#define R_BUS_CONFIG__pcs4_7_bw__MAX 0x1
+#define R_BUS_CONFIG__pcs0_3_bw__MAX 0x1
+#define R_BUS_CONFIG__sram_bw__MAX 0x1
+#define R_BUS_CONFIG__flash_bw__MAX 0x1
+
+#define R_BUS_CONFIG__sram_type__MIN 0
+#define R_BUS_CONFIG__dma_burst__MIN 0
+#define R_BUS_CONFIG__pcs4_7_wr__MIN 0
+#define R_BUS_CONFIG__pcs0_3_wr__MIN 0
+#define R_BUS_CONFIG__sram_wr__MIN 0
+#define R_BUS_CONFIG__flash_wr__MIN 0
+#define R_BUS_CONFIG__pcs4_7_bw__MIN 0
+#define R_BUS_CONFIG__pcs0_3_bw__MIN 0
+#define R_BUS_CONFIG__sram_bw__MIN 0
+#define R_BUS_CONFIG__flash_bw__MIN 0
+
+#define R_BUS_CONFIG__sram_type__BITNR 9
+#define R_BUS_CONFIG__dma_burst__BITNR 8
+#define R_BUS_CONFIG__pcs4_7_wr__BITNR 7
+#define R_BUS_CONFIG__pcs0_3_wr__BITNR 6
+#define R_BUS_CONFIG__sram_wr__BITNR 5
+#define R_BUS_CONFIG__flash_wr__BITNR 4
+#define R_BUS_CONFIG__pcs4_7_bw__BITNR 3
+#define R_BUS_CONFIG__pcs0_3_bw__BITNR 2
+#define R_BUS_CONFIG__sram_bw__BITNR 1
+#define R_BUS_CONFIG__flash_bw__BITNR 0
+
+#define R_BUS_CONFIG__sram_type__sram_type__VAL REG_VAL_ENUM
+#define R_BUS_CONFIG__dma_burst__dma_burst__VAL REG_VAL_ENUM
+#define R_BUS_CONFIG__pcs4_7_wr__pcs4_7_wr__VAL REG_VAL_ENUM
+#define R_BUS_CONFIG__pcs0_3_wr__pcs0_3_wr__VAL REG_VAL_ENUM
+#define R_BUS_CONFIG__sram_wr__sram_wr__VAL REG_VAL_ENUM
+#define R_BUS_CONFIG__flash_wr__flash_wr__VAL REG_VAL_ENUM
+#define R_BUS_CONFIG__pcs4_7_bw__pcs4_7_bw__VAL REG_VAL_ENUM
+#define R_BUS_CONFIG__pcs0_3_bw__pcs0_3_bw__VAL REG_VAL_ENUM
+#define R_BUS_CONFIG__sram_bw__sram_bw__VAL REG_VAL_ENUM
+#define R_BUS_CONFIG__flash_bw__flash_bw__VAL REG_VAL_ENUM
+
+#define R_BUS_CONFIG__sram_type__sram_type__bwe 0
+#define R_BUS_CONFIG__sram_type__sram_type__cwe 1
+#define R_BUS_CONFIG__dma_burst__dma_burst__burst16 1
+#define R_BUS_CONFIG__dma_burst__dma_burst__burst32 0
+#define R_BUS_CONFIG__pcs4_7_wr__pcs4_7_wr__ext 1
+#define R_BUS_CONFIG__pcs4_7_wr__pcs4_7_wr__norm 0
+#define R_BUS_CONFIG__pcs0_3_wr__pcs0_3_wr__ext 1
+#define R_BUS_CONFIG__pcs0_3_wr__pcs0_3_wr__norm 0
+#define R_BUS_CONFIG__sram_wr__sram_wr__ext 1
+#define R_BUS_CONFIG__sram_wr__sram_wr__norm 0
+#define R_BUS_CONFIG__flash_wr__flash_wr__ext 1
+#define R_BUS_CONFIG__flash_wr__flash_wr__norm 0
+#define R_BUS_CONFIG__pcs4_7_bw__pcs4_7_bw__bw16 0
+#define R_BUS_CONFIG__pcs4_7_bw__pcs4_7_bw__bw32 1
+#define R_BUS_CONFIG__pcs0_3_bw__pcs0_3_bw__bw16 0
+#define R_BUS_CONFIG__pcs0_3_bw__pcs0_3_bw__bw32 1
+#define R_BUS_CONFIG__sram_bw__sram_bw__bw16 0
+#define R_BUS_CONFIG__sram_bw__sram_bw__bw32 1
+#define R_BUS_CONFIG__flash_bw__flash_bw__bw16 0
+#define R_BUS_CONFIG__flash_bw__flash_bw__bw32 1
+
+#endif
+
+/*
+ * R_BUS_STATUS
+ * - type: RO
+ * - addr: 0xb0000004
+ * - group: Bus interface configuration registers
+ */
+
+#if USE_GROUP__Bus_interface_configuration_registers
+
+#define R_BUS_STATUS__ADDR (REG_TYPECAST_UDWORD 0xb0000004)
+#define R_BUS_STATUS__SVAL REG_SVAL_SHADOW
+#define R_BUS_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_BUS_STATUS__TYPECAST REG_TYPECAST_UDWORD
+#define R_BUS_STATUS__TYPE (REG_UDWORD)
+#define R_BUS_STATUS__GET REG_GET_RO
+#define R_BUS_STATUS__IGET REG_IGET_RO
+#define R_BUS_STATUS__SET REG_SET_RO
+#define R_BUS_STATUS__ISET REG_ISET_RO
+#define R_BUS_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_BUS_STATUS__EQL REG_EQL_RO
+#define R_BUS_STATUS__IEQL REG_IEQL_RO
+#define R_BUS_STATUS__RD REG_RD_RO
+#define R_BUS_STATUS__IRD REG_IRD_RO
+#define R_BUS_STATUS__WR REG_WR_RO
+#define R_BUS_STATUS__IWR REG_IWR_RO
+
+#define R_BUS_STATUS__READ(addr) \
+ (*(addr))
+
+#define R_BUS_STATUS__pll_lock_tm__pll_lock_tm__MASK 0x00000020U
+#define R_BUS_STATUS__both_faults__both_faults__MASK 0x00000010U
+#define R_BUS_STATUS__bsen___bsen___MASK 0x00000008U
+#define R_BUS_STATUS__boot__boot__MASK 0x00000006U
+#define R_BUS_STATUS__flashw__flashw__MASK 0x00000001U
+
+#define R_BUS_STATUS__pll_lock_tm__MAX 0x1
+#define R_BUS_STATUS__both_faults__MAX 0x1
+#define R_BUS_STATUS__bsen___MAX 0x1
+#define R_BUS_STATUS__boot__MAX 0x3
+#define R_BUS_STATUS__flashw__MAX 0x1
+
+#define R_BUS_STATUS__pll_lock_tm__MIN 0
+#define R_BUS_STATUS__both_faults__MIN 0
+#define R_BUS_STATUS__bsen___MIN 0
+#define R_BUS_STATUS__boot__MIN 0
+#define R_BUS_STATUS__flashw__MIN 0
+
+#define R_BUS_STATUS__pll_lock_tm__BITNR 5
+#define R_BUS_STATUS__both_faults__BITNR 4
+#define R_BUS_STATUS__bsen___BITNR 3
+#define R_BUS_STATUS__boot__BITNR 1
+#define R_BUS_STATUS__flashw__BITNR 0
+
+#define R_BUS_STATUS__pll_lock_tm__pll_lock_tm__VAL REG_VAL_ENUM
+#define R_BUS_STATUS__both_faults__both_faults__VAL REG_VAL_ENUM
+#define R_BUS_STATUS__bsen___bsen___VAL REG_VAL_ENUM
+#define R_BUS_STATUS__boot__boot__VAL REG_VAL_ENUM
+#define R_BUS_STATUS__flashw__flashw__VAL REG_VAL_ENUM
+
+#define R_BUS_STATUS__pll_lock_tm__pll_lock_tm__counting 1
+#define R_BUS_STATUS__pll_lock_tm__pll_lock_tm__expired 0
+#define R_BUS_STATUS__both_faults__both_faults__no 0
+#define R_BUS_STATUS__both_faults__both_faults__yes 1
+#define R_BUS_STATUS__bsen___bsen___disable 1
+#define R_BUS_STATUS__bsen___bsen___enable 0
+#define R_BUS_STATUS__boot__boot__network 2
+#define R_BUS_STATUS__boot__boot__parallel 3
+#define R_BUS_STATUS__boot__boot__serial 1
+#define R_BUS_STATUS__boot__boot__uncached 0
+#define R_BUS_STATUS__flashw__flashw__bw16 0
+#define R_BUS_STATUS__flashw__flashw__bw32 1
+
+#endif
+
+/*
+ * R_CLOCK_PRESCALE
+ * - type: WO
+ * - addr: 0xb00000f0
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+#define R_CLOCK_PRESCALE__ADDR (REG_TYPECAST_UDWORD 0xb00000f0)
+
+#ifndef REG_NO_SHADOW
+#define R_CLOCK_PRESCALE__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_CLOCK_PRESCALE + 0))
+#define R_CLOCK_PRESCALE__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_CLOCK_PRESCALE + 0))
+#else /* REG_NO_SHADOW */
+#define R_CLOCK_PRESCALE__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_CLOCK_PRESCALE__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_CLOCK_PRESCALE__STYPECAST REG_STYPECAST_UDWORD
+#define R_CLOCK_PRESCALE__SVAL REG_SVAL_SHADOW
+#define R_CLOCK_PRESCALE__SVAL_I REG_SVAL_I_SHADOW
+#define R_CLOCK_PRESCALE__TYPECAST REG_TYPECAST_UDWORD
+#define R_CLOCK_PRESCALE__TYPE (REG_UDWORD)
+#define R_CLOCK_PRESCALE__GET REG_GET_WO
+#define R_CLOCK_PRESCALE__IGET REG_IGET_WO
+#define R_CLOCK_PRESCALE__SET REG_SET_WO
+#define R_CLOCK_PRESCALE__ISET REG_ISET_WO
+#define R_CLOCK_PRESCALE__SET_VAL REG_SET_VAL_WO
+#define R_CLOCK_PRESCALE__EQL REG_EQL_WO
+#define R_CLOCK_PRESCALE__IEQL REG_IEQL_WO
+#define R_CLOCK_PRESCALE__RD REG_RD_WO
+#define R_CLOCK_PRESCALE__IRD REG_IRD_WO
+#define R_CLOCK_PRESCALE__WR REG_WR_WO
+#define R_CLOCK_PRESCALE__IWR REG_IWR_WO
+
+#define R_CLOCK_PRESCALE__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_CLOCK_PRESCALE__ser_presc__ser_presc__MASK 0xffff0000U
+#define R_CLOCK_PRESCALE__tim_presc__tim_presc__MASK 0x0000ffffU
+
+#define R_CLOCK_PRESCALE__ser_presc__MAX 0xffff
+#define R_CLOCK_PRESCALE__tim_presc__MAX 0xffff
+
+#define R_CLOCK_PRESCALE__ser_presc__MIN 0
+#define R_CLOCK_PRESCALE__tim_presc__MIN 0
+
+#define R_CLOCK_PRESCALE__ser_presc__BITNR 16
+#define R_CLOCK_PRESCALE__tim_presc__BITNR 0
+
+#define R_CLOCK_PRESCALE__ser_presc__ser_presc__VAL REG_VAL_VAL
+#define R_CLOCK_PRESCALE__tim_presc__tim_presc__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH0_BUF
+ * - type: RW
+ * - addr: 0xb0000108
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH0_BUF__ADDR (REG_TYPECAST_UDWORD 0xb0000108)
+#define R_DMA_CH0_BUF__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH0_BUF__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH0_BUF__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH0_BUF__TYPE (REG_UDWORD)
+#define R_DMA_CH0_BUF__GET REG_GET_RW
+#define R_DMA_CH0_BUF__IGET REG_IGET_RW
+#define R_DMA_CH0_BUF__SET REG_SET_RW
+#define R_DMA_CH0_BUF__ISET REG_ISET_RW
+#define R_DMA_CH0_BUF__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH0_BUF__EQL REG_EQL_RW
+#define R_DMA_CH0_BUF__IEQL REG_IEQL_RW
+#define R_DMA_CH0_BUF__RD REG_RD_RW
+#define R_DMA_CH0_BUF__IRD REG_IRD_RW
+#define R_DMA_CH0_BUF__WR REG_WR_RW
+#define R_DMA_CH0_BUF__IWR REG_IWR_RW
+
+#define R_DMA_CH0_BUF__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH0_BUF__READ(addr) \
+ (*(addr))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_DMA_CH0_BUF__FIRST 0
+#define R_DMA_CH0_BUF__LAST 9
+#define R_DMA_CH0_BUF__OFFSET 16
+/* end */
+
+#define R_DMA_CH0_BUF__buf__buf__MASK 0xffffffffU
+
+#define R_DMA_CH0_BUF__buf__MAX 0xffffffff
+
+#define R_DMA_CH0_BUF__buf__MIN 0
+
+#define R_DMA_CH0_BUF__buf__BITNR 0
+
+#define R_DMA_CH0_BUF__buf__buf__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH0_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001d1
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH0_CLR_INTR__ADDR (REG_TYPECAST_BYTE 0xb00001d1)
+
+#ifndef REG_NO_SHADOW
+#define R_DMA_CH0_CLR_INTR__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_DMA_CH0_CLR_INTR + 0))
+#define R_DMA_CH0_CLR_INTR__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_DMA_CH0_CLR_INTR + 0))
+#else /* REG_NO_SHADOW */
+#define R_DMA_CH0_CLR_INTR__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_DMA_CH0_CLR_INTR__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_DMA_CH0_CLR_INTR__STYPECAST REG_STYPECAST_BYTE
+#define R_DMA_CH0_CLR_INTR__SVAL REG_SVAL_ZERO
+#define R_DMA_CH0_CLR_INTR__SVAL_I REG_SVAL_I_ZERO
+#define R_DMA_CH0_CLR_INTR__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH0_CLR_INTR__TYPE (REG_BYTE)
+#define R_DMA_CH0_CLR_INTR__GET REG_GET_WO
+#define R_DMA_CH0_CLR_INTR__IGET REG_IGET_WO
+#define R_DMA_CH0_CLR_INTR__SET REG_SET_WO
+#define R_DMA_CH0_CLR_INTR__ISET REG_ISET_WO
+#define R_DMA_CH0_CLR_INTR__SET_VAL REG_SET_VAL_WO
+#define R_DMA_CH0_CLR_INTR__EQL REG_EQL_WO
+#define R_DMA_CH0_CLR_INTR__IEQL REG_IEQL_WO
+#define R_DMA_CH0_CLR_INTR__RD REG_RD_WO
+#define R_DMA_CH0_CLR_INTR__IRD REG_IRD_WO
+#define R_DMA_CH0_CLR_INTR__WR REG_WR_WO
+#define R_DMA_CH0_CLR_INTR__IWR REG_IWR_WO
+
+#define R_DMA_CH0_CLR_INTR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_DMA_CH0_CLR_INTR__FIRST 0
+#define R_DMA_CH0_CLR_INTR__IOFFSET 0
+#define R_DMA_CH0_CLR_INTR__LAST 9
+#define R_DMA_CH0_CLR_INTR__OFFSET 4
+#define R_DMA_CH0_CLR_INTR__SOFFSET 0
+/* end */
+
+#define R_DMA_CH0_CLR_INTR__clr_eop__clr_eop__MASK 0x00000002U
+#define R_DMA_CH0_CLR_INTR__clr_descr__clr_descr__MASK 0x00000001U
+
+#define R_DMA_CH0_CLR_INTR__clr_eop__MAX 0x1
+#define R_DMA_CH0_CLR_INTR__clr_descr__MAX 0x1
+
+#define R_DMA_CH0_CLR_INTR__clr_eop__MIN 0
+#define R_DMA_CH0_CLR_INTR__clr_descr__MIN 0
+
+#define R_DMA_CH0_CLR_INTR__clr_eop__BITNR 1
+#define R_DMA_CH0_CLR_INTR__clr_descr__BITNR 0
+
+#define R_DMA_CH0_CLR_INTR__clr_eop__clr_eop__VAL REG_VAL_ENUM
+#define R_DMA_CH0_CLR_INTR__clr_descr__clr_descr__VAL REG_VAL_ENUM
+
+#define R_DMA_CH0_CLR_INTR__clr_eop__clr_eop__do 1
+#define R_DMA_CH0_CLR_INTR__clr_eop__clr_eop__dont 0
+#define R_DMA_CH0_CLR_INTR__clr_descr__clr_descr__do 1
+#define R_DMA_CH0_CLR_INTR__clr_descr__clr_descr__dont 0
+
+#endif
+
+/*
+ * R_DMA_CH0_CMD
+ * - type: RW
+ * - addr: 0xb00001d0
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH0_CMD__ADDR (REG_TYPECAST_BYTE 0xb00001d0)
+#define R_DMA_CH0_CMD__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH0_CMD__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH0_CMD__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH0_CMD__TYPE (REG_BYTE)
+#define R_DMA_CH0_CMD__GET REG_GET_RW
+#define R_DMA_CH0_CMD__IGET REG_IGET_RW
+#define R_DMA_CH0_CMD__SET REG_SET_RW
+#define R_DMA_CH0_CMD__ISET REG_ISET_RW
+#define R_DMA_CH0_CMD__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH0_CMD__EQL REG_EQL_RW
+#define R_DMA_CH0_CMD__IEQL REG_IEQL_RW
+#define R_DMA_CH0_CMD__RD REG_RD_RW
+#define R_DMA_CH0_CMD__IRD REG_IRD_RW
+#define R_DMA_CH0_CMD__WR REG_WR_RW
+#define R_DMA_CH0_CMD__IWR REG_IWR_RW
+
+#define R_DMA_CH0_CMD__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH0_CMD__READ(addr) \
+ (*(addr))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_DMA_CH0_CMD__FIRST 0
+#define R_DMA_CH0_CMD__LAST 9
+#define R_DMA_CH0_CMD__OFFSET 4
+/* end */
+
+#define R_DMA_CH0_CMD__cmd__cmd__MASK 0x00000007U
+
+#define R_DMA_CH0_CMD__cmd__MAX 0x7
+
+#define R_DMA_CH0_CMD__cmd__MIN 0
+
+#define R_DMA_CH0_CMD__cmd__BITNR 0
+
+#define R_DMA_CH0_CMD__cmd__cmd__VAL REG_VAL_ENUM
+
+#define R_DMA_CH0_CMD__cmd__cmd__continue 3
+#define R_DMA_CH0_CMD__cmd__cmd__hold 0
+#define R_DMA_CH0_CMD__cmd__cmd__reset 4
+#define R_DMA_CH0_CMD__cmd__cmd__restart 3
+#define R_DMA_CH0_CMD__cmd__cmd__start 1
+
+#endif
+
+/*
+ * R_DMA_CH0_DESCR
+ * - type: RW
+ * - addr: 0xb000010c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH0_DESCR__ADDR (REG_TYPECAST_UDWORD 0xb000010c)
+#define R_DMA_CH0_DESCR__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH0_DESCR__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH0_DESCR__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH0_DESCR__TYPE (REG_UDWORD)
+#define R_DMA_CH0_DESCR__GET REG_GET_RW
+#define R_DMA_CH0_DESCR__IGET REG_IGET_RW
+#define R_DMA_CH0_DESCR__SET REG_SET_RW
+#define R_DMA_CH0_DESCR__ISET REG_ISET_RW
+#define R_DMA_CH0_DESCR__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH0_DESCR__EQL REG_EQL_RW
+#define R_DMA_CH0_DESCR__IEQL REG_IEQL_RW
+#define R_DMA_CH0_DESCR__RD REG_RD_RW
+#define R_DMA_CH0_DESCR__IRD REG_IRD_RW
+#define R_DMA_CH0_DESCR__WR REG_WR_RW
+#define R_DMA_CH0_DESCR__IWR REG_IWR_RW
+
+#define R_DMA_CH0_DESCR__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH0_DESCR__READ(addr) \
+ (*(addr))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_DMA_CH0_DESCR__FIRST 0
+#define R_DMA_CH0_DESCR__LAST 9
+#define R_DMA_CH0_DESCR__OFFSET 16
+/* end */
+
+#define R_DMA_CH0_DESCR__descr__descr__MASK 0xffffffffU
+
+#define R_DMA_CH0_DESCR__descr__MAX 0xffffffff
+
+#define R_DMA_CH0_DESCR__descr__MIN 0
+
+#define R_DMA_CH0_DESCR__descr__BITNR 0
+
+#define R_DMA_CH0_DESCR__descr__descr__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH0_FIRST
+ * - type: RW
+ * - addr: 0xb00001a0
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH0_FIRST__ADDR (REG_TYPECAST_UDWORD 0xb00001a0)
+#define R_DMA_CH0_FIRST__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH0_FIRST__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH0_FIRST__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH0_FIRST__TYPE (REG_UDWORD)
+#define R_DMA_CH0_FIRST__GET REG_GET_RW
+#define R_DMA_CH0_FIRST__IGET REG_IGET_RW
+#define R_DMA_CH0_FIRST__SET REG_SET_RW
+#define R_DMA_CH0_FIRST__ISET REG_ISET_RW
+#define R_DMA_CH0_FIRST__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH0_FIRST__EQL REG_EQL_RW
+#define R_DMA_CH0_FIRST__IEQL REG_IEQL_RW
+#define R_DMA_CH0_FIRST__RD REG_RD_RW
+#define R_DMA_CH0_FIRST__IRD REG_IRD_RW
+#define R_DMA_CH0_FIRST__WR REG_WR_RW
+#define R_DMA_CH0_FIRST__IWR REG_IWR_RW
+
+#define R_DMA_CH0_FIRST__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH0_FIRST__READ(addr) \
+ (*(addr))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_DMA_CH0_FIRST__FIRST 0
+#define R_DMA_CH0_FIRST__LAST 9
+#define R_DMA_CH0_FIRST__OFFSET 4
+/* end */
+
+#define R_DMA_CH0_FIRST__first__first__MASK 0xffffffffU
+
+#define R_DMA_CH0_FIRST__first__MAX 0xffffffff
+
+#define R_DMA_CH0_FIRST__first__MIN 0
+
+#define R_DMA_CH0_FIRST__first__BITNR 0
+
+#define R_DMA_CH0_FIRST__first__first__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH0_HWSW
+ * - type: RW
+ * - addr: 0xb0000100
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH0_HWSW__ADDR (REG_TYPECAST_UDWORD 0xb0000100)
+#define R_DMA_CH0_HWSW__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH0_HWSW__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH0_HWSW__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH0_HWSW__TYPE (REG_UDWORD)
+#define R_DMA_CH0_HWSW__GET REG_GET_RW
+#define R_DMA_CH0_HWSW__IGET REG_IGET_RW
+#define R_DMA_CH0_HWSW__SET REG_SET_RW
+#define R_DMA_CH0_HWSW__ISET REG_ISET_RW
+#define R_DMA_CH0_HWSW__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH0_HWSW__EQL REG_EQL_RW
+#define R_DMA_CH0_HWSW__IEQL REG_IEQL_RW
+#define R_DMA_CH0_HWSW__RD REG_RD_RW
+#define R_DMA_CH0_HWSW__IRD REG_IRD_RW
+#define R_DMA_CH0_HWSW__WR REG_WR_RW
+#define R_DMA_CH0_HWSW__IWR REG_IWR_RW
+
+#define R_DMA_CH0_HWSW__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH0_HWSW__READ(addr) \
+ (*(addr))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_DMA_CH0_HWSW__FIRST 0
+#define R_DMA_CH0_HWSW__LAST 9
+#define R_DMA_CH0_HWSW__OFFSET 16
+/* end */
+
+#define R_DMA_CH0_HWSW__hw__hw__MASK 0xffff0000U
+#define R_DMA_CH0_HWSW__sw__sw__MASK 0x0000ffffU
+
+#define R_DMA_CH0_HWSW__hw__MAX 0xffff
+#define R_DMA_CH0_HWSW__sw__MAX 0xffff
+
+#define R_DMA_CH0_HWSW__hw__MIN 0
+#define R_DMA_CH0_HWSW__sw__MIN 0
+
+#define R_DMA_CH0_HWSW__hw__BITNR 16
+#define R_DMA_CH0_HWSW__sw__BITNR 0
+
+#define R_DMA_CH0_HWSW__hw__hw__VAL REG_VAL_VAL
+#define R_DMA_CH0_HWSW__sw__sw__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH0_NEXT
+ * - type: RW
+ * - addr: 0xb0000104
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH0_NEXT__ADDR (REG_TYPECAST_UDWORD 0xb0000104)
+#define R_DMA_CH0_NEXT__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH0_NEXT__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH0_NEXT__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH0_NEXT__TYPE (REG_UDWORD)
+#define R_DMA_CH0_NEXT__GET REG_GET_RW
+#define R_DMA_CH0_NEXT__IGET REG_IGET_RW
+#define R_DMA_CH0_NEXT__SET REG_SET_RW
+#define R_DMA_CH0_NEXT__ISET REG_ISET_RW
+#define R_DMA_CH0_NEXT__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH0_NEXT__EQL REG_EQL_RW
+#define R_DMA_CH0_NEXT__IEQL REG_IEQL_RW
+#define R_DMA_CH0_NEXT__RD REG_RD_RW
+#define R_DMA_CH0_NEXT__IRD REG_IRD_RW
+#define R_DMA_CH0_NEXT__WR REG_WR_RW
+#define R_DMA_CH0_NEXT__IWR REG_IWR_RW
+
+#define R_DMA_CH0_NEXT__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH0_NEXT__READ(addr) \
+ (*(addr))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_DMA_CH0_NEXT__FIRST 0
+#define R_DMA_CH0_NEXT__LAST 9
+#define R_DMA_CH0_NEXT__OFFSET 16
+/* end */
+
+#define R_DMA_CH0_NEXT__next__next__MASK 0xffffffffU
+
+#define R_DMA_CH0_NEXT__next__MAX 0xffffffff
+
+#define R_DMA_CH0_NEXT__next__MIN 0
+
+#define R_DMA_CH0_NEXT__next__BITNR 0
+
+#define R_DMA_CH0_NEXT__next__next__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH0_STATUS
+ * - type: RO
+ * - addr: 0xb00001d2
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH0_STATUS__ADDR (REG_TYPECAST_BYTE 0xb00001d2)
+#define R_DMA_CH0_STATUS__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH0_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH0_STATUS__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH0_STATUS__TYPE (REG_BYTE)
+#define R_DMA_CH0_STATUS__GET REG_GET_RO
+#define R_DMA_CH0_STATUS__IGET REG_IGET_RO
+#define R_DMA_CH0_STATUS__SET REG_SET_RO
+#define R_DMA_CH0_STATUS__ISET REG_ISET_RO
+#define R_DMA_CH0_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_DMA_CH0_STATUS__EQL REG_EQL_RO
+#define R_DMA_CH0_STATUS__IEQL REG_IEQL_RO
+#define R_DMA_CH0_STATUS__RD REG_RD_RO
+#define R_DMA_CH0_STATUS__IRD REG_IRD_RO
+#define R_DMA_CH0_STATUS__WR REG_WR_RO
+#define R_DMA_CH0_STATUS__IWR REG_IWR_RO
+
+#define R_DMA_CH0_STATUS__READ(addr) \
+ (*(addr))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_DMA_CH0_STATUS__FIRST 0
+#define R_DMA_CH0_STATUS__LAST 9
+#define R_DMA_CH0_STATUS__OFFSET 4
+/* end */
+
+#define R_DMA_CH0_STATUS__avail__avail__MASK 0x0000007fU
+
+#define R_DMA_CH0_STATUS__avail__MAX 0x7f
+
+#define R_DMA_CH0_STATUS__avail__MIN 0
+
+#define R_DMA_CH0_STATUS__avail__BITNR 0
+
+#define R_DMA_CH0_STATUS__avail__avail__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH1_BUF
+ * - type: RW
+ * - addr: 0xb0000118
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH1_BUF__ADDR (REG_TYPECAST_UDWORD 0xb0000118)
+#define R_DMA_CH1_BUF__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH1_BUF__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH1_BUF__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH1_BUF__TYPE (REG_UDWORD)
+#define R_DMA_CH1_BUF__GET REG_GET_RW
+#define R_DMA_CH1_BUF__IGET REG_IGET_RW
+#define R_DMA_CH1_BUF__SET REG_SET_RW
+#define R_DMA_CH1_BUF__ISET REG_ISET_RW
+#define R_DMA_CH1_BUF__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH1_BUF__EQL REG_EQL_RW
+#define R_DMA_CH1_BUF__IEQL REG_IEQL_RW
+#define R_DMA_CH1_BUF__RD REG_RD_RW
+#define R_DMA_CH1_BUF__IRD REG_IRD_RW
+#define R_DMA_CH1_BUF__WR REG_WR_RW
+#define R_DMA_CH1_BUF__IWR REG_IWR_RW
+
+#define R_DMA_CH1_BUF__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH1_BUF__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH1_BUF__buf__buf__MASK 0xffffffffU
+
+#define R_DMA_CH1_BUF__buf__MAX 0xffffffff
+
+#define R_DMA_CH1_BUF__buf__MIN 0
+
+#define R_DMA_CH1_BUF__buf__BITNR 0
+
+#define R_DMA_CH1_BUF__buf__buf__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH1_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001d5
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH1_CLR_INTR__ADDR (REG_TYPECAST_BYTE 0xb00001d5)
+
+#ifndef REG_NO_SHADOW
+#define R_DMA_CH1_CLR_INTR__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_DMA_CH1_CLR_INTR + 0))
+#define R_DMA_CH1_CLR_INTR__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_DMA_CH1_CLR_INTR + 0))
+#else /* REG_NO_SHADOW */
+#define R_DMA_CH1_CLR_INTR__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_DMA_CH1_CLR_INTR__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_DMA_CH1_CLR_INTR__STYPECAST REG_STYPECAST_BYTE
+#define R_DMA_CH1_CLR_INTR__SVAL REG_SVAL_ZERO
+#define R_DMA_CH1_CLR_INTR__SVAL_I REG_SVAL_I_ZERO
+#define R_DMA_CH1_CLR_INTR__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH1_CLR_INTR__TYPE (REG_BYTE)
+#define R_DMA_CH1_CLR_INTR__GET REG_GET_WO
+#define R_DMA_CH1_CLR_INTR__IGET REG_IGET_WO
+#define R_DMA_CH1_CLR_INTR__SET REG_SET_WO
+#define R_DMA_CH1_CLR_INTR__ISET REG_ISET_WO
+#define R_DMA_CH1_CLR_INTR__SET_VAL REG_SET_VAL_WO
+#define R_DMA_CH1_CLR_INTR__EQL REG_EQL_WO
+#define R_DMA_CH1_CLR_INTR__IEQL REG_IEQL_WO
+#define R_DMA_CH1_CLR_INTR__RD REG_RD_WO
+#define R_DMA_CH1_CLR_INTR__IRD REG_IRD_WO
+#define R_DMA_CH1_CLR_INTR__WR REG_WR_WO
+#define R_DMA_CH1_CLR_INTR__IWR REG_IWR_WO
+
+#define R_DMA_CH1_CLR_INTR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_DMA_CH1_CLR_INTR__clr_eop__clr_eop__MASK 0x00000002U
+#define R_DMA_CH1_CLR_INTR__clr_descr__clr_descr__MASK 0x00000001U
+
+#define R_DMA_CH1_CLR_INTR__clr_eop__MAX 0x1
+#define R_DMA_CH1_CLR_INTR__clr_descr__MAX 0x1
+
+#define R_DMA_CH1_CLR_INTR__clr_eop__MIN 0
+#define R_DMA_CH1_CLR_INTR__clr_descr__MIN 0
+
+#define R_DMA_CH1_CLR_INTR__clr_eop__BITNR 1
+#define R_DMA_CH1_CLR_INTR__clr_descr__BITNR 0
+
+#define R_DMA_CH1_CLR_INTR__clr_eop__clr_eop__VAL REG_VAL_ENUM
+#define R_DMA_CH1_CLR_INTR__clr_descr__clr_descr__VAL REG_VAL_ENUM
+
+#define R_DMA_CH1_CLR_INTR__clr_eop__clr_eop__do 1
+#define R_DMA_CH1_CLR_INTR__clr_eop__clr_eop__dont 0
+#define R_DMA_CH1_CLR_INTR__clr_descr__clr_descr__do 1
+#define R_DMA_CH1_CLR_INTR__clr_descr__clr_descr__dont 0
+
+#endif
+
+/*
+ * R_DMA_CH1_CMD
+ * - type: RW
+ * - addr: 0xb00001d4
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH1_CMD__ADDR (REG_TYPECAST_BYTE 0xb00001d4)
+#define R_DMA_CH1_CMD__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH1_CMD__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH1_CMD__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH1_CMD__TYPE (REG_BYTE)
+#define R_DMA_CH1_CMD__GET REG_GET_RW
+#define R_DMA_CH1_CMD__IGET REG_IGET_RW
+#define R_DMA_CH1_CMD__SET REG_SET_RW
+#define R_DMA_CH1_CMD__ISET REG_ISET_RW
+#define R_DMA_CH1_CMD__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH1_CMD__EQL REG_EQL_RW
+#define R_DMA_CH1_CMD__IEQL REG_IEQL_RW
+#define R_DMA_CH1_CMD__RD REG_RD_RW
+#define R_DMA_CH1_CMD__IRD REG_IRD_RW
+#define R_DMA_CH1_CMD__WR REG_WR_RW
+#define R_DMA_CH1_CMD__IWR REG_IWR_RW
+
+#define R_DMA_CH1_CMD__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH1_CMD__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH1_CMD__cmd__cmd__MASK 0x00000007U
+
+#define R_DMA_CH1_CMD__cmd__MAX 0x7
+
+#define R_DMA_CH1_CMD__cmd__MIN 0
+
+#define R_DMA_CH1_CMD__cmd__BITNR 0
+
+#define R_DMA_CH1_CMD__cmd__cmd__VAL REG_VAL_ENUM
+
+#define R_DMA_CH1_CMD__cmd__cmd__continue 3
+#define R_DMA_CH1_CMD__cmd__cmd__hold 0
+#define R_DMA_CH1_CMD__cmd__cmd__reset 4
+#define R_DMA_CH1_CMD__cmd__cmd__restart 3
+#define R_DMA_CH1_CMD__cmd__cmd__start 1
+
+#endif
+
+/*
+ * R_DMA_CH1_DESCR
+ * - type: RW
+ * - addr: 0xb000011c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH1_DESCR__ADDR (REG_TYPECAST_UDWORD 0xb000011c)
+#define R_DMA_CH1_DESCR__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH1_DESCR__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH1_DESCR__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH1_DESCR__TYPE (REG_UDWORD)
+#define R_DMA_CH1_DESCR__GET REG_GET_RW
+#define R_DMA_CH1_DESCR__IGET REG_IGET_RW
+#define R_DMA_CH1_DESCR__SET REG_SET_RW
+#define R_DMA_CH1_DESCR__ISET REG_ISET_RW
+#define R_DMA_CH1_DESCR__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH1_DESCR__EQL REG_EQL_RW
+#define R_DMA_CH1_DESCR__IEQL REG_IEQL_RW
+#define R_DMA_CH1_DESCR__RD REG_RD_RW
+#define R_DMA_CH1_DESCR__IRD REG_IRD_RW
+#define R_DMA_CH1_DESCR__WR REG_WR_RW
+#define R_DMA_CH1_DESCR__IWR REG_IWR_RW
+
+#define R_DMA_CH1_DESCR__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH1_DESCR__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH1_DESCR__descr__descr__MASK 0xffffffffU
+
+#define R_DMA_CH1_DESCR__descr__MAX 0xffffffff
+
+#define R_DMA_CH1_DESCR__descr__MIN 0
+
+#define R_DMA_CH1_DESCR__descr__BITNR 0
+
+#define R_DMA_CH1_DESCR__descr__descr__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH1_FIRST
+ * - type: RW
+ * - addr: 0xb00001a4
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH1_FIRST__ADDR (REG_TYPECAST_UDWORD 0xb00001a4)
+#define R_DMA_CH1_FIRST__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH1_FIRST__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH1_FIRST__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH1_FIRST__TYPE (REG_UDWORD)
+#define R_DMA_CH1_FIRST__GET REG_GET_RW
+#define R_DMA_CH1_FIRST__IGET REG_IGET_RW
+#define R_DMA_CH1_FIRST__SET REG_SET_RW
+#define R_DMA_CH1_FIRST__ISET REG_ISET_RW
+#define R_DMA_CH1_FIRST__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH1_FIRST__EQL REG_EQL_RW
+#define R_DMA_CH1_FIRST__IEQL REG_IEQL_RW
+#define R_DMA_CH1_FIRST__RD REG_RD_RW
+#define R_DMA_CH1_FIRST__IRD REG_IRD_RW
+#define R_DMA_CH1_FIRST__WR REG_WR_RW
+#define R_DMA_CH1_FIRST__IWR REG_IWR_RW
+
+#define R_DMA_CH1_FIRST__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH1_FIRST__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH1_FIRST__first__first__MASK 0xffffffffU
+
+#define R_DMA_CH1_FIRST__first__MAX 0xffffffff
+
+#define R_DMA_CH1_FIRST__first__MIN 0
+
+#define R_DMA_CH1_FIRST__first__BITNR 0
+
+#define R_DMA_CH1_FIRST__first__first__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH1_HWSW
+ * - type: RW
+ * - addr: 0xb0000110
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH1_HWSW__ADDR (REG_TYPECAST_UDWORD 0xb0000110)
+#define R_DMA_CH1_HWSW__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH1_HWSW__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH1_HWSW__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH1_HWSW__TYPE (REG_UDWORD)
+#define R_DMA_CH1_HWSW__GET REG_GET_RW
+#define R_DMA_CH1_HWSW__IGET REG_IGET_RW
+#define R_DMA_CH1_HWSW__SET REG_SET_RW
+#define R_DMA_CH1_HWSW__ISET REG_ISET_RW
+#define R_DMA_CH1_HWSW__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH1_HWSW__EQL REG_EQL_RW
+#define R_DMA_CH1_HWSW__IEQL REG_IEQL_RW
+#define R_DMA_CH1_HWSW__RD REG_RD_RW
+#define R_DMA_CH1_HWSW__IRD REG_IRD_RW
+#define R_DMA_CH1_HWSW__WR REG_WR_RW
+#define R_DMA_CH1_HWSW__IWR REG_IWR_RW
+
+#define R_DMA_CH1_HWSW__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH1_HWSW__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH1_HWSW__hw__hw__MASK 0xffff0000U
+#define R_DMA_CH1_HWSW__sw__sw__MASK 0x0000ffffU
+
+#define R_DMA_CH1_HWSW__hw__MAX 0xffff
+#define R_DMA_CH1_HWSW__sw__MAX 0xffff
+
+#define R_DMA_CH1_HWSW__hw__MIN 0
+#define R_DMA_CH1_HWSW__sw__MIN 0
+
+#define R_DMA_CH1_HWSW__hw__BITNR 16
+#define R_DMA_CH1_HWSW__sw__BITNR 0
+
+#define R_DMA_CH1_HWSW__hw__hw__VAL REG_VAL_VAL
+#define R_DMA_CH1_HWSW__sw__sw__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH1_NEXT
+ * - type: RW
+ * - addr: 0xb0000114
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH1_NEXT__ADDR (REG_TYPECAST_UDWORD 0xb0000114)
+#define R_DMA_CH1_NEXT__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH1_NEXT__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH1_NEXT__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH1_NEXT__TYPE (REG_UDWORD)
+#define R_DMA_CH1_NEXT__GET REG_GET_RW
+#define R_DMA_CH1_NEXT__IGET REG_IGET_RW
+#define R_DMA_CH1_NEXT__SET REG_SET_RW
+#define R_DMA_CH1_NEXT__ISET REG_ISET_RW
+#define R_DMA_CH1_NEXT__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH1_NEXT__EQL REG_EQL_RW
+#define R_DMA_CH1_NEXT__IEQL REG_IEQL_RW
+#define R_DMA_CH1_NEXT__RD REG_RD_RW
+#define R_DMA_CH1_NEXT__IRD REG_IRD_RW
+#define R_DMA_CH1_NEXT__WR REG_WR_RW
+#define R_DMA_CH1_NEXT__IWR REG_IWR_RW
+
+#define R_DMA_CH1_NEXT__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH1_NEXT__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH1_NEXT__next__next__MASK 0xffffffffU
+
+#define R_DMA_CH1_NEXT__next__MAX 0xffffffff
+
+#define R_DMA_CH1_NEXT__next__MIN 0
+
+#define R_DMA_CH1_NEXT__next__BITNR 0
+
+#define R_DMA_CH1_NEXT__next__next__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH1_STATUS
+ * - type: RO
+ * - addr: 0xb00001d6
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH1_STATUS__ADDR (REG_TYPECAST_BYTE 0xb00001d6)
+#define R_DMA_CH1_STATUS__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH1_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH1_STATUS__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH1_STATUS__TYPE (REG_BYTE)
+#define R_DMA_CH1_STATUS__GET REG_GET_RO
+#define R_DMA_CH1_STATUS__IGET REG_IGET_RO
+#define R_DMA_CH1_STATUS__SET REG_SET_RO
+#define R_DMA_CH1_STATUS__ISET REG_ISET_RO
+#define R_DMA_CH1_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_DMA_CH1_STATUS__EQL REG_EQL_RO
+#define R_DMA_CH1_STATUS__IEQL REG_IEQL_RO
+#define R_DMA_CH1_STATUS__RD REG_RD_RO
+#define R_DMA_CH1_STATUS__IRD REG_IRD_RO
+#define R_DMA_CH1_STATUS__WR REG_WR_RO
+#define R_DMA_CH1_STATUS__IWR REG_IWR_RO
+
+#define R_DMA_CH1_STATUS__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH1_STATUS__avail__avail__MASK 0x0000007fU
+
+#define R_DMA_CH1_STATUS__avail__MAX 0x7f
+
+#define R_DMA_CH1_STATUS__avail__MIN 0
+
+#define R_DMA_CH1_STATUS__avail__BITNR 0
+
+#define R_DMA_CH1_STATUS__avail__avail__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH2_BUF
+ * - type: RW
+ * - addr: 0xb0000128
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH2_BUF__ADDR (REG_TYPECAST_UDWORD 0xb0000128)
+#define R_DMA_CH2_BUF__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH2_BUF__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH2_BUF__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH2_BUF__TYPE (REG_UDWORD)
+#define R_DMA_CH2_BUF__GET REG_GET_RW
+#define R_DMA_CH2_BUF__IGET REG_IGET_RW
+#define R_DMA_CH2_BUF__SET REG_SET_RW
+#define R_DMA_CH2_BUF__ISET REG_ISET_RW
+#define R_DMA_CH2_BUF__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH2_BUF__EQL REG_EQL_RW
+#define R_DMA_CH2_BUF__IEQL REG_IEQL_RW
+#define R_DMA_CH2_BUF__RD REG_RD_RW
+#define R_DMA_CH2_BUF__IRD REG_IRD_RW
+#define R_DMA_CH2_BUF__WR REG_WR_RW
+#define R_DMA_CH2_BUF__IWR REG_IWR_RW
+
+#define R_DMA_CH2_BUF__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH2_BUF__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH2_BUF__buf__buf__MASK 0xffffffffU
+
+#define R_DMA_CH2_BUF__buf__MAX 0xffffffff
+
+#define R_DMA_CH2_BUF__buf__MIN 0
+
+#define R_DMA_CH2_BUF__buf__BITNR 0
+
+#define R_DMA_CH2_BUF__buf__buf__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH2_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001d9
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH2_CLR_INTR__ADDR (REG_TYPECAST_BYTE 0xb00001d9)
+
+#ifndef REG_NO_SHADOW
+#define R_DMA_CH2_CLR_INTR__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_DMA_CH2_CLR_INTR + 0))
+#define R_DMA_CH2_CLR_INTR__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_DMA_CH2_CLR_INTR + 0))
+#else /* REG_NO_SHADOW */
+#define R_DMA_CH2_CLR_INTR__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_DMA_CH2_CLR_INTR__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_DMA_CH2_CLR_INTR__STYPECAST REG_STYPECAST_BYTE
+#define R_DMA_CH2_CLR_INTR__SVAL REG_SVAL_ZERO
+#define R_DMA_CH2_CLR_INTR__SVAL_I REG_SVAL_I_ZERO
+#define R_DMA_CH2_CLR_INTR__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH2_CLR_INTR__TYPE (REG_BYTE)
+#define R_DMA_CH2_CLR_INTR__GET REG_GET_WO
+#define R_DMA_CH2_CLR_INTR__IGET REG_IGET_WO
+#define R_DMA_CH2_CLR_INTR__SET REG_SET_WO
+#define R_DMA_CH2_CLR_INTR__ISET REG_ISET_WO
+#define R_DMA_CH2_CLR_INTR__SET_VAL REG_SET_VAL_WO
+#define R_DMA_CH2_CLR_INTR__EQL REG_EQL_WO
+#define R_DMA_CH2_CLR_INTR__IEQL REG_IEQL_WO
+#define R_DMA_CH2_CLR_INTR__RD REG_RD_WO
+#define R_DMA_CH2_CLR_INTR__IRD REG_IRD_WO
+#define R_DMA_CH2_CLR_INTR__WR REG_WR_WO
+#define R_DMA_CH2_CLR_INTR__IWR REG_IWR_WO
+
+#define R_DMA_CH2_CLR_INTR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_DMA_CH2_CLR_INTR__clr_eop__clr_eop__MASK 0x00000002U
+#define R_DMA_CH2_CLR_INTR__clr_descr__clr_descr__MASK 0x00000001U
+
+#define R_DMA_CH2_CLR_INTR__clr_eop__MAX 0x1
+#define R_DMA_CH2_CLR_INTR__clr_descr__MAX 0x1
+
+#define R_DMA_CH2_CLR_INTR__clr_eop__MIN 0
+#define R_DMA_CH2_CLR_INTR__clr_descr__MIN 0
+
+#define R_DMA_CH2_CLR_INTR__clr_eop__BITNR 1
+#define R_DMA_CH2_CLR_INTR__clr_descr__BITNR 0
+
+#define R_DMA_CH2_CLR_INTR__clr_eop__clr_eop__VAL REG_VAL_ENUM
+#define R_DMA_CH2_CLR_INTR__clr_descr__clr_descr__VAL REG_VAL_ENUM
+
+#define R_DMA_CH2_CLR_INTR__clr_eop__clr_eop__do 1
+#define R_DMA_CH2_CLR_INTR__clr_eop__clr_eop__dont 0
+#define R_DMA_CH2_CLR_INTR__clr_descr__clr_descr__do 1
+#define R_DMA_CH2_CLR_INTR__clr_descr__clr_descr__dont 0
+
+#endif
+
+/*
+ * R_DMA_CH2_CMD
+ * - type: RW
+ * - addr: 0xb00001d8
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH2_CMD__ADDR (REG_TYPECAST_BYTE 0xb00001d8)
+#define R_DMA_CH2_CMD__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH2_CMD__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH2_CMD__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH2_CMD__TYPE (REG_BYTE)
+#define R_DMA_CH2_CMD__GET REG_GET_RW
+#define R_DMA_CH2_CMD__IGET REG_IGET_RW
+#define R_DMA_CH2_CMD__SET REG_SET_RW
+#define R_DMA_CH2_CMD__ISET REG_ISET_RW
+#define R_DMA_CH2_CMD__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH2_CMD__EQL REG_EQL_RW
+#define R_DMA_CH2_CMD__IEQL REG_IEQL_RW
+#define R_DMA_CH2_CMD__RD REG_RD_RW
+#define R_DMA_CH2_CMD__IRD REG_IRD_RW
+#define R_DMA_CH2_CMD__WR REG_WR_RW
+#define R_DMA_CH2_CMD__IWR REG_IWR_RW
+
+#define R_DMA_CH2_CMD__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH2_CMD__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH2_CMD__cmd__cmd__MASK 0x00000007U
+
+#define R_DMA_CH2_CMD__cmd__MAX 0x7
+
+#define R_DMA_CH2_CMD__cmd__MIN 0
+
+#define R_DMA_CH2_CMD__cmd__BITNR 0
+
+#define R_DMA_CH2_CMD__cmd__cmd__VAL REG_VAL_ENUM
+
+#define R_DMA_CH2_CMD__cmd__cmd__continue 3
+#define R_DMA_CH2_CMD__cmd__cmd__hold 0
+#define R_DMA_CH2_CMD__cmd__cmd__reset 4
+#define R_DMA_CH2_CMD__cmd__cmd__restart 3
+#define R_DMA_CH2_CMD__cmd__cmd__start 1
+
+#endif
+
+/*
+ * R_DMA_CH2_DESCR
+ * - type: RW
+ * - addr: 0xb000012c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH2_DESCR__ADDR (REG_TYPECAST_UDWORD 0xb000012c)
+#define R_DMA_CH2_DESCR__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH2_DESCR__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH2_DESCR__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH2_DESCR__TYPE (REG_UDWORD)
+#define R_DMA_CH2_DESCR__GET REG_GET_RW
+#define R_DMA_CH2_DESCR__IGET REG_IGET_RW
+#define R_DMA_CH2_DESCR__SET REG_SET_RW
+#define R_DMA_CH2_DESCR__ISET REG_ISET_RW
+#define R_DMA_CH2_DESCR__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH2_DESCR__EQL REG_EQL_RW
+#define R_DMA_CH2_DESCR__IEQL REG_IEQL_RW
+#define R_DMA_CH2_DESCR__RD REG_RD_RW
+#define R_DMA_CH2_DESCR__IRD REG_IRD_RW
+#define R_DMA_CH2_DESCR__WR REG_WR_RW
+#define R_DMA_CH2_DESCR__IWR REG_IWR_RW
+
+#define R_DMA_CH2_DESCR__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH2_DESCR__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH2_DESCR__descr__descr__MASK 0xffffffffU
+
+#define R_DMA_CH2_DESCR__descr__MAX 0xffffffff
+
+#define R_DMA_CH2_DESCR__descr__MIN 0
+
+#define R_DMA_CH2_DESCR__descr__BITNR 0
+
+#define R_DMA_CH2_DESCR__descr__descr__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH2_FIRST
+ * - type: RW
+ * - addr: 0xb00001a8
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH2_FIRST__ADDR (REG_TYPECAST_UDWORD 0xb00001a8)
+#define R_DMA_CH2_FIRST__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH2_FIRST__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH2_FIRST__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH2_FIRST__TYPE (REG_UDWORD)
+#define R_DMA_CH2_FIRST__GET REG_GET_RW
+#define R_DMA_CH2_FIRST__IGET REG_IGET_RW
+#define R_DMA_CH2_FIRST__SET REG_SET_RW
+#define R_DMA_CH2_FIRST__ISET REG_ISET_RW
+#define R_DMA_CH2_FIRST__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH2_FIRST__EQL REG_EQL_RW
+#define R_DMA_CH2_FIRST__IEQL REG_IEQL_RW
+#define R_DMA_CH2_FIRST__RD REG_RD_RW
+#define R_DMA_CH2_FIRST__IRD REG_IRD_RW
+#define R_DMA_CH2_FIRST__WR REG_WR_RW
+#define R_DMA_CH2_FIRST__IWR REG_IWR_RW
+
+#define R_DMA_CH2_FIRST__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH2_FIRST__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH2_FIRST__first__first__MASK 0xffffffffU
+
+#define R_DMA_CH2_FIRST__first__MAX 0xffffffff
+
+#define R_DMA_CH2_FIRST__first__MIN 0
+
+#define R_DMA_CH2_FIRST__first__BITNR 0
+
+#define R_DMA_CH2_FIRST__first__first__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH2_HWSW
+ * - type: RW
+ * - addr: 0xb0000120
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH2_HWSW__ADDR (REG_TYPECAST_UDWORD 0xb0000120)
+#define R_DMA_CH2_HWSW__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH2_HWSW__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH2_HWSW__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH2_HWSW__TYPE (REG_UDWORD)
+#define R_DMA_CH2_HWSW__GET REG_GET_RW
+#define R_DMA_CH2_HWSW__IGET REG_IGET_RW
+#define R_DMA_CH2_HWSW__SET REG_SET_RW
+#define R_DMA_CH2_HWSW__ISET REG_ISET_RW
+#define R_DMA_CH2_HWSW__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH2_HWSW__EQL REG_EQL_RW
+#define R_DMA_CH2_HWSW__IEQL REG_IEQL_RW
+#define R_DMA_CH2_HWSW__RD REG_RD_RW
+#define R_DMA_CH2_HWSW__IRD REG_IRD_RW
+#define R_DMA_CH2_HWSW__WR REG_WR_RW
+#define R_DMA_CH2_HWSW__IWR REG_IWR_RW
+
+#define R_DMA_CH2_HWSW__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH2_HWSW__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH2_HWSW__hw__hw__MASK 0xffff0000U
+#define R_DMA_CH2_HWSW__sw__sw__MASK 0x0000ffffU
+
+#define R_DMA_CH2_HWSW__hw__MAX 0xffff
+#define R_DMA_CH2_HWSW__sw__MAX 0xffff
+
+#define R_DMA_CH2_HWSW__hw__MIN 0
+#define R_DMA_CH2_HWSW__sw__MIN 0
+
+#define R_DMA_CH2_HWSW__hw__BITNR 16
+#define R_DMA_CH2_HWSW__sw__BITNR 0
+
+#define R_DMA_CH2_HWSW__hw__hw__VAL REG_VAL_VAL
+#define R_DMA_CH2_HWSW__sw__sw__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH2_NEXT
+ * - type: RW
+ * - addr: 0xb0000124
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH2_NEXT__ADDR (REG_TYPECAST_UDWORD 0xb0000124)
+#define R_DMA_CH2_NEXT__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH2_NEXT__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH2_NEXT__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH2_NEXT__TYPE (REG_UDWORD)
+#define R_DMA_CH2_NEXT__GET REG_GET_RW
+#define R_DMA_CH2_NEXT__IGET REG_IGET_RW
+#define R_DMA_CH2_NEXT__SET REG_SET_RW
+#define R_DMA_CH2_NEXT__ISET REG_ISET_RW
+#define R_DMA_CH2_NEXT__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH2_NEXT__EQL REG_EQL_RW
+#define R_DMA_CH2_NEXT__IEQL REG_IEQL_RW
+#define R_DMA_CH2_NEXT__RD REG_RD_RW
+#define R_DMA_CH2_NEXT__IRD REG_IRD_RW
+#define R_DMA_CH2_NEXT__WR REG_WR_RW
+#define R_DMA_CH2_NEXT__IWR REG_IWR_RW
+
+#define R_DMA_CH2_NEXT__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH2_NEXT__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH2_NEXT__next__next__MASK 0xffffffffU
+
+#define R_DMA_CH2_NEXT__next__MAX 0xffffffff
+
+#define R_DMA_CH2_NEXT__next__MIN 0
+
+#define R_DMA_CH2_NEXT__next__BITNR 0
+
+#define R_DMA_CH2_NEXT__next__next__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH2_STATUS
+ * - type: RO
+ * - addr: 0xb00001da
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH2_STATUS__ADDR (REG_TYPECAST_BYTE 0xb00001da)
+#define R_DMA_CH2_STATUS__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH2_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH2_STATUS__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH2_STATUS__TYPE (REG_BYTE)
+#define R_DMA_CH2_STATUS__GET REG_GET_RO
+#define R_DMA_CH2_STATUS__IGET REG_IGET_RO
+#define R_DMA_CH2_STATUS__SET REG_SET_RO
+#define R_DMA_CH2_STATUS__ISET REG_ISET_RO
+#define R_DMA_CH2_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_DMA_CH2_STATUS__EQL REG_EQL_RO
+#define R_DMA_CH2_STATUS__IEQL REG_IEQL_RO
+#define R_DMA_CH2_STATUS__RD REG_RD_RO
+#define R_DMA_CH2_STATUS__IRD REG_IRD_RO
+#define R_DMA_CH2_STATUS__WR REG_WR_RO
+#define R_DMA_CH2_STATUS__IWR REG_IWR_RO
+
+#define R_DMA_CH2_STATUS__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH2_STATUS__avail__avail__MASK 0x0000007fU
+
+#define R_DMA_CH2_STATUS__avail__MAX 0x7f
+
+#define R_DMA_CH2_STATUS__avail__MIN 0
+
+#define R_DMA_CH2_STATUS__avail__BITNR 0
+
+#define R_DMA_CH2_STATUS__avail__avail__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH3_BUF
+ * - type: RW
+ * - addr: 0xb0000138
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH3_BUF__ADDR (REG_TYPECAST_UDWORD 0xb0000138)
+#define R_DMA_CH3_BUF__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH3_BUF__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH3_BUF__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH3_BUF__TYPE (REG_UDWORD)
+#define R_DMA_CH3_BUF__GET REG_GET_RW
+#define R_DMA_CH3_BUF__IGET REG_IGET_RW
+#define R_DMA_CH3_BUF__SET REG_SET_RW
+#define R_DMA_CH3_BUF__ISET REG_ISET_RW
+#define R_DMA_CH3_BUF__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH3_BUF__EQL REG_EQL_RW
+#define R_DMA_CH3_BUF__IEQL REG_IEQL_RW
+#define R_DMA_CH3_BUF__RD REG_RD_RW
+#define R_DMA_CH3_BUF__IRD REG_IRD_RW
+#define R_DMA_CH3_BUF__WR REG_WR_RW
+#define R_DMA_CH3_BUF__IWR REG_IWR_RW
+
+#define R_DMA_CH3_BUF__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH3_BUF__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH3_BUF__buf__buf__MASK 0xffffffffU
+
+#define R_DMA_CH3_BUF__buf__MAX 0xffffffff
+
+#define R_DMA_CH3_BUF__buf__MIN 0
+
+#define R_DMA_CH3_BUF__buf__BITNR 0
+
+#define R_DMA_CH3_BUF__buf__buf__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH3_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001dd
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH3_CLR_INTR__ADDR (REG_TYPECAST_BYTE 0xb00001dd)
+
+#ifndef REG_NO_SHADOW
+#define R_DMA_CH3_CLR_INTR__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_DMA_CH3_CLR_INTR + 0))
+#define R_DMA_CH3_CLR_INTR__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_DMA_CH3_CLR_INTR + 0))
+#else /* REG_NO_SHADOW */
+#define R_DMA_CH3_CLR_INTR__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_DMA_CH3_CLR_INTR__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_DMA_CH3_CLR_INTR__STYPECAST REG_STYPECAST_BYTE
+#define R_DMA_CH3_CLR_INTR__SVAL REG_SVAL_ZERO
+#define R_DMA_CH3_CLR_INTR__SVAL_I REG_SVAL_I_ZERO
+#define R_DMA_CH3_CLR_INTR__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH3_CLR_INTR__TYPE (REG_BYTE)
+#define R_DMA_CH3_CLR_INTR__GET REG_GET_WO
+#define R_DMA_CH3_CLR_INTR__IGET REG_IGET_WO
+#define R_DMA_CH3_CLR_INTR__SET REG_SET_WO
+#define R_DMA_CH3_CLR_INTR__ISET REG_ISET_WO
+#define R_DMA_CH3_CLR_INTR__SET_VAL REG_SET_VAL_WO
+#define R_DMA_CH3_CLR_INTR__EQL REG_EQL_WO
+#define R_DMA_CH3_CLR_INTR__IEQL REG_IEQL_WO
+#define R_DMA_CH3_CLR_INTR__RD REG_RD_WO
+#define R_DMA_CH3_CLR_INTR__IRD REG_IRD_WO
+#define R_DMA_CH3_CLR_INTR__WR REG_WR_WO
+#define R_DMA_CH3_CLR_INTR__IWR REG_IWR_WO
+
+#define R_DMA_CH3_CLR_INTR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_DMA_CH3_CLR_INTR__clr_eop__clr_eop__MASK 0x00000002U
+#define R_DMA_CH3_CLR_INTR__clr_descr__clr_descr__MASK 0x00000001U
+
+#define R_DMA_CH3_CLR_INTR__clr_eop__MAX 0x1
+#define R_DMA_CH3_CLR_INTR__clr_descr__MAX 0x1
+
+#define R_DMA_CH3_CLR_INTR__clr_eop__MIN 0
+#define R_DMA_CH3_CLR_INTR__clr_descr__MIN 0
+
+#define R_DMA_CH3_CLR_INTR__clr_eop__BITNR 1
+#define R_DMA_CH3_CLR_INTR__clr_descr__BITNR 0
+
+#define R_DMA_CH3_CLR_INTR__clr_eop__clr_eop__VAL REG_VAL_ENUM
+#define R_DMA_CH3_CLR_INTR__clr_descr__clr_descr__VAL REG_VAL_ENUM
+
+#define R_DMA_CH3_CLR_INTR__clr_eop__clr_eop__do 1
+#define R_DMA_CH3_CLR_INTR__clr_eop__clr_eop__dont 0
+#define R_DMA_CH3_CLR_INTR__clr_descr__clr_descr__do 1
+#define R_DMA_CH3_CLR_INTR__clr_descr__clr_descr__dont 0
+
+#endif
+
+/*
+ * R_DMA_CH3_CMD
+ * - type: RW
+ * - addr: 0xb00001dc
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH3_CMD__ADDR (REG_TYPECAST_BYTE 0xb00001dc)
+#define R_DMA_CH3_CMD__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH3_CMD__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH3_CMD__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH3_CMD__TYPE (REG_BYTE)
+#define R_DMA_CH3_CMD__GET REG_GET_RW
+#define R_DMA_CH3_CMD__IGET REG_IGET_RW
+#define R_DMA_CH3_CMD__SET REG_SET_RW
+#define R_DMA_CH3_CMD__ISET REG_ISET_RW
+#define R_DMA_CH3_CMD__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH3_CMD__EQL REG_EQL_RW
+#define R_DMA_CH3_CMD__IEQL REG_IEQL_RW
+#define R_DMA_CH3_CMD__RD REG_RD_RW
+#define R_DMA_CH3_CMD__IRD REG_IRD_RW
+#define R_DMA_CH3_CMD__WR REG_WR_RW
+#define R_DMA_CH3_CMD__IWR REG_IWR_RW
+
+#define R_DMA_CH3_CMD__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH3_CMD__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH3_CMD__cmd__cmd__MASK 0x00000007U
+
+#define R_DMA_CH3_CMD__cmd__MAX 0x7
+
+#define R_DMA_CH3_CMD__cmd__MIN 0
+
+#define R_DMA_CH3_CMD__cmd__BITNR 0
+
+#define R_DMA_CH3_CMD__cmd__cmd__VAL REG_VAL_ENUM
+
+#define R_DMA_CH3_CMD__cmd__cmd__continue 3
+#define R_DMA_CH3_CMD__cmd__cmd__hold 0
+#define R_DMA_CH3_CMD__cmd__cmd__reset 4
+#define R_DMA_CH3_CMD__cmd__cmd__restart 3
+#define R_DMA_CH3_CMD__cmd__cmd__start 1
+
+#endif
+
+/*
+ * R_DMA_CH3_DESCR
+ * - type: RW
+ * - addr: 0xb000013c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH3_DESCR__ADDR (REG_TYPECAST_UDWORD 0xb000013c)
+#define R_DMA_CH3_DESCR__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH3_DESCR__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH3_DESCR__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH3_DESCR__TYPE (REG_UDWORD)
+#define R_DMA_CH3_DESCR__GET REG_GET_RW
+#define R_DMA_CH3_DESCR__IGET REG_IGET_RW
+#define R_DMA_CH3_DESCR__SET REG_SET_RW
+#define R_DMA_CH3_DESCR__ISET REG_ISET_RW
+#define R_DMA_CH3_DESCR__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH3_DESCR__EQL REG_EQL_RW
+#define R_DMA_CH3_DESCR__IEQL REG_IEQL_RW
+#define R_DMA_CH3_DESCR__RD REG_RD_RW
+#define R_DMA_CH3_DESCR__IRD REG_IRD_RW
+#define R_DMA_CH3_DESCR__WR REG_WR_RW
+#define R_DMA_CH3_DESCR__IWR REG_IWR_RW
+
+#define R_DMA_CH3_DESCR__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH3_DESCR__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH3_DESCR__descr__descr__MASK 0xffffffffU
+
+#define R_DMA_CH3_DESCR__descr__MAX 0xffffffff
+
+#define R_DMA_CH3_DESCR__descr__MIN 0
+
+#define R_DMA_CH3_DESCR__descr__BITNR 0
+
+#define R_DMA_CH3_DESCR__descr__descr__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH3_FIRST
+ * - type: RW
+ * - addr: 0xb00001ac
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH3_FIRST__ADDR (REG_TYPECAST_UDWORD 0xb00001ac)
+#define R_DMA_CH3_FIRST__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH3_FIRST__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH3_FIRST__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH3_FIRST__TYPE (REG_UDWORD)
+#define R_DMA_CH3_FIRST__GET REG_GET_RW
+#define R_DMA_CH3_FIRST__IGET REG_IGET_RW
+#define R_DMA_CH3_FIRST__SET REG_SET_RW
+#define R_DMA_CH3_FIRST__ISET REG_ISET_RW
+#define R_DMA_CH3_FIRST__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH3_FIRST__EQL REG_EQL_RW
+#define R_DMA_CH3_FIRST__IEQL REG_IEQL_RW
+#define R_DMA_CH3_FIRST__RD REG_RD_RW
+#define R_DMA_CH3_FIRST__IRD REG_IRD_RW
+#define R_DMA_CH3_FIRST__WR REG_WR_RW
+#define R_DMA_CH3_FIRST__IWR REG_IWR_RW
+
+#define R_DMA_CH3_FIRST__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH3_FIRST__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH3_FIRST__first__first__MASK 0xffffffffU
+
+#define R_DMA_CH3_FIRST__first__MAX 0xffffffff
+
+#define R_DMA_CH3_FIRST__first__MIN 0
+
+#define R_DMA_CH3_FIRST__first__BITNR 0
+
+#define R_DMA_CH3_FIRST__first__first__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH3_HWSW
+ * - type: RW
+ * - addr: 0xb0000130
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH3_HWSW__ADDR (REG_TYPECAST_UDWORD 0xb0000130)
+#define R_DMA_CH3_HWSW__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH3_HWSW__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH3_HWSW__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH3_HWSW__TYPE (REG_UDWORD)
+#define R_DMA_CH3_HWSW__GET REG_GET_RW
+#define R_DMA_CH3_HWSW__IGET REG_IGET_RW
+#define R_DMA_CH3_HWSW__SET REG_SET_RW
+#define R_DMA_CH3_HWSW__ISET REG_ISET_RW
+#define R_DMA_CH3_HWSW__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH3_HWSW__EQL REG_EQL_RW
+#define R_DMA_CH3_HWSW__IEQL REG_IEQL_RW
+#define R_DMA_CH3_HWSW__RD REG_RD_RW
+#define R_DMA_CH3_HWSW__IRD REG_IRD_RW
+#define R_DMA_CH3_HWSW__WR REG_WR_RW
+#define R_DMA_CH3_HWSW__IWR REG_IWR_RW
+
+#define R_DMA_CH3_HWSW__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH3_HWSW__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH3_HWSW__hw__hw__MASK 0xffff0000U
+#define R_DMA_CH3_HWSW__sw__sw__MASK 0x0000ffffU
+
+#define R_DMA_CH3_HWSW__hw__MAX 0xffff
+#define R_DMA_CH3_HWSW__sw__MAX 0xffff
+
+#define R_DMA_CH3_HWSW__hw__MIN 0
+#define R_DMA_CH3_HWSW__sw__MIN 0
+
+#define R_DMA_CH3_HWSW__hw__BITNR 16
+#define R_DMA_CH3_HWSW__sw__BITNR 0
+
+#define R_DMA_CH3_HWSW__hw__hw__VAL REG_VAL_VAL
+#define R_DMA_CH3_HWSW__sw__sw__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH3_NEXT
+ * - type: RW
+ * - addr: 0xb0000134
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH3_NEXT__ADDR (REG_TYPECAST_UDWORD 0xb0000134)
+#define R_DMA_CH3_NEXT__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH3_NEXT__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH3_NEXT__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH3_NEXT__TYPE (REG_UDWORD)
+#define R_DMA_CH3_NEXT__GET REG_GET_RW
+#define R_DMA_CH3_NEXT__IGET REG_IGET_RW
+#define R_DMA_CH3_NEXT__SET REG_SET_RW
+#define R_DMA_CH3_NEXT__ISET REG_ISET_RW
+#define R_DMA_CH3_NEXT__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH3_NEXT__EQL REG_EQL_RW
+#define R_DMA_CH3_NEXT__IEQL REG_IEQL_RW
+#define R_DMA_CH3_NEXT__RD REG_RD_RW
+#define R_DMA_CH3_NEXT__IRD REG_IRD_RW
+#define R_DMA_CH3_NEXT__WR REG_WR_RW
+#define R_DMA_CH3_NEXT__IWR REG_IWR_RW
+
+#define R_DMA_CH3_NEXT__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH3_NEXT__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH3_NEXT__next__next__MASK 0xffffffffU
+
+#define R_DMA_CH3_NEXT__next__MAX 0xffffffff
+
+#define R_DMA_CH3_NEXT__next__MIN 0
+
+#define R_DMA_CH3_NEXT__next__BITNR 0
+
+#define R_DMA_CH3_NEXT__next__next__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH3_STATUS
+ * - type: RO
+ * - addr: 0xb00001de
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH3_STATUS__ADDR (REG_TYPECAST_BYTE 0xb00001de)
+#define R_DMA_CH3_STATUS__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH3_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH3_STATUS__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH3_STATUS__TYPE (REG_BYTE)
+#define R_DMA_CH3_STATUS__GET REG_GET_RO
+#define R_DMA_CH3_STATUS__IGET REG_IGET_RO
+#define R_DMA_CH3_STATUS__SET REG_SET_RO
+#define R_DMA_CH3_STATUS__ISET REG_ISET_RO
+#define R_DMA_CH3_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_DMA_CH3_STATUS__EQL REG_EQL_RO
+#define R_DMA_CH3_STATUS__IEQL REG_IEQL_RO
+#define R_DMA_CH3_STATUS__RD REG_RD_RO
+#define R_DMA_CH3_STATUS__IRD REG_IRD_RO
+#define R_DMA_CH3_STATUS__WR REG_WR_RO
+#define R_DMA_CH3_STATUS__IWR REG_IWR_RO
+
+#define R_DMA_CH3_STATUS__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH3_STATUS__avail__avail__MASK 0x0000007fU
+
+#define R_DMA_CH3_STATUS__avail__MAX 0x7f
+
+#define R_DMA_CH3_STATUS__avail__MIN 0
+
+#define R_DMA_CH3_STATUS__avail__BITNR 0
+
+#define R_DMA_CH3_STATUS__avail__avail__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH4_BUF
+ * - type: RW
+ * - addr: 0xb0000148
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH4_BUF__ADDR (REG_TYPECAST_UDWORD 0xb0000148)
+#define R_DMA_CH4_BUF__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH4_BUF__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH4_BUF__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH4_BUF__TYPE (REG_UDWORD)
+#define R_DMA_CH4_BUF__GET REG_GET_RW
+#define R_DMA_CH4_BUF__IGET REG_IGET_RW
+#define R_DMA_CH4_BUF__SET REG_SET_RW
+#define R_DMA_CH4_BUF__ISET REG_ISET_RW
+#define R_DMA_CH4_BUF__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH4_BUF__EQL REG_EQL_RW
+#define R_DMA_CH4_BUF__IEQL REG_IEQL_RW
+#define R_DMA_CH4_BUF__RD REG_RD_RW
+#define R_DMA_CH4_BUF__IRD REG_IRD_RW
+#define R_DMA_CH4_BUF__WR REG_WR_RW
+#define R_DMA_CH4_BUF__IWR REG_IWR_RW
+
+#define R_DMA_CH4_BUF__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH4_BUF__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH4_BUF__buf__buf__MASK 0xffffffffU
+
+#define R_DMA_CH4_BUF__buf__MAX 0xffffffff
+
+#define R_DMA_CH4_BUF__buf__MIN 0
+
+#define R_DMA_CH4_BUF__buf__BITNR 0
+
+#define R_DMA_CH4_BUF__buf__buf__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH4_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001e1
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH4_CLR_INTR__ADDR (REG_TYPECAST_BYTE 0xb00001e1)
+
+#ifndef REG_NO_SHADOW
+#define R_DMA_CH4_CLR_INTR__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_DMA_CH4_CLR_INTR + 0))
+#define R_DMA_CH4_CLR_INTR__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_DMA_CH4_CLR_INTR + 0))
+#else /* REG_NO_SHADOW */
+#define R_DMA_CH4_CLR_INTR__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_DMA_CH4_CLR_INTR__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_DMA_CH4_CLR_INTR__STYPECAST REG_STYPECAST_BYTE
+#define R_DMA_CH4_CLR_INTR__SVAL REG_SVAL_ZERO
+#define R_DMA_CH4_CLR_INTR__SVAL_I REG_SVAL_I_ZERO
+#define R_DMA_CH4_CLR_INTR__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH4_CLR_INTR__TYPE (REG_BYTE)
+#define R_DMA_CH4_CLR_INTR__GET REG_GET_WO
+#define R_DMA_CH4_CLR_INTR__IGET REG_IGET_WO
+#define R_DMA_CH4_CLR_INTR__SET REG_SET_WO
+#define R_DMA_CH4_CLR_INTR__ISET REG_ISET_WO
+#define R_DMA_CH4_CLR_INTR__SET_VAL REG_SET_VAL_WO
+#define R_DMA_CH4_CLR_INTR__EQL REG_EQL_WO
+#define R_DMA_CH4_CLR_INTR__IEQL REG_IEQL_WO
+#define R_DMA_CH4_CLR_INTR__RD REG_RD_WO
+#define R_DMA_CH4_CLR_INTR__IRD REG_IRD_WO
+#define R_DMA_CH4_CLR_INTR__WR REG_WR_WO
+#define R_DMA_CH4_CLR_INTR__IWR REG_IWR_WO
+
+#define R_DMA_CH4_CLR_INTR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_DMA_CH4_CLR_INTR__clr_eop__clr_eop__MASK 0x00000002U
+#define R_DMA_CH4_CLR_INTR__clr_descr__clr_descr__MASK 0x00000001U
+
+#define R_DMA_CH4_CLR_INTR__clr_eop__MAX 0x1
+#define R_DMA_CH4_CLR_INTR__clr_descr__MAX 0x1
+
+#define R_DMA_CH4_CLR_INTR__clr_eop__MIN 0
+#define R_DMA_CH4_CLR_INTR__clr_descr__MIN 0
+
+#define R_DMA_CH4_CLR_INTR__clr_eop__BITNR 1
+#define R_DMA_CH4_CLR_INTR__clr_descr__BITNR 0
+
+#define R_DMA_CH4_CLR_INTR__clr_eop__clr_eop__VAL REG_VAL_ENUM
+#define R_DMA_CH4_CLR_INTR__clr_descr__clr_descr__VAL REG_VAL_ENUM
+
+#define R_DMA_CH4_CLR_INTR__clr_eop__clr_eop__do 1
+#define R_DMA_CH4_CLR_INTR__clr_eop__clr_eop__dont 0
+#define R_DMA_CH4_CLR_INTR__clr_descr__clr_descr__do 1
+#define R_DMA_CH4_CLR_INTR__clr_descr__clr_descr__dont 0
+
+#endif
+
+/*
+ * R_DMA_CH4_CMD
+ * - type: RW
+ * - addr: 0xb00001e0
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH4_CMD__ADDR (REG_TYPECAST_BYTE 0xb00001e0)
+#define R_DMA_CH4_CMD__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH4_CMD__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH4_CMD__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH4_CMD__TYPE (REG_BYTE)
+#define R_DMA_CH4_CMD__GET REG_GET_RW
+#define R_DMA_CH4_CMD__IGET REG_IGET_RW
+#define R_DMA_CH4_CMD__SET REG_SET_RW
+#define R_DMA_CH4_CMD__ISET REG_ISET_RW
+#define R_DMA_CH4_CMD__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH4_CMD__EQL REG_EQL_RW
+#define R_DMA_CH4_CMD__IEQL REG_IEQL_RW
+#define R_DMA_CH4_CMD__RD REG_RD_RW
+#define R_DMA_CH4_CMD__IRD REG_IRD_RW
+#define R_DMA_CH4_CMD__WR REG_WR_RW
+#define R_DMA_CH4_CMD__IWR REG_IWR_RW
+
+#define R_DMA_CH4_CMD__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH4_CMD__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH4_CMD__cmd__cmd__MASK 0x00000007U
+
+#define R_DMA_CH4_CMD__cmd__MAX 0x7
+
+#define R_DMA_CH4_CMD__cmd__MIN 0
+
+#define R_DMA_CH4_CMD__cmd__BITNR 0
+
+#define R_DMA_CH4_CMD__cmd__cmd__VAL REG_VAL_ENUM
+
+#define R_DMA_CH4_CMD__cmd__cmd__continue 3
+#define R_DMA_CH4_CMD__cmd__cmd__hold 0
+#define R_DMA_CH4_CMD__cmd__cmd__reset 4
+#define R_DMA_CH4_CMD__cmd__cmd__restart 3
+#define R_DMA_CH4_CMD__cmd__cmd__start 1
+
+#endif
+
+/*
+ * R_DMA_CH4_DESCR
+ * - type: RW
+ * - addr: 0xb000014c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH4_DESCR__ADDR (REG_TYPECAST_UDWORD 0xb000014c)
+#define R_DMA_CH4_DESCR__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH4_DESCR__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH4_DESCR__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH4_DESCR__TYPE (REG_UDWORD)
+#define R_DMA_CH4_DESCR__GET REG_GET_RW
+#define R_DMA_CH4_DESCR__IGET REG_IGET_RW
+#define R_DMA_CH4_DESCR__SET REG_SET_RW
+#define R_DMA_CH4_DESCR__ISET REG_ISET_RW
+#define R_DMA_CH4_DESCR__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH4_DESCR__EQL REG_EQL_RW
+#define R_DMA_CH4_DESCR__IEQL REG_IEQL_RW
+#define R_DMA_CH4_DESCR__RD REG_RD_RW
+#define R_DMA_CH4_DESCR__IRD REG_IRD_RW
+#define R_DMA_CH4_DESCR__WR REG_WR_RW
+#define R_DMA_CH4_DESCR__IWR REG_IWR_RW
+
+#define R_DMA_CH4_DESCR__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH4_DESCR__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH4_DESCR__descr__descr__MASK 0xffffffffU
+
+#define R_DMA_CH4_DESCR__descr__MAX 0xffffffff
+
+#define R_DMA_CH4_DESCR__descr__MIN 0
+
+#define R_DMA_CH4_DESCR__descr__BITNR 0
+
+#define R_DMA_CH4_DESCR__descr__descr__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH4_FIRST
+ * - type: RW
+ * - addr: 0xb00001b0
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH4_FIRST__ADDR (REG_TYPECAST_UDWORD 0xb00001b0)
+#define R_DMA_CH4_FIRST__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH4_FIRST__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH4_FIRST__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH4_FIRST__TYPE (REG_UDWORD)
+#define R_DMA_CH4_FIRST__GET REG_GET_RW
+#define R_DMA_CH4_FIRST__IGET REG_IGET_RW
+#define R_DMA_CH4_FIRST__SET REG_SET_RW
+#define R_DMA_CH4_FIRST__ISET REG_ISET_RW
+#define R_DMA_CH4_FIRST__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH4_FIRST__EQL REG_EQL_RW
+#define R_DMA_CH4_FIRST__IEQL REG_IEQL_RW
+#define R_DMA_CH4_FIRST__RD REG_RD_RW
+#define R_DMA_CH4_FIRST__IRD REG_IRD_RW
+#define R_DMA_CH4_FIRST__WR REG_WR_RW
+#define R_DMA_CH4_FIRST__IWR REG_IWR_RW
+
+#define R_DMA_CH4_FIRST__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH4_FIRST__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH4_FIRST__first__first__MASK 0xffffffffU
+
+#define R_DMA_CH4_FIRST__first__MAX 0xffffffff
+
+#define R_DMA_CH4_FIRST__first__MIN 0
+
+#define R_DMA_CH4_FIRST__first__BITNR 0
+
+#define R_DMA_CH4_FIRST__first__first__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH4_HWSW
+ * - type: RW
+ * - addr: 0xb0000140
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH4_HWSW__ADDR (REG_TYPECAST_UDWORD 0xb0000140)
+#define R_DMA_CH4_HWSW__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH4_HWSW__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH4_HWSW__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH4_HWSW__TYPE (REG_UDWORD)
+#define R_DMA_CH4_HWSW__GET REG_GET_RW
+#define R_DMA_CH4_HWSW__IGET REG_IGET_RW
+#define R_DMA_CH4_HWSW__SET REG_SET_RW
+#define R_DMA_CH4_HWSW__ISET REG_ISET_RW
+#define R_DMA_CH4_HWSW__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH4_HWSW__EQL REG_EQL_RW
+#define R_DMA_CH4_HWSW__IEQL REG_IEQL_RW
+#define R_DMA_CH4_HWSW__RD REG_RD_RW
+#define R_DMA_CH4_HWSW__IRD REG_IRD_RW
+#define R_DMA_CH4_HWSW__WR REG_WR_RW
+#define R_DMA_CH4_HWSW__IWR REG_IWR_RW
+
+#define R_DMA_CH4_HWSW__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH4_HWSW__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH4_HWSW__hw__hw__MASK 0xffff0000U
+#define R_DMA_CH4_HWSW__sw__sw__MASK 0x0000ffffU
+
+#define R_DMA_CH4_HWSW__hw__MAX 0xffff
+#define R_DMA_CH4_HWSW__sw__MAX 0xffff
+
+#define R_DMA_CH4_HWSW__hw__MIN 0
+#define R_DMA_CH4_HWSW__sw__MIN 0
+
+#define R_DMA_CH4_HWSW__hw__BITNR 16
+#define R_DMA_CH4_HWSW__sw__BITNR 0
+
+#define R_DMA_CH4_HWSW__hw__hw__VAL REG_VAL_VAL
+#define R_DMA_CH4_HWSW__sw__sw__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH4_NEXT
+ * - type: RW
+ * - addr: 0xb0000144
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH4_NEXT__ADDR (REG_TYPECAST_UDWORD 0xb0000144)
+#define R_DMA_CH4_NEXT__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH4_NEXT__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH4_NEXT__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH4_NEXT__TYPE (REG_UDWORD)
+#define R_DMA_CH4_NEXT__GET REG_GET_RW
+#define R_DMA_CH4_NEXT__IGET REG_IGET_RW
+#define R_DMA_CH4_NEXT__SET REG_SET_RW
+#define R_DMA_CH4_NEXT__ISET REG_ISET_RW
+#define R_DMA_CH4_NEXT__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH4_NEXT__EQL REG_EQL_RW
+#define R_DMA_CH4_NEXT__IEQL REG_IEQL_RW
+#define R_DMA_CH4_NEXT__RD REG_RD_RW
+#define R_DMA_CH4_NEXT__IRD REG_IRD_RW
+#define R_DMA_CH4_NEXT__WR REG_WR_RW
+#define R_DMA_CH4_NEXT__IWR REG_IWR_RW
+
+#define R_DMA_CH4_NEXT__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH4_NEXT__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH4_NEXT__next__next__MASK 0xffffffffU
+
+#define R_DMA_CH4_NEXT__next__MAX 0xffffffff
+
+#define R_DMA_CH4_NEXT__next__MIN 0
+
+#define R_DMA_CH4_NEXT__next__BITNR 0
+
+#define R_DMA_CH4_NEXT__next__next__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH4_STATUS
+ * - type: RO
+ * - addr: 0xb00001e2
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH4_STATUS__ADDR (REG_TYPECAST_BYTE 0xb00001e2)
+#define R_DMA_CH4_STATUS__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH4_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH4_STATUS__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH4_STATUS__TYPE (REG_BYTE)
+#define R_DMA_CH4_STATUS__GET REG_GET_RO
+#define R_DMA_CH4_STATUS__IGET REG_IGET_RO
+#define R_DMA_CH4_STATUS__SET REG_SET_RO
+#define R_DMA_CH4_STATUS__ISET REG_ISET_RO
+#define R_DMA_CH4_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_DMA_CH4_STATUS__EQL REG_EQL_RO
+#define R_DMA_CH4_STATUS__IEQL REG_IEQL_RO
+#define R_DMA_CH4_STATUS__RD REG_RD_RO
+#define R_DMA_CH4_STATUS__IRD REG_IRD_RO
+#define R_DMA_CH4_STATUS__WR REG_WR_RO
+#define R_DMA_CH4_STATUS__IWR REG_IWR_RO
+
+#define R_DMA_CH4_STATUS__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH4_STATUS__avail__avail__MASK 0x0000007fU
+
+#define R_DMA_CH4_STATUS__avail__MAX 0x7f
+
+#define R_DMA_CH4_STATUS__avail__MIN 0
+
+#define R_DMA_CH4_STATUS__avail__BITNR 0
+
+#define R_DMA_CH4_STATUS__avail__avail__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH5_BUF
+ * - type: RW
+ * - addr: 0xb0000158
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH5_BUF__ADDR (REG_TYPECAST_UDWORD 0xb0000158)
+#define R_DMA_CH5_BUF__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH5_BUF__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH5_BUF__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH5_BUF__TYPE (REG_UDWORD)
+#define R_DMA_CH5_BUF__GET REG_GET_RW
+#define R_DMA_CH5_BUF__IGET REG_IGET_RW
+#define R_DMA_CH5_BUF__SET REG_SET_RW
+#define R_DMA_CH5_BUF__ISET REG_ISET_RW
+#define R_DMA_CH5_BUF__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH5_BUF__EQL REG_EQL_RW
+#define R_DMA_CH5_BUF__IEQL REG_IEQL_RW
+#define R_DMA_CH5_BUF__RD REG_RD_RW
+#define R_DMA_CH5_BUF__IRD REG_IRD_RW
+#define R_DMA_CH5_BUF__WR REG_WR_RW
+#define R_DMA_CH5_BUF__IWR REG_IWR_RW
+
+#define R_DMA_CH5_BUF__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH5_BUF__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH5_BUF__buf__buf__MASK 0xffffffffU
+
+#define R_DMA_CH5_BUF__buf__MAX 0xffffffff
+
+#define R_DMA_CH5_BUF__buf__MIN 0
+
+#define R_DMA_CH5_BUF__buf__BITNR 0
+
+#define R_DMA_CH5_BUF__buf__buf__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH5_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001e5
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH5_CLR_INTR__ADDR (REG_TYPECAST_BYTE 0xb00001e5)
+
+#ifndef REG_NO_SHADOW
+#define R_DMA_CH5_CLR_INTR__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_DMA_CH5_CLR_INTR + 0))
+#define R_DMA_CH5_CLR_INTR__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_DMA_CH5_CLR_INTR + 0))
+#else /* REG_NO_SHADOW */
+#define R_DMA_CH5_CLR_INTR__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_DMA_CH5_CLR_INTR__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_DMA_CH5_CLR_INTR__STYPECAST REG_STYPECAST_BYTE
+#define R_DMA_CH5_CLR_INTR__SVAL REG_SVAL_ZERO
+#define R_DMA_CH5_CLR_INTR__SVAL_I REG_SVAL_I_ZERO
+#define R_DMA_CH5_CLR_INTR__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH5_CLR_INTR__TYPE (REG_BYTE)
+#define R_DMA_CH5_CLR_INTR__GET REG_GET_WO
+#define R_DMA_CH5_CLR_INTR__IGET REG_IGET_WO
+#define R_DMA_CH5_CLR_INTR__SET REG_SET_WO
+#define R_DMA_CH5_CLR_INTR__ISET REG_ISET_WO
+#define R_DMA_CH5_CLR_INTR__SET_VAL REG_SET_VAL_WO
+#define R_DMA_CH5_CLR_INTR__EQL REG_EQL_WO
+#define R_DMA_CH5_CLR_INTR__IEQL REG_IEQL_WO
+#define R_DMA_CH5_CLR_INTR__RD REG_RD_WO
+#define R_DMA_CH5_CLR_INTR__IRD REG_IRD_WO
+#define R_DMA_CH5_CLR_INTR__WR REG_WR_WO
+#define R_DMA_CH5_CLR_INTR__IWR REG_IWR_WO
+
+#define R_DMA_CH5_CLR_INTR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_DMA_CH5_CLR_INTR__clr_eop__clr_eop__MASK 0x00000002U
+#define R_DMA_CH5_CLR_INTR__clr_descr__clr_descr__MASK 0x00000001U
+
+#define R_DMA_CH5_CLR_INTR__clr_eop__MAX 0x1
+#define R_DMA_CH5_CLR_INTR__clr_descr__MAX 0x1
+
+#define R_DMA_CH5_CLR_INTR__clr_eop__MIN 0
+#define R_DMA_CH5_CLR_INTR__clr_descr__MIN 0
+
+#define R_DMA_CH5_CLR_INTR__clr_eop__BITNR 1
+#define R_DMA_CH5_CLR_INTR__clr_descr__BITNR 0
+
+#define R_DMA_CH5_CLR_INTR__clr_eop__clr_eop__VAL REG_VAL_ENUM
+#define R_DMA_CH5_CLR_INTR__clr_descr__clr_descr__VAL REG_VAL_ENUM
+
+#define R_DMA_CH5_CLR_INTR__clr_eop__clr_eop__do 1
+#define R_DMA_CH5_CLR_INTR__clr_eop__clr_eop__dont 0
+#define R_DMA_CH5_CLR_INTR__clr_descr__clr_descr__do 1
+#define R_DMA_CH5_CLR_INTR__clr_descr__clr_descr__dont 0
+
+#endif
+
+/*
+ * R_DMA_CH5_CMD
+ * - type: RW
+ * - addr: 0xb00001e4
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH5_CMD__ADDR (REG_TYPECAST_BYTE 0xb00001e4)
+#define R_DMA_CH5_CMD__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH5_CMD__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH5_CMD__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH5_CMD__TYPE (REG_BYTE)
+#define R_DMA_CH5_CMD__GET REG_GET_RW
+#define R_DMA_CH5_CMD__IGET REG_IGET_RW
+#define R_DMA_CH5_CMD__SET REG_SET_RW
+#define R_DMA_CH5_CMD__ISET REG_ISET_RW
+#define R_DMA_CH5_CMD__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH5_CMD__EQL REG_EQL_RW
+#define R_DMA_CH5_CMD__IEQL REG_IEQL_RW
+#define R_DMA_CH5_CMD__RD REG_RD_RW
+#define R_DMA_CH5_CMD__IRD REG_IRD_RW
+#define R_DMA_CH5_CMD__WR REG_WR_RW
+#define R_DMA_CH5_CMD__IWR REG_IWR_RW
+
+#define R_DMA_CH5_CMD__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH5_CMD__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH5_CMD__cmd__cmd__MASK 0x00000007U
+
+#define R_DMA_CH5_CMD__cmd__MAX 0x7
+
+#define R_DMA_CH5_CMD__cmd__MIN 0
+
+#define R_DMA_CH5_CMD__cmd__BITNR 0
+
+#define R_DMA_CH5_CMD__cmd__cmd__VAL REG_VAL_ENUM
+
+#define R_DMA_CH5_CMD__cmd__cmd__continue 3
+#define R_DMA_CH5_CMD__cmd__cmd__hold 0
+#define R_DMA_CH5_CMD__cmd__cmd__reset 4
+#define R_DMA_CH5_CMD__cmd__cmd__restart 3
+#define R_DMA_CH5_CMD__cmd__cmd__start 1
+
+#endif
+
+/*
+ * R_DMA_CH5_DESCR
+ * - type: RW
+ * - addr: 0xb000015c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH5_DESCR__ADDR (REG_TYPECAST_UDWORD 0xb000015c)
+#define R_DMA_CH5_DESCR__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH5_DESCR__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH5_DESCR__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH5_DESCR__TYPE (REG_UDWORD)
+#define R_DMA_CH5_DESCR__GET REG_GET_RW
+#define R_DMA_CH5_DESCR__IGET REG_IGET_RW
+#define R_DMA_CH5_DESCR__SET REG_SET_RW
+#define R_DMA_CH5_DESCR__ISET REG_ISET_RW
+#define R_DMA_CH5_DESCR__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH5_DESCR__EQL REG_EQL_RW
+#define R_DMA_CH5_DESCR__IEQL REG_IEQL_RW
+#define R_DMA_CH5_DESCR__RD REG_RD_RW
+#define R_DMA_CH5_DESCR__IRD REG_IRD_RW
+#define R_DMA_CH5_DESCR__WR REG_WR_RW
+#define R_DMA_CH5_DESCR__IWR REG_IWR_RW
+
+#define R_DMA_CH5_DESCR__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH5_DESCR__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH5_DESCR__descr__descr__MASK 0xffffffffU
+
+#define R_DMA_CH5_DESCR__descr__MAX 0xffffffff
+
+#define R_DMA_CH5_DESCR__descr__MIN 0
+
+#define R_DMA_CH5_DESCR__descr__BITNR 0
+
+#define R_DMA_CH5_DESCR__descr__descr__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH5_FIRST
+ * - type: RW
+ * - addr: 0xb00001b4
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH5_FIRST__ADDR (REG_TYPECAST_UDWORD 0xb00001b4)
+#define R_DMA_CH5_FIRST__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH5_FIRST__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH5_FIRST__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH5_FIRST__TYPE (REG_UDWORD)
+#define R_DMA_CH5_FIRST__GET REG_GET_RW
+#define R_DMA_CH5_FIRST__IGET REG_IGET_RW
+#define R_DMA_CH5_FIRST__SET REG_SET_RW
+#define R_DMA_CH5_FIRST__ISET REG_ISET_RW
+#define R_DMA_CH5_FIRST__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH5_FIRST__EQL REG_EQL_RW
+#define R_DMA_CH5_FIRST__IEQL REG_IEQL_RW
+#define R_DMA_CH5_FIRST__RD REG_RD_RW
+#define R_DMA_CH5_FIRST__IRD REG_IRD_RW
+#define R_DMA_CH5_FIRST__WR REG_WR_RW
+#define R_DMA_CH5_FIRST__IWR REG_IWR_RW
+
+#define R_DMA_CH5_FIRST__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH5_FIRST__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH5_FIRST__first__first__MASK 0xffffffffU
+
+#define R_DMA_CH5_FIRST__first__MAX 0xffffffff
+
+#define R_DMA_CH5_FIRST__first__MIN 0
+
+#define R_DMA_CH5_FIRST__first__BITNR 0
+
+#define R_DMA_CH5_FIRST__first__first__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH5_HWSW
+ * - type: RW
+ * - addr: 0xb0000150
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH5_HWSW__ADDR (REG_TYPECAST_UDWORD 0xb0000150)
+#define R_DMA_CH5_HWSW__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH5_HWSW__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH5_HWSW__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH5_HWSW__TYPE (REG_UDWORD)
+#define R_DMA_CH5_HWSW__GET REG_GET_RW
+#define R_DMA_CH5_HWSW__IGET REG_IGET_RW
+#define R_DMA_CH5_HWSW__SET REG_SET_RW
+#define R_DMA_CH5_HWSW__ISET REG_ISET_RW
+#define R_DMA_CH5_HWSW__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH5_HWSW__EQL REG_EQL_RW
+#define R_DMA_CH5_HWSW__IEQL REG_IEQL_RW
+#define R_DMA_CH5_HWSW__RD REG_RD_RW
+#define R_DMA_CH5_HWSW__IRD REG_IRD_RW
+#define R_DMA_CH5_HWSW__WR REG_WR_RW
+#define R_DMA_CH5_HWSW__IWR REG_IWR_RW
+
+#define R_DMA_CH5_HWSW__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH5_HWSW__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH5_HWSW__hw__hw__MASK 0xffff0000U
+#define R_DMA_CH5_HWSW__sw__sw__MASK 0x0000ffffU
+
+#define R_DMA_CH5_HWSW__hw__MAX 0xffff
+#define R_DMA_CH5_HWSW__sw__MAX 0xffff
+
+#define R_DMA_CH5_HWSW__hw__MIN 0
+#define R_DMA_CH5_HWSW__sw__MIN 0
+
+#define R_DMA_CH5_HWSW__hw__BITNR 16
+#define R_DMA_CH5_HWSW__sw__BITNR 0
+
+#define R_DMA_CH5_HWSW__hw__hw__VAL REG_VAL_VAL
+#define R_DMA_CH5_HWSW__sw__sw__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH5_NEXT
+ * - type: RW
+ * - addr: 0xb0000154
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH5_NEXT__ADDR (REG_TYPECAST_UDWORD 0xb0000154)
+#define R_DMA_CH5_NEXT__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH5_NEXT__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH5_NEXT__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH5_NEXT__TYPE (REG_UDWORD)
+#define R_DMA_CH5_NEXT__GET REG_GET_RW
+#define R_DMA_CH5_NEXT__IGET REG_IGET_RW
+#define R_DMA_CH5_NEXT__SET REG_SET_RW
+#define R_DMA_CH5_NEXT__ISET REG_ISET_RW
+#define R_DMA_CH5_NEXT__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH5_NEXT__EQL REG_EQL_RW
+#define R_DMA_CH5_NEXT__IEQL REG_IEQL_RW
+#define R_DMA_CH5_NEXT__RD REG_RD_RW
+#define R_DMA_CH5_NEXT__IRD REG_IRD_RW
+#define R_DMA_CH5_NEXT__WR REG_WR_RW
+#define R_DMA_CH5_NEXT__IWR REG_IWR_RW
+
+#define R_DMA_CH5_NEXT__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH5_NEXT__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH5_NEXT__next__next__MASK 0xffffffffU
+
+#define R_DMA_CH5_NEXT__next__MAX 0xffffffff
+
+#define R_DMA_CH5_NEXT__next__MIN 0
+
+#define R_DMA_CH5_NEXT__next__BITNR 0
+
+#define R_DMA_CH5_NEXT__next__next__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH5_STATUS
+ * - type: RO
+ * - addr: 0xb00001e6
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH5_STATUS__ADDR (REG_TYPECAST_BYTE 0xb00001e6)
+#define R_DMA_CH5_STATUS__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH5_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH5_STATUS__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH5_STATUS__TYPE (REG_BYTE)
+#define R_DMA_CH5_STATUS__GET REG_GET_RO
+#define R_DMA_CH5_STATUS__IGET REG_IGET_RO
+#define R_DMA_CH5_STATUS__SET REG_SET_RO
+#define R_DMA_CH5_STATUS__ISET REG_ISET_RO
+#define R_DMA_CH5_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_DMA_CH5_STATUS__EQL REG_EQL_RO
+#define R_DMA_CH5_STATUS__IEQL REG_IEQL_RO
+#define R_DMA_CH5_STATUS__RD REG_RD_RO
+#define R_DMA_CH5_STATUS__IRD REG_IRD_RO
+#define R_DMA_CH5_STATUS__WR REG_WR_RO
+#define R_DMA_CH5_STATUS__IWR REG_IWR_RO
+
+#define R_DMA_CH5_STATUS__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH5_STATUS__avail__avail__MASK 0x0000007fU
+
+#define R_DMA_CH5_STATUS__avail__MAX 0x7f
+
+#define R_DMA_CH5_STATUS__avail__MIN 0
+
+#define R_DMA_CH5_STATUS__avail__BITNR 0
+
+#define R_DMA_CH5_STATUS__avail__avail__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH6_BUF
+ * - type: RW
+ * - addr: 0xb0000168
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH6_BUF__ADDR (REG_TYPECAST_UDWORD 0xb0000168)
+#define R_DMA_CH6_BUF__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH6_BUF__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH6_BUF__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH6_BUF__TYPE (REG_UDWORD)
+#define R_DMA_CH6_BUF__GET REG_GET_RW
+#define R_DMA_CH6_BUF__IGET REG_IGET_RW
+#define R_DMA_CH6_BUF__SET REG_SET_RW
+#define R_DMA_CH6_BUF__ISET REG_ISET_RW
+#define R_DMA_CH6_BUF__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH6_BUF__EQL REG_EQL_RW
+#define R_DMA_CH6_BUF__IEQL REG_IEQL_RW
+#define R_DMA_CH6_BUF__RD REG_RD_RW
+#define R_DMA_CH6_BUF__IRD REG_IRD_RW
+#define R_DMA_CH6_BUF__WR REG_WR_RW
+#define R_DMA_CH6_BUF__IWR REG_IWR_RW
+
+#define R_DMA_CH6_BUF__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH6_BUF__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH6_BUF__buf__buf__MASK 0xffffffffU
+
+#define R_DMA_CH6_BUF__buf__MAX 0xffffffff
+
+#define R_DMA_CH6_BUF__buf__MIN 0
+
+#define R_DMA_CH6_BUF__buf__BITNR 0
+
+#define R_DMA_CH6_BUF__buf__buf__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH6_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001e9
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH6_CLR_INTR__ADDR (REG_TYPECAST_BYTE 0xb00001e9)
+
+#ifndef REG_NO_SHADOW
+#define R_DMA_CH6_CLR_INTR__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_DMA_CH6_CLR_INTR + 0))
+#define R_DMA_CH6_CLR_INTR__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_DMA_CH6_CLR_INTR + 0))
+#else /* REG_NO_SHADOW */
+#define R_DMA_CH6_CLR_INTR__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_DMA_CH6_CLR_INTR__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_DMA_CH6_CLR_INTR__STYPECAST REG_STYPECAST_BYTE
+#define R_DMA_CH6_CLR_INTR__SVAL REG_SVAL_ZERO
+#define R_DMA_CH6_CLR_INTR__SVAL_I REG_SVAL_I_ZERO
+#define R_DMA_CH6_CLR_INTR__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH6_CLR_INTR__TYPE (REG_BYTE)
+#define R_DMA_CH6_CLR_INTR__GET REG_GET_WO
+#define R_DMA_CH6_CLR_INTR__IGET REG_IGET_WO
+#define R_DMA_CH6_CLR_INTR__SET REG_SET_WO
+#define R_DMA_CH6_CLR_INTR__ISET REG_ISET_WO
+#define R_DMA_CH6_CLR_INTR__SET_VAL REG_SET_VAL_WO
+#define R_DMA_CH6_CLR_INTR__EQL REG_EQL_WO
+#define R_DMA_CH6_CLR_INTR__IEQL REG_IEQL_WO
+#define R_DMA_CH6_CLR_INTR__RD REG_RD_WO
+#define R_DMA_CH6_CLR_INTR__IRD REG_IRD_WO
+#define R_DMA_CH6_CLR_INTR__WR REG_WR_WO
+#define R_DMA_CH6_CLR_INTR__IWR REG_IWR_WO
+
+#define R_DMA_CH6_CLR_INTR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_DMA_CH6_CLR_INTR__clr_eop__clr_eop__MASK 0x00000002U
+#define R_DMA_CH6_CLR_INTR__clr_descr__clr_descr__MASK 0x00000001U
+
+#define R_DMA_CH6_CLR_INTR__clr_eop__MAX 0x1
+#define R_DMA_CH6_CLR_INTR__clr_descr__MAX 0x1
+
+#define R_DMA_CH6_CLR_INTR__clr_eop__MIN 0
+#define R_DMA_CH6_CLR_INTR__clr_descr__MIN 0
+
+#define R_DMA_CH6_CLR_INTR__clr_eop__BITNR 1
+#define R_DMA_CH6_CLR_INTR__clr_descr__BITNR 0
+
+#define R_DMA_CH6_CLR_INTR__clr_eop__clr_eop__VAL REG_VAL_ENUM
+#define R_DMA_CH6_CLR_INTR__clr_descr__clr_descr__VAL REG_VAL_ENUM
+
+#define R_DMA_CH6_CLR_INTR__clr_eop__clr_eop__do 1
+#define R_DMA_CH6_CLR_INTR__clr_eop__clr_eop__dont 0
+#define R_DMA_CH6_CLR_INTR__clr_descr__clr_descr__do 1
+#define R_DMA_CH6_CLR_INTR__clr_descr__clr_descr__dont 0
+
+#endif
+
+/*
+ * R_DMA_CH6_CMD
+ * - type: RW
+ * - addr: 0xb00001e8
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH6_CMD__ADDR (REG_TYPECAST_BYTE 0xb00001e8)
+#define R_DMA_CH6_CMD__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH6_CMD__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH6_CMD__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH6_CMD__TYPE (REG_BYTE)
+#define R_DMA_CH6_CMD__GET REG_GET_RW
+#define R_DMA_CH6_CMD__IGET REG_IGET_RW
+#define R_DMA_CH6_CMD__SET REG_SET_RW
+#define R_DMA_CH6_CMD__ISET REG_ISET_RW
+#define R_DMA_CH6_CMD__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH6_CMD__EQL REG_EQL_RW
+#define R_DMA_CH6_CMD__IEQL REG_IEQL_RW
+#define R_DMA_CH6_CMD__RD REG_RD_RW
+#define R_DMA_CH6_CMD__IRD REG_IRD_RW
+#define R_DMA_CH6_CMD__WR REG_WR_RW
+#define R_DMA_CH6_CMD__IWR REG_IWR_RW
+
+#define R_DMA_CH6_CMD__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH6_CMD__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH6_CMD__cmd__cmd__MASK 0x00000007U
+
+#define R_DMA_CH6_CMD__cmd__MAX 0x7
+
+#define R_DMA_CH6_CMD__cmd__MIN 0
+
+#define R_DMA_CH6_CMD__cmd__BITNR 0
+
+#define R_DMA_CH6_CMD__cmd__cmd__VAL REG_VAL_ENUM
+
+#define R_DMA_CH6_CMD__cmd__cmd__continue 3
+#define R_DMA_CH6_CMD__cmd__cmd__hold 0
+#define R_DMA_CH6_CMD__cmd__cmd__reset 4
+#define R_DMA_CH6_CMD__cmd__cmd__restart 3
+#define R_DMA_CH6_CMD__cmd__cmd__start 1
+
+#endif
+
+/*
+ * R_DMA_CH6_DESCR
+ * - type: RW
+ * - addr: 0xb000016c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH6_DESCR__ADDR (REG_TYPECAST_UDWORD 0xb000016c)
+#define R_DMA_CH6_DESCR__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH6_DESCR__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH6_DESCR__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH6_DESCR__TYPE (REG_UDWORD)
+#define R_DMA_CH6_DESCR__GET REG_GET_RW
+#define R_DMA_CH6_DESCR__IGET REG_IGET_RW
+#define R_DMA_CH6_DESCR__SET REG_SET_RW
+#define R_DMA_CH6_DESCR__ISET REG_ISET_RW
+#define R_DMA_CH6_DESCR__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH6_DESCR__EQL REG_EQL_RW
+#define R_DMA_CH6_DESCR__IEQL REG_IEQL_RW
+#define R_DMA_CH6_DESCR__RD REG_RD_RW
+#define R_DMA_CH6_DESCR__IRD REG_IRD_RW
+#define R_DMA_CH6_DESCR__WR REG_WR_RW
+#define R_DMA_CH6_DESCR__IWR REG_IWR_RW
+
+#define R_DMA_CH6_DESCR__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH6_DESCR__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH6_DESCR__descr__descr__MASK 0xffffffffU
+
+#define R_DMA_CH6_DESCR__descr__MAX 0xffffffff
+
+#define R_DMA_CH6_DESCR__descr__MIN 0
+
+#define R_DMA_CH6_DESCR__descr__BITNR 0
+
+#define R_DMA_CH6_DESCR__descr__descr__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH6_FIRST
+ * - type: RW
+ * - addr: 0xb00001b8
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH6_FIRST__ADDR (REG_TYPECAST_UDWORD 0xb00001b8)
+#define R_DMA_CH6_FIRST__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH6_FIRST__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH6_FIRST__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH6_FIRST__TYPE (REG_UDWORD)
+#define R_DMA_CH6_FIRST__GET REG_GET_RW
+#define R_DMA_CH6_FIRST__IGET REG_IGET_RW
+#define R_DMA_CH6_FIRST__SET REG_SET_RW
+#define R_DMA_CH6_FIRST__ISET REG_ISET_RW
+#define R_DMA_CH6_FIRST__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH6_FIRST__EQL REG_EQL_RW
+#define R_DMA_CH6_FIRST__IEQL REG_IEQL_RW
+#define R_DMA_CH6_FIRST__RD REG_RD_RW
+#define R_DMA_CH6_FIRST__IRD REG_IRD_RW
+#define R_DMA_CH6_FIRST__WR REG_WR_RW
+#define R_DMA_CH6_FIRST__IWR REG_IWR_RW
+
+#define R_DMA_CH6_FIRST__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH6_FIRST__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH6_FIRST__first__first__MASK 0xffffffffU
+
+#define R_DMA_CH6_FIRST__first__MAX 0xffffffff
+
+#define R_DMA_CH6_FIRST__first__MIN 0
+
+#define R_DMA_CH6_FIRST__first__BITNR 0
+
+#define R_DMA_CH6_FIRST__first__first__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH6_HWSW
+ * - type: RW
+ * - addr: 0xb0000160
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH6_HWSW__ADDR (REG_TYPECAST_UDWORD 0xb0000160)
+#define R_DMA_CH6_HWSW__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH6_HWSW__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH6_HWSW__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH6_HWSW__TYPE (REG_UDWORD)
+#define R_DMA_CH6_HWSW__GET REG_GET_RW
+#define R_DMA_CH6_HWSW__IGET REG_IGET_RW
+#define R_DMA_CH6_HWSW__SET REG_SET_RW
+#define R_DMA_CH6_HWSW__ISET REG_ISET_RW
+#define R_DMA_CH6_HWSW__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH6_HWSW__EQL REG_EQL_RW
+#define R_DMA_CH6_HWSW__IEQL REG_IEQL_RW
+#define R_DMA_CH6_HWSW__RD REG_RD_RW
+#define R_DMA_CH6_HWSW__IRD REG_IRD_RW
+#define R_DMA_CH6_HWSW__WR REG_WR_RW
+#define R_DMA_CH6_HWSW__IWR REG_IWR_RW
+
+#define R_DMA_CH6_HWSW__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH6_HWSW__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH6_HWSW__hw__hw__MASK 0xffff0000U
+#define R_DMA_CH6_HWSW__sw__sw__MASK 0x0000ffffU
+
+#define R_DMA_CH6_HWSW__hw__MAX 0xffff
+#define R_DMA_CH6_HWSW__sw__MAX 0xffff
+
+#define R_DMA_CH6_HWSW__hw__MIN 0
+#define R_DMA_CH6_HWSW__sw__MIN 0
+
+#define R_DMA_CH6_HWSW__hw__BITNR 16
+#define R_DMA_CH6_HWSW__sw__BITNR 0
+
+#define R_DMA_CH6_HWSW__hw__hw__VAL REG_VAL_VAL
+#define R_DMA_CH6_HWSW__sw__sw__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH6_NEXT
+ * - type: RW
+ * - addr: 0xb0000164
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH6_NEXT__ADDR (REG_TYPECAST_UDWORD 0xb0000164)
+#define R_DMA_CH6_NEXT__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH6_NEXT__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH6_NEXT__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH6_NEXT__TYPE (REG_UDWORD)
+#define R_DMA_CH6_NEXT__GET REG_GET_RW
+#define R_DMA_CH6_NEXT__IGET REG_IGET_RW
+#define R_DMA_CH6_NEXT__SET REG_SET_RW
+#define R_DMA_CH6_NEXT__ISET REG_ISET_RW
+#define R_DMA_CH6_NEXT__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH6_NEXT__EQL REG_EQL_RW
+#define R_DMA_CH6_NEXT__IEQL REG_IEQL_RW
+#define R_DMA_CH6_NEXT__RD REG_RD_RW
+#define R_DMA_CH6_NEXT__IRD REG_IRD_RW
+#define R_DMA_CH6_NEXT__WR REG_WR_RW
+#define R_DMA_CH6_NEXT__IWR REG_IWR_RW
+
+#define R_DMA_CH6_NEXT__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH6_NEXT__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH6_NEXT__next__next__MASK 0xffffffffU
+
+#define R_DMA_CH6_NEXT__next__MAX 0xffffffff
+
+#define R_DMA_CH6_NEXT__next__MIN 0
+
+#define R_DMA_CH6_NEXT__next__BITNR 0
+
+#define R_DMA_CH6_NEXT__next__next__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH6_STATUS
+ * - type: RO
+ * - addr: 0xb00001ea
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH6_STATUS__ADDR (REG_TYPECAST_BYTE 0xb00001ea)
+#define R_DMA_CH6_STATUS__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH6_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH6_STATUS__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH6_STATUS__TYPE (REG_BYTE)
+#define R_DMA_CH6_STATUS__GET REG_GET_RO
+#define R_DMA_CH6_STATUS__IGET REG_IGET_RO
+#define R_DMA_CH6_STATUS__SET REG_SET_RO
+#define R_DMA_CH6_STATUS__ISET REG_ISET_RO
+#define R_DMA_CH6_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_DMA_CH6_STATUS__EQL REG_EQL_RO
+#define R_DMA_CH6_STATUS__IEQL REG_IEQL_RO
+#define R_DMA_CH6_STATUS__RD REG_RD_RO
+#define R_DMA_CH6_STATUS__IRD REG_IRD_RO
+#define R_DMA_CH6_STATUS__WR REG_WR_RO
+#define R_DMA_CH6_STATUS__IWR REG_IWR_RO
+
+#define R_DMA_CH6_STATUS__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH6_STATUS__avail__avail__MASK 0x0000007fU
+
+#define R_DMA_CH6_STATUS__avail__MAX 0x7f
+
+#define R_DMA_CH6_STATUS__avail__MIN 0
+
+#define R_DMA_CH6_STATUS__avail__BITNR 0
+
+#define R_DMA_CH6_STATUS__avail__avail__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH7_BUF
+ * - type: RW
+ * - addr: 0xb0000178
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH7_BUF__ADDR (REG_TYPECAST_UDWORD 0xb0000178)
+#define R_DMA_CH7_BUF__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH7_BUF__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH7_BUF__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH7_BUF__TYPE (REG_UDWORD)
+#define R_DMA_CH7_BUF__GET REG_GET_RW
+#define R_DMA_CH7_BUF__IGET REG_IGET_RW
+#define R_DMA_CH7_BUF__SET REG_SET_RW
+#define R_DMA_CH7_BUF__ISET REG_ISET_RW
+#define R_DMA_CH7_BUF__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH7_BUF__EQL REG_EQL_RW
+#define R_DMA_CH7_BUF__IEQL REG_IEQL_RW
+#define R_DMA_CH7_BUF__RD REG_RD_RW
+#define R_DMA_CH7_BUF__IRD REG_IRD_RW
+#define R_DMA_CH7_BUF__WR REG_WR_RW
+#define R_DMA_CH7_BUF__IWR REG_IWR_RW
+
+#define R_DMA_CH7_BUF__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH7_BUF__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH7_BUF__buf__buf__MASK 0xffffffffU
+
+#define R_DMA_CH7_BUF__buf__MAX 0xffffffff
+
+#define R_DMA_CH7_BUF__buf__MIN 0
+
+#define R_DMA_CH7_BUF__buf__BITNR 0
+
+#define R_DMA_CH7_BUF__buf__buf__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH7_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001ed
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH7_CLR_INTR__ADDR (REG_TYPECAST_BYTE 0xb00001ed)
+
+#ifndef REG_NO_SHADOW
+#define R_DMA_CH7_CLR_INTR__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_DMA_CH7_CLR_INTR + 0))
+#define R_DMA_CH7_CLR_INTR__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_DMA_CH7_CLR_INTR + 0))
+#else /* REG_NO_SHADOW */
+#define R_DMA_CH7_CLR_INTR__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_DMA_CH7_CLR_INTR__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_DMA_CH7_CLR_INTR__STYPECAST REG_STYPECAST_BYTE
+#define R_DMA_CH7_CLR_INTR__SVAL REG_SVAL_ZERO
+#define R_DMA_CH7_CLR_INTR__SVAL_I REG_SVAL_I_ZERO
+#define R_DMA_CH7_CLR_INTR__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH7_CLR_INTR__TYPE (REG_BYTE)
+#define R_DMA_CH7_CLR_INTR__GET REG_GET_WO
+#define R_DMA_CH7_CLR_INTR__IGET REG_IGET_WO
+#define R_DMA_CH7_CLR_INTR__SET REG_SET_WO
+#define R_DMA_CH7_CLR_INTR__ISET REG_ISET_WO
+#define R_DMA_CH7_CLR_INTR__SET_VAL REG_SET_VAL_WO
+#define R_DMA_CH7_CLR_INTR__EQL REG_EQL_WO
+#define R_DMA_CH7_CLR_INTR__IEQL REG_IEQL_WO
+#define R_DMA_CH7_CLR_INTR__RD REG_RD_WO
+#define R_DMA_CH7_CLR_INTR__IRD REG_IRD_WO
+#define R_DMA_CH7_CLR_INTR__WR REG_WR_WO
+#define R_DMA_CH7_CLR_INTR__IWR REG_IWR_WO
+
+#define R_DMA_CH7_CLR_INTR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_DMA_CH7_CLR_INTR__clr_eop__clr_eop__MASK 0x00000002U
+#define R_DMA_CH7_CLR_INTR__clr_descr__clr_descr__MASK 0x00000001U
+
+#define R_DMA_CH7_CLR_INTR__clr_eop__MAX 0x1
+#define R_DMA_CH7_CLR_INTR__clr_descr__MAX 0x1
+
+#define R_DMA_CH7_CLR_INTR__clr_eop__MIN 0
+#define R_DMA_CH7_CLR_INTR__clr_descr__MIN 0
+
+#define R_DMA_CH7_CLR_INTR__clr_eop__BITNR 1
+#define R_DMA_CH7_CLR_INTR__clr_descr__BITNR 0
+
+#define R_DMA_CH7_CLR_INTR__clr_eop__clr_eop__VAL REG_VAL_ENUM
+#define R_DMA_CH7_CLR_INTR__clr_descr__clr_descr__VAL REG_VAL_ENUM
+
+#define R_DMA_CH7_CLR_INTR__clr_eop__clr_eop__do 1
+#define R_DMA_CH7_CLR_INTR__clr_eop__clr_eop__dont 0
+#define R_DMA_CH7_CLR_INTR__clr_descr__clr_descr__do 1
+#define R_DMA_CH7_CLR_INTR__clr_descr__clr_descr__dont 0
+
+#endif
+
+/*
+ * R_DMA_CH7_CMD
+ * - type: RW
+ * - addr: 0xb00001ec
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH7_CMD__ADDR (REG_TYPECAST_BYTE 0xb00001ec)
+#define R_DMA_CH7_CMD__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH7_CMD__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH7_CMD__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH7_CMD__TYPE (REG_BYTE)
+#define R_DMA_CH7_CMD__GET REG_GET_RW
+#define R_DMA_CH7_CMD__IGET REG_IGET_RW
+#define R_DMA_CH7_CMD__SET REG_SET_RW
+#define R_DMA_CH7_CMD__ISET REG_ISET_RW
+#define R_DMA_CH7_CMD__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH7_CMD__EQL REG_EQL_RW
+#define R_DMA_CH7_CMD__IEQL REG_IEQL_RW
+#define R_DMA_CH7_CMD__RD REG_RD_RW
+#define R_DMA_CH7_CMD__IRD REG_IRD_RW
+#define R_DMA_CH7_CMD__WR REG_WR_RW
+#define R_DMA_CH7_CMD__IWR REG_IWR_RW
+
+#define R_DMA_CH7_CMD__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH7_CMD__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH7_CMD__cmd__cmd__MASK 0x00000007U
+
+#define R_DMA_CH7_CMD__cmd__MAX 0x7
+
+#define R_DMA_CH7_CMD__cmd__MIN 0
+
+#define R_DMA_CH7_CMD__cmd__BITNR 0
+
+#define R_DMA_CH7_CMD__cmd__cmd__VAL REG_VAL_ENUM
+
+#define R_DMA_CH7_CMD__cmd__cmd__continue 3
+#define R_DMA_CH7_CMD__cmd__cmd__hold 0
+#define R_DMA_CH7_CMD__cmd__cmd__reset 4
+#define R_DMA_CH7_CMD__cmd__cmd__restart 3
+#define R_DMA_CH7_CMD__cmd__cmd__start 1
+
+#endif
+
+/*
+ * R_DMA_CH7_DESCR
+ * - type: RW
+ * - addr: 0xb000017c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH7_DESCR__ADDR (REG_TYPECAST_UDWORD 0xb000017c)
+#define R_DMA_CH7_DESCR__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH7_DESCR__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH7_DESCR__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH7_DESCR__TYPE (REG_UDWORD)
+#define R_DMA_CH7_DESCR__GET REG_GET_RW
+#define R_DMA_CH7_DESCR__IGET REG_IGET_RW
+#define R_DMA_CH7_DESCR__SET REG_SET_RW
+#define R_DMA_CH7_DESCR__ISET REG_ISET_RW
+#define R_DMA_CH7_DESCR__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH7_DESCR__EQL REG_EQL_RW
+#define R_DMA_CH7_DESCR__IEQL REG_IEQL_RW
+#define R_DMA_CH7_DESCR__RD REG_RD_RW
+#define R_DMA_CH7_DESCR__IRD REG_IRD_RW
+#define R_DMA_CH7_DESCR__WR REG_WR_RW
+#define R_DMA_CH7_DESCR__IWR REG_IWR_RW
+
+#define R_DMA_CH7_DESCR__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH7_DESCR__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH7_DESCR__descr__descr__MASK 0xffffffffU
+
+#define R_DMA_CH7_DESCR__descr__MAX 0xffffffff
+
+#define R_DMA_CH7_DESCR__descr__MIN 0
+
+#define R_DMA_CH7_DESCR__descr__BITNR 0
+
+#define R_DMA_CH7_DESCR__descr__descr__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH7_FIRST
+ * - type: RW
+ * - addr: 0xb00001bc
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH7_FIRST__ADDR (REG_TYPECAST_UDWORD 0xb00001bc)
+#define R_DMA_CH7_FIRST__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH7_FIRST__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH7_FIRST__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH7_FIRST__TYPE (REG_UDWORD)
+#define R_DMA_CH7_FIRST__GET REG_GET_RW
+#define R_DMA_CH7_FIRST__IGET REG_IGET_RW
+#define R_DMA_CH7_FIRST__SET REG_SET_RW
+#define R_DMA_CH7_FIRST__ISET REG_ISET_RW
+#define R_DMA_CH7_FIRST__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH7_FIRST__EQL REG_EQL_RW
+#define R_DMA_CH7_FIRST__IEQL REG_IEQL_RW
+#define R_DMA_CH7_FIRST__RD REG_RD_RW
+#define R_DMA_CH7_FIRST__IRD REG_IRD_RW
+#define R_DMA_CH7_FIRST__WR REG_WR_RW
+#define R_DMA_CH7_FIRST__IWR REG_IWR_RW
+
+#define R_DMA_CH7_FIRST__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH7_FIRST__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH7_FIRST__first__first__MASK 0xffffffffU
+
+#define R_DMA_CH7_FIRST__first__MAX 0xffffffff
+
+#define R_DMA_CH7_FIRST__first__MIN 0
+
+#define R_DMA_CH7_FIRST__first__BITNR 0
+
+#define R_DMA_CH7_FIRST__first__first__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH7_HWSW
+ * - type: RW
+ * - addr: 0xb0000170
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH7_HWSW__ADDR (REG_TYPECAST_UDWORD 0xb0000170)
+#define R_DMA_CH7_HWSW__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH7_HWSW__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH7_HWSW__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH7_HWSW__TYPE (REG_UDWORD)
+#define R_DMA_CH7_HWSW__GET REG_GET_RW
+#define R_DMA_CH7_HWSW__IGET REG_IGET_RW
+#define R_DMA_CH7_HWSW__SET REG_SET_RW
+#define R_DMA_CH7_HWSW__ISET REG_ISET_RW
+#define R_DMA_CH7_HWSW__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH7_HWSW__EQL REG_EQL_RW
+#define R_DMA_CH7_HWSW__IEQL REG_IEQL_RW
+#define R_DMA_CH7_HWSW__RD REG_RD_RW
+#define R_DMA_CH7_HWSW__IRD REG_IRD_RW
+#define R_DMA_CH7_HWSW__WR REG_WR_RW
+#define R_DMA_CH7_HWSW__IWR REG_IWR_RW
+
+#define R_DMA_CH7_HWSW__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH7_HWSW__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH7_HWSW__hw__hw__MASK 0xffff0000U
+#define R_DMA_CH7_HWSW__sw__sw__MASK 0x0000ffffU
+
+#define R_DMA_CH7_HWSW__hw__MAX 0xffff
+#define R_DMA_CH7_HWSW__sw__MAX 0xffff
+
+#define R_DMA_CH7_HWSW__hw__MIN 0
+#define R_DMA_CH7_HWSW__sw__MIN 0
+
+#define R_DMA_CH7_HWSW__hw__BITNR 16
+#define R_DMA_CH7_HWSW__sw__BITNR 0
+
+#define R_DMA_CH7_HWSW__hw__hw__VAL REG_VAL_VAL
+#define R_DMA_CH7_HWSW__sw__sw__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH7_NEXT
+ * - type: RW
+ * - addr: 0xb0000174
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH7_NEXT__ADDR (REG_TYPECAST_UDWORD 0xb0000174)
+#define R_DMA_CH7_NEXT__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH7_NEXT__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH7_NEXT__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH7_NEXT__TYPE (REG_UDWORD)
+#define R_DMA_CH7_NEXT__GET REG_GET_RW
+#define R_DMA_CH7_NEXT__IGET REG_IGET_RW
+#define R_DMA_CH7_NEXT__SET REG_SET_RW
+#define R_DMA_CH7_NEXT__ISET REG_ISET_RW
+#define R_DMA_CH7_NEXT__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH7_NEXT__EQL REG_EQL_RW
+#define R_DMA_CH7_NEXT__IEQL REG_IEQL_RW
+#define R_DMA_CH7_NEXT__RD REG_RD_RW
+#define R_DMA_CH7_NEXT__IRD REG_IRD_RW
+#define R_DMA_CH7_NEXT__WR REG_WR_RW
+#define R_DMA_CH7_NEXT__IWR REG_IWR_RW
+
+#define R_DMA_CH7_NEXT__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH7_NEXT__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH7_NEXT__next__next__MASK 0xffffffffU
+
+#define R_DMA_CH7_NEXT__next__MAX 0xffffffff
+
+#define R_DMA_CH7_NEXT__next__MIN 0
+
+#define R_DMA_CH7_NEXT__next__BITNR 0
+
+#define R_DMA_CH7_NEXT__next__next__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH7_STATUS
+ * - type: RO
+ * - addr: 0xb00001ee
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH7_STATUS__ADDR (REG_TYPECAST_BYTE 0xb00001ee)
+#define R_DMA_CH7_STATUS__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH7_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH7_STATUS__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH7_STATUS__TYPE (REG_BYTE)
+#define R_DMA_CH7_STATUS__GET REG_GET_RO
+#define R_DMA_CH7_STATUS__IGET REG_IGET_RO
+#define R_DMA_CH7_STATUS__SET REG_SET_RO
+#define R_DMA_CH7_STATUS__ISET REG_ISET_RO
+#define R_DMA_CH7_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_DMA_CH7_STATUS__EQL REG_EQL_RO
+#define R_DMA_CH7_STATUS__IEQL REG_IEQL_RO
+#define R_DMA_CH7_STATUS__RD REG_RD_RO
+#define R_DMA_CH7_STATUS__IRD REG_IRD_RO
+#define R_DMA_CH7_STATUS__WR REG_WR_RO
+#define R_DMA_CH7_STATUS__IWR REG_IWR_RO
+
+#define R_DMA_CH7_STATUS__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH7_STATUS__avail__avail__MASK 0x0000007fU
+
+#define R_DMA_CH7_STATUS__avail__MAX 0x7f
+
+#define R_DMA_CH7_STATUS__avail__MIN 0
+
+#define R_DMA_CH7_STATUS__avail__BITNR 0
+
+#define R_DMA_CH7_STATUS__avail__avail__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH8_BUF
+ * - type: RW
+ * - addr: 0xb0000188
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH8_BUF__ADDR (REG_TYPECAST_UDWORD 0xb0000188)
+#define R_DMA_CH8_BUF__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH8_BUF__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH8_BUF__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH8_BUF__TYPE (REG_UDWORD)
+#define R_DMA_CH8_BUF__GET REG_GET_RW
+#define R_DMA_CH8_BUF__IGET REG_IGET_RW
+#define R_DMA_CH8_BUF__SET REG_SET_RW
+#define R_DMA_CH8_BUF__ISET REG_ISET_RW
+#define R_DMA_CH8_BUF__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH8_BUF__EQL REG_EQL_RW
+#define R_DMA_CH8_BUF__IEQL REG_IEQL_RW
+#define R_DMA_CH8_BUF__RD REG_RD_RW
+#define R_DMA_CH8_BUF__IRD REG_IRD_RW
+#define R_DMA_CH8_BUF__WR REG_WR_RW
+#define R_DMA_CH8_BUF__IWR REG_IWR_RW
+
+#define R_DMA_CH8_BUF__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH8_BUF__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH8_BUF__buf__buf__MASK 0xffffffffU
+
+#define R_DMA_CH8_BUF__buf__MAX 0xffffffff
+
+#define R_DMA_CH8_BUF__buf__MIN 0
+
+#define R_DMA_CH8_BUF__buf__BITNR 0
+
+#define R_DMA_CH8_BUF__buf__buf__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH8_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001f1
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH8_CLR_INTR__ADDR (REG_TYPECAST_BYTE 0xb00001f1)
+
+#ifndef REG_NO_SHADOW
+#define R_DMA_CH8_CLR_INTR__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_DMA_CH8_CLR_INTR + 0))
+#define R_DMA_CH8_CLR_INTR__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_DMA_CH8_CLR_INTR + 0))
+#else /* REG_NO_SHADOW */
+#define R_DMA_CH8_CLR_INTR__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_DMA_CH8_CLR_INTR__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_DMA_CH8_CLR_INTR__STYPECAST REG_STYPECAST_BYTE
+#define R_DMA_CH8_CLR_INTR__SVAL REG_SVAL_ZERO
+#define R_DMA_CH8_CLR_INTR__SVAL_I REG_SVAL_I_ZERO
+#define R_DMA_CH8_CLR_INTR__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH8_CLR_INTR__TYPE (REG_BYTE)
+#define R_DMA_CH8_CLR_INTR__GET REG_GET_WO
+#define R_DMA_CH8_CLR_INTR__IGET REG_IGET_WO
+#define R_DMA_CH8_CLR_INTR__SET REG_SET_WO
+#define R_DMA_CH8_CLR_INTR__ISET REG_ISET_WO
+#define R_DMA_CH8_CLR_INTR__SET_VAL REG_SET_VAL_WO
+#define R_DMA_CH8_CLR_INTR__EQL REG_EQL_WO
+#define R_DMA_CH8_CLR_INTR__IEQL REG_IEQL_WO
+#define R_DMA_CH8_CLR_INTR__RD REG_RD_WO
+#define R_DMA_CH8_CLR_INTR__IRD REG_IRD_WO
+#define R_DMA_CH8_CLR_INTR__WR REG_WR_WO
+#define R_DMA_CH8_CLR_INTR__IWR REG_IWR_WO
+
+#define R_DMA_CH8_CLR_INTR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_DMA_CH8_CLR_INTR__clr_eop__clr_eop__MASK 0x00000002U
+#define R_DMA_CH8_CLR_INTR__clr_descr__clr_descr__MASK 0x00000001U
+
+#define R_DMA_CH8_CLR_INTR__clr_eop__MAX 0x1
+#define R_DMA_CH8_CLR_INTR__clr_descr__MAX 0x1
+
+#define R_DMA_CH8_CLR_INTR__clr_eop__MIN 0
+#define R_DMA_CH8_CLR_INTR__clr_descr__MIN 0
+
+#define R_DMA_CH8_CLR_INTR__clr_eop__BITNR 1
+#define R_DMA_CH8_CLR_INTR__clr_descr__BITNR 0
+
+#define R_DMA_CH8_CLR_INTR__clr_eop__clr_eop__VAL REG_VAL_ENUM
+#define R_DMA_CH8_CLR_INTR__clr_descr__clr_descr__VAL REG_VAL_ENUM
+
+#define R_DMA_CH8_CLR_INTR__clr_eop__clr_eop__do 1
+#define R_DMA_CH8_CLR_INTR__clr_eop__clr_eop__dont 0
+#define R_DMA_CH8_CLR_INTR__clr_descr__clr_descr__do 1
+#define R_DMA_CH8_CLR_INTR__clr_descr__clr_descr__dont 0
+
+#endif
+
+/*
+ * R_DMA_CH8_CMD
+ * - type: RW
+ * - addr: 0xb00001f0
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH8_CMD__ADDR (REG_TYPECAST_BYTE 0xb00001f0)
+#define R_DMA_CH8_CMD__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH8_CMD__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH8_CMD__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH8_CMD__TYPE (REG_BYTE)
+#define R_DMA_CH8_CMD__GET REG_GET_RW
+#define R_DMA_CH8_CMD__IGET REG_IGET_RW
+#define R_DMA_CH8_CMD__SET REG_SET_RW
+#define R_DMA_CH8_CMD__ISET REG_ISET_RW
+#define R_DMA_CH8_CMD__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH8_CMD__EQL REG_EQL_RW
+#define R_DMA_CH8_CMD__IEQL REG_IEQL_RW
+#define R_DMA_CH8_CMD__RD REG_RD_RW
+#define R_DMA_CH8_CMD__IRD REG_IRD_RW
+#define R_DMA_CH8_CMD__WR REG_WR_RW
+#define R_DMA_CH8_CMD__IWR REG_IWR_RW
+
+#define R_DMA_CH8_CMD__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH8_CMD__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH8_CMD__cmd__cmd__MASK 0x00000007U
+
+#define R_DMA_CH8_CMD__cmd__MAX 0x7
+
+#define R_DMA_CH8_CMD__cmd__MIN 0
+
+#define R_DMA_CH8_CMD__cmd__BITNR 0
+
+#define R_DMA_CH8_CMD__cmd__cmd__VAL REG_VAL_ENUM
+
+#define R_DMA_CH8_CMD__cmd__cmd__continue 3
+#define R_DMA_CH8_CMD__cmd__cmd__hold 0
+#define R_DMA_CH8_CMD__cmd__cmd__reset 4
+#define R_DMA_CH8_CMD__cmd__cmd__restart 3
+#define R_DMA_CH8_CMD__cmd__cmd__start 1
+
+#endif
+
+/*
+ * R_DMA_CH8_DESCR
+ * - type: RW
+ * - addr: 0xb000018c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH8_DESCR__ADDR (REG_TYPECAST_UDWORD 0xb000018c)
+#define R_DMA_CH8_DESCR__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH8_DESCR__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH8_DESCR__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH8_DESCR__TYPE (REG_UDWORD)
+#define R_DMA_CH8_DESCR__GET REG_GET_RW
+#define R_DMA_CH8_DESCR__IGET REG_IGET_RW
+#define R_DMA_CH8_DESCR__SET REG_SET_RW
+#define R_DMA_CH8_DESCR__ISET REG_ISET_RW
+#define R_DMA_CH8_DESCR__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH8_DESCR__EQL REG_EQL_RW
+#define R_DMA_CH8_DESCR__IEQL REG_IEQL_RW
+#define R_DMA_CH8_DESCR__RD REG_RD_RW
+#define R_DMA_CH8_DESCR__IRD REG_IRD_RW
+#define R_DMA_CH8_DESCR__WR REG_WR_RW
+#define R_DMA_CH8_DESCR__IWR REG_IWR_RW
+
+#define R_DMA_CH8_DESCR__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH8_DESCR__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH8_DESCR__descr__descr__MASK 0xffffffffU
+
+#define R_DMA_CH8_DESCR__descr__MAX 0xffffffff
+
+#define R_DMA_CH8_DESCR__descr__MIN 0
+
+#define R_DMA_CH8_DESCR__descr__BITNR 0
+
+#define R_DMA_CH8_DESCR__descr__descr__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH8_FIRST
+ * - type: RW
+ * - addr: 0xb00001c0
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH8_FIRST__ADDR (REG_TYPECAST_UDWORD 0xb00001c0)
+#define R_DMA_CH8_FIRST__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH8_FIRST__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH8_FIRST__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH8_FIRST__TYPE (REG_UDWORD)
+#define R_DMA_CH8_FIRST__GET REG_GET_RW
+#define R_DMA_CH8_FIRST__IGET REG_IGET_RW
+#define R_DMA_CH8_FIRST__SET REG_SET_RW
+#define R_DMA_CH8_FIRST__ISET REG_ISET_RW
+#define R_DMA_CH8_FIRST__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH8_FIRST__EQL REG_EQL_RW
+#define R_DMA_CH8_FIRST__IEQL REG_IEQL_RW
+#define R_DMA_CH8_FIRST__RD REG_RD_RW
+#define R_DMA_CH8_FIRST__IRD REG_IRD_RW
+#define R_DMA_CH8_FIRST__WR REG_WR_RW
+#define R_DMA_CH8_FIRST__IWR REG_IWR_RW
+
+#define R_DMA_CH8_FIRST__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH8_FIRST__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH8_FIRST__first__first__MASK 0xffffffffU
+
+#define R_DMA_CH8_FIRST__first__MAX 0xffffffff
+
+#define R_DMA_CH8_FIRST__first__MIN 0
+
+#define R_DMA_CH8_FIRST__first__BITNR 0
+
+#define R_DMA_CH8_FIRST__first__first__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH8_HWSW
+ * - type: RW
+ * - addr: 0xb0000180
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH8_HWSW__ADDR (REG_TYPECAST_UDWORD 0xb0000180)
+#define R_DMA_CH8_HWSW__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH8_HWSW__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH8_HWSW__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH8_HWSW__TYPE (REG_UDWORD)
+#define R_DMA_CH8_HWSW__GET REG_GET_RW
+#define R_DMA_CH8_HWSW__IGET REG_IGET_RW
+#define R_DMA_CH8_HWSW__SET REG_SET_RW
+#define R_DMA_CH8_HWSW__ISET REG_ISET_RW
+#define R_DMA_CH8_HWSW__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH8_HWSW__EQL REG_EQL_RW
+#define R_DMA_CH8_HWSW__IEQL REG_IEQL_RW
+#define R_DMA_CH8_HWSW__RD REG_RD_RW
+#define R_DMA_CH8_HWSW__IRD REG_IRD_RW
+#define R_DMA_CH8_HWSW__WR REG_WR_RW
+#define R_DMA_CH8_HWSW__IWR REG_IWR_RW
+
+#define R_DMA_CH8_HWSW__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH8_HWSW__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH8_HWSW__hw__hw__MASK 0xffff0000U
+#define R_DMA_CH8_HWSW__sw__sw__MASK 0x0000ffffU
+
+#define R_DMA_CH8_HWSW__hw__MAX 0xffff
+#define R_DMA_CH8_HWSW__sw__MAX 0xffff
+
+#define R_DMA_CH8_HWSW__hw__MIN 0
+#define R_DMA_CH8_HWSW__sw__MIN 0
+
+#define R_DMA_CH8_HWSW__hw__BITNR 16
+#define R_DMA_CH8_HWSW__sw__BITNR 0
+
+#define R_DMA_CH8_HWSW__hw__hw__VAL REG_VAL_VAL
+#define R_DMA_CH8_HWSW__sw__sw__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH8_NEP
+ * - type: RW
+ * - addr: 0xb00001c0
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH8_NEP__ADDR (REG_TYPECAST_UDWORD 0xb00001c0)
+#define R_DMA_CH8_NEP__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH8_NEP__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH8_NEP__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH8_NEP__TYPE (REG_UDWORD)
+#define R_DMA_CH8_NEP__GET REG_GET_RW
+#define R_DMA_CH8_NEP__IGET REG_IGET_RW
+#define R_DMA_CH8_NEP__SET REG_SET_RW
+#define R_DMA_CH8_NEP__ISET REG_ISET_RW
+#define R_DMA_CH8_NEP__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH8_NEP__EQL REG_EQL_RW
+#define R_DMA_CH8_NEP__IEQL REG_IEQL_RW
+#define R_DMA_CH8_NEP__RD REG_RD_RW
+#define R_DMA_CH8_NEP__IRD REG_IRD_RW
+#define R_DMA_CH8_NEP__WR REG_WR_RW
+#define R_DMA_CH8_NEP__IWR REG_IWR_RW
+
+#define R_DMA_CH8_NEP__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH8_NEP__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH8_NEP__nep__nep__MASK 0xffffffffU
+
+#define R_DMA_CH8_NEP__nep__MAX 0xffffffff
+
+#define R_DMA_CH8_NEP__nep__MIN 0
+
+#define R_DMA_CH8_NEP__nep__BITNR 0
+
+#define R_DMA_CH8_NEP__nep__nep__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH8_NEXT
+ * - type: RW
+ * - addr: 0xb0000184
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH8_NEXT__ADDR (REG_TYPECAST_UDWORD 0xb0000184)
+#define R_DMA_CH8_NEXT__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH8_NEXT__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH8_NEXT__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH8_NEXT__TYPE (REG_UDWORD)
+#define R_DMA_CH8_NEXT__GET REG_GET_RW
+#define R_DMA_CH8_NEXT__IGET REG_IGET_RW
+#define R_DMA_CH8_NEXT__SET REG_SET_RW
+#define R_DMA_CH8_NEXT__ISET REG_ISET_RW
+#define R_DMA_CH8_NEXT__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH8_NEXT__EQL REG_EQL_RW
+#define R_DMA_CH8_NEXT__IEQL REG_IEQL_RW
+#define R_DMA_CH8_NEXT__RD REG_RD_RW
+#define R_DMA_CH8_NEXT__IRD REG_IRD_RW
+#define R_DMA_CH8_NEXT__WR REG_WR_RW
+#define R_DMA_CH8_NEXT__IWR REG_IWR_RW
+
+#define R_DMA_CH8_NEXT__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH8_NEXT__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH8_NEXT__next__next__MASK 0xffffffffU
+
+#define R_DMA_CH8_NEXT__next__MAX 0xffffffff
+
+#define R_DMA_CH8_NEXT__next__MIN 0
+
+#define R_DMA_CH8_NEXT__next__BITNR 0
+
+#define R_DMA_CH8_NEXT__next__next__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH8_STATUS
+ * - type: RO
+ * - addr: 0xb00001f2
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH8_STATUS__ADDR (REG_TYPECAST_BYTE 0xb00001f2)
+#define R_DMA_CH8_STATUS__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH8_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH8_STATUS__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH8_STATUS__TYPE (REG_BYTE)
+#define R_DMA_CH8_STATUS__GET REG_GET_RO
+#define R_DMA_CH8_STATUS__IGET REG_IGET_RO
+#define R_DMA_CH8_STATUS__SET REG_SET_RO
+#define R_DMA_CH8_STATUS__ISET REG_ISET_RO
+#define R_DMA_CH8_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_DMA_CH8_STATUS__EQL REG_EQL_RO
+#define R_DMA_CH8_STATUS__IEQL REG_IEQL_RO
+#define R_DMA_CH8_STATUS__RD REG_RD_RO
+#define R_DMA_CH8_STATUS__IRD REG_IRD_RO
+#define R_DMA_CH8_STATUS__WR REG_WR_RO
+#define R_DMA_CH8_STATUS__IWR REG_IWR_RO
+
+#define R_DMA_CH8_STATUS__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH8_STATUS__avail__avail__MASK 0x0000007fU
+
+#define R_DMA_CH8_STATUS__avail__MAX 0x7f
+
+#define R_DMA_CH8_STATUS__avail__MIN 0
+
+#define R_DMA_CH8_STATUS__avail__BITNR 0
+
+#define R_DMA_CH8_STATUS__avail__avail__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB
+ * - type: RW
+ * - addr: 0xb000018c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH8_SUB__ADDR (REG_TYPECAST_UDWORD 0xb000018c)
+#define R_DMA_CH8_SUB__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH8_SUB__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH8_SUB__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH8_SUB__TYPE (REG_UDWORD)
+#define R_DMA_CH8_SUB__GET REG_GET_RW
+#define R_DMA_CH8_SUB__IGET REG_IGET_RW
+#define R_DMA_CH8_SUB__SET REG_SET_RW
+#define R_DMA_CH8_SUB__ISET REG_ISET_RW
+#define R_DMA_CH8_SUB__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH8_SUB__EQL REG_EQL_RW
+#define R_DMA_CH8_SUB__IEQL REG_IEQL_RW
+#define R_DMA_CH8_SUB__RD REG_RD_RW
+#define R_DMA_CH8_SUB__IRD REG_IRD_RW
+#define R_DMA_CH8_SUB__WR REG_WR_RW
+#define R_DMA_CH8_SUB__IWR REG_IWR_RW
+
+#define R_DMA_CH8_SUB__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH8_SUB__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH8_SUB__sub__sub__MASK 0xffffffffU
+
+#define R_DMA_CH8_SUB__sub__MAX 0xffffffff
+
+#define R_DMA_CH8_SUB__sub__MIN 0
+
+#define R_DMA_CH8_SUB__sub__BITNR 0
+
+#define R_DMA_CH8_SUB__sub__sub__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB0_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001e3
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH8_SUB0_CLR_INTR__ADDR (REG_TYPECAST_BYTE 0xb00001e3)
+
+#ifndef REG_NO_SHADOW
+#define R_DMA_CH8_SUB0_CLR_INTR__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_DMA_CH8_SUB0_CLR_INTR + 0))
+#define R_DMA_CH8_SUB0_CLR_INTR__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_DMA_CH8_SUB0_CLR_INTR + 0))
+#else /* REG_NO_SHADOW */
+#define R_DMA_CH8_SUB0_CLR_INTR__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_DMA_CH8_SUB0_CLR_INTR__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_DMA_CH8_SUB0_CLR_INTR__STYPECAST REG_STYPECAST_BYTE
+#define R_DMA_CH8_SUB0_CLR_INTR__SVAL REG_SVAL_ZERO
+#define R_DMA_CH8_SUB0_CLR_INTR__SVAL_I REG_SVAL_I_ZERO
+#define R_DMA_CH8_SUB0_CLR_INTR__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH8_SUB0_CLR_INTR__TYPE (REG_BYTE)
+#define R_DMA_CH8_SUB0_CLR_INTR__GET REG_GET_WO
+#define R_DMA_CH8_SUB0_CLR_INTR__IGET REG_IGET_WO
+#define R_DMA_CH8_SUB0_CLR_INTR__SET REG_SET_WO
+#define R_DMA_CH8_SUB0_CLR_INTR__ISET REG_ISET_WO
+#define R_DMA_CH8_SUB0_CLR_INTR__SET_VAL REG_SET_VAL_WO
+#define R_DMA_CH8_SUB0_CLR_INTR__EQL REG_EQL_WO
+#define R_DMA_CH8_SUB0_CLR_INTR__IEQL REG_IEQL_WO
+#define R_DMA_CH8_SUB0_CLR_INTR__RD REG_RD_WO
+#define R_DMA_CH8_SUB0_CLR_INTR__IRD REG_IRD_WO
+#define R_DMA_CH8_SUB0_CLR_INTR__WR REG_WR_WO
+#define R_DMA_CH8_SUB0_CLR_INTR__IWR REG_IWR_WO
+
+#define R_DMA_CH8_SUB0_CLR_INTR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_DMA_CH8_SUB0_CLR_INTR__clr_descr__clr_descr__MASK 0x00000001U
+
+#define R_DMA_CH8_SUB0_CLR_INTR__clr_descr__MAX 0x1
+
+#define R_DMA_CH8_SUB0_CLR_INTR__clr_descr__MIN 0
+
+#define R_DMA_CH8_SUB0_CLR_INTR__clr_descr__BITNR 0
+
+#define R_DMA_CH8_SUB0_CLR_INTR__clr_descr__clr_descr__VAL REG_VAL_ENUM
+
+#define R_DMA_CH8_SUB0_CLR_INTR__clr_descr__clr_descr__do 1
+#define R_DMA_CH8_SUB0_CLR_INTR__clr_descr__clr_descr__dont 0
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB0_CMD
+ * - type: RW
+ * - addr: 0xb00001d3
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH8_SUB0_CMD__ADDR (REG_TYPECAST_BYTE 0xb00001d3)
+#define R_DMA_CH8_SUB0_CMD__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH8_SUB0_CMD__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH8_SUB0_CMD__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH8_SUB0_CMD__TYPE (REG_BYTE)
+#define R_DMA_CH8_SUB0_CMD__GET REG_GET_RW
+#define R_DMA_CH8_SUB0_CMD__IGET REG_IGET_RW
+#define R_DMA_CH8_SUB0_CMD__SET REG_SET_RW
+#define R_DMA_CH8_SUB0_CMD__ISET REG_ISET_RW
+#define R_DMA_CH8_SUB0_CMD__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH8_SUB0_CMD__EQL REG_EQL_RW
+#define R_DMA_CH8_SUB0_CMD__IEQL REG_IEQL_RW
+#define R_DMA_CH8_SUB0_CMD__RD REG_RD_RW
+#define R_DMA_CH8_SUB0_CMD__IRD REG_IRD_RW
+#define R_DMA_CH8_SUB0_CMD__WR REG_WR_RW
+#define R_DMA_CH8_SUB0_CMD__IWR REG_IWR_RW
+
+#define R_DMA_CH8_SUB0_CMD__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH8_SUB0_CMD__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH8_SUB0_CMD__cmd__cmd__MASK 0x00000001U
+
+#define R_DMA_CH8_SUB0_CMD__cmd__MAX 0x1
+
+#define R_DMA_CH8_SUB0_CMD__cmd__MIN 0
+
+#define R_DMA_CH8_SUB0_CMD__cmd__BITNR 0
+
+#define R_DMA_CH8_SUB0_CMD__cmd__cmd__VAL REG_VAL_ENUM
+
+#define R_DMA_CH8_SUB0_CMD__cmd__cmd__start 1
+#define R_DMA_CH8_SUB0_CMD__cmd__cmd__stop 0
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB0_EP
+ * - type: RW
+ * - addr: 0xb00001c8
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH8_SUB0_EP__ADDR (REG_TYPECAST_UDWORD 0xb00001c8)
+#define R_DMA_CH8_SUB0_EP__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH8_SUB0_EP__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH8_SUB0_EP__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH8_SUB0_EP__TYPE (REG_UDWORD)
+#define R_DMA_CH8_SUB0_EP__GET REG_GET_RW
+#define R_DMA_CH8_SUB0_EP__IGET REG_IGET_RW
+#define R_DMA_CH8_SUB0_EP__SET REG_SET_RW
+#define R_DMA_CH8_SUB0_EP__ISET REG_ISET_RW
+#define R_DMA_CH8_SUB0_EP__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH8_SUB0_EP__EQL REG_EQL_RW
+#define R_DMA_CH8_SUB0_EP__IEQL REG_IEQL_RW
+#define R_DMA_CH8_SUB0_EP__RD REG_RD_RW
+#define R_DMA_CH8_SUB0_EP__IRD REG_IRD_RW
+#define R_DMA_CH8_SUB0_EP__WR REG_WR_RW
+#define R_DMA_CH8_SUB0_EP__IWR REG_IWR_RW
+
+#define R_DMA_CH8_SUB0_EP__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH8_SUB0_EP__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH8_SUB0_EP__ep__ep__MASK 0xffffffffU
+
+#define R_DMA_CH8_SUB0_EP__ep__MAX 0xffffffff
+
+#define R_DMA_CH8_SUB0_EP__ep__MIN 0
+
+#define R_DMA_CH8_SUB0_EP__ep__BITNR 0
+
+#define R_DMA_CH8_SUB0_EP__ep__ep__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB1_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001e7
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH8_SUB1_CLR_INTR__ADDR (REG_TYPECAST_BYTE 0xb00001e7)
+
+#ifndef REG_NO_SHADOW
+#define R_DMA_CH8_SUB1_CLR_INTR__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_DMA_CH8_SUB1_CLR_INTR + 0))
+#define R_DMA_CH8_SUB1_CLR_INTR__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_DMA_CH8_SUB1_CLR_INTR + 0))
+#else /* REG_NO_SHADOW */
+#define R_DMA_CH8_SUB1_CLR_INTR__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_DMA_CH8_SUB1_CLR_INTR__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_DMA_CH8_SUB1_CLR_INTR__STYPECAST REG_STYPECAST_BYTE
+#define R_DMA_CH8_SUB1_CLR_INTR__SVAL REG_SVAL_ZERO
+#define R_DMA_CH8_SUB1_CLR_INTR__SVAL_I REG_SVAL_I_ZERO
+#define R_DMA_CH8_SUB1_CLR_INTR__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH8_SUB1_CLR_INTR__TYPE (REG_BYTE)
+#define R_DMA_CH8_SUB1_CLR_INTR__GET REG_GET_WO
+#define R_DMA_CH8_SUB1_CLR_INTR__IGET REG_IGET_WO
+#define R_DMA_CH8_SUB1_CLR_INTR__SET REG_SET_WO
+#define R_DMA_CH8_SUB1_CLR_INTR__ISET REG_ISET_WO
+#define R_DMA_CH8_SUB1_CLR_INTR__SET_VAL REG_SET_VAL_WO
+#define R_DMA_CH8_SUB1_CLR_INTR__EQL REG_EQL_WO
+#define R_DMA_CH8_SUB1_CLR_INTR__IEQL REG_IEQL_WO
+#define R_DMA_CH8_SUB1_CLR_INTR__RD REG_RD_WO
+#define R_DMA_CH8_SUB1_CLR_INTR__IRD REG_IRD_WO
+#define R_DMA_CH8_SUB1_CLR_INTR__WR REG_WR_WO
+#define R_DMA_CH8_SUB1_CLR_INTR__IWR REG_IWR_WO
+
+#define R_DMA_CH8_SUB1_CLR_INTR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_DMA_CH8_SUB1_CLR_INTR__clr_descr__clr_descr__MASK 0x00000001U
+
+#define R_DMA_CH8_SUB1_CLR_INTR__clr_descr__MAX 0x1
+
+#define R_DMA_CH8_SUB1_CLR_INTR__clr_descr__MIN 0
+
+#define R_DMA_CH8_SUB1_CLR_INTR__clr_descr__BITNR 0
+
+#define R_DMA_CH8_SUB1_CLR_INTR__clr_descr__clr_descr__VAL REG_VAL_ENUM
+
+#define R_DMA_CH8_SUB1_CLR_INTR__clr_descr__clr_descr__do 1
+#define R_DMA_CH8_SUB1_CLR_INTR__clr_descr__clr_descr__dont 0
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB1_CMD
+ * - type: RW
+ * - addr: 0xb00001d7
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH8_SUB1_CMD__ADDR (REG_TYPECAST_BYTE 0xb00001d7)
+#define R_DMA_CH8_SUB1_CMD__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH8_SUB1_CMD__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH8_SUB1_CMD__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH8_SUB1_CMD__TYPE (REG_BYTE)
+#define R_DMA_CH8_SUB1_CMD__GET REG_GET_RW
+#define R_DMA_CH8_SUB1_CMD__IGET REG_IGET_RW
+#define R_DMA_CH8_SUB1_CMD__SET REG_SET_RW
+#define R_DMA_CH8_SUB1_CMD__ISET REG_ISET_RW
+#define R_DMA_CH8_SUB1_CMD__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH8_SUB1_CMD__EQL REG_EQL_RW
+#define R_DMA_CH8_SUB1_CMD__IEQL REG_IEQL_RW
+#define R_DMA_CH8_SUB1_CMD__RD REG_RD_RW
+#define R_DMA_CH8_SUB1_CMD__IRD REG_IRD_RW
+#define R_DMA_CH8_SUB1_CMD__WR REG_WR_RW
+#define R_DMA_CH8_SUB1_CMD__IWR REG_IWR_RW
+
+#define R_DMA_CH8_SUB1_CMD__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH8_SUB1_CMD__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH8_SUB1_CMD__cmd__cmd__MASK 0x00000001U
+
+#define R_DMA_CH8_SUB1_CMD__cmd__MAX 0x1
+
+#define R_DMA_CH8_SUB1_CMD__cmd__MIN 0
+
+#define R_DMA_CH8_SUB1_CMD__cmd__BITNR 0
+
+#define R_DMA_CH8_SUB1_CMD__cmd__cmd__VAL REG_VAL_ENUM
+
+#define R_DMA_CH8_SUB1_CMD__cmd__cmd__start 1
+#define R_DMA_CH8_SUB1_CMD__cmd__cmd__stop 0
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB1_EP
+ * - type: RW
+ * - addr: 0xb00001cc
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH8_SUB1_EP__ADDR (REG_TYPECAST_UDWORD 0xb00001cc)
+#define R_DMA_CH8_SUB1_EP__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH8_SUB1_EP__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH8_SUB1_EP__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH8_SUB1_EP__TYPE (REG_UDWORD)
+#define R_DMA_CH8_SUB1_EP__GET REG_GET_RW
+#define R_DMA_CH8_SUB1_EP__IGET REG_IGET_RW
+#define R_DMA_CH8_SUB1_EP__SET REG_SET_RW
+#define R_DMA_CH8_SUB1_EP__ISET REG_ISET_RW
+#define R_DMA_CH8_SUB1_EP__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH8_SUB1_EP__EQL REG_EQL_RW
+#define R_DMA_CH8_SUB1_EP__IEQL REG_IEQL_RW
+#define R_DMA_CH8_SUB1_EP__RD REG_RD_RW
+#define R_DMA_CH8_SUB1_EP__IRD REG_IRD_RW
+#define R_DMA_CH8_SUB1_EP__WR REG_WR_RW
+#define R_DMA_CH8_SUB1_EP__IWR REG_IWR_RW
+
+#define R_DMA_CH8_SUB1_EP__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH8_SUB1_EP__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH8_SUB1_EP__ep__ep__MASK 0xffffffffU
+
+#define R_DMA_CH8_SUB1_EP__ep__MAX 0xffffffff
+
+#define R_DMA_CH8_SUB1_EP__ep__MIN 0
+
+#define R_DMA_CH8_SUB1_EP__ep__BITNR 0
+
+#define R_DMA_CH8_SUB1_EP__ep__ep__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB2_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001eb
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH8_SUB2_CLR_INTR__ADDR (REG_TYPECAST_BYTE 0xb00001eb)
+
+#ifndef REG_NO_SHADOW
+#define R_DMA_CH8_SUB2_CLR_INTR__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_DMA_CH8_SUB2_CLR_INTR + 0))
+#define R_DMA_CH8_SUB2_CLR_INTR__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_DMA_CH8_SUB2_CLR_INTR + 0))
+#else /* REG_NO_SHADOW */
+#define R_DMA_CH8_SUB2_CLR_INTR__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_DMA_CH8_SUB2_CLR_INTR__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_DMA_CH8_SUB2_CLR_INTR__STYPECAST REG_STYPECAST_BYTE
+#define R_DMA_CH8_SUB2_CLR_INTR__SVAL REG_SVAL_ZERO
+#define R_DMA_CH8_SUB2_CLR_INTR__SVAL_I REG_SVAL_I_ZERO
+#define R_DMA_CH8_SUB2_CLR_INTR__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH8_SUB2_CLR_INTR__TYPE (REG_BYTE)
+#define R_DMA_CH8_SUB2_CLR_INTR__GET REG_GET_WO
+#define R_DMA_CH8_SUB2_CLR_INTR__IGET REG_IGET_WO
+#define R_DMA_CH8_SUB2_CLR_INTR__SET REG_SET_WO
+#define R_DMA_CH8_SUB2_CLR_INTR__ISET REG_ISET_WO
+#define R_DMA_CH8_SUB2_CLR_INTR__SET_VAL REG_SET_VAL_WO
+#define R_DMA_CH8_SUB2_CLR_INTR__EQL REG_EQL_WO
+#define R_DMA_CH8_SUB2_CLR_INTR__IEQL REG_IEQL_WO
+#define R_DMA_CH8_SUB2_CLR_INTR__RD REG_RD_WO
+#define R_DMA_CH8_SUB2_CLR_INTR__IRD REG_IRD_WO
+#define R_DMA_CH8_SUB2_CLR_INTR__WR REG_WR_WO
+#define R_DMA_CH8_SUB2_CLR_INTR__IWR REG_IWR_WO
+
+#define R_DMA_CH8_SUB2_CLR_INTR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_DMA_CH8_SUB2_CLR_INTR__clr_descr__clr_descr__MASK 0x00000001U
+
+#define R_DMA_CH8_SUB2_CLR_INTR__clr_descr__MAX 0x1
+
+#define R_DMA_CH8_SUB2_CLR_INTR__clr_descr__MIN 0
+
+#define R_DMA_CH8_SUB2_CLR_INTR__clr_descr__BITNR 0
+
+#define R_DMA_CH8_SUB2_CLR_INTR__clr_descr__clr_descr__VAL REG_VAL_ENUM
+
+#define R_DMA_CH8_SUB2_CLR_INTR__clr_descr__clr_descr__do 1
+#define R_DMA_CH8_SUB2_CLR_INTR__clr_descr__clr_descr__dont 0
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB2_CMD
+ * - type: RW
+ * - addr: 0xb00001db
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH8_SUB2_CMD__ADDR (REG_TYPECAST_BYTE 0xb00001db)
+#define R_DMA_CH8_SUB2_CMD__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH8_SUB2_CMD__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH8_SUB2_CMD__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH8_SUB2_CMD__TYPE (REG_BYTE)
+#define R_DMA_CH8_SUB2_CMD__GET REG_GET_RW
+#define R_DMA_CH8_SUB2_CMD__IGET REG_IGET_RW
+#define R_DMA_CH8_SUB2_CMD__SET REG_SET_RW
+#define R_DMA_CH8_SUB2_CMD__ISET REG_ISET_RW
+#define R_DMA_CH8_SUB2_CMD__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH8_SUB2_CMD__EQL REG_EQL_RW
+#define R_DMA_CH8_SUB2_CMD__IEQL REG_IEQL_RW
+#define R_DMA_CH8_SUB2_CMD__RD REG_RD_RW
+#define R_DMA_CH8_SUB2_CMD__IRD REG_IRD_RW
+#define R_DMA_CH8_SUB2_CMD__WR REG_WR_RW
+#define R_DMA_CH8_SUB2_CMD__IWR REG_IWR_RW
+
+#define R_DMA_CH8_SUB2_CMD__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH8_SUB2_CMD__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH8_SUB2_CMD__cmd__cmd__MASK 0x00000001U
+
+#define R_DMA_CH8_SUB2_CMD__cmd__MAX 0x1
+
+#define R_DMA_CH8_SUB2_CMD__cmd__MIN 0
+
+#define R_DMA_CH8_SUB2_CMD__cmd__BITNR 0
+
+#define R_DMA_CH8_SUB2_CMD__cmd__cmd__VAL REG_VAL_ENUM
+
+#define R_DMA_CH8_SUB2_CMD__cmd__cmd__start 1
+#define R_DMA_CH8_SUB2_CMD__cmd__cmd__stop 0
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB2_EP
+ * - type: RW
+ * - addr: 0xb00001f8
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH8_SUB2_EP__ADDR (REG_TYPECAST_UDWORD 0xb00001f8)
+#define R_DMA_CH8_SUB2_EP__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH8_SUB2_EP__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH8_SUB2_EP__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH8_SUB2_EP__TYPE (REG_UDWORD)
+#define R_DMA_CH8_SUB2_EP__GET REG_GET_RW
+#define R_DMA_CH8_SUB2_EP__IGET REG_IGET_RW
+#define R_DMA_CH8_SUB2_EP__SET REG_SET_RW
+#define R_DMA_CH8_SUB2_EP__ISET REG_ISET_RW
+#define R_DMA_CH8_SUB2_EP__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH8_SUB2_EP__EQL REG_EQL_RW
+#define R_DMA_CH8_SUB2_EP__IEQL REG_IEQL_RW
+#define R_DMA_CH8_SUB2_EP__RD REG_RD_RW
+#define R_DMA_CH8_SUB2_EP__IRD REG_IRD_RW
+#define R_DMA_CH8_SUB2_EP__WR REG_WR_RW
+#define R_DMA_CH8_SUB2_EP__IWR REG_IWR_RW
+
+#define R_DMA_CH8_SUB2_EP__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH8_SUB2_EP__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH8_SUB2_EP__ep__ep__MASK 0xffffffffU
+
+#define R_DMA_CH8_SUB2_EP__ep__MAX 0xffffffff
+
+#define R_DMA_CH8_SUB2_EP__ep__MIN 0
+
+#define R_DMA_CH8_SUB2_EP__ep__BITNR 0
+
+#define R_DMA_CH8_SUB2_EP__ep__ep__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB3_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001ef
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH8_SUB3_CLR_INTR__ADDR (REG_TYPECAST_BYTE 0xb00001ef)
+
+#ifndef REG_NO_SHADOW
+#define R_DMA_CH8_SUB3_CLR_INTR__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_DMA_CH8_SUB3_CLR_INTR + 0))
+#define R_DMA_CH8_SUB3_CLR_INTR__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_DMA_CH8_SUB3_CLR_INTR + 0))
+#else /* REG_NO_SHADOW */
+#define R_DMA_CH8_SUB3_CLR_INTR__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_DMA_CH8_SUB3_CLR_INTR__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_DMA_CH8_SUB3_CLR_INTR__STYPECAST REG_STYPECAST_BYTE
+#define R_DMA_CH8_SUB3_CLR_INTR__SVAL REG_SVAL_ZERO
+#define R_DMA_CH8_SUB3_CLR_INTR__SVAL_I REG_SVAL_I_ZERO
+#define R_DMA_CH8_SUB3_CLR_INTR__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH8_SUB3_CLR_INTR__TYPE (REG_BYTE)
+#define R_DMA_CH8_SUB3_CLR_INTR__GET REG_GET_WO
+#define R_DMA_CH8_SUB3_CLR_INTR__IGET REG_IGET_WO
+#define R_DMA_CH8_SUB3_CLR_INTR__SET REG_SET_WO
+#define R_DMA_CH8_SUB3_CLR_INTR__ISET REG_ISET_WO
+#define R_DMA_CH8_SUB3_CLR_INTR__SET_VAL REG_SET_VAL_WO
+#define R_DMA_CH8_SUB3_CLR_INTR__EQL REG_EQL_WO
+#define R_DMA_CH8_SUB3_CLR_INTR__IEQL REG_IEQL_WO
+#define R_DMA_CH8_SUB3_CLR_INTR__RD REG_RD_WO
+#define R_DMA_CH8_SUB3_CLR_INTR__IRD REG_IRD_WO
+#define R_DMA_CH8_SUB3_CLR_INTR__WR REG_WR_WO
+#define R_DMA_CH8_SUB3_CLR_INTR__IWR REG_IWR_WO
+
+#define R_DMA_CH8_SUB3_CLR_INTR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_DMA_CH8_SUB3_CLR_INTR__clr_descr__clr_descr__MASK 0x00000001U
+
+#define R_DMA_CH8_SUB3_CLR_INTR__clr_descr__MAX 0x1
+
+#define R_DMA_CH8_SUB3_CLR_INTR__clr_descr__MIN 0
+
+#define R_DMA_CH8_SUB3_CLR_INTR__clr_descr__BITNR 0
+
+#define R_DMA_CH8_SUB3_CLR_INTR__clr_descr__clr_descr__VAL REG_VAL_ENUM
+
+#define R_DMA_CH8_SUB3_CLR_INTR__clr_descr__clr_descr__do 1
+#define R_DMA_CH8_SUB3_CLR_INTR__clr_descr__clr_descr__dont 0
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB3_CMD
+ * - type: RW
+ * - addr: 0xb00001df
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH8_SUB3_CMD__ADDR (REG_TYPECAST_BYTE 0xb00001df)
+#define R_DMA_CH8_SUB3_CMD__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH8_SUB3_CMD__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH8_SUB3_CMD__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH8_SUB3_CMD__TYPE (REG_BYTE)
+#define R_DMA_CH8_SUB3_CMD__GET REG_GET_RW
+#define R_DMA_CH8_SUB3_CMD__IGET REG_IGET_RW
+#define R_DMA_CH8_SUB3_CMD__SET REG_SET_RW
+#define R_DMA_CH8_SUB3_CMD__ISET REG_ISET_RW
+#define R_DMA_CH8_SUB3_CMD__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH8_SUB3_CMD__EQL REG_EQL_RW
+#define R_DMA_CH8_SUB3_CMD__IEQL REG_IEQL_RW
+#define R_DMA_CH8_SUB3_CMD__RD REG_RD_RW
+#define R_DMA_CH8_SUB3_CMD__IRD REG_IRD_RW
+#define R_DMA_CH8_SUB3_CMD__WR REG_WR_RW
+#define R_DMA_CH8_SUB3_CMD__IWR REG_IWR_RW
+
+#define R_DMA_CH8_SUB3_CMD__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH8_SUB3_CMD__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH8_SUB3_CMD__cmd__cmd__MASK 0x00000001U
+
+#define R_DMA_CH8_SUB3_CMD__cmd__MAX 0x1
+
+#define R_DMA_CH8_SUB3_CMD__cmd__MIN 0
+
+#define R_DMA_CH8_SUB3_CMD__cmd__BITNR 0
+
+#define R_DMA_CH8_SUB3_CMD__cmd__cmd__VAL REG_VAL_ENUM
+
+#define R_DMA_CH8_SUB3_CMD__cmd__cmd__start 1
+#define R_DMA_CH8_SUB3_CMD__cmd__cmd__stop 0
+
+#endif
+
+/*
+ * R_DMA_CH8_SUB3_EP
+ * - type: RW
+ * - addr: 0xb00001fc
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH8_SUB3_EP__ADDR (REG_TYPECAST_UDWORD 0xb00001fc)
+#define R_DMA_CH8_SUB3_EP__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH8_SUB3_EP__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH8_SUB3_EP__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH8_SUB3_EP__TYPE (REG_UDWORD)
+#define R_DMA_CH8_SUB3_EP__GET REG_GET_RW
+#define R_DMA_CH8_SUB3_EP__IGET REG_IGET_RW
+#define R_DMA_CH8_SUB3_EP__SET REG_SET_RW
+#define R_DMA_CH8_SUB3_EP__ISET REG_ISET_RW
+#define R_DMA_CH8_SUB3_EP__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH8_SUB3_EP__EQL REG_EQL_RW
+#define R_DMA_CH8_SUB3_EP__IEQL REG_IEQL_RW
+#define R_DMA_CH8_SUB3_EP__RD REG_RD_RW
+#define R_DMA_CH8_SUB3_EP__IRD REG_IRD_RW
+#define R_DMA_CH8_SUB3_EP__WR REG_WR_RW
+#define R_DMA_CH8_SUB3_EP__IWR REG_IWR_RW
+
+#define R_DMA_CH8_SUB3_EP__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH8_SUB3_EP__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH8_SUB3_EP__ep__ep__MASK 0xffffffffU
+
+#define R_DMA_CH8_SUB3_EP__ep__MAX 0xffffffff
+
+#define R_DMA_CH8_SUB3_EP__ep__MIN 0
+
+#define R_DMA_CH8_SUB3_EP__ep__BITNR 0
+
+#define R_DMA_CH8_SUB3_EP__ep__ep__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH9_BUF
+ * - type: RW
+ * - addr: 0xb0000198
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH9_BUF__ADDR (REG_TYPECAST_UDWORD 0xb0000198)
+#define R_DMA_CH9_BUF__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH9_BUF__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH9_BUF__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH9_BUF__TYPE (REG_UDWORD)
+#define R_DMA_CH9_BUF__GET REG_GET_RW
+#define R_DMA_CH9_BUF__IGET REG_IGET_RW
+#define R_DMA_CH9_BUF__SET REG_SET_RW
+#define R_DMA_CH9_BUF__ISET REG_ISET_RW
+#define R_DMA_CH9_BUF__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH9_BUF__EQL REG_EQL_RW
+#define R_DMA_CH9_BUF__IEQL REG_IEQL_RW
+#define R_DMA_CH9_BUF__RD REG_RD_RW
+#define R_DMA_CH9_BUF__IRD REG_IRD_RW
+#define R_DMA_CH9_BUF__WR REG_WR_RW
+#define R_DMA_CH9_BUF__IWR REG_IWR_RW
+
+#define R_DMA_CH9_BUF__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH9_BUF__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH9_BUF__buf__buf__MASK 0xffffffffU
+
+#define R_DMA_CH9_BUF__buf__MAX 0xffffffff
+
+#define R_DMA_CH9_BUF__buf__MIN 0
+
+#define R_DMA_CH9_BUF__buf__BITNR 0
+
+#define R_DMA_CH9_BUF__buf__buf__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH9_CLR_INTR
+ * - type: WO
+ * - addr: 0xb00001f5
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH9_CLR_INTR__ADDR (REG_TYPECAST_BYTE 0xb00001f5)
+
+#ifndef REG_NO_SHADOW
+#define R_DMA_CH9_CLR_INTR__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_DMA_CH9_CLR_INTR + 0))
+#define R_DMA_CH9_CLR_INTR__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_DMA_CH9_CLR_INTR + 0))
+#else /* REG_NO_SHADOW */
+#define R_DMA_CH9_CLR_INTR__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_DMA_CH9_CLR_INTR__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_DMA_CH9_CLR_INTR__STYPECAST REG_STYPECAST_BYTE
+#define R_DMA_CH9_CLR_INTR__SVAL REG_SVAL_ZERO
+#define R_DMA_CH9_CLR_INTR__SVAL_I REG_SVAL_I_ZERO
+#define R_DMA_CH9_CLR_INTR__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH9_CLR_INTR__TYPE (REG_BYTE)
+#define R_DMA_CH9_CLR_INTR__GET REG_GET_WO
+#define R_DMA_CH9_CLR_INTR__IGET REG_IGET_WO
+#define R_DMA_CH9_CLR_INTR__SET REG_SET_WO
+#define R_DMA_CH9_CLR_INTR__ISET REG_ISET_WO
+#define R_DMA_CH9_CLR_INTR__SET_VAL REG_SET_VAL_WO
+#define R_DMA_CH9_CLR_INTR__EQL REG_EQL_WO
+#define R_DMA_CH9_CLR_INTR__IEQL REG_IEQL_WO
+#define R_DMA_CH9_CLR_INTR__RD REG_RD_WO
+#define R_DMA_CH9_CLR_INTR__IRD REG_IRD_WO
+#define R_DMA_CH9_CLR_INTR__WR REG_WR_WO
+#define R_DMA_CH9_CLR_INTR__IWR REG_IWR_WO
+
+#define R_DMA_CH9_CLR_INTR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_DMA_CH9_CLR_INTR__clr_eop__clr_eop__MASK 0x00000002U
+#define R_DMA_CH9_CLR_INTR__clr_descr__clr_descr__MASK 0x00000001U
+
+#define R_DMA_CH9_CLR_INTR__clr_eop__MAX 0x1
+#define R_DMA_CH9_CLR_INTR__clr_descr__MAX 0x1
+
+#define R_DMA_CH9_CLR_INTR__clr_eop__MIN 0
+#define R_DMA_CH9_CLR_INTR__clr_descr__MIN 0
+
+#define R_DMA_CH9_CLR_INTR__clr_eop__BITNR 1
+#define R_DMA_CH9_CLR_INTR__clr_descr__BITNR 0
+
+#define R_DMA_CH9_CLR_INTR__clr_eop__clr_eop__VAL REG_VAL_ENUM
+#define R_DMA_CH9_CLR_INTR__clr_descr__clr_descr__VAL REG_VAL_ENUM
+
+#define R_DMA_CH9_CLR_INTR__clr_eop__clr_eop__do 1
+#define R_DMA_CH9_CLR_INTR__clr_eop__clr_eop__dont 0
+#define R_DMA_CH9_CLR_INTR__clr_descr__clr_descr__do 1
+#define R_DMA_CH9_CLR_INTR__clr_descr__clr_descr__dont 0
+
+#endif
+
+/*
+ * R_DMA_CH9_CMD
+ * - type: RW
+ * - addr: 0xb00001f4
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH9_CMD__ADDR (REG_TYPECAST_BYTE 0xb00001f4)
+#define R_DMA_CH9_CMD__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH9_CMD__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH9_CMD__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH9_CMD__TYPE (REG_BYTE)
+#define R_DMA_CH9_CMD__GET REG_GET_RW
+#define R_DMA_CH9_CMD__IGET REG_IGET_RW
+#define R_DMA_CH9_CMD__SET REG_SET_RW
+#define R_DMA_CH9_CMD__ISET REG_ISET_RW
+#define R_DMA_CH9_CMD__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH9_CMD__EQL REG_EQL_RW
+#define R_DMA_CH9_CMD__IEQL REG_IEQL_RW
+#define R_DMA_CH9_CMD__RD REG_RD_RW
+#define R_DMA_CH9_CMD__IRD REG_IRD_RW
+#define R_DMA_CH9_CMD__WR REG_WR_RW
+#define R_DMA_CH9_CMD__IWR REG_IWR_RW
+
+#define R_DMA_CH9_CMD__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH9_CMD__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH9_CMD__cmd__cmd__MASK 0x00000007U
+
+#define R_DMA_CH9_CMD__cmd__MAX 0x7
+
+#define R_DMA_CH9_CMD__cmd__MIN 0
+
+#define R_DMA_CH9_CMD__cmd__BITNR 0
+
+#define R_DMA_CH9_CMD__cmd__cmd__VAL REG_VAL_ENUM
+
+#define R_DMA_CH9_CMD__cmd__cmd__continue 3
+#define R_DMA_CH9_CMD__cmd__cmd__hold 0
+#define R_DMA_CH9_CMD__cmd__cmd__reset 4
+#define R_DMA_CH9_CMD__cmd__cmd__restart 3
+#define R_DMA_CH9_CMD__cmd__cmd__start 1
+
+#endif
+
+/*
+ * R_DMA_CH9_DESCR
+ * - type: RW
+ * - addr: 0xb000019c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH9_DESCR__ADDR (REG_TYPECAST_UDWORD 0xb000019c)
+#define R_DMA_CH9_DESCR__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH9_DESCR__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH9_DESCR__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH9_DESCR__TYPE (REG_UDWORD)
+#define R_DMA_CH9_DESCR__GET REG_GET_RW
+#define R_DMA_CH9_DESCR__IGET REG_IGET_RW
+#define R_DMA_CH9_DESCR__SET REG_SET_RW
+#define R_DMA_CH9_DESCR__ISET REG_ISET_RW
+#define R_DMA_CH9_DESCR__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH9_DESCR__EQL REG_EQL_RW
+#define R_DMA_CH9_DESCR__IEQL REG_IEQL_RW
+#define R_DMA_CH9_DESCR__RD REG_RD_RW
+#define R_DMA_CH9_DESCR__IRD REG_IRD_RW
+#define R_DMA_CH9_DESCR__WR REG_WR_RW
+#define R_DMA_CH9_DESCR__IWR REG_IWR_RW
+
+#define R_DMA_CH9_DESCR__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH9_DESCR__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH9_DESCR__descr__descr__MASK 0xffffffffU
+
+#define R_DMA_CH9_DESCR__descr__MAX 0xffffffff
+
+#define R_DMA_CH9_DESCR__descr__MIN 0
+
+#define R_DMA_CH9_DESCR__descr__BITNR 0
+
+#define R_DMA_CH9_DESCR__descr__descr__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH9_FIRST
+ * - type: RW
+ * - addr: 0xb00001c4
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH9_FIRST__ADDR (REG_TYPECAST_UDWORD 0xb00001c4)
+#define R_DMA_CH9_FIRST__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH9_FIRST__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH9_FIRST__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH9_FIRST__TYPE (REG_UDWORD)
+#define R_DMA_CH9_FIRST__GET REG_GET_RW
+#define R_DMA_CH9_FIRST__IGET REG_IGET_RW
+#define R_DMA_CH9_FIRST__SET REG_SET_RW
+#define R_DMA_CH9_FIRST__ISET REG_ISET_RW
+#define R_DMA_CH9_FIRST__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH9_FIRST__EQL REG_EQL_RW
+#define R_DMA_CH9_FIRST__IEQL REG_IEQL_RW
+#define R_DMA_CH9_FIRST__RD REG_RD_RW
+#define R_DMA_CH9_FIRST__IRD REG_IRD_RW
+#define R_DMA_CH9_FIRST__WR REG_WR_RW
+#define R_DMA_CH9_FIRST__IWR REG_IWR_RW
+
+#define R_DMA_CH9_FIRST__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH9_FIRST__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH9_FIRST__first__first__MASK 0xffffffffU
+
+#define R_DMA_CH9_FIRST__first__MAX 0xffffffff
+
+#define R_DMA_CH9_FIRST__first__MIN 0
+
+#define R_DMA_CH9_FIRST__first__BITNR 0
+
+#define R_DMA_CH9_FIRST__first__first__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH9_HWSW
+ * - type: RW
+ * - addr: 0xb0000190
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH9_HWSW__ADDR (REG_TYPECAST_UDWORD 0xb0000190)
+#define R_DMA_CH9_HWSW__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH9_HWSW__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH9_HWSW__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH9_HWSW__TYPE (REG_UDWORD)
+#define R_DMA_CH9_HWSW__GET REG_GET_RW
+#define R_DMA_CH9_HWSW__IGET REG_IGET_RW
+#define R_DMA_CH9_HWSW__SET REG_SET_RW
+#define R_DMA_CH9_HWSW__ISET REG_ISET_RW
+#define R_DMA_CH9_HWSW__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH9_HWSW__EQL REG_EQL_RW
+#define R_DMA_CH9_HWSW__IEQL REG_IEQL_RW
+#define R_DMA_CH9_HWSW__RD REG_RD_RW
+#define R_DMA_CH9_HWSW__IRD REG_IRD_RW
+#define R_DMA_CH9_HWSW__WR REG_WR_RW
+#define R_DMA_CH9_HWSW__IWR REG_IWR_RW
+
+#define R_DMA_CH9_HWSW__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH9_HWSW__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH9_HWSW__hw__hw__MASK 0xffff0000U
+#define R_DMA_CH9_HWSW__sw__sw__MASK 0x0000ffffU
+
+#define R_DMA_CH9_HWSW__hw__MAX 0xffff
+#define R_DMA_CH9_HWSW__sw__MAX 0xffff
+
+#define R_DMA_CH9_HWSW__hw__MIN 0
+#define R_DMA_CH9_HWSW__sw__MIN 0
+
+#define R_DMA_CH9_HWSW__hw__BITNR 16
+#define R_DMA_CH9_HWSW__sw__BITNR 0
+
+#define R_DMA_CH9_HWSW__hw__hw__VAL REG_VAL_VAL
+#define R_DMA_CH9_HWSW__sw__sw__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH9_NEXT
+ * - type: RW
+ * - addr: 0xb0000194
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH9_NEXT__ADDR (REG_TYPECAST_UDWORD 0xb0000194)
+#define R_DMA_CH9_NEXT__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH9_NEXT__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH9_NEXT__TYPECAST REG_TYPECAST_UDWORD
+#define R_DMA_CH9_NEXT__TYPE (REG_UDWORD)
+#define R_DMA_CH9_NEXT__GET REG_GET_RW
+#define R_DMA_CH9_NEXT__IGET REG_IGET_RW
+#define R_DMA_CH9_NEXT__SET REG_SET_RW
+#define R_DMA_CH9_NEXT__ISET REG_ISET_RW
+#define R_DMA_CH9_NEXT__SET_VAL REG_SET_VAL_RW
+#define R_DMA_CH9_NEXT__EQL REG_EQL_RW
+#define R_DMA_CH9_NEXT__IEQL REG_IEQL_RW
+#define R_DMA_CH9_NEXT__RD REG_RD_RW
+#define R_DMA_CH9_NEXT__IRD REG_IRD_RW
+#define R_DMA_CH9_NEXT__WR REG_WR_RW
+#define R_DMA_CH9_NEXT__IWR REG_IWR_RW
+
+#define R_DMA_CH9_NEXT__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_DMA_CH9_NEXT__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH9_NEXT__next__next__MASK 0xffffffffU
+
+#define R_DMA_CH9_NEXT__next__MAX 0xffffffff
+
+#define R_DMA_CH9_NEXT__next__MIN 0
+
+#define R_DMA_CH9_NEXT__next__BITNR 0
+
+#define R_DMA_CH9_NEXT__next__next__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DMA_CH9_STATUS
+ * - type: RO
+ * - addr: 0xb00001f6
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_DMA_CH9_STATUS__ADDR (REG_TYPECAST_BYTE 0xb00001f6)
+#define R_DMA_CH9_STATUS__SVAL REG_SVAL_SHADOW
+#define R_DMA_CH9_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_DMA_CH9_STATUS__TYPECAST REG_TYPECAST_BYTE
+#define R_DMA_CH9_STATUS__TYPE (REG_BYTE)
+#define R_DMA_CH9_STATUS__GET REG_GET_RO
+#define R_DMA_CH9_STATUS__IGET REG_IGET_RO
+#define R_DMA_CH9_STATUS__SET REG_SET_RO
+#define R_DMA_CH9_STATUS__ISET REG_ISET_RO
+#define R_DMA_CH9_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_DMA_CH9_STATUS__EQL REG_EQL_RO
+#define R_DMA_CH9_STATUS__IEQL REG_IEQL_RO
+#define R_DMA_CH9_STATUS__RD REG_RD_RO
+#define R_DMA_CH9_STATUS__IRD REG_IRD_RO
+#define R_DMA_CH9_STATUS__WR REG_WR_RO
+#define R_DMA_CH9_STATUS__IWR REG_IWR_RO
+
+#define R_DMA_CH9_STATUS__READ(addr) \
+ (*(addr))
+
+#define R_DMA_CH9_STATUS__avail__avail__MASK 0x0000007fU
+
+#define R_DMA_CH9_STATUS__avail__MAX 0x7f
+
+#define R_DMA_CH9_STATUS__avail__MIN 0
+
+#define R_DMA_CH9_STATUS__avail__BITNR 0
+
+#define R_DMA_CH9_STATUS__avail__avail__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_DRAM_CONFIG
+ * - type: WO
+ * - addr: 0xb000000c
+ * - group: Bus interface configuration registers
+ */
+
+#if USE_GROUP__Bus_interface_configuration_registers
+
+#define R_DRAM_CONFIG__ADDR (REG_TYPECAST_UDWORD 0xb000000c)
+
+#ifndef REG_NO_SHADOW
+#define R_DRAM_CONFIG__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_DRAM_CONFIG + 0))
+#define R_DRAM_CONFIG__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_DRAM_CONFIG + 0))
+#else /* REG_NO_SHADOW */
+#define R_DRAM_CONFIG__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_DRAM_CONFIG__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_DRAM_CONFIG__STYPECAST REG_STYPECAST_UDWORD
+#define R_DRAM_CONFIG__SVAL REG_SVAL_SHADOW
+#define R_DRAM_CONFIG__SVAL_I REG_SVAL_I_SHADOW
+#define R_DRAM_CONFIG__TYPECAST REG_TYPECAST_UDWORD
+#define R_DRAM_CONFIG__TYPE (REG_UDWORD)
+#define R_DRAM_CONFIG__GET REG_GET_WO
+#define R_DRAM_CONFIG__IGET REG_IGET_WO
+#define R_DRAM_CONFIG__SET REG_SET_WO
+#define R_DRAM_CONFIG__ISET REG_ISET_WO
+#define R_DRAM_CONFIG__SET_VAL REG_SET_VAL_WO
+#define R_DRAM_CONFIG__EQL REG_EQL_WO
+#define R_DRAM_CONFIG__IEQL REG_IEQL_WO
+#define R_DRAM_CONFIG__RD REG_RD_WO
+#define R_DRAM_CONFIG__IRD REG_IRD_WO
+#define R_DRAM_CONFIG__WR REG_WR_WO
+#define R_DRAM_CONFIG__IWR REG_IWR_WO
+
+#define R_DRAM_CONFIG__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_DRAM_CONFIG__wmm1__wmm1__MASK 0x80000000U
+#define R_DRAM_CONFIG__wmm0__wmm0__MASK 0x40000000U
+#define R_DRAM_CONFIG__sh1__sh1__MASK 0x38000000U
+#define R_DRAM_CONFIG__sh0__sh0__MASK 0x07000000U
+#define R_DRAM_CONFIG__w__w__MASK 0x00800000U
+#define R_DRAM_CONFIG__c__c__MASK 0x00400000U
+#define R_DRAM_CONFIG__e__e__MASK 0x00200000U
+#define R_DRAM_CONFIG__group_sel__group_sel__MASK 0x001f0000U
+#define R_DRAM_CONFIG__ca1__ca1__MASK 0x0000e000U
+#define R_DRAM_CONFIG__bank23sel__bank23sel__MASK 0x00001f00U
+#define R_DRAM_CONFIG__ca0__ca0__MASK 0x000000e0U
+#define R_DRAM_CONFIG__bank01sel__bank01sel__MASK 0x0000001fU
+
+#define R_DRAM_CONFIG__wmm1__MAX 0x1
+#define R_DRAM_CONFIG__wmm0__MAX 0x1
+#define R_DRAM_CONFIG__sh1__MAX 7
+#define R_DRAM_CONFIG__sh0__MAX 7
+#define R_DRAM_CONFIG__w__MAX 0x1
+#define R_DRAM_CONFIG__c__MAX 0x1
+#define R_DRAM_CONFIG__e__MAX 0x1
+#define R_DRAM_CONFIG__group_sel__MAX 0x1f
+#define R_DRAM_CONFIG__ca1__MAX 7
+#define R_DRAM_CONFIG__bank23sel__MAX 0x1f
+#define R_DRAM_CONFIG__ca0__MAX 7
+#define R_DRAM_CONFIG__bank01sel__MAX 0x1f
+
+#define R_DRAM_CONFIG__wmm1__MIN 0
+#define R_DRAM_CONFIG__wmm0__MIN 0
+#define R_DRAM_CONFIG__sh1__MIN 0
+#define R_DRAM_CONFIG__sh0__MIN 0
+#define R_DRAM_CONFIG__w__MIN 0
+#define R_DRAM_CONFIG__c__MIN 0
+#define R_DRAM_CONFIG__e__MIN 0
+#define R_DRAM_CONFIG__group_sel__MIN 0
+#define R_DRAM_CONFIG__ca1__MIN 0
+#define R_DRAM_CONFIG__bank23sel__MIN 0
+#define R_DRAM_CONFIG__ca0__MIN 0
+#define R_DRAM_CONFIG__bank01sel__MIN 0
+
+#define R_DRAM_CONFIG__wmm1__BITNR 31
+#define R_DRAM_CONFIG__wmm0__BITNR 30
+#define R_DRAM_CONFIG__sh1__BITNR 27
+#define R_DRAM_CONFIG__sh0__BITNR 24
+#define R_DRAM_CONFIG__w__BITNR 23
+#define R_DRAM_CONFIG__c__BITNR 22
+#define R_DRAM_CONFIG__e__BITNR 21
+#define R_DRAM_CONFIG__group_sel__BITNR 16
+#define R_DRAM_CONFIG__ca1__BITNR 13
+#define R_DRAM_CONFIG__bank23sel__BITNR 8
+#define R_DRAM_CONFIG__ca0__BITNR 5
+#define R_DRAM_CONFIG__bank01sel__BITNR 0
+
+#define R_DRAM_CONFIG__wmm1__wmm1__VAL REG_VAL_ENUM
+#define R_DRAM_CONFIG__wmm0__wmm0__VAL REG_VAL_ENUM
+#define R_DRAM_CONFIG__sh1__sh1__VAL REG_VAL_VAL
+#define R_DRAM_CONFIG__sh0__sh0__VAL REG_VAL_VAL
+#define R_DRAM_CONFIG__w__w__VAL REG_VAL_ENUM
+#define R_DRAM_CONFIG__c__c__VAL REG_VAL_ENUM
+#define R_DRAM_CONFIG__e__e__VAL REG_VAL_ENUM
+#define R_DRAM_CONFIG__group_sel__group_sel__VAL REG_VAL_ENUM
+#define R_DRAM_CONFIG__ca1__ca1__VAL REG_VAL_VAL
+#define R_DRAM_CONFIG__bank23sel__bank23sel__VAL REG_VAL_ENUM
+#define R_DRAM_CONFIG__ca0__ca0__VAL REG_VAL_VAL
+#define R_DRAM_CONFIG__bank01sel__bank01sel__VAL REG_VAL_ENUM
+
+#define R_DRAM_CONFIG__wmm1__wmm1__norm 0
+#define R_DRAM_CONFIG__wmm1__wmm1__wmm 1
+#define R_DRAM_CONFIG__wmm0__wmm0__norm 0
+#define R_DRAM_CONFIG__wmm0__wmm0__wmm 1
+#define R_DRAM_CONFIG__w__w__bw16 0
+#define R_DRAM_CONFIG__w__w__bw32 1
+#define R_DRAM_CONFIG__c__c__bank 1
+#define R_DRAM_CONFIG__c__c__byte 0
+#define R_DRAM_CONFIG__e__e__edo 1
+#define R_DRAM_CONFIG__e__e__fast 0
+#define R_DRAM_CONFIG__group_sel__group_sel__bit10 10
+#define R_DRAM_CONFIG__group_sel__group_sel__bit11 11
+#define R_DRAM_CONFIG__group_sel__group_sel__bit12 12
+#define R_DRAM_CONFIG__group_sel__group_sel__bit13 13
+#define R_DRAM_CONFIG__group_sel__group_sel__bit14 14
+#define R_DRAM_CONFIG__group_sel__group_sel__bit15 15
+#define R_DRAM_CONFIG__group_sel__group_sel__bit16 16
+#define R_DRAM_CONFIG__group_sel__group_sel__bit17 17
+#define R_DRAM_CONFIG__group_sel__group_sel__bit18 18
+#define R_DRAM_CONFIG__group_sel__group_sel__bit19 19
+#define R_DRAM_CONFIG__group_sel__group_sel__bit20 20
+#define R_DRAM_CONFIG__group_sel__group_sel__bit21 21
+#define R_DRAM_CONFIG__group_sel__group_sel__bit22 22
+#define R_DRAM_CONFIG__group_sel__group_sel__bit23 23
+#define R_DRAM_CONFIG__group_sel__group_sel__bit24 24
+#define R_DRAM_CONFIG__group_sel__group_sel__bit25 25
+#define R_DRAM_CONFIG__group_sel__group_sel__bit26 26
+#define R_DRAM_CONFIG__group_sel__group_sel__bit27 27
+#define R_DRAM_CONFIG__group_sel__group_sel__bit28 28
+#define R_DRAM_CONFIG__group_sel__group_sel__bit29 29
+#define R_DRAM_CONFIG__group_sel__group_sel__bit9 9
+#define R_DRAM_CONFIG__group_sel__group_sel__grp0 0
+#define R_DRAM_CONFIG__group_sel__group_sel__grp1 1
+#define R_DRAM_CONFIG__bank23sel__bank23sel__bank0 0
+#define R_DRAM_CONFIG__bank23sel__bank23sel__bank1 1
+#define R_DRAM_CONFIG__bank23sel__bank23sel__bit10 10
+#define R_DRAM_CONFIG__bank23sel__bank23sel__bit11 11
+#define R_DRAM_CONFIG__bank23sel__bank23sel__bit12 12
+#define R_DRAM_CONFIG__bank23sel__bank23sel__bit13 13
+#define R_DRAM_CONFIG__bank23sel__bank23sel__bit14 14
+#define R_DRAM_CONFIG__bank23sel__bank23sel__bit15 15
+#define R_DRAM_CONFIG__bank23sel__bank23sel__bit16 16
+#define R_DRAM_CONFIG__bank23sel__bank23sel__bit17 17
+#define R_DRAM_CONFIG__bank23sel__bank23sel__bit18 18
+#define R_DRAM_CONFIG__bank23sel__bank23sel__bit19 19
+#define R_DRAM_CONFIG__bank23sel__bank23sel__bit20 20
+#define R_DRAM_CONFIG__bank23sel__bank23sel__bit21 21
+#define R_DRAM_CONFIG__bank23sel__bank23sel__bit22 22
+#define R_DRAM_CONFIG__bank23sel__bank23sel__bit23 23
+#define R_DRAM_CONFIG__bank23sel__bank23sel__bit24 24
+#define R_DRAM_CONFIG__bank23sel__bank23sel__bit25 25
+#define R_DRAM_CONFIG__bank23sel__bank23sel__bit26 26
+#define R_DRAM_CONFIG__bank23sel__bank23sel__bit27 27
+#define R_DRAM_CONFIG__bank23sel__bank23sel__bit28 28
+#define R_DRAM_CONFIG__bank23sel__bank23sel__bit29 29
+#define R_DRAM_CONFIG__bank23sel__bank23sel__bit9 9
+#define R_DRAM_CONFIG__bank01sel__bank01sel__bank0 0
+#define R_DRAM_CONFIG__bank01sel__bank01sel__bank1 1
+#define R_DRAM_CONFIG__bank01sel__bank01sel__bit10 10
+#define R_DRAM_CONFIG__bank01sel__bank01sel__bit11 11
+#define R_DRAM_CONFIG__bank01sel__bank01sel__bit12 12
+#define R_DRAM_CONFIG__bank01sel__bank01sel__bit13 13
+#define R_DRAM_CONFIG__bank01sel__bank01sel__bit14 14
+#define R_DRAM_CONFIG__bank01sel__bank01sel__bit15 15
+#define R_DRAM_CONFIG__bank01sel__bank01sel__bit16 16
+#define R_DRAM_CONFIG__bank01sel__bank01sel__bit17 17
+#define R_DRAM_CONFIG__bank01sel__bank01sel__bit18 18
+#define R_DRAM_CONFIG__bank01sel__bank01sel__bit19 19
+#define R_DRAM_CONFIG__bank01sel__bank01sel__bit20 20
+#define R_DRAM_CONFIG__bank01sel__bank01sel__bit21 21
+#define R_DRAM_CONFIG__bank01sel__bank01sel__bit22 22
+#define R_DRAM_CONFIG__bank01sel__bank01sel__bit23 23
+#define R_DRAM_CONFIG__bank01sel__bank01sel__bit24 24
+#define R_DRAM_CONFIG__bank01sel__bank01sel__bit25 25
+#define R_DRAM_CONFIG__bank01sel__bank01sel__bit26 26
+#define R_DRAM_CONFIG__bank01sel__bank01sel__bit27 27
+#define R_DRAM_CONFIG__bank01sel__bank01sel__bit28 28
+#define R_DRAM_CONFIG__bank01sel__bank01sel__bit29 29
+#define R_DRAM_CONFIG__bank01sel__bank01sel__bit9 9
+
+#endif
+
+/*
+ * R_DRAM_TIMING
+ * - type: WO
+ * - addr: 0xb0000008
+ * - group: Bus interface configuration registers
+ */
+
+#if USE_GROUP__Bus_interface_configuration_registers
+
+#define R_DRAM_TIMING__ADDR (REG_TYPECAST_UDWORD 0xb0000008)
+
+#ifndef REG_NO_SHADOW
+#define R_DRAM_TIMING__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_DRAM_TIMING + 0))
+#define R_DRAM_TIMING__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_DRAM_TIMING + 0))
+#else /* REG_NO_SHADOW */
+#define R_DRAM_TIMING__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_DRAM_TIMING__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_DRAM_TIMING__STYPECAST REG_STYPECAST_UDWORD
+#define R_DRAM_TIMING__SVAL REG_SVAL_SHADOW
+#define R_DRAM_TIMING__SVAL_I REG_SVAL_I_SHADOW
+#define R_DRAM_TIMING__TYPECAST REG_TYPECAST_UDWORD
+#define R_DRAM_TIMING__TYPE (REG_UDWORD)
+#define R_DRAM_TIMING__GET REG_GET_WO
+#define R_DRAM_TIMING__IGET REG_IGET_WO
+#define R_DRAM_TIMING__SET REG_SET_WO
+#define R_DRAM_TIMING__ISET REG_ISET_WO
+#define R_DRAM_TIMING__SET_VAL REG_SET_VAL_WO
+#define R_DRAM_TIMING__EQL REG_EQL_WO
+#define R_DRAM_TIMING__IEQL REG_IEQL_WO
+#define R_DRAM_TIMING__RD REG_RD_WO
+#define R_DRAM_TIMING__IRD REG_IRD_WO
+#define R_DRAM_TIMING__WR REG_WR_WO
+#define R_DRAM_TIMING__IWR REG_IWR_WO
+
+#define R_DRAM_TIMING__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_DRAM_TIMING__sdram__sdram__MASK 0x80000000U
+#define R_DRAM_TIMING__ref__ref__MASK 0x0000c000U
+#define R_DRAM_TIMING__rp__rp__MASK 0x00003000U
+#define R_DRAM_TIMING__rs__rs__MASK 0x00000c00U
+#define R_DRAM_TIMING__rh__rh__MASK 0x00000300U
+#define R_DRAM_TIMING__w__w__MASK 0x00000080U
+#define R_DRAM_TIMING__c__c__MASK 0x00000040U
+#define R_DRAM_TIMING__cz__cz__MASK 0x00000030U
+#define R_DRAM_TIMING__cp__cp__MASK 0x0000000cU
+#define R_DRAM_TIMING__cw__cw__MASK 0x00000003U
+
+#define R_DRAM_TIMING__sdram__MAX 0x1
+#define R_DRAM_TIMING__ref__MAX 0x3
+#define R_DRAM_TIMING__rp__MAX 3
+#define R_DRAM_TIMING__rs__MAX 3
+#define R_DRAM_TIMING__rh__MAX 3
+#define R_DRAM_TIMING__w__MAX 0x1
+#define R_DRAM_TIMING__c__MAX 0x1
+#define R_DRAM_TIMING__cz__MAX 3
+#define R_DRAM_TIMING__cp__MAX 3
+#define R_DRAM_TIMING__cw__MAX 3
+
+#define R_DRAM_TIMING__sdram__MIN 0
+#define R_DRAM_TIMING__ref__MIN 0
+#define R_DRAM_TIMING__rp__MIN 0
+#define R_DRAM_TIMING__rs__MIN 0
+#define R_DRAM_TIMING__rh__MIN 0
+#define R_DRAM_TIMING__w__MIN 0
+#define R_DRAM_TIMING__c__MIN 0
+#define R_DRAM_TIMING__cz__MIN 0
+#define R_DRAM_TIMING__cp__MIN 0
+#define R_DRAM_TIMING__cw__MIN 0
+
+#define R_DRAM_TIMING__sdram__BITNR 31
+#define R_DRAM_TIMING__ref__BITNR 14
+#define R_DRAM_TIMING__rp__BITNR 12
+#define R_DRAM_TIMING__rs__BITNR 10
+#define R_DRAM_TIMING__rh__BITNR 8
+#define R_DRAM_TIMING__w__BITNR 7
+#define R_DRAM_TIMING__c__BITNR 6
+#define R_DRAM_TIMING__cz__BITNR 4
+#define R_DRAM_TIMING__cp__BITNR 2
+#define R_DRAM_TIMING__cw__BITNR 0
+
+#define R_DRAM_TIMING__sdram__sdram__VAL REG_VAL_ENUM
+#define R_DRAM_TIMING__ref__ref__VAL REG_VAL_ENUM
+#define R_DRAM_TIMING__rp__rp__VAL REG_VAL_VAL
+#define R_DRAM_TIMING__rs__rs__VAL REG_VAL_VAL
+#define R_DRAM_TIMING__rh__rh__VAL REG_VAL_VAL
+#define R_DRAM_TIMING__w__w__VAL REG_VAL_ENUM
+#define R_DRAM_TIMING__c__c__VAL REG_VAL_ENUM
+#define R_DRAM_TIMING__cz__cz__VAL REG_VAL_VAL
+#define R_DRAM_TIMING__cp__cp__VAL REG_VAL_VAL
+#define R_DRAM_TIMING__cw__cw__VAL REG_VAL_VAL
+
+#define R_DRAM_TIMING__sdram__sdram__disable 0
+#define R_DRAM_TIMING__sdram__sdram__enable 1
+#define R_DRAM_TIMING__ref__ref__disable 3
+#define R_DRAM_TIMING__ref__ref__e13us 1
+#define R_DRAM_TIMING__ref__ref__e52us 0
+#define R_DRAM_TIMING__ref__ref__e8700ns 2
+#define R_DRAM_TIMING__w__w__ext 1
+#define R_DRAM_TIMING__w__w__norm 0
+#define R_DRAM_TIMING__c__c__ext 1
+#define R_DRAM_TIMING__c__c__norm 0
+
+#endif
+
+/*
+ * R_EXT_DMA_0_ADDR
+ * - type: WO
+ * - addr: 0xb0000014
+ * - group: External DMA registers
+ */
+
+#if USE_GROUP__External_DMA_registers
+
+#define R_EXT_DMA_0_ADDR__ADDR (REG_TYPECAST_UDWORD 0xb0000014)
+
+#ifndef REG_NO_SHADOW
+#define R_EXT_DMA_0_ADDR__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_EXT_DMA_0_ADDR + 0))
+#define R_EXT_DMA_0_ADDR__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_EXT_DMA_0_ADDR + 0))
+#else /* REG_NO_SHADOW */
+#define R_EXT_DMA_0_ADDR__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_EXT_DMA_0_ADDR__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_EXT_DMA_0_ADDR__STYPECAST REG_STYPECAST_UDWORD
+#define R_EXT_DMA_0_ADDR__SVAL REG_SVAL_SHADOW
+#define R_EXT_DMA_0_ADDR__SVAL_I REG_SVAL_I_SHADOW
+#define R_EXT_DMA_0_ADDR__TYPECAST REG_TYPECAST_UDWORD
+#define R_EXT_DMA_0_ADDR__TYPE (REG_UDWORD)
+#define R_EXT_DMA_0_ADDR__GET REG_GET_WO
+#define R_EXT_DMA_0_ADDR__IGET REG_IGET_WO
+#define R_EXT_DMA_0_ADDR__SET REG_SET_WO
+#define R_EXT_DMA_0_ADDR__ISET REG_ISET_WO
+#define R_EXT_DMA_0_ADDR__SET_VAL REG_SET_VAL_WO
+#define R_EXT_DMA_0_ADDR__EQL REG_EQL_WO
+#define R_EXT_DMA_0_ADDR__IEQL REG_IEQL_WO
+#define R_EXT_DMA_0_ADDR__RD REG_RD_WO
+#define R_EXT_DMA_0_ADDR__IRD REG_IRD_WO
+#define R_EXT_DMA_0_ADDR__WR REG_WR_WO
+#define R_EXT_DMA_0_ADDR__IWR REG_IWR_WO
+
+#define R_EXT_DMA_0_ADDR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_EXT_DMA_0_ADDR__FIRST 0
+#define R_EXT_DMA_0_ADDR__IOFFSET 8
+#define R_EXT_DMA_0_ADDR__LAST 1
+#define R_EXT_DMA_0_ADDR__OFFSET 8
+#define R_EXT_DMA_0_ADDR__SOFFSET 8
+/* end */
+
+#define R_EXT_DMA_0_ADDR__ext0_addr__ext0_addr__MASK 0x3ffffffcU
+
+#define R_EXT_DMA_0_ADDR__ext0_addr__MAX 0xfffffff
+
+#define R_EXT_DMA_0_ADDR__ext0_addr__MIN 0
+
+#define R_EXT_DMA_0_ADDR__ext0_addr__BITNR 2
+
+#define R_EXT_DMA_0_ADDR__ext0_addr__ext0_addr__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_EXT_DMA_0_CMD
+ * - type: WO
+ * - addr: 0xb0000010
+ * - group: External DMA registers
+ */
+
+#if USE_GROUP__External_DMA_registers
+
+#define R_EXT_DMA_0_CMD__ADDR (REG_TYPECAST_UDWORD 0xb0000010)
+
+#ifndef REG_NO_SHADOW
+#define R_EXT_DMA_0_CMD__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_EXT_DMA_0_CMD + 0))
+#define R_EXT_DMA_0_CMD__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_EXT_DMA_0_CMD + 0))
+#else /* REG_NO_SHADOW */
+#define R_EXT_DMA_0_CMD__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_EXT_DMA_0_CMD__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_EXT_DMA_0_CMD__STYPECAST REG_STYPECAST_UDWORD
+#define R_EXT_DMA_0_CMD__SVAL REG_SVAL_SHADOW
+#define R_EXT_DMA_0_CMD__SVAL_I REG_SVAL_I_SHADOW
+#define R_EXT_DMA_0_CMD__TYPECAST REG_TYPECAST_UDWORD
+#define R_EXT_DMA_0_CMD__TYPE (REG_UDWORD)
+#define R_EXT_DMA_0_CMD__GET REG_GET_WO
+#define R_EXT_DMA_0_CMD__IGET REG_IGET_WO
+#define R_EXT_DMA_0_CMD__SET REG_SET_WO
+#define R_EXT_DMA_0_CMD__ISET REG_ISET_WO
+#define R_EXT_DMA_0_CMD__SET_VAL REG_SET_VAL_WO
+#define R_EXT_DMA_0_CMD__EQL REG_EQL_WO
+#define R_EXT_DMA_0_CMD__IEQL REG_IEQL_WO
+#define R_EXT_DMA_0_CMD__RD REG_RD_WO
+#define R_EXT_DMA_0_CMD__IRD REG_IRD_WO
+#define R_EXT_DMA_0_CMD__WR REG_WR_WO
+#define R_EXT_DMA_0_CMD__IWR REG_IWR_WO
+
+#define R_EXT_DMA_0_CMD__WRITE(addr,value) \
+ (*(addr) = (value))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_EXT_DMA_0_CMD__FIRST 0
+#define R_EXT_DMA_0_CMD__IOFFSET 8
+#define R_EXT_DMA_0_CMD__LAST 1
+#define R_EXT_DMA_0_CMD__OFFSET 8
+#define R_EXT_DMA_0_CMD__SOFFSET 8
+/* end */
+
+#define R_EXT_DMA_0_CMD__cnt__cnt__MASK 0x00800000U
+#define R_EXT_DMA_0_CMD__rqpol__rqpol__MASK 0x00400000U
+#define R_EXT_DMA_0_CMD__apol__apol__MASK 0x00200000U
+#define R_EXT_DMA_0_CMD__rq_ack__rq_ack__MASK 0x00100000U
+#define R_EXT_DMA_0_CMD__wid__wid__MASK 0x000c0000U
+#define R_EXT_DMA_0_CMD__dir__dir__MASK 0x00020000U
+#define R_EXT_DMA_0_CMD__run__run__MASK 0x00010000U
+#define R_EXT_DMA_0_CMD__trf_count__trf_count__MASK 0x0000ffffU
+
+#define R_EXT_DMA_0_CMD__cnt__MAX 0x1
+#define R_EXT_DMA_0_CMD__rqpol__MAX 0x1
+#define R_EXT_DMA_0_CMD__apol__MAX 0x1
+#define R_EXT_DMA_0_CMD__rq_ack__MAX 0x1
+#define R_EXT_DMA_0_CMD__wid__MAX 0x3
+#define R_EXT_DMA_0_CMD__dir__MAX 0x1
+#define R_EXT_DMA_0_CMD__run__MAX 0x1
+#define R_EXT_DMA_0_CMD__trf_count__MAX 0xffff
+
+#define R_EXT_DMA_0_CMD__cnt__MIN 0
+#define R_EXT_DMA_0_CMD__rqpol__MIN 0
+#define R_EXT_DMA_0_CMD__apol__MIN 0
+#define R_EXT_DMA_0_CMD__rq_ack__MIN 0
+#define R_EXT_DMA_0_CMD__wid__MIN 0
+#define R_EXT_DMA_0_CMD__dir__MIN 0
+#define R_EXT_DMA_0_CMD__run__MIN 0
+#define R_EXT_DMA_0_CMD__trf_count__MIN 0
+
+#define R_EXT_DMA_0_CMD__cnt__BITNR 23
+#define R_EXT_DMA_0_CMD__rqpol__BITNR 22
+#define R_EXT_DMA_0_CMD__apol__BITNR 21
+#define R_EXT_DMA_0_CMD__rq_ack__BITNR 20
+#define R_EXT_DMA_0_CMD__wid__BITNR 18
+#define R_EXT_DMA_0_CMD__dir__BITNR 17
+#define R_EXT_DMA_0_CMD__run__BITNR 16
+#define R_EXT_DMA_0_CMD__trf_count__BITNR 0
+
+#define R_EXT_DMA_0_CMD__cnt__cnt__VAL REG_VAL_ENUM
+#define R_EXT_DMA_0_CMD__rqpol__rqpol__VAL REG_VAL_ENUM
+#define R_EXT_DMA_0_CMD__apol__apol__VAL REG_VAL_ENUM
+#define R_EXT_DMA_0_CMD__rq_ack__rq_ack__VAL REG_VAL_ENUM
+#define R_EXT_DMA_0_CMD__wid__wid__VAL REG_VAL_ENUM
+#define R_EXT_DMA_0_CMD__dir__dir__VAL REG_VAL_ENUM
+#define R_EXT_DMA_0_CMD__run__run__VAL REG_VAL_ENUM
+#define R_EXT_DMA_0_CMD__trf_count__trf_count__VAL REG_VAL_VAL
+
+#define R_EXT_DMA_0_CMD__cnt__cnt__disable 0
+#define R_EXT_DMA_0_CMD__cnt__cnt__enable 1
+#define R_EXT_DMA_0_CMD__rqpol__rqpol__ahigh 0
+#define R_EXT_DMA_0_CMD__rqpol__rqpol__alow 1
+#define R_EXT_DMA_0_CMD__apol__apol__ahigh 0
+#define R_EXT_DMA_0_CMD__apol__apol__alow 1
+#define R_EXT_DMA_0_CMD__rq_ack__rq_ack__burst 0
+#define R_EXT_DMA_0_CMD__rq_ack__rq_ack__handsh 1
+#define R_EXT_DMA_0_CMD__wid__wid__byte 0
+#define R_EXT_DMA_0_CMD__wid__wid__dword 2
+#define R_EXT_DMA_0_CMD__wid__wid__word 1
+#define R_EXT_DMA_0_CMD__dir__dir__input 0
+#define R_EXT_DMA_0_CMD__dir__dir__output 1
+#define R_EXT_DMA_0_CMD__run__run__start 1
+#define R_EXT_DMA_0_CMD__run__run__stop 0
+
+#endif
+
+/*
+ * R_EXT_DMA_0_STAT
+ * - type: RO
+ * - addr: 0xb0000010
+ * - group: External DMA registers
+ */
+
+#if USE_GROUP__External_DMA_registers
+
+#define R_EXT_DMA_0_STAT__ADDR (REG_TYPECAST_UDWORD 0xb0000010)
+#define R_EXT_DMA_0_STAT__SVAL REG_SVAL_SHADOW
+#define R_EXT_DMA_0_STAT__SVAL_I REG_SVAL_I_SHADOW
+#define R_EXT_DMA_0_STAT__TYPECAST REG_TYPECAST_UDWORD
+#define R_EXT_DMA_0_STAT__TYPE (REG_UDWORD)
+#define R_EXT_DMA_0_STAT__GET REG_GET_RO
+#define R_EXT_DMA_0_STAT__IGET REG_IGET_RO
+#define R_EXT_DMA_0_STAT__SET REG_SET_RO
+#define R_EXT_DMA_0_STAT__ISET REG_ISET_RO
+#define R_EXT_DMA_0_STAT__SET_VAL REG_SET_VAL_RO
+#define R_EXT_DMA_0_STAT__EQL REG_EQL_RO
+#define R_EXT_DMA_0_STAT__IEQL REG_IEQL_RO
+#define R_EXT_DMA_0_STAT__RD REG_RD_RO
+#define R_EXT_DMA_0_STAT__IRD REG_IRD_RO
+#define R_EXT_DMA_0_STAT__WR REG_WR_RO
+#define R_EXT_DMA_0_STAT__IWR REG_IWR_RO
+
+#define R_EXT_DMA_0_STAT__READ(addr) \
+ (*(addr))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_EXT_DMA_0_STAT__FIRST 0
+#define R_EXT_DMA_0_STAT__LAST 1
+#define R_EXT_DMA_0_STAT__OFFSET 8
+/* end */
+
+#define R_EXT_DMA_0_STAT__run__run__MASK 0x00010000U
+#define R_EXT_DMA_0_STAT__trf_count__trf_count__MASK 0x0000ffffU
+
+#define R_EXT_DMA_0_STAT__run__MAX 0x1
+#define R_EXT_DMA_0_STAT__trf_count__MAX 0xffff
+
+#define R_EXT_DMA_0_STAT__run__MIN 0
+#define R_EXT_DMA_0_STAT__trf_count__MIN 0
+
+#define R_EXT_DMA_0_STAT__run__BITNR 16
+#define R_EXT_DMA_0_STAT__trf_count__BITNR 0
+
+#define R_EXT_DMA_0_STAT__run__run__VAL REG_VAL_ENUM
+#define R_EXT_DMA_0_STAT__trf_count__trf_count__VAL REG_VAL_VAL
+
+#define R_EXT_DMA_0_STAT__run__run__start 1
+#define R_EXT_DMA_0_STAT__run__run__stop 0
+
+#endif
+
+/*
+ * R_EXT_DMA_1_ADDR
+ * - type: WO
+ * - addr: 0xb000001c
+ * - group: External DMA registers
+ */
+
+#if USE_GROUP__External_DMA_registers
+
+#define R_EXT_DMA_1_ADDR__ADDR (REG_TYPECAST_UDWORD 0xb000001c)
+
+#ifndef REG_NO_SHADOW
+#define R_EXT_DMA_1_ADDR__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_EXT_DMA_1_ADDR + 0))
+#define R_EXT_DMA_1_ADDR__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_EXT_DMA_1_ADDR + 0))
+#else /* REG_NO_SHADOW */
+#define R_EXT_DMA_1_ADDR__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_EXT_DMA_1_ADDR__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_EXT_DMA_1_ADDR__STYPECAST REG_STYPECAST_UDWORD
+#define R_EXT_DMA_1_ADDR__SVAL REG_SVAL_SHADOW
+#define R_EXT_DMA_1_ADDR__SVAL_I REG_SVAL_I_SHADOW
+#define R_EXT_DMA_1_ADDR__TYPECAST REG_TYPECAST_UDWORD
+#define R_EXT_DMA_1_ADDR__TYPE (REG_UDWORD)
+#define R_EXT_DMA_1_ADDR__GET REG_GET_WO
+#define R_EXT_DMA_1_ADDR__IGET REG_IGET_WO
+#define R_EXT_DMA_1_ADDR__SET REG_SET_WO
+#define R_EXT_DMA_1_ADDR__ISET REG_ISET_WO
+#define R_EXT_DMA_1_ADDR__SET_VAL REG_SET_VAL_WO
+#define R_EXT_DMA_1_ADDR__EQL REG_EQL_WO
+#define R_EXT_DMA_1_ADDR__IEQL REG_IEQL_WO
+#define R_EXT_DMA_1_ADDR__RD REG_RD_WO
+#define R_EXT_DMA_1_ADDR__IRD REG_IRD_WO
+#define R_EXT_DMA_1_ADDR__WR REG_WR_WO
+#define R_EXT_DMA_1_ADDR__IWR REG_IWR_WO
+
+#define R_EXT_DMA_1_ADDR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_EXT_DMA_1_ADDR__ext0_addr__ext0_addr__MASK 0x3ffffffcU
+
+#define R_EXT_DMA_1_ADDR__ext0_addr__MAX 0xfffffff
+
+#define R_EXT_DMA_1_ADDR__ext0_addr__MIN 0
+
+#define R_EXT_DMA_1_ADDR__ext0_addr__BITNR 2
+
+#define R_EXT_DMA_1_ADDR__ext0_addr__ext0_addr__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_EXT_DMA_1_CMD
+ * - type: WO
+ * - addr: 0xb0000018
+ * - group: External DMA registers
+ */
+
+#if USE_GROUP__External_DMA_registers
+
+#define R_EXT_DMA_1_CMD__ADDR (REG_TYPECAST_UDWORD 0xb0000018)
+
+#ifndef REG_NO_SHADOW
+#define R_EXT_DMA_1_CMD__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_EXT_DMA_1_CMD + 0))
+#define R_EXT_DMA_1_CMD__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_EXT_DMA_1_CMD + 0))
+#else /* REG_NO_SHADOW */
+#define R_EXT_DMA_1_CMD__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_EXT_DMA_1_CMD__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_EXT_DMA_1_CMD__STYPECAST REG_STYPECAST_UDWORD
+#define R_EXT_DMA_1_CMD__SVAL REG_SVAL_SHADOW
+#define R_EXT_DMA_1_CMD__SVAL_I REG_SVAL_I_SHADOW
+#define R_EXT_DMA_1_CMD__TYPECAST REG_TYPECAST_UDWORD
+#define R_EXT_DMA_1_CMD__TYPE (REG_UDWORD)
+#define R_EXT_DMA_1_CMD__GET REG_GET_WO
+#define R_EXT_DMA_1_CMD__IGET REG_IGET_WO
+#define R_EXT_DMA_1_CMD__SET REG_SET_WO
+#define R_EXT_DMA_1_CMD__ISET REG_ISET_WO
+#define R_EXT_DMA_1_CMD__SET_VAL REG_SET_VAL_WO
+#define R_EXT_DMA_1_CMD__EQL REG_EQL_WO
+#define R_EXT_DMA_1_CMD__IEQL REG_IEQL_WO
+#define R_EXT_DMA_1_CMD__RD REG_RD_WO
+#define R_EXT_DMA_1_CMD__IRD REG_IRD_WO
+#define R_EXT_DMA_1_CMD__WR REG_WR_WO
+#define R_EXT_DMA_1_CMD__IWR REG_IWR_WO
+
+#define R_EXT_DMA_1_CMD__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_EXT_DMA_1_CMD__cnt__cnt__MASK 0x00800000U
+#define R_EXT_DMA_1_CMD__rqpol__rqpol__MASK 0x00400000U
+#define R_EXT_DMA_1_CMD__apol__apol__MASK 0x00200000U
+#define R_EXT_DMA_1_CMD__rq_ack__rq_ack__MASK 0x00100000U
+#define R_EXT_DMA_1_CMD__wid__wid__MASK 0x000c0000U
+#define R_EXT_DMA_1_CMD__dir__dir__MASK 0x00020000U
+#define R_EXT_DMA_1_CMD__run__run__MASK 0x00010000U
+#define R_EXT_DMA_1_CMD__trf_count__trf_count__MASK 0x0000ffffU
+
+#define R_EXT_DMA_1_CMD__cnt__MAX 0x1
+#define R_EXT_DMA_1_CMD__rqpol__MAX 0x1
+#define R_EXT_DMA_1_CMD__apol__MAX 0x1
+#define R_EXT_DMA_1_CMD__rq_ack__MAX 0x1
+#define R_EXT_DMA_1_CMD__wid__MAX 0x3
+#define R_EXT_DMA_1_CMD__dir__MAX 0x1
+#define R_EXT_DMA_1_CMD__run__MAX 0x1
+#define R_EXT_DMA_1_CMD__trf_count__MAX 0xffff
+
+#define R_EXT_DMA_1_CMD__cnt__MIN 0
+#define R_EXT_DMA_1_CMD__rqpol__MIN 0
+#define R_EXT_DMA_1_CMD__apol__MIN 0
+#define R_EXT_DMA_1_CMD__rq_ack__MIN 0
+#define R_EXT_DMA_1_CMD__wid__MIN 0
+#define R_EXT_DMA_1_CMD__dir__MIN 0
+#define R_EXT_DMA_1_CMD__run__MIN 0
+#define R_EXT_DMA_1_CMD__trf_count__MIN 0
+
+#define R_EXT_DMA_1_CMD__cnt__BITNR 23
+#define R_EXT_DMA_1_CMD__rqpol__BITNR 22
+#define R_EXT_DMA_1_CMD__apol__BITNR 21
+#define R_EXT_DMA_1_CMD__rq_ack__BITNR 20
+#define R_EXT_DMA_1_CMD__wid__BITNR 18
+#define R_EXT_DMA_1_CMD__dir__BITNR 17
+#define R_EXT_DMA_1_CMD__run__BITNR 16
+#define R_EXT_DMA_1_CMD__trf_count__BITNR 0
+
+#define R_EXT_DMA_1_CMD__cnt__cnt__VAL REG_VAL_ENUM
+#define R_EXT_DMA_1_CMD__rqpol__rqpol__VAL REG_VAL_ENUM
+#define R_EXT_DMA_1_CMD__apol__apol__VAL REG_VAL_ENUM
+#define R_EXT_DMA_1_CMD__rq_ack__rq_ack__VAL REG_VAL_ENUM
+#define R_EXT_DMA_1_CMD__wid__wid__VAL REG_VAL_ENUM
+#define R_EXT_DMA_1_CMD__dir__dir__VAL REG_VAL_ENUM
+#define R_EXT_DMA_1_CMD__run__run__VAL REG_VAL_ENUM
+#define R_EXT_DMA_1_CMD__trf_count__trf_count__VAL REG_VAL_VAL
+
+#define R_EXT_DMA_1_CMD__cnt__cnt__disable 0
+#define R_EXT_DMA_1_CMD__cnt__cnt__enable 1
+#define R_EXT_DMA_1_CMD__rqpol__rqpol__ahigh 0
+#define R_EXT_DMA_1_CMD__rqpol__rqpol__alow 1
+#define R_EXT_DMA_1_CMD__apol__apol__ahigh 0
+#define R_EXT_DMA_1_CMD__apol__apol__alow 1
+#define R_EXT_DMA_1_CMD__rq_ack__rq_ack__burst 0
+#define R_EXT_DMA_1_CMD__rq_ack__rq_ack__handsh 1
+#define R_EXT_DMA_1_CMD__wid__wid__byte 0
+#define R_EXT_DMA_1_CMD__wid__wid__dword 2
+#define R_EXT_DMA_1_CMD__wid__wid__word 1
+#define R_EXT_DMA_1_CMD__dir__dir__input 0
+#define R_EXT_DMA_1_CMD__dir__dir__output 1
+#define R_EXT_DMA_1_CMD__run__run__start 1
+#define R_EXT_DMA_1_CMD__run__run__stop 0
+
+#endif
+
+/*
+ * R_EXT_DMA_1_STAT
+ * - type: RO
+ * - addr: 0xb0000018
+ * - group: External DMA registers
+ */
+
+#if USE_GROUP__External_DMA_registers
+
+#define R_EXT_DMA_1_STAT__ADDR (REG_TYPECAST_UDWORD 0xb0000018)
+#define R_EXT_DMA_1_STAT__SVAL REG_SVAL_SHADOW
+#define R_EXT_DMA_1_STAT__SVAL_I REG_SVAL_I_SHADOW
+#define R_EXT_DMA_1_STAT__TYPECAST REG_TYPECAST_UDWORD
+#define R_EXT_DMA_1_STAT__TYPE (REG_UDWORD)
+#define R_EXT_DMA_1_STAT__GET REG_GET_RO
+#define R_EXT_DMA_1_STAT__IGET REG_IGET_RO
+#define R_EXT_DMA_1_STAT__SET REG_SET_RO
+#define R_EXT_DMA_1_STAT__ISET REG_ISET_RO
+#define R_EXT_DMA_1_STAT__SET_VAL REG_SET_VAL_RO
+#define R_EXT_DMA_1_STAT__EQL REG_EQL_RO
+#define R_EXT_DMA_1_STAT__IEQL REG_IEQL_RO
+#define R_EXT_DMA_1_STAT__RD REG_RD_RO
+#define R_EXT_DMA_1_STAT__IRD REG_IRD_RO
+#define R_EXT_DMA_1_STAT__WR REG_WR_RO
+#define R_EXT_DMA_1_STAT__IWR REG_IWR_RO
+
+#define R_EXT_DMA_1_STAT__READ(addr) \
+ (*(addr))
+
+#define R_EXT_DMA_1_STAT__run__run__MASK 0x00010000U
+#define R_EXT_DMA_1_STAT__trf_count__trf_count__MASK 0x0000ffffU
+
+#define R_EXT_DMA_1_STAT__run__MAX 0x1
+#define R_EXT_DMA_1_STAT__trf_count__MAX 0xffff
+
+#define R_EXT_DMA_1_STAT__run__MIN 0
+#define R_EXT_DMA_1_STAT__trf_count__MIN 0
+
+#define R_EXT_DMA_1_STAT__run__BITNR 16
+#define R_EXT_DMA_1_STAT__trf_count__BITNR 0
+
+#define R_EXT_DMA_1_STAT__run__run__VAL REG_VAL_ENUM
+#define R_EXT_DMA_1_STAT__trf_count__trf_count__VAL REG_VAL_VAL
+
+#define R_EXT_DMA_1_STAT__run__run__start 1
+#define R_EXT_DMA_1_STAT__run__run__stop 0
+
+#endif
+
+/*
+ * R_GEN_CONFIG
+ * - type: WO
+ * - addr: 0xb000002c
+ * - group: General config registers
+ */
+
+#if USE_GROUP__General_config_registers
+
+#define R_GEN_CONFIG__ADDR (REG_TYPECAST_UDWORD 0xb000002c)
+
+#ifndef REG_NO_SHADOW
+#define R_GEN_CONFIG__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_GEN_CONFIG + 0))
+#define R_GEN_CONFIG__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_GEN_CONFIG + 0))
+#else /* REG_NO_SHADOW */
+#define R_GEN_CONFIG__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_GEN_CONFIG__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_GEN_CONFIG__STYPECAST REG_STYPECAST_UDWORD
+#define R_GEN_CONFIG__SVAL REG_SVAL_SHADOW
+#define R_GEN_CONFIG__SVAL_I REG_SVAL_I_SHADOW
+#define R_GEN_CONFIG__TYPECAST REG_TYPECAST_UDWORD
+#define R_GEN_CONFIG__TYPE (REG_UDWORD)
+#define R_GEN_CONFIG__GET REG_GET_WO
+#define R_GEN_CONFIG__IGET REG_IGET_WO
+#define R_GEN_CONFIG__SET REG_SET_WO
+#define R_GEN_CONFIG__ISET REG_ISET_WO
+#define R_GEN_CONFIG__SET_VAL REG_SET_VAL_WO
+#define R_GEN_CONFIG__EQL REG_EQL_WO
+#define R_GEN_CONFIG__IEQL REG_IEQL_WO
+#define R_GEN_CONFIG__RD REG_RD_WO
+#define R_GEN_CONFIG__IRD REG_IRD_WO
+#define R_GEN_CONFIG__WR REG_WR_WO
+#define R_GEN_CONFIG__IWR REG_IWR_WO
+
+#define R_GEN_CONFIG__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_GEN_CONFIG__par_w__par_w__MASK 0x80000000U
+#define R_GEN_CONFIG__usb2__usb2__MASK 0x40000000U
+#define R_GEN_CONFIG__usb1__usb1__MASK 0x20000000U
+#define R_GEN_CONFIG__g24dir__g24dir__MASK 0x08000000U
+#define R_GEN_CONFIG__g16_23dir__g16_23dir__MASK 0x04000000U
+#define R_GEN_CONFIG__g16_20dir__g16_20dir__MASK 0x04000000U
+#define R_GEN_CONFIG__g16_23dir__g16_20dir__MASK 0x04000000U
+#define R_GEN_CONFIG__g8_15dir__g8_15dir__MASK 0x02000000U
+#define R_GEN_CONFIG__g0dir__g0dir__MASK 0x01000000U
+#define R_GEN_CONFIG__dma9__dma9__MASK 0x00800000U
+#define R_GEN_CONFIG__dma8__dma8__MASK 0x00400000U
+#define R_GEN_CONFIG__dma7__dma7__MASK 0x00300000U
+#define R_GEN_CONFIG__dma6__dma6__MASK 0x000c0000U
+#define R_GEN_CONFIG__dma5__dma5__MASK 0x00030000U
+#define R_GEN_CONFIG__dma4__dma4__MASK 0x0000c000U
+#define R_GEN_CONFIG__dma3__dma3__MASK 0x00003000U
+#define R_GEN_CONFIG__dma2__dma2__MASK 0x00000c00U
+#define R_GEN_CONFIG__mio_w__mio_w__MASK 0x00000200U
+#define R_GEN_CONFIG__ser3__ser3__MASK 0x00000100U
+#define R_GEN_CONFIG__par1__par1__MASK 0x00000080U
+#define R_GEN_CONFIG__scsi0w__scsi0w__MASK 0x00000040U
+#define R_GEN_CONFIG__scsi1__scsi1__MASK 0x00000020U
+#define R_GEN_CONFIG__mio__mio__MASK 0x00000010U
+#define R_GEN_CONFIG__ser2__ser2__MASK 0x00000008U
+#define R_GEN_CONFIG__par0__par0__MASK 0x00000004U
+#define R_GEN_CONFIG__ata__ata__MASK 0x00000002U
+#define R_GEN_CONFIG__scsi0__scsi0__MASK 0x00000001U
+
+#define R_GEN_CONFIG__par_w__MAX 0x1
+#define R_GEN_CONFIG__usb2__MAX 0x1
+#define R_GEN_CONFIG__usb1__MAX 0x1
+#define R_GEN_CONFIG__g24dir__MAX 0x1
+#define R_GEN_CONFIG__g16_23dir__MAX 0x1
+#define R_GEN_CONFIG__g16_20dir__MAX 0x1
+#define R_GEN_CONFIG__g8_15dir__MAX 0x1
+#define R_GEN_CONFIG__g0dir__MAX 0x1
+#define R_GEN_CONFIG__dma9__MAX 0x1
+#define R_GEN_CONFIG__dma8__MAX 0x1
+#define R_GEN_CONFIG__dma7__MAX 0x3
+#define R_GEN_CONFIG__dma6__MAX 0x3
+#define R_GEN_CONFIG__dma5__MAX 0x3
+#define R_GEN_CONFIG__dma4__MAX 0x3
+#define R_GEN_CONFIG__dma3__MAX 0x3
+#define R_GEN_CONFIG__dma2__MAX 0x3
+#define R_GEN_CONFIG__mio_w__MAX 0x1
+#define R_GEN_CONFIG__ser3__MAX 0x1
+#define R_GEN_CONFIG__par1__MAX 0x1
+#define R_GEN_CONFIG__scsi0w__MAX 0x1
+#define R_GEN_CONFIG__scsi1__MAX 0x1
+#define R_GEN_CONFIG__mio__MAX 0x1
+#define R_GEN_CONFIG__ser2__MAX 0x1
+#define R_GEN_CONFIG__par0__MAX 0x1
+#define R_GEN_CONFIG__ata__MAX 0x1
+#define R_GEN_CONFIG__scsi0__MAX 0x1
+
+#define R_GEN_CONFIG__par_w__MIN 0
+#define R_GEN_CONFIG__usb2__MIN 0
+#define R_GEN_CONFIG__usb1__MIN 0
+#define R_GEN_CONFIG__g24dir__MIN 0
+#define R_GEN_CONFIG__g16_23dir__MIN 0
+#define R_GEN_CONFIG__g16_20dir__MIN 0
+#define R_GEN_CONFIG__g8_15dir__MIN 0
+#define R_GEN_CONFIG__g0dir__MIN 0
+#define R_GEN_CONFIG__dma9__MIN 0
+#define R_GEN_CONFIG__dma8__MIN 0
+#define R_GEN_CONFIG__dma7__MIN 0
+#define R_GEN_CONFIG__dma6__MIN 0
+#define R_GEN_CONFIG__dma5__MIN 0
+#define R_GEN_CONFIG__dma4__MIN 0
+#define R_GEN_CONFIG__dma3__MIN 0
+#define R_GEN_CONFIG__dma2__MIN 0
+#define R_GEN_CONFIG__mio_w__MIN 0
+#define R_GEN_CONFIG__ser3__MIN 0
+#define R_GEN_CONFIG__par1__MIN 0
+#define R_GEN_CONFIG__scsi0w__MIN 0
+#define R_GEN_CONFIG__scsi1__MIN 0
+#define R_GEN_CONFIG__mio__MIN 0
+#define R_GEN_CONFIG__ser2__MIN 0
+#define R_GEN_CONFIG__par0__MIN 0
+#define R_GEN_CONFIG__ata__MIN 0
+#define R_GEN_CONFIG__scsi0__MIN 0
+
+#define R_GEN_CONFIG__par_w__BITNR 31
+#define R_GEN_CONFIG__usb2__BITNR 30
+#define R_GEN_CONFIG__usb1__BITNR 29
+#define R_GEN_CONFIG__g24dir__BITNR 27
+#define R_GEN_CONFIG__g16_23dir__BITNR 26
+#define R_GEN_CONFIG__g16_20dir__BITNR 26
+#define R_GEN_CONFIG__g8_15dir__BITNR 25
+#define R_GEN_CONFIG__g0dir__BITNR 24
+#define R_GEN_CONFIG__dma9__BITNR 23
+#define R_GEN_CONFIG__dma8__BITNR 22
+#define R_GEN_CONFIG__dma7__BITNR 20
+#define R_GEN_CONFIG__dma6__BITNR 18
+#define R_GEN_CONFIG__dma5__BITNR 16
+#define R_GEN_CONFIG__dma4__BITNR 14
+#define R_GEN_CONFIG__dma3__BITNR 12
+#define R_GEN_CONFIG__dma2__BITNR 10
+#define R_GEN_CONFIG__mio_w__BITNR 9
+#define R_GEN_CONFIG__ser3__BITNR 8
+#define R_GEN_CONFIG__par1__BITNR 7
+#define R_GEN_CONFIG__scsi0w__BITNR 6
+#define R_GEN_CONFIG__scsi1__BITNR 5
+#define R_GEN_CONFIG__mio__BITNR 4
+#define R_GEN_CONFIG__ser2__BITNR 3
+#define R_GEN_CONFIG__par0__BITNR 2
+#define R_GEN_CONFIG__ata__BITNR 1
+#define R_GEN_CONFIG__scsi0__BITNR 0
+
+#define R_GEN_CONFIG__par_w__par_w__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__usb2__usb2__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__usb1__usb1__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__g24dir__g24dir__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__g16_23dir__g16_23dir__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__g16_20dir__g16_20dir__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__g16_23dir__g16_20dir__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__g8_15dir__g8_15dir__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__g0dir__g0dir__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__dma9__dma9__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__dma8__dma8__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__dma7__dma7__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__dma6__dma6__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__dma5__dma5__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__dma4__dma4__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__dma3__dma3__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__dma2__dma2__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__mio_w__mio_w__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__ser3__ser3__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__par1__par1__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__scsi0w__scsi0w__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__scsi1__scsi1__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__mio__mio__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__ser2__ser2__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__par0__par0__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__ata__ata__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG__scsi0__scsi0__VAL REG_VAL_ENUM
+
+#define R_GEN_CONFIG__par_w__par_w__disable 0
+#define R_GEN_CONFIG__par_w__par_w__select 1
+#define R_GEN_CONFIG__usb2__usb2__disable 0
+#define R_GEN_CONFIG__usb2__usb2__select 1
+#define R_GEN_CONFIG__usb1__usb1__disable 0
+#define R_GEN_CONFIG__usb1__usb1__select 1
+#define R_GEN_CONFIG__g24dir__g24dir__in 0
+#define R_GEN_CONFIG__g24dir__g24dir__out 1
+#define R_GEN_CONFIG__g16_23dir__g16_23dir__in 0
+#define R_GEN_CONFIG__g16_23dir__g16_23dir__out 1
+#define R_GEN_CONFIG__g16_20dir__g16_20dir__in 0
+#define R_GEN_CONFIG__g16_20dir__g16_20dir__out 1
+#define R_GEN_CONFIG__g8_15dir__g8_15dir__in 0
+#define R_GEN_CONFIG__g8_15dir__g8_15dir__out 1
+#define R_GEN_CONFIG__g0dir__g0dir__in 0
+#define R_GEN_CONFIG__g0dir__g0dir__out 1
+#define R_GEN_CONFIG__dma9__dma9__serial1 1
+#define R_GEN_CONFIG__dma9__dma9__usb 0
+#define R_GEN_CONFIG__dma8__dma8__serial1 1
+#define R_GEN_CONFIG__dma8__dma8__usb 0
+#define R_GEN_CONFIG__dma7__dma7__extdma1 2
+#define R_GEN_CONFIG__dma7__dma7__intdma6 3
+#define R_GEN_CONFIG__dma7__dma7__serial0 1
+#define R_GEN_CONFIG__dma7__dma7__unused 0
+#define R_GEN_CONFIG__dma6__dma6__extdma1 2
+#define R_GEN_CONFIG__dma6__dma6__intdma7 3
+#define R_GEN_CONFIG__dma6__dma6__serial0 1
+#define R_GEN_CONFIG__dma6__dma6__unused 0
+#define R_GEN_CONFIG__dma5__dma5__extdma0 3
+#define R_GEN_CONFIG__dma5__dma5__par1 0
+#define R_GEN_CONFIG__dma5__dma5__scsi1 1
+#define R_GEN_CONFIG__dma5__dma5__serial3 2
+#define R_GEN_CONFIG__dma4__dma4__extdma0 3
+#define R_GEN_CONFIG__dma4__dma4__par1 0
+#define R_GEN_CONFIG__dma4__dma4__scsi1 1
+#define R_GEN_CONFIG__dma4__dma4__serial3 2
+#define R_GEN_CONFIG__dma3__dma3__ata 3
+#define R_GEN_CONFIG__dma3__dma3__par0 0
+#define R_GEN_CONFIG__dma3__dma3__scsi0 1
+#define R_GEN_CONFIG__dma3__dma3__serial2 2
+#define R_GEN_CONFIG__dma2__dma2__ata 3
+#define R_GEN_CONFIG__dma2__dma2__par0 0
+#define R_GEN_CONFIG__dma2__dma2__scsi0 1
+#define R_GEN_CONFIG__dma2__dma2__serial2 2
+#define R_GEN_CONFIG__mio_w__mio_w__disable 0
+#define R_GEN_CONFIG__mio_w__mio_w__select 1
+#define R_GEN_CONFIG__ser3__ser3__disable 0
+#define R_GEN_CONFIG__ser3__ser3__select 1
+#define R_GEN_CONFIG__par1__par1__disable 0
+#define R_GEN_CONFIG__par1__par1__select 1
+#define R_GEN_CONFIG__scsi0w__scsi0w__disable 0
+#define R_GEN_CONFIG__scsi0w__scsi0w__select 1
+#define R_GEN_CONFIG__scsi1__scsi1__disable 0
+#define R_GEN_CONFIG__scsi1__scsi1__select 1
+#define R_GEN_CONFIG__mio__mio__disable 0
+#define R_GEN_CONFIG__mio__mio__select 1
+#define R_GEN_CONFIG__ser2__ser2__disable 0
+#define R_GEN_CONFIG__ser2__ser2__select 1
+#define R_GEN_CONFIG__par0__par0__disable 0
+#define R_GEN_CONFIG__par0__par0__select 1
+#define R_GEN_CONFIG__ata__ata__disable 0
+#define R_GEN_CONFIG__ata__ata__select 1
+#define R_GEN_CONFIG__scsi0__scsi0__disable 0
+#define R_GEN_CONFIG__scsi0__scsi0__select 1
+
+#endif
+
+/*
+ * R_GEN_CONFIG_II
+ * - type: WO
+ * - addr: 0xb0000034
+ * - group: General config registers
+ */
+
+#if USE_GROUP__General_config_registers
+
+#define R_GEN_CONFIG_II__ADDR (REG_TYPECAST_UDWORD 0xb0000034)
+
+#ifndef REG_NO_SHADOW
+#define R_GEN_CONFIG_II__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_GEN_CONFIG_II + 0))
+#define R_GEN_CONFIG_II__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_GEN_CONFIG_II + 0))
+#else /* REG_NO_SHADOW */
+#define R_GEN_CONFIG_II__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_GEN_CONFIG_II__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_GEN_CONFIG_II__STYPECAST REG_STYPECAST_UDWORD
+#define R_GEN_CONFIG_II__SVAL REG_SVAL_SHADOW
+#define R_GEN_CONFIG_II__SVAL_I REG_SVAL_I_SHADOW
+#define R_GEN_CONFIG_II__TYPECAST REG_TYPECAST_UDWORD
+#define R_GEN_CONFIG_II__TYPE (REG_UDWORD)
+#define R_GEN_CONFIG_II__GET REG_GET_WO
+#define R_GEN_CONFIG_II__IGET REG_IGET_WO
+#define R_GEN_CONFIG_II__SET REG_SET_WO
+#define R_GEN_CONFIG_II__ISET REG_ISET_WO
+#define R_GEN_CONFIG_II__SET_VAL REG_SET_VAL_WO
+#define R_GEN_CONFIG_II__EQL REG_EQL_WO
+#define R_GEN_CONFIG_II__IEQL REG_IEQL_WO
+#define R_GEN_CONFIG_II__RD REG_RD_WO
+#define R_GEN_CONFIG_II__IRD REG_IRD_WO
+#define R_GEN_CONFIG_II__WR REG_WR_WO
+#define R_GEN_CONFIG_II__IWR REG_IWR_WO
+
+#define R_GEN_CONFIG_II__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_GEN_CONFIG_II__sermode3__sermode3__MASK 0x00000040U
+#define R_GEN_CONFIG_II__sermode1__sermode1__MASK 0x00000010U
+#define R_GEN_CONFIG_II__ext_clk__ext_clk__MASK 0x00000004U
+#define R_GEN_CONFIG_II__ser3__ser3__MASK 0x00000002U
+#define R_GEN_CONFIG_II__ser2__ser2__MASK 0x00000001U
+
+#define R_GEN_CONFIG_II__sermode3__MAX 0x1
+#define R_GEN_CONFIG_II__sermode1__MAX 0x1
+#define R_GEN_CONFIG_II__ext_clk__MAX 0x1
+#define R_GEN_CONFIG_II__ser3__MAX 0x1
+#define R_GEN_CONFIG_II__ser2__MAX 0x1
+
+#define R_GEN_CONFIG_II__sermode3__MIN 0
+#define R_GEN_CONFIG_II__sermode1__MIN 0
+#define R_GEN_CONFIG_II__ext_clk__MIN 0
+#define R_GEN_CONFIG_II__ser3__MIN 0
+#define R_GEN_CONFIG_II__ser2__MIN 0
+
+#define R_GEN_CONFIG_II__sermode3__BITNR 6
+#define R_GEN_CONFIG_II__sermode1__BITNR 4
+#define R_GEN_CONFIG_II__ext_clk__BITNR 2
+#define R_GEN_CONFIG_II__ser3__BITNR 1
+#define R_GEN_CONFIG_II__ser2__BITNR 0
+
+#define R_GEN_CONFIG_II__sermode3__sermode3__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG_II__sermode1__sermode1__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG_II__ext_clk__ext_clk__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG_II__ser3__ser3__VAL REG_VAL_ENUM
+#define R_GEN_CONFIG_II__ser2__ser2__VAL REG_VAL_ENUM
+
+#define R_GEN_CONFIG_II__sermode3__sermode3__async 0
+#define R_GEN_CONFIG_II__sermode3__sermode3__sync 1
+#define R_GEN_CONFIG_II__sermode1__sermode1__async 0
+#define R_GEN_CONFIG_II__sermode1__sermode1__sync 1
+#define R_GEN_CONFIG_II__ext_clk__ext_clk__disable 0
+#define R_GEN_CONFIG_II__ext_clk__ext_clk__select 1
+#define R_GEN_CONFIG_II__ser3__ser3__disable 0
+#define R_GEN_CONFIG_II__ser3__ser3__select 1
+#define R_GEN_CONFIG_II__ser2__ser2__disable 0
+#define R_GEN_CONFIG_II__ser2__ser2__select 1
+
+#endif
+
+/*
+ * R_IRQ_MASK0_CLR
+ * - type: WO
+ * - addr: 0xb00000c0
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+#define R_IRQ_MASK0_CLR__ADDR (REG_TYPECAST_UDWORD 0xb00000c0)
+
+#ifndef REG_NO_SHADOW
+#define R_IRQ_MASK0_CLR__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_IRQ_MASK0_CLR + 0))
+#define R_IRQ_MASK0_CLR__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_IRQ_MASK0_CLR + 0))
+#else /* REG_NO_SHADOW */
+#define R_IRQ_MASK0_CLR__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_IRQ_MASK0_CLR__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_IRQ_MASK0_CLR__STYPECAST REG_STYPECAST_UDWORD
+#define R_IRQ_MASK0_CLR__SVAL REG_SVAL_ZERO
+#define R_IRQ_MASK0_CLR__SVAL_I REG_SVAL_I_ZERO
+#define R_IRQ_MASK0_CLR__TYPECAST REG_TYPECAST_UDWORD
+#define R_IRQ_MASK0_CLR__TYPE (REG_UDWORD)
+#define R_IRQ_MASK0_CLR__GET REG_GET_WO
+#define R_IRQ_MASK0_CLR__IGET REG_IGET_WO
+#define R_IRQ_MASK0_CLR__SET REG_SET_WO
+#define R_IRQ_MASK0_CLR__ISET REG_ISET_WO
+#define R_IRQ_MASK0_CLR__SET_VAL REG_SET_VAL_WO
+#define R_IRQ_MASK0_CLR__EQL REG_EQL_WO
+#define R_IRQ_MASK0_CLR__IEQL REG_IEQL_WO
+#define R_IRQ_MASK0_CLR__RD REG_RD_WO
+#define R_IRQ_MASK0_CLR__IRD REG_IRD_WO
+#define R_IRQ_MASK0_CLR__WR REG_WR_WO
+#define R_IRQ_MASK0_CLR__IWR REG_IWR_WO
+
+#define R_IRQ_MASK0_CLR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_IRQ_MASK0_CLR__nmi_pin__nmi_pin__MASK 0x80000000U
+#define R_IRQ_MASK0_CLR__watchdog_nmi__watchdog_nmi__MASK 0x40000000U
+#define R_IRQ_MASK0_CLR__sqe_test_error__sqe_test_error__MASK 0x20000000U
+#define R_IRQ_MASK0_CLR__carrier_loss__carrier_loss__MASK 0x10000000U
+#define R_IRQ_MASK0_CLR__deferred__deferred__MASK 0x08000000U
+#define R_IRQ_MASK0_CLR__late_col__late_col__MASK 0x04000000U
+#define R_IRQ_MASK0_CLR__multiple_col__multiple_col__MASK 0x02000000U
+#define R_IRQ_MASK0_CLR__single_col__single_col__MASK 0x01000000U
+#define R_IRQ_MASK0_CLR__congestion__congestion__MASK 0x00800000U
+#define R_IRQ_MASK0_CLR__oversize__oversize__MASK 0x00400000U
+#define R_IRQ_MASK0_CLR__alignment_error__alignment_error__MASK 0x00200000U
+#define R_IRQ_MASK0_CLR__crc_error__crc_error__MASK 0x00100000U
+#define R_IRQ_MASK0_CLR__overrun__overrun__MASK 0x00080000U
+#define R_IRQ_MASK0_CLR__underrun__underrun__MASK 0x00040000U
+#define R_IRQ_MASK0_CLR__excessive_col__excessive_col__MASK 0x00020000U
+#define R_IRQ_MASK0_CLR__mdio__mdio__MASK 0x00010000U
+#define R_IRQ_MASK0_CLR__ata_drq3__ata_drq3__MASK 0x00008000U
+#define R_IRQ_MASK0_CLR__ata_drq2__ata_drq2__MASK 0x00004000U
+#define R_IRQ_MASK0_CLR__ata_drq1__ata_drq1__MASK 0x00002000U
+#define R_IRQ_MASK0_CLR__ata_drq0__ata_drq0__MASK 0x00001000U
+#define R_IRQ_MASK0_CLR__par0_ecp_cmd__par0_ecp_cmd__MASK 0x00000800U
+#define R_IRQ_MASK0_CLR__ata_irq3__ata_irq3__MASK 0x00000800U
+#define R_IRQ_MASK0_CLR__par0_ecp_cmd__ata_irq3__MASK 0x00000800U
+#define R_IRQ_MASK0_CLR__par0_peri__par0_peri__MASK 0x00000400U
+#define R_IRQ_MASK0_CLR__ata_irq2__ata_irq2__MASK 0x00000400U
+#define R_IRQ_MASK0_CLR__par0_peri__ata_irq2__MASK 0x00000400U
+#define R_IRQ_MASK0_CLR__par0_data__par0_data__MASK 0x00000200U
+#define R_IRQ_MASK0_CLR__ata_irq1__ata_irq1__MASK 0x00000200U
+#define R_IRQ_MASK0_CLR__par0_data__ata_irq1__MASK 0x00000200U
+#define R_IRQ_MASK0_CLR__par0_ready__par0_ready__MASK 0x00000100U
+#define R_IRQ_MASK0_CLR__ata_irq0__ata_irq0__MASK 0x00000100U
+#define R_IRQ_MASK0_CLR__par0_ready__ata_irq0__MASK 0x00000100U
+#define R_IRQ_MASK0_CLR__mio__mio__MASK 0x00000100U
+#define R_IRQ_MASK0_CLR__par0_ready__mio__MASK 0x00000100U
+#define R_IRQ_MASK0_CLR__scsi0__scsi0__MASK 0x00000100U
+#define R_IRQ_MASK0_CLR__par0_ready__scsi0__MASK 0x00000100U
+#define R_IRQ_MASK0_CLR__ata_dmaend__ata_dmaend__MASK 0x00000080U
+#define R_IRQ_MASK0_CLR__irq_ext_vector_nr__irq_ext_vector_nr__MASK 0x00000020U
+#define R_IRQ_MASK0_CLR__irq_int_vector_nr__irq_int_vector_nr__MASK 0x00000010U
+#define R_IRQ_MASK0_CLR__ext_dma1__ext_dma1__MASK 0x00000008U
+#define R_IRQ_MASK0_CLR__ext_dma0__ext_dma0__MASK 0x00000004U
+#define R_IRQ_MASK0_CLR__timer1__timer1__MASK 0x00000002U
+#define R_IRQ_MASK0_CLR__timer0__timer0__MASK 0x00000001U
+
+#define R_IRQ_MASK0_CLR__nmi_pin__MAX 0x1
+#define R_IRQ_MASK0_CLR__watchdog_nmi__MAX 0x1
+#define R_IRQ_MASK0_CLR__sqe_test_error__MAX 0x1
+#define R_IRQ_MASK0_CLR__carrier_loss__MAX 0x1
+#define R_IRQ_MASK0_CLR__deferred__MAX 0x1
+#define R_IRQ_MASK0_CLR__late_col__MAX 0x1
+#define R_IRQ_MASK0_CLR__multiple_col__MAX 0x1
+#define R_IRQ_MASK0_CLR__single_col__MAX 0x1
+#define R_IRQ_MASK0_CLR__congestion__MAX 0x1
+#define R_IRQ_MASK0_CLR__oversize__MAX 0x1
+#define R_IRQ_MASK0_CLR__alignment_error__MAX 0x1
+#define R_IRQ_MASK0_CLR__crc_error__MAX 0x1
+#define R_IRQ_MASK0_CLR__overrun__MAX 0x1
+#define R_IRQ_MASK0_CLR__underrun__MAX 0x1
+#define R_IRQ_MASK0_CLR__excessive_col__MAX 0x1
+#define R_IRQ_MASK0_CLR__mdio__MAX 0x1
+#define R_IRQ_MASK0_CLR__ata_drq3__MAX 0x1
+#define R_IRQ_MASK0_CLR__ata_drq2__MAX 0x1
+#define R_IRQ_MASK0_CLR__ata_drq1__MAX 0x1
+#define R_IRQ_MASK0_CLR__ata_drq0__MAX 0x1
+#define R_IRQ_MASK0_CLR__par0_ecp_cmd__MAX 0x1
+#define R_IRQ_MASK0_CLR__ata_irq3__MAX 0x1
+#define R_IRQ_MASK0_CLR__par0_peri__MAX 0x1
+#define R_IRQ_MASK0_CLR__ata_irq2__MAX 0x1
+#define R_IRQ_MASK0_CLR__par0_data__MAX 0x1
+#define R_IRQ_MASK0_CLR__ata_irq1__MAX 0x1
+#define R_IRQ_MASK0_CLR__par0_ready__MAX 0x1
+#define R_IRQ_MASK0_CLR__ata_irq0__MAX 0x1
+#define R_IRQ_MASK0_CLR__mio__MAX 0x1
+#define R_IRQ_MASK0_CLR__scsi0__MAX 0x1
+#define R_IRQ_MASK0_CLR__ata_dmaend__MAX 0x1
+#define R_IRQ_MASK0_CLR__irq_ext_vector_nr__MAX 0x1
+#define R_IRQ_MASK0_CLR__irq_int_vector_nr__MAX 0x1
+#define R_IRQ_MASK0_CLR__ext_dma1__MAX 0x1
+#define R_IRQ_MASK0_CLR__ext_dma0__MAX 0x1
+#define R_IRQ_MASK0_CLR__timer1__MAX 0x1
+#define R_IRQ_MASK0_CLR__timer0__MAX 0x1
+
+#define R_IRQ_MASK0_CLR__nmi_pin__MIN 0
+#define R_IRQ_MASK0_CLR__watchdog_nmi__MIN 0
+#define R_IRQ_MASK0_CLR__sqe_test_error__MIN 0
+#define R_IRQ_MASK0_CLR__carrier_loss__MIN 0
+#define R_IRQ_MASK0_CLR__deferred__MIN 0
+#define R_IRQ_MASK0_CLR__late_col__MIN 0
+#define R_IRQ_MASK0_CLR__multiple_col__MIN 0
+#define R_IRQ_MASK0_CLR__single_col__MIN 0
+#define R_IRQ_MASK0_CLR__congestion__MIN 0
+#define R_IRQ_MASK0_CLR__oversize__MIN 0
+#define R_IRQ_MASK0_CLR__alignment_error__MIN 0
+#define R_IRQ_MASK0_CLR__crc_error__MIN 0
+#define R_IRQ_MASK0_CLR__overrun__MIN 0
+#define R_IRQ_MASK0_CLR__underrun__MIN 0
+#define R_IRQ_MASK0_CLR__excessive_col__MIN 0
+#define R_IRQ_MASK0_CLR__mdio__MIN 0
+#define R_IRQ_MASK0_CLR__ata_drq3__MIN 0
+#define R_IRQ_MASK0_CLR__ata_drq2__MIN 0
+#define R_IRQ_MASK0_CLR__ata_drq1__MIN 0
+#define R_IRQ_MASK0_CLR__ata_drq0__MIN 0
+#define R_IRQ_MASK0_CLR__par0_ecp_cmd__MIN 0
+#define R_IRQ_MASK0_CLR__ata_irq3__MIN 0
+#define R_IRQ_MASK0_CLR__par0_peri__MIN 0
+#define R_IRQ_MASK0_CLR__ata_irq2__MIN 0
+#define R_IRQ_MASK0_CLR__par0_data__MIN 0
+#define R_IRQ_MASK0_CLR__ata_irq1__MIN 0
+#define R_IRQ_MASK0_CLR__par0_ready__MIN 0
+#define R_IRQ_MASK0_CLR__ata_irq0__MIN 0
+#define R_IRQ_MASK0_CLR__mio__MIN 0
+#define R_IRQ_MASK0_CLR__scsi0__MIN 0
+#define R_IRQ_MASK0_CLR__ata_dmaend__MIN 0
+#define R_IRQ_MASK0_CLR__irq_ext_vector_nr__MIN 0
+#define R_IRQ_MASK0_CLR__irq_int_vector_nr__MIN 0
+#define R_IRQ_MASK0_CLR__ext_dma1__MIN 0
+#define R_IRQ_MASK0_CLR__ext_dma0__MIN 0
+#define R_IRQ_MASK0_CLR__timer1__MIN 0
+#define R_IRQ_MASK0_CLR__timer0__MIN 0
+
+#define R_IRQ_MASK0_CLR__nmi_pin__BITNR 31
+#define R_IRQ_MASK0_CLR__watchdog_nmi__BITNR 30
+#define R_IRQ_MASK0_CLR__sqe_test_error__BITNR 29
+#define R_IRQ_MASK0_CLR__carrier_loss__BITNR 28
+#define R_IRQ_MASK0_CLR__deferred__BITNR 27
+#define R_IRQ_MASK0_CLR__late_col__BITNR 26
+#define R_IRQ_MASK0_CLR__multiple_col__BITNR 25
+#define R_IRQ_MASK0_CLR__single_col__BITNR 24
+#define R_IRQ_MASK0_CLR__congestion__BITNR 23
+#define R_IRQ_MASK0_CLR__oversize__BITNR 22
+#define R_IRQ_MASK0_CLR__alignment_error__BITNR 21
+#define R_IRQ_MASK0_CLR__crc_error__BITNR 20
+#define R_IRQ_MASK0_CLR__overrun__BITNR 19
+#define R_IRQ_MASK0_CLR__underrun__BITNR 18
+#define R_IRQ_MASK0_CLR__excessive_col__BITNR 17
+#define R_IRQ_MASK0_CLR__mdio__BITNR 16
+#define R_IRQ_MASK0_CLR__ata_drq3__BITNR 15
+#define R_IRQ_MASK0_CLR__ata_drq2__BITNR 14
+#define R_IRQ_MASK0_CLR__ata_drq1__BITNR 13
+#define R_IRQ_MASK0_CLR__ata_drq0__BITNR 12
+#define R_IRQ_MASK0_CLR__par0_ecp_cmd__BITNR 11
+#define R_IRQ_MASK0_CLR__ata_irq3__BITNR 11
+#define R_IRQ_MASK0_CLR__par0_peri__BITNR 10
+#define R_IRQ_MASK0_CLR__ata_irq2__BITNR 10
+#define R_IRQ_MASK0_CLR__par0_data__BITNR 9
+#define R_IRQ_MASK0_CLR__ata_irq1__BITNR 9
+#define R_IRQ_MASK0_CLR__par0_ready__BITNR 8
+#define R_IRQ_MASK0_CLR__ata_irq0__BITNR 8
+#define R_IRQ_MASK0_CLR__mio__BITNR 8
+#define R_IRQ_MASK0_CLR__scsi0__BITNR 8
+#define R_IRQ_MASK0_CLR__ata_dmaend__BITNR 7
+#define R_IRQ_MASK0_CLR__irq_ext_vector_nr__BITNR 5
+#define R_IRQ_MASK0_CLR__irq_int_vector_nr__BITNR 4
+#define R_IRQ_MASK0_CLR__ext_dma1__BITNR 3
+#define R_IRQ_MASK0_CLR__ext_dma0__BITNR 2
+#define R_IRQ_MASK0_CLR__timer1__BITNR 1
+#define R_IRQ_MASK0_CLR__timer0__BITNR 0
+
+#define R_IRQ_MASK0_CLR__nmi_pin__nmi_pin__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__watchdog_nmi__watchdog_nmi__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__sqe_test_error__sqe_test_error__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__carrier_loss__carrier_loss__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__deferred__deferred__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__late_col__late_col__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__multiple_col__multiple_col__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__single_col__single_col__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__congestion__congestion__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__oversize__oversize__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__alignment_error__alignment_error__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__crc_error__crc_error__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__overrun__overrun__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__underrun__underrun__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__excessive_col__excessive_col__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__mdio__mdio__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__ata_drq3__ata_drq3__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__ata_drq2__ata_drq2__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__ata_drq1__ata_drq1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__ata_drq0__ata_drq0__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__par0_ecp_cmd__par0_ecp_cmd__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__ata_irq3__ata_irq3__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__par0_ecp_cmd__ata_irq3__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__par0_peri__par0_peri__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__ata_irq2__ata_irq2__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__par0_peri__ata_irq2__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__par0_data__par0_data__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__ata_irq1__ata_irq1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__par0_data__ata_irq1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__par0_ready__par0_ready__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__ata_irq0__ata_irq0__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__par0_ready__ata_irq0__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__mio__mio__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__par0_ready__mio__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__scsi0__scsi0__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__par0_ready__scsi0__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__ata_dmaend__ata_dmaend__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__irq_ext_vector_nr__irq_ext_vector_nr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__irq_int_vector_nr__irq_int_vector_nr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__ext_dma1__ext_dma1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__ext_dma0__ext_dma0__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__timer1__timer1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_CLR__timer0__timer0__VAL REG_VAL_ENUM
+
+#define R_IRQ_MASK0_CLR__nmi_pin__nmi_pin__clr 1
+#define R_IRQ_MASK0_CLR__nmi_pin__nmi_pin__nop 0
+#define R_IRQ_MASK0_CLR__watchdog_nmi__watchdog_nmi__clr 1
+#define R_IRQ_MASK0_CLR__watchdog_nmi__watchdog_nmi__nop 0
+#define R_IRQ_MASK0_CLR__sqe_test_error__sqe_test_error__clr 1
+#define R_IRQ_MASK0_CLR__sqe_test_error__sqe_test_error__nop 0
+#define R_IRQ_MASK0_CLR__carrier_loss__carrier_loss__clr 1
+#define R_IRQ_MASK0_CLR__carrier_loss__carrier_loss__nop 0
+#define R_IRQ_MASK0_CLR__deferred__deferred__clr 1
+#define R_IRQ_MASK0_CLR__deferred__deferred__nop 0
+#define R_IRQ_MASK0_CLR__late_col__late_col__clr 1
+#define R_IRQ_MASK0_CLR__late_col__late_col__nop 0
+#define R_IRQ_MASK0_CLR__multiple_col__multiple_col__clr 1
+#define R_IRQ_MASK0_CLR__multiple_col__multiple_col__nop 0
+#define R_IRQ_MASK0_CLR__single_col__single_col__clr 1
+#define R_IRQ_MASK0_CLR__single_col__single_col__nop 0
+#define R_IRQ_MASK0_CLR__congestion__congestion__clr 1
+#define R_IRQ_MASK0_CLR__congestion__congestion__nop 0
+#define R_IRQ_MASK0_CLR__oversize__oversize__clr 1
+#define R_IRQ_MASK0_CLR__oversize__oversize__nop 0
+#define R_IRQ_MASK0_CLR__alignment_error__alignment_error__clr 1
+#define R_IRQ_MASK0_CLR__alignment_error__alignment_error__nop 0
+#define R_IRQ_MASK0_CLR__crc_error__crc_error__clr 1
+#define R_IRQ_MASK0_CLR__crc_error__crc_error__nop 0
+#define R_IRQ_MASK0_CLR__overrun__overrun__clr 1
+#define R_IRQ_MASK0_CLR__overrun__overrun__nop 0
+#define R_IRQ_MASK0_CLR__underrun__underrun__clr 1
+#define R_IRQ_MASK0_CLR__underrun__underrun__nop 0
+#define R_IRQ_MASK0_CLR__excessive_col__excessive_col__clr 1
+#define R_IRQ_MASK0_CLR__excessive_col__excessive_col__nop 0
+#define R_IRQ_MASK0_CLR__mdio__mdio__clr 1
+#define R_IRQ_MASK0_CLR__mdio__mdio__nop 0
+#define R_IRQ_MASK0_CLR__ata_drq3__ata_drq3__clr 1
+#define R_IRQ_MASK0_CLR__ata_drq3__ata_drq3__nop 0
+#define R_IRQ_MASK0_CLR__ata_drq2__ata_drq2__clr 1
+#define R_IRQ_MASK0_CLR__ata_drq2__ata_drq2__nop 0
+#define R_IRQ_MASK0_CLR__ata_drq1__ata_drq1__clr 1
+#define R_IRQ_MASK0_CLR__ata_drq1__ata_drq1__nop 0
+#define R_IRQ_MASK0_CLR__ata_drq0__ata_drq0__clr 1
+#define R_IRQ_MASK0_CLR__ata_drq0__ata_drq0__nop 0
+#define R_IRQ_MASK0_CLR__par0_ecp_cmd__par0_ecp_cmd__clr 1
+#define R_IRQ_MASK0_CLR__par0_ecp_cmd__par0_ecp_cmd__nop 0
+#define R_IRQ_MASK0_CLR__ata_irq3__ata_irq3__clr 1
+#define R_IRQ_MASK0_CLR__ata_irq3__ata_irq3__nop 0
+#define R_IRQ_MASK0_CLR__par0_peri__par0_peri__clr 1
+#define R_IRQ_MASK0_CLR__par0_peri__par0_peri__nop 0
+#define R_IRQ_MASK0_CLR__ata_irq2__ata_irq2__clr 1
+#define R_IRQ_MASK0_CLR__ata_irq2__ata_irq2__nop 0
+#define R_IRQ_MASK0_CLR__par0_data__par0_data__clr 1
+#define R_IRQ_MASK0_CLR__par0_data__par0_data__nop 0
+#define R_IRQ_MASK0_CLR__ata_irq1__ata_irq1__clr 1
+#define R_IRQ_MASK0_CLR__ata_irq1__ata_irq1__nop 0
+#define R_IRQ_MASK0_CLR__par0_ready__par0_ready__clr 1
+#define R_IRQ_MASK0_CLR__par0_ready__par0_ready__nop 0
+#define R_IRQ_MASK0_CLR__ata_irq0__ata_irq0__clr 1
+#define R_IRQ_MASK0_CLR__ata_irq0__ata_irq0__nop 0
+#define R_IRQ_MASK0_CLR__mio__mio__clr 1
+#define R_IRQ_MASK0_CLR__mio__mio__nop 0
+#define R_IRQ_MASK0_CLR__scsi0__scsi0__clr 1
+#define R_IRQ_MASK0_CLR__scsi0__scsi0__nop 0
+#define R_IRQ_MASK0_CLR__ata_dmaend__ata_dmaend__clr 1
+#define R_IRQ_MASK0_CLR__ata_dmaend__ata_dmaend__nop 0
+#define R_IRQ_MASK0_CLR__irq_ext_vector_nr__irq_ext_vector_nr__clr 1
+#define R_IRQ_MASK0_CLR__irq_ext_vector_nr__irq_ext_vector_nr__nop 0
+#define R_IRQ_MASK0_CLR__irq_int_vector_nr__irq_int_vector_nr__clr 1
+#define R_IRQ_MASK0_CLR__irq_int_vector_nr__irq_int_vector_nr__nop 0
+#define R_IRQ_MASK0_CLR__ext_dma1__ext_dma1__clr 1
+#define R_IRQ_MASK0_CLR__ext_dma1__ext_dma1__nop 0
+#define R_IRQ_MASK0_CLR__ext_dma0__ext_dma0__clr 1
+#define R_IRQ_MASK0_CLR__ext_dma0__ext_dma0__nop 0
+#define R_IRQ_MASK0_CLR__timer1__timer1__clr 1
+#define R_IRQ_MASK0_CLR__timer1__timer1__nop 0
+#define R_IRQ_MASK0_CLR__timer0__timer0__clr 1
+#define R_IRQ_MASK0_CLR__timer0__timer0__nop 0
+
+#endif
+
+/*
+ * R_IRQ_MASK0_RD
+ * - type: RO
+ * - addr: 0xb00000c0
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+#define R_IRQ_MASK0_RD__ADDR (REG_TYPECAST_UDWORD 0xb00000c0)
+#define R_IRQ_MASK0_RD__SVAL REG_SVAL_SHADOW
+#define R_IRQ_MASK0_RD__SVAL_I REG_SVAL_I_SHADOW
+#define R_IRQ_MASK0_RD__TYPECAST REG_TYPECAST_UDWORD
+#define R_IRQ_MASK0_RD__TYPE (REG_UDWORD)
+#define R_IRQ_MASK0_RD__GET REG_GET_RO
+#define R_IRQ_MASK0_RD__IGET REG_IGET_RO
+#define R_IRQ_MASK0_RD__SET REG_SET_RO
+#define R_IRQ_MASK0_RD__ISET REG_ISET_RO
+#define R_IRQ_MASK0_RD__SET_VAL REG_SET_VAL_RO
+#define R_IRQ_MASK0_RD__EQL REG_EQL_RO
+#define R_IRQ_MASK0_RD__IEQL REG_IEQL_RO
+#define R_IRQ_MASK0_RD__RD REG_RD_RO
+#define R_IRQ_MASK0_RD__IRD REG_IRD_RO
+#define R_IRQ_MASK0_RD__WR REG_WR_RO
+#define R_IRQ_MASK0_RD__IWR REG_IWR_RO
+
+#define R_IRQ_MASK0_RD__READ(addr) \
+ (*(addr))
+
+#define R_IRQ_MASK0_RD__nmi_pin__nmi_pin__MASK 0x80000000U
+#define R_IRQ_MASK0_RD__watchdog_nmi__watchdog_nmi__MASK 0x40000000U
+#define R_IRQ_MASK0_RD__sqe_test_error__sqe_test_error__MASK 0x20000000U
+#define R_IRQ_MASK0_RD__carrier_loss__carrier_loss__MASK 0x10000000U
+#define R_IRQ_MASK0_RD__deferred__deferred__MASK 0x08000000U
+#define R_IRQ_MASK0_RD__late_col__late_col__MASK 0x04000000U
+#define R_IRQ_MASK0_RD__multiple_col__multiple_col__MASK 0x02000000U
+#define R_IRQ_MASK0_RD__single_col__single_col__MASK 0x01000000U
+#define R_IRQ_MASK0_RD__congestion__congestion__MASK 0x00800000U
+#define R_IRQ_MASK0_RD__oversize__oversize__MASK 0x00400000U
+#define R_IRQ_MASK0_RD__alignment_error__alignment_error__MASK 0x00200000U
+#define R_IRQ_MASK0_RD__crc_error__crc_error__MASK 0x00100000U
+#define R_IRQ_MASK0_RD__overrun__overrun__MASK 0x00080000U
+#define R_IRQ_MASK0_RD__underrun__underrun__MASK 0x00040000U
+#define R_IRQ_MASK0_RD__excessive_col__excessive_col__MASK 0x00020000U
+#define R_IRQ_MASK0_RD__mdio__mdio__MASK 0x00010000U
+#define R_IRQ_MASK0_RD__ata_drq3__ata_drq3__MASK 0x00008000U
+#define R_IRQ_MASK0_RD__ata_drq2__ata_drq2__MASK 0x00004000U
+#define R_IRQ_MASK0_RD__ata_drq1__ata_drq1__MASK 0x00002000U
+#define R_IRQ_MASK0_RD__ata_drq0__ata_drq0__MASK 0x00001000U
+#define R_IRQ_MASK0_RD__par0_ecp_cmd__par0_ecp_cmd__MASK 0x00000800U
+#define R_IRQ_MASK0_RD__ata_irq3__ata_irq3__MASK 0x00000800U
+#define R_IRQ_MASK0_RD__par0_ecp_cmd__ata_irq3__MASK 0x00000800U
+#define R_IRQ_MASK0_RD__par0_peri__par0_peri__MASK 0x00000400U
+#define R_IRQ_MASK0_RD__ata_irq2__ata_irq2__MASK 0x00000400U
+#define R_IRQ_MASK0_RD__par0_peri__ata_irq2__MASK 0x00000400U
+#define R_IRQ_MASK0_RD__par0_data__par0_data__MASK 0x00000200U
+#define R_IRQ_MASK0_RD__ata_irq1__ata_irq1__MASK 0x00000200U
+#define R_IRQ_MASK0_RD__par0_data__ata_irq1__MASK 0x00000200U
+#define R_IRQ_MASK0_RD__par0_ready__par0_ready__MASK 0x00000100U
+#define R_IRQ_MASK0_RD__ata_irq0__ata_irq0__MASK 0x00000100U
+#define R_IRQ_MASK0_RD__par0_ready__ata_irq0__MASK 0x00000100U
+#define R_IRQ_MASK0_RD__mio__mio__MASK 0x00000100U
+#define R_IRQ_MASK0_RD__par0_ready__mio__MASK 0x00000100U
+#define R_IRQ_MASK0_RD__scsi0__scsi0__MASK 0x00000100U
+#define R_IRQ_MASK0_RD__par0_ready__scsi0__MASK 0x00000100U
+#define R_IRQ_MASK0_RD__ata_dmaend__ata_dmaend__MASK 0x00000080U
+#define R_IRQ_MASK0_RD__irq_ext_vector_nr__irq_ext_vector_nr__MASK 0x00000020U
+#define R_IRQ_MASK0_RD__irq_int_vector_nr__irq_int_vector_nr__MASK 0x00000010U
+#define R_IRQ_MASK0_RD__ext_dma1__ext_dma1__MASK 0x00000008U
+#define R_IRQ_MASK0_RD__ext_dma0__ext_dma0__MASK 0x00000004U
+#define R_IRQ_MASK0_RD__timer1__timer1__MASK 0x00000002U
+#define R_IRQ_MASK0_RD__timer0__timer0__MASK 0x00000001U
+
+#define R_IRQ_MASK0_RD__nmi_pin__MAX 0x1
+#define R_IRQ_MASK0_RD__watchdog_nmi__MAX 0x1
+#define R_IRQ_MASK0_RD__sqe_test_error__MAX 0x1
+#define R_IRQ_MASK0_RD__carrier_loss__MAX 0x1
+#define R_IRQ_MASK0_RD__deferred__MAX 0x1
+#define R_IRQ_MASK0_RD__late_col__MAX 0x1
+#define R_IRQ_MASK0_RD__multiple_col__MAX 0x1
+#define R_IRQ_MASK0_RD__single_col__MAX 0x1
+#define R_IRQ_MASK0_RD__congestion__MAX 0x1
+#define R_IRQ_MASK0_RD__oversize__MAX 0x1
+#define R_IRQ_MASK0_RD__alignment_error__MAX 0x1
+#define R_IRQ_MASK0_RD__crc_error__MAX 0x1
+#define R_IRQ_MASK0_RD__overrun__MAX 0x1
+#define R_IRQ_MASK0_RD__underrun__MAX 0x1
+#define R_IRQ_MASK0_RD__excessive_col__MAX 0x1
+#define R_IRQ_MASK0_RD__mdio__MAX 0x1
+#define R_IRQ_MASK0_RD__ata_drq3__MAX 0x1
+#define R_IRQ_MASK0_RD__ata_drq2__MAX 0x1
+#define R_IRQ_MASK0_RD__ata_drq1__MAX 0x1
+#define R_IRQ_MASK0_RD__ata_drq0__MAX 0x1
+#define R_IRQ_MASK0_RD__par0_ecp_cmd__MAX 0x1
+#define R_IRQ_MASK0_RD__ata_irq3__MAX 0x1
+#define R_IRQ_MASK0_RD__par0_peri__MAX 0x1
+#define R_IRQ_MASK0_RD__ata_irq2__MAX 0x1
+#define R_IRQ_MASK0_RD__par0_data__MAX 0x1
+#define R_IRQ_MASK0_RD__ata_irq1__MAX 0x1
+#define R_IRQ_MASK0_RD__par0_ready__MAX 0x1
+#define R_IRQ_MASK0_RD__ata_irq0__MAX 0x1
+#define R_IRQ_MASK0_RD__mio__MAX 0x1
+#define R_IRQ_MASK0_RD__scsi0__MAX 0x1
+#define R_IRQ_MASK0_RD__ata_dmaend__MAX 0x1
+#define R_IRQ_MASK0_RD__irq_ext_vector_nr__MAX 0x1
+#define R_IRQ_MASK0_RD__irq_int_vector_nr__MAX 0x1
+#define R_IRQ_MASK0_RD__ext_dma1__MAX 0x1
+#define R_IRQ_MASK0_RD__ext_dma0__MAX 0x1
+#define R_IRQ_MASK0_RD__timer1__MAX 0x1
+#define R_IRQ_MASK0_RD__timer0__MAX 0x1
+
+#define R_IRQ_MASK0_RD__nmi_pin__MIN 0
+#define R_IRQ_MASK0_RD__watchdog_nmi__MIN 0
+#define R_IRQ_MASK0_RD__sqe_test_error__MIN 0
+#define R_IRQ_MASK0_RD__carrier_loss__MIN 0
+#define R_IRQ_MASK0_RD__deferred__MIN 0
+#define R_IRQ_MASK0_RD__late_col__MIN 0
+#define R_IRQ_MASK0_RD__multiple_col__MIN 0
+#define R_IRQ_MASK0_RD__single_col__MIN 0
+#define R_IRQ_MASK0_RD__congestion__MIN 0
+#define R_IRQ_MASK0_RD__oversize__MIN 0
+#define R_IRQ_MASK0_RD__alignment_error__MIN 0
+#define R_IRQ_MASK0_RD__crc_error__MIN 0
+#define R_IRQ_MASK0_RD__overrun__MIN 0
+#define R_IRQ_MASK0_RD__underrun__MIN 0
+#define R_IRQ_MASK0_RD__excessive_col__MIN 0
+#define R_IRQ_MASK0_RD__mdio__MIN 0
+#define R_IRQ_MASK0_RD__ata_drq3__MIN 0
+#define R_IRQ_MASK0_RD__ata_drq2__MIN 0
+#define R_IRQ_MASK0_RD__ata_drq1__MIN 0
+#define R_IRQ_MASK0_RD__ata_drq0__MIN 0
+#define R_IRQ_MASK0_RD__par0_ecp_cmd__MIN 0
+#define R_IRQ_MASK0_RD__ata_irq3__MIN 0
+#define R_IRQ_MASK0_RD__par0_peri__MIN 0
+#define R_IRQ_MASK0_RD__ata_irq2__MIN 0
+#define R_IRQ_MASK0_RD__par0_data__MIN 0
+#define R_IRQ_MASK0_RD__ata_irq1__MIN 0
+#define R_IRQ_MASK0_RD__par0_ready__MIN 0
+#define R_IRQ_MASK0_RD__ata_irq0__MIN 0
+#define R_IRQ_MASK0_RD__mio__MIN 0
+#define R_IRQ_MASK0_RD__scsi0__MIN 0
+#define R_IRQ_MASK0_RD__ata_dmaend__MIN 0
+#define R_IRQ_MASK0_RD__irq_ext_vector_nr__MIN 0
+#define R_IRQ_MASK0_RD__irq_int_vector_nr__MIN 0
+#define R_IRQ_MASK0_RD__ext_dma1__MIN 0
+#define R_IRQ_MASK0_RD__ext_dma0__MIN 0
+#define R_IRQ_MASK0_RD__timer1__MIN 0
+#define R_IRQ_MASK0_RD__timer0__MIN 0
+
+#define R_IRQ_MASK0_RD__nmi_pin__BITNR 31
+#define R_IRQ_MASK0_RD__watchdog_nmi__BITNR 30
+#define R_IRQ_MASK0_RD__sqe_test_error__BITNR 29
+#define R_IRQ_MASK0_RD__carrier_loss__BITNR 28
+#define R_IRQ_MASK0_RD__deferred__BITNR 27
+#define R_IRQ_MASK0_RD__late_col__BITNR 26
+#define R_IRQ_MASK0_RD__multiple_col__BITNR 25
+#define R_IRQ_MASK0_RD__single_col__BITNR 24
+#define R_IRQ_MASK0_RD__congestion__BITNR 23
+#define R_IRQ_MASK0_RD__oversize__BITNR 22
+#define R_IRQ_MASK0_RD__alignment_error__BITNR 21
+#define R_IRQ_MASK0_RD__crc_error__BITNR 20
+#define R_IRQ_MASK0_RD__overrun__BITNR 19
+#define R_IRQ_MASK0_RD__underrun__BITNR 18
+#define R_IRQ_MASK0_RD__excessive_col__BITNR 17
+#define R_IRQ_MASK0_RD__mdio__BITNR 16
+#define R_IRQ_MASK0_RD__ata_drq3__BITNR 15
+#define R_IRQ_MASK0_RD__ata_drq2__BITNR 14
+#define R_IRQ_MASK0_RD__ata_drq1__BITNR 13
+#define R_IRQ_MASK0_RD__ata_drq0__BITNR 12
+#define R_IRQ_MASK0_RD__par0_ecp_cmd__BITNR 11
+#define R_IRQ_MASK0_RD__ata_irq3__BITNR 11
+#define R_IRQ_MASK0_RD__par0_peri__BITNR 10
+#define R_IRQ_MASK0_RD__ata_irq2__BITNR 10
+#define R_IRQ_MASK0_RD__par0_data__BITNR 9
+#define R_IRQ_MASK0_RD__ata_irq1__BITNR 9
+#define R_IRQ_MASK0_RD__par0_ready__BITNR 8
+#define R_IRQ_MASK0_RD__ata_irq0__BITNR 8
+#define R_IRQ_MASK0_RD__mio__BITNR 8
+#define R_IRQ_MASK0_RD__scsi0__BITNR 8
+#define R_IRQ_MASK0_RD__ata_dmaend__BITNR 7
+#define R_IRQ_MASK0_RD__irq_ext_vector_nr__BITNR 5
+#define R_IRQ_MASK0_RD__irq_int_vector_nr__BITNR 4
+#define R_IRQ_MASK0_RD__ext_dma1__BITNR 3
+#define R_IRQ_MASK0_RD__ext_dma0__BITNR 2
+#define R_IRQ_MASK0_RD__timer1__BITNR 1
+#define R_IRQ_MASK0_RD__timer0__BITNR 0
+
+#define R_IRQ_MASK0_RD__nmi_pin__nmi_pin__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__watchdog_nmi__watchdog_nmi__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__sqe_test_error__sqe_test_error__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__carrier_loss__carrier_loss__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__deferred__deferred__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__late_col__late_col__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__multiple_col__multiple_col__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__single_col__single_col__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__congestion__congestion__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__oversize__oversize__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__alignment_error__alignment_error__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__crc_error__crc_error__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__overrun__overrun__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__underrun__underrun__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__excessive_col__excessive_col__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__mdio__mdio__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__ata_drq3__ata_drq3__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__ata_drq2__ata_drq2__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__ata_drq1__ata_drq1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__ata_drq0__ata_drq0__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__par0_ecp_cmd__par0_ecp_cmd__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__ata_irq3__ata_irq3__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__par0_ecp_cmd__ata_irq3__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__par0_peri__par0_peri__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__ata_irq2__ata_irq2__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__par0_peri__ata_irq2__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__par0_data__par0_data__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__ata_irq1__ata_irq1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__par0_data__ata_irq1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__par0_ready__par0_ready__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__ata_irq0__ata_irq0__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__par0_ready__ata_irq0__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__mio__mio__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__par0_ready__mio__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__scsi0__scsi0__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__par0_ready__scsi0__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__ata_dmaend__ata_dmaend__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__irq_ext_vector_nr__irq_ext_vector_nr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__irq_int_vector_nr__irq_int_vector_nr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__ext_dma1__ext_dma1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__ext_dma0__ext_dma0__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__timer1__timer1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_RD__timer0__timer0__VAL REG_VAL_ENUM
+
+#define R_IRQ_MASK0_RD__nmi_pin__nmi_pin__active 1
+#define R_IRQ_MASK0_RD__nmi_pin__nmi_pin__inactive 0
+#define R_IRQ_MASK0_RD__watchdog_nmi__watchdog_nmi__active 1
+#define R_IRQ_MASK0_RD__watchdog_nmi__watchdog_nmi__inactive 0
+#define R_IRQ_MASK0_RD__sqe_test_error__sqe_test_error__active 1
+#define R_IRQ_MASK0_RD__sqe_test_error__sqe_test_error__inactive 0
+#define R_IRQ_MASK0_RD__carrier_loss__carrier_loss__active 1
+#define R_IRQ_MASK0_RD__carrier_loss__carrier_loss__inactive 0
+#define R_IRQ_MASK0_RD__deferred__deferred__active 1
+#define R_IRQ_MASK0_RD__deferred__deferred__inactive 0
+#define R_IRQ_MASK0_RD__late_col__late_col__active 1
+#define R_IRQ_MASK0_RD__late_col__late_col__inactive 0
+#define R_IRQ_MASK0_RD__multiple_col__multiple_col__active 1
+#define R_IRQ_MASK0_RD__multiple_col__multiple_col__inactive 0
+#define R_IRQ_MASK0_RD__single_col__single_col__active 1
+#define R_IRQ_MASK0_RD__single_col__single_col__inactive 0
+#define R_IRQ_MASK0_RD__congestion__congestion__active 1
+#define R_IRQ_MASK0_RD__congestion__congestion__inactive 0
+#define R_IRQ_MASK0_RD__oversize__oversize__active 1
+#define R_IRQ_MASK0_RD__oversize__oversize__inactive 0
+#define R_IRQ_MASK0_RD__alignment_error__alignment_error__active 1
+#define R_IRQ_MASK0_RD__alignment_error__alignment_error__inactive 0
+#define R_IRQ_MASK0_RD__crc_error__crc_error__active 1
+#define R_IRQ_MASK0_RD__crc_error__crc_error__inactive 0
+#define R_IRQ_MASK0_RD__overrun__overrun__active 1
+#define R_IRQ_MASK0_RD__overrun__overrun__inactive 0
+#define R_IRQ_MASK0_RD__underrun__underrun__active 1
+#define R_IRQ_MASK0_RD__underrun__underrun__inactive 0
+#define R_IRQ_MASK0_RD__excessive_col__excessive_col__active 1
+#define R_IRQ_MASK0_RD__excessive_col__excessive_col__inactive 0
+#define R_IRQ_MASK0_RD__mdio__mdio__active 1
+#define R_IRQ_MASK0_RD__mdio__mdio__inactive 0
+#define R_IRQ_MASK0_RD__ata_drq3__ata_drq3__active 1
+#define R_IRQ_MASK0_RD__ata_drq3__ata_drq3__inactive 0
+#define R_IRQ_MASK0_RD__ata_drq2__ata_drq2__active 1
+#define R_IRQ_MASK0_RD__ata_drq2__ata_drq2__inactive 0
+#define R_IRQ_MASK0_RD__ata_drq1__ata_drq1__active 1
+#define R_IRQ_MASK0_RD__ata_drq1__ata_drq1__inactive 0
+#define R_IRQ_MASK0_RD__ata_drq0__ata_drq0__active 1
+#define R_IRQ_MASK0_RD__ata_drq0__ata_drq0__inactive 0
+#define R_IRQ_MASK0_RD__par0_ecp_cmd__par0_ecp_cmd__active 1
+#define R_IRQ_MASK0_RD__par0_ecp_cmd__par0_ecp_cmd__inactive 0
+#define R_IRQ_MASK0_RD__ata_irq3__ata_irq3__active 1
+#define R_IRQ_MASK0_RD__ata_irq3__ata_irq3__inactive 0
+#define R_IRQ_MASK0_RD__par0_peri__par0_peri__active 1
+#define R_IRQ_MASK0_RD__par0_peri__par0_peri__inactive 0
+#define R_IRQ_MASK0_RD__ata_irq2__ata_irq2__active 1
+#define R_IRQ_MASK0_RD__ata_irq2__ata_irq2__inactive 0
+#define R_IRQ_MASK0_RD__par0_data__par0_data__active 1
+#define R_IRQ_MASK0_RD__par0_data__par0_data__inactive 0
+#define R_IRQ_MASK0_RD__ata_irq1__ata_irq1__active 1
+#define R_IRQ_MASK0_RD__ata_irq1__ata_irq1__inactive 0
+#define R_IRQ_MASK0_RD__par0_ready__par0_ready__active 1
+#define R_IRQ_MASK0_RD__par0_ready__par0_ready__inactive 0
+#define R_IRQ_MASK0_RD__ata_irq0__ata_irq0__active 1
+#define R_IRQ_MASK0_RD__ata_irq0__ata_irq0__inactive 0
+#define R_IRQ_MASK0_RD__mio__mio__active 1
+#define R_IRQ_MASK0_RD__mio__mio__inactive 0
+#define R_IRQ_MASK0_RD__scsi0__scsi0__active 1
+#define R_IRQ_MASK0_RD__scsi0__scsi0__inactive 0
+#define R_IRQ_MASK0_RD__ata_dmaend__ata_dmaend__active 1
+#define R_IRQ_MASK0_RD__ata_dmaend__ata_dmaend__inactive 0
+#define R_IRQ_MASK0_RD__irq_ext_vector_nr__irq_ext_vector_nr__active 1
+#define R_IRQ_MASK0_RD__irq_ext_vector_nr__irq_ext_vector_nr__inactive 0
+#define R_IRQ_MASK0_RD__irq_int_vector_nr__irq_int_vector_nr__active 1
+#define R_IRQ_MASK0_RD__irq_int_vector_nr__irq_int_vector_nr__inactive 0
+#define R_IRQ_MASK0_RD__ext_dma1__ext_dma1__active 1
+#define R_IRQ_MASK0_RD__ext_dma1__ext_dma1__inactive 0
+#define R_IRQ_MASK0_RD__ext_dma0__ext_dma0__active 1
+#define R_IRQ_MASK0_RD__ext_dma0__ext_dma0__inactive 0
+#define R_IRQ_MASK0_RD__timer1__timer1__active 1
+#define R_IRQ_MASK0_RD__timer1__timer1__inactive 0
+#define R_IRQ_MASK0_RD__timer0__timer0__active 1
+#define R_IRQ_MASK0_RD__timer0__timer0__inactive 0
+
+#endif
+
+/*
+ * R_IRQ_MASK0_SET
+ * - type: WO
+ * - addr: 0xb00000c4
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+#define R_IRQ_MASK0_SET__ADDR (REG_TYPECAST_UDWORD 0xb00000c4)
+
+#ifndef REG_NO_SHADOW
+#define R_IRQ_MASK0_SET__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_IRQ_MASK0_SET + 0))
+#define R_IRQ_MASK0_SET__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_IRQ_MASK0_SET + 0))
+#else /* REG_NO_SHADOW */
+#define R_IRQ_MASK0_SET__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_IRQ_MASK0_SET__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_IRQ_MASK0_SET__STYPECAST REG_STYPECAST_UDWORD
+#define R_IRQ_MASK0_SET__SVAL REG_SVAL_ZERO
+#define R_IRQ_MASK0_SET__SVAL_I REG_SVAL_I_ZERO
+#define R_IRQ_MASK0_SET__TYPECAST REG_TYPECAST_UDWORD
+#define R_IRQ_MASK0_SET__TYPE (REG_UDWORD)
+#define R_IRQ_MASK0_SET__GET REG_GET_WO
+#define R_IRQ_MASK0_SET__IGET REG_IGET_WO
+#define R_IRQ_MASK0_SET__SET REG_SET_WO
+#define R_IRQ_MASK0_SET__ISET REG_ISET_WO
+#define R_IRQ_MASK0_SET__SET_VAL REG_SET_VAL_WO
+#define R_IRQ_MASK0_SET__EQL REG_EQL_WO
+#define R_IRQ_MASK0_SET__IEQL REG_IEQL_WO
+#define R_IRQ_MASK0_SET__RD REG_RD_WO
+#define R_IRQ_MASK0_SET__IRD REG_IRD_WO
+#define R_IRQ_MASK0_SET__WR REG_WR_WO
+#define R_IRQ_MASK0_SET__IWR REG_IWR_WO
+
+#define R_IRQ_MASK0_SET__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_IRQ_MASK0_SET__nmi_pin__nmi_pin__MASK 0x80000000U
+#define R_IRQ_MASK0_SET__watchdog_nmi__watchdog_nmi__MASK 0x40000000U
+#define R_IRQ_MASK0_SET__sqe_test_error__sqe_test_error__MASK 0x20000000U
+#define R_IRQ_MASK0_SET__carrier_loss__carrier_loss__MASK 0x10000000U
+#define R_IRQ_MASK0_SET__deferred__deferred__MASK 0x08000000U
+#define R_IRQ_MASK0_SET__late_col__late_col__MASK 0x04000000U
+#define R_IRQ_MASK0_SET__multiple_col__multiple_col__MASK 0x02000000U
+#define R_IRQ_MASK0_SET__single_col__single_col__MASK 0x01000000U
+#define R_IRQ_MASK0_SET__congestion__congestion__MASK 0x00800000U
+#define R_IRQ_MASK0_SET__oversize__oversize__MASK 0x00400000U
+#define R_IRQ_MASK0_SET__alignment_error__alignment_error__MASK 0x00200000U
+#define R_IRQ_MASK0_SET__crc_error__crc_error__MASK 0x00100000U
+#define R_IRQ_MASK0_SET__overrun__overrun__MASK 0x00080000U
+#define R_IRQ_MASK0_SET__underrun__underrun__MASK 0x00040000U
+#define R_IRQ_MASK0_SET__excessive_col__excessive_col__MASK 0x00020000U
+#define R_IRQ_MASK0_SET__mdio__mdio__MASK 0x00010000U
+#define R_IRQ_MASK0_SET__ata_drq3__ata_drq3__MASK 0x00008000U
+#define R_IRQ_MASK0_SET__ata_drq2__ata_drq2__MASK 0x00004000U
+#define R_IRQ_MASK0_SET__ata_drq1__ata_drq1__MASK 0x00002000U
+#define R_IRQ_MASK0_SET__ata_drq0__ata_drq0__MASK 0x00001000U
+#define R_IRQ_MASK0_SET__par0_ecp_cmd__par0_ecp_cmd__MASK 0x00000800U
+#define R_IRQ_MASK0_SET__ata_irq3__ata_irq3__MASK 0x00000800U
+#define R_IRQ_MASK0_SET__par0_ecp_cmd__ata_irq3__MASK 0x00000800U
+#define R_IRQ_MASK0_SET__par0_peri__par0_peri__MASK 0x00000400U
+#define R_IRQ_MASK0_SET__ata_irq2__ata_irq2__MASK 0x00000400U
+#define R_IRQ_MASK0_SET__par0_peri__ata_irq2__MASK 0x00000400U
+#define R_IRQ_MASK0_SET__par0_data__par0_data__MASK 0x00000200U
+#define R_IRQ_MASK0_SET__ata_irq1__ata_irq1__MASK 0x00000200U
+#define R_IRQ_MASK0_SET__par0_data__ata_irq1__MASK 0x00000200U
+#define R_IRQ_MASK0_SET__par0_ready__par0_ready__MASK 0x00000100U
+#define R_IRQ_MASK0_SET__ata_irq0__ata_irq0__MASK 0x00000100U
+#define R_IRQ_MASK0_SET__par0_ready__ata_irq0__MASK 0x00000100U
+#define R_IRQ_MASK0_SET__mio__mio__MASK 0x00000100U
+#define R_IRQ_MASK0_SET__par0_ready__mio__MASK 0x00000100U
+#define R_IRQ_MASK0_SET__scsi0__scsi0__MASK 0x00000100U
+#define R_IRQ_MASK0_SET__par0_ready__scsi0__MASK 0x00000100U
+#define R_IRQ_MASK0_SET__ata_dmaend__ata_dmaend__MASK 0x00000080U
+#define R_IRQ_MASK0_SET__irq_ext_vector_nr__irq_ext_vector_nr__MASK 0x00000020U
+#define R_IRQ_MASK0_SET__irq_int_vector_nr__irq_int_vector_nr__MASK 0x00000010U
+#define R_IRQ_MASK0_SET__ext_dma1__ext_dma1__MASK 0x00000008U
+#define R_IRQ_MASK0_SET__ext_dma0__ext_dma0__MASK 0x00000004U
+#define R_IRQ_MASK0_SET__timer1__timer1__MASK 0x00000002U
+#define R_IRQ_MASK0_SET__timer0__timer0__MASK 0x00000001U
+
+#define R_IRQ_MASK0_SET__nmi_pin__MAX 0x1
+#define R_IRQ_MASK0_SET__watchdog_nmi__MAX 0x1
+#define R_IRQ_MASK0_SET__sqe_test_error__MAX 0x1
+#define R_IRQ_MASK0_SET__carrier_loss__MAX 0x1
+#define R_IRQ_MASK0_SET__deferred__MAX 0x1
+#define R_IRQ_MASK0_SET__late_col__MAX 0x1
+#define R_IRQ_MASK0_SET__multiple_col__MAX 0x1
+#define R_IRQ_MASK0_SET__single_col__MAX 0x1
+#define R_IRQ_MASK0_SET__congestion__MAX 0x1
+#define R_IRQ_MASK0_SET__oversize__MAX 0x1
+#define R_IRQ_MASK0_SET__alignment_error__MAX 0x1
+#define R_IRQ_MASK0_SET__crc_error__MAX 0x1
+#define R_IRQ_MASK0_SET__overrun__MAX 0x1
+#define R_IRQ_MASK0_SET__underrun__MAX 0x1
+#define R_IRQ_MASK0_SET__excessive_col__MAX 0x1
+#define R_IRQ_MASK0_SET__mdio__MAX 0x1
+#define R_IRQ_MASK0_SET__ata_drq3__MAX 0x1
+#define R_IRQ_MASK0_SET__ata_drq2__MAX 0x1
+#define R_IRQ_MASK0_SET__ata_drq1__MAX 0x1
+#define R_IRQ_MASK0_SET__ata_drq0__MAX 0x1
+#define R_IRQ_MASK0_SET__par0_ecp_cmd__MAX 0x1
+#define R_IRQ_MASK0_SET__ata_irq3__MAX 0x1
+#define R_IRQ_MASK0_SET__par0_peri__MAX 0x1
+#define R_IRQ_MASK0_SET__ata_irq2__MAX 0x1
+#define R_IRQ_MASK0_SET__par0_data__MAX 0x1
+#define R_IRQ_MASK0_SET__ata_irq1__MAX 0x1
+#define R_IRQ_MASK0_SET__par0_ready__MAX 0x1
+#define R_IRQ_MASK0_SET__ata_irq0__MAX 0x1
+#define R_IRQ_MASK0_SET__mio__MAX 0x1
+#define R_IRQ_MASK0_SET__scsi0__MAX 0x1
+#define R_IRQ_MASK0_SET__ata_dmaend__MAX 0x1
+#define R_IRQ_MASK0_SET__irq_ext_vector_nr__MAX 0x1
+#define R_IRQ_MASK0_SET__irq_int_vector_nr__MAX 0x1
+#define R_IRQ_MASK0_SET__ext_dma1__MAX 0x1
+#define R_IRQ_MASK0_SET__ext_dma0__MAX 0x1
+#define R_IRQ_MASK0_SET__timer1__MAX 0x1
+#define R_IRQ_MASK0_SET__timer0__MAX 0x1
+
+#define R_IRQ_MASK0_SET__nmi_pin__MIN 0
+#define R_IRQ_MASK0_SET__watchdog_nmi__MIN 0
+#define R_IRQ_MASK0_SET__sqe_test_error__MIN 0
+#define R_IRQ_MASK0_SET__carrier_loss__MIN 0
+#define R_IRQ_MASK0_SET__deferred__MIN 0
+#define R_IRQ_MASK0_SET__late_col__MIN 0
+#define R_IRQ_MASK0_SET__multiple_col__MIN 0
+#define R_IRQ_MASK0_SET__single_col__MIN 0
+#define R_IRQ_MASK0_SET__congestion__MIN 0
+#define R_IRQ_MASK0_SET__oversize__MIN 0
+#define R_IRQ_MASK0_SET__alignment_error__MIN 0
+#define R_IRQ_MASK0_SET__crc_error__MIN 0
+#define R_IRQ_MASK0_SET__overrun__MIN 0
+#define R_IRQ_MASK0_SET__underrun__MIN 0
+#define R_IRQ_MASK0_SET__excessive_col__MIN 0
+#define R_IRQ_MASK0_SET__mdio__MIN 0
+#define R_IRQ_MASK0_SET__ata_drq3__MIN 0
+#define R_IRQ_MASK0_SET__ata_drq2__MIN 0
+#define R_IRQ_MASK0_SET__ata_drq1__MIN 0
+#define R_IRQ_MASK0_SET__ata_drq0__MIN 0
+#define R_IRQ_MASK0_SET__par0_ecp_cmd__MIN 0
+#define R_IRQ_MASK0_SET__ata_irq3__MIN 0
+#define R_IRQ_MASK0_SET__par0_peri__MIN 0
+#define R_IRQ_MASK0_SET__ata_irq2__MIN 0
+#define R_IRQ_MASK0_SET__par0_data__MIN 0
+#define R_IRQ_MASK0_SET__ata_irq1__MIN 0
+#define R_IRQ_MASK0_SET__par0_ready__MIN 0
+#define R_IRQ_MASK0_SET__ata_irq0__MIN 0
+#define R_IRQ_MASK0_SET__mio__MIN 0
+#define R_IRQ_MASK0_SET__scsi0__MIN 0
+#define R_IRQ_MASK0_SET__ata_dmaend__MIN 0
+#define R_IRQ_MASK0_SET__irq_ext_vector_nr__MIN 0
+#define R_IRQ_MASK0_SET__irq_int_vector_nr__MIN 0
+#define R_IRQ_MASK0_SET__ext_dma1__MIN 0
+#define R_IRQ_MASK0_SET__ext_dma0__MIN 0
+#define R_IRQ_MASK0_SET__timer1__MIN 0
+#define R_IRQ_MASK0_SET__timer0__MIN 0
+
+#define R_IRQ_MASK0_SET__nmi_pin__BITNR 31
+#define R_IRQ_MASK0_SET__watchdog_nmi__BITNR 30
+#define R_IRQ_MASK0_SET__sqe_test_error__BITNR 29
+#define R_IRQ_MASK0_SET__carrier_loss__BITNR 28
+#define R_IRQ_MASK0_SET__deferred__BITNR 27
+#define R_IRQ_MASK0_SET__late_col__BITNR 26
+#define R_IRQ_MASK0_SET__multiple_col__BITNR 25
+#define R_IRQ_MASK0_SET__single_col__BITNR 24
+#define R_IRQ_MASK0_SET__congestion__BITNR 23
+#define R_IRQ_MASK0_SET__oversize__BITNR 22
+#define R_IRQ_MASK0_SET__alignment_error__BITNR 21
+#define R_IRQ_MASK0_SET__crc_error__BITNR 20
+#define R_IRQ_MASK0_SET__overrun__BITNR 19
+#define R_IRQ_MASK0_SET__underrun__BITNR 18
+#define R_IRQ_MASK0_SET__excessive_col__BITNR 17
+#define R_IRQ_MASK0_SET__mdio__BITNR 16
+#define R_IRQ_MASK0_SET__ata_drq3__BITNR 15
+#define R_IRQ_MASK0_SET__ata_drq2__BITNR 14
+#define R_IRQ_MASK0_SET__ata_drq1__BITNR 13
+#define R_IRQ_MASK0_SET__ata_drq0__BITNR 12
+#define R_IRQ_MASK0_SET__par0_ecp_cmd__BITNR 11
+#define R_IRQ_MASK0_SET__ata_irq3__BITNR 11
+#define R_IRQ_MASK0_SET__par0_peri__BITNR 10
+#define R_IRQ_MASK0_SET__ata_irq2__BITNR 10
+#define R_IRQ_MASK0_SET__par0_data__BITNR 9
+#define R_IRQ_MASK0_SET__ata_irq1__BITNR 9
+#define R_IRQ_MASK0_SET__par0_ready__BITNR 8
+#define R_IRQ_MASK0_SET__ata_irq0__BITNR 8
+#define R_IRQ_MASK0_SET__mio__BITNR 8
+#define R_IRQ_MASK0_SET__scsi0__BITNR 8
+#define R_IRQ_MASK0_SET__ata_dmaend__BITNR 7
+#define R_IRQ_MASK0_SET__irq_ext_vector_nr__BITNR 5
+#define R_IRQ_MASK0_SET__irq_int_vector_nr__BITNR 4
+#define R_IRQ_MASK0_SET__ext_dma1__BITNR 3
+#define R_IRQ_MASK0_SET__ext_dma0__BITNR 2
+#define R_IRQ_MASK0_SET__timer1__BITNR 1
+#define R_IRQ_MASK0_SET__timer0__BITNR 0
+
+#define R_IRQ_MASK0_SET__nmi_pin__nmi_pin__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__watchdog_nmi__watchdog_nmi__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__sqe_test_error__sqe_test_error__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__carrier_loss__carrier_loss__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__deferred__deferred__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__late_col__late_col__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__multiple_col__multiple_col__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__single_col__single_col__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__congestion__congestion__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__oversize__oversize__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__alignment_error__alignment_error__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__crc_error__crc_error__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__overrun__overrun__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__underrun__underrun__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__excessive_col__excessive_col__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__mdio__mdio__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__ata_drq3__ata_drq3__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__ata_drq2__ata_drq2__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__ata_drq1__ata_drq1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__ata_drq0__ata_drq0__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__par0_ecp_cmd__par0_ecp_cmd__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__ata_irq3__ata_irq3__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__par0_ecp_cmd__ata_irq3__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__par0_peri__par0_peri__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__ata_irq2__ata_irq2__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__par0_peri__ata_irq2__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__par0_data__par0_data__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__ata_irq1__ata_irq1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__par0_data__ata_irq1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__par0_ready__par0_ready__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__ata_irq0__ata_irq0__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__par0_ready__ata_irq0__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__mio__mio__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__par0_ready__mio__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__scsi0__scsi0__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__par0_ready__scsi0__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__ata_dmaend__ata_dmaend__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__irq_ext_vector_nr__irq_ext_vector_nr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__irq_int_vector_nr__irq_int_vector_nr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__ext_dma1__ext_dma1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__ext_dma0__ext_dma0__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__timer1__timer1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK0_SET__timer0__timer0__VAL REG_VAL_ENUM
+
+#define R_IRQ_MASK0_SET__nmi_pin__nmi_pin__nop 0
+#define R_IRQ_MASK0_SET__nmi_pin__nmi_pin__set 1
+#define R_IRQ_MASK0_SET__watchdog_nmi__watchdog_nmi__nop 0
+#define R_IRQ_MASK0_SET__watchdog_nmi__watchdog_nmi__set 1
+#define R_IRQ_MASK0_SET__sqe_test_error__sqe_test_error__nop 0
+#define R_IRQ_MASK0_SET__sqe_test_error__sqe_test_error__set 1
+#define R_IRQ_MASK0_SET__carrier_loss__carrier_loss__nop 0
+#define R_IRQ_MASK0_SET__carrier_loss__carrier_loss__set 1
+#define R_IRQ_MASK0_SET__deferred__deferred__nop 0
+#define R_IRQ_MASK0_SET__deferred__deferred__set 1
+#define R_IRQ_MASK0_SET__late_col__late_col__nop 0
+#define R_IRQ_MASK0_SET__late_col__late_col__set 1
+#define R_IRQ_MASK0_SET__multiple_col__multiple_col__nop 0
+#define R_IRQ_MASK0_SET__multiple_col__multiple_col__set 1
+#define R_IRQ_MASK0_SET__single_col__single_col__nop 0
+#define R_IRQ_MASK0_SET__single_col__single_col__set 1
+#define R_IRQ_MASK0_SET__congestion__congestion__nop 0
+#define R_IRQ_MASK0_SET__congestion__congestion__set 1
+#define R_IRQ_MASK0_SET__oversize__oversize__nop 0
+#define R_IRQ_MASK0_SET__oversize__oversize__set 1
+#define R_IRQ_MASK0_SET__alignment_error__alignment_error__nop 0
+#define R_IRQ_MASK0_SET__alignment_error__alignment_error__set 1
+#define R_IRQ_MASK0_SET__crc_error__crc_error__nop 0
+#define R_IRQ_MASK0_SET__crc_error__crc_error__set 1
+#define R_IRQ_MASK0_SET__overrun__overrun__nop 0
+#define R_IRQ_MASK0_SET__overrun__overrun__set 1
+#define R_IRQ_MASK0_SET__underrun__underrun__nop 0
+#define R_IRQ_MASK0_SET__underrun__underrun__set 1
+#define R_IRQ_MASK0_SET__excessive_col__excessive_col__nop 0
+#define R_IRQ_MASK0_SET__excessive_col__excessive_col__set 1
+#define R_IRQ_MASK0_SET__mdio__mdio__nop 0
+#define R_IRQ_MASK0_SET__mdio__mdio__set 1
+#define R_IRQ_MASK0_SET__ata_drq3__ata_drq3__nop 0
+#define R_IRQ_MASK0_SET__ata_drq3__ata_drq3__set 1
+#define R_IRQ_MASK0_SET__ata_drq2__ata_drq2__nop 0
+#define R_IRQ_MASK0_SET__ata_drq2__ata_drq2__set 1
+#define R_IRQ_MASK0_SET__ata_drq1__ata_drq1__nop 0
+#define R_IRQ_MASK0_SET__ata_drq1__ata_drq1__set 1
+#define R_IRQ_MASK0_SET__ata_drq0__ata_drq0__nop 0
+#define R_IRQ_MASK0_SET__ata_drq0__ata_drq0__set 1
+#define R_IRQ_MASK0_SET__par0_ecp_cmd__par0_ecp_cmd__nop 0
+#define R_IRQ_MASK0_SET__par0_ecp_cmd__par0_ecp_cmd__set 1
+#define R_IRQ_MASK0_SET__ata_irq3__ata_irq3__nop 0
+#define R_IRQ_MASK0_SET__ata_irq3__ata_irq3__set 1
+#define R_IRQ_MASK0_SET__par0_peri__par0_peri__nop 0
+#define R_IRQ_MASK0_SET__par0_peri__par0_peri__set 1
+#define R_IRQ_MASK0_SET__ata_irq2__ata_irq2__nop 0
+#define R_IRQ_MASK0_SET__ata_irq2__ata_irq2__set 1
+#define R_IRQ_MASK0_SET__par0_data__par0_data__nop 0
+#define R_IRQ_MASK0_SET__par0_data__par0_data__set 1
+#define R_IRQ_MASK0_SET__ata_irq1__ata_irq1__nop 0
+#define R_IRQ_MASK0_SET__ata_irq1__ata_irq1__set 1
+#define R_IRQ_MASK0_SET__par0_ready__par0_ready__nop 0
+#define R_IRQ_MASK0_SET__par0_ready__par0_ready__set 1
+#define R_IRQ_MASK0_SET__ata_irq0__ata_irq0__nop 0
+#define R_IRQ_MASK0_SET__ata_irq0__ata_irq0__set 1
+#define R_IRQ_MASK0_SET__mio__mio__nop 0
+#define R_IRQ_MASK0_SET__mio__mio__set 1
+#define R_IRQ_MASK0_SET__scsi0__scsi0__nop 0
+#define R_IRQ_MASK0_SET__scsi0__scsi0__set 1
+#define R_IRQ_MASK0_SET__ata_dmaend__ata_dmaend__nop 0
+#define R_IRQ_MASK0_SET__ata_dmaend__ata_dmaend__set 1
+#define R_IRQ_MASK0_SET__irq_ext_vector_nr__irq_ext_vector_nr__nop 0
+#define R_IRQ_MASK0_SET__irq_ext_vector_nr__irq_ext_vector_nr__set 1
+#define R_IRQ_MASK0_SET__irq_int_vector_nr__irq_int_vector_nr__nop 0
+#define R_IRQ_MASK0_SET__irq_int_vector_nr__irq_int_vector_nr__set 1
+#define R_IRQ_MASK0_SET__ext_dma1__ext_dma1__nop 0
+#define R_IRQ_MASK0_SET__ext_dma1__ext_dma1__set 1
+#define R_IRQ_MASK0_SET__ext_dma0__ext_dma0__nop 0
+#define R_IRQ_MASK0_SET__ext_dma0__ext_dma0__set 1
+#define R_IRQ_MASK0_SET__timer1__timer1__nop 0
+#define R_IRQ_MASK0_SET__timer1__timer1__set 1
+#define R_IRQ_MASK0_SET__timer0__timer0__nop 0
+#define R_IRQ_MASK0_SET__timer0__timer0__set 1
+
+#endif
+
+/*
+ * R_IRQ_MASK1_CLR
+ * - type: WO
+ * - addr: 0xb00000c8
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+#define R_IRQ_MASK1_CLR__ADDR (REG_TYPECAST_UDWORD 0xb00000c8)
+
+#ifndef REG_NO_SHADOW
+#define R_IRQ_MASK1_CLR__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_IRQ_MASK1_CLR + 0))
+#define R_IRQ_MASK1_CLR__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_IRQ_MASK1_CLR + 0))
+#else /* REG_NO_SHADOW */
+#define R_IRQ_MASK1_CLR__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_IRQ_MASK1_CLR__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_IRQ_MASK1_CLR__STYPECAST REG_STYPECAST_UDWORD
+#define R_IRQ_MASK1_CLR__SVAL REG_SVAL_ZERO
+#define R_IRQ_MASK1_CLR__SVAL_I REG_SVAL_I_ZERO
+#define R_IRQ_MASK1_CLR__TYPECAST REG_TYPECAST_UDWORD
+#define R_IRQ_MASK1_CLR__TYPE (REG_UDWORD)
+#define R_IRQ_MASK1_CLR__GET REG_GET_WO
+#define R_IRQ_MASK1_CLR__IGET REG_IGET_WO
+#define R_IRQ_MASK1_CLR__SET REG_SET_WO
+#define R_IRQ_MASK1_CLR__ISET REG_ISET_WO
+#define R_IRQ_MASK1_CLR__SET_VAL REG_SET_VAL_WO
+#define R_IRQ_MASK1_CLR__EQL REG_EQL_WO
+#define R_IRQ_MASK1_CLR__IEQL REG_IEQL_WO
+#define R_IRQ_MASK1_CLR__RD REG_RD_WO
+#define R_IRQ_MASK1_CLR__IRD REG_IRD_WO
+#define R_IRQ_MASK1_CLR__WR REG_WR_WO
+#define R_IRQ_MASK1_CLR__IWR REG_IWR_WO
+
+#define R_IRQ_MASK1_CLR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_IRQ_MASK1_CLR__sw_int7__sw_int7__MASK 0x80000000U
+#define R_IRQ_MASK1_CLR__sw_int6__sw_int6__MASK 0x40000000U
+#define R_IRQ_MASK1_CLR__sw_int5__sw_int5__MASK 0x20000000U
+#define R_IRQ_MASK1_CLR__sw_int4__sw_int4__MASK 0x10000000U
+#define R_IRQ_MASK1_CLR__sw_int3__sw_int3__MASK 0x08000000U
+#define R_IRQ_MASK1_CLR__sw_int2__sw_int2__MASK 0x04000000U
+#define R_IRQ_MASK1_CLR__sw_int1__sw_int1__MASK 0x02000000U
+#define R_IRQ_MASK1_CLR__sw_int0__sw_int0__MASK 0x01000000U
+#define R_IRQ_MASK1_CLR__par1_ecp_cmd__par1_ecp_cmd__MASK 0x00080000U
+#define R_IRQ_MASK1_CLR__par1_peri__par1_peri__MASK 0x00040000U
+#define R_IRQ_MASK1_CLR__par1_data__par1_data__MASK 0x00020000U
+#define R_IRQ_MASK1_CLR__par1_ready__par1_ready__MASK 0x00010000U
+#define R_IRQ_MASK1_CLR__scsi1__scsi1__MASK 0x00010000U
+#define R_IRQ_MASK1_CLR__par1_ready__scsi1__MASK 0x00010000U
+#define R_IRQ_MASK1_CLR__ser3_ready__ser3_ready__MASK 0x00008000U
+#define R_IRQ_MASK1_CLR__ser3_data__ser3_data__MASK 0x00004000U
+#define R_IRQ_MASK1_CLR__ser2_ready__ser2_ready__MASK 0x00002000U
+#define R_IRQ_MASK1_CLR__ser2_data__ser2_data__MASK 0x00001000U
+#define R_IRQ_MASK1_CLR__ser1_ready__ser1_ready__MASK 0x00000800U
+#define R_IRQ_MASK1_CLR__ser1_data__ser1_data__MASK 0x00000400U
+#define R_IRQ_MASK1_CLR__ser0_ready__ser0_ready__MASK 0x00000200U
+#define R_IRQ_MASK1_CLR__ser0_data__ser0_data__MASK 0x00000100U
+#define R_IRQ_MASK1_CLR__pa7__pa7__MASK 0x00000080U
+#define R_IRQ_MASK1_CLR__pa6__pa6__MASK 0x00000040U
+#define R_IRQ_MASK1_CLR__pa5__pa5__MASK 0x00000020U
+#define R_IRQ_MASK1_CLR__pa4__pa4__MASK 0x00000010U
+#define R_IRQ_MASK1_CLR__pa3__pa3__MASK 0x00000008U
+#define R_IRQ_MASK1_CLR__pa2__pa2__MASK 0x00000004U
+#define R_IRQ_MASK1_CLR__pa1__pa1__MASK 0x00000002U
+#define R_IRQ_MASK1_CLR__pa0__pa0__MASK 0x00000001U
+
+#define R_IRQ_MASK1_CLR__sw_int7__MAX 0x1
+#define R_IRQ_MASK1_CLR__sw_int6__MAX 0x1
+#define R_IRQ_MASK1_CLR__sw_int5__MAX 0x1
+#define R_IRQ_MASK1_CLR__sw_int4__MAX 0x1
+#define R_IRQ_MASK1_CLR__sw_int3__MAX 0x1
+#define R_IRQ_MASK1_CLR__sw_int2__MAX 0x1
+#define R_IRQ_MASK1_CLR__sw_int1__MAX 0x1
+#define R_IRQ_MASK1_CLR__sw_int0__MAX 0x1
+#define R_IRQ_MASK1_CLR__par1_ecp_cmd__MAX 0x1
+#define R_IRQ_MASK1_CLR__par1_peri__MAX 0x1
+#define R_IRQ_MASK1_CLR__par1_data__MAX 0x1
+#define R_IRQ_MASK1_CLR__par1_ready__MAX 0x1
+#define R_IRQ_MASK1_CLR__scsi1__MAX 0x1
+#define R_IRQ_MASK1_CLR__ser3_ready__MAX 0x1
+#define R_IRQ_MASK1_CLR__ser3_data__MAX 0x1
+#define R_IRQ_MASK1_CLR__ser2_ready__MAX 0x1
+#define R_IRQ_MASK1_CLR__ser2_data__MAX 0x1
+#define R_IRQ_MASK1_CLR__ser1_ready__MAX 0x1
+#define R_IRQ_MASK1_CLR__ser1_data__MAX 0x1
+#define R_IRQ_MASK1_CLR__ser0_ready__MAX 0x1
+#define R_IRQ_MASK1_CLR__ser0_data__MAX 0x1
+#define R_IRQ_MASK1_CLR__pa7__MAX 0x1
+#define R_IRQ_MASK1_CLR__pa6__MAX 0x1
+#define R_IRQ_MASK1_CLR__pa5__MAX 0x1
+#define R_IRQ_MASK1_CLR__pa4__MAX 0x1
+#define R_IRQ_MASK1_CLR__pa3__MAX 0x1
+#define R_IRQ_MASK1_CLR__pa2__MAX 0x1
+#define R_IRQ_MASK1_CLR__pa1__MAX 0x1
+#define R_IRQ_MASK1_CLR__pa0__MAX 0x1
+
+#define R_IRQ_MASK1_CLR__sw_int7__MIN 0
+#define R_IRQ_MASK1_CLR__sw_int6__MIN 0
+#define R_IRQ_MASK1_CLR__sw_int5__MIN 0
+#define R_IRQ_MASK1_CLR__sw_int4__MIN 0
+#define R_IRQ_MASK1_CLR__sw_int3__MIN 0
+#define R_IRQ_MASK1_CLR__sw_int2__MIN 0
+#define R_IRQ_MASK1_CLR__sw_int1__MIN 0
+#define R_IRQ_MASK1_CLR__sw_int0__MIN 0
+#define R_IRQ_MASK1_CLR__par1_ecp_cmd__MIN 0
+#define R_IRQ_MASK1_CLR__par1_peri__MIN 0
+#define R_IRQ_MASK1_CLR__par1_data__MIN 0
+#define R_IRQ_MASK1_CLR__par1_ready__MIN 0
+#define R_IRQ_MASK1_CLR__scsi1__MIN 0
+#define R_IRQ_MASK1_CLR__ser3_ready__MIN 0
+#define R_IRQ_MASK1_CLR__ser3_data__MIN 0
+#define R_IRQ_MASK1_CLR__ser2_ready__MIN 0
+#define R_IRQ_MASK1_CLR__ser2_data__MIN 0
+#define R_IRQ_MASK1_CLR__ser1_ready__MIN 0
+#define R_IRQ_MASK1_CLR__ser1_data__MIN 0
+#define R_IRQ_MASK1_CLR__ser0_ready__MIN 0
+#define R_IRQ_MASK1_CLR__ser0_data__MIN 0
+#define R_IRQ_MASK1_CLR__pa7__MIN 0
+#define R_IRQ_MASK1_CLR__pa6__MIN 0
+#define R_IRQ_MASK1_CLR__pa5__MIN 0
+#define R_IRQ_MASK1_CLR__pa4__MIN 0
+#define R_IRQ_MASK1_CLR__pa3__MIN 0
+#define R_IRQ_MASK1_CLR__pa2__MIN 0
+#define R_IRQ_MASK1_CLR__pa1__MIN 0
+#define R_IRQ_MASK1_CLR__pa0__MIN 0
+
+#define R_IRQ_MASK1_CLR__sw_int7__BITNR 31
+#define R_IRQ_MASK1_CLR__sw_int6__BITNR 30
+#define R_IRQ_MASK1_CLR__sw_int5__BITNR 29
+#define R_IRQ_MASK1_CLR__sw_int4__BITNR 28
+#define R_IRQ_MASK1_CLR__sw_int3__BITNR 27
+#define R_IRQ_MASK1_CLR__sw_int2__BITNR 26
+#define R_IRQ_MASK1_CLR__sw_int1__BITNR 25
+#define R_IRQ_MASK1_CLR__sw_int0__BITNR 24
+#define R_IRQ_MASK1_CLR__par1_ecp_cmd__BITNR 19
+#define R_IRQ_MASK1_CLR__par1_peri__BITNR 18
+#define R_IRQ_MASK1_CLR__par1_data__BITNR 17
+#define R_IRQ_MASK1_CLR__par1_ready__BITNR 16
+#define R_IRQ_MASK1_CLR__scsi1__BITNR 16
+#define R_IRQ_MASK1_CLR__ser3_ready__BITNR 15
+#define R_IRQ_MASK1_CLR__ser3_data__BITNR 14
+#define R_IRQ_MASK1_CLR__ser2_ready__BITNR 13
+#define R_IRQ_MASK1_CLR__ser2_data__BITNR 12
+#define R_IRQ_MASK1_CLR__ser1_ready__BITNR 11
+#define R_IRQ_MASK1_CLR__ser1_data__BITNR 10
+#define R_IRQ_MASK1_CLR__ser0_ready__BITNR 9
+#define R_IRQ_MASK1_CLR__ser0_data__BITNR 8
+#define R_IRQ_MASK1_CLR__pa7__BITNR 7
+#define R_IRQ_MASK1_CLR__pa6__BITNR 6
+#define R_IRQ_MASK1_CLR__pa5__BITNR 5
+#define R_IRQ_MASK1_CLR__pa4__BITNR 4
+#define R_IRQ_MASK1_CLR__pa3__BITNR 3
+#define R_IRQ_MASK1_CLR__pa2__BITNR 2
+#define R_IRQ_MASK1_CLR__pa1__BITNR 1
+#define R_IRQ_MASK1_CLR__pa0__BITNR 0
+
+#define R_IRQ_MASK1_CLR__sw_int7__sw_int7__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__sw_int6__sw_int6__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__sw_int5__sw_int5__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__sw_int4__sw_int4__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__sw_int3__sw_int3__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__sw_int2__sw_int2__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__sw_int1__sw_int1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__sw_int0__sw_int0__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__par1_ecp_cmd__par1_ecp_cmd__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__par1_peri__par1_peri__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__par1_data__par1_data__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__par1_ready__par1_ready__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__scsi1__scsi1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__par1_ready__scsi1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__ser3_ready__ser3_ready__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__ser3_data__ser3_data__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__ser2_ready__ser2_ready__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__ser2_data__ser2_data__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__ser1_ready__ser1_ready__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__ser1_data__ser1_data__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__ser0_ready__ser0_ready__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__ser0_data__ser0_data__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__pa7__pa7__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__pa6__pa6__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__pa5__pa5__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__pa4__pa4__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__pa3__pa3__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__pa2__pa2__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__pa1__pa1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_CLR__pa0__pa0__VAL REG_VAL_ENUM
+
+#define R_IRQ_MASK1_CLR__sw_int7__sw_int7__clr 1
+#define R_IRQ_MASK1_CLR__sw_int7__sw_int7__nop 0
+#define R_IRQ_MASK1_CLR__sw_int6__sw_int6__clr 1
+#define R_IRQ_MASK1_CLR__sw_int6__sw_int6__nop 0
+#define R_IRQ_MASK1_CLR__sw_int5__sw_int5__clr 1
+#define R_IRQ_MASK1_CLR__sw_int5__sw_int5__nop 0
+#define R_IRQ_MASK1_CLR__sw_int4__sw_int4__clr 1
+#define R_IRQ_MASK1_CLR__sw_int4__sw_int4__nop 0
+#define R_IRQ_MASK1_CLR__sw_int3__sw_int3__clr 1
+#define R_IRQ_MASK1_CLR__sw_int3__sw_int3__nop 0
+#define R_IRQ_MASK1_CLR__sw_int2__sw_int2__clr 1
+#define R_IRQ_MASK1_CLR__sw_int2__sw_int2__nop 0
+#define R_IRQ_MASK1_CLR__sw_int1__sw_int1__clr 1
+#define R_IRQ_MASK1_CLR__sw_int1__sw_int1__nop 0
+#define R_IRQ_MASK1_CLR__sw_int0__sw_int0__clr 1
+#define R_IRQ_MASK1_CLR__sw_int0__sw_int0__nop 0
+#define R_IRQ_MASK1_CLR__par1_ecp_cmd__par1_ecp_cmd__clr 1
+#define R_IRQ_MASK1_CLR__par1_ecp_cmd__par1_ecp_cmd__nop 0
+#define R_IRQ_MASK1_CLR__par1_peri__par1_peri__clr 1
+#define R_IRQ_MASK1_CLR__par1_peri__par1_peri__nop 0
+#define R_IRQ_MASK1_CLR__par1_data__par1_data__clr 1
+#define R_IRQ_MASK1_CLR__par1_data__par1_data__nop 0
+#define R_IRQ_MASK1_CLR__par1_ready__par1_ready__clr 1
+#define R_IRQ_MASK1_CLR__par1_ready__par1_ready__nop 0
+#define R_IRQ_MASK1_CLR__scsi1__scsi1__clr 1
+#define R_IRQ_MASK1_CLR__scsi1__scsi1__nop 0
+#define R_IRQ_MASK1_CLR__ser3_ready__ser3_ready__clr 1
+#define R_IRQ_MASK1_CLR__ser3_ready__ser3_ready__nop 0
+#define R_IRQ_MASK1_CLR__ser3_data__ser3_data__clr 1
+#define R_IRQ_MASK1_CLR__ser3_data__ser3_data__nop 0
+#define R_IRQ_MASK1_CLR__ser2_ready__ser2_ready__clr 1
+#define R_IRQ_MASK1_CLR__ser2_ready__ser2_ready__nop 0
+#define R_IRQ_MASK1_CLR__ser2_data__ser2_data__clr 1
+#define R_IRQ_MASK1_CLR__ser2_data__ser2_data__nop 0
+#define R_IRQ_MASK1_CLR__ser1_ready__ser1_ready__clr 1
+#define R_IRQ_MASK1_CLR__ser1_ready__ser1_ready__nop 0
+#define R_IRQ_MASK1_CLR__ser1_data__ser1_data__clr 1
+#define R_IRQ_MASK1_CLR__ser1_data__ser1_data__nop 0
+#define R_IRQ_MASK1_CLR__ser0_ready__ser0_ready__clr 1
+#define R_IRQ_MASK1_CLR__ser0_ready__ser0_ready__nop 0
+#define R_IRQ_MASK1_CLR__ser0_data__ser0_data__clr 1
+#define R_IRQ_MASK1_CLR__ser0_data__ser0_data__nop 0
+#define R_IRQ_MASK1_CLR__pa7__pa7__clr 1
+#define R_IRQ_MASK1_CLR__pa7__pa7__nop 0
+#define R_IRQ_MASK1_CLR__pa6__pa6__clr 1
+#define R_IRQ_MASK1_CLR__pa6__pa6__nop 0
+#define R_IRQ_MASK1_CLR__pa5__pa5__clr 1
+#define R_IRQ_MASK1_CLR__pa5__pa5__nop 0
+#define R_IRQ_MASK1_CLR__pa4__pa4__clr 1
+#define R_IRQ_MASK1_CLR__pa4__pa4__nop 0
+#define R_IRQ_MASK1_CLR__pa3__pa3__clr 1
+#define R_IRQ_MASK1_CLR__pa3__pa3__nop 0
+#define R_IRQ_MASK1_CLR__pa2__pa2__clr 1
+#define R_IRQ_MASK1_CLR__pa2__pa2__nop 0
+#define R_IRQ_MASK1_CLR__pa1__pa1__clr 1
+#define R_IRQ_MASK1_CLR__pa1__pa1__nop 0
+#define R_IRQ_MASK1_CLR__pa0__pa0__clr 1
+#define R_IRQ_MASK1_CLR__pa0__pa0__nop 0
+
+#endif
+
+/*
+ * R_IRQ_MASK1_RD
+ * - type: RO
+ * - addr: 0xb00000c8
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+#define R_IRQ_MASK1_RD__ADDR (REG_TYPECAST_UDWORD 0xb00000c8)
+#define R_IRQ_MASK1_RD__SVAL REG_SVAL_SHADOW
+#define R_IRQ_MASK1_RD__SVAL_I REG_SVAL_I_SHADOW
+#define R_IRQ_MASK1_RD__TYPECAST REG_TYPECAST_UDWORD
+#define R_IRQ_MASK1_RD__TYPE (REG_UDWORD)
+#define R_IRQ_MASK1_RD__GET REG_GET_RO
+#define R_IRQ_MASK1_RD__IGET REG_IGET_RO
+#define R_IRQ_MASK1_RD__SET REG_SET_RO
+#define R_IRQ_MASK1_RD__ISET REG_ISET_RO
+#define R_IRQ_MASK1_RD__SET_VAL REG_SET_VAL_RO
+#define R_IRQ_MASK1_RD__EQL REG_EQL_RO
+#define R_IRQ_MASK1_RD__IEQL REG_IEQL_RO
+#define R_IRQ_MASK1_RD__RD REG_RD_RO
+#define R_IRQ_MASK1_RD__IRD REG_IRD_RO
+#define R_IRQ_MASK1_RD__WR REG_WR_RO
+#define R_IRQ_MASK1_RD__IWR REG_IWR_RO
+
+#define R_IRQ_MASK1_RD__READ(addr) \
+ (*(addr))
+
+#define R_IRQ_MASK1_RD__sw_int7__sw_int7__MASK 0x80000000U
+#define R_IRQ_MASK1_RD__sw_int6__sw_int6__MASK 0x40000000U
+#define R_IRQ_MASK1_RD__sw_int5__sw_int5__MASK 0x20000000U
+#define R_IRQ_MASK1_RD__sw_int4__sw_int4__MASK 0x10000000U
+#define R_IRQ_MASK1_RD__sw_int3__sw_int3__MASK 0x08000000U
+#define R_IRQ_MASK1_RD__sw_int2__sw_int2__MASK 0x04000000U
+#define R_IRQ_MASK1_RD__sw_int1__sw_int1__MASK 0x02000000U
+#define R_IRQ_MASK1_RD__sw_int0__sw_int0__MASK 0x01000000U
+#define R_IRQ_MASK1_RD__par1_ecp_cmd__par1_ecp_cmd__MASK 0x00080000U
+#define R_IRQ_MASK1_RD__par1_peri__par1_peri__MASK 0x00040000U
+#define R_IRQ_MASK1_RD__par1_data__par1_data__MASK 0x00020000U
+#define R_IRQ_MASK1_RD__par1_ready__par1_ready__MASK 0x00010000U
+#define R_IRQ_MASK1_RD__scsi1__scsi1__MASK 0x00010000U
+#define R_IRQ_MASK1_RD__par1_ready__scsi1__MASK 0x00010000U
+#define R_IRQ_MASK1_RD__ser3_ready__ser3_ready__MASK 0x00008000U
+#define R_IRQ_MASK1_RD__ser3_data__ser3_data__MASK 0x00004000U
+#define R_IRQ_MASK1_RD__ser2_ready__ser2_ready__MASK 0x00002000U
+#define R_IRQ_MASK1_RD__ser2_data__ser2_data__MASK 0x00001000U
+#define R_IRQ_MASK1_RD__ser1_ready__ser1_ready__MASK 0x00000800U
+#define R_IRQ_MASK1_RD__ser1_data__ser1_data__MASK 0x00000400U
+#define R_IRQ_MASK1_RD__ser0_ready__ser0_ready__MASK 0x00000200U
+#define R_IRQ_MASK1_RD__ser0_data__ser0_data__MASK 0x00000100U
+#define R_IRQ_MASK1_RD__pa7__pa7__MASK 0x00000080U
+#define R_IRQ_MASK1_RD__pa6__pa6__MASK 0x00000040U
+#define R_IRQ_MASK1_RD__pa5__pa5__MASK 0x00000020U
+#define R_IRQ_MASK1_RD__pa4__pa4__MASK 0x00000010U
+#define R_IRQ_MASK1_RD__pa3__pa3__MASK 0x00000008U
+#define R_IRQ_MASK1_RD__pa2__pa2__MASK 0x00000004U
+#define R_IRQ_MASK1_RD__pa1__pa1__MASK 0x00000002U
+#define R_IRQ_MASK1_RD__pa0__pa0__MASK 0x00000001U
+
+#define R_IRQ_MASK1_RD__sw_int7__MAX 0x1
+#define R_IRQ_MASK1_RD__sw_int6__MAX 0x1
+#define R_IRQ_MASK1_RD__sw_int5__MAX 0x1
+#define R_IRQ_MASK1_RD__sw_int4__MAX 0x1
+#define R_IRQ_MASK1_RD__sw_int3__MAX 0x1
+#define R_IRQ_MASK1_RD__sw_int2__MAX 0x1
+#define R_IRQ_MASK1_RD__sw_int1__MAX 0x1
+#define R_IRQ_MASK1_RD__sw_int0__MAX 0x1
+#define R_IRQ_MASK1_RD__par1_ecp_cmd__MAX 0x1
+#define R_IRQ_MASK1_RD__par1_peri__MAX 0x1
+#define R_IRQ_MASK1_RD__par1_data__MAX 0x1
+#define R_IRQ_MASK1_RD__par1_ready__MAX 0x1
+#define R_IRQ_MASK1_RD__scsi1__MAX 0x1
+#define R_IRQ_MASK1_RD__ser3_ready__MAX 0x1
+#define R_IRQ_MASK1_RD__ser3_data__MAX 0x1
+#define R_IRQ_MASK1_RD__ser2_ready__MAX 0x1
+#define R_IRQ_MASK1_RD__ser2_data__MAX 0x1
+#define R_IRQ_MASK1_RD__ser1_ready__MAX 0x1
+#define R_IRQ_MASK1_RD__ser1_data__MAX 0x1
+#define R_IRQ_MASK1_RD__ser0_ready__MAX 0x1
+#define R_IRQ_MASK1_RD__ser0_data__MAX 0x1
+#define R_IRQ_MASK1_RD__pa7__MAX 0x1
+#define R_IRQ_MASK1_RD__pa6__MAX 0x1
+#define R_IRQ_MASK1_RD__pa5__MAX 0x1
+#define R_IRQ_MASK1_RD__pa4__MAX 0x1
+#define R_IRQ_MASK1_RD__pa3__MAX 0x1
+#define R_IRQ_MASK1_RD__pa2__MAX 0x1
+#define R_IRQ_MASK1_RD__pa1__MAX 0x1
+#define R_IRQ_MASK1_RD__pa0__MAX 0x1
+
+#define R_IRQ_MASK1_RD__sw_int7__MIN 0
+#define R_IRQ_MASK1_RD__sw_int6__MIN 0
+#define R_IRQ_MASK1_RD__sw_int5__MIN 0
+#define R_IRQ_MASK1_RD__sw_int4__MIN 0
+#define R_IRQ_MASK1_RD__sw_int3__MIN 0
+#define R_IRQ_MASK1_RD__sw_int2__MIN 0
+#define R_IRQ_MASK1_RD__sw_int1__MIN 0
+#define R_IRQ_MASK1_RD__sw_int0__MIN 0
+#define R_IRQ_MASK1_RD__par1_ecp_cmd__MIN 0
+#define R_IRQ_MASK1_RD__par1_peri__MIN 0
+#define R_IRQ_MASK1_RD__par1_data__MIN 0
+#define R_IRQ_MASK1_RD__par1_ready__MIN 0
+#define R_IRQ_MASK1_RD__scsi1__MIN 0
+#define R_IRQ_MASK1_RD__ser3_ready__MIN 0
+#define R_IRQ_MASK1_RD__ser3_data__MIN 0
+#define R_IRQ_MASK1_RD__ser2_ready__MIN 0
+#define R_IRQ_MASK1_RD__ser2_data__MIN 0
+#define R_IRQ_MASK1_RD__ser1_ready__MIN 0
+#define R_IRQ_MASK1_RD__ser1_data__MIN 0
+#define R_IRQ_MASK1_RD__ser0_ready__MIN 0
+#define R_IRQ_MASK1_RD__ser0_data__MIN 0
+#define R_IRQ_MASK1_RD__pa7__MIN 0
+#define R_IRQ_MASK1_RD__pa6__MIN 0
+#define R_IRQ_MASK1_RD__pa5__MIN 0
+#define R_IRQ_MASK1_RD__pa4__MIN 0
+#define R_IRQ_MASK1_RD__pa3__MIN 0
+#define R_IRQ_MASK1_RD__pa2__MIN 0
+#define R_IRQ_MASK1_RD__pa1__MIN 0
+#define R_IRQ_MASK1_RD__pa0__MIN 0
+
+#define R_IRQ_MASK1_RD__sw_int7__BITNR 31
+#define R_IRQ_MASK1_RD__sw_int6__BITNR 30
+#define R_IRQ_MASK1_RD__sw_int5__BITNR 29
+#define R_IRQ_MASK1_RD__sw_int4__BITNR 28
+#define R_IRQ_MASK1_RD__sw_int3__BITNR 27
+#define R_IRQ_MASK1_RD__sw_int2__BITNR 26
+#define R_IRQ_MASK1_RD__sw_int1__BITNR 25
+#define R_IRQ_MASK1_RD__sw_int0__BITNR 24
+#define R_IRQ_MASK1_RD__par1_ecp_cmd__BITNR 19
+#define R_IRQ_MASK1_RD__par1_peri__BITNR 18
+#define R_IRQ_MASK1_RD__par1_data__BITNR 17
+#define R_IRQ_MASK1_RD__par1_ready__BITNR 16
+#define R_IRQ_MASK1_RD__scsi1__BITNR 16
+#define R_IRQ_MASK1_RD__ser3_ready__BITNR 15
+#define R_IRQ_MASK1_RD__ser3_data__BITNR 14
+#define R_IRQ_MASK1_RD__ser2_ready__BITNR 13
+#define R_IRQ_MASK1_RD__ser2_data__BITNR 12
+#define R_IRQ_MASK1_RD__ser1_ready__BITNR 11
+#define R_IRQ_MASK1_RD__ser1_data__BITNR 10
+#define R_IRQ_MASK1_RD__ser0_ready__BITNR 9
+#define R_IRQ_MASK1_RD__ser0_data__BITNR 8
+#define R_IRQ_MASK1_RD__pa7__BITNR 7
+#define R_IRQ_MASK1_RD__pa6__BITNR 6
+#define R_IRQ_MASK1_RD__pa5__BITNR 5
+#define R_IRQ_MASK1_RD__pa4__BITNR 4
+#define R_IRQ_MASK1_RD__pa3__BITNR 3
+#define R_IRQ_MASK1_RD__pa2__BITNR 2
+#define R_IRQ_MASK1_RD__pa1__BITNR 1
+#define R_IRQ_MASK1_RD__pa0__BITNR 0
+
+#define R_IRQ_MASK1_RD__sw_int7__sw_int7__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__sw_int6__sw_int6__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__sw_int5__sw_int5__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__sw_int4__sw_int4__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__sw_int3__sw_int3__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__sw_int2__sw_int2__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__sw_int1__sw_int1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__sw_int0__sw_int0__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__par1_ecp_cmd__par1_ecp_cmd__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__par1_peri__par1_peri__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__par1_data__par1_data__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__par1_ready__par1_ready__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__scsi1__scsi1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__par1_ready__scsi1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__ser3_ready__ser3_ready__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__ser3_data__ser3_data__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__ser2_ready__ser2_ready__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__ser2_data__ser2_data__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__ser1_ready__ser1_ready__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__ser1_data__ser1_data__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__ser0_ready__ser0_ready__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__ser0_data__ser0_data__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__pa7__pa7__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__pa6__pa6__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__pa5__pa5__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__pa4__pa4__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__pa3__pa3__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__pa2__pa2__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__pa1__pa1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_RD__pa0__pa0__VAL REG_VAL_ENUM
+
+#define R_IRQ_MASK1_RD__sw_int7__sw_int7__active 1
+#define R_IRQ_MASK1_RD__sw_int7__sw_int7__inactive 0
+#define R_IRQ_MASK1_RD__sw_int6__sw_int6__active 1
+#define R_IRQ_MASK1_RD__sw_int6__sw_int6__inactive 0
+#define R_IRQ_MASK1_RD__sw_int5__sw_int5__active 1
+#define R_IRQ_MASK1_RD__sw_int5__sw_int5__inactive 0
+#define R_IRQ_MASK1_RD__sw_int4__sw_int4__active 1
+#define R_IRQ_MASK1_RD__sw_int4__sw_int4__inactive 0
+#define R_IRQ_MASK1_RD__sw_int3__sw_int3__active 1
+#define R_IRQ_MASK1_RD__sw_int3__sw_int3__inactive 0
+#define R_IRQ_MASK1_RD__sw_int2__sw_int2__active 1
+#define R_IRQ_MASK1_RD__sw_int2__sw_int2__inactive 0
+#define R_IRQ_MASK1_RD__sw_int1__sw_int1__active 1
+#define R_IRQ_MASK1_RD__sw_int1__sw_int1__inactive 0
+#define R_IRQ_MASK1_RD__sw_int0__sw_int0__active 1
+#define R_IRQ_MASK1_RD__sw_int0__sw_int0__inactive 0
+#define R_IRQ_MASK1_RD__par1_ecp_cmd__par1_ecp_cmd__active 1
+#define R_IRQ_MASK1_RD__par1_ecp_cmd__par1_ecp_cmd__inactive 0
+#define R_IRQ_MASK1_RD__par1_peri__par1_peri__active 1
+#define R_IRQ_MASK1_RD__par1_peri__par1_peri__inactive 0
+#define R_IRQ_MASK1_RD__par1_data__par1_data__active 1
+#define R_IRQ_MASK1_RD__par1_data__par1_data__inactive 0
+#define R_IRQ_MASK1_RD__par1_ready__par1_ready__active 1
+#define R_IRQ_MASK1_RD__par1_ready__par1_ready__inactive 0
+#define R_IRQ_MASK1_RD__scsi1__scsi1__active 1
+#define R_IRQ_MASK1_RD__scsi1__scsi1__inactive 0
+#define R_IRQ_MASK1_RD__ser3_ready__ser3_ready__active 1
+#define R_IRQ_MASK1_RD__ser3_ready__ser3_ready__inactive 0
+#define R_IRQ_MASK1_RD__ser3_data__ser3_data__active 1
+#define R_IRQ_MASK1_RD__ser3_data__ser3_data__inactive 0
+#define R_IRQ_MASK1_RD__ser2_ready__ser2_ready__active 1
+#define R_IRQ_MASK1_RD__ser2_ready__ser2_ready__inactive 0
+#define R_IRQ_MASK1_RD__ser2_data__ser2_data__active 1
+#define R_IRQ_MASK1_RD__ser2_data__ser2_data__inactive 0
+#define R_IRQ_MASK1_RD__ser1_ready__ser1_ready__active 1
+#define R_IRQ_MASK1_RD__ser1_ready__ser1_ready__inactive 0
+#define R_IRQ_MASK1_RD__ser1_data__ser1_data__active 1
+#define R_IRQ_MASK1_RD__ser1_data__ser1_data__inactive 0
+#define R_IRQ_MASK1_RD__ser0_ready__ser0_ready__active 1
+#define R_IRQ_MASK1_RD__ser0_ready__ser0_ready__inactive 0
+#define R_IRQ_MASK1_RD__ser0_data__ser0_data__active 1
+#define R_IRQ_MASK1_RD__ser0_data__ser0_data__inactive 0
+#define R_IRQ_MASK1_RD__pa7__pa7__active 1
+#define R_IRQ_MASK1_RD__pa7__pa7__inactive 0
+#define R_IRQ_MASK1_RD__pa6__pa6__active 1
+#define R_IRQ_MASK1_RD__pa6__pa6__inactive 0
+#define R_IRQ_MASK1_RD__pa5__pa5__active 1
+#define R_IRQ_MASK1_RD__pa5__pa5__inactive 0
+#define R_IRQ_MASK1_RD__pa4__pa4__active 1
+#define R_IRQ_MASK1_RD__pa4__pa4__inactive 0
+#define R_IRQ_MASK1_RD__pa3__pa3__active 1
+#define R_IRQ_MASK1_RD__pa3__pa3__inactive 0
+#define R_IRQ_MASK1_RD__pa2__pa2__active 1
+#define R_IRQ_MASK1_RD__pa2__pa2__inactive 0
+#define R_IRQ_MASK1_RD__pa1__pa1__active 1
+#define R_IRQ_MASK1_RD__pa1__pa1__inactive 0
+#define R_IRQ_MASK1_RD__pa0__pa0__active 1
+#define R_IRQ_MASK1_RD__pa0__pa0__inactive 0
+
+#endif
+
+/*
+ * R_IRQ_MASK1_SET
+ * - type: WO
+ * - addr: 0xb00000cc
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+#define R_IRQ_MASK1_SET__ADDR (REG_TYPECAST_UDWORD 0xb00000cc)
+
+#ifndef REG_NO_SHADOW
+#define R_IRQ_MASK1_SET__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_IRQ_MASK1_SET + 0))
+#define R_IRQ_MASK1_SET__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_IRQ_MASK1_SET + 0))
+#else /* REG_NO_SHADOW */
+#define R_IRQ_MASK1_SET__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_IRQ_MASK1_SET__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_IRQ_MASK1_SET__STYPECAST REG_STYPECAST_UDWORD
+#define R_IRQ_MASK1_SET__SVAL REG_SVAL_ZERO
+#define R_IRQ_MASK1_SET__SVAL_I REG_SVAL_I_ZERO
+#define R_IRQ_MASK1_SET__TYPECAST REG_TYPECAST_UDWORD
+#define R_IRQ_MASK1_SET__TYPE (REG_UDWORD)
+#define R_IRQ_MASK1_SET__GET REG_GET_WO
+#define R_IRQ_MASK1_SET__IGET REG_IGET_WO
+#define R_IRQ_MASK1_SET__SET REG_SET_WO
+#define R_IRQ_MASK1_SET__ISET REG_ISET_WO
+#define R_IRQ_MASK1_SET__SET_VAL REG_SET_VAL_WO
+#define R_IRQ_MASK1_SET__EQL REG_EQL_WO
+#define R_IRQ_MASK1_SET__IEQL REG_IEQL_WO
+#define R_IRQ_MASK1_SET__RD REG_RD_WO
+#define R_IRQ_MASK1_SET__IRD REG_IRD_WO
+#define R_IRQ_MASK1_SET__WR REG_WR_WO
+#define R_IRQ_MASK1_SET__IWR REG_IWR_WO
+
+#define R_IRQ_MASK1_SET__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_IRQ_MASK1_SET__sw_int7__sw_int7__MASK 0x80000000U
+#define R_IRQ_MASK1_SET__sw_int6__sw_int6__MASK 0x40000000U
+#define R_IRQ_MASK1_SET__sw_int5__sw_int5__MASK 0x20000000U
+#define R_IRQ_MASK1_SET__sw_int4__sw_int4__MASK 0x10000000U
+#define R_IRQ_MASK1_SET__sw_int3__sw_int3__MASK 0x08000000U
+#define R_IRQ_MASK1_SET__sw_int2__sw_int2__MASK 0x04000000U
+#define R_IRQ_MASK1_SET__sw_int1__sw_int1__MASK 0x02000000U
+#define R_IRQ_MASK1_SET__sw_int0__sw_int0__MASK 0x01000000U
+#define R_IRQ_MASK1_SET__par1_ecp_cmd__par1_ecp_cmd__MASK 0x00080000U
+#define R_IRQ_MASK1_SET__par1_peri__par1_peri__MASK 0x00040000U
+#define R_IRQ_MASK1_SET__par1_data__par1_data__MASK 0x00020000U
+#define R_IRQ_MASK1_SET__par1_ready__par1_ready__MASK 0x00010000U
+#define R_IRQ_MASK1_SET__scsi1__scsi1__MASK 0x00010000U
+#define R_IRQ_MASK1_SET__par1_ready__scsi1__MASK 0x00010000U
+#define R_IRQ_MASK1_SET__ser3_ready__ser3_ready__MASK 0x00008000U
+#define R_IRQ_MASK1_SET__ser3_data__ser3_data__MASK 0x00004000U
+#define R_IRQ_MASK1_SET__ser2_ready__ser2_ready__MASK 0x00002000U
+#define R_IRQ_MASK1_SET__ser2_data__ser2_data__MASK 0x00001000U
+#define R_IRQ_MASK1_SET__ser1_ready__ser1_ready__MASK 0x00000800U
+#define R_IRQ_MASK1_SET__ser1_data__ser1_data__MASK 0x00000400U
+#define R_IRQ_MASK1_SET__ser0_ready__ser0_ready__MASK 0x00000200U
+#define R_IRQ_MASK1_SET__ser0_data__ser0_data__MASK 0x00000100U
+#define R_IRQ_MASK1_SET__pa7__pa7__MASK 0x00000080U
+#define R_IRQ_MASK1_SET__pa6__pa6__MASK 0x00000040U
+#define R_IRQ_MASK1_SET__pa5__pa5__MASK 0x00000020U
+#define R_IRQ_MASK1_SET__pa4__pa4__MASK 0x00000010U
+#define R_IRQ_MASK1_SET__pa3__pa3__MASK 0x00000008U
+#define R_IRQ_MASK1_SET__pa2__pa2__MASK 0x00000004U
+#define R_IRQ_MASK1_SET__pa1__pa1__MASK 0x00000002U
+#define R_IRQ_MASK1_SET__pa0__pa0__MASK 0x00000001U
+
+#define R_IRQ_MASK1_SET__sw_int7__MAX 0x1
+#define R_IRQ_MASK1_SET__sw_int6__MAX 0x1
+#define R_IRQ_MASK1_SET__sw_int5__MAX 0x1
+#define R_IRQ_MASK1_SET__sw_int4__MAX 0x1
+#define R_IRQ_MASK1_SET__sw_int3__MAX 0x1
+#define R_IRQ_MASK1_SET__sw_int2__MAX 0x1
+#define R_IRQ_MASK1_SET__sw_int1__MAX 0x1
+#define R_IRQ_MASK1_SET__sw_int0__MAX 0x1
+#define R_IRQ_MASK1_SET__par1_ecp_cmd__MAX 0x1
+#define R_IRQ_MASK1_SET__par1_peri__MAX 0x1
+#define R_IRQ_MASK1_SET__par1_data__MAX 0x1
+#define R_IRQ_MASK1_SET__par1_ready__MAX 0x1
+#define R_IRQ_MASK1_SET__scsi1__MAX 0x1
+#define R_IRQ_MASK1_SET__ser3_ready__MAX 0x1
+#define R_IRQ_MASK1_SET__ser3_data__MAX 0x1
+#define R_IRQ_MASK1_SET__ser2_ready__MAX 0x1
+#define R_IRQ_MASK1_SET__ser2_data__MAX 0x1
+#define R_IRQ_MASK1_SET__ser1_ready__MAX 0x1
+#define R_IRQ_MASK1_SET__ser1_data__MAX 0x1
+#define R_IRQ_MASK1_SET__ser0_ready__MAX 0x1
+#define R_IRQ_MASK1_SET__ser0_data__MAX 0x1
+#define R_IRQ_MASK1_SET__pa7__MAX 0x1
+#define R_IRQ_MASK1_SET__pa6__MAX 0x1
+#define R_IRQ_MASK1_SET__pa5__MAX 0x1
+#define R_IRQ_MASK1_SET__pa4__MAX 0x1
+#define R_IRQ_MASK1_SET__pa3__MAX 0x1
+#define R_IRQ_MASK1_SET__pa2__MAX 0x1
+#define R_IRQ_MASK1_SET__pa1__MAX 0x1
+#define R_IRQ_MASK1_SET__pa0__MAX 0x1
+
+#define R_IRQ_MASK1_SET__sw_int7__MIN 0
+#define R_IRQ_MASK1_SET__sw_int6__MIN 0
+#define R_IRQ_MASK1_SET__sw_int5__MIN 0
+#define R_IRQ_MASK1_SET__sw_int4__MIN 0
+#define R_IRQ_MASK1_SET__sw_int3__MIN 0
+#define R_IRQ_MASK1_SET__sw_int2__MIN 0
+#define R_IRQ_MASK1_SET__sw_int1__MIN 0
+#define R_IRQ_MASK1_SET__sw_int0__MIN 0
+#define R_IRQ_MASK1_SET__par1_ecp_cmd__MIN 0
+#define R_IRQ_MASK1_SET__par1_peri__MIN 0
+#define R_IRQ_MASK1_SET__par1_data__MIN 0
+#define R_IRQ_MASK1_SET__par1_ready__MIN 0
+#define R_IRQ_MASK1_SET__scsi1__MIN 0
+#define R_IRQ_MASK1_SET__ser3_ready__MIN 0
+#define R_IRQ_MASK1_SET__ser3_data__MIN 0
+#define R_IRQ_MASK1_SET__ser2_ready__MIN 0
+#define R_IRQ_MASK1_SET__ser2_data__MIN 0
+#define R_IRQ_MASK1_SET__ser1_ready__MIN 0
+#define R_IRQ_MASK1_SET__ser1_data__MIN 0
+#define R_IRQ_MASK1_SET__ser0_ready__MIN 0
+#define R_IRQ_MASK1_SET__ser0_data__MIN 0
+#define R_IRQ_MASK1_SET__pa7__MIN 0
+#define R_IRQ_MASK1_SET__pa6__MIN 0
+#define R_IRQ_MASK1_SET__pa5__MIN 0
+#define R_IRQ_MASK1_SET__pa4__MIN 0
+#define R_IRQ_MASK1_SET__pa3__MIN 0
+#define R_IRQ_MASK1_SET__pa2__MIN 0
+#define R_IRQ_MASK1_SET__pa1__MIN 0
+#define R_IRQ_MASK1_SET__pa0__MIN 0
+
+#define R_IRQ_MASK1_SET__sw_int7__BITNR 31
+#define R_IRQ_MASK1_SET__sw_int6__BITNR 30
+#define R_IRQ_MASK1_SET__sw_int5__BITNR 29
+#define R_IRQ_MASK1_SET__sw_int4__BITNR 28
+#define R_IRQ_MASK1_SET__sw_int3__BITNR 27
+#define R_IRQ_MASK1_SET__sw_int2__BITNR 26
+#define R_IRQ_MASK1_SET__sw_int1__BITNR 25
+#define R_IRQ_MASK1_SET__sw_int0__BITNR 24
+#define R_IRQ_MASK1_SET__par1_ecp_cmd__BITNR 19
+#define R_IRQ_MASK1_SET__par1_peri__BITNR 18
+#define R_IRQ_MASK1_SET__par1_data__BITNR 17
+#define R_IRQ_MASK1_SET__par1_ready__BITNR 16
+#define R_IRQ_MASK1_SET__scsi1__BITNR 16
+#define R_IRQ_MASK1_SET__ser3_ready__BITNR 15
+#define R_IRQ_MASK1_SET__ser3_data__BITNR 14
+#define R_IRQ_MASK1_SET__ser2_ready__BITNR 13
+#define R_IRQ_MASK1_SET__ser2_data__BITNR 12
+#define R_IRQ_MASK1_SET__ser1_ready__BITNR 11
+#define R_IRQ_MASK1_SET__ser1_data__BITNR 10
+#define R_IRQ_MASK1_SET__ser0_ready__BITNR 9
+#define R_IRQ_MASK1_SET__ser0_data__BITNR 8
+#define R_IRQ_MASK1_SET__pa7__BITNR 7
+#define R_IRQ_MASK1_SET__pa6__BITNR 6
+#define R_IRQ_MASK1_SET__pa5__BITNR 5
+#define R_IRQ_MASK1_SET__pa4__BITNR 4
+#define R_IRQ_MASK1_SET__pa3__BITNR 3
+#define R_IRQ_MASK1_SET__pa2__BITNR 2
+#define R_IRQ_MASK1_SET__pa1__BITNR 1
+#define R_IRQ_MASK1_SET__pa0__BITNR 0
+
+#define R_IRQ_MASK1_SET__sw_int7__sw_int7__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__sw_int6__sw_int6__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__sw_int5__sw_int5__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__sw_int4__sw_int4__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__sw_int3__sw_int3__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__sw_int2__sw_int2__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__sw_int1__sw_int1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__sw_int0__sw_int0__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__par1_ecp_cmd__par1_ecp_cmd__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__par1_peri__par1_peri__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__par1_data__par1_data__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__par1_ready__par1_ready__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__scsi1__scsi1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__par1_ready__scsi1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__ser3_ready__ser3_ready__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__ser3_data__ser3_data__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__ser2_ready__ser2_ready__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__ser2_data__ser2_data__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__ser1_ready__ser1_ready__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__ser1_data__ser1_data__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__ser0_ready__ser0_ready__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__ser0_data__ser0_data__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__pa7__pa7__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__pa6__pa6__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__pa5__pa5__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__pa4__pa4__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__pa3__pa3__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__pa2__pa2__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__pa1__pa1__VAL REG_VAL_ENUM
+#define R_IRQ_MASK1_SET__pa0__pa0__VAL REG_VAL_ENUM
+
+#define R_IRQ_MASK1_SET__sw_int7__sw_int7__nop 0
+#define R_IRQ_MASK1_SET__sw_int7__sw_int7__set 1
+#define R_IRQ_MASK1_SET__sw_int6__sw_int6__nop 0
+#define R_IRQ_MASK1_SET__sw_int6__sw_int6__set 1
+#define R_IRQ_MASK1_SET__sw_int5__sw_int5__nop 0
+#define R_IRQ_MASK1_SET__sw_int5__sw_int5__set 1
+#define R_IRQ_MASK1_SET__sw_int4__sw_int4__nop 0
+#define R_IRQ_MASK1_SET__sw_int4__sw_int4__set 1
+#define R_IRQ_MASK1_SET__sw_int3__sw_int3__nop 0
+#define R_IRQ_MASK1_SET__sw_int3__sw_int3__set 1
+#define R_IRQ_MASK1_SET__sw_int2__sw_int2__nop 0
+#define R_IRQ_MASK1_SET__sw_int2__sw_int2__set 1
+#define R_IRQ_MASK1_SET__sw_int1__sw_int1__nop 0
+#define R_IRQ_MASK1_SET__sw_int1__sw_int1__set 1
+#define R_IRQ_MASK1_SET__sw_int0__sw_int0__nop 0
+#define R_IRQ_MASK1_SET__sw_int0__sw_int0__set 1
+#define R_IRQ_MASK1_SET__par1_ecp_cmd__par1_ecp_cmd__nop 0
+#define R_IRQ_MASK1_SET__par1_ecp_cmd__par1_ecp_cmd__set 1
+#define R_IRQ_MASK1_SET__par1_peri__par1_peri__nop 0
+#define R_IRQ_MASK1_SET__par1_peri__par1_peri__set 1
+#define R_IRQ_MASK1_SET__par1_data__par1_data__nop 0
+#define R_IRQ_MASK1_SET__par1_data__par1_data__set 1
+#define R_IRQ_MASK1_SET__par1_ready__par1_ready__nop 0
+#define R_IRQ_MASK1_SET__par1_ready__par1_ready__set 1
+#define R_IRQ_MASK1_SET__scsi1__scsi1__nop 0
+#define R_IRQ_MASK1_SET__scsi1__scsi1__set 1
+#define R_IRQ_MASK1_SET__ser3_ready__ser3_ready__nop 0
+#define R_IRQ_MASK1_SET__ser3_ready__ser3_ready__set 1
+#define R_IRQ_MASK1_SET__ser3_data__ser3_data__nop 0
+#define R_IRQ_MASK1_SET__ser3_data__ser3_data__set 1
+#define R_IRQ_MASK1_SET__ser2_ready__ser2_ready__nop 0
+#define R_IRQ_MASK1_SET__ser2_ready__ser2_ready__set 1
+#define R_IRQ_MASK1_SET__ser2_data__ser2_data__nop 0
+#define R_IRQ_MASK1_SET__ser2_data__ser2_data__set 1
+#define R_IRQ_MASK1_SET__ser1_ready__ser1_ready__nop 0
+#define R_IRQ_MASK1_SET__ser1_ready__ser1_ready__set 1
+#define R_IRQ_MASK1_SET__ser1_data__ser1_data__nop 0
+#define R_IRQ_MASK1_SET__ser1_data__ser1_data__set 1
+#define R_IRQ_MASK1_SET__ser0_ready__ser0_ready__nop 0
+#define R_IRQ_MASK1_SET__ser0_ready__ser0_ready__set 1
+#define R_IRQ_MASK1_SET__ser0_data__ser0_data__nop 0
+#define R_IRQ_MASK1_SET__ser0_data__ser0_data__set 1
+#define R_IRQ_MASK1_SET__pa7__pa7__nop 0
+#define R_IRQ_MASK1_SET__pa7__pa7__set 1
+#define R_IRQ_MASK1_SET__pa6__pa6__nop 0
+#define R_IRQ_MASK1_SET__pa6__pa6__set 1
+#define R_IRQ_MASK1_SET__pa5__pa5__nop 0
+#define R_IRQ_MASK1_SET__pa5__pa5__set 1
+#define R_IRQ_MASK1_SET__pa4__pa4__nop 0
+#define R_IRQ_MASK1_SET__pa4__pa4__set 1
+#define R_IRQ_MASK1_SET__pa3__pa3__nop 0
+#define R_IRQ_MASK1_SET__pa3__pa3__set 1
+#define R_IRQ_MASK1_SET__pa2__pa2__nop 0
+#define R_IRQ_MASK1_SET__pa2__pa2__set 1
+#define R_IRQ_MASK1_SET__pa1__pa1__nop 0
+#define R_IRQ_MASK1_SET__pa1__pa1__set 1
+#define R_IRQ_MASK1_SET__pa0__pa0__nop 0
+#define R_IRQ_MASK1_SET__pa0__pa0__set 1
+
+#endif
+
+/*
+ * R_IRQ_MASK2_CLR
+ * - type: WO
+ * - addr: 0xb00000d0
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+#define R_IRQ_MASK2_CLR__ADDR (REG_TYPECAST_UDWORD 0xb00000d0)
+
+#ifndef REG_NO_SHADOW
+#define R_IRQ_MASK2_CLR__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_IRQ_MASK2_CLR + 0))
+#define R_IRQ_MASK2_CLR__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_IRQ_MASK2_CLR + 0))
+#else /* REG_NO_SHADOW */
+#define R_IRQ_MASK2_CLR__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_IRQ_MASK2_CLR__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_IRQ_MASK2_CLR__STYPECAST REG_STYPECAST_UDWORD
+#define R_IRQ_MASK2_CLR__SVAL REG_SVAL_ZERO
+#define R_IRQ_MASK2_CLR__SVAL_I REG_SVAL_I_ZERO
+#define R_IRQ_MASK2_CLR__TYPECAST REG_TYPECAST_UDWORD
+#define R_IRQ_MASK2_CLR__TYPE (REG_UDWORD)
+#define R_IRQ_MASK2_CLR__GET REG_GET_WO
+#define R_IRQ_MASK2_CLR__IGET REG_IGET_WO
+#define R_IRQ_MASK2_CLR__SET REG_SET_WO
+#define R_IRQ_MASK2_CLR__ISET REG_ISET_WO
+#define R_IRQ_MASK2_CLR__SET_VAL REG_SET_VAL_WO
+#define R_IRQ_MASK2_CLR__EQL REG_EQL_WO
+#define R_IRQ_MASK2_CLR__IEQL REG_IEQL_WO
+#define R_IRQ_MASK2_CLR__RD REG_RD_WO
+#define R_IRQ_MASK2_CLR__IRD REG_IRD_WO
+#define R_IRQ_MASK2_CLR__WR REG_WR_WO
+#define R_IRQ_MASK2_CLR__IWR REG_IWR_WO
+
+#define R_IRQ_MASK2_CLR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_IRQ_MASK2_CLR__dma8_sub3_descr__dma8_sub3_descr__MASK 0x00800000U
+#define R_IRQ_MASK2_CLR__dma8_sub2_descr__dma8_sub2_descr__MASK 0x00400000U
+#define R_IRQ_MASK2_CLR__dma8_sub1_descr__dma8_sub1_descr__MASK 0x00200000U
+#define R_IRQ_MASK2_CLR__dma8_sub0_descr__dma8_sub0_descr__MASK 0x00100000U
+#define R_IRQ_MASK2_CLR__dma9_eop__dma9_eop__MASK 0x00080000U
+#define R_IRQ_MASK2_CLR__dma9_descr__dma9_descr__MASK 0x00040000U
+#define R_IRQ_MASK2_CLR__dma8_eop__dma8_eop__MASK 0x00020000U
+#define R_IRQ_MASK2_CLR__dma8_descr__dma8_descr__MASK 0x00010000U
+#define R_IRQ_MASK2_CLR__dma7_eop__dma7_eop__MASK 0x00008000U
+#define R_IRQ_MASK2_CLR__dma7_descr__dma7_descr__MASK 0x00004000U
+#define R_IRQ_MASK2_CLR__dma6_eop__dma6_eop__MASK 0x00002000U
+#define R_IRQ_MASK2_CLR__dma6_descr__dma6_descr__MASK 0x00001000U
+#define R_IRQ_MASK2_CLR__dma5_eop__dma5_eop__MASK 0x00000800U
+#define R_IRQ_MASK2_CLR__dma5_descr__dma5_descr__MASK 0x00000400U
+#define R_IRQ_MASK2_CLR__dma4_eop__dma4_eop__MASK 0x00000200U
+#define R_IRQ_MASK2_CLR__dma4_descr__dma4_descr__MASK 0x00000100U
+#define R_IRQ_MASK2_CLR__dma3_eop__dma3_eop__MASK 0x00000080U
+#define R_IRQ_MASK2_CLR__dma3_descr__dma3_descr__MASK 0x00000040U
+#define R_IRQ_MASK2_CLR__dma2_eop__dma2_eop__MASK 0x00000020U
+#define R_IRQ_MASK2_CLR__dma2_descr__dma2_descr__MASK 0x00000010U
+#define R_IRQ_MASK2_CLR__dma1_eop__dma1_eop__MASK 0x00000008U
+#define R_IRQ_MASK2_CLR__dma1_descr__dma1_descr__MASK 0x00000004U
+#define R_IRQ_MASK2_CLR__dma0_eop__dma0_eop__MASK 0x00000002U
+#define R_IRQ_MASK2_CLR__dma0_descr__dma0_descr__MASK 0x00000001U
+
+#define R_IRQ_MASK2_CLR__dma8_sub3_descr__MAX 0x1
+#define R_IRQ_MASK2_CLR__dma8_sub2_descr__MAX 0x1
+#define R_IRQ_MASK2_CLR__dma8_sub1_descr__MAX 0x1
+#define R_IRQ_MASK2_CLR__dma8_sub0_descr__MAX 0x1
+#define R_IRQ_MASK2_CLR__dma9_eop__MAX 0x1
+#define R_IRQ_MASK2_CLR__dma9_descr__MAX 0x1
+#define R_IRQ_MASK2_CLR__dma8_eop__MAX 0x1
+#define R_IRQ_MASK2_CLR__dma8_descr__MAX 0x1
+#define R_IRQ_MASK2_CLR__dma7_eop__MAX 0x1
+#define R_IRQ_MASK2_CLR__dma7_descr__MAX 0x1
+#define R_IRQ_MASK2_CLR__dma6_eop__MAX 0x1
+#define R_IRQ_MASK2_CLR__dma6_descr__MAX 0x1
+#define R_IRQ_MASK2_CLR__dma5_eop__MAX 0x1
+#define R_IRQ_MASK2_CLR__dma5_descr__MAX 0x1
+#define R_IRQ_MASK2_CLR__dma4_eop__MAX 0x1
+#define R_IRQ_MASK2_CLR__dma4_descr__MAX 0x1
+#define R_IRQ_MASK2_CLR__dma3_eop__MAX 0x1
+#define R_IRQ_MASK2_CLR__dma3_descr__MAX 0x1
+#define R_IRQ_MASK2_CLR__dma2_eop__MAX 0x1
+#define R_IRQ_MASK2_CLR__dma2_descr__MAX 0x1
+#define R_IRQ_MASK2_CLR__dma1_eop__MAX 0x1
+#define R_IRQ_MASK2_CLR__dma1_descr__MAX 0x1
+#define R_IRQ_MASK2_CLR__dma0_eop__MAX 0x1
+#define R_IRQ_MASK2_CLR__dma0_descr__MAX 0x1
+
+#define R_IRQ_MASK2_CLR__dma8_sub3_descr__MIN 0
+#define R_IRQ_MASK2_CLR__dma8_sub2_descr__MIN 0
+#define R_IRQ_MASK2_CLR__dma8_sub1_descr__MIN 0
+#define R_IRQ_MASK2_CLR__dma8_sub0_descr__MIN 0
+#define R_IRQ_MASK2_CLR__dma9_eop__MIN 0
+#define R_IRQ_MASK2_CLR__dma9_descr__MIN 0
+#define R_IRQ_MASK2_CLR__dma8_eop__MIN 0
+#define R_IRQ_MASK2_CLR__dma8_descr__MIN 0
+#define R_IRQ_MASK2_CLR__dma7_eop__MIN 0
+#define R_IRQ_MASK2_CLR__dma7_descr__MIN 0
+#define R_IRQ_MASK2_CLR__dma6_eop__MIN 0
+#define R_IRQ_MASK2_CLR__dma6_descr__MIN 0
+#define R_IRQ_MASK2_CLR__dma5_eop__MIN 0
+#define R_IRQ_MASK2_CLR__dma5_descr__MIN 0
+#define R_IRQ_MASK2_CLR__dma4_eop__MIN 0
+#define R_IRQ_MASK2_CLR__dma4_descr__MIN 0
+#define R_IRQ_MASK2_CLR__dma3_eop__MIN 0
+#define R_IRQ_MASK2_CLR__dma3_descr__MIN 0
+#define R_IRQ_MASK2_CLR__dma2_eop__MIN 0
+#define R_IRQ_MASK2_CLR__dma2_descr__MIN 0
+#define R_IRQ_MASK2_CLR__dma1_eop__MIN 0
+#define R_IRQ_MASK2_CLR__dma1_descr__MIN 0
+#define R_IRQ_MASK2_CLR__dma0_eop__MIN 0
+#define R_IRQ_MASK2_CLR__dma0_descr__MIN 0
+
+#define R_IRQ_MASK2_CLR__dma8_sub3_descr__BITNR 23
+#define R_IRQ_MASK2_CLR__dma8_sub2_descr__BITNR 22
+#define R_IRQ_MASK2_CLR__dma8_sub1_descr__BITNR 21
+#define R_IRQ_MASK2_CLR__dma8_sub0_descr__BITNR 20
+#define R_IRQ_MASK2_CLR__dma9_eop__BITNR 19
+#define R_IRQ_MASK2_CLR__dma9_descr__BITNR 18
+#define R_IRQ_MASK2_CLR__dma8_eop__BITNR 17
+#define R_IRQ_MASK2_CLR__dma8_descr__BITNR 16
+#define R_IRQ_MASK2_CLR__dma7_eop__BITNR 15
+#define R_IRQ_MASK2_CLR__dma7_descr__BITNR 14
+#define R_IRQ_MASK2_CLR__dma6_eop__BITNR 13
+#define R_IRQ_MASK2_CLR__dma6_descr__BITNR 12
+#define R_IRQ_MASK2_CLR__dma5_eop__BITNR 11
+#define R_IRQ_MASK2_CLR__dma5_descr__BITNR 10
+#define R_IRQ_MASK2_CLR__dma4_eop__BITNR 9
+#define R_IRQ_MASK2_CLR__dma4_descr__BITNR 8
+#define R_IRQ_MASK2_CLR__dma3_eop__BITNR 7
+#define R_IRQ_MASK2_CLR__dma3_descr__BITNR 6
+#define R_IRQ_MASK2_CLR__dma2_eop__BITNR 5
+#define R_IRQ_MASK2_CLR__dma2_descr__BITNR 4
+#define R_IRQ_MASK2_CLR__dma1_eop__BITNR 3
+#define R_IRQ_MASK2_CLR__dma1_descr__BITNR 2
+#define R_IRQ_MASK2_CLR__dma0_eop__BITNR 1
+#define R_IRQ_MASK2_CLR__dma0_descr__BITNR 0
+
+#define R_IRQ_MASK2_CLR__dma8_sub3_descr__dma8_sub3_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_CLR__dma8_sub2_descr__dma8_sub2_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_CLR__dma8_sub1_descr__dma8_sub1_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_CLR__dma8_sub0_descr__dma8_sub0_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_CLR__dma9_eop__dma9_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_CLR__dma9_descr__dma9_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_CLR__dma8_eop__dma8_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_CLR__dma8_descr__dma8_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_CLR__dma7_eop__dma7_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_CLR__dma7_descr__dma7_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_CLR__dma6_eop__dma6_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_CLR__dma6_descr__dma6_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_CLR__dma5_eop__dma5_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_CLR__dma5_descr__dma5_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_CLR__dma4_eop__dma4_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_CLR__dma4_descr__dma4_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_CLR__dma3_eop__dma3_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_CLR__dma3_descr__dma3_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_CLR__dma2_eop__dma2_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_CLR__dma2_descr__dma2_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_CLR__dma1_eop__dma1_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_CLR__dma1_descr__dma1_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_CLR__dma0_eop__dma0_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_CLR__dma0_descr__dma0_descr__VAL REG_VAL_ENUM
+
+#define R_IRQ_MASK2_CLR__dma8_sub3_descr__dma8_sub3_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma8_sub3_descr__dma8_sub3_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma8_sub2_descr__dma8_sub2_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma8_sub2_descr__dma8_sub2_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma8_sub1_descr__dma8_sub1_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma8_sub1_descr__dma8_sub1_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma8_sub0_descr__dma8_sub0_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma8_sub0_descr__dma8_sub0_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma9_eop__dma9_eop__clr 1
+#define R_IRQ_MASK2_CLR__dma9_eop__dma9_eop__nop 0
+#define R_IRQ_MASK2_CLR__dma9_descr__dma9_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma9_descr__dma9_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma8_eop__dma8_eop__clr 1
+#define R_IRQ_MASK2_CLR__dma8_eop__dma8_eop__nop 0
+#define R_IRQ_MASK2_CLR__dma8_descr__dma8_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma8_descr__dma8_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma7_eop__dma7_eop__clr 1
+#define R_IRQ_MASK2_CLR__dma7_eop__dma7_eop__nop 0
+#define R_IRQ_MASK2_CLR__dma7_descr__dma7_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma7_descr__dma7_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma6_eop__dma6_eop__clr 1
+#define R_IRQ_MASK2_CLR__dma6_eop__dma6_eop__nop 0
+#define R_IRQ_MASK2_CLR__dma6_descr__dma6_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma6_descr__dma6_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma5_eop__dma5_eop__clr 1
+#define R_IRQ_MASK2_CLR__dma5_eop__dma5_eop__nop 0
+#define R_IRQ_MASK2_CLR__dma5_descr__dma5_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma5_descr__dma5_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma4_eop__dma4_eop__clr 1
+#define R_IRQ_MASK2_CLR__dma4_eop__dma4_eop__nop 0
+#define R_IRQ_MASK2_CLR__dma4_descr__dma4_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma4_descr__dma4_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma3_eop__dma3_eop__clr 1
+#define R_IRQ_MASK2_CLR__dma3_eop__dma3_eop__nop 0
+#define R_IRQ_MASK2_CLR__dma3_descr__dma3_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma3_descr__dma3_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma2_eop__dma2_eop__clr 1
+#define R_IRQ_MASK2_CLR__dma2_eop__dma2_eop__nop 0
+#define R_IRQ_MASK2_CLR__dma2_descr__dma2_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma2_descr__dma2_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma1_eop__dma1_eop__clr 1
+#define R_IRQ_MASK2_CLR__dma1_eop__dma1_eop__nop 0
+#define R_IRQ_MASK2_CLR__dma1_descr__dma1_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma1_descr__dma1_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma0_eop__dma0_eop__clr 1
+#define R_IRQ_MASK2_CLR__dma0_eop__dma0_eop__nop 0
+#define R_IRQ_MASK2_CLR__dma0_descr__dma0_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma0_descr__dma0_descr__nop 0
+
+#endif
+
+/*
+ * R_IRQ_MASK2_RD
+ * - type: RO
+ * - addr: 0xb00000d0
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+#define R_IRQ_MASK2_RD__ADDR (REG_TYPECAST_UDWORD 0xb00000d0)
+#define R_IRQ_MASK2_RD__SVAL REG_SVAL_SHADOW
+#define R_IRQ_MASK2_RD__SVAL_I REG_SVAL_I_SHADOW
+#define R_IRQ_MASK2_RD__TYPECAST REG_TYPECAST_UDWORD
+#define R_IRQ_MASK2_RD__TYPE (REG_UDWORD)
+#define R_IRQ_MASK2_RD__GET REG_GET_RO
+#define R_IRQ_MASK2_RD__IGET REG_IGET_RO
+#define R_IRQ_MASK2_RD__SET REG_SET_RO
+#define R_IRQ_MASK2_RD__ISET REG_ISET_RO
+#define R_IRQ_MASK2_RD__SET_VAL REG_SET_VAL_RO
+#define R_IRQ_MASK2_RD__EQL REG_EQL_RO
+#define R_IRQ_MASK2_RD__IEQL REG_IEQL_RO
+#define R_IRQ_MASK2_RD__RD REG_RD_RO
+#define R_IRQ_MASK2_RD__IRD REG_IRD_RO
+#define R_IRQ_MASK2_RD__WR REG_WR_RO
+#define R_IRQ_MASK2_RD__IWR REG_IWR_RO
+
+#define R_IRQ_MASK2_RD__READ(addr) \
+ (*(addr))
+
+#define R_IRQ_MASK2_RD__dma8_sub3_descr__dma8_sub3_descr__MASK 0x00800000U
+#define R_IRQ_MASK2_RD__dma8_sub2_descr__dma8_sub2_descr__MASK 0x00400000U
+#define R_IRQ_MASK2_RD__dma8_sub1_descr__dma8_sub1_descr__MASK 0x00200000U
+#define R_IRQ_MASK2_RD__dma8_sub0_descr__dma8_sub0_descr__MASK 0x00100000U
+#define R_IRQ_MASK2_RD__dma9_eop__dma9_eop__MASK 0x00080000U
+#define R_IRQ_MASK2_RD__dma9_descr__dma9_descr__MASK 0x00040000U
+#define R_IRQ_MASK2_RD__dma8_eop__dma8_eop__MASK 0x00020000U
+#define R_IRQ_MASK2_RD__dma8_descr__dma8_descr__MASK 0x00010000U
+#define R_IRQ_MASK2_RD__dma7_eop__dma7_eop__MASK 0x00008000U
+#define R_IRQ_MASK2_RD__dma7_descr__dma7_descr__MASK 0x00004000U
+#define R_IRQ_MASK2_RD__dma6_eop__dma6_eop__MASK 0x00002000U
+#define R_IRQ_MASK2_RD__dma6_descr__dma6_descr__MASK 0x00001000U
+#define R_IRQ_MASK2_RD__dma5_eop__dma5_eop__MASK 0x00000800U
+#define R_IRQ_MASK2_RD__dma5_descr__dma5_descr__MASK 0x00000400U
+#define R_IRQ_MASK2_RD__dma4_eop__dma4_eop__MASK 0x00000200U
+#define R_IRQ_MASK2_RD__dma4_descr__dma4_descr__MASK 0x00000100U
+#define R_IRQ_MASK2_RD__dma3_eop__dma3_eop__MASK 0x00000080U
+#define R_IRQ_MASK2_RD__dma3_descr__dma3_descr__MASK 0x00000040U
+#define R_IRQ_MASK2_RD__dma2_eop__dma2_eop__MASK 0x00000020U
+#define R_IRQ_MASK2_RD__dma2_descr__dma2_descr__MASK 0x00000010U
+#define R_IRQ_MASK2_RD__dma1_eop__dma1_eop__MASK 0x00000008U
+#define R_IRQ_MASK2_RD__dma1_descr__dma1_descr__MASK 0x00000004U
+#define R_IRQ_MASK2_RD__dma0_eop__dma0_eop__MASK 0x00000002U
+#define R_IRQ_MASK2_RD__dma0_descr__dma0_descr__MASK 0x00000001U
+
+#define R_IRQ_MASK2_RD__dma8_sub3_descr__MAX 0x1
+#define R_IRQ_MASK2_RD__dma8_sub2_descr__MAX 0x1
+#define R_IRQ_MASK2_RD__dma8_sub1_descr__MAX 0x1
+#define R_IRQ_MASK2_RD__dma8_sub0_descr__MAX 0x1
+#define R_IRQ_MASK2_RD__dma9_eop__MAX 0x1
+#define R_IRQ_MASK2_RD__dma9_descr__MAX 0x1
+#define R_IRQ_MASK2_RD__dma8_eop__MAX 0x1
+#define R_IRQ_MASK2_RD__dma8_descr__MAX 0x1
+#define R_IRQ_MASK2_RD__dma7_eop__MAX 0x1
+#define R_IRQ_MASK2_RD__dma7_descr__MAX 0x1
+#define R_IRQ_MASK2_RD__dma6_eop__MAX 0x1
+#define R_IRQ_MASK2_RD__dma6_descr__MAX 0x1
+#define R_IRQ_MASK2_RD__dma5_eop__MAX 0x1
+#define R_IRQ_MASK2_RD__dma5_descr__MAX 0x1
+#define R_IRQ_MASK2_RD__dma4_eop__MAX 0x1
+#define R_IRQ_MASK2_RD__dma4_descr__MAX 0x1
+#define R_IRQ_MASK2_RD__dma3_eop__MAX 0x1
+#define R_IRQ_MASK2_RD__dma3_descr__MAX 0x1
+#define R_IRQ_MASK2_RD__dma2_eop__MAX 0x1
+#define R_IRQ_MASK2_RD__dma2_descr__MAX 0x1
+#define R_IRQ_MASK2_RD__dma1_eop__MAX 0x1
+#define R_IRQ_MASK2_RD__dma1_descr__MAX 0x1
+#define R_IRQ_MASK2_RD__dma0_eop__MAX 0x1
+#define R_IRQ_MASK2_RD__dma0_descr__MAX 0x1
+
+#define R_IRQ_MASK2_RD__dma8_sub3_descr__MIN 0
+#define R_IRQ_MASK2_RD__dma8_sub2_descr__MIN 0
+#define R_IRQ_MASK2_RD__dma8_sub1_descr__MIN 0
+#define R_IRQ_MASK2_RD__dma8_sub0_descr__MIN 0
+#define R_IRQ_MASK2_RD__dma9_eop__MIN 0
+#define R_IRQ_MASK2_RD__dma9_descr__MIN 0
+#define R_IRQ_MASK2_RD__dma8_eop__MIN 0
+#define R_IRQ_MASK2_RD__dma8_descr__MIN 0
+#define R_IRQ_MASK2_RD__dma7_eop__MIN 0
+#define R_IRQ_MASK2_RD__dma7_descr__MIN 0
+#define R_IRQ_MASK2_RD__dma6_eop__MIN 0
+#define R_IRQ_MASK2_RD__dma6_descr__MIN 0
+#define R_IRQ_MASK2_RD__dma5_eop__MIN 0
+#define R_IRQ_MASK2_RD__dma5_descr__MIN 0
+#define R_IRQ_MASK2_RD__dma4_eop__MIN 0
+#define R_IRQ_MASK2_RD__dma4_descr__MIN 0
+#define R_IRQ_MASK2_RD__dma3_eop__MIN 0
+#define R_IRQ_MASK2_RD__dma3_descr__MIN 0
+#define R_IRQ_MASK2_RD__dma2_eop__MIN 0
+#define R_IRQ_MASK2_RD__dma2_descr__MIN 0
+#define R_IRQ_MASK2_RD__dma1_eop__MIN 0
+#define R_IRQ_MASK2_RD__dma1_descr__MIN 0
+#define R_IRQ_MASK2_RD__dma0_eop__MIN 0
+#define R_IRQ_MASK2_RD__dma0_descr__MIN 0
+
+#define R_IRQ_MASK2_RD__dma8_sub3_descr__BITNR 23
+#define R_IRQ_MASK2_RD__dma8_sub2_descr__BITNR 22
+#define R_IRQ_MASK2_RD__dma8_sub1_descr__BITNR 21
+#define R_IRQ_MASK2_RD__dma8_sub0_descr__BITNR 20
+#define R_IRQ_MASK2_RD__dma9_eop__BITNR 19
+#define R_IRQ_MASK2_RD__dma9_descr__BITNR 18
+#define R_IRQ_MASK2_RD__dma8_eop__BITNR 17
+#define R_IRQ_MASK2_RD__dma8_descr__BITNR 16
+#define R_IRQ_MASK2_RD__dma7_eop__BITNR 15
+#define R_IRQ_MASK2_RD__dma7_descr__BITNR 14
+#define R_IRQ_MASK2_RD__dma6_eop__BITNR 13
+#define R_IRQ_MASK2_RD__dma6_descr__BITNR 12
+#define R_IRQ_MASK2_RD__dma5_eop__BITNR 11
+#define R_IRQ_MASK2_RD__dma5_descr__BITNR 10
+#define R_IRQ_MASK2_RD__dma4_eop__BITNR 9
+#define R_IRQ_MASK2_RD__dma4_descr__BITNR 8
+#define R_IRQ_MASK2_RD__dma3_eop__BITNR 7
+#define R_IRQ_MASK2_RD__dma3_descr__BITNR 6
+#define R_IRQ_MASK2_RD__dma2_eop__BITNR 5
+#define R_IRQ_MASK2_RD__dma2_descr__BITNR 4
+#define R_IRQ_MASK2_RD__dma1_eop__BITNR 3
+#define R_IRQ_MASK2_RD__dma1_descr__BITNR 2
+#define R_IRQ_MASK2_RD__dma0_eop__BITNR 1
+#define R_IRQ_MASK2_RD__dma0_descr__BITNR 0
+
+#define R_IRQ_MASK2_RD__dma8_sub3_descr__dma8_sub3_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_RD__dma8_sub2_descr__dma8_sub2_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_RD__dma8_sub1_descr__dma8_sub1_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_RD__dma8_sub0_descr__dma8_sub0_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_RD__dma9_eop__dma9_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_RD__dma9_descr__dma9_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_RD__dma8_eop__dma8_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_RD__dma8_descr__dma8_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_RD__dma7_eop__dma7_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_RD__dma7_descr__dma7_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_RD__dma6_eop__dma6_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_RD__dma6_descr__dma6_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_RD__dma5_eop__dma5_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_RD__dma5_descr__dma5_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_RD__dma4_eop__dma4_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_RD__dma4_descr__dma4_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_RD__dma3_eop__dma3_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_RD__dma3_descr__dma3_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_RD__dma2_eop__dma2_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_RD__dma2_descr__dma2_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_RD__dma1_eop__dma1_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_RD__dma1_descr__dma1_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_RD__dma0_eop__dma0_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_RD__dma0_descr__dma0_descr__VAL REG_VAL_ENUM
+
+#define R_IRQ_MASK2_RD__dma8_sub3_descr__dma8_sub3_descr__active 1
+#define R_IRQ_MASK2_RD__dma8_sub3_descr__dma8_sub3_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma8_sub2_descr__dma8_sub2_descr__active 1
+#define R_IRQ_MASK2_RD__dma8_sub2_descr__dma8_sub2_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma8_sub1_descr__dma8_sub1_descr__active 1
+#define R_IRQ_MASK2_RD__dma8_sub1_descr__dma8_sub1_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma8_sub0_descr__dma8_sub0_descr__active 1
+#define R_IRQ_MASK2_RD__dma8_sub0_descr__dma8_sub0_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma9_eop__dma9_eop__active 1
+#define R_IRQ_MASK2_RD__dma9_eop__dma9_eop__inactive 0
+#define R_IRQ_MASK2_RD__dma9_descr__dma9_descr__active 1
+#define R_IRQ_MASK2_RD__dma9_descr__dma9_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma8_eop__dma8_eop__active 1
+#define R_IRQ_MASK2_RD__dma8_eop__dma8_eop__inactive 0
+#define R_IRQ_MASK2_RD__dma8_descr__dma8_descr__active 1
+#define R_IRQ_MASK2_RD__dma8_descr__dma8_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma7_eop__dma7_eop__active 1
+#define R_IRQ_MASK2_RD__dma7_eop__dma7_eop__inactive 0
+#define R_IRQ_MASK2_RD__dma7_descr__dma7_descr__active 1
+#define R_IRQ_MASK2_RD__dma7_descr__dma7_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma6_eop__dma6_eop__active 1
+#define R_IRQ_MASK2_RD__dma6_eop__dma6_eop__inactive 0
+#define R_IRQ_MASK2_RD__dma6_descr__dma6_descr__active 1
+#define R_IRQ_MASK2_RD__dma6_descr__dma6_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma5_eop__dma5_eop__active 1
+#define R_IRQ_MASK2_RD__dma5_eop__dma5_eop__inactive 0
+#define R_IRQ_MASK2_RD__dma5_descr__dma5_descr__active 1
+#define R_IRQ_MASK2_RD__dma5_descr__dma5_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma4_eop__dma4_eop__active 1
+#define R_IRQ_MASK2_RD__dma4_eop__dma4_eop__inactive 0
+#define R_IRQ_MASK2_RD__dma4_descr__dma4_descr__active 1
+#define R_IRQ_MASK2_RD__dma4_descr__dma4_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma3_eop__dma3_eop__active 1
+#define R_IRQ_MASK2_RD__dma3_eop__dma3_eop__inactive 0
+#define R_IRQ_MASK2_RD__dma3_descr__dma3_descr__active 1
+#define R_IRQ_MASK2_RD__dma3_descr__dma3_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma2_eop__dma2_eop__active 1
+#define R_IRQ_MASK2_RD__dma2_eop__dma2_eop__inactive 0
+#define R_IRQ_MASK2_RD__dma2_descr__dma2_descr__active 1
+#define R_IRQ_MASK2_RD__dma2_descr__dma2_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma1_eop__dma1_eop__active 1
+#define R_IRQ_MASK2_RD__dma1_eop__dma1_eop__inactive 0
+#define R_IRQ_MASK2_RD__dma1_descr__dma1_descr__active 1
+#define R_IRQ_MASK2_RD__dma1_descr__dma1_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma0_eop__dma0_eop__active 1
+#define R_IRQ_MASK2_RD__dma0_eop__dma0_eop__inactive 0
+#define R_IRQ_MASK2_RD__dma0_descr__dma0_descr__active 1
+#define R_IRQ_MASK2_RD__dma0_descr__dma0_descr__inactive 0
+
+#endif
+
+/*
+ * R_IRQ_MASK2_SET
+ * - type: WO
+ * - addr: 0xb00000d4
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+#define R_IRQ_MASK2_SET__ADDR (REG_TYPECAST_UDWORD 0xb00000d4)
+
+#ifndef REG_NO_SHADOW
+#define R_IRQ_MASK2_SET__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_IRQ_MASK2_SET + 0))
+#define R_IRQ_MASK2_SET__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_IRQ_MASK2_SET + 0))
+#else /* REG_NO_SHADOW */
+#define R_IRQ_MASK2_SET__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_IRQ_MASK2_SET__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_IRQ_MASK2_SET__STYPECAST REG_STYPECAST_UDWORD
+#define R_IRQ_MASK2_SET__SVAL REG_SVAL_ZERO
+#define R_IRQ_MASK2_SET__SVAL_I REG_SVAL_I_ZERO
+#define R_IRQ_MASK2_SET__TYPECAST REG_TYPECAST_UDWORD
+#define R_IRQ_MASK2_SET__TYPE (REG_UDWORD)
+#define R_IRQ_MASK2_SET__GET REG_GET_WO
+#define R_IRQ_MASK2_SET__IGET REG_IGET_WO
+#define R_IRQ_MASK2_SET__SET REG_SET_WO
+#define R_IRQ_MASK2_SET__ISET REG_ISET_WO
+#define R_IRQ_MASK2_SET__SET_VAL REG_SET_VAL_WO
+#define R_IRQ_MASK2_SET__EQL REG_EQL_WO
+#define R_IRQ_MASK2_SET__IEQL REG_IEQL_WO
+#define R_IRQ_MASK2_SET__RD REG_RD_WO
+#define R_IRQ_MASK2_SET__IRD REG_IRD_WO
+#define R_IRQ_MASK2_SET__WR REG_WR_WO
+#define R_IRQ_MASK2_SET__IWR REG_IWR_WO
+
+#define R_IRQ_MASK2_SET__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_IRQ_MASK2_SET__dma8_sub3_descr__dma8_sub3_descr__MASK 0x00800000U
+#define R_IRQ_MASK2_SET__dma8_sub2_descr__dma8_sub2_descr__MASK 0x00400000U
+#define R_IRQ_MASK2_SET__dma8_sub1_descr__dma8_sub1_descr__MASK 0x00200000U
+#define R_IRQ_MASK2_SET__dma8_sub0_descr__dma8_sub0_descr__MASK 0x00100000U
+#define R_IRQ_MASK2_SET__dma9_eop__dma9_eop__MASK 0x00080000U
+#define R_IRQ_MASK2_SET__dma9_descr__dma9_descr__MASK 0x00040000U
+#define R_IRQ_MASK2_SET__dma8_eop__dma8_eop__MASK 0x00020000U
+#define R_IRQ_MASK2_SET__dma8_descr__dma8_descr__MASK 0x00010000U
+#define R_IRQ_MASK2_SET__dma7_eop__dma7_eop__MASK 0x00008000U
+#define R_IRQ_MASK2_SET__dma7_descr__dma7_descr__MASK 0x00004000U
+#define R_IRQ_MASK2_SET__dma6_eop__dma6_eop__MASK 0x00002000U
+#define R_IRQ_MASK2_SET__dma6_descr__dma6_descr__MASK 0x00001000U
+#define R_IRQ_MASK2_SET__dma5_eop__dma5_eop__MASK 0x00000800U
+#define R_IRQ_MASK2_SET__dma5_descr__dma5_descr__MASK 0x00000400U
+#define R_IRQ_MASK2_SET__dma4_eop__dma4_eop__MASK 0x00000200U
+#define R_IRQ_MASK2_SET__dma4_descr__dma4_descr__MASK 0x00000100U
+#define R_IRQ_MASK2_SET__dma3_eop__dma3_eop__MASK 0x00000080U
+#define R_IRQ_MASK2_SET__dma3_descr__dma3_descr__MASK 0x00000040U
+#define R_IRQ_MASK2_SET__dma2_eop__dma2_eop__MASK 0x00000020U
+#define R_IRQ_MASK2_SET__dma2_descr__dma2_descr__MASK 0x00000010U
+#define R_IRQ_MASK2_SET__dma1_eop__dma1_eop__MASK 0x00000008U
+#define R_IRQ_MASK2_SET__dma1_descr__dma1_descr__MASK 0x00000004U
+#define R_IRQ_MASK2_SET__dma0_eop__dma0_eop__MASK 0x00000002U
+#define R_IRQ_MASK2_SET__dma0_descr__dma0_descr__MASK 0x00000001U
+
+#define R_IRQ_MASK2_SET__dma8_sub3_descr__MAX 0x1
+#define R_IRQ_MASK2_SET__dma8_sub2_descr__MAX 0x1
+#define R_IRQ_MASK2_SET__dma8_sub1_descr__MAX 0x1
+#define R_IRQ_MASK2_SET__dma8_sub0_descr__MAX 0x1
+#define R_IRQ_MASK2_SET__dma9_eop__MAX 0x1
+#define R_IRQ_MASK2_SET__dma9_descr__MAX 0x1
+#define R_IRQ_MASK2_SET__dma8_eop__MAX 0x1
+#define R_IRQ_MASK2_SET__dma8_descr__MAX 0x1
+#define R_IRQ_MASK2_SET__dma7_eop__MAX 0x1
+#define R_IRQ_MASK2_SET__dma7_descr__MAX 0x1
+#define R_IRQ_MASK2_SET__dma6_eop__MAX 0x1
+#define R_IRQ_MASK2_SET__dma6_descr__MAX 0x1
+#define R_IRQ_MASK2_SET__dma5_eop__MAX 0x1
+#define R_IRQ_MASK2_SET__dma5_descr__MAX 0x1
+#define R_IRQ_MASK2_SET__dma4_eop__MAX 0x1
+#define R_IRQ_MASK2_SET__dma4_descr__MAX 0x1
+#define R_IRQ_MASK2_SET__dma3_eop__MAX 0x1
+#define R_IRQ_MASK2_SET__dma3_descr__MAX 0x1
+#define R_IRQ_MASK2_SET__dma2_eop__MAX 0x1
+#define R_IRQ_MASK2_SET__dma2_descr__MAX 0x1
+#define R_IRQ_MASK2_SET__dma1_eop__MAX 0x1
+#define R_IRQ_MASK2_SET__dma1_descr__MAX 0x1
+#define R_IRQ_MASK2_SET__dma0_eop__MAX 0x1
+#define R_IRQ_MASK2_SET__dma0_descr__MAX 0x1
+
+#define R_IRQ_MASK2_SET__dma8_sub3_descr__MIN 0
+#define R_IRQ_MASK2_SET__dma8_sub2_descr__MIN 0
+#define R_IRQ_MASK2_SET__dma8_sub1_descr__MIN 0
+#define R_IRQ_MASK2_SET__dma8_sub0_descr__MIN 0
+#define R_IRQ_MASK2_SET__dma9_eop__MIN 0
+#define R_IRQ_MASK2_SET__dma9_descr__MIN 0
+#define R_IRQ_MASK2_SET__dma8_eop__MIN 0
+#define R_IRQ_MASK2_SET__dma8_descr__MIN 0
+#define R_IRQ_MASK2_SET__dma7_eop__MIN 0
+#define R_IRQ_MASK2_SET__dma7_descr__MIN 0
+#define R_IRQ_MASK2_SET__dma6_eop__MIN 0
+#define R_IRQ_MASK2_SET__dma6_descr__MIN 0
+#define R_IRQ_MASK2_SET__dma5_eop__MIN 0
+#define R_IRQ_MASK2_SET__dma5_descr__MIN 0
+#define R_IRQ_MASK2_SET__dma4_eop__MIN 0
+#define R_IRQ_MASK2_SET__dma4_descr__MIN 0
+#define R_IRQ_MASK2_SET__dma3_eop__MIN 0
+#define R_IRQ_MASK2_SET__dma3_descr__MIN 0
+#define R_IRQ_MASK2_SET__dma2_eop__MIN 0
+#define R_IRQ_MASK2_SET__dma2_descr__MIN 0
+#define R_IRQ_MASK2_SET__dma1_eop__MIN 0
+#define R_IRQ_MASK2_SET__dma1_descr__MIN 0
+#define R_IRQ_MASK2_SET__dma0_eop__MIN 0
+#define R_IRQ_MASK2_SET__dma0_descr__MIN 0
+
+#define R_IRQ_MASK2_SET__dma8_sub3_descr__BITNR 23
+#define R_IRQ_MASK2_SET__dma8_sub2_descr__BITNR 22
+#define R_IRQ_MASK2_SET__dma8_sub1_descr__BITNR 21
+#define R_IRQ_MASK2_SET__dma8_sub0_descr__BITNR 20
+#define R_IRQ_MASK2_SET__dma9_eop__BITNR 19
+#define R_IRQ_MASK2_SET__dma9_descr__BITNR 18
+#define R_IRQ_MASK2_SET__dma8_eop__BITNR 17
+#define R_IRQ_MASK2_SET__dma8_descr__BITNR 16
+#define R_IRQ_MASK2_SET__dma7_eop__BITNR 15
+#define R_IRQ_MASK2_SET__dma7_descr__BITNR 14
+#define R_IRQ_MASK2_SET__dma6_eop__BITNR 13
+#define R_IRQ_MASK2_SET__dma6_descr__BITNR 12
+#define R_IRQ_MASK2_SET__dma5_eop__BITNR 11
+#define R_IRQ_MASK2_SET__dma5_descr__BITNR 10
+#define R_IRQ_MASK2_SET__dma4_eop__BITNR 9
+#define R_IRQ_MASK2_SET__dma4_descr__BITNR 8
+#define R_IRQ_MASK2_SET__dma3_eop__BITNR 7
+#define R_IRQ_MASK2_SET__dma3_descr__BITNR 6
+#define R_IRQ_MASK2_SET__dma2_eop__BITNR 5
+#define R_IRQ_MASK2_SET__dma2_descr__BITNR 4
+#define R_IRQ_MASK2_SET__dma1_eop__BITNR 3
+#define R_IRQ_MASK2_SET__dma1_descr__BITNR 2
+#define R_IRQ_MASK2_SET__dma0_eop__BITNR 1
+#define R_IRQ_MASK2_SET__dma0_descr__BITNR 0
+
+#define R_IRQ_MASK2_SET__dma8_sub3_descr__dma8_sub3_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_SET__dma8_sub2_descr__dma8_sub2_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_SET__dma8_sub1_descr__dma8_sub1_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_SET__dma8_sub0_descr__dma8_sub0_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_SET__dma9_eop__dma9_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_SET__dma9_descr__dma9_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_SET__dma8_eop__dma8_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_SET__dma8_descr__dma8_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_SET__dma7_eop__dma7_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_SET__dma7_descr__dma7_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_SET__dma6_eop__dma6_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_SET__dma6_descr__dma6_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_SET__dma5_eop__dma5_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_SET__dma5_descr__dma5_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_SET__dma4_eop__dma4_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_SET__dma4_descr__dma4_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_SET__dma3_eop__dma3_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_SET__dma3_descr__dma3_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_SET__dma2_eop__dma2_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_SET__dma2_descr__dma2_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_SET__dma1_eop__dma1_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_SET__dma1_descr__dma1_descr__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_SET__dma0_eop__dma0_eop__VAL REG_VAL_ENUM
+#define R_IRQ_MASK2_SET__dma0_descr__dma0_descr__VAL REG_VAL_ENUM
+
+#define R_IRQ_MASK2_SET__dma8_sub3_descr__dma8_sub3_descr__nop 0
+#define R_IRQ_MASK2_SET__dma8_sub3_descr__dma8_sub3_descr__set 1
+#define R_IRQ_MASK2_SET__dma8_sub2_descr__dma8_sub2_descr__nop 0
+#define R_IRQ_MASK2_SET__dma8_sub2_descr__dma8_sub2_descr__set 1
+#define R_IRQ_MASK2_SET__dma8_sub1_descr__dma8_sub1_descr__nop 0
+#define R_IRQ_MASK2_SET__dma8_sub1_descr__dma8_sub1_descr__set 1
+#define R_IRQ_MASK2_SET__dma8_sub0_descr__dma8_sub0_descr__nop 0
+#define R_IRQ_MASK2_SET__dma8_sub0_descr__dma8_sub0_descr__set 1
+#define R_IRQ_MASK2_SET__dma9_eop__dma9_eop__nop 0
+#define R_IRQ_MASK2_SET__dma9_eop__dma9_eop__set 1
+#define R_IRQ_MASK2_SET__dma9_descr__dma9_descr__nop 0
+#define R_IRQ_MASK2_SET__dma9_descr__dma9_descr__set 1
+#define R_IRQ_MASK2_SET__dma8_eop__dma8_eop__nop 0
+#define R_IRQ_MASK2_SET__dma8_eop__dma8_eop__set 1
+#define R_IRQ_MASK2_SET__dma8_descr__dma8_descr__nop 0
+#define R_IRQ_MASK2_SET__dma8_descr__dma8_descr__set 1
+#define R_IRQ_MASK2_SET__dma7_eop__dma7_eop__nop 0
+#define R_IRQ_MASK2_SET__dma7_eop__dma7_eop__set 1
+#define R_IRQ_MASK2_SET__dma7_descr__dma7_descr__nop 0
+#define R_IRQ_MASK2_SET__dma7_descr__dma7_descr__set 1
+#define R_IRQ_MASK2_SET__dma6_eop__dma6_eop__nop 0
+#define R_IRQ_MASK2_SET__dma6_eop__dma6_eop__set 1
+#define R_IRQ_MASK2_SET__dma6_descr__dma6_descr__nop 0
+#define R_IRQ_MASK2_SET__dma6_descr__dma6_descr__set 1
+#define R_IRQ_MASK2_SET__dma5_eop__dma5_eop__nop 0
+#define R_IRQ_MASK2_SET__dma5_eop__dma5_eop__set 1
+#define R_IRQ_MASK2_SET__dma5_descr__dma5_descr__nop 0
+#define R_IRQ_MASK2_SET__dma5_descr__dma5_descr__set 1
+#define R_IRQ_MASK2_SET__dma4_eop__dma4_eop__nop 0
+#define R_IRQ_MASK2_SET__dma4_eop__dma4_eop__set 1
+#define R_IRQ_MASK2_SET__dma4_descr__dma4_descr__nop 0
+#define R_IRQ_MASK2_SET__dma4_descr__dma4_descr__set 1
+#define R_IRQ_MASK2_SET__dma3_eop__dma3_eop__nop 0
+#define R_IRQ_MASK2_SET__dma3_eop__dma3_eop__set 1
+#define R_IRQ_MASK2_SET__dma3_descr__dma3_descr__nop 0
+#define R_IRQ_MASK2_SET__dma3_descr__dma3_descr__set 1
+#define R_IRQ_MASK2_SET__dma2_eop__dma2_eop__nop 0
+#define R_IRQ_MASK2_SET__dma2_eop__dma2_eop__set 1
+#define R_IRQ_MASK2_SET__dma2_descr__dma2_descr__nop 0
+#define R_IRQ_MASK2_SET__dma2_descr__dma2_descr__set 1
+#define R_IRQ_MASK2_SET__dma1_eop__dma1_eop__nop 0
+#define R_IRQ_MASK2_SET__dma1_eop__dma1_eop__set 1
+#define R_IRQ_MASK2_SET__dma1_descr__dma1_descr__nop 0
+#define R_IRQ_MASK2_SET__dma1_descr__dma1_descr__set 1
+#define R_IRQ_MASK2_SET__dma0_eop__dma0_eop__nop 0
+#define R_IRQ_MASK2_SET__dma0_eop__dma0_eop__set 1
+#define R_IRQ_MASK2_SET__dma0_descr__dma0_descr__nop 0
+#define R_IRQ_MASK2_SET__dma0_descr__dma0_descr__set 1
+
+#endif
+
+/*
+ * R_IRQ_READ0
+ * - type: RO
+ * - addr: 0xb00000c4
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+#define R_IRQ_READ0__ADDR (REG_TYPECAST_UDWORD 0xb00000c4)
+#define R_IRQ_READ0__SVAL REG_SVAL_SHADOW
+#define R_IRQ_READ0__SVAL_I REG_SVAL_I_SHADOW
+#define R_IRQ_READ0__TYPECAST REG_TYPECAST_UDWORD
+#define R_IRQ_READ0__TYPE (REG_UDWORD)
+#define R_IRQ_READ0__GET REG_GET_RO
+#define R_IRQ_READ0__IGET REG_IGET_RO
+#define R_IRQ_READ0__SET REG_SET_RO
+#define R_IRQ_READ0__ISET REG_ISET_RO
+#define R_IRQ_READ0__SET_VAL REG_SET_VAL_RO
+#define R_IRQ_READ0__EQL REG_EQL_RO
+#define R_IRQ_READ0__IEQL REG_IEQL_RO
+#define R_IRQ_READ0__RD REG_RD_RO
+#define R_IRQ_READ0__IRD REG_IRD_RO
+#define R_IRQ_READ0__WR REG_WR_RO
+#define R_IRQ_READ0__IWR REG_IWR_RO
+
+#define R_IRQ_READ0__READ(addr) \
+ (*(addr))
+
+#define R_IRQ_READ0__nmi_pin__nmi_pin__MASK 0x80000000U
+#define R_IRQ_READ0__watchdog_nmi__watchdog_nmi__MASK 0x40000000U
+#define R_IRQ_READ0__sqe_test_error__sqe_test_error__MASK 0x20000000U
+#define R_IRQ_READ0__carrier_loss__carrier_loss__MASK 0x10000000U
+#define R_IRQ_READ0__deferred__deferred__MASK 0x08000000U
+#define R_IRQ_READ0__late_col__late_col__MASK 0x04000000U
+#define R_IRQ_READ0__multiple_col__multiple_col__MASK 0x02000000U
+#define R_IRQ_READ0__single_col__single_col__MASK 0x01000000U
+#define R_IRQ_READ0__congestion__congestion__MASK 0x00800000U
+#define R_IRQ_READ0__oversize__oversize__MASK 0x00400000U
+#define R_IRQ_READ0__alignment_error__alignment_error__MASK 0x00200000U
+#define R_IRQ_READ0__crc_error__crc_error__MASK 0x00100000U
+#define R_IRQ_READ0__overrun__overrun__MASK 0x00080000U
+#define R_IRQ_READ0__underrun__underrun__MASK 0x00040000U
+#define R_IRQ_READ0__excessive_col__excessive_col__MASK 0x00020000U
+#define R_IRQ_READ0__mdio__mdio__MASK 0x00010000U
+#define R_IRQ_READ0__ata_drq3__ata_drq3__MASK 0x00008000U
+#define R_IRQ_READ0__ata_drq2__ata_drq2__MASK 0x00004000U
+#define R_IRQ_READ0__ata_drq1__ata_drq1__MASK 0x00002000U
+#define R_IRQ_READ0__ata_drq0__ata_drq0__MASK 0x00001000U
+#define R_IRQ_READ0__par0_ecp_cmd__par0_ecp_cmd__MASK 0x00000800U
+#define R_IRQ_READ0__ata_irq3__ata_irq3__MASK 0x00000800U
+#define R_IRQ_READ0__par0_ecp_cmd__ata_irq3__MASK 0x00000800U
+#define R_IRQ_READ0__par0_peri__par0_peri__MASK 0x00000400U
+#define R_IRQ_READ0__ata_irq2__ata_irq2__MASK 0x00000400U
+#define R_IRQ_READ0__par0_peri__ata_irq2__MASK 0x00000400U
+#define R_IRQ_READ0__par0_data__par0_data__MASK 0x00000200U
+#define R_IRQ_READ0__ata_irq1__ata_irq1__MASK 0x00000200U
+#define R_IRQ_READ0__par0_data__ata_irq1__MASK 0x00000200U
+#define R_IRQ_READ0__par0_ready__par0_ready__MASK 0x00000100U
+#define R_IRQ_READ0__ata_irq0__ata_irq0__MASK 0x00000100U
+#define R_IRQ_READ0__par0_ready__ata_irq0__MASK 0x00000100U
+#define R_IRQ_READ0__mio__mio__MASK 0x00000100U
+#define R_IRQ_READ0__par0_ready__mio__MASK 0x00000100U
+#define R_IRQ_READ0__scsi0__scsi0__MASK 0x00000100U
+#define R_IRQ_READ0__par0_ready__scsi0__MASK 0x00000100U
+#define R_IRQ_READ0__ata_dmaend__ata_dmaend__MASK 0x00000080U
+#define R_IRQ_READ0__irq_ext_vector_nr__irq_ext_vector_nr__MASK 0x00000020U
+#define R_IRQ_READ0__irq_int_vector_nr__irq_int_vector_nr__MASK 0x00000010U
+#define R_IRQ_READ0__ext_dma1__ext_dma1__MASK 0x00000008U
+#define R_IRQ_READ0__ext_dma0__ext_dma0__MASK 0x00000004U
+#define R_IRQ_READ0__timer1__timer1__MASK 0x00000002U
+#define R_IRQ_READ0__timer0__timer0__MASK 0x00000001U
+
+#define R_IRQ_READ0__nmi_pin__MAX 0x1
+#define R_IRQ_READ0__watchdog_nmi__MAX 0x1
+#define R_IRQ_READ0__sqe_test_error__MAX 0x1
+#define R_IRQ_READ0__carrier_loss__MAX 0x1
+#define R_IRQ_READ0__deferred__MAX 0x1
+#define R_IRQ_READ0__late_col__MAX 0x1
+#define R_IRQ_READ0__multiple_col__MAX 0x1
+#define R_IRQ_READ0__single_col__MAX 0x1
+#define R_IRQ_READ0__congestion__MAX 0x1
+#define R_IRQ_READ0__oversize__MAX 0x1
+#define R_IRQ_READ0__alignment_error__MAX 0x1
+#define R_IRQ_READ0__crc_error__MAX 0x1
+#define R_IRQ_READ0__overrun__MAX 0x1
+#define R_IRQ_READ0__underrun__MAX 0x1
+#define R_IRQ_READ0__excessive_col__MAX 0x1
+#define R_IRQ_READ0__mdio__MAX 0x1
+#define R_IRQ_READ0__ata_drq3__MAX 0x1
+#define R_IRQ_READ0__ata_drq2__MAX 0x1
+#define R_IRQ_READ0__ata_drq1__MAX 0x1
+#define R_IRQ_READ0__ata_drq0__MAX 0x1
+#define R_IRQ_READ0__par0_ecp_cmd__MAX 0x1
+#define R_IRQ_READ0__ata_irq3__MAX 0x1
+#define R_IRQ_READ0__par0_peri__MAX 0x1
+#define R_IRQ_READ0__ata_irq2__MAX 0x1
+#define R_IRQ_READ0__par0_data__MAX 0x1
+#define R_IRQ_READ0__ata_irq1__MAX 0x1
+#define R_IRQ_READ0__par0_ready__MAX 0x1
+#define R_IRQ_READ0__ata_irq0__MAX 0x1
+#define R_IRQ_READ0__mio__MAX 0x1
+#define R_IRQ_READ0__scsi0__MAX 0x1
+#define R_IRQ_READ0__ata_dmaend__MAX 0x1
+#define R_IRQ_READ0__irq_ext_vector_nr__MAX 0x1
+#define R_IRQ_READ0__irq_int_vector_nr__MAX 0x1
+#define R_IRQ_READ0__ext_dma1__MAX 0x1
+#define R_IRQ_READ0__ext_dma0__MAX 0x1
+#define R_IRQ_READ0__timer1__MAX 0x1
+#define R_IRQ_READ0__timer0__MAX 0x1
+
+#define R_IRQ_READ0__nmi_pin__MIN 0
+#define R_IRQ_READ0__watchdog_nmi__MIN 0
+#define R_IRQ_READ0__sqe_test_error__MIN 0
+#define R_IRQ_READ0__carrier_loss__MIN 0
+#define R_IRQ_READ0__deferred__MIN 0
+#define R_IRQ_READ0__late_col__MIN 0
+#define R_IRQ_READ0__multiple_col__MIN 0
+#define R_IRQ_READ0__single_col__MIN 0
+#define R_IRQ_READ0__congestion__MIN 0
+#define R_IRQ_READ0__oversize__MIN 0
+#define R_IRQ_READ0__alignment_error__MIN 0
+#define R_IRQ_READ0__crc_error__MIN 0
+#define R_IRQ_READ0__overrun__MIN 0
+#define R_IRQ_READ0__underrun__MIN 0
+#define R_IRQ_READ0__excessive_col__MIN 0
+#define R_IRQ_READ0__mdio__MIN 0
+#define R_IRQ_READ0__ata_drq3__MIN 0
+#define R_IRQ_READ0__ata_drq2__MIN 0
+#define R_IRQ_READ0__ata_drq1__MIN 0
+#define R_IRQ_READ0__ata_drq0__MIN 0
+#define R_IRQ_READ0__par0_ecp_cmd__MIN 0
+#define R_IRQ_READ0__ata_irq3__MIN 0
+#define R_IRQ_READ0__par0_peri__MIN 0
+#define R_IRQ_READ0__ata_irq2__MIN 0
+#define R_IRQ_READ0__par0_data__MIN 0
+#define R_IRQ_READ0__ata_irq1__MIN 0
+#define R_IRQ_READ0__par0_ready__MIN 0
+#define R_IRQ_READ0__ata_irq0__MIN 0
+#define R_IRQ_READ0__mio__MIN 0
+#define R_IRQ_READ0__scsi0__MIN 0
+#define R_IRQ_READ0__ata_dmaend__MIN 0
+#define R_IRQ_READ0__irq_ext_vector_nr__MIN 0
+#define R_IRQ_READ0__irq_int_vector_nr__MIN 0
+#define R_IRQ_READ0__ext_dma1__MIN 0
+#define R_IRQ_READ0__ext_dma0__MIN 0
+#define R_IRQ_READ0__timer1__MIN 0
+#define R_IRQ_READ0__timer0__MIN 0
+
+#define R_IRQ_READ0__nmi_pin__BITNR 31
+#define R_IRQ_READ0__watchdog_nmi__BITNR 30
+#define R_IRQ_READ0__sqe_test_error__BITNR 29
+#define R_IRQ_READ0__carrier_loss__BITNR 28
+#define R_IRQ_READ0__deferred__BITNR 27
+#define R_IRQ_READ0__late_col__BITNR 26
+#define R_IRQ_READ0__multiple_col__BITNR 25
+#define R_IRQ_READ0__single_col__BITNR 24
+#define R_IRQ_READ0__congestion__BITNR 23
+#define R_IRQ_READ0__oversize__BITNR 22
+#define R_IRQ_READ0__alignment_error__BITNR 21
+#define R_IRQ_READ0__crc_error__BITNR 20
+#define R_IRQ_READ0__overrun__BITNR 19
+#define R_IRQ_READ0__underrun__BITNR 18
+#define R_IRQ_READ0__excessive_col__BITNR 17
+#define R_IRQ_READ0__mdio__BITNR 16
+#define R_IRQ_READ0__ata_drq3__BITNR 15
+#define R_IRQ_READ0__ata_drq2__BITNR 14
+#define R_IRQ_READ0__ata_drq1__BITNR 13
+#define R_IRQ_READ0__ata_drq0__BITNR 12
+#define R_IRQ_READ0__par0_ecp_cmd__BITNR 11
+#define R_IRQ_READ0__ata_irq3__BITNR 11
+#define R_IRQ_READ0__par0_peri__BITNR 10
+#define R_IRQ_READ0__ata_irq2__BITNR 10
+#define R_IRQ_READ0__par0_data__BITNR 9
+#define R_IRQ_READ0__ata_irq1__BITNR 9
+#define R_IRQ_READ0__par0_ready__BITNR 8
+#define R_IRQ_READ0__ata_irq0__BITNR 8
+#define R_IRQ_READ0__mio__BITNR 8
+#define R_IRQ_READ0__scsi0__BITNR 8
+#define R_IRQ_READ0__ata_dmaend__BITNR 7
+#define R_IRQ_READ0__irq_ext_vector_nr__BITNR 5
+#define R_IRQ_READ0__irq_int_vector_nr__BITNR 4
+#define R_IRQ_READ0__ext_dma1__BITNR 3
+#define R_IRQ_READ0__ext_dma0__BITNR 2
+#define R_IRQ_READ0__timer1__BITNR 1
+#define R_IRQ_READ0__timer0__BITNR 0
+
+#define R_IRQ_READ0__nmi_pin__nmi_pin__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__watchdog_nmi__watchdog_nmi__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__sqe_test_error__sqe_test_error__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__carrier_loss__carrier_loss__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__deferred__deferred__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__late_col__late_col__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__multiple_col__multiple_col__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__single_col__single_col__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__congestion__congestion__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__oversize__oversize__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__alignment_error__alignment_error__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__crc_error__crc_error__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__overrun__overrun__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__underrun__underrun__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__excessive_col__excessive_col__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__mdio__mdio__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__ata_drq3__ata_drq3__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__ata_drq2__ata_drq2__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__ata_drq1__ata_drq1__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__ata_drq0__ata_drq0__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__par0_ecp_cmd__par0_ecp_cmd__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__ata_irq3__ata_irq3__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__par0_ecp_cmd__ata_irq3__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__par0_peri__par0_peri__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__ata_irq2__ata_irq2__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__par0_peri__ata_irq2__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__par0_data__par0_data__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__ata_irq1__ata_irq1__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__par0_data__ata_irq1__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__par0_ready__par0_ready__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__ata_irq0__ata_irq0__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__par0_ready__ata_irq0__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__mio__mio__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__par0_ready__mio__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__scsi0__scsi0__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__par0_ready__scsi0__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__ata_dmaend__ata_dmaend__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__irq_ext_vector_nr__irq_ext_vector_nr__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__irq_int_vector_nr__irq_int_vector_nr__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__ext_dma1__ext_dma1__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__ext_dma0__ext_dma0__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__timer1__timer1__VAL REG_VAL_ENUM
+#define R_IRQ_READ0__timer0__timer0__VAL REG_VAL_ENUM
+
+#define R_IRQ_READ0__nmi_pin__nmi_pin__active 1
+#define R_IRQ_READ0__nmi_pin__nmi_pin__inactive 0
+#define R_IRQ_READ0__watchdog_nmi__watchdog_nmi__active 1
+#define R_IRQ_READ0__watchdog_nmi__watchdog_nmi__inactive 0
+#define R_IRQ_READ0__sqe_test_error__sqe_test_error__active 1
+#define R_IRQ_READ0__sqe_test_error__sqe_test_error__inactive 0
+#define R_IRQ_READ0__carrier_loss__carrier_loss__active 1
+#define R_IRQ_READ0__carrier_loss__carrier_loss__inactive 0
+#define R_IRQ_READ0__deferred__deferred__active 1
+#define R_IRQ_READ0__deferred__deferred__inactive 0
+#define R_IRQ_READ0__late_col__late_col__active 1
+#define R_IRQ_READ0__late_col__late_col__inactive 0
+#define R_IRQ_READ0__multiple_col__multiple_col__active 1
+#define R_IRQ_READ0__multiple_col__multiple_col__inactive 0
+#define R_IRQ_READ0__single_col__single_col__active 1
+#define R_IRQ_READ0__single_col__single_col__inactive 0
+#define R_IRQ_READ0__congestion__congestion__active 1
+#define R_IRQ_READ0__congestion__congestion__inactive 0
+#define R_IRQ_READ0__oversize__oversize__active 1
+#define R_IRQ_READ0__oversize__oversize__inactive 0
+#define R_IRQ_READ0__alignment_error__alignment_error__active 1
+#define R_IRQ_READ0__alignment_error__alignment_error__inactive 0
+#define R_IRQ_READ0__crc_error__crc_error__active 1
+#define R_IRQ_READ0__crc_error__crc_error__inactive 0
+#define R_IRQ_READ0__overrun__overrun__active 1
+#define R_IRQ_READ0__overrun__overrun__inactive 0
+#define R_IRQ_READ0__underrun__underrun__active 1
+#define R_IRQ_READ0__underrun__underrun__inactive 0
+#define R_IRQ_READ0__excessive_col__excessive_col__active 1
+#define R_IRQ_READ0__excessive_col__excessive_col__inactive 0
+#define R_IRQ_READ0__mdio__mdio__active 1
+#define R_IRQ_READ0__mdio__mdio__inactive 0
+#define R_IRQ_READ0__ata_drq3__ata_drq3__active 1
+#define R_IRQ_READ0__ata_drq3__ata_drq3__inactive 0
+#define R_IRQ_READ0__ata_drq2__ata_drq2__active 1
+#define R_IRQ_READ0__ata_drq2__ata_drq2__inactive 0
+#define R_IRQ_READ0__ata_drq1__ata_drq1__active 1
+#define R_IRQ_READ0__ata_drq1__ata_drq1__inactive 0
+#define R_IRQ_READ0__ata_drq0__ata_drq0__active 1
+#define R_IRQ_READ0__ata_drq0__ata_drq0__inactive 0
+#define R_IRQ_READ0__par0_ecp_cmd__par0_ecp_cmd__active 1
+#define R_IRQ_READ0__par0_ecp_cmd__par0_ecp_cmd__inactive 0
+#define R_IRQ_READ0__ata_irq3__ata_irq3__active 1
+#define R_IRQ_READ0__ata_irq3__ata_irq3__inactive 0
+#define R_IRQ_READ0__par0_peri__par0_peri__active 1
+#define R_IRQ_READ0__par0_peri__par0_peri__inactive 0
+#define R_IRQ_READ0__ata_irq2__ata_irq2__active 1
+#define R_IRQ_READ0__ata_irq2__ata_irq2__inactive 0
+#define R_IRQ_READ0__par0_data__par0_data__active 1
+#define R_IRQ_READ0__par0_data__par0_data__inactive 0
+#define R_IRQ_READ0__ata_irq1__ata_irq1__active 1
+#define R_IRQ_READ0__ata_irq1__ata_irq1__inactive 0
+#define R_IRQ_READ0__par0_ready__par0_ready__active 1
+#define R_IRQ_READ0__par0_ready__par0_ready__inactive 0
+#define R_IRQ_READ0__ata_irq0__ata_irq0__active 1
+#define R_IRQ_READ0__ata_irq0__ata_irq0__inactive 0
+#define R_IRQ_READ0__mio__mio__active 1
+#define R_IRQ_READ0__mio__mio__inactive 0
+#define R_IRQ_READ0__scsi0__scsi0__active 1
+#define R_IRQ_READ0__scsi0__scsi0__inactive 0
+#define R_IRQ_READ0__ata_dmaend__ata_dmaend__active 1
+#define R_IRQ_READ0__ata_dmaend__ata_dmaend__inactive 0
+#define R_IRQ_READ0__irq_ext_vector_nr__irq_ext_vector_nr__active 1
+#define R_IRQ_READ0__irq_ext_vector_nr__irq_ext_vector_nr__inactive 0
+#define R_IRQ_READ0__irq_int_vector_nr__irq_int_vector_nr__active 1
+#define R_IRQ_READ0__irq_int_vector_nr__irq_int_vector_nr__inactive 0
+#define R_IRQ_READ0__ext_dma1__ext_dma1__active 1
+#define R_IRQ_READ0__ext_dma1__ext_dma1__inactive 0
+#define R_IRQ_READ0__ext_dma0__ext_dma0__active 1
+#define R_IRQ_READ0__ext_dma0__ext_dma0__inactive 0
+#define R_IRQ_READ0__timer1__timer1__active 1
+#define R_IRQ_READ0__timer1__timer1__inactive 0
+#define R_IRQ_READ0__timer0__timer0__active 1
+#define R_IRQ_READ0__timer0__timer0__inactive 0
+
+#endif
+
+/*
+ * R_IRQ_READ1
+ * - type: RO
+ * - addr: 0xb00000cc
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+#define R_IRQ_READ1__ADDR (REG_TYPECAST_UDWORD 0xb00000cc)
+#define R_IRQ_READ1__SVAL REG_SVAL_SHADOW
+#define R_IRQ_READ1__SVAL_I REG_SVAL_I_SHADOW
+#define R_IRQ_READ1__TYPECAST REG_TYPECAST_UDWORD
+#define R_IRQ_READ1__TYPE (REG_UDWORD)
+#define R_IRQ_READ1__GET REG_GET_RO
+#define R_IRQ_READ1__IGET REG_IGET_RO
+#define R_IRQ_READ1__SET REG_SET_RO
+#define R_IRQ_READ1__ISET REG_ISET_RO
+#define R_IRQ_READ1__SET_VAL REG_SET_VAL_RO
+#define R_IRQ_READ1__EQL REG_EQL_RO
+#define R_IRQ_READ1__IEQL REG_IEQL_RO
+#define R_IRQ_READ1__RD REG_RD_RO
+#define R_IRQ_READ1__IRD REG_IRD_RO
+#define R_IRQ_READ1__WR REG_WR_RO
+#define R_IRQ_READ1__IWR REG_IWR_RO
+
+#define R_IRQ_READ1__READ(addr) \
+ (*(addr))
+
+#define R_IRQ_READ1__sw_int7__sw_int7__MASK 0x80000000U
+#define R_IRQ_READ1__sw_int6__sw_int6__MASK 0x40000000U
+#define R_IRQ_READ1__sw_int5__sw_int5__MASK 0x20000000U
+#define R_IRQ_READ1__sw_int4__sw_int4__MASK 0x10000000U
+#define R_IRQ_READ1__sw_int3__sw_int3__MASK 0x08000000U
+#define R_IRQ_READ1__sw_int2__sw_int2__MASK 0x04000000U
+#define R_IRQ_READ1__sw_int1__sw_int1__MASK 0x02000000U
+#define R_IRQ_READ1__sw_int0__sw_int0__MASK 0x01000000U
+#define R_IRQ_READ1__par1_ecp_cmd__par1_ecp_cmd__MASK 0x00080000U
+#define R_IRQ_READ1__par1_peri__par1_peri__MASK 0x00040000U
+#define R_IRQ_READ1__par1_data__par1_data__MASK 0x00020000U
+#define R_IRQ_READ1__par1_ready__par1_ready__MASK 0x00010000U
+#define R_IRQ_READ1__scsi1__scsi1__MASK 0x00010000U
+#define R_IRQ_READ1__par1_ready__scsi1__MASK 0x00010000U
+#define R_IRQ_READ1__ser3_ready__ser3_ready__MASK 0x00008000U
+#define R_IRQ_READ1__ser3_data__ser3_data__MASK 0x00004000U
+#define R_IRQ_READ1__ser2_ready__ser2_ready__MASK 0x00002000U
+#define R_IRQ_READ1__ser2_data__ser2_data__MASK 0x00001000U
+#define R_IRQ_READ1__ser1_ready__ser1_ready__MASK 0x00000800U
+#define R_IRQ_READ1__ser1_data__ser1_data__MASK 0x00000400U
+#define R_IRQ_READ1__ser0_ready__ser0_ready__MASK 0x00000200U
+#define R_IRQ_READ1__ser0_data__ser0_data__MASK 0x00000100U
+#define R_IRQ_READ1__pa7__pa7__MASK 0x00000080U
+#define R_IRQ_READ1__pa6__pa6__MASK 0x00000040U
+#define R_IRQ_READ1__pa5__pa5__MASK 0x00000020U
+#define R_IRQ_READ1__pa4__pa4__MASK 0x00000010U
+#define R_IRQ_READ1__pa3__pa3__MASK 0x00000008U
+#define R_IRQ_READ1__pa2__pa2__MASK 0x00000004U
+#define R_IRQ_READ1__pa1__pa1__MASK 0x00000002U
+#define R_IRQ_READ1__pa0__pa0__MASK 0x00000001U
+
+#define R_IRQ_READ1__sw_int7__MAX 0x1
+#define R_IRQ_READ1__sw_int6__MAX 0x1
+#define R_IRQ_READ1__sw_int5__MAX 0x1
+#define R_IRQ_READ1__sw_int4__MAX 0x1
+#define R_IRQ_READ1__sw_int3__MAX 0x1
+#define R_IRQ_READ1__sw_int2__MAX 0x1
+#define R_IRQ_READ1__sw_int1__MAX 0x1
+#define R_IRQ_READ1__sw_int0__MAX 0x1
+#define R_IRQ_READ1__par1_ecp_cmd__MAX 0x1
+#define R_IRQ_READ1__par1_peri__MAX 0x1
+#define R_IRQ_READ1__par1_data__MAX 0x1
+#define R_IRQ_READ1__par1_ready__MAX 0x1
+#define R_IRQ_READ1__scsi1__MAX 0x1
+#define R_IRQ_READ1__ser3_ready__MAX 0x1
+#define R_IRQ_READ1__ser3_data__MAX 0x1
+#define R_IRQ_READ1__ser2_ready__MAX 0x1
+#define R_IRQ_READ1__ser2_data__MAX 0x1
+#define R_IRQ_READ1__ser1_ready__MAX 0x1
+#define R_IRQ_READ1__ser1_data__MAX 0x1
+#define R_IRQ_READ1__ser0_ready__MAX 0x1
+#define R_IRQ_READ1__ser0_data__MAX 0x1
+#define R_IRQ_READ1__pa7__MAX 0x1
+#define R_IRQ_READ1__pa6__MAX 0x1
+#define R_IRQ_READ1__pa5__MAX 0x1
+#define R_IRQ_READ1__pa4__MAX 0x1
+#define R_IRQ_READ1__pa3__MAX 0x1
+#define R_IRQ_READ1__pa2__MAX 0x1
+#define R_IRQ_READ1__pa1__MAX 0x1
+#define R_IRQ_READ1__pa0__MAX 0x1
+
+#define R_IRQ_READ1__sw_int7__MIN 0
+#define R_IRQ_READ1__sw_int6__MIN 0
+#define R_IRQ_READ1__sw_int5__MIN 0
+#define R_IRQ_READ1__sw_int4__MIN 0
+#define R_IRQ_READ1__sw_int3__MIN 0
+#define R_IRQ_READ1__sw_int2__MIN 0
+#define R_IRQ_READ1__sw_int1__MIN 0
+#define R_IRQ_READ1__sw_int0__MIN 0
+#define R_IRQ_READ1__par1_ecp_cmd__MIN 0
+#define R_IRQ_READ1__par1_peri__MIN 0
+#define R_IRQ_READ1__par1_data__MIN 0
+#define R_IRQ_READ1__par1_ready__MIN 0
+#define R_IRQ_READ1__scsi1__MIN 0
+#define R_IRQ_READ1__ser3_ready__MIN 0
+#define R_IRQ_READ1__ser3_data__MIN 0
+#define R_IRQ_READ1__ser2_ready__MIN 0
+#define R_IRQ_READ1__ser2_data__MIN 0
+#define R_IRQ_READ1__ser1_ready__MIN 0
+#define R_IRQ_READ1__ser1_data__MIN 0
+#define R_IRQ_READ1__ser0_ready__MIN 0
+#define R_IRQ_READ1__ser0_data__MIN 0
+#define R_IRQ_READ1__pa7__MIN 0
+#define R_IRQ_READ1__pa6__MIN 0
+#define R_IRQ_READ1__pa5__MIN 0
+#define R_IRQ_READ1__pa4__MIN 0
+#define R_IRQ_READ1__pa3__MIN 0
+#define R_IRQ_READ1__pa2__MIN 0
+#define R_IRQ_READ1__pa1__MIN 0
+#define R_IRQ_READ1__pa0__MIN 0
+
+#define R_IRQ_READ1__sw_int7__BITNR 31
+#define R_IRQ_READ1__sw_int6__BITNR 30
+#define R_IRQ_READ1__sw_int5__BITNR 29
+#define R_IRQ_READ1__sw_int4__BITNR 28
+#define R_IRQ_READ1__sw_int3__BITNR 27
+#define R_IRQ_READ1__sw_int2__BITNR 26
+#define R_IRQ_READ1__sw_int1__BITNR 25
+#define R_IRQ_READ1__sw_int0__BITNR 24
+#define R_IRQ_READ1__par1_ecp_cmd__BITNR 19
+#define R_IRQ_READ1__par1_peri__BITNR 18
+#define R_IRQ_READ1__par1_data__BITNR 17
+#define R_IRQ_READ1__par1_ready__BITNR 16
+#define R_IRQ_READ1__scsi1__BITNR 16
+#define R_IRQ_READ1__ser3_ready__BITNR 15
+#define R_IRQ_READ1__ser3_data__BITNR 14
+#define R_IRQ_READ1__ser2_ready__BITNR 13
+#define R_IRQ_READ1__ser2_data__BITNR 12
+#define R_IRQ_READ1__ser1_ready__BITNR 11
+#define R_IRQ_READ1__ser1_data__BITNR 10
+#define R_IRQ_READ1__ser0_ready__BITNR 9
+#define R_IRQ_READ1__ser0_data__BITNR 8
+#define R_IRQ_READ1__pa7__BITNR 7
+#define R_IRQ_READ1__pa6__BITNR 6
+#define R_IRQ_READ1__pa5__BITNR 5
+#define R_IRQ_READ1__pa4__BITNR 4
+#define R_IRQ_READ1__pa3__BITNR 3
+#define R_IRQ_READ1__pa2__BITNR 2
+#define R_IRQ_READ1__pa1__BITNR 1
+#define R_IRQ_READ1__pa0__BITNR 0
+
+#define R_IRQ_READ1__sw_int7__sw_int7__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__sw_int6__sw_int6__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__sw_int5__sw_int5__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__sw_int4__sw_int4__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__sw_int3__sw_int3__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__sw_int2__sw_int2__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__sw_int1__sw_int1__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__sw_int0__sw_int0__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__par1_ecp_cmd__par1_ecp_cmd__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__par1_peri__par1_peri__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__par1_data__par1_data__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__par1_ready__par1_ready__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__scsi1__scsi1__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__par1_ready__scsi1__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__ser3_ready__ser3_ready__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__ser3_data__ser3_data__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__ser2_ready__ser2_ready__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__ser2_data__ser2_data__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__ser1_ready__ser1_ready__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__ser1_data__ser1_data__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__ser0_ready__ser0_ready__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__ser0_data__ser0_data__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__pa7__pa7__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__pa6__pa6__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__pa5__pa5__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__pa4__pa4__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__pa3__pa3__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__pa2__pa2__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__pa1__pa1__VAL REG_VAL_ENUM
+#define R_IRQ_READ1__pa0__pa0__VAL REG_VAL_ENUM
+
+#define R_IRQ_READ1__sw_int7__sw_int7__active 1
+#define R_IRQ_READ1__sw_int7__sw_int7__inactive 0
+#define R_IRQ_READ1__sw_int6__sw_int6__active 1
+#define R_IRQ_READ1__sw_int6__sw_int6__inactive 0
+#define R_IRQ_READ1__sw_int5__sw_int5__active 1
+#define R_IRQ_READ1__sw_int5__sw_int5__inactive 0
+#define R_IRQ_READ1__sw_int4__sw_int4__active 1
+#define R_IRQ_READ1__sw_int4__sw_int4__inactive 0
+#define R_IRQ_READ1__sw_int3__sw_int3__active 1
+#define R_IRQ_READ1__sw_int3__sw_int3__inactive 0
+#define R_IRQ_READ1__sw_int2__sw_int2__active 1
+#define R_IRQ_READ1__sw_int2__sw_int2__inactive 0
+#define R_IRQ_READ1__sw_int1__sw_int1__active 1
+#define R_IRQ_READ1__sw_int1__sw_int1__inactive 0
+#define R_IRQ_READ1__sw_int0__sw_int0__active 1
+#define R_IRQ_READ1__sw_int0__sw_int0__inactive 0
+#define R_IRQ_READ1__par1_ecp_cmd__par1_ecp_cmd__active 1
+#define R_IRQ_READ1__par1_ecp_cmd__par1_ecp_cmd__inactive 0
+#define R_IRQ_READ1__par1_peri__par1_peri__active 1
+#define R_IRQ_READ1__par1_peri__par1_peri__inactive 0
+#define R_IRQ_READ1__par1_data__par1_data__active 1
+#define R_IRQ_READ1__par1_data__par1_data__inactive 0
+#define R_IRQ_READ1__par1_ready__par1_ready__active 1
+#define R_IRQ_READ1__par1_ready__par1_ready__inactive 0
+#define R_IRQ_READ1__scsi1__scsi1__active 1
+#define R_IRQ_READ1__scsi1__scsi1__inactive 0
+#define R_IRQ_READ1__ser3_ready__ser3_ready__active 1
+#define R_IRQ_READ1__ser3_ready__ser3_ready__inactive 0
+#define R_IRQ_READ1__ser3_data__ser3_data__active 1
+#define R_IRQ_READ1__ser3_data__ser3_data__inactive 0
+#define R_IRQ_READ1__ser2_ready__ser2_ready__active 1
+#define R_IRQ_READ1__ser2_ready__ser2_ready__inactive 0
+#define R_IRQ_READ1__ser2_data__ser2_data__active 1
+#define R_IRQ_READ1__ser2_data__ser2_data__inactive 0
+#define R_IRQ_READ1__ser1_ready__ser1_ready__active 1
+#define R_IRQ_READ1__ser1_ready__ser1_ready__inactive 0
+#define R_IRQ_READ1__ser1_data__ser1_data__active 1
+#define R_IRQ_READ1__ser1_data__ser1_data__inactive 0
+#define R_IRQ_READ1__ser0_ready__ser0_ready__active 1
+#define R_IRQ_READ1__ser0_ready__ser0_ready__inactive 0
+#define R_IRQ_READ1__ser0_data__ser0_data__active 1
+#define R_IRQ_READ1__ser0_data__ser0_data__inactive 0
+#define R_IRQ_READ1__pa7__pa7__active 1
+#define R_IRQ_READ1__pa7__pa7__inactive 0
+#define R_IRQ_READ1__pa6__pa6__active 1
+#define R_IRQ_READ1__pa6__pa6__inactive 0
+#define R_IRQ_READ1__pa5__pa5__active 1
+#define R_IRQ_READ1__pa5__pa5__inactive 0
+#define R_IRQ_READ1__pa4__pa4__active 1
+#define R_IRQ_READ1__pa4__pa4__inactive 0
+#define R_IRQ_READ1__pa3__pa3__active 1
+#define R_IRQ_READ1__pa3__pa3__inactive 0
+#define R_IRQ_READ1__pa2__pa2__active 1
+#define R_IRQ_READ1__pa2__pa2__inactive 0
+#define R_IRQ_READ1__pa1__pa1__active 1
+#define R_IRQ_READ1__pa1__pa1__inactive 0
+#define R_IRQ_READ1__pa0__pa0__active 1
+#define R_IRQ_READ1__pa0__pa0__inactive 0
+
+#endif
+
+/*
+ * R_IRQ_READ2
+ * - type: RO
+ * - addr: 0xb00000d4
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+#define R_IRQ_READ2__ADDR (REG_TYPECAST_UDWORD 0xb00000d4)
+#define R_IRQ_READ2__SVAL REG_SVAL_SHADOW
+#define R_IRQ_READ2__SVAL_I REG_SVAL_I_SHADOW
+#define R_IRQ_READ2__TYPECAST REG_TYPECAST_UDWORD
+#define R_IRQ_READ2__TYPE (REG_UDWORD)
+#define R_IRQ_READ2__GET REG_GET_RO
+#define R_IRQ_READ2__IGET REG_IGET_RO
+#define R_IRQ_READ2__SET REG_SET_RO
+#define R_IRQ_READ2__ISET REG_ISET_RO
+#define R_IRQ_READ2__SET_VAL REG_SET_VAL_RO
+#define R_IRQ_READ2__EQL REG_EQL_RO
+#define R_IRQ_READ2__IEQL REG_IEQL_RO
+#define R_IRQ_READ2__RD REG_RD_RO
+#define R_IRQ_READ2__IRD REG_IRD_RO
+#define R_IRQ_READ2__WR REG_WR_RO
+#define R_IRQ_READ2__IWR REG_IWR_RO
+
+#define R_IRQ_READ2__READ(addr) \
+ (*(addr))
+
+#define R_IRQ_READ2__dma8_sub3_descr__dma8_sub3_descr__MASK 0x00800000U
+#define R_IRQ_READ2__dma8_sub2_descr__dma8_sub2_descr__MASK 0x00400000U
+#define R_IRQ_READ2__dma8_sub1_descr__dma8_sub1_descr__MASK 0x00200000U
+#define R_IRQ_READ2__dma8_sub0_descr__dma8_sub0_descr__MASK 0x00100000U
+#define R_IRQ_READ2__dma9_eop__dma9_eop__MASK 0x00080000U
+#define R_IRQ_READ2__dma9_descr__dma9_descr__MASK 0x00040000U
+#define R_IRQ_READ2__dma8_eop__dma8_eop__MASK 0x00020000U
+#define R_IRQ_READ2__dma8_descr__dma8_descr__MASK 0x00010000U
+#define R_IRQ_READ2__dma7_eop__dma7_eop__MASK 0x00008000U
+#define R_IRQ_READ2__dma7_descr__dma7_descr__MASK 0x00004000U
+#define R_IRQ_READ2__dma6_eop__dma6_eop__MASK 0x00002000U
+#define R_IRQ_READ2__dma6_descr__dma6_descr__MASK 0x00001000U
+#define R_IRQ_READ2__dma5_eop__dma5_eop__MASK 0x00000800U
+#define R_IRQ_READ2__dma5_descr__dma5_descr__MASK 0x00000400U
+#define R_IRQ_READ2__dma4_eop__dma4_eop__MASK 0x00000200U
+#define R_IRQ_READ2__dma4_descr__dma4_descr__MASK 0x00000100U
+#define R_IRQ_READ2__dma3_eop__dma3_eop__MASK 0x00000080U
+#define R_IRQ_READ2__dma3_descr__dma3_descr__MASK 0x00000040U
+#define R_IRQ_READ2__dma2_eop__dma2_eop__MASK 0x00000020U
+#define R_IRQ_READ2__dma2_descr__dma2_descr__MASK 0x00000010U
+#define R_IRQ_READ2__dma1_eop__dma1_eop__MASK 0x00000008U
+#define R_IRQ_READ2__dma1_descr__dma1_descr__MASK 0x00000004U
+#define R_IRQ_READ2__dma0_eop__dma0_eop__MASK 0x00000002U
+#define R_IRQ_READ2__dma0_descr__dma0_descr__MASK 0x00000001U
+
+#define R_IRQ_READ2__dma8_sub3_descr__MAX 0x1
+#define R_IRQ_READ2__dma8_sub2_descr__MAX 0x1
+#define R_IRQ_READ2__dma8_sub1_descr__MAX 0x1
+#define R_IRQ_READ2__dma8_sub0_descr__MAX 0x1
+#define R_IRQ_READ2__dma9_eop__MAX 0x1
+#define R_IRQ_READ2__dma9_descr__MAX 0x1
+#define R_IRQ_READ2__dma8_eop__MAX 0x1
+#define R_IRQ_READ2__dma8_descr__MAX 0x1
+#define R_IRQ_READ2__dma7_eop__MAX 0x1
+#define R_IRQ_READ2__dma7_descr__MAX 0x1
+#define R_IRQ_READ2__dma6_eop__MAX 0x1
+#define R_IRQ_READ2__dma6_descr__MAX 0x1
+#define R_IRQ_READ2__dma5_eop__MAX 0x1
+#define R_IRQ_READ2__dma5_descr__MAX 0x1
+#define R_IRQ_READ2__dma4_eop__MAX 0x1
+#define R_IRQ_READ2__dma4_descr__MAX 0x1
+#define R_IRQ_READ2__dma3_eop__MAX 0x1
+#define R_IRQ_READ2__dma3_descr__MAX 0x1
+#define R_IRQ_READ2__dma2_eop__MAX 0x1
+#define R_IRQ_READ2__dma2_descr__MAX 0x1
+#define R_IRQ_READ2__dma1_eop__MAX 0x1
+#define R_IRQ_READ2__dma1_descr__MAX 0x1
+#define R_IRQ_READ2__dma0_eop__MAX 0x1
+#define R_IRQ_READ2__dma0_descr__MAX 0x1
+
+#define R_IRQ_READ2__dma8_sub3_descr__MIN 0
+#define R_IRQ_READ2__dma8_sub2_descr__MIN 0
+#define R_IRQ_READ2__dma8_sub1_descr__MIN 0
+#define R_IRQ_READ2__dma8_sub0_descr__MIN 0
+#define R_IRQ_READ2__dma9_eop__MIN 0
+#define R_IRQ_READ2__dma9_descr__MIN 0
+#define R_IRQ_READ2__dma8_eop__MIN 0
+#define R_IRQ_READ2__dma8_descr__MIN 0
+#define R_IRQ_READ2__dma7_eop__MIN 0
+#define R_IRQ_READ2__dma7_descr__MIN 0
+#define R_IRQ_READ2__dma6_eop__MIN 0
+#define R_IRQ_READ2__dma6_descr__MIN 0
+#define R_IRQ_READ2__dma5_eop__MIN 0
+#define R_IRQ_READ2__dma5_descr__MIN 0
+#define R_IRQ_READ2__dma4_eop__MIN 0
+#define R_IRQ_READ2__dma4_descr__MIN 0
+#define R_IRQ_READ2__dma3_eop__MIN 0
+#define R_IRQ_READ2__dma3_descr__MIN 0
+#define R_IRQ_READ2__dma2_eop__MIN 0
+#define R_IRQ_READ2__dma2_descr__MIN 0
+#define R_IRQ_READ2__dma1_eop__MIN 0
+#define R_IRQ_READ2__dma1_descr__MIN 0
+#define R_IRQ_READ2__dma0_eop__MIN 0
+#define R_IRQ_READ2__dma0_descr__MIN 0
+
+#define R_IRQ_READ2__dma8_sub3_descr__BITNR 23
+#define R_IRQ_READ2__dma8_sub2_descr__BITNR 22
+#define R_IRQ_READ2__dma8_sub1_descr__BITNR 21
+#define R_IRQ_READ2__dma8_sub0_descr__BITNR 20
+#define R_IRQ_READ2__dma9_eop__BITNR 19
+#define R_IRQ_READ2__dma9_descr__BITNR 18
+#define R_IRQ_READ2__dma8_eop__BITNR 17
+#define R_IRQ_READ2__dma8_descr__BITNR 16
+#define R_IRQ_READ2__dma7_eop__BITNR 15
+#define R_IRQ_READ2__dma7_descr__BITNR 14
+#define R_IRQ_READ2__dma6_eop__BITNR 13
+#define R_IRQ_READ2__dma6_descr__BITNR 12
+#define R_IRQ_READ2__dma5_eop__BITNR 11
+#define R_IRQ_READ2__dma5_descr__BITNR 10
+#define R_IRQ_READ2__dma4_eop__BITNR 9
+#define R_IRQ_READ2__dma4_descr__BITNR 8
+#define R_IRQ_READ2__dma3_eop__BITNR 7
+#define R_IRQ_READ2__dma3_descr__BITNR 6
+#define R_IRQ_READ2__dma2_eop__BITNR 5
+#define R_IRQ_READ2__dma2_descr__BITNR 4
+#define R_IRQ_READ2__dma1_eop__BITNR 3
+#define R_IRQ_READ2__dma1_descr__BITNR 2
+#define R_IRQ_READ2__dma0_eop__BITNR 1
+#define R_IRQ_READ2__dma0_descr__BITNR 0
+
+#define R_IRQ_READ2__dma8_sub3_descr__dma8_sub3_descr__VAL REG_VAL_ENUM
+#define R_IRQ_READ2__dma8_sub2_descr__dma8_sub2_descr__VAL REG_VAL_ENUM
+#define R_IRQ_READ2__dma8_sub1_descr__dma8_sub1_descr__VAL REG_VAL_ENUM
+#define R_IRQ_READ2__dma8_sub0_descr__dma8_sub0_descr__VAL REG_VAL_ENUM
+#define R_IRQ_READ2__dma9_eop__dma9_eop__VAL REG_VAL_ENUM
+#define R_IRQ_READ2__dma9_descr__dma9_descr__VAL REG_VAL_ENUM
+#define R_IRQ_READ2__dma8_eop__dma8_eop__VAL REG_VAL_ENUM
+#define R_IRQ_READ2__dma8_descr__dma8_descr__VAL REG_VAL_ENUM
+#define R_IRQ_READ2__dma7_eop__dma7_eop__VAL REG_VAL_ENUM
+#define R_IRQ_READ2__dma7_descr__dma7_descr__VAL REG_VAL_ENUM
+#define R_IRQ_READ2__dma6_eop__dma6_eop__VAL REG_VAL_ENUM
+#define R_IRQ_READ2__dma6_descr__dma6_descr__VAL REG_VAL_ENUM
+#define R_IRQ_READ2__dma5_eop__dma5_eop__VAL REG_VAL_ENUM
+#define R_IRQ_READ2__dma5_descr__dma5_descr__VAL REG_VAL_ENUM
+#define R_IRQ_READ2__dma4_eop__dma4_eop__VAL REG_VAL_ENUM
+#define R_IRQ_READ2__dma4_descr__dma4_descr__VAL REG_VAL_ENUM
+#define R_IRQ_READ2__dma3_eop__dma3_eop__VAL REG_VAL_ENUM
+#define R_IRQ_READ2__dma3_descr__dma3_descr__VAL REG_VAL_ENUM
+#define R_IRQ_READ2__dma2_eop__dma2_eop__VAL REG_VAL_ENUM
+#define R_IRQ_READ2__dma2_descr__dma2_descr__VAL REG_VAL_ENUM
+#define R_IRQ_READ2__dma1_eop__dma1_eop__VAL REG_VAL_ENUM
+#define R_IRQ_READ2__dma1_descr__dma1_descr__VAL REG_VAL_ENUM
+#define R_IRQ_READ2__dma0_eop__dma0_eop__VAL REG_VAL_ENUM
+#define R_IRQ_READ2__dma0_descr__dma0_descr__VAL REG_VAL_ENUM
+
+#define R_IRQ_READ2__dma8_sub3_descr__dma8_sub3_descr__active 1
+#define R_IRQ_READ2__dma8_sub3_descr__dma8_sub3_descr__inactive 0
+#define R_IRQ_READ2__dma8_sub2_descr__dma8_sub2_descr__active 1
+#define R_IRQ_READ2__dma8_sub2_descr__dma8_sub2_descr__inactive 0
+#define R_IRQ_READ2__dma8_sub1_descr__dma8_sub1_descr__active 1
+#define R_IRQ_READ2__dma8_sub1_descr__dma8_sub1_descr__inactive 0
+#define R_IRQ_READ2__dma8_sub0_descr__dma8_sub0_descr__active 1
+#define R_IRQ_READ2__dma8_sub0_descr__dma8_sub0_descr__inactive 0
+#define R_IRQ_READ2__dma9_eop__dma9_eop__active 1
+#define R_IRQ_READ2__dma9_eop__dma9_eop__inactive 0
+#define R_IRQ_READ2__dma9_descr__dma9_descr__active 1
+#define R_IRQ_READ2__dma9_descr__dma9_descr__inactive 0
+#define R_IRQ_READ2__dma8_eop__dma8_eop__active 1
+#define R_IRQ_READ2__dma8_eop__dma8_eop__inactive 0
+#define R_IRQ_READ2__dma8_descr__dma8_descr__active 1
+#define R_IRQ_READ2__dma8_descr__dma8_descr__inactive 0
+#define R_IRQ_READ2__dma7_eop__dma7_eop__active 1
+#define R_IRQ_READ2__dma7_eop__dma7_eop__inactive 0
+#define R_IRQ_READ2__dma7_descr__dma7_descr__active 1
+#define R_IRQ_READ2__dma7_descr__dma7_descr__inactive 0
+#define R_IRQ_READ2__dma6_eop__dma6_eop__active 1
+#define R_IRQ_READ2__dma6_eop__dma6_eop__inactive 0
+#define R_IRQ_READ2__dma6_descr__dma6_descr__active 1
+#define R_IRQ_READ2__dma6_descr__dma6_descr__inactive 0
+#define R_IRQ_READ2__dma5_eop__dma5_eop__active 1
+#define R_IRQ_READ2__dma5_eop__dma5_eop__inactive 0
+#define R_IRQ_READ2__dma5_descr__dma5_descr__active 1
+#define R_IRQ_READ2__dma5_descr__dma5_descr__inactive 0
+#define R_IRQ_READ2__dma4_eop__dma4_eop__active 1
+#define R_IRQ_READ2__dma4_eop__dma4_eop__inactive 0
+#define R_IRQ_READ2__dma4_descr__dma4_descr__active 1
+#define R_IRQ_READ2__dma4_descr__dma4_descr__inactive 0
+#define R_IRQ_READ2__dma3_eop__dma3_eop__active 1
+#define R_IRQ_READ2__dma3_eop__dma3_eop__inactive 0
+#define R_IRQ_READ2__dma3_descr__dma3_descr__active 1
+#define R_IRQ_READ2__dma3_descr__dma3_descr__inactive 0
+#define R_IRQ_READ2__dma2_eop__dma2_eop__active 1
+#define R_IRQ_READ2__dma2_eop__dma2_eop__inactive 0
+#define R_IRQ_READ2__dma2_descr__dma2_descr__active 1
+#define R_IRQ_READ2__dma2_descr__dma2_descr__inactive 0
+#define R_IRQ_READ2__dma1_eop__dma1_eop__active 1
+#define R_IRQ_READ2__dma1_eop__dma1_eop__inactive 0
+#define R_IRQ_READ2__dma1_descr__dma1_descr__active 1
+#define R_IRQ_READ2__dma1_descr__dma1_descr__inactive 0
+#define R_IRQ_READ2__dma0_eop__dma0_eop__active 1
+#define R_IRQ_READ2__dma0_eop__dma0_eop__inactive 0
+#define R_IRQ_READ2__dma0_descr__dma0_descr__active 1
+#define R_IRQ_READ2__dma0_descr__dma0_descr__inactive 0
+
+#endif
+
+/*
+ * R_MMU_CAUSE
+ * - type: RO
+ * - addr: 0xb0000250
+ * - group: MMU registers
+ */
+
+#if USE_GROUP__MMU_registers
+
+#define R_MMU_CAUSE__ADDR (REG_TYPECAST_UDWORD 0xb0000250)
+#define R_MMU_CAUSE__SVAL REG_SVAL_SHADOW
+#define R_MMU_CAUSE__SVAL_I REG_SVAL_I_SHADOW
+#define R_MMU_CAUSE__TYPECAST REG_TYPECAST_UDWORD
+#define R_MMU_CAUSE__TYPE (REG_UDWORD)
+#define R_MMU_CAUSE__GET REG_GET_RO
+#define R_MMU_CAUSE__IGET REG_IGET_RO
+#define R_MMU_CAUSE__SET REG_SET_RO
+#define R_MMU_CAUSE__ISET REG_ISET_RO
+#define R_MMU_CAUSE__SET_VAL REG_SET_VAL_RO
+#define R_MMU_CAUSE__EQL REG_EQL_RO
+#define R_MMU_CAUSE__IEQL REG_IEQL_RO
+#define R_MMU_CAUSE__RD REG_RD_RO
+#define R_MMU_CAUSE__IRD REG_IRD_RO
+#define R_MMU_CAUSE__WR REG_WR_RO
+#define R_MMU_CAUSE__IWR REG_IWR_RO
+
+#define R_MMU_CAUSE__READ(addr) \
+ (*(addr))
+
+#define R_MMU_CAUSE__vpn__vpn__MASK 0xffffe000U
+#define R_MMU_CAUSE__miss_excp__miss_excp__MASK 0x00001000U
+#define R_MMU_CAUSE__inv_excp__inv_excp__MASK 0x00000800U
+#define R_MMU_CAUSE__acc_excp__acc_excp__MASK 0x00000400U
+#define R_MMU_CAUSE__we_excp__we_excp__MASK 0x00000200U
+#define R_MMU_CAUSE__wr_rd__wr_rd__MASK 0x00000100U
+#define R_MMU_CAUSE__page_id__page_id__MASK 0x0000003fU
+
+#define R_MMU_CAUSE__vpn__MAX 0x7ffff
+#define R_MMU_CAUSE__miss_excp__MAX 0x1
+#define R_MMU_CAUSE__inv_excp__MAX 0x1
+#define R_MMU_CAUSE__acc_excp__MAX 0x1
+#define R_MMU_CAUSE__we_excp__MAX 0x1
+#define R_MMU_CAUSE__wr_rd__MAX 0x1
+#define R_MMU_CAUSE__page_id__MAX 63
+
+#define R_MMU_CAUSE__vpn__MIN 0
+#define R_MMU_CAUSE__miss_excp__MIN 0
+#define R_MMU_CAUSE__inv_excp__MIN 0
+#define R_MMU_CAUSE__acc_excp__MIN 0
+#define R_MMU_CAUSE__we_excp__MIN 0
+#define R_MMU_CAUSE__wr_rd__MIN 0
+#define R_MMU_CAUSE__page_id__MIN 0
+
+#define R_MMU_CAUSE__vpn__BITNR 13
+#define R_MMU_CAUSE__miss_excp__BITNR 12
+#define R_MMU_CAUSE__inv_excp__BITNR 11
+#define R_MMU_CAUSE__acc_excp__BITNR 10
+#define R_MMU_CAUSE__we_excp__BITNR 9
+#define R_MMU_CAUSE__wr_rd__BITNR 8
+#define R_MMU_CAUSE__page_id__BITNR 0
+
+#define R_MMU_CAUSE__vpn__vpn__VAL REG_VAL_VAL
+#define R_MMU_CAUSE__miss_excp__miss_excp__VAL REG_VAL_ENUM
+#define R_MMU_CAUSE__inv_excp__inv_excp__VAL REG_VAL_ENUM
+#define R_MMU_CAUSE__acc_excp__acc_excp__VAL REG_VAL_ENUM
+#define R_MMU_CAUSE__we_excp__we_excp__VAL REG_VAL_ENUM
+#define R_MMU_CAUSE__wr_rd__wr_rd__VAL REG_VAL_ENUM
+#define R_MMU_CAUSE__page_id__page_id__VAL REG_VAL_VAL
+
+#define R_MMU_CAUSE__miss_excp__miss_excp__no 0
+#define R_MMU_CAUSE__miss_excp__miss_excp__yes 1
+#define R_MMU_CAUSE__inv_excp__inv_excp__no 0
+#define R_MMU_CAUSE__inv_excp__inv_excp__yes 1
+#define R_MMU_CAUSE__acc_excp__acc_excp__no 0
+#define R_MMU_CAUSE__acc_excp__acc_excp__yes 1
+#define R_MMU_CAUSE__we_excp__we_excp__no 0
+#define R_MMU_CAUSE__we_excp__we_excp__yes 1
+#define R_MMU_CAUSE__wr_rd__wr_rd__read 0
+#define R_MMU_CAUSE__wr_rd__wr_rd__write 1
+
+#endif
+
+/*
+ * R_MMU_CONFIG
+ * - type: WO
+ * - addr: 0xb0000240
+ * - group: MMU registers
+ */
+
+#if USE_GROUP__MMU_registers
+
+#define R_MMU_CONFIG__ADDR (REG_TYPECAST_UDWORD 0xb0000240)
+
+#ifndef REG_NO_SHADOW
+#define R_MMU_CONFIG__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_MMU_CONFIG + 2))
+#define R_MMU_CONFIG__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_MMU_CONFIG + 2))
+#else /* REG_NO_SHADOW */
+#define R_MMU_CONFIG__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_MMU_CONFIG__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_MMU_CONFIG__STYPECAST REG_STYPECAST_UDWORD
+#define R_MMU_CONFIG__SVAL REG_SVAL_SHADOW
+#define R_MMU_CONFIG__SVAL_I REG_SVAL_I_SHADOW
+#define R_MMU_CONFIG__TYPECAST REG_TYPECAST_UDWORD
+#define R_MMU_CONFIG__TYPE (REG_UDWORD)
+#define R_MMU_CONFIG__GET REG_GET_WO
+#define R_MMU_CONFIG__IGET REG_IGET_WO
+#define R_MMU_CONFIG__SET REG_SET_WO
+#define R_MMU_CONFIG__ISET REG_ISET_WO
+#define R_MMU_CONFIG__SET_VAL REG_SET_VAL_WO
+#define R_MMU_CONFIG__EQL REG_EQL_WO
+#define R_MMU_CONFIG__IEQL REG_IEQL_WO
+#define R_MMU_CONFIG__RD REG_RD_WO
+#define R_MMU_CONFIG__IRD REG_IRD_WO
+#define R_MMU_CONFIG__WR REG_WR_WO
+#define R_MMU_CONFIG__IWR REG_IWR_WO
+
+#define R_MMU_CONFIG__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_MMU_CONFIG__mmu_enable__mmu_enable__MASK 0x80000000U
+#define R_MMU_CONFIG__inv_excp__inv_excp__MASK 0x00040000U
+#define R_MMU_CONFIG__acc_excp__acc_excp__MASK 0x00020000U
+#define R_MMU_CONFIG__we_excp__we_excp__MASK 0x00010000U
+#define R_MMU_CONFIG__seg_f__seg_f__MASK 0x00008000U
+#define R_MMU_CONFIG__seg_e__seg_e__MASK 0x00004000U
+#define R_MMU_CONFIG__seg_d__seg_d__MASK 0x00002000U
+#define R_MMU_CONFIG__seg_c__seg_c__MASK 0x00001000U
+#define R_MMU_CONFIG__seg_b__seg_b__MASK 0x00000800U
+#define R_MMU_CONFIG__seg_a__seg_a__MASK 0x00000400U
+#define R_MMU_CONFIG__seg_9__seg_9__MASK 0x00000200U
+#define R_MMU_CONFIG__seg_8__seg_8__MASK 0x00000100U
+#define R_MMU_CONFIG__seg_7__seg_7__MASK 0x00000080U
+#define R_MMU_CONFIG__seg_6__seg_6__MASK 0x00000040U
+#define R_MMU_CONFIG__seg_5__seg_5__MASK 0x00000020U
+#define R_MMU_CONFIG__seg_4__seg_4__MASK 0x00000010U
+#define R_MMU_CONFIG__seg_3__seg_3__MASK 0x00000008U
+#define R_MMU_CONFIG__seg_2__seg_2__MASK 0x00000004U
+#define R_MMU_CONFIG__seg_1__seg_1__MASK 0x00000002U
+#define R_MMU_CONFIG__seg_0__seg_0__MASK 0x00000001U
+
+#define R_MMU_CONFIG__mmu_enable__MAX 0x1
+#define R_MMU_CONFIG__inv_excp__MAX 0x1
+#define R_MMU_CONFIG__acc_excp__MAX 0x1
+#define R_MMU_CONFIG__we_excp__MAX 0x1
+#define R_MMU_CONFIG__seg_f__MAX 0x1
+#define R_MMU_CONFIG__seg_e__MAX 0x1
+#define R_MMU_CONFIG__seg_d__MAX 0x1
+#define R_MMU_CONFIG__seg_c__MAX 0x1
+#define R_MMU_CONFIG__seg_b__MAX 0x1
+#define R_MMU_CONFIG__seg_a__MAX 0x1
+#define R_MMU_CONFIG__seg_9__MAX 0x1
+#define R_MMU_CONFIG__seg_8__MAX 0x1
+#define R_MMU_CONFIG__seg_7__MAX 0x1
+#define R_MMU_CONFIG__seg_6__MAX 0x1
+#define R_MMU_CONFIG__seg_5__MAX 0x1
+#define R_MMU_CONFIG__seg_4__MAX 0x1
+#define R_MMU_CONFIG__seg_3__MAX 0x1
+#define R_MMU_CONFIG__seg_2__MAX 0x1
+#define R_MMU_CONFIG__seg_1__MAX 0x1
+#define R_MMU_CONFIG__seg_0__MAX 0x1
+
+#define R_MMU_CONFIG__mmu_enable__MIN 0
+#define R_MMU_CONFIG__inv_excp__MIN 0
+#define R_MMU_CONFIG__acc_excp__MIN 0
+#define R_MMU_CONFIG__we_excp__MIN 0
+#define R_MMU_CONFIG__seg_f__MIN 0
+#define R_MMU_CONFIG__seg_e__MIN 0
+#define R_MMU_CONFIG__seg_d__MIN 0
+#define R_MMU_CONFIG__seg_c__MIN 0
+#define R_MMU_CONFIG__seg_b__MIN 0
+#define R_MMU_CONFIG__seg_a__MIN 0
+#define R_MMU_CONFIG__seg_9__MIN 0
+#define R_MMU_CONFIG__seg_8__MIN 0
+#define R_MMU_CONFIG__seg_7__MIN 0
+#define R_MMU_CONFIG__seg_6__MIN 0
+#define R_MMU_CONFIG__seg_5__MIN 0
+#define R_MMU_CONFIG__seg_4__MIN 0
+#define R_MMU_CONFIG__seg_3__MIN 0
+#define R_MMU_CONFIG__seg_2__MIN 0
+#define R_MMU_CONFIG__seg_1__MIN 0
+#define R_MMU_CONFIG__seg_0__MIN 0
+
+#define R_MMU_CONFIG__mmu_enable__BITNR 31
+#define R_MMU_CONFIG__inv_excp__BITNR 18
+#define R_MMU_CONFIG__acc_excp__BITNR 17
+#define R_MMU_CONFIG__we_excp__BITNR 16
+#define R_MMU_CONFIG__seg_f__BITNR 15
+#define R_MMU_CONFIG__seg_e__BITNR 14
+#define R_MMU_CONFIG__seg_d__BITNR 13
+#define R_MMU_CONFIG__seg_c__BITNR 12
+#define R_MMU_CONFIG__seg_b__BITNR 11
+#define R_MMU_CONFIG__seg_a__BITNR 10
+#define R_MMU_CONFIG__seg_9__BITNR 9
+#define R_MMU_CONFIG__seg_8__BITNR 8
+#define R_MMU_CONFIG__seg_7__BITNR 7
+#define R_MMU_CONFIG__seg_6__BITNR 6
+#define R_MMU_CONFIG__seg_5__BITNR 5
+#define R_MMU_CONFIG__seg_4__BITNR 4
+#define R_MMU_CONFIG__seg_3__BITNR 3
+#define R_MMU_CONFIG__seg_2__BITNR 2
+#define R_MMU_CONFIG__seg_1__BITNR 1
+#define R_MMU_CONFIG__seg_0__BITNR 0
+
+#define R_MMU_CONFIG__mmu_enable__mmu_enable__VAL REG_VAL_ENUM
+#define R_MMU_CONFIG__inv_excp__inv_excp__VAL REG_VAL_ENUM
+#define R_MMU_CONFIG__acc_excp__acc_excp__VAL REG_VAL_ENUM
+#define R_MMU_CONFIG__we_excp__we_excp__VAL REG_VAL_ENUM
+#define R_MMU_CONFIG__seg_f__seg_f__VAL REG_VAL_ENUM
+#define R_MMU_CONFIG__seg_e__seg_e__VAL REG_VAL_ENUM
+#define R_MMU_CONFIG__seg_d__seg_d__VAL REG_VAL_ENUM
+#define R_MMU_CONFIG__seg_c__seg_c__VAL REG_VAL_ENUM
+#define R_MMU_CONFIG__seg_b__seg_b__VAL REG_VAL_ENUM
+#define R_MMU_CONFIG__seg_a__seg_a__VAL REG_VAL_ENUM
+#define R_MMU_CONFIG__seg_9__seg_9__VAL REG_VAL_ENUM
+#define R_MMU_CONFIG__seg_8__seg_8__VAL REG_VAL_ENUM
+#define R_MMU_CONFIG__seg_7__seg_7__VAL REG_VAL_ENUM
+#define R_MMU_CONFIG__seg_6__seg_6__VAL REG_VAL_ENUM
+#define R_MMU_CONFIG__seg_5__seg_5__VAL REG_VAL_ENUM
+#define R_MMU_CONFIG__seg_4__seg_4__VAL REG_VAL_ENUM
+#define R_MMU_CONFIG__seg_3__seg_3__VAL REG_VAL_ENUM
+#define R_MMU_CONFIG__seg_2__seg_2__VAL REG_VAL_ENUM
+#define R_MMU_CONFIG__seg_1__seg_1__VAL REG_VAL_ENUM
+#define R_MMU_CONFIG__seg_0__seg_0__VAL REG_VAL_ENUM
+
+#define R_MMU_CONFIG__mmu_enable__mmu_enable__disable 0
+#define R_MMU_CONFIG__mmu_enable__mmu_enable__enable 1
+#define R_MMU_CONFIG__inv_excp__inv_excp__disable 0
+#define R_MMU_CONFIG__inv_excp__inv_excp__enable 1
+#define R_MMU_CONFIG__acc_excp__acc_excp__disable 0
+#define R_MMU_CONFIG__acc_excp__acc_excp__enable 1
+#define R_MMU_CONFIG__we_excp__we_excp__disable 0
+#define R_MMU_CONFIG__we_excp__we_excp__enable 1
+#define R_MMU_CONFIG__seg_f__seg_f__page 0
+#define R_MMU_CONFIG__seg_f__seg_f__seg 1
+#define R_MMU_CONFIG__seg_e__seg_e__page 0
+#define R_MMU_CONFIG__seg_e__seg_e__seg 1
+#define R_MMU_CONFIG__seg_d__seg_d__page 0
+#define R_MMU_CONFIG__seg_d__seg_d__seg 1
+#define R_MMU_CONFIG__seg_c__seg_c__page 0
+#define R_MMU_CONFIG__seg_c__seg_c__seg 1
+#define R_MMU_CONFIG__seg_b__seg_b__page 0
+#define R_MMU_CONFIG__seg_b__seg_b__seg 1
+#define R_MMU_CONFIG__seg_a__seg_a__page 0
+#define R_MMU_CONFIG__seg_a__seg_a__seg 1
+#define R_MMU_CONFIG__seg_9__seg_9__page 0
+#define R_MMU_CONFIG__seg_9__seg_9__seg 1
+#define R_MMU_CONFIG__seg_8__seg_8__page 0
+#define R_MMU_CONFIG__seg_8__seg_8__seg 1
+#define R_MMU_CONFIG__seg_7__seg_7__page 0
+#define R_MMU_CONFIG__seg_7__seg_7__seg 1
+#define R_MMU_CONFIG__seg_6__seg_6__page 0
+#define R_MMU_CONFIG__seg_6__seg_6__seg 1
+#define R_MMU_CONFIG__seg_5__seg_5__page 0
+#define R_MMU_CONFIG__seg_5__seg_5__seg 1
+#define R_MMU_CONFIG__seg_4__seg_4__page 0
+#define R_MMU_CONFIG__seg_4__seg_4__seg 1
+#define R_MMU_CONFIG__seg_3__seg_3__page 0
+#define R_MMU_CONFIG__seg_3__seg_3__seg 1
+#define R_MMU_CONFIG__seg_2__seg_2__page 0
+#define R_MMU_CONFIG__seg_2__seg_2__seg 1
+#define R_MMU_CONFIG__seg_1__seg_1__page 0
+#define R_MMU_CONFIG__seg_1__seg_1__seg 1
+#define R_MMU_CONFIG__seg_0__seg_0__page 0
+#define R_MMU_CONFIG__seg_0__seg_0__seg 1
+
+#endif
+
+/*
+ * R_MMU_CONTEXT
+ * - type: RW
+ * - addr: 0xb000024c
+ * - group: MMU registers
+ */
+
+#if USE_GROUP__MMU_registers
+
+#define R_MMU_CONTEXT__ADDR (REG_TYPECAST_BYTE 0xb000024c)
+#define R_MMU_CONTEXT__SVAL REG_SVAL_SHADOW
+#define R_MMU_CONTEXT__SVAL_I REG_SVAL_I_SHADOW
+#define R_MMU_CONTEXT__TYPECAST REG_TYPECAST_BYTE
+#define R_MMU_CONTEXT__TYPE (REG_BYTE)
+#define R_MMU_CONTEXT__GET REG_GET_RW
+#define R_MMU_CONTEXT__IGET REG_IGET_RW
+#define R_MMU_CONTEXT__SET REG_SET_RW
+#define R_MMU_CONTEXT__ISET REG_ISET_RW
+#define R_MMU_CONTEXT__SET_VAL REG_SET_VAL_RW
+#define R_MMU_CONTEXT__EQL REG_EQL_RW
+#define R_MMU_CONTEXT__IEQL REG_IEQL_RW
+#define R_MMU_CONTEXT__RD REG_RD_RW
+#define R_MMU_CONTEXT__IRD REG_IRD_RW
+#define R_MMU_CONTEXT__WR REG_WR_RW
+#define R_MMU_CONTEXT__IWR REG_IWR_RW
+
+#define R_MMU_CONTEXT__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_MMU_CONTEXT__READ(addr) \
+ (*(addr))
+
+#define R_MMU_CONTEXT__page_id__page_id__MASK 0x0000003fU
+
+#define R_MMU_CONTEXT__page_id__MAX 63
+
+#define R_MMU_CONTEXT__page_id__MIN 0
+
+#define R_MMU_CONTEXT__page_id__BITNR 0
+
+#define R_MMU_CONTEXT__page_id__page_id__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_MMU_CTRL
+ * - type: WO
+ * - addr: 0xb0000242
+ * - group: MMU registers
+ */
+
+#if USE_GROUP__MMU_registers
+
+#define R_MMU_CTRL__ADDR (REG_TYPECAST_BYTE 0xb0000242)
+
+#ifndef REG_NO_SHADOW
+#define R_MMU_CTRL__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_MMU_CONFIG + 0))
+#define R_MMU_CTRL__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_MMU_CONFIG + 0))
+#else /* REG_NO_SHADOW */
+#define R_MMU_CTRL__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_MMU_CTRL__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_MMU_CTRL__STYPECAST REG_STYPECAST_BYTE
+#define R_MMU_CTRL__SVAL REG_SVAL_SHADOW
+#define R_MMU_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_MMU_CTRL__TYPECAST REG_TYPECAST_BYTE
+#define R_MMU_CTRL__TYPE (REG_BYTE)
+#define R_MMU_CTRL__GET REG_GET_WO
+#define R_MMU_CTRL__IGET REG_IGET_WO
+#define R_MMU_CTRL__SET REG_SET_WO
+#define R_MMU_CTRL__ISET REG_ISET_WO
+#define R_MMU_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_MMU_CTRL__EQL REG_EQL_WO
+#define R_MMU_CTRL__IEQL REG_IEQL_WO
+#define R_MMU_CTRL__RD REG_RD_WO
+#define R_MMU_CTRL__IRD REG_IRD_WO
+#define R_MMU_CTRL__WR REG_WR_WO
+#define R_MMU_CTRL__IWR REG_IWR_WO
+
+#define R_MMU_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_MMU_CTRL__inv_excp__inv_excp__MASK 0x00000004U
+#define R_MMU_CTRL__acc_excp__acc_excp__MASK 0x00000002U
+#define R_MMU_CTRL__we_excp__we_excp__MASK 0x00000001U
+
+#define R_MMU_CTRL__inv_excp__MAX 0x1
+#define R_MMU_CTRL__acc_excp__MAX 0x1
+#define R_MMU_CTRL__we_excp__MAX 0x1
+
+#define R_MMU_CTRL__inv_excp__MIN 0
+#define R_MMU_CTRL__acc_excp__MIN 0
+#define R_MMU_CTRL__we_excp__MIN 0
+
+#define R_MMU_CTRL__inv_excp__BITNR 2
+#define R_MMU_CTRL__acc_excp__BITNR 1
+#define R_MMU_CTRL__we_excp__BITNR 0
+
+#define R_MMU_CTRL__inv_excp__inv_excp__VAL REG_VAL_ENUM
+#define R_MMU_CTRL__acc_excp__acc_excp__VAL REG_VAL_ENUM
+#define R_MMU_CTRL__we_excp__we_excp__VAL REG_VAL_ENUM
+
+#define R_MMU_CTRL__inv_excp__inv_excp__disable 0
+#define R_MMU_CTRL__inv_excp__inv_excp__enable 1
+#define R_MMU_CTRL__acc_excp__acc_excp__disable 0
+#define R_MMU_CTRL__acc_excp__acc_excp__enable 1
+#define R_MMU_CTRL__we_excp__we_excp__disable 0
+#define R_MMU_CTRL__we_excp__we_excp__enable 1
+
+#endif
+
+/*
+ * R_MMU_ENABLE
+ * - type: WO
+ * - addr: 0xb0000243
+ * - group: MMU registers
+ */
+
+#if USE_GROUP__MMU_registers
+
+#define R_MMU_ENABLE__ADDR (REG_TYPECAST_BYTE 0xb0000243)
+
+#ifndef REG_NO_SHADOW
+#define R_MMU_ENABLE__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_MMU_CONFIG + 1))
+#define R_MMU_ENABLE__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_MMU_CONFIG + 1))
+#else /* REG_NO_SHADOW */
+#define R_MMU_ENABLE__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_MMU_ENABLE__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_MMU_ENABLE__STYPECAST REG_STYPECAST_BYTE
+#define R_MMU_ENABLE__SVAL REG_SVAL_SHADOW
+#define R_MMU_ENABLE__SVAL_I REG_SVAL_I_SHADOW
+#define R_MMU_ENABLE__TYPECAST REG_TYPECAST_BYTE
+#define R_MMU_ENABLE__TYPE (REG_BYTE)
+#define R_MMU_ENABLE__GET REG_GET_WO
+#define R_MMU_ENABLE__IGET REG_IGET_WO
+#define R_MMU_ENABLE__SET REG_SET_WO
+#define R_MMU_ENABLE__ISET REG_ISET_WO
+#define R_MMU_ENABLE__SET_VAL REG_SET_VAL_WO
+#define R_MMU_ENABLE__EQL REG_EQL_WO
+#define R_MMU_ENABLE__IEQL REG_IEQL_WO
+#define R_MMU_ENABLE__RD REG_RD_WO
+#define R_MMU_ENABLE__IRD REG_IRD_WO
+#define R_MMU_ENABLE__WR REG_WR_WO
+#define R_MMU_ENABLE__IWR REG_IWR_WO
+
+#define R_MMU_ENABLE__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_MMU_ENABLE__mmu_enable__mmu_enable__MASK 0x00000080U
+
+#define R_MMU_ENABLE__mmu_enable__MAX 0x1
+
+#define R_MMU_ENABLE__mmu_enable__MIN 0
+
+#define R_MMU_ENABLE__mmu_enable__BITNR 7
+
+#define R_MMU_ENABLE__mmu_enable__mmu_enable__VAL REG_VAL_ENUM
+
+#define R_MMU_ENABLE__mmu_enable__mmu_enable__disable 0
+#define R_MMU_ENABLE__mmu_enable__mmu_enable__enable 1
+
+#endif
+
+/*
+ * R_MMU_KBASE_HI
+ * - type: WO
+ * - addr: 0xb0000248
+ * - group: MMU registers
+ */
+
+#if USE_GROUP__MMU_registers
+
+#define R_MMU_KBASE_HI__ADDR (REG_TYPECAST_UDWORD 0xb0000248)
+
+#ifndef REG_NO_SHADOW
+#define R_MMU_KBASE_HI__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_MMU_KBASE_HI + 2))
+#define R_MMU_KBASE_HI__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_MMU_KBASE_HI + 2))
+#else /* REG_NO_SHADOW */
+#define R_MMU_KBASE_HI__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_MMU_KBASE_HI__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_MMU_KBASE_HI__STYPECAST REG_STYPECAST_UDWORD
+#define R_MMU_KBASE_HI__SVAL REG_SVAL_SHADOW
+#define R_MMU_KBASE_HI__SVAL_I REG_SVAL_I_SHADOW
+#define R_MMU_KBASE_HI__TYPECAST REG_TYPECAST_UDWORD
+#define R_MMU_KBASE_HI__TYPE (REG_UDWORD)
+#define R_MMU_KBASE_HI__GET REG_GET_WO
+#define R_MMU_KBASE_HI__IGET REG_IGET_WO
+#define R_MMU_KBASE_HI__SET REG_SET_WO
+#define R_MMU_KBASE_HI__ISET REG_ISET_WO
+#define R_MMU_KBASE_HI__SET_VAL REG_SET_VAL_WO
+#define R_MMU_KBASE_HI__EQL REG_EQL_WO
+#define R_MMU_KBASE_HI__IEQL REG_IEQL_WO
+#define R_MMU_KBASE_HI__RD REG_RD_WO
+#define R_MMU_KBASE_HI__IRD REG_IRD_WO
+#define R_MMU_KBASE_HI__WR REG_WR_WO
+#define R_MMU_KBASE_HI__IWR REG_IWR_WO
+
+#define R_MMU_KBASE_HI__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_MMU_KBASE_HI__base_f__base_f__MASK 0xf0000000U
+#define R_MMU_KBASE_HI__base_e__base_e__MASK 0x0f000000U
+#define R_MMU_KBASE_HI__base_d__base_d__MASK 0x00f00000U
+#define R_MMU_KBASE_HI__base_c__base_c__MASK 0x000f0000U
+#define R_MMU_KBASE_HI__base_b__base_b__MASK 0x0000f000U
+#define R_MMU_KBASE_HI__base_a__base_a__MASK 0x00000f00U
+#define R_MMU_KBASE_HI__base_9__base_9__MASK 0x000000f0U
+#define R_MMU_KBASE_HI__base_8__base_8__MASK 0x0000000fU
+
+#define R_MMU_KBASE_HI__base_f__MAX 15
+#define R_MMU_KBASE_HI__base_e__MAX 15
+#define R_MMU_KBASE_HI__base_d__MAX 15
+#define R_MMU_KBASE_HI__base_c__MAX 15
+#define R_MMU_KBASE_HI__base_b__MAX 15
+#define R_MMU_KBASE_HI__base_a__MAX 15
+#define R_MMU_KBASE_HI__base_9__MAX 15
+#define R_MMU_KBASE_HI__base_8__MAX 15
+
+#define R_MMU_KBASE_HI__base_f__MIN 0
+#define R_MMU_KBASE_HI__base_e__MIN 0
+#define R_MMU_KBASE_HI__base_d__MIN 0
+#define R_MMU_KBASE_HI__base_c__MIN 0
+#define R_MMU_KBASE_HI__base_b__MIN 0
+#define R_MMU_KBASE_HI__base_a__MIN 0
+#define R_MMU_KBASE_HI__base_9__MIN 0
+#define R_MMU_KBASE_HI__base_8__MIN 0
+
+#define R_MMU_KBASE_HI__base_f__BITNR 28
+#define R_MMU_KBASE_HI__base_e__BITNR 24
+#define R_MMU_KBASE_HI__base_d__BITNR 20
+#define R_MMU_KBASE_HI__base_c__BITNR 16
+#define R_MMU_KBASE_HI__base_b__BITNR 12
+#define R_MMU_KBASE_HI__base_a__BITNR 8
+#define R_MMU_KBASE_HI__base_9__BITNR 4
+#define R_MMU_KBASE_HI__base_8__BITNR 0
+
+#define R_MMU_KBASE_HI__base_f__base_f__VAL REG_VAL_VAL
+#define R_MMU_KBASE_HI__base_e__base_e__VAL REG_VAL_VAL
+#define R_MMU_KBASE_HI__base_d__base_d__VAL REG_VAL_VAL
+#define R_MMU_KBASE_HI__base_c__base_c__VAL REG_VAL_VAL
+#define R_MMU_KBASE_HI__base_b__base_b__VAL REG_VAL_VAL
+#define R_MMU_KBASE_HI__base_a__base_a__VAL REG_VAL_VAL
+#define R_MMU_KBASE_HI__base_9__base_9__VAL REG_VAL_VAL
+#define R_MMU_KBASE_HI__base_8__base_8__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_MMU_KBASE_LO
+ * - type: WO
+ * - addr: 0xb0000244
+ * - group: MMU registers
+ */
+
+#if USE_GROUP__MMU_registers
+
+#define R_MMU_KBASE_LO__ADDR (REG_TYPECAST_UDWORD 0xb0000244)
+
+#ifndef REG_NO_SHADOW
+#define R_MMU_KBASE_LO__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_MMU_KBASE_LO + 2))
+#define R_MMU_KBASE_LO__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_MMU_KBASE_LO + 2))
+#else /* REG_NO_SHADOW */
+#define R_MMU_KBASE_LO__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_MMU_KBASE_LO__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_MMU_KBASE_LO__STYPECAST REG_STYPECAST_UDWORD
+#define R_MMU_KBASE_LO__SVAL REG_SVAL_SHADOW
+#define R_MMU_KBASE_LO__SVAL_I REG_SVAL_I_SHADOW
+#define R_MMU_KBASE_LO__TYPECAST REG_TYPECAST_UDWORD
+#define R_MMU_KBASE_LO__TYPE (REG_UDWORD)
+#define R_MMU_KBASE_LO__GET REG_GET_WO
+#define R_MMU_KBASE_LO__IGET REG_IGET_WO
+#define R_MMU_KBASE_LO__SET REG_SET_WO
+#define R_MMU_KBASE_LO__ISET REG_ISET_WO
+#define R_MMU_KBASE_LO__SET_VAL REG_SET_VAL_WO
+#define R_MMU_KBASE_LO__EQL REG_EQL_WO
+#define R_MMU_KBASE_LO__IEQL REG_IEQL_WO
+#define R_MMU_KBASE_LO__RD REG_RD_WO
+#define R_MMU_KBASE_LO__IRD REG_IRD_WO
+#define R_MMU_KBASE_LO__WR REG_WR_WO
+#define R_MMU_KBASE_LO__IWR REG_IWR_WO
+
+#define R_MMU_KBASE_LO__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_MMU_KBASE_LO__base_7__base_7__MASK 0xf0000000U
+#define R_MMU_KBASE_LO__base_6__base_6__MASK 0x0f000000U
+#define R_MMU_KBASE_LO__base_5__base_5__MASK 0x00f00000U
+#define R_MMU_KBASE_LO__base_4__base_4__MASK 0x000f0000U
+#define R_MMU_KBASE_LO__base_3__base_3__MASK 0x0000f000U
+#define R_MMU_KBASE_LO__base_2__base_2__MASK 0x00000f00U
+#define R_MMU_KBASE_LO__base_1__base_1__MASK 0x000000f0U
+#define R_MMU_KBASE_LO__base_0__base_0__MASK 0x0000000fU
+
+#define R_MMU_KBASE_LO__base_7__MAX 15
+#define R_MMU_KBASE_LO__base_6__MAX 15
+#define R_MMU_KBASE_LO__base_5__MAX 15
+#define R_MMU_KBASE_LO__base_4__MAX 15
+#define R_MMU_KBASE_LO__base_3__MAX 15
+#define R_MMU_KBASE_LO__base_2__MAX 15
+#define R_MMU_KBASE_LO__base_1__MAX 15
+#define R_MMU_KBASE_LO__base_0__MAX 15
+
+#define R_MMU_KBASE_LO__base_7__MIN 0
+#define R_MMU_KBASE_LO__base_6__MIN 0
+#define R_MMU_KBASE_LO__base_5__MIN 0
+#define R_MMU_KBASE_LO__base_4__MIN 0
+#define R_MMU_KBASE_LO__base_3__MIN 0
+#define R_MMU_KBASE_LO__base_2__MIN 0
+#define R_MMU_KBASE_LO__base_1__MIN 0
+#define R_MMU_KBASE_LO__base_0__MIN 0
+
+#define R_MMU_KBASE_LO__base_7__BITNR 28
+#define R_MMU_KBASE_LO__base_6__BITNR 24
+#define R_MMU_KBASE_LO__base_5__BITNR 20
+#define R_MMU_KBASE_LO__base_4__BITNR 16
+#define R_MMU_KBASE_LO__base_3__BITNR 12
+#define R_MMU_KBASE_LO__base_2__BITNR 8
+#define R_MMU_KBASE_LO__base_1__BITNR 4
+#define R_MMU_KBASE_LO__base_0__BITNR 0
+
+#define R_MMU_KBASE_LO__base_7__base_7__VAL REG_VAL_VAL
+#define R_MMU_KBASE_LO__base_6__base_6__VAL REG_VAL_VAL
+#define R_MMU_KBASE_LO__base_5__base_5__VAL REG_VAL_VAL
+#define R_MMU_KBASE_LO__base_4__base_4__VAL REG_VAL_VAL
+#define R_MMU_KBASE_LO__base_3__base_3__VAL REG_VAL_VAL
+#define R_MMU_KBASE_LO__base_2__base_2__VAL REG_VAL_VAL
+#define R_MMU_KBASE_LO__base_1__base_1__VAL REG_VAL_VAL
+#define R_MMU_KBASE_LO__base_0__base_0__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_MMU_KSEG
+ * - type: WO
+ * - addr: 0xb0000240
+ * - group: MMU registers
+ */
+
+#if USE_GROUP__MMU_registers
+
+#define R_MMU_KSEG__ADDR (REG_TYPECAST_UWORD 0xb0000240)
+
+#ifndef REG_NO_SHADOW
+#define R_MMU_KSEG__SADDR (REG_STYPECAST_UWORD (reg_shadow__hwregs.R_MMU_CONFIG + 2))
+#define R_MMU_KSEG__IADDR (REG_STYPECAST_UWORD (reg_initiated__hwregs.R_MMU_CONFIG + 2))
+#else /* REG_NO_SHADOW */
+#define R_MMU_KSEG__SADDR (REG_STYPECAST_UWORD (®_shadow__hwregs))
+#define R_MMU_KSEG__IADDR (REG_STYPECAST_UWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_MMU_KSEG__STYPECAST REG_STYPECAST_UWORD
+#define R_MMU_KSEG__SVAL REG_SVAL_SHADOW
+#define R_MMU_KSEG__SVAL_I REG_SVAL_I_SHADOW
+#define R_MMU_KSEG__TYPECAST REG_TYPECAST_UWORD
+#define R_MMU_KSEG__TYPE (REG_UWORD)
+#define R_MMU_KSEG__GET REG_GET_WO
+#define R_MMU_KSEG__IGET REG_IGET_WO
+#define R_MMU_KSEG__SET REG_SET_WO
+#define R_MMU_KSEG__ISET REG_ISET_WO
+#define R_MMU_KSEG__SET_VAL REG_SET_VAL_WO
+#define R_MMU_KSEG__EQL REG_EQL_WO
+#define R_MMU_KSEG__IEQL REG_IEQL_WO
+#define R_MMU_KSEG__RD REG_RD_WO
+#define R_MMU_KSEG__IRD REG_IRD_WO
+#define R_MMU_KSEG__WR REG_WR_WO
+#define R_MMU_KSEG__IWR REG_IWR_WO
+
+#define R_MMU_KSEG__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_MMU_KSEG__seg_f__seg_f__MASK 0x00008000U
+#define R_MMU_KSEG__seg_e__seg_e__MASK 0x00004000U
+#define R_MMU_KSEG__seg_d__seg_d__MASK 0x00002000U
+#define R_MMU_KSEG__seg_c__seg_c__MASK 0x00001000U
+#define R_MMU_KSEG__seg_b__seg_b__MASK 0x00000800U
+#define R_MMU_KSEG__seg_a__seg_a__MASK 0x00000400U
+#define R_MMU_KSEG__seg_9__seg_9__MASK 0x00000200U
+#define R_MMU_KSEG__seg_8__seg_8__MASK 0x00000100U
+#define R_MMU_KSEG__seg_7__seg_7__MASK 0x00000080U
+#define R_MMU_KSEG__seg_6__seg_6__MASK 0x00000040U
+#define R_MMU_KSEG__seg_5__seg_5__MASK 0x00000020U
+#define R_MMU_KSEG__seg_4__seg_4__MASK 0x00000010U
+#define R_MMU_KSEG__seg_3__seg_3__MASK 0x00000008U
+#define R_MMU_KSEG__seg_2__seg_2__MASK 0x00000004U
+#define R_MMU_KSEG__seg_1__seg_1__MASK 0x00000002U
+#define R_MMU_KSEG__seg_0__seg_0__MASK 0x00000001U
+
+#define R_MMU_KSEG__seg_f__MAX 0x1
+#define R_MMU_KSEG__seg_e__MAX 0x1
+#define R_MMU_KSEG__seg_d__MAX 0x1
+#define R_MMU_KSEG__seg_c__MAX 0x1
+#define R_MMU_KSEG__seg_b__MAX 0x1
+#define R_MMU_KSEG__seg_a__MAX 0x1
+#define R_MMU_KSEG__seg_9__MAX 0x1
+#define R_MMU_KSEG__seg_8__MAX 0x1
+#define R_MMU_KSEG__seg_7__MAX 0x1
+#define R_MMU_KSEG__seg_6__MAX 0x1
+#define R_MMU_KSEG__seg_5__MAX 0x1
+#define R_MMU_KSEG__seg_4__MAX 0x1
+#define R_MMU_KSEG__seg_3__MAX 0x1
+#define R_MMU_KSEG__seg_2__MAX 0x1
+#define R_MMU_KSEG__seg_1__MAX 0x1
+#define R_MMU_KSEG__seg_0__MAX 0x1
+
+#define R_MMU_KSEG__seg_f__MIN 0
+#define R_MMU_KSEG__seg_e__MIN 0
+#define R_MMU_KSEG__seg_d__MIN 0
+#define R_MMU_KSEG__seg_c__MIN 0
+#define R_MMU_KSEG__seg_b__MIN 0
+#define R_MMU_KSEG__seg_a__MIN 0
+#define R_MMU_KSEG__seg_9__MIN 0
+#define R_MMU_KSEG__seg_8__MIN 0
+#define R_MMU_KSEG__seg_7__MIN 0
+#define R_MMU_KSEG__seg_6__MIN 0
+#define R_MMU_KSEG__seg_5__MIN 0
+#define R_MMU_KSEG__seg_4__MIN 0
+#define R_MMU_KSEG__seg_3__MIN 0
+#define R_MMU_KSEG__seg_2__MIN 0
+#define R_MMU_KSEG__seg_1__MIN 0
+#define R_MMU_KSEG__seg_0__MIN 0
+
+#define R_MMU_KSEG__seg_f__BITNR 15
+#define R_MMU_KSEG__seg_e__BITNR 14
+#define R_MMU_KSEG__seg_d__BITNR 13
+#define R_MMU_KSEG__seg_c__BITNR 12
+#define R_MMU_KSEG__seg_b__BITNR 11
+#define R_MMU_KSEG__seg_a__BITNR 10
+#define R_MMU_KSEG__seg_9__BITNR 9
+#define R_MMU_KSEG__seg_8__BITNR 8
+#define R_MMU_KSEG__seg_7__BITNR 7
+#define R_MMU_KSEG__seg_6__BITNR 6
+#define R_MMU_KSEG__seg_5__BITNR 5
+#define R_MMU_KSEG__seg_4__BITNR 4
+#define R_MMU_KSEG__seg_3__BITNR 3
+#define R_MMU_KSEG__seg_2__BITNR 2
+#define R_MMU_KSEG__seg_1__BITNR 1
+#define R_MMU_KSEG__seg_0__BITNR 0
+
+#define R_MMU_KSEG__seg_f__seg_f__VAL REG_VAL_ENUM
+#define R_MMU_KSEG__seg_e__seg_e__VAL REG_VAL_ENUM
+#define R_MMU_KSEG__seg_d__seg_d__VAL REG_VAL_ENUM
+#define R_MMU_KSEG__seg_c__seg_c__VAL REG_VAL_ENUM
+#define R_MMU_KSEG__seg_b__seg_b__VAL REG_VAL_ENUM
+#define R_MMU_KSEG__seg_a__seg_a__VAL REG_VAL_ENUM
+#define R_MMU_KSEG__seg_9__seg_9__VAL REG_VAL_ENUM
+#define R_MMU_KSEG__seg_8__seg_8__VAL REG_VAL_ENUM
+#define R_MMU_KSEG__seg_7__seg_7__VAL REG_VAL_ENUM
+#define R_MMU_KSEG__seg_6__seg_6__VAL REG_VAL_ENUM
+#define R_MMU_KSEG__seg_5__seg_5__VAL REG_VAL_ENUM
+#define R_MMU_KSEG__seg_4__seg_4__VAL REG_VAL_ENUM
+#define R_MMU_KSEG__seg_3__seg_3__VAL REG_VAL_ENUM
+#define R_MMU_KSEG__seg_2__seg_2__VAL REG_VAL_ENUM
+#define R_MMU_KSEG__seg_1__seg_1__VAL REG_VAL_ENUM
+#define R_MMU_KSEG__seg_0__seg_0__VAL REG_VAL_ENUM
+
+#define R_MMU_KSEG__seg_f__seg_f__page 0
+#define R_MMU_KSEG__seg_f__seg_f__seg 1
+#define R_MMU_KSEG__seg_e__seg_e__page 0
+#define R_MMU_KSEG__seg_e__seg_e__seg 1
+#define R_MMU_KSEG__seg_d__seg_d__page 0
+#define R_MMU_KSEG__seg_d__seg_d__seg 1
+#define R_MMU_KSEG__seg_c__seg_c__page 0
+#define R_MMU_KSEG__seg_c__seg_c__seg 1
+#define R_MMU_KSEG__seg_b__seg_b__page 0
+#define R_MMU_KSEG__seg_b__seg_b__seg 1
+#define R_MMU_KSEG__seg_a__seg_a__page 0
+#define R_MMU_KSEG__seg_a__seg_a__seg 1
+#define R_MMU_KSEG__seg_9__seg_9__page 0
+#define R_MMU_KSEG__seg_9__seg_9__seg 1
+#define R_MMU_KSEG__seg_8__seg_8__page 0
+#define R_MMU_KSEG__seg_8__seg_8__seg 1
+#define R_MMU_KSEG__seg_7__seg_7__page 0
+#define R_MMU_KSEG__seg_7__seg_7__seg 1
+#define R_MMU_KSEG__seg_6__seg_6__page 0
+#define R_MMU_KSEG__seg_6__seg_6__seg 1
+#define R_MMU_KSEG__seg_5__seg_5__page 0
+#define R_MMU_KSEG__seg_5__seg_5__seg 1
+#define R_MMU_KSEG__seg_4__seg_4__page 0
+#define R_MMU_KSEG__seg_4__seg_4__seg 1
+#define R_MMU_KSEG__seg_3__seg_3__page 0
+#define R_MMU_KSEG__seg_3__seg_3__seg 1
+#define R_MMU_KSEG__seg_2__seg_2__page 0
+#define R_MMU_KSEG__seg_2__seg_2__seg 1
+#define R_MMU_KSEG__seg_1__seg_1__page 0
+#define R_MMU_KSEG__seg_1__seg_1__seg 1
+#define R_MMU_KSEG__seg_0__seg_0__page 0
+#define R_MMU_KSEG__seg_0__seg_0__seg 1
+
+#endif
+
+/*
+ * R_NETWORK_GA_0
+ * - type: WO
+ * - addr: 0xb000008c
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+#define R_NETWORK_GA_0__ADDR (REG_TYPECAST_UDWORD 0xb000008c)
+
+#ifndef REG_NO_SHADOW
+#define R_NETWORK_GA_0__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_NETWORK_GA_0 + 0))
+#define R_NETWORK_GA_0__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_NETWORK_GA_0 + 0))
+#else /* REG_NO_SHADOW */
+#define R_NETWORK_GA_0__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_NETWORK_GA_0__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_NETWORK_GA_0__STYPECAST REG_STYPECAST_UDWORD
+#define R_NETWORK_GA_0__SVAL REG_SVAL_SHADOW
+#define R_NETWORK_GA_0__SVAL_I REG_SVAL_I_SHADOW
+#define R_NETWORK_GA_0__TYPECAST REG_TYPECAST_UDWORD
+#define R_NETWORK_GA_0__TYPE (REG_UDWORD)
+#define R_NETWORK_GA_0__GET REG_GET_WO
+#define R_NETWORK_GA_0__IGET REG_IGET_WO
+#define R_NETWORK_GA_0__SET REG_SET_WO
+#define R_NETWORK_GA_0__ISET REG_ISET_WO
+#define R_NETWORK_GA_0__SET_VAL REG_SET_VAL_WO
+#define R_NETWORK_GA_0__EQL REG_EQL_WO
+#define R_NETWORK_GA_0__IEQL REG_IEQL_WO
+#define R_NETWORK_GA_0__RD REG_RD_WO
+#define R_NETWORK_GA_0__IRD REG_IRD_WO
+#define R_NETWORK_GA_0__WR REG_WR_WO
+#define R_NETWORK_GA_0__IWR REG_IWR_WO
+
+#define R_NETWORK_GA_0__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_NETWORK_GA_0__ga_low__ga_low__MASK 0xffffffffU
+
+#define R_NETWORK_GA_0__ga_low__MAX 0xffffffff
+
+#define R_NETWORK_GA_0__ga_low__MIN 0
+
+#define R_NETWORK_GA_0__ga_low__BITNR 0
+
+#define R_NETWORK_GA_0__ga_low__ga_low__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_NETWORK_GA_1
+ * - type: WO
+ * - addr: 0xb0000090
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+#define R_NETWORK_GA_1__ADDR (REG_TYPECAST_UDWORD 0xb0000090)
+
+#ifndef REG_NO_SHADOW
+#define R_NETWORK_GA_1__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_NETWORK_GA_1 + 0))
+#define R_NETWORK_GA_1__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_NETWORK_GA_1 + 0))
+#else /* REG_NO_SHADOW */
+#define R_NETWORK_GA_1__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_NETWORK_GA_1__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_NETWORK_GA_1__STYPECAST REG_STYPECAST_UDWORD
+#define R_NETWORK_GA_1__SVAL REG_SVAL_SHADOW
+#define R_NETWORK_GA_1__SVAL_I REG_SVAL_I_SHADOW
+#define R_NETWORK_GA_1__TYPECAST REG_TYPECAST_UDWORD
+#define R_NETWORK_GA_1__TYPE (REG_UDWORD)
+#define R_NETWORK_GA_1__GET REG_GET_WO
+#define R_NETWORK_GA_1__IGET REG_IGET_WO
+#define R_NETWORK_GA_1__SET REG_SET_WO
+#define R_NETWORK_GA_1__ISET REG_ISET_WO
+#define R_NETWORK_GA_1__SET_VAL REG_SET_VAL_WO
+#define R_NETWORK_GA_1__EQL REG_EQL_WO
+#define R_NETWORK_GA_1__IEQL REG_IEQL_WO
+#define R_NETWORK_GA_1__RD REG_RD_WO
+#define R_NETWORK_GA_1__IRD REG_IRD_WO
+#define R_NETWORK_GA_1__WR REG_WR_WO
+#define R_NETWORK_GA_1__IWR REG_IWR_WO
+
+#define R_NETWORK_GA_1__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_NETWORK_GA_1__ga_high__ga_high__MASK 0xffffffffU
+
+#define R_NETWORK_GA_1__ga_high__MAX 0xffffffff
+
+#define R_NETWORK_GA_1__ga_high__MIN 0
+
+#define R_NETWORK_GA_1__ga_high__BITNR 0
+
+#define R_NETWORK_GA_1__ga_high__ga_high__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_NETWORK_GEN_CONFIG
+ * - type: WO
+ * - addr: 0xb0000098
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+#define R_NETWORK_GEN_CONFIG__ADDR (REG_TYPECAST_UDWORD 0xb0000098)
+
+#ifndef REG_NO_SHADOW
+#define R_NETWORK_GEN_CONFIG__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_NETWORK_GEN_CONFIG + 0))
+#define R_NETWORK_GEN_CONFIG__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_NETWORK_GEN_CONFIG + 0))
+#else /* REG_NO_SHADOW */
+#define R_NETWORK_GEN_CONFIG__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_NETWORK_GEN_CONFIG__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_NETWORK_GEN_CONFIG__STYPECAST REG_STYPECAST_UDWORD
+#define R_NETWORK_GEN_CONFIG__SVAL REG_SVAL_SHADOW
+#define R_NETWORK_GEN_CONFIG__SVAL_I REG_SVAL_I_SHADOW
+#define R_NETWORK_GEN_CONFIG__TYPECAST REG_TYPECAST_UDWORD
+#define R_NETWORK_GEN_CONFIG__TYPE (REG_UDWORD)
+#define R_NETWORK_GEN_CONFIG__GET REG_GET_WO
+#define R_NETWORK_GEN_CONFIG__IGET REG_IGET_WO
+#define R_NETWORK_GEN_CONFIG__SET REG_SET_WO
+#define R_NETWORK_GEN_CONFIG__ISET REG_ISET_WO
+#define R_NETWORK_GEN_CONFIG__SET_VAL REG_SET_VAL_WO
+#define R_NETWORK_GEN_CONFIG__EQL REG_EQL_WO
+#define R_NETWORK_GEN_CONFIG__IEQL REG_IEQL_WO
+#define R_NETWORK_GEN_CONFIG__RD REG_RD_WO
+#define R_NETWORK_GEN_CONFIG__IRD REG_IRD_WO
+#define R_NETWORK_GEN_CONFIG__WR REG_WR_WO
+#define R_NETWORK_GEN_CONFIG__IWR REG_IWR_WO
+
+#define R_NETWORK_GEN_CONFIG__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_NETWORK_GEN_CONFIG__loopback__loopback__MASK 0x00000020U
+#define R_NETWORK_GEN_CONFIG__frame__frame__MASK 0x00000010U
+#define R_NETWORK_GEN_CONFIG__vg__vg__MASK 0x00000008U
+#define R_NETWORK_GEN_CONFIG__phy__phy__MASK 0x00000006U
+#define R_NETWORK_GEN_CONFIG__enable__enable__MASK 0x00000001U
+
+#define R_NETWORK_GEN_CONFIG__loopback__MAX 0x1
+#define R_NETWORK_GEN_CONFIG__frame__MAX 0x1
+#define R_NETWORK_GEN_CONFIG__vg__MAX 0x1
+#define R_NETWORK_GEN_CONFIG__phy__MAX 0x3
+#define R_NETWORK_GEN_CONFIG__enable__MAX 0x1
+
+#define R_NETWORK_GEN_CONFIG__loopback__MIN 0
+#define R_NETWORK_GEN_CONFIG__frame__MIN 0
+#define R_NETWORK_GEN_CONFIG__vg__MIN 0
+#define R_NETWORK_GEN_CONFIG__phy__MIN 0
+#define R_NETWORK_GEN_CONFIG__enable__MIN 0
+
+#define R_NETWORK_GEN_CONFIG__loopback__BITNR 5
+#define R_NETWORK_GEN_CONFIG__frame__BITNR 4
+#define R_NETWORK_GEN_CONFIG__vg__BITNR 3
+#define R_NETWORK_GEN_CONFIG__phy__BITNR 1
+#define R_NETWORK_GEN_CONFIG__enable__BITNR 0
+
+#define R_NETWORK_GEN_CONFIG__loopback__loopback__VAL REG_VAL_ENUM
+#define R_NETWORK_GEN_CONFIG__frame__frame__VAL REG_VAL_ENUM
+#define R_NETWORK_GEN_CONFIG__vg__vg__VAL REG_VAL_ENUM
+#define R_NETWORK_GEN_CONFIG__phy__phy__VAL REG_VAL_ENUM
+#define R_NETWORK_GEN_CONFIG__enable__enable__VAL REG_VAL_ENUM
+
+#define R_NETWORK_GEN_CONFIG__loopback__loopback__off 0
+#define R_NETWORK_GEN_CONFIG__loopback__loopback__on 1
+#define R_NETWORK_GEN_CONFIG__frame__frame__ether 0
+#define R_NETWORK_GEN_CONFIG__frame__frame__tokenr 1
+#define R_NETWORK_GEN_CONFIG__vg__vg__off 0
+#define R_NETWORK_GEN_CONFIG__vg__vg__on 1
+#define R_NETWORK_GEN_CONFIG__phy__phy__mii_clk 1
+#define R_NETWORK_GEN_CONFIG__phy__phy__mii_err 2
+#define R_NETWORK_GEN_CONFIG__phy__phy__mii_req 3
+#define R_NETWORK_GEN_CONFIG__phy__phy__sni 0
+#define R_NETWORK_GEN_CONFIG__enable__enable__off 0
+#define R_NETWORK_GEN_CONFIG__enable__enable__on 1
+
+#endif
+
+/*
+ * R_NETWORK_MGM_CTRL
+ * - type: WO
+ * - addr: 0xb00000a0
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+#define R_NETWORK_MGM_CTRL__ADDR (REG_TYPECAST_UDWORD 0xb00000a0)
+
+#ifndef REG_NO_SHADOW
+#define R_NETWORK_MGM_CTRL__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_NETWORK_MGM_CTRL + 0))
+#define R_NETWORK_MGM_CTRL__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_NETWORK_MGM_CTRL + 0))
+#else /* REG_NO_SHADOW */
+#define R_NETWORK_MGM_CTRL__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_NETWORK_MGM_CTRL__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_NETWORK_MGM_CTRL__STYPECAST REG_STYPECAST_UDWORD
+#define R_NETWORK_MGM_CTRL__SVAL REG_SVAL_SHADOW
+#define R_NETWORK_MGM_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_NETWORK_MGM_CTRL__TYPECAST REG_TYPECAST_UDWORD
+#define R_NETWORK_MGM_CTRL__TYPE (REG_UDWORD)
+#define R_NETWORK_MGM_CTRL__GET REG_GET_WO
+#define R_NETWORK_MGM_CTRL__IGET REG_IGET_WO
+#define R_NETWORK_MGM_CTRL__SET REG_SET_WO
+#define R_NETWORK_MGM_CTRL__ISET REG_ISET_WO
+#define R_NETWORK_MGM_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_NETWORK_MGM_CTRL__EQL REG_EQL_WO
+#define R_NETWORK_MGM_CTRL__IEQL REG_IEQL_WO
+#define R_NETWORK_MGM_CTRL__RD REG_RD_WO
+#define R_NETWORK_MGM_CTRL__IRD REG_IRD_WO
+#define R_NETWORK_MGM_CTRL__WR REG_WR_WO
+#define R_NETWORK_MGM_CTRL__IWR REG_IWR_WO
+
+#define R_NETWORK_MGM_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_NETWORK_MGM_CTRL__txd_pins__txd_pins__MASK 0x000000f0U
+#define R_NETWORK_MGM_CTRL__txer_pin__txer_pin__MASK 0x00000008U
+#define R_NETWORK_MGM_CTRL__mdck__mdck__MASK 0x00000004U
+#define R_NETWORK_MGM_CTRL__mdoe__mdoe__MASK 0x00000002U
+#define R_NETWORK_MGM_CTRL__mdio__mdio__MASK 0x00000001U
+
+#define R_NETWORK_MGM_CTRL__txd_pins__MAX 0xf
+#define R_NETWORK_MGM_CTRL__txer_pin__MAX 0x1
+#define R_NETWORK_MGM_CTRL__mdck__MAX 0x1
+#define R_NETWORK_MGM_CTRL__mdoe__MAX 0x1
+#define R_NETWORK_MGM_CTRL__mdio__MAX 0x1
+
+#define R_NETWORK_MGM_CTRL__txd_pins__MIN 0
+#define R_NETWORK_MGM_CTRL__txer_pin__MIN 0
+#define R_NETWORK_MGM_CTRL__mdck__MIN 0
+#define R_NETWORK_MGM_CTRL__mdoe__MIN 0
+#define R_NETWORK_MGM_CTRL__mdio__MIN 0
+
+#define R_NETWORK_MGM_CTRL__txd_pins__BITNR 4
+#define R_NETWORK_MGM_CTRL__txer_pin__BITNR 3
+#define R_NETWORK_MGM_CTRL__mdck__BITNR 2
+#define R_NETWORK_MGM_CTRL__mdoe__BITNR 1
+#define R_NETWORK_MGM_CTRL__mdio__BITNR 0
+
+#define R_NETWORK_MGM_CTRL__txd_pins__txd_pins__VAL REG_VAL_VAL
+#define R_NETWORK_MGM_CTRL__txer_pin__txer_pin__VAL REG_VAL_VAL
+#define R_NETWORK_MGM_CTRL__mdck__mdck__VAL REG_VAL_VAL
+#define R_NETWORK_MGM_CTRL__mdoe__mdoe__VAL REG_VAL_ENUM
+#define R_NETWORK_MGM_CTRL__mdio__mdio__VAL REG_VAL_VAL
+
+#define R_NETWORK_MGM_CTRL__mdoe__mdoe__disable 0
+#define R_NETWORK_MGM_CTRL__mdoe__mdoe__enable 1
+
+#endif
+
+/*
+ * R_NETWORK_REC_CONFIG
+ * - type: WO
+ * - addr: 0xb0000094
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+#define R_NETWORK_REC_CONFIG__ADDR (REG_TYPECAST_UDWORD 0xb0000094)
+
+#ifndef REG_NO_SHADOW
+#define R_NETWORK_REC_CONFIG__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_NETWORK_REC_CONFIG + 0))
+#define R_NETWORK_REC_CONFIG__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_NETWORK_REC_CONFIG + 0))
+#else /* REG_NO_SHADOW */
+#define R_NETWORK_REC_CONFIG__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_NETWORK_REC_CONFIG__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_NETWORK_REC_CONFIG__STYPECAST REG_STYPECAST_UDWORD
+#define R_NETWORK_REC_CONFIG__SVAL REG_SVAL_SHADOW
+#define R_NETWORK_REC_CONFIG__SVAL_I REG_SVAL_I_SHADOW
+#define R_NETWORK_REC_CONFIG__TYPECAST REG_TYPECAST_UDWORD
+#define R_NETWORK_REC_CONFIG__TYPE (REG_UDWORD)
+#define R_NETWORK_REC_CONFIG__GET REG_GET_WO
+#define R_NETWORK_REC_CONFIG__IGET REG_IGET_WO
+#define R_NETWORK_REC_CONFIG__SET REG_SET_WO
+#define R_NETWORK_REC_CONFIG__ISET REG_ISET_WO
+#define R_NETWORK_REC_CONFIG__SET_VAL REG_SET_VAL_WO
+#define R_NETWORK_REC_CONFIG__EQL REG_EQL_WO
+#define R_NETWORK_REC_CONFIG__IEQL REG_IEQL_WO
+#define R_NETWORK_REC_CONFIG__RD REG_RD_WO
+#define R_NETWORK_REC_CONFIG__IRD REG_IRD_WO
+#define R_NETWORK_REC_CONFIG__WR REG_WR_WO
+#define R_NETWORK_REC_CONFIG__IWR REG_IWR_WO
+
+#define R_NETWORK_REC_CONFIG__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_NETWORK_REC_CONFIG__max_size__max_size__MASK 0x00000400U
+#define R_NETWORK_REC_CONFIG__duplex__duplex__MASK 0x00000200U
+#define R_NETWORK_REC_CONFIG__bad_crc__bad_crc__MASK 0x00000100U
+#define R_NETWORK_REC_CONFIG__oversize__oversize__MASK 0x00000080U
+#define R_NETWORK_REC_CONFIG__undersize__undersize__MASK 0x00000040U
+#define R_NETWORK_REC_CONFIG__all_roots__all_roots__MASK 0x00000020U
+#define R_NETWORK_REC_CONFIG__tr_broadcast__tr_broadcast__MASK 0x00000010U
+#define R_NETWORK_REC_CONFIG__broadcast__broadcast__MASK 0x00000008U
+#define R_NETWORK_REC_CONFIG__individual__individual__MASK 0x00000004U
+#define R_NETWORK_REC_CONFIG__ma1__ma1__MASK 0x00000002U
+#define R_NETWORK_REC_CONFIG__ma0__ma0__MASK 0x00000001U
+
+#define R_NETWORK_REC_CONFIG__max_size__MAX 0x1
+#define R_NETWORK_REC_CONFIG__duplex__MAX 0x1
+#define R_NETWORK_REC_CONFIG__bad_crc__MAX 0x1
+#define R_NETWORK_REC_CONFIG__oversize__MAX 0x1
+#define R_NETWORK_REC_CONFIG__undersize__MAX 0x1
+#define R_NETWORK_REC_CONFIG__all_roots__MAX 0x1
+#define R_NETWORK_REC_CONFIG__tr_broadcast__MAX 0x1
+#define R_NETWORK_REC_CONFIG__broadcast__MAX 0x1
+#define R_NETWORK_REC_CONFIG__individual__MAX 0x1
+#define R_NETWORK_REC_CONFIG__ma1__MAX 0x1
+#define R_NETWORK_REC_CONFIG__ma0__MAX 0x1
+
+#define R_NETWORK_REC_CONFIG__max_size__MIN 0
+#define R_NETWORK_REC_CONFIG__duplex__MIN 0
+#define R_NETWORK_REC_CONFIG__bad_crc__MIN 0
+#define R_NETWORK_REC_CONFIG__oversize__MIN 0
+#define R_NETWORK_REC_CONFIG__undersize__MIN 0
+#define R_NETWORK_REC_CONFIG__all_roots__MIN 0
+#define R_NETWORK_REC_CONFIG__tr_broadcast__MIN 0
+#define R_NETWORK_REC_CONFIG__broadcast__MIN 0
+#define R_NETWORK_REC_CONFIG__individual__MIN 0
+#define R_NETWORK_REC_CONFIG__ma1__MIN 0
+#define R_NETWORK_REC_CONFIG__ma0__MIN 0
+
+#define R_NETWORK_REC_CONFIG__max_size__BITNR 10
+#define R_NETWORK_REC_CONFIG__duplex__BITNR 9
+#define R_NETWORK_REC_CONFIG__bad_crc__BITNR 8
+#define R_NETWORK_REC_CONFIG__oversize__BITNR 7
+#define R_NETWORK_REC_CONFIG__undersize__BITNR 6
+#define R_NETWORK_REC_CONFIG__all_roots__BITNR 5
+#define R_NETWORK_REC_CONFIG__tr_broadcast__BITNR 4
+#define R_NETWORK_REC_CONFIG__broadcast__BITNR 3
+#define R_NETWORK_REC_CONFIG__individual__BITNR 2
+#define R_NETWORK_REC_CONFIG__ma1__BITNR 1
+#define R_NETWORK_REC_CONFIG__ma0__BITNR 0
+
+#define R_NETWORK_REC_CONFIG__max_size__max_size__VAL REG_VAL_ENUM
+#define R_NETWORK_REC_CONFIG__duplex__duplex__VAL REG_VAL_ENUM
+#define R_NETWORK_REC_CONFIG__bad_crc__bad_crc__VAL REG_VAL_ENUM
+#define R_NETWORK_REC_CONFIG__oversize__oversize__VAL REG_VAL_ENUM
+#define R_NETWORK_REC_CONFIG__undersize__undersize__VAL REG_VAL_ENUM
+#define R_NETWORK_REC_CONFIG__all_roots__all_roots__VAL REG_VAL_ENUM
+#define R_NETWORK_REC_CONFIG__tr_broadcast__tr_broadcast__VAL REG_VAL_ENUM
+#define R_NETWORK_REC_CONFIG__broadcast__broadcast__VAL REG_VAL_ENUM
+#define R_NETWORK_REC_CONFIG__individual__individual__VAL REG_VAL_ENUM
+#define R_NETWORK_REC_CONFIG__ma1__ma1__VAL REG_VAL_ENUM
+#define R_NETWORK_REC_CONFIG__ma0__ma0__VAL REG_VAL_ENUM
+
+#define R_NETWORK_REC_CONFIG__max_size__max_size__size1518 0
+#define R_NETWORK_REC_CONFIG__max_size__max_size__size1522 1
+#define R_NETWORK_REC_CONFIG__duplex__duplex__full 1
+#define R_NETWORK_REC_CONFIG__duplex__duplex__half 0
+#define R_NETWORK_REC_CONFIG__bad_crc__bad_crc__discard 0
+#define R_NETWORK_REC_CONFIG__bad_crc__bad_crc__receive 1
+#define R_NETWORK_REC_CONFIG__oversize__oversize__discard 0
+#define R_NETWORK_REC_CONFIG__oversize__oversize__receive 1
+#define R_NETWORK_REC_CONFIG__undersize__undersize__discard 0
+#define R_NETWORK_REC_CONFIG__undersize__undersize__receive 1
+#define R_NETWORK_REC_CONFIG__all_roots__all_roots__discard 0
+#define R_NETWORK_REC_CONFIG__all_roots__all_roots__receive 1
+#define R_NETWORK_REC_CONFIG__tr_broadcast__tr_broadcast__discard 0
+#define R_NETWORK_REC_CONFIG__tr_broadcast__tr_broadcast__receive 1
+#define R_NETWORK_REC_CONFIG__broadcast__broadcast__discard 0
+#define R_NETWORK_REC_CONFIG__broadcast__broadcast__receive 1
+#define R_NETWORK_REC_CONFIG__individual__individual__discard 0
+#define R_NETWORK_REC_CONFIG__individual__individual__receive 1
+#define R_NETWORK_REC_CONFIG__ma1__ma1__disable 0
+#define R_NETWORK_REC_CONFIG__ma1__ma1__enable 1
+#define R_NETWORK_REC_CONFIG__ma0__ma0__disable 0
+#define R_NETWORK_REC_CONFIG__ma0__ma0__enable 1
+
+#endif
+
+/*
+ * R_NETWORK_SA_0
+ * - type: WO
+ * - addr: 0xb0000080
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+#define R_NETWORK_SA_0__ADDR (REG_TYPECAST_UDWORD 0xb0000080)
+
+#ifndef REG_NO_SHADOW
+#define R_NETWORK_SA_0__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_NETWORK_SA_0 + 0))
+#define R_NETWORK_SA_0__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_NETWORK_SA_0 + 0))
+#else /* REG_NO_SHADOW */
+#define R_NETWORK_SA_0__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_NETWORK_SA_0__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_NETWORK_SA_0__STYPECAST REG_STYPECAST_UDWORD
+#define R_NETWORK_SA_0__SVAL REG_SVAL_SHADOW
+#define R_NETWORK_SA_0__SVAL_I REG_SVAL_I_SHADOW
+#define R_NETWORK_SA_0__TYPECAST REG_TYPECAST_UDWORD
+#define R_NETWORK_SA_0__TYPE (REG_UDWORD)
+#define R_NETWORK_SA_0__GET REG_GET_WO
+#define R_NETWORK_SA_0__IGET REG_IGET_WO
+#define R_NETWORK_SA_0__SET REG_SET_WO
+#define R_NETWORK_SA_0__ISET REG_ISET_WO
+#define R_NETWORK_SA_0__SET_VAL REG_SET_VAL_WO
+#define R_NETWORK_SA_0__EQL REG_EQL_WO
+#define R_NETWORK_SA_0__IEQL REG_IEQL_WO
+#define R_NETWORK_SA_0__RD REG_RD_WO
+#define R_NETWORK_SA_0__IRD REG_IRD_WO
+#define R_NETWORK_SA_0__WR REG_WR_WO
+#define R_NETWORK_SA_0__IWR REG_IWR_WO
+
+#define R_NETWORK_SA_0__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_NETWORK_SA_0__ma0_low__ma0_low__MASK 0xffffffffU
+
+#define R_NETWORK_SA_0__ma0_low__MAX 0xffffffff
+
+#define R_NETWORK_SA_0__ma0_low__MIN 0
+
+#define R_NETWORK_SA_0__ma0_low__BITNR 0
+
+#define R_NETWORK_SA_0__ma0_low__ma0_low__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_NETWORK_SA_1
+ * - type: WO
+ * - addr: 0xb0000084
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+#define R_NETWORK_SA_1__ADDR (REG_TYPECAST_UDWORD 0xb0000084)
+
+#ifndef REG_NO_SHADOW
+#define R_NETWORK_SA_1__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_NETWORK_SA_1 + 0))
+#define R_NETWORK_SA_1__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_NETWORK_SA_1 + 0))
+#else /* REG_NO_SHADOW */
+#define R_NETWORK_SA_1__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_NETWORK_SA_1__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_NETWORK_SA_1__STYPECAST REG_STYPECAST_UDWORD
+#define R_NETWORK_SA_1__SVAL REG_SVAL_SHADOW
+#define R_NETWORK_SA_1__SVAL_I REG_SVAL_I_SHADOW
+#define R_NETWORK_SA_1__TYPECAST REG_TYPECAST_UDWORD
+#define R_NETWORK_SA_1__TYPE (REG_UDWORD)
+#define R_NETWORK_SA_1__GET REG_GET_WO
+#define R_NETWORK_SA_1__IGET REG_IGET_WO
+#define R_NETWORK_SA_1__SET REG_SET_WO
+#define R_NETWORK_SA_1__ISET REG_ISET_WO
+#define R_NETWORK_SA_1__SET_VAL REG_SET_VAL_WO
+#define R_NETWORK_SA_1__EQL REG_EQL_WO
+#define R_NETWORK_SA_1__IEQL REG_IEQL_WO
+#define R_NETWORK_SA_1__RD REG_RD_WO
+#define R_NETWORK_SA_1__IRD REG_IRD_WO
+#define R_NETWORK_SA_1__WR REG_WR_WO
+#define R_NETWORK_SA_1__IWR REG_IWR_WO
+
+#define R_NETWORK_SA_1__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_NETWORK_SA_1__ma1_low__ma1_low__MASK 0xffff0000U
+#define R_NETWORK_SA_1__ma0_high__ma0_high__MASK 0x0000ffffU
+
+#define R_NETWORK_SA_1__ma1_low__MAX 0xffff
+#define R_NETWORK_SA_1__ma0_high__MAX 0xffff
+
+#define R_NETWORK_SA_1__ma1_low__MIN 0
+#define R_NETWORK_SA_1__ma0_high__MIN 0
+
+#define R_NETWORK_SA_1__ma1_low__BITNR 16
+#define R_NETWORK_SA_1__ma0_high__BITNR 0
+
+#define R_NETWORK_SA_1__ma1_low__ma1_low__VAL REG_VAL_VAL
+#define R_NETWORK_SA_1__ma0_high__ma0_high__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_NETWORK_SA_2
+ * - type: WO
+ * - addr: 0xb0000088
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+#define R_NETWORK_SA_2__ADDR (REG_TYPECAST_UDWORD 0xb0000088)
+
+#ifndef REG_NO_SHADOW
+#define R_NETWORK_SA_2__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_NETWORK_SA_2 + 0))
+#define R_NETWORK_SA_2__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_NETWORK_SA_2 + 0))
+#else /* REG_NO_SHADOW */
+#define R_NETWORK_SA_2__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_NETWORK_SA_2__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_NETWORK_SA_2__STYPECAST REG_STYPECAST_UDWORD
+#define R_NETWORK_SA_2__SVAL REG_SVAL_SHADOW
+#define R_NETWORK_SA_2__SVAL_I REG_SVAL_I_SHADOW
+#define R_NETWORK_SA_2__TYPECAST REG_TYPECAST_UDWORD
+#define R_NETWORK_SA_2__TYPE (REG_UDWORD)
+#define R_NETWORK_SA_2__GET REG_GET_WO
+#define R_NETWORK_SA_2__IGET REG_IGET_WO
+#define R_NETWORK_SA_2__SET REG_SET_WO
+#define R_NETWORK_SA_2__ISET REG_ISET_WO
+#define R_NETWORK_SA_2__SET_VAL REG_SET_VAL_WO
+#define R_NETWORK_SA_2__EQL REG_EQL_WO
+#define R_NETWORK_SA_2__IEQL REG_IEQL_WO
+#define R_NETWORK_SA_2__RD REG_RD_WO
+#define R_NETWORK_SA_2__IRD REG_IRD_WO
+#define R_NETWORK_SA_2__WR REG_WR_WO
+#define R_NETWORK_SA_2__IWR REG_IWR_WO
+
+#define R_NETWORK_SA_2__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_NETWORK_SA_2__ma1_high__ma1_high__MASK 0xffffffffU
+
+#define R_NETWORK_SA_2__ma1_high__MAX 0xffffffff
+
+#define R_NETWORK_SA_2__ma1_high__MIN 0
+
+#define R_NETWORK_SA_2__ma1_high__BITNR 0
+
+#define R_NETWORK_SA_2__ma1_high__ma1_high__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_NETWORK_STAT
+ * - type: RO
+ * - addr: 0xb00000a0
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+#define R_NETWORK_STAT__ADDR (REG_TYPECAST_UDWORD 0xb00000a0)
+#define R_NETWORK_STAT__SVAL REG_SVAL_SHADOW
+#define R_NETWORK_STAT__SVAL_I REG_SVAL_I_SHADOW
+#define R_NETWORK_STAT__TYPECAST REG_TYPECAST_UDWORD
+#define R_NETWORK_STAT__TYPE (REG_UDWORD)
+#define R_NETWORK_STAT__GET REG_GET_RO
+#define R_NETWORK_STAT__IGET REG_IGET_RO
+#define R_NETWORK_STAT__SET REG_SET_RO
+#define R_NETWORK_STAT__ISET REG_ISET_RO
+#define R_NETWORK_STAT__SET_VAL REG_SET_VAL_RO
+#define R_NETWORK_STAT__EQL REG_EQL_RO
+#define R_NETWORK_STAT__IEQL REG_IEQL_RO
+#define R_NETWORK_STAT__RD REG_RD_RO
+#define R_NETWORK_STAT__IRD REG_IRD_RO
+#define R_NETWORK_STAT__WR REG_WR_RO
+#define R_NETWORK_STAT__IWR REG_IWR_RO
+
+#define R_NETWORK_STAT__READ(addr) \
+ (*(addr))
+
+#define R_NETWORK_STAT__rxd_pins__rxd_pins__MASK 0x000000f0U
+#define R_NETWORK_STAT__rxer__rxer__MASK 0x00000008U
+#define R_NETWORK_STAT__underrun__underrun__MASK 0x00000004U
+#define R_NETWORK_STAT__exc_col__exc_col__MASK 0x00000002U
+#define R_NETWORK_STAT__mdio__mdio__MASK 0x00000001U
+
+#define R_NETWORK_STAT__rxd_pins__MAX 0xf
+#define R_NETWORK_STAT__rxer__MAX 0x1
+#define R_NETWORK_STAT__underrun__MAX 0x1
+#define R_NETWORK_STAT__exc_col__MAX 0x1
+#define R_NETWORK_STAT__mdio__MAX 0x1
+
+#define R_NETWORK_STAT__rxd_pins__MIN 0
+#define R_NETWORK_STAT__rxer__MIN 0
+#define R_NETWORK_STAT__underrun__MIN 0
+#define R_NETWORK_STAT__exc_col__MIN 0
+#define R_NETWORK_STAT__mdio__MIN 0
+
+#define R_NETWORK_STAT__rxd_pins__BITNR 4
+#define R_NETWORK_STAT__rxer__BITNR 3
+#define R_NETWORK_STAT__underrun__BITNR 2
+#define R_NETWORK_STAT__exc_col__BITNR 1
+#define R_NETWORK_STAT__mdio__BITNR 0
+
+#define R_NETWORK_STAT__rxd_pins__rxd_pins__VAL REG_VAL_VAL
+#define R_NETWORK_STAT__rxer__rxer__VAL REG_VAL_VAL
+#define R_NETWORK_STAT__underrun__underrun__VAL REG_VAL_ENUM
+#define R_NETWORK_STAT__exc_col__exc_col__VAL REG_VAL_ENUM
+#define R_NETWORK_STAT__mdio__mdio__VAL REG_VAL_VAL
+
+#define R_NETWORK_STAT__underrun__underrun__no 0
+#define R_NETWORK_STAT__underrun__underrun__yes 1
+#define R_NETWORK_STAT__exc_col__exc_col__no 0
+#define R_NETWORK_STAT__exc_col__exc_col__yes 1
+
+#endif
+
+/*
+ * R_NETWORK_TR_CTRL
+ * - type: WO
+ * - addr: 0xb000009c
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+#define R_NETWORK_TR_CTRL__ADDR (REG_TYPECAST_UDWORD 0xb000009c)
+
+#ifndef REG_NO_SHADOW
+#define R_NETWORK_TR_CTRL__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_NETWORK_TR_CTRL + 0))
+#define R_NETWORK_TR_CTRL__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_NETWORK_TR_CTRL + 0))
+#else /* REG_NO_SHADOW */
+#define R_NETWORK_TR_CTRL__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_NETWORK_TR_CTRL__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_NETWORK_TR_CTRL__STYPECAST REG_STYPECAST_UDWORD
+#define R_NETWORK_TR_CTRL__SVAL REG_SVAL_SHADOW
+#define R_NETWORK_TR_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_NETWORK_TR_CTRL__TYPECAST REG_TYPECAST_UDWORD
+#define R_NETWORK_TR_CTRL__TYPE (REG_UDWORD)
+#define R_NETWORK_TR_CTRL__GET REG_GET_WO
+#define R_NETWORK_TR_CTRL__IGET REG_IGET_WO
+#define R_NETWORK_TR_CTRL__SET REG_SET_WO
+#define R_NETWORK_TR_CTRL__ISET REG_ISET_WO
+#define R_NETWORK_TR_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_NETWORK_TR_CTRL__EQL REG_EQL_WO
+#define R_NETWORK_TR_CTRL__IEQL REG_IEQL_WO
+#define R_NETWORK_TR_CTRL__RD REG_RD_WO
+#define R_NETWORK_TR_CTRL__IRD REG_IRD_WO
+#define R_NETWORK_TR_CTRL__WR REG_WR_WO
+#define R_NETWORK_TR_CTRL__IWR REG_IWR_WO
+
+#define R_NETWORK_TR_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_NETWORK_TR_CTRL__clr_error__clr_error__MASK 0x00000100U
+#define R_NETWORK_TR_CTRL__delay__delay__MASK 0x00000020U
+#define R_NETWORK_TR_CTRL__cancel__cancel__MASK 0x00000010U
+#define R_NETWORK_TR_CTRL__cd__cd__MASK 0x00000008U
+#define R_NETWORK_TR_CTRL__retry__retry__MASK 0x00000004U
+#define R_NETWORK_TR_CTRL__pad__pad__MASK 0x00000002U
+#define R_NETWORK_TR_CTRL__crc__crc__MASK 0x00000001U
+
+#define R_NETWORK_TR_CTRL__clr_error__MAX 0x1
+#define R_NETWORK_TR_CTRL__delay__MAX 0x1
+#define R_NETWORK_TR_CTRL__cancel__MAX 0x1
+#define R_NETWORK_TR_CTRL__cd__MAX 0x1
+#define R_NETWORK_TR_CTRL__retry__MAX 0x1
+#define R_NETWORK_TR_CTRL__pad__MAX 0x1
+#define R_NETWORK_TR_CTRL__crc__MAX 0x1
+
+#define R_NETWORK_TR_CTRL__clr_error__MIN 0
+#define R_NETWORK_TR_CTRL__delay__MIN 0
+#define R_NETWORK_TR_CTRL__cancel__MIN 0
+#define R_NETWORK_TR_CTRL__cd__MIN 0
+#define R_NETWORK_TR_CTRL__retry__MIN 0
+#define R_NETWORK_TR_CTRL__pad__MIN 0
+#define R_NETWORK_TR_CTRL__crc__MIN 0
+
+#define R_NETWORK_TR_CTRL__clr_error__BITNR 8
+#define R_NETWORK_TR_CTRL__delay__BITNR 5
+#define R_NETWORK_TR_CTRL__cancel__BITNR 4
+#define R_NETWORK_TR_CTRL__cd__BITNR 3
+#define R_NETWORK_TR_CTRL__retry__BITNR 2
+#define R_NETWORK_TR_CTRL__pad__BITNR 1
+#define R_NETWORK_TR_CTRL__crc__BITNR 0
+
+#define R_NETWORK_TR_CTRL__clr_error__clr_error__VAL REG_VAL_ENUM
+#define R_NETWORK_TR_CTRL__delay__delay__VAL REG_VAL_ENUM
+#define R_NETWORK_TR_CTRL__cancel__cancel__VAL REG_VAL_ENUM
+#define R_NETWORK_TR_CTRL__cd__cd__VAL REG_VAL_ENUM
+#define R_NETWORK_TR_CTRL__retry__retry__VAL REG_VAL_ENUM
+#define R_NETWORK_TR_CTRL__pad__pad__VAL REG_VAL_ENUM
+#define R_NETWORK_TR_CTRL__crc__crc__VAL REG_VAL_ENUM
+
+#define R_NETWORK_TR_CTRL__clr_error__clr_error__clr 1
+#define R_NETWORK_TR_CTRL__clr_error__clr_error__nop 0
+#define R_NETWORK_TR_CTRL__delay__delay__d2us 1
+#define R_NETWORK_TR_CTRL__delay__delay__none 0
+#define R_NETWORK_TR_CTRL__cancel__cancel__do 1
+#define R_NETWORK_TR_CTRL__cancel__cancel__dont 0
+#define R_NETWORK_TR_CTRL__cd__cd__ack_col 0
+#define R_NETWORK_TR_CTRL__cd__cd__ack_crs 1
+#define R_NETWORK_TR_CTRL__cd__cd__disable 1
+#define R_NETWORK_TR_CTRL__cd__cd__enable 0
+#define R_NETWORK_TR_CTRL__retry__retry__disable 1
+#define R_NETWORK_TR_CTRL__retry__retry__enable 0
+#define R_NETWORK_TR_CTRL__pad__pad__disable 0
+#define R_NETWORK_TR_CTRL__pad__pad__enable 1
+#define R_NETWORK_TR_CTRL__crc__crc__disable 1
+#define R_NETWORK_TR_CTRL__crc__crc__enable 0
+
+#endif
+
+/*
+ * R_PAR0_CONFIG
+ * - type: WO
+ * - addr: 0xb0000044
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+#define R_PAR0_CONFIG__ADDR (REG_TYPECAST_UDWORD 0xb0000044)
+
+#ifndef REG_NO_SHADOW
+#define R_PAR0_CONFIG__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_ATA_CONFIG + 0))
+#define R_PAR0_CONFIG__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_ATA_CONFIG + 0))
+#else /* REG_NO_SHADOW */
+#define R_PAR0_CONFIG__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_PAR0_CONFIG__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_PAR0_CONFIG__STYPECAST REG_STYPECAST_UDWORD
+#define R_PAR0_CONFIG__SVAL REG_SVAL_SHADOW
+#define R_PAR0_CONFIG__SVAL_I REG_SVAL_I_SHADOW
+#define R_PAR0_CONFIG__TYPECAST REG_TYPECAST_UDWORD
+#define R_PAR0_CONFIG__TYPE (REG_UDWORD)
+#define R_PAR0_CONFIG__GET REG_GET_WO
+#define R_PAR0_CONFIG__IGET REG_IGET_WO
+#define R_PAR0_CONFIG__SET REG_SET_WO
+#define R_PAR0_CONFIG__ISET REG_ISET_WO
+#define R_PAR0_CONFIG__SET_VAL REG_SET_VAL_WO
+#define R_PAR0_CONFIG__EQL REG_EQL_WO
+#define R_PAR0_CONFIG__IEQL REG_IEQL_WO
+#define R_PAR0_CONFIG__RD REG_RD_WO
+#define R_PAR0_CONFIG__IRD REG_IRD_WO
+#define R_PAR0_CONFIG__WR REG_WR_WO
+#define R_PAR0_CONFIG__IWR REG_IWR_WO
+
+#define R_PAR0_CONFIG__WRITE(addr,value) \
+ (*(addr) = (value))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_PAR0_CONFIG__FIRST 0
+#define R_PAR0_CONFIG__IOFFSET 12
+#define R_PAR0_CONFIG__LAST 1
+#define R_PAR0_CONFIG__OFFSET 16
+#define R_PAR0_CONFIG__SOFFSET 12
+/* end */
+
+#define R_PAR0_CONFIG__ioe__ioe__MASK 0x02000000U
+#define R_PAR0_CONFIG__iseli__iseli__MASK 0x01000000U
+#define R_PAR0_CONFIG__iautofd__iautofd__MASK 0x00800000U
+#define R_PAR0_CONFIG__istrb__istrb__MASK 0x00400000U
+#define R_PAR0_CONFIG__iinit__iinit__MASK 0x00200000U
+#define R_PAR0_CONFIG__iperr__iperr__MASK 0x00100000U
+#define R_PAR0_CONFIG__iack__iack__MASK 0x00080000U
+#define R_PAR0_CONFIG__ibusy__ibusy__MASK 0x00040000U
+#define R_PAR0_CONFIG__ifault__ifault__MASK 0x00020000U
+#define R_PAR0_CONFIG__isel__isel__MASK 0x00010000U
+#define R_PAR0_CONFIG__ext_mode__ext_mode__MASK 0x00000800U
+#define R_PAR0_CONFIG__wide__wide__MASK 0x00000400U
+#define R_PAR0_CONFIG__dma__dma__MASK 0x00000200U
+#define R_PAR0_CONFIG__rle_in__rle_in__MASK 0x00000100U
+#define R_PAR0_CONFIG__rle_out__rle_out__MASK 0x00000080U
+#define R_PAR0_CONFIG__enable__enable__MASK 0x00000040U
+#define R_PAR0_CONFIG__force__force__MASK 0x00000020U
+#define R_PAR0_CONFIG__ign_ack__ign_ack__MASK 0x00000010U
+#define R_PAR0_CONFIG__oe_ack__oe_ack__MASK 0x00000008U
+#define R_PAR0_CONFIG__epp_addr_data__epp_addr_data__MASK 0x00000008U
+#define R_PAR0_CONFIG__oe_ack__epp_addr_data__MASK 0x00000008U
+#define R_PAR0_CONFIG__mode__mode__MASK 0x00000007U
+
+#define R_PAR0_CONFIG__ioe__MAX 0x1
+#define R_PAR0_CONFIG__iseli__MAX 0x1
+#define R_PAR0_CONFIG__iautofd__MAX 0x1
+#define R_PAR0_CONFIG__istrb__MAX 0x1
+#define R_PAR0_CONFIG__iinit__MAX 0x1
+#define R_PAR0_CONFIG__iperr__MAX 0x1
+#define R_PAR0_CONFIG__iack__MAX 0x1
+#define R_PAR0_CONFIG__ibusy__MAX 0x1
+#define R_PAR0_CONFIG__ifault__MAX 0x1
+#define R_PAR0_CONFIG__isel__MAX 0x1
+#define R_PAR0_CONFIG__ext_mode__MAX 0x1
+#define R_PAR0_CONFIG__wide__MAX 0x1
+#define R_PAR0_CONFIG__dma__MAX 0x1
+#define R_PAR0_CONFIG__rle_in__MAX 0x1
+#define R_PAR0_CONFIG__rle_out__MAX 0x1
+#define R_PAR0_CONFIG__enable__MAX 0x1
+#define R_PAR0_CONFIG__force__MAX 0x1
+#define R_PAR0_CONFIG__ign_ack__MAX 0x1
+#define R_PAR0_CONFIG__oe_ack__MAX 0x1
+#define R_PAR0_CONFIG__epp_addr_data__MAX 0x1
+#define R_PAR0_CONFIG__mode__MAX 0x7
+
+#define R_PAR0_CONFIG__ioe__MIN 0
+#define R_PAR0_CONFIG__iseli__MIN 0
+#define R_PAR0_CONFIG__iautofd__MIN 0
+#define R_PAR0_CONFIG__istrb__MIN 0
+#define R_PAR0_CONFIG__iinit__MIN 0
+#define R_PAR0_CONFIG__iperr__MIN 0
+#define R_PAR0_CONFIG__iack__MIN 0
+#define R_PAR0_CONFIG__ibusy__MIN 0
+#define R_PAR0_CONFIG__ifault__MIN 0
+#define R_PAR0_CONFIG__isel__MIN 0
+#define R_PAR0_CONFIG__ext_mode__MIN 0
+#define R_PAR0_CONFIG__wide__MIN 0
+#define R_PAR0_CONFIG__dma__MIN 0
+#define R_PAR0_CONFIG__rle_in__MIN 0
+#define R_PAR0_CONFIG__rle_out__MIN 0
+#define R_PAR0_CONFIG__enable__MIN 0
+#define R_PAR0_CONFIG__force__MIN 0
+#define R_PAR0_CONFIG__ign_ack__MIN 0
+#define R_PAR0_CONFIG__oe_ack__MIN 0
+#define R_PAR0_CONFIG__epp_addr_data__MIN 0
+#define R_PAR0_CONFIG__mode__MIN 0
+
+#define R_PAR0_CONFIG__ioe__BITNR 25
+#define R_PAR0_CONFIG__iseli__BITNR 24
+#define R_PAR0_CONFIG__iautofd__BITNR 23
+#define R_PAR0_CONFIG__istrb__BITNR 22
+#define R_PAR0_CONFIG__iinit__BITNR 21
+#define R_PAR0_CONFIG__iperr__BITNR 20
+#define R_PAR0_CONFIG__iack__BITNR 19
+#define R_PAR0_CONFIG__ibusy__BITNR 18
+#define R_PAR0_CONFIG__ifault__BITNR 17
+#define R_PAR0_CONFIG__isel__BITNR 16
+#define R_PAR0_CONFIG__ext_mode__BITNR 11
+#define R_PAR0_CONFIG__wide__BITNR 10
+#define R_PAR0_CONFIG__dma__BITNR 9
+#define R_PAR0_CONFIG__rle_in__BITNR 8
+#define R_PAR0_CONFIG__rle_out__BITNR 7
+#define R_PAR0_CONFIG__enable__BITNR 6
+#define R_PAR0_CONFIG__force__BITNR 5
+#define R_PAR0_CONFIG__ign_ack__BITNR 4
+#define R_PAR0_CONFIG__oe_ack__BITNR 3
+#define R_PAR0_CONFIG__epp_addr_data__BITNR 3
+#define R_PAR0_CONFIG__mode__BITNR 0
+
+#define R_PAR0_CONFIG__ioe__ioe__VAL REG_VAL_ENUM
+#define R_PAR0_CONFIG__iseli__iseli__VAL REG_VAL_ENUM
+#define R_PAR0_CONFIG__iautofd__iautofd__VAL REG_VAL_ENUM
+#define R_PAR0_CONFIG__istrb__istrb__VAL REG_VAL_ENUM
+#define R_PAR0_CONFIG__iinit__iinit__VAL REG_VAL_ENUM
+#define R_PAR0_CONFIG__iperr__iperr__VAL REG_VAL_ENUM
+#define R_PAR0_CONFIG__iack__iack__VAL REG_VAL_ENUM
+#define R_PAR0_CONFIG__ibusy__ibusy__VAL REG_VAL_ENUM
+#define R_PAR0_CONFIG__ifault__ifault__VAL REG_VAL_ENUM
+#define R_PAR0_CONFIG__isel__isel__VAL REG_VAL_ENUM
+#define R_PAR0_CONFIG__ext_mode__ext_mode__VAL REG_VAL_ENUM
+#define R_PAR0_CONFIG__wide__wide__VAL REG_VAL_ENUM
+#define R_PAR0_CONFIG__dma__dma__VAL REG_VAL_ENUM
+#define R_PAR0_CONFIG__rle_in__rle_in__VAL REG_VAL_ENUM
+#define R_PAR0_CONFIG__rle_out__rle_out__VAL REG_VAL_ENUM
+#define R_PAR0_CONFIG__enable__enable__VAL REG_VAL_ENUM
+#define R_PAR0_CONFIG__force__force__VAL REG_VAL_ENUM
+#define R_PAR0_CONFIG__ign_ack__ign_ack__VAL REG_VAL_ENUM
+#define R_PAR0_CONFIG__oe_ack__oe_ack__VAL REG_VAL_ENUM
+#define R_PAR0_CONFIG__epp_addr_data__epp_addr_data__VAL REG_VAL_ENUM
+#define R_PAR0_CONFIG__oe_ack__epp_addr_data__VAL REG_VAL_ENUM
+#define R_PAR0_CONFIG__mode__mode__VAL REG_VAL_ENUM
+
+#define R_PAR0_CONFIG__ioe__ioe__inv 1
+#define R_PAR0_CONFIG__ioe__ioe__noninv 0
+#define R_PAR0_CONFIG__iseli__iseli__inv 1
+#define R_PAR0_CONFIG__iseli__iseli__noninv 0
+#define R_PAR0_CONFIG__iautofd__iautofd__inv 1
+#define R_PAR0_CONFIG__iautofd__iautofd__noninv 0
+#define R_PAR0_CONFIG__istrb__istrb__inv 1
+#define R_PAR0_CONFIG__istrb__istrb__noninv 0
+#define R_PAR0_CONFIG__iinit__iinit__inv 1
+#define R_PAR0_CONFIG__iinit__iinit__noninv 0
+#define R_PAR0_CONFIG__iperr__iperr__inv 1
+#define R_PAR0_CONFIG__iperr__iperr__noninv 0
+#define R_PAR0_CONFIG__iack__iack__inv 1
+#define R_PAR0_CONFIG__iack__iack__noninv 0
+#define R_PAR0_CONFIG__ibusy__ibusy__inv 1
+#define R_PAR0_CONFIG__ibusy__ibusy__noninv 0
+#define R_PAR0_CONFIG__ifault__ifault__inv 1
+#define R_PAR0_CONFIG__ifault__ifault__noninv 0
+#define R_PAR0_CONFIG__isel__isel__inv 1
+#define R_PAR0_CONFIG__isel__isel__noninv 0
+#define R_PAR0_CONFIG__ext_mode__ext_mode__disable 0
+#define R_PAR0_CONFIG__ext_mode__ext_mode__enable 1
+#define R_PAR0_CONFIG__wide__wide__disable 0
+#define R_PAR0_CONFIG__wide__wide__enable 1
+#define R_PAR0_CONFIG__dma__dma__disable 0
+#define R_PAR0_CONFIG__dma__dma__enable 1
+#define R_PAR0_CONFIG__rle_in__rle_in__disable 0
+#define R_PAR0_CONFIG__rle_in__rle_in__enable 1
+#define R_PAR0_CONFIG__rle_out__rle_out__disable 0
+#define R_PAR0_CONFIG__rle_out__rle_out__enable 1
+#define R_PAR0_CONFIG__enable__enable__on 1
+#define R_PAR0_CONFIG__enable__enable__reset 0
+#define R_PAR0_CONFIG__force__force__off 0
+#define R_PAR0_CONFIG__force__force__on 1
+#define R_PAR0_CONFIG__ign_ack__ign_ack__ignore 1
+#define R_PAR0_CONFIG__ign_ack__ign_ack__wait 0
+#define R_PAR0_CONFIG__oe_ack__oe_ack__dont_wait 0
+#define R_PAR0_CONFIG__oe_ack__oe_ack__epp_addr 1
+#define R_PAR0_CONFIG__oe_ack__oe_ack__epp_data 0
+#define R_PAR0_CONFIG__oe_ack__oe_ack__wait_oe 1
+#define R_PAR0_CONFIG__epp_addr_data__epp_addr_data__dont_wait 0
+#define R_PAR0_CONFIG__epp_addr_data__epp_addr_data__epp_addr 1
+#define R_PAR0_CONFIG__epp_addr_data__epp_addr_data__epp_data 0
+#define R_PAR0_CONFIG__epp_addr_data__epp_addr_data__wait_oe 1
+#define R_PAR0_CONFIG__mode__mode__byte 4
+#define R_PAR0_CONFIG__mode__mode__centronics 1
+#define R_PAR0_CONFIG__mode__mode__ecp_fwd 5
+#define R_PAR0_CONFIG__mode__mode__ecp_rev 6
+#define R_PAR0_CONFIG__mode__mode__epp_rd 0
+#define R_PAR0_CONFIG__mode__mode__epp_wr1 5
+#define R_PAR0_CONFIG__mode__mode__epp_wr2 6
+#define R_PAR0_CONFIG__mode__mode__epp_wr3 7
+#define R_PAR0_CONFIG__mode__mode__fastbyte 2
+#define R_PAR0_CONFIG__mode__mode__manual 0
+#define R_PAR0_CONFIG__mode__mode__nibble 3
+#define R_PAR0_CONFIG__mode__mode__off 7
+
+#endif
+
+/*
+ * R_PAR0_CTRL
+ * - type: WO
+ * - addr: 0xb0000042
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+#define R_PAR0_CTRL__ADDR (REG_TYPECAST_BYTE 0xb0000042)
+
+#ifndef REG_NO_SHADOW
+#define R_PAR0_CTRL__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_ATA_CTRL_DATA + 2))
+#define R_PAR0_CTRL__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_ATA_CTRL_DATA + 2))
+#else /* REG_NO_SHADOW */
+#define R_PAR0_CTRL__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_PAR0_CTRL__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_PAR0_CTRL__STYPECAST REG_STYPECAST_BYTE
+#define R_PAR0_CTRL__SVAL REG_SVAL_SHADOW
+#define R_PAR0_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_PAR0_CTRL__TYPECAST REG_TYPECAST_BYTE
+#define R_PAR0_CTRL__TYPE (REG_BYTE)
+#define R_PAR0_CTRL__GET REG_GET_WO
+#define R_PAR0_CTRL__IGET REG_IGET_WO
+#define R_PAR0_CTRL__SET REG_SET_WO
+#define R_PAR0_CTRL__ISET REG_ISET_WO
+#define R_PAR0_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_PAR0_CTRL__EQL REG_EQL_WO
+#define R_PAR0_CTRL__IEQL REG_IEQL_WO
+#define R_PAR0_CTRL__RD REG_RD_WO
+#define R_PAR0_CTRL__IRD REG_IRD_WO
+#define R_PAR0_CTRL__WR REG_WR_WO
+#define R_PAR0_CTRL__IWR REG_IWR_WO
+
+#define R_PAR0_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_PAR0_CTRL__FIRST 0
+#define R_PAR0_CTRL__IOFFSET 12
+#define R_PAR0_CTRL__LAST 1
+#define R_PAR0_CTRL__OFFSET 16
+#define R_PAR0_CTRL__SOFFSET 12
+/* end */
+
+#define R_PAR0_CTRL__ctrl__ctrl__MASK 0x0000001fU
+
+#define R_PAR0_CTRL__ctrl__MAX 31
+
+#define R_PAR0_CTRL__ctrl__MIN 0
+
+#define R_PAR0_CTRL__ctrl__BITNR 0
+
+#define R_PAR0_CTRL__ctrl__ctrl__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_PAR0_CTRL_DATA
+ * - type: WO
+ * - addr: 0xb0000040
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+#define R_PAR0_CTRL_DATA__ADDR (REG_TYPECAST_UDWORD 0xb0000040)
+
+#ifndef REG_NO_SHADOW
+#define R_PAR0_CTRL_DATA__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_ATA_CTRL_DATA + 0))
+#define R_PAR0_CTRL_DATA__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_ATA_CTRL_DATA + 0))
+#else /* REG_NO_SHADOW */
+#define R_PAR0_CTRL_DATA__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_PAR0_CTRL_DATA__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_PAR0_CTRL_DATA__STYPECAST REG_STYPECAST_UDWORD
+#define R_PAR0_CTRL_DATA__SVAL REG_SVAL_SHADOW
+#define R_PAR0_CTRL_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_PAR0_CTRL_DATA__TYPECAST REG_TYPECAST_UDWORD
+#define R_PAR0_CTRL_DATA__TYPE (REG_UDWORD)
+#define R_PAR0_CTRL_DATA__GET REG_GET_WO
+#define R_PAR0_CTRL_DATA__IGET REG_IGET_WO
+#define R_PAR0_CTRL_DATA__SET REG_SET_WO
+#define R_PAR0_CTRL_DATA__ISET REG_ISET_WO
+#define R_PAR0_CTRL_DATA__SET_VAL REG_SET_VAL_WO
+#define R_PAR0_CTRL_DATA__EQL REG_EQL_WO
+#define R_PAR0_CTRL_DATA__IEQL REG_IEQL_WO
+#define R_PAR0_CTRL_DATA__RD REG_RD_WO
+#define R_PAR0_CTRL_DATA__IRD REG_IRD_WO
+#define R_PAR0_CTRL_DATA__WR REG_WR_WO
+#define R_PAR0_CTRL_DATA__IWR REG_IWR_WO
+
+#define R_PAR0_CTRL_DATA__WRITE(addr,value) \
+ (*(addr) = (value))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_PAR0_CTRL_DATA__FIRST 0
+#define R_PAR0_CTRL_DATA__IOFFSET 12
+#define R_PAR0_CTRL_DATA__LAST 1
+#define R_PAR0_CTRL_DATA__OFFSET 16
+#define R_PAR0_CTRL_DATA__SOFFSET 12
+/* end */
+
+#define R_PAR0_CTRL_DATA__peri_int__peri_int__MASK 0x01000000U
+#define R_PAR0_CTRL_DATA__oe__oe__MASK 0x00100000U
+#define R_PAR0_CTRL_DATA__seli__seli__MASK 0x00080000U
+#define R_PAR0_CTRL_DATA__autofd__autofd__MASK 0x00040000U
+#define R_PAR0_CTRL_DATA__strb__strb__MASK 0x00020000U
+#define R_PAR0_CTRL_DATA__init__init__MASK 0x00010000U
+#define R_PAR0_CTRL_DATA__ecp_cmd__ecp_cmd__MASK 0x00000100U
+#define R_PAR0_CTRL_DATA__data__data__MASK 0x000000ffU
+
+#define R_PAR0_CTRL_DATA__peri_int__MAX 0x1
+#define R_PAR0_CTRL_DATA__oe__MAX 0x1
+#define R_PAR0_CTRL_DATA__seli__MAX 0x1
+#define R_PAR0_CTRL_DATA__autofd__MAX 0x1
+#define R_PAR0_CTRL_DATA__strb__MAX 0x1
+#define R_PAR0_CTRL_DATA__init__MAX 0x1
+#define R_PAR0_CTRL_DATA__ecp_cmd__MAX 0x1
+#define R_PAR0_CTRL_DATA__data__MAX 0xff
+
+#define R_PAR0_CTRL_DATA__peri_int__MIN 0
+#define R_PAR0_CTRL_DATA__oe__MIN 0
+#define R_PAR0_CTRL_DATA__seli__MIN 0
+#define R_PAR0_CTRL_DATA__autofd__MIN 0
+#define R_PAR0_CTRL_DATA__strb__MIN 0
+#define R_PAR0_CTRL_DATA__init__MIN 0
+#define R_PAR0_CTRL_DATA__ecp_cmd__MIN 0
+#define R_PAR0_CTRL_DATA__data__MIN 0
+
+#define R_PAR0_CTRL_DATA__peri_int__BITNR 24
+#define R_PAR0_CTRL_DATA__oe__BITNR 20
+#define R_PAR0_CTRL_DATA__seli__BITNR 19
+#define R_PAR0_CTRL_DATA__autofd__BITNR 18
+#define R_PAR0_CTRL_DATA__strb__BITNR 17
+#define R_PAR0_CTRL_DATA__init__BITNR 16
+#define R_PAR0_CTRL_DATA__ecp_cmd__BITNR 8
+#define R_PAR0_CTRL_DATA__data__BITNR 0
+
+#define R_PAR0_CTRL_DATA__peri_int__peri_int__VAL REG_VAL_ENUM
+#define R_PAR0_CTRL_DATA__oe__oe__VAL REG_VAL_ENUM
+#define R_PAR0_CTRL_DATA__seli__seli__VAL REG_VAL_ENUM
+#define R_PAR0_CTRL_DATA__autofd__autofd__VAL REG_VAL_ENUM
+#define R_PAR0_CTRL_DATA__strb__strb__VAL REG_VAL_ENUM
+#define R_PAR0_CTRL_DATA__init__init__VAL REG_VAL_ENUM
+#define R_PAR0_CTRL_DATA__ecp_cmd__ecp_cmd__VAL REG_VAL_ENUM
+#define R_PAR0_CTRL_DATA__data__data__VAL REG_VAL_VAL
+
+#define R_PAR0_CTRL_DATA__peri_int__peri_int__ack 1
+#define R_PAR0_CTRL_DATA__peri_int__peri_int__nop 0
+#define R_PAR0_CTRL_DATA__oe__oe__disable 0
+#define R_PAR0_CTRL_DATA__oe__oe__enable 1
+#define R_PAR0_CTRL_DATA__seli__seli__active 1
+#define R_PAR0_CTRL_DATA__seli__seli__inactive 0
+#define R_PAR0_CTRL_DATA__autofd__autofd__active 1
+#define R_PAR0_CTRL_DATA__autofd__autofd__inactive 0
+#define R_PAR0_CTRL_DATA__strb__strb__active 1
+#define R_PAR0_CTRL_DATA__strb__strb__inactive 0
+#define R_PAR0_CTRL_DATA__init__init__active 1
+#define R_PAR0_CTRL_DATA__init__init__inactive 0
+#define R_PAR0_CTRL_DATA__ecp_cmd__ecp_cmd__command 1
+#define R_PAR0_CTRL_DATA__ecp_cmd__ecp_cmd__data 0
+
+#endif
+
+/*
+ * R_PAR0_DELAY
+ * - type: WO
+ * - addr: 0xb0000048
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+#define R_PAR0_DELAY__ADDR (REG_TYPECAST_UDWORD 0xb0000048)
+
+#ifndef REG_NO_SHADOW
+#define R_PAR0_DELAY__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_PAR0_DELAY + 0))
+#define R_PAR0_DELAY__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_PAR0_DELAY + 0))
+#else /* REG_NO_SHADOW */
+#define R_PAR0_DELAY__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_PAR0_DELAY__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_PAR0_DELAY__STYPECAST REG_STYPECAST_UDWORD
+#define R_PAR0_DELAY__SVAL REG_SVAL_SHADOW
+#define R_PAR0_DELAY__SVAL_I REG_SVAL_I_SHADOW
+#define R_PAR0_DELAY__TYPECAST REG_TYPECAST_UDWORD
+#define R_PAR0_DELAY__TYPE (REG_UDWORD)
+#define R_PAR0_DELAY__GET REG_GET_WO
+#define R_PAR0_DELAY__IGET REG_IGET_WO
+#define R_PAR0_DELAY__SET REG_SET_WO
+#define R_PAR0_DELAY__ISET REG_ISET_WO
+#define R_PAR0_DELAY__SET_VAL REG_SET_VAL_WO
+#define R_PAR0_DELAY__EQL REG_EQL_WO
+#define R_PAR0_DELAY__IEQL REG_IEQL_WO
+#define R_PAR0_DELAY__RD REG_RD_WO
+#define R_PAR0_DELAY__IRD REG_IRD_WO
+#define R_PAR0_DELAY__WR REG_WR_WO
+#define R_PAR0_DELAY__IWR REG_IWR_WO
+
+#define R_PAR0_DELAY__WRITE(addr,value) \
+ (*(addr) = (value))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_PAR0_DELAY__FIRST 0
+#define R_PAR0_DELAY__IOFFSET 12
+#define R_PAR0_DELAY__LAST 1
+#define R_PAR0_DELAY__OFFSET 16
+#define R_PAR0_DELAY__SOFFSET 12
+/* end */
+
+#define R_PAR0_DELAY__fine_hold__fine_hold__MASK 0x00e00000U
+#define R_PAR0_DELAY__hold__hold__MASK 0x001f0000U
+#define R_PAR0_DELAY__fine_strb__fine_strb__MASK 0x0000e000U
+#define R_PAR0_DELAY__strobe__strobe__MASK 0x00001f00U
+#define R_PAR0_DELAY__fine_setup__fine_setup__MASK 0x000000e0U
+#define R_PAR0_DELAY__setup__setup__MASK 0x0000001fU
+
+#define R_PAR0_DELAY__fine_hold__MAX 0x7
+#define R_PAR0_DELAY__hold__MAX 0x1f
+#define R_PAR0_DELAY__fine_strb__MAX 0x7
+#define R_PAR0_DELAY__strobe__MAX 0x1f
+#define R_PAR0_DELAY__fine_setup__MAX 0x7
+#define R_PAR0_DELAY__setup__MAX 0x1f
+
+#define R_PAR0_DELAY__fine_hold__MIN 0
+#define R_PAR0_DELAY__hold__MIN 0
+#define R_PAR0_DELAY__fine_strb__MIN 0
+#define R_PAR0_DELAY__strobe__MIN 0
+#define R_PAR0_DELAY__fine_setup__MIN 0
+#define R_PAR0_DELAY__setup__MIN 0
+
+#define R_PAR0_DELAY__fine_hold__BITNR 21
+#define R_PAR0_DELAY__hold__BITNR 16
+#define R_PAR0_DELAY__fine_strb__BITNR 13
+#define R_PAR0_DELAY__strobe__BITNR 8
+#define R_PAR0_DELAY__fine_setup__BITNR 5
+#define R_PAR0_DELAY__setup__BITNR 0
+
+#define R_PAR0_DELAY__fine_hold__fine_hold__VAL REG_VAL_VAL
+#define R_PAR0_DELAY__hold__hold__VAL REG_VAL_VAL
+#define R_PAR0_DELAY__fine_strb__fine_strb__VAL REG_VAL_VAL
+#define R_PAR0_DELAY__strobe__strobe__VAL REG_VAL_VAL
+#define R_PAR0_DELAY__fine_setup__fine_setup__VAL REG_VAL_VAL
+#define R_PAR0_DELAY__setup__setup__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_PAR0_STATUS
+ * - type: RO
+ * - addr: 0xb0000042
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+#define R_PAR0_STATUS__ADDR (REG_TYPECAST_UWORD 0xb0000042)
+#define R_PAR0_STATUS__SVAL REG_SVAL_SHADOW
+#define R_PAR0_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_PAR0_STATUS__TYPECAST REG_TYPECAST_UWORD
+#define R_PAR0_STATUS__TYPE (REG_UWORD)
+#define R_PAR0_STATUS__GET REG_GET_RO
+#define R_PAR0_STATUS__IGET REG_IGET_RO
+#define R_PAR0_STATUS__SET REG_SET_RO
+#define R_PAR0_STATUS__ISET REG_ISET_RO
+#define R_PAR0_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_PAR0_STATUS__EQL REG_EQL_RO
+#define R_PAR0_STATUS__IEQL REG_IEQL_RO
+#define R_PAR0_STATUS__RD REG_RD_RO
+#define R_PAR0_STATUS__IRD REG_IRD_RO
+#define R_PAR0_STATUS__WR REG_WR_RO
+#define R_PAR0_STATUS__IWR REG_IWR_RO
+
+#define R_PAR0_STATUS__READ(addr) \
+ (*(addr))
+
+#define R_PAR0_STATUS__mode__mode__MASK 0x0000e000U
+#define R_PAR0_STATUS__perr__perr__MASK 0x00001000U
+#define R_PAR0_STATUS__ack__ack__MASK 0x00000800U
+#define R_PAR0_STATUS__busy__busy__MASK 0x00000400U
+#define R_PAR0_STATUS__fault__fault__MASK 0x00000200U
+#define R_PAR0_STATUS__sel__sel__MASK 0x00000100U
+#define R_PAR0_STATUS__ext_mode__ext_mode__MASK 0x00000080U
+#define R_PAR0_STATUS__ecp_16__ecp_16__MASK 0x00000040U
+#define R_PAR0_STATUS__tr_rdy__tr_rdy__MASK 0x00000002U
+#define R_PAR0_STATUS__dav__dav__MASK 0x00000001U
+
+#define R_PAR0_STATUS__mode__MAX 0x7
+#define R_PAR0_STATUS__perr__MAX 0x1
+#define R_PAR0_STATUS__ack__MAX 0x1
+#define R_PAR0_STATUS__busy__MAX 0x1
+#define R_PAR0_STATUS__fault__MAX 0x1
+#define R_PAR0_STATUS__sel__MAX 0x1
+#define R_PAR0_STATUS__ext_mode__MAX 0x1
+#define R_PAR0_STATUS__ecp_16__MAX 0x1
+#define R_PAR0_STATUS__tr_rdy__MAX 0x1
+#define R_PAR0_STATUS__dav__MAX 0x1
+
+#define R_PAR0_STATUS__mode__MIN 0
+#define R_PAR0_STATUS__perr__MIN 0
+#define R_PAR0_STATUS__ack__MIN 0
+#define R_PAR0_STATUS__busy__MIN 0
+#define R_PAR0_STATUS__fault__MIN 0
+#define R_PAR0_STATUS__sel__MIN 0
+#define R_PAR0_STATUS__ext_mode__MIN 0
+#define R_PAR0_STATUS__ecp_16__MIN 0
+#define R_PAR0_STATUS__tr_rdy__MIN 0
+#define R_PAR0_STATUS__dav__MIN 0
+
+#define R_PAR0_STATUS__mode__BITNR 13
+#define R_PAR0_STATUS__perr__BITNR 12
+#define R_PAR0_STATUS__ack__BITNR 11
+#define R_PAR0_STATUS__busy__BITNR 10
+#define R_PAR0_STATUS__fault__BITNR 9
+#define R_PAR0_STATUS__sel__BITNR 8
+#define R_PAR0_STATUS__ext_mode__BITNR 7
+#define R_PAR0_STATUS__ecp_16__BITNR 6
+#define R_PAR0_STATUS__tr_rdy__BITNR 1
+#define R_PAR0_STATUS__dav__BITNR 0
+
+#define R_PAR0_STATUS__mode__mode__VAL REG_VAL_ENUM
+#define R_PAR0_STATUS__perr__perr__VAL REG_VAL_ENUM
+#define R_PAR0_STATUS__ack__ack__VAL REG_VAL_ENUM
+#define R_PAR0_STATUS__busy__busy__VAL REG_VAL_ENUM
+#define R_PAR0_STATUS__fault__fault__VAL REG_VAL_ENUM
+#define R_PAR0_STATUS__sel__sel__VAL REG_VAL_ENUM
+#define R_PAR0_STATUS__ext_mode__ext_mode__VAL REG_VAL_ENUM
+#define R_PAR0_STATUS__ecp_16__ecp_16__VAL REG_VAL_ENUM
+#define R_PAR0_STATUS__tr_rdy__tr_rdy__VAL REG_VAL_ENUM
+#define R_PAR0_STATUS__dav__dav__VAL REG_VAL_ENUM
+
+#define R_PAR0_STATUS__mode__mode__byte 4
+#define R_PAR0_STATUS__mode__mode__centronics 1
+#define R_PAR0_STATUS__mode__mode__ecp_fwd 5
+#define R_PAR0_STATUS__mode__mode__ecp_rev 6
+#define R_PAR0_STATUS__mode__mode__epp_rd 0
+#define R_PAR0_STATUS__mode__mode__epp_wr1 5
+#define R_PAR0_STATUS__mode__mode__epp_wr2 6
+#define R_PAR0_STATUS__mode__mode__epp_wr3 7
+#define R_PAR0_STATUS__mode__mode__fastbyte 2
+#define R_PAR0_STATUS__mode__mode__manual 0
+#define R_PAR0_STATUS__mode__mode__nibble 3
+#define R_PAR0_STATUS__mode__mode__off 7
+#define R_PAR0_STATUS__perr__perr__active 1
+#define R_PAR0_STATUS__perr__perr__inactive 0
+#define R_PAR0_STATUS__ack__ack__active 0
+#define R_PAR0_STATUS__ack__ack__inactive 1
+#define R_PAR0_STATUS__busy__busy__active 1
+#define R_PAR0_STATUS__busy__busy__inactive 0
+#define R_PAR0_STATUS__fault__fault__active 0
+#define R_PAR0_STATUS__fault__fault__inactive 1
+#define R_PAR0_STATUS__sel__sel__active 1
+#define R_PAR0_STATUS__sel__sel__inactive 0
+#define R_PAR0_STATUS__ext_mode__ext_mode__disable 0
+#define R_PAR0_STATUS__ext_mode__ext_mode__enable 1
+#define R_PAR0_STATUS__ecp_16__ecp_16__active 1
+#define R_PAR0_STATUS__ecp_16__ecp_16__inactive 0
+#define R_PAR0_STATUS__tr_rdy__tr_rdy__busy 0
+#define R_PAR0_STATUS__tr_rdy__tr_rdy__ready 1
+#define R_PAR0_STATUS__dav__dav__data 1
+#define R_PAR0_STATUS__dav__dav__nodata 0
+
+#endif
+
+/*
+ * R_PAR0_STATUS_DATA
+ * - type: RO
+ * - addr: 0xb0000040
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+#define R_PAR0_STATUS_DATA__ADDR (REG_TYPECAST_UDWORD 0xb0000040)
+#define R_PAR0_STATUS_DATA__SVAL REG_SVAL_SHADOW
+#define R_PAR0_STATUS_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_PAR0_STATUS_DATA__TYPECAST REG_TYPECAST_UDWORD
+#define R_PAR0_STATUS_DATA__TYPE (REG_UDWORD)
+#define R_PAR0_STATUS_DATA__GET REG_GET_RO
+#define R_PAR0_STATUS_DATA__IGET REG_IGET_RO
+#define R_PAR0_STATUS_DATA__SET REG_SET_RO
+#define R_PAR0_STATUS_DATA__ISET REG_ISET_RO
+#define R_PAR0_STATUS_DATA__SET_VAL REG_SET_VAL_RO
+#define R_PAR0_STATUS_DATA__EQL REG_EQL_RO
+#define R_PAR0_STATUS_DATA__IEQL REG_IEQL_RO
+#define R_PAR0_STATUS_DATA__RD REG_RD_RO
+#define R_PAR0_STATUS_DATA__IRD REG_IRD_RO
+#define R_PAR0_STATUS_DATA__WR REG_WR_RO
+#define R_PAR0_STATUS_DATA__IWR REG_IWR_RO
+
+#define R_PAR0_STATUS_DATA__READ(addr) \
+ (*(addr))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_PAR0_STATUS_DATA__FIRST 0
+#define R_PAR0_STATUS_DATA__LAST 1
+#define R_PAR0_STATUS_DATA__OFFSET 16
+/* end */
+
+#define R_PAR0_STATUS_DATA__mode__mode__MASK 0xe0000000U
+#define R_PAR0_STATUS_DATA__perr__perr__MASK 0x10000000U
+#define R_PAR0_STATUS_DATA__ack__ack__MASK 0x08000000U
+#define R_PAR0_STATUS_DATA__busy__busy__MASK 0x04000000U
+#define R_PAR0_STATUS_DATA__fault__fault__MASK 0x02000000U
+#define R_PAR0_STATUS_DATA__sel__sel__MASK 0x01000000U
+#define R_PAR0_STATUS_DATA__ext_mode__ext_mode__MASK 0x00800000U
+#define R_PAR0_STATUS_DATA__ecp_16__ecp_16__MASK 0x00400000U
+#define R_PAR0_STATUS_DATA__tr_rdy__tr_rdy__MASK 0x00020000U
+#define R_PAR0_STATUS_DATA__dav__dav__MASK 0x00010000U
+#define R_PAR0_STATUS_DATA__ecp_cmd__ecp_cmd__MASK 0x00000100U
+#define R_PAR0_STATUS_DATA__data__data__MASK 0x000000ffU
+
+#define R_PAR0_STATUS_DATA__mode__MAX 0x7
+#define R_PAR0_STATUS_DATA__perr__MAX 0x1
+#define R_PAR0_STATUS_DATA__ack__MAX 0x1
+#define R_PAR0_STATUS_DATA__busy__MAX 0x1
+#define R_PAR0_STATUS_DATA__fault__MAX 0x1
+#define R_PAR0_STATUS_DATA__sel__MAX 0x1
+#define R_PAR0_STATUS_DATA__ext_mode__MAX 0x1
+#define R_PAR0_STATUS_DATA__ecp_16__MAX 0x1
+#define R_PAR0_STATUS_DATA__tr_rdy__MAX 0x1
+#define R_PAR0_STATUS_DATA__dav__MAX 0x1
+#define R_PAR0_STATUS_DATA__ecp_cmd__MAX 0x1
+#define R_PAR0_STATUS_DATA__data__MAX 0xff
+
+#define R_PAR0_STATUS_DATA__mode__MIN 0
+#define R_PAR0_STATUS_DATA__perr__MIN 0
+#define R_PAR0_STATUS_DATA__ack__MIN 0
+#define R_PAR0_STATUS_DATA__busy__MIN 0
+#define R_PAR0_STATUS_DATA__fault__MIN 0
+#define R_PAR0_STATUS_DATA__sel__MIN 0
+#define R_PAR0_STATUS_DATA__ext_mode__MIN 0
+#define R_PAR0_STATUS_DATA__ecp_16__MIN 0
+#define R_PAR0_STATUS_DATA__tr_rdy__MIN 0
+#define R_PAR0_STATUS_DATA__dav__MIN 0
+#define R_PAR0_STATUS_DATA__ecp_cmd__MIN 0
+#define R_PAR0_STATUS_DATA__data__MIN 0
+
+#define R_PAR0_STATUS_DATA__mode__BITNR 29
+#define R_PAR0_STATUS_DATA__perr__BITNR 28
+#define R_PAR0_STATUS_DATA__ack__BITNR 27
+#define R_PAR0_STATUS_DATA__busy__BITNR 26
+#define R_PAR0_STATUS_DATA__fault__BITNR 25
+#define R_PAR0_STATUS_DATA__sel__BITNR 24
+#define R_PAR0_STATUS_DATA__ext_mode__BITNR 23
+#define R_PAR0_STATUS_DATA__ecp_16__BITNR 22
+#define R_PAR0_STATUS_DATA__tr_rdy__BITNR 17
+#define R_PAR0_STATUS_DATA__dav__BITNR 16
+#define R_PAR0_STATUS_DATA__ecp_cmd__BITNR 8
+#define R_PAR0_STATUS_DATA__data__BITNR 0
+
+#define R_PAR0_STATUS_DATA__mode__mode__VAL REG_VAL_ENUM
+#define R_PAR0_STATUS_DATA__perr__perr__VAL REG_VAL_ENUM
+#define R_PAR0_STATUS_DATA__ack__ack__VAL REG_VAL_ENUM
+#define R_PAR0_STATUS_DATA__busy__busy__VAL REG_VAL_ENUM
+#define R_PAR0_STATUS_DATA__fault__fault__VAL REG_VAL_ENUM
+#define R_PAR0_STATUS_DATA__sel__sel__VAL REG_VAL_ENUM
+#define R_PAR0_STATUS_DATA__ext_mode__ext_mode__VAL REG_VAL_ENUM
+#define R_PAR0_STATUS_DATA__ecp_16__ecp_16__VAL REG_VAL_ENUM
+#define R_PAR0_STATUS_DATA__tr_rdy__tr_rdy__VAL REG_VAL_ENUM
+#define R_PAR0_STATUS_DATA__dav__dav__VAL REG_VAL_ENUM
+#define R_PAR0_STATUS_DATA__ecp_cmd__ecp_cmd__VAL REG_VAL_ENUM
+#define R_PAR0_STATUS_DATA__data__data__VAL REG_VAL_VAL
+
+#define R_PAR0_STATUS_DATA__mode__mode__byte 4
+#define R_PAR0_STATUS_DATA__mode__mode__centronics 1
+#define R_PAR0_STATUS_DATA__mode__mode__ecp_fwd 5
+#define R_PAR0_STATUS_DATA__mode__mode__ecp_rev 6
+#define R_PAR0_STATUS_DATA__mode__mode__epp_rd 0
+#define R_PAR0_STATUS_DATA__mode__mode__epp_wr1 5
+#define R_PAR0_STATUS_DATA__mode__mode__epp_wr2 6
+#define R_PAR0_STATUS_DATA__mode__mode__epp_wr3 7
+#define R_PAR0_STATUS_DATA__mode__mode__fastbyte 2
+#define R_PAR0_STATUS_DATA__mode__mode__manual 0
+#define R_PAR0_STATUS_DATA__mode__mode__nibble 3
+#define R_PAR0_STATUS_DATA__mode__mode__off 7
+#define R_PAR0_STATUS_DATA__perr__perr__active 1
+#define R_PAR0_STATUS_DATA__perr__perr__inactive 0
+#define R_PAR0_STATUS_DATA__ack__ack__active 0
+#define R_PAR0_STATUS_DATA__ack__ack__inactive 1
+#define R_PAR0_STATUS_DATA__busy__busy__active 1
+#define R_PAR0_STATUS_DATA__busy__busy__inactive 0
+#define R_PAR0_STATUS_DATA__fault__fault__active 0
+#define R_PAR0_STATUS_DATA__fault__fault__inactive 1
+#define R_PAR0_STATUS_DATA__sel__sel__active 1
+#define R_PAR0_STATUS_DATA__sel__sel__inactive 0
+#define R_PAR0_STATUS_DATA__ext_mode__ext_mode__disable 0
+#define R_PAR0_STATUS_DATA__ext_mode__ext_mode__enable 1
+#define R_PAR0_STATUS_DATA__ecp_16__ecp_16__active 1
+#define R_PAR0_STATUS_DATA__ecp_16__ecp_16__inactive 0
+#define R_PAR0_STATUS_DATA__tr_rdy__tr_rdy__busy 0
+#define R_PAR0_STATUS_DATA__tr_rdy__tr_rdy__ready 1
+#define R_PAR0_STATUS_DATA__dav__dav__data 1
+#define R_PAR0_STATUS_DATA__dav__dav__nodata 0
+#define R_PAR0_STATUS_DATA__ecp_cmd__ecp_cmd__command 1
+#define R_PAR0_STATUS_DATA__ecp_cmd__ecp_cmd__data 0
+
+#endif
+
+/*
+ * R_PAR1_CONFIG
+ * - type: WO
+ * - addr: 0xb0000054
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+#define R_PAR1_CONFIG__ADDR (REG_TYPECAST_UDWORD 0xb0000054)
+
+#ifndef REG_NO_SHADOW
+#define R_PAR1_CONFIG__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_PAR1_CONFIG + 0))
+#define R_PAR1_CONFIG__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_PAR1_CONFIG + 0))
+#else /* REG_NO_SHADOW */
+#define R_PAR1_CONFIG__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_PAR1_CONFIG__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_PAR1_CONFIG__STYPECAST REG_STYPECAST_UDWORD
+#define R_PAR1_CONFIG__SVAL REG_SVAL_SHADOW
+#define R_PAR1_CONFIG__SVAL_I REG_SVAL_I_SHADOW
+#define R_PAR1_CONFIG__TYPECAST REG_TYPECAST_UDWORD
+#define R_PAR1_CONFIG__TYPE (REG_UDWORD)
+#define R_PAR1_CONFIG__GET REG_GET_WO
+#define R_PAR1_CONFIG__IGET REG_IGET_WO
+#define R_PAR1_CONFIG__SET REG_SET_WO
+#define R_PAR1_CONFIG__ISET REG_ISET_WO
+#define R_PAR1_CONFIG__SET_VAL REG_SET_VAL_WO
+#define R_PAR1_CONFIG__EQL REG_EQL_WO
+#define R_PAR1_CONFIG__IEQL REG_IEQL_WO
+#define R_PAR1_CONFIG__RD REG_RD_WO
+#define R_PAR1_CONFIG__IRD REG_IRD_WO
+#define R_PAR1_CONFIG__WR REG_WR_WO
+#define R_PAR1_CONFIG__IWR REG_IWR_WO
+
+#define R_PAR1_CONFIG__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_PAR1_CONFIG__ioe__ioe__MASK 0x02000000U
+#define R_PAR1_CONFIG__iseli__iseli__MASK 0x01000000U
+#define R_PAR1_CONFIG__iautofd__iautofd__MASK 0x00800000U
+#define R_PAR1_CONFIG__istrb__istrb__MASK 0x00400000U
+#define R_PAR1_CONFIG__iinit__iinit__MASK 0x00200000U
+#define R_PAR1_CONFIG__iperr__iperr__MASK 0x00100000U
+#define R_PAR1_CONFIG__iack__iack__MASK 0x00080000U
+#define R_PAR1_CONFIG__ibusy__ibusy__MASK 0x00040000U
+#define R_PAR1_CONFIG__ifault__ifault__MASK 0x00020000U
+#define R_PAR1_CONFIG__isel__isel__MASK 0x00010000U
+#define R_PAR1_CONFIG__ext_mode__ext_mode__MASK 0x00000800U
+#define R_PAR1_CONFIG__dma__dma__MASK 0x00000200U
+#define R_PAR1_CONFIG__rle_in__rle_in__MASK 0x00000100U
+#define R_PAR1_CONFIG__rle_out__rle_out__MASK 0x00000080U
+#define R_PAR1_CONFIG__enable__enable__MASK 0x00000040U
+#define R_PAR1_CONFIG__force__force__MASK 0x00000020U
+#define R_PAR1_CONFIG__ign_ack__ign_ack__MASK 0x00000010U
+#define R_PAR1_CONFIG__oe_ack__oe_ack__MASK 0x00000008U
+#define R_PAR1_CONFIG__epp_addr_data__epp_addr_data__MASK 0x00000008U
+#define R_PAR1_CONFIG__oe_ack__epp_addr_data__MASK 0x00000008U
+#define R_PAR1_CONFIG__mode__mode__MASK 0x00000007U
+
+#define R_PAR1_CONFIG__ioe__MAX 0x1
+#define R_PAR1_CONFIG__iseli__MAX 0x1
+#define R_PAR1_CONFIG__iautofd__MAX 0x1
+#define R_PAR1_CONFIG__istrb__MAX 0x1
+#define R_PAR1_CONFIG__iinit__MAX 0x1
+#define R_PAR1_CONFIG__iperr__MAX 0x1
+#define R_PAR1_CONFIG__iack__MAX 0x1
+#define R_PAR1_CONFIG__ibusy__MAX 0x1
+#define R_PAR1_CONFIG__ifault__MAX 0x1
+#define R_PAR1_CONFIG__isel__MAX 0x1
+#define R_PAR1_CONFIG__ext_mode__MAX 0x1
+#define R_PAR1_CONFIG__dma__MAX 0x1
+#define R_PAR1_CONFIG__rle_in__MAX 0x1
+#define R_PAR1_CONFIG__rle_out__MAX 0x1
+#define R_PAR1_CONFIG__enable__MAX 0x1
+#define R_PAR1_CONFIG__force__MAX 0x1
+#define R_PAR1_CONFIG__ign_ack__MAX 0x1
+#define R_PAR1_CONFIG__oe_ack__MAX 0x1
+#define R_PAR1_CONFIG__epp_addr_data__MAX 0x1
+#define R_PAR1_CONFIG__mode__MAX 0x7
+
+#define R_PAR1_CONFIG__ioe__MIN 0
+#define R_PAR1_CONFIG__iseli__MIN 0
+#define R_PAR1_CONFIG__iautofd__MIN 0
+#define R_PAR1_CONFIG__istrb__MIN 0
+#define R_PAR1_CONFIG__iinit__MIN 0
+#define R_PAR1_CONFIG__iperr__MIN 0
+#define R_PAR1_CONFIG__iack__MIN 0
+#define R_PAR1_CONFIG__ibusy__MIN 0
+#define R_PAR1_CONFIG__ifault__MIN 0
+#define R_PAR1_CONFIG__isel__MIN 0
+#define R_PAR1_CONFIG__ext_mode__MIN 0
+#define R_PAR1_CONFIG__dma__MIN 0
+#define R_PAR1_CONFIG__rle_in__MIN 0
+#define R_PAR1_CONFIG__rle_out__MIN 0
+#define R_PAR1_CONFIG__enable__MIN 0
+#define R_PAR1_CONFIG__force__MIN 0
+#define R_PAR1_CONFIG__ign_ack__MIN 0
+#define R_PAR1_CONFIG__oe_ack__MIN 0
+#define R_PAR1_CONFIG__epp_addr_data__MIN 0
+#define R_PAR1_CONFIG__mode__MIN 0
+
+#define R_PAR1_CONFIG__ioe__BITNR 25
+#define R_PAR1_CONFIG__iseli__BITNR 24
+#define R_PAR1_CONFIG__iautofd__BITNR 23
+#define R_PAR1_CONFIG__istrb__BITNR 22
+#define R_PAR1_CONFIG__iinit__BITNR 21
+#define R_PAR1_CONFIG__iperr__BITNR 20
+#define R_PAR1_CONFIG__iack__BITNR 19
+#define R_PAR1_CONFIG__ibusy__BITNR 18
+#define R_PAR1_CONFIG__ifault__BITNR 17
+#define R_PAR1_CONFIG__isel__BITNR 16
+#define R_PAR1_CONFIG__ext_mode__BITNR 11
+#define R_PAR1_CONFIG__dma__BITNR 9
+#define R_PAR1_CONFIG__rle_in__BITNR 8
+#define R_PAR1_CONFIG__rle_out__BITNR 7
+#define R_PAR1_CONFIG__enable__BITNR 6
+#define R_PAR1_CONFIG__force__BITNR 5
+#define R_PAR1_CONFIG__ign_ack__BITNR 4
+#define R_PAR1_CONFIG__oe_ack__BITNR 3
+#define R_PAR1_CONFIG__epp_addr_data__BITNR 3
+#define R_PAR1_CONFIG__mode__BITNR 0
+
+#define R_PAR1_CONFIG__ioe__ioe__VAL REG_VAL_ENUM
+#define R_PAR1_CONFIG__iseli__iseli__VAL REG_VAL_ENUM
+#define R_PAR1_CONFIG__iautofd__iautofd__VAL REG_VAL_ENUM
+#define R_PAR1_CONFIG__istrb__istrb__VAL REG_VAL_ENUM
+#define R_PAR1_CONFIG__iinit__iinit__VAL REG_VAL_ENUM
+#define R_PAR1_CONFIG__iperr__iperr__VAL REG_VAL_ENUM
+#define R_PAR1_CONFIG__iack__iack__VAL REG_VAL_ENUM
+#define R_PAR1_CONFIG__ibusy__ibusy__VAL REG_VAL_ENUM
+#define R_PAR1_CONFIG__ifault__ifault__VAL REG_VAL_ENUM
+#define R_PAR1_CONFIG__isel__isel__VAL REG_VAL_ENUM
+#define R_PAR1_CONFIG__ext_mode__ext_mode__VAL REG_VAL_ENUM
+#define R_PAR1_CONFIG__dma__dma__VAL REG_VAL_ENUM
+#define R_PAR1_CONFIG__rle_in__rle_in__VAL REG_VAL_ENUM
+#define R_PAR1_CONFIG__rle_out__rle_out__VAL REG_VAL_ENUM
+#define R_PAR1_CONFIG__enable__enable__VAL REG_VAL_ENUM
+#define R_PAR1_CONFIG__force__force__VAL REG_VAL_ENUM
+#define R_PAR1_CONFIG__ign_ack__ign_ack__VAL REG_VAL_ENUM
+#define R_PAR1_CONFIG__oe_ack__oe_ack__VAL REG_VAL_ENUM
+#define R_PAR1_CONFIG__epp_addr_data__epp_addr_data__VAL REG_VAL_ENUM
+#define R_PAR1_CONFIG__oe_ack__epp_addr_data__VAL REG_VAL_ENUM
+#define R_PAR1_CONFIG__mode__mode__VAL REG_VAL_ENUM
+
+#define R_PAR1_CONFIG__ioe__ioe__inv 1
+#define R_PAR1_CONFIG__ioe__ioe__noninv 0
+#define R_PAR1_CONFIG__iseli__iseli__inv 1
+#define R_PAR1_CONFIG__iseli__iseli__noninv 0
+#define R_PAR1_CONFIG__iautofd__iautofd__inv 1
+#define R_PAR1_CONFIG__iautofd__iautofd__noninv 0
+#define R_PAR1_CONFIG__istrb__istrb__inv 1
+#define R_PAR1_CONFIG__istrb__istrb__noninv 0
+#define R_PAR1_CONFIG__iinit__iinit__inv 1
+#define R_PAR1_CONFIG__iinit__iinit__noninv 0
+#define R_PAR1_CONFIG__iperr__iperr__inv 1
+#define R_PAR1_CONFIG__iperr__iperr__noninv 0
+#define R_PAR1_CONFIG__iack__iack__inv 1
+#define R_PAR1_CONFIG__iack__iack__noninv 0
+#define R_PAR1_CONFIG__ibusy__ibusy__inv 1
+#define R_PAR1_CONFIG__ibusy__ibusy__noninv 0
+#define R_PAR1_CONFIG__ifault__ifault__inv 1
+#define R_PAR1_CONFIG__ifault__ifault__noninv 0
+#define R_PAR1_CONFIG__isel__isel__inv 1
+#define R_PAR1_CONFIG__isel__isel__noninv 0
+#define R_PAR1_CONFIG__ext_mode__ext_mode__disable 0
+#define R_PAR1_CONFIG__ext_mode__ext_mode__enable 1
+#define R_PAR1_CONFIG__dma__dma__disable 0
+#define R_PAR1_CONFIG__dma__dma__enable 1
+#define R_PAR1_CONFIG__rle_in__rle_in__disable 0
+#define R_PAR1_CONFIG__rle_in__rle_in__enable 1
+#define R_PAR1_CONFIG__rle_out__rle_out__disable 0
+#define R_PAR1_CONFIG__rle_out__rle_out__enable 1
+#define R_PAR1_CONFIG__enable__enable__on 1
+#define R_PAR1_CONFIG__enable__enable__reset 0
+#define R_PAR1_CONFIG__force__force__off 0
+#define R_PAR1_CONFIG__force__force__on 1
+#define R_PAR1_CONFIG__ign_ack__ign_ack__ignore 1
+#define R_PAR1_CONFIG__ign_ack__ign_ack__wait 0
+#define R_PAR1_CONFIG__oe_ack__oe_ack__dont_wait 0
+#define R_PAR1_CONFIG__oe_ack__oe_ack__epp_addr 1
+#define R_PAR1_CONFIG__oe_ack__oe_ack__epp_data 0
+#define R_PAR1_CONFIG__oe_ack__oe_ack__wait_oe 1
+#define R_PAR1_CONFIG__epp_addr_data__epp_addr_data__dont_wait 0
+#define R_PAR1_CONFIG__epp_addr_data__epp_addr_data__epp_addr 1
+#define R_PAR1_CONFIG__epp_addr_data__epp_addr_data__epp_data 0
+#define R_PAR1_CONFIG__epp_addr_data__epp_addr_data__wait_oe 1
+#define R_PAR1_CONFIG__mode__mode__byte 4
+#define R_PAR1_CONFIG__mode__mode__centronics 1
+#define R_PAR1_CONFIG__mode__mode__ecp_fwd 5
+#define R_PAR1_CONFIG__mode__mode__ecp_rev 6
+#define R_PAR1_CONFIG__mode__mode__epp_rd 0
+#define R_PAR1_CONFIG__mode__mode__epp_wr1 5
+#define R_PAR1_CONFIG__mode__mode__epp_wr2 6
+#define R_PAR1_CONFIG__mode__mode__epp_wr3 7
+#define R_PAR1_CONFIG__mode__mode__fastbyte 2
+#define R_PAR1_CONFIG__mode__mode__manual 0
+#define R_PAR1_CONFIG__mode__mode__nibble 3
+#define R_PAR1_CONFIG__mode__mode__off 7
+
+#endif
+
+/*
+ * R_PAR1_CTRL
+ * - type: WO
+ * - addr: 0xb0000052
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+#define R_PAR1_CTRL__ADDR (REG_TYPECAST_BYTE 0xb0000052)
+
+#ifndef REG_NO_SHADOW
+#define R_PAR1_CTRL__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_PAR1_CTRL_DATA + 2))
+#define R_PAR1_CTRL__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_PAR1_CTRL_DATA + 2))
+#else /* REG_NO_SHADOW */
+#define R_PAR1_CTRL__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_PAR1_CTRL__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_PAR1_CTRL__STYPECAST REG_STYPECAST_BYTE
+#define R_PAR1_CTRL__SVAL REG_SVAL_SHADOW
+#define R_PAR1_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_PAR1_CTRL__TYPECAST REG_TYPECAST_BYTE
+#define R_PAR1_CTRL__TYPE (REG_BYTE)
+#define R_PAR1_CTRL__GET REG_GET_WO
+#define R_PAR1_CTRL__IGET REG_IGET_WO
+#define R_PAR1_CTRL__SET REG_SET_WO
+#define R_PAR1_CTRL__ISET REG_ISET_WO
+#define R_PAR1_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_PAR1_CTRL__EQL REG_EQL_WO
+#define R_PAR1_CTRL__IEQL REG_IEQL_WO
+#define R_PAR1_CTRL__RD REG_RD_WO
+#define R_PAR1_CTRL__IRD REG_IRD_WO
+#define R_PAR1_CTRL__WR REG_WR_WO
+#define R_PAR1_CTRL__IWR REG_IWR_WO
+
+#define R_PAR1_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_PAR1_CTRL__ctrl__ctrl__MASK 0x0000001fU
+
+#define R_PAR1_CTRL__ctrl__MAX 31
+
+#define R_PAR1_CTRL__ctrl__MIN 0
+
+#define R_PAR1_CTRL__ctrl__BITNR 0
+
+#define R_PAR1_CTRL__ctrl__ctrl__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_PAR1_CTRL_DATA
+ * - type: WO
+ * - addr: 0xb0000050
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+#define R_PAR1_CTRL_DATA__ADDR (REG_TYPECAST_UDWORD 0xb0000050)
+
+#ifndef REG_NO_SHADOW
+#define R_PAR1_CTRL_DATA__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_PAR1_CTRL_DATA + 0))
+#define R_PAR1_CTRL_DATA__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_PAR1_CTRL_DATA + 0))
+#else /* REG_NO_SHADOW */
+#define R_PAR1_CTRL_DATA__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_PAR1_CTRL_DATA__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_PAR1_CTRL_DATA__STYPECAST REG_STYPECAST_UDWORD
+#define R_PAR1_CTRL_DATA__SVAL REG_SVAL_SHADOW
+#define R_PAR1_CTRL_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_PAR1_CTRL_DATA__TYPECAST REG_TYPECAST_UDWORD
+#define R_PAR1_CTRL_DATA__TYPE (REG_UDWORD)
+#define R_PAR1_CTRL_DATA__GET REG_GET_WO
+#define R_PAR1_CTRL_DATA__IGET REG_IGET_WO
+#define R_PAR1_CTRL_DATA__SET REG_SET_WO
+#define R_PAR1_CTRL_DATA__ISET REG_ISET_WO
+#define R_PAR1_CTRL_DATA__SET_VAL REG_SET_VAL_WO
+#define R_PAR1_CTRL_DATA__EQL REG_EQL_WO
+#define R_PAR1_CTRL_DATA__IEQL REG_IEQL_WO
+#define R_PAR1_CTRL_DATA__RD REG_RD_WO
+#define R_PAR1_CTRL_DATA__IRD REG_IRD_WO
+#define R_PAR1_CTRL_DATA__WR REG_WR_WO
+#define R_PAR1_CTRL_DATA__IWR REG_IWR_WO
+
+#define R_PAR1_CTRL_DATA__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_PAR1_CTRL_DATA__peri_int__peri_int__MASK 0x01000000U
+#define R_PAR1_CTRL_DATA__oe__oe__MASK 0x00100000U
+#define R_PAR1_CTRL_DATA__seli__seli__MASK 0x00080000U
+#define R_PAR1_CTRL_DATA__autofd__autofd__MASK 0x00040000U
+#define R_PAR1_CTRL_DATA__strb__strb__MASK 0x00020000U
+#define R_PAR1_CTRL_DATA__init__init__MASK 0x00010000U
+#define R_PAR1_CTRL_DATA__ecp_cmd__ecp_cmd__MASK 0x00000100U
+#define R_PAR1_CTRL_DATA__data__data__MASK 0x000000ffU
+
+#define R_PAR1_CTRL_DATA__peri_int__MAX 0x1
+#define R_PAR1_CTRL_DATA__oe__MAX 0x1
+#define R_PAR1_CTRL_DATA__seli__MAX 0x1
+#define R_PAR1_CTRL_DATA__autofd__MAX 0x1
+#define R_PAR1_CTRL_DATA__strb__MAX 0x1
+#define R_PAR1_CTRL_DATA__init__MAX 0x1
+#define R_PAR1_CTRL_DATA__ecp_cmd__MAX 0x1
+#define R_PAR1_CTRL_DATA__data__MAX 0xff
+
+#define R_PAR1_CTRL_DATA__peri_int__MIN 0
+#define R_PAR1_CTRL_DATA__oe__MIN 0
+#define R_PAR1_CTRL_DATA__seli__MIN 0
+#define R_PAR1_CTRL_DATA__autofd__MIN 0
+#define R_PAR1_CTRL_DATA__strb__MIN 0
+#define R_PAR1_CTRL_DATA__init__MIN 0
+#define R_PAR1_CTRL_DATA__ecp_cmd__MIN 0
+#define R_PAR1_CTRL_DATA__data__MIN 0
+
+#define R_PAR1_CTRL_DATA__peri_int__BITNR 24
+#define R_PAR1_CTRL_DATA__oe__BITNR 20
+#define R_PAR1_CTRL_DATA__seli__BITNR 19
+#define R_PAR1_CTRL_DATA__autofd__BITNR 18
+#define R_PAR1_CTRL_DATA__strb__BITNR 17
+#define R_PAR1_CTRL_DATA__init__BITNR 16
+#define R_PAR1_CTRL_DATA__ecp_cmd__BITNR 8
+#define R_PAR1_CTRL_DATA__data__BITNR 0
+
+#define R_PAR1_CTRL_DATA__peri_int__peri_int__VAL REG_VAL_ENUM
+#define R_PAR1_CTRL_DATA__oe__oe__VAL REG_VAL_ENUM
+#define R_PAR1_CTRL_DATA__seli__seli__VAL REG_VAL_ENUM
+#define R_PAR1_CTRL_DATA__autofd__autofd__VAL REG_VAL_ENUM
+#define R_PAR1_CTRL_DATA__strb__strb__VAL REG_VAL_ENUM
+#define R_PAR1_CTRL_DATA__init__init__VAL REG_VAL_ENUM
+#define R_PAR1_CTRL_DATA__ecp_cmd__ecp_cmd__VAL REG_VAL_ENUM
+#define R_PAR1_CTRL_DATA__data__data__VAL REG_VAL_VAL
+
+#define R_PAR1_CTRL_DATA__peri_int__peri_int__ack 1
+#define R_PAR1_CTRL_DATA__peri_int__peri_int__nop 0
+#define R_PAR1_CTRL_DATA__oe__oe__disable 0
+#define R_PAR1_CTRL_DATA__oe__oe__enable 1
+#define R_PAR1_CTRL_DATA__seli__seli__active 1
+#define R_PAR1_CTRL_DATA__seli__seli__inactive 0
+#define R_PAR1_CTRL_DATA__autofd__autofd__active 1
+#define R_PAR1_CTRL_DATA__autofd__autofd__inactive 0
+#define R_PAR1_CTRL_DATA__strb__strb__active 1
+#define R_PAR1_CTRL_DATA__strb__strb__inactive 0
+#define R_PAR1_CTRL_DATA__init__init__active 1
+#define R_PAR1_CTRL_DATA__init__init__inactive 0
+#define R_PAR1_CTRL_DATA__ecp_cmd__ecp_cmd__command 1
+#define R_PAR1_CTRL_DATA__ecp_cmd__ecp_cmd__data 0
+
+#endif
+
+/*
+ * R_PAR1_DELAY
+ * - type: WO
+ * - addr: 0xb0000058
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+#define R_PAR1_DELAY__ADDR (REG_TYPECAST_UDWORD 0xb0000058)
+
+#ifndef REG_NO_SHADOW
+#define R_PAR1_DELAY__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_PAR1_DELAY + 0))
+#define R_PAR1_DELAY__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_PAR1_DELAY + 0))
+#else /* REG_NO_SHADOW */
+#define R_PAR1_DELAY__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_PAR1_DELAY__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_PAR1_DELAY__STYPECAST REG_STYPECAST_UDWORD
+#define R_PAR1_DELAY__SVAL REG_SVAL_SHADOW
+#define R_PAR1_DELAY__SVAL_I REG_SVAL_I_SHADOW
+#define R_PAR1_DELAY__TYPECAST REG_TYPECAST_UDWORD
+#define R_PAR1_DELAY__TYPE (REG_UDWORD)
+#define R_PAR1_DELAY__GET REG_GET_WO
+#define R_PAR1_DELAY__IGET REG_IGET_WO
+#define R_PAR1_DELAY__SET REG_SET_WO
+#define R_PAR1_DELAY__ISET REG_ISET_WO
+#define R_PAR1_DELAY__SET_VAL REG_SET_VAL_WO
+#define R_PAR1_DELAY__EQL REG_EQL_WO
+#define R_PAR1_DELAY__IEQL REG_IEQL_WO
+#define R_PAR1_DELAY__RD REG_RD_WO
+#define R_PAR1_DELAY__IRD REG_IRD_WO
+#define R_PAR1_DELAY__WR REG_WR_WO
+#define R_PAR1_DELAY__IWR REG_IWR_WO
+
+#define R_PAR1_DELAY__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_PAR1_DELAY__fine_hold__fine_hold__MASK 0x00e00000U
+#define R_PAR1_DELAY__hold__hold__MASK 0x001f0000U
+#define R_PAR1_DELAY__fine_strb__fine_strb__MASK 0x0000e000U
+#define R_PAR1_DELAY__strobe__strobe__MASK 0x00001f00U
+#define R_PAR1_DELAY__fine_setup__fine_setup__MASK 0x000000e0U
+#define R_PAR1_DELAY__setup__setup__MASK 0x0000001fU
+
+#define R_PAR1_DELAY__fine_hold__MAX 0x7
+#define R_PAR1_DELAY__hold__MAX 0x1f
+#define R_PAR1_DELAY__fine_strb__MAX 0x7
+#define R_PAR1_DELAY__strobe__MAX 0x1f
+#define R_PAR1_DELAY__fine_setup__MAX 0x7
+#define R_PAR1_DELAY__setup__MAX 0x1f
+
+#define R_PAR1_DELAY__fine_hold__MIN 0
+#define R_PAR1_DELAY__hold__MIN 0
+#define R_PAR1_DELAY__fine_strb__MIN 0
+#define R_PAR1_DELAY__strobe__MIN 0
+#define R_PAR1_DELAY__fine_setup__MIN 0
+#define R_PAR1_DELAY__setup__MIN 0
+
+#define R_PAR1_DELAY__fine_hold__BITNR 21
+#define R_PAR1_DELAY__hold__BITNR 16
+#define R_PAR1_DELAY__fine_strb__BITNR 13
+#define R_PAR1_DELAY__strobe__BITNR 8
+#define R_PAR1_DELAY__fine_setup__BITNR 5
+#define R_PAR1_DELAY__setup__BITNR 0
+
+#define R_PAR1_DELAY__fine_hold__fine_hold__VAL REG_VAL_VAL
+#define R_PAR1_DELAY__hold__hold__VAL REG_VAL_VAL
+#define R_PAR1_DELAY__fine_strb__fine_strb__VAL REG_VAL_VAL
+#define R_PAR1_DELAY__strobe__strobe__VAL REG_VAL_VAL
+#define R_PAR1_DELAY__fine_setup__fine_setup__VAL REG_VAL_VAL
+#define R_PAR1_DELAY__setup__setup__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_PAR1_STATUS
+ * - type: RO
+ * - addr: 0xb0000052
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+#define R_PAR1_STATUS__ADDR (REG_TYPECAST_UWORD 0xb0000052)
+#define R_PAR1_STATUS__SVAL REG_SVAL_SHADOW
+#define R_PAR1_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_PAR1_STATUS__TYPECAST REG_TYPECAST_UWORD
+#define R_PAR1_STATUS__TYPE (REG_UWORD)
+#define R_PAR1_STATUS__GET REG_GET_RO
+#define R_PAR1_STATUS__IGET REG_IGET_RO
+#define R_PAR1_STATUS__SET REG_SET_RO
+#define R_PAR1_STATUS__ISET REG_ISET_RO
+#define R_PAR1_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_PAR1_STATUS__EQL REG_EQL_RO
+#define R_PAR1_STATUS__IEQL REG_IEQL_RO
+#define R_PAR1_STATUS__RD REG_RD_RO
+#define R_PAR1_STATUS__IRD REG_IRD_RO
+#define R_PAR1_STATUS__WR REG_WR_RO
+#define R_PAR1_STATUS__IWR REG_IWR_RO
+
+#define R_PAR1_STATUS__READ(addr) \
+ (*(addr))
+
+#define R_PAR1_STATUS__mode__mode__MASK 0x0000e000U
+#define R_PAR1_STATUS__perr__perr__MASK 0x00001000U
+#define R_PAR1_STATUS__ack__ack__MASK 0x00000800U
+#define R_PAR1_STATUS__busy__busy__MASK 0x00000400U
+#define R_PAR1_STATUS__fault__fault__MASK 0x00000200U
+#define R_PAR1_STATUS__sel__sel__MASK 0x00000100U
+#define R_PAR1_STATUS__ext_mode__ext_mode__MASK 0x00000080U
+#define R_PAR1_STATUS__tr_rdy__tr_rdy__MASK 0x00000002U
+#define R_PAR1_STATUS__dav__dav__MASK 0x00000001U
+
+#define R_PAR1_STATUS__mode__MAX 0x7
+#define R_PAR1_STATUS__perr__MAX 0x1
+#define R_PAR1_STATUS__ack__MAX 0x1
+#define R_PAR1_STATUS__busy__MAX 0x1
+#define R_PAR1_STATUS__fault__MAX 0x1
+#define R_PAR1_STATUS__sel__MAX 0x1
+#define R_PAR1_STATUS__ext_mode__MAX 0x1
+#define R_PAR1_STATUS__tr_rdy__MAX 0x1
+#define R_PAR1_STATUS__dav__MAX 0x1
+
+#define R_PAR1_STATUS__mode__MIN 0
+#define R_PAR1_STATUS__perr__MIN 0
+#define R_PAR1_STATUS__ack__MIN 0
+#define R_PAR1_STATUS__busy__MIN 0
+#define R_PAR1_STATUS__fault__MIN 0
+#define R_PAR1_STATUS__sel__MIN 0
+#define R_PAR1_STATUS__ext_mode__MIN 0
+#define R_PAR1_STATUS__tr_rdy__MIN 0
+#define R_PAR1_STATUS__dav__MIN 0
+
+#define R_PAR1_STATUS__mode__BITNR 13
+#define R_PAR1_STATUS__perr__BITNR 12
+#define R_PAR1_STATUS__ack__BITNR 11
+#define R_PAR1_STATUS__busy__BITNR 10
+#define R_PAR1_STATUS__fault__BITNR 9
+#define R_PAR1_STATUS__sel__BITNR 8
+#define R_PAR1_STATUS__ext_mode__BITNR 7
+#define R_PAR1_STATUS__tr_rdy__BITNR 1
+#define R_PAR1_STATUS__dav__BITNR 0
+
+#define R_PAR1_STATUS__mode__mode__VAL REG_VAL_ENUM
+#define R_PAR1_STATUS__perr__perr__VAL REG_VAL_ENUM
+#define R_PAR1_STATUS__ack__ack__VAL REG_VAL_ENUM
+#define R_PAR1_STATUS__busy__busy__VAL REG_VAL_ENUM
+#define R_PAR1_STATUS__fault__fault__VAL REG_VAL_ENUM
+#define R_PAR1_STATUS__sel__sel__VAL REG_VAL_ENUM
+#define R_PAR1_STATUS__ext_mode__ext_mode__VAL REG_VAL_ENUM
+#define R_PAR1_STATUS__tr_rdy__tr_rdy__VAL REG_VAL_ENUM
+#define R_PAR1_STATUS__dav__dav__VAL REG_VAL_ENUM
+
+#define R_PAR1_STATUS__mode__mode__byte 4
+#define R_PAR1_STATUS__mode__mode__centronics 1
+#define R_PAR1_STATUS__mode__mode__ecp_fwd 5
+#define R_PAR1_STATUS__mode__mode__ecp_rev 6
+#define R_PAR1_STATUS__mode__mode__epp_rd 0
+#define R_PAR1_STATUS__mode__mode__epp_wr1 5
+#define R_PAR1_STATUS__mode__mode__epp_wr2 6
+#define R_PAR1_STATUS__mode__mode__epp_wr3 7
+#define R_PAR1_STATUS__mode__mode__fastbyte 2
+#define R_PAR1_STATUS__mode__mode__manual 0
+#define R_PAR1_STATUS__mode__mode__nibble 3
+#define R_PAR1_STATUS__mode__mode__off 7
+#define R_PAR1_STATUS__perr__perr__active 1
+#define R_PAR1_STATUS__perr__perr__inactive 0
+#define R_PAR1_STATUS__ack__ack__active 0
+#define R_PAR1_STATUS__ack__ack__inactive 1
+#define R_PAR1_STATUS__busy__busy__active 1
+#define R_PAR1_STATUS__busy__busy__inactive 0
+#define R_PAR1_STATUS__fault__fault__active 0
+#define R_PAR1_STATUS__fault__fault__inactive 1
+#define R_PAR1_STATUS__sel__sel__active 1
+#define R_PAR1_STATUS__sel__sel__inactive 0
+#define R_PAR1_STATUS__ext_mode__ext_mode__disable 0
+#define R_PAR1_STATUS__ext_mode__ext_mode__enable 1
+#define R_PAR1_STATUS__tr_rdy__tr_rdy__busy 0
+#define R_PAR1_STATUS__tr_rdy__tr_rdy__ready 1
+#define R_PAR1_STATUS__dav__dav__data 1
+#define R_PAR1_STATUS__dav__dav__nodata 0
+
+#endif
+
+/*
+ * R_PAR1_STATUS_DATA
+ * - type: RO
+ * - addr: 0xb0000050
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+#define R_PAR1_STATUS_DATA__ADDR (REG_TYPECAST_UDWORD 0xb0000050)
+#define R_PAR1_STATUS_DATA__SVAL REG_SVAL_SHADOW
+#define R_PAR1_STATUS_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_PAR1_STATUS_DATA__TYPECAST REG_TYPECAST_UDWORD
+#define R_PAR1_STATUS_DATA__TYPE (REG_UDWORD)
+#define R_PAR1_STATUS_DATA__GET REG_GET_RO
+#define R_PAR1_STATUS_DATA__IGET REG_IGET_RO
+#define R_PAR1_STATUS_DATA__SET REG_SET_RO
+#define R_PAR1_STATUS_DATA__ISET REG_ISET_RO
+#define R_PAR1_STATUS_DATA__SET_VAL REG_SET_VAL_RO
+#define R_PAR1_STATUS_DATA__EQL REG_EQL_RO
+#define R_PAR1_STATUS_DATA__IEQL REG_IEQL_RO
+#define R_PAR1_STATUS_DATA__RD REG_RD_RO
+#define R_PAR1_STATUS_DATA__IRD REG_IRD_RO
+#define R_PAR1_STATUS_DATA__WR REG_WR_RO
+#define R_PAR1_STATUS_DATA__IWR REG_IWR_RO
+
+#define R_PAR1_STATUS_DATA__READ(addr) \
+ (*(addr))
+
+#define R_PAR1_STATUS_DATA__mode__mode__MASK 0xe0000000U
+#define R_PAR1_STATUS_DATA__perr__perr__MASK 0x10000000U
+#define R_PAR1_STATUS_DATA__ack__ack__MASK 0x08000000U
+#define R_PAR1_STATUS_DATA__busy__busy__MASK 0x04000000U
+#define R_PAR1_STATUS_DATA__fault__fault__MASK 0x02000000U
+#define R_PAR1_STATUS_DATA__sel__sel__MASK 0x01000000U
+#define R_PAR1_STATUS_DATA__ext_mode__ext_mode__MASK 0x00800000U
+#define R_PAR1_STATUS_DATA__tr_rdy__tr_rdy__MASK 0x00020000U
+#define R_PAR1_STATUS_DATA__dav__dav__MASK 0x00010000U
+#define R_PAR1_STATUS_DATA__ecp_cmd__ecp_cmd__MASK 0x00000100U
+#define R_PAR1_STATUS_DATA__data__data__MASK 0x000000ffU
+
+#define R_PAR1_STATUS_DATA__mode__MAX 0x7
+#define R_PAR1_STATUS_DATA__perr__MAX 0x1
+#define R_PAR1_STATUS_DATA__ack__MAX 0x1
+#define R_PAR1_STATUS_DATA__busy__MAX 0x1
+#define R_PAR1_STATUS_DATA__fault__MAX 0x1
+#define R_PAR1_STATUS_DATA__sel__MAX 0x1
+#define R_PAR1_STATUS_DATA__ext_mode__MAX 0x1
+#define R_PAR1_STATUS_DATA__tr_rdy__MAX 0x1
+#define R_PAR1_STATUS_DATA__dav__MAX 0x1
+#define R_PAR1_STATUS_DATA__ecp_cmd__MAX 0x1
+#define R_PAR1_STATUS_DATA__data__MAX 0xff
+
+#define R_PAR1_STATUS_DATA__mode__MIN 0
+#define R_PAR1_STATUS_DATA__perr__MIN 0
+#define R_PAR1_STATUS_DATA__ack__MIN 0
+#define R_PAR1_STATUS_DATA__busy__MIN 0
+#define R_PAR1_STATUS_DATA__fault__MIN 0
+#define R_PAR1_STATUS_DATA__sel__MIN 0
+#define R_PAR1_STATUS_DATA__ext_mode__MIN 0
+#define R_PAR1_STATUS_DATA__tr_rdy__MIN 0
+#define R_PAR1_STATUS_DATA__dav__MIN 0
+#define R_PAR1_STATUS_DATA__ecp_cmd__MIN 0
+#define R_PAR1_STATUS_DATA__data__MIN 0
+
+#define R_PAR1_STATUS_DATA__mode__BITNR 29
+#define R_PAR1_STATUS_DATA__perr__BITNR 28
+#define R_PAR1_STATUS_DATA__ack__BITNR 27
+#define R_PAR1_STATUS_DATA__busy__BITNR 26
+#define R_PAR1_STATUS_DATA__fault__BITNR 25
+#define R_PAR1_STATUS_DATA__sel__BITNR 24
+#define R_PAR1_STATUS_DATA__ext_mode__BITNR 23
+#define R_PAR1_STATUS_DATA__tr_rdy__BITNR 17
+#define R_PAR1_STATUS_DATA__dav__BITNR 16
+#define R_PAR1_STATUS_DATA__ecp_cmd__BITNR 8
+#define R_PAR1_STATUS_DATA__data__BITNR 0
+
+#define R_PAR1_STATUS_DATA__mode__mode__VAL REG_VAL_ENUM
+#define R_PAR1_STATUS_DATA__perr__perr__VAL REG_VAL_ENUM
+#define R_PAR1_STATUS_DATA__ack__ack__VAL REG_VAL_ENUM
+#define R_PAR1_STATUS_DATA__busy__busy__VAL REG_VAL_ENUM
+#define R_PAR1_STATUS_DATA__fault__fault__VAL REG_VAL_ENUM
+#define R_PAR1_STATUS_DATA__sel__sel__VAL REG_VAL_ENUM
+#define R_PAR1_STATUS_DATA__ext_mode__ext_mode__VAL REG_VAL_ENUM
+#define R_PAR1_STATUS_DATA__tr_rdy__tr_rdy__VAL REG_VAL_ENUM
+#define R_PAR1_STATUS_DATA__dav__dav__VAL REG_VAL_ENUM
+#define R_PAR1_STATUS_DATA__ecp_cmd__ecp_cmd__VAL REG_VAL_ENUM
+#define R_PAR1_STATUS_DATA__data__data__VAL REG_VAL_VAL
+
+#define R_PAR1_STATUS_DATA__mode__mode__byte 4
+#define R_PAR1_STATUS_DATA__mode__mode__centronics 1
+#define R_PAR1_STATUS_DATA__mode__mode__ecp_fwd 5
+#define R_PAR1_STATUS_DATA__mode__mode__ecp_rev 6
+#define R_PAR1_STATUS_DATA__mode__mode__epp_rd 0
+#define R_PAR1_STATUS_DATA__mode__mode__epp_wr1 5
+#define R_PAR1_STATUS_DATA__mode__mode__epp_wr2 6
+#define R_PAR1_STATUS_DATA__mode__mode__epp_wr3 7
+#define R_PAR1_STATUS_DATA__mode__mode__fastbyte 2
+#define R_PAR1_STATUS_DATA__mode__mode__manual 0
+#define R_PAR1_STATUS_DATA__mode__mode__nibble 3
+#define R_PAR1_STATUS_DATA__mode__mode__off 7
+#define R_PAR1_STATUS_DATA__perr__perr__active 1
+#define R_PAR1_STATUS_DATA__perr__perr__inactive 0
+#define R_PAR1_STATUS_DATA__ack__ack__active 0
+#define R_PAR1_STATUS_DATA__ack__ack__inactive 1
+#define R_PAR1_STATUS_DATA__busy__busy__active 1
+#define R_PAR1_STATUS_DATA__busy__busy__inactive 0
+#define R_PAR1_STATUS_DATA__fault__fault__active 0
+#define R_PAR1_STATUS_DATA__fault__fault__inactive 1
+#define R_PAR1_STATUS_DATA__sel__sel__active 1
+#define R_PAR1_STATUS_DATA__sel__sel__inactive 0
+#define R_PAR1_STATUS_DATA__ext_mode__ext_mode__disable 0
+#define R_PAR1_STATUS_DATA__ext_mode__ext_mode__enable 1
+#define R_PAR1_STATUS_DATA__tr_rdy__tr_rdy__busy 0
+#define R_PAR1_STATUS_DATA__tr_rdy__tr_rdy__ready 1
+#define R_PAR1_STATUS_DATA__dav__dav__data 1
+#define R_PAR1_STATUS_DATA__dav__dav__nodata 0
+#define R_PAR1_STATUS_DATA__ecp_cmd__ecp_cmd__command 1
+#define R_PAR1_STATUS_DATA__ecp_cmd__ecp_cmd__data 0
+
+#endif
+
+/*
+ * R_PAR_ECP16_DATA
+ * - type: RW
+ * - addr: 0xb0000040
+ * - group: Parallel printer port registers
+ */
+
+#if USE_GROUP__Parallel_printer_port_registers
+
+#define R_PAR_ECP16_DATA__ADDR (REG_TYPECAST_UWORD 0xb0000040)
+#define R_PAR_ECP16_DATA__SVAL REG_SVAL_SHADOW
+#define R_PAR_ECP16_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_PAR_ECP16_DATA__TYPECAST REG_TYPECAST_UWORD
+#define R_PAR_ECP16_DATA__TYPE (REG_UWORD)
+#define R_PAR_ECP16_DATA__GET REG_GET_RW
+#define R_PAR_ECP16_DATA__IGET REG_IGET_RW
+#define R_PAR_ECP16_DATA__SET REG_SET_RW
+#define R_PAR_ECP16_DATA__ISET REG_ISET_RW
+#define R_PAR_ECP16_DATA__SET_VAL REG_SET_VAL_RW
+#define R_PAR_ECP16_DATA__EQL REG_EQL_RW
+#define R_PAR_ECP16_DATA__IEQL REG_IEQL_RW
+#define R_PAR_ECP16_DATA__RD REG_RD_RW
+#define R_PAR_ECP16_DATA__IRD REG_IRD_RW
+#define R_PAR_ECP16_DATA__WR REG_WR_RW
+#define R_PAR_ECP16_DATA__IWR REG_IWR_RW
+
+#define R_PAR_ECP16_DATA__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_PAR_ECP16_DATA__READ(addr) \
+ (*(addr))
+
+#define R_PAR_ECP16_DATA__data__data__MASK 0x0000ffffU
+
+#define R_PAR_ECP16_DATA__data__MAX 0xffff
+
+#define R_PAR_ECP16_DATA__data__MIN 0
+
+#define R_PAR_ECP16_DATA__data__BITNR 0
+
+#define R_PAR_ECP16_DATA__data__data__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_PHY_COUNTERS
+ * - type: RO
+ * - addr: 0xb00000ac
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+#define R_PHY_COUNTERS__ADDR (REG_TYPECAST_UDWORD 0xb00000ac)
+#define R_PHY_COUNTERS__SVAL REG_SVAL_SHADOW
+#define R_PHY_COUNTERS__SVAL_I REG_SVAL_I_SHADOW
+#define R_PHY_COUNTERS__TYPECAST REG_TYPECAST_UDWORD
+#define R_PHY_COUNTERS__TYPE (REG_UDWORD)
+#define R_PHY_COUNTERS__GET REG_GET_RO
+#define R_PHY_COUNTERS__IGET REG_IGET_RO
+#define R_PHY_COUNTERS__SET REG_SET_RO
+#define R_PHY_COUNTERS__ISET REG_ISET_RO
+#define R_PHY_COUNTERS__SET_VAL REG_SET_VAL_RO
+#define R_PHY_COUNTERS__EQL REG_EQL_RO
+#define R_PHY_COUNTERS__IEQL REG_IEQL_RO
+#define R_PHY_COUNTERS__RD REG_RD_RO
+#define R_PHY_COUNTERS__IRD REG_IRD_RO
+#define R_PHY_COUNTERS__WR REG_WR_RO
+#define R_PHY_COUNTERS__IWR REG_IWR_RO
+
+#define R_PHY_COUNTERS__READ(addr) \
+ (*(addr))
+
+#define R_PHY_COUNTERS__sqe_test_error__sqe_test_error__MASK 0x0000ff00U
+#define R_PHY_COUNTERS__carrier_loss__carrier_loss__MASK 0x000000ffU
+
+#define R_PHY_COUNTERS__sqe_test_error__MAX 0xff
+#define R_PHY_COUNTERS__carrier_loss__MAX 0xff
+
+#define R_PHY_COUNTERS__sqe_test_error__MIN 0
+#define R_PHY_COUNTERS__carrier_loss__MIN 0
+
+#define R_PHY_COUNTERS__sqe_test_error__BITNR 8
+#define R_PHY_COUNTERS__carrier_loss__BITNR 0
+
+#define R_PHY_COUNTERS__sqe_test_error__sqe_test_error__VAL REG_VAL_VAL
+#define R_PHY_COUNTERS__carrier_loss__carrier_loss__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_PORT_G_DATA
+ * - type: RW
+ * - addr: 0xb0000028
+ * - group: General config registers
+ */
+
+#if USE_GROUP__General_config_registers
+
+#define R_PORT_G_DATA__ADDR (REG_TYPECAST_UDWORD 0xb0000028)
+#define R_PORT_G_DATA__SVAL REG_SVAL_SHADOW
+#define R_PORT_G_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_PORT_G_DATA__TYPECAST REG_TYPECAST_UDWORD
+#define R_PORT_G_DATA__TYPE (REG_UDWORD)
+#define R_PORT_G_DATA__GET REG_GET_RW
+#define R_PORT_G_DATA__IGET REG_IGET_RW
+#define R_PORT_G_DATA__SET REG_SET_RW
+#define R_PORT_G_DATA__ISET REG_ISET_RW
+#define R_PORT_G_DATA__SET_VAL REG_SET_VAL_RW
+#define R_PORT_G_DATA__EQL REG_EQL_RW
+#define R_PORT_G_DATA__IEQL REG_IEQL_RW
+#define R_PORT_G_DATA__RD REG_RD_RW
+#define R_PORT_G_DATA__IRD REG_IRD_RW
+#define R_PORT_G_DATA__WR REG_WR_RW
+#define R_PORT_G_DATA__IWR REG_IWR_RW
+
+#define R_PORT_G_DATA__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_PORT_G_DATA__READ(addr) \
+ (*(addr))
+
+#define R_PORT_G_DATA__data__data__MASK 0xffffffffU
+
+#define R_PORT_G_DATA__data__MAX 0xffffffff
+
+#define R_PORT_G_DATA__data__MIN 0
+
+#define R_PORT_G_DATA__data__BITNR 0
+
+#define R_PORT_G_DATA__data__data__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_PORT_PA_DATA
+ * - type: WO
+ * - addr: 0xb0000030
+ * - group: General port configuration registers
+ */
+
+#if USE_GROUP__General_port_configuration_registers
+
+#define R_PORT_PA_DATA__ADDR (REG_TYPECAST_BYTE 0xb0000030)
+
+#ifndef REG_NO_SHADOW
+#define R_PORT_PA_DATA__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_PORT_PA_SET + 0))
+#define R_PORT_PA_DATA__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_PORT_PA_SET + 0))
+#else /* REG_NO_SHADOW */
+#define R_PORT_PA_DATA__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_PORT_PA_DATA__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_PORT_PA_DATA__STYPECAST REG_STYPECAST_BYTE
+#define R_PORT_PA_DATA__SVAL REG_SVAL_SHADOW
+#define R_PORT_PA_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_PORT_PA_DATA__TYPECAST REG_TYPECAST_BYTE
+#define R_PORT_PA_DATA__TYPE (REG_BYTE)
+#define R_PORT_PA_DATA__GET REG_GET_WO
+#define R_PORT_PA_DATA__IGET REG_IGET_WO
+#define R_PORT_PA_DATA__SET REG_SET_WO
+#define R_PORT_PA_DATA__ISET REG_ISET_WO
+#define R_PORT_PA_DATA__SET_VAL REG_SET_VAL_WO
+#define R_PORT_PA_DATA__EQL REG_EQL_WO
+#define R_PORT_PA_DATA__IEQL REG_IEQL_WO
+#define R_PORT_PA_DATA__RD REG_RD_WO
+#define R_PORT_PA_DATA__IRD REG_IRD_WO
+#define R_PORT_PA_DATA__WR REG_WR_WO
+#define R_PORT_PA_DATA__IWR REG_IWR_WO
+
+#define R_PORT_PA_DATA__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_PORT_PA_DATA__data_out__data_out__MASK 0x000000ffU
+
+#define R_PORT_PA_DATA__data_out__MAX 255
+
+#define R_PORT_PA_DATA__data_out__MIN 0
+
+#define R_PORT_PA_DATA__data_out__BITNR 0
+
+#define R_PORT_PA_DATA__data_out__data_out__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_PORT_PA_DIR
+ * - type: WO
+ * - addr: 0xb0000031
+ * - group: General port configuration registers
+ */
+
+#if USE_GROUP__General_port_configuration_registers
+
+#define R_PORT_PA_DIR__ADDR (REG_TYPECAST_BYTE 0xb0000031)
+
+#ifndef REG_NO_SHADOW
+#define R_PORT_PA_DIR__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_PORT_PA_SET + 1))
+#define R_PORT_PA_DIR__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_PORT_PA_SET + 1))
+#else /* REG_NO_SHADOW */
+#define R_PORT_PA_DIR__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_PORT_PA_DIR__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_PORT_PA_DIR__STYPECAST REG_STYPECAST_BYTE
+#define R_PORT_PA_DIR__SVAL REG_SVAL_SHADOW
+#define R_PORT_PA_DIR__SVAL_I REG_SVAL_I_SHADOW
+#define R_PORT_PA_DIR__TYPECAST REG_TYPECAST_BYTE
+#define R_PORT_PA_DIR__TYPE (REG_BYTE)
+#define R_PORT_PA_DIR__GET REG_GET_WO
+#define R_PORT_PA_DIR__IGET REG_IGET_WO
+#define R_PORT_PA_DIR__SET REG_SET_WO
+#define R_PORT_PA_DIR__ISET REG_ISET_WO
+#define R_PORT_PA_DIR__SET_VAL REG_SET_VAL_WO
+#define R_PORT_PA_DIR__EQL REG_EQL_WO
+#define R_PORT_PA_DIR__IEQL REG_IEQL_WO
+#define R_PORT_PA_DIR__RD REG_RD_WO
+#define R_PORT_PA_DIR__IRD REG_IRD_WO
+#define R_PORT_PA_DIR__WR REG_WR_WO
+#define R_PORT_PA_DIR__IWR REG_IWR_WO
+
+#define R_PORT_PA_DIR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_PORT_PA_DIR__dir7__dir7__MASK 0x00000080U
+#define R_PORT_PA_DIR__dir6__dir6__MASK 0x00000040U
+#define R_PORT_PA_DIR__dir5__dir5__MASK 0x00000020U
+#define R_PORT_PA_DIR__dir4__dir4__MASK 0x00000010U
+#define R_PORT_PA_DIR__dir3__dir3__MASK 0x00000008U
+#define R_PORT_PA_DIR__dir2__dir2__MASK 0x00000004U
+#define R_PORT_PA_DIR__dir1__dir1__MASK 0x00000002U
+#define R_PORT_PA_DIR__dir0__dir0__MASK 0x00000001U
+
+#define R_PORT_PA_DIR__dir7__MAX 0x1
+#define R_PORT_PA_DIR__dir6__MAX 0x1
+#define R_PORT_PA_DIR__dir5__MAX 0x1
+#define R_PORT_PA_DIR__dir4__MAX 0x1
+#define R_PORT_PA_DIR__dir3__MAX 0x1
+#define R_PORT_PA_DIR__dir2__MAX 0x1
+#define R_PORT_PA_DIR__dir1__MAX 0x1
+#define R_PORT_PA_DIR__dir0__MAX 0x1
+
+#define R_PORT_PA_DIR__dir7__MIN 0
+#define R_PORT_PA_DIR__dir6__MIN 0
+#define R_PORT_PA_DIR__dir5__MIN 0
+#define R_PORT_PA_DIR__dir4__MIN 0
+#define R_PORT_PA_DIR__dir3__MIN 0
+#define R_PORT_PA_DIR__dir2__MIN 0
+#define R_PORT_PA_DIR__dir1__MIN 0
+#define R_PORT_PA_DIR__dir0__MIN 0
+
+#define R_PORT_PA_DIR__dir7__BITNR 7
+#define R_PORT_PA_DIR__dir6__BITNR 6
+#define R_PORT_PA_DIR__dir5__BITNR 5
+#define R_PORT_PA_DIR__dir4__BITNR 4
+#define R_PORT_PA_DIR__dir3__BITNR 3
+#define R_PORT_PA_DIR__dir2__BITNR 2
+#define R_PORT_PA_DIR__dir1__BITNR 1
+#define R_PORT_PA_DIR__dir0__BITNR 0
+
+#define R_PORT_PA_DIR__dir7__dir7__VAL REG_VAL_ENUM
+#define R_PORT_PA_DIR__dir6__dir6__VAL REG_VAL_ENUM
+#define R_PORT_PA_DIR__dir5__dir5__VAL REG_VAL_ENUM
+#define R_PORT_PA_DIR__dir4__dir4__VAL REG_VAL_ENUM
+#define R_PORT_PA_DIR__dir3__dir3__VAL REG_VAL_ENUM
+#define R_PORT_PA_DIR__dir2__dir2__VAL REG_VAL_ENUM
+#define R_PORT_PA_DIR__dir1__dir1__VAL REG_VAL_ENUM
+#define R_PORT_PA_DIR__dir0__dir0__VAL REG_VAL_ENUM
+
+#define R_PORT_PA_DIR__dir7__dir7__input 0
+#define R_PORT_PA_DIR__dir7__dir7__output 1
+#define R_PORT_PA_DIR__dir6__dir6__input 0
+#define R_PORT_PA_DIR__dir6__dir6__output 1
+#define R_PORT_PA_DIR__dir5__dir5__input 0
+#define R_PORT_PA_DIR__dir5__dir5__output 1
+#define R_PORT_PA_DIR__dir4__dir4__input 0
+#define R_PORT_PA_DIR__dir4__dir4__output 1
+#define R_PORT_PA_DIR__dir3__dir3__input 0
+#define R_PORT_PA_DIR__dir3__dir3__output 1
+#define R_PORT_PA_DIR__dir2__dir2__input 0
+#define R_PORT_PA_DIR__dir2__dir2__output 1
+#define R_PORT_PA_DIR__dir1__dir1__input 0
+#define R_PORT_PA_DIR__dir1__dir1__output 1
+#define R_PORT_PA_DIR__dir0__dir0__input 0
+#define R_PORT_PA_DIR__dir0__dir0__output 1
+
+#endif
+
+/*
+ * R_PORT_PA_READ
+ * - type: RO
+ * - addr: 0xb0000030
+ * - group: General port configuration registers
+ */
+
+#if USE_GROUP__General_port_configuration_registers
+
+#define R_PORT_PA_READ__ADDR (REG_TYPECAST_UDWORD 0xb0000030)
+#define R_PORT_PA_READ__SVAL REG_SVAL_SHADOW
+#define R_PORT_PA_READ__SVAL_I REG_SVAL_I_SHADOW
+#define R_PORT_PA_READ__TYPECAST REG_TYPECAST_UDWORD
+#define R_PORT_PA_READ__TYPE (REG_UDWORD)
+#define R_PORT_PA_READ__GET REG_GET_RO
+#define R_PORT_PA_READ__IGET REG_IGET_RO
+#define R_PORT_PA_READ__SET REG_SET_RO
+#define R_PORT_PA_READ__ISET REG_ISET_RO
+#define R_PORT_PA_READ__SET_VAL REG_SET_VAL_RO
+#define R_PORT_PA_READ__EQL REG_EQL_RO
+#define R_PORT_PA_READ__IEQL REG_IEQL_RO
+#define R_PORT_PA_READ__RD REG_RD_RO
+#define R_PORT_PA_READ__IRD REG_IRD_RO
+#define R_PORT_PA_READ__WR REG_WR_RO
+#define R_PORT_PA_READ__IWR REG_IWR_RO
+
+#define R_PORT_PA_READ__READ(addr) \
+ (*(addr))
+
+#define R_PORT_PA_READ__data_in__data_in__MASK 0x000000ffU
+
+#define R_PORT_PA_READ__data_in__MAX 255
+
+#define R_PORT_PA_READ__data_in__MIN 0
+
+#define R_PORT_PA_READ__data_in__BITNR 0
+
+#define R_PORT_PA_READ__data_in__data_in__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_PORT_PA_SET
+ * - type: WO
+ * - addr: 0xb0000030
+ * - group: General port configuration registers
+ */
+
+#if USE_GROUP__General_port_configuration_registers
+
+#define R_PORT_PA_SET__ADDR (REG_TYPECAST_UDWORD 0xb0000030)
+
+#ifndef REG_NO_SHADOW
+#define R_PORT_PA_SET__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_PORT_PA_SET + 0))
+#define R_PORT_PA_SET__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_PORT_PA_SET + 0))
+#else /* REG_NO_SHADOW */
+#define R_PORT_PA_SET__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_PORT_PA_SET__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_PORT_PA_SET__STYPECAST REG_STYPECAST_UDWORD
+#define R_PORT_PA_SET__SVAL REG_SVAL_SHADOW
+#define R_PORT_PA_SET__SVAL_I REG_SVAL_I_SHADOW
+#define R_PORT_PA_SET__TYPECAST REG_TYPECAST_UDWORD
+#define R_PORT_PA_SET__TYPE (REG_UDWORD)
+#define R_PORT_PA_SET__GET REG_GET_WO
+#define R_PORT_PA_SET__IGET REG_IGET_WO
+#define R_PORT_PA_SET__SET REG_SET_WO
+#define R_PORT_PA_SET__ISET REG_ISET_WO
+#define R_PORT_PA_SET__SET_VAL REG_SET_VAL_WO
+#define R_PORT_PA_SET__EQL REG_EQL_WO
+#define R_PORT_PA_SET__IEQL REG_IEQL_WO
+#define R_PORT_PA_SET__RD REG_RD_WO
+#define R_PORT_PA_SET__IRD REG_IRD_WO
+#define R_PORT_PA_SET__WR REG_WR_WO
+#define R_PORT_PA_SET__IWR REG_IWR_WO
+
+#define R_PORT_PA_SET__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_PORT_PA_SET__dir7__dir7__MASK 0x00008000U
+#define R_PORT_PA_SET__dir6__dir6__MASK 0x00004000U
+#define R_PORT_PA_SET__dir5__dir5__MASK 0x00002000U
+#define R_PORT_PA_SET__dir4__dir4__MASK 0x00001000U
+#define R_PORT_PA_SET__dir3__dir3__MASK 0x00000800U
+#define R_PORT_PA_SET__dir2__dir2__MASK 0x00000400U
+#define R_PORT_PA_SET__dir1__dir1__MASK 0x00000200U
+#define R_PORT_PA_SET__dir0__dir0__MASK 0x00000100U
+#define R_PORT_PA_SET__data_out__data_out__MASK 0x000000ffU
+
+#define R_PORT_PA_SET__dir7__MAX 0x1
+#define R_PORT_PA_SET__dir6__MAX 0x1
+#define R_PORT_PA_SET__dir5__MAX 0x1
+#define R_PORT_PA_SET__dir4__MAX 0x1
+#define R_PORT_PA_SET__dir3__MAX 0x1
+#define R_PORT_PA_SET__dir2__MAX 0x1
+#define R_PORT_PA_SET__dir1__MAX 0x1
+#define R_PORT_PA_SET__dir0__MAX 0x1
+#define R_PORT_PA_SET__data_out__MAX 255
+
+#define R_PORT_PA_SET__dir7__MIN 0
+#define R_PORT_PA_SET__dir6__MIN 0
+#define R_PORT_PA_SET__dir5__MIN 0
+#define R_PORT_PA_SET__dir4__MIN 0
+#define R_PORT_PA_SET__dir3__MIN 0
+#define R_PORT_PA_SET__dir2__MIN 0
+#define R_PORT_PA_SET__dir1__MIN 0
+#define R_PORT_PA_SET__dir0__MIN 0
+#define R_PORT_PA_SET__data_out__MIN 0
+
+#define R_PORT_PA_SET__dir7__BITNR 15
+#define R_PORT_PA_SET__dir6__BITNR 14
+#define R_PORT_PA_SET__dir5__BITNR 13
+#define R_PORT_PA_SET__dir4__BITNR 12
+#define R_PORT_PA_SET__dir3__BITNR 11
+#define R_PORT_PA_SET__dir2__BITNR 10
+#define R_PORT_PA_SET__dir1__BITNR 9
+#define R_PORT_PA_SET__dir0__BITNR 8
+#define R_PORT_PA_SET__data_out__BITNR 0
+
+#define R_PORT_PA_SET__dir7__dir7__VAL REG_VAL_ENUM
+#define R_PORT_PA_SET__dir6__dir6__VAL REG_VAL_ENUM
+#define R_PORT_PA_SET__dir5__dir5__VAL REG_VAL_ENUM
+#define R_PORT_PA_SET__dir4__dir4__VAL REG_VAL_ENUM
+#define R_PORT_PA_SET__dir3__dir3__VAL REG_VAL_ENUM
+#define R_PORT_PA_SET__dir2__dir2__VAL REG_VAL_ENUM
+#define R_PORT_PA_SET__dir1__dir1__VAL REG_VAL_ENUM
+#define R_PORT_PA_SET__dir0__dir0__VAL REG_VAL_ENUM
+#define R_PORT_PA_SET__data_out__data_out__VAL REG_VAL_VAL
+
+#define R_PORT_PA_SET__dir7__dir7__input 0
+#define R_PORT_PA_SET__dir7__dir7__output 1
+#define R_PORT_PA_SET__dir6__dir6__input 0
+#define R_PORT_PA_SET__dir6__dir6__output 1
+#define R_PORT_PA_SET__dir5__dir5__input 0
+#define R_PORT_PA_SET__dir5__dir5__output 1
+#define R_PORT_PA_SET__dir4__dir4__input 0
+#define R_PORT_PA_SET__dir4__dir4__output 1
+#define R_PORT_PA_SET__dir3__dir3__input 0
+#define R_PORT_PA_SET__dir3__dir3__output 1
+#define R_PORT_PA_SET__dir2__dir2__input 0
+#define R_PORT_PA_SET__dir2__dir2__output 1
+#define R_PORT_PA_SET__dir1__dir1__input 0
+#define R_PORT_PA_SET__dir1__dir1__output 1
+#define R_PORT_PA_SET__dir0__dir0__input 0
+#define R_PORT_PA_SET__dir0__dir0__output 1
+
+#endif
+
+/*
+ * R_PORT_PB_CONFIG
+ * - type: WO
+ * - addr: 0xb000003a
+ * - group: General port configuration registers
+ */
+
+#if USE_GROUP__General_port_configuration_registers
+
+#define R_PORT_PB_CONFIG__ADDR (REG_TYPECAST_BYTE 0xb000003a)
+
+#ifndef REG_NO_SHADOW
+#define R_PORT_PB_CONFIG__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_PORT_PB_SET + 2))
+#define R_PORT_PB_CONFIG__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_PORT_PB_SET + 2))
+#else /* REG_NO_SHADOW */
+#define R_PORT_PB_CONFIG__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_PORT_PB_CONFIG__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_PORT_PB_CONFIG__STYPECAST REG_STYPECAST_BYTE
+#define R_PORT_PB_CONFIG__SVAL REG_SVAL_SHADOW
+#define R_PORT_PB_CONFIG__SVAL_I REG_SVAL_I_SHADOW
+#define R_PORT_PB_CONFIG__TYPECAST REG_TYPECAST_BYTE
+#define R_PORT_PB_CONFIG__TYPE (REG_BYTE)
+#define R_PORT_PB_CONFIG__GET REG_GET_WO
+#define R_PORT_PB_CONFIG__IGET REG_IGET_WO
+#define R_PORT_PB_CONFIG__SET REG_SET_WO
+#define R_PORT_PB_CONFIG__ISET REG_ISET_WO
+#define R_PORT_PB_CONFIG__SET_VAL REG_SET_VAL_WO
+#define R_PORT_PB_CONFIG__EQL REG_EQL_WO
+#define R_PORT_PB_CONFIG__IEQL REG_IEQL_WO
+#define R_PORT_PB_CONFIG__RD REG_RD_WO
+#define R_PORT_PB_CONFIG__IRD REG_IRD_WO
+#define R_PORT_PB_CONFIG__WR REG_WR_WO
+#define R_PORT_PB_CONFIG__IWR REG_IWR_WO
+
+#define R_PORT_PB_CONFIG__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_PORT_PB_CONFIG__cs7__cs7__MASK 0x00000080U
+#define R_PORT_PB_CONFIG__cs6__cs6__MASK 0x00000040U
+#define R_PORT_PB_CONFIG__cs5__cs5__MASK 0x00000020U
+#define R_PORT_PB_CONFIG__cs4__cs4__MASK 0x00000010U
+#define R_PORT_PB_CONFIG__cs3__cs3__MASK 0x00000008U
+#define R_PORT_PB_CONFIG__cs2__cs2__MASK 0x00000004U
+#define R_PORT_PB_CONFIG__scsi1__scsi1__MASK 0x00000002U
+#define R_PORT_PB_CONFIG__scsi0__scsi0__MASK 0x00000001U
+
+#define R_PORT_PB_CONFIG__cs7__MAX 0x1
+#define R_PORT_PB_CONFIG__cs6__MAX 0x1
+#define R_PORT_PB_CONFIG__cs5__MAX 0x1
+#define R_PORT_PB_CONFIG__cs4__MAX 0x1
+#define R_PORT_PB_CONFIG__cs3__MAX 0x1
+#define R_PORT_PB_CONFIG__cs2__MAX 0x1
+#define R_PORT_PB_CONFIG__scsi1__MAX 0x1
+#define R_PORT_PB_CONFIG__scsi0__MAX 0x1
+
+#define R_PORT_PB_CONFIG__cs7__MIN 0
+#define R_PORT_PB_CONFIG__cs6__MIN 0
+#define R_PORT_PB_CONFIG__cs5__MIN 0
+#define R_PORT_PB_CONFIG__cs4__MIN 0
+#define R_PORT_PB_CONFIG__cs3__MIN 0
+#define R_PORT_PB_CONFIG__cs2__MIN 0
+#define R_PORT_PB_CONFIG__scsi1__MIN 0
+#define R_PORT_PB_CONFIG__scsi0__MIN 0
+
+#define R_PORT_PB_CONFIG__cs7__BITNR 7
+#define R_PORT_PB_CONFIG__cs6__BITNR 6
+#define R_PORT_PB_CONFIG__cs5__BITNR 5
+#define R_PORT_PB_CONFIG__cs4__BITNR 4
+#define R_PORT_PB_CONFIG__cs3__BITNR 3
+#define R_PORT_PB_CONFIG__cs2__BITNR 2
+#define R_PORT_PB_CONFIG__scsi1__BITNR 1
+#define R_PORT_PB_CONFIG__scsi0__BITNR 0
+
+#define R_PORT_PB_CONFIG__cs7__cs7__VAL REG_VAL_ENUM
+#define R_PORT_PB_CONFIG__cs6__cs6__VAL REG_VAL_ENUM
+#define R_PORT_PB_CONFIG__cs5__cs5__VAL REG_VAL_ENUM
+#define R_PORT_PB_CONFIG__cs4__cs4__VAL REG_VAL_ENUM
+#define R_PORT_PB_CONFIG__cs3__cs3__VAL REG_VAL_ENUM
+#define R_PORT_PB_CONFIG__cs2__cs2__VAL REG_VAL_ENUM
+#define R_PORT_PB_CONFIG__scsi1__scsi1__VAL REG_VAL_ENUM
+#define R_PORT_PB_CONFIG__scsi0__scsi0__VAL REG_VAL_ENUM
+
+#define R_PORT_PB_CONFIG__cs7__cs7__cs 1
+#define R_PORT_PB_CONFIG__cs7__cs7__port 0
+#define R_PORT_PB_CONFIG__cs6__cs6__cs 1
+#define R_PORT_PB_CONFIG__cs6__cs6__port 0
+#define R_PORT_PB_CONFIG__cs5__cs5__cs 1
+#define R_PORT_PB_CONFIG__cs5__cs5__port 0
+#define R_PORT_PB_CONFIG__cs4__cs4__cs 1
+#define R_PORT_PB_CONFIG__cs4__cs4__port 0
+#define R_PORT_PB_CONFIG__cs3__cs3__cs 1
+#define R_PORT_PB_CONFIG__cs3__cs3__port 0
+#define R_PORT_PB_CONFIG__cs2__cs2__cs 1
+#define R_PORT_PB_CONFIG__cs2__cs2__port 0
+#define R_PORT_PB_CONFIG__scsi1__scsi1__enph 1
+#define R_PORT_PB_CONFIG__scsi1__scsi1__port_cs 0
+#define R_PORT_PB_CONFIG__scsi0__scsi0__enph 1
+#define R_PORT_PB_CONFIG__scsi0__scsi0__port_cs 0
+
+#endif
+
+/*
+ * R_PORT_PB_DATA
+ * - type: WO
+ * - addr: 0xb0000038
+ * - group: General port configuration registers
+ */
+
+#if USE_GROUP__General_port_configuration_registers
+
+#define R_PORT_PB_DATA__ADDR (REG_TYPECAST_BYTE 0xb0000038)
+
+#ifndef REG_NO_SHADOW
+#define R_PORT_PB_DATA__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_PORT_PB_SET + 0))
+#define R_PORT_PB_DATA__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_PORT_PB_SET + 0))
+#else /* REG_NO_SHADOW */
+#define R_PORT_PB_DATA__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_PORT_PB_DATA__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_PORT_PB_DATA__STYPECAST REG_STYPECAST_BYTE
+#define R_PORT_PB_DATA__SVAL REG_SVAL_SHADOW
+#define R_PORT_PB_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_PORT_PB_DATA__TYPECAST REG_TYPECAST_BYTE
+#define R_PORT_PB_DATA__TYPE (REG_BYTE)
+#define R_PORT_PB_DATA__GET REG_GET_WO
+#define R_PORT_PB_DATA__IGET REG_IGET_WO
+#define R_PORT_PB_DATA__SET REG_SET_WO
+#define R_PORT_PB_DATA__ISET REG_ISET_WO
+#define R_PORT_PB_DATA__SET_VAL REG_SET_VAL_WO
+#define R_PORT_PB_DATA__EQL REG_EQL_WO
+#define R_PORT_PB_DATA__IEQL REG_IEQL_WO
+#define R_PORT_PB_DATA__RD REG_RD_WO
+#define R_PORT_PB_DATA__IRD REG_IRD_WO
+#define R_PORT_PB_DATA__WR REG_WR_WO
+#define R_PORT_PB_DATA__IWR REG_IWR_WO
+
+#define R_PORT_PB_DATA__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_PORT_PB_DATA__data_out__data_out__MASK 0x000000ffU
+
+#define R_PORT_PB_DATA__data_out__MAX 255
+
+#define R_PORT_PB_DATA__data_out__MIN 0
+
+#define R_PORT_PB_DATA__data_out__BITNR 0
+
+#define R_PORT_PB_DATA__data_out__data_out__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_PORT_PB_DIR
+ * - type: WO
+ * - addr: 0xb0000039
+ * - group: General port configuration registers
+ */
+
+#if USE_GROUP__General_port_configuration_registers
+
+#define R_PORT_PB_DIR__ADDR (REG_TYPECAST_BYTE 0xb0000039)
+
+#ifndef REG_NO_SHADOW
+#define R_PORT_PB_DIR__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_PORT_PB_SET + 1))
+#define R_PORT_PB_DIR__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_PORT_PB_SET + 1))
+#else /* REG_NO_SHADOW */
+#define R_PORT_PB_DIR__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_PORT_PB_DIR__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_PORT_PB_DIR__STYPECAST REG_STYPECAST_BYTE
+#define R_PORT_PB_DIR__SVAL REG_SVAL_SHADOW
+#define R_PORT_PB_DIR__SVAL_I REG_SVAL_I_SHADOW
+#define R_PORT_PB_DIR__TYPECAST REG_TYPECAST_BYTE
+#define R_PORT_PB_DIR__TYPE (REG_BYTE)
+#define R_PORT_PB_DIR__GET REG_GET_WO
+#define R_PORT_PB_DIR__IGET REG_IGET_WO
+#define R_PORT_PB_DIR__SET REG_SET_WO
+#define R_PORT_PB_DIR__ISET REG_ISET_WO
+#define R_PORT_PB_DIR__SET_VAL REG_SET_VAL_WO
+#define R_PORT_PB_DIR__EQL REG_EQL_WO
+#define R_PORT_PB_DIR__IEQL REG_IEQL_WO
+#define R_PORT_PB_DIR__RD REG_RD_WO
+#define R_PORT_PB_DIR__IRD REG_IRD_WO
+#define R_PORT_PB_DIR__WR REG_WR_WO
+#define R_PORT_PB_DIR__IWR REG_IWR_WO
+
+#define R_PORT_PB_DIR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_PORT_PB_DIR__dir7__dir7__MASK 0x00000080U
+#define R_PORT_PB_DIR__dir6__dir6__MASK 0x00000040U
+#define R_PORT_PB_DIR__dir5__dir5__MASK 0x00000020U
+#define R_PORT_PB_DIR__dir4__dir4__MASK 0x00000010U
+#define R_PORT_PB_DIR__dir3__dir3__MASK 0x00000008U
+#define R_PORT_PB_DIR__dir2__dir2__MASK 0x00000004U
+#define R_PORT_PB_DIR__dir1__dir1__MASK 0x00000002U
+#define R_PORT_PB_DIR__dir0__dir0__MASK 0x00000001U
+
+#define R_PORT_PB_DIR__dir7__MAX 0x1
+#define R_PORT_PB_DIR__dir6__MAX 0x1
+#define R_PORT_PB_DIR__dir5__MAX 0x1
+#define R_PORT_PB_DIR__dir4__MAX 0x1
+#define R_PORT_PB_DIR__dir3__MAX 0x1
+#define R_PORT_PB_DIR__dir2__MAX 0x1
+#define R_PORT_PB_DIR__dir1__MAX 0x1
+#define R_PORT_PB_DIR__dir0__MAX 0x1
+
+#define R_PORT_PB_DIR__dir7__MIN 0
+#define R_PORT_PB_DIR__dir6__MIN 0
+#define R_PORT_PB_DIR__dir5__MIN 0
+#define R_PORT_PB_DIR__dir4__MIN 0
+#define R_PORT_PB_DIR__dir3__MIN 0
+#define R_PORT_PB_DIR__dir2__MIN 0
+#define R_PORT_PB_DIR__dir1__MIN 0
+#define R_PORT_PB_DIR__dir0__MIN 0
+
+#define R_PORT_PB_DIR__dir7__BITNR 7
+#define R_PORT_PB_DIR__dir6__BITNR 6
+#define R_PORT_PB_DIR__dir5__BITNR 5
+#define R_PORT_PB_DIR__dir4__BITNR 4
+#define R_PORT_PB_DIR__dir3__BITNR 3
+#define R_PORT_PB_DIR__dir2__BITNR 2
+#define R_PORT_PB_DIR__dir1__BITNR 1
+#define R_PORT_PB_DIR__dir0__BITNR 0
+
+#define R_PORT_PB_DIR__dir7__dir7__VAL REG_VAL_ENUM
+#define R_PORT_PB_DIR__dir6__dir6__VAL REG_VAL_ENUM
+#define R_PORT_PB_DIR__dir5__dir5__VAL REG_VAL_ENUM
+#define R_PORT_PB_DIR__dir4__dir4__VAL REG_VAL_ENUM
+#define R_PORT_PB_DIR__dir3__dir3__VAL REG_VAL_ENUM
+#define R_PORT_PB_DIR__dir2__dir2__VAL REG_VAL_ENUM
+#define R_PORT_PB_DIR__dir1__dir1__VAL REG_VAL_ENUM
+#define R_PORT_PB_DIR__dir0__dir0__VAL REG_VAL_ENUM
+
+#define R_PORT_PB_DIR__dir7__dir7__input 0
+#define R_PORT_PB_DIR__dir7__dir7__output 1
+#define R_PORT_PB_DIR__dir6__dir6__input 0
+#define R_PORT_PB_DIR__dir6__dir6__output 1
+#define R_PORT_PB_DIR__dir5__dir5__input 0
+#define R_PORT_PB_DIR__dir5__dir5__output 1
+#define R_PORT_PB_DIR__dir4__dir4__input 0
+#define R_PORT_PB_DIR__dir4__dir4__output 1
+#define R_PORT_PB_DIR__dir3__dir3__input 0
+#define R_PORT_PB_DIR__dir3__dir3__output 1
+#define R_PORT_PB_DIR__dir2__dir2__input 0
+#define R_PORT_PB_DIR__dir2__dir2__output 1
+#define R_PORT_PB_DIR__dir1__dir1__input 0
+#define R_PORT_PB_DIR__dir1__dir1__output 1
+#define R_PORT_PB_DIR__dir0__dir0__input 0
+#define R_PORT_PB_DIR__dir0__dir0__output 1
+
+#endif
+
+/*
+ * R_PORT_PB_I2C
+ * - type: WO
+ * - addr: 0xb000003b
+ * - group: General port configuration registers
+ */
+
+#if USE_GROUP__General_port_configuration_registers
+
+#define R_PORT_PB_I2C__ADDR (REG_TYPECAST_BYTE 0xb000003b)
+
+#ifndef REG_NO_SHADOW
+#define R_PORT_PB_I2C__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_PORT_PB_SET + 3))
+#define R_PORT_PB_I2C__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_PORT_PB_SET + 3))
+#else /* REG_NO_SHADOW */
+#define R_PORT_PB_I2C__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_PORT_PB_I2C__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_PORT_PB_I2C__STYPECAST REG_STYPECAST_BYTE
+#define R_PORT_PB_I2C__SVAL REG_SVAL_SHADOW
+#define R_PORT_PB_I2C__SVAL_I REG_SVAL_I_SHADOW
+#define R_PORT_PB_I2C__TYPECAST REG_TYPECAST_BYTE
+#define R_PORT_PB_I2C__TYPE (REG_BYTE)
+#define R_PORT_PB_I2C__GET REG_GET_WO
+#define R_PORT_PB_I2C__IGET REG_IGET_WO
+#define R_PORT_PB_I2C__SET REG_SET_WO
+#define R_PORT_PB_I2C__ISET REG_ISET_WO
+#define R_PORT_PB_I2C__SET_VAL REG_SET_VAL_WO
+#define R_PORT_PB_I2C__EQL REG_EQL_WO
+#define R_PORT_PB_I2C__IEQL REG_IEQL_WO
+#define R_PORT_PB_I2C__RD REG_RD_WO
+#define R_PORT_PB_I2C__IRD REG_IRD_WO
+#define R_PORT_PB_I2C__WR REG_WR_WO
+#define R_PORT_PB_I2C__IWR REG_IWR_WO
+
+#define R_PORT_PB_I2C__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_PORT_PB_I2C__syncser3__syncser3__MASK 0x00000020U
+#define R_PORT_PB_I2C__syncser1__syncser1__MASK 0x00000010U
+#define R_PORT_PB_I2C__i2c_en__i2c_en__MASK 0x00000008U
+#define R_PORT_PB_I2C__i2c_d__i2c_d__MASK 0x00000004U
+#define R_PORT_PB_I2C__i2c_clk__i2c_clk__MASK 0x00000002U
+#define R_PORT_PB_I2C__i2c_oe___i2c_oe___MASK 0x00000001U
+
+#define R_PORT_PB_I2C__syncser3__MAX 0x1
+#define R_PORT_PB_I2C__syncser1__MAX 0x1
+#define R_PORT_PB_I2C__i2c_en__MAX 0x1
+#define R_PORT_PB_I2C__i2c_d__MAX 1
+#define R_PORT_PB_I2C__i2c_clk__MAX 1
+#define R_PORT_PB_I2C__i2c_oe___MAX 0x1
+
+#define R_PORT_PB_I2C__syncser3__MIN 0
+#define R_PORT_PB_I2C__syncser1__MIN 0
+#define R_PORT_PB_I2C__i2c_en__MIN 0
+#define R_PORT_PB_I2C__i2c_d__MIN 0
+#define R_PORT_PB_I2C__i2c_clk__MIN 0
+#define R_PORT_PB_I2C__i2c_oe___MIN 0
+
+#define R_PORT_PB_I2C__syncser3__BITNR 5
+#define R_PORT_PB_I2C__syncser1__BITNR 4
+#define R_PORT_PB_I2C__i2c_en__BITNR 3
+#define R_PORT_PB_I2C__i2c_d__BITNR 2
+#define R_PORT_PB_I2C__i2c_clk__BITNR 1
+#define R_PORT_PB_I2C__i2c_oe___BITNR 0
+
+#define R_PORT_PB_I2C__syncser3__syncser3__VAL REG_VAL_ENUM
+#define R_PORT_PB_I2C__syncser1__syncser1__VAL REG_VAL_ENUM
+#define R_PORT_PB_I2C__i2c_en__i2c_en__VAL REG_VAL_ENUM
+#define R_PORT_PB_I2C__i2c_d__i2c_d__VAL REG_VAL_VAL
+#define R_PORT_PB_I2C__i2c_clk__i2c_clk__VAL REG_VAL_VAL
+#define R_PORT_PB_I2C__i2c_oe___i2c_oe___VAL REG_VAL_ENUM
+
+#define R_PORT_PB_I2C__syncser3__syncser3__port_cs 0
+#define R_PORT_PB_I2C__syncser3__syncser3__ss3extra 1
+#define R_PORT_PB_I2C__syncser1__syncser1__port_cs 0
+#define R_PORT_PB_I2C__syncser1__syncser1__ss1extra 1
+#define R_PORT_PB_I2C__i2c_en__i2c_en__off 0
+#define R_PORT_PB_I2C__i2c_en__i2c_en__on 1
+#define R_PORT_PB_I2C__i2c_oe___i2c_oe___disable 1
+#define R_PORT_PB_I2C__i2c_oe___i2c_oe___enable 0
+
+#endif
+
+/*
+ * R_PORT_PB_READ
+ * - type: RO
+ * - addr: 0xb0000038
+ * - group: General port configuration registers
+ */
+
+#if USE_GROUP__General_port_configuration_registers
+
+#define R_PORT_PB_READ__ADDR (REG_TYPECAST_UDWORD 0xb0000038)
+#define R_PORT_PB_READ__SVAL REG_SVAL_SHADOW
+#define R_PORT_PB_READ__SVAL_I REG_SVAL_I_SHADOW
+#define R_PORT_PB_READ__TYPECAST REG_TYPECAST_UDWORD
+#define R_PORT_PB_READ__TYPE (REG_UDWORD)
+#define R_PORT_PB_READ__GET REG_GET_RO
+#define R_PORT_PB_READ__IGET REG_IGET_RO
+#define R_PORT_PB_READ__SET REG_SET_RO
+#define R_PORT_PB_READ__ISET REG_ISET_RO
+#define R_PORT_PB_READ__SET_VAL REG_SET_VAL_RO
+#define R_PORT_PB_READ__EQL REG_EQL_RO
+#define R_PORT_PB_READ__IEQL REG_IEQL_RO
+#define R_PORT_PB_READ__RD REG_RD_RO
+#define R_PORT_PB_READ__IRD REG_IRD_RO
+#define R_PORT_PB_READ__WR REG_WR_RO
+#define R_PORT_PB_READ__IWR REG_IWR_RO
+
+#define R_PORT_PB_READ__READ(addr) \
+ (*(addr))
+
+#define R_PORT_PB_READ__data_in__data_in__MASK 0x000000ffU
+
+#define R_PORT_PB_READ__data_in__MAX 255
+
+#define R_PORT_PB_READ__data_in__MIN 0
+
+#define R_PORT_PB_READ__data_in__BITNR 0
+
+#define R_PORT_PB_READ__data_in__data_in__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_PORT_PB_SET
+ * - type: WO
+ * - addr: 0xb0000038
+ * - group: General port configuration registers
+ */
+
+#if USE_GROUP__General_port_configuration_registers
+
+#define R_PORT_PB_SET__ADDR (REG_TYPECAST_UDWORD 0xb0000038)
+
+#ifndef REG_NO_SHADOW
+#define R_PORT_PB_SET__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_PORT_PB_SET + 0))
+#define R_PORT_PB_SET__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_PORT_PB_SET + 0))
+#else /* REG_NO_SHADOW */
+#define R_PORT_PB_SET__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_PORT_PB_SET__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_PORT_PB_SET__STYPECAST REG_STYPECAST_UDWORD
+#define R_PORT_PB_SET__SVAL REG_SVAL_SHADOW
+#define R_PORT_PB_SET__SVAL_I REG_SVAL_I_SHADOW
+#define R_PORT_PB_SET__TYPECAST REG_TYPECAST_UDWORD
+#define R_PORT_PB_SET__TYPE (REG_UDWORD)
+#define R_PORT_PB_SET__GET REG_GET_WO
+#define R_PORT_PB_SET__IGET REG_IGET_WO
+#define R_PORT_PB_SET__SET REG_SET_WO
+#define R_PORT_PB_SET__ISET REG_ISET_WO
+#define R_PORT_PB_SET__SET_VAL REG_SET_VAL_WO
+#define R_PORT_PB_SET__EQL REG_EQL_WO
+#define R_PORT_PB_SET__IEQL REG_IEQL_WO
+#define R_PORT_PB_SET__RD REG_RD_WO
+#define R_PORT_PB_SET__IRD REG_IRD_WO
+#define R_PORT_PB_SET__WR REG_WR_WO
+#define R_PORT_PB_SET__IWR REG_IWR_WO
+
+#define R_PORT_PB_SET__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_PORT_PB_SET__syncser3__syncser3__MASK 0x20000000U
+#define R_PORT_PB_SET__syncser1__syncser1__MASK 0x10000000U
+#define R_PORT_PB_SET__i2c_en__i2c_en__MASK 0x08000000U
+#define R_PORT_PB_SET__i2c_d__i2c_d__MASK 0x04000000U
+#define R_PORT_PB_SET__i2c_clk__i2c_clk__MASK 0x02000000U
+#define R_PORT_PB_SET__i2c_oe___i2c_oe___MASK 0x01000000U
+#define R_PORT_PB_SET__cs7__cs7__MASK 0x00800000U
+#define R_PORT_PB_SET__cs6__cs6__MASK 0x00400000U
+#define R_PORT_PB_SET__cs5__cs5__MASK 0x00200000U
+#define R_PORT_PB_SET__cs4__cs4__MASK 0x00100000U
+#define R_PORT_PB_SET__cs3__cs3__MASK 0x00080000U
+#define R_PORT_PB_SET__cs2__cs2__MASK 0x00040000U
+#define R_PORT_PB_SET__scsi1__scsi1__MASK 0x00020000U
+#define R_PORT_PB_SET__scsi0__scsi0__MASK 0x00010000U
+#define R_PORT_PB_SET__dir7__dir7__MASK 0x00008000U
+#define R_PORT_PB_SET__dir6__dir6__MASK 0x00004000U
+#define R_PORT_PB_SET__dir5__dir5__MASK 0x00002000U
+#define R_PORT_PB_SET__dir4__dir4__MASK 0x00001000U
+#define R_PORT_PB_SET__dir3__dir3__MASK 0x00000800U
+#define R_PORT_PB_SET__dir2__dir2__MASK 0x00000400U
+#define R_PORT_PB_SET__dir1__dir1__MASK 0x00000200U
+#define R_PORT_PB_SET__dir0__dir0__MASK 0x00000100U
+#define R_PORT_PB_SET__data_out__data_out__MASK 0x000000ffU
+
+#define R_PORT_PB_SET__syncser3__MAX 0x1
+#define R_PORT_PB_SET__syncser1__MAX 0x1
+#define R_PORT_PB_SET__i2c_en__MAX 0x1
+#define R_PORT_PB_SET__i2c_d__MAX 1
+#define R_PORT_PB_SET__i2c_clk__MAX 1
+#define R_PORT_PB_SET__i2c_oe___MAX 0x1
+#define R_PORT_PB_SET__cs7__MAX 0x1
+#define R_PORT_PB_SET__cs6__MAX 0x1
+#define R_PORT_PB_SET__cs5__MAX 0x1
+#define R_PORT_PB_SET__cs4__MAX 0x1
+#define R_PORT_PB_SET__cs3__MAX 0x1
+#define R_PORT_PB_SET__cs2__MAX 0x1
+#define R_PORT_PB_SET__scsi1__MAX 0x1
+#define R_PORT_PB_SET__scsi0__MAX 0x1
+#define R_PORT_PB_SET__dir7__MAX 0x1
+#define R_PORT_PB_SET__dir6__MAX 0x1
+#define R_PORT_PB_SET__dir5__MAX 0x1
+#define R_PORT_PB_SET__dir4__MAX 0x1
+#define R_PORT_PB_SET__dir3__MAX 0x1
+#define R_PORT_PB_SET__dir2__MAX 0x1
+#define R_PORT_PB_SET__dir1__MAX 0x1
+#define R_PORT_PB_SET__dir0__MAX 0x1
+#define R_PORT_PB_SET__data_out__MAX 255
+
+#define R_PORT_PB_SET__syncser3__MIN 0
+#define R_PORT_PB_SET__syncser1__MIN 0
+#define R_PORT_PB_SET__i2c_en__MIN 0
+#define R_PORT_PB_SET__i2c_d__MIN 0
+#define R_PORT_PB_SET__i2c_clk__MIN 0
+#define R_PORT_PB_SET__i2c_oe___MIN 0
+#define R_PORT_PB_SET__cs7__MIN 0
+#define R_PORT_PB_SET__cs6__MIN 0
+#define R_PORT_PB_SET__cs5__MIN 0
+#define R_PORT_PB_SET__cs4__MIN 0
+#define R_PORT_PB_SET__cs3__MIN 0
+#define R_PORT_PB_SET__cs2__MIN 0
+#define R_PORT_PB_SET__scsi1__MIN 0
+#define R_PORT_PB_SET__scsi0__MIN 0
+#define R_PORT_PB_SET__dir7__MIN 0
+#define R_PORT_PB_SET__dir6__MIN 0
+#define R_PORT_PB_SET__dir5__MIN 0
+#define R_PORT_PB_SET__dir4__MIN 0
+#define R_PORT_PB_SET__dir3__MIN 0
+#define R_PORT_PB_SET__dir2__MIN 0
+#define R_PORT_PB_SET__dir1__MIN 0
+#define R_PORT_PB_SET__dir0__MIN 0
+#define R_PORT_PB_SET__data_out__MIN 0
+
+#define R_PORT_PB_SET__syncser3__BITNR 29
+#define R_PORT_PB_SET__syncser1__BITNR 28
+#define R_PORT_PB_SET__i2c_en__BITNR 27
+#define R_PORT_PB_SET__i2c_d__BITNR 26
+#define R_PORT_PB_SET__i2c_clk__BITNR 25
+#define R_PORT_PB_SET__i2c_oe___BITNR 24
+#define R_PORT_PB_SET__cs7__BITNR 23
+#define R_PORT_PB_SET__cs6__BITNR 22
+#define R_PORT_PB_SET__cs5__BITNR 21
+#define R_PORT_PB_SET__cs4__BITNR 20
+#define R_PORT_PB_SET__cs3__BITNR 19
+#define R_PORT_PB_SET__cs2__BITNR 18
+#define R_PORT_PB_SET__scsi1__BITNR 17
+#define R_PORT_PB_SET__scsi0__BITNR 16
+#define R_PORT_PB_SET__dir7__BITNR 15
+#define R_PORT_PB_SET__dir6__BITNR 14
+#define R_PORT_PB_SET__dir5__BITNR 13
+#define R_PORT_PB_SET__dir4__BITNR 12
+#define R_PORT_PB_SET__dir3__BITNR 11
+#define R_PORT_PB_SET__dir2__BITNR 10
+#define R_PORT_PB_SET__dir1__BITNR 9
+#define R_PORT_PB_SET__dir0__BITNR 8
+#define R_PORT_PB_SET__data_out__BITNR 0
+
+#define R_PORT_PB_SET__syncser3__syncser3__VAL REG_VAL_ENUM
+#define R_PORT_PB_SET__syncser1__syncser1__VAL REG_VAL_ENUM
+#define R_PORT_PB_SET__i2c_en__i2c_en__VAL REG_VAL_ENUM
+#define R_PORT_PB_SET__i2c_d__i2c_d__VAL REG_VAL_VAL
+#define R_PORT_PB_SET__i2c_clk__i2c_clk__VAL REG_VAL_VAL
+#define R_PORT_PB_SET__i2c_oe___i2c_oe___VAL REG_VAL_ENUM
+#define R_PORT_PB_SET__cs7__cs7__VAL REG_VAL_ENUM
+#define R_PORT_PB_SET__cs6__cs6__VAL REG_VAL_ENUM
+#define R_PORT_PB_SET__cs5__cs5__VAL REG_VAL_ENUM
+#define R_PORT_PB_SET__cs4__cs4__VAL REG_VAL_ENUM
+#define R_PORT_PB_SET__cs3__cs3__VAL REG_VAL_ENUM
+#define R_PORT_PB_SET__cs2__cs2__VAL REG_VAL_ENUM
+#define R_PORT_PB_SET__scsi1__scsi1__VAL REG_VAL_ENUM
+#define R_PORT_PB_SET__scsi0__scsi0__VAL REG_VAL_ENUM
+#define R_PORT_PB_SET__dir7__dir7__VAL REG_VAL_ENUM
+#define R_PORT_PB_SET__dir6__dir6__VAL REG_VAL_ENUM
+#define R_PORT_PB_SET__dir5__dir5__VAL REG_VAL_ENUM
+#define R_PORT_PB_SET__dir4__dir4__VAL REG_VAL_ENUM
+#define R_PORT_PB_SET__dir3__dir3__VAL REG_VAL_ENUM
+#define R_PORT_PB_SET__dir2__dir2__VAL REG_VAL_ENUM
+#define R_PORT_PB_SET__dir1__dir1__VAL REG_VAL_ENUM
+#define R_PORT_PB_SET__dir0__dir0__VAL REG_VAL_ENUM
+#define R_PORT_PB_SET__data_out__data_out__VAL REG_VAL_VAL
+
+#define R_PORT_PB_SET__syncser3__syncser3__port_cs 0
+#define R_PORT_PB_SET__syncser3__syncser3__ss3extra 1
+#define R_PORT_PB_SET__syncser1__syncser1__port_cs 0
+#define R_PORT_PB_SET__syncser1__syncser1__ss1extra 1
+#define R_PORT_PB_SET__i2c_en__i2c_en__off 0
+#define R_PORT_PB_SET__i2c_en__i2c_en__on 1
+#define R_PORT_PB_SET__i2c_oe___i2c_oe___disable 1
+#define R_PORT_PB_SET__i2c_oe___i2c_oe___enable 0
+#define R_PORT_PB_SET__cs7__cs7__cs 1
+#define R_PORT_PB_SET__cs7__cs7__port 0
+#define R_PORT_PB_SET__cs6__cs6__cs 1
+#define R_PORT_PB_SET__cs6__cs6__port 0
+#define R_PORT_PB_SET__cs5__cs5__cs 1
+#define R_PORT_PB_SET__cs5__cs5__port 0
+#define R_PORT_PB_SET__cs4__cs4__cs 1
+#define R_PORT_PB_SET__cs4__cs4__port 0
+#define R_PORT_PB_SET__cs3__cs3__cs 1
+#define R_PORT_PB_SET__cs3__cs3__port 0
+#define R_PORT_PB_SET__cs2__cs2__cs 1
+#define R_PORT_PB_SET__cs2__cs2__port 0
+#define R_PORT_PB_SET__scsi1__scsi1__enph 1
+#define R_PORT_PB_SET__scsi1__scsi1__port_cs 0
+#define R_PORT_PB_SET__scsi0__scsi0__enph 1
+#define R_PORT_PB_SET__scsi0__scsi0__port_cs 0
+#define R_PORT_PB_SET__dir7__dir7__input 0
+#define R_PORT_PB_SET__dir7__dir7__output 1
+#define R_PORT_PB_SET__dir6__dir6__input 0
+#define R_PORT_PB_SET__dir6__dir6__output 1
+#define R_PORT_PB_SET__dir5__dir5__input 0
+#define R_PORT_PB_SET__dir5__dir5__output 1
+#define R_PORT_PB_SET__dir4__dir4__input 0
+#define R_PORT_PB_SET__dir4__dir4__output 1
+#define R_PORT_PB_SET__dir3__dir3__input 0
+#define R_PORT_PB_SET__dir3__dir3__output 1
+#define R_PORT_PB_SET__dir2__dir2__input 0
+#define R_PORT_PB_SET__dir2__dir2__output 1
+#define R_PORT_PB_SET__dir1__dir1__input 0
+#define R_PORT_PB_SET__dir1__dir1__output 1
+#define R_PORT_PB_SET__dir0__dir0__input 0
+#define R_PORT_PB_SET__dir0__dir0__output 1
+
+#endif
+
+/*
+ * R_PRESCALE_STATUS
+ * - type: RO
+ * - addr: 0xb00000f0
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+#define R_PRESCALE_STATUS__ADDR (REG_TYPECAST_UDWORD 0xb00000f0)
+#define R_PRESCALE_STATUS__SVAL REG_SVAL_SHADOW
+#define R_PRESCALE_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_PRESCALE_STATUS__TYPECAST REG_TYPECAST_UDWORD
+#define R_PRESCALE_STATUS__TYPE (REG_UDWORD)
+#define R_PRESCALE_STATUS__GET REG_GET_RO
+#define R_PRESCALE_STATUS__IGET REG_IGET_RO
+#define R_PRESCALE_STATUS__SET REG_SET_RO
+#define R_PRESCALE_STATUS__ISET REG_ISET_RO
+#define R_PRESCALE_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_PRESCALE_STATUS__EQL REG_EQL_RO
+#define R_PRESCALE_STATUS__IEQL REG_IEQL_RO
+#define R_PRESCALE_STATUS__RD REG_RD_RO
+#define R_PRESCALE_STATUS__IRD REG_IRD_RO
+#define R_PRESCALE_STATUS__WR REG_WR_RO
+#define R_PRESCALE_STATUS__IWR REG_IWR_RO
+
+#define R_PRESCALE_STATUS__READ(addr) \
+ (*(addr))
+
+#define R_PRESCALE_STATUS__ser_status__ser_status__MASK 0xffff0000U
+#define R_PRESCALE_STATUS__tim_status__tim_status__MASK 0x0000ffffU
+
+#define R_PRESCALE_STATUS__ser_status__MAX 0xffff
+#define R_PRESCALE_STATUS__tim_status__MAX 0xffff
+
+#define R_PRESCALE_STATUS__ser_status__MIN 0
+#define R_PRESCALE_STATUS__tim_status__MIN 0
+
+#define R_PRESCALE_STATUS__ser_status__BITNR 16
+#define R_PRESCALE_STATUS__tim_status__BITNR 0
+
+#define R_PRESCALE_STATUS__ser_status__ser_status__VAL REG_VAL_VAL
+#define R_PRESCALE_STATUS__tim_status__tim_status__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_REC_COUNTERS
+ * - type: RO
+ * - addr: 0xb00000a4
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+#define R_REC_COUNTERS__ADDR (REG_TYPECAST_UDWORD 0xb00000a4)
+#define R_REC_COUNTERS__SVAL REG_SVAL_SHADOW
+#define R_REC_COUNTERS__SVAL_I REG_SVAL_I_SHADOW
+#define R_REC_COUNTERS__TYPECAST REG_TYPECAST_UDWORD
+#define R_REC_COUNTERS__TYPE (REG_UDWORD)
+#define R_REC_COUNTERS__GET REG_GET_RO
+#define R_REC_COUNTERS__IGET REG_IGET_RO
+#define R_REC_COUNTERS__SET REG_SET_RO
+#define R_REC_COUNTERS__ISET REG_ISET_RO
+#define R_REC_COUNTERS__SET_VAL REG_SET_VAL_RO
+#define R_REC_COUNTERS__EQL REG_EQL_RO
+#define R_REC_COUNTERS__IEQL REG_IEQL_RO
+#define R_REC_COUNTERS__RD REG_RD_RO
+#define R_REC_COUNTERS__IRD REG_IRD_RO
+#define R_REC_COUNTERS__WR REG_WR_RO
+#define R_REC_COUNTERS__IWR REG_IWR_RO
+
+#define R_REC_COUNTERS__READ(addr) \
+ (*(addr))
+
+#define R_REC_COUNTERS__congestion__congestion__MASK 0xff000000U
+#define R_REC_COUNTERS__oversize__oversize__MASK 0x00ff0000U
+#define R_REC_COUNTERS__alignment_error__alignment_error__MASK 0x0000ff00U
+#define R_REC_COUNTERS__crc_error__crc_error__MASK 0x000000ffU
+
+#define R_REC_COUNTERS__congestion__MAX 0xff
+#define R_REC_COUNTERS__oversize__MAX 0xff
+#define R_REC_COUNTERS__alignment_error__MAX 0xff
+#define R_REC_COUNTERS__crc_error__MAX 0xff
+
+#define R_REC_COUNTERS__congestion__MIN 0
+#define R_REC_COUNTERS__oversize__MIN 0
+#define R_REC_COUNTERS__alignment_error__MIN 0
+#define R_REC_COUNTERS__crc_error__MIN 0
+
+#define R_REC_COUNTERS__congestion__BITNR 24
+#define R_REC_COUNTERS__oversize__BITNR 16
+#define R_REC_COUNTERS__alignment_error__BITNR 8
+#define R_REC_COUNTERS__crc_error__BITNR 0
+
+#define R_REC_COUNTERS__congestion__congestion__VAL REG_VAL_VAL
+#define R_REC_COUNTERS__oversize__oversize__VAL REG_VAL_VAL
+#define R_REC_COUNTERS__alignment_error__alignment_error__VAL REG_VAL_VAL
+#define R_REC_COUNTERS__crc_error__crc_error__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SCSI0_CMD
+ * - type: WO
+ * - addr: 0xb0000042
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+#define R_SCSI0_CMD__ADDR (REG_TYPECAST_BYTE 0xb0000042)
+
+#ifndef REG_NO_SHADOW
+#define R_SCSI0_CMD__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_ATA_CTRL_DATA + 2))
+#define R_SCSI0_CMD__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_ATA_CTRL_DATA + 2))
+#else /* REG_NO_SHADOW */
+#define R_SCSI0_CMD__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_SCSI0_CMD__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SCSI0_CMD__STYPECAST REG_STYPECAST_BYTE
+#define R_SCSI0_CMD__SVAL REG_SVAL_SHADOW
+#define R_SCSI0_CMD__SVAL_I REG_SVAL_I_SHADOW
+#define R_SCSI0_CMD__TYPECAST REG_TYPECAST_BYTE
+#define R_SCSI0_CMD__TYPE (REG_BYTE)
+#define R_SCSI0_CMD__GET REG_GET_WO
+#define R_SCSI0_CMD__IGET REG_IGET_WO
+#define R_SCSI0_CMD__SET REG_SET_WO
+#define R_SCSI0_CMD__ISET REG_ISET_WO
+#define R_SCSI0_CMD__SET_VAL REG_SET_VAL_WO
+#define R_SCSI0_CMD__EQL REG_EQL_WO
+#define R_SCSI0_CMD__IEQL REG_IEQL_WO
+#define R_SCSI0_CMD__RD REG_RD_WO
+#define R_SCSI0_CMD__IRD REG_IRD_WO
+#define R_SCSI0_CMD__WR REG_WR_WO
+#define R_SCSI0_CMD__IWR REG_IWR_WO
+
+#define R_SCSI0_CMD__WRITE(addr,value) \
+ (*(addr) = (value))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_SCSI0_CMD__FIRST 0
+#define R_SCSI0_CMD__IOFFSET 12
+#define R_SCSI0_CMD__LAST 1
+#define R_SCSI0_CMD__OFFSET 16
+#define R_SCSI0_CMD__SOFFSET 12
+/* end */
+
+#define R_SCSI0_CMD__asynch_setup__asynch_setup__MASK 0x000000f0U
+#define R_SCSI0_CMD__command__command__MASK 0x0000000fU
+
+#define R_SCSI0_CMD__asynch_setup__MAX 0xf
+#define R_SCSI0_CMD__command__MAX 0xf
+
+#define R_SCSI0_CMD__asynch_setup__MIN 0
+#define R_SCSI0_CMD__command__MIN 0
+
+#define R_SCSI0_CMD__asynch_setup__BITNR 4
+#define R_SCSI0_CMD__command__BITNR 0
+
+#define R_SCSI0_CMD__asynch_setup__asynch_setup__VAL REG_VAL_VAL
+#define R_SCSI0_CMD__command__command__VAL REG_VAL_ENUM
+
+#define R_SCSI0_CMD__command__command__arb_only 6
+#define R_SCSI0_CMD__command__command__full_din_1 0
+#define R_SCSI0_CMD__command__command__full_din_3 8
+#define R_SCSI0_CMD__command__command__full_dout_1 1
+#define R_SCSI0_CMD__command__command__full_dout_3 9
+#define R_SCSI0_CMD__command__command__full_stat_1 2
+#define R_SCSI0_CMD__command__command__full_stat_3 10
+#define R_SCSI0_CMD__command__command__man_data_in 11
+#define R_SCSI0_CMD__command__command__man_data_out 12
+#define R_SCSI0_CMD__command__command__man_rat 13
+#define R_SCSI0_CMD__command__command__resel_din 3
+#define R_SCSI0_CMD__command__command__resel_dout 4
+#define R_SCSI0_CMD__command__command__resel_stat 5
+
+#endif
+
+/*
+ * R_SCSI0_CMD_DATA
+ * - type: WO
+ * - addr: 0xb0000040
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+#define R_SCSI0_CMD_DATA__ADDR (REG_TYPECAST_UDWORD 0xb0000040)
+
+#ifndef REG_NO_SHADOW
+#define R_SCSI0_CMD_DATA__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_ATA_CTRL_DATA + 0))
+#define R_SCSI0_CMD_DATA__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_ATA_CTRL_DATA + 0))
+#else /* REG_NO_SHADOW */
+#define R_SCSI0_CMD_DATA__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_SCSI0_CMD_DATA__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SCSI0_CMD_DATA__STYPECAST REG_STYPECAST_UDWORD
+#define R_SCSI0_CMD_DATA__SVAL REG_SVAL_SHADOW
+#define R_SCSI0_CMD_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_SCSI0_CMD_DATA__TYPECAST REG_TYPECAST_UDWORD
+#define R_SCSI0_CMD_DATA__TYPE (REG_UDWORD)
+#define R_SCSI0_CMD_DATA__GET REG_GET_WO
+#define R_SCSI0_CMD_DATA__IGET REG_IGET_WO
+#define R_SCSI0_CMD_DATA__SET REG_SET_WO
+#define R_SCSI0_CMD_DATA__ISET REG_ISET_WO
+#define R_SCSI0_CMD_DATA__SET_VAL REG_SET_VAL_WO
+#define R_SCSI0_CMD_DATA__EQL REG_EQL_WO
+#define R_SCSI0_CMD_DATA__IEQL REG_IEQL_WO
+#define R_SCSI0_CMD_DATA__RD REG_RD_WO
+#define R_SCSI0_CMD_DATA__IRD REG_IRD_WO
+#define R_SCSI0_CMD_DATA__WR REG_WR_WO
+#define R_SCSI0_CMD_DATA__IWR REG_IWR_WO
+
+#define R_SCSI0_CMD_DATA__WRITE(addr,value) \
+ (*(addr) = (value))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_SCSI0_CMD_DATA__FIRST 0
+#define R_SCSI0_CMD_DATA__IOFFSET 12
+#define R_SCSI0_CMD_DATA__LAST 1
+#define R_SCSI0_CMD_DATA__OFFSET 16
+#define R_SCSI0_CMD_DATA__SOFFSET 12
+/* end */
+
+#define R_SCSI0_CMD_DATA__parity_in__parity_in__MASK 0x04000000U
+#define R_SCSI0_CMD_DATA__skip__skip__MASK 0x02000000U
+#define R_SCSI0_CMD_DATA__clr_status__clr_status__MASK 0x01000000U
+#define R_SCSI0_CMD_DATA__asynch_setup__asynch_setup__MASK 0x00f00000U
+#define R_SCSI0_CMD_DATA__command__command__MASK 0x000f0000U
+#define R_SCSI0_CMD_DATA__data_out__data_out__MASK 0x0000ffffU
+
+#define R_SCSI0_CMD_DATA__parity_in__MAX 0x1
+#define R_SCSI0_CMD_DATA__skip__MAX 0x1
+#define R_SCSI0_CMD_DATA__clr_status__MAX 0x1
+#define R_SCSI0_CMD_DATA__asynch_setup__MAX 0xf
+#define R_SCSI0_CMD_DATA__command__MAX 0xf
+#define R_SCSI0_CMD_DATA__data_out__MAX 0xffff
+
+#define R_SCSI0_CMD_DATA__parity_in__MIN 0
+#define R_SCSI0_CMD_DATA__skip__MIN 0
+#define R_SCSI0_CMD_DATA__clr_status__MIN 0
+#define R_SCSI0_CMD_DATA__asynch_setup__MIN 0
+#define R_SCSI0_CMD_DATA__command__MIN 0
+#define R_SCSI0_CMD_DATA__data_out__MIN 0
+
+#define R_SCSI0_CMD_DATA__parity_in__BITNR 26
+#define R_SCSI0_CMD_DATA__skip__BITNR 25
+#define R_SCSI0_CMD_DATA__clr_status__BITNR 24
+#define R_SCSI0_CMD_DATA__asynch_setup__BITNR 20
+#define R_SCSI0_CMD_DATA__command__BITNR 16
+#define R_SCSI0_CMD_DATA__data_out__BITNR 0
+
+#define R_SCSI0_CMD_DATA__parity_in__parity_in__VAL REG_VAL_ENUM
+#define R_SCSI0_CMD_DATA__skip__skip__VAL REG_VAL_ENUM
+#define R_SCSI0_CMD_DATA__clr_status__clr_status__VAL REG_VAL_ENUM
+#define R_SCSI0_CMD_DATA__asynch_setup__asynch_setup__VAL REG_VAL_VAL
+#define R_SCSI0_CMD_DATA__command__command__VAL REG_VAL_ENUM
+#define R_SCSI0_CMD_DATA__data_out__data_out__VAL REG_VAL_VAL
+
+#define R_SCSI0_CMD_DATA__parity_in__parity_in__off 1
+#define R_SCSI0_CMD_DATA__parity_in__parity_in__on 0
+#define R_SCSI0_CMD_DATA__skip__skip__off 0
+#define R_SCSI0_CMD_DATA__skip__skip__on 1
+#define R_SCSI0_CMD_DATA__clr_status__clr_status__nop 0
+#define R_SCSI0_CMD_DATA__clr_status__clr_status__yes 1
+#define R_SCSI0_CMD_DATA__command__command__arb_only 6
+#define R_SCSI0_CMD_DATA__command__command__full_din_1 0
+#define R_SCSI0_CMD_DATA__command__command__full_din_3 8
+#define R_SCSI0_CMD_DATA__command__command__full_dout_1 1
+#define R_SCSI0_CMD_DATA__command__command__full_dout_3 9
+#define R_SCSI0_CMD_DATA__command__command__full_stat_1 2
+#define R_SCSI0_CMD_DATA__command__command__full_stat_3 10
+#define R_SCSI0_CMD_DATA__command__command__man_data_in 11
+#define R_SCSI0_CMD_DATA__command__command__man_data_out 12
+#define R_SCSI0_CMD_DATA__command__command__man_rat 13
+#define R_SCSI0_CMD_DATA__command__command__resel_din 3
+#define R_SCSI0_CMD_DATA__command__command__resel_dout 4
+#define R_SCSI0_CMD_DATA__command__command__resel_stat 5
+
+#endif
+
+/*
+ * R_SCSI0_CTRL
+ * - type: WO
+ * - addr: 0xb0000044
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+#define R_SCSI0_CTRL__ADDR (REG_TYPECAST_UDWORD 0xb0000044)
+
+#ifndef REG_NO_SHADOW
+#define R_SCSI0_CTRL__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_ATA_CONFIG + 0))
+#define R_SCSI0_CTRL__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_ATA_CONFIG + 0))
+#else /* REG_NO_SHADOW */
+#define R_SCSI0_CTRL__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_SCSI0_CTRL__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SCSI0_CTRL__STYPECAST REG_STYPECAST_UDWORD
+#define R_SCSI0_CTRL__SVAL REG_SVAL_SHADOW
+#define R_SCSI0_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_SCSI0_CTRL__TYPECAST REG_TYPECAST_UDWORD
+#define R_SCSI0_CTRL__TYPE (REG_UDWORD)
+#define R_SCSI0_CTRL__GET REG_GET_WO
+#define R_SCSI0_CTRL__IGET REG_IGET_WO
+#define R_SCSI0_CTRL__SET REG_SET_WO
+#define R_SCSI0_CTRL__ISET REG_ISET_WO
+#define R_SCSI0_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_SCSI0_CTRL__EQL REG_EQL_WO
+#define R_SCSI0_CTRL__IEQL REG_IEQL_WO
+#define R_SCSI0_CTRL__RD REG_RD_WO
+#define R_SCSI0_CTRL__IRD REG_IRD_WO
+#define R_SCSI0_CTRL__WR REG_WR_WO
+#define R_SCSI0_CTRL__IWR REG_IWR_WO
+
+#define R_SCSI0_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_SCSI0_CTRL__FIRST 0
+#define R_SCSI0_CTRL__IOFFSET 12
+#define R_SCSI0_CTRL__LAST 1
+#define R_SCSI0_CTRL__OFFSET 16
+#define R_SCSI0_CTRL__SOFFSET 12
+/* end */
+
+#define R_SCSI0_CTRL__id_type__id_type__MASK 0x80000000U
+#define R_SCSI0_CTRL__sel_timeout__sel_timeout__MASK 0x7f000000U
+#define R_SCSI0_CTRL__synch_per__synch_per__MASK 0x00ff0000U
+#define R_SCSI0_CTRL__rst__rst__MASK 0x00008000U
+#define R_SCSI0_CTRL__atn__atn__MASK 0x00004000U
+#define R_SCSI0_CTRL__my_id__my_id__MASK 0x00001e00U
+#define R_SCSI0_CTRL__target_id__target_id__MASK 0x000000f0U
+#define R_SCSI0_CTRL__fast_20__fast_20__MASK 0x00000008U
+#define R_SCSI0_CTRL__bus_width__bus_width__MASK 0x00000004U
+#define R_SCSI0_CTRL__synch__synch__MASK 0x00000002U
+#define R_SCSI0_CTRL__enable__enable__MASK 0x00000001U
+
+#define R_SCSI0_CTRL__id_type__MAX 0x1
+#define R_SCSI0_CTRL__sel_timeout__MAX 0x7f
+#define R_SCSI0_CTRL__synch_per__MAX 0xff
+#define R_SCSI0_CTRL__rst__MAX 0x1
+#define R_SCSI0_CTRL__atn__MAX 0x1
+#define R_SCSI0_CTRL__my_id__MAX 0xf
+#define R_SCSI0_CTRL__target_id__MAX 0xf
+#define R_SCSI0_CTRL__fast_20__MAX 0x1
+#define R_SCSI0_CTRL__bus_width__MAX 0x1
+#define R_SCSI0_CTRL__synch__MAX 0x1
+#define R_SCSI0_CTRL__enable__MAX 0x1
+
+#define R_SCSI0_CTRL__id_type__MIN 0
+#define R_SCSI0_CTRL__sel_timeout__MIN 0
+#define R_SCSI0_CTRL__synch_per__MIN 0
+#define R_SCSI0_CTRL__rst__MIN 0
+#define R_SCSI0_CTRL__atn__MIN 0
+#define R_SCSI0_CTRL__my_id__MIN 0
+#define R_SCSI0_CTRL__target_id__MIN 0
+#define R_SCSI0_CTRL__fast_20__MIN 0
+#define R_SCSI0_CTRL__bus_width__MIN 0
+#define R_SCSI0_CTRL__synch__MIN 0
+#define R_SCSI0_CTRL__enable__MIN 0
+
+#define R_SCSI0_CTRL__id_type__BITNR 31
+#define R_SCSI0_CTRL__sel_timeout__BITNR 24
+#define R_SCSI0_CTRL__synch_per__BITNR 16
+#define R_SCSI0_CTRL__rst__BITNR 15
+#define R_SCSI0_CTRL__atn__BITNR 14
+#define R_SCSI0_CTRL__my_id__BITNR 9
+#define R_SCSI0_CTRL__target_id__BITNR 4
+#define R_SCSI0_CTRL__fast_20__BITNR 3
+#define R_SCSI0_CTRL__bus_width__BITNR 2
+#define R_SCSI0_CTRL__synch__BITNR 1
+#define R_SCSI0_CTRL__enable__BITNR 0
+
+#define R_SCSI0_CTRL__id_type__id_type__VAL REG_VAL_ENUM
+#define R_SCSI0_CTRL__sel_timeout__sel_timeout__VAL REG_VAL_VAL
+#define R_SCSI0_CTRL__synch_per__synch_per__VAL REG_VAL_VAL
+#define R_SCSI0_CTRL__rst__rst__VAL REG_VAL_ENUM
+#define R_SCSI0_CTRL__atn__atn__VAL REG_VAL_ENUM
+#define R_SCSI0_CTRL__my_id__my_id__VAL REG_VAL_VAL
+#define R_SCSI0_CTRL__target_id__target_id__VAL REG_VAL_VAL
+#define R_SCSI0_CTRL__fast_20__fast_20__VAL REG_VAL_ENUM
+#define R_SCSI0_CTRL__bus_width__bus_width__VAL REG_VAL_ENUM
+#define R_SCSI0_CTRL__synch__synch__VAL REG_VAL_ENUM
+#define R_SCSI0_CTRL__enable__enable__VAL REG_VAL_ENUM
+
+#define R_SCSI0_CTRL__id_type__id_type__hardware 0
+#define R_SCSI0_CTRL__id_type__id_type__software 1
+#define R_SCSI0_CTRL__rst__rst__no 0
+#define R_SCSI0_CTRL__rst__rst__yes 1
+#define R_SCSI0_CTRL__atn__atn__no 0
+#define R_SCSI0_CTRL__atn__atn__yes 1
+#define R_SCSI0_CTRL__fast_20__fast_20__no 0
+#define R_SCSI0_CTRL__fast_20__fast_20__yes 1
+#define R_SCSI0_CTRL__bus_width__bus_width__narrow 0
+#define R_SCSI0_CTRL__bus_width__bus_width__wide 1
+#define R_SCSI0_CTRL__synch__synch__asynch 0
+#define R_SCSI0_CTRL__synch__synch__synch 1
+#define R_SCSI0_CTRL__enable__enable__off 0
+#define R_SCSI0_CTRL__enable__enable__on 1
+
+#endif
+
+/*
+ * R_SCSI0_DATA
+ * - type: WO
+ * - addr: 0xb0000040
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+#define R_SCSI0_DATA__ADDR (REG_TYPECAST_UWORD 0xb0000040)
+
+#ifndef REG_NO_SHADOW
+#define R_SCSI0_DATA__SADDR (REG_STYPECAST_UWORD (reg_shadow__hwregs.R_ATA_CTRL_DATA + 0))
+#define R_SCSI0_DATA__IADDR (REG_STYPECAST_UWORD (reg_initiated__hwregs.R_ATA_CTRL_DATA + 0))
+#else /* REG_NO_SHADOW */
+#define R_SCSI0_DATA__SADDR (REG_STYPECAST_UWORD (®_shadow__hwregs))
+#define R_SCSI0_DATA__IADDR (REG_STYPECAST_UWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SCSI0_DATA__STYPECAST REG_STYPECAST_UWORD
+#define R_SCSI0_DATA__SVAL REG_SVAL_SHADOW
+#define R_SCSI0_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_SCSI0_DATA__TYPECAST REG_TYPECAST_UWORD
+#define R_SCSI0_DATA__TYPE (REG_UWORD)
+#define R_SCSI0_DATA__GET REG_GET_WO
+#define R_SCSI0_DATA__IGET REG_IGET_WO
+#define R_SCSI0_DATA__SET REG_SET_WO
+#define R_SCSI0_DATA__ISET REG_ISET_WO
+#define R_SCSI0_DATA__SET_VAL REG_SET_VAL_WO
+#define R_SCSI0_DATA__EQL REG_EQL_WO
+#define R_SCSI0_DATA__IEQL REG_IEQL_WO
+#define R_SCSI0_DATA__RD REG_RD_WO
+#define R_SCSI0_DATA__IRD REG_IRD_WO
+#define R_SCSI0_DATA__WR REG_WR_WO
+#define R_SCSI0_DATA__IWR REG_IWR_WO
+
+#define R_SCSI0_DATA__WRITE(addr,value) \
+ (*(addr) = (value))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_SCSI0_DATA__FIRST 0
+#define R_SCSI0_DATA__IOFFSET 12
+#define R_SCSI0_DATA__LAST 1
+#define R_SCSI0_DATA__OFFSET 16
+#define R_SCSI0_DATA__SOFFSET 12
+/* end */
+
+#define R_SCSI0_DATA__data_out__data_out__MASK 0x0000ffffU
+
+#define R_SCSI0_DATA__data_out__MAX 0xffff
+
+#define R_SCSI0_DATA__data_out__MIN 0
+
+#define R_SCSI0_DATA__data_out__BITNR 0
+
+#define R_SCSI0_DATA__data_out__data_out__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SCSI0_DATA_IN
+ * - type: RO
+ * - addr: 0xb0000040
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+#define R_SCSI0_DATA_IN__ADDR (REG_TYPECAST_UWORD 0xb0000040)
+#define R_SCSI0_DATA_IN__SVAL REG_SVAL_SHADOW
+#define R_SCSI0_DATA_IN__SVAL_I REG_SVAL_I_SHADOW
+#define R_SCSI0_DATA_IN__TYPECAST REG_TYPECAST_UWORD
+#define R_SCSI0_DATA_IN__TYPE (REG_UWORD)
+#define R_SCSI0_DATA_IN__GET REG_GET_RO
+#define R_SCSI0_DATA_IN__IGET REG_IGET_RO
+#define R_SCSI0_DATA_IN__SET REG_SET_RO
+#define R_SCSI0_DATA_IN__ISET REG_ISET_RO
+#define R_SCSI0_DATA_IN__SET_VAL REG_SET_VAL_RO
+#define R_SCSI0_DATA_IN__EQL REG_EQL_RO
+#define R_SCSI0_DATA_IN__IEQL REG_IEQL_RO
+#define R_SCSI0_DATA_IN__RD REG_RD_RO
+#define R_SCSI0_DATA_IN__IRD REG_IRD_RO
+#define R_SCSI0_DATA_IN__WR REG_WR_RO
+#define R_SCSI0_DATA_IN__IWR REG_IWR_RO
+
+#define R_SCSI0_DATA_IN__READ(addr) \
+ (*(addr))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_SCSI0_DATA_IN__FIRST 0
+#define R_SCSI0_DATA_IN__LAST 1
+#define R_SCSI0_DATA_IN__OFFSET 16
+/* end */
+
+#define R_SCSI0_DATA_IN__data_in__data_in__MASK 0x0000ffffU
+
+#define R_SCSI0_DATA_IN__data_in__MAX 0xffff
+
+#define R_SCSI0_DATA_IN__data_in__MIN 0
+
+#define R_SCSI0_DATA_IN__data_in__BITNR 0
+
+#define R_SCSI0_DATA_IN__data_in__data_in__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SCSI0_STATUS
+ * - type: RO
+ * - addr: 0xb0000048
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+#define R_SCSI0_STATUS__ADDR (REG_TYPECAST_UDWORD 0xb0000048)
+#define R_SCSI0_STATUS__SVAL REG_SVAL_SHADOW
+#define R_SCSI0_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_SCSI0_STATUS__TYPECAST REG_TYPECAST_UDWORD
+#define R_SCSI0_STATUS__TYPE (REG_UDWORD)
+#define R_SCSI0_STATUS__GET REG_GET_RO
+#define R_SCSI0_STATUS__IGET REG_IGET_RO
+#define R_SCSI0_STATUS__SET REG_SET_RO
+#define R_SCSI0_STATUS__ISET REG_ISET_RO
+#define R_SCSI0_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_SCSI0_STATUS__EQL REG_EQL_RO
+#define R_SCSI0_STATUS__IEQL REG_IEQL_RO
+#define R_SCSI0_STATUS__RD REG_RD_RO
+#define R_SCSI0_STATUS__IRD REG_IRD_RO
+#define R_SCSI0_STATUS__WR REG_WR_RO
+#define R_SCSI0_STATUS__IWR REG_IWR_RO
+
+#define R_SCSI0_STATUS__READ(addr) \
+ (*(addr))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_SCSI0_STATUS__FIRST 0
+#define R_SCSI0_STATUS__LAST 1
+#define R_SCSI0_STATUS__OFFSET 16
+/* end */
+
+#define R_SCSI0_STATUS__tst_arb_won__tst_arb_won__MASK 0x00800000U
+#define R_SCSI0_STATUS__tst_resel__tst_resel__MASK 0x00400000U
+#define R_SCSI0_STATUS__parity_error__parity_error__MASK 0x00200000U
+#define R_SCSI0_STATUS__bus_reset__bus_reset__MASK 0x00100000U
+#define R_SCSI0_STATUS__resel_target__resel_target__MASK 0x00078000U
+#define R_SCSI0_STATUS__resel__resel__MASK 0x00004000U
+#define R_SCSI0_STATUS__curr_phase__curr_phase__MASK 0x00003800U
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__MASK 0x000007c0U
+#define R_SCSI0_STATUS__valid_status__valid_status__MASK 0x00000020U
+#define R_SCSI0_STATUS__seq_status__seq_status__MASK 0x0000001fU
+
+#define R_SCSI0_STATUS__tst_arb_won__MAX 0x1
+#define R_SCSI0_STATUS__tst_resel__MAX 0x1
+#define R_SCSI0_STATUS__parity_error__MAX 0x1
+#define R_SCSI0_STATUS__bus_reset__MAX 0x1
+#define R_SCSI0_STATUS__resel_target__MAX 0xf
+#define R_SCSI0_STATUS__resel__MAX 0x1
+#define R_SCSI0_STATUS__curr_phase__MAX 0x7
+#define R_SCSI0_STATUS__last_seq_step__MAX 0x1f
+#define R_SCSI0_STATUS__valid_status__MAX 0x1
+#define R_SCSI0_STATUS__seq_status__MAX 0x1f
+
+#define R_SCSI0_STATUS__tst_arb_won__MIN 0
+#define R_SCSI0_STATUS__tst_resel__MIN 0
+#define R_SCSI0_STATUS__parity_error__MIN 0
+#define R_SCSI0_STATUS__bus_reset__MIN 0
+#define R_SCSI0_STATUS__resel_target__MIN 0
+#define R_SCSI0_STATUS__resel__MIN 0
+#define R_SCSI0_STATUS__curr_phase__MIN 0
+#define R_SCSI0_STATUS__last_seq_step__MIN 0
+#define R_SCSI0_STATUS__valid_status__MIN 0
+#define R_SCSI0_STATUS__seq_status__MIN 0
+
+#define R_SCSI0_STATUS__tst_arb_won__BITNR 23
+#define R_SCSI0_STATUS__tst_resel__BITNR 22
+#define R_SCSI0_STATUS__parity_error__BITNR 21
+#define R_SCSI0_STATUS__bus_reset__BITNR 20
+#define R_SCSI0_STATUS__resel_target__BITNR 15
+#define R_SCSI0_STATUS__resel__BITNR 14
+#define R_SCSI0_STATUS__curr_phase__BITNR 11
+#define R_SCSI0_STATUS__last_seq_step__BITNR 6
+#define R_SCSI0_STATUS__valid_status__BITNR 5
+#define R_SCSI0_STATUS__seq_status__BITNR 0
+
+#define R_SCSI0_STATUS__tst_arb_won__tst_arb_won__VAL REG_VAL_VAL
+#define R_SCSI0_STATUS__tst_resel__tst_resel__VAL REG_VAL_VAL
+#define R_SCSI0_STATUS__parity_error__parity_error__VAL REG_VAL_VAL
+#define R_SCSI0_STATUS__bus_reset__bus_reset__VAL REG_VAL_ENUM
+#define R_SCSI0_STATUS__resel_target__resel_target__VAL REG_VAL_VAL
+#define R_SCSI0_STATUS__resel__resel__VAL REG_VAL_ENUM
+#define R_SCSI0_STATUS__curr_phase__curr_phase__VAL REG_VAL_ENUM
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__VAL REG_VAL_ENUM
+#define R_SCSI0_STATUS__valid_status__valid_status__VAL REG_VAL_ENUM
+#define R_SCSI0_STATUS__seq_status__seq_status__VAL REG_VAL_ENUM
+
+#define R_SCSI0_STATUS__bus_reset__bus_reset__no 0
+#define R_SCSI0_STATUS__bus_reset__bus_reset__yes 1
+#define R_SCSI0_STATUS__resel__resel__no 0
+#define R_SCSI0_STATUS__resel__resel__yes 1
+#define R_SCSI0_STATUS__curr_phase__curr_phase__ph_command 2
+#define R_SCSI0_STATUS__curr_phase__curr_phase__ph_data_in 5
+#define R_SCSI0_STATUS__curr_phase__curr_phase__ph_data_out 4
+#define R_SCSI0_STATUS__curr_phase__curr_phase__ph_msg_in 7
+#define R_SCSI0_STATUS__curr_phase__curr_phase__ph_msg_out 6
+#define R_SCSI0_STATUS__curr_phase__curr_phase__ph_resel 1
+#define R_SCSI0_STATUS__curr_phase__curr_phase__ph_status 3
+#define R_SCSI0_STATUS__curr_phase__curr_phase__ph_undef 0
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_answer 3
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_arbitrate 8
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_asynch_din 9
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_asynch_dout 25
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_asynch_dout_end 11
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_bus_free 24
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_cc 31
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_iwr 27
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_iwr_cc 23
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_iwr_good 14
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_manual 28
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_manual_din_prot 18
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_manual_req 10
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_msg_1 2
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_msg_2 6
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_msg_3 22
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_resel_req 29
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_sdp_disc 7
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_synch_din 13
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_synch_din_ack 12
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_synch_din_ack_perr 5
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_synch_din_perr 1
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_synch_dout 0
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_synch_dout_ack 4
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_transf_cmd 30
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_transfer_done 15
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_wait_free_cc 20
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_wait_free_disc 21
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_wait_free_iwr_cc 17
+#define R_SCSI0_STATUS__last_seq_step__last_seq_step__st_wait_free_sdp_disc 16
+#define R_SCSI0_STATUS__valid_status__valid_status__no 0
+#define R_SCSI0_STATUS__valid_status__valid_status__yes 1
+#define R_SCSI0_STATUS__seq_status__seq_status__info_arb_lost 4
+#define R_SCSI0_STATUS__seq_status__seq_status__info_bus_free 13
+#define R_SCSI0_STATUS__seq_status__seq_status__info_bus_reset 11
+#define R_SCSI0_STATUS__seq_status__seq_status__info_illegal_bf 12
+#define R_SCSI0_STATUS__seq_status__seq_status__info_illegal_op 7
+#define R_SCSI0_STATUS__seq_status__seq_status__info_parity_error 1
+#define R_SCSI0_STATUS__seq_status__seq_status__info_rec_recvd 8
+#define R_SCSI0_STATUS__seq_status__seq_status__info_reselected 9
+#define R_SCSI0_STATUS__seq_status__seq_status__info_sel_timeout 5
+#define R_SCSI0_STATUS__seq_status__seq_status__info_seq_complete 0
+#define R_SCSI0_STATUS__seq_status__seq_status__info_unexp_bf 6
+#define R_SCSI0_STATUS__seq_status__seq_status__info_unexp_ph_change 3
+#define R_SCSI0_STATUS__seq_status__seq_status__info_unhandled_msg_in 2
+#define R_SCSI0_STATUS__seq_status__seq_status__info_unhandled_status 10
+
+#endif
+
+/*
+ * R_SCSI0_STATUS_CTRL
+ * - type: WO
+ * - addr: 0xb0000043
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+#define R_SCSI0_STATUS_CTRL__ADDR (REG_TYPECAST_BYTE 0xb0000043)
+
+#ifndef REG_NO_SHADOW
+#define R_SCSI0_STATUS_CTRL__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_ATA_CTRL_DATA + 3))
+#define R_SCSI0_STATUS_CTRL__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_ATA_CTRL_DATA + 3))
+#else /* REG_NO_SHADOW */
+#define R_SCSI0_STATUS_CTRL__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_SCSI0_STATUS_CTRL__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SCSI0_STATUS_CTRL__STYPECAST REG_STYPECAST_BYTE
+#define R_SCSI0_STATUS_CTRL__SVAL REG_SVAL_SHADOW
+#define R_SCSI0_STATUS_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_SCSI0_STATUS_CTRL__TYPECAST REG_TYPECAST_BYTE
+#define R_SCSI0_STATUS_CTRL__TYPE (REG_BYTE)
+#define R_SCSI0_STATUS_CTRL__GET REG_GET_WO
+#define R_SCSI0_STATUS_CTRL__IGET REG_IGET_WO
+#define R_SCSI0_STATUS_CTRL__SET REG_SET_WO
+#define R_SCSI0_STATUS_CTRL__ISET REG_ISET_WO
+#define R_SCSI0_STATUS_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_SCSI0_STATUS_CTRL__EQL REG_EQL_WO
+#define R_SCSI0_STATUS_CTRL__IEQL REG_IEQL_WO
+#define R_SCSI0_STATUS_CTRL__RD REG_RD_WO
+#define R_SCSI0_STATUS_CTRL__IRD REG_IRD_WO
+#define R_SCSI0_STATUS_CTRL__WR REG_WR_WO
+#define R_SCSI0_STATUS_CTRL__IWR REG_IWR_WO
+
+#define R_SCSI0_STATUS_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_SCSI0_STATUS_CTRL__FIRST 0
+#define R_SCSI0_STATUS_CTRL__IOFFSET 12
+#define R_SCSI0_STATUS_CTRL__LAST 1
+#define R_SCSI0_STATUS_CTRL__OFFSET 16
+#define R_SCSI0_STATUS_CTRL__SOFFSET 12
+/* end */
+
+#define R_SCSI0_STATUS_CTRL__parity_in__parity_in__MASK 0x00000004U
+#define R_SCSI0_STATUS_CTRL__skip__skip__MASK 0x00000002U
+#define R_SCSI0_STATUS_CTRL__clr_status__clr_status__MASK 0x00000001U
+
+#define R_SCSI0_STATUS_CTRL__parity_in__MAX 0x1
+#define R_SCSI0_STATUS_CTRL__skip__MAX 0x1
+#define R_SCSI0_STATUS_CTRL__clr_status__MAX 0x1
+
+#define R_SCSI0_STATUS_CTRL__parity_in__MIN 0
+#define R_SCSI0_STATUS_CTRL__skip__MIN 0
+#define R_SCSI0_STATUS_CTRL__clr_status__MIN 0
+
+#define R_SCSI0_STATUS_CTRL__parity_in__BITNR 2
+#define R_SCSI0_STATUS_CTRL__skip__BITNR 1
+#define R_SCSI0_STATUS_CTRL__clr_status__BITNR 0
+
+#define R_SCSI0_STATUS_CTRL__parity_in__parity_in__VAL REG_VAL_ENUM
+#define R_SCSI0_STATUS_CTRL__skip__skip__VAL REG_VAL_ENUM
+#define R_SCSI0_STATUS_CTRL__clr_status__clr_status__VAL REG_VAL_ENUM
+
+#define R_SCSI0_STATUS_CTRL__parity_in__parity_in__off 1
+#define R_SCSI0_STATUS_CTRL__parity_in__parity_in__on 0
+#define R_SCSI0_STATUS_CTRL__skip__skip__off 0
+#define R_SCSI0_STATUS_CTRL__skip__skip__on 1
+#define R_SCSI0_STATUS_CTRL__clr_status__clr_status__nop 0
+#define R_SCSI0_STATUS_CTRL__clr_status__clr_status__yes 1
+
+#endif
+
+/*
+ * R_SCSI1_CMD
+ * - type: WO
+ * - addr: 0xb0000052
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+#define R_SCSI1_CMD__ADDR (REG_TYPECAST_BYTE 0xb0000052)
+
+#ifndef REG_NO_SHADOW
+#define R_SCSI1_CMD__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_PAR1_CTRL_DATA + 2))
+#define R_SCSI1_CMD__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_PAR1_CTRL_DATA + 2))
+#else /* REG_NO_SHADOW */
+#define R_SCSI1_CMD__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_SCSI1_CMD__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SCSI1_CMD__STYPECAST REG_STYPECAST_BYTE
+#define R_SCSI1_CMD__SVAL REG_SVAL_SHADOW
+#define R_SCSI1_CMD__SVAL_I REG_SVAL_I_SHADOW
+#define R_SCSI1_CMD__TYPECAST REG_TYPECAST_BYTE
+#define R_SCSI1_CMD__TYPE (REG_BYTE)
+#define R_SCSI1_CMD__GET REG_GET_WO
+#define R_SCSI1_CMD__IGET REG_IGET_WO
+#define R_SCSI1_CMD__SET REG_SET_WO
+#define R_SCSI1_CMD__ISET REG_ISET_WO
+#define R_SCSI1_CMD__SET_VAL REG_SET_VAL_WO
+#define R_SCSI1_CMD__EQL REG_EQL_WO
+#define R_SCSI1_CMD__IEQL REG_IEQL_WO
+#define R_SCSI1_CMD__RD REG_RD_WO
+#define R_SCSI1_CMD__IRD REG_IRD_WO
+#define R_SCSI1_CMD__WR REG_WR_WO
+#define R_SCSI1_CMD__IWR REG_IWR_WO
+
+#define R_SCSI1_CMD__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SCSI1_CMD__asynch_setup__asynch_setup__MASK 0x000000f0U
+#define R_SCSI1_CMD__command__command__MASK 0x0000000fU
+
+#define R_SCSI1_CMD__asynch_setup__MAX 0xf
+#define R_SCSI1_CMD__command__MAX 0xf
+
+#define R_SCSI1_CMD__asynch_setup__MIN 0
+#define R_SCSI1_CMD__command__MIN 0
+
+#define R_SCSI1_CMD__asynch_setup__BITNR 4
+#define R_SCSI1_CMD__command__BITNR 0
+
+#define R_SCSI1_CMD__asynch_setup__asynch_setup__VAL REG_VAL_VAL
+#define R_SCSI1_CMD__command__command__VAL REG_VAL_ENUM
+
+#define R_SCSI1_CMD__command__command__arb_only 6
+#define R_SCSI1_CMD__command__command__full_din_1 0
+#define R_SCSI1_CMD__command__command__full_din_3 8
+#define R_SCSI1_CMD__command__command__full_dout_1 1
+#define R_SCSI1_CMD__command__command__full_dout_3 9
+#define R_SCSI1_CMD__command__command__full_stat_1 2
+#define R_SCSI1_CMD__command__command__full_stat_3 10
+#define R_SCSI1_CMD__command__command__man_data_in 11
+#define R_SCSI1_CMD__command__command__man_data_out 12
+#define R_SCSI1_CMD__command__command__man_rat 13
+#define R_SCSI1_CMD__command__command__resel_din 3
+#define R_SCSI1_CMD__command__command__resel_dout 4
+#define R_SCSI1_CMD__command__command__resel_stat 5
+
+#endif
+
+/*
+ * R_SCSI1_CMD_DATA
+ * - type: WO
+ * - addr: 0xb0000050
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+#define R_SCSI1_CMD_DATA__ADDR (REG_TYPECAST_UDWORD 0xb0000050)
+
+#ifndef REG_NO_SHADOW
+#define R_SCSI1_CMD_DATA__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_PAR1_CTRL_DATA + 0))
+#define R_SCSI1_CMD_DATA__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_PAR1_CTRL_DATA + 0))
+#else /* REG_NO_SHADOW */
+#define R_SCSI1_CMD_DATA__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_SCSI1_CMD_DATA__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SCSI1_CMD_DATA__STYPECAST REG_STYPECAST_UDWORD
+#define R_SCSI1_CMD_DATA__SVAL REG_SVAL_SHADOW
+#define R_SCSI1_CMD_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_SCSI1_CMD_DATA__TYPECAST REG_TYPECAST_UDWORD
+#define R_SCSI1_CMD_DATA__TYPE (REG_UDWORD)
+#define R_SCSI1_CMD_DATA__GET REG_GET_WO
+#define R_SCSI1_CMD_DATA__IGET REG_IGET_WO
+#define R_SCSI1_CMD_DATA__SET REG_SET_WO
+#define R_SCSI1_CMD_DATA__ISET REG_ISET_WO
+#define R_SCSI1_CMD_DATA__SET_VAL REG_SET_VAL_WO
+#define R_SCSI1_CMD_DATA__EQL REG_EQL_WO
+#define R_SCSI1_CMD_DATA__IEQL REG_IEQL_WO
+#define R_SCSI1_CMD_DATA__RD REG_RD_WO
+#define R_SCSI1_CMD_DATA__IRD REG_IRD_WO
+#define R_SCSI1_CMD_DATA__WR REG_WR_WO
+#define R_SCSI1_CMD_DATA__IWR REG_IWR_WO
+
+#define R_SCSI1_CMD_DATA__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SCSI1_CMD_DATA__parity_in__parity_in__MASK 0x04000000U
+#define R_SCSI1_CMD_DATA__skip__skip__MASK 0x02000000U
+#define R_SCSI1_CMD_DATA__clr_status__clr_status__MASK 0x01000000U
+#define R_SCSI1_CMD_DATA__asynch_setup__asynch_setup__MASK 0x00f00000U
+#define R_SCSI1_CMD_DATA__command__command__MASK 0x000f0000U
+#define R_SCSI1_CMD_DATA__data_out__data_out__MASK 0x0000ffffU
+
+#define R_SCSI1_CMD_DATA__parity_in__MAX 0x1
+#define R_SCSI1_CMD_DATA__skip__MAX 0x1
+#define R_SCSI1_CMD_DATA__clr_status__MAX 0x1
+#define R_SCSI1_CMD_DATA__asynch_setup__MAX 0xf
+#define R_SCSI1_CMD_DATA__command__MAX 0xf
+#define R_SCSI1_CMD_DATA__data_out__MAX 0xffff
+
+#define R_SCSI1_CMD_DATA__parity_in__MIN 0
+#define R_SCSI1_CMD_DATA__skip__MIN 0
+#define R_SCSI1_CMD_DATA__clr_status__MIN 0
+#define R_SCSI1_CMD_DATA__asynch_setup__MIN 0
+#define R_SCSI1_CMD_DATA__command__MIN 0
+#define R_SCSI1_CMD_DATA__data_out__MIN 0
+
+#define R_SCSI1_CMD_DATA__parity_in__BITNR 26
+#define R_SCSI1_CMD_DATA__skip__BITNR 25
+#define R_SCSI1_CMD_DATA__clr_status__BITNR 24
+#define R_SCSI1_CMD_DATA__asynch_setup__BITNR 20
+#define R_SCSI1_CMD_DATA__command__BITNR 16
+#define R_SCSI1_CMD_DATA__data_out__BITNR 0
+
+#define R_SCSI1_CMD_DATA__parity_in__parity_in__VAL REG_VAL_ENUM
+#define R_SCSI1_CMD_DATA__skip__skip__VAL REG_VAL_ENUM
+#define R_SCSI1_CMD_DATA__clr_status__clr_status__VAL REG_VAL_ENUM
+#define R_SCSI1_CMD_DATA__asynch_setup__asynch_setup__VAL REG_VAL_VAL
+#define R_SCSI1_CMD_DATA__command__command__VAL REG_VAL_ENUM
+#define R_SCSI1_CMD_DATA__data_out__data_out__VAL REG_VAL_VAL
+
+#define R_SCSI1_CMD_DATA__parity_in__parity_in__off 1
+#define R_SCSI1_CMD_DATA__parity_in__parity_in__on 0
+#define R_SCSI1_CMD_DATA__skip__skip__off 0
+#define R_SCSI1_CMD_DATA__skip__skip__on 1
+#define R_SCSI1_CMD_DATA__clr_status__clr_status__nop 0
+#define R_SCSI1_CMD_DATA__clr_status__clr_status__yes 1
+#define R_SCSI1_CMD_DATA__command__command__arb_only 6
+#define R_SCSI1_CMD_DATA__command__command__full_din_1 0
+#define R_SCSI1_CMD_DATA__command__command__full_din_3 8
+#define R_SCSI1_CMD_DATA__command__command__full_dout_1 1
+#define R_SCSI1_CMD_DATA__command__command__full_dout_3 9
+#define R_SCSI1_CMD_DATA__command__command__full_stat_1 2
+#define R_SCSI1_CMD_DATA__command__command__full_stat_3 10
+#define R_SCSI1_CMD_DATA__command__command__man_data_in 11
+#define R_SCSI1_CMD_DATA__command__command__man_data_out 12
+#define R_SCSI1_CMD_DATA__command__command__man_rat 13
+#define R_SCSI1_CMD_DATA__command__command__resel_din 3
+#define R_SCSI1_CMD_DATA__command__command__resel_dout 4
+#define R_SCSI1_CMD_DATA__command__command__resel_stat 5
+
+#endif
+
+/*
+ * R_SCSI1_CTRL
+ * - type: WO
+ * - addr: 0xb0000054
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+#define R_SCSI1_CTRL__ADDR (REG_TYPECAST_UDWORD 0xb0000054)
+
+#ifndef REG_NO_SHADOW
+#define R_SCSI1_CTRL__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_PAR1_CONFIG + 0))
+#define R_SCSI1_CTRL__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_PAR1_CONFIG + 0))
+#else /* REG_NO_SHADOW */
+#define R_SCSI1_CTRL__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_SCSI1_CTRL__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SCSI1_CTRL__STYPECAST REG_STYPECAST_UDWORD
+#define R_SCSI1_CTRL__SVAL REG_SVAL_SHADOW
+#define R_SCSI1_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_SCSI1_CTRL__TYPECAST REG_TYPECAST_UDWORD
+#define R_SCSI1_CTRL__TYPE (REG_UDWORD)
+#define R_SCSI1_CTRL__GET REG_GET_WO
+#define R_SCSI1_CTRL__IGET REG_IGET_WO
+#define R_SCSI1_CTRL__SET REG_SET_WO
+#define R_SCSI1_CTRL__ISET REG_ISET_WO
+#define R_SCSI1_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_SCSI1_CTRL__EQL REG_EQL_WO
+#define R_SCSI1_CTRL__IEQL REG_IEQL_WO
+#define R_SCSI1_CTRL__RD REG_RD_WO
+#define R_SCSI1_CTRL__IRD REG_IRD_WO
+#define R_SCSI1_CTRL__WR REG_WR_WO
+#define R_SCSI1_CTRL__IWR REG_IWR_WO
+
+#define R_SCSI1_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SCSI1_CTRL__id_type__id_type__MASK 0x80000000U
+#define R_SCSI1_CTRL__sel_timeout__sel_timeout__MASK 0x7f000000U
+#define R_SCSI1_CTRL__synch_per__synch_per__MASK 0x00ff0000U
+#define R_SCSI1_CTRL__rst__rst__MASK 0x00008000U
+#define R_SCSI1_CTRL__atn__atn__MASK 0x00004000U
+#define R_SCSI1_CTRL__my_id__my_id__MASK 0x00001e00U
+#define R_SCSI1_CTRL__target_id__target_id__MASK 0x000000f0U
+#define R_SCSI1_CTRL__fast_20__fast_20__MASK 0x00000008U
+#define R_SCSI1_CTRL__bus_width__bus_width__MASK 0x00000004U
+#define R_SCSI1_CTRL__synch__synch__MASK 0x00000002U
+#define R_SCSI1_CTRL__enable__enable__MASK 0x00000001U
+
+#define R_SCSI1_CTRL__id_type__MAX 0x1
+#define R_SCSI1_CTRL__sel_timeout__MAX 0x7f
+#define R_SCSI1_CTRL__synch_per__MAX 0xff
+#define R_SCSI1_CTRL__rst__MAX 0x1
+#define R_SCSI1_CTRL__atn__MAX 0x1
+#define R_SCSI1_CTRL__my_id__MAX 0xf
+#define R_SCSI1_CTRL__target_id__MAX 0xf
+#define R_SCSI1_CTRL__fast_20__MAX 0x1
+#define R_SCSI1_CTRL__bus_width__MAX 0x1
+#define R_SCSI1_CTRL__synch__MAX 0x1
+#define R_SCSI1_CTRL__enable__MAX 0x1
+
+#define R_SCSI1_CTRL__id_type__MIN 0
+#define R_SCSI1_CTRL__sel_timeout__MIN 0
+#define R_SCSI1_CTRL__synch_per__MIN 0
+#define R_SCSI1_CTRL__rst__MIN 0
+#define R_SCSI1_CTRL__atn__MIN 0
+#define R_SCSI1_CTRL__my_id__MIN 0
+#define R_SCSI1_CTRL__target_id__MIN 0
+#define R_SCSI1_CTRL__fast_20__MIN 0
+#define R_SCSI1_CTRL__bus_width__MIN 0
+#define R_SCSI1_CTRL__synch__MIN 0
+#define R_SCSI1_CTRL__enable__MIN 0
+
+#define R_SCSI1_CTRL__id_type__BITNR 31
+#define R_SCSI1_CTRL__sel_timeout__BITNR 24
+#define R_SCSI1_CTRL__synch_per__BITNR 16
+#define R_SCSI1_CTRL__rst__BITNR 15
+#define R_SCSI1_CTRL__atn__BITNR 14
+#define R_SCSI1_CTRL__my_id__BITNR 9
+#define R_SCSI1_CTRL__target_id__BITNR 4
+#define R_SCSI1_CTRL__fast_20__BITNR 3
+#define R_SCSI1_CTRL__bus_width__BITNR 2
+#define R_SCSI1_CTRL__synch__BITNR 1
+#define R_SCSI1_CTRL__enable__BITNR 0
+
+#define R_SCSI1_CTRL__id_type__id_type__VAL REG_VAL_ENUM
+#define R_SCSI1_CTRL__sel_timeout__sel_timeout__VAL REG_VAL_VAL
+#define R_SCSI1_CTRL__synch_per__synch_per__VAL REG_VAL_VAL
+#define R_SCSI1_CTRL__rst__rst__VAL REG_VAL_ENUM
+#define R_SCSI1_CTRL__atn__atn__VAL REG_VAL_ENUM
+#define R_SCSI1_CTRL__my_id__my_id__VAL REG_VAL_VAL
+#define R_SCSI1_CTRL__target_id__target_id__VAL REG_VAL_VAL
+#define R_SCSI1_CTRL__fast_20__fast_20__VAL REG_VAL_ENUM
+#define R_SCSI1_CTRL__bus_width__bus_width__VAL REG_VAL_ENUM
+#define R_SCSI1_CTRL__synch__synch__VAL REG_VAL_ENUM
+#define R_SCSI1_CTRL__enable__enable__VAL REG_VAL_ENUM
+
+#define R_SCSI1_CTRL__id_type__id_type__hardware 0
+#define R_SCSI1_CTRL__id_type__id_type__software 1
+#define R_SCSI1_CTRL__rst__rst__no 0
+#define R_SCSI1_CTRL__rst__rst__yes 1
+#define R_SCSI1_CTRL__atn__atn__no 0
+#define R_SCSI1_CTRL__atn__atn__yes 1
+#define R_SCSI1_CTRL__fast_20__fast_20__no 0
+#define R_SCSI1_CTRL__fast_20__fast_20__yes 1
+#define R_SCSI1_CTRL__bus_width__bus_width__narrow 0
+#define R_SCSI1_CTRL__bus_width__bus_width__wide 1
+#define R_SCSI1_CTRL__synch__synch__asynch 0
+#define R_SCSI1_CTRL__synch__synch__synch 1
+#define R_SCSI1_CTRL__enable__enable__off 0
+#define R_SCSI1_CTRL__enable__enable__on 1
+
+#endif
+
+/*
+ * R_SCSI1_DATA
+ * - type: WO
+ * - addr: 0xb0000050
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+#define R_SCSI1_DATA__ADDR (REG_TYPECAST_UWORD 0xb0000050)
+
+#ifndef REG_NO_SHADOW
+#define R_SCSI1_DATA__SADDR (REG_STYPECAST_UWORD (reg_shadow__hwregs.R_PAR1_CTRL_DATA + 0))
+#define R_SCSI1_DATA__IADDR (REG_STYPECAST_UWORD (reg_initiated__hwregs.R_PAR1_CTRL_DATA + 0))
+#else /* REG_NO_SHADOW */
+#define R_SCSI1_DATA__SADDR (REG_STYPECAST_UWORD (®_shadow__hwregs))
+#define R_SCSI1_DATA__IADDR (REG_STYPECAST_UWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SCSI1_DATA__STYPECAST REG_STYPECAST_UWORD
+#define R_SCSI1_DATA__SVAL REG_SVAL_SHADOW
+#define R_SCSI1_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_SCSI1_DATA__TYPECAST REG_TYPECAST_UWORD
+#define R_SCSI1_DATA__TYPE (REG_UWORD)
+#define R_SCSI1_DATA__GET REG_GET_WO
+#define R_SCSI1_DATA__IGET REG_IGET_WO
+#define R_SCSI1_DATA__SET REG_SET_WO
+#define R_SCSI1_DATA__ISET REG_ISET_WO
+#define R_SCSI1_DATA__SET_VAL REG_SET_VAL_WO
+#define R_SCSI1_DATA__EQL REG_EQL_WO
+#define R_SCSI1_DATA__IEQL REG_IEQL_WO
+#define R_SCSI1_DATA__RD REG_RD_WO
+#define R_SCSI1_DATA__IRD REG_IRD_WO
+#define R_SCSI1_DATA__WR REG_WR_WO
+#define R_SCSI1_DATA__IWR REG_IWR_WO
+
+#define R_SCSI1_DATA__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SCSI1_DATA__data_out__data_out__MASK 0x0000ffffU
+
+#define R_SCSI1_DATA__data_out__MAX 0xffff
+
+#define R_SCSI1_DATA__data_out__MIN 0
+
+#define R_SCSI1_DATA__data_out__BITNR 0
+
+#define R_SCSI1_DATA__data_out__data_out__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SCSI1_DATA_IN
+ * - type: RO
+ * - addr: 0xb0000050
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+#define R_SCSI1_DATA_IN__ADDR (REG_TYPECAST_UWORD 0xb0000050)
+#define R_SCSI1_DATA_IN__SVAL REG_SVAL_SHADOW
+#define R_SCSI1_DATA_IN__SVAL_I REG_SVAL_I_SHADOW
+#define R_SCSI1_DATA_IN__TYPECAST REG_TYPECAST_UWORD
+#define R_SCSI1_DATA_IN__TYPE (REG_UWORD)
+#define R_SCSI1_DATA_IN__GET REG_GET_RO
+#define R_SCSI1_DATA_IN__IGET REG_IGET_RO
+#define R_SCSI1_DATA_IN__SET REG_SET_RO
+#define R_SCSI1_DATA_IN__ISET REG_ISET_RO
+#define R_SCSI1_DATA_IN__SET_VAL REG_SET_VAL_RO
+#define R_SCSI1_DATA_IN__EQL REG_EQL_RO
+#define R_SCSI1_DATA_IN__IEQL REG_IEQL_RO
+#define R_SCSI1_DATA_IN__RD REG_RD_RO
+#define R_SCSI1_DATA_IN__IRD REG_IRD_RO
+#define R_SCSI1_DATA_IN__WR REG_WR_RO
+#define R_SCSI1_DATA_IN__IWR REG_IWR_RO
+
+#define R_SCSI1_DATA_IN__READ(addr) \
+ (*(addr))
+
+#define R_SCSI1_DATA_IN__data_in__data_in__MASK 0x0000ffffU
+
+#define R_SCSI1_DATA_IN__data_in__MAX 0xffff
+
+#define R_SCSI1_DATA_IN__data_in__MIN 0
+
+#define R_SCSI1_DATA_IN__data_in__BITNR 0
+
+#define R_SCSI1_DATA_IN__data_in__data_in__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SCSI1_STATUS
+ * - type: RO
+ * - addr: 0xb0000058
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+#define R_SCSI1_STATUS__ADDR (REG_TYPECAST_UDWORD 0xb0000058)
+#define R_SCSI1_STATUS__SVAL REG_SVAL_SHADOW
+#define R_SCSI1_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_SCSI1_STATUS__TYPECAST REG_TYPECAST_UDWORD
+#define R_SCSI1_STATUS__TYPE (REG_UDWORD)
+#define R_SCSI1_STATUS__GET REG_GET_RO
+#define R_SCSI1_STATUS__IGET REG_IGET_RO
+#define R_SCSI1_STATUS__SET REG_SET_RO
+#define R_SCSI1_STATUS__ISET REG_ISET_RO
+#define R_SCSI1_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_SCSI1_STATUS__EQL REG_EQL_RO
+#define R_SCSI1_STATUS__IEQL REG_IEQL_RO
+#define R_SCSI1_STATUS__RD REG_RD_RO
+#define R_SCSI1_STATUS__IRD REG_IRD_RO
+#define R_SCSI1_STATUS__WR REG_WR_RO
+#define R_SCSI1_STATUS__IWR REG_IWR_RO
+
+#define R_SCSI1_STATUS__READ(addr) \
+ (*(addr))
+
+#define R_SCSI1_STATUS__tst_arb_won__tst_arb_won__MASK 0x00800000U
+#define R_SCSI1_STATUS__tst_resel__tst_resel__MASK 0x00400000U
+#define R_SCSI1_STATUS__parity_error__parity_error__MASK 0x00200000U
+#define R_SCSI1_STATUS__bus_reset__bus_reset__MASK 0x00100000U
+#define R_SCSI1_STATUS__resel_target__resel_target__MASK 0x00078000U
+#define R_SCSI1_STATUS__resel__resel__MASK 0x00004000U
+#define R_SCSI1_STATUS__curr_phase__curr_phase__MASK 0x00003800U
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__MASK 0x000007c0U
+#define R_SCSI1_STATUS__valid_status__valid_status__MASK 0x00000020U
+#define R_SCSI1_STATUS__seq_status__seq_status__MASK 0x0000001fU
+
+#define R_SCSI1_STATUS__tst_arb_won__MAX 0x1
+#define R_SCSI1_STATUS__tst_resel__MAX 0x1
+#define R_SCSI1_STATUS__parity_error__MAX 0x1
+#define R_SCSI1_STATUS__bus_reset__MAX 0x1
+#define R_SCSI1_STATUS__resel_target__MAX 0xf
+#define R_SCSI1_STATUS__resel__MAX 0x1
+#define R_SCSI1_STATUS__curr_phase__MAX 0x7
+#define R_SCSI1_STATUS__last_seq_step__MAX 0x1f
+#define R_SCSI1_STATUS__valid_status__MAX 0x1
+#define R_SCSI1_STATUS__seq_status__MAX 0x1f
+
+#define R_SCSI1_STATUS__tst_arb_won__MIN 0
+#define R_SCSI1_STATUS__tst_resel__MIN 0
+#define R_SCSI1_STATUS__parity_error__MIN 0
+#define R_SCSI1_STATUS__bus_reset__MIN 0
+#define R_SCSI1_STATUS__resel_target__MIN 0
+#define R_SCSI1_STATUS__resel__MIN 0
+#define R_SCSI1_STATUS__curr_phase__MIN 0
+#define R_SCSI1_STATUS__last_seq_step__MIN 0
+#define R_SCSI1_STATUS__valid_status__MIN 0
+#define R_SCSI1_STATUS__seq_status__MIN 0
+
+#define R_SCSI1_STATUS__tst_arb_won__BITNR 23
+#define R_SCSI1_STATUS__tst_resel__BITNR 22
+#define R_SCSI1_STATUS__parity_error__BITNR 21
+#define R_SCSI1_STATUS__bus_reset__BITNR 20
+#define R_SCSI1_STATUS__resel_target__BITNR 15
+#define R_SCSI1_STATUS__resel__BITNR 14
+#define R_SCSI1_STATUS__curr_phase__BITNR 11
+#define R_SCSI1_STATUS__last_seq_step__BITNR 6
+#define R_SCSI1_STATUS__valid_status__BITNR 5
+#define R_SCSI1_STATUS__seq_status__BITNR 0
+
+#define R_SCSI1_STATUS__tst_arb_won__tst_arb_won__VAL REG_VAL_VAL
+#define R_SCSI1_STATUS__tst_resel__tst_resel__VAL REG_VAL_VAL
+#define R_SCSI1_STATUS__parity_error__parity_error__VAL REG_VAL_VAL
+#define R_SCSI1_STATUS__bus_reset__bus_reset__VAL REG_VAL_ENUM
+#define R_SCSI1_STATUS__resel_target__resel_target__VAL REG_VAL_VAL
+#define R_SCSI1_STATUS__resel__resel__VAL REG_VAL_ENUM
+#define R_SCSI1_STATUS__curr_phase__curr_phase__VAL REG_VAL_ENUM
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__VAL REG_VAL_ENUM
+#define R_SCSI1_STATUS__valid_status__valid_status__VAL REG_VAL_ENUM
+#define R_SCSI1_STATUS__seq_status__seq_status__VAL REG_VAL_ENUM
+
+#define R_SCSI1_STATUS__bus_reset__bus_reset__no 0
+#define R_SCSI1_STATUS__bus_reset__bus_reset__yes 1
+#define R_SCSI1_STATUS__resel__resel__no 0
+#define R_SCSI1_STATUS__resel__resel__yes 1
+#define R_SCSI1_STATUS__curr_phase__curr_phase__ph_command 2
+#define R_SCSI1_STATUS__curr_phase__curr_phase__ph_data_in 5
+#define R_SCSI1_STATUS__curr_phase__curr_phase__ph_data_out 4
+#define R_SCSI1_STATUS__curr_phase__curr_phase__ph_msg_in 7
+#define R_SCSI1_STATUS__curr_phase__curr_phase__ph_msg_out 6
+#define R_SCSI1_STATUS__curr_phase__curr_phase__ph_resel 1
+#define R_SCSI1_STATUS__curr_phase__curr_phase__ph_status 3
+#define R_SCSI1_STATUS__curr_phase__curr_phase__ph_undef 0
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_answer 3
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_arbitrate 8
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_asynch_din 9
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_asynch_dout 25
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_asynch_dout_end 11
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_bus_free 24
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_cc 31
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_iwr 27
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_iwr_cc 23
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_iwr_good 14
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_manual 28
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_manual_din_prot 18
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_manual_req 10
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_msg_1 2
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_msg_2 6
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_msg_3 22
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_resel_req 29
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_sdp_disc 7
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_synch_din 13
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_synch_din_ack 12
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_synch_din_ack_perr 5
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_synch_din_perr 1
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_synch_dout 0
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_synch_dout_ack 4
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_transf_cmd 30
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_transfer_done 15
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_wait_free_cc 20
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_wait_free_disc 21
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_wait_free_iwr_cc 17
+#define R_SCSI1_STATUS__last_seq_step__last_seq_step__st_wait_free_sdp_disc 16
+#define R_SCSI1_STATUS__valid_status__valid_status__no 0
+#define R_SCSI1_STATUS__valid_status__valid_status__yes 1
+#define R_SCSI1_STATUS__seq_status__seq_status__info_arb_lost 4
+#define R_SCSI1_STATUS__seq_status__seq_status__info_bus_free 13
+#define R_SCSI1_STATUS__seq_status__seq_status__info_bus_reset 11
+#define R_SCSI1_STATUS__seq_status__seq_status__info_illegal_bf 12
+#define R_SCSI1_STATUS__seq_status__seq_status__info_illegal_op 7
+#define R_SCSI1_STATUS__seq_status__seq_status__info_parity_error 1
+#define R_SCSI1_STATUS__seq_status__seq_status__info_rec_recvd 8
+#define R_SCSI1_STATUS__seq_status__seq_status__info_reselected 9
+#define R_SCSI1_STATUS__seq_status__seq_status__info_sel_timeout 5
+#define R_SCSI1_STATUS__seq_status__seq_status__info_seq_complete 0
+#define R_SCSI1_STATUS__seq_status__seq_status__info_unexp_bf 6
+#define R_SCSI1_STATUS__seq_status__seq_status__info_unexp_ph_change 3
+#define R_SCSI1_STATUS__seq_status__seq_status__info_unhandled_msg_in 2
+#define R_SCSI1_STATUS__seq_status__seq_status__info_unhandled_status 10
+
+#endif
+
+/*
+ * R_SCSI1_STATUS_CTRL
+ * - type: WO
+ * - addr: 0xb0000053
+ * - group: SCSI registers
+ */
+
+#if USE_GROUP__SCSI_registers
+
+#define R_SCSI1_STATUS_CTRL__ADDR (REG_TYPECAST_BYTE 0xb0000053)
+
+#ifndef REG_NO_SHADOW
+#define R_SCSI1_STATUS_CTRL__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_PAR1_CTRL_DATA + 3))
+#define R_SCSI1_STATUS_CTRL__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_PAR1_CTRL_DATA + 3))
+#else /* REG_NO_SHADOW */
+#define R_SCSI1_STATUS_CTRL__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_SCSI1_STATUS_CTRL__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SCSI1_STATUS_CTRL__STYPECAST REG_STYPECAST_BYTE
+#define R_SCSI1_STATUS_CTRL__SVAL REG_SVAL_SHADOW
+#define R_SCSI1_STATUS_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_SCSI1_STATUS_CTRL__TYPECAST REG_TYPECAST_BYTE
+#define R_SCSI1_STATUS_CTRL__TYPE (REG_BYTE)
+#define R_SCSI1_STATUS_CTRL__GET REG_GET_WO
+#define R_SCSI1_STATUS_CTRL__IGET REG_IGET_WO
+#define R_SCSI1_STATUS_CTRL__SET REG_SET_WO
+#define R_SCSI1_STATUS_CTRL__ISET REG_ISET_WO
+#define R_SCSI1_STATUS_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_SCSI1_STATUS_CTRL__EQL REG_EQL_WO
+#define R_SCSI1_STATUS_CTRL__IEQL REG_IEQL_WO
+#define R_SCSI1_STATUS_CTRL__RD REG_RD_WO
+#define R_SCSI1_STATUS_CTRL__IRD REG_IRD_WO
+#define R_SCSI1_STATUS_CTRL__WR REG_WR_WO
+#define R_SCSI1_STATUS_CTRL__IWR REG_IWR_WO
+
+#define R_SCSI1_STATUS_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SCSI1_STATUS_CTRL__parity_in__parity_in__MASK 0x00000004U
+#define R_SCSI1_STATUS_CTRL__skip__skip__MASK 0x00000002U
+#define R_SCSI1_STATUS_CTRL__clr_status__clr_status__MASK 0x00000001U
+
+#define R_SCSI1_STATUS_CTRL__parity_in__MAX 0x1
+#define R_SCSI1_STATUS_CTRL__skip__MAX 0x1
+#define R_SCSI1_STATUS_CTRL__clr_status__MAX 0x1
+
+#define R_SCSI1_STATUS_CTRL__parity_in__MIN 0
+#define R_SCSI1_STATUS_CTRL__skip__MIN 0
+#define R_SCSI1_STATUS_CTRL__clr_status__MIN 0
+
+#define R_SCSI1_STATUS_CTRL__parity_in__BITNR 2
+#define R_SCSI1_STATUS_CTRL__skip__BITNR 1
+#define R_SCSI1_STATUS_CTRL__clr_status__BITNR 0
+
+#define R_SCSI1_STATUS_CTRL__parity_in__parity_in__VAL REG_VAL_ENUM
+#define R_SCSI1_STATUS_CTRL__skip__skip__VAL REG_VAL_ENUM
+#define R_SCSI1_STATUS_CTRL__clr_status__clr_status__VAL REG_VAL_ENUM
+
+#define R_SCSI1_STATUS_CTRL__parity_in__parity_in__off 1
+#define R_SCSI1_STATUS_CTRL__parity_in__parity_in__on 0
+#define R_SCSI1_STATUS_CTRL__skip__skip__off 0
+#define R_SCSI1_STATUS_CTRL__skip__skip__on 1
+#define R_SCSI1_STATUS_CTRL__clr_status__clr_status__nop 0
+#define R_SCSI1_STATUS_CTRL__clr_status__clr_status__yes 1
+
+#endif
+
+/*
+ * R_SDRAM_CONFIG
+ * - type: WO
+ * - addr: 0xb000000c
+ * - group: Bus interface configuration registers
+ */
+
+#if USE_GROUP__Bus_interface_configuration_registers
+
+#define R_SDRAM_CONFIG__ADDR (REG_TYPECAST_UDWORD 0xb000000c)
+
+#ifndef REG_NO_SHADOW
+#define R_SDRAM_CONFIG__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_DRAM_CONFIG + 0))
+#define R_SDRAM_CONFIG__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_DRAM_CONFIG + 0))
+#else /* REG_NO_SHADOW */
+#define R_SDRAM_CONFIG__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_SDRAM_CONFIG__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SDRAM_CONFIG__STYPECAST REG_STYPECAST_UDWORD
+#define R_SDRAM_CONFIG__SVAL REG_SVAL_SHADOW
+#define R_SDRAM_CONFIG__SVAL_I REG_SVAL_I_SHADOW
+#define R_SDRAM_CONFIG__TYPECAST REG_TYPECAST_UDWORD
+#define R_SDRAM_CONFIG__TYPE (REG_UDWORD)
+#define R_SDRAM_CONFIG__GET REG_GET_WO
+#define R_SDRAM_CONFIG__IGET REG_IGET_WO
+#define R_SDRAM_CONFIG__SET REG_SET_WO
+#define R_SDRAM_CONFIG__ISET REG_ISET_WO
+#define R_SDRAM_CONFIG__SET_VAL REG_SET_VAL_WO
+#define R_SDRAM_CONFIG__EQL REG_EQL_WO
+#define R_SDRAM_CONFIG__IEQL REG_IEQL_WO
+#define R_SDRAM_CONFIG__RD REG_RD_WO
+#define R_SDRAM_CONFIG__IRD REG_IRD_WO
+#define R_SDRAM_CONFIG__WR REG_WR_WO
+#define R_SDRAM_CONFIG__IWR REG_IWR_WO
+
+#define R_SDRAM_CONFIG__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SDRAM_CONFIG__wmm1__wmm1__MASK 0x80000000U
+#define R_SDRAM_CONFIG__wmm0__wmm0__MASK 0x40000000U
+#define R_SDRAM_CONFIG__sh1__sh1__MASK 0x38000000U
+#define R_SDRAM_CONFIG__sh0__sh0__MASK 0x07000000U
+#define R_SDRAM_CONFIG__w__w__MASK 0x00800000U
+#define R_SDRAM_CONFIG__type1__type1__MASK 0x00400000U
+#define R_SDRAM_CONFIG__type0__type0__MASK 0x00200000U
+#define R_SDRAM_CONFIG__group_sel__group_sel__MASK 0x001f0000U
+#define R_SDRAM_CONFIG__ca1__ca1__MASK 0x0000e000U
+#define R_SDRAM_CONFIG__bank_sel1__bank_sel1__MASK 0x00001f00U
+#define R_SDRAM_CONFIG__ca0__ca0__MASK 0x000000e0U
+#define R_SDRAM_CONFIG__bank_sel0__bank_sel0__MASK 0x0000001fU
+
+#define R_SDRAM_CONFIG__wmm1__MAX 0x1
+#define R_SDRAM_CONFIG__wmm0__MAX 0x1
+#define R_SDRAM_CONFIG__sh1__MAX 7
+#define R_SDRAM_CONFIG__sh0__MAX 7
+#define R_SDRAM_CONFIG__w__MAX 0x1
+#define R_SDRAM_CONFIG__type1__MAX 0x1
+#define R_SDRAM_CONFIG__type0__MAX 0x1
+#define R_SDRAM_CONFIG__group_sel__MAX 0x1f
+#define R_SDRAM_CONFIG__ca1__MAX 7
+#define R_SDRAM_CONFIG__bank_sel1__MAX 0x1f
+#define R_SDRAM_CONFIG__ca0__MAX 7
+#define R_SDRAM_CONFIG__bank_sel0__MAX 0x1f
+
+#define R_SDRAM_CONFIG__wmm1__MIN 0
+#define R_SDRAM_CONFIG__wmm0__MIN 0
+#define R_SDRAM_CONFIG__sh1__MIN 0
+#define R_SDRAM_CONFIG__sh0__MIN 0
+#define R_SDRAM_CONFIG__w__MIN 0
+#define R_SDRAM_CONFIG__type1__MIN 0
+#define R_SDRAM_CONFIG__type0__MIN 0
+#define R_SDRAM_CONFIG__group_sel__MIN 0
+#define R_SDRAM_CONFIG__ca1__MIN 0
+#define R_SDRAM_CONFIG__bank_sel1__MIN 0
+#define R_SDRAM_CONFIG__ca0__MIN 0
+#define R_SDRAM_CONFIG__bank_sel0__MIN 0
+
+#define R_SDRAM_CONFIG__wmm1__BITNR 31
+#define R_SDRAM_CONFIG__wmm0__BITNR 30
+#define R_SDRAM_CONFIG__sh1__BITNR 27
+#define R_SDRAM_CONFIG__sh0__BITNR 24
+#define R_SDRAM_CONFIG__w__BITNR 23
+#define R_SDRAM_CONFIG__type1__BITNR 22
+#define R_SDRAM_CONFIG__type0__BITNR 21
+#define R_SDRAM_CONFIG__group_sel__BITNR 16
+#define R_SDRAM_CONFIG__ca1__BITNR 13
+#define R_SDRAM_CONFIG__bank_sel1__BITNR 8
+#define R_SDRAM_CONFIG__ca0__BITNR 5
+#define R_SDRAM_CONFIG__bank_sel0__BITNR 0
+
+#define R_SDRAM_CONFIG__wmm1__wmm1__VAL REG_VAL_ENUM
+#define R_SDRAM_CONFIG__wmm0__wmm0__VAL REG_VAL_ENUM
+#define R_SDRAM_CONFIG__sh1__sh1__VAL REG_VAL_VAL
+#define R_SDRAM_CONFIG__sh0__sh0__VAL REG_VAL_VAL
+#define R_SDRAM_CONFIG__w__w__VAL REG_VAL_ENUM
+#define R_SDRAM_CONFIG__type1__type1__VAL REG_VAL_ENUM
+#define R_SDRAM_CONFIG__type0__type0__VAL REG_VAL_ENUM
+#define R_SDRAM_CONFIG__group_sel__group_sel__VAL REG_VAL_ENUM
+#define R_SDRAM_CONFIG__ca1__ca1__VAL REG_VAL_VAL
+#define R_SDRAM_CONFIG__bank_sel1__bank_sel1__VAL REG_VAL_ENUM
+#define R_SDRAM_CONFIG__ca0__ca0__VAL REG_VAL_VAL
+#define R_SDRAM_CONFIG__bank_sel0__bank_sel0__VAL REG_VAL_ENUM
+
+#define R_SDRAM_CONFIG__wmm1__wmm1__norm 0
+#define R_SDRAM_CONFIG__wmm1__wmm1__wmm 1
+#define R_SDRAM_CONFIG__wmm0__wmm0__norm 0
+#define R_SDRAM_CONFIG__wmm0__wmm0__wmm 1
+#define R_SDRAM_CONFIG__w__w__bw16 0
+#define R_SDRAM_CONFIG__w__w__bw32 1
+#define R_SDRAM_CONFIG__type1__type1__bank2 0
+#define R_SDRAM_CONFIG__type1__type1__bank4 1
+#define R_SDRAM_CONFIG__type0__type0__bank2 0
+#define R_SDRAM_CONFIG__type0__type0__bank4 1
+#define R_SDRAM_CONFIG__group_sel__group_sel__bit10 10
+#define R_SDRAM_CONFIG__group_sel__group_sel__bit11 11
+#define R_SDRAM_CONFIG__group_sel__group_sel__bit12 12
+#define R_SDRAM_CONFIG__group_sel__group_sel__bit13 13
+#define R_SDRAM_CONFIG__group_sel__group_sel__bit14 14
+#define R_SDRAM_CONFIG__group_sel__group_sel__bit15 15
+#define R_SDRAM_CONFIG__group_sel__group_sel__bit16 16
+#define R_SDRAM_CONFIG__group_sel__group_sel__bit17 17
+#define R_SDRAM_CONFIG__group_sel__group_sel__bit18 18
+#define R_SDRAM_CONFIG__group_sel__group_sel__bit19 19
+#define R_SDRAM_CONFIG__group_sel__group_sel__bit20 20
+#define R_SDRAM_CONFIG__group_sel__group_sel__bit21 21
+#define R_SDRAM_CONFIG__group_sel__group_sel__bit22 22
+#define R_SDRAM_CONFIG__group_sel__group_sel__bit23 23
+#define R_SDRAM_CONFIG__group_sel__group_sel__bit24 24
+#define R_SDRAM_CONFIG__group_sel__group_sel__bit25 25
+#define R_SDRAM_CONFIG__group_sel__group_sel__bit26 26
+#define R_SDRAM_CONFIG__group_sel__group_sel__bit27 27
+#define R_SDRAM_CONFIG__group_sel__group_sel__bit28 28
+#define R_SDRAM_CONFIG__group_sel__group_sel__bit29 29
+#define R_SDRAM_CONFIG__group_sel__group_sel__bit9 9
+#define R_SDRAM_CONFIG__group_sel__group_sel__grp0 0
+#define R_SDRAM_CONFIG__group_sel__group_sel__grp1 1
+#define R_SDRAM_CONFIG__bank_sel1__bank_sel1__bit10 10
+#define R_SDRAM_CONFIG__bank_sel1__bank_sel1__bit11 11
+#define R_SDRAM_CONFIG__bank_sel1__bank_sel1__bit12 12
+#define R_SDRAM_CONFIG__bank_sel1__bank_sel1__bit13 13
+#define R_SDRAM_CONFIG__bank_sel1__bank_sel1__bit14 14
+#define R_SDRAM_CONFIG__bank_sel1__bank_sel1__bit15 15
+#define R_SDRAM_CONFIG__bank_sel1__bank_sel1__bit16 16
+#define R_SDRAM_CONFIG__bank_sel1__bank_sel1__bit17 17
+#define R_SDRAM_CONFIG__bank_sel1__bank_sel1__bit18 18
+#define R_SDRAM_CONFIG__bank_sel1__bank_sel1__bit19 19
+#define R_SDRAM_CONFIG__bank_sel1__bank_sel1__bit20 20
+#define R_SDRAM_CONFIG__bank_sel1__bank_sel1__bit21 21
+#define R_SDRAM_CONFIG__bank_sel1__bank_sel1__bit22 22
+#define R_SDRAM_CONFIG__bank_sel1__bank_sel1__bit23 23
+#define R_SDRAM_CONFIG__bank_sel1__bank_sel1__bit24 24
+#define R_SDRAM_CONFIG__bank_sel1__bank_sel1__bit25 25
+#define R_SDRAM_CONFIG__bank_sel1__bank_sel1__bit26 26
+#define R_SDRAM_CONFIG__bank_sel1__bank_sel1__bit27 27
+#define R_SDRAM_CONFIG__bank_sel1__bank_sel1__bit28 28
+#define R_SDRAM_CONFIG__bank_sel1__bank_sel1__bit29 29
+#define R_SDRAM_CONFIG__bank_sel1__bank_sel1__bit9 9
+#define R_SDRAM_CONFIG__bank_sel0__bank_sel0__bit10 10
+#define R_SDRAM_CONFIG__bank_sel0__bank_sel0__bit11 11
+#define R_SDRAM_CONFIG__bank_sel0__bank_sel0__bit12 12
+#define R_SDRAM_CONFIG__bank_sel0__bank_sel0__bit13 13
+#define R_SDRAM_CONFIG__bank_sel0__bank_sel0__bit14 14
+#define R_SDRAM_CONFIG__bank_sel0__bank_sel0__bit15 15
+#define R_SDRAM_CONFIG__bank_sel0__bank_sel0__bit16 16
+#define R_SDRAM_CONFIG__bank_sel0__bank_sel0__bit17 17
+#define R_SDRAM_CONFIG__bank_sel0__bank_sel0__bit18 18
+#define R_SDRAM_CONFIG__bank_sel0__bank_sel0__bit19 19
+#define R_SDRAM_CONFIG__bank_sel0__bank_sel0__bit20 20
+#define R_SDRAM_CONFIG__bank_sel0__bank_sel0__bit21 21
+#define R_SDRAM_CONFIG__bank_sel0__bank_sel0__bit22 22
+#define R_SDRAM_CONFIG__bank_sel0__bank_sel0__bit23 23
+#define R_SDRAM_CONFIG__bank_sel0__bank_sel0__bit24 24
+#define R_SDRAM_CONFIG__bank_sel0__bank_sel0__bit25 25
+#define R_SDRAM_CONFIG__bank_sel0__bank_sel0__bit26 26
+#define R_SDRAM_CONFIG__bank_sel0__bank_sel0__bit27 27
+#define R_SDRAM_CONFIG__bank_sel0__bank_sel0__bit28 28
+#define R_SDRAM_CONFIG__bank_sel0__bank_sel0__bit29 29
+#define R_SDRAM_CONFIG__bank_sel0__bank_sel0__bit9 9
+
+#endif
+
+/*
+ * R_SDRAM_TIMING
+ * - type: WO
+ * - addr: 0xb0000008
+ * - group: Bus interface configuration registers
+ */
+
+#if USE_GROUP__Bus_interface_configuration_registers
+
+#define R_SDRAM_TIMING__ADDR (REG_TYPECAST_UDWORD 0xb0000008)
+
+#ifndef REG_NO_SHADOW
+#define R_SDRAM_TIMING__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_DRAM_TIMING + 0))
+#define R_SDRAM_TIMING__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_DRAM_TIMING + 0))
+#else /* REG_NO_SHADOW */
+#define R_SDRAM_TIMING__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_SDRAM_TIMING__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SDRAM_TIMING__STYPECAST REG_STYPECAST_UDWORD
+#define R_SDRAM_TIMING__SVAL REG_SVAL_SHADOW
+#define R_SDRAM_TIMING__SVAL_I REG_SVAL_I_SHADOW
+#define R_SDRAM_TIMING__TYPECAST REG_TYPECAST_UDWORD
+#define R_SDRAM_TIMING__TYPE (REG_UDWORD)
+#define R_SDRAM_TIMING__GET REG_GET_WO
+#define R_SDRAM_TIMING__IGET REG_IGET_WO
+#define R_SDRAM_TIMING__SET REG_SET_WO
+#define R_SDRAM_TIMING__ISET REG_ISET_WO
+#define R_SDRAM_TIMING__SET_VAL REG_SET_VAL_WO
+#define R_SDRAM_TIMING__EQL REG_EQL_WO
+#define R_SDRAM_TIMING__IEQL REG_IEQL_WO
+#define R_SDRAM_TIMING__RD REG_RD_WO
+#define R_SDRAM_TIMING__IRD REG_IRD_WO
+#define R_SDRAM_TIMING__WR REG_WR_WO
+#define R_SDRAM_TIMING__IWR REG_IWR_WO
+
+#define R_SDRAM_TIMING__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SDRAM_TIMING__sdram__sdram__MASK 0x80000000U
+#define R_SDRAM_TIMING__mrs_data__mrs_data__MASK 0x7fff0000U
+#define R_SDRAM_TIMING__ref__ref__MASK 0x0000c000U
+#define R_SDRAM_TIMING__ddr__ddr__MASK 0x00002000U
+#define R_SDRAM_TIMING__clk100__clk100__MASK 0x00001000U
+#define R_SDRAM_TIMING__ps__ps__MASK 0x00000800U
+#define R_SDRAM_TIMING__cmd__cmd__MASK 0x00000600U
+#define R_SDRAM_TIMING__pde__pde__MASK 0x00000100U
+#define R_SDRAM_TIMING__rc__rc__MASK 0x000000c0U
+#define R_SDRAM_TIMING__rp__rp__MASK 0x00000030U
+#define R_SDRAM_TIMING__rcd__rcd__MASK 0x0000000cU
+#define R_SDRAM_TIMING__cl__cl__MASK 0x00000003U
+
+#define R_SDRAM_TIMING__sdram__MAX 0x1
+#define R_SDRAM_TIMING__mrs_data__MAX 0x7fff
+#define R_SDRAM_TIMING__ref__MAX 0x3
+#define R_SDRAM_TIMING__ddr__MAX 0x1
+#define R_SDRAM_TIMING__clk100__MAX 0x1
+#define R_SDRAM_TIMING__ps__MAX 0x1
+#define R_SDRAM_TIMING__cmd__MAX 0x3
+#define R_SDRAM_TIMING__pde__MAX 1
+#define R_SDRAM_TIMING__rc__MAX 3
+#define R_SDRAM_TIMING__rp__MAX 3
+#define R_SDRAM_TIMING__rcd__MAX 3
+#define R_SDRAM_TIMING__cl__MAX 2
+
+#define R_SDRAM_TIMING__sdram__MIN 0
+#define R_SDRAM_TIMING__mrs_data__MIN 0
+#define R_SDRAM_TIMING__ref__MIN 0
+#define R_SDRAM_TIMING__ddr__MIN 0
+#define R_SDRAM_TIMING__clk100__MIN 0
+#define R_SDRAM_TIMING__ps__MIN 0
+#define R_SDRAM_TIMING__cmd__MIN 0
+#define R_SDRAM_TIMING__pde__MIN 0
+#define R_SDRAM_TIMING__rc__MIN 0
+#define R_SDRAM_TIMING__rp__MIN 0
+#define R_SDRAM_TIMING__rcd__MIN 0
+#define R_SDRAM_TIMING__cl__MIN 0
+
+#define R_SDRAM_TIMING__sdram__BITNR 31
+#define R_SDRAM_TIMING__mrs_data__BITNR 16
+#define R_SDRAM_TIMING__ref__BITNR 14
+#define R_SDRAM_TIMING__ddr__BITNR 13
+#define R_SDRAM_TIMING__clk100__BITNR 12
+#define R_SDRAM_TIMING__ps__BITNR 11
+#define R_SDRAM_TIMING__cmd__BITNR 9
+#define R_SDRAM_TIMING__pde__BITNR 8
+#define R_SDRAM_TIMING__rc__BITNR 6
+#define R_SDRAM_TIMING__rp__BITNR 4
+#define R_SDRAM_TIMING__rcd__BITNR 2
+#define R_SDRAM_TIMING__cl__BITNR 0
+
+#define R_SDRAM_TIMING__sdram__sdram__VAL REG_VAL_ENUM
+#define R_SDRAM_TIMING__mrs_data__mrs_data__VAL REG_VAL_VAL
+#define R_SDRAM_TIMING__ref__ref__VAL REG_VAL_ENUM
+#define R_SDRAM_TIMING__ddr__ddr__VAL REG_VAL_ENUM
+#define R_SDRAM_TIMING__clk100__clk100__VAL REG_VAL_ENUM
+#define R_SDRAM_TIMING__ps__ps__VAL REG_VAL_ENUM
+#define R_SDRAM_TIMING__cmd__cmd__VAL REG_VAL_ENUM
+#define R_SDRAM_TIMING__pde__pde__VAL REG_VAL_VAL
+#define R_SDRAM_TIMING__rc__rc__VAL REG_VAL_VAL
+#define R_SDRAM_TIMING__rp__rp__VAL REG_VAL_VAL
+#define R_SDRAM_TIMING__rcd__rcd__VAL REG_VAL_VAL
+#define R_SDRAM_TIMING__cl__cl__VAL REG_VAL_VAL
+
+#define R_SDRAM_TIMING__sdram__sdram__disable 0
+#define R_SDRAM_TIMING__sdram__sdram__enable 1
+#define R_SDRAM_TIMING__ref__ref__disable 3
+#define R_SDRAM_TIMING__ref__ref__e13us 1
+#define R_SDRAM_TIMING__ref__ref__e52us 0
+#define R_SDRAM_TIMING__ref__ref__e6500ns 2
+#define R_SDRAM_TIMING__ddr__ddr__off 0
+#define R_SDRAM_TIMING__ddr__ddr__on 1
+#define R_SDRAM_TIMING__clk100__clk100__off 0
+#define R_SDRAM_TIMING__clk100__clk100__on 1
+#define R_SDRAM_TIMING__ps__ps__off 0
+#define R_SDRAM_TIMING__ps__ps__on 1
+#define R_SDRAM_TIMING__cmd__cmd__mrs 1
+#define R_SDRAM_TIMING__cmd__cmd__nop 0
+#define R_SDRAM_TIMING__cmd__cmd__pre 3
+#define R_SDRAM_TIMING__cmd__cmd__ref 2
+
+#endif
+
+/*
+ * R_SERIAL0_BAUD
+ * - type: WO
+ * - addr: 0xb0000063
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL0_BAUD__ADDR (REG_TYPECAST_BYTE 0xb0000063)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL0_BAUD__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_SERIAL0_CTRL + 3))
+#define R_SERIAL0_BAUD__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_SERIAL0_CTRL + 3))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL0_BAUD__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_SERIAL0_BAUD__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL0_BAUD__STYPECAST REG_STYPECAST_BYTE
+#define R_SERIAL0_BAUD__SVAL REG_SVAL_SHADOW
+#define R_SERIAL0_BAUD__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL0_BAUD__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL0_BAUD__TYPE (REG_BYTE)
+#define R_SERIAL0_BAUD__GET REG_GET_WO
+#define R_SERIAL0_BAUD__IGET REG_IGET_WO
+#define R_SERIAL0_BAUD__SET REG_SET_WO
+#define R_SERIAL0_BAUD__ISET REG_ISET_WO
+#define R_SERIAL0_BAUD__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL0_BAUD__EQL REG_EQL_WO
+#define R_SERIAL0_BAUD__IEQL REG_IEQL_WO
+#define R_SERIAL0_BAUD__RD REG_RD_WO
+#define R_SERIAL0_BAUD__IRD REG_IRD_WO
+#define R_SERIAL0_BAUD__WR REG_WR_WO
+#define R_SERIAL0_BAUD__IWR REG_IWR_WO
+
+#define R_SERIAL0_BAUD__WRITE(addr,value) \
+ (*(addr) = (value))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_SERIAL0_BAUD__FIRST 0
+#define R_SERIAL0_BAUD__IOFFSET 8
+#define R_SERIAL0_BAUD__LAST 3
+#define R_SERIAL0_BAUD__OFFSET 8
+#define R_SERIAL0_BAUD__SOFFSET 8
+/* end */
+
+#define R_SERIAL0_BAUD__tr_baud__tr_baud__MASK 0x000000f0U
+#define R_SERIAL0_BAUD__rec_baud__rec_baud__MASK 0x0000000fU
+
+#define R_SERIAL0_BAUD__tr_baud__MAX 0xf
+#define R_SERIAL0_BAUD__rec_baud__MAX 0xf
+
+#define R_SERIAL0_BAUD__tr_baud__MIN 0
+#define R_SERIAL0_BAUD__rec_baud__MIN 0
+
+#define R_SERIAL0_BAUD__tr_baud__BITNR 4
+#define R_SERIAL0_BAUD__rec_baud__BITNR 0
+
+#define R_SERIAL0_BAUD__tr_baud__tr_baud__VAL REG_VAL_ENUM
+#define R_SERIAL0_BAUD__rec_baud__rec_baud__VAL REG_VAL_ENUM
+
+#define R_SERIAL0_BAUD__tr_baud__tr_baud__c115k2Hz 9
+#define R_SERIAL0_BAUD__tr_baud__tr_baud__c1200Hz 2
+#define R_SERIAL0_BAUD__tr_baud__tr_baud__c1843k2Hz 13
+#define R_SERIAL0_BAUD__tr_baud__tr_baud__c19k2Hz 6
+#define R_SERIAL0_BAUD__tr_baud__tr_baud__c230k4Hz 10
+#define R_SERIAL0_BAUD__tr_baud__tr_baud__c2400Hz 3
+#define R_SERIAL0_BAUD__tr_baud__tr_baud__c300Hz 0
+#define R_SERIAL0_BAUD__tr_baud__tr_baud__c38k4Hz 7
+#define R_SERIAL0_BAUD__tr_baud__tr_baud__c460k8Hz 11
+#define R_SERIAL0_BAUD__tr_baud__tr_baud__c4800Hz 4
+#define R_SERIAL0_BAUD__tr_baud__tr_baud__c57k6Hz 8
+#define R_SERIAL0_BAUD__tr_baud__tr_baud__c600Hz 1
+#define R_SERIAL0_BAUD__tr_baud__tr_baud__c6250kHz 14
+#define R_SERIAL0_BAUD__tr_baud__tr_baud__c921k6Hz 12
+#define R_SERIAL0_BAUD__tr_baud__tr_baud__c9600Hz 5
+#define R_SERIAL0_BAUD__rec_baud__rec_baud__c115k2Hz 9
+#define R_SERIAL0_BAUD__rec_baud__rec_baud__c1200Hz 2
+#define R_SERIAL0_BAUD__rec_baud__rec_baud__c1843k2Hz 13
+#define R_SERIAL0_BAUD__rec_baud__rec_baud__c19k2Hz 6
+#define R_SERIAL0_BAUD__rec_baud__rec_baud__c230k4Hz 10
+#define R_SERIAL0_BAUD__rec_baud__rec_baud__c2400Hz 3
+#define R_SERIAL0_BAUD__rec_baud__rec_baud__c300Hz 0
+#define R_SERIAL0_BAUD__rec_baud__rec_baud__c38k4Hz 7
+#define R_SERIAL0_BAUD__rec_baud__rec_baud__c460k8Hz 11
+#define R_SERIAL0_BAUD__rec_baud__rec_baud__c4800Hz 4
+#define R_SERIAL0_BAUD__rec_baud__rec_baud__c57k6Hz 8
+#define R_SERIAL0_BAUD__rec_baud__rec_baud__c600Hz 1
+#define R_SERIAL0_BAUD__rec_baud__rec_baud__c6250kHz 14
+#define R_SERIAL0_BAUD__rec_baud__rec_baud__c921k6Hz 12
+#define R_SERIAL0_BAUD__rec_baud__rec_baud__c9600Hz 5
+
+#endif
+
+/*
+ * R_SERIAL0_CTRL
+ * - type: WO
+ * - addr: 0xb0000060
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL0_CTRL__ADDR (REG_TYPECAST_UDWORD 0xb0000060)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL0_CTRL__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_SERIAL0_CTRL + 0))
+#define R_SERIAL0_CTRL__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_SERIAL0_CTRL + 0))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL0_CTRL__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_SERIAL0_CTRL__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL0_CTRL__STYPECAST REG_STYPECAST_UDWORD
+#define R_SERIAL0_CTRL__SVAL REG_SVAL_SHADOW
+#define R_SERIAL0_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL0_CTRL__TYPECAST REG_TYPECAST_UDWORD
+#define R_SERIAL0_CTRL__TYPE (REG_UDWORD)
+#define R_SERIAL0_CTRL__GET REG_GET_WO
+#define R_SERIAL0_CTRL__IGET REG_IGET_WO
+#define R_SERIAL0_CTRL__SET REG_SET_WO
+#define R_SERIAL0_CTRL__ISET REG_ISET_WO
+#define R_SERIAL0_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL0_CTRL__EQL REG_EQL_WO
+#define R_SERIAL0_CTRL__IEQL REG_IEQL_WO
+#define R_SERIAL0_CTRL__RD REG_RD_WO
+#define R_SERIAL0_CTRL__IRD REG_IRD_WO
+#define R_SERIAL0_CTRL__WR REG_WR_WO
+#define R_SERIAL0_CTRL__IWR REG_IWR_WO
+
+#define R_SERIAL0_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_SERIAL0_CTRL__FIRST 0
+#define R_SERIAL0_CTRL__IOFFSET 8
+#define R_SERIAL0_CTRL__LAST 3
+#define R_SERIAL0_CTRL__OFFSET 8
+#define R_SERIAL0_CTRL__SOFFSET 8
+/* end */
+
+#define R_SERIAL0_CTRL__tr_baud__tr_baud__MASK 0xf0000000U
+#define R_SERIAL0_CTRL__rec_baud__rec_baud__MASK 0x0f000000U
+#define R_SERIAL0_CTRL__dma_err__dma_err__MASK 0x00800000U
+#define R_SERIAL0_CTRL__rec_enable__rec_enable__MASK 0x00400000U
+#define R_SERIAL0_CTRL__rts___rts___MASK 0x00200000U
+#define R_SERIAL0_CTRL__sampling__sampling__MASK 0x00100000U
+#define R_SERIAL0_CTRL__rec_stick_par__rec_stick_par__MASK 0x00080000U
+#define R_SERIAL0_CTRL__rec_par__rec_par__MASK 0x00040000U
+#define R_SERIAL0_CTRL__rec_par_en__rec_par_en__MASK 0x00020000U
+#define R_SERIAL0_CTRL__rec_bitnr__rec_bitnr__MASK 0x00010000U
+#define R_SERIAL0_CTRL__txd__txd__MASK 0x00008000U
+#define R_SERIAL0_CTRL__tr_enable__tr_enable__MASK 0x00004000U
+#define R_SERIAL0_CTRL__auto_cts__auto_cts__MASK 0x00002000U
+#define R_SERIAL0_CTRL__stop_bits__stop_bits__MASK 0x00001000U
+#define R_SERIAL0_CTRL__tr_stick_par__tr_stick_par__MASK 0x00000800U
+#define R_SERIAL0_CTRL__tr_par__tr_par__MASK 0x00000400U
+#define R_SERIAL0_CTRL__tr_par_en__tr_par_en__MASK 0x00000200U
+#define R_SERIAL0_CTRL__tr_bitnr__tr_bitnr__MASK 0x00000100U
+#define R_SERIAL0_CTRL__data_out__data_out__MASK 0x000000ffU
+
+#define R_SERIAL0_CTRL__tr_baud__MAX 0xf
+#define R_SERIAL0_CTRL__rec_baud__MAX 0xf
+#define R_SERIAL0_CTRL__dma_err__MAX 0x1
+#define R_SERIAL0_CTRL__rec_enable__MAX 0x1
+#define R_SERIAL0_CTRL__rts___MAX 0x1
+#define R_SERIAL0_CTRL__sampling__MAX 0x1
+#define R_SERIAL0_CTRL__rec_stick_par__MAX 0x1
+#define R_SERIAL0_CTRL__rec_par__MAX 0x1
+#define R_SERIAL0_CTRL__rec_par_en__MAX 0x1
+#define R_SERIAL0_CTRL__rec_bitnr__MAX 0x1
+#define R_SERIAL0_CTRL__txd__MAX 0x1
+#define R_SERIAL0_CTRL__tr_enable__MAX 0x1
+#define R_SERIAL0_CTRL__auto_cts__MAX 0x1
+#define R_SERIAL0_CTRL__stop_bits__MAX 0x1
+#define R_SERIAL0_CTRL__tr_stick_par__MAX 0x1
+#define R_SERIAL0_CTRL__tr_par__MAX 0x1
+#define R_SERIAL0_CTRL__tr_par_en__MAX 0x1
+#define R_SERIAL0_CTRL__tr_bitnr__MAX 0x1
+#define R_SERIAL0_CTRL__data_out__MAX 0xff
+
+#define R_SERIAL0_CTRL__tr_baud__MIN 0
+#define R_SERIAL0_CTRL__rec_baud__MIN 0
+#define R_SERIAL0_CTRL__dma_err__MIN 0
+#define R_SERIAL0_CTRL__rec_enable__MIN 0
+#define R_SERIAL0_CTRL__rts___MIN 0
+#define R_SERIAL0_CTRL__sampling__MIN 0
+#define R_SERIAL0_CTRL__rec_stick_par__MIN 0
+#define R_SERIAL0_CTRL__rec_par__MIN 0
+#define R_SERIAL0_CTRL__rec_par_en__MIN 0
+#define R_SERIAL0_CTRL__rec_bitnr__MIN 0
+#define R_SERIAL0_CTRL__txd__MIN 0
+#define R_SERIAL0_CTRL__tr_enable__MIN 0
+#define R_SERIAL0_CTRL__auto_cts__MIN 0
+#define R_SERIAL0_CTRL__stop_bits__MIN 0
+#define R_SERIAL0_CTRL__tr_stick_par__MIN 0
+#define R_SERIAL0_CTRL__tr_par__MIN 0
+#define R_SERIAL0_CTRL__tr_par_en__MIN 0
+#define R_SERIAL0_CTRL__tr_bitnr__MIN 0
+#define R_SERIAL0_CTRL__data_out__MIN 0
+
+#define R_SERIAL0_CTRL__tr_baud__BITNR 28
+#define R_SERIAL0_CTRL__rec_baud__BITNR 24
+#define R_SERIAL0_CTRL__dma_err__BITNR 23
+#define R_SERIAL0_CTRL__rec_enable__BITNR 22
+#define R_SERIAL0_CTRL__rts___BITNR 21
+#define R_SERIAL0_CTRL__sampling__BITNR 20
+#define R_SERIAL0_CTRL__rec_stick_par__BITNR 19
+#define R_SERIAL0_CTRL__rec_par__BITNR 18
+#define R_SERIAL0_CTRL__rec_par_en__BITNR 17
+#define R_SERIAL0_CTRL__rec_bitnr__BITNR 16
+#define R_SERIAL0_CTRL__txd__BITNR 15
+#define R_SERIAL0_CTRL__tr_enable__BITNR 14
+#define R_SERIAL0_CTRL__auto_cts__BITNR 13
+#define R_SERIAL0_CTRL__stop_bits__BITNR 12
+#define R_SERIAL0_CTRL__tr_stick_par__BITNR 11
+#define R_SERIAL0_CTRL__tr_par__BITNR 10
+#define R_SERIAL0_CTRL__tr_par_en__BITNR 9
+#define R_SERIAL0_CTRL__tr_bitnr__BITNR 8
+#define R_SERIAL0_CTRL__data_out__BITNR 0
+
+#define R_SERIAL0_CTRL__tr_baud__tr_baud__VAL REG_VAL_ENUM
+#define R_SERIAL0_CTRL__rec_baud__rec_baud__VAL REG_VAL_ENUM
+#define R_SERIAL0_CTRL__dma_err__dma_err__VAL REG_VAL_ENUM
+#define R_SERIAL0_CTRL__rec_enable__rec_enable__VAL REG_VAL_ENUM
+#define R_SERIAL0_CTRL__rts___rts___VAL REG_VAL_ENUM
+#define R_SERIAL0_CTRL__sampling__sampling__VAL REG_VAL_ENUM
+#define R_SERIAL0_CTRL__rec_stick_par__rec_stick_par__VAL REG_VAL_ENUM
+#define R_SERIAL0_CTRL__rec_par__rec_par__VAL REG_VAL_ENUM
+#define R_SERIAL0_CTRL__rec_par_en__rec_par_en__VAL REG_VAL_ENUM
+#define R_SERIAL0_CTRL__rec_bitnr__rec_bitnr__VAL REG_VAL_ENUM
+#define R_SERIAL0_CTRL__txd__txd__VAL REG_VAL_VAL
+#define R_SERIAL0_CTRL__tr_enable__tr_enable__VAL REG_VAL_ENUM
+#define R_SERIAL0_CTRL__auto_cts__auto_cts__VAL REG_VAL_ENUM
+#define R_SERIAL0_CTRL__stop_bits__stop_bits__VAL REG_VAL_ENUM
+#define R_SERIAL0_CTRL__tr_stick_par__tr_stick_par__VAL REG_VAL_ENUM
+#define R_SERIAL0_CTRL__tr_par__tr_par__VAL REG_VAL_ENUM
+#define R_SERIAL0_CTRL__tr_par_en__tr_par_en__VAL REG_VAL_ENUM
+#define R_SERIAL0_CTRL__tr_bitnr__tr_bitnr__VAL REG_VAL_ENUM
+#define R_SERIAL0_CTRL__data_out__data_out__VAL REG_VAL_VAL
+
+#define R_SERIAL0_CTRL__tr_baud__tr_baud__c115k2Hz 9
+#define R_SERIAL0_CTRL__tr_baud__tr_baud__c1200Hz 2
+#define R_SERIAL0_CTRL__tr_baud__tr_baud__c1843k2Hz 13
+#define R_SERIAL0_CTRL__tr_baud__tr_baud__c19k2Hz 6
+#define R_SERIAL0_CTRL__tr_baud__tr_baud__c230k4Hz 10
+#define R_SERIAL0_CTRL__tr_baud__tr_baud__c2400Hz 3
+#define R_SERIAL0_CTRL__tr_baud__tr_baud__c300Hz 0
+#define R_SERIAL0_CTRL__tr_baud__tr_baud__c38k4Hz 7
+#define R_SERIAL0_CTRL__tr_baud__tr_baud__c460k8Hz 11
+#define R_SERIAL0_CTRL__tr_baud__tr_baud__c4800Hz 4
+#define R_SERIAL0_CTRL__tr_baud__tr_baud__c57k6Hz 8
+#define R_SERIAL0_CTRL__tr_baud__tr_baud__c600Hz 1
+#define R_SERIAL0_CTRL__tr_baud__tr_baud__c6250kHz 14
+#define R_SERIAL0_CTRL__tr_baud__tr_baud__c921k6Hz 12
+#define R_SERIAL0_CTRL__tr_baud__tr_baud__c9600Hz 5
+#define R_SERIAL0_CTRL__rec_baud__rec_baud__c115k2Hz 9
+#define R_SERIAL0_CTRL__rec_baud__rec_baud__c1200Hz 2
+#define R_SERIAL0_CTRL__rec_baud__rec_baud__c1843k2Hz 13
+#define R_SERIAL0_CTRL__rec_baud__rec_baud__c19k2Hz 6
+#define R_SERIAL0_CTRL__rec_baud__rec_baud__c230k4Hz 10
+#define R_SERIAL0_CTRL__rec_baud__rec_baud__c2400Hz 3
+#define R_SERIAL0_CTRL__rec_baud__rec_baud__c300Hz 0
+#define R_SERIAL0_CTRL__rec_baud__rec_baud__c38k4Hz 7
+#define R_SERIAL0_CTRL__rec_baud__rec_baud__c460k8Hz 11
+#define R_SERIAL0_CTRL__rec_baud__rec_baud__c4800Hz 4
+#define R_SERIAL0_CTRL__rec_baud__rec_baud__c57k6Hz 8
+#define R_SERIAL0_CTRL__rec_baud__rec_baud__c600Hz 1
+#define R_SERIAL0_CTRL__rec_baud__rec_baud__c6250kHz 14
+#define R_SERIAL0_CTRL__rec_baud__rec_baud__c921k6Hz 12
+#define R_SERIAL0_CTRL__rec_baud__rec_baud__c9600Hz 5
+#define R_SERIAL0_CTRL__dma_err__dma_err__ignore 1
+#define R_SERIAL0_CTRL__dma_err__dma_err__stop 0
+#define R_SERIAL0_CTRL__rec_enable__rec_enable__disable 0
+#define R_SERIAL0_CTRL__rec_enable__rec_enable__enable 1
+#define R_SERIAL0_CTRL__rts___rts___active 0
+#define R_SERIAL0_CTRL__rts___rts___inactive 1
+#define R_SERIAL0_CTRL__sampling__sampling__majority 1
+#define R_SERIAL0_CTRL__sampling__sampling__middle 0
+#define R_SERIAL0_CTRL__rec_stick_par__rec_stick_par__normal 0
+#define R_SERIAL0_CTRL__rec_stick_par__rec_stick_par__stick 1
+#define R_SERIAL0_CTRL__rec_par__rec_par__even 0
+#define R_SERIAL0_CTRL__rec_par__rec_par__odd 1
+#define R_SERIAL0_CTRL__rec_par_en__rec_par_en__disable 0
+#define R_SERIAL0_CTRL__rec_par_en__rec_par_en__enable 1
+#define R_SERIAL0_CTRL__rec_bitnr__rec_bitnr__rec_7bit 1
+#define R_SERIAL0_CTRL__rec_bitnr__rec_bitnr__rec_8bit 0
+#define R_SERIAL0_CTRL__tr_enable__tr_enable__disable 0
+#define R_SERIAL0_CTRL__tr_enable__tr_enable__enable 1
+#define R_SERIAL0_CTRL__auto_cts__auto_cts__active 1
+#define R_SERIAL0_CTRL__auto_cts__auto_cts__disabled 0
+#define R_SERIAL0_CTRL__stop_bits__stop_bits__one_bit 0
+#define R_SERIAL0_CTRL__stop_bits__stop_bits__two_bits 1
+#define R_SERIAL0_CTRL__tr_stick_par__tr_stick_par__normal 0
+#define R_SERIAL0_CTRL__tr_stick_par__tr_stick_par__stick 1
+#define R_SERIAL0_CTRL__tr_par__tr_par__even 0
+#define R_SERIAL0_CTRL__tr_par__tr_par__odd 1
+#define R_SERIAL0_CTRL__tr_par_en__tr_par_en__disable 0
+#define R_SERIAL0_CTRL__tr_par_en__tr_par_en__enable 1
+#define R_SERIAL0_CTRL__tr_bitnr__tr_bitnr__tr_7bit 1
+#define R_SERIAL0_CTRL__tr_bitnr__tr_bitnr__tr_8bit 0
+
+#endif
+
+/*
+ * R_SERIAL0_READ
+ * - type: RO
+ * - addr: 0xb0000060
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL0_READ__ADDR (REG_TYPECAST_UDWORD 0xb0000060)
+#define R_SERIAL0_READ__SVAL REG_SVAL_SHADOW
+#define R_SERIAL0_READ__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL0_READ__TYPECAST REG_TYPECAST_UDWORD
+#define R_SERIAL0_READ__TYPE (REG_UDWORD)
+#define R_SERIAL0_READ__GET REG_GET_RO
+#define R_SERIAL0_READ__IGET REG_IGET_RO
+#define R_SERIAL0_READ__SET REG_SET_RO
+#define R_SERIAL0_READ__ISET REG_ISET_RO
+#define R_SERIAL0_READ__SET_VAL REG_SET_VAL_RO
+#define R_SERIAL0_READ__EQL REG_EQL_RO
+#define R_SERIAL0_READ__IEQL REG_IEQL_RO
+#define R_SERIAL0_READ__RD REG_RD_RO
+#define R_SERIAL0_READ__IRD REG_IRD_RO
+#define R_SERIAL0_READ__WR REG_WR_RO
+#define R_SERIAL0_READ__IWR REG_IWR_RO
+
+#define R_SERIAL0_READ__READ(addr) \
+ (*(addr))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_SERIAL0_READ__FIRST 0
+#define R_SERIAL0_READ__LAST 3
+#define R_SERIAL0_READ__OFFSET 8
+/* end */
+
+#define R_SERIAL0_READ__xoff_detect__xoff_detect__MASK 0x00008000U
+#define R_SERIAL0_READ__cts___cts___MASK 0x00004000U
+#define R_SERIAL0_READ__tr_ready__tr_ready__MASK 0x00002000U
+#define R_SERIAL0_READ__rxd__rxd__MASK 0x00001000U
+#define R_SERIAL0_READ__overrun__overrun__MASK 0x00000800U
+#define R_SERIAL0_READ__par_err__par_err__MASK 0x00000400U
+#define R_SERIAL0_READ__framing_err__framing_err__MASK 0x00000200U
+#define R_SERIAL0_READ__data_avail__data_avail__MASK 0x00000100U
+#define R_SERIAL0_READ__data_in__data_in__MASK 0x000000ffU
+
+#define R_SERIAL0_READ__xoff_detect__MAX 0x1
+#define R_SERIAL0_READ__cts___MAX 0x1
+#define R_SERIAL0_READ__tr_ready__MAX 0x1
+#define R_SERIAL0_READ__rxd__MAX 0x1
+#define R_SERIAL0_READ__overrun__MAX 0x1
+#define R_SERIAL0_READ__par_err__MAX 0x1
+#define R_SERIAL0_READ__framing_err__MAX 0x1
+#define R_SERIAL0_READ__data_avail__MAX 0x1
+#define R_SERIAL0_READ__data_in__MAX 0xff
+
+#define R_SERIAL0_READ__xoff_detect__MIN 0
+#define R_SERIAL0_READ__cts___MIN 0
+#define R_SERIAL0_READ__tr_ready__MIN 0
+#define R_SERIAL0_READ__rxd__MIN 0
+#define R_SERIAL0_READ__overrun__MIN 0
+#define R_SERIAL0_READ__par_err__MIN 0
+#define R_SERIAL0_READ__framing_err__MIN 0
+#define R_SERIAL0_READ__data_avail__MIN 0
+#define R_SERIAL0_READ__data_in__MIN 0
+
+#define R_SERIAL0_READ__xoff_detect__BITNR 15
+#define R_SERIAL0_READ__cts___BITNR 14
+#define R_SERIAL0_READ__tr_ready__BITNR 13
+#define R_SERIAL0_READ__rxd__BITNR 12
+#define R_SERIAL0_READ__overrun__BITNR 11
+#define R_SERIAL0_READ__par_err__BITNR 10
+#define R_SERIAL0_READ__framing_err__BITNR 9
+#define R_SERIAL0_READ__data_avail__BITNR 8
+#define R_SERIAL0_READ__data_in__BITNR 0
+
+#define R_SERIAL0_READ__xoff_detect__xoff_detect__VAL REG_VAL_ENUM
+#define R_SERIAL0_READ__cts___cts___VAL REG_VAL_ENUM
+#define R_SERIAL0_READ__tr_ready__tr_ready__VAL REG_VAL_ENUM
+#define R_SERIAL0_READ__rxd__rxd__VAL REG_VAL_VAL
+#define R_SERIAL0_READ__overrun__overrun__VAL REG_VAL_ENUM
+#define R_SERIAL0_READ__par_err__par_err__VAL REG_VAL_ENUM
+#define R_SERIAL0_READ__framing_err__framing_err__VAL REG_VAL_ENUM
+#define R_SERIAL0_READ__data_avail__data_avail__VAL REG_VAL_ENUM
+#define R_SERIAL0_READ__data_in__data_in__VAL REG_VAL_VAL
+
+#define R_SERIAL0_READ__xoff_detect__xoff_detect__no_xoff 0
+#define R_SERIAL0_READ__xoff_detect__xoff_detect__xoff 1
+#define R_SERIAL0_READ__cts___cts___active 0
+#define R_SERIAL0_READ__cts___cts___inactive 1
+#define R_SERIAL0_READ__tr_ready__tr_ready__full 0
+#define R_SERIAL0_READ__tr_ready__tr_ready__ready 1
+#define R_SERIAL0_READ__overrun__overrun__no 0
+#define R_SERIAL0_READ__overrun__overrun__yes 1
+#define R_SERIAL0_READ__par_err__par_err__no 0
+#define R_SERIAL0_READ__par_err__par_err__yes 1
+#define R_SERIAL0_READ__framing_err__framing_err__no 0
+#define R_SERIAL0_READ__framing_err__framing_err__yes 1
+#define R_SERIAL0_READ__data_avail__data_avail__no 0
+#define R_SERIAL0_READ__data_avail__data_avail__yes 1
+
+#endif
+
+/*
+ * R_SERIAL0_REC_CTRL
+ * - type: WO
+ * - addr: 0xb0000062
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL0_REC_CTRL__ADDR (REG_TYPECAST_BYTE 0xb0000062)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL0_REC_CTRL__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_SERIAL0_CTRL + 2))
+#define R_SERIAL0_REC_CTRL__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_SERIAL0_CTRL + 2))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL0_REC_CTRL__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_SERIAL0_REC_CTRL__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL0_REC_CTRL__STYPECAST REG_STYPECAST_BYTE
+#define R_SERIAL0_REC_CTRL__SVAL REG_SVAL_SHADOW
+#define R_SERIAL0_REC_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL0_REC_CTRL__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL0_REC_CTRL__TYPE (REG_BYTE)
+#define R_SERIAL0_REC_CTRL__GET REG_GET_WO
+#define R_SERIAL0_REC_CTRL__IGET REG_IGET_WO
+#define R_SERIAL0_REC_CTRL__SET REG_SET_WO
+#define R_SERIAL0_REC_CTRL__ISET REG_ISET_WO
+#define R_SERIAL0_REC_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL0_REC_CTRL__EQL REG_EQL_WO
+#define R_SERIAL0_REC_CTRL__IEQL REG_IEQL_WO
+#define R_SERIAL0_REC_CTRL__RD REG_RD_WO
+#define R_SERIAL0_REC_CTRL__IRD REG_IRD_WO
+#define R_SERIAL0_REC_CTRL__WR REG_WR_WO
+#define R_SERIAL0_REC_CTRL__IWR REG_IWR_WO
+
+#define R_SERIAL0_REC_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_SERIAL0_REC_CTRL__FIRST 0
+#define R_SERIAL0_REC_CTRL__IOFFSET 8
+#define R_SERIAL0_REC_CTRL__LAST 3
+#define R_SERIAL0_REC_CTRL__OFFSET 8
+#define R_SERIAL0_REC_CTRL__SOFFSET 8
+/* end */
+
+#define R_SERIAL0_REC_CTRL__dma_err__dma_err__MASK 0x00000080U
+#define R_SERIAL0_REC_CTRL__rec_enable__rec_enable__MASK 0x00000040U
+#define R_SERIAL0_REC_CTRL__rts___rts___MASK 0x00000020U
+#define R_SERIAL0_REC_CTRL__sampling__sampling__MASK 0x00000010U
+#define R_SERIAL0_REC_CTRL__rec_stick_par__rec_stick_par__MASK 0x00000008U
+#define R_SERIAL0_REC_CTRL__rec_par__rec_par__MASK 0x00000004U
+#define R_SERIAL0_REC_CTRL__rec_par_en__rec_par_en__MASK 0x00000002U
+#define R_SERIAL0_REC_CTRL__rec_bitnr__rec_bitnr__MASK 0x00000001U
+
+#define R_SERIAL0_REC_CTRL__dma_err__MAX 0x1
+#define R_SERIAL0_REC_CTRL__rec_enable__MAX 0x1
+#define R_SERIAL0_REC_CTRL__rts___MAX 0x1
+#define R_SERIAL0_REC_CTRL__sampling__MAX 0x1
+#define R_SERIAL0_REC_CTRL__rec_stick_par__MAX 0x1
+#define R_SERIAL0_REC_CTRL__rec_par__MAX 0x1
+#define R_SERIAL0_REC_CTRL__rec_par_en__MAX 0x1
+#define R_SERIAL0_REC_CTRL__rec_bitnr__MAX 0x1
+
+#define R_SERIAL0_REC_CTRL__dma_err__MIN 0
+#define R_SERIAL0_REC_CTRL__rec_enable__MIN 0
+#define R_SERIAL0_REC_CTRL__rts___MIN 0
+#define R_SERIAL0_REC_CTRL__sampling__MIN 0
+#define R_SERIAL0_REC_CTRL__rec_stick_par__MIN 0
+#define R_SERIAL0_REC_CTRL__rec_par__MIN 0
+#define R_SERIAL0_REC_CTRL__rec_par_en__MIN 0
+#define R_SERIAL0_REC_CTRL__rec_bitnr__MIN 0
+
+#define R_SERIAL0_REC_CTRL__dma_err__BITNR 7
+#define R_SERIAL0_REC_CTRL__rec_enable__BITNR 6
+#define R_SERIAL0_REC_CTRL__rts___BITNR 5
+#define R_SERIAL0_REC_CTRL__sampling__BITNR 4
+#define R_SERIAL0_REC_CTRL__rec_stick_par__BITNR 3
+#define R_SERIAL0_REC_CTRL__rec_par__BITNR 2
+#define R_SERIAL0_REC_CTRL__rec_par_en__BITNR 1
+#define R_SERIAL0_REC_CTRL__rec_bitnr__BITNR 0
+
+#define R_SERIAL0_REC_CTRL__dma_err__dma_err__VAL REG_VAL_ENUM
+#define R_SERIAL0_REC_CTRL__rec_enable__rec_enable__VAL REG_VAL_ENUM
+#define R_SERIAL0_REC_CTRL__rts___rts___VAL REG_VAL_ENUM
+#define R_SERIAL0_REC_CTRL__sampling__sampling__VAL REG_VAL_ENUM
+#define R_SERIAL0_REC_CTRL__rec_stick_par__rec_stick_par__VAL REG_VAL_ENUM
+#define R_SERIAL0_REC_CTRL__rec_par__rec_par__VAL REG_VAL_ENUM
+#define R_SERIAL0_REC_CTRL__rec_par_en__rec_par_en__VAL REG_VAL_ENUM
+#define R_SERIAL0_REC_CTRL__rec_bitnr__rec_bitnr__VAL REG_VAL_ENUM
+
+#define R_SERIAL0_REC_CTRL__dma_err__dma_err__ignore 1
+#define R_SERIAL0_REC_CTRL__dma_err__dma_err__stop 0
+#define R_SERIAL0_REC_CTRL__rec_enable__rec_enable__disable 0
+#define R_SERIAL0_REC_CTRL__rec_enable__rec_enable__enable 1
+#define R_SERIAL0_REC_CTRL__rts___rts___active 0
+#define R_SERIAL0_REC_CTRL__rts___rts___inactive 1
+#define R_SERIAL0_REC_CTRL__sampling__sampling__majority 1
+#define R_SERIAL0_REC_CTRL__sampling__sampling__middle 0
+#define R_SERIAL0_REC_CTRL__rec_stick_par__rec_stick_par__normal 0
+#define R_SERIAL0_REC_CTRL__rec_stick_par__rec_stick_par__stick 1
+#define R_SERIAL0_REC_CTRL__rec_par__rec_par__even 0
+#define R_SERIAL0_REC_CTRL__rec_par__rec_par__odd 1
+#define R_SERIAL0_REC_CTRL__rec_par_en__rec_par_en__disable 0
+#define R_SERIAL0_REC_CTRL__rec_par_en__rec_par_en__enable 1
+#define R_SERIAL0_REC_CTRL__rec_bitnr__rec_bitnr__rec_7bit 1
+#define R_SERIAL0_REC_CTRL__rec_bitnr__rec_bitnr__rec_8bit 0
+
+#endif
+
+/*
+ * R_SERIAL0_REC_DATA
+ * - type: RO
+ * - addr: 0xb0000060
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL0_REC_DATA__ADDR (REG_TYPECAST_BYTE 0xb0000060)
+#define R_SERIAL0_REC_DATA__SVAL REG_SVAL_SHADOW
+#define R_SERIAL0_REC_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL0_REC_DATA__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL0_REC_DATA__TYPE (REG_BYTE)
+#define R_SERIAL0_REC_DATA__GET REG_GET_RO
+#define R_SERIAL0_REC_DATA__IGET REG_IGET_RO
+#define R_SERIAL0_REC_DATA__SET REG_SET_RO
+#define R_SERIAL0_REC_DATA__ISET REG_ISET_RO
+#define R_SERIAL0_REC_DATA__SET_VAL REG_SET_VAL_RO
+#define R_SERIAL0_REC_DATA__EQL REG_EQL_RO
+#define R_SERIAL0_REC_DATA__IEQL REG_IEQL_RO
+#define R_SERIAL0_REC_DATA__RD REG_RD_RO
+#define R_SERIAL0_REC_DATA__IRD REG_IRD_RO
+#define R_SERIAL0_REC_DATA__WR REG_WR_RO
+#define R_SERIAL0_REC_DATA__IWR REG_IWR_RO
+
+#define R_SERIAL0_REC_DATA__READ(addr) \
+ (*(addr))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_SERIAL0_REC_DATA__FIRST 0
+#define R_SERIAL0_REC_DATA__LAST 3
+#define R_SERIAL0_REC_DATA__OFFSET 8
+/* end */
+
+#define R_SERIAL0_REC_DATA__data_in__data_in__MASK 0x000000ffU
+
+#define R_SERIAL0_REC_DATA__data_in__MAX 0xff
+
+#define R_SERIAL0_REC_DATA__data_in__MIN 0
+
+#define R_SERIAL0_REC_DATA__data_in__BITNR 0
+
+#define R_SERIAL0_REC_DATA__data_in__data_in__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SERIAL0_STATUS
+ * - type: RO
+ * - addr: 0xb0000061
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL0_STATUS__ADDR (REG_TYPECAST_BYTE 0xb0000061)
+#define R_SERIAL0_STATUS__SVAL REG_SVAL_SHADOW
+#define R_SERIAL0_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL0_STATUS__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL0_STATUS__TYPE (REG_BYTE)
+#define R_SERIAL0_STATUS__GET REG_GET_RO
+#define R_SERIAL0_STATUS__IGET REG_IGET_RO
+#define R_SERIAL0_STATUS__SET REG_SET_RO
+#define R_SERIAL0_STATUS__ISET REG_ISET_RO
+#define R_SERIAL0_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_SERIAL0_STATUS__EQL REG_EQL_RO
+#define R_SERIAL0_STATUS__IEQL REG_IEQL_RO
+#define R_SERIAL0_STATUS__RD REG_RD_RO
+#define R_SERIAL0_STATUS__IRD REG_IRD_RO
+#define R_SERIAL0_STATUS__WR REG_WR_RO
+#define R_SERIAL0_STATUS__IWR REG_IWR_RO
+
+#define R_SERIAL0_STATUS__READ(addr) \
+ (*(addr))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_SERIAL0_STATUS__FIRST 0
+#define R_SERIAL0_STATUS__LAST 3
+#define R_SERIAL0_STATUS__OFFSET 8
+/* end */
+
+#define R_SERIAL0_STATUS__xoff_detect__xoff_detect__MASK 0x00000080U
+#define R_SERIAL0_STATUS__cts___cts___MASK 0x00000040U
+#define R_SERIAL0_STATUS__tr_ready__tr_ready__MASK 0x00000020U
+#define R_SERIAL0_STATUS__rxd__rxd__MASK 0x00000010U
+#define R_SERIAL0_STATUS__overrun__overrun__MASK 0x00000008U
+#define R_SERIAL0_STATUS__par_err__par_err__MASK 0x00000004U
+#define R_SERIAL0_STATUS__framing_err__framing_err__MASK 0x00000002U
+#define R_SERIAL0_STATUS__data_avail__data_avail__MASK 0x00000001U
+
+#define R_SERIAL0_STATUS__xoff_detect__MAX 0x1
+#define R_SERIAL0_STATUS__cts___MAX 0x1
+#define R_SERIAL0_STATUS__tr_ready__MAX 0x1
+#define R_SERIAL0_STATUS__rxd__MAX 0x1
+#define R_SERIAL0_STATUS__overrun__MAX 0x1
+#define R_SERIAL0_STATUS__par_err__MAX 0x1
+#define R_SERIAL0_STATUS__framing_err__MAX 0x1
+#define R_SERIAL0_STATUS__data_avail__MAX 0x1
+
+#define R_SERIAL0_STATUS__xoff_detect__MIN 0
+#define R_SERIAL0_STATUS__cts___MIN 0
+#define R_SERIAL0_STATUS__tr_ready__MIN 0
+#define R_SERIAL0_STATUS__rxd__MIN 0
+#define R_SERIAL0_STATUS__overrun__MIN 0
+#define R_SERIAL0_STATUS__par_err__MIN 0
+#define R_SERIAL0_STATUS__framing_err__MIN 0
+#define R_SERIAL0_STATUS__data_avail__MIN 0
+
+#define R_SERIAL0_STATUS__xoff_detect__BITNR 7
+#define R_SERIAL0_STATUS__cts___BITNR 6
+#define R_SERIAL0_STATUS__tr_ready__BITNR 5
+#define R_SERIAL0_STATUS__rxd__BITNR 4
+#define R_SERIAL0_STATUS__overrun__BITNR 3
+#define R_SERIAL0_STATUS__par_err__BITNR 2
+#define R_SERIAL0_STATUS__framing_err__BITNR 1
+#define R_SERIAL0_STATUS__data_avail__BITNR 0
+
+#define R_SERIAL0_STATUS__xoff_detect__xoff_detect__VAL REG_VAL_ENUM
+#define R_SERIAL0_STATUS__cts___cts___VAL REG_VAL_ENUM
+#define R_SERIAL0_STATUS__tr_ready__tr_ready__VAL REG_VAL_ENUM
+#define R_SERIAL0_STATUS__rxd__rxd__VAL REG_VAL_VAL
+#define R_SERIAL0_STATUS__overrun__overrun__VAL REG_VAL_ENUM
+#define R_SERIAL0_STATUS__par_err__par_err__VAL REG_VAL_ENUM
+#define R_SERIAL0_STATUS__framing_err__framing_err__VAL REG_VAL_ENUM
+#define R_SERIAL0_STATUS__data_avail__data_avail__VAL REG_VAL_ENUM
+
+#define R_SERIAL0_STATUS__xoff_detect__xoff_detect__no_xoff 0
+#define R_SERIAL0_STATUS__xoff_detect__xoff_detect__xoff 1
+#define R_SERIAL0_STATUS__cts___cts___active 0
+#define R_SERIAL0_STATUS__cts___cts___inactive 1
+#define R_SERIAL0_STATUS__tr_ready__tr_ready__full 0
+#define R_SERIAL0_STATUS__tr_ready__tr_ready__ready 1
+#define R_SERIAL0_STATUS__overrun__overrun__no 0
+#define R_SERIAL0_STATUS__overrun__overrun__yes 1
+#define R_SERIAL0_STATUS__par_err__par_err__no 0
+#define R_SERIAL0_STATUS__par_err__par_err__yes 1
+#define R_SERIAL0_STATUS__framing_err__framing_err__no 0
+#define R_SERIAL0_STATUS__framing_err__framing_err__yes 1
+#define R_SERIAL0_STATUS__data_avail__data_avail__no 0
+#define R_SERIAL0_STATUS__data_avail__data_avail__yes 1
+
+#endif
+
+/*
+ * R_SERIAL0_TR_CTRL
+ * - type: WO
+ * - addr: 0xb0000061
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL0_TR_CTRL__ADDR (REG_TYPECAST_BYTE 0xb0000061)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL0_TR_CTRL__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_SERIAL0_CTRL + 1))
+#define R_SERIAL0_TR_CTRL__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_SERIAL0_CTRL + 1))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL0_TR_CTRL__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_SERIAL0_TR_CTRL__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL0_TR_CTRL__STYPECAST REG_STYPECAST_BYTE
+#define R_SERIAL0_TR_CTRL__SVAL REG_SVAL_SHADOW
+#define R_SERIAL0_TR_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL0_TR_CTRL__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL0_TR_CTRL__TYPE (REG_BYTE)
+#define R_SERIAL0_TR_CTRL__GET REG_GET_WO
+#define R_SERIAL0_TR_CTRL__IGET REG_IGET_WO
+#define R_SERIAL0_TR_CTRL__SET REG_SET_WO
+#define R_SERIAL0_TR_CTRL__ISET REG_ISET_WO
+#define R_SERIAL0_TR_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL0_TR_CTRL__EQL REG_EQL_WO
+#define R_SERIAL0_TR_CTRL__IEQL REG_IEQL_WO
+#define R_SERIAL0_TR_CTRL__RD REG_RD_WO
+#define R_SERIAL0_TR_CTRL__IRD REG_IRD_WO
+#define R_SERIAL0_TR_CTRL__WR REG_WR_WO
+#define R_SERIAL0_TR_CTRL__IWR REG_IWR_WO
+
+#define R_SERIAL0_TR_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_SERIAL0_TR_CTRL__FIRST 0
+#define R_SERIAL0_TR_CTRL__IOFFSET 8
+#define R_SERIAL0_TR_CTRL__LAST 3
+#define R_SERIAL0_TR_CTRL__OFFSET 8
+#define R_SERIAL0_TR_CTRL__SOFFSET 8
+/* end */
+
+#define R_SERIAL0_TR_CTRL__txd__txd__MASK 0x00000080U
+#define R_SERIAL0_TR_CTRL__tr_enable__tr_enable__MASK 0x00000040U
+#define R_SERIAL0_TR_CTRL__auto_cts__auto_cts__MASK 0x00000020U
+#define R_SERIAL0_TR_CTRL__stop_bits__stop_bits__MASK 0x00000010U
+#define R_SERIAL0_TR_CTRL__tr_stick_par__tr_stick_par__MASK 0x00000008U
+#define R_SERIAL0_TR_CTRL__tr_par__tr_par__MASK 0x00000004U
+#define R_SERIAL0_TR_CTRL__tr_par_en__tr_par_en__MASK 0x00000002U
+#define R_SERIAL0_TR_CTRL__tr_bitnr__tr_bitnr__MASK 0x00000001U
+
+#define R_SERIAL0_TR_CTRL__txd__MAX 0x1
+#define R_SERIAL0_TR_CTRL__tr_enable__MAX 0x1
+#define R_SERIAL0_TR_CTRL__auto_cts__MAX 0x1
+#define R_SERIAL0_TR_CTRL__stop_bits__MAX 0x1
+#define R_SERIAL0_TR_CTRL__tr_stick_par__MAX 0x1
+#define R_SERIAL0_TR_CTRL__tr_par__MAX 0x1
+#define R_SERIAL0_TR_CTRL__tr_par_en__MAX 0x1
+#define R_SERIAL0_TR_CTRL__tr_bitnr__MAX 0x1
+
+#define R_SERIAL0_TR_CTRL__txd__MIN 0
+#define R_SERIAL0_TR_CTRL__tr_enable__MIN 0
+#define R_SERIAL0_TR_CTRL__auto_cts__MIN 0
+#define R_SERIAL0_TR_CTRL__stop_bits__MIN 0
+#define R_SERIAL0_TR_CTRL__tr_stick_par__MIN 0
+#define R_SERIAL0_TR_CTRL__tr_par__MIN 0
+#define R_SERIAL0_TR_CTRL__tr_par_en__MIN 0
+#define R_SERIAL0_TR_CTRL__tr_bitnr__MIN 0
+
+#define R_SERIAL0_TR_CTRL__txd__BITNR 7
+#define R_SERIAL0_TR_CTRL__tr_enable__BITNR 6
+#define R_SERIAL0_TR_CTRL__auto_cts__BITNR 5
+#define R_SERIAL0_TR_CTRL__stop_bits__BITNR 4
+#define R_SERIAL0_TR_CTRL__tr_stick_par__BITNR 3
+#define R_SERIAL0_TR_CTRL__tr_par__BITNR 2
+#define R_SERIAL0_TR_CTRL__tr_par_en__BITNR 1
+#define R_SERIAL0_TR_CTRL__tr_bitnr__BITNR 0
+
+#define R_SERIAL0_TR_CTRL__txd__txd__VAL REG_VAL_VAL
+#define R_SERIAL0_TR_CTRL__tr_enable__tr_enable__VAL REG_VAL_ENUM
+#define R_SERIAL0_TR_CTRL__auto_cts__auto_cts__VAL REG_VAL_ENUM
+#define R_SERIAL0_TR_CTRL__stop_bits__stop_bits__VAL REG_VAL_ENUM
+#define R_SERIAL0_TR_CTRL__tr_stick_par__tr_stick_par__VAL REG_VAL_ENUM
+#define R_SERIAL0_TR_CTRL__tr_par__tr_par__VAL REG_VAL_ENUM
+#define R_SERIAL0_TR_CTRL__tr_par_en__tr_par_en__VAL REG_VAL_ENUM
+#define R_SERIAL0_TR_CTRL__tr_bitnr__tr_bitnr__VAL REG_VAL_ENUM
+
+#define R_SERIAL0_TR_CTRL__tr_enable__tr_enable__disable 0
+#define R_SERIAL0_TR_CTRL__tr_enable__tr_enable__enable 1
+#define R_SERIAL0_TR_CTRL__auto_cts__auto_cts__active 1
+#define R_SERIAL0_TR_CTRL__auto_cts__auto_cts__disabled 0
+#define R_SERIAL0_TR_CTRL__stop_bits__stop_bits__one_bit 0
+#define R_SERIAL0_TR_CTRL__stop_bits__stop_bits__two_bits 1
+#define R_SERIAL0_TR_CTRL__tr_stick_par__tr_stick_par__normal 0
+#define R_SERIAL0_TR_CTRL__tr_stick_par__tr_stick_par__stick 1
+#define R_SERIAL0_TR_CTRL__tr_par__tr_par__even 0
+#define R_SERIAL0_TR_CTRL__tr_par__tr_par__odd 1
+#define R_SERIAL0_TR_CTRL__tr_par_en__tr_par_en__disable 0
+#define R_SERIAL0_TR_CTRL__tr_par_en__tr_par_en__enable 1
+#define R_SERIAL0_TR_CTRL__tr_bitnr__tr_bitnr__tr_7bit 1
+#define R_SERIAL0_TR_CTRL__tr_bitnr__tr_bitnr__tr_8bit 0
+
+#endif
+
+/*
+ * R_SERIAL0_TR_DATA
+ * - type: WO
+ * - addr: 0xb0000060
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL0_TR_DATA__ADDR (REG_TYPECAST_BYTE 0xb0000060)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL0_TR_DATA__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_SERIAL0_CTRL + 0))
+#define R_SERIAL0_TR_DATA__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_SERIAL0_CTRL + 0))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL0_TR_DATA__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_SERIAL0_TR_DATA__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL0_TR_DATA__STYPECAST REG_STYPECAST_BYTE
+#define R_SERIAL0_TR_DATA__SVAL REG_SVAL_SHADOW
+#define R_SERIAL0_TR_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL0_TR_DATA__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL0_TR_DATA__TYPE (REG_BYTE)
+#define R_SERIAL0_TR_DATA__GET REG_GET_WO
+#define R_SERIAL0_TR_DATA__IGET REG_IGET_WO
+#define R_SERIAL0_TR_DATA__SET REG_SET_WO
+#define R_SERIAL0_TR_DATA__ISET REG_ISET_WO
+#define R_SERIAL0_TR_DATA__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL0_TR_DATA__EQL REG_EQL_WO
+#define R_SERIAL0_TR_DATA__IEQL REG_IEQL_WO
+#define R_SERIAL0_TR_DATA__RD REG_RD_WO
+#define R_SERIAL0_TR_DATA__IRD REG_IRD_WO
+#define R_SERIAL0_TR_DATA__WR REG_WR_WO
+#define R_SERIAL0_TR_DATA__IWR REG_IWR_WO
+
+#define R_SERIAL0_TR_DATA__WRITE(addr,value) \
+ (*(addr) = (value))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_SERIAL0_TR_DATA__FIRST 0
+#define R_SERIAL0_TR_DATA__IOFFSET 8
+#define R_SERIAL0_TR_DATA__LAST 3
+#define R_SERIAL0_TR_DATA__OFFSET 8
+#define R_SERIAL0_TR_DATA__SOFFSET 8
+/* end */
+
+#define R_SERIAL0_TR_DATA__data_out__data_out__MASK 0x000000ffU
+
+#define R_SERIAL0_TR_DATA__data_out__MAX 0xff
+
+#define R_SERIAL0_TR_DATA__data_out__MIN 0
+
+#define R_SERIAL0_TR_DATA__data_out__BITNR 0
+
+#define R_SERIAL0_TR_DATA__data_out__data_out__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SERIAL0_XOFF
+ * - type: WO
+ * - addr: 0xb0000064
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL0_XOFF__ADDR (REG_TYPECAST_UDWORD 0xb0000064)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL0_XOFF__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_SERIAL0_XOFF + 0))
+#define R_SERIAL0_XOFF__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_SERIAL0_XOFF + 0))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL0_XOFF__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_SERIAL0_XOFF__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL0_XOFF__STYPECAST REG_STYPECAST_UDWORD
+#define R_SERIAL0_XOFF__SVAL REG_SVAL_SHADOW
+#define R_SERIAL0_XOFF__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL0_XOFF__TYPECAST REG_TYPECAST_UDWORD
+#define R_SERIAL0_XOFF__TYPE (REG_UDWORD)
+#define R_SERIAL0_XOFF__GET REG_GET_WO
+#define R_SERIAL0_XOFF__IGET REG_IGET_WO
+#define R_SERIAL0_XOFF__SET REG_SET_WO
+#define R_SERIAL0_XOFF__ISET REG_ISET_WO
+#define R_SERIAL0_XOFF__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL0_XOFF__EQL REG_EQL_WO
+#define R_SERIAL0_XOFF__IEQL REG_IEQL_WO
+#define R_SERIAL0_XOFF__RD REG_RD_WO
+#define R_SERIAL0_XOFF__IRD REG_IRD_WO
+#define R_SERIAL0_XOFF__WR REG_WR_WO
+#define R_SERIAL0_XOFF__IWR REG_IWR_WO
+
+#define R_SERIAL0_XOFF__WRITE(addr,value) \
+ (*(addr) = (value))
+
+/* From control-file '/n/asic/projects/etrax_ng/include//hwregs.ctrl' */
+#define R_SERIAL0_XOFF__FIRST 0
+#define R_SERIAL0_XOFF__IOFFSET 8
+#define R_SERIAL0_XOFF__LAST 3
+#define R_SERIAL0_XOFF__OFFSET 8
+#define R_SERIAL0_XOFF__SOFFSET 8
+/* end */
+
+#define R_SERIAL0_XOFF__tx_stop__tx_stop__MASK 0x00000200U
+#define R_SERIAL0_XOFF__auto_xoff__auto_xoff__MASK 0x00000100U
+#define R_SERIAL0_XOFF__xoff_char__xoff_char__MASK 0x000000ffU
+
+#define R_SERIAL0_XOFF__tx_stop__MAX 0x1
+#define R_SERIAL0_XOFF__auto_xoff__MAX 0x1
+#define R_SERIAL0_XOFF__xoff_char__MAX 0xff
+
+#define R_SERIAL0_XOFF__tx_stop__MIN 0
+#define R_SERIAL0_XOFF__auto_xoff__MIN 0
+#define R_SERIAL0_XOFF__xoff_char__MIN 0
+
+#define R_SERIAL0_XOFF__tx_stop__BITNR 9
+#define R_SERIAL0_XOFF__auto_xoff__BITNR 8
+#define R_SERIAL0_XOFF__xoff_char__BITNR 0
+
+#define R_SERIAL0_XOFF__tx_stop__tx_stop__VAL REG_VAL_ENUM
+#define R_SERIAL0_XOFF__auto_xoff__auto_xoff__VAL REG_VAL_ENUM
+#define R_SERIAL0_XOFF__xoff_char__xoff_char__VAL REG_VAL_VAL
+
+#define R_SERIAL0_XOFF__tx_stop__tx_stop__enable 0
+#define R_SERIAL0_XOFF__tx_stop__tx_stop__stop 1
+#define R_SERIAL0_XOFF__auto_xoff__auto_xoff__disable 0
+#define R_SERIAL0_XOFF__auto_xoff__auto_xoff__enable 1
+
+#endif
+
+/*
+ * R_SERIAL1_BAUD
+ * - type: WO
+ * - addr: 0xb000006b
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL1_BAUD__ADDR (REG_TYPECAST_BYTE 0xb000006b)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL1_BAUD__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_SERIAL1_CTRL + 3))
+#define R_SERIAL1_BAUD__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_SERIAL1_CTRL + 3))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL1_BAUD__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_SERIAL1_BAUD__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL1_BAUD__STYPECAST REG_STYPECAST_BYTE
+#define R_SERIAL1_BAUD__SVAL REG_SVAL_SHADOW
+#define R_SERIAL1_BAUD__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL1_BAUD__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL1_BAUD__TYPE (REG_BYTE)
+#define R_SERIAL1_BAUD__GET REG_GET_WO
+#define R_SERIAL1_BAUD__IGET REG_IGET_WO
+#define R_SERIAL1_BAUD__SET REG_SET_WO
+#define R_SERIAL1_BAUD__ISET REG_ISET_WO
+#define R_SERIAL1_BAUD__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL1_BAUD__EQL REG_EQL_WO
+#define R_SERIAL1_BAUD__IEQL REG_IEQL_WO
+#define R_SERIAL1_BAUD__RD REG_RD_WO
+#define R_SERIAL1_BAUD__IRD REG_IRD_WO
+#define R_SERIAL1_BAUD__WR REG_WR_WO
+#define R_SERIAL1_BAUD__IWR REG_IWR_WO
+
+#define R_SERIAL1_BAUD__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SERIAL1_BAUD__tr_baud__tr_baud__MASK 0x000000f0U
+#define R_SERIAL1_BAUD__rec_baud__rec_baud__MASK 0x0000000fU
+
+#define R_SERIAL1_BAUD__tr_baud__MAX 0xf
+#define R_SERIAL1_BAUD__rec_baud__MAX 0xf
+
+#define R_SERIAL1_BAUD__tr_baud__MIN 0
+#define R_SERIAL1_BAUD__rec_baud__MIN 0
+
+#define R_SERIAL1_BAUD__tr_baud__BITNR 4
+#define R_SERIAL1_BAUD__rec_baud__BITNR 0
+
+#define R_SERIAL1_BAUD__tr_baud__tr_baud__VAL REG_VAL_ENUM
+#define R_SERIAL1_BAUD__rec_baud__rec_baud__VAL REG_VAL_ENUM
+
+#define R_SERIAL1_BAUD__tr_baud__tr_baud__c115k2Hz 9
+#define R_SERIAL1_BAUD__tr_baud__tr_baud__c1200Hz 2
+#define R_SERIAL1_BAUD__tr_baud__tr_baud__c1843k2Hz 13
+#define R_SERIAL1_BAUD__tr_baud__tr_baud__c19k2Hz 6
+#define R_SERIAL1_BAUD__tr_baud__tr_baud__c230k4Hz 10
+#define R_SERIAL1_BAUD__tr_baud__tr_baud__c2400Hz 3
+#define R_SERIAL1_BAUD__tr_baud__tr_baud__c300Hz 0
+#define R_SERIAL1_BAUD__tr_baud__tr_baud__c38k4Hz 7
+#define R_SERIAL1_BAUD__tr_baud__tr_baud__c460k8Hz 11
+#define R_SERIAL1_BAUD__tr_baud__tr_baud__c4800Hz 4
+#define R_SERIAL1_BAUD__tr_baud__tr_baud__c57k6Hz 8
+#define R_SERIAL1_BAUD__tr_baud__tr_baud__c600Hz 1
+#define R_SERIAL1_BAUD__tr_baud__tr_baud__c6250kHz 14
+#define R_SERIAL1_BAUD__tr_baud__tr_baud__c921k6Hz 12
+#define R_SERIAL1_BAUD__tr_baud__tr_baud__c9600Hz 5
+#define R_SERIAL1_BAUD__rec_baud__rec_baud__c115k2Hz 9
+#define R_SERIAL1_BAUD__rec_baud__rec_baud__c1200Hz 2
+#define R_SERIAL1_BAUD__rec_baud__rec_baud__c1843k2Hz 13
+#define R_SERIAL1_BAUD__rec_baud__rec_baud__c19k2Hz 6
+#define R_SERIAL1_BAUD__rec_baud__rec_baud__c230k4Hz 10
+#define R_SERIAL1_BAUD__rec_baud__rec_baud__c2400Hz 3
+#define R_SERIAL1_BAUD__rec_baud__rec_baud__c300Hz 0
+#define R_SERIAL1_BAUD__rec_baud__rec_baud__c38k4Hz 7
+#define R_SERIAL1_BAUD__rec_baud__rec_baud__c460k8Hz 11
+#define R_SERIAL1_BAUD__rec_baud__rec_baud__c4800Hz 4
+#define R_SERIAL1_BAUD__rec_baud__rec_baud__c57k6Hz 8
+#define R_SERIAL1_BAUD__rec_baud__rec_baud__c600Hz 1
+#define R_SERIAL1_BAUD__rec_baud__rec_baud__c6250kHz 14
+#define R_SERIAL1_BAUD__rec_baud__rec_baud__c921k6Hz 12
+#define R_SERIAL1_BAUD__rec_baud__rec_baud__c9600Hz 5
+
+#endif
+
+/*
+ * R_SERIAL1_CTRL
+ * - type: WO
+ * - addr: 0xb0000068
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL1_CTRL__ADDR (REG_TYPECAST_UDWORD 0xb0000068)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL1_CTRL__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_SERIAL1_CTRL + 0))
+#define R_SERIAL1_CTRL__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_SERIAL1_CTRL + 0))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL1_CTRL__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_SERIAL1_CTRL__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL1_CTRL__STYPECAST REG_STYPECAST_UDWORD
+#define R_SERIAL1_CTRL__SVAL REG_SVAL_SHADOW
+#define R_SERIAL1_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL1_CTRL__TYPECAST REG_TYPECAST_UDWORD
+#define R_SERIAL1_CTRL__TYPE (REG_UDWORD)
+#define R_SERIAL1_CTRL__GET REG_GET_WO
+#define R_SERIAL1_CTRL__IGET REG_IGET_WO
+#define R_SERIAL1_CTRL__SET REG_SET_WO
+#define R_SERIAL1_CTRL__ISET REG_ISET_WO
+#define R_SERIAL1_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL1_CTRL__EQL REG_EQL_WO
+#define R_SERIAL1_CTRL__IEQL REG_IEQL_WO
+#define R_SERIAL1_CTRL__RD REG_RD_WO
+#define R_SERIAL1_CTRL__IRD REG_IRD_WO
+#define R_SERIAL1_CTRL__WR REG_WR_WO
+#define R_SERIAL1_CTRL__IWR REG_IWR_WO
+
+#define R_SERIAL1_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SERIAL1_CTRL__tr_baud__tr_baud__MASK 0xf0000000U
+#define R_SERIAL1_CTRL__rec_baud__rec_baud__MASK 0x0f000000U
+#define R_SERIAL1_CTRL__dma_err__dma_err__MASK 0x00800000U
+#define R_SERIAL1_CTRL__rec_enable__rec_enable__MASK 0x00400000U
+#define R_SERIAL1_CTRL__rts___rts___MASK 0x00200000U
+#define R_SERIAL1_CTRL__sampling__sampling__MASK 0x00100000U
+#define R_SERIAL1_CTRL__rec_stick_par__rec_stick_par__MASK 0x00080000U
+#define R_SERIAL1_CTRL__rec_par__rec_par__MASK 0x00040000U
+#define R_SERIAL1_CTRL__rec_par_en__rec_par_en__MASK 0x00020000U
+#define R_SERIAL1_CTRL__rec_bitnr__rec_bitnr__MASK 0x00010000U
+#define R_SERIAL1_CTRL__txd__txd__MASK 0x00008000U
+#define R_SERIAL1_CTRL__tr_enable__tr_enable__MASK 0x00004000U
+#define R_SERIAL1_CTRL__auto_cts__auto_cts__MASK 0x00002000U
+#define R_SERIAL1_CTRL__stop_bits__stop_bits__MASK 0x00001000U
+#define R_SERIAL1_CTRL__tr_stick_par__tr_stick_par__MASK 0x00000800U
+#define R_SERIAL1_CTRL__tr_par__tr_par__MASK 0x00000400U
+#define R_SERIAL1_CTRL__tr_par_en__tr_par_en__MASK 0x00000200U
+#define R_SERIAL1_CTRL__tr_bitnr__tr_bitnr__MASK 0x00000100U
+#define R_SERIAL1_CTRL__data_out__data_out__MASK 0x000000ffU
+
+#define R_SERIAL1_CTRL__tr_baud__MAX 0xf
+#define R_SERIAL1_CTRL__rec_baud__MAX 0xf
+#define R_SERIAL1_CTRL__dma_err__MAX 0x1
+#define R_SERIAL1_CTRL__rec_enable__MAX 0x1
+#define R_SERIAL1_CTRL__rts___MAX 0x1
+#define R_SERIAL1_CTRL__sampling__MAX 0x1
+#define R_SERIAL1_CTRL__rec_stick_par__MAX 0x1
+#define R_SERIAL1_CTRL__rec_par__MAX 0x1
+#define R_SERIAL1_CTRL__rec_par_en__MAX 0x1
+#define R_SERIAL1_CTRL__rec_bitnr__MAX 0x1
+#define R_SERIAL1_CTRL__txd__MAX 0x1
+#define R_SERIAL1_CTRL__tr_enable__MAX 0x1
+#define R_SERIAL1_CTRL__auto_cts__MAX 0x1
+#define R_SERIAL1_CTRL__stop_bits__MAX 0x1
+#define R_SERIAL1_CTRL__tr_stick_par__MAX 0x1
+#define R_SERIAL1_CTRL__tr_par__MAX 0x1
+#define R_SERIAL1_CTRL__tr_par_en__MAX 0x1
+#define R_SERIAL1_CTRL__tr_bitnr__MAX 0x1
+#define R_SERIAL1_CTRL__data_out__MAX 0xff
+
+#define R_SERIAL1_CTRL__tr_baud__MIN 0
+#define R_SERIAL1_CTRL__rec_baud__MIN 0
+#define R_SERIAL1_CTRL__dma_err__MIN 0
+#define R_SERIAL1_CTRL__rec_enable__MIN 0
+#define R_SERIAL1_CTRL__rts___MIN 0
+#define R_SERIAL1_CTRL__sampling__MIN 0
+#define R_SERIAL1_CTRL__rec_stick_par__MIN 0
+#define R_SERIAL1_CTRL__rec_par__MIN 0
+#define R_SERIAL1_CTRL__rec_par_en__MIN 0
+#define R_SERIAL1_CTRL__rec_bitnr__MIN 0
+#define R_SERIAL1_CTRL__txd__MIN 0
+#define R_SERIAL1_CTRL__tr_enable__MIN 0
+#define R_SERIAL1_CTRL__auto_cts__MIN 0
+#define R_SERIAL1_CTRL__stop_bits__MIN 0
+#define R_SERIAL1_CTRL__tr_stick_par__MIN 0
+#define R_SERIAL1_CTRL__tr_par__MIN 0
+#define R_SERIAL1_CTRL__tr_par_en__MIN 0
+#define R_SERIAL1_CTRL__tr_bitnr__MIN 0
+#define R_SERIAL1_CTRL__data_out__MIN 0
+
+#define R_SERIAL1_CTRL__tr_baud__BITNR 28
+#define R_SERIAL1_CTRL__rec_baud__BITNR 24
+#define R_SERIAL1_CTRL__dma_err__BITNR 23
+#define R_SERIAL1_CTRL__rec_enable__BITNR 22
+#define R_SERIAL1_CTRL__rts___BITNR 21
+#define R_SERIAL1_CTRL__sampling__BITNR 20
+#define R_SERIAL1_CTRL__rec_stick_par__BITNR 19
+#define R_SERIAL1_CTRL__rec_par__BITNR 18
+#define R_SERIAL1_CTRL__rec_par_en__BITNR 17
+#define R_SERIAL1_CTRL__rec_bitnr__BITNR 16
+#define R_SERIAL1_CTRL__txd__BITNR 15
+#define R_SERIAL1_CTRL__tr_enable__BITNR 14
+#define R_SERIAL1_CTRL__auto_cts__BITNR 13
+#define R_SERIAL1_CTRL__stop_bits__BITNR 12
+#define R_SERIAL1_CTRL__tr_stick_par__BITNR 11
+#define R_SERIAL1_CTRL__tr_par__BITNR 10
+#define R_SERIAL1_CTRL__tr_par_en__BITNR 9
+#define R_SERIAL1_CTRL__tr_bitnr__BITNR 8
+#define R_SERIAL1_CTRL__data_out__BITNR 0
+
+#define R_SERIAL1_CTRL__tr_baud__tr_baud__VAL REG_VAL_ENUM
+#define R_SERIAL1_CTRL__rec_baud__rec_baud__VAL REG_VAL_ENUM
+#define R_SERIAL1_CTRL__dma_err__dma_err__VAL REG_VAL_ENUM
+#define R_SERIAL1_CTRL__rec_enable__rec_enable__VAL REG_VAL_ENUM
+#define R_SERIAL1_CTRL__rts___rts___VAL REG_VAL_ENUM
+#define R_SERIAL1_CTRL__sampling__sampling__VAL REG_VAL_ENUM
+#define R_SERIAL1_CTRL__rec_stick_par__rec_stick_par__VAL REG_VAL_ENUM
+#define R_SERIAL1_CTRL__rec_par__rec_par__VAL REG_VAL_ENUM
+#define R_SERIAL1_CTRL__rec_par_en__rec_par_en__VAL REG_VAL_ENUM
+#define R_SERIAL1_CTRL__rec_bitnr__rec_bitnr__VAL REG_VAL_ENUM
+#define R_SERIAL1_CTRL__txd__txd__VAL REG_VAL_VAL
+#define R_SERIAL1_CTRL__tr_enable__tr_enable__VAL REG_VAL_ENUM
+#define R_SERIAL1_CTRL__auto_cts__auto_cts__VAL REG_VAL_ENUM
+#define R_SERIAL1_CTRL__stop_bits__stop_bits__VAL REG_VAL_ENUM
+#define R_SERIAL1_CTRL__tr_stick_par__tr_stick_par__VAL REG_VAL_ENUM
+#define R_SERIAL1_CTRL__tr_par__tr_par__VAL REG_VAL_ENUM
+#define R_SERIAL1_CTRL__tr_par_en__tr_par_en__VAL REG_VAL_ENUM
+#define R_SERIAL1_CTRL__tr_bitnr__tr_bitnr__VAL REG_VAL_ENUM
+#define R_SERIAL1_CTRL__data_out__data_out__VAL REG_VAL_VAL
+
+#define R_SERIAL1_CTRL__tr_baud__tr_baud__c115k2Hz 9
+#define R_SERIAL1_CTRL__tr_baud__tr_baud__c1200Hz 2
+#define R_SERIAL1_CTRL__tr_baud__tr_baud__c1843k2Hz 13
+#define R_SERIAL1_CTRL__tr_baud__tr_baud__c19k2Hz 6
+#define R_SERIAL1_CTRL__tr_baud__tr_baud__c230k4Hz 10
+#define R_SERIAL1_CTRL__tr_baud__tr_baud__c2400Hz 3
+#define R_SERIAL1_CTRL__tr_baud__tr_baud__c300Hz 0
+#define R_SERIAL1_CTRL__tr_baud__tr_baud__c38k4Hz 7
+#define R_SERIAL1_CTRL__tr_baud__tr_baud__c460k8Hz 11
+#define R_SERIAL1_CTRL__tr_baud__tr_baud__c4800Hz 4
+#define R_SERIAL1_CTRL__tr_baud__tr_baud__c57k6Hz 8
+#define R_SERIAL1_CTRL__tr_baud__tr_baud__c600Hz 1
+#define R_SERIAL1_CTRL__tr_baud__tr_baud__c6250kHz 14
+#define R_SERIAL1_CTRL__tr_baud__tr_baud__c921k6Hz 12
+#define R_SERIAL1_CTRL__tr_baud__tr_baud__c9600Hz 5
+#define R_SERIAL1_CTRL__rec_baud__rec_baud__c115k2Hz 9
+#define R_SERIAL1_CTRL__rec_baud__rec_baud__c1200Hz 2
+#define R_SERIAL1_CTRL__rec_baud__rec_baud__c1843k2Hz 13
+#define R_SERIAL1_CTRL__rec_baud__rec_baud__c19k2Hz 6
+#define R_SERIAL1_CTRL__rec_baud__rec_baud__c230k4Hz 10
+#define R_SERIAL1_CTRL__rec_baud__rec_baud__c2400Hz 3
+#define R_SERIAL1_CTRL__rec_baud__rec_baud__c300Hz 0
+#define R_SERIAL1_CTRL__rec_baud__rec_baud__c38k4Hz 7
+#define R_SERIAL1_CTRL__rec_baud__rec_baud__c460k8Hz 11
+#define R_SERIAL1_CTRL__rec_baud__rec_baud__c4800Hz 4
+#define R_SERIAL1_CTRL__rec_baud__rec_baud__c57k6Hz 8
+#define R_SERIAL1_CTRL__rec_baud__rec_baud__c600Hz 1
+#define R_SERIAL1_CTRL__rec_baud__rec_baud__c6250kHz 14
+#define R_SERIAL1_CTRL__rec_baud__rec_baud__c921k6Hz 12
+#define R_SERIAL1_CTRL__rec_baud__rec_baud__c9600Hz 5
+#define R_SERIAL1_CTRL__dma_err__dma_err__ignore 1
+#define R_SERIAL1_CTRL__dma_err__dma_err__stop 0
+#define R_SERIAL1_CTRL__rec_enable__rec_enable__disable 0
+#define R_SERIAL1_CTRL__rec_enable__rec_enable__enable 1
+#define R_SERIAL1_CTRL__rts___rts___active 0
+#define R_SERIAL1_CTRL__rts___rts___inactive 1
+#define R_SERIAL1_CTRL__sampling__sampling__majority 1
+#define R_SERIAL1_CTRL__sampling__sampling__middle 0
+#define R_SERIAL1_CTRL__rec_stick_par__rec_stick_par__normal 0
+#define R_SERIAL1_CTRL__rec_stick_par__rec_stick_par__stick 1
+#define R_SERIAL1_CTRL__rec_par__rec_par__even 0
+#define R_SERIAL1_CTRL__rec_par__rec_par__odd 1
+#define R_SERIAL1_CTRL__rec_par_en__rec_par_en__disable 0
+#define R_SERIAL1_CTRL__rec_par_en__rec_par_en__enable 1
+#define R_SERIAL1_CTRL__rec_bitnr__rec_bitnr__rec_7bit 1
+#define R_SERIAL1_CTRL__rec_bitnr__rec_bitnr__rec_8bit 0
+#define R_SERIAL1_CTRL__tr_enable__tr_enable__disable 0
+#define R_SERIAL1_CTRL__tr_enable__tr_enable__enable 1
+#define R_SERIAL1_CTRL__auto_cts__auto_cts__active 1
+#define R_SERIAL1_CTRL__auto_cts__auto_cts__disabled 0
+#define R_SERIAL1_CTRL__stop_bits__stop_bits__one_bit 0
+#define R_SERIAL1_CTRL__stop_bits__stop_bits__two_bits 1
+#define R_SERIAL1_CTRL__tr_stick_par__tr_stick_par__normal 0
+#define R_SERIAL1_CTRL__tr_stick_par__tr_stick_par__stick 1
+#define R_SERIAL1_CTRL__tr_par__tr_par__even 0
+#define R_SERIAL1_CTRL__tr_par__tr_par__odd 1
+#define R_SERIAL1_CTRL__tr_par_en__tr_par_en__disable 0
+#define R_SERIAL1_CTRL__tr_par_en__tr_par_en__enable 1
+#define R_SERIAL1_CTRL__tr_bitnr__tr_bitnr__tr_7bit 1
+#define R_SERIAL1_CTRL__tr_bitnr__tr_bitnr__tr_8bit 0
+
+#endif
+
+/*
+ * R_SERIAL1_READ
+ * - type: RO
+ * - addr: 0xb0000068
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL1_READ__ADDR (REG_TYPECAST_UDWORD 0xb0000068)
+#define R_SERIAL1_READ__SVAL REG_SVAL_SHADOW
+#define R_SERIAL1_READ__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL1_READ__TYPECAST REG_TYPECAST_UDWORD
+#define R_SERIAL1_READ__TYPE (REG_UDWORD)
+#define R_SERIAL1_READ__GET REG_GET_RO
+#define R_SERIAL1_READ__IGET REG_IGET_RO
+#define R_SERIAL1_READ__SET REG_SET_RO
+#define R_SERIAL1_READ__ISET REG_ISET_RO
+#define R_SERIAL1_READ__SET_VAL REG_SET_VAL_RO
+#define R_SERIAL1_READ__EQL REG_EQL_RO
+#define R_SERIAL1_READ__IEQL REG_IEQL_RO
+#define R_SERIAL1_READ__RD REG_RD_RO
+#define R_SERIAL1_READ__IRD REG_IRD_RO
+#define R_SERIAL1_READ__WR REG_WR_RO
+#define R_SERIAL1_READ__IWR REG_IWR_RO
+
+#define R_SERIAL1_READ__READ(addr) \
+ (*(addr))
+
+#define R_SERIAL1_READ__xoff_detect__xoff_detect__MASK 0x00008000U
+#define R_SERIAL1_READ__cts___cts___MASK 0x00004000U
+#define R_SERIAL1_READ__tr_ready__tr_ready__MASK 0x00002000U
+#define R_SERIAL1_READ__rxd__rxd__MASK 0x00001000U
+#define R_SERIAL1_READ__overrun__overrun__MASK 0x00000800U
+#define R_SERIAL1_READ__par_err__par_err__MASK 0x00000400U
+#define R_SERIAL1_READ__framing_err__framing_err__MASK 0x00000200U
+#define R_SERIAL1_READ__data_avail__data_avail__MASK 0x00000100U
+#define R_SERIAL1_READ__data_in__data_in__MASK 0x000000ffU
+
+#define R_SERIAL1_READ__xoff_detect__MAX 0x1
+#define R_SERIAL1_READ__cts___MAX 0x1
+#define R_SERIAL1_READ__tr_ready__MAX 0x1
+#define R_SERIAL1_READ__rxd__MAX 0x1
+#define R_SERIAL1_READ__overrun__MAX 0x1
+#define R_SERIAL1_READ__par_err__MAX 0x1
+#define R_SERIAL1_READ__framing_err__MAX 0x1
+#define R_SERIAL1_READ__data_avail__MAX 0x1
+#define R_SERIAL1_READ__data_in__MAX 0xff
+
+#define R_SERIAL1_READ__xoff_detect__MIN 0
+#define R_SERIAL1_READ__cts___MIN 0
+#define R_SERIAL1_READ__tr_ready__MIN 0
+#define R_SERIAL1_READ__rxd__MIN 0
+#define R_SERIAL1_READ__overrun__MIN 0
+#define R_SERIAL1_READ__par_err__MIN 0
+#define R_SERIAL1_READ__framing_err__MIN 0
+#define R_SERIAL1_READ__data_avail__MIN 0
+#define R_SERIAL1_READ__data_in__MIN 0
+
+#define R_SERIAL1_READ__xoff_detect__BITNR 15
+#define R_SERIAL1_READ__cts___BITNR 14
+#define R_SERIAL1_READ__tr_ready__BITNR 13
+#define R_SERIAL1_READ__rxd__BITNR 12
+#define R_SERIAL1_READ__overrun__BITNR 11
+#define R_SERIAL1_READ__par_err__BITNR 10
+#define R_SERIAL1_READ__framing_err__BITNR 9
+#define R_SERIAL1_READ__data_avail__BITNR 8
+#define R_SERIAL1_READ__data_in__BITNR 0
+
+#define R_SERIAL1_READ__xoff_detect__xoff_detect__VAL REG_VAL_ENUM
+#define R_SERIAL1_READ__cts___cts___VAL REG_VAL_ENUM
+#define R_SERIAL1_READ__tr_ready__tr_ready__VAL REG_VAL_ENUM
+#define R_SERIAL1_READ__rxd__rxd__VAL REG_VAL_VAL
+#define R_SERIAL1_READ__overrun__overrun__VAL REG_VAL_ENUM
+#define R_SERIAL1_READ__par_err__par_err__VAL REG_VAL_ENUM
+#define R_SERIAL1_READ__framing_err__framing_err__VAL REG_VAL_ENUM
+#define R_SERIAL1_READ__data_avail__data_avail__VAL REG_VAL_ENUM
+#define R_SERIAL1_READ__data_in__data_in__VAL REG_VAL_VAL
+
+#define R_SERIAL1_READ__xoff_detect__xoff_detect__no_xoff 0
+#define R_SERIAL1_READ__xoff_detect__xoff_detect__xoff 1
+#define R_SERIAL1_READ__cts___cts___active 0
+#define R_SERIAL1_READ__cts___cts___inactive 1
+#define R_SERIAL1_READ__tr_ready__tr_ready__full 0
+#define R_SERIAL1_READ__tr_ready__tr_ready__ready 1
+#define R_SERIAL1_READ__overrun__overrun__no 0
+#define R_SERIAL1_READ__overrun__overrun__yes 1
+#define R_SERIAL1_READ__par_err__par_err__no 0
+#define R_SERIAL1_READ__par_err__par_err__yes 1
+#define R_SERIAL1_READ__framing_err__framing_err__no 0
+#define R_SERIAL1_READ__framing_err__framing_err__yes 1
+#define R_SERIAL1_READ__data_avail__data_avail__no 0
+#define R_SERIAL1_READ__data_avail__data_avail__yes 1
+
+#endif
+
+/*
+ * R_SERIAL1_REC_CTRL
+ * - type: WO
+ * - addr: 0xb000006a
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL1_REC_CTRL__ADDR (REG_TYPECAST_BYTE 0xb000006a)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL1_REC_CTRL__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_SERIAL1_CTRL + 2))
+#define R_SERIAL1_REC_CTRL__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_SERIAL1_CTRL + 2))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL1_REC_CTRL__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_SERIAL1_REC_CTRL__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL1_REC_CTRL__STYPECAST REG_STYPECAST_BYTE
+#define R_SERIAL1_REC_CTRL__SVAL REG_SVAL_SHADOW
+#define R_SERIAL1_REC_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL1_REC_CTRL__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL1_REC_CTRL__TYPE (REG_BYTE)
+#define R_SERIAL1_REC_CTRL__GET REG_GET_WO
+#define R_SERIAL1_REC_CTRL__IGET REG_IGET_WO
+#define R_SERIAL1_REC_CTRL__SET REG_SET_WO
+#define R_SERIAL1_REC_CTRL__ISET REG_ISET_WO
+#define R_SERIAL1_REC_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL1_REC_CTRL__EQL REG_EQL_WO
+#define R_SERIAL1_REC_CTRL__IEQL REG_IEQL_WO
+#define R_SERIAL1_REC_CTRL__RD REG_RD_WO
+#define R_SERIAL1_REC_CTRL__IRD REG_IRD_WO
+#define R_SERIAL1_REC_CTRL__WR REG_WR_WO
+#define R_SERIAL1_REC_CTRL__IWR REG_IWR_WO
+
+#define R_SERIAL1_REC_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SERIAL1_REC_CTRL__dma_err__dma_err__MASK 0x00000080U
+#define R_SERIAL1_REC_CTRL__rec_enable__rec_enable__MASK 0x00000040U
+#define R_SERIAL1_REC_CTRL__rts___rts___MASK 0x00000020U
+#define R_SERIAL1_REC_CTRL__sampling__sampling__MASK 0x00000010U
+#define R_SERIAL1_REC_CTRL__rec_stick_par__rec_stick_par__MASK 0x00000008U
+#define R_SERIAL1_REC_CTRL__rec_par__rec_par__MASK 0x00000004U
+#define R_SERIAL1_REC_CTRL__rec_par_en__rec_par_en__MASK 0x00000002U
+#define R_SERIAL1_REC_CTRL__rec_bitnr__rec_bitnr__MASK 0x00000001U
+
+#define R_SERIAL1_REC_CTRL__dma_err__MAX 0x1
+#define R_SERIAL1_REC_CTRL__rec_enable__MAX 0x1
+#define R_SERIAL1_REC_CTRL__rts___MAX 0x1
+#define R_SERIAL1_REC_CTRL__sampling__MAX 0x1
+#define R_SERIAL1_REC_CTRL__rec_stick_par__MAX 0x1
+#define R_SERIAL1_REC_CTRL__rec_par__MAX 0x1
+#define R_SERIAL1_REC_CTRL__rec_par_en__MAX 0x1
+#define R_SERIAL1_REC_CTRL__rec_bitnr__MAX 0x1
+
+#define R_SERIAL1_REC_CTRL__dma_err__MIN 0
+#define R_SERIAL1_REC_CTRL__rec_enable__MIN 0
+#define R_SERIAL1_REC_CTRL__rts___MIN 0
+#define R_SERIAL1_REC_CTRL__sampling__MIN 0
+#define R_SERIAL1_REC_CTRL__rec_stick_par__MIN 0
+#define R_SERIAL1_REC_CTRL__rec_par__MIN 0
+#define R_SERIAL1_REC_CTRL__rec_par_en__MIN 0
+#define R_SERIAL1_REC_CTRL__rec_bitnr__MIN 0
+
+#define R_SERIAL1_REC_CTRL__dma_err__BITNR 7
+#define R_SERIAL1_REC_CTRL__rec_enable__BITNR 6
+#define R_SERIAL1_REC_CTRL__rts___BITNR 5
+#define R_SERIAL1_REC_CTRL__sampling__BITNR 4
+#define R_SERIAL1_REC_CTRL__rec_stick_par__BITNR 3
+#define R_SERIAL1_REC_CTRL__rec_par__BITNR 2
+#define R_SERIAL1_REC_CTRL__rec_par_en__BITNR 1
+#define R_SERIAL1_REC_CTRL__rec_bitnr__BITNR 0
+
+#define R_SERIAL1_REC_CTRL__dma_err__dma_err__VAL REG_VAL_ENUM
+#define R_SERIAL1_REC_CTRL__rec_enable__rec_enable__VAL REG_VAL_ENUM
+#define R_SERIAL1_REC_CTRL__rts___rts___VAL REG_VAL_ENUM
+#define R_SERIAL1_REC_CTRL__sampling__sampling__VAL REG_VAL_ENUM
+#define R_SERIAL1_REC_CTRL__rec_stick_par__rec_stick_par__VAL REG_VAL_ENUM
+#define R_SERIAL1_REC_CTRL__rec_par__rec_par__VAL REG_VAL_ENUM
+#define R_SERIAL1_REC_CTRL__rec_par_en__rec_par_en__VAL REG_VAL_ENUM
+#define R_SERIAL1_REC_CTRL__rec_bitnr__rec_bitnr__VAL REG_VAL_ENUM
+
+#define R_SERIAL1_REC_CTRL__dma_err__dma_err__ignore 1
+#define R_SERIAL1_REC_CTRL__dma_err__dma_err__stop 0
+#define R_SERIAL1_REC_CTRL__rec_enable__rec_enable__disable 0
+#define R_SERIAL1_REC_CTRL__rec_enable__rec_enable__enable 1
+#define R_SERIAL1_REC_CTRL__rts___rts___active 0
+#define R_SERIAL1_REC_CTRL__rts___rts___inactive 1
+#define R_SERIAL1_REC_CTRL__sampling__sampling__majority 1
+#define R_SERIAL1_REC_CTRL__sampling__sampling__middle 0
+#define R_SERIAL1_REC_CTRL__rec_stick_par__rec_stick_par__normal 0
+#define R_SERIAL1_REC_CTRL__rec_stick_par__rec_stick_par__stick 1
+#define R_SERIAL1_REC_CTRL__rec_par__rec_par__even 0
+#define R_SERIAL1_REC_CTRL__rec_par__rec_par__odd 1
+#define R_SERIAL1_REC_CTRL__rec_par_en__rec_par_en__disable 0
+#define R_SERIAL1_REC_CTRL__rec_par_en__rec_par_en__enable 1
+#define R_SERIAL1_REC_CTRL__rec_bitnr__rec_bitnr__rec_7bit 1
+#define R_SERIAL1_REC_CTRL__rec_bitnr__rec_bitnr__rec_8bit 0
+
+#endif
+
+/*
+ * R_SERIAL1_REC_DATA
+ * - type: RO
+ * - addr: 0xb0000068
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL1_REC_DATA__ADDR (REG_TYPECAST_BYTE 0xb0000068)
+#define R_SERIAL1_REC_DATA__SVAL REG_SVAL_SHADOW
+#define R_SERIAL1_REC_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL1_REC_DATA__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL1_REC_DATA__TYPE (REG_BYTE)
+#define R_SERIAL1_REC_DATA__GET REG_GET_RO
+#define R_SERIAL1_REC_DATA__IGET REG_IGET_RO
+#define R_SERIAL1_REC_DATA__SET REG_SET_RO
+#define R_SERIAL1_REC_DATA__ISET REG_ISET_RO
+#define R_SERIAL1_REC_DATA__SET_VAL REG_SET_VAL_RO
+#define R_SERIAL1_REC_DATA__EQL REG_EQL_RO
+#define R_SERIAL1_REC_DATA__IEQL REG_IEQL_RO
+#define R_SERIAL1_REC_DATA__RD REG_RD_RO
+#define R_SERIAL1_REC_DATA__IRD REG_IRD_RO
+#define R_SERIAL1_REC_DATA__WR REG_WR_RO
+#define R_SERIAL1_REC_DATA__IWR REG_IWR_RO
+
+#define R_SERIAL1_REC_DATA__READ(addr) \
+ (*(addr))
+
+#define R_SERIAL1_REC_DATA__data_in__data_in__MASK 0x000000ffU
+
+#define R_SERIAL1_REC_DATA__data_in__MAX 0xff
+
+#define R_SERIAL1_REC_DATA__data_in__MIN 0
+
+#define R_SERIAL1_REC_DATA__data_in__BITNR 0
+
+#define R_SERIAL1_REC_DATA__data_in__data_in__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SERIAL1_STATUS
+ * - type: RO
+ * - addr: 0xb0000069
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL1_STATUS__ADDR (REG_TYPECAST_BYTE 0xb0000069)
+#define R_SERIAL1_STATUS__SVAL REG_SVAL_SHADOW
+#define R_SERIAL1_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL1_STATUS__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL1_STATUS__TYPE (REG_BYTE)
+#define R_SERIAL1_STATUS__GET REG_GET_RO
+#define R_SERIAL1_STATUS__IGET REG_IGET_RO
+#define R_SERIAL1_STATUS__SET REG_SET_RO
+#define R_SERIAL1_STATUS__ISET REG_ISET_RO
+#define R_SERIAL1_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_SERIAL1_STATUS__EQL REG_EQL_RO
+#define R_SERIAL1_STATUS__IEQL REG_IEQL_RO
+#define R_SERIAL1_STATUS__RD REG_RD_RO
+#define R_SERIAL1_STATUS__IRD REG_IRD_RO
+#define R_SERIAL1_STATUS__WR REG_WR_RO
+#define R_SERIAL1_STATUS__IWR REG_IWR_RO
+
+#define R_SERIAL1_STATUS__READ(addr) \
+ (*(addr))
+
+#define R_SERIAL1_STATUS__xoff_detect__xoff_detect__MASK 0x00000080U
+#define R_SERIAL1_STATUS__cts___cts___MASK 0x00000040U
+#define R_SERIAL1_STATUS__tr_ready__tr_ready__MASK 0x00000020U
+#define R_SERIAL1_STATUS__rxd__rxd__MASK 0x00000010U
+#define R_SERIAL1_STATUS__overrun__overrun__MASK 0x00000008U
+#define R_SERIAL1_STATUS__par_err__par_err__MASK 0x00000004U
+#define R_SERIAL1_STATUS__framing_err__framing_err__MASK 0x00000002U
+#define R_SERIAL1_STATUS__data_avail__data_avail__MASK 0x00000001U
+
+#define R_SERIAL1_STATUS__xoff_detect__MAX 0x1
+#define R_SERIAL1_STATUS__cts___MAX 0x1
+#define R_SERIAL1_STATUS__tr_ready__MAX 0x1
+#define R_SERIAL1_STATUS__rxd__MAX 0x1
+#define R_SERIAL1_STATUS__overrun__MAX 0x1
+#define R_SERIAL1_STATUS__par_err__MAX 0x1
+#define R_SERIAL1_STATUS__framing_err__MAX 0x1
+#define R_SERIAL1_STATUS__data_avail__MAX 0x1
+
+#define R_SERIAL1_STATUS__xoff_detect__MIN 0
+#define R_SERIAL1_STATUS__cts___MIN 0
+#define R_SERIAL1_STATUS__tr_ready__MIN 0
+#define R_SERIAL1_STATUS__rxd__MIN 0
+#define R_SERIAL1_STATUS__overrun__MIN 0
+#define R_SERIAL1_STATUS__par_err__MIN 0
+#define R_SERIAL1_STATUS__framing_err__MIN 0
+#define R_SERIAL1_STATUS__data_avail__MIN 0
+
+#define R_SERIAL1_STATUS__xoff_detect__BITNR 7
+#define R_SERIAL1_STATUS__cts___BITNR 6
+#define R_SERIAL1_STATUS__tr_ready__BITNR 5
+#define R_SERIAL1_STATUS__rxd__BITNR 4
+#define R_SERIAL1_STATUS__overrun__BITNR 3
+#define R_SERIAL1_STATUS__par_err__BITNR 2
+#define R_SERIAL1_STATUS__framing_err__BITNR 1
+#define R_SERIAL1_STATUS__data_avail__BITNR 0
+
+#define R_SERIAL1_STATUS__xoff_detect__xoff_detect__VAL REG_VAL_ENUM
+#define R_SERIAL1_STATUS__cts___cts___VAL REG_VAL_ENUM
+#define R_SERIAL1_STATUS__tr_ready__tr_ready__VAL REG_VAL_ENUM
+#define R_SERIAL1_STATUS__rxd__rxd__VAL REG_VAL_VAL
+#define R_SERIAL1_STATUS__overrun__overrun__VAL REG_VAL_ENUM
+#define R_SERIAL1_STATUS__par_err__par_err__VAL REG_VAL_ENUM
+#define R_SERIAL1_STATUS__framing_err__framing_err__VAL REG_VAL_ENUM
+#define R_SERIAL1_STATUS__data_avail__data_avail__VAL REG_VAL_ENUM
+
+#define R_SERIAL1_STATUS__xoff_detect__xoff_detect__no_xoff 0
+#define R_SERIAL1_STATUS__xoff_detect__xoff_detect__xoff 1
+#define R_SERIAL1_STATUS__cts___cts___active 0
+#define R_SERIAL1_STATUS__cts___cts___inactive 1
+#define R_SERIAL1_STATUS__tr_ready__tr_ready__full 0
+#define R_SERIAL1_STATUS__tr_ready__tr_ready__ready 1
+#define R_SERIAL1_STATUS__overrun__overrun__no 0
+#define R_SERIAL1_STATUS__overrun__overrun__yes 1
+#define R_SERIAL1_STATUS__par_err__par_err__no 0
+#define R_SERIAL1_STATUS__par_err__par_err__yes 1
+#define R_SERIAL1_STATUS__framing_err__framing_err__no 0
+#define R_SERIAL1_STATUS__framing_err__framing_err__yes 1
+#define R_SERIAL1_STATUS__data_avail__data_avail__no 0
+#define R_SERIAL1_STATUS__data_avail__data_avail__yes 1
+
+#endif
+
+/*
+ * R_SERIAL1_TR_CTRL
+ * - type: WO
+ * - addr: 0xb0000069
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL1_TR_CTRL__ADDR (REG_TYPECAST_BYTE 0xb0000069)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL1_TR_CTRL__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_SERIAL1_CTRL + 1))
+#define R_SERIAL1_TR_CTRL__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_SERIAL1_CTRL + 1))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL1_TR_CTRL__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_SERIAL1_TR_CTRL__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL1_TR_CTRL__STYPECAST REG_STYPECAST_BYTE
+#define R_SERIAL1_TR_CTRL__SVAL REG_SVAL_SHADOW
+#define R_SERIAL1_TR_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL1_TR_CTRL__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL1_TR_CTRL__TYPE (REG_BYTE)
+#define R_SERIAL1_TR_CTRL__GET REG_GET_WO
+#define R_SERIAL1_TR_CTRL__IGET REG_IGET_WO
+#define R_SERIAL1_TR_CTRL__SET REG_SET_WO
+#define R_SERIAL1_TR_CTRL__ISET REG_ISET_WO
+#define R_SERIAL1_TR_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL1_TR_CTRL__EQL REG_EQL_WO
+#define R_SERIAL1_TR_CTRL__IEQL REG_IEQL_WO
+#define R_SERIAL1_TR_CTRL__RD REG_RD_WO
+#define R_SERIAL1_TR_CTRL__IRD REG_IRD_WO
+#define R_SERIAL1_TR_CTRL__WR REG_WR_WO
+#define R_SERIAL1_TR_CTRL__IWR REG_IWR_WO
+
+#define R_SERIAL1_TR_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SERIAL1_TR_CTRL__txd__txd__MASK 0x00000080U
+#define R_SERIAL1_TR_CTRL__tr_enable__tr_enable__MASK 0x00000040U
+#define R_SERIAL1_TR_CTRL__auto_cts__auto_cts__MASK 0x00000020U
+#define R_SERIAL1_TR_CTRL__stop_bits__stop_bits__MASK 0x00000010U
+#define R_SERIAL1_TR_CTRL__tr_stick_par__tr_stick_par__MASK 0x00000008U
+#define R_SERIAL1_TR_CTRL__tr_par__tr_par__MASK 0x00000004U
+#define R_SERIAL1_TR_CTRL__tr_par_en__tr_par_en__MASK 0x00000002U
+#define R_SERIAL1_TR_CTRL__tr_bitnr__tr_bitnr__MASK 0x00000001U
+
+#define R_SERIAL1_TR_CTRL__txd__MAX 0x1
+#define R_SERIAL1_TR_CTRL__tr_enable__MAX 0x1
+#define R_SERIAL1_TR_CTRL__auto_cts__MAX 0x1
+#define R_SERIAL1_TR_CTRL__stop_bits__MAX 0x1
+#define R_SERIAL1_TR_CTRL__tr_stick_par__MAX 0x1
+#define R_SERIAL1_TR_CTRL__tr_par__MAX 0x1
+#define R_SERIAL1_TR_CTRL__tr_par_en__MAX 0x1
+#define R_SERIAL1_TR_CTRL__tr_bitnr__MAX 0x1
+
+#define R_SERIAL1_TR_CTRL__txd__MIN 0
+#define R_SERIAL1_TR_CTRL__tr_enable__MIN 0
+#define R_SERIAL1_TR_CTRL__auto_cts__MIN 0
+#define R_SERIAL1_TR_CTRL__stop_bits__MIN 0
+#define R_SERIAL1_TR_CTRL__tr_stick_par__MIN 0
+#define R_SERIAL1_TR_CTRL__tr_par__MIN 0
+#define R_SERIAL1_TR_CTRL__tr_par_en__MIN 0
+#define R_SERIAL1_TR_CTRL__tr_bitnr__MIN 0
+
+#define R_SERIAL1_TR_CTRL__txd__BITNR 7
+#define R_SERIAL1_TR_CTRL__tr_enable__BITNR 6
+#define R_SERIAL1_TR_CTRL__auto_cts__BITNR 5
+#define R_SERIAL1_TR_CTRL__stop_bits__BITNR 4
+#define R_SERIAL1_TR_CTRL__tr_stick_par__BITNR 3
+#define R_SERIAL1_TR_CTRL__tr_par__BITNR 2
+#define R_SERIAL1_TR_CTRL__tr_par_en__BITNR 1
+#define R_SERIAL1_TR_CTRL__tr_bitnr__BITNR 0
+
+#define R_SERIAL1_TR_CTRL__txd__txd__VAL REG_VAL_VAL
+#define R_SERIAL1_TR_CTRL__tr_enable__tr_enable__VAL REG_VAL_ENUM
+#define R_SERIAL1_TR_CTRL__auto_cts__auto_cts__VAL REG_VAL_ENUM
+#define R_SERIAL1_TR_CTRL__stop_bits__stop_bits__VAL REG_VAL_ENUM
+#define R_SERIAL1_TR_CTRL__tr_stick_par__tr_stick_par__VAL REG_VAL_ENUM
+#define R_SERIAL1_TR_CTRL__tr_par__tr_par__VAL REG_VAL_ENUM
+#define R_SERIAL1_TR_CTRL__tr_par_en__tr_par_en__VAL REG_VAL_ENUM
+#define R_SERIAL1_TR_CTRL__tr_bitnr__tr_bitnr__VAL REG_VAL_ENUM
+
+#define R_SERIAL1_TR_CTRL__tr_enable__tr_enable__disable 0
+#define R_SERIAL1_TR_CTRL__tr_enable__tr_enable__enable 1
+#define R_SERIAL1_TR_CTRL__auto_cts__auto_cts__active 1
+#define R_SERIAL1_TR_CTRL__auto_cts__auto_cts__disabled 0
+#define R_SERIAL1_TR_CTRL__stop_bits__stop_bits__one_bit 0
+#define R_SERIAL1_TR_CTRL__stop_bits__stop_bits__two_bits 1
+#define R_SERIAL1_TR_CTRL__tr_stick_par__tr_stick_par__normal 0
+#define R_SERIAL1_TR_CTRL__tr_stick_par__tr_stick_par__stick 1
+#define R_SERIAL1_TR_CTRL__tr_par__tr_par__even 0
+#define R_SERIAL1_TR_CTRL__tr_par__tr_par__odd 1
+#define R_SERIAL1_TR_CTRL__tr_par_en__tr_par_en__disable 0
+#define R_SERIAL1_TR_CTRL__tr_par_en__tr_par_en__enable 1
+#define R_SERIAL1_TR_CTRL__tr_bitnr__tr_bitnr__tr_7bit 1
+#define R_SERIAL1_TR_CTRL__tr_bitnr__tr_bitnr__tr_8bit 0
+
+#endif
+
+/*
+ * R_SERIAL1_TR_DATA
+ * - type: WO
+ * - addr: 0xb0000068
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL1_TR_DATA__ADDR (REG_TYPECAST_BYTE 0xb0000068)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL1_TR_DATA__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_SERIAL1_CTRL + 0))
+#define R_SERIAL1_TR_DATA__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_SERIAL1_CTRL + 0))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL1_TR_DATA__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_SERIAL1_TR_DATA__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL1_TR_DATA__STYPECAST REG_STYPECAST_BYTE
+#define R_SERIAL1_TR_DATA__SVAL REG_SVAL_SHADOW
+#define R_SERIAL1_TR_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL1_TR_DATA__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL1_TR_DATA__TYPE (REG_BYTE)
+#define R_SERIAL1_TR_DATA__GET REG_GET_WO
+#define R_SERIAL1_TR_DATA__IGET REG_IGET_WO
+#define R_SERIAL1_TR_DATA__SET REG_SET_WO
+#define R_SERIAL1_TR_DATA__ISET REG_ISET_WO
+#define R_SERIAL1_TR_DATA__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL1_TR_DATA__EQL REG_EQL_WO
+#define R_SERIAL1_TR_DATA__IEQL REG_IEQL_WO
+#define R_SERIAL1_TR_DATA__RD REG_RD_WO
+#define R_SERIAL1_TR_DATA__IRD REG_IRD_WO
+#define R_SERIAL1_TR_DATA__WR REG_WR_WO
+#define R_SERIAL1_TR_DATA__IWR REG_IWR_WO
+
+#define R_SERIAL1_TR_DATA__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SERIAL1_TR_DATA__data_out__data_out__MASK 0x000000ffU
+
+#define R_SERIAL1_TR_DATA__data_out__MAX 0xff
+
+#define R_SERIAL1_TR_DATA__data_out__MIN 0
+
+#define R_SERIAL1_TR_DATA__data_out__BITNR 0
+
+#define R_SERIAL1_TR_DATA__data_out__data_out__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SERIAL1_XOFF
+ * - type: WO
+ * - addr: 0xb000006c
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL1_XOFF__ADDR (REG_TYPECAST_UDWORD 0xb000006c)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL1_XOFF__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_SERIAL1_XOFF + 0))
+#define R_SERIAL1_XOFF__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_SERIAL1_XOFF + 0))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL1_XOFF__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_SERIAL1_XOFF__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL1_XOFF__STYPECAST REG_STYPECAST_UDWORD
+#define R_SERIAL1_XOFF__SVAL REG_SVAL_SHADOW
+#define R_SERIAL1_XOFF__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL1_XOFF__TYPECAST REG_TYPECAST_UDWORD
+#define R_SERIAL1_XOFF__TYPE (REG_UDWORD)
+#define R_SERIAL1_XOFF__GET REG_GET_WO
+#define R_SERIAL1_XOFF__IGET REG_IGET_WO
+#define R_SERIAL1_XOFF__SET REG_SET_WO
+#define R_SERIAL1_XOFF__ISET REG_ISET_WO
+#define R_SERIAL1_XOFF__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL1_XOFF__EQL REG_EQL_WO
+#define R_SERIAL1_XOFF__IEQL REG_IEQL_WO
+#define R_SERIAL1_XOFF__RD REG_RD_WO
+#define R_SERIAL1_XOFF__IRD REG_IRD_WO
+#define R_SERIAL1_XOFF__WR REG_WR_WO
+#define R_SERIAL1_XOFF__IWR REG_IWR_WO
+
+#define R_SERIAL1_XOFF__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SERIAL1_XOFF__tx_stop__tx_stop__MASK 0x00000200U
+#define R_SERIAL1_XOFF__auto_xoff__auto_xoff__MASK 0x00000100U
+#define R_SERIAL1_XOFF__xoff_char__xoff_char__MASK 0x000000ffU
+
+#define R_SERIAL1_XOFF__tx_stop__MAX 0x1
+#define R_SERIAL1_XOFF__auto_xoff__MAX 0x1
+#define R_SERIAL1_XOFF__xoff_char__MAX 0xff
+
+#define R_SERIAL1_XOFF__tx_stop__MIN 0
+#define R_SERIAL1_XOFF__auto_xoff__MIN 0
+#define R_SERIAL1_XOFF__xoff_char__MIN 0
+
+#define R_SERIAL1_XOFF__tx_stop__BITNR 9
+#define R_SERIAL1_XOFF__auto_xoff__BITNR 8
+#define R_SERIAL1_XOFF__xoff_char__BITNR 0
+
+#define R_SERIAL1_XOFF__tx_stop__tx_stop__VAL REG_VAL_ENUM
+#define R_SERIAL1_XOFF__auto_xoff__auto_xoff__VAL REG_VAL_ENUM
+#define R_SERIAL1_XOFF__xoff_char__xoff_char__VAL REG_VAL_VAL
+
+#define R_SERIAL1_XOFF__tx_stop__tx_stop__enable 0
+#define R_SERIAL1_XOFF__tx_stop__tx_stop__stop 1
+#define R_SERIAL1_XOFF__auto_xoff__auto_xoff__disable 0
+#define R_SERIAL1_XOFF__auto_xoff__auto_xoff__enable 1
+
+#endif
+
+/*
+ * R_SERIAL2_BAUD
+ * - type: WO
+ * - addr: 0xb0000073
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL2_BAUD__ADDR (REG_TYPECAST_BYTE 0xb0000073)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL2_BAUD__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_SERIAL2_CTRL + 3))
+#define R_SERIAL2_BAUD__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_SERIAL2_CTRL + 3))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL2_BAUD__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_SERIAL2_BAUD__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL2_BAUD__STYPECAST REG_STYPECAST_BYTE
+#define R_SERIAL2_BAUD__SVAL REG_SVAL_SHADOW
+#define R_SERIAL2_BAUD__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL2_BAUD__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL2_BAUD__TYPE (REG_BYTE)
+#define R_SERIAL2_BAUD__GET REG_GET_WO
+#define R_SERIAL2_BAUD__IGET REG_IGET_WO
+#define R_SERIAL2_BAUD__SET REG_SET_WO
+#define R_SERIAL2_BAUD__ISET REG_ISET_WO
+#define R_SERIAL2_BAUD__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL2_BAUD__EQL REG_EQL_WO
+#define R_SERIAL2_BAUD__IEQL REG_IEQL_WO
+#define R_SERIAL2_BAUD__RD REG_RD_WO
+#define R_SERIAL2_BAUD__IRD REG_IRD_WO
+#define R_SERIAL2_BAUD__WR REG_WR_WO
+#define R_SERIAL2_BAUD__IWR REG_IWR_WO
+
+#define R_SERIAL2_BAUD__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SERIAL2_BAUD__tr_baud__tr_baud__MASK 0x000000f0U
+#define R_SERIAL2_BAUD__rec_baud__rec_baud__MASK 0x0000000fU
+
+#define R_SERIAL2_BAUD__tr_baud__MAX 0xf
+#define R_SERIAL2_BAUD__rec_baud__MAX 0xf
+
+#define R_SERIAL2_BAUD__tr_baud__MIN 0
+#define R_SERIAL2_BAUD__rec_baud__MIN 0
+
+#define R_SERIAL2_BAUD__tr_baud__BITNR 4
+#define R_SERIAL2_BAUD__rec_baud__BITNR 0
+
+#define R_SERIAL2_BAUD__tr_baud__tr_baud__VAL REG_VAL_ENUM
+#define R_SERIAL2_BAUD__rec_baud__rec_baud__VAL REG_VAL_ENUM
+
+#define R_SERIAL2_BAUD__tr_baud__tr_baud__c115k2Hz 9
+#define R_SERIAL2_BAUD__tr_baud__tr_baud__c1200Hz 2
+#define R_SERIAL2_BAUD__tr_baud__tr_baud__c1843k2Hz 13
+#define R_SERIAL2_BAUD__tr_baud__tr_baud__c19k2Hz 6
+#define R_SERIAL2_BAUD__tr_baud__tr_baud__c230k4Hz 10
+#define R_SERIAL2_BAUD__tr_baud__tr_baud__c2400Hz 3
+#define R_SERIAL2_BAUD__tr_baud__tr_baud__c300Hz 0
+#define R_SERIAL2_BAUD__tr_baud__tr_baud__c38k4Hz 7
+#define R_SERIAL2_BAUD__tr_baud__tr_baud__c460k8Hz 11
+#define R_SERIAL2_BAUD__tr_baud__tr_baud__c4800Hz 4
+#define R_SERIAL2_BAUD__tr_baud__tr_baud__c57k6Hz 8
+#define R_SERIAL2_BAUD__tr_baud__tr_baud__c600Hz 1
+#define R_SERIAL2_BAUD__tr_baud__tr_baud__c6250kHz 14
+#define R_SERIAL2_BAUD__tr_baud__tr_baud__c921k6Hz 12
+#define R_SERIAL2_BAUD__tr_baud__tr_baud__c9600Hz 5
+#define R_SERIAL2_BAUD__rec_baud__rec_baud__c115k2Hz 9
+#define R_SERIAL2_BAUD__rec_baud__rec_baud__c1200Hz 2
+#define R_SERIAL2_BAUD__rec_baud__rec_baud__c1843k2Hz 13
+#define R_SERIAL2_BAUD__rec_baud__rec_baud__c19k2Hz 6
+#define R_SERIAL2_BAUD__rec_baud__rec_baud__c230k4Hz 10
+#define R_SERIAL2_BAUD__rec_baud__rec_baud__c2400Hz 3
+#define R_SERIAL2_BAUD__rec_baud__rec_baud__c300Hz 0
+#define R_SERIAL2_BAUD__rec_baud__rec_baud__c38k4Hz 7
+#define R_SERIAL2_BAUD__rec_baud__rec_baud__c460k8Hz 11
+#define R_SERIAL2_BAUD__rec_baud__rec_baud__c4800Hz 4
+#define R_SERIAL2_BAUD__rec_baud__rec_baud__c57k6Hz 8
+#define R_SERIAL2_BAUD__rec_baud__rec_baud__c600Hz 1
+#define R_SERIAL2_BAUD__rec_baud__rec_baud__c6250kHz 14
+#define R_SERIAL2_BAUD__rec_baud__rec_baud__c921k6Hz 12
+#define R_SERIAL2_BAUD__rec_baud__rec_baud__c9600Hz 5
+
+#endif
+
+/*
+ * R_SERIAL2_CTRL
+ * - type: WO
+ * - addr: 0xb0000070
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL2_CTRL__ADDR (REG_TYPECAST_UDWORD 0xb0000070)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL2_CTRL__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_SERIAL2_CTRL + 0))
+#define R_SERIAL2_CTRL__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_SERIAL2_CTRL + 0))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL2_CTRL__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_SERIAL2_CTRL__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL2_CTRL__STYPECAST REG_STYPECAST_UDWORD
+#define R_SERIAL2_CTRL__SVAL REG_SVAL_SHADOW
+#define R_SERIAL2_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL2_CTRL__TYPECAST REG_TYPECAST_UDWORD
+#define R_SERIAL2_CTRL__TYPE (REG_UDWORD)
+#define R_SERIAL2_CTRL__GET REG_GET_WO
+#define R_SERIAL2_CTRL__IGET REG_IGET_WO
+#define R_SERIAL2_CTRL__SET REG_SET_WO
+#define R_SERIAL2_CTRL__ISET REG_ISET_WO
+#define R_SERIAL2_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL2_CTRL__EQL REG_EQL_WO
+#define R_SERIAL2_CTRL__IEQL REG_IEQL_WO
+#define R_SERIAL2_CTRL__RD REG_RD_WO
+#define R_SERIAL2_CTRL__IRD REG_IRD_WO
+#define R_SERIAL2_CTRL__WR REG_WR_WO
+#define R_SERIAL2_CTRL__IWR REG_IWR_WO
+
+#define R_SERIAL2_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SERIAL2_CTRL__tr_baud__tr_baud__MASK 0xf0000000U
+#define R_SERIAL2_CTRL__rec_baud__rec_baud__MASK 0x0f000000U
+#define R_SERIAL2_CTRL__dma_err__dma_err__MASK 0x00800000U
+#define R_SERIAL2_CTRL__rec_enable__rec_enable__MASK 0x00400000U
+#define R_SERIAL2_CTRL__rts___rts___MASK 0x00200000U
+#define R_SERIAL2_CTRL__sampling__sampling__MASK 0x00100000U
+#define R_SERIAL2_CTRL__rec_stick_par__rec_stick_par__MASK 0x00080000U
+#define R_SERIAL2_CTRL__rec_par__rec_par__MASK 0x00040000U
+#define R_SERIAL2_CTRL__rec_par_en__rec_par_en__MASK 0x00020000U
+#define R_SERIAL2_CTRL__rec_bitnr__rec_bitnr__MASK 0x00010000U
+#define R_SERIAL2_CTRL__txd__txd__MASK 0x00008000U
+#define R_SERIAL2_CTRL__tr_enable__tr_enable__MASK 0x00004000U
+#define R_SERIAL2_CTRL__auto_cts__auto_cts__MASK 0x00002000U
+#define R_SERIAL2_CTRL__stop_bits__stop_bits__MASK 0x00001000U
+#define R_SERIAL2_CTRL__tr_stick_par__tr_stick_par__MASK 0x00000800U
+#define R_SERIAL2_CTRL__tr_par__tr_par__MASK 0x00000400U
+#define R_SERIAL2_CTRL__tr_par_en__tr_par_en__MASK 0x00000200U
+#define R_SERIAL2_CTRL__tr_bitnr__tr_bitnr__MASK 0x00000100U
+#define R_SERIAL2_CTRL__data_out__data_out__MASK 0x000000ffU
+
+#define R_SERIAL2_CTRL__tr_baud__MAX 0xf
+#define R_SERIAL2_CTRL__rec_baud__MAX 0xf
+#define R_SERIAL2_CTRL__dma_err__MAX 0x1
+#define R_SERIAL2_CTRL__rec_enable__MAX 0x1
+#define R_SERIAL2_CTRL__rts___MAX 0x1
+#define R_SERIAL2_CTRL__sampling__MAX 0x1
+#define R_SERIAL2_CTRL__rec_stick_par__MAX 0x1
+#define R_SERIAL2_CTRL__rec_par__MAX 0x1
+#define R_SERIAL2_CTRL__rec_par_en__MAX 0x1
+#define R_SERIAL2_CTRL__rec_bitnr__MAX 0x1
+#define R_SERIAL2_CTRL__txd__MAX 0x1
+#define R_SERIAL2_CTRL__tr_enable__MAX 0x1
+#define R_SERIAL2_CTRL__auto_cts__MAX 0x1
+#define R_SERIAL2_CTRL__stop_bits__MAX 0x1
+#define R_SERIAL2_CTRL__tr_stick_par__MAX 0x1
+#define R_SERIAL2_CTRL__tr_par__MAX 0x1
+#define R_SERIAL2_CTRL__tr_par_en__MAX 0x1
+#define R_SERIAL2_CTRL__tr_bitnr__MAX 0x1
+#define R_SERIAL2_CTRL__data_out__MAX 0xff
+
+#define R_SERIAL2_CTRL__tr_baud__MIN 0
+#define R_SERIAL2_CTRL__rec_baud__MIN 0
+#define R_SERIAL2_CTRL__dma_err__MIN 0
+#define R_SERIAL2_CTRL__rec_enable__MIN 0
+#define R_SERIAL2_CTRL__rts___MIN 0
+#define R_SERIAL2_CTRL__sampling__MIN 0
+#define R_SERIAL2_CTRL__rec_stick_par__MIN 0
+#define R_SERIAL2_CTRL__rec_par__MIN 0
+#define R_SERIAL2_CTRL__rec_par_en__MIN 0
+#define R_SERIAL2_CTRL__rec_bitnr__MIN 0
+#define R_SERIAL2_CTRL__txd__MIN 0
+#define R_SERIAL2_CTRL__tr_enable__MIN 0
+#define R_SERIAL2_CTRL__auto_cts__MIN 0
+#define R_SERIAL2_CTRL__stop_bits__MIN 0
+#define R_SERIAL2_CTRL__tr_stick_par__MIN 0
+#define R_SERIAL2_CTRL__tr_par__MIN 0
+#define R_SERIAL2_CTRL__tr_par_en__MIN 0
+#define R_SERIAL2_CTRL__tr_bitnr__MIN 0
+#define R_SERIAL2_CTRL__data_out__MIN 0
+
+#define R_SERIAL2_CTRL__tr_baud__BITNR 28
+#define R_SERIAL2_CTRL__rec_baud__BITNR 24
+#define R_SERIAL2_CTRL__dma_err__BITNR 23
+#define R_SERIAL2_CTRL__rec_enable__BITNR 22
+#define R_SERIAL2_CTRL__rts___BITNR 21
+#define R_SERIAL2_CTRL__sampling__BITNR 20
+#define R_SERIAL2_CTRL__rec_stick_par__BITNR 19
+#define R_SERIAL2_CTRL__rec_par__BITNR 18
+#define R_SERIAL2_CTRL__rec_par_en__BITNR 17
+#define R_SERIAL2_CTRL__rec_bitnr__BITNR 16
+#define R_SERIAL2_CTRL__txd__BITNR 15
+#define R_SERIAL2_CTRL__tr_enable__BITNR 14
+#define R_SERIAL2_CTRL__auto_cts__BITNR 13
+#define R_SERIAL2_CTRL__stop_bits__BITNR 12
+#define R_SERIAL2_CTRL__tr_stick_par__BITNR 11
+#define R_SERIAL2_CTRL__tr_par__BITNR 10
+#define R_SERIAL2_CTRL__tr_par_en__BITNR 9
+#define R_SERIAL2_CTRL__tr_bitnr__BITNR 8
+#define R_SERIAL2_CTRL__data_out__BITNR 0
+
+#define R_SERIAL2_CTRL__tr_baud__tr_baud__VAL REG_VAL_ENUM
+#define R_SERIAL2_CTRL__rec_baud__rec_baud__VAL REG_VAL_ENUM
+#define R_SERIAL2_CTRL__dma_err__dma_err__VAL REG_VAL_ENUM
+#define R_SERIAL2_CTRL__rec_enable__rec_enable__VAL REG_VAL_ENUM
+#define R_SERIAL2_CTRL__rts___rts___VAL REG_VAL_ENUM
+#define R_SERIAL2_CTRL__sampling__sampling__VAL REG_VAL_ENUM
+#define R_SERIAL2_CTRL__rec_stick_par__rec_stick_par__VAL REG_VAL_ENUM
+#define R_SERIAL2_CTRL__rec_par__rec_par__VAL REG_VAL_ENUM
+#define R_SERIAL2_CTRL__rec_par_en__rec_par_en__VAL REG_VAL_ENUM
+#define R_SERIAL2_CTRL__rec_bitnr__rec_bitnr__VAL REG_VAL_ENUM
+#define R_SERIAL2_CTRL__txd__txd__VAL REG_VAL_VAL
+#define R_SERIAL2_CTRL__tr_enable__tr_enable__VAL REG_VAL_ENUM
+#define R_SERIAL2_CTRL__auto_cts__auto_cts__VAL REG_VAL_ENUM
+#define R_SERIAL2_CTRL__stop_bits__stop_bits__VAL REG_VAL_ENUM
+#define R_SERIAL2_CTRL__tr_stick_par__tr_stick_par__VAL REG_VAL_ENUM
+#define R_SERIAL2_CTRL__tr_par__tr_par__VAL REG_VAL_ENUM
+#define R_SERIAL2_CTRL__tr_par_en__tr_par_en__VAL REG_VAL_ENUM
+#define R_SERIAL2_CTRL__tr_bitnr__tr_bitnr__VAL REG_VAL_ENUM
+#define R_SERIAL2_CTRL__data_out__data_out__VAL REG_VAL_VAL
+
+#define R_SERIAL2_CTRL__tr_baud__tr_baud__c115k2Hz 9
+#define R_SERIAL2_CTRL__tr_baud__tr_baud__c1200Hz 2
+#define R_SERIAL2_CTRL__tr_baud__tr_baud__c1843k2Hz 13
+#define R_SERIAL2_CTRL__tr_baud__tr_baud__c19k2Hz 6
+#define R_SERIAL2_CTRL__tr_baud__tr_baud__c230k4Hz 10
+#define R_SERIAL2_CTRL__tr_baud__tr_baud__c2400Hz 3
+#define R_SERIAL2_CTRL__tr_baud__tr_baud__c300Hz 0
+#define R_SERIAL2_CTRL__tr_baud__tr_baud__c38k4Hz 7
+#define R_SERIAL2_CTRL__tr_baud__tr_baud__c460k8Hz 11
+#define R_SERIAL2_CTRL__tr_baud__tr_baud__c4800Hz 4
+#define R_SERIAL2_CTRL__tr_baud__tr_baud__c57k6Hz 8
+#define R_SERIAL2_CTRL__tr_baud__tr_baud__c600Hz 1
+#define R_SERIAL2_CTRL__tr_baud__tr_baud__c6250kHz 14
+#define R_SERIAL2_CTRL__tr_baud__tr_baud__c921k6Hz 12
+#define R_SERIAL2_CTRL__tr_baud__tr_baud__c9600Hz 5
+#define R_SERIAL2_CTRL__rec_baud__rec_baud__c115k2Hz 9
+#define R_SERIAL2_CTRL__rec_baud__rec_baud__c1200Hz 2
+#define R_SERIAL2_CTRL__rec_baud__rec_baud__c1843k2Hz 13
+#define R_SERIAL2_CTRL__rec_baud__rec_baud__c19k2Hz 6
+#define R_SERIAL2_CTRL__rec_baud__rec_baud__c230k4Hz 10
+#define R_SERIAL2_CTRL__rec_baud__rec_baud__c2400Hz 3
+#define R_SERIAL2_CTRL__rec_baud__rec_baud__c300Hz 0
+#define R_SERIAL2_CTRL__rec_baud__rec_baud__c38k4Hz 7
+#define R_SERIAL2_CTRL__rec_baud__rec_baud__c460k8Hz 11
+#define R_SERIAL2_CTRL__rec_baud__rec_baud__c4800Hz 4
+#define R_SERIAL2_CTRL__rec_baud__rec_baud__c57k6Hz 8
+#define R_SERIAL2_CTRL__rec_baud__rec_baud__c600Hz 1
+#define R_SERIAL2_CTRL__rec_baud__rec_baud__c6250kHz 14
+#define R_SERIAL2_CTRL__rec_baud__rec_baud__c921k6Hz 12
+#define R_SERIAL2_CTRL__rec_baud__rec_baud__c9600Hz 5
+#define R_SERIAL2_CTRL__dma_err__dma_err__ignore 1
+#define R_SERIAL2_CTRL__dma_err__dma_err__stop 0
+#define R_SERIAL2_CTRL__rec_enable__rec_enable__disable 0
+#define R_SERIAL2_CTRL__rec_enable__rec_enable__enable 1
+#define R_SERIAL2_CTRL__rts___rts___active 0
+#define R_SERIAL2_CTRL__rts___rts___inactive 1
+#define R_SERIAL2_CTRL__sampling__sampling__majority 1
+#define R_SERIAL2_CTRL__sampling__sampling__middle 0
+#define R_SERIAL2_CTRL__rec_stick_par__rec_stick_par__normal 0
+#define R_SERIAL2_CTRL__rec_stick_par__rec_stick_par__stick 1
+#define R_SERIAL2_CTRL__rec_par__rec_par__even 0
+#define R_SERIAL2_CTRL__rec_par__rec_par__odd 1
+#define R_SERIAL2_CTRL__rec_par_en__rec_par_en__disable 0
+#define R_SERIAL2_CTRL__rec_par_en__rec_par_en__enable 1
+#define R_SERIAL2_CTRL__rec_bitnr__rec_bitnr__rec_7bit 1
+#define R_SERIAL2_CTRL__rec_bitnr__rec_bitnr__rec_8bit 0
+#define R_SERIAL2_CTRL__tr_enable__tr_enable__disable 0
+#define R_SERIAL2_CTRL__tr_enable__tr_enable__enable 1
+#define R_SERIAL2_CTRL__auto_cts__auto_cts__active 1
+#define R_SERIAL2_CTRL__auto_cts__auto_cts__disabled 0
+#define R_SERIAL2_CTRL__stop_bits__stop_bits__one_bit 0
+#define R_SERIAL2_CTRL__stop_bits__stop_bits__two_bits 1
+#define R_SERIAL2_CTRL__tr_stick_par__tr_stick_par__normal 0
+#define R_SERIAL2_CTRL__tr_stick_par__tr_stick_par__stick 1
+#define R_SERIAL2_CTRL__tr_par__tr_par__even 0
+#define R_SERIAL2_CTRL__tr_par__tr_par__odd 1
+#define R_SERIAL2_CTRL__tr_par_en__tr_par_en__disable 0
+#define R_SERIAL2_CTRL__tr_par_en__tr_par_en__enable 1
+#define R_SERIAL2_CTRL__tr_bitnr__tr_bitnr__tr_7bit 1
+#define R_SERIAL2_CTRL__tr_bitnr__tr_bitnr__tr_8bit 0
+
+#endif
+
+/*
+ * R_SERIAL2_READ
+ * - type: RO
+ * - addr: 0xb0000070
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL2_READ__ADDR (REG_TYPECAST_UDWORD 0xb0000070)
+#define R_SERIAL2_READ__SVAL REG_SVAL_SHADOW
+#define R_SERIAL2_READ__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL2_READ__TYPECAST REG_TYPECAST_UDWORD
+#define R_SERIAL2_READ__TYPE (REG_UDWORD)
+#define R_SERIAL2_READ__GET REG_GET_RO
+#define R_SERIAL2_READ__IGET REG_IGET_RO
+#define R_SERIAL2_READ__SET REG_SET_RO
+#define R_SERIAL2_READ__ISET REG_ISET_RO
+#define R_SERIAL2_READ__SET_VAL REG_SET_VAL_RO
+#define R_SERIAL2_READ__EQL REG_EQL_RO
+#define R_SERIAL2_READ__IEQL REG_IEQL_RO
+#define R_SERIAL2_READ__RD REG_RD_RO
+#define R_SERIAL2_READ__IRD REG_IRD_RO
+#define R_SERIAL2_READ__WR REG_WR_RO
+#define R_SERIAL2_READ__IWR REG_IWR_RO
+
+#define R_SERIAL2_READ__READ(addr) \
+ (*(addr))
+
+#define R_SERIAL2_READ__xoff_detect__xoff_detect__MASK 0x00008000U
+#define R_SERIAL2_READ__cts___cts___MASK 0x00004000U
+#define R_SERIAL2_READ__tr_ready__tr_ready__MASK 0x00002000U
+#define R_SERIAL2_READ__rxd__rxd__MASK 0x00001000U
+#define R_SERIAL2_READ__overrun__overrun__MASK 0x00000800U
+#define R_SERIAL2_READ__par_err__par_err__MASK 0x00000400U
+#define R_SERIAL2_READ__framing_err__framing_err__MASK 0x00000200U
+#define R_SERIAL2_READ__data_avail__data_avail__MASK 0x00000100U
+#define R_SERIAL2_READ__data_in__data_in__MASK 0x000000ffU
+
+#define R_SERIAL2_READ__xoff_detect__MAX 0x1
+#define R_SERIAL2_READ__cts___MAX 0x1
+#define R_SERIAL2_READ__tr_ready__MAX 0x1
+#define R_SERIAL2_READ__rxd__MAX 0x1
+#define R_SERIAL2_READ__overrun__MAX 0x1
+#define R_SERIAL2_READ__par_err__MAX 0x1
+#define R_SERIAL2_READ__framing_err__MAX 0x1
+#define R_SERIAL2_READ__data_avail__MAX 0x1
+#define R_SERIAL2_READ__data_in__MAX 0xff
+
+#define R_SERIAL2_READ__xoff_detect__MIN 0
+#define R_SERIAL2_READ__cts___MIN 0
+#define R_SERIAL2_READ__tr_ready__MIN 0
+#define R_SERIAL2_READ__rxd__MIN 0
+#define R_SERIAL2_READ__overrun__MIN 0
+#define R_SERIAL2_READ__par_err__MIN 0
+#define R_SERIAL2_READ__framing_err__MIN 0
+#define R_SERIAL2_READ__data_avail__MIN 0
+#define R_SERIAL2_READ__data_in__MIN 0
+
+#define R_SERIAL2_READ__xoff_detect__BITNR 15
+#define R_SERIAL2_READ__cts___BITNR 14
+#define R_SERIAL2_READ__tr_ready__BITNR 13
+#define R_SERIAL2_READ__rxd__BITNR 12
+#define R_SERIAL2_READ__overrun__BITNR 11
+#define R_SERIAL2_READ__par_err__BITNR 10
+#define R_SERIAL2_READ__framing_err__BITNR 9
+#define R_SERIAL2_READ__data_avail__BITNR 8
+#define R_SERIAL2_READ__data_in__BITNR 0
+
+#define R_SERIAL2_READ__xoff_detect__xoff_detect__VAL REG_VAL_ENUM
+#define R_SERIAL2_READ__cts___cts___VAL REG_VAL_ENUM
+#define R_SERIAL2_READ__tr_ready__tr_ready__VAL REG_VAL_ENUM
+#define R_SERIAL2_READ__rxd__rxd__VAL REG_VAL_VAL
+#define R_SERIAL2_READ__overrun__overrun__VAL REG_VAL_ENUM
+#define R_SERIAL2_READ__par_err__par_err__VAL REG_VAL_ENUM
+#define R_SERIAL2_READ__framing_err__framing_err__VAL REG_VAL_ENUM
+#define R_SERIAL2_READ__data_avail__data_avail__VAL REG_VAL_ENUM
+#define R_SERIAL2_READ__data_in__data_in__VAL REG_VAL_VAL
+
+#define R_SERIAL2_READ__xoff_detect__xoff_detect__no_xoff 0
+#define R_SERIAL2_READ__xoff_detect__xoff_detect__xoff 1
+#define R_SERIAL2_READ__cts___cts___active 0
+#define R_SERIAL2_READ__cts___cts___inactive 1
+#define R_SERIAL2_READ__tr_ready__tr_ready__full 0
+#define R_SERIAL2_READ__tr_ready__tr_ready__ready 1
+#define R_SERIAL2_READ__overrun__overrun__no 0
+#define R_SERIAL2_READ__overrun__overrun__yes 1
+#define R_SERIAL2_READ__par_err__par_err__no 0
+#define R_SERIAL2_READ__par_err__par_err__yes 1
+#define R_SERIAL2_READ__framing_err__framing_err__no 0
+#define R_SERIAL2_READ__framing_err__framing_err__yes 1
+#define R_SERIAL2_READ__data_avail__data_avail__no 0
+#define R_SERIAL2_READ__data_avail__data_avail__yes 1
+
+#endif
+
+/*
+ * R_SERIAL2_REC_CTRL
+ * - type: WO
+ * - addr: 0xb0000072
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL2_REC_CTRL__ADDR (REG_TYPECAST_BYTE 0xb0000072)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL2_REC_CTRL__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_SERIAL2_CTRL + 2))
+#define R_SERIAL2_REC_CTRL__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_SERIAL2_CTRL + 2))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL2_REC_CTRL__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_SERIAL2_REC_CTRL__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL2_REC_CTRL__STYPECAST REG_STYPECAST_BYTE
+#define R_SERIAL2_REC_CTRL__SVAL REG_SVAL_SHADOW
+#define R_SERIAL2_REC_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL2_REC_CTRL__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL2_REC_CTRL__TYPE (REG_BYTE)
+#define R_SERIAL2_REC_CTRL__GET REG_GET_WO
+#define R_SERIAL2_REC_CTRL__IGET REG_IGET_WO
+#define R_SERIAL2_REC_CTRL__SET REG_SET_WO
+#define R_SERIAL2_REC_CTRL__ISET REG_ISET_WO
+#define R_SERIAL2_REC_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL2_REC_CTRL__EQL REG_EQL_WO
+#define R_SERIAL2_REC_CTRL__IEQL REG_IEQL_WO
+#define R_SERIAL2_REC_CTRL__RD REG_RD_WO
+#define R_SERIAL2_REC_CTRL__IRD REG_IRD_WO
+#define R_SERIAL2_REC_CTRL__WR REG_WR_WO
+#define R_SERIAL2_REC_CTRL__IWR REG_IWR_WO
+
+#define R_SERIAL2_REC_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SERIAL2_REC_CTRL__dma_err__dma_err__MASK 0x00000080U
+#define R_SERIAL2_REC_CTRL__rec_enable__rec_enable__MASK 0x00000040U
+#define R_SERIAL2_REC_CTRL__rts___rts___MASK 0x00000020U
+#define R_SERIAL2_REC_CTRL__sampling__sampling__MASK 0x00000010U
+#define R_SERIAL2_REC_CTRL__rec_stick_par__rec_stick_par__MASK 0x00000008U
+#define R_SERIAL2_REC_CTRL__rec_par__rec_par__MASK 0x00000004U
+#define R_SERIAL2_REC_CTRL__rec_par_en__rec_par_en__MASK 0x00000002U
+#define R_SERIAL2_REC_CTRL__rec_bitnr__rec_bitnr__MASK 0x00000001U
+
+#define R_SERIAL2_REC_CTRL__dma_err__MAX 0x1
+#define R_SERIAL2_REC_CTRL__rec_enable__MAX 0x1
+#define R_SERIAL2_REC_CTRL__rts___MAX 0x1
+#define R_SERIAL2_REC_CTRL__sampling__MAX 0x1
+#define R_SERIAL2_REC_CTRL__rec_stick_par__MAX 0x1
+#define R_SERIAL2_REC_CTRL__rec_par__MAX 0x1
+#define R_SERIAL2_REC_CTRL__rec_par_en__MAX 0x1
+#define R_SERIAL2_REC_CTRL__rec_bitnr__MAX 0x1
+
+#define R_SERIAL2_REC_CTRL__dma_err__MIN 0
+#define R_SERIAL2_REC_CTRL__rec_enable__MIN 0
+#define R_SERIAL2_REC_CTRL__rts___MIN 0
+#define R_SERIAL2_REC_CTRL__sampling__MIN 0
+#define R_SERIAL2_REC_CTRL__rec_stick_par__MIN 0
+#define R_SERIAL2_REC_CTRL__rec_par__MIN 0
+#define R_SERIAL2_REC_CTRL__rec_par_en__MIN 0
+#define R_SERIAL2_REC_CTRL__rec_bitnr__MIN 0
+
+#define R_SERIAL2_REC_CTRL__dma_err__BITNR 7
+#define R_SERIAL2_REC_CTRL__rec_enable__BITNR 6
+#define R_SERIAL2_REC_CTRL__rts___BITNR 5
+#define R_SERIAL2_REC_CTRL__sampling__BITNR 4
+#define R_SERIAL2_REC_CTRL__rec_stick_par__BITNR 3
+#define R_SERIAL2_REC_CTRL__rec_par__BITNR 2
+#define R_SERIAL2_REC_CTRL__rec_par_en__BITNR 1
+#define R_SERIAL2_REC_CTRL__rec_bitnr__BITNR 0
+
+#define R_SERIAL2_REC_CTRL__dma_err__dma_err__VAL REG_VAL_ENUM
+#define R_SERIAL2_REC_CTRL__rec_enable__rec_enable__VAL REG_VAL_ENUM
+#define R_SERIAL2_REC_CTRL__rts___rts___VAL REG_VAL_ENUM
+#define R_SERIAL2_REC_CTRL__sampling__sampling__VAL REG_VAL_ENUM
+#define R_SERIAL2_REC_CTRL__rec_stick_par__rec_stick_par__VAL REG_VAL_ENUM
+#define R_SERIAL2_REC_CTRL__rec_par__rec_par__VAL REG_VAL_ENUM
+#define R_SERIAL2_REC_CTRL__rec_par_en__rec_par_en__VAL REG_VAL_ENUM
+#define R_SERIAL2_REC_CTRL__rec_bitnr__rec_bitnr__VAL REG_VAL_ENUM
+
+#define R_SERIAL2_REC_CTRL__dma_err__dma_err__ignore 1
+#define R_SERIAL2_REC_CTRL__dma_err__dma_err__stop 0
+#define R_SERIAL2_REC_CTRL__rec_enable__rec_enable__disable 0
+#define R_SERIAL2_REC_CTRL__rec_enable__rec_enable__enable 1
+#define R_SERIAL2_REC_CTRL__rts___rts___active 0
+#define R_SERIAL2_REC_CTRL__rts___rts___inactive 1
+#define R_SERIAL2_REC_CTRL__sampling__sampling__majority 1
+#define R_SERIAL2_REC_CTRL__sampling__sampling__middle 0
+#define R_SERIAL2_REC_CTRL__rec_stick_par__rec_stick_par__normal 0
+#define R_SERIAL2_REC_CTRL__rec_stick_par__rec_stick_par__stick 1
+#define R_SERIAL2_REC_CTRL__rec_par__rec_par__even 0
+#define R_SERIAL2_REC_CTRL__rec_par__rec_par__odd 1
+#define R_SERIAL2_REC_CTRL__rec_par_en__rec_par_en__disable 0
+#define R_SERIAL2_REC_CTRL__rec_par_en__rec_par_en__enable 1
+#define R_SERIAL2_REC_CTRL__rec_bitnr__rec_bitnr__rec_7bit 1
+#define R_SERIAL2_REC_CTRL__rec_bitnr__rec_bitnr__rec_8bit 0
+
+#endif
+
+/*
+ * R_SERIAL2_REC_DATA
+ * - type: RO
+ * - addr: 0xb0000070
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL2_REC_DATA__ADDR (REG_TYPECAST_BYTE 0xb0000070)
+#define R_SERIAL2_REC_DATA__SVAL REG_SVAL_SHADOW
+#define R_SERIAL2_REC_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL2_REC_DATA__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL2_REC_DATA__TYPE (REG_BYTE)
+#define R_SERIAL2_REC_DATA__GET REG_GET_RO
+#define R_SERIAL2_REC_DATA__IGET REG_IGET_RO
+#define R_SERIAL2_REC_DATA__SET REG_SET_RO
+#define R_SERIAL2_REC_DATA__ISET REG_ISET_RO
+#define R_SERIAL2_REC_DATA__SET_VAL REG_SET_VAL_RO
+#define R_SERIAL2_REC_DATA__EQL REG_EQL_RO
+#define R_SERIAL2_REC_DATA__IEQL REG_IEQL_RO
+#define R_SERIAL2_REC_DATA__RD REG_RD_RO
+#define R_SERIAL2_REC_DATA__IRD REG_IRD_RO
+#define R_SERIAL2_REC_DATA__WR REG_WR_RO
+#define R_SERIAL2_REC_DATA__IWR REG_IWR_RO
+
+#define R_SERIAL2_REC_DATA__READ(addr) \
+ (*(addr))
+
+#define R_SERIAL2_REC_DATA__data_in__data_in__MASK 0x000000ffU
+
+#define R_SERIAL2_REC_DATA__data_in__MAX 0xff
+
+#define R_SERIAL2_REC_DATA__data_in__MIN 0
+
+#define R_SERIAL2_REC_DATA__data_in__BITNR 0
+
+#define R_SERIAL2_REC_DATA__data_in__data_in__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SERIAL2_STATUS
+ * - type: RO
+ * - addr: 0xb0000071
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL2_STATUS__ADDR (REG_TYPECAST_BYTE 0xb0000071)
+#define R_SERIAL2_STATUS__SVAL REG_SVAL_SHADOW
+#define R_SERIAL2_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL2_STATUS__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL2_STATUS__TYPE (REG_BYTE)
+#define R_SERIAL2_STATUS__GET REG_GET_RO
+#define R_SERIAL2_STATUS__IGET REG_IGET_RO
+#define R_SERIAL2_STATUS__SET REG_SET_RO
+#define R_SERIAL2_STATUS__ISET REG_ISET_RO
+#define R_SERIAL2_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_SERIAL2_STATUS__EQL REG_EQL_RO
+#define R_SERIAL2_STATUS__IEQL REG_IEQL_RO
+#define R_SERIAL2_STATUS__RD REG_RD_RO
+#define R_SERIAL2_STATUS__IRD REG_IRD_RO
+#define R_SERIAL2_STATUS__WR REG_WR_RO
+#define R_SERIAL2_STATUS__IWR REG_IWR_RO
+
+#define R_SERIAL2_STATUS__READ(addr) \
+ (*(addr))
+
+#define R_SERIAL2_STATUS__xoff_detect__xoff_detect__MASK 0x00000080U
+#define R_SERIAL2_STATUS__cts___cts___MASK 0x00000040U
+#define R_SERIAL2_STATUS__tr_ready__tr_ready__MASK 0x00000020U
+#define R_SERIAL2_STATUS__rxd__rxd__MASK 0x00000010U
+#define R_SERIAL2_STATUS__overrun__overrun__MASK 0x00000008U
+#define R_SERIAL2_STATUS__par_err__par_err__MASK 0x00000004U
+#define R_SERIAL2_STATUS__framing_err__framing_err__MASK 0x00000002U
+#define R_SERIAL2_STATUS__data_avail__data_avail__MASK 0x00000001U
+
+#define R_SERIAL2_STATUS__xoff_detect__MAX 0x1
+#define R_SERIAL2_STATUS__cts___MAX 0x1
+#define R_SERIAL2_STATUS__tr_ready__MAX 0x1
+#define R_SERIAL2_STATUS__rxd__MAX 0x1
+#define R_SERIAL2_STATUS__overrun__MAX 0x1
+#define R_SERIAL2_STATUS__par_err__MAX 0x1
+#define R_SERIAL2_STATUS__framing_err__MAX 0x1
+#define R_SERIAL2_STATUS__data_avail__MAX 0x1
+
+#define R_SERIAL2_STATUS__xoff_detect__MIN 0
+#define R_SERIAL2_STATUS__cts___MIN 0
+#define R_SERIAL2_STATUS__tr_ready__MIN 0
+#define R_SERIAL2_STATUS__rxd__MIN 0
+#define R_SERIAL2_STATUS__overrun__MIN 0
+#define R_SERIAL2_STATUS__par_err__MIN 0
+#define R_SERIAL2_STATUS__framing_err__MIN 0
+#define R_SERIAL2_STATUS__data_avail__MIN 0
+
+#define R_SERIAL2_STATUS__xoff_detect__BITNR 7
+#define R_SERIAL2_STATUS__cts___BITNR 6
+#define R_SERIAL2_STATUS__tr_ready__BITNR 5
+#define R_SERIAL2_STATUS__rxd__BITNR 4
+#define R_SERIAL2_STATUS__overrun__BITNR 3
+#define R_SERIAL2_STATUS__par_err__BITNR 2
+#define R_SERIAL2_STATUS__framing_err__BITNR 1
+#define R_SERIAL2_STATUS__data_avail__BITNR 0
+
+#define R_SERIAL2_STATUS__xoff_detect__xoff_detect__VAL REG_VAL_ENUM
+#define R_SERIAL2_STATUS__cts___cts___VAL REG_VAL_ENUM
+#define R_SERIAL2_STATUS__tr_ready__tr_ready__VAL REG_VAL_ENUM
+#define R_SERIAL2_STATUS__rxd__rxd__VAL REG_VAL_VAL
+#define R_SERIAL2_STATUS__overrun__overrun__VAL REG_VAL_ENUM
+#define R_SERIAL2_STATUS__par_err__par_err__VAL REG_VAL_ENUM
+#define R_SERIAL2_STATUS__framing_err__framing_err__VAL REG_VAL_ENUM
+#define R_SERIAL2_STATUS__data_avail__data_avail__VAL REG_VAL_ENUM
+
+#define R_SERIAL2_STATUS__xoff_detect__xoff_detect__no_xoff 0
+#define R_SERIAL2_STATUS__xoff_detect__xoff_detect__xoff 1
+#define R_SERIAL2_STATUS__cts___cts___active 0
+#define R_SERIAL2_STATUS__cts___cts___inactive 1
+#define R_SERIAL2_STATUS__tr_ready__tr_ready__full 0
+#define R_SERIAL2_STATUS__tr_ready__tr_ready__ready 1
+#define R_SERIAL2_STATUS__overrun__overrun__no 0
+#define R_SERIAL2_STATUS__overrun__overrun__yes 1
+#define R_SERIAL2_STATUS__par_err__par_err__no 0
+#define R_SERIAL2_STATUS__par_err__par_err__yes 1
+#define R_SERIAL2_STATUS__framing_err__framing_err__no 0
+#define R_SERIAL2_STATUS__framing_err__framing_err__yes 1
+#define R_SERIAL2_STATUS__data_avail__data_avail__no 0
+#define R_SERIAL2_STATUS__data_avail__data_avail__yes 1
+
+#endif
+
+/*
+ * R_SERIAL2_TR_CTRL
+ * - type: WO
+ * - addr: 0xb0000071
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL2_TR_CTRL__ADDR (REG_TYPECAST_BYTE 0xb0000071)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL2_TR_CTRL__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_SERIAL2_CTRL + 1))
+#define R_SERIAL2_TR_CTRL__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_SERIAL2_CTRL + 1))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL2_TR_CTRL__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_SERIAL2_TR_CTRL__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL2_TR_CTRL__STYPECAST REG_STYPECAST_BYTE
+#define R_SERIAL2_TR_CTRL__SVAL REG_SVAL_SHADOW
+#define R_SERIAL2_TR_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL2_TR_CTRL__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL2_TR_CTRL__TYPE (REG_BYTE)
+#define R_SERIAL2_TR_CTRL__GET REG_GET_WO
+#define R_SERIAL2_TR_CTRL__IGET REG_IGET_WO
+#define R_SERIAL2_TR_CTRL__SET REG_SET_WO
+#define R_SERIAL2_TR_CTRL__ISET REG_ISET_WO
+#define R_SERIAL2_TR_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL2_TR_CTRL__EQL REG_EQL_WO
+#define R_SERIAL2_TR_CTRL__IEQL REG_IEQL_WO
+#define R_SERIAL2_TR_CTRL__RD REG_RD_WO
+#define R_SERIAL2_TR_CTRL__IRD REG_IRD_WO
+#define R_SERIAL2_TR_CTRL__WR REG_WR_WO
+#define R_SERIAL2_TR_CTRL__IWR REG_IWR_WO
+
+#define R_SERIAL2_TR_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SERIAL2_TR_CTRL__txd__txd__MASK 0x00000080U
+#define R_SERIAL2_TR_CTRL__tr_enable__tr_enable__MASK 0x00000040U
+#define R_SERIAL2_TR_CTRL__auto_cts__auto_cts__MASK 0x00000020U
+#define R_SERIAL2_TR_CTRL__stop_bits__stop_bits__MASK 0x00000010U
+#define R_SERIAL2_TR_CTRL__tr_stick_par__tr_stick_par__MASK 0x00000008U
+#define R_SERIAL2_TR_CTRL__tr_par__tr_par__MASK 0x00000004U
+#define R_SERIAL2_TR_CTRL__tr_par_en__tr_par_en__MASK 0x00000002U
+#define R_SERIAL2_TR_CTRL__tr_bitnr__tr_bitnr__MASK 0x00000001U
+
+#define R_SERIAL2_TR_CTRL__txd__MAX 0x1
+#define R_SERIAL2_TR_CTRL__tr_enable__MAX 0x1
+#define R_SERIAL2_TR_CTRL__auto_cts__MAX 0x1
+#define R_SERIAL2_TR_CTRL__stop_bits__MAX 0x1
+#define R_SERIAL2_TR_CTRL__tr_stick_par__MAX 0x1
+#define R_SERIAL2_TR_CTRL__tr_par__MAX 0x1
+#define R_SERIAL2_TR_CTRL__tr_par_en__MAX 0x1
+#define R_SERIAL2_TR_CTRL__tr_bitnr__MAX 0x1
+
+#define R_SERIAL2_TR_CTRL__txd__MIN 0
+#define R_SERIAL2_TR_CTRL__tr_enable__MIN 0
+#define R_SERIAL2_TR_CTRL__auto_cts__MIN 0
+#define R_SERIAL2_TR_CTRL__stop_bits__MIN 0
+#define R_SERIAL2_TR_CTRL__tr_stick_par__MIN 0
+#define R_SERIAL2_TR_CTRL__tr_par__MIN 0
+#define R_SERIAL2_TR_CTRL__tr_par_en__MIN 0
+#define R_SERIAL2_TR_CTRL__tr_bitnr__MIN 0
+
+#define R_SERIAL2_TR_CTRL__txd__BITNR 7
+#define R_SERIAL2_TR_CTRL__tr_enable__BITNR 6
+#define R_SERIAL2_TR_CTRL__auto_cts__BITNR 5
+#define R_SERIAL2_TR_CTRL__stop_bits__BITNR 4
+#define R_SERIAL2_TR_CTRL__tr_stick_par__BITNR 3
+#define R_SERIAL2_TR_CTRL__tr_par__BITNR 2
+#define R_SERIAL2_TR_CTRL__tr_par_en__BITNR 1
+#define R_SERIAL2_TR_CTRL__tr_bitnr__BITNR 0
+
+#define R_SERIAL2_TR_CTRL__txd__txd__VAL REG_VAL_VAL
+#define R_SERIAL2_TR_CTRL__tr_enable__tr_enable__VAL REG_VAL_ENUM
+#define R_SERIAL2_TR_CTRL__auto_cts__auto_cts__VAL REG_VAL_ENUM
+#define R_SERIAL2_TR_CTRL__stop_bits__stop_bits__VAL REG_VAL_ENUM
+#define R_SERIAL2_TR_CTRL__tr_stick_par__tr_stick_par__VAL REG_VAL_ENUM
+#define R_SERIAL2_TR_CTRL__tr_par__tr_par__VAL REG_VAL_ENUM
+#define R_SERIAL2_TR_CTRL__tr_par_en__tr_par_en__VAL REG_VAL_ENUM
+#define R_SERIAL2_TR_CTRL__tr_bitnr__tr_bitnr__VAL REG_VAL_ENUM
+
+#define R_SERIAL2_TR_CTRL__tr_enable__tr_enable__disable 0
+#define R_SERIAL2_TR_CTRL__tr_enable__tr_enable__enable 1
+#define R_SERIAL2_TR_CTRL__auto_cts__auto_cts__active 1
+#define R_SERIAL2_TR_CTRL__auto_cts__auto_cts__disabled 0
+#define R_SERIAL2_TR_CTRL__stop_bits__stop_bits__one_bit 0
+#define R_SERIAL2_TR_CTRL__stop_bits__stop_bits__two_bits 1
+#define R_SERIAL2_TR_CTRL__tr_stick_par__tr_stick_par__normal 0
+#define R_SERIAL2_TR_CTRL__tr_stick_par__tr_stick_par__stick 1
+#define R_SERIAL2_TR_CTRL__tr_par__tr_par__even 0
+#define R_SERIAL2_TR_CTRL__tr_par__tr_par__odd 1
+#define R_SERIAL2_TR_CTRL__tr_par_en__tr_par_en__disable 0
+#define R_SERIAL2_TR_CTRL__tr_par_en__tr_par_en__enable 1
+#define R_SERIAL2_TR_CTRL__tr_bitnr__tr_bitnr__tr_7bit 1
+#define R_SERIAL2_TR_CTRL__tr_bitnr__tr_bitnr__tr_8bit 0
+
+#endif
+
+/*
+ * R_SERIAL2_TR_DATA
+ * - type: WO
+ * - addr: 0xb0000070
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL2_TR_DATA__ADDR (REG_TYPECAST_BYTE 0xb0000070)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL2_TR_DATA__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_SERIAL2_CTRL + 0))
+#define R_SERIAL2_TR_DATA__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_SERIAL2_CTRL + 0))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL2_TR_DATA__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_SERIAL2_TR_DATA__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL2_TR_DATA__STYPECAST REG_STYPECAST_BYTE
+#define R_SERIAL2_TR_DATA__SVAL REG_SVAL_SHADOW
+#define R_SERIAL2_TR_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL2_TR_DATA__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL2_TR_DATA__TYPE (REG_BYTE)
+#define R_SERIAL2_TR_DATA__GET REG_GET_WO
+#define R_SERIAL2_TR_DATA__IGET REG_IGET_WO
+#define R_SERIAL2_TR_DATA__SET REG_SET_WO
+#define R_SERIAL2_TR_DATA__ISET REG_ISET_WO
+#define R_SERIAL2_TR_DATA__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL2_TR_DATA__EQL REG_EQL_WO
+#define R_SERIAL2_TR_DATA__IEQL REG_IEQL_WO
+#define R_SERIAL2_TR_DATA__RD REG_RD_WO
+#define R_SERIAL2_TR_DATA__IRD REG_IRD_WO
+#define R_SERIAL2_TR_DATA__WR REG_WR_WO
+#define R_SERIAL2_TR_DATA__IWR REG_IWR_WO
+
+#define R_SERIAL2_TR_DATA__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SERIAL2_TR_DATA__data_out__data_out__MASK 0x000000ffU
+
+#define R_SERIAL2_TR_DATA__data_out__MAX 0xff
+
+#define R_SERIAL2_TR_DATA__data_out__MIN 0
+
+#define R_SERIAL2_TR_DATA__data_out__BITNR 0
+
+#define R_SERIAL2_TR_DATA__data_out__data_out__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SERIAL2_XOFF
+ * - type: WO
+ * - addr: 0xb0000074
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL2_XOFF__ADDR (REG_TYPECAST_UDWORD 0xb0000074)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL2_XOFF__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_SERIAL2_XOFF + 0))
+#define R_SERIAL2_XOFF__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_SERIAL2_XOFF + 0))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL2_XOFF__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_SERIAL2_XOFF__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL2_XOFF__STYPECAST REG_STYPECAST_UDWORD
+#define R_SERIAL2_XOFF__SVAL REG_SVAL_SHADOW
+#define R_SERIAL2_XOFF__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL2_XOFF__TYPECAST REG_TYPECAST_UDWORD
+#define R_SERIAL2_XOFF__TYPE (REG_UDWORD)
+#define R_SERIAL2_XOFF__GET REG_GET_WO
+#define R_SERIAL2_XOFF__IGET REG_IGET_WO
+#define R_SERIAL2_XOFF__SET REG_SET_WO
+#define R_SERIAL2_XOFF__ISET REG_ISET_WO
+#define R_SERIAL2_XOFF__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL2_XOFF__EQL REG_EQL_WO
+#define R_SERIAL2_XOFF__IEQL REG_IEQL_WO
+#define R_SERIAL2_XOFF__RD REG_RD_WO
+#define R_SERIAL2_XOFF__IRD REG_IRD_WO
+#define R_SERIAL2_XOFF__WR REG_WR_WO
+#define R_SERIAL2_XOFF__IWR REG_IWR_WO
+
+#define R_SERIAL2_XOFF__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SERIAL2_XOFF__tx_stop__tx_stop__MASK 0x00000200U
+#define R_SERIAL2_XOFF__auto_xoff__auto_xoff__MASK 0x00000100U
+#define R_SERIAL2_XOFF__xoff_char__xoff_char__MASK 0x000000ffU
+
+#define R_SERIAL2_XOFF__tx_stop__MAX 0x1
+#define R_SERIAL2_XOFF__auto_xoff__MAX 0x1
+#define R_SERIAL2_XOFF__xoff_char__MAX 0xff
+
+#define R_SERIAL2_XOFF__tx_stop__MIN 0
+#define R_SERIAL2_XOFF__auto_xoff__MIN 0
+#define R_SERIAL2_XOFF__xoff_char__MIN 0
+
+#define R_SERIAL2_XOFF__tx_stop__BITNR 9
+#define R_SERIAL2_XOFF__auto_xoff__BITNR 8
+#define R_SERIAL2_XOFF__xoff_char__BITNR 0
+
+#define R_SERIAL2_XOFF__tx_stop__tx_stop__VAL REG_VAL_ENUM
+#define R_SERIAL2_XOFF__auto_xoff__auto_xoff__VAL REG_VAL_ENUM
+#define R_SERIAL2_XOFF__xoff_char__xoff_char__VAL REG_VAL_VAL
+
+#define R_SERIAL2_XOFF__tx_stop__tx_stop__enable 0
+#define R_SERIAL2_XOFF__tx_stop__tx_stop__stop 1
+#define R_SERIAL2_XOFF__auto_xoff__auto_xoff__disable 0
+#define R_SERIAL2_XOFF__auto_xoff__auto_xoff__enable 1
+
+#endif
+
+/*
+ * R_SERIAL3_BAUD
+ * - type: WO
+ * - addr: 0xb000007b
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL3_BAUD__ADDR (REG_TYPECAST_BYTE 0xb000007b)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL3_BAUD__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_SERIAL3_CTRL + 3))
+#define R_SERIAL3_BAUD__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_SERIAL3_CTRL + 3))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL3_BAUD__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_SERIAL3_BAUD__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL3_BAUD__STYPECAST REG_STYPECAST_BYTE
+#define R_SERIAL3_BAUD__SVAL REG_SVAL_SHADOW
+#define R_SERIAL3_BAUD__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL3_BAUD__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL3_BAUD__TYPE (REG_BYTE)
+#define R_SERIAL3_BAUD__GET REG_GET_WO
+#define R_SERIAL3_BAUD__IGET REG_IGET_WO
+#define R_SERIAL3_BAUD__SET REG_SET_WO
+#define R_SERIAL3_BAUD__ISET REG_ISET_WO
+#define R_SERIAL3_BAUD__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL3_BAUD__EQL REG_EQL_WO
+#define R_SERIAL3_BAUD__IEQL REG_IEQL_WO
+#define R_SERIAL3_BAUD__RD REG_RD_WO
+#define R_SERIAL3_BAUD__IRD REG_IRD_WO
+#define R_SERIAL3_BAUD__WR REG_WR_WO
+#define R_SERIAL3_BAUD__IWR REG_IWR_WO
+
+#define R_SERIAL3_BAUD__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SERIAL3_BAUD__tr_baud__tr_baud__MASK 0x000000f0U
+#define R_SERIAL3_BAUD__rec_baud__rec_baud__MASK 0x0000000fU
+
+#define R_SERIAL3_BAUD__tr_baud__MAX 0xf
+#define R_SERIAL3_BAUD__rec_baud__MAX 0xf
+
+#define R_SERIAL3_BAUD__tr_baud__MIN 0
+#define R_SERIAL3_BAUD__rec_baud__MIN 0
+
+#define R_SERIAL3_BAUD__tr_baud__BITNR 4
+#define R_SERIAL3_BAUD__rec_baud__BITNR 0
+
+#define R_SERIAL3_BAUD__tr_baud__tr_baud__VAL REG_VAL_ENUM
+#define R_SERIAL3_BAUD__rec_baud__rec_baud__VAL REG_VAL_ENUM
+
+#define R_SERIAL3_BAUD__tr_baud__tr_baud__c115k2Hz 9
+#define R_SERIAL3_BAUD__tr_baud__tr_baud__c1200Hz 2
+#define R_SERIAL3_BAUD__tr_baud__tr_baud__c1843k2Hz 13
+#define R_SERIAL3_BAUD__tr_baud__tr_baud__c19k2Hz 6
+#define R_SERIAL3_BAUD__tr_baud__tr_baud__c230k4Hz 10
+#define R_SERIAL3_BAUD__tr_baud__tr_baud__c2400Hz 3
+#define R_SERIAL3_BAUD__tr_baud__tr_baud__c300Hz 0
+#define R_SERIAL3_BAUD__tr_baud__tr_baud__c38k4Hz 7
+#define R_SERIAL3_BAUD__tr_baud__tr_baud__c460k8Hz 11
+#define R_SERIAL3_BAUD__tr_baud__tr_baud__c4800Hz 4
+#define R_SERIAL3_BAUD__tr_baud__tr_baud__c57k6Hz 8
+#define R_SERIAL3_BAUD__tr_baud__tr_baud__c600Hz 1
+#define R_SERIAL3_BAUD__tr_baud__tr_baud__c6250kHz 14
+#define R_SERIAL3_BAUD__tr_baud__tr_baud__c921k6Hz 12
+#define R_SERIAL3_BAUD__tr_baud__tr_baud__c9600Hz 5
+#define R_SERIAL3_BAUD__rec_baud__rec_baud__c115k2Hz 9
+#define R_SERIAL3_BAUD__rec_baud__rec_baud__c1200Hz 2
+#define R_SERIAL3_BAUD__rec_baud__rec_baud__c1843k2Hz 13
+#define R_SERIAL3_BAUD__rec_baud__rec_baud__c19k2Hz 6
+#define R_SERIAL3_BAUD__rec_baud__rec_baud__c230k4Hz 10
+#define R_SERIAL3_BAUD__rec_baud__rec_baud__c2400Hz 3
+#define R_SERIAL3_BAUD__rec_baud__rec_baud__c300Hz 0
+#define R_SERIAL3_BAUD__rec_baud__rec_baud__c38k4Hz 7
+#define R_SERIAL3_BAUD__rec_baud__rec_baud__c460k8Hz 11
+#define R_SERIAL3_BAUD__rec_baud__rec_baud__c4800Hz 4
+#define R_SERIAL3_BAUD__rec_baud__rec_baud__c57k6Hz 8
+#define R_SERIAL3_BAUD__rec_baud__rec_baud__c600Hz 1
+#define R_SERIAL3_BAUD__rec_baud__rec_baud__c6250kHz 14
+#define R_SERIAL3_BAUD__rec_baud__rec_baud__c921k6Hz 12
+#define R_SERIAL3_BAUD__rec_baud__rec_baud__c9600Hz 5
+
+#endif
+
+/*
+ * R_SERIAL3_CTRL
+ * - type: WO
+ * - addr: 0xb0000078
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL3_CTRL__ADDR (REG_TYPECAST_UDWORD 0xb0000078)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL3_CTRL__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_SERIAL3_CTRL + 0))
+#define R_SERIAL3_CTRL__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_SERIAL3_CTRL + 0))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL3_CTRL__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_SERIAL3_CTRL__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL3_CTRL__STYPECAST REG_STYPECAST_UDWORD
+#define R_SERIAL3_CTRL__SVAL REG_SVAL_SHADOW
+#define R_SERIAL3_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL3_CTRL__TYPECAST REG_TYPECAST_UDWORD
+#define R_SERIAL3_CTRL__TYPE (REG_UDWORD)
+#define R_SERIAL3_CTRL__GET REG_GET_WO
+#define R_SERIAL3_CTRL__IGET REG_IGET_WO
+#define R_SERIAL3_CTRL__SET REG_SET_WO
+#define R_SERIAL3_CTRL__ISET REG_ISET_WO
+#define R_SERIAL3_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL3_CTRL__EQL REG_EQL_WO
+#define R_SERIAL3_CTRL__IEQL REG_IEQL_WO
+#define R_SERIAL3_CTRL__RD REG_RD_WO
+#define R_SERIAL3_CTRL__IRD REG_IRD_WO
+#define R_SERIAL3_CTRL__WR REG_WR_WO
+#define R_SERIAL3_CTRL__IWR REG_IWR_WO
+
+#define R_SERIAL3_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SERIAL3_CTRL__tr_baud__tr_baud__MASK 0xf0000000U
+#define R_SERIAL3_CTRL__rec_baud__rec_baud__MASK 0x0f000000U
+#define R_SERIAL3_CTRL__dma_err__dma_err__MASK 0x00800000U
+#define R_SERIAL3_CTRL__rec_enable__rec_enable__MASK 0x00400000U
+#define R_SERIAL3_CTRL__rts___rts___MASK 0x00200000U
+#define R_SERIAL3_CTRL__sampling__sampling__MASK 0x00100000U
+#define R_SERIAL3_CTRL__rec_stick_par__rec_stick_par__MASK 0x00080000U
+#define R_SERIAL3_CTRL__rec_par__rec_par__MASK 0x00040000U
+#define R_SERIAL3_CTRL__rec_par_en__rec_par_en__MASK 0x00020000U
+#define R_SERIAL3_CTRL__rec_bitnr__rec_bitnr__MASK 0x00010000U
+#define R_SERIAL3_CTRL__txd__txd__MASK 0x00008000U
+#define R_SERIAL3_CTRL__tr_enable__tr_enable__MASK 0x00004000U
+#define R_SERIAL3_CTRL__auto_cts__auto_cts__MASK 0x00002000U
+#define R_SERIAL3_CTRL__stop_bits__stop_bits__MASK 0x00001000U
+#define R_SERIAL3_CTRL__tr_stick_par__tr_stick_par__MASK 0x00000800U
+#define R_SERIAL3_CTRL__tr_par__tr_par__MASK 0x00000400U
+#define R_SERIAL3_CTRL__tr_par_en__tr_par_en__MASK 0x00000200U
+#define R_SERIAL3_CTRL__tr_bitnr__tr_bitnr__MASK 0x00000100U
+#define R_SERIAL3_CTRL__data_out__data_out__MASK 0x000000ffU
+
+#define R_SERIAL3_CTRL__tr_baud__MAX 0xf
+#define R_SERIAL3_CTRL__rec_baud__MAX 0xf
+#define R_SERIAL3_CTRL__dma_err__MAX 0x1
+#define R_SERIAL3_CTRL__rec_enable__MAX 0x1
+#define R_SERIAL3_CTRL__rts___MAX 0x1
+#define R_SERIAL3_CTRL__sampling__MAX 0x1
+#define R_SERIAL3_CTRL__rec_stick_par__MAX 0x1
+#define R_SERIAL3_CTRL__rec_par__MAX 0x1
+#define R_SERIAL3_CTRL__rec_par_en__MAX 0x1
+#define R_SERIAL3_CTRL__rec_bitnr__MAX 0x1
+#define R_SERIAL3_CTRL__txd__MAX 0x1
+#define R_SERIAL3_CTRL__tr_enable__MAX 0x1
+#define R_SERIAL3_CTRL__auto_cts__MAX 0x1
+#define R_SERIAL3_CTRL__stop_bits__MAX 0x1
+#define R_SERIAL3_CTRL__tr_stick_par__MAX 0x1
+#define R_SERIAL3_CTRL__tr_par__MAX 0x1
+#define R_SERIAL3_CTRL__tr_par_en__MAX 0x1
+#define R_SERIAL3_CTRL__tr_bitnr__MAX 0x1
+#define R_SERIAL3_CTRL__data_out__MAX 0xff
+
+#define R_SERIAL3_CTRL__tr_baud__MIN 0
+#define R_SERIAL3_CTRL__rec_baud__MIN 0
+#define R_SERIAL3_CTRL__dma_err__MIN 0
+#define R_SERIAL3_CTRL__rec_enable__MIN 0
+#define R_SERIAL3_CTRL__rts___MIN 0
+#define R_SERIAL3_CTRL__sampling__MIN 0
+#define R_SERIAL3_CTRL__rec_stick_par__MIN 0
+#define R_SERIAL3_CTRL__rec_par__MIN 0
+#define R_SERIAL3_CTRL__rec_par_en__MIN 0
+#define R_SERIAL3_CTRL__rec_bitnr__MIN 0
+#define R_SERIAL3_CTRL__txd__MIN 0
+#define R_SERIAL3_CTRL__tr_enable__MIN 0
+#define R_SERIAL3_CTRL__auto_cts__MIN 0
+#define R_SERIAL3_CTRL__stop_bits__MIN 0
+#define R_SERIAL3_CTRL__tr_stick_par__MIN 0
+#define R_SERIAL3_CTRL__tr_par__MIN 0
+#define R_SERIAL3_CTRL__tr_par_en__MIN 0
+#define R_SERIAL3_CTRL__tr_bitnr__MIN 0
+#define R_SERIAL3_CTRL__data_out__MIN 0
+
+#define R_SERIAL3_CTRL__tr_baud__BITNR 28
+#define R_SERIAL3_CTRL__rec_baud__BITNR 24
+#define R_SERIAL3_CTRL__dma_err__BITNR 23
+#define R_SERIAL3_CTRL__rec_enable__BITNR 22
+#define R_SERIAL3_CTRL__rts___BITNR 21
+#define R_SERIAL3_CTRL__sampling__BITNR 20
+#define R_SERIAL3_CTRL__rec_stick_par__BITNR 19
+#define R_SERIAL3_CTRL__rec_par__BITNR 18
+#define R_SERIAL3_CTRL__rec_par_en__BITNR 17
+#define R_SERIAL3_CTRL__rec_bitnr__BITNR 16
+#define R_SERIAL3_CTRL__txd__BITNR 15
+#define R_SERIAL3_CTRL__tr_enable__BITNR 14
+#define R_SERIAL3_CTRL__auto_cts__BITNR 13
+#define R_SERIAL3_CTRL__stop_bits__BITNR 12
+#define R_SERIAL3_CTRL__tr_stick_par__BITNR 11
+#define R_SERIAL3_CTRL__tr_par__BITNR 10
+#define R_SERIAL3_CTRL__tr_par_en__BITNR 9
+#define R_SERIAL3_CTRL__tr_bitnr__BITNR 8
+#define R_SERIAL3_CTRL__data_out__BITNR 0
+
+#define R_SERIAL3_CTRL__tr_baud__tr_baud__VAL REG_VAL_ENUM
+#define R_SERIAL3_CTRL__rec_baud__rec_baud__VAL REG_VAL_ENUM
+#define R_SERIAL3_CTRL__dma_err__dma_err__VAL REG_VAL_ENUM
+#define R_SERIAL3_CTRL__rec_enable__rec_enable__VAL REG_VAL_ENUM
+#define R_SERIAL3_CTRL__rts___rts___VAL REG_VAL_ENUM
+#define R_SERIAL3_CTRL__sampling__sampling__VAL REG_VAL_ENUM
+#define R_SERIAL3_CTRL__rec_stick_par__rec_stick_par__VAL REG_VAL_ENUM
+#define R_SERIAL3_CTRL__rec_par__rec_par__VAL REG_VAL_ENUM
+#define R_SERIAL3_CTRL__rec_par_en__rec_par_en__VAL REG_VAL_ENUM
+#define R_SERIAL3_CTRL__rec_bitnr__rec_bitnr__VAL REG_VAL_ENUM
+#define R_SERIAL3_CTRL__txd__txd__VAL REG_VAL_VAL
+#define R_SERIAL3_CTRL__tr_enable__tr_enable__VAL REG_VAL_ENUM
+#define R_SERIAL3_CTRL__auto_cts__auto_cts__VAL REG_VAL_ENUM
+#define R_SERIAL3_CTRL__stop_bits__stop_bits__VAL REG_VAL_ENUM
+#define R_SERIAL3_CTRL__tr_stick_par__tr_stick_par__VAL REG_VAL_ENUM
+#define R_SERIAL3_CTRL__tr_par__tr_par__VAL REG_VAL_ENUM
+#define R_SERIAL3_CTRL__tr_par_en__tr_par_en__VAL REG_VAL_ENUM
+#define R_SERIAL3_CTRL__tr_bitnr__tr_bitnr__VAL REG_VAL_ENUM
+#define R_SERIAL3_CTRL__data_out__data_out__VAL REG_VAL_VAL
+
+#define R_SERIAL3_CTRL__tr_baud__tr_baud__c115k2Hz 9
+#define R_SERIAL3_CTRL__tr_baud__tr_baud__c1200Hz 2
+#define R_SERIAL3_CTRL__tr_baud__tr_baud__c1843k2Hz 13
+#define R_SERIAL3_CTRL__tr_baud__tr_baud__c19k2Hz 6
+#define R_SERIAL3_CTRL__tr_baud__tr_baud__c230k4Hz 10
+#define R_SERIAL3_CTRL__tr_baud__tr_baud__c2400Hz 3
+#define R_SERIAL3_CTRL__tr_baud__tr_baud__c300Hz 0
+#define R_SERIAL3_CTRL__tr_baud__tr_baud__c38k4Hz 7
+#define R_SERIAL3_CTRL__tr_baud__tr_baud__c460k8Hz 11
+#define R_SERIAL3_CTRL__tr_baud__tr_baud__c4800Hz 4
+#define R_SERIAL3_CTRL__tr_baud__tr_baud__c57k6Hz 8
+#define R_SERIAL3_CTRL__tr_baud__tr_baud__c600Hz 1
+#define R_SERIAL3_CTRL__tr_baud__tr_baud__c6250kHz 14
+#define R_SERIAL3_CTRL__tr_baud__tr_baud__c921k6Hz 12
+#define R_SERIAL3_CTRL__tr_baud__tr_baud__c9600Hz 5
+#define R_SERIAL3_CTRL__rec_baud__rec_baud__c115k2Hz 9
+#define R_SERIAL3_CTRL__rec_baud__rec_baud__c1200Hz 2
+#define R_SERIAL3_CTRL__rec_baud__rec_baud__c1843k2Hz 13
+#define R_SERIAL3_CTRL__rec_baud__rec_baud__c19k2Hz 6
+#define R_SERIAL3_CTRL__rec_baud__rec_baud__c230k4Hz 10
+#define R_SERIAL3_CTRL__rec_baud__rec_baud__c2400Hz 3
+#define R_SERIAL3_CTRL__rec_baud__rec_baud__c300Hz 0
+#define R_SERIAL3_CTRL__rec_baud__rec_baud__c38k4Hz 7
+#define R_SERIAL3_CTRL__rec_baud__rec_baud__c460k8Hz 11
+#define R_SERIAL3_CTRL__rec_baud__rec_baud__c4800Hz 4
+#define R_SERIAL3_CTRL__rec_baud__rec_baud__c57k6Hz 8
+#define R_SERIAL3_CTRL__rec_baud__rec_baud__c600Hz 1
+#define R_SERIAL3_CTRL__rec_baud__rec_baud__c6250kHz 14
+#define R_SERIAL3_CTRL__rec_baud__rec_baud__c921k6Hz 12
+#define R_SERIAL3_CTRL__rec_baud__rec_baud__c9600Hz 5
+#define R_SERIAL3_CTRL__dma_err__dma_err__ignore 1
+#define R_SERIAL3_CTRL__dma_err__dma_err__stop 0
+#define R_SERIAL3_CTRL__rec_enable__rec_enable__disable 0
+#define R_SERIAL3_CTRL__rec_enable__rec_enable__enable 1
+#define R_SERIAL3_CTRL__rts___rts___active 0
+#define R_SERIAL3_CTRL__rts___rts___inactive 1
+#define R_SERIAL3_CTRL__sampling__sampling__majority 1
+#define R_SERIAL3_CTRL__sampling__sampling__middle 0
+#define R_SERIAL3_CTRL__rec_stick_par__rec_stick_par__normal 0
+#define R_SERIAL3_CTRL__rec_stick_par__rec_stick_par__stick 1
+#define R_SERIAL3_CTRL__rec_par__rec_par__even 0
+#define R_SERIAL3_CTRL__rec_par__rec_par__odd 1
+#define R_SERIAL3_CTRL__rec_par_en__rec_par_en__disable 0
+#define R_SERIAL3_CTRL__rec_par_en__rec_par_en__enable 1
+#define R_SERIAL3_CTRL__rec_bitnr__rec_bitnr__rec_7bit 1
+#define R_SERIAL3_CTRL__rec_bitnr__rec_bitnr__rec_8bit 0
+#define R_SERIAL3_CTRL__tr_enable__tr_enable__disable 0
+#define R_SERIAL3_CTRL__tr_enable__tr_enable__enable 1
+#define R_SERIAL3_CTRL__auto_cts__auto_cts__active 1
+#define R_SERIAL3_CTRL__auto_cts__auto_cts__disabled 0
+#define R_SERIAL3_CTRL__stop_bits__stop_bits__one_bit 0
+#define R_SERIAL3_CTRL__stop_bits__stop_bits__two_bits 1
+#define R_SERIAL3_CTRL__tr_stick_par__tr_stick_par__normal 0
+#define R_SERIAL3_CTRL__tr_stick_par__tr_stick_par__stick 1
+#define R_SERIAL3_CTRL__tr_par__tr_par__even 0
+#define R_SERIAL3_CTRL__tr_par__tr_par__odd 1
+#define R_SERIAL3_CTRL__tr_par_en__tr_par_en__disable 0
+#define R_SERIAL3_CTRL__tr_par_en__tr_par_en__enable 1
+#define R_SERIAL3_CTRL__tr_bitnr__tr_bitnr__tr_7bit 1
+#define R_SERIAL3_CTRL__tr_bitnr__tr_bitnr__tr_8bit 0
+
+#endif
+
+/*
+ * R_SERIAL3_READ
+ * - type: RO
+ * - addr: 0xb0000078
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL3_READ__ADDR (REG_TYPECAST_UDWORD 0xb0000078)
+#define R_SERIAL3_READ__SVAL REG_SVAL_SHADOW
+#define R_SERIAL3_READ__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL3_READ__TYPECAST REG_TYPECAST_UDWORD
+#define R_SERIAL3_READ__TYPE (REG_UDWORD)
+#define R_SERIAL3_READ__GET REG_GET_RO
+#define R_SERIAL3_READ__IGET REG_IGET_RO
+#define R_SERIAL3_READ__SET REG_SET_RO
+#define R_SERIAL3_READ__ISET REG_ISET_RO
+#define R_SERIAL3_READ__SET_VAL REG_SET_VAL_RO
+#define R_SERIAL3_READ__EQL REG_EQL_RO
+#define R_SERIAL3_READ__IEQL REG_IEQL_RO
+#define R_SERIAL3_READ__RD REG_RD_RO
+#define R_SERIAL3_READ__IRD REG_IRD_RO
+#define R_SERIAL3_READ__WR REG_WR_RO
+#define R_SERIAL3_READ__IWR REG_IWR_RO
+
+#define R_SERIAL3_READ__READ(addr) \
+ (*(addr))
+
+#define R_SERIAL3_READ__xoff_detect__xoff_detect__MASK 0x00008000U
+#define R_SERIAL3_READ__cts___cts___MASK 0x00004000U
+#define R_SERIAL3_READ__tr_ready__tr_ready__MASK 0x00002000U
+#define R_SERIAL3_READ__rxd__rxd__MASK 0x00001000U
+#define R_SERIAL3_READ__overrun__overrun__MASK 0x00000800U
+#define R_SERIAL3_READ__par_err__par_err__MASK 0x00000400U
+#define R_SERIAL3_READ__framing_err__framing_err__MASK 0x00000200U
+#define R_SERIAL3_READ__data_avail__data_avail__MASK 0x00000100U
+#define R_SERIAL3_READ__data_in__data_in__MASK 0x000000ffU
+
+#define R_SERIAL3_READ__xoff_detect__MAX 0x1
+#define R_SERIAL3_READ__cts___MAX 0x1
+#define R_SERIAL3_READ__tr_ready__MAX 0x1
+#define R_SERIAL3_READ__rxd__MAX 0x1
+#define R_SERIAL3_READ__overrun__MAX 0x1
+#define R_SERIAL3_READ__par_err__MAX 0x1
+#define R_SERIAL3_READ__framing_err__MAX 0x1
+#define R_SERIAL3_READ__data_avail__MAX 0x1
+#define R_SERIAL3_READ__data_in__MAX 0xff
+
+#define R_SERIAL3_READ__xoff_detect__MIN 0
+#define R_SERIAL3_READ__cts___MIN 0
+#define R_SERIAL3_READ__tr_ready__MIN 0
+#define R_SERIAL3_READ__rxd__MIN 0
+#define R_SERIAL3_READ__overrun__MIN 0
+#define R_SERIAL3_READ__par_err__MIN 0
+#define R_SERIAL3_READ__framing_err__MIN 0
+#define R_SERIAL3_READ__data_avail__MIN 0
+#define R_SERIAL3_READ__data_in__MIN 0
+
+#define R_SERIAL3_READ__xoff_detect__BITNR 15
+#define R_SERIAL3_READ__cts___BITNR 14
+#define R_SERIAL3_READ__tr_ready__BITNR 13
+#define R_SERIAL3_READ__rxd__BITNR 12
+#define R_SERIAL3_READ__overrun__BITNR 11
+#define R_SERIAL3_READ__par_err__BITNR 10
+#define R_SERIAL3_READ__framing_err__BITNR 9
+#define R_SERIAL3_READ__data_avail__BITNR 8
+#define R_SERIAL3_READ__data_in__BITNR 0
+
+#define R_SERIAL3_READ__xoff_detect__xoff_detect__VAL REG_VAL_ENUM
+#define R_SERIAL3_READ__cts___cts___VAL REG_VAL_ENUM
+#define R_SERIAL3_READ__tr_ready__tr_ready__VAL REG_VAL_ENUM
+#define R_SERIAL3_READ__rxd__rxd__VAL REG_VAL_VAL
+#define R_SERIAL3_READ__overrun__overrun__VAL REG_VAL_ENUM
+#define R_SERIAL3_READ__par_err__par_err__VAL REG_VAL_ENUM
+#define R_SERIAL3_READ__framing_err__framing_err__VAL REG_VAL_ENUM
+#define R_SERIAL3_READ__data_avail__data_avail__VAL REG_VAL_ENUM
+#define R_SERIAL3_READ__data_in__data_in__VAL REG_VAL_VAL
+
+#define R_SERIAL3_READ__xoff_detect__xoff_detect__no_xoff 0
+#define R_SERIAL3_READ__xoff_detect__xoff_detect__xoff 1
+#define R_SERIAL3_READ__cts___cts___active 0
+#define R_SERIAL3_READ__cts___cts___inactive 1
+#define R_SERIAL3_READ__tr_ready__tr_ready__full 0
+#define R_SERIAL3_READ__tr_ready__tr_ready__ready 1
+#define R_SERIAL3_READ__overrun__overrun__no 0
+#define R_SERIAL3_READ__overrun__overrun__yes 1
+#define R_SERIAL3_READ__par_err__par_err__no 0
+#define R_SERIAL3_READ__par_err__par_err__yes 1
+#define R_SERIAL3_READ__framing_err__framing_err__no 0
+#define R_SERIAL3_READ__framing_err__framing_err__yes 1
+#define R_SERIAL3_READ__data_avail__data_avail__no 0
+#define R_SERIAL3_READ__data_avail__data_avail__yes 1
+
+#endif
+
+/*
+ * R_SERIAL3_REC_CTRL
+ * - type: WO
+ * - addr: 0xb000007a
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL3_REC_CTRL__ADDR (REG_TYPECAST_BYTE 0xb000007a)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL3_REC_CTRL__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_SERIAL3_CTRL + 2))
+#define R_SERIAL3_REC_CTRL__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_SERIAL3_CTRL + 2))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL3_REC_CTRL__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_SERIAL3_REC_CTRL__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL3_REC_CTRL__STYPECAST REG_STYPECAST_BYTE
+#define R_SERIAL3_REC_CTRL__SVAL REG_SVAL_SHADOW
+#define R_SERIAL3_REC_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL3_REC_CTRL__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL3_REC_CTRL__TYPE (REG_BYTE)
+#define R_SERIAL3_REC_CTRL__GET REG_GET_WO
+#define R_SERIAL3_REC_CTRL__IGET REG_IGET_WO
+#define R_SERIAL3_REC_CTRL__SET REG_SET_WO
+#define R_SERIAL3_REC_CTRL__ISET REG_ISET_WO
+#define R_SERIAL3_REC_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL3_REC_CTRL__EQL REG_EQL_WO
+#define R_SERIAL3_REC_CTRL__IEQL REG_IEQL_WO
+#define R_SERIAL3_REC_CTRL__RD REG_RD_WO
+#define R_SERIAL3_REC_CTRL__IRD REG_IRD_WO
+#define R_SERIAL3_REC_CTRL__WR REG_WR_WO
+#define R_SERIAL3_REC_CTRL__IWR REG_IWR_WO
+
+#define R_SERIAL3_REC_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SERIAL3_REC_CTRL__dma_err__dma_err__MASK 0x00000080U
+#define R_SERIAL3_REC_CTRL__rec_enable__rec_enable__MASK 0x00000040U
+#define R_SERIAL3_REC_CTRL__rts___rts___MASK 0x00000020U
+#define R_SERIAL3_REC_CTRL__sampling__sampling__MASK 0x00000010U
+#define R_SERIAL3_REC_CTRL__rec_stick_par__rec_stick_par__MASK 0x00000008U
+#define R_SERIAL3_REC_CTRL__rec_par__rec_par__MASK 0x00000004U
+#define R_SERIAL3_REC_CTRL__rec_par_en__rec_par_en__MASK 0x00000002U
+#define R_SERIAL3_REC_CTRL__rec_bitnr__rec_bitnr__MASK 0x00000001U
+
+#define R_SERIAL3_REC_CTRL__dma_err__MAX 0x1
+#define R_SERIAL3_REC_CTRL__rec_enable__MAX 0x1
+#define R_SERIAL3_REC_CTRL__rts___MAX 0x1
+#define R_SERIAL3_REC_CTRL__sampling__MAX 0x1
+#define R_SERIAL3_REC_CTRL__rec_stick_par__MAX 0x1
+#define R_SERIAL3_REC_CTRL__rec_par__MAX 0x1
+#define R_SERIAL3_REC_CTRL__rec_par_en__MAX 0x1
+#define R_SERIAL3_REC_CTRL__rec_bitnr__MAX 0x1
+
+#define R_SERIAL3_REC_CTRL__dma_err__MIN 0
+#define R_SERIAL3_REC_CTRL__rec_enable__MIN 0
+#define R_SERIAL3_REC_CTRL__rts___MIN 0
+#define R_SERIAL3_REC_CTRL__sampling__MIN 0
+#define R_SERIAL3_REC_CTRL__rec_stick_par__MIN 0
+#define R_SERIAL3_REC_CTRL__rec_par__MIN 0
+#define R_SERIAL3_REC_CTRL__rec_par_en__MIN 0
+#define R_SERIAL3_REC_CTRL__rec_bitnr__MIN 0
+
+#define R_SERIAL3_REC_CTRL__dma_err__BITNR 7
+#define R_SERIAL3_REC_CTRL__rec_enable__BITNR 6
+#define R_SERIAL3_REC_CTRL__rts___BITNR 5
+#define R_SERIAL3_REC_CTRL__sampling__BITNR 4
+#define R_SERIAL3_REC_CTRL__rec_stick_par__BITNR 3
+#define R_SERIAL3_REC_CTRL__rec_par__BITNR 2
+#define R_SERIAL3_REC_CTRL__rec_par_en__BITNR 1
+#define R_SERIAL3_REC_CTRL__rec_bitnr__BITNR 0
+
+#define R_SERIAL3_REC_CTRL__dma_err__dma_err__VAL REG_VAL_ENUM
+#define R_SERIAL3_REC_CTRL__rec_enable__rec_enable__VAL REG_VAL_ENUM
+#define R_SERIAL3_REC_CTRL__rts___rts___VAL REG_VAL_ENUM
+#define R_SERIAL3_REC_CTRL__sampling__sampling__VAL REG_VAL_ENUM
+#define R_SERIAL3_REC_CTRL__rec_stick_par__rec_stick_par__VAL REG_VAL_ENUM
+#define R_SERIAL3_REC_CTRL__rec_par__rec_par__VAL REG_VAL_ENUM
+#define R_SERIAL3_REC_CTRL__rec_par_en__rec_par_en__VAL REG_VAL_ENUM
+#define R_SERIAL3_REC_CTRL__rec_bitnr__rec_bitnr__VAL REG_VAL_ENUM
+
+#define R_SERIAL3_REC_CTRL__dma_err__dma_err__ignore 1
+#define R_SERIAL3_REC_CTRL__dma_err__dma_err__stop 0
+#define R_SERIAL3_REC_CTRL__rec_enable__rec_enable__disable 0
+#define R_SERIAL3_REC_CTRL__rec_enable__rec_enable__enable 1
+#define R_SERIAL3_REC_CTRL__rts___rts___active 0
+#define R_SERIAL3_REC_CTRL__rts___rts___inactive 1
+#define R_SERIAL3_REC_CTRL__sampling__sampling__majority 1
+#define R_SERIAL3_REC_CTRL__sampling__sampling__middle 0
+#define R_SERIAL3_REC_CTRL__rec_stick_par__rec_stick_par__normal 0
+#define R_SERIAL3_REC_CTRL__rec_stick_par__rec_stick_par__stick 1
+#define R_SERIAL3_REC_CTRL__rec_par__rec_par__even 0
+#define R_SERIAL3_REC_CTRL__rec_par__rec_par__odd 1
+#define R_SERIAL3_REC_CTRL__rec_par_en__rec_par_en__disable 0
+#define R_SERIAL3_REC_CTRL__rec_par_en__rec_par_en__enable 1
+#define R_SERIAL3_REC_CTRL__rec_bitnr__rec_bitnr__rec_7bit 1
+#define R_SERIAL3_REC_CTRL__rec_bitnr__rec_bitnr__rec_8bit 0
+
+#endif
+
+/*
+ * R_SERIAL3_REC_DATA
+ * - type: RO
+ * - addr: 0xb0000078
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL3_REC_DATA__ADDR (REG_TYPECAST_BYTE 0xb0000078)
+#define R_SERIAL3_REC_DATA__SVAL REG_SVAL_SHADOW
+#define R_SERIAL3_REC_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL3_REC_DATA__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL3_REC_DATA__TYPE (REG_BYTE)
+#define R_SERIAL3_REC_DATA__GET REG_GET_RO
+#define R_SERIAL3_REC_DATA__IGET REG_IGET_RO
+#define R_SERIAL3_REC_DATA__SET REG_SET_RO
+#define R_SERIAL3_REC_DATA__ISET REG_ISET_RO
+#define R_SERIAL3_REC_DATA__SET_VAL REG_SET_VAL_RO
+#define R_SERIAL3_REC_DATA__EQL REG_EQL_RO
+#define R_SERIAL3_REC_DATA__IEQL REG_IEQL_RO
+#define R_SERIAL3_REC_DATA__RD REG_RD_RO
+#define R_SERIAL3_REC_DATA__IRD REG_IRD_RO
+#define R_SERIAL3_REC_DATA__WR REG_WR_RO
+#define R_SERIAL3_REC_DATA__IWR REG_IWR_RO
+
+#define R_SERIAL3_REC_DATA__READ(addr) \
+ (*(addr))
+
+#define R_SERIAL3_REC_DATA__data_in__data_in__MASK 0x000000ffU
+
+#define R_SERIAL3_REC_DATA__data_in__MAX 0xff
+
+#define R_SERIAL3_REC_DATA__data_in__MIN 0
+
+#define R_SERIAL3_REC_DATA__data_in__BITNR 0
+
+#define R_SERIAL3_REC_DATA__data_in__data_in__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SERIAL3_STATUS
+ * - type: RO
+ * - addr: 0xb0000079
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL3_STATUS__ADDR (REG_TYPECAST_BYTE 0xb0000079)
+#define R_SERIAL3_STATUS__SVAL REG_SVAL_SHADOW
+#define R_SERIAL3_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL3_STATUS__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL3_STATUS__TYPE (REG_BYTE)
+#define R_SERIAL3_STATUS__GET REG_GET_RO
+#define R_SERIAL3_STATUS__IGET REG_IGET_RO
+#define R_SERIAL3_STATUS__SET REG_SET_RO
+#define R_SERIAL3_STATUS__ISET REG_ISET_RO
+#define R_SERIAL3_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_SERIAL3_STATUS__EQL REG_EQL_RO
+#define R_SERIAL3_STATUS__IEQL REG_IEQL_RO
+#define R_SERIAL3_STATUS__RD REG_RD_RO
+#define R_SERIAL3_STATUS__IRD REG_IRD_RO
+#define R_SERIAL3_STATUS__WR REG_WR_RO
+#define R_SERIAL3_STATUS__IWR REG_IWR_RO
+
+#define R_SERIAL3_STATUS__READ(addr) \
+ (*(addr))
+
+#define R_SERIAL3_STATUS__xoff_detect__xoff_detect__MASK 0x00000080U
+#define R_SERIAL3_STATUS__cts___cts___MASK 0x00000040U
+#define R_SERIAL3_STATUS__tr_ready__tr_ready__MASK 0x00000020U
+#define R_SERIAL3_STATUS__rxd__rxd__MASK 0x00000010U
+#define R_SERIAL3_STATUS__overrun__overrun__MASK 0x00000008U
+#define R_SERIAL3_STATUS__par_err__par_err__MASK 0x00000004U
+#define R_SERIAL3_STATUS__framing_err__framing_err__MASK 0x00000002U
+#define R_SERIAL3_STATUS__data_avail__data_avail__MASK 0x00000001U
+
+#define R_SERIAL3_STATUS__xoff_detect__MAX 0x1
+#define R_SERIAL3_STATUS__cts___MAX 0x1
+#define R_SERIAL3_STATUS__tr_ready__MAX 0x1
+#define R_SERIAL3_STATUS__rxd__MAX 0x1
+#define R_SERIAL3_STATUS__overrun__MAX 0x1
+#define R_SERIAL3_STATUS__par_err__MAX 0x1
+#define R_SERIAL3_STATUS__framing_err__MAX 0x1
+#define R_SERIAL3_STATUS__data_avail__MAX 0x1
+
+#define R_SERIAL3_STATUS__xoff_detect__MIN 0
+#define R_SERIAL3_STATUS__cts___MIN 0
+#define R_SERIAL3_STATUS__tr_ready__MIN 0
+#define R_SERIAL3_STATUS__rxd__MIN 0
+#define R_SERIAL3_STATUS__overrun__MIN 0
+#define R_SERIAL3_STATUS__par_err__MIN 0
+#define R_SERIAL3_STATUS__framing_err__MIN 0
+#define R_SERIAL3_STATUS__data_avail__MIN 0
+
+#define R_SERIAL3_STATUS__xoff_detect__BITNR 7
+#define R_SERIAL3_STATUS__cts___BITNR 6
+#define R_SERIAL3_STATUS__tr_ready__BITNR 5
+#define R_SERIAL3_STATUS__rxd__BITNR 4
+#define R_SERIAL3_STATUS__overrun__BITNR 3
+#define R_SERIAL3_STATUS__par_err__BITNR 2
+#define R_SERIAL3_STATUS__framing_err__BITNR 1
+#define R_SERIAL3_STATUS__data_avail__BITNR 0
+
+#define R_SERIAL3_STATUS__xoff_detect__xoff_detect__VAL REG_VAL_ENUM
+#define R_SERIAL3_STATUS__cts___cts___VAL REG_VAL_ENUM
+#define R_SERIAL3_STATUS__tr_ready__tr_ready__VAL REG_VAL_ENUM
+#define R_SERIAL3_STATUS__rxd__rxd__VAL REG_VAL_VAL
+#define R_SERIAL3_STATUS__overrun__overrun__VAL REG_VAL_ENUM
+#define R_SERIAL3_STATUS__par_err__par_err__VAL REG_VAL_ENUM
+#define R_SERIAL3_STATUS__framing_err__framing_err__VAL REG_VAL_ENUM
+#define R_SERIAL3_STATUS__data_avail__data_avail__VAL REG_VAL_ENUM
+
+#define R_SERIAL3_STATUS__xoff_detect__xoff_detect__no_xoff 0
+#define R_SERIAL3_STATUS__xoff_detect__xoff_detect__xoff 1
+#define R_SERIAL3_STATUS__cts___cts___active 0
+#define R_SERIAL3_STATUS__cts___cts___inactive 1
+#define R_SERIAL3_STATUS__tr_ready__tr_ready__full 0
+#define R_SERIAL3_STATUS__tr_ready__tr_ready__ready 1
+#define R_SERIAL3_STATUS__overrun__overrun__no 0
+#define R_SERIAL3_STATUS__overrun__overrun__yes 1
+#define R_SERIAL3_STATUS__par_err__par_err__no 0
+#define R_SERIAL3_STATUS__par_err__par_err__yes 1
+#define R_SERIAL3_STATUS__framing_err__framing_err__no 0
+#define R_SERIAL3_STATUS__framing_err__framing_err__yes 1
+#define R_SERIAL3_STATUS__data_avail__data_avail__no 0
+#define R_SERIAL3_STATUS__data_avail__data_avail__yes 1
+
+#endif
+
+/*
+ * R_SERIAL3_TR_CTRL
+ * - type: WO
+ * - addr: 0xb0000079
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL3_TR_CTRL__ADDR (REG_TYPECAST_BYTE 0xb0000079)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL3_TR_CTRL__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_SERIAL3_CTRL + 1))
+#define R_SERIAL3_TR_CTRL__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_SERIAL3_CTRL + 1))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL3_TR_CTRL__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_SERIAL3_TR_CTRL__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL3_TR_CTRL__STYPECAST REG_STYPECAST_BYTE
+#define R_SERIAL3_TR_CTRL__SVAL REG_SVAL_SHADOW
+#define R_SERIAL3_TR_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL3_TR_CTRL__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL3_TR_CTRL__TYPE (REG_BYTE)
+#define R_SERIAL3_TR_CTRL__GET REG_GET_WO
+#define R_SERIAL3_TR_CTRL__IGET REG_IGET_WO
+#define R_SERIAL3_TR_CTRL__SET REG_SET_WO
+#define R_SERIAL3_TR_CTRL__ISET REG_ISET_WO
+#define R_SERIAL3_TR_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL3_TR_CTRL__EQL REG_EQL_WO
+#define R_SERIAL3_TR_CTRL__IEQL REG_IEQL_WO
+#define R_SERIAL3_TR_CTRL__RD REG_RD_WO
+#define R_SERIAL3_TR_CTRL__IRD REG_IRD_WO
+#define R_SERIAL3_TR_CTRL__WR REG_WR_WO
+#define R_SERIAL3_TR_CTRL__IWR REG_IWR_WO
+
+#define R_SERIAL3_TR_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SERIAL3_TR_CTRL__txd__txd__MASK 0x00000080U
+#define R_SERIAL3_TR_CTRL__tr_enable__tr_enable__MASK 0x00000040U
+#define R_SERIAL3_TR_CTRL__auto_cts__auto_cts__MASK 0x00000020U
+#define R_SERIAL3_TR_CTRL__stop_bits__stop_bits__MASK 0x00000010U
+#define R_SERIAL3_TR_CTRL__tr_stick_par__tr_stick_par__MASK 0x00000008U
+#define R_SERIAL3_TR_CTRL__tr_par__tr_par__MASK 0x00000004U
+#define R_SERIAL3_TR_CTRL__tr_par_en__tr_par_en__MASK 0x00000002U
+#define R_SERIAL3_TR_CTRL__tr_bitnr__tr_bitnr__MASK 0x00000001U
+
+#define R_SERIAL3_TR_CTRL__txd__MAX 0x1
+#define R_SERIAL3_TR_CTRL__tr_enable__MAX 0x1
+#define R_SERIAL3_TR_CTRL__auto_cts__MAX 0x1
+#define R_SERIAL3_TR_CTRL__stop_bits__MAX 0x1
+#define R_SERIAL3_TR_CTRL__tr_stick_par__MAX 0x1
+#define R_SERIAL3_TR_CTRL__tr_par__MAX 0x1
+#define R_SERIAL3_TR_CTRL__tr_par_en__MAX 0x1
+#define R_SERIAL3_TR_CTRL__tr_bitnr__MAX 0x1
+
+#define R_SERIAL3_TR_CTRL__txd__MIN 0
+#define R_SERIAL3_TR_CTRL__tr_enable__MIN 0
+#define R_SERIAL3_TR_CTRL__auto_cts__MIN 0
+#define R_SERIAL3_TR_CTRL__stop_bits__MIN 0
+#define R_SERIAL3_TR_CTRL__tr_stick_par__MIN 0
+#define R_SERIAL3_TR_CTRL__tr_par__MIN 0
+#define R_SERIAL3_TR_CTRL__tr_par_en__MIN 0
+#define R_SERIAL3_TR_CTRL__tr_bitnr__MIN 0
+
+#define R_SERIAL3_TR_CTRL__txd__BITNR 7
+#define R_SERIAL3_TR_CTRL__tr_enable__BITNR 6
+#define R_SERIAL3_TR_CTRL__auto_cts__BITNR 5
+#define R_SERIAL3_TR_CTRL__stop_bits__BITNR 4
+#define R_SERIAL3_TR_CTRL__tr_stick_par__BITNR 3
+#define R_SERIAL3_TR_CTRL__tr_par__BITNR 2
+#define R_SERIAL3_TR_CTRL__tr_par_en__BITNR 1
+#define R_SERIAL3_TR_CTRL__tr_bitnr__BITNR 0
+
+#define R_SERIAL3_TR_CTRL__txd__txd__VAL REG_VAL_VAL
+#define R_SERIAL3_TR_CTRL__tr_enable__tr_enable__VAL REG_VAL_ENUM
+#define R_SERIAL3_TR_CTRL__auto_cts__auto_cts__VAL REG_VAL_ENUM
+#define R_SERIAL3_TR_CTRL__stop_bits__stop_bits__VAL REG_VAL_ENUM
+#define R_SERIAL3_TR_CTRL__tr_stick_par__tr_stick_par__VAL REG_VAL_ENUM
+#define R_SERIAL3_TR_CTRL__tr_par__tr_par__VAL REG_VAL_ENUM
+#define R_SERIAL3_TR_CTRL__tr_par_en__tr_par_en__VAL REG_VAL_ENUM
+#define R_SERIAL3_TR_CTRL__tr_bitnr__tr_bitnr__VAL REG_VAL_ENUM
+
+#define R_SERIAL3_TR_CTRL__tr_enable__tr_enable__disable 0
+#define R_SERIAL3_TR_CTRL__tr_enable__tr_enable__enable 1
+#define R_SERIAL3_TR_CTRL__auto_cts__auto_cts__active 1
+#define R_SERIAL3_TR_CTRL__auto_cts__auto_cts__disabled 0
+#define R_SERIAL3_TR_CTRL__stop_bits__stop_bits__one_bit 0
+#define R_SERIAL3_TR_CTRL__stop_bits__stop_bits__two_bits 1
+#define R_SERIAL3_TR_CTRL__tr_stick_par__tr_stick_par__normal 0
+#define R_SERIAL3_TR_CTRL__tr_stick_par__tr_stick_par__stick 1
+#define R_SERIAL3_TR_CTRL__tr_par__tr_par__even 0
+#define R_SERIAL3_TR_CTRL__tr_par__tr_par__odd 1
+#define R_SERIAL3_TR_CTRL__tr_par_en__tr_par_en__disable 0
+#define R_SERIAL3_TR_CTRL__tr_par_en__tr_par_en__enable 1
+#define R_SERIAL3_TR_CTRL__tr_bitnr__tr_bitnr__tr_7bit 1
+#define R_SERIAL3_TR_CTRL__tr_bitnr__tr_bitnr__tr_8bit 0
+
+#endif
+
+/*
+ * R_SERIAL3_TR_DATA
+ * - type: WO
+ * - addr: 0xb0000078
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL3_TR_DATA__ADDR (REG_TYPECAST_BYTE 0xb0000078)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL3_TR_DATA__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_SERIAL3_CTRL + 0))
+#define R_SERIAL3_TR_DATA__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_SERIAL3_CTRL + 0))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL3_TR_DATA__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_SERIAL3_TR_DATA__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL3_TR_DATA__STYPECAST REG_STYPECAST_BYTE
+#define R_SERIAL3_TR_DATA__SVAL REG_SVAL_SHADOW
+#define R_SERIAL3_TR_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL3_TR_DATA__TYPECAST REG_TYPECAST_BYTE
+#define R_SERIAL3_TR_DATA__TYPE (REG_BYTE)
+#define R_SERIAL3_TR_DATA__GET REG_GET_WO
+#define R_SERIAL3_TR_DATA__IGET REG_IGET_WO
+#define R_SERIAL3_TR_DATA__SET REG_SET_WO
+#define R_SERIAL3_TR_DATA__ISET REG_ISET_WO
+#define R_SERIAL3_TR_DATA__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL3_TR_DATA__EQL REG_EQL_WO
+#define R_SERIAL3_TR_DATA__IEQL REG_IEQL_WO
+#define R_SERIAL3_TR_DATA__RD REG_RD_WO
+#define R_SERIAL3_TR_DATA__IRD REG_IRD_WO
+#define R_SERIAL3_TR_DATA__WR REG_WR_WO
+#define R_SERIAL3_TR_DATA__IWR REG_IWR_WO
+
+#define R_SERIAL3_TR_DATA__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SERIAL3_TR_DATA__data_out__data_out__MASK 0x000000ffU
+
+#define R_SERIAL3_TR_DATA__data_out__MAX 0xff
+
+#define R_SERIAL3_TR_DATA__data_out__MIN 0
+
+#define R_SERIAL3_TR_DATA__data_out__BITNR 0
+
+#define R_SERIAL3_TR_DATA__data_out__data_out__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SERIAL3_XOFF
+ * - type: WO
+ * - addr: 0xb000007c
+ * - group: Serial port registers
+ */
+
+#if USE_GROUP__Serial_port_registers
+
+#define R_SERIAL3_XOFF__ADDR (REG_TYPECAST_UDWORD 0xb000007c)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL3_XOFF__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_SERIAL3_XOFF + 0))
+#define R_SERIAL3_XOFF__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_SERIAL3_XOFF + 0))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL3_XOFF__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_SERIAL3_XOFF__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL3_XOFF__STYPECAST REG_STYPECAST_UDWORD
+#define R_SERIAL3_XOFF__SVAL REG_SVAL_SHADOW
+#define R_SERIAL3_XOFF__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL3_XOFF__TYPECAST REG_TYPECAST_UDWORD
+#define R_SERIAL3_XOFF__TYPE (REG_UDWORD)
+#define R_SERIAL3_XOFF__GET REG_GET_WO
+#define R_SERIAL3_XOFF__IGET REG_IGET_WO
+#define R_SERIAL3_XOFF__SET REG_SET_WO
+#define R_SERIAL3_XOFF__ISET REG_ISET_WO
+#define R_SERIAL3_XOFF__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL3_XOFF__EQL REG_EQL_WO
+#define R_SERIAL3_XOFF__IEQL REG_IEQL_WO
+#define R_SERIAL3_XOFF__RD REG_RD_WO
+#define R_SERIAL3_XOFF__IRD REG_IRD_WO
+#define R_SERIAL3_XOFF__WR REG_WR_WO
+#define R_SERIAL3_XOFF__IWR REG_IWR_WO
+
+#define R_SERIAL3_XOFF__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SERIAL3_XOFF__tx_stop__tx_stop__MASK 0x00000200U
+#define R_SERIAL3_XOFF__auto_xoff__auto_xoff__MASK 0x00000100U
+#define R_SERIAL3_XOFF__xoff_char__xoff_char__MASK 0x000000ffU
+
+#define R_SERIAL3_XOFF__tx_stop__MAX 0x1
+#define R_SERIAL3_XOFF__auto_xoff__MAX 0x1
+#define R_SERIAL3_XOFF__xoff_char__MAX 0xff
+
+#define R_SERIAL3_XOFF__tx_stop__MIN 0
+#define R_SERIAL3_XOFF__auto_xoff__MIN 0
+#define R_SERIAL3_XOFF__xoff_char__MIN 0
+
+#define R_SERIAL3_XOFF__tx_stop__BITNR 9
+#define R_SERIAL3_XOFF__auto_xoff__BITNR 8
+#define R_SERIAL3_XOFF__xoff_char__BITNR 0
+
+#define R_SERIAL3_XOFF__tx_stop__tx_stop__VAL REG_VAL_ENUM
+#define R_SERIAL3_XOFF__auto_xoff__auto_xoff__VAL REG_VAL_ENUM
+#define R_SERIAL3_XOFF__xoff_char__xoff_char__VAL REG_VAL_VAL
+
+#define R_SERIAL3_XOFF__tx_stop__tx_stop__enable 0
+#define R_SERIAL3_XOFF__tx_stop__tx_stop__stop 1
+#define R_SERIAL3_XOFF__auto_xoff__auto_xoff__disable 0
+#define R_SERIAL3_XOFF__auto_xoff__auto_xoff__enable 1
+
+#endif
+
+/*
+ * R_SERIAL_PRESCALE
+ * - type: WO
+ * - addr: 0xb00000f2
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+#define R_SERIAL_PRESCALE__ADDR (REG_TYPECAST_UWORD 0xb00000f2)
+
+#ifndef REG_NO_SHADOW
+#define R_SERIAL_PRESCALE__SADDR (REG_STYPECAST_UWORD (reg_shadow__hwregs.R_CLOCK_PRESCALE + 2))
+#define R_SERIAL_PRESCALE__IADDR (REG_STYPECAST_UWORD (reg_initiated__hwregs.R_CLOCK_PRESCALE + 2))
+#else /* REG_NO_SHADOW */
+#define R_SERIAL_PRESCALE__SADDR (REG_STYPECAST_UWORD (®_shadow__hwregs))
+#define R_SERIAL_PRESCALE__IADDR (REG_STYPECAST_UWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SERIAL_PRESCALE__STYPECAST REG_STYPECAST_UWORD
+#define R_SERIAL_PRESCALE__SVAL REG_SVAL_SHADOW
+#define R_SERIAL_PRESCALE__SVAL_I REG_SVAL_I_SHADOW
+#define R_SERIAL_PRESCALE__TYPECAST REG_TYPECAST_UWORD
+#define R_SERIAL_PRESCALE__TYPE (REG_UWORD)
+#define R_SERIAL_PRESCALE__GET REG_GET_WO
+#define R_SERIAL_PRESCALE__IGET REG_IGET_WO
+#define R_SERIAL_PRESCALE__SET REG_SET_WO
+#define R_SERIAL_PRESCALE__ISET REG_ISET_WO
+#define R_SERIAL_PRESCALE__SET_VAL REG_SET_VAL_WO
+#define R_SERIAL_PRESCALE__EQL REG_EQL_WO
+#define R_SERIAL_PRESCALE__IEQL REG_IEQL_WO
+#define R_SERIAL_PRESCALE__RD REG_RD_WO
+#define R_SERIAL_PRESCALE__IRD REG_IRD_WO
+#define R_SERIAL_PRESCALE__WR REG_WR_WO
+#define R_SERIAL_PRESCALE__IWR REG_IWR_WO
+
+#define R_SERIAL_PRESCALE__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SERIAL_PRESCALE__ser_presc__ser_presc__MASK 0x0000ffffU
+
+#define R_SERIAL_PRESCALE__ser_presc__MAX 0xffff
+
+#define R_SERIAL_PRESCALE__ser_presc__MIN 0
+
+#define R_SERIAL_PRESCALE__ser_presc__BITNR 0
+
+#define R_SERIAL_PRESCALE__ser_presc__ser_presc__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SER_PRESC_STATUS
+ * - type: RO
+ * - addr: 0xb00000f2
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+#define R_SER_PRESC_STATUS__ADDR (REG_TYPECAST_UWORD 0xb00000f2)
+#define R_SER_PRESC_STATUS__SVAL REG_SVAL_SHADOW
+#define R_SER_PRESC_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_SER_PRESC_STATUS__TYPECAST REG_TYPECAST_UWORD
+#define R_SER_PRESC_STATUS__TYPE (REG_UWORD)
+#define R_SER_PRESC_STATUS__GET REG_GET_RO
+#define R_SER_PRESC_STATUS__IGET REG_IGET_RO
+#define R_SER_PRESC_STATUS__SET REG_SET_RO
+#define R_SER_PRESC_STATUS__ISET REG_ISET_RO
+#define R_SER_PRESC_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_SER_PRESC_STATUS__EQL REG_EQL_RO
+#define R_SER_PRESC_STATUS__IEQL REG_IEQL_RO
+#define R_SER_PRESC_STATUS__RD REG_RD_RO
+#define R_SER_PRESC_STATUS__IRD REG_IRD_RO
+#define R_SER_PRESC_STATUS__WR REG_WR_RO
+#define R_SER_PRESC_STATUS__IWR REG_IWR_RO
+
+#define R_SER_PRESC_STATUS__READ(addr) \
+ (*(addr))
+
+#define R_SER_PRESC_STATUS__ser_status__ser_status__MASK 0x0000ffffU
+
+#define R_SER_PRESC_STATUS__ser_status__MAX 0xffff
+
+#define R_SER_PRESC_STATUS__ser_status__MIN 0
+
+#define R_SER_PRESC_STATUS__ser_status__BITNR 0
+
+#define R_SER_PRESC_STATUS__ser_status__ser_status__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SET_EOP
+ * - type: WO
+ * - addr: 0xb000003c
+ * - group: DMA registers
+ */
+
+#if USE_GROUP__DMA_registers
+
+#define R_SET_EOP__ADDR (REG_TYPECAST_UDWORD 0xb000003c)
+
+#ifndef REG_NO_SHADOW
+#define R_SET_EOP__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_SET_EOP + 0))
+#define R_SET_EOP__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_SET_EOP + 0))
+#else /* REG_NO_SHADOW */
+#define R_SET_EOP__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_SET_EOP__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SET_EOP__STYPECAST REG_STYPECAST_UDWORD
+#define R_SET_EOP__SVAL REG_SVAL_ZERO
+#define R_SET_EOP__SVAL_I REG_SVAL_I_ZERO
+#define R_SET_EOP__TYPECAST REG_TYPECAST_UDWORD
+#define R_SET_EOP__TYPE (REG_UDWORD)
+#define R_SET_EOP__GET REG_GET_WO
+#define R_SET_EOP__IGET REG_IGET_WO
+#define R_SET_EOP__SET REG_SET_WO
+#define R_SET_EOP__ISET REG_ISET_WO
+#define R_SET_EOP__SET_VAL REG_SET_VAL_WO
+#define R_SET_EOP__EQL REG_EQL_WO
+#define R_SET_EOP__IEQL REG_IEQL_WO
+#define R_SET_EOP__RD REG_RD_WO
+#define R_SET_EOP__IRD REG_IRD_WO
+#define R_SET_EOP__WR REG_WR_WO
+#define R_SET_EOP__IWR REG_IWR_WO
+
+#define R_SET_EOP__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SET_EOP__ch9_eop__ch9_eop__MASK 0x00000008U
+#define R_SET_EOP__ch7_eop__ch7_eop__MASK 0x00000004U
+#define R_SET_EOP__ch5_eop__ch5_eop__MASK 0x00000002U
+#define R_SET_EOP__ch3_eop__ch3_eop__MASK 0x00000001U
+
+#define R_SET_EOP__ch9_eop__MAX 0x1
+#define R_SET_EOP__ch7_eop__MAX 0x1
+#define R_SET_EOP__ch5_eop__MAX 0x1
+#define R_SET_EOP__ch3_eop__MAX 0x1
+
+#define R_SET_EOP__ch9_eop__MIN 0
+#define R_SET_EOP__ch7_eop__MIN 0
+#define R_SET_EOP__ch5_eop__MIN 0
+#define R_SET_EOP__ch3_eop__MIN 0
+
+#define R_SET_EOP__ch9_eop__BITNR 3
+#define R_SET_EOP__ch7_eop__BITNR 2
+#define R_SET_EOP__ch5_eop__BITNR 1
+#define R_SET_EOP__ch3_eop__BITNR 0
+
+#define R_SET_EOP__ch9_eop__ch9_eop__VAL REG_VAL_ENUM
+#define R_SET_EOP__ch7_eop__ch7_eop__VAL REG_VAL_ENUM
+#define R_SET_EOP__ch5_eop__ch5_eop__VAL REG_VAL_ENUM
+#define R_SET_EOP__ch3_eop__ch3_eop__VAL REG_VAL_ENUM
+
+#define R_SET_EOP__ch9_eop__ch9_eop__nop 0
+#define R_SET_EOP__ch9_eop__ch9_eop__set 1
+#define R_SET_EOP__ch7_eop__ch7_eop__nop 0
+#define R_SET_EOP__ch7_eop__ch7_eop__set 1
+#define R_SET_EOP__ch5_eop__ch5_eop__nop 0
+#define R_SET_EOP__ch5_eop__ch5_eop__set 1
+#define R_SET_EOP__ch3_eop__ch3_eop__nop 0
+#define R_SET_EOP__ch3_eop__ch3_eop__set 1
+
+#endif
+
+/*
+ * R_SHARED_RAM_ADDR
+ * - type: WO
+ * - addr: 0xb0000044
+ * - group: Shared RAM interface registers
+ */
+
+#if USE_GROUP__Shared_RAM_interface_registers
+
+#define R_SHARED_RAM_ADDR__ADDR (REG_TYPECAST_UDWORD 0xb0000044)
+
+#ifndef REG_NO_SHADOW
+#define R_SHARED_RAM_ADDR__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_ATA_CONFIG + 0))
+#define R_SHARED_RAM_ADDR__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_ATA_CONFIG + 0))
+#else /* REG_NO_SHADOW */
+#define R_SHARED_RAM_ADDR__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_SHARED_RAM_ADDR__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SHARED_RAM_ADDR__STYPECAST REG_STYPECAST_UDWORD
+#define R_SHARED_RAM_ADDR__SVAL REG_SVAL_SHADOW
+#define R_SHARED_RAM_ADDR__SVAL_I REG_SVAL_I_SHADOW
+#define R_SHARED_RAM_ADDR__TYPECAST REG_TYPECAST_UDWORD
+#define R_SHARED_RAM_ADDR__TYPE (REG_UDWORD)
+#define R_SHARED_RAM_ADDR__GET REG_GET_WO
+#define R_SHARED_RAM_ADDR__IGET REG_IGET_WO
+#define R_SHARED_RAM_ADDR__SET REG_SET_WO
+#define R_SHARED_RAM_ADDR__ISET REG_ISET_WO
+#define R_SHARED_RAM_ADDR__SET_VAL REG_SET_VAL_WO
+#define R_SHARED_RAM_ADDR__EQL REG_EQL_WO
+#define R_SHARED_RAM_ADDR__IEQL REG_IEQL_WO
+#define R_SHARED_RAM_ADDR__RD REG_RD_WO
+#define R_SHARED_RAM_ADDR__IRD REG_IRD_WO
+#define R_SHARED_RAM_ADDR__WR REG_WR_WO
+#define R_SHARED_RAM_ADDR__IWR REG_IWR_WO
+
+#define R_SHARED_RAM_ADDR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SHARED_RAM_ADDR__base_addr__base_addr__MASK 0x3fffff00U
+
+#define R_SHARED_RAM_ADDR__base_addr__MAX 0x3fffff
+
+#define R_SHARED_RAM_ADDR__base_addr__MIN 0
+
+#define R_SHARED_RAM_ADDR__base_addr__BITNR 8
+
+#define R_SHARED_RAM_ADDR__base_addr__base_addr__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SHARED_RAM_CONFIG
+ * - type: WO
+ * - addr: 0xb0000040
+ * - group: Shared RAM interface registers
+ */
+
+#if USE_GROUP__Shared_RAM_interface_registers
+
+#define R_SHARED_RAM_CONFIG__ADDR (REG_TYPECAST_UDWORD 0xb0000040)
+
+#ifndef REG_NO_SHADOW
+#define R_SHARED_RAM_CONFIG__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_ATA_CTRL_DATA + 0))
+#define R_SHARED_RAM_CONFIG__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_ATA_CTRL_DATA + 0))
+#else /* REG_NO_SHADOW */
+#define R_SHARED_RAM_CONFIG__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_SHARED_RAM_CONFIG__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SHARED_RAM_CONFIG__STYPECAST REG_STYPECAST_UDWORD
+#define R_SHARED_RAM_CONFIG__SVAL REG_SVAL_SHADOW
+#define R_SHARED_RAM_CONFIG__SVAL_I REG_SVAL_I_SHADOW
+#define R_SHARED_RAM_CONFIG__TYPECAST REG_TYPECAST_UDWORD
+#define R_SHARED_RAM_CONFIG__TYPE (REG_UDWORD)
+#define R_SHARED_RAM_CONFIG__GET REG_GET_WO
+#define R_SHARED_RAM_CONFIG__IGET REG_IGET_WO
+#define R_SHARED_RAM_CONFIG__SET REG_SET_WO
+#define R_SHARED_RAM_CONFIG__ISET REG_ISET_WO
+#define R_SHARED_RAM_CONFIG__SET_VAL REG_SET_VAL_WO
+#define R_SHARED_RAM_CONFIG__EQL REG_EQL_WO
+#define R_SHARED_RAM_CONFIG__IEQL REG_IEQL_WO
+#define R_SHARED_RAM_CONFIG__RD REG_RD_WO
+#define R_SHARED_RAM_CONFIG__IRD REG_IRD_WO
+#define R_SHARED_RAM_CONFIG__WR REG_WR_WO
+#define R_SHARED_RAM_CONFIG__IWR REG_IWR_WO
+
+#define R_SHARED_RAM_CONFIG__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SHARED_RAM_CONFIG__width__width__MASK 0x00000008U
+#define R_SHARED_RAM_CONFIG__enable__enable__MASK 0x00000004U
+#define R_SHARED_RAM_CONFIG__pint__pint__MASK 0x00000002U
+#define R_SHARED_RAM_CONFIG__clri__clri__MASK 0x00000001U
+
+#define R_SHARED_RAM_CONFIG__width__MAX 0x1
+#define R_SHARED_RAM_CONFIG__enable__MAX 0x1
+#define R_SHARED_RAM_CONFIG__pint__MAX 0x1
+#define R_SHARED_RAM_CONFIG__clri__MAX 0x1
+
+#define R_SHARED_RAM_CONFIG__width__MIN 0
+#define R_SHARED_RAM_CONFIG__enable__MIN 0
+#define R_SHARED_RAM_CONFIG__pint__MIN 0
+#define R_SHARED_RAM_CONFIG__clri__MIN 0
+
+#define R_SHARED_RAM_CONFIG__width__BITNR 3
+#define R_SHARED_RAM_CONFIG__enable__BITNR 2
+#define R_SHARED_RAM_CONFIG__pint__BITNR 1
+#define R_SHARED_RAM_CONFIG__clri__BITNR 0
+
+#define R_SHARED_RAM_CONFIG__width__width__VAL REG_VAL_ENUM
+#define R_SHARED_RAM_CONFIG__enable__enable__VAL REG_VAL_ENUM
+#define R_SHARED_RAM_CONFIG__pint__pint__VAL REG_VAL_ENUM
+#define R_SHARED_RAM_CONFIG__clri__clri__VAL REG_VAL_ENUM
+
+#define R_SHARED_RAM_CONFIG__width__width__byte 0
+#define R_SHARED_RAM_CONFIG__width__width__word 1
+#define R_SHARED_RAM_CONFIG__enable__enable__no 0
+#define R_SHARED_RAM_CONFIG__enable__enable__yes 1
+#define R_SHARED_RAM_CONFIG__pint__pint__int 1
+#define R_SHARED_RAM_CONFIG__pint__pint__nop 0
+#define R_SHARED_RAM_CONFIG__clri__clri__clr 1
+#define R_SHARED_RAM_CONFIG__clri__clri__nop 0
+
+#endif
+
+/*
+ * R_SINGLE_STEP
+ * - type: WO
+ * - addr: 0xb00000fe
+ * - group: Test mode registers
+ */
+
+#if USE_GROUP__Test_mode_registers
+
+#define R_SINGLE_STEP__ADDR (REG_TYPECAST_BYTE 0xb00000fe)
+
+#ifndef REG_NO_SHADOW
+#define R_SINGLE_STEP__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_TEST_MODE + 2))
+#define R_SINGLE_STEP__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_TEST_MODE + 2))
+#else /* REG_NO_SHADOW */
+#define R_SINGLE_STEP__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_SINGLE_STEP__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SINGLE_STEP__STYPECAST REG_STYPECAST_BYTE
+#define R_SINGLE_STEP__SVAL REG_SVAL_SHADOW
+#define R_SINGLE_STEP__SVAL_I REG_SVAL_I_SHADOW
+#define R_SINGLE_STEP__TYPECAST REG_TYPECAST_BYTE
+#define R_SINGLE_STEP__TYPE (REG_BYTE)
+#define R_SINGLE_STEP__GET REG_GET_WO
+#define R_SINGLE_STEP__IGET REG_IGET_WO
+#define R_SINGLE_STEP__SET REG_SET_WO
+#define R_SINGLE_STEP__ISET REG_ISET_WO
+#define R_SINGLE_STEP__SET_VAL REG_SET_VAL_WO
+#define R_SINGLE_STEP__EQL REG_EQL_WO
+#define R_SINGLE_STEP__IEQL REG_IEQL_WO
+#define R_SINGLE_STEP__RD REG_RD_WO
+#define R_SINGLE_STEP__IRD REG_IRD_WO
+#define R_SINGLE_STEP__WR REG_WR_WO
+#define R_SINGLE_STEP__IWR REG_IWR_WO
+
+#define R_SINGLE_STEP__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SINGLE_STEP__single_step__single_step__MASK 0x00000008U
+#define R_SINGLE_STEP__step_wr__step_wr__MASK 0x00000004U
+#define R_SINGLE_STEP__step_rd__step_rd__MASK 0x00000002U
+#define R_SINGLE_STEP__step_fetch__step_fetch__MASK 0x00000001U
+
+#define R_SINGLE_STEP__single_step__MAX 0x1
+#define R_SINGLE_STEP__step_wr__MAX 0x1
+#define R_SINGLE_STEP__step_rd__MAX 0x1
+#define R_SINGLE_STEP__step_fetch__MAX 0x1
+
+#define R_SINGLE_STEP__single_step__MIN 0
+#define R_SINGLE_STEP__step_wr__MIN 0
+#define R_SINGLE_STEP__step_rd__MIN 0
+#define R_SINGLE_STEP__step_fetch__MIN 0
+
+#define R_SINGLE_STEP__single_step__BITNR 3
+#define R_SINGLE_STEP__step_wr__BITNR 2
+#define R_SINGLE_STEP__step_rd__BITNR 1
+#define R_SINGLE_STEP__step_fetch__BITNR 0
+
+#define R_SINGLE_STEP__single_step__single_step__VAL REG_VAL_ENUM
+#define R_SINGLE_STEP__step_wr__step_wr__VAL REG_VAL_ENUM
+#define R_SINGLE_STEP__step_rd__step_rd__VAL REG_VAL_ENUM
+#define R_SINGLE_STEP__step_fetch__step_fetch__VAL REG_VAL_ENUM
+
+#define R_SINGLE_STEP__single_step__single_step__off 0
+#define R_SINGLE_STEP__single_step__single_step__on 1
+#define R_SINGLE_STEP__step_wr__step_wr__off 0
+#define R_SINGLE_STEP__step_wr__step_wr__on 1
+#define R_SINGLE_STEP__step_rd__step_rd__off 0
+#define R_SINGLE_STEP__step_rd__step_rd__on 1
+#define R_SINGLE_STEP__step_fetch__step_fetch__off 0
+#define R_SINGLE_STEP__step_fetch__step_fetch__on 1
+
+#endif
+
+/*
+ * R_SYNC_SERIAL1_CTRL
+ * - type: WO
+ * - addr: 0xb0000068
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+#define R_SYNC_SERIAL1_CTRL__ADDR (REG_TYPECAST_UDWORD 0xb0000068)
+
+#ifndef REG_NO_SHADOW
+#define R_SYNC_SERIAL1_CTRL__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_SERIAL1_CTRL + 0))
+#define R_SYNC_SERIAL1_CTRL__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_SERIAL1_CTRL + 0))
+#else /* REG_NO_SHADOW */
+#define R_SYNC_SERIAL1_CTRL__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_SYNC_SERIAL1_CTRL__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SYNC_SERIAL1_CTRL__STYPECAST REG_STYPECAST_UDWORD
+#define R_SYNC_SERIAL1_CTRL__SVAL REG_SVAL_SHADOW
+#define R_SYNC_SERIAL1_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_SYNC_SERIAL1_CTRL__TYPECAST REG_TYPECAST_UDWORD
+#define R_SYNC_SERIAL1_CTRL__TYPE (REG_UDWORD)
+#define R_SYNC_SERIAL1_CTRL__GET REG_GET_WO
+#define R_SYNC_SERIAL1_CTRL__IGET REG_IGET_WO
+#define R_SYNC_SERIAL1_CTRL__SET REG_SET_WO
+#define R_SYNC_SERIAL1_CTRL__ISET REG_ISET_WO
+#define R_SYNC_SERIAL1_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_SYNC_SERIAL1_CTRL__EQL REG_EQL_WO
+#define R_SYNC_SERIAL1_CTRL__IEQL REG_IEQL_WO
+#define R_SYNC_SERIAL1_CTRL__RD REG_RD_WO
+#define R_SYNC_SERIAL1_CTRL__IRD REG_IRD_WO
+#define R_SYNC_SERIAL1_CTRL__WR REG_WR_WO
+#define R_SYNC_SERIAL1_CTRL__IWR REG_IWR_WO
+
+#define R_SYNC_SERIAL1_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SYNC_SERIAL1_CTRL__tr_baud__tr_baud__MASK 0xf0000000U
+#define R_SYNC_SERIAL1_CTRL__dma_enable__dma_enable__MASK 0x08000000U
+#define R_SYNC_SERIAL1_CTRL__mode__mode__MASK 0x07000000U
+#define R_SYNC_SERIAL1_CTRL__error__error__MASK 0x00800000U
+#define R_SYNC_SERIAL1_CTRL__rec_enable__rec_enable__MASK 0x00400000U
+#define R_SYNC_SERIAL1_CTRL__f_synctype__f_synctype__MASK 0x00200000U
+#define R_SYNC_SERIAL1_CTRL__f_syncsize__f_syncsize__MASK 0x00180000U
+#define R_SYNC_SERIAL1_CTRL__f_sync__f_sync__MASK 0x00040000U
+#define R_SYNC_SERIAL1_CTRL__clk_mode__clk_mode__MASK 0x00020000U
+#define R_SYNC_SERIAL1_CTRL__clk_halt__clk_halt__MASK 0x00010000U
+#define R_SYNC_SERIAL1_CTRL__bitorder__bitorder__MASK 0x00008000U
+#define R_SYNC_SERIAL1_CTRL__tr_enable__tr_enable__MASK 0x00004000U
+#define R_SYNC_SERIAL1_CTRL__wordsize__wordsize__MASK 0x00003800U
+#define R_SYNC_SERIAL1_CTRL__buf_empty__buf_empty__MASK 0x00000400U
+#define R_SYNC_SERIAL1_CTRL__buf_full__buf_full__MASK 0x00000200U
+#define R_SYNC_SERIAL1_CTRL__flow_ctrl__flow_ctrl__MASK 0x00000100U
+#define R_SYNC_SERIAL1_CTRL__clk_polarity__clk_polarity__MASK 0x00000040U
+#define R_SYNC_SERIAL1_CTRL__frame_polarity__frame_polarity__MASK 0x00000020U
+#define R_SYNC_SERIAL1_CTRL__status_polarity__status_polarity__MASK 0x00000010U
+#define R_SYNC_SERIAL1_CTRL__clk_driver__clk_driver__MASK 0x00000008U
+#define R_SYNC_SERIAL1_CTRL__frame_driver__frame_driver__MASK 0x00000004U
+#define R_SYNC_SERIAL1_CTRL__status_driver__status_driver__MASK 0x00000002U
+#define R_SYNC_SERIAL1_CTRL__def_out0__def_out0__MASK 0x00000001U
+
+#define R_SYNC_SERIAL1_CTRL__tr_baud__MAX 0xf
+#define R_SYNC_SERIAL1_CTRL__dma_enable__MAX 0x1
+#define R_SYNC_SERIAL1_CTRL__mode__MAX 0x7
+#define R_SYNC_SERIAL1_CTRL__error__MAX 0x1
+#define R_SYNC_SERIAL1_CTRL__rec_enable__MAX 0x1
+#define R_SYNC_SERIAL1_CTRL__f_synctype__MAX 0x1
+#define R_SYNC_SERIAL1_CTRL__f_syncsize__MAX 0x3
+#define R_SYNC_SERIAL1_CTRL__f_sync__MAX 0x1
+#define R_SYNC_SERIAL1_CTRL__clk_mode__MAX 0x1
+#define R_SYNC_SERIAL1_CTRL__clk_halt__MAX 0x1
+#define R_SYNC_SERIAL1_CTRL__bitorder__MAX 0x1
+#define R_SYNC_SERIAL1_CTRL__tr_enable__MAX 0x1
+#define R_SYNC_SERIAL1_CTRL__wordsize__MAX 0x7
+#define R_SYNC_SERIAL1_CTRL__buf_empty__MAX 0x1
+#define R_SYNC_SERIAL1_CTRL__buf_full__MAX 0x1
+#define R_SYNC_SERIAL1_CTRL__flow_ctrl__MAX 0x1
+#define R_SYNC_SERIAL1_CTRL__clk_polarity__MAX 0x1
+#define R_SYNC_SERIAL1_CTRL__frame_polarity__MAX 0x1
+#define R_SYNC_SERIAL1_CTRL__status_polarity__MAX 0x1
+#define R_SYNC_SERIAL1_CTRL__clk_driver__MAX 0x1
+#define R_SYNC_SERIAL1_CTRL__frame_driver__MAX 0x1
+#define R_SYNC_SERIAL1_CTRL__status_driver__MAX 0x1
+#define R_SYNC_SERIAL1_CTRL__def_out0__MAX 0x1
+
+#define R_SYNC_SERIAL1_CTRL__tr_baud__MIN 0
+#define R_SYNC_SERIAL1_CTRL__dma_enable__MIN 0
+#define R_SYNC_SERIAL1_CTRL__mode__MIN 0
+#define R_SYNC_SERIAL1_CTRL__error__MIN 0
+#define R_SYNC_SERIAL1_CTRL__rec_enable__MIN 0
+#define R_SYNC_SERIAL1_CTRL__f_synctype__MIN 0
+#define R_SYNC_SERIAL1_CTRL__f_syncsize__MIN 0
+#define R_SYNC_SERIAL1_CTRL__f_sync__MIN 0
+#define R_SYNC_SERIAL1_CTRL__clk_mode__MIN 0
+#define R_SYNC_SERIAL1_CTRL__clk_halt__MIN 0
+#define R_SYNC_SERIAL1_CTRL__bitorder__MIN 0
+#define R_SYNC_SERIAL1_CTRL__tr_enable__MIN 0
+#define R_SYNC_SERIAL1_CTRL__wordsize__MIN 0
+#define R_SYNC_SERIAL1_CTRL__buf_empty__MIN 0
+#define R_SYNC_SERIAL1_CTRL__buf_full__MIN 0
+#define R_SYNC_SERIAL1_CTRL__flow_ctrl__MIN 0
+#define R_SYNC_SERIAL1_CTRL__clk_polarity__MIN 0
+#define R_SYNC_SERIAL1_CTRL__frame_polarity__MIN 0
+#define R_SYNC_SERIAL1_CTRL__status_polarity__MIN 0
+#define R_SYNC_SERIAL1_CTRL__clk_driver__MIN 0
+#define R_SYNC_SERIAL1_CTRL__frame_driver__MIN 0
+#define R_SYNC_SERIAL1_CTRL__status_driver__MIN 0
+#define R_SYNC_SERIAL1_CTRL__def_out0__MIN 0
+
+#define R_SYNC_SERIAL1_CTRL__tr_baud__BITNR 28
+#define R_SYNC_SERIAL1_CTRL__dma_enable__BITNR 27
+#define R_SYNC_SERIAL1_CTRL__mode__BITNR 24
+#define R_SYNC_SERIAL1_CTRL__error__BITNR 23
+#define R_SYNC_SERIAL1_CTRL__rec_enable__BITNR 22
+#define R_SYNC_SERIAL1_CTRL__f_synctype__BITNR 21
+#define R_SYNC_SERIAL1_CTRL__f_syncsize__BITNR 19
+#define R_SYNC_SERIAL1_CTRL__f_sync__BITNR 18
+#define R_SYNC_SERIAL1_CTRL__clk_mode__BITNR 17
+#define R_SYNC_SERIAL1_CTRL__clk_halt__BITNR 16
+#define R_SYNC_SERIAL1_CTRL__bitorder__BITNR 15
+#define R_SYNC_SERIAL1_CTRL__tr_enable__BITNR 14
+#define R_SYNC_SERIAL1_CTRL__wordsize__BITNR 11
+#define R_SYNC_SERIAL1_CTRL__buf_empty__BITNR 10
+#define R_SYNC_SERIAL1_CTRL__buf_full__BITNR 9
+#define R_SYNC_SERIAL1_CTRL__flow_ctrl__BITNR 8
+#define R_SYNC_SERIAL1_CTRL__clk_polarity__BITNR 6
+#define R_SYNC_SERIAL1_CTRL__frame_polarity__BITNR 5
+#define R_SYNC_SERIAL1_CTRL__status_polarity__BITNR 4
+#define R_SYNC_SERIAL1_CTRL__clk_driver__BITNR 3
+#define R_SYNC_SERIAL1_CTRL__frame_driver__BITNR 2
+#define R_SYNC_SERIAL1_CTRL__status_driver__BITNR 1
+#define R_SYNC_SERIAL1_CTRL__def_out0__BITNR 0
+
+#define R_SYNC_SERIAL1_CTRL__tr_baud__tr_baud__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_CTRL__dma_enable__dma_enable__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_CTRL__mode__mode__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_CTRL__error__error__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_CTRL__rec_enable__rec_enable__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_CTRL__f_synctype__f_synctype__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_CTRL__f_syncsize__f_syncsize__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_CTRL__f_sync__f_sync__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_CTRL__clk_mode__clk_mode__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_CTRL__clk_halt__clk_halt__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_CTRL__bitorder__bitorder__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_CTRL__tr_enable__tr_enable__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_CTRL__wordsize__wordsize__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_CTRL__buf_empty__buf_empty__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_CTRL__buf_full__buf_full__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_CTRL__flow_ctrl__flow_ctrl__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_CTRL__clk_polarity__clk_polarity__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_CTRL__frame_polarity__frame_polarity__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_CTRL__status_polarity__status_polarity__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_CTRL__clk_driver__clk_driver__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_CTRL__frame_driver__frame_driver__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_CTRL__status_driver__status_driver__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_CTRL__def_out0__def_out0__VAL REG_VAL_ENUM
+
+#define R_SYNC_SERIAL1_CTRL__tr_baud__tr_baud__c115k2Hz 10
+#define R_SYNC_SERIAL1_CTRL__tr_baud__tr_baud__c1200Hz 3
+#define R_SYNC_SERIAL1_CTRL__tr_baud__tr_baud__c150Hz 0
+#define R_SYNC_SERIAL1_CTRL__tr_baud__tr_baud__c19k2Hz 7
+#define R_SYNC_SERIAL1_CTRL__tr_baud__tr_baud__c230k4Hz 11
+#define R_SYNC_SERIAL1_CTRL__tr_baud__tr_baud__c2400Hz 4
+#define R_SYNC_SERIAL1_CTRL__tr_baud__tr_baud__c28k8Hz 8
+#define R_SYNC_SERIAL1_CTRL__tr_baud__tr_baud__c300Hz 1
+#define R_SYNC_SERIAL1_CTRL__tr_baud__tr_baud__c3125kHz 14
+#define R_SYNC_SERIAL1_CTRL__tr_baud__tr_baud__c460k8Hz 12
+#define R_SYNC_SERIAL1_CTRL__tr_baud__tr_baud__c4800Hz 5
+#define R_SYNC_SERIAL1_CTRL__tr_baud__tr_baud__c57k6Hz 9
+#define R_SYNC_SERIAL1_CTRL__tr_baud__tr_baud__c600Hz 2
+#define R_SYNC_SERIAL1_CTRL__tr_baud__tr_baud__c921k6Hz 13
+#define R_SYNC_SERIAL1_CTRL__tr_baud__tr_baud__c9600Hz 6
+#define R_SYNC_SERIAL1_CTRL__dma_enable__dma_enable__off 0
+#define R_SYNC_SERIAL1_CTRL__dma_enable__dma_enable__on 1
+#define R_SYNC_SERIAL1_CTRL__mode__mode__master_bidir 4
+#define R_SYNC_SERIAL1_CTRL__mode__mode__master_input 2
+#define R_SYNC_SERIAL1_CTRL__mode__mode__master_output 0
+#define R_SYNC_SERIAL1_CTRL__mode__mode__slave_bidir 5
+#define R_SYNC_SERIAL1_CTRL__mode__mode__slave_input 3
+#define R_SYNC_SERIAL1_CTRL__mode__mode__slave_output 1
+#define R_SYNC_SERIAL1_CTRL__error__error__ignore 1
+#define R_SYNC_SERIAL1_CTRL__error__error__normal 0
+#define R_SYNC_SERIAL1_CTRL__rec_enable__rec_enable__disable 0
+#define R_SYNC_SERIAL1_CTRL__rec_enable__rec_enable__enable 1
+#define R_SYNC_SERIAL1_CTRL__f_synctype__f_synctype__early 1
+#define R_SYNC_SERIAL1_CTRL__f_synctype__f_synctype__normal 0
+#define R_SYNC_SERIAL1_CTRL__f_syncsize__f_syncsize__bit 0
+#define R_SYNC_SERIAL1_CTRL__f_syncsize__f_syncsize__extended 2
+#define R_SYNC_SERIAL1_CTRL__f_syncsize__f_syncsize__word 1
+#define R_SYNC_SERIAL1_CTRL__f_sync__f_sync__off 1
+#define R_SYNC_SERIAL1_CTRL__f_sync__f_sync__on 0
+#define R_SYNC_SERIAL1_CTRL__clk_mode__clk_mode__gated 1
+#define R_SYNC_SERIAL1_CTRL__clk_mode__clk_mode__normal 0
+#define R_SYNC_SERIAL1_CTRL__clk_halt__clk_halt__running 0
+#define R_SYNC_SERIAL1_CTRL__clk_halt__clk_halt__stopped 1
+#define R_SYNC_SERIAL1_CTRL__bitorder__bitorder__lsb 0
+#define R_SYNC_SERIAL1_CTRL__bitorder__bitorder__msb 1
+#define R_SYNC_SERIAL1_CTRL__tr_enable__tr_enable__disable 0
+#define R_SYNC_SERIAL1_CTRL__tr_enable__tr_enable__enable 1
+#define R_SYNC_SERIAL1_CTRL__wordsize__wordsize__size12bit 1
+#define R_SYNC_SERIAL1_CTRL__wordsize__wordsize__size16bit 2
+#define R_SYNC_SERIAL1_CTRL__wordsize__wordsize__size24bit 3
+#define R_SYNC_SERIAL1_CTRL__wordsize__wordsize__size32bit 4
+#define R_SYNC_SERIAL1_CTRL__wordsize__wordsize__size8bit 0
+#define R_SYNC_SERIAL1_CTRL__buf_empty__buf_empty__lmt_0 1
+#define R_SYNC_SERIAL1_CTRL__buf_empty__buf_empty__lmt_8 0
+#define R_SYNC_SERIAL1_CTRL__buf_full__buf_full__lmt_32 0
+#define R_SYNC_SERIAL1_CTRL__buf_full__buf_full__lmt_8 1
+#define R_SYNC_SERIAL1_CTRL__flow_ctrl__flow_ctrl__disabled 0
+#define R_SYNC_SERIAL1_CTRL__flow_ctrl__flow_ctrl__enabled 1
+#define R_SYNC_SERIAL1_CTRL__clk_polarity__clk_polarity__neg 1
+#define R_SYNC_SERIAL1_CTRL__clk_polarity__clk_polarity__pos 0
+#define R_SYNC_SERIAL1_CTRL__frame_polarity__frame_polarity__inverted 1
+#define R_SYNC_SERIAL1_CTRL__frame_polarity__frame_polarity__normal 0
+#define R_SYNC_SERIAL1_CTRL__status_polarity__status_polarity__inverted 1
+#define R_SYNC_SERIAL1_CTRL__status_polarity__status_polarity__normal 0
+#define R_SYNC_SERIAL1_CTRL__clk_driver__clk_driver__inverted 1
+#define R_SYNC_SERIAL1_CTRL__clk_driver__clk_driver__normal 0
+#define R_SYNC_SERIAL1_CTRL__frame_driver__frame_driver__inverted 1
+#define R_SYNC_SERIAL1_CTRL__frame_driver__frame_driver__normal 0
+#define R_SYNC_SERIAL1_CTRL__status_driver__status_driver__inverted 1
+#define R_SYNC_SERIAL1_CTRL__status_driver__status_driver__normal 0
+#define R_SYNC_SERIAL1_CTRL__def_out0__def_out0__high 1
+#define R_SYNC_SERIAL1_CTRL__def_out0__def_out0__low 0
+
+#endif
+
+/*
+ * R_SYNC_SERIAL1_REC_BYTE
+ * - type: RO
+ * - addr: 0xb000006c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+#define R_SYNC_SERIAL1_REC_BYTE__ADDR (REG_TYPECAST_BYTE 0xb000006c)
+#define R_SYNC_SERIAL1_REC_BYTE__SVAL REG_SVAL_SHADOW
+#define R_SYNC_SERIAL1_REC_BYTE__SVAL_I REG_SVAL_I_SHADOW
+#define R_SYNC_SERIAL1_REC_BYTE__TYPECAST REG_TYPECAST_BYTE
+#define R_SYNC_SERIAL1_REC_BYTE__TYPE (REG_BYTE)
+#define R_SYNC_SERIAL1_REC_BYTE__GET REG_GET_RO
+#define R_SYNC_SERIAL1_REC_BYTE__IGET REG_IGET_RO
+#define R_SYNC_SERIAL1_REC_BYTE__SET REG_SET_RO
+#define R_SYNC_SERIAL1_REC_BYTE__ISET REG_ISET_RO
+#define R_SYNC_SERIAL1_REC_BYTE__SET_VAL REG_SET_VAL_RO
+#define R_SYNC_SERIAL1_REC_BYTE__EQL REG_EQL_RO
+#define R_SYNC_SERIAL1_REC_BYTE__IEQL REG_IEQL_RO
+#define R_SYNC_SERIAL1_REC_BYTE__RD REG_RD_RO
+#define R_SYNC_SERIAL1_REC_BYTE__IRD REG_IRD_RO
+#define R_SYNC_SERIAL1_REC_BYTE__WR REG_WR_RO
+#define R_SYNC_SERIAL1_REC_BYTE__IWR REG_IWR_RO
+
+#define R_SYNC_SERIAL1_REC_BYTE__READ(addr) \
+ (*(addr))
+
+#define R_SYNC_SERIAL1_REC_BYTE__data_in__data_in__MASK 0x000000ffU
+
+#define R_SYNC_SERIAL1_REC_BYTE__data_in__MAX 0xff
+
+#define R_SYNC_SERIAL1_REC_BYTE__data_in__MIN 0
+
+#define R_SYNC_SERIAL1_REC_BYTE__data_in__BITNR 0
+
+#define R_SYNC_SERIAL1_REC_BYTE__data_in__data_in__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SYNC_SERIAL1_REC_DATA
+ * - type: RO
+ * - addr: 0xb000006c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+#define R_SYNC_SERIAL1_REC_DATA__ADDR (REG_TYPECAST_UDWORD 0xb000006c)
+#define R_SYNC_SERIAL1_REC_DATA__SVAL REG_SVAL_SHADOW
+#define R_SYNC_SERIAL1_REC_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_SYNC_SERIAL1_REC_DATA__TYPECAST REG_TYPECAST_UDWORD
+#define R_SYNC_SERIAL1_REC_DATA__TYPE (REG_UDWORD)
+#define R_SYNC_SERIAL1_REC_DATA__GET REG_GET_RO
+#define R_SYNC_SERIAL1_REC_DATA__IGET REG_IGET_RO
+#define R_SYNC_SERIAL1_REC_DATA__SET REG_SET_RO
+#define R_SYNC_SERIAL1_REC_DATA__ISET REG_ISET_RO
+#define R_SYNC_SERIAL1_REC_DATA__SET_VAL REG_SET_VAL_RO
+#define R_SYNC_SERIAL1_REC_DATA__EQL REG_EQL_RO
+#define R_SYNC_SERIAL1_REC_DATA__IEQL REG_IEQL_RO
+#define R_SYNC_SERIAL1_REC_DATA__RD REG_RD_RO
+#define R_SYNC_SERIAL1_REC_DATA__IRD REG_IRD_RO
+#define R_SYNC_SERIAL1_REC_DATA__WR REG_WR_RO
+#define R_SYNC_SERIAL1_REC_DATA__IWR REG_IWR_RO
+
+#define R_SYNC_SERIAL1_REC_DATA__READ(addr) \
+ (*(addr))
+
+#define R_SYNC_SERIAL1_REC_DATA__data_in__data_in__MASK 0xffffffffU
+
+#define R_SYNC_SERIAL1_REC_DATA__data_in__MAX 0xffffffff
+
+#define R_SYNC_SERIAL1_REC_DATA__data_in__MIN 0
+
+#define R_SYNC_SERIAL1_REC_DATA__data_in__BITNR 0
+
+#define R_SYNC_SERIAL1_REC_DATA__data_in__data_in__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SYNC_SERIAL1_REC_WORD
+ * - type: RO
+ * - addr: 0xb000006c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+#define R_SYNC_SERIAL1_REC_WORD__ADDR (REG_TYPECAST_UWORD 0xb000006c)
+#define R_SYNC_SERIAL1_REC_WORD__SVAL REG_SVAL_SHADOW
+#define R_SYNC_SERIAL1_REC_WORD__SVAL_I REG_SVAL_I_SHADOW
+#define R_SYNC_SERIAL1_REC_WORD__TYPECAST REG_TYPECAST_UWORD
+#define R_SYNC_SERIAL1_REC_WORD__TYPE (REG_UWORD)
+#define R_SYNC_SERIAL1_REC_WORD__GET REG_GET_RO
+#define R_SYNC_SERIAL1_REC_WORD__IGET REG_IGET_RO
+#define R_SYNC_SERIAL1_REC_WORD__SET REG_SET_RO
+#define R_SYNC_SERIAL1_REC_WORD__ISET REG_ISET_RO
+#define R_SYNC_SERIAL1_REC_WORD__SET_VAL REG_SET_VAL_RO
+#define R_SYNC_SERIAL1_REC_WORD__EQL REG_EQL_RO
+#define R_SYNC_SERIAL1_REC_WORD__IEQL REG_IEQL_RO
+#define R_SYNC_SERIAL1_REC_WORD__RD REG_RD_RO
+#define R_SYNC_SERIAL1_REC_WORD__IRD REG_IRD_RO
+#define R_SYNC_SERIAL1_REC_WORD__WR REG_WR_RO
+#define R_SYNC_SERIAL1_REC_WORD__IWR REG_IWR_RO
+
+#define R_SYNC_SERIAL1_REC_WORD__READ(addr) \
+ (*(addr))
+
+#define R_SYNC_SERIAL1_REC_WORD__data_in__data_in__MASK 0x0000ffffU
+
+#define R_SYNC_SERIAL1_REC_WORD__data_in__MAX 0xffff
+
+#define R_SYNC_SERIAL1_REC_WORD__data_in__MIN 0
+
+#define R_SYNC_SERIAL1_REC_WORD__data_in__BITNR 0
+
+#define R_SYNC_SERIAL1_REC_WORD__data_in__data_in__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SYNC_SERIAL1_STATUS
+ * - type: RO
+ * - addr: 0xb0000068
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+#define R_SYNC_SERIAL1_STATUS__ADDR (REG_TYPECAST_UDWORD 0xb0000068)
+#define R_SYNC_SERIAL1_STATUS__SVAL REG_SVAL_SHADOW
+#define R_SYNC_SERIAL1_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_SYNC_SERIAL1_STATUS__TYPECAST REG_TYPECAST_UDWORD
+#define R_SYNC_SERIAL1_STATUS__TYPE (REG_UDWORD)
+#define R_SYNC_SERIAL1_STATUS__GET REG_GET_RO
+#define R_SYNC_SERIAL1_STATUS__IGET REG_IGET_RO
+#define R_SYNC_SERIAL1_STATUS__SET REG_SET_RO
+#define R_SYNC_SERIAL1_STATUS__ISET REG_ISET_RO
+#define R_SYNC_SERIAL1_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_SYNC_SERIAL1_STATUS__EQL REG_EQL_RO
+#define R_SYNC_SERIAL1_STATUS__IEQL REG_IEQL_RO
+#define R_SYNC_SERIAL1_STATUS__RD REG_RD_RO
+#define R_SYNC_SERIAL1_STATUS__IRD REG_IRD_RO
+#define R_SYNC_SERIAL1_STATUS__WR REG_WR_RO
+#define R_SYNC_SERIAL1_STATUS__IWR REG_IWR_RO
+
+#define R_SYNC_SERIAL1_STATUS__READ(addr) \
+ (*(addr))
+
+#define R_SYNC_SERIAL1_STATUS__rec_status__rec_status__MASK 0x00008000U
+#define R_SYNC_SERIAL1_STATUS__tr_empty__tr_empty__MASK 0x00004000U
+#define R_SYNC_SERIAL1_STATUS__tr_ready__tr_ready__MASK 0x00002000U
+#define R_SYNC_SERIAL1_STATUS__pin_1__pin_1__MASK 0x00001000U
+#define R_SYNC_SERIAL1_STATUS__pin_0__pin_0__MASK 0x00000800U
+#define R_SYNC_SERIAL1_STATUS__underflow__underflow__MASK 0x00000400U
+#define R_SYNC_SERIAL1_STATUS__overrun__overrun__MASK 0x00000200U
+#define R_SYNC_SERIAL1_STATUS__data_avail__data_avail__MASK 0x00000100U
+#define R_SYNC_SERIAL1_STATUS__data__data__MASK 0x000000ffU
+
+#define R_SYNC_SERIAL1_STATUS__rec_status__MAX 0x1
+#define R_SYNC_SERIAL1_STATUS__tr_empty__MAX 0x1
+#define R_SYNC_SERIAL1_STATUS__tr_ready__MAX 0x1
+#define R_SYNC_SERIAL1_STATUS__pin_1__MAX 0x1
+#define R_SYNC_SERIAL1_STATUS__pin_0__MAX 0x1
+#define R_SYNC_SERIAL1_STATUS__underflow__MAX 0x1
+#define R_SYNC_SERIAL1_STATUS__overrun__MAX 0x1
+#define R_SYNC_SERIAL1_STATUS__data_avail__MAX 0x1
+#define R_SYNC_SERIAL1_STATUS__data__MAX 0xff
+
+#define R_SYNC_SERIAL1_STATUS__rec_status__MIN 0
+#define R_SYNC_SERIAL1_STATUS__tr_empty__MIN 0
+#define R_SYNC_SERIAL1_STATUS__tr_ready__MIN 0
+#define R_SYNC_SERIAL1_STATUS__pin_1__MIN 0
+#define R_SYNC_SERIAL1_STATUS__pin_0__MIN 0
+#define R_SYNC_SERIAL1_STATUS__underflow__MIN 0
+#define R_SYNC_SERIAL1_STATUS__overrun__MIN 0
+#define R_SYNC_SERIAL1_STATUS__data_avail__MIN 0
+#define R_SYNC_SERIAL1_STATUS__data__MIN 0
+
+#define R_SYNC_SERIAL1_STATUS__rec_status__BITNR 15
+#define R_SYNC_SERIAL1_STATUS__tr_empty__BITNR 14
+#define R_SYNC_SERIAL1_STATUS__tr_ready__BITNR 13
+#define R_SYNC_SERIAL1_STATUS__pin_1__BITNR 12
+#define R_SYNC_SERIAL1_STATUS__pin_0__BITNR 11
+#define R_SYNC_SERIAL1_STATUS__underflow__BITNR 10
+#define R_SYNC_SERIAL1_STATUS__overrun__BITNR 9
+#define R_SYNC_SERIAL1_STATUS__data_avail__BITNR 8
+#define R_SYNC_SERIAL1_STATUS__data__BITNR 0
+
+#define R_SYNC_SERIAL1_STATUS__rec_status__rec_status__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_STATUS__tr_empty__tr_empty__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_STATUS__tr_ready__tr_ready__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_STATUS__pin_1__pin_1__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_STATUS__pin_0__pin_0__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_STATUS__underflow__underflow__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_STATUS__overrun__overrun__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_STATUS__data_avail__data_avail__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL1_STATUS__data__data__VAL REG_VAL_VAL
+
+#define R_SYNC_SERIAL1_STATUS__rec_status__rec_status__idle 1
+#define R_SYNC_SERIAL1_STATUS__rec_status__rec_status__running 0
+#define R_SYNC_SERIAL1_STATUS__tr_empty__tr_empty__empty 1
+#define R_SYNC_SERIAL1_STATUS__tr_empty__tr_empty__not_empty 0
+#define R_SYNC_SERIAL1_STATUS__tr_ready__tr_ready__full 0
+#define R_SYNC_SERIAL1_STATUS__tr_ready__tr_ready__ready 1
+#define R_SYNC_SERIAL1_STATUS__pin_1__pin_1__high 1
+#define R_SYNC_SERIAL1_STATUS__pin_1__pin_1__low 0
+#define R_SYNC_SERIAL1_STATUS__pin_0__pin_0__high 1
+#define R_SYNC_SERIAL1_STATUS__pin_0__pin_0__low 0
+#define R_SYNC_SERIAL1_STATUS__underflow__underflow__no 0
+#define R_SYNC_SERIAL1_STATUS__underflow__underflow__yes 1
+#define R_SYNC_SERIAL1_STATUS__overrun__overrun__no 0
+#define R_SYNC_SERIAL1_STATUS__overrun__overrun__yes 1
+#define R_SYNC_SERIAL1_STATUS__data_avail__data_avail__no 0
+#define R_SYNC_SERIAL1_STATUS__data_avail__data_avail__yes 1
+
+#endif
+
+/*
+ * R_SYNC_SERIAL1_TR_BYTE
+ * - type: WO
+ * - addr: 0xb000006c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+#define R_SYNC_SERIAL1_TR_BYTE__ADDR (REG_TYPECAST_BYTE 0xb000006c)
+
+#ifndef REG_NO_SHADOW
+#define R_SYNC_SERIAL1_TR_BYTE__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_SERIAL1_XOFF + 0))
+#define R_SYNC_SERIAL1_TR_BYTE__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_SERIAL1_XOFF + 0))
+#else /* REG_NO_SHADOW */
+#define R_SYNC_SERIAL1_TR_BYTE__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_SYNC_SERIAL1_TR_BYTE__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SYNC_SERIAL1_TR_BYTE__STYPECAST REG_STYPECAST_BYTE
+#define R_SYNC_SERIAL1_TR_BYTE__SVAL REG_SVAL_SHADOW
+#define R_SYNC_SERIAL1_TR_BYTE__SVAL_I REG_SVAL_I_SHADOW
+#define R_SYNC_SERIAL1_TR_BYTE__TYPECAST REG_TYPECAST_BYTE
+#define R_SYNC_SERIAL1_TR_BYTE__TYPE (REG_BYTE)
+#define R_SYNC_SERIAL1_TR_BYTE__GET REG_GET_WO
+#define R_SYNC_SERIAL1_TR_BYTE__IGET REG_IGET_WO
+#define R_SYNC_SERIAL1_TR_BYTE__SET REG_SET_WO
+#define R_SYNC_SERIAL1_TR_BYTE__ISET REG_ISET_WO
+#define R_SYNC_SERIAL1_TR_BYTE__SET_VAL REG_SET_VAL_WO
+#define R_SYNC_SERIAL1_TR_BYTE__EQL REG_EQL_WO
+#define R_SYNC_SERIAL1_TR_BYTE__IEQL REG_IEQL_WO
+#define R_SYNC_SERIAL1_TR_BYTE__RD REG_RD_WO
+#define R_SYNC_SERIAL1_TR_BYTE__IRD REG_IRD_WO
+#define R_SYNC_SERIAL1_TR_BYTE__WR REG_WR_WO
+#define R_SYNC_SERIAL1_TR_BYTE__IWR REG_IWR_WO
+
+#define R_SYNC_SERIAL1_TR_BYTE__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SYNC_SERIAL1_TR_BYTE__data_out__data_out__MASK 0x000000ffU
+
+#define R_SYNC_SERIAL1_TR_BYTE__data_out__MAX 0xff
+
+#define R_SYNC_SERIAL1_TR_BYTE__data_out__MIN 0
+
+#define R_SYNC_SERIAL1_TR_BYTE__data_out__BITNR 0
+
+#define R_SYNC_SERIAL1_TR_BYTE__data_out__data_out__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SYNC_SERIAL1_TR_DATA
+ * - type: WO
+ * - addr: 0xb000006c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+#define R_SYNC_SERIAL1_TR_DATA__ADDR (REG_TYPECAST_UDWORD 0xb000006c)
+
+#ifndef REG_NO_SHADOW
+#define R_SYNC_SERIAL1_TR_DATA__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_SERIAL1_XOFF + 0))
+#define R_SYNC_SERIAL1_TR_DATA__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_SERIAL1_XOFF + 0))
+#else /* REG_NO_SHADOW */
+#define R_SYNC_SERIAL1_TR_DATA__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_SYNC_SERIAL1_TR_DATA__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SYNC_SERIAL1_TR_DATA__STYPECAST REG_STYPECAST_UDWORD
+#define R_SYNC_SERIAL1_TR_DATA__SVAL REG_SVAL_SHADOW
+#define R_SYNC_SERIAL1_TR_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_SYNC_SERIAL1_TR_DATA__TYPECAST REG_TYPECAST_UDWORD
+#define R_SYNC_SERIAL1_TR_DATA__TYPE (REG_UDWORD)
+#define R_SYNC_SERIAL1_TR_DATA__GET REG_GET_WO
+#define R_SYNC_SERIAL1_TR_DATA__IGET REG_IGET_WO
+#define R_SYNC_SERIAL1_TR_DATA__SET REG_SET_WO
+#define R_SYNC_SERIAL1_TR_DATA__ISET REG_ISET_WO
+#define R_SYNC_SERIAL1_TR_DATA__SET_VAL REG_SET_VAL_WO
+#define R_SYNC_SERIAL1_TR_DATA__EQL REG_EQL_WO
+#define R_SYNC_SERIAL1_TR_DATA__IEQL REG_IEQL_WO
+#define R_SYNC_SERIAL1_TR_DATA__RD REG_RD_WO
+#define R_SYNC_SERIAL1_TR_DATA__IRD REG_IRD_WO
+#define R_SYNC_SERIAL1_TR_DATA__WR REG_WR_WO
+#define R_SYNC_SERIAL1_TR_DATA__IWR REG_IWR_WO
+
+#define R_SYNC_SERIAL1_TR_DATA__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SYNC_SERIAL1_TR_DATA__data_out__data_out__MASK 0xffffffffU
+
+#define R_SYNC_SERIAL1_TR_DATA__data_out__MAX 0xffffffff
+
+#define R_SYNC_SERIAL1_TR_DATA__data_out__MIN 0
+
+#define R_SYNC_SERIAL1_TR_DATA__data_out__BITNR 0
+
+#define R_SYNC_SERIAL1_TR_DATA__data_out__data_out__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SYNC_SERIAL1_TR_WORD
+ * - type: WO
+ * - addr: 0xb000006c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+#define R_SYNC_SERIAL1_TR_WORD__ADDR (REG_TYPECAST_UWORD 0xb000006c)
+
+#ifndef REG_NO_SHADOW
+#define R_SYNC_SERIAL1_TR_WORD__SADDR (REG_STYPECAST_UWORD (reg_shadow__hwregs.R_SERIAL1_XOFF + 0))
+#define R_SYNC_SERIAL1_TR_WORD__IADDR (REG_STYPECAST_UWORD (reg_initiated__hwregs.R_SERIAL1_XOFF + 0))
+#else /* REG_NO_SHADOW */
+#define R_SYNC_SERIAL1_TR_WORD__SADDR (REG_STYPECAST_UWORD (®_shadow__hwregs))
+#define R_SYNC_SERIAL1_TR_WORD__IADDR (REG_STYPECAST_UWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SYNC_SERIAL1_TR_WORD__STYPECAST REG_STYPECAST_UWORD
+#define R_SYNC_SERIAL1_TR_WORD__SVAL REG_SVAL_SHADOW
+#define R_SYNC_SERIAL1_TR_WORD__SVAL_I REG_SVAL_I_SHADOW
+#define R_SYNC_SERIAL1_TR_WORD__TYPECAST REG_TYPECAST_UWORD
+#define R_SYNC_SERIAL1_TR_WORD__TYPE (REG_UWORD)
+#define R_SYNC_SERIAL1_TR_WORD__GET REG_GET_WO
+#define R_SYNC_SERIAL1_TR_WORD__IGET REG_IGET_WO
+#define R_SYNC_SERIAL1_TR_WORD__SET REG_SET_WO
+#define R_SYNC_SERIAL1_TR_WORD__ISET REG_ISET_WO
+#define R_SYNC_SERIAL1_TR_WORD__SET_VAL REG_SET_VAL_WO
+#define R_SYNC_SERIAL1_TR_WORD__EQL REG_EQL_WO
+#define R_SYNC_SERIAL1_TR_WORD__IEQL REG_IEQL_WO
+#define R_SYNC_SERIAL1_TR_WORD__RD REG_RD_WO
+#define R_SYNC_SERIAL1_TR_WORD__IRD REG_IRD_WO
+#define R_SYNC_SERIAL1_TR_WORD__WR REG_WR_WO
+#define R_SYNC_SERIAL1_TR_WORD__IWR REG_IWR_WO
+
+#define R_SYNC_SERIAL1_TR_WORD__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SYNC_SERIAL1_TR_WORD__data_out__data_out__MASK 0x0000ffffU
+
+#define R_SYNC_SERIAL1_TR_WORD__data_out__MAX 0xffff
+
+#define R_SYNC_SERIAL1_TR_WORD__data_out__MIN 0
+
+#define R_SYNC_SERIAL1_TR_WORD__data_out__BITNR 0
+
+#define R_SYNC_SERIAL1_TR_WORD__data_out__data_out__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SYNC_SERIAL3_CTRL
+ * - type: WO
+ * - addr: 0xb0000078
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+#define R_SYNC_SERIAL3_CTRL__ADDR (REG_TYPECAST_UDWORD 0xb0000078)
+
+#ifndef REG_NO_SHADOW
+#define R_SYNC_SERIAL3_CTRL__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_SERIAL3_CTRL + 0))
+#define R_SYNC_SERIAL3_CTRL__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_SERIAL3_CTRL + 0))
+#else /* REG_NO_SHADOW */
+#define R_SYNC_SERIAL3_CTRL__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_SYNC_SERIAL3_CTRL__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SYNC_SERIAL3_CTRL__STYPECAST REG_STYPECAST_UDWORD
+#define R_SYNC_SERIAL3_CTRL__SVAL REG_SVAL_SHADOW
+#define R_SYNC_SERIAL3_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_SYNC_SERIAL3_CTRL__TYPECAST REG_TYPECAST_UDWORD
+#define R_SYNC_SERIAL3_CTRL__TYPE (REG_UDWORD)
+#define R_SYNC_SERIAL3_CTRL__GET REG_GET_WO
+#define R_SYNC_SERIAL3_CTRL__IGET REG_IGET_WO
+#define R_SYNC_SERIAL3_CTRL__SET REG_SET_WO
+#define R_SYNC_SERIAL3_CTRL__ISET REG_ISET_WO
+#define R_SYNC_SERIAL3_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_SYNC_SERIAL3_CTRL__EQL REG_EQL_WO
+#define R_SYNC_SERIAL3_CTRL__IEQL REG_IEQL_WO
+#define R_SYNC_SERIAL3_CTRL__RD REG_RD_WO
+#define R_SYNC_SERIAL3_CTRL__IRD REG_IRD_WO
+#define R_SYNC_SERIAL3_CTRL__WR REG_WR_WO
+#define R_SYNC_SERIAL3_CTRL__IWR REG_IWR_WO
+
+#define R_SYNC_SERIAL3_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SYNC_SERIAL3_CTRL__tr_baud__tr_baud__MASK 0xf0000000U
+#define R_SYNC_SERIAL3_CTRL__dma_enable__dma_enable__MASK 0x08000000U
+#define R_SYNC_SERIAL3_CTRL__mode__mode__MASK 0x07000000U
+#define R_SYNC_SERIAL3_CTRL__error__error__MASK 0x00800000U
+#define R_SYNC_SERIAL3_CTRL__rec_enable__rec_enable__MASK 0x00400000U
+#define R_SYNC_SERIAL3_CTRL__f_synctype__f_synctype__MASK 0x00200000U
+#define R_SYNC_SERIAL3_CTRL__f_syncsize__f_syncsize__MASK 0x00180000U
+#define R_SYNC_SERIAL3_CTRL__f_sync__f_sync__MASK 0x00040000U
+#define R_SYNC_SERIAL3_CTRL__clk_mode__clk_mode__MASK 0x00020000U
+#define R_SYNC_SERIAL3_CTRL__clk_halt__clk_halt__MASK 0x00010000U
+#define R_SYNC_SERIAL3_CTRL__bitorder__bitorder__MASK 0x00008000U
+#define R_SYNC_SERIAL3_CTRL__tr_enable__tr_enable__MASK 0x00004000U
+#define R_SYNC_SERIAL3_CTRL__wordsize__wordsize__MASK 0x00003800U
+#define R_SYNC_SERIAL3_CTRL__buf_empty__buf_empty__MASK 0x00000400U
+#define R_SYNC_SERIAL3_CTRL__buf_full__buf_full__MASK 0x00000200U
+#define R_SYNC_SERIAL3_CTRL__flow_ctrl__flow_ctrl__MASK 0x00000100U
+#define R_SYNC_SERIAL3_CTRL__clk_polarity__clk_polarity__MASK 0x00000040U
+#define R_SYNC_SERIAL3_CTRL__frame_polarity__frame_polarity__MASK 0x00000020U
+#define R_SYNC_SERIAL3_CTRL__status_polarity__status_polarity__MASK 0x00000010U
+#define R_SYNC_SERIAL3_CTRL__clk_driver__clk_driver__MASK 0x00000008U
+#define R_SYNC_SERIAL3_CTRL__frame_driver__frame_driver__MASK 0x00000004U
+#define R_SYNC_SERIAL3_CTRL__status_driver__status_driver__MASK 0x00000002U
+#define R_SYNC_SERIAL3_CTRL__def_out0__def_out0__MASK 0x00000001U
+
+#define R_SYNC_SERIAL3_CTRL__tr_baud__MAX 0xf
+#define R_SYNC_SERIAL3_CTRL__dma_enable__MAX 0x1
+#define R_SYNC_SERIAL3_CTRL__mode__MAX 0x7
+#define R_SYNC_SERIAL3_CTRL__error__MAX 0x1
+#define R_SYNC_SERIAL3_CTRL__rec_enable__MAX 0x1
+#define R_SYNC_SERIAL3_CTRL__f_synctype__MAX 0x1
+#define R_SYNC_SERIAL3_CTRL__f_syncsize__MAX 0x3
+#define R_SYNC_SERIAL3_CTRL__f_sync__MAX 0x1
+#define R_SYNC_SERIAL3_CTRL__clk_mode__MAX 0x1
+#define R_SYNC_SERIAL3_CTRL__clk_halt__MAX 0x1
+#define R_SYNC_SERIAL3_CTRL__bitorder__MAX 0x1
+#define R_SYNC_SERIAL3_CTRL__tr_enable__MAX 0x1
+#define R_SYNC_SERIAL3_CTRL__wordsize__MAX 0x7
+#define R_SYNC_SERIAL3_CTRL__buf_empty__MAX 0x1
+#define R_SYNC_SERIAL3_CTRL__buf_full__MAX 0x1
+#define R_SYNC_SERIAL3_CTRL__flow_ctrl__MAX 0x1
+#define R_SYNC_SERIAL3_CTRL__clk_polarity__MAX 0x1
+#define R_SYNC_SERIAL3_CTRL__frame_polarity__MAX 0x1
+#define R_SYNC_SERIAL3_CTRL__status_polarity__MAX 0x1
+#define R_SYNC_SERIAL3_CTRL__clk_driver__MAX 0x1
+#define R_SYNC_SERIAL3_CTRL__frame_driver__MAX 0x1
+#define R_SYNC_SERIAL3_CTRL__status_driver__MAX 0x1
+#define R_SYNC_SERIAL3_CTRL__def_out0__MAX 0x1
+
+#define R_SYNC_SERIAL3_CTRL__tr_baud__MIN 0
+#define R_SYNC_SERIAL3_CTRL__dma_enable__MIN 0
+#define R_SYNC_SERIAL3_CTRL__mode__MIN 0
+#define R_SYNC_SERIAL3_CTRL__error__MIN 0
+#define R_SYNC_SERIAL3_CTRL__rec_enable__MIN 0
+#define R_SYNC_SERIAL3_CTRL__f_synctype__MIN 0
+#define R_SYNC_SERIAL3_CTRL__f_syncsize__MIN 0
+#define R_SYNC_SERIAL3_CTRL__f_sync__MIN 0
+#define R_SYNC_SERIAL3_CTRL__clk_mode__MIN 0
+#define R_SYNC_SERIAL3_CTRL__clk_halt__MIN 0
+#define R_SYNC_SERIAL3_CTRL__bitorder__MIN 0
+#define R_SYNC_SERIAL3_CTRL__tr_enable__MIN 0
+#define R_SYNC_SERIAL3_CTRL__wordsize__MIN 0
+#define R_SYNC_SERIAL3_CTRL__buf_empty__MIN 0
+#define R_SYNC_SERIAL3_CTRL__buf_full__MIN 0
+#define R_SYNC_SERIAL3_CTRL__flow_ctrl__MIN 0
+#define R_SYNC_SERIAL3_CTRL__clk_polarity__MIN 0
+#define R_SYNC_SERIAL3_CTRL__frame_polarity__MIN 0
+#define R_SYNC_SERIAL3_CTRL__status_polarity__MIN 0
+#define R_SYNC_SERIAL3_CTRL__clk_driver__MIN 0
+#define R_SYNC_SERIAL3_CTRL__frame_driver__MIN 0
+#define R_SYNC_SERIAL3_CTRL__status_driver__MIN 0
+#define R_SYNC_SERIAL3_CTRL__def_out0__MIN 0
+
+#define R_SYNC_SERIAL3_CTRL__tr_baud__BITNR 28
+#define R_SYNC_SERIAL3_CTRL__dma_enable__BITNR 27
+#define R_SYNC_SERIAL3_CTRL__mode__BITNR 24
+#define R_SYNC_SERIAL3_CTRL__error__BITNR 23
+#define R_SYNC_SERIAL3_CTRL__rec_enable__BITNR 22
+#define R_SYNC_SERIAL3_CTRL__f_synctype__BITNR 21
+#define R_SYNC_SERIAL3_CTRL__f_syncsize__BITNR 19
+#define R_SYNC_SERIAL3_CTRL__f_sync__BITNR 18
+#define R_SYNC_SERIAL3_CTRL__clk_mode__BITNR 17
+#define R_SYNC_SERIAL3_CTRL__clk_halt__BITNR 16
+#define R_SYNC_SERIAL3_CTRL__bitorder__BITNR 15
+#define R_SYNC_SERIAL3_CTRL__tr_enable__BITNR 14
+#define R_SYNC_SERIAL3_CTRL__wordsize__BITNR 11
+#define R_SYNC_SERIAL3_CTRL__buf_empty__BITNR 10
+#define R_SYNC_SERIAL3_CTRL__buf_full__BITNR 9
+#define R_SYNC_SERIAL3_CTRL__flow_ctrl__BITNR 8
+#define R_SYNC_SERIAL3_CTRL__clk_polarity__BITNR 6
+#define R_SYNC_SERIAL3_CTRL__frame_polarity__BITNR 5
+#define R_SYNC_SERIAL3_CTRL__status_polarity__BITNR 4
+#define R_SYNC_SERIAL3_CTRL__clk_driver__BITNR 3
+#define R_SYNC_SERIAL3_CTRL__frame_driver__BITNR 2
+#define R_SYNC_SERIAL3_CTRL__status_driver__BITNR 1
+#define R_SYNC_SERIAL3_CTRL__def_out0__BITNR 0
+
+#define R_SYNC_SERIAL3_CTRL__tr_baud__tr_baud__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_CTRL__dma_enable__dma_enable__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_CTRL__mode__mode__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_CTRL__error__error__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_CTRL__rec_enable__rec_enable__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_CTRL__f_synctype__f_synctype__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_CTRL__f_syncsize__f_syncsize__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_CTRL__f_sync__f_sync__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_CTRL__clk_mode__clk_mode__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_CTRL__clk_halt__clk_halt__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_CTRL__bitorder__bitorder__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_CTRL__tr_enable__tr_enable__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_CTRL__wordsize__wordsize__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_CTRL__buf_empty__buf_empty__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_CTRL__buf_full__buf_full__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_CTRL__flow_ctrl__flow_ctrl__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_CTRL__clk_polarity__clk_polarity__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_CTRL__frame_polarity__frame_polarity__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_CTRL__status_polarity__status_polarity__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_CTRL__clk_driver__clk_driver__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_CTRL__frame_driver__frame_driver__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_CTRL__status_driver__status_driver__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_CTRL__def_out0__def_out0__VAL REG_VAL_ENUM
+
+#define R_SYNC_SERIAL3_CTRL__tr_baud__tr_baud__c115k2Hz 10
+#define R_SYNC_SERIAL3_CTRL__tr_baud__tr_baud__c1200Hz 3
+#define R_SYNC_SERIAL3_CTRL__tr_baud__tr_baud__c150Hz 0
+#define R_SYNC_SERIAL3_CTRL__tr_baud__tr_baud__c19k2Hz 7
+#define R_SYNC_SERIAL3_CTRL__tr_baud__tr_baud__c230k4Hz 11
+#define R_SYNC_SERIAL3_CTRL__tr_baud__tr_baud__c2400Hz 4
+#define R_SYNC_SERIAL3_CTRL__tr_baud__tr_baud__c28k8Hz 8
+#define R_SYNC_SERIAL3_CTRL__tr_baud__tr_baud__c300Hz 1
+#define R_SYNC_SERIAL3_CTRL__tr_baud__tr_baud__c3125kHz 14
+#define R_SYNC_SERIAL3_CTRL__tr_baud__tr_baud__c460k8Hz 12
+#define R_SYNC_SERIAL3_CTRL__tr_baud__tr_baud__c4800Hz 5
+#define R_SYNC_SERIAL3_CTRL__tr_baud__tr_baud__c57k6Hz 9
+#define R_SYNC_SERIAL3_CTRL__tr_baud__tr_baud__c600Hz 2
+#define R_SYNC_SERIAL3_CTRL__tr_baud__tr_baud__c921k6Hz 13
+#define R_SYNC_SERIAL3_CTRL__tr_baud__tr_baud__c9600Hz 6
+#define R_SYNC_SERIAL3_CTRL__dma_enable__dma_enable__off 0
+#define R_SYNC_SERIAL3_CTRL__dma_enable__dma_enable__on 1
+#define R_SYNC_SERIAL3_CTRL__mode__mode__master_bidir 4
+#define R_SYNC_SERIAL3_CTRL__mode__mode__master_input 2
+#define R_SYNC_SERIAL3_CTRL__mode__mode__master_output 0
+#define R_SYNC_SERIAL3_CTRL__mode__mode__slave_bidir 5
+#define R_SYNC_SERIAL3_CTRL__mode__mode__slave_input 3
+#define R_SYNC_SERIAL3_CTRL__mode__mode__slave_output 1
+#define R_SYNC_SERIAL3_CTRL__error__error__ignore 1
+#define R_SYNC_SERIAL3_CTRL__error__error__normal 0
+#define R_SYNC_SERIAL3_CTRL__rec_enable__rec_enable__disable 0
+#define R_SYNC_SERIAL3_CTRL__rec_enable__rec_enable__enable 1
+#define R_SYNC_SERIAL3_CTRL__f_synctype__f_synctype__early 1
+#define R_SYNC_SERIAL3_CTRL__f_synctype__f_synctype__normal 0
+#define R_SYNC_SERIAL3_CTRL__f_syncsize__f_syncsize__bit 0
+#define R_SYNC_SERIAL3_CTRL__f_syncsize__f_syncsize__extended 2
+#define R_SYNC_SERIAL3_CTRL__f_syncsize__f_syncsize__word 1
+#define R_SYNC_SERIAL3_CTRL__f_sync__f_sync__off 1
+#define R_SYNC_SERIAL3_CTRL__f_sync__f_sync__on 0
+#define R_SYNC_SERIAL3_CTRL__clk_mode__clk_mode__gated 1
+#define R_SYNC_SERIAL3_CTRL__clk_mode__clk_mode__normal 0
+#define R_SYNC_SERIAL3_CTRL__clk_halt__clk_halt__running 0
+#define R_SYNC_SERIAL3_CTRL__clk_halt__clk_halt__stopped 1
+#define R_SYNC_SERIAL3_CTRL__bitorder__bitorder__lsb 0
+#define R_SYNC_SERIAL3_CTRL__bitorder__bitorder__msb 1
+#define R_SYNC_SERIAL3_CTRL__tr_enable__tr_enable__disable 0
+#define R_SYNC_SERIAL3_CTRL__tr_enable__tr_enable__enable 1
+#define R_SYNC_SERIAL3_CTRL__wordsize__wordsize__size12bit 1
+#define R_SYNC_SERIAL3_CTRL__wordsize__wordsize__size16bit 2
+#define R_SYNC_SERIAL3_CTRL__wordsize__wordsize__size24bit 3
+#define R_SYNC_SERIAL3_CTRL__wordsize__wordsize__size32bit 4
+#define R_SYNC_SERIAL3_CTRL__wordsize__wordsize__size8bit 0
+#define R_SYNC_SERIAL3_CTRL__buf_empty__buf_empty__lmt_0 1
+#define R_SYNC_SERIAL3_CTRL__buf_empty__buf_empty__lmt_8 0
+#define R_SYNC_SERIAL3_CTRL__buf_full__buf_full__lmt_32 0
+#define R_SYNC_SERIAL3_CTRL__buf_full__buf_full__lmt_8 1
+#define R_SYNC_SERIAL3_CTRL__flow_ctrl__flow_ctrl__disabled 0
+#define R_SYNC_SERIAL3_CTRL__flow_ctrl__flow_ctrl__enabled 1
+#define R_SYNC_SERIAL3_CTRL__clk_polarity__clk_polarity__neg 1
+#define R_SYNC_SERIAL3_CTRL__clk_polarity__clk_polarity__pos 0
+#define R_SYNC_SERIAL3_CTRL__frame_polarity__frame_polarity__inverted 1
+#define R_SYNC_SERIAL3_CTRL__frame_polarity__frame_polarity__normal 0
+#define R_SYNC_SERIAL3_CTRL__status_polarity__status_polarity__inverted 1
+#define R_SYNC_SERIAL3_CTRL__status_polarity__status_polarity__normal 0
+#define R_SYNC_SERIAL3_CTRL__clk_driver__clk_driver__inverted 1
+#define R_SYNC_SERIAL3_CTRL__clk_driver__clk_driver__normal 0
+#define R_SYNC_SERIAL3_CTRL__frame_driver__frame_driver__inverted 1
+#define R_SYNC_SERIAL3_CTRL__frame_driver__frame_driver__normal 0
+#define R_SYNC_SERIAL3_CTRL__status_driver__status_driver__inverted 1
+#define R_SYNC_SERIAL3_CTRL__status_driver__status_driver__normal 0
+#define R_SYNC_SERIAL3_CTRL__def_out0__def_out0__high 1
+#define R_SYNC_SERIAL3_CTRL__def_out0__def_out0__low 0
+
+#endif
+
+/*
+ * R_SYNC_SERIAL3_REC_BYTE
+ * - type: RO
+ * - addr: 0xb000007c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+#define R_SYNC_SERIAL3_REC_BYTE__ADDR (REG_TYPECAST_BYTE 0xb000007c)
+#define R_SYNC_SERIAL3_REC_BYTE__SVAL REG_SVAL_SHADOW
+#define R_SYNC_SERIAL3_REC_BYTE__SVAL_I REG_SVAL_I_SHADOW
+#define R_SYNC_SERIAL3_REC_BYTE__TYPECAST REG_TYPECAST_BYTE
+#define R_SYNC_SERIAL3_REC_BYTE__TYPE (REG_BYTE)
+#define R_SYNC_SERIAL3_REC_BYTE__GET REG_GET_RO
+#define R_SYNC_SERIAL3_REC_BYTE__IGET REG_IGET_RO
+#define R_SYNC_SERIAL3_REC_BYTE__SET REG_SET_RO
+#define R_SYNC_SERIAL3_REC_BYTE__ISET REG_ISET_RO
+#define R_SYNC_SERIAL3_REC_BYTE__SET_VAL REG_SET_VAL_RO
+#define R_SYNC_SERIAL3_REC_BYTE__EQL REG_EQL_RO
+#define R_SYNC_SERIAL3_REC_BYTE__IEQL REG_IEQL_RO
+#define R_SYNC_SERIAL3_REC_BYTE__RD REG_RD_RO
+#define R_SYNC_SERIAL3_REC_BYTE__IRD REG_IRD_RO
+#define R_SYNC_SERIAL3_REC_BYTE__WR REG_WR_RO
+#define R_SYNC_SERIAL3_REC_BYTE__IWR REG_IWR_RO
+
+#define R_SYNC_SERIAL3_REC_BYTE__READ(addr) \
+ (*(addr))
+
+#define R_SYNC_SERIAL3_REC_BYTE__data_in__data_in__MASK 0x000000ffU
+
+#define R_SYNC_SERIAL3_REC_BYTE__data_in__MAX 0xff
+
+#define R_SYNC_SERIAL3_REC_BYTE__data_in__MIN 0
+
+#define R_SYNC_SERIAL3_REC_BYTE__data_in__BITNR 0
+
+#define R_SYNC_SERIAL3_REC_BYTE__data_in__data_in__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SYNC_SERIAL3_REC_DATA
+ * - type: RO
+ * - addr: 0xb000007c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+#define R_SYNC_SERIAL3_REC_DATA__ADDR (REG_TYPECAST_UDWORD 0xb000007c)
+#define R_SYNC_SERIAL3_REC_DATA__SVAL REG_SVAL_SHADOW
+#define R_SYNC_SERIAL3_REC_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_SYNC_SERIAL3_REC_DATA__TYPECAST REG_TYPECAST_UDWORD
+#define R_SYNC_SERIAL3_REC_DATA__TYPE (REG_UDWORD)
+#define R_SYNC_SERIAL3_REC_DATA__GET REG_GET_RO
+#define R_SYNC_SERIAL3_REC_DATA__IGET REG_IGET_RO
+#define R_SYNC_SERIAL3_REC_DATA__SET REG_SET_RO
+#define R_SYNC_SERIAL3_REC_DATA__ISET REG_ISET_RO
+#define R_SYNC_SERIAL3_REC_DATA__SET_VAL REG_SET_VAL_RO
+#define R_SYNC_SERIAL3_REC_DATA__EQL REG_EQL_RO
+#define R_SYNC_SERIAL3_REC_DATA__IEQL REG_IEQL_RO
+#define R_SYNC_SERIAL3_REC_DATA__RD REG_RD_RO
+#define R_SYNC_SERIAL3_REC_DATA__IRD REG_IRD_RO
+#define R_SYNC_SERIAL3_REC_DATA__WR REG_WR_RO
+#define R_SYNC_SERIAL3_REC_DATA__IWR REG_IWR_RO
+
+#define R_SYNC_SERIAL3_REC_DATA__READ(addr) \
+ (*(addr))
+
+#define R_SYNC_SERIAL3_REC_DATA__data_in__data_in__MASK 0xffffffffU
+
+#define R_SYNC_SERIAL3_REC_DATA__data_in__MAX 0xffffffff
+
+#define R_SYNC_SERIAL3_REC_DATA__data_in__MIN 0
+
+#define R_SYNC_SERIAL3_REC_DATA__data_in__BITNR 0
+
+#define R_SYNC_SERIAL3_REC_DATA__data_in__data_in__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SYNC_SERIAL3_REC_WORD
+ * - type: RO
+ * - addr: 0xb000007c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+#define R_SYNC_SERIAL3_REC_WORD__ADDR (REG_TYPECAST_UWORD 0xb000007c)
+#define R_SYNC_SERIAL3_REC_WORD__SVAL REG_SVAL_SHADOW
+#define R_SYNC_SERIAL3_REC_WORD__SVAL_I REG_SVAL_I_SHADOW
+#define R_SYNC_SERIAL3_REC_WORD__TYPECAST REG_TYPECAST_UWORD
+#define R_SYNC_SERIAL3_REC_WORD__TYPE (REG_UWORD)
+#define R_SYNC_SERIAL3_REC_WORD__GET REG_GET_RO
+#define R_SYNC_SERIAL3_REC_WORD__IGET REG_IGET_RO
+#define R_SYNC_SERIAL3_REC_WORD__SET REG_SET_RO
+#define R_SYNC_SERIAL3_REC_WORD__ISET REG_ISET_RO
+#define R_SYNC_SERIAL3_REC_WORD__SET_VAL REG_SET_VAL_RO
+#define R_SYNC_SERIAL3_REC_WORD__EQL REG_EQL_RO
+#define R_SYNC_SERIAL3_REC_WORD__IEQL REG_IEQL_RO
+#define R_SYNC_SERIAL3_REC_WORD__RD REG_RD_RO
+#define R_SYNC_SERIAL3_REC_WORD__IRD REG_IRD_RO
+#define R_SYNC_SERIAL3_REC_WORD__WR REG_WR_RO
+#define R_SYNC_SERIAL3_REC_WORD__IWR REG_IWR_RO
+
+#define R_SYNC_SERIAL3_REC_WORD__READ(addr) \
+ (*(addr))
+
+#define R_SYNC_SERIAL3_REC_WORD__data_in__data_in__MASK 0x0000ffffU
+
+#define R_SYNC_SERIAL3_REC_WORD__data_in__MAX 0xffff
+
+#define R_SYNC_SERIAL3_REC_WORD__data_in__MIN 0
+
+#define R_SYNC_SERIAL3_REC_WORD__data_in__BITNR 0
+
+#define R_SYNC_SERIAL3_REC_WORD__data_in__data_in__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SYNC_SERIAL3_STATUS
+ * - type: RO
+ * - addr: 0xb0000078
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+#define R_SYNC_SERIAL3_STATUS__ADDR (REG_TYPECAST_UDWORD 0xb0000078)
+#define R_SYNC_SERIAL3_STATUS__SVAL REG_SVAL_SHADOW
+#define R_SYNC_SERIAL3_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_SYNC_SERIAL3_STATUS__TYPECAST REG_TYPECAST_UDWORD
+#define R_SYNC_SERIAL3_STATUS__TYPE (REG_UDWORD)
+#define R_SYNC_SERIAL3_STATUS__GET REG_GET_RO
+#define R_SYNC_SERIAL3_STATUS__IGET REG_IGET_RO
+#define R_SYNC_SERIAL3_STATUS__SET REG_SET_RO
+#define R_SYNC_SERIAL3_STATUS__ISET REG_ISET_RO
+#define R_SYNC_SERIAL3_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_SYNC_SERIAL3_STATUS__EQL REG_EQL_RO
+#define R_SYNC_SERIAL3_STATUS__IEQL REG_IEQL_RO
+#define R_SYNC_SERIAL3_STATUS__RD REG_RD_RO
+#define R_SYNC_SERIAL3_STATUS__IRD REG_IRD_RO
+#define R_SYNC_SERIAL3_STATUS__WR REG_WR_RO
+#define R_SYNC_SERIAL3_STATUS__IWR REG_IWR_RO
+
+#define R_SYNC_SERIAL3_STATUS__READ(addr) \
+ (*(addr))
+
+#define R_SYNC_SERIAL3_STATUS__rec_status__rec_status__MASK 0x00008000U
+#define R_SYNC_SERIAL3_STATUS__tr_empty__tr_empty__MASK 0x00004000U
+#define R_SYNC_SERIAL3_STATUS__tr_ready__tr_ready__MASK 0x00002000U
+#define R_SYNC_SERIAL3_STATUS__pin_1__pin_1__MASK 0x00001000U
+#define R_SYNC_SERIAL3_STATUS__pin_0__pin_0__MASK 0x00000800U
+#define R_SYNC_SERIAL3_STATUS__underflow__underflow__MASK 0x00000400U
+#define R_SYNC_SERIAL3_STATUS__overrun__overrun__MASK 0x00000200U
+#define R_SYNC_SERIAL3_STATUS__data_avail__data_avail__MASK 0x00000100U
+#define R_SYNC_SERIAL3_STATUS__data__data__MASK 0x000000ffU
+
+#define R_SYNC_SERIAL3_STATUS__rec_status__MAX 0x1
+#define R_SYNC_SERIAL3_STATUS__tr_empty__MAX 0x1
+#define R_SYNC_SERIAL3_STATUS__tr_ready__MAX 0x1
+#define R_SYNC_SERIAL3_STATUS__pin_1__MAX 0x1
+#define R_SYNC_SERIAL3_STATUS__pin_0__MAX 0x1
+#define R_SYNC_SERIAL3_STATUS__underflow__MAX 0x1
+#define R_SYNC_SERIAL3_STATUS__overrun__MAX 0x1
+#define R_SYNC_SERIAL3_STATUS__data_avail__MAX 0x1
+#define R_SYNC_SERIAL3_STATUS__data__MAX 0xff
+
+#define R_SYNC_SERIAL3_STATUS__rec_status__MIN 0
+#define R_SYNC_SERIAL3_STATUS__tr_empty__MIN 0
+#define R_SYNC_SERIAL3_STATUS__tr_ready__MIN 0
+#define R_SYNC_SERIAL3_STATUS__pin_1__MIN 0
+#define R_SYNC_SERIAL3_STATUS__pin_0__MIN 0
+#define R_SYNC_SERIAL3_STATUS__underflow__MIN 0
+#define R_SYNC_SERIAL3_STATUS__overrun__MIN 0
+#define R_SYNC_SERIAL3_STATUS__data_avail__MIN 0
+#define R_SYNC_SERIAL3_STATUS__data__MIN 0
+
+#define R_SYNC_SERIAL3_STATUS__rec_status__BITNR 15
+#define R_SYNC_SERIAL3_STATUS__tr_empty__BITNR 14
+#define R_SYNC_SERIAL3_STATUS__tr_ready__BITNR 13
+#define R_SYNC_SERIAL3_STATUS__pin_1__BITNR 12
+#define R_SYNC_SERIAL3_STATUS__pin_0__BITNR 11
+#define R_SYNC_SERIAL3_STATUS__underflow__BITNR 10
+#define R_SYNC_SERIAL3_STATUS__overrun__BITNR 9
+#define R_SYNC_SERIAL3_STATUS__data_avail__BITNR 8
+#define R_SYNC_SERIAL3_STATUS__data__BITNR 0
+
+#define R_SYNC_SERIAL3_STATUS__rec_status__rec_status__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_STATUS__tr_empty__tr_empty__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_STATUS__tr_ready__tr_ready__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_STATUS__pin_1__pin_1__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_STATUS__pin_0__pin_0__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_STATUS__underflow__underflow__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_STATUS__overrun__overrun__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_STATUS__data_avail__data_avail__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL3_STATUS__data__data__VAL REG_VAL_VAL
+
+#define R_SYNC_SERIAL3_STATUS__rec_status__rec_status__idle 1
+#define R_SYNC_SERIAL3_STATUS__rec_status__rec_status__running 0
+#define R_SYNC_SERIAL3_STATUS__tr_empty__tr_empty__empty 1
+#define R_SYNC_SERIAL3_STATUS__tr_empty__tr_empty__not_empty 0
+#define R_SYNC_SERIAL3_STATUS__tr_ready__tr_ready__full 0
+#define R_SYNC_SERIAL3_STATUS__tr_ready__tr_ready__ready 1
+#define R_SYNC_SERIAL3_STATUS__pin_1__pin_1__high 1
+#define R_SYNC_SERIAL3_STATUS__pin_1__pin_1__low 0
+#define R_SYNC_SERIAL3_STATUS__pin_0__pin_0__high 1
+#define R_SYNC_SERIAL3_STATUS__pin_0__pin_0__low 0
+#define R_SYNC_SERIAL3_STATUS__underflow__underflow__no 0
+#define R_SYNC_SERIAL3_STATUS__underflow__underflow__yes 1
+#define R_SYNC_SERIAL3_STATUS__overrun__overrun__no 0
+#define R_SYNC_SERIAL3_STATUS__overrun__overrun__yes 1
+#define R_SYNC_SERIAL3_STATUS__data_avail__data_avail__no 0
+#define R_SYNC_SERIAL3_STATUS__data_avail__data_avail__yes 1
+
+#endif
+
+/*
+ * R_SYNC_SERIAL3_TR_BYTE
+ * - type: WO
+ * - addr: 0xb000007c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+#define R_SYNC_SERIAL3_TR_BYTE__ADDR (REG_TYPECAST_BYTE 0xb000007c)
+
+#ifndef REG_NO_SHADOW
+#define R_SYNC_SERIAL3_TR_BYTE__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_SERIAL3_XOFF + 0))
+#define R_SYNC_SERIAL3_TR_BYTE__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_SERIAL3_XOFF + 0))
+#else /* REG_NO_SHADOW */
+#define R_SYNC_SERIAL3_TR_BYTE__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_SYNC_SERIAL3_TR_BYTE__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SYNC_SERIAL3_TR_BYTE__STYPECAST REG_STYPECAST_BYTE
+#define R_SYNC_SERIAL3_TR_BYTE__SVAL REG_SVAL_SHADOW
+#define R_SYNC_SERIAL3_TR_BYTE__SVAL_I REG_SVAL_I_SHADOW
+#define R_SYNC_SERIAL3_TR_BYTE__TYPECAST REG_TYPECAST_BYTE
+#define R_SYNC_SERIAL3_TR_BYTE__TYPE (REG_BYTE)
+#define R_SYNC_SERIAL3_TR_BYTE__GET REG_GET_WO
+#define R_SYNC_SERIAL3_TR_BYTE__IGET REG_IGET_WO
+#define R_SYNC_SERIAL3_TR_BYTE__SET REG_SET_WO
+#define R_SYNC_SERIAL3_TR_BYTE__ISET REG_ISET_WO
+#define R_SYNC_SERIAL3_TR_BYTE__SET_VAL REG_SET_VAL_WO
+#define R_SYNC_SERIAL3_TR_BYTE__EQL REG_EQL_WO
+#define R_SYNC_SERIAL3_TR_BYTE__IEQL REG_IEQL_WO
+#define R_SYNC_SERIAL3_TR_BYTE__RD REG_RD_WO
+#define R_SYNC_SERIAL3_TR_BYTE__IRD REG_IRD_WO
+#define R_SYNC_SERIAL3_TR_BYTE__WR REG_WR_WO
+#define R_SYNC_SERIAL3_TR_BYTE__IWR REG_IWR_WO
+
+#define R_SYNC_SERIAL3_TR_BYTE__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SYNC_SERIAL3_TR_BYTE__data_out__data_out__MASK 0x000000ffU
+
+#define R_SYNC_SERIAL3_TR_BYTE__data_out__MAX 0xff
+
+#define R_SYNC_SERIAL3_TR_BYTE__data_out__MIN 0
+
+#define R_SYNC_SERIAL3_TR_BYTE__data_out__BITNR 0
+
+#define R_SYNC_SERIAL3_TR_BYTE__data_out__data_out__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SYNC_SERIAL3_TR_DATA
+ * - type: WO
+ * - addr: 0xb000007c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+#define R_SYNC_SERIAL3_TR_DATA__ADDR (REG_TYPECAST_UDWORD 0xb000007c)
+
+#ifndef REG_NO_SHADOW
+#define R_SYNC_SERIAL3_TR_DATA__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_SERIAL3_XOFF + 0))
+#define R_SYNC_SERIAL3_TR_DATA__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_SERIAL3_XOFF + 0))
+#else /* REG_NO_SHADOW */
+#define R_SYNC_SERIAL3_TR_DATA__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_SYNC_SERIAL3_TR_DATA__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SYNC_SERIAL3_TR_DATA__STYPECAST REG_STYPECAST_UDWORD
+#define R_SYNC_SERIAL3_TR_DATA__SVAL REG_SVAL_SHADOW
+#define R_SYNC_SERIAL3_TR_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_SYNC_SERIAL3_TR_DATA__TYPECAST REG_TYPECAST_UDWORD
+#define R_SYNC_SERIAL3_TR_DATA__TYPE (REG_UDWORD)
+#define R_SYNC_SERIAL3_TR_DATA__GET REG_GET_WO
+#define R_SYNC_SERIAL3_TR_DATA__IGET REG_IGET_WO
+#define R_SYNC_SERIAL3_TR_DATA__SET REG_SET_WO
+#define R_SYNC_SERIAL3_TR_DATA__ISET REG_ISET_WO
+#define R_SYNC_SERIAL3_TR_DATA__SET_VAL REG_SET_VAL_WO
+#define R_SYNC_SERIAL3_TR_DATA__EQL REG_EQL_WO
+#define R_SYNC_SERIAL3_TR_DATA__IEQL REG_IEQL_WO
+#define R_SYNC_SERIAL3_TR_DATA__RD REG_RD_WO
+#define R_SYNC_SERIAL3_TR_DATA__IRD REG_IRD_WO
+#define R_SYNC_SERIAL3_TR_DATA__WR REG_WR_WO
+#define R_SYNC_SERIAL3_TR_DATA__IWR REG_IWR_WO
+
+#define R_SYNC_SERIAL3_TR_DATA__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SYNC_SERIAL3_TR_DATA__data_out__data_out__MASK 0xffffffffU
+
+#define R_SYNC_SERIAL3_TR_DATA__data_out__MAX 0xffffffff
+
+#define R_SYNC_SERIAL3_TR_DATA__data_out__MIN 0
+
+#define R_SYNC_SERIAL3_TR_DATA__data_out__BITNR 0
+
+#define R_SYNC_SERIAL3_TR_DATA__data_out__data_out__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SYNC_SERIAL3_TR_WORD
+ * - type: WO
+ * - addr: 0xb000007c
+ * - group: Syncrounous serial port registers
+ */
+
+#if USE_GROUP__Syncrounous_serial_port_registers
+
+#define R_SYNC_SERIAL3_TR_WORD__ADDR (REG_TYPECAST_UWORD 0xb000007c)
+
+#ifndef REG_NO_SHADOW
+#define R_SYNC_SERIAL3_TR_WORD__SADDR (REG_STYPECAST_UWORD (reg_shadow__hwregs.R_SERIAL3_XOFF + 0))
+#define R_SYNC_SERIAL3_TR_WORD__IADDR (REG_STYPECAST_UWORD (reg_initiated__hwregs.R_SERIAL3_XOFF + 0))
+#else /* REG_NO_SHADOW */
+#define R_SYNC_SERIAL3_TR_WORD__SADDR (REG_STYPECAST_UWORD (®_shadow__hwregs))
+#define R_SYNC_SERIAL3_TR_WORD__IADDR (REG_STYPECAST_UWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SYNC_SERIAL3_TR_WORD__STYPECAST REG_STYPECAST_UWORD
+#define R_SYNC_SERIAL3_TR_WORD__SVAL REG_SVAL_SHADOW
+#define R_SYNC_SERIAL3_TR_WORD__SVAL_I REG_SVAL_I_SHADOW
+#define R_SYNC_SERIAL3_TR_WORD__TYPECAST REG_TYPECAST_UWORD
+#define R_SYNC_SERIAL3_TR_WORD__TYPE (REG_UWORD)
+#define R_SYNC_SERIAL3_TR_WORD__GET REG_GET_WO
+#define R_SYNC_SERIAL3_TR_WORD__IGET REG_IGET_WO
+#define R_SYNC_SERIAL3_TR_WORD__SET REG_SET_WO
+#define R_SYNC_SERIAL3_TR_WORD__ISET REG_ISET_WO
+#define R_SYNC_SERIAL3_TR_WORD__SET_VAL REG_SET_VAL_WO
+#define R_SYNC_SERIAL3_TR_WORD__EQL REG_EQL_WO
+#define R_SYNC_SERIAL3_TR_WORD__IEQL REG_IEQL_WO
+#define R_SYNC_SERIAL3_TR_WORD__RD REG_RD_WO
+#define R_SYNC_SERIAL3_TR_WORD__IRD REG_IRD_WO
+#define R_SYNC_SERIAL3_TR_WORD__WR REG_WR_WO
+#define R_SYNC_SERIAL3_TR_WORD__IWR REG_IWR_WO
+
+#define R_SYNC_SERIAL3_TR_WORD__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SYNC_SERIAL3_TR_WORD__data_out__data_out__MASK 0x0000ffffU
+
+#define R_SYNC_SERIAL3_TR_WORD__data_out__MAX 0xffff
+
+#define R_SYNC_SERIAL3_TR_WORD__data_out__MIN 0
+
+#define R_SYNC_SERIAL3_TR_WORD__data_out__BITNR 0
+
+#define R_SYNC_SERIAL3_TR_WORD__data_out__data_out__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_SYNC_SERIAL_PRESCALE
+ * - type: WO
+ * - addr: 0xb00000f4
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+#define R_SYNC_SERIAL_PRESCALE__ADDR (REG_TYPECAST_UDWORD 0xb00000f4)
+
+#ifndef REG_NO_SHADOW
+#define R_SYNC_SERIAL_PRESCALE__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_SYNC_SERIAL_PRESCALE + 0))
+#define R_SYNC_SERIAL_PRESCALE__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_SYNC_SERIAL_PRESCALE + 0))
+#else /* REG_NO_SHADOW */
+#define R_SYNC_SERIAL_PRESCALE__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_SYNC_SERIAL_PRESCALE__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_SYNC_SERIAL_PRESCALE__STYPECAST REG_STYPECAST_UDWORD
+#define R_SYNC_SERIAL_PRESCALE__SVAL REG_SVAL_SHADOW
+#define R_SYNC_SERIAL_PRESCALE__SVAL_I REG_SVAL_I_SHADOW
+#define R_SYNC_SERIAL_PRESCALE__TYPECAST REG_TYPECAST_UDWORD
+#define R_SYNC_SERIAL_PRESCALE__TYPE (REG_UDWORD)
+#define R_SYNC_SERIAL_PRESCALE__GET REG_GET_WO
+#define R_SYNC_SERIAL_PRESCALE__IGET REG_IGET_WO
+#define R_SYNC_SERIAL_PRESCALE__SET REG_SET_WO
+#define R_SYNC_SERIAL_PRESCALE__ISET REG_ISET_WO
+#define R_SYNC_SERIAL_PRESCALE__SET_VAL REG_SET_VAL_WO
+#define R_SYNC_SERIAL_PRESCALE__EQL REG_EQL_WO
+#define R_SYNC_SERIAL_PRESCALE__IEQL REG_IEQL_WO
+#define R_SYNC_SERIAL_PRESCALE__RD REG_RD_WO
+#define R_SYNC_SERIAL_PRESCALE__IRD REG_IRD_WO
+#define R_SYNC_SERIAL_PRESCALE__WR REG_WR_WO
+#define R_SYNC_SERIAL_PRESCALE__IWR REG_IWR_WO
+
+#define R_SYNC_SERIAL_PRESCALE__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u3__clk_sel_u3__MASK 0x00800000U
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u3__word_stb_sel_u3__MASK 0x00400000U
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u1__clk_sel_u1__MASK 0x00200000U
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u1__word_stb_sel_u1__MASK 0x00100000U
+#define R_SYNC_SERIAL_PRESCALE__prescaler__prescaler__MASK 0x00070000U
+#define R_SYNC_SERIAL_PRESCALE__warp_mode__warp_mode__MASK 0x00008000U
+#define R_SYNC_SERIAL_PRESCALE__frame_rate__frame_rate__MASK 0x00007800U
+#define R_SYNC_SERIAL_PRESCALE__word_rate__word_rate__MASK 0x000003ffU
+
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u3__MAX 0x1
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u3__MAX 0x1
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u1__MAX 0x1
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u1__MAX 0x1
+#define R_SYNC_SERIAL_PRESCALE__prescaler__MAX 0x7
+#define R_SYNC_SERIAL_PRESCALE__warp_mode__MAX 0x1
+#define R_SYNC_SERIAL_PRESCALE__frame_rate__MAX 0xf
+#define R_SYNC_SERIAL_PRESCALE__word_rate__MAX 0x3ff
+
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u3__MIN 0
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u3__MIN 0
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u1__MIN 0
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u1__MIN 0
+#define R_SYNC_SERIAL_PRESCALE__prescaler__MIN 0
+#define R_SYNC_SERIAL_PRESCALE__warp_mode__MIN 0
+#define R_SYNC_SERIAL_PRESCALE__frame_rate__MIN 0
+#define R_SYNC_SERIAL_PRESCALE__word_rate__MIN 0
+
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u3__BITNR 23
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u3__BITNR 22
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u1__BITNR 21
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u1__BITNR 20
+#define R_SYNC_SERIAL_PRESCALE__prescaler__BITNR 16
+#define R_SYNC_SERIAL_PRESCALE__warp_mode__BITNR 15
+#define R_SYNC_SERIAL_PRESCALE__frame_rate__BITNR 11
+#define R_SYNC_SERIAL_PRESCALE__word_rate__BITNR 0
+
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u3__clk_sel_u3__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u3__word_stb_sel_u3__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u1__clk_sel_u1__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u1__word_stb_sel_u1__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL_PRESCALE__prescaler__prescaler__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL_PRESCALE__warp_mode__warp_mode__VAL REG_VAL_ENUM
+#define R_SYNC_SERIAL_PRESCALE__frame_rate__frame_rate__VAL REG_VAL_VAL
+#define R_SYNC_SERIAL_PRESCALE__word_rate__word_rate__VAL REG_VAL_VAL
+
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u3__clk_sel_u3__baudrate 1
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u3__clk_sel_u3__codec 0
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u3__word_stb_sel_u3__external 0
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u3__word_stb_sel_u3__internal 1
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u1__clk_sel_u1__baudrate 1
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u1__clk_sel_u1__codec 0
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u1__word_stb_sel_u1__external 0
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u1__word_stb_sel_u1__internal 1
+#define R_SYNC_SERIAL_PRESCALE__prescaler__prescaler__div1 0
+#define R_SYNC_SERIAL_PRESCALE__prescaler__prescaler__div128 7
+#define R_SYNC_SERIAL_PRESCALE__prescaler__prescaler__div16 4
+#define R_SYNC_SERIAL_PRESCALE__prescaler__prescaler__div2 1
+#define R_SYNC_SERIAL_PRESCALE__prescaler__prescaler__div32 5
+#define R_SYNC_SERIAL_PRESCALE__prescaler__prescaler__div4 2
+#define R_SYNC_SERIAL_PRESCALE__prescaler__prescaler__div64 6
+#define R_SYNC_SERIAL_PRESCALE__prescaler__prescaler__div8 3
+#define R_SYNC_SERIAL_PRESCALE__warp_mode__warp_mode__enabled 1
+#define R_SYNC_SERIAL_PRESCALE__warp_mode__warp_mode__normal 0
+
+#endif
+
+/*
+ * R_TEST_MODE
+ * - type: WO
+ * - addr: 0xb00000fc
+ * - group: Test mode registers
+ */
+
+#if USE_GROUP__Test_mode_registers
+
+#define R_TEST_MODE__ADDR (REG_TYPECAST_UDWORD 0xb00000fc)
+
+#ifndef REG_NO_SHADOW
+#define R_TEST_MODE__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_TEST_MODE + 0))
+#define R_TEST_MODE__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_TEST_MODE + 0))
+#else /* REG_NO_SHADOW */
+#define R_TEST_MODE__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_TEST_MODE__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_TEST_MODE__STYPECAST REG_STYPECAST_UDWORD
+#define R_TEST_MODE__SVAL REG_SVAL_SHADOW
+#define R_TEST_MODE__SVAL_I REG_SVAL_I_SHADOW
+#define R_TEST_MODE__TYPECAST REG_TYPECAST_UDWORD
+#define R_TEST_MODE__TYPE (REG_UDWORD)
+#define R_TEST_MODE__GET REG_GET_WO
+#define R_TEST_MODE__IGET REG_IGET_WO
+#define R_TEST_MODE__SET REG_SET_WO
+#define R_TEST_MODE__ISET REG_ISET_WO
+#define R_TEST_MODE__SET_VAL REG_SET_VAL_WO
+#define R_TEST_MODE__EQL REG_EQL_WO
+#define R_TEST_MODE__IEQL REG_IEQL_WO
+#define R_TEST_MODE__RD REG_RD_WO
+#define R_TEST_MODE__IRD REG_IRD_WO
+#define R_TEST_MODE__WR REG_WR_WO
+#define R_TEST_MODE__IWR REG_IWR_WO
+
+#define R_TEST_MODE__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_TEST_MODE__single_step__single_step__MASK 0x00080000U
+#define R_TEST_MODE__step_wr__step_wr__MASK 0x00040000U
+#define R_TEST_MODE__step_rd__step_rd__MASK 0x00020000U
+#define R_TEST_MODE__step_fetch__step_fetch__MASK 0x00010000U
+#define R_TEST_MODE__mmu_test__mmu_test__MASK 0x00001000U
+#define R_TEST_MODE__usb_test__usb_test__MASK 0x00000800U
+#define R_TEST_MODE__scsi_timer_test__scsi_timer_test__MASK 0x00000400U
+#define R_TEST_MODE__backoff__backoff__MASK 0x00000200U
+#define R_TEST_MODE__snmp_test__snmp_test__MASK 0x00000100U
+#define R_TEST_MODE__snmp_inc__snmp_inc__MASK 0x00000080U
+#define R_TEST_MODE__ser_loop__ser_loop__MASK 0x00000040U
+#define R_TEST_MODE__baudrate__baudrate__MASK 0x00000020U
+#define R_TEST_MODE__timer__timer__MASK 0x00000018U
+#define R_TEST_MODE__cache_test__cache_test__MASK 0x00000004U
+#define R_TEST_MODE__tag_test__tag_test__MASK 0x00000002U
+#define R_TEST_MODE__cache_enable__cache_enable__MASK 0x00000001U
+
+#define R_TEST_MODE__single_step__MAX 0x1
+#define R_TEST_MODE__step_wr__MAX 0x1
+#define R_TEST_MODE__step_rd__MAX 0x1
+#define R_TEST_MODE__step_fetch__MAX 0x1
+#define R_TEST_MODE__mmu_test__MAX 0x1
+#define R_TEST_MODE__usb_test__MAX 0x1
+#define R_TEST_MODE__scsi_timer_test__MAX 0x1
+#define R_TEST_MODE__backoff__MAX 0x1
+#define R_TEST_MODE__snmp_test__MAX 0x1
+#define R_TEST_MODE__snmp_inc__MAX 0x1
+#define R_TEST_MODE__ser_loop__MAX 0x1
+#define R_TEST_MODE__baudrate__MAX 0x1
+#define R_TEST_MODE__timer__MAX 0x3
+#define R_TEST_MODE__cache_test__MAX 0x1
+#define R_TEST_MODE__tag_test__MAX 0x1
+#define R_TEST_MODE__cache_enable__MAX 0x1
+
+#define R_TEST_MODE__single_step__MIN 0
+#define R_TEST_MODE__step_wr__MIN 0
+#define R_TEST_MODE__step_rd__MIN 0
+#define R_TEST_MODE__step_fetch__MIN 0
+#define R_TEST_MODE__mmu_test__MIN 0
+#define R_TEST_MODE__usb_test__MIN 0
+#define R_TEST_MODE__scsi_timer_test__MIN 0
+#define R_TEST_MODE__backoff__MIN 0
+#define R_TEST_MODE__snmp_test__MIN 0
+#define R_TEST_MODE__snmp_inc__MIN 0
+#define R_TEST_MODE__ser_loop__MIN 0
+#define R_TEST_MODE__baudrate__MIN 0
+#define R_TEST_MODE__timer__MIN 0
+#define R_TEST_MODE__cache_test__MIN 0
+#define R_TEST_MODE__tag_test__MIN 0
+#define R_TEST_MODE__cache_enable__MIN 0
+
+#define R_TEST_MODE__single_step__BITNR 19
+#define R_TEST_MODE__step_wr__BITNR 18
+#define R_TEST_MODE__step_rd__BITNR 17
+#define R_TEST_MODE__step_fetch__BITNR 16
+#define R_TEST_MODE__mmu_test__BITNR 12
+#define R_TEST_MODE__usb_test__BITNR 11
+#define R_TEST_MODE__scsi_timer_test__BITNR 10
+#define R_TEST_MODE__backoff__BITNR 9
+#define R_TEST_MODE__snmp_test__BITNR 8
+#define R_TEST_MODE__snmp_inc__BITNR 7
+#define R_TEST_MODE__ser_loop__BITNR 6
+#define R_TEST_MODE__baudrate__BITNR 5
+#define R_TEST_MODE__timer__BITNR 3
+#define R_TEST_MODE__cache_test__BITNR 2
+#define R_TEST_MODE__tag_test__BITNR 1
+#define R_TEST_MODE__cache_enable__BITNR 0
+
+#define R_TEST_MODE__single_step__single_step__VAL REG_VAL_ENUM
+#define R_TEST_MODE__step_wr__step_wr__VAL REG_VAL_ENUM
+#define R_TEST_MODE__step_rd__step_rd__VAL REG_VAL_ENUM
+#define R_TEST_MODE__step_fetch__step_fetch__VAL REG_VAL_ENUM
+#define R_TEST_MODE__mmu_test__mmu_test__VAL REG_VAL_ENUM
+#define R_TEST_MODE__usb_test__usb_test__VAL REG_VAL_ENUM
+#define R_TEST_MODE__scsi_timer_test__scsi_timer_test__VAL REG_VAL_ENUM
+#define R_TEST_MODE__backoff__backoff__VAL REG_VAL_ENUM
+#define R_TEST_MODE__snmp_test__snmp_test__VAL REG_VAL_ENUM
+#define R_TEST_MODE__snmp_inc__snmp_inc__VAL REG_VAL_ENUM
+#define R_TEST_MODE__ser_loop__ser_loop__VAL REG_VAL_ENUM
+#define R_TEST_MODE__baudrate__baudrate__VAL REG_VAL_ENUM
+#define R_TEST_MODE__timer__timer__VAL REG_VAL_ENUM
+#define R_TEST_MODE__cache_test__cache_test__VAL REG_VAL_ENUM
+#define R_TEST_MODE__tag_test__tag_test__VAL REG_VAL_ENUM
+#define R_TEST_MODE__cache_enable__cache_enable__VAL REG_VAL_ENUM
+
+#define R_TEST_MODE__single_step__single_step__off 0
+#define R_TEST_MODE__single_step__single_step__on 1
+#define R_TEST_MODE__step_wr__step_wr__off 0
+#define R_TEST_MODE__step_wr__step_wr__on 1
+#define R_TEST_MODE__step_rd__step_rd__off 0
+#define R_TEST_MODE__step_rd__step_rd__on 1
+#define R_TEST_MODE__step_fetch__step_fetch__off 0
+#define R_TEST_MODE__step_fetch__step_fetch__on 1
+#define R_TEST_MODE__mmu_test__mmu_test__off 0
+#define R_TEST_MODE__mmu_test__mmu_test__on 1
+#define R_TEST_MODE__usb_test__usb_test__off 0
+#define R_TEST_MODE__usb_test__usb_test__on 1
+#define R_TEST_MODE__scsi_timer_test__scsi_timer_test__off 0
+#define R_TEST_MODE__scsi_timer_test__scsi_timer_test__on 1
+#define R_TEST_MODE__backoff__backoff__off 0
+#define R_TEST_MODE__backoff__backoff__on 1
+#define R_TEST_MODE__snmp_test__snmp_test__off 0
+#define R_TEST_MODE__snmp_test__snmp_test__on 1
+#define R_TEST_MODE__snmp_inc__snmp_inc__do 1
+#define R_TEST_MODE__snmp_inc__snmp_inc__dont 0
+#define R_TEST_MODE__ser_loop__ser_loop__off 0
+#define R_TEST_MODE__ser_loop__ser_loop__on 1
+#define R_TEST_MODE__baudrate__baudrate__off 0
+#define R_TEST_MODE__baudrate__baudrate__on 1
+#define R_TEST_MODE__timer__timer__all 3
+#define R_TEST_MODE__timer__timer__even 1
+#define R_TEST_MODE__timer__timer__odd 2
+#define R_TEST_MODE__timer__timer__off 0
+#define R_TEST_MODE__cache_test__cache_test__normal 0
+#define R_TEST_MODE__cache_test__cache_test__test 1
+#define R_TEST_MODE__tag_test__tag_test__normal 0
+#define R_TEST_MODE__tag_test__tag_test__test 1
+#define R_TEST_MODE__cache_enable__cache_enable__disable 0
+#define R_TEST_MODE__cache_enable__cache_enable__enable 1
+
+#endif
+
+/*
+ * R_TIMER01_DATA
+ * - type: RO
+ * - addr: 0xb0000022
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+#define R_TIMER01_DATA__ADDR (REG_TYPECAST_UWORD 0xb0000022)
+#define R_TIMER01_DATA__SVAL REG_SVAL_SHADOW
+#define R_TIMER01_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_TIMER01_DATA__TYPECAST REG_TYPECAST_UWORD
+#define R_TIMER01_DATA__TYPE (REG_UWORD)
+#define R_TIMER01_DATA__GET REG_GET_RO
+#define R_TIMER01_DATA__IGET REG_IGET_RO
+#define R_TIMER01_DATA__SET REG_SET_RO
+#define R_TIMER01_DATA__ISET REG_ISET_RO
+#define R_TIMER01_DATA__SET_VAL REG_SET_VAL_RO
+#define R_TIMER01_DATA__EQL REG_EQL_RO
+#define R_TIMER01_DATA__IEQL REG_IEQL_RO
+#define R_TIMER01_DATA__RD REG_RD_RO
+#define R_TIMER01_DATA__IRD REG_IRD_RO
+#define R_TIMER01_DATA__WR REG_WR_RO
+#define R_TIMER01_DATA__IWR REG_IWR_RO
+
+#define R_TIMER01_DATA__READ(addr) \
+ (*(addr))
+
+#define R_TIMER01_DATA__count__count__MASK 0x0000ffffU
+
+#define R_TIMER01_DATA__count__MAX 0xffff
+
+#define R_TIMER01_DATA__count__MIN 0
+
+#define R_TIMER01_DATA__count__BITNR 0
+
+#define R_TIMER01_DATA__count__count__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_TIMER0_DATA
+ * - type: RO
+ * - addr: 0xb0000022
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+#define R_TIMER0_DATA__ADDR (REG_TYPECAST_BYTE 0xb0000022)
+#define R_TIMER0_DATA__SVAL REG_SVAL_SHADOW
+#define R_TIMER0_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_TIMER0_DATA__TYPECAST REG_TYPECAST_BYTE
+#define R_TIMER0_DATA__TYPE (REG_BYTE)
+#define R_TIMER0_DATA__GET REG_GET_RO
+#define R_TIMER0_DATA__IGET REG_IGET_RO
+#define R_TIMER0_DATA__SET REG_SET_RO
+#define R_TIMER0_DATA__ISET REG_ISET_RO
+#define R_TIMER0_DATA__SET_VAL REG_SET_VAL_RO
+#define R_TIMER0_DATA__EQL REG_EQL_RO
+#define R_TIMER0_DATA__IEQL REG_IEQL_RO
+#define R_TIMER0_DATA__RD REG_RD_RO
+#define R_TIMER0_DATA__IRD REG_IRD_RO
+#define R_TIMER0_DATA__WR REG_WR_RO
+#define R_TIMER0_DATA__IWR REG_IWR_RO
+
+#define R_TIMER0_DATA__READ(addr) \
+ (*(addr))
+
+#define R_TIMER0_DATA__count__count__MASK 0x000000ffU
+
+#define R_TIMER0_DATA__count__MAX 0xff
+
+#define R_TIMER0_DATA__count__MIN 0
+
+#define R_TIMER0_DATA__count__BITNR 0
+
+#define R_TIMER0_DATA__count__count__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_TIMER1_DATA
+ * - type: RO
+ * - addr: 0xb0000023
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+#define R_TIMER1_DATA__ADDR (REG_TYPECAST_BYTE 0xb0000023)
+#define R_TIMER1_DATA__SVAL REG_SVAL_SHADOW
+#define R_TIMER1_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_TIMER1_DATA__TYPECAST REG_TYPECAST_BYTE
+#define R_TIMER1_DATA__TYPE (REG_BYTE)
+#define R_TIMER1_DATA__GET REG_GET_RO
+#define R_TIMER1_DATA__IGET REG_IGET_RO
+#define R_TIMER1_DATA__SET REG_SET_RO
+#define R_TIMER1_DATA__ISET REG_ISET_RO
+#define R_TIMER1_DATA__SET_VAL REG_SET_VAL_RO
+#define R_TIMER1_DATA__EQL REG_EQL_RO
+#define R_TIMER1_DATA__IEQL REG_IEQL_RO
+#define R_TIMER1_DATA__RD REG_RD_RO
+#define R_TIMER1_DATA__IRD REG_IRD_RO
+#define R_TIMER1_DATA__WR REG_WR_RO
+#define R_TIMER1_DATA__IWR REG_IWR_RO
+
+#define R_TIMER1_DATA__READ(addr) \
+ (*(addr))
+
+#define R_TIMER1_DATA__count__count__MASK 0x000000ffU
+
+#define R_TIMER1_DATA__count__MAX 0xff
+
+#define R_TIMER1_DATA__count__MIN 0
+
+#define R_TIMER1_DATA__count__BITNR 0
+
+#define R_TIMER1_DATA__count__count__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_TIMER_CTRL
+ * - type: WO
+ * - addr: 0xb0000020
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+#define R_TIMER_CTRL__ADDR (REG_TYPECAST_UDWORD 0xb0000020)
+
+#ifndef REG_NO_SHADOW
+#define R_TIMER_CTRL__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_TIMER_CTRL + 0))
+#define R_TIMER_CTRL__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_TIMER_CTRL + 0))
+#else /* REG_NO_SHADOW */
+#define R_TIMER_CTRL__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_TIMER_CTRL__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_TIMER_CTRL__STYPECAST REG_STYPECAST_UDWORD
+#define R_TIMER_CTRL__SVAL REG_SVAL_SHADOW
+#define R_TIMER_CTRL__SVAL_I REG_SVAL_I_SHADOW
+#define R_TIMER_CTRL__TYPECAST REG_TYPECAST_UDWORD
+#define R_TIMER_CTRL__TYPE (REG_UDWORD)
+#define R_TIMER_CTRL__GET REG_GET_WO
+#define R_TIMER_CTRL__IGET REG_IGET_WO
+#define R_TIMER_CTRL__SET REG_SET_WO
+#define R_TIMER_CTRL__ISET REG_ISET_WO
+#define R_TIMER_CTRL__SET_VAL REG_SET_VAL_WO
+#define R_TIMER_CTRL__EQL REG_EQL_WO
+#define R_TIMER_CTRL__IEQL REG_IEQL_WO
+#define R_TIMER_CTRL__RD REG_RD_WO
+#define R_TIMER_CTRL__IRD REG_IRD_WO
+#define R_TIMER_CTRL__WR REG_WR_WO
+#define R_TIMER_CTRL__IWR REG_IWR_WO
+
+#define R_TIMER_CTRL__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_TIMER_CTRL__timerdiv1__timerdiv1__MASK 0xff000000U
+#define R_TIMER_CTRL__timerdiv0__timerdiv0__MASK 0x00ff0000U
+#define R_TIMER_CTRL__presc_timer1__presc_timer1__MASK 0x00008000U
+#define R_TIMER_CTRL__i1__i1__MASK 0x00004000U
+#define R_TIMER_CTRL__tm1__tm1__MASK 0x00003000U
+#define R_TIMER_CTRL__clksel1__clksel1__MASK 0x00000f00U
+#define R_TIMER_CTRL__presc_ext__presc_ext__MASK 0x00000080U
+#define R_TIMER_CTRL__i0__i0__MASK 0x00000040U
+#define R_TIMER_CTRL__tm0__tm0__MASK 0x00000030U
+#define R_TIMER_CTRL__clksel0__clksel0__MASK 0x0000000fU
+
+#define R_TIMER_CTRL__timerdiv1__MAX 0xff
+#define R_TIMER_CTRL__timerdiv0__MAX 0xff
+#define R_TIMER_CTRL__presc_timer1__MAX 0x1
+#define R_TIMER_CTRL__i1__MAX 0x1
+#define R_TIMER_CTRL__tm1__MAX 0x3
+#define R_TIMER_CTRL__clksel1__MAX 0xf
+#define R_TIMER_CTRL__presc_ext__MAX 0x1
+#define R_TIMER_CTRL__i0__MAX 0x1
+#define R_TIMER_CTRL__tm0__MAX 0x3
+#define R_TIMER_CTRL__clksel0__MAX 0xf
+
+#define R_TIMER_CTRL__timerdiv1__MIN 0
+#define R_TIMER_CTRL__timerdiv0__MIN 0
+#define R_TIMER_CTRL__presc_timer1__MIN 0
+#define R_TIMER_CTRL__i1__MIN 0
+#define R_TIMER_CTRL__tm1__MIN 0
+#define R_TIMER_CTRL__clksel1__MIN 0
+#define R_TIMER_CTRL__presc_ext__MIN 0
+#define R_TIMER_CTRL__i0__MIN 0
+#define R_TIMER_CTRL__tm0__MIN 0
+#define R_TIMER_CTRL__clksel0__MIN 0
+
+#define R_TIMER_CTRL__timerdiv1__BITNR 24
+#define R_TIMER_CTRL__timerdiv0__BITNR 16
+#define R_TIMER_CTRL__presc_timer1__BITNR 15
+#define R_TIMER_CTRL__i1__BITNR 14
+#define R_TIMER_CTRL__tm1__BITNR 12
+#define R_TIMER_CTRL__clksel1__BITNR 8
+#define R_TIMER_CTRL__presc_ext__BITNR 7
+#define R_TIMER_CTRL__i0__BITNR 6
+#define R_TIMER_CTRL__tm0__BITNR 4
+#define R_TIMER_CTRL__clksel0__BITNR 0
+
+#define R_TIMER_CTRL__timerdiv1__timerdiv1__VAL REG_VAL_VAL
+#define R_TIMER_CTRL__timerdiv0__timerdiv0__VAL REG_VAL_VAL
+#define R_TIMER_CTRL__presc_timer1__presc_timer1__VAL REG_VAL_ENUM
+#define R_TIMER_CTRL__i1__i1__VAL REG_VAL_ENUM
+#define R_TIMER_CTRL__tm1__tm1__VAL REG_VAL_ENUM
+#define R_TIMER_CTRL__clksel1__clksel1__VAL REG_VAL_ENUM
+#define R_TIMER_CTRL__presc_ext__presc_ext__VAL REG_VAL_ENUM
+#define R_TIMER_CTRL__i0__i0__VAL REG_VAL_ENUM
+#define R_TIMER_CTRL__tm0__tm0__VAL REG_VAL_ENUM
+#define R_TIMER_CTRL__clksel0__clksel0__VAL REG_VAL_ENUM
+
+#define R_TIMER_CTRL__presc_timer1__presc_timer1__normal 0
+#define R_TIMER_CTRL__presc_timer1__presc_timer1__prescale 1
+#define R_TIMER_CTRL__i1__i1__clr 1
+#define R_TIMER_CTRL__i1__i1__nop 0
+#define R_TIMER_CTRL__tm1__tm1__freeze 1
+#define R_TIMER_CTRL__tm1__tm1__run 2
+#define R_TIMER_CTRL__tm1__tm1__stop_ld 0
+#define R_TIMER_CTRL__clksel1__clksel1__c115k2Hz 9
+#define R_TIMER_CTRL__clksel1__clksel1__c1200Hz 2
+#define R_TIMER_CTRL__clksel1__clksel1__c1843k2Hz 13
+#define R_TIMER_CTRL__clksel1__clksel1__c19k2Hz 6
+#define R_TIMER_CTRL__clksel1__clksel1__c230k4Hz 10
+#define R_TIMER_CTRL__clksel1__clksel1__c2400Hz 3
+#define R_TIMER_CTRL__clksel1__clksel1__c300Hz 0
+#define R_TIMER_CTRL__clksel1__clksel1__c38k4Hz 7
+#define R_TIMER_CTRL__clksel1__clksel1__c460k8Hz 11
+#define R_TIMER_CTRL__clksel1__clksel1__c4800Hz 4
+#define R_TIMER_CTRL__clksel1__clksel1__c57k6Hz 8
+#define R_TIMER_CTRL__clksel1__clksel1__c600Hz 1
+#define R_TIMER_CTRL__clksel1__clksel1__c6250kHz 14
+#define R_TIMER_CTRL__clksel1__clksel1__c921k6Hz 12
+#define R_TIMER_CTRL__clksel1__clksel1__c9600Hz 5
+#define R_TIMER_CTRL__clksel1__clksel1__cascade0 15
+#define R_TIMER_CTRL__presc_ext__presc_ext__external 1
+#define R_TIMER_CTRL__presc_ext__presc_ext__prescale 0
+#define R_TIMER_CTRL__i0__i0__clr 1
+#define R_TIMER_CTRL__i0__i0__nop 0
+#define R_TIMER_CTRL__tm0__tm0__freeze 1
+#define R_TIMER_CTRL__tm0__tm0__run 2
+#define R_TIMER_CTRL__tm0__tm0__stop_ld 0
+#define R_TIMER_CTRL__clksel0__clksel0__c115k2Hz 9
+#define R_TIMER_CTRL__clksel0__clksel0__c1200Hz 2
+#define R_TIMER_CTRL__clksel0__clksel0__c1843k2Hz 13
+#define R_TIMER_CTRL__clksel0__clksel0__c19k2Hz 6
+#define R_TIMER_CTRL__clksel0__clksel0__c230k4Hz 10
+#define R_TIMER_CTRL__clksel0__clksel0__c2400Hz 3
+#define R_TIMER_CTRL__clksel0__clksel0__c300Hz 0
+#define R_TIMER_CTRL__clksel0__clksel0__c38k4Hz 7
+#define R_TIMER_CTRL__clksel0__clksel0__c460k8Hz 11
+#define R_TIMER_CTRL__clksel0__clksel0__c4800Hz 4
+#define R_TIMER_CTRL__clksel0__clksel0__c57k6Hz 8
+#define R_TIMER_CTRL__clksel0__clksel0__c600Hz 1
+#define R_TIMER_CTRL__clksel0__clksel0__c6250kHz 14
+#define R_TIMER_CTRL__clksel0__clksel0__c921k6Hz 12
+#define R_TIMER_CTRL__clksel0__clksel0__c9600Hz 5
+#define R_TIMER_CTRL__clksel0__clksel0__flexible 15
+
+#endif
+
+/*
+ * R_TIMER_DATA
+ * - type: RO
+ * - addr: 0xb0000020
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+#define R_TIMER_DATA__ADDR (REG_TYPECAST_UDWORD 0xb0000020)
+#define R_TIMER_DATA__SVAL REG_SVAL_SHADOW
+#define R_TIMER_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_TIMER_DATA__TYPECAST REG_TYPECAST_UDWORD
+#define R_TIMER_DATA__TYPE (REG_UDWORD)
+#define R_TIMER_DATA__GET REG_GET_RO
+#define R_TIMER_DATA__IGET REG_IGET_RO
+#define R_TIMER_DATA__SET REG_SET_RO
+#define R_TIMER_DATA__ISET REG_ISET_RO
+#define R_TIMER_DATA__SET_VAL REG_SET_VAL_RO
+#define R_TIMER_DATA__EQL REG_EQL_RO
+#define R_TIMER_DATA__IEQL REG_IEQL_RO
+#define R_TIMER_DATA__RD REG_RD_RO
+#define R_TIMER_DATA__IRD REG_IRD_RO
+#define R_TIMER_DATA__WR REG_WR_RO
+#define R_TIMER_DATA__IWR REG_IWR_RO
+
+#define R_TIMER_DATA__READ(addr) \
+ (*(addr))
+
+#define R_TIMER_DATA__timer1__timer1__MASK 0xff000000U
+#define R_TIMER_DATA__timer0__timer0__MASK 0x00ff0000U
+#define R_TIMER_DATA__clkdiv_high__clkdiv_high__MASK 0x0000ff00U
+#define R_TIMER_DATA__clkdiv_low__clkdiv_low__MASK 0x000000ffU
+
+#define R_TIMER_DATA__timer1__MAX 0xff
+#define R_TIMER_DATA__timer0__MAX 0xff
+#define R_TIMER_DATA__clkdiv_high__MAX 0xff
+#define R_TIMER_DATA__clkdiv_low__MAX 0xff
+
+#define R_TIMER_DATA__timer1__MIN 0
+#define R_TIMER_DATA__timer0__MIN 0
+#define R_TIMER_DATA__clkdiv_high__MIN 0
+#define R_TIMER_DATA__clkdiv_low__MIN 0
+
+#define R_TIMER_DATA__timer1__BITNR 24
+#define R_TIMER_DATA__timer0__BITNR 16
+#define R_TIMER_DATA__clkdiv_high__BITNR 8
+#define R_TIMER_DATA__clkdiv_low__BITNR 0
+
+#define R_TIMER_DATA__timer1__timer1__VAL REG_VAL_VAL
+#define R_TIMER_DATA__timer0__timer0__VAL REG_VAL_VAL
+#define R_TIMER_DATA__clkdiv_high__clkdiv_high__VAL REG_VAL_VAL
+#define R_TIMER_DATA__clkdiv_low__clkdiv_low__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_TIMER_PRESCALE
+ * - type: WO
+ * - addr: 0xb00000f0
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+#define R_TIMER_PRESCALE__ADDR (REG_TYPECAST_UWORD 0xb00000f0)
+
+#ifndef REG_NO_SHADOW
+#define R_TIMER_PRESCALE__SADDR (REG_STYPECAST_UWORD (reg_shadow__hwregs.R_CLOCK_PRESCALE + 0))
+#define R_TIMER_PRESCALE__IADDR (REG_STYPECAST_UWORD (reg_initiated__hwregs.R_CLOCK_PRESCALE + 0))
+#else /* REG_NO_SHADOW */
+#define R_TIMER_PRESCALE__SADDR (REG_STYPECAST_UWORD (®_shadow__hwregs))
+#define R_TIMER_PRESCALE__IADDR (REG_STYPECAST_UWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_TIMER_PRESCALE__STYPECAST REG_STYPECAST_UWORD
+#define R_TIMER_PRESCALE__SVAL REG_SVAL_SHADOW
+#define R_TIMER_PRESCALE__SVAL_I REG_SVAL_I_SHADOW
+#define R_TIMER_PRESCALE__TYPECAST REG_TYPECAST_UWORD
+#define R_TIMER_PRESCALE__TYPE (REG_UWORD)
+#define R_TIMER_PRESCALE__GET REG_GET_WO
+#define R_TIMER_PRESCALE__IGET REG_IGET_WO
+#define R_TIMER_PRESCALE__SET REG_SET_WO
+#define R_TIMER_PRESCALE__ISET REG_ISET_WO
+#define R_TIMER_PRESCALE__SET_VAL REG_SET_VAL_WO
+#define R_TIMER_PRESCALE__EQL REG_EQL_WO
+#define R_TIMER_PRESCALE__IEQL REG_IEQL_WO
+#define R_TIMER_PRESCALE__RD REG_RD_WO
+#define R_TIMER_PRESCALE__IRD REG_IRD_WO
+#define R_TIMER_PRESCALE__WR REG_WR_WO
+#define R_TIMER_PRESCALE__IWR REG_IWR_WO
+
+#define R_TIMER_PRESCALE__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_TIMER_PRESCALE__tim_presc__tim_presc__MASK 0x0000ffffU
+
+#define R_TIMER_PRESCALE__tim_presc__MAX 0xffff
+
+#define R_TIMER_PRESCALE__tim_presc__MIN 0
+
+#define R_TIMER_PRESCALE__tim_presc__BITNR 0
+
+#define R_TIMER_PRESCALE__tim_presc__tim_presc__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_TIM_PRESC_STATUS
+ * - type: RO
+ * - addr: 0xb00000f0
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+#define R_TIM_PRESC_STATUS__ADDR (REG_TYPECAST_UWORD 0xb00000f0)
+#define R_TIM_PRESC_STATUS__SVAL REG_SVAL_SHADOW
+#define R_TIM_PRESC_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_TIM_PRESC_STATUS__TYPECAST REG_TYPECAST_UWORD
+#define R_TIM_PRESC_STATUS__TYPE (REG_UWORD)
+#define R_TIM_PRESC_STATUS__GET REG_GET_RO
+#define R_TIM_PRESC_STATUS__IGET REG_IGET_RO
+#define R_TIM_PRESC_STATUS__SET REG_SET_RO
+#define R_TIM_PRESC_STATUS__ISET REG_ISET_RO
+#define R_TIM_PRESC_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_TIM_PRESC_STATUS__EQL REG_EQL_RO
+#define R_TIM_PRESC_STATUS__IEQL REG_IEQL_RO
+#define R_TIM_PRESC_STATUS__RD REG_RD_RO
+#define R_TIM_PRESC_STATUS__IRD REG_IRD_RO
+#define R_TIM_PRESC_STATUS__WR REG_WR_RO
+#define R_TIM_PRESC_STATUS__IWR REG_IWR_RO
+
+#define R_TIM_PRESC_STATUS__READ(addr) \
+ (*(addr))
+
+#define R_TIM_PRESC_STATUS__tim_status__tim_status__MASK 0x0000ffffU
+
+#define R_TIM_PRESC_STATUS__tim_status__MAX 0xffff
+
+#define R_TIM_PRESC_STATUS__tim_status__MIN 0
+
+#define R_TIM_PRESC_STATUS__tim_status__BITNR 0
+
+#define R_TIM_PRESC_STATUS__tim_status__tim_status__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_TLB_HI
+ * - type: RW
+ * - addr: 0xb000025c
+ * - group: MMU registers
+ */
+
+#if USE_GROUP__MMU_registers
+
+#define R_TLB_HI__ADDR (REG_TYPECAST_UDWORD 0xb000025c)
+#define R_TLB_HI__SVAL REG_SVAL_SHADOW
+#define R_TLB_HI__SVAL_I REG_SVAL_I_SHADOW
+#define R_TLB_HI__TYPECAST REG_TYPECAST_UDWORD
+#define R_TLB_HI__TYPE (REG_UDWORD)
+#define R_TLB_HI__GET REG_GET_RW
+#define R_TLB_HI__IGET REG_IGET_RW
+#define R_TLB_HI__SET REG_SET_RW
+#define R_TLB_HI__ISET REG_ISET_RW
+#define R_TLB_HI__SET_VAL REG_SET_VAL_RW
+#define R_TLB_HI__EQL REG_EQL_RW
+#define R_TLB_HI__IEQL REG_IEQL_RW
+#define R_TLB_HI__RD REG_RD_RW
+#define R_TLB_HI__IRD REG_IRD_RW
+#define R_TLB_HI__WR REG_WR_RW
+#define R_TLB_HI__IWR REG_IWR_RW
+
+#define R_TLB_HI__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_TLB_HI__READ(addr) \
+ (*(addr))
+
+#define R_TLB_HI__vpn__vpn__MASK 0xffffe000U
+#define R_TLB_HI__page_id__page_id__MASK 0x0000003fU
+
+#define R_TLB_HI__vpn__MAX 0x7ffff
+#define R_TLB_HI__page_id__MAX 63
+
+#define R_TLB_HI__vpn__MIN 0
+#define R_TLB_HI__page_id__MIN 0
+
+#define R_TLB_HI__vpn__BITNR 13
+#define R_TLB_HI__page_id__BITNR 0
+
+#define R_TLB_HI__vpn__vpn__VAL REG_VAL_VAL
+#define R_TLB_HI__page_id__page_id__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_TLB_LO
+ * - type: RW
+ * - addr: 0xb0000258
+ * - group: MMU registers
+ */
+
+#if USE_GROUP__MMU_registers
+
+#define R_TLB_LO__ADDR (REG_TYPECAST_UDWORD 0xb0000258)
+#define R_TLB_LO__SVAL REG_SVAL_SHADOW
+#define R_TLB_LO__SVAL_I REG_SVAL_I_SHADOW
+#define R_TLB_LO__TYPECAST REG_TYPECAST_UDWORD
+#define R_TLB_LO__TYPE (REG_UDWORD)
+#define R_TLB_LO__GET REG_GET_RW
+#define R_TLB_LO__IGET REG_IGET_RW
+#define R_TLB_LO__SET REG_SET_RW
+#define R_TLB_LO__ISET REG_ISET_RW
+#define R_TLB_LO__SET_VAL REG_SET_VAL_RW
+#define R_TLB_LO__EQL REG_EQL_RW
+#define R_TLB_LO__IEQL REG_IEQL_RW
+#define R_TLB_LO__RD REG_RD_RW
+#define R_TLB_LO__IRD REG_IRD_RW
+#define R_TLB_LO__WR REG_WR_RW
+#define R_TLB_LO__IWR REG_IWR_RW
+
+#define R_TLB_LO__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_TLB_LO__READ(addr) \
+ (*(addr))
+
+#define R_TLB_LO__pfn__pfn__MASK 0xffffe000U
+#define R_TLB_LO__global__global__MASK 0x00000008U
+#define R_TLB_LO__valid__valid__MASK 0x00000004U
+#define R_TLB_LO__kernel__kernel__MASK 0x00000002U
+#define R_TLB_LO__we__we__MASK 0x00000001U
+
+#define R_TLB_LO__pfn__MAX 0x7ffff
+#define R_TLB_LO__global__MAX 0x1
+#define R_TLB_LO__valid__MAX 0x1
+#define R_TLB_LO__kernel__MAX 0x1
+#define R_TLB_LO__we__MAX 0x1
+
+#define R_TLB_LO__pfn__MIN 0
+#define R_TLB_LO__global__MIN 0
+#define R_TLB_LO__valid__MIN 0
+#define R_TLB_LO__kernel__MIN 0
+#define R_TLB_LO__we__MIN 0
+
+#define R_TLB_LO__pfn__BITNR 13
+#define R_TLB_LO__global__BITNR 3
+#define R_TLB_LO__valid__BITNR 2
+#define R_TLB_LO__kernel__BITNR 1
+#define R_TLB_LO__we__BITNR 0
+
+#define R_TLB_LO__pfn__pfn__VAL REG_VAL_VAL
+#define R_TLB_LO__global__global__VAL REG_VAL_ENUM
+#define R_TLB_LO__valid__valid__VAL REG_VAL_ENUM
+#define R_TLB_LO__kernel__kernel__VAL REG_VAL_ENUM
+#define R_TLB_LO__we__we__VAL REG_VAL_ENUM
+
+#define R_TLB_LO__global__global__no 0
+#define R_TLB_LO__global__global__yes 1
+#define R_TLB_LO__valid__valid__no 0
+#define R_TLB_LO__valid__valid__yes 1
+#define R_TLB_LO__kernel__kernel__no 0
+#define R_TLB_LO__kernel__kernel__yes 1
+#define R_TLB_LO__we__we__no 0
+#define R_TLB_LO__we__we__yes 1
+
+#endif
+
+/*
+ * R_TLB_SELECT
+ * - type: RW
+ * - addr: 0xb0000254
+ * - group: MMU registers
+ */
+
+#if USE_GROUP__MMU_registers
+
+#define R_TLB_SELECT__ADDR (REG_TYPECAST_BYTE 0xb0000254)
+#define R_TLB_SELECT__SVAL REG_SVAL_SHADOW
+#define R_TLB_SELECT__SVAL_I REG_SVAL_I_SHADOW
+#define R_TLB_SELECT__TYPECAST REG_TYPECAST_BYTE
+#define R_TLB_SELECT__TYPE (REG_BYTE)
+#define R_TLB_SELECT__GET REG_GET_RW
+#define R_TLB_SELECT__IGET REG_IGET_RW
+#define R_TLB_SELECT__SET REG_SET_RW
+#define R_TLB_SELECT__ISET REG_ISET_RW
+#define R_TLB_SELECT__SET_VAL REG_SET_VAL_RW
+#define R_TLB_SELECT__EQL REG_EQL_RW
+#define R_TLB_SELECT__IEQL REG_IEQL_RW
+#define R_TLB_SELECT__RD REG_RD_RW
+#define R_TLB_SELECT__IRD REG_IRD_RW
+#define R_TLB_SELECT__WR REG_WR_RW
+#define R_TLB_SELECT__IWR REG_IWR_RW
+
+#define R_TLB_SELECT__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_TLB_SELECT__READ(addr) \
+ (*(addr))
+
+#define R_TLB_SELECT__index__index__MASK 0x0000003fU
+
+#define R_TLB_SELECT__index__MAX 63
+
+#define R_TLB_SELECT__index__MIN 0
+
+#define R_TLB_SELECT__index__BITNR 0
+
+#define R_TLB_SELECT__index__index__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_TR_COUNTERS
+ * - type: RO
+ * - addr: 0xb00000a8
+ * - group: Network interface registers
+ */
+
+#if USE_GROUP__Network_interface_registers
+
+#define R_TR_COUNTERS__ADDR (REG_TYPECAST_UDWORD 0xb00000a8)
+#define R_TR_COUNTERS__SVAL REG_SVAL_SHADOW
+#define R_TR_COUNTERS__SVAL_I REG_SVAL_I_SHADOW
+#define R_TR_COUNTERS__TYPECAST REG_TYPECAST_UDWORD
+#define R_TR_COUNTERS__TYPE (REG_UDWORD)
+#define R_TR_COUNTERS__GET REG_GET_RO
+#define R_TR_COUNTERS__IGET REG_IGET_RO
+#define R_TR_COUNTERS__SET REG_SET_RO
+#define R_TR_COUNTERS__ISET REG_ISET_RO
+#define R_TR_COUNTERS__SET_VAL REG_SET_VAL_RO
+#define R_TR_COUNTERS__EQL REG_EQL_RO
+#define R_TR_COUNTERS__IEQL REG_IEQL_RO
+#define R_TR_COUNTERS__RD REG_RD_RO
+#define R_TR_COUNTERS__IRD REG_IRD_RO
+#define R_TR_COUNTERS__WR REG_WR_RO
+#define R_TR_COUNTERS__IWR REG_IWR_RO
+
+#define R_TR_COUNTERS__READ(addr) \
+ (*(addr))
+
+#define R_TR_COUNTERS__deferred__deferred__MASK 0xff000000U
+#define R_TR_COUNTERS__late_col__late_col__MASK 0x00ff0000U
+#define R_TR_COUNTERS__multiple_col__multiple_col__MASK 0x0000ff00U
+#define R_TR_COUNTERS__single_col__single_col__MASK 0x000000ffU
+
+#define R_TR_COUNTERS__deferred__MAX 0xff
+#define R_TR_COUNTERS__late_col__MAX 0xff
+#define R_TR_COUNTERS__multiple_col__MAX 0xff
+#define R_TR_COUNTERS__single_col__MAX 0xff
+
+#define R_TR_COUNTERS__deferred__MIN 0
+#define R_TR_COUNTERS__late_col__MIN 0
+#define R_TR_COUNTERS__multiple_col__MIN 0
+#define R_TR_COUNTERS__single_col__MIN 0
+
+#define R_TR_COUNTERS__deferred__BITNR 24
+#define R_TR_COUNTERS__late_col__BITNR 16
+#define R_TR_COUNTERS__multiple_col__BITNR 8
+#define R_TR_COUNTERS__single_col__BITNR 0
+
+#define R_TR_COUNTERS__deferred__deferred__VAL REG_VAL_VAL
+#define R_TR_COUNTERS__late_col__late_col__VAL REG_VAL_VAL
+#define R_TR_COUNTERS__multiple_col__multiple_col__VAL REG_VAL_VAL
+#define R_TR_COUNTERS__single_col__single_col__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_USB_COMMAND
+ * - type: RW
+ * - addr: 0xb0000201
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_COMMAND__ADDR (REG_TYPECAST_BYTE 0xb0000201)
+#define R_USB_COMMAND__SVAL REG_SVAL_SHADOW
+#define R_USB_COMMAND__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_COMMAND__TYPECAST REG_TYPECAST_BYTE
+#define R_USB_COMMAND__TYPE (REG_BYTE)
+#define R_USB_COMMAND__GET REG_GET_RW
+#define R_USB_COMMAND__IGET REG_IGET_RW
+#define R_USB_COMMAND__SET REG_SET_RW
+#define R_USB_COMMAND__ISET REG_ISET_RW
+#define R_USB_COMMAND__SET_VAL REG_SET_VAL_RW
+#define R_USB_COMMAND__EQL REG_EQL_RW
+#define R_USB_COMMAND__IEQL REG_IEQL_RW
+#define R_USB_COMMAND__RD REG_RD_RW
+#define R_USB_COMMAND__IRD REG_IRD_RW
+#define R_USB_COMMAND__WR REG_WR_RW
+#define R_USB_COMMAND__IWR REG_IWR_RW
+
+#define R_USB_COMMAND__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_USB_COMMAND__READ(addr) \
+ (*(addr))
+
+#define R_USB_COMMAND__port_sel__port_sel__MASK 0x000000c0U
+#define R_USB_COMMAND__port_cmd__port_cmd__MASK 0x00000030U
+#define R_USB_COMMAND__busy__busy__MASK 0x00000008U
+#define R_USB_COMMAND__ctrl_cmd__ctrl_cmd__MASK 0x00000007U
+
+#define R_USB_COMMAND__port_sel__MAX 0x3
+#define R_USB_COMMAND__port_cmd__MAX 0x3
+#define R_USB_COMMAND__busy__MAX 0x1
+#define R_USB_COMMAND__ctrl_cmd__MAX 0x7
+
+#define R_USB_COMMAND__port_sel__MIN 0
+#define R_USB_COMMAND__port_cmd__MIN 0
+#define R_USB_COMMAND__busy__MIN 0
+#define R_USB_COMMAND__ctrl_cmd__MIN 0
+
+#define R_USB_COMMAND__port_sel__BITNR 6
+#define R_USB_COMMAND__port_cmd__BITNR 4
+#define R_USB_COMMAND__busy__BITNR 3
+#define R_USB_COMMAND__ctrl_cmd__BITNR 0
+
+#define R_USB_COMMAND__port_sel__port_sel__VAL REG_VAL_ENUM
+#define R_USB_COMMAND__port_cmd__port_cmd__VAL REG_VAL_ENUM
+#define R_USB_COMMAND__busy__busy__VAL REG_VAL_ENUM
+#define R_USB_COMMAND__ctrl_cmd__ctrl_cmd__VAL REG_VAL_ENUM
+
+#define R_USB_COMMAND__port_sel__port_sel__both 3
+#define R_USB_COMMAND__port_sel__port_sel__nop 0
+#define R_USB_COMMAND__port_sel__port_sel__port1 1
+#define R_USB_COMMAND__port_sel__port_sel__port2 2
+#define R_USB_COMMAND__port_cmd__port_cmd__disable 1
+#define R_USB_COMMAND__port_cmd__port_cmd__reset 0
+#define R_USB_COMMAND__port_cmd__port_cmd__resume 3
+#define R_USB_COMMAND__port_cmd__port_cmd__suspend 2
+#define R_USB_COMMAND__busy__busy__no 0
+#define R_USB_COMMAND__busy__busy__yes 1
+#define R_USB_COMMAND__ctrl_cmd__ctrl_cmd__deconfig 2
+#define R_USB_COMMAND__ctrl_cmd__ctrl_cmd__dev_config 4
+#define R_USB_COMMAND__ctrl_cmd__ctrl_cmd__host_config 3
+#define R_USB_COMMAND__ctrl_cmd__ctrl_cmd__host_nop 5
+#define R_USB_COMMAND__ctrl_cmd__ctrl_cmd__host_run 6
+#define R_USB_COMMAND__ctrl_cmd__ctrl_cmd__host_stop 7
+#define R_USB_COMMAND__ctrl_cmd__ctrl_cmd__nop 0
+#define R_USB_COMMAND__ctrl_cmd__ctrl_cmd__reset 1
+
+#endif
+
+/*
+ * R_USB_COMMAND_DEV
+ * - type: RW
+ * - addr: 0xb0000201
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_COMMAND_DEV__ADDR (REG_TYPECAST_BYTE 0xb0000201)
+#define R_USB_COMMAND_DEV__SVAL REG_SVAL_SHADOW
+#define R_USB_COMMAND_DEV__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_COMMAND_DEV__TYPECAST REG_TYPECAST_BYTE
+#define R_USB_COMMAND_DEV__TYPE (REG_BYTE)
+#define R_USB_COMMAND_DEV__GET REG_GET_RW
+#define R_USB_COMMAND_DEV__IGET REG_IGET_RW
+#define R_USB_COMMAND_DEV__SET REG_SET_RW
+#define R_USB_COMMAND_DEV__ISET REG_ISET_RW
+#define R_USB_COMMAND_DEV__SET_VAL REG_SET_VAL_RW
+#define R_USB_COMMAND_DEV__EQL REG_EQL_RW
+#define R_USB_COMMAND_DEV__IEQL REG_IEQL_RW
+#define R_USB_COMMAND_DEV__RD REG_RD_RW
+#define R_USB_COMMAND_DEV__IRD REG_IRD_RW
+#define R_USB_COMMAND_DEV__WR REG_WR_RW
+#define R_USB_COMMAND_DEV__IWR REG_IWR_RW
+
+#define R_USB_COMMAND_DEV__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_USB_COMMAND_DEV__READ(addr) \
+ (*(addr))
+
+#define R_USB_COMMAND_DEV__port_sel__port_sel__MASK 0x000000c0U
+#define R_USB_COMMAND_DEV__port_cmd__port_cmd__MASK 0x00000030U
+#define R_USB_COMMAND_DEV__busy__busy__MASK 0x00000008U
+#define R_USB_COMMAND_DEV__ctrl_cmd__ctrl_cmd__MASK 0x00000007U
+
+#define R_USB_COMMAND_DEV__port_sel__MAX 0x3
+#define R_USB_COMMAND_DEV__port_cmd__MAX 0x3
+#define R_USB_COMMAND_DEV__busy__MAX 0x1
+#define R_USB_COMMAND_DEV__ctrl_cmd__MAX 0x7
+
+#define R_USB_COMMAND_DEV__port_sel__MIN 0
+#define R_USB_COMMAND_DEV__port_cmd__MIN 0
+#define R_USB_COMMAND_DEV__busy__MIN 0
+#define R_USB_COMMAND_DEV__ctrl_cmd__MIN 0
+
+#define R_USB_COMMAND_DEV__port_sel__BITNR 6
+#define R_USB_COMMAND_DEV__port_cmd__BITNR 4
+#define R_USB_COMMAND_DEV__busy__BITNR 3
+#define R_USB_COMMAND_DEV__ctrl_cmd__BITNR 0
+
+#define R_USB_COMMAND_DEV__port_sel__port_sel__VAL REG_VAL_ENUM
+#define R_USB_COMMAND_DEV__port_cmd__port_cmd__VAL REG_VAL_ENUM
+#define R_USB_COMMAND_DEV__busy__busy__VAL REG_VAL_ENUM
+#define R_USB_COMMAND_DEV__ctrl_cmd__ctrl_cmd__VAL REG_VAL_ENUM
+
+#define R_USB_COMMAND_DEV__port_sel__port_sel__any 3
+#define R_USB_COMMAND_DEV__port_sel__port_sel__dummy1 1
+#define R_USB_COMMAND_DEV__port_sel__port_sel__dummy2 2
+#define R_USB_COMMAND_DEV__port_sel__port_sel__nop 0
+#define R_USB_COMMAND_DEV__port_cmd__port_cmd__active 0
+#define R_USB_COMMAND_DEV__port_cmd__port_cmd__nop 2
+#define R_USB_COMMAND_DEV__port_cmd__port_cmd__passive 1
+#define R_USB_COMMAND_DEV__port_cmd__port_cmd__wakeup 3
+#define R_USB_COMMAND_DEV__busy__busy__no 0
+#define R_USB_COMMAND_DEV__busy__busy__yes 1
+#define R_USB_COMMAND_DEV__ctrl_cmd__ctrl_cmd__deconfig 2
+#define R_USB_COMMAND_DEV__ctrl_cmd__ctrl_cmd__dev_config 4
+#define R_USB_COMMAND_DEV__ctrl_cmd__ctrl_cmd__dev_nop 1
+#define R_USB_COMMAND_DEV__ctrl_cmd__ctrl_cmd__dev_nop2 5
+#define R_USB_COMMAND_DEV__ctrl_cmd__ctrl_cmd__dev_nop3 6
+#define R_USB_COMMAND_DEV__ctrl_cmd__ctrl_cmd__dev_nop4 7
+#define R_USB_COMMAND_DEV__ctrl_cmd__ctrl_cmd__host_config 3
+#define R_USB_COMMAND_DEV__ctrl_cmd__ctrl_cmd__nop 0
+
+#endif
+
+/*
+ * R_USB_EPID_ATTN
+ * - type: RO
+ * - addr: 0xb0000224
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_EPID_ATTN__ADDR (REG_TYPECAST_UDWORD 0xb0000224)
+#define R_USB_EPID_ATTN__SVAL REG_SVAL_SHADOW
+#define R_USB_EPID_ATTN__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_EPID_ATTN__TYPECAST REG_TYPECAST_UDWORD
+#define R_USB_EPID_ATTN__TYPE (REG_UDWORD)
+#define R_USB_EPID_ATTN__GET REG_GET_RO
+#define R_USB_EPID_ATTN__IGET REG_IGET_RO
+#define R_USB_EPID_ATTN__SET REG_SET_RO
+#define R_USB_EPID_ATTN__ISET REG_ISET_RO
+#define R_USB_EPID_ATTN__SET_VAL REG_SET_VAL_RO
+#define R_USB_EPID_ATTN__EQL REG_EQL_RO
+#define R_USB_EPID_ATTN__IEQL REG_IEQL_RO
+#define R_USB_EPID_ATTN__RD REG_RD_RO
+#define R_USB_EPID_ATTN__IRD REG_IRD_RO
+#define R_USB_EPID_ATTN__WR REG_WR_RO
+#define R_USB_EPID_ATTN__IWR REG_IWR_RO
+
+#define R_USB_EPID_ATTN__READ(addr) \
+ (*(addr))
+
+#define R_USB_EPID_ATTN__value__value__MASK 0xffffffffU
+
+#define R_USB_EPID_ATTN__value__MAX 0xffffffff
+
+#define R_USB_EPID_ATTN__value__MIN 0
+
+#define R_USB_EPID_ATTN__value__BITNR 0
+
+#define R_USB_EPID_ATTN__value__value__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_USB_EPT_DATA
+ * - type: RW
+ * - addr: 0xb000021c
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_EPT_DATA__ADDR (REG_TYPECAST_UDWORD 0xb000021c)
+#define R_USB_EPT_DATA__SVAL REG_SVAL_SHADOW
+#define R_USB_EPT_DATA__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_EPT_DATA__TYPECAST REG_TYPECAST_UDWORD
+#define R_USB_EPT_DATA__TYPE (REG_UDWORD)
+#define R_USB_EPT_DATA__GET REG_GET_RW
+#define R_USB_EPT_DATA__IGET REG_IGET_RW
+#define R_USB_EPT_DATA__SET REG_SET_RW
+#define R_USB_EPT_DATA__ISET REG_ISET_RW
+#define R_USB_EPT_DATA__SET_VAL REG_SET_VAL_RW
+#define R_USB_EPT_DATA__EQL REG_EQL_RW
+#define R_USB_EPT_DATA__IEQL REG_IEQL_RW
+#define R_USB_EPT_DATA__RD REG_RD_RW
+#define R_USB_EPT_DATA__IRD REG_IRD_RW
+#define R_USB_EPT_DATA__WR REG_WR_RW
+#define R_USB_EPT_DATA__IWR REG_IWR_RW
+
+#define R_USB_EPT_DATA__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_USB_EPT_DATA__READ(addr) \
+ (*(addr))
+
+#define R_USB_EPT_DATA__valid__valid__MASK 0x80000000U
+#define R_USB_EPT_DATA__hold__hold__MASK 0x40000000U
+#define R_USB_EPT_DATA__error_count_in__error_count_in__MASK 0x30000000U
+#define R_USB_EPT_DATA__t_in__t_in__MASK 0x08000000U
+#define R_USB_EPT_DATA__low_speed__low_speed__MASK 0x04000000U
+#define R_USB_EPT_DATA__port__port__MASK 0x03000000U
+#define R_USB_EPT_DATA__error_code__error_code__MASK 0x00c00000U
+#define R_USB_EPT_DATA__t_out__t_out__MASK 0x00200000U
+#define R_USB_EPT_DATA__error_count_out__error_count_out__MASK 0x00180000U
+#define R_USB_EPT_DATA__max_len__max_len__MASK 0x0003f800U
+#define R_USB_EPT_DATA__ep__ep__MASK 0x00000780U
+#define R_USB_EPT_DATA__dev__dev__MASK 0x0000007fU
+
+#define R_USB_EPT_DATA__valid__MAX 0x1
+#define R_USB_EPT_DATA__hold__MAX 0x1
+#define R_USB_EPT_DATA__error_count_in__MAX 3
+#define R_USB_EPT_DATA__t_in__MAX 1
+#define R_USB_EPT_DATA__low_speed__MAX 0x1
+#define R_USB_EPT_DATA__port__MAX 0x3
+#define R_USB_EPT_DATA__error_code__MAX 0x3
+#define R_USB_EPT_DATA__t_out__MAX 1
+#define R_USB_EPT_DATA__error_count_out__MAX 3
+#define R_USB_EPT_DATA__max_len__MAX 64
+#define R_USB_EPT_DATA__ep__MAX 0xf
+#define R_USB_EPT_DATA__dev__MAX 0x7f
+
+#define R_USB_EPT_DATA__valid__MIN 0
+#define R_USB_EPT_DATA__hold__MIN 0
+#define R_USB_EPT_DATA__error_count_in__MIN 0
+#define R_USB_EPT_DATA__t_in__MIN 0
+#define R_USB_EPT_DATA__low_speed__MIN 0
+#define R_USB_EPT_DATA__port__MIN 0
+#define R_USB_EPT_DATA__error_code__MIN 0
+#define R_USB_EPT_DATA__t_out__MIN 0
+#define R_USB_EPT_DATA__error_count_out__MIN 0
+#define R_USB_EPT_DATA__max_len__MIN 1
+#define R_USB_EPT_DATA__ep__MIN 0
+#define R_USB_EPT_DATA__dev__MIN 0
+
+#define R_USB_EPT_DATA__valid__BITNR 31
+#define R_USB_EPT_DATA__hold__BITNR 30
+#define R_USB_EPT_DATA__error_count_in__BITNR 28
+#define R_USB_EPT_DATA__t_in__BITNR 27
+#define R_USB_EPT_DATA__low_speed__BITNR 26
+#define R_USB_EPT_DATA__port__BITNR 24
+#define R_USB_EPT_DATA__error_code__BITNR 22
+#define R_USB_EPT_DATA__t_out__BITNR 21
+#define R_USB_EPT_DATA__error_count_out__BITNR 19
+#define R_USB_EPT_DATA__max_len__BITNR 11
+#define R_USB_EPT_DATA__ep__BITNR 7
+#define R_USB_EPT_DATA__dev__BITNR 0
+
+#define R_USB_EPT_DATA__valid__valid__VAL REG_VAL_ENUM
+#define R_USB_EPT_DATA__hold__hold__VAL REG_VAL_ENUM
+#define R_USB_EPT_DATA__error_count_in__error_count_in__VAL REG_VAL_VAL
+#define R_USB_EPT_DATA__t_in__t_in__VAL REG_VAL_VAL
+#define R_USB_EPT_DATA__low_speed__low_speed__VAL REG_VAL_ENUM
+#define R_USB_EPT_DATA__port__port__VAL REG_VAL_ENUM
+#define R_USB_EPT_DATA__error_code__error_code__VAL REG_VAL_ENUM
+#define R_USB_EPT_DATA__t_out__t_out__VAL REG_VAL_VAL
+#define R_USB_EPT_DATA__error_count_out__error_count_out__VAL REG_VAL_VAL
+#define R_USB_EPT_DATA__max_len__max_len__VAL REG_VAL_VAL
+#define R_USB_EPT_DATA__ep__ep__VAL REG_VAL_VAL
+#define R_USB_EPT_DATA__dev__dev__VAL REG_VAL_VAL
+
+#define R_USB_EPT_DATA__valid__valid__no 0
+#define R_USB_EPT_DATA__valid__valid__yes 1
+#define R_USB_EPT_DATA__hold__hold__no 0
+#define R_USB_EPT_DATA__hold__hold__yes 1
+#define R_USB_EPT_DATA__low_speed__low_speed__no 0
+#define R_USB_EPT_DATA__low_speed__low_speed__yes 1
+#define R_USB_EPT_DATA__port__port__any 0
+#define R_USB_EPT_DATA__port__port__p1 1
+#define R_USB_EPT_DATA__port__port__p2 2
+#define R_USB_EPT_DATA__port__port__undef 3
+#define R_USB_EPT_DATA__error_code__error_code__buffer_error 3
+#define R_USB_EPT_DATA__error_code__error_code__bus_error 2
+#define R_USB_EPT_DATA__error_code__error_code__no_error 0
+#define R_USB_EPT_DATA__error_code__error_code__stall 1
+
+#endif
+
+/*
+ * R_USB_EPT_DATA_DEV
+ * - type: RW
+ * - addr: 0xb000021c
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_EPT_DATA_DEV__ADDR (REG_TYPECAST_UDWORD 0xb000021c)
+#define R_USB_EPT_DATA_DEV__SVAL REG_SVAL_SHADOW
+#define R_USB_EPT_DATA_DEV__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_EPT_DATA_DEV__TYPECAST REG_TYPECAST_UDWORD
+#define R_USB_EPT_DATA_DEV__TYPE (REG_UDWORD)
+#define R_USB_EPT_DATA_DEV__GET REG_GET_RW
+#define R_USB_EPT_DATA_DEV__IGET REG_IGET_RW
+#define R_USB_EPT_DATA_DEV__SET REG_SET_RW
+#define R_USB_EPT_DATA_DEV__ISET REG_ISET_RW
+#define R_USB_EPT_DATA_DEV__SET_VAL REG_SET_VAL_RW
+#define R_USB_EPT_DATA_DEV__EQL REG_EQL_RW
+#define R_USB_EPT_DATA_DEV__IEQL REG_IEQL_RW
+#define R_USB_EPT_DATA_DEV__RD REG_RD_RW
+#define R_USB_EPT_DATA_DEV__IRD REG_IRD_RW
+#define R_USB_EPT_DATA_DEV__WR REG_WR_RW
+#define R_USB_EPT_DATA_DEV__IWR REG_IWR_RW
+
+#define R_USB_EPT_DATA_DEV__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_USB_EPT_DATA_DEV__READ(addr) \
+ (*(addr))
+
+#define R_USB_EPT_DATA_DEV__valid__valid__MASK 0x80000000U
+#define R_USB_EPT_DATA_DEV__hold__hold__MASK 0x40000000U
+#define R_USB_EPT_DATA_DEV__stall__stall__MASK 0x20000000U
+#define R_USB_EPT_DATA_DEV__iso_resp__iso_resp__MASK 0x10000000U
+#define R_USB_EPT_DATA_DEV__ctrl__ctrl__MASK 0x08000000U
+#define R_USB_EPT_DATA_DEV__iso__iso__MASK 0x04000000U
+#define R_USB_EPT_DATA_DEV__port__port__MASK 0x03000000U
+#define R_USB_EPT_DATA_DEV__control_phase__control_phase__MASK 0x00400000U
+#define R_USB_EPT_DATA_DEV__t__t__MASK 0x00200000U
+#define R_USB_EPT_DATA_DEV__max_len__max_len__MASK 0x001ff800U
+#define R_USB_EPT_DATA_DEV__ep__ep__MASK 0x00000780U
+#define R_USB_EPT_DATA_DEV__dev__dev__MASK 0x0000007fU
+
+#define R_USB_EPT_DATA_DEV__valid__MAX 0x1
+#define R_USB_EPT_DATA_DEV__hold__MAX 0x1
+#define R_USB_EPT_DATA_DEV__stall__MAX 0x1
+#define R_USB_EPT_DATA_DEV__iso_resp__MAX 0x1
+#define R_USB_EPT_DATA_DEV__ctrl__MAX 0x1
+#define R_USB_EPT_DATA_DEV__iso__MAX 0x1
+#define R_USB_EPT_DATA_DEV__port__MAX 0x3
+#define R_USB_EPT_DATA_DEV__control_phase__MAX 0x1
+#define R_USB_EPT_DATA_DEV__t__MAX 1
+#define R_USB_EPT_DATA_DEV__max_len__MAX 1023
+#define R_USB_EPT_DATA_DEV__ep__MAX 15
+#define R_USB_EPT_DATA_DEV__dev__MAX 127
+
+#define R_USB_EPT_DATA_DEV__valid__MIN 0
+#define R_USB_EPT_DATA_DEV__hold__MIN 0
+#define R_USB_EPT_DATA_DEV__stall__MIN 0
+#define R_USB_EPT_DATA_DEV__iso_resp__MIN 0
+#define R_USB_EPT_DATA_DEV__ctrl__MIN 0
+#define R_USB_EPT_DATA_DEV__iso__MIN 0
+#define R_USB_EPT_DATA_DEV__port__MIN 0
+#define R_USB_EPT_DATA_DEV__control_phase__MIN 0
+#define R_USB_EPT_DATA_DEV__t__MIN 0
+#define R_USB_EPT_DATA_DEV__max_len__MIN 1
+#define R_USB_EPT_DATA_DEV__ep__MIN 0
+#define R_USB_EPT_DATA_DEV__dev__MIN 0
+
+#define R_USB_EPT_DATA_DEV__valid__BITNR 31
+#define R_USB_EPT_DATA_DEV__hold__BITNR 30
+#define R_USB_EPT_DATA_DEV__stall__BITNR 29
+#define R_USB_EPT_DATA_DEV__iso_resp__BITNR 28
+#define R_USB_EPT_DATA_DEV__ctrl__BITNR 27
+#define R_USB_EPT_DATA_DEV__iso__BITNR 26
+#define R_USB_EPT_DATA_DEV__port__BITNR 24
+#define R_USB_EPT_DATA_DEV__control_phase__BITNR 22
+#define R_USB_EPT_DATA_DEV__t__BITNR 21
+#define R_USB_EPT_DATA_DEV__max_len__BITNR 11
+#define R_USB_EPT_DATA_DEV__ep__BITNR 7
+#define R_USB_EPT_DATA_DEV__dev__BITNR 0
+
+#define R_USB_EPT_DATA_DEV__valid__valid__VAL REG_VAL_ENUM
+#define R_USB_EPT_DATA_DEV__hold__hold__VAL REG_VAL_ENUM
+#define R_USB_EPT_DATA_DEV__stall__stall__VAL REG_VAL_ENUM
+#define R_USB_EPT_DATA_DEV__iso_resp__iso_resp__VAL REG_VAL_ENUM
+#define R_USB_EPT_DATA_DEV__ctrl__ctrl__VAL REG_VAL_ENUM
+#define R_USB_EPT_DATA_DEV__iso__iso__VAL REG_VAL_ENUM
+#define R_USB_EPT_DATA_DEV__port__port__VAL REG_VAL_VAL
+#define R_USB_EPT_DATA_DEV__control_phase__control_phase__VAL REG_VAL_VAL
+#define R_USB_EPT_DATA_DEV__t__t__VAL REG_VAL_VAL
+#define R_USB_EPT_DATA_DEV__max_len__max_len__VAL REG_VAL_VAL
+#define R_USB_EPT_DATA_DEV__ep__ep__VAL REG_VAL_VAL
+#define R_USB_EPT_DATA_DEV__dev__dev__VAL REG_VAL_VAL
+
+#define R_USB_EPT_DATA_DEV__valid__valid__no 0
+#define R_USB_EPT_DATA_DEV__valid__valid__yes 1
+#define R_USB_EPT_DATA_DEV__hold__hold__no 0
+#define R_USB_EPT_DATA_DEV__hold__hold__yes 1
+#define R_USB_EPT_DATA_DEV__stall__stall__no 0
+#define R_USB_EPT_DATA_DEV__stall__stall__yes 1
+#define R_USB_EPT_DATA_DEV__iso_resp__iso_resp__quiet 0
+#define R_USB_EPT_DATA_DEV__iso_resp__iso_resp__yes 1
+#define R_USB_EPT_DATA_DEV__ctrl__ctrl__no 0
+#define R_USB_EPT_DATA_DEV__ctrl__ctrl__yes 1
+#define R_USB_EPT_DATA_DEV__iso__iso__no 0
+#define R_USB_EPT_DATA_DEV__iso__iso__yes 1
+
+#endif
+
+/*
+ * R_USB_EPT_DATA_ISO
+ * - type: RW
+ * - addr: 0xb000021c
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_EPT_DATA_ISO__ADDR (REG_TYPECAST_UDWORD 0xb000021c)
+#define R_USB_EPT_DATA_ISO__SVAL REG_SVAL_SHADOW
+#define R_USB_EPT_DATA_ISO__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_EPT_DATA_ISO__TYPECAST REG_TYPECAST_UDWORD
+#define R_USB_EPT_DATA_ISO__TYPE (REG_UDWORD)
+#define R_USB_EPT_DATA_ISO__GET REG_GET_RW
+#define R_USB_EPT_DATA_ISO__IGET REG_IGET_RW
+#define R_USB_EPT_DATA_ISO__SET REG_SET_RW
+#define R_USB_EPT_DATA_ISO__ISET REG_ISET_RW
+#define R_USB_EPT_DATA_ISO__SET_VAL REG_SET_VAL_RW
+#define R_USB_EPT_DATA_ISO__EQL REG_EQL_RW
+#define R_USB_EPT_DATA_ISO__IEQL REG_IEQL_RW
+#define R_USB_EPT_DATA_ISO__RD REG_RD_RW
+#define R_USB_EPT_DATA_ISO__IRD REG_IRD_RW
+#define R_USB_EPT_DATA_ISO__WR REG_WR_RW
+#define R_USB_EPT_DATA_ISO__IWR REG_IWR_RW
+
+#define R_USB_EPT_DATA_ISO__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_USB_EPT_DATA_ISO__READ(addr) \
+ (*(addr))
+
+#define R_USB_EPT_DATA_ISO__valid__valid__MASK 0x80000000U
+#define R_USB_EPT_DATA_ISO__port__port__MASK 0x03000000U
+#define R_USB_EPT_DATA_ISO__error_code__error_code__MASK 0x00c00000U
+#define R_USB_EPT_DATA_ISO__max_len__max_len__MASK 0x001ff800U
+#define R_USB_EPT_DATA_ISO__ep__ep__MASK 0x00000780U
+#define R_USB_EPT_DATA_ISO__dev__dev__MASK 0x0000007fU
+
+#define R_USB_EPT_DATA_ISO__valid__MAX 0x1
+#define R_USB_EPT_DATA_ISO__port__MAX 0x3
+#define R_USB_EPT_DATA_ISO__error_code__MAX 0x3
+#define R_USB_EPT_DATA_ISO__max_len__MAX 1023
+#define R_USB_EPT_DATA_ISO__ep__MAX 0xf
+#define R_USB_EPT_DATA_ISO__dev__MAX 0x7f
+
+#define R_USB_EPT_DATA_ISO__valid__MIN 0
+#define R_USB_EPT_DATA_ISO__port__MIN 0
+#define R_USB_EPT_DATA_ISO__error_code__MIN 0
+#define R_USB_EPT_DATA_ISO__max_len__MIN 1
+#define R_USB_EPT_DATA_ISO__ep__MIN 0
+#define R_USB_EPT_DATA_ISO__dev__MIN 0
+
+#define R_USB_EPT_DATA_ISO__valid__BITNR 31
+#define R_USB_EPT_DATA_ISO__port__BITNR 24
+#define R_USB_EPT_DATA_ISO__error_code__BITNR 22
+#define R_USB_EPT_DATA_ISO__max_len__BITNR 11
+#define R_USB_EPT_DATA_ISO__ep__BITNR 7
+#define R_USB_EPT_DATA_ISO__dev__BITNR 0
+
+#define R_USB_EPT_DATA_ISO__valid__valid__VAL REG_VAL_ENUM
+#define R_USB_EPT_DATA_ISO__port__port__VAL REG_VAL_ENUM
+#define R_USB_EPT_DATA_ISO__error_code__error_code__VAL REG_VAL_ENUM
+#define R_USB_EPT_DATA_ISO__max_len__max_len__VAL REG_VAL_VAL
+#define R_USB_EPT_DATA_ISO__ep__ep__VAL REG_VAL_VAL
+#define R_USB_EPT_DATA_ISO__dev__dev__VAL REG_VAL_VAL
+
+#define R_USB_EPT_DATA_ISO__valid__valid__no 0
+#define R_USB_EPT_DATA_ISO__valid__valid__yes 1
+#define R_USB_EPT_DATA_ISO__port__port__any 0
+#define R_USB_EPT_DATA_ISO__port__port__p1 1
+#define R_USB_EPT_DATA_ISO__port__port__p2 2
+#define R_USB_EPT_DATA_ISO__port__port__undef 3
+#define R_USB_EPT_DATA_ISO__error_code__error_code__TBD3 3
+#define R_USB_EPT_DATA_ISO__error_code__error_code__bus_error 2
+#define R_USB_EPT_DATA_ISO__error_code__error_code__no_error 0
+#define R_USB_EPT_DATA_ISO__error_code__error_code__stall 1
+
+#endif
+
+/*
+ * R_USB_EPT_INDEX
+ * - type: RW
+ * - addr: 0xb0000208
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_EPT_INDEX__ADDR (REG_TYPECAST_BYTE 0xb0000208)
+#define R_USB_EPT_INDEX__SVAL REG_SVAL_SHADOW
+#define R_USB_EPT_INDEX__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_EPT_INDEX__TYPECAST REG_TYPECAST_BYTE
+#define R_USB_EPT_INDEX__TYPE (REG_BYTE)
+#define R_USB_EPT_INDEX__GET REG_GET_RW
+#define R_USB_EPT_INDEX__IGET REG_IGET_RW
+#define R_USB_EPT_INDEX__SET REG_SET_RW
+#define R_USB_EPT_INDEX__ISET REG_ISET_RW
+#define R_USB_EPT_INDEX__SET_VAL REG_SET_VAL_RW
+#define R_USB_EPT_INDEX__EQL REG_EQL_RW
+#define R_USB_EPT_INDEX__IEQL REG_IEQL_RW
+#define R_USB_EPT_INDEX__RD REG_RD_RW
+#define R_USB_EPT_INDEX__IRD REG_IRD_RW
+#define R_USB_EPT_INDEX__WR REG_WR_RW
+#define R_USB_EPT_INDEX__IWR REG_IWR_RW
+
+#define R_USB_EPT_INDEX__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_USB_EPT_INDEX__READ(addr) \
+ (*(addr))
+
+#define R_USB_EPT_INDEX__value__value__MASK 0x0000001fU
+
+#define R_USB_EPT_INDEX__value__MAX 31
+
+#define R_USB_EPT_INDEX__value__MIN 0
+
+#define R_USB_EPT_INDEX__value__BITNR 0
+
+#define R_USB_EPT_INDEX__value__value__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_USB_FM_INTERVAL
+ * - type: RW
+ * - addr: 0xb0000210
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_FM_INTERVAL__ADDR (REG_TYPECAST_UWORD 0xb0000210)
+#define R_USB_FM_INTERVAL__SVAL REG_SVAL_SHADOW
+#define R_USB_FM_INTERVAL__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_FM_INTERVAL__TYPECAST REG_TYPECAST_UWORD
+#define R_USB_FM_INTERVAL__TYPE (REG_UWORD)
+#define R_USB_FM_INTERVAL__GET REG_GET_RW
+#define R_USB_FM_INTERVAL__IGET REG_IGET_RW
+#define R_USB_FM_INTERVAL__SET REG_SET_RW
+#define R_USB_FM_INTERVAL__ISET REG_ISET_RW
+#define R_USB_FM_INTERVAL__SET_VAL REG_SET_VAL_RW
+#define R_USB_FM_INTERVAL__EQL REG_EQL_RW
+#define R_USB_FM_INTERVAL__IEQL REG_IEQL_RW
+#define R_USB_FM_INTERVAL__RD REG_RD_RW
+#define R_USB_FM_INTERVAL__IRD REG_IRD_RW
+#define R_USB_FM_INTERVAL__WR REG_WR_RW
+#define R_USB_FM_INTERVAL__IWR REG_IWR_RW
+
+#define R_USB_FM_INTERVAL__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_USB_FM_INTERVAL__READ(addr) \
+ (*(addr))
+
+#define R_USB_FM_INTERVAL__fixed__fixed__MASK 0x00003fc0U
+#define R_USB_FM_INTERVAL__adj__adj__MASK 0x0000003fU
+
+#define R_USB_FM_INTERVAL__fixed__MAX 0xff
+#define R_USB_FM_INTERVAL__adj__MAX 63
+
+#define R_USB_FM_INTERVAL__fixed__MIN 0
+#define R_USB_FM_INTERVAL__adj__MIN 0
+
+#define R_USB_FM_INTERVAL__fixed__BITNR 6
+#define R_USB_FM_INTERVAL__adj__BITNR 0
+
+#define R_USB_FM_INTERVAL__fixed__fixed__VAL REG_VAL_VAL
+#define R_USB_FM_INTERVAL__adj__adj__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_USB_FM_NUMBER
+ * - type: RW
+ * - addr: 0xb000020c
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_FM_NUMBER__ADDR (REG_TYPECAST_UDWORD 0xb000020c)
+#define R_USB_FM_NUMBER__SVAL REG_SVAL_SHADOW
+#define R_USB_FM_NUMBER__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_FM_NUMBER__TYPECAST REG_TYPECAST_UDWORD
+#define R_USB_FM_NUMBER__TYPE (REG_UDWORD)
+#define R_USB_FM_NUMBER__GET REG_GET_RW
+#define R_USB_FM_NUMBER__IGET REG_IGET_RW
+#define R_USB_FM_NUMBER__SET REG_SET_RW
+#define R_USB_FM_NUMBER__ISET REG_ISET_RW
+#define R_USB_FM_NUMBER__SET_VAL REG_SET_VAL_RW
+#define R_USB_FM_NUMBER__EQL REG_EQL_RW
+#define R_USB_FM_NUMBER__IEQL REG_IEQL_RW
+#define R_USB_FM_NUMBER__RD REG_RD_RW
+#define R_USB_FM_NUMBER__IRD REG_IRD_RW
+#define R_USB_FM_NUMBER__WR REG_WR_RW
+#define R_USB_FM_NUMBER__IWR REG_IWR_RW
+
+#define R_USB_FM_NUMBER__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_USB_FM_NUMBER__READ(addr) \
+ (*(addr))
+
+#define R_USB_FM_NUMBER__value__value__MASK 0xffffffffU
+
+#define R_USB_FM_NUMBER__value__MAX 0xffffffff
+
+#define R_USB_FM_NUMBER__value__MIN 0
+
+#define R_USB_FM_NUMBER__value__BITNR 0
+
+#define R_USB_FM_NUMBER__value__value__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_USB_FM_NUMBER_DEV
+ * - type: RW
+ * - addr: 0xb000020c
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_FM_NUMBER_DEV__ADDR (REG_TYPECAST_UDWORD 0xb000020c)
+#define R_USB_FM_NUMBER_DEV__SVAL REG_SVAL_SHADOW
+#define R_USB_FM_NUMBER_DEV__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_FM_NUMBER_DEV__TYPECAST REG_TYPECAST_UDWORD
+#define R_USB_FM_NUMBER_DEV__TYPE (REG_UDWORD)
+#define R_USB_FM_NUMBER_DEV__GET REG_GET_RW
+#define R_USB_FM_NUMBER_DEV__IGET REG_IGET_RW
+#define R_USB_FM_NUMBER_DEV__SET REG_SET_RW
+#define R_USB_FM_NUMBER_DEV__ISET REG_ISET_RW
+#define R_USB_FM_NUMBER_DEV__SET_VAL REG_SET_VAL_RW
+#define R_USB_FM_NUMBER_DEV__EQL REG_EQL_RW
+#define R_USB_FM_NUMBER_DEV__IEQL REG_IEQL_RW
+#define R_USB_FM_NUMBER_DEV__RD REG_RD_RW
+#define R_USB_FM_NUMBER_DEV__IRD REG_IRD_RW
+#define R_USB_FM_NUMBER_DEV__WR REG_WR_RW
+#define R_USB_FM_NUMBER_DEV__IWR REG_IWR_RW
+
+#define R_USB_FM_NUMBER_DEV__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_USB_FM_NUMBER_DEV__READ(addr) \
+ (*(addr))
+
+#define R_USB_FM_NUMBER_DEV__sign__sign__MASK 0x80000000U
+#define R_USB_FM_NUMBER_DEV__deviation__deviation__MASK 0x7f000000U
+#define R_USB_FM_NUMBER_DEV__fm_number__fm_number__MASK 0x000007ffU
+
+#define R_USB_FM_NUMBER_DEV__sign__MAX 0x1
+#define R_USB_FM_NUMBER_DEV__deviation__MAX 127
+#define R_USB_FM_NUMBER_DEV__fm_number__MAX 0x7ff
+
+#define R_USB_FM_NUMBER_DEV__sign__MIN 0
+#define R_USB_FM_NUMBER_DEV__deviation__MIN 0
+#define R_USB_FM_NUMBER_DEV__fm_number__MIN 0
+
+#define R_USB_FM_NUMBER_DEV__sign__BITNR 31
+#define R_USB_FM_NUMBER_DEV__deviation__BITNR 24
+#define R_USB_FM_NUMBER_DEV__fm_number__BITNR 0
+
+#define R_USB_FM_NUMBER_DEV__sign__sign__VAL REG_VAL_ENUM
+#define R_USB_FM_NUMBER_DEV__deviation__deviation__VAL REG_VAL_VAL
+#define R_USB_FM_NUMBER_DEV__fm_number__fm_number__VAL REG_VAL_VAL
+
+#define R_USB_FM_NUMBER_DEV__sign__sign__early 0
+#define R_USB_FM_NUMBER_DEV__sign__sign__late 1
+
+#endif
+
+/*
+ * R_USB_FM_PSTART
+ * - type: RW
+ * - addr: 0xb0000214
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_FM_PSTART__ADDR (REG_TYPECAST_UWORD 0xb0000214)
+#define R_USB_FM_PSTART__SVAL REG_SVAL_SHADOW
+#define R_USB_FM_PSTART__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_FM_PSTART__TYPECAST REG_TYPECAST_UWORD
+#define R_USB_FM_PSTART__TYPE (REG_UWORD)
+#define R_USB_FM_PSTART__GET REG_GET_RW
+#define R_USB_FM_PSTART__IGET REG_IGET_RW
+#define R_USB_FM_PSTART__SET REG_SET_RW
+#define R_USB_FM_PSTART__ISET REG_ISET_RW
+#define R_USB_FM_PSTART__SET_VAL REG_SET_VAL_RW
+#define R_USB_FM_PSTART__EQL REG_EQL_RW
+#define R_USB_FM_PSTART__IEQL REG_IEQL_RW
+#define R_USB_FM_PSTART__RD REG_RD_RW
+#define R_USB_FM_PSTART__IRD REG_IRD_RW
+#define R_USB_FM_PSTART__WR REG_WR_RW
+#define R_USB_FM_PSTART__IWR REG_IWR_RW
+
+#define R_USB_FM_PSTART__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_USB_FM_PSTART__READ(addr) \
+ (*(addr))
+
+#define R_USB_FM_PSTART__value__value__MASK 0x00003fffU
+
+#define R_USB_FM_PSTART__value__MAX 0x3fff
+
+#define R_USB_FM_PSTART__value__MIN 0
+
+#define R_USB_FM_PSTART__value__BITNR 0
+
+#define R_USB_FM_PSTART__value__value__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_USB_FM_REMAINING
+ * - type: RO
+ * - addr: 0xb0000212
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_FM_REMAINING__ADDR (REG_TYPECAST_UWORD 0xb0000212)
+#define R_USB_FM_REMAINING__SVAL REG_SVAL_SHADOW
+#define R_USB_FM_REMAINING__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_FM_REMAINING__TYPECAST REG_TYPECAST_UWORD
+#define R_USB_FM_REMAINING__TYPE (REG_UWORD)
+#define R_USB_FM_REMAINING__GET REG_GET_RO
+#define R_USB_FM_REMAINING__IGET REG_IGET_RO
+#define R_USB_FM_REMAINING__SET REG_SET_RO
+#define R_USB_FM_REMAINING__ISET REG_ISET_RO
+#define R_USB_FM_REMAINING__SET_VAL REG_SET_VAL_RO
+#define R_USB_FM_REMAINING__EQL REG_EQL_RO
+#define R_USB_FM_REMAINING__IEQL REG_IEQL_RO
+#define R_USB_FM_REMAINING__RD REG_RD_RO
+#define R_USB_FM_REMAINING__IRD REG_IRD_RO
+#define R_USB_FM_REMAINING__WR REG_WR_RO
+#define R_USB_FM_REMAINING__IWR REG_IWR_RO
+
+#define R_USB_FM_REMAINING__READ(addr) \
+ (*(addr))
+
+#define R_USB_FM_REMAINING__value__value__MASK 0x00003fffU
+
+#define R_USB_FM_REMAINING__value__MAX 0x3fff
+
+#define R_USB_FM_REMAINING__value__MIN 0
+
+#define R_USB_FM_REMAINING__value__BITNR 0
+
+#define R_USB_FM_REMAINING__value__value__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_USB_IRQ_MASK_CLR
+ * - type: WO
+ * - addr: 0xb0000206
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_IRQ_MASK_CLR__ADDR (REG_TYPECAST_UWORD 0xb0000206)
+
+#ifndef REG_NO_SHADOW
+#define R_USB_IRQ_MASK_CLR__SADDR (REG_STYPECAST_UWORD (reg_shadow__hwregs.R_USB_IRQ_MASK_CLR + 0))
+#define R_USB_IRQ_MASK_CLR__IADDR (REG_STYPECAST_UWORD (reg_initiated__hwregs.R_USB_IRQ_MASK_CLR + 0))
+#else /* REG_NO_SHADOW */
+#define R_USB_IRQ_MASK_CLR__SADDR (REG_STYPECAST_UWORD (®_shadow__hwregs))
+#define R_USB_IRQ_MASK_CLR__IADDR (REG_STYPECAST_UWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_USB_IRQ_MASK_CLR__STYPECAST REG_STYPECAST_UWORD
+#define R_USB_IRQ_MASK_CLR__SVAL REG_SVAL_ZERO
+#define R_USB_IRQ_MASK_CLR__SVAL_I REG_SVAL_I_ZERO
+#define R_USB_IRQ_MASK_CLR__TYPECAST REG_TYPECAST_UWORD
+#define R_USB_IRQ_MASK_CLR__TYPE (REG_UWORD)
+#define R_USB_IRQ_MASK_CLR__GET REG_GET_WO
+#define R_USB_IRQ_MASK_CLR__IGET REG_IGET_WO
+#define R_USB_IRQ_MASK_CLR__SET REG_SET_WO
+#define R_USB_IRQ_MASK_CLR__ISET REG_ISET_WO
+#define R_USB_IRQ_MASK_CLR__SET_VAL REG_SET_VAL_WO
+#define R_USB_IRQ_MASK_CLR__EQL REG_EQL_WO
+#define R_USB_IRQ_MASK_CLR__IEQL REG_IEQL_WO
+#define R_USB_IRQ_MASK_CLR__RD REG_RD_WO
+#define R_USB_IRQ_MASK_CLR__IRD REG_IRD_WO
+#define R_USB_IRQ_MASK_CLR__WR REG_WR_WO
+#define R_USB_IRQ_MASK_CLR__IWR REG_IWR_WO
+
+#define R_USB_IRQ_MASK_CLR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_USB_IRQ_MASK_CLR__iso_eof__iso_eof__MASK 0x00002000U
+#define R_USB_IRQ_MASK_CLR__intr_eof__intr_eof__MASK 0x00001000U
+#define R_USB_IRQ_MASK_CLR__iso_eot__iso_eot__MASK 0x00000800U
+#define R_USB_IRQ_MASK_CLR__intr_eot__intr_eot__MASK 0x00000400U
+#define R_USB_IRQ_MASK_CLR__ctl_eot__ctl_eot__MASK 0x00000200U
+#define R_USB_IRQ_MASK_CLR__bulk_eot__bulk_eot__MASK 0x00000100U
+#define R_USB_IRQ_MASK_CLR__epid_attn__epid_attn__MASK 0x00000008U
+#define R_USB_IRQ_MASK_CLR__sof__sof__MASK 0x00000004U
+#define R_USB_IRQ_MASK_CLR__port_status__port_status__MASK 0x00000002U
+#define R_USB_IRQ_MASK_CLR__ctl_status__ctl_status__MASK 0x00000001U
+
+#define R_USB_IRQ_MASK_CLR__iso_eof__MAX 0x1
+#define R_USB_IRQ_MASK_CLR__intr_eof__MAX 0x1
+#define R_USB_IRQ_MASK_CLR__iso_eot__MAX 0x1
+#define R_USB_IRQ_MASK_CLR__intr_eot__MAX 0x1
+#define R_USB_IRQ_MASK_CLR__ctl_eot__MAX 0x1
+#define R_USB_IRQ_MASK_CLR__bulk_eot__MAX 0x1
+#define R_USB_IRQ_MASK_CLR__epid_attn__MAX 0x1
+#define R_USB_IRQ_MASK_CLR__sof__MAX 0x1
+#define R_USB_IRQ_MASK_CLR__port_status__MAX 0x1
+#define R_USB_IRQ_MASK_CLR__ctl_status__MAX 0x1
+
+#define R_USB_IRQ_MASK_CLR__iso_eof__MIN 0
+#define R_USB_IRQ_MASK_CLR__intr_eof__MIN 0
+#define R_USB_IRQ_MASK_CLR__iso_eot__MIN 0
+#define R_USB_IRQ_MASK_CLR__intr_eot__MIN 0
+#define R_USB_IRQ_MASK_CLR__ctl_eot__MIN 0
+#define R_USB_IRQ_MASK_CLR__bulk_eot__MIN 0
+#define R_USB_IRQ_MASK_CLR__epid_attn__MIN 0
+#define R_USB_IRQ_MASK_CLR__sof__MIN 0
+#define R_USB_IRQ_MASK_CLR__port_status__MIN 0
+#define R_USB_IRQ_MASK_CLR__ctl_status__MIN 0
+
+#define R_USB_IRQ_MASK_CLR__iso_eof__BITNR 13
+#define R_USB_IRQ_MASK_CLR__intr_eof__BITNR 12
+#define R_USB_IRQ_MASK_CLR__iso_eot__BITNR 11
+#define R_USB_IRQ_MASK_CLR__intr_eot__BITNR 10
+#define R_USB_IRQ_MASK_CLR__ctl_eot__BITNR 9
+#define R_USB_IRQ_MASK_CLR__bulk_eot__BITNR 8
+#define R_USB_IRQ_MASK_CLR__epid_attn__BITNR 3
+#define R_USB_IRQ_MASK_CLR__sof__BITNR 2
+#define R_USB_IRQ_MASK_CLR__port_status__BITNR 1
+#define R_USB_IRQ_MASK_CLR__ctl_status__BITNR 0
+
+#define R_USB_IRQ_MASK_CLR__iso_eof__iso_eof__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_CLR__intr_eof__intr_eof__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_CLR__iso_eot__iso_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_CLR__intr_eot__intr_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_CLR__ctl_eot__ctl_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_CLR__bulk_eot__bulk_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_CLR__epid_attn__epid_attn__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_CLR__sof__sof__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_CLR__port_status__port_status__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_CLR__ctl_status__ctl_status__VAL REG_VAL_ENUM
+
+#define R_USB_IRQ_MASK_CLR__iso_eof__iso_eof__clr 1
+#define R_USB_IRQ_MASK_CLR__iso_eof__iso_eof__nop 0
+#define R_USB_IRQ_MASK_CLR__intr_eof__intr_eof__clr 1
+#define R_USB_IRQ_MASK_CLR__intr_eof__intr_eof__nop 0
+#define R_USB_IRQ_MASK_CLR__iso_eot__iso_eot__clr 1
+#define R_USB_IRQ_MASK_CLR__iso_eot__iso_eot__nop 0
+#define R_USB_IRQ_MASK_CLR__intr_eot__intr_eot__clr 1
+#define R_USB_IRQ_MASK_CLR__intr_eot__intr_eot__nop 0
+#define R_USB_IRQ_MASK_CLR__ctl_eot__ctl_eot__clr 1
+#define R_USB_IRQ_MASK_CLR__ctl_eot__ctl_eot__nop 0
+#define R_USB_IRQ_MASK_CLR__bulk_eot__bulk_eot__clr 1
+#define R_USB_IRQ_MASK_CLR__bulk_eot__bulk_eot__nop 0
+#define R_USB_IRQ_MASK_CLR__epid_attn__epid_attn__clr 1
+#define R_USB_IRQ_MASK_CLR__epid_attn__epid_attn__nop 0
+#define R_USB_IRQ_MASK_CLR__sof__sof__clr 1
+#define R_USB_IRQ_MASK_CLR__sof__sof__nop 0
+#define R_USB_IRQ_MASK_CLR__port_status__port_status__clr 1
+#define R_USB_IRQ_MASK_CLR__port_status__port_status__nop 0
+#define R_USB_IRQ_MASK_CLR__ctl_status__ctl_status__clr 1
+#define R_USB_IRQ_MASK_CLR__ctl_status__ctl_status__nop 0
+
+#endif
+
+/*
+ * R_USB_IRQ_MASK_CLR_DEV
+ * - type: WO
+ * - addr: 0xb0000206
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_IRQ_MASK_CLR_DEV__ADDR (REG_TYPECAST_UWORD 0xb0000206)
+
+#ifndef REG_NO_SHADOW
+#define R_USB_IRQ_MASK_CLR_DEV__SADDR (REG_STYPECAST_UWORD (reg_shadow__hwregs.R_USB_IRQ_MASK_CLR + 0))
+#define R_USB_IRQ_MASK_CLR_DEV__IADDR (REG_STYPECAST_UWORD (reg_initiated__hwregs.R_USB_IRQ_MASK_CLR + 0))
+#else /* REG_NO_SHADOW */
+#define R_USB_IRQ_MASK_CLR_DEV__SADDR (REG_STYPECAST_UWORD (®_shadow__hwregs))
+#define R_USB_IRQ_MASK_CLR_DEV__IADDR (REG_STYPECAST_UWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_USB_IRQ_MASK_CLR_DEV__STYPECAST REG_STYPECAST_UWORD
+#define R_USB_IRQ_MASK_CLR_DEV__SVAL REG_SVAL_SHADOW
+#define R_USB_IRQ_MASK_CLR_DEV__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_IRQ_MASK_CLR_DEV__TYPECAST REG_TYPECAST_UWORD
+#define R_USB_IRQ_MASK_CLR_DEV__TYPE (REG_UWORD)
+#define R_USB_IRQ_MASK_CLR_DEV__GET REG_GET_WO
+#define R_USB_IRQ_MASK_CLR_DEV__IGET REG_IGET_WO
+#define R_USB_IRQ_MASK_CLR_DEV__SET REG_SET_WO
+#define R_USB_IRQ_MASK_CLR_DEV__ISET REG_ISET_WO
+#define R_USB_IRQ_MASK_CLR_DEV__SET_VAL REG_SET_VAL_WO
+#define R_USB_IRQ_MASK_CLR_DEV__EQL REG_EQL_WO
+#define R_USB_IRQ_MASK_CLR_DEV__IEQL REG_IEQL_WO
+#define R_USB_IRQ_MASK_CLR_DEV__RD REG_RD_WO
+#define R_USB_IRQ_MASK_CLR_DEV__IRD REG_IRD_WO
+#define R_USB_IRQ_MASK_CLR_DEV__WR REG_WR_WO
+#define R_USB_IRQ_MASK_CLR_DEV__IWR REG_IWR_WO
+
+#define R_USB_IRQ_MASK_CLR_DEV__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_USB_IRQ_MASK_CLR_DEV__out_eot__out_eot__MASK 0x00001000U
+#define R_USB_IRQ_MASK_CLR_DEV__ep3_in_eot__ep3_in_eot__MASK 0x00000800U
+#define R_USB_IRQ_MASK_CLR_DEV__ep2_in_eot__ep2_in_eot__MASK 0x00000400U
+#define R_USB_IRQ_MASK_CLR_DEV__ep1_in_eot__ep1_in_eot__MASK 0x00000200U
+#define R_USB_IRQ_MASK_CLR_DEV__ep0_in_eot__ep0_in_eot__MASK 0x00000100U
+#define R_USB_IRQ_MASK_CLR_DEV__epid_attn__epid_attn__MASK 0x00000008U
+#define R_USB_IRQ_MASK_CLR_DEV__sof__sof__MASK 0x00000004U
+#define R_USB_IRQ_MASK_CLR_DEV__port_status__port_status__MASK 0x00000002U
+#define R_USB_IRQ_MASK_CLR_DEV__ctl_status__ctl_status__MASK 0x00000001U
+
+#define R_USB_IRQ_MASK_CLR_DEV__out_eot__MAX 0x1
+#define R_USB_IRQ_MASK_CLR_DEV__ep3_in_eot__MAX 0x1
+#define R_USB_IRQ_MASK_CLR_DEV__ep2_in_eot__MAX 0x1
+#define R_USB_IRQ_MASK_CLR_DEV__ep1_in_eot__MAX 0x1
+#define R_USB_IRQ_MASK_CLR_DEV__ep0_in_eot__MAX 0x1
+#define R_USB_IRQ_MASK_CLR_DEV__epid_attn__MAX 0x1
+#define R_USB_IRQ_MASK_CLR_DEV__sof__MAX 0x1
+#define R_USB_IRQ_MASK_CLR_DEV__port_status__MAX 0x1
+#define R_USB_IRQ_MASK_CLR_DEV__ctl_status__MAX 0x1
+
+#define R_USB_IRQ_MASK_CLR_DEV__out_eot__MIN 0
+#define R_USB_IRQ_MASK_CLR_DEV__ep3_in_eot__MIN 0
+#define R_USB_IRQ_MASK_CLR_DEV__ep2_in_eot__MIN 0
+#define R_USB_IRQ_MASK_CLR_DEV__ep1_in_eot__MIN 0
+#define R_USB_IRQ_MASK_CLR_DEV__ep0_in_eot__MIN 0
+#define R_USB_IRQ_MASK_CLR_DEV__epid_attn__MIN 0
+#define R_USB_IRQ_MASK_CLR_DEV__sof__MIN 0
+#define R_USB_IRQ_MASK_CLR_DEV__port_status__MIN 0
+#define R_USB_IRQ_MASK_CLR_DEV__ctl_status__MIN 0
+
+#define R_USB_IRQ_MASK_CLR_DEV__out_eot__BITNR 12
+#define R_USB_IRQ_MASK_CLR_DEV__ep3_in_eot__BITNR 11
+#define R_USB_IRQ_MASK_CLR_DEV__ep2_in_eot__BITNR 10
+#define R_USB_IRQ_MASK_CLR_DEV__ep1_in_eot__BITNR 9
+#define R_USB_IRQ_MASK_CLR_DEV__ep0_in_eot__BITNR 8
+#define R_USB_IRQ_MASK_CLR_DEV__epid_attn__BITNR 3
+#define R_USB_IRQ_MASK_CLR_DEV__sof__BITNR 2
+#define R_USB_IRQ_MASK_CLR_DEV__port_status__BITNR 1
+#define R_USB_IRQ_MASK_CLR_DEV__ctl_status__BITNR 0
+
+#define R_USB_IRQ_MASK_CLR_DEV__out_eot__out_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_CLR_DEV__ep3_in_eot__ep3_in_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_CLR_DEV__ep2_in_eot__ep2_in_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_CLR_DEV__ep1_in_eot__ep1_in_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_CLR_DEV__ep0_in_eot__ep0_in_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_CLR_DEV__epid_attn__epid_attn__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_CLR_DEV__sof__sof__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_CLR_DEV__port_status__port_status__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_CLR_DEV__ctl_status__ctl_status__VAL REG_VAL_ENUM
+
+#define R_USB_IRQ_MASK_CLR_DEV__out_eot__out_eot__clr 1
+#define R_USB_IRQ_MASK_CLR_DEV__out_eot__out_eot__nop 0
+#define R_USB_IRQ_MASK_CLR_DEV__ep3_in_eot__ep3_in_eot__clr 1
+#define R_USB_IRQ_MASK_CLR_DEV__ep3_in_eot__ep3_in_eot__nop 0
+#define R_USB_IRQ_MASK_CLR_DEV__ep2_in_eot__ep2_in_eot__clr 1
+#define R_USB_IRQ_MASK_CLR_DEV__ep2_in_eot__ep2_in_eot__nop 0
+#define R_USB_IRQ_MASK_CLR_DEV__ep1_in_eot__ep1_in_eot__clr 1
+#define R_USB_IRQ_MASK_CLR_DEV__ep1_in_eot__ep1_in_eot__nop 0
+#define R_USB_IRQ_MASK_CLR_DEV__ep0_in_eot__ep0_in_eot__clr 1
+#define R_USB_IRQ_MASK_CLR_DEV__ep0_in_eot__ep0_in_eot__nop 0
+#define R_USB_IRQ_MASK_CLR_DEV__epid_attn__epid_attn__clr 1
+#define R_USB_IRQ_MASK_CLR_DEV__epid_attn__epid_attn__nop 0
+#define R_USB_IRQ_MASK_CLR_DEV__sof__sof__clr 1
+#define R_USB_IRQ_MASK_CLR_DEV__sof__sof__nop 0
+#define R_USB_IRQ_MASK_CLR_DEV__port_status__port_status__clr 1
+#define R_USB_IRQ_MASK_CLR_DEV__port_status__port_status__nop 0
+#define R_USB_IRQ_MASK_CLR_DEV__ctl_status__ctl_status__clr 1
+#define R_USB_IRQ_MASK_CLR_DEV__ctl_status__ctl_status__nop 0
+
+#endif
+
+/*
+ * R_USB_IRQ_MASK_READ
+ * - type: RO
+ * - addr: 0xb0000204
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_IRQ_MASK_READ__ADDR (REG_TYPECAST_UWORD 0xb0000204)
+#define R_USB_IRQ_MASK_READ__SVAL REG_SVAL_SHADOW
+#define R_USB_IRQ_MASK_READ__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_IRQ_MASK_READ__TYPECAST REG_TYPECAST_UWORD
+#define R_USB_IRQ_MASK_READ__TYPE (REG_UWORD)
+#define R_USB_IRQ_MASK_READ__GET REG_GET_RO
+#define R_USB_IRQ_MASK_READ__IGET REG_IGET_RO
+#define R_USB_IRQ_MASK_READ__SET REG_SET_RO
+#define R_USB_IRQ_MASK_READ__ISET REG_ISET_RO
+#define R_USB_IRQ_MASK_READ__SET_VAL REG_SET_VAL_RO
+#define R_USB_IRQ_MASK_READ__EQL REG_EQL_RO
+#define R_USB_IRQ_MASK_READ__IEQL REG_IEQL_RO
+#define R_USB_IRQ_MASK_READ__RD REG_RD_RO
+#define R_USB_IRQ_MASK_READ__IRD REG_IRD_RO
+#define R_USB_IRQ_MASK_READ__WR REG_WR_RO
+#define R_USB_IRQ_MASK_READ__IWR REG_IWR_RO
+
+#define R_USB_IRQ_MASK_READ__READ(addr) \
+ (*(addr))
+
+#define R_USB_IRQ_MASK_READ__iso_eof__iso_eof__MASK 0x00002000U
+#define R_USB_IRQ_MASK_READ__intr_eof__intr_eof__MASK 0x00001000U
+#define R_USB_IRQ_MASK_READ__iso_eot__iso_eot__MASK 0x00000800U
+#define R_USB_IRQ_MASK_READ__intr_eot__intr_eot__MASK 0x00000400U
+#define R_USB_IRQ_MASK_READ__ctl_eot__ctl_eot__MASK 0x00000200U
+#define R_USB_IRQ_MASK_READ__bulk_eot__bulk_eot__MASK 0x00000100U
+#define R_USB_IRQ_MASK_READ__epid_attn__epid_attn__MASK 0x00000008U
+#define R_USB_IRQ_MASK_READ__sof__sof__MASK 0x00000004U
+#define R_USB_IRQ_MASK_READ__port_status__port_status__MASK 0x00000002U
+#define R_USB_IRQ_MASK_READ__ctl_status__ctl_status__MASK 0x00000001U
+
+#define R_USB_IRQ_MASK_READ__iso_eof__MAX 0x1
+#define R_USB_IRQ_MASK_READ__intr_eof__MAX 0x1
+#define R_USB_IRQ_MASK_READ__iso_eot__MAX 0x1
+#define R_USB_IRQ_MASK_READ__intr_eot__MAX 0x1
+#define R_USB_IRQ_MASK_READ__ctl_eot__MAX 0x1
+#define R_USB_IRQ_MASK_READ__bulk_eot__MAX 0x1
+#define R_USB_IRQ_MASK_READ__epid_attn__MAX 0x1
+#define R_USB_IRQ_MASK_READ__sof__MAX 0x1
+#define R_USB_IRQ_MASK_READ__port_status__MAX 0x1
+#define R_USB_IRQ_MASK_READ__ctl_status__MAX 0x1
+
+#define R_USB_IRQ_MASK_READ__iso_eof__MIN 0
+#define R_USB_IRQ_MASK_READ__intr_eof__MIN 0
+#define R_USB_IRQ_MASK_READ__iso_eot__MIN 0
+#define R_USB_IRQ_MASK_READ__intr_eot__MIN 0
+#define R_USB_IRQ_MASK_READ__ctl_eot__MIN 0
+#define R_USB_IRQ_MASK_READ__bulk_eot__MIN 0
+#define R_USB_IRQ_MASK_READ__epid_attn__MIN 0
+#define R_USB_IRQ_MASK_READ__sof__MIN 0
+#define R_USB_IRQ_MASK_READ__port_status__MIN 0
+#define R_USB_IRQ_MASK_READ__ctl_status__MIN 0
+
+#define R_USB_IRQ_MASK_READ__iso_eof__BITNR 13
+#define R_USB_IRQ_MASK_READ__intr_eof__BITNR 12
+#define R_USB_IRQ_MASK_READ__iso_eot__BITNR 11
+#define R_USB_IRQ_MASK_READ__intr_eot__BITNR 10
+#define R_USB_IRQ_MASK_READ__ctl_eot__BITNR 9
+#define R_USB_IRQ_MASK_READ__bulk_eot__BITNR 8
+#define R_USB_IRQ_MASK_READ__epid_attn__BITNR 3
+#define R_USB_IRQ_MASK_READ__sof__BITNR 2
+#define R_USB_IRQ_MASK_READ__port_status__BITNR 1
+#define R_USB_IRQ_MASK_READ__ctl_status__BITNR 0
+
+#define R_USB_IRQ_MASK_READ__iso_eof__iso_eof__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_READ__intr_eof__intr_eof__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_READ__iso_eot__iso_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_READ__intr_eot__intr_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_READ__ctl_eot__ctl_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_READ__bulk_eot__bulk_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_READ__epid_attn__epid_attn__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_READ__sof__sof__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_READ__port_status__port_status__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_READ__ctl_status__ctl_status__VAL REG_VAL_ENUM
+
+#define R_USB_IRQ_MASK_READ__iso_eof__iso_eof__no_pend 0
+#define R_USB_IRQ_MASK_READ__iso_eof__iso_eof__pend 1
+#define R_USB_IRQ_MASK_READ__intr_eof__intr_eof__no_pend 0
+#define R_USB_IRQ_MASK_READ__intr_eof__intr_eof__pend 1
+#define R_USB_IRQ_MASK_READ__iso_eot__iso_eot__no_pend 0
+#define R_USB_IRQ_MASK_READ__iso_eot__iso_eot__pend 1
+#define R_USB_IRQ_MASK_READ__intr_eot__intr_eot__no_pend 0
+#define R_USB_IRQ_MASK_READ__intr_eot__intr_eot__pend 1
+#define R_USB_IRQ_MASK_READ__ctl_eot__ctl_eot__no_pend 0
+#define R_USB_IRQ_MASK_READ__ctl_eot__ctl_eot__pend 1
+#define R_USB_IRQ_MASK_READ__bulk_eot__bulk_eot__no_pend 0
+#define R_USB_IRQ_MASK_READ__bulk_eot__bulk_eot__pend 1
+#define R_USB_IRQ_MASK_READ__epid_attn__epid_attn__no_pend 0
+#define R_USB_IRQ_MASK_READ__epid_attn__epid_attn__pend 1
+#define R_USB_IRQ_MASK_READ__sof__sof__no_pend 0
+#define R_USB_IRQ_MASK_READ__sof__sof__pend 1
+#define R_USB_IRQ_MASK_READ__port_status__port_status__no_pend 0
+#define R_USB_IRQ_MASK_READ__port_status__port_status__pend 1
+#define R_USB_IRQ_MASK_READ__ctl_status__ctl_status__no_pend 0
+#define R_USB_IRQ_MASK_READ__ctl_status__ctl_status__pend 1
+
+#endif
+
+/*
+ * R_USB_IRQ_MASK_READ_DEV
+ * - type: RO
+ * - addr: 0xb0000204
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_IRQ_MASK_READ_DEV__ADDR (REG_TYPECAST_UWORD 0xb0000204)
+#define R_USB_IRQ_MASK_READ_DEV__SVAL REG_SVAL_SHADOW
+#define R_USB_IRQ_MASK_READ_DEV__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_IRQ_MASK_READ_DEV__TYPECAST REG_TYPECAST_UWORD
+#define R_USB_IRQ_MASK_READ_DEV__TYPE (REG_UWORD)
+#define R_USB_IRQ_MASK_READ_DEV__GET REG_GET_RO
+#define R_USB_IRQ_MASK_READ_DEV__IGET REG_IGET_RO
+#define R_USB_IRQ_MASK_READ_DEV__SET REG_SET_RO
+#define R_USB_IRQ_MASK_READ_DEV__ISET REG_ISET_RO
+#define R_USB_IRQ_MASK_READ_DEV__SET_VAL REG_SET_VAL_RO
+#define R_USB_IRQ_MASK_READ_DEV__EQL REG_EQL_RO
+#define R_USB_IRQ_MASK_READ_DEV__IEQL REG_IEQL_RO
+#define R_USB_IRQ_MASK_READ_DEV__RD REG_RD_RO
+#define R_USB_IRQ_MASK_READ_DEV__IRD REG_IRD_RO
+#define R_USB_IRQ_MASK_READ_DEV__WR REG_WR_RO
+#define R_USB_IRQ_MASK_READ_DEV__IWR REG_IWR_RO
+
+#define R_USB_IRQ_MASK_READ_DEV__READ(addr) \
+ (*(addr))
+
+#define R_USB_IRQ_MASK_READ_DEV__out_eot__out_eot__MASK 0x00001000U
+#define R_USB_IRQ_MASK_READ_DEV__ep3_in_eot__ep3_in_eot__MASK 0x00000800U
+#define R_USB_IRQ_MASK_READ_DEV__ep2_in_eot__ep2_in_eot__MASK 0x00000400U
+#define R_USB_IRQ_MASK_READ_DEV__ep1_in_eot__ep1_in_eot__MASK 0x00000200U
+#define R_USB_IRQ_MASK_READ_DEV__ep0_in_eot__ep0_in_eot__MASK 0x00000100U
+#define R_USB_IRQ_MASK_READ_DEV__epid_attn__epid_attn__MASK 0x00000008U
+#define R_USB_IRQ_MASK_READ_DEV__sof__sof__MASK 0x00000004U
+#define R_USB_IRQ_MASK_READ_DEV__port_status__port_status__MASK 0x00000002U
+#define R_USB_IRQ_MASK_READ_DEV__ctl_status__ctl_status__MASK 0x00000001U
+
+#define R_USB_IRQ_MASK_READ_DEV__out_eot__MAX 0x1
+#define R_USB_IRQ_MASK_READ_DEV__ep3_in_eot__MAX 0x1
+#define R_USB_IRQ_MASK_READ_DEV__ep2_in_eot__MAX 0x1
+#define R_USB_IRQ_MASK_READ_DEV__ep1_in_eot__MAX 0x1
+#define R_USB_IRQ_MASK_READ_DEV__ep0_in_eot__MAX 0x1
+#define R_USB_IRQ_MASK_READ_DEV__epid_attn__MAX 0x1
+#define R_USB_IRQ_MASK_READ_DEV__sof__MAX 0x1
+#define R_USB_IRQ_MASK_READ_DEV__port_status__MAX 0x1
+#define R_USB_IRQ_MASK_READ_DEV__ctl_status__MAX 0x1
+
+#define R_USB_IRQ_MASK_READ_DEV__out_eot__MIN 0
+#define R_USB_IRQ_MASK_READ_DEV__ep3_in_eot__MIN 0
+#define R_USB_IRQ_MASK_READ_DEV__ep2_in_eot__MIN 0
+#define R_USB_IRQ_MASK_READ_DEV__ep1_in_eot__MIN 0
+#define R_USB_IRQ_MASK_READ_DEV__ep0_in_eot__MIN 0
+#define R_USB_IRQ_MASK_READ_DEV__epid_attn__MIN 0
+#define R_USB_IRQ_MASK_READ_DEV__sof__MIN 0
+#define R_USB_IRQ_MASK_READ_DEV__port_status__MIN 0
+#define R_USB_IRQ_MASK_READ_DEV__ctl_status__MIN 0
+
+#define R_USB_IRQ_MASK_READ_DEV__out_eot__BITNR 12
+#define R_USB_IRQ_MASK_READ_DEV__ep3_in_eot__BITNR 11
+#define R_USB_IRQ_MASK_READ_DEV__ep2_in_eot__BITNR 10
+#define R_USB_IRQ_MASK_READ_DEV__ep1_in_eot__BITNR 9
+#define R_USB_IRQ_MASK_READ_DEV__ep0_in_eot__BITNR 8
+#define R_USB_IRQ_MASK_READ_DEV__epid_attn__BITNR 3
+#define R_USB_IRQ_MASK_READ_DEV__sof__BITNR 2
+#define R_USB_IRQ_MASK_READ_DEV__port_status__BITNR 1
+#define R_USB_IRQ_MASK_READ_DEV__ctl_status__BITNR 0
+
+#define R_USB_IRQ_MASK_READ_DEV__out_eot__out_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_READ_DEV__ep3_in_eot__ep3_in_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_READ_DEV__ep2_in_eot__ep2_in_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_READ_DEV__ep1_in_eot__ep1_in_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_READ_DEV__ep0_in_eot__ep0_in_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_READ_DEV__epid_attn__epid_attn__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_READ_DEV__sof__sof__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_READ_DEV__port_status__port_status__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_READ_DEV__ctl_status__ctl_status__VAL REG_VAL_ENUM
+
+#define R_USB_IRQ_MASK_READ_DEV__out_eot__out_eot__no_pend 0
+#define R_USB_IRQ_MASK_READ_DEV__out_eot__out_eot__pend 1
+#define R_USB_IRQ_MASK_READ_DEV__ep3_in_eot__ep3_in_eot__no_pend 0
+#define R_USB_IRQ_MASK_READ_DEV__ep3_in_eot__ep3_in_eot__pend 1
+#define R_USB_IRQ_MASK_READ_DEV__ep2_in_eot__ep2_in_eot__no_pend 0
+#define R_USB_IRQ_MASK_READ_DEV__ep2_in_eot__ep2_in_eot__pend 1
+#define R_USB_IRQ_MASK_READ_DEV__ep1_in_eot__ep1_in_eot__no_pend 0
+#define R_USB_IRQ_MASK_READ_DEV__ep1_in_eot__ep1_in_eot__pend 1
+#define R_USB_IRQ_MASK_READ_DEV__ep0_in_eot__ep0_in_eot__no_pend 0
+#define R_USB_IRQ_MASK_READ_DEV__ep0_in_eot__ep0_in_eot__pend 1
+#define R_USB_IRQ_MASK_READ_DEV__epid_attn__epid_attn__no_pend 0
+#define R_USB_IRQ_MASK_READ_DEV__epid_attn__epid_attn__pend 1
+#define R_USB_IRQ_MASK_READ_DEV__sof__sof__no_pend 0
+#define R_USB_IRQ_MASK_READ_DEV__sof__sof__pend 1
+#define R_USB_IRQ_MASK_READ_DEV__port_status__port_status__no_pend 0
+#define R_USB_IRQ_MASK_READ_DEV__port_status__port_status__pend 1
+#define R_USB_IRQ_MASK_READ_DEV__ctl_status__ctl_status__no_pend 0
+#define R_USB_IRQ_MASK_READ_DEV__ctl_status__ctl_status__pend 1
+
+#endif
+
+/*
+ * R_USB_IRQ_MASK_SET
+ * - type: WO
+ * - addr: 0xb0000204
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_IRQ_MASK_SET__ADDR (REG_TYPECAST_UWORD 0xb0000204)
+
+#ifndef REG_NO_SHADOW
+#define R_USB_IRQ_MASK_SET__SADDR (REG_STYPECAST_UWORD (reg_shadow__hwregs.R_USB_IRQ_MASK_SET + 0))
+#define R_USB_IRQ_MASK_SET__IADDR (REG_STYPECAST_UWORD (reg_initiated__hwregs.R_USB_IRQ_MASK_SET + 0))
+#else /* REG_NO_SHADOW */
+#define R_USB_IRQ_MASK_SET__SADDR (REG_STYPECAST_UWORD (®_shadow__hwregs))
+#define R_USB_IRQ_MASK_SET__IADDR (REG_STYPECAST_UWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_USB_IRQ_MASK_SET__STYPECAST REG_STYPECAST_UWORD
+#define R_USB_IRQ_MASK_SET__SVAL REG_SVAL_ZERO
+#define R_USB_IRQ_MASK_SET__SVAL_I REG_SVAL_I_ZERO
+#define R_USB_IRQ_MASK_SET__TYPECAST REG_TYPECAST_UWORD
+#define R_USB_IRQ_MASK_SET__TYPE (REG_UWORD)
+#define R_USB_IRQ_MASK_SET__GET REG_GET_WO
+#define R_USB_IRQ_MASK_SET__IGET REG_IGET_WO
+#define R_USB_IRQ_MASK_SET__SET REG_SET_WO
+#define R_USB_IRQ_MASK_SET__ISET REG_ISET_WO
+#define R_USB_IRQ_MASK_SET__SET_VAL REG_SET_VAL_WO
+#define R_USB_IRQ_MASK_SET__EQL REG_EQL_WO
+#define R_USB_IRQ_MASK_SET__IEQL REG_IEQL_WO
+#define R_USB_IRQ_MASK_SET__RD REG_RD_WO
+#define R_USB_IRQ_MASK_SET__IRD REG_IRD_WO
+#define R_USB_IRQ_MASK_SET__WR REG_WR_WO
+#define R_USB_IRQ_MASK_SET__IWR REG_IWR_WO
+
+#define R_USB_IRQ_MASK_SET__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_USB_IRQ_MASK_SET__iso_eof__iso_eof__MASK 0x00002000U
+#define R_USB_IRQ_MASK_SET__intr_eof__intr_eof__MASK 0x00001000U
+#define R_USB_IRQ_MASK_SET__iso_eot__iso_eot__MASK 0x00000800U
+#define R_USB_IRQ_MASK_SET__intr_eot__intr_eot__MASK 0x00000400U
+#define R_USB_IRQ_MASK_SET__ctl_eot__ctl_eot__MASK 0x00000200U
+#define R_USB_IRQ_MASK_SET__bulk_eot__bulk_eot__MASK 0x00000100U
+#define R_USB_IRQ_MASK_SET__epid_attn__epid_attn__MASK 0x00000008U
+#define R_USB_IRQ_MASK_SET__sof__sof__MASK 0x00000004U
+#define R_USB_IRQ_MASK_SET__port_status__port_status__MASK 0x00000002U
+#define R_USB_IRQ_MASK_SET__ctl_status__ctl_status__MASK 0x00000001U
+
+#define R_USB_IRQ_MASK_SET__iso_eof__MAX 0x1
+#define R_USB_IRQ_MASK_SET__intr_eof__MAX 0x1
+#define R_USB_IRQ_MASK_SET__iso_eot__MAX 0x1
+#define R_USB_IRQ_MASK_SET__intr_eot__MAX 0x1
+#define R_USB_IRQ_MASK_SET__ctl_eot__MAX 0x1
+#define R_USB_IRQ_MASK_SET__bulk_eot__MAX 0x1
+#define R_USB_IRQ_MASK_SET__epid_attn__MAX 0x1
+#define R_USB_IRQ_MASK_SET__sof__MAX 0x1
+#define R_USB_IRQ_MASK_SET__port_status__MAX 0x1
+#define R_USB_IRQ_MASK_SET__ctl_status__MAX 0x1
+
+#define R_USB_IRQ_MASK_SET__iso_eof__MIN 0
+#define R_USB_IRQ_MASK_SET__intr_eof__MIN 0
+#define R_USB_IRQ_MASK_SET__iso_eot__MIN 0
+#define R_USB_IRQ_MASK_SET__intr_eot__MIN 0
+#define R_USB_IRQ_MASK_SET__ctl_eot__MIN 0
+#define R_USB_IRQ_MASK_SET__bulk_eot__MIN 0
+#define R_USB_IRQ_MASK_SET__epid_attn__MIN 0
+#define R_USB_IRQ_MASK_SET__sof__MIN 0
+#define R_USB_IRQ_MASK_SET__port_status__MIN 0
+#define R_USB_IRQ_MASK_SET__ctl_status__MIN 0
+
+#define R_USB_IRQ_MASK_SET__iso_eof__BITNR 13
+#define R_USB_IRQ_MASK_SET__intr_eof__BITNR 12
+#define R_USB_IRQ_MASK_SET__iso_eot__BITNR 11
+#define R_USB_IRQ_MASK_SET__intr_eot__BITNR 10
+#define R_USB_IRQ_MASK_SET__ctl_eot__BITNR 9
+#define R_USB_IRQ_MASK_SET__bulk_eot__BITNR 8
+#define R_USB_IRQ_MASK_SET__epid_attn__BITNR 3
+#define R_USB_IRQ_MASK_SET__sof__BITNR 2
+#define R_USB_IRQ_MASK_SET__port_status__BITNR 1
+#define R_USB_IRQ_MASK_SET__ctl_status__BITNR 0
+
+#define R_USB_IRQ_MASK_SET__iso_eof__iso_eof__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_SET__intr_eof__intr_eof__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_SET__iso_eot__iso_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_SET__intr_eot__intr_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_SET__ctl_eot__ctl_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_SET__bulk_eot__bulk_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_SET__epid_attn__epid_attn__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_SET__sof__sof__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_SET__port_status__port_status__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_SET__ctl_status__ctl_status__VAL REG_VAL_ENUM
+
+#define R_USB_IRQ_MASK_SET__iso_eof__iso_eof__nop 0
+#define R_USB_IRQ_MASK_SET__iso_eof__iso_eof__set 1
+#define R_USB_IRQ_MASK_SET__intr_eof__intr_eof__nop 0
+#define R_USB_IRQ_MASK_SET__intr_eof__intr_eof__set 1
+#define R_USB_IRQ_MASK_SET__iso_eot__iso_eot__nop 0
+#define R_USB_IRQ_MASK_SET__iso_eot__iso_eot__set 1
+#define R_USB_IRQ_MASK_SET__intr_eot__intr_eot__nop 0
+#define R_USB_IRQ_MASK_SET__intr_eot__intr_eot__set 1
+#define R_USB_IRQ_MASK_SET__ctl_eot__ctl_eot__nop 0
+#define R_USB_IRQ_MASK_SET__ctl_eot__ctl_eot__set 1
+#define R_USB_IRQ_MASK_SET__bulk_eot__bulk_eot__nop 0
+#define R_USB_IRQ_MASK_SET__bulk_eot__bulk_eot__set 1
+#define R_USB_IRQ_MASK_SET__epid_attn__epid_attn__nop 0
+#define R_USB_IRQ_MASK_SET__epid_attn__epid_attn__set 1
+#define R_USB_IRQ_MASK_SET__sof__sof__nop 0
+#define R_USB_IRQ_MASK_SET__sof__sof__set 1
+#define R_USB_IRQ_MASK_SET__port_status__port_status__nop 0
+#define R_USB_IRQ_MASK_SET__port_status__port_status__set 1
+#define R_USB_IRQ_MASK_SET__ctl_status__ctl_status__nop 0
+#define R_USB_IRQ_MASK_SET__ctl_status__ctl_status__set 1
+
+#endif
+
+/*
+ * R_USB_IRQ_MASK_SET_DEV
+ * - type: WO
+ * - addr: 0xb0000204
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_IRQ_MASK_SET_DEV__ADDR (REG_TYPECAST_UWORD 0xb0000204)
+
+#ifndef REG_NO_SHADOW
+#define R_USB_IRQ_MASK_SET_DEV__SADDR (REG_STYPECAST_UWORD (reg_shadow__hwregs.R_USB_IRQ_MASK_SET + 0))
+#define R_USB_IRQ_MASK_SET_DEV__IADDR (REG_STYPECAST_UWORD (reg_initiated__hwregs.R_USB_IRQ_MASK_SET + 0))
+#else /* REG_NO_SHADOW */
+#define R_USB_IRQ_MASK_SET_DEV__SADDR (REG_STYPECAST_UWORD (®_shadow__hwregs))
+#define R_USB_IRQ_MASK_SET_DEV__IADDR (REG_STYPECAST_UWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_USB_IRQ_MASK_SET_DEV__STYPECAST REG_STYPECAST_UWORD
+#define R_USB_IRQ_MASK_SET_DEV__SVAL REG_SVAL_SHADOW
+#define R_USB_IRQ_MASK_SET_DEV__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_IRQ_MASK_SET_DEV__TYPECAST REG_TYPECAST_UWORD
+#define R_USB_IRQ_MASK_SET_DEV__TYPE (REG_UWORD)
+#define R_USB_IRQ_MASK_SET_DEV__GET REG_GET_WO
+#define R_USB_IRQ_MASK_SET_DEV__IGET REG_IGET_WO
+#define R_USB_IRQ_MASK_SET_DEV__SET REG_SET_WO
+#define R_USB_IRQ_MASK_SET_DEV__ISET REG_ISET_WO
+#define R_USB_IRQ_MASK_SET_DEV__SET_VAL REG_SET_VAL_WO
+#define R_USB_IRQ_MASK_SET_DEV__EQL REG_EQL_WO
+#define R_USB_IRQ_MASK_SET_DEV__IEQL REG_IEQL_WO
+#define R_USB_IRQ_MASK_SET_DEV__RD REG_RD_WO
+#define R_USB_IRQ_MASK_SET_DEV__IRD REG_IRD_WO
+#define R_USB_IRQ_MASK_SET_DEV__WR REG_WR_WO
+#define R_USB_IRQ_MASK_SET_DEV__IWR REG_IWR_WO
+
+#define R_USB_IRQ_MASK_SET_DEV__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_USB_IRQ_MASK_SET_DEV__out_eot__out_eot__MASK 0x00001000U
+#define R_USB_IRQ_MASK_SET_DEV__ep3_in_eot__ep3_in_eot__MASK 0x00000800U
+#define R_USB_IRQ_MASK_SET_DEV__ep2_in_eot__ep2_in_eot__MASK 0x00000400U
+#define R_USB_IRQ_MASK_SET_DEV__ep1_in_eot__ep1_in_eot__MASK 0x00000200U
+#define R_USB_IRQ_MASK_SET_DEV__ep0_in_eot__ep0_in_eot__MASK 0x00000100U
+#define R_USB_IRQ_MASK_SET_DEV__epid_attn__epid_attn__MASK 0x00000008U
+#define R_USB_IRQ_MASK_SET_DEV__sof__sof__MASK 0x00000004U
+#define R_USB_IRQ_MASK_SET_DEV__port_status__port_status__MASK 0x00000002U
+#define R_USB_IRQ_MASK_SET_DEV__ctl_status__ctl_status__MASK 0x00000001U
+
+#define R_USB_IRQ_MASK_SET_DEV__out_eot__MAX 0x1
+#define R_USB_IRQ_MASK_SET_DEV__ep3_in_eot__MAX 0x1
+#define R_USB_IRQ_MASK_SET_DEV__ep2_in_eot__MAX 0x1
+#define R_USB_IRQ_MASK_SET_DEV__ep1_in_eot__MAX 0x1
+#define R_USB_IRQ_MASK_SET_DEV__ep0_in_eot__MAX 0x1
+#define R_USB_IRQ_MASK_SET_DEV__epid_attn__MAX 0x1
+#define R_USB_IRQ_MASK_SET_DEV__sof__MAX 0x1
+#define R_USB_IRQ_MASK_SET_DEV__port_status__MAX 0x1
+#define R_USB_IRQ_MASK_SET_DEV__ctl_status__MAX 0x1
+
+#define R_USB_IRQ_MASK_SET_DEV__out_eot__MIN 0
+#define R_USB_IRQ_MASK_SET_DEV__ep3_in_eot__MIN 0
+#define R_USB_IRQ_MASK_SET_DEV__ep2_in_eot__MIN 0
+#define R_USB_IRQ_MASK_SET_DEV__ep1_in_eot__MIN 0
+#define R_USB_IRQ_MASK_SET_DEV__ep0_in_eot__MIN 0
+#define R_USB_IRQ_MASK_SET_DEV__epid_attn__MIN 0
+#define R_USB_IRQ_MASK_SET_DEV__sof__MIN 0
+#define R_USB_IRQ_MASK_SET_DEV__port_status__MIN 0
+#define R_USB_IRQ_MASK_SET_DEV__ctl_status__MIN 0
+
+#define R_USB_IRQ_MASK_SET_DEV__out_eot__BITNR 12
+#define R_USB_IRQ_MASK_SET_DEV__ep3_in_eot__BITNR 11
+#define R_USB_IRQ_MASK_SET_DEV__ep2_in_eot__BITNR 10
+#define R_USB_IRQ_MASK_SET_DEV__ep1_in_eot__BITNR 9
+#define R_USB_IRQ_MASK_SET_DEV__ep0_in_eot__BITNR 8
+#define R_USB_IRQ_MASK_SET_DEV__epid_attn__BITNR 3
+#define R_USB_IRQ_MASK_SET_DEV__sof__BITNR 2
+#define R_USB_IRQ_MASK_SET_DEV__port_status__BITNR 1
+#define R_USB_IRQ_MASK_SET_DEV__ctl_status__BITNR 0
+
+#define R_USB_IRQ_MASK_SET_DEV__out_eot__out_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_SET_DEV__ep3_in_eot__ep3_in_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_SET_DEV__ep2_in_eot__ep2_in_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_SET_DEV__ep1_in_eot__ep1_in_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_SET_DEV__ep0_in_eot__ep0_in_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_SET_DEV__epid_attn__epid_attn__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_SET_DEV__sof__sof__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_SET_DEV__port_status__port_status__VAL REG_VAL_ENUM
+#define R_USB_IRQ_MASK_SET_DEV__ctl_status__ctl_status__VAL REG_VAL_ENUM
+
+#define R_USB_IRQ_MASK_SET_DEV__out_eot__out_eot__nop 0
+#define R_USB_IRQ_MASK_SET_DEV__out_eot__out_eot__set 1
+#define R_USB_IRQ_MASK_SET_DEV__ep3_in_eot__ep3_in_eot__nop 0
+#define R_USB_IRQ_MASK_SET_DEV__ep3_in_eot__ep3_in_eot__set 1
+#define R_USB_IRQ_MASK_SET_DEV__ep2_in_eot__ep2_in_eot__nop 0
+#define R_USB_IRQ_MASK_SET_DEV__ep2_in_eot__ep2_in_eot__set 1
+#define R_USB_IRQ_MASK_SET_DEV__ep1_in_eot__ep1_in_eot__nop 0
+#define R_USB_IRQ_MASK_SET_DEV__ep1_in_eot__ep1_in_eot__set 1
+#define R_USB_IRQ_MASK_SET_DEV__ep0_in_eot__ep0_in_eot__nop 0
+#define R_USB_IRQ_MASK_SET_DEV__ep0_in_eot__ep0_in_eot__set 1
+#define R_USB_IRQ_MASK_SET_DEV__epid_attn__epid_attn__nop 0
+#define R_USB_IRQ_MASK_SET_DEV__epid_attn__epid_attn__set 1
+#define R_USB_IRQ_MASK_SET_DEV__sof__sof__nop 0
+#define R_USB_IRQ_MASK_SET_DEV__sof__sof__set 1
+#define R_USB_IRQ_MASK_SET_DEV__port_status__port_status__nop 0
+#define R_USB_IRQ_MASK_SET_DEV__port_status__port_status__set 1
+#define R_USB_IRQ_MASK_SET_DEV__ctl_status__ctl_status__nop 0
+#define R_USB_IRQ_MASK_SET_DEV__ctl_status__ctl_status__set 1
+
+#endif
+
+/*
+ * R_USB_IRQ_READ
+ * - type: RO
+ * - addr: 0xb0000206
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_IRQ_READ__ADDR (REG_TYPECAST_UWORD 0xb0000206)
+#define R_USB_IRQ_READ__SVAL REG_SVAL_SHADOW
+#define R_USB_IRQ_READ__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_IRQ_READ__TYPECAST REG_TYPECAST_UWORD
+#define R_USB_IRQ_READ__TYPE (REG_UWORD)
+#define R_USB_IRQ_READ__GET REG_GET_RO
+#define R_USB_IRQ_READ__IGET REG_IGET_RO
+#define R_USB_IRQ_READ__SET REG_SET_RO
+#define R_USB_IRQ_READ__ISET REG_ISET_RO
+#define R_USB_IRQ_READ__SET_VAL REG_SET_VAL_RO
+#define R_USB_IRQ_READ__EQL REG_EQL_RO
+#define R_USB_IRQ_READ__IEQL REG_IEQL_RO
+#define R_USB_IRQ_READ__RD REG_RD_RO
+#define R_USB_IRQ_READ__IRD REG_IRD_RO
+#define R_USB_IRQ_READ__WR REG_WR_RO
+#define R_USB_IRQ_READ__IWR REG_IWR_RO
+
+#define R_USB_IRQ_READ__READ(addr) \
+ (*(addr))
+
+#define R_USB_IRQ_READ__iso_eof__iso_eof__MASK 0x00002000U
+#define R_USB_IRQ_READ__intr_eof__intr_eof__MASK 0x00001000U
+#define R_USB_IRQ_READ__iso_eot__iso_eot__MASK 0x00000800U
+#define R_USB_IRQ_READ__intr_eot__intr_eot__MASK 0x00000400U
+#define R_USB_IRQ_READ__ctl_eot__ctl_eot__MASK 0x00000200U
+#define R_USB_IRQ_READ__bulk_eot__bulk_eot__MASK 0x00000100U
+#define R_USB_IRQ_READ__epid_attn__epid_attn__MASK 0x00000008U
+#define R_USB_IRQ_READ__sof__sof__MASK 0x00000004U
+#define R_USB_IRQ_READ__port_status__port_status__MASK 0x00000002U
+#define R_USB_IRQ_READ__ctl_status__ctl_status__MASK 0x00000001U
+
+#define R_USB_IRQ_READ__iso_eof__MAX 0x1
+#define R_USB_IRQ_READ__intr_eof__MAX 0x1
+#define R_USB_IRQ_READ__iso_eot__MAX 0x1
+#define R_USB_IRQ_READ__intr_eot__MAX 0x1
+#define R_USB_IRQ_READ__ctl_eot__MAX 0x1
+#define R_USB_IRQ_READ__bulk_eot__MAX 0x1
+#define R_USB_IRQ_READ__epid_attn__MAX 0x1
+#define R_USB_IRQ_READ__sof__MAX 0x1
+#define R_USB_IRQ_READ__port_status__MAX 0x1
+#define R_USB_IRQ_READ__ctl_status__MAX 0x1
+
+#define R_USB_IRQ_READ__iso_eof__MIN 0
+#define R_USB_IRQ_READ__intr_eof__MIN 0
+#define R_USB_IRQ_READ__iso_eot__MIN 0
+#define R_USB_IRQ_READ__intr_eot__MIN 0
+#define R_USB_IRQ_READ__ctl_eot__MIN 0
+#define R_USB_IRQ_READ__bulk_eot__MIN 0
+#define R_USB_IRQ_READ__epid_attn__MIN 0
+#define R_USB_IRQ_READ__sof__MIN 0
+#define R_USB_IRQ_READ__port_status__MIN 0
+#define R_USB_IRQ_READ__ctl_status__MIN 0
+
+#define R_USB_IRQ_READ__iso_eof__BITNR 13
+#define R_USB_IRQ_READ__intr_eof__BITNR 12
+#define R_USB_IRQ_READ__iso_eot__BITNR 11
+#define R_USB_IRQ_READ__intr_eot__BITNR 10
+#define R_USB_IRQ_READ__ctl_eot__BITNR 9
+#define R_USB_IRQ_READ__bulk_eot__BITNR 8
+#define R_USB_IRQ_READ__epid_attn__BITNR 3
+#define R_USB_IRQ_READ__sof__BITNR 2
+#define R_USB_IRQ_READ__port_status__BITNR 1
+#define R_USB_IRQ_READ__ctl_status__BITNR 0
+
+#define R_USB_IRQ_READ__iso_eof__iso_eof__VAL REG_VAL_ENUM
+#define R_USB_IRQ_READ__intr_eof__intr_eof__VAL REG_VAL_ENUM
+#define R_USB_IRQ_READ__iso_eot__iso_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_READ__intr_eot__intr_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_READ__ctl_eot__ctl_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_READ__bulk_eot__bulk_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_READ__epid_attn__epid_attn__VAL REG_VAL_ENUM
+#define R_USB_IRQ_READ__sof__sof__VAL REG_VAL_ENUM
+#define R_USB_IRQ_READ__port_status__port_status__VAL REG_VAL_ENUM
+#define R_USB_IRQ_READ__ctl_status__ctl_status__VAL REG_VAL_ENUM
+
+#define R_USB_IRQ_READ__iso_eof__iso_eof__no_pend 0
+#define R_USB_IRQ_READ__iso_eof__iso_eof__pend 1
+#define R_USB_IRQ_READ__intr_eof__intr_eof__no_pend 0
+#define R_USB_IRQ_READ__intr_eof__intr_eof__pend 1
+#define R_USB_IRQ_READ__iso_eot__iso_eot__no_pend 0
+#define R_USB_IRQ_READ__iso_eot__iso_eot__pend 1
+#define R_USB_IRQ_READ__intr_eot__intr_eot__no_pend 0
+#define R_USB_IRQ_READ__intr_eot__intr_eot__pend 1
+#define R_USB_IRQ_READ__ctl_eot__ctl_eot__no_pend 0
+#define R_USB_IRQ_READ__ctl_eot__ctl_eot__pend 1
+#define R_USB_IRQ_READ__bulk_eot__bulk_eot__no_pend 0
+#define R_USB_IRQ_READ__bulk_eot__bulk_eot__pend 1
+#define R_USB_IRQ_READ__epid_attn__epid_attn__no_pend 0
+#define R_USB_IRQ_READ__epid_attn__epid_attn__pend 1
+#define R_USB_IRQ_READ__sof__sof__no_pend 0
+#define R_USB_IRQ_READ__sof__sof__pend 1
+#define R_USB_IRQ_READ__port_status__port_status__no_pend 0
+#define R_USB_IRQ_READ__port_status__port_status__pend 1
+#define R_USB_IRQ_READ__ctl_status__ctl_status__no_pend 0
+#define R_USB_IRQ_READ__ctl_status__ctl_status__pend 1
+
+#endif
+
+/*
+ * R_USB_IRQ_READ_DEV
+ * - type: RO
+ * - addr: 0xb0000206
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_IRQ_READ_DEV__ADDR (REG_TYPECAST_UWORD 0xb0000206)
+#define R_USB_IRQ_READ_DEV__SVAL REG_SVAL_SHADOW
+#define R_USB_IRQ_READ_DEV__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_IRQ_READ_DEV__TYPECAST REG_TYPECAST_UWORD
+#define R_USB_IRQ_READ_DEV__TYPE (REG_UWORD)
+#define R_USB_IRQ_READ_DEV__GET REG_GET_RO
+#define R_USB_IRQ_READ_DEV__IGET REG_IGET_RO
+#define R_USB_IRQ_READ_DEV__SET REG_SET_RO
+#define R_USB_IRQ_READ_DEV__ISET REG_ISET_RO
+#define R_USB_IRQ_READ_DEV__SET_VAL REG_SET_VAL_RO
+#define R_USB_IRQ_READ_DEV__EQL REG_EQL_RO
+#define R_USB_IRQ_READ_DEV__IEQL REG_IEQL_RO
+#define R_USB_IRQ_READ_DEV__RD REG_RD_RO
+#define R_USB_IRQ_READ_DEV__IRD REG_IRD_RO
+#define R_USB_IRQ_READ_DEV__WR REG_WR_RO
+#define R_USB_IRQ_READ_DEV__IWR REG_IWR_RO
+
+#define R_USB_IRQ_READ_DEV__READ(addr) \
+ (*(addr))
+
+#define R_USB_IRQ_READ_DEV__out_eot__out_eot__MASK 0x00001000U
+#define R_USB_IRQ_READ_DEV__ep3_in_eot__ep3_in_eot__MASK 0x00000800U
+#define R_USB_IRQ_READ_DEV__ep2_in_eot__ep2_in_eot__MASK 0x00000400U
+#define R_USB_IRQ_READ_DEV__ep1_in_eot__ep1_in_eot__MASK 0x00000200U
+#define R_USB_IRQ_READ_DEV__ep0_in_eot__ep0_in_eot__MASK 0x00000100U
+#define R_USB_IRQ_READ_DEV__epid_attn__epid_attn__MASK 0x00000008U
+#define R_USB_IRQ_READ_DEV__sof__sof__MASK 0x00000004U
+#define R_USB_IRQ_READ_DEV__port_status__port_status__MASK 0x00000002U
+#define R_USB_IRQ_READ_DEV__ctl_status__ctl_status__MASK 0x00000001U
+
+#define R_USB_IRQ_READ_DEV__out_eot__MAX 0x1
+#define R_USB_IRQ_READ_DEV__ep3_in_eot__MAX 0x1
+#define R_USB_IRQ_READ_DEV__ep2_in_eot__MAX 0x1
+#define R_USB_IRQ_READ_DEV__ep1_in_eot__MAX 0x1
+#define R_USB_IRQ_READ_DEV__ep0_in_eot__MAX 0x1
+#define R_USB_IRQ_READ_DEV__epid_attn__MAX 0x1
+#define R_USB_IRQ_READ_DEV__sof__MAX 0x1
+#define R_USB_IRQ_READ_DEV__port_status__MAX 0x1
+#define R_USB_IRQ_READ_DEV__ctl_status__MAX 0x1
+
+#define R_USB_IRQ_READ_DEV__out_eot__MIN 0
+#define R_USB_IRQ_READ_DEV__ep3_in_eot__MIN 0
+#define R_USB_IRQ_READ_DEV__ep2_in_eot__MIN 0
+#define R_USB_IRQ_READ_DEV__ep1_in_eot__MIN 0
+#define R_USB_IRQ_READ_DEV__ep0_in_eot__MIN 0
+#define R_USB_IRQ_READ_DEV__epid_attn__MIN 0
+#define R_USB_IRQ_READ_DEV__sof__MIN 0
+#define R_USB_IRQ_READ_DEV__port_status__MIN 0
+#define R_USB_IRQ_READ_DEV__ctl_status__MIN 0
+
+#define R_USB_IRQ_READ_DEV__out_eot__BITNR 12
+#define R_USB_IRQ_READ_DEV__ep3_in_eot__BITNR 11
+#define R_USB_IRQ_READ_DEV__ep2_in_eot__BITNR 10
+#define R_USB_IRQ_READ_DEV__ep1_in_eot__BITNR 9
+#define R_USB_IRQ_READ_DEV__ep0_in_eot__BITNR 8
+#define R_USB_IRQ_READ_DEV__epid_attn__BITNR 3
+#define R_USB_IRQ_READ_DEV__sof__BITNR 2
+#define R_USB_IRQ_READ_DEV__port_status__BITNR 1
+#define R_USB_IRQ_READ_DEV__ctl_status__BITNR 0
+
+#define R_USB_IRQ_READ_DEV__out_eot__out_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_READ_DEV__ep3_in_eot__ep3_in_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_READ_DEV__ep2_in_eot__ep2_in_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_READ_DEV__ep1_in_eot__ep1_in_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_READ_DEV__ep0_in_eot__ep0_in_eot__VAL REG_VAL_ENUM
+#define R_USB_IRQ_READ_DEV__epid_attn__epid_attn__VAL REG_VAL_ENUM
+#define R_USB_IRQ_READ_DEV__sof__sof__VAL REG_VAL_ENUM
+#define R_USB_IRQ_READ_DEV__port_status__port_status__VAL REG_VAL_ENUM
+#define R_USB_IRQ_READ_DEV__ctl_status__ctl_status__VAL REG_VAL_ENUM
+
+#define R_USB_IRQ_READ_DEV__out_eot__out_eot__no_pend 0
+#define R_USB_IRQ_READ_DEV__out_eot__out_eot__pend 1
+#define R_USB_IRQ_READ_DEV__ep3_in_eot__ep3_in_eot__no_pend 0
+#define R_USB_IRQ_READ_DEV__ep3_in_eot__ep3_in_eot__pend 1
+#define R_USB_IRQ_READ_DEV__ep2_in_eot__ep2_in_eot__no_pend 0
+#define R_USB_IRQ_READ_DEV__ep2_in_eot__ep2_in_eot__pend 1
+#define R_USB_IRQ_READ_DEV__ep1_in_eot__ep1_in_eot__no_pend 0
+#define R_USB_IRQ_READ_DEV__ep1_in_eot__ep1_in_eot__pend 1
+#define R_USB_IRQ_READ_DEV__ep0_in_eot__ep0_in_eot__no_pend 0
+#define R_USB_IRQ_READ_DEV__ep0_in_eot__ep0_in_eot__pend 1
+#define R_USB_IRQ_READ_DEV__epid_attn__epid_attn__no_pend 0
+#define R_USB_IRQ_READ_DEV__epid_attn__epid_attn__pend 1
+#define R_USB_IRQ_READ_DEV__sof__sof__no_pend 0
+#define R_USB_IRQ_READ_DEV__sof__sof__pend 1
+#define R_USB_IRQ_READ_DEV__port_status__port_status__no_pend 0
+#define R_USB_IRQ_READ_DEV__port_status__port_status__pend 1
+#define R_USB_IRQ_READ_DEV__ctl_status__ctl_status__no_pend 0
+#define R_USB_IRQ_READ_DEV__ctl_status__ctl_status__pend 1
+
+#endif
+
+/*
+ * R_USB_PORT1_DISABLE
+ * - type: WO
+ * - addr: 0xb000006a
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_PORT1_DISABLE__ADDR (REG_TYPECAST_BYTE 0xb000006a)
+
+#ifndef REG_NO_SHADOW
+#define R_USB_PORT1_DISABLE__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_SERIAL1_CTRL + 2))
+#define R_USB_PORT1_DISABLE__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_SERIAL1_CTRL + 2))
+#else /* REG_NO_SHADOW */
+#define R_USB_PORT1_DISABLE__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_USB_PORT1_DISABLE__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_USB_PORT1_DISABLE__STYPECAST REG_STYPECAST_BYTE
+#define R_USB_PORT1_DISABLE__SVAL REG_SVAL_SHADOW
+#define R_USB_PORT1_DISABLE__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_PORT1_DISABLE__TYPECAST REG_TYPECAST_BYTE
+#define R_USB_PORT1_DISABLE__TYPE (REG_BYTE)
+#define R_USB_PORT1_DISABLE__GET REG_GET_WO
+#define R_USB_PORT1_DISABLE__IGET REG_IGET_WO
+#define R_USB_PORT1_DISABLE__SET REG_SET_WO
+#define R_USB_PORT1_DISABLE__ISET REG_ISET_WO
+#define R_USB_PORT1_DISABLE__SET_VAL REG_SET_VAL_WO
+#define R_USB_PORT1_DISABLE__EQL REG_EQL_WO
+#define R_USB_PORT1_DISABLE__IEQL REG_IEQL_WO
+#define R_USB_PORT1_DISABLE__RD REG_RD_WO
+#define R_USB_PORT1_DISABLE__IRD REG_IRD_WO
+#define R_USB_PORT1_DISABLE__WR REG_WR_WO
+#define R_USB_PORT1_DISABLE__IWR REG_IWR_WO
+
+#define R_USB_PORT1_DISABLE__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_USB_PORT1_DISABLE__disable__disable__MASK 0x00000001U
+
+#define R_USB_PORT1_DISABLE__disable__MAX 0x1
+
+#define R_USB_PORT1_DISABLE__disable__MIN 0
+
+#define R_USB_PORT1_DISABLE__disable__BITNR 0
+
+#define R_USB_PORT1_DISABLE__disable__disable__VAL REG_VAL_ENUM
+
+#define R_USB_PORT1_DISABLE__disable__disable__no 1
+#define R_USB_PORT1_DISABLE__disable__disable__yes 0
+
+#endif
+
+/*
+ * R_USB_PORT2_DISABLE
+ * - type: WO
+ * - addr: 0xb0000052
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_PORT2_DISABLE__ADDR (REG_TYPECAST_BYTE 0xb0000052)
+
+#ifndef REG_NO_SHADOW
+#define R_USB_PORT2_DISABLE__SADDR (REG_STYPECAST_BYTE (reg_shadow__hwregs.R_PAR1_CTRL_DATA + 2))
+#define R_USB_PORT2_DISABLE__IADDR (REG_STYPECAST_BYTE (reg_initiated__hwregs.R_PAR1_CTRL_DATA + 2))
+#else /* REG_NO_SHADOW */
+#define R_USB_PORT2_DISABLE__SADDR (REG_STYPECAST_BYTE (®_shadow__hwregs))
+#define R_USB_PORT2_DISABLE__IADDR (REG_STYPECAST_BYTE (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_USB_PORT2_DISABLE__STYPECAST REG_STYPECAST_BYTE
+#define R_USB_PORT2_DISABLE__SVAL REG_SVAL_SHADOW
+#define R_USB_PORT2_DISABLE__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_PORT2_DISABLE__TYPECAST REG_TYPECAST_BYTE
+#define R_USB_PORT2_DISABLE__TYPE (REG_BYTE)
+#define R_USB_PORT2_DISABLE__GET REG_GET_WO
+#define R_USB_PORT2_DISABLE__IGET REG_IGET_WO
+#define R_USB_PORT2_DISABLE__SET REG_SET_WO
+#define R_USB_PORT2_DISABLE__ISET REG_ISET_WO
+#define R_USB_PORT2_DISABLE__SET_VAL REG_SET_VAL_WO
+#define R_USB_PORT2_DISABLE__EQL REG_EQL_WO
+#define R_USB_PORT2_DISABLE__IEQL REG_IEQL_WO
+#define R_USB_PORT2_DISABLE__RD REG_RD_WO
+#define R_USB_PORT2_DISABLE__IRD REG_IRD_WO
+#define R_USB_PORT2_DISABLE__WR REG_WR_WO
+#define R_USB_PORT2_DISABLE__IWR REG_IWR_WO
+
+#define R_USB_PORT2_DISABLE__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_USB_PORT2_DISABLE__disable__disable__MASK 0x00000001U
+
+#define R_USB_PORT2_DISABLE__disable__MAX 0x1
+
+#define R_USB_PORT2_DISABLE__disable__MIN 0
+
+#define R_USB_PORT2_DISABLE__disable__BITNR 0
+
+#define R_USB_PORT2_DISABLE__disable__disable__VAL REG_VAL_ENUM
+
+#define R_USB_PORT2_DISABLE__disable__disable__no 1
+#define R_USB_PORT2_DISABLE__disable__disable__yes 0
+
+#endif
+
+/*
+ * R_USB_REVISION
+ * - type: RO
+ * - addr: 0xb0000200
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_REVISION__ADDR (REG_TYPECAST_BYTE 0xb0000200)
+#define R_USB_REVISION__SVAL REG_SVAL_SHADOW
+#define R_USB_REVISION__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_REVISION__TYPECAST REG_TYPECAST_BYTE
+#define R_USB_REVISION__TYPE (REG_BYTE)
+#define R_USB_REVISION__GET REG_GET_RO
+#define R_USB_REVISION__IGET REG_IGET_RO
+#define R_USB_REVISION__SET REG_SET_RO
+#define R_USB_REVISION__ISET REG_ISET_RO
+#define R_USB_REVISION__SET_VAL REG_SET_VAL_RO
+#define R_USB_REVISION__EQL REG_EQL_RO
+#define R_USB_REVISION__IEQL REG_IEQL_RO
+#define R_USB_REVISION__RD REG_RD_RO
+#define R_USB_REVISION__IRD REG_IRD_RO
+#define R_USB_REVISION__WR REG_WR_RO
+#define R_USB_REVISION__IWR REG_IWR_RO
+
+#define R_USB_REVISION__READ(addr) \
+ (*(addr))
+
+#define R_USB_REVISION__major__major__MASK 0x000000f0U
+#define R_USB_REVISION__minor__minor__MASK 0x0000000fU
+
+#define R_USB_REVISION__major__MAX 0xf
+#define R_USB_REVISION__minor__MAX 0xf
+
+#define R_USB_REVISION__major__MIN 0
+#define R_USB_REVISION__minor__MIN 0
+
+#define R_USB_REVISION__major__BITNR 4
+#define R_USB_REVISION__minor__BITNR 0
+
+#define R_USB_REVISION__major__major__VAL REG_VAL_VAL
+#define R_USB_REVISION__minor__minor__VAL REG_VAL_ENUM
+
+#define R_USB_REVISION__minor__minor__v1_v2 1
+#define R_USB_REVISION__minor__minor__v3 0
+
+#endif
+
+/*
+ * R_USB_RH_PORT_STATUS_1
+ * - type: RO
+ * - addr: 0xb0000218
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_RH_PORT_STATUS_1__ADDR (REG_TYPECAST_UWORD 0xb0000218)
+#define R_USB_RH_PORT_STATUS_1__SVAL REG_SVAL_SHADOW
+#define R_USB_RH_PORT_STATUS_1__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_RH_PORT_STATUS_1__TYPECAST REG_TYPECAST_UWORD
+#define R_USB_RH_PORT_STATUS_1__TYPE (REG_UWORD)
+#define R_USB_RH_PORT_STATUS_1__GET REG_GET_RO
+#define R_USB_RH_PORT_STATUS_1__IGET REG_IGET_RO
+#define R_USB_RH_PORT_STATUS_1__SET REG_SET_RO
+#define R_USB_RH_PORT_STATUS_1__ISET REG_ISET_RO
+#define R_USB_RH_PORT_STATUS_1__SET_VAL REG_SET_VAL_RO
+#define R_USB_RH_PORT_STATUS_1__EQL REG_EQL_RO
+#define R_USB_RH_PORT_STATUS_1__IEQL REG_IEQL_RO
+#define R_USB_RH_PORT_STATUS_1__RD REG_RD_RO
+#define R_USB_RH_PORT_STATUS_1__IRD REG_IRD_RO
+#define R_USB_RH_PORT_STATUS_1__WR REG_WR_RO
+#define R_USB_RH_PORT_STATUS_1__IWR REG_IWR_RO
+
+#define R_USB_RH_PORT_STATUS_1__READ(addr) \
+ (*(addr))
+
+#define R_USB_RH_PORT_STATUS_1__speed__speed__MASK 0x00000200U
+#define R_USB_RH_PORT_STATUS_1__power__power__MASK 0x00000100U
+#define R_USB_RH_PORT_STATUS_1__reset__reset__MASK 0x00000010U
+#define R_USB_RH_PORT_STATUS_1__overcurrent__overcurrent__MASK 0x00000008U
+#define R_USB_RH_PORT_STATUS_1__suspended__suspended__MASK 0x00000004U
+#define R_USB_RH_PORT_STATUS_1__enabled__enabled__MASK 0x00000002U
+#define R_USB_RH_PORT_STATUS_1__connected__connected__MASK 0x00000001U
+
+#define R_USB_RH_PORT_STATUS_1__speed__MAX 0x1
+#define R_USB_RH_PORT_STATUS_1__power__MAX 0x1
+#define R_USB_RH_PORT_STATUS_1__reset__MAX 0x1
+#define R_USB_RH_PORT_STATUS_1__overcurrent__MAX 0x1
+#define R_USB_RH_PORT_STATUS_1__suspended__MAX 0x1
+#define R_USB_RH_PORT_STATUS_1__enabled__MAX 0x1
+#define R_USB_RH_PORT_STATUS_1__connected__MAX 0x1
+
+#define R_USB_RH_PORT_STATUS_1__speed__MIN 0
+#define R_USB_RH_PORT_STATUS_1__power__MIN 0
+#define R_USB_RH_PORT_STATUS_1__reset__MIN 0
+#define R_USB_RH_PORT_STATUS_1__overcurrent__MIN 0
+#define R_USB_RH_PORT_STATUS_1__suspended__MIN 0
+#define R_USB_RH_PORT_STATUS_1__enabled__MIN 0
+#define R_USB_RH_PORT_STATUS_1__connected__MIN 0
+
+#define R_USB_RH_PORT_STATUS_1__speed__BITNR 9
+#define R_USB_RH_PORT_STATUS_1__power__BITNR 8
+#define R_USB_RH_PORT_STATUS_1__reset__BITNR 4
+#define R_USB_RH_PORT_STATUS_1__overcurrent__BITNR 3
+#define R_USB_RH_PORT_STATUS_1__suspended__BITNR 2
+#define R_USB_RH_PORT_STATUS_1__enabled__BITNR 1
+#define R_USB_RH_PORT_STATUS_1__connected__BITNR 0
+
+#define R_USB_RH_PORT_STATUS_1__speed__speed__VAL REG_VAL_ENUM
+#define R_USB_RH_PORT_STATUS_1__power__power__VAL REG_VAL_VAL
+#define R_USB_RH_PORT_STATUS_1__reset__reset__VAL REG_VAL_ENUM
+#define R_USB_RH_PORT_STATUS_1__overcurrent__overcurrent__VAL REG_VAL_ENUM
+#define R_USB_RH_PORT_STATUS_1__suspended__suspended__VAL REG_VAL_ENUM
+#define R_USB_RH_PORT_STATUS_1__enabled__enabled__VAL REG_VAL_ENUM
+#define R_USB_RH_PORT_STATUS_1__connected__connected__VAL REG_VAL_ENUM
+
+#define R_USB_RH_PORT_STATUS_1__speed__speed__full 0
+#define R_USB_RH_PORT_STATUS_1__speed__speed__low 1
+#define R_USB_RH_PORT_STATUS_1__reset__reset__no 0
+#define R_USB_RH_PORT_STATUS_1__reset__reset__yes 1
+#define R_USB_RH_PORT_STATUS_1__overcurrent__overcurrent__no 0
+#define R_USB_RH_PORT_STATUS_1__overcurrent__overcurrent__yes 1
+#define R_USB_RH_PORT_STATUS_1__suspended__suspended__no 0
+#define R_USB_RH_PORT_STATUS_1__suspended__suspended__yes 1
+#define R_USB_RH_PORT_STATUS_1__enabled__enabled__no 0
+#define R_USB_RH_PORT_STATUS_1__enabled__enabled__yes 1
+#define R_USB_RH_PORT_STATUS_1__connected__connected__no 0
+#define R_USB_RH_PORT_STATUS_1__connected__connected__yes 1
+
+#endif
+
+/*
+ * R_USB_RH_PORT_STATUS_2
+ * - type: RO
+ * - addr: 0xb000021a
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_RH_PORT_STATUS_2__ADDR (REG_TYPECAST_UWORD 0xb000021a)
+#define R_USB_RH_PORT_STATUS_2__SVAL REG_SVAL_SHADOW
+#define R_USB_RH_PORT_STATUS_2__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_RH_PORT_STATUS_2__TYPECAST REG_TYPECAST_UWORD
+#define R_USB_RH_PORT_STATUS_2__TYPE (REG_UWORD)
+#define R_USB_RH_PORT_STATUS_2__GET REG_GET_RO
+#define R_USB_RH_PORT_STATUS_2__IGET REG_IGET_RO
+#define R_USB_RH_PORT_STATUS_2__SET REG_SET_RO
+#define R_USB_RH_PORT_STATUS_2__ISET REG_ISET_RO
+#define R_USB_RH_PORT_STATUS_2__SET_VAL REG_SET_VAL_RO
+#define R_USB_RH_PORT_STATUS_2__EQL REG_EQL_RO
+#define R_USB_RH_PORT_STATUS_2__IEQL REG_IEQL_RO
+#define R_USB_RH_PORT_STATUS_2__RD REG_RD_RO
+#define R_USB_RH_PORT_STATUS_2__IRD REG_IRD_RO
+#define R_USB_RH_PORT_STATUS_2__WR REG_WR_RO
+#define R_USB_RH_PORT_STATUS_2__IWR REG_IWR_RO
+
+#define R_USB_RH_PORT_STATUS_2__READ(addr) \
+ (*(addr))
+
+#define R_USB_RH_PORT_STATUS_2__speed__speed__MASK 0x00000200U
+#define R_USB_RH_PORT_STATUS_2__power__power__MASK 0x00000100U
+#define R_USB_RH_PORT_STATUS_2__reset__reset__MASK 0x00000010U
+#define R_USB_RH_PORT_STATUS_2__overcurrent__overcurrent__MASK 0x00000008U
+#define R_USB_RH_PORT_STATUS_2__suspended__suspended__MASK 0x00000004U
+#define R_USB_RH_PORT_STATUS_2__enabled__enabled__MASK 0x00000002U
+#define R_USB_RH_PORT_STATUS_2__connected__connected__MASK 0x00000001U
+
+#define R_USB_RH_PORT_STATUS_2__speed__MAX 0x1
+#define R_USB_RH_PORT_STATUS_2__power__MAX 0x1
+#define R_USB_RH_PORT_STATUS_2__reset__MAX 0x1
+#define R_USB_RH_PORT_STATUS_2__overcurrent__MAX 0x1
+#define R_USB_RH_PORT_STATUS_2__suspended__MAX 0x1
+#define R_USB_RH_PORT_STATUS_2__enabled__MAX 0x1
+#define R_USB_RH_PORT_STATUS_2__connected__MAX 0x1
+
+#define R_USB_RH_PORT_STATUS_2__speed__MIN 0
+#define R_USB_RH_PORT_STATUS_2__power__MIN 0
+#define R_USB_RH_PORT_STATUS_2__reset__MIN 0
+#define R_USB_RH_PORT_STATUS_2__overcurrent__MIN 0
+#define R_USB_RH_PORT_STATUS_2__suspended__MIN 0
+#define R_USB_RH_PORT_STATUS_2__enabled__MIN 0
+#define R_USB_RH_PORT_STATUS_2__connected__MIN 0
+
+#define R_USB_RH_PORT_STATUS_2__speed__BITNR 9
+#define R_USB_RH_PORT_STATUS_2__power__BITNR 8
+#define R_USB_RH_PORT_STATUS_2__reset__BITNR 4
+#define R_USB_RH_PORT_STATUS_2__overcurrent__BITNR 3
+#define R_USB_RH_PORT_STATUS_2__suspended__BITNR 2
+#define R_USB_RH_PORT_STATUS_2__enabled__BITNR 1
+#define R_USB_RH_PORT_STATUS_2__connected__BITNR 0
+
+#define R_USB_RH_PORT_STATUS_2__speed__speed__VAL REG_VAL_ENUM
+#define R_USB_RH_PORT_STATUS_2__power__power__VAL REG_VAL_VAL
+#define R_USB_RH_PORT_STATUS_2__reset__reset__VAL REG_VAL_ENUM
+#define R_USB_RH_PORT_STATUS_2__overcurrent__overcurrent__VAL REG_VAL_ENUM
+#define R_USB_RH_PORT_STATUS_2__suspended__suspended__VAL REG_VAL_ENUM
+#define R_USB_RH_PORT_STATUS_2__enabled__enabled__VAL REG_VAL_ENUM
+#define R_USB_RH_PORT_STATUS_2__connected__connected__VAL REG_VAL_ENUM
+
+#define R_USB_RH_PORT_STATUS_2__speed__speed__full 0
+#define R_USB_RH_PORT_STATUS_2__speed__speed__low 1
+#define R_USB_RH_PORT_STATUS_2__reset__reset__no 0
+#define R_USB_RH_PORT_STATUS_2__reset__reset__yes 1
+#define R_USB_RH_PORT_STATUS_2__overcurrent__overcurrent__no 0
+#define R_USB_RH_PORT_STATUS_2__overcurrent__overcurrent__yes 1
+#define R_USB_RH_PORT_STATUS_2__suspended__suspended__no 0
+#define R_USB_RH_PORT_STATUS_2__suspended__suspended__yes 1
+#define R_USB_RH_PORT_STATUS_2__enabled__enabled__no 0
+#define R_USB_RH_PORT_STATUS_2__enabled__enabled__yes 1
+#define R_USB_RH_PORT_STATUS_2__connected__connected__no 0
+#define R_USB_RH_PORT_STATUS_2__connected__connected__yes 1
+
+#endif
+
+/*
+ * R_USB_RH_STATUS
+ * - type: RO
+ * - addr: 0xb0000203
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_RH_STATUS__ADDR (REG_TYPECAST_BYTE 0xb0000203)
+#define R_USB_RH_STATUS__SVAL REG_SVAL_SHADOW
+#define R_USB_RH_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_RH_STATUS__TYPECAST REG_TYPECAST_BYTE
+#define R_USB_RH_STATUS__TYPE (REG_BYTE)
+#define R_USB_RH_STATUS__GET REG_GET_RO
+#define R_USB_RH_STATUS__IGET REG_IGET_RO
+#define R_USB_RH_STATUS__SET REG_SET_RO
+#define R_USB_RH_STATUS__ISET REG_ISET_RO
+#define R_USB_RH_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_USB_RH_STATUS__EQL REG_EQL_RO
+#define R_USB_RH_STATUS__IEQL REG_IEQL_RO
+#define R_USB_RH_STATUS__RD REG_RD_RO
+#define R_USB_RH_STATUS__IRD REG_IRD_RO
+#define R_USB_RH_STATUS__WR REG_WR_RO
+#define R_USB_RH_STATUS__IWR REG_IWR_RO
+
+#define R_USB_RH_STATUS__READ(addr) \
+ (*(addr))
+
+#define R_USB_RH_STATUS__babble2__babble2__MASK 0x00000080U
+#define R_USB_RH_STATUS__babble1__babble1__MASK 0x00000040U
+#define R_USB_RH_STATUS__bus1__bus1__MASK 0x00000030U
+#define R_USB_RH_STATUS__bus2__bus2__MASK 0x0000000cU
+#define R_USB_RH_STATUS__nports__nports__MASK 0x00000003U
+
+#define R_USB_RH_STATUS__babble2__MAX 0x1
+#define R_USB_RH_STATUS__babble1__MAX 0x1
+#define R_USB_RH_STATUS__bus1__MAX 0x3
+#define R_USB_RH_STATUS__bus2__MAX 0x3
+#define R_USB_RH_STATUS__nports__MAX 3
+
+#define R_USB_RH_STATUS__babble2__MIN 0
+#define R_USB_RH_STATUS__babble1__MIN 0
+#define R_USB_RH_STATUS__bus1__MIN 0
+#define R_USB_RH_STATUS__bus2__MIN 0
+#define R_USB_RH_STATUS__nports__MIN 0
+
+#define R_USB_RH_STATUS__babble2__BITNR 7
+#define R_USB_RH_STATUS__babble1__BITNR 6
+#define R_USB_RH_STATUS__bus1__BITNR 4
+#define R_USB_RH_STATUS__bus2__BITNR 2
+#define R_USB_RH_STATUS__nports__BITNR 0
+
+#define R_USB_RH_STATUS__babble2__babble2__VAL REG_VAL_ENUM
+#define R_USB_RH_STATUS__babble1__babble1__VAL REG_VAL_ENUM
+#define R_USB_RH_STATUS__bus1__bus1__VAL REG_VAL_ENUM
+#define R_USB_RH_STATUS__bus2__bus2__VAL REG_VAL_ENUM
+#define R_USB_RH_STATUS__nports__nports__VAL REG_VAL_VAL
+
+#define R_USB_RH_STATUS__babble2__babble2__no 0
+#define R_USB_RH_STATUS__babble2__babble2__yes 1
+#define R_USB_RH_STATUS__babble1__babble1__no 0
+#define R_USB_RH_STATUS__babble1__babble1__yes 1
+#define R_USB_RH_STATUS__bus1__bus1__Diff0 1
+#define R_USB_RH_STATUS__bus1__bus1__Diff1 2
+#define R_USB_RH_STATUS__bus1__bus1__SE0 0
+#define R_USB_RH_STATUS__bus1__bus1__SE1 3
+#define R_USB_RH_STATUS__bus2__bus2__Diff0 1
+#define R_USB_RH_STATUS__bus2__bus2__Diff1 2
+#define R_USB_RH_STATUS__bus2__bus2__SE0 0
+#define R_USB_RH_STATUS__bus2__bus2__SE1 3
+
+#endif
+
+/*
+ * R_USB_SNMP_TERROR
+ * - type: RW
+ * - addr: 0xb0000220
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_SNMP_TERROR__ADDR (REG_TYPECAST_UDWORD 0xb0000220)
+#define R_USB_SNMP_TERROR__SVAL REG_SVAL_SHADOW
+#define R_USB_SNMP_TERROR__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_SNMP_TERROR__TYPECAST REG_TYPECAST_UDWORD
+#define R_USB_SNMP_TERROR__TYPE (REG_UDWORD)
+#define R_USB_SNMP_TERROR__GET REG_GET_RW
+#define R_USB_SNMP_TERROR__IGET REG_IGET_RW
+#define R_USB_SNMP_TERROR__SET REG_SET_RW
+#define R_USB_SNMP_TERROR__ISET REG_ISET_RW
+#define R_USB_SNMP_TERROR__SET_VAL REG_SET_VAL_RW
+#define R_USB_SNMP_TERROR__EQL REG_EQL_RW
+#define R_USB_SNMP_TERROR__IEQL REG_IEQL_RW
+#define R_USB_SNMP_TERROR__RD REG_RD_RW
+#define R_USB_SNMP_TERROR__IRD REG_IRD_RW
+#define R_USB_SNMP_TERROR__WR REG_WR_RW
+#define R_USB_SNMP_TERROR__IWR REG_IWR_RW
+
+#define R_USB_SNMP_TERROR__WRITE(addr,value) \
+ (*(addr) = (value))
+#define R_USB_SNMP_TERROR__READ(addr) \
+ (*(addr))
+
+#define R_USB_SNMP_TERROR__value__value__MASK 0xffffffffU
+
+#define R_USB_SNMP_TERROR__value__MAX 0xffffffff
+
+#define R_USB_SNMP_TERROR__value__MIN 0
+
+#define R_USB_SNMP_TERROR__value__BITNR 0
+
+#define R_USB_SNMP_TERROR__value__value__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_USB_STATUS
+ * - type: RO
+ * - addr: 0xb0000202
+ * - group: USB interface control registers
+ */
+
+#if USE_GROUP__USB_interface_control_registers
+
+#define R_USB_STATUS__ADDR (REG_TYPECAST_BYTE 0xb0000202)
+#define R_USB_STATUS__SVAL REG_SVAL_SHADOW
+#define R_USB_STATUS__SVAL_I REG_SVAL_I_SHADOW
+#define R_USB_STATUS__TYPECAST REG_TYPECAST_BYTE
+#define R_USB_STATUS__TYPE (REG_BYTE)
+#define R_USB_STATUS__GET REG_GET_RO
+#define R_USB_STATUS__IGET REG_IGET_RO
+#define R_USB_STATUS__SET REG_SET_RO
+#define R_USB_STATUS__ISET REG_ISET_RO
+#define R_USB_STATUS__SET_VAL REG_SET_VAL_RO
+#define R_USB_STATUS__EQL REG_EQL_RO
+#define R_USB_STATUS__IEQL REG_IEQL_RO
+#define R_USB_STATUS__RD REG_RD_RO
+#define R_USB_STATUS__IRD REG_IRD_RO
+#define R_USB_STATUS__WR REG_WR_RO
+#define R_USB_STATUS__IWR REG_IWR_RO
+
+#define R_USB_STATUS__READ(addr) \
+ (*(addr))
+
+#define R_USB_STATUS__ourun__ourun__MASK 0x00000020U
+#define R_USB_STATUS__perror__perror__MASK 0x00000010U
+#define R_USB_STATUS__device_mode__device_mode__MASK 0x00000008U
+#define R_USB_STATUS__host_mode__host_mode__MASK 0x00000004U
+#define R_USB_STATUS__started__started__MASK 0x00000002U
+#define R_USB_STATUS__running__running__MASK 0x00000001U
+
+#define R_USB_STATUS__ourun__MAX 0x1
+#define R_USB_STATUS__perror__MAX 0x1
+#define R_USB_STATUS__device_mode__MAX 0x1
+#define R_USB_STATUS__host_mode__MAX 0x1
+#define R_USB_STATUS__started__MAX 0x1
+#define R_USB_STATUS__running__MAX 0x1
+
+#define R_USB_STATUS__ourun__MIN 0
+#define R_USB_STATUS__perror__MIN 0
+#define R_USB_STATUS__device_mode__MIN 0
+#define R_USB_STATUS__host_mode__MIN 0
+#define R_USB_STATUS__started__MIN 0
+#define R_USB_STATUS__running__MIN 0
+
+#define R_USB_STATUS__ourun__BITNR 5
+#define R_USB_STATUS__perror__BITNR 4
+#define R_USB_STATUS__device_mode__BITNR 3
+#define R_USB_STATUS__host_mode__BITNR 2
+#define R_USB_STATUS__started__BITNR 1
+#define R_USB_STATUS__running__BITNR 0
+
+#define R_USB_STATUS__ourun__ourun__VAL REG_VAL_ENUM
+#define R_USB_STATUS__perror__perror__VAL REG_VAL_ENUM
+#define R_USB_STATUS__device_mode__device_mode__VAL REG_VAL_ENUM
+#define R_USB_STATUS__host_mode__host_mode__VAL REG_VAL_ENUM
+#define R_USB_STATUS__started__started__VAL REG_VAL_ENUM
+#define R_USB_STATUS__running__running__VAL REG_VAL_ENUM
+
+#define R_USB_STATUS__ourun__ourun__no 0
+#define R_USB_STATUS__ourun__ourun__yes 1
+#define R_USB_STATUS__perror__perror__no 0
+#define R_USB_STATUS__perror__perror__yes 1
+#define R_USB_STATUS__device_mode__device_mode__no 0
+#define R_USB_STATUS__device_mode__device_mode__yes 1
+#define R_USB_STATUS__host_mode__host_mode__no 0
+#define R_USB_STATUS__host_mode__host_mode__yes 1
+#define R_USB_STATUS__started__started__no 0
+#define R_USB_STATUS__started__started__yes 1
+#define R_USB_STATUS__running__running__no 0
+#define R_USB_STATUS__running__running__yes 1
+
+#endif
+
+/*
+ * R_VECT_MASK_CLR
+ * - type: WO
+ * - addr: 0xb00000d8
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+#define R_VECT_MASK_CLR__ADDR (REG_TYPECAST_UDWORD 0xb00000d8)
+
+#ifndef REG_NO_SHADOW
+#define R_VECT_MASK_CLR__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_VECT_MASK_CLR + 0))
+#define R_VECT_MASK_CLR__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_VECT_MASK_CLR + 0))
+#else /* REG_NO_SHADOW */
+#define R_VECT_MASK_CLR__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_VECT_MASK_CLR__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_VECT_MASK_CLR__STYPECAST REG_STYPECAST_UDWORD
+#define R_VECT_MASK_CLR__SVAL REG_SVAL_ZERO
+#define R_VECT_MASK_CLR__SVAL_I REG_SVAL_I_ZERO
+#define R_VECT_MASK_CLR__TYPECAST REG_TYPECAST_UDWORD
+#define R_VECT_MASK_CLR__TYPE (REG_UDWORD)
+#define R_VECT_MASK_CLR__GET REG_GET_WO
+#define R_VECT_MASK_CLR__IGET REG_IGET_WO
+#define R_VECT_MASK_CLR__SET REG_SET_WO
+#define R_VECT_MASK_CLR__ISET REG_ISET_WO
+#define R_VECT_MASK_CLR__SET_VAL REG_SET_VAL_WO
+#define R_VECT_MASK_CLR__EQL REG_EQL_WO
+#define R_VECT_MASK_CLR__IEQL REG_IEQL_WO
+#define R_VECT_MASK_CLR__RD REG_RD_WO
+#define R_VECT_MASK_CLR__IRD REG_IRD_WO
+#define R_VECT_MASK_CLR__WR REG_WR_WO
+#define R_VECT_MASK_CLR__IWR REG_IWR_WO
+
+#define R_VECT_MASK_CLR__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_VECT_MASK_CLR__usb__usb__MASK 0x80000000U
+#define R_VECT_MASK_CLR__dma9__dma9__MASK 0x02000000U
+#define R_VECT_MASK_CLR__dma8__dma8__MASK 0x01000000U
+#define R_VECT_MASK_CLR__dma7__dma7__MASK 0x00800000U
+#define R_VECT_MASK_CLR__dma6__dma6__MASK 0x00400000U
+#define R_VECT_MASK_CLR__dma5__dma5__MASK 0x00200000U
+#define R_VECT_MASK_CLR__dma4__dma4__MASK 0x00100000U
+#define R_VECT_MASK_CLR__dma3__dma3__MASK 0x00080000U
+#define R_VECT_MASK_CLR__dma2__dma2__MASK 0x00040000U
+#define R_VECT_MASK_CLR__dma1__dma1__MASK 0x00020000U
+#define R_VECT_MASK_CLR__dma0__dma0__MASK 0x00010000U
+#define R_VECT_MASK_CLR__ext_dma1__ext_dma1__MASK 0x00002000U
+#define R_VECT_MASK_CLR__ext_dma0__ext_dma0__MASK 0x00001000U
+#define R_VECT_MASK_CLR__pa__pa__MASK 0x00000800U
+#define R_VECT_MASK_CLR__irq_intnr__irq_intnr__MASK 0x00000400U
+#define R_VECT_MASK_CLR__sw__sw__MASK 0x00000200U
+#define R_VECT_MASK_CLR__serial__serial__MASK 0x00000100U
+#define R_VECT_MASK_CLR__snmp__snmp__MASK 0x00000080U
+#define R_VECT_MASK_CLR__network__network__MASK 0x00000040U
+#define R_VECT_MASK_CLR__scsi1__scsi1__MASK 0x00000020U
+#define R_VECT_MASK_CLR__par1__par1__MASK 0x00000020U
+#define R_VECT_MASK_CLR__scsi1__par1__MASK 0x00000020U
+#define R_VECT_MASK_CLR__scsi0__scsi0__MASK 0x00000010U
+#define R_VECT_MASK_CLR__par0__par0__MASK 0x00000010U
+#define R_VECT_MASK_CLR__scsi0__par0__MASK 0x00000010U
+#define R_VECT_MASK_CLR__ata__ata__MASK 0x00000010U
+#define R_VECT_MASK_CLR__scsi0__ata__MASK 0x00000010U
+#define R_VECT_MASK_CLR__mio__mio__MASK 0x00000010U
+#define R_VECT_MASK_CLR__scsi0__mio__MASK 0x00000010U
+#define R_VECT_MASK_CLR__timer1__timer1__MASK 0x00000008U
+#define R_VECT_MASK_CLR__timer0__timer0__MASK 0x00000004U
+#define R_VECT_MASK_CLR__nmi__nmi__MASK 0x00000002U
+#define R_VECT_MASK_CLR__some__some__MASK 0x00000001U
+
+#define R_VECT_MASK_CLR__usb__MAX 0x1
+#define R_VECT_MASK_CLR__dma9__MAX 0x1
+#define R_VECT_MASK_CLR__dma8__MAX 0x1
+#define R_VECT_MASK_CLR__dma7__MAX 0x1
+#define R_VECT_MASK_CLR__dma6__MAX 0x1
+#define R_VECT_MASK_CLR__dma5__MAX 0x1
+#define R_VECT_MASK_CLR__dma4__MAX 0x1
+#define R_VECT_MASK_CLR__dma3__MAX 0x1
+#define R_VECT_MASK_CLR__dma2__MAX 0x1
+#define R_VECT_MASK_CLR__dma1__MAX 0x1
+#define R_VECT_MASK_CLR__dma0__MAX 0x1
+#define R_VECT_MASK_CLR__ext_dma1__MAX 0x1
+#define R_VECT_MASK_CLR__ext_dma0__MAX 0x1
+#define R_VECT_MASK_CLR__pa__MAX 0x1
+#define R_VECT_MASK_CLR__irq_intnr__MAX 0x1
+#define R_VECT_MASK_CLR__sw__MAX 0x1
+#define R_VECT_MASK_CLR__serial__MAX 0x1
+#define R_VECT_MASK_CLR__snmp__MAX 0x1
+#define R_VECT_MASK_CLR__network__MAX 0x1
+#define R_VECT_MASK_CLR__scsi1__MAX 0x1
+#define R_VECT_MASK_CLR__par1__MAX 0x1
+#define R_VECT_MASK_CLR__scsi0__MAX 0x1
+#define R_VECT_MASK_CLR__par0__MAX 0x1
+#define R_VECT_MASK_CLR__ata__MAX 0x1
+#define R_VECT_MASK_CLR__mio__MAX 0x1
+#define R_VECT_MASK_CLR__timer1__MAX 0x1
+#define R_VECT_MASK_CLR__timer0__MAX 0x1
+#define R_VECT_MASK_CLR__nmi__MAX 0x1
+#define R_VECT_MASK_CLR__some__MAX 0x1
+
+#define R_VECT_MASK_CLR__usb__MIN 0
+#define R_VECT_MASK_CLR__dma9__MIN 0
+#define R_VECT_MASK_CLR__dma8__MIN 0
+#define R_VECT_MASK_CLR__dma7__MIN 0
+#define R_VECT_MASK_CLR__dma6__MIN 0
+#define R_VECT_MASK_CLR__dma5__MIN 0
+#define R_VECT_MASK_CLR__dma4__MIN 0
+#define R_VECT_MASK_CLR__dma3__MIN 0
+#define R_VECT_MASK_CLR__dma2__MIN 0
+#define R_VECT_MASK_CLR__dma1__MIN 0
+#define R_VECT_MASK_CLR__dma0__MIN 0
+#define R_VECT_MASK_CLR__ext_dma1__MIN 0
+#define R_VECT_MASK_CLR__ext_dma0__MIN 0
+#define R_VECT_MASK_CLR__pa__MIN 0
+#define R_VECT_MASK_CLR__irq_intnr__MIN 0
+#define R_VECT_MASK_CLR__sw__MIN 0
+#define R_VECT_MASK_CLR__serial__MIN 0
+#define R_VECT_MASK_CLR__snmp__MIN 0
+#define R_VECT_MASK_CLR__network__MIN 0
+#define R_VECT_MASK_CLR__scsi1__MIN 0
+#define R_VECT_MASK_CLR__par1__MIN 0
+#define R_VECT_MASK_CLR__scsi0__MIN 0
+#define R_VECT_MASK_CLR__par0__MIN 0
+#define R_VECT_MASK_CLR__ata__MIN 0
+#define R_VECT_MASK_CLR__mio__MIN 0
+#define R_VECT_MASK_CLR__timer1__MIN 0
+#define R_VECT_MASK_CLR__timer0__MIN 0
+#define R_VECT_MASK_CLR__nmi__MIN 0
+#define R_VECT_MASK_CLR__some__MIN 0
+
+#define R_VECT_MASK_CLR__usb__BITNR 31
+#define R_VECT_MASK_CLR__dma9__BITNR 25
+#define R_VECT_MASK_CLR__dma8__BITNR 24
+#define R_VECT_MASK_CLR__dma7__BITNR 23
+#define R_VECT_MASK_CLR__dma6__BITNR 22
+#define R_VECT_MASK_CLR__dma5__BITNR 21
+#define R_VECT_MASK_CLR__dma4__BITNR 20
+#define R_VECT_MASK_CLR__dma3__BITNR 19
+#define R_VECT_MASK_CLR__dma2__BITNR 18
+#define R_VECT_MASK_CLR__dma1__BITNR 17
+#define R_VECT_MASK_CLR__dma0__BITNR 16
+#define R_VECT_MASK_CLR__ext_dma1__BITNR 13
+#define R_VECT_MASK_CLR__ext_dma0__BITNR 12
+#define R_VECT_MASK_CLR__pa__BITNR 11
+#define R_VECT_MASK_CLR__irq_intnr__BITNR 10
+#define R_VECT_MASK_CLR__sw__BITNR 9
+#define R_VECT_MASK_CLR__serial__BITNR 8
+#define R_VECT_MASK_CLR__snmp__BITNR 7
+#define R_VECT_MASK_CLR__network__BITNR 6
+#define R_VECT_MASK_CLR__scsi1__BITNR 5
+#define R_VECT_MASK_CLR__par1__BITNR 5
+#define R_VECT_MASK_CLR__scsi0__BITNR 4
+#define R_VECT_MASK_CLR__par0__BITNR 4
+#define R_VECT_MASK_CLR__ata__BITNR 4
+#define R_VECT_MASK_CLR__mio__BITNR 4
+#define R_VECT_MASK_CLR__timer1__BITNR 3
+#define R_VECT_MASK_CLR__timer0__BITNR 2
+#define R_VECT_MASK_CLR__nmi__BITNR 1
+#define R_VECT_MASK_CLR__some__BITNR 0
+
+#define R_VECT_MASK_CLR__usb__usb__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__dma9__dma9__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__dma8__dma8__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__dma7__dma7__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__dma6__dma6__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__dma5__dma5__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__dma4__dma4__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__dma3__dma3__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__dma2__dma2__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__dma1__dma1__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__dma0__dma0__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__ext_dma1__ext_dma1__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__ext_dma0__ext_dma0__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__pa__pa__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__irq_intnr__irq_intnr__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__sw__sw__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__serial__serial__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__snmp__snmp__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__network__network__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__scsi1__scsi1__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__par1__par1__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__scsi1__par1__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__scsi0__scsi0__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__par0__par0__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__scsi0__par0__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__ata__ata__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__scsi0__ata__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__mio__mio__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__scsi0__mio__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__timer1__timer1__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__timer0__timer0__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__nmi__nmi__VAL REG_VAL_ENUM
+#define R_VECT_MASK_CLR__some__some__VAL REG_VAL_ENUM
+
+#define R_VECT_MASK_CLR__usb__usb__clr 1
+#define R_VECT_MASK_CLR__usb__usb__nop 0
+#define R_VECT_MASK_CLR__dma9__dma9__clr 1
+#define R_VECT_MASK_CLR__dma9__dma9__nop 0
+#define R_VECT_MASK_CLR__dma8__dma8__clr 1
+#define R_VECT_MASK_CLR__dma8__dma8__nop 0
+#define R_VECT_MASK_CLR__dma7__dma7__clr 1
+#define R_VECT_MASK_CLR__dma7__dma7__nop 0
+#define R_VECT_MASK_CLR__dma6__dma6__clr 1
+#define R_VECT_MASK_CLR__dma6__dma6__nop 0
+#define R_VECT_MASK_CLR__dma5__dma5__clr 1
+#define R_VECT_MASK_CLR__dma5__dma5__nop 0
+#define R_VECT_MASK_CLR__dma4__dma4__clr 1
+#define R_VECT_MASK_CLR__dma4__dma4__nop 0
+#define R_VECT_MASK_CLR__dma3__dma3__clr 1
+#define R_VECT_MASK_CLR__dma3__dma3__nop 0
+#define R_VECT_MASK_CLR__dma2__dma2__clr 1
+#define R_VECT_MASK_CLR__dma2__dma2__nop 0
+#define R_VECT_MASK_CLR__dma1__dma1__clr 1
+#define R_VECT_MASK_CLR__dma1__dma1__nop 0
+#define R_VECT_MASK_CLR__dma0__dma0__clr 1
+#define R_VECT_MASK_CLR__dma0__dma0__nop 0
+#define R_VECT_MASK_CLR__ext_dma1__ext_dma1__clr 1
+#define R_VECT_MASK_CLR__ext_dma1__ext_dma1__nop 0
+#define R_VECT_MASK_CLR__ext_dma0__ext_dma0__clr 1
+#define R_VECT_MASK_CLR__ext_dma0__ext_dma0__nop 0
+#define R_VECT_MASK_CLR__pa__pa__clr 1
+#define R_VECT_MASK_CLR__pa__pa__nop 0
+#define R_VECT_MASK_CLR__irq_intnr__irq_intnr__clr 1
+#define R_VECT_MASK_CLR__irq_intnr__irq_intnr__nop 0
+#define R_VECT_MASK_CLR__sw__sw__clr 1
+#define R_VECT_MASK_CLR__sw__sw__nop 0
+#define R_VECT_MASK_CLR__serial__serial__clr 1
+#define R_VECT_MASK_CLR__serial__serial__nop 0
+#define R_VECT_MASK_CLR__snmp__snmp__clr 1
+#define R_VECT_MASK_CLR__snmp__snmp__nop 0
+#define R_VECT_MASK_CLR__network__network__clr 1
+#define R_VECT_MASK_CLR__network__network__nop 0
+#define R_VECT_MASK_CLR__scsi1__scsi1__clr 1
+#define R_VECT_MASK_CLR__scsi1__scsi1__nop 0
+#define R_VECT_MASK_CLR__par1__par1__clr 1
+#define R_VECT_MASK_CLR__par1__par1__nop 0
+#define R_VECT_MASK_CLR__scsi0__scsi0__clr 1
+#define R_VECT_MASK_CLR__scsi0__scsi0__nop 0
+#define R_VECT_MASK_CLR__par0__par0__clr 1
+#define R_VECT_MASK_CLR__par0__par0__nop 0
+#define R_VECT_MASK_CLR__ata__ata__clr 1
+#define R_VECT_MASK_CLR__ata__ata__nop 0
+#define R_VECT_MASK_CLR__mio__mio__clr 1
+#define R_VECT_MASK_CLR__mio__mio__nop 0
+#define R_VECT_MASK_CLR__timer1__timer1__clr 1
+#define R_VECT_MASK_CLR__timer1__timer1__nop 0
+#define R_VECT_MASK_CLR__timer0__timer0__clr 1
+#define R_VECT_MASK_CLR__timer0__timer0__nop 0
+#define R_VECT_MASK_CLR__nmi__nmi__clr 1
+#define R_VECT_MASK_CLR__nmi__nmi__nop 0
+#define R_VECT_MASK_CLR__some__some__clr 1
+#define R_VECT_MASK_CLR__some__some__nop 0
+
+#endif
+
+/*
+ * R_VECT_MASK_RD
+ * - type: RO
+ * - addr: 0xb00000d8
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+#define R_VECT_MASK_RD__ADDR (REG_TYPECAST_UDWORD 0xb00000d8)
+#define R_VECT_MASK_RD__SVAL REG_SVAL_SHADOW
+#define R_VECT_MASK_RD__SVAL_I REG_SVAL_I_SHADOW
+#define R_VECT_MASK_RD__TYPECAST REG_TYPECAST_UDWORD
+#define R_VECT_MASK_RD__TYPE (REG_UDWORD)
+#define R_VECT_MASK_RD__GET REG_GET_RO
+#define R_VECT_MASK_RD__IGET REG_IGET_RO
+#define R_VECT_MASK_RD__SET REG_SET_RO
+#define R_VECT_MASK_RD__ISET REG_ISET_RO
+#define R_VECT_MASK_RD__SET_VAL REG_SET_VAL_RO
+#define R_VECT_MASK_RD__EQL REG_EQL_RO
+#define R_VECT_MASK_RD__IEQL REG_IEQL_RO
+#define R_VECT_MASK_RD__RD REG_RD_RO
+#define R_VECT_MASK_RD__IRD REG_IRD_RO
+#define R_VECT_MASK_RD__WR REG_WR_RO
+#define R_VECT_MASK_RD__IWR REG_IWR_RO
+
+#define R_VECT_MASK_RD__READ(addr) \
+ (*(addr))
+
+#define R_VECT_MASK_RD__usb__usb__MASK 0x80000000U
+#define R_VECT_MASK_RD__dma9__dma9__MASK 0x02000000U
+#define R_VECT_MASK_RD__dma8__dma8__MASK 0x01000000U
+#define R_VECT_MASK_RD__dma7__dma7__MASK 0x00800000U
+#define R_VECT_MASK_RD__dma6__dma6__MASK 0x00400000U
+#define R_VECT_MASK_RD__dma5__dma5__MASK 0x00200000U
+#define R_VECT_MASK_RD__dma4__dma4__MASK 0x00100000U
+#define R_VECT_MASK_RD__dma3__dma3__MASK 0x00080000U
+#define R_VECT_MASK_RD__dma2__dma2__MASK 0x00040000U
+#define R_VECT_MASK_RD__dma1__dma1__MASK 0x00020000U
+#define R_VECT_MASK_RD__dma0__dma0__MASK 0x00010000U
+#define R_VECT_MASK_RD__ext_dma1__ext_dma1__MASK 0x00002000U
+#define R_VECT_MASK_RD__ext_dma0__ext_dma0__MASK 0x00001000U
+#define R_VECT_MASK_RD__pa__pa__MASK 0x00000800U
+#define R_VECT_MASK_RD__irq_intnr__irq_intnr__MASK 0x00000400U
+#define R_VECT_MASK_RD__sw__sw__MASK 0x00000200U
+#define R_VECT_MASK_RD__serial__serial__MASK 0x00000100U
+#define R_VECT_MASK_RD__snmp__snmp__MASK 0x00000080U
+#define R_VECT_MASK_RD__network__network__MASK 0x00000040U
+#define R_VECT_MASK_RD__scsi1__scsi1__MASK 0x00000020U
+#define R_VECT_MASK_RD__par1__par1__MASK 0x00000020U
+#define R_VECT_MASK_RD__scsi1__par1__MASK 0x00000020U
+#define R_VECT_MASK_RD__scsi0__scsi0__MASK 0x00000010U
+#define R_VECT_MASK_RD__par0__par0__MASK 0x00000010U
+#define R_VECT_MASK_RD__scsi0__par0__MASK 0x00000010U
+#define R_VECT_MASK_RD__ata__ata__MASK 0x00000010U
+#define R_VECT_MASK_RD__scsi0__ata__MASK 0x00000010U
+#define R_VECT_MASK_RD__mio__mio__MASK 0x00000010U
+#define R_VECT_MASK_RD__scsi0__mio__MASK 0x00000010U
+#define R_VECT_MASK_RD__timer1__timer1__MASK 0x00000008U
+#define R_VECT_MASK_RD__timer0__timer0__MASK 0x00000004U
+#define R_VECT_MASK_RD__nmi__nmi__MASK 0x00000002U
+#define R_VECT_MASK_RD__some__some__MASK 0x00000001U
+
+#define R_VECT_MASK_RD__usb__MAX 0x1
+#define R_VECT_MASK_RD__dma9__MAX 0x1
+#define R_VECT_MASK_RD__dma8__MAX 0x1
+#define R_VECT_MASK_RD__dma7__MAX 0x1
+#define R_VECT_MASK_RD__dma6__MAX 0x1
+#define R_VECT_MASK_RD__dma5__MAX 0x1
+#define R_VECT_MASK_RD__dma4__MAX 0x1
+#define R_VECT_MASK_RD__dma3__MAX 0x1
+#define R_VECT_MASK_RD__dma2__MAX 0x1
+#define R_VECT_MASK_RD__dma1__MAX 0x1
+#define R_VECT_MASK_RD__dma0__MAX 0x1
+#define R_VECT_MASK_RD__ext_dma1__MAX 0x1
+#define R_VECT_MASK_RD__ext_dma0__MAX 0x1
+#define R_VECT_MASK_RD__pa__MAX 0x1
+#define R_VECT_MASK_RD__irq_intnr__MAX 0x1
+#define R_VECT_MASK_RD__sw__MAX 0x1
+#define R_VECT_MASK_RD__serial__MAX 0x1
+#define R_VECT_MASK_RD__snmp__MAX 0x1
+#define R_VECT_MASK_RD__network__MAX 0x1
+#define R_VECT_MASK_RD__scsi1__MAX 0x1
+#define R_VECT_MASK_RD__par1__MAX 0x1
+#define R_VECT_MASK_RD__scsi0__MAX 0x1
+#define R_VECT_MASK_RD__par0__MAX 0x1
+#define R_VECT_MASK_RD__ata__MAX 0x1
+#define R_VECT_MASK_RD__mio__MAX 0x1
+#define R_VECT_MASK_RD__timer1__MAX 0x1
+#define R_VECT_MASK_RD__timer0__MAX 0x1
+#define R_VECT_MASK_RD__nmi__MAX 0x1
+#define R_VECT_MASK_RD__some__MAX 0x1
+
+#define R_VECT_MASK_RD__usb__MIN 0
+#define R_VECT_MASK_RD__dma9__MIN 0
+#define R_VECT_MASK_RD__dma8__MIN 0
+#define R_VECT_MASK_RD__dma7__MIN 0
+#define R_VECT_MASK_RD__dma6__MIN 0
+#define R_VECT_MASK_RD__dma5__MIN 0
+#define R_VECT_MASK_RD__dma4__MIN 0
+#define R_VECT_MASK_RD__dma3__MIN 0
+#define R_VECT_MASK_RD__dma2__MIN 0
+#define R_VECT_MASK_RD__dma1__MIN 0
+#define R_VECT_MASK_RD__dma0__MIN 0
+#define R_VECT_MASK_RD__ext_dma1__MIN 0
+#define R_VECT_MASK_RD__ext_dma0__MIN 0
+#define R_VECT_MASK_RD__pa__MIN 0
+#define R_VECT_MASK_RD__irq_intnr__MIN 0
+#define R_VECT_MASK_RD__sw__MIN 0
+#define R_VECT_MASK_RD__serial__MIN 0
+#define R_VECT_MASK_RD__snmp__MIN 0
+#define R_VECT_MASK_RD__network__MIN 0
+#define R_VECT_MASK_RD__scsi1__MIN 0
+#define R_VECT_MASK_RD__par1__MIN 0
+#define R_VECT_MASK_RD__scsi0__MIN 0
+#define R_VECT_MASK_RD__par0__MIN 0
+#define R_VECT_MASK_RD__ata__MIN 0
+#define R_VECT_MASK_RD__mio__MIN 0
+#define R_VECT_MASK_RD__timer1__MIN 0
+#define R_VECT_MASK_RD__timer0__MIN 0
+#define R_VECT_MASK_RD__nmi__MIN 0
+#define R_VECT_MASK_RD__some__MIN 0
+
+#define R_VECT_MASK_RD__usb__BITNR 31
+#define R_VECT_MASK_RD__dma9__BITNR 25
+#define R_VECT_MASK_RD__dma8__BITNR 24
+#define R_VECT_MASK_RD__dma7__BITNR 23
+#define R_VECT_MASK_RD__dma6__BITNR 22
+#define R_VECT_MASK_RD__dma5__BITNR 21
+#define R_VECT_MASK_RD__dma4__BITNR 20
+#define R_VECT_MASK_RD__dma3__BITNR 19
+#define R_VECT_MASK_RD__dma2__BITNR 18
+#define R_VECT_MASK_RD__dma1__BITNR 17
+#define R_VECT_MASK_RD__dma0__BITNR 16
+#define R_VECT_MASK_RD__ext_dma1__BITNR 13
+#define R_VECT_MASK_RD__ext_dma0__BITNR 12
+#define R_VECT_MASK_RD__pa__BITNR 11
+#define R_VECT_MASK_RD__irq_intnr__BITNR 10
+#define R_VECT_MASK_RD__sw__BITNR 9
+#define R_VECT_MASK_RD__serial__BITNR 8
+#define R_VECT_MASK_RD__snmp__BITNR 7
+#define R_VECT_MASK_RD__network__BITNR 6
+#define R_VECT_MASK_RD__scsi1__BITNR 5
+#define R_VECT_MASK_RD__par1__BITNR 5
+#define R_VECT_MASK_RD__scsi0__BITNR 4
+#define R_VECT_MASK_RD__par0__BITNR 4
+#define R_VECT_MASK_RD__ata__BITNR 4
+#define R_VECT_MASK_RD__mio__BITNR 4
+#define R_VECT_MASK_RD__timer1__BITNR 3
+#define R_VECT_MASK_RD__timer0__BITNR 2
+#define R_VECT_MASK_RD__nmi__BITNR 1
+#define R_VECT_MASK_RD__some__BITNR 0
+
+#define R_VECT_MASK_RD__usb__usb__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__dma9__dma9__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__dma8__dma8__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__dma7__dma7__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__dma6__dma6__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__dma5__dma5__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__dma4__dma4__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__dma3__dma3__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__dma2__dma2__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__dma1__dma1__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__dma0__dma0__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__ext_dma1__ext_dma1__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__ext_dma0__ext_dma0__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__pa__pa__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__irq_intnr__irq_intnr__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__sw__sw__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__serial__serial__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__snmp__snmp__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__network__network__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__scsi1__scsi1__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__par1__par1__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__scsi1__par1__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__scsi0__scsi0__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__par0__par0__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__scsi0__par0__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__ata__ata__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__scsi0__ata__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__mio__mio__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__scsi0__mio__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__timer1__timer1__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__timer0__timer0__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__nmi__nmi__VAL REG_VAL_ENUM
+#define R_VECT_MASK_RD__some__some__VAL REG_VAL_ENUM
+
+#define R_VECT_MASK_RD__usb__usb__active 1
+#define R_VECT_MASK_RD__usb__usb__inactive 0
+#define R_VECT_MASK_RD__dma9__dma9__active 1
+#define R_VECT_MASK_RD__dma9__dma9__inactive 0
+#define R_VECT_MASK_RD__dma8__dma8__active 1
+#define R_VECT_MASK_RD__dma8__dma8__inactive 0
+#define R_VECT_MASK_RD__dma7__dma7__active 1
+#define R_VECT_MASK_RD__dma7__dma7__inactive 0
+#define R_VECT_MASK_RD__dma6__dma6__active 1
+#define R_VECT_MASK_RD__dma6__dma6__inactive 0
+#define R_VECT_MASK_RD__dma5__dma5__active 1
+#define R_VECT_MASK_RD__dma5__dma5__inactive 0
+#define R_VECT_MASK_RD__dma4__dma4__active 1
+#define R_VECT_MASK_RD__dma4__dma4__inactive 0
+#define R_VECT_MASK_RD__dma3__dma3__active 1
+#define R_VECT_MASK_RD__dma3__dma3__inactive 0
+#define R_VECT_MASK_RD__dma2__dma2__active 1
+#define R_VECT_MASK_RD__dma2__dma2__inactive 0
+#define R_VECT_MASK_RD__dma1__dma1__active 1
+#define R_VECT_MASK_RD__dma1__dma1__inactive 0
+#define R_VECT_MASK_RD__dma0__dma0__active 1
+#define R_VECT_MASK_RD__dma0__dma0__inactive 0
+#define R_VECT_MASK_RD__ext_dma1__ext_dma1__active 1
+#define R_VECT_MASK_RD__ext_dma1__ext_dma1__inactive 0
+#define R_VECT_MASK_RD__ext_dma0__ext_dma0__active 1
+#define R_VECT_MASK_RD__ext_dma0__ext_dma0__inactive 0
+#define R_VECT_MASK_RD__pa__pa__active 1
+#define R_VECT_MASK_RD__pa__pa__inactive 0
+#define R_VECT_MASK_RD__irq_intnr__irq_intnr__active 1
+#define R_VECT_MASK_RD__irq_intnr__irq_intnr__inactive 0
+#define R_VECT_MASK_RD__sw__sw__active 1
+#define R_VECT_MASK_RD__sw__sw__inactive 0
+#define R_VECT_MASK_RD__serial__serial__active 1
+#define R_VECT_MASK_RD__serial__serial__inactive 0
+#define R_VECT_MASK_RD__snmp__snmp__active 1
+#define R_VECT_MASK_RD__snmp__snmp__inactive 0
+#define R_VECT_MASK_RD__network__network__active 1
+#define R_VECT_MASK_RD__network__network__inactive 0
+#define R_VECT_MASK_RD__scsi1__scsi1__active 1
+#define R_VECT_MASK_RD__scsi1__scsi1__inactive 0
+#define R_VECT_MASK_RD__par1__par1__active 1
+#define R_VECT_MASK_RD__par1__par1__inactive 0
+#define R_VECT_MASK_RD__scsi0__scsi0__active 1
+#define R_VECT_MASK_RD__scsi0__scsi0__inactive 0
+#define R_VECT_MASK_RD__par0__par0__active 1
+#define R_VECT_MASK_RD__par0__par0__inactive 0
+#define R_VECT_MASK_RD__ata__ata__active 1
+#define R_VECT_MASK_RD__ata__ata__inactive 0
+#define R_VECT_MASK_RD__mio__mio__active 1
+#define R_VECT_MASK_RD__mio__mio__inactive 0
+#define R_VECT_MASK_RD__timer1__timer1__active 1
+#define R_VECT_MASK_RD__timer1__timer1__inactive 0
+#define R_VECT_MASK_RD__timer0__timer0__active 1
+#define R_VECT_MASK_RD__timer0__timer0__inactive 0
+#define R_VECT_MASK_RD__nmi__nmi__active 1
+#define R_VECT_MASK_RD__nmi__nmi__inactive 0
+#define R_VECT_MASK_RD__some__some__active 1
+#define R_VECT_MASK_RD__some__some__inactive 0
+
+#endif
+
+/*
+ * R_VECT_MASK_SET
+ * - type: WO
+ * - addr: 0xb00000dc
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+#define R_VECT_MASK_SET__ADDR (REG_TYPECAST_UDWORD 0xb00000dc)
+
+#ifndef REG_NO_SHADOW
+#define R_VECT_MASK_SET__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_VECT_MASK_SET + 0))
+#define R_VECT_MASK_SET__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_VECT_MASK_SET + 0))
+#else /* REG_NO_SHADOW */
+#define R_VECT_MASK_SET__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_VECT_MASK_SET__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_VECT_MASK_SET__STYPECAST REG_STYPECAST_UDWORD
+#define R_VECT_MASK_SET__SVAL REG_SVAL_ZERO
+#define R_VECT_MASK_SET__SVAL_I REG_SVAL_I_ZERO
+#define R_VECT_MASK_SET__TYPECAST REG_TYPECAST_UDWORD
+#define R_VECT_MASK_SET__TYPE (REG_UDWORD)
+#define R_VECT_MASK_SET__GET REG_GET_WO
+#define R_VECT_MASK_SET__IGET REG_IGET_WO
+#define R_VECT_MASK_SET__SET REG_SET_WO
+#define R_VECT_MASK_SET__ISET REG_ISET_WO
+#define R_VECT_MASK_SET__SET_VAL REG_SET_VAL_WO
+#define R_VECT_MASK_SET__EQL REG_EQL_WO
+#define R_VECT_MASK_SET__IEQL REG_IEQL_WO
+#define R_VECT_MASK_SET__RD REG_RD_WO
+#define R_VECT_MASK_SET__IRD REG_IRD_WO
+#define R_VECT_MASK_SET__WR REG_WR_WO
+#define R_VECT_MASK_SET__IWR REG_IWR_WO
+
+#define R_VECT_MASK_SET__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_VECT_MASK_SET__usb__usb__MASK 0x80000000U
+#define R_VECT_MASK_SET__dma9__dma9__MASK 0x02000000U
+#define R_VECT_MASK_SET__dma8__dma8__MASK 0x01000000U
+#define R_VECT_MASK_SET__dma7__dma7__MASK 0x00800000U
+#define R_VECT_MASK_SET__dma6__dma6__MASK 0x00400000U
+#define R_VECT_MASK_SET__dma5__dma5__MASK 0x00200000U
+#define R_VECT_MASK_SET__dma4__dma4__MASK 0x00100000U
+#define R_VECT_MASK_SET__dma3__dma3__MASK 0x00080000U
+#define R_VECT_MASK_SET__dma2__dma2__MASK 0x00040000U
+#define R_VECT_MASK_SET__dma1__dma1__MASK 0x00020000U
+#define R_VECT_MASK_SET__dma0__dma0__MASK 0x00010000U
+#define R_VECT_MASK_SET__ext_dma1__ext_dma1__MASK 0x00002000U
+#define R_VECT_MASK_SET__ext_dma0__ext_dma0__MASK 0x00001000U
+#define R_VECT_MASK_SET__pa__pa__MASK 0x00000800U
+#define R_VECT_MASK_SET__irq_intnr__irq_intnr__MASK 0x00000400U
+#define R_VECT_MASK_SET__sw__sw__MASK 0x00000200U
+#define R_VECT_MASK_SET__serial__serial__MASK 0x00000100U
+#define R_VECT_MASK_SET__snmp__snmp__MASK 0x00000080U
+#define R_VECT_MASK_SET__network__network__MASK 0x00000040U
+#define R_VECT_MASK_SET__scsi1__scsi1__MASK 0x00000020U
+#define R_VECT_MASK_SET__par1__par1__MASK 0x00000020U
+#define R_VECT_MASK_SET__scsi1__par1__MASK 0x00000020U
+#define R_VECT_MASK_SET__scsi0__scsi0__MASK 0x00000010U
+#define R_VECT_MASK_SET__par0__par0__MASK 0x00000010U
+#define R_VECT_MASK_SET__scsi0__par0__MASK 0x00000010U
+#define R_VECT_MASK_SET__ata__ata__MASK 0x00000010U
+#define R_VECT_MASK_SET__scsi0__ata__MASK 0x00000010U
+#define R_VECT_MASK_SET__mio__mio__MASK 0x00000010U
+#define R_VECT_MASK_SET__scsi0__mio__MASK 0x00000010U
+#define R_VECT_MASK_SET__timer1__timer1__MASK 0x00000008U
+#define R_VECT_MASK_SET__timer0__timer0__MASK 0x00000004U
+#define R_VECT_MASK_SET__nmi__nmi__MASK 0x00000002U
+#define R_VECT_MASK_SET__some__some__MASK 0x00000001U
+
+#define R_VECT_MASK_SET__usb__MAX 0x1
+#define R_VECT_MASK_SET__dma9__MAX 0x1
+#define R_VECT_MASK_SET__dma8__MAX 0x1
+#define R_VECT_MASK_SET__dma7__MAX 0x1
+#define R_VECT_MASK_SET__dma6__MAX 0x1
+#define R_VECT_MASK_SET__dma5__MAX 0x1
+#define R_VECT_MASK_SET__dma4__MAX 0x1
+#define R_VECT_MASK_SET__dma3__MAX 0x1
+#define R_VECT_MASK_SET__dma2__MAX 0x1
+#define R_VECT_MASK_SET__dma1__MAX 0x1
+#define R_VECT_MASK_SET__dma0__MAX 0x1
+#define R_VECT_MASK_SET__ext_dma1__MAX 0x1
+#define R_VECT_MASK_SET__ext_dma0__MAX 0x1
+#define R_VECT_MASK_SET__pa__MAX 0x1
+#define R_VECT_MASK_SET__irq_intnr__MAX 0x1
+#define R_VECT_MASK_SET__sw__MAX 0x1
+#define R_VECT_MASK_SET__serial__MAX 0x1
+#define R_VECT_MASK_SET__snmp__MAX 0x1
+#define R_VECT_MASK_SET__network__MAX 0x1
+#define R_VECT_MASK_SET__scsi1__MAX 0x1
+#define R_VECT_MASK_SET__par1__MAX 0x1
+#define R_VECT_MASK_SET__scsi0__MAX 0x1
+#define R_VECT_MASK_SET__par0__MAX 0x1
+#define R_VECT_MASK_SET__ata__MAX 0x1
+#define R_VECT_MASK_SET__mio__MAX 0x1
+#define R_VECT_MASK_SET__timer1__MAX 0x1
+#define R_VECT_MASK_SET__timer0__MAX 0x1
+#define R_VECT_MASK_SET__nmi__MAX 0x1
+#define R_VECT_MASK_SET__some__MAX 0x1
+
+#define R_VECT_MASK_SET__usb__MIN 0
+#define R_VECT_MASK_SET__dma9__MIN 0
+#define R_VECT_MASK_SET__dma8__MIN 0
+#define R_VECT_MASK_SET__dma7__MIN 0
+#define R_VECT_MASK_SET__dma6__MIN 0
+#define R_VECT_MASK_SET__dma5__MIN 0
+#define R_VECT_MASK_SET__dma4__MIN 0
+#define R_VECT_MASK_SET__dma3__MIN 0
+#define R_VECT_MASK_SET__dma2__MIN 0
+#define R_VECT_MASK_SET__dma1__MIN 0
+#define R_VECT_MASK_SET__dma0__MIN 0
+#define R_VECT_MASK_SET__ext_dma1__MIN 0
+#define R_VECT_MASK_SET__ext_dma0__MIN 0
+#define R_VECT_MASK_SET__pa__MIN 0
+#define R_VECT_MASK_SET__irq_intnr__MIN 0
+#define R_VECT_MASK_SET__sw__MIN 0
+#define R_VECT_MASK_SET__serial__MIN 0
+#define R_VECT_MASK_SET__snmp__MIN 0
+#define R_VECT_MASK_SET__network__MIN 0
+#define R_VECT_MASK_SET__scsi1__MIN 0
+#define R_VECT_MASK_SET__par1__MIN 0
+#define R_VECT_MASK_SET__scsi0__MIN 0
+#define R_VECT_MASK_SET__par0__MIN 0
+#define R_VECT_MASK_SET__ata__MIN 0
+#define R_VECT_MASK_SET__mio__MIN 0
+#define R_VECT_MASK_SET__timer1__MIN 0
+#define R_VECT_MASK_SET__timer0__MIN 0
+#define R_VECT_MASK_SET__nmi__MIN 0
+#define R_VECT_MASK_SET__some__MIN 0
+
+#define R_VECT_MASK_SET__usb__BITNR 31
+#define R_VECT_MASK_SET__dma9__BITNR 25
+#define R_VECT_MASK_SET__dma8__BITNR 24
+#define R_VECT_MASK_SET__dma7__BITNR 23
+#define R_VECT_MASK_SET__dma6__BITNR 22
+#define R_VECT_MASK_SET__dma5__BITNR 21
+#define R_VECT_MASK_SET__dma4__BITNR 20
+#define R_VECT_MASK_SET__dma3__BITNR 19
+#define R_VECT_MASK_SET__dma2__BITNR 18
+#define R_VECT_MASK_SET__dma1__BITNR 17
+#define R_VECT_MASK_SET__dma0__BITNR 16
+#define R_VECT_MASK_SET__ext_dma1__BITNR 13
+#define R_VECT_MASK_SET__ext_dma0__BITNR 12
+#define R_VECT_MASK_SET__pa__BITNR 11
+#define R_VECT_MASK_SET__irq_intnr__BITNR 10
+#define R_VECT_MASK_SET__sw__BITNR 9
+#define R_VECT_MASK_SET__serial__BITNR 8
+#define R_VECT_MASK_SET__snmp__BITNR 7
+#define R_VECT_MASK_SET__network__BITNR 6
+#define R_VECT_MASK_SET__scsi1__BITNR 5
+#define R_VECT_MASK_SET__par1__BITNR 5
+#define R_VECT_MASK_SET__scsi0__BITNR 4
+#define R_VECT_MASK_SET__par0__BITNR 4
+#define R_VECT_MASK_SET__ata__BITNR 4
+#define R_VECT_MASK_SET__mio__BITNR 4
+#define R_VECT_MASK_SET__timer1__BITNR 3
+#define R_VECT_MASK_SET__timer0__BITNR 2
+#define R_VECT_MASK_SET__nmi__BITNR 1
+#define R_VECT_MASK_SET__some__BITNR 0
+
+#define R_VECT_MASK_SET__usb__usb__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__dma9__dma9__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__dma8__dma8__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__dma7__dma7__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__dma6__dma6__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__dma5__dma5__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__dma4__dma4__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__dma3__dma3__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__dma2__dma2__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__dma1__dma1__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__dma0__dma0__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__ext_dma1__ext_dma1__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__ext_dma0__ext_dma0__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__pa__pa__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__irq_intnr__irq_intnr__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__sw__sw__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__serial__serial__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__snmp__snmp__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__network__network__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__scsi1__scsi1__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__par1__par1__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__scsi1__par1__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__scsi0__scsi0__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__par0__par0__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__scsi0__par0__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__ata__ata__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__scsi0__ata__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__mio__mio__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__scsi0__mio__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__timer1__timer1__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__timer0__timer0__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__nmi__nmi__VAL REG_VAL_ENUM
+#define R_VECT_MASK_SET__some__some__VAL REG_VAL_ENUM
+
+#define R_VECT_MASK_SET__usb__usb__nop 0
+#define R_VECT_MASK_SET__usb__usb__set 1
+#define R_VECT_MASK_SET__dma9__dma9__nop 0
+#define R_VECT_MASK_SET__dma9__dma9__set 1
+#define R_VECT_MASK_SET__dma8__dma8__nop 0
+#define R_VECT_MASK_SET__dma8__dma8__set 1
+#define R_VECT_MASK_SET__dma7__dma7__nop 0
+#define R_VECT_MASK_SET__dma7__dma7__set 1
+#define R_VECT_MASK_SET__dma6__dma6__nop 0
+#define R_VECT_MASK_SET__dma6__dma6__set 1
+#define R_VECT_MASK_SET__dma5__dma5__nop 0
+#define R_VECT_MASK_SET__dma5__dma5__set 1
+#define R_VECT_MASK_SET__dma4__dma4__nop 0
+#define R_VECT_MASK_SET__dma4__dma4__set 1
+#define R_VECT_MASK_SET__dma3__dma3__nop 0
+#define R_VECT_MASK_SET__dma3__dma3__set 1
+#define R_VECT_MASK_SET__dma2__dma2__nop 0
+#define R_VECT_MASK_SET__dma2__dma2__set 1
+#define R_VECT_MASK_SET__dma1__dma1__nop 0
+#define R_VECT_MASK_SET__dma1__dma1__set 1
+#define R_VECT_MASK_SET__dma0__dma0__nop 0
+#define R_VECT_MASK_SET__dma0__dma0__set 1
+#define R_VECT_MASK_SET__ext_dma1__ext_dma1__nop 0
+#define R_VECT_MASK_SET__ext_dma1__ext_dma1__set 1
+#define R_VECT_MASK_SET__ext_dma0__ext_dma0__nop 0
+#define R_VECT_MASK_SET__ext_dma0__ext_dma0__set 1
+#define R_VECT_MASK_SET__pa__pa__nop 0
+#define R_VECT_MASK_SET__pa__pa__set 1
+#define R_VECT_MASK_SET__irq_intnr__irq_intnr__nop 0
+#define R_VECT_MASK_SET__irq_intnr__irq_intnr__set 1
+#define R_VECT_MASK_SET__sw__sw__nop 0
+#define R_VECT_MASK_SET__sw__sw__set 1
+#define R_VECT_MASK_SET__serial__serial__nop 0
+#define R_VECT_MASK_SET__serial__serial__set 1
+#define R_VECT_MASK_SET__snmp__snmp__nop 0
+#define R_VECT_MASK_SET__snmp__snmp__set 1
+#define R_VECT_MASK_SET__network__network__nop 0
+#define R_VECT_MASK_SET__network__network__set 1
+#define R_VECT_MASK_SET__scsi1__scsi1__nop 0
+#define R_VECT_MASK_SET__scsi1__scsi1__set 1
+#define R_VECT_MASK_SET__par1__par1__nop 0
+#define R_VECT_MASK_SET__par1__par1__set 1
+#define R_VECT_MASK_SET__scsi0__scsi0__nop 0
+#define R_VECT_MASK_SET__scsi0__scsi0__set 1
+#define R_VECT_MASK_SET__par0__par0__nop 0
+#define R_VECT_MASK_SET__par0__par0__set 1
+#define R_VECT_MASK_SET__ata__ata__nop 0
+#define R_VECT_MASK_SET__ata__ata__set 1
+#define R_VECT_MASK_SET__mio__mio__nop 0
+#define R_VECT_MASK_SET__mio__mio__set 1
+#define R_VECT_MASK_SET__timer1__timer1__nop 0
+#define R_VECT_MASK_SET__timer1__timer1__set 1
+#define R_VECT_MASK_SET__timer0__timer0__nop 0
+#define R_VECT_MASK_SET__timer0__timer0__set 1
+#define R_VECT_MASK_SET__nmi__nmi__nop 0
+#define R_VECT_MASK_SET__nmi__nmi__set 1
+#define R_VECT_MASK_SET__some__some__nop 0
+#define R_VECT_MASK_SET__some__some__set 1
+
+#endif
+
+/*
+ * R_VECT_READ
+ * - type: RO
+ * - addr: 0xb00000dc
+ * - group: Interrupt mask and status registers
+ */
+
+#if USE_GROUP__Interrupt_mask_and_status_registers
+
+#define R_VECT_READ__ADDR (REG_TYPECAST_UDWORD 0xb00000dc)
+#define R_VECT_READ__SVAL REG_SVAL_SHADOW
+#define R_VECT_READ__SVAL_I REG_SVAL_I_SHADOW
+#define R_VECT_READ__TYPECAST REG_TYPECAST_UDWORD
+#define R_VECT_READ__TYPE (REG_UDWORD)
+#define R_VECT_READ__GET REG_GET_RO
+#define R_VECT_READ__IGET REG_IGET_RO
+#define R_VECT_READ__SET REG_SET_RO
+#define R_VECT_READ__ISET REG_ISET_RO
+#define R_VECT_READ__SET_VAL REG_SET_VAL_RO
+#define R_VECT_READ__EQL REG_EQL_RO
+#define R_VECT_READ__IEQL REG_IEQL_RO
+#define R_VECT_READ__RD REG_RD_RO
+#define R_VECT_READ__IRD REG_IRD_RO
+#define R_VECT_READ__WR REG_WR_RO
+#define R_VECT_READ__IWR REG_IWR_RO
+
+#define R_VECT_READ__READ(addr) \
+ (*(addr))
+
+#define R_VECT_READ__usb__usb__MASK 0x80000000U
+#define R_VECT_READ__dma9__dma9__MASK 0x02000000U
+#define R_VECT_READ__dma8__dma8__MASK 0x01000000U
+#define R_VECT_READ__dma7__dma7__MASK 0x00800000U
+#define R_VECT_READ__dma6__dma6__MASK 0x00400000U
+#define R_VECT_READ__dma5__dma5__MASK 0x00200000U
+#define R_VECT_READ__dma4__dma4__MASK 0x00100000U
+#define R_VECT_READ__dma3__dma3__MASK 0x00080000U
+#define R_VECT_READ__dma2__dma2__MASK 0x00040000U
+#define R_VECT_READ__dma1__dma1__MASK 0x00020000U
+#define R_VECT_READ__dma0__dma0__MASK 0x00010000U
+#define R_VECT_READ__ext_dma1__ext_dma1__MASK 0x00002000U
+#define R_VECT_READ__ext_dma0__ext_dma0__MASK 0x00001000U
+#define R_VECT_READ__pa__pa__MASK 0x00000800U
+#define R_VECT_READ__irq_intnr__irq_intnr__MASK 0x00000400U
+#define R_VECT_READ__sw__sw__MASK 0x00000200U
+#define R_VECT_READ__serial__serial__MASK 0x00000100U
+#define R_VECT_READ__snmp__snmp__MASK 0x00000080U
+#define R_VECT_READ__network__network__MASK 0x00000040U
+#define R_VECT_READ__scsi1__scsi1__MASK 0x00000020U
+#define R_VECT_READ__par1__par1__MASK 0x00000020U
+#define R_VECT_READ__scsi1__par1__MASK 0x00000020U
+#define R_VECT_READ__scsi0__scsi0__MASK 0x00000010U
+#define R_VECT_READ__par0__par0__MASK 0x00000010U
+#define R_VECT_READ__scsi0__par0__MASK 0x00000010U
+#define R_VECT_READ__ata__ata__MASK 0x00000010U
+#define R_VECT_READ__scsi0__ata__MASK 0x00000010U
+#define R_VECT_READ__mio__mio__MASK 0x00000010U
+#define R_VECT_READ__scsi0__mio__MASK 0x00000010U
+#define R_VECT_READ__timer1__timer1__MASK 0x00000008U
+#define R_VECT_READ__timer0__timer0__MASK 0x00000004U
+#define R_VECT_READ__nmi__nmi__MASK 0x00000002U
+#define R_VECT_READ__some__some__MASK 0x00000001U
+
+#define R_VECT_READ__usb__MAX 0x1
+#define R_VECT_READ__dma9__MAX 0x1
+#define R_VECT_READ__dma8__MAX 0x1
+#define R_VECT_READ__dma7__MAX 0x1
+#define R_VECT_READ__dma6__MAX 0x1
+#define R_VECT_READ__dma5__MAX 0x1
+#define R_VECT_READ__dma4__MAX 0x1
+#define R_VECT_READ__dma3__MAX 0x1
+#define R_VECT_READ__dma2__MAX 0x1
+#define R_VECT_READ__dma1__MAX 0x1
+#define R_VECT_READ__dma0__MAX 0x1
+#define R_VECT_READ__ext_dma1__MAX 0x1
+#define R_VECT_READ__ext_dma0__MAX 0x1
+#define R_VECT_READ__pa__MAX 0x1
+#define R_VECT_READ__irq_intnr__MAX 0x1
+#define R_VECT_READ__sw__MAX 0x1
+#define R_VECT_READ__serial__MAX 0x1
+#define R_VECT_READ__snmp__MAX 0x1
+#define R_VECT_READ__network__MAX 0x1
+#define R_VECT_READ__scsi1__MAX 0x1
+#define R_VECT_READ__par1__MAX 0x1
+#define R_VECT_READ__scsi0__MAX 0x1
+#define R_VECT_READ__par0__MAX 0x1
+#define R_VECT_READ__ata__MAX 0x1
+#define R_VECT_READ__mio__MAX 0x1
+#define R_VECT_READ__timer1__MAX 0x1
+#define R_VECT_READ__timer0__MAX 0x1
+#define R_VECT_READ__nmi__MAX 0x1
+#define R_VECT_READ__some__MAX 0x1
+
+#define R_VECT_READ__usb__MIN 0
+#define R_VECT_READ__dma9__MIN 0
+#define R_VECT_READ__dma8__MIN 0
+#define R_VECT_READ__dma7__MIN 0
+#define R_VECT_READ__dma6__MIN 0
+#define R_VECT_READ__dma5__MIN 0
+#define R_VECT_READ__dma4__MIN 0
+#define R_VECT_READ__dma3__MIN 0
+#define R_VECT_READ__dma2__MIN 0
+#define R_VECT_READ__dma1__MIN 0
+#define R_VECT_READ__dma0__MIN 0
+#define R_VECT_READ__ext_dma1__MIN 0
+#define R_VECT_READ__ext_dma0__MIN 0
+#define R_VECT_READ__pa__MIN 0
+#define R_VECT_READ__irq_intnr__MIN 0
+#define R_VECT_READ__sw__MIN 0
+#define R_VECT_READ__serial__MIN 0
+#define R_VECT_READ__snmp__MIN 0
+#define R_VECT_READ__network__MIN 0
+#define R_VECT_READ__scsi1__MIN 0
+#define R_VECT_READ__par1__MIN 0
+#define R_VECT_READ__scsi0__MIN 0
+#define R_VECT_READ__par0__MIN 0
+#define R_VECT_READ__ata__MIN 0
+#define R_VECT_READ__mio__MIN 0
+#define R_VECT_READ__timer1__MIN 0
+#define R_VECT_READ__timer0__MIN 0
+#define R_VECT_READ__nmi__MIN 0
+#define R_VECT_READ__some__MIN 0
+
+#define R_VECT_READ__usb__BITNR 31
+#define R_VECT_READ__dma9__BITNR 25
+#define R_VECT_READ__dma8__BITNR 24
+#define R_VECT_READ__dma7__BITNR 23
+#define R_VECT_READ__dma6__BITNR 22
+#define R_VECT_READ__dma5__BITNR 21
+#define R_VECT_READ__dma4__BITNR 20
+#define R_VECT_READ__dma3__BITNR 19
+#define R_VECT_READ__dma2__BITNR 18
+#define R_VECT_READ__dma1__BITNR 17
+#define R_VECT_READ__dma0__BITNR 16
+#define R_VECT_READ__ext_dma1__BITNR 13
+#define R_VECT_READ__ext_dma0__BITNR 12
+#define R_VECT_READ__pa__BITNR 11
+#define R_VECT_READ__irq_intnr__BITNR 10
+#define R_VECT_READ__sw__BITNR 9
+#define R_VECT_READ__serial__BITNR 8
+#define R_VECT_READ__snmp__BITNR 7
+#define R_VECT_READ__network__BITNR 6
+#define R_VECT_READ__scsi1__BITNR 5
+#define R_VECT_READ__par1__BITNR 5
+#define R_VECT_READ__scsi0__BITNR 4
+#define R_VECT_READ__par0__BITNR 4
+#define R_VECT_READ__ata__BITNR 4
+#define R_VECT_READ__mio__BITNR 4
+#define R_VECT_READ__timer1__BITNR 3
+#define R_VECT_READ__timer0__BITNR 2
+#define R_VECT_READ__nmi__BITNR 1
+#define R_VECT_READ__some__BITNR 0
+
+#define R_VECT_READ__usb__usb__VAL REG_VAL_ENUM
+#define R_VECT_READ__dma9__dma9__VAL REG_VAL_ENUM
+#define R_VECT_READ__dma8__dma8__VAL REG_VAL_ENUM
+#define R_VECT_READ__dma7__dma7__VAL REG_VAL_ENUM
+#define R_VECT_READ__dma6__dma6__VAL REG_VAL_ENUM
+#define R_VECT_READ__dma5__dma5__VAL REG_VAL_ENUM
+#define R_VECT_READ__dma4__dma4__VAL REG_VAL_ENUM
+#define R_VECT_READ__dma3__dma3__VAL REG_VAL_ENUM
+#define R_VECT_READ__dma2__dma2__VAL REG_VAL_ENUM
+#define R_VECT_READ__dma1__dma1__VAL REG_VAL_ENUM
+#define R_VECT_READ__dma0__dma0__VAL REG_VAL_ENUM
+#define R_VECT_READ__ext_dma1__ext_dma1__VAL REG_VAL_ENUM
+#define R_VECT_READ__ext_dma0__ext_dma0__VAL REG_VAL_ENUM
+#define R_VECT_READ__pa__pa__VAL REG_VAL_ENUM
+#define R_VECT_READ__irq_intnr__irq_intnr__VAL REG_VAL_ENUM
+#define R_VECT_READ__sw__sw__VAL REG_VAL_ENUM
+#define R_VECT_READ__serial__serial__VAL REG_VAL_ENUM
+#define R_VECT_READ__snmp__snmp__VAL REG_VAL_ENUM
+#define R_VECT_READ__network__network__VAL REG_VAL_ENUM
+#define R_VECT_READ__scsi1__scsi1__VAL REG_VAL_ENUM
+#define R_VECT_READ__par1__par1__VAL REG_VAL_ENUM
+#define R_VECT_READ__scsi1__par1__VAL REG_VAL_ENUM
+#define R_VECT_READ__scsi0__scsi0__VAL REG_VAL_ENUM
+#define R_VECT_READ__par0__par0__VAL REG_VAL_ENUM
+#define R_VECT_READ__scsi0__par0__VAL REG_VAL_ENUM
+#define R_VECT_READ__ata__ata__VAL REG_VAL_ENUM
+#define R_VECT_READ__scsi0__ata__VAL REG_VAL_ENUM
+#define R_VECT_READ__mio__mio__VAL REG_VAL_ENUM
+#define R_VECT_READ__scsi0__mio__VAL REG_VAL_ENUM
+#define R_VECT_READ__timer1__timer1__VAL REG_VAL_ENUM
+#define R_VECT_READ__timer0__timer0__VAL REG_VAL_ENUM
+#define R_VECT_READ__nmi__nmi__VAL REG_VAL_ENUM
+#define R_VECT_READ__some__some__VAL REG_VAL_ENUM
+
+#define R_VECT_READ__usb__usb__active 1
+#define R_VECT_READ__usb__usb__inactive 0
+#define R_VECT_READ__dma9__dma9__active 1
+#define R_VECT_READ__dma9__dma9__inactive 0
+#define R_VECT_READ__dma8__dma8__active 1
+#define R_VECT_READ__dma8__dma8__inactive 0
+#define R_VECT_READ__dma7__dma7__active 1
+#define R_VECT_READ__dma7__dma7__inactive 0
+#define R_VECT_READ__dma6__dma6__active 1
+#define R_VECT_READ__dma6__dma6__inactive 0
+#define R_VECT_READ__dma5__dma5__active 1
+#define R_VECT_READ__dma5__dma5__inactive 0
+#define R_VECT_READ__dma4__dma4__active 1
+#define R_VECT_READ__dma4__dma4__inactive 0
+#define R_VECT_READ__dma3__dma3__active 1
+#define R_VECT_READ__dma3__dma3__inactive 0
+#define R_VECT_READ__dma2__dma2__active 1
+#define R_VECT_READ__dma2__dma2__inactive 0
+#define R_VECT_READ__dma1__dma1__active 1
+#define R_VECT_READ__dma1__dma1__inactive 0
+#define R_VECT_READ__dma0__dma0__active 1
+#define R_VECT_READ__dma0__dma0__inactive 0
+#define R_VECT_READ__ext_dma1__ext_dma1__active 1
+#define R_VECT_READ__ext_dma1__ext_dma1__inactive 0
+#define R_VECT_READ__ext_dma0__ext_dma0__active 1
+#define R_VECT_READ__ext_dma0__ext_dma0__inactive 0
+#define R_VECT_READ__pa__pa__active 1
+#define R_VECT_READ__pa__pa__inactive 0
+#define R_VECT_READ__irq_intnr__irq_intnr__active 1
+#define R_VECT_READ__irq_intnr__irq_intnr__inactive 0
+#define R_VECT_READ__sw__sw__active 1
+#define R_VECT_READ__sw__sw__inactive 0
+#define R_VECT_READ__serial__serial__active 1
+#define R_VECT_READ__serial__serial__inactive 0
+#define R_VECT_READ__snmp__snmp__active 1
+#define R_VECT_READ__snmp__snmp__inactive 0
+#define R_VECT_READ__network__network__active 1
+#define R_VECT_READ__network__network__inactive 0
+#define R_VECT_READ__scsi1__scsi1__active 1
+#define R_VECT_READ__scsi1__scsi1__inactive 0
+#define R_VECT_READ__par1__par1__active 1
+#define R_VECT_READ__par1__par1__inactive 0
+#define R_VECT_READ__scsi0__scsi0__active 1
+#define R_VECT_READ__scsi0__scsi0__inactive 0
+#define R_VECT_READ__par0__par0__active 1
+#define R_VECT_READ__par0__par0__inactive 0
+#define R_VECT_READ__ata__ata__active 1
+#define R_VECT_READ__ata__ata__inactive 0
+#define R_VECT_READ__mio__mio__active 1
+#define R_VECT_READ__mio__mio__inactive 0
+#define R_VECT_READ__timer1__timer1__active 1
+#define R_VECT_READ__timer1__timer1__inactive 0
+#define R_VECT_READ__timer0__timer0__active 1
+#define R_VECT_READ__timer0__timer0__inactive 0
+#define R_VECT_READ__nmi__nmi__active 1
+#define R_VECT_READ__nmi__nmi__inactive 0
+#define R_VECT_READ__some__some__active 1
+#define R_VECT_READ__some__some__inactive 0
+
+#endif
+
+/*
+ * R_WAITSTATES
+ * - type: WO
+ * - addr: 0xb0000000
+ * - group: Bus interface configuration registers
+ */
+
+#if USE_GROUP__Bus_interface_configuration_registers
+
+#define R_WAITSTATES__ADDR (REG_TYPECAST_UDWORD 0xb0000000)
+
+#ifndef REG_NO_SHADOW
+#define R_WAITSTATES__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_WAITSTATES + 0))
+#define R_WAITSTATES__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_WAITSTATES + 0))
+#else /* REG_NO_SHADOW */
+#define R_WAITSTATES__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_WAITSTATES__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_WAITSTATES__STYPECAST REG_STYPECAST_UDWORD
+#define R_WAITSTATES__SVAL REG_SVAL_SHADOW
+#define R_WAITSTATES__SVAL_I REG_SVAL_I_SHADOW
+#define R_WAITSTATES__TYPECAST REG_TYPECAST_UDWORD
+#define R_WAITSTATES__TYPE (REG_UDWORD)
+#define R_WAITSTATES__GET REG_GET_WO
+#define R_WAITSTATES__IGET REG_IGET_WO
+#define R_WAITSTATES__SET REG_SET_WO
+#define R_WAITSTATES__ISET REG_ISET_WO
+#define R_WAITSTATES__SET_VAL REG_SET_VAL_WO
+#define R_WAITSTATES__EQL REG_EQL_WO
+#define R_WAITSTATES__IEQL REG_IEQL_WO
+#define R_WAITSTATES__RD REG_RD_WO
+#define R_WAITSTATES__IRD REG_IRD_WO
+#define R_WAITSTATES__WR REG_WR_WO
+#define R_WAITSTATES__IWR REG_IWR_WO
+
+#define R_WAITSTATES__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_WAITSTATES__pcs4_7_zw__pcs4_7_zw__MASK 0xc0000000U
+#define R_WAITSTATES__pcs4_7_ew__pcs4_7_ew__MASK 0x30000000U
+#define R_WAITSTATES__pcs4_7_lw__pcs4_7_lw__MASK 0x0f000000U
+#define R_WAITSTATES__pcs0_3_zw__pcs0_3_zw__MASK 0x00c00000U
+#define R_WAITSTATES__pcs0_3_ew__pcs0_3_ew__MASK 0x00300000U
+#define R_WAITSTATES__pcs0_3_lw__pcs0_3_lw__MASK 0x000f0000U
+#define R_WAITSTATES__sram_zw__sram_zw__MASK 0x0000c000U
+#define R_WAITSTATES__sram_ew__sram_ew__MASK 0x00003000U
+#define R_WAITSTATES__sram_lw__sram_lw__MASK 0x00000f00U
+#define R_WAITSTATES__flash_zw__flash_zw__MASK 0x000000c0U
+#define R_WAITSTATES__flash_ew__flash_ew__MASK 0x00000030U
+#define R_WAITSTATES__flash_lw__flash_lw__MASK 0x0000000fU
+
+#define R_WAITSTATES__pcs4_7_zw__MAX 3
+#define R_WAITSTATES__pcs4_7_ew__MAX 3
+#define R_WAITSTATES__pcs4_7_lw__MAX 15
+#define R_WAITSTATES__pcs0_3_zw__MAX 3
+#define R_WAITSTATES__pcs0_3_ew__MAX 3
+#define R_WAITSTATES__pcs0_3_lw__MAX 15
+#define R_WAITSTATES__sram_zw__MAX 3
+#define R_WAITSTATES__sram_ew__MAX 3
+#define R_WAITSTATES__sram_lw__MAX 15
+#define R_WAITSTATES__flash_zw__MAX 3
+#define R_WAITSTATES__flash_ew__MAX 3
+#define R_WAITSTATES__flash_lw__MAX 15
+
+#define R_WAITSTATES__pcs4_7_zw__MIN 0
+#define R_WAITSTATES__pcs4_7_ew__MIN 0
+#define R_WAITSTATES__pcs4_7_lw__MIN 0
+#define R_WAITSTATES__pcs0_3_zw__MIN 0
+#define R_WAITSTATES__pcs0_3_ew__MIN 0
+#define R_WAITSTATES__pcs0_3_lw__MIN 0
+#define R_WAITSTATES__sram_zw__MIN 0
+#define R_WAITSTATES__sram_ew__MIN 0
+#define R_WAITSTATES__sram_lw__MIN 0
+#define R_WAITSTATES__flash_zw__MIN 0
+#define R_WAITSTATES__flash_ew__MIN 0
+#define R_WAITSTATES__flash_lw__MIN 0
+
+#define R_WAITSTATES__pcs4_7_zw__BITNR 30
+#define R_WAITSTATES__pcs4_7_ew__BITNR 28
+#define R_WAITSTATES__pcs4_7_lw__BITNR 24
+#define R_WAITSTATES__pcs0_3_zw__BITNR 22
+#define R_WAITSTATES__pcs0_3_ew__BITNR 20
+#define R_WAITSTATES__pcs0_3_lw__BITNR 16
+#define R_WAITSTATES__sram_zw__BITNR 14
+#define R_WAITSTATES__sram_ew__BITNR 12
+#define R_WAITSTATES__sram_lw__BITNR 8
+#define R_WAITSTATES__flash_zw__BITNR 6
+#define R_WAITSTATES__flash_ew__BITNR 4
+#define R_WAITSTATES__flash_lw__BITNR 0
+
+#define R_WAITSTATES__pcs4_7_zw__pcs4_7_zw__VAL REG_VAL_VAL
+#define R_WAITSTATES__pcs4_7_ew__pcs4_7_ew__VAL REG_VAL_VAL
+#define R_WAITSTATES__pcs4_7_lw__pcs4_7_lw__VAL REG_VAL_VAL
+#define R_WAITSTATES__pcs0_3_zw__pcs0_3_zw__VAL REG_VAL_VAL
+#define R_WAITSTATES__pcs0_3_ew__pcs0_3_ew__VAL REG_VAL_VAL
+#define R_WAITSTATES__pcs0_3_lw__pcs0_3_lw__VAL REG_VAL_VAL
+#define R_WAITSTATES__sram_zw__sram_zw__VAL REG_VAL_VAL
+#define R_WAITSTATES__sram_ew__sram_ew__VAL REG_VAL_VAL
+#define R_WAITSTATES__sram_lw__sram_lw__VAL REG_VAL_VAL
+#define R_WAITSTATES__flash_zw__flash_zw__VAL REG_VAL_VAL
+#define R_WAITSTATES__flash_ew__flash_ew__VAL REG_VAL_VAL
+#define R_WAITSTATES__flash_lw__flash_lw__VAL REG_VAL_VAL
+
+
+#endif
+
+/*
+ * R_WATCHDOG
+ * - type: WO
+ * - addr: 0xb0000024
+ * - group: Timer registers
+ */
+
+#if USE_GROUP__Timer_registers
+
+#define R_WATCHDOG__ADDR (REG_TYPECAST_UDWORD 0xb0000024)
+
+#ifndef REG_NO_SHADOW
+#define R_WATCHDOG__SADDR (REG_STYPECAST_UDWORD (reg_shadow__hwregs.R_WATCHDOG + 0))
+#define R_WATCHDOG__IADDR (REG_STYPECAST_UDWORD (reg_initiated__hwregs.R_WATCHDOG + 0))
+#else /* REG_NO_SHADOW */
+#define R_WATCHDOG__SADDR (REG_STYPECAST_UDWORD (®_shadow__hwregs))
+#define R_WATCHDOG__IADDR (REG_STYPECAST_UDWORD (®_initiated__hwregs))
+#endif /* REG_NO_SHADOW */
+
+#define R_WATCHDOG__STYPECAST REG_STYPECAST_UDWORD
+#define R_WATCHDOG__SVAL REG_SVAL_SHADOW
+#define R_WATCHDOG__SVAL_I REG_SVAL_I_SHADOW
+#define R_WATCHDOG__TYPECAST REG_TYPECAST_UDWORD
+#define R_WATCHDOG__TYPE (REG_UDWORD)
+#define R_WATCHDOG__GET REG_GET_WO
+#define R_WATCHDOG__IGET REG_IGET_WO
+#define R_WATCHDOG__SET REG_SET_WO
+#define R_WATCHDOG__ISET REG_ISET_WO
+#define R_WATCHDOG__SET_VAL REG_SET_VAL_WO
+#define R_WATCHDOG__EQL REG_EQL_WO
+#define R_WATCHDOG__IEQL REG_IEQL_WO
+#define R_WATCHDOG__RD REG_RD_WO
+#define R_WATCHDOG__IRD REG_IRD_WO
+#define R_WATCHDOG__WR REG_WR_WO
+#define R_WATCHDOG__IWR REG_IWR_WO
+
+#define R_WATCHDOG__WRITE(addr,value) \
+ (*(addr) = (value))
+
+#define R_WATCHDOG__key__key__MASK 0x0000000eU
+#define R_WATCHDOG__enable__enable__MASK 0x00000001U
+
+#define R_WATCHDOG__key__MAX 7
+#define R_WATCHDOG__enable__MAX 0x1
+
+#define R_WATCHDOG__key__MIN 0
+#define R_WATCHDOG__enable__MIN 0
+
+#define R_WATCHDOG__key__BITNR 1
+#define R_WATCHDOG__enable__BITNR 0
+
+#define R_WATCHDOG__key__key__VAL REG_VAL_VAL
+#define R_WATCHDOG__enable__enable__VAL REG_VAL_ENUM
+
+#define R_WATCHDOG__enable__enable__start 1
+#define R_WATCHDOG__enable__enable__stop 0
+
+#endif
+
+#endif
--- /dev/null
+SECTIONS
+{
+ . = 0x380000f0;
+ __Stext = .;
+
+ .text :
+ {
+ KEEP (*(.startup))
+ KEEP (*(.text))
+ *(.text.*)
+ KEEP (*(.rodata))
+ *(.rodata.*)
+ } =0
+
+ __Etext = .;
+
+ .data :
+ {
+ __Sdata = .;
+ KEEP (*(.data))
+ *(.data.*)
+ }
+
+ __Edata = .;
+ . = ALIGN (4);
+ __Sbss = .;
+ .bss :
+ {
+ /* The network crc will land in the first four bytes of the
+ bss. Move the variables out of the way. */
+ . = . + 12;
+ *(.bss.*)
+ *(COMMON)
+ }
+
+ __Ebss = .;
+
+}
--- /dev/null
+#define net_init init_interface
+#define handle_network_read handle_read
+#define send_network_ack send_ack
+#define send_network_string send_string
+#define send_network_hex send_hex
+
+#include "sv_addr_ag.h"
+#include "e100boot.h"
+
+static void start_network_trans(void);
+
+void
+net_init(void)
+{
+ *R_NETWORK_GA_1 = *R_NETWORK_GA_0 = 0;
+
+ SET_ETHER_ADDR(0x01,0x40,0x8c,0x00,0x01,0x00,
+ 0x01,0x40,0x8c,0x00,0x01,0x00);
+
+ *R_NETWORK_REC_CONFIG =
+ IO_STATE (R_NETWORK_REC_CONFIG, duplex, half) |
+ IO_STATE (R_NETWORK_REC_CONFIG, bad_crc, discard) |
+ IO_STATE (R_NETWORK_REC_CONFIG, oversize, discard) |
+ IO_STATE (R_NETWORK_REC_CONFIG, undersize, discard) |
+ IO_STATE (R_NETWORK_REC_CONFIG, all_roots, discard) |
+ IO_STATE (R_NETWORK_REC_CONFIG, broadcast, discard) |
+ IO_STATE (R_NETWORK_REC_CONFIG, individual, discard) |
+ IO_STATE (R_NETWORK_REC_CONFIG, ma1, disable) |
+ IO_STATE (R_NETWORK_REC_CONFIG, ma0, enable);
+
+ *R_NETWORK_MGM_CTRL =
+ IO_FIELD(R_NETWORK_MGM_CTRL, txd_pins, 0) |
+ IO_FIELD(R_NETWORK_MGM_CTRL, txer_pin, 0) |
+ IO_FIELD(R_NETWORK_MGM_CTRL, mdck, 0) |
+ IO_STATE(R_NETWORK_MGM_CTRL, mdoe, disable) |
+ IO_FIELD(R_NETWORK_MGM_CTRL, mdio, 0);
+
+ *R_NETWORK_TR_CTRL =
+ (IO_STATE (R_NETWORK_TR_CTRL, clr_error, clr) |
+ IO_STATE (R_NETWORK_TR_CTRL, delay, none) |
+ IO_STATE (R_NETWORK_TR_CTRL, cancel, dont) |
+ IO_STATE (R_NETWORK_TR_CTRL, cd, enable) |
+ IO_STATE (R_NETWORK_TR_CTRL, pad, enable) |
+ IO_STATE (R_NETWORK_TR_CTRL, crc, enable) |
+ IO_STATE (R_NETWORK_TR_CTRL, retry, enable));
+
+ *R_NETWORK_GEN_CONFIG =
+ IO_STATE (R_NETWORK_GEN_CONFIG, loopback, off) |
+ IO_STATE (R_NETWORK_GEN_CONFIG, frame, ether) |
+ IO_STATE (R_NETWORK_GEN_CONFIG, vg, off) |
+ IO_STATE (R_NETWORK_GEN_CONFIG, phy, mii_clk) |
+ IO_STATE (R_NETWORK_GEN_CONFIG, enable, on);
+
+ *R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, reset);
+ *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, reset);
+
+ rx_descr.sw_len = NETWORK_HEADER_LENGTH;
+ rx_descr.ctrl = TX_CTRL;
+ rx_descr.next = (udword)&rx_descr2;
+ rx_descr.buf = (udword)&rx_header;
+
+ rx_descr2.sw_len = 1500;
+ rx_descr2.ctrl = TX_CTRL_EOP;
+ rx_descr2.buf = target_address;
+
+ /* Endian dependent, but saves a few bytes... */
+ *(udword*)&tx_header.src[0] = htonl(0x02408c00);
+ *(uword*)&tx_header.src[4] = htons(0x0100);
+ tx_header.length = htons(64);
+ tx_header.snap1 = htonl(0xaaaa0300);
+ tx_header.snap2 = htonl(0x408c8856);
+ tx_header.tag = htonl(0xfffffffe);
+ tx_header.seq = 0;
+ tx_header.type = 0;
+
+ tx_descr.sw_len = NETWORK_HEADER_LENGTH;
+ tx_descr.ctrl = TX_CTRL_EOP;
+ tx_descr.buf = (udword)&tx_header;
+
+ set_dest = FALSE;
+ seq = 0;
+
+ *R_DMA_CH1_FIRST = (udword)&rx_descr;
+ *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, start);
+}
+
+int
+handle_network_read(void)
+{
+ if (!(rx_descr2.status & d_eop)) {
+ return FALSE;
+ }
+
+ /* Even if wasn't to us, we must do this... */
+ rx_descr2.status = 0;
+ *R_DMA_CH1_FIRST = (udword)&rx_descr;
+
+ /* Was it to me? */
+ if (ntohl(rx_header.seq) == (seq+1)) {
+ interface = NETWORK;
+ last_timeout = *R_TIMER_DATA >> IO_BITNR(R_TIMER_DATA, timer0);
+ nbr_read += rx_descr2.hw_len - CRC_LEN;
+ rx_descr2.buf += rx_descr2.hw_len - CRC_LEN;
+ rx_descr2.sw_len = bytes_to_read - nbr_read - CRC_LEN < 1500 ?
+ bytes_to_read - nbr_read + CRC_LEN: 1500; /* FIX!!!!! */
+ rx_descr2.sw_len = rx_descr2.sw_len + NETWORK_HEADER_LENGTH < 64
+ ? 64 - NETWORK_HEADER_LENGTH : rx_descr2.sw_len; /* Less than minimum eth packet? */
+
+ seq++;
+ send_network_ack();
+ }
+
+ return TRUE;
+}
+
+void
+send_network_ack(void)
+{
+/* send_serial_string(">send_network_ack.\r\n"); */
+
+ if (!set_dest) { /* Copy destination address from first received packet */
+ set_dest = TRUE;
+ /* If we have done a bootrom network boot, source address is in a different
+ place... */
+ if (((*R_BUS_STATUS & IO_MASK(R_BUS_STATUS, boot))
+ >> IO_BITNR(R_BUS_STATUS, boot)) - 1 == NETWORK) {
+ *(udword*)&tx_header.dest[0] = *(udword*)0x380000dc;
+ *(uword*)&tx_header.dest[4] = *(uword*)0x380000e0;
+ }
+ else {
+ *(udword*)&tx_header.dest[0] = *(udword*)&rx_header.src[0];
+ *(uword*)&tx_header.dest[4] = *(uword*)&rx_header.src[4];
+ }
+ }
+
+#if 1
+ tx_header.seq = htonl(seq);
+ tx_header.type = htonl(ACK);
+#else
+ tx_header.seq = htonl(seq);
+ tx_header.type = htonl(bytes_to_read);
+ tx_header.id = htonl(target_address);
+ /* tx_header.id already set in start(). */
+#endif
+
+ tx_descr.ctrl = TX_CTRL_EOP;
+ tx_descr.sw_len = NETWORK_HEADER_LENGTH;
+
+ start_network_trans();
+}
+
+void
+start_network_trans(void)
+{
+/* send_serial_string(">start_network_trans\r\n"); */
+
+ /* Clear possible underrun or excessive retry errors */
+/* *R_NETWORK_TR_CTRL = */
+/* (IO_STATE (R_NETWORK_TR_CTRL, clr_error, clr) | */
+/* IO_STATE (R_NETWORK_TR_CTRL, delay, none) | */
+/* IO_STATE (R_NETWORK_TR_CTRL, cancel, dont) | */
+/* IO_STATE (R_NETWORK_TR_CTRL, cd, enable) | */
+/* IO_STATE (R_NETWORK_TR_CTRL, pad, enable) | */
+/* IO_STATE (R_NETWORK_TR_CTRL, crc, enable) | */
+/* IO_STATE (R_NETWORK_TR_CTRL, retry, enable)); */
+
+ *R_DMA_CH0_FIRST = (udword)&tx_descr;
+ *R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, start);
+ while(*R_DMA_CH0_FIRST)
+ ;
+}
+
+void
+send_network_string(char *str)
+{
+ int i;
+
+ tx_descr.next = (udword)&tx_descr2;
+ tx_descr.ctrl = TX_CTRL;
+ for (i = 0; str[i]; i++) /* strlen */
+ ;
+
+ tx_header.type = STRING;
+
+ tx_descr2.ctrl = TX_CTRL_EOP;
+ tx_descr2.buf = (udword)str;
+ tx_descr2.sw_len = i+1;
+
+ start_network_trans();
+}
+
+void
+send_network_hex(udword v, byte nl)
+{
+ tx_descr.next = (udword)&tx_descr2;
+ tx_descr.ctrl = TX_CTRL;
+
+ tx_header.type = nl ? htonl(NET_INT_NL) : htonl(NET_INT);
+
+ /* Pause so we don't saturate network. */
+ /* Hehe, the asm will fool gcc to not remove the loop even though it
+ probably should. If we volatile i the code will be a few bytes
+ longer than this version. Well I really did it like this just
+ because it is possible... */
+ {
+ udword i;
+
+ for(i = 0; i != 16384; i++)
+ __asm__ ("");
+ }
+
+ v = htonl(v);
+ tx_descr2.ctrl = TX_CTRL_EOP;
+ tx_descr2.buf = (udword)&v;
+ tx_descr2.sw_len = (uword)sizeof(udword);
+
+ start_network_trans();
+}
--- /dev/null
+#define REG_NO_SHADOW 1
+#define REG_NO_INIT_SHADOW 1
+
+#define USE_GROUP__Serial_port_registers 1
+#define USE_GROUP__Network_interface_registers 1
+#define USE_GROUP__Parallel_printer_port_registers 1
+#define USE_GROUP__Timer_registers 1
+#define USE_GROUP__General_port_configuration_registers 1
+#define USE_GROUP__Bus_interface_configuration_registers 1
+#define USE_GROUP__DMA_registers 1
--- /dev/null
+#define ser_init init_interface
+#define handle_serial_read handle_read
+#define send_serial_ack send_ack
+#define send_serial_string send_string
+#define send_serial_hex send_hex
+
+#include "hwregs.h"
+#include "sv_addr_ag.h"
+#include "e100boot.h"
+
+void
+ser_init(void)
+{
+ REG_SET__R_SERIAL0_XOFF
+ (
+ tx_stop, enable,
+ auto_xoff, disable,
+ xoff_char, 0
+ );
+
+ REG_SET__R_SERIAL0_BAUD
+ (
+ tr_baud, c9600Hz,
+ rec_baud, c9600Hz
+ );
+
+ REG_SET__R_SERIAL0_REC_CTRL
+ (
+ dma_err, stop,
+ rec_enable, enable,
+ rts_, inactive,
+ sampling, middle,
+ rec_stick_par, normal,
+ rec_par, even,
+ rec_par_en, disable,
+ rec_bitnr, rec_8bit
+ );
+
+ REG_SET__R_SERIAL0_TR_CTRL
+ (
+ txd, 0,
+ tr_enable, enable,
+ auto_cts, disabled,
+ stop_bits, one_bit,
+ tr_stick_par, normal,
+ tr_par, even,
+ tr_par_en, disable,
+ tr_bitnr, tr_8bit
+ );
+
+ serial_up = TRUE;
+}
+
+#define SER_MASK (IO_MASK(R_SERIAL0_READ, data_avail) | IO_MASK(R_SERIAL0_READ, data_in))
+
+int
+handle_serial_read(void)
+{
+ udword status_and_data_in = *R_SERIAL0_READ & SER_MASK;
+
+ if (status_and_data_in & IO_STATE(R_SERIAL0_READ, data_avail, yes)) {
+ *(char*)(target_address + nbr_read++) = status_and_data_in & 0xff; /* ugly mask */
+ last_timeout = REG_GET(R_TIMER0_DATA, count);
+ return TRUE;
+ }
+
+ return FALSE;
+}
+
+void
+send_serial_ack(void)
+{
+ while (!REG_EQL(R_SERIAL0_STATUS, tr_ready, ready))
+ ;
+
+ REG_ISET(0, R_SERIAL0_TR_DATA, data_out, '+');
+}
+
+void
+send_serial_string(char *str)
+{
+ int i;
+
+ for (i = 0; str[i];) {
+ if (REG_IEQL(0, R_SERIAL0_STATUS, tr_ready, ready)) {
+ REG_ISET(0, R_SERIAL0_TR_DATA, data_out, str[i]);
+ i++;
+ }
+ }
+}
+
+void
+send_serial_hex(udword v, byte nl)
+{
+ int i;
+ byte buf[13];
+ byte nybble;
+
+ buf[0] = '0';
+ buf[1] = 'x';
+ buf[10] = '\r';
+ buf[11] = '\n';
+ buf[12] = '\0';
+
+ if (nl == FALSE) {
+ buf[10] = '\0';
+ }
+
+ for (i = 0; i != 8; i++) {
+ nybble = (v >> (i*4)) & 0xf;
+ if (nybble > 9) {
+ nybble += 7;
+ }
+ buf[7-i+2] = nybble + '0';
+ }
+ send_serial_string(buf);
+}
--- /dev/null
+/*
+!* This file was automatically generated by /n/asic/bin/reg_macro_gen
+!* from the file `/n/asic/projects/etrax_ng/doc/work/etrax_ng_regs.rd', version 1.168.
+!* Editing within this file is thus not recommended,
+!* make the changes in `/n/asic/projects/etrax_ng/doc/work/etrax_ng_regs.rd' instead.
+!* Created: Wed Oct 2 22:32:57 2002 By: Id: reg_macro_gen,v 1.12 2002/09/18 14:08:01 stefanl Exp
+!*/
+
+
+/*
+!* Bus interface configuration registers
+!*/
+
+#define R_WAITSTATES (IO_TYPECAST_UDWORD 0xb0000000)
+#define R_WAITSTATES__pcs4_7_zw__BITNR 30
+#define R_WAITSTATES__pcs4_7_zw__WIDTH 2
+#define R_WAITSTATES__pcs4_7_ew__BITNR 28
+#define R_WAITSTATES__pcs4_7_ew__WIDTH 2
+#define R_WAITSTATES__pcs4_7_lw__BITNR 24
+#define R_WAITSTATES__pcs4_7_lw__WIDTH 4
+#define R_WAITSTATES__pcs0_3_zw__BITNR 22
+#define R_WAITSTATES__pcs0_3_zw__WIDTH 2
+#define R_WAITSTATES__pcs0_3_ew__BITNR 20
+#define R_WAITSTATES__pcs0_3_ew__WIDTH 2
+#define R_WAITSTATES__pcs0_3_lw__BITNR 16
+#define R_WAITSTATES__pcs0_3_lw__WIDTH 4
+#define R_WAITSTATES__sram_zw__BITNR 14
+#define R_WAITSTATES__sram_zw__WIDTH 2
+#define R_WAITSTATES__sram_ew__BITNR 12
+#define R_WAITSTATES__sram_ew__WIDTH 2
+#define R_WAITSTATES__sram_lw__BITNR 8
+#define R_WAITSTATES__sram_lw__WIDTH 4
+#define R_WAITSTATES__flash_zw__BITNR 6
+#define R_WAITSTATES__flash_zw__WIDTH 2
+#define R_WAITSTATES__flash_ew__BITNR 4
+#define R_WAITSTATES__flash_ew__WIDTH 2
+#define R_WAITSTATES__flash_lw__BITNR 0
+#define R_WAITSTATES__flash_lw__WIDTH 4
+
+#define R_BUS_CONFIG (IO_TYPECAST_UDWORD 0xb0000004)
+#define R_BUS_CONFIG__sram_type__BITNR 9
+#define R_BUS_CONFIG__sram_type__WIDTH 1
+#define R_BUS_CONFIG__sram_type__cwe 1
+#define R_BUS_CONFIG__sram_type__bwe 0
+#define R_BUS_CONFIG__dma_burst__BITNR 8
+#define R_BUS_CONFIG__dma_burst__WIDTH 1
+#define R_BUS_CONFIG__dma_burst__burst16 1
+#define R_BUS_CONFIG__dma_burst__burst32 0
+#define R_BUS_CONFIG__pcs4_7_wr__BITNR 7
+#define R_BUS_CONFIG__pcs4_7_wr__WIDTH 1
+#define R_BUS_CONFIG__pcs4_7_wr__ext 1
+#define R_BUS_CONFIG__pcs4_7_wr__norm 0
+#define R_BUS_CONFIG__pcs0_3_wr__BITNR 6
+#define R_BUS_CONFIG__pcs0_3_wr__WIDTH 1
+#define R_BUS_CONFIG__pcs0_3_wr__ext 1
+#define R_BUS_CONFIG__pcs0_3_wr__norm 0
+#define R_BUS_CONFIG__sram_wr__BITNR 5
+#define R_BUS_CONFIG__sram_wr__WIDTH 1
+#define R_BUS_CONFIG__sram_wr__ext 1
+#define R_BUS_CONFIG__sram_wr__norm 0
+#define R_BUS_CONFIG__flash_wr__BITNR 4
+#define R_BUS_CONFIG__flash_wr__WIDTH 1
+#define R_BUS_CONFIG__flash_wr__ext 1
+#define R_BUS_CONFIG__flash_wr__norm 0
+#define R_BUS_CONFIG__pcs4_7_bw__BITNR 3
+#define R_BUS_CONFIG__pcs4_7_bw__WIDTH 1
+#define R_BUS_CONFIG__pcs4_7_bw__bw32 1
+#define R_BUS_CONFIG__pcs4_7_bw__bw16 0
+#define R_BUS_CONFIG__pcs0_3_bw__BITNR 2
+#define R_BUS_CONFIG__pcs0_3_bw__WIDTH 1
+#define R_BUS_CONFIG__pcs0_3_bw__bw32 1
+#define R_BUS_CONFIG__pcs0_3_bw__bw16 0
+#define R_BUS_CONFIG__sram_bw__BITNR 1
+#define R_BUS_CONFIG__sram_bw__WIDTH 1
+#define R_BUS_CONFIG__sram_bw__bw32 1
+#define R_BUS_CONFIG__sram_bw__bw16 0
+#define R_BUS_CONFIG__flash_bw__BITNR 0
+#define R_BUS_CONFIG__flash_bw__WIDTH 1
+#define R_BUS_CONFIG__flash_bw__bw32 1
+#define R_BUS_CONFIG__flash_bw__bw16 0
+
+#define R_BUS_STATUS (IO_TYPECAST_RO_UDWORD 0xb0000004)
+#define R_BUS_STATUS__pll_lock_tm__BITNR 5
+#define R_BUS_STATUS__pll_lock_tm__WIDTH 1
+#define R_BUS_STATUS__pll_lock_tm__expired 0
+#define R_BUS_STATUS__pll_lock_tm__counting 1
+#define R_BUS_STATUS__both_faults__BITNR 4
+#define R_BUS_STATUS__both_faults__WIDTH 1
+#define R_BUS_STATUS__both_faults__no 0
+#define R_BUS_STATUS__both_faults__yes 1
+#define R_BUS_STATUS__bsen___BITNR 3
+#define R_BUS_STATUS__bsen___WIDTH 1
+#define R_BUS_STATUS__bsen___enable 0
+#define R_BUS_STATUS__bsen___disable 1
+#define R_BUS_STATUS__boot__BITNR 1
+#define R_BUS_STATUS__boot__WIDTH 2
+#define R_BUS_STATUS__boot__uncached 0
+#define R_BUS_STATUS__boot__serial 1
+#define R_BUS_STATUS__boot__network 2
+#define R_BUS_STATUS__boot__parallel 3
+#define R_BUS_STATUS__flashw__BITNR 0
+#define R_BUS_STATUS__flashw__WIDTH 1
+#define R_BUS_STATUS__flashw__bw32 1
+#define R_BUS_STATUS__flashw__bw16 0
+
+#define R_DRAM_TIMING (IO_TYPECAST_UDWORD 0xb0000008)
+#define R_DRAM_TIMING__sdram__BITNR 31
+#define R_DRAM_TIMING__sdram__WIDTH 1
+#define R_DRAM_TIMING__sdram__enable 1
+#define R_DRAM_TIMING__sdram__disable 0
+#define R_DRAM_TIMING__ref__BITNR 14
+#define R_DRAM_TIMING__ref__WIDTH 2
+#define R_DRAM_TIMING__ref__e52us 0
+#define R_DRAM_TIMING__ref__e13us 1
+#define R_DRAM_TIMING__ref__e8700ns 2
+#define R_DRAM_TIMING__ref__disable 3
+#define R_DRAM_TIMING__rp__BITNR 12
+#define R_DRAM_TIMING__rp__WIDTH 2
+#define R_DRAM_TIMING__rs__BITNR 10
+#define R_DRAM_TIMING__rs__WIDTH 2
+#define R_DRAM_TIMING__rh__BITNR 8
+#define R_DRAM_TIMING__rh__WIDTH 2
+#define R_DRAM_TIMING__w__BITNR 7
+#define R_DRAM_TIMING__w__WIDTH 1
+#define R_DRAM_TIMING__w__norm 0
+#define R_DRAM_TIMING__w__ext 1
+#define R_DRAM_TIMING__c__BITNR 6
+#define R_DRAM_TIMING__c__WIDTH 1
+#define R_DRAM_TIMING__c__norm 0
+#define R_DRAM_TIMING__c__ext 1
+#define R_DRAM_TIMING__cz__BITNR 4
+#define R_DRAM_TIMING__cz__WIDTH 2
+#define R_DRAM_TIMING__cp__BITNR 2
+#define R_DRAM_TIMING__cp__WIDTH 2
+#define R_DRAM_TIMING__cw__BITNR 0
+#define R_DRAM_TIMING__cw__WIDTH 2
+
+#define R_SDRAM_TIMING (IO_TYPECAST_UDWORD 0xb0000008)
+#define R_SDRAM_TIMING__sdram__BITNR 31
+#define R_SDRAM_TIMING__sdram__WIDTH 1
+#define R_SDRAM_TIMING__sdram__enable 1
+#define R_SDRAM_TIMING__sdram__disable 0
+#define R_SDRAM_TIMING__mrs_data__BITNR 16
+#define R_SDRAM_TIMING__mrs_data__WIDTH 15
+#define R_SDRAM_TIMING__ref__BITNR 14
+#define R_SDRAM_TIMING__ref__WIDTH 2
+#define R_SDRAM_TIMING__ref__e52us 0
+#define R_SDRAM_TIMING__ref__e13us 1
+#define R_SDRAM_TIMING__ref__e6500ns 2
+#define R_SDRAM_TIMING__ref__disable 3
+#define R_SDRAM_TIMING__ddr__BITNR 13
+#define R_SDRAM_TIMING__ddr__WIDTH 1
+#define R_SDRAM_TIMING__ddr__on 1
+#define R_SDRAM_TIMING__ddr__off 0
+#define R_SDRAM_TIMING__clk100__BITNR 12
+#define R_SDRAM_TIMING__clk100__WIDTH 1
+#define R_SDRAM_TIMING__clk100__on 1
+#define R_SDRAM_TIMING__clk100__off 0
+#define R_SDRAM_TIMING__ps__BITNR 11
+#define R_SDRAM_TIMING__ps__WIDTH 1
+#define R_SDRAM_TIMING__ps__on 1
+#define R_SDRAM_TIMING__ps__off 0
+#define R_SDRAM_TIMING__cmd__BITNR 9
+#define R_SDRAM_TIMING__cmd__WIDTH 2
+#define R_SDRAM_TIMING__cmd__pre 3
+#define R_SDRAM_TIMING__cmd__ref 2
+#define R_SDRAM_TIMING__cmd__mrs 1
+#define R_SDRAM_TIMING__cmd__nop 0
+#define R_SDRAM_TIMING__pde__BITNR 8
+#define R_SDRAM_TIMING__pde__WIDTH 1
+#define R_SDRAM_TIMING__rc__BITNR 6
+#define R_SDRAM_TIMING__rc__WIDTH 2
+#define R_SDRAM_TIMING__rp__BITNR 4
+#define R_SDRAM_TIMING__rp__WIDTH 2
+#define R_SDRAM_TIMING__rcd__BITNR 2
+#define R_SDRAM_TIMING__rcd__WIDTH 2
+#define R_SDRAM_TIMING__cl__BITNR 0
+#define R_SDRAM_TIMING__cl__WIDTH 2
+
+#define R_DRAM_CONFIG (IO_TYPECAST_UDWORD 0xb000000c)
+#define R_DRAM_CONFIG__wmm1__BITNR 31
+#define R_DRAM_CONFIG__wmm1__WIDTH 1
+#define R_DRAM_CONFIG__wmm1__wmm 1
+#define R_DRAM_CONFIG__wmm1__norm 0
+#define R_DRAM_CONFIG__wmm0__BITNR 30
+#define R_DRAM_CONFIG__wmm0__WIDTH 1
+#define R_DRAM_CONFIG__wmm0__wmm 1
+#define R_DRAM_CONFIG__wmm0__norm 0
+#define R_DRAM_CONFIG__sh1__BITNR 27
+#define R_DRAM_CONFIG__sh1__WIDTH 3
+#define R_DRAM_CONFIG__sh0__BITNR 24
+#define R_DRAM_CONFIG__sh0__WIDTH 3
+#define R_DRAM_CONFIG__w__BITNR 23
+#define R_DRAM_CONFIG__w__WIDTH 1
+#define R_DRAM_CONFIG__w__bw16 0
+#define R_DRAM_CONFIG__w__bw32 1
+#define R_DRAM_CONFIG__c__BITNR 22
+#define R_DRAM_CONFIG__c__WIDTH 1
+#define R_DRAM_CONFIG__c__byte 0
+#define R_DRAM_CONFIG__c__bank 1
+#define R_DRAM_CONFIG__e__BITNR 21
+#define R_DRAM_CONFIG__e__WIDTH 1
+#define R_DRAM_CONFIG__e__fast 0
+#define R_DRAM_CONFIG__e__edo 1
+#define R_DRAM_CONFIG__group_sel__BITNR 16
+#define R_DRAM_CONFIG__group_sel__WIDTH 5
+#define R_DRAM_CONFIG__group_sel__grp0 0
+#define R_DRAM_CONFIG__group_sel__grp1 1
+#define R_DRAM_CONFIG__group_sel__bit9 9
+#define R_DRAM_CONFIG__group_sel__bit10 10
+#define R_DRAM_CONFIG__group_sel__bit11 11
+#define R_DRAM_CONFIG__group_sel__bit12 12
+#define R_DRAM_CONFIG__group_sel__bit13 13
+#define R_DRAM_CONFIG__group_sel__bit14 14
+#define R_DRAM_CONFIG__group_sel__bit15 15
+#define R_DRAM_CONFIG__group_sel__bit16 16
+#define R_DRAM_CONFIG__group_sel__bit17 17
+#define R_DRAM_CONFIG__group_sel__bit18 18
+#define R_DRAM_CONFIG__group_sel__bit19 19
+#define R_DRAM_CONFIG__group_sel__bit20 20
+#define R_DRAM_CONFIG__group_sel__bit21 21
+#define R_DRAM_CONFIG__group_sel__bit22 22
+#define R_DRAM_CONFIG__group_sel__bit23 23
+#define R_DRAM_CONFIG__group_sel__bit24 24
+#define R_DRAM_CONFIG__group_sel__bit25 25
+#define R_DRAM_CONFIG__group_sel__bit26 26
+#define R_DRAM_CONFIG__group_sel__bit27 27
+#define R_DRAM_CONFIG__group_sel__bit28 28
+#define R_DRAM_CONFIG__group_sel__bit29 29
+#define R_DRAM_CONFIG__ca1__BITNR 13
+#define R_DRAM_CONFIG__ca1__WIDTH 3
+#define R_DRAM_CONFIG__bank23sel__BITNR 8
+#define R_DRAM_CONFIG__bank23sel__WIDTH 5
+#define R_DRAM_CONFIG__bank23sel__bank0 0
+#define R_DRAM_CONFIG__bank23sel__bank1 1
+#define R_DRAM_CONFIG__bank23sel__bit9 9
+#define R_DRAM_CONFIG__bank23sel__bit10 10
+#define R_DRAM_CONFIG__bank23sel__bit11 11
+#define R_DRAM_CONFIG__bank23sel__bit12 12
+#define R_DRAM_CONFIG__bank23sel__bit13 13
+#define R_DRAM_CONFIG__bank23sel__bit14 14
+#define R_DRAM_CONFIG__bank23sel__bit15 15
+#define R_DRAM_CONFIG__bank23sel__bit16 16
+#define R_DRAM_CONFIG__bank23sel__bit17 17
+#define R_DRAM_CONFIG__bank23sel__bit18 18
+#define R_DRAM_CONFIG__bank23sel__bit19 19
+#define R_DRAM_CONFIG__bank23sel__bit20 20
+#define R_DRAM_CONFIG__bank23sel__bit21 21
+#define R_DRAM_CONFIG__bank23sel__bit22 22
+#define R_DRAM_CONFIG__bank23sel__bit23 23
+#define R_DRAM_CONFIG__bank23sel__bit24 24
+#define R_DRAM_CONFIG__bank23sel__bit25 25
+#define R_DRAM_CONFIG__bank23sel__bit26 26
+#define R_DRAM_CONFIG__bank23sel__bit27 27
+#define R_DRAM_CONFIG__bank23sel__bit28 28
+#define R_DRAM_CONFIG__bank23sel__bit29 29
+#define R_DRAM_CONFIG__ca0__BITNR 5
+#define R_DRAM_CONFIG__ca0__WIDTH 3
+#define R_DRAM_CONFIG__bank01sel__BITNR 0
+#define R_DRAM_CONFIG__bank01sel__WIDTH 5
+#define R_DRAM_CONFIG__bank01sel__bank0 0
+#define R_DRAM_CONFIG__bank01sel__bank1 1
+#define R_DRAM_CONFIG__bank01sel__bit9 9
+#define R_DRAM_CONFIG__bank01sel__bit10 10
+#define R_DRAM_CONFIG__bank01sel__bit11 11
+#define R_DRAM_CONFIG__bank01sel__bit12 12
+#define R_DRAM_CONFIG__bank01sel__bit13 13
+#define R_DRAM_CONFIG__bank01sel__bit14 14
+#define R_DRAM_CONFIG__bank01sel__bit15 15
+#define R_DRAM_CONFIG__bank01sel__bit16 16
+#define R_DRAM_CONFIG__bank01sel__bit17 17
+#define R_DRAM_CONFIG__bank01sel__bit18 18
+#define R_DRAM_CONFIG__bank01sel__bit19 19
+#define R_DRAM_CONFIG__bank01sel__bit20 20
+#define R_DRAM_CONFIG__bank01sel__bit21 21
+#define R_DRAM_CONFIG__bank01sel__bit22 22
+#define R_DRAM_CONFIG__bank01sel__bit23 23
+#define R_DRAM_CONFIG__bank01sel__bit24 24
+#define R_DRAM_CONFIG__bank01sel__bit25 25
+#define R_DRAM_CONFIG__bank01sel__bit26 26
+#define R_DRAM_CONFIG__bank01sel__bit27 27
+#define R_DRAM_CONFIG__bank01sel__bit28 28
+#define R_DRAM_CONFIG__bank01sel__bit29 29
+
+#define R_SDRAM_CONFIG (IO_TYPECAST_UDWORD 0xb000000c)
+#define R_SDRAM_CONFIG__wmm1__BITNR 31
+#define R_SDRAM_CONFIG__wmm1__WIDTH 1
+#define R_SDRAM_CONFIG__wmm1__wmm 1
+#define R_SDRAM_CONFIG__wmm1__norm 0
+#define R_SDRAM_CONFIG__wmm0__BITNR 30
+#define R_SDRAM_CONFIG__wmm0__WIDTH 1
+#define R_SDRAM_CONFIG__wmm0__wmm 1
+#define R_SDRAM_CONFIG__wmm0__norm 0
+#define R_SDRAM_CONFIG__sh1__BITNR 27
+#define R_SDRAM_CONFIG__sh1__WIDTH 3
+#define R_SDRAM_CONFIG__sh0__BITNR 24
+#define R_SDRAM_CONFIG__sh0__WIDTH 3
+#define R_SDRAM_CONFIG__w__BITNR 23
+#define R_SDRAM_CONFIG__w__WIDTH 1
+#define R_SDRAM_CONFIG__w__bw16 0
+#define R_SDRAM_CONFIG__w__bw32 1
+#define R_SDRAM_CONFIG__type1__BITNR 22
+#define R_SDRAM_CONFIG__type1__WIDTH 1
+#define R_SDRAM_CONFIG__type1__bank2 0
+#define R_SDRAM_CONFIG__type1__bank4 1
+#define R_SDRAM_CONFIG__type0__BITNR 21
+#define R_SDRAM_CONFIG__type0__WIDTH 1
+#define R_SDRAM_CONFIG__type0__bank2 0
+#define R_SDRAM_CONFIG__type0__bank4 1
+#define R_SDRAM_CONFIG__group_sel__BITNR 16
+#define R_SDRAM_CONFIG__group_sel__WIDTH 5
+#define R_SDRAM_CONFIG__group_sel__grp0 0
+#define R_SDRAM_CONFIG__group_sel__grp1 1
+#define R_SDRAM_CONFIG__group_sel__bit9 9
+#define R_SDRAM_CONFIG__group_sel__bit10 10
+#define R_SDRAM_CONFIG__group_sel__bit11 11
+#define R_SDRAM_CONFIG__group_sel__bit12 12
+#define R_SDRAM_CONFIG__group_sel__bit13 13
+#define R_SDRAM_CONFIG__group_sel__bit14 14
+#define R_SDRAM_CONFIG__group_sel__bit15 15
+#define R_SDRAM_CONFIG__group_sel__bit16 16
+#define R_SDRAM_CONFIG__group_sel__bit17 17
+#define R_SDRAM_CONFIG__group_sel__bit18 18
+#define R_SDRAM_CONFIG__group_sel__bit19 19
+#define R_SDRAM_CONFIG__group_sel__bit20 20
+#define R_SDRAM_CONFIG__group_sel__bit21 21
+#define R_SDRAM_CONFIG__group_sel__bit22 22
+#define R_SDRAM_CONFIG__group_sel__bit23 23
+#define R_SDRAM_CONFIG__group_sel__bit24 24
+#define R_SDRAM_CONFIG__group_sel__bit25 25
+#define R_SDRAM_CONFIG__group_sel__bit26 26
+#define R_SDRAM_CONFIG__group_sel__bit27 27
+#define R_SDRAM_CONFIG__group_sel__bit28 28
+#define R_SDRAM_CONFIG__group_sel__bit29 29
+#define R_SDRAM_CONFIG__ca1__BITNR 13
+#define R_SDRAM_CONFIG__ca1__WIDTH 3
+#define R_SDRAM_CONFIG__bank_sel1__BITNR 8
+#define R_SDRAM_CONFIG__bank_sel1__WIDTH 5
+#define R_SDRAM_CONFIG__bank_sel1__bit9 9
+#define R_SDRAM_CONFIG__bank_sel1__bit10 10
+#define R_SDRAM_CONFIG__bank_sel1__bit11 11
+#define R_SDRAM_CONFIG__bank_sel1__bit12 12
+#define R_SDRAM_CONFIG__bank_sel1__bit13 13
+#define R_SDRAM_CONFIG__bank_sel1__bit14 14
+#define R_SDRAM_CONFIG__bank_sel1__bit15 15
+#define R_SDRAM_CONFIG__bank_sel1__bit16 16
+#define R_SDRAM_CONFIG__bank_sel1__bit17 17
+#define R_SDRAM_CONFIG__bank_sel1__bit18 18
+#define R_SDRAM_CONFIG__bank_sel1__bit19 19
+#define R_SDRAM_CONFIG__bank_sel1__bit20 20
+#define R_SDRAM_CONFIG__bank_sel1__bit21 21
+#define R_SDRAM_CONFIG__bank_sel1__bit22 22
+#define R_SDRAM_CONFIG__bank_sel1__bit23 23
+#define R_SDRAM_CONFIG__bank_sel1__bit24 24
+#define R_SDRAM_CONFIG__bank_sel1__bit25 25
+#define R_SDRAM_CONFIG__bank_sel1__bit26 26
+#define R_SDRAM_CONFIG__bank_sel1__bit27 27
+#define R_SDRAM_CONFIG__bank_sel1__bit28 28
+#define R_SDRAM_CONFIG__bank_sel1__bit29 29
+#define R_SDRAM_CONFIG__ca0__BITNR 5
+#define R_SDRAM_CONFIG__ca0__WIDTH 3
+#define R_SDRAM_CONFIG__bank_sel0__BITNR 0
+#define R_SDRAM_CONFIG__bank_sel0__WIDTH 5
+#define R_SDRAM_CONFIG__bank_sel0__bit9 9
+#define R_SDRAM_CONFIG__bank_sel0__bit10 10
+#define R_SDRAM_CONFIG__bank_sel0__bit11 11
+#define R_SDRAM_CONFIG__bank_sel0__bit12 12
+#define R_SDRAM_CONFIG__bank_sel0__bit13 13
+#define R_SDRAM_CONFIG__bank_sel0__bit14 14
+#define R_SDRAM_CONFIG__bank_sel0__bit15 15
+#define R_SDRAM_CONFIG__bank_sel0__bit16 16
+#define R_SDRAM_CONFIG__bank_sel0__bit17 17
+#define R_SDRAM_CONFIG__bank_sel0__bit18 18
+#define R_SDRAM_CONFIG__bank_sel0__bit19 19
+#define R_SDRAM_CONFIG__bank_sel0__bit20 20
+#define R_SDRAM_CONFIG__bank_sel0__bit21 21
+#define R_SDRAM_CONFIG__bank_sel0__bit22 22
+#define R_SDRAM_CONFIG__bank_sel0__bit23 23
+#define R_SDRAM_CONFIG__bank_sel0__bit24 24
+#define R_SDRAM_CONFIG__bank_sel0__bit25 25
+#define R_SDRAM_CONFIG__bank_sel0__bit26 26
+#define R_SDRAM_CONFIG__bank_sel0__bit27 27
+#define R_SDRAM_CONFIG__bank_sel0__bit28 28
+#define R_SDRAM_CONFIG__bank_sel0__bit29 29
+
+/*
+!* External DMA registers
+!*/
+
+#define R_EXT_DMA_0_CMD (IO_TYPECAST_UDWORD 0xb0000010)
+#define R_EXT_DMA_0_CMD__cnt__BITNR 23
+#define R_EXT_DMA_0_CMD__cnt__WIDTH 1
+#define R_EXT_DMA_0_CMD__cnt__enable 1
+#define R_EXT_DMA_0_CMD__cnt__disable 0
+#define R_EXT_DMA_0_CMD__rqpol__BITNR 22
+#define R_EXT_DMA_0_CMD__rqpol__WIDTH 1
+#define R_EXT_DMA_0_CMD__rqpol__ahigh 0
+#define R_EXT_DMA_0_CMD__rqpol__alow 1
+#define R_EXT_DMA_0_CMD__apol__BITNR 21
+#define R_EXT_DMA_0_CMD__apol__WIDTH 1
+#define R_EXT_DMA_0_CMD__apol__ahigh 0
+#define R_EXT_DMA_0_CMD__apol__alow 1
+#define R_EXT_DMA_0_CMD__rq_ack__BITNR 20
+#define R_EXT_DMA_0_CMD__rq_ack__WIDTH 1
+#define R_EXT_DMA_0_CMD__rq_ack__burst 0
+#define R_EXT_DMA_0_CMD__rq_ack__handsh 1
+#define R_EXT_DMA_0_CMD__wid__BITNR 18
+#define R_EXT_DMA_0_CMD__wid__WIDTH 2
+#define R_EXT_DMA_0_CMD__wid__byte 0
+#define R_EXT_DMA_0_CMD__wid__word 1
+#define R_EXT_DMA_0_CMD__wid__dword 2
+#define R_EXT_DMA_0_CMD__dir__BITNR 17
+#define R_EXT_DMA_0_CMD__dir__WIDTH 1
+#define R_EXT_DMA_0_CMD__dir__input 0
+#define R_EXT_DMA_0_CMD__dir__output 1
+#define R_EXT_DMA_0_CMD__run__BITNR 16
+#define R_EXT_DMA_0_CMD__run__WIDTH 1
+#define R_EXT_DMA_0_CMD__run__start 1
+#define R_EXT_DMA_0_CMD__run__stop 0
+#define R_EXT_DMA_0_CMD__trf_count__BITNR 0
+#define R_EXT_DMA_0_CMD__trf_count__WIDTH 16
+
+#define R_EXT_DMA_0_STAT (IO_TYPECAST_RO_UDWORD 0xb0000010)
+#define R_EXT_DMA_0_STAT__run__BITNR 16
+#define R_EXT_DMA_0_STAT__run__WIDTH 1
+#define R_EXT_DMA_0_STAT__run__start 1
+#define R_EXT_DMA_0_STAT__run__stop 0
+#define R_EXT_DMA_0_STAT__trf_count__BITNR 0
+#define R_EXT_DMA_0_STAT__trf_count__WIDTH 16
+
+#define R_EXT_DMA_0_ADDR (IO_TYPECAST_UDWORD 0xb0000014)
+#define R_EXT_DMA_0_ADDR__ext0_addr__BITNR 2
+#define R_EXT_DMA_0_ADDR__ext0_addr__WIDTH 28
+
+#define R_EXT_DMA_1_CMD (IO_TYPECAST_UDWORD 0xb0000018)
+#define R_EXT_DMA_1_CMD__cnt__BITNR 23
+#define R_EXT_DMA_1_CMD__cnt__WIDTH 1
+#define R_EXT_DMA_1_CMD__cnt__enable 1
+#define R_EXT_DMA_1_CMD__cnt__disable 0
+#define R_EXT_DMA_1_CMD__rqpol__BITNR 22
+#define R_EXT_DMA_1_CMD__rqpol__WIDTH 1
+#define R_EXT_DMA_1_CMD__rqpol__ahigh 0
+#define R_EXT_DMA_1_CMD__rqpol__alow 1
+#define R_EXT_DMA_1_CMD__apol__BITNR 21
+#define R_EXT_DMA_1_CMD__apol__WIDTH 1
+#define R_EXT_DMA_1_CMD__apol__ahigh 0
+#define R_EXT_DMA_1_CMD__apol__alow 1
+#define R_EXT_DMA_1_CMD__rq_ack__BITNR 20
+#define R_EXT_DMA_1_CMD__rq_ack__WIDTH 1
+#define R_EXT_DMA_1_CMD__rq_ack__burst 0
+#define R_EXT_DMA_1_CMD__rq_ack__handsh 1
+#define R_EXT_DMA_1_CMD__wid__BITNR 18
+#define R_EXT_DMA_1_CMD__wid__WIDTH 2
+#define R_EXT_DMA_1_CMD__wid__byte 0
+#define R_EXT_DMA_1_CMD__wid__word 1
+#define R_EXT_DMA_1_CMD__wid__dword 2
+#define R_EXT_DMA_1_CMD__dir__BITNR 17
+#define R_EXT_DMA_1_CMD__dir__WIDTH 1
+#define R_EXT_DMA_1_CMD__dir__input 0
+#define R_EXT_DMA_1_CMD__dir__output 1
+#define R_EXT_DMA_1_CMD__run__BITNR 16
+#define R_EXT_DMA_1_CMD__run__WIDTH 1
+#define R_EXT_DMA_1_CMD__run__start 1
+#define R_EXT_DMA_1_CMD__run__stop 0
+#define R_EXT_DMA_1_CMD__trf_count__BITNR 0
+#define R_EXT_DMA_1_CMD__trf_count__WIDTH 16
+
+#define R_EXT_DMA_1_STAT (IO_TYPECAST_RO_UDWORD 0xb0000018)
+#define R_EXT_DMA_1_STAT__run__BITNR 16
+#define R_EXT_DMA_1_STAT__run__WIDTH 1
+#define R_EXT_DMA_1_STAT__run__start 1
+#define R_EXT_DMA_1_STAT__run__stop 0
+#define R_EXT_DMA_1_STAT__trf_count__BITNR 0
+#define R_EXT_DMA_1_STAT__trf_count__WIDTH 16
+
+#define R_EXT_DMA_1_ADDR (IO_TYPECAST_UDWORD 0xb000001c)
+#define R_EXT_DMA_1_ADDR__ext0_addr__BITNR 2
+#define R_EXT_DMA_1_ADDR__ext0_addr__WIDTH 28
+
+/*
+!* Timer registers
+!*/
+
+#define R_TIMER_CTRL (IO_TYPECAST_UDWORD 0xb0000020)
+#define R_TIMER_CTRL__timerdiv1__BITNR 24
+#define R_TIMER_CTRL__timerdiv1__WIDTH 8
+#define R_TIMER_CTRL__timerdiv0__BITNR 16
+#define R_TIMER_CTRL__timerdiv0__WIDTH 8
+#define R_TIMER_CTRL__presc_timer1__BITNR 15
+#define R_TIMER_CTRL__presc_timer1__WIDTH 1
+#define R_TIMER_CTRL__presc_timer1__normal 0
+#define R_TIMER_CTRL__presc_timer1__prescale 1
+#define R_TIMER_CTRL__i1__BITNR 14
+#define R_TIMER_CTRL__i1__WIDTH 1
+#define R_TIMER_CTRL__i1__clr 1
+#define R_TIMER_CTRL__i1__nop 0
+#define R_TIMER_CTRL__tm1__BITNR 12
+#define R_TIMER_CTRL__tm1__WIDTH 2
+#define R_TIMER_CTRL__tm1__stop_ld 0
+#define R_TIMER_CTRL__tm1__freeze 1
+#define R_TIMER_CTRL__tm1__run 2
+#define R_TIMER_CTRL__tm1__reserved 3
+#define R_TIMER_CTRL__clksel1__BITNR 8
+#define R_TIMER_CTRL__clksel1__WIDTH 4
+#define R_TIMER_CTRL__clksel1__c300Hz 0
+#define R_TIMER_CTRL__clksel1__c600Hz 1
+#define R_TIMER_CTRL__clksel1__c1200Hz 2
+#define R_TIMER_CTRL__clksel1__c2400Hz 3
+#define R_TIMER_CTRL__clksel1__c4800Hz 4
+#define R_TIMER_CTRL__clksel1__c9600Hz 5
+#define R_TIMER_CTRL__clksel1__c19k2Hz 6
+#define R_TIMER_CTRL__clksel1__c38k4Hz 7
+#define R_TIMER_CTRL__clksel1__c57k6Hz 8
+#define R_TIMER_CTRL__clksel1__c115k2Hz 9
+#define R_TIMER_CTRL__clksel1__c230k4Hz 10
+#define R_TIMER_CTRL__clksel1__c460k8Hz 11
+#define R_TIMER_CTRL__clksel1__c921k6Hz 12
+#define R_TIMER_CTRL__clksel1__c1843k2Hz 13
+#define R_TIMER_CTRL__clksel1__c6250kHz 14
+#define R_TIMER_CTRL__clksel1__cascade0 15
+#define R_TIMER_CTRL__presc_ext__BITNR 7
+#define R_TIMER_CTRL__presc_ext__WIDTH 1
+#define R_TIMER_CTRL__presc_ext__prescale 0
+#define R_TIMER_CTRL__presc_ext__external 1
+#define R_TIMER_CTRL__i0__BITNR 6
+#define R_TIMER_CTRL__i0__WIDTH 1
+#define R_TIMER_CTRL__i0__clr 1
+#define R_TIMER_CTRL__i0__nop 0
+#define R_TIMER_CTRL__tm0__BITNR 4
+#define R_TIMER_CTRL__tm0__WIDTH 2
+#define R_TIMER_CTRL__tm0__stop_ld 0
+#define R_TIMER_CTRL__tm0__freeze 1
+#define R_TIMER_CTRL__tm0__run 2
+#define R_TIMER_CTRL__tm0__reserved 3
+#define R_TIMER_CTRL__clksel0__BITNR 0
+#define R_TIMER_CTRL__clksel0__WIDTH 4
+#define R_TIMER_CTRL__clksel0__c300Hz 0
+#define R_TIMER_CTRL__clksel0__c600Hz 1
+#define R_TIMER_CTRL__clksel0__c1200Hz 2
+#define R_TIMER_CTRL__clksel0__c2400Hz 3
+#define R_TIMER_CTRL__clksel0__c4800Hz 4
+#define R_TIMER_CTRL__clksel0__c9600Hz 5
+#define R_TIMER_CTRL__clksel0__c19k2Hz 6
+#define R_TIMER_CTRL__clksel0__c38k4Hz 7
+#define R_TIMER_CTRL__clksel0__c57k6Hz 8
+#define R_TIMER_CTRL__clksel0__c115k2Hz 9
+#define R_TIMER_CTRL__clksel0__c230k4Hz 10
+#define R_TIMER_CTRL__clksel0__c460k8Hz 11
+#define R_TIMER_CTRL__clksel0__c921k6Hz 12
+#define R_TIMER_CTRL__clksel0__c1843k2Hz 13
+#define R_TIMER_CTRL__clksel0__c6250kHz 14
+#define R_TIMER_CTRL__clksel0__flexible 15
+
+#define R_TIMER_DATA (IO_TYPECAST_RO_UDWORD 0xb0000020)
+#define R_TIMER_DATA__timer1__BITNR 24
+#define R_TIMER_DATA__timer1__WIDTH 8
+#define R_TIMER_DATA__timer0__BITNR 16
+#define R_TIMER_DATA__timer0__WIDTH 8
+#define R_TIMER_DATA__clkdiv_high__BITNR 8
+#define R_TIMER_DATA__clkdiv_high__WIDTH 8
+#define R_TIMER_DATA__clkdiv_low__BITNR 0
+#define R_TIMER_DATA__clkdiv_low__WIDTH 8
+
+#define R_TIMER01_DATA (IO_TYPECAST_RO_UWORD 0xb0000022)
+#define R_TIMER01_DATA__count__BITNR 0
+#define R_TIMER01_DATA__count__WIDTH 16
+
+#define R_TIMER0_DATA (IO_TYPECAST_RO_BYTE 0xb0000022)
+#define R_TIMER0_DATA__count__BITNR 0
+#define R_TIMER0_DATA__count__WIDTH 8
+
+#define R_TIMER1_DATA (IO_TYPECAST_RO_BYTE 0xb0000023)
+#define R_TIMER1_DATA__count__BITNR 0
+#define R_TIMER1_DATA__count__WIDTH 8
+
+#define R_WATCHDOG (IO_TYPECAST_UDWORD 0xb0000024)
+#define R_WATCHDOG__key__BITNR 1
+#define R_WATCHDOG__key__WIDTH 3
+#define R_WATCHDOG__enable__BITNR 0
+#define R_WATCHDOG__enable__WIDTH 1
+#define R_WATCHDOG__enable__stop 0
+#define R_WATCHDOG__enable__start 1
+
+#define R_CLOCK_PRESCALE (IO_TYPECAST_UDWORD 0xb00000f0)
+#define R_CLOCK_PRESCALE__ser_presc__BITNR 16
+#define R_CLOCK_PRESCALE__ser_presc__WIDTH 16
+#define R_CLOCK_PRESCALE__tim_presc__BITNR 0
+#define R_CLOCK_PRESCALE__tim_presc__WIDTH 16
+
+#define R_SERIAL_PRESCALE (IO_TYPECAST_UWORD 0xb00000f2)
+#define R_SERIAL_PRESCALE__ser_presc__BITNR 0
+#define R_SERIAL_PRESCALE__ser_presc__WIDTH 16
+
+#define R_TIMER_PRESCALE (IO_TYPECAST_UWORD 0xb00000f0)
+#define R_TIMER_PRESCALE__tim_presc__BITNR 0
+#define R_TIMER_PRESCALE__tim_presc__WIDTH 16
+
+#define R_PRESCALE_STATUS (IO_TYPECAST_RO_UDWORD 0xb00000f0)
+#define R_PRESCALE_STATUS__ser_status__BITNR 16
+#define R_PRESCALE_STATUS__ser_status__WIDTH 16
+#define R_PRESCALE_STATUS__tim_status__BITNR 0
+#define R_PRESCALE_STATUS__tim_status__WIDTH 16
+
+#define R_SER_PRESC_STATUS (IO_TYPECAST_RO_UWORD 0xb00000f2)
+#define R_SER_PRESC_STATUS__ser_status__BITNR 0
+#define R_SER_PRESC_STATUS__ser_status__WIDTH 16
+
+#define R_TIM_PRESC_STATUS (IO_TYPECAST_RO_UWORD 0xb00000f0)
+#define R_TIM_PRESC_STATUS__tim_status__BITNR 0
+#define R_TIM_PRESC_STATUS__tim_status__WIDTH 16
+
+#define R_SYNC_SERIAL_PRESCALE (IO_TYPECAST_UDWORD 0xb00000f4)
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u3__BITNR 23
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u3__WIDTH 1
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u3__codec 0
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u3__baudrate 1
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u3__BITNR 22
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u3__WIDTH 1
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u3__external 0
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u3__internal 1
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u1__BITNR 21
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u1__WIDTH 1
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u1__codec 0
+#define R_SYNC_SERIAL_PRESCALE__clk_sel_u1__baudrate 1
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u1__BITNR 20
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u1__WIDTH 1
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u1__external 0
+#define R_SYNC_SERIAL_PRESCALE__word_stb_sel_u1__internal 1
+#define R_SYNC_SERIAL_PRESCALE__prescaler__BITNR 16
+#define R_SYNC_SERIAL_PRESCALE__prescaler__WIDTH 3
+#define R_SYNC_SERIAL_PRESCALE__prescaler__div1 0
+#define R_SYNC_SERIAL_PRESCALE__prescaler__div2 1
+#define R_SYNC_SERIAL_PRESCALE__prescaler__div4 2
+#define R_SYNC_SERIAL_PRESCALE__prescaler__div8 3
+#define R_SYNC_SERIAL_PRESCALE__prescaler__div16 4
+#define R_SYNC_SERIAL_PRESCALE__prescaler__div32 5
+#define R_SYNC_SERIAL_PRESCALE__prescaler__div64 6
+#define R_SYNC_SERIAL_PRESCALE__prescaler__div128 7
+#define R_SYNC_SERIAL_PRESCALE__warp_mode__BITNR 15
+#define R_SYNC_SERIAL_PRESCALE__warp_mode__WIDTH 1
+#define R_SYNC_SERIAL_PRESCALE__warp_mode__normal 0
+#define R_SYNC_SERIAL_PRESCALE__warp_mode__enabled 1
+#define R_SYNC_SERIAL_PRESCALE__frame_rate__BITNR 11
+#define R_SYNC_SERIAL_PRESCALE__frame_rate__WIDTH 4
+#define R_SYNC_SERIAL_PRESCALE__word_rate__BITNR 0
+#define R_SYNC_SERIAL_PRESCALE__word_rate__WIDTH 10
+
+/*
+!* Shared RAM interface registers
+!*/
+
+#define R_SHARED_RAM_CONFIG (IO_TYPECAST_UDWORD 0xb0000040)
+#define R_SHARED_RAM_CONFIG__width__BITNR 3
+#define R_SHARED_RAM_CONFIG__width__WIDTH 1
+#define R_SHARED_RAM_CONFIG__width__byte 0
+#define R_SHARED_RAM_CONFIG__width__word 1
+#define R_SHARED_RAM_CONFIG__enable__BITNR 2
+#define R_SHARED_RAM_CONFIG__enable__WIDTH 1
+#define R_SHARED_RAM_CONFIG__enable__yes 1
+#define R_SHARED_RAM_CONFIG__enable__no 0
+#define R_SHARED_RAM_CONFIG__pint__BITNR 1
+#define R_SHARED_RAM_CONFIG__pint__WIDTH 1
+#define R_SHARED_RAM_CONFIG__pint__int 1
+#define R_SHARED_RAM_CONFIG__pint__nop 0
+#define R_SHARED_RAM_CONFIG__clri__BITNR 0
+#define R_SHARED_RAM_CONFIG__clri__WIDTH 1
+#define R_SHARED_RAM_CONFIG__clri__clr 1
+#define R_SHARED_RAM_CONFIG__clri__nop 0
+
+#define R_SHARED_RAM_ADDR (IO_TYPECAST_UDWORD 0xb0000044)
+#define R_SHARED_RAM_ADDR__base_addr__BITNR 8
+#define R_SHARED_RAM_ADDR__base_addr__WIDTH 22
+
+/*
+!* General config registers
+!*/
+
+#define R_GEN_CONFIG (IO_TYPECAST_UDWORD 0xb000002c)
+#define R_GEN_CONFIG__par_w__BITNR 31
+#define R_GEN_CONFIG__par_w__WIDTH 1
+#define R_GEN_CONFIG__par_w__select 1
+#define R_GEN_CONFIG__par_w__disable 0
+#define R_GEN_CONFIG__usb2__BITNR 30
+#define R_GEN_CONFIG__usb2__WIDTH 1
+#define R_GEN_CONFIG__usb2__select 1
+#define R_GEN_CONFIG__usb2__disable 0
+#define R_GEN_CONFIG__usb1__BITNR 29
+#define R_GEN_CONFIG__usb1__WIDTH 1
+#define R_GEN_CONFIG__usb1__select 1
+#define R_GEN_CONFIG__usb1__disable 0
+#define R_GEN_CONFIG__g24dir__BITNR 27
+#define R_GEN_CONFIG__g24dir__WIDTH 1
+#define R_GEN_CONFIG__g24dir__in 0
+#define R_GEN_CONFIG__g24dir__out 1
+#define R_GEN_CONFIG__g16_23dir__BITNR 26
+#define R_GEN_CONFIG__g16_23dir__WIDTH 1
+#define R_GEN_CONFIG__g16_23dir__in 0
+#define R_GEN_CONFIG__g16_23dir__out 1
+#define R_GEN_CONFIG__g16_20dir__BITNR 26
+#define R_GEN_CONFIG__g16_20dir__WIDTH 1
+#define R_GEN_CONFIG__g16_20dir__in 0
+#define R_GEN_CONFIG__g16_20dir__out 1
+#define R_GEN_CONFIG__g8_15dir__BITNR 25
+#define R_GEN_CONFIG__g8_15dir__WIDTH 1
+#define R_GEN_CONFIG__g8_15dir__in 0
+#define R_GEN_CONFIG__g8_15dir__out 1
+#define R_GEN_CONFIG__g0dir__BITNR 24
+#define R_GEN_CONFIG__g0dir__WIDTH 1
+#define R_GEN_CONFIG__g0dir__in 0
+#define R_GEN_CONFIG__g0dir__out 1
+#define R_GEN_CONFIG__dma9__BITNR 23
+#define R_GEN_CONFIG__dma9__WIDTH 1
+#define R_GEN_CONFIG__dma9__usb 0
+#define R_GEN_CONFIG__dma9__serial1 1
+#define R_GEN_CONFIG__dma8__BITNR 22
+#define R_GEN_CONFIG__dma8__WIDTH 1
+#define R_GEN_CONFIG__dma8__usb 0
+#define R_GEN_CONFIG__dma8__serial1 1
+#define R_GEN_CONFIG__dma7__BITNR 20
+#define R_GEN_CONFIG__dma7__WIDTH 2
+#define R_GEN_CONFIG__dma7__unused 0
+#define R_GEN_CONFIG__dma7__serial0 1
+#define R_GEN_CONFIG__dma7__extdma1 2
+#define R_GEN_CONFIG__dma7__intdma6 3
+#define R_GEN_CONFIG__dma6__BITNR 18
+#define R_GEN_CONFIG__dma6__WIDTH 2
+#define R_GEN_CONFIG__dma6__unused 0
+#define R_GEN_CONFIG__dma6__serial0 1
+#define R_GEN_CONFIG__dma6__extdma1 2
+#define R_GEN_CONFIG__dma6__intdma7 3
+#define R_GEN_CONFIG__dma5__BITNR 16
+#define R_GEN_CONFIG__dma5__WIDTH 2
+#define R_GEN_CONFIG__dma5__par1 0
+#define R_GEN_CONFIG__dma5__scsi1 1
+#define R_GEN_CONFIG__dma5__serial3 2
+#define R_GEN_CONFIG__dma5__extdma0 3
+#define R_GEN_CONFIG__dma4__BITNR 14
+#define R_GEN_CONFIG__dma4__WIDTH 2
+#define R_GEN_CONFIG__dma4__par1 0
+#define R_GEN_CONFIG__dma4__scsi1 1
+#define R_GEN_CONFIG__dma4__serial3 2
+#define R_GEN_CONFIG__dma4__extdma0 3
+#define R_GEN_CONFIG__dma3__BITNR 12
+#define R_GEN_CONFIG__dma3__WIDTH 2
+#define R_GEN_CONFIG__dma3__par0 0
+#define R_GEN_CONFIG__dma3__scsi0 1
+#define R_GEN_CONFIG__dma3__serial2 2
+#define R_GEN_CONFIG__dma3__ata 3
+#define R_GEN_CONFIG__dma2__BITNR 10
+#define R_GEN_CONFIG__dma2__WIDTH 2
+#define R_GEN_CONFIG__dma2__par0 0
+#define R_GEN_CONFIG__dma2__scsi0 1
+#define R_GEN_CONFIG__dma2__serial2 2
+#define R_GEN_CONFIG__dma2__ata 3
+#define R_GEN_CONFIG__mio_w__BITNR 9
+#define R_GEN_CONFIG__mio_w__WIDTH 1
+#define R_GEN_CONFIG__mio_w__select 1
+#define R_GEN_CONFIG__mio_w__disable 0
+#define R_GEN_CONFIG__ser3__BITNR 8
+#define R_GEN_CONFIG__ser3__WIDTH 1
+#define R_GEN_CONFIG__ser3__select 1
+#define R_GEN_CONFIG__ser3__disable 0
+#define R_GEN_CONFIG__par1__BITNR 7
+#define R_GEN_CONFIG__par1__WIDTH 1
+#define R_GEN_CONFIG__par1__select 1
+#define R_GEN_CONFIG__par1__disable 0
+#define R_GEN_CONFIG__scsi0w__BITNR 6
+#define R_GEN_CONFIG__scsi0w__WIDTH 1
+#define R_GEN_CONFIG__scsi0w__select 1
+#define R_GEN_CONFIG__scsi0w__disable 0
+#define R_GEN_CONFIG__scsi1__BITNR 5
+#define R_GEN_CONFIG__scsi1__WIDTH 1
+#define R_GEN_CONFIG__scsi1__select 1
+#define R_GEN_CONFIG__scsi1__disable 0
+#define R_GEN_CONFIG__mio__BITNR 4
+#define R_GEN_CONFIG__mio__WIDTH 1
+#define R_GEN_CONFIG__mio__select 1
+#define R_GEN_CONFIG__mio__disable 0
+#define R_GEN_CONFIG__ser2__BITNR 3
+#define R_GEN_CONFIG__ser2__WIDTH 1
+#define R_GEN_CONFIG__ser2__select 1
+#define R_GEN_CONFIG__ser2__disable 0
+#define R_GEN_CONFIG__par0__BITNR 2
+#define R_GEN_CONFIG__par0__WIDTH 1
+#define R_GEN_CONFIG__par0__select 1
+#define R_GEN_CONFIG__par0__disable 0
+#define R_GEN_CONFIG__ata__BITNR 1
+#define R_GEN_CONFIG__ata__WIDTH 1
+#define R_GEN_CONFIG__ata__select 1
+#define R_GEN_CONFIG__ata__disable 0
+#define R_GEN_CONFIG__scsi0__BITNR 0
+#define R_GEN_CONFIG__scsi0__WIDTH 1
+#define R_GEN_CONFIG__scsi0__select 1
+#define R_GEN_CONFIG__scsi0__disable 0
+
+#define R_GEN_CONFIG_II (IO_TYPECAST_UDWORD 0xb0000034)
+#define R_GEN_CONFIG_II__sermode3__BITNR 6
+#define R_GEN_CONFIG_II__sermode3__WIDTH 1
+#define R_GEN_CONFIG_II__sermode3__async 0
+#define R_GEN_CONFIG_II__sermode3__sync 1
+#define R_GEN_CONFIG_II__sermode1__BITNR 4
+#define R_GEN_CONFIG_II__sermode1__WIDTH 1
+#define R_GEN_CONFIG_II__sermode1__async 0
+#define R_GEN_CONFIG_II__sermode1__sync 1
+#define R_GEN_CONFIG_II__ext_clk__BITNR 2
+#define R_GEN_CONFIG_II__ext_clk__WIDTH 1
+#define R_GEN_CONFIG_II__ext_clk__select 1
+#define R_GEN_CONFIG_II__ext_clk__disable 0
+#define R_GEN_CONFIG_II__ser3__BITNR 1
+#define R_GEN_CONFIG_II__ser3__WIDTH 1
+#define R_GEN_CONFIG_II__ser3__select 1
+#define R_GEN_CONFIG_II__ser3__disable 0
+#define R_GEN_CONFIG_II__ser2__BITNR 0
+#define R_GEN_CONFIG_II__ser2__WIDTH 1
+#define R_GEN_CONFIG_II__ser2__select 1
+#define R_GEN_CONFIG_II__ser2__disable 0
+
+#define R_PORT_G_DATA (IO_TYPECAST_UDWORD 0xb0000028)
+#define R_PORT_G_DATA__data__BITNR 0
+#define R_PORT_G_DATA__data__WIDTH 32
+
+/*
+!* General port configuration registers
+!*/
+
+#define R_PORT_PA_SET (IO_TYPECAST_UDWORD 0xb0000030)
+#define R_PORT_PA_SET__dir7__BITNR 15
+#define R_PORT_PA_SET__dir7__WIDTH 1
+#define R_PORT_PA_SET__dir7__input 0
+#define R_PORT_PA_SET__dir7__output 1
+#define R_PORT_PA_SET__dir6__BITNR 14
+#define R_PORT_PA_SET__dir6__WIDTH 1
+#define R_PORT_PA_SET__dir6__input 0
+#define R_PORT_PA_SET__dir6__output 1
+#define R_PORT_PA_SET__dir5__BITNR 13
+#define R_PORT_PA_SET__dir5__WIDTH 1
+#define R_PORT_PA_SET__dir5__input 0
+#define R_PORT_PA_SET__dir5__output 1
+#define R_PORT_PA_SET__dir4__BITNR 12
+#define R_PORT_PA_SET__dir4__WIDTH 1
+#define R_PORT_PA_SET__dir4__input 0
+#define R_PORT_PA_SET__dir4__output 1
+#define R_PORT_PA_SET__dir3__BITNR 11
+#define R_PORT_PA_SET__dir3__WIDTH 1
+#define R_PORT_PA_SET__dir3__input 0
+#define R_PORT_PA_SET__dir3__output 1
+#define R_PORT_PA_SET__dir2__BITNR 10
+#define R_PORT_PA_SET__dir2__WIDTH 1
+#define R_PORT_PA_SET__dir2__input 0
+#define R_PORT_PA_SET__dir2__output 1
+#define R_PORT_PA_SET__dir1__BITNR 9
+#define R_PORT_PA_SET__dir1__WIDTH 1
+#define R_PORT_PA_SET__dir1__input 0
+#define R_PORT_PA_SET__dir1__output 1
+#define R_PORT_PA_SET__dir0__BITNR 8
+#define R_PORT_PA_SET__dir0__WIDTH 1
+#define R_PORT_PA_SET__dir0__input 0
+#define R_PORT_PA_SET__dir0__output 1
+#define R_PORT_PA_SET__data_out__BITNR 0
+#define R_PORT_PA_SET__data_out__WIDTH 8
+
+#define R_PORT_PA_DATA (IO_TYPECAST_BYTE 0xb0000030)
+#define R_PORT_PA_DATA__data_out__BITNR 0
+#define R_PORT_PA_DATA__data_out__WIDTH 8
+
+#define R_PORT_PA_DIR (IO_TYPECAST_BYTE 0xb0000031)
+#define R_PORT_PA_DIR__dir7__BITNR 7
+#define R_PORT_PA_DIR__dir7__WIDTH 1
+#define R_PORT_PA_DIR__dir7__input 0
+#define R_PORT_PA_DIR__dir7__output 1
+#define R_PORT_PA_DIR__dir6__BITNR 6
+#define R_PORT_PA_DIR__dir6__WIDTH 1
+#define R_PORT_PA_DIR__dir6__input 0
+#define R_PORT_PA_DIR__dir6__output 1
+#define R_PORT_PA_DIR__dir5__BITNR 5
+#define R_PORT_PA_DIR__dir5__WIDTH 1
+#define R_PORT_PA_DIR__dir5__input 0
+#define R_PORT_PA_DIR__dir5__output 1
+#define R_PORT_PA_DIR__dir4__BITNR 4
+#define R_PORT_PA_DIR__dir4__WIDTH 1
+#define R_PORT_PA_DIR__dir4__input 0
+#define R_PORT_PA_DIR__dir4__output 1
+#define R_PORT_PA_DIR__dir3__BITNR 3
+#define R_PORT_PA_DIR__dir3__WIDTH 1
+#define R_PORT_PA_DIR__dir3__input 0
+#define R_PORT_PA_DIR__dir3__output 1
+#define R_PORT_PA_DIR__dir2__BITNR 2
+#define R_PORT_PA_DIR__dir2__WIDTH 1
+#define R_PORT_PA_DIR__dir2__input 0
+#define R_PORT_PA_DIR__dir2__output 1
+#define R_PORT_PA_DIR__dir1__BITNR 1
+#define R_PORT_PA_DIR__dir1__WIDTH 1
+#define R_PORT_PA_DIR__dir1__input 0
+#define R_PORT_PA_DIR__dir1__output 1
+#define R_PORT_PA_DIR__dir0__BITNR 0
+#define R_PORT_PA_DIR__dir0__WIDTH 1
+#define R_PORT_PA_DIR__dir0__input 0
+#define R_PORT_PA_DIR__dir0__output 1
+
+#define R_PORT_PA_READ (IO_TYPECAST_RO_UDWORD 0xb0000030)
+#define R_PORT_PA_READ__data_in__BITNR 0
+#define R_PORT_PA_READ__data_in__WIDTH 8
+
+#define R_PORT_PB_SET (IO_TYPECAST_UDWORD 0xb0000038)
+#define R_PORT_PB_SET__syncser3__BITNR 29
+#define R_PORT_PB_SET__syncser3__WIDTH 1
+#define R_PORT_PB_SET__syncser3__port_cs 0
+#define R_PORT_PB_SET__syncser3__ss3extra 1
+#define R_PORT_PB_SET__syncser1__BITNR 28
+#define R_PORT_PB_SET__syncser1__WIDTH 1
+#define R_PORT_PB_SET__syncser1__port_cs 0
+#define R_PORT_PB_SET__syncser1__ss1extra 1
+#define R_PORT_PB_SET__i2c_en__BITNR 27
+#define R_PORT_PB_SET__i2c_en__WIDTH 1
+#define R_PORT_PB_SET__i2c_en__off 0
+#define R_PORT_PB_SET__i2c_en__on 1
+#define R_PORT_PB_SET__i2c_d__BITNR 26
+#define R_PORT_PB_SET__i2c_d__WIDTH 1
+#define R_PORT_PB_SET__i2c_clk__BITNR 25
+#define R_PORT_PB_SET__i2c_clk__WIDTH 1
+#define R_PORT_PB_SET__i2c_oe___BITNR 24
+#define R_PORT_PB_SET__i2c_oe___WIDTH 1
+#define R_PORT_PB_SET__i2c_oe___enable 0
+#define R_PORT_PB_SET__i2c_oe___disable 1
+#define R_PORT_PB_SET__cs7__BITNR 23
+#define R_PORT_PB_SET__cs7__WIDTH 1
+#define R_PORT_PB_SET__cs7__port 0
+#define R_PORT_PB_SET__cs7__cs 1
+#define R_PORT_PB_SET__cs6__BITNR 22
+#define R_PORT_PB_SET__cs6__WIDTH 1
+#define R_PORT_PB_SET__cs6__port 0
+#define R_PORT_PB_SET__cs6__cs 1
+#define R_PORT_PB_SET__cs5__BITNR 21
+#define R_PORT_PB_SET__cs5__WIDTH 1
+#define R_PORT_PB_SET__cs5__port 0
+#define R_PORT_PB_SET__cs5__cs 1
+#define R_PORT_PB_SET__cs4__BITNR 20
+#define R_PORT_PB_SET__cs4__WIDTH 1
+#define R_PORT_PB_SET__cs4__port 0
+#define R_PORT_PB_SET__cs4__cs 1
+#define R_PORT_PB_SET__cs3__BITNR 19
+#define R_PORT_PB_SET__cs3__WIDTH 1
+#define R_PORT_PB_SET__cs3__port 0
+#define R_PORT_PB_SET__cs3__cs 1
+#define R_PORT_PB_SET__cs2__BITNR 18
+#define R_PORT_PB_SET__cs2__WIDTH 1
+#define R_PORT_PB_SET__cs2__port 0
+#define R_PORT_PB_SET__cs2__cs 1
+#define R_PORT_PB_SET__scsi1__BITNR 17
+#define R_PORT_PB_SET__scsi1__WIDTH 1
+#define R_PORT_PB_SET__scsi1__port_cs 0
+#define R_PORT_PB_SET__scsi1__enph 1
+#define R_PORT_PB_SET__scsi0__BITNR 16
+#define R_PORT_PB_SET__scsi0__WIDTH 1
+#define R_PORT_PB_SET__scsi0__port_cs 0
+#define R_PORT_PB_SET__scsi0__enph 1
+#define R_PORT_PB_SET__dir7__BITNR 15
+#define R_PORT_PB_SET__dir7__WIDTH 1
+#define R_PORT_PB_SET__dir7__input 0
+#define R_PORT_PB_SET__dir7__output 1
+#define R_PORT_PB_SET__dir6__BITNR 14
+#define R_PORT_PB_SET__dir6__WIDTH 1
+#define R_PORT_PB_SET__dir6__input 0
+#define R_PORT_PB_SET__dir6__output 1
+#define R_PORT_PB_SET__dir5__BITNR 13
+#define R_PORT_PB_SET__dir5__WIDTH 1
+#define R_PORT_PB_SET__dir5__input 0
+#define R_PORT_PB_SET__dir5__output 1
+#define R_PORT_PB_SET__dir4__BITNR 12
+#define R_PORT_PB_SET__dir4__WIDTH 1
+#define R_PORT_PB_SET__dir4__input 0
+#define R_PORT_PB_SET__dir4__output 1
+#define R_PORT_PB_SET__dir3__BITNR 11
+#define R_PORT_PB_SET__dir3__WIDTH 1
+#define R_PORT_PB_SET__dir3__input 0
+#define R_PORT_PB_SET__dir3__output 1
+#define R_PORT_PB_SET__dir2__BITNR 10
+#define R_PORT_PB_SET__dir2__WIDTH 1
+#define R_PORT_PB_SET__dir2__input 0
+#define R_PORT_PB_SET__dir2__output 1
+#define R_PORT_PB_SET__dir1__BITNR 9
+#define R_PORT_PB_SET__dir1__WIDTH 1
+#define R_PORT_PB_SET__dir1__input 0
+#define R_PORT_PB_SET__dir1__output 1
+#define R_PORT_PB_SET__dir0__BITNR 8
+#define R_PORT_PB_SET__dir0__WIDTH 1
+#define R_PORT_PB_SET__dir0__input 0
+#define R_PORT_PB_SET__dir0__output 1
+#define R_PORT_PB_SET__data_out__BITNR 0
+#define R_PORT_PB_SET__data_out__WIDTH 8
+
+#define R_PORT_PB_DATA (IO_TYPECAST_BYTE 0xb0000038)
+#define R_PORT_PB_DATA__data_out__BITNR 0
+#define R_PORT_PB_DATA__data_out__WIDTH 8
+
+#define R_PORT_PB_DIR (IO_TYPECAST_BYTE 0xb0000039)
+#define R_PORT_PB_DIR__dir7__BITNR 7
+#define R_PORT_PB_DIR__dir7__WIDTH 1
+#define R_PORT_PB_DIR__dir7__input 0
+#define R_PORT_PB_DIR__dir7__output 1
+#define R_PORT_PB_DIR__dir6__BITNR 6
+#define R_PORT_PB_DIR__dir6__WIDTH 1
+#define R_PORT_PB_DIR__dir6__input 0
+#define R_PORT_PB_DIR__dir6__output 1
+#define R_PORT_PB_DIR__dir5__BITNR 5
+#define R_PORT_PB_DIR__dir5__WIDTH 1
+#define R_PORT_PB_DIR__dir5__input 0
+#define R_PORT_PB_DIR__dir5__output 1
+#define R_PORT_PB_DIR__dir4__BITNR 4
+#define R_PORT_PB_DIR__dir4__WIDTH 1
+#define R_PORT_PB_DIR__dir4__input 0
+#define R_PORT_PB_DIR__dir4__output 1
+#define R_PORT_PB_DIR__dir3__BITNR 3
+#define R_PORT_PB_DIR__dir3__WIDTH 1
+#define R_PORT_PB_DIR__dir3__input 0
+#define R_PORT_PB_DIR__dir3__output 1
+#define R_PORT_PB_DIR__dir2__BITNR 2
+#define R_PORT_PB_DIR__dir2__WIDTH 1
+#define R_PORT_PB_DIR__dir2__input 0
+#define R_PORT_PB_DIR__dir2__output 1
+#define R_PORT_PB_DIR__dir1__BITNR 1
+#define R_PORT_PB_DIR__dir1__WIDTH 1
+#define R_PORT_PB_DIR__dir1__input 0
+#define R_PORT_PB_DIR__dir1__output 1
+#define R_PORT_PB_DIR__dir0__BITNR 0
+#define R_PORT_PB_DIR__dir0__WIDTH 1
+#define R_PORT_PB_DIR__dir0__input 0
+#define R_PORT_PB_DIR__dir0__output 1
+
+#define R_PORT_PB_CONFIG (IO_TYPECAST_BYTE 0xb000003a)
+#define R_PORT_PB_CONFIG__cs7__BITNR 7
+#define R_PORT_PB_CONFIG__cs7__WIDTH 1
+#define R_PORT_PB_CONFIG__cs7__port 0
+#define R_PORT_PB_CONFIG__cs7__cs 1
+#define R_PORT_PB_CONFIG__cs6__BITNR 6
+#define R_PORT_PB_CONFIG__cs6__WIDTH 1
+#define R_PORT_PB_CONFIG__cs6__port 0
+#define R_PORT_PB_CONFIG__cs6__cs 1
+#define R_PORT_PB_CONFIG__cs5__BITNR 5
+#define R_PORT_PB_CONFIG__cs5__WIDTH 1
+#define R_PORT_PB_CONFIG__cs5__port 0
+#define R_PORT_PB_CONFIG__cs5__cs 1
+#define R_PORT_PB_CONFIG__cs4__BITNR 4
+#define R_PORT_PB_CONFIG__cs4__WIDTH 1
+#define R_PORT_PB_CONFIG__cs4__port 0
+#define R_PORT_PB_CONFIG__cs4__cs 1
+#define R_PORT_PB_CONFIG__cs3__BITNR 3
+#define R_PORT_PB_CONFIG__cs3__WIDTH 1
+#define R_PORT_PB_CONFIG__cs3__port 0
+#define R_PORT_PB_CONFIG__cs3__cs 1
+#define R_PORT_PB_CONFIG__cs2__BITNR 2
+#define R_PORT_PB_CONFIG__cs2__WIDTH 1
+#define R_PORT_PB_CONFIG__cs2__port 0
+#define R_PORT_PB_CONFIG__cs2__cs 1
+#define R_PORT_PB_CONFIG__scsi1__BITNR 1
+#define R_PORT_PB_CONFIG__scsi1__WIDTH 1
+#define R_PORT_PB_CONFIG__scsi1__port_cs 0
+#define R_PORT_PB_CONFIG__scsi1__enph 1
+#define R_PORT_PB_CONFIG__scsi0__BITNR 0
+#define R_PORT_PB_CONFIG__scsi0__WIDTH 1
+#define R_PORT_PB_CONFIG__scsi0__port_cs 0
+#define R_PORT_PB_CONFIG__scsi0__enph 1
+
+#define R_PORT_PB_I2C (IO_TYPECAST_BYTE 0xb000003b)
+#define R_PORT_PB_I2C__syncser3__BITNR 5
+#define R_PORT_PB_I2C__syncser3__WIDTH 1
+#define R_PORT_PB_I2C__syncser3__port_cs 0
+#define R_PORT_PB_I2C__syncser3__ss3extra 1
+#define R_PORT_PB_I2C__syncser1__BITNR 4
+#define R_PORT_PB_I2C__syncser1__WIDTH 1
+#define R_PORT_PB_I2C__syncser1__port_cs 0
+#define R_PORT_PB_I2C__syncser1__ss1extra 1
+#define R_PORT_PB_I2C__i2c_en__BITNR 3
+#define R_PORT_PB_I2C__i2c_en__WIDTH 1
+#define R_PORT_PB_I2C__i2c_en__off 0
+#define R_PORT_PB_I2C__i2c_en__on 1
+#define R_PORT_PB_I2C__i2c_d__BITNR 2
+#define R_PORT_PB_I2C__i2c_d__WIDTH 1
+#define R_PORT_PB_I2C__i2c_clk__BITNR 1
+#define R_PORT_PB_I2C__i2c_clk__WIDTH 1
+#define R_PORT_PB_I2C__i2c_oe___BITNR 0
+#define R_PORT_PB_I2C__i2c_oe___WIDTH 1
+#define R_PORT_PB_I2C__i2c_oe___enable 0
+#define R_PORT_PB_I2C__i2c_oe___disable 1
+
+#define R_PORT_PB_READ (IO_TYPECAST_RO_UDWORD 0xb0000038)
+#define R_PORT_PB_READ__data_in__BITNR 0
+#define R_PORT_PB_READ__data_in__WIDTH 8
+
+/*
+!* Serial port registers
+!*/
+
+#define R_SERIAL0_CTRL (IO_TYPECAST_UDWORD 0xb0000060)
+#define R_SERIAL0_CTRL__tr_baud__BITNR 28
+#define R_SERIAL0_CTRL__tr_baud__WIDTH 4
+#define R_SERIAL0_CTRL__tr_baud__c300Hz 0
+#define R_SERIAL0_CTRL__tr_baud__c600Hz 1
+#define R_SERIAL0_CTRL__tr_baud__c1200Hz 2
+#define R_SERIAL0_CTRL__tr_baud__c2400Hz 3
+#define R_SERIAL0_CTRL__tr_baud__c4800Hz 4
+#define R_SERIAL0_CTRL__tr_baud__c9600Hz 5
+#define R_SERIAL0_CTRL__tr_baud__c19k2Hz 6
+#define R_SERIAL0_CTRL__tr_baud__c38k4Hz 7
+#define R_SERIAL0_CTRL__tr_baud__c57k6Hz 8
+#define R_SERIAL0_CTRL__tr_baud__c115k2Hz 9
+#define R_SERIAL0_CTRL__tr_baud__c230k4Hz 10
+#define R_SERIAL0_CTRL__tr_baud__c460k8Hz 11
+#define R_SERIAL0_CTRL__tr_baud__c921k6Hz 12
+#define R_SERIAL0_CTRL__tr_baud__c1843k2Hz 13
+#define R_SERIAL0_CTRL__tr_baud__c6250kHz 14
+#define R_SERIAL0_CTRL__tr_baud__reserved 15
+#define R_SERIAL0_CTRL__rec_baud__BITNR 24
+#define R_SERIAL0_CTRL__rec_baud__WIDTH 4
+#define R_SERIAL0_CTRL__rec_baud__c300Hz 0
+#define R_SERIAL0_CTRL__rec_baud__c600Hz 1
+#define R_SERIAL0_CTRL__rec_baud__c1200Hz 2
+#define R_SERIAL0_CTRL__rec_baud__c2400Hz 3
+#define R_SERIAL0_CTRL__rec_baud__c4800Hz 4
+#define R_SERIAL0_CTRL__rec_baud__c9600Hz 5
+#define R_SERIAL0_CTRL__rec_baud__c19k2Hz 6
+#define R_SERIAL0_CTRL__rec_baud__c38k4Hz 7
+#define R_SERIAL0_CTRL__rec_baud__c57k6Hz 8
+#define R_SERIAL0_CTRL__rec_baud__c115k2Hz 9
+#define R_SERIAL0_CTRL__rec_baud__c230k4Hz 10
+#define R_SERIAL0_CTRL__rec_baud__c460k8Hz 11
+#define R_SERIAL0_CTRL__rec_baud__c921k6Hz 12
+#define R_SERIAL0_CTRL__rec_baud__c1843k2Hz 13
+#define R_SERIAL0_CTRL__rec_baud__c6250kHz 14
+#define R_SERIAL0_CTRL__rec_baud__reserved 15
+#define R_SERIAL0_CTRL__dma_err__BITNR 23
+#define R_SERIAL0_CTRL__dma_err__WIDTH 1
+#define R_SERIAL0_CTRL__dma_err__stop 0
+#define R_SERIAL0_CTRL__dma_err__ignore 1
+#define R_SERIAL0_CTRL__rec_enable__BITNR 22
+#define R_SERIAL0_CTRL__rec_enable__WIDTH 1
+#define R_SERIAL0_CTRL__rec_enable__disable 0
+#define R_SERIAL0_CTRL__rec_enable__enable 1
+#define R_SERIAL0_CTRL__rts___BITNR 21
+#define R_SERIAL0_CTRL__rts___WIDTH 1
+#define R_SERIAL0_CTRL__rts___active 0
+#define R_SERIAL0_CTRL__rts___inactive 1
+#define R_SERIAL0_CTRL__sampling__BITNR 20
+#define R_SERIAL0_CTRL__sampling__WIDTH 1
+#define R_SERIAL0_CTRL__sampling__middle 0
+#define R_SERIAL0_CTRL__sampling__majority 1
+#define R_SERIAL0_CTRL__rec_stick_par__BITNR 19
+#define R_SERIAL0_CTRL__rec_stick_par__WIDTH 1
+#define R_SERIAL0_CTRL__rec_stick_par__normal 0
+#define R_SERIAL0_CTRL__rec_stick_par__stick 1
+#define R_SERIAL0_CTRL__rec_par__BITNR 18
+#define R_SERIAL0_CTRL__rec_par__WIDTH 1
+#define R_SERIAL0_CTRL__rec_par__even 0
+#define R_SERIAL0_CTRL__rec_par__odd 1
+#define R_SERIAL0_CTRL__rec_par_en__BITNR 17
+#define R_SERIAL0_CTRL__rec_par_en__WIDTH 1
+#define R_SERIAL0_CTRL__rec_par_en__disable 0
+#define R_SERIAL0_CTRL__rec_par_en__enable 1
+#define R_SERIAL0_CTRL__rec_bitnr__BITNR 16
+#define R_SERIAL0_CTRL__rec_bitnr__WIDTH 1
+#define R_SERIAL0_CTRL__rec_bitnr__rec_8bit 0
+#define R_SERIAL0_CTRL__rec_bitnr__rec_7bit 1
+#define R_SERIAL0_CTRL__txd__BITNR 15
+#define R_SERIAL0_CTRL__txd__WIDTH 1
+#define R_SERIAL0_CTRL__tr_enable__BITNR 14
+#define R_SERIAL0_CTRL__tr_enable__WIDTH 1
+#define R_SERIAL0_CTRL__tr_enable__disable 0
+#define R_SERIAL0_CTRL__tr_enable__enable 1
+#define R_SERIAL0_CTRL__auto_cts__BITNR 13
+#define R_SERIAL0_CTRL__auto_cts__WIDTH 1
+#define R_SERIAL0_CTRL__auto_cts__disabled 0
+#define R_SERIAL0_CTRL__auto_cts__active 1
+#define R_SERIAL0_CTRL__stop_bits__BITNR 12
+#define R_SERIAL0_CTRL__stop_bits__WIDTH 1
+#define R_SERIAL0_CTRL__stop_bits__one_bit 0
+#define R_SERIAL0_CTRL__stop_bits__two_bits 1
+#define R_SERIAL0_CTRL__tr_stick_par__BITNR 11
+#define R_SERIAL0_CTRL__tr_stick_par__WIDTH 1
+#define R_SERIAL0_CTRL__tr_stick_par__normal 0
+#define R_SERIAL0_CTRL__tr_stick_par__stick 1
+#define R_SERIAL0_CTRL__tr_par__BITNR 10
+#define R_SERIAL0_CTRL__tr_par__WIDTH 1
+#define R_SERIAL0_CTRL__tr_par__even 0
+#define R_SERIAL0_CTRL__tr_par__odd 1
+#define R_SERIAL0_CTRL__tr_par_en__BITNR 9
+#define R_SERIAL0_CTRL__tr_par_en__WIDTH 1
+#define R_SERIAL0_CTRL__tr_par_en__disable 0
+#define R_SERIAL0_CTRL__tr_par_en__enable 1
+#define R_SERIAL0_CTRL__tr_bitnr__BITNR 8
+#define R_SERIAL0_CTRL__tr_bitnr__WIDTH 1
+#define R_SERIAL0_CTRL__tr_bitnr__tr_8bit 0
+#define R_SERIAL0_CTRL__tr_bitnr__tr_7bit 1
+#define R_SERIAL0_CTRL__data_out__BITNR 0
+#define R_SERIAL0_CTRL__data_out__WIDTH 8
+
+#define R_SERIAL0_BAUD (IO_TYPECAST_BYTE 0xb0000063)
+#define R_SERIAL0_BAUD__tr_baud__BITNR 4
+#define R_SERIAL0_BAUD__tr_baud__WIDTH 4
+#define R_SERIAL0_BAUD__tr_baud__c300Hz 0
+#define R_SERIAL0_BAUD__tr_baud__c600Hz 1
+#define R_SERIAL0_BAUD__tr_baud__c1200Hz 2
+#define R_SERIAL0_BAUD__tr_baud__c2400Hz 3
+#define R_SERIAL0_BAUD__tr_baud__c4800Hz 4
+#define R_SERIAL0_BAUD__tr_baud__c9600Hz 5
+#define R_SERIAL0_BAUD__tr_baud__c19k2Hz 6
+#define R_SERIAL0_BAUD__tr_baud__c38k4Hz 7
+#define R_SERIAL0_BAUD__tr_baud__c57k6Hz 8
+#define R_SERIAL0_BAUD__tr_baud__c115k2Hz 9
+#define R_SERIAL0_BAUD__tr_baud__c230k4Hz 10
+#define R_SERIAL0_BAUD__tr_baud__c460k8Hz 11
+#define R_SERIAL0_BAUD__tr_baud__c921k6Hz 12
+#define R_SERIAL0_BAUD__tr_baud__c1843k2Hz 13
+#define R_SERIAL0_BAUD__tr_baud__c6250kHz 14
+#define R_SERIAL0_BAUD__tr_baud__reserved 15
+#define R_SERIAL0_BAUD__rec_baud__BITNR 0
+#define R_SERIAL0_BAUD__rec_baud__WIDTH 4
+#define R_SERIAL0_BAUD__rec_baud__c300Hz 0
+#define R_SERIAL0_BAUD__rec_baud__c600Hz 1
+#define R_SERIAL0_BAUD__rec_baud__c1200Hz 2
+#define R_SERIAL0_BAUD__rec_baud__c2400Hz 3
+#define R_SERIAL0_BAUD__rec_baud__c4800Hz 4
+#define R_SERIAL0_BAUD__rec_baud__c9600Hz 5
+#define R_SERIAL0_BAUD__rec_baud__c19k2Hz 6
+#define R_SERIAL0_BAUD__rec_baud__c38k4Hz 7
+#define R_SERIAL0_BAUD__rec_baud__c57k6Hz 8
+#define R_SERIAL0_BAUD__rec_baud__c115k2Hz 9
+#define R_SERIAL0_BAUD__rec_baud__c230k4Hz 10
+#define R_SERIAL0_BAUD__rec_baud__c460k8Hz 11
+#define R_SERIAL0_BAUD__rec_baud__c921k6Hz 12
+#define R_SERIAL0_BAUD__rec_baud__c1843k2Hz 13
+#define R_SERIAL0_BAUD__rec_baud__c6250kHz 14
+#define R_SERIAL0_BAUD__rec_baud__reserved 15
+
+#define R_SERIAL0_REC_CTRL (IO_TYPECAST_BYTE 0xb0000062)
+#define R_SERIAL0_REC_CTRL__dma_err__BITNR 7
+#define R_SERIAL0_REC_CTRL__dma_err__WIDTH 1
+#define R_SERIAL0_REC_CTRL__dma_err__stop 0
+#define R_SERIAL0_REC_CTRL__dma_err__ignore 1
+#define R_SERIAL0_REC_CTRL__rec_enable__BITNR 6
+#define R_SERIAL0_REC_CTRL__rec_enable__WIDTH 1
+#define R_SERIAL0_REC_CTRL__rec_enable__disable 0
+#define R_SERIAL0_REC_CTRL__rec_enable__enable 1
+#define R_SERIAL0_REC_CTRL__rts___BITNR 5
+#define R_SERIAL0_REC_CTRL__rts___WIDTH 1
+#define R_SERIAL0_REC_CTRL__rts___active 0
+#define R_SERIAL0_REC_CTRL__rts___inactive 1
+#define R_SERIAL0_REC_CTRL__sampling__BITNR 4
+#define R_SERIAL0_REC_CTRL__sampling__WIDTH 1
+#define R_SERIAL0_REC_CTRL__sampling__middle 0
+#define R_SERIAL0_REC_CTRL__sampling__majority 1
+#define R_SERIAL0_REC_CTRL__rec_stick_par__BITNR 3
+#define R_SERIAL0_REC_CTRL__rec_stick_par__WIDTH 1
+#define R_SERIAL0_REC_CTRL__rec_stick_par__normal 0
+#define R_SERIAL0_REC_CTRL__rec_stick_par__stick 1
+#define R_SERIAL0_REC_CTRL__rec_par__BITNR 2
+#define R_SERIAL0_REC_CTRL__rec_par__WIDTH 1
+#define R_SERIAL0_REC_CTRL__rec_par__even 0
+#define R_SERIAL0_REC_CTRL__rec_par__odd 1
+#define R_SERIAL0_REC_CTRL__rec_par_en__BITNR 1
+#define R_SERIAL0_REC_CTRL__rec_par_en__WIDTH 1
+#define R_SERIAL0_REC_CTRL__rec_par_en__disable 0
+#define R_SERIAL0_REC_CTRL__rec_par_en__enable 1
+#define R_SERIAL0_REC_CTRL__rec_bitnr__BITNR 0
+#define R_SERIAL0_REC_CTRL__rec_bitnr__WIDTH 1
+#define R_SERIAL0_REC_CTRL__rec_bitnr__rec_8bit 0
+#define R_SERIAL0_REC_CTRL__rec_bitnr__rec_7bit 1
+
+#define R_SERIAL0_TR_CTRL (IO_TYPECAST_BYTE 0xb0000061)
+#define R_SERIAL0_TR_CTRL__txd__BITNR 7
+#define R_SERIAL0_TR_CTRL__txd__WIDTH 1
+#define R_SERIAL0_TR_CTRL__tr_enable__BITNR 6
+#define R_SERIAL0_TR_CTRL__tr_enable__WIDTH 1
+#define R_SERIAL0_TR_CTRL__tr_enable__disable 0
+#define R_SERIAL0_TR_CTRL__tr_enable__enable 1
+#define R_SERIAL0_TR_CTRL__auto_cts__BITNR 5
+#define R_SERIAL0_TR_CTRL__auto_cts__WIDTH 1
+#define R_SERIAL0_TR_CTRL__auto_cts__disabled 0
+#define R_SERIAL0_TR_CTRL__auto_cts__active 1
+#define R_SERIAL0_TR_CTRL__stop_bits__BITNR 4
+#define R_SERIAL0_TR_CTRL__stop_bits__WIDTH 1
+#define R_SERIAL0_TR_CTRL__stop_bits__one_bit 0
+#define R_SERIAL0_TR_CTRL__stop_bits__two_bits 1
+#define R_SERIAL0_TR_CTRL__tr_stick_par__BITNR 3
+#define R_SERIAL0_TR_CTRL__tr_stick_par__WIDTH 1
+#define R_SERIAL0_TR_CTRL__tr_stick_par__normal 0
+#define R_SERIAL0_TR_CTRL__tr_stick_par__stick 1
+#define R_SERIAL0_TR_CTRL__tr_par__BITNR 2
+#define R_SERIAL0_TR_CTRL__tr_par__WIDTH 1
+#define R_SERIAL0_TR_CTRL__tr_par__even 0
+#define R_SERIAL0_TR_CTRL__tr_par__odd 1
+#define R_SERIAL0_TR_CTRL__tr_par_en__BITNR 1
+#define R_SERIAL0_TR_CTRL__tr_par_en__WIDTH 1
+#define R_SERIAL0_TR_CTRL__tr_par_en__disable 0
+#define R_SERIAL0_TR_CTRL__tr_par_en__enable 1
+#define R_SERIAL0_TR_CTRL__tr_bitnr__BITNR 0
+#define R_SERIAL0_TR_CTRL__tr_bitnr__WIDTH 1
+#define R_SERIAL0_TR_CTRL__tr_bitnr__tr_8bit 0
+#define R_SERIAL0_TR_CTRL__tr_bitnr__tr_7bit 1
+
+#define R_SERIAL0_TR_DATA (IO_TYPECAST_BYTE 0xb0000060)
+#define R_SERIAL0_TR_DATA__data_out__BITNR 0
+#define R_SERIAL0_TR_DATA__data_out__WIDTH 8
+
+#define R_SERIAL0_READ (IO_TYPECAST_RO_UDWORD 0xb0000060)
+#define R_SERIAL0_READ__xoff_detect__BITNR 15
+#define R_SERIAL0_READ__xoff_detect__WIDTH 1
+#define R_SERIAL0_READ__xoff_detect__no_xoff 0
+#define R_SERIAL0_READ__xoff_detect__xoff 1
+#define R_SERIAL0_READ__cts___BITNR 14
+#define R_SERIAL0_READ__cts___WIDTH 1
+#define R_SERIAL0_READ__cts___active 0
+#define R_SERIAL0_READ__cts___inactive 1
+#define R_SERIAL0_READ__tr_ready__BITNR 13
+#define R_SERIAL0_READ__tr_ready__WIDTH 1
+#define R_SERIAL0_READ__tr_ready__full 0
+#define R_SERIAL0_READ__tr_ready__ready 1
+#define R_SERIAL0_READ__rxd__BITNR 12
+#define R_SERIAL0_READ__rxd__WIDTH 1
+#define R_SERIAL0_READ__overrun__BITNR 11
+#define R_SERIAL0_READ__overrun__WIDTH 1
+#define R_SERIAL0_READ__overrun__no 0
+#define R_SERIAL0_READ__overrun__yes 1
+#define R_SERIAL0_READ__par_err__BITNR 10
+#define R_SERIAL0_READ__par_err__WIDTH 1
+#define R_SERIAL0_READ__par_err__no 0
+#define R_SERIAL0_READ__par_err__yes 1
+#define R_SERIAL0_READ__framing_err__BITNR 9
+#define R_SERIAL0_READ__framing_err__WIDTH 1
+#define R_SERIAL0_READ__framing_err__no 0
+#define R_SERIAL0_READ__framing_err__yes 1
+#define R_SERIAL0_READ__data_avail__BITNR 8
+#define R_SERIAL0_READ__data_avail__WIDTH 1
+#define R_SERIAL0_READ__data_avail__no 0
+#define R_SERIAL0_READ__data_avail__yes 1
+#define R_SERIAL0_READ__data_in__BITNR 0
+#define R_SERIAL0_READ__data_in__WIDTH 8
+
+#define R_SERIAL0_STATUS (IO_TYPECAST_RO_BYTE 0xb0000061)
+#define R_SERIAL0_STATUS__xoff_detect__BITNR 7
+#define R_SERIAL0_STATUS__xoff_detect__WIDTH 1
+#define R_SERIAL0_STATUS__xoff_detect__no_xoff 0
+#define R_SERIAL0_STATUS__xoff_detect__xoff 1
+#define R_SERIAL0_STATUS__cts___BITNR 6
+#define R_SERIAL0_STATUS__cts___WIDTH 1
+#define R_SERIAL0_STATUS__cts___active 0
+#define R_SERIAL0_STATUS__cts___inactive 1
+#define R_SERIAL0_STATUS__tr_ready__BITNR 5
+#define R_SERIAL0_STATUS__tr_ready__WIDTH 1
+#define R_SERIAL0_STATUS__tr_ready__full 0
+#define R_SERIAL0_STATUS__tr_ready__ready 1
+#define R_SERIAL0_STATUS__rxd__BITNR 4
+#define R_SERIAL0_STATUS__rxd__WIDTH 1
+#define R_SERIAL0_STATUS__overrun__BITNR 3
+#define R_SERIAL0_STATUS__overrun__WIDTH 1
+#define R_SERIAL0_STATUS__overrun__no 0
+#define R_SERIAL0_STATUS__overrun__yes 1
+#define R_SERIAL0_STATUS__par_err__BITNR 2
+#define R_SERIAL0_STATUS__par_err__WIDTH 1
+#define R_SERIAL0_STATUS__par_err__no 0
+#define R_SERIAL0_STATUS__par_err__yes 1
+#define R_SERIAL0_STATUS__framing_err__BITNR 1
+#define R_SERIAL0_STATUS__framing_err__WIDTH 1
+#define R_SERIAL0_STATUS__framing_err__no 0
+#define R_SERIAL0_STATUS__framing_err__yes 1
+#define R_SERIAL0_STATUS__data_avail__BITNR 0
+#define R_SERIAL0_STATUS__data_avail__WIDTH 1
+#define R_SERIAL0_STATUS__data_avail__no 0
+#define R_SERIAL0_STATUS__data_avail__yes 1
+
+#define R_SERIAL0_REC_DATA (IO_TYPECAST_RO_BYTE 0xb0000060)
+#define R_SERIAL0_REC_DATA__data_in__BITNR 0
+#define R_SERIAL0_REC_DATA__data_in__WIDTH 8
+
+#define R_SERIAL0_XOFF (IO_TYPECAST_UDWORD 0xb0000064)
+#define R_SERIAL0_XOFF__tx_stop__BITNR 9
+#define R_SERIAL0_XOFF__tx_stop__WIDTH 1
+#define R_SERIAL0_XOFF__tx_stop__enable 0
+#define R_SERIAL0_XOFF__tx_stop__stop 1
+#define R_SERIAL0_XOFF__auto_xoff__BITNR 8
+#define R_SERIAL0_XOFF__auto_xoff__WIDTH 1
+#define R_SERIAL0_XOFF__auto_xoff__disable 0
+#define R_SERIAL0_XOFF__auto_xoff__enable 1
+#define R_SERIAL0_XOFF__xoff_char__BITNR 0
+#define R_SERIAL0_XOFF__xoff_char__WIDTH 8
+
+#define R_SERIAL1_CTRL (IO_TYPECAST_UDWORD 0xb0000068)
+#define R_SERIAL1_CTRL__tr_baud__BITNR 28
+#define R_SERIAL1_CTRL__tr_baud__WIDTH 4
+#define R_SERIAL1_CTRL__tr_baud__c300Hz 0
+#define R_SERIAL1_CTRL__tr_baud__c600Hz 1
+#define R_SERIAL1_CTRL__tr_baud__c1200Hz 2
+#define R_SERIAL1_CTRL__tr_baud__c2400Hz 3
+#define R_SERIAL1_CTRL__tr_baud__c4800Hz 4
+#define R_SERIAL1_CTRL__tr_baud__c9600Hz 5
+#define R_SERIAL1_CTRL__tr_baud__c19k2Hz 6
+#define R_SERIAL1_CTRL__tr_baud__c38k4Hz 7
+#define R_SERIAL1_CTRL__tr_baud__c57k6Hz 8
+#define R_SERIAL1_CTRL__tr_baud__c115k2Hz 9
+#define R_SERIAL1_CTRL__tr_baud__c230k4Hz 10
+#define R_SERIAL1_CTRL__tr_baud__c460k8Hz 11
+#define R_SERIAL1_CTRL__tr_baud__c921k6Hz 12
+#define R_SERIAL1_CTRL__tr_baud__c1843k2Hz 13
+#define R_SERIAL1_CTRL__tr_baud__c6250kHz 14
+#define R_SERIAL1_CTRL__tr_baud__reserved 15
+#define R_SERIAL1_CTRL__rec_baud__BITNR 24
+#define R_SERIAL1_CTRL__rec_baud__WIDTH 4
+#define R_SERIAL1_CTRL__rec_baud__c300Hz 0
+#define R_SERIAL1_CTRL__rec_baud__c600Hz 1
+#define R_SERIAL1_CTRL__rec_baud__c1200Hz 2
+#define R_SERIAL1_CTRL__rec_baud__c2400Hz 3
+#define R_SERIAL1_CTRL__rec_baud__c4800Hz 4
+#define R_SERIAL1_CTRL__rec_baud__c9600Hz 5
+#define R_SERIAL1_CTRL__rec_baud__c19k2Hz 6
+#define R_SERIAL1_CTRL__rec_baud__c38k4Hz 7
+#define R_SERIAL1_CTRL__rec_baud__c57k6Hz 8
+#define R_SERIAL1_CTRL__rec_baud__c115k2Hz 9
+#define R_SERIAL1_CTRL__rec_baud__c230k4Hz 10
+#define R_SERIAL1_CTRL__rec_baud__c460k8Hz 11
+#define R_SERIAL1_CTRL__rec_baud__c921k6Hz 12
+#define R_SERIAL1_CTRL__rec_baud__c1843k2Hz 13
+#define R_SERIAL1_CTRL__rec_baud__c6250kHz 14
+#define R_SERIAL1_CTRL__rec_baud__reserved 15
+#define R_SERIAL1_CTRL__dma_err__BITNR 23
+#define R_SERIAL1_CTRL__dma_err__WIDTH 1
+#define R_SERIAL1_CTRL__dma_err__stop 0
+#define R_SERIAL1_CTRL__dma_err__ignore 1
+#define R_SERIAL1_CTRL__rec_enable__BITNR 22
+#define R_SERIAL1_CTRL__rec_enable__WIDTH 1
+#define R_SERIAL1_CTRL__rec_enable__disable 0
+#define R_SERIAL1_CTRL__rec_enable__enable 1
+#define R_SERIAL1_CTRL__rts___BITNR 21
+#define R_SERIAL1_CTRL__rts___WIDTH 1
+#define R_SERIAL1_CTRL__rts___active 0
+#define R_SERIAL1_CTRL__rts___inactive 1
+#define R_SERIAL1_CTRL__sampling__BITNR 20
+#define R_SERIAL1_CTRL__sampling__WIDTH 1
+#define R_SERIAL1_CTRL__sampling__middle 0
+#define R_SERIAL1_CTRL__sampling__majority 1
+#define R_SERIAL1_CTRL__rec_stick_par__BITNR 19
+#define R_SERIAL1_CTRL__rec_stick_par__WIDTH 1
+#define R_SERIAL1_CTRL__rec_stick_par__normal 0
+#define R_SERIAL1_CTRL__rec_stick_par__stick 1
+#define R_SERIAL1_CTRL__rec_par__BITNR 18
+#define R_SERIAL1_CTRL__rec_par__WIDTH 1
+#define R_SERIAL1_CTRL__rec_par__even 0
+#define R_SERIAL1_CTRL__rec_par__odd 1
+#define R_SERIAL1_CTRL__rec_par_en__BITNR 17
+#define R_SERIAL1_CTRL__rec_par_en__WIDTH 1
+#define R_SERIAL1_CTRL__rec_par_en__disable 0
+#define R_SERIAL1_CTRL__rec_par_en__enable 1
+#define R_SERIAL1_CTRL__rec_bitnr__BITNR 16
+#define R_SERIAL1_CTRL__rec_bitnr__WIDTH 1
+#define R_SERIAL1_CTRL__rec_bitnr__rec_8bit 0
+#define R_SERIAL1_CTRL__rec_bitnr__rec_7bit 1
+#define R_SERIAL1_CTRL__txd__BITNR 15
+#define R_SERIAL1_CTRL__txd__WIDTH 1
+#define R_SERIAL1_CTRL__tr_enable__BITNR 14
+#define R_SERIAL1_CTRL__tr_enable__WIDTH 1
+#define R_SERIAL1_CTRL__tr_enable__disable 0
+#define R_SERIAL1_CTRL__tr_enable__enable 1
+#define R_SERIAL1_CTRL__auto_cts__BITNR 13
+#define R_SERIAL1_CTRL__auto_cts__WIDTH 1
+#define R_SERIAL1_CTRL__auto_cts__disabled 0
+#define R_SERIAL1_CTRL__auto_cts__active 1
+#define R_SERIAL1_CTRL__stop_bits__BITNR 12
+#define R_SERIAL1_CTRL__stop_bits__WIDTH 1
+#define R_SERIAL1_CTRL__stop_bits__one_bit 0
+#define R_SERIAL1_CTRL__stop_bits__two_bits 1
+#define R_SERIAL1_CTRL__tr_stick_par__BITNR 11
+#define R_SERIAL1_CTRL__tr_stick_par__WIDTH 1
+#define R_SERIAL1_CTRL__tr_stick_par__normal 0
+#define R_SERIAL1_CTRL__tr_stick_par__stick 1
+#define R_SERIAL1_CTRL__tr_par__BITNR 10
+#define R_SERIAL1_CTRL__tr_par__WIDTH 1
+#define R_SERIAL1_CTRL__tr_par__even 0
+#define R_SERIAL1_CTRL__tr_par__odd 1
+#define R_SERIAL1_CTRL__tr_par_en__BITNR 9
+#define R_SERIAL1_CTRL__tr_par_en__WIDTH 1
+#define R_SERIAL1_CTRL__tr_par_en__disable 0
+#define R_SERIAL1_CTRL__tr_par_en__enable 1
+#define R_SERIAL1_CTRL__tr_bitnr__BITNR 8
+#define R_SERIAL1_CTRL__tr_bitnr__WIDTH 1
+#define R_SERIAL1_CTRL__tr_bitnr__tr_8bit 0
+#define R_SERIAL1_CTRL__tr_bitnr__tr_7bit 1
+#define R_SERIAL1_CTRL__data_out__BITNR 0
+#define R_SERIAL1_CTRL__data_out__WIDTH 8
+
+#define R_SERIAL1_BAUD (IO_TYPECAST_BYTE 0xb000006b)
+#define R_SERIAL1_BAUD__tr_baud__BITNR 4
+#define R_SERIAL1_BAUD__tr_baud__WIDTH 4
+#define R_SERIAL1_BAUD__tr_baud__c300Hz 0
+#define R_SERIAL1_BAUD__tr_baud__c600Hz 1
+#define R_SERIAL1_BAUD__tr_baud__c1200Hz 2
+#define R_SERIAL1_BAUD__tr_baud__c2400Hz 3
+#define R_SERIAL1_BAUD__tr_baud__c4800Hz 4
+#define R_SERIAL1_BAUD__tr_baud__c9600Hz 5
+#define R_SERIAL1_BAUD__tr_baud__c19k2Hz 6
+#define R_SERIAL1_BAUD__tr_baud__c38k4Hz 7
+#define R_SERIAL1_BAUD__tr_baud__c57k6Hz 8
+#define R_SERIAL1_BAUD__tr_baud__c115k2Hz 9
+#define R_SERIAL1_BAUD__tr_baud__c230k4Hz 10
+#define R_SERIAL1_BAUD__tr_baud__c460k8Hz 11
+#define R_SERIAL1_BAUD__tr_baud__c921k6Hz 12
+#define R_SERIAL1_BAUD__tr_baud__c1843k2Hz 13
+#define R_SERIAL1_BAUD__tr_baud__c6250kHz 14
+#define R_SERIAL1_BAUD__tr_baud__reserved 15
+#define R_SERIAL1_BAUD__rec_baud__BITNR 0
+#define R_SERIAL1_BAUD__rec_baud__WIDTH 4
+#define R_SERIAL1_BAUD__rec_baud__c300Hz 0
+#define R_SERIAL1_BAUD__rec_baud__c600Hz 1
+#define R_SERIAL1_BAUD__rec_baud__c1200Hz 2
+#define R_SERIAL1_BAUD__rec_baud__c2400Hz 3
+#define R_SERIAL1_BAUD__rec_baud__c4800Hz 4
+#define R_SERIAL1_BAUD__rec_baud__c9600Hz 5
+#define R_SERIAL1_BAUD__rec_baud__c19k2Hz 6
+#define R_SERIAL1_BAUD__rec_baud__c38k4Hz 7
+#define R_SERIAL1_BAUD__rec_baud__c57k6Hz 8
+#define R_SERIAL1_BAUD__rec_baud__c115k2Hz 9
+#define R_SERIAL1_BAUD__rec_baud__c230k4Hz 10
+#define R_SERIAL1_BAUD__rec_baud__c460k8Hz 11
+#define R_SERIAL1_BAUD__rec_baud__c921k6Hz 12
+#define R_SERIAL1_BAUD__rec_baud__c1843k2Hz 13
+#define R_SERIAL1_BAUD__rec_baud__c6250kHz 14
+#define R_SERIAL1_BAUD__rec_baud__reserved 15
+
+#define R_SERIAL1_REC_CTRL (IO_TYPECAST_BYTE 0xb000006a)
+#define R_SERIAL1_REC_CTRL__dma_err__BITNR 7
+#define R_SERIAL1_REC_CTRL__dma_err__WIDTH 1
+#define R_SERIAL1_REC_CTRL__dma_err__stop 0
+#define R_SERIAL1_REC_CTRL__dma_err__ignore 1
+#define R_SERIAL1_REC_CTRL__rec_enable__BITNR 6
+#define R_SERIAL1_REC_CTRL__rec_enable__WIDTH 1
+#define R_SERIAL1_REC_CTRL__rec_enable__disable 0
+#define R_SERIAL1_REC_CTRL__rec_enable__enable 1
+#define R_SERIAL1_REC_CTRL__rts___BITNR 5
+#define R_SERIAL1_REC_CTRL__rts___WIDTH 1
+#define R_SERIAL1_REC_CTRL__rts___active 0
+#define R_SERIAL1_REC_CTRL__rts___inactive 1
+#define R_SERIAL1_REC_CTRL__sampling__BITNR 4
+#define R_SERIAL1_REC_CTRL__sampling__WIDTH 1
+#define R_SERIAL1_REC_CTRL__sampling__middle 0
+#define R_SERIAL1_REC_CTRL__sampling__majority 1
+#define R_SERIAL1_REC_CTRL__rec_stick_par__BITNR 3
+#define R_SERIAL1_REC_CTRL__rec_stick_par__WIDTH 1
+#define R_SERIAL1_REC_CTRL__rec_stick_par__normal 0
+#define R_SERIAL1_REC_CTRL__rec_stick_par__stick 1
+#define R_SERIAL1_REC_CTRL__rec_par__BITNR 2
+#define R_SERIAL1_REC_CTRL__rec_par__WIDTH 1
+#define R_SERIAL1_REC_CTRL__rec_par__even 0
+#define R_SERIAL1_REC_CTRL__rec_par__odd 1
+#define R_SERIAL1_REC_CTRL__rec_par_en__BITNR 1
+#define R_SERIAL1_REC_CTRL__rec_par_en__WIDTH 1
+#define R_SERIAL1_REC_CTRL__rec_par_en__disable 0
+#define R_SERIAL1_REC_CTRL__rec_par_en__enable 1
+#define R_SERIAL1_REC_CTRL__rec_bitnr__BITNR 0
+#define R_SERIAL1_REC_CTRL__rec_bitnr__WIDTH 1
+#define R_SERIAL1_REC_CTRL__rec_bitnr__rec_8bit 0
+#define R_SERIAL1_REC_CTRL__rec_bitnr__rec_7bit 1
+
+#define R_SERIAL1_TR_CTRL (IO_TYPECAST_BYTE 0xb0000069)
+#define R_SERIAL1_TR_CTRL__txd__BITNR 7
+#define R_SERIAL1_TR_CTRL__txd__WIDTH 1
+#define R_SERIAL1_TR_CTRL__tr_enable__BITNR 6
+#define R_SERIAL1_TR_CTRL__tr_enable__WIDTH 1
+#define R_SERIAL1_TR_CTRL__tr_enable__disable 0
+#define R_SERIAL1_TR_CTRL__tr_enable__enable 1
+#define R_SERIAL1_TR_CTRL__auto_cts__BITNR 5
+#define R_SERIAL1_TR_CTRL__auto_cts__WIDTH 1
+#define R_SERIAL1_TR_CTRL__auto_cts__disabled 0
+#define R_SERIAL1_TR_CTRL__auto_cts__active 1
+#define R_SERIAL1_TR_CTRL__stop_bits__BITNR 4
+#define R_SERIAL1_TR_CTRL__stop_bits__WIDTH 1
+#define R_SERIAL1_TR_CTRL__stop_bits__one_bit 0
+#define R_SERIAL1_TR_CTRL__stop_bits__two_bits 1
+#define R_SERIAL1_TR_CTRL__tr_stick_par__BITNR 3
+#define R_SERIAL1_TR_CTRL__tr_stick_par__WIDTH 1
+#define R_SERIAL1_TR_CTRL__tr_stick_par__normal 0
+#define R_SERIAL1_TR_CTRL__tr_stick_par__stick 1
+#define R_SERIAL1_TR_CTRL__tr_par__BITNR 2
+#define R_SERIAL1_TR_CTRL__tr_par__WIDTH 1
+#define R_SERIAL1_TR_CTRL__tr_par__even 0
+#define R_SERIAL1_TR_CTRL__tr_par__odd 1
+#define R_SERIAL1_TR_CTRL__tr_par_en__BITNR 1
+#define R_SERIAL1_TR_CTRL__tr_par_en__WIDTH 1
+#define R_SERIAL1_TR_CTRL__tr_par_en__disable 0
+#define R_SERIAL1_TR_CTRL__tr_par_en__enable 1
+#define R_SERIAL1_TR_CTRL__tr_bitnr__BITNR 0
+#define R_SERIAL1_TR_CTRL__tr_bitnr__WIDTH 1
+#define R_SERIAL1_TR_CTRL__tr_bitnr__tr_8bit 0
+#define R_SERIAL1_TR_CTRL__tr_bitnr__tr_7bit 1
+
+#define R_SERIAL1_TR_DATA (IO_TYPECAST_BYTE 0xb0000068)
+#define R_SERIAL1_TR_DATA__data_out__BITNR 0
+#define R_SERIAL1_TR_DATA__data_out__WIDTH 8
+
+#define R_SERIAL1_READ (IO_TYPECAST_RO_UDWORD 0xb0000068)
+#define R_SERIAL1_READ__xoff_detect__BITNR 15
+#define R_SERIAL1_READ__xoff_detect__WIDTH 1
+#define R_SERIAL1_READ__xoff_detect__no_xoff 0
+#define R_SERIAL1_READ__xoff_detect__xoff 1
+#define R_SERIAL1_READ__cts___BITNR 14
+#define R_SERIAL1_READ__cts___WIDTH 1
+#define R_SERIAL1_READ__cts___active 0
+#define R_SERIAL1_READ__cts___inactive 1
+#define R_SERIAL1_READ__tr_ready__BITNR 13
+#define R_SERIAL1_READ__tr_ready__WIDTH 1
+#define R_SERIAL1_READ__tr_ready__full 0
+#define R_SERIAL1_READ__tr_ready__ready 1
+#define R_SERIAL1_READ__rxd__BITNR 12
+#define R_SERIAL1_READ__rxd__WIDTH 1
+#define R_SERIAL1_READ__overrun__BITNR 11
+#define R_SERIAL1_READ__overrun__WIDTH 1
+#define R_SERIAL1_READ__overrun__no 0
+#define R_SERIAL1_READ__overrun__yes 1
+#define R_SERIAL1_READ__par_err__BITNR 10
+#define R_SERIAL1_READ__par_err__WIDTH 1
+#define R_SERIAL1_READ__par_err__no 0
+#define R_SERIAL1_READ__par_err__yes 1
+#define R_SERIAL1_READ__framing_err__BITNR 9
+#define R_SERIAL1_READ__framing_err__WIDTH 1
+#define R_SERIAL1_READ__framing_err__no 0
+#define R_SERIAL1_READ__framing_err__yes 1
+#define R_SERIAL1_READ__data_avail__BITNR 8
+#define R_SERIAL1_READ__data_avail__WIDTH 1
+#define R_SERIAL1_READ__data_avail__no 0
+#define R_SERIAL1_READ__data_avail__yes 1
+#define R_SERIAL1_READ__data_in__BITNR 0
+#define R_SERIAL1_READ__data_in__WIDTH 8
+
+#define R_SERIAL1_STATUS (IO_TYPECAST_RO_BYTE 0xb0000069)
+#define R_SERIAL1_STATUS__xoff_detect__BITNR 7
+#define R_SERIAL1_STATUS__xoff_detect__WIDTH 1
+#define R_SERIAL1_STATUS__xoff_detect__no_xoff 0
+#define R_SERIAL1_STATUS__xoff_detect__xoff 1
+#define R_SERIAL1_STATUS__cts___BITNR 6
+#define R_SERIAL1_STATUS__cts___WIDTH 1
+#define R_SERIAL1_STATUS__cts___active 0
+#define R_SERIAL1_STATUS__cts___inactive 1
+#define R_SERIAL1_STATUS__tr_ready__BITNR 5
+#define R_SERIAL1_STATUS__tr_ready__WIDTH 1
+#define R_SERIAL1_STATUS__tr_ready__full 0
+#define R_SERIAL1_STATUS__tr_ready__ready 1
+#define R_SERIAL1_STATUS__rxd__BITNR 4
+#define R_SERIAL1_STATUS__rxd__WIDTH 1
+#define R_SERIAL1_STATUS__overrun__BITNR 3
+#define R_SERIAL1_STATUS__overrun__WIDTH 1
+#define R_SERIAL1_STATUS__overrun__no 0
+#define R_SERIAL1_STATUS__overrun__yes 1
+#define R_SERIAL1_STATUS__par_err__BITNR 2
+#define R_SERIAL1_STATUS__par_err__WIDTH 1
+#define R_SERIAL1_STATUS__par_err__no 0
+#define R_SERIAL1_STATUS__par_err__yes 1
+#define R_SERIAL1_STATUS__framing_err__BITNR 1
+#define R_SERIAL1_STATUS__framing_err__WIDTH 1
+#define R_SERIAL1_STATUS__framing_err__no 0
+#define R_SERIAL1_STATUS__framing_err__yes 1
+#define R_SERIAL1_STATUS__data_avail__BITNR 0
+#define R_SERIAL1_STATUS__data_avail__WIDTH 1
+#define R_SERIAL1_STATUS__data_avail__no 0
+#define R_SERIAL1_STATUS__data_avail__yes 1
+
+#define R_SERIAL1_REC_DATA (IO_TYPECAST_RO_BYTE 0xb0000068)
+#define R_SERIAL1_REC_DATA__data_in__BITNR 0
+#define R_SERIAL1_REC_DATA__data_in__WIDTH 8
+
+#define R_SERIAL1_XOFF (IO_TYPECAST_UDWORD 0xb000006c)
+#define R_SERIAL1_XOFF__tx_stop__BITNR 9
+#define R_SERIAL1_XOFF__tx_stop__WIDTH 1
+#define R_SERIAL1_XOFF__tx_stop__enable 0
+#define R_SERIAL1_XOFF__tx_stop__stop 1
+#define R_SERIAL1_XOFF__auto_xoff__BITNR 8
+#define R_SERIAL1_XOFF__auto_xoff__WIDTH 1
+#define R_SERIAL1_XOFF__auto_xoff__disable 0
+#define R_SERIAL1_XOFF__auto_xoff__enable 1
+#define R_SERIAL1_XOFF__xoff_char__BITNR 0
+#define R_SERIAL1_XOFF__xoff_char__WIDTH 8
+
+#define R_SERIAL2_CTRL (IO_TYPECAST_UDWORD 0xb0000070)
+#define R_SERIAL2_CTRL__tr_baud__BITNR 28
+#define R_SERIAL2_CTRL__tr_baud__WIDTH 4
+#define R_SERIAL2_CTRL__tr_baud__c300Hz 0
+#define R_SERIAL2_CTRL__tr_baud__c600Hz 1
+#define R_SERIAL2_CTRL__tr_baud__c1200Hz 2
+#define R_SERIAL2_CTRL__tr_baud__c2400Hz 3
+#define R_SERIAL2_CTRL__tr_baud__c4800Hz 4
+#define R_SERIAL2_CTRL__tr_baud__c9600Hz 5
+#define R_SERIAL2_CTRL__tr_baud__c19k2Hz 6
+#define R_SERIAL2_CTRL__tr_baud__c38k4Hz 7
+#define R_SERIAL2_CTRL__tr_baud__c57k6Hz 8
+#define R_SERIAL2_CTRL__tr_baud__c115k2Hz 9
+#define R_SERIAL2_CTRL__tr_baud__c230k4Hz 10
+#define R_SERIAL2_CTRL__tr_baud__c460k8Hz 11
+#define R_SERIAL2_CTRL__tr_baud__c921k6Hz 12
+#define R_SERIAL2_CTRL__tr_baud__c1843k2Hz 13
+#define R_SERIAL2_CTRL__tr_baud__c6250kHz 14
+#define R_SERIAL2_CTRL__tr_baud__reserved 15
+#define R_SERIAL2_CTRL__rec_baud__BITNR 24
+#define R_SERIAL2_CTRL__rec_baud__WIDTH 4
+#define R_SERIAL2_CTRL__rec_baud__c300Hz 0
+#define R_SERIAL2_CTRL__rec_baud__c600Hz 1
+#define R_SERIAL2_CTRL__rec_baud__c1200Hz 2
+#define R_SERIAL2_CTRL__rec_baud__c2400Hz 3
+#define R_SERIAL2_CTRL__rec_baud__c4800Hz 4
+#define R_SERIAL2_CTRL__rec_baud__c9600Hz 5
+#define R_SERIAL2_CTRL__rec_baud__c19k2Hz 6
+#define R_SERIAL2_CTRL__rec_baud__c38k4Hz 7
+#define R_SERIAL2_CTRL__rec_baud__c57k6Hz 8
+#define R_SERIAL2_CTRL__rec_baud__c115k2Hz 9
+#define R_SERIAL2_CTRL__rec_baud__c230k4Hz 10
+#define R_SERIAL2_CTRL__rec_baud__c460k8Hz 11
+#define R_SERIAL2_CTRL__rec_baud__c921k6Hz 12
+#define R_SERIAL2_CTRL__rec_baud__c1843k2Hz 13
+#define R_SERIAL2_CTRL__rec_baud__c6250kHz 14
+#define R_SERIAL2_CTRL__rec_baud__reserved 15
+#define R_SERIAL2_CTRL__dma_err__BITNR 23
+#define R_SERIAL2_CTRL__dma_err__WIDTH 1
+#define R_SERIAL2_CTRL__dma_err__stop 0
+#define R_SERIAL2_CTRL__dma_err__ignore 1
+#define R_SERIAL2_CTRL__rec_enable__BITNR 22
+#define R_SERIAL2_CTRL__rec_enable__WIDTH 1
+#define R_SERIAL2_CTRL__rec_enable__disable 0
+#define R_SERIAL2_CTRL__rec_enable__enable 1
+#define R_SERIAL2_CTRL__rts___BITNR 21
+#define R_SERIAL2_CTRL__rts___WIDTH 1
+#define R_SERIAL2_CTRL__rts___active 0
+#define R_SERIAL2_CTRL__rts___inactive 1
+#define R_SERIAL2_CTRL__sampling__BITNR 20
+#define R_SERIAL2_CTRL__sampling__WIDTH 1
+#define R_SERIAL2_CTRL__sampling__middle 0
+#define R_SERIAL2_CTRL__sampling__majority 1
+#define R_SERIAL2_CTRL__rec_stick_par__BITNR 19
+#define R_SERIAL2_CTRL__rec_stick_par__WIDTH 1
+#define R_SERIAL2_CTRL__rec_stick_par__normal 0
+#define R_SERIAL2_CTRL__rec_stick_par__stick 1
+#define R_SERIAL2_CTRL__rec_par__BITNR 18
+#define R_SERIAL2_CTRL__rec_par__WIDTH 1
+#define R_SERIAL2_CTRL__rec_par__even 0
+#define R_SERIAL2_CTRL__rec_par__odd 1
+#define R_SERIAL2_CTRL__rec_par_en__BITNR 17
+#define R_SERIAL2_CTRL__rec_par_en__WIDTH 1
+#define R_SERIAL2_CTRL__rec_par_en__disable 0
+#define R_SERIAL2_CTRL__rec_par_en__enable 1
+#define R_SERIAL2_CTRL__rec_bitnr__BITNR 16
+#define R_SERIAL2_CTRL__rec_bitnr__WIDTH 1
+#define R_SERIAL2_CTRL__rec_bitnr__rec_8bit 0
+#define R_SERIAL2_CTRL__rec_bitnr__rec_7bit 1
+#define R_SERIAL2_CTRL__txd__BITNR 15
+#define R_SERIAL2_CTRL__txd__WIDTH 1
+#define R_SERIAL2_CTRL__tr_enable__BITNR 14
+#define R_SERIAL2_CTRL__tr_enable__WIDTH 1
+#define R_SERIAL2_CTRL__tr_enable__disable 0
+#define R_SERIAL2_CTRL__tr_enable__enable 1
+#define R_SERIAL2_CTRL__auto_cts__BITNR 13
+#define R_SERIAL2_CTRL__auto_cts__WIDTH 1
+#define R_SERIAL2_CTRL__auto_cts__disabled 0
+#define R_SERIAL2_CTRL__auto_cts__active 1
+#define R_SERIAL2_CTRL__stop_bits__BITNR 12
+#define R_SERIAL2_CTRL__stop_bits__WIDTH 1
+#define R_SERIAL2_CTRL__stop_bits__one_bit 0
+#define R_SERIAL2_CTRL__stop_bits__two_bits 1
+#define R_SERIAL2_CTRL__tr_stick_par__BITNR 11
+#define R_SERIAL2_CTRL__tr_stick_par__WIDTH 1
+#define R_SERIAL2_CTRL__tr_stick_par__normal 0
+#define R_SERIAL2_CTRL__tr_stick_par__stick 1
+#define R_SERIAL2_CTRL__tr_par__BITNR 10
+#define R_SERIAL2_CTRL__tr_par__WIDTH 1
+#define R_SERIAL2_CTRL__tr_par__even 0
+#define R_SERIAL2_CTRL__tr_par__odd 1
+#define R_SERIAL2_CTRL__tr_par_en__BITNR 9
+#define R_SERIAL2_CTRL__tr_par_en__WIDTH 1
+#define R_SERIAL2_CTRL__tr_par_en__disable 0
+#define R_SERIAL2_CTRL__tr_par_en__enable 1
+#define R_SERIAL2_CTRL__tr_bitnr__BITNR 8
+#define R_SERIAL2_CTRL__tr_bitnr__WIDTH 1
+#define R_SERIAL2_CTRL__tr_bitnr__tr_8bit 0
+#define R_SERIAL2_CTRL__tr_bitnr__tr_7bit 1
+#define R_SERIAL2_CTRL__data_out__BITNR 0
+#define R_SERIAL2_CTRL__data_out__WIDTH 8
+
+#define R_SERIAL2_BAUD (IO_TYPECAST_BYTE 0xb0000073)
+#define R_SERIAL2_BAUD__tr_baud__BITNR 4
+#define R_SERIAL2_BAUD__tr_baud__WIDTH 4
+#define R_SERIAL2_BAUD__tr_baud__c300Hz 0
+#define R_SERIAL2_BAUD__tr_baud__c600Hz 1
+#define R_SERIAL2_BAUD__tr_baud__c1200Hz 2
+#define R_SERIAL2_BAUD__tr_baud__c2400Hz 3
+#define R_SERIAL2_BAUD__tr_baud__c4800Hz 4
+#define R_SERIAL2_BAUD__tr_baud__c9600Hz 5
+#define R_SERIAL2_BAUD__tr_baud__c19k2Hz 6
+#define R_SERIAL2_BAUD__tr_baud__c38k4Hz 7
+#define R_SERIAL2_BAUD__tr_baud__c57k6Hz 8
+#define R_SERIAL2_BAUD__tr_baud__c115k2Hz 9
+#define R_SERIAL2_BAUD__tr_baud__c230k4Hz 10
+#define R_SERIAL2_BAUD__tr_baud__c460k8Hz 11
+#define R_SERIAL2_BAUD__tr_baud__c921k6Hz 12
+#define R_SERIAL2_BAUD__tr_baud__c1843k2Hz 13
+#define R_SERIAL2_BAUD__tr_baud__c6250kHz 14
+#define R_SERIAL2_BAUD__tr_baud__reserved 15
+#define R_SERIAL2_BAUD__rec_baud__BITNR 0
+#define R_SERIAL2_BAUD__rec_baud__WIDTH 4
+#define R_SERIAL2_BAUD__rec_baud__c300Hz 0
+#define R_SERIAL2_BAUD__rec_baud__c600Hz 1
+#define R_SERIAL2_BAUD__rec_baud__c1200Hz 2
+#define R_SERIAL2_BAUD__rec_baud__c2400Hz 3
+#define R_SERIAL2_BAUD__rec_baud__c4800Hz 4
+#define R_SERIAL2_BAUD__rec_baud__c9600Hz 5
+#define R_SERIAL2_BAUD__rec_baud__c19k2Hz 6
+#define R_SERIAL2_BAUD__rec_baud__c38k4Hz 7
+#define R_SERIAL2_BAUD__rec_baud__c57k6Hz 8
+#define R_SERIAL2_BAUD__rec_baud__c115k2Hz 9
+#define R_SERIAL2_BAUD__rec_baud__c230k4Hz 10
+#define R_SERIAL2_BAUD__rec_baud__c460k8Hz 11
+#define R_SERIAL2_BAUD__rec_baud__c921k6Hz 12
+#define R_SERIAL2_BAUD__rec_baud__c1843k2Hz 13
+#define R_SERIAL2_BAUD__rec_baud__c6250kHz 14
+#define R_SERIAL2_BAUD__rec_baud__reserved 15
+
+#define R_SERIAL2_REC_CTRL (IO_TYPECAST_BYTE 0xb0000072)
+#define R_SERIAL2_REC_CTRL__dma_err__BITNR 7
+#define R_SERIAL2_REC_CTRL__dma_err__WIDTH 1
+#define R_SERIAL2_REC_CTRL__dma_err__stop 0
+#define R_SERIAL2_REC_CTRL__dma_err__ignore 1
+#define R_SERIAL2_REC_CTRL__rec_enable__BITNR 6
+#define R_SERIAL2_REC_CTRL__rec_enable__WIDTH 1
+#define R_SERIAL2_REC_CTRL__rec_enable__disable 0
+#define R_SERIAL2_REC_CTRL__rec_enable__enable 1
+#define R_SERIAL2_REC_CTRL__rts___BITNR 5
+#define R_SERIAL2_REC_CTRL__rts___WIDTH 1
+#define R_SERIAL2_REC_CTRL__rts___active 0
+#define R_SERIAL2_REC_CTRL__rts___inactive 1
+#define R_SERIAL2_REC_CTRL__sampling__BITNR 4
+#define R_SERIAL2_REC_CTRL__sampling__WIDTH 1
+#define R_SERIAL2_REC_CTRL__sampling__middle 0
+#define R_SERIAL2_REC_CTRL__sampling__majority 1
+#define R_SERIAL2_REC_CTRL__rec_stick_par__BITNR 3
+#define R_SERIAL2_REC_CTRL__rec_stick_par__WIDTH 1
+#define R_SERIAL2_REC_CTRL__rec_stick_par__normal 0
+#define R_SERIAL2_REC_CTRL__rec_stick_par__stick 1
+#define R_SERIAL2_REC_CTRL__rec_par__BITNR 2
+#define R_SERIAL2_REC_CTRL__rec_par__WIDTH 1
+#define R_SERIAL2_REC_CTRL__rec_par__even 0
+#define R_SERIAL2_REC_CTRL__rec_par__odd 1
+#define R_SERIAL2_REC_CTRL__rec_par_en__BITNR 1
+#define R_SERIAL2_REC_CTRL__rec_par_en__WIDTH 1
+#define R_SERIAL2_REC_CTRL__rec_par_en__disable 0
+#define R_SERIAL2_REC_CTRL__rec_par_en__enable 1
+#define R_SERIAL2_REC_CTRL__rec_bitnr__BITNR 0
+#define R_SERIAL2_REC_CTRL__rec_bitnr__WIDTH 1
+#define R_SERIAL2_REC_CTRL__rec_bitnr__rec_8bit 0
+#define R_SERIAL2_REC_CTRL__rec_bitnr__rec_7bit 1
+
+#define R_SERIAL2_TR_CTRL (IO_TYPECAST_BYTE 0xb0000071)
+#define R_SERIAL2_TR_CTRL__txd__BITNR 7
+#define R_SERIAL2_TR_CTRL__txd__WIDTH 1
+#define R_SERIAL2_TR_CTRL__tr_enable__BITNR 6
+#define R_SERIAL2_TR_CTRL__tr_enable__WIDTH 1
+#define R_SERIAL2_TR_CTRL__tr_enable__disable 0
+#define R_SERIAL2_TR_CTRL__tr_enable__enable 1
+#define R_SERIAL2_TR_CTRL__auto_cts__BITNR 5
+#define R_SERIAL2_TR_CTRL__auto_cts__WIDTH 1
+#define R_SERIAL2_TR_CTRL__auto_cts__disabled 0
+#define R_SERIAL2_TR_CTRL__auto_cts__active 1
+#define R_SERIAL2_TR_CTRL__stop_bits__BITNR 4
+#define R_SERIAL2_TR_CTRL__stop_bits__WIDTH 1
+#define R_SERIAL2_TR_CTRL__stop_bits__one_bit 0
+#define R_SERIAL2_TR_CTRL__stop_bits__two_bits 1
+#define R_SERIAL2_TR_CTRL__tr_stick_par__BITNR 3
+#define R_SERIAL2_TR_CTRL__tr_stick_par__WIDTH 1
+#define R_SERIAL2_TR_CTRL__tr_stick_par__normal 0
+#define R_SERIAL2_TR_CTRL__tr_stick_par__stick 1
+#define R_SERIAL2_TR_CTRL__tr_par__BITNR 2
+#define R_SERIAL2_TR_CTRL__tr_par__WIDTH 1
+#define R_SERIAL2_TR_CTRL__tr_par__even 0
+#define R_SERIAL2_TR_CTRL__tr_par__odd 1
+#define R_SERIAL2_TR_CTRL__tr_par_en__BITNR 1
+#define R_SERIAL2_TR_CTRL__tr_par_en__WIDTH 1
+#define R_SERIAL2_TR_CTRL__tr_par_en__disable 0
+#define R_SERIAL2_TR_CTRL__tr_par_en__enable 1
+#define R_SERIAL2_TR_CTRL__tr_bitnr__BITNR 0
+#define R_SERIAL2_TR_CTRL__tr_bitnr__WIDTH 1
+#define R_SERIAL2_TR_CTRL__tr_bitnr__tr_8bit 0
+#define R_SERIAL2_TR_CTRL__tr_bitnr__tr_7bit 1
+
+#define R_SERIAL2_TR_DATA (IO_TYPECAST_BYTE 0xb0000070)
+#define R_SERIAL2_TR_DATA__data_out__BITNR 0
+#define R_SERIAL2_TR_DATA__data_out__WIDTH 8
+
+#define R_SERIAL2_READ (IO_TYPECAST_RO_UDWORD 0xb0000070)
+#define R_SERIAL2_READ__xoff_detect__BITNR 15
+#define R_SERIAL2_READ__xoff_detect__WIDTH 1
+#define R_SERIAL2_READ__xoff_detect__no_xoff 0
+#define R_SERIAL2_READ__xoff_detect__xoff 1
+#define R_SERIAL2_READ__cts___BITNR 14
+#define R_SERIAL2_READ__cts___WIDTH 1
+#define R_SERIAL2_READ__cts___active 0
+#define R_SERIAL2_READ__cts___inactive 1
+#define R_SERIAL2_READ__tr_ready__BITNR 13
+#define R_SERIAL2_READ__tr_ready__WIDTH 1
+#define R_SERIAL2_READ__tr_ready__full 0
+#define R_SERIAL2_READ__tr_ready__ready 1
+#define R_SERIAL2_READ__rxd__BITNR 12
+#define R_SERIAL2_READ__rxd__WIDTH 1
+#define R_SERIAL2_READ__overrun__BITNR 11
+#define R_SERIAL2_READ__overrun__WIDTH 1
+#define R_SERIAL2_READ__overrun__no 0
+#define R_SERIAL2_READ__overrun__yes 1
+#define R_SERIAL2_READ__par_err__BITNR 10
+#define R_SERIAL2_READ__par_err__WIDTH 1
+#define R_SERIAL2_READ__par_err__no 0
+#define R_SERIAL2_READ__par_err__yes 1
+#define R_SERIAL2_READ__framing_err__BITNR 9
+#define R_SERIAL2_READ__framing_err__WIDTH 1
+#define R_SERIAL2_READ__framing_err__no 0
+#define R_SERIAL2_READ__framing_err__yes 1
+#define R_SERIAL2_READ__data_avail__BITNR 8
+#define R_SERIAL2_READ__data_avail__WIDTH 1
+#define R_SERIAL2_READ__data_avail__no 0
+#define R_SERIAL2_READ__data_avail__yes 1
+#define R_SERIAL2_READ__data_in__BITNR 0
+#define R_SERIAL2_READ__data_in__WIDTH 8
+
+#define R_SERIAL2_STATUS (IO_TYPECAST_RO_BYTE 0xb0000071)
+#define R_SERIAL2_STATUS__xoff_detect__BITNR 7
+#define R_SERIAL2_STATUS__xoff_detect__WIDTH 1
+#define R_SERIAL2_STATUS__xoff_detect__no_xoff 0
+#define R_SERIAL2_STATUS__xoff_detect__xoff 1
+#define R_SERIAL2_STATUS__cts___BITNR 6
+#define R_SERIAL2_STATUS__cts___WIDTH 1
+#define R_SERIAL2_STATUS__cts___active 0
+#define R_SERIAL2_STATUS__cts___inactive 1
+#define R_SERIAL2_STATUS__tr_ready__BITNR 5
+#define R_SERIAL2_STATUS__tr_ready__WIDTH 1
+#define R_SERIAL2_STATUS__tr_ready__full 0
+#define R_SERIAL2_STATUS__tr_ready__ready 1
+#define R_SERIAL2_STATUS__rxd__BITNR 4
+#define R_SERIAL2_STATUS__rxd__WIDTH 1
+#define R_SERIAL2_STATUS__overrun__BITNR 3
+#define R_SERIAL2_STATUS__overrun__WIDTH 1
+#define R_SERIAL2_STATUS__overrun__no 0
+#define R_SERIAL2_STATUS__overrun__yes 1
+#define R_SERIAL2_STATUS__par_err__BITNR 2
+#define R_SERIAL2_STATUS__par_err__WIDTH 1
+#define R_SERIAL2_STATUS__par_err__no 0
+#define R_SERIAL2_STATUS__par_err__yes 1
+#define R_SERIAL2_STATUS__framing_err__BITNR 1
+#define R_SERIAL2_STATUS__framing_err__WIDTH 1
+#define R_SERIAL2_STATUS__framing_err__no 0
+#define R_SERIAL2_STATUS__framing_err__yes 1
+#define R_SERIAL2_STATUS__data_avail__BITNR 0
+#define R_SERIAL2_STATUS__data_avail__WIDTH 1
+#define R_SERIAL2_STATUS__data_avail__no 0
+#define R_SERIAL2_STATUS__data_avail__yes 1
+
+#define R_SERIAL2_REC_DATA (IO_TYPECAST_RO_BYTE 0xb0000070)
+#define R_SERIAL2_REC_DATA__data_in__BITNR 0
+#define R_SERIAL2_REC_DATA__data_in__WIDTH 8
+
+#define R_SERIAL2_XOFF (IO_TYPECAST_UDWORD 0xb0000074)
+#define R_SERIAL2_XOFF__tx_stop__BITNR 9
+#define R_SERIAL2_XOFF__tx_stop__WIDTH 1
+#define R_SERIAL2_XOFF__tx_stop__enable 0
+#define R_SERIAL2_XOFF__tx_stop__stop 1
+#define R_SERIAL2_XOFF__auto_xoff__BITNR 8
+#define R_SERIAL2_XOFF__auto_xoff__WIDTH 1
+#define R_SERIAL2_XOFF__auto_xoff__disable 0
+#define R_SERIAL2_XOFF__auto_xoff__enable 1
+#define R_SERIAL2_XOFF__xoff_char__BITNR 0
+#define R_SERIAL2_XOFF__xoff_char__WIDTH 8
+
+#define R_SERIAL3_CTRL (IO_TYPECAST_UDWORD 0xb0000078)
+#define R_SERIAL3_CTRL__tr_baud__BITNR 28
+#define R_SERIAL3_CTRL__tr_baud__WIDTH 4
+#define R_SERIAL3_CTRL__tr_baud__c300Hz 0
+#define R_SERIAL3_CTRL__tr_baud__c600Hz 1
+#define R_SERIAL3_CTRL__tr_baud__c1200Hz 2
+#define R_SERIAL3_CTRL__tr_baud__c2400Hz 3
+#define R_SERIAL3_CTRL__tr_baud__c4800Hz 4
+#define R_SERIAL3_CTRL__tr_baud__c9600Hz 5
+#define R_SERIAL3_CTRL__tr_baud__c19k2Hz 6
+#define R_SERIAL3_CTRL__tr_baud__c38k4Hz 7
+#define R_SERIAL3_CTRL__tr_baud__c57k6Hz 8
+#define R_SERIAL3_CTRL__tr_baud__c115k2Hz 9
+#define R_SERIAL3_CTRL__tr_baud__c230k4Hz 10
+#define R_SERIAL3_CTRL__tr_baud__c460k8Hz 11
+#define R_SERIAL3_CTRL__tr_baud__c921k6Hz 12
+#define R_SERIAL3_CTRL__tr_baud__c1843k2Hz 13
+#define R_SERIAL3_CTRL__tr_baud__c6250kHz 14
+#define R_SERIAL3_CTRL__tr_baud__reserved 15
+#define R_SERIAL3_CTRL__rec_baud__BITNR 24
+#define R_SERIAL3_CTRL__rec_baud__WIDTH 4
+#define R_SERIAL3_CTRL__rec_baud__c300Hz 0
+#define R_SERIAL3_CTRL__rec_baud__c600Hz 1
+#define R_SERIAL3_CTRL__rec_baud__c1200Hz 2
+#define R_SERIAL3_CTRL__rec_baud__c2400Hz 3
+#define R_SERIAL3_CTRL__rec_baud__c4800Hz 4
+#define R_SERIAL3_CTRL__rec_baud__c9600Hz 5
+#define R_SERIAL3_CTRL__rec_baud__c19k2Hz 6
+#define R_SERIAL3_CTRL__rec_baud__c38k4Hz 7
+#define R_SERIAL3_CTRL__rec_baud__c57k6Hz 8
+#define R_SERIAL3_CTRL__rec_baud__c115k2Hz 9
+#define R_SERIAL3_CTRL__rec_baud__c230k4Hz 10
+#define R_SERIAL3_CTRL__rec_baud__c460k8Hz 11
+#define R_SERIAL3_CTRL__rec_baud__c921k6Hz 12
+#define R_SERIAL3_CTRL__rec_baud__c1843k2Hz 13
+#define R_SERIAL3_CTRL__rec_baud__c6250kHz 14
+#define R_SERIAL3_CTRL__rec_baud__reserved 15
+#define R_SERIAL3_CTRL__dma_err__BITNR 23
+#define R_SERIAL3_CTRL__dma_err__WIDTH 1
+#define R_SERIAL3_CTRL__dma_err__stop 0
+#define R_SERIAL3_CTRL__dma_err__ignore 1
+#define R_SERIAL3_CTRL__rec_enable__BITNR 22
+#define R_SERIAL3_CTRL__rec_enable__WIDTH 1
+#define R_SERIAL3_CTRL__rec_enable__disable 0
+#define R_SERIAL3_CTRL__rec_enable__enable 1
+#define R_SERIAL3_CTRL__rts___BITNR 21
+#define R_SERIAL3_CTRL__rts___WIDTH 1
+#define R_SERIAL3_CTRL__rts___active 0
+#define R_SERIAL3_CTRL__rts___inactive 1
+#define R_SERIAL3_CTRL__sampling__BITNR 20
+#define R_SERIAL3_CTRL__sampling__WIDTH 1
+#define R_SERIAL3_CTRL__sampling__middle 0
+#define R_SERIAL3_CTRL__sampling__majority 1
+#define R_SERIAL3_CTRL__rec_stick_par__BITNR 19
+#define R_SERIAL3_CTRL__rec_stick_par__WIDTH 1
+#define R_SERIAL3_CTRL__rec_stick_par__normal 0
+#define R_SERIAL3_CTRL__rec_stick_par__stick 1
+#define R_SERIAL3_CTRL__rec_par__BITNR 18
+#define R_SERIAL3_CTRL__rec_par__WIDTH 1
+#define R_SERIAL3_CTRL__rec_par__even 0
+#define R_SERIAL3_CTRL__rec_par__odd 1
+#define R_SERIAL3_CTRL__rec_par_en__BITNR 17
+#define R_SERIAL3_CTRL__rec_par_en__WIDTH 1
+#define R_SERIAL3_CTRL__rec_par_en__disable 0
+#define R_SERIAL3_CTRL__rec_par_en__enable 1
+#define R_SERIAL3_CTRL__rec_bitnr__BITNR 16
+#define R_SERIAL3_CTRL__rec_bitnr__WIDTH 1
+#define R_SERIAL3_CTRL__rec_bitnr__rec_8bit 0
+#define R_SERIAL3_CTRL__rec_bitnr__rec_7bit 1
+#define R_SERIAL3_CTRL__txd__BITNR 15
+#define R_SERIAL3_CTRL__txd__WIDTH 1
+#define R_SERIAL3_CTRL__tr_enable__BITNR 14
+#define R_SERIAL3_CTRL__tr_enable__WIDTH 1
+#define R_SERIAL3_CTRL__tr_enable__disable 0
+#define R_SERIAL3_CTRL__tr_enable__enable 1
+#define R_SERIAL3_CTRL__auto_cts__BITNR 13
+#define R_SERIAL3_CTRL__auto_cts__WIDTH 1
+#define R_SERIAL3_CTRL__auto_cts__disabled 0
+#define R_SERIAL3_CTRL__auto_cts__active 1
+#define R_SERIAL3_CTRL__stop_bits__BITNR 12
+#define R_SERIAL3_CTRL__stop_bits__WIDTH 1
+#define R_SERIAL3_CTRL__stop_bits__one_bit 0
+#define R_SERIAL3_CTRL__stop_bits__two_bits 1
+#define R_SERIAL3_CTRL__tr_stick_par__BITNR 11
+#define R_SERIAL3_CTRL__tr_stick_par__WIDTH 1
+#define R_SERIAL3_CTRL__tr_stick_par__normal 0
+#define R_SERIAL3_CTRL__tr_stick_par__stick 1
+#define R_SERIAL3_CTRL__tr_par__BITNR 10
+#define R_SERIAL3_CTRL__tr_par__WIDTH 1
+#define R_SERIAL3_CTRL__tr_par__even 0
+#define R_SERIAL3_CTRL__tr_par__odd 1
+#define R_SERIAL3_CTRL__tr_par_en__BITNR 9
+#define R_SERIAL3_CTRL__tr_par_en__WIDTH 1
+#define R_SERIAL3_CTRL__tr_par_en__disable 0
+#define R_SERIAL3_CTRL__tr_par_en__enable 1
+#define R_SERIAL3_CTRL__tr_bitnr__BITNR 8
+#define R_SERIAL3_CTRL__tr_bitnr__WIDTH 1
+#define R_SERIAL3_CTRL__tr_bitnr__tr_8bit 0
+#define R_SERIAL3_CTRL__tr_bitnr__tr_7bit 1
+#define R_SERIAL3_CTRL__data_out__BITNR 0
+#define R_SERIAL3_CTRL__data_out__WIDTH 8
+
+#define R_SERIAL3_BAUD (IO_TYPECAST_BYTE 0xb000007b)
+#define R_SERIAL3_BAUD__tr_baud__BITNR 4
+#define R_SERIAL3_BAUD__tr_baud__WIDTH 4
+#define R_SERIAL3_BAUD__tr_baud__c300Hz 0
+#define R_SERIAL3_BAUD__tr_baud__c600Hz 1
+#define R_SERIAL3_BAUD__tr_baud__c1200Hz 2
+#define R_SERIAL3_BAUD__tr_baud__c2400Hz 3
+#define R_SERIAL3_BAUD__tr_baud__c4800Hz 4
+#define R_SERIAL3_BAUD__tr_baud__c9600Hz 5
+#define R_SERIAL3_BAUD__tr_baud__c19k2Hz 6
+#define R_SERIAL3_BAUD__tr_baud__c38k4Hz 7
+#define R_SERIAL3_BAUD__tr_baud__c57k6Hz 8
+#define R_SERIAL3_BAUD__tr_baud__c115k2Hz 9
+#define R_SERIAL3_BAUD__tr_baud__c230k4Hz 10
+#define R_SERIAL3_BAUD__tr_baud__c460k8Hz 11
+#define R_SERIAL3_BAUD__tr_baud__c921k6Hz 12
+#define R_SERIAL3_BAUD__tr_baud__c1843k2Hz 13
+#define R_SERIAL3_BAUD__tr_baud__c6250kHz 14
+#define R_SERIAL3_BAUD__tr_baud__reserved 15
+#define R_SERIAL3_BAUD__rec_baud__BITNR 0
+#define R_SERIAL3_BAUD__rec_baud__WIDTH 4
+#define R_SERIAL3_BAUD__rec_baud__c300Hz 0
+#define R_SERIAL3_BAUD__rec_baud__c600Hz 1
+#define R_SERIAL3_BAUD__rec_baud__c1200Hz 2
+#define R_SERIAL3_BAUD__rec_baud__c2400Hz 3
+#define R_SERIAL3_BAUD__rec_baud__c4800Hz 4
+#define R_SERIAL3_BAUD__rec_baud__c9600Hz 5
+#define R_SERIAL3_BAUD__rec_baud__c19k2Hz 6
+#define R_SERIAL3_BAUD__rec_baud__c38k4Hz 7
+#define R_SERIAL3_BAUD__rec_baud__c57k6Hz 8
+#define R_SERIAL3_BAUD__rec_baud__c115k2Hz 9
+#define R_SERIAL3_BAUD__rec_baud__c230k4Hz 10
+#define R_SERIAL3_BAUD__rec_baud__c460k8Hz 11
+#define R_SERIAL3_BAUD__rec_baud__c921k6Hz 12
+#define R_SERIAL3_BAUD__rec_baud__c1843k2Hz 13
+#define R_SERIAL3_BAUD__rec_baud__c6250kHz 14
+#define R_SERIAL3_BAUD__rec_baud__reserved 15
+
+#define R_SERIAL3_REC_CTRL (IO_TYPECAST_BYTE 0xb000007a)
+#define R_SERIAL3_REC_CTRL__dma_err__BITNR 7
+#define R_SERIAL3_REC_CTRL__dma_err__WIDTH 1
+#define R_SERIAL3_REC_CTRL__dma_err__stop 0
+#define R_SERIAL3_REC_CTRL__dma_err__ignore 1
+#define R_SERIAL3_REC_CTRL__rec_enable__BITNR 6
+#define R_SERIAL3_REC_CTRL__rec_enable__WIDTH 1
+#define R_SERIAL3_REC_CTRL__rec_enable__disable 0
+#define R_SERIAL3_REC_CTRL__rec_enable__enable 1
+#define R_SERIAL3_REC_CTRL__rts___BITNR 5
+#define R_SERIAL3_REC_CTRL__rts___WIDTH 1
+#define R_SERIAL3_REC_CTRL__rts___active 0
+#define R_SERIAL3_REC_CTRL__rts___inactive 1
+#define R_SERIAL3_REC_CTRL__sampling__BITNR 4
+#define R_SERIAL3_REC_CTRL__sampling__WIDTH 1
+#define R_SERIAL3_REC_CTRL__sampling__middle 0
+#define R_SERIAL3_REC_CTRL__sampling__majority 1
+#define R_SERIAL3_REC_CTRL__rec_stick_par__BITNR 3
+#define R_SERIAL3_REC_CTRL__rec_stick_par__WIDTH 1
+#define R_SERIAL3_REC_CTRL__rec_stick_par__normal 0
+#define R_SERIAL3_REC_CTRL__rec_stick_par__stick 1
+#define R_SERIAL3_REC_CTRL__rec_par__BITNR 2
+#define R_SERIAL3_REC_CTRL__rec_par__WIDTH 1
+#define R_SERIAL3_REC_CTRL__rec_par__even 0
+#define R_SERIAL3_REC_CTRL__rec_par__odd 1
+#define R_SERIAL3_REC_CTRL__rec_par_en__BITNR 1
+#define R_SERIAL3_REC_CTRL__rec_par_en__WIDTH 1
+#define R_SERIAL3_REC_CTRL__rec_par_en__disable 0
+#define R_SERIAL3_REC_CTRL__rec_par_en__enable 1
+#define R_SERIAL3_REC_CTRL__rec_bitnr__BITNR 0
+#define R_SERIAL3_REC_CTRL__rec_bitnr__WIDTH 1
+#define R_SERIAL3_REC_CTRL__rec_bitnr__rec_8bit 0
+#define R_SERIAL3_REC_CTRL__rec_bitnr__rec_7bit 1
+
+#define R_SERIAL3_TR_CTRL (IO_TYPECAST_BYTE 0xb0000079)
+#define R_SERIAL3_TR_CTRL__txd__BITNR 7
+#define R_SERIAL3_TR_CTRL__txd__WIDTH 1
+#define R_SERIAL3_TR_CTRL__tr_enable__BITNR 6
+#define R_SERIAL3_TR_CTRL__tr_enable__WIDTH 1
+#define R_SERIAL3_TR_CTRL__tr_enable__disable 0
+#define R_SERIAL3_TR_CTRL__tr_enable__enable 1
+#define R_SERIAL3_TR_CTRL__auto_cts__BITNR 5
+#define R_SERIAL3_TR_CTRL__auto_cts__WIDTH 1
+#define R_SERIAL3_TR_CTRL__auto_cts__disabled 0
+#define R_SERIAL3_TR_CTRL__auto_cts__active 1
+#define R_SERIAL3_TR_CTRL__stop_bits__BITNR 4
+#define R_SERIAL3_TR_CTRL__stop_bits__WIDTH 1
+#define R_SERIAL3_TR_CTRL__stop_bits__one_bit 0
+#define R_SERIAL3_TR_CTRL__stop_bits__two_bits 1
+#define R_SERIAL3_TR_CTRL__tr_stick_par__BITNR 3
+#define R_SERIAL3_TR_CTRL__tr_stick_par__WIDTH 1
+#define R_SERIAL3_TR_CTRL__tr_stick_par__normal 0
+#define R_SERIAL3_TR_CTRL__tr_stick_par__stick 1
+#define R_SERIAL3_TR_CTRL__tr_par__BITNR 2
+#define R_SERIAL3_TR_CTRL__tr_par__WIDTH 1
+#define R_SERIAL3_TR_CTRL__tr_par__even 0
+#define R_SERIAL3_TR_CTRL__tr_par__odd 1
+#define R_SERIAL3_TR_CTRL__tr_par_en__BITNR 1
+#define R_SERIAL3_TR_CTRL__tr_par_en__WIDTH 1
+#define R_SERIAL3_TR_CTRL__tr_par_en__disable 0
+#define R_SERIAL3_TR_CTRL__tr_par_en__enable 1
+#define R_SERIAL3_TR_CTRL__tr_bitnr__BITNR 0
+#define R_SERIAL3_TR_CTRL__tr_bitnr__WIDTH 1
+#define R_SERIAL3_TR_CTRL__tr_bitnr__tr_8bit 0
+#define R_SERIAL3_TR_CTRL__tr_bitnr__tr_7bit 1
+
+#define R_SERIAL3_TR_DATA (IO_TYPECAST_BYTE 0xb0000078)
+#define R_SERIAL3_TR_DATA__data_out__BITNR 0
+#define R_SERIAL3_TR_DATA__data_out__WIDTH 8
+
+#define R_SERIAL3_READ (IO_TYPECAST_RO_UDWORD 0xb0000078)
+#define R_SERIAL3_READ__xoff_detect__BITNR 15
+#define R_SERIAL3_READ__xoff_detect__WIDTH 1
+#define R_SERIAL3_READ__xoff_detect__no_xoff 0
+#define R_SERIAL3_READ__xoff_detect__xoff 1
+#define R_SERIAL3_READ__cts___BITNR 14
+#define R_SERIAL3_READ__cts___WIDTH 1
+#define R_SERIAL3_READ__cts___active 0
+#define R_SERIAL3_READ__cts___inactive 1
+#define R_SERIAL3_READ__tr_ready__BITNR 13
+#define R_SERIAL3_READ__tr_ready__WIDTH 1
+#define R_SERIAL3_READ__tr_ready__full 0
+#define R_SERIAL3_READ__tr_ready__ready 1
+#define R_SERIAL3_READ__rxd__BITNR 12
+#define R_SERIAL3_READ__rxd__WIDTH 1
+#define R_SERIAL3_READ__overrun__BITNR 11
+#define R_SERIAL3_READ__overrun__WIDTH 1
+#define R_SERIAL3_READ__overrun__no 0
+#define R_SERIAL3_READ__overrun__yes 1
+#define R_SERIAL3_READ__par_err__BITNR 10
+#define R_SERIAL3_READ__par_err__WIDTH 1
+#define R_SERIAL3_READ__par_err__no 0
+#define R_SERIAL3_READ__par_err__yes 1
+#define R_SERIAL3_READ__framing_err__BITNR 9
+#define R_SERIAL3_READ__framing_err__WIDTH 1
+#define R_SERIAL3_READ__framing_err__no 0
+#define R_SERIAL3_READ__framing_err__yes 1
+#define R_SERIAL3_READ__data_avail__BITNR 8
+#define R_SERIAL3_READ__data_avail__WIDTH 1
+#define R_SERIAL3_READ__data_avail__no 0
+#define R_SERIAL3_READ__data_avail__yes 1
+#define R_SERIAL3_READ__data_in__BITNR 0
+#define R_SERIAL3_READ__data_in__WIDTH 8
+
+#define R_SERIAL3_STATUS (IO_TYPECAST_RO_BYTE 0xb0000079)
+#define R_SERIAL3_STATUS__xoff_detect__BITNR 7
+#define R_SERIAL3_STATUS__xoff_detect__WIDTH 1
+#define R_SERIAL3_STATUS__xoff_detect__no_xoff 0
+#define R_SERIAL3_STATUS__xoff_detect__xoff 1
+#define R_SERIAL3_STATUS__cts___BITNR 6
+#define R_SERIAL3_STATUS__cts___WIDTH 1
+#define R_SERIAL3_STATUS__cts___active 0
+#define R_SERIAL3_STATUS__cts___inactive 1
+#define R_SERIAL3_STATUS__tr_ready__BITNR 5
+#define R_SERIAL3_STATUS__tr_ready__WIDTH 1
+#define R_SERIAL3_STATUS__tr_ready__full 0
+#define R_SERIAL3_STATUS__tr_ready__ready 1
+#define R_SERIAL3_STATUS__rxd__BITNR 4
+#define R_SERIAL3_STATUS__rxd__WIDTH 1
+#define R_SERIAL3_STATUS__overrun__BITNR 3
+#define R_SERIAL3_STATUS__overrun__WIDTH 1
+#define R_SERIAL3_STATUS__overrun__no 0
+#define R_SERIAL3_STATUS__overrun__yes 1
+#define R_SERIAL3_STATUS__par_err__BITNR 2
+#define R_SERIAL3_STATUS__par_err__WIDTH 1
+#define R_SERIAL3_STATUS__par_err__no 0
+#define R_SERIAL3_STATUS__par_err__yes 1
+#define R_SERIAL3_STATUS__framing_err__BITNR 1
+#define R_SERIAL3_STATUS__framing_err__WIDTH 1
+#define R_SERIAL3_STATUS__framing_err__no 0
+#define R_SERIAL3_STATUS__framing_err__yes 1
+#define R_SERIAL3_STATUS__data_avail__BITNR 0
+#define R_SERIAL3_STATUS__data_avail__WIDTH 1
+#define R_SERIAL3_STATUS__data_avail__no 0
+#define R_SERIAL3_STATUS__data_avail__yes 1
+
+#define R_SERIAL3_REC_DATA (IO_TYPECAST_RO_BYTE 0xb0000078)
+#define R_SERIAL3_REC_DATA__data_in__BITNR 0
+#define R_SERIAL3_REC_DATA__data_in__WIDTH 8
+
+#define R_SERIAL3_XOFF (IO_TYPECAST_UDWORD 0xb000007c)
+#define R_SERIAL3_XOFF__tx_stop__BITNR 9
+#define R_SERIAL3_XOFF__tx_stop__WIDTH 1
+#define R_SERIAL3_XOFF__tx_stop__enable 0
+#define R_SERIAL3_XOFF__tx_stop__stop 1
+#define R_SERIAL3_XOFF__auto_xoff__BITNR 8
+#define R_SERIAL3_XOFF__auto_xoff__WIDTH 1
+#define R_SERIAL3_XOFF__auto_xoff__disable 0
+#define R_SERIAL3_XOFF__auto_xoff__enable 1
+#define R_SERIAL3_XOFF__xoff_char__BITNR 0
+#define R_SERIAL3_XOFF__xoff_char__WIDTH 8
+
+#define R_ALT_SER_BAUDRATE (IO_TYPECAST_UDWORD 0xb000005c)
+#define R_ALT_SER_BAUDRATE__ser3_tr__BITNR 28
+#define R_ALT_SER_BAUDRATE__ser3_tr__WIDTH 2
+#define R_ALT_SER_BAUDRATE__ser3_tr__normal 0
+#define R_ALT_SER_BAUDRATE__ser3_tr__prescale 1
+#define R_ALT_SER_BAUDRATE__ser3_tr__extern 2
+#define R_ALT_SER_BAUDRATE__ser3_tr__timer 3
+#define R_ALT_SER_BAUDRATE__ser3_rec__BITNR 24
+#define R_ALT_SER_BAUDRATE__ser3_rec__WIDTH 2
+#define R_ALT_SER_BAUDRATE__ser3_rec__normal 0
+#define R_ALT_SER_BAUDRATE__ser3_rec__prescale 1
+#define R_ALT_SER_BAUDRATE__ser3_rec__extern 2
+#define R_ALT_SER_BAUDRATE__ser3_rec__timer 3
+#define R_ALT_SER_BAUDRATE__ser2_tr__BITNR 20
+#define R_ALT_SER_BAUDRATE__ser2_tr__WIDTH 2
+#define R_ALT_SER_BAUDRATE__ser2_tr__normal 0
+#define R_ALT_SER_BAUDRATE__ser2_tr__prescale 1
+#define R_ALT_SER_BAUDRATE__ser2_tr__extern 2
+#define R_ALT_SER_BAUDRATE__ser2_tr__timer 3
+#define R_ALT_SER_BAUDRATE__ser2_rec__BITNR 16
+#define R_ALT_SER_BAUDRATE__ser2_rec__WIDTH 2
+#define R_ALT_SER_BAUDRATE__ser2_rec__normal 0
+#define R_ALT_SER_BAUDRATE__ser2_rec__prescale 1
+#define R_ALT_SER_BAUDRATE__ser2_rec__extern 2
+#define R_ALT_SER_BAUDRATE__ser2_rec__timer 3
+#define R_ALT_SER_BAUDRATE__ser1_tr__BITNR 12
+#define R_ALT_SER_BAUDRATE__ser1_tr__WIDTH 2
+#define R_ALT_SER_BAUDRATE__ser1_tr__normal 0
+#define R_ALT_SER_BAUDRATE__ser1_tr__prescale 1
+#define R_ALT_SER_BAUDRATE__ser1_tr__extern 2
+#define R_ALT_SER_BAUDRATE__ser1_tr__timer 3
+#define R_ALT_SER_BAUDRATE__ser1_rec__BITNR 8
+#define R_ALT_SER_BAUDRATE__ser1_rec__WIDTH 2
+#define R_ALT_SER_BAUDRATE__ser1_rec__normal 0
+#define R_ALT_SER_BAUDRATE__ser1_rec__prescale 1
+#define R_ALT_SER_BAUDRATE__ser1_rec__extern 2
+#define R_ALT_SER_BAUDRATE__ser1_rec__timer 3
+#define R_ALT_SER_BAUDRATE__ser0_tr__BITNR 4
+#define R_ALT_SER_BAUDRATE__ser0_tr__WIDTH 2
+#define R_ALT_SER_BAUDRATE__ser0_tr__normal 0
+#define R_ALT_SER_BAUDRATE__ser0_tr__prescale 1
+#define R_ALT_SER_BAUDRATE__ser0_tr__extern 2
+#define R_ALT_SER_BAUDRATE__ser0_tr__timer 3
+#define R_ALT_SER_BAUDRATE__ser0_rec__BITNR 0
+#define R_ALT_SER_BAUDRATE__ser0_rec__WIDTH 2
+#define R_ALT_SER_BAUDRATE__ser0_rec__normal 0
+#define R_ALT_SER_BAUDRATE__ser0_rec__prescale 1
+#define R_ALT_SER_BAUDRATE__ser0_rec__extern 2
+#define R_ALT_SER_BAUDRATE__ser0_rec__timer 3
+
+/*
+!* Network interface registers
+!*/
+
+#define R_NETWORK_SA_0 (IO_TYPECAST_UDWORD 0xb0000080)
+#define R_NETWORK_SA_0__ma0_low__BITNR 0
+#define R_NETWORK_SA_0__ma0_low__WIDTH 32
+
+#define R_NETWORK_SA_1 (IO_TYPECAST_UDWORD 0xb0000084)
+#define R_NETWORK_SA_1__ma1_low__BITNR 16
+#define R_NETWORK_SA_1__ma1_low__WIDTH 16
+#define R_NETWORK_SA_1__ma0_high__BITNR 0
+#define R_NETWORK_SA_1__ma0_high__WIDTH 16
+
+#define R_NETWORK_SA_2 (IO_TYPECAST_UDWORD 0xb0000088)
+#define R_NETWORK_SA_2__ma1_high__BITNR 0
+#define R_NETWORK_SA_2__ma1_high__WIDTH 32
+
+#define R_NETWORK_GA_0 (IO_TYPECAST_UDWORD 0xb000008c)
+#define R_NETWORK_GA_0__ga_low__BITNR 0
+#define R_NETWORK_GA_0__ga_low__WIDTH 32
+
+#define R_NETWORK_GA_1 (IO_TYPECAST_UDWORD 0xb0000090)
+#define R_NETWORK_GA_1__ga_high__BITNR 0
+#define R_NETWORK_GA_1__ga_high__WIDTH 32
+
+#define R_NETWORK_REC_CONFIG (IO_TYPECAST_UDWORD 0xb0000094)
+#define R_NETWORK_REC_CONFIG__max_size__BITNR 10
+#define R_NETWORK_REC_CONFIG__max_size__WIDTH 1
+#define R_NETWORK_REC_CONFIG__max_size__size1518 0
+#define R_NETWORK_REC_CONFIG__max_size__size1522 1
+#define R_NETWORK_REC_CONFIG__duplex__BITNR 9
+#define R_NETWORK_REC_CONFIG__duplex__WIDTH 1
+#define R_NETWORK_REC_CONFIG__duplex__full 1
+#define R_NETWORK_REC_CONFIG__duplex__half 0
+#define R_NETWORK_REC_CONFIG__bad_crc__BITNR 8
+#define R_NETWORK_REC_CONFIG__bad_crc__WIDTH 1
+#define R_NETWORK_REC_CONFIG__bad_crc__receive 1
+#define R_NETWORK_REC_CONFIG__bad_crc__discard 0
+#define R_NETWORK_REC_CONFIG__oversize__BITNR 7
+#define R_NETWORK_REC_CONFIG__oversize__WIDTH 1
+#define R_NETWORK_REC_CONFIG__oversize__receive 1
+#define R_NETWORK_REC_CONFIG__oversize__discard 0
+#define R_NETWORK_REC_CONFIG__undersize__BITNR 6
+#define R_NETWORK_REC_CONFIG__undersize__WIDTH 1
+#define R_NETWORK_REC_CONFIG__undersize__receive 1
+#define R_NETWORK_REC_CONFIG__undersize__discard 0
+#define R_NETWORK_REC_CONFIG__all_roots__BITNR 5
+#define R_NETWORK_REC_CONFIG__all_roots__WIDTH 1
+#define R_NETWORK_REC_CONFIG__all_roots__receive 1
+#define R_NETWORK_REC_CONFIG__all_roots__discard 0
+#define R_NETWORK_REC_CONFIG__tr_broadcast__BITNR 4
+#define R_NETWORK_REC_CONFIG__tr_broadcast__WIDTH 1
+#define R_NETWORK_REC_CONFIG__tr_broadcast__receive 1
+#define R_NETWORK_REC_CONFIG__tr_broadcast__discard 0
+#define R_NETWORK_REC_CONFIG__broadcast__BITNR 3
+#define R_NETWORK_REC_CONFIG__broadcast__WIDTH 1
+#define R_NETWORK_REC_CONFIG__broadcast__receive 1
+#define R_NETWORK_REC_CONFIG__broadcast__discard 0
+#define R_NETWORK_REC_CONFIG__individual__BITNR 2
+#define R_NETWORK_REC_CONFIG__individual__WIDTH 1
+#define R_NETWORK_REC_CONFIG__individual__receive 1
+#define R_NETWORK_REC_CONFIG__individual__discard 0
+#define R_NETWORK_REC_CONFIG__ma1__BITNR 1
+#define R_NETWORK_REC_CONFIG__ma1__WIDTH 1
+#define R_NETWORK_REC_CONFIG__ma1__enable 1
+#define R_NETWORK_REC_CONFIG__ma1__disable 0
+#define R_NETWORK_REC_CONFIG__ma0__BITNR 0
+#define R_NETWORK_REC_CONFIG__ma0__WIDTH 1
+#define R_NETWORK_REC_CONFIG__ma0__enable 1
+#define R_NETWORK_REC_CONFIG__ma0__disable 0
+
+#define R_NETWORK_GEN_CONFIG (IO_TYPECAST_UDWORD 0xb0000098)
+#define R_NETWORK_GEN_CONFIG__loopback__BITNR 5
+#define R_NETWORK_GEN_CONFIG__loopback__WIDTH 1
+#define R_NETWORK_GEN_CONFIG__loopback__on 1
+#define R_NETWORK_GEN_CONFIG__loopback__off 0
+#define R_NETWORK_GEN_CONFIG__frame__BITNR 4
+#define R_NETWORK_GEN_CONFIG__frame__WIDTH 1
+#define R_NETWORK_GEN_CONFIG__frame__tokenr 1
+#define R_NETWORK_GEN_CONFIG__frame__ether 0
+#define R_NETWORK_GEN_CONFIG__vg__BITNR 3
+#define R_NETWORK_GEN_CONFIG__vg__WIDTH 1
+#define R_NETWORK_GEN_CONFIG__vg__on 1
+#define R_NETWORK_GEN_CONFIG__vg__off 0
+#define R_NETWORK_GEN_CONFIG__phy__BITNR 1
+#define R_NETWORK_GEN_CONFIG__phy__WIDTH 2
+#define R_NETWORK_GEN_CONFIG__phy__sni 0
+#define R_NETWORK_GEN_CONFIG__phy__mii_clk 1
+#define R_NETWORK_GEN_CONFIG__phy__mii_err 2
+#define R_NETWORK_GEN_CONFIG__phy__mii_req 3
+#define R_NETWORK_GEN_CONFIG__enable__BITNR 0
+#define R_NETWORK_GEN_CONFIG__enable__WIDTH 1
+#define R_NETWORK_GEN_CONFIG__enable__on 1
+#define R_NETWORK_GEN_CONFIG__enable__off 0
+
+#define R_NETWORK_TR_CTRL (IO_TYPECAST_UDWORD 0xb000009c)
+#define R_NETWORK_TR_CTRL__clr_error__BITNR 8
+#define R_NETWORK_TR_CTRL__clr_error__WIDTH 1
+#define R_NETWORK_TR_CTRL__clr_error__clr 1
+#define R_NETWORK_TR_CTRL__clr_error__nop 0
+#define R_NETWORK_TR_CTRL__delay__BITNR 5
+#define R_NETWORK_TR_CTRL__delay__WIDTH 1
+#define R_NETWORK_TR_CTRL__delay__d2us 1
+#define R_NETWORK_TR_CTRL__delay__none 0
+#define R_NETWORK_TR_CTRL__cancel__BITNR 4
+#define R_NETWORK_TR_CTRL__cancel__WIDTH 1
+#define R_NETWORK_TR_CTRL__cancel__do 1
+#define R_NETWORK_TR_CTRL__cancel__dont 0
+#define R_NETWORK_TR_CTRL__cd__BITNR 3
+#define R_NETWORK_TR_CTRL__cd__WIDTH 1
+#define R_NETWORK_TR_CTRL__cd__enable 0
+#define R_NETWORK_TR_CTRL__cd__disable 1
+#define R_NETWORK_TR_CTRL__cd__ack_col 0
+#define R_NETWORK_TR_CTRL__cd__ack_crs 1
+#define R_NETWORK_TR_CTRL__retry__BITNR 2
+#define R_NETWORK_TR_CTRL__retry__WIDTH 1
+#define R_NETWORK_TR_CTRL__retry__enable 0
+#define R_NETWORK_TR_CTRL__retry__disable 1
+#define R_NETWORK_TR_CTRL__pad__BITNR 1
+#define R_NETWORK_TR_CTRL__pad__WIDTH 1
+#define R_NETWORK_TR_CTRL__pad__enable 1
+#define R_NETWORK_TR_CTRL__pad__disable 0
+#define R_NETWORK_TR_CTRL__crc__BITNR 0
+#define R_NETWORK_TR_CTRL__crc__WIDTH 1
+#define R_NETWORK_TR_CTRL__crc__enable 0
+#define R_NETWORK_TR_CTRL__crc__disable 1
+
+#define R_NETWORK_MGM_CTRL (IO_TYPECAST_UDWORD 0xb00000a0)
+#define R_NETWORK_MGM_CTRL__txd_pins__BITNR 4
+#define R_NETWORK_MGM_CTRL__txd_pins__WIDTH 4
+#define R_NETWORK_MGM_CTRL__txer_pin__BITNR 3
+#define R_NETWORK_MGM_CTRL__txer_pin__WIDTH 1
+#define R_NETWORK_MGM_CTRL__mdck__BITNR 2
+#define R_NETWORK_MGM_CTRL__mdck__WIDTH 1
+#define R_NETWORK_MGM_CTRL__mdoe__BITNR 1
+#define R_NETWORK_MGM_CTRL__mdoe__WIDTH 1
+#define R_NETWORK_MGM_CTRL__mdoe__enable 1
+#define R_NETWORK_MGM_CTRL__mdoe__disable 0
+#define R_NETWORK_MGM_CTRL__mdio__BITNR 0
+#define R_NETWORK_MGM_CTRL__mdio__WIDTH 1
+
+#define R_NETWORK_STAT (IO_TYPECAST_RO_UDWORD 0xb00000a0)
+#define R_NETWORK_STAT__rxd_pins__BITNR 4
+#define R_NETWORK_STAT__rxd_pins__WIDTH 4
+#define R_NETWORK_STAT__rxer__BITNR 3
+#define R_NETWORK_STAT__rxer__WIDTH 1
+#define R_NETWORK_STAT__underrun__BITNR 2
+#define R_NETWORK_STAT__underrun__WIDTH 1
+#define R_NETWORK_STAT__underrun__yes 1
+#define R_NETWORK_STAT__underrun__no 0
+#define R_NETWORK_STAT__exc_col__BITNR 1
+#define R_NETWORK_STAT__exc_col__WIDTH 1
+#define R_NETWORK_STAT__exc_col__yes 1
+#define R_NETWORK_STAT__exc_col__no 0
+#define R_NETWORK_STAT__mdio__BITNR 0
+#define R_NETWORK_STAT__mdio__WIDTH 1
+
+#define R_REC_COUNTERS (IO_TYPECAST_RO_UDWORD 0xb00000a4)
+#define R_REC_COUNTERS__congestion__BITNR 24
+#define R_REC_COUNTERS__congestion__WIDTH 8
+#define R_REC_COUNTERS__oversize__BITNR 16
+#define R_REC_COUNTERS__oversize__WIDTH 8
+#define R_REC_COUNTERS__alignment_error__BITNR 8
+#define R_REC_COUNTERS__alignment_error__WIDTH 8
+#define R_REC_COUNTERS__crc_error__BITNR 0
+#define R_REC_COUNTERS__crc_error__WIDTH 8
+
+#define R_TR_COUNTERS (IO_TYPECAST_RO_UDWORD 0xb00000a8)
+#define R_TR_COUNTERS__deferred__BITNR 24
+#define R_TR_COUNTERS__deferred__WIDTH 8
+#define R_TR_COUNTERS__late_col__BITNR 16
+#define R_TR_COUNTERS__late_col__WIDTH 8
+#define R_TR_COUNTERS__multiple_col__BITNR 8
+#define R_TR_COUNTERS__multiple_col__WIDTH 8
+#define R_TR_COUNTERS__single_col__BITNR 0
+#define R_TR_COUNTERS__single_col__WIDTH 8
+
+#define R_PHY_COUNTERS (IO_TYPECAST_RO_UDWORD 0xb00000ac)
+#define R_PHY_COUNTERS__sqe_test_error__BITNR 8
+#define R_PHY_COUNTERS__sqe_test_error__WIDTH 8
+#define R_PHY_COUNTERS__carrier_loss__BITNR 0
+#define R_PHY_COUNTERS__carrier_loss__WIDTH 8
+
+/*
+!* Parallel printer port registers
+!*/
+
+#define R_PAR0_CTRL_DATA (IO_TYPECAST_UDWORD 0xb0000040)
+#define R_PAR0_CTRL_DATA__peri_int__BITNR 24
+#define R_PAR0_CTRL_DATA__peri_int__WIDTH 1
+#define R_PAR0_CTRL_DATA__peri_int__ack 1
+#define R_PAR0_CTRL_DATA__peri_int__nop 0
+#define R_PAR0_CTRL_DATA__oe__BITNR 20
+#define R_PAR0_CTRL_DATA__oe__WIDTH 1
+#define R_PAR0_CTRL_DATA__oe__enable 1
+#define R_PAR0_CTRL_DATA__oe__disable 0
+#define R_PAR0_CTRL_DATA__seli__BITNR 19
+#define R_PAR0_CTRL_DATA__seli__WIDTH 1
+#define R_PAR0_CTRL_DATA__seli__active 1
+#define R_PAR0_CTRL_DATA__seli__inactive 0
+#define R_PAR0_CTRL_DATA__autofd__BITNR 18
+#define R_PAR0_CTRL_DATA__autofd__WIDTH 1
+#define R_PAR0_CTRL_DATA__autofd__active 1
+#define R_PAR0_CTRL_DATA__autofd__inactive 0
+#define R_PAR0_CTRL_DATA__strb__BITNR 17
+#define R_PAR0_CTRL_DATA__strb__WIDTH 1
+#define R_PAR0_CTRL_DATA__strb__active 1
+#define R_PAR0_CTRL_DATA__strb__inactive 0
+#define R_PAR0_CTRL_DATA__init__BITNR 16
+#define R_PAR0_CTRL_DATA__init__WIDTH 1
+#define R_PAR0_CTRL_DATA__init__active 1
+#define R_PAR0_CTRL_DATA__init__inactive 0
+#define R_PAR0_CTRL_DATA__ecp_cmd__BITNR 8
+#define R_PAR0_CTRL_DATA__ecp_cmd__WIDTH 1
+#define R_PAR0_CTRL_DATA__ecp_cmd__command 1
+#define R_PAR0_CTRL_DATA__ecp_cmd__data 0
+#define R_PAR0_CTRL_DATA__data__BITNR 0
+#define R_PAR0_CTRL_DATA__data__WIDTH 8
+
+#define R_PAR0_CTRL (IO_TYPECAST_BYTE 0xb0000042)
+#define R_PAR0_CTRL__ctrl__BITNR 0
+#define R_PAR0_CTRL__ctrl__WIDTH 5
+
+#define R_PAR0_STATUS_DATA (IO_TYPECAST_RO_UDWORD 0xb0000040)
+#define R_PAR0_STATUS_DATA__mode__BITNR 29
+#define R_PAR0_STATUS_DATA__mode__WIDTH 3
+#define R_PAR0_STATUS_DATA__mode__manual 0
+#define R_PAR0_STATUS_DATA__mode__centronics 1
+#define R_PAR0_STATUS_DATA__mode__fastbyte 2
+#define R_PAR0_STATUS_DATA__mode__nibble 3
+#define R_PAR0_STATUS_DATA__mode__byte 4
+#define R_PAR0_STATUS_DATA__mode__ecp_fwd 5
+#define R_PAR0_STATUS_DATA__mode__ecp_rev 6
+#define R_PAR0_STATUS_DATA__mode__off 7
+#define R_PAR0_STATUS_DATA__mode__epp_wr1 5
+#define R_PAR0_STATUS_DATA__mode__epp_wr2 6
+#define R_PAR0_STATUS_DATA__mode__epp_wr3 7
+#define R_PAR0_STATUS_DATA__mode__epp_rd 0
+#define R_PAR0_STATUS_DATA__perr__BITNR 28
+#define R_PAR0_STATUS_DATA__perr__WIDTH 1
+#define R_PAR0_STATUS_DATA__perr__active 1
+#define R_PAR0_STATUS_DATA__perr__inactive 0
+#define R_PAR0_STATUS_DATA__ack__BITNR 27
+#define R_PAR0_STATUS_DATA__ack__WIDTH 1
+#define R_PAR0_STATUS_DATA__ack__active 0
+#define R_PAR0_STATUS_DATA__ack__inactive 1
+#define R_PAR0_STATUS_DATA__busy__BITNR 26
+#define R_PAR0_STATUS_DATA__busy__WIDTH 1
+#define R_PAR0_STATUS_DATA__busy__active 1
+#define R_PAR0_STATUS_DATA__busy__inactive 0
+#define R_PAR0_STATUS_DATA__fault__BITNR 25
+#define R_PAR0_STATUS_DATA__fault__WIDTH 1
+#define R_PAR0_STATUS_DATA__fault__active 0
+#define R_PAR0_STATUS_DATA__fault__inactive 1
+#define R_PAR0_STATUS_DATA__sel__BITNR 24
+#define R_PAR0_STATUS_DATA__sel__WIDTH 1
+#define R_PAR0_STATUS_DATA__sel__active 1
+#define R_PAR0_STATUS_DATA__sel__inactive 0
+#define R_PAR0_STATUS_DATA__ext_mode__BITNR 23
+#define R_PAR0_STATUS_DATA__ext_mode__WIDTH 1
+#define R_PAR0_STATUS_DATA__ext_mode__enable 1
+#define R_PAR0_STATUS_DATA__ext_mode__disable 0
+#define R_PAR0_STATUS_DATA__ecp_16__BITNR 22
+#define R_PAR0_STATUS_DATA__ecp_16__WIDTH 1
+#define R_PAR0_STATUS_DATA__ecp_16__active 1
+#define R_PAR0_STATUS_DATA__ecp_16__inactive 0
+#define R_PAR0_STATUS_DATA__tr_rdy__BITNR 17
+#define R_PAR0_STATUS_DATA__tr_rdy__WIDTH 1
+#define R_PAR0_STATUS_DATA__tr_rdy__ready 1
+#define R_PAR0_STATUS_DATA__tr_rdy__busy 0
+#define R_PAR0_STATUS_DATA__dav__BITNR 16
+#define R_PAR0_STATUS_DATA__dav__WIDTH 1
+#define R_PAR0_STATUS_DATA__dav__data 1
+#define R_PAR0_STATUS_DATA__dav__nodata 0
+#define R_PAR0_STATUS_DATA__ecp_cmd__BITNR 8
+#define R_PAR0_STATUS_DATA__ecp_cmd__WIDTH 1
+#define R_PAR0_STATUS_DATA__ecp_cmd__command 1
+#define R_PAR0_STATUS_DATA__ecp_cmd__data 0
+#define R_PAR0_STATUS_DATA__data__BITNR 0
+#define R_PAR0_STATUS_DATA__data__WIDTH 8
+
+#define R_PAR0_STATUS (IO_TYPECAST_RO_UWORD 0xb0000042)
+#define R_PAR0_STATUS__mode__BITNR 13
+#define R_PAR0_STATUS__mode__WIDTH 3
+#define R_PAR0_STATUS__mode__manual 0
+#define R_PAR0_STATUS__mode__centronics 1
+#define R_PAR0_STATUS__mode__fastbyte 2
+#define R_PAR0_STATUS__mode__nibble 3
+#define R_PAR0_STATUS__mode__byte 4
+#define R_PAR0_STATUS__mode__ecp_fwd 5
+#define R_PAR0_STATUS__mode__ecp_rev 6
+#define R_PAR0_STATUS__mode__off 7
+#define R_PAR0_STATUS__mode__epp_wr1 5
+#define R_PAR0_STATUS__mode__epp_wr2 6
+#define R_PAR0_STATUS__mode__epp_wr3 7
+#define R_PAR0_STATUS__mode__epp_rd 0
+#define R_PAR0_STATUS__perr__BITNR 12
+#define R_PAR0_STATUS__perr__WIDTH 1
+#define R_PAR0_STATUS__perr__active 1
+#define R_PAR0_STATUS__perr__inactive 0
+#define R_PAR0_STATUS__ack__BITNR 11
+#define R_PAR0_STATUS__ack__WIDTH 1
+#define R_PAR0_STATUS__ack__active 0
+#define R_PAR0_STATUS__ack__inactive 1
+#define R_PAR0_STATUS__busy__BITNR 10
+#define R_PAR0_STATUS__busy__WIDTH 1
+#define R_PAR0_STATUS__busy__active 1
+#define R_PAR0_STATUS__busy__inactive 0
+#define R_PAR0_STATUS__fault__BITNR 9
+#define R_PAR0_STATUS__fault__WIDTH 1
+#define R_PAR0_STATUS__fault__active 0
+#define R_PAR0_STATUS__fault__inactive 1
+#define R_PAR0_STATUS__sel__BITNR 8
+#define R_PAR0_STATUS__sel__WIDTH 1
+#define R_PAR0_STATUS__sel__active 1
+#define R_PAR0_STATUS__sel__inactive 0
+#define R_PAR0_STATUS__ext_mode__BITNR 7
+#define R_PAR0_STATUS__ext_mode__WIDTH 1
+#define R_PAR0_STATUS__ext_mode__enable 1
+#define R_PAR0_STATUS__ext_mode__disable 0
+#define R_PAR0_STATUS__ecp_16__BITNR 6
+#define R_PAR0_STATUS__ecp_16__WIDTH 1
+#define R_PAR0_STATUS__ecp_16__active 1
+#define R_PAR0_STATUS__ecp_16__inactive 0
+#define R_PAR0_STATUS__tr_rdy__BITNR 1
+#define R_PAR0_STATUS__tr_rdy__WIDTH 1
+#define R_PAR0_STATUS__tr_rdy__ready 1
+#define R_PAR0_STATUS__tr_rdy__busy 0
+#define R_PAR0_STATUS__dav__BITNR 0
+#define R_PAR0_STATUS__dav__WIDTH 1
+#define R_PAR0_STATUS__dav__data 1
+#define R_PAR0_STATUS__dav__nodata 0
+
+#define R_PAR_ECP16_DATA (IO_TYPECAST_UWORD 0xb0000040)
+#define R_PAR_ECP16_DATA__data__BITNR 0
+#define R_PAR_ECP16_DATA__data__WIDTH 16
+
+#define R_PAR0_CONFIG (IO_TYPECAST_UDWORD 0xb0000044)
+#define R_PAR0_CONFIG__ioe__BITNR 25
+#define R_PAR0_CONFIG__ioe__WIDTH 1
+#define R_PAR0_CONFIG__ioe__inv 1
+#define R_PAR0_CONFIG__ioe__noninv 0
+#define R_PAR0_CONFIG__iseli__BITNR 24
+#define R_PAR0_CONFIG__iseli__WIDTH 1
+#define R_PAR0_CONFIG__iseli__inv 1
+#define R_PAR0_CONFIG__iseli__noninv 0
+#define R_PAR0_CONFIG__iautofd__BITNR 23
+#define R_PAR0_CONFIG__iautofd__WIDTH 1
+#define R_PAR0_CONFIG__iautofd__inv 1
+#define R_PAR0_CONFIG__iautofd__noninv 0
+#define R_PAR0_CONFIG__istrb__BITNR 22
+#define R_PAR0_CONFIG__istrb__WIDTH 1
+#define R_PAR0_CONFIG__istrb__inv 1
+#define R_PAR0_CONFIG__istrb__noninv 0
+#define R_PAR0_CONFIG__iinit__BITNR 21
+#define R_PAR0_CONFIG__iinit__WIDTH 1
+#define R_PAR0_CONFIG__iinit__inv 1
+#define R_PAR0_CONFIG__iinit__noninv 0
+#define R_PAR0_CONFIG__iperr__BITNR 20
+#define R_PAR0_CONFIG__iperr__WIDTH 1
+#define R_PAR0_CONFIG__iperr__inv 1
+#define R_PAR0_CONFIG__iperr__noninv 0
+#define R_PAR0_CONFIG__iack__BITNR 19
+#define R_PAR0_CONFIG__iack__WIDTH 1
+#define R_PAR0_CONFIG__iack__inv 1
+#define R_PAR0_CONFIG__iack__noninv 0
+#define R_PAR0_CONFIG__ibusy__BITNR 18
+#define R_PAR0_CONFIG__ibusy__WIDTH 1
+#define R_PAR0_CONFIG__ibusy__inv 1
+#define R_PAR0_CONFIG__ibusy__noninv 0
+#define R_PAR0_CONFIG__ifault__BITNR 17
+#define R_PAR0_CONFIG__ifault__WIDTH 1
+#define R_PAR0_CONFIG__ifault__inv 1
+#define R_PAR0_CONFIG__ifault__noninv 0
+#define R_PAR0_CONFIG__isel__BITNR 16
+#define R_PAR0_CONFIG__isel__WIDTH 1
+#define R_PAR0_CONFIG__isel__inv 1
+#define R_PAR0_CONFIG__isel__noninv 0
+#define R_PAR0_CONFIG__ext_mode__BITNR 11
+#define R_PAR0_CONFIG__ext_mode__WIDTH 1
+#define R_PAR0_CONFIG__ext_mode__enable 1
+#define R_PAR0_CONFIG__ext_mode__disable 0
+#define R_PAR0_CONFIG__wide__BITNR 10
+#define R_PAR0_CONFIG__wide__WIDTH 1
+#define R_PAR0_CONFIG__wide__enable 1
+#define R_PAR0_CONFIG__wide__disable 0
+#define R_PAR0_CONFIG__dma__BITNR 9
+#define R_PAR0_CONFIG__dma__WIDTH 1
+#define R_PAR0_CONFIG__dma__enable 1
+#define R_PAR0_CONFIG__dma__disable 0
+#define R_PAR0_CONFIG__rle_in__BITNR 8
+#define R_PAR0_CONFIG__rle_in__WIDTH 1
+#define R_PAR0_CONFIG__rle_in__enable 1
+#define R_PAR0_CONFIG__rle_in__disable 0
+#define R_PAR0_CONFIG__rle_out__BITNR 7
+#define R_PAR0_CONFIG__rle_out__WIDTH 1
+#define R_PAR0_CONFIG__rle_out__enable 1
+#define R_PAR0_CONFIG__rle_out__disable 0
+#define R_PAR0_CONFIG__enable__BITNR 6
+#define R_PAR0_CONFIG__enable__WIDTH 1
+#define R_PAR0_CONFIG__enable__on 1
+#define R_PAR0_CONFIG__enable__reset 0
+#define R_PAR0_CONFIG__force__BITNR 5
+#define R_PAR0_CONFIG__force__WIDTH 1
+#define R_PAR0_CONFIG__force__on 1
+#define R_PAR0_CONFIG__force__off 0
+#define R_PAR0_CONFIG__ign_ack__BITNR 4
+#define R_PAR0_CONFIG__ign_ack__WIDTH 1
+#define R_PAR0_CONFIG__ign_ack__ignore 1
+#define R_PAR0_CONFIG__ign_ack__wait 0
+#define R_PAR0_CONFIG__oe_ack__BITNR 3
+#define R_PAR0_CONFIG__oe_ack__WIDTH 1
+#define R_PAR0_CONFIG__oe_ack__wait_oe 1
+#define R_PAR0_CONFIG__oe_ack__dont_wait 0
+#define R_PAR0_CONFIG__oe_ack__epp_addr 1
+#define R_PAR0_CONFIG__oe_ack__epp_data 0
+#define R_PAR0_CONFIG__epp_addr_data__BITNR 3
+#define R_PAR0_CONFIG__epp_addr_data__WIDTH 1
+#define R_PAR0_CONFIG__epp_addr_data__wait_oe 1
+#define R_PAR0_CONFIG__epp_addr_data__dont_wait 0
+#define R_PAR0_CONFIG__epp_addr_data__epp_addr 1
+#define R_PAR0_CONFIG__epp_addr_data__epp_data 0
+#define R_PAR0_CONFIG__mode__BITNR 0
+#define R_PAR0_CONFIG__mode__WIDTH 3
+#define R_PAR0_CONFIG__mode__manual 0
+#define R_PAR0_CONFIG__mode__centronics 1
+#define R_PAR0_CONFIG__mode__fastbyte 2
+#define R_PAR0_CONFIG__mode__nibble 3
+#define R_PAR0_CONFIG__mode__byte 4
+#define R_PAR0_CONFIG__mode__ecp_fwd 5
+#define R_PAR0_CONFIG__mode__ecp_rev 6
+#define R_PAR0_CONFIG__mode__off 7
+#define R_PAR0_CONFIG__mode__epp_wr1 5
+#define R_PAR0_CONFIG__mode__epp_wr2 6
+#define R_PAR0_CONFIG__mode__epp_wr3 7
+#define R_PAR0_CONFIG__mode__epp_rd 0
+
+#define R_PAR0_DELAY (IO_TYPECAST_UDWORD 0xb0000048)
+#define R_PAR0_DELAY__fine_hold__BITNR 21
+#define R_PAR0_DELAY__fine_hold__WIDTH 3
+#define R_PAR0_DELAY__hold__BITNR 16
+#define R_PAR0_DELAY__hold__WIDTH 5
+#define R_PAR0_DELAY__fine_strb__BITNR 13
+#define R_PAR0_DELAY__fine_strb__WIDTH 3
+#define R_PAR0_DELAY__strobe__BITNR 8
+#define R_PAR0_DELAY__strobe__WIDTH 5
+#define R_PAR0_DELAY__fine_setup__BITNR 5
+#define R_PAR0_DELAY__fine_setup__WIDTH 3
+#define R_PAR0_DELAY__setup__BITNR 0
+#define R_PAR0_DELAY__setup__WIDTH 5
+
+#define R_PAR1_CTRL_DATA (IO_TYPECAST_UDWORD 0xb0000050)
+#define R_PAR1_CTRL_DATA__peri_int__BITNR 24
+#define R_PAR1_CTRL_DATA__peri_int__WIDTH 1
+#define R_PAR1_CTRL_DATA__peri_int__ack 1
+#define R_PAR1_CTRL_DATA__peri_int__nop 0
+#define R_PAR1_CTRL_DATA__oe__BITNR 20
+#define R_PAR1_CTRL_DATA__oe__WIDTH 1
+#define R_PAR1_CTRL_DATA__oe__enable 1
+#define R_PAR1_CTRL_DATA__oe__disable 0
+#define R_PAR1_CTRL_DATA__seli__BITNR 19
+#define R_PAR1_CTRL_DATA__seli__WIDTH 1
+#define R_PAR1_CTRL_DATA__seli__active 1
+#define R_PAR1_CTRL_DATA__seli__inactive 0
+#define R_PAR1_CTRL_DATA__autofd__BITNR 18
+#define R_PAR1_CTRL_DATA__autofd__WIDTH 1
+#define R_PAR1_CTRL_DATA__autofd__active 1
+#define R_PAR1_CTRL_DATA__autofd__inactive 0
+#define R_PAR1_CTRL_DATA__strb__BITNR 17
+#define R_PAR1_CTRL_DATA__strb__WIDTH 1
+#define R_PAR1_CTRL_DATA__strb__active 1
+#define R_PAR1_CTRL_DATA__strb__inactive 0
+#define R_PAR1_CTRL_DATA__init__BITNR 16
+#define R_PAR1_CTRL_DATA__init__WIDTH 1
+#define R_PAR1_CTRL_DATA__init__active 1
+#define R_PAR1_CTRL_DATA__init__inactive 0
+#define R_PAR1_CTRL_DATA__ecp_cmd__BITNR 8
+#define R_PAR1_CTRL_DATA__ecp_cmd__WIDTH 1
+#define R_PAR1_CTRL_DATA__ecp_cmd__command 1
+#define R_PAR1_CTRL_DATA__ecp_cmd__data 0
+#define R_PAR1_CTRL_DATA__data__BITNR 0
+#define R_PAR1_CTRL_DATA__data__WIDTH 8
+
+#define R_PAR1_CTRL (IO_TYPECAST_BYTE 0xb0000052)
+#define R_PAR1_CTRL__ctrl__BITNR 0
+#define R_PAR1_CTRL__ctrl__WIDTH 5
+
+#define R_PAR1_STATUS_DATA (IO_TYPECAST_RO_UDWORD 0xb0000050)
+#define R_PAR1_STATUS_DATA__mode__BITNR 29
+#define R_PAR1_STATUS_DATA__mode__WIDTH 3
+#define R_PAR1_STATUS_DATA__mode__manual 0
+#define R_PAR1_STATUS_DATA__mode__centronics 1
+#define R_PAR1_STATUS_DATA__mode__fastbyte 2
+#define R_PAR1_STATUS_DATA__mode__nibble 3
+#define R_PAR1_STATUS_DATA__mode__byte 4
+#define R_PAR1_STATUS_DATA__mode__ecp_fwd 5
+#define R_PAR1_STATUS_DATA__mode__ecp_rev 6
+#define R_PAR1_STATUS_DATA__mode__off 7
+#define R_PAR1_STATUS_DATA__mode__epp_wr1 5
+#define R_PAR1_STATUS_DATA__mode__epp_wr2 6
+#define R_PAR1_STATUS_DATA__mode__epp_wr3 7
+#define R_PAR1_STATUS_DATA__mode__epp_rd 0
+#define R_PAR1_STATUS_DATA__perr__BITNR 28
+#define R_PAR1_STATUS_DATA__perr__WIDTH 1
+#define R_PAR1_STATUS_DATA__perr__active 1
+#define R_PAR1_STATUS_DATA__perr__inactive 0
+#define R_PAR1_STATUS_DATA__ack__BITNR 27
+#define R_PAR1_STATUS_DATA__ack__WIDTH 1
+#define R_PAR1_STATUS_DATA__ack__active 0
+#define R_PAR1_STATUS_DATA__ack__inactive 1
+#define R_PAR1_STATUS_DATA__busy__BITNR 26
+#define R_PAR1_STATUS_DATA__busy__WIDTH 1
+#define R_PAR1_STATUS_DATA__busy__active 1
+#define R_PAR1_STATUS_DATA__busy__inactive 0
+#define R_PAR1_STATUS_DATA__fault__BITNR 25
+#define R_PAR1_STATUS_DATA__fault__WIDTH 1
+#define R_PAR1_STATUS_DATA__fault__active 0
+#define R_PAR1_STATUS_DATA__fault__inactive 1
+#define R_PAR1_STATUS_DATA__sel__BITNR 24
+#define R_PAR1_STATUS_DATA__sel__WIDTH 1
+#define R_PAR1_STATUS_DATA__sel__active 1
+#define R_PAR1_STATUS_DATA__sel__inactive 0
+#define R_PAR1_STATUS_DATA__ext_mode__BITNR 23
+#define R_PAR1_STATUS_DATA__ext_mode__WIDTH 1
+#define R_PAR1_STATUS_DATA__ext_mode__enable 1
+#define R_PAR1_STATUS_DATA__ext_mode__disable 0
+#define R_PAR1_STATUS_DATA__tr_rdy__BITNR 17
+#define R_PAR1_STATUS_DATA__tr_rdy__WIDTH 1
+#define R_PAR1_STATUS_DATA__tr_rdy__ready 1
+#define R_PAR1_STATUS_DATA__tr_rdy__busy 0
+#define R_PAR1_STATUS_DATA__dav__BITNR 16
+#define R_PAR1_STATUS_DATA__dav__WIDTH 1
+#define R_PAR1_STATUS_DATA__dav__data 1
+#define R_PAR1_STATUS_DATA__dav__nodata 0
+#define R_PAR1_STATUS_DATA__ecp_cmd__BITNR 8
+#define R_PAR1_STATUS_DATA__ecp_cmd__WIDTH 1
+#define R_PAR1_STATUS_DATA__ecp_cmd__command 1
+#define R_PAR1_STATUS_DATA__ecp_cmd__data 0
+#define R_PAR1_STATUS_DATA__data__BITNR 0
+#define R_PAR1_STATUS_DATA__data__WIDTH 8
+
+#define R_PAR1_STATUS (IO_TYPECAST_RO_UWORD 0xb0000052)
+#define R_PAR1_STATUS__mode__BITNR 13
+#define R_PAR1_STATUS__mode__WIDTH 3
+#define R_PAR1_STATUS__mode__manual 0
+#define R_PAR1_STATUS__mode__centronics 1
+#define R_PAR1_STATUS__mode__fastbyte 2
+#define R_PAR1_STATUS__mode__nibble 3
+#define R_PAR1_STATUS__mode__byte 4
+#define R_PAR1_STATUS__mode__ecp_fwd 5
+#define R_PAR1_STATUS__mode__ecp_rev 6
+#define R_PAR1_STATUS__mode__off 7
+#define R_PAR1_STATUS__mode__epp_wr1 5
+#define R_PAR1_STATUS__mode__epp_wr2 6
+#define R_PAR1_STATUS__mode__epp_wr3 7
+#define R_PAR1_STATUS__mode__epp_rd 0
+#define R_PAR1_STATUS__perr__BITNR 12
+#define R_PAR1_STATUS__perr__WIDTH 1
+#define R_PAR1_STATUS__perr__active 1
+#define R_PAR1_STATUS__perr__inactive 0
+#define R_PAR1_STATUS__ack__BITNR 11
+#define R_PAR1_STATUS__ack__WIDTH 1
+#define R_PAR1_STATUS__ack__active 0
+#define R_PAR1_STATUS__ack__inactive 1
+#define R_PAR1_STATUS__busy__BITNR 10
+#define R_PAR1_STATUS__busy__WIDTH 1
+#define R_PAR1_STATUS__busy__active 1
+#define R_PAR1_STATUS__busy__inactive 0
+#define R_PAR1_STATUS__fault__BITNR 9
+#define R_PAR1_STATUS__fault__WIDTH 1
+#define R_PAR1_STATUS__fault__active 0
+#define R_PAR1_STATUS__fault__inactive 1
+#define R_PAR1_STATUS__sel__BITNR 8
+#define R_PAR1_STATUS__sel__WIDTH 1
+#define R_PAR1_STATUS__sel__active 1
+#define R_PAR1_STATUS__sel__inactive 0
+#define R_PAR1_STATUS__ext_mode__BITNR 7
+#define R_PAR1_STATUS__ext_mode__WIDTH 1
+#define R_PAR1_STATUS__ext_mode__enable 1
+#define R_PAR1_STATUS__ext_mode__disable 0
+#define R_PAR1_STATUS__tr_rdy__BITNR 1
+#define R_PAR1_STATUS__tr_rdy__WIDTH 1
+#define R_PAR1_STATUS__tr_rdy__ready 1
+#define R_PAR1_STATUS__tr_rdy__busy 0
+#define R_PAR1_STATUS__dav__BITNR 0
+#define R_PAR1_STATUS__dav__WIDTH 1
+#define R_PAR1_STATUS__dav__data 1
+#define R_PAR1_STATUS__dav__nodata 0
+
+#define R_PAR1_CONFIG (IO_TYPECAST_UDWORD 0xb0000054)
+#define R_PAR1_CONFIG__ioe__BITNR 25
+#define R_PAR1_CONFIG__ioe__WIDTH 1
+#define R_PAR1_CONFIG__ioe__inv 1
+#define R_PAR1_CONFIG__ioe__noninv 0
+#define R_PAR1_CONFIG__iseli__BITNR 24
+#define R_PAR1_CONFIG__iseli__WIDTH 1
+#define R_PAR1_CONFIG__iseli__inv 1
+#define R_PAR1_CONFIG__iseli__noninv 0
+#define R_PAR1_CONFIG__iautofd__BITNR 23
+#define R_PAR1_CONFIG__iautofd__WIDTH 1
+#define R_PAR1_CONFIG__iautofd__inv 1
+#define R_PAR1_CONFIG__iautofd__noninv 0
+#define R_PAR1_CONFIG__istrb__BITNR 22
+#define R_PAR1_CONFIG__istrb__WIDTH 1
+#define R_PAR1_CONFIG__istrb__inv 1
+#define R_PAR1_CONFIG__istrb__noninv 0
+#define R_PAR1_CONFIG__iinit__BITNR 21
+#define R_PAR1_CONFIG__iinit__WIDTH 1
+#define R_PAR1_CONFIG__iinit__inv 1
+#define R_PAR1_CONFIG__iinit__noninv 0
+#define R_PAR1_CONFIG__iperr__BITNR 20
+#define R_PAR1_CONFIG__iperr__WIDTH 1
+#define R_PAR1_CONFIG__iperr__inv 1
+#define R_PAR1_CONFIG__iperr__noninv 0
+#define R_PAR1_CONFIG__iack__BITNR 19
+#define R_PAR1_CONFIG__iack__WIDTH 1
+#define R_PAR1_CONFIG__iack__inv 1
+#define R_PAR1_CONFIG__iack__noninv 0
+#define R_PAR1_CONFIG__ibusy__BITNR 18
+#define R_PAR1_CONFIG__ibusy__WIDTH 1
+#define R_PAR1_CONFIG__ibusy__inv 1
+#define R_PAR1_CONFIG__ibusy__noninv 0
+#define R_PAR1_CONFIG__ifault__BITNR 17
+#define R_PAR1_CONFIG__ifault__WIDTH 1
+#define R_PAR1_CONFIG__ifault__inv 1
+#define R_PAR1_CONFIG__ifault__noninv 0
+#define R_PAR1_CONFIG__isel__BITNR 16
+#define R_PAR1_CONFIG__isel__WIDTH 1
+#define R_PAR1_CONFIG__isel__inv 1
+#define R_PAR1_CONFIG__isel__noninv 0
+#define R_PAR1_CONFIG__ext_mode__BITNR 11
+#define R_PAR1_CONFIG__ext_mode__WIDTH 1
+#define R_PAR1_CONFIG__ext_mode__enable 1
+#define R_PAR1_CONFIG__ext_mode__disable 0
+#define R_PAR1_CONFIG__dma__BITNR 9
+#define R_PAR1_CONFIG__dma__WIDTH 1
+#define R_PAR1_CONFIG__dma__enable 1
+#define R_PAR1_CONFIG__dma__disable 0
+#define R_PAR1_CONFIG__rle_in__BITNR 8
+#define R_PAR1_CONFIG__rle_in__WIDTH 1
+#define R_PAR1_CONFIG__rle_in__enable 1
+#define R_PAR1_CONFIG__rle_in__disable 0
+#define R_PAR1_CONFIG__rle_out__BITNR 7
+#define R_PAR1_CONFIG__rle_out__WIDTH 1
+#define R_PAR1_CONFIG__rle_out__enable 1
+#define R_PAR1_CONFIG__rle_out__disable 0
+#define R_PAR1_CONFIG__enable__BITNR 6
+#define R_PAR1_CONFIG__enable__WIDTH 1
+#define R_PAR1_CONFIG__enable__on 1
+#define R_PAR1_CONFIG__enable__reset 0
+#define R_PAR1_CONFIG__force__BITNR 5
+#define R_PAR1_CONFIG__force__WIDTH 1
+#define R_PAR1_CONFIG__force__on 1
+#define R_PAR1_CONFIG__force__off 0
+#define R_PAR1_CONFIG__ign_ack__BITNR 4
+#define R_PAR1_CONFIG__ign_ack__WIDTH 1
+#define R_PAR1_CONFIG__ign_ack__ignore 1
+#define R_PAR1_CONFIG__ign_ack__wait 0
+#define R_PAR1_CONFIG__oe_ack__BITNR 3
+#define R_PAR1_CONFIG__oe_ack__WIDTH 1
+#define R_PAR1_CONFIG__oe_ack__wait_oe 1
+#define R_PAR1_CONFIG__oe_ack__dont_wait 0
+#define R_PAR1_CONFIG__oe_ack__epp_addr 1
+#define R_PAR1_CONFIG__oe_ack__epp_data 0
+#define R_PAR1_CONFIG__epp_addr_data__BITNR 3
+#define R_PAR1_CONFIG__epp_addr_data__WIDTH 1
+#define R_PAR1_CONFIG__epp_addr_data__wait_oe 1
+#define R_PAR1_CONFIG__epp_addr_data__dont_wait 0
+#define R_PAR1_CONFIG__epp_addr_data__epp_addr 1
+#define R_PAR1_CONFIG__epp_addr_data__epp_data 0
+#define R_PAR1_CONFIG__mode__BITNR 0
+#define R_PAR1_CONFIG__mode__WIDTH 3
+#define R_PAR1_CONFIG__mode__manual 0
+#define R_PAR1_CONFIG__mode__centronics 1
+#define R_PAR1_CONFIG__mode__fastbyte 2
+#define R_PAR1_CONFIG__mode__nibble 3
+#define R_PAR1_CONFIG__mode__byte 4
+#define R_PAR1_CONFIG__mode__ecp_fwd 5
+#define R_PAR1_CONFIG__mode__ecp_rev 6
+#define R_PAR1_CONFIG__mode__off 7
+#define R_PAR1_CONFIG__mode__epp_wr1 5
+#define R_PAR1_CONFIG__mode__epp_wr2 6
+#define R_PAR1_CONFIG__mode__epp_wr3 7
+#define R_PAR1_CONFIG__mode__epp_rd 0
+
+#define R_PAR1_DELAY (IO_TYPECAST_UDWORD 0xb0000058)
+#define R_PAR1_DELAY__fine_hold__BITNR 21
+#define R_PAR1_DELAY__fine_hold__WIDTH 3
+#define R_PAR1_DELAY__hold__BITNR 16
+#define R_PAR1_DELAY__hold__WIDTH 5
+#define R_PAR1_DELAY__fine_strb__BITNR 13
+#define R_PAR1_DELAY__fine_strb__WIDTH 3
+#define R_PAR1_DELAY__strobe__BITNR 8
+#define R_PAR1_DELAY__strobe__WIDTH 5
+#define R_PAR1_DELAY__fine_setup__BITNR 5
+#define R_PAR1_DELAY__fine_setup__WIDTH 3
+#define R_PAR1_DELAY__setup__BITNR 0
+#define R_PAR1_DELAY__setup__WIDTH 5
+
+/*
+!* ATA interface registers
+!*/
+
+#define R_ATA_CTRL_DATA (IO_TYPECAST_UDWORD 0xb0000040)
+#define R_ATA_CTRL_DATA__sel__BITNR 30
+#define R_ATA_CTRL_DATA__sel__WIDTH 2
+#define R_ATA_CTRL_DATA__cs1__BITNR 29
+#define R_ATA_CTRL_DATA__cs1__WIDTH 1
+#define R_ATA_CTRL_DATA__cs1__active 1
+#define R_ATA_CTRL_DATA__cs1__inactive 0
+#define R_ATA_CTRL_DATA__cs0__BITNR 28
+#define R_ATA_CTRL_DATA__cs0__WIDTH 1
+#define R_ATA_CTRL_DATA__cs0__active 1
+#define R_ATA_CTRL_DATA__cs0__inactive 0
+#define R_ATA_CTRL_DATA__addr__BITNR 25
+#define R_ATA_CTRL_DATA__addr__WIDTH 3
+#define R_ATA_CTRL_DATA__rw__BITNR 24
+#define R_ATA_CTRL_DATA__rw__WIDTH 1
+#define R_ATA_CTRL_DATA__rw__read 1
+#define R_ATA_CTRL_DATA__rw__write 0
+#define R_ATA_CTRL_DATA__src_dst__BITNR 23
+#define R_ATA_CTRL_DATA__src_dst__WIDTH 1
+#define R_ATA_CTRL_DATA__src_dst__dma 1
+#define R_ATA_CTRL_DATA__src_dst__register 0
+#define R_ATA_CTRL_DATA__handsh__BITNR 22
+#define R_ATA_CTRL_DATA__handsh__WIDTH 1
+#define R_ATA_CTRL_DATA__handsh__dma 1
+#define R_ATA_CTRL_DATA__handsh__pio 0
+#define R_ATA_CTRL_DATA__multi__BITNR 21
+#define R_ATA_CTRL_DATA__multi__WIDTH 1
+#define R_ATA_CTRL_DATA__multi__on 1
+#define R_ATA_CTRL_DATA__multi__off 0
+#define R_ATA_CTRL_DATA__dma_size__BITNR 20
+#define R_ATA_CTRL_DATA__dma_size__WIDTH 1
+#define R_ATA_CTRL_DATA__dma_size__byte 1
+#define R_ATA_CTRL_DATA__dma_size__word 0
+#define R_ATA_CTRL_DATA__data__BITNR 0
+#define R_ATA_CTRL_DATA__data__WIDTH 16
+
+#define R_ATA_STATUS_DATA (IO_TYPECAST_RO_UDWORD 0xb0000040)
+#define R_ATA_STATUS_DATA__busy__BITNR 18
+#define R_ATA_STATUS_DATA__busy__WIDTH 1
+#define R_ATA_STATUS_DATA__busy__yes 1
+#define R_ATA_STATUS_DATA__busy__no 0
+#define R_ATA_STATUS_DATA__tr_rdy__BITNR 17
+#define R_ATA_STATUS_DATA__tr_rdy__WIDTH 1
+#define R_ATA_STATUS_DATA__tr_rdy__ready 1
+#define R_ATA_STATUS_DATA__tr_rdy__busy 0
+#define R_ATA_STATUS_DATA__dav__BITNR 16
+#define R_ATA_STATUS_DATA__dav__WIDTH 1
+#define R_ATA_STATUS_DATA__dav__data 1
+#define R_ATA_STATUS_DATA__dav__nodata 0
+#define R_ATA_STATUS_DATA__data__BITNR 0
+#define R_ATA_STATUS_DATA__data__WIDTH 16
+
+#define R_ATA_CONFIG (IO_TYPECAST_UDWORD 0xb0000044)
+#define R_ATA_CONFIG__enable__BITNR 25
+#define R_ATA_CONFIG__enable__WIDTH 1
+#define R_ATA_CONFIG__enable__on 1
+#define R_ATA_CONFIG__enable__off 0
+#define R_ATA_CONFIG__dma_strobe__BITNR 20
+#define R_ATA_CONFIG__dma_strobe__WIDTH 5
+#define R_ATA_CONFIG__dma_hold__BITNR 15
+#define R_ATA_CONFIG__dma_hold__WIDTH 5
+#define R_ATA_CONFIG__pio_setup__BITNR 10
+#define R_ATA_CONFIG__pio_setup__WIDTH 5
+#define R_ATA_CONFIG__pio_strobe__BITNR 5
+#define R_ATA_CONFIG__pio_strobe__WIDTH 5
+#define R_ATA_CONFIG__pio_hold__BITNR 0
+#define R_ATA_CONFIG__pio_hold__WIDTH 5
+
+#define R_ATA_TRANSFER_CNT (IO_TYPECAST_UDWORD 0xb0000048)
+#define R_ATA_TRANSFER_CNT__count__BITNR 0
+#define R_ATA_TRANSFER_CNT__count__WIDTH 17
+
+/*
+!* SCSI registers
+!*/
+
+#define R_SCSI0_CTRL (IO_TYPECAST_UDWORD 0xb0000044)
+#define R_SCSI0_CTRL__id_type__BITNR 31
+#define R_SCSI0_CTRL__id_type__WIDTH 1
+#define R_SCSI0_CTRL__id_type__software 1
+#define R_SCSI0_CTRL__id_type__hardware 0
+#define R_SCSI0_CTRL__sel_timeout__BITNR 24
+#define R_SCSI0_CTRL__sel_timeout__WIDTH 7
+#define R_SCSI0_CTRL__synch_per__BITNR 16
+#define R_SCSI0_CTRL__synch_per__WIDTH 8
+#define R_SCSI0_CTRL__rst__BITNR 15
+#define R_SCSI0_CTRL__rst__WIDTH 1
+#define R_SCSI0_CTRL__rst__yes 1
+#define R_SCSI0_CTRL__rst__no 0
+#define R_SCSI0_CTRL__atn__BITNR 14
+#define R_SCSI0_CTRL__atn__WIDTH 1
+#define R_SCSI0_CTRL__atn__yes 1
+#define R_SCSI0_CTRL__atn__no 0
+#define R_SCSI0_CTRL__my_id__BITNR 9
+#define R_SCSI0_CTRL__my_id__WIDTH 4
+#define R_SCSI0_CTRL__target_id__BITNR 4
+#define R_SCSI0_CTRL__target_id__WIDTH 4
+#define R_SCSI0_CTRL__fast_20__BITNR 3
+#define R_SCSI0_CTRL__fast_20__WIDTH 1
+#define R_SCSI0_CTRL__fast_20__yes 1
+#define R_SCSI0_CTRL__fast_20__no 0
+#define R_SCSI0_CTRL__bus_width__BITNR 2
+#define R_SCSI0_CTRL__bus_width__WIDTH 1
+#define R_SCSI0_CTRL__bus_width__wide 1
+#define R_SCSI0_CTRL__bus_width__narrow 0
+#define R_SCSI0_CTRL__synch__BITNR 1
+#define R_SCSI0_CTRL__synch__WIDTH 1
+#define R_SCSI0_CTRL__synch__synch 1
+#define R_SCSI0_CTRL__synch__asynch 0
+#define R_SCSI0_CTRL__enable__BITNR 0
+#define R_SCSI0_CTRL__enable__WIDTH 1
+#define R_SCSI0_CTRL__enable__on 1
+#define R_SCSI0_CTRL__enable__off 0
+
+#define R_SCSI0_CMD_DATA (IO_TYPECAST_UDWORD 0xb0000040)
+#define R_SCSI0_CMD_DATA__parity_in__BITNR 26
+#define R_SCSI0_CMD_DATA__parity_in__WIDTH 1
+#define R_SCSI0_CMD_DATA__parity_in__on 0
+#define R_SCSI0_CMD_DATA__parity_in__off 1
+#define R_SCSI0_CMD_DATA__skip__BITNR 25
+#define R_SCSI0_CMD_DATA__skip__WIDTH 1
+#define R_SCSI0_CMD_DATA__skip__on 1
+#define R_SCSI0_CMD_DATA__skip__off 0
+#define R_SCSI0_CMD_DATA__clr_status__BITNR 24
+#define R_SCSI0_CMD_DATA__clr_status__WIDTH 1
+#define R_SCSI0_CMD_DATA__clr_status__yes 1
+#define R_SCSI0_CMD_DATA__clr_status__nop 0
+#define R_SCSI0_CMD_DATA__asynch_setup__BITNR 20
+#define R_SCSI0_CMD_DATA__asynch_setup__WIDTH 4
+#define R_SCSI0_CMD_DATA__command__BITNR 16
+#define R_SCSI0_CMD_DATA__command__WIDTH 4
+#define R_SCSI0_CMD_DATA__command__full_din_1 0
+#define R_SCSI0_CMD_DATA__command__full_dout_1 1
+#define R_SCSI0_CMD_DATA__command__full_stat_1 2
+#define R_SCSI0_CMD_DATA__command__resel_din 3
+#define R_SCSI0_CMD_DATA__command__resel_dout 4
+#define R_SCSI0_CMD_DATA__command__resel_stat 5
+#define R_SCSI0_CMD_DATA__command__arb_only 6
+#define R_SCSI0_CMD_DATA__command__full_din_3 8
+#define R_SCSI0_CMD_DATA__command__full_dout_3 9
+#define R_SCSI0_CMD_DATA__command__full_stat_3 10
+#define R_SCSI0_CMD_DATA__command__man_data_in 11
+#define R_SCSI0_CMD_DATA__command__man_data_out 12
+#define R_SCSI0_CMD_DATA__command__man_rat 13
+#define R_SCSI0_CMD_DATA__data_out__BITNR 0
+#define R_SCSI0_CMD_DATA__data_out__WIDTH 16
+
+#define R_SCSI0_DATA (IO_TYPECAST_UWORD 0xb0000040)
+#define R_SCSI0_DATA__data_out__BITNR 0
+#define R_SCSI0_DATA__data_out__WIDTH 16
+
+#define R_SCSI0_CMD (IO_TYPECAST_BYTE 0xb0000042)
+#define R_SCSI0_CMD__asynch_setup__BITNR 4
+#define R_SCSI0_CMD__asynch_setup__WIDTH 4
+#define R_SCSI0_CMD__command__BITNR 0
+#define R_SCSI0_CMD__command__WIDTH 4
+#define R_SCSI0_CMD__command__full_din_1 0
+#define R_SCSI0_CMD__command__full_dout_1 1
+#define R_SCSI0_CMD__command__full_stat_1 2
+#define R_SCSI0_CMD__command__resel_din 3
+#define R_SCSI0_CMD__command__resel_dout 4
+#define R_SCSI0_CMD__command__resel_stat 5
+#define R_SCSI0_CMD__command__arb_only 6
+#define R_SCSI0_CMD__command__full_din_3 8
+#define R_SCSI0_CMD__command__full_dout_3 9
+#define R_SCSI0_CMD__command__full_stat_3 10
+#define R_SCSI0_CMD__command__man_data_in 11
+#define R_SCSI0_CMD__command__man_data_out 12
+#define R_SCSI0_CMD__command__man_rat 13
+
+#define R_SCSI0_STATUS_CTRL (IO_TYPECAST_BYTE 0xb0000043)
+#define R_SCSI0_STATUS_CTRL__parity_in__BITNR 2
+#define R_SCSI0_STATUS_CTRL__parity_in__WIDTH 1
+#define R_SCSI0_STATUS_CTRL__parity_in__on 0
+#define R_SCSI0_STATUS_CTRL__parity_in__off 1
+#define R_SCSI0_STATUS_CTRL__skip__BITNR 1
+#define R_SCSI0_STATUS_CTRL__skip__WIDTH 1
+#define R_SCSI0_STATUS_CTRL__skip__on 1
+#define R_SCSI0_STATUS_CTRL__skip__off 0
+#define R_SCSI0_STATUS_CTRL__clr_status__BITNR 0
+#define R_SCSI0_STATUS_CTRL__clr_status__WIDTH 1
+#define R_SCSI0_STATUS_CTRL__clr_status__yes 1
+#define R_SCSI0_STATUS_CTRL__clr_status__nop 0
+
+#define R_SCSI0_STATUS (IO_TYPECAST_RO_UDWORD 0xb0000048)
+#define R_SCSI0_STATUS__tst_arb_won__BITNR 23
+#define R_SCSI0_STATUS__tst_arb_won__WIDTH 1
+#define R_SCSI0_STATUS__tst_resel__BITNR 22
+#define R_SCSI0_STATUS__tst_resel__WIDTH 1
+#define R_SCSI0_STATUS__parity_error__BITNR 21
+#define R_SCSI0_STATUS__parity_error__WIDTH 1
+#define R_SCSI0_STATUS__bus_reset__BITNR 20
+#define R_SCSI0_STATUS__bus_reset__WIDTH 1
+#define R_SCSI0_STATUS__bus_reset__yes 1
+#define R_SCSI0_STATUS__bus_reset__no 0
+#define R_SCSI0_STATUS__resel_target__BITNR 15
+#define R_SCSI0_STATUS__resel_target__WIDTH 4
+#define R_SCSI0_STATUS__resel__BITNR 14
+#define R_SCSI0_STATUS__resel__WIDTH 1
+#define R_SCSI0_STATUS__resel__yes 1
+#define R_SCSI0_STATUS__resel__no 0
+#define R_SCSI0_STATUS__curr_phase__BITNR 11
+#define R_SCSI0_STATUS__curr_phase__WIDTH 3
+#define R_SCSI0_STATUS__curr_phase__ph_undef 0
+#define R_SCSI0_STATUS__curr_phase__ph_msg_in 7
+#define R_SCSI0_STATUS__curr_phase__ph_msg_out 6
+#define R_SCSI0_STATUS__curr_phase__ph_status 3
+#define R_SCSI0_STATUS__curr_phase__ph_command 2
+#define R_SCSI0_STATUS__curr_phase__ph_data_in 5
+#define R_SCSI0_STATUS__curr_phase__ph_data_out 4
+#define R_SCSI0_STATUS__curr_phase__ph_resel 1
+#define R_SCSI0_STATUS__last_seq_step__BITNR 6
+#define R_SCSI0_STATUS__last_seq_step__WIDTH 5
+#define R_SCSI0_STATUS__last_seq_step__st_bus_free 24
+#define R_SCSI0_STATUS__last_seq_step__st_arbitrate 8
+#define R_SCSI0_STATUS__last_seq_step__st_resel_req 29
+#define R_SCSI0_STATUS__last_seq_step__st_msg_1 2
+#define R_SCSI0_STATUS__last_seq_step__st_manual 28
+#define R_SCSI0_STATUS__last_seq_step__st_transf_cmd 30
+#define R_SCSI0_STATUS__last_seq_step__st_msg_2 6
+#define R_SCSI0_STATUS__last_seq_step__st_msg_3 22
+#define R_SCSI0_STATUS__last_seq_step__st_answer 3
+#define R_SCSI0_STATUS__last_seq_step__st_synch_din_perr 1
+#define R_SCSI0_STATUS__last_seq_step__st_transfer_done 15
+#define R_SCSI0_STATUS__last_seq_step__st_synch_dout 0
+#define R_SCSI0_STATUS__last_seq_step__st_asynch_dout 25
+#define R_SCSI0_STATUS__last_seq_step__st_synch_din 13
+#define R_SCSI0_STATUS__last_seq_step__st_asynch_din 9
+#define R_SCSI0_STATUS__last_seq_step__st_synch_dout_ack 4
+#define R_SCSI0_STATUS__last_seq_step__st_synch_din_ack 12
+#define R_SCSI0_STATUS__last_seq_step__st_synch_din_ack_perr 5
+#define R_SCSI0_STATUS__last_seq_step__st_asynch_dout_end 11
+#define R_SCSI0_STATUS__last_seq_step__st_iwr 27
+#define R_SCSI0_STATUS__last_seq_step__st_wait_free_disc 21
+#define R_SCSI0_STATUS__last_seq_step__st_sdp_disc 7
+#define R_SCSI0_STATUS__last_seq_step__st_cc 31
+#define R_SCSI0_STATUS__last_seq_step__st_iwr_good 14
+#define R_SCSI0_STATUS__last_seq_step__st_iwr_cc 23
+#define R_SCSI0_STATUS__last_seq_step__st_wait_free_iwr_cc 17
+#define R_SCSI0_STATUS__last_seq_step__st_wait_free_cc 20
+#define R_SCSI0_STATUS__last_seq_step__st_wait_free_sdp_disc 16
+#define R_SCSI0_STATUS__last_seq_step__st_manual_req 10
+#define R_SCSI0_STATUS__last_seq_step__st_manual_din_prot 18
+#define R_SCSI0_STATUS__valid_status__BITNR 5
+#define R_SCSI0_STATUS__valid_status__WIDTH 1
+#define R_SCSI0_STATUS__valid_status__yes 1
+#define R_SCSI0_STATUS__valid_status__no 0
+#define R_SCSI0_STATUS__seq_status__BITNR 0
+#define R_SCSI0_STATUS__seq_status__WIDTH 5
+#define R_SCSI0_STATUS__seq_status__info_seq_complete 0
+#define R_SCSI0_STATUS__seq_status__info_parity_error 1
+#define R_SCSI0_STATUS__seq_status__info_unhandled_msg_in 2
+#define R_SCSI0_STATUS__seq_status__info_unexp_ph_change 3
+#define R_SCSI0_STATUS__seq_status__info_arb_lost 4
+#define R_SCSI0_STATUS__seq_status__info_sel_timeout 5
+#define R_SCSI0_STATUS__seq_status__info_unexp_bf 6
+#define R_SCSI0_STATUS__seq_status__info_illegal_op 7
+#define R_SCSI0_STATUS__seq_status__info_rec_recvd 8
+#define R_SCSI0_STATUS__seq_status__info_reselected 9
+#define R_SCSI0_STATUS__seq_status__info_unhandled_status 10
+#define R_SCSI0_STATUS__seq_status__info_bus_reset 11
+#define R_SCSI0_STATUS__seq_status__info_illegal_bf 12
+#define R_SCSI0_STATUS__seq_status__info_bus_free 13
+
+#define R_SCSI0_DATA_IN (IO_TYPECAST_RO_UWORD 0xb0000040)
+#define R_SCSI0_DATA_IN__data_in__BITNR 0
+#define R_SCSI0_DATA_IN__data_in__WIDTH 16
+
+#define R_SCSI1_CTRL (IO_TYPECAST_UDWORD 0xb0000054)
+#define R_SCSI1_CTRL__id_type__BITNR 31
+#define R_SCSI1_CTRL__id_type__WIDTH 1
+#define R_SCSI1_CTRL__id_type__software 1
+#define R_SCSI1_CTRL__id_type__hardware 0
+#define R_SCSI1_CTRL__sel_timeout__BITNR 24
+#define R_SCSI1_CTRL__sel_timeout__WIDTH 7
+#define R_SCSI1_CTRL__synch_per__BITNR 16
+#define R_SCSI1_CTRL__synch_per__WIDTH 8
+#define R_SCSI1_CTRL__rst__BITNR 15
+#define R_SCSI1_CTRL__rst__WIDTH 1
+#define R_SCSI1_CTRL__rst__yes 1
+#define R_SCSI1_CTRL__rst__no 0
+#define R_SCSI1_CTRL__atn__BITNR 14
+#define R_SCSI1_CTRL__atn__WIDTH 1
+#define R_SCSI1_CTRL__atn__yes 1
+#define R_SCSI1_CTRL__atn__no 0
+#define R_SCSI1_CTRL__my_id__BITNR 9
+#define R_SCSI1_CTRL__my_id__WIDTH 4
+#define R_SCSI1_CTRL__target_id__BITNR 4
+#define R_SCSI1_CTRL__target_id__WIDTH 4
+#define R_SCSI1_CTRL__fast_20__BITNR 3
+#define R_SCSI1_CTRL__fast_20__WIDTH 1
+#define R_SCSI1_CTRL__fast_20__yes 1
+#define R_SCSI1_CTRL__fast_20__no 0
+#define R_SCSI1_CTRL__bus_width__BITNR 2
+#define R_SCSI1_CTRL__bus_width__WIDTH 1
+#define R_SCSI1_CTRL__bus_width__wide 1
+#define R_SCSI1_CTRL__bus_width__narrow 0
+#define R_SCSI1_CTRL__synch__BITNR 1
+#define R_SCSI1_CTRL__synch__WIDTH 1
+#define R_SCSI1_CTRL__synch__synch 1
+#define R_SCSI1_CTRL__synch__asynch 0
+#define R_SCSI1_CTRL__enable__BITNR 0
+#define R_SCSI1_CTRL__enable__WIDTH 1
+#define R_SCSI1_CTRL__enable__on 1
+#define R_SCSI1_CTRL__enable__off 0
+
+#define R_SCSI1_CMD_DATA (IO_TYPECAST_UDWORD 0xb0000050)
+#define R_SCSI1_CMD_DATA__parity_in__BITNR 26
+#define R_SCSI1_CMD_DATA__parity_in__WIDTH 1
+#define R_SCSI1_CMD_DATA__parity_in__on 0
+#define R_SCSI1_CMD_DATA__parity_in__off 1
+#define R_SCSI1_CMD_DATA__skip__BITNR 25
+#define R_SCSI1_CMD_DATA__skip__WIDTH 1
+#define R_SCSI1_CMD_DATA__skip__on 1
+#define R_SCSI1_CMD_DATA__skip__off 0
+#define R_SCSI1_CMD_DATA__clr_status__BITNR 24
+#define R_SCSI1_CMD_DATA__clr_status__WIDTH 1
+#define R_SCSI1_CMD_DATA__clr_status__yes 1
+#define R_SCSI1_CMD_DATA__clr_status__nop 0
+#define R_SCSI1_CMD_DATA__asynch_setup__BITNR 20
+#define R_SCSI1_CMD_DATA__asynch_setup__WIDTH 4
+#define R_SCSI1_CMD_DATA__command__BITNR 16
+#define R_SCSI1_CMD_DATA__command__WIDTH 4
+#define R_SCSI1_CMD_DATA__command__full_din_1 0
+#define R_SCSI1_CMD_DATA__command__full_dout_1 1
+#define R_SCSI1_CMD_DATA__command__full_stat_1 2
+#define R_SCSI1_CMD_DATA__command__resel_din 3
+#define R_SCSI1_CMD_DATA__command__resel_dout 4
+#define R_SCSI1_CMD_DATA__command__resel_stat 5
+#define R_SCSI1_CMD_DATA__command__arb_only 6
+#define R_SCSI1_CMD_DATA__command__full_din_3 8
+#define R_SCSI1_CMD_DATA__command__full_dout_3 9
+#define R_SCSI1_CMD_DATA__command__full_stat_3 10
+#define R_SCSI1_CMD_DATA__command__man_data_in 11
+#define R_SCSI1_CMD_DATA__command__man_data_out 12
+#define R_SCSI1_CMD_DATA__command__man_rat 13
+#define R_SCSI1_CMD_DATA__data_out__BITNR 0
+#define R_SCSI1_CMD_DATA__data_out__WIDTH 16
+
+#define R_SCSI1_DATA (IO_TYPECAST_UWORD 0xb0000050)
+#define R_SCSI1_DATA__data_out__BITNR 0
+#define R_SCSI1_DATA__data_out__WIDTH 16
+
+#define R_SCSI1_CMD (IO_TYPECAST_BYTE 0xb0000052)
+#define R_SCSI1_CMD__asynch_setup__BITNR 4
+#define R_SCSI1_CMD__asynch_setup__WIDTH 4
+#define R_SCSI1_CMD__command__BITNR 0
+#define R_SCSI1_CMD__command__WIDTH 4
+#define R_SCSI1_CMD__command__full_din_1 0
+#define R_SCSI1_CMD__command__full_dout_1 1
+#define R_SCSI1_CMD__command__full_stat_1 2
+#define R_SCSI1_CMD__command__resel_din 3
+#define R_SCSI1_CMD__command__resel_dout 4
+#define R_SCSI1_CMD__command__resel_stat 5
+#define R_SCSI1_CMD__command__arb_only 6
+#define R_SCSI1_CMD__command__full_din_3 8
+#define R_SCSI1_CMD__command__full_dout_3 9
+#define R_SCSI1_CMD__command__full_stat_3 10
+#define R_SCSI1_CMD__command__man_data_in 11
+#define R_SCSI1_CMD__command__man_data_out 12
+#define R_SCSI1_CMD__command__man_rat 13
+
+#define R_SCSI1_STATUS_CTRL (IO_TYPECAST_BYTE 0xb0000053)
+#define R_SCSI1_STATUS_CTRL__parity_in__BITNR 2
+#define R_SCSI1_STATUS_CTRL__parity_in__WIDTH 1
+#define R_SCSI1_STATUS_CTRL__parity_in__on 0
+#define R_SCSI1_STATUS_CTRL__parity_in__off 1
+#define R_SCSI1_STATUS_CTRL__skip__BITNR 1
+#define R_SCSI1_STATUS_CTRL__skip__WIDTH 1
+#define R_SCSI1_STATUS_CTRL__skip__on 1
+#define R_SCSI1_STATUS_CTRL__skip__off 0
+#define R_SCSI1_STATUS_CTRL__clr_status__BITNR 0
+#define R_SCSI1_STATUS_CTRL__clr_status__WIDTH 1
+#define R_SCSI1_STATUS_CTRL__clr_status__yes 1
+#define R_SCSI1_STATUS_CTRL__clr_status__nop 0
+
+#define R_SCSI1_STATUS (IO_TYPECAST_RO_UDWORD 0xb0000058)
+#define R_SCSI1_STATUS__tst_arb_won__BITNR 23
+#define R_SCSI1_STATUS__tst_arb_won__WIDTH 1
+#define R_SCSI1_STATUS__tst_resel__BITNR 22
+#define R_SCSI1_STATUS__tst_resel__WIDTH 1
+#define R_SCSI1_STATUS__parity_error__BITNR 21
+#define R_SCSI1_STATUS__parity_error__WIDTH 1
+#define R_SCSI1_STATUS__bus_reset__BITNR 20
+#define R_SCSI1_STATUS__bus_reset__WIDTH 1
+#define R_SCSI1_STATUS__bus_reset__yes 1
+#define R_SCSI1_STATUS__bus_reset__no 0
+#define R_SCSI1_STATUS__resel_target__BITNR 15
+#define R_SCSI1_STATUS__resel_target__WIDTH 4
+#define R_SCSI1_STATUS__resel__BITNR 14
+#define R_SCSI1_STATUS__resel__WIDTH 1
+#define R_SCSI1_STATUS__resel__yes 1
+#define R_SCSI1_STATUS__resel__no 0
+#define R_SCSI1_STATUS__curr_phase__BITNR 11
+#define R_SCSI1_STATUS__curr_phase__WIDTH 3
+#define R_SCSI1_STATUS__curr_phase__ph_undef 0
+#define R_SCSI1_STATUS__curr_phase__ph_msg_in 7
+#define R_SCSI1_STATUS__curr_phase__ph_msg_out 6
+#define R_SCSI1_STATUS__curr_phase__ph_status 3
+#define R_SCSI1_STATUS__curr_phase__ph_command 2
+#define R_SCSI1_STATUS__curr_phase__ph_data_in 5
+#define R_SCSI1_STATUS__curr_phase__ph_data_out 4
+#define R_SCSI1_STATUS__curr_phase__ph_resel 1
+#define R_SCSI1_STATUS__last_seq_step__BITNR 6
+#define R_SCSI1_STATUS__last_seq_step__WIDTH 5
+#define R_SCSI1_STATUS__last_seq_step__st_bus_free 24
+#define R_SCSI1_STATUS__last_seq_step__st_arbitrate 8
+#define R_SCSI1_STATUS__last_seq_step__st_resel_req 29
+#define R_SCSI1_STATUS__last_seq_step__st_msg_1 2
+#define R_SCSI1_STATUS__last_seq_step__st_manual 28
+#define R_SCSI1_STATUS__last_seq_step__st_transf_cmd 30
+#define R_SCSI1_STATUS__last_seq_step__st_msg_2 6
+#define R_SCSI1_STATUS__last_seq_step__st_msg_3 22
+#define R_SCSI1_STATUS__last_seq_step__st_answer 3
+#define R_SCSI1_STATUS__last_seq_step__st_synch_din_perr 1
+#define R_SCSI1_STATUS__last_seq_step__st_transfer_done 15
+#define R_SCSI1_STATUS__last_seq_step__st_synch_dout 0
+#define R_SCSI1_STATUS__last_seq_step__st_asynch_dout 25
+#define R_SCSI1_STATUS__last_seq_step__st_synch_din 13
+#define R_SCSI1_STATUS__last_seq_step__st_asynch_din 9
+#define R_SCSI1_STATUS__last_seq_step__st_synch_dout_ack 4
+#define R_SCSI1_STATUS__last_seq_step__st_synch_din_ack 12
+#define R_SCSI1_STATUS__last_seq_step__st_synch_din_ack_perr 5
+#define R_SCSI1_STATUS__last_seq_step__st_asynch_dout_end 11
+#define R_SCSI1_STATUS__last_seq_step__st_iwr 27
+#define R_SCSI1_STATUS__last_seq_step__st_wait_free_disc 21
+#define R_SCSI1_STATUS__last_seq_step__st_sdp_disc 7
+#define R_SCSI1_STATUS__last_seq_step__st_cc 31
+#define R_SCSI1_STATUS__last_seq_step__st_iwr_good 14
+#define R_SCSI1_STATUS__last_seq_step__st_iwr_cc 23
+#define R_SCSI1_STATUS__last_seq_step__st_wait_free_iwr_cc 17
+#define R_SCSI1_STATUS__last_seq_step__st_wait_free_cc 20
+#define R_SCSI1_STATUS__last_seq_step__st_wait_free_sdp_disc 16
+#define R_SCSI1_STATUS__last_seq_step__st_manual_req 10
+#define R_SCSI1_STATUS__last_seq_step__st_manual_din_prot 18
+#define R_SCSI1_STATUS__valid_status__BITNR 5
+#define R_SCSI1_STATUS__valid_status__WIDTH 1
+#define R_SCSI1_STATUS__valid_status__yes 1
+#define R_SCSI1_STATUS__valid_status__no 0
+#define R_SCSI1_STATUS__seq_status__BITNR 0
+#define R_SCSI1_STATUS__seq_status__WIDTH 5
+#define R_SCSI1_STATUS__seq_status__info_seq_complete 0
+#define R_SCSI1_STATUS__seq_status__info_parity_error 1
+#define R_SCSI1_STATUS__seq_status__info_unhandled_msg_in 2
+#define R_SCSI1_STATUS__seq_status__info_unexp_ph_change 3
+#define R_SCSI1_STATUS__seq_status__info_arb_lost 4
+#define R_SCSI1_STATUS__seq_status__info_sel_timeout 5
+#define R_SCSI1_STATUS__seq_status__info_unexp_bf 6
+#define R_SCSI1_STATUS__seq_status__info_illegal_op 7
+#define R_SCSI1_STATUS__seq_status__info_rec_recvd 8
+#define R_SCSI1_STATUS__seq_status__info_reselected 9
+#define R_SCSI1_STATUS__seq_status__info_unhandled_status 10
+#define R_SCSI1_STATUS__seq_status__info_bus_reset 11
+#define R_SCSI1_STATUS__seq_status__info_illegal_bf 12
+#define R_SCSI1_STATUS__seq_status__info_bus_free 13
+
+#define R_SCSI1_DATA_IN (IO_TYPECAST_RO_UWORD 0xb0000050)
+#define R_SCSI1_DATA_IN__data_in__BITNR 0
+#define R_SCSI1_DATA_IN__data_in__WIDTH 16
+
+/*
+!* Interrupt mask and status registers
+!*/
+
+#define R_IRQ_MASK0_RD (IO_TYPECAST_RO_UDWORD 0xb00000c0)
+#define R_IRQ_MASK0_RD__nmi_pin__BITNR 31
+#define R_IRQ_MASK0_RD__nmi_pin__WIDTH 1
+#define R_IRQ_MASK0_RD__nmi_pin__active 1
+#define R_IRQ_MASK0_RD__nmi_pin__inactive 0
+#define R_IRQ_MASK0_RD__watchdog_nmi__BITNR 30
+#define R_IRQ_MASK0_RD__watchdog_nmi__WIDTH 1
+#define R_IRQ_MASK0_RD__watchdog_nmi__active 1
+#define R_IRQ_MASK0_RD__watchdog_nmi__inactive 0
+#define R_IRQ_MASK0_RD__sqe_test_error__BITNR 29
+#define R_IRQ_MASK0_RD__sqe_test_error__WIDTH 1
+#define R_IRQ_MASK0_RD__sqe_test_error__active 1
+#define R_IRQ_MASK0_RD__sqe_test_error__inactive 0
+#define R_IRQ_MASK0_RD__carrier_loss__BITNR 28
+#define R_IRQ_MASK0_RD__carrier_loss__WIDTH 1
+#define R_IRQ_MASK0_RD__carrier_loss__active 1
+#define R_IRQ_MASK0_RD__carrier_loss__inactive 0
+#define R_IRQ_MASK0_RD__deferred__BITNR 27
+#define R_IRQ_MASK0_RD__deferred__WIDTH 1
+#define R_IRQ_MASK0_RD__deferred__active 1
+#define R_IRQ_MASK0_RD__deferred__inactive 0
+#define R_IRQ_MASK0_RD__late_col__BITNR 26
+#define R_IRQ_MASK0_RD__late_col__WIDTH 1
+#define R_IRQ_MASK0_RD__late_col__active 1
+#define R_IRQ_MASK0_RD__late_col__inactive 0
+#define R_IRQ_MASK0_RD__multiple_col__BITNR 25
+#define R_IRQ_MASK0_RD__multiple_col__WIDTH 1
+#define R_IRQ_MASK0_RD__multiple_col__active 1
+#define R_IRQ_MASK0_RD__multiple_col__inactive 0
+#define R_IRQ_MASK0_RD__single_col__BITNR 24
+#define R_IRQ_MASK0_RD__single_col__WIDTH 1
+#define R_IRQ_MASK0_RD__single_col__active 1
+#define R_IRQ_MASK0_RD__single_col__inactive 0
+#define R_IRQ_MASK0_RD__congestion__BITNR 23
+#define R_IRQ_MASK0_RD__congestion__WIDTH 1
+#define R_IRQ_MASK0_RD__congestion__active 1
+#define R_IRQ_MASK0_RD__congestion__inactive 0
+#define R_IRQ_MASK0_RD__oversize__BITNR 22
+#define R_IRQ_MASK0_RD__oversize__WIDTH 1
+#define R_IRQ_MASK0_RD__oversize__active 1
+#define R_IRQ_MASK0_RD__oversize__inactive 0
+#define R_IRQ_MASK0_RD__alignment_error__BITNR 21
+#define R_IRQ_MASK0_RD__alignment_error__WIDTH 1
+#define R_IRQ_MASK0_RD__alignment_error__active 1
+#define R_IRQ_MASK0_RD__alignment_error__inactive 0
+#define R_IRQ_MASK0_RD__crc_error__BITNR 20
+#define R_IRQ_MASK0_RD__crc_error__WIDTH 1
+#define R_IRQ_MASK0_RD__crc_error__active 1
+#define R_IRQ_MASK0_RD__crc_error__inactive 0
+#define R_IRQ_MASK0_RD__overrun__BITNR 19
+#define R_IRQ_MASK0_RD__overrun__WIDTH 1
+#define R_IRQ_MASK0_RD__overrun__active 1
+#define R_IRQ_MASK0_RD__overrun__inactive 0
+#define R_IRQ_MASK0_RD__underrun__BITNR 18
+#define R_IRQ_MASK0_RD__underrun__WIDTH 1
+#define R_IRQ_MASK0_RD__underrun__active 1
+#define R_IRQ_MASK0_RD__underrun__inactive 0
+#define R_IRQ_MASK0_RD__excessive_col__BITNR 17
+#define R_IRQ_MASK0_RD__excessive_col__WIDTH 1
+#define R_IRQ_MASK0_RD__excessive_col__active 1
+#define R_IRQ_MASK0_RD__excessive_col__inactive 0
+#define R_IRQ_MASK0_RD__mdio__BITNR 16
+#define R_IRQ_MASK0_RD__mdio__WIDTH 1
+#define R_IRQ_MASK0_RD__mdio__active 1
+#define R_IRQ_MASK0_RD__mdio__inactive 0
+#define R_IRQ_MASK0_RD__ata_drq3__BITNR 15
+#define R_IRQ_MASK0_RD__ata_drq3__WIDTH 1
+#define R_IRQ_MASK0_RD__ata_drq3__active 1
+#define R_IRQ_MASK0_RD__ata_drq3__inactive 0
+#define R_IRQ_MASK0_RD__ata_drq2__BITNR 14
+#define R_IRQ_MASK0_RD__ata_drq2__WIDTH 1
+#define R_IRQ_MASK0_RD__ata_drq2__active 1
+#define R_IRQ_MASK0_RD__ata_drq2__inactive 0
+#define R_IRQ_MASK0_RD__ata_drq1__BITNR 13
+#define R_IRQ_MASK0_RD__ata_drq1__WIDTH 1
+#define R_IRQ_MASK0_RD__ata_drq1__active 1
+#define R_IRQ_MASK0_RD__ata_drq1__inactive 0
+#define R_IRQ_MASK0_RD__ata_drq0__BITNR 12
+#define R_IRQ_MASK0_RD__ata_drq0__WIDTH 1
+#define R_IRQ_MASK0_RD__ata_drq0__active 1
+#define R_IRQ_MASK0_RD__ata_drq0__inactive 0
+#define R_IRQ_MASK0_RD__par0_ecp_cmd__BITNR 11
+#define R_IRQ_MASK0_RD__par0_ecp_cmd__WIDTH 1
+#define R_IRQ_MASK0_RD__par0_ecp_cmd__active 1
+#define R_IRQ_MASK0_RD__par0_ecp_cmd__inactive 0
+#define R_IRQ_MASK0_RD__ata_irq3__BITNR 11
+#define R_IRQ_MASK0_RD__ata_irq3__WIDTH 1
+#define R_IRQ_MASK0_RD__ata_irq3__active 1
+#define R_IRQ_MASK0_RD__ata_irq3__inactive 0
+#define R_IRQ_MASK0_RD__par0_peri__BITNR 10
+#define R_IRQ_MASK0_RD__par0_peri__WIDTH 1
+#define R_IRQ_MASK0_RD__par0_peri__active 1
+#define R_IRQ_MASK0_RD__par0_peri__inactive 0
+#define R_IRQ_MASK0_RD__ata_irq2__BITNR 10
+#define R_IRQ_MASK0_RD__ata_irq2__WIDTH 1
+#define R_IRQ_MASK0_RD__ata_irq2__active 1
+#define R_IRQ_MASK0_RD__ata_irq2__inactive 0
+#define R_IRQ_MASK0_RD__par0_data__BITNR 9
+#define R_IRQ_MASK0_RD__par0_data__WIDTH 1
+#define R_IRQ_MASK0_RD__par0_data__active 1
+#define R_IRQ_MASK0_RD__par0_data__inactive 0
+#define R_IRQ_MASK0_RD__ata_irq1__BITNR 9
+#define R_IRQ_MASK0_RD__ata_irq1__WIDTH 1
+#define R_IRQ_MASK0_RD__ata_irq1__active 1
+#define R_IRQ_MASK0_RD__ata_irq1__inactive 0
+#define R_IRQ_MASK0_RD__par0_ready__BITNR 8
+#define R_IRQ_MASK0_RD__par0_ready__WIDTH 1
+#define R_IRQ_MASK0_RD__par0_ready__active 1
+#define R_IRQ_MASK0_RD__par0_ready__inactive 0
+#define R_IRQ_MASK0_RD__ata_irq0__BITNR 8
+#define R_IRQ_MASK0_RD__ata_irq0__WIDTH 1
+#define R_IRQ_MASK0_RD__ata_irq0__active 1
+#define R_IRQ_MASK0_RD__ata_irq0__inactive 0
+#define R_IRQ_MASK0_RD__mio__BITNR 8
+#define R_IRQ_MASK0_RD__mio__WIDTH 1
+#define R_IRQ_MASK0_RD__mio__active 1
+#define R_IRQ_MASK0_RD__mio__inactive 0
+#define R_IRQ_MASK0_RD__scsi0__BITNR 8
+#define R_IRQ_MASK0_RD__scsi0__WIDTH 1
+#define R_IRQ_MASK0_RD__scsi0__active 1
+#define R_IRQ_MASK0_RD__scsi0__inactive 0
+#define R_IRQ_MASK0_RD__ata_dmaend__BITNR 7
+#define R_IRQ_MASK0_RD__ata_dmaend__WIDTH 1
+#define R_IRQ_MASK0_RD__ata_dmaend__active 1
+#define R_IRQ_MASK0_RD__ata_dmaend__inactive 0
+#define R_IRQ_MASK0_RD__irq_ext_vector_nr__BITNR 5
+#define R_IRQ_MASK0_RD__irq_ext_vector_nr__WIDTH 1
+#define R_IRQ_MASK0_RD__irq_ext_vector_nr__active 1
+#define R_IRQ_MASK0_RD__irq_ext_vector_nr__inactive 0
+#define R_IRQ_MASK0_RD__irq_int_vector_nr__BITNR 4
+#define R_IRQ_MASK0_RD__irq_int_vector_nr__WIDTH 1
+#define R_IRQ_MASK0_RD__irq_int_vector_nr__active 1
+#define R_IRQ_MASK0_RD__irq_int_vector_nr__inactive 0
+#define R_IRQ_MASK0_RD__ext_dma1__BITNR 3
+#define R_IRQ_MASK0_RD__ext_dma1__WIDTH 1
+#define R_IRQ_MASK0_RD__ext_dma1__active 1
+#define R_IRQ_MASK0_RD__ext_dma1__inactive 0
+#define R_IRQ_MASK0_RD__ext_dma0__BITNR 2
+#define R_IRQ_MASK0_RD__ext_dma0__WIDTH 1
+#define R_IRQ_MASK0_RD__ext_dma0__active 1
+#define R_IRQ_MASK0_RD__ext_dma0__inactive 0
+#define R_IRQ_MASK0_RD__timer1__BITNR 1
+#define R_IRQ_MASK0_RD__timer1__WIDTH 1
+#define R_IRQ_MASK0_RD__timer1__active 1
+#define R_IRQ_MASK0_RD__timer1__inactive 0
+#define R_IRQ_MASK0_RD__timer0__BITNR 0
+#define R_IRQ_MASK0_RD__timer0__WIDTH 1
+#define R_IRQ_MASK0_RD__timer0__active 1
+#define R_IRQ_MASK0_RD__timer0__inactive 0
+
+#define R_IRQ_MASK0_CLR (IO_TYPECAST_UDWORD 0xb00000c0)
+#define R_IRQ_MASK0_CLR__nmi_pin__BITNR 31
+#define R_IRQ_MASK0_CLR__nmi_pin__WIDTH 1
+#define R_IRQ_MASK0_CLR__nmi_pin__clr 1
+#define R_IRQ_MASK0_CLR__nmi_pin__nop 0
+#define R_IRQ_MASK0_CLR__watchdog_nmi__BITNR 30
+#define R_IRQ_MASK0_CLR__watchdog_nmi__WIDTH 1
+#define R_IRQ_MASK0_CLR__watchdog_nmi__clr 1
+#define R_IRQ_MASK0_CLR__watchdog_nmi__nop 0
+#define R_IRQ_MASK0_CLR__sqe_test_error__BITNR 29
+#define R_IRQ_MASK0_CLR__sqe_test_error__WIDTH 1
+#define R_IRQ_MASK0_CLR__sqe_test_error__clr 1
+#define R_IRQ_MASK0_CLR__sqe_test_error__nop 0
+#define R_IRQ_MASK0_CLR__carrier_loss__BITNR 28
+#define R_IRQ_MASK0_CLR__carrier_loss__WIDTH 1
+#define R_IRQ_MASK0_CLR__carrier_loss__clr 1
+#define R_IRQ_MASK0_CLR__carrier_loss__nop 0
+#define R_IRQ_MASK0_CLR__deferred__BITNR 27
+#define R_IRQ_MASK0_CLR__deferred__WIDTH 1
+#define R_IRQ_MASK0_CLR__deferred__clr 1
+#define R_IRQ_MASK0_CLR__deferred__nop 0
+#define R_IRQ_MASK0_CLR__late_col__BITNR 26
+#define R_IRQ_MASK0_CLR__late_col__WIDTH 1
+#define R_IRQ_MASK0_CLR__late_col__clr 1
+#define R_IRQ_MASK0_CLR__late_col__nop 0
+#define R_IRQ_MASK0_CLR__multiple_col__BITNR 25
+#define R_IRQ_MASK0_CLR__multiple_col__WIDTH 1
+#define R_IRQ_MASK0_CLR__multiple_col__clr 1
+#define R_IRQ_MASK0_CLR__multiple_col__nop 0
+#define R_IRQ_MASK0_CLR__single_col__BITNR 24
+#define R_IRQ_MASK0_CLR__single_col__WIDTH 1
+#define R_IRQ_MASK0_CLR__single_col__clr 1
+#define R_IRQ_MASK0_CLR__single_col__nop 0
+#define R_IRQ_MASK0_CLR__congestion__BITNR 23
+#define R_IRQ_MASK0_CLR__congestion__WIDTH 1
+#define R_IRQ_MASK0_CLR__congestion__clr 1
+#define R_IRQ_MASK0_CLR__congestion__nop 0
+#define R_IRQ_MASK0_CLR__oversize__BITNR 22
+#define R_IRQ_MASK0_CLR__oversize__WIDTH 1
+#define R_IRQ_MASK0_CLR__oversize__clr 1
+#define R_IRQ_MASK0_CLR__oversize__nop 0
+#define R_IRQ_MASK0_CLR__alignment_error__BITNR 21
+#define R_IRQ_MASK0_CLR__alignment_error__WIDTH 1
+#define R_IRQ_MASK0_CLR__alignment_error__clr 1
+#define R_IRQ_MASK0_CLR__alignment_error__nop 0
+#define R_IRQ_MASK0_CLR__crc_error__BITNR 20
+#define R_IRQ_MASK0_CLR__crc_error__WIDTH 1
+#define R_IRQ_MASK0_CLR__crc_error__clr 1
+#define R_IRQ_MASK0_CLR__crc_error__nop 0
+#define R_IRQ_MASK0_CLR__overrun__BITNR 19
+#define R_IRQ_MASK0_CLR__overrun__WIDTH 1
+#define R_IRQ_MASK0_CLR__overrun__clr 1
+#define R_IRQ_MASK0_CLR__overrun__nop 0
+#define R_IRQ_MASK0_CLR__underrun__BITNR 18
+#define R_IRQ_MASK0_CLR__underrun__WIDTH 1
+#define R_IRQ_MASK0_CLR__underrun__clr 1
+#define R_IRQ_MASK0_CLR__underrun__nop 0
+#define R_IRQ_MASK0_CLR__excessive_col__BITNR 17
+#define R_IRQ_MASK0_CLR__excessive_col__WIDTH 1
+#define R_IRQ_MASK0_CLR__excessive_col__clr 1
+#define R_IRQ_MASK0_CLR__excessive_col__nop 0
+#define R_IRQ_MASK0_CLR__mdio__BITNR 16
+#define R_IRQ_MASK0_CLR__mdio__WIDTH 1
+#define R_IRQ_MASK0_CLR__mdio__clr 1
+#define R_IRQ_MASK0_CLR__mdio__nop 0
+#define R_IRQ_MASK0_CLR__ata_drq3__BITNR 15
+#define R_IRQ_MASK0_CLR__ata_drq3__WIDTH 1
+#define R_IRQ_MASK0_CLR__ata_drq3__clr 1
+#define R_IRQ_MASK0_CLR__ata_drq3__nop 0
+#define R_IRQ_MASK0_CLR__ata_drq2__BITNR 14
+#define R_IRQ_MASK0_CLR__ata_drq2__WIDTH 1
+#define R_IRQ_MASK0_CLR__ata_drq2__clr 1
+#define R_IRQ_MASK0_CLR__ata_drq2__nop 0
+#define R_IRQ_MASK0_CLR__ata_drq1__BITNR 13
+#define R_IRQ_MASK0_CLR__ata_drq1__WIDTH 1
+#define R_IRQ_MASK0_CLR__ata_drq1__clr 1
+#define R_IRQ_MASK0_CLR__ata_drq1__nop 0
+#define R_IRQ_MASK0_CLR__ata_drq0__BITNR 12
+#define R_IRQ_MASK0_CLR__ata_drq0__WIDTH 1
+#define R_IRQ_MASK0_CLR__ata_drq0__clr 1
+#define R_IRQ_MASK0_CLR__ata_drq0__nop 0
+#define R_IRQ_MASK0_CLR__par0_ecp_cmd__BITNR 11
+#define R_IRQ_MASK0_CLR__par0_ecp_cmd__WIDTH 1
+#define R_IRQ_MASK0_CLR__par0_ecp_cmd__clr 1
+#define R_IRQ_MASK0_CLR__par0_ecp_cmd__nop 0
+#define R_IRQ_MASK0_CLR__ata_irq3__BITNR 11
+#define R_IRQ_MASK0_CLR__ata_irq3__WIDTH 1
+#define R_IRQ_MASK0_CLR__ata_irq3__clr 1
+#define R_IRQ_MASK0_CLR__ata_irq3__nop 0
+#define R_IRQ_MASK0_CLR__par0_peri__BITNR 10
+#define R_IRQ_MASK0_CLR__par0_peri__WIDTH 1
+#define R_IRQ_MASK0_CLR__par0_peri__clr 1
+#define R_IRQ_MASK0_CLR__par0_peri__nop 0
+#define R_IRQ_MASK0_CLR__ata_irq2__BITNR 10
+#define R_IRQ_MASK0_CLR__ata_irq2__WIDTH 1
+#define R_IRQ_MASK0_CLR__ata_irq2__clr 1
+#define R_IRQ_MASK0_CLR__ata_irq2__nop 0
+#define R_IRQ_MASK0_CLR__par0_data__BITNR 9
+#define R_IRQ_MASK0_CLR__par0_data__WIDTH 1
+#define R_IRQ_MASK0_CLR__par0_data__clr 1
+#define R_IRQ_MASK0_CLR__par0_data__nop 0
+#define R_IRQ_MASK0_CLR__ata_irq1__BITNR 9
+#define R_IRQ_MASK0_CLR__ata_irq1__WIDTH 1
+#define R_IRQ_MASK0_CLR__ata_irq1__clr 1
+#define R_IRQ_MASK0_CLR__ata_irq1__nop 0
+#define R_IRQ_MASK0_CLR__par0_ready__BITNR 8
+#define R_IRQ_MASK0_CLR__par0_ready__WIDTH 1
+#define R_IRQ_MASK0_CLR__par0_ready__clr 1
+#define R_IRQ_MASK0_CLR__par0_ready__nop 0
+#define R_IRQ_MASK0_CLR__ata_irq0__BITNR 8
+#define R_IRQ_MASK0_CLR__ata_irq0__WIDTH 1
+#define R_IRQ_MASK0_CLR__ata_irq0__clr 1
+#define R_IRQ_MASK0_CLR__ata_irq0__nop 0
+#define R_IRQ_MASK0_CLR__mio__BITNR 8
+#define R_IRQ_MASK0_CLR__mio__WIDTH 1
+#define R_IRQ_MASK0_CLR__mio__clr 1
+#define R_IRQ_MASK0_CLR__mio__nop 0
+#define R_IRQ_MASK0_CLR__scsi0__BITNR 8
+#define R_IRQ_MASK0_CLR__scsi0__WIDTH 1
+#define R_IRQ_MASK0_CLR__scsi0__clr 1
+#define R_IRQ_MASK0_CLR__scsi0__nop 0
+#define R_IRQ_MASK0_CLR__ata_dmaend__BITNR 7
+#define R_IRQ_MASK0_CLR__ata_dmaend__WIDTH 1
+#define R_IRQ_MASK0_CLR__ata_dmaend__clr 1
+#define R_IRQ_MASK0_CLR__ata_dmaend__nop 0
+#define R_IRQ_MASK0_CLR__irq_ext_vector_nr__BITNR 5
+#define R_IRQ_MASK0_CLR__irq_ext_vector_nr__WIDTH 1
+#define R_IRQ_MASK0_CLR__irq_ext_vector_nr__clr 1
+#define R_IRQ_MASK0_CLR__irq_ext_vector_nr__nop 0
+#define R_IRQ_MASK0_CLR__irq_int_vector_nr__BITNR 4
+#define R_IRQ_MASK0_CLR__irq_int_vector_nr__WIDTH 1
+#define R_IRQ_MASK0_CLR__irq_int_vector_nr__clr 1
+#define R_IRQ_MASK0_CLR__irq_int_vector_nr__nop 0
+#define R_IRQ_MASK0_CLR__ext_dma1__BITNR 3
+#define R_IRQ_MASK0_CLR__ext_dma1__WIDTH 1
+#define R_IRQ_MASK0_CLR__ext_dma1__clr 1
+#define R_IRQ_MASK0_CLR__ext_dma1__nop 0
+#define R_IRQ_MASK0_CLR__ext_dma0__BITNR 2
+#define R_IRQ_MASK0_CLR__ext_dma0__WIDTH 1
+#define R_IRQ_MASK0_CLR__ext_dma0__clr 1
+#define R_IRQ_MASK0_CLR__ext_dma0__nop 0
+#define R_IRQ_MASK0_CLR__timer1__BITNR 1
+#define R_IRQ_MASK0_CLR__timer1__WIDTH 1
+#define R_IRQ_MASK0_CLR__timer1__clr 1
+#define R_IRQ_MASK0_CLR__timer1__nop 0
+#define R_IRQ_MASK0_CLR__timer0__BITNR 0
+#define R_IRQ_MASK0_CLR__timer0__WIDTH 1
+#define R_IRQ_MASK0_CLR__timer0__clr 1
+#define R_IRQ_MASK0_CLR__timer0__nop 0
+
+#define R_IRQ_READ0 (IO_TYPECAST_RO_UDWORD 0xb00000c4)
+#define R_IRQ_READ0__nmi_pin__BITNR 31
+#define R_IRQ_READ0__nmi_pin__WIDTH 1
+#define R_IRQ_READ0__nmi_pin__active 1
+#define R_IRQ_READ0__nmi_pin__inactive 0
+#define R_IRQ_READ0__watchdog_nmi__BITNR 30
+#define R_IRQ_READ0__watchdog_nmi__WIDTH 1
+#define R_IRQ_READ0__watchdog_nmi__active 1
+#define R_IRQ_READ0__watchdog_nmi__inactive 0
+#define R_IRQ_READ0__sqe_test_error__BITNR 29
+#define R_IRQ_READ0__sqe_test_error__WIDTH 1
+#define R_IRQ_READ0__sqe_test_error__active 1
+#define R_IRQ_READ0__sqe_test_error__inactive 0
+#define R_IRQ_READ0__carrier_loss__BITNR 28
+#define R_IRQ_READ0__carrier_loss__WIDTH 1
+#define R_IRQ_READ0__carrier_loss__active 1
+#define R_IRQ_READ0__carrier_loss__inactive 0
+#define R_IRQ_READ0__deferred__BITNR 27
+#define R_IRQ_READ0__deferred__WIDTH 1
+#define R_IRQ_READ0__deferred__active 1
+#define R_IRQ_READ0__deferred__inactive 0
+#define R_IRQ_READ0__late_col__BITNR 26
+#define R_IRQ_READ0__late_col__WIDTH 1
+#define R_IRQ_READ0__late_col__active 1
+#define R_IRQ_READ0__late_col__inactive 0
+#define R_IRQ_READ0__multiple_col__BITNR 25
+#define R_IRQ_READ0__multiple_col__WIDTH 1
+#define R_IRQ_READ0__multiple_col__active 1
+#define R_IRQ_READ0__multiple_col__inactive 0
+#define R_IRQ_READ0__single_col__BITNR 24
+#define R_IRQ_READ0__single_col__WIDTH 1
+#define R_IRQ_READ0__single_col__active 1
+#define R_IRQ_READ0__single_col__inactive 0
+#define R_IRQ_READ0__congestion__BITNR 23
+#define R_IRQ_READ0__congestion__WIDTH 1
+#define R_IRQ_READ0__congestion__active 1
+#define R_IRQ_READ0__congestion__inactive 0
+#define R_IRQ_READ0__oversize__BITNR 22
+#define R_IRQ_READ0__oversize__WIDTH 1
+#define R_IRQ_READ0__oversize__active 1
+#define R_IRQ_READ0__oversize__inactive 0
+#define R_IRQ_READ0__alignment_error__BITNR 21
+#define R_IRQ_READ0__alignment_error__WIDTH 1
+#define R_IRQ_READ0__alignment_error__active 1
+#define R_IRQ_READ0__alignment_error__inactive 0
+#define R_IRQ_READ0__crc_error__BITNR 20
+#define R_IRQ_READ0__crc_error__WIDTH 1
+#define R_IRQ_READ0__crc_error__active 1
+#define R_IRQ_READ0__crc_error__inactive 0
+#define R_IRQ_READ0__overrun__BITNR 19
+#define R_IRQ_READ0__overrun__WIDTH 1
+#define R_IRQ_READ0__overrun__active 1
+#define R_IRQ_READ0__overrun__inactive 0
+#define R_IRQ_READ0__underrun__BITNR 18
+#define R_IRQ_READ0__underrun__WIDTH 1
+#define R_IRQ_READ0__underrun__active 1
+#define R_IRQ_READ0__underrun__inactive 0
+#define R_IRQ_READ0__excessive_col__BITNR 17
+#define R_IRQ_READ0__excessive_col__WIDTH 1
+#define R_IRQ_READ0__excessive_col__active 1
+#define R_IRQ_READ0__excessive_col__inactive 0
+#define R_IRQ_READ0__mdio__BITNR 16
+#define R_IRQ_READ0__mdio__WIDTH 1
+#define R_IRQ_READ0__mdio__active 1
+#define R_IRQ_READ0__mdio__inactive 0
+#define R_IRQ_READ0__ata_drq3__BITNR 15
+#define R_IRQ_READ0__ata_drq3__WIDTH 1
+#define R_IRQ_READ0__ata_drq3__active 1
+#define R_IRQ_READ0__ata_drq3__inactive 0
+#define R_IRQ_READ0__ata_drq2__BITNR 14
+#define R_IRQ_READ0__ata_drq2__WIDTH 1
+#define R_IRQ_READ0__ata_drq2__active 1
+#define R_IRQ_READ0__ata_drq2__inactive 0
+#define R_IRQ_READ0__ata_drq1__BITNR 13
+#define R_IRQ_READ0__ata_drq1__WIDTH 1
+#define R_IRQ_READ0__ata_drq1__active 1
+#define R_IRQ_READ0__ata_drq1__inactive 0
+#define R_IRQ_READ0__ata_drq0__BITNR 12
+#define R_IRQ_READ0__ata_drq0__WIDTH 1
+#define R_IRQ_READ0__ata_drq0__active 1
+#define R_IRQ_READ0__ata_drq0__inactive 0
+#define R_IRQ_READ0__par0_ecp_cmd__BITNR 11
+#define R_IRQ_READ0__par0_ecp_cmd__WIDTH 1
+#define R_IRQ_READ0__par0_ecp_cmd__active 1
+#define R_IRQ_READ0__par0_ecp_cmd__inactive 0
+#define R_IRQ_READ0__ata_irq3__BITNR 11
+#define R_IRQ_READ0__ata_irq3__WIDTH 1
+#define R_IRQ_READ0__ata_irq3__active 1
+#define R_IRQ_READ0__ata_irq3__inactive 0
+#define R_IRQ_READ0__par0_peri__BITNR 10
+#define R_IRQ_READ0__par0_peri__WIDTH 1
+#define R_IRQ_READ0__par0_peri__active 1
+#define R_IRQ_READ0__par0_peri__inactive 0
+#define R_IRQ_READ0__ata_irq2__BITNR 10
+#define R_IRQ_READ0__ata_irq2__WIDTH 1
+#define R_IRQ_READ0__ata_irq2__active 1
+#define R_IRQ_READ0__ata_irq2__inactive 0
+#define R_IRQ_READ0__par0_data__BITNR 9
+#define R_IRQ_READ0__par0_data__WIDTH 1
+#define R_IRQ_READ0__par0_data__active 1
+#define R_IRQ_READ0__par0_data__inactive 0
+#define R_IRQ_READ0__ata_irq1__BITNR 9
+#define R_IRQ_READ0__ata_irq1__WIDTH 1
+#define R_IRQ_READ0__ata_irq1__active 1
+#define R_IRQ_READ0__ata_irq1__inactive 0
+#define R_IRQ_READ0__par0_ready__BITNR 8
+#define R_IRQ_READ0__par0_ready__WIDTH 1
+#define R_IRQ_READ0__par0_ready__active 1
+#define R_IRQ_READ0__par0_ready__inactive 0
+#define R_IRQ_READ0__ata_irq0__BITNR 8
+#define R_IRQ_READ0__ata_irq0__WIDTH 1
+#define R_IRQ_READ0__ata_irq0__active 1
+#define R_IRQ_READ0__ata_irq0__inactive 0
+#define R_IRQ_READ0__mio__BITNR 8
+#define R_IRQ_READ0__mio__WIDTH 1
+#define R_IRQ_READ0__mio__active 1
+#define R_IRQ_READ0__mio__inactive 0
+#define R_IRQ_READ0__scsi0__BITNR 8
+#define R_IRQ_READ0__scsi0__WIDTH 1
+#define R_IRQ_READ0__scsi0__active 1
+#define R_IRQ_READ0__scsi0__inactive 0
+#define R_IRQ_READ0__ata_dmaend__BITNR 7
+#define R_IRQ_READ0__ata_dmaend__WIDTH 1
+#define R_IRQ_READ0__ata_dmaend__active 1
+#define R_IRQ_READ0__ata_dmaend__inactive 0
+#define R_IRQ_READ0__irq_ext_vector_nr__BITNR 5
+#define R_IRQ_READ0__irq_ext_vector_nr__WIDTH 1
+#define R_IRQ_READ0__irq_ext_vector_nr__active 1
+#define R_IRQ_READ0__irq_ext_vector_nr__inactive 0
+#define R_IRQ_READ0__irq_int_vector_nr__BITNR 4
+#define R_IRQ_READ0__irq_int_vector_nr__WIDTH 1
+#define R_IRQ_READ0__irq_int_vector_nr__active 1
+#define R_IRQ_READ0__irq_int_vector_nr__inactive 0
+#define R_IRQ_READ0__ext_dma1__BITNR 3
+#define R_IRQ_READ0__ext_dma1__WIDTH 1
+#define R_IRQ_READ0__ext_dma1__active 1
+#define R_IRQ_READ0__ext_dma1__inactive 0
+#define R_IRQ_READ0__ext_dma0__BITNR 2
+#define R_IRQ_READ0__ext_dma0__WIDTH 1
+#define R_IRQ_READ0__ext_dma0__active 1
+#define R_IRQ_READ0__ext_dma0__inactive 0
+#define R_IRQ_READ0__timer1__BITNR 1
+#define R_IRQ_READ0__timer1__WIDTH 1
+#define R_IRQ_READ0__timer1__active 1
+#define R_IRQ_READ0__timer1__inactive 0
+#define R_IRQ_READ0__timer0__BITNR 0
+#define R_IRQ_READ0__timer0__WIDTH 1
+#define R_IRQ_READ0__timer0__active 1
+#define R_IRQ_READ0__timer0__inactive 0
+
+#define R_IRQ_MASK0_SET (IO_TYPECAST_UDWORD 0xb00000c4)
+#define R_IRQ_MASK0_SET__nmi_pin__BITNR 31
+#define R_IRQ_MASK0_SET__nmi_pin__WIDTH 1
+#define R_IRQ_MASK0_SET__nmi_pin__set 1
+#define R_IRQ_MASK0_SET__nmi_pin__nop 0
+#define R_IRQ_MASK0_SET__watchdog_nmi__BITNR 30
+#define R_IRQ_MASK0_SET__watchdog_nmi__WIDTH 1
+#define R_IRQ_MASK0_SET__watchdog_nmi__set 1
+#define R_IRQ_MASK0_SET__watchdog_nmi__nop 0
+#define R_IRQ_MASK0_SET__sqe_test_error__BITNR 29
+#define R_IRQ_MASK0_SET__sqe_test_error__WIDTH 1
+#define R_IRQ_MASK0_SET__sqe_test_error__set 1
+#define R_IRQ_MASK0_SET__sqe_test_error__nop 0
+#define R_IRQ_MASK0_SET__carrier_loss__BITNR 28
+#define R_IRQ_MASK0_SET__carrier_loss__WIDTH 1
+#define R_IRQ_MASK0_SET__carrier_loss__set 1
+#define R_IRQ_MASK0_SET__carrier_loss__nop 0
+#define R_IRQ_MASK0_SET__deferred__BITNR 27
+#define R_IRQ_MASK0_SET__deferred__WIDTH 1
+#define R_IRQ_MASK0_SET__deferred__set 1
+#define R_IRQ_MASK0_SET__deferred__nop 0
+#define R_IRQ_MASK0_SET__late_col__BITNR 26
+#define R_IRQ_MASK0_SET__late_col__WIDTH 1
+#define R_IRQ_MASK0_SET__late_col__set 1
+#define R_IRQ_MASK0_SET__late_col__nop 0
+#define R_IRQ_MASK0_SET__multiple_col__BITNR 25
+#define R_IRQ_MASK0_SET__multiple_col__WIDTH 1
+#define R_IRQ_MASK0_SET__multiple_col__set 1
+#define R_IRQ_MASK0_SET__multiple_col__nop 0
+#define R_IRQ_MASK0_SET__single_col__BITNR 24
+#define R_IRQ_MASK0_SET__single_col__WIDTH 1
+#define R_IRQ_MASK0_SET__single_col__set 1
+#define R_IRQ_MASK0_SET__single_col__nop 0
+#define R_IRQ_MASK0_SET__congestion__BITNR 23
+#define R_IRQ_MASK0_SET__congestion__WIDTH 1
+#define R_IRQ_MASK0_SET__congestion__set 1
+#define R_IRQ_MASK0_SET__congestion__nop 0
+#define R_IRQ_MASK0_SET__oversize__BITNR 22
+#define R_IRQ_MASK0_SET__oversize__WIDTH 1
+#define R_IRQ_MASK0_SET__oversize__set 1
+#define R_IRQ_MASK0_SET__oversize__nop 0
+#define R_IRQ_MASK0_SET__alignment_error__BITNR 21
+#define R_IRQ_MASK0_SET__alignment_error__WIDTH 1
+#define R_IRQ_MASK0_SET__alignment_error__set 1
+#define R_IRQ_MASK0_SET__alignment_error__nop 0
+#define R_IRQ_MASK0_SET__crc_error__BITNR 20
+#define R_IRQ_MASK0_SET__crc_error__WIDTH 1
+#define R_IRQ_MASK0_SET__crc_error__set 1
+#define R_IRQ_MASK0_SET__crc_error__nop 0
+#define R_IRQ_MASK0_SET__overrun__BITNR 19
+#define R_IRQ_MASK0_SET__overrun__WIDTH 1
+#define R_IRQ_MASK0_SET__overrun__set 1
+#define R_IRQ_MASK0_SET__overrun__nop 0
+#define R_IRQ_MASK0_SET__underrun__BITNR 18
+#define R_IRQ_MASK0_SET__underrun__WIDTH 1
+#define R_IRQ_MASK0_SET__underrun__set 1
+#define R_IRQ_MASK0_SET__underrun__nop 0
+#define R_IRQ_MASK0_SET__excessive_col__BITNR 17
+#define R_IRQ_MASK0_SET__excessive_col__WIDTH 1
+#define R_IRQ_MASK0_SET__excessive_col__set 1
+#define R_IRQ_MASK0_SET__excessive_col__nop 0
+#define R_IRQ_MASK0_SET__mdio__BITNR 16
+#define R_IRQ_MASK0_SET__mdio__WIDTH 1
+#define R_IRQ_MASK0_SET__mdio__set 1
+#define R_IRQ_MASK0_SET__mdio__nop 0
+#define R_IRQ_MASK0_SET__ata_drq3__BITNR 15
+#define R_IRQ_MASK0_SET__ata_drq3__WIDTH 1
+#define R_IRQ_MASK0_SET__ata_drq3__set 1
+#define R_IRQ_MASK0_SET__ata_drq3__nop 0
+#define R_IRQ_MASK0_SET__ata_drq2__BITNR 14
+#define R_IRQ_MASK0_SET__ata_drq2__WIDTH 1
+#define R_IRQ_MASK0_SET__ata_drq2__set 1
+#define R_IRQ_MASK0_SET__ata_drq2__nop 0
+#define R_IRQ_MASK0_SET__ata_drq1__BITNR 13
+#define R_IRQ_MASK0_SET__ata_drq1__WIDTH 1
+#define R_IRQ_MASK0_SET__ata_drq1__set 1
+#define R_IRQ_MASK0_SET__ata_drq1__nop 0
+#define R_IRQ_MASK0_SET__ata_drq0__BITNR 12
+#define R_IRQ_MASK0_SET__ata_drq0__WIDTH 1
+#define R_IRQ_MASK0_SET__ata_drq0__set 1
+#define R_IRQ_MASK0_SET__ata_drq0__nop 0
+#define R_IRQ_MASK0_SET__par0_ecp_cmd__BITNR 11
+#define R_IRQ_MASK0_SET__par0_ecp_cmd__WIDTH 1
+#define R_IRQ_MASK0_SET__par0_ecp_cmd__set 1
+#define R_IRQ_MASK0_SET__par0_ecp_cmd__nop 0
+#define R_IRQ_MASK0_SET__ata_irq3__BITNR 11
+#define R_IRQ_MASK0_SET__ata_irq3__WIDTH 1
+#define R_IRQ_MASK0_SET__ata_irq3__set 1
+#define R_IRQ_MASK0_SET__ata_irq3__nop 0
+#define R_IRQ_MASK0_SET__par0_peri__BITNR 10
+#define R_IRQ_MASK0_SET__par0_peri__WIDTH 1
+#define R_IRQ_MASK0_SET__par0_peri__set 1
+#define R_IRQ_MASK0_SET__par0_peri__nop 0
+#define R_IRQ_MASK0_SET__ata_irq2__BITNR 10
+#define R_IRQ_MASK0_SET__ata_irq2__WIDTH 1
+#define R_IRQ_MASK0_SET__ata_irq2__set 1
+#define R_IRQ_MASK0_SET__ata_irq2__nop 0
+#define R_IRQ_MASK0_SET__par0_data__BITNR 9
+#define R_IRQ_MASK0_SET__par0_data__WIDTH 1
+#define R_IRQ_MASK0_SET__par0_data__set 1
+#define R_IRQ_MASK0_SET__par0_data__nop 0
+#define R_IRQ_MASK0_SET__ata_irq1__BITNR 9
+#define R_IRQ_MASK0_SET__ata_irq1__WIDTH 1
+#define R_IRQ_MASK0_SET__ata_irq1__set 1
+#define R_IRQ_MASK0_SET__ata_irq1__nop 0
+#define R_IRQ_MASK0_SET__par0_ready__BITNR 8
+#define R_IRQ_MASK0_SET__par0_ready__WIDTH 1
+#define R_IRQ_MASK0_SET__par0_ready__set 1
+#define R_IRQ_MASK0_SET__par0_ready__nop 0
+#define R_IRQ_MASK0_SET__ata_irq0__BITNR 8
+#define R_IRQ_MASK0_SET__ata_irq0__WIDTH 1
+#define R_IRQ_MASK0_SET__ata_irq0__set 1
+#define R_IRQ_MASK0_SET__ata_irq0__nop 0
+#define R_IRQ_MASK0_SET__mio__BITNR 8
+#define R_IRQ_MASK0_SET__mio__WIDTH 1
+#define R_IRQ_MASK0_SET__mio__set 1
+#define R_IRQ_MASK0_SET__mio__nop 0
+#define R_IRQ_MASK0_SET__scsi0__BITNR 8
+#define R_IRQ_MASK0_SET__scsi0__WIDTH 1
+#define R_IRQ_MASK0_SET__scsi0__set 1
+#define R_IRQ_MASK0_SET__scsi0__nop 0
+#define R_IRQ_MASK0_SET__ata_dmaend__BITNR 7
+#define R_IRQ_MASK0_SET__ata_dmaend__WIDTH 1
+#define R_IRQ_MASK0_SET__ata_dmaend__set 1
+#define R_IRQ_MASK0_SET__ata_dmaend__nop 0
+#define R_IRQ_MASK0_SET__irq_ext_vector_nr__BITNR 5
+#define R_IRQ_MASK0_SET__irq_ext_vector_nr__WIDTH 1
+#define R_IRQ_MASK0_SET__irq_ext_vector_nr__set 1
+#define R_IRQ_MASK0_SET__irq_ext_vector_nr__nop 0
+#define R_IRQ_MASK0_SET__irq_int_vector_nr__BITNR 4
+#define R_IRQ_MASK0_SET__irq_int_vector_nr__WIDTH 1
+#define R_IRQ_MASK0_SET__irq_int_vector_nr__set 1
+#define R_IRQ_MASK0_SET__irq_int_vector_nr__nop 0
+#define R_IRQ_MASK0_SET__ext_dma1__BITNR 3
+#define R_IRQ_MASK0_SET__ext_dma1__WIDTH 1
+#define R_IRQ_MASK0_SET__ext_dma1__set 1
+#define R_IRQ_MASK0_SET__ext_dma1__nop 0
+#define R_IRQ_MASK0_SET__ext_dma0__BITNR 2
+#define R_IRQ_MASK0_SET__ext_dma0__WIDTH 1
+#define R_IRQ_MASK0_SET__ext_dma0__set 1
+#define R_IRQ_MASK0_SET__ext_dma0__nop 0
+#define R_IRQ_MASK0_SET__timer1__BITNR 1
+#define R_IRQ_MASK0_SET__timer1__WIDTH 1
+#define R_IRQ_MASK0_SET__timer1__set 1
+#define R_IRQ_MASK0_SET__timer1__nop 0
+#define R_IRQ_MASK0_SET__timer0__BITNR 0
+#define R_IRQ_MASK0_SET__timer0__WIDTH 1
+#define R_IRQ_MASK0_SET__timer0__set 1
+#define R_IRQ_MASK0_SET__timer0__nop 0
+
+#define R_IRQ_MASK1_RD (IO_TYPECAST_RO_UDWORD 0xb00000c8)
+#define R_IRQ_MASK1_RD__sw_int7__BITNR 31
+#define R_IRQ_MASK1_RD__sw_int7__WIDTH 1
+#define R_IRQ_MASK1_RD__sw_int7__active 1
+#define R_IRQ_MASK1_RD__sw_int7__inactive 0
+#define R_IRQ_MASK1_RD__sw_int6__BITNR 30
+#define R_IRQ_MASK1_RD__sw_int6__WIDTH 1
+#define R_IRQ_MASK1_RD__sw_int6__active 1
+#define R_IRQ_MASK1_RD__sw_int6__inactive 0
+#define R_IRQ_MASK1_RD__sw_int5__BITNR 29
+#define R_IRQ_MASK1_RD__sw_int5__WIDTH 1
+#define R_IRQ_MASK1_RD__sw_int5__active 1
+#define R_IRQ_MASK1_RD__sw_int5__inactive 0
+#define R_IRQ_MASK1_RD__sw_int4__BITNR 28
+#define R_IRQ_MASK1_RD__sw_int4__WIDTH 1
+#define R_IRQ_MASK1_RD__sw_int4__active 1
+#define R_IRQ_MASK1_RD__sw_int4__inactive 0
+#define R_IRQ_MASK1_RD__sw_int3__BITNR 27
+#define R_IRQ_MASK1_RD__sw_int3__WIDTH 1
+#define R_IRQ_MASK1_RD__sw_int3__active 1
+#define R_IRQ_MASK1_RD__sw_int3__inactive 0
+#define R_IRQ_MASK1_RD__sw_int2__BITNR 26
+#define R_IRQ_MASK1_RD__sw_int2__WIDTH 1
+#define R_IRQ_MASK1_RD__sw_int2__active 1
+#define R_IRQ_MASK1_RD__sw_int2__inactive 0
+#define R_IRQ_MASK1_RD__sw_int1__BITNR 25
+#define R_IRQ_MASK1_RD__sw_int1__WIDTH 1
+#define R_IRQ_MASK1_RD__sw_int1__active 1
+#define R_IRQ_MASK1_RD__sw_int1__inactive 0
+#define R_IRQ_MASK1_RD__sw_int0__BITNR 24
+#define R_IRQ_MASK1_RD__sw_int0__WIDTH 1
+#define R_IRQ_MASK1_RD__sw_int0__active 1
+#define R_IRQ_MASK1_RD__sw_int0__inactive 0
+#define R_IRQ_MASK1_RD__par1_ecp_cmd__BITNR 19
+#define R_IRQ_MASK1_RD__par1_ecp_cmd__WIDTH 1
+#define R_IRQ_MASK1_RD__par1_ecp_cmd__active 1
+#define R_IRQ_MASK1_RD__par1_ecp_cmd__inactive 0
+#define R_IRQ_MASK1_RD__par1_peri__BITNR 18
+#define R_IRQ_MASK1_RD__par1_peri__WIDTH 1
+#define R_IRQ_MASK1_RD__par1_peri__active 1
+#define R_IRQ_MASK1_RD__par1_peri__inactive 0
+#define R_IRQ_MASK1_RD__par1_data__BITNR 17
+#define R_IRQ_MASK1_RD__par1_data__WIDTH 1
+#define R_IRQ_MASK1_RD__par1_data__active 1
+#define R_IRQ_MASK1_RD__par1_data__inactive 0
+#define R_IRQ_MASK1_RD__par1_ready__BITNR 16
+#define R_IRQ_MASK1_RD__par1_ready__WIDTH 1
+#define R_IRQ_MASK1_RD__par1_ready__active 1
+#define R_IRQ_MASK1_RD__par1_ready__inactive 0
+#define R_IRQ_MASK1_RD__scsi1__BITNR 16
+#define R_IRQ_MASK1_RD__scsi1__WIDTH 1
+#define R_IRQ_MASK1_RD__scsi1__active 1
+#define R_IRQ_MASK1_RD__scsi1__inactive 0
+#define R_IRQ_MASK1_RD__ser3_ready__BITNR 15
+#define R_IRQ_MASK1_RD__ser3_ready__WIDTH 1
+#define R_IRQ_MASK1_RD__ser3_ready__active 1
+#define R_IRQ_MASK1_RD__ser3_ready__inactive 0
+#define R_IRQ_MASK1_RD__ser3_data__BITNR 14
+#define R_IRQ_MASK1_RD__ser3_data__WIDTH 1
+#define R_IRQ_MASK1_RD__ser3_data__active 1
+#define R_IRQ_MASK1_RD__ser3_data__inactive 0
+#define R_IRQ_MASK1_RD__ser2_ready__BITNR 13
+#define R_IRQ_MASK1_RD__ser2_ready__WIDTH 1
+#define R_IRQ_MASK1_RD__ser2_ready__active 1
+#define R_IRQ_MASK1_RD__ser2_ready__inactive 0
+#define R_IRQ_MASK1_RD__ser2_data__BITNR 12
+#define R_IRQ_MASK1_RD__ser2_data__WIDTH 1
+#define R_IRQ_MASK1_RD__ser2_data__active 1
+#define R_IRQ_MASK1_RD__ser2_data__inactive 0
+#define R_IRQ_MASK1_RD__ser1_ready__BITNR 11
+#define R_IRQ_MASK1_RD__ser1_ready__WIDTH 1
+#define R_IRQ_MASK1_RD__ser1_ready__active 1
+#define R_IRQ_MASK1_RD__ser1_ready__inactive 0
+#define R_IRQ_MASK1_RD__ser1_data__BITNR 10
+#define R_IRQ_MASK1_RD__ser1_data__WIDTH 1
+#define R_IRQ_MASK1_RD__ser1_data__active 1
+#define R_IRQ_MASK1_RD__ser1_data__inactive 0
+#define R_IRQ_MASK1_RD__ser0_ready__BITNR 9
+#define R_IRQ_MASK1_RD__ser0_ready__WIDTH 1
+#define R_IRQ_MASK1_RD__ser0_ready__active 1
+#define R_IRQ_MASK1_RD__ser0_ready__inactive 0
+#define R_IRQ_MASK1_RD__ser0_data__BITNR 8
+#define R_IRQ_MASK1_RD__ser0_data__WIDTH 1
+#define R_IRQ_MASK1_RD__ser0_data__active 1
+#define R_IRQ_MASK1_RD__ser0_data__inactive 0
+#define R_IRQ_MASK1_RD__pa7__BITNR 7
+#define R_IRQ_MASK1_RD__pa7__WIDTH 1
+#define R_IRQ_MASK1_RD__pa7__active 1
+#define R_IRQ_MASK1_RD__pa7__inactive 0
+#define R_IRQ_MASK1_RD__pa6__BITNR 6
+#define R_IRQ_MASK1_RD__pa6__WIDTH 1
+#define R_IRQ_MASK1_RD__pa6__active 1
+#define R_IRQ_MASK1_RD__pa6__inactive 0
+#define R_IRQ_MASK1_RD__pa5__BITNR 5
+#define R_IRQ_MASK1_RD__pa5__WIDTH 1
+#define R_IRQ_MASK1_RD__pa5__active 1
+#define R_IRQ_MASK1_RD__pa5__inactive 0
+#define R_IRQ_MASK1_RD__pa4__BITNR 4
+#define R_IRQ_MASK1_RD__pa4__WIDTH 1
+#define R_IRQ_MASK1_RD__pa4__active 1
+#define R_IRQ_MASK1_RD__pa4__inactive 0
+#define R_IRQ_MASK1_RD__pa3__BITNR 3
+#define R_IRQ_MASK1_RD__pa3__WIDTH 1
+#define R_IRQ_MASK1_RD__pa3__active 1
+#define R_IRQ_MASK1_RD__pa3__inactive 0
+#define R_IRQ_MASK1_RD__pa2__BITNR 2
+#define R_IRQ_MASK1_RD__pa2__WIDTH 1
+#define R_IRQ_MASK1_RD__pa2__active 1
+#define R_IRQ_MASK1_RD__pa2__inactive 0
+#define R_IRQ_MASK1_RD__pa1__BITNR 1
+#define R_IRQ_MASK1_RD__pa1__WIDTH 1
+#define R_IRQ_MASK1_RD__pa1__active 1
+#define R_IRQ_MASK1_RD__pa1__inactive 0
+#define R_IRQ_MASK1_RD__pa0__BITNR 0
+#define R_IRQ_MASK1_RD__pa0__WIDTH 1
+#define R_IRQ_MASK1_RD__pa0__active 1
+#define R_IRQ_MASK1_RD__pa0__inactive 0
+
+#define R_IRQ_MASK1_CLR (IO_TYPECAST_UDWORD 0xb00000c8)
+#define R_IRQ_MASK1_CLR__sw_int7__BITNR 31
+#define R_IRQ_MASK1_CLR__sw_int7__WIDTH 1
+#define R_IRQ_MASK1_CLR__sw_int7__clr 1
+#define R_IRQ_MASK1_CLR__sw_int7__nop 0
+#define R_IRQ_MASK1_CLR__sw_int6__BITNR 30
+#define R_IRQ_MASK1_CLR__sw_int6__WIDTH 1
+#define R_IRQ_MASK1_CLR__sw_int6__clr 1
+#define R_IRQ_MASK1_CLR__sw_int6__nop 0
+#define R_IRQ_MASK1_CLR__sw_int5__BITNR 29
+#define R_IRQ_MASK1_CLR__sw_int5__WIDTH 1
+#define R_IRQ_MASK1_CLR__sw_int5__clr 1
+#define R_IRQ_MASK1_CLR__sw_int5__nop 0
+#define R_IRQ_MASK1_CLR__sw_int4__BITNR 28
+#define R_IRQ_MASK1_CLR__sw_int4__WIDTH 1
+#define R_IRQ_MASK1_CLR__sw_int4__clr 1
+#define R_IRQ_MASK1_CLR__sw_int4__nop 0
+#define R_IRQ_MASK1_CLR__sw_int3__BITNR 27
+#define R_IRQ_MASK1_CLR__sw_int3__WIDTH 1
+#define R_IRQ_MASK1_CLR__sw_int3__clr 1
+#define R_IRQ_MASK1_CLR__sw_int3__nop 0
+#define R_IRQ_MASK1_CLR__sw_int2__BITNR 26
+#define R_IRQ_MASK1_CLR__sw_int2__WIDTH 1
+#define R_IRQ_MASK1_CLR__sw_int2__clr 1
+#define R_IRQ_MASK1_CLR__sw_int2__nop 0
+#define R_IRQ_MASK1_CLR__sw_int1__BITNR 25
+#define R_IRQ_MASK1_CLR__sw_int1__WIDTH 1
+#define R_IRQ_MASK1_CLR__sw_int1__clr 1
+#define R_IRQ_MASK1_CLR__sw_int1__nop 0
+#define R_IRQ_MASK1_CLR__sw_int0__BITNR 24
+#define R_IRQ_MASK1_CLR__sw_int0__WIDTH 1
+#define R_IRQ_MASK1_CLR__sw_int0__clr 1
+#define R_IRQ_MASK1_CLR__sw_int0__nop 0
+#define R_IRQ_MASK1_CLR__par1_ecp_cmd__BITNR 19
+#define R_IRQ_MASK1_CLR__par1_ecp_cmd__WIDTH 1
+#define R_IRQ_MASK1_CLR__par1_ecp_cmd__clr 1
+#define R_IRQ_MASK1_CLR__par1_ecp_cmd__nop 0
+#define R_IRQ_MASK1_CLR__par1_peri__BITNR 18
+#define R_IRQ_MASK1_CLR__par1_peri__WIDTH 1
+#define R_IRQ_MASK1_CLR__par1_peri__clr 1
+#define R_IRQ_MASK1_CLR__par1_peri__nop 0
+#define R_IRQ_MASK1_CLR__par1_data__BITNR 17
+#define R_IRQ_MASK1_CLR__par1_data__WIDTH 1
+#define R_IRQ_MASK1_CLR__par1_data__clr 1
+#define R_IRQ_MASK1_CLR__par1_data__nop 0
+#define R_IRQ_MASK1_CLR__par1_ready__BITNR 16
+#define R_IRQ_MASK1_CLR__par1_ready__WIDTH 1
+#define R_IRQ_MASK1_CLR__par1_ready__clr 1
+#define R_IRQ_MASK1_CLR__par1_ready__nop 0
+#define R_IRQ_MASK1_CLR__scsi1__BITNR 16
+#define R_IRQ_MASK1_CLR__scsi1__WIDTH 1
+#define R_IRQ_MASK1_CLR__scsi1__clr 1
+#define R_IRQ_MASK1_CLR__scsi1__nop 0
+#define R_IRQ_MASK1_CLR__ser3_ready__BITNR 15
+#define R_IRQ_MASK1_CLR__ser3_ready__WIDTH 1
+#define R_IRQ_MASK1_CLR__ser3_ready__clr 1
+#define R_IRQ_MASK1_CLR__ser3_ready__nop 0
+#define R_IRQ_MASK1_CLR__ser3_data__BITNR 14
+#define R_IRQ_MASK1_CLR__ser3_data__WIDTH 1
+#define R_IRQ_MASK1_CLR__ser3_data__clr 1
+#define R_IRQ_MASK1_CLR__ser3_data__nop 0
+#define R_IRQ_MASK1_CLR__ser2_ready__BITNR 13
+#define R_IRQ_MASK1_CLR__ser2_ready__WIDTH 1
+#define R_IRQ_MASK1_CLR__ser2_ready__clr 1
+#define R_IRQ_MASK1_CLR__ser2_ready__nop 0
+#define R_IRQ_MASK1_CLR__ser2_data__BITNR 12
+#define R_IRQ_MASK1_CLR__ser2_data__WIDTH 1
+#define R_IRQ_MASK1_CLR__ser2_data__clr 1
+#define R_IRQ_MASK1_CLR__ser2_data__nop 0
+#define R_IRQ_MASK1_CLR__ser1_ready__BITNR 11
+#define R_IRQ_MASK1_CLR__ser1_ready__WIDTH 1
+#define R_IRQ_MASK1_CLR__ser1_ready__clr 1
+#define R_IRQ_MASK1_CLR__ser1_ready__nop 0
+#define R_IRQ_MASK1_CLR__ser1_data__BITNR 10
+#define R_IRQ_MASK1_CLR__ser1_data__WIDTH 1
+#define R_IRQ_MASK1_CLR__ser1_data__clr 1
+#define R_IRQ_MASK1_CLR__ser1_data__nop 0
+#define R_IRQ_MASK1_CLR__ser0_ready__BITNR 9
+#define R_IRQ_MASK1_CLR__ser0_ready__WIDTH 1
+#define R_IRQ_MASK1_CLR__ser0_ready__clr 1
+#define R_IRQ_MASK1_CLR__ser0_ready__nop 0
+#define R_IRQ_MASK1_CLR__ser0_data__BITNR 8
+#define R_IRQ_MASK1_CLR__ser0_data__WIDTH 1
+#define R_IRQ_MASK1_CLR__ser0_data__clr 1
+#define R_IRQ_MASK1_CLR__ser0_data__nop 0
+#define R_IRQ_MASK1_CLR__pa7__BITNR 7
+#define R_IRQ_MASK1_CLR__pa7__WIDTH 1
+#define R_IRQ_MASK1_CLR__pa7__clr 1
+#define R_IRQ_MASK1_CLR__pa7__nop 0
+#define R_IRQ_MASK1_CLR__pa6__BITNR 6
+#define R_IRQ_MASK1_CLR__pa6__WIDTH 1
+#define R_IRQ_MASK1_CLR__pa6__clr 1
+#define R_IRQ_MASK1_CLR__pa6__nop 0
+#define R_IRQ_MASK1_CLR__pa5__BITNR 5
+#define R_IRQ_MASK1_CLR__pa5__WIDTH 1
+#define R_IRQ_MASK1_CLR__pa5__clr 1
+#define R_IRQ_MASK1_CLR__pa5__nop 0
+#define R_IRQ_MASK1_CLR__pa4__BITNR 4
+#define R_IRQ_MASK1_CLR__pa4__WIDTH 1
+#define R_IRQ_MASK1_CLR__pa4__clr 1
+#define R_IRQ_MASK1_CLR__pa4__nop 0
+#define R_IRQ_MASK1_CLR__pa3__BITNR 3
+#define R_IRQ_MASK1_CLR__pa3__WIDTH 1
+#define R_IRQ_MASK1_CLR__pa3__clr 1
+#define R_IRQ_MASK1_CLR__pa3__nop 0
+#define R_IRQ_MASK1_CLR__pa2__BITNR 2
+#define R_IRQ_MASK1_CLR__pa2__WIDTH 1
+#define R_IRQ_MASK1_CLR__pa2__clr 1
+#define R_IRQ_MASK1_CLR__pa2__nop 0
+#define R_IRQ_MASK1_CLR__pa1__BITNR 1
+#define R_IRQ_MASK1_CLR__pa1__WIDTH 1
+#define R_IRQ_MASK1_CLR__pa1__clr 1
+#define R_IRQ_MASK1_CLR__pa1__nop 0
+#define R_IRQ_MASK1_CLR__pa0__BITNR 0
+#define R_IRQ_MASK1_CLR__pa0__WIDTH 1
+#define R_IRQ_MASK1_CLR__pa0__clr 1
+#define R_IRQ_MASK1_CLR__pa0__nop 0
+
+#define R_IRQ_READ1 (IO_TYPECAST_RO_UDWORD 0xb00000cc)
+#define R_IRQ_READ1__sw_int7__BITNR 31
+#define R_IRQ_READ1__sw_int7__WIDTH 1
+#define R_IRQ_READ1__sw_int7__active 1
+#define R_IRQ_READ1__sw_int7__inactive 0
+#define R_IRQ_READ1__sw_int6__BITNR 30
+#define R_IRQ_READ1__sw_int6__WIDTH 1
+#define R_IRQ_READ1__sw_int6__active 1
+#define R_IRQ_READ1__sw_int6__inactive 0
+#define R_IRQ_READ1__sw_int5__BITNR 29
+#define R_IRQ_READ1__sw_int5__WIDTH 1
+#define R_IRQ_READ1__sw_int5__active 1
+#define R_IRQ_READ1__sw_int5__inactive 0
+#define R_IRQ_READ1__sw_int4__BITNR 28
+#define R_IRQ_READ1__sw_int4__WIDTH 1
+#define R_IRQ_READ1__sw_int4__active 1
+#define R_IRQ_READ1__sw_int4__inactive 0
+#define R_IRQ_READ1__sw_int3__BITNR 27
+#define R_IRQ_READ1__sw_int3__WIDTH 1
+#define R_IRQ_READ1__sw_int3__active 1
+#define R_IRQ_READ1__sw_int3__inactive 0
+#define R_IRQ_READ1__sw_int2__BITNR 26
+#define R_IRQ_READ1__sw_int2__WIDTH 1
+#define R_IRQ_READ1__sw_int2__active 1
+#define R_IRQ_READ1__sw_int2__inactive 0
+#define R_IRQ_READ1__sw_int1__BITNR 25
+#define R_IRQ_READ1__sw_int1__WIDTH 1
+#define R_IRQ_READ1__sw_int1__active 1
+#define R_IRQ_READ1__sw_int1__inactive 0
+#define R_IRQ_READ1__sw_int0__BITNR 24
+#define R_IRQ_READ1__sw_int0__WIDTH 1
+#define R_IRQ_READ1__sw_int0__active 1
+#define R_IRQ_READ1__sw_int0__inactive 0
+#define R_IRQ_READ1__par1_ecp_cmd__BITNR 19
+#define R_IRQ_READ1__par1_ecp_cmd__WIDTH 1
+#define R_IRQ_READ1__par1_ecp_cmd__active 1
+#define R_IRQ_READ1__par1_ecp_cmd__inactive 0
+#define R_IRQ_READ1__par1_peri__BITNR 18
+#define R_IRQ_READ1__par1_peri__WIDTH 1
+#define R_IRQ_READ1__par1_peri__active 1
+#define R_IRQ_READ1__par1_peri__inactive 0
+#define R_IRQ_READ1__par1_data__BITNR 17
+#define R_IRQ_READ1__par1_data__WIDTH 1
+#define R_IRQ_READ1__par1_data__active 1
+#define R_IRQ_READ1__par1_data__inactive 0
+#define R_IRQ_READ1__par1_ready__BITNR 16
+#define R_IRQ_READ1__par1_ready__WIDTH 1
+#define R_IRQ_READ1__par1_ready__active 1
+#define R_IRQ_READ1__par1_ready__inactive 0
+#define R_IRQ_READ1__scsi1__BITNR 16
+#define R_IRQ_READ1__scsi1__WIDTH 1
+#define R_IRQ_READ1__scsi1__active 1
+#define R_IRQ_READ1__scsi1__inactive 0
+#define R_IRQ_READ1__ser3_ready__BITNR 15
+#define R_IRQ_READ1__ser3_ready__WIDTH 1
+#define R_IRQ_READ1__ser3_ready__active 1
+#define R_IRQ_READ1__ser3_ready__inactive 0
+#define R_IRQ_READ1__ser3_data__BITNR 14
+#define R_IRQ_READ1__ser3_data__WIDTH 1
+#define R_IRQ_READ1__ser3_data__active 1
+#define R_IRQ_READ1__ser3_data__inactive 0
+#define R_IRQ_READ1__ser2_ready__BITNR 13
+#define R_IRQ_READ1__ser2_ready__WIDTH 1
+#define R_IRQ_READ1__ser2_ready__active 1
+#define R_IRQ_READ1__ser2_ready__inactive 0
+#define R_IRQ_READ1__ser2_data__BITNR 12
+#define R_IRQ_READ1__ser2_data__WIDTH 1
+#define R_IRQ_READ1__ser2_data__active 1
+#define R_IRQ_READ1__ser2_data__inactive 0
+#define R_IRQ_READ1__ser1_ready__BITNR 11
+#define R_IRQ_READ1__ser1_ready__WIDTH 1
+#define R_IRQ_READ1__ser1_ready__active 1
+#define R_IRQ_READ1__ser1_ready__inactive 0
+#define R_IRQ_READ1__ser1_data__BITNR 10
+#define R_IRQ_READ1__ser1_data__WIDTH 1
+#define R_IRQ_READ1__ser1_data__active 1
+#define R_IRQ_READ1__ser1_data__inactive 0
+#define R_IRQ_READ1__ser0_ready__BITNR 9
+#define R_IRQ_READ1__ser0_ready__WIDTH 1
+#define R_IRQ_READ1__ser0_ready__active 1
+#define R_IRQ_READ1__ser0_ready__inactive 0
+#define R_IRQ_READ1__ser0_data__BITNR 8
+#define R_IRQ_READ1__ser0_data__WIDTH 1
+#define R_IRQ_READ1__ser0_data__active 1
+#define R_IRQ_READ1__ser0_data__inactive 0
+#define R_IRQ_READ1__pa7__BITNR 7
+#define R_IRQ_READ1__pa7__WIDTH 1
+#define R_IRQ_READ1__pa7__active 1
+#define R_IRQ_READ1__pa7__inactive 0
+#define R_IRQ_READ1__pa6__BITNR 6
+#define R_IRQ_READ1__pa6__WIDTH 1
+#define R_IRQ_READ1__pa6__active 1
+#define R_IRQ_READ1__pa6__inactive 0
+#define R_IRQ_READ1__pa5__BITNR 5
+#define R_IRQ_READ1__pa5__WIDTH 1
+#define R_IRQ_READ1__pa5__active 1
+#define R_IRQ_READ1__pa5__inactive 0
+#define R_IRQ_READ1__pa4__BITNR 4
+#define R_IRQ_READ1__pa4__WIDTH 1
+#define R_IRQ_READ1__pa4__active 1
+#define R_IRQ_READ1__pa4__inactive 0
+#define R_IRQ_READ1__pa3__BITNR 3
+#define R_IRQ_READ1__pa3__WIDTH 1
+#define R_IRQ_READ1__pa3__active 1
+#define R_IRQ_READ1__pa3__inactive 0
+#define R_IRQ_READ1__pa2__BITNR 2
+#define R_IRQ_READ1__pa2__WIDTH 1
+#define R_IRQ_READ1__pa2__active 1
+#define R_IRQ_READ1__pa2__inactive 0
+#define R_IRQ_READ1__pa1__BITNR 1
+#define R_IRQ_READ1__pa1__WIDTH 1
+#define R_IRQ_READ1__pa1__active 1
+#define R_IRQ_READ1__pa1__inactive 0
+#define R_IRQ_READ1__pa0__BITNR 0
+#define R_IRQ_READ1__pa0__WIDTH 1
+#define R_IRQ_READ1__pa0__active 1
+#define R_IRQ_READ1__pa0__inactive 0
+
+#define R_IRQ_MASK1_SET (IO_TYPECAST_UDWORD 0xb00000cc)
+#define R_IRQ_MASK1_SET__sw_int7__BITNR 31
+#define R_IRQ_MASK1_SET__sw_int7__WIDTH 1
+#define R_IRQ_MASK1_SET__sw_int7__set 1
+#define R_IRQ_MASK1_SET__sw_int7__nop 0
+#define R_IRQ_MASK1_SET__sw_int6__BITNR 30
+#define R_IRQ_MASK1_SET__sw_int6__WIDTH 1
+#define R_IRQ_MASK1_SET__sw_int6__set 1
+#define R_IRQ_MASK1_SET__sw_int6__nop 0
+#define R_IRQ_MASK1_SET__sw_int5__BITNR 29
+#define R_IRQ_MASK1_SET__sw_int5__WIDTH 1
+#define R_IRQ_MASK1_SET__sw_int5__set 1
+#define R_IRQ_MASK1_SET__sw_int5__nop 0
+#define R_IRQ_MASK1_SET__sw_int4__BITNR 28
+#define R_IRQ_MASK1_SET__sw_int4__WIDTH 1
+#define R_IRQ_MASK1_SET__sw_int4__set 1
+#define R_IRQ_MASK1_SET__sw_int4__nop 0
+#define R_IRQ_MASK1_SET__sw_int3__BITNR 27
+#define R_IRQ_MASK1_SET__sw_int3__WIDTH 1
+#define R_IRQ_MASK1_SET__sw_int3__set 1
+#define R_IRQ_MASK1_SET__sw_int3__nop 0
+#define R_IRQ_MASK1_SET__sw_int2__BITNR 26
+#define R_IRQ_MASK1_SET__sw_int2__WIDTH 1
+#define R_IRQ_MASK1_SET__sw_int2__set 1
+#define R_IRQ_MASK1_SET__sw_int2__nop 0
+#define R_IRQ_MASK1_SET__sw_int1__BITNR 25
+#define R_IRQ_MASK1_SET__sw_int1__WIDTH 1
+#define R_IRQ_MASK1_SET__sw_int1__set 1
+#define R_IRQ_MASK1_SET__sw_int1__nop 0
+#define R_IRQ_MASK1_SET__sw_int0__BITNR 24
+#define R_IRQ_MASK1_SET__sw_int0__WIDTH 1
+#define R_IRQ_MASK1_SET__sw_int0__set 1
+#define R_IRQ_MASK1_SET__sw_int0__nop 0
+#define R_IRQ_MASK1_SET__par1_ecp_cmd__BITNR 19
+#define R_IRQ_MASK1_SET__par1_ecp_cmd__WIDTH 1
+#define R_IRQ_MASK1_SET__par1_ecp_cmd__set 1
+#define R_IRQ_MASK1_SET__par1_ecp_cmd__nop 0
+#define R_IRQ_MASK1_SET__par1_peri__BITNR 18
+#define R_IRQ_MASK1_SET__par1_peri__WIDTH 1
+#define R_IRQ_MASK1_SET__par1_peri__set 1
+#define R_IRQ_MASK1_SET__par1_peri__nop 0
+#define R_IRQ_MASK1_SET__par1_data__BITNR 17
+#define R_IRQ_MASK1_SET__par1_data__WIDTH 1
+#define R_IRQ_MASK1_SET__par1_data__set 1
+#define R_IRQ_MASK1_SET__par1_data__nop 0
+#define R_IRQ_MASK1_SET__par1_ready__BITNR 16
+#define R_IRQ_MASK1_SET__par1_ready__WIDTH 1
+#define R_IRQ_MASK1_SET__par1_ready__set 1
+#define R_IRQ_MASK1_SET__par1_ready__nop 0
+#define R_IRQ_MASK1_SET__scsi1__BITNR 16
+#define R_IRQ_MASK1_SET__scsi1__WIDTH 1
+#define R_IRQ_MASK1_SET__scsi1__set 1
+#define R_IRQ_MASK1_SET__scsi1__nop 0
+#define R_IRQ_MASK1_SET__ser3_ready__BITNR 15
+#define R_IRQ_MASK1_SET__ser3_ready__WIDTH 1
+#define R_IRQ_MASK1_SET__ser3_ready__set 1
+#define R_IRQ_MASK1_SET__ser3_ready__nop 0
+#define R_IRQ_MASK1_SET__ser3_data__BITNR 14
+#define R_IRQ_MASK1_SET__ser3_data__WIDTH 1
+#define R_IRQ_MASK1_SET__ser3_data__set 1
+#define R_IRQ_MASK1_SET__ser3_data__nop 0
+#define R_IRQ_MASK1_SET__ser2_ready__BITNR 13
+#define R_IRQ_MASK1_SET__ser2_ready__WIDTH 1
+#define R_IRQ_MASK1_SET__ser2_ready__set 1
+#define R_IRQ_MASK1_SET__ser2_ready__nop 0
+#define R_IRQ_MASK1_SET__ser2_data__BITNR 12
+#define R_IRQ_MASK1_SET__ser2_data__WIDTH 1
+#define R_IRQ_MASK1_SET__ser2_data__set 1
+#define R_IRQ_MASK1_SET__ser2_data__nop 0
+#define R_IRQ_MASK1_SET__ser1_ready__BITNR 11
+#define R_IRQ_MASK1_SET__ser1_ready__WIDTH 1
+#define R_IRQ_MASK1_SET__ser1_ready__set 1
+#define R_IRQ_MASK1_SET__ser1_ready__nop 0
+#define R_IRQ_MASK1_SET__ser1_data__BITNR 10
+#define R_IRQ_MASK1_SET__ser1_data__WIDTH 1
+#define R_IRQ_MASK1_SET__ser1_data__set 1
+#define R_IRQ_MASK1_SET__ser1_data__nop 0
+#define R_IRQ_MASK1_SET__ser0_ready__BITNR 9
+#define R_IRQ_MASK1_SET__ser0_ready__WIDTH 1
+#define R_IRQ_MASK1_SET__ser0_ready__set 1
+#define R_IRQ_MASK1_SET__ser0_ready__nop 0
+#define R_IRQ_MASK1_SET__ser0_data__BITNR 8
+#define R_IRQ_MASK1_SET__ser0_data__WIDTH 1
+#define R_IRQ_MASK1_SET__ser0_data__set 1
+#define R_IRQ_MASK1_SET__ser0_data__nop 0
+#define R_IRQ_MASK1_SET__pa7__BITNR 7
+#define R_IRQ_MASK1_SET__pa7__WIDTH 1
+#define R_IRQ_MASK1_SET__pa7__set 1
+#define R_IRQ_MASK1_SET__pa7__nop 0
+#define R_IRQ_MASK1_SET__pa6__BITNR 6
+#define R_IRQ_MASK1_SET__pa6__WIDTH 1
+#define R_IRQ_MASK1_SET__pa6__set 1
+#define R_IRQ_MASK1_SET__pa6__nop 0
+#define R_IRQ_MASK1_SET__pa5__BITNR 5
+#define R_IRQ_MASK1_SET__pa5__WIDTH 1
+#define R_IRQ_MASK1_SET__pa5__set 1
+#define R_IRQ_MASK1_SET__pa5__nop 0
+#define R_IRQ_MASK1_SET__pa4__BITNR 4
+#define R_IRQ_MASK1_SET__pa4__WIDTH 1
+#define R_IRQ_MASK1_SET__pa4__set 1
+#define R_IRQ_MASK1_SET__pa4__nop 0
+#define R_IRQ_MASK1_SET__pa3__BITNR 3
+#define R_IRQ_MASK1_SET__pa3__WIDTH 1
+#define R_IRQ_MASK1_SET__pa3__set 1
+#define R_IRQ_MASK1_SET__pa3__nop 0
+#define R_IRQ_MASK1_SET__pa2__BITNR 2
+#define R_IRQ_MASK1_SET__pa2__WIDTH 1
+#define R_IRQ_MASK1_SET__pa2__set 1
+#define R_IRQ_MASK1_SET__pa2__nop 0
+#define R_IRQ_MASK1_SET__pa1__BITNR 1
+#define R_IRQ_MASK1_SET__pa1__WIDTH 1
+#define R_IRQ_MASK1_SET__pa1__set 1
+#define R_IRQ_MASK1_SET__pa1__nop 0
+#define R_IRQ_MASK1_SET__pa0__BITNR 0
+#define R_IRQ_MASK1_SET__pa0__WIDTH 1
+#define R_IRQ_MASK1_SET__pa0__set 1
+#define R_IRQ_MASK1_SET__pa0__nop 0
+
+#define R_IRQ_MASK2_RD (IO_TYPECAST_RO_UDWORD 0xb00000d0)
+#define R_IRQ_MASK2_RD__dma8_sub3_descr__BITNR 23
+#define R_IRQ_MASK2_RD__dma8_sub3_descr__WIDTH 1
+#define R_IRQ_MASK2_RD__dma8_sub3_descr__active 1
+#define R_IRQ_MASK2_RD__dma8_sub3_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma8_sub2_descr__BITNR 22
+#define R_IRQ_MASK2_RD__dma8_sub2_descr__WIDTH 1
+#define R_IRQ_MASK2_RD__dma8_sub2_descr__active 1
+#define R_IRQ_MASK2_RD__dma8_sub2_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma8_sub1_descr__BITNR 21
+#define R_IRQ_MASK2_RD__dma8_sub1_descr__WIDTH 1
+#define R_IRQ_MASK2_RD__dma8_sub1_descr__active 1
+#define R_IRQ_MASK2_RD__dma8_sub1_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma8_sub0_descr__BITNR 20
+#define R_IRQ_MASK2_RD__dma8_sub0_descr__WIDTH 1
+#define R_IRQ_MASK2_RD__dma8_sub0_descr__active 1
+#define R_IRQ_MASK2_RD__dma8_sub0_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma9_eop__BITNR 19
+#define R_IRQ_MASK2_RD__dma9_eop__WIDTH 1
+#define R_IRQ_MASK2_RD__dma9_eop__active 1
+#define R_IRQ_MASK2_RD__dma9_eop__inactive 0
+#define R_IRQ_MASK2_RD__dma9_descr__BITNR 18
+#define R_IRQ_MASK2_RD__dma9_descr__WIDTH 1
+#define R_IRQ_MASK2_RD__dma9_descr__active 1
+#define R_IRQ_MASK2_RD__dma9_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma8_eop__BITNR 17
+#define R_IRQ_MASK2_RD__dma8_eop__WIDTH 1
+#define R_IRQ_MASK2_RD__dma8_eop__active 1
+#define R_IRQ_MASK2_RD__dma8_eop__inactive 0
+#define R_IRQ_MASK2_RD__dma8_descr__BITNR 16
+#define R_IRQ_MASK2_RD__dma8_descr__WIDTH 1
+#define R_IRQ_MASK2_RD__dma8_descr__active 1
+#define R_IRQ_MASK2_RD__dma8_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma7_eop__BITNR 15
+#define R_IRQ_MASK2_RD__dma7_eop__WIDTH 1
+#define R_IRQ_MASK2_RD__dma7_eop__active 1
+#define R_IRQ_MASK2_RD__dma7_eop__inactive 0
+#define R_IRQ_MASK2_RD__dma7_descr__BITNR 14
+#define R_IRQ_MASK2_RD__dma7_descr__WIDTH 1
+#define R_IRQ_MASK2_RD__dma7_descr__active 1
+#define R_IRQ_MASK2_RD__dma7_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma6_eop__BITNR 13
+#define R_IRQ_MASK2_RD__dma6_eop__WIDTH 1
+#define R_IRQ_MASK2_RD__dma6_eop__active 1
+#define R_IRQ_MASK2_RD__dma6_eop__inactive 0
+#define R_IRQ_MASK2_RD__dma6_descr__BITNR 12
+#define R_IRQ_MASK2_RD__dma6_descr__WIDTH 1
+#define R_IRQ_MASK2_RD__dma6_descr__active 1
+#define R_IRQ_MASK2_RD__dma6_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma5_eop__BITNR 11
+#define R_IRQ_MASK2_RD__dma5_eop__WIDTH 1
+#define R_IRQ_MASK2_RD__dma5_eop__active 1
+#define R_IRQ_MASK2_RD__dma5_eop__inactive 0
+#define R_IRQ_MASK2_RD__dma5_descr__BITNR 10
+#define R_IRQ_MASK2_RD__dma5_descr__WIDTH 1
+#define R_IRQ_MASK2_RD__dma5_descr__active 1
+#define R_IRQ_MASK2_RD__dma5_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma4_eop__BITNR 9
+#define R_IRQ_MASK2_RD__dma4_eop__WIDTH 1
+#define R_IRQ_MASK2_RD__dma4_eop__active 1
+#define R_IRQ_MASK2_RD__dma4_eop__inactive 0
+#define R_IRQ_MASK2_RD__dma4_descr__BITNR 8
+#define R_IRQ_MASK2_RD__dma4_descr__WIDTH 1
+#define R_IRQ_MASK2_RD__dma4_descr__active 1
+#define R_IRQ_MASK2_RD__dma4_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma3_eop__BITNR 7
+#define R_IRQ_MASK2_RD__dma3_eop__WIDTH 1
+#define R_IRQ_MASK2_RD__dma3_eop__active 1
+#define R_IRQ_MASK2_RD__dma3_eop__inactive 0
+#define R_IRQ_MASK2_RD__dma3_descr__BITNR 6
+#define R_IRQ_MASK2_RD__dma3_descr__WIDTH 1
+#define R_IRQ_MASK2_RD__dma3_descr__active 1
+#define R_IRQ_MASK2_RD__dma3_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma2_eop__BITNR 5
+#define R_IRQ_MASK2_RD__dma2_eop__WIDTH 1
+#define R_IRQ_MASK2_RD__dma2_eop__active 1
+#define R_IRQ_MASK2_RD__dma2_eop__inactive 0
+#define R_IRQ_MASK2_RD__dma2_descr__BITNR 4
+#define R_IRQ_MASK2_RD__dma2_descr__WIDTH 1
+#define R_IRQ_MASK2_RD__dma2_descr__active 1
+#define R_IRQ_MASK2_RD__dma2_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma1_eop__BITNR 3
+#define R_IRQ_MASK2_RD__dma1_eop__WIDTH 1
+#define R_IRQ_MASK2_RD__dma1_eop__active 1
+#define R_IRQ_MASK2_RD__dma1_eop__inactive 0
+#define R_IRQ_MASK2_RD__dma1_descr__BITNR 2
+#define R_IRQ_MASK2_RD__dma1_descr__WIDTH 1
+#define R_IRQ_MASK2_RD__dma1_descr__active 1
+#define R_IRQ_MASK2_RD__dma1_descr__inactive 0
+#define R_IRQ_MASK2_RD__dma0_eop__BITNR 1
+#define R_IRQ_MASK2_RD__dma0_eop__WIDTH 1
+#define R_IRQ_MASK2_RD__dma0_eop__active 1
+#define R_IRQ_MASK2_RD__dma0_eop__inactive 0
+#define R_IRQ_MASK2_RD__dma0_descr__BITNR 0
+#define R_IRQ_MASK2_RD__dma0_descr__WIDTH 1
+#define R_IRQ_MASK2_RD__dma0_descr__active 1
+#define R_IRQ_MASK2_RD__dma0_descr__inactive 0
+
+#define R_IRQ_MASK2_CLR (IO_TYPECAST_UDWORD 0xb00000d0)
+#define R_IRQ_MASK2_CLR__dma8_sub3_descr__BITNR 23
+#define R_IRQ_MASK2_CLR__dma8_sub3_descr__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma8_sub3_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma8_sub3_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma8_sub2_descr__BITNR 22
+#define R_IRQ_MASK2_CLR__dma8_sub2_descr__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma8_sub2_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma8_sub2_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma8_sub1_descr__BITNR 21
+#define R_IRQ_MASK2_CLR__dma8_sub1_descr__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma8_sub1_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma8_sub1_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma8_sub0_descr__BITNR 20
+#define R_IRQ_MASK2_CLR__dma8_sub0_descr__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma8_sub0_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma8_sub0_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma9_eop__BITNR 19
+#define R_IRQ_MASK2_CLR__dma9_eop__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma9_eop__clr 1
+#define R_IRQ_MASK2_CLR__dma9_eop__nop 0
+#define R_IRQ_MASK2_CLR__dma9_descr__BITNR 18
+#define R_IRQ_MASK2_CLR__dma9_descr__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma9_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma9_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma8_eop__BITNR 17
+#define R_IRQ_MASK2_CLR__dma8_eop__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma8_eop__clr 1
+#define R_IRQ_MASK2_CLR__dma8_eop__nop 0
+#define R_IRQ_MASK2_CLR__dma8_descr__BITNR 16
+#define R_IRQ_MASK2_CLR__dma8_descr__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma8_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma8_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma7_eop__BITNR 15
+#define R_IRQ_MASK2_CLR__dma7_eop__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma7_eop__clr 1
+#define R_IRQ_MASK2_CLR__dma7_eop__nop 0
+#define R_IRQ_MASK2_CLR__dma7_descr__BITNR 14
+#define R_IRQ_MASK2_CLR__dma7_descr__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma7_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma7_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma6_eop__BITNR 13
+#define R_IRQ_MASK2_CLR__dma6_eop__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma6_eop__clr 1
+#define R_IRQ_MASK2_CLR__dma6_eop__nop 0
+#define R_IRQ_MASK2_CLR__dma6_descr__BITNR 12
+#define R_IRQ_MASK2_CLR__dma6_descr__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma6_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma6_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma5_eop__BITNR 11
+#define R_IRQ_MASK2_CLR__dma5_eop__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma5_eop__clr 1
+#define R_IRQ_MASK2_CLR__dma5_eop__nop 0
+#define R_IRQ_MASK2_CLR__dma5_descr__BITNR 10
+#define R_IRQ_MASK2_CLR__dma5_descr__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma5_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma5_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma4_eop__BITNR 9
+#define R_IRQ_MASK2_CLR__dma4_eop__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma4_eop__clr 1
+#define R_IRQ_MASK2_CLR__dma4_eop__nop 0
+#define R_IRQ_MASK2_CLR__dma4_descr__BITNR 8
+#define R_IRQ_MASK2_CLR__dma4_descr__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma4_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma4_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma3_eop__BITNR 7
+#define R_IRQ_MASK2_CLR__dma3_eop__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma3_eop__clr 1
+#define R_IRQ_MASK2_CLR__dma3_eop__nop 0
+#define R_IRQ_MASK2_CLR__dma3_descr__BITNR 6
+#define R_IRQ_MASK2_CLR__dma3_descr__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma3_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma3_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma2_eop__BITNR 5
+#define R_IRQ_MASK2_CLR__dma2_eop__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma2_eop__clr 1
+#define R_IRQ_MASK2_CLR__dma2_eop__nop 0
+#define R_IRQ_MASK2_CLR__dma2_descr__BITNR 4
+#define R_IRQ_MASK2_CLR__dma2_descr__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma2_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma2_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma1_eop__BITNR 3
+#define R_IRQ_MASK2_CLR__dma1_eop__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma1_eop__clr 1
+#define R_IRQ_MASK2_CLR__dma1_eop__nop 0
+#define R_IRQ_MASK2_CLR__dma1_descr__BITNR 2
+#define R_IRQ_MASK2_CLR__dma1_descr__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma1_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma1_descr__nop 0
+#define R_IRQ_MASK2_CLR__dma0_eop__BITNR 1
+#define R_IRQ_MASK2_CLR__dma0_eop__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma0_eop__clr 1
+#define R_IRQ_MASK2_CLR__dma0_eop__nop 0
+#define R_IRQ_MASK2_CLR__dma0_descr__BITNR 0
+#define R_IRQ_MASK2_CLR__dma0_descr__WIDTH 1
+#define R_IRQ_MASK2_CLR__dma0_descr__clr 1
+#define R_IRQ_MASK2_CLR__dma0_descr__nop 0
+
+#define R_IRQ_READ2 (IO_TYPECAST_RO_UDWORD 0xb00000d4)
+#define R_IRQ_READ2__dma8_sub3_descr__BITNR 23
+#define R_IRQ_READ2__dma8_sub3_descr__WIDTH 1
+#define R_IRQ_READ2__dma8_sub3_descr__active 1
+#define R_IRQ_READ2__dma8_sub3_descr__inactive 0
+#define R_IRQ_READ2__dma8_sub2_descr__BITNR 22
+#define R_IRQ_READ2__dma8_sub2_descr__WIDTH 1
+#define R_IRQ_READ2__dma8_sub2_descr__active 1
+#define R_IRQ_READ2__dma8_sub2_descr__inactive 0
+#define R_IRQ_READ2__dma8_sub1_descr__BITNR 21
+#define R_IRQ_READ2__dma8_sub1_descr__WIDTH 1
+#define R_IRQ_READ2__dma8_sub1_descr__active 1
+#define R_IRQ_READ2__dma8_sub1_descr__inactive 0
+#define R_IRQ_READ2__dma8_sub0_descr__BITNR 20
+#define R_IRQ_READ2__dma8_sub0_descr__WIDTH 1
+#define R_IRQ_READ2__dma8_sub0_descr__active 1
+#define R_IRQ_READ2__dma8_sub0_descr__inactive 0
+#define R_IRQ_READ2__dma9_eop__BITNR 19
+#define R_IRQ_READ2__dma9_eop__WIDTH 1
+#define R_IRQ_READ2__dma9_eop__active 1
+#define R_IRQ_READ2__dma9_eop__inactive 0
+#define R_IRQ_READ2__dma9_descr__BITNR 18
+#define R_IRQ_READ2__dma9_descr__WIDTH 1
+#define R_IRQ_READ2__dma9_descr__active 1
+#define R_IRQ_READ2__dma9_descr__inactive 0
+#define R_IRQ_READ2__dma8_eop__BITNR 17
+#define R_IRQ_READ2__dma8_eop__WIDTH 1
+#define R_IRQ_READ2__dma8_eop__active 1
+#define R_IRQ_READ2__dma8_eop__inactive 0
+#define R_IRQ_READ2__dma8_descr__BITNR 16
+#define R_IRQ_READ2__dma8_descr__WIDTH 1
+#define R_IRQ_READ2__dma8_descr__active 1
+#define R_IRQ_READ2__dma8_descr__inactive 0
+#define R_IRQ_READ2__dma7_eop__BITNR 15
+#define R_IRQ_READ2__dma7_eop__WIDTH 1
+#define R_IRQ_READ2__dma7_eop__active 1
+#define R_IRQ_READ2__dma7_eop__inactive 0
+#define R_IRQ_READ2__dma7_descr__BITNR 14
+#define R_IRQ_READ2__dma7_descr__WIDTH 1
+#define R_IRQ_READ2__dma7_descr__active 1
+#define R_IRQ_READ2__dma7_descr__inactive 0
+#define R_IRQ_READ2__dma6_eop__BITNR 13
+#define R_IRQ_READ2__dma6_eop__WIDTH 1
+#define R_IRQ_READ2__dma6_eop__active 1
+#define R_IRQ_READ2__dma6_eop__inactive 0
+#define R_IRQ_READ2__dma6_descr__BITNR 12
+#define R_IRQ_READ2__dma6_descr__WIDTH 1
+#define R_IRQ_READ2__dma6_descr__active 1
+#define R_IRQ_READ2__dma6_descr__inactive 0
+#define R_IRQ_READ2__dma5_eop__BITNR 11
+#define R_IRQ_READ2__dma5_eop__WIDTH 1
+#define R_IRQ_READ2__dma5_eop__active 1
+#define R_IRQ_READ2__dma5_eop__inactive 0
+#define R_IRQ_READ2__dma5_descr__BITNR 10
+#define R_IRQ_READ2__dma5_descr__WIDTH 1
+#define R_IRQ_READ2__dma5_descr__active 1
+#define R_IRQ_READ2__dma5_descr__inactive 0
+#define R_IRQ_READ2__dma4_eop__BITNR 9
+#define R_IRQ_READ2__dma4_eop__WIDTH 1
+#define R_IRQ_READ2__dma4_eop__active 1
+#define R_IRQ_READ2__dma4_eop__inactive 0
+#define R_IRQ_READ2__dma4_descr__BITNR 8
+#define R_IRQ_READ2__dma4_descr__WIDTH 1
+#define R_IRQ_READ2__dma4_descr__active 1
+#define R_IRQ_READ2__dma4_descr__inactive 0
+#define R_IRQ_READ2__dma3_eop__BITNR 7
+#define R_IRQ_READ2__dma3_eop__WIDTH 1
+#define R_IRQ_READ2__dma3_eop__active 1
+#define R_IRQ_READ2__dma3_eop__inactive 0
+#define R_IRQ_READ2__dma3_descr__BITNR 6
+#define R_IRQ_READ2__dma3_descr__WIDTH 1
+#define R_IRQ_READ2__dma3_descr__active 1
+#define R_IRQ_READ2__dma3_descr__inactive 0
+#define R_IRQ_READ2__dma2_eop__BITNR 5
+#define R_IRQ_READ2__dma2_eop__WIDTH 1
+#define R_IRQ_READ2__dma2_eop__active 1
+#define R_IRQ_READ2__dma2_eop__inactive 0
+#define R_IRQ_READ2__dma2_descr__BITNR 4
+#define R_IRQ_READ2__dma2_descr__WIDTH 1
+#define R_IRQ_READ2__dma2_descr__active 1
+#define R_IRQ_READ2__dma2_descr__inactive 0
+#define R_IRQ_READ2__dma1_eop__BITNR 3
+#define R_IRQ_READ2__dma1_eop__WIDTH 1
+#define R_IRQ_READ2__dma1_eop__active 1
+#define R_IRQ_READ2__dma1_eop__inactive 0
+#define R_IRQ_READ2__dma1_descr__BITNR 2
+#define R_IRQ_READ2__dma1_descr__WIDTH 1
+#define R_IRQ_READ2__dma1_descr__active 1
+#define R_IRQ_READ2__dma1_descr__inactive 0
+#define R_IRQ_READ2__dma0_eop__BITNR 1
+#define R_IRQ_READ2__dma0_eop__WIDTH 1
+#define R_IRQ_READ2__dma0_eop__active 1
+#define R_IRQ_READ2__dma0_eop__inactive 0
+#define R_IRQ_READ2__dma0_descr__BITNR 0
+#define R_IRQ_READ2__dma0_descr__WIDTH 1
+#define R_IRQ_READ2__dma0_descr__active 1
+#define R_IRQ_READ2__dma0_descr__inactive 0
+
+#define R_IRQ_MASK2_SET (IO_TYPECAST_UDWORD 0xb00000d4)
+#define R_IRQ_MASK2_SET__dma8_sub3_descr__BITNR 23
+#define R_IRQ_MASK2_SET__dma8_sub3_descr__WIDTH 1
+#define R_IRQ_MASK2_SET__dma8_sub3_descr__set 1
+#define R_IRQ_MASK2_SET__dma8_sub3_descr__nop 0
+#define R_IRQ_MASK2_SET__dma8_sub2_descr__BITNR 22
+#define R_IRQ_MASK2_SET__dma8_sub2_descr__WIDTH 1
+#define R_IRQ_MASK2_SET__dma8_sub2_descr__set 1
+#define R_IRQ_MASK2_SET__dma8_sub2_descr__nop 0
+#define R_IRQ_MASK2_SET__dma8_sub1_descr__BITNR 21
+#define R_IRQ_MASK2_SET__dma8_sub1_descr__WIDTH 1
+#define R_IRQ_MASK2_SET__dma8_sub1_descr__set 1
+#define R_IRQ_MASK2_SET__dma8_sub1_descr__nop 0
+#define R_IRQ_MASK2_SET__dma8_sub0_descr__BITNR 20
+#define R_IRQ_MASK2_SET__dma8_sub0_descr__WIDTH 1
+#define R_IRQ_MASK2_SET__dma8_sub0_descr__set 1
+#define R_IRQ_MASK2_SET__dma8_sub0_descr__nop 0
+#define R_IRQ_MASK2_SET__dma9_eop__BITNR 19
+#define R_IRQ_MASK2_SET__dma9_eop__WIDTH 1
+#define R_IRQ_MASK2_SET__dma9_eop__set 1
+#define R_IRQ_MASK2_SET__dma9_eop__nop 0
+#define R_IRQ_MASK2_SET__dma9_descr__BITNR 18
+#define R_IRQ_MASK2_SET__dma9_descr__WIDTH 1
+#define R_IRQ_MASK2_SET__dma9_descr__set 1
+#define R_IRQ_MASK2_SET__dma9_descr__nop 0
+#define R_IRQ_MASK2_SET__dma8_eop__BITNR 17
+#define R_IRQ_MASK2_SET__dma8_eop__WIDTH 1
+#define R_IRQ_MASK2_SET__dma8_eop__set 1
+#define R_IRQ_MASK2_SET__dma8_eop__nop 0
+#define R_IRQ_MASK2_SET__dma8_descr__BITNR 16
+#define R_IRQ_MASK2_SET__dma8_descr__WIDTH 1
+#define R_IRQ_MASK2_SET__dma8_descr__set 1
+#define R_IRQ_MASK2_SET__dma8_descr__nop 0
+#define R_IRQ_MASK2_SET__dma7_eop__BITNR 15
+#define R_IRQ_MASK2_SET__dma7_eop__WIDTH 1
+#define R_IRQ_MASK2_SET__dma7_eop__set 1
+#define R_IRQ_MASK2_SET__dma7_eop__nop 0
+#define R_IRQ_MASK2_SET__dma7_descr__BITNR 14
+#define R_IRQ_MASK2_SET__dma7_descr__WIDTH 1
+#define R_IRQ_MASK2_SET__dma7_descr__set 1
+#define R_IRQ_MASK2_SET__dma7_descr__nop 0
+#define R_IRQ_MASK2_SET__dma6_eop__BITNR 13
+#define R_IRQ_MASK2_SET__dma6_eop__WIDTH 1
+#define R_IRQ_MASK2_SET__dma6_eop__set 1
+#define R_IRQ_MASK2_SET__dma6_eop__nop 0
+#define R_IRQ_MASK2_SET__dma6_descr__BITNR 12
+#define R_IRQ_MASK2_SET__dma6_descr__WIDTH 1
+#define R_IRQ_MASK2_SET__dma6_descr__set 1
+#define R_IRQ_MASK2_SET__dma6_descr__nop 0
+#define R_IRQ_MASK2_SET__dma5_eop__BITNR 11
+#define R_IRQ_MASK2_SET__dma5_eop__WIDTH 1
+#define R_IRQ_MASK2_SET__dma5_eop__set 1
+#define R_IRQ_MASK2_SET__dma5_eop__nop 0
+#define R_IRQ_MASK2_SET__dma5_descr__BITNR 10
+#define R_IRQ_MASK2_SET__dma5_descr__WIDTH 1
+#define R_IRQ_MASK2_SET__dma5_descr__set 1
+#define R_IRQ_MASK2_SET__dma5_descr__nop 0
+#define R_IRQ_MASK2_SET__dma4_eop__BITNR 9
+#define R_IRQ_MASK2_SET__dma4_eop__WIDTH 1
+#define R_IRQ_MASK2_SET__dma4_eop__set 1
+#define R_IRQ_MASK2_SET__dma4_eop__nop 0
+#define R_IRQ_MASK2_SET__dma4_descr__BITNR 8
+#define R_IRQ_MASK2_SET__dma4_descr__WIDTH 1
+#define R_IRQ_MASK2_SET__dma4_descr__set 1
+#define R_IRQ_MASK2_SET__dma4_descr__nop 0
+#define R_IRQ_MASK2_SET__dma3_eop__BITNR 7
+#define R_IRQ_MASK2_SET__dma3_eop__WIDTH 1
+#define R_IRQ_MASK2_SET__dma3_eop__set 1
+#define R_IRQ_MASK2_SET__dma3_eop__nop 0
+#define R_IRQ_MASK2_SET__dma3_descr__BITNR 6
+#define R_IRQ_MASK2_SET__dma3_descr__WIDTH 1
+#define R_IRQ_MASK2_SET__dma3_descr__set 1
+#define R_IRQ_MASK2_SET__dma3_descr__nop 0
+#define R_IRQ_MASK2_SET__dma2_eop__BITNR 5
+#define R_IRQ_MASK2_SET__dma2_eop__WIDTH 1
+#define R_IRQ_MASK2_SET__dma2_eop__set 1
+#define R_IRQ_MASK2_SET__dma2_eop__nop 0
+#define R_IRQ_MASK2_SET__dma2_descr__BITNR 4
+#define R_IRQ_MASK2_SET__dma2_descr__WIDTH 1
+#define R_IRQ_MASK2_SET__dma2_descr__set 1
+#define R_IRQ_MASK2_SET__dma2_descr__nop 0
+#define R_IRQ_MASK2_SET__dma1_eop__BITNR 3
+#define R_IRQ_MASK2_SET__dma1_eop__WIDTH 1
+#define R_IRQ_MASK2_SET__dma1_eop__set 1
+#define R_IRQ_MASK2_SET__dma1_eop__nop 0
+#define R_IRQ_MASK2_SET__dma1_descr__BITNR 2
+#define R_IRQ_MASK2_SET__dma1_descr__WIDTH 1
+#define R_IRQ_MASK2_SET__dma1_descr__set 1
+#define R_IRQ_MASK2_SET__dma1_descr__nop 0
+#define R_IRQ_MASK2_SET__dma0_eop__BITNR 1
+#define R_IRQ_MASK2_SET__dma0_eop__WIDTH 1
+#define R_IRQ_MASK2_SET__dma0_eop__set 1
+#define R_IRQ_MASK2_SET__dma0_eop__nop 0
+#define R_IRQ_MASK2_SET__dma0_descr__BITNR 0
+#define R_IRQ_MASK2_SET__dma0_descr__WIDTH 1
+#define R_IRQ_MASK2_SET__dma0_descr__set 1
+#define R_IRQ_MASK2_SET__dma0_descr__nop 0
+
+#define R_VECT_MASK_RD (IO_TYPECAST_RO_UDWORD 0xb00000d8)
+#define R_VECT_MASK_RD__usb__BITNR 31
+#define R_VECT_MASK_RD__usb__WIDTH 1
+#define R_VECT_MASK_RD__usb__active 1
+#define R_VECT_MASK_RD__usb__inactive 0
+#define R_VECT_MASK_RD__dma9__BITNR 25
+#define R_VECT_MASK_RD__dma9__WIDTH 1
+#define R_VECT_MASK_RD__dma9__active 1
+#define R_VECT_MASK_RD__dma9__inactive 0
+#define R_VECT_MASK_RD__dma8__BITNR 24
+#define R_VECT_MASK_RD__dma8__WIDTH 1
+#define R_VECT_MASK_RD__dma8__active 1
+#define R_VECT_MASK_RD__dma8__inactive 0
+#define R_VECT_MASK_RD__dma7__BITNR 23
+#define R_VECT_MASK_RD__dma7__WIDTH 1
+#define R_VECT_MASK_RD__dma7__active 1
+#define R_VECT_MASK_RD__dma7__inactive 0
+#define R_VECT_MASK_RD__dma6__BITNR 22
+#define R_VECT_MASK_RD__dma6__WIDTH 1
+#define R_VECT_MASK_RD__dma6__active 1
+#define R_VECT_MASK_RD__dma6__inactive 0
+#define R_VECT_MASK_RD__dma5__BITNR 21
+#define R_VECT_MASK_RD__dma5__WIDTH 1
+#define R_VECT_MASK_RD__dma5__active 1
+#define R_VECT_MASK_RD__dma5__inactive 0
+#define R_VECT_MASK_RD__dma4__BITNR 20
+#define R_VECT_MASK_RD__dma4__WIDTH 1
+#define R_VECT_MASK_RD__dma4__active 1
+#define R_VECT_MASK_RD__dma4__inactive 0
+#define R_VECT_MASK_RD__dma3__BITNR 19
+#define R_VECT_MASK_RD__dma3__WIDTH 1
+#define R_VECT_MASK_RD__dma3__active 1
+#define R_VECT_MASK_RD__dma3__inactive 0
+#define R_VECT_MASK_RD__dma2__BITNR 18
+#define R_VECT_MASK_RD__dma2__WIDTH 1
+#define R_VECT_MASK_RD__dma2__active 1
+#define R_VECT_MASK_RD__dma2__inactive 0
+#define R_VECT_MASK_RD__dma1__BITNR 17
+#define R_VECT_MASK_RD__dma1__WIDTH 1
+#define R_VECT_MASK_RD__dma1__active 1
+#define R_VECT_MASK_RD__dma1__inactive 0
+#define R_VECT_MASK_RD__dma0__BITNR 16
+#define R_VECT_MASK_RD__dma0__WIDTH 1
+#define R_VECT_MASK_RD__dma0__active 1
+#define R_VECT_MASK_RD__dma0__inactive 0
+#define R_VECT_MASK_RD__ext_dma1__BITNR 13
+#define R_VECT_MASK_RD__ext_dma1__WIDTH 1
+#define R_VECT_MASK_RD__ext_dma1__active 1
+#define R_VECT_MASK_RD__ext_dma1__inactive 0
+#define R_VECT_MASK_RD__ext_dma0__BITNR 12
+#define R_VECT_MASK_RD__ext_dma0__WIDTH 1
+#define R_VECT_MASK_RD__ext_dma0__active 1
+#define R_VECT_MASK_RD__ext_dma0__inactive 0
+#define R_VECT_MASK_RD__pa__BITNR 11
+#define R_VECT_MASK_RD__pa__WIDTH 1
+#define R_VECT_MASK_RD__pa__active 1
+#define R_VECT_MASK_RD__pa__inactive 0
+#define R_VECT_MASK_RD__irq_intnr__BITNR 10
+#define R_VECT_MASK_RD__irq_intnr__WIDTH 1
+#define R_VECT_MASK_RD__irq_intnr__active 1
+#define R_VECT_MASK_RD__irq_intnr__inactive 0
+#define R_VECT_MASK_RD__sw__BITNR 9
+#define R_VECT_MASK_RD__sw__WIDTH 1
+#define R_VECT_MASK_RD__sw__active 1
+#define R_VECT_MASK_RD__sw__inactive 0
+#define R_VECT_MASK_RD__serial__BITNR 8
+#define R_VECT_MASK_RD__serial__WIDTH 1
+#define R_VECT_MASK_RD__serial__active 1
+#define R_VECT_MASK_RD__serial__inactive 0
+#define R_VECT_MASK_RD__snmp__BITNR 7
+#define R_VECT_MASK_RD__snmp__WIDTH 1
+#define R_VECT_MASK_RD__snmp__active 1
+#define R_VECT_MASK_RD__snmp__inactive 0
+#define R_VECT_MASK_RD__network__BITNR 6
+#define R_VECT_MASK_RD__network__WIDTH 1
+#define R_VECT_MASK_RD__network__active 1
+#define R_VECT_MASK_RD__network__inactive 0
+#define R_VECT_MASK_RD__scsi1__BITNR 5
+#define R_VECT_MASK_RD__scsi1__WIDTH 1
+#define R_VECT_MASK_RD__scsi1__active 1
+#define R_VECT_MASK_RD__scsi1__inactive 0
+#define R_VECT_MASK_RD__par1__BITNR 5
+#define R_VECT_MASK_RD__par1__WIDTH 1
+#define R_VECT_MASK_RD__par1__active 1
+#define R_VECT_MASK_RD__par1__inactive 0
+#define R_VECT_MASK_RD__scsi0__BITNR 4
+#define R_VECT_MASK_RD__scsi0__WIDTH 1
+#define R_VECT_MASK_RD__scsi0__active 1
+#define R_VECT_MASK_RD__scsi0__inactive 0
+#define R_VECT_MASK_RD__par0__BITNR 4
+#define R_VECT_MASK_RD__par0__WIDTH 1
+#define R_VECT_MASK_RD__par0__active 1
+#define R_VECT_MASK_RD__par0__inactive 0
+#define R_VECT_MASK_RD__ata__BITNR 4
+#define R_VECT_MASK_RD__ata__WIDTH 1
+#define R_VECT_MASK_RD__ata__active 1
+#define R_VECT_MASK_RD__ata__inactive 0
+#define R_VECT_MASK_RD__mio__BITNR 4
+#define R_VECT_MASK_RD__mio__WIDTH 1
+#define R_VECT_MASK_RD__mio__active 1
+#define R_VECT_MASK_RD__mio__inactive 0
+#define R_VECT_MASK_RD__timer1__BITNR 3
+#define R_VECT_MASK_RD__timer1__WIDTH 1
+#define R_VECT_MASK_RD__timer1__active 1
+#define R_VECT_MASK_RD__timer1__inactive 0
+#define R_VECT_MASK_RD__timer0__BITNR 2
+#define R_VECT_MASK_RD__timer0__WIDTH 1
+#define R_VECT_MASK_RD__timer0__active 1
+#define R_VECT_MASK_RD__timer0__inactive 0
+#define R_VECT_MASK_RD__nmi__BITNR 1
+#define R_VECT_MASK_RD__nmi__WIDTH 1
+#define R_VECT_MASK_RD__nmi__active 1
+#define R_VECT_MASK_RD__nmi__inactive 0
+#define R_VECT_MASK_RD__some__BITNR 0
+#define R_VECT_MASK_RD__some__WIDTH 1
+#define R_VECT_MASK_RD__some__active 1
+#define R_VECT_MASK_RD__some__inactive 0
+
+#define R_VECT_MASK_CLR (IO_TYPECAST_UDWORD 0xb00000d8)
+#define R_VECT_MASK_CLR__usb__BITNR 31
+#define R_VECT_MASK_CLR__usb__WIDTH 1
+#define R_VECT_MASK_CLR__usb__clr 1
+#define R_VECT_MASK_CLR__usb__nop 0
+#define R_VECT_MASK_CLR__dma9__BITNR 25
+#define R_VECT_MASK_CLR__dma9__WIDTH 1
+#define R_VECT_MASK_CLR__dma9__clr 1
+#define R_VECT_MASK_CLR__dma9__nop 0
+#define R_VECT_MASK_CLR__dma8__BITNR 24
+#define R_VECT_MASK_CLR__dma8__WIDTH 1
+#define R_VECT_MASK_CLR__dma8__clr 1
+#define R_VECT_MASK_CLR__dma8__nop 0
+#define R_VECT_MASK_CLR__dma7__BITNR 23
+#define R_VECT_MASK_CLR__dma7__WIDTH 1
+#define R_VECT_MASK_CLR__dma7__clr 1
+#define R_VECT_MASK_CLR__dma7__nop 0
+#define R_VECT_MASK_CLR__dma6__BITNR 22
+#define R_VECT_MASK_CLR__dma6__WIDTH 1
+#define R_VECT_MASK_CLR__dma6__clr 1
+#define R_VECT_MASK_CLR__dma6__nop 0
+#define R_VECT_MASK_CLR__dma5__BITNR 21
+#define R_VECT_MASK_CLR__dma5__WIDTH 1
+#define R_VECT_MASK_CLR__dma5__clr 1
+#define R_VECT_MASK_CLR__dma5__nop 0
+#define R_VECT_MASK_CLR__dma4__BITNR 20
+#define R_VECT_MASK_CLR__dma4__WIDTH 1
+#define R_VECT_MASK_CLR__dma4__clr 1
+#define R_VECT_MASK_CLR__dma4__nop 0
+#define R_VECT_MASK_CLR__dma3__BITNR 19
+#define R_VECT_MASK_CLR__dma3__WIDTH 1
+#define R_VECT_MASK_CLR__dma3__clr 1
+#define R_VECT_MASK_CLR__dma3__nop 0
+#define R_VECT_MASK_CLR__dma2__BITNR 18
+#define R_VECT_MASK_CLR__dma2__WIDTH 1
+#define R_VECT_MASK_CLR__dma2__clr 1
+#define R_VECT_MASK_CLR__dma2__nop 0
+#define R_VECT_MASK_CLR__dma1__BITNR 17
+#define R_VECT_MASK_CLR__dma1__WIDTH 1
+#define R_VECT_MASK_CLR__dma1__clr 1
+#define R_VECT_MASK_CLR__dma1__nop 0
+#define R_VECT_MASK_CLR__dma0__BITNR 16
+#define R_VECT_MASK_CLR__dma0__WIDTH 1
+#define R_VECT_MASK_CLR__dma0__clr 1
+#define R_VECT_MASK_CLR__dma0__nop 0
+#define R_VECT_MASK_CLR__ext_dma1__BITNR 13
+#define R_VECT_MASK_CLR__ext_dma1__WIDTH 1
+#define R_VECT_MASK_CLR__ext_dma1__clr 1
+#define R_VECT_MASK_CLR__ext_dma1__nop 0
+#define R_VECT_MASK_CLR__ext_dma0__BITNR 12
+#define R_VECT_MASK_CLR__ext_dma0__WIDTH 1
+#define R_VECT_MASK_CLR__ext_dma0__clr 1
+#define R_VECT_MASK_CLR__ext_dma0__nop 0
+#define R_VECT_MASK_CLR__pa__BITNR 11
+#define R_VECT_MASK_CLR__pa__WIDTH 1
+#define R_VECT_MASK_CLR__pa__clr 1
+#define R_VECT_MASK_CLR__pa__nop 0
+#define R_VECT_MASK_CLR__irq_intnr__BITNR 10
+#define R_VECT_MASK_CLR__irq_intnr__WIDTH 1
+#define R_VECT_MASK_CLR__irq_intnr__clr 1
+#define R_VECT_MASK_CLR__irq_intnr__nop 0
+#define R_VECT_MASK_CLR__sw__BITNR 9
+#define R_VECT_MASK_CLR__sw__WIDTH 1
+#define R_VECT_MASK_CLR__sw__clr 1
+#define R_VECT_MASK_CLR__sw__nop 0
+#define R_VECT_MASK_CLR__serial__BITNR 8
+#define R_VECT_MASK_CLR__serial__WIDTH 1
+#define R_VECT_MASK_CLR__serial__clr 1
+#define R_VECT_MASK_CLR__serial__nop 0
+#define R_VECT_MASK_CLR__snmp__BITNR 7
+#define R_VECT_MASK_CLR__snmp__WIDTH 1
+#define R_VECT_MASK_CLR__snmp__clr 1
+#define R_VECT_MASK_CLR__snmp__nop 0
+#define R_VECT_MASK_CLR__network__BITNR 6
+#define R_VECT_MASK_CLR__network__WIDTH 1
+#define R_VECT_MASK_CLR__network__clr 1
+#define R_VECT_MASK_CLR__network__nop 0
+#define R_VECT_MASK_CLR__scsi1__BITNR 5
+#define R_VECT_MASK_CLR__scsi1__WIDTH 1
+#define R_VECT_MASK_CLR__scsi1__clr 1
+#define R_VECT_MASK_CLR__scsi1__nop 0
+#define R_VECT_MASK_CLR__par1__BITNR 5
+#define R_VECT_MASK_CLR__par1__WIDTH 1
+#define R_VECT_MASK_CLR__par1__clr 1
+#define R_VECT_MASK_CLR__par1__nop 0
+#define R_VECT_MASK_CLR__scsi0__BITNR 4
+#define R_VECT_MASK_CLR__scsi0__WIDTH 1
+#define R_VECT_MASK_CLR__scsi0__clr 1
+#define R_VECT_MASK_CLR__scsi0__nop 0
+#define R_VECT_MASK_CLR__par0__BITNR 4
+#define R_VECT_MASK_CLR__par0__WIDTH 1
+#define R_VECT_MASK_CLR__par0__clr 1
+#define R_VECT_MASK_CLR__par0__nop 0
+#define R_VECT_MASK_CLR__ata__BITNR 4
+#define R_VECT_MASK_CLR__ata__WIDTH 1
+#define R_VECT_MASK_CLR__ata__clr 1
+#define R_VECT_MASK_CLR__ata__nop 0
+#define R_VECT_MASK_CLR__mio__BITNR 4
+#define R_VECT_MASK_CLR__mio__WIDTH 1
+#define R_VECT_MASK_CLR__mio__clr 1
+#define R_VECT_MASK_CLR__mio__nop 0
+#define R_VECT_MASK_CLR__timer1__BITNR 3
+#define R_VECT_MASK_CLR__timer1__WIDTH 1
+#define R_VECT_MASK_CLR__timer1__clr 1
+#define R_VECT_MASK_CLR__timer1__nop 0
+#define R_VECT_MASK_CLR__timer0__BITNR 2
+#define R_VECT_MASK_CLR__timer0__WIDTH 1
+#define R_VECT_MASK_CLR__timer0__clr 1
+#define R_VECT_MASK_CLR__timer0__nop 0
+#define R_VECT_MASK_CLR__nmi__BITNR 1
+#define R_VECT_MASK_CLR__nmi__WIDTH 1
+#define R_VECT_MASK_CLR__nmi__clr 1
+#define R_VECT_MASK_CLR__nmi__nop 0
+#define R_VECT_MASK_CLR__some__BITNR 0
+#define R_VECT_MASK_CLR__some__WIDTH 1
+#define R_VECT_MASK_CLR__some__clr 1
+#define R_VECT_MASK_CLR__some__nop 0
+
+#define R_VECT_READ (IO_TYPECAST_RO_UDWORD 0xb00000dc)
+#define R_VECT_READ__usb__BITNR 31
+#define R_VECT_READ__usb__WIDTH 1
+#define R_VECT_READ__usb__active 1
+#define R_VECT_READ__usb__inactive 0
+#define R_VECT_READ__dma9__BITNR 25
+#define R_VECT_READ__dma9__WIDTH 1
+#define R_VECT_READ__dma9__active 1
+#define R_VECT_READ__dma9__inactive 0
+#define R_VECT_READ__dma8__BITNR 24
+#define R_VECT_READ__dma8__WIDTH 1
+#define R_VECT_READ__dma8__active 1
+#define R_VECT_READ__dma8__inactive 0
+#define R_VECT_READ__dma7__BITNR 23
+#define R_VECT_READ__dma7__WIDTH 1
+#define R_VECT_READ__dma7__active 1
+#define R_VECT_READ__dma7__inactive 0
+#define R_VECT_READ__dma6__BITNR 22
+#define R_VECT_READ__dma6__WIDTH 1
+#define R_VECT_READ__dma6__active 1
+#define R_VECT_READ__dma6__inactive 0
+#define R_VECT_READ__dma5__BITNR 21
+#define R_VECT_READ__dma5__WIDTH 1
+#define R_VECT_READ__dma5__active 1
+#define R_VECT_READ__dma5__inactive 0
+#define R_VECT_READ__dma4__BITNR 20
+#define R_VECT_READ__dma4__WIDTH 1
+#define R_VECT_READ__dma4__active 1
+#define R_VECT_READ__dma4__inactive 0
+#define R_VECT_READ__dma3__BITNR 19
+#define R_VECT_READ__dma3__WIDTH 1
+#define R_VECT_READ__dma3__active 1
+#define R_VECT_READ__dma3__inactive 0
+#define R_VECT_READ__dma2__BITNR 18
+#define R_VECT_READ__dma2__WIDTH 1
+#define R_VECT_READ__dma2__active 1
+#define R_VECT_READ__dma2__inactive 0
+#define R_VECT_READ__dma1__BITNR 17
+#define R_VECT_READ__dma1__WIDTH 1
+#define R_VECT_READ__dma1__active 1
+#define R_VECT_READ__dma1__inactive 0
+#define R_VECT_READ__dma0__BITNR 16
+#define R_VECT_READ__dma0__WIDTH 1
+#define R_VECT_READ__dma0__active 1
+#define R_VECT_READ__dma0__inactive 0
+#define R_VECT_READ__ext_dma1__BITNR 13
+#define R_VECT_READ__ext_dma1__WIDTH 1
+#define R_VECT_READ__ext_dma1__active 1
+#define R_VECT_READ__ext_dma1__inactive 0
+#define R_VECT_READ__ext_dma0__BITNR 12
+#define R_VECT_READ__ext_dma0__WIDTH 1
+#define R_VECT_READ__ext_dma0__active 1
+#define R_VECT_READ__ext_dma0__inactive 0
+#define R_VECT_READ__pa__BITNR 11
+#define R_VECT_READ__pa__WIDTH 1
+#define R_VECT_READ__pa__active 1
+#define R_VECT_READ__pa__inactive 0
+#define R_VECT_READ__irq_intnr__BITNR 10
+#define R_VECT_READ__irq_intnr__WIDTH 1
+#define R_VECT_READ__irq_intnr__active 1
+#define R_VECT_READ__irq_intnr__inactive 0
+#define R_VECT_READ__sw__BITNR 9
+#define R_VECT_READ__sw__WIDTH 1
+#define R_VECT_READ__sw__active 1
+#define R_VECT_READ__sw__inactive 0
+#define R_VECT_READ__serial__BITNR 8
+#define R_VECT_READ__serial__WIDTH 1
+#define R_VECT_READ__serial__active 1
+#define R_VECT_READ__serial__inactive 0
+#define R_VECT_READ__snmp__BITNR 7
+#define R_VECT_READ__snmp__WIDTH 1
+#define R_VECT_READ__snmp__active 1
+#define R_VECT_READ__snmp__inactive 0
+#define R_VECT_READ__network__BITNR 6
+#define R_VECT_READ__network__WIDTH 1
+#define R_VECT_READ__network__active 1
+#define R_VECT_READ__network__inactive 0
+#define R_VECT_READ__scsi1__BITNR 5
+#define R_VECT_READ__scsi1__WIDTH 1
+#define R_VECT_READ__scsi1__active 1
+#define R_VECT_READ__scsi1__inactive 0
+#define R_VECT_READ__par1__BITNR 5
+#define R_VECT_READ__par1__WIDTH 1
+#define R_VECT_READ__par1__active 1
+#define R_VECT_READ__par1__inactive 0
+#define R_VECT_READ__scsi0__BITNR 4
+#define R_VECT_READ__scsi0__WIDTH 1
+#define R_VECT_READ__scsi0__active 1
+#define R_VECT_READ__scsi0__inactive 0
+#define R_VECT_READ__par0__BITNR 4
+#define R_VECT_READ__par0__WIDTH 1
+#define R_VECT_READ__par0__active 1
+#define R_VECT_READ__par0__inactive 0
+#define R_VECT_READ__ata__BITNR 4
+#define R_VECT_READ__ata__WIDTH 1
+#define R_VECT_READ__ata__active 1
+#define R_VECT_READ__ata__inactive 0
+#define R_VECT_READ__mio__BITNR 4
+#define R_VECT_READ__mio__WIDTH 1
+#define R_VECT_READ__mio__active 1
+#define R_VECT_READ__mio__inactive 0
+#define R_VECT_READ__timer1__BITNR 3
+#define R_VECT_READ__timer1__WIDTH 1
+#define R_VECT_READ__timer1__active 1
+#define R_VECT_READ__timer1__inactive 0
+#define R_VECT_READ__timer0__BITNR 2
+#define R_VECT_READ__timer0__WIDTH 1
+#define R_VECT_READ__timer0__active 1
+#define R_VECT_READ__timer0__inactive 0
+#define R_VECT_READ__nmi__BITNR 1
+#define R_VECT_READ__nmi__WIDTH 1
+#define R_VECT_READ__nmi__active 1
+#define R_VECT_READ__nmi__inactive 0
+#define R_VECT_READ__some__BITNR 0
+#define R_VECT_READ__some__WIDTH 1
+#define R_VECT_READ__some__active 1
+#define R_VECT_READ__some__inactive 0
+
+#define R_VECT_MASK_SET (IO_TYPECAST_UDWORD 0xb00000dc)
+#define R_VECT_MASK_SET__usb__BITNR 31
+#define R_VECT_MASK_SET__usb__WIDTH 1
+#define R_VECT_MASK_SET__usb__set 1
+#define R_VECT_MASK_SET__usb__nop 0
+#define R_VECT_MASK_SET__dma9__BITNR 25
+#define R_VECT_MASK_SET__dma9__WIDTH 1
+#define R_VECT_MASK_SET__dma9__set 1
+#define R_VECT_MASK_SET__dma9__nop 0
+#define R_VECT_MASK_SET__dma8__BITNR 24
+#define R_VECT_MASK_SET__dma8__WIDTH 1
+#define R_VECT_MASK_SET__dma8__set 1
+#define R_VECT_MASK_SET__dma8__nop 0
+#define R_VECT_MASK_SET__dma7__BITNR 23
+#define R_VECT_MASK_SET__dma7__WIDTH 1
+#define R_VECT_MASK_SET__dma7__set 1
+#define R_VECT_MASK_SET__dma7__nop 0
+#define R_VECT_MASK_SET__dma6__BITNR 22
+#define R_VECT_MASK_SET__dma6__WIDTH 1
+#define R_VECT_MASK_SET__dma6__set 1
+#define R_VECT_MASK_SET__dma6__nop 0
+#define R_VECT_MASK_SET__dma5__BITNR 21
+#define R_VECT_MASK_SET__dma5__WIDTH 1
+#define R_VECT_MASK_SET__dma5__set 1
+#define R_VECT_MASK_SET__dma5__nop 0
+#define R_VECT_MASK_SET__dma4__BITNR 20
+#define R_VECT_MASK_SET__dma4__WIDTH 1
+#define R_VECT_MASK_SET__dma4__set 1
+#define R_VECT_MASK_SET__dma4__nop 0
+#define R_VECT_MASK_SET__dma3__BITNR 19
+#define R_VECT_MASK_SET__dma3__WIDTH 1
+#define R_VECT_MASK_SET__dma3__set 1
+#define R_VECT_MASK_SET__dma3__nop 0
+#define R_VECT_MASK_SET__dma2__BITNR 18
+#define R_VECT_MASK_SET__dma2__WIDTH 1
+#define R_VECT_MASK_SET__dma2__set 1
+#define R_VECT_MASK_SET__dma2__nop 0
+#define R_VECT_MASK_SET__dma1__BITNR 17
+#define R_VECT_MASK_SET__dma1__WIDTH 1
+#define R_VECT_MASK_SET__dma1__set 1
+#define R_VECT_MASK_SET__dma1__nop 0
+#define R_VECT_MASK_SET__dma0__BITNR 16
+#define R_VECT_MASK_SET__dma0__WIDTH 1
+#define R_VECT_MASK_SET__dma0__set 1
+#define R_VECT_MASK_SET__dma0__nop 0
+#define R_VECT_MASK_SET__ext_dma1__BITNR 13
+#define R_VECT_MASK_SET__ext_dma1__WIDTH 1
+#define R_VECT_MASK_SET__ext_dma1__set 1
+#define R_VECT_MASK_SET__ext_dma1__nop 0
+#define R_VECT_MASK_SET__ext_dma0__BITNR 12
+#define R_VECT_MASK_SET__ext_dma0__WIDTH 1
+#define R_VECT_MASK_SET__ext_dma0__set 1
+#define R_VECT_MASK_SET__ext_dma0__nop 0
+#define R_VECT_MASK_SET__pa__BITNR 11
+#define R_VECT_MASK_SET__pa__WIDTH 1
+#define R_VECT_MASK_SET__pa__set 1
+#define R_VECT_MASK_SET__pa__nop 0
+#define R_VECT_MASK_SET__irq_intnr__BITNR 10
+#define R_VECT_MASK_SET__irq_intnr__WIDTH 1
+#define R_VECT_MASK_SET__irq_intnr__set 1
+#define R_VECT_MASK_SET__irq_intnr__nop 0
+#define R_VECT_MASK_SET__sw__BITNR 9
+#define R_VECT_MASK_SET__sw__WIDTH 1
+#define R_VECT_MASK_SET__sw__set 1
+#define R_VECT_MASK_SET__sw__nop 0
+#define R_VECT_MASK_SET__serial__BITNR 8
+#define R_VECT_MASK_SET__serial__WIDTH 1
+#define R_VECT_MASK_SET__serial__set 1
+#define R_VECT_MASK_SET__serial__nop 0
+#define R_VECT_MASK_SET__snmp__BITNR 7
+#define R_VECT_MASK_SET__snmp__WIDTH 1
+#define R_VECT_MASK_SET__snmp__set 1
+#define R_VECT_MASK_SET__snmp__nop 0
+#define R_VECT_MASK_SET__network__BITNR 6
+#define R_VECT_MASK_SET__network__WIDTH 1
+#define R_VECT_MASK_SET__network__set 1
+#define R_VECT_MASK_SET__network__nop 0
+#define R_VECT_MASK_SET__scsi1__BITNR 5
+#define R_VECT_MASK_SET__scsi1__WIDTH 1
+#define R_VECT_MASK_SET__scsi1__set 1
+#define R_VECT_MASK_SET__scsi1__nop 0
+#define R_VECT_MASK_SET__par1__BITNR 5
+#define R_VECT_MASK_SET__par1__WIDTH 1
+#define R_VECT_MASK_SET__par1__set 1
+#define R_VECT_MASK_SET__par1__nop 0
+#define R_VECT_MASK_SET__scsi0__BITNR 4
+#define R_VECT_MASK_SET__scsi0__WIDTH 1
+#define R_VECT_MASK_SET__scsi0__set 1
+#define R_VECT_MASK_SET__scsi0__nop 0
+#define R_VECT_MASK_SET__par0__BITNR 4
+#define R_VECT_MASK_SET__par0__WIDTH 1
+#define R_VECT_MASK_SET__par0__set 1
+#define R_VECT_MASK_SET__par0__nop 0
+#define R_VECT_MASK_SET__ata__BITNR 4
+#define R_VECT_MASK_SET__ata__WIDTH 1
+#define R_VECT_MASK_SET__ata__set 1
+#define R_VECT_MASK_SET__ata__nop 0
+#define R_VECT_MASK_SET__mio__BITNR 4
+#define R_VECT_MASK_SET__mio__WIDTH 1
+#define R_VECT_MASK_SET__mio__set 1
+#define R_VECT_MASK_SET__mio__nop 0
+#define R_VECT_MASK_SET__timer1__BITNR 3
+#define R_VECT_MASK_SET__timer1__WIDTH 1
+#define R_VECT_MASK_SET__timer1__set 1
+#define R_VECT_MASK_SET__timer1__nop 0
+#define R_VECT_MASK_SET__timer0__BITNR 2
+#define R_VECT_MASK_SET__timer0__WIDTH 1
+#define R_VECT_MASK_SET__timer0__set 1
+#define R_VECT_MASK_SET__timer0__nop 0
+#define R_VECT_MASK_SET__nmi__BITNR 1
+#define R_VECT_MASK_SET__nmi__WIDTH 1
+#define R_VECT_MASK_SET__nmi__set 1
+#define R_VECT_MASK_SET__nmi__nop 0
+#define R_VECT_MASK_SET__some__BITNR 0
+#define R_VECT_MASK_SET__some__WIDTH 1
+#define R_VECT_MASK_SET__some__set 1
+#define R_VECT_MASK_SET__some__nop 0
+
+/*
+!* DMA registers
+!*/
+
+#define R_SET_EOP (IO_TYPECAST_UDWORD 0xb000003c)
+#define R_SET_EOP__ch9_eop__BITNR 3
+#define R_SET_EOP__ch9_eop__WIDTH 1
+#define R_SET_EOP__ch9_eop__set 1
+#define R_SET_EOP__ch9_eop__nop 0
+#define R_SET_EOP__ch7_eop__BITNR 2
+#define R_SET_EOP__ch7_eop__WIDTH 1
+#define R_SET_EOP__ch7_eop__set 1
+#define R_SET_EOP__ch7_eop__nop 0
+#define R_SET_EOP__ch5_eop__BITNR 1
+#define R_SET_EOP__ch5_eop__WIDTH 1
+#define R_SET_EOP__ch5_eop__set 1
+#define R_SET_EOP__ch5_eop__nop 0
+#define R_SET_EOP__ch3_eop__BITNR 0
+#define R_SET_EOP__ch3_eop__WIDTH 1
+#define R_SET_EOP__ch3_eop__set 1
+#define R_SET_EOP__ch3_eop__nop 0
+
+#define R_DMA_CH0_HWSW (IO_TYPECAST_UDWORD 0xb0000100)
+#define R_DMA_CH0_HWSW__hw__BITNR 16
+#define R_DMA_CH0_HWSW__hw__WIDTH 16
+#define R_DMA_CH0_HWSW__sw__BITNR 0
+#define R_DMA_CH0_HWSW__sw__WIDTH 16
+
+#define R_DMA_CH0_DESCR (IO_TYPECAST_UDWORD 0xb000010c)
+#define R_DMA_CH0_DESCR__descr__BITNR 0
+#define R_DMA_CH0_DESCR__descr__WIDTH 32
+
+#define R_DMA_CH0_NEXT (IO_TYPECAST_UDWORD 0xb0000104)
+#define R_DMA_CH0_NEXT__next__BITNR 0
+#define R_DMA_CH0_NEXT__next__WIDTH 32
+
+#define R_DMA_CH0_BUF (IO_TYPECAST_UDWORD 0xb0000108)
+#define R_DMA_CH0_BUF__buf__BITNR 0
+#define R_DMA_CH0_BUF__buf__WIDTH 32
+
+#define R_DMA_CH0_FIRST (IO_TYPECAST_UDWORD 0xb00001a0)
+#define R_DMA_CH0_FIRST__first__BITNR 0
+#define R_DMA_CH0_FIRST__first__WIDTH 32
+
+#define R_DMA_CH0_CMD (IO_TYPECAST_BYTE 0xb00001d0)
+#define R_DMA_CH0_CMD__cmd__BITNR 0
+#define R_DMA_CH0_CMD__cmd__WIDTH 3
+#define R_DMA_CH0_CMD__cmd__hold 0
+#define R_DMA_CH0_CMD__cmd__start 1
+#define R_DMA_CH0_CMD__cmd__restart 3
+#define R_DMA_CH0_CMD__cmd__continue 3
+#define R_DMA_CH0_CMD__cmd__reset 4
+
+#define R_DMA_CH0_CLR_INTR (IO_TYPECAST_BYTE 0xb00001d1)
+#define R_DMA_CH0_CLR_INTR__clr_eop__BITNR 1
+#define R_DMA_CH0_CLR_INTR__clr_eop__WIDTH 1
+#define R_DMA_CH0_CLR_INTR__clr_eop__do 1
+#define R_DMA_CH0_CLR_INTR__clr_eop__dont 0
+#define R_DMA_CH0_CLR_INTR__clr_descr__BITNR 0
+#define R_DMA_CH0_CLR_INTR__clr_descr__WIDTH 1
+#define R_DMA_CH0_CLR_INTR__clr_descr__do 1
+#define R_DMA_CH0_CLR_INTR__clr_descr__dont 0
+
+#define R_DMA_CH0_STATUS (IO_TYPECAST_RO_BYTE 0xb00001d2)
+#define R_DMA_CH0_STATUS__avail__BITNR 0
+#define R_DMA_CH0_STATUS__avail__WIDTH 7
+
+#define R_DMA_CH1_HWSW (IO_TYPECAST_UDWORD 0xb0000110)
+#define R_DMA_CH1_HWSW__hw__BITNR 16
+#define R_DMA_CH1_HWSW__hw__WIDTH 16
+#define R_DMA_CH1_HWSW__sw__BITNR 0
+#define R_DMA_CH1_HWSW__sw__WIDTH 16
+
+#define R_DMA_CH1_DESCR (IO_TYPECAST_UDWORD 0xb000011c)
+#define R_DMA_CH1_DESCR__descr__BITNR 0
+#define R_DMA_CH1_DESCR__descr__WIDTH 32
+
+#define R_DMA_CH1_NEXT (IO_TYPECAST_UDWORD 0xb0000114)
+#define R_DMA_CH1_NEXT__next__BITNR 0
+#define R_DMA_CH1_NEXT__next__WIDTH 32
+
+#define R_DMA_CH1_BUF (IO_TYPECAST_UDWORD 0xb0000118)
+#define R_DMA_CH1_BUF__buf__BITNR 0
+#define R_DMA_CH1_BUF__buf__WIDTH 32
+
+#define R_DMA_CH1_FIRST (IO_TYPECAST_UDWORD 0xb00001a4)
+#define R_DMA_CH1_FIRST__first__BITNR 0
+#define R_DMA_CH1_FIRST__first__WIDTH 32
+
+#define R_DMA_CH1_CMD (IO_TYPECAST_BYTE 0xb00001d4)
+#define R_DMA_CH1_CMD__cmd__BITNR 0
+#define R_DMA_CH1_CMD__cmd__WIDTH 3
+#define R_DMA_CH1_CMD__cmd__hold 0
+#define R_DMA_CH1_CMD__cmd__start 1
+#define R_DMA_CH1_CMD__cmd__restart 3
+#define R_DMA_CH1_CMD__cmd__continue 3
+#define R_DMA_CH1_CMD__cmd__reset 4
+
+#define R_DMA_CH1_CLR_INTR (IO_TYPECAST_BYTE 0xb00001d5)
+#define R_DMA_CH1_CLR_INTR__clr_eop__BITNR 1
+#define R_DMA_CH1_CLR_INTR__clr_eop__WIDTH 1
+#define R_DMA_CH1_CLR_INTR__clr_eop__do 1
+#define R_DMA_CH1_CLR_INTR__clr_eop__dont 0
+#define R_DMA_CH1_CLR_INTR__clr_descr__BITNR 0
+#define R_DMA_CH1_CLR_INTR__clr_descr__WIDTH 1
+#define R_DMA_CH1_CLR_INTR__clr_descr__do 1
+#define R_DMA_CH1_CLR_INTR__clr_descr__dont 0
+
+#define R_DMA_CH1_STATUS (IO_TYPECAST_RO_BYTE 0xb00001d6)
+#define R_DMA_CH1_STATUS__avail__BITNR 0
+#define R_DMA_CH1_STATUS__avail__WIDTH 7
+
+#define R_DMA_CH2_HWSW (IO_TYPECAST_UDWORD 0xb0000120)
+#define R_DMA_CH2_HWSW__hw__BITNR 16
+#define R_DMA_CH2_HWSW__hw__WIDTH 16
+#define R_DMA_CH2_HWSW__sw__BITNR 0
+#define R_DMA_CH2_HWSW__sw__WIDTH 16
+
+#define R_DMA_CH2_DESCR (IO_TYPECAST_UDWORD 0xb000012c)
+#define R_DMA_CH2_DESCR__descr__BITNR 0
+#define R_DMA_CH2_DESCR__descr__WIDTH 32
+
+#define R_DMA_CH2_NEXT (IO_TYPECAST_UDWORD 0xb0000124)
+#define R_DMA_CH2_NEXT__next__BITNR 0
+#define R_DMA_CH2_NEXT__next__WIDTH 32
+
+#define R_DMA_CH2_BUF (IO_TYPECAST_UDWORD 0xb0000128)
+#define R_DMA_CH2_BUF__buf__BITNR 0
+#define R_DMA_CH2_BUF__buf__WIDTH 32
+
+#define R_DMA_CH2_FIRST (IO_TYPECAST_UDWORD 0xb00001a8)
+#define R_DMA_CH2_FIRST__first__BITNR 0
+#define R_DMA_CH2_FIRST__first__WIDTH 32
+
+#define R_DMA_CH2_CMD (IO_TYPECAST_BYTE 0xb00001d8)
+#define R_DMA_CH2_CMD__cmd__BITNR 0
+#define R_DMA_CH2_CMD__cmd__WIDTH 3
+#define R_DMA_CH2_CMD__cmd__hold 0
+#define R_DMA_CH2_CMD__cmd__start 1
+#define R_DMA_CH2_CMD__cmd__restart 3
+#define R_DMA_CH2_CMD__cmd__continue 3
+#define R_DMA_CH2_CMD__cmd__reset 4
+
+#define R_DMA_CH2_CLR_INTR (IO_TYPECAST_BYTE 0xb00001d9)
+#define R_DMA_CH2_CLR_INTR__clr_eop__BITNR 1
+#define R_DMA_CH2_CLR_INTR__clr_eop__WIDTH 1
+#define R_DMA_CH2_CLR_INTR__clr_eop__do 1
+#define R_DMA_CH2_CLR_INTR__clr_eop__dont 0
+#define R_DMA_CH2_CLR_INTR__clr_descr__BITNR 0
+#define R_DMA_CH2_CLR_INTR__clr_descr__WIDTH 1
+#define R_DMA_CH2_CLR_INTR__clr_descr__do 1
+#define R_DMA_CH2_CLR_INTR__clr_descr__dont 0
+
+#define R_DMA_CH2_STATUS (IO_TYPECAST_RO_BYTE 0xb00001da)
+#define R_DMA_CH2_STATUS__avail__BITNR 0
+#define R_DMA_CH2_STATUS__avail__WIDTH 7
+
+#define R_DMA_CH3_HWSW (IO_TYPECAST_UDWORD 0xb0000130)
+#define R_DMA_CH3_HWSW__hw__BITNR 16
+#define R_DMA_CH3_HWSW__hw__WIDTH 16
+#define R_DMA_CH3_HWSW__sw__BITNR 0
+#define R_DMA_CH3_HWSW__sw__WIDTH 16
+
+#define R_DMA_CH3_DESCR (IO_TYPECAST_UDWORD 0xb000013c)
+#define R_DMA_CH3_DESCR__descr__BITNR 0
+#define R_DMA_CH3_DESCR__descr__WIDTH 32
+
+#define R_DMA_CH3_NEXT (IO_TYPECAST_UDWORD 0xb0000134)
+#define R_DMA_CH3_NEXT__next__BITNR 0
+#define R_DMA_CH3_NEXT__next__WIDTH 32
+
+#define R_DMA_CH3_BUF (IO_TYPECAST_UDWORD 0xb0000138)
+#define R_DMA_CH3_BUF__buf__BITNR 0
+#define R_DMA_CH3_BUF__buf__WIDTH 32
+
+#define R_DMA_CH3_FIRST (IO_TYPECAST_UDWORD 0xb00001ac)
+#define R_DMA_CH3_FIRST__first__BITNR 0
+#define R_DMA_CH3_FIRST__first__WIDTH 32
+
+#define R_DMA_CH3_CMD (IO_TYPECAST_BYTE 0xb00001dc)
+#define R_DMA_CH3_CMD__cmd__BITNR 0
+#define R_DMA_CH3_CMD__cmd__WIDTH 3
+#define R_DMA_CH3_CMD__cmd__hold 0
+#define R_DMA_CH3_CMD__cmd__start 1
+#define R_DMA_CH3_CMD__cmd__restart 3
+#define R_DMA_CH3_CMD__cmd__continue 3
+#define R_DMA_CH3_CMD__cmd__reset 4
+
+#define R_DMA_CH3_CLR_INTR (IO_TYPECAST_BYTE 0xb00001dd)
+#define R_DMA_CH3_CLR_INTR__clr_eop__BITNR 1
+#define R_DMA_CH3_CLR_INTR__clr_eop__WIDTH 1
+#define R_DMA_CH3_CLR_INTR__clr_eop__do 1
+#define R_DMA_CH3_CLR_INTR__clr_eop__dont 0
+#define R_DMA_CH3_CLR_INTR__clr_descr__BITNR 0
+#define R_DMA_CH3_CLR_INTR__clr_descr__WIDTH 1
+#define R_DMA_CH3_CLR_INTR__clr_descr__do 1
+#define R_DMA_CH3_CLR_INTR__clr_descr__dont 0
+
+#define R_DMA_CH3_STATUS (IO_TYPECAST_RO_BYTE 0xb00001de)
+#define R_DMA_CH3_STATUS__avail__BITNR 0
+#define R_DMA_CH3_STATUS__avail__WIDTH 7
+
+#define R_DMA_CH4_HWSW (IO_TYPECAST_UDWORD 0xb0000140)
+#define R_DMA_CH4_HWSW__hw__BITNR 16
+#define R_DMA_CH4_HWSW__hw__WIDTH 16
+#define R_DMA_CH4_HWSW__sw__BITNR 0
+#define R_DMA_CH4_HWSW__sw__WIDTH 16
+
+#define R_DMA_CH4_DESCR (IO_TYPECAST_UDWORD 0xb000014c)
+#define R_DMA_CH4_DESCR__descr__BITNR 0
+#define R_DMA_CH4_DESCR__descr__WIDTH 32
+
+#define R_DMA_CH4_NEXT (IO_TYPECAST_UDWORD 0xb0000144)
+#define R_DMA_CH4_NEXT__next__BITNR 0
+#define R_DMA_CH4_NEXT__next__WIDTH 32
+
+#define R_DMA_CH4_BUF (IO_TYPECAST_UDWORD 0xb0000148)
+#define R_DMA_CH4_BUF__buf__BITNR 0
+#define R_DMA_CH4_BUF__buf__WIDTH 32
+
+#define R_DMA_CH4_FIRST (IO_TYPECAST_UDWORD 0xb00001b0)
+#define R_DMA_CH4_FIRST__first__BITNR 0
+#define R_DMA_CH4_FIRST__first__WIDTH 32
+
+#define R_DMA_CH4_CMD (IO_TYPECAST_BYTE 0xb00001e0)
+#define R_DMA_CH4_CMD__cmd__BITNR 0
+#define R_DMA_CH4_CMD__cmd__WIDTH 3
+#define R_DMA_CH4_CMD__cmd__hold 0
+#define R_DMA_CH4_CMD__cmd__start 1
+#define R_DMA_CH4_CMD__cmd__restart 3
+#define R_DMA_CH4_CMD__cmd__continue 3
+#define R_DMA_CH4_CMD__cmd__reset 4
+
+#define R_DMA_CH4_CLR_INTR (IO_TYPECAST_BYTE 0xb00001e1)
+#define R_DMA_CH4_CLR_INTR__clr_eop__BITNR 1
+#define R_DMA_CH4_CLR_INTR__clr_eop__WIDTH 1
+#define R_DMA_CH4_CLR_INTR__clr_eop__do 1
+#define R_DMA_CH4_CLR_INTR__clr_eop__dont 0
+#define R_DMA_CH4_CLR_INTR__clr_descr__BITNR 0
+#define R_DMA_CH4_CLR_INTR__clr_descr__WIDTH 1
+#define R_DMA_CH4_CLR_INTR__clr_descr__do 1
+#define R_DMA_CH4_CLR_INTR__clr_descr__dont 0
+
+#define R_DMA_CH4_STATUS (IO_TYPECAST_RO_BYTE 0xb00001e2)
+#define R_DMA_CH4_STATUS__avail__BITNR 0
+#define R_DMA_CH4_STATUS__avail__WIDTH 7
+
+#define R_DMA_CH5_HWSW (IO_TYPECAST_UDWORD 0xb0000150)
+#define R_DMA_CH5_HWSW__hw__BITNR 16
+#define R_DMA_CH5_HWSW__hw__WIDTH 16
+#define R_DMA_CH5_HWSW__sw__BITNR 0
+#define R_DMA_CH5_HWSW__sw__WIDTH 16
+
+#define R_DMA_CH5_DESCR (IO_TYPECAST_UDWORD 0xb000015c)
+#define R_DMA_CH5_DESCR__descr__BITNR 0
+#define R_DMA_CH5_DESCR__descr__WIDTH 32
+
+#define R_DMA_CH5_NEXT (IO_TYPECAST_UDWORD 0xb0000154)
+#define R_DMA_CH5_NEXT__next__BITNR 0
+#define R_DMA_CH5_NEXT__next__WIDTH 32
+
+#define R_DMA_CH5_BUF (IO_TYPECAST_UDWORD 0xb0000158)
+#define R_DMA_CH5_BUF__buf__BITNR 0
+#define R_DMA_CH5_BUF__buf__WIDTH 32
+
+#define R_DMA_CH5_FIRST (IO_TYPECAST_UDWORD 0xb00001b4)
+#define R_DMA_CH5_FIRST__first__BITNR 0
+#define R_DMA_CH5_FIRST__first__WIDTH 32
+
+#define R_DMA_CH5_CMD (IO_TYPECAST_BYTE 0xb00001e4)
+#define R_DMA_CH5_CMD__cmd__BITNR 0
+#define R_DMA_CH5_CMD__cmd__WIDTH 3
+#define R_DMA_CH5_CMD__cmd__hold 0
+#define R_DMA_CH5_CMD__cmd__start 1
+#define R_DMA_CH5_CMD__cmd__restart 3
+#define R_DMA_CH5_CMD__cmd__continue 3
+#define R_DMA_CH5_CMD__cmd__reset 4
+
+#define R_DMA_CH5_CLR_INTR (IO_TYPECAST_BYTE 0xb00001e5)
+#define R_DMA_CH5_CLR_INTR__clr_eop__BITNR 1
+#define R_DMA_CH5_CLR_INTR__clr_eop__WIDTH 1
+#define R_DMA_CH5_CLR_INTR__clr_eop__do 1
+#define R_DMA_CH5_CLR_INTR__clr_eop__dont 0
+#define R_DMA_CH5_CLR_INTR__clr_descr__BITNR 0
+#define R_DMA_CH5_CLR_INTR__clr_descr__WIDTH 1
+#define R_DMA_CH5_CLR_INTR__clr_descr__do 1
+#define R_DMA_CH5_CLR_INTR__clr_descr__dont 0
+
+#define R_DMA_CH5_STATUS (IO_TYPECAST_RO_BYTE 0xb00001e6)
+#define R_DMA_CH5_STATUS__avail__BITNR 0
+#define R_DMA_CH5_STATUS__avail__WIDTH 7
+
+#define R_DMA_CH6_HWSW (IO_TYPECAST_UDWORD 0xb0000160)
+#define R_DMA_CH6_HWSW__hw__BITNR 16
+#define R_DMA_CH6_HWSW__hw__WIDTH 16
+#define R_DMA_CH6_HWSW__sw__BITNR 0
+#define R_DMA_CH6_HWSW__sw__WIDTH 16
+
+#define R_DMA_CH6_DESCR (IO_TYPECAST_UDWORD 0xb000016c)
+#define R_DMA_CH6_DESCR__descr__BITNR 0
+#define R_DMA_CH6_DESCR__descr__WIDTH 32
+
+#define R_DMA_CH6_NEXT (IO_TYPECAST_UDWORD 0xb0000164)
+#define R_DMA_CH6_NEXT__next__BITNR 0
+#define R_DMA_CH6_NEXT__next__WIDTH 32
+
+#define R_DMA_CH6_BUF (IO_TYPECAST_UDWORD 0xb0000168)
+#define R_DMA_CH6_BUF__buf__BITNR 0
+#define R_DMA_CH6_BUF__buf__WIDTH 32
+
+#define R_DMA_CH6_FIRST (IO_TYPECAST_UDWORD 0xb00001b8)
+#define R_DMA_CH6_FIRST__first__BITNR 0
+#define R_DMA_CH6_FIRST__first__WIDTH 32
+
+#define R_DMA_CH6_CMD (IO_TYPECAST_BYTE 0xb00001e8)
+#define R_DMA_CH6_CMD__cmd__BITNR 0
+#define R_DMA_CH6_CMD__cmd__WIDTH 3
+#define R_DMA_CH6_CMD__cmd__hold 0
+#define R_DMA_CH6_CMD__cmd__start 1
+#define R_DMA_CH6_CMD__cmd__restart 3
+#define R_DMA_CH6_CMD__cmd__continue 3
+#define R_DMA_CH6_CMD__cmd__reset 4
+
+#define R_DMA_CH6_CLR_INTR (IO_TYPECAST_BYTE 0xb00001e9)
+#define R_DMA_CH6_CLR_INTR__clr_eop__BITNR 1
+#define R_DMA_CH6_CLR_INTR__clr_eop__WIDTH 1
+#define R_DMA_CH6_CLR_INTR__clr_eop__do 1
+#define R_DMA_CH6_CLR_INTR__clr_eop__dont 0
+#define R_DMA_CH6_CLR_INTR__clr_descr__BITNR 0
+#define R_DMA_CH6_CLR_INTR__clr_descr__WIDTH 1
+#define R_DMA_CH6_CLR_INTR__clr_descr__do 1
+#define R_DMA_CH6_CLR_INTR__clr_descr__dont 0
+
+#define R_DMA_CH6_STATUS (IO_TYPECAST_RO_BYTE 0xb00001ea)
+#define R_DMA_CH6_STATUS__avail__BITNR 0
+#define R_DMA_CH6_STATUS__avail__WIDTH 7
+
+#define R_DMA_CH7_HWSW (IO_TYPECAST_UDWORD 0xb0000170)
+#define R_DMA_CH7_HWSW__hw__BITNR 16
+#define R_DMA_CH7_HWSW__hw__WIDTH 16
+#define R_DMA_CH7_HWSW__sw__BITNR 0
+#define R_DMA_CH7_HWSW__sw__WIDTH 16
+
+#define R_DMA_CH7_DESCR (IO_TYPECAST_UDWORD 0xb000017c)
+#define R_DMA_CH7_DESCR__descr__BITNR 0
+#define R_DMA_CH7_DESCR__descr__WIDTH 32
+
+#define R_DMA_CH7_NEXT (IO_TYPECAST_UDWORD 0xb0000174)
+#define R_DMA_CH7_NEXT__next__BITNR 0
+#define R_DMA_CH7_NEXT__next__WIDTH 32
+
+#define R_DMA_CH7_BUF (IO_TYPECAST_UDWORD 0xb0000178)
+#define R_DMA_CH7_BUF__buf__BITNR 0
+#define R_DMA_CH7_BUF__buf__WIDTH 32
+
+#define R_DMA_CH7_FIRST (IO_TYPECAST_UDWORD 0xb00001bc)
+#define R_DMA_CH7_FIRST__first__BITNR 0
+#define R_DMA_CH7_FIRST__first__WIDTH 32
+
+#define R_DMA_CH7_CMD (IO_TYPECAST_BYTE 0xb00001ec)
+#define R_DMA_CH7_CMD__cmd__BITNR 0
+#define R_DMA_CH7_CMD__cmd__WIDTH 3
+#define R_DMA_CH7_CMD__cmd__hold 0
+#define R_DMA_CH7_CMD__cmd__start 1
+#define R_DMA_CH7_CMD__cmd__restart 3
+#define R_DMA_CH7_CMD__cmd__continue 3
+#define R_DMA_CH7_CMD__cmd__reset 4
+
+#define R_DMA_CH7_CLR_INTR (IO_TYPECAST_BYTE 0xb00001ed)
+#define R_DMA_CH7_CLR_INTR__clr_eop__BITNR 1
+#define R_DMA_CH7_CLR_INTR__clr_eop__WIDTH 1
+#define R_DMA_CH7_CLR_INTR__clr_eop__do 1
+#define R_DMA_CH7_CLR_INTR__clr_eop__dont 0
+#define R_DMA_CH7_CLR_INTR__clr_descr__BITNR 0
+#define R_DMA_CH7_CLR_INTR__clr_descr__WIDTH 1
+#define R_DMA_CH7_CLR_INTR__clr_descr__do 1
+#define R_DMA_CH7_CLR_INTR__clr_descr__dont 0
+
+#define R_DMA_CH7_STATUS (IO_TYPECAST_RO_BYTE 0xb00001ee)
+#define R_DMA_CH7_STATUS__avail__BITNR 0
+#define R_DMA_CH7_STATUS__avail__WIDTH 7
+
+#define R_DMA_CH8_HWSW (IO_TYPECAST_UDWORD 0xb0000180)
+#define R_DMA_CH8_HWSW__hw__BITNR 16
+#define R_DMA_CH8_HWSW__hw__WIDTH 16
+#define R_DMA_CH8_HWSW__sw__BITNR 0
+#define R_DMA_CH8_HWSW__sw__WIDTH 16
+
+#define R_DMA_CH8_DESCR (IO_TYPECAST_UDWORD 0xb000018c)
+#define R_DMA_CH8_DESCR__descr__BITNR 0
+#define R_DMA_CH8_DESCR__descr__WIDTH 32
+
+#define R_DMA_CH8_NEXT (IO_TYPECAST_UDWORD 0xb0000184)
+#define R_DMA_CH8_NEXT__next__BITNR 0
+#define R_DMA_CH8_NEXT__next__WIDTH 32
+
+#define R_DMA_CH8_BUF (IO_TYPECAST_UDWORD 0xb0000188)
+#define R_DMA_CH8_BUF__buf__BITNR 0
+#define R_DMA_CH8_BUF__buf__WIDTH 32
+
+#define R_DMA_CH8_FIRST (IO_TYPECAST_UDWORD 0xb00001c0)
+#define R_DMA_CH8_FIRST__first__BITNR 0
+#define R_DMA_CH8_FIRST__first__WIDTH 32
+
+#define R_DMA_CH8_CMD (IO_TYPECAST_BYTE 0xb00001f0)
+#define R_DMA_CH8_CMD__cmd__BITNR 0
+#define R_DMA_CH8_CMD__cmd__WIDTH 3
+#define R_DMA_CH8_CMD__cmd__hold 0
+#define R_DMA_CH8_CMD__cmd__start 1
+#define R_DMA_CH8_CMD__cmd__restart 3
+#define R_DMA_CH8_CMD__cmd__continue 3
+#define R_DMA_CH8_CMD__cmd__reset 4
+
+#define R_DMA_CH8_CLR_INTR (IO_TYPECAST_BYTE 0xb00001f1)
+#define R_DMA_CH8_CLR_INTR__clr_eop__BITNR 1
+#define R_DMA_CH8_CLR_INTR__clr_eop__WIDTH 1
+#define R_DMA_CH8_CLR_INTR__clr_eop__do 1
+#define R_DMA_CH8_CLR_INTR__clr_eop__dont 0
+#define R_DMA_CH8_CLR_INTR__clr_descr__BITNR 0
+#define R_DMA_CH8_CLR_INTR__clr_descr__WIDTH 1
+#define R_DMA_CH8_CLR_INTR__clr_descr__do 1
+#define R_DMA_CH8_CLR_INTR__clr_descr__dont 0
+
+#define R_DMA_CH8_STATUS (IO_TYPECAST_RO_BYTE 0xb00001f2)
+#define R_DMA_CH8_STATUS__avail__BITNR 0
+#define R_DMA_CH8_STATUS__avail__WIDTH 7
+
+#define R_DMA_CH8_SUB (IO_TYPECAST_UDWORD 0xb000018c)
+#define R_DMA_CH8_SUB__sub__BITNR 0
+#define R_DMA_CH8_SUB__sub__WIDTH 32
+
+#define R_DMA_CH8_NEP (IO_TYPECAST_UDWORD 0xb00001c0)
+#define R_DMA_CH8_NEP__nep__BITNR 0
+#define R_DMA_CH8_NEP__nep__WIDTH 32
+
+#define R_DMA_CH8_SUB0_EP (IO_TYPECAST_UDWORD 0xb00001c8)
+#define R_DMA_CH8_SUB0_EP__ep__BITNR 0
+#define R_DMA_CH8_SUB0_EP__ep__WIDTH 32
+
+#define R_DMA_CH8_SUB0_CMD (IO_TYPECAST_BYTE 0xb00001d3)
+#define R_DMA_CH8_SUB0_CMD__cmd__BITNR 0
+#define R_DMA_CH8_SUB0_CMD__cmd__WIDTH 1
+#define R_DMA_CH8_SUB0_CMD__cmd__stop 0
+#define R_DMA_CH8_SUB0_CMD__cmd__start 1
+
+#define R_DMA_CH8_SUB0_CLR_INTR (IO_TYPECAST_BYTE 0xb00001e3)
+#define R_DMA_CH8_SUB0_CLR_INTR__clr_descr__BITNR 0
+#define R_DMA_CH8_SUB0_CLR_INTR__clr_descr__WIDTH 1
+#define R_DMA_CH8_SUB0_CLR_INTR__clr_descr__dont 0
+#define R_DMA_CH8_SUB0_CLR_INTR__clr_descr__do 1
+
+#define R_DMA_CH8_SUB1_EP (IO_TYPECAST_UDWORD 0xb00001cc)
+#define R_DMA_CH8_SUB1_EP__ep__BITNR 0
+#define R_DMA_CH8_SUB1_EP__ep__WIDTH 32
+
+#define R_DMA_CH8_SUB1_CMD (IO_TYPECAST_BYTE 0xb00001d7)
+#define R_DMA_CH8_SUB1_CMD__cmd__BITNR 0
+#define R_DMA_CH8_SUB1_CMD__cmd__WIDTH 1
+#define R_DMA_CH8_SUB1_CMD__cmd__stop 0
+#define R_DMA_CH8_SUB1_CMD__cmd__start 1
+
+#define R_DMA_CH8_SUB1_CLR_INTR (IO_TYPECAST_BYTE 0xb00001e7)
+#define R_DMA_CH8_SUB1_CLR_INTR__clr_descr__BITNR 0
+#define R_DMA_CH8_SUB1_CLR_INTR__clr_descr__WIDTH 1
+#define R_DMA_CH8_SUB1_CLR_INTR__clr_descr__dont 0
+#define R_DMA_CH8_SUB1_CLR_INTR__clr_descr__do 1
+
+#define R_DMA_CH8_SUB2_EP (IO_TYPECAST_UDWORD 0xb00001f8)
+#define R_DMA_CH8_SUB2_EP__ep__BITNR 0
+#define R_DMA_CH8_SUB2_EP__ep__WIDTH 32
+
+#define R_DMA_CH8_SUB2_CMD (IO_TYPECAST_BYTE 0xb00001db)
+#define R_DMA_CH8_SUB2_CMD__cmd__BITNR 0
+#define R_DMA_CH8_SUB2_CMD__cmd__WIDTH 1
+#define R_DMA_CH8_SUB2_CMD__cmd__stop 0
+#define R_DMA_CH8_SUB2_CMD__cmd__start 1
+
+#define R_DMA_CH8_SUB2_CLR_INTR (IO_TYPECAST_BYTE 0xb00001eb)
+#define R_DMA_CH8_SUB2_CLR_INTR__clr_descr__BITNR 0
+#define R_DMA_CH8_SUB2_CLR_INTR__clr_descr__WIDTH 1
+#define R_DMA_CH8_SUB2_CLR_INTR__clr_descr__dont 0
+#define R_DMA_CH8_SUB2_CLR_INTR__clr_descr__do 1
+
+#define R_DMA_CH8_SUB3_EP (IO_TYPECAST_UDWORD 0xb00001fc)
+#define R_DMA_CH8_SUB3_EP__ep__BITNR 0
+#define R_DMA_CH8_SUB3_EP__ep__WIDTH 32
+
+#define R_DMA_CH8_SUB3_CMD (IO_TYPECAST_BYTE 0xb00001df)
+#define R_DMA_CH8_SUB3_CMD__cmd__BITNR 0
+#define R_DMA_CH8_SUB3_CMD__cmd__WIDTH 1
+#define R_DMA_CH8_SUB3_CMD__cmd__stop 0
+#define R_DMA_CH8_SUB3_CMD__cmd__start 1
+
+#define R_DMA_CH8_SUB3_CLR_INTR (IO_TYPECAST_BYTE 0xb00001ef)
+#define R_DMA_CH8_SUB3_CLR_INTR__clr_descr__BITNR 0
+#define R_DMA_CH8_SUB3_CLR_INTR__clr_descr__WIDTH 1
+#define R_DMA_CH8_SUB3_CLR_INTR__clr_descr__dont 0
+#define R_DMA_CH8_SUB3_CLR_INTR__clr_descr__do 1
+
+#define R_DMA_CH9_HWSW (IO_TYPECAST_UDWORD 0xb0000190)
+#define R_DMA_CH9_HWSW__hw__BITNR 16
+#define R_DMA_CH9_HWSW__hw__WIDTH 16
+#define R_DMA_CH9_HWSW__sw__BITNR 0
+#define R_DMA_CH9_HWSW__sw__WIDTH 16
+
+#define R_DMA_CH9_DESCR (IO_TYPECAST_UDWORD 0xb000019c)
+#define R_DMA_CH9_DESCR__descr__BITNR 0
+#define R_DMA_CH9_DESCR__descr__WIDTH 32
+
+#define R_DMA_CH9_NEXT (IO_TYPECAST_UDWORD 0xb0000194)
+#define R_DMA_CH9_NEXT__next__BITNR 0
+#define R_DMA_CH9_NEXT__next__WIDTH 32
+
+#define R_DMA_CH9_BUF (IO_TYPECAST_UDWORD 0xb0000198)
+#define R_DMA_CH9_BUF__buf__BITNR 0
+#define R_DMA_CH9_BUF__buf__WIDTH 32
+
+#define R_DMA_CH9_FIRST (IO_TYPECAST_UDWORD 0xb00001c4)
+#define R_DMA_CH9_FIRST__first__BITNR 0
+#define R_DMA_CH9_FIRST__first__WIDTH 32
+
+#define R_DMA_CH9_CMD (IO_TYPECAST_BYTE 0xb00001f4)
+#define R_DMA_CH9_CMD__cmd__BITNR 0
+#define R_DMA_CH9_CMD__cmd__WIDTH 3
+#define R_DMA_CH9_CMD__cmd__hold 0
+#define R_DMA_CH9_CMD__cmd__start 1
+#define R_DMA_CH9_CMD__cmd__restart 3
+#define R_DMA_CH9_CMD__cmd__continue 3
+#define R_DMA_CH9_CMD__cmd__reset 4
+
+#define R_DMA_CH9_CLR_INTR (IO_TYPECAST_BYTE 0xb00001f5)
+#define R_DMA_CH9_CLR_INTR__clr_eop__BITNR 1
+#define R_DMA_CH9_CLR_INTR__clr_eop__WIDTH 1
+#define R_DMA_CH9_CLR_INTR__clr_eop__do 1
+#define R_DMA_CH9_CLR_INTR__clr_eop__dont 0
+#define R_DMA_CH9_CLR_INTR__clr_descr__BITNR 0
+#define R_DMA_CH9_CLR_INTR__clr_descr__WIDTH 1
+#define R_DMA_CH9_CLR_INTR__clr_descr__do 1
+#define R_DMA_CH9_CLR_INTR__clr_descr__dont 0
+
+#define R_DMA_CH9_STATUS (IO_TYPECAST_RO_BYTE 0xb00001f6)
+#define R_DMA_CH9_STATUS__avail__BITNR 0
+#define R_DMA_CH9_STATUS__avail__WIDTH 7
+
+/*
+!* Test mode registers
+!*/
+
+#define R_TEST_MODE (IO_TYPECAST_UDWORD 0xb00000fc)
+#define R_TEST_MODE__single_step__BITNR 19
+#define R_TEST_MODE__single_step__WIDTH 1
+#define R_TEST_MODE__single_step__on 1
+#define R_TEST_MODE__single_step__off 0
+#define R_TEST_MODE__step_wr__BITNR 18
+#define R_TEST_MODE__step_wr__WIDTH 1
+#define R_TEST_MODE__step_wr__on 1
+#define R_TEST_MODE__step_wr__off 0
+#define R_TEST_MODE__step_rd__BITNR 17
+#define R_TEST_MODE__step_rd__WIDTH 1
+#define R_TEST_MODE__step_rd__on 1
+#define R_TEST_MODE__step_rd__off 0
+#define R_TEST_MODE__step_fetch__BITNR 16
+#define R_TEST_MODE__step_fetch__WIDTH 1
+#define R_TEST_MODE__step_fetch__on 1
+#define R_TEST_MODE__step_fetch__off 0
+#define R_TEST_MODE__mmu_test__BITNR 12
+#define R_TEST_MODE__mmu_test__WIDTH 1
+#define R_TEST_MODE__mmu_test__on 1
+#define R_TEST_MODE__mmu_test__off 0
+#define R_TEST_MODE__usb_test__BITNR 11
+#define R_TEST_MODE__usb_test__WIDTH 1
+#define R_TEST_MODE__usb_test__on 1
+#define R_TEST_MODE__usb_test__off 0
+#define R_TEST_MODE__scsi_timer_test__BITNR 10
+#define R_TEST_MODE__scsi_timer_test__WIDTH 1
+#define R_TEST_MODE__scsi_timer_test__on 1
+#define R_TEST_MODE__scsi_timer_test__off 0
+#define R_TEST_MODE__backoff__BITNR 9
+#define R_TEST_MODE__backoff__WIDTH 1
+#define R_TEST_MODE__backoff__on 1
+#define R_TEST_MODE__backoff__off 0
+#define R_TEST_MODE__snmp_test__BITNR 8
+#define R_TEST_MODE__snmp_test__WIDTH 1
+#define R_TEST_MODE__snmp_test__on 1
+#define R_TEST_MODE__snmp_test__off 0
+#define R_TEST_MODE__snmp_inc__BITNR 7
+#define R_TEST_MODE__snmp_inc__WIDTH 1
+#define R_TEST_MODE__snmp_inc__do 1
+#define R_TEST_MODE__snmp_inc__dont 0
+#define R_TEST_MODE__ser_loop__BITNR 6
+#define R_TEST_MODE__ser_loop__WIDTH 1
+#define R_TEST_MODE__ser_loop__on 1
+#define R_TEST_MODE__ser_loop__off 0
+#define R_TEST_MODE__baudrate__BITNR 5
+#define R_TEST_MODE__baudrate__WIDTH 1
+#define R_TEST_MODE__baudrate__on 1
+#define R_TEST_MODE__baudrate__off 0
+#define R_TEST_MODE__timer__BITNR 3
+#define R_TEST_MODE__timer__WIDTH 2
+#define R_TEST_MODE__timer__off 0
+#define R_TEST_MODE__timer__even 1
+#define R_TEST_MODE__timer__odd 2
+#define R_TEST_MODE__timer__all 3
+#define R_TEST_MODE__cache_test__BITNR 2
+#define R_TEST_MODE__cache_test__WIDTH 1
+#define R_TEST_MODE__cache_test__normal 0
+#define R_TEST_MODE__cache_test__test 1
+#define R_TEST_MODE__tag_test__BITNR 1
+#define R_TEST_MODE__tag_test__WIDTH 1
+#define R_TEST_MODE__tag_test__normal 0
+#define R_TEST_MODE__tag_test__test 1
+#define R_TEST_MODE__cache_enable__BITNR 0
+#define R_TEST_MODE__cache_enable__WIDTH 1
+#define R_TEST_MODE__cache_enable__enable 1
+#define R_TEST_MODE__cache_enable__disable 0
+
+#define R_SINGLE_STEP (IO_TYPECAST_BYTE 0xb00000fe)
+#define R_SINGLE_STEP__single_step__BITNR 3
+#define R_SINGLE_STEP__single_step__WIDTH 1
+#define R_SINGLE_STEP__single_step__on 1
+#define R_SINGLE_STEP__single_step__off 0
+#define R_SINGLE_STEP__step_wr__BITNR 2
+#define R_SINGLE_STEP__step_wr__WIDTH 1
+#define R_SINGLE_STEP__step_wr__on 1
+#define R_SINGLE_STEP__step_wr__off 0
+#define R_SINGLE_STEP__step_rd__BITNR 1
+#define R_SINGLE_STEP__step_rd__WIDTH 1
+#define R_SINGLE_STEP__step_rd__on 1
+#define R_SINGLE_STEP__step_rd__off 0
+#define R_SINGLE_STEP__step_fetch__BITNR 0
+#define R_SINGLE_STEP__step_fetch__WIDTH 1
+#define R_SINGLE_STEP__step_fetch__on 1
+#define R_SINGLE_STEP__step_fetch__off 0
+
+/*
+!* USB interface control registers
+!*/
+
+#define R_USB_REVISION (IO_TYPECAST_RO_BYTE 0xb0000200)
+#define R_USB_REVISION__major__BITNR 4
+#define R_USB_REVISION__major__WIDTH 4
+#define R_USB_REVISION__minor__BITNR 0
+#define R_USB_REVISION__minor__WIDTH 4
+#define R_USB_REVISION__minor__v1_v2 1
+#define R_USB_REVISION__minor__v3 0
+
+#define R_USB_COMMAND (IO_TYPECAST_BYTE 0xb0000201)
+#define R_USB_COMMAND__port_sel__BITNR 6
+#define R_USB_COMMAND__port_sel__WIDTH 2
+#define R_USB_COMMAND__port_sel__nop 0
+#define R_USB_COMMAND__port_sel__port1 1
+#define R_USB_COMMAND__port_sel__port2 2
+#define R_USB_COMMAND__port_sel__both 3
+#define R_USB_COMMAND__port_cmd__BITNR 4
+#define R_USB_COMMAND__port_cmd__WIDTH 2
+#define R_USB_COMMAND__port_cmd__reset 0
+#define R_USB_COMMAND__port_cmd__disable 1
+#define R_USB_COMMAND__port_cmd__suspend 2
+#define R_USB_COMMAND__port_cmd__resume 3
+#define R_USB_COMMAND__busy__BITNR 3
+#define R_USB_COMMAND__busy__WIDTH 1
+#define R_USB_COMMAND__busy__no 0
+#define R_USB_COMMAND__busy__yes 1
+#define R_USB_COMMAND__ctrl_cmd__BITNR 0
+#define R_USB_COMMAND__ctrl_cmd__WIDTH 3
+#define R_USB_COMMAND__ctrl_cmd__nop 0
+#define R_USB_COMMAND__ctrl_cmd__reset 1
+#define R_USB_COMMAND__ctrl_cmd__deconfig 2
+#define R_USB_COMMAND__ctrl_cmd__host_config 3
+#define R_USB_COMMAND__ctrl_cmd__dev_config 4
+#define R_USB_COMMAND__ctrl_cmd__host_nop 5
+#define R_USB_COMMAND__ctrl_cmd__host_run 6
+#define R_USB_COMMAND__ctrl_cmd__host_stop 7
+
+#define R_USB_COMMAND_DEV (IO_TYPECAST_BYTE 0xb0000201)
+#define R_USB_COMMAND_DEV__port_sel__BITNR 6
+#define R_USB_COMMAND_DEV__port_sel__WIDTH 2
+#define R_USB_COMMAND_DEV__port_sel__nop 0
+#define R_USB_COMMAND_DEV__port_sel__dummy1 1
+#define R_USB_COMMAND_DEV__port_sel__dummy2 2
+#define R_USB_COMMAND_DEV__port_sel__any 3
+#define R_USB_COMMAND_DEV__port_cmd__BITNR 4
+#define R_USB_COMMAND_DEV__port_cmd__WIDTH 2
+#define R_USB_COMMAND_DEV__port_cmd__active 0
+#define R_USB_COMMAND_DEV__port_cmd__passive 1
+#define R_USB_COMMAND_DEV__port_cmd__nop 2
+#define R_USB_COMMAND_DEV__port_cmd__wakeup 3
+#define R_USB_COMMAND_DEV__busy__BITNR 3
+#define R_USB_COMMAND_DEV__busy__WIDTH 1
+#define R_USB_COMMAND_DEV__busy__no 0
+#define R_USB_COMMAND_DEV__busy__yes 1
+#define R_USB_COMMAND_DEV__ctrl_cmd__BITNR 0
+#define R_USB_COMMAND_DEV__ctrl_cmd__WIDTH 3
+#define R_USB_COMMAND_DEV__ctrl_cmd__nop 0
+#define R_USB_COMMAND_DEV__ctrl_cmd__dev_nop 1
+#define R_USB_COMMAND_DEV__ctrl_cmd__deconfig 2
+#define R_USB_COMMAND_DEV__ctrl_cmd__host_config 3
+#define R_USB_COMMAND_DEV__ctrl_cmd__dev_config 4
+#define R_USB_COMMAND_DEV__ctrl_cmd__dev_nop2 5
+#define R_USB_COMMAND_DEV__ctrl_cmd__dev_nop3 6
+#define R_USB_COMMAND_DEV__ctrl_cmd__dev_nop4 7
+
+#define R_USB_STATUS (IO_TYPECAST_RO_BYTE 0xb0000202)
+#define R_USB_STATUS__ourun__BITNR 5
+#define R_USB_STATUS__ourun__WIDTH 1
+#define R_USB_STATUS__ourun__no 0
+#define R_USB_STATUS__ourun__yes 1
+#define R_USB_STATUS__perror__BITNR 4
+#define R_USB_STATUS__perror__WIDTH 1
+#define R_USB_STATUS__perror__no 0
+#define R_USB_STATUS__perror__yes 1
+#define R_USB_STATUS__device_mode__BITNR 3
+#define R_USB_STATUS__device_mode__WIDTH 1
+#define R_USB_STATUS__device_mode__no 0
+#define R_USB_STATUS__device_mode__yes 1
+#define R_USB_STATUS__host_mode__BITNR 2
+#define R_USB_STATUS__host_mode__WIDTH 1
+#define R_USB_STATUS__host_mode__no 0
+#define R_USB_STATUS__host_mode__yes 1
+#define R_USB_STATUS__started__BITNR 1
+#define R_USB_STATUS__started__WIDTH 1
+#define R_USB_STATUS__started__no 0
+#define R_USB_STATUS__started__yes 1
+#define R_USB_STATUS__running__BITNR 0
+#define R_USB_STATUS__running__WIDTH 1
+#define R_USB_STATUS__running__no 0
+#define R_USB_STATUS__running__yes 1
+
+#define R_USB_IRQ_MASK_SET (IO_TYPECAST_UWORD 0xb0000204)
+#define R_USB_IRQ_MASK_SET__iso_eof__BITNR 13
+#define R_USB_IRQ_MASK_SET__iso_eof__WIDTH 1
+#define R_USB_IRQ_MASK_SET__iso_eof__nop 0
+#define R_USB_IRQ_MASK_SET__iso_eof__set 1
+#define R_USB_IRQ_MASK_SET__intr_eof__BITNR 12
+#define R_USB_IRQ_MASK_SET__intr_eof__WIDTH 1
+#define R_USB_IRQ_MASK_SET__intr_eof__nop 0
+#define R_USB_IRQ_MASK_SET__intr_eof__set 1
+#define R_USB_IRQ_MASK_SET__iso_eot__BITNR 11
+#define R_USB_IRQ_MASK_SET__iso_eot__WIDTH 1
+#define R_USB_IRQ_MASK_SET__iso_eot__nop 0
+#define R_USB_IRQ_MASK_SET__iso_eot__set 1
+#define R_USB_IRQ_MASK_SET__intr_eot__BITNR 10
+#define R_USB_IRQ_MASK_SET__intr_eot__WIDTH 1
+#define R_USB_IRQ_MASK_SET__intr_eot__nop 0
+#define R_USB_IRQ_MASK_SET__intr_eot__set 1
+#define R_USB_IRQ_MASK_SET__ctl_eot__BITNR 9
+#define R_USB_IRQ_MASK_SET__ctl_eot__WIDTH 1
+#define R_USB_IRQ_MASK_SET__ctl_eot__nop 0
+#define R_USB_IRQ_MASK_SET__ctl_eot__set 1
+#define R_USB_IRQ_MASK_SET__bulk_eot__BITNR 8
+#define R_USB_IRQ_MASK_SET__bulk_eot__WIDTH 1
+#define R_USB_IRQ_MASK_SET__bulk_eot__nop 0
+#define R_USB_IRQ_MASK_SET__bulk_eot__set 1
+#define R_USB_IRQ_MASK_SET__epid_attn__BITNR 3
+#define R_USB_IRQ_MASK_SET__epid_attn__WIDTH 1
+#define R_USB_IRQ_MASK_SET__epid_attn__nop 0
+#define R_USB_IRQ_MASK_SET__epid_attn__set 1
+#define R_USB_IRQ_MASK_SET__sof__BITNR 2
+#define R_USB_IRQ_MASK_SET__sof__WIDTH 1
+#define R_USB_IRQ_MASK_SET__sof__nop 0
+#define R_USB_IRQ_MASK_SET__sof__set 1
+#define R_USB_IRQ_MASK_SET__port_status__BITNR 1
+#define R_USB_IRQ_MASK_SET__port_status__WIDTH 1
+#define R_USB_IRQ_MASK_SET__port_status__nop 0
+#define R_USB_IRQ_MASK_SET__port_status__set 1
+#define R_USB_IRQ_MASK_SET__ctl_status__BITNR 0
+#define R_USB_IRQ_MASK_SET__ctl_status__WIDTH 1
+#define R_USB_IRQ_MASK_SET__ctl_status__nop 0
+#define R_USB_IRQ_MASK_SET__ctl_status__set 1
+
+#define R_USB_IRQ_MASK_READ (IO_TYPECAST_RO_UWORD 0xb0000204)
+#define R_USB_IRQ_MASK_READ__iso_eof__BITNR 13
+#define R_USB_IRQ_MASK_READ__iso_eof__WIDTH 1
+#define R_USB_IRQ_MASK_READ__iso_eof__no_pend 0
+#define R_USB_IRQ_MASK_READ__iso_eof__pend 1
+#define R_USB_IRQ_MASK_READ__intr_eof__BITNR 12
+#define R_USB_IRQ_MASK_READ__intr_eof__WIDTH 1
+#define R_USB_IRQ_MASK_READ__intr_eof__no_pend 0
+#define R_USB_IRQ_MASK_READ__intr_eof__pend 1
+#define R_USB_IRQ_MASK_READ__iso_eot__BITNR 11
+#define R_USB_IRQ_MASK_READ__iso_eot__WIDTH 1
+#define R_USB_IRQ_MASK_READ__iso_eot__no_pend 0
+#define R_USB_IRQ_MASK_READ__iso_eot__pend 1
+#define R_USB_IRQ_MASK_READ__intr_eot__BITNR 10
+#define R_USB_IRQ_MASK_READ__intr_eot__WIDTH 1
+#define R_USB_IRQ_MASK_READ__intr_eot__no_pend 0
+#define R_USB_IRQ_MASK_READ__intr_eot__pend 1
+#define R_USB_IRQ_MASK_READ__ctl_eot__BITNR 9
+#define R_USB_IRQ_MASK_READ__ctl_eot__WIDTH 1
+#define R_USB_IRQ_MASK_READ__ctl_eot__no_pend 0
+#define R_USB_IRQ_MASK_READ__ctl_eot__pend 1
+#define R_USB_IRQ_MASK_READ__bulk_eot__BITNR 8
+#define R_USB_IRQ_MASK_READ__bulk_eot__WIDTH 1
+#define R_USB_IRQ_MASK_READ__bulk_eot__no_pend 0
+#define R_USB_IRQ_MASK_READ__bulk_eot__pend 1
+#define R_USB_IRQ_MASK_READ__epid_attn__BITNR 3
+#define R_USB_IRQ_MASK_READ__epid_attn__WIDTH 1
+#define R_USB_IRQ_MASK_READ__epid_attn__no_pend 0
+#define R_USB_IRQ_MASK_READ__epid_attn__pend 1
+#define R_USB_IRQ_MASK_READ__sof__BITNR 2
+#define R_USB_IRQ_MASK_READ__sof__WIDTH 1
+#define R_USB_IRQ_MASK_READ__sof__no_pend 0
+#define R_USB_IRQ_MASK_READ__sof__pend 1
+#define R_USB_IRQ_MASK_READ__port_status__BITNR 1
+#define R_USB_IRQ_MASK_READ__port_status__WIDTH 1
+#define R_USB_IRQ_MASK_READ__port_status__no_pend 0
+#define R_USB_IRQ_MASK_READ__port_status__pend 1
+#define R_USB_IRQ_MASK_READ__ctl_status__BITNR 0
+#define R_USB_IRQ_MASK_READ__ctl_status__WIDTH 1
+#define R_USB_IRQ_MASK_READ__ctl_status__no_pend 0
+#define R_USB_IRQ_MASK_READ__ctl_status__pend 1
+
+#define R_USB_IRQ_MASK_CLR (IO_TYPECAST_UWORD 0xb0000206)
+#define R_USB_IRQ_MASK_CLR__iso_eof__BITNR 13
+#define R_USB_IRQ_MASK_CLR__iso_eof__WIDTH 1
+#define R_USB_IRQ_MASK_CLR__iso_eof__nop 0
+#define R_USB_IRQ_MASK_CLR__iso_eof__clr 1
+#define R_USB_IRQ_MASK_CLR__intr_eof__BITNR 12
+#define R_USB_IRQ_MASK_CLR__intr_eof__WIDTH 1
+#define R_USB_IRQ_MASK_CLR__intr_eof__nop 0
+#define R_USB_IRQ_MASK_CLR__intr_eof__clr 1
+#define R_USB_IRQ_MASK_CLR__iso_eot__BITNR 11
+#define R_USB_IRQ_MASK_CLR__iso_eot__WIDTH 1
+#define R_USB_IRQ_MASK_CLR__iso_eot__nop 0
+#define R_USB_IRQ_MASK_CLR__iso_eot__clr 1
+#define R_USB_IRQ_MASK_CLR__intr_eot__BITNR 10
+#define R_USB_IRQ_MASK_CLR__intr_eot__WIDTH 1
+#define R_USB_IRQ_MASK_CLR__intr_eot__nop 0
+#define R_USB_IRQ_MASK_CLR__intr_eot__clr 1
+#define R_USB_IRQ_MASK_CLR__ctl_eot__BITNR 9
+#define R_USB_IRQ_MASK_CLR__ctl_eot__WIDTH 1
+#define R_USB_IRQ_MASK_CLR__ctl_eot__nop 0
+#define R_USB_IRQ_MASK_CLR__ctl_eot__clr 1
+#define R_USB_IRQ_MASK_CLR__bulk_eot__BITNR 8
+#define R_USB_IRQ_MASK_CLR__bulk_eot__WIDTH 1
+#define R_USB_IRQ_MASK_CLR__bulk_eot__nop 0
+#define R_USB_IRQ_MASK_CLR__bulk_eot__clr 1
+#define R_USB_IRQ_MASK_CLR__epid_attn__BITNR 3
+#define R_USB_IRQ_MASK_CLR__epid_attn__WIDTH 1
+#define R_USB_IRQ_MASK_CLR__epid_attn__nop 0
+#define R_USB_IRQ_MASK_CLR__epid_attn__clr 1
+#define R_USB_IRQ_MASK_CLR__sof__BITNR 2
+#define R_USB_IRQ_MASK_CLR__sof__WIDTH 1
+#define R_USB_IRQ_MASK_CLR__sof__nop 0
+#define R_USB_IRQ_MASK_CLR__sof__clr 1
+#define R_USB_IRQ_MASK_CLR__port_status__BITNR 1
+#define R_USB_IRQ_MASK_CLR__port_status__WIDTH 1
+#define R_USB_IRQ_MASK_CLR__port_status__nop 0
+#define R_USB_IRQ_MASK_CLR__port_status__clr 1
+#define R_USB_IRQ_MASK_CLR__ctl_status__BITNR 0
+#define R_USB_IRQ_MASK_CLR__ctl_status__WIDTH 1
+#define R_USB_IRQ_MASK_CLR__ctl_status__nop 0
+#define R_USB_IRQ_MASK_CLR__ctl_status__clr 1
+
+#define R_USB_IRQ_READ (IO_TYPECAST_RO_UWORD 0xb0000206)
+#define R_USB_IRQ_READ__iso_eof__BITNR 13
+#define R_USB_IRQ_READ__iso_eof__WIDTH 1
+#define R_USB_IRQ_READ__iso_eof__no_pend 0
+#define R_USB_IRQ_READ__iso_eof__pend 1
+#define R_USB_IRQ_READ__intr_eof__BITNR 12
+#define R_USB_IRQ_READ__intr_eof__WIDTH 1
+#define R_USB_IRQ_READ__intr_eof__no_pend 0
+#define R_USB_IRQ_READ__intr_eof__pend 1
+#define R_USB_IRQ_READ__iso_eot__BITNR 11
+#define R_USB_IRQ_READ__iso_eot__WIDTH 1
+#define R_USB_IRQ_READ__iso_eot__no_pend 0
+#define R_USB_IRQ_READ__iso_eot__pend 1
+#define R_USB_IRQ_READ__intr_eot__BITNR 10
+#define R_USB_IRQ_READ__intr_eot__WIDTH 1
+#define R_USB_IRQ_READ__intr_eot__no_pend 0
+#define R_USB_IRQ_READ__intr_eot__pend 1
+#define R_USB_IRQ_READ__ctl_eot__BITNR 9
+#define R_USB_IRQ_READ__ctl_eot__WIDTH 1
+#define R_USB_IRQ_READ__ctl_eot__no_pend 0
+#define R_USB_IRQ_READ__ctl_eot__pend 1
+#define R_USB_IRQ_READ__bulk_eot__BITNR 8
+#define R_USB_IRQ_READ__bulk_eot__WIDTH 1
+#define R_USB_IRQ_READ__bulk_eot__no_pend 0
+#define R_USB_IRQ_READ__bulk_eot__pend 1
+#define R_USB_IRQ_READ__epid_attn__BITNR 3
+#define R_USB_IRQ_READ__epid_attn__WIDTH 1
+#define R_USB_IRQ_READ__epid_attn__no_pend 0
+#define R_USB_IRQ_READ__epid_attn__pend 1
+#define R_USB_IRQ_READ__sof__BITNR 2
+#define R_USB_IRQ_READ__sof__WIDTH 1
+#define R_USB_IRQ_READ__sof__no_pend 0
+#define R_USB_IRQ_READ__sof__pend 1
+#define R_USB_IRQ_READ__port_status__BITNR 1
+#define R_USB_IRQ_READ__port_status__WIDTH 1
+#define R_USB_IRQ_READ__port_status__no_pend 0
+#define R_USB_IRQ_READ__port_status__pend 1
+#define R_USB_IRQ_READ__ctl_status__BITNR 0
+#define R_USB_IRQ_READ__ctl_status__WIDTH 1
+#define R_USB_IRQ_READ__ctl_status__no_pend 0
+#define R_USB_IRQ_READ__ctl_status__pend 1
+
+#define R_USB_IRQ_MASK_SET_DEV (IO_TYPECAST_UWORD 0xb0000204)
+#define R_USB_IRQ_MASK_SET_DEV__out_eot__BITNR 12
+#define R_USB_IRQ_MASK_SET_DEV__out_eot__WIDTH 1
+#define R_USB_IRQ_MASK_SET_DEV__out_eot__nop 0
+#define R_USB_IRQ_MASK_SET_DEV__out_eot__set 1
+#define R_USB_IRQ_MASK_SET_DEV__ep3_in_eot__BITNR 11
+#define R_USB_IRQ_MASK_SET_DEV__ep3_in_eot__WIDTH 1
+#define R_USB_IRQ_MASK_SET_DEV__ep3_in_eot__nop 0
+#define R_USB_IRQ_MASK_SET_DEV__ep3_in_eot__set 1
+#define R_USB_IRQ_MASK_SET_DEV__ep2_in_eot__BITNR 10
+#define R_USB_IRQ_MASK_SET_DEV__ep2_in_eot__WIDTH 1
+#define R_USB_IRQ_MASK_SET_DEV__ep2_in_eot__nop 0
+#define R_USB_IRQ_MASK_SET_DEV__ep2_in_eot__set 1
+#define R_USB_IRQ_MASK_SET_DEV__ep1_in_eot__BITNR 9
+#define R_USB_IRQ_MASK_SET_DEV__ep1_in_eot__WIDTH 1
+#define R_USB_IRQ_MASK_SET_DEV__ep1_in_eot__nop 0
+#define R_USB_IRQ_MASK_SET_DEV__ep1_in_eot__set 1
+#define R_USB_IRQ_MASK_SET_DEV__ep0_in_eot__BITNR 8
+#define R_USB_IRQ_MASK_SET_DEV__ep0_in_eot__WIDTH 1
+#define R_USB_IRQ_MASK_SET_DEV__ep0_in_eot__nop 0
+#define R_USB_IRQ_MASK_SET_DEV__ep0_in_eot__set 1
+#define R_USB_IRQ_MASK_SET_DEV__epid_attn__BITNR 3
+#define R_USB_IRQ_MASK_SET_DEV__epid_attn__WIDTH 1
+#define R_USB_IRQ_MASK_SET_DEV__epid_attn__nop 0
+#define R_USB_IRQ_MASK_SET_DEV__epid_attn__set 1
+#define R_USB_IRQ_MASK_SET_DEV__sof__BITNR 2
+#define R_USB_IRQ_MASK_SET_DEV__sof__WIDTH 1
+#define R_USB_IRQ_MASK_SET_DEV__sof__nop 0
+#define R_USB_IRQ_MASK_SET_DEV__sof__set 1
+#define R_USB_IRQ_MASK_SET_DEV__port_status__BITNR 1
+#define R_USB_IRQ_MASK_SET_DEV__port_status__WIDTH 1
+#define R_USB_IRQ_MASK_SET_DEV__port_status__nop 0
+#define R_USB_IRQ_MASK_SET_DEV__port_status__set 1
+#define R_USB_IRQ_MASK_SET_DEV__ctl_status__BITNR 0
+#define R_USB_IRQ_MASK_SET_DEV__ctl_status__WIDTH 1
+#define R_USB_IRQ_MASK_SET_DEV__ctl_status__nop 0
+#define R_USB_IRQ_MASK_SET_DEV__ctl_status__set 1
+
+#define R_USB_IRQ_MASK_READ_DEV (IO_TYPECAST_RO_UWORD 0xb0000204)
+#define R_USB_IRQ_MASK_READ_DEV__out_eot__BITNR 12
+#define R_USB_IRQ_MASK_READ_DEV__out_eot__WIDTH 1
+#define R_USB_IRQ_MASK_READ_DEV__out_eot__no_pend 0
+#define R_USB_IRQ_MASK_READ_DEV__out_eot__pend 1
+#define R_USB_IRQ_MASK_READ_DEV__ep3_in_eot__BITNR 11
+#define R_USB_IRQ_MASK_READ_DEV__ep3_in_eot__WIDTH 1
+#define R_USB_IRQ_MASK_READ_DEV__ep3_in_eot__no_pend 0
+#define R_USB_IRQ_MASK_READ_DEV__ep3_in_eot__pend 1
+#define R_USB_IRQ_MASK_READ_DEV__ep2_in_eot__BITNR 10
+#define R_USB_IRQ_MASK_READ_DEV__ep2_in_eot__WIDTH 1
+#define R_USB_IRQ_MASK_READ_DEV__ep2_in_eot__no_pend 0
+#define R_USB_IRQ_MASK_READ_DEV__ep2_in_eot__pend 1
+#define R_USB_IRQ_MASK_READ_DEV__ep1_in_eot__BITNR 9
+#define R_USB_IRQ_MASK_READ_DEV__ep1_in_eot__WIDTH 1
+#define R_USB_IRQ_MASK_READ_DEV__ep1_in_eot__no_pend 0
+#define R_USB_IRQ_MASK_READ_DEV__ep1_in_eot__pend 1
+#define R_USB_IRQ_MASK_READ_DEV__ep0_in_eot__BITNR 8
+#define R_USB_IRQ_MASK_READ_DEV__ep0_in_eot__WIDTH 1
+#define R_USB_IRQ_MASK_READ_DEV__ep0_in_eot__no_pend 0
+#define R_USB_IRQ_MASK_READ_DEV__ep0_in_eot__pend 1
+#define R_USB_IRQ_MASK_READ_DEV__epid_attn__BITNR 3
+#define R_USB_IRQ_MASK_READ_DEV__epid_attn__WIDTH 1
+#define R_USB_IRQ_MASK_READ_DEV__epid_attn__no_pend 0
+#define R_USB_IRQ_MASK_READ_DEV__epid_attn__pend 1
+#define R_USB_IRQ_MASK_READ_DEV__sof__BITNR 2
+#define R_USB_IRQ_MASK_READ_DEV__sof__WIDTH 1
+#define R_USB_IRQ_MASK_READ_DEV__sof__no_pend 0
+#define R_USB_IRQ_MASK_READ_DEV__sof__pend 1
+#define R_USB_IRQ_MASK_READ_DEV__port_status__BITNR 1
+#define R_USB_IRQ_MASK_READ_DEV__port_status__WIDTH 1
+#define R_USB_IRQ_MASK_READ_DEV__port_status__no_pend 0
+#define R_USB_IRQ_MASK_READ_DEV__port_status__pend 1
+#define R_USB_IRQ_MASK_READ_DEV__ctl_status__BITNR 0
+#define R_USB_IRQ_MASK_READ_DEV__ctl_status__WIDTH 1
+#define R_USB_IRQ_MASK_READ_DEV__ctl_status__no_pend 0
+#define R_USB_IRQ_MASK_READ_DEV__ctl_status__pend 1
+
+#define R_USB_IRQ_MASK_CLR_DEV (IO_TYPECAST_UWORD 0xb0000206)
+#define R_USB_IRQ_MASK_CLR_DEV__out_eot__BITNR 12
+#define R_USB_IRQ_MASK_CLR_DEV__out_eot__WIDTH 1
+#define R_USB_IRQ_MASK_CLR_DEV__out_eot__nop 0
+#define R_USB_IRQ_MASK_CLR_DEV__out_eot__clr 1
+#define R_USB_IRQ_MASK_CLR_DEV__ep3_in_eot__BITNR 11
+#define R_USB_IRQ_MASK_CLR_DEV__ep3_in_eot__WIDTH 1
+#define R_USB_IRQ_MASK_CLR_DEV__ep3_in_eot__nop 0
+#define R_USB_IRQ_MASK_CLR_DEV__ep3_in_eot__clr 1
+#define R_USB_IRQ_MASK_CLR_DEV__ep2_in_eot__BITNR 10
+#define R_USB_IRQ_MASK_CLR_DEV__ep2_in_eot__WIDTH 1
+#define R_USB_IRQ_MASK_CLR_DEV__ep2_in_eot__nop 0
+#define R_USB_IRQ_MASK_CLR_DEV__ep2_in_eot__clr 1
+#define R_USB_IRQ_MASK_CLR_DEV__ep1_in_eot__BITNR 9
+#define R_USB_IRQ_MASK_CLR_DEV__ep1_in_eot__WIDTH 1
+#define R_USB_IRQ_MASK_CLR_DEV__ep1_in_eot__nop 0
+#define R_USB_IRQ_MASK_CLR_DEV__ep1_in_eot__clr 1
+#define R_USB_IRQ_MASK_CLR_DEV__ep0_in_eot__BITNR 8
+#define R_USB_IRQ_MASK_CLR_DEV__ep0_in_eot__WIDTH 1
+#define R_USB_IRQ_MASK_CLR_DEV__ep0_in_eot__nop 0
+#define R_USB_IRQ_MASK_CLR_DEV__ep0_in_eot__clr 1
+#define R_USB_IRQ_MASK_CLR_DEV__epid_attn__BITNR 3
+#define R_USB_IRQ_MASK_CLR_DEV__epid_attn__WIDTH 1
+#define R_USB_IRQ_MASK_CLR_DEV__epid_attn__nop 0
+#define R_USB_IRQ_MASK_CLR_DEV__epid_attn__clr 1
+#define R_USB_IRQ_MASK_CLR_DEV__sof__BITNR 2
+#define R_USB_IRQ_MASK_CLR_DEV__sof__WIDTH 1
+#define R_USB_IRQ_MASK_CLR_DEV__sof__nop 0
+#define R_USB_IRQ_MASK_CLR_DEV__sof__clr 1
+#define R_USB_IRQ_MASK_CLR_DEV__port_status__BITNR 1
+#define R_USB_IRQ_MASK_CLR_DEV__port_status__WIDTH 1
+#define R_USB_IRQ_MASK_CLR_DEV__port_status__nop 0
+#define R_USB_IRQ_MASK_CLR_DEV__port_status__clr 1
+#define R_USB_IRQ_MASK_CLR_DEV__ctl_status__BITNR 0
+#define R_USB_IRQ_MASK_CLR_DEV__ctl_status__WIDTH 1
+#define R_USB_IRQ_MASK_CLR_DEV__ctl_status__nop 0
+#define R_USB_IRQ_MASK_CLR_DEV__ctl_status__clr 1
+
+#define R_USB_IRQ_READ_DEV (IO_TYPECAST_RO_UWORD 0xb0000206)
+#define R_USB_IRQ_READ_DEV__out_eot__BITNR 12
+#define R_USB_IRQ_READ_DEV__out_eot__WIDTH 1
+#define R_USB_IRQ_READ_DEV__out_eot__no_pend 0
+#define R_USB_IRQ_READ_DEV__out_eot__pend 1
+#define R_USB_IRQ_READ_DEV__ep3_in_eot__BITNR 11
+#define R_USB_IRQ_READ_DEV__ep3_in_eot__WIDTH 1
+#define R_USB_IRQ_READ_DEV__ep3_in_eot__no_pend 0
+#define R_USB_IRQ_READ_DEV__ep3_in_eot__pend 1
+#define R_USB_IRQ_READ_DEV__ep2_in_eot__BITNR 10
+#define R_USB_IRQ_READ_DEV__ep2_in_eot__WIDTH 1
+#define R_USB_IRQ_READ_DEV__ep2_in_eot__no_pend 0
+#define R_USB_IRQ_READ_DEV__ep2_in_eot__pend 1
+#define R_USB_IRQ_READ_DEV__ep1_in_eot__BITNR 9
+#define R_USB_IRQ_READ_DEV__ep1_in_eot__WIDTH 1
+#define R_USB_IRQ_READ_DEV__ep1_in_eot__no_pend 0
+#define R_USB_IRQ_READ_DEV__ep1_in_eot__pend 1
+#define R_USB_IRQ_READ_DEV__ep0_in_eot__BITNR 8
+#define R_USB_IRQ_READ_DEV__ep0_in_eot__WIDTH 1
+#define R_USB_IRQ_READ_DEV__ep0_in_eot__no_pend 0
+#define R_USB_IRQ_READ_DEV__ep0_in_eot__pend 1
+#define R_USB_IRQ_READ_DEV__epid_attn__BITNR 3
+#define R_USB_IRQ_READ_DEV__epid_attn__WIDTH 1
+#define R_USB_IRQ_READ_DEV__epid_attn__no_pend 0
+#define R_USB_IRQ_READ_DEV__epid_attn__pend 1
+#define R_USB_IRQ_READ_DEV__sof__BITNR 2
+#define R_USB_IRQ_READ_DEV__sof__WIDTH 1
+#define R_USB_IRQ_READ_DEV__sof__no_pend 0
+#define R_USB_IRQ_READ_DEV__sof__pend 1
+#define R_USB_IRQ_READ_DEV__port_status__BITNR 1
+#define R_USB_IRQ_READ_DEV__port_status__WIDTH 1
+#define R_USB_IRQ_READ_DEV__port_status__no_pend 0
+#define R_USB_IRQ_READ_DEV__port_status__pend 1
+#define R_USB_IRQ_READ_DEV__ctl_status__BITNR 0
+#define R_USB_IRQ_READ_DEV__ctl_status__WIDTH 1
+#define R_USB_IRQ_READ_DEV__ctl_status__no_pend 0
+#define R_USB_IRQ_READ_DEV__ctl_status__pend 1
+
+#define R_USB_FM_NUMBER (IO_TYPECAST_UDWORD 0xb000020c)
+#define R_USB_FM_NUMBER__value__BITNR 0
+#define R_USB_FM_NUMBER__value__WIDTH 32
+
+#define R_USB_FM_NUMBER_DEV (IO_TYPECAST_UDWORD 0xb000020c)
+#define R_USB_FM_NUMBER_DEV__sign__BITNR 31
+#define R_USB_FM_NUMBER_DEV__sign__WIDTH 1
+#define R_USB_FM_NUMBER_DEV__sign__early 0
+#define R_USB_FM_NUMBER_DEV__sign__late 1
+#define R_USB_FM_NUMBER_DEV__deviation__BITNR 24
+#define R_USB_FM_NUMBER_DEV__deviation__WIDTH 7
+#define R_USB_FM_NUMBER_DEV__fm_number__BITNR 0
+#define R_USB_FM_NUMBER_DEV__fm_number__WIDTH 11
+
+#define R_USB_FM_INTERVAL (IO_TYPECAST_UWORD 0xb0000210)
+#define R_USB_FM_INTERVAL__fixed__BITNR 6
+#define R_USB_FM_INTERVAL__fixed__WIDTH 8
+#define R_USB_FM_INTERVAL__adj__BITNR 0
+#define R_USB_FM_INTERVAL__adj__WIDTH 6
+
+#define R_USB_FM_REMAINING (IO_TYPECAST_RO_UWORD 0xb0000212)
+#define R_USB_FM_REMAINING__value__BITNR 0
+#define R_USB_FM_REMAINING__value__WIDTH 14
+
+#define R_USB_FM_PSTART (IO_TYPECAST_UWORD 0xb0000214)
+#define R_USB_FM_PSTART__value__BITNR 0
+#define R_USB_FM_PSTART__value__WIDTH 14
+
+#define R_USB_RH_STATUS (IO_TYPECAST_RO_BYTE 0xb0000203)
+#define R_USB_RH_STATUS__babble2__BITNR 7
+#define R_USB_RH_STATUS__babble2__WIDTH 1
+#define R_USB_RH_STATUS__babble2__no 0
+#define R_USB_RH_STATUS__babble2__yes 1
+#define R_USB_RH_STATUS__babble1__BITNR 6
+#define R_USB_RH_STATUS__babble1__WIDTH 1
+#define R_USB_RH_STATUS__babble1__no 0
+#define R_USB_RH_STATUS__babble1__yes 1
+#define R_USB_RH_STATUS__bus1__BITNR 4
+#define R_USB_RH_STATUS__bus1__WIDTH 2
+#define R_USB_RH_STATUS__bus1__SE0 0
+#define R_USB_RH_STATUS__bus1__Diff0 1
+#define R_USB_RH_STATUS__bus1__Diff1 2
+#define R_USB_RH_STATUS__bus1__SE1 3
+#define R_USB_RH_STATUS__bus2__BITNR 2
+#define R_USB_RH_STATUS__bus2__WIDTH 2
+#define R_USB_RH_STATUS__bus2__SE0 0
+#define R_USB_RH_STATUS__bus2__Diff0 1
+#define R_USB_RH_STATUS__bus2__Diff1 2
+#define R_USB_RH_STATUS__bus2__SE1 3
+#define R_USB_RH_STATUS__nports__BITNR 0
+#define R_USB_RH_STATUS__nports__WIDTH 2
+
+#define R_USB_RH_PORT_STATUS_1 (IO_TYPECAST_RO_UWORD 0xb0000218)
+#define R_USB_RH_PORT_STATUS_1__speed__BITNR 9
+#define R_USB_RH_PORT_STATUS_1__speed__WIDTH 1
+#define R_USB_RH_PORT_STATUS_1__speed__full 0
+#define R_USB_RH_PORT_STATUS_1__speed__low 1
+#define R_USB_RH_PORT_STATUS_1__power__BITNR 8
+#define R_USB_RH_PORT_STATUS_1__power__WIDTH 1
+#define R_USB_RH_PORT_STATUS_1__reset__BITNR 4
+#define R_USB_RH_PORT_STATUS_1__reset__WIDTH 1
+#define R_USB_RH_PORT_STATUS_1__reset__no 0
+#define R_USB_RH_PORT_STATUS_1__reset__yes 1
+#define R_USB_RH_PORT_STATUS_1__overcurrent__BITNR 3
+#define R_USB_RH_PORT_STATUS_1__overcurrent__WIDTH 1
+#define R_USB_RH_PORT_STATUS_1__overcurrent__no 0
+#define R_USB_RH_PORT_STATUS_1__overcurrent__yes 1
+#define R_USB_RH_PORT_STATUS_1__suspended__BITNR 2
+#define R_USB_RH_PORT_STATUS_1__suspended__WIDTH 1
+#define R_USB_RH_PORT_STATUS_1__suspended__no 0
+#define R_USB_RH_PORT_STATUS_1__suspended__yes 1
+#define R_USB_RH_PORT_STATUS_1__enabled__BITNR 1
+#define R_USB_RH_PORT_STATUS_1__enabled__WIDTH 1
+#define R_USB_RH_PORT_STATUS_1__enabled__no 0
+#define R_USB_RH_PORT_STATUS_1__enabled__yes 1
+#define R_USB_RH_PORT_STATUS_1__connected__BITNR 0
+#define R_USB_RH_PORT_STATUS_1__connected__WIDTH 1
+#define R_USB_RH_PORT_STATUS_1__connected__no 0
+#define R_USB_RH_PORT_STATUS_1__connected__yes 1
+
+#define R_USB_RH_PORT_STATUS_2 (IO_TYPECAST_RO_UWORD 0xb000021a)
+#define R_USB_RH_PORT_STATUS_2__speed__BITNR 9
+#define R_USB_RH_PORT_STATUS_2__speed__WIDTH 1
+#define R_USB_RH_PORT_STATUS_2__speed__full 0
+#define R_USB_RH_PORT_STATUS_2__speed__low 1
+#define R_USB_RH_PORT_STATUS_2__power__BITNR 8
+#define R_USB_RH_PORT_STATUS_2__power__WIDTH 1
+#define R_USB_RH_PORT_STATUS_2__reset__BITNR 4
+#define R_USB_RH_PORT_STATUS_2__reset__WIDTH 1
+#define R_USB_RH_PORT_STATUS_2__reset__no 0
+#define R_USB_RH_PORT_STATUS_2__reset__yes 1
+#define R_USB_RH_PORT_STATUS_2__overcurrent__BITNR 3
+#define R_USB_RH_PORT_STATUS_2__overcurrent__WIDTH 1
+#define R_USB_RH_PORT_STATUS_2__overcurrent__no 0
+#define R_USB_RH_PORT_STATUS_2__overcurrent__yes 1
+#define R_USB_RH_PORT_STATUS_2__suspended__BITNR 2
+#define R_USB_RH_PORT_STATUS_2__suspended__WIDTH 1
+#define R_USB_RH_PORT_STATUS_2__suspended__no 0
+#define R_USB_RH_PORT_STATUS_2__suspended__yes 1
+#define R_USB_RH_PORT_STATUS_2__enabled__BITNR 1
+#define R_USB_RH_PORT_STATUS_2__enabled__WIDTH 1
+#define R_USB_RH_PORT_STATUS_2__enabled__no 0
+#define R_USB_RH_PORT_STATUS_2__enabled__yes 1
+#define R_USB_RH_PORT_STATUS_2__connected__BITNR 0
+#define R_USB_RH_PORT_STATUS_2__connected__WIDTH 1
+#define R_USB_RH_PORT_STATUS_2__connected__no 0
+#define R_USB_RH_PORT_STATUS_2__connected__yes 1
+
+#define R_USB_EPT_INDEX (IO_TYPECAST_BYTE 0xb0000208)
+#define R_USB_EPT_INDEX__value__BITNR 0
+#define R_USB_EPT_INDEX__value__WIDTH 5
+
+#define R_USB_EPT_DATA (IO_TYPECAST_UDWORD 0xb000021c)
+#define R_USB_EPT_DATA__valid__BITNR 31
+#define R_USB_EPT_DATA__valid__WIDTH 1
+#define R_USB_EPT_DATA__valid__no 0
+#define R_USB_EPT_DATA__valid__yes 1
+#define R_USB_EPT_DATA__hold__BITNR 30
+#define R_USB_EPT_DATA__hold__WIDTH 1
+#define R_USB_EPT_DATA__hold__no 0
+#define R_USB_EPT_DATA__hold__yes 1
+#define R_USB_EPT_DATA__error_count_in__BITNR 28
+#define R_USB_EPT_DATA__error_count_in__WIDTH 2
+#define R_USB_EPT_DATA__t_in__BITNR 27
+#define R_USB_EPT_DATA__t_in__WIDTH 1
+#define R_USB_EPT_DATA__low_speed__BITNR 26
+#define R_USB_EPT_DATA__low_speed__WIDTH 1
+#define R_USB_EPT_DATA__low_speed__no 0
+#define R_USB_EPT_DATA__low_speed__yes 1
+#define R_USB_EPT_DATA__port__BITNR 24
+#define R_USB_EPT_DATA__port__WIDTH 2
+#define R_USB_EPT_DATA__port__any 0
+#define R_USB_EPT_DATA__port__p1 1
+#define R_USB_EPT_DATA__port__p2 2
+#define R_USB_EPT_DATA__port__undef 3
+#define R_USB_EPT_DATA__error_code__BITNR 22
+#define R_USB_EPT_DATA__error_code__WIDTH 2
+#define R_USB_EPT_DATA__error_code__no_error 0
+#define R_USB_EPT_DATA__error_code__stall 1
+#define R_USB_EPT_DATA__error_code__bus_error 2
+#define R_USB_EPT_DATA__error_code__buffer_error 3
+#define R_USB_EPT_DATA__t_out__BITNR 21
+#define R_USB_EPT_DATA__t_out__WIDTH 1
+#define R_USB_EPT_DATA__error_count_out__BITNR 19
+#define R_USB_EPT_DATA__error_count_out__WIDTH 2
+#define R_USB_EPT_DATA__max_len__BITNR 11
+#define R_USB_EPT_DATA__max_len__WIDTH 7
+#define R_USB_EPT_DATA__ep__BITNR 7
+#define R_USB_EPT_DATA__ep__WIDTH 4
+#define R_USB_EPT_DATA__dev__BITNR 0
+#define R_USB_EPT_DATA__dev__WIDTH 7
+
+#define R_USB_EPT_DATA_ISO (IO_TYPECAST_UDWORD 0xb000021c)
+#define R_USB_EPT_DATA_ISO__valid__BITNR 31
+#define R_USB_EPT_DATA_ISO__valid__WIDTH 1
+#define R_USB_EPT_DATA_ISO__valid__no 0
+#define R_USB_EPT_DATA_ISO__valid__yes 1
+#define R_USB_EPT_DATA_ISO__port__BITNR 24
+#define R_USB_EPT_DATA_ISO__port__WIDTH 2
+#define R_USB_EPT_DATA_ISO__port__any 0
+#define R_USB_EPT_DATA_ISO__port__p1 1
+#define R_USB_EPT_DATA_ISO__port__p2 2
+#define R_USB_EPT_DATA_ISO__port__undef 3
+#define R_USB_EPT_DATA_ISO__error_code__BITNR 22
+#define R_USB_EPT_DATA_ISO__error_code__WIDTH 2
+#define R_USB_EPT_DATA_ISO__error_code__no_error 0
+#define R_USB_EPT_DATA_ISO__error_code__stall 1
+#define R_USB_EPT_DATA_ISO__error_code__bus_error 2
+#define R_USB_EPT_DATA_ISO__error_code__TBD3 3
+#define R_USB_EPT_DATA_ISO__max_len__BITNR 11
+#define R_USB_EPT_DATA_ISO__max_len__WIDTH 10
+#define R_USB_EPT_DATA_ISO__ep__BITNR 7
+#define R_USB_EPT_DATA_ISO__ep__WIDTH 4
+#define R_USB_EPT_DATA_ISO__dev__BITNR 0
+#define R_USB_EPT_DATA_ISO__dev__WIDTH 7
+
+#define R_USB_EPT_DATA_DEV (IO_TYPECAST_UDWORD 0xb000021c)
+#define R_USB_EPT_DATA_DEV__valid__BITNR 31
+#define R_USB_EPT_DATA_DEV__valid__WIDTH 1
+#define R_USB_EPT_DATA_DEV__valid__no 0
+#define R_USB_EPT_DATA_DEV__valid__yes 1
+#define R_USB_EPT_DATA_DEV__hold__BITNR 30
+#define R_USB_EPT_DATA_DEV__hold__WIDTH 1
+#define R_USB_EPT_DATA_DEV__hold__no 0
+#define R_USB_EPT_DATA_DEV__hold__yes 1
+#define R_USB_EPT_DATA_DEV__stall__BITNR 29
+#define R_USB_EPT_DATA_DEV__stall__WIDTH 1
+#define R_USB_EPT_DATA_DEV__stall__no 0
+#define R_USB_EPT_DATA_DEV__stall__yes 1
+#define R_USB_EPT_DATA_DEV__iso_resp__BITNR 28
+#define R_USB_EPT_DATA_DEV__iso_resp__WIDTH 1
+#define R_USB_EPT_DATA_DEV__iso_resp__quiet 0
+#define R_USB_EPT_DATA_DEV__iso_resp__yes 1
+#define R_USB_EPT_DATA_DEV__ctrl__BITNR 27
+#define R_USB_EPT_DATA_DEV__ctrl__WIDTH 1
+#define R_USB_EPT_DATA_DEV__ctrl__no 0
+#define R_USB_EPT_DATA_DEV__ctrl__yes 1
+#define R_USB_EPT_DATA_DEV__iso__BITNR 26
+#define R_USB_EPT_DATA_DEV__iso__WIDTH 1
+#define R_USB_EPT_DATA_DEV__iso__no 0
+#define R_USB_EPT_DATA_DEV__iso__yes 1
+#define R_USB_EPT_DATA_DEV__port__BITNR 24
+#define R_USB_EPT_DATA_DEV__port__WIDTH 2
+#define R_USB_EPT_DATA_DEV__control_phase__BITNR 22
+#define R_USB_EPT_DATA_DEV__control_phase__WIDTH 1
+#define R_USB_EPT_DATA_DEV__t__BITNR 21
+#define R_USB_EPT_DATA_DEV__t__WIDTH 1
+#define R_USB_EPT_DATA_DEV__max_len__BITNR 11
+#define R_USB_EPT_DATA_DEV__max_len__WIDTH 10
+#define R_USB_EPT_DATA_DEV__ep__BITNR 7
+#define R_USB_EPT_DATA_DEV__ep__WIDTH 4
+#define R_USB_EPT_DATA_DEV__dev__BITNR 0
+#define R_USB_EPT_DATA_DEV__dev__WIDTH 7
+
+#define R_USB_SNMP_TERROR (IO_TYPECAST_UDWORD 0xb0000220)
+#define R_USB_SNMP_TERROR__value__BITNR 0
+#define R_USB_SNMP_TERROR__value__WIDTH 32
+
+#define R_USB_EPID_ATTN (IO_TYPECAST_RO_UDWORD 0xb0000224)
+#define R_USB_EPID_ATTN__value__BITNR 0
+#define R_USB_EPID_ATTN__value__WIDTH 32
+
+#define R_USB_PORT1_DISABLE (IO_TYPECAST_BYTE 0xb000006a)
+#define R_USB_PORT1_DISABLE__disable__BITNR 0
+#define R_USB_PORT1_DISABLE__disable__WIDTH 1
+#define R_USB_PORT1_DISABLE__disable__yes 0
+#define R_USB_PORT1_DISABLE__disable__no 1
+
+#define R_USB_PORT2_DISABLE (IO_TYPECAST_BYTE 0xb0000052)
+#define R_USB_PORT2_DISABLE__disable__BITNR 0
+#define R_USB_PORT2_DISABLE__disable__WIDTH 1
+#define R_USB_PORT2_DISABLE__disable__yes 0
+#define R_USB_PORT2_DISABLE__disable__no 1
+
+/*
+!* MMU registers
+!*/
+
+#define R_MMU_CONFIG (IO_TYPECAST_UDWORD 0xb0000240)
+#define R_MMU_CONFIG__mmu_enable__BITNR 31
+#define R_MMU_CONFIG__mmu_enable__WIDTH 1
+#define R_MMU_CONFIG__mmu_enable__enable 1
+#define R_MMU_CONFIG__mmu_enable__disable 0
+#define R_MMU_CONFIG__inv_excp__BITNR 18
+#define R_MMU_CONFIG__inv_excp__WIDTH 1
+#define R_MMU_CONFIG__inv_excp__enable 1
+#define R_MMU_CONFIG__inv_excp__disable 0
+#define R_MMU_CONFIG__acc_excp__BITNR 17
+#define R_MMU_CONFIG__acc_excp__WIDTH 1
+#define R_MMU_CONFIG__acc_excp__enable 1
+#define R_MMU_CONFIG__acc_excp__disable 0
+#define R_MMU_CONFIG__we_excp__BITNR 16
+#define R_MMU_CONFIG__we_excp__WIDTH 1
+#define R_MMU_CONFIG__we_excp__enable 1
+#define R_MMU_CONFIG__we_excp__disable 0
+#define R_MMU_CONFIG__seg_f__BITNR 15
+#define R_MMU_CONFIG__seg_f__WIDTH 1
+#define R_MMU_CONFIG__seg_f__seg 1
+#define R_MMU_CONFIG__seg_f__page 0
+#define R_MMU_CONFIG__seg_e__BITNR 14
+#define R_MMU_CONFIG__seg_e__WIDTH 1
+#define R_MMU_CONFIG__seg_e__seg 1
+#define R_MMU_CONFIG__seg_e__page 0
+#define R_MMU_CONFIG__seg_d__BITNR 13
+#define R_MMU_CONFIG__seg_d__WIDTH 1
+#define R_MMU_CONFIG__seg_d__seg 1
+#define R_MMU_CONFIG__seg_d__page 0
+#define R_MMU_CONFIG__seg_c__BITNR 12
+#define R_MMU_CONFIG__seg_c__WIDTH 1
+#define R_MMU_CONFIG__seg_c__seg 1
+#define R_MMU_CONFIG__seg_c__page 0
+#define R_MMU_CONFIG__seg_b__BITNR 11
+#define R_MMU_CONFIG__seg_b__WIDTH 1
+#define R_MMU_CONFIG__seg_b__seg 1
+#define R_MMU_CONFIG__seg_b__page 0
+#define R_MMU_CONFIG__seg_a__BITNR 10
+#define R_MMU_CONFIG__seg_a__WIDTH 1
+#define R_MMU_CONFIG__seg_a__seg 1
+#define R_MMU_CONFIG__seg_a__page 0
+#define R_MMU_CONFIG__seg_9__BITNR 9
+#define R_MMU_CONFIG__seg_9__WIDTH 1
+#define R_MMU_CONFIG__seg_9__seg 1
+#define R_MMU_CONFIG__seg_9__page 0
+#define R_MMU_CONFIG__seg_8__BITNR 8
+#define R_MMU_CONFIG__seg_8__WIDTH 1
+#define R_MMU_CONFIG__seg_8__seg 1
+#define R_MMU_CONFIG__seg_8__page 0
+#define R_MMU_CONFIG__seg_7__BITNR 7
+#define R_MMU_CONFIG__seg_7__WIDTH 1
+#define R_MMU_CONFIG__seg_7__seg 1
+#define R_MMU_CONFIG__seg_7__page 0
+#define R_MMU_CONFIG__seg_6__BITNR 6
+#define R_MMU_CONFIG__seg_6__WIDTH 1
+#define R_MMU_CONFIG__seg_6__seg 1
+#define R_MMU_CONFIG__seg_6__page 0
+#define R_MMU_CONFIG__seg_5__BITNR 5
+#define R_MMU_CONFIG__seg_5__WIDTH 1
+#define R_MMU_CONFIG__seg_5__seg 1
+#define R_MMU_CONFIG__seg_5__page 0
+#define R_MMU_CONFIG__seg_4__BITNR 4
+#define R_MMU_CONFIG__seg_4__WIDTH 1
+#define R_MMU_CONFIG__seg_4__seg 1
+#define R_MMU_CONFIG__seg_4__page 0
+#define R_MMU_CONFIG__seg_3__BITNR 3
+#define R_MMU_CONFIG__seg_3__WIDTH 1
+#define R_MMU_CONFIG__seg_3__seg 1
+#define R_MMU_CONFIG__seg_3__page 0
+#define R_MMU_CONFIG__seg_2__BITNR 2
+#define R_MMU_CONFIG__seg_2__WIDTH 1
+#define R_MMU_CONFIG__seg_2__seg 1
+#define R_MMU_CONFIG__seg_2__page 0
+#define R_MMU_CONFIG__seg_1__BITNR 1
+#define R_MMU_CONFIG__seg_1__WIDTH 1
+#define R_MMU_CONFIG__seg_1__seg 1
+#define R_MMU_CONFIG__seg_1__page 0
+#define R_MMU_CONFIG__seg_0__BITNR 0
+#define R_MMU_CONFIG__seg_0__WIDTH 1
+#define R_MMU_CONFIG__seg_0__seg 1
+#define R_MMU_CONFIG__seg_0__page 0
+
+#define R_MMU_KSEG (IO_TYPECAST_UWORD 0xb0000240)
+#define R_MMU_KSEG__seg_f__BITNR 15
+#define R_MMU_KSEG__seg_f__WIDTH 1
+#define R_MMU_KSEG__seg_f__seg 1
+#define R_MMU_KSEG__seg_f__page 0
+#define R_MMU_KSEG__seg_e__BITNR 14
+#define R_MMU_KSEG__seg_e__WIDTH 1
+#define R_MMU_KSEG__seg_e__seg 1
+#define R_MMU_KSEG__seg_e__page 0
+#define R_MMU_KSEG__seg_d__BITNR 13
+#define R_MMU_KSEG__seg_d__WIDTH 1
+#define R_MMU_KSEG__seg_d__seg 1
+#define R_MMU_KSEG__seg_d__page 0
+#define R_MMU_KSEG__seg_c__BITNR 12
+#define R_MMU_KSEG__seg_c__WIDTH 1
+#define R_MMU_KSEG__seg_c__seg 1
+#define R_MMU_KSEG__seg_c__page 0
+#define R_MMU_KSEG__seg_b__BITNR 11
+#define R_MMU_KSEG__seg_b__WIDTH 1
+#define R_MMU_KSEG__seg_b__seg 1
+#define R_MMU_KSEG__seg_b__page 0
+#define R_MMU_KSEG__seg_a__BITNR 10
+#define R_MMU_KSEG__seg_a__WIDTH 1
+#define R_MMU_KSEG__seg_a__seg 1
+#define R_MMU_KSEG__seg_a__page 0
+#define R_MMU_KSEG__seg_9__BITNR 9
+#define R_MMU_KSEG__seg_9__WIDTH 1
+#define R_MMU_KSEG__seg_9__seg 1
+#define R_MMU_KSEG__seg_9__page 0
+#define R_MMU_KSEG__seg_8__BITNR 8
+#define R_MMU_KSEG__seg_8__WIDTH 1
+#define R_MMU_KSEG__seg_8__seg 1
+#define R_MMU_KSEG__seg_8__page 0
+#define R_MMU_KSEG__seg_7__BITNR 7
+#define R_MMU_KSEG__seg_7__WIDTH 1
+#define R_MMU_KSEG__seg_7__seg 1
+#define R_MMU_KSEG__seg_7__page 0
+#define R_MMU_KSEG__seg_6__BITNR 6
+#define R_MMU_KSEG__seg_6__WIDTH 1
+#define R_MMU_KSEG__seg_6__seg 1
+#define R_MMU_KSEG__seg_6__page 0
+#define R_MMU_KSEG__seg_5__BITNR 5
+#define R_MMU_KSEG__seg_5__WIDTH 1
+#define R_MMU_KSEG__seg_5__seg 1
+#define R_MMU_KSEG__seg_5__page 0
+#define R_MMU_KSEG__seg_4__BITNR 4
+#define R_MMU_KSEG__seg_4__WIDTH 1
+#define R_MMU_KSEG__seg_4__seg 1
+#define R_MMU_KSEG__seg_4__page 0
+#define R_MMU_KSEG__seg_3__BITNR 3
+#define R_MMU_KSEG__seg_3__WIDTH 1
+#define R_MMU_KSEG__seg_3__seg 1
+#define R_MMU_KSEG__seg_3__page 0
+#define R_MMU_KSEG__seg_2__BITNR 2
+#define R_MMU_KSEG__seg_2__WIDTH 1
+#define R_MMU_KSEG__seg_2__seg 1
+#define R_MMU_KSEG__seg_2__page 0
+#define R_MMU_KSEG__seg_1__BITNR 1
+#define R_MMU_KSEG__seg_1__WIDTH 1
+#define R_MMU_KSEG__seg_1__seg 1
+#define R_MMU_KSEG__seg_1__page 0
+#define R_MMU_KSEG__seg_0__BITNR 0
+#define R_MMU_KSEG__seg_0__WIDTH 1
+#define R_MMU_KSEG__seg_0__seg 1
+#define R_MMU_KSEG__seg_0__page 0
+
+#define R_MMU_CTRL (IO_TYPECAST_BYTE 0xb0000242)
+#define R_MMU_CTRL__inv_excp__BITNR 2
+#define R_MMU_CTRL__inv_excp__WIDTH 1
+#define R_MMU_CTRL__inv_excp__enable 1
+#define R_MMU_CTRL__inv_excp__disable 0
+#define R_MMU_CTRL__acc_excp__BITNR 1
+#define R_MMU_CTRL__acc_excp__WIDTH 1
+#define R_MMU_CTRL__acc_excp__enable 1
+#define R_MMU_CTRL__acc_excp__disable 0
+#define R_MMU_CTRL__we_excp__BITNR 0
+#define R_MMU_CTRL__we_excp__WIDTH 1
+#define R_MMU_CTRL__we_excp__enable 1
+#define R_MMU_CTRL__we_excp__disable 0
+
+#define R_MMU_ENABLE (IO_TYPECAST_BYTE 0xb0000243)
+#define R_MMU_ENABLE__mmu_enable__BITNR 7
+#define R_MMU_ENABLE__mmu_enable__WIDTH 1
+#define R_MMU_ENABLE__mmu_enable__enable 1
+#define R_MMU_ENABLE__mmu_enable__disable 0
+
+#define R_MMU_KBASE_LO (IO_TYPECAST_UDWORD 0xb0000244)
+#define R_MMU_KBASE_LO__base_7__BITNR 28
+#define R_MMU_KBASE_LO__base_7__WIDTH 4
+#define R_MMU_KBASE_LO__base_6__BITNR 24
+#define R_MMU_KBASE_LO__base_6__WIDTH 4
+#define R_MMU_KBASE_LO__base_5__BITNR 20
+#define R_MMU_KBASE_LO__base_5__WIDTH 4
+#define R_MMU_KBASE_LO__base_4__BITNR 16
+#define R_MMU_KBASE_LO__base_4__WIDTH 4
+#define R_MMU_KBASE_LO__base_3__BITNR 12
+#define R_MMU_KBASE_LO__base_3__WIDTH 4
+#define R_MMU_KBASE_LO__base_2__BITNR 8
+#define R_MMU_KBASE_LO__base_2__WIDTH 4
+#define R_MMU_KBASE_LO__base_1__BITNR 4
+#define R_MMU_KBASE_LO__base_1__WIDTH 4
+#define R_MMU_KBASE_LO__base_0__BITNR 0
+#define R_MMU_KBASE_LO__base_0__WIDTH 4
+
+#define R_MMU_KBASE_HI (IO_TYPECAST_UDWORD 0xb0000248)
+#define R_MMU_KBASE_HI__base_f__BITNR 28
+#define R_MMU_KBASE_HI__base_f__WIDTH 4
+#define R_MMU_KBASE_HI__base_e__BITNR 24
+#define R_MMU_KBASE_HI__base_e__WIDTH 4
+#define R_MMU_KBASE_HI__base_d__BITNR 20
+#define R_MMU_KBASE_HI__base_d__WIDTH 4
+#define R_MMU_KBASE_HI__base_c__BITNR 16
+#define R_MMU_KBASE_HI__base_c__WIDTH 4
+#define R_MMU_KBASE_HI__base_b__BITNR 12
+#define R_MMU_KBASE_HI__base_b__WIDTH 4
+#define R_MMU_KBASE_HI__base_a__BITNR 8
+#define R_MMU_KBASE_HI__base_a__WIDTH 4
+#define R_MMU_KBASE_HI__base_9__BITNR 4
+#define R_MMU_KBASE_HI__base_9__WIDTH 4
+#define R_MMU_KBASE_HI__base_8__BITNR 0
+#define R_MMU_KBASE_HI__base_8__WIDTH 4
+
+#define R_MMU_CONTEXT (IO_TYPECAST_BYTE 0xb000024c)
+#define R_MMU_CONTEXT__page_id__BITNR 0
+#define R_MMU_CONTEXT__page_id__WIDTH 6
+
+#define R_MMU_CAUSE (IO_TYPECAST_RO_UDWORD 0xb0000250)
+#define R_MMU_CAUSE__vpn__BITNR 13
+#define R_MMU_CAUSE__vpn__WIDTH 19
+#define R_MMU_CAUSE__miss_excp__BITNR 12
+#define R_MMU_CAUSE__miss_excp__WIDTH 1
+#define R_MMU_CAUSE__miss_excp__yes 1
+#define R_MMU_CAUSE__miss_excp__no 0
+#define R_MMU_CAUSE__inv_excp__BITNR 11
+#define R_MMU_CAUSE__inv_excp__WIDTH 1
+#define R_MMU_CAUSE__inv_excp__yes 1
+#define R_MMU_CAUSE__inv_excp__no 0
+#define R_MMU_CAUSE__acc_excp__BITNR 10
+#define R_MMU_CAUSE__acc_excp__WIDTH 1
+#define R_MMU_CAUSE__acc_excp__yes 1
+#define R_MMU_CAUSE__acc_excp__no 0
+#define R_MMU_CAUSE__we_excp__BITNR 9
+#define R_MMU_CAUSE__we_excp__WIDTH 1
+#define R_MMU_CAUSE__we_excp__yes 1
+#define R_MMU_CAUSE__we_excp__no 0
+#define R_MMU_CAUSE__wr_rd__BITNR 8
+#define R_MMU_CAUSE__wr_rd__WIDTH 1
+#define R_MMU_CAUSE__wr_rd__write 1
+#define R_MMU_CAUSE__wr_rd__read 0
+#define R_MMU_CAUSE__page_id__BITNR 0
+#define R_MMU_CAUSE__page_id__WIDTH 6
+
+#define R_TLB_SELECT (IO_TYPECAST_BYTE 0xb0000254)
+#define R_TLB_SELECT__index__BITNR 0
+#define R_TLB_SELECT__index__WIDTH 6
+
+#define R_TLB_LO (IO_TYPECAST_UDWORD 0xb0000258)
+#define R_TLB_LO__pfn__BITNR 13
+#define R_TLB_LO__pfn__WIDTH 19
+#define R_TLB_LO__global__BITNR 3
+#define R_TLB_LO__global__WIDTH 1
+#define R_TLB_LO__global__yes 1
+#define R_TLB_LO__global__no 0
+#define R_TLB_LO__valid__BITNR 2
+#define R_TLB_LO__valid__WIDTH 1
+#define R_TLB_LO__valid__yes 1
+#define R_TLB_LO__valid__no 0
+#define R_TLB_LO__kernel__BITNR 1
+#define R_TLB_LO__kernel__WIDTH 1
+#define R_TLB_LO__kernel__yes 1
+#define R_TLB_LO__kernel__no 0
+#define R_TLB_LO__we__BITNR 0
+#define R_TLB_LO__we__WIDTH 1
+#define R_TLB_LO__we__yes 1
+#define R_TLB_LO__we__no 0
+
+#define R_TLB_HI (IO_TYPECAST_UDWORD 0xb000025c)
+#define R_TLB_HI__vpn__BITNR 13
+#define R_TLB_HI__vpn__WIDTH 19
+#define R_TLB_HI__page_id__BITNR 0
+#define R_TLB_HI__page_id__WIDTH 6
+
+/*
+!* Syncrounous serial port registers
+!*/
+
+#define R_SYNC_SERIAL1_REC_DATA (IO_TYPECAST_RO_UDWORD 0xb000006c)
+#define R_SYNC_SERIAL1_REC_DATA__data_in__BITNR 0
+#define R_SYNC_SERIAL1_REC_DATA__data_in__WIDTH 32
+
+#define R_SYNC_SERIAL1_REC_WORD (IO_TYPECAST_RO_UWORD 0xb000006c)
+#define R_SYNC_SERIAL1_REC_WORD__data_in__BITNR 0
+#define R_SYNC_SERIAL1_REC_WORD__data_in__WIDTH 16
+
+#define R_SYNC_SERIAL1_REC_BYTE (IO_TYPECAST_RO_BYTE 0xb000006c)
+#define R_SYNC_SERIAL1_REC_BYTE__data_in__BITNR 0
+#define R_SYNC_SERIAL1_REC_BYTE__data_in__WIDTH 8
+
+#define R_SYNC_SERIAL1_STATUS (IO_TYPECAST_RO_UDWORD 0xb0000068)
+#define R_SYNC_SERIAL1_STATUS__rec_status__BITNR 15
+#define R_SYNC_SERIAL1_STATUS__rec_status__WIDTH 1
+#define R_SYNC_SERIAL1_STATUS__rec_status__running 0
+#define R_SYNC_SERIAL1_STATUS__rec_status__idle 1
+#define R_SYNC_SERIAL1_STATUS__tr_empty__BITNR 14
+#define R_SYNC_SERIAL1_STATUS__tr_empty__WIDTH 1
+#define R_SYNC_SERIAL1_STATUS__tr_empty__empty 1
+#define R_SYNC_SERIAL1_STATUS__tr_empty__not_empty 0
+#define R_SYNC_SERIAL1_STATUS__tr_ready__BITNR 13
+#define R_SYNC_SERIAL1_STATUS__tr_ready__WIDTH 1
+#define R_SYNC_SERIAL1_STATUS__tr_ready__full 0
+#define R_SYNC_SERIAL1_STATUS__tr_ready__ready 1
+#define R_SYNC_SERIAL1_STATUS__pin_1__BITNR 12
+#define R_SYNC_SERIAL1_STATUS__pin_1__WIDTH 1
+#define R_SYNC_SERIAL1_STATUS__pin_1__low 0
+#define R_SYNC_SERIAL1_STATUS__pin_1__high 1
+#define R_SYNC_SERIAL1_STATUS__pin_0__BITNR 11
+#define R_SYNC_SERIAL1_STATUS__pin_0__WIDTH 1
+#define R_SYNC_SERIAL1_STATUS__pin_0__low 0
+#define R_SYNC_SERIAL1_STATUS__pin_0__high 1
+#define R_SYNC_SERIAL1_STATUS__underflow__BITNR 10
+#define R_SYNC_SERIAL1_STATUS__underflow__WIDTH 1
+#define R_SYNC_SERIAL1_STATUS__underflow__no 0
+#define R_SYNC_SERIAL1_STATUS__underflow__yes 1
+#define R_SYNC_SERIAL1_STATUS__overrun__BITNR 9
+#define R_SYNC_SERIAL1_STATUS__overrun__WIDTH 1
+#define R_SYNC_SERIAL1_STATUS__overrun__no 0
+#define R_SYNC_SERIAL1_STATUS__overrun__yes 1
+#define R_SYNC_SERIAL1_STATUS__data_avail__BITNR 8
+#define R_SYNC_SERIAL1_STATUS__data_avail__WIDTH 1
+#define R_SYNC_SERIAL1_STATUS__data_avail__no 0
+#define R_SYNC_SERIAL1_STATUS__data_avail__yes 1
+#define R_SYNC_SERIAL1_STATUS__data__BITNR 0
+#define R_SYNC_SERIAL1_STATUS__data__WIDTH 8
+
+#define R_SYNC_SERIAL1_TR_DATA (IO_TYPECAST_UDWORD 0xb000006c)
+#define R_SYNC_SERIAL1_TR_DATA__data_out__BITNR 0
+#define R_SYNC_SERIAL1_TR_DATA__data_out__WIDTH 32
+
+#define R_SYNC_SERIAL1_TR_WORD (IO_TYPECAST_UWORD 0xb000006c)
+#define R_SYNC_SERIAL1_TR_WORD__data_out__BITNR 0
+#define R_SYNC_SERIAL1_TR_WORD__data_out__WIDTH 16
+
+#define R_SYNC_SERIAL1_TR_BYTE (IO_TYPECAST_BYTE 0xb000006c)
+#define R_SYNC_SERIAL1_TR_BYTE__data_out__BITNR 0
+#define R_SYNC_SERIAL1_TR_BYTE__data_out__WIDTH 8
+
+#define R_SYNC_SERIAL1_CTRL (IO_TYPECAST_UDWORD 0xb0000068)
+#define R_SYNC_SERIAL1_CTRL__tr_baud__BITNR 28
+#define R_SYNC_SERIAL1_CTRL__tr_baud__WIDTH 4
+#define R_SYNC_SERIAL1_CTRL__tr_baud__c150Hz 0
+#define R_SYNC_SERIAL1_CTRL__tr_baud__c300Hz 1
+#define R_SYNC_SERIAL1_CTRL__tr_baud__c600Hz 2
+#define R_SYNC_SERIAL1_CTRL__tr_baud__c1200Hz 3
+#define R_SYNC_SERIAL1_CTRL__tr_baud__c2400Hz 4
+#define R_SYNC_SERIAL1_CTRL__tr_baud__c4800Hz 5
+#define R_SYNC_SERIAL1_CTRL__tr_baud__c9600Hz 6
+#define R_SYNC_SERIAL1_CTRL__tr_baud__c19k2Hz 7
+#define R_SYNC_SERIAL1_CTRL__tr_baud__c28k8Hz 8
+#define R_SYNC_SERIAL1_CTRL__tr_baud__c57k6Hz 9
+#define R_SYNC_SERIAL1_CTRL__tr_baud__c115k2Hz 10
+#define R_SYNC_SERIAL1_CTRL__tr_baud__c230k4Hz 11
+#define R_SYNC_SERIAL1_CTRL__tr_baud__c460k8Hz 12
+#define R_SYNC_SERIAL1_CTRL__tr_baud__c921k6Hz 13
+#define R_SYNC_SERIAL1_CTRL__tr_baud__c3125kHz 14
+#define R_SYNC_SERIAL1_CTRL__tr_baud__reserved 15
+#define R_SYNC_SERIAL1_CTRL__dma_enable__BITNR 27
+#define R_SYNC_SERIAL1_CTRL__dma_enable__WIDTH 1
+#define R_SYNC_SERIAL1_CTRL__dma_enable__on 1
+#define R_SYNC_SERIAL1_CTRL__dma_enable__off 0
+#define R_SYNC_SERIAL1_CTRL__mode__BITNR 24
+#define R_SYNC_SERIAL1_CTRL__mode__WIDTH 3
+#define R_SYNC_SERIAL1_CTRL__mode__master_output 0
+#define R_SYNC_SERIAL1_CTRL__mode__slave_output 1
+#define R_SYNC_SERIAL1_CTRL__mode__master_input 2
+#define R_SYNC_SERIAL1_CTRL__mode__slave_input 3
+#define R_SYNC_SERIAL1_CTRL__mode__master_bidir 4
+#define R_SYNC_SERIAL1_CTRL__mode__slave_bidir 5
+#define R_SYNC_SERIAL1_CTRL__error__BITNR 23
+#define R_SYNC_SERIAL1_CTRL__error__WIDTH 1
+#define R_SYNC_SERIAL1_CTRL__error__normal 0
+#define R_SYNC_SERIAL1_CTRL__error__ignore 1
+#define R_SYNC_SERIAL1_CTRL__rec_enable__BITNR 22
+#define R_SYNC_SERIAL1_CTRL__rec_enable__WIDTH 1
+#define R_SYNC_SERIAL1_CTRL__rec_enable__disable 0
+#define R_SYNC_SERIAL1_CTRL__rec_enable__enable 1
+#define R_SYNC_SERIAL1_CTRL__f_synctype__BITNR 21
+#define R_SYNC_SERIAL1_CTRL__f_synctype__WIDTH 1
+#define R_SYNC_SERIAL1_CTRL__f_synctype__normal 0
+#define R_SYNC_SERIAL1_CTRL__f_synctype__early 1
+#define R_SYNC_SERIAL1_CTRL__f_syncsize__BITNR 19
+#define R_SYNC_SERIAL1_CTRL__f_syncsize__WIDTH 2
+#define R_SYNC_SERIAL1_CTRL__f_syncsize__bit 0
+#define R_SYNC_SERIAL1_CTRL__f_syncsize__word 1
+#define R_SYNC_SERIAL1_CTRL__f_syncsize__extended 2
+#define R_SYNC_SERIAL1_CTRL__f_syncsize__reserved 3
+#define R_SYNC_SERIAL1_CTRL__f_sync__BITNR 18
+#define R_SYNC_SERIAL1_CTRL__f_sync__WIDTH 1
+#define R_SYNC_SERIAL1_CTRL__f_sync__on 0
+#define R_SYNC_SERIAL1_CTRL__f_sync__off 1
+#define R_SYNC_SERIAL1_CTRL__clk_mode__BITNR 17
+#define R_SYNC_SERIAL1_CTRL__clk_mode__WIDTH 1
+#define R_SYNC_SERIAL1_CTRL__clk_mode__normal 0
+#define R_SYNC_SERIAL1_CTRL__clk_mode__gated 1
+#define R_SYNC_SERIAL1_CTRL__clk_halt__BITNR 16
+#define R_SYNC_SERIAL1_CTRL__clk_halt__WIDTH 1
+#define R_SYNC_SERIAL1_CTRL__clk_halt__running 0
+#define R_SYNC_SERIAL1_CTRL__clk_halt__stopped 1
+#define R_SYNC_SERIAL1_CTRL__bitorder__BITNR 15
+#define R_SYNC_SERIAL1_CTRL__bitorder__WIDTH 1
+#define R_SYNC_SERIAL1_CTRL__bitorder__lsb 0
+#define R_SYNC_SERIAL1_CTRL__bitorder__msb 1
+#define R_SYNC_SERIAL1_CTRL__tr_enable__BITNR 14
+#define R_SYNC_SERIAL1_CTRL__tr_enable__WIDTH 1
+#define R_SYNC_SERIAL1_CTRL__tr_enable__disable 0
+#define R_SYNC_SERIAL1_CTRL__tr_enable__enable 1
+#define R_SYNC_SERIAL1_CTRL__wordsize__BITNR 11
+#define R_SYNC_SERIAL1_CTRL__wordsize__WIDTH 3
+#define R_SYNC_SERIAL1_CTRL__wordsize__size8bit 0
+#define R_SYNC_SERIAL1_CTRL__wordsize__size12bit 1
+#define R_SYNC_SERIAL1_CTRL__wordsize__size16bit 2
+#define R_SYNC_SERIAL1_CTRL__wordsize__size24bit 3
+#define R_SYNC_SERIAL1_CTRL__wordsize__size32bit 4
+#define R_SYNC_SERIAL1_CTRL__buf_empty__BITNR 10
+#define R_SYNC_SERIAL1_CTRL__buf_empty__WIDTH 1
+#define R_SYNC_SERIAL1_CTRL__buf_empty__lmt_8 0
+#define R_SYNC_SERIAL1_CTRL__buf_empty__lmt_0 1
+#define R_SYNC_SERIAL1_CTRL__buf_full__BITNR 9
+#define R_SYNC_SERIAL1_CTRL__buf_full__WIDTH 1
+#define R_SYNC_SERIAL1_CTRL__buf_full__lmt_32 0
+#define R_SYNC_SERIAL1_CTRL__buf_full__lmt_8 1
+#define R_SYNC_SERIAL1_CTRL__flow_ctrl__BITNR 8
+#define R_SYNC_SERIAL1_CTRL__flow_ctrl__WIDTH 1
+#define R_SYNC_SERIAL1_CTRL__flow_ctrl__disabled 0
+#define R_SYNC_SERIAL1_CTRL__flow_ctrl__enabled 1
+#define R_SYNC_SERIAL1_CTRL__clk_polarity__BITNR 6
+#define R_SYNC_SERIAL1_CTRL__clk_polarity__WIDTH 1
+#define R_SYNC_SERIAL1_CTRL__clk_polarity__pos 0
+#define R_SYNC_SERIAL1_CTRL__clk_polarity__neg 1
+#define R_SYNC_SERIAL1_CTRL__frame_polarity__BITNR 5
+#define R_SYNC_SERIAL1_CTRL__frame_polarity__WIDTH 1
+#define R_SYNC_SERIAL1_CTRL__frame_polarity__normal 0
+#define R_SYNC_SERIAL1_CTRL__frame_polarity__inverted 1
+#define R_SYNC_SERIAL1_CTRL__status_polarity__BITNR 4
+#define R_SYNC_SERIAL1_CTRL__status_polarity__WIDTH 1
+#define R_SYNC_SERIAL1_CTRL__status_polarity__normal 0
+#define R_SYNC_SERIAL1_CTRL__status_polarity__inverted 1
+#define R_SYNC_SERIAL1_CTRL__clk_driver__BITNR 3
+#define R_SYNC_SERIAL1_CTRL__clk_driver__WIDTH 1
+#define R_SYNC_SERIAL1_CTRL__clk_driver__normal 0
+#define R_SYNC_SERIAL1_CTRL__clk_driver__inverted 1
+#define R_SYNC_SERIAL1_CTRL__frame_driver__BITNR 2
+#define R_SYNC_SERIAL1_CTRL__frame_driver__WIDTH 1
+#define R_SYNC_SERIAL1_CTRL__frame_driver__normal 0
+#define R_SYNC_SERIAL1_CTRL__frame_driver__inverted 1
+#define R_SYNC_SERIAL1_CTRL__status_driver__BITNR 1
+#define R_SYNC_SERIAL1_CTRL__status_driver__WIDTH 1
+#define R_SYNC_SERIAL1_CTRL__status_driver__normal 0
+#define R_SYNC_SERIAL1_CTRL__status_driver__inverted 1
+#define R_SYNC_SERIAL1_CTRL__def_out0__BITNR 0
+#define R_SYNC_SERIAL1_CTRL__def_out0__WIDTH 1
+#define R_SYNC_SERIAL1_CTRL__def_out0__high 1
+#define R_SYNC_SERIAL1_CTRL__def_out0__low 0
+
+#define R_SYNC_SERIAL3_REC_DATA (IO_TYPECAST_RO_UDWORD 0xb000007c)
+#define R_SYNC_SERIAL3_REC_DATA__data_in__BITNR 0
+#define R_SYNC_SERIAL3_REC_DATA__data_in__WIDTH 32
+
+#define R_SYNC_SERIAL3_REC_WORD (IO_TYPECAST_RO_UWORD 0xb000007c)
+#define R_SYNC_SERIAL3_REC_WORD__data_in__BITNR 0
+#define R_SYNC_SERIAL3_REC_WORD__data_in__WIDTH 16
+
+#define R_SYNC_SERIAL3_REC_BYTE (IO_TYPECAST_RO_BYTE 0xb000007c)
+#define R_SYNC_SERIAL3_REC_BYTE__data_in__BITNR 0
+#define R_SYNC_SERIAL3_REC_BYTE__data_in__WIDTH 8
+
+#define R_SYNC_SERIAL3_STATUS (IO_TYPECAST_RO_UDWORD 0xb0000078)
+#define R_SYNC_SERIAL3_STATUS__rec_status__BITNR 15
+#define R_SYNC_SERIAL3_STATUS__rec_status__WIDTH 1
+#define R_SYNC_SERIAL3_STATUS__rec_status__running 0
+#define R_SYNC_SERIAL3_STATUS__rec_status__idle 1
+#define R_SYNC_SERIAL3_STATUS__tr_empty__BITNR 14
+#define R_SYNC_SERIAL3_STATUS__tr_empty__WIDTH 1
+#define R_SYNC_SERIAL3_STATUS__tr_empty__empty 1
+#define R_SYNC_SERIAL3_STATUS__tr_empty__not_empty 0
+#define R_SYNC_SERIAL3_STATUS__tr_ready__BITNR 13
+#define R_SYNC_SERIAL3_STATUS__tr_ready__WIDTH 1
+#define R_SYNC_SERIAL3_STATUS__tr_ready__full 0
+#define R_SYNC_SERIAL3_STATUS__tr_ready__ready 1
+#define R_SYNC_SERIAL3_STATUS__pin_1__BITNR 12
+#define R_SYNC_SERIAL3_STATUS__pin_1__WIDTH 1
+#define R_SYNC_SERIAL3_STATUS__pin_1__low 0
+#define R_SYNC_SERIAL3_STATUS__pin_1__high 1
+#define R_SYNC_SERIAL3_STATUS__pin_0__BITNR 11
+#define R_SYNC_SERIAL3_STATUS__pin_0__WIDTH 1
+#define R_SYNC_SERIAL3_STATUS__pin_0__low 0
+#define R_SYNC_SERIAL3_STATUS__pin_0__high 1
+#define R_SYNC_SERIAL3_STATUS__underflow__BITNR 10
+#define R_SYNC_SERIAL3_STATUS__underflow__WIDTH 1
+#define R_SYNC_SERIAL3_STATUS__underflow__no 0
+#define R_SYNC_SERIAL3_STATUS__underflow__yes 1
+#define R_SYNC_SERIAL3_STATUS__overrun__BITNR 9
+#define R_SYNC_SERIAL3_STATUS__overrun__WIDTH 1
+#define R_SYNC_SERIAL3_STATUS__overrun__no 0
+#define R_SYNC_SERIAL3_STATUS__overrun__yes 1
+#define R_SYNC_SERIAL3_STATUS__data_avail__BITNR 8
+#define R_SYNC_SERIAL3_STATUS__data_avail__WIDTH 1
+#define R_SYNC_SERIAL3_STATUS__data_avail__no 0
+#define R_SYNC_SERIAL3_STATUS__data_avail__yes 1
+#define R_SYNC_SERIAL3_STATUS__data__BITNR 0
+#define R_SYNC_SERIAL3_STATUS__data__WIDTH 8
+
+#define R_SYNC_SERIAL3_TR_DATA (IO_TYPECAST_UDWORD 0xb000007c)
+#define R_SYNC_SERIAL3_TR_DATA__data_out__BITNR 0
+#define R_SYNC_SERIAL3_TR_DATA__data_out__WIDTH 32
+
+#define R_SYNC_SERIAL3_TR_WORD (IO_TYPECAST_UWORD 0xb000007c)
+#define R_SYNC_SERIAL3_TR_WORD__data_out__BITNR 0
+#define R_SYNC_SERIAL3_TR_WORD__data_out__WIDTH 16
+
+#define R_SYNC_SERIAL3_TR_BYTE (IO_TYPECAST_BYTE 0xb000007c)
+#define R_SYNC_SERIAL3_TR_BYTE__data_out__BITNR 0
+#define R_SYNC_SERIAL3_TR_BYTE__data_out__WIDTH 8
+
+#define R_SYNC_SERIAL3_CTRL (IO_TYPECAST_UDWORD 0xb0000078)
+#define R_SYNC_SERIAL3_CTRL__tr_baud__BITNR 28
+#define R_SYNC_SERIAL3_CTRL__tr_baud__WIDTH 4
+#define R_SYNC_SERIAL3_CTRL__tr_baud__c150Hz 0
+#define R_SYNC_SERIAL3_CTRL__tr_baud__c300Hz 1
+#define R_SYNC_SERIAL3_CTRL__tr_baud__c600Hz 2
+#define R_SYNC_SERIAL3_CTRL__tr_baud__c1200Hz 3
+#define R_SYNC_SERIAL3_CTRL__tr_baud__c2400Hz 4
+#define R_SYNC_SERIAL3_CTRL__tr_baud__c4800Hz 5
+#define R_SYNC_SERIAL3_CTRL__tr_baud__c9600Hz 6
+#define R_SYNC_SERIAL3_CTRL__tr_baud__c19k2Hz 7
+#define R_SYNC_SERIAL3_CTRL__tr_baud__c28k8Hz 8
+#define R_SYNC_SERIAL3_CTRL__tr_baud__c57k6Hz 9
+#define R_SYNC_SERIAL3_CTRL__tr_baud__c115k2Hz 10
+#define R_SYNC_SERIAL3_CTRL__tr_baud__c230k4Hz 11
+#define R_SYNC_SERIAL3_CTRL__tr_baud__c460k8Hz 12
+#define R_SYNC_SERIAL3_CTRL__tr_baud__c921k6Hz 13
+#define R_SYNC_SERIAL3_CTRL__tr_baud__c3125kHz 14
+#define R_SYNC_SERIAL3_CTRL__tr_baud__reserved 15
+#define R_SYNC_SERIAL3_CTRL__dma_enable__BITNR 27
+#define R_SYNC_SERIAL3_CTRL__dma_enable__WIDTH 1
+#define R_SYNC_SERIAL3_CTRL__dma_enable__on 1
+#define R_SYNC_SERIAL3_CTRL__dma_enable__off 0
+#define R_SYNC_SERIAL3_CTRL__mode__BITNR 24
+#define R_SYNC_SERIAL3_CTRL__mode__WIDTH 3
+#define R_SYNC_SERIAL3_CTRL__mode__master_output 0
+#define R_SYNC_SERIAL3_CTRL__mode__slave_output 1
+#define R_SYNC_SERIAL3_CTRL__mode__master_input 2
+#define R_SYNC_SERIAL3_CTRL__mode__slave_input 3
+#define R_SYNC_SERIAL3_CTRL__mode__master_bidir 4
+#define R_SYNC_SERIAL3_CTRL__mode__slave_bidir 5
+#define R_SYNC_SERIAL3_CTRL__error__BITNR 23
+#define R_SYNC_SERIAL3_CTRL__error__WIDTH 1
+#define R_SYNC_SERIAL3_CTRL__error__normal 0
+#define R_SYNC_SERIAL3_CTRL__error__ignore 1
+#define R_SYNC_SERIAL3_CTRL__rec_enable__BITNR 22
+#define R_SYNC_SERIAL3_CTRL__rec_enable__WIDTH 1
+#define R_SYNC_SERIAL3_CTRL__rec_enable__disable 0
+#define R_SYNC_SERIAL3_CTRL__rec_enable__enable 1
+#define R_SYNC_SERIAL3_CTRL__f_synctype__BITNR 21
+#define R_SYNC_SERIAL3_CTRL__f_synctype__WIDTH 1
+#define R_SYNC_SERIAL3_CTRL__f_synctype__normal 0
+#define R_SYNC_SERIAL3_CTRL__f_synctype__early 1
+#define R_SYNC_SERIAL3_CTRL__f_syncsize__BITNR 19
+#define R_SYNC_SERIAL3_CTRL__f_syncsize__WIDTH 2
+#define R_SYNC_SERIAL3_CTRL__f_syncsize__bit 0
+#define R_SYNC_SERIAL3_CTRL__f_syncsize__word 1
+#define R_SYNC_SERIAL3_CTRL__f_syncsize__extended 2
+#define R_SYNC_SERIAL3_CTRL__f_syncsize__reserved 3
+#define R_SYNC_SERIAL3_CTRL__f_sync__BITNR 18
+#define R_SYNC_SERIAL3_CTRL__f_sync__WIDTH 1
+#define R_SYNC_SERIAL3_CTRL__f_sync__on 0
+#define R_SYNC_SERIAL3_CTRL__f_sync__off 1
+#define R_SYNC_SERIAL3_CTRL__clk_mode__BITNR 17
+#define R_SYNC_SERIAL3_CTRL__clk_mode__WIDTH 1
+#define R_SYNC_SERIAL3_CTRL__clk_mode__normal 0
+#define R_SYNC_SERIAL3_CTRL__clk_mode__gated 1
+#define R_SYNC_SERIAL3_CTRL__clk_halt__BITNR 16
+#define R_SYNC_SERIAL3_CTRL__clk_halt__WIDTH 1
+#define R_SYNC_SERIAL3_CTRL__clk_halt__running 0
+#define R_SYNC_SERIAL3_CTRL__clk_halt__stopped 1
+#define R_SYNC_SERIAL3_CTRL__bitorder__BITNR 15
+#define R_SYNC_SERIAL3_CTRL__bitorder__WIDTH 1
+#define R_SYNC_SERIAL3_CTRL__bitorder__lsb 0
+#define R_SYNC_SERIAL3_CTRL__bitorder__msb 1
+#define R_SYNC_SERIAL3_CTRL__tr_enable__BITNR 14
+#define R_SYNC_SERIAL3_CTRL__tr_enable__WIDTH 1
+#define R_SYNC_SERIAL3_CTRL__tr_enable__disable 0
+#define R_SYNC_SERIAL3_CTRL__tr_enable__enable 1
+#define R_SYNC_SERIAL3_CTRL__wordsize__BITNR 11
+#define R_SYNC_SERIAL3_CTRL__wordsize__WIDTH 3
+#define R_SYNC_SERIAL3_CTRL__wordsize__size8bit 0
+#define R_SYNC_SERIAL3_CTRL__wordsize__size12bit 1
+#define R_SYNC_SERIAL3_CTRL__wordsize__size16bit 2
+#define R_SYNC_SERIAL3_CTRL__wordsize__size24bit 3
+#define R_SYNC_SERIAL3_CTRL__wordsize__size32bit 4
+#define R_SYNC_SERIAL3_CTRL__buf_empty__BITNR 10
+#define R_SYNC_SERIAL3_CTRL__buf_empty__WIDTH 1
+#define R_SYNC_SERIAL3_CTRL__buf_empty__lmt_8 0
+#define R_SYNC_SERIAL3_CTRL__buf_empty__lmt_0 1
+#define R_SYNC_SERIAL3_CTRL__buf_full__BITNR 9
+#define R_SYNC_SERIAL3_CTRL__buf_full__WIDTH 1
+#define R_SYNC_SERIAL3_CTRL__buf_full__lmt_32 0
+#define R_SYNC_SERIAL3_CTRL__buf_full__lmt_8 1
+#define R_SYNC_SERIAL3_CTRL__flow_ctrl__BITNR 8
+#define R_SYNC_SERIAL3_CTRL__flow_ctrl__WIDTH 1
+#define R_SYNC_SERIAL3_CTRL__flow_ctrl__disabled 0
+#define R_SYNC_SERIAL3_CTRL__flow_ctrl__enabled 1
+#define R_SYNC_SERIAL3_CTRL__clk_polarity__BITNR 6
+#define R_SYNC_SERIAL3_CTRL__clk_polarity__WIDTH 1
+#define R_SYNC_SERIAL3_CTRL__clk_polarity__pos 0
+#define R_SYNC_SERIAL3_CTRL__clk_polarity__neg 1
+#define R_SYNC_SERIAL3_CTRL__frame_polarity__BITNR 5
+#define R_SYNC_SERIAL3_CTRL__frame_polarity__WIDTH 1
+#define R_SYNC_SERIAL3_CTRL__frame_polarity__normal 0
+#define R_SYNC_SERIAL3_CTRL__frame_polarity__inverted 1
+#define R_SYNC_SERIAL3_CTRL__status_polarity__BITNR 4
+#define R_SYNC_SERIAL3_CTRL__status_polarity__WIDTH 1
+#define R_SYNC_SERIAL3_CTRL__status_polarity__normal 0
+#define R_SYNC_SERIAL3_CTRL__status_polarity__inverted 1
+#define R_SYNC_SERIAL3_CTRL__clk_driver__BITNR 3
+#define R_SYNC_SERIAL3_CTRL__clk_driver__WIDTH 1
+#define R_SYNC_SERIAL3_CTRL__clk_driver__normal 0
+#define R_SYNC_SERIAL3_CTRL__clk_driver__inverted 1
+#define R_SYNC_SERIAL3_CTRL__frame_driver__BITNR 2
+#define R_SYNC_SERIAL3_CTRL__frame_driver__WIDTH 1
+#define R_SYNC_SERIAL3_CTRL__frame_driver__normal 0
+#define R_SYNC_SERIAL3_CTRL__frame_driver__inverted 1
+#define R_SYNC_SERIAL3_CTRL__status_driver__BITNR 1
+#define R_SYNC_SERIAL3_CTRL__status_driver__WIDTH 1
+#define R_SYNC_SERIAL3_CTRL__status_driver__normal 0
+#define R_SYNC_SERIAL3_CTRL__status_driver__inverted 1
+#define R_SYNC_SERIAL3_CTRL__def_out0__BITNR 0
+#define R_SYNC_SERIAL3_CTRL__def_out0__WIDTH 1
+#define R_SYNC_SERIAL3_CTRL__def_out0__high 1
+#define R_SYNC_SERIAL3_CTRL__def_out0__low 0
+
--- /dev/null
+/*!**************************************************************************
+*!
+*! MACROS:
+*! IO_MASK(reg,field)
+*! IO_STATE(reg,field,state)
+*! IO_EXTRACT(reg,field,val)
+*! IO_STATE_VALUE(reg,field,state)
+*! IO_BITNR(reg,field)
+*! IO_WIDTH(reg,field)
+*! IO_FIELD(reg,field,val)
+*! IO_RD(reg)
+*! All moderegister addresses and fields of these.
+*!
+*!**************************************************************************/
+
+#ifndef __sv_addr_ag_h__
+#define __sv_addr_ag_h__
+
+
+#define __test_sv_addr__ 0
+
+/*------------------------------------------------------------
+!* General macros to manipulate moderegisters.
+!*-----------------------------------------------------------*/
+
+/* IO_MASK returns a mask for a specified bitfield in a register.
+ Note that this macro doesn't work when field width is 32 bits. */
+#define IO_MASK(reg, field) IO_MASK_ (reg##_, field##_)
+#define IO_MASK_(reg_, field_) \
+ ( ( ( 1 << reg_##_##field_##_WIDTH ) - 1 ) << reg_##_##field_##_BITNR )
+
+/* IO_STATE returns a constant corresponding to a one of the symbolic
+ states that the bitfield can have. (Shifted to correct position) */
+#define IO_STATE(reg, field, state) IO_STATE_ (reg##_, field##_, _##state)
+#define IO_STATE_(reg_, field_, _state) \
+ ( reg_##_##field_##_state << reg_##_##field_##_BITNR )
+
+/* IO_EXTRACT returns the masked and shifted value corresponding to the
+ bitfield can have. */
+#define IO_EXTRACT(reg, field, val) IO_EXTRACT_ (reg##_, field##_, val)
+#define IO_EXTRACT_(reg_, field_, val) ( (( ( ( 1 << reg_##_##field_##_WIDTH ) \
+ - 1 ) << reg_##_##field_##_BITNR ) & (val)) >> reg_##_##field_##_BITNR )
+
+/* IO_STATE_VALUE returns a constant corresponding to a one of the symbolic
+ states that the bitfield can have. (Not shifted) */
+#define IO_STATE_VALUE(reg, field, state) \
+ IO_STATE_VALUE_ (reg##_, field##_, _##state)
+#define IO_STATE_VALUE_(reg_, field_, _state) ( reg_##_##field_##_state )
+
+/* IO_FIELD shifts the val parameter to be aligned with the bitfield
+ specified. */
+#define IO_FIELD(reg, field, val) IO_FIELD_ (reg##_, field##_, val)
+#define IO_FIELD_(reg_, field_, val) ((val) << reg_##_##field_##_BITNR)
+
+/* IO_BITNR returns the starting bitnumber of a bitfield. Bit 0 is
+ LSB and the returned bitnumber is LSB of the field. */
+#define IO_BITNR(reg, field) IO_BITNR_ (reg##_, field##_)
+#define IO_BITNR_(reg_, field_) (reg_##_##field_##_BITNR)
+
+/* IO_WIDTH returns the width, in bits, of a bitfield. */
+#define IO_WIDTH(reg, field) IO_WIDTH_ (reg##_, field##_)
+#define IO_WIDTH_(reg_, field_) (reg_##_##field_##_WIDTH)
+
+/*--- Obsolete. Kept for backw compatibility. ---*/
+/* Reads (or writes) a byte/uword/udword from the specified mode
+ register. */
+#define IO_RD(reg) (*(volatile udword*)(reg))
+#define IO_RD_B(reg) (*(volatile byte*)(reg))
+#define IO_RD_W(reg) (*(volatile uword*)(reg))
+#define IO_RD_D(reg) (*(volatile udword*)(reg))
+
+/*------------------------------------------------------------
+!* Start addresses of the different memory areas.
+!*-----------------------------------------------------------*/
+
+#define MEM_CSE0_START (0x00000000)
+#define MEM_CSE1_START (0x04000000)
+#define MEM_CSR0_START (0x08000000)
+#define MEM_CSR1_START (0x0c000000)
+#define MEM_CSP0_START (0x10000000)
+#define MEM_CSP1_START (0x14000000)
+#define MEM_CSP2_START (0x18000000)
+#define MEM_CSP3_START (0x1c000000)
+#define MEM_CSP4_START (0x20000000)
+#define MEM_CSP5_START (0x24000000)
+#define MEM_CSP6_START (0x28000000)
+#define MEM_CSP7_START (0x2c000000)
+#define MEM_DRAM_START (0x40000000)
+
+#define MEM_NON_CACHEABLE (0x80000000)
+
+/*------------------------------------------------------------
+!* Type casts used in mode register macros, making pointer
+!* dereferencing possible. Empty in assembler.
+!*-----------------------------------------------------------*/
+
+#ifndef __ASSEMBLER__
+# define IO_TYPECAST_UDWORD (volatile udword*)
+# define IO_TYPECAST_RO_UDWORD (const volatile udword*)
+# define IO_TYPECAST_UWORD (volatile uword*)
+# define IO_TYPECAST_RO_UWORD (const volatile uword*)
+# define IO_TYPECAST_BYTE (volatile byte*)
+# define IO_TYPECAST_RO_BYTE (const volatile byte*)
+#else
+# define IO_TYPECAST_UDWORD
+# define IO_TYPECAST_RO_UDWORD
+# define IO_TYPECAST_UWORD
+# define IO_TYPECAST_RO_UWORD
+# define IO_TYPECAST_BYTE
+# define IO_TYPECAST_RO_BYTE
+#endif
+
+/*------------------------------------------------------------*/
+
+#include "sv_addr.agh"
+
+#if __test_sv_addr__
+/* IO_MASK( R_BUS_CONFIG , CE ) */
+IO_MASK( R_WAITSTATES , SRAM_WS )
+IO_MASK( R_TEST , W32 )
+
+IO_STATE( R_BUS_CONFIG, CE, DISABLE )
+IO_STATE( R_BUS_CONFIG, CE, ENABLE )
+
+IO_STATE( R_DRAM_TIMING, REF, IVAL2 )
+
+IO_MASK( R_DRAM_TIMING, REF )
+
+IO_MASK( R_EXT_DMA_0_STAT, TFR_COUNT ) >> IO_BITNR( R_EXT_DMA_0_STAT, TFR_COUNT )
+
+IO_RD(R_EXT_DMA_0_STAT) & IO_MASK( R_EXT_DMA_0_STAT, S )
+ == IO_STATE( R_EXT_DMA_0_STAT, S, STARTED )
+#endif
+
+
+#endif /* ifndef __sv_addr_ag_h__ */
+
--- /dev/null
+OBJS=e100boot.1 e100boot.html
+
+all: $(OBJS)
+
+%.1: %.pod
+ pod2man $< > $@
+
+%.html: %.pod
+ pod2html $< > $@
+ @rm -f pod2htmd.x~~ pod2htmi.x~~
+
+clean:
+ rm -f *cache *~
+
+# The 'clean' doesn't remove the generated documentation as we want
+# them in the distribution.
+
--- /dev/null
+.\" Automatically generated by Pod::Man v1.37, Pod::Parser v1.32
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings. \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote. \*(C+ will
+.\" give a nicer C++. Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available. \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+. ds -- \(*W-
+. ds PI pi
+. if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+. if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
+. ds L" ""
+. ds R" ""
+. ds C` ""
+. ds C' ""
+'br\}
+.el\{\
+. ds -- \|\(em\|
+. ds PI \(*p
+. ds L" ``
+. ds R" ''
+'br\}
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD. Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.if \nF \{\
+. de IX
+. tm Index:\\$1\t\\n%\t"\\$2"
+..
+. nr % 0
+. rr F
+.\}
+.\"
+.\" For nroff, turn off justification. Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.hy 0
+.if n .na
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear. Run. Save yourself. No user-serviceable parts.
+. \" fudge factors for nroff and troff
+.if n \{\
+. ds #H 0
+. ds #V .8m
+. ds #F .3m
+. ds #[ \f1
+. ds #] \fP
+.\}
+.if t \{\
+. ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+. ds #V .6m
+. ds #F 0
+. ds #[ \&
+. ds #] \&
+.\}
+. \" simple accents for nroff and troff
+.if n \{\
+. ds ' \&
+. ds ` \&
+. ds ^ \&
+. ds , \&
+. ds ~ ~
+. ds /
+.\}
+.if t \{\
+. ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+. ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+. ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+. ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+. ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+. ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+. \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+. \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+. \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+. ds : e
+. ds 8 ss
+. ds o a
+. ds d- d\h'-1'\(ga
+. ds D- D\h'-1'\(hy
+. ds th \o'bp'
+. ds Th \o'LP'
+. ds ae ae
+. ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "E100BOOT 1"
+.TH E100BOOT 1 "2003-12-16" "perl v5.8.8" "User Contributed Perl Documentation"
+.SH "NAME"
+e100boot \- Network and serial port bootloader for the ETRAX100 CPU.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+\&\fBe100boot\fR [\fB\-\-device\fR \fIdevicename\fR]
+[\fB\-\-file\fR \fIfilename\fR|\- \fIaddr\fR [\fIsize\fR]]
+[\fB\-\-flash\fR \fIram-source\fR \fIflash-offset\fR \fIsize\fR] [\fB\-\-pause\fR \fIiter\fR]
+[\fB\-\-memtest\fR \fIaddr\fR \fIaddr\fR] [\fB\-\-memclear\fR \fIaddr\fR \fIaddr\fR]
+[\fB\-\-memdump\fR \fIaddr\fR \fIaddr\fR] [\fB\-\-setreg\fR \fIaddr\fR|\fIregname\fR \fIval\fR]
+[\fB\-\-getreg\fR \fIaddr\fR|\fIregname\fR] [\fB\-\-verify\fR \fIaddr\fR \fIval\fR]
+[\fB\-\-label\fR \fIlabel\fR] [\fB\-\-loop\fR \fIaddr\fR \fIlabel\fR] [\fB\-\-5400\fR] [\fB\-\-5600\fR]
+[\fB\-\-testcard\fR] [\fB\-\-devboard\fR] [\fB\-\-testcardlx\fR] [\fB\-\-network\fR] [\fB\-\-serial\fR]
+[\fB\-\-baudrate\fR \fIbaudrate\fR] [\fB\-\-bootfile\fR \fIfile\fR] [\fB\-\-jump\fR \fIaddr\fR]
+[\fB\-\-tofiles\fR] [\fB\-\-cmdsonly\fR] [\fB\-\-images\fR] [\fB\-\-noleds\fR] [\fB\-\-help\fR]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+This boot loader facilitates loading of files over the network or a
+serial port to an \s-1ETRAX100\s0. It can also be used for fairly extensive
+hardware debugging as you can read and write to any memory addresses,
+including the \s-1ETRAX100\s0 registers. You can also perform memory checks
+and dumps and copy data to flash memories.
+.PP
+The first packet (or the first 784 bytes in the case of serial boot)
+sent to Etrax100 is loaded into the cache. The code in this packet is
+executed and loads the rest of the boot loader into the cache. The
+cache is the only thing we can be sure of exists on all \s-1ETRAX100\s0
+products, so the boot loader is limited to the size of the cache,
+8KB. If further boot loading code is needed you have to set up
+external memory and load another boot loader into it, but this is
+rarely needed.
+.PP
+Two programs are involved in this boot loading, one is the program on
+your workstation that sends the packets to \s-1ETRAX100\s0, this is called
+the server boot loader or \s-1SBL\s0. The other program is the one in
+\&\s-1ETRAX100\s0 that receives packets from the \s-1SBL\s0 and acts upon the data
+therein, this is called the client boot loader or \s-1CBL\s0.
+.PP
+We don't want to edit and recompile the \s-1CBL\s0 each time we want to load
+level two to different parts of memory, like we do on different
+products. We also want to change things like the setup of external
+memory before we load data into it. To make the boot loading as
+flexible as possible and separate the \s-1CBL\s0 from level two we send a
+configuration packet to it. After this packet we load other files, if
+we want to.
+.PP
+The configuration packet can contain information to the \s-1CBL\s0 which lets
+you: initialize external memory, read and write to all \s-1ETRAX100\s0
+registers, read and write to any part of memory, load as many other
+files as you like to any part of memory you like, etc. The
+configuration packet is generated on the fly by the \s-1SBL\s0.
+.PP
+Since the \s-1CBL\s0 is unaware of which product it will be loaded on, it
+doesn't do product specific initialization like setting up the
+memory. This must be done with the configuration packet.
+.Sh "Debugging printout"
+.IX Subsection "Debugging printout"
+When doing network boot the debugging printout from the \s-1CBL\s0 in \s-1ETRAX\s0
+is transmitted back over the network and printed by e100boot. When
+doing serial boot that interface will be used. So in either case you
+will not need any other software or hardware to receive the debugging
+printout.
+.Sh "Creating binaries"
+.IX Subsection "Creating binaries"
+The files containing code to be loaded on the \s-1ETRAX100\s0 must be
+stripped using the standard \s-1GCC\s0 binutils.
+.Sh "How it works, things you don't want to know."
+.IX Subsection "How it works, things you don't want to know."
+ack, timeout bla, bla... \s-1RTFS\s0.
+.Sh "Compilation and code"
+.IX Subsection "Compilation and code"
+Noteworthy is that two separate \s-1ETRAX100\s0 binaries are created, one for
+network boot and one for serial boot. They actually contain exactly
+the same code, but linked in different order. This is because the code
+to load the rest of the bootloader over a specific interface must be
+contained in the first data sent to the \s-1ETRAX100\s0 and it is too
+difficult to cram the code for both interfaces in the beginning of the
+same binary. Hence two files.
+.PP
+Other stuff you don't want to know is that the cache is mapped from
+0x380000f0 to 0x380020f0. Code starts at the first address followed by
+data up to the symbol \fIEbss\fR. At the other end is the buffer for boot
+commands (addresses defined by \fI\s-1IO_BUF_START\s0\fR and \fI\s-1IO_BUF_END\s0\fR below
+which the stack lies and hopefully the stack and \fIEbss\fR will never
+meet...
+.PP
+The serial data is loaded from 0x380000f0 to 0x380003ff before
+execution starts.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The options are done in the order specified on the command line, so
+you probably want to do any memory setup before loading a file to the
+memory, and you probably do not want to perform a memory test after
+you have loaded a file to that memory.
+.PP
+All addresses and sizes must be in hex with optional '0x' prefix, or a
+\&\s-1ETRAX100\s0 register name. Since the \fB\-\-setreg\fR and \fB\-\-getreg\fR options
+only can be performed on dword aligned dwords only the registers that
+conform to this can be named.
+.PP
+Note also that all addresses must be in uncached memory (bit 31 set),
+as the bootloader lies in the cache. If you access any uncached
+address during boot, the bootloader will be destroyed without warning.
+.PP
+It is also possible to specify an address as \fI+address\fR, in which
+case it is considered to be relative to \fI\s-1IO_BUF_START\s0\fR. This is
+especially useful in combination with the \fB\-\-loop\fR option below.
+.IP "\fB\-\-baudrate\fR \fIbaudrate\fR" 4
+.IX Item "--baudrate baudrate"
+Set baudrate for files loaded after the boot loader.
+.IP "\fB\-\-bootfile\fR \fIfilename\fR" 4
+.IX Item "--bootfile filename"
+Which boot image to send to \s-1ETRAX\s0 instead of the default ones.
+.IP "\fB\-\-cmdsonly\fR" 4
+.IX Item "--cmdsonly"
+Write the commands to file e100boot.cmds.
+.IP "\fB\-\-devboard\fR" 4
+.IX Item "--devboard"
+Sets registers for the developer board.
+.IP "\fB\-\-device\fR \fIdevicename\fR" 4
+.IX Item "--device devicename"
+Which device to send packets on. For network boot the default is
+eth0. For serial boot it is ttyS0.
+.IP "\fB\-\-file\fR \fIfilename\fR|\- \fIaddress\fR [\fIsize\fR]" 4
+.IX Item "--file filename|- address [size]"
+The file to load and the address to load it to. If file is loaded on
+stdin, specify filename '\-' followed by a size. Size need only be
+given in this case. You can load as many files as you want, each
+specified with a \fB\-\-file\fR.
+.IP "\fB\-\-flash\fR \fIram-source flash-offset size\fR" 4
+.IX Item "--flash ram-source flash-offset size"
+Copies the specified \s-1RAM\s0 area to the flash.
+.IP "\fB\-\-getreg\fR \fIaddress\fR|\fIregname\fR" 4
+.IX Item "--getreg address|regname"
+Print value of memory location. Must be uncached address.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Print the help information.
+.IP "\fB\-\-images\fR" 4
+.IX Item "--images"
+Print information about the internal boot images, then exit.
+.IP "\fB\-\-jump\fR \fIaddress\fR" 4
+.IX Item "--jump address"
+Jump to specified address.
+.IP "\fB\-\-label\fR \fIlabel\fR" 4
+.IX Item "--label label"
+Define a label to be used as target by the \fB\-\-loop\fR command. This
+command is only used by the \s-1SBL\s0 to calculate the address for the
+\&\fB\-\-loop\fR and does not take up any space in the configuration packet.
+.IP "\fB\-\-loop\fR \fIcheck-address label\fR" 4
+.IX Item "--loop check-address label"
+If the contents of check-address is nonzero it is decremented and the
+command parser continues parsing at the label.
+.Sp
+If no external memory is initialized yet it can be convenient to use
+an address in the area occupied by the configuration packet. Run
+e100boot with \fB\-\-help\fR to see which addresses the commands are stored
+at. The size of the commands are four bytes for each command plus four
+bytes per argument to the command.
+.IP "\fB\-\-memclear\fR \fIstart-address end-address\fR" 4
+.IX Item "--memclear start-address end-address"
+Clears the specified memory area.
+.IP "\fB\-\-memdump\fR \fIstart-address end-address\fR" 4
+.IX Item "--memdump start-address end-address"
+Prints the contents of the specified memory area.
+.IP "\fB\-\-memtest\fR \fIstart-address end-address\fR" 4
+.IX Item "--memtest start-address end-address"
+Does a fairly extensive test of the specified memory area. Not only
+catches defect memories but also catches things like wrong memory
+setups where memory addresses are mirrored onto each other.
+.IP "\fB\-\-network\fR" 4
+.IX Item "--network"
+Perform a network boot.
+.IP "\fB\-\-noleds\fR" 4
+.IX Item "--noleds"
+When using the internal images use a version that does not toggle
+general port \s-1PA\s0 or \s-1PB\s0 in \s-1ETRAX\s0 during the boot procedure.
+.IP "\fB\-\-pause\fR \fIiterations\fR" 4
+.IX Item "--pause iterations"
+How many \fIiterations\fR to do of an empty loop.
+.IP "\fB\-\-serial\fR" 4
+.IX Item "--serial"
+Do a serial boot.
+.IP "\fB\-\-setreg\fR \fIaddress\fR|\fIregname\fR \fIvalue\fR" 4
+.IX Item "--setreg address|regname value"
+Load dword to dword aligned memory location.
+.IP "\fB\-\-testcard\fR" 4
+.IX Item "--testcard"
+Configures the memories for the \s-1ETRAX\s0 100 testcard.
+.IP "\fB\-\-testcardlx\fR" 4
+.IX Item "--testcardlx"
+Configures the memories for the \s-1ETRAX100\s0 \s-1LX\s0 testcard.
+.IP "\fB\-\-tofiles\fR" 4
+.IX Item "--tofiles"
+Write packets to files e100boot.seq[0..]. Does not transmit the data.
+.IP "\fB\-\-verify\fR \fIaddress value\fR" 4
+.IX Item "--verify address value"
+Verify that memory contains dword. If not loader will stop. This is to
+avoid booting the wrong unit. If you have the units ethernet address
+in the flash memory you can check for that.
+.IP "\fB\-\-5400\fR" 4
+.IX Item "--5400"
+Sets R_WAITSTATES, R_DRAM_TIMING and R_DRAM_CONFIG for the 5400
+printserver.
+.IP "\fB\-\-5600\fR" 4
+.IX Item "--5600"
+Sets R_WAITSTATES, R_DRAM_TIMING and R_DRAM_CONFIG for the 5600
+printserver.
+.SH "EXAMPLES"
+.IX Header "EXAMPLES"
+If you have a stripped binary (file.ima) linked to 0x08000000 that you want
+to boot via the network, do this:
+.PP
+\&\fBe100boot \-\-file file.ima 88000000 \-\-jump 08000000\fR
+.PP
+Or something like this. Sets waitstates to zero and loads two files,
+the first from stdin:
+.PP
+\&\fBcat file.ima | e100boot \-\-memtest 88000000 8801ffff \-\-memclear
+88000000 8801ffff \-\-setreg b0000000 0 \-\-getreg b0000000 \-\-file \-
+88000000 a000 \-\-file file2.ima 88010000 \-\-memdump 88000000 880000ff
+\&\-\-jump 08000000\fR
+.PP
+Or this, enables 16 bit parallel port and flashes the led on \s-1PA0:\s0
+.PP
+\&\fBe100boot \-\-testcardlx \-\-setreg R_PORT_PA_SET 0x00000000 \-\-setreg
+R_GEN_CONFIG 0x80000004 \-\-setreg R_PAR0_CONFIG 0x00000200 \-\-setreg
+R_PORT_G_DATA 0x00000000 \-\-pause 0x02000000 \-\-setreg R_PORT_G_DATA
+0xffffffff \-\-pause 0x02000000 \-\-setreg R_PORT_G_DATA 0x00000000 \-\-loop
+0x38001e0b 0x38001e60\fR
+.PP
+Setup the memory, test the \s-1SRAM\s0, print the contents of the first 256
+bytes of \s-1SRAM\s0, clear \s-1SRAM\s0, test the \s-1DRAM\s0, print R_DMA_CH0_CMD, load a
+file to \s-1SRAM\s0, load another file to \s-1SRAM\s0, load file to \s-1DRAM\s0, jump to
+code in \s-1SRAM\s0.
+.PP
+\&\fBe100boot \-\-setreg b0000000 1000 \-\-setreg b0000008 00006543 \-\-setreg
+b000000c 12966060 \-\-memtest 88000000 80000 \-\-memdump 88000000 880000ff
+\&\-\-memclear 88000000 80000 \-\-memtest c0000000 400000 \-\-getreg b00001d0
+\&\-\-file file1.ima 88000000 \-\-file file2.ima 88010000 \-\-file file3.ima
+c0000000 \-\-jump 88000000\fR
+.PP
+Boot Linux on the testcard.
+.PP
+\&\fBe100boot \-\-setreg b0000000 1000 \-\-setreg b0000008 6557 \-\-setreg
+b000000c 1b988080 \-\-file timage c0000500 \-\-jump 40000500\fR
+.PP
+Booting over serial port and using labels to flash the leds on port
+\&\s-1PA\s0.
+.PP
+\&\fBe100boot \-\-serial \-\-device /dev/ttyS1 \-\-baudrate 9600 \-\-label first
+\&\-\-setreg 0x380020e0 00000001 \-\-setreg R_PORT_PA_SET 0x0000ff00 \-\-pause
+0x02000000 \-\-setreg R_PORT_PA_SET 0x0000ffff \-\-pause 0x02000000 \-\-loop
+0x380020e0 first\fR
+.SH "BUGS"
+.IX Header "BUGS"
+You're kidding, right? Check \s-1AUTHOR\s0 below. The only thing
+would be the hubris of the author, but that I consider a feature. If
+you find any other 'features' report them to
+technology@axis.com. Don't bother the author directly, he is busy
+playing PlayStation2.
+.SH "COPYING"
+.IX Header "COPYING"
+Copyright © 1996\-2002 Axis Communications \s-1AB\s0.
+.SH "AUTHOR"
+.IX Header "AUTHOR"
+Written by Ronny Ranerup.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+The fine source, which you can get at http://developer.axis.com.
--- /dev/null
+<?xml version="1.0" ?>
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<title>e100boot - Network and serial port bootloader for the ETRAX100 CPU.</title>
+<meta http-equiv="content-type" content="text/html; charset=utf-8" />
+<link rev="made" href="mailto:root@localhost" />
+</head>
+
+<body style="background-color: white">
+
+<p><a name="__index__"></a></p>
+<!-- INDEX BEGIN -->
+
+<ul>
+
+ <li><a href="#name">NAME</a></li>
+ <li><a href="#synopsis">SYNOPSIS</a></li>
+ <li><a href="#description">DESCRIPTION</a></li>
+ <ul>
+
+ <li><a href="#debugging_printout">Debugging printout</a></li>
+ <li><a href="#creating_binaries">Creating binaries</a></li>
+ <li><a href="#how_it_works__things_you_don_t_want_to_know_">How it works, things you don't want to know.</a></li>
+ <li><a href="#compilation_and_code">Compilation and code</a></li>
+ </ul>
+
+ <li><a href="#options">OPTIONS</a></li>
+ <li><a href="#examples">EXAMPLES</a></li>
+ <li><a href="#bugs">BUGS</a></li>
+ <li><a href="#copying">COPYING</a></li>
+ <li><a href="#author">AUTHOR</a></li>
+ <li><a href="#see_also">SEE ALSO</a></li>
+</ul>
+<!-- INDEX END -->
+
+<hr />
+<p>
+</p>
+<h1><a name="name">NAME</a></h1>
+<p>e100boot - Network and serial port bootloader for the ETRAX100 CPU.</p>
+<p>
+</p>
+<hr />
+<h1><a name="synopsis">SYNOPSIS</a></h1>
+<p><strong>e100boot</strong> [<strong>--device</strong> <em>devicename</em>]
+[<strong>--file</strong> <em>filename</em>|- <em>addr</em> [<em>size</em>]]
+[<strong>--flash</strong> <em>ram-source</em> <em>flash-offset</em> <em>size</em>] [<strong>--pause</strong> <em>iter</em>]
+[<strong>--memtest</strong> <em>addr</em> <em>addr</em>] [<strong>--memclear</strong> <em>addr</em> <em>addr</em>]
+[<strong>--memdump</strong> <em>addr</em> <em>addr</em>] [<strong>--setreg</strong> <em>addr</em>|<em>regname</em> <em>val</em>]
+[<strong>--getreg</strong> <em>addr</em>|<em>regname</em>] [<strong>--verify</strong> <em>addr</em> <em>val</em>]
+[<strong>--label</strong> <em>label</em>] [<strong>--loop</strong> <em>addr</em> <em>label</em>] [<strong>--5400</strong>] [<strong>--5600</strong>]
+[<strong>--testcard</strong>] [<strong>--devboard</strong>] [<strong>--testcardlx</strong>] [<strong>--network</strong>] [<strong>--serial</strong>]
+[<strong>--baudrate</strong> <em>baudrate</em>] [<strong>--bootfile</strong> <em>file</em>] [<strong>--jump</strong> <em>addr</em>]
+[<strong>--tofiles</strong>] [<strong>--cmdsonly</strong>] [<strong>--images</strong>] [<strong>--noleds</strong>] [<strong>--help</strong>]</p>
+<p>
+</p>
+<hr />
+<h1><a name="description">DESCRIPTION</a></h1>
+<p>This boot loader facilitates loading of files over the network or a
+serial port to an ETRAX100. It can also be used for fairly extensive
+hardware debugging as you can read and write to any memory addresses,
+including the ETRAX100 registers. You can also perform memory checks
+and dumps and copy data to flash memories.</p>
+<p>The first packet (or the first 784 bytes in the case of serial boot)
+sent to Etrax100 is loaded into the cache. The code in this packet is
+executed and loads the rest of the boot loader into the cache. The
+cache is the only thing we can be sure of exists on all ETRAX100
+products, so the boot loader is limited to the size of the cache,
+8KB. If further boot loading code is needed you have to set up
+external memory and load another boot loader into it, but this is
+rarely needed.</p>
+<p>Two programs are involved in this boot loading, one is the program on
+your workstation that sends the packets to ETRAX100, this is called
+the server boot loader or SBL. The other program is the one in
+ETRAX100 that receives packets from the SBL and acts upon the data
+therein, this is called the client boot loader or CBL.</p>
+<p>We don't want to edit and recompile the CBL each time we want to load
+level two to different parts of memory, like we do on different
+products. We also want to change things like the setup of external
+memory before we load data into it. To make the boot loading as
+flexible as possible and separate the CBL from level two we send a
+configuration packet to it. After this packet we load other files, if
+we want to.</p>
+<p>The configuration packet can contain information to the CBL which lets
+you: initialize external memory, read and write to all ETRAX100
+registers, read and write to any part of memory, load as many other
+files as you like to any part of memory you like, etc. The
+configuration packet is generated on the fly by the SBL.</p>
+<p>Since the CBL is unaware of which product it will be loaded on, it
+doesn't do product specific initialization like setting up the
+memory. This must be done with the configuration packet.</p>
+<p>
+</p>
+<h2><a name="debugging_printout">Debugging printout</a></h2>
+<p>When doing network boot the debugging printout from the CBL in ETRAX
+is transmitted back over the network and printed by e100boot. When
+doing serial boot that interface will be used. So in either case you
+will not need any other software or hardware to receive the debugging
+printout.</p>
+<p>
+</p>
+<h2><a name="creating_binaries">Creating binaries</a></h2>
+<p>The files containing code to be loaded on the ETRAX100 must be
+stripped using the standard GCC binutils.</p>
+<p>
+</p>
+<h2><a name="how_it_works__things_you_don_t_want_to_know_">How it works, things you don't want to know.</a></h2>
+<p>ack, timeout bla, bla... RTFS.</p>
+<p>
+</p>
+<h2><a name="compilation_and_code">Compilation and code</a></h2>
+<p>Noteworthy is that two separate ETRAX100 binaries are created, one for
+network boot and one for serial boot. They actually contain exactly
+the same code, but linked in different order. This is because the code
+to load the rest of the bootloader over a specific interface must be
+contained in the first data sent to the ETRAX100 and it is too
+difficult to cram the code for both interfaces in the beginning of the
+same binary. Hence two files.</p>
+<p>Other stuff you don't want to know is that the cache is mapped from
+0x380000f0 to 0x380020f0. Code starts at the first address followed by
+data up to the symbol <em>Ebss</em>. At the other end is the buffer for boot
+commands (addresses defined by <em>IO_BUF_START</em> and <em>IO_BUF_END</em> below
+which the stack lies and hopefully the stack and <em>Ebss</em> will never
+meet...</p>
+<p>The serial data is loaded from 0x380000f0 to 0x380003ff before
+execution starts.</p>
+<p>
+</p>
+<hr />
+<h1><a name="options">OPTIONS</a></h1>
+<p>The options are done in the order specified on the command line, so
+you probably want to do any memory setup before loading a file to the
+memory, and you probably do not want to perform a memory test after
+you have loaded a file to that memory.</p>
+<p>All addresses and sizes must be in hex with optional '0x' prefix, or a
+ETRAX100 register name. Since the <strong>--setreg</strong> and <strong>--getreg</strong> options
+only can be performed on dword aligned dwords only the registers that
+conform to this can be named.</p>
+<p>Note also that all addresses must be in uncached memory (bit 31 set),
+as the bootloader lies in the cache. If you access any uncached
+address during boot, the bootloader will be destroyed without warning.</p>
+<p>It is also possible to specify an address as <em>+address</em>, in which
+case it is considered to be relative to <em>IO_BUF_START</em>. This is
+especially useful in combination with the <strong>--loop</strong> option below.</p>
+<dl>
+<dt><strong><a name="item__2d_2dbaudrate_baudrate"><strong>--baudrate</strong> <em>baudrate</em></a></strong>
+
+<dd>
+<p>Set baudrate for files loaded after the boot loader.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2dbootfile_filename"><strong>--bootfile</strong> <em>filename</em></a></strong>
+
+<dd>
+<p>Which boot image to send to ETRAX instead of the default ones.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2dcmdsonly"><strong>--cmdsonly</strong></a></strong>
+
+<dd>
+<p>Write the commands to file e100boot.cmds.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2ddevboard"><strong>--devboard</strong></a></strong>
+
+<dd>
+<p>Sets registers for the developer board.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2ddevice_devicename"><strong>--device</strong> <em>devicename</em></a></strong>
+
+<dd>
+<p>Which device to send packets on. For network boot the default is
+eth0. For serial boot it is ttyS0.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2dfile_filename_7c_2d_address__5bsize_5d"><strong>--file</strong> <em>filename</em>|- <em>address</em> [<em>size</em>]</a></strong>
+
+<dd>
+<p>The file to load and the address to load it to. If file is loaded on
+stdin, specify filename '-' followed by a size. Size need only be
+given in this case. You can load as many files as you want, each
+specified with a <strong>--file</strong>.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2dflash_ram_2dsource_flash_2doffset_size"><strong>--flash</strong> <em>ram-source flash-offset size</em></a></strong>
+
+<dd>
+<p>Copies the specified RAM area to the flash.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2dgetreg_address_7cregname"><strong>--getreg</strong> <em>address</em>|<em>regname</em></a></strong>
+
+<dd>
+<p>Print value of memory location. Must be uncached address.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2dhelp"><strong>--help</strong></a></strong>
+
+<dd>
+<p>Print the help information.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2dimages"><strong>--images</strong></a></strong>
+
+<dd>
+<p>Print information about the internal boot images, then exit.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2djump_address"><strong>--jump</strong> <em>address</em></a></strong>
+
+<dd>
+<p>Jump to specified address.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2dlabel_label"><strong>--label</strong> <em>label</em></a></strong>
+
+<dd>
+<p>Define a label to be used as target by the <strong>--loop</strong> command. This
+command is only used by the SBL to calculate the address for the
+<strong>--loop</strong> and does not take up any space in the configuration packet.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2dloop_check_2daddress_label"><strong>--loop</strong> <em>check-address label</em></a></strong>
+
+<dd>
+<p>If the contents of check-address is nonzero it is decremented and the
+command parser continues parsing at the label.</p>
+</dd>
+<dd>
+<p>If no external memory is initialized yet it can be convenient to use
+an address in the area occupied by the configuration packet. Run
+e100boot with <strong>--help</strong> to see which addresses the commands are stored
+at. The size of the commands are four bytes for each command plus four
+bytes per argument to the command.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2dmemclear_start_2daddress_end_2daddress"><strong>--memclear</strong> <em>start-address end-address</em></a></strong>
+
+<dd>
+<p>Clears the specified memory area.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2dmemdump_start_2daddress_end_2daddress"><strong>--memdump</strong> <em>start-address end-address</em></a></strong>
+
+<dd>
+<p>Prints the contents of the specified memory area.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2dmemtest_start_2daddress_end_2daddress"><strong>--memtest</strong> <em>start-address end-address</em></a></strong>
+
+<dd>
+<p>Does a fairly extensive test of the specified memory area. Not only
+catches defect memories but also catches things like wrong memory
+setups where memory addresses are mirrored onto each other.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2dnetwork"><strong>--network</strong></a></strong>
+
+<dd>
+<p>Perform a network boot.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2dnoleds"><strong>--noleds</strong></a></strong>
+
+<dd>
+<p>When using the internal images use a version that does not toggle
+general port PA or PB in ETRAX during the boot procedure.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2dpause_iterations"><strong>--pause</strong> <em>iterations</em></a></strong>
+
+<dd>
+<p>How many <em>iterations</em> to do of an empty loop.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2dserial"><strong>--serial</strong></a></strong>
+
+<dd>
+<p>Do a serial boot.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2dsetreg_address_7cregname_value"><strong>--setreg</strong> <em>address</em>|<em>regname</em> <em>value</em></a></strong>
+
+<dd>
+<p>Load dword to dword aligned memory location.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2dtestcard"><strong>--testcard</strong></a></strong>
+
+<dd>
+<p>Configures the memories for the ETRAX 100 testcard.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2dtestcardlx"><strong>--testcardlx</strong></a></strong>
+
+<dd>
+<p>Configures the memories for the ETRAX100 LX testcard.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2dtofiles"><strong>--tofiles</strong></a></strong>
+
+<dd>
+<p>Write packets to files e100boot.seq[0..]. Does not transmit the data.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2dverify_address_value"><strong>--verify</strong> <em>address value</em></a></strong>
+
+<dd>
+<p>Verify that memory contains dword. If not loader will stop. This is to
+avoid booting the wrong unit. If you have the units ethernet address
+in the flash memory you can check for that.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2d5400"><strong>--5400</strong></a></strong>
+
+<dd>
+<p>Sets R_WAITSTATES, R_DRAM_TIMING and R_DRAM_CONFIG for the 5400
+printserver.</p>
+</dd>
+</li>
+<dt><strong><a name="item__2d_2d5600"><strong>--5600</strong></a></strong>
+
+<dd>
+<p>Sets R_WAITSTATES, R_DRAM_TIMING and R_DRAM_CONFIG for the 5600
+printserver.</p>
+</dd>
+</li>
+</dl>
+<p>
+</p>
+<hr />
+<h1><a name="examples">EXAMPLES</a></h1>
+<p>If you have a stripped binary (file.ima) linked to 0x08000000 that you want
+to boot via the network, do this:</p>
+<p><strong>e100boot --file file.ima 88000000 --jump 08000000</strong></p>
+<p>Or something like this. Sets waitstates to zero and loads two files,
+the first from stdin:</p>
+<p><strong>cat file.ima | e100boot --memtest 88000000 8801ffff --memclear
+88000000 8801ffff --setreg b0000000 0 --getreg b0000000 --file -
+88000000 a000 --file file2.ima 88010000 --memdump 88000000 880000ff
+--jump 08000000</strong></p>
+<p>Or this, enables 16 bit parallel port and flashes the led on PA0:</p>
+<p><strong>e100boot --testcardlx --setreg R_PORT_PA_SET 0x00000000 --setreg
+R_GEN_CONFIG 0x80000004 --setreg R_PAR0_CONFIG 0x00000200 --setreg
+R_PORT_G_DATA 0x00000000 --pause 0x02000000 --setreg R_PORT_G_DATA
+0xffffffff --pause 0x02000000 --setreg R_PORT_G_DATA 0x00000000 --loop
+0x38001e0b 0x38001e60</strong></p>
+<p>Setup the memory, test the SRAM, print the contents of the first 256
+bytes of SRAM, clear SRAM, test the DRAM, print R_DMA_CH0_CMD, load a
+file to SRAM, load another file to SRAM, load file to DRAM, jump to
+code in SRAM.</p>
+<p><strong>e100boot --setreg b0000000 1000 --setreg b0000008 00006543 --setreg
+b000000c 12966060 --memtest 88000000 80000 --memdump 88000000 880000ff
+--memclear 88000000 80000 --memtest c0000000 400000 --getreg b00001d0
+--file file1.ima 88000000 --file file2.ima 88010000 --file file3.ima
+c0000000 --jump 88000000</strong></p>
+<p>Boot Linux on the testcard.</p>
+<p><strong>e100boot --setreg b0000000 1000 --setreg b0000008 6557 --setreg
+b000000c 1b988080 --file timage c0000500 --jump 40000500</strong></p>
+<p>Booting over serial port and using labels to flash the leds on port
+PA.</p>
+<p><strong>e100boot --serial --device /dev/ttyS1 --baudrate 9600 --label first
+--setreg 0x380020e0 00000001 --setreg R_PORT_PA_SET 0x0000ff00 --pause
+0x02000000 --setreg R_PORT_PA_SET 0x0000ffff --pause 0x02000000 --loop
+0x380020e0 first</strong></p>
+<p>
+</p>
+<hr />
+<h1><a name="bugs">BUGS</a></h1>
+<p>You're kidding, right? Check <a href="#author">AUTHOR</a> below. The only thing
+would be the hubris of the author, but that I consider a feature. If
+you find any other 'features' report them to
+<a href="mailto:technology@axis.com.">technology@axis.com.</a> Don't bother the author directly, he is busy
+playing PlayStation2.</p>
+<p>
+</p>
+<hr />
+<h1><a name="copying">COPYING</a></h1>
+<p>Copyright © 1996-2002 Axis Communications AB.</p>
+<p>
+</p>
+<hr />
+<h1><a name="author">AUTHOR</a></h1>
+<p>Written by Ronny Ranerup.</p>
+<p>
+</p>
+<hr />
+<h1><a name="see_also">SEE ALSO</a></h1>
+<p>The fine source, which you can get at <a href="http://developer.axis.com.">http://developer.axis.com.</a></p>
+
+</body>
+
+</html>
--- /dev/null
+=head1 NAME
+
+e100boot - Network and serial port bootloader for the ETRAX100 CPU.
+
+=head1 SYNOPSIS
+
+B<e100boot> [B<--device> I<devicename>]
+[B<--file> I<filename>|- I<addr> [I<size>]]
+[B<--flash> I<ram-source> I<flash-offset> I<size>] [B<--pause> I<iter>]
+[B<--memtest> I<addr> I<addr>] [B<--memclear> I<addr> I<addr>]
+[B<--memdump> I<addr> I<addr>] [B<--setreg> I<addr>|I<regname> I<val>]
+[B<--getreg> I<addr>|I<regname>] [B<--verify> I<addr> I<val>]
+[B<--label> I<label>] [B<--loop> I<addr> I<label>] [B<--5400>] [B<--5600>]
+[B<--testcard>] [B<--devboard>] [B<--testcardlx>] [B<--network>] [B<--serial>]
+[B<--baudrate> I<baudrate>] [B<--bootfile> I<file>] [B<--jump> I<addr>]
+[B<--tofiles>] [B<--cmdsonly>] [B<--images>] [B<--noleds>] [B<--help>]
+
+=head1 DESCRIPTION
+
+This boot loader facilitates loading of files over the network or a
+serial port to an ETRAX100. It can also be used for fairly extensive
+hardware debugging as you can read and write to any memory addresses,
+including the ETRAX100 registers. You can also perform memory checks
+and dumps and copy data to flash memories.
+
+The first packet (or the first 784 bytes in the case of serial boot)
+sent to Etrax100 is loaded into the cache. The code in this packet is
+executed and loads the rest of the boot loader into the cache. The
+cache is the only thing we can be sure of exists on all ETRAX100
+products, so the boot loader is limited to the size of the cache,
+8KB. If further boot loading code is needed you have to set up
+external memory and load another boot loader into it, but this is
+rarely needed.
+
+Two programs are involved in this boot loading, one is the program on
+your workstation that sends the packets to ETRAX100, this is called
+the server boot loader or SBL. The other program is the one in
+ETRAX100 that receives packets from the SBL and acts upon the data
+therein, this is called the client boot loader or CBL.
+
+We don't want to edit and recompile the CBL each time we want to load
+level two to different parts of memory, like we do on different
+products. We also want to change things like the setup of external
+memory before we load data into it. To make the boot loading as
+flexible as possible and separate the CBL from level two we send a
+configuration packet to it. After this packet we load other files, if
+we want to.
+
+The configuration packet can contain information to the CBL which lets
+you: initialize external memory, read and write to all ETRAX100
+registers, read and write to any part of memory, load as many other
+files as you like to any part of memory you like, etc. The
+configuration packet is generated on the fly by the SBL.
+
+Since the CBL is unaware of which product it will be loaded on, it
+doesn't do product specific initialization like setting up the
+memory. This must be done with the configuration packet.
+
+=head2 Debugging printout
+
+When doing network boot the debugging printout from the CBL in ETRAX
+is transmitted back over the network and printed by e100boot. When
+doing serial boot that interface will be used. So in either case you
+will not need any other software or hardware to receive the debugging
+printout.
+
+=head2 Creating binaries
+
+The files containing code to be loaded on the ETRAX100 must be
+stripped using the standard GCC binutils.
+
+=head2 How it works, things you don't want to know.
+
+ack, timeout bla, bla... RTFS.
+
+=head2 Compilation and code
+
+Noteworthy is that two separate ETRAX100 binaries are created, one for
+network boot and one for serial boot. They actually contain exactly
+the same code, but linked in different order. This is because the code
+to load the rest of the bootloader over a specific interface must be
+contained in the first data sent to the ETRAX100 and it is too
+difficult to cram the code for both interfaces in the beginning of the
+same binary. Hence two files.
+
+Other stuff you don't want to know is that the cache is mapped from
+0x380000f0 to 0x380020f0. Code starts at the first address followed by
+data up to the symbol I<Ebss>. At the other end is the buffer for boot
+commands (addresses defined by I<IO_BUF_START> and I<IO_BUF_END> below
+which the stack lies and hopefully the stack and I<Ebss> will never
+meet...
+
+The serial data is loaded from 0x380000f0 to 0x380003ff before
+execution starts.
+
+=head1 OPTIONS
+
+The options are done in the order specified on the command line, so
+you probably want to do any memory setup before loading a file to the
+memory, and you probably do not want to perform a memory test after
+you have loaded a file to that memory.
+
+All addresses and sizes must be in hex with optional '0x' prefix, or a
+ETRAX100 register name. Since the B<--setreg> and B<--getreg> options
+only can be performed on dword aligned dwords only the registers that
+conform to this can be named.
+
+Note also that all addresses must be in uncached memory (bit 31 set),
+as the bootloader lies in the cache. If you access any uncached
+address during boot, the bootloader will be destroyed without warning.
+
+It is also possible to specify an address as I<+address>, in which
+case it is considered to be relative to I<IO_BUF_START>. This is
+especially useful in combination with the B<--loop> option below.
+
+=over 4
+
+=item B<--baudrate> I<baudrate>
+
+Set baudrate for files loaded after the boot loader.
+
+=item B<--bootfile> I<filename>
+
+Which boot image to send to ETRAX instead of the default ones.
+
+=item B<--cmdsonly>
+
+Write the commands to file e100boot.cmds.
+
+=item B<--devboard>
+
+Sets registers for the developer board.
+
+=item B<--device> I<devicename>
+
+Which device to send packets on. For network boot the default is
+eth0. For serial boot it is ttyS0.
+
+=item B<--file> I<filename>|- I<address> [I<size>]
+
+The file to load and the address to load it to. If file is loaded on
+stdin, specify filename '-' followed by a size. Size need only be
+given in this case. You can load as many files as you want, each
+specified with a B<--file>.
+
+=item B<--flash> I<ram-source flash-offset size>
+
+Copies the specified RAM area to the flash.
+
+=item B<--getreg> I<address>|I<regname>
+
+Print value of memory location. Must be uncached address.
+
+=item B<--help>
+
+Print the help information.
+
+=item B<--images>
+
+Print information about the internal boot images, then exit.
+
+=item B<--jump> I<address>
+
+Jump to specified address.
+
+=item B<--label> I<label>
+
+Define a label to be used as target by the B<--loop> command. This
+command is only used by the SBL to calculate the address for the
+B<--loop> and does not take up any space in the configuration packet.
+
+=item B<--loop> I<check-address label>
+
+If the contents of check-address is nonzero it is decremented and the
+command parser continues parsing at the label.
+
+If no external memory is initialized yet it can be convenient to use
+an address in the area occupied by the configuration packet. Run
+e100boot with B<--help> to see which addresses the commands are stored
+at. The size of the commands are four bytes for each command plus four
+bytes per argument to the command.
+
+=item B<--memclear> I<start-address end-address>
+
+Clears the specified memory area.
+
+=item B<--memdump> I<start-address end-address>
+
+Prints the contents of the specified memory area.
+
+=item B<--memtest> I<start-address end-address>
+
+Does a fairly extensive test of the specified memory area. Not only
+catches defect memories but also catches things like wrong memory
+setups where memory addresses are mirrored onto each other.
+
+=item B<--network>
+
+Perform a network boot.
+
+=item B<--noleds>
+
+When using the internal images use a version that does not toggle
+general port PA or PB in ETRAX during the boot procedure.
+
+=item B<--pause> I<iterations>
+
+How many I<iterations> to do of an empty loop.
+
+=item B<--serial>
+
+Do a serial boot.
+
+=item B<--setreg> I<address>|I<regname> I<value>
+
+Load dword to dword aligned memory location.
+
+=item B<--testcard>
+
+Configures the memories for the ETRAX 100 testcard.
+
+=item B<--testcardlx>
+
+Configures the memories for the ETRAX100 LX testcard.
+
+=item B<--tofiles>
+
+Write packets to files e100boot.seq[0..]. Does not transmit the data.
+
+=item B<--verify> I<address value>
+
+Verify that memory contains dword. If not loader will stop. This is to
+avoid booting the wrong unit. If you have the units ethernet address
+in the flash memory you can check for that.
+
+=item B<--5400>
+
+Sets R_WAITSTATES, R_DRAM_TIMING and R_DRAM_CONFIG for the 5400
+printserver.
+
+=item B<--5600>
+
+Sets R_WAITSTATES, R_DRAM_TIMING and R_DRAM_CONFIG for the 5600
+printserver.
+
+=back
+
+=head1 EXAMPLES
+
+If you have a stripped binary (file.ima) linked to 0x08000000 that you want
+to boot via the network, do this:
+
+B<e100boot --file file.ima 88000000 --jump 08000000>
+
+Or something like this. Sets waitstates to zero and loads two files,
+the first from stdin:
+
+B<cat file.ima | e100boot --memtest 88000000 8801ffff --memclear
+88000000 8801ffff --setreg b0000000 0 --getreg b0000000 --file -
+88000000 a000 --file file2.ima 88010000 --memdump 88000000 880000ff
+--jump 08000000>
+
+Or this, enables 16 bit parallel port and flashes the led on PA0:
+
+B<e100boot --testcardlx --setreg R_PORT_PA_SET 0x00000000 --setreg
+R_GEN_CONFIG 0x80000004 --setreg R_PAR0_CONFIG 0x00000200 --setreg
+R_PORT_G_DATA 0x00000000 --pause 0x02000000 --setreg R_PORT_G_DATA
+0xffffffff --pause 0x02000000 --setreg R_PORT_G_DATA 0x00000000 --loop
+0x38001e0b 0x38001e60>
+
+Setup the memory, test the SRAM, print the contents of the first 256
+bytes of SRAM, clear SRAM, test the DRAM, print R_DMA_CH0_CMD, load a
+file to SRAM, load another file to SRAM, load file to DRAM, jump to
+code in SRAM.
+
+B<e100boot --setreg b0000000 1000 --setreg b0000008 00006543 --setreg
+b000000c 12966060 --memtest 88000000 80000 --memdump 88000000 880000ff
+--memclear 88000000 80000 --memtest c0000000 400000 --getreg b00001d0
+--file file1.ima 88000000 --file file2.ima 88010000 --file file3.ima
+c0000000 --jump 88000000>
+
+Boot Linux on the testcard.
+
+B<e100boot --setreg b0000000 1000 --setreg b0000008 6557 --setreg
+b000000c 1b988080 --file timage c0000500 --jump 40000500>
+
+Booting over serial port and using labels to flash the leds on port
+PA.
+
+B<e100boot --serial --device /dev/ttyS1 --baudrate 9600 --label first
+--setreg 0x380020e0 00000001 --setreg R_PORT_PA_SET 0x0000ff00 --pause
+0x02000000 --setreg R_PORT_PA_SET 0x0000ffff --pause 0x02000000 --loop
+0x380020e0 first>
+
+=head1 BUGS
+
+You're kidding, right? Check L<AUTHOR|"AUTHOR"> below. The only thing
+would be the hubris of the author, but that I consider a feature. If
+you find any other 'features' report them to
+technology@axis.com. Don't bother the author directly, he is busy
+playing PlayStation2.
+
+=head1 COPYING
+
+Copyright © 1996-2002 Axis Communications AB.
+
+=head1 AUTHOR
+
+Written by Ronny Ranerup.
+
+=head1 SEE ALSO
+
+The fine source, which you can get at http://developer.axis.com.
+
--- /dev/null
+@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/CHANGES,v 1.1 1999/08/26 10:05:17 johana Exp $ (LBL)
+
+v0.4 Sat Jul 25 12:40:09 PDT 1998
+
+- Fix endian problem with DLT_NULL devices. From FreeBSD via Bill
+ Fenner (fenner@parc.xerox.com)
+
+- Fix alignment problem with FDDI under DLPI. This was causing core
+ dumps under Solaris.
+
+- Added configure options to disable flex and bison. Resulted from a
+ bug report by barnett@grymoire.crd.ge.com (Bruce Barnett). Also added
+ options to disable gcc and to force a particular packet capture type.
+
+- Added support for Fore ATM interfaces (qaa and fa) under IRIX. Thanks
+ to John Hawkinson (jhawk@mit.edu)
+
+- Change Linux PPP and SLIP to use DLT_RAW since the kernel does not
+ supply any "link layer" data.
+
+- Change Linux to use SIOCGIFHWADDR ioctl to determine link layer type.
+ Thanks to Thomas Sailer (sailer@ife.ee.ethz.ch)
+
+- Change IRIX PPP to use DLT_RAW since the kernel does not supply any
+ "link layer" data.
+
+- Modified to support the new BSD/OS 2.1 PPP and SLIP link layer header
+ formats.
+
+- Added some new SGI snoop interface types. Thanks to Steve Alexander
+ (sca@refugee.engr.sgi.com)
+
+- Fixes for HP-UX 10.20 (which is similar to HP-UX 9). Thanks to
+ Richard Allen (ra@hp.is) and Steinar Haug (sthaug@nethelp.no)
+
+- Fddi supports broadcast as reported by Jeff Macdonald
+ (jeff@iacnet.com). Also correct ieee802 and arcnet.
+
+- Determine Linux pcap buffer size at run time or else it might not be
+ big enough for some interface types (e.g. FDDI). Thanks to Jes
+ Sorensen (Jes.Sorensen@cern.ch)
+
+- Fix some linux alignment problems.
+
+- Document promisc argument to pcap_open_live(). Reported by Ian Marsh
+ (ianm@sics.se)
+
+- Support Metricom radio packets under Linux. Thanks to Kevin Lai
+ (laik@gunpowder.stanford.edu)
+
+- Bind to interface name under Linux to avoid packets from multiple
+ interfaces on multi-homed hosts. Thanks to Kevin Lai
+ (laik@gunpowder.stanford.edu)
+
+- Change L_SET to SEEK_SET for HP-UX. Thanks to Roland Roberts
+ (rroberts@muller.com)
+
+- Fixed an uninitialized memory reference found by Kent Vander Velden
+ (graphix@iastate.edu)
+
+- Fixed lex pattern for IDs to allow leading digits. As reported by
+ Theo de Raadt (deraadt@cvs.openbsd.org)
+
+- Fixed Linux include file problems when using GNU libc.
+
+- Ifdef ARPHRD_FDDI since not all versions of the Linux kernel have it.
+ Reported reported by Eric Jacksch (jacksch@tenebris.ca)
+
+- Fixed bug in pcap_dispatch() that kept it from returning on packet
+ timeouts.
+
+- Changed ISLOOPBACK() macro when IFF_LOOPBACK isn't available to check
+ for "lo" followed by an eos or digit (newer versions of Linux
+ apparently call the loopback "lo" instead of "lo0").
+
+- Fixed Linux networking include files to use ints instead of longs to
+ avoid problems with 64 bit longs on the alpha. Thanks to Cristian
+ Gafton (gafton@redhat.com)
+
+v0.3 Sat Nov 30 20:56:27 PST 1996
+
+- Added Linux support.
+
+- Fixed savefile bugs.
+
+- Solaris x86 fix from Tim Rylance (t.rylance@elsevier.nl)
+
+- Add support for bpf kernel port filters.
+
+- Remove duplicate atalk protocol table entry. Thanks to Christian
+ Hopps (chopps@water.emich.edu)
+
+- Fixed pcap_lookupdev() to ignore nonexistent devices. This was
+ reported to happen under BSD/OS by David Vincenzetti
+ (vince@cryptonet.it)
+
+- Avoid solaris compiler warnings. Thanks to Bruce Barnett
+ (barnett@grymoire.crd.ge.com)
+
+v0.2.1 Sun Jul 14 03:02:26 PDT 1996
+
+- Fixes for HP-UX 10. Thanks in part to to Thomas Wolfram
+ (wolf@prz.tu-berlin.de) and Rick Jones (raj@hpisrdq.cup.hp.com)
+
+- Added support for SINIX. Thanks to Andrej Borsenkow
+ (borsenkow.msk@sni.de)
+
+- Fixes for AIX (although this system is not yet supported). Thanks to
+ John Hawkinson (jhawk@mit.edu)
+
+- Use autoconf's idea of the top level directory in install targets.
+ Thanks to John Hawkinson.
+
+- Add missing autoconf packet capture result message. Thanks to Bill
+ Fenner (fenner@parc.xerox.com)
+
+- Fixed padding problems in the pf module.
+
+- Fixed some more alignment problems on the alpha.
+
+- Added explicit netmask support. Thanks to Steve Nuchia
+ (steve@research.oknet.com)
+
+- Fixed to handle raw ip addresses such as 0.0.0.1 without "left
+ justifing"
+
+- Add "sca" keyword (for DEC cluster services) as suggested by Terry
+ Kennedy (terry@spcvxa.spc.edu)
+
+- Add "atalk" keyword as suggested by John Hawkinson.
+
+- Add "igrp" keyword.
+
+- Fixed HID definition in grammar.y to be a string, not a value.
+
+- Use $CC when checking gcc version. Thanks to Carl Lindberg
+ (carl_lindberg@blacksmith.com)
+
+- Removed obsolete reference to pcap_immediate() from the man page.
+ Michael Stolarchuk (mts@terminator.rs.itd.umich.edu)
+
+- DLT_NULL has a 4 byte family header. Thanks to Jeffrey Honig
+ (jch@bsdi.com)
+
+v0.2 Sun Jun 23 02:28:42 PDT 1996
+
+- Add support for HP-UX. Resulted from code contributed by Tom Murray
+ (tmurray@hpindck.cup.hp.com) and Philippe-Andri Prindeville
+ (philipp@res.enst.fr)
+
+- Update INSTALL with a reminder to install include files. Thanks to
+ Mark Andrews (mandrews@aw.sgi.com)
+
+- Fix bpf compiler alignment bug on the alpha.
+
+- Use autoconf to detect architectures that can't handle misaligned
+ accesses.
+
+- Added loopback support for snoop. Resulted from report Steve
+ Alexander (sca@engr.sgi.com)
+
+v0.1 Fri Apr 28 18:11:03 PDT 1995
+
+- Fixed compiler and optimizer bugs. The BPF filter engine uses unsigned
+ comparison operators, while the code generator and optimizer assumed
+ signed semantics in several places. Thanks to Charlie Slater
+ (cslater@imatek.com) for pointing this out.
+
+- Removed FDDI ifdef's, they aren't really needed. Resulted from report
+ by Gary Veum (veum@boa.gsfc.nasa.gov).
+
+- Add pcap-null.c which allows offline use of libpcap on systems that
+ don't support live package capture. This feature resulting from a
+ request from Jan van Oorschot (j.p.m.voorschot@et.tudelft.nl).
+
+- Make bpf_compile() reentrant. Fix thanks to Pascal Hennequin
+ (Pascal.Hennequin@hugo.int-evry.fr).
+
+- Port to GNU autoconf.
+
+- Fix pcap-dlpi.c to work with isdn. Resulted from report by Flemming
+ Johansen (fsj@csd.cri.dk).
+
+- Handle multi-digit interface unit numbers (aka ppa's) under dlpi.
+ Resulted from report by Daniel Ehrlich (ehrlich@cse.psu.edu).
+
+- Fix pcap-dlpi.c to work in non-promiscuous mode. Resulted from report
+ by Jeff Murphy (jcmurphy@acsu.buffalo.edu).
+
+- Add support for "long jumps". Thanks to Jeffrey Mogul
+ (mogul@pa.dec.com).
+
+- Fix minor problems when compiling with BDEBUG as noticed by Scott
+ Bertilson (scott@unet.umn.edu).
+
+- Declare sys_errlist "const char *const" to avoid problems under
+ FreeBSD. Resulted from report by jher@eden.com.
+
+v0.0.6 Fri Apr 28 04:07:13 PDT 1995
+
+- Add missing variable declaration missing from 0.0.6
+
+v0.0.5 Fri Apr 28 00:22:21 PDT 1995
+
+- Workaround for problems when pcap_read() returns 0 due to the timeout
+ expiring.
+
+v0.0.4 Thu Apr 20 20:41:48 PDT 1995
+
+- Change configuration to not use gcc v2 flags with gcc v1.
+
+- Fixed a bug in pcap_next(); if pcap_dispatch() returns 0, pcap_next()
+ should also return 0. Thanks to Richard Stevens (rstevens@noao.edu).
+
+- Fixed configure to test for snoop before dlpi to avoid problems under
+ IRIX 5. Thanks to J. Eric Townsend (jet@abulafia.genmagic.com).
+
+- Hack around deficiency in Ultrix's make.
+
+- Fix two bugs related to the Solaris pre-5.3.2 bufmod bug; handle
+ savefiles that have more than snapshot bytes of data in them (so we
+ can read old savefiles) and avoid writing such files.
+
+- Added checkioctl which is used with gcc to check that the
+ "fixincludes" script has been run.
+
+v0.0.3 Tue Oct 18 18:13:46 PDT 1994
+
+- Fixed configure to test for snoop before dlpi to avoid problems under
+ IRIX 5. Thanks to J. Eric Townsend (jet@abulafia.genmagic.com).
+
+v0.0.2 Wed Oct 12 20:56:37 PDT 1994
+
+- Implement timeout in the dlpi pcap_open_live(). Thanks to Richard
+ Stevens.
+
+- Determine pcap link type from dlpi media type. Resulted from report
+ by Mahesh Jethanandani (mahesh@npix.com).
+
+v0.0.1 Fri Jun 24 14:50:57 PDT 1994
+
+- Fixed bug in nit_setflags() in pcap-snit.c. The streams ioctl timeout
+ wasn't being initialized sometimes resulting in an "NIOCSFLAGS:
+ Invalid argument" error under OSF/1. Reported by Matt Day
+ (mday@artisoft.com) and Danny Mitzel (dmitzel@whitney.hitc.com).
+
+- Turn on FDDI support by default.
+
+v0.0 Mon Jun 20 19:20:16 PDT 1994
+
+- Initial release.
+
+- Fixed bug with greater/less keywords, reported by Mark Andrews
+ (mandrews@alias.com).
+
+- Fix bug where '|' was defined as BPF_AND instead of BPF_OR, reported
+ by Elan Amir (elan@leeb.cs.berkeley.edu).
+
+- Machines with little-endian byte ordering are supported thanks to
+ Jeff Mogul.
+
+- Add hack for version 2.3 savefiles which don't have caplen and len
+ swapped thanks to Vern Paxson.
+
+- Added "&&" and "||" aliases for "and" and "or" thanks to Vern Paxson.
+
+- Added length, inbound and outbound keywords.
--- /dev/null
+CHANGES
+FILES
+INSTALL
+Makefile.in
+README
+SUNOS4
+VERSION
+aclocal.m4
+bpf/net/bpf.h
+bpf/net/bpf_filter.c
+bpf_image.c
+config.guess
+config.sub
+configure
+configure.in
+etherent.c
+ethertype.h
+gencode.c
+gencode.h
+grammar.y
+inet.c
+install-sh
+lbl/gnuc.h
+lbl/os-solaris2.h
+lbl/os-sunos4.h
+lbl/os-ultrix4.h
+linux-include/netinet/if_ether.h
+linux-include/netinet/ip_var.h
+mkdep
+nametoaddr.c
+optimize.c
+pcap-bpf.c
+pcap-dlpi.c
+pcap-enet.c
+pcap-int.h
+pcap-linux.c
+pcap-namedb.h
+pcap-nit.c
+pcap-nit.h
+pcap-null.c
+pcap-pf.c
+pcap-pf.h
+pcap-snit.c
+pcap-snoop.c
+pcap.3
+pcap.c
+pcap.h
+ppp.h
+savefile.c
+scanner.l
--- /dev/null
+@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/INSTALL,v 1.1 1999/08/26 10:05:18 johana Exp $ (LBL)
+
+To build libpcap, first customize any paths in Makefile.in, then run
+"./configure" (a shell script). The configure script will determine
+your system attributes and generate an appropriate Makefile from
+Makefile.in. Next run "make". If everything goes well you can su to
+root and run "make install", "make install-incl" and "make
+install-man". However, you need not install libpcap if you just want to
+build tcpdump; just make sure the tcpdump and libpcap directory trees
+have the same parent directory.
+
+If configure says:
+
+ configure: warning: cannot determine packet capture interface
+ configure: warning: (see INSTALL for more info)
+
+then your system either does not support packet capture or your system
+does support packet capture but libpcap does not support that
+particular type. (If you have HP-UX, see below.) If your system uses a
+packet capture not supported by libpcap, please send us patches; don't
+forget to include an autoconf fragment suitable for use in
+configure.in.
+
+It is possible to override the default packet capture type, although
+the circumstance where this works are limited. For example if you have
+installed bpf under SunOS 4 and wish to build a snit libpcap:
+
+ ./configure --with-pcap=snit
+
+Another example is to force a supported packet capture type in the case
+where the configure scripts fails to detect it.
+
+You will need an ANSI C compiler to build libpcap. The configure script
+will abort if your compiler is not ANSI compliant. If this happens, use
+the GNU C compiler, available via anonymous ftp:
+
+ ftp://prep.ai.mit.edu/pub/gnu/gcc-*.tar.gz
+
+Note well: If you use gcc, you may need to run its "fixincludes"
+script. Running fixincludes is not required with later versions of gcc
+and in some cases (e.g. Solaris 2.5) causes problems when run. The
+configure script will abort with:
+
+ checking for ANSI ioctl definitions... yes
+ configure: error: see the INSTALL for more info
+
+if it detects if the fixincludes needs to be run. If the fixincludes
+test in configure passes, you're probably ok.
+
+If you use flex, you must use version 2.4.6 or higher. The configure
+script automatically detects the version of flex and will not use it
+unless it is new enough. You can use "flex -V" to see what version you
+have (unless it's really old). The current version of flex is available
+via anonymous ftp:
+
+ ftp://ftp.ee.lbl.gov/flex-*.tar.Z
+
+As of this writing, the current version is 2.5.4.
+
+If you use bison, you must use flex (and visa versa). The configure
+script automatically falls back to lex and yacc if both flex and bison
+are not found.
+
+Sometimes the stock C compiler does not interact well with flex and
+bison. The list of problems includes undefined references for alloca.
+You can get around this by installing gcc or manually disabling flex
+and bison with:
+
+ ./configure --without-flex --without-bison
+
+If your system only has AT&T lex, this is okay unless your libpcap
+program uses other lex/yacc generated code. (Although it's possible to
+map the yy* identifiers with a script, we use flex and bison so we
+don't feel this is necessary.)
+
+Some systems support the Berkeley Packet Filter natively; for example
+out of the box OSF and BSD/OS have bpf. If your system does not support
+bpf, you will need to pick up:
+
+ ftp://ftp.ee.lbl.gov/bpf-*.tar.Z
+
+Note well: you MUST have kernel source for your operating system in
+order to install bpf. An exception is SunOS 4; the bpf distribution
+includes replacement kernel objects for some of the standard SunOS 4
+network device drivers. See the bpf INSTALL document for more
+information.
+
+If you use Solaris, there is a bug with bufmod(7) that is fixed in
+Solaris 2.3.2 (aka SunOS 5.3.2). Setting a snapshot length with the
+broken bufmod(7) results in data be truncated from the FRONT of the
+packet instead of the end. The work around is to not set a snapshot
+length but this results in performance problems since the entire packet
+is copied to user space. If you must run an older version of Solaris,
+there is a patch available from Sun; ask for bugid 1149065. After
+installing the patch, use "setenv BUFMOD_FIXED" to enable use of
+bufmod(7). However, we recommend you run a more current release of
+Solaris.
+
+If you use the SPARCompiler, you must be careful to not use the
+/usr/ucb/cc interface. If you do, you will get bogus warnings and
+perhaps errors. Either make sure your path has /opt/SUNWspro/bin
+before /usr/ucb or else:
+
+ setenv CC /opt/SUNWspro/bin/cc
+
+before running configure. (You might have to do a "make distclean"
+if you already ran configure once).
+
+Also note that "make depend" won't work; while all of the known
+universe uses -M, the SPARCompiler uses -xM to generate makefile
+dependencies.
+
+If you are trying to do packet capture with a FORE ATM card, you may or
+may not be able to. They usually only release their driver in object
+code so unless their driver supports packet capture, there's not much
+libpcap can do.
+
+If you get an error like:
+
+ tcpdump: recv_ack: bind error 0x???
+
+when using DLPI, look for the DL_ERROR_ACK error return values, usually
+in /usr/include/sys/dlpi.h, and find the corresponding value.
+
+Under OSF, packet capture must be enabled before it can be used. For
+instructions on how to enable packet filter support, see:
+
+ ftp://ftp.digital.com/pub/Digital/dec-faq/Digital-UNIX
+
+Once you enable packet filter support, your OSF system will support bpf
+natively.
+
+Under Ultrix, packet capture must be enabled before it can be used. For
+instructions on how to enable packet filter support, see:
+
+ ftp://ftp.digital.com/pub/Digital/dec-faq/ultrix
+
+If you use HP-UX, you must have at least version 9 and either the
+version of cc that supports ANSI C (cc -Aa) or else use the GNU C
+compiler. You must also buy the optional streams package. If you don't
+have:
+
+ /usr/include/sys/dlpi.h
+ /usr/include/sys/dlpi_ext.h
+
+then you don't have the streams package. In addition, we believe you
+need to install the "9.X LAN and DLPI drivers cumulative" patch
+(PHNE_6855) to make the version 9 DLPI work with libpcap.
+
+It's been reported that the DLPI streams package is standard starting
+with HP-UX 10.
+
+The HP implementation of DLPI is a little bit eccentric. Unlike
+Solaris, you must attach /dev/dlpi instead of the specific /dev/*
+network pseudo device entry in order to capture packets. The ppa is
+based on the ifnet "index" number. Under HP-UX 9, it is necessary to
+read /dev/kmem and the kernel symbol file (/hp-ux). Under HP-UX 10,
+dlpi can provide information for determining the ppa. It does not seem
+to be possible to trace the loopback interface. Unlike other DLPI
+implementations, PHYS implies MULTI and SAP and you get an error if you
+try to enable more than one promiscous more than one promiscuous mode
+at a time. Finally, testing shows that there can't be more than one
+simultaneous dlpi user per network interface and you cannot capture
+outbound packets.
+
+If you use Linux, this version of libpcap is known to compile and run
+under Red Hat 4.0 with the 2.0.25 kernel. It may work with earlier 2.X
+versions but is guaranteed not to work with 1.X kernels. Running more
+than one libpcap program at a time can cause problems since promiscuous
+mode is implemented by twiddlin the interface flags from the libpcap
+application. Also, packet timestamps aren't very good. This appears to
+be due to haphazard handling of the timestamp in the kernel.
+
+Note well: there is rumoured to be a version of tcpdump floating around
+called 3.0.3 that includes libpcap and is supposed to support Linux.
+You should be advised that the Network Research Group at LBNL never
+generated a release with this version number. We note with interest
+that a standard cracker trick to get people to install trojans is to
+distribute bogus packages that have a version number higher than the
+current release. We also note with annoyance that 90% of the Linux
+related bug reports we get are due to changes made to unofficial
+versions of our page. If you are having trouble but aren't using a
+version that came from ftp.ee.lbl.gov, please try that before
+submitting a bug report!
+
+If you use AIX, you may not be able to build libpcap from this release.
+Although AIX 4 ships with tcpdump, it is an old version that predates
+libpcap. We do not have an AIX system in house so it's impossible for
+us to test AIX patches submitted to us. We are told that you must link
+against /lib/pse.exp, that you must use AIX cc or a GNU C compiler
+newer than 2.7.2 and that you may need to run strload before running a
+libpcap application. Also, it may be necessary to run the configure
+script as root in order for it to detect that bpf is available. Another
+workaround is to use:
+
+ ./configure --with-pcap=bpf
+
+If you use NeXTSTEP, you will not be able to build libpcap from this
+release. We hope to support this operating system in some future
+release of libpcap.
+
+If you use SINIX, you should be able to build libpcap from this
+release. It is known to compile and run on SINIX-Y/N 5.42 with the C-DS
+V1.0 or V1.1 compiler. But note that in some releases of SINIX, yacc
+emits incorrect code; if grammar.y fails to compile, change every
+occurence of:
+
+ #ifdef YYDEBUG
+
+to:
+ #if YYDEBUG
+
+Another workaround is to use flex and bison.
+
+If you use SCO, you might have trouble building libpcap from this
+release. We do not have a machine running SCO and have not had reports
+of anyone successfully building on it. Since SCO apparently supports
+dlpi, it's possible the current version works. Meanwhile, sco provides
+a tcpdump binary as part of their "Network/Security Tools" package:
+
+ http://www.sco.com/technology/internet/goodies/#SECURITY
+
+There is also a README that explains how to enable packet capture.
+
+If you use UnixWare, you will not be able to build libpcap from this
+release. We hope to support this operating system in some future
+release of libpcap. Meanwhile, there appears to be an UnixWare port of
+libpcap 0.0 (and tcpdump 3.0) in:
+
+ ftp://ftp1.freebird.org/pub/mirror/freebird/internet/systools/
+
+UnixWare appears to use a hacked version of DLPI.
+
+If linking tcpdump fails with "Undefined: _alloca" when using bison on
+a Sun4, your version of bison is broken. In any case version 1.16 or
+higher is recommended (1.14 is known to cause problems 1.16 is known to
+work). Either pick up a current version from:
+
+ ftp://prep.ai.mit.edu/pub/gnu/bison.tar.gz
+
+or hack around it by inserting the lines:
+
+ #ifdef __GNUC__
+ #define alloca __builtin_alloca
+ #else
+ #ifdef sparc
+ #include <alloca.h>
+ #else
+ char *alloca ();
+ #endif
+ #endif
+
+right after the (100 line!) GNU license comment in bison.simple, remove
+grammar.[co] and fire up make again.
+
+If you use SunOS 4, your kernel must support streams NIT. If you run a
+libpcap program and it dies with:
+
+ /dev/nit: No such device
+
+You must add streams NIT support to your kernel configuration, run
+config and boot the new kernel.
+
+If you are running a version of SunOS earlier than 4.1, you will need
+to replace the Sun supplied /sys/sun{3,4,4c}/OBJ/nit_if.o with the
+appropriate version from this distribution's SUNOS4 subdirectory and
+build a new kernel:
+
+ nit_if.o.sun3-sunos4 (any flavor of sun3)
+ nit_if.o.sun4c-sunos4.0.3c (SS1, SS1+, IPC, SLC, etc.)
+ nit_if.o.sun4-sunos4 (Sun4's not covered by
+ nit_if.o.sun4c-sunos4.0.3c)
+
+These nit replacements fix a bug that makes nit essentially unusable in
+pre-SunOS 4.1. In addition, our sun4c-sunos4.0.3c nit gives you
+timestamps to the resolution of the SS-1 clock (1 us) rather than the
+lousy 20ms timestamps Sun gives you (tcpdump will print out the full
+timestamp resolution if it finds it's running on a SS-1).
+
+FILES
+-----
+CHANGES - description of differences between releases
+FILES - list of files exported as part of the distribution
+INSTALL - this file
+Makefile.in - compilation rules (input to the configure script)
+README - description of distribution
+SUNOS4 - pre-SunOS 4.1 replacement kernel nit modules
+VERSION - version of this release
+aclocal.m4 - autoconf macros
+bpf/net - copies of bpf_filter.c and bpf.h
+bpf_filter.c - symlink to bpf/net/bpf_filter.c
+bpf_image.c - bpf disassembly routine
+config.guess - autoconf support
+config.sub - autoconf support
+configure - configure script (run this first)
+configure.in - configure script source
+etherent.c - /etc/ethers support routines
+ethertype.h - ethernet protocol types and names definitions
+gencode.c - bpf code generation routines
+gencode.h - bpf code generation definitions
+grammar.y - filter string grammar
+inet.c - network routines
+install-sh - BSD style install script
+lbl/gnuc.h - gcc macros and defines
+lbl/os-*.h - os dependent defines and prototypes
+linux-include/* - network include files missing on Linux
+mkdep - construct Makefile dependency list
+nametoaddr.c - hostname to address routines
+net - symlink to bpf/net
+optimize.c - bpf optimization routines
+pcap-bpf.c - BSD Packet Filter support
+pcap-dlpi.c - Data Link Provider Interface support
+pcap-enet.c - enet support
+pcap-int.h - internal libpcap definitions
+pcap-namedb.h - public libpcap name database definitions
+pcap-nit.c - Network Interface Tap support
+pcap-nit.h - Network Interface Tap definitions
+pcap-null.c - dummy monitor support (allows offline use of libpcap)
+pcap-pf.c - Packet Filter support
+pcap-pf.h - Packet Filter definitions
+pcap-snit.c - Streams based Network Interface Tap support
+pcap-snoop.c - Snoop network monitoring support
+pcap.3 - manual entry
+pcap.c - pcap utility routines
+pcap.h - public libpcap definitions
+ppp.h - Point to Point Protocol definitions
+savefile.c - offline support
+scanner.l - filter string scanner
--- /dev/null
+# Generated automatically from Makefile.in by configure.
+# $Id: Makefile.in,v 1.7 2002/09/18 15:29:46 pkj Exp $
+# Copyright (c) 1993, 1994, 1995, 1996
+# The Regents of the University of California. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that: (1) source code distributions
+# retain the above copyright notice and this paragraph in its entirety, (2)
+# distributions including binary code include the above copyright notice and
+# this paragraph in its entirety in the documentation or other materials
+# provided with the distribution, and (3) all advertising materials mentioning
+# features or use of this software display the following acknowledgement:
+# ``This product includes software developed by the University of California,
+# Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+# the University nor the names of its contributors may be used to endorse
+# or promote products derived from this software without specific prior
+# written permission.
+# THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+# WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+#
+# @(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/Makefile.in,v 1.7 2002/09/18 15:29:46 pkj Exp $ (LBL)
+
+#
+# Various configurable paths (remember to edit Makefile.in, not Makefile)
+#
+
+# Top level hierarchy
+prefix = /usr/local
+exec_prefix = ${prefix}
+# Pathname of directory to install the include files
+INCLDEST = ${prefix}/include
+# Pathname of directory to install the library
+LIBDEST = ${exec_prefix}/lib
+# Pathname of directory to install the man page
+MANDEST = ${prefix}/man
+
+# VPATH
+srcdir = .
+
+#
+# You shouldn't need to edit anything below.
+#
+CFLAGS =
+CC = gcc
+AR = ar
+INSTALL = install_elinux -p
+RANLIB = ranlib
+
+prefix =
+AXIS_USABLE_LIBS = UCLIBC GLIBC
+-include $(AXIS_TOP_DIR)/tools/build/Rules.axis
+ifndef AXIS_BUILDTYPE
+prefix = /usr/local
+endif
+
+CCOPT = -O2
+INCLS = -I. -Ilinux-include
+DEFS = -DHAVE_MALLOC_H=1 -DHAVE_ETHER_HOSTTON=1 -DHAVE_STRERROR=1 -DHAVE_NET_IF_ARP_H=1
+
+# Standard CFLAGS
+CFLAGS += $(CCOPT) $(INCLS) $(DEFS)
+
+
+#
+# Flex and bison allow you to specify the prefixes of the global symbols
+# used by the generated parser. This allows programs to use lex/yacc
+# and link against libpcap. If you don't have flex or bison, get them.
+#
+LEX = flex -Ppcap_
+YACC = bison -y -p pcap_
+
+# Explicitly define compilation rule since SunOS 4's make doesn't like gcc.
+# Also, gcc does not remove the .o before forking 'as', which can be a
+# problem if you don't own the file but can write to the directory.
+.c.o:
+ @rm -f $@
+ $(CC) $(CFLAGS) -c $(srcdir)/$*.c
+
+PSRC = pcap-linux.c
+CSRC = pcap.c inet.c gencode.c optimize.c nametoaddr.c \
+ etherent.c savefile.c bpf_filter.c bpf_image.c
+GENSRC = scanner.c grammar.c version.c
+
+SRC = $(PSRC) $(CSRC) $(GENSRC)
+
+# We would like to say "OBJ = $(SRC:.c=.o)" but Ultrix's make cannot
+# hack the extra indirection
+OBJ = $(PSRC:.c=.o) $(CSRC:.c=.o) $(GENSRC:.c=.o)
+HDR = pcap.h pcap-int.h pcap-namedb.h pcap-nit.h pcap-pf.h \
+ ethertype.h gencode.h gnuc.h
+GENHDR = \
+ tokdefs.h
+
+TAGHDR = \
+ bpf/net/bpf.h
+
+TAGFILES = \
+ $(SRC) $(HDR) $(TAGHDR)
+
+CLEANFILES = $(OBJ) libpcap.a $(GENSRC) $(GENHDR) lex.yy.c
+
+all: libpcap.a
+
+libpcap.a: $(OBJ)
+ @rm -f $@
+ $(AR) rc $@ $(OBJ)
+ $(RANLIB) $@
+
+scanner.c: $(srcdir)/scanner.l
+ @rm -f $@
+ $(LEX) -t $< > $$$$.$@; mv $$$$.$@ $@
+
+scanner.o: scanner.c tokdefs.h
+tokdefs.h: grammar.c
+grammar.c: $(srcdir)/grammar.y
+ @rm -f grammar.c tokdefs.h
+ $(YACC) -d $<
+ mv y.tab.c grammar.c
+ mv y.tab.h tokdefs.h
+
+grammar.o: grammar.c
+ @rm -f $@
+ $(CC) $(CFLAGS) -Dyylval=pcap_lval -c grammar.c
+
+version.o: version.c
+version.c: $(srcdir)/VERSION
+ @rm -f $@
+ sed -e 's/.*/char pcap_version[] = "&";/' $(srcdir)/VERSION > $@
+
+install: force
+ $(INSTALL) -m 444 -o bin -g bin libpcap.a $(DESTDIR)$(LIBDEST)/libpcap.a
+ $(RANLIB) $(DESTDIR)$(LIBDEST)/libpcap.a
+
+install-incl: force
+ $(INSTALL) -m 444 -o bin -g bin $(srcdir)/pcap.h \
+ $(DESTDIR)$(INCLDEST)/pcap.h
+ $(INSTALL) -m 444 -o bin -g bin $(srcdir)/pcap-namedb.h \
+ $(DESTDIR)$(INCLDEST)/pcap-namedb.h
+ $(INSTALL) -m 444 -o bin -g bin $(srcdir)/net/bpf.h \
+ $(DESTDIR)$(INCLDEST)/net/bpf.h
+
+install-man: force
+ $(INSTALL) -m 444 -o bin -g bin $(srcdir)/pcap.3 \
+ $(DESTDIR)$(MANDEST)/man3/pcap.3
+
+clean:
+ rm -f $(CLEANFILES)
+
+distclean:
+ rm -f $(CLEANFILES) Makefile config.cache config.log config.status \
+ gnuc.h os-proto.h bpf_filter.c net
+
+tags: $(TAGFILES)
+ ctags -wtd $(TAGFILES)
+
+tar: force
+ @cwd=`pwd` ; dir=`basename $$cwd` ; name=libpcap-`cat VERSION` ; \
+ list="" ; tar="tar chFFf" ; \
+ for i in `cat FILES` ; do list="$$list $$name/$$i" ; done; \
+ echo \
+ "rm -f ../$$name; ln -s $$dir ../$$name" ; \
+ rm -f ../$$name; ln -s $$dir ../$$name ; \
+ echo \
+ "(cd .. ; $$tar - [lots of files]) | compress > /tmp/$$name.tar.Z" ; \
+ (cd .. ; $$tar - $$list) | compress > /tmp/$$name.tar.Z ; \
+ echo \
+ "rm -f ../$$name" ; \
+ rm -f ../$$name
+
+force: /tmp
+depend: $(GENSRC) force
+ ./mkdep -c $(CC) $(DEFS) $(INCLS) $(SRC)
--- /dev/null
+conf:
+ ./configure
--- /dev/null
+# $Id: Makefile.in,v 1.7 2002/09/18 15:29:46 pkj Exp $
+# Copyright (c) 1993, 1994, 1995, 1996
+# The Regents of the University of California. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that: (1) source code distributions
+# retain the above copyright notice and this paragraph in its entirety, (2)
+# distributions including binary code include the above copyright notice and
+# this paragraph in its entirety in the documentation or other materials
+# provided with the distribution, and (3) all advertising materials mentioning
+# features or use of this software display the following acknowledgement:
+# ``This product includes software developed by the University of California,
+# Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+# the University nor the names of its contributors may be used to endorse
+# or promote products derived from this software without specific prior
+# written permission.
+# THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+# WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+#
+# @(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/Makefile.in,v 1.7 2002/09/18 15:29:46 pkj Exp $ (LBL)
+
+#
+# Various configurable paths (remember to edit Makefile.in, not Makefile)
+#
+
+# Top level hierarchy
+prefix = @prefix@
+exec_prefix = @exec_prefix@
+# Pathname of directory to install the include files
+INCLDEST = @includedir@
+# Pathname of directory to install the library
+LIBDEST = @libdir@
+# Pathname of directory to install the man page
+MANDEST = @mandir@
+
+# VPATH
+srcdir = @srcdir@
+VPATH = @srcdir@
+
+#
+# You shouldn't need to edit anything below.
+#
+CFLAGS =
+CC = @CC@
+AR = ar
+INSTALL = @INSTALL@
+RANLIB = @V_RANLIB@
+
+prefix =
+AXIS_USABLE_LIBS = UCLIBC GLIBC
+-include $(AXIS_TOP_DIR)/tools/build/Rules.axis
+ifndef AXIS_BUILDTYPE
+prefix = @prefix@
+endif
+
+CCOPT = @V_CCOPT@
+INCLS = -I. @V_INCLS@
+DEFS = @DEFS@
+
+# Standard CFLAGS
+CFLAGS += $(CCOPT) $(INCLS) $(DEFS)
+
+
+#
+# Flex and bison allow you to specify the prefixes of the global symbols
+# used by the generated parser. This allows programs to use lex/yacc
+# and link against libpcap. If you don't have flex or bison, get them.
+#
+LEX = @V_LEX@
+YACC = @V_YACC@
+
+# Explicitly define compilation rule since SunOS 4's make doesn't like gcc.
+# Also, gcc does not remove the .o before forking 'as', which can be a
+# problem if you don't own the file but can write to the directory.
+.c.o:
+ @rm -f $@
+ $(CC) $(CFLAGS) -c $(srcdir)/$*.c
+
+PSRC = pcap-@V_PCAP@.c
+CSRC = pcap.c inet.c gencode.c optimize.c nametoaddr.c \
+ etherent.c savefile.c bpf_filter.c bpf_image.c
+GENSRC = scanner.c grammar.c version.c
+
+SRC = $(PSRC) $(CSRC) $(GENSRC)
+
+# We would like to say "OBJ = $(SRC:.c=.o)" but Ultrix's make cannot
+# hack the extra indirection
+OBJ = $(PSRC:.c=.o) $(CSRC:.c=.o) $(GENSRC:.c=.o)
+HDR = pcap.h pcap-int.h pcap-namedb.h pcap-nit.h pcap-pf.h \
+ ethertype.h gencode.h gnuc.h
+GENHDR = \
+ tokdefs.h
+
+TAGHDR = \
+ bpf/net/bpf.h
+
+TAGFILES = \
+ $(SRC) $(HDR) $(TAGHDR)
+
+CLEANFILES = $(OBJ) libpcap.a $(GENSRC) $(GENHDR) lex.yy.c
+
+all: libpcap.a
+
+libpcap.a: $(OBJ)
+ @rm -f $@
+ $(AR) rc $@ $(OBJ)
+ $(RANLIB) $@
+
+scanner.c: $(srcdir)/scanner.l
+ @rm -f $@
+ $(LEX) -t $< > $$$$.$@; mv $$$$.$@ $@
+
+scanner.o: scanner.c tokdefs.h
+tokdefs.h: grammar.c
+grammar.c: $(srcdir)/grammar.y
+ @rm -f grammar.c tokdefs.h
+ $(YACC) -d $<
+ mv y.tab.c grammar.c
+ mv y.tab.h tokdefs.h
+
+grammar.o: grammar.c
+ @rm -f $@
+ $(CC) $(CFLAGS) -Dyylval=pcap_lval -c grammar.c
+
+version.o: version.c
+version.c: $(srcdir)/VERSION
+ @rm -f $@
+ sed -e 's/.*/char pcap_version[] = "&";/' $(srcdir)/VERSION > $@
+
+install: force
+ $(INSTALL) -m 444 -o bin -g bin libpcap.a $(DESTDIR)$(LIBDEST)/libpcap.a
+ $(RANLIB) $(DESTDIR)$(LIBDEST)/libpcap.a
+
+install-incl: force
+ $(INSTALL) -m 444 -o bin -g bin $(srcdir)/pcap.h \
+ $(DESTDIR)$(INCLDEST)/pcap.h
+ $(INSTALL) -m 444 -o bin -g bin $(srcdir)/pcap-namedb.h \
+ $(DESTDIR)$(INCLDEST)/pcap-namedb.h
+ $(INSTALL) -m 444 -o bin -g bin $(srcdir)/net/bpf.h \
+ $(DESTDIR)$(INCLDEST)/net/bpf.h
+
+install-man: force
+ $(INSTALL) -m 444 -o bin -g bin $(srcdir)/pcap.3 \
+ $(DESTDIR)$(MANDEST)/man3/pcap.3
+
+clean:
+ rm -f $(CLEANFILES)
+
+distclean:
+ rm -f $(CLEANFILES) Makefile config.cache config.log config.status \
+ gnuc.h os-proto.h bpf_filter.c net
+
+tags: $(TAGFILES)
+ ctags -wtd $(TAGFILES)
+
+tar: force
+ @cwd=`pwd` ; dir=`basename $$cwd` ; name=libpcap-`cat VERSION` ; \
+ list="" ; tar="tar chFFf" ; \
+ for i in `cat FILES` ; do list="$$list $$name/$$i" ; done; \
+ echo \
+ "rm -f ../$$name; ln -s $$dir ../$$name" ; \
+ rm -f ../$$name; ln -s $$dir ../$$name ; \
+ echo \
+ "(cd .. ; $$tar - [lots of files]) | compress > /tmp/$$name.tar.Z" ; \
+ (cd .. ; $$tar - $$list) | compress > /tmp/$$name.tar.Z ; \
+ echo \
+ "rm -f ../$$name" ; \
+ rm -f ../$$name
+
+force: /tmp
+depend: $(GENSRC) force
+ ./mkdep -c $(CC) $(DEFS) $(INCLS) $(SRC)
--- /dev/null
+@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/README,v 1.1 1999/08/26 10:05:19 johana Exp $ (LBL)
+
+LIBPCAP 0.4
+Lawrence Berkeley National Laboratory
+Network Research Group
+libpcap@ee.lbl.gov
+ftp://ftp.ee.lbl.gov/libpcap.tar.Z
+
+This directory contains source code for libpcap, a system-independent
+interface for user-level packet capture. libpcap provides a portable
+framework for low-level network monitoring. Applications include
+network statistics collection, security monitoring, network debugging,
+etc. Since almost every system vendor provides a different interface
+for packet capture, and since we've developed several tools that
+require this functionality, we've created this system-independent API
+to ease in porting and to alleviate the need for several
+system-dependent packet capture modules in each application.
+
+Note well: this interface is new and is likely to change.
+
+The libpcap interface supports a filtering mechanism based on the
+architecture in the BSD packet filter. BPF is described in the 1993
+Winter Usenix paper ``The BSD Packet Filter: A New Architecture for
+User-level Packet Capture''. A compressed postscript version is in:
+
+ ftp://ftp.ee.lbl.gov/papers/bpf-usenix93.ps.Z.
+
+Although most packet capture interfaces support in-kernel filtering,
+libpcap utilizes in-kernel filtering only for the BPF interface.
+On systems that don't have BPF, all packets are read into user-space
+and the BPF filters are evaluated in the libpcap library, incurring
+added overhead (especially, for selective filters). Ideally, libpcap
+would translate BPF filters into a filter program that is compatible
+with the underlying kernel subsystem, but this is not yet implemented.
+
+BPF is standard in 4.4BSD, BSD/386, NetBSD, and FreeBSD. DEC OSF/1
+uses the packetfilter interface but has been extended to accept BPF
+filters (which libpcap utilizes). Also, you can add BPF filter support
+to Ultrix using the kernel source and/or object patches available in:
+
+ ftp://gatekeeper.dec.com/pub/DEC/net/bpfext42.tar.Z.
+
+Problems, bugs, questions, desirable enhancements, source code
+contributions, etc., should be sent to the email address
+"libpcap@ee.lbl.gov".
+
+ - Steve McCanne
+ Craig Leres
+ Van Jacobson
--- /dev/null
+dnl @(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/aclocal.m4,v 1.1 1999/08/26 10:05:19 johana Exp $ (LBL)
+dnl
+dnl Copyright (c) 1995, 1996, 1997, 1998
+dnl The Regents of the University of California. All rights reserved.
+dnl
+dnl Redistribution and use in source and binary forms, with or without
+dnl modification, are permitted provided that: (1) source code distributions
+dnl retain the above copyright notice and this paragraph in its entirety, (2)
+dnl distributions including binary code include the above copyright notice and
+dnl this paragraph in its entirety in the documentation or other materials
+dnl provided with the distribution, and (3) all advertising materials mentioning
+dnl features or use of this software display the following acknowledgement:
+dnl ``This product includes software developed by the University of California,
+dnl Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+dnl the University nor the names of its contributors may be used to endorse
+dnl or promote products derived from this software without specific prior
+dnl written permission.
+dnl THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+dnl WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+dnl MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+dnl
+dnl LBL autoconf macros
+dnl
+
+dnl
+dnl Determine which compiler we're using (cc or gcc)
+dnl If using gcc, determine the version number
+dnl If using cc, require that it support ansi prototypes
+dnl If using gcc, use -O2 (otherwise use -O)
+dnl If using cc, explicitly specify /usr/local/include
+dnl
+dnl usage:
+dnl
+dnl AC_LBL_C_INIT(copt, incls)
+dnl
+dnl results:
+dnl
+dnl $1 (copt set)
+dnl $2 (incls set)
+dnl CC
+dnl LDFLAGS
+dnl ac_cv_lbl_gcc_vers
+dnl LBL_CFLAGS
+dnl
+AC_DEFUN(AC_LBL_C_INIT,
+ [AC_PREREQ(2.12)
+ AC_BEFORE([$0], [AC_PROG_CC])
+ AC_BEFORE([$0], [AC_LBL_FIXINCLUDES])
+ AC_BEFORE([$0], [AC_LBL_DEVEL])
+ AC_ARG_WITH(gcc, [ --without-gcc don't use gcc])
+ $1="-O"
+ $2=""
+ if test "${srcdir}" != "." ; then
+ $2="-I\$\(srcdir\)"
+ fi
+ if test "${CFLAGS+set}" = set; then
+ LBL_CFLAGS="$CFLAGS"
+ fi
+ if test -z "$CC" ; then
+ case "$target_os" in
+
+ bsdi*)
+ AC_CHECK_PROG(SHLICC2, shlicc2, yes, no)
+ if test $SHLICC2 = yes ; then
+ CC=shlicc2
+ export CC
+ fi
+ ;;
+ esac
+ fi
+ if test -z "$CC" -a "$with_gcc" = no ; then
+ CC=cc
+ export CC
+ fi
+ AC_PROG_CC
+ if test "$GCC" = yes ; then
+ if test "$SHLICC2" = yes ; then
+ ac_cv_lbl_gcc_vers=2
+ $1="-O2"
+ else
+ AC_MSG_CHECKING(gcc version)
+ AC_CACHE_VAL(ac_cv_lbl_gcc_vers,
+ ac_cv_lbl_gcc_vers=`$CC -v 2>&1 | \
+ sed -e '/^gcc version /!d' \
+ -e 's/^gcc version //' \
+ -e 's/ .*//' -e 's/^[[[^0-9]]]*//' \
+ -e 's/\..*//'`)
+ AC_MSG_RESULT($ac_cv_lbl_gcc_vers)
+ if test $ac_cv_lbl_gcc_vers -gt 1 ; then
+ $1="-O2"
+ fi
+ fi
+ else
+ AC_MSG_CHECKING(that $CC handles ansi prototypes)
+ AC_CACHE_VAL(ac_cv_lbl_cc_ansi_prototypes,
+ AC_TRY_COMPILE(
+ [#include <sys/types.h>],
+ [int frob(int, char *)],
+ ac_cv_lbl_cc_ansi_prototypes=yes,
+ ac_cv_lbl_cc_ansi_prototypes=no))
+ AC_MSG_RESULT($ac_cv_lbl_cc_ansi_prototypes)
+ if test $ac_cv_lbl_cc_ansi_prototypes = no ; then
+ case "$target_os" in
+
+ hpux*)
+ AC_MSG_CHECKING(for HP-UX ansi compiler ($CC -Aa -D_HPUX_SOURCE))
+ savedcflags="$CFLAGS"
+ CFLAGS="-Aa -D_HPUX_SOURCE $CFLAGS"
+ AC_CACHE_VAL(ac_cv_lbl_cc_hpux_cc_aa,
+ AC_TRY_COMPILE(
+ [#include <sys/types.h>],
+ [int frob(int, char *)],
+ ac_cv_lbl_cc_hpux_cc_aa=yes,
+ ac_cv_lbl_cc_hpux_cc_aa=no))
+ AC_MSG_RESULT($ac_cv_lbl_cc_hpux_cc_aa)
+ if test $ac_cv_lbl_cc_hpux_cc_aa = no ; then
+ AC_MSG_ERROR(see the INSTALL doc for more info)
+ fi
+ CFLAGS="$savedcflags"
+ V_CCOPT="-Aa $V_CCOPT"
+ AC_DEFINE(_HPUX_SOURCE)
+ ;;
+
+ *)
+ AC_MSG_ERROR(see the INSTALL doc for more info)
+ ;;
+ esac
+ fi
+ $2="$$2 -I/usr/local/include"
+ LDFLAGS="$LDFLAGS -L/usr/local/lib"
+
+ case "$target_os" in
+
+ irix*)
+ V_CCOPT="$V_CCOPT -xansi -signed -g3"
+ ;;
+
+ osf*)
+ V_CCOPT="$V_CCOPT -std1 -g3"
+ ;;
+
+ ultrix*)
+ AC_MSG_CHECKING(that Ultrix $CC hacks const in prototypes)
+ AC_CACHE_VAL(ac_cv_lbl_cc_const_proto,
+ AC_TRY_COMPILE(
+ [#include <sys/types.h>],
+ [struct a { int b; };
+ void c(const struct a *)],
+ ac_cv_lbl_cc_const_proto=yes,
+ ac_cv_lbl_cc_const_proto=no))
+ AC_MSG_RESULT($ac_cv_lbl_cc_const_proto)
+ if test $ac_cv_lbl_cc_const_proto = no ; then
+ AC_DEFINE(const,)
+ fi
+ ;;
+ esac
+ fi
+])
+
+dnl
+dnl Use pfopen.c if available and pfopen() not in standard libraries
+dnl Require libpcap
+dnl Look for libpcap in ..
+dnl Use the installed libpcap if there is no local version
+dnl
+dnl usage:
+dnl
+dnl AC_LBL_LIBPCAP(pcapdep, incls)
+dnl
+dnl results:
+dnl
+dnl $1 (pcapdep set)
+dnl $2 (incls appended)
+dnl LIBS
+dnl LBL_LIBS
+dnl
+AC_DEFUN(AC_LBL_LIBPCAP,
+ [AC_REQUIRE([AC_LBL_LIBRARY_NET])
+ dnl
+ dnl save a copy before locating libpcap.a
+ dnl
+ LBL_LIBS="$LIBS"
+ pfopen=/usr/examples/packetfilter/pfopen.c
+ if test -f $pfopen ; then
+ AC_CHECK_FUNCS(pfopen)
+ if test $ac_cv_func_pfopen = "no" ; then
+ AC_MSG_RESULT(Using $pfopen)
+ LIBS="$LIBS $pfopen"
+ fi
+ fi
+ AC_MSG_CHECKING(for local pcap library)
+ libpcap=FAIL
+ lastdir=FAIL
+ places=`ls .. | sed -e 's,/$,,' -e 's,^,../,' | \
+ egrep '/libpcap-[[0-9]]*\.[[0-9]]*(\.[[0-9]]*)?([[ab]][[0-9]]*)?$'`
+ for dir in $places ../libpcap libpcap ; do
+ basedir=`echo $dir | sed -e 's/[[ab]][[0-9]]*$//'`
+ if test $lastdir = $basedir ; then
+ dnl skip alphas when an actual release is present
+ continue;
+ fi
+ lastdir=$dir
+ if test -r $dir/pcap.c ; then
+ libpcap=$dir/libpcap.a
+ d=$dir
+ dnl continue and select the last one that exists
+ fi
+ done
+ if test $libpcap = FAIL ; then
+ AC_MSG_RESULT(not found)
+ AC_CHECK_LIB(pcap, main, libpcap="-lpcap")
+ if test $libpcap = FAIL ; then
+ AC_MSG_ERROR(see the INSTALL doc for more info)
+ fi
+ else
+ $1=$libpcap
+ $2="-I$d $$2"
+ AC_MSG_RESULT($libpcap)
+ fi
+ LIBS="$libpcap $LIBS"
+ case "$target_os" in
+
+ aix*)
+ pseexe="/lib/pse.exp"
+ AC_MSG_CHECKING(for $pseexe)
+ if test -f $pseexe ; then
+ AC_MSG_RESULT(yes)
+ LIBS="$LIBS -I:$pseexe"
+ fi
+ ;;
+ esac])
+
+dnl
+dnl Define RETSIGTYPE and RETSIGVAL
+dnl
+dnl usage:
+dnl
+dnl AC_LBL_TYPE_SIGNAL
+dnl
+dnl results:
+dnl
+dnl RETSIGTYPE (defined)
+dnl RETSIGVAL (defined)
+dnl
+AC_DEFUN(AC_LBL_TYPE_SIGNAL,
+ [AC_BEFORE([$0], [AC_LBL_LIBPCAP])
+ AC_TYPE_SIGNAL
+ if test "$ac_cv_type_signal" = void ; then
+ AC_DEFINE(RETSIGVAL,)
+ else
+ AC_DEFINE(RETSIGVAL,(0))
+ fi
+ case "$target_os" in
+
+ irix*)
+ AC_DEFINE(_BSD_SIGNALS)
+ ;;
+
+ *)
+ dnl prefer sigset() to sigaction()
+ AC_CHECK_FUNCS(sigset)
+ if test $ac_cv_func_sigset = no ; then
+ AC_CHECK_FUNCS(sigaction)
+ fi
+ ;;
+ esac])
+
+dnl
+dnl If using gcc, make sure we have ANSI ioctl definitions
+dnl
+dnl usage:
+dnl
+dnl AC_LBL_FIXINCLUDES
+dnl
+AC_DEFUN(AC_LBL_FIXINCLUDES,
+ [if test "$GCC" = yes ; then
+ AC_MSG_CHECKING(for ANSI ioctl definitions)
+ AC_CACHE_VAL(ac_cv_lbl_gcc_fixincludes,
+ AC_TRY_COMPILE(
+ [/*
+ * This generates a "duplicate case value" when fixincludes
+ * has not be run.
+ */
+# include <sys/types.h>
+# include <sys/time.h>
+# include <sys/ioctl.h>
+# ifdef HAVE_SYS_IOCCOM_H
+# include <sys/ioccom.h>
+# endif],
+ [switch (0) {
+ case _IO('A', 1):;
+ case _IO('B', 1):;
+ }],
+ ac_cv_lbl_gcc_fixincludes=yes,
+ ac_cv_lbl_gcc_fixincludes=no))
+ AC_MSG_RESULT($ac_cv_lbl_gcc_fixincludes)
+ if test $ac_cv_lbl_gcc_fixincludes = no ; then
+ # Don't cache failure
+ unset ac_cv_lbl_gcc_fixincludes
+ AC_MSG_ERROR(see the INSTALL for more info)
+ fi
+ fi])
+
+dnl
+dnl Check for flex, default to lex
+dnl Require flex 2.4 or higher
+dnl Check for bison, default to yacc
+dnl Default to lex/yacc if both flex and bison are not available
+dnl Define the yy prefix string if using flex and bison
+dnl
+dnl usage:
+dnl
+dnl AC_LBL_LEX_AND_YACC(lex, yacc, yyprefix)
+dnl
+dnl results:
+dnl
+dnl $1 (lex set)
+dnl $2 (yacc appended)
+dnl $3 (optional flex and bison -P prefix)
+dnl
+AC_DEFUN(AC_LBL_LEX_AND_YACC,
+ [AC_ARG_WITH(flex, [ --without-flex don't use flex])
+ AC_ARG_WITH(bison, [ --without-bison don't use bison])
+ if test "$with_flex" = no ; then
+ $1=lex
+ else
+ AC_CHECK_PROGS($1, flex, lex)
+ fi
+ if test "$$1" = flex ; then
+ # The -V flag was added in 2.4
+ AC_MSG_CHECKING(for flex 2.4 or higher)
+ AC_CACHE_VAL(ac_cv_lbl_flex_v24,
+ if flex -V >/dev/null 2>&1; then
+ ac_cv_lbl_flex_v24=yes
+ else
+ ac_cv_lbl_flex_v24=no
+ fi)
+ AC_MSG_RESULT($ac_cv_lbl_flex_v24)
+ if test $ac_cv_lbl_flex_v24 = no ; then
+ s="2.4 or higher required"
+ AC_MSG_WARN(ignoring obsolete flex executable ($s))
+ $1=lex
+ fi
+ fi
+ if test "$with_bison" = no ; then
+ $2=yacc
+ else
+ AC_CHECK_PROGS($2, bison, yacc)
+ fi
+ if test "$$2" = bison ; then
+ $2="$$2 -y"
+ fi
+ if test "$$1" != lex -a "$$2" = yacc -o "$$1" = lex -a "$$2" != yacc ; then
+ AC_MSG_WARN(don't have both flex and bison; reverting to lex/yacc)
+ $1=lex
+ $2=yacc
+ fi
+ if test "$$1" = flex -a -n "$3" ; then
+ $1="$$1 -P$3"
+ $2="$$2 -p $3"
+ fi])
+
+dnl
+dnl Checks to see if union wait is used with WEXITSTATUS()
+dnl
+dnl usage:
+dnl
+dnl AC_LBL_UNION_WAIT
+dnl
+dnl results:
+dnl
+dnl DECLWAITSTATUS (defined)
+dnl
+AC_DEFUN(AC_LBL_UNION_WAIT,
+ [AC_MSG_CHECKING(if union wait is used)
+ AC_CACHE_VAL(ac_cv_lbl_union_wait,
+ AC_TRY_COMPILE([
+# include <sys/types.h>
+# include <sys/wait.h>],
+ [int status;
+ u_int i = WEXITSTATUS(status);
+ u_int j = waitpid(0, &status, 0);],
+ ac_cv_lbl_union_wait=no,
+ ac_cv_lbl_union_wait=yes))
+ AC_MSG_RESULT($ac_cv_lbl_union_wait)
+ if test $ac_cv_lbl_union_wait = yes ; then
+ AC_DEFINE(DECLWAITSTATUS,union wait)
+ else
+ AC_DEFINE(DECLWAITSTATUS,int)
+ fi])
+
+dnl
+dnl Checks to see if the sockaddr struct has the 4.4 BSD sa_len member
+dnl
+dnl usage:
+dnl
+dnl AC_LBL_SOCKADDR_SA_LEN
+dnl
+dnl results:
+dnl
+dnl HAVE_SOCKADDR_SA_LEN (defined)
+dnl
+AC_DEFUN(AC_LBL_SOCKADDR_SA_LEN,
+ [AC_MSG_CHECKING(if sockaddr struct has sa_len member)
+ AC_CACHE_VAL(ac_cv_lbl_sockaddr_has_sa_len,
+ AC_TRY_COMPILE([
+# include <sys/types.h>
+# include <sys/socket.h>],
+ [u_int i = sizeof(((struct sockaddr *)0)->sa_len)],
+ ac_cv_lbl_sockaddr_has_sa_len=yes,
+ ac_cv_lbl_sockaddr_has_sa_len=no))
+ AC_MSG_RESULT($ac_cv_lbl_sockaddr_has_sa_len)
+ if test $ac_cv_lbl_sockaddr_has_sa_len = yes ; then
+ AC_DEFINE(HAVE_SOCKADDR_SA_LEN)
+ fi])
+
+dnl
+dnl Checks to see if -R is used
+dnl
+dnl usage:
+dnl
+dnl AC_LBL_HAVE_RUN_PATH
+dnl
+dnl results:
+dnl
+dnl ac_cv_lbl_have_run_path (yes or no)
+dnl
+AC_DEFUN(AC_LBL_HAVE_RUN_PATH,
+ [AC_MSG_CHECKING(for ${CC-cc} -R)
+ AC_CACHE_VAL(ac_cv_lbl_have_run_path,
+ [echo 'main(){}' > conftest.c
+ ${CC-cc} -o conftest conftest.c -R/a1/b2/c3 >conftest.out 2>&1
+ if test ! -s conftest.out ; then
+ ac_cv_lbl_have_run_path=yes
+ else
+ ac_cv_lbl_have_run_path=no
+ fi
+ rm -f conftest*])
+ AC_MSG_RESULT($ac_cv_lbl_have_run_path)
+ ])
+
+dnl
+dnl Due to the stupid way it's implemented, AC_CHECK_TYPE is nearly useless.
+dnl
+dnl usage:
+dnl
+dnl AC_LBL_CHECK_TYPE
+dnl
+dnl results:
+dnl
+dnl int32_t (defined)
+dnl u_int32_t (defined)
+dnl
+AC_DEFUN(AC_LBL_CHECK_TYPE,
+ [AC_MSG_CHECKING(for $1 using $CC)
+ AC_CACHE_VAL(ac_cv_lbl_have_$1,
+ AC_TRY_COMPILE([
+# include "confdefs.h"
+# include <sys/types.h>
+# if STDC_HEADERS
+# include <stdlib.h>
+# include <stddef.h>
+# endif],
+ [$1 i],
+ ac_cv_lbl_have_$1=yes,
+ ac_cv_lbl_have_$1=no))
+ AC_MSG_RESULT($ac_cv_lbl_have_$1)
+ if test $ac_cv_lbl_have_$1 = no ; then
+ AC_DEFINE($1, $2)
+ fi])
+
+dnl
+dnl Checks to see if unaligned memory accesses fail
+dnl
+dnl usage:
+dnl
+dnl AC_LBL_UNALIGNED_ACCESS
+dnl
+dnl results:
+dnl
+dnl LBL_ALIGN (DEFINED)
+dnl
+AC_DEFUN(AC_LBL_UNALIGNED_ACCESS,
+ [AC_MSG_CHECKING(if unaligned accesses fail)
+ AC_CACHE_VAL(ac_cv_lbl_unaligned_fail,
+ [case "$target_cpu" in
+
+ alpha|hp*|mips|sparc)
+ ac_cv_lbl_unaligned_fail=yes
+ ;;
+
+ *)
+ cat >conftest.c <<EOF
+# include <sys/types.h>
+# include <sys/wait.h>
+# include <stdio.h>
+ unsigned char a[[5]] = { 1, 2, 3, 4, 5 };
+ main() {
+ unsigned int i;
+ pid_t pid;
+ int status;
+ /* avoid "core dumped" message */
+ pid = fork();
+ if (pid < 0)
+ exit(2);
+ if (pid > 0) {
+ /* parent */
+ pid = waitpid(pid, &status, 0);
+ if (pid < 0)
+ exit(3);
+ exit(!WIFEXITED(status));
+ }
+ /* child */
+ i = *(unsigned int *)&a[[1]];
+ printf("%d\n", i);
+ exit(0);
+ }
+EOF
+ ${CC-cc} -o conftest $CFLAGS $CPPFLAGS $LDFLAGS \
+ conftest.c $LIBS >/dev/null 2>&1
+ if test ! -x conftest ; then
+ dnl failed to compile for some reason
+ ac_cv_lbl_unaligned_fail=yes
+ else
+ ./conftest >conftest.out
+ if test ! -s conftest.out ; then
+ ac_cv_lbl_unaligned_fail=yes
+ else
+ ac_cv_lbl_unaligned_fail=no
+ fi
+ fi
+ rm -f conftest* core core.conftest
+ ;;
+ esac])
+ AC_MSG_RESULT($ac_cv_lbl_unaligned_fail)
+ if test $ac_cv_lbl_unaligned_fail = yes ; then
+ AC_DEFINE(LBL_ALIGN)
+ fi])
+
+dnl
+dnl If using gcc and the file .devel exists:
+dnl Compile with -g (if supported) and -Wall
+dnl If using gcc 2, do extra prototype checking
+dnl If an os prototype include exists, symlink os-proto.h to it
+dnl
+dnl usage:
+dnl
+dnl AC_LBL_DEVEL(copt)
+dnl
+dnl results:
+dnl
+dnl $1 (copt appended)
+dnl HAVE_OS_PROTO_H (defined)
+dnl os-proto.h (symlinked)
+dnl
+AC_DEFUN(AC_LBL_DEVEL,
+ [rm -f os-proto.h
+ if test "${LBL_CFLAGS+set}" = set; then
+ $1="$$1 ${LBL_CFLAGS}"
+ fi
+ if test -f .devel ; then
+ if test "$GCC" = yes ; then
+ if test "${LBL_CFLAGS+set}" != set; then
+ if test "$ac_cv_prog_cc_g" = yes ; then
+ $1="-g $$1"
+ fi
+ $1="$$1 -Wall"
+ if test $ac_cv_lbl_gcc_vers -gt 1 ; then
+ $1="$$1 -Wmissing-prototypes -Wstrict-prototypes"
+ fi
+ fi
+ else
+ case "$target_os" in
+
+ irix6*)
+ V_CCOPT="$V_CCOPT -n32"
+ ;;
+
+ *)
+ ;;
+ esac
+ fi
+ os=`echo $target_os | sed -e 's/\([[0-9]][[0-9]]*\)[[^0-9]].*$/\1/'`
+ name="lbl/os-$os.h"
+ if test -f $name ; then
+ ln -s $name os-proto.h
+ AC_DEFINE(HAVE_OS_PROTO_H)
+ else
+ AC_MSG_WARN(can't find $name)
+ fi
+ fi])
+
+dnl
+dnl Improved version of AC_CHECK_LIB
+dnl
+dnl Thanks to John Hawkinson (jhawk@mit.edu)
+dnl
+dnl usage:
+dnl
+dnl AC_LBL_CHECK_LIB(LIBRARY, FUNCTION [, ACTION-IF-FOUND [,
+dnl ACTION-IF-NOT-FOUND [, OTHER-LIBRARIES]]])
+dnl
+dnl results:
+dnl
+dnl LIBS
+dnl
+
+define(AC_LBL_CHECK_LIB,
+[AC_MSG_CHECKING([for $2 in -l$1])
+dnl Use a cache variable name containing both the library and function name,
+dnl because the test really is for library $1 defining function $2, not
+dnl just for library $1. Separate tests with the same $1 and different $2's
+dnl may have different results.
+ac_lib_var=`echo $1['_']$2['_']$5 | sed 'y%./+- %__p__%'`
+AC_CACHE_VAL(ac_cv_lbl_lib_$ac_lib_var,
+[ac_save_LIBS="$LIBS"
+LIBS="-l$1 $5 $LIBS"
+AC_TRY_LINK(dnl
+ifelse([$2], [main], , dnl Avoid conflicting decl of main.
+[/* Override any gcc2 internal prototype to avoid an error. */
+]ifelse(AC_LANG, CPLUSPLUS, [#ifdef __cplusplus
+extern "C"
+#endif
+])dnl
+[/* We use char because int might match the return type of a gcc2
+ builtin and then its argument prototype would still apply. */
+char $2();
+]),
+ [$2()],
+ eval "ac_cv_lbl_lib_$ac_lib_var=yes",
+ eval "ac_cv_lbl_lib_$ac_lib_var=no")
+LIBS="$ac_save_LIBS"
+])dnl
+if eval "test \"`echo '$ac_cv_lbl_lib_'$ac_lib_var`\" = yes"; then
+ AC_MSG_RESULT(yes)
+ ifelse([$3], ,
+[changequote(, )dnl
+ ac_tr_lib=HAVE_LIB`echo $1 | sed -e 's/[^a-zA-Z0-9_]/_/g' \
+ -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/'`
+changequote([, ])dnl
+ AC_DEFINE_UNQUOTED($ac_tr_lib)
+ LIBS="-l$1 $LIBS"
+], [$3])
+else
+ AC_MSG_RESULT(no)
+ifelse([$4], , , [$4
+])dnl
+fi
+])
+
+dnl
+dnl AC_LBL_LIBRARY_NET
+dnl
+dnl This test is for network applications that need socket() and
+dnl gethostbyname() -ish functions. Under Solaris, those applications
+dnl need to link with "-lsocket -lnsl". Under IRIX, they need to link
+dnl with "-lnsl" but should *not* link with "-lsocket" because
+dnl libsocket.a breaks a number of things (for instance:
+dnl gethostbyname() under IRIX 5.2, and snoop sockets under most
+dnl versions of IRIX).
+dnl
+dnl Unfortunately, many application developers are not aware of this,
+dnl and mistakenly write tests that cause -lsocket to be used under
+dnl IRIX. It is also easy to write tests that cause -lnsl to be used
+dnl under operating systems where neither are necessary (or useful),
+dnl such as SunOS 4.1.4, which uses -lnsl for TLI.
+dnl
+dnl This test exists so that every application developer does not test
+dnl this in a different, and subtly broken fashion.
+
+dnl It has been argued that this test should be broken up into two
+dnl seperate tests, one for the resolver libraries, and one for the
+dnl libraries necessary for using Sockets API. Unfortunately, the two
+dnl are carefully intertwined and allowing the autoconf user to use
+dnl them independantly potentially results in unfortunate ordering
+dnl dependancies -- as such, such component macros would have to
+dnl carefully use indirection and be aware if the other components were
+dnl executed. Since other autoconf macros do not go to this trouble,
+dnl and almost no applications use sockets without the resolver, this
+dnl complexity has not been implemented.
+dnl
+dnl The check for libresolv is in case you are attempting to link
+dnl statically and happen to have a libresolv.a lying around (and no
+dnl libnsl.a).
+dnl
+AC_DEFUN(AC_LBL_LIBRARY_NET, [
+ # Most operating systems have gethostbyname() in the default searched
+ # libraries (i.e. libc):
+ AC_CHECK_FUNC(gethostbyname, ,
+ # Some OSes (eg. Solaris) place it in libnsl:
+ AC_LBL_CHECK_LIB(nsl, gethostbyname, ,
+ # Some strange OSes (SINIX) have it in libsocket:
+ AC_LBL_CHECK_LIB(socket, gethostbyname, ,
+ # Unfortunately libsocket sometimes depends on libnsl.
+ # AC_CHECK_LIB's API is essentially broken so the
+ # following ugliness is necessary:
+ AC_LBL_CHECK_LIB(socket, gethostbyname,
+ LIBS="-lsocket -lnsl $LIBS",
+ AC_CHECK_LIB(resolv, gethostbyname),
+ -lnsl))))
+ AC_CHECK_FUNC(socket, , AC_CHECK_LIB(socket, socket, ,
+ AC_LBL_CHECK_LIB(socket, socket, LIBS="-lsocket -lnsl $LIBS", ,
+ -lnsl)))
+ # DLPI needs putmsg under HPUX so test for -lstr while we're at it
+ AC_CHECK_LIB(str, putmsg)
+ ])
--- /dev/null
+/*-
+ * Copyright (c) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997
+ * The Regents of the University of California. All rights reserved.
+ *
+ * This code is derived from the Stanford/CMU enet packet filter,
+ * (net/enet.c) distributed as part of 4.3BSD, and code contributed
+ * to Berkeley by Steven McCanne and Van Jacobson both of Lawrence
+ * Berkeley Laboratory.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#)bpf.h 7.1 (Berkeley) 5/7/91
+ *
+ * @(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/bpf/net/bpf.h,v 1.1 1999/08/26 10:07:57 johana Exp $ (LBL)
+ */
+
+#ifndef BPF_MAJOR_VERSION
+
+/* BSD style release date */
+#define BPF_RELEASE 199606
+
+typedef int bpf_int32;
+typedef u_int bpf_u_int32;
+
+/*
+ * Alignment macros. BPF_WORDALIGN rounds up to the next
+ * even multiple of BPF_ALIGNMENT.
+ */
+#define BPF_ALIGNMENT sizeof(bpf_int32)
+#define BPF_WORDALIGN(x) (((x)+(BPF_ALIGNMENT-1))&~(BPF_ALIGNMENT-1))
+
+#define BPF_MAXINSNS 512
+#define BPF_MAXBUFSIZE 0x8000
+#define BPF_MINBUFSIZE 32
+
+/*
+ * Structure for BIOCSETF.
+ */
+struct bpf_program {
+ u_int bf_len;
+ struct bpf_insn *bf_insns;
+};
+
+/*
+ * Struct returned by BIOCGSTATS.
+ */
+struct bpf_stat {
+ u_int bs_recv; /* number of packets received */
+ u_int bs_drop; /* number of packets dropped */
+};
+
+/*
+ * Struct return by BIOCVERSION. This represents the version number of
+ * the filter language described by the instruction encodings below.
+ * bpf understands a program iff kernel_major == filter_major &&
+ * kernel_minor >= filter_minor, that is, if the value returned by the
+ * running kernel has the same major number and a minor number equal
+ * equal to or less than the filter being downloaded. Otherwise, the
+ * results are undefined, meaning an error may be returned or packets
+ * may be accepted haphazardly.
+ * It has nothing to do with the source code version.
+ */
+struct bpf_version {
+ u_short bv_major;
+ u_short bv_minor;
+};
+/* Current version number of filter architecture. */
+#define BPF_MAJOR_VERSION 1
+#define BPF_MINOR_VERSION 1
+
+/*
+ * BPF ioctls
+ *
+ * The first set is for compatibility with Sun's pcc style
+ * header files. If your using gcc, we assume that you
+ * have run fixincludes so the latter set should work.
+ */
+#if (defined(sun) || defined(ibm032)) && !defined(__GNUC__)
+#define BIOCGBLEN _IOR(B,102, u_int)
+#define BIOCSBLEN _IOWR(B,102, u_int)
+#define BIOCSETF _IOW(B,103, struct bpf_program)
+#define BIOCFLUSH _IO(B,104)
+#define BIOCPROMISC _IO(B,105)
+#define BIOCGDLT _IOR(B,106, u_int)
+#define BIOCGETIF _IOR(B,107, struct ifreq)
+#define BIOCSETIF _IOW(B,108, struct ifreq)
+#define BIOCSRTIMEOUT _IOW(B,109, struct timeval)
+#define BIOCGRTIMEOUT _IOR(B,110, struct timeval)
+#define BIOCGSTATS _IOR(B,111, struct bpf_stat)
+#define BIOCIMMEDIATE _IOW(B,112, u_int)
+#define BIOCVERSION _IOR(B,113, struct bpf_version)
+#define BIOCSTCPF _IOW(B,114, struct bpf_program)
+#define BIOCSUDPF _IOW(B,115, struct bpf_program)
+#else
+#define BIOCGBLEN _IOR('B',102, u_int)
+#define BIOCSBLEN _IOWR('B',102, u_int)
+#define BIOCSETF _IOW('B',103, struct bpf_program)
+#define BIOCFLUSH _IO('B',104)
+#define BIOCPROMISC _IO('B',105)
+#define BIOCGDLT _IOR('B',106, u_int)
+#define BIOCGETIF _IOR('B',107, struct ifreq)
+#define BIOCSETIF _IOW('B',108, struct ifreq)
+#define BIOCSRTIMEOUT _IOW('B',109, struct timeval)
+#define BIOCGRTIMEOUT _IOR('B',110, struct timeval)
+#define BIOCGSTATS _IOR('B',111, struct bpf_stat)
+#define BIOCIMMEDIATE _IOW('B',112, u_int)
+#define BIOCVERSION _IOR('B',113, struct bpf_version)
+#define BIOCSTCPF _IOW('B',114, struct bpf_program)
+#define BIOCSUDPF _IOW('B',115, struct bpf_program)
+#endif
+
+/*
+ * Structure prepended to each packet.
+ */
+struct bpf_hdr {
+ struct timeval bh_tstamp; /* time stamp */
+ bpf_u_int32 bh_caplen; /* length of captured portion */
+ bpf_u_int32 bh_datalen; /* original length of packet */
+ u_short bh_hdrlen; /* length of bpf header (this struct
+ plus alignment padding) */
+};
+/*
+ * Because the structure above is not a multiple of 4 bytes, some compilers
+ * will insist on inserting padding; hence, sizeof(struct bpf_hdr) won't work.
+ * Only the kernel needs to know about it; applications use bh_hdrlen.
+ */
+#ifdef KERNEL
+#define SIZEOF_BPF_HDR 18
+#endif
+
+/*
+ * Data-link level type codes.
+ */
+#define DLT_NULL 0 /* no link-layer encapsulation */
+#define DLT_EN10MB 1 /* Ethernet (10Mb) */
+#define DLT_EN3MB 2 /* Experimental Ethernet (3Mb) */
+#define DLT_AX25 3 /* Amateur Radio AX.25 */
+#define DLT_PRONET 4 /* Proteon ProNET Token Ring */
+#define DLT_CHAOS 5 /* Chaos */
+#define DLT_IEEE802 6 /* IEEE 802 Networks */
+#define DLT_ARCNET 7 /* ARCNET */
+#define DLT_SLIP 8 /* Serial Line IP */
+#define DLT_PPP 9 /* Point-to-point Protocol */
+#define DLT_FDDI 10 /* FDDI */
+#define DLT_ATM_RFC1483 11 /* LLC/SNAP encapsulated atm */
+#define DLT_RAW 12 /* raw IP */
+#define DLT_SLIP_BSDOS 13 /* BSD/OS Serial Line IP */
+#define DLT_PPP_BSDOS 14 /* BSD/OS Point-to-point Protocol */
+
+/*
+ * The instruction encondings.
+ */
+/* instruction classes */
+#define BPF_CLASS(code) ((code) & 0x07)
+#define BPF_LD 0x00
+#define BPF_LDX 0x01
+#define BPF_ST 0x02
+#define BPF_STX 0x03
+#define BPF_ALU 0x04
+#define BPF_JMP 0x05
+#define BPF_RET 0x06
+#define BPF_MISC 0x07
+
+/* ld/ldx fields */
+#define BPF_SIZE(code) ((code) & 0x18)
+#define BPF_W 0x00
+#define BPF_H 0x08
+#define BPF_B 0x10
+#define BPF_MODE(code) ((code) & 0xe0)
+#define BPF_IMM 0x00
+#define BPF_ABS 0x20
+#define BPF_IND 0x40
+#define BPF_MEM 0x60
+#define BPF_LEN 0x80
+#define BPF_MSH 0xa0
+
+/* alu/jmp fields */
+#define BPF_OP(code) ((code) & 0xf0)
+#define BPF_ADD 0x00
+#define BPF_SUB 0x10
+#define BPF_MUL 0x20
+#define BPF_DIV 0x30
+#define BPF_OR 0x40
+#define BPF_AND 0x50
+#define BPF_LSH 0x60
+#define BPF_RSH 0x70
+#define BPF_NEG 0x80
+#define BPF_JA 0x00
+#define BPF_JEQ 0x10
+#define BPF_JGT 0x20
+#define BPF_JGE 0x30
+#define BPF_JSET 0x40
+#define BPF_SRC(code) ((code) & 0x08)
+#define BPF_K 0x00
+#define BPF_X 0x08
+
+/* ret - BPF_K and BPF_X also apply */
+#define BPF_RVAL(code) ((code) & 0x18)
+#define BPF_A 0x10
+
+/* misc */
+#define BPF_MISCOP(code) ((code) & 0xf8)
+#define BPF_TAX 0x00
+#define BPF_TXA 0x80
+
+/*
+ * The instruction data structure.
+ */
+struct bpf_insn {
+ u_short code;
+ u_char jt;
+ u_char jf;
+ bpf_int32 k;
+};
+
+/*
+ * Macros for insn array initializers.
+ */
+#define BPF_STMT(code, k) { (u_short)(code), 0, 0, k }
+#define BPF_JUMP(code, k, jt, jf) { (u_short)(code), jt, jf, k }
+
+#ifdef KERNEL
+extern u_int bpf_filter();
+extern void bpfattach();
+extern void bpf_tap();
+extern void bpf_mtap();
+#else
+#if __STDC__
+extern u_int bpf_filter(struct bpf_insn *, u_char *, u_int, u_int);
+#endif
+#endif
+
+/*
+ * Number of scratch memory words (for BPF_LD|BPF_MEM and BPF_ST).
+ */
+#define BPF_MEMWORDS 16
+
+#endif
--- /dev/null
+/*-
+ * Copyright (c) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997
+ * The Regents of the University of California. All rights reserved.
+ *
+ * This code is derived from the Stanford/CMU enet packet filter,
+ * (net/enet.c) distributed as part of 4.3BSD, and code contributed
+ * to Berkeley by Steven McCanne and Van Jacobson both of Lawrence
+ * Berkeley Laboratory.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#)bpf.c 7.5 (Berkeley) 7/15/91
+ */
+
+#if !(defined(lint) || defined(KERNEL))
+static const char rcsid[] =
+ "@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/bpf/net/bpf_filter.c,v 1.1 1999/08/26 10:07:57 johana Exp $ (LBL)";
+#endif
+
+#include <sys/param.h>
+#include <sys/types.h>
+#include <sys/time.h>
+#include <net/bpf.h>
+
+#ifndef KERNEL
+#include <stdlib.h>
+#endif
+
+#define int32 bpf_int32
+#define u_int32 bpf_u_int32
+
+#ifndef LBL_ALIGN
+#if defined(sparc) || defined(mips) || defined(ibm032) || \
+ defined(__alpha) || defined(__hpux)
+#define LBL_ALIGN
+#endif
+#endif
+
+#ifndef LBL_ALIGN
+#include <netinet/in.h>
+
+#define EXTRACT_SHORT(p) ((u_short)ntohs(*(u_short *)p))
+#define EXTRACT_LONG(p) (ntohl(*(u_int32 *)p))
+#else
+#define EXTRACT_SHORT(p)\
+ ((u_short)\
+ ((u_short)*((u_char *)p+0)<<8|\
+ (u_short)*((u_char *)p+1)<<0))
+#define EXTRACT_LONG(p)\
+ ((u_int32)*((u_char *)p+0)<<24|\
+ (u_int32)*((u_char *)p+1)<<16|\
+ (u_int32)*((u_char *)p+2)<<8|\
+ (u_int32)*((u_char *)p+3)<<0)
+#endif
+
+#ifdef KERNEL
+#include <sys/mbuf.h>
+#define MINDEX(len, m, k) \
+{ \
+ len = m->m_len; \
+ while (k >= len) { \
+ k -= len; \
+ m = m->m_next; \
+ if (m == 0) \
+ return 0; \
+ len = m->m_len; \
+ } \
+}
+
+static int
+m_xword(m, k, err)
+ register struct mbuf *m;
+ register int k, *err;
+{
+ register int len;
+ register u_char *cp, *np;
+ register struct mbuf *m0;
+
+ MINDEX(len, m, k);
+ cp = mtod(m, u_char *) + k;
+ if (len - k >= 4) {
+ *err = 0;
+ return EXTRACT_LONG(cp);
+ }
+ m0 = m->m_next;
+ if (m0 == 0 || m0->m_len + len - k < 4)
+ goto bad;
+ *err = 0;
+ np = mtod(m0, u_char *);
+ switch (len - k) {
+
+ case 1:
+ return (cp[0] << 24) | (np[0] << 16) | (np[1] << 8) | np[2];
+
+ case 2:
+ return (cp[0] << 24) | (cp[1] << 16) | (np[0] << 8) | np[1];
+
+ default:
+ return (cp[0] << 24) | (cp[1] << 16) | (cp[2] << 8) | np[0];
+ }
+ bad:
+ *err = 1;
+ return 0;
+}
+
+static int
+m_xhalf(m, k, err)
+ register struct mbuf *m;
+ register int k, *err;
+{
+ register int len;
+ register u_char *cp;
+ register struct mbuf *m0;
+
+ MINDEX(len, m, k);
+ cp = mtod(m, u_char *) + k;
+ if (len - k >= 2) {
+ *err = 0;
+ return EXTRACT_SHORT(cp);
+ }
+ m0 = m->m_next;
+ if (m0 == 0)
+ goto bad;
+ *err = 0;
+ return (cp[0] << 8) | mtod(m0, u_char *)[0];
+ bad:
+ *err = 1;
+ return 0;
+}
+#endif
+
+/*
+ * Execute the filter program starting at pc on the packet p
+ * wirelen is the length of the original packet
+ * buflen is the amount of data present
+ */
+u_int
+bpf_filter(pc, p, wirelen, buflen)
+ register struct bpf_insn *pc;
+ register u_char *p;
+ u_int wirelen;
+ register u_int buflen;
+{
+ register u_int32 A, X;
+ register int k;
+ int32 mem[BPF_MEMWORDS];
+
+ if (pc == 0)
+ /*
+ * No filter means accept all.
+ */
+ return (u_int)-1;
+ A = 0;
+ X = 0;
+ --pc;
+ while (1) {
+ ++pc;
+ switch (pc->code) {
+
+ default:
+#ifdef KERNEL
+ return 0;
+#else
+ abort();
+#endif
+ case BPF_RET|BPF_K:
+ return (u_int)pc->k;
+
+ case BPF_RET|BPF_A:
+ return (u_int)A;
+
+ case BPF_LD|BPF_W|BPF_ABS:
+ k = pc->k;
+ if (k + sizeof(int32) > buflen) {
+#ifdef KERNEL
+ int merr;
+
+ if (buflen != 0)
+ return 0;
+ A = m_xword((struct mbuf *)p, k, &merr);
+ if (merr != 0)
+ return 0;
+ continue;
+#else
+ return 0;
+#endif
+ }
+ A = EXTRACT_LONG(&p[k]);
+ continue;
+
+ case BPF_LD|BPF_H|BPF_ABS:
+ k = pc->k;
+ if (k + sizeof(short) > buflen) {
+#ifdef KERNEL
+ int merr;
+
+ if (buflen != 0)
+ return 0;
+ A = m_xhalf((struct mbuf *)p, k, &merr);
+ continue;
+#else
+ return 0;
+#endif
+ }
+ A = EXTRACT_SHORT(&p[k]);
+ continue;
+
+ case BPF_LD|BPF_B|BPF_ABS:
+ k = pc->k;
+ if (k >= buflen) {
+#ifdef KERNEL
+ register struct mbuf *m;
+ register int len;
+
+ if (buflen != 0)
+ return 0;
+ m = (struct mbuf *)p;
+ MINDEX(len, m, k);
+ A = mtod(m, u_char *)[k];
+ continue;
+#else
+ return 0;
+#endif
+ }
+ A = p[k];
+ continue;
+
+ case BPF_LD|BPF_W|BPF_LEN:
+ A = wirelen;
+ continue;
+
+ case BPF_LDX|BPF_W|BPF_LEN:
+ X = wirelen;
+ continue;
+
+ case BPF_LD|BPF_W|BPF_IND:
+ k = X + pc->k;
+ if (k + sizeof(int32) > buflen) {
+#ifdef KERNEL
+ int merr;
+
+ if (buflen != 0)
+ return 0;
+ A = m_xword((struct mbuf *)p, k, &merr);
+ if (merr != 0)
+ return 0;
+ continue;
+#else
+ return 0;
+#endif
+ }
+ A = EXTRACT_LONG(&p[k]);
+ continue;
+
+ case BPF_LD|BPF_H|BPF_IND:
+ k = X + pc->k;
+ if (k + sizeof(short) > buflen) {
+#ifdef KERNEL
+ int merr;
+
+ if (buflen != 0)
+ return 0;
+ A = m_xhalf((struct mbuf *)p, k, &merr);
+ if (merr != 0)
+ return 0;
+ continue;
+#else
+ return 0;
+#endif
+ }
+ A = EXTRACT_SHORT(&p[k]);
+ continue;
+
+ case BPF_LD|BPF_B|BPF_IND:
+ k = X + pc->k;
+ if (k >= buflen) {
+#ifdef KERNEL
+ register struct mbuf *m;
+ register int len;
+
+ if (buflen != 0)
+ return 0;
+ m = (struct mbuf *)p;
+ MINDEX(len, m, k);
+ A = mtod(m, u_char *)[k];
+ continue;
+#else
+ return 0;
+#endif
+ }
+ A = p[k];
+ continue;
+
+ case BPF_LDX|BPF_MSH|BPF_B:
+ k = pc->k;
+ if (k >= buflen) {
+#ifdef KERNEL
+ register struct mbuf *m;
+ register int len;
+
+ if (buflen != 0)
+ return 0;
+ m = (struct mbuf *)p;
+ MINDEX(len, m, k);
+ X = (mtod(m, char *)[k] & 0xf) << 2;
+ continue;
+#else
+ return 0;
+#endif
+ }
+ X = (p[pc->k] & 0xf) << 2;
+ continue;
+
+ case BPF_LD|BPF_IMM:
+ A = pc->k;
+ continue;
+
+ case BPF_LDX|BPF_IMM:
+ X = pc->k;
+ continue;
+
+ case BPF_LD|BPF_MEM:
+ A = mem[pc->k];
+ continue;
+
+ case BPF_LDX|BPF_MEM:
+ X = mem[pc->k];
+ continue;
+
+ case BPF_ST:
+ mem[pc->k] = A;
+ continue;
+
+ case BPF_STX:
+ mem[pc->k] = X;
+ continue;
+
+ case BPF_JMP|BPF_JA:
+ pc += pc->k;
+ continue;
+
+ case BPF_JMP|BPF_JGT|BPF_K:
+ pc += (A > pc->k) ? pc->jt : pc->jf;
+ continue;
+
+ case BPF_JMP|BPF_JGE|BPF_K:
+ pc += (A >= pc->k) ? pc->jt : pc->jf;
+ continue;
+
+ case BPF_JMP|BPF_JEQ|BPF_K:
+ pc += (A == pc->k) ? pc->jt : pc->jf;
+ continue;
+
+ case BPF_JMP|BPF_JSET|BPF_K:
+ pc += (A & pc->k) ? pc->jt : pc->jf;
+ continue;
+
+ case BPF_JMP|BPF_JGT|BPF_X:
+ pc += (A > X) ? pc->jt : pc->jf;
+ continue;
+
+ case BPF_JMP|BPF_JGE|BPF_X:
+ pc += (A >= X) ? pc->jt : pc->jf;
+ continue;
+
+ case BPF_JMP|BPF_JEQ|BPF_X:
+ pc += (A == X) ? pc->jt : pc->jf;
+ continue;
+
+ case BPF_JMP|BPF_JSET|BPF_X:
+ pc += (A & X) ? pc->jt : pc->jf;
+ continue;
+
+ case BPF_ALU|BPF_ADD|BPF_X:
+ A += X;
+ continue;
+
+ case BPF_ALU|BPF_SUB|BPF_X:
+ A -= X;
+ continue;
+
+ case BPF_ALU|BPF_MUL|BPF_X:
+ A *= X;
+ continue;
+
+ case BPF_ALU|BPF_DIV|BPF_X:
+ if (X == 0)
+ return 0;
+ A /= X;
+ continue;
+
+ case BPF_ALU|BPF_AND|BPF_X:
+ A &= X;
+ continue;
+
+ case BPF_ALU|BPF_OR|BPF_X:
+ A |= X;
+ continue;
+
+ case BPF_ALU|BPF_LSH|BPF_X:
+ A <<= X;
+ continue;
+
+ case BPF_ALU|BPF_RSH|BPF_X:
+ A >>= X;
+ continue;
+
+ case BPF_ALU|BPF_ADD|BPF_K:
+ A += pc->k;
+ continue;
+
+ case BPF_ALU|BPF_SUB|BPF_K:
+ A -= pc->k;
+ continue;
+
+ case BPF_ALU|BPF_MUL|BPF_K:
+ A *= pc->k;
+ continue;
+
+ case BPF_ALU|BPF_DIV|BPF_K:
+ A /= pc->k;
+ continue;
+
+ case BPF_ALU|BPF_AND|BPF_K:
+ A &= pc->k;
+ continue;
+
+ case BPF_ALU|BPF_OR|BPF_K:
+ A |= pc->k;
+ continue;
+
+ case BPF_ALU|BPF_LSH|BPF_K:
+ A <<= pc->k;
+ continue;
+
+ case BPF_ALU|BPF_RSH|BPF_K:
+ A >>= pc->k;
+ continue;
+
+ case BPF_ALU|BPF_NEG:
+ A = -A;
+ continue;
+
+ case BPF_MISC|BPF_TAX:
+ X = A;
+ continue;
+
+ case BPF_MISC|BPF_TXA:
+ A = X;
+ continue;
+ }
+ }
+}
+
+#ifdef KERNEL
+/*
+ * Return true if the 'fcode' is a valid filter program.
+ * The constraints are that each jump be forward and to a valid
+ * code. The code must terminate with either an accept or reject.
+ * 'valid' is an array for use by the routine (it must be at least
+ * 'len' bytes long).
+ *
+ * The kernel needs to be able to verify an application's filter code.
+ * Otherwise, a bogus program could easily crash the system.
+ */
+int
+bpf_validate(f, len)
+ struct bpf_insn *f;
+ int len;
+{
+ register int i;
+ register struct bpf_insn *p;
+
+ for (i = 0; i < len; ++i) {
+ /*
+ * Check that that jumps are forward, and within
+ * the code block.
+ */
+ p = &f[i];
+ if (BPF_CLASS(p->code) == BPF_JMP) {
+ register int from = i + 1;
+
+ if (BPF_OP(p->code) == BPF_JA) {
+ if (from + p->k >= (unsigned)len)
+ return 0;
+ }
+ else if (from + p->jt >= len || from + p->jf >= len)
+ return 0;
+ }
+ /*
+ * Check that memory operations use valid addresses.
+ */
+ if ((BPF_CLASS(p->code) == BPF_ST ||
+ (BPF_CLASS(p->code) == BPF_LD &&
+ (p->code & 0xe0) == BPF_MEM)) &&
+ (p->k >= BPF_MEMWORDS || p->k < 0))
+ return 0;
+ /*
+ * Check for constant division by 0.
+ */
+ if (p->code == (BPF_ALU|BPF_DIV|BPF_K) && p->k == 0)
+ return 0;
+ }
+ return BPF_CLASS(f[len - 1].code) == BPF_RET;
+}
+#endif
--- /dev/null
+bpf/net/bpf_filter.c
\ No newline at end of file
--- /dev/null
+/*
+ * Copyright (c) 1990, 1991, 1992, 1994, 1995, 1996
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ */
+
+#ifndef lint
+static const char rcsid[] =
+ "@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/bpf_image.c,v 1.1 1999/08/26 10:05:20 johana Exp $ (LBL)";
+#endif
+
+#include <sys/types.h>
+#include <sys/time.h>
+
+#include <stdio.h>
+#include <string.h>
+
+#include "pcap-int.h"
+
+#include "gnuc.h"
+#ifdef HAVE_OS_PROTO_H
+#include "os-proto.h"
+#endif
+
+char *
+bpf_image(p, n)
+ struct bpf_insn *p;
+ int n;
+{
+ int v;
+ char *fmt, *op;
+ static char image[256];
+ char operand[64];
+
+ v = p->k;
+ switch (p->code) {
+
+ default:
+ op = "unimp";
+ fmt = "0x%x";
+ v = p->code;
+ break;
+
+ case BPF_RET|BPF_K:
+ op = "ret";
+ fmt = "#%d";
+ break;
+
+ case BPF_RET|BPF_A:
+ op = "ret";
+ fmt = "";
+ break;
+
+ case BPF_LD|BPF_W|BPF_ABS:
+ op = "ld";
+ fmt = "[%d]";
+ break;
+
+ case BPF_LD|BPF_H|BPF_ABS:
+ op = "ldh";
+ fmt = "[%d]";
+ break;
+
+ case BPF_LD|BPF_B|BPF_ABS:
+ op = "ldb";
+ fmt = "[%d]";
+ break;
+
+ case BPF_LD|BPF_W|BPF_LEN:
+ op = "ld";
+ fmt = "#pktlen";
+ break;
+
+ case BPF_LD|BPF_W|BPF_IND:
+ op = "ld";
+ fmt = "[x + %d]";
+ break;
+
+ case BPF_LD|BPF_H|BPF_IND:
+ op = "ldh";
+ fmt = "[x + %d]";
+ break;
+
+ case BPF_LD|BPF_B|BPF_IND:
+ op = "ldb";
+ fmt = "[x + %d]";
+ break;
+
+ case BPF_LD|BPF_IMM:
+ op = "ld";
+ fmt = "#0x%x";
+ break;
+
+ case BPF_LDX|BPF_IMM:
+ op = "ldx";
+ fmt = "#0x%x";
+ break;
+
+ case BPF_LDX|BPF_MSH|BPF_B:
+ op = "ldxb";
+ fmt = "4*([%d]&0xf)";
+ break;
+
+ case BPF_LD|BPF_MEM:
+ op = "ld";
+ fmt = "M[%d]";
+ break;
+
+ case BPF_LDX|BPF_MEM:
+ op = "ldx";
+ fmt = "M[%d]";
+ break;
+
+ case BPF_ST:
+ op = "st";
+ fmt = "M[%d]";
+ break;
+
+ case BPF_STX:
+ op = "stx";
+ fmt = "M[%d]";
+ break;
+
+ case BPF_JMP|BPF_JA:
+ op = "ja";
+ fmt = "%d";
+ v = n + 1 + p->k;
+ break;
+
+ case BPF_JMP|BPF_JGT|BPF_K:
+ op = "jgt";
+ fmt = "#0x%x";
+ break;
+
+ case BPF_JMP|BPF_JGE|BPF_K:
+ op = "jge";
+ fmt = "#0x%x";
+ break;
+
+ case BPF_JMP|BPF_JEQ|BPF_K:
+ op = "jeq";
+ fmt = "#0x%x";
+ break;
+
+ case BPF_JMP|BPF_JSET|BPF_K:
+ op = "jset";
+ fmt = "#0x%x";
+ break;
+
+ case BPF_JMP|BPF_JGT|BPF_X:
+ op = "jgt";
+ fmt = "x";
+ break;
+
+ case BPF_JMP|BPF_JGE|BPF_X:
+ op = "jge";
+ fmt = "x";
+ break;
+
+ case BPF_JMP|BPF_JEQ|BPF_X:
+ op = "jeq";
+ fmt = "x";
+ break;
+
+ case BPF_JMP|BPF_JSET|BPF_X:
+ op = "jset";
+ fmt = "x";
+ break;
+
+ case BPF_ALU|BPF_ADD|BPF_X:
+ op = "add";
+ fmt = "x";
+ break;
+
+ case BPF_ALU|BPF_SUB|BPF_X:
+ op = "sub";
+ fmt = "x";
+ break;
+
+ case BPF_ALU|BPF_MUL|BPF_X:
+ op = "mul";
+ fmt = "x";
+ break;
+
+ case BPF_ALU|BPF_DIV|BPF_X:
+ op = "div";
+ fmt = "x";
+ break;
+
+ case BPF_ALU|BPF_AND|BPF_X:
+ op = "and";
+ fmt = "x";
+ break;
+
+ case BPF_ALU|BPF_OR|BPF_X:
+ op = "or";
+ fmt = "x";
+ break;
+
+ case BPF_ALU|BPF_LSH|BPF_X:
+ op = "lsh";
+ fmt = "x";
+ break;
+
+ case BPF_ALU|BPF_RSH|BPF_X:
+ op = "rsh";
+ fmt = "x";
+ break;
+
+ case BPF_ALU|BPF_ADD|BPF_K:
+ op = "add";
+ fmt = "#%d";
+ break;
+
+ case BPF_ALU|BPF_SUB|BPF_K:
+ op = "sub";
+ fmt = "#%d";
+ break;
+
+ case BPF_ALU|BPF_MUL|BPF_K:
+ op = "mul";
+ fmt = "#%d";
+ break;
+
+ case BPF_ALU|BPF_DIV|BPF_K:
+ op = "div";
+ fmt = "#%d";
+ break;
+
+ case BPF_ALU|BPF_AND|BPF_K:
+ op = "and";
+ fmt = "#0x%x";
+ break;
+
+ case BPF_ALU|BPF_OR|BPF_K:
+ op = "or";
+ fmt = "#0x%x";
+ break;
+
+ case BPF_ALU|BPF_LSH|BPF_K:
+ op = "lsh";
+ fmt = "#%d";
+ break;
+
+ case BPF_ALU|BPF_RSH|BPF_K:
+ op = "rsh";
+ fmt = "#%d";
+ break;
+
+ case BPF_ALU|BPF_NEG:
+ op = "neg";
+ fmt = "";
+ break;
+
+ case BPF_MISC|BPF_TAX:
+ op = "tax";
+ fmt = "";
+ break;
+
+ case BPF_MISC|BPF_TXA:
+ op = "txa";
+ fmt = "";
+ break;
+ }
+ (void)sprintf(operand, fmt, v);
+ (void)sprintf(image,
+ (BPF_CLASS(p->code) == BPF_JMP &&
+ BPF_OP(p->code) != BPF_JA) ?
+ "(%03d) %-8s %-16s jt %d\tjf %d"
+ : "(%03d) %-8s %s",
+ n, op, operand, n + 1 + p->jt, n + 1 + p->jf);
+ return image;
+}
--- /dev/null
+# This file is a shell script that caches the results of configure
+# tests run on this system so they can be shared between configure
+# scripts and configure runs. It is not useful on other systems.
+# If it contains results you don't want to keep, you may remove or edit it.
+#
+# By default, configure uses ./config.cache as the cache file,
+# creating it if it does not exist already. You can give configure
+# the --cache-file=FILE option to use a different cache file; that is
+# what configure does when it calls configure scripts in
+# subdirectories, so they share the cache.
+# Giving --cache-file=/dev/null disables caching, for debugging configure.
+# config.status only pays attention to the cache file if you give it the
+# --recheck option to rerun configure.
+#
+ac_cv_func_ether_hostton=${ac_cv_func_ether_hostton=yes}
+ac_cv_func_strerror=${ac_cv_func_strerror=yes}
+ac_cv_header_malloc_h=${ac_cv_header_malloc_h=yes}
+ac_cv_header_net_if_arp_h=${ac_cv_header_net_if_arp_h=yes}
+ac_cv_header_sys_ioccom_h=${ac_cv_header_sys_ioccom_h=no}
+ac_cv_header_sys_sockio_h=${ac_cv_header_sys_sockio_h=no}
+ac_cv_lbl_flex_v24=${ac_cv_lbl_flex_v24=yes}
+ac_cv_lbl_gcc_fixincludes=${ac_cv_lbl_gcc_fixincludes=yes}
+ac_cv_lbl_gcc_vers=${ac_cv_lbl_gcc_vers=4}
+ac_cv_lbl_sockaddr_has_sa_len=${ac_cv_lbl_sockaddr_has_sa_len=no}
+ac_cv_lbl_unaligned_fail=${ac_cv_lbl_unaligned_fail=no}
+ac_cv_linux_vers=${ac_cv_linux_vers=2}
+ac_cv_prog_CC=${ac_cv_prog_CC=gcc}
+ac_cv_prog_CPP=${ac_cv_prog_CPP='gcc -E'}
+ac_cv_prog_V_LEX=${ac_cv_prog_V_LEX=flex}
+ac_cv_prog_V_RANLIB=${ac_cv_prog_V_RANLIB=ranlib}
+ac_cv_prog_V_YACC=${ac_cv_prog_V_YACC=bison}
+ac_cv_prog_cc_cross=${ac_cv_prog_cc_cross=no}
+ac_cv_prog_cc_g=${ac_cv_prog_cc_g=yes}
+ac_cv_prog_cc_works=${ac_cv_prog_cc_works=yes}
+ac_cv_prog_gcc=${ac_cv_prog_gcc=yes}
--- /dev/null
+#! /bin/sh
+# Attempt to guess a canonical system name.
+# Copyright (C) 1992, 93, 94, 95, 1996 Free Software Foundation, Inc.
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+# General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+#
+# As a special exception to the GNU General Public License, if you
+# distribute this file as part of a program that contains a
+# configuration script generated by Autoconf, you may include it under
+# the same distribution terms that you use for the rest of that program.
+
+# Written by Per Bothner <bothner@cygnus.com>.
+# The master version of this file is at the FSF in /home/gd/gnu/lib.
+#
+# This script attempts to guess a canonical system name similar to
+# config.sub. If it succeeds, it prints the system name on stdout, and
+# exits with 0. Otherwise, it exits with 1.
+#
+# The plan is that this can be called by configure scripts if you
+# don't specify an explicit system type (host/target name).
+#
+# Only a few systems have been added to this list; please add others
+# (but try to keep the structure clean).
+#
+
+# This is needed to find uname on a Pyramid OSx when run in the BSD universe.
+# (ghazi@noc.rutgers.edu 8/24/94.)
+if (test -f /.attbin/uname) >/dev/null 2>&1 ; then
+ PATH=$PATH:/.attbin ; export PATH
+fi
+
+UNAME_MACHINE=`(uname -m) 2>/dev/null` || UNAME_MACHINE=unknown
+UNAME_RELEASE=`(uname -r) 2>/dev/null` || UNAME_RELEASE=unknown
+UNAME_SYSTEM=`(uname -s) 2>/dev/null` || UNAME_SYSTEM=unknown
+UNAME_VERSION=`(uname -v) 2>/dev/null` || UNAME_VERSION=unknown
+
+trap 'rm -f dummy.c dummy.o dummy; exit 1' 1 2 15
+
+# Note: order is significant - the case branches are not exclusive.
+
+case "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" in
+ alpha:OSF1:*:*)
+ # A Vn.n version is a released version.
+ # A Tn.n version is a released field test version.
+ # A Xn.n version is an unreleased experimental baselevel.
+ # 1.2 uses "1.2" for uname -r.
+ echo alpha-dec-osf`echo ${UNAME_RELEASE} | sed -e 's/^[VTX]//'`
+ exit 0 ;;
+ 21064:Windows_NT:50:3)
+ echo alpha-dec-winnt3.5
+ exit 0 ;;
+ Amiga*:UNIX_System_V:4.0:*)
+ echo m68k-cbm-sysv4
+ exit 0;;
+ amiga:NetBSD:*:*)
+ echo m68k-cbm-netbsd${UNAME_RELEASE}
+ exit 0 ;;
+ amiga:OpenBSD:*:*)
+ echo m68k-cbm-openbsd${UNAME_RELEASE}
+ exit 0 ;;
+ arm:RISC*:1.[012]*:*|arm:riscix:1.[012]*:*)
+ echo arm-acorn-riscix${UNAME_RELEASE}
+ exit 0;;
+ Pyramid*:OSx*:*:*|MIS*:OSx*:*:*)
+ # akee@wpdis03.wpafb.af.mil (Earle F. Ake) contributed MIS and NILE.
+ if test "`(/bin/universe) 2>/dev/null`" = att ; then
+ echo pyramid-pyramid-sysv3
+ else
+ echo pyramid-pyramid-bsd
+ fi
+ exit 0 ;;
+ NILE:*:*:dcosx)
+ echo pyramid-pyramid-svr4
+ exit 0 ;;
+ sun4*:SunOS:5.*:* | tadpole*:SunOS:5.*:*)
+ echo sparc-sun-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'`
+ exit 0 ;;
+ i86pc:SunOS:5.*:*)
+ echo i386-pc-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'`
+ exit 0 ;;
+ sun4*:SunOS:6*:*)
+ # According to config.sub, this is the proper way to canonicalize
+ # SunOS6. Hard to guess exactly what SunOS6 will be like, but
+ # it's likely to be more like Solaris than SunOS4.
+ echo sparc-sun-solaris3`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'`
+ exit 0 ;;
+ sun4*:SunOS:*:*)
+ case "`/usr/bin/arch -k`" in
+ Series*|S4*)
+ UNAME_RELEASE=`uname -v`
+ ;;
+ esac
+ # Japanese Language versions have a version number like `4.1.3-JL'.
+ echo sparc-sun-sunos`echo ${UNAME_RELEASE}|sed -e 's/-/_/'`
+ exit 0 ;;
+ sun3*:SunOS:*:*)
+ echo m68k-sun-sunos${UNAME_RELEASE}
+ exit 0 ;;
+ aushp:SunOS:*:*)
+ echo sparc-auspex-sunos${UNAME_RELEASE}
+ exit 0 ;;
+ atari*:NetBSD:*:*)
+ echo m68k-atari-netbsd${UNAME_RELEASE}
+ exit 0 ;;
+ atari*:OpenBSD:*:*)
+ echo m68k-atari-openbsd${UNAME_RELEASE}
+ exit 0 ;;
+ sun3*:NetBSD:*:*)
+ echo m68k-sun-netbsd${UNAME_RELEASE}
+ exit 0 ;;
+ sun3*:OpenBSD:*:*)
+ echo m68k-sun-openbsd${UNAME_RELEASE}
+ exit 0 ;;
+ mac68k:NetBSD:*:*)
+ echo m68k-apple-netbsd${UNAME_RELEASE}
+ exit 0 ;;
+ mac68k:OpenBSD:*:*)
+ echo m68k-apple-openbsd${UNAME_RELEASE}
+ exit 0 ;;
+ powerpc:machten:*:*)
+ echo powerpc-apple-machten${UNAME_RELEASE}
+ exit 0 ;;
+ RISC*:Mach:*:*)
+ echo mips-dec-mach_bsd4.3
+ exit 0 ;;
+ RISC*:ULTRIX:*:*)
+ echo mips-dec-ultrix${UNAME_RELEASE}
+ exit 0 ;;
+ VAX*:ULTRIX*:*:*)
+ echo vax-dec-ultrix${UNAME_RELEASE}
+ exit 0 ;;
+ mips:*:*:UMIPS | mips:*:*:RISCos)
+ sed 's/^ //' << EOF >dummy.c
+ int main (argc, argv) int argc; char **argv; {
+ #if defined (host_mips) && defined (MIPSEB)
+ #if defined (SYSTYPE_SYSV)
+ printf ("mips-mips-riscos%ssysv\n", argv[1]); exit (0);
+ #endif
+ #if defined (SYSTYPE_SVR4)
+ printf ("mips-mips-riscos%ssvr4\n", argv[1]); exit (0);
+ #endif
+ #if defined (SYSTYPE_BSD43) || defined(SYSTYPE_BSD)
+ printf ("mips-mips-riscos%sbsd\n", argv[1]); exit (0);
+ #endif
+ #endif
+ exit (-1);
+ }
+EOF
+ ${CC-cc} dummy.c -o dummy \
+ && ./dummy `echo "${UNAME_RELEASE}" | sed -n 's/\([0-9]*\).*/\1/p'` \
+ && rm dummy.c dummy && exit 0
+ rm -f dummy.c dummy
+ echo mips-mips-riscos${UNAME_RELEASE}
+ exit 0 ;;
+ Night_Hawk:Power_UNIX:*:*)
+ echo powerpc-harris-powerunix
+ exit 0 ;;
+ m88k:CX/UX:7*:*)
+ echo m88k-harris-cxux7
+ exit 0 ;;
+ m88k:*:4*:R4*)
+ echo m88k-motorola-sysv4
+ exit 0 ;;
+ m88k:*:3*:R3*)
+ echo m88k-motorola-sysv3
+ exit 0 ;;
+ AViiON:dgux:*:*)
+ # DG/UX returns AViiON for all architectures
+ UNAME_PROCESSOR=`/usr/bin/uname -p`
+ if [ $UNAME_PROCESSOR = mc88100 -o $UNAME_PROCESSOR = mc88110 ] ; then
+ if [ ${TARGET_BINARY_INTERFACE}x = m88kdguxelfx \
+ -o ${TARGET_BINARY_INTERFACE}x = x ] ; then
+ echo m88k-dg-dgux${UNAME_RELEASE}
+ else
+ echo m88k-dg-dguxbcs${UNAME_RELEASE}
+ fi
+ else echo i586-dg-dgux${UNAME_RELEASE}
+ fi
+ exit 0 ;;
+ M88*:DolphinOS:*:*) # DolphinOS (SVR3)
+ echo m88k-dolphin-sysv3
+ exit 0 ;;
+ M88*:*:R3*:*)
+ # Delta 88k system running SVR3
+ echo m88k-motorola-sysv3
+ exit 0 ;;
+ XD88*:*:*:*) # Tektronix XD88 system running UTekV (SVR3)
+ echo m88k-tektronix-sysv3
+ exit 0 ;;
+ Tek43[0-9][0-9]:UTek:*:*) # Tektronix 4300 system running UTek (BSD)
+ echo m68k-tektronix-bsd
+ exit 0 ;;
+ *:IRIX*:*:*)
+ echo mips-sgi-irix`echo ${UNAME_RELEASE}|sed -e 's/-/_/g'`
+ exit 0 ;;
+ ????????:AIX?:[12].1:2) # AIX 2.2.1 or AIX 2.1.1 is RT/PC AIX.
+ echo romp-ibm-aix # uname -m gives an 8 hex-code CPU id
+ exit 0 ;; # Note that: echo "'`uname -s`'" gives 'AIX '
+ i?86:AIX:*:*)
+ echo i386-ibm-aix
+ exit 0 ;;
+ *:AIX:2:3)
+ if grep bos325 /usr/include/stdio.h >/dev/null 2>&1; then
+ sed 's/^ //' << EOF >dummy.c
+ #include <sys/systemcfg.h>
+
+ main()
+ {
+ if (!__power_pc())
+ exit(1);
+ puts("powerpc-ibm-aix3.2.5");
+ exit(0);
+ }
+EOF
+ ${CC-cc} dummy.c -o dummy && ./dummy && rm dummy.c dummy && exit 0
+ rm -f dummy.c dummy
+ echo rs6000-ibm-aix3.2.5
+ elif grep bos324 /usr/include/stdio.h >/dev/null 2>&1; then
+ echo rs6000-ibm-aix3.2.4
+ else
+ echo rs6000-ibm-aix3.2
+ fi
+ exit 0 ;;
+ *:AIX:*:4)
+ if /usr/sbin/lsattr -EHl proc0 | grep POWER >/dev/null 2>&1; then
+ IBM_ARCH=rs6000
+ else
+ IBM_ARCH=powerpc
+ fi
+ if [ -x /usr/bin/oslevel ] ; then
+ IBM_REV=`/usr/bin/oslevel`
+ else
+ IBM_REV=4.${UNAME_RELEASE}
+ fi
+ echo ${IBM_ARCH}-ibm-aix${IBM_REV}
+ exit 0 ;;
+ *:AIX:*:*)
+ echo rs6000-ibm-aix
+ exit 0 ;;
+ ibmrt:4.4BSD:*|romp-ibm:BSD:*)
+ echo romp-ibm-bsd4.4
+ exit 0 ;;
+ ibmrt:*BSD:*|romp-ibm:BSD:*) # covers RT/PC NetBSD and
+ echo romp-ibm-bsd${UNAME_RELEASE} # 4.3 with uname added to
+ exit 0 ;; # report: romp-ibm BSD 4.3
+ *:BOSX:*:*)
+ echo rs6000-bull-bosx
+ exit 0 ;;
+ DPX/2?00:B.O.S.:*:*)
+ echo m68k-bull-sysv3
+ exit 0 ;;
+ 9000/[34]??:4.3bsd:1.*:*)
+ echo m68k-hp-bsd
+ exit 0 ;;
+ hp300:4.4BSD:*:* | 9000/[34]??:4.3bsd:2.*:*)
+ echo m68k-hp-bsd4.4
+ exit 0 ;;
+ 9000/[3478]??:HP-UX:*:*)
+ case "${UNAME_MACHINE}" in
+ 9000/31? ) HP_ARCH=m68000 ;;
+ 9000/[34]?? ) HP_ARCH=m68k ;;
+ 9000/7?? | 9000/8?[1679] ) HP_ARCH=hppa1.1 ;;
+ 9000/8?? ) HP_ARCH=hppa1.0 ;;
+ esac
+ HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'`
+ echo ${HP_ARCH}-hp-hpux${HPUX_REV}
+ exit 0 ;;
+ 3050*:HI-UX:*:*)
+ sed 's/^ //' << EOF >dummy.c
+ #include <unistd.h>
+ int
+ main ()
+ {
+ long cpu = sysconf (_SC_CPU_VERSION);
+ /* The order matters, because CPU_IS_HP_MC68K erroneously returns
+ true for CPU_PA_RISC1_0. CPU_IS_PA_RISC returns correct
+ results, however. */
+ if (CPU_IS_PA_RISC (cpu))
+ {
+ switch (cpu)
+ {
+ case CPU_PA_RISC1_0: puts ("hppa1.0-hitachi-hiuxwe2"); break;
+ case CPU_PA_RISC1_1: puts ("hppa1.1-hitachi-hiuxwe2"); break;
+ case CPU_PA_RISC2_0: puts ("hppa2.0-hitachi-hiuxwe2"); break;
+ default: puts ("hppa-hitachi-hiuxwe2"); break;
+ }
+ }
+ else if (CPU_IS_HP_MC68K (cpu))
+ puts ("m68k-hitachi-hiuxwe2");
+ else puts ("unknown-hitachi-hiuxwe2");
+ exit (0);
+ }
+EOF
+ ${CC-cc} dummy.c -o dummy && ./dummy && rm dummy.c dummy && exit 0
+ rm -f dummy.c dummy
+ echo unknown-hitachi-hiuxwe2
+ exit 0 ;;
+ 9000/7??:4.3bsd:*:* | 9000/8?[79]:4.3bsd:*:* )
+ echo hppa1.1-hp-bsd
+ exit 0 ;;
+ 9000/8??:4.3bsd:*:*)
+ echo hppa1.0-hp-bsd
+ exit 0 ;;
+ hp7??:OSF1:*:* | hp8?[79]:OSF1:*:* )
+ echo hppa1.1-hp-osf
+ exit 0 ;;
+ hp8??:OSF1:*:*)
+ echo hppa1.0-hp-osf
+ exit 0 ;;
+ i?86:OSF1:*:*)
+ if [ -x /usr/sbin/sysversion ] ; then
+ echo ${UNAME_MACHINE}-unknown-osf1mk
+ else
+ echo ${UNAME_MACHINE}-unknown-osf1
+ fi
+ exit 0 ;;
+ parisc*:Lites*:*:*)
+ echo hppa1.1-hp-lites
+ exit 0 ;;
+ C1*:ConvexOS:*:* | convex:ConvexOS:C1*:*)
+ echo c1-convex-bsd
+ exit 0 ;;
+ C2*:ConvexOS:*:* | convex:ConvexOS:C2*:*)
+ if getsysinfo -f scalar_acc
+ then echo c32-convex-bsd
+ else echo c2-convex-bsd
+ fi
+ exit 0 ;;
+ C34*:ConvexOS:*:* | convex:ConvexOS:C34*:*)
+ echo c34-convex-bsd
+ exit 0 ;;
+ C38*:ConvexOS:*:* | convex:ConvexOS:C38*:*)
+ echo c38-convex-bsd
+ exit 0 ;;
+ C4*:ConvexOS:*:* | convex:ConvexOS:C4*:*)
+ echo c4-convex-bsd
+ exit 0 ;;
+ CRAY*X-MP:*:*:*)
+ echo xmp-cray-unicos
+ exit 0 ;;
+ CRAY*Y-MP:*:*:*)
+ echo ymp-cray-unicos${UNAME_RELEASE}
+ exit 0 ;;
+ CRAY*[A-Z]90:*:*:*)
+ echo ${UNAME_MACHINE}-cray-unicos${UNAME_RELEASE} \
+ | sed -e 's/CRAY.*\([A-Z]90\)/\1/' \
+ -e y/ABCDEFGHIJKLMNOPQRSTUVWXYZ/abcdefghijklmnopqrstuvwxyz/
+ exit 0 ;;
+ CRAY*TS:*:*:*)
+ echo t90-cray-unicos${UNAME_RELEASE}
+ exit 0 ;;
+ CRAY-2:*:*:*)
+ echo cray2-cray-unicos
+ exit 0 ;;
+ F300:UNIX_System_V:*:*)
+ FUJITSU_SYS=`uname -p | tr [A-Z] [a-z] | sed -e 's/\///'`
+ FUJITSU_REL=`echo ${UNAME_RELEASE} | sed -e 's/ /_/'`
+ echo "f300-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}"
+ exit 0 ;;
+ F301:UNIX_System_V:*:*)
+ echo f301-fujitsu-uxpv`echo $UNAME_RELEASE | sed 's/ .*//'`
+ exit 0 ;;
+ hp3[0-9][05]:NetBSD:*:*)
+ echo m68k-hp-netbsd${UNAME_RELEASE}
+ exit 0 ;;
+ hp3[0-9][05]:OpenBSD:*:*)
+ echo m68k-hp-openbsd${UNAME_RELEASE}
+ exit 0 ;;
+ i?86:BSD/386:*:* | *:BSD/OS:*:*)
+ echo ${UNAME_MACHINE}-pc-bsdi${UNAME_RELEASE}
+ exit 0 ;;
+ *:FreeBSD:*:*)
+ echo ${UNAME_MACHINE}-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'`
+ exit 0 ;;
+ *:NetBSD:*:*)
+ echo ${UNAME_MACHINE}-unknown-netbsd`echo ${UNAME_RELEASE}|sed -e 's/[-_].*/\./'`
+ exit 0 ;;
+ *:OpenBSD:*:*)
+ echo ${UNAME_MACHINE}-unknown-openbsd`echo ${UNAME_RELEASE}|sed -e 's/[-_].*/\./'`
+ exit 0 ;;
+ i*:CYGWIN*:*)
+ echo i386-pc-cygwin32
+ exit 0 ;;
+ p*:CYGWIN*:*)
+ echo powerpcle-unknown-cygwin32
+ exit 0 ;;
+ prep*:SunOS:5.*:*)
+ echo powerpcle-unknown-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'`
+ exit 0 ;;
+ *:GNU:*:*)
+ echo `echo ${UNAME_MACHINE}|sed -e 's,/.*$,,'`-unknown-gnu`echo ${UNAME_RELEASE}|sed -e 's,/.*$,,'`
+ exit 0 ;;
+ *:Linux:*:*)
+ # The BFD linker knows what the default object file format is, so
+ # first see if it will tell us.
+ ld_help_string=`ld --help 2>&1`
+ if echo "$ld_help_string" | grep >/dev/null 2>&1 "supported emulations: elf_i.86"; then
+ echo "${UNAME_MACHINE}-pc-linux-gnu" ; exit 0
+ elif echo "$ld_help_string" | grep >/dev/null 2>&1 "supported emulations: i.86linux"; then
+ echo "${UNAME_MACHINE}-pc-linux-gnuaout" ; exit 0
+ elif echo "$ld_help_string" | grep >/dev/null 2>&1 "supported emulations: i.86coff"; then
+ echo "${UNAME_MACHINE}-pc-linux-gnucoff" ; exit 0
+ elif echo "$ld_help_string" | grep >/dev/null 2>&1 "supported emulations: m68kelf"; then
+ echo "${UNAME_MACHINE}-unknown-linux-gnu" ; exit 0
+ elif echo "$ld_help_string" | grep >/dev/null 2>&1 "supported emulations: m68klinux"; then
+ echo "${UNAME_MACHINE}-unknown-linux-gnuaout" ; exit 0
+ elif echo "$ld_help_string" | grep >/dev/null 2>&1 "supported emulations: elf32ppc"; then
+ echo "powerpc-unknown-linux-gnu" ; exit 0
+ elif test "${UNAME_MACHINE}" = "alpha" ; then
+ echo alpha-unknown-linux-gnu ; exit 0
+ elif test "${UNAME_MACHINE}" = "sparc" ; then
+ echo sparc-unknown-linux-gnu ; exit 0
+ else
+ # Either a pre-BFD a.out linker (linux-gnuoldld) or one that does not give us
+ # useful --help. Gcc wants to distinguish between linux-gnuoldld and linux-gnuaout.
+ test ! -d /usr/lib/ldscripts/. \
+ && echo "${UNAME_MACHINE}-pc-linux-gnuoldld" && exit 0
+ # Determine whether the default compiler is a.out or elf
+ cat >dummy.c <<EOF
+main(argc, argv)
+int argc;
+char *argv[];
+{
+#ifdef __ELF__
+ printf ("%s-pc-linux-gnu\n", argv[1]);
+#else
+ printf ("%s-pc-linux-gnuaout\n", argv[1]);
+#endif
+ return 0;
+}
+EOF
+ ${CC-cc} dummy.c -o dummy 2>/dev/null && ./dummy "${UNAME_MACHINE}" && rm dummy.c dummy && exit 0
+ rm -f dummy.c dummy
+ fi ;;
+# ptx 4.0 does uname -s correctly, with DYNIX/ptx in there. earlier versions
+# are messed up and put the nodename in both sysname and nodename.
+ i?86:DYNIX/ptx:4*:*)
+ echo i386-sequent-sysv4
+ exit 0 ;;
+ i?86:*:4.*:* | i?86:SYSTEM_V:4.*:*)
+ if grep Novell /usr/include/link.h >/dev/null 2>/dev/null; then
+ echo ${UNAME_MACHINE}-univel-sysv${UNAME_RELEASE}
+ else
+ echo ${UNAME_MACHINE}-pc-sysv${UNAME_RELEASE}
+ fi
+ exit 0 ;;
+ i?86:*:3.2:*)
+ if test -f /usr/options/cb.name; then
+ UNAME_REL=`sed -n 's/.*Version //p' </usr/options/cb.name`
+ echo ${UNAME_MACHINE}-pc-isc$UNAME_REL
+ elif /bin/uname -X 2>/dev/null >/dev/null ; then
+ UNAME_REL=`(/bin/uname -X|egrep Release|sed -e 's/.*= //')`
+ (/bin/uname -X|egrep i80486 >/dev/null) && UNAME_MACHINE=i486
+ (/bin/uname -X|egrep '^Machine.*Pentium' >/dev/null) \
+ && UNAME_MACHINE=i586
+ echo ${UNAME_MACHINE}-pc-sco$UNAME_REL
+ else
+ echo ${UNAME_MACHINE}-pc-sysv32
+ fi
+ exit 0 ;;
+ Intel:Mach:3*:*)
+ echo i386-pc-mach3
+ exit 0 ;;
+ paragon:*:*:*)
+ echo i860-intel-osf1
+ exit 0 ;;
+ i860:*:4.*:*) # i860-SVR4
+ if grep Stardent /usr/include/sys/uadmin.h >/dev/null 2>&1 ; then
+ echo i860-stardent-sysv${UNAME_RELEASE} # Stardent Vistra i860-SVR4
+ else # Add other i860-SVR4 vendors below as they are discovered.
+ echo i860-unknown-sysv${UNAME_RELEASE} # Unknown i860-SVR4
+ fi
+ exit 0 ;;
+ mini*:CTIX:SYS*5:*)
+ # "miniframe"
+ echo m68010-convergent-sysv
+ exit 0 ;;
+ M68*:*:R3V[567]*:*)
+ test -r /sysV68 && echo 'm68k-motorola-sysv' && exit 0 ;;
+ 3[34]??:*:4.0:3.0 | 3[34]??,*:*:4.0:3.0 | 4850:*:4.0:3.0)
+ OS_REL=''
+ test -r /etc/.relid \
+ && OS_REL=.`sed -n 's/[^ ]* [^ ]* \([0-9][0-9]\).*/\1/p' < /etc/.relid`
+ /bin/uname -p 2>/dev/null | grep 86 >/dev/null \
+ && echo i486-ncr-sysv4.3${OS_REL} && exit 0
+ /bin/uname -p 2>/dev/null | /bin/grep entium >/dev/null \
+ && echo i586-ncr-sysv4.3${OS_REL} && exit 0 ;;
+ 3[34]??:*:4.0:* | 3[34]??,*:*:4.0:*)
+ /bin/uname -p 2>/dev/null | grep 86 >/dev/null \
+ && echo i486-ncr-sysv4 && exit 0 ;;
+ m68*:LynxOS:2.*:*)
+ echo m68k-unknown-lynxos${UNAME_RELEASE}
+ exit 0 ;;
+ mc68030:UNIX_System_V:4.*:*)
+ echo m68k-atari-sysv4
+ exit 0 ;;
+ i?86:LynxOS:2.*:*)
+ echo i386-unknown-lynxos${UNAME_RELEASE}
+ exit 0 ;;
+ TSUNAMI:LynxOS:2.*:*)
+ echo sparc-unknown-lynxos${UNAME_RELEASE}
+ exit 0 ;;
+ rs6000:LynxOS:2.*:* | PowerPC:LynxOS:2.*:*)
+ echo rs6000-unknown-lynxos${UNAME_RELEASE}
+ exit 0 ;;
+ SM[BE]S:UNIX_SV:*:*)
+ echo mips-dde-sysv${UNAME_RELEASE}
+ exit 0 ;;
+ RM*:SINIX-*:*:*)
+ echo mips-sni-sysv4
+ exit 0 ;;
+ *:SINIX-*:*:*)
+ if uname -p 2>/dev/null >/dev/null ; then
+ UNAME_MACHINE=`(uname -p) 2>/dev/null`
+ echo ${UNAME_MACHINE}-sni-sysv4
+ else
+ echo ns32k-sni-sysv
+ fi
+ exit 0 ;;
+ *:UNIX_System_V:4*:FTX*)
+ # From Gerald Hewes <hewes@openmarket.com>.
+ # How about differentiating between stratus architectures? -djm
+ echo hppa1.1-stratus-sysv4
+ exit 0 ;;
+ *:*:*:FTX*)
+ # From seanf@swdc.stratus.com.
+ echo i860-stratus-sysv4
+ exit 0 ;;
+ mc68*:A/UX:*:*)
+ echo m68k-apple-aux${UNAME_RELEASE}
+ exit 0 ;;
+ R3000:*System_V*:*:* | R4000:UNIX_SYSV:*:*)
+ if [ -d /usr/nec ]; then
+ echo mips-nec-sysv${UNAME_RELEASE}
+ else
+ echo mips-unknown-sysv${UNAME_RELEASE}
+ fi
+ exit 0 ;;
+ PENTIUM:CPunix:4.0*:*) # Unisys `ClearPath HMP IX 4000' SVR4/MP effort
+ # says <Richard.M.Bartel@ccMail.Census.GOV>
+ echo i586-unisys-sysv4
+ exit 0 ;;
+esac
+
+#echo '(No uname command or uname output not recognized.)' 1>&2
+#echo "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" 1>&2
+
+cat >dummy.c <<EOF
+#ifdef _SEQUENT_
+# include <sys/types.h>
+# include <sys/utsname.h>
+#endif
+main ()
+{
+#if defined (sony)
+#if defined (MIPSEB)
+ /* BFD wants "bsd" instead of "newsos". Perhaps BFD should be changed,
+ I don't know.... */
+ printf ("mips-sony-bsd\n"); exit (0);
+#else
+#include <sys/param.h>
+ printf ("m68k-sony-newsos%s\n",
+#ifdef NEWSOS4
+ "4"
+#else
+ ""
+#endif
+ ); exit (0);
+#endif
+#endif
+
+#if defined (__arm) && defined (__acorn) && defined (__unix)
+ printf ("arm-acorn-riscix"); exit (0);
+#endif
+
+#if defined (hp300) && !defined (hpux)
+ printf ("m68k-hp-bsd\n"); exit (0);
+#endif
+
+#if defined (NeXT)
+#if !defined (__ARCHITECTURE__)
+#define __ARCHITECTURE__ "m68k"
+#endif
+ int version;
+ version=`(hostinfo | sed -n 's/.*NeXT Mach \([0-9]*\).*/\1/p') 2>/dev/null`;
+ printf ("%s-next-nextstep%d\n", __ARCHITECTURE__, version);
+ exit (0);
+#endif
+
+#if defined (MULTIMAX) || defined (n16)
+#if defined (UMAXV)
+ printf ("ns32k-encore-sysv\n"); exit (0);
+#else
+#if defined (CMU)
+ printf ("ns32k-encore-mach\n"); exit (0);
+#else
+ printf ("ns32k-encore-bsd\n"); exit (0);
+#endif
+#endif
+#endif
+
+#if defined (__386BSD__)
+ printf ("i386-pc-bsd\n"); exit (0);
+#endif
+
+#if defined (sequent)
+#if defined (i386)
+ printf ("i386-sequent-dynix\n"); exit (0);
+#endif
+#if defined (ns32000)
+ printf ("ns32k-sequent-dynix\n"); exit (0);
+#endif
+#endif
+
+#if defined (_SEQUENT_)
+ struct utsname un;
+
+ uname(&un);
+
+ if (strncmp(un.version, "V2", 2) == 0) {
+ printf ("i386-sequent-ptx2\n"); exit (0);
+ }
+ if (strncmp(un.version, "V1", 2) == 0) { /* XXX is V1 correct? */
+ printf ("i386-sequent-ptx1\n"); exit (0);
+ }
+ printf ("i386-sequent-ptx\n"); exit (0);
+
+#endif
+
+#if defined (vax)
+#if !defined (ultrix)
+ printf ("vax-dec-bsd\n"); exit (0);
+#else
+ printf ("vax-dec-ultrix\n"); exit (0);
+#endif
+#endif
+
+#if defined (alliant) && defined (i860)
+ printf ("i860-alliant-bsd\n"); exit (0);
+#endif
+
+ exit (1);
+}
+EOF
+
+${CC-cc} dummy.c -o dummy 2>/dev/null && ./dummy && rm dummy.c dummy && exit 0
+rm -f dummy.c dummy
+
+# Apollos put the system type in the environment.
+
+test -d /usr/apollo && { echo ${ISP}-apollo-${SYSTYPE}; exit 0; }
+
+# Convex versions that predate uname can use getsysinfo(1)
+
+if [ -x /usr/convex/getsysinfo ]
+then
+ case `getsysinfo -f cpu_type` in
+ c1*)
+ echo c1-convex-bsd
+ exit 0 ;;
+ c2*)
+ if getsysinfo -f scalar_acc
+ then echo c32-convex-bsd
+ else echo c2-convex-bsd
+ fi
+ exit 0 ;;
+ c34*)
+ echo c34-convex-bsd
+ exit 0 ;;
+ c38*)
+ echo c38-convex-bsd
+ exit 0 ;;
+ c4*)
+ echo c4-convex-bsd
+ exit 0 ;;
+ esac
+fi
+
+#echo '(Unable to guess system type)' 1>&2
+
+exit 1
--- /dev/null
+This file contains any messages produced by compilers while
+running configure, to aid debugging if configure makes a mistake.
+
+configure:578: checking host system type
+configure:599: checking target system type
+configure:617: checking build system type
+configure:711: checking for gcc
+configure:788: checking whether the C compiler (gcc ) works
+configure:802: gcc -o conftest conftest.c 1>&5
+configure:822: checking whether the C compiler (gcc ) is a cross-compiler
+configure:827: checking whether we are using GNU C
+configure:836: gcc -E conftest.c
+configure:851: checking whether gcc accepts -g
+configure:884: checking gcc version
+configure:1028: checking how to run the C preprocessor
+configure:1049: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:1092: checking for malloc.h
+configure:1102: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:1092: checking for sys/ioccom.h
+configure:1102: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:1098:24: error: sys/ioccom.h: No such file or directory
+configure: failed program was:
+#line 1097 "configure"
+#include "confdefs.h"
+#include <sys/ioccom.h>
+configure:1092: checking for sys/sockio.h
+configure:1102: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:1098:24: error: sys/sockio.h: No such file or directory
+configure: failed program was:
+#line 1097 "configure"
+#include "confdefs.h"
+#include <sys/sockio.h>
+configure:1131: checking for ANSI ioctl definitions
+configure:1155: gcc -c -g -O2 conftest.c 1>&5
+configure:1178: checking for ether_hostton
+configure:1206: gcc -o conftest -g -O2 conftest.c 1>&5
+configure:1178: checking for strerror
+configure:1206: gcc -o conftest -g -O2 conftest.c 1>&5
+configure:1238: checking packet capture type
+configure:1341: checking for net/if_arp.h
+configure:1351: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:1378: checking Linux kernel version
+configure:1419: checking for flex
+configure:1452: checking for flex 2.4 or higher
+configure:1478: checking for bison
+configure:1602: checking for ranlib
+configure:1672: checking if sockaddr struct has sa_len member
+configure:1686: gcc -c -g -O2 conftest.c 1>&5
+configure: In function 'main':
+configure:1682: error: 'struct sockaddr' has no member named 'sa_len'
+configure: failed program was:
+#line 1677 "configure"
+#include "confdefs.h"
+
+# include <sys/types.h>
+# include <sys/socket.h>
+int main() {
+u_int i = sizeof(((struct sockaddr *)0)->sa_len)
+; return 0; }
+configure:1707: checking if unaligned accesses fail
+configure:1803: checking for a BSD compatible install
--- /dev/null
+#! /bin/sh
+# Generated automatically by configure.
+# Run this file to recreate the current configuration.
+# This directory was configured as follows,
+# on host bertha:
+#
+# ./configure
+#
+# Compiler output produced by configure, useful for debugging
+# configure, is in ./config.log if it exists.
+
+ac_cs_usage="Usage: ./config.status [--recheck] [--version] [--help]"
+for ac_option
+do
+ case "$ac_option" in
+ -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r)
+ echo "running ${CONFIG_SHELL-/bin/sh} ./configure --no-create --no-recursion"
+ exec ${CONFIG_SHELL-/bin/sh} ./configure --no-create --no-recursion ;;
+ -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
+ echo "./config.status generated by autoconf version 2.12"
+ exit 0 ;;
+ -help | --help | --hel | --he | --h)
+ echo "$ac_cs_usage"; exit 0 ;;
+ *) echo "$ac_cs_usage"; exit 1 ;;
+ esac
+done
+
+ac_given_srcdir=.
+ac_given_INSTALL=" install_elinux -p"
+
+trap 'rm -fr Makefile conftest*; exit 1' 1 2 15
+
+# Protect against being on the right side of a sed subst in config.status.
+sed 's/%@/@@/; s/@%/@@/; s/%g$/@g/; /@g$/s/[\\&%]/\\&/g;
+ s/@@/%@/; s/@@/@%/; s/@g$/%g/' > conftest.subs <<\CEOF
+/^[ ]*VPATH[ ]*=[^:]*$/d
+
+s%@CFLAGS@%-g -O2%g
+s%@CPPFLAGS@%%g
+s%@CXXFLAGS@%%g
+s%@DEFS@% -DHAVE_MALLOC_H=1 -DHAVE_ETHER_HOSTTON=1 -DHAVE_STRERROR=1 -DHAVE_NET_IF_ARP_H=1 %g
+s%@LDFLAGS@%%g
+s%@LIBS@%%g
+s%@exec_prefix@%${prefix}%g
+s%@prefix@%/usr/local%g
+s%@program_transform_name@%s,x,x,%g
+s%@bindir@%${exec_prefix}/bin%g
+s%@sbindir@%${exec_prefix}/sbin%g
+s%@libexecdir@%${exec_prefix}/libexec%g
+s%@datadir@%${prefix}/share%g
+s%@sysconfdir@%${prefix}/etc%g
+s%@sharedstatedir@%${prefix}/com%g
+s%@localstatedir@%${prefix}/var%g
+s%@libdir@%${exec_prefix}/lib%g
+s%@includedir@%${prefix}/include%g
+s%@oldincludedir@%/usr/include%g
+s%@infodir@%${prefix}/info%g
+s%@mandir@%${prefix}/man%g
+s%@host@%i686-pc-linux-gnu%g
+s%@host_alias@%i686-pc-linux-gnu%g
+s%@host_cpu@%i686%g
+s%@host_vendor@%pc%g
+s%@host_os@%linux-gnu%g
+s%@target@%i686-pc-linux-gnu%g
+s%@target_alias@%i686-pc-linux-gnu%g
+s%@target_cpu@%i686%g
+s%@target_vendor@%pc%g
+s%@target_os@%linux-gnu%g
+s%@build@%i686-pc-linux-gnu%g
+s%@build_alias@%i686-pc-linux-gnu%g
+s%@build_cpu@%i686%g
+s%@build_vendor@%pc%g
+s%@build_os@%linux-gnu%g
+s%@SHLICC2@%%g
+s%@CC@%gcc%g
+s%@CPP@%gcc -E%g
+s%@V_LEX@%flex -Ppcap_%g
+s%@V_YACC@%bison -y -p pcap_%g
+s%@V_RANLIB@%ranlib%g
+s%@V_CCOPT@%-O2%g
+s%@V_INCLS@% -Ilinux-include%g
+s%@V_PCAP@%linux%g
+s%@INSTALL_PROGRAM@%${INSTALL}%g
+s%@INSTALL_DATA@%${INSTALL} -m 644%g
+
+CEOF
+
+# Split the substitutions into bite-sized pieces for seds with
+# small command number limits, like on Digital OSF/1 and HP-UX.
+ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script.
+ac_file=1 # Number of current file.
+ac_beg=1 # First line for current file.
+ac_end=$ac_max_sed_cmds # Line after last line for current file.
+ac_more_lines=:
+ac_sed_cmds=""
+while $ac_more_lines; do
+ if test $ac_beg -gt 1; then
+ sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
+ else
+ sed "${ac_end}q" conftest.subs > conftest.s$ac_file
+ fi
+ if test ! -s conftest.s$ac_file; then
+ ac_more_lines=false
+ rm -f conftest.s$ac_file
+ else
+ if test -z "$ac_sed_cmds"; then
+ ac_sed_cmds="sed -f conftest.s$ac_file"
+ else
+ ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
+ fi
+ ac_file=`expr $ac_file + 1`
+ ac_beg=$ac_end
+ ac_end=`expr $ac_end + $ac_max_sed_cmds`
+ fi
+done
+if test -z "$ac_sed_cmds"; then
+ ac_sed_cmds=cat
+fi
+
+CONFIG_FILES=${CONFIG_FILES-"Makefile"}
+for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
+ # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
+ case "$ac_file" in
+ *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
+ ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
+ *) ac_file_in="${ac_file}.in" ;;
+ esac
+
+ # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
+
+ # Remove last slash and all that follows it. Not all systems have dirname.
+ ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
+ if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
+ # The file is in a subdirectory.
+ test ! -d "$ac_dir" && mkdir "$ac_dir"
+ ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
+ # A "../" for each directory in $ac_dir_suffix.
+ ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
+ else
+ ac_dir_suffix= ac_dots=
+ fi
+
+ case "$ac_given_srcdir" in
+ .) srcdir=.
+ if test -z "$ac_dots"; then top_srcdir=.
+ else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
+ /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
+ *) # Relative path.
+ srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
+ top_srcdir="$ac_dots$ac_given_srcdir" ;;
+ esac
+
+ case "$ac_given_INSTALL" in
+ [/$]*) INSTALL="$ac_given_INSTALL" ;;
+ *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
+ esac
+
+ echo creating "$ac_file"
+ rm -f "$ac_file"
+ configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
+ case "$ac_file" in
+ *Makefile*) ac_comsub="1i\\
+# $configure_input" ;;
+ *) ac_comsub= ;;
+ esac
+
+ ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
+ sed -e "$ac_comsub
+s%@configure_input@%$configure_input%g
+s%@srcdir@%$srcdir%g
+s%@top_srcdir@%$top_srcdir%g
+s%@INSTALL@%$INSTALL%g
+" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
+fi; done
+rm -f conftest.s*
+
+
+
+exit 0
--- /dev/null
+#! /bin/sh
+# Configuration validation subroutine script, version 1.1.
+# Copyright (C) 1991, 92, 93, 94, 95, 1996 Free Software Foundation, Inc.
+# This file is (in principle) common to ALL GNU software.
+# The presence of a machine in this file suggests that SOME GNU software
+# can handle that machine. It does not imply ALL GNU software can.
+#
+# This file is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330,
+# Boston, MA 02111-1307, USA.
+
+# As a special exception to the GNU General Public License, if you
+# distribute this file as part of a program that contains a
+# configuration script generated by Autoconf, you may include it under
+# the same distribution terms that you use for the rest of that program.
+
+# Configuration subroutine to validate and canonicalize a configuration type.
+# Supply the specified configuration type as an argument.
+# If it is invalid, we print an error message on stderr and exit with code 1.
+# Otherwise, we print the canonical config type on stdout and succeed.
+
+# This file is supposed to be the same for all GNU packages
+# and recognize all the CPU types, system types and aliases
+# that are meaningful with *any* GNU software.
+# Each package is responsible for reporting which valid configurations
+# it does not support. The user should be able to distinguish
+# a failure to support a valid configuration from a meaningless
+# configuration.
+
+# The goal of this file is to map all the various variations of a given
+# machine specification into a single specification in the form:
+# CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM
+# or in some cases, the newer four-part form:
+# CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM
+# It is wrong to echo any other type of specification.
+
+if [ x$1 = x ]
+then
+ echo Configuration name missing. 1>&2
+ echo "Usage: $0 CPU-MFR-OPSYS" 1>&2
+ echo "or $0 ALIAS" 1>&2
+ echo where ALIAS is a recognized configuration type. 1>&2
+ exit 1
+fi
+
+# First pass through any local machine types.
+case $1 in
+ *local*)
+ echo $1
+ exit 0
+ ;;
+ *)
+ ;;
+esac
+
+# Separate what the user gave into CPU-COMPANY and OS or KERNEL-OS (if any).
+# Here we must recognize all the valid KERNEL-OS combinations.
+maybe_os=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\2/'`
+case $maybe_os in
+ linux-gnu*)
+ os=-$maybe_os
+ basic_machine=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\1/'`
+ ;;
+ *)
+ basic_machine=`echo $1 | sed 's/-[^-]*$//'`
+ if [ $basic_machine != $1 ]
+ then os=`echo $1 | sed 's/.*-/-/'`
+ else os=; fi
+ ;;
+esac
+
+### Let's recognize common machines as not being operating systems so
+### that things like config.sub decstation-3100 work. We also
+### recognize some manufacturers as not being operating systems, so we
+### can provide default operating systems below.
+case $os in
+ -sun*os*)
+ # Prevent following clause from handling this invalid input.
+ ;;
+ -dec* | -mips* | -sequent* | -encore* | -pc532* | -sgi* | -sony* | \
+ -att* | -7300* | -3300* | -delta* | -motorola* | -sun[234]* | \
+ -unicom* | -ibm* | -next | -hp | -isi* | -apollo | -altos* | \
+ -convergent* | -ncr* | -news | -32* | -3600* | -3100* | -hitachi* |\
+ -c[123]* | -convex* | -sun | -crds | -omron* | -dg | -ultra | -tti* | \
+ -harris | -dolphin | -highlevel | -gould | -cbm | -ns | -masscomp | \
+ -apple)
+ os=
+ basic_machine=$1
+ ;;
+ -hiux*)
+ os=-hiuxwe2
+ ;;
+ -sco5)
+ os=sco3.2v5
+ basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+ ;;
+ -sco4)
+ os=-sco3.2v4
+ basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+ ;;
+ -sco3.2.[4-9]*)
+ os=`echo $os | sed -e 's/sco3.2./sco3.2v/'`
+ basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+ ;;
+ -sco3.2v[4-9]*)
+ # Don't forget version if it is 3.2v4 or newer.
+ basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+ ;;
+ -sco*)
+ os=-sco3.2v2
+ basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+ ;;
+ -isc)
+ os=-isc2.2
+ basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+ ;;
+ -clix*)
+ basic_machine=clipper-intergraph
+ ;;
+ -isc*)
+ basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'`
+ ;;
+ -lynx*)
+ os=-lynxos
+ ;;
+ -ptx*)
+ basic_machine=`echo $1 | sed -e 's/86-.*/86-sequent/'`
+ ;;
+ -windowsnt*)
+ os=`echo $os | sed -e 's/windowsnt/winnt/'`
+ ;;
+ -psos*)
+ os=-psos
+ ;;
+esac
+
+# Decode aliases for certain CPU-COMPANY combinations.
+case $basic_machine in
+ # Recognize the basic CPU types without company name.
+ # Some are omitted here because they have special meanings below.
+ tahoe | i860 | m68k | m68000 | m88k | ns32k | arm \
+ | arme[lb] | pyramid \
+ | tron | a29k | 580 | i960 | h8300 | hppa | hppa1.0 | hppa1.1 \
+ | alpha | we32k | ns16k | clipper | i370 | sh \
+ | powerpc | powerpcle | 1750a | dsp16xx | mips64 | mipsel \
+ | pdp11 | mips64el | mips64orion | mips64orionel \
+ | sparc | sparclet | sparclite | sparc64)
+ basic_machine=$basic_machine-unknown
+ ;;
+ # We use `pc' rather than `unknown'
+ # because (1) that's what they normally are, and
+ # (2) the word "unknown" tends to confuse beginning users.
+ i[3456]86)
+ basic_machine=$basic_machine-pc
+ ;;
+ # Object if more than one company name word.
+ *-*-*)
+ echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2
+ exit 1
+ ;;
+ # Recognize the basic CPU types with company name.
+ vax-* | tahoe-* | i[3456]86-* | i860-* | m68k-* | m68000-* | m88k-* \
+ | sparc-* | ns32k-* | fx80-* | arm-* | c[123]* \
+ | mips-* | pyramid-* | tron-* | a29k-* | romp-* | rs6000-* | power-* \
+ | none-* | 580-* | cray2-* | h8300-* | i960-* | xmp-* | ymp-* \
+ | hppa-* | hppa1.0-* | hppa1.1-* | alpha-* | we32k-* | cydra-* | ns16k-* \
+ | pn-* | np1-* | xps100-* | clipper-* | orion-* | sparclite-* \
+ | pdp11-* | sh-* | powerpc-* | powerpcle-* | sparc64-* | mips64-* | mipsel-* \
+ | mips64el-* | mips64orion-* | mips64orionel-* | f301-*)
+ ;;
+ # Recognize the various machine names and aliases which stand
+ # for a CPU type and a company and sometimes even an OS.
+ 3b1 | 7300 | 7300-att | att-7300 | pc7300 | safari | unixpc)
+ basic_machine=m68000-att
+ ;;
+ 3b*)
+ basic_machine=we32k-att
+ ;;
+ alliant | fx80)
+ basic_machine=fx80-alliant
+ ;;
+ altos | altos3068)
+ basic_machine=m68k-altos
+ ;;
+ am29k)
+ basic_machine=a29k-none
+ os=-bsd
+ ;;
+ amdahl)
+ basic_machine=580-amdahl
+ os=-sysv
+ ;;
+ amiga | amiga-*)
+ basic_machine=m68k-cbm
+ ;;
+ amigados)
+ basic_machine=m68k-cbm
+ os=-amigados
+ ;;
+ amigaunix | amix)
+ basic_machine=m68k-cbm
+ os=-sysv4
+ ;;
+ apollo68)
+ basic_machine=m68k-apollo
+ os=-sysv
+ ;;
+ aux)
+ basic_machine=m68k-apple
+ os=-aux
+ ;;
+ balance)
+ basic_machine=ns32k-sequent
+ os=-dynix
+ ;;
+ convex-c1)
+ basic_machine=c1-convex
+ os=-bsd
+ ;;
+ convex-c2)
+ basic_machine=c2-convex
+ os=-bsd
+ ;;
+ convex-c32)
+ basic_machine=c32-convex
+ os=-bsd
+ ;;
+ convex-c34)
+ basic_machine=c34-convex
+ os=-bsd
+ ;;
+ convex-c38)
+ basic_machine=c38-convex
+ os=-bsd
+ ;;
+ cray | ymp)
+ basic_machine=ymp-cray
+ os=-unicos
+ ;;
+ cray2)
+ basic_machine=cray2-cray
+ os=-unicos
+ ;;
+ [ctj]90-cray)
+ basic_machine=c90-cray
+ os=-unicos
+ ;;
+ crds | unos)
+ basic_machine=m68k-crds
+ ;;
+ da30 | da30-*)
+ basic_machine=m68k-da30
+ ;;
+ decstation | decstation-3100 | pmax | pmax-* | pmin | dec3100 | decstatn)
+ basic_machine=mips-dec
+ ;;
+ delta | 3300 | motorola-3300 | motorola-delta \
+ | 3300-motorola | delta-motorola)
+ basic_machine=m68k-motorola
+ ;;
+ delta88)
+ basic_machine=m88k-motorola
+ os=-sysv3
+ ;;
+ dpx20 | dpx20-*)
+ basic_machine=rs6000-bull
+ os=-bosx
+ ;;
+ dpx2* | dpx2*-bull)
+ basic_machine=m68k-bull
+ os=-sysv3
+ ;;
+ ebmon29k)
+ basic_machine=a29k-amd
+ os=-ebmon
+ ;;
+ elxsi)
+ basic_machine=elxsi-elxsi
+ os=-bsd
+ ;;
+ encore | umax | mmax)
+ basic_machine=ns32k-encore
+ ;;
+ fx2800)
+ basic_machine=i860-alliant
+ ;;
+ genix)
+ basic_machine=ns32k-ns
+ ;;
+ gmicro)
+ basic_machine=tron-gmicro
+ os=-sysv
+ ;;
+ h3050r* | hiux*)
+ basic_machine=hppa1.1-hitachi
+ os=-hiuxwe2
+ ;;
+ h8300hms)
+ basic_machine=h8300-hitachi
+ os=-hms
+ ;;
+ harris)
+ basic_machine=m88k-harris
+ os=-sysv3
+ ;;
+ hp300-*)
+ basic_machine=m68k-hp
+ ;;
+ hp300bsd)
+ basic_machine=m68k-hp
+ os=-bsd
+ ;;
+ hp300hpux)
+ basic_machine=m68k-hp
+ os=-hpux
+ ;;
+ hp9k2[0-9][0-9] | hp9k31[0-9])
+ basic_machine=m68000-hp
+ ;;
+ hp9k3[2-9][0-9])
+ basic_machine=m68k-hp
+ ;;
+ hp9k7[0-9][0-9] | hp7[0-9][0-9] | hp9k8[0-9]7 | hp8[0-9]7)
+ basic_machine=hppa1.1-hp
+ ;;
+ hp9k8[0-9][0-9] | hp8[0-9][0-9])
+ basic_machine=hppa1.0-hp
+ ;;
+ hppa-next)
+ os=-nextstep3
+ ;;
+ i370-ibm* | ibm*)
+ basic_machine=i370-ibm
+ os=-mvs
+ ;;
+# I'm not sure what "Sysv32" means. Should this be sysv3.2?
+ i[3456]86v32)
+ basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
+ os=-sysv32
+ ;;
+ i[3456]86v4*)
+ basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
+ os=-sysv4
+ ;;
+ i[3456]86v)
+ basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
+ os=-sysv
+ ;;
+ i[3456]86sol2)
+ basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'`
+ os=-solaris2
+ ;;
+ iris | iris4d)
+ basic_machine=mips-sgi
+ case $os in
+ -irix*)
+ ;;
+ *)
+ os=-irix4
+ ;;
+ esac
+ ;;
+ isi68 | isi)
+ basic_machine=m68k-isi
+ os=-sysv
+ ;;
+ m88k-omron*)
+ basic_machine=m88k-omron
+ ;;
+ magnum | m3230)
+ basic_machine=mips-mips
+ os=-sysv
+ ;;
+ merlin)
+ basic_machine=ns32k-utek
+ os=-sysv
+ ;;
+ miniframe)
+ basic_machine=m68000-convergent
+ ;;
+ mips3*-*)
+ basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'`
+ ;;
+ mips3*)
+ basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'`-unknown
+ ;;
+ ncr3000)
+ basic_machine=i486-ncr
+ os=-sysv4
+ ;;
+ news | news700 | news800 | news900)
+ basic_machine=m68k-sony
+ os=-newsos
+ ;;
+ news1000)
+ basic_machine=m68030-sony
+ os=-newsos
+ ;;
+ news-3600 | risc-news)
+ basic_machine=mips-sony
+ os=-newsos
+ ;;
+ next | m*-next )
+ basic_machine=m68k-next
+ case $os in
+ -nextstep* )
+ ;;
+ -ns2*)
+ os=-nextstep2
+ ;;
+ *)
+ os=-nextstep3
+ ;;
+ esac
+ ;;
+ nh3000)
+ basic_machine=m68k-harris
+ os=-cxux
+ ;;
+ nh[45]000)
+ basic_machine=m88k-harris
+ os=-cxux
+ ;;
+ nindy960)
+ basic_machine=i960-intel
+ os=-nindy
+ ;;
+ np1)
+ basic_machine=np1-gould
+ ;;
+ pa-hitachi)
+ basic_machine=hppa1.1-hitachi
+ os=-hiuxwe2
+ ;;
+ paragon)
+ basic_machine=i860-intel
+ os=-osf
+ ;;
+ pbd)
+ basic_machine=sparc-tti
+ ;;
+ pbb)
+ basic_machine=m68k-tti
+ ;;
+ pc532 | pc532-*)
+ basic_machine=ns32k-pc532
+ ;;
+ pentium | p5)
+ basic_machine=i586-intel
+ ;;
+ pentiumpro | p6)
+ basic_machine=i686-intel
+ ;;
+ pentium-* | p5-*)
+ basic_machine=i586-`echo $basic_machine | sed 's/^[^-]*-//'`
+ ;;
+ pentiumpro-* | p6-*)
+ basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'`
+ ;;
+ k5)
+ # We don't have specific support for AMD's K5 yet, so just call it a Pentium
+ basic_machine=i586-amd
+ ;;
+ nexen)
+ # We don't have specific support for Nexgen yet, so just call it a Pentium
+ basic_machine=i586-nexgen
+ ;;
+ pn)
+ basic_machine=pn-gould
+ ;;
+ power) basic_machine=rs6000-ibm
+ ;;
+ ppc) basic_machine=powerpc-unknown
+ ;;
+ ppc-*) basic_machine=powerpc-`echo $basic_machine | sed 's/^[^-]*-//'`
+ ;;
+ ppcle | powerpclittle | ppc-le | powerpc-little)
+ basic_machine=powerpcle-unknown
+ ;;
+ ppcle-* | powerpclittle-*)
+ basic_machine=powerpcle-`echo $basic_machine | sed 's/^[^-]*-//'`
+ ;;
+ ps2)
+ basic_machine=i386-ibm
+ ;;
+ rm[46]00)
+ basic_machine=mips-siemens
+ ;;
+ rtpc | rtpc-*)
+ basic_machine=romp-ibm
+ ;;
+ sequent)
+ basic_machine=i386-sequent
+ ;;
+ sh)
+ basic_machine=sh-hitachi
+ os=-hms
+ ;;
+ sps7)
+ basic_machine=m68k-bull
+ os=-sysv2
+ ;;
+ spur)
+ basic_machine=spur-unknown
+ ;;
+ sun2)
+ basic_machine=m68000-sun
+ ;;
+ sun2os3)
+ basic_machine=m68000-sun
+ os=-sunos3
+ ;;
+ sun2os4)
+ basic_machine=m68000-sun
+ os=-sunos4
+ ;;
+ sun3os3)
+ basic_machine=m68k-sun
+ os=-sunos3
+ ;;
+ sun3os4)
+ basic_machine=m68k-sun
+ os=-sunos4
+ ;;
+ sun4os3)
+ basic_machine=sparc-sun
+ os=-sunos3
+ ;;
+ sun4os4)
+ basic_machine=sparc-sun
+ os=-sunos4
+ ;;
+ sun4sol2)
+ basic_machine=sparc-sun
+ os=-solaris2
+ ;;
+ sun3 | sun3-*)
+ basic_machine=m68k-sun
+ ;;
+ sun4)
+ basic_machine=sparc-sun
+ ;;
+ sun386 | sun386i | roadrunner)
+ basic_machine=i386-sun
+ ;;
+ symmetry)
+ basic_machine=i386-sequent
+ os=-dynix
+ ;;
+ tower | tower-32)
+ basic_machine=m68k-ncr
+ ;;
+ udi29k)
+ basic_machine=a29k-amd
+ os=-udi
+ ;;
+ ultra3)
+ basic_machine=a29k-nyu
+ os=-sym1
+ ;;
+ vaxv)
+ basic_machine=vax-dec
+ os=-sysv
+ ;;
+ vms)
+ basic_machine=vax-dec
+ os=-vms
+ ;;
+ vpp*|vx|vx-*)
+ basic_machine=f301-fujitsu
+ ;;
+ vxworks960)
+ basic_machine=i960-wrs
+ os=-vxworks
+ ;;
+ vxworks68)
+ basic_machine=m68k-wrs
+ os=-vxworks
+ ;;
+ vxworks29k)
+ basic_machine=a29k-wrs
+ os=-vxworks
+ ;;
+ xmp)
+ basic_machine=xmp-cray
+ os=-unicos
+ ;;
+ xps | xps100)
+ basic_machine=xps100-honeywell
+ ;;
+ none)
+ basic_machine=none-none
+ os=-none
+ ;;
+
+# Here we handle the default manufacturer of certain CPU types. It is in
+# some cases the only manufacturer, in others, it is the most popular.
+ mips)
+ basic_machine=mips-mips
+ ;;
+ romp)
+ basic_machine=romp-ibm
+ ;;
+ rs6000)
+ basic_machine=rs6000-ibm
+ ;;
+ vax)
+ basic_machine=vax-dec
+ ;;
+ pdp11)
+ basic_machine=pdp11-dec
+ ;;
+ we32k)
+ basic_machine=we32k-att
+ ;;
+ sparc)
+ basic_machine=sparc-sun
+ ;;
+ cydra)
+ basic_machine=cydra-cydrome
+ ;;
+ orion)
+ basic_machine=orion-highlevel
+ ;;
+ orion105)
+ basic_machine=clipper-highlevel
+ ;;
+ *)
+ echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2
+ exit 1
+ ;;
+esac
+
+# Here we canonicalize certain aliases for manufacturers.
+case $basic_machine in
+ *-digital*)
+ basic_machine=`echo $basic_machine | sed 's/digital.*/dec/'`
+ ;;
+ *-commodore*)
+ basic_machine=`echo $basic_machine | sed 's/commodore.*/cbm/'`
+ ;;
+ *)
+ ;;
+esac
+
+# Decode manufacturer-specific aliases for certain operating systems.
+
+if [ x"$os" != x"" ]
+then
+case $os in
+ # First match some system type aliases
+ # that might get confused with valid system types.
+ # -solaris* is a basic system type, with this one exception.
+ -solaris1 | -solaris1.*)
+ os=`echo $os | sed -e 's|solaris1|sunos4|'`
+ ;;
+ -solaris)
+ os=-solaris2
+ ;;
+ -unixware* | svr4*)
+ os=-sysv4
+ ;;
+ -gnu/linux*)
+ os=`echo $os | sed -e 's|gnu/linux|linux-gnu|'`
+ ;;
+ # First accept the basic system types.
+ # The portable systems comes first.
+ # Each alternative MUST END IN A *, to match a version number.
+ # -sysv* is not here because it comes later, after sysvr4.
+ -gnu* | -bsd* | -mach* | -minix* | -genix* | -ultrix* | -irix* \
+ | -*vms* | -sco* | -esix* | -isc* | -aix* | -sunos | -sunos[34]*\
+ | -hpux* | -unos* | -osf* | -luna* | -dgux* | -solaris* | -sym* \
+ | -amigados* | -msdos* | -newsos* | -unicos* | -aof* | -aos* \
+ | -nindy* | -vxsim* | -vxworks* | -ebmon* | -hms* | -mvs* \
+ | -clix* | -riscos* | -uniplus* | -iris* | -rtu* | -xenix* \
+ | -hiux* | -386bsd* | -netbsd* | -openbsd* | -freebsd* | -riscix* \
+ | -lynxos* | -bosx* | -nextstep* | -cxux* | -aout* | -elf* \
+ | -ptx* | -coff* | -ecoff* | -winnt* | -domain* | -vsta* \
+ | -udi* | -eabi* | -lites* | -ieee* | -go32* | -aux* \
+ | -cygwin32* | -pe* | -psos* | -moss* | -proelf* | -rtems* \
+ | -linux-gnu* | -uxpv*)
+ # Remember, each alternative MUST END IN *, to match a version number.
+ ;;
+ -linux*)
+ os=`echo $os | sed -e 's|linux|linux-gnu|'`
+ ;;
+ -sunos5*)
+ os=`echo $os | sed -e 's|sunos5|solaris2|'`
+ ;;
+ -sunos6*)
+ os=`echo $os | sed -e 's|sunos6|solaris3|'`
+ ;;
+ -osfrose*)
+ os=-osfrose
+ ;;
+ -osf*)
+ os=-osf
+ ;;
+ -utek*)
+ os=-bsd
+ ;;
+ -dynix*)
+ os=-bsd
+ ;;
+ -acis*)
+ os=-aos
+ ;;
+ -ctix* | -uts*)
+ os=-sysv
+ ;;
+ -ns2 )
+ os=-nextstep2
+ ;;
+ # Preserve the version number of sinix5.
+ -sinix5.*)
+ os=`echo $os | sed -e 's|sinix|sysv|'`
+ ;;
+ -sinix*)
+ os=-sysv4
+ ;;
+ -triton*)
+ os=-sysv3
+ ;;
+ -oss*)
+ os=-sysv3
+ ;;
+ -svr4)
+ os=-sysv4
+ ;;
+ -svr3)
+ os=-sysv3
+ ;;
+ -sysvr4)
+ os=-sysv4
+ ;;
+ # This must come after -sysvr4.
+ -sysv*)
+ ;;
+ -xenix)
+ os=-xenix
+ ;;
+ -none)
+ ;;
+ *)
+ # Get rid of the `-' at the beginning of $os.
+ os=`echo $os | sed 's/[^-]*-//'`
+ echo Invalid configuration \`$1\': system \`$os\' not recognized 1>&2
+ exit 1
+ ;;
+esac
+else
+
+# Here we handle the default operating systems that come with various machines.
+# The value should be what the vendor currently ships out the door with their
+# machine or put another way, the most popular os provided with the machine.
+
+# Note that if you're going to try to match "-MANUFACTURER" here (say,
+# "-sun"), then you have to tell the case statement up towards the top
+# that MANUFACTURER isn't an operating system. Otherwise, code above
+# will signal an error saying that MANUFACTURER isn't an operating
+# system, and we'll never get to this point.
+
+case $basic_machine in
+ *-acorn)
+ os=-riscix1.2
+ ;;
+ arm*-semi)
+ os=-aout
+ ;;
+ pdp11-*)
+ os=-none
+ ;;
+ *-dec | vax-*)
+ os=-ultrix4.2
+ ;;
+ m68*-apollo)
+ os=-domain
+ ;;
+ i386-sun)
+ os=-sunos4.0.2
+ ;;
+ m68000-sun)
+ os=-sunos3
+ # This also exists in the configure program, but was not the
+ # default.
+ # os=-sunos4
+ ;;
+ *-tti) # must be before sparc entry or we get the wrong os.
+ os=-sysv3
+ ;;
+ sparc-* | *-sun)
+ os=-sunos4.1.1
+ ;;
+ *-ibm)
+ os=-aix
+ ;;
+ *-hp)
+ os=-hpux
+ ;;
+ *-hitachi)
+ os=-hiux
+ ;;
+ i860-* | *-att | *-ncr | *-altos | *-motorola | *-convergent)
+ os=-sysv
+ ;;
+ *-cbm)
+ os=-amigados
+ ;;
+ *-dg)
+ os=-dgux
+ ;;
+ *-dolphin)
+ os=-sysv3
+ ;;
+ m68k-ccur)
+ os=-rtu
+ ;;
+ m88k-omron*)
+ os=-luna
+ ;;
+ *-next )
+ os=-nextstep
+ ;;
+ *-sequent)
+ os=-ptx
+ ;;
+ *-crds)
+ os=-unos
+ ;;
+ *-ns)
+ os=-genix
+ ;;
+ i370-*)
+ os=-mvs
+ ;;
+ *-next)
+ os=-nextstep3
+ ;;
+ *-gould)
+ os=-sysv
+ ;;
+ *-highlevel)
+ os=-bsd
+ ;;
+ *-encore)
+ os=-bsd
+ ;;
+ *-sgi)
+ os=-irix
+ ;;
+ *-siemens)
+ os=-sysv4
+ ;;
+ *-masscomp)
+ os=-rtu
+ ;;
+ f301-fujitsu)
+ os=-uxpv
+ ;;
+ *)
+ os=-none
+ ;;
+esac
+fi
+
+# Here we handle the case where we know the os, and the CPU type, but not the
+# manufacturer. We pick the logical manufacturer.
+vendor=unknown
+case $basic_machine in
+ *-unknown)
+ case $os in
+ -riscix*)
+ vendor=acorn
+ ;;
+ -sunos*)
+ vendor=sun
+ ;;
+ -aix*)
+ vendor=ibm
+ ;;
+ -hpux*)
+ vendor=hp
+ ;;
+ -hiux*)
+ vendor=hitachi
+ ;;
+ -unos*)
+ vendor=crds
+ ;;
+ -dgux*)
+ vendor=dg
+ ;;
+ -luna*)
+ vendor=omron
+ ;;
+ -genix*)
+ vendor=ns
+ ;;
+ -mvs*)
+ vendor=ibm
+ ;;
+ -ptx*)
+ vendor=sequent
+ ;;
+ -vxsim* | -vxworks*)
+ vendor=wrs
+ ;;
+ -aux*)
+ vendor=apple
+ ;;
+ esac
+ basic_machine=`echo $basic_machine | sed "s/unknown/$vendor/"`
+ ;;
+esac
+
+echo $basic_machine$os
--- /dev/null
+#! /bin/sh
+
+# Guess values for system-dependent variables and create Makefiles.
+# Generated automatically using autoconf version 2.12
+# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
+#
+# This configure script is free software; the Free Software Foundation
+# gives unlimited permission to copy, distribute and modify it.
+
+# Defaults:
+ac_help=
+ac_default_prefix=/usr/local
+# Any additions from configure.in:
+ac_help="$ac_help
+ --without-gcc don't use gcc"
+ac_help="$ac_help
+ --with-pcap=TYPE use packet capture TYPE"
+ac_help="$ac_help
+ --without-flex don't use flex"
+ac_help="$ac_help
+ --without-bison don't use bison"
+
+# Initialize some variables set by options.
+# The variables have the same names as the options, with
+# dashes changed to underlines.
+build=NONE
+cache_file=./config.cache
+exec_prefix=NONE
+host=NONE
+no_create=
+nonopt=NONE
+no_recursion=
+prefix=NONE
+program_prefix=NONE
+program_suffix=NONE
+program_transform_name=s,x,x,
+silent=
+site=
+srcdir=
+target=NONE
+verbose=
+x_includes=NONE
+x_libraries=NONE
+bindir='${exec_prefix}/bin'
+sbindir='${exec_prefix}/sbin'
+libexecdir='${exec_prefix}/libexec'
+datadir='${prefix}/share'
+sysconfdir='${prefix}/etc'
+sharedstatedir='${prefix}/com'
+localstatedir='${prefix}/var'
+libdir='${exec_prefix}/lib'
+includedir='${prefix}/include'
+oldincludedir='/usr/include'
+infodir='${prefix}/info'
+mandir='${prefix}/man'
+
+# Initialize some other variables.
+subdirs=
+MFLAGS= MAKEFLAGS=
+# Maximum number of lines to put in a shell here document.
+ac_max_here_lines=12
+
+ac_prev=
+for ac_option
+do
+
+ # If the previous option needs an argument, assign it.
+ if test -n "$ac_prev"; then
+ eval "$ac_prev=\$ac_option"
+ ac_prev=
+ continue
+ fi
+
+ case "$ac_option" in
+ -*=*) ac_optarg=`echo "$ac_option" | sed 's/[-_a-zA-Z0-9]*=//'` ;;
+ *) ac_optarg= ;;
+ esac
+
+ # Accept the important Cygnus configure options, so we can diagnose typos.
+
+ case "$ac_option" in
+
+ -bindir | --bindir | --bindi | --bind | --bin | --bi)
+ ac_prev=bindir ;;
+ -bindir=* | --bindir=* | --bindi=* | --bind=* | --bin=* | --bi=*)
+ bindir="$ac_optarg" ;;
+
+ -build | --build | --buil | --bui | --bu)
+ ac_prev=build ;;
+ -build=* | --build=* | --buil=* | --bui=* | --bu=*)
+ build="$ac_optarg" ;;
+
+ -cache-file | --cache-file | --cache-fil | --cache-fi \
+ | --cache-f | --cache- | --cache | --cach | --cac | --ca | --c)
+ ac_prev=cache_file ;;
+ -cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
+ | --cache-f=* | --cache-=* | --cache=* | --cach=* | --cac=* | --ca=* | --c=*)
+ cache_file="$ac_optarg" ;;
+
+ -datadir | --datadir | --datadi | --datad | --data | --dat | --da)
+ ac_prev=datadir ;;
+ -datadir=* | --datadir=* | --datadi=* | --datad=* | --data=* | --dat=* \
+ | --da=*)
+ datadir="$ac_optarg" ;;
+
+ -disable-* | --disable-*)
+ ac_feature=`echo $ac_option|sed -e 's/-*disable-//'`
+ # Reject names that are not valid shell variable names.
+ if test -n "`echo $ac_feature| sed 's/[-a-zA-Z0-9_]//g'`"; then
+ { echo "configure: error: $ac_feature: invalid feature name" 1>&2; exit 1; }
+ fi
+ ac_feature=`echo $ac_feature| sed 's/-/_/g'`
+ eval "enable_${ac_feature}=no" ;;
+
+ -enable-* | --enable-*)
+ ac_feature=`echo $ac_option|sed -e 's/-*enable-//' -e 's/=.*//'`
+ # Reject names that are not valid shell variable names.
+ if test -n "`echo $ac_feature| sed 's/[-_a-zA-Z0-9]//g'`"; then
+ { echo "configure: error: $ac_feature: invalid feature name" 1>&2; exit 1; }
+ fi
+ ac_feature=`echo $ac_feature| sed 's/-/_/g'`
+ case "$ac_option" in
+ *=*) ;;
+ *) ac_optarg=yes ;;
+ esac
+ eval "enable_${ac_feature}='$ac_optarg'" ;;
+
+ -exec-prefix | --exec_prefix | --exec-prefix | --exec-prefi \
+ | --exec-pref | --exec-pre | --exec-pr | --exec-p | --exec- \
+ | --exec | --exe | --ex)
+ ac_prev=exec_prefix ;;
+ -exec-prefix=* | --exec_prefix=* | --exec-prefix=* | --exec-prefi=* \
+ | --exec-pref=* | --exec-pre=* | --exec-pr=* | --exec-p=* | --exec-=* \
+ | --exec=* | --exe=* | --ex=*)
+ exec_prefix="$ac_optarg" ;;
+
+ -gas | --gas | --ga | --g)
+ # Obsolete; use --with-gas.
+ with_gas=yes ;;
+
+ -help | --help | --hel | --he)
+ # Omit some internal or obsolete options to make the list less imposing.
+ # This message is too long to be a string in the A/UX 3.1 sh.
+ cat << EOF
+Usage: configure [options] [host]
+Options: [defaults in brackets after descriptions]
+Configuration:
+ --cache-file=FILE cache test results in FILE
+ --help print this message
+ --no-create do not create output files
+ --quiet, --silent do not print \`checking...' messages
+ --version print the version of autoconf that created configure
+Directory and file names:
+ --prefix=PREFIX install architecture-independent files in PREFIX
+ [$ac_default_prefix]
+ --exec-prefix=EPREFIX install architecture-dependent files in EPREFIX
+ [same as prefix]
+ --bindir=DIR user executables in DIR [EPREFIX/bin]
+ --sbindir=DIR system admin executables in DIR [EPREFIX/sbin]
+ --libexecdir=DIR program executables in DIR [EPREFIX/libexec]
+ --datadir=DIR read-only architecture-independent data in DIR
+ [PREFIX/share]
+ --sysconfdir=DIR read-only single-machine data in DIR [PREFIX/etc]
+ --sharedstatedir=DIR modifiable architecture-independent data in DIR
+ [PREFIX/com]
+ --localstatedir=DIR modifiable single-machine data in DIR [PREFIX/var]
+ --libdir=DIR object code libraries in DIR [EPREFIX/lib]
+ --includedir=DIR C header files in DIR [PREFIX/include]
+ --oldincludedir=DIR C header files for non-gcc in DIR [/usr/include]
+ --infodir=DIR info documentation in DIR [PREFIX/info]
+ --mandir=DIR man documentation in DIR [PREFIX/man]
+ --srcdir=DIR find the sources in DIR [configure dir or ..]
+ --program-prefix=PREFIX prepend PREFIX to installed program names
+ --program-suffix=SUFFIX append SUFFIX to installed program names
+ --program-transform-name=PROGRAM
+ run sed PROGRAM on installed program names
+EOF
+ cat << EOF
+Host type:
+ --build=BUILD configure for building on BUILD [BUILD=HOST]
+ --host=HOST configure for HOST [guessed]
+ --target=TARGET configure for TARGET [TARGET=HOST]
+Features and packages:
+ --disable-FEATURE do not include FEATURE (same as --enable-FEATURE=no)
+ --enable-FEATURE[=ARG] include FEATURE [ARG=yes]
+ --with-PACKAGE[=ARG] use PACKAGE [ARG=yes]
+ --without-PACKAGE do not use PACKAGE (same as --with-PACKAGE=no)
+ --x-includes=DIR X include files are in DIR
+ --x-libraries=DIR X library files are in DIR
+EOF
+ if test -n "$ac_help"; then
+ echo "--enable and --with options recognized:$ac_help"
+ fi
+ exit 0 ;;
+
+ -host | --host | --hos | --ho)
+ ac_prev=host ;;
+ -host=* | --host=* | --hos=* | --ho=*)
+ host="$ac_optarg" ;;
+
+ -includedir | --includedir | --includedi | --included | --include \
+ | --includ | --inclu | --incl | --inc)
+ ac_prev=includedir ;;
+ -includedir=* | --includedir=* | --includedi=* | --included=* | --include=* \
+ | --includ=* | --inclu=* | --incl=* | --inc=*)
+ includedir="$ac_optarg" ;;
+
+ -infodir | --infodir | --infodi | --infod | --info | --inf)
+ ac_prev=infodir ;;
+ -infodir=* | --infodir=* | --infodi=* | --infod=* | --info=* | --inf=*)
+ infodir="$ac_optarg" ;;
+
+ -libdir | --libdir | --libdi | --libd)
+ ac_prev=libdir ;;
+ -libdir=* | --libdir=* | --libdi=* | --libd=*)
+ libdir="$ac_optarg" ;;
+
+ -libexecdir | --libexecdir | --libexecdi | --libexecd | --libexec \
+ | --libexe | --libex | --libe)
+ ac_prev=libexecdir ;;
+ -libexecdir=* | --libexecdir=* | --libexecdi=* | --libexecd=* | --libexec=* \
+ | --libexe=* | --libex=* | --libe=*)
+ libexecdir="$ac_optarg" ;;
+
+ -localstatedir | --localstatedir | --localstatedi | --localstated \
+ | --localstate | --localstat | --localsta | --localst \
+ | --locals | --local | --loca | --loc | --lo)
+ ac_prev=localstatedir ;;
+ -localstatedir=* | --localstatedir=* | --localstatedi=* | --localstated=* \
+ | --localstate=* | --localstat=* | --localsta=* | --localst=* \
+ | --locals=* | --local=* | --loca=* | --loc=* | --lo=*)
+ localstatedir="$ac_optarg" ;;
+
+ -mandir | --mandir | --mandi | --mand | --man | --ma | --m)
+ ac_prev=mandir ;;
+ -mandir=* | --mandir=* | --mandi=* | --mand=* | --man=* | --ma=* | --m=*)
+ mandir="$ac_optarg" ;;
+
+ -nfp | --nfp | --nf)
+ # Obsolete; use --without-fp.
+ with_fp=no ;;
+
+ -no-create | --no-create | --no-creat | --no-crea | --no-cre \
+ | --no-cr | --no-c)
+ no_create=yes ;;
+
+ -no-recursion | --no-recursion | --no-recursio | --no-recursi \
+ | --no-recurs | --no-recur | --no-recu | --no-rec | --no-re | --no-r)
+ no_recursion=yes ;;
+
+ -oldincludedir | --oldincludedir | --oldincludedi | --oldincluded \
+ | --oldinclude | --oldinclud | --oldinclu | --oldincl | --oldinc \
+ | --oldin | --oldi | --old | --ol | --o)
+ ac_prev=oldincludedir ;;
+ -oldincludedir=* | --oldincludedir=* | --oldincludedi=* | --oldincluded=* \
+ | --oldinclude=* | --oldinclud=* | --oldinclu=* | --oldincl=* | --oldinc=* \
+ | --oldin=* | --oldi=* | --old=* | --ol=* | --o=*)
+ oldincludedir="$ac_optarg" ;;
+
+ -prefix | --prefix | --prefi | --pref | --pre | --pr | --p)
+ ac_prev=prefix ;;
+ -prefix=* | --prefix=* | --prefi=* | --pref=* | --pre=* | --pr=* | --p=*)
+ prefix="$ac_optarg" ;;
+
+ -program-prefix | --program-prefix | --program-prefi | --program-pref \
+ | --program-pre | --program-pr | --program-p)
+ ac_prev=program_prefix ;;
+ -program-prefix=* | --program-prefix=* | --program-prefi=* \
+ | --program-pref=* | --program-pre=* | --program-pr=* | --program-p=*)
+ program_prefix="$ac_optarg" ;;
+
+ -program-suffix | --program-suffix | --program-suffi | --program-suff \
+ | --program-suf | --program-su | --program-s)
+ ac_prev=program_suffix ;;
+ -program-suffix=* | --program-suffix=* | --program-suffi=* \
+ | --program-suff=* | --program-suf=* | --program-su=* | --program-s=*)
+ program_suffix="$ac_optarg" ;;
+
+ -program-transform-name | --program-transform-name \
+ | --program-transform-nam | --program-transform-na \
+ | --program-transform-n | --program-transform- \
+ | --program-transform | --program-transfor \
+ | --program-transfo | --program-transf \
+ | --program-trans | --program-tran \
+ | --progr-tra | --program-tr | --program-t)
+ ac_prev=program_transform_name ;;
+ -program-transform-name=* | --program-transform-name=* \
+ | --program-transform-nam=* | --program-transform-na=* \
+ | --program-transform-n=* | --program-transform-=* \
+ | --program-transform=* | --program-transfor=* \
+ | --program-transfo=* | --program-transf=* \
+ | --program-trans=* | --program-tran=* \
+ | --progr-tra=* | --program-tr=* | --program-t=*)
+ program_transform_name="$ac_optarg" ;;
+
+ -q | -quiet | --quiet | --quie | --qui | --qu | --q \
+ | -silent | --silent | --silen | --sile | --sil)
+ silent=yes ;;
+
+ -sbindir | --sbindir | --sbindi | --sbind | --sbin | --sbi | --sb)
+ ac_prev=sbindir ;;
+ -sbindir=* | --sbindir=* | --sbindi=* | --sbind=* | --sbin=* \
+ | --sbi=* | --sb=*)
+ sbindir="$ac_optarg" ;;
+
+ -sharedstatedir | --sharedstatedir | --sharedstatedi \
+ | --sharedstated | --sharedstate | --sharedstat | --sharedsta \
+ | --sharedst | --shareds | --shared | --share | --shar \
+ | --sha | --sh)
+ ac_prev=sharedstatedir ;;
+ -sharedstatedir=* | --sharedstatedir=* | --sharedstatedi=* \
+ | --sharedstated=* | --sharedstate=* | --sharedstat=* | --sharedsta=* \
+ | --sharedst=* | --shareds=* | --shared=* | --share=* | --shar=* \
+ | --sha=* | --sh=*)
+ sharedstatedir="$ac_optarg" ;;
+
+ -site | --site | --sit)
+ ac_prev=site ;;
+ -site=* | --site=* | --sit=*)
+ site="$ac_optarg" ;;
+
+ -srcdir | --srcdir | --srcdi | --srcd | --src | --sr)
+ ac_prev=srcdir ;;
+ -srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*)
+ srcdir="$ac_optarg" ;;
+
+ -sysconfdir | --sysconfdir | --sysconfdi | --sysconfd | --sysconf \
+ | --syscon | --sysco | --sysc | --sys | --sy)
+ ac_prev=sysconfdir ;;
+ -sysconfdir=* | --sysconfdir=* | --sysconfdi=* | --sysconfd=* | --sysconf=* \
+ | --syscon=* | --sysco=* | --sysc=* | --sys=* | --sy=*)
+ sysconfdir="$ac_optarg" ;;
+
+ -target | --target | --targe | --targ | --tar | --ta | --t)
+ ac_prev=target ;;
+ -target=* | --target=* | --targe=* | --targ=* | --tar=* | --ta=* | --t=*)
+ target="$ac_optarg" ;;
+
+ -v | -verbose | --verbose | --verbos | --verbo | --verb)
+ verbose=yes ;;
+
+ -version | --version | --versio | --versi | --vers)
+ echo "configure generated by autoconf version 2.12"
+ exit 0 ;;
+
+ -with-* | --with-*)
+ ac_package=`echo $ac_option|sed -e 's/-*with-//' -e 's/=.*//'`
+ # Reject names that are not valid shell variable names.
+ if test -n "`echo $ac_package| sed 's/[-_a-zA-Z0-9]//g'`"; then
+ { echo "configure: error: $ac_package: invalid package name" 1>&2; exit 1; }
+ fi
+ ac_package=`echo $ac_package| sed 's/-/_/g'`
+ case "$ac_option" in
+ *=*) ;;
+ *) ac_optarg=yes ;;
+ esac
+ eval "with_${ac_package}='$ac_optarg'" ;;
+
+ -without-* | --without-*)
+ ac_package=`echo $ac_option|sed -e 's/-*without-//'`
+ # Reject names that are not valid shell variable names.
+ if test -n "`echo $ac_package| sed 's/[-a-zA-Z0-9_]//g'`"; then
+ { echo "configure: error: $ac_package: invalid package name" 1>&2; exit 1; }
+ fi
+ ac_package=`echo $ac_package| sed 's/-/_/g'`
+ eval "with_${ac_package}=no" ;;
+
+ --x)
+ # Obsolete; use --with-x.
+ with_x=yes ;;
+
+ -x-includes | --x-includes | --x-include | --x-includ | --x-inclu \
+ | --x-incl | --x-inc | --x-in | --x-i)
+ ac_prev=x_includes ;;
+ -x-includes=* | --x-includes=* | --x-include=* | --x-includ=* | --x-inclu=* \
+ | --x-incl=* | --x-inc=* | --x-in=* | --x-i=*)
+ x_includes="$ac_optarg" ;;
+
+ -x-libraries | --x-libraries | --x-librarie | --x-librari \
+ | --x-librar | --x-libra | --x-libr | --x-lib | --x-li | --x-l)
+ ac_prev=x_libraries ;;
+ -x-libraries=* | --x-libraries=* | --x-librarie=* | --x-librari=* \
+ | --x-librar=* | --x-libra=* | --x-libr=* | --x-lib=* | --x-li=* | --x-l=*)
+ x_libraries="$ac_optarg" ;;
+
+ -*) { echo "configure: error: $ac_option: invalid option; use --help to show usage" 1>&2; exit 1; }
+ ;;
+
+ *)
+ if test -n "`echo $ac_option| sed 's/[-a-z0-9.]//g'`"; then
+ echo "configure: warning: $ac_option: invalid host type" 1>&2
+ fi
+ if test "x$nonopt" != xNONE; then
+ { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; }
+ fi
+ nonopt="$ac_option"
+ ;;
+
+ esac
+done
+
+if test -n "$ac_prev"; then
+ { echo "configure: error: missing argument to --`echo $ac_prev | sed 's/_/-/g'`" 1>&2; exit 1; }
+fi
+
+trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
+
+# File descriptor usage:
+# 0 standard input
+# 1 file creation
+# 2 errors and warnings
+# 3 some systems may open it to /dev/tty
+# 4 used on the Kubota Titan
+# 6 checking for... messages and results
+# 5 compiler messages saved in config.log
+if test "$silent" = yes; then
+ exec 6>/dev/null
+else
+ exec 6>&1
+fi
+exec 5>./config.log
+
+echo "\
+This file contains any messages produced by compilers while
+running configure, to aid debugging if configure makes a mistake.
+" 1>&5
+
+# Strip out --no-create and --no-recursion so they do not pile up.
+# Also quote any args containing shell metacharacters.
+ac_configure_args=
+for ac_arg
+do
+ case "$ac_arg" in
+ -no-create | --no-create | --no-creat | --no-crea | --no-cre \
+ | --no-cr | --no-c) ;;
+ -no-recursion | --no-recursion | --no-recursio | --no-recursi \
+ | --no-recurs | --no-recur | --no-recu | --no-rec | --no-re | --no-r) ;;
+ *" "*|*" "*|*[\[\]\~\#\$\^\&\*\(\)\{\}\\\|\;\<\>\?]*)
+ ac_configure_args="$ac_configure_args '$ac_arg'" ;;
+ *) ac_configure_args="$ac_configure_args $ac_arg" ;;
+ esac
+done
+
+# NLS nuisances.
+# Only set these to C if already set. These must not be set unconditionally
+# because not all systems understand e.g. LANG=C (notably SCO).
+# Fixing LC_MESSAGES prevents Solaris sh from translating var values in `set'!
+# Non-C LC_CTYPE values break the ctype check.
+if test "${LANG+set}" = set; then LANG=C; export LANG; fi
+if test "${LC_ALL+set}" = set; then LC_ALL=C; export LC_ALL; fi
+if test "${LC_MESSAGES+set}" = set; then LC_MESSAGES=C; export LC_MESSAGES; fi
+if test "${LC_CTYPE+set}" = set; then LC_CTYPE=C; export LC_CTYPE; fi
+
+# confdefs.h avoids OS command line length limits that DEFS can exceed.
+rm -rf conftest* confdefs.h
+# AIX cpp loses on an empty file, so make sure it contains at least a newline.
+echo > confdefs.h
+
+# A filename unique to this package, relative to the directory that
+# configure is in, which we can look for to find out if srcdir is correct.
+ac_unique_file=pcap.c
+
+# Find the source files, if location was not specified.
+if test -z "$srcdir"; then
+ ac_srcdir_defaulted=yes
+ # Try the directory containing this script, then its parent.
+ ac_prog=$0
+ ac_confdir=`echo $ac_prog|sed 's%/[^/][^/]*$%%'`
+ test "x$ac_confdir" = "x$ac_prog" && ac_confdir=.
+ srcdir=$ac_confdir
+ if test ! -r $srcdir/$ac_unique_file; then
+ srcdir=..
+ fi
+else
+ ac_srcdir_defaulted=no
+fi
+if test ! -r $srcdir/$ac_unique_file; then
+ if test "$ac_srcdir_defaulted" = yes; then
+ { echo "configure: error: can not find sources in $ac_confdir or .." 1>&2; exit 1; }
+ else
+ { echo "configure: error: can not find sources in $srcdir" 1>&2; exit 1; }
+ fi
+fi
+srcdir=`echo "${srcdir}" | sed 's%\([^/]\)/*$%\1%'`
+
+# Prefer explicitly selected file to automatically selected ones.
+if test -z "$CONFIG_SITE"; then
+ if test "x$prefix" != xNONE; then
+ CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site"
+ else
+ CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site"
+ fi
+fi
+for ac_site_file in $CONFIG_SITE; do
+ if test -r "$ac_site_file"; then
+ echo "loading site script $ac_site_file"
+ . "$ac_site_file"
+ fi
+done
+
+if test -r "$cache_file"; then
+ echo "loading cache $cache_file"
+ . $cache_file
+else
+ echo "creating cache $cache_file"
+ > $cache_file
+fi
+
+ac_ext=c
+# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
+ac_link='${CC-cc} -o conftest $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
+cross_compiling=$ac_cv_prog_cc_cross
+
+if (echo "testing\c"; echo 1,2,3) | grep c >/dev/null; then
+ # Stardent Vistra SVR4 grep lacks -e, says ghazi@caip.rutgers.edu.
+ if (echo -n testing; echo 1,2,3) | sed s/-n/xn/ | grep xn >/dev/null; then
+ ac_n= ac_c='
+' ac_t=' '
+ else
+ ac_n=-n ac_c= ac_t=
+ fi
+else
+ ac_n= ac_c='\c' ac_t=
+fi
+
+
+
+ac_aux_dir=
+for ac_dir in $srcdir $srcdir/.. $srcdir/../..; do
+ if test -f $ac_dir/install-sh; then
+ ac_aux_dir=$ac_dir
+ ac_install_sh="$ac_aux_dir/install-sh -c"
+ break
+ elif test -f $ac_dir/install.sh; then
+ ac_aux_dir=$ac_dir
+ ac_install_sh="$ac_aux_dir/install.sh -c"
+ break
+ fi
+done
+if test -z "$ac_aux_dir"; then
+ { echo "configure: error: can not find install-sh or install.sh in $srcdir $srcdir/.. $srcdir/../.." 1>&2; exit 1; }
+fi
+ac_config_guess=$ac_aux_dir/config.guess
+ac_config_sub=$ac_aux_dir/config.sub
+ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
+
+
+# Do some error checking and defaulting for the host and target type.
+# The inputs are:
+# configure --host=HOST --target=TARGET --build=BUILD NONOPT
+#
+# The rules are:
+# 1. You are not allowed to specify --host, --target, and nonopt at the
+# same time.
+# 2. Host defaults to nonopt.
+# 3. If nonopt is not specified, then host defaults to the current host,
+# as determined by config.guess.
+# 4. Target and build default to nonopt.
+# 5. If nonopt is not specified, then target and build default to host.
+
+# The aliases save the names the user supplied, while $host etc.
+# will get canonicalized.
+case $host---$target---$nonopt in
+NONE---*---* | *---NONE---* | *---*---NONE) ;;
+*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
+esac
+
+
+# Make sure we can run config.sub.
+if $ac_config_sub sun4 >/dev/null 2>&1; then :
+else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
+fi
+
+echo $ac_n "checking host system type""... $ac_c" 1>&6
+echo "configure:578: checking host system type" >&5
+
+host_alias=$host
+case "$host_alias" in
+NONE)
+ case $nonopt in
+ NONE)
+ if host_alias=`$ac_config_guess`; then :
+ else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
+ fi ;;
+ *) host_alias=$nonopt ;;
+ esac ;;
+esac
+
+host=`$ac_config_sub $host_alias`
+host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
+host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
+host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
+echo "$ac_t""$host" 1>&6
+
+echo $ac_n "checking target system type""... $ac_c" 1>&6
+echo "configure:599: checking target system type" >&5
+
+target_alias=$target
+case "$target_alias" in
+NONE)
+ case $nonopt in
+ NONE) target_alias=$host_alias ;;
+ *) target_alias=$nonopt ;;
+ esac ;;
+esac
+
+target=`$ac_config_sub $target_alias`
+target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
+target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
+target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
+echo "$ac_t""$target" 1>&6
+
+echo $ac_n "checking build system type""... $ac_c" 1>&6
+echo "configure:617: checking build system type" >&5
+
+build_alias=$build
+case "$build_alias" in
+NONE)
+ case $nonopt in
+ NONE) build_alias=$host_alias ;;
+ *) build_alias=$nonopt ;;
+ esac ;;
+esac
+
+build=`$ac_config_sub $build_alias`
+build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
+build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
+build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
+echo "$ac_t""$build" 1>&6
+
+test "$host_alias" != "$target_alias" &&
+ test "$program_prefix$program_suffix$program_transform_name" = \
+ NONENONEs,x,x, &&
+ program_prefix=${target_alias}-
+
+
+umask 002
+
+if test -z "$PWD" ; then
+ PWD=`pwd`
+fi
+
+
+
+
+
+ # Check whether --with-gcc or --without-gcc was given.
+if test "${with_gcc+set}" = set; then
+ withval="$with_gcc"
+ :
+fi
+
+ V_CCOPT="-O"
+ V_INCLS=""
+ if test "${srcdir}" != "." ; then
+ V_INCLS="-I\$\(srcdir\)"
+ fi
+ if test "${CFLAGS+set}" = set; then
+ LBL_CFLAGS="$CFLAGS"
+ fi
+ if test -z "$CC" ; then
+ case "$target_os" in
+
+ bsdi*)
+ # Extract the first word of "shlicc2", so it can be a program name with args.
+set dummy shlicc2; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:671: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_SHLICC2'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ if test -n "$SHLICC2"; then
+ ac_cv_prog_SHLICC2="$SHLICC2" # Let the user override the test.
+else
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
+ for ac_dir in $PATH; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_prog_SHLICC2="yes"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+ test -z "$ac_cv_prog_SHLICC2" && ac_cv_prog_SHLICC2="no"
+fi
+fi
+SHLICC2="$ac_cv_prog_SHLICC2"
+if test -n "$SHLICC2"; then
+ echo "$ac_t""$SHLICC2" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+ if test $SHLICC2 = yes ; then
+ CC=shlicc2
+ export CC
+ fi
+ ;;
+ esac
+ fi
+ if test -z "$CC" -a "$with_gcc" = no ; then
+ CC=cc
+ export CC
+ fi
+ # Extract the first word of "gcc", so it can be a program name with args.
+set dummy gcc; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:711: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ if test -n "$CC"; then
+ ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
+ for ac_dir in $PATH; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_prog_CC="gcc"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+fi
+fi
+CC="$ac_cv_prog_CC"
+if test -n "$CC"; then
+ echo "$ac_t""$CC" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+if test -z "$CC"; then
+ # Extract the first word of "cc", so it can be a program name with args.
+set dummy cc; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:740: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ if test -n "$CC"; then
+ ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
+ ac_prog_rejected=no
+ for ac_dir in $PATH; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then
+ ac_prog_rejected=yes
+ continue
+ fi
+ ac_cv_prog_CC="cc"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+if test $ac_prog_rejected = yes; then
+ # We found a bogon in the path, so make sure we never use it.
+ set dummy $ac_cv_prog_CC
+ shift
+ if test $# -gt 0; then
+ # We chose a different compiler from the bogus one.
+ # However, it has the same basename, so the bogon will be chosen
+ # first if we set CC to just the basename; use the full file name.
+ shift
+ set dummy "$ac_dir/$ac_word" "$@"
+ shift
+ ac_cv_prog_CC="$@"
+ fi
+fi
+fi
+fi
+CC="$ac_cv_prog_CC"
+if test -n "$CC"; then
+ echo "$ac_t""$CC" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+ test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
+fi
+
+echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
+echo "configure:788: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
+
+ac_ext=c
+# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
+ac_link='${CC-cc} -o conftest $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
+cross_compiling=$ac_cv_prog_cc_cross
+
+cat > conftest.$ac_ext <<EOF
+#line 798 "configure"
+#include "confdefs.h"
+main(){return(0);}
+EOF
+if { (eval echo configure:802: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then
+ ac_cv_prog_cc_works=yes
+ # If we can't run a trivial program, we are probably using a cross compiler.
+ if (./conftest; exit) 2>/dev/null; then
+ ac_cv_prog_cc_cross=no
+ else
+ ac_cv_prog_cc_cross=yes
+ fi
+else
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ ac_cv_prog_cc_works=no
+fi
+rm -fr conftest*
+
+echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
+if test $ac_cv_prog_cc_works = no; then
+ { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
+fi
+echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
+echo "configure:822: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
+echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
+cross_compiling=$ac_cv_prog_cc_cross
+
+echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
+echo "configure:827: checking whether we are using GNU C" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.c <<EOF
+#ifdef __GNUC__
+ yes;
+#endif
+EOF
+if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:836: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
+ ac_cv_prog_gcc=yes
+else
+ ac_cv_prog_gcc=no
+fi
+fi
+
+echo "$ac_t""$ac_cv_prog_gcc" 1>&6
+
+if test $ac_cv_prog_gcc = yes; then
+ GCC=yes
+ ac_test_CFLAGS="${CFLAGS+set}"
+ ac_save_CFLAGS="$CFLAGS"
+ CFLAGS=
+ echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
+echo "configure:851: checking whether ${CC-cc} accepts -g" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ echo 'void f(){}' > conftest.c
+if test -z "`${CC-cc} -g -c conftest.c 2>&1`"; then
+ ac_cv_prog_cc_g=yes
+else
+ ac_cv_prog_cc_g=no
+fi
+rm -f conftest*
+
+fi
+
+echo "$ac_t""$ac_cv_prog_cc_g" 1>&6
+ if test "$ac_test_CFLAGS" = set; then
+ CFLAGS="$ac_save_CFLAGS"
+ elif test $ac_cv_prog_cc_g = yes; then
+ CFLAGS="-g -O2"
+ else
+ CFLAGS="-O2"
+ fi
+else
+ GCC=
+ test "${CFLAGS+set}" = set || CFLAGS="-g"
+fi
+
+ if test "$GCC" = yes ; then
+ if test "$SHLICC2" = yes ; then
+ ac_cv_lbl_gcc_vers=2
+ V_CCOPT="-O2"
+ else
+ echo $ac_n "checking gcc version""... $ac_c" 1>&6
+echo "configure:884: checking gcc version" >&5
+ if eval "test \"`echo '$''{'ac_cv_lbl_gcc_vers'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ ac_cv_lbl_gcc_vers=`$CC -v 2>&1 | \
+ sed -e '/^gcc version /!d' \
+ -e 's/^gcc version //' \
+ -e 's/ .*//' -e 's/^[^0-9]*//' \
+ -e 's/\..*//'`
+fi
+
+ echo "$ac_t""$ac_cv_lbl_gcc_vers" 1>&6
+ if test $ac_cv_lbl_gcc_vers -gt 1 ; then
+ V_CCOPT="-O2"
+ fi
+ fi
+ else
+ echo $ac_n "checking that $CC handles ansi prototypes""... $ac_c" 1>&6
+echo "configure:902: checking that $CC handles ansi prototypes" >&5
+ if eval "test \"`echo '$''{'ac_cv_lbl_cc_ansi_prototypes'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.$ac_ext <<EOF
+#line 907 "configure"
+#include "confdefs.h"
+#include <sys/types.h>
+int main() {
+int frob(int, char *)
+; return 0; }
+EOF
+if { (eval echo configure:914: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+ rm -rf conftest*
+ ac_cv_lbl_cc_ansi_prototypes=yes
+else
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ ac_cv_lbl_cc_ansi_prototypes=no
+fi
+rm -f conftest*
+fi
+
+ echo "$ac_t""$ac_cv_lbl_cc_ansi_prototypes" 1>&6
+ if test $ac_cv_lbl_cc_ansi_prototypes = no ; then
+ case "$target_os" in
+
+ hpux*)
+ echo $ac_n "checking for HP-UX ansi compiler ($CC -Aa -D_HPUX_SOURCE)""... $ac_c" 1>&6
+echo "configure:932: checking for HP-UX ansi compiler ($CC -Aa -D_HPUX_SOURCE)" >&5
+ savedcflags="$CFLAGS"
+ CFLAGS="-Aa -D_HPUX_SOURCE $CFLAGS"
+ if eval "test \"`echo '$''{'ac_cv_lbl_cc_hpux_cc_aa'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.$ac_ext <<EOF
+#line 939 "configure"
+#include "confdefs.h"
+#include <sys/types.h>
+int main() {
+int frob(int, char *)
+; return 0; }
+EOF
+if { (eval echo configure:946: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+ rm -rf conftest*
+ ac_cv_lbl_cc_hpux_cc_aa=yes
+else
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ ac_cv_lbl_cc_hpux_cc_aa=no
+fi
+rm -f conftest*
+fi
+
+ echo "$ac_t""$ac_cv_lbl_cc_hpux_cc_aa" 1>&6
+ if test $ac_cv_lbl_cc_hpux_cc_aa = no ; then
+ { echo "configure: error: see the INSTALL doc for more info" 1>&2; exit 1; }
+ fi
+ CFLAGS="$savedcflags"
+ V_CCOPT="-Aa $V_CCOPT"
+ cat >> confdefs.h <<\EOF
+#define _HPUX_SOURCE 1
+EOF
+
+ ;;
+
+ *)
+ { echo "configure: error: see the INSTALL doc for more info" 1>&2; exit 1; }
+ ;;
+ esac
+ fi
+ V_INCLS="$V_INCLS -I/usr/local/include"
+ LDFLAGS="$LDFLAGS -L/usr/local/lib"
+
+ case "$target_os" in
+
+ irix*)
+ V_CCOPT="$V_CCOPT -xansi -signed -g3"
+ ;;
+
+ osf*)
+ V_CCOPT="$V_CCOPT -std1 -g3"
+ ;;
+
+ ultrix*)
+ echo $ac_n "checking that Ultrix $CC hacks const in prototypes""... $ac_c" 1>&6
+echo "configure:990: checking that Ultrix $CC hacks const in prototypes" >&5
+ if eval "test \"`echo '$''{'ac_cv_lbl_cc_const_proto'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.$ac_ext <<EOF
+#line 995 "configure"
+#include "confdefs.h"
+#include <sys/types.h>
+int main() {
+struct a { int b; };
+ void c(const struct a *)
+; return 0; }
+EOF
+if { (eval echo configure:1003: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+ rm -rf conftest*
+ ac_cv_lbl_cc_const_proto=yes
+else
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ ac_cv_lbl_cc_const_proto=no
+fi
+rm -f conftest*
+fi
+
+ echo "$ac_t""$ac_cv_lbl_cc_const_proto" 1>&6
+ if test $ac_cv_lbl_cc_const_proto = no ; then
+ cat >> confdefs.h <<\EOF
+#define const
+EOF
+
+ fi
+ ;;
+ esac
+ fi
+
+
+echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6
+echo "configure:1028: checking how to run the C preprocessor" >&5
+# On Suns, sometimes $CPP names a directory.
+if test -n "$CPP" && test -d "$CPP"; then
+ CPP=
+fi
+if test -z "$CPP"; then
+if eval "test \"`echo '$''{'ac_cv_prog_CPP'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ # This must be in double quotes, not single quotes, because CPP may get
+ # substituted into the Makefile and "${CC-cc}" will confuse make.
+ CPP="${CC-cc} -E"
+ # On the NeXT, cc -E runs the code through the compiler's parser,
+ # not just through cpp.
+ cat > conftest.$ac_ext <<EOF
+#line 1043 "configure"
+#include "confdefs.h"
+#include <assert.h>
+Syntax Error
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:1049: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out`
+if test -z "$ac_err"; then
+ :
+else
+ echo "$ac_err" >&5
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ CPP="${CC-cc} -E -traditional-cpp"
+ cat > conftest.$ac_ext <<EOF
+#line 1060 "configure"
+#include "confdefs.h"
+#include <assert.h>
+Syntax Error
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:1066: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out`
+if test -z "$ac_err"; then
+ :
+else
+ echo "$ac_err" >&5
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ CPP=/lib/cpp
+fi
+rm -f conftest*
+fi
+rm -f conftest*
+ ac_cv_prog_CPP="$CPP"
+fi
+ CPP="$ac_cv_prog_CPP"
+else
+ ac_cv_prog_CPP="$CPP"
+fi
+echo "$ac_t""$CPP" 1>&6
+
+for ac_hdr in malloc.h sys/ioccom.h sys/sockio.h
+do
+ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
+echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
+echo "configure:1092: checking for $ac_hdr" >&5
+if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.$ac_ext <<EOF
+#line 1097 "configure"
+#include "confdefs.h"
+#include <$ac_hdr>
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:1102: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out`
+if test -z "$ac_err"; then
+ rm -rf conftest*
+ eval "ac_cv_header_$ac_safe=yes"
+else
+ echo "$ac_err" >&5
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ eval "ac_cv_header_$ac_safe=no"
+fi
+rm -f conftest*
+fi
+if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
+ echo "$ac_t""yes" 1>&6
+ ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
+ cat >> confdefs.h <<EOF
+#define $ac_tr_hdr 1
+EOF
+
+else
+ echo "$ac_t""no" 1>&6
+fi
+done
+
+
+if test "$GCC" = yes ; then
+ echo $ac_n "checking for ANSI ioctl definitions""... $ac_c" 1>&6
+echo "configure:1131: checking for ANSI ioctl definitions" >&5
+ if eval "test \"`echo '$''{'ac_cv_lbl_gcc_fixincludes'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.$ac_ext <<EOF
+#line 1136 "configure"
+#include "confdefs.h"
+/*
+ * This generates a "duplicate case value" when fixincludes
+ * has not be run.
+ */
+# include <sys/types.h>
+# include <sys/time.h>
+# include <sys/ioctl.h>
+# ifdef HAVE_SYS_IOCCOM_H
+# include <sys/ioccom.h>
+# endif
+int main() {
+switch (0) {
+ case _IO('A', 1):;
+ case _IO('B', 1):;
+ }
+; return 0; }
+EOF
+if { (eval echo configure:1155: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+ rm -rf conftest*
+ ac_cv_lbl_gcc_fixincludes=yes
+else
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ ac_cv_lbl_gcc_fixincludes=no
+fi
+rm -f conftest*
+fi
+
+ echo "$ac_t""$ac_cv_lbl_gcc_fixincludes" 1>&6
+ if test $ac_cv_lbl_gcc_fixincludes = no ; then
+ # Don't cache failure
+ unset ac_cv_lbl_gcc_fixincludes
+ { echo "configure: error: see the INSTALL for more info" 1>&2; exit 1; }
+ fi
+ fi
+
+for ac_func in ether_hostton strerror
+do
+echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
+echo "configure:1178: checking for $ac_func" >&5
+if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.$ac_ext <<EOF
+#line 1183 "configure"
+#include "confdefs.h"
+/* System header to define __stub macros and hopefully few prototypes,
+ which can conflict with char $ac_func(); below. */
+#include <assert.h>
+/* Override any gcc2 internal prototype to avoid an error. */
+/* We use char because int might match the return type of a gcc2
+ builtin and then its argument prototype would still apply. */
+char $ac_func();
+
+int main() {
+
+/* The GNU C library defines this for functions which it implements
+ to always fail with ENOSYS. Some functions are actually named
+ something starting with __ and the normal name is an alias. */
+#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
+choke me
+#else
+$ac_func();
+#endif
+
+; return 0; }
+EOF
+if { (eval echo configure:1206: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then
+ rm -rf conftest*
+ eval "ac_cv_func_$ac_func=yes"
+else
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ eval "ac_cv_func_$ac_func=no"
+fi
+rm -f conftest*
+fi
+
+if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
+ echo "$ac_t""yes" 1>&6
+ ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
+ cat >> confdefs.h <<EOF
+#define $ac_tr_func 1
+EOF
+
+else
+ echo "$ac_t""no" 1>&6
+fi
+done
+
+
+# Check whether --with-pcap or --without-pcap was given.
+if test "${with_pcap+set}" = set; then
+ withval="$with_pcap"
+ :
+fi
+
+echo $ac_n "checking packet capture type""... $ac_c" 1>&6
+echo "configure:1238: checking packet capture type" >&5
+if test ! -z "$with_pcap" ; then
+ V_PCAP="$withval"
+elif test -r /dev/bpf0 ; then
+ V_PCAP=bpf
+elif test -r /usr/include/net/pfilt.h ; then
+ V_PCAP=pf
+elif test -r /dev/enet ; then
+ V_PCAP=enet
+elif test -r /dev/nit ; then
+ V_PCAP=snit
+elif test -r /usr/include/sys/net/nit.h ; then
+ V_PCAP=nit
+elif test -r /usr/include/net/raw.h ; then
+ V_PCAP=snoop
+elif test -r /usr/include/sys/dlpi.h ; then
+ V_PCAP=dlpi
+elif test -r /usr/include/linux/socket.h ; then
+ V_PCAP=linux
+elif test -c /dev/bpf0 ; then # check again in case not readable
+ V_PCAP=bpf
+elif test -c /dev/enet ; then # check again in case not readable
+ V_PCAP=enet
+elif test -c /dev/nit ; then # check again in case not readable
+ V_PCAP=snit
+else
+ V_PCAP=null
+fi
+echo "$ac_t""$V_PCAP" 1>&6
+
+case "$V_PCAP" in
+
+dlpi)
+ for ac_hdr in sys/bufmod.h sys/dlpi_ext.h
+do
+ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
+echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
+echo "configure:1275: checking for $ac_hdr" >&5
+if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.$ac_ext <<EOF
+#line 1280 "configure"
+#include "confdefs.h"
+#include <$ac_hdr>
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:1285: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out`
+if test -z "$ac_err"; then
+ rm -rf conftest*
+ eval "ac_cv_header_$ac_safe=yes"
+else
+ echo "$ac_err" >&5
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ eval "ac_cv_header_$ac_safe=no"
+fi
+rm -f conftest*
+fi
+if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
+ echo "$ac_t""yes" 1>&6
+ ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
+ cat >> confdefs.h <<EOF
+#define $ac_tr_hdr 1
+EOF
+
+else
+ echo "$ac_t""no" 1>&6
+fi
+done
+
+ echo $ac_n "checking for /dev/dlpi device""... $ac_c" 1>&6
+echo "configure:1312: checking for /dev/dlpi device" >&5
+ if test -c /dev/dlpi ; then
+ echo "$ac_t""yes" 1>&6
+ cat >> confdefs.h <<\EOF
+#define HAVE_DEV_DLPI 1
+EOF
+
+ else
+ echo "$ac_t""no" 1>&6
+ dir="/dev/dlpi"
+ echo $ac_n "checking for $dir directory""... $ac_c" 1>&6
+echo "configure:1323: checking for $dir directory" >&5
+ if test -d $dir ; then
+ echo "$ac_t""yes" 1>&6
+ cat >> confdefs.h <<EOF
+#define PCAP_DEV_PREFIX "$dir"
+EOF
+
+ else
+ echo "$ac_t""no" 1>&6
+ fi
+ fi
+ ;;
+
+linux)
+ for ac_hdr in net/if_arp.h
+do
+ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
+echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
+echo "configure:1341: checking for $ac_hdr" >&5
+if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.$ac_ext <<EOF
+#line 1346 "configure"
+#include "confdefs.h"
+#include <$ac_hdr>
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:1351: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out`
+if test -z "$ac_err"; then
+ rm -rf conftest*
+ eval "ac_cv_header_$ac_safe=yes"
+else
+ echo "$ac_err" >&5
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ eval "ac_cv_header_$ac_safe=no"
+fi
+rm -f conftest*
+fi
+if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
+ echo "$ac_t""yes" 1>&6
+ ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
+ cat >> confdefs.h <<EOF
+#define $ac_tr_hdr 1
+EOF
+
+else
+ echo "$ac_t""no" 1>&6
+fi
+done
+
+ echo $ac_n "checking Linux kernel version""... $ac_c" 1>&6
+echo "configure:1378: checking Linux kernel version" >&5
+ if eval "test \"`echo '$''{'ac_cv_linux_vers'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ ac_cv_linux_vers=`uname -r 2>&1 | \
+ sed -n -e '$s/.* //' -e '$s/\..*//p'`
+fi
+
+ echo "$ac_t""$ac_cv_linux_vers" 1>&6
+ if test $ac_cv_linux_vers -lt 2 ; then
+ { echo "configure: error: version 2 or higher required; see the INSTALL doc for more info" 1>&2; exit 1; }
+ fi
+ ;;
+
+null)
+ echo "configure: warning: cannot determine packet capture interface" 1>&2
+ echo "configure: warning: (see the INSTALL doc for more info)" 1>&2
+ ;;
+
+esac
+
+# Check whether --with-flex or --without-flex was given.
+if test "${with_flex+set}" = set; then
+ withval="$with_flex"
+ :
+fi
+
+ # Check whether --with-bison or --without-bison was given.
+if test "${with_bison+set}" = set; then
+ withval="$with_bison"
+ :
+fi
+
+ if test "$with_flex" = no ; then
+ V_LEX=lex
+ else
+ for ac_prog in flex
+do
+# Extract the first word of "$ac_prog", so it can be a program name with args.
+set dummy $ac_prog; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:1419: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_V_LEX'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ if test -n "$V_LEX"; then
+ ac_cv_prog_V_LEX="$V_LEX" # Let the user override the test.
+else
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
+ for ac_dir in $PATH; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_prog_V_LEX="$ac_prog"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+fi
+fi
+V_LEX="$ac_cv_prog_V_LEX"
+if test -n "$V_LEX"; then
+ echo "$ac_t""$V_LEX" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+test -n "$V_LEX" && break
+done
+test -n "$V_LEX" || V_LEX="lex"
+
+ fi
+ if test "$V_LEX" = flex ; then
+ # The -V flag was added in 2.4
+ echo $ac_n "checking for flex 2.4 or higher""... $ac_c" 1>&6
+echo "configure:1452: checking for flex 2.4 or higher" >&5
+ if eval "test \"`echo '$''{'ac_cv_lbl_flex_v24'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ if flex -V >/dev/null 2>&1; then
+ ac_cv_lbl_flex_v24=yes
+ else
+ ac_cv_lbl_flex_v24=no
+ fi
+fi
+
+ echo "$ac_t""$ac_cv_lbl_flex_v24" 1>&6
+ if test $ac_cv_lbl_flex_v24 = no ; then
+ s="2.4 or higher required"
+ echo "configure: warning: ignoring obsolete flex executable ($s)" 1>&2
+ V_LEX=lex
+ fi
+ fi
+ if test "$with_bison" = no ; then
+ V_YACC=yacc
+ else
+ for ac_prog in bison
+do
+# Extract the first word of "$ac_prog", so it can be a program name with args.
+set dummy $ac_prog; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:1478: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_V_YACC'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ if test -n "$V_YACC"; then
+ ac_cv_prog_V_YACC="$V_YACC" # Let the user override the test.
+else
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
+ for ac_dir in $PATH; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_prog_V_YACC="$ac_prog"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+fi
+fi
+V_YACC="$ac_cv_prog_V_YACC"
+if test -n "$V_YACC"; then
+ echo "$ac_t""$V_YACC" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+test -n "$V_YACC" && break
+done
+test -n "$V_YACC" || V_YACC="yacc"
+
+ fi
+ if test "$V_YACC" = bison ; then
+ V_YACC="$V_YACC -y"
+ fi
+ if test "$V_LEX" != lex -a "$V_YACC" = yacc -o "$V_LEX" = lex -a "$V_YACC" != yacc ; then
+ echo "configure: warning: don't have both flex and bison; reverting to lex/yacc" 1>&2
+ V_LEX=lex
+ V_YACC=yacc
+ fi
+ if test "$V_LEX" = flex -a -n "pcap_" ; then
+ V_LEX="$V_LEX -Ppcap_"
+ V_YACC="$V_YACC -p pcap_"
+ fi
+
+case "$target_os" in
+
+aix*)
+ cat >> confdefs.h <<\EOF
+#define _SUN 1
+EOF
+
+ ;;
+
+hpux9*)
+ cat >> confdefs.h <<\EOF
+#define HAVE_HPUX9 1
+EOF
+
+ ;;
+
+hpux10.0*)
+ ;;
+
+hpux10.1*)
+ ;;
+
+hpux*)
+ cat >> confdefs.h <<\EOF
+#define HAVE_HPUX10_20 1
+EOF
+
+ ;;
+
+sinix*)
+ echo $ac_n "checking if SINIX compiler defines sinix""... $ac_c" 1>&6
+echo "configure:1552: checking if SINIX compiler defines sinix" >&5
+ if eval "test \"`echo '$''{'ac_cv_cc_sinix_defined'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.$ac_ext <<EOF
+#line 1557 "configure"
+#include "confdefs.h"
+
+int main() {
+int i = sinix;
+; return 0; }
+EOF
+if { (eval echo configure:1564: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+ rm -rf conftest*
+ ac_cv_cc_sinix_defined=yes
+else
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ ac_cv_cc_sinix_defined=no
+fi
+rm -f conftest*
+fi
+
+ echo "$ac_t""$ac_cv_cc_sinix_defined" 1>&6
+ if test $ac_cv_cc_sinix_defined = no ; then
+ cat >> confdefs.h <<\EOF
+#define sinix 1
+EOF
+
+ fi
+ ;;
+
+solaris*)
+ cat >> confdefs.h <<\EOF
+#define HAVE_SOLARIS 1
+EOF
+
+ ;;
+
+linux*)
+ V_INCLS="$V_INCLS -Ilinux-include"
+ ;;
+esac
+
+for ac_prog in ranlib
+do
+# Extract the first word of "$ac_prog", so it can be a program name with args.
+set dummy $ac_prog; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:1602: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_V_RANLIB'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ if test -n "$V_RANLIB"; then
+ ac_cv_prog_V_RANLIB="$V_RANLIB" # Let the user override the test.
+else
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
+ for ac_dir in $PATH; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_prog_V_RANLIB="$ac_prog"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+fi
+fi
+V_RANLIB="$ac_cv_prog_V_RANLIB"
+if test -n "$V_RANLIB"; then
+ echo "$ac_t""$V_RANLIB" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+test -n "$V_RANLIB" && break
+done
+test -n "$V_RANLIB" || V_RANLIB="@true"
+
+
+rm -f os-proto.h
+ if test "${LBL_CFLAGS+set}" = set; then
+ V_CCOPT="$V_CCOPT ${LBL_CFLAGS}"
+ fi
+ if test -f .devel ; then
+ if test "$GCC" = yes ; then
+ if test "${LBL_CFLAGS+set}" != set; then
+ if test "$ac_cv_prog_cc_g" = yes ; then
+ V_CCOPT="-g $V_CCOPT"
+ fi
+ V_CCOPT="$V_CCOPT -Wall"
+ if test $ac_cv_lbl_gcc_vers -gt 1 ; then
+ V_CCOPT="$V_CCOPT -Wmissing-prototypes -Wstrict-prototypes"
+ fi
+ fi
+ else
+ case "$target_os" in
+
+ irix6*)
+ V_CCOPT="$V_CCOPT -n32"
+ ;;
+
+ *)
+ ;;
+ esac
+ fi
+ os=`echo $target_os | sed -e 's/\([0-9][0-9]*\)[^0-9].*$/\1/'`
+ name="lbl/os-$os.h"
+ if test -f $name ; then
+ ln -s $name os-proto.h
+ cat >> confdefs.h <<\EOF
+#define HAVE_OS_PROTO_H 1
+EOF
+
+ else
+ echo "configure: warning: can't find $name" 1>&2
+ fi
+ fi
+
+echo $ac_n "checking if sockaddr struct has sa_len member""... $ac_c" 1>&6
+echo "configure:1672: checking if sockaddr struct has sa_len member" >&5
+ if eval "test \"`echo '$''{'ac_cv_lbl_sockaddr_has_sa_len'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.$ac_ext <<EOF
+#line 1677 "configure"
+#include "confdefs.h"
+
+# include <sys/types.h>
+# include <sys/socket.h>
+int main() {
+u_int i = sizeof(((struct sockaddr *)0)->sa_len)
+; return 0; }
+EOF
+if { (eval echo configure:1686: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+ rm -rf conftest*
+ ac_cv_lbl_sockaddr_has_sa_len=yes
+else
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ ac_cv_lbl_sockaddr_has_sa_len=no
+fi
+rm -f conftest*
+fi
+
+ echo "$ac_t""$ac_cv_lbl_sockaddr_has_sa_len" 1>&6
+ if test $ac_cv_lbl_sockaddr_has_sa_len = yes ; then
+ cat >> confdefs.h <<\EOF
+#define HAVE_SOCKADDR_SA_LEN 1
+EOF
+
+ fi
+
+echo $ac_n "checking if unaligned accesses fail""... $ac_c" 1>&6
+echo "configure:1707: checking if unaligned accesses fail" >&5
+ if eval "test \"`echo '$''{'ac_cv_lbl_unaligned_fail'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ case "$target_cpu" in
+
+ alpha|hp*|mips|sparc)
+ ac_cv_lbl_unaligned_fail=yes
+ ;;
+
+ *)
+ cat >conftest.c <<EOF
+# include <sys/types.h>
+# include <sys/wait.h>
+# include <stdio.h>
+ unsigned char a[5] = { 1, 2, 3, 4, 5 };
+ main() {
+ unsigned int i;
+ pid_t pid;
+ int status;
+ /* avoid "core dumped" message */
+ pid = fork();
+ if (pid < 0)
+ exit(2);
+ if (pid > 0) {
+ /* parent */
+ pid = waitpid(pid, &status, 0);
+ if (pid < 0)
+ exit(3);
+ exit(!WIFEXITED(status));
+ }
+ /* child */
+ i = *(unsigned int *)&a[1];
+ printf("%d\n", i);
+ exit(0);
+ }
+EOF
+ ${CC-cc} -o conftest $CFLAGS $CPPFLAGS $LDFLAGS \
+ conftest.c $LIBS >/dev/null 2>&1
+ if test ! -x conftest ; then
+ ac_cv_lbl_unaligned_fail=yes
+ else
+ ./conftest >conftest.out
+ if test ! -s conftest.out ; then
+ ac_cv_lbl_unaligned_fail=yes
+ else
+ ac_cv_lbl_unaligned_fail=no
+ fi
+ fi
+ rm -f conftest* core core.conftest
+ ;;
+ esac
+fi
+
+ echo "$ac_t""$ac_cv_lbl_unaligned_fail" 1>&6
+ if test $ac_cv_lbl_unaligned_fail = yes ; then
+ cat >> confdefs.h <<\EOF
+#define LBL_ALIGN 1
+EOF
+
+ fi
+
+if test "${srcdir}" = "." ; then
+ srcdirprefix=""
+else
+ srcdirprefix="./"
+fi
+
+if test -r ${srcdirprefix}lbl/gnuc.h ; then
+ rm -f gnuc.h
+ ln -s ${srcdirprefix}lbl/gnuc.h gnuc.h
+fi
+
+rm -f bpf_filter.c
+ln -s ${srcdirprefix}bpf/net/bpf_filter.c bpf_filter.c
+rm -f net
+ln -s ${srcdirprefix}bpf/net net
+
+
+
+
+
+
+
+
+# Find a good install program. We prefer a C program (faster),
+# so one script is as good as another. But avoid the broken or
+# incompatible versions:
+# SysV /etc/install, /usr/sbin/install
+# SunOS /usr/etc/install
+# IRIX /sbin/install
+# AIX /bin/install
+# AFS /usr/afsws/bin/install, which mishandles nonexistent args
+# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
+# ./install, which can be erroneously created by make from ./install.sh.
+echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
+echo "configure:1803: checking for a BSD compatible install" >&5
+if test -z "$INSTALL"; then
+if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS="${IFS}:"
+ for ac_dir in $PATH; do
+ # Account for people who put trailing slashes in PATH elements.
+ case "$ac_dir/" in
+ /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
+ *)
+ # OSF1 and SCO ODT 3.0 have their own names for install.
+ for ac_prog in ginstall installbsd scoinst install; do
+ if test -f $ac_dir/$ac_prog; then
+ if test $ac_prog = install &&
+ grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
+ # AIX install. It has an incompatible calling convention.
+ # OSF/1 installbsd also uses dspmsg, but is usable.
+ :
+ else
+ ac_cv_path_install="$ac_dir/$ac_prog -c"
+ break 2
+ fi
+ fi
+ done
+ ;;
+ esac
+ done
+ IFS="$ac_save_IFS"
+
+fi
+ if test "${ac_cv_path_install+set}" = set; then
+ INSTALL="$ac_cv_path_install"
+ else
+ # As a last resort, use the slow shell script. We don't cache a
+ # path for INSTALL within a source directory, because that will
+ # break other packages using the cache if that directory is
+ # removed, or if the path is relative.
+ INSTALL="$ac_install_sh"
+ fi
+fi
+echo "$ac_t""$INSTALL" 1>&6
+
+# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
+# It thinks the first close brace ends the variable substitution.
+test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}'
+
+test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
+
+
+trap '' 1 2 15
+cat > confcache <<\EOF
+# This file is a shell script that caches the results of configure
+# tests run on this system so they can be shared between configure
+# scripts and configure runs. It is not useful on other systems.
+# If it contains results you don't want to keep, you may remove or edit it.
+#
+# By default, configure uses ./config.cache as the cache file,
+# creating it if it does not exist already. You can give configure
+# the --cache-file=FILE option to use a different cache file; that is
+# what configure does when it calls configure scripts in
+# subdirectories, so they share the cache.
+# Giving --cache-file=/dev/null disables caching, for debugging configure.
+# config.status only pays attention to the cache file if you give it the
+# --recheck option to rerun configure.
+#
+EOF
+# The following way of writing the cache mishandles newlines in values,
+# but we know of no workaround that is simple, portable, and efficient.
+# So, don't put newlines in cache variables' values.
+# Ultrix sh set writes to stderr and can't be redirected directly,
+# and sets the high bit in the cache file unless we assign to the vars.
+(set) 2>&1 |
+ case `(ac_space=' '; set) 2>&1` in
+ *ac_space=\ *)
+ # `set' does not quote correctly, so add quotes (double-quote substitution
+ # turns \\\\ into \\, and sed turns \\ into \).
+ sed -n \
+ -e "s/'/'\\\\''/g" \
+ -e "s/^\\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\\)=\\(.*\\)/\\1=\${\\1='\\2'}/p"
+ ;;
+ *)
+ # `set' quotes correctly as required by POSIX, so do not add quotes.
+ sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
+ ;;
+ esac >> confcache
+if cmp -s $cache_file confcache; then
+ :
+else
+ if test -w $cache_file; then
+ echo "updating cache $cache_file"
+ cat confcache > $cache_file
+ else
+ echo "not updating unwritable cache $cache_file"
+ fi
+fi
+rm -f confcache
+
+trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
+
+test "x$prefix" = xNONE && prefix=$ac_default_prefix
+# Let make expand exec_prefix.
+test "x$exec_prefix" = xNONE && exec_prefix='${prefix}'
+
+# Any assignment to VPATH causes Sun make to only execute
+# the first set of double-colon rules, so remove it if not needed.
+# If there is a colon in the path, we need to keep it.
+if test "x$srcdir" = x.; then
+ ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d'
+fi
+
+trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
+
+# Transform confdefs.h into DEFS.
+# Protect against shell expansion while executing Makefile rules.
+# Protect against Makefile macro expansion.
+cat > conftest.defs <<\EOF
+s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%-D\1=\2%g
+s%[ `~#$^&*(){}\\|;'"<>?]%\\&%g
+s%\[%\\&%g
+s%\]%\\&%g
+s%\$%$$%g
+EOF
+DEFS=`sed -f conftest.defs confdefs.h | tr '\012' ' '`
+rm -f conftest.defs
+
+
+# Without the "./", some shells look in PATH for config.status.
+: ${CONFIG_STATUS=./config.status}
+
+echo creating $CONFIG_STATUS
+rm -f $CONFIG_STATUS
+cat > $CONFIG_STATUS <<EOF
+#! /bin/sh
+# Generated automatically by configure.
+# Run this file to recreate the current configuration.
+# This directory was configured as follows,
+# on host `(hostname || uname -n) 2>/dev/null | sed 1q`:
+#
+# $0 $ac_configure_args
+#
+# Compiler output produced by configure, useful for debugging
+# configure, is in ./config.log if it exists.
+
+ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
+for ac_option
+do
+ case "\$ac_option" in
+ -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r)
+ echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
+ exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
+ -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
+ echo "$CONFIG_STATUS generated by autoconf version 2.12"
+ exit 0 ;;
+ -help | --help | --hel | --he | --h)
+ echo "\$ac_cs_usage"; exit 0 ;;
+ *) echo "\$ac_cs_usage"; exit 1 ;;
+ esac
+done
+
+ac_given_srcdir=$srcdir
+ac_given_INSTALL="$INSTALL"
+
+trap 'rm -fr `echo "Makefile" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
+EOF
+cat >> $CONFIG_STATUS <<EOF
+
+# Protect against being on the right side of a sed subst in config.status.
+sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
+ s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
+$ac_vpsub
+$extrasub
+s%@CFLAGS@%$CFLAGS%g
+s%@CPPFLAGS@%$CPPFLAGS%g
+s%@CXXFLAGS@%$CXXFLAGS%g
+s%@DEFS@%$DEFS%g
+s%@LDFLAGS@%$LDFLAGS%g
+s%@LIBS@%$LIBS%g
+s%@exec_prefix@%$exec_prefix%g
+s%@prefix@%$prefix%g
+s%@program_transform_name@%$program_transform_name%g
+s%@bindir@%$bindir%g
+s%@sbindir@%$sbindir%g
+s%@libexecdir@%$libexecdir%g
+s%@datadir@%$datadir%g
+s%@sysconfdir@%$sysconfdir%g
+s%@sharedstatedir@%$sharedstatedir%g
+s%@localstatedir@%$localstatedir%g
+s%@libdir@%$libdir%g
+s%@includedir@%$includedir%g
+s%@oldincludedir@%$oldincludedir%g
+s%@infodir@%$infodir%g
+s%@mandir@%$mandir%g
+s%@host@%$host%g
+s%@host_alias@%$host_alias%g
+s%@host_cpu@%$host_cpu%g
+s%@host_vendor@%$host_vendor%g
+s%@host_os@%$host_os%g
+s%@target@%$target%g
+s%@target_alias@%$target_alias%g
+s%@target_cpu@%$target_cpu%g
+s%@target_vendor@%$target_vendor%g
+s%@target_os@%$target_os%g
+s%@build@%$build%g
+s%@build_alias@%$build_alias%g
+s%@build_cpu@%$build_cpu%g
+s%@build_vendor@%$build_vendor%g
+s%@build_os@%$build_os%g
+s%@SHLICC2@%$SHLICC2%g
+s%@CC@%$CC%g
+s%@CPP@%$CPP%g
+s%@V_LEX@%$V_LEX%g
+s%@V_YACC@%$V_YACC%g
+s%@V_RANLIB@%$V_RANLIB%g
+s%@V_CCOPT@%$V_CCOPT%g
+s%@V_INCLS@%$V_INCLS%g
+s%@V_PCAP@%$V_PCAP%g
+s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g
+s%@INSTALL_DATA@%$INSTALL_DATA%g
+
+CEOF
+EOF
+
+cat >> $CONFIG_STATUS <<\EOF
+
+# Split the substitutions into bite-sized pieces for seds with
+# small command number limits, like on Digital OSF/1 and HP-UX.
+ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script.
+ac_file=1 # Number of current file.
+ac_beg=1 # First line for current file.
+ac_end=$ac_max_sed_cmds # Line after last line for current file.
+ac_more_lines=:
+ac_sed_cmds=""
+while $ac_more_lines; do
+ if test $ac_beg -gt 1; then
+ sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
+ else
+ sed "${ac_end}q" conftest.subs > conftest.s$ac_file
+ fi
+ if test ! -s conftest.s$ac_file; then
+ ac_more_lines=false
+ rm -f conftest.s$ac_file
+ else
+ if test -z "$ac_sed_cmds"; then
+ ac_sed_cmds="sed -f conftest.s$ac_file"
+ else
+ ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
+ fi
+ ac_file=`expr $ac_file + 1`
+ ac_beg=$ac_end
+ ac_end=`expr $ac_end + $ac_max_sed_cmds`
+ fi
+done
+if test -z "$ac_sed_cmds"; then
+ ac_sed_cmds=cat
+fi
+EOF
+
+cat >> $CONFIG_STATUS <<EOF
+
+CONFIG_FILES=\${CONFIG_FILES-"Makefile"}
+EOF
+cat >> $CONFIG_STATUS <<\EOF
+for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
+ # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
+ case "$ac_file" in
+ *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
+ ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
+ *) ac_file_in="${ac_file}.in" ;;
+ esac
+
+ # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
+
+ # Remove last slash and all that follows it. Not all systems have dirname.
+ ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
+ if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
+ # The file is in a subdirectory.
+ test ! -d "$ac_dir" && mkdir "$ac_dir"
+ ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
+ # A "../" for each directory in $ac_dir_suffix.
+ ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
+ else
+ ac_dir_suffix= ac_dots=
+ fi
+
+ case "$ac_given_srcdir" in
+ .) srcdir=.
+ if test -z "$ac_dots"; then top_srcdir=.
+ else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
+ /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
+ *) # Relative path.
+ srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
+ top_srcdir="$ac_dots$ac_given_srcdir" ;;
+ esac
+
+ case "$ac_given_INSTALL" in
+ [/$]*) INSTALL="$ac_given_INSTALL" ;;
+ *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
+ esac
+
+ echo creating "$ac_file"
+ rm -f "$ac_file"
+ configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
+ case "$ac_file" in
+ *Makefile*) ac_comsub="1i\\
+# $configure_input" ;;
+ *) ac_comsub= ;;
+ esac
+
+ ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
+ sed -e "$ac_comsub
+s%@configure_input@%$configure_input%g
+s%@srcdir@%$srcdir%g
+s%@top_srcdir@%$top_srcdir%g
+s%@INSTALL@%$INSTALL%g
+" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
+fi; done
+rm -f conftest.s*
+
+EOF
+cat >> $CONFIG_STATUS <<EOF
+
+EOF
+cat >> $CONFIG_STATUS <<\EOF
+
+exit 0
+EOF
+chmod +x $CONFIG_STATUS
+rm -fr confdefs* $ac_clean_files
+test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
+
+
+if test -f .devel ; then
+ make depend
+fi
+exit 0
--- /dev/null
+dnl @(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/configure.in,v 1.1 1999/08/26 10:05:21 johana Exp $ (LBL)
+dnl
+dnl Copyright (c) 1994, 1995, 1996, 1997
+dnl The Regents of the University of California. All rights reserved.
+dnl
+dnl Process this file with autoconf to produce a configure script.
+dnl
+
+AC_INIT(pcap.c)
+
+AC_CANONICAL_SYSTEM
+
+umask 002
+
+if test -z "$PWD" ; then
+ PWD=`pwd`
+fi
+
+AC_LBL_C_INIT(V_CCOPT, V_INCLS)
+
+AC_CHECK_HEADERS(malloc.h sys/ioccom.h sys/sockio.h)
+
+AC_LBL_FIXINCLUDES
+
+AC_CHECK_FUNCS(ether_hostton strerror)
+
+dnl
+dnl Not all versions of test support -c (character special) but it's a
+dnl better way of testing since the device might be protected. So we
+dnl check in our normal order using -r and then check the for the /dev
+dnl guys again using -c.
+dnl
+AC_ARG_WITH(pcap, [ --with-pcap=TYPE use packet capture TYPE])
+AC_MSG_CHECKING(packet capture type)
+if test ! -z "$with_pcap" ; then
+ V_PCAP="$withval"
+elif test -r /dev/bpf0 ; then
+ V_PCAP=bpf
+elif test -r /usr/include/net/pfilt.h ; then
+ V_PCAP=pf
+elif test -r /dev/enet ; then
+ V_PCAP=enet
+elif test -r /dev/nit ; then
+ V_PCAP=snit
+elif test -r /usr/include/sys/net/nit.h ; then
+ V_PCAP=nit
+elif test -r /usr/include/net/raw.h ; then
+ V_PCAP=snoop
+elif test -r /usr/include/sys/dlpi.h ; then
+ V_PCAP=dlpi
+elif test -r /usr/include/linux/socket.h ; then
+ V_PCAP=linux
+elif test -c /dev/bpf0 ; then # check again in case not readable
+ V_PCAP=bpf
+elif test -c /dev/enet ; then # check again in case not readable
+ V_PCAP=enet
+elif test -c /dev/nit ; then # check again in case not readable
+ V_PCAP=snit
+else
+ V_PCAP=null
+fi
+AC_MSG_RESULT($V_PCAP)
+
+case "$V_PCAP" in
+
+dlpi)
+ AC_CHECK_HEADERS(sys/bufmod.h sys/dlpi_ext.h)
+ AC_MSG_CHECKING(for /dev/dlpi device)
+ if test -c /dev/dlpi ; then
+ AC_MSG_RESULT(yes)
+ AC_DEFINE(HAVE_DEV_DLPI)
+ else
+ AC_MSG_RESULT(no)
+ dir="/dev/dlpi"
+ AC_MSG_CHECKING(for $dir directory)
+ if test -d $dir ; then
+ AC_MSG_RESULT(yes)
+ AC_DEFINE_UNQUOTED(PCAP_DEV_PREFIX, "$dir")
+ else
+ AC_MSG_RESULT(no)
+ fi
+ fi
+ ;;
+
+linux)
+ AC_CHECK_HEADERS(net/if_arp.h)
+ AC_MSG_CHECKING(Linux kernel version)
+ AC_CACHE_VAL(ac_cv_linux_vers,
+ ac_cv_linux_vers=`uname -r 2>&1 | \
+ sed -n -e '$s/.* //' -e '$s/\..*//p'`)
+ AC_MSG_RESULT($ac_cv_linux_vers)
+ if test $ac_cv_linux_vers -lt 2 ; then
+ AC_MSG_ERROR(version 2 or higher required; see the INSTALL doc for more info)
+ fi
+ ;;
+
+null)
+ AC_MSG_WARN(cannot determine packet capture interface)
+ AC_MSG_WARN((see the INSTALL doc for more info))
+ ;;
+
+esac
+
+AC_LBL_LEX_AND_YACC(V_LEX, V_YACC, pcap_)
+
+case "$target_os" in
+
+aix*)
+ dnl Workaround to enable certain features
+ AC_DEFINE(_SUN)
+ ;;
+
+hpux9*)
+ AC_DEFINE(HAVE_HPUX9)
+ ;;
+
+hpux10.0*)
+ ;;
+
+hpux10.1*)
+ ;;
+
+hpux*)
+ dnl HPUX 10.20 and above is similar to HPUX 9...
+ AC_DEFINE(HAVE_HPUX10_20)
+ ;;
+
+sinix*)
+ AC_MSG_CHECKING(if SINIX compiler defines sinix)
+ AC_CACHE_VAL(ac_cv_cc_sinix_defined,
+ AC_TRY_COMPILE(
+ [],
+ [int i = sinix;],
+ ac_cv_cc_sinix_defined=yes,
+ ac_cv_cc_sinix_defined=no))
+ AC_MSG_RESULT($ac_cv_cc_sinix_defined)
+ if test $ac_cv_cc_sinix_defined = no ; then
+ AC_DEFINE(sinix)
+ fi
+ ;;
+
+solaris*)
+ AC_DEFINE(HAVE_SOLARIS)
+ ;;
+
+linux*)
+ V_INCLS="$V_INCLS -Ilinux-include"
+ ;;
+esac
+
+AC_CHECK_PROGS(V_RANLIB, ranlib, @true)
+
+AC_LBL_DEVEL(V_CCOPT)
+
+AC_LBL_SOCKADDR_SA_LEN
+
+AC_LBL_UNALIGNED_ACCESS
+
+if test "${srcdir}" = "." ; then
+ srcdirprefix=""
+else
+ srcdirprefix="./"
+fi
+
+if test -r ${srcdirprefix}lbl/gnuc.h ; then
+ rm -f gnuc.h
+ ln -s ${srcdirprefix}lbl/gnuc.h gnuc.h
+fi
+
+rm -f bpf_filter.c
+ln -s ${srcdirprefix}bpf/net/bpf_filter.c bpf_filter.c
+rm -f net
+ln -s ${srcdirprefix}bpf/net net
+
+AC_SUBST(V_CCOPT)
+AC_SUBST(V_INCLS)
+AC_SUBST(V_LEX)
+AC_SUBST(V_PCAP)
+AC_SUBST(V_RANLIB)
+AC_SUBST(V_YACC)
+
+AC_PROG_INSTALL
+
+AC_OUTPUT(Makefile)
+
+if test -f .devel ; then
+ make depend
+fi
+exit 0
--- /dev/null
+/*
+ * Copyright (c) 1990, 1993, 1994, 1995, 1996
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ */
+
+#ifndef lint
+static const char rcsid[] =
+ "@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/etherent.c,v 1.1 1999/08/26 10:05:21 johana Exp $ (LBL)";
+#endif
+
+#include <sys/types.h>
+
+#include <ctype.h>
+#include <memory.h>
+#include <stdio.h>
+#include <string.h>
+
+#include "pcap-int.h"
+
+#include <pcap-namedb.h>
+
+#include "gnuc.h"
+#ifdef HAVE_OS_PROTO_H
+#include "os-proto.h"
+#endif
+
+static inline int xdtoi(int);
+static inline int skip_space(FILE *);
+static inline int skip_line(FILE *);
+
+/* Hex digit to integer. */
+static inline int
+xdtoi(c)
+ register int c;
+{
+ if (isdigit(c))
+ return c - '0';
+ else if (islower(c))
+ return c - 'a' + 10;
+ else
+ return c - 'A' + 10;
+}
+
+static inline int
+skip_space(f)
+ FILE *f;
+{
+ int c;
+
+ do {
+ c = getc(f);
+ } while (isspace(c) && c != '\n');
+
+ return c;
+}
+
+static inline int
+skip_line(f)
+ FILE *f;
+{
+ int c;
+
+ do
+ c = getc(f);
+ while (c != '\n' && c != EOF);
+
+ return c;
+}
+
+struct pcap_etherent *
+pcap_next_etherent(FILE *fp)
+{
+ register int c, d, i;
+ char *bp;
+ static struct pcap_etherent e;
+
+ memset((char *)&e, 0, sizeof(e));
+ do {
+ /* Find addr */
+ c = skip_space(fp);
+ if (c == '\n')
+ continue;
+
+ /* If this is a comment, or first thing on line
+ cannot be etehrnet address, skip the line. */
+ if (!isxdigit(c)) {
+ c = skip_line(fp);
+ continue;
+ }
+
+ /* must be the start of an address */
+ for (i = 0; i < 6; i += 1) {
+ d = xdtoi(c);
+ c = getc(fp);
+ if (isxdigit(c)) {
+ d <<= 4;
+ d |= xdtoi(c);
+ c = getc(fp);
+ }
+ e.addr[i] = d;
+ if (c != ':')
+ break;
+ c = getc(fp);
+ }
+ if (c == EOF)
+ break;
+
+ /* Must be whitespace */
+ if (!isspace(c)) {
+ c = skip_line(fp);
+ continue;
+ }
+ c = skip_space(fp);
+
+ /* hit end of line... */
+ if (c == '\n')
+ continue;
+
+ if (c == '#') {
+ c = skip_line(fp);
+ continue;
+ }
+
+ /* pick up name */
+ bp = e.name;
+ /* Use 'd' to prevent buffer overflow. */
+ d = sizeof(e.name) - 1;
+ do {
+ *bp++ = c;
+ c = getc(fp);
+ } while (!isspace(c) && c != EOF && --d > 0);
+ *bp = '\0';
+
+ /* Eat trailing junk */
+ if (c != '\n')
+ (void)skip_line(fp);
+
+ return &e;
+
+ } while (c != EOF);
+
+ return (NULL);
+}
--- /dev/null
+/*
+ * Copyright (c) 1993, 1994, 1996
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ * @(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/ethertype.h,v 1.1 1999/08/26 10:05:21 johana Exp $ (LBL)
+ */
+
+/* Types missing from some systems */
+
+#ifndef ETHERTYPE_NS
+#define ETHERTYPE_NS 0x0600
+#endif
+#ifndef ETHERTYPE_SPRITE
+#define ETHERTYPE_SPRITE 0x0500
+#endif
+#ifndef ETHERTYPE_TRAIL
+#define ETHERTYPE_TRAIL 0x1000
+#endif
+#ifndef ETHERTYPE_MOPDL
+#define ETHERTYPE_MOPDL 0x6001
+#endif
+#ifndef ETHERTYPE_MOPRC
+#define ETHERTYPE_MOPRC 0x6002
+#endif
+#ifndef ETHERTYPE_DN
+#define ETHERTYPE_DN 0x6003
+#endif
+#ifndef ETHERTYPE_LAT
+#define ETHERTYPE_LAT 0x6004
+#endif
+#ifndef ETHERTYPE_SCA
+#define ETHERTYPE_SCA 0x6007
+#endif
+#ifndef ETHERTYPE_REVARP
+#define ETHERTYPE_REVARP 0x8035
+#endif
+#ifndef ETHERTYPE_LANBRIDGE
+#define ETHERTYPE_LANBRIDGE 0x8038
+#endif
+#ifndef ETHERTYPE_DECDNS
+#define ETHERTYPE_DECDNS 0x803c
+#endif
+#ifndef ETHERTYPE_DECDTS
+#define ETHERTYPE_DECDTS 0x803e
+#endif
+#ifndef ETHERTYPE_VEXP
+#define ETHERTYPE_VEXP 0x805b
+#endif
+#ifndef ETHERTYPE_VPROD
+#define ETHERTYPE_VPROD 0x805c
+#endif
+#ifndef ETHERTYPE_ATALK
+#define ETHERTYPE_ATALK 0x809b
+#endif
+#ifndef ETHERTYPE_AARP
+#define ETHERTYPE_AARP 0x80f3
+#endif
+#ifndef ETHERTYPE_LOOPBACK
+#define ETHERTYPE_LOOPBACK 0x9000
+#endif
--- /dev/null
+/*
+ * Copyright (c) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ */
+#ifndef lint
+static const char rcsid[] =
+ "@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/gencode.c,v 1.1 1999/08/26 10:05:22 johana Exp $ (LBL)";
+#endif
+
+#include <sys/types.h>
+#include <sys/socket.h>
+#include <sys/time.h>
+
+#if __STDC__
+struct mbuf;
+struct rtentry;
+#endif
+
+#include <net/if.h>
+
+#include <netinet/in.h>
+#include <netinet/if_ether.h>
+
+#include <stdlib.h>
+#include <memory.h>
+#include <setjmp.h>
+#if __STDC__
+#include <stdarg.h>
+#else
+#include <varargs.h>
+#endif
+
+#include "pcap-int.h"
+
+#include "ethertype.h"
+#include "gencode.h"
+#include "ppp.h"
+#include <pcap-namedb.h>
+
+#include "gnuc.h"
+#ifdef HAVE_OS_PROTO_H
+#include "os-proto.h"
+#endif
+
+#define JMP(c) ((c)|BPF_JMP|BPF_K)
+
+/* Locals */
+static jmp_buf top_ctx;
+static pcap_t *bpf_pcap;
+
+/* XXX */
+#ifdef PCAP_FDDIPAD
+int pcap_fddipad = PCAP_FDDIPAD;
+#else
+int pcap_fddipad;
+#endif
+
+/* VARARGS */
+__dead void
+#if __STDC__
+bpf_error(const char *fmt, ...)
+#else
+bpf_error(fmt, va_alist)
+ const char *fmt;
+ va_dcl
+#endif
+{
+ va_list ap;
+
+#if __STDC__
+ va_start(ap, fmt);
+#else
+ va_start(ap);
+#endif
+ if (bpf_pcap != NULL)
+ (void)vsprintf(pcap_geterr(bpf_pcap), fmt, ap);
+ va_end(ap);
+ longjmp(top_ctx, 1);
+ /* NOTREACHED */
+}
+
+static void init_linktype(int);
+
+static int alloc_reg(void);
+static void free_reg(int);
+
+static struct block *root;
+
+/*
+ * We divy out chunks of memory rather than call malloc each time so
+ * we don't have to worry about leaking memory. It's probably
+ * not a big deal if all this memory was wasted but it this ever
+ * goes into a library that would probably not be a good idea.
+ */
+#define NCHUNKS 16
+#define CHUNK0SIZE 1024
+struct chunk {
+ u_int n_left;
+ void *m;
+};
+
+static struct chunk chunks[NCHUNKS];
+static int cur_chunk;
+
+static void *newchunk(u_int);
+static void freechunks(void);
+static inline struct block *new_block(int);
+static inline struct slist *new_stmt(int);
+static struct block *gen_retblk(int);
+static inline void syntax(void);
+
+static void backpatch(struct block *, struct block *);
+static void merge(struct block *, struct block *);
+static struct block *gen_cmp(u_int, u_int, bpf_int32);
+static struct block *gen_mcmp(u_int, u_int, bpf_int32, bpf_u_int32);
+static struct block *gen_bcmp(u_int, u_int, const u_char *);
+static struct block *gen_uncond(int);
+static inline struct block *gen_true(void);
+static inline struct block *gen_false(void);
+static struct block *gen_linktype(int);
+static struct block *gen_hostop(bpf_u_int32, bpf_u_int32, int, int, u_int, u_int);
+static struct block *gen_ehostop(const u_char *, int);
+static struct block *gen_fhostop(const u_char *, int);
+static struct block *gen_dnhostop(bpf_u_int32, int, u_int);
+static struct block *gen_host(bpf_u_int32, bpf_u_int32, int, int);
+static struct block *gen_gateway(const u_char *, bpf_u_int32 **, int, int);
+static struct block *gen_ipfrag(void);
+static struct block *gen_portatom(int, bpf_int32);
+struct block *gen_portop(int, int, int);
+static struct block *gen_port(int, int, int);
+static int lookup_proto(const char *, int);
+static struct block *gen_proto(int, int, int);
+static struct slist *xfer_to_x(struct arth *);
+static struct slist *xfer_to_a(struct arth *);
+static struct block *gen_len(int, int);
+
+static void *
+newchunk(n)
+ u_int n;
+{
+ struct chunk *cp;
+ int k, size;
+
+ /* XXX Round up to nearest long. */
+ n = (n + sizeof(long) - 1) & ~(sizeof(long) - 1);
+
+ cp = &chunks[cur_chunk];
+ if (n > cp->n_left) {
+ ++cp, k = ++cur_chunk;
+ if (k >= NCHUNKS)
+ bpf_error("out of memory");
+ size = CHUNK0SIZE << k;
+ cp->m = (void *)malloc(size);
+ memset((char *)cp->m, 0, size);
+ cp->n_left = size;
+ if (n > size)
+ bpf_error("out of memory");
+ }
+ cp->n_left -= n;
+ return (void *)((char *)cp->m + cp->n_left);
+}
+
+static void
+freechunks()
+{
+ int i;
+
+ cur_chunk = 0;
+ for (i = 0; i < NCHUNKS; ++i)
+ if (chunks[i].m != NULL) {
+ free(chunks[i].m);
+ chunks[i].m = NULL;
+ }
+}
+
+/*
+ * A strdup whose allocations are freed after code generation is over.
+ */
+char *
+sdup(s)
+ register const char *s;
+{
+ int n = strlen(s) + 1;
+ char *cp = newchunk(n);
+
+ strcpy(cp, s);
+ return (cp);
+}
+
+static inline struct block *
+new_block(code)
+ int code;
+{
+ struct block *p;
+
+ p = (struct block *)newchunk(sizeof(*p));
+ p->s.code = code;
+ p->head = p;
+
+ return p;
+}
+
+static inline struct slist *
+new_stmt(code)
+ int code;
+{
+ struct slist *p;
+
+ p = (struct slist *)newchunk(sizeof(*p));
+ p->s.code = code;
+
+ return p;
+}
+
+static struct block *
+gen_retblk(v)
+ int v;
+{
+ struct block *b = new_block(BPF_RET|BPF_K);
+
+ b->s.k = v;
+ return b;
+}
+
+static inline void
+syntax()
+{
+ bpf_error("syntax error in filter expression");
+}
+
+static bpf_u_int32 netmask;
+static int snaplen;
+
+int
+pcap_compile(pcap_t *p, struct bpf_program *program,
+ char *buf, int optimize, bpf_u_int32 mask)
+{
+ extern int n_errors;
+ int len;
+
+ n_errors = 0;
+ root = NULL;
+ bpf_pcap = p;
+ if (setjmp(top_ctx)) {
+ freechunks();
+ return (-1);
+ }
+
+ netmask = mask;
+ snaplen = pcap_snapshot(p);
+
+ lex_init(buf ? buf : "");
+ init_linktype(pcap_datalink(p));
+ (void)pcap_parse();
+
+ if (n_errors)
+ syntax();
+
+ if (root == NULL)
+ root = gen_retblk(snaplen);
+
+ if (optimize) {
+ bpf_optimize(&root);
+ if (root == NULL ||
+ (root->s.code == (BPF_RET|BPF_K) && root->s.k == 0))
+ bpf_error("expression rejects all packets");
+ }
+ program->bf_insns = icode_to_fcode(root, &len);
+ program->bf_len = len;
+
+ freechunks();
+ return (0);
+}
+
+/*
+ * Backpatch the blocks in 'list' to 'target'. The 'sense' field indicates
+ * which of the jt and jf fields has been resolved and which is a pointer
+ * back to another unresolved block (or nil). At least one of the fields
+ * in each block is already resolved.
+ */
+static void
+backpatch(list, target)
+ struct block *list, *target;
+{
+ struct block *next;
+
+ while (list) {
+ if (!list->sense) {
+ next = JT(list);
+ JT(list) = target;
+ } else {
+ next = JF(list);
+ JF(list) = target;
+ }
+ list = next;
+ }
+}
+
+/*
+ * Merge the lists in b0 and b1, using the 'sense' field to indicate
+ * which of jt and jf is the link.
+ */
+static void
+merge(b0, b1)
+ struct block *b0, *b1;
+{
+ register struct block **p = &b0;
+
+ /* Find end of list. */
+ while (*p)
+ p = !((*p)->sense) ? &JT(*p) : &JF(*p);
+
+ /* Concatenate the lists. */
+ *p = b1;
+}
+
+void
+finish_parse(p)
+ struct block *p;
+{
+ backpatch(p, gen_retblk(snaplen));
+ p->sense = !p->sense;
+ backpatch(p, gen_retblk(0));
+ root = p->head;
+}
+
+void
+gen_and(b0, b1)
+ struct block *b0, *b1;
+{
+ backpatch(b0, b1->head);
+ b0->sense = !b0->sense;
+ b1->sense = !b1->sense;
+ merge(b1, b0);
+ b1->sense = !b1->sense;
+ b1->head = b0->head;
+}
+
+void
+gen_or(b0, b1)
+ struct block *b0, *b1;
+{
+ b0->sense = !b0->sense;
+ backpatch(b0, b1->head);
+ b0->sense = !b0->sense;
+ merge(b1, b0);
+ b1->head = b0->head;
+}
+
+void
+gen_not(b)
+ struct block *b;
+{
+ b->sense = !b->sense;
+}
+
+static struct block *
+gen_cmp(offset, size, v)
+ u_int offset, size;
+ bpf_int32 v;
+{
+ struct slist *s;
+ struct block *b;
+
+ s = new_stmt(BPF_LD|BPF_ABS|size);
+ s->s.k = offset;
+
+ b = new_block(JMP(BPF_JEQ));
+ b->stmts = s;
+ b->s.k = v;
+
+ return b;
+}
+
+static struct block *
+gen_mcmp(offset, size, v, mask)
+ u_int offset, size;
+ bpf_int32 v;
+ bpf_u_int32 mask;
+{
+ struct block *b = gen_cmp(offset, size, v);
+ struct slist *s;
+
+ if (mask != 0xffffffff) {
+ s = new_stmt(BPF_ALU|BPF_AND|BPF_K);
+ s->s.k = mask;
+ b->stmts->next = s;
+ }
+ return b;
+}
+
+static struct block *
+gen_bcmp(offset, size, v)
+ register u_int offset, size;
+ register const u_char *v;
+{
+ register struct block *b, *tmp;
+
+ b = NULL;
+ while (size >= 4) {
+ register const u_char *p = &v[size - 4];
+ bpf_int32 w = ((bpf_int32)p[0] << 24) |
+ ((bpf_int32)p[1] << 16) | ((bpf_int32)p[2] << 8) | p[3];
+
+ tmp = gen_cmp(offset + size - 4, BPF_W, w);
+ if (b != NULL)
+ gen_and(b, tmp);
+ b = tmp;
+ size -= 4;
+ }
+ while (size >= 2) {
+ register const u_char *p = &v[size - 2];
+ bpf_int32 w = ((bpf_int32)p[0] << 8) | p[1];
+
+ tmp = gen_cmp(offset + size - 2, BPF_H, w);
+ if (b != NULL)
+ gen_and(b, tmp);
+ b = tmp;
+ size -= 2;
+ }
+ if (size > 0) {
+ tmp = gen_cmp(offset, BPF_B, (bpf_int32)v[0]);
+ if (b != NULL)
+ gen_and(b, tmp);
+ b = tmp;
+ }
+ return b;
+}
+
+/*
+ * Various code constructs need to know the layout of the data link
+ * layer. These variables give the necessary offsets. off_linktype
+ * is set to -1 for no encapsulation, in which case, IP is assumed.
+ */
+static u_int off_linktype;
+static u_int off_nl;
+static int linktype;
+
+static void
+init_linktype(type)
+ int type;
+{
+ linktype = type;
+
+ switch (type) {
+
+ case DLT_EN10MB:
+ off_linktype = 12;
+ off_nl = 14;
+ return;
+
+ case DLT_SLIP:
+ /*
+ * SLIP doesn't have a link level type. The 16 byte
+ * header is hacked into our SLIP driver.
+ */
+ off_linktype = -1;
+ off_nl = 16;
+ return;
+
+ case DLT_SLIP_BSDOS:
+ /* XXX this may be the same as the DLT_PPP_BSDOS case */
+ off_linktype = -1;
+ /* XXX end */
+ off_nl = 24;
+ return;
+
+ case DLT_NULL:
+ off_linktype = 0;
+ off_nl = 4;
+ return;
+
+ case DLT_PPP:
+ off_linktype = 2;
+ off_nl = 4;
+ return;
+
+ case DLT_PPP_BSDOS:
+ off_linktype = 5;
+ off_nl = 24;
+ return;
+
+ case DLT_FDDI:
+ /*
+ * FDDI doesn't really have a link-level type field.
+ * We assume that SSAP = SNAP is being used and pick
+ * out the encapsulated Ethernet type.
+ */
+ off_linktype = 19;
+#ifdef PCAP_FDDIPAD
+ off_linktype += pcap_fddipad;
+#endif
+ off_nl = 21;
+#ifdef PCAP_FDDIPAD
+ off_nl += pcap_fddipad;
+#endif
+ return;
+
+ case DLT_IEEE802:
+ off_linktype = 20;
+ off_nl = 22;
+ return;
+
+ case DLT_ATM_RFC1483:
+ /*
+ * assume routed, non-ISO PDUs
+ * (i.e., LLC = 0xAA-AA-03, OUT = 0x00-00-00)
+ */
+ off_linktype = 6;
+ off_nl = 8;
+ return;
+
+ case DLT_RAW:
+ off_linktype = -1;
+ off_nl = 0;
+ return;
+ }
+ bpf_error("unknown data link type 0x%x", linktype);
+ /* NOTREACHED */
+}
+
+static struct block *
+gen_uncond(rsense)
+ int rsense;
+{
+ struct block *b;
+ struct slist *s;
+
+ s = new_stmt(BPF_LD|BPF_IMM);
+ s->s.k = !rsense;
+ b = new_block(JMP(BPF_JEQ));
+ b->stmts = s;
+
+ return b;
+}
+
+static inline struct block *
+gen_true()
+{
+ return gen_uncond(1);
+}
+
+static inline struct block *
+gen_false()
+{
+ return gen_uncond(0);
+}
+
+static struct block *
+gen_linktype(proto)
+ register int proto;
+{
+ struct block *b0, *b1;
+
+ /* If we're not using encapsulation and checking for IP, we're done */
+ if (off_linktype == -1 && proto == ETHERTYPE_IP)
+ return gen_true();
+
+ switch (linktype) {
+
+ case DLT_SLIP:
+ return gen_false();
+
+ case DLT_PPP:
+ if (proto == ETHERTYPE_IP)
+ proto = PPP_IP; /* XXX was 0x21 */
+ break;
+
+ case DLT_PPP_BSDOS:
+ switch (proto) {
+
+ case ETHERTYPE_IP:
+ b0 = gen_cmp(off_linktype, BPF_H, PPP_IP);
+ b1 = gen_cmp(off_linktype, BPF_H, PPP_VJC);
+ gen_or(b0, b1);
+ b0 = gen_cmp(off_linktype, BPF_H, PPP_VJNC);
+ gen_or(b1, b0);
+ return b0;
+
+ case ETHERTYPE_DN:
+ proto = PPP_DECNET;
+ break;
+
+ case ETHERTYPE_ATALK:
+ proto = PPP_APPLE;
+ break;
+
+ case ETHERTYPE_NS:
+ proto = PPP_NS;
+ break;
+ }
+ break;
+
+ case DLT_NULL:
+ /* XXX */
+ if (proto == ETHERTYPE_IP)
+ return (gen_cmp(0, BPF_W, (bpf_int32)htonl(AF_INET)));
+ else
+ return gen_false();
+ }
+ return gen_cmp(off_linktype, BPF_H, (bpf_int32)proto);
+}
+
+static struct block *
+gen_hostop(addr, mask, dir, proto, src_off, dst_off)
+ bpf_u_int32 addr;
+ bpf_u_int32 mask;
+ int dir, proto;
+ u_int src_off, dst_off;
+{
+ struct block *b0, *b1;
+ u_int offset;
+
+ switch (dir) {
+
+ case Q_SRC:
+ offset = src_off;
+ break;
+
+ case Q_DST:
+ offset = dst_off;
+ break;
+
+ case Q_AND:
+ b0 = gen_hostop(addr, mask, Q_SRC, proto, src_off, dst_off);
+ b1 = gen_hostop(addr, mask, Q_DST, proto, src_off, dst_off);
+ gen_and(b0, b1);
+ return b1;
+
+ case Q_OR:
+ case Q_DEFAULT:
+ b0 = gen_hostop(addr, mask, Q_SRC, proto, src_off, dst_off);
+ b1 = gen_hostop(addr, mask, Q_DST, proto, src_off, dst_off);
+ gen_or(b0, b1);
+ return b1;
+
+ default:
+ abort();
+ }
+ b0 = gen_linktype(proto);
+ b1 = gen_mcmp(offset, BPF_W, (bpf_int32)addr, mask);
+ gen_and(b0, b1);
+ return b1;
+}
+
+static struct block *
+gen_ehostop(eaddr, dir)
+ register const u_char *eaddr;
+ register int dir;
+{
+ register struct block *b0, *b1;
+
+ switch (dir) {
+ case Q_SRC:
+ return gen_bcmp(6, 6, eaddr);
+
+ case Q_DST:
+ return gen_bcmp(0, 6, eaddr);
+
+ case Q_AND:
+ b0 = gen_ehostop(eaddr, Q_SRC);
+ b1 = gen_ehostop(eaddr, Q_DST);
+ gen_and(b0, b1);
+ return b1;
+
+ case Q_DEFAULT:
+ case Q_OR:
+ b0 = gen_ehostop(eaddr, Q_SRC);
+ b1 = gen_ehostop(eaddr, Q_DST);
+ gen_or(b0, b1);
+ return b1;
+ }
+ abort();
+ /* NOTREACHED */
+}
+
+/*
+ * Like gen_ehostop, but for DLT_FDDI
+ */
+static struct block *
+gen_fhostop(eaddr, dir)
+ register const u_char *eaddr;
+ register int dir;
+{
+ struct block *b0, *b1;
+
+ switch (dir) {
+ case Q_SRC:
+#ifdef PCAP_FDDIPAD
+ return gen_bcmp(6 + 1 + pcap_fddipad, 6, eaddr);
+#else
+ return gen_bcmp(6 + 1, 6, eaddr);
+#endif
+
+ case Q_DST:
+#ifdef PCAP_FDDIPAD
+ return gen_bcmp(0 + 1 + pcap_fddipad, 6, eaddr);
+#else
+ return gen_bcmp(0 + 1, 6, eaddr);
+#endif
+
+ case Q_AND:
+ b0 = gen_fhostop(eaddr, Q_SRC);
+ b1 = gen_fhostop(eaddr, Q_DST);
+ gen_and(b0, b1);
+ return b1;
+
+ case Q_DEFAULT:
+ case Q_OR:
+ b0 = gen_fhostop(eaddr, Q_SRC);
+ b1 = gen_fhostop(eaddr, Q_DST);
+ gen_or(b0, b1);
+ return b1;
+ }
+ abort();
+ /* NOTREACHED */
+}
+
+/*
+ * This is quite tricky because there may be pad bytes in front of the
+ * DECNET header, and then there are two possible data packet formats that
+ * carry both src and dst addresses, plus 5 packet types in a format that
+ * carries only the src node, plus 2 types that use a different format and
+ * also carry just the src node.
+ *
+ * Yuck.
+ *
+ * Instead of doing those all right, we just look for data packets with
+ * 0 or 1 bytes of padding. If you want to look at other packets, that
+ * will require a lot more hacking.
+ *
+ * To add support for filtering on DECNET "areas" (network numbers)
+ * one would want to add a "mask" argument to this routine. That would
+ * make the filter even more inefficient, although one could be clever
+ * and not generate masking instructions if the mask is 0xFFFF.
+ */
+static struct block *
+gen_dnhostop(addr, dir, base_off)
+ bpf_u_int32 addr;
+ int dir;
+ u_int base_off;
+{
+ struct block *b0, *b1, *b2, *tmp;
+ u_int offset_lh; /* offset if long header is received */
+ u_int offset_sh; /* offset if short header is received */
+
+ switch (dir) {
+
+ case Q_DST:
+ offset_sh = 1; /* follows flags */
+ offset_lh = 7; /* flgs,darea,dsubarea,HIORD */
+ break;
+
+ case Q_SRC:
+ offset_sh = 3; /* follows flags, dstnode */
+ offset_lh = 15; /* flgs,darea,dsubarea,did,sarea,ssub,HIORD */
+ break;
+
+ case Q_AND:
+ /* Inefficient because we do our Calvinball dance twice */
+ b0 = gen_dnhostop(addr, Q_SRC, base_off);
+ b1 = gen_dnhostop(addr, Q_DST, base_off);
+ gen_and(b0, b1);
+ return b1;
+
+ case Q_OR:
+ case Q_DEFAULT:
+ /* Inefficient because we do our Calvinball dance twice */
+ b0 = gen_dnhostop(addr, Q_SRC, base_off);
+ b1 = gen_dnhostop(addr, Q_DST, base_off);
+ gen_or(b0, b1);
+ return b1;
+
+ default:
+ abort();
+ }
+ b0 = gen_linktype(ETHERTYPE_DN);
+ /* Check for pad = 1, long header case */
+ tmp = gen_mcmp(base_off + 2, BPF_H,
+ (bpf_int32)ntohs(0x0681), (bpf_int32)ntohs(0x07FF));
+ b1 = gen_cmp(base_off + 2 + 1 + offset_lh,
+ BPF_H, (bpf_int32)ntohs(addr));
+ gen_and(tmp, b1);
+ /* Check for pad = 0, long header case */
+ tmp = gen_mcmp(base_off + 2, BPF_B, (bpf_int32)0x06, (bpf_int32)0x7);
+ b2 = gen_cmp(base_off + 2 + offset_lh, BPF_H, (bpf_int32)ntohs(addr));
+ gen_and(tmp, b2);
+ gen_or(b2, b1);
+ /* Check for pad = 1, short header case */
+ tmp = gen_mcmp(base_off + 2, BPF_H,
+ (bpf_int32)ntohs(0x0281), (bpf_int32)ntohs(0x07FF));
+ b2 = gen_cmp(base_off + 2 + 1 + offset_sh,
+ BPF_H, (bpf_int32)ntohs(addr));
+ gen_and(tmp, b2);
+ gen_or(b2, b1);
+ /* Check for pad = 0, short header case */
+ tmp = gen_mcmp(base_off + 2, BPF_B, (bpf_int32)0x02, (bpf_int32)0x7);
+ b2 = gen_cmp(base_off + 2 + offset_sh, BPF_H, (bpf_int32)ntohs(addr));
+ gen_and(tmp, b2);
+ gen_or(b2, b1);
+
+ /* Combine with test for linktype */
+ gen_and(b0, b1);
+ return b1;
+}
+
+static struct block *
+gen_host(addr, mask, proto, dir)
+ bpf_u_int32 addr;
+ bpf_u_int32 mask;
+ int proto;
+ int dir;
+{
+ struct block *b0, *b1;
+
+ switch (proto) {
+
+ case Q_DEFAULT:
+ b0 = gen_host(addr, mask, Q_IP, dir);
+ b1 = gen_host(addr, mask, Q_ARP, dir);
+ gen_or(b0, b1);
+ b0 = gen_host(addr, mask, Q_RARP, dir);
+ gen_or(b1, b0);
+ return b0;
+
+ case Q_IP:
+ return gen_hostop(addr, mask, dir, ETHERTYPE_IP,
+ off_nl + 12, off_nl + 16);
+
+ case Q_RARP:
+ return gen_hostop(addr, mask, dir, ETHERTYPE_REVARP,
+ off_nl + 14, off_nl + 24);
+
+ case Q_ARP:
+ return gen_hostop(addr, mask, dir, ETHERTYPE_ARP,
+ off_nl + 14, off_nl + 24);
+
+ case Q_TCP:
+ bpf_error("'tcp' modifier applied to host");
+
+ case Q_UDP:
+ bpf_error("'udp' modifier applied to host");
+
+ case Q_ICMP:
+ bpf_error("'icmp' modifier applied to host");
+
+ case Q_IGMP:
+ bpf_error("'igmp' modifier applied to host");
+
+ case Q_IGRP:
+ bpf_error("'igrp' modifier applied to host");
+
+ case Q_ATALK:
+ bpf_error("ATALK host filtering not implemented");
+
+ case Q_DECNET:
+ return gen_dnhostop(addr, dir, off_nl);
+
+ case Q_SCA:
+ bpf_error("SCA host filtering not implemented");
+
+ case Q_LAT:
+ bpf_error("LAT host filtering not implemented");
+
+ case Q_MOPDL:
+ bpf_error("MOPDL host filtering not implemented");
+
+ case Q_MOPRC:
+ bpf_error("MOPRC host filtering not implemented");
+
+ default:
+ abort();
+ }
+ /* NOTREACHED */
+}
+
+static struct block *
+gen_gateway(eaddr, alist, proto, dir)
+ const u_char *eaddr;
+ bpf_u_int32 **alist;
+ int proto;
+ int dir;
+{
+ struct block *b0, *b1, *tmp;
+
+ if (dir != 0)
+ bpf_error("direction applied to 'gateway'");
+
+ switch (proto) {
+ case Q_DEFAULT:
+ case Q_IP:
+ case Q_ARP:
+ case Q_RARP:
+ if (linktype == DLT_EN10MB)
+ b0 = gen_ehostop(eaddr, Q_OR);
+ else if (linktype == DLT_FDDI)
+ b0 = gen_fhostop(eaddr, Q_OR);
+ else
+ bpf_error(
+ "'gateway' supported only on ethernet or FDDI");
+
+ b1 = gen_host(**alist++, 0xffffffff, proto, Q_OR);
+ while (*alist) {
+ tmp = gen_host(**alist++, 0xffffffff, proto, Q_OR);
+ gen_or(b1, tmp);
+ b1 = tmp;
+ }
+ gen_not(b1);
+ gen_and(b0, b1);
+ return b1;
+ }
+ bpf_error("illegal modifier of 'gateway'");
+ /* NOTREACHED */
+}
+
+struct block *
+gen_proto_abbrev(proto)
+ int proto;
+{
+ struct block *b0, *b1;
+
+ switch (proto) {
+
+ case Q_TCP:
+ b0 = gen_linktype(ETHERTYPE_IP);
+ b1 = gen_cmp(off_nl + 9, BPF_B, (bpf_int32)IPPROTO_TCP);
+ gen_and(b0, b1);
+ break;
+
+ case Q_UDP:
+ b0 = gen_linktype(ETHERTYPE_IP);
+ b1 = gen_cmp(off_nl + 9, BPF_B, (bpf_int32)IPPROTO_UDP);
+ gen_and(b0, b1);
+ break;
+
+ case Q_ICMP:
+ b0 = gen_linktype(ETHERTYPE_IP);
+ b1 = gen_cmp(off_nl + 9, BPF_B, (bpf_int32)IPPROTO_ICMP);
+ gen_and(b0, b1);
+ break;
+
+ case Q_IGMP:
+ b0 = gen_linktype(ETHERTYPE_IP);
+ b1 = gen_cmp(off_nl + 9, BPF_B, (bpf_int32)2);
+ gen_and(b0, b1);
+ break;
+
+#ifndef IPPROTO_IGRP
+#define IPPROTO_IGRP 9
+#endif
+ case Q_IGRP:
+ b0 = gen_linktype(ETHERTYPE_IP);
+ b1 = gen_cmp(off_nl + 9, BPF_B, (long)IPPROTO_IGRP);
+ gen_and(b0, b1);
+ break;
+
+ case Q_IP:
+ b1 = gen_linktype(ETHERTYPE_IP);
+ break;
+
+ case Q_ARP:
+ b1 = gen_linktype(ETHERTYPE_ARP);
+ break;
+
+ case Q_RARP:
+ b1 = gen_linktype(ETHERTYPE_REVARP);
+ break;
+
+ case Q_LINK:
+ bpf_error("link layer applied in wrong context");
+
+ case Q_ATALK:
+ b1 = gen_linktype(ETHERTYPE_ATALK);
+ break;
+
+ case Q_DECNET:
+ b1 = gen_linktype(ETHERTYPE_DN);
+ break;
+
+ case Q_SCA:
+ b1 = gen_linktype(ETHERTYPE_SCA);
+ break;
+
+ case Q_LAT:
+ b1 = gen_linktype(ETHERTYPE_LAT);
+ break;
+
+ case Q_MOPDL:
+ b1 = gen_linktype(ETHERTYPE_MOPDL);
+ break;
+
+ case Q_MOPRC:
+ b1 = gen_linktype(ETHERTYPE_MOPRC);
+ break;
+
+ default:
+ abort();
+ }
+ return b1;
+}
+
+static struct block *
+gen_ipfrag()
+{
+ struct slist *s;
+ struct block *b;
+
+ /* not ip frag */
+ s = new_stmt(BPF_LD|BPF_H|BPF_ABS);
+ s->s.k = off_nl + 6;
+ b = new_block(JMP(BPF_JSET));
+ b->s.k = 0x1fff;
+ b->stmts = s;
+ gen_not(b);
+
+ return b;
+}
+
+static struct block *
+gen_portatom(off, v)
+ int off;
+ bpf_int32 v;
+{
+ struct slist *s;
+ struct block *b;
+
+ s = new_stmt(BPF_LDX|BPF_MSH|BPF_B);
+ s->s.k = off_nl;
+
+ s->next = new_stmt(BPF_LD|BPF_IND|BPF_H);
+ s->next->s.k = off_nl + off;
+
+ b = new_block(JMP(BPF_JEQ));
+ b->stmts = s;
+ b->s.k = v;
+
+ return b;
+}
+
+struct block *
+gen_portop(port, proto, dir)
+ int port, proto, dir;
+{
+ struct block *b0, *b1, *tmp;
+
+ /* ip proto 'proto' */
+ tmp = gen_cmp(off_nl + 9, BPF_B, (bpf_int32)proto);
+ b0 = gen_ipfrag();
+ gen_and(tmp, b0);
+
+ switch (dir) {
+ case Q_SRC:
+ b1 = gen_portatom(0, (bpf_int32)port);
+ break;
+
+ case Q_DST:
+ b1 = gen_portatom(2, (bpf_int32)port);
+ break;
+
+ case Q_OR:
+ case Q_DEFAULT:
+ tmp = gen_portatom(0, (bpf_int32)port);
+ b1 = gen_portatom(2, (bpf_int32)port);
+ gen_or(tmp, b1);
+ break;
+
+ case Q_AND:
+ tmp = gen_portatom(0, (bpf_int32)port);
+ b1 = gen_portatom(2, (bpf_int32)port);
+ gen_and(tmp, b1);
+ break;
+
+ default:
+ abort();
+ }
+ gen_and(b0, b1);
+
+ return b1;
+}
+
+static struct block *
+gen_port(port, ip_proto, dir)
+ int port;
+ int ip_proto;
+ int dir;
+{
+ struct block *b0, *b1, *tmp;
+
+ /* ether proto ip */
+ b0 = gen_linktype(ETHERTYPE_IP);
+
+ switch (ip_proto) {
+ case IPPROTO_UDP:
+ case IPPROTO_TCP:
+ b1 = gen_portop(port, ip_proto, dir);
+ break;
+
+ case PROTO_UNDEF:
+ tmp = gen_portop(port, IPPROTO_TCP, dir);
+ b1 = gen_portop(port, IPPROTO_UDP, dir);
+ gen_or(tmp, b1);
+ break;
+
+ default:
+ abort();
+ }
+ gen_and(b0, b1);
+ return b1;
+}
+
+static int
+lookup_proto(name, proto)
+ register const char *name;
+ register int proto;
+{
+ register int v;
+
+ switch (proto) {
+
+ case Q_DEFAULT:
+ case Q_IP:
+ v = pcap_nametoproto(name);
+ if (v == PROTO_UNDEF)
+ bpf_error("unknown ip proto '%s'", name);
+ break;
+
+ case Q_LINK:
+ /* XXX should look up h/w protocol type based on linktype */
+ v = pcap_nametoeproto(name);
+ if (v == PROTO_UNDEF)
+ bpf_error("unknown ether proto '%s'", name);
+ break;
+
+ default:
+ v = PROTO_UNDEF;
+ break;
+ }
+ return v;
+}
+
+static struct block *
+gen_proto(v, proto, dir)
+ int v;
+ int proto;
+ int dir;
+{
+ struct block *b0, *b1;
+
+ if (dir != Q_DEFAULT)
+ bpf_error("direction applied to 'proto'");
+
+ switch (proto) {
+ case Q_DEFAULT:
+ case Q_IP:
+ b0 = gen_linktype(ETHERTYPE_IP);
+ b1 = gen_cmp(off_nl + 9, BPF_B, (bpf_int32)v);
+ gen_and(b0, b1);
+ return b1;
+
+ case Q_ARP:
+ bpf_error("arp does not encapsulate another protocol");
+ /* NOTREACHED */
+
+ case Q_RARP:
+ bpf_error("rarp does not encapsulate another protocol");
+ /* NOTREACHED */
+
+ case Q_ATALK:
+ bpf_error("atalk encapsulation is not specifiable");
+ /* NOTREACHED */
+
+ case Q_DECNET:
+ bpf_error("decnet encapsulation is not specifiable");
+ /* NOTREACHED */
+
+ case Q_SCA:
+ bpf_error("sca does not encapsulate another protocol");
+ /* NOTREACHED */
+
+ case Q_LAT:
+ bpf_error("lat does not encapsulate another protocol");
+ /* NOTREACHED */
+
+ case Q_MOPRC:
+ bpf_error("moprc does not encapsulate another protocol");
+ /* NOTREACHED */
+
+ case Q_MOPDL:
+ bpf_error("mopdl does not encapsulate another protocol");
+ /* NOTREACHED */
+
+ case Q_LINK:
+ return gen_linktype(v);
+
+ case Q_UDP:
+ bpf_error("'udp proto' is bogus");
+ /* NOTREACHED */
+
+ case Q_TCP:
+ bpf_error("'tcp proto' is bogus");
+ /* NOTREACHED */
+
+ case Q_ICMP:
+ bpf_error("'icmp proto' is bogus");
+ /* NOTREACHED */
+
+ case Q_IGMP:
+ bpf_error("'igmp proto' is bogus");
+ /* NOTREACHED */
+
+ case Q_IGRP:
+ bpf_error("'igrp proto' is bogus");
+ /* NOTREACHED */
+
+ default:
+ abort();
+ /* NOTREACHED */
+ }
+ /* NOTREACHED */
+}
+
+struct block *
+gen_scode(name, q)
+ register const char *name;
+ struct qual q;
+{
+ int proto = q.proto;
+ int dir = q.dir;
+ int tproto;
+ u_char *eaddr;
+ bpf_u_int32 mask, addr, **alist;
+ struct block *b, *tmp;
+ int port, real_proto;
+
+ switch (q.addr) {
+
+ case Q_NET:
+ addr = pcap_nametonetaddr(name);
+ if (addr == 0)
+ bpf_error("unknown network '%s'", name);
+ /* Left justify network addr and calculate its network mask */
+ mask = 0xffffffff;
+ while (addr && (addr & 0xff000000) == 0) {
+ addr <<= 8;
+ mask <<= 8;
+ }
+ return gen_host(addr, mask, proto, dir);
+
+ case Q_DEFAULT:
+ case Q_HOST:
+ if (proto == Q_LINK) {
+ switch (linktype) {
+
+ case DLT_EN10MB:
+ eaddr = pcap_ether_hostton(name);
+ if (eaddr == NULL)
+ bpf_error(
+ "unknown ether host '%s'", name);
+ return gen_ehostop(eaddr, dir);
+
+ case DLT_FDDI:
+ eaddr = pcap_ether_hostton(name);
+ if (eaddr == NULL)
+ bpf_error(
+ "unknown FDDI host '%s'", name);
+ return gen_fhostop(eaddr, dir);
+
+ default:
+ bpf_error(
+ "only ethernet/FDDI supports link-level host name");
+ break;
+ }
+ } else if (proto == Q_DECNET) {
+ unsigned short dn_addr = __pcap_nametodnaddr(name);
+ /*
+ * I don't think DECNET hosts can be multihomed, so
+ * there is no need to build up a list of addresses
+ */
+ return (gen_host(dn_addr, 0, proto, dir));
+ } else {
+ alist = pcap_nametoaddr(name);
+ if (alist == NULL || *alist == NULL)
+ bpf_error("unknown host '%s'", name);
+ tproto = proto;
+ if (off_linktype == -1 && tproto == Q_DEFAULT)
+ tproto = Q_IP;
+ b = gen_host(**alist++, 0xffffffff, tproto, dir);
+ while (*alist) {
+ tmp = gen_host(**alist++, 0xffffffff,
+ tproto, dir);
+ gen_or(b, tmp);
+ b = tmp;
+ }
+ return b;
+ }
+
+ case Q_PORT:
+ if (proto != Q_DEFAULT && proto != Q_UDP && proto != Q_TCP)
+ bpf_error("illegal qualifier of 'port'");
+ if (pcap_nametoport(name, &port, &real_proto) == 0)
+ bpf_error("unknown port '%s'", name);
+ if (proto == Q_UDP) {
+ if (real_proto == IPPROTO_TCP)
+ bpf_error("port '%s' is tcp", name);
+ else
+ /* override PROTO_UNDEF */
+ real_proto = IPPROTO_UDP;
+ }
+ if (proto == Q_TCP) {
+ if (real_proto == IPPROTO_UDP)
+ bpf_error("port '%s' is udp", name);
+ else
+ /* override PROTO_UNDEF */
+ real_proto = IPPROTO_TCP;
+ }
+ return gen_port(port, real_proto, dir);
+
+ case Q_GATEWAY:
+ eaddr = pcap_ether_hostton(name);
+ if (eaddr == NULL)
+ bpf_error("unknown ether host: %s", name);
+
+ alist = pcap_nametoaddr(name);
+ if (alist == NULL || *alist == NULL)
+ bpf_error("unknown host '%s'", name);
+ return gen_gateway(eaddr, alist, proto, dir);
+
+ case Q_PROTO:
+ real_proto = lookup_proto(name, proto);
+ if (real_proto >= 0)
+ return gen_proto(real_proto, proto, dir);
+ else
+ bpf_error("unknown protocol: %s", name);
+
+ case Q_UNDEF:
+ syntax();
+ /* NOTREACHED */
+ }
+ abort();
+ /* NOTREACHED */
+}
+
+struct block *
+gen_mcode(s1, s2, masklen, q)
+ register const char *s1, *s2;
+ register int masklen;
+ struct qual q;
+{
+ register int nlen, mlen;
+ bpf_u_int32 n, m;
+
+ nlen = __pcap_atoin(s1, &n);
+ /* Promote short ipaddr */
+ n <<= 32 - nlen;
+
+ if (s2 != NULL) {
+ mlen = __pcap_atoin(s2, &m);
+ /* Promote short ipaddr */
+ m <<= 32 - mlen;
+ if ((n & ~m) != 0)
+ bpf_error("non-network bits set in \"%s mask %s\"",
+ s1, s2);
+ } else {
+ /* Convert mask len to mask */
+ if (masklen > 32)
+ bpf_error("mask length must be <= 32");
+ m = 0xffffffff << (32 - masklen);
+ if ((n & ~m) != 0)
+ bpf_error("non-network bits set in \"%s/%d\"",
+ s1, masklen);
+ }
+
+ switch (q.addr) {
+
+ case Q_NET:
+ return gen_host(n, m, q.proto, q.dir);
+
+ default:
+ bpf_error("Mask syntax for networks only");
+ /* NOTREACHED */
+ }
+}
+
+struct block *
+gen_ncode(s, v, q)
+ register const char *s;
+ bpf_u_int32 v;
+ struct qual q;
+{
+ bpf_u_int32 mask;
+ int proto = q.proto;
+ int dir = q.dir;
+ register int vlen;
+
+ if (s == NULL)
+ vlen = 32;
+ else if (q.proto == Q_DECNET)
+ vlen = __pcap_atodn(s, &v);
+ else
+ vlen = __pcap_atoin(s, &v);
+
+ switch (q.addr) {
+
+ case Q_DEFAULT:
+ case Q_HOST:
+ case Q_NET:
+ if (proto == Q_DECNET)
+ return gen_host(v, 0, proto, dir);
+ else if (proto == Q_LINK) {
+ bpf_error("illegal link layer address");
+ } else {
+ mask = 0xffffffff;
+ if (s == NULL && q.addr == Q_NET) {
+ /* Promote short net number */
+ while (v && (v & 0xff000000) == 0) {
+ v <<= 8;
+ mask <<= 8;
+ }
+ } else {
+ /* Promote short ipaddr */
+ v <<= 32 - vlen;
+ mask <<= 32 - vlen;
+ }
+ return gen_host(v, mask, proto, dir);
+ }
+
+ case Q_PORT:
+ if (proto == Q_UDP)
+ proto = IPPROTO_UDP;
+ else if (proto == Q_TCP)
+ proto = IPPROTO_TCP;
+ else if (proto == Q_DEFAULT)
+ proto = PROTO_UNDEF;
+ else
+ bpf_error("illegal qualifier of 'port'");
+
+ return gen_port((int)v, proto, dir);
+
+ case Q_GATEWAY:
+ bpf_error("'gateway' requires a name");
+ /* NOTREACHED */
+
+ case Q_PROTO:
+ return gen_proto((int)v, proto, dir);
+
+ case Q_UNDEF:
+ syntax();
+ /* NOTREACHED */
+
+ default:
+ abort();
+ /* NOTREACHED */
+ }
+ /* NOTREACHED */
+}
+
+struct block *
+gen_ecode(eaddr, q)
+ register const u_char *eaddr;
+ struct qual q;
+{
+ if ((q.addr == Q_HOST || q.addr == Q_DEFAULT) && q.proto == Q_LINK) {
+ if (linktype == DLT_EN10MB)
+ return gen_ehostop(eaddr, (int)q.dir);
+ if (linktype == DLT_FDDI)
+ return gen_fhostop(eaddr, (int)q.dir);
+ }
+ bpf_error("ethernet address used in non-ether expression");
+ /* NOTREACHED */
+}
+
+void
+sappend(s0, s1)
+ struct slist *s0, *s1;
+{
+ /*
+ * This is definitely not the best way to do this, but the
+ * lists will rarely get long.
+ */
+ while (s0->next)
+ s0 = s0->next;
+ s0->next = s1;
+}
+
+static struct slist *
+xfer_to_x(a)
+ struct arth *a;
+{
+ struct slist *s;
+
+ s = new_stmt(BPF_LDX|BPF_MEM);
+ s->s.k = a->regno;
+ return s;
+}
+
+static struct slist *
+xfer_to_a(a)
+ struct arth *a;
+{
+ struct slist *s;
+
+ s = new_stmt(BPF_LD|BPF_MEM);
+ s->s.k = a->regno;
+ return s;
+}
+
+struct arth *
+gen_load(proto, index, size)
+ int proto;
+ struct arth *index;
+ int size;
+{
+ struct slist *s, *tmp;
+ struct block *b;
+ int regno = alloc_reg();
+
+ free_reg(index->regno);
+ switch (size) {
+
+ default:
+ bpf_error("data size must be 1, 2, or 4");
+
+ case 1:
+ size = BPF_B;
+ break;
+
+ case 2:
+ size = BPF_H;
+ break;
+
+ case 4:
+ size = BPF_W;
+ break;
+ }
+ switch (proto) {
+ default:
+ bpf_error("unsupported index operation");
+
+ case Q_LINK:
+ s = xfer_to_x(index);
+ tmp = new_stmt(BPF_LD|BPF_IND|size);
+ sappend(s, tmp);
+ sappend(index->s, s);
+ break;
+
+ case Q_IP:
+ case Q_ARP:
+ case Q_RARP:
+ case Q_ATALK:
+ case Q_DECNET:
+ case Q_SCA:
+ case Q_LAT:
+ case Q_MOPRC:
+ case Q_MOPDL:
+ /* XXX Note that we assume a fixed link link header here. */
+ s = xfer_to_x(index);
+ tmp = new_stmt(BPF_LD|BPF_IND|size);
+ tmp->s.k = off_nl;
+ sappend(s, tmp);
+ sappend(index->s, s);
+
+ b = gen_proto_abbrev(proto);
+ if (index->b)
+ gen_and(index->b, b);
+ index->b = b;
+ break;
+
+ case Q_TCP:
+ case Q_UDP:
+ case Q_ICMP:
+ case Q_IGMP:
+ case Q_IGRP:
+ s = new_stmt(BPF_LDX|BPF_MSH|BPF_B);
+ s->s.k = off_nl;
+ sappend(s, xfer_to_a(index));
+ sappend(s, new_stmt(BPF_ALU|BPF_ADD|BPF_X));
+ sappend(s, new_stmt(BPF_MISC|BPF_TAX));
+ sappend(s, tmp = new_stmt(BPF_LD|BPF_IND|size));
+ tmp->s.k = off_nl;
+ sappend(index->s, s);
+
+ gen_and(gen_proto_abbrev(proto), b = gen_ipfrag());
+ if (index->b)
+ gen_and(index->b, b);
+ index->b = b;
+ break;
+ }
+ index->regno = regno;
+ s = new_stmt(BPF_ST);
+ s->s.k = regno;
+ sappend(index->s, s);
+
+ return index;
+}
+
+struct block *
+gen_relation(code, a0, a1, reversed)
+ int code;
+ struct arth *a0, *a1;
+ int reversed;
+{
+ struct slist *s0, *s1, *s2;
+ struct block *b, *tmp;
+
+ s0 = xfer_to_x(a1);
+ s1 = xfer_to_a(a0);
+ s2 = new_stmt(BPF_ALU|BPF_SUB|BPF_X);
+ b = new_block(JMP(code));
+ if (code == BPF_JGT || code == BPF_JGE) {
+ reversed = !reversed;
+ b->s.k = 0x80000000;
+ }
+ if (reversed)
+ gen_not(b);
+
+ sappend(s1, s2);
+ sappend(s0, s1);
+ sappend(a1->s, s0);
+ sappend(a0->s, a1->s);
+
+ b->stmts = a0->s;
+
+ free_reg(a0->regno);
+ free_reg(a1->regno);
+
+ /* 'and' together protocol checks */
+ if (a0->b) {
+ if (a1->b) {
+ gen_and(a0->b, tmp = a1->b);
+ }
+ else
+ tmp = a0->b;
+ } else
+ tmp = a1->b;
+
+ if (tmp)
+ gen_and(tmp, b);
+
+ return b;
+}
+
+struct arth *
+gen_loadlen()
+{
+ int regno = alloc_reg();
+ struct arth *a = (struct arth *)newchunk(sizeof(*a));
+ struct slist *s;
+
+ s = new_stmt(BPF_LD|BPF_LEN);
+ s->next = new_stmt(BPF_ST);
+ s->next->s.k = regno;
+ a->s = s;
+ a->regno = regno;
+
+ return a;
+}
+
+struct arth *
+gen_loadi(val)
+ int val;
+{
+ struct arth *a;
+ struct slist *s;
+ int reg;
+
+ a = (struct arth *)newchunk(sizeof(*a));
+
+ reg = alloc_reg();
+
+ s = new_stmt(BPF_LD|BPF_IMM);
+ s->s.k = val;
+ s->next = new_stmt(BPF_ST);
+ s->next->s.k = reg;
+ a->s = s;
+ a->regno = reg;
+
+ return a;
+}
+
+struct arth *
+gen_neg(a)
+ struct arth *a;
+{
+ struct slist *s;
+
+ s = xfer_to_a(a);
+ sappend(a->s, s);
+ s = new_stmt(BPF_ALU|BPF_NEG);
+ s->s.k = 0;
+ sappend(a->s, s);
+ s = new_stmt(BPF_ST);
+ s->s.k = a->regno;
+ sappend(a->s, s);
+
+ return a;
+}
+
+struct arth *
+gen_arth(code, a0, a1)
+ int code;
+ struct arth *a0, *a1;
+{
+ struct slist *s0, *s1, *s2;
+
+ s0 = xfer_to_x(a1);
+ s1 = xfer_to_a(a0);
+ s2 = new_stmt(BPF_ALU|BPF_X|code);
+
+ sappend(s1, s2);
+ sappend(s0, s1);
+ sappend(a1->s, s0);
+ sappend(a0->s, a1->s);
+
+ free_reg(a1->regno);
+
+ s0 = new_stmt(BPF_ST);
+ a0->regno = s0->s.k = alloc_reg();
+ sappend(a0->s, s0);
+
+ return a0;
+}
+
+/*
+ * Here we handle simple allocation of the scratch registers.
+ * If too many registers are alloc'd, the allocator punts.
+ */
+static int regused[BPF_MEMWORDS];
+static int curreg;
+
+/*
+ * Return the next free register.
+ */
+static int
+alloc_reg()
+{
+ int n = BPF_MEMWORDS;
+
+ while (--n >= 0) {
+ if (regused[curreg])
+ curreg = (curreg + 1) % BPF_MEMWORDS;
+ else {
+ regused[curreg] = 1;
+ return curreg;
+ }
+ }
+ bpf_error("too many registers needed to evaluate expression");
+ /* NOTREACHED */
+}
+
+/*
+ * Return a register to the table so it can
+ * be used later.
+ */
+static void
+free_reg(n)
+ int n;
+{
+ regused[n] = 0;
+}
+
+static struct block *
+gen_len(jmp, n)
+ int jmp, n;
+{
+ struct slist *s;
+ struct block *b;
+
+ s = new_stmt(BPF_LD|BPF_LEN);
+ b = new_block(JMP(jmp));
+ b->stmts = s;
+ b->s.k = n;
+
+ return b;
+}
+
+struct block *
+gen_greater(n)
+ int n;
+{
+ return gen_len(BPF_JGE, n);
+}
+
+struct block *
+gen_less(n)
+ int n;
+{
+ struct block *b;
+
+ b = gen_len(BPF_JGT, n);
+ gen_not(b);
+
+ return b;
+}
+
+struct block *
+gen_byteop(op, idx, val)
+ int op, idx, val;
+{
+ struct block *b;
+ struct slist *s;
+
+ switch (op) {
+ default:
+ abort();
+
+ case '=':
+ return gen_cmp((u_int)idx, BPF_B, (bpf_int32)val);
+
+ case '<':
+ b = gen_cmp((u_int)idx, BPF_B, (bpf_int32)val);
+ b->s.code = JMP(BPF_JGE);
+ gen_not(b);
+ return b;
+
+ case '>':
+ b = gen_cmp((u_int)idx, BPF_B, (bpf_int32)val);
+ b->s.code = JMP(BPF_JGT);
+ return b;
+
+ case '|':
+ s = new_stmt(BPF_ALU|BPF_OR|BPF_K);
+ break;
+
+ case '&':
+ s = new_stmt(BPF_ALU|BPF_AND|BPF_K);
+ break;
+ }
+ s->s.k = val;
+ b = new_block(JMP(BPF_JEQ));
+ b->stmts = s;
+ gen_not(b);
+
+ return b;
+}
+
+struct block *
+gen_broadcast(proto)
+ int proto;
+{
+ bpf_u_int32 hostmask;
+ struct block *b0, *b1, *b2;
+ static u_char ebroadcast[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
+
+ switch (proto) {
+
+ case Q_DEFAULT:
+ case Q_LINK:
+ if (linktype == DLT_EN10MB)
+ return gen_ehostop(ebroadcast, Q_DST);
+ if (linktype == DLT_FDDI)
+ return gen_fhostop(ebroadcast, Q_DST);
+ bpf_error("not a broadcast link");
+ break;
+
+ case Q_IP:
+ b0 = gen_linktype(ETHERTYPE_IP);
+ hostmask = ~netmask;
+ b1 = gen_mcmp(off_nl + 16, BPF_W, (bpf_int32)0, hostmask);
+ b2 = gen_mcmp(off_nl + 16, BPF_W,
+ (bpf_int32)(~0 & hostmask), hostmask);
+ gen_or(b1, b2);
+ gen_and(b0, b2);
+ return b2;
+ }
+ bpf_error("only ether/ip broadcast filters supported");
+}
+
+struct block *
+gen_multicast(proto)
+ int proto;
+{
+ register struct block *b0, *b1;
+ register struct slist *s;
+
+ switch (proto) {
+
+ case Q_DEFAULT:
+ case Q_LINK:
+ if (linktype == DLT_EN10MB) {
+ /* ether[0] & 1 != 0 */
+ s = new_stmt(BPF_LD|BPF_B|BPF_ABS);
+ s->s.k = 0;
+ b0 = new_block(JMP(BPF_JSET));
+ b0->s.k = 1;
+ b0->stmts = s;
+ return b0;
+ }
+
+ if (linktype == DLT_FDDI) {
+ /* XXX TEST THIS: MIGHT NOT PORT PROPERLY XXX */
+ /* fddi[1] & 1 != 0 */
+ s = new_stmt(BPF_LD|BPF_B|BPF_ABS);
+ s->s.k = 1;
+ b0 = new_block(JMP(BPF_JSET));
+ b0->s.k = 1;
+ b0->stmts = s;
+ return b0;
+ }
+ /* Link not known to support multicasts */
+ break;
+
+ case Q_IP:
+ b0 = gen_linktype(ETHERTYPE_IP);
+ b1 = gen_cmp(off_nl + 16, BPF_B, (bpf_int32)224);
+ b1->s.code = JMP(BPF_JGE);
+ gen_and(b0, b1);
+ return b1;
+ }
+ bpf_error("only IP multicast filters supported on ethernet/FDDI");
+}
+
+/*
+ * generate command for inbound/outbound. It's here so we can
+ * make it link-type specific. 'dir' = 0 implies "inbound",
+ * = 1 implies "outbound".
+ */
+struct block *
+gen_inbound(dir)
+ int dir;
+{
+ register struct block *b0;
+
+ b0 = gen_relation(BPF_JEQ,
+ gen_load(Q_LINK, gen_loadi(0), 1),
+ gen_loadi(0),
+ dir);
+ return (b0);
+}
--- /dev/null
+/*
+ * Copyright (c) 1990, 1991, 1992, 1993, 1994, 1995, 1996
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ * @(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/gencode.h,v 1.1 1999/08/26 10:05:22 johana Exp $ (LBL)
+ */
+
+/*XXX*/
+#include "gnuc.h"
+
+/* Address qualifiers. */
+
+#define Q_HOST 1
+#define Q_NET 2
+#define Q_PORT 3
+#define Q_GATEWAY 4
+#define Q_PROTO 5
+
+/* Protocol qualifiers. */
+
+#define Q_LINK 1
+#define Q_IP 2
+#define Q_ARP 3
+#define Q_RARP 4
+#define Q_TCP 5
+#define Q_UDP 6
+#define Q_ICMP 7
+#define Q_IGMP 8
+#define Q_IGRP 9
+
+
+#define Q_ATALK 10
+#define Q_DECNET 11
+#define Q_LAT 12
+#define Q_SCA 13
+#define Q_MOPRC 14
+#define Q_MOPDL 15
+
+/* Directional qualifiers. */
+
+#define Q_SRC 1
+#define Q_DST 2
+#define Q_OR 3
+#define Q_AND 4
+
+#define Q_DEFAULT 0
+#define Q_UNDEF 255
+
+struct stmt {
+ int code;
+ bpf_int32 k;
+};
+
+struct slist {
+ struct stmt s;
+ struct slist *next;
+};
+
+/*
+ * A bit vector to represent definition sets. We assume TOT_REGISTERS
+ * is smaller than 8*sizeof(atomset).
+ */
+typedef bpf_u_int32 atomset;
+#define ATOMMASK(n) (1 << (n))
+#define ATOMELEM(d, n) (d & ATOMMASK(n))
+
+/*
+ * An unbounded set.
+ */
+typedef bpf_u_int32 *uset;
+
+/*
+ * Total number of atomic entities, including accumulator (A) and index (X).
+ * We treat all these guys similarly during flow analysis.
+ */
+#define N_ATOMS (BPF_MEMWORDS+2)
+
+struct edge {
+ int id;
+ int code;
+ uset edom;
+ struct block *succ;
+ struct block *pred;
+ struct edge *next; /* link list of incoming edges for a node */
+};
+
+struct block {
+ int id;
+ struct slist *stmts; /* side effect stmts */
+ struct stmt s; /* branch stmt */
+ int mark;
+ int longjt; /* jt branch requires long jump */
+ int longjf; /* jf branch requires long jump */
+ int level;
+ int offset;
+ int sense;
+ struct edge et;
+ struct edge ef;
+ struct block *head;
+ struct block *link; /* link field used by optimizer */
+ uset dom;
+ uset closure;
+ struct edge *in_edges;
+ atomset def, kill;
+ atomset in_use;
+ atomset out_use;
+ int oval;
+ int val[N_ATOMS];
+};
+
+struct arth {
+ struct block *b; /* protocol checks */
+ struct slist *s; /* stmt list */
+ int regno; /* virtual register number of result */
+};
+
+struct qual {
+ unsigned char addr;
+ unsigned char proto;
+ unsigned char dir;
+ unsigned char pad;
+};
+
+struct arth *gen_loadi(int);
+struct arth *gen_load(int, struct arth *, int);
+struct arth *gen_loadlen(void);
+struct arth *gen_neg(struct arth *);
+struct arth *gen_arth(int, struct arth *, struct arth *);
+
+void gen_and(struct block *, struct block *);
+void gen_or(struct block *, struct block *);
+void gen_not(struct block *);
+
+struct block *gen_scode(const char *, struct qual);
+struct block *gen_ecode(const u_char *, struct qual);
+struct block *gen_mcode(const char *, const char *, int, struct qual);
+struct block *gen_ncode(const char *, bpf_u_int32, struct qual);
+struct block *gen_proto_abbrev(int);
+struct block *gen_relation(int, struct arth *, struct arth *, int);
+struct block *gen_less(int);
+struct block *gen_greater(int);
+struct block *gen_byteop(int, int, int);
+struct block *gen_broadcast(int);
+struct block *gen_multicast(int);
+struct block *gen_inbound(int);
+
+void bpf_optimize(struct block **);
+#if __STDC__
+__dead void bpf_error(const char *, ...)
+ __attribute__((volatile, format (printf, 1, 2)));
+#endif
+
+void finish_parse(struct block *);
+char *sdup(const char *);
+
+struct bpf_insn *icode_to_fcode(struct block *, int *);
+int pcap_parse(void);
+void lex_init(char *);
+void sappend(struct slist *, struct slist *);
+
+/* XXX */
+#define JT(b) ((b)->et.succ)
+#define JF(b) ((b)->ef.succ)
--- /dev/null
+lbl/gnuc.h
\ No newline at end of file
--- /dev/null
+/* A Bison parser, made by GNU Bison 2.3. */
+
+/* Skeleton implementation for Bison's Yacc-like parsers in C
+
+ Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
+ Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ Boston, MA 02110-1301, USA. */
+
+/* As a special exception, you may create a larger work that contains
+ part or all of the Bison parser skeleton and distribute that work
+ under terms of your choice, so long as that work isn't itself a
+ parser generator using the skeleton or a modified version thereof
+ as a parser skeleton. Alternatively, if you modify or redistribute
+ the parser skeleton itself, you may (at your option) remove this
+ special exception, which will cause the skeleton and the resulting
+ Bison output files to be licensed under the GNU General Public
+ License without this special exception.
+
+ This special exception was added by the Free Software Foundation in
+ version 2.2 of Bison. */
+
+/* C LALR(1) parser skeleton written by Richard Stallman, by
+ simplifying the original so-called "semantic" parser. */
+
+/* All symbols defined below should begin with yy or YY, to avoid
+ infringing on user name space. This should be done even for local
+ variables, as they might otherwise be expanded by user macros.
+ There are some unavoidable exceptions within include files to
+ define necessary library symbols; they are noted "INFRINGES ON
+ USER NAME SPACE" below. */
+
+/* Identify Bison output. */
+#define YYBISON 1
+
+/* Bison version. */
+#define YYBISON_VERSION "2.3"
+
+/* Skeleton name. */
+#define YYSKELETON_NAME "yacc.c"
+
+/* Pure parsers. */
+#define YYPURE 0
+
+/* Using locations. */
+#define YYLSP_NEEDED 0
+
+/* Substitute the variable and function names. */
+#define yyparse pcap_parse
+#define yylex pcap_lex
+#define yyerror pcap_error
+#define yylval pcap_lval
+#define yychar pcap_char
+#define yydebug pcap_debug
+#define yynerrs pcap_nerrs
+
+
+/* Tokens. */
+#ifndef YYTOKENTYPE
+# define YYTOKENTYPE
+ /* Put the tokens into the symbol table, so that GDB and other debuggers
+ know about them. */
+ enum yytokentype {
+ DST = 258,
+ SRC = 259,
+ HOST = 260,
+ GATEWAY = 261,
+ NET = 262,
+ MASK = 263,
+ PORT = 264,
+ LESS = 265,
+ GREATER = 266,
+ PROTO = 267,
+ BYTE = 268,
+ ARP = 269,
+ RARP = 270,
+ IP = 271,
+ TCP = 272,
+ UDP = 273,
+ ICMP = 274,
+ IGMP = 275,
+ IGRP = 276,
+ ATALK = 277,
+ DECNET = 278,
+ LAT = 279,
+ SCA = 280,
+ MOPRC = 281,
+ MOPDL = 282,
+ TK_BROADCAST = 283,
+ TK_MULTICAST = 284,
+ NUM = 285,
+ INBOUND = 286,
+ OUTBOUND = 287,
+ LINK = 288,
+ GEQ = 289,
+ LEQ = 290,
+ NEQ = 291,
+ ID = 292,
+ EID = 293,
+ HID = 294,
+ LSH = 295,
+ RSH = 296,
+ LEN = 297,
+ AND = 298,
+ OR = 299,
+ UMINUS = 300
+ };
+#endif
+/* Tokens. */
+#define DST 258
+#define SRC 259
+#define HOST 260
+#define GATEWAY 261
+#define NET 262
+#define MASK 263
+#define PORT 264
+#define LESS 265
+#define GREATER 266
+#define PROTO 267
+#define BYTE 268
+#define ARP 269
+#define RARP 270
+#define IP 271
+#define TCP 272
+#define UDP 273
+#define ICMP 274
+#define IGMP 275
+#define IGRP 276
+#define ATALK 277
+#define DECNET 278
+#define LAT 279
+#define SCA 280
+#define MOPRC 281
+#define MOPDL 282
+#define TK_BROADCAST 283
+#define TK_MULTICAST 284
+#define NUM 285
+#define INBOUND 286
+#define OUTBOUND 287
+#define LINK 288
+#define GEQ 289
+#define LEQ 290
+#define NEQ 291
+#define ID 292
+#define EID 293
+#define HID 294
+#define LSH 295
+#define RSH 296
+#define LEN 297
+#define AND 298
+#define OR 299
+#define UMINUS 300
+
+
+
+
+/* Copy the first part of user declarations. */
+#line 1 "grammar.y"
+
+/*
+ * Copyright (c) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ */
+#ifndef lint
+static const char rcsid[] =
+ "@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/grammar.y,v 1.1 1999/08/26 10:05:22 johana Exp $ (LBL)";
+#endif
+
+#include <sys/types.h>
+#include <sys/time.h>
+#include <sys/socket.h>
+
+#if __STDC__
+struct mbuf;
+struct rtentry;
+#endif
+
+#include <net/if.h>
+
+#include <netinet/in.h>
+#include <netinet/if_ether.h>
+
+#include <stdio.h>
+
+#include "pcap-int.h"
+
+#include "gencode.h"
+#include <pcap-namedb.h>
+
+#include "gnuc.h"
+#ifdef HAVE_OS_PROTO_H
+#include "os-proto.h"
+#endif
+
+#define QSET(q, p, d, a) (q).proto = (p),\
+ (q).dir = (d),\
+ (q).addr = (a)
+
+int n_errors = 0;
+
+static struct qual qerr = { Q_UNDEF, Q_UNDEF, Q_UNDEF, Q_UNDEF };
+
+static void
+yyerror(char *msg)
+{
+ ++n_errors;
+ bpf_error("%s", msg);
+ /* NOTREACHED */
+}
+
+#ifndef YYBISON
+int yyparse(void);
+
+int
+pcap_parse()
+{
+ return (yyparse());
+}
+#endif
+
+
+
+/* Enabling traces. */
+#ifndef YYDEBUG
+# define YYDEBUG 0
+#endif
+
+/* Enabling verbose error messages. */
+#ifdef YYERROR_VERBOSE
+# undef YYERROR_VERBOSE
+# define YYERROR_VERBOSE 1
+#else
+# define YYERROR_VERBOSE 0
+#endif
+
+/* Enabling the token table. */
+#ifndef YYTOKEN_TABLE
+# define YYTOKEN_TABLE 0
+#endif
+
+#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
+typedef union YYSTYPE
+#line 82 "grammar.y"
+{
+ int i;
+ bpf_u_int32 h;
+ u_char *e;
+ char *s;
+ struct stmt *stmt;
+ struct arth *a;
+ struct {
+ struct qual q;
+ struct block *b;
+ } blk;
+ struct block *rblk;
+}
+/* Line 187 of yacc.c. */
+#line 289 "y.tab.c"
+ YYSTYPE;
+# define yystype YYSTYPE /* obsolescent; will be withdrawn */
+# define YYSTYPE_IS_DECLARED 1
+# define YYSTYPE_IS_TRIVIAL 1
+#endif
+
+
+
+/* Copy the second part of user declarations. */
+
+
+/* Line 216 of yacc.c. */
+#line 302 "y.tab.c"
+
+#ifdef short
+# undef short
+#endif
+
+#ifdef YYTYPE_UINT8
+typedef YYTYPE_UINT8 yytype_uint8;
+#else
+typedef unsigned char yytype_uint8;
+#endif
+
+#ifdef YYTYPE_INT8
+typedef YYTYPE_INT8 yytype_int8;
+#elif (defined __STDC__ || defined __C99__FUNC__ \
+ || defined __cplusplus || defined _MSC_VER)
+typedef signed char yytype_int8;
+#else
+typedef short int yytype_int8;
+#endif
+
+#ifdef YYTYPE_UINT16
+typedef YYTYPE_UINT16 yytype_uint16;
+#else
+typedef unsigned short int yytype_uint16;
+#endif
+
+#ifdef YYTYPE_INT16
+typedef YYTYPE_INT16 yytype_int16;
+#else
+typedef short int yytype_int16;
+#endif
+
+#ifndef YYSIZE_T
+# ifdef __SIZE_TYPE__
+# define YYSIZE_T __SIZE_TYPE__
+# elif defined size_t
+# define YYSIZE_T size_t
+# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \
+ || defined __cplusplus || defined _MSC_VER)
+# include <stddef.h> /* INFRINGES ON USER NAME SPACE */
+# define YYSIZE_T size_t
+# else
+# define YYSIZE_T unsigned int
+# endif
+#endif
+
+#define YYSIZE_MAXIMUM ((YYSIZE_T) -1)
+
+#ifndef YY_
+# if YYENABLE_NLS
+# if ENABLE_NLS
+# include <libintl.h> /* INFRINGES ON USER NAME SPACE */
+# define YY_(msgid) dgettext ("bison-runtime", msgid)
+# endif
+# endif
+# ifndef YY_
+# define YY_(msgid) msgid
+# endif
+#endif
+
+/* Suppress unused-variable warnings by "using" E. */
+#if ! defined lint || defined __GNUC__
+# define YYUSE(e) ((void) (e))
+#else
+# define YYUSE(e) /* empty */
+#endif
+
+/* Identity function, used to suppress warnings about constant conditions. */
+#ifndef lint
+# define YYID(n) (n)
+#else
+#if (defined __STDC__ || defined __C99__FUNC__ \
+ || defined __cplusplus || defined _MSC_VER)
+static int
+YYID (int i)
+#else
+static int
+YYID (i)
+ int i;
+#endif
+{
+ return i;
+}
+#endif
+
+#if ! defined yyoverflow || YYERROR_VERBOSE
+
+/* The parser invokes alloca or malloc; define the necessary symbols. */
+
+# ifdef YYSTACK_USE_ALLOCA
+# if YYSTACK_USE_ALLOCA
+# ifdef __GNUC__
+# define YYSTACK_ALLOC __builtin_alloca
+# elif defined __BUILTIN_VA_ARG_INCR
+# include <alloca.h> /* INFRINGES ON USER NAME SPACE */
+# elif defined _AIX
+# define YYSTACK_ALLOC __alloca
+# elif defined _MSC_VER
+# include <malloc.h> /* INFRINGES ON USER NAME SPACE */
+# define alloca _alloca
+# else
+# define YYSTACK_ALLOC alloca
+# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
+ || defined __cplusplus || defined _MSC_VER)
+# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
+# ifndef _STDLIB_H
+# define _STDLIB_H 1
+# endif
+# endif
+# endif
+# endif
+# endif
+
+# ifdef YYSTACK_ALLOC
+ /* Pacify GCC's `empty if-body' warning. */
+# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0))
+# ifndef YYSTACK_ALLOC_MAXIMUM
+ /* The OS might guarantee only one guard page at the bottom of the stack,
+ and a page size can be as small as 4096 bytes. So we cannot safely
+ invoke alloca (N) if N exceeds 4096. Use a slightly smaller number
+ to allow for a few compiler-allocated temporary stack slots. */
+# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */
+# endif
+# else
+# define YYSTACK_ALLOC YYMALLOC
+# define YYSTACK_FREE YYFREE
+# ifndef YYSTACK_ALLOC_MAXIMUM
+# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM
+# endif
+# if (defined __cplusplus && ! defined _STDLIB_H \
+ && ! ((defined YYMALLOC || defined malloc) \
+ && (defined YYFREE || defined free)))
+# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
+# ifndef _STDLIB_H
+# define _STDLIB_H 1
+# endif
+# endif
+# ifndef YYMALLOC
+# define YYMALLOC malloc
+# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
+ || defined __cplusplus || defined _MSC_VER)
+void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */
+# endif
+# endif
+# ifndef YYFREE
+# define YYFREE free
+# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
+ || defined __cplusplus || defined _MSC_VER)
+void free (void *); /* INFRINGES ON USER NAME SPACE */
+# endif
+# endif
+# endif
+#endif /* ! defined yyoverflow || YYERROR_VERBOSE */
+
+
+#if (! defined yyoverflow \
+ && (! defined __cplusplus \
+ || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL)))
+
+/* A type that is properly aligned for any stack member. */
+union yyalloc
+{
+ yytype_int16 yyss;
+ YYSTYPE yyvs;
+ };
+
+/* The size of the maximum gap between one aligned stack and the next. */
+# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1)
+
+/* The size of an array large to enough to hold all stacks, each with
+ N elements. */
+# define YYSTACK_BYTES(N) \
+ ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \
+ + YYSTACK_GAP_MAXIMUM)
+
+/* Copy COUNT objects from FROM to TO. The source and destination do
+ not overlap. */
+# ifndef YYCOPY
+# if defined __GNUC__ && 1 < __GNUC__
+# define YYCOPY(To, From, Count) \
+ __builtin_memcpy (To, From, (Count) * sizeof (*(From)))
+# else
+# define YYCOPY(To, From, Count) \
+ do \
+ { \
+ YYSIZE_T yyi; \
+ for (yyi = 0; yyi < (Count); yyi++) \
+ (To)[yyi] = (From)[yyi]; \
+ } \
+ while (YYID (0))
+# endif
+# endif
+
+/* Relocate STACK from its old location to the new one. The
+ local variables YYSIZE and YYSTACKSIZE give the old and new number of
+ elements in the stack, and YYPTR gives the new location of the
+ stack. Advance YYPTR to a properly aligned location for the next
+ stack. */
+# define YYSTACK_RELOCATE(Stack) \
+ do \
+ { \
+ YYSIZE_T yynewbytes; \
+ YYCOPY (&yyptr->Stack, Stack, yysize); \
+ Stack = &yyptr->Stack; \
+ yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \
+ yyptr += yynewbytes / sizeof (*yyptr); \
+ } \
+ while (YYID (0))
+
+#endif
+
+/* YYFINAL -- State number of the termination state. */
+#define YYFINAL 3
+/* YYLAST -- Last index in YYTABLE. */
+#define YYLAST 345
+
+/* YYNTOKENS -- Number of terminals. */
+#define YYNTOKENS 61
+/* YYNNTS -- Number of nonterminals. */
+#define YYNNTS 27
+/* YYNRULES -- Number of rules. */
+#define YYNRULES 102
+/* YYNRULES -- Number of states. */
+#define YYNSTATES 151
+
+/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */
+#define YYUNDEFTOK 2
+#define YYMAXUTOK 300
+
+#define YYTRANSLATE(YYX) \
+ ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK)
+
+/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */
+static const yytype_uint8 yytranslate[] =
+{
+ 0, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 45, 2, 2, 2, 2, 47, 2,
+ 54, 53, 50, 48, 2, 49, 2, 51, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 60, 2,
+ 57, 56, 55, 2, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2, 58, 2, 59, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 46, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 2, 2, 1, 2, 3, 4,
+ 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
+ 15, 16, 17, 18, 19, 20, 21, 22, 23, 24,
+ 25, 26, 27, 28, 29, 30, 31, 32, 33, 34,
+ 35, 36, 37, 38, 39, 40, 41, 42, 43, 44,
+ 52
+};
+
+#if YYDEBUG
+/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in
+ YYRHS. */
+static const yytype_uint16 yyprhs[] =
+{
+ 0, 0, 3, 6, 8, 9, 11, 15, 19, 23,
+ 27, 29, 31, 33, 35, 39, 41, 45, 49, 51,
+ 53, 56, 58, 60, 62, 66, 70, 72, 74, 76,
+ 79, 83, 86, 89, 92, 95, 98, 102, 104, 108,
+ 112, 114, 116, 117, 119, 121, 125, 129, 133, 137,
+ 139, 141, 143, 145, 147, 149, 151, 153, 155, 157,
+ 159, 161, 163, 165, 167, 169, 171, 173, 175, 178,
+ 181, 184, 187, 192, 194, 196, 198, 200, 202, 204,
+ 206, 208, 210, 212, 217, 224, 228, 232, 236, 240,
+ 244, 248, 252, 256, 259, 263, 265, 267, 269, 271,
+ 273, 275, 277
+};
+
+/* YYRHS -- A `-1'-separated list of the rules' RHS. */
+static const yytype_int8 yyrhs[] =
+{
+ 62, 0, -1, 63, 64, -1, 63, -1, -1, 73,
+ -1, 64, 65, 73, -1, 64, 65, 67, -1, 64,
+ 66, 73, -1, 64, 66, 67, -1, 43, -1, 44,
+ -1, 68, -1, 87, -1, 70, 71, 53, -1, 37,
+ -1, 39, 51, 30, -1, 39, 8, 39, -1, 39,
+ -1, 38, -1, 69, 67, -1, 45, -1, 54, -1,
+ 68, -1, 72, 65, 67, -1, 72, 66, 67, -1,
+ 87, -1, 71, -1, 75, -1, 69, 73, -1, 76,
+ 77, 78, -1, 76, 77, -1, 76, 78, -1, 76,
+ 12, -1, 76, 79, -1, 74, 67, -1, 70, 64,
+ 53, -1, 80, -1, 84, 82, 84, -1, 84, 83,
+ 84, -1, 81, -1, 80, -1, -1, 4, -1, 3,
+ -1, 4, 44, 3, -1, 3, 44, 4, -1, 4,
+ 43, 3, -1, 3, 43, 4, -1, 5, -1, 7,
+ -1, 9, -1, 6, -1, 33, -1, 16, -1, 14,
+ -1, 15, -1, 17, -1, 18, -1, 19, -1, 20,
+ -1, 21, -1, 22, -1, 23, -1, 24, -1, 25,
+ -1, 27, -1, 26, -1, 76, 28, -1, 76, 29,
+ -1, 10, 30, -1, 11, 30, -1, 13, 30, 86,
+ 30, -1, 31, -1, 32, -1, 55, -1, 34, -1,
+ 56, -1, 35, -1, 57, -1, 36, -1, 87, -1,
+ 85, -1, 80, 58, 84, 59, -1, 80, 58, 84,
+ 60, 30, 59, -1, 84, 48, 84, -1, 84, 49,
+ 84, -1, 84, 50, 84, -1, 84, 51, 84, -1,
+ 84, 47, 84, -1, 84, 46, 84, -1, 84, 40,
+ 84, -1, 84, 41, 84, -1, 49, 84, -1, 70,
+ 85, 53, -1, 42, -1, 47, -1, 46, -1, 57,
+ -1, 55, -1, 56, -1, 30, -1, 70, 87, 53,
+ -1
+};
+
+/* YYRLINE[YYN] -- source line where rule number YYN was defined. */
+static const yytype_uint16 yyrline[] =
+{
+ 0, 130, 130, 134, 136, 138, 139, 140, 141, 142,
+ 144, 146, 148, 149, 151, 153, 154, 156, 158, 170,
+ 171, 173, 175, 177, 178, 179, 181, 183, 185, 186,
+ 188, 189, 190, 191, 192, 194, 195, 196, 197, 199,
+ 201, 204, 205, 208, 209, 210, 211, 212, 213, 216,
+ 217, 218, 221, 223, 224, 225, 226, 227, 228, 229,
+ 230, 231, 232, 233, 234, 235, 236, 237, 239, 240,
+ 241, 242, 243, 244, 245, 247, 248, 249, 251, 252,
+ 253, 255, 256, 258, 259, 260, 261, 262, 263, 264,
+ 265, 266, 267, 268, 269, 270, 272, 273, 274, 275,
+ 276, 278, 279
+};
+#endif
+
+#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE
+/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM.
+ First, the terminals, then, starting at YYNTOKENS, nonterminals. */
+static const char *const yytname[] =
+{
+ "$end", "error", "$undefined", "DST", "SRC", "HOST", "GATEWAY", "NET",
+ "MASK", "PORT", "LESS", "GREATER", "PROTO", "BYTE", "ARP", "RARP", "IP",
+ "TCP", "UDP", "ICMP", "IGMP", "IGRP", "ATALK", "DECNET", "LAT", "SCA",
+ "MOPRC", "MOPDL", "TK_BROADCAST", "TK_MULTICAST", "NUM", "INBOUND",
+ "OUTBOUND", "LINK", "GEQ", "LEQ", "NEQ", "ID", "EID", "HID", "LSH",
+ "RSH", "LEN", "AND", "OR", "'!'", "'|'", "'&'", "'+'", "'-'", "'*'",
+ "'/'", "UMINUS", "')'", "'('", "'>'", "'='", "'<'", "'['", "']'", "':'",
+ "$accept", "prog", "null", "expr", "and", "or", "id", "nid", "not",
+ "paren", "pid", "qid", "term", "head", "rterm", "pqual", "dqual",
+ "aqual", "ndaqual", "pname", "other", "relop", "irelop", "arth", "narth",
+ "byteop", "pnum", 0
+};
+#endif
+
+# ifdef YYPRINT
+/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to
+ token YYLEX-NUM. */
+static const yytype_uint16 yytoknum[] =
+{
+ 0, 256, 257, 258, 259, 260, 261, 262, 263, 264,
+ 265, 266, 267, 268, 269, 270, 271, 272, 273, 274,
+ 275, 276, 277, 278, 279, 280, 281, 282, 283, 284,
+ 285, 286, 287, 288, 289, 290, 291, 292, 293, 294,
+ 295, 296, 297, 298, 299, 33, 124, 38, 43, 45,
+ 42, 47, 300, 41, 40, 62, 61, 60, 91, 93,
+ 58
+};
+# endif
+
+/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */
+static const yytype_uint8 yyr1[] =
+{
+ 0, 61, 62, 62, 63, 64, 64, 64, 64, 64,
+ 65, 66, 67, 67, 67, 68, 68, 68, 68, 68,
+ 68, 69, 70, 71, 71, 71, 72, 72, 73, 73,
+ 74, 74, 74, 74, 74, 75, 75, 75, 75, 75,
+ 75, 76, 76, 77, 77, 77, 77, 77, 77, 78,
+ 78, 78, 79, 80, 80, 80, 80, 80, 80, 80,
+ 80, 80, 80, 80, 80, 80, 80, 80, 81, 81,
+ 81, 81, 81, 81, 81, 82, 82, 82, 83, 83,
+ 83, 84, 84, 85, 85, 85, 85, 85, 85, 85,
+ 85, 85, 85, 85, 85, 85, 86, 86, 86, 86,
+ 86, 87, 87
+};
+
+/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */
+static const yytype_uint8 yyr2[] =
+{
+ 0, 2, 2, 1, 0, 1, 3, 3, 3, 3,
+ 1, 1, 1, 1, 3, 1, 3, 3, 1, 1,
+ 2, 1, 1, 1, 3, 3, 1, 1, 1, 2,
+ 3, 2, 2, 2, 2, 2, 3, 1, 3, 3,
+ 1, 1, 0, 1, 1, 3, 3, 3, 3, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 2, 2,
+ 2, 2, 4, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 4, 6, 3, 3, 3, 3, 3,
+ 3, 3, 3, 2, 3, 1, 1, 1, 1, 1,
+ 1, 1, 3
+};
+
+/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state
+ STATE-NUM when YYTABLE doesn't specify something else to do. Zero
+ means the default is an error. */
+static const yytype_uint8 yydefact[] =
+{
+ 4, 0, 42, 1, 0, 0, 0, 55, 56, 54,
+ 57, 58, 59, 60, 61, 62, 63, 64, 65, 67,
+ 66, 101, 73, 74, 53, 95, 21, 0, 22, 2,
+ 42, 42, 5, 0, 28, 0, 41, 40, 0, 82,
+ 81, 70, 71, 0, 0, 0, 93, 10, 11, 42,
+ 42, 29, 0, 82, 81, 15, 19, 18, 35, 12,
+ 0, 0, 13, 44, 43, 49, 52, 50, 51, 33,
+ 68, 69, 31, 32, 34, 0, 76, 78, 80, 0,
+ 0, 0, 0, 0, 0, 0, 0, 75, 77, 79,
+ 0, 0, 97, 96, 99, 100, 98, 0, 0, 7,
+ 42, 42, 6, 81, 9, 8, 36, 94, 102, 0,
+ 0, 20, 23, 0, 27, 0, 26, 0, 0, 0,
+ 0, 30, 0, 91, 92, 90, 89, 85, 86, 87,
+ 88, 38, 39, 72, 81, 17, 16, 0, 14, 0,
+ 0, 48, 46, 47, 45, 83, 0, 24, 25, 0,
+ 84
+};
+
+/* YYDEFGOTO[NTERM-NUM]. */
+static const yytype_int8 yydefgoto[] =
+{
+ -1, 1, 2, 52, 49, 50, 111, 59, 60, 44,
+ 114, 115, 32, 33, 34, 35, 72, 73, 74, 45,
+ 37, 90, 91, 38, 39, 97, 40
+};
+
+/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing
+ STATE-NUM. */
+#define YYPACT_NINF -53
+static const yytype_int16 yypact[] =
+{
+ -53, 10, 129, -53, -25, -18, 0, -53, -53, -53,
+ -53, -53, -53, -53, -53, -53, -53, -53, -53, -53,
+ -53, -53, -53, -53, -53, -53, -53, 254, -53, -1,
+ 213, 213, -53, 50, -53, 285, 8, -53, 270, -53,
+ -53, -53, -53, 288, 254, -33, -53, -53, -53, 171,
+ 171, -53, -3, -26, -21, -53, -53, -5, -53, -53,
+ 50, 50, -53, 13, 53, -53, -53, -53, -53, -53,
+ -53, -53, 210, -53, -53, 254, -53, -53, -53, 254,
+ 254, 254, 254, 254, 254, 254, 254, -53, -53, -53,
+ 254, 254, -53, -53, -53, -53, -53, 9, 201, -53,
+ 171, 171, -53, 26, -53, -53, -53, -53, -53, 21,
+ 23, -53, -53, -17, -15, -1, -21, 58, 61, 64,
+ 69, -53, 117, 27, 27, 43, 282, -36, -36, -53,
+ -53, 201, 201, -53, 57, -53, -53, -21, -53, 50,
+ 50, -53, -53, -53, -53, -53, 52, -53, -53, 44,
+ -53
+};
+
+/* YYPGOTO[NTERM-NUM]. */
+static const yytype_int8 yypgoto[] =
+{
+ -53, -53, -53, 100, -8, 2, -31, -52, 5, -2,
+ -53, -53, -29, -53, -53, -53, -53, 46, -53, 14,
+ -53, -53, -53, 41, -20, -53, -27
+};
+
+/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If
+ positive, shift that token. If negative, reduce the rule which
+ number is the opposite. If zero, do what YYDEFACT says.
+ If YYTABLE_NINF, syntax error. */
+#define YYTABLE_NINF -38
+static const yytype_int16 yytable[] =
+{
+ 31, 51, 58, 109, 54, 41, 62, 30, -37, 112,
+ 3, 53, 42, 21, 85, 86, 36, 54, 99, 104,
+ 102, 105, 103, 103, 53, 75, -13, 107, 31, 31,
+ 43, 61, 108, 62, 116, 30, 30, 28, 138, 133,
+ 47, 48, 47, 48, 36, 36, 110, 101, 101, 112,
+ 106, -37, -37, 136, 100, 100, 117, 118, 61, 113,
+ 135, -37, 141, 36, 36, 142, 75, 143, 46, -13,
+ -13, 51, 144, 103, 134, 83, 84, 85, 86, -13,
+ 21, 53, 149, 79, 80, 98, 137, 55, 56, 57,
+ 82, 83, 84, 85, 86, 26, 119, 120, 101, 31,
+ -26, -26, 29, 150, 28, 100, 100, 139, 147, 148,
+ 108, 113, 62, 62, 36, 36, 122, 140, 121, 0,
+ 123, 124, 125, 126, 127, 128, 129, 130, 0, -3,
+ 0, 131, 132, 0, 0, 0, 0, 61, 61, 4,
+ 5, 0, 6, 7, 8, 9, 10, 11, 12, 13,
+ 14, 15, 16, 17, 18, 19, 20, 79, 80, 21,
+ 22, 23, 24, 81, 82, 83, 84, 85, 86, 0,
+ 0, 25, 0, 0, 26, 0, 145, 146, 27, 0,
+ 0, 4, 5, 28, 6, 7, 8, 9, 10, 11,
+ 12, 13, 14, 15, 16, 17, 18, 19, 20, 0,
+ 0, 21, 22, 23, 24, 0, 0, 0, 55, 56,
+ 57, 0, 0, 25, 0, 65, 26, 67, 0, 68,
+ 27, 0, 0, 4, 5, 28, 6, 7, 8, 9,
+ 10, 11, 12, 13, 14, 15, 16, 17, 18, 19,
+ 20, 79, 80, 21, 22, 23, 24, 81, 82, 83,
+ 84, 85, 86, 0, 0, 25, 0, 0, 26, 0,
+ 0, 0, 27, 0, 0, 0, 0, 28, 7, 8,
+ 9, 10, 11, 12, 13, 14, 15, 16, 17, 18,
+ 19, 20, 0, 0, 21, 0, 0, 24, 63, 64,
+ 65, 66, 67, 0, 68, 0, 25, 69, 0, 0,
+ 0, 0, 0, 27, 76, 77, 78, 0, 28, 0,
+ 79, 80, 0, 70, 71, 0, 81, 82, 83, 84,
+ 85, 86, 79, 80, 0, 87, 88, 89, 0, 0,
+ 83, 84, 85, 86, 92, 93, 0, 0, 0, 0,
+ 0, 0, 0, 94, 95, 96
+};
+
+static const yytype_int16 yycheck[] =
+{
+ 2, 30, 33, 8, 31, 30, 33, 2, 0, 61,
+ 0, 31, 30, 30, 50, 51, 2, 44, 49, 50,
+ 49, 50, 49, 50, 44, 58, 0, 53, 30, 31,
+ 30, 33, 53, 60, 61, 30, 31, 54, 53, 30,
+ 43, 44, 43, 44, 30, 31, 51, 49, 50, 101,
+ 53, 43, 44, 30, 49, 50, 43, 44, 60, 61,
+ 39, 53, 4, 49, 50, 4, 58, 3, 27, 43,
+ 44, 100, 3, 100, 101, 48, 49, 50, 51, 53,
+ 30, 101, 30, 40, 41, 44, 113, 37, 38, 39,
+ 47, 48, 49, 50, 51, 45, 43, 44, 100, 101,
+ 43, 44, 2, 59, 54, 100, 101, 115, 139, 140,
+ 53, 113, 139, 140, 100, 101, 75, 115, 72, -1,
+ 79, 80, 81, 82, 83, 84, 85, 86, -1, 0,
+ -1, 90, 91, -1, -1, -1, -1, 139, 140, 10,
+ 11, -1, 13, 14, 15, 16, 17, 18, 19, 20,
+ 21, 22, 23, 24, 25, 26, 27, 40, 41, 30,
+ 31, 32, 33, 46, 47, 48, 49, 50, 51, -1,
+ -1, 42, -1, -1, 45, -1, 59, 60, 49, -1,
+ -1, 10, 11, 54, 13, 14, 15, 16, 17, 18,
+ 19, 20, 21, 22, 23, 24, 25, 26, 27, -1,
+ -1, 30, 31, 32, 33, -1, -1, -1, 37, 38,
+ 39, -1, -1, 42, -1, 5, 45, 7, -1, 9,
+ 49, -1, -1, 10, 11, 54, 13, 14, 15, 16,
+ 17, 18, 19, 20, 21, 22, 23, 24, 25, 26,
+ 27, 40, 41, 30, 31, 32, 33, 46, 47, 48,
+ 49, 50, 51, -1, -1, 42, -1, -1, 45, -1,
+ -1, -1, 49, -1, -1, -1, -1, 54, 14, 15,
+ 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
+ 26, 27, -1, -1, 30, -1, -1, 33, 3, 4,
+ 5, 6, 7, -1, 9, -1, 42, 12, -1, -1,
+ -1, -1, -1, 49, 34, 35, 36, -1, 54, -1,
+ 40, 41, -1, 28, 29, -1, 46, 47, 48, 49,
+ 50, 51, 40, 41, -1, 55, 56, 57, -1, -1,
+ 48, 49, 50, 51, 46, 47, -1, -1, -1, -1,
+ -1, -1, -1, 55, 56, 57
+};
+
+/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing
+ symbol of state STATE-NUM. */
+static const yytype_uint8 yystos[] =
+{
+ 0, 62, 63, 0, 10, 11, 13, 14, 15, 16,
+ 17, 18, 19, 20, 21, 22, 23, 24, 25, 26,
+ 27, 30, 31, 32, 33, 42, 45, 49, 54, 64,
+ 69, 70, 73, 74, 75, 76, 80, 81, 84, 85,
+ 87, 30, 30, 30, 70, 80, 84, 43, 44, 65,
+ 66, 73, 64, 85, 87, 37, 38, 39, 67, 68,
+ 69, 70, 87, 3, 4, 5, 6, 7, 9, 12,
+ 28, 29, 77, 78, 79, 58, 34, 35, 36, 40,
+ 41, 46, 47, 48, 49, 50, 51, 55, 56, 57,
+ 82, 83, 46, 47, 55, 56, 57, 86, 84, 67,
+ 69, 70, 73, 87, 67, 73, 53, 53, 53, 8,
+ 51, 67, 68, 70, 71, 72, 87, 43, 44, 43,
+ 44, 78, 84, 84, 84, 84, 84, 84, 84, 84,
+ 84, 84, 84, 30, 87, 39, 30, 87, 53, 65,
+ 66, 4, 4, 3, 3, 59, 60, 67, 67, 30,
+ 59
+};
+
+#define yyerrok (yyerrstatus = 0)
+#define yyclearin (yychar = YYEMPTY)
+#define YYEMPTY (-2)
+#define YYEOF 0
+
+#define YYACCEPT goto yyacceptlab
+#define YYABORT goto yyabortlab
+#define YYERROR goto yyerrorlab
+
+
+/* Like YYERROR except do call yyerror. This remains here temporarily
+ to ease the transition to the new meaning of YYERROR, for GCC.
+ Once GCC version 2 has supplanted version 1, this can go. */
+
+#define YYFAIL goto yyerrlab
+
+#define YYRECOVERING() (!!yyerrstatus)
+
+#define YYBACKUP(Token, Value) \
+do \
+ if (yychar == YYEMPTY && yylen == 1) \
+ { \
+ yychar = (Token); \
+ yylval = (Value); \
+ yytoken = YYTRANSLATE (yychar); \
+ YYPOPSTACK (1); \
+ goto yybackup; \
+ } \
+ else \
+ { \
+ yyerror (YY_("syntax error: cannot back up")); \
+ YYERROR; \
+ } \
+while (YYID (0))
+
+
+#define YYTERROR 1
+#define YYERRCODE 256
+
+
+/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N].
+ If N is 0, then set CURRENT to the empty location which ends
+ the previous symbol: RHS[0] (always defined). */
+
+#define YYRHSLOC(Rhs, K) ((Rhs)[K])
+#ifndef YYLLOC_DEFAULT
+# define YYLLOC_DEFAULT(Current, Rhs, N) \
+ do \
+ if (YYID (N)) \
+ { \
+ (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \
+ (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \
+ (Current).last_line = YYRHSLOC (Rhs, N).last_line; \
+ (Current).last_column = YYRHSLOC (Rhs, N).last_column; \
+ } \
+ else \
+ { \
+ (Current).first_line = (Current).last_line = \
+ YYRHSLOC (Rhs, 0).last_line; \
+ (Current).first_column = (Current).last_column = \
+ YYRHSLOC (Rhs, 0).last_column; \
+ } \
+ while (YYID (0))
+#endif
+
+
+/* YY_LOCATION_PRINT -- Print the location on the stream.
+ This macro was not mandated originally: define only if we know
+ we won't break user code: when these are the locations we know. */
+
+#ifndef YY_LOCATION_PRINT
+# if YYLTYPE_IS_TRIVIAL
+# define YY_LOCATION_PRINT(File, Loc) \
+ fprintf (File, "%d.%d-%d.%d", \
+ (Loc).first_line, (Loc).first_column, \
+ (Loc).last_line, (Loc).last_column)
+# else
+# define YY_LOCATION_PRINT(File, Loc) ((void) 0)
+# endif
+#endif
+
+
+/* YYLEX -- calling `yylex' with the right arguments. */
+
+#ifdef YYLEX_PARAM
+# define YYLEX yylex (YYLEX_PARAM)
+#else
+# define YYLEX yylex ()
+#endif
+
+/* Enable debugging if requested. */
+#if YYDEBUG
+
+# ifndef YYFPRINTF
+# include <stdio.h> /* INFRINGES ON USER NAME SPACE */
+# define YYFPRINTF fprintf
+# endif
+
+# define YYDPRINTF(Args) \
+do { \
+ if (yydebug) \
+ YYFPRINTF Args; \
+} while (YYID (0))
+
+# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \
+do { \
+ if (yydebug) \
+ { \
+ YYFPRINTF (stderr, "%s ", Title); \
+ yy_symbol_print (stderr, \
+ Type, Value); \
+ YYFPRINTF (stderr, "\n"); \
+ } \
+} while (YYID (0))
+
+
+/*--------------------------------.
+| Print this symbol on YYOUTPUT. |
+`--------------------------------*/
+
+/*ARGSUSED*/
+#if (defined __STDC__ || defined __C99__FUNC__ \
+ || defined __cplusplus || defined _MSC_VER)
+static void
+yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
+#else
+static void
+yy_symbol_value_print (yyoutput, yytype, yyvaluep)
+ FILE *yyoutput;
+ int yytype;
+ YYSTYPE const * const yyvaluep;
+#endif
+{
+ if (!yyvaluep)
+ return;
+# ifdef YYPRINT
+ if (yytype < YYNTOKENS)
+ YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep);
+# else
+ YYUSE (yyoutput);
+# endif
+ switch (yytype)
+ {
+ default:
+ break;
+ }
+}
+
+
+/*--------------------------------.
+| Print this symbol on YYOUTPUT. |
+`--------------------------------*/
+
+#if (defined __STDC__ || defined __C99__FUNC__ \
+ || defined __cplusplus || defined _MSC_VER)
+static void
+yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep)
+#else
+static void
+yy_symbol_print (yyoutput, yytype, yyvaluep)
+ FILE *yyoutput;
+ int yytype;
+ YYSTYPE const * const yyvaluep;
+#endif
+{
+ if (yytype < YYNTOKENS)
+ YYFPRINTF (yyoutput, "token %s (", yytname[yytype]);
+ else
+ YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]);
+
+ yy_symbol_value_print (yyoutput, yytype, yyvaluep);
+ YYFPRINTF (yyoutput, ")");
+}
+
+/*------------------------------------------------------------------.
+| yy_stack_print -- Print the state stack from its BOTTOM up to its |
+| TOP (included). |
+`------------------------------------------------------------------*/
+
+#if (defined __STDC__ || defined __C99__FUNC__ \
+ || defined __cplusplus || defined _MSC_VER)
+static void
+yy_stack_print (yytype_int16 *bottom, yytype_int16 *top)
+#else
+static void
+yy_stack_print (bottom, top)
+ yytype_int16 *bottom;
+ yytype_int16 *top;
+#endif
+{
+ YYFPRINTF (stderr, "Stack now");
+ for (; bottom <= top; ++bottom)
+ YYFPRINTF (stderr, " %d", *bottom);
+ YYFPRINTF (stderr, "\n");
+}
+
+# define YY_STACK_PRINT(Bottom, Top) \
+do { \
+ if (yydebug) \
+ yy_stack_print ((Bottom), (Top)); \
+} while (YYID (0))
+
+
+/*------------------------------------------------.
+| Report that the YYRULE is going to be reduced. |
+`------------------------------------------------*/
+
+#if (defined __STDC__ || defined __C99__FUNC__ \
+ || defined __cplusplus || defined _MSC_VER)
+static void
+yy_reduce_print (YYSTYPE *yyvsp, int yyrule)
+#else
+static void
+yy_reduce_print (yyvsp, yyrule)
+ YYSTYPE *yyvsp;
+ int yyrule;
+#endif
+{
+ int yynrhs = yyr2[yyrule];
+ int yyi;
+ unsigned long int yylno = yyrline[yyrule];
+ YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n",
+ yyrule - 1, yylno);
+ /* The symbols being reduced. */
+ for (yyi = 0; yyi < yynrhs; yyi++)
+ {
+ fprintf (stderr, " $%d = ", yyi + 1);
+ yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi],
+ &(yyvsp[(yyi + 1) - (yynrhs)])
+ );
+ fprintf (stderr, "\n");
+ }
+}
+
+# define YY_REDUCE_PRINT(Rule) \
+do { \
+ if (yydebug) \
+ yy_reduce_print (yyvsp, Rule); \
+} while (YYID (0))
+
+/* Nonzero means print parse trace. It is left uninitialized so that
+ multiple parsers can coexist. */
+int yydebug;
+#else /* !YYDEBUG */
+# define YYDPRINTF(Args)
+# define YY_SYMBOL_PRINT(Title, Type, Value, Location)
+# define YY_STACK_PRINT(Bottom, Top)
+# define YY_REDUCE_PRINT(Rule)
+#endif /* !YYDEBUG */
+
+
+/* YYINITDEPTH -- initial size of the parser's stacks. */
+#ifndef YYINITDEPTH
+# define YYINITDEPTH 200
+#endif
+
+/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only
+ if the built-in stack extension method is used).
+
+ Do not make this value too large; the results are undefined if
+ YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH)
+ evaluated with infinite-precision integer arithmetic. */
+
+#ifndef YYMAXDEPTH
+# define YYMAXDEPTH 10000
+#endif
+
+\f
+
+#if YYERROR_VERBOSE
+
+# ifndef yystrlen
+# if defined __GLIBC__ && defined _STRING_H
+# define yystrlen strlen
+# else
+/* Return the length of YYSTR. */
+#if (defined __STDC__ || defined __C99__FUNC__ \
+ || defined __cplusplus || defined _MSC_VER)
+static YYSIZE_T
+yystrlen (const char *yystr)
+#else
+static YYSIZE_T
+yystrlen (yystr)
+ const char *yystr;
+#endif
+{
+ YYSIZE_T yylen;
+ for (yylen = 0; yystr[yylen]; yylen++)
+ continue;
+ return yylen;
+}
+# endif
+# endif
+
+# ifndef yystpcpy
+# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE
+# define yystpcpy stpcpy
+# else
+/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in
+ YYDEST. */
+#if (defined __STDC__ || defined __C99__FUNC__ \
+ || defined __cplusplus || defined _MSC_VER)
+static char *
+yystpcpy (char *yydest, const char *yysrc)
+#else
+static char *
+yystpcpy (yydest, yysrc)
+ char *yydest;
+ const char *yysrc;
+#endif
+{
+ char *yyd = yydest;
+ const char *yys = yysrc;
+
+ while ((*yyd++ = *yys++) != '\0')
+ continue;
+
+ return yyd - 1;
+}
+# endif
+# endif
+
+# ifndef yytnamerr
+/* Copy to YYRES the contents of YYSTR after stripping away unnecessary
+ quotes and backslashes, so that it's suitable for yyerror. The
+ heuristic is that double-quoting is unnecessary unless the string
+ contains an apostrophe, a comma, or backslash (other than
+ backslash-backslash). YYSTR is taken from yytname. If YYRES is
+ null, do not copy; instead, return the length of what the result
+ would have been. */
+static YYSIZE_T
+yytnamerr (char *yyres, const char *yystr)
+{
+ if (*yystr == '"')
+ {
+ YYSIZE_T yyn = 0;
+ char const *yyp = yystr;
+
+ for (;;)
+ switch (*++yyp)
+ {
+ case '\'':
+ case ',':
+ goto do_not_strip_quotes;
+
+ case '\\':
+ if (*++yyp != '\\')
+ goto do_not_strip_quotes;
+ /* Fall through. */
+ default:
+ if (yyres)
+ yyres[yyn] = *yyp;
+ yyn++;
+ break;
+
+ case '"':
+ if (yyres)
+ yyres[yyn] = '\0';
+ return yyn;
+ }
+ do_not_strip_quotes: ;
+ }
+
+ if (! yyres)
+ return yystrlen (yystr);
+
+ return yystpcpy (yyres, yystr) - yyres;
+}
+# endif
+
+/* Copy into YYRESULT an error message about the unexpected token
+ YYCHAR while in state YYSTATE. Return the number of bytes copied,
+ including the terminating null byte. If YYRESULT is null, do not
+ copy anything; just return the number of bytes that would be
+ copied. As a special case, return 0 if an ordinary "syntax error"
+ message will do. Return YYSIZE_MAXIMUM if overflow occurs during
+ size calculation. */
+static YYSIZE_T
+yysyntax_error (char *yyresult, int yystate, int yychar)
+{
+ int yyn = yypact[yystate];
+
+ if (! (YYPACT_NINF < yyn && yyn <= YYLAST))
+ return 0;
+ else
+ {
+ int yytype = YYTRANSLATE (yychar);
+ YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]);
+ YYSIZE_T yysize = yysize0;
+ YYSIZE_T yysize1;
+ int yysize_overflow = 0;
+ enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 };
+ char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM];
+ int yyx;
+
+# if 0
+ /* This is so xgettext sees the translatable formats that are
+ constructed on the fly. */
+ YY_("syntax error, unexpected %s");
+ YY_("syntax error, unexpected %s, expecting %s");
+ YY_("syntax error, unexpected %s, expecting %s or %s");
+ YY_("syntax error, unexpected %s, expecting %s or %s or %s");
+ YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s");
+# endif
+ char *yyfmt;
+ char const *yyf;
+ static char const yyunexpected[] = "syntax error, unexpected %s";
+ static char const yyexpecting[] = ", expecting %s";
+ static char const yyor[] = " or %s";
+ char yyformat[sizeof yyunexpected
+ + sizeof yyexpecting - 1
+ + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2)
+ * (sizeof yyor - 1))];
+ char const *yyprefix = yyexpecting;
+
+ /* Start YYX at -YYN if negative to avoid negative indexes in
+ YYCHECK. */
+ int yyxbegin = yyn < 0 ? -yyn : 0;
+
+ /* Stay within bounds of both yycheck and yytname. */
+ int yychecklim = YYLAST - yyn + 1;
+ int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS;
+ int yycount = 1;
+
+ yyarg[0] = yytname[yytype];
+ yyfmt = yystpcpy (yyformat, yyunexpected);
+
+ for (yyx = yyxbegin; yyx < yyxend; ++yyx)
+ if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR)
+ {
+ if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM)
+ {
+ yycount = 1;
+ yysize = yysize0;
+ yyformat[sizeof yyunexpected - 1] = '\0';
+ break;
+ }
+ yyarg[yycount++] = yytname[yyx];
+ yysize1 = yysize + yytnamerr (0, yytname[yyx]);
+ yysize_overflow |= (yysize1 < yysize);
+ yysize = yysize1;
+ yyfmt = yystpcpy (yyfmt, yyprefix);
+ yyprefix = yyor;
+ }
+
+ yyf = YY_(yyformat);
+ yysize1 = yysize + yystrlen (yyf);
+ yysize_overflow |= (yysize1 < yysize);
+ yysize = yysize1;
+
+ if (yysize_overflow)
+ return YYSIZE_MAXIMUM;
+
+ if (yyresult)
+ {
+ /* Avoid sprintf, as that infringes on the user's name space.
+ Don't have undefined behavior even if the translation
+ produced a string with the wrong number of "%s"s. */
+ char *yyp = yyresult;
+ int yyi = 0;
+ while ((*yyp = *yyf) != '\0')
+ {
+ if (*yyp == '%' && yyf[1] == 's' && yyi < yycount)
+ {
+ yyp += yytnamerr (yyp, yyarg[yyi++]);
+ yyf += 2;
+ }
+ else
+ {
+ yyp++;
+ yyf++;
+ }
+ }
+ }
+ return yysize;
+ }
+}
+#endif /* YYERROR_VERBOSE */
+\f
+
+/*-----------------------------------------------.
+| Release the memory associated to this symbol. |
+`-----------------------------------------------*/
+
+/*ARGSUSED*/
+#if (defined __STDC__ || defined __C99__FUNC__ \
+ || defined __cplusplus || defined _MSC_VER)
+static void
+yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep)
+#else
+static void
+yydestruct (yymsg, yytype, yyvaluep)
+ const char *yymsg;
+ int yytype;
+ YYSTYPE *yyvaluep;
+#endif
+{
+ YYUSE (yyvaluep);
+
+ if (!yymsg)
+ yymsg = "Deleting";
+ YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp);
+
+ switch (yytype)
+ {
+
+ default:
+ break;
+ }
+}
+\f
+
+/* Prevent warnings from -Wmissing-prototypes. */
+
+#ifdef YYPARSE_PARAM
+#if defined __STDC__ || defined __cplusplus
+int yyparse (void *YYPARSE_PARAM);
+#else
+int yyparse ();
+#endif
+#else /* ! YYPARSE_PARAM */
+#if defined __STDC__ || defined __cplusplus
+int yyparse (void);
+#else
+int yyparse ();
+#endif
+#endif /* ! YYPARSE_PARAM */
+
+
+
+/* The look-ahead symbol. */
+int yychar;
+
+/* The semantic value of the look-ahead symbol. */
+YYSTYPE yylval;
+
+/* Number of syntax errors so far. */
+int yynerrs;
+
+
+
+/*----------.
+| yyparse. |
+`----------*/
+
+#ifdef YYPARSE_PARAM
+#if (defined __STDC__ || defined __C99__FUNC__ \
+ || defined __cplusplus || defined _MSC_VER)
+int
+yyparse (void *YYPARSE_PARAM)
+#else
+int
+yyparse (YYPARSE_PARAM)
+ void *YYPARSE_PARAM;
+#endif
+#else /* ! YYPARSE_PARAM */
+#if (defined __STDC__ || defined __C99__FUNC__ \
+ || defined __cplusplus || defined _MSC_VER)
+int
+yyparse (void)
+#else
+int
+yyparse ()
+
+#endif
+#endif
+{
+
+ int yystate;
+ int yyn;
+ int yyresult;
+ /* Number of tokens to shift before error messages enabled. */
+ int yyerrstatus;
+ /* Look-ahead token as an internal (translated) token number. */
+ int yytoken = 0;
+#if YYERROR_VERBOSE
+ /* Buffer for error messages, and its allocated size. */
+ char yymsgbuf[128];
+ char *yymsg = yymsgbuf;
+ YYSIZE_T yymsg_alloc = sizeof yymsgbuf;
+#endif
+
+ /* Three stacks and their tools:
+ `yyss': related to states,
+ `yyvs': related to semantic values,
+ `yyls': related to locations.
+
+ Refer to the stacks thru separate pointers, to allow yyoverflow
+ to reallocate them elsewhere. */
+
+ /* The state stack. */
+ yytype_int16 yyssa[YYINITDEPTH];
+ yytype_int16 *yyss = yyssa;
+ yytype_int16 *yyssp;
+
+ /* The semantic value stack. */
+ YYSTYPE yyvsa[YYINITDEPTH];
+ YYSTYPE *yyvs = yyvsa;
+ YYSTYPE *yyvsp;
+
+
+
+#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N))
+
+ YYSIZE_T yystacksize = YYINITDEPTH;
+
+ /* The variables used to return semantic value and location from the
+ action routines. */
+ YYSTYPE yyval;
+
+
+ /* The number of symbols on the RHS of the reduced rule.
+ Keep to zero when no symbol should be popped. */
+ int yylen = 0;
+
+ YYDPRINTF ((stderr, "Starting parse\n"));
+
+ yystate = 0;
+ yyerrstatus = 0;
+ yynerrs = 0;
+ yychar = YYEMPTY; /* Cause a token to be read. */
+
+ /* Initialize stack pointers.
+ Waste one element of value and location stack
+ so that they stay on the same level as the state stack.
+ The wasted elements are never initialized. */
+
+ yyssp = yyss;
+ yyvsp = yyvs;
+
+ goto yysetstate;
+
+/*------------------------------------------------------------.
+| yynewstate -- Push a new state, which is found in yystate. |
+`------------------------------------------------------------*/
+ yynewstate:
+ /* In all cases, when you get here, the value and location stacks
+ have just been pushed. So pushing a state here evens the stacks. */
+ yyssp++;
+
+ yysetstate:
+ *yyssp = yystate;
+
+ if (yyss + yystacksize - 1 <= yyssp)
+ {
+ /* Get the current used size of the three stacks, in elements. */
+ YYSIZE_T yysize = yyssp - yyss + 1;
+
+#ifdef yyoverflow
+ {
+ /* Give user a chance to reallocate the stack. Use copies of
+ these so that the &'s don't force the real ones into
+ memory. */
+ YYSTYPE *yyvs1 = yyvs;
+ yytype_int16 *yyss1 = yyss;
+
+
+ /* Each stack pointer address is followed by the size of the
+ data in use in that stack, in bytes. This used to be a
+ conditional around just the two extra args, but that might
+ be undefined if yyoverflow is a macro. */
+ yyoverflow (YY_("memory exhausted"),
+ &yyss1, yysize * sizeof (*yyssp),
+ &yyvs1, yysize * sizeof (*yyvsp),
+
+ &yystacksize);
+
+ yyss = yyss1;
+ yyvs = yyvs1;
+ }
+#else /* no yyoverflow */
+# ifndef YYSTACK_RELOCATE
+ goto yyexhaustedlab;
+# else
+ /* Extend the stack our own way. */
+ if (YYMAXDEPTH <= yystacksize)
+ goto yyexhaustedlab;
+ yystacksize *= 2;
+ if (YYMAXDEPTH < yystacksize)
+ yystacksize = YYMAXDEPTH;
+
+ {
+ yytype_int16 *yyss1 = yyss;
+ union yyalloc *yyptr =
+ (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize));
+ if (! yyptr)
+ goto yyexhaustedlab;
+ YYSTACK_RELOCATE (yyss);
+ YYSTACK_RELOCATE (yyvs);
+
+# undef YYSTACK_RELOCATE
+ if (yyss1 != yyssa)
+ YYSTACK_FREE (yyss1);
+ }
+# endif
+#endif /* no yyoverflow */
+
+ yyssp = yyss + yysize - 1;
+ yyvsp = yyvs + yysize - 1;
+
+
+ YYDPRINTF ((stderr, "Stack size increased to %lu\n",
+ (unsigned long int) yystacksize));
+
+ if (yyss + yystacksize - 1 <= yyssp)
+ YYABORT;
+ }
+
+ YYDPRINTF ((stderr, "Entering state %d\n", yystate));
+
+ goto yybackup;
+
+/*-----------.
+| yybackup. |
+`-----------*/
+yybackup:
+
+ /* Do appropriate processing given the current state. Read a
+ look-ahead token if we need one and don't already have one. */
+
+ /* First try to decide what to do without reference to look-ahead token. */
+ yyn = yypact[yystate];
+ if (yyn == YYPACT_NINF)
+ goto yydefault;
+
+ /* Not known => get a look-ahead token if don't already have one. */
+
+ /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */
+ if (yychar == YYEMPTY)
+ {
+ YYDPRINTF ((stderr, "Reading a token: "));
+ yychar = YYLEX;
+ }
+
+ if (yychar <= YYEOF)
+ {
+ yychar = yytoken = YYEOF;
+ YYDPRINTF ((stderr, "Now at end of input.\n"));
+ }
+ else
+ {
+ yytoken = YYTRANSLATE (yychar);
+ YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc);
+ }
+
+ /* If the proper action on seeing token YYTOKEN is to reduce or to
+ detect an error, take that action. */
+ yyn += yytoken;
+ if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken)
+ goto yydefault;
+ yyn = yytable[yyn];
+ if (yyn <= 0)
+ {
+ if (yyn == 0 || yyn == YYTABLE_NINF)
+ goto yyerrlab;
+ yyn = -yyn;
+ goto yyreduce;
+ }
+
+ if (yyn == YYFINAL)
+ YYACCEPT;
+
+ /* Count tokens shifted since error; after three, turn off error
+ status. */
+ if (yyerrstatus)
+ yyerrstatus--;
+
+ /* Shift the look-ahead token. */
+ YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc);
+
+ /* Discard the shifted token unless it is eof. */
+ if (yychar != YYEOF)
+ yychar = YYEMPTY;
+
+ yystate = yyn;
+ *++yyvsp = yylval;
+
+ goto yynewstate;
+
+
+/*-----------------------------------------------------------.
+| yydefault -- do the default action for the current state. |
+`-----------------------------------------------------------*/
+yydefault:
+ yyn = yydefact[yystate];
+ if (yyn == 0)
+ goto yyerrlab;
+ goto yyreduce;
+
+
+/*-----------------------------.
+| yyreduce -- Do a reduction. |
+`-----------------------------*/
+yyreduce:
+ /* yyn is the number of a rule to reduce with. */
+ yylen = yyr2[yyn];
+
+ /* If YYLEN is nonzero, implement the default value of the action:
+ `$$ = $1'.
+
+ Otherwise, the following line sets YYVAL to garbage.
+ This behavior is undocumented and Bison
+ users should not rely upon it. Assigning to YYVAL
+ unconditionally makes the parser a bit smaller, and it avoids a
+ GCC warning that YYVAL may be used uninitialized. */
+ yyval = yyvsp[1-yylen];
+
+
+ YY_REDUCE_PRINT (yyn);
+ switch (yyn)
+ {
+ case 2:
+#line 131 "grammar.y"
+ {
+ finish_parse((yyvsp[(2) - (2)].blk).b);
+}
+ break;
+
+ case 4:
+#line 136 "grammar.y"
+ { (yyval.blk).q = qerr; }
+ break;
+
+ case 6:
+#line 139 "grammar.y"
+ { gen_and((yyvsp[(1) - (3)].blk).b, (yyvsp[(3) - (3)].blk).b); (yyval.blk) = (yyvsp[(3) - (3)].blk); }
+ break;
+
+ case 7:
+#line 140 "grammar.y"
+ { gen_and((yyvsp[(1) - (3)].blk).b, (yyvsp[(3) - (3)].blk).b); (yyval.blk) = (yyvsp[(3) - (3)].blk); }
+ break;
+
+ case 8:
+#line 141 "grammar.y"
+ { gen_or((yyvsp[(1) - (3)].blk).b, (yyvsp[(3) - (3)].blk).b); (yyval.blk) = (yyvsp[(3) - (3)].blk); }
+ break;
+
+ case 9:
+#line 142 "grammar.y"
+ { gen_or((yyvsp[(1) - (3)].blk).b, (yyvsp[(3) - (3)].blk).b); (yyval.blk) = (yyvsp[(3) - (3)].blk); }
+ break;
+
+ case 10:
+#line 144 "grammar.y"
+ { (yyval.blk) = (yyvsp[(0) - (1)].blk); }
+ break;
+
+ case 11:
+#line 146 "grammar.y"
+ { (yyval.blk) = (yyvsp[(0) - (1)].blk); }
+ break;
+
+ case 13:
+#line 149 "grammar.y"
+ { (yyval.blk).b = gen_ncode(NULL, (bpf_u_int32)(yyvsp[(1) - (1)].i),
+ (yyval.blk).q = (yyvsp[(0) - (1)].blk).q); }
+ break;
+
+ case 14:
+#line 151 "grammar.y"
+ { (yyval.blk) = (yyvsp[(2) - (3)].blk); }
+ break;
+
+ case 15:
+#line 153 "grammar.y"
+ { (yyval.blk).b = gen_scode((yyvsp[(1) - (1)].s), (yyval.blk).q = (yyvsp[(0) - (1)].blk).q); }
+ break;
+
+ case 16:
+#line 154 "grammar.y"
+ { (yyval.blk).b = gen_mcode((yyvsp[(1) - (3)].s), NULL, (yyvsp[(3) - (3)].i),
+ (yyval.blk).q = (yyvsp[(0) - (3)].blk).q); }
+ break;
+
+ case 17:
+#line 156 "grammar.y"
+ { (yyval.blk).b = gen_mcode((yyvsp[(1) - (3)].s), (yyvsp[(3) - (3)].s), 0,
+ (yyval.blk).q = (yyvsp[(0) - (3)].blk).q); }
+ break;
+
+ case 18:
+#line 158 "grammar.y"
+ {
+ /* Decide how to parse HID based on proto */
+ (yyval.blk).q = (yyvsp[(0) - (1)].blk).q;
+ switch ((yyval.blk).q.proto) {
+ case Q_DECNET:
+ (yyval.blk).b = gen_ncode((yyvsp[(1) - (1)].s), 0, (yyval.blk).q);
+ break;
+ default:
+ (yyval.blk).b = gen_ncode((yyvsp[(1) - (1)].s), 0, (yyval.blk).q);
+ break;
+ }
+ }
+ break;
+
+ case 19:
+#line 170 "grammar.y"
+ { (yyval.blk).b = gen_ecode((yyvsp[(1) - (1)].e), (yyval.blk).q = (yyvsp[(0) - (1)].blk).q); }
+ break;
+
+ case 20:
+#line 171 "grammar.y"
+ { gen_not((yyvsp[(2) - (2)].blk).b); (yyval.blk) = (yyvsp[(2) - (2)].blk); }
+ break;
+
+ case 21:
+#line 173 "grammar.y"
+ { (yyval.blk) = (yyvsp[(0) - (1)].blk); }
+ break;
+
+ case 22:
+#line 175 "grammar.y"
+ { (yyval.blk) = (yyvsp[(0) - (1)].blk); }
+ break;
+
+ case 24:
+#line 178 "grammar.y"
+ { gen_and((yyvsp[(1) - (3)].blk).b, (yyvsp[(3) - (3)].blk).b); (yyval.blk) = (yyvsp[(3) - (3)].blk); }
+ break;
+
+ case 25:
+#line 179 "grammar.y"
+ { gen_or((yyvsp[(1) - (3)].blk).b, (yyvsp[(3) - (3)].blk).b); (yyval.blk) = (yyvsp[(3) - (3)].blk); }
+ break;
+
+ case 26:
+#line 181 "grammar.y"
+ { (yyval.blk).b = gen_ncode(NULL, (bpf_u_int32)(yyvsp[(1) - (1)].i),
+ (yyval.blk).q = (yyvsp[(0) - (1)].blk).q); }
+ break;
+
+ case 29:
+#line 186 "grammar.y"
+ { gen_not((yyvsp[(2) - (2)].blk).b); (yyval.blk) = (yyvsp[(2) - (2)].blk); }
+ break;
+
+ case 30:
+#line 188 "grammar.y"
+ { QSET((yyval.blk).q, (yyvsp[(1) - (3)].i), (yyvsp[(2) - (3)].i), (yyvsp[(3) - (3)].i)); }
+ break;
+
+ case 31:
+#line 189 "grammar.y"
+ { QSET((yyval.blk).q, (yyvsp[(1) - (2)].i), (yyvsp[(2) - (2)].i), Q_DEFAULT); }
+ break;
+
+ case 32:
+#line 190 "grammar.y"
+ { QSET((yyval.blk).q, (yyvsp[(1) - (2)].i), Q_DEFAULT, (yyvsp[(2) - (2)].i)); }
+ break;
+
+ case 33:
+#line 191 "grammar.y"
+ { QSET((yyval.blk).q, (yyvsp[(1) - (2)].i), Q_DEFAULT, Q_PROTO); }
+ break;
+
+ case 34:
+#line 192 "grammar.y"
+ { QSET((yyval.blk).q, (yyvsp[(1) - (2)].i), Q_DEFAULT, (yyvsp[(2) - (2)].i)); }
+ break;
+
+ case 35:
+#line 194 "grammar.y"
+ { (yyval.blk) = (yyvsp[(2) - (2)].blk); }
+ break;
+
+ case 36:
+#line 195 "grammar.y"
+ { (yyval.blk).b = (yyvsp[(2) - (3)].blk).b; (yyval.blk).q = (yyvsp[(1) - (3)].blk).q; }
+ break;
+
+ case 37:
+#line 196 "grammar.y"
+ { (yyval.blk).b = gen_proto_abbrev((yyvsp[(1) - (1)].i)); (yyval.blk).q = qerr; }
+ break;
+
+ case 38:
+#line 197 "grammar.y"
+ { (yyval.blk).b = gen_relation((yyvsp[(2) - (3)].i), (yyvsp[(1) - (3)].a), (yyvsp[(3) - (3)].a), 0);
+ (yyval.blk).q = qerr; }
+ break;
+
+ case 39:
+#line 199 "grammar.y"
+ { (yyval.blk).b = gen_relation((yyvsp[(2) - (3)].i), (yyvsp[(1) - (3)].a), (yyvsp[(3) - (3)].a), 1);
+ (yyval.blk).q = qerr; }
+ break;
+
+ case 40:
+#line 201 "grammar.y"
+ { (yyval.blk).b = (yyvsp[(1) - (1)].rblk); (yyval.blk).q = qerr; }
+ break;
+
+ case 42:
+#line 205 "grammar.y"
+ { (yyval.i) = Q_DEFAULT; }
+ break;
+
+ case 43:
+#line 208 "grammar.y"
+ { (yyval.i) = Q_SRC; }
+ break;
+
+ case 44:
+#line 209 "grammar.y"
+ { (yyval.i) = Q_DST; }
+ break;
+
+ case 45:
+#line 210 "grammar.y"
+ { (yyval.i) = Q_OR; }
+ break;
+
+ case 46:
+#line 211 "grammar.y"
+ { (yyval.i) = Q_OR; }
+ break;
+
+ case 47:
+#line 212 "grammar.y"
+ { (yyval.i) = Q_AND; }
+ break;
+
+ case 48:
+#line 213 "grammar.y"
+ { (yyval.i) = Q_AND; }
+ break;
+
+ case 49:
+#line 216 "grammar.y"
+ { (yyval.i) = Q_HOST; }
+ break;
+
+ case 50:
+#line 217 "grammar.y"
+ { (yyval.i) = Q_NET; }
+ break;
+
+ case 51:
+#line 218 "grammar.y"
+ { (yyval.i) = Q_PORT; }
+ break;
+
+ case 52:
+#line 221 "grammar.y"
+ { (yyval.i) = Q_GATEWAY; }
+ break;
+
+ case 53:
+#line 223 "grammar.y"
+ { (yyval.i) = Q_LINK; }
+ break;
+
+ case 54:
+#line 224 "grammar.y"
+ { (yyval.i) = Q_IP; }
+ break;
+
+ case 55:
+#line 225 "grammar.y"
+ { (yyval.i) = Q_ARP; }
+ break;
+
+ case 56:
+#line 226 "grammar.y"
+ { (yyval.i) = Q_RARP; }
+ break;
+
+ case 57:
+#line 227 "grammar.y"
+ { (yyval.i) = Q_TCP; }
+ break;
+
+ case 58:
+#line 228 "grammar.y"
+ { (yyval.i) = Q_UDP; }
+ break;
+
+ case 59:
+#line 229 "grammar.y"
+ { (yyval.i) = Q_ICMP; }
+ break;
+
+ case 60:
+#line 230 "grammar.y"
+ { (yyval.i) = Q_IGMP; }
+ break;
+
+ case 61:
+#line 231 "grammar.y"
+ { (yyval.i) = Q_IGRP; }
+ break;
+
+ case 62:
+#line 232 "grammar.y"
+ { (yyval.i) = Q_ATALK; }
+ break;
+
+ case 63:
+#line 233 "grammar.y"
+ { (yyval.i) = Q_DECNET; }
+ break;
+
+ case 64:
+#line 234 "grammar.y"
+ { (yyval.i) = Q_LAT; }
+ break;
+
+ case 65:
+#line 235 "grammar.y"
+ { (yyval.i) = Q_SCA; }
+ break;
+
+ case 66:
+#line 236 "grammar.y"
+ { (yyval.i) = Q_MOPDL; }
+ break;
+
+ case 67:
+#line 237 "grammar.y"
+ { (yyval.i) = Q_MOPRC; }
+ break;
+
+ case 68:
+#line 239 "grammar.y"
+ { (yyval.rblk) = gen_broadcast((yyvsp[(1) - (2)].i)); }
+ break;
+
+ case 69:
+#line 240 "grammar.y"
+ { (yyval.rblk) = gen_multicast((yyvsp[(1) - (2)].i)); }
+ break;
+
+ case 70:
+#line 241 "grammar.y"
+ { (yyval.rblk) = gen_less((yyvsp[(2) - (2)].i)); }
+ break;
+
+ case 71:
+#line 242 "grammar.y"
+ { (yyval.rblk) = gen_greater((yyvsp[(2) - (2)].i)); }
+ break;
+
+ case 72:
+#line 243 "grammar.y"
+ { (yyval.rblk) = gen_byteop((yyvsp[(3) - (4)].i), (yyvsp[(2) - (4)].i), (yyvsp[(4) - (4)].i)); }
+ break;
+
+ case 73:
+#line 244 "grammar.y"
+ { (yyval.rblk) = gen_inbound(0); }
+ break;
+
+ case 74:
+#line 245 "grammar.y"
+ { (yyval.rblk) = gen_inbound(1); }
+ break;
+
+ case 75:
+#line 247 "grammar.y"
+ { (yyval.i) = BPF_JGT; }
+ break;
+
+ case 76:
+#line 248 "grammar.y"
+ { (yyval.i) = BPF_JGE; }
+ break;
+
+ case 77:
+#line 249 "grammar.y"
+ { (yyval.i) = BPF_JEQ; }
+ break;
+
+ case 78:
+#line 251 "grammar.y"
+ { (yyval.i) = BPF_JGT; }
+ break;
+
+ case 79:
+#line 252 "grammar.y"
+ { (yyval.i) = BPF_JGE; }
+ break;
+
+ case 80:
+#line 253 "grammar.y"
+ { (yyval.i) = BPF_JEQ; }
+ break;
+
+ case 81:
+#line 255 "grammar.y"
+ { (yyval.a) = gen_loadi((yyvsp[(1) - (1)].i)); }
+ break;
+
+ case 83:
+#line 258 "grammar.y"
+ { (yyval.a) = gen_load((yyvsp[(1) - (4)].i), (yyvsp[(3) - (4)].a), 1); }
+ break;
+
+ case 84:
+#line 259 "grammar.y"
+ { (yyval.a) = gen_load((yyvsp[(1) - (6)].i), (yyvsp[(3) - (6)].a), (yyvsp[(5) - (6)].i)); }
+ break;
+
+ case 85:
+#line 260 "grammar.y"
+ { (yyval.a) = gen_arth(BPF_ADD, (yyvsp[(1) - (3)].a), (yyvsp[(3) - (3)].a)); }
+ break;
+
+ case 86:
+#line 261 "grammar.y"
+ { (yyval.a) = gen_arth(BPF_SUB, (yyvsp[(1) - (3)].a), (yyvsp[(3) - (3)].a)); }
+ break;
+
+ case 87:
+#line 262 "grammar.y"
+ { (yyval.a) = gen_arth(BPF_MUL, (yyvsp[(1) - (3)].a), (yyvsp[(3) - (3)].a)); }
+ break;
+
+ case 88:
+#line 263 "grammar.y"
+ { (yyval.a) = gen_arth(BPF_DIV, (yyvsp[(1) - (3)].a), (yyvsp[(3) - (3)].a)); }
+ break;
+
+ case 89:
+#line 264 "grammar.y"
+ { (yyval.a) = gen_arth(BPF_AND, (yyvsp[(1) - (3)].a), (yyvsp[(3) - (3)].a)); }
+ break;
+
+ case 90:
+#line 265 "grammar.y"
+ { (yyval.a) = gen_arth(BPF_OR, (yyvsp[(1) - (3)].a), (yyvsp[(3) - (3)].a)); }
+ break;
+
+ case 91:
+#line 266 "grammar.y"
+ { (yyval.a) = gen_arth(BPF_LSH, (yyvsp[(1) - (3)].a), (yyvsp[(3) - (3)].a)); }
+ break;
+
+ case 92:
+#line 267 "grammar.y"
+ { (yyval.a) = gen_arth(BPF_RSH, (yyvsp[(1) - (3)].a), (yyvsp[(3) - (3)].a)); }
+ break;
+
+ case 93:
+#line 268 "grammar.y"
+ { (yyval.a) = gen_neg((yyvsp[(2) - (2)].a)); }
+ break;
+
+ case 94:
+#line 269 "grammar.y"
+ { (yyval.a) = (yyvsp[(2) - (3)].a); }
+ break;
+
+ case 95:
+#line 270 "grammar.y"
+ { (yyval.a) = gen_loadlen(); }
+ break;
+
+ case 96:
+#line 272 "grammar.y"
+ { (yyval.i) = '&'; }
+ break;
+
+ case 97:
+#line 273 "grammar.y"
+ { (yyval.i) = '|'; }
+ break;
+
+ case 98:
+#line 274 "grammar.y"
+ { (yyval.i) = '<'; }
+ break;
+
+ case 99:
+#line 275 "grammar.y"
+ { (yyval.i) = '>'; }
+ break;
+
+ case 100:
+#line 276 "grammar.y"
+ { (yyval.i) = '='; }
+ break;
+
+ case 102:
+#line 279 "grammar.y"
+ { (yyval.i) = (yyvsp[(2) - (3)].i); }
+ break;
+
+
+/* Line 1267 of yacc.c. */
+#line 2165 "y.tab.c"
+ default: break;
+ }
+ YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
+
+ YYPOPSTACK (yylen);
+ yylen = 0;
+ YY_STACK_PRINT (yyss, yyssp);
+
+ *++yyvsp = yyval;
+
+
+ /* Now `shift' the result of the reduction. Determine what state
+ that goes to, based on the state we popped back to and the rule
+ number reduced by. */
+
+ yyn = yyr1[yyn];
+
+ yystate = yypgoto[yyn - YYNTOKENS] + *yyssp;
+ if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp)
+ yystate = yytable[yystate];
+ else
+ yystate = yydefgoto[yyn - YYNTOKENS];
+
+ goto yynewstate;
+
+
+/*------------------------------------.
+| yyerrlab -- here on detecting error |
+`------------------------------------*/
+yyerrlab:
+ /* If not already recovering from an error, report this error. */
+ if (!yyerrstatus)
+ {
+ ++yynerrs;
+#if ! YYERROR_VERBOSE
+ yyerror (YY_("syntax error"));
+#else
+ {
+ YYSIZE_T yysize = yysyntax_error (0, yystate, yychar);
+ if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM)
+ {
+ YYSIZE_T yyalloc = 2 * yysize;
+ if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM))
+ yyalloc = YYSTACK_ALLOC_MAXIMUM;
+ if (yymsg != yymsgbuf)
+ YYSTACK_FREE (yymsg);
+ yymsg = (char *) YYSTACK_ALLOC (yyalloc);
+ if (yymsg)
+ yymsg_alloc = yyalloc;
+ else
+ {
+ yymsg = yymsgbuf;
+ yymsg_alloc = sizeof yymsgbuf;
+ }
+ }
+
+ if (0 < yysize && yysize <= yymsg_alloc)
+ {
+ (void) yysyntax_error (yymsg, yystate, yychar);
+ yyerror (yymsg);
+ }
+ else
+ {
+ yyerror (YY_("syntax error"));
+ if (yysize != 0)
+ goto yyexhaustedlab;
+ }
+ }
+#endif
+ }
+
+
+
+ if (yyerrstatus == 3)
+ {
+ /* If just tried and failed to reuse look-ahead token after an
+ error, discard it. */
+
+ if (yychar <= YYEOF)
+ {
+ /* Return failure if at end of input. */
+ if (yychar == YYEOF)
+ YYABORT;
+ }
+ else
+ {
+ yydestruct ("Error: discarding",
+ yytoken, &yylval);
+ yychar = YYEMPTY;
+ }
+ }
+
+ /* Else will try to reuse look-ahead token after shifting the error
+ token. */
+ goto yyerrlab1;
+
+
+/*---------------------------------------------------.
+| yyerrorlab -- error raised explicitly by YYERROR. |
+`---------------------------------------------------*/
+yyerrorlab:
+
+ /* Pacify compilers like GCC when the user code never invokes
+ YYERROR and the label yyerrorlab therefore never appears in user
+ code. */
+ if (/*CONSTCOND*/ 0)
+ goto yyerrorlab;
+
+ /* Do not reclaim the symbols of the rule which action triggered
+ this YYERROR. */
+ YYPOPSTACK (yylen);
+ yylen = 0;
+ YY_STACK_PRINT (yyss, yyssp);
+ yystate = *yyssp;
+ goto yyerrlab1;
+
+
+/*-------------------------------------------------------------.
+| yyerrlab1 -- common code for both syntax error and YYERROR. |
+`-------------------------------------------------------------*/
+yyerrlab1:
+ yyerrstatus = 3; /* Each real token shifted decrements this. */
+
+ for (;;)
+ {
+ yyn = yypact[yystate];
+ if (yyn != YYPACT_NINF)
+ {
+ yyn += YYTERROR;
+ if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR)
+ {
+ yyn = yytable[yyn];
+ if (0 < yyn)
+ break;
+ }
+ }
+
+ /* Pop the current state because it cannot handle the error token. */
+ if (yyssp == yyss)
+ YYABORT;
+
+
+ yydestruct ("Error: popping",
+ yystos[yystate], yyvsp);
+ YYPOPSTACK (1);
+ yystate = *yyssp;
+ YY_STACK_PRINT (yyss, yyssp);
+ }
+
+ if (yyn == YYFINAL)
+ YYACCEPT;
+
+ *++yyvsp = yylval;
+
+
+ /* Shift the error token. */
+ YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp);
+
+ yystate = yyn;
+ goto yynewstate;
+
+
+/*-------------------------------------.
+| yyacceptlab -- YYACCEPT comes here. |
+`-------------------------------------*/
+yyacceptlab:
+ yyresult = 0;
+ goto yyreturn;
+
+/*-----------------------------------.
+| yyabortlab -- YYABORT comes here. |
+`-----------------------------------*/
+yyabortlab:
+ yyresult = 1;
+ goto yyreturn;
+
+#ifndef yyoverflow
+/*-------------------------------------------------.
+| yyexhaustedlab -- memory exhaustion comes here. |
+`-------------------------------------------------*/
+yyexhaustedlab:
+ yyerror (YY_("memory exhausted"));
+ yyresult = 2;
+ /* Fall through. */
+#endif
+
+yyreturn:
+ if (yychar != YYEOF && yychar != YYEMPTY)
+ yydestruct ("Cleanup: discarding lookahead",
+ yytoken, &yylval);
+ /* Do not reclaim the symbols of the rule which action triggered
+ this YYABORT or YYACCEPT. */
+ YYPOPSTACK (yylen);
+ YY_STACK_PRINT (yyss, yyssp);
+ while (yyssp != yyss)
+ {
+ yydestruct ("Cleanup: popping",
+ yystos[*yyssp], yyvsp);
+ YYPOPSTACK (1);
+ }
+#ifndef yyoverflow
+ if (yyss != yyssa)
+ YYSTACK_FREE (yyss);
+#endif
+#if YYERROR_VERBOSE
+ if (yymsg != yymsgbuf)
+ YYSTACK_FREE (yymsg);
+#endif
+ /* Make sure YYID is used. */
+ return YYID (yyresult);
+}
+
+
+#line 281 "grammar.y"
+
+
--- /dev/null
+%{
+/*
+ * Copyright (c) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ */
+#ifndef lint
+static const char rcsid[] =
+ "@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/grammar.y,v 1.1 1999/08/26 10:05:22 johana Exp $ (LBL)";
+#endif
+
+#include <sys/types.h>
+#include <sys/time.h>
+#include <sys/socket.h>
+
+#if __STDC__
+struct mbuf;
+struct rtentry;
+#endif
+
+#include <net/if.h>
+
+#include <netinet/in.h>
+#include <netinet/if_ether.h>
+
+#include <stdio.h>
+
+#include "pcap-int.h"
+
+#include "gencode.h"
+#include <pcap-namedb.h>
+
+#include "gnuc.h"
+#ifdef HAVE_OS_PROTO_H
+#include "os-proto.h"
+#endif
+
+#define QSET(q, p, d, a) (q).proto = (p),\
+ (q).dir = (d),\
+ (q).addr = (a)
+
+int n_errors = 0;
+
+static struct qual qerr = { Q_UNDEF, Q_UNDEF, Q_UNDEF, Q_UNDEF };
+
+static void
+yyerror(char *msg)
+{
+ ++n_errors;
+ bpf_error("%s", msg);
+ /* NOTREACHED */
+}
+
+#ifndef YYBISON
+int yyparse(void);
+
+int
+pcap_parse()
+{
+ return (yyparse());
+}
+#endif
+
+%}
+
+%union {
+ int i;
+ bpf_u_int32 h;
+ u_char *e;
+ char *s;
+ struct stmt *stmt;
+ struct arth *a;
+ struct {
+ struct qual q;
+ struct block *b;
+ } blk;
+ struct block *rblk;
+}
+
+%type <blk> expr id nid pid term rterm qid
+%type <blk> head
+%type <i> pqual dqual aqual ndaqual
+%type <a> arth narth
+%type <i> byteop pname pnum relop irelop
+%type <blk> and or paren not null prog
+%type <rblk> other
+
+%token DST SRC HOST GATEWAY
+%token NET MASK PORT LESS GREATER PROTO BYTE
+%token ARP RARP IP TCP UDP ICMP IGMP IGRP
+%token ATALK DECNET LAT SCA MOPRC MOPDL
+%token TK_BROADCAST TK_MULTICAST
+%token NUM INBOUND OUTBOUND
+%token LINK
+%token GEQ LEQ NEQ
+%token ID EID HID
+%token LSH RSH
+%token LEN
+
+%type <s> ID
+%type <e> EID
+%type <s> HID
+%type <i> NUM
+
+%left OR AND
+%nonassoc '!'
+%left '|'
+%left '&'
+%left LSH RSH
+%left '+' '-'
+%left '*' '/'
+%nonassoc UMINUS
+%%
+prog: null expr
+{
+ finish_parse($2.b);
+}
+ | null
+ ;
+null: /* null */ { $$.q = qerr; }
+ ;
+expr: term
+ | expr and term { gen_and($1.b, $3.b); $$ = $3; }
+ | expr and id { gen_and($1.b, $3.b); $$ = $3; }
+ | expr or term { gen_or($1.b, $3.b); $$ = $3; }
+ | expr or id { gen_or($1.b, $3.b); $$ = $3; }
+ ;
+and: AND { $$ = $<blk>0; }
+ ;
+or: OR { $$ = $<blk>0; }
+ ;
+id: nid
+ | pnum { $$.b = gen_ncode(NULL, (bpf_u_int32)$1,
+ $$.q = $<blk>0.q); }
+ | paren pid ')' { $$ = $2; }
+ ;
+nid: ID { $$.b = gen_scode($1, $$.q = $<blk>0.q); }
+ | HID '/' NUM { $$.b = gen_mcode($1, NULL, $3,
+ $$.q = $<blk>0.q); }
+ | HID MASK HID { $$.b = gen_mcode($1, $3, 0,
+ $$.q = $<blk>0.q); }
+ | HID {
+ /* Decide how to parse HID based on proto */
+ $$.q = $<blk>0.q;
+ switch ($$.q.proto) {
+ case Q_DECNET:
+ $$.b = gen_ncode($1, 0, $$.q);
+ break;
+ default:
+ $$.b = gen_ncode($1, 0, $$.q);
+ break;
+ }
+ }
+ | EID { $$.b = gen_ecode($1, $$.q = $<blk>0.q); }
+ | not id { gen_not($2.b); $$ = $2; }
+ ;
+not: '!' { $$ = $<blk>0; }
+ ;
+paren: '(' { $$ = $<blk>0; }
+ ;
+pid: nid
+ | qid and id { gen_and($1.b, $3.b); $$ = $3; }
+ | qid or id { gen_or($1.b, $3.b); $$ = $3; }
+ ;
+qid: pnum { $$.b = gen_ncode(NULL, (bpf_u_int32)$1,
+ $$.q = $<blk>0.q); }
+ | pid
+ ;
+term: rterm
+ | not term { gen_not($2.b); $$ = $2; }
+ ;
+head: pqual dqual aqual { QSET($$.q, $1, $2, $3); }
+ | pqual dqual { QSET($$.q, $1, $2, Q_DEFAULT); }
+ | pqual aqual { QSET($$.q, $1, Q_DEFAULT, $2); }
+ | pqual PROTO { QSET($$.q, $1, Q_DEFAULT, Q_PROTO); }
+ | pqual ndaqual { QSET($$.q, $1, Q_DEFAULT, $2); }
+ ;
+rterm: head id { $$ = $2; }
+ | paren expr ')' { $$.b = $2.b; $$.q = $1.q; }
+ | pname { $$.b = gen_proto_abbrev($1); $$.q = qerr; }
+ | arth relop arth { $$.b = gen_relation($2, $1, $3, 0);
+ $$.q = qerr; }
+ | arth irelop arth { $$.b = gen_relation($2, $1, $3, 1);
+ $$.q = qerr; }
+ | other { $$.b = $1; $$.q = qerr; }
+ ;
+/* protocol level qualifiers */
+pqual: pname
+ | { $$ = Q_DEFAULT; }
+ ;
+/* 'direction' qualifiers */
+dqual: SRC { $$ = Q_SRC; }
+ | DST { $$ = Q_DST; }
+ | SRC OR DST { $$ = Q_OR; }
+ | DST OR SRC { $$ = Q_OR; }
+ | SRC AND DST { $$ = Q_AND; }
+ | DST AND SRC { $$ = Q_AND; }
+ ;
+/* address type qualifiers */
+aqual: HOST { $$ = Q_HOST; }
+ | NET { $$ = Q_NET; }
+ | PORT { $$ = Q_PORT; }
+ ;
+/* non-directional address type qualifiers */
+ndaqual: GATEWAY { $$ = Q_GATEWAY; }
+ ;
+pname: LINK { $$ = Q_LINK; }
+ | IP { $$ = Q_IP; }
+ | ARP { $$ = Q_ARP; }
+ | RARP { $$ = Q_RARP; }
+ | TCP { $$ = Q_TCP; }
+ | UDP { $$ = Q_UDP; }
+ | ICMP { $$ = Q_ICMP; }
+ | IGMP { $$ = Q_IGMP; }
+ | IGRP { $$ = Q_IGRP; }
+ | ATALK { $$ = Q_ATALK; }
+ | DECNET { $$ = Q_DECNET; }
+ | LAT { $$ = Q_LAT; }
+ | SCA { $$ = Q_SCA; }
+ | MOPDL { $$ = Q_MOPDL; }
+ | MOPRC { $$ = Q_MOPRC; }
+ ;
+other: pqual TK_BROADCAST { $$ = gen_broadcast($1); }
+ | pqual TK_MULTICAST { $$ = gen_multicast($1); }
+ | LESS NUM { $$ = gen_less($2); }
+ | GREATER NUM { $$ = gen_greater($2); }
+ | BYTE NUM byteop NUM { $$ = gen_byteop($3, $2, $4); }
+ | INBOUND { $$ = gen_inbound(0); }
+ | OUTBOUND { $$ = gen_inbound(1); }
+ ;
+relop: '>' { $$ = BPF_JGT; }
+ | GEQ { $$ = BPF_JGE; }
+ | '=' { $$ = BPF_JEQ; }
+ ;
+irelop: LEQ { $$ = BPF_JGT; }
+ | '<' { $$ = BPF_JGE; }
+ | NEQ { $$ = BPF_JEQ; }
+ ;
+arth: pnum { $$ = gen_loadi($1); }
+ | narth
+ ;
+narth: pname '[' arth ']' { $$ = gen_load($1, $3, 1); }
+ | pname '[' arth ':' NUM ']' { $$ = gen_load($1, $3, $5); }
+ | arth '+' arth { $$ = gen_arth(BPF_ADD, $1, $3); }
+ | arth '-' arth { $$ = gen_arth(BPF_SUB, $1, $3); }
+ | arth '*' arth { $$ = gen_arth(BPF_MUL, $1, $3); }
+ | arth '/' arth { $$ = gen_arth(BPF_DIV, $1, $3); }
+ | arth '&' arth { $$ = gen_arth(BPF_AND, $1, $3); }
+ | arth '|' arth { $$ = gen_arth(BPF_OR, $1, $3); }
+ | arth LSH arth { $$ = gen_arth(BPF_LSH, $1, $3); }
+ | arth RSH arth { $$ = gen_arth(BPF_RSH, $1, $3); }
+ | '-' arth %prec UMINUS { $$ = gen_neg($2); }
+ | paren narth ')' { $$ = $2; }
+ | LEN { $$ = gen_loadlen(); }
+ ;
+byteop: '&' { $$ = '&'; }
+ | '|' { $$ = '|'; }
+ | '<' { $$ = '<'; }
+ | '>' { $$ = '>'; }
+ | '=' { $$ = '='; }
+ ;
+pnum: NUM
+ | paren pnum ')' { $$ = $2; }
+ ;
+%%
--- /dev/null
+/*
+ * Copyright (c) 1994, 1995, 1996, 1997, 1998
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the Computer Systems
+ * Engineering Group at Lawrence Berkeley Laboratory.
+ * 4. Neither the name of the University nor of the Laboratory may be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef lint
+static const char rcsid[] =
+ "@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/inet.c,v 1.1 1999/08/26 10:05:22 johana Exp $ (LBL)";
+#endif
+
+#include <sys/param.h>
+#include <sys/file.h>
+#include <sys/ioctl.h>
+#include <sys/socket.h>
+#ifdef HAVE_SYS_SOCKIO_H
+#include <sys/sockio.h>
+#endif
+#include <sys/time.h> /* concession to AIX */
+
+#if __STDC__
+struct mbuf;
+struct rtentry;
+#endif
+
+#include <net/if.h>
+#include <netinet/in.h>
+
+#include <ctype.h>
+#include <errno.h>
+#include <memory.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+
+#include "pcap-int.h"
+
+#include "gnuc.h"
+#ifdef HAVE_OS_PROTO_H
+#include "os-proto.h"
+#endif
+
+/* Not all systems have IFF_LOOPBACK */
+#ifdef IFF_LOOPBACK
+#define ISLOOPBACK(p) ((p)->ifr_flags & IFF_LOOPBACK)
+#else
+#define ISLOOPBACK(p) ((p)->ifr_name[0] == 'l' && (p)->ifr_name[1] == 'o' && \
+ (isdigit((p)->ifr_name[2]) || (p)->ifr_name[2] == '\0'))
+#endif
+
+/*
+ * Return the name of a network interface attached to the system, or NULL
+ * if none can be found. The interface must be configured up; the
+ * lowest unit number is preferred; loopback is ignored.
+ */
+char *
+pcap_lookupdev(errbuf)
+ register char *errbuf;
+{
+ register int fd, minunit, n;
+ register char *cp;
+ register struct ifreq *ifrp, *ifend, *ifnext, *mp;
+ struct ifconf ifc;
+ struct ifreq ibuf[16], ifr;
+ static char device[sizeof(ifrp->ifr_name) + 1];
+
+ fd = socket(AF_INET, SOCK_DGRAM, 0);
+ if (fd < 0) {
+ (void)sprintf(errbuf, "socket: %s", pcap_strerror(errno));
+ return (NULL);
+ }
+ ifc.ifc_len = sizeof ibuf;
+ ifc.ifc_buf = (caddr_t)ibuf;
+
+ memset((char *)ibuf, 0, sizeof(ibuf));
+ if (ioctl(fd, SIOCGIFCONF, (char *)&ifc) < 0 ||
+ ifc.ifc_len < sizeof(struct ifreq)) {
+ (void)sprintf(errbuf, "SIOCGIFCONF: %s", pcap_strerror(errno));
+ (void)close(fd);
+ return (NULL);
+ }
+ ifrp = ibuf;
+ ifend = (struct ifreq *)((char *)ibuf + ifc.ifc_len);
+
+ mp = NULL;
+ minunit = 666;
+ for (; ifrp < ifend; ifrp = ifnext) {
+#ifdef HAVE_SOCKADDR_SA_LEN
+ n = ifrp->ifr_addr.sa_len + sizeof(ifrp->ifr_name);
+ if (n < sizeof(*ifrp))
+ ifnext = ifrp + 1;
+ else
+ ifnext = (struct ifreq *)((char *)ifrp + n);
+ if (ifrp->ifr_addr.sa_family != AF_INET)
+ continue;
+#else
+ ifnext = ifrp + 1;
+#endif
+ /*
+ * Need a template to preserve address info that is
+ * used below to locate the next entry. (Otherwise,
+ * SIOCGIFFLAGS stomps over it because the requests
+ * are returned in a union.)
+ */
+ strncpy(ifr.ifr_name, ifrp->ifr_name, sizeof(ifr.ifr_name));
+ if (ioctl(fd, SIOCGIFFLAGS, (char *)&ifr) < 0) {
+ if (errno == ENXIO)
+ continue;
+ (void)sprintf(errbuf, "SIOCGIFFLAGS: %.*s: %s",
+ (int)sizeof(ifr.ifr_name), ifr.ifr_name,
+ pcap_strerror(errno));
+ (void)close(fd);
+ return (NULL);
+ }
+
+ /* Must be up and not the loopback */
+ if ((ifr.ifr_flags & IFF_UP) == 0 || ISLOOPBACK(&ifr))
+ continue;
+
+ for (cp = ifrp->ifr_name; !isdigit(*cp); ++cp)
+ continue;
+ n = atoi(cp);
+ if (n < minunit) {
+ minunit = n;
+ mp = ifrp;
+ }
+ }
+ (void)close(fd);
+ if (mp == NULL) {
+ (void)strcpy(errbuf, "no suitable device found");
+ return (NULL);
+ }
+
+ (void)strncpy(device, mp->ifr_name, sizeof(device) - 1);
+ device[sizeof(device) - 1] = '\0';
+ return (device);
+}
+
+int
+pcap_lookupnet(device, netp, maskp, errbuf)
+ register char *device;
+ register bpf_u_int32 *netp, *maskp;
+ register char *errbuf;
+{
+ register int fd;
+ register struct sockaddr_in *sin;
+ struct ifreq ifr;
+
+ fd = socket(AF_INET, SOCK_DGRAM, 0);
+ if (fd < 0) {
+ (void)sprintf(errbuf, "socket: %s", pcap_strerror(errno));
+ return (-1);
+ }
+ memset(&ifr, 0, sizeof(ifr));
+#ifdef linux
+ /* XXX Work around Linux kernel bug */
+ ifr.ifr_addr.sa_family = AF_INET;
+#endif
+ (void)strncpy(ifr.ifr_name, device, sizeof(ifr.ifr_name));
+ if (ioctl(fd, SIOCGIFADDR, (char *)&ifr) < 0) {
+ (void)sprintf(errbuf, "SIOCGIFADDR: %s: %s",
+ device, pcap_strerror(errno));
+ (void)close(fd);
+ return (-1);
+ }
+ sin = (struct sockaddr_in *)&ifr.ifr_addr;
+ *netp = sin->sin_addr.s_addr;
+ if (ioctl(fd, SIOCGIFNETMASK, (char *)&ifr) < 0) {
+ (void)sprintf(errbuf, "SIOCGIFNETMASK: %s: %s",
+ device, pcap_strerror(errno));
+ (void)close(fd);
+ return (-1);
+ }
+ (void)close(fd);
+ *maskp = sin->sin_addr.s_addr;
+ if (*maskp == 0) {
+ if (IN_CLASSA(*netp))
+ *maskp = IN_CLASSA_NET;
+ else if (IN_CLASSB(*netp))
+ *maskp = IN_CLASSB_NET;
+ else if (IN_CLASSC(*netp))
+ *maskp = IN_CLASSC_NET;
+ else {
+ (void)sprintf(errbuf, "inet class for 0x%x unknown",
+ *netp);
+ return (-1);
+ }
+ }
+ *netp &= *maskp;
+ return (0);
+}
--- /dev/null
+#! /bin/sh
+#
+# install - install a program, script, or datafile
+# This comes from X11R5 (mit/util/scripts/install.sh).
+#
+# Copyright 1991 by the Massachusetts Institute of Technology
+#
+# Permission to use, copy, modify, distribute, and sell this software and its
+# documentation for any purpose is hereby granted without fee, provided that
+# the above copyright notice appear in all copies and that both that
+# copyright notice and this permission notice appear in supporting
+# documentation, and that the name of M.I.T. not be used in advertising or
+# publicity pertaining to distribution of the software without specific,
+# written prior permission. M.I.T. makes no representations about the
+# suitability of this software for any purpose. It is provided "as is"
+# without express or implied warranty.
+#
+# Calling this script install-sh is preferred over install.sh, to prevent
+# `make' implicit rules from creating a file called install from it
+# when there is no Makefile.
+#
+# This script is compatible with the BSD install script, but was written
+# from scratch. It can only install one file at a time, a restriction
+# shared with many OS's install programs.
+
+
+# set DOITPROG to echo to test this script
+
+# Don't use :- since 4.3BSD and earlier shells don't like it.
+doit="${DOITPROG-}"
+
+
+# put in absolute paths if you don't have them in your path; or use env. vars.
+
+mvprog="${MVPROG-mv}"
+cpprog="${CPPROG-cp}"
+chmodprog="${CHMODPROG-chmod}"
+chownprog="${CHOWNPROG-chown}"
+chgrpprog="${CHGRPPROG-chgrp}"
+stripprog="${STRIPPROG-strip}"
+rmprog="${RMPROG-rm}"
+mkdirprog="${MKDIRPROG-mkdir}"
+
+transformbasename=""
+transform_arg=""
+instcmd="$mvprog"
+chmodcmd="$chmodprog 0755"
+chowncmd=""
+chgrpcmd=""
+stripcmd=""
+rmcmd="$rmprog -f"
+mvcmd="$mvprog"
+src=""
+dst=""
+dir_arg=""
+
+while [ x"$1" != x ]; do
+ case $1 in
+ -c) instcmd="$cpprog"
+ shift
+ continue;;
+
+ -d) dir_arg=true
+ shift
+ continue;;
+
+ -m) chmodcmd="$chmodprog $2"
+ shift
+ shift
+ continue;;
+
+ -o) chowncmd="$chownprog $2"
+ shift
+ shift
+ continue;;
+
+ -g) chgrpcmd="$chgrpprog $2"
+ shift
+ shift
+ continue;;
+
+ -s) stripcmd="$stripprog"
+ shift
+ continue;;
+
+ -t=*) transformarg=`echo $1 | sed 's/-t=//'`
+ shift
+ continue;;
+
+ -b=*) transformbasename=`echo $1 | sed 's/-b=//'`
+ shift
+ continue;;
+
+ *) if [ x"$src" = x ]
+ then
+ src=$1
+ else
+ # this colon is to work around a 386BSD /bin/sh bug
+ :
+ dst=$1
+ fi
+ shift
+ continue;;
+ esac
+done
+
+if [ x"$src" = x ]
+then
+ echo "install: no input file specified"
+ exit 1
+else
+ true
+fi
+
+if [ x"$dir_arg" != x ]; then
+ dst=$src
+ src=""
+
+ if [ -d $dst ]; then
+ instcmd=:
+ else
+ instcmd=mkdir
+ fi
+else
+
+# Waiting for this to be detected by the "$instcmd $src $dsttmp" command
+# might cause directories to be created, which would be especially bad
+# if $src (and thus $dsttmp) contains '*'.
+
+ if [ -f $src -o -d $src ]
+ then
+ true
+ else
+ echo "install: $src does not exist"
+ exit 1
+ fi
+
+ if [ x"$dst" = x ]
+ then
+ echo "install: no destination specified"
+ exit 1
+ else
+ true
+ fi
+
+# If destination is a directory, append the input filename; if your system
+# does not like double slashes in filenames, you may need to add some logic
+
+ if [ -d $dst ]
+ then
+ dst="$dst"/`basename $src`
+ else
+ true
+ fi
+fi
+
+## this sed command emulates the dirname command
+dstdir=`echo $dst | sed -e 's,[^/]*$,,;s,/$,,;s,^$,.,'`
+
+# Make sure that the destination directory exists.
+# this part is taken from Noah Friedman's mkinstalldirs script
+
+# Skip lots of stat calls in the usual case.
+if [ ! -d "$dstdir" ]; then
+defaultIFS='
+'
+IFS="${IFS-${defaultIFS}}"
+
+oIFS="${IFS}"
+# Some sh's can't handle IFS=/ for some reason.
+IFS='%'
+set - `echo ${dstdir} | sed -e 's@/@%@g' -e 's@^%@/@'`
+IFS="${oIFS}"
+
+pathcomp=''
+
+while [ $# -ne 0 ] ; do
+ pathcomp="${pathcomp}${1}"
+ shift
+
+ if [ ! -d "${pathcomp}" ] ;
+ then
+ $mkdirprog "${pathcomp}"
+ else
+ true
+ fi
+
+ pathcomp="${pathcomp}/"
+done
+fi
+
+if [ x"$dir_arg" != x ]
+then
+ $doit $instcmd $dst &&
+
+ if [ x"$chowncmd" != x ]; then $doit $chowncmd $dst; else true ; fi &&
+ if [ x"$chgrpcmd" != x ]; then $doit $chgrpcmd $dst; else true ; fi &&
+ if [ x"$stripcmd" != x ]; then $doit $stripcmd $dst; else true ; fi &&
+ if [ x"$chmodcmd" != x ]; then $doit $chmodcmd $dst; else true ; fi
+else
+
+# If we're going to rename the final executable, determine the name now.
+
+ if [ x"$transformarg" = x ]
+ then
+ dstfile=`basename $dst`
+ else
+ dstfile=`basename $dst $transformbasename |
+ sed $transformarg`$transformbasename
+ fi
+
+# don't allow the sed command to completely eliminate the filename
+
+ if [ x"$dstfile" = x ]
+ then
+ dstfile=`basename $dst`
+ else
+ true
+ fi
+
+# Make a temp file name in the proper directory.
+
+ dsttmp=$dstdir/#inst.$$#
+
+# Move or copy the file name to the temp name
+
+ $doit $instcmd $src $dsttmp &&
+
+ trap "rm -f ${dsttmp}" 0 &&
+
+# and set any options; do chmod last to preserve setuid bits
+
+# If any of these fail, we abort the whole thing. If we want to
+# ignore errors from any of these, just make sure not to ignore
+# errors from the above "$doit $instcmd $src $dsttmp" command.
+
+ if [ x"$chowncmd" != x ]; then $doit $chowncmd $dsttmp; else true;fi &&
+ if [ x"$chgrpcmd" != x ]; then $doit $chgrpcmd $dsttmp; else true;fi &&
+ if [ x"$stripcmd" != x ]; then $doit $stripcmd $dsttmp; else true;fi &&
+ if [ x"$chmodcmd" != x ]; then $doit $chmodcmd $dsttmp; else true;fi &&
+
+# Now rename the file to the real destination.
+
+ $doit $rmcmd -f $dstdir/$dstfile &&
+ $doit $mvcmd $dsttmp $dstdir/$dstfile
+
+fi &&
+
+
+exit 0
--- /dev/null
+/* @(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/lbl/gnuc.h,v 1.1 1999/08/26 10:11:46 johana Exp $ (LBL) */
+
+/* Define __P() macro, if necessary */
+#ifndef __P
+#if __STDC__
+#define __P(protos) protos
+#else
+#define __P(protos) ()
+#endif
+#endif
+
+/* inline foo */
+#ifdef __GNUC__
+#define inline __inline
+#else
+#define inline
+#endif
+
+/*
+ * Handle new and old "dead" routine prototypes
+ *
+ * For example:
+ *
+ * __dead void foo(void) __attribute__((volatile));
+ *
+ */
+#ifdef __GNUC__
+#ifndef __dead
+#define __dead volatile
+#endif
+#if __GNUC__ < 2 || (__GNUC__ == 2 && __GNUC_MINOR__ < 5)
+#ifndef __attribute__
+#define __attribute__(args)
+#endif
+#endif
+#else
+#ifndef __dead
+#define __dead
+#endif
+#ifndef __attribute__
+#define __attribute__(args)
+#endif
+#endif
--- /dev/null
+/*
+ * Copyright (c) 1993, 1994, 1995, 1996, 1997
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ * @(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/lbl/os-solaris2.h,v 1.1 1999/08/26 10:11:46 johana Exp $ (LBL)
+ */
+
+/* Prototypes missing in SunOS 5 */
+int daemon(int, int);
+int dn_expand(const u_char *, const u_char *, const u_char *, char *, int);
+int dn_skipname(const u_char *, const u_char *);
+int flock(int, int);
+int getdtablesize(void);
+int gethostname(char *, int);
+int getpagesize(void);
+char *getusershell(void);
+char *getwd(char *);
+int iruserok(u_int, int, char *, char *);
+#ifdef __STDC__
+struct utmp;
+void login(struct utmp *);
+#endif
+int logout(const char *);
+int res_query(const char *, int, int, u_char *, int);
+int setenv(const char *, const char *, int);
+#if defined(_STDIO_H) && defined(HAVE_SETLINEBUF)
+int setlinebuf(FILE *);
+#endif
+int sigblock(int);
+int sigsetmask(int);
+char *strerror(int);
+int snprintf(char *, size_t, const char *, ...);
+int strcasecmp(const char *, const char *);
+void unsetenv(const char *);
+#ifdef __STDC__
+struct timeval;
+#endif
+int utimes(const char *, struct timeval *);
--- /dev/null
+/*
+ * Copyright (c) 1989, 1990, 1993, 1994, 1995, 1996
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ * @(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/lbl/os-sunos4.h,v 1.1 1999/08/26 10:11:46 johana Exp $ (LBL)
+ */
+
+/* Prototypes missing in SunOS 4 */
+#ifdef FILE
+int _filbuf(FILE *);
+int _flsbuf(u_char, FILE *);
+int fclose(FILE *);
+int fflush(FILE *);
+int fgetc(FILE *);
+int fprintf(FILE *, const char *, ...);
+int fputc(int, FILE *);
+int fputs(const char *, FILE *);
+u_int fread(void *, u_int, u_int, FILE *);
+int fseek(FILE *, long, int);
+u_int fwrite(const void *, u_int, u_int, FILE *);
+int pclose(FILE *);
+void rewind(FILE *);
+void setbuf(FILE *, char *);
+int setlinebuf(FILE *);
+int ungetc(int, FILE *);
+int vfprintf(FILE *, const char *, ...);
+int vprintf(const char *, ...);
+#endif
+
+#if __GNUC__ <= 1
+int read(int, char *, u_int);
+int write(int, char *, u_int);
+#endif
+
+long a64l(const char *);
+#ifdef __STDC__
+struct sockaddr;
+#endif
+int accept(int, struct sockaddr *, int *);
+int bind(int, struct sockaddr *, int);
+int bcmp(const void *, const void *, u_int);
+void bcopy(const void *, void *, u_int);
+void bzero(void *, int);
+int chroot(const char *);
+int close(int);
+void closelog(void);
+int connect(int, struct sockaddr *, int);
+char *crypt(const char *, const char *);
+int daemon(int, int);
+int fchmod(int, int);
+int fchown(int, int, int);
+void endgrent(void);
+void endpwent(void);
+void endservent(void);
+#ifdef __STDC__
+struct ether_addr;
+#endif
+struct ether_addr *ether_aton(const char *);
+int flock(int, int);
+#ifdef __STDC__
+struct stat;
+#endif
+int fstat(int, struct stat *);
+#ifdef __STDC__
+struct statfs;
+#endif
+int fstatfs(int, struct statfs *);
+int fsync(int);
+#ifdef __STDC__
+struct timeb;
+#endif
+int ftime(struct timeb *);
+int ftruncate(int, off_t);
+int getdtablesize(void);
+long gethostid(void);
+int gethostname(char *, int);
+int getopt(int, char * const *, const char *);
+int getpagesize(void);
+char *getpass(char *);
+int getpeername(int, struct sockaddr *, int *);
+int getpriority(int, int);
+#ifdef __STDC__
+struct rlimit;
+#endif
+int getrlimit(int, struct rlimit *);
+int getsockname(int, struct sockaddr *, int *);
+int getsockopt(int, int, int, char *, int *);
+#ifdef __STDC__
+struct timeval;
+struct timezone;
+#endif
+int gettimeofday(struct timeval *, struct timezone *);
+char *getusershell(void);
+char *getwd(char *);
+int initgroups(const char *, int);
+int ioctl(int, int, caddr_t);
+int iruserok(u_long, int, char *, char *);
+int isatty(int);
+int killpg(int, int);
+int listen(int, int);
+#ifdef __STDC__
+struct utmp;
+#endif
+void login(struct utmp *);
+int logout(const char *);
+off_t lseek(int, off_t, int);
+int lstat(const char *, struct stat *);
+int mkstemp(char *);
+char *mktemp(char *);
+int munmap(caddr_t, int);
+void openlog(const char *, int, int);
+void perror(const char *);
+int printf(const char *, ...);
+int puts(const char *);
+long random(void);
+int readlink(const char *, char *, int);
+#ifdef __STDC__
+struct iovec;
+#endif
+int readv(int, struct iovec *, int);
+int recv(int, char *, u_int, int);
+int recvfrom(int, char *, u_int, int, struct sockaddr *, int *);
+int rename(const char *, const char *);
+int rcmd(char **, u_short, char *, char *, char *, int *);
+int rresvport(int *);
+int send(int, char *, u_int, int);
+int sendto(int, char *, u_int, int, struct sockaddr *, int);
+int setenv(const char *, const char *, int);
+int seteuid(int);
+int setpriority(int, int, int);
+int select(int, fd_set *, fd_set *, fd_set *, struct timeval *);
+int setpgrp(int, int);
+void setpwent(void);
+int setrlimit(int, struct rlimit *);
+void setservent(int);
+int setsockopt(int, int, int, char *, int);
+int shutdown(int, int);
+int sigblock(int);
+void (*signal (int, void (*) (int))) (int);
+int sigpause(int);
+int sigsetmask(int);
+#ifdef __STDC__
+struct sigvec;
+#endif
+int sigvec(int, struct sigvec *, struct sigvec*);
+int snprintf(char *, size_t, const char *, ...);
+int socket(int, int, int);
+int socketpair(int, int, int, int *);
+int symlink(const char *, const char *);
+void srandom(int);
+int sscanf(char *, const char *, ...);
+int stat(const char *, struct stat *);
+int statfs(char *, struct statfs *);
+char *strerror(int);
+int strcasecmp(const char *, const char *);
+#ifdef __STDC__
+struct tm;
+#endif
+int strftime(char *, int, char *, struct tm *);
+int strncasecmp(const char *, const char *, int);
+long strtol(const char *, char **, int);
+void sync(void);
+void syslog(int, const char *, ...);
+int system(const char *);
+long tell(int);
+time_t time(time_t *);
+char *timezone(int, int);
+int tolower(int);
+int toupper(int);
+int truncate(char *, off_t);
+void unsetenv(const char *);
+int vfork(void);
+int vsprintf(char *, const char *, ...);
+int writev(int, struct iovec *, int);
+#ifdef __STDC__
+struct rusage;
+#endif
+int utimes(const char *, struct timeval *);
+#if __GNUC__ <= 1
+int wait(int *);
+pid_t wait3(int *, int, struct rusage *);
+#endif
+
+/* Ugly signal hacking */
+#ifdef SIG_ERR
+#undef SIG_ERR
+#define SIG_ERR (void (*)(int))-1
+#undef SIG_DFL
+#define SIG_DFL (void (*)(int))0
+#undef SIG_IGN
+#define SIG_IGN (void (*)(int))1
+
+#ifdef KERNEL
+#undef SIG_CATCH
+#define SIG_CATCH (void (*)(int))2
+#endif
+#undef SIG_HOLD
+#define SIG_HOLD (void (*)(int))3
+#endif
--- /dev/null
+/*
+ * Copyright (c) 1990, 1993, 1994, 1995, 1996
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ * @(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/lbl/os-ultrix4.h,v 1.1 1999/08/26 10:11:46 johana Exp $ (LBL)
+ */
+
+/* Prototypes missing in Ultrix 4 */
+int bcmp(const char *, const char *, u_int);
+void bcopy(const void *, void *, u_int);
+void bzero(void *, u_int);
+void endservent(void);
+int getopt(int, char * const *, const char *);
+#ifdef __STDC__
+struct timeval;
+struct timezone;
+#endif
+int gettimeofday(struct timeval *, struct timezone *);
+int ioctl(int, int, caddr_t);
+int pfopen(char *, int);
+int setlinebuf(FILE *);
+int socket(int, int, int);
+int strcasecmp(const char *, const char *);
--- /dev/null
+/*
+ * Copyright (c) 1982, 1986, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#)if_ether.h 8.3 (Berkeley) 5/2/95
+ */
+
+#include <net/if_arp.h>
+
+/*
+ * Ethernet address - 6 octets
+ */
+struct ether_addr {
+ u_char ether_addr_octet[6];
+};
+
+/*
+ * Structure of a 10Mb/s Ethernet header.
+ */
+struct ether_header {
+ u_char ether_dhost[6];
+ u_char ether_shost[6];
+ u_short ether_type;
+};
+
+#define ETHERTYPE_PUP 0x0200 /* PUP protocol */
+#define ETHERTYPE_IP 0x0800 /* IP protocol */
+#define ETHERTYPE_ARP 0x0806 /* Addr. resolution protocol */
+#define ETHERTYPE_REVARP 0x8035 /* reverse Addr. resolution protocol */
+
+/*
+ * The ETHERTYPE_NTRAILER packet types starting at ETHERTYPE_TRAIL have
+ * (type-ETHERTYPE_TRAIL)*512 bytes of data followed
+ * by an ETHER type (as given above) and then the (variable-length) header.
+ */
+#define ETHERTYPE_TRAIL 0x1000 /* Trailer packet */
+#define ETHERTYPE_NTRAILER 16
+
+#define ETHERMTU 1500
+#define ETHERMIN (60-14)
+
+/*
+ * Ethernet Address Resolution Protocol.
+ *
+ * See RFC 826 for protocol description. Structure below is adapted
+ * to resolving internet addresses. Field names used correspond to
+ * RFC 826.
+ */
+struct ether_arp {
+ struct arphdr ea_hdr; /* fixed-size header */
+ u_char arp_sha[6]; /* sender hardware address */
+ u_char arp_spa[4]; /* sender protocol address */
+ u_char arp_tha[6]; /* target hardware address */
+ u_char arp_tpa[4]; /* target protocol address */
+};
+#define arp_hrd ea_hdr.ar_hrd
+#define arp_pro ea_hdr.ar_pro
+#define arp_hln ea_hdr.ar_hln
+#define arp_pln ea_hdr.ar_pln
+#define arp_op ea_hdr.ar_op
--- /dev/null
+/*
+ * Copyright (c) 1982, 1986, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#)ip_var.h 8.2 (Berkeley) 1/9/95
+ */
+
+#include <endian.h>
+
+/*
+ * Overlay for ip header used by other protocols (tcp, udp).
+ */
+struct ipovly {
+ caddr_t ih_next, ih_prev; /* for protocol sequence q's */
+ u_char ih_x1; /* (unused) */
+ u_char ih_pr; /* protocol */
+ short ih_len; /* protocol length */
+ struct in_addr ih_src; /* source internet address */
+ struct in_addr ih_dst; /* destination internet address */
+};
+
+/*
+ * Ip reassembly queue structure. Each fragment
+ * being reassembled is attached to one of these structures.
+ * They are timed out after ipq_ttl drops to 0, and may also
+ * be reclaimed if memory becomes tight.
+ */
+struct ipq {
+ struct ipq *next,*prev; /* to other reass headers */
+ u_char ipq_ttl; /* time for reass q to live */
+ u_char ipq_p; /* protocol of this fragment */
+ u_short ipq_id; /* sequence id for reassembly */
+ struct ipasfrag *ipq_next,*ipq_prev;
+ /* to ip headers of fragments */
+ struct in_addr ipq_src,ipq_dst;
+};
+
+/*
+ * Ip header, when holding a fragment.
+ *
+ * Note: ipf_next must be at same offset as ipq_next above
+ */
+struct ipasfrag {
+#if BYTE_ORDER == LITTLE_ENDIAN
+ u_char ip_hl:4,
+ ip_v:4;
+#endif
+#if BYTE_ORDER == BIG_ENDIAN
+ u_char ip_v:4,
+ ip_hl:4;
+#endif
+ u_char ipf_mff; /* XXX overlays ip_tos: use low bit
+ * to avoid destroying tos;
+ * copied from (ip_off&IP_MF) */
+ short ip_len;
+ u_short ip_id;
+ short ip_off;
+ u_char ip_ttl;
+ u_char ip_p;
+ u_short ip_sum;
+ struct ipasfrag *ipf_next; /* next fragment */
+ struct ipasfrag *ipf_prev; /* previous fragment */
+};
+
+/*
+ * Structure stored in mbuf in inpcb.ip_options
+ * and passed to ip_output when ip options are in use.
+ * The actual length of the options (including ipopt_dst)
+ * is in m_len.
+ */
+#define MAX_IPOPTLEN 40
+
+struct ipoption {
+ struct in_addr ipopt_dst; /* first-hop dst if source routed */
+ char ipopt_list[MAX_IPOPTLEN]; /* options proper */
+};
+
+struct ipstat {
+ n_long ips_total; /* total packets received */
+ n_long ips_badsum; /* checksum bad */
+ n_long ips_tooshort; /* packet too short */
+ n_long ips_toosmall; /* not enough data */
+ n_long ips_badhlen; /* ip header length < data size */
+ n_long ips_badlen; /* ip length < ip header length */
+ n_long ips_fragments; /* fragments received */
+ n_long ips_fragdropped; /* frags dropped (dups, out of space) */
+ n_long ips_fragtimeout; /* fragments timed out */
+ n_long ips_forward; /* packets forwarded */
+ n_long ips_cantforward; /* packets rcvd for unreachable dest */
+ n_long ips_redirectsent; /* packets forwarded on same net */
+ n_long ips_noproto; /* unknown or unsupported protocol */
+ n_long ips_delivered; /* datagrams delivered to upper level*/
+ n_long ips_localout; /* total ip packets generated here */
+ n_long ips_odropped; /* lost packets due to nobufs, etc. */
+ n_long ips_reassembled; /* total packets reassembled ok */
+ n_long ips_fragmented; /* datagrams sucessfully fragmented */
+ n_long ips_ofragments; /* output fragments created */
+ n_long ips_cantfrag; /* don't fragment flag was set, etc. */
+ n_long ips_badoptions; /* error in option processing */
+ n_long ips_noroute; /* packets discarded due to no route */
+ n_long ips_badvers; /* ip version != 4 */
+ n_long ips_rawout; /* total raw ip packets generated */
+};
+
+#ifdef KERNEL
+/* flags passed to ip_output as last parameter */
+#define IP_FORWARDING 0x1 /* most of ip header exists */
+#define IP_RAWOUTPUT 0x2 /* raw ip header exists */
+#define IP_ROUTETOIF SO_DONTROUTE /* bypass routing tables */
+#define IP_ALLOWBROADCAST SO_BROADCAST /* can send broadcast packets */
+
+struct ipstat ipstat;
+struct ipq ipq; /* ip reass. queue */
+u_short ip_id; /* ip packet ctr, for ids */
+int ip_defttl; /* default IP ttl */
+
+int in_control __P((struct socket *, n_long, caddr_t, struct ifnet *));
+int ip_ctloutput __P((int, struct socket *, int, int, struct mbuf **));
+void ip_deq __P((struct ipasfrag *));
+int ip_dooptions __P((struct mbuf *));
+void ip_drain __P((void));
+void ip_enq __P((struct ipasfrag *, struct ipasfrag *));
+void ip_forward __P((struct mbuf *, int));
+void ip_freef __P((struct ipq *));
+void ip_freemoptions __P((struct ip_moptions *));
+int ip_getmoptions __P((int, struct ip_moptions *, struct mbuf **));
+void ip_init __P((void));
+int ip_mforward __P((struct mbuf *, struct ifnet *));
+int ip_optcopy __P((struct ip *, struct ip *));
+int ip_output __P((struct mbuf *,
+ struct mbuf *, struct route *, int, struct ip_moptions *));
+int ip_pcbopts __P((struct mbuf **, struct mbuf *));
+struct ip *
+ ip_reass __P((struct ipasfrag *, struct ipq *));
+struct in_ifaddr *
+ ip_rtaddr __P((struct in_addr));
+int ip_setmoptions __P((int, struct ip_moptions **, struct mbuf *));
+void ip_slowtimo __P((void));
+struct mbuf *
+ ip_srcroute __P((void));
+void ip_stripoptions __P((struct mbuf *, struct mbuf *));
+int ip_sysctl __P((int *, n_long, void *, size_t *, void *, size_t));
+void ipintr __P((void));
+int rip_ctloutput __P((int, struct socket *, int, int, struct mbuf **));
+void rip_init __P((void));
+void rip_input __P((struct mbuf *));
+int rip_output __P((struct mbuf *, struct socket *, n_long));
+int rip_usrreq __P((struct socket *,
+ int, struct mbuf *, struct mbuf *, struct mbuf *));
+#endif
--- /dev/null
+#!/bin/sh -
+#
+# Copyright (c) 1994, 1996
+# The Regents of the University of California. All rights reserved.
+#
+# Redistribution and use in source and binary forms are permitted
+# provided that this notice is preserved and that due credit is given
+# to the University of California at Berkeley. The name of the University
+# may not be used to endorse or promote products derived from this
+# software without specific prior written permission. This software
+# is provided ``as is'' without express or implied warranty.
+#
+# @(#)mkdep.sh 5.11 (Berkeley) 5/5/88
+#
+
+PATH=/bin:/usr/bin:/usr/ucb:/usr/local:/usr/local/bin
+export PATH
+
+MAKE=Makefile # default makefile name is "Makefile"
+CC=cc # default C compiler is "cc"
+
+while :
+ do case "$1" in
+ # -c allows you to specify the C compiler
+ -c)
+ CC=$2
+ shift; shift ;;
+
+ # -f allows you to select a makefile name
+ -f)
+ MAKE=$2
+ shift; shift ;;
+
+ # the -p flag produces "program: program.c" style dependencies
+ # so .o's don't get produced
+ -p)
+ SED='s;\.o;;'
+ shift ;;
+ *)
+ break ;;
+ esac
+done
+
+if [ $# = 0 ] ; then
+ echo 'usage: mkdep [-p] [-c cc] [-f makefile] [flags] file ...'
+ exit 1
+fi
+
+if [ ! -w $MAKE ]; then
+ echo "mkdep: no writeable file \"$MAKE\""
+ exit 1
+fi
+
+TMP=/tmp/mkdep$$
+
+trap 'rm -f $TMP ; exit 1' 1 2 3 13 15
+
+cp $MAKE ${MAKE}.bak
+
+sed -e '/DO NOT DELETE THIS LINE/,$d' < $MAKE > $TMP
+
+cat << _EOF_ >> $TMP
+# DO NOT DELETE THIS LINE -- mkdep uses it.
+# DO NOT PUT ANYTHING AFTER THIS LINE, IT WILL GO AWAY.
+
+_EOF_
+
+# If your compiler doesn't have -M, add it. If you can't, the next two
+# lines will try and replace the "cc -M". The real problem is that this
+# hack can't deal with anything that requires a search path, and doesn't
+# even try for anything using bracket (<>) syntax.
+#
+# egrep '^#include[ ]*".*"' /dev/null $* |
+# sed -e 's/:[^"]*"\([^"]*\)".*/: \1/' -e 's/\.c/.o/' |
+
+# XXX this doesn't work with things like "-DDECLWAITSTATUS=union\ wait"
+$CC -M $* |
+sed "
+ s; \./; ;g
+ $SED" |
+awk '{
+ if ($1 != prev) {
+ if (rec != "")
+ print rec;
+ rec = $0;
+ prev = $1;
+ }
+ else {
+ if (length(rec $2) > 78) {
+ print rec;
+ rec = $0;
+ }
+ else
+ rec = rec " " $2
+ }
+}
+END {
+ print rec
+}' >> $TMP
+
+cat << _EOF_ >> $TMP
+
+# IF YOU PUT ANYTHING HERE IT WILL GO AWAY
+_EOF_
+
+# copy to preserve permissions
+cp $TMP $MAKE
+rm -f ${MAKE}.bak $TMP
+exit 0
--- /dev/null
+/*
+ * Copyright (c) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ * Name to id translation routines used by the scanner.
+ * These functions are not time critical.
+ */
+
+#ifndef lint
+static const char rcsid[] =
+ "@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/nametoaddr.c,v 1.1 1999/08/26 10:05:23 johana Exp $ (LBL)";
+#endif
+
+#include <sys/param.h>
+#include <sys/types.h> /* concession to AIX */
+#include <sys/socket.h>
+#include <sys/time.h>
+
+#if __STDC__
+struct mbuf;
+struct rtentry;
+#endif
+
+#include <net/if.h>
+#include <netinet/in.h>
+#include <netinet/if_ether.h>
+#include <arpa/inet.h>
+
+#include <ctype.h>
+#include <errno.h>
+#include <stdlib.h>
+#include <memory.h>
+#include <netdb.h>
+#include <stdio.h>
+
+#include "pcap-int.h"
+
+#include "gencode.h"
+#include <pcap-namedb.h>
+
+#include "gnuc.h"
+#ifdef HAVE_OS_PROTO_H
+#include "os-proto.h"
+#endif
+
+#ifndef NTOHL
+#define NTOHL(x) (x) = ntohl(x)
+#define NTOHS(x) (x) = ntohs(x)
+#endif
+
+static inline int xdtoi(int);
+
+/*
+ * Convert host name to internet address.
+ * Return 0 upon failure.
+ */
+bpf_u_int32 **
+pcap_nametoaddr(const char *name)
+{
+#ifndef h_addr
+ static bpf_u_int32 *hlist[2];
+#endif
+ bpf_u_int32 **p;
+ struct hostent *hp;
+
+ if ((hp = gethostbyname(name)) != NULL) {
+#ifndef h_addr
+ hlist[0] = (bpf_u_int32 *)hp->h_addr;
+ NTOHL(hp->h_addr);
+ return hlist;
+#else
+ for (p = (bpf_u_int32 **)hp->h_addr_list; *p; ++p)
+ NTOHL(**p);
+ return (bpf_u_int32 **)hp->h_addr_list;
+#endif
+ }
+ else
+ return 0;
+}
+
+/*
+ * Convert net name to internet address.
+ * Return 0 upon failure.
+ */
+bpf_u_int32
+pcap_nametonetaddr(const char *name)
+{
+ struct netent *np;
+
+ if ((np = getnetbyname(name)) != NULL)
+ return np->n_net;
+ else
+ return 0;
+}
+
+/*
+ * Convert a port name to its port and protocol numbers.
+ * We assume only TCP or UDP.
+ * Return 0 upon failure.
+ */
+int
+pcap_nametoport(const char *name, int *port, int *proto)
+{
+ struct servent *sp;
+ char *other;
+
+ sp = getservbyname(name, (char *)0);
+ if (sp != NULL) {
+ NTOHS(sp->s_port);
+ *port = sp->s_port;
+ *proto = pcap_nametoproto(sp->s_proto);
+ /*
+ * We need to check /etc/services for ambiguous entries.
+ * If we find the ambiguous entry, and it has the
+ * same port number, change the proto to PROTO_UNDEF
+ * so both TCP and UDP will be checked.
+ */
+ if (*proto == IPPROTO_TCP)
+ other = "udp";
+ else
+ other = "tcp";
+
+ sp = getservbyname(name, other);
+ if (sp != 0) {
+ NTOHS(sp->s_port);
+#ifdef notdef
+ if (*port != sp->s_port)
+ /* Can't handle ambiguous names that refer
+ to different port numbers. */
+ warning("ambiguous port %s in /etc/services",
+ name);
+#endif
+ *proto = PROTO_UNDEF;
+ }
+ return 1;
+ }
+#if defined(ultrix) || defined(__osf__)
+ /* Special hack in case NFS isn't in /etc/services */
+ if (strcmp(name, "nfs") == 0) {
+ *port = 2049;
+ *proto = PROTO_UNDEF;
+ return 1;
+ }
+#endif
+ return 0;
+}
+
+int
+pcap_nametoproto(const char *str)
+{
+ struct protoent *p;
+
+ p = getprotobyname(str);
+ if (p != 0)
+ return p->p_proto;
+ else
+ return PROTO_UNDEF;
+}
+
+#include "ethertype.h"
+
+struct eproto {
+ char *s;
+ u_short p;
+};
+
+/* Static data base of ether protocol types. */
+struct eproto eproto_db[] = {
+ { "pup", ETHERTYPE_PUP },
+ { "xns", ETHERTYPE_NS },
+ { "ip", ETHERTYPE_IP },
+ { "arp", ETHERTYPE_ARP },
+ { "rarp", ETHERTYPE_REVARP },
+ { "sprite", ETHERTYPE_SPRITE },
+ { "mopdl", ETHERTYPE_MOPDL },
+ { "moprc", ETHERTYPE_MOPRC },
+ { "decnet", ETHERTYPE_DN },
+ { "lat", ETHERTYPE_LAT },
+ { "sca", ETHERTYPE_SCA },
+ { "lanbridge", ETHERTYPE_LANBRIDGE },
+ { "vexp", ETHERTYPE_VEXP },
+ { "vprod", ETHERTYPE_VPROD },
+ { "atalk", ETHERTYPE_ATALK },
+ { "atalkarp", ETHERTYPE_AARP },
+ { "loopback", ETHERTYPE_LOOPBACK },
+ { "decdts", ETHERTYPE_DECDTS },
+ { "decdns", ETHERTYPE_DECDNS },
+ { (char *)0, 0 }
+};
+
+int
+pcap_nametoeproto(const char *s)
+{
+ struct eproto *p = eproto_db;
+
+ while (p->s != 0) {
+ if (strcmp(p->s, s) == 0)
+ return p->p;
+ p += 1;
+ }
+ return PROTO_UNDEF;
+}
+
+/* Hex digit to integer. */
+static inline int
+xdtoi(c)
+ register int c;
+{
+ if (isdigit(c))
+ return c - '0';
+ else if (islower(c))
+ return c - 'a' + 10;
+ else
+ return c - 'A' + 10;
+}
+
+int
+__pcap_atoin(const char *s, bpf_u_int32 *addr)
+{
+ u_int n;
+ int len;
+
+ *addr = 0;
+ len = 0;
+ while (1) {
+ n = 0;
+ while (*s && *s != '.')
+ n = n * 10 + *s++ - '0';
+ *addr <<= 8;
+ *addr |= n & 0xff;
+ len += 8;
+ if (*s == '\0')
+ return len;
+ ++s;
+ }
+ /* NOTREACHED */
+}
+
+int
+__pcap_atodn(const char *s, bpf_u_int32 *addr)
+{
+#define AREASHIFT 10
+#define AREAMASK 0176000
+#define NODEMASK 01777
+
+ u_int node, area;
+
+ if (sscanf((char *)s, "%d.%d", &area, &node) != 2)
+ bpf_error("malformed decnet address '%s'", s);
+
+ *addr = (area << AREASHIFT) & AREAMASK;
+ *addr |= (node & NODEMASK);
+
+ return(32);
+}
+
+/*
+ * Convert 's' which has the form "xx:xx:xx:xx:xx:xx" into a new
+ * ethernet address. Assumes 's' is well formed.
+ */
+u_char *
+pcap_ether_aton(const char *s)
+{
+ register u_char *ep, *e;
+ register u_int d;
+
+ e = ep = (u_char *)malloc(6);
+
+ while (*s) {
+ if (*s == ':')
+ s += 1;
+ d = xdtoi(*s++);
+ if (isxdigit(*s)) {
+ d <<= 4;
+ d |= xdtoi(*s++);
+ }
+ *ep++ = d;
+ }
+
+ return (e);
+}
+
+#ifndef HAVE_ETHER_HOSTTON
+/* Roll our own */
+u_char *
+pcap_ether_hostton(const char *name)
+{
+ register struct pcap_etherent *ep;
+ register u_char *ap;
+ static FILE *fp = NULL;
+ static init = 0;
+
+ if (!init) {
+ fp = fopen(PCAP_ETHERS_FILE, "r");
+ ++init;
+ if (fp == NULL)
+ return (NULL);
+ } else if (fp == NULL)
+ return (NULL);
+ else
+ rewind(fp);
+
+ while ((ep = pcap_next_etherent(fp)) != NULL) {
+ if (strcmp(ep->name, name) == 0) {
+ ap = (u_char *)malloc(6);
+ if (ap != NULL) {
+ memcpy(ap, ep->addr, 6);
+ return (ap);
+ }
+ break;
+ }
+ }
+ return (NULL);
+}
+#else
+
+#ifndef sgi
+extern int ether_hostton(char *, struct ether_addr *);
+#endif
+
+/* Use the os supplied routines */
+u_char *
+pcap_ether_hostton(const char *name)
+{
+ register u_char *ap;
+ u_char a[6];
+
+ ap = NULL;
+ if (ether_hostton((char *)name, (struct ether_addr *)a) == 0) {
+ ap = (u_char *)malloc(6);
+ if (ap != NULL)
+ memcpy((char *)ap, (char *)a, 6);
+ }
+ return (ap);
+}
+#endif
+
+u_short
+__pcap_nametodnaddr(const char *name)
+{
+#ifdef DECNETLIB
+ struct nodeent *getnodebyname();
+ struct nodeent *nep;
+ unsigned short res;
+
+ nep = getnodebyname(name);
+ if (nep == ((struct nodeent *)0))
+ bpf_error("unknown decnet host name '%s'\n", name);
+
+ memcpy((char *)&res, (char *)nep->n_addr, sizeof(unsigned short));
+ return(res);
+#else
+ bpf_error("decnet name support not included, '%s' cannot be translated\n",
+ name);
+#endif
+}
--- /dev/null
+bpf/net
\ No newline at end of file
--- /dev/null
+/*
+ * Copyright (c) 1988, 1989, 1990, 1991, 1993, 1994, 1995, 1996
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ * Optimization module for tcpdump intermediate representation.
+ */
+#ifndef lint
+static const char rcsid[] =
+ "@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/optimize.c,v 1.1 1999/08/26 10:05:23 johana Exp $ (LBL)";
+#endif
+
+#include <sys/types.h>
+#include <sys/time.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <memory.h>
+
+#include "pcap-int.h"
+
+#include "gencode.h"
+
+#include "gnuc.h"
+#ifdef HAVE_OS_PROTO_H
+#include "os-proto.h"
+#endif
+
+#ifdef BDEBUG
+extern int dflag;
+#endif
+
+#define A_ATOM BPF_MEMWORDS
+#define X_ATOM (BPF_MEMWORDS+1)
+
+#define NOP -1
+
+/*
+ * This define is used to represent *both* the accumulator and
+ * x register in use-def computations.
+ * Currently, the use-def code assumes only one definition per instruction.
+ */
+#define AX_ATOM N_ATOMS
+
+/*
+ * A flag to indicate that further optimization is needed.
+ * Iterative passes are continued until a given pass yields no
+ * branch movement.
+ */
+static int done;
+
+/*
+ * A block is marked if only if its mark equals the current mark.
+ * Rather than traverse the code array, marking each item, 'cur_mark' is
+ * incremented. This automatically makes each element unmarked.
+ */
+static int cur_mark;
+#define isMarked(p) ((p)->mark == cur_mark)
+#define unMarkAll() cur_mark += 1
+#define Mark(p) ((p)->mark = cur_mark)
+
+static void opt_init(struct block *);
+static void opt_cleanup(void);
+
+static void make_marks(struct block *);
+static void mark_code(struct block *);
+
+static void intern_blocks(struct block *);
+
+static int eq_slist(struct slist *, struct slist *);
+
+static void find_levels_r(struct block *);
+
+static void find_levels(struct block *);
+static void find_dom(struct block *);
+static void propedom(struct edge *);
+static void find_edom(struct block *);
+static void find_closure(struct block *);
+static int atomuse(struct stmt *);
+static int atomdef(struct stmt *);
+static void compute_local_ud(struct block *);
+static void find_ud(struct block *);
+static void init_val(void);
+static int F(int, int, int);
+static inline void vstore(struct stmt *, int *, int, int);
+static void opt_blk(struct block *, int);
+static int use_conflict(struct block *, struct block *);
+static void opt_j(struct edge *);
+static void or_pullup(struct block *);
+static void and_pullup(struct block *);
+static void opt_blks(struct block *, int);
+static inline void link_inedge(struct edge *, struct block *);
+static void find_inedges(struct block *);
+static void opt_root(struct block **);
+static void opt_loop(struct block *, int);
+static void fold_op(struct stmt *, int, int);
+static inline struct slist *this_op(struct slist *);
+static void opt_not(struct block *);
+static void opt_peep(struct block *);
+static void opt_stmt(struct stmt *, int[], int);
+static void deadstmt(struct stmt *, struct stmt *[]);
+static void opt_deadstores(struct block *);
+static void opt_blk(struct block *, int);
+static int use_conflict(struct block *, struct block *);
+static void opt_j(struct edge *);
+static struct block *fold_edge(struct block *, struct edge *);
+static inline int eq_blk(struct block *, struct block *);
+static int slength(struct slist *);
+static int count_blocks(struct block *);
+static void number_blks_r(struct block *);
+static int count_stmts(struct block *);
+static int convert_code_r(struct block *);
+#ifdef BDEBUG
+static void opt_dump(struct block *);
+#endif
+
+static int n_blocks;
+struct block **blocks;
+static int n_edges;
+struct edge **edges;
+
+/*
+ * A bit vector set representation of the dominators.
+ * We round up the set size to the next power of two.
+ */
+static int nodewords;
+static int edgewords;
+struct block **levels;
+bpf_u_int32 *space;
+#define BITS_PER_WORD (8*sizeof(bpf_u_int32))
+/*
+ * True if a is in uset {p}
+ */
+#define SET_MEMBER(p, a) \
+((p)[(unsigned)(a) / BITS_PER_WORD] & (1 << ((unsigned)(a) % BITS_PER_WORD)))
+
+/*
+ * Add 'a' to uset p.
+ */
+#define SET_INSERT(p, a) \
+(p)[(unsigned)(a) / BITS_PER_WORD] |= (1 << ((unsigned)(a) % BITS_PER_WORD))
+
+/*
+ * Delete 'a' from uset p.
+ */
+#define SET_DELETE(p, a) \
+(p)[(unsigned)(a) / BITS_PER_WORD] &= ~(1 << ((unsigned)(a) % BITS_PER_WORD))
+
+/*
+ * a := a intersect b
+ */
+#define SET_INTERSECT(a, b, n)\
+{\
+ register bpf_u_int32 *_x = a, *_y = b;\
+ register int _n = n;\
+ while (--_n >= 0) *_x++ &= *_y++;\
+}
+
+/*
+ * a := a - b
+ */
+#define SET_SUBTRACT(a, b, n)\
+{\
+ register bpf_u_int32 *_x = a, *_y = b;\
+ register int _n = n;\
+ while (--_n >= 0) *_x++ &=~ *_y++;\
+}
+
+/*
+ * a := a union b
+ */
+#define SET_UNION(a, b, n)\
+{\
+ register bpf_u_int32 *_x = a, *_y = b;\
+ register int _n = n;\
+ while (--_n >= 0) *_x++ |= *_y++;\
+}
+
+static uset all_dom_sets;
+static uset all_closure_sets;
+static uset all_edge_sets;
+
+#ifndef MAX
+#define MAX(a,b) ((a)>(b)?(a):(b))
+#endif
+
+static void
+find_levels_r(b)
+ struct block *b;
+{
+ int level;
+
+ if (isMarked(b))
+ return;
+
+ Mark(b);
+ b->link = 0;
+
+ if (JT(b)) {
+ find_levels_r(JT(b));
+ find_levels_r(JF(b));
+ level = MAX(JT(b)->level, JF(b)->level) + 1;
+ } else
+ level = 0;
+ b->level = level;
+ b->link = levels[level];
+ levels[level] = b;
+}
+
+/*
+ * Level graph. The levels go from 0 at the leaves to
+ * N_LEVELS at the root. The levels[] array points to the
+ * first node of the level list, whose elements are linked
+ * with the 'link' field of the struct block.
+ */
+static void
+find_levels(root)
+ struct block *root;
+{
+ memset((char *)levels, 0, n_blocks * sizeof(*levels));
+ unMarkAll();
+ find_levels_r(root);
+}
+
+/*
+ * Find dominator relationships.
+ * Assumes graph has been leveled.
+ */
+static void
+find_dom(root)
+ struct block *root;
+{
+ int i;
+ struct block *b;
+ bpf_u_int32 *x;
+
+ /*
+ * Initialize sets to contain all nodes.
+ */
+ x = all_dom_sets;
+ i = n_blocks * nodewords;
+ while (--i >= 0)
+ *x++ = ~0;
+ /* Root starts off empty. */
+ for (i = nodewords; --i >= 0;)
+ root->dom[i] = 0;
+
+ /* root->level is the highest level no found. */
+ for (i = root->level; i >= 0; --i) {
+ for (b = levels[i]; b; b = b->link) {
+ SET_INSERT(b->dom, b->id);
+ if (JT(b) == 0)
+ continue;
+ SET_INTERSECT(JT(b)->dom, b->dom, nodewords);
+ SET_INTERSECT(JF(b)->dom, b->dom, nodewords);
+ }
+ }
+}
+
+static void
+propedom(ep)
+ struct edge *ep;
+{
+ SET_INSERT(ep->edom, ep->id);
+ if (ep->succ) {
+ SET_INTERSECT(ep->succ->et.edom, ep->edom, edgewords);
+ SET_INTERSECT(ep->succ->ef.edom, ep->edom, edgewords);
+ }
+}
+
+/*
+ * Compute edge dominators.
+ * Assumes graph has been leveled and predecessors established.
+ */
+static void
+find_edom(root)
+ struct block *root;
+{
+ int i;
+ uset x;
+ struct block *b;
+
+ x = all_edge_sets;
+ for (i = n_edges * edgewords; --i >= 0; )
+ x[i] = ~0;
+
+ /* root->level is the highest level no found. */
+ memset(root->et.edom, 0, edgewords * sizeof(*(uset)0));
+ memset(root->ef.edom, 0, edgewords * sizeof(*(uset)0));
+ for (i = root->level; i >= 0; --i) {
+ for (b = levels[i]; b != 0; b = b->link) {
+ propedom(&b->et);
+ propedom(&b->ef);
+ }
+ }
+}
+
+/*
+ * Find the backwards transitive closure of the flow graph. These sets
+ * are backwards in the sense that we find the set of nodes that reach
+ * a given node, not the set of nodes that can be reached by a node.
+ *
+ * Assumes graph has been leveled.
+ */
+static void
+find_closure(root)
+ struct block *root;
+{
+ int i;
+ struct block *b;
+
+ /*
+ * Initialize sets to contain no nodes.
+ */
+ memset((char *)all_closure_sets, 0,
+ n_blocks * nodewords * sizeof(*all_closure_sets));
+
+ /* root->level is the highest level no found. */
+ for (i = root->level; i >= 0; --i) {
+ for (b = levels[i]; b; b = b->link) {
+ SET_INSERT(b->closure, b->id);
+ if (JT(b) == 0)
+ continue;
+ SET_UNION(JT(b)->closure, b->closure, nodewords);
+ SET_UNION(JF(b)->closure, b->closure, nodewords);
+ }
+ }
+}
+
+/*
+ * Return the register number that is used by s. If A and X are both
+ * used, return AX_ATOM. If no register is used, return -1.
+ *
+ * The implementation should probably change to an array access.
+ */
+static int
+atomuse(s)
+ struct stmt *s;
+{
+ register int c = s->code;
+
+ if (c == NOP)
+ return -1;
+
+ switch (BPF_CLASS(c)) {
+
+ case BPF_RET:
+ return (BPF_RVAL(c) == BPF_A) ? A_ATOM :
+ (BPF_RVAL(c) == BPF_X) ? X_ATOM : -1;
+
+ case BPF_LD:
+ case BPF_LDX:
+ return (BPF_MODE(c) == BPF_IND) ? X_ATOM :
+ (BPF_MODE(c) == BPF_MEM) ? s->k : -1;
+
+ case BPF_ST:
+ return A_ATOM;
+
+ case BPF_STX:
+ return X_ATOM;
+
+ case BPF_JMP:
+ case BPF_ALU:
+ if (BPF_SRC(c) == BPF_X)
+ return AX_ATOM;
+ return A_ATOM;
+
+ case BPF_MISC:
+ return BPF_MISCOP(c) == BPF_TXA ? X_ATOM : A_ATOM;
+ }
+ abort();
+ /* NOTREACHED */
+}
+
+/*
+ * Return the register number that is defined by 's'. We assume that
+ * a single stmt cannot define more than one register. If no register
+ * is defined, return -1.
+ *
+ * The implementation should probably change to an array access.
+ */
+static int
+atomdef(s)
+ struct stmt *s;
+{
+ if (s->code == NOP)
+ return -1;
+
+ switch (BPF_CLASS(s->code)) {
+
+ case BPF_LD:
+ case BPF_ALU:
+ return A_ATOM;
+
+ case BPF_LDX:
+ return X_ATOM;
+
+ case BPF_ST:
+ case BPF_STX:
+ return s->k;
+
+ case BPF_MISC:
+ return BPF_MISCOP(s->code) == BPF_TAX ? X_ATOM : A_ATOM;
+ }
+ return -1;
+}
+
+static void
+compute_local_ud(b)
+ struct block *b;
+{
+ struct slist *s;
+ atomset def = 0, use = 0, kill = 0;
+ int atom;
+
+ for (s = b->stmts; s; s = s->next) {
+ if (s->s.code == NOP)
+ continue;
+ atom = atomuse(&s->s);
+ if (atom >= 0) {
+ if (atom == AX_ATOM) {
+ if (!ATOMELEM(def, X_ATOM))
+ use |= ATOMMASK(X_ATOM);
+ if (!ATOMELEM(def, A_ATOM))
+ use |= ATOMMASK(A_ATOM);
+ }
+ else if (atom < N_ATOMS) {
+ if (!ATOMELEM(def, atom))
+ use |= ATOMMASK(atom);
+ }
+ else
+ abort();
+ }
+ atom = atomdef(&s->s);
+ if (atom >= 0) {
+ if (!ATOMELEM(use, atom))
+ kill |= ATOMMASK(atom);
+ def |= ATOMMASK(atom);
+ }
+ }
+ if (!ATOMELEM(def, A_ATOM) && BPF_CLASS(b->s.code) == BPF_JMP)
+ use |= ATOMMASK(A_ATOM);
+
+ b->def = def;
+ b->kill = kill;
+ b->in_use = use;
+}
+
+/*
+ * Assume graph is already leveled.
+ */
+static void
+find_ud(root)
+ struct block *root;
+{
+ int i, maxlevel;
+ struct block *p;
+
+ /*
+ * root->level is the highest level no found;
+ * count down from there.
+ */
+ maxlevel = root->level;
+ for (i = maxlevel; i >= 0; --i)
+ for (p = levels[i]; p; p = p->link) {
+ compute_local_ud(p);
+ p->out_use = 0;
+ }
+
+ for (i = 1; i <= maxlevel; ++i) {
+ for (p = levels[i]; p; p = p->link) {
+ p->out_use |= JT(p)->in_use | JF(p)->in_use;
+ p->in_use |= p->out_use &~ p->kill;
+ }
+ }
+}
+
+/*
+ * These data structures are used in a Cocke and Shwarz style
+ * value numbering scheme. Since the flowgraph is acyclic,
+ * exit values can be propagated from a node's predecessors
+ * provided it is uniquely defined.
+ */
+struct valnode {
+ int code;
+ int v0, v1;
+ int val;
+ struct valnode *next;
+};
+
+#define MODULUS 213
+static struct valnode *hashtbl[MODULUS];
+static int curval;
+static int maxval;
+
+/* Integer constants mapped with the load immediate opcode. */
+#define K(i) F(BPF_LD|BPF_IMM|BPF_W, i, 0L)
+
+struct vmapinfo {
+ int is_const;
+ bpf_int32 const_val;
+};
+
+struct vmapinfo *vmap;
+struct valnode *vnode_base;
+struct valnode *next_vnode;
+
+static void
+init_val()
+{
+ curval = 0;
+ next_vnode = vnode_base;
+ memset((char *)vmap, 0, maxval * sizeof(*vmap));
+ memset((char *)hashtbl, 0, sizeof hashtbl);
+}
+
+/* Because we really don't have an IR, this stuff is a little messy. */
+static int
+F(code, v0, v1)
+ int code;
+ int v0, v1;
+{
+ u_int hash;
+ int val;
+ struct valnode *p;
+
+ hash = (u_int)code ^ (v0 << 4) ^ (v1 << 8);
+ hash %= MODULUS;
+
+ for (p = hashtbl[hash]; p; p = p->next)
+ if (p->code == code && p->v0 == v0 && p->v1 == v1)
+ return p->val;
+
+ val = ++curval;
+ if (BPF_MODE(code) == BPF_IMM &&
+ (BPF_CLASS(code) == BPF_LD || BPF_CLASS(code) == BPF_LDX)) {
+ vmap[val].const_val = v0;
+ vmap[val].is_const = 1;
+ }
+ p = next_vnode++;
+ p->val = val;
+ p->code = code;
+ p->v0 = v0;
+ p->v1 = v1;
+ p->next = hashtbl[hash];
+ hashtbl[hash] = p;
+
+ return val;
+}
+
+static inline void
+vstore(s, valp, newval, alter)
+ struct stmt *s;
+ int *valp;
+ int newval;
+ int alter;
+{
+ if (alter && *valp == newval)
+ s->code = NOP;
+ else
+ *valp = newval;
+}
+
+static void
+fold_op(s, v0, v1)
+ struct stmt *s;
+ int v0, v1;
+{
+ bpf_int32 a, b;
+
+ a = vmap[v0].const_val;
+ b = vmap[v1].const_val;
+
+ switch (BPF_OP(s->code)) {
+ case BPF_ADD:
+ a += b;
+ break;
+
+ case BPF_SUB:
+ a -= b;
+ break;
+
+ case BPF_MUL:
+ a *= b;
+ break;
+
+ case BPF_DIV:
+ if (b == 0)
+ bpf_error("division by zero");
+ a /= b;
+ break;
+
+ case BPF_AND:
+ a &= b;
+ break;
+
+ case BPF_OR:
+ a |= b;
+ break;
+
+ case BPF_LSH:
+ a <<= b;
+ break;
+
+ case BPF_RSH:
+ a >>= b;
+ break;
+
+ case BPF_NEG:
+ a = -a;
+ break;
+
+ default:
+ abort();
+ }
+ s->k = a;
+ s->code = BPF_LD|BPF_IMM;
+ done = 0;
+}
+
+static inline struct slist *
+this_op(s)
+ struct slist *s;
+{
+ while (s != 0 && s->s.code == NOP)
+ s = s->next;
+ return s;
+}
+
+static void
+opt_not(b)
+ struct block *b;
+{
+ struct block *tmp = JT(b);
+
+ JT(b) = JF(b);
+ JF(b) = tmp;
+}
+
+static void
+opt_peep(b)
+ struct block *b;
+{
+ struct slist *s;
+ struct slist *next, *last;
+ int val;
+
+ s = b->stmts;
+ if (s == 0)
+ return;
+
+ last = s;
+ while (1) {
+ s = this_op(s);
+ if (s == 0)
+ break;
+ next = this_op(s->next);
+ if (next == 0)
+ break;
+ last = next;
+
+ /*
+ * st M[k] --> st M[k]
+ * ldx M[k] tax
+ */
+ if (s->s.code == BPF_ST &&
+ next->s.code == (BPF_LDX|BPF_MEM) &&
+ s->s.k == next->s.k) {
+ done = 0;
+ next->s.code = BPF_MISC|BPF_TAX;
+ }
+ /*
+ * ld #k --> ldx #k
+ * tax txa
+ */
+ if (s->s.code == (BPF_LD|BPF_IMM) &&
+ next->s.code == (BPF_MISC|BPF_TAX)) {
+ s->s.code = BPF_LDX|BPF_IMM;
+ next->s.code = BPF_MISC|BPF_TXA;
+ done = 0;
+ }
+ /*
+ * This is an ugly special case, but it happens
+ * when you say tcp[k] or udp[k] where k is a constant.
+ */
+ if (s->s.code == (BPF_LD|BPF_IMM)) {
+ struct slist *add, *tax, *ild;
+
+ /*
+ * Check that X isn't used on exit from this
+ * block (which the optimizer might cause).
+ * We know the code generator won't generate
+ * any local dependencies.
+ */
+ if (ATOMELEM(b->out_use, X_ATOM))
+ break;
+
+ if (next->s.code != (BPF_LDX|BPF_MSH|BPF_B))
+ add = next;
+ else
+ add = this_op(next->next);
+ if (add == 0 || add->s.code != (BPF_ALU|BPF_ADD|BPF_X))
+ break;
+
+ tax = this_op(add->next);
+ if (tax == 0 || tax->s.code != (BPF_MISC|BPF_TAX))
+ break;
+
+ ild = this_op(tax->next);
+ if (ild == 0 || BPF_CLASS(ild->s.code) != BPF_LD ||
+ BPF_MODE(ild->s.code) != BPF_IND)
+ break;
+ /*
+ * XXX We need to check that X is not
+ * subsequently used. We know we can eliminate the
+ * accumulator modifications since it is defined
+ * by the last stmt of this sequence.
+ *
+ * We want to turn this sequence:
+ *
+ * (004) ldi #0x2 {s}
+ * (005) ldxms [14] {next} -- optional
+ * (006) addx {add}
+ * (007) tax {tax}
+ * (008) ild [x+0] {ild}
+ *
+ * into this sequence:
+ *
+ * (004) nop
+ * (005) ldxms [14]
+ * (006) nop
+ * (007) nop
+ * (008) ild [x+2]
+ *
+ */
+ ild->s.k += s->s.k;
+ s->s.code = NOP;
+ add->s.code = NOP;
+ tax->s.code = NOP;
+ done = 0;
+ }
+ s = next;
+ }
+ /*
+ * If we have a subtract to do a comparison, and the X register
+ * is a known constant, we can merge this value into the
+ * comparison.
+ */
+ if (last->s.code == (BPF_ALU|BPF_SUB|BPF_X) &&
+ !ATOMELEM(b->out_use, A_ATOM)) {
+ val = b->val[X_ATOM];
+ if (vmap[val].is_const) {
+ int op;
+
+ b->s.k += vmap[val].const_val;
+ op = BPF_OP(b->s.code);
+ if (op == BPF_JGT || op == BPF_JGE) {
+ struct block *t = JT(b);
+ JT(b) = JF(b);
+ JF(b) = t;
+ b->s.k += 0x80000000;
+ }
+ last->s.code = NOP;
+ done = 0;
+ } else if (b->s.k == 0) {
+ /*
+ * sub x -> nop
+ * j #0 j x
+ */
+ last->s.code = NOP;
+ b->s.code = BPF_CLASS(b->s.code) | BPF_OP(b->s.code) |
+ BPF_X;
+ done = 0;
+ }
+ }
+ /*
+ * Likewise, a constant subtract can be simplified.
+ */
+ else if (last->s.code == (BPF_ALU|BPF_SUB|BPF_K) &&
+ !ATOMELEM(b->out_use, A_ATOM)) {
+ int op;
+
+ b->s.k += last->s.k;
+ last->s.code = NOP;
+ op = BPF_OP(b->s.code);
+ if (op == BPF_JGT || op == BPF_JGE) {
+ struct block *t = JT(b);
+ JT(b) = JF(b);
+ JF(b) = t;
+ b->s.k += 0x80000000;
+ }
+ done = 0;
+ }
+ /*
+ * and #k nop
+ * jeq #0 -> jset #k
+ */
+ if (last->s.code == (BPF_ALU|BPF_AND|BPF_K) &&
+ !ATOMELEM(b->out_use, A_ATOM) && b->s.k == 0) {
+ b->s.k = last->s.k;
+ b->s.code = BPF_JMP|BPF_K|BPF_JSET;
+ last->s.code = NOP;
+ done = 0;
+ opt_not(b);
+ }
+ /*
+ * If the accumulator is a known constant, we can compute the
+ * comparison result.
+ */
+ val = b->val[A_ATOM];
+ if (vmap[val].is_const && BPF_SRC(b->s.code) == BPF_K) {
+ bpf_int32 v = vmap[val].const_val;
+ switch (BPF_OP(b->s.code)) {
+
+ case BPF_JEQ:
+ v = v == b->s.k;
+ break;
+
+ case BPF_JGT:
+ v = (unsigned)v > b->s.k;
+ break;
+
+ case BPF_JGE:
+ v = (unsigned)v >= b->s.k;
+ break;
+
+ case BPF_JSET:
+ v &= b->s.k;
+ break;
+
+ default:
+ abort();
+ }
+ if (JF(b) != JT(b))
+ done = 0;
+ if (v)
+ JF(b) = JT(b);
+ else
+ JT(b) = JF(b);
+ }
+}
+
+/*
+ * Compute the symbolic value of expression of 's', and update
+ * anything it defines in the value table 'val'. If 'alter' is true,
+ * do various optimizations. This code would be cleaner if symbolic
+ * evaluation and code transformations weren't folded together.
+ */
+static void
+opt_stmt(s, val, alter)
+ struct stmt *s;
+ int val[];
+ int alter;
+{
+ int op;
+ int v;
+
+ switch (s->code) {
+
+ case BPF_LD|BPF_ABS|BPF_W:
+ case BPF_LD|BPF_ABS|BPF_H:
+ case BPF_LD|BPF_ABS|BPF_B:
+ v = F(s->code, s->k, 0L);
+ vstore(s, &val[A_ATOM], v, alter);
+ break;
+
+ case BPF_LD|BPF_IND|BPF_W:
+ case BPF_LD|BPF_IND|BPF_H:
+ case BPF_LD|BPF_IND|BPF_B:
+ v = val[X_ATOM];
+ if (alter && vmap[v].is_const) {
+ s->code = BPF_LD|BPF_ABS|BPF_SIZE(s->code);
+ s->k += vmap[v].const_val;
+ v = F(s->code, s->k, 0L);
+ done = 0;
+ }
+ else
+ v = F(s->code, s->k, v);
+ vstore(s, &val[A_ATOM], v, alter);
+ break;
+
+ case BPF_LD|BPF_LEN:
+ v = F(s->code, 0L, 0L);
+ vstore(s, &val[A_ATOM], v, alter);
+ break;
+
+ case BPF_LD|BPF_IMM:
+ v = K(s->k);
+ vstore(s, &val[A_ATOM], v, alter);
+ break;
+
+ case BPF_LDX|BPF_IMM:
+ v = K(s->k);
+ vstore(s, &val[X_ATOM], v, alter);
+ break;
+
+ case BPF_LDX|BPF_MSH|BPF_B:
+ v = F(s->code, s->k, 0L);
+ vstore(s, &val[X_ATOM], v, alter);
+ break;
+
+ case BPF_ALU|BPF_NEG:
+ if (alter && vmap[val[A_ATOM]].is_const) {
+ s->code = BPF_LD|BPF_IMM;
+ s->k = -vmap[val[A_ATOM]].const_val;
+ val[A_ATOM] = K(s->k);
+ }
+ else
+ val[A_ATOM] = F(s->code, val[A_ATOM], 0L);
+ break;
+
+ case BPF_ALU|BPF_ADD|BPF_K:
+ case BPF_ALU|BPF_SUB|BPF_K:
+ case BPF_ALU|BPF_MUL|BPF_K:
+ case BPF_ALU|BPF_DIV|BPF_K:
+ case BPF_ALU|BPF_AND|BPF_K:
+ case BPF_ALU|BPF_OR|BPF_K:
+ case BPF_ALU|BPF_LSH|BPF_K:
+ case BPF_ALU|BPF_RSH|BPF_K:
+ op = BPF_OP(s->code);
+ if (alter) {
+ if (s->k == 0) {
+ if (op == BPF_ADD || op == BPF_SUB ||
+ op == BPF_LSH || op == BPF_RSH ||
+ op == BPF_OR) {
+ s->code = NOP;
+ break;
+ }
+ if (op == BPF_MUL || op == BPF_AND) {
+ s->code = BPF_LD|BPF_IMM;
+ val[A_ATOM] = K(s->k);
+ break;
+ }
+ }
+ if (vmap[val[A_ATOM]].is_const) {
+ fold_op(s, val[A_ATOM], K(s->k));
+ val[A_ATOM] = K(s->k);
+ break;
+ }
+ }
+ val[A_ATOM] = F(s->code, val[A_ATOM], K(s->k));
+ break;
+
+ case BPF_ALU|BPF_ADD|BPF_X:
+ case BPF_ALU|BPF_SUB|BPF_X:
+ case BPF_ALU|BPF_MUL|BPF_X:
+ case BPF_ALU|BPF_DIV|BPF_X:
+ case BPF_ALU|BPF_AND|BPF_X:
+ case BPF_ALU|BPF_OR|BPF_X:
+ case BPF_ALU|BPF_LSH|BPF_X:
+ case BPF_ALU|BPF_RSH|BPF_X:
+ op = BPF_OP(s->code);
+ if (alter && vmap[val[X_ATOM]].is_const) {
+ if (vmap[val[A_ATOM]].is_const) {
+ fold_op(s, val[A_ATOM], val[X_ATOM]);
+ val[A_ATOM] = K(s->k);
+ }
+ else {
+ s->code = BPF_ALU|BPF_K|op;
+ s->k = vmap[val[X_ATOM]].const_val;
+ done = 0;
+ val[A_ATOM] =
+ F(s->code, val[A_ATOM], K(s->k));
+ }
+ break;
+ }
+ /*
+ * Check if we're doing something to an accumulator
+ * that is 0, and simplify. This may not seem like
+ * much of a simplification but it could open up further
+ * optimizations.
+ * XXX We could also check for mul by 1, and -1, etc.
+ */
+ if (alter && vmap[val[A_ATOM]].is_const
+ && vmap[val[A_ATOM]].const_val == 0) {
+ if (op == BPF_ADD || op == BPF_OR ||
+ op == BPF_LSH || op == BPF_RSH || op == BPF_SUB) {
+ s->code = BPF_MISC|BPF_TXA;
+ vstore(s, &val[A_ATOM], val[X_ATOM], alter);
+ break;
+ }
+ else if (op == BPF_MUL || op == BPF_DIV ||
+ op == BPF_AND) {
+ s->code = BPF_LD|BPF_IMM;
+ s->k = 0;
+ vstore(s, &val[A_ATOM], K(s->k), alter);
+ break;
+ }
+ else if (op == BPF_NEG) {
+ s->code = NOP;
+ break;
+ }
+ }
+ val[A_ATOM] = F(s->code, val[A_ATOM], val[X_ATOM]);
+ break;
+
+ case BPF_MISC|BPF_TXA:
+ vstore(s, &val[A_ATOM], val[X_ATOM], alter);
+ break;
+
+ case BPF_LD|BPF_MEM:
+ v = val[s->k];
+ if (alter && vmap[v].is_const) {
+ s->code = BPF_LD|BPF_IMM;
+ s->k = vmap[v].const_val;
+ done = 0;
+ }
+ vstore(s, &val[A_ATOM], v, alter);
+ break;
+
+ case BPF_MISC|BPF_TAX:
+ vstore(s, &val[X_ATOM], val[A_ATOM], alter);
+ break;
+
+ case BPF_LDX|BPF_MEM:
+ v = val[s->k];
+ if (alter && vmap[v].is_const) {
+ s->code = BPF_LDX|BPF_IMM;
+ s->k = vmap[v].const_val;
+ done = 0;
+ }
+ vstore(s, &val[X_ATOM], v, alter);
+ break;
+
+ case BPF_ST:
+ vstore(s, &val[s->k], val[A_ATOM], alter);
+ break;
+
+ case BPF_STX:
+ vstore(s, &val[s->k], val[X_ATOM], alter);
+ break;
+ }
+}
+
+static void
+deadstmt(s, last)
+ register struct stmt *s;
+ register struct stmt *last[];
+{
+ register int atom;
+
+ atom = atomuse(s);
+ if (atom >= 0) {
+ if (atom == AX_ATOM) {
+ last[X_ATOM] = 0;
+ last[A_ATOM] = 0;
+ }
+ else
+ last[atom] = 0;
+ }
+ atom = atomdef(s);
+ if (atom >= 0) {
+ if (last[atom]) {
+ done = 0;
+ last[atom]->code = NOP;
+ }
+ last[atom] = s;
+ }
+}
+
+static void
+opt_deadstores(b)
+ register struct block *b;
+{
+ register struct slist *s;
+ register int atom;
+ struct stmt *last[N_ATOMS];
+
+ memset((char *)last, 0, sizeof last);
+
+ for (s = b->stmts; s != 0; s = s->next)
+ deadstmt(&s->s, last);
+ deadstmt(&b->s, last);
+
+ for (atom = 0; atom < N_ATOMS; ++atom)
+ if (last[atom] && !ATOMELEM(b->out_use, atom)) {
+ last[atom]->code = NOP;
+ done = 0;
+ }
+}
+
+static void
+opt_blk(b, do_stmts)
+ struct block *b;
+ int do_stmts;
+{
+ struct slist *s;
+ struct edge *p;
+ int i;
+ bpf_int32 aval;
+
+ /*
+ * Initialize the atom values.
+ * If we have no predecessors, everything is undefined.
+ * Otherwise, we inherent our values from our predecessors.
+ * If any register has an ambiguous value (i.e. control paths are
+ * merging) give it the undefined value of 0.
+ */
+ p = b->in_edges;
+ if (p == 0)
+ memset((char *)b->val, 0, sizeof(b->val));
+ else {
+ memcpy((char *)b->val, (char *)p->pred->val, sizeof(b->val));
+ while ((p = p->next) != NULL) {
+ for (i = 0; i < N_ATOMS; ++i)
+ if (b->val[i] != p->pred->val[i])
+ b->val[i] = 0;
+ }
+ }
+ aval = b->val[A_ATOM];
+ for (s = b->stmts; s; s = s->next)
+ opt_stmt(&s->s, b->val, do_stmts);
+
+ /*
+ * This is a special case: if we don't use anything from this
+ * block, and we load the accumulator with value that is
+ * already there, or if this block is a return,
+ * eliminate all the statements.
+ */
+ if (do_stmts &&
+ ((b->out_use == 0 && aval != 0 &&b->val[A_ATOM] == aval) ||
+ BPF_CLASS(b->s.code) == BPF_RET)) {
+ if (b->stmts != 0) {
+ b->stmts = 0;
+ done = 0;
+ }
+ } else {
+ opt_peep(b);
+ opt_deadstores(b);
+ }
+ /*
+ * Set up values for branch optimizer.
+ */
+ if (BPF_SRC(b->s.code) == BPF_K)
+ b->oval = K(b->s.k);
+ else
+ b->oval = b->val[X_ATOM];
+ b->et.code = b->s.code;
+ b->ef.code = -b->s.code;
+}
+
+/*
+ * Return true if any register that is used on exit from 'succ', has
+ * an exit value that is different from the corresponding exit value
+ * from 'b'.
+ */
+static int
+use_conflict(b, succ)
+ struct block *b, *succ;
+{
+ int atom;
+ atomset use = succ->out_use;
+
+ if (use == 0)
+ return 0;
+
+ for (atom = 0; atom < N_ATOMS; ++atom)
+ if (ATOMELEM(use, atom))
+ if (b->val[atom] != succ->val[atom])
+ return 1;
+ return 0;
+}
+
+static struct block *
+fold_edge(child, ep)
+ struct block *child;
+ struct edge *ep;
+{
+ int sense;
+ int aval0, aval1, oval0, oval1;
+ int code = ep->code;
+
+ if (code < 0) {
+ code = -code;
+ sense = 0;
+ } else
+ sense = 1;
+
+ if (child->s.code != code)
+ return 0;
+
+ aval0 = child->val[A_ATOM];
+ oval0 = child->oval;
+ aval1 = ep->pred->val[A_ATOM];
+ oval1 = ep->pred->oval;
+
+ if (aval0 != aval1)
+ return 0;
+
+ if (oval0 == oval1)
+ /*
+ * The operands are identical, so the
+ * result is true if a true branch was
+ * taken to get here, otherwise false.
+ */
+ return sense ? JT(child) : JF(child);
+
+ if (sense && code == (BPF_JMP|BPF_JEQ|BPF_K))
+ /*
+ * At this point, we only know the comparison if we
+ * came down the true branch, and it was an equality
+ * comparison with a constant. We rely on the fact that
+ * distinct constants have distinct value numbers.
+ */
+ return JF(child);
+
+ return 0;
+}
+
+static void
+opt_j(ep)
+ struct edge *ep;
+{
+ register int i, k;
+ register struct block *target;
+
+ if (JT(ep->succ) == 0)
+ return;
+
+ if (JT(ep->succ) == JF(ep->succ)) {
+ /*
+ * Common branch targets can be eliminated, provided
+ * there is no data dependency.
+ */
+ if (!use_conflict(ep->pred, ep->succ->et.succ)) {
+ done = 0;
+ ep->succ = JT(ep->succ);
+ }
+ }
+ /*
+ * For each edge dominator that matches the successor of this
+ * edge, promote the edge successor to the its grandchild.
+ *
+ * XXX We violate the set abstraction here in favor a reasonably
+ * efficient loop.
+ */
+ top:
+ for (i = 0; i < edgewords; ++i) {
+ register bpf_u_int32 x = ep->edom[i];
+
+ while (x != 0) {
+ k = ffs(x) - 1;
+ x &=~ (1 << k);
+ k += i * BITS_PER_WORD;
+
+ target = fold_edge(ep->succ, edges[k]);
+ /*
+ * Check that there is no data dependency between
+ * nodes that will be violated if we move the edge.
+ */
+ if (target != 0 && !use_conflict(ep->pred, target)) {
+ done = 0;
+ ep->succ = target;
+ if (JT(target) != 0)
+ /*
+ * Start over unless we hit a leaf.
+ */
+ goto top;
+ return;
+ }
+ }
+ }
+}
+
+
+static void
+or_pullup(b)
+ struct block *b;
+{
+ int val, at_top;
+ struct block *pull;
+ struct block **diffp, **samep;
+ struct edge *ep;
+
+ ep = b->in_edges;
+ if (ep == 0)
+ return;
+
+ /*
+ * Make sure each predecessor loads the same value.
+ * XXX why?
+ */
+ val = ep->pred->val[A_ATOM];
+ for (ep = ep->next; ep != 0; ep = ep->next)
+ if (val != ep->pred->val[A_ATOM])
+ return;
+
+ if (JT(b->in_edges->pred) == b)
+ diffp = &JT(b->in_edges->pred);
+ else
+ diffp = &JF(b->in_edges->pred);
+
+ at_top = 1;
+ while (1) {
+ if (*diffp == 0)
+ return;
+
+ if (JT(*diffp) != JT(b))
+ return;
+
+ if (!SET_MEMBER((*diffp)->dom, b->id))
+ return;
+
+ if ((*diffp)->val[A_ATOM] != val)
+ break;
+
+ diffp = &JF(*diffp);
+ at_top = 0;
+ }
+ samep = &JF(*diffp);
+ while (1) {
+ if (*samep == 0)
+ return;
+
+ if (JT(*samep) != JT(b))
+ return;
+
+ if (!SET_MEMBER((*samep)->dom, b->id))
+ return;
+
+ if ((*samep)->val[A_ATOM] == val)
+ break;
+
+ /* XXX Need to check that there are no data dependencies
+ between dp0 and dp1. Currently, the code generator
+ will not produce such dependencies. */
+ samep = &JF(*samep);
+ }
+#ifdef notdef
+ /* XXX This doesn't cover everything. */
+ for (i = 0; i < N_ATOMS; ++i)
+ if ((*samep)->val[i] != pred->val[i])
+ return;
+#endif
+ /* Pull up the node. */
+ pull = *samep;
+ *samep = JF(pull);
+ JF(pull) = *diffp;
+
+ /*
+ * At the top of the chain, each predecessor needs to point at the
+ * pulled up node. Inside the chain, there is only one predecessor
+ * to worry about.
+ */
+ if (at_top) {
+ for (ep = b->in_edges; ep != 0; ep = ep->next) {
+ if (JT(ep->pred) == b)
+ JT(ep->pred) = pull;
+ else
+ JF(ep->pred) = pull;
+ }
+ }
+ else
+ *diffp = pull;
+
+ done = 0;
+}
+
+static void
+and_pullup(b)
+ struct block *b;
+{
+ int val, at_top;
+ struct block *pull;
+ struct block **diffp, **samep;
+ struct edge *ep;
+
+ ep = b->in_edges;
+ if (ep == 0)
+ return;
+
+ /*
+ * Make sure each predecessor loads the same value.
+ */
+ val = ep->pred->val[A_ATOM];
+ for (ep = ep->next; ep != 0; ep = ep->next)
+ if (val != ep->pred->val[A_ATOM])
+ return;
+
+ if (JT(b->in_edges->pred) == b)
+ diffp = &JT(b->in_edges->pred);
+ else
+ diffp = &JF(b->in_edges->pred);
+
+ at_top = 1;
+ while (1) {
+ if (*diffp == 0)
+ return;
+
+ if (JF(*diffp) != JF(b))
+ return;
+
+ if (!SET_MEMBER((*diffp)->dom, b->id))
+ return;
+
+ if ((*diffp)->val[A_ATOM] != val)
+ break;
+
+ diffp = &JT(*diffp);
+ at_top = 0;
+ }
+ samep = &JT(*diffp);
+ while (1) {
+ if (*samep == 0)
+ return;
+
+ if (JF(*samep) != JF(b))
+ return;
+
+ if (!SET_MEMBER((*samep)->dom, b->id))
+ return;
+
+ if ((*samep)->val[A_ATOM] == val)
+ break;
+
+ /* XXX Need to check that there are no data dependencies
+ between diffp and samep. Currently, the code generator
+ will not produce such dependencies. */
+ samep = &JT(*samep);
+ }
+#ifdef notdef
+ /* XXX This doesn't cover everything. */
+ for (i = 0; i < N_ATOMS; ++i)
+ if ((*samep)->val[i] != pred->val[i])
+ return;
+#endif
+ /* Pull up the node. */
+ pull = *samep;
+ *samep = JT(pull);
+ JT(pull) = *diffp;
+
+ /*
+ * At the top of the chain, each predecessor needs to point at the
+ * pulled up node. Inside the chain, there is only one predecessor
+ * to worry about.
+ */
+ if (at_top) {
+ for (ep = b->in_edges; ep != 0; ep = ep->next) {
+ if (JT(ep->pred) == b)
+ JT(ep->pred) = pull;
+ else
+ JF(ep->pred) = pull;
+ }
+ }
+ else
+ *diffp = pull;
+
+ done = 0;
+}
+
+static void
+opt_blks(root, do_stmts)
+ struct block *root;
+ int do_stmts;
+{
+ int i, maxlevel;
+ struct block *p;
+
+ init_val();
+ maxlevel = root->level;
+ for (i = maxlevel; i >= 0; --i)
+ for (p = levels[i]; p; p = p->link)
+ opt_blk(p, do_stmts);
+
+ if (do_stmts)
+ /*
+ * No point trying to move branches; it can't possibly
+ * make a difference at this point.
+ */
+ return;
+
+ for (i = 1; i <= maxlevel; ++i) {
+ for (p = levels[i]; p; p = p->link) {
+ opt_j(&p->et);
+ opt_j(&p->ef);
+ }
+ }
+ for (i = 1; i <= maxlevel; ++i) {
+ for (p = levels[i]; p; p = p->link) {
+ or_pullup(p);
+ and_pullup(p);
+ }
+ }
+}
+
+static inline void
+link_inedge(parent, child)
+ struct edge *parent;
+ struct block *child;
+{
+ parent->next = child->in_edges;
+ child->in_edges = parent;
+}
+
+static void
+find_inedges(root)
+ struct block *root;
+{
+ int i;
+ struct block *b;
+
+ for (i = 0; i < n_blocks; ++i)
+ blocks[i]->in_edges = 0;
+
+ /*
+ * Traverse the graph, adding each edge to the predecessor
+ * list of its successors. Skip the leaves (i.e. level 0).
+ */
+ for (i = root->level; i > 0; --i) {
+ for (b = levels[i]; b != 0; b = b->link) {
+ link_inedge(&b->et, JT(b));
+ link_inedge(&b->ef, JF(b));
+ }
+ }
+}
+
+static void
+opt_root(b)
+ struct block **b;
+{
+ struct slist *tmp, *s;
+
+ s = (*b)->stmts;
+ (*b)->stmts = 0;
+ while (BPF_CLASS((*b)->s.code) == BPF_JMP && JT(*b) == JF(*b))
+ *b = JT(*b);
+
+ tmp = (*b)->stmts;
+ if (tmp != 0)
+ sappend(s, tmp);
+ (*b)->stmts = s;
+
+ /*
+ * If the root node is a return, then there is no
+ * point executing any statements (since the bpf machine
+ * has no side effects).
+ */
+ if (BPF_CLASS((*b)->s.code) == BPF_RET)
+ (*b)->stmts = 0;
+}
+
+static void
+opt_loop(root, do_stmts)
+ struct block *root;
+ int do_stmts;
+{
+
+#ifdef BDEBUG
+ if (dflag > 1)
+ opt_dump(root);
+#endif
+ do {
+ done = 1;
+ find_levels(root);
+ find_dom(root);
+ find_closure(root);
+ find_inedges(root);
+ find_ud(root);
+ find_edom(root);
+ opt_blks(root, do_stmts);
+#ifdef BDEBUG
+ if (dflag > 1)
+ opt_dump(root);
+#endif
+ } while (!done);
+}
+
+/*
+ * Optimize the filter code in its dag representation.
+ */
+void
+bpf_optimize(rootp)
+ struct block **rootp;
+{
+ struct block *root;
+
+ root = *rootp;
+
+ opt_init(root);
+ opt_loop(root, 0);
+ opt_loop(root, 1);
+ intern_blocks(root);
+ opt_root(rootp);
+ opt_cleanup();
+}
+
+static void
+make_marks(p)
+ struct block *p;
+{
+ if (!isMarked(p)) {
+ Mark(p);
+ if (BPF_CLASS(p->s.code) != BPF_RET) {
+ make_marks(JT(p));
+ make_marks(JF(p));
+ }
+ }
+}
+
+/*
+ * Mark code array such that isMarked(i) is true
+ * only for nodes that are alive.
+ */
+static void
+mark_code(p)
+ struct block *p;
+{
+ cur_mark += 1;
+ make_marks(p);
+}
+
+/*
+ * True iff the two stmt lists load the same value from the packet into
+ * the accumulator.
+ */
+static int
+eq_slist(x, y)
+ struct slist *x, *y;
+{
+ while (1) {
+ while (x && x->s.code == NOP)
+ x = x->next;
+ while (y && y->s.code == NOP)
+ y = y->next;
+ if (x == 0)
+ return y == 0;
+ if (y == 0)
+ return x == 0;
+ if (x->s.code != y->s.code || x->s.k != y->s.k)
+ return 0;
+ x = x->next;
+ y = y->next;
+ }
+}
+
+static inline int
+eq_blk(b0, b1)
+ struct block *b0, *b1;
+{
+ if (b0->s.code == b1->s.code &&
+ b0->s.k == b1->s.k &&
+ b0->et.succ == b1->et.succ &&
+ b0->ef.succ == b1->ef.succ)
+ return eq_slist(b0->stmts, b1->stmts);
+ return 0;
+}
+
+static void
+intern_blocks(root)
+ struct block *root;
+{
+ struct block *p;
+ int i, j;
+ int done;
+ top:
+ done = 1;
+ for (i = 0; i < n_blocks; ++i)
+ blocks[i]->link = 0;
+
+ mark_code(root);
+
+ for (i = n_blocks - 1; --i >= 0; ) {
+ if (!isMarked(blocks[i]))
+ continue;
+ for (j = i + 1; j < n_blocks; ++j) {
+ if (!isMarked(blocks[j]))
+ continue;
+ if (eq_blk(blocks[i], blocks[j])) {
+ blocks[i]->link = blocks[j]->link ?
+ blocks[j]->link : blocks[j];
+ break;
+ }
+ }
+ }
+ for (i = 0; i < n_blocks; ++i) {
+ p = blocks[i];
+ if (JT(p) == 0)
+ continue;
+ if (JT(p)->link) {
+ done = 0;
+ JT(p) = JT(p)->link;
+ }
+ if (JF(p)->link) {
+ done = 0;
+ JF(p) = JF(p)->link;
+ }
+ }
+ if (!done)
+ goto top;
+}
+
+static void
+opt_cleanup()
+{
+ free((void *)vnode_base);
+ free((void *)vmap);
+ free((void *)edges);
+ free((void *)space);
+ free((void *)levels);
+ free((void *)blocks);
+}
+
+/*
+ * Return the number of stmts in 's'.
+ */
+static int
+slength(s)
+ struct slist *s;
+{
+ int n = 0;
+
+ for (; s; s = s->next)
+ if (s->s.code != NOP)
+ ++n;
+ return n;
+}
+
+/*
+ * Return the number of nodes reachable by 'p'.
+ * All nodes should be initially unmarked.
+ */
+static int
+count_blocks(p)
+ struct block *p;
+{
+ if (p == 0 || isMarked(p))
+ return 0;
+ Mark(p);
+ return count_blocks(JT(p)) + count_blocks(JF(p)) + 1;
+}
+
+/*
+ * Do a depth first search on the flow graph, numbering the
+ * the basic blocks, and entering them into the 'blocks' array.`
+ */
+static void
+number_blks_r(p)
+ struct block *p;
+{
+ int n;
+
+ if (p == 0 || isMarked(p))
+ return;
+
+ Mark(p);
+ n = n_blocks++;
+ p->id = n;
+ blocks[n] = p;
+
+ number_blks_r(JT(p));
+ number_blks_r(JF(p));
+}
+
+/*
+ * Return the number of stmts in the flowgraph reachable by 'p'.
+ * The nodes should be unmarked before calling.
+ */
+static int
+count_stmts(p)
+ struct block *p;
+{
+ int n;
+
+ if (p == 0 || isMarked(p))
+ return 0;
+ Mark(p);
+ n = count_stmts(JT(p)) + count_stmts(JF(p));
+ return slength(p->stmts) + n + 1;
+}
+
+/*
+ * Allocate memory. All allocation is done before optimization
+ * is begun. A linear bound on the size of all data structures is computed
+ * from the total number of blocks and/or statements.
+ */
+static void
+opt_init(root)
+ struct block *root;
+{
+ bpf_u_int32 *p;
+ int i, n, max_stmts;
+
+ /*
+ * First, count the blocks, so we can malloc an array to map
+ * block number to block. Then, put the blocks into the array.
+ */
+ unMarkAll();
+ n = count_blocks(root);
+ blocks = (struct block **)malloc(n * sizeof(*blocks));
+ unMarkAll();
+ n_blocks = 0;
+ number_blks_r(root);
+
+ n_edges = 2 * n_blocks;
+ edges = (struct edge **)malloc(n_edges * sizeof(*edges));
+
+ /*
+ * The number of levels is bounded by the number of nodes.
+ */
+ levels = (struct block **)malloc(n_blocks * sizeof(*levels));
+
+ edgewords = n_edges / (8 * sizeof(bpf_u_int32)) + 1;
+ nodewords = n_blocks / (8 * sizeof(bpf_u_int32)) + 1;
+
+ /* XXX */
+ space = (bpf_u_int32 *)malloc(2 * n_blocks * nodewords * sizeof(*space)
+ + n_edges * edgewords * sizeof(*space));
+ p = space;
+ all_dom_sets = p;
+ for (i = 0; i < n; ++i) {
+ blocks[i]->dom = p;
+ p += nodewords;
+ }
+ all_closure_sets = p;
+ for (i = 0; i < n; ++i) {
+ blocks[i]->closure = p;
+ p += nodewords;
+ }
+ all_edge_sets = p;
+ for (i = 0; i < n; ++i) {
+ register struct block *b = blocks[i];
+
+ b->et.edom = p;
+ p += edgewords;
+ b->ef.edom = p;
+ p += edgewords;
+ b->et.id = i;
+ edges[i] = &b->et;
+ b->ef.id = n_blocks + i;
+ edges[n_blocks + i] = &b->ef;
+ b->et.pred = b;
+ b->ef.pred = b;
+ }
+ max_stmts = 0;
+ for (i = 0; i < n; ++i)
+ max_stmts += slength(blocks[i]->stmts) + 1;
+ /*
+ * We allocate at most 3 value numbers per statement,
+ * so this is an upper bound on the number of valnodes
+ * we'll need.
+ */
+ maxval = 3 * max_stmts;
+ vmap = (struct vmapinfo *)malloc(maxval * sizeof(*vmap));
+ vnode_base = (struct valnode *)malloc(maxval * sizeof(*vmap));
+}
+
+/*
+ * Some pointers used to convert the basic block form of the code,
+ * into the array form that BPF requires. 'fstart' will point to
+ * the malloc'd array while 'ftail' is used during the recursive traversal.
+ */
+static struct bpf_insn *fstart;
+static struct bpf_insn *ftail;
+
+#ifdef BDEBUG
+int bids[1000];
+#endif
+
+/*
+ * Returns true if successful. Returns false if a branch has
+ * an offset that is too large. If so, we have marked that
+ * branch so that on a subsequent iteration, it will be treated
+ * properly.
+ */
+static int
+convert_code_r(p)
+ struct block *p;
+{
+ struct bpf_insn *dst;
+ struct slist *src;
+ int slen;
+ u_int off;
+ int extrajmps; /* number of extra jumps inserted */
+
+ if (p == 0 || isMarked(p))
+ return (1);
+ Mark(p);
+
+ if (convert_code_r(JF(p)) == 0)
+ return (0);
+ if (convert_code_r(JT(p)) == 0)
+ return (0);
+
+ slen = slength(p->stmts);
+ dst = ftail -= (slen + 1 + p->longjt + p->longjf);
+ /* inflate length by any extra jumps */
+
+ p->offset = dst - fstart;
+
+ for (src = p->stmts; src; src = src->next) {
+ if (src->s.code == NOP)
+ continue;
+ dst->code = (u_short)src->s.code;
+ dst->k = src->s.k;
+ ++dst;
+ }
+#ifdef BDEBUG
+ bids[dst - fstart] = p->id + 1;
+#endif
+ dst->code = (u_short)p->s.code;
+ dst->k = p->s.k;
+ if (JT(p)) {
+ extrajmps = 0;
+ off = JT(p)->offset - (p->offset + slen) - 1;
+ if (off >= 256) {
+ /* offset too large for branch, must add a jump */
+ if (p->longjt == 0) {
+ /* mark this instruction and retry */
+ p->longjt++;
+ return(0);
+ }
+ /* branch if T to following jump */
+ dst->jt = extrajmps;
+ extrajmps++;
+ dst[extrajmps].code = BPF_JMP|BPF_JA;
+ dst[extrajmps].k = off - extrajmps;
+ }
+ else
+ dst->jt = off;
+ off = JF(p)->offset - (p->offset + slen) - 1;
+ if (off >= 256) {
+ /* offset too large for branch, must add a jump */
+ if (p->longjf == 0) {
+ /* mark this instruction and retry */
+ p->longjf++;
+ return(0);
+ }
+ /* branch if F to following jump */
+ /* if two jumps are inserted, F goes to second one */
+ dst->jf = extrajmps;
+ extrajmps++;
+ dst[extrajmps].code = BPF_JMP|BPF_JA;
+ dst[extrajmps].k = off - extrajmps;
+ }
+ else
+ dst->jf = off;
+ }
+ return (1);
+}
+
+
+/*
+ * Convert flowgraph intermediate representation to the
+ * BPF array representation. Set *lenp to the number of instructions.
+ */
+struct bpf_insn *
+icode_to_fcode(root, lenp)
+ struct block *root;
+ int *lenp;
+{
+ int n;
+ struct bpf_insn *fp;
+
+ /*
+ * Loop doing convert_codr_r() until no branches remain
+ * with too-large offsets.
+ */
+ while (1) {
+ unMarkAll();
+ n = *lenp = count_stmts(root);
+
+ fp = (struct bpf_insn *)malloc(sizeof(*fp) * n);
+ memset((char *)fp, 0, sizeof(*fp) * n);
+ fstart = fp;
+ ftail = fp + n;
+
+ unMarkAll();
+ if (convert_code_r(root))
+ break;
+ free(fp);
+ }
+
+ return fp;
+}
+
+#ifdef BDEBUG
+static void
+opt_dump(root)
+ struct block *root;
+{
+ struct bpf_program f;
+
+ memset(bids, 0, sizeof bids);
+ f.bf_insns = icode_to_fcode(root, &f.bf_len);
+ bpf_dump(&f, 1);
+ putchar('\n');
+ free((char *)f.bf_insns);
+}
+#endif
--- /dev/null
+/*
+ * Copyright (c) 1993, 1994, 1995, 1996, 1998
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ */
+#ifndef lint
+static const char rcsid[] =
+ "@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/pcap-bpf.c,v 1.1 1999/08/26 10:05:23 johana Exp $ (LBL)";
+#endif
+
+#include <sys/param.h> /* optionally get BSD define */
+#include <sys/time.h>
+#include <sys/timeb.h>
+#include <sys/socket.h>
+#include <sys/file.h>
+#include <sys/ioctl.h>
+
+#include <net/if.h>
+
+#include <ctype.h>
+#include <errno.h>
+#include <netdb.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+
+#include "pcap-int.h"
+
+#include "gnuc.h"
+#ifdef HAVE_OS_PROTO_H
+#include "os-proto.h"
+#endif
+
+int
+pcap_stats(pcap_t *p, struct pcap_stat *ps)
+{
+ struct bpf_stat s;
+
+ if (ioctl(p->fd, BIOCGSTATS, (caddr_t)&s) < 0) {
+ sprintf(p->errbuf, "BIOCGSTATS: %s", pcap_strerror(errno));
+ return (-1);
+ }
+
+ ps->ps_recv = s.bs_recv;
+ ps->ps_drop = s.bs_drop;
+ return (0);
+}
+
+int
+pcap_read(pcap_t *p, int cnt, pcap_handler callback, u_char *user)
+{
+ int cc;
+ int n = 0;
+ register u_char *bp, *ep;
+
+ again:
+ cc = p->cc;
+ if (p->cc == 0) {
+ cc = read(p->fd, (char *)p->buffer, p->bufsize);
+ if (cc < 0) {
+ /* Don't choke when we get ptraced */
+ switch (errno) {
+
+ case EINTR:
+ goto again;
+
+ case EWOULDBLOCK:
+ return (0);
+#if defined(sun) && !defined(BSD)
+ /*
+ * Due to a SunOS bug, after 2^31 bytes, the kernel
+ * file offset overflows and read fails with EINVAL.
+ * The lseek() to 0 will fix things.
+ */
+ case EINVAL:
+ if (lseek(p->fd, 0L, SEEK_CUR) +
+ p->bufsize < 0) {
+ (void)lseek(p->fd, 0L, SEEK_SET);
+ goto again;
+ }
+ /* fall through */
+#endif
+ }
+ sprintf(p->errbuf, "read: %s", pcap_strerror(errno));
+ return (-1);
+ }
+ bp = p->buffer;
+ } else
+ bp = p->bp;
+
+ /*
+ * Loop through each packet.
+ */
+#define bhp ((struct bpf_hdr *)bp)
+ ep = bp + cc;
+ while (bp < ep) {
+ register int caplen, hdrlen;
+ caplen = bhp->bh_caplen;
+ hdrlen = bhp->bh_hdrlen;
+ /*
+ * XXX A bpf_hdr matches a pcap_pkthdr.
+ */
+ (*callback)(user, (struct pcap_pkthdr*)bp, bp + hdrlen);
+ bp += BPF_WORDALIGN(caplen + hdrlen);
+ if (++n >= cnt && cnt > 0) {
+ p->bp = bp;
+ p->cc = ep - bp;
+ return (n);
+ }
+ }
+#undef bhp
+ p->cc = 0;
+ return (n);
+}
+
+static inline int
+bpf_open(pcap_t *p, char *errbuf)
+{
+ int fd;
+ int n = 0;
+ char device[sizeof "/dev/bpf000"];
+
+ /*
+ * Go through all the minors and find one that isn't in use.
+ */
+ do {
+ (void)sprintf(device, "/dev/bpf%d", n++);
+ fd = open(device, O_RDONLY);
+ } while (fd < 0 && errno == EBUSY);
+
+ /*
+ * XXX better message for all minors used
+ */
+ if (fd < 0)
+ sprintf(errbuf, "%s: %s", device, pcap_strerror(errno));
+
+ return (fd);
+}
+
+pcap_t *
+pcap_open_live(char *device, int snaplen, int promisc, int to_ms, char *ebuf)
+{
+ int fd;
+ struct ifreq ifr;
+ struct bpf_version bv;
+ u_int v;
+ pcap_t *p;
+
+ p = (pcap_t *)malloc(sizeof(*p));
+ if (p == NULL) {
+ sprintf(ebuf, "malloc: %s", pcap_strerror(errno));
+ return (NULL);
+ }
+ bzero(p, sizeof(*p));
+ fd = bpf_open(p, ebuf);
+ if (fd < 0)
+ goto bad;
+
+ p->fd = fd;
+ p->snapshot = snaplen;
+
+ if (ioctl(fd, BIOCVERSION, (caddr_t)&bv) < 0) {
+ sprintf(ebuf, "BIOCVERSION: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ if (bv.bv_major != BPF_MAJOR_VERSION ||
+ bv.bv_minor < BPF_MINOR_VERSION) {
+ sprintf(ebuf, "kernel bpf filter out of date");
+ goto bad;
+ }
+ v = 32768; /* XXX this should be a user-accessible hook */
+ /* Ignore the return value - this is because the call fails on
+ * BPF systems that don't have kernel malloc. And if the call
+ * fails, it's no big deal, we just continue to use the standard
+ * buffer size.
+ */
+ (void) ioctl(fd, BIOCSBLEN, (caddr_t)&v);
+
+ (void)strncpy(ifr.ifr_name, device, sizeof(ifr.ifr_name));
+ if (ioctl(fd, BIOCSETIF, (caddr_t)&ifr) < 0) {
+ sprintf(ebuf, "%s: %s", device, pcap_strerror(errno));
+ goto bad;
+ }
+ /* Get the data link layer type. */
+ if (ioctl(fd, BIOCGDLT, (caddr_t)&v) < 0) {
+ sprintf(ebuf, "BIOCGDLT: %s", pcap_strerror(errno));
+ goto bad;
+ }
+#if _BSDI_VERSION - 0 >= 199510
+ /* The SLIP and PPP link layer header changed in BSD/OS 2.1 */
+ switch (v) {
+
+ case DLT_SLIP:
+ v = DLT_SLIP_BSDOS;
+ break;
+
+ case DLT_PPP:
+ v = DLT_PPP_BSDOS;
+ break;
+ }
+#endif
+ p->linktype = v;
+
+ /* set timeout */
+ if (to_ms != 0) {
+ struct timeval to;
+ to.tv_sec = to_ms / 1000;
+ to.tv_usec = (to_ms * 1000) % 1000000;
+ if (ioctl(p->fd, BIOCSRTIMEOUT, (caddr_t)&to) < 0) {
+ sprintf(ebuf, "BIOCSRTIMEOUT: %s",
+ pcap_strerror(errno));
+ goto bad;
+ }
+ }
+ if (promisc)
+ /* set promiscuous mode, okay if it fails */
+ (void)ioctl(p->fd, BIOCPROMISC, NULL);
+
+ if (ioctl(fd, BIOCGBLEN, (caddr_t)&v) < 0) {
+ sprintf(ebuf, "BIOCGBLEN: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ p->bufsize = v;
+ p->buffer = (u_char *)malloc(p->bufsize);
+ if (p->buffer == NULL) {
+ sprintf(ebuf, "malloc: %s", pcap_strerror(errno));
+ goto bad;
+ }
+
+ return (p);
+ bad:
+ (void)close(fd);
+ free(p);
+ return (NULL);
+}
+
+int
+pcap_setfilter(pcap_t *p, struct bpf_program *fp)
+{
+ if (p->sf.rfile != NULL)
+ p->fcode = *fp;
+ else if (ioctl(p->fd, BIOCSETF, (caddr_t)fp) < 0) {
+ sprintf(p->errbuf, "BIOCSETF: %s", pcap_strerror(errno));
+ return (-1);
+ }
+ return (0);
+}
--- /dev/null
+/*
+ * Copyright (c) 1993, 1994, 1995, 1996, 1997
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ * This code contributed by Atanu Ghosh (atanu@cs.ucl.ac.uk),
+ * University College London.
+ */
+
+/*
+ * Packet capture routine for dlpi under SunOS 5
+ *
+ * Notes:
+ *
+ * - Apparently the DLIOCRAW ioctl() is specific to SunOS.
+ *
+ * - There is a bug in bufmod(7) such that setting the snapshot
+ * length results in data being left of the front of the packet.
+ *
+ * - It might be desirable to use pfmod(7) to filter packets in the
+ * kernel.
+ */
+
+#ifndef lint
+static const char rcsid[] =
+ "@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/pcap-dlpi.c,v 1.1 1999/08/26 10:05:23 johana Exp $ (LBL)";
+#endif
+
+#include <sys/types.h>
+#include <sys/time.h>
+#ifdef HAVE_SYS_BUFMOD_H
+#include <sys/bufmod.h>
+#endif
+#include <sys/dlpi.h>
+#ifdef HAVE_SYS_DLPI_EXT_H
+#include <sys/dlpi_ext.h>
+#endif
+#ifdef HAVE_HPUX9
+#include <sys/socket.h>
+#endif
+#ifdef DL_HP_PPA_ACK_OBS
+#include <sys/stat.h>
+#endif
+#include <sys/stream.h>
+#if defined(HAVE_SOLARIS) && defined(HAVE_SYS_BUFMOD_H)
+#include <sys/systeminfo.h>
+#endif
+
+#ifdef HAVE_HPUX9
+#include <net/if.h>
+#endif
+
+#include <ctype.h>
+#ifdef HAVE_HPUX9
+#include <nlist.h>
+#endif
+#include <errno.h>
+#include <fcntl.h>
+#include <memory.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stropts.h>
+#include <unistd.h>
+
+#include "pcap-int.h"
+
+#include "gnuc.h"
+#ifdef HAVE_OS_PROTO_H
+#include "os-proto.h"
+#endif
+
+#ifndef PCAP_DEV_PREFIX
+#define PCAP_DEV_PREFIX "/dev"
+#endif
+
+#define MAXDLBUF 8192
+
+/* Forwards */
+static int dlattachreq(int, bpf_u_int32, char *);
+static int dlbindack(int, char *, char *);
+static int dlbindreq(int, bpf_u_int32, char *);
+static int dlinfoack(int, char *, char *);
+static int dlinforeq(int, char *);
+static int dlokack(int, const char *, char *, char *);
+static int recv_ack(int, int, const char *, char *, char *);
+static int dlpromisconreq(int, bpf_u_int32, char *);
+#if defined(HAVE_SOLARIS) && defined(HAVE_SYS_BUFMOD_H)
+static char *get_release(bpf_u_int32 *, bpf_u_int32 *, bpf_u_int32 *);
+#endif
+static int send_request(int, char *, int, char *, char *);
+#ifdef HAVE_SYS_BUFMOD_H
+static int strioctl(int, int, int, char *);
+#endif
+#ifdef HAVE_HPUX9
+static int dlpi_kread(int, off_t, void *, u_int, char *);
+#endif
+#ifdef HAVE_DEV_DLPI
+static int get_dlpi_ppa(int, const char *, int, char *);
+#endif
+
+int
+pcap_stats(pcap_t *p, struct pcap_stat *ps)
+{
+
+ *ps = p->md.stat;
+ return (0);
+}
+
+/* XXX Needed by HP-UX (at least) */
+static bpf_u_int32 ctlbuf[MAXDLBUF];
+static struct strbuf ctl = {
+ MAXDLBUF,
+ 0,
+ (char *)ctlbuf
+};
+
+int
+pcap_read(pcap_t *p, int cnt, pcap_handler callback, u_char *user)
+{
+ register int cc, n, caplen, origlen;
+ register u_char *bp, *ep, *pk;
+ register struct bpf_insn *fcode;
+#ifdef HAVE_SYS_BUFMOD_H
+ register struct sb_hdr *sbp;
+#ifdef LBL_ALIGN
+ struct sb_hdr sbhdr;
+#endif
+#endif
+ int flags;
+ struct strbuf data;
+ struct pcap_pkthdr pkthdr;
+
+ flags = 0;
+ cc = p->cc;
+ if (cc == 0) {
+ data.buf = (char *)p->buffer + p->offset;
+ data.maxlen = MAXDLBUF;
+ data.len = 0;
+ do {
+ if (getmsg(p->fd, &ctl, &data, &flags) < 0) {
+ /* Don't choke when we get ptraced */
+ if (errno == EINTR) {
+ cc = 0;
+ continue;
+ }
+ strcpy(p->errbuf, pcap_strerror(errno));
+ return (-1);
+ }
+ cc = data.len;
+ } while (cc == 0);
+ bp = p->buffer + p->offset;
+ } else
+ bp = p->bp;
+
+ /* Loop through packets */
+ fcode = p->fcode.bf_insns;
+ ep = bp + cc;
+ n = 0;
+#ifdef HAVE_SYS_BUFMOD_H
+ while (bp < ep) {
+#ifdef LBL_ALIGN
+ if ((long)bp & 3) {
+ sbp = &sbhdr;
+ memcpy(sbp, bp, sizeof(*sbp));
+ } else
+#endif
+ sbp = (struct sb_hdr *)bp;
+ p->md.stat.ps_drop += sbp->sbh_drops;
+ pk = bp + sizeof(*sbp);
+ bp += sbp->sbh_totlen;
+ origlen = sbp->sbh_origlen;
+ caplen = sbp->sbh_msglen;
+#else
+ origlen = cc;
+ caplen = min(p->snapshot, cc);
+ pk = bp;
+ bp += caplen;
+#endif
+ ++p->md.stat.ps_recv;
+ if (bpf_filter(fcode, pk, origlen, caplen)) {
+#ifdef HAVE_SYS_BUFMOD_H
+ pkthdr.ts = sbp->sbh_timestamp;
+#else
+ (void)gettimeofday(&pkthdr.ts, NULL);
+#endif
+ pkthdr.len = origlen;
+ pkthdr.caplen = caplen;
+ /* Insure caplen does not exceed snapshot */
+ if (pkthdr.caplen > p->snapshot)
+ pkthdr.caplen = p->snapshot;
+ (*callback)(user, &pkthdr, pk);
+ if (++n >= cnt && cnt >= 0) {
+ p->cc = ep - bp;
+ p->bp = bp;
+ return (n);
+ }
+ }
+#ifdef HAVE_SYS_BUFMOD_H
+ }
+#endif
+ p->cc = 0;
+ return (n);
+}
+
+pcap_t *
+pcap_open_live(char *device, int snaplen, int promisc, int to_ms, char *ebuf)
+{
+ register char *cp;
+ char *eos;
+ register pcap_t *p;
+ register int ppa;
+ register dl_info_ack_t *infop;
+#ifdef HAVE_SYS_BUFMOD_H
+ bpf_u_int32 ss, flag;
+#ifdef HAVE_SOLARIS
+ register char *release;
+ bpf_u_int32 osmajor, osminor, osmicro;
+#endif
+#endif
+ bpf_u_int32 buf[MAXDLBUF];
+ char dname[100];
+#ifndef HAVE_DEV_DLPI
+ char dname2[100];
+#endif
+
+ p = (pcap_t *)malloc(sizeof(*p));
+ if (p == NULL) {
+ strcpy(ebuf, pcap_strerror(errno));
+ return (NULL);
+ }
+ memset(p, 0, sizeof(*p));
+
+ /*
+ ** Determine device and ppa
+ */
+ cp = strpbrk(device, "0123456789");
+ if (cp == NULL) {
+ sprintf(ebuf, "%s missing unit number", device);
+ goto bad;
+ }
+ ppa = strtol(cp, &eos, 10);
+ if (*eos != '\0') {
+ sprintf(ebuf, "%s bad unit number", device);
+ goto bad;
+ }
+
+ if (*device == '/')
+ strcpy(dname, device);
+ else
+ sprintf(dname, "%s/%s", PCAP_DEV_PREFIX, device);
+#ifdef HAVE_DEV_DLPI
+ /* Map network device to /dev/dlpi unit */
+ cp = "/dev/dlpi";
+ if ((p->fd = open(cp, O_RDWR)) < 0) {
+ sprintf(ebuf, "%s: %s", cp, pcap_strerror(errno));
+ goto bad;
+ }
+ /* Map network interface to /dev/dlpi unit */
+ ppa = get_dlpi_ppa(p->fd, dname, ppa, ebuf);
+ if (ppa < 0)
+ goto bad;
+#else
+ /* Try device without unit number */
+ strcpy(dname2, dname);
+ cp = strchr(dname, *cp);
+ *cp = '\0';
+ if ((p->fd = open(dname, O_RDWR)) < 0) {
+ if (errno != ENOENT) {
+ sprintf(ebuf, "%s: %s", dname, pcap_strerror(errno));
+ goto bad;
+ }
+
+ /* Try again with unit number */
+ if ((p->fd = open(dname2, O_RDWR)) < 0) {
+ sprintf(ebuf, "%s: %s", dname2, pcap_strerror(errno));
+ goto bad;
+ }
+ /* XXX Assume unit zero */
+ ppa = 0;
+ }
+#endif
+
+ p->snapshot = snaplen;
+
+ /*
+ ** Attach if "style 2" provider
+ */
+ if (dlinforeq(p->fd, ebuf) < 0 ||
+ dlinfoack(p->fd, (char *)buf, ebuf) < 0)
+ goto bad;
+ infop = &((union DL_primitives *)buf)->info_ack;
+ if (infop->dl_provider_style == DL_STYLE2 &&
+ (dlattachreq(p->fd, ppa, ebuf) < 0 ||
+ dlokack(p->fd, "attach", (char *)buf, ebuf) < 0))
+ goto bad;
+ /*
+ ** Bind (defer if using HP-UX 9 or HP-UX 10.20, totally skip if
+ ** using SINIX)
+ */
+#if !defined(HAVE_HPUX9) && !defined(HAVE_HPUX10_20) && !defined(sinix)
+ if (dlbindreq(p->fd, 0, ebuf) < 0 ||
+ dlbindack(p->fd, (char *)buf, ebuf) < 0)
+ goto bad;
+#endif
+
+ if (promisc) {
+ /*
+ ** Enable promiscuous
+ */
+ if (dlpromisconreq(p->fd, DL_PROMISC_PHYS, ebuf) < 0 ||
+ dlokack(p->fd, "promisc_phys", (char *)buf, ebuf) < 0)
+ goto bad;
+
+ /*
+ ** Try to enable multicast (you would have thought
+ ** promiscuous would be sufficient). (Skip if using
+ ** HP-UX or SINIX)
+ */
+#if !defined(__hpux) && !defined(sinix)
+ if (dlpromisconreq(p->fd, DL_PROMISC_MULTI, ebuf) < 0 ||
+ dlokack(p->fd, "promisc_multi", (char *)buf, ebuf) < 0)
+ fprintf(stderr,
+ "WARNING: DL_PROMISC_MULTI failed (%s)\n", ebuf);
+#endif
+ }
+ /*
+ ** Try to enable sap (when not in promiscuous mode when using
+ ** using HP-UX and never under SINIX)
+ */
+#ifndef sinix
+ if (
+#ifdef __hpux
+ !promisc &&
+#endif
+ (dlpromisconreq(p->fd, DL_PROMISC_SAP, ebuf) < 0 ||
+ dlokack(p->fd, "promisc_sap", (char *)buf, ebuf) < 0)) {
+ /* Not fatal if promisc since the DL_PROMISC_PHYS worked */
+ if (promisc)
+ fprintf(stderr,
+ "WARNING: DL_PROMISC_SAP failed (%s)\n", ebuf);
+ else
+ goto bad;
+ }
+#endif
+
+ /*
+ ** HP-UX 9 and HP-UX 10.20 must bind after setting promiscuous
+ ** options)
+ */
+#if defined(HAVE_HPUX9) || defined(HAVE_HPUX10_20)
+ if (dlbindreq(p->fd, 0, ebuf) < 0 ||
+ dlbindack(p->fd, (char *)buf, ebuf) < 0)
+ goto bad;
+#endif
+
+ /*
+ ** Determine link type
+ */
+ if (dlinforeq(p->fd, ebuf) < 0 ||
+ dlinfoack(p->fd, (char *)buf, ebuf) < 0)
+ goto bad;
+
+ infop = &((union DL_primitives *)buf)->info_ack;
+ switch (infop->dl_mac_type) {
+
+ case DL_CSMACD:
+ case DL_ETHER:
+ p->linktype = DLT_EN10MB;
+ p->offset = 2;
+ break;
+
+ case DL_FDDI:
+ p->linktype = DLT_FDDI;
+ p->offset = 3;
+ break;
+
+ default:
+ sprintf(ebuf, "unknown mac type 0x%lu", infop->dl_mac_type);
+ goto bad;
+ }
+
+#ifdef DLIOCRAW
+ /*
+ ** This is a non standard SunOS hack to get the ethernet header.
+ */
+ if (strioctl(p->fd, DLIOCRAW, 0, NULL) < 0) {
+ sprintf(ebuf, "DLIOCRAW: %s", pcap_strerror(errno));
+ goto bad;
+ }
+#endif
+
+#ifdef HAVE_SYS_BUFMOD_H
+ /*
+ ** Another non standard call to get the data nicely buffered
+ */
+ if (ioctl(p->fd, I_PUSH, "bufmod") != 0) {
+ sprintf(ebuf, "I_PUSH bufmod: %s", pcap_strerror(errno));
+ goto bad;
+ }
+
+ /*
+ ** Now that the bufmod is pushed lets configure it.
+ **
+ ** There is a bug in bufmod(7). When dealing with messages of
+ ** less than snaplen size it strips data from the beginning not
+ ** the end.
+ **
+ ** This bug is supposed to be fixed in 5.3.2. Also, there is a
+ ** patch available. Ask for bugid 1149065.
+ */
+ ss = snaplen;
+#ifdef HAVE_SOLARIS
+ release = get_release(&osmajor, &osminor, &osmicro);
+ if (osmajor == 5 && (osminor <= 2 || (osminor == 3 && osmicro < 2)) &&
+ getenv("BUFMOD_FIXED") == NULL) {
+ fprintf(stderr,
+ "WARNING: bufmod is broken in SunOS %s; ignoring snaplen.\n",
+ release);
+ ss = 0;
+ }
+#endif
+ if (ss > 0 &&
+ strioctl(p->fd, SBIOCSSNAP, sizeof(ss), (char *)&ss) != 0) {
+ sprintf(ebuf, "SBIOCSSNAP: %s", pcap_strerror(errno));
+ goto bad;
+ }
+
+ /*
+ ** Set up the bufmod flags
+ */
+ if (strioctl(p->fd, SBIOCGFLAGS, sizeof(flag), (char *)&flag) < 0) {
+ sprintf(ebuf, "SBIOCGFLAGS: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ flag |= SB_NO_DROPS;
+ if (strioctl(p->fd, SBIOCSFLAGS, sizeof(flag), (char *)&flag) != 0) {
+ sprintf(ebuf, "SBIOCSFLAGS: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ /*
+ ** Set up the bufmod timeout
+ */
+ if (to_ms != 0) {
+ struct timeval to;
+
+ to.tv_sec = to_ms / 1000;
+ to.tv_usec = (to_ms * 1000) % 1000000;
+ if (strioctl(p->fd, SBIOCSTIME, sizeof(to), (char *)&to) != 0) {
+ sprintf(ebuf, "SBIOCSTIME: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ }
+#endif
+
+ /*
+ ** As the last operation flush the read side.
+ */
+ if (ioctl(p->fd, I_FLUSH, FLUSHR) != 0) {
+ sprintf(ebuf, "FLUSHR: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ /* Allocate data buffer */
+ p->bufsize = MAXDLBUF * sizeof(bpf_u_int32);
+ p->buffer = (u_char *)malloc(p->bufsize + p->offset);
+
+ return (p);
+bad:
+ free(p);
+ return (NULL);
+}
+
+int
+pcap_setfilter(pcap_t *p, struct bpf_program *fp)
+{
+
+ p->fcode = *fp;
+ return (0);
+}
+
+static int
+send_request(int fd, char *ptr, int len, char *what, char *ebuf)
+{
+ struct strbuf ctl;
+ int flags;
+
+ ctl.maxlen = 0;
+ ctl.len = len;
+ ctl.buf = ptr;
+
+ flags = 0;
+ if (putmsg(fd, &ctl, (struct strbuf *) NULL, flags) < 0) {
+ sprintf(ebuf, "send_request: putmsg \"%s\": %s",
+ what, pcap_strerror(errno));
+ return (-1);
+ }
+ return (0);
+}
+
+static int
+recv_ack(int fd, int size, const char *what, char *bufp, char *ebuf)
+{
+ union DL_primitives *dlp;
+ struct strbuf ctl;
+ int flags;
+
+ ctl.maxlen = MAXDLBUF;
+ ctl.len = 0;
+ ctl.buf = bufp;
+
+ flags = 0;
+ if (getmsg(fd, &ctl, (struct strbuf*)NULL, &flags) < 0) {
+ sprintf(ebuf, "recv_ack: %s getmsg: %s",
+ what, pcap_strerror(errno));
+ return (-1);
+ }
+
+ dlp = (union DL_primitives *) ctl.buf;
+ switch (dlp->dl_primitive) {
+
+ case DL_INFO_ACK:
+ case DL_BIND_ACK:
+ case DL_OK_ACK:
+#ifdef DL_HP_PPA_ACK
+ case DL_HP_PPA_ACK:
+#endif
+
+ /* These are OK */
+ break;
+
+ case DL_ERROR_ACK:
+ switch (dlp->error_ack.dl_errno) {
+
+ case DL_BADPPA:
+ sprintf(ebuf, "recv_ack: %s bad ppa (device unit)",
+ what);
+ break;
+
+
+ case DL_SYSERR:
+ sprintf(ebuf, "recv_ack: %s: %s",
+ what, pcap_strerror(dlp->error_ack.dl_unix_errno));
+ break;
+
+ case DL_UNSUPPORTED:
+ sprintf(ebuf,
+ "recv_ack: %s: Service not supplied by provider",
+ what);
+ break;
+
+ default:
+ sprintf(ebuf, "recv_ack: %s error 0x%x",
+ what, (bpf_u_int32)dlp->error_ack.dl_errno);
+ break;
+ }
+ return (-1);
+
+ default:
+ sprintf(ebuf, "recv_ack: %s unexpected primitive ack 0x%x ",
+ what, (bpf_u_int32)dlp->dl_primitive);
+ return (-1);
+ }
+
+ if (ctl.len < size) {
+ sprintf(ebuf, "recv_ack: %s ack too small (%d < %d)",
+ what, ctl.len, size);
+ return (-1);
+ }
+ return (ctl.len);
+}
+
+static int
+dlattachreq(int fd, bpf_u_int32 ppa, char *ebuf)
+{
+ dl_attach_req_t req;
+
+ req.dl_primitive = DL_ATTACH_REQ;
+ req.dl_ppa = ppa;
+
+ return (send_request(fd, (char *)&req, sizeof(req), "attach", ebuf));
+}
+
+static int
+dlbindreq(int fd, bpf_u_int32 sap, char *ebuf)
+{
+
+ dl_bind_req_t req;
+
+ memset((char *)&req, 0, sizeof(req));
+ req.dl_primitive = DL_BIND_REQ;
+#ifdef DL_HP_RAWDLS
+ req.dl_max_conind = 1; /* XXX magic number */
+ /* 22 is INSAP as per the HP-UX DLPI Programmer's Guide */
+ req.dl_sap = 22;
+ req.dl_service_mode = DL_HP_RAWDLS;
+#else
+ req.dl_sap = sap;
+#ifdef DL_CLDLS
+ req.dl_service_mode = DL_CLDLS;
+#endif
+#endif
+
+ return (send_request(fd, (char *)&req, sizeof(req), "bind", ebuf));
+}
+
+static int
+dlbindack(int fd, char *bufp, char *ebuf)
+{
+
+ return (recv_ack(fd, DL_BIND_ACK_SIZE, "bind", bufp, ebuf));
+}
+
+static int
+dlpromisconreq(int fd, bpf_u_int32 level, char *ebuf)
+{
+ dl_promiscon_req_t req;
+
+ req.dl_primitive = DL_PROMISCON_REQ;
+ req.dl_level = level;
+
+ return (send_request(fd, (char *)&req, sizeof(req), "promiscon", ebuf));
+}
+
+static int
+dlokack(int fd, const char *what, char *bufp, char *ebuf)
+{
+
+ return (recv_ack(fd, DL_OK_ACK_SIZE, what, bufp, ebuf));
+}
+
+
+static int
+dlinforeq(int fd, char *ebuf)
+{
+ dl_info_req_t req;
+
+ req.dl_primitive = DL_INFO_REQ;
+
+ return (send_request(fd, (char *)&req, sizeof(req), "info", ebuf));
+}
+
+static int
+dlinfoack(int fd, char *bufp, char *ebuf)
+{
+
+ return (recv_ack(fd, DL_INFO_ACK_SIZE, "info", bufp, ebuf));
+}
+
+#ifdef HAVE_SYS_BUFMOD_H
+static int
+strioctl(int fd, int cmd, int len, char *dp)
+{
+ struct strioctl str;
+ int rc;
+
+ str.ic_cmd = cmd;
+ str.ic_timout = -1;
+ str.ic_len = len;
+ str.ic_dp = dp;
+ rc = ioctl(fd, I_STR, &str);
+
+ if (rc < 0)
+ return (rc);
+ else
+ return (str.ic_len);
+}
+#endif
+
+#if defined(HAVE_SOLARIS) && defined(HAVE_SYS_BUFMOD_H)
+static char *
+get_release(bpf_u_int32 *majorp, bpf_u_int32 *minorp, bpf_u_int32 *microp)
+{
+ char *cp;
+ static char buf[32];
+
+ *majorp = 0;
+ *minorp = 0;
+ *microp = 0;
+ if (sysinfo(SI_RELEASE, buf, sizeof(buf)) < 0)
+ return ("?");
+ cp = buf;
+ if (!isdigit(*cp))
+ return (buf);
+ *majorp = strtol(cp, &cp, 10);
+ if (*cp++ != '.')
+ return (buf);
+ *minorp = strtol(cp, &cp, 10);
+ if (*cp++ != '.')
+ return (buf);
+ *microp = strtol(cp, &cp, 10);
+ return (buf);
+}
+#endif
+
+#ifdef DL_HP_PPA_ACK_OBS
+/*
+ * Under HP-UX 10, we can ask for the ppa
+ */
+
+
+/* Determine ppa number that specifies ifname */
+static int
+get_dlpi_ppa(register int fd, register const char *device, register int unit,
+ register char *ebuf)
+{
+ register dl_hp_ppa_ack_t *ap;
+ register dl_hp_ppa_info_t *ip;
+ register int i;
+ register u_long majdev;
+ dl_hp_ppa_req_t req;
+ struct stat statbuf;
+ bpf_u_int32 buf[MAXDLBUF];
+
+ if (stat(device, &statbuf) < 0) {
+ sprintf(ebuf, "stat: %s: %s", device, pcap_strerror(errno));
+ return (-1);
+ }
+ majdev = major(statbuf.st_rdev);
+
+ memset((char *)&req, 0, sizeof(req));
+ req.dl_primitive = DL_HP_PPA_REQ;
+
+ memset((char *)buf, 0, sizeof(buf));
+ if (send_request(fd, (char *)&req, sizeof(req), "hpppa", ebuf) < 0 ||
+ recv_ack(fd, DL_HP_PPA_ACK_SIZE, "hpppa", (char *)buf, ebuf) < 0)
+ return (-1);
+
+ ap = (dl_hp_ppa_ack_t *)buf;
+ ip = (dl_hp_ppa_info_t *)((u_char *)ap + ap->dl_offset);
+
+ for(i = 0; i < ap->dl_count; i++) {
+ if (ip->dl_mjr_num == majdev && ip->dl_instance_num == unit)
+ break;
+
+ ip = (dl_hp_ppa_info_t *)((u_char *)ip + ip->dl_next_offset);
+ }
+ if (i == ap->dl_count) {
+ sprintf(ebuf, "can't find PPA for %s", device);
+ return (-1);
+ }
+ if (ip->dl_hdw_state == HDW_DEAD) {
+ sprintf(ebuf, "%s: hardware state: DOWN\n", device);
+ return (-1);
+ }
+ return ((int)ip->dl_ppa);
+}
+#endif
+
+#ifdef HAVE_HPUX9
+/*
+ * Under HP-UX 9, there is no good way to determine the ppa.
+ * So punt and read it from /dev/kmem.
+ */
+static struct nlist nl[] = {
+#define NL_IFNET 0
+ { "ifnet" },
+ { "" }
+};
+
+static char path_vmunix[] = "/hp-ux";
+
+/* Determine ppa number that specifies ifname */
+static int
+get_dlpi_ppa(register int fd, register const char *ifname, register int unit,
+ register char *ebuf)
+{
+ register const char *cp;
+ register int kd;
+ void *addr;
+ struct ifnet ifnet;
+ char if_name[sizeof(ifnet.if_name)], tifname[32];
+
+ cp = strrchr(ifname, '/');
+ if (cp != NULL)
+ ifname = cp + 1;
+ if (nlist(path_vmunix, &nl) < 0) {
+ sprintf(ebuf, "nlist %s failed", path_vmunix);
+ return (-1);
+ }
+ if (nl[NL_IFNET].n_value == 0) {
+ sprintf(ebuf, "could't find %s kernel symbol",
+ nl[NL_IFNET].n_name);
+ return (-1);
+ }
+ kd = open("/dev/kmem", O_RDONLY);
+ if (kd < 0) {
+ sprintf(ebuf, "kmem open: %s", pcap_strerror(errno));
+ return (-1);
+ }
+ if (dlpi_kread(kd, nl[NL_IFNET].n_value,
+ &addr, sizeof(addr), ebuf) < 0) {
+ close(kd);
+ return (-1);
+ }
+ for (; addr != NULL; addr = ifnet.if_next) {
+ if (dlpi_kread(kd, (off_t)addr,
+ &ifnet, sizeof(ifnet), ebuf) < 0 ||
+ dlpi_kread(kd, (off_t)ifnet.if_name,
+ if_name, sizeof(if_name), ebuf) < 0) {
+ (void)close(kd);
+ return (-1);
+ }
+ sprintf(tifname, "%.*s%d",
+ (int)sizeof(if_name), if_name, ifnet.if_unit);
+ if (strcmp(tifname, ifname) == 0)
+ return (ifnet.if_index);
+ }
+
+ sprintf(ebuf, "Can't find %s", ifname);
+ return (-1);
+}
+
+static int
+dlpi_kread(register int fd, register off_t addr,
+ register void *buf, register u_int len, register char *ebuf)
+{
+ register int cc;
+
+ if (lseek(fd, addr, SEEK_SET) < 0) {
+ sprintf(ebuf, "lseek: %s", pcap_strerror(errno));
+ return (-1);
+ }
+ cc = read(fd, buf, len);
+ if (cc < 0) {
+ sprintf(ebuf, "read: %s", pcap_strerror(errno));
+ return (-1);
+ } else if (cc != len) {
+ sprintf(ebuf, "short read (%d != %d)", cc, len);
+ return (-1);
+ }
+ return (cc);
+}
+#endif
--- /dev/null
+/*
+ * Stanford Enetfilter subroutines for tcpdump
+ *
+ * Based on the MERIT NNstat etherifrt.c and the Ultrix pcap-pf.c
+ * subroutines.
+ *
+ * Rayan Zachariassen, CA*Net
+ */
+
+#include <sys/types.h>
+#include <sys/time.h>
+#include <sys/file.h>
+#include <sys/ioctl.h>
+#include <sys/socket.h>
+
+#include <net/if.h>
+#include <net/bpf.h>
+#include <net/enet.h>
+
+#include <netinet/in.h>
+#include <netinet/if_ether.h>
+
+#include <stdio.h>
+#include <errno.h>
+
+#include "interface.h"
+
+struct packet_header {
+#ifdef IBMRTPC
+ struct LengthWords length;
+ struct tap_header tap;
+#endif /* IBMRTPC */
+ u_char packet[8]
+};
+
+extern int errno;
+
+#define BUFSPACE (4*1024)
+
+/* Forwards */
+static void efReadError(int, char *);
+
+void
+readloop(int cnt, int if_fd, struct bpf_program *fp, printfunc printit)
+{
+#ifdef IBMRTPC
+ register struct packet_header *ph;
+ register u_char *bp;
+ register int inc;
+#else /* !IBMRTPC */
+ static struct timeval tv = { 0 };
+#endif /* IBMRTPC */
+ register int cc, caplen;
+ register struct bpf_insn *fcode = fp->bf_insns;
+ union {
+ struct packet_header hdr;
+ u_char p[BUFSPACE];
+ u_short s;
+ } buf;
+
+ while (1) {
+ if ((cc = read(if_fd, (char *)buf.p, sizeof(buf))) < 0)
+ efReadError(if_fd, "reader");
+
+#ifdef IBMRTPC
+ /*
+ * Loop through each packet.
+ */
+ bp = buf.p;
+ while (cc > 0) {
+ ph = (struct packet_header *)bp;
+ caplen = ph->tap.th_wirelen > snaplen ? snaplen : ph->tap
+.th_wirelen ;
+ if (bpf_filter(fcode, (char *)ph->packet,
+ ph->tap.th_wirelen, caplen)) {
+ if (cnt >= 0 && --cnt < 0)
+ goto out;
+ (*printit)((char *)ph->packet,
+ (struct timeval *)ph->tap.th_timestamp,
+ ph->tap.th_wirelen, caplen);
+ }
+ inc = ph->length.PacketOffset;
+ cc -= inc;
+ bp += inc;
+ }
+#else /* !IBMRTPC */
+ caplen = cc > snaplen ? snaplen : cc ;
+ if (bpf_filter(fcode, buf.hdr.packet, cc, caplen)) {
+ if (cnt >= 0 && --cnt < 0)
+ goto out;
+ (*printit)(buf.hdr.packet, &tv, cc, caplen);
+ }
+#endif /* IBMRTPC */
+ }
+ out:
+ wrapup(if_fd);
+}
+
+/* Call ONLY if read() has returned an error on packet filter */
+static void
+efReadError(int fid, char *msg)
+{
+ if (errno == EINVAL) { /* read MAXINT bytes already! */
+ if (lseek(fid, 0, 0) < 0) {
+ perror("tcpdump: efReadError/lseek");
+ exit(-1);
+ }
+ else
+ return;
+ }
+ else {
+ (void) fprintf(stderr, "tcpdump: ");
+ perror(msg);
+ exit(-1);
+ }
+}
+
+void
+wrapup(int fd)
+{
+#ifdef IBMRTPC
+ struct enstats es;
+
+ if (ioctl(fd, EIOSTATS, &es) == -1) {
+ perror("tcpdump: enet ioctl EIOSTATS error");
+ exit(-1);
+ }
+
+ fprintf(stderr, "%d packets queued", es.enStat_Rcnt);
+ if (es.enStat_Rdrops > 0)
+ fprintf(stderr, ", %d dropped", es.enStat_Rdrops);
+ if (es.enStat_Reads > 0)
+ fprintf(stderr, ", %d tcpdump %s", es.enStat_Reads,
+ es.enStat_Reads > 1 ? "reads" : "read");
+ if (es.enStat_MaxRead > 1)
+ fprintf(stderr, ", %d packets in largest read",
+ es.enStat_MaxRead);
+ putc('\n', stderr);
+#endif /* IBMRTPC */
+ close(fd);
+}
+
+int
+initdevice(char *device, int pflag, int *linktype)
+{
+ struct eniocb ctl;
+ struct enfilter filter;
+ u_int maxwaiting;
+ int if_fd;
+
+#ifdef IBMRTPC
+ GETENETDEVICE(0, O_RDONLY, &if_fd);
+#else /* !IBMRTPC */
+ if_fd = open("/dev/enet", O_RDONLY, 0);
+#endif /* IBMRTPC */
+
+ if (if_fd == -1) {
+ perror("tcpdump: enet open error");
+ error(
+"your system may not be properly configured; see \"man enet(4)\"");
+ exit(-1);
+ }
+
+ /* Get operating parameters. */
+
+ if (ioctl(if_fd, EIOCGETP, (char *)&ctl) == -1) {
+ perror("tcpdump: enet ioctl EIOCGETP error");
+ exit(-1);
+ }
+
+ /* Set operating parameters. */
+
+#ifdef IBMRTPC
+ ctl.en_rtout = 1 * ctl.en_hz;
+ ctl.en_tr_etherhead = 1;
+ ctl.en_tap_network = 1;
+ ctl.en_multi_packet = 1;
+ ctl.en_maxlen = BUFSPACE;
+#else /* !IBMRTPC */
+ ctl.en_rtout = 64; /* randomly picked value for HZ */
+#endif /* IBMRTPC */
+ if (ioctl(if_fd, EIOCSETP, &ctl) == -1) {
+ perror("tcpdump: enet ioctl EIOCSETP error");
+ exit(-1);
+ }
+
+ /* Flush the receive queue, since we've changed
+ the operating parameters and we otherwise might
+ receive data without headers. */
+
+ if (ioctl(if_fd, EIOCFLUSH) == -1) {
+ perror("tcpdump: enet ioctl EIOCFLUSH error");
+ exit(-1);
+ }
+
+ /* Set the receive queue depth to its maximum. */
+
+ maxwaiting = ctl.en_maxwaiting;
+ if (ioctl(if_fd, EIOCSETW, &maxwaiting) == -1) {
+ perror("tcpdump: enet ioctl EIOCSETW error");
+ exit(-1);
+ }
+
+#ifdef IBMRTPC
+ /* Clear statistics. */
+
+ if (ioctl(if_fd, EIOCLRSTAT, 0) == -1) {
+ perror("tcpdump: enet ioctl EIOCLRSTAT error");
+ exit(-1);
+ }
+#endif /* IBMRTPC */
+
+ /* Set the filter (accept all packets). */
+
+ filter.enf_Priority = 3;
+ filter.enf_FilterLen = 0;
+ if (ioctl(if_fd, EIOCSETF, &filter) == -1) {
+ perror("tcpdump: enet ioctl EIOCSETF error");
+ exit(-1);
+ }
+ /*
+ * "enetfilter" supports only ethernets.
+ */
+ *linktype = DLT_EN10MB;
+
+ return(if_fd);
+}
--- /dev/null
+/*
+ * Copyright (c) 1994, 1995, 1996
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the Computer Systems
+ * Engineering Group at Lawrence Berkeley Laboratory.
+ * 4. Neither the name of the University nor of the Laboratory may be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/pcap-int.h,v 1.1 1999/08/26 10:05:24 johana Exp $ (LBL)
+ */
+
+#ifndef pcap_int_h
+#define pcap_int_h
+
+#include <pcap.h>
+
+/*
+ * Savefile
+ */
+struct pcap_sf {
+ FILE *rfile;
+ int swapped;
+ int version_major;
+ int version_minor;
+ u_char *base;
+};
+
+struct pcap_md {
+ struct pcap_stat stat;
+ /*XXX*/
+ int use_bpf;
+ u_long TotPkts; /* can't oflow for 79 hrs on ether */
+ u_long TotAccepted; /* count accepted by filter */
+ u_long TotDrops; /* count of dropped packets */
+ long TotMissed; /* missed by i/f during this run */
+ long OrigMissed; /* missed by i/f before this run */
+#ifdef linux
+ int pad;
+ int skip;
+ char *device;
+#endif
+};
+
+struct pcap {
+ int fd;
+ int snapshot;
+ int linktype;
+ int tzoff; /* timezone offset */
+ int offset; /* offset for proper alignment */
+
+ struct pcap_sf sf;
+ struct pcap_md md;
+
+ /*
+ * Read buffer.
+ */
+ int bufsize;
+ u_char *buffer;
+ u_char *bp;
+ int cc;
+
+ /*
+ * Place holder for pcap_next().
+ */
+ u_char *pkt;
+
+
+ /*
+ * Placeholder for filter code if bpf not in kernel.
+ */
+ struct bpf_program fcode;
+
+ char errbuf[PCAP_ERRBUF_SIZE];
+};
+
+int yylex(void);
+
+#ifndef min
+#define min(a, b) ((a) > (b) ? (b) : (a))
+#endif
+
+/* XXX should these be in pcap.h? */
+int pcap_offline_read(pcap_t *, int, pcap_handler, u_char *);
+int pcap_read(pcap_t *, int cnt, pcap_handler, u_char *);
+
+/* Ultrix pads to make everything line up on a nice boundary */
+#if defined(ultrix) || defined(__alpha)
+#define PCAP_FDDIPAD 3
+#endif
+
+/* XXX */
+extern int pcap_fddipad;
+#endif
--- /dev/null
+/*
+ * Copyright (c) 1996, 1997
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ */
+#ifndef lint
+static const char rcsid[] =
+ "@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/pcap-linux.c,v 1.1 1999/08/26 10:05:24 johana Exp $ (LBL)";
+#endif
+
+#include <sys/param.h>
+#include <sys/ioctl.h>
+#include <sys/socket.h>
+#include <sys/time.h>
+
+#include <net/if.h>
+#ifdef HAVE_NET_IF_ARP_H
+#include <net/if_arp.h>
+#else
+#include <linux/if_arp.h>
+#endif
+#include <linux/if_ether.h>
+
+#include <netinet/in.h>
+
+#include <errno.h>
+#include <malloc.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+
+static struct ifreq saved_ifr;
+static int read_timout_ms = 0;
+
+#include "pcap-int.h"
+
+#include "gnuc.h"
+#ifdef HAVE_OS_PROTO_H
+#include "os-proto.h"
+#endif
+
+void linux_restore_ifr(void);
+
+int
+pcap_stats(pcap_t *p, struct pcap_stat *ps)
+{
+
+ *ps = p->md.stat;
+ return (0);
+}
+
+int
+pcap_read(pcap_t *p, int cnt, pcap_handler callback, u_char *user)
+{
+ register int cc;
+ register int bufsize;
+ register int caplen;
+ register u_char *bp;
+ struct sockaddr from;
+ int fromlen;
+
+ fd_set mask;
+ struct timeval tv;
+
+ if (read_timout_ms == 0) {
+ tv.tv_sec = 0;
+ tv.tv_usec = 0;
+ }
+ else {
+ tv.tv_sec = read_timout_ms/1000;
+ tv.tv_usec = read_timout_ms%1000;
+ }
+ FD_ZERO(&mask);
+ FD_SET(p->fd, &mask);
+
+ bp = p->buffer + p->offset;
+ bufsize = p->bufsize;
+ if (p->md.pad > 0) {
+ memset(bp, 0, p->md.pad);
+ bp += p->md.pad;
+ bufsize -= p->md.pad;
+ }
+
+again:
+ do {
+ fromlen = sizeof(from);
+ select(FD_SETSIZE, &mask, NULL, NULL, &tv);
+ if (FD_ISSET(p->fd, &mask) == 0) {
+ return (0);
+ }
+
+ cc = recvfrom(p->fd, bp, bufsize, 0, &from, &fromlen);
+ if (cc < 0) {
+ /* Don't choke when we get ptraced */
+ switch (errno) {
+
+ case EINTR:
+ goto again;
+
+ case EWOULDBLOCK:
+ return (0); /* XXX */
+ }
+ sprintf(p->errbuf, "read: %s", pcap_strerror(errno));
+ return (-1);
+ }
+ } while (strcmp(p->md.device, from.sa_data));
+
+ /* If we need have leading zero bytes, adjust count */
+ cc += p->md.pad;
+ bp = p->buffer + p->offset;
+
+ /* If we need to step over leading junk, adjust count and pointer */
+ cc -= p->md.skip;
+ bp += p->md.skip;
+
+ /* Captured length can't exceed our read buffer size */
+ caplen = cc;
+ if (caplen > bufsize)
+ caplen = bufsize;
+
+ /* Captured length can't exceed the snapshot length */
+ if (caplen > p->snapshot)
+ caplen = p->snapshot;
+
+ if (p->fcode.bf_insns == NULL ||
+ bpf_filter(p->fcode.bf_insns, bp, cc, caplen)) {
+ struct pcap_pkthdr h;
+
+ ++p->md.stat.ps_recv;
+ /* Get timestamp */
+ if (ioctl(p->fd, SIOCGSTAMP, &h.ts) < 0) {
+ sprintf(p->errbuf, "SIOCGSTAMP: %s",
+ pcap_strerror(errno));
+ return (-1);
+ }
+ h.len = cc;
+ h.caplen = caplen;
+ (*callback)(user, &h, bp);
+ return (1);
+ }
+ return (0);
+}
+
+pcap_t *
+pcap_open_live(char *device, int snaplen, int promisc, int to_ms, char *ebuf)
+{
+ register int fd, broadcast;
+ register pcap_t *p;
+ struct ifreq ifr;
+ struct sockaddr sa;
+
+ read_timout_ms = to_ms;
+ p = (pcap_t *)malloc(sizeof(*p));
+ if (p == NULL) {
+ sprintf(ebuf, "malloc: %s", pcap_strerror(errno));
+ return (NULL);
+ }
+ memset(p, 0, sizeof(*p));
+ fd = -1;
+
+ fd = socket(PF_INET, SOCK_PACKET, htons(ETH_P_ALL));
+ if (fd < 0) {
+ sprintf(ebuf, "socket: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ p->fd = fd;
+
+ /* Bind to the interface name */
+ memset(&sa, 0, sizeof(sa));
+ sa.sa_family = AF_INET;
+ (void)strncpy(sa.sa_data, device, sizeof(sa.sa_data));
+ if (bind(p->fd, &sa, sizeof(sa))) {
+ sprintf(ebuf, "bind: %s: %s", device, pcap_strerror(errno));
+ goto bad;
+ }
+
+ memset(&ifr, 0, sizeof(ifr));
+ strncpy(ifr.ifr_name, device, sizeof(ifr.ifr_name));
+ if (ioctl(p->fd, SIOCGIFHWADDR, &ifr) < 0 ) {
+ sprintf(ebuf, "SIOCGIFHWADDR: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ broadcast = 0;
+ switch (ifr.ifr_hwaddr.sa_family) {
+
+ case ARPHRD_ETHER:
+ case ARPHRD_METRICOM:
+ p->linktype = DLT_EN10MB;
+ p->offset = 2;
+ ++broadcast;
+ break;
+
+ case ARPHRD_EETHER:
+ p->linktype = DLT_EN3MB;
+ ++broadcast;
+ break;
+
+ case ARPHRD_AX25:
+ p->linktype = DLT_AX25;
+ ++broadcast;
+ break;
+
+ case ARPHRD_PRONET:
+ p->linktype = DLT_PRONET;
+ break;
+
+ case ARPHRD_CHAOS:
+ p->linktype = DLT_CHAOS;
+ break;
+
+ case ARPHRD_IEEE802:
+ p->linktype = DLT_IEEE802;
+ ++broadcast;
+ break;
+
+ case ARPHRD_ARCNET:
+ p->linktype = DLT_ARCNET;
+ ++broadcast;
+ break;
+
+ case ARPHRD_SLIP:
+ case ARPHRD_CSLIP:
+ case ARPHRD_SLIP6:
+ case ARPHRD_CSLIP6:
+ case ARPHRD_PPP:
+ p->linktype = DLT_RAW;
+ break;
+
+ case ARPHRD_LOOPBACK:
+ p->linktype = DLT_NULL;
+ p->md.pad = 2;
+ p->md.skip = 12;
+ break;
+
+#ifdef ARPHRD_FDDI
+ /* Not all versions of the kernel has this define */
+ case ARPHRD_FDDI:
+ p->linktype = DLT_FDDI;
+ ++broadcast;
+ break;
+#endif
+
+#ifdef notdef
+ case ARPHRD_LOCALTLK:
+ case ARPHRD_NETROM:
+ case ARPHRD_APPLETLK:
+ case ARPHRD_DLCI:
+ case ARPHRD_RSRVD:
+ case ARPHRD_ADAPT:
+ case ARPHRD_TUNNEL:
+ case ARPHRD_TUNNEL6:
+ case ARPHRD_FRAD:
+ case ARPHRD_SKIP:
+ /* XXX currently do not know what to do with these... */
+ abort();
+#endif
+
+ default:
+ sprintf(ebuf, "unknown physical layer type 0x%x",
+ ifr.ifr_hwaddr.sa_family);
+ goto bad;
+ }
+
+ /* Base the buffer size on the interface MTU */
+ memset(&ifr, 0, sizeof(ifr));
+ strncpy(ifr.ifr_name, device, sizeof(ifr.ifr_name));
+ if (ioctl(p->fd, SIOCGIFMTU, &ifr) < 0 ) {
+ sprintf(ebuf, "SIOCGIFMTU: %s", pcap_strerror(errno));
+ goto bad;
+ }
+
+ /* Leave room for link header (which is never large under linux...) */
+ p->bufsize = ifr.ifr_mtu + 64;
+
+ p->buffer = (u_char *)malloc(p->bufsize + p->offset);
+ if (p->buffer == NULL) {
+ sprintf(ebuf, "malloc: %s", pcap_strerror(errno));
+ goto bad;
+ }
+
+ /* XXX */
+ if (promisc && broadcast) {
+ memset(&ifr, 0, sizeof(ifr));
+ strcpy(ifr.ifr_name, device);
+ if (ioctl(p->fd, SIOCGIFFLAGS, &ifr) < 0 ) {
+ sprintf(ebuf, "SIOCGIFFLAGS: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ saved_ifr = ifr;
+ ifr.ifr_flags |= IFF_PROMISC;
+ if (ioctl(p->fd, SIOCSIFFLAGS, &ifr) < 0 ) {
+ sprintf(ebuf, "SIOCSIFFLAGS: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ ifr.ifr_flags &= ~IFF_PROMISC;
+ atexit(linux_restore_ifr);
+ }
+
+ p->md.device = strdup(device);
+ if (p->md.device == NULL) {
+ sprintf(ebuf, "malloc: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ p->snapshot = snaplen;
+
+ return (p);
+bad:
+ if (fd >= 0)
+ (void)close(fd);
+ if (p->buffer != NULL)
+ free(p->buffer);
+ if (p->md.device != NULL)
+ free(p->md.device);
+ free(p);
+ return (NULL);
+}
+
+int
+pcap_setfilter(pcap_t *p, struct bpf_program *fp)
+{
+
+ p->fcode = *fp;
+ return (0);
+}
+
+void
+linux_restore_ifr(void)
+{
+ register int fd;
+
+ fd = socket(PF_INET, SOCK_PACKET, htons(0x0003));
+ if (fd < 0)
+ fprintf(stderr, "linux socket: %s", pcap_strerror(errno));
+ else if (ioctl(fd, SIOCSIFFLAGS, &saved_ifr) < 0)
+ fprintf(stderr, "linux SIOCSIFFLAGS: %s", pcap_strerror(errno));
+}
--- /dev/null
+/*
+ * Copyright (c) 1994, 1996
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the Computer Systems
+ * Engineering Group at Lawrence Berkeley Laboratory.
+ * 4. Neither the name of the University nor of the Laboratory may be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/pcap-namedb.h,v 1.1 1999/08/26 10:05:24 johana Exp $ (LBL)
+ */
+
+#ifndef lib_pcap_ethers_h
+#define lib_pcap_ethers_h
+
+/*
+ * As returned by the pcap_next_etherent()
+ * XXX this stuff doesn't belong in this interface, but this
+ * library already must do name to address translation, so
+ * on systems that don't have support for /etc/ethers, we
+ * export these hooks since they'll
+ */
+struct pcap_etherent {
+ u_char addr[6];
+ char name[122];
+};
+#ifndef PCAP_ETHERS_FILE
+#define PCAP_ETHERS_FILE "/etc/ethers"
+#endif
+struct pcap_etherent *pcap_next_etherent(FILE *);
+u_char *pcap_ether_hostton(const char*);
+u_char *pcap_ether_aton(const char *);
+
+bpf_u_int32 **pcap_nametoaddr(const char *);
+bpf_u_int32 pcap_nametonetaddr(const char *);
+
+int pcap_nametoport(const char *, int *, int *);
+int pcap_nametoproto(const char *);
+int pcap_nametoeproto(const char *);
+/*
+ * If a protocol is unknown, PROTO_UNDEF is returned.
+ * Also, pcap_nametoport() returns the protocol along with the port number.
+ * If there are ambiguous entried in /etc/services (i.e. domain
+ * can be either tcp or udp) PROTO_UNDEF is returned.
+ */
+#define PROTO_UNDEF -1
+
+/* XXX move these to pcap-int.h? */
+int __pcap_atodn(const char *, bpf_u_int32 *);
+int __pcap_atoin(const char *, bpf_u_int32 *);
+u_short __pcap_nametodnaddr(const char *);
+
+#endif
--- /dev/null
+/*
+ * Copyright (c) 1990, 1991, 1992, 1993, 1994, 1995, 1996
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ */
+#ifndef lint
+static const char rcsid[] =
+ "@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/pcap-nit.c,v 1.1 1999/08/26 10:05:24 johana Exp $ (LBL)";
+#endif
+
+#include <sys/types.h>
+#include <sys/time.h>
+#include <sys/timeb.h>
+#include <sys/file.h>
+#include <sys/ioctl.h>
+#include <sys/socket.h>
+
+#include <net/if.h>
+#include <net/nit.h>
+
+#include <netinet/in.h>
+#include <netinet/in_systm.h>
+#include <netinet/ip.h>
+#include <netinet/if_ether.h>
+#include <netinet/ip_var.h>
+#include <netinet/udp.h>
+#include <netinet/udp_var.h>
+#include <netinet/tcp.h>
+#include <netinet/tcpip.h>
+
+#include <ctype.h>
+#include <errno.h>
+#include <stdio.h>
+
+#include "pcap-int.h"
+
+#include "gnuc.h"
+#ifdef HAVE_OS_PROTO_H
+#include "os-proto.h"
+#endif
+
+/*
+ * The chunk size for NIT. This is the amount of buffering
+ * done for read calls.
+ */
+#define CHUNKSIZE (2*1024)
+
+/*
+ * The total buffer space used by NIT.
+ */
+#define BUFSPACE (4*CHUNKSIZE)
+
+/* Forwards */
+static int nit_setflags(int, int, int, char *);
+
+int
+pcap_stats(pcap_t *p, struct pcap_stat *ps)
+{
+
+ *ps = p->md.stat;
+ return (0);
+}
+
+int
+pcap_read(pcap_t *p, int cnt, pcap_handler callback, u_char *user)
+{
+ register int cc, n;
+ register struct bpf_insn *fcode = p->fcode.bf_insns;
+ register u_char *bp, *cp, *ep;
+ register struct nit_hdr *nh;
+ register int caplen;
+
+ cc = p->cc;
+ if (cc == 0) {
+ cc = read(p->fd, (char *)p->buffer, p->bufsize);
+ if (cc < 0) {
+ if (errno == EWOULDBLOCK)
+ return (0);
+ sprintf(p->errbuf, "pcap_read: %s",
+ pcap_strerror(errno));
+ return (-1);
+ }
+ bp = p->buffer;
+ } else
+ bp = p->bp;
+
+ /*
+ * Loop through each packet. The increment expression
+ * rounds up to the next int boundary past the end of
+ * the previous packet.
+ */
+ n = 0;
+ ep = bp + cc;
+ while (bp < ep) {
+ nh = (struct nit_hdr *)bp;
+ cp = bp + sizeof(*nh);
+
+ switch (nh->nh_state) {
+
+ case NIT_CATCH:
+ break;
+
+ case NIT_NOMBUF:
+ case NIT_NOCLUSTER:
+ case NIT_NOSPACE:
+ p->md.stat.ps_drop = nh->nh_dropped;
+ continue;
+
+ case NIT_SEQNO:
+ continue;
+
+ default:
+ sprintf(p->errbuf, "bad nit state %d", nh->nh_state);
+ return (-1);
+ }
+ ++p->md.stat.ps_recv;
+ bp += ((sizeof(struct nit_hdr) + nh->nh_datalen +
+ sizeof(int) - 1) & ~(sizeof(int) - 1));
+
+ caplen = nh->nh_wirelen;
+ if (caplen > p->snapshot)
+ caplen = p->snapshot;
+ if (bpf_filter(fcode, cp, nh->nh_wirelen, caplen)) {
+ struct pcap_pkthdr h;
+ h.ts = nh->nh_timestamp;
+ h.len = nh->nh_wirelen;
+ h.caplen = caplen;
+ (*callback)(user, &h, cp);
+ if (++n >= cnt && cnt >= 0) {
+ p->cc = ep - bp;
+ p->bp = bp;
+ return (n);
+ }
+ }
+ }
+ p->cc = 0;
+ return (n);
+}
+
+static int
+nit_setflags(int fd, int promisc, int to_ms, char *ebuf)
+{
+ struct nit_ioc nioc;
+
+ bzero((char *)&nioc, sizeof(nioc));
+ nioc.nioc_bufspace = BUFSPACE;
+ nioc.nioc_chunksize = CHUNKSIZE;
+ nioc.nioc_typetomatch = NT_ALLTYPES;
+ nioc.nioc_snaplen = p->snapshot;
+ nioc.nioc_bufalign = sizeof(int);
+ nioc.nioc_bufoffset = 0;
+
+ if (to_ms != 0) {
+ nioc.nioc_flags |= NF_TIMEOUT;
+ nioc.nioc_timeout.tv_sec = to_ms / 1000;
+ nioc.nioc_timeout.tv_usec = (to_ms * 1000) % 1000000;
+ }
+ if (promisc)
+ nioc.nioc_flags |= NF_PROMISC;
+
+ if (ioctl(fd, SIOCSNIT, &nioc) < 0) {
+ sprintf(ebuf, "SIOCSNIT: %s", pcap_strerror(errno));
+ return (-1);
+ }
+ return (0);
+}
+
+pcap_t *
+pcap_open_live(char *device, int snaplen, int promisc, int to_ms, char *ebuf)
+{
+ int fd;
+ struct sockaddr_nit snit;
+ register pcap_t *p;
+
+ p = (pcap_t *)malloc(sizeof(*p));
+ if (p == NULL) {
+ strcpy(ebuf, pcap_strerror(errno));
+ return (NULL);
+ }
+
+ if (snaplen < 96)
+ /*
+ * NIT requires a snapshot length of at least 96.
+ */
+ snaplen = 96;
+
+ bzero(p, sizeof(*p));
+ p->fd = fd = socket(AF_NIT, SOCK_RAW, NITPROTO_RAW);
+ if (fd < 0) {
+ sprintf(ebuf, "socket: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ snit.snit_family = AF_NIT;
+ (void)strncpy(snit.snit_ifname, device, NITIFSIZ);
+
+ if (bind(fd, (struct sockaddr *)&snit, sizeof(snit))) {
+ sprintf(ebuf, "bind: %s: %s", snit.snit_ifname,
+ pcap_strerror(errno));
+ goto bad;
+ }
+ p->snapshot = snaplen;
+ nit_setflags(p->fd, promisc, to_ms, ebuf);
+
+ /*
+ * NIT supports only ethernets.
+ */
+ p->linktype = DLT_EN10MB;
+
+ p->bufsize = BUFSPACE;
+ p->buffer = (u_char *)malloc(p->bufsize);
+ if (p->buffer == NULL) {
+ strcpy(ebuf, pcap_strerror(errno));
+ goto bad;
+ }
+ return (p);
+ bad:
+ if (fd >= 0)
+ close(fd);
+ free(p);
+ return (NULL);
+}
+
+int
+pcap_setfilter(pcap_t *p, struct bpf_program *fp)
+{
+
+ p->fcode = *fp;
+ return (0);
+}
--- /dev/null
+/*
+ * Copyright (c) 1990, 1994
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms are permitted
+ * provided that the above copyright notice and this paragraph are
+ * duplicated in all such forms and that any documentation,
+ * advertising materials, and other materials related to such
+ * distribution and use acknowledge that the software was developed
+ * by the University of California, Lawrence Berkeley Laboratory,
+ * Berkeley, CA. The name of the University may not be used to
+ * endorse or promote products derived from this software without
+ * specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
+ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ * @(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/pcap-nit.h,v 1.1 1999/08/26 10:05:25 johana Exp $ (LBL)
+ */
--- /dev/null
+/*
+ * Copyright (c) 1994, 1995, 1996
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ */
+#ifndef lint
+static const char rcsid[] =
+ "@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/pcap-null.c,v 1.1 1999/08/26 10:05:25 johana Exp $ (LBL)";
+#endif
+
+#include <sys/param.h> /* optionally get BSD define */
+
+#include <string.h>
+
+#include "gnuc.h"
+#ifdef HAVE_OS_PROTO_H
+#include "os-proto.h"
+#endif
+
+#include "pcap-int.h"
+
+static char nosup[] = "live packet capture not supported on this system";
+
+int
+pcap_stats(pcap_t *p, struct pcap_stat *ps)
+{
+
+ (void)sprintf(p->errbuf, "pcap_stats: %s", nosup);
+ return (-1);
+}
+
+int
+pcap_read(pcap_t *p, int cnt, pcap_handler callback, u_char *user)
+{
+
+ (void)sprintf(p->errbuf, "pcap_read: %s", nosup);
+ return (-1);
+}
+
+pcap_t *
+pcap_open_live(char *device, int snaplen, int promisc, int to_ms, char *ebuf)
+{
+
+ (void)strcpy(ebuf, nosup);
+ return (NULL);
+}
+
+int
+pcap_setfilter(pcap_t *p, struct bpf_program *fp)
+{
+
+ if (p->sf.rfile == NULL) {
+ (void)sprintf(p->errbuf, "pcap_setfilter: %s", nosup);
+ return (-1);
+ }
+ p->fcode = *fp;
+ return (0);
+}
--- /dev/null
+/*
+ * Copyright (c) 1990, 1991, 1992, 1993, 1994, 1995, 1996
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ * packet filter subroutines for tcpdump
+ * Extraction/creation by Jeffrey Mogul, DECWRL
+ */
+
+#ifndef lint
+static const char rcsid[] =
+ "@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/pcap-pf.c,v 1.1 1999/08/26 10:05:25 johana Exp $ (LBL)";
+#endif
+
+#include <sys/types.h>
+#include <sys/time.h>
+#include <sys/timeb.h>
+#include <sys/socket.h>
+#include <sys/file.h>
+#include <sys/ioctl.h>
+#include <net/pfilt.h>
+
+#if __STDC__
+struct mbuf;
+struct rtentry;
+#endif
+
+#include <net/if.h>
+
+#include <netinet/in.h>
+#include <netinet/in_systm.h>
+#include <netinet/ip.h>
+#include <netinet/if_ether.h>
+#include <netinet/ip_var.h>
+#include <netinet/udp.h>
+#include <netinet/udp_var.h>
+#include <netinet/tcp.h>
+#include <netinet/tcpip.h>
+
+#include <ctype.h>
+#include <errno.h>
+#include <netdb.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+
+#include "pcap-int.h"
+
+#include "gnuc.h"
+#ifdef HAVE_OS_PROTO_H
+#include "os-proto.h"
+#endif
+
+/*
+ * BUFSPACE is the size in bytes of the packet read buffer. Most tcpdump
+ * applications aren't going to need more than 200 bytes of packet header
+ * and the read shouldn't return more packets than packetfilter's internal
+ * queue limit (bounded at 256).
+ */
+#define BUFSPACE (200 * 256)
+
+int
+pcap_read(pcap_t *pc, int cnt, pcap_handler callback, u_char *user)
+{
+ register u_char *p, *bp;
+ struct bpf_insn *fcode;
+ register int cc, n, buflen, inc;
+ register struct enstamp *sp;
+#ifdef LBL_ALIGN
+ struct enstamp stamp;
+#endif
+#ifdef PCAP_FDDIPAD
+ register int pad;
+#endif
+
+ fcode = pc->md.use_bpf ? NULL : pc->fcode.bf_insns;
+ again:
+ cc = pc->cc;
+ if (cc == 0) {
+ cc = read(pc->fd, (char *)pc->buffer + pc->offset, pc->bufsize);
+ if (cc < 0) {
+ if (errno == EWOULDBLOCK)
+ return (0);
+ if (errno == EINVAL &&
+ lseek(pc->fd, 0L, SEEK_CUR) + pc->bufsize < 0) {
+ /*
+ * Due to a kernel bug, after 2^31 bytes,
+ * the kernel file offset overflows and
+ * read fails with EINVAL. The lseek()
+ * to 0 will fix things.
+ */
+ (void)lseek(pc->fd, 0L, SEEK_SET);
+ goto again;
+ }
+ sprintf(pc->errbuf, "pf read: %s",
+ pcap_strerror(errno));
+ return (-1);
+ }
+ bp = pc->buffer + pc->offset;
+ } else
+ bp = pc->bp;
+ /*
+ * Loop through each packet.
+ */
+ n = 0;
+#ifdef PCAP_FDDIPAD
+ if (pc->linktype == DLT_FDDI)
+ pad = pcap_fddipad;
+ else
+ pad = 0;
+#endif
+ while (cc > 0) {
+ if (cc < sizeof(*sp)) {
+ sprintf(pc->errbuf, "pf short read (%d)", cc);
+ return (-1);
+ }
+#ifdef LBL_ALIGN
+ if ((long)bp & 3) {
+ sp = &stamp;
+ memcpy((char *)sp, (char *)bp, sizeof(*sp));
+ } else
+#endif
+ sp = (struct enstamp *)bp;
+ if (sp->ens_stamplen != sizeof(*sp)) {
+ sprintf(pc->errbuf, "pf short stamplen (%d)",
+ sp->ens_stamplen);
+ return (-1);
+ }
+
+ p = bp + sp->ens_stamplen;
+ buflen = sp->ens_count;
+ if (buflen > pc->snapshot)
+ buflen = pc->snapshot;
+
+ /* Calculate inc before possible pad update */
+ inc = ENALIGN(buflen + sp->ens_stamplen);
+ cc -= inc;
+ bp += inc;
+#ifdef PCAP_FDDIPAD
+ p += pad;
+ buflen -= pad;
+#endif
+ pc->md.TotPkts++;
+ pc->md.TotDrops += sp->ens_dropped;
+ pc->md.TotMissed = sp->ens_ifoverflows;
+ if (pc->md.OrigMissed < 0)
+ pc->md.OrigMissed = pc->md.TotMissed;
+
+ /*
+ * Short-circuit evaluation: if using BPF filter
+ * in kernel, no need to do it now.
+ */
+ if (fcode == NULL ||
+ bpf_filter(fcode, p, sp->ens_count, buflen)) {
+ struct pcap_pkthdr h;
+ pc->md.TotAccepted++;
+ h.ts = sp->ens_tstamp;
+#ifdef PCAP_FDDIPAD
+ h.len = sp->ens_count - pad;
+#else
+ h.len = sp->ens_count;
+#endif
+ h.caplen = buflen;
+ (*callback)(user, &h, p);
+ if (++n >= cnt && cnt > 0) {
+ pc->cc = cc;
+ pc->bp = bp;
+ return (n);
+ }
+ }
+ }
+ pc->cc = 0;
+ return (n);
+}
+
+int
+pcap_stats(pcap_t *p, struct pcap_stat *ps)
+{
+
+ ps->ps_recv = p->md.TotAccepted;
+ ps->ps_drop = p->md.TotDrops;
+ ps->ps_ifdrop = p->md.TotMissed - p->md.OrigMissed;
+ return (0);
+}
+
+pcap_t *
+pcap_open_live(char *device, int snaplen, int promisc, int to_ms, char *ebuf)
+{
+ pcap_t *p;
+ short enmode;
+ int backlog = -1; /* request the most */
+ struct enfilter Filter;
+ struct endevp devparams;
+
+ p = (pcap_t *)malloc(sizeof(*p));
+ if (p == NULL) {
+ sprintf(ebuf, "pcap_open_live: %s", pcap_strerror(errno));
+ return (0);
+ }
+ bzero((char *)p, sizeof(*p));
+ p->fd = pfopen(device, O_RDONLY);
+ if (p->fd < 0) {
+ sprintf(ebuf, "pf open: %s: %s\n\
+your system may not be properly configured; see \"man packetfilter(4)\"\n",
+ device, pcap_strerror(errno));
+ goto bad;
+ }
+ p->md.OrigMissed = -1;
+ enmode = ENTSTAMP|ENBATCH|ENNONEXCL;
+ if (promisc)
+ enmode |= ENPROMISC;
+ if (ioctl(p->fd, EIOCMBIS, (caddr_t)&enmode) < 0) {
+ sprintf(ebuf, "EIOCMBIS: %s", pcap_strerror(errno));
+ goto bad;
+ }
+#ifdef ENCOPYALL
+ /* Try to set COPYALL mode so that we see packets to ourself */
+ enmode = ENCOPYALL;
+ (void)ioctl(p->fd, EIOCMBIS, (caddr_t)&enmode);/* OK if this fails */
+#endif
+ /* set the backlog */
+ if (ioctl(p->fd, EIOCSETW, (caddr_t)&backlog) < 0) {
+ sprintf(ebuf, "EIOCSETW: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ /* discover interface type */
+ if (ioctl(p->fd, EIOCDEVP, (caddr_t)&devparams) < 0) {
+ sprintf(ebuf, "EIOCDEVP: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ /* HACK: to compile prior to Ultrix 4.2 */
+#ifndef ENDT_FDDI
+#define ENDT_FDDI 4
+#endif
+ switch (devparams.end_dev_type) {
+
+ case ENDT_10MB:
+ p->linktype = DLT_EN10MB;
+ p->offset = 2;
+ break;
+
+ case ENDT_FDDI:
+ p->linktype = DLT_FDDI;
+ break;
+
+ default:
+ /*
+ * XXX
+ * Currently, the Ultrix packet filter supports only
+ * Ethernet and FDDI. Eventually, support for SLIP and PPP
+ * (and possibly others: T1?) should be added.
+ */
+#ifdef notdef
+ warning(
+ "Packet filter data-link type %d unknown, assuming Ethernet",
+ devparams.end_dev_type);
+#endif
+ p->linktype = DLT_EN10MB;
+ p->offset = 2;
+ break;
+ }
+ /* set truncation */
+#ifdef PCAP_FDDIPAD
+ if (p->linktype == DLT_FDDI)
+ /* packetfilter includes the padding in the snapshot */
+ snaplen += pcap_fddipad;
+#endif
+ if (ioctl(p->fd, EIOCTRUNCATE, (caddr_t)&snaplen) < 0) {
+ sprintf(ebuf, "EIOCTRUNCATE: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ p->snapshot = snaplen;
+ /* accept all packets */
+ bzero((char *)&Filter, sizeof(Filter));
+ Filter.enf_Priority = 37; /* anything > 2 */
+ Filter.enf_FilterLen = 0; /* means "always true" */
+ if (ioctl(p->fd, EIOCSETF, (caddr_t)&Filter) < 0) {
+ sprintf(ebuf, "EIOCSETF: %s", pcap_strerror(errno));
+ goto bad;
+ }
+
+ if (to_ms != 0) {
+ struct timeval timeout;
+ timeout.tv_sec = to_ms / 1000;
+ timeout.tv_usec = (to_ms * 1000) % 1000000;
+ if (ioctl(p->fd, EIOCSRTIMEOUT, (caddr_t)&timeout) < 0) {
+ sprintf(ebuf, "EIOCSRTIMEOUT: %s",
+ pcap_strerror(errno));
+ goto bad;
+ }
+ }
+ p->bufsize = BUFSPACE;
+ p->buffer = (u_char*)malloc(p->bufsize + p->offset);
+
+ return (p);
+ bad:
+ free(p);
+ return (NULL);
+}
+
+int
+pcap_setfilter(pcap_t *p, struct bpf_program *fp)
+{
+ /*
+ * See if BIOCSETF works. If it does, the kernel supports
+ * BPF-style filters, and we do not need to do post-filtering.
+ */
+ p->md.use_bpf = (ioctl(p->fd, BIOCSETF, (caddr_t)fp) >= 0);
+ if (p->md.use_bpf) {
+ struct bpf_version bv;
+
+ if (ioctl(p->fd, BIOCVERSION, (caddr_t)&bv) < 0) {
+ sprintf(p->errbuf, "BIOCVERSION: %s",
+ pcap_strerror(errno));
+ return (-1);
+ }
+ else if (bv.bv_major != BPF_MAJOR_VERSION ||
+ bv.bv_minor < BPF_MINOR_VERSION) {
+ fprintf(stderr,
+ "requires bpf language %d.%d or higher; kernel is %d.%d",
+ BPF_MAJOR_VERSION, BPF_MINOR_VERSION,
+ bv.bv_major, bv.bv_minor);
+ /* don't give up, just be inefficient */
+ p->md.use_bpf = 0;
+ }
+ } else
+ p->fcode = *fp;
+
+ /*XXX this goes in tcpdump*/
+ if (p->md.use_bpf)
+ fprintf(stderr, "tcpdump: Using kernel BPF filter\n");
+ else
+ fprintf(stderr, "tcpdump: Filtering in user process\n");
+ return (0);
+}
--- /dev/null
+/*
+ * Copyright (c) 1990, 1994
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms are permitted
+ * provided that the above copyright notice and this paragraph are
+ * duplicated in all such forms and that any documentation,
+ * advertising materials, and other materials related to such
+ * distribution and use acknowledge that the software was developed
+ * by the University of California, Lawrence Berkeley Laboratory,
+ * Berkeley, CA. The name of the University may not be used to
+ * endorse or promote products derived from this software without
+ * specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
+ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ * @(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/pcap-pf.h,v 1.1 1999/08/26 10:05:25 johana Exp $ (LBL)
+ */
--- /dev/null
+/*
+ * Copyright (c) 1990, 1991, 1992, 1993, 1994, 1995, 1996
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ * Modifications made to accommodate the new SunOS4.0 NIT facility by
+ * Micky Liu, micky@cunixc.cc.columbia.edu, Columbia University in May, 1989.
+ * This module now handles the STREAMS based NIT.
+ */
+
+#ifndef lint
+static const char rcsid[] =
+ "@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/pcap-snit.c,v 1.1 1999/08/26 10:05:25 johana Exp $ (LBL)";
+#endif
+
+#include <sys/types.h>
+#include <sys/time.h>
+#include <sys/timeb.h>
+#include <sys/dir.h>
+#include <sys/fcntlcom.h>
+#include <sys/file.h>
+#include <sys/ioctl.h>
+#include <sys/socket.h>
+#include <sys/stropts.h>
+
+#include <net/if.h>
+#include <net/nit.h>
+#include <net/nit_if.h>
+#include <net/nit_pf.h>
+#include <net/nit_buf.h>
+
+#include <netinet/in.h>
+#include <netinet/in_systm.h>
+#include <netinet/ip.h>
+#include <netinet/if_ether.h>
+#include <netinet/ip_var.h>
+#include <netinet/udp.h>
+#include <netinet/udp_var.h>
+#include <netinet/tcp.h>
+#include <netinet/tcpip.h>
+
+#include <ctype.h>
+#include <errno.h>
+#ifdef HAVE_MALLOC_H
+#include <malloc.h>
+#endif
+#include <stdio.h>
+#include <string.h>
+#include <unistd.h>
+
+#include "pcap-int.h"
+
+#include "gnuc.h"
+#ifdef HAVE_OS_PROTO_H
+#include "os-proto.h"
+#endif
+
+/*
+ * The chunk size for NIT. This is the amount of buffering
+ * done for read calls.
+ */
+#define CHUNKSIZE (2*1024)
+
+/*
+ * The total buffer space used by NIT.
+ */
+#define BUFSPACE (4*CHUNKSIZE)
+
+/* Forwards */
+static int nit_setflags(int, int, int, char *);
+
+int
+pcap_stats(pcap_t *p, struct pcap_stat *ps)
+{
+
+ *ps = p->md.stat;
+ return (0);
+}
+
+int
+pcap_read(pcap_t *p, int cnt, pcap_handler callback, u_char *user)
+{
+ register int cc, n;
+ register struct bpf_insn *fcode = p->fcode.bf_insns;
+ register u_char *bp, *cp, *ep;
+ register struct nit_bufhdr *hdrp;
+ register struct nit_iftime *ntp;
+ register struct nit_iflen *nlp;
+ register struct nit_ifdrops *ndp;
+ register int caplen;
+
+ cc = p->cc;
+ if (cc == 0) {
+ cc = read(p->fd, (char *)p->buffer, p->bufsize);
+ if (cc < 0) {
+ if (errno == EWOULDBLOCK)
+ return (0);
+ sprintf(p->errbuf, "pcap_read: %s",
+ pcap_strerror(errno));
+ return (-1);
+ }
+ bp = p->buffer;
+ } else
+ bp = p->bp;
+
+ /*
+ * loop through each snapshot in the chunk
+ */
+ n = 0;
+ ep = bp + cc;
+ while (bp < ep) {
+ ++p->md.stat.ps_recv;
+ cp = bp;
+
+ /* get past NIT buffer */
+ hdrp = (struct nit_bufhdr *)cp;
+ cp += sizeof(*hdrp);
+
+ /* get past NIT timer */
+ ntp = (struct nit_iftime *)cp;
+ cp += sizeof(*ntp);
+
+ ndp = (struct nit_ifdrops *)cp;
+ p->md.stat.ps_drop = ndp->nh_drops;
+ cp += sizeof *ndp;
+
+ /* get past packet len */
+ nlp = (struct nit_iflen *)cp;
+ cp += sizeof(*nlp);
+
+ /* next snapshot */
+ bp += hdrp->nhb_totlen;
+
+ caplen = nlp->nh_pktlen;
+ if (caplen > p->snapshot)
+ caplen = p->snapshot;
+
+ if (bpf_filter(fcode, cp, nlp->nh_pktlen, caplen)) {
+ struct pcap_pkthdr h;
+ h.ts = ntp->nh_timestamp;
+ h.len = nlp->nh_pktlen;
+ h.caplen = caplen;
+ (*callback)(user, &h, cp);
+ if (++n >= cnt && cnt >= 0) {
+ p->cc = ep - bp;
+ p->bp = bp;
+ return (n);
+ }
+ }
+ }
+ p->cc = 0;
+ return (n);
+}
+
+static int
+nit_setflags(int fd, int promisc, int to_ms, char *ebuf)
+{
+ bpf_u_int32 flags;
+ struct strioctl si;
+ struct timeval timeout;
+
+ si.ic_timout = INFTIM;
+ if (to_ms != 0) {
+ timeout.tv_sec = to_ms / 1000;
+ timeout.tv_usec = (to_ms * 1000) % 1000000;
+ si.ic_cmd = NIOCSTIME;
+ si.ic_len = sizeof(timeout);
+ si.ic_dp = (char *)&timeout;
+ if (ioctl(fd, I_STR, (char *)&si) < 0) {
+ sprintf(ebuf, "NIOCSTIME: %s", pcap_strerror(errno));
+ return (-1);
+ }
+ }
+ flags = NI_TIMESTAMP | NI_LEN | NI_DROPS;
+ if (promisc)
+ flags |= NI_PROMISC;
+ si.ic_cmd = NIOCSFLAGS;
+ si.ic_len = sizeof(flags);
+ si.ic_dp = (char *)&flags;
+ if (ioctl(fd, I_STR, (char *)&si) < 0) {
+ sprintf(ebuf, "NIOCSFLAGS: %s", pcap_strerror(errno));
+ return (-1);
+ }
+ return (0);
+}
+
+pcap_t *
+pcap_open_live(char *device, int snaplen, int promisc, int to_ms, char *ebuf)
+{
+ struct strioctl si; /* struct for ioctl() */
+ struct ifreq ifr; /* interface request struct */
+ int chunksize = CHUNKSIZE;
+ int fd;
+ static char dev[] = "/dev/nit";
+ register pcap_t *p;
+
+ p = (pcap_t *)malloc(sizeof(*p));
+ if (p == NULL) {
+ strcpy(ebuf, pcap_strerror(errno));
+ return (NULL);
+ }
+
+ if (snaplen < 96)
+ /*
+ * NIT requires a snapshot length of at least 96.
+ */
+ snaplen = 96;
+
+ bzero(p, sizeof(*p));
+ p->fd = fd = open(dev, O_RDONLY);
+ if (fd < 0) {
+ sprintf(ebuf, "%s: %s", dev, pcap_strerror(errno));
+ goto bad;
+ }
+
+ /* arrange to get discrete messages from the STREAM and use NIT_BUF */
+ if (ioctl(fd, I_SRDOPT, (char *)RMSGD) < 0) {
+ sprintf(ebuf, "I_SRDOPT: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ if (ioctl(fd, I_PUSH, "nbuf") < 0) {
+ sprintf(ebuf, "push nbuf: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ /* set the chunksize */
+ si.ic_cmd = NIOCSCHUNK;
+ si.ic_timout = INFTIM;
+ si.ic_len = sizeof(chunksize);
+ si.ic_dp = (char *)&chunksize;
+ if (ioctl(fd, I_STR, (char *)&si) < 0) {
+ sprintf(ebuf, "NIOCSCHUNK: %s", pcap_strerror(errno));
+ goto bad;
+ }
+
+ /* request the interface */
+ strncpy(ifr.ifr_name, device, sizeof(ifr.ifr_name));
+ ifr.ifr_name[sizeof(ifr.ifr_name) - 1] = ' ';
+ si.ic_cmd = NIOCBIND;
+ si.ic_len = sizeof(ifr);
+ si.ic_dp = (char *)𝔦
+ if (ioctl(fd, I_STR, (char *)&si) < 0) {
+ sprintf(ebuf, "NIOCBIND: %s: %s",
+ ifr.ifr_name, pcap_strerror(errno));
+ goto bad;
+ }
+
+ /* set the snapshot length */
+ si.ic_cmd = NIOCSSNAP;
+ si.ic_len = sizeof(snaplen);
+ si.ic_dp = (char *)&snaplen;
+ if (ioctl(fd, I_STR, (char *)&si) < 0) {
+ sprintf(ebuf, "NIOCSSNAP: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ p->snapshot = snaplen;
+ if (nit_setflags(p->fd, promisc, to_ms, ebuf) < 0)
+ goto bad;
+
+ (void)ioctl(fd, I_FLUSH, (char *)FLUSHR);
+ /*
+ * NIT supports only ethernets.
+ */
+ p->linktype = DLT_EN10MB;
+
+ p->bufsize = BUFSPACE;
+ p->buffer = (u_char *)malloc(p->bufsize);
+ if (p->buffer == NULL) {
+ strcpy(ebuf, pcap_strerror(errno));
+ goto bad;
+ }
+ return (p);
+ bad:
+ if (fd >= 0)
+ close(fd);
+ free(p);
+ return (NULL);
+}
+
+int
+pcap_setfilter(pcap_t *p, struct bpf_program *fp)
+{
+
+ p->fcode = *fp;
+ return (0);
+}
--- /dev/null
+/*
+ * Copyright (c) 1993, 1994, 1995, 1996, 1997
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ */
+#ifndef lint
+static const char rcsid[] =
+ "@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/pcap-snoop.c,v 1.1 1999/08/26 10:05:26 johana Exp $ (LBL)";
+#endif
+
+#include <sys/param.h>
+#include <sys/file.h>
+#include <sys/ioctl.h>
+#include <sys/socket.h>
+#include <sys/time.h>
+
+#include <net/raw.h>
+#include <net/if.h>
+
+#include <netinet/in.h>
+#include <netinet/in_systm.h>
+#include <netinet/ip.h>
+#include <netinet/if_ether.h>
+#include <netinet/ip_var.h>
+#include <netinet/udp.h>
+#include <netinet/udp_var.h>
+#include <netinet/tcp.h>
+#include <netinet/tcpip.h>
+
+#include <errno.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+
+#include "pcap-int.h"
+
+#include "gnuc.h"
+#ifdef HAVE_OS_PROTO_H
+#include "os-proto.h"
+#endif
+
+int
+pcap_read(pcap_t *p, int cnt, pcap_handler callback, u_char *user)
+{
+ int cc;
+ register struct snoopheader *sh;
+ register int datalen;
+ register int caplen;
+ register u_char *cp;
+
+again:
+ cc = read(p->fd, (char *)p->buffer, p->bufsize);
+ if (cc < 0) {
+ /* Don't choke when we get ptraced */
+ switch (errno) {
+
+ case EINTR:
+ goto again;
+
+ case EWOULDBLOCK:
+ return (0); /* XXX */
+ }
+ sprintf(p->errbuf, "read: %s", pcap_strerror(errno));
+ return (-1);
+ }
+ sh = (struct snoopheader *)p->buffer;
+ datalen = sh->snoop_packetlen;
+ caplen = (datalen < p->snapshot) ? datalen : p->snapshot;
+ cp = (u_char *)(sh + 1) + p->offset; /* XXX */
+
+ if (p->fcode.bf_insns == NULL ||
+ bpf_filter(p->fcode.bf_insns, cp, datalen, caplen)) {
+ struct pcap_pkthdr h;
+ ++p->md.stat.ps_recv;
+ h.ts = sh->snoop_timestamp;
+ h.len = datalen;
+ h.caplen = caplen;
+ (*callback)(user, &h, cp);
+ return (1);
+ }
+ return (0);
+}
+
+int
+pcap_stats(pcap_t *p, struct pcap_stat *ps)
+{
+ register struct rawstats *rs;
+ struct rawstats rawstats;
+
+ rs = &rawstats;
+ bzero((char *)rs, sizeof(*rs));
+ if (ioctl(p->fd, SIOCRAWSTATS, (char *)rs) < 0) {
+ sprintf(p->errbuf, "SIOCRAWSTATS: %s", pcap_strerror(errno));
+ return (-1);
+ }
+
+ p->md.stat.ps_drop =
+ rs->rs_snoop.ss_ifdrops + rs->rs_snoop.ss_sbdrops +
+ rs->rs_drain.ds_ifdrops + rs->rs_drain.ds_sbdrops;
+
+ *ps = p->md.stat;
+ return (0);
+}
+
+/* XXX can't disable promiscuous */
+pcap_t *
+pcap_open_live(char *device, int snaplen, int promisc, int to_ms, char *ebuf)
+{
+ int fd;
+ struct sockaddr_raw sr;
+ struct snoopfilter sf;
+ u_int v;
+ pcap_t *p;
+
+ p = (pcap_t *)malloc(sizeof(*p));
+ if (p == NULL) {
+ sprintf(ebuf, "malloc: %s", pcap_strerror(errno));
+ return (NULL);
+ }
+ bzero((char *)p, sizeof(*p));
+ fd = socket(PF_RAW, SOCK_RAW, RAWPROTO_SNOOP);
+ if (fd < 0) {
+ sprintf(ebuf, "snoop socket: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ p->fd = fd;
+ bzero((char *)&sr, sizeof(sr));
+ sr.sr_family = AF_RAW;
+ (void)strncpy(sr.sr_ifname, device, sizeof(sr.sr_ifname));
+ if (bind(fd, (struct sockaddr *)&sr, sizeof(sr))) {
+ sprintf(ebuf, "snoop bind: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ bzero((char *)&sf, sizeof(sf));
+ if (ioctl(fd, SIOCADDSNOOP, &sf) < 0) {
+ sprintf(ebuf, "SIOCADDSNOOP: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ v = 64 * 1024;
+ (void)setsockopt(fd, SOL_SOCKET, SO_RCVBUF, (char *)&v, sizeof(v));
+ if (ioctl(fd, SIOCSNOOPLEN, &snaplen) < 0) {
+ sprintf(ebuf, "SIOCSNOOPLEN: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ p->snapshot = snaplen;
+ v = 1;
+ if (ioctl(fd, SIOCSNOOPING, &v) < 0) {
+ sprintf(ebuf, "SIOCSNOOPING: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ /*
+ * XXX hack - map device name to link layer type
+ */
+ if (strncmp("et", device, 2) == 0 || /* Challenge 10 Mbit */
+ strncmp("ec", device, 2) == 0 || /* Indigo/Indy 10 Mbit,
+ O2 10/100 */
+ strncmp("ef", device, 2) == 0 || /* O200/2000 10/100 Mbit */
+ strncmp("gfe", device, 3) == 0 || /* GIO 100 Mbit */
+ strncmp("fxp", device, 3) == 0 || /* Challenge VME Enet */
+ strncmp("ep", device, 2) == 0 || /* Challenge 8x10 Mbit EPLEX */
+ strncmp("vfe", device, 3) == 0 || /* Challenge VME 100Mbit */
+ strncmp("fa", device, 2) == 0 ||
+ strncmp("qaa", device, 3) == 0) {
+ p->linktype = DLT_EN10MB;
+ p->offset = RAW_HDRPAD(sizeof(struct ether_header));
+ } else if (strncmp("ipg", device, 3) == 0 ||
+ strncmp("rns", device, 3) == 0 || /* O2/200/2000 FDDI */
+ strncmp("xpi", device, 3) == 0) {
+ p->linktype = DLT_FDDI;
+ p->offset = 3; /* XXX yeah? */
+ } else if (strncmp("ppp", device, 3) == 0) {
+ p->linktype = DLT_RAW;
+ } else if (strncmp("lo", device, 2) == 0) {
+ p->linktype = DLT_NULL;
+ } else {
+ sprintf(ebuf, "snoop: unknown physical layer type");
+ goto bad;
+ }
+
+ p->bufsize = 4096; /* XXX */
+ p->buffer = (u_char *)malloc(p->bufsize);
+ if (p->buffer == NULL) {
+ sprintf(ebuf, "malloc: %s", pcap_strerror(errno));
+ goto bad;
+ }
+
+ return (p);
+ bad:
+ (void)close(fd);
+ free(p);
+ return (NULL);
+}
+
+int
+pcap_setfilter(pcap_t *p, struct bpf_program *fp)
+{
+
+ p->fcode = *fp;
+ return (0);
+}
--- /dev/null
+.\" Copyright (c) 1994, 1996, 1997
+.\" The Regents of the University of California. All rights reserved.
+.\"
+.\" Redistribution and use in source and binary forms, with or without
+.\" modification, are permitted provided that: (1) source code distributions
+.\" retain the above copyright notice and this paragraph in its entirety, (2)
+.\" distributions including binary code include the above copyright notice and
+.\" this paragraph in its entirety in the documentation or other materials
+.\" provided with the distribution, and (3) all advertising materials mentioning
+.\" features or use of this software display the following acknowledgement:
+.\" ``This product includes software developed by the University of California,
+.\" Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+.\" the University nor the names of its contributors may be used to endorse
+.\" or promote products derived from this software without specific prior
+.\" written permission.
+.\" THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+.\" WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+.\" MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+.\"
+.TH PCAP 3 "24 June 1998"
+.SH NAME
+pcap \- Packet Capture library
+.SH SYNOPSIS
+.nf
+.ft B
+#include <pcap.h>
+.ft
+.LP
+.ft B
+pcap_t *pcap_open_live(char *device, int snaplen,
+.ti +8
+int promisc, int to_ms, char *ebuf)
+pcap_t *pcap_open_offline(char *fname, char *ebuf)
+pcap_dumper_t *pcap_dump_open(pcap_t *p, char *fname)
+.ft
+.LP
+.ft B
+char errbuf[PCAP_ERRBUF_SIZE];
+char *pcap_lookupdev(char *errbuf)
+int pcap_lookupnet(char *device, bpf_u_int32 *netp,
+.ti +8
+bpf_u_int32 *maskp, char *errbuf)
+.ft
+.LP
+.ft B
+int pcap_dispatch(pcap_t *p, int cnt,
+.ti +8
+pcap_handler callback, u_char *user)
+int pcap_loop(pcap_t *p, int cnt,
+.ti +8
+pcap_handler callback, u_char *user)
+void pcap_dump(u_char *user, struct pcap_pkthdr *h,
+.ti +8
+u_char *sp)
+.ft
+.LP
+.ft B
+int pcap_compile(pcap_t *p, struct bpf_program *fp,
+.ti +8
+char *str, int optimize, bpf_u_int32 netmask)
+int pcap_setfilter(pcap_t *p, struct bpf_program *fp)
+.ft
+.LP
+.ft B
+u_char *pcap_next(pcap_t *p, struct pcap_pkthdr *h)
+.ft
+.LP
+.ft B
+int pcap_datalink(pcap_t *p)
+int pcap_snapshot(pcap_t *p)
+int pcap_is_swapped(pcap_t *p)
+int pcap_major_version(pcap_t *p)
+int pcap_minor_version(pcap_t *p)
+int pcap_stats(pcap_t *p, struct pcap_stat *ps)
+FILE *pcap_file(pcap_t *p)
+int pcap_fileno(pcap_t *p)
+void pcap_perror(pcap_t *p, char *prefix)
+char *pcap_geterr(pcap_t *p)
+char *pcap_strerror(int error)
+.ft
+.LP
+.ft B
+void pcap_close(pcap_t *p)
+void pcap_dump_close(pcap_dumper_t *p)
+.ft
+.fi
+.SH DESCRIPTION
+The Packet Capture library
+provides a high level interface to packet capture systems. All packets
+on the network, even those destined for other hosts, are accessible
+through this mechanism.
+.PP
+.SH ROUTINES
+.B pcap_open_live()
+is used to obtain a packet capture descriptor to look
+at packets on the network.
+.I device
+is a string that specifies the network device to open.
+.I snaplen
+specifies the maximum number of bytes to capture.
+.I promisc
+specifies if the interface is to be put into promiscuous mode.
+(Note that even if this parameter is false, the interface
+could well be in promiscuous mode for some other reason.)
+.I to_ms
+specifies the read timeout in milliseconds.
+.I ebuf
+is used to return error text and is only set when
+.B pcap_open_live()
+fails and returns
+.BR NULL .
+.PP
+.B pcap_open_offline()
+is called to open a ``savefile'' for reading.
+.I fname
+specifies the name of the file to open. The file has
+the same format as those used by
+.B tcpdump(1)
+and
+.BR tcpslice(1) .
+The name "-" in a synonym for
+.BR stdin .
+.I ebuf
+is used to return error text and is only set when
+.B pcap_open_offline()
+fails and returns
+.BR NULL .
+.PP
+.B pcap_dump_open()
+is called to open a ``savefile'' for writing. The name "-" in a synonym
+for
+.BR stdout .
+.B NULL
+is returned on failure.
+.I p
+is a
+.I pcap
+struct as returned by
+.B pcap_open_offline()
+or
+.BR pcap_open_live() .
+.I fname
+specifies the name of the file to open.
+If
+.B NULL
+is returned,
+.B pcap_geterr()
+can be used to get the error text.
+.PP
+.B pcap_lookupdev()
+returns a pointer to a network device suitable for use with
+.B pcap_open_live()
+and
+.BR pcap_lookupnet() .
+If there is an error,
+.B NULL
+is returned and
+.I errbuf
+is filled in with with an appropriate error message.
+.PP
+.B pcap_lookupnet()
+is used to determine the network number and mask
+associated with the network device
+.BR device .
+Both
+.I netp
+and
+.I maskp
+are
+.I bpf_u_int32
+pointers.
+A return of -1 indicates an error in which case
+.I errbuf
+is filled in with with an appropriate error message.
+.PP
+.B pcap_dispatch()
+is used to collect and process packets.
+.I cnt
+specifies the maximum number of packets to process before returning. A
+.I cnt
+of -1 processes all the packets received in one buffer. A
+.I cnt
+of 0 processes all packets until an error occurs,
+.B EOF
+is reached, or the read times out (when doing live reads and a non-zero
+read timeout is specified).
+.I callback
+specifies a routine to be called with three arguments:
+a
+.I u_char
+pointer which is passed in from
+.BR pcap_dispatch() ,
+a pointer to the
+.I pcap_pkthdr
+struct (which precede the actual network headers and data),
+and a
+.I u_char
+pointer to the packet data. The number of packets read is returned.
+Zero is returned when
+.B EOF
+is reached in a ``savefile.'' A return of -1 indicates
+an error in which case
+.B pcap_perror()
+or
+.BR pcap_geterr()
+may be used to display the error text.
+.PP
+.B pcap_dump()
+outputs a packet to the ``savefile'' opened with
+.BR pcap_dump_open() .
+Note that its calling arguments are suitable for use with
+.BR pcap_dispatch() .
+.PP
+.B pcap_compile()
+is used to compile the string
+.I str
+into a filter program.
+.I program
+is a pointer to a
+.I bpf_program
+struct and is filled in by
+.BR pcap_compile() .
+.I optimize
+controls whether optimization on the resulting code is performed.
+.I netmask
+specifies the netmask of the local net.
+.PP
+.B pcap_setfilter()
+is used to specify a filter program.
+.I fp
+is a pointer to an array of
+.I bpf_program
+struct, usually the result of a call to
+.BR pcap_compile() .
+.B \-1
+is returned on failure;
+.B 0
+is returned on success.
+.PP
+.B pcap_loop()
+is similar to
+.B pcap_dispatch()
+except it keeps reading packets until
+.I cnt
+packets are processed or an error occurs.
+It does
+.B not
+return when live read timeouts occur.
+Rather, specifying a non-zero read timeout to
+.B pcap_open_live()
+and then calling
+.B pcap_dispatch()
+allows the reception and processing of any packets that arrive when the
+timeout occurs.
+A negative
+.I cnt
+causes
+.B pcap_loop()
+to loop forever (or at least until an error occurs).
+.PP
+.B pcap_next()
+returns a
+.I u_char
+pointer to the next packet.
+.PP
+.B pcap_datalink()
+returns the link layer type, e.g.
+.BR DLT_EN10MB .
+.PP
+.B pcap_snapshot()
+returns the snapshot length specified when
+.B pcap_open_live
+was called.
+.PP
+.B pcap_is_swapped()
+returns true if the current ``savefile'' uses a different byte order
+than the current system.
+.PP
+.B pcap_major_version()
+returns the major number of the version of the pcap used to write the
+savefile.
+.PP
+.B pcap_minor_version()
+returns the minor number of the version of the pcap used to write the
+savefile.
+.PP
+.B pcap_file()
+returns the name of the ``savefile.''
+.PP
+.B int pcap_stats()
+returns 0 and fills in a
+.B pcap_stat
+struct. The values represent packet statistics from the start of the
+run to the time of the call. If there is an error or the under lying
+packet capture doesn't support packet statistics, -1 is returned and
+the error text can be obtained with
+.B pcap_perror()
+or
+.BR pcap_geterr() .
+.PP
+.B pcap_fileno()
+returns the file descriptor number of the ``savefile.''
+.PP
+.B pcap_perror()
+prints the text of the last pcap library error on
+.BR stderr ,
+prefixed by
+.IR prefix .
+.PP
+.B pcap_geterr()
+returns the error text pertaining to the last pcap library error.
+.PP
+.B pcap_strerror()
+is provided in case
+.BR strerror (1)
+isn't available.
+.PP
+.B pcap_close()
+closes the files associated with
+.I p
+and deallocates resources.
+.PP
+.B pcap_dump_close()
+closes the ``savefile.''
+.PP
+.SH SEE ALSO
+tcpdump(1), tcpslice(1)
+.SH AUTHORS
+Van Jacobson,
+Craig Leres and
+Steven McCanne, all of the
+Lawrence Berkeley National Laboratory, University of California, Berkeley, CA.
+.LP
+The current version is available via anonymous ftp:
+.LP
+.RS
+.I ftp://ftp.ee.lbl.gov/libpcap.tar.Z
+.RE
+.SH BUGS
+Please send bug reports to libpcap@ee.lbl.gov.
--- /dev/null
+/*
+ * Copyright (c) 1993, 1994, 1995, 1996, 1997, 1998
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the Computer Systems
+ * Engineering Group at Lawrence Berkeley Laboratory.
+ * 4. Neither the name of the University nor of the Laboratory may be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef lint
+static const char rcsid[] =
+ "@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/pcap.c,v 1.1 1999/08/26 10:05:26 johana Exp $ (LBL)";
+#endif
+
+#include <sys/types.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+
+#include "gnuc.h"
+#ifdef HAVE_OS_PROTO_H
+#include "os-proto.h"
+#endif
+
+#include "pcap-int.h"
+
+int
+pcap_dispatch(pcap_t *p, int cnt, pcap_handler callback, u_char *user)
+{
+
+ if (p->sf.rfile != NULL)
+ return (pcap_offline_read(p, cnt, callback, user));
+ return (pcap_read(p, cnt, callback, user));
+}
+
+int
+pcap_loop(pcap_t *p, int cnt, pcap_handler callback, u_char *user)
+{
+ register int n;
+
+ for (;;) {
+ if (p->sf.rfile != NULL)
+ n = pcap_offline_read(p, cnt, callback, user);
+ else {
+ /*
+ * XXX keep reading until we get something
+ * (or an error occurs)
+ */
+ do {
+ n = pcap_read(p, cnt, callback, user);
+ } while (n == 0);
+ }
+ if (n <= 0)
+ return (n);
+ if (cnt > 0) {
+ cnt -= n;
+ if (cnt <= 0)
+ return (0);
+ }
+ }
+}
+
+struct singleton {
+ struct pcap_pkthdr *hdr;
+ const u_char *pkt;
+};
+
+
+static void
+pcap_oneshot(u_char *userData, const struct pcap_pkthdr *h, const u_char *pkt)
+{
+ struct singleton *sp = (struct singleton *)userData;
+ *sp->hdr = *h;
+ sp->pkt = pkt;
+}
+
+const u_char *
+pcap_next(pcap_t *p, struct pcap_pkthdr *h)
+{
+ struct singleton s;
+
+ s.hdr = h;
+ if (pcap_dispatch(p, 1, pcap_oneshot, (u_char*)&s) <= 0)
+ return (0);
+ return (s.pkt);
+}
+
+int
+pcap_datalink(pcap_t *p)
+{
+ return (p->linktype);
+}
+
+int
+pcap_snapshot(pcap_t *p)
+{
+ return (p->snapshot);
+}
+
+int
+pcap_is_swapped(pcap_t *p)
+{
+ return (p->sf.swapped);
+}
+
+int
+pcap_major_version(pcap_t *p)
+{
+ return (p->sf.version_major);
+}
+
+int
+pcap_minor_version(pcap_t *p)
+{
+ return (p->sf.version_minor);
+}
+
+FILE *
+pcap_file(pcap_t *p)
+{
+ return (p->sf.rfile);
+}
+
+int
+pcap_fileno(pcap_t *p)
+{
+ return (p->fd);
+}
+
+void
+pcap_perror(pcap_t *p, char *prefix)
+{
+ fprintf(stderr, "%s: %s\n", prefix, p->errbuf);
+}
+
+char *
+pcap_geterr(pcap_t *p)
+{
+ return (p->errbuf);
+}
+
+/*
+ * Not all systems have strerror().
+ */
+char *
+pcap_strerror(int errnum)
+{
+#ifdef HAVE_STRERROR
+ return (strerror(errnum));
+#else
+ extern int sys_nerr;
+ extern const char *const sys_errlist[];
+ static char ebuf[20];
+
+ if ((unsigned int)errnum < sys_nerr)
+ return ((char *)sys_errlist[errnum]);
+ (void)sprintf(ebuf, "Unknown error: %d", errnum);
+ return(ebuf);
+#endif
+}
+
+void
+pcap_close(pcap_t *p)
+{
+ /*XXX*/
+ if (p->fd >= 0)
+ close(p->fd);
+ if (p->sf.rfile != NULL) {
+ (void)fclose(p->sf.rfile);
+ if (p->sf.base != NULL)
+ free(p->sf.base);
+ } else if (p->buffer != NULL)
+ free(p->buffer);
+#ifdef linux
+ if (p->md.device != NULL)
+ free(p->md.device);
+#endif
+
+ free(p);
+}
--- /dev/null
+/*
+ * Copyright (c) 1993, 1994, 1995, 1996, 1997
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the Computer Systems
+ * Engineering Group at Lawrence Berkeley Laboratory.
+ * 4. Neither the name of the University nor of the Laboratory may be used
+ * to endorse or promote products derived from this software without
+ * specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/pcap.h,v 1.1 1999/08/26 10:05:26 johana Exp $ (LBL)
+ */
+
+#ifndef lib_pcap_h
+#define lib_pcap_h
+
+#include <sys/types.h>
+#include <sys/time.h>
+
+#include <net/bpf.h>
+
+#include <stdio.h>
+
+#define PCAP_VERSION_MAJOR 2
+#define PCAP_VERSION_MINOR 4
+
+#define PCAP_ERRBUF_SIZE 256
+
+/*
+ * Compatibility for systems that have a bpf.h that
+ * predates the bpf typedefs for 64-bit support.
+ */
+#if BPF_RELEASE - 0 < 199406
+typedef int bpf_int32;
+typedef u_int bpf_u_int32;
+#endif
+
+typedef struct pcap pcap_t;
+typedef struct pcap_dumper pcap_dumper_t;
+
+/*
+ * The first record in the file contains saved values for some
+ * of the flags used in the printout phases of tcpdump.
+ * Many fields here are 32 bit ints so compilers won't insert unwanted
+ * padding; these files need to be interchangeable across architectures.
+ */
+struct pcap_file_header {
+ bpf_u_int32 magic;
+ u_short version_major;
+ u_short version_minor;
+ bpf_int32 thiszone; /* gmt to local correction */
+ bpf_u_int32 sigfigs; /* accuracy of timestamps */
+ bpf_u_int32 snaplen; /* max length saved portion of each pkt */
+ bpf_u_int32 linktype; /* data link type (DLT_*) */
+};
+
+/*
+ * Each packet in the dump file is prepended with this generic header.
+ * This gets around the problem of different headers for different
+ * packet interfaces.
+ */
+struct pcap_pkthdr {
+ struct timeval ts; /* time stamp */
+ bpf_u_int32 caplen; /* length of portion present */
+ bpf_u_int32 len; /* length this packet (off wire) */
+};
+
+/*
+ * As returned by the pcap_stats()
+ */
+struct pcap_stat {
+ u_int ps_recv; /* number of packets received */
+ u_int ps_drop; /* number of packets dropped */
+ u_int ps_ifdrop; /* drops by interface XXX not yet supported */
+};
+
+typedef void (*pcap_handler)(u_char *, const struct pcap_pkthdr *,
+ const u_char *);
+
+char *pcap_lookupdev(char *);
+int pcap_lookupnet(char *, bpf_u_int32 *, bpf_u_int32 *, char *);
+pcap_t *pcap_open_live(char *, int, int, int, char *);
+pcap_t *pcap_open_offline(const char *, char *);
+void pcap_close(pcap_t *);
+int pcap_loop(pcap_t *, int, pcap_handler, u_char *);
+int pcap_dispatch(pcap_t *, int, pcap_handler, u_char *);
+const u_char*
+ pcap_next(pcap_t *, struct pcap_pkthdr *);
+int pcap_stats(pcap_t *, struct pcap_stat *);
+int pcap_setfilter(pcap_t *, struct bpf_program *);
+void pcap_perror(pcap_t *, char *);
+char *pcap_strerror(int);
+char *pcap_geterr(pcap_t *);
+int pcap_compile(pcap_t *, struct bpf_program *, char *, int,
+ bpf_u_int32);
+/* XXX */
+int pcap_freecode(pcap_t *, struct bpf_program *);
+int pcap_datalink(pcap_t *);
+int pcap_snapshot(pcap_t *);
+int pcap_is_swapped(pcap_t *);
+int pcap_major_version(pcap_t *);
+int pcap_minor_version(pcap_t *);
+
+/* XXX */
+FILE *pcap_file(pcap_t *);
+int pcap_fileno(pcap_t *);
+
+pcap_dumper_t *pcap_dump_open(pcap_t *, const char *);
+void pcap_dump_close(pcap_dumper_t *);
+void pcap_dump(u_char *, const struct pcap_pkthdr *, const u_char *);
+
+/* XXX this guy lives in the bpf tree */
+u_int bpf_filter(struct bpf_insn *, u_char *, u_int, u_int);
+char *bpf_image(struct bpf_insn *, int);
+#endif
--- /dev/null
+/* @(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/ppp.h,v 1.1 1999/08/26 10:05:26 johana Exp $ (LBL) */
+/*
+ * Point to Point Protocol (PPP) RFC1331
+ *
+ * Copyright 1989 by Carnegie Mellon.
+ *
+ * Permission to use, copy, modify, and distribute this program for any
+ * purpose and without fee is hereby granted, provided that this copyright
+ * and permission notice appear on all copies and supporting documentation,
+ * the name of Carnegie Mellon not be used in advertising or publicity
+ * pertaining to distribution of the program without specific prior
+ * permission, and notice be given in supporting documentation that copying
+ * and distribution is by permission of Carnegie Mellon and Stanford
+ * University. Carnegie Mellon makes no representations about the
+ * suitability of this software for any purpose. It is provided "as is"
+ * without express or implied warranty.
+ */
+#define PPP_ADDRESS 0xff /* The address byte value */
+#define PPP_CONTROL 0x03 /* The control byte value */
+
+/* Protocol numbers */
+#define PPP_IP 0x0021 /* Raw IP */
+#define PPP_OSI 0x0023 /* OSI Network Layer */
+#define PPP_NS 0x0025 /* Xerox NS IDP */
+#define PPP_DECNET 0x0027 /* DECnet Phase IV */
+#define PPP_APPLE 0x0029 /* Appletalk */
+#define PPP_IPX 0x002b /* Novell IPX */
+#define PPP_VJC 0x002d /* Van Jacobson Compressed TCP/IP */
+#define PPP_VJNC 0x002f /* Van Jacobson Uncompressed TCP/IP */
+#define PPP_BRPDU 0x0031 /* Bridging PDU */
+#define PPP_STII 0x0033 /* Stream Protocol (ST-II) */
+#define PPP_VINES 0x0035 /* Banyan Vines */
+
+#define PPP_HELLO 0x0201 /* 802.1d Hello Packets */
+#define PPP_LUXCOM 0x0231 /* Luxcom */
+#define PPP_SNS 0x0233 /* Sigma Network Systems */
+
+#define PPP_IPCP 0x8021 /* IP Control Protocol */
+#define PPP_OSICP 0x8023 /* OSI Network Layer Control Protocol */
+#define PPP_NSCP 0x8025 /* Xerox NS IDP Control Protocol */
+#define PPP_DECNETCP 0x8027 /* DECnet Control Protocol */
+#define PPP_APPLECP 0x8029 /* Appletalk Control Protocol */
+#define PPP_IPXCP 0x802b /* Novell IPX Control Protocol */
+#define PPP_STIICP 0x8033 /* Strean Protocol Control Protocol */
+#define PPP_VINESCP 0x8035 /* Banyan Vines Control Protocol */
+
+#define PPP_LCP 0xc021 /* Link Control Protocol */
+#define PPP_PAP 0xc023 /* Password Authentication Protocol */
+#define PPP_LQM 0xc025 /* Link Quality Monitoring */
+#define PPP_CHAP 0xc223 /* Challenge Handshake Authentication Protocol */
--- /dev/null
+rm bpf_filter.c
+rm gnuc.h
+rm net
--- /dev/null
+/*
+ * Copyright (c) 1993, 1994, 1995, 1996, 1997
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ * savefile.c - supports offline use of tcpdump
+ * Extraction/creation by Jeffrey Mogul, DECWRL
+ * Modified by Steve McCanne, LBL.
+ *
+ * Used to save the received packet headers, after filtering, to
+ * a file, and then read them later.
+ * The first record in the file contains saved values for the machine
+ * dependent values so we can print the dump file on any architecture.
+ */
+
+#ifndef lint
+static const char rcsid[] =
+ "@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/savefile.c,v 1.1 1999/08/26 10:05:27 johana Exp $ (LBL)";
+#endif
+
+#include <sys/types.h>
+#include <sys/time.h>
+
+#include <errno.h>
+#include <memory.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+
+#include "pcap-int.h"
+
+#include "gnuc.h"
+#ifdef HAVE_OS_PROTO_H
+#include "os-proto.h"
+#endif
+
+#define TCPDUMP_MAGIC 0xa1b2c3d4
+
+/*
+ * We use the "receiver-makes-right" approach to byte order,
+ * because time is at a premium when we are writing the file.
+ * In other words, the pcap_file_header and pcap_pkthdr,
+ * records are written in host byte order.
+ * Note that the packets are always written in network byte order.
+ *
+ * ntoh[ls] aren't sufficient because we might need to swap on a big-endian
+ * machine (if the file was written in little-end order).
+ */
+#define SWAPLONG(y) \
+((((y)&0xff)<<24) | (((y)&0xff00)<<8) | (((y)&0xff0000)>>8) | (((y)>>24)&0xff))
+#define SWAPSHORT(y) \
+ ( (((y)&0xff)<<8) | ((u_short)((y)&0xff00)>>8) )
+
+#define SFERR_TRUNC 1
+#define SFERR_BADVERSION 2
+#define SFERR_BADF 3
+#define SFERR_EOF 4 /* not really an error, just a status */
+
+static int
+sf_write_header(FILE *fp, int linktype, int thiszone, int snaplen)
+{
+ struct pcap_file_header hdr;
+
+ hdr.magic = TCPDUMP_MAGIC;
+ hdr.version_major = PCAP_VERSION_MAJOR;
+ hdr.version_minor = PCAP_VERSION_MINOR;
+
+ hdr.thiszone = thiszone;
+ hdr.snaplen = snaplen;
+ hdr.sigfigs = 0;
+ hdr.linktype = linktype;
+
+ if (fwrite((char *)&hdr, sizeof(hdr), 1, fp) != 1)
+ return (-1);
+
+ return (0);
+}
+
+static void
+swap_hdr(struct pcap_file_header *hp)
+{
+ hp->version_major = SWAPSHORT(hp->version_major);
+ hp->version_minor = SWAPSHORT(hp->version_minor);
+ hp->thiszone = SWAPLONG(hp->thiszone);
+ hp->sigfigs = SWAPLONG(hp->sigfigs);
+ hp->snaplen = SWAPLONG(hp->snaplen);
+ hp->linktype = SWAPLONG(hp->linktype);
+}
+
+pcap_t *
+pcap_open_offline(const char *fname, char *errbuf)
+{
+ register pcap_t *p;
+ register FILE *fp;
+ struct pcap_file_header hdr;
+ int linklen;
+
+ p = (pcap_t *)malloc(sizeof(*p));
+ if (p == NULL) {
+ strcpy(errbuf, "out of swap");
+ return (NULL);
+ }
+
+ memset((char *)p, 0, sizeof(*p));
+ /*
+ * Set this field so we don't close stdin in pcap_close!
+ */
+ p->fd = -1;
+
+ if (fname[0] == '-' && fname[1] == '\0')
+ fp = stdin;
+ else {
+ fp = fopen(fname, "r");
+ if (fp == NULL) {
+ sprintf(errbuf, "%s: %s", fname, pcap_strerror(errno));
+ goto bad;
+ }
+ }
+ if (fread((char *)&hdr, sizeof(hdr), 1, fp) != 1) {
+ sprintf(errbuf, "fread: %s", pcap_strerror(errno));
+ goto bad;
+ }
+ if (hdr.magic != TCPDUMP_MAGIC) {
+ if (SWAPLONG(hdr.magic) != TCPDUMP_MAGIC) {
+ sprintf(errbuf, "bad dump file format");
+ goto bad;
+ }
+ p->sf.swapped = 1;
+ swap_hdr(&hdr);
+ }
+ if (hdr.version_major < PCAP_VERSION_MAJOR) {
+ sprintf(errbuf, "archaic file format");
+ goto bad;
+ }
+ p->tzoff = hdr.thiszone;
+ p->snapshot = hdr.snaplen;
+ p->linktype = hdr.linktype;
+ p->sf.rfile = fp;
+ p->bufsize = hdr.snaplen;
+
+ /* Align link header as required for proper data alignment */
+ /* XXX should handle all types */
+ switch (p->linktype) {
+
+ case DLT_EN10MB:
+ linklen = 14;
+ break;
+
+ case DLT_FDDI:
+ linklen = 13 + 8; /* fddi_header + llc */
+ break;
+
+ case DLT_NULL:
+ default:
+ linklen = 0;
+ break;
+ }
+
+ p->sf.base = (u_char *)malloc(p->bufsize + BPF_ALIGNMENT);
+ p->buffer = p->sf.base + BPF_ALIGNMENT - (linklen % BPF_ALIGNMENT);
+ p->sf.version_major = hdr.version_major;
+ p->sf.version_minor = hdr.version_minor;
+#ifdef PCAP_FDDIPAD
+ /* XXX padding only needed for kernel fcode */
+ pcap_fddipad = 0;
+#endif
+
+ return (p);
+ bad:
+ free(p);
+ return (NULL);
+}
+
+/*
+ * Read sf_readfile and return the next packet. Return the header in hdr
+ * and the contents in buf. Return 0 on success, SFERR_EOF if there were
+ * no more packets, and SFERR_TRUNC if a partial packet was encountered.
+ */
+static int
+sf_next_packet(pcap_t *p, struct pcap_pkthdr *hdr, u_char *buf, int buflen)
+{
+ FILE *fp = p->sf.rfile;
+
+ /* read the stamp */
+ if (fread((char *)hdr, sizeof(struct pcap_pkthdr), 1, fp) != 1) {
+ /* probably an EOF, though could be a truncated packet */
+ return (1);
+ }
+
+ if (p->sf.swapped) {
+ /* these were written in opposite byte order */
+ hdr->caplen = SWAPLONG(hdr->caplen);
+ hdr->len = SWAPLONG(hdr->len);
+ hdr->ts.tv_sec = SWAPLONG(hdr->ts.tv_sec);
+ hdr->ts.tv_usec = SWAPLONG(hdr->ts.tv_usec);
+ }
+ /*
+ * We interchanged the caplen and len fields at version 2.3,
+ * in order to match the bpf header layout. But unfortunately
+ * some files were written with version 2.3 in their headers
+ * but without the interchanged fields.
+ */
+ if (p->sf.version_minor < 3 ||
+ (p->sf.version_minor == 3 && hdr->caplen > hdr->len)) {
+ int t = hdr->caplen;
+ hdr->caplen = hdr->len;
+ hdr->len = t;
+ }
+
+ if (hdr->caplen > buflen) {
+ /*
+ * This can happen due to Solaris 2.3 systems tripping
+ * over the BUFMOD problem and not setting the snapshot
+ * correctly in the savefile header. If the caplen isn't
+ * grossly wrong, try to salvage.
+ */
+ static u_char *tp = NULL;
+ static int tsize = 0;
+
+ if (hdr->caplen > 65535) {
+ sprintf(p->errbuf, "bogus savefile header");
+ return (-1);
+ }
+ if (tsize < hdr->caplen) {
+ tsize = ((hdr->caplen + 1023) / 1024) * 1024;
+ if (tp != NULL)
+ free((u_char *)tp);
+ tp = (u_char *)malloc(tsize);
+ if (tp == NULL) {
+ tsize = 0;
+ sprintf(p->errbuf, "BUFMOD hack malloc");
+ return (-1);
+ }
+ }
+ if (fread((char *)tp, hdr->caplen, 1, fp) != 1) {
+ sprintf(p->errbuf, "truncated dump file");
+ return (-1);
+ }
+ /*
+ * We can only keep up to buflen bytes. Since caplen > buflen
+ * is exactly how we got here, we know we can only keep the
+ * first buflen bytes and must drop the remainder. Adjust
+ * caplen accordingly, so we don't get confused later as
+ * to how many bytes we have to play with.
+ */
+ hdr->caplen = buflen;
+ memcpy((char *)buf, (char *)tp, buflen);
+
+ } else {
+ /* read the packet itself */
+
+ if (fread((char *)buf, hdr->caplen, 1, fp) != 1) {
+ sprintf(p->errbuf, "truncated dump file");
+ return (-1);
+ }
+ }
+ return (0);
+}
+
+/*
+ * Print out packets stored in the file initialized by sf_read_init().
+ * If cnt > 0, return after 'cnt' packets, otherwise continue until eof.
+ */
+int
+pcap_offline_read(pcap_t *p, int cnt, pcap_handler callback, u_char *user)
+{
+ struct bpf_insn *fcode = p->fcode.bf_insns;
+ int status = 0;
+ int n = 0;
+
+ while (status == 0) {
+ struct pcap_pkthdr h;
+
+ status = sf_next_packet(p, &h, p->buffer, p->bufsize);
+ if (status) {
+ if (status == 1)
+ return (0);
+ return (status);
+ }
+
+ if (fcode == NULL ||
+ bpf_filter(fcode, p->buffer, h.len, h.caplen)) {
+ (*callback)(user, &h, p->buffer);
+ if (++n >= cnt && cnt > 0)
+ break;
+ }
+ }
+ /*XXX this breaks semantics tcpslice expects */
+ return (n);
+}
+
+/*
+ * Output a packet to the initialized dump file.
+ */
+void
+pcap_dump(u_char *user, const struct pcap_pkthdr *h, const u_char *sp)
+{
+ register FILE *f;
+
+ f = (FILE *)user;
+ /* XXX we should check the return status */
+ (void)fwrite((char *)h, sizeof(*h), 1, f);
+ (void)fwrite((char *)sp, h->caplen, 1, f);
+}
+
+/*
+ * Initialize so that sf_write() will output to the file named 'fname'.
+ */
+pcap_dumper_t *
+pcap_dump_open(pcap_t *p, const char *fname)
+{
+ FILE *f;
+ if (fname[0] == '-' && fname[1] == '\0')
+ f = stdout;
+ else {
+ f = fopen(fname, "w");
+ if (f == NULL) {
+ sprintf(p->errbuf, "%s: %s",
+ fname, pcap_strerror(errno));
+ return (NULL);
+ }
+ }
+ (void)sf_write_header(f, p->linktype, p->tzoff, p->snapshot);
+ return ((pcap_dumper_t *)f);
+}
+
+void
+pcap_dump_close(pcap_dumper_t *p)
+{
+
+#ifdef notyet
+ if (ferror((FILE *)p))
+ return-an-error;
+ /* XXX should check return from fclose() too */
+#endif
+ (void)fclose((FILE *)p);
+}
--- /dev/null
+
+#line 3 "<stdout>"
+
+#define YY_INT_ALIGNED short int
+
+/* A lexical scanner generated by flex */
+
+#define FLEX_SCANNER
+#define YY_FLEX_MAJOR_VERSION 2
+#define YY_FLEX_MINOR_VERSION 5
+#define YY_FLEX_SUBMINOR_VERSION 33
+#if YY_FLEX_SUBMINOR_VERSION > 0
+#define FLEX_BETA
+#endif
+
+/* First, we deal with platform-specific or compiler-specific issues. */
+
+/* begin standard C headers. */
+#include <stdio.h>
+#include <string.h>
+#include <errno.h>
+#include <stdlib.h>
+
+/* end standard C headers. */
+
+/* flex integer type definitions */
+
+#ifndef FLEXINT_H
+#define FLEXINT_H
+
+/* C99 systems have <inttypes.h>. Non-C99 systems may or may not. */
+
+#if __STDC_VERSION__ >= 199901L
+
+/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,
+ * if you want the limit (max/min) macros for int types.
+ */
+#ifndef __STDC_LIMIT_MACROS
+#define __STDC_LIMIT_MACROS 1
+#endif
+
+#include <inttypes.h>
+typedef int8_t flex_int8_t;
+typedef uint8_t flex_uint8_t;
+typedef int16_t flex_int16_t;
+typedef uint16_t flex_uint16_t;
+typedef int32_t flex_int32_t;
+typedef uint32_t flex_uint32_t;
+#else
+typedef signed char flex_int8_t;
+typedef short int flex_int16_t;
+typedef int flex_int32_t;
+typedef unsigned char flex_uint8_t;
+typedef unsigned short int flex_uint16_t;
+typedef unsigned int flex_uint32_t;
+#endif /* ! C99 */
+
+/* Limits of integral types. */
+#ifndef INT8_MIN
+#define INT8_MIN (-128)
+#endif
+#ifndef INT16_MIN
+#define INT16_MIN (-32767-1)
+#endif
+#ifndef INT32_MIN
+#define INT32_MIN (-2147483647-1)
+#endif
+#ifndef INT8_MAX
+#define INT8_MAX (127)
+#endif
+#ifndef INT16_MAX
+#define INT16_MAX (32767)
+#endif
+#ifndef INT32_MAX
+#define INT32_MAX (2147483647)
+#endif
+#ifndef UINT8_MAX
+#define UINT8_MAX (255U)
+#endif
+#ifndef UINT16_MAX
+#define UINT16_MAX (65535U)
+#endif
+#ifndef UINT32_MAX
+#define UINT32_MAX (4294967295U)
+#endif
+
+#endif /* ! FLEXINT_H */
+
+#ifdef __cplusplus
+
+/* The "const" storage-class-modifier is valid. */
+#define YY_USE_CONST
+
+#else /* ! __cplusplus */
+
+#if __STDC__
+
+#define YY_USE_CONST
+
+#endif /* __STDC__ */
+#endif /* ! __cplusplus */
+
+#ifdef YY_USE_CONST
+#define yyconst const
+#else
+#define yyconst
+#endif
+
+/* Returned upon end-of-file. */
+#define YY_NULL 0
+
+/* Promotes a possibly negative, possibly signed char to an unsigned
+ * integer for use as an array index. If the signed char is negative,
+ * we want to instead treat it as an 8-bit unsigned char, hence the
+ * double cast.
+ */
+#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c)
+
+/* Enter a start condition. This macro really ought to take a parameter,
+ * but we do it the disgusting crufty way forced on us by the ()-less
+ * definition of BEGIN.
+ */
+#define BEGIN (yy_start) = 1 + 2 *
+
+/* Translate the current start state into a value that can be later handed
+ * to BEGIN to return to the state. The YYSTATE alias is for lex
+ * compatibility.
+ */
+#define YY_START (((yy_start) - 1) / 2)
+#define YYSTATE YY_START
+
+/* Action number for EOF rule of a given start state. */
+#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1)
+
+/* Special action meaning "start processing a new file". */
+#define YY_NEW_FILE pcap_restart(pcap_in )
+
+#define YY_END_OF_BUFFER_CHAR 0
+
+/* Size of default input buffer. */
+#ifndef YY_BUF_SIZE
+#define YY_BUF_SIZE 16384
+#endif
+
+/* The state buf must be large enough to hold one state per character in the main buffer.
+ */
+#define YY_STATE_BUF_SIZE ((YY_BUF_SIZE + 2) * sizeof(yy_state_type))
+
+#ifndef YY_TYPEDEF_YY_BUFFER_STATE
+#define YY_TYPEDEF_YY_BUFFER_STATE
+typedef struct yy_buffer_state *YY_BUFFER_STATE;
+#endif
+
+extern int pcap_leng;
+
+extern FILE *pcap_in, *pcap_out;
+
+#define EOB_ACT_CONTINUE_SCAN 0
+#define EOB_ACT_END_OF_FILE 1
+#define EOB_ACT_LAST_MATCH 2
+
+ #define YY_LESS_LINENO(n)
+
+/* Return all but the first "n" matched characters back to the input stream. */
+#define yyless(n) \
+ do \
+ { \
+ /* Undo effects of setting up pcap_text. */ \
+ int yyless_macro_arg = (n); \
+ YY_LESS_LINENO(yyless_macro_arg);\
+ *yy_cp = (yy_hold_char); \
+ YY_RESTORE_YY_MORE_OFFSET \
+ (yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \
+ YY_DO_BEFORE_ACTION; /* set up pcap_text again */ \
+ } \
+ while ( 0 )
+
+#define unput(c) yyunput( c, (yytext_ptr) )
+
+/* The following is because we cannot portably get our hands on size_t
+ * (without autoconf's help, which isn't available because we want
+ * flex-generated scanners to compile on their own).
+ */
+
+#ifndef YY_TYPEDEF_YY_SIZE_T
+#define YY_TYPEDEF_YY_SIZE_T
+typedef unsigned int yy_size_t;
+#endif
+
+#ifndef YY_STRUCT_YY_BUFFER_STATE
+#define YY_STRUCT_YY_BUFFER_STATE
+struct yy_buffer_state
+ {
+ FILE *yy_input_file;
+
+ char *yy_ch_buf; /* input buffer */
+ char *yy_buf_pos; /* current position in input buffer */
+
+ /* Size of input buffer in bytes, not including room for EOB
+ * characters.
+ */
+ yy_size_t yy_buf_size;
+
+ /* Number of characters read into yy_ch_buf, not including EOB
+ * characters.
+ */
+ int yy_n_chars;
+
+ /* Whether we "own" the buffer - i.e., we know we created it,
+ * and can realloc() it to grow it, and should free() it to
+ * delete it.
+ */
+ int yy_is_our_buffer;
+
+ /* Whether this is an "interactive" input source; if so, and
+ * if we're using stdio for input, then we want to use getc()
+ * instead of fread(), to make sure we stop fetching input after
+ * each newline.
+ */
+ int yy_is_interactive;
+
+ /* Whether we're considered to be at the beginning of a line.
+ * If so, '^' rules will be active on the next match, otherwise
+ * not.
+ */
+ int yy_at_bol;
+
+ int yy_bs_lineno; /**< The line count. */
+ int yy_bs_column; /**< The column count. */
+
+ /* Whether to try to fill the input buffer when we reach the
+ * end of it.
+ */
+ int yy_fill_buffer;
+
+ int yy_buffer_status;
+
+#define YY_BUFFER_NEW 0
+#define YY_BUFFER_NORMAL 1
+ /* When an EOF's been seen but there's still some text to process
+ * then we mark the buffer as YY_EOF_PENDING, to indicate that we
+ * shouldn't try reading from the input source any more. We might
+ * still have a bunch of tokens to match, though, because of
+ * possible backing-up.
+ *
+ * When we actually see the EOF, we change the status to "new"
+ * (via pcap_restart()), so that the user can continue scanning by
+ * just pointing pcap_in at a new input file.
+ */
+#define YY_BUFFER_EOF_PENDING 2
+
+ };
+#endif /* !YY_STRUCT_YY_BUFFER_STATE */
+
+/* Stack of input buffers. */
+static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */
+static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */
+static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */
+
+/* We provide macros for accessing buffer states in case in the
+ * future we want to put the buffer states in a more general
+ * "scanner state".
+ *
+ * Returns the top of the stack, or NULL.
+ */
+#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \
+ ? (yy_buffer_stack)[(yy_buffer_stack_top)] \
+ : NULL)
+
+/* Same as previous macro, but useful when we know that the buffer stack is not
+ * NULL or when we need an lvalue. For internal use only.
+ */
+#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)]
+
+/* yy_hold_char holds the character lost when pcap_text is formed. */
+static char yy_hold_char;
+static int yy_n_chars; /* number of characters read into yy_ch_buf */
+int pcap_leng;
+
+/* Points to current character in buffer. */
+static char *yy_c_buf_p = (char *) 0;
+static int yy_init = 0; /* whether we need to initialize */
+static int yy_start = 0; /* start state number */
+
+/* Flag which is used to allow pcap_wrap()'s to do buffer switches
+ * instead of setting up a fresh pcap_in. A bit of a hack ...
+ */
+static int yy_did_buffer_switch_on_eof;
+
+void pcap_restart (FILE *input_file );
+void pcap__switch_to_buffer (YY_BUFFER_STATE new_buffer );
+YY_BUFFER_STATE pcap__create_buffer (FILE *file,int size );
+void pcap__delete_buffer (YY_BUFFER_STATE b );
+void pcap__flush_buffer (YY_BUFFER_STATE b );
+void pcap_push_buffer_state (YY_BUFFER_STATE new_buffer );
+void pcap_pop_buffer_state (void );
+
+static void pcap_ensure_buffer_stack (void );
+static void pcap__load_buffer_state (void );
+static void pcap__init_buffer (YY_BUFFER_STATE b,FILE *file );
+
+#define YY_FLUSH_BUFFER pcap__flush_buffer(YY_CURRENT_BUFFER )
+
+YY_BUFFER_STATE pcap__scan_buffer (char *base,yy_size_t size );
+YY_BUFFER_STATE pcap__scan_string (yyconst char *yy_str );
+YY_BUFFER_STATE pcap__scan_bytes (yyconst char *bytes,int len );
+
+void *pcap_alloc (yy_size_t );
+void *pcap_realloc (void *,yy_size_t );
+void pcap_free (void * );
+
+#define yy_new_buffer pcap__create_buffer
+
+#define yy_set_interactive(is_interactive) \
+ { \
+ if ( ! YY_CURRENT_BUFFER ){ \
+ pcap_ensure_buffer_stack (); \
+ YY_CURRENT_BUFFER_LVALUE = \
+ pcap__create_buffer(pcap_in,YY_BUF_SIZE ); \
+ } \
+ YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \
+ }
+
+#define yy_set_bol(at_bol) \
+ { \
+ if ( ! YY_CURRENT_BUFFER ){\
+ pcap_ensure_buffer_stack (); \
+ YY_CURRENT_BUFFER_LVALUE = \
+ pcap__create_buffer(pcap_in,YY_BUF_SIZE ); \
+ } \
+ YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \
+ }
+
+#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol)
+
+/* Begin user sect3 */
+
+typedef unsigned char YY_CHAR;
+
+FILE *pcap_in = (FILE *) 0, *pcap_out = (FILE *) 0;
+
+typedef int yy_state_type;
+
+extern int pcap_lineno;
+
+int pcap_lineno = 1;
+
+extern char *pcap_text;
+#define yytext_ptr pcap_text
+
+static yy_state_type yy_get_previous_state (void );
+static yy_state_type yy_try_NUL_trans (yy_state_type current_state );
+static int yy_get_next_buffer (void );
+static void yy_fatal_error (yyconst char msg[] );
+
+/* Done after the current pattern has been matched and before the
+ * corresponding action - sets up pcap_text.
+ */
+#define YY_DO_BEFORE_ACTION \
+ (yytext_ptr) = yy_bp; \
+ pcap_leng = (size_t) (yy_cp - yy_bp); \
+ (yy_hold_char) = *yy_cp; \
+ *yy_cp = '\0'; \
+ (yy_c_buf_p) = yy_cp;
+
+#define YY_NUM_RULES 52
+#define YY_END_OF_BUFFER 53
+/* This struct is not used in this scanner,
+ but its presence is necessary. */
+struct yy_trans_info
+ {
+ flex_int32_t yy_verify;
+ flex_int32_t yy_nxt;
+ };
+static yyconst flex_int16_t yy_accept[217] =
+ { 0,
+ 0, 0, 53, 51, 36, 36, 37, 37, 37, 37,
+ 51, 44, 44, 37, 37, 37, 51, 51, 51, 51,
+ 51, 51, 51, 51, 51, 51, 51, 51, 51, 51,
+ 51, 51, 51, 51, 51, 51, 37, 0, 50, 40,
+ 30, 0, 48, 44, 0, 48, 48, 48, 42, 39,
+ 41, 38, 43, 49, 49, 49, 48, 48, 48, 48,
+ 48, 48, 48, 48, 48, 48, 48, 48, 48, 48,
+ 48, 7, 48, 48, 48, 48, 48, 48, 48, 48,
+ 31, 48, 48, 48, 48, 48, 48, 48, 48, 48,
+ 48, 31, 45, 45, 44, 0, 0, 44, 30, 5,
+
+ 48, 48, 48, 48, 1, 48, 48, 48, 48, 48,
+ 48, 48, 48, 48, 15, 33, 48, 48, 48, 48,
+ 48, 20, 32, 48, 48, 3, 48, 48, 16, 48,
+ 2, 8, 9, 48, 48, 0, 47, 0, 48, 48,
+ 27, 48, 48, 4, 48, 48, 19, 10, 11, 12,
+ 48, 48, 25, 21, 48, 48, 48, 48, 22, 48,
+ 6, 45, 45, 45, 0, 47, 0, 13, 48, 48,
+ 48, 48, 48, 48, 18, 17, 48, 48, 23, 48,
+ 48, 0, 47, 48, 14, 48, 48, 48, 33, 48,
+ 48, 45, 45, 45, 0, 48, 24, 26, 34, 48,
+
+ 48, 48, 0, 47, 48, 48, 35, 45, 0, 28,
+ 29, 0, 47, 46, 46, 0
+ } ;
+
+static yyconst flex_int32_t yy_ec[256] =
+ { 0,
+ 1, 1, 1, 1, 1, 1, 1, 1, 2, 3,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 2, 4, 1, 1, 1, 1, 5, 1, 6,
+ 6, 7, 7, 1, 8, 9, 7, 10, 11, 11,
+ 11, 11, 11, 11, 11, 11, 11, 12, 1, 13,
+ 14, 15, 1, 1, 16, 16, 16, 16, 16, 16,
+ 17, 17, 17, 17, 17, 17, 17, 17, 17, 17,
+ 17, 17, 17, 17, 17, 17, 17, 18, 17, 17,
+ 19, 20, 19, 1, 21, 1, 22, 23, 24, 25,
+
+ 26, 27, 28, 29, 30, 17, 31, 32, 33, 34,
+ 35, 36, 17, 37, 38, 39, 40, 17, 41, 42,
+ 43, 17, 1, 44, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1
+ } ;
+
+static yyconst flex_int32_t yy_meta[45] =
+ { 0,
+ 1, 2, 2, 2, 1, 2, 1, 1, 1, 3,
+ 3, 3, 1, 1, 1, 3, 1, 1, 1, 1,
+ 1, 3, 3, 3, 3, 3, 3, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1
+ } ;
+
+static yyconst flex_int16_t yy_base[230] =
+ { 0,
+ 0, 0, 381, 44, 382, 382, 366, 374, 382, 45,
+ 382, 68, 29, 35, 364, 39, 103, 137, 121, 171,
+ 24, 92, 86, 131, 33, 342, 108, 113, 47, 24,
+ 79, 136, 354, 36, 351, 349, 329, 176, 382, 382,
+ 382, 0, 127, 175, 360, 359, 0, 204, 382, 382,
+ 382, 382, 382, 191, 0, 0, 345, 333, 346, 332,
+ 327, 103, 326, 335, 142, 324, 336, 323, 327, 29,
+ 336, 0, 319, 140, 323, 318, 319, 322, 314, 313,
+ 0, 312, 313, 313, 313, 310, 324, 315, 320, 307,
+ 306, 382, 191, 184, 207, 329, 328, 330, 0, 0,
+
+ 306, 315, 310, 301, 0, 308, 303, 306, 309, 291,
+ 293, 292, 291, 291, 0, 297, 286, 292, 291, 115,
+ 282, 0, 0, 297, 280, 0, 279, 281, 0, 280,
+ 0, 0, 0, 147, 224, 303, 302, 301, 281, 286,
+ 0, 284, 272, 0, 267, 268, 0, 0, 0, 0,
+ 266, 266, 0, 0, 272, 279, 272, 266, 0, 265,
+ 0, 214, 227, 290, 286, 284, 276, 0, 263, 247,
+ 263, 258, 248, 252, 0, 0, 256, 239, 0, 165,
+ 247, 263, 256, 245, 0, 223, 228, 239, 0, 240,
+ 227, 234, 180, 251, 247, 217, 0, 0, 0, 216,
+
+ 228, 267, 231, 230, 202, 200, 0, 0, 210, 0,
+ 0, 207, 200, 195, 192, 382, 294, 196, 194, 166,
+ 163, 147, 131, 121, 114, 85, 80, 78, 69
+ } ;
+
+static yyconst flex_int16_t yy_def[230] =
+ { 0,
+ 216, 1, 216, 216, 216, 216, 216, 216, 216, 216,
+ 216, 216, 12, 216, 216, 216, 12, 12, 217, 12,
+ 20, 20, 20, 20, 18, 18, 18, 18, 18, 18,
+ 18, 18, 18, 18, 18, 18, 216, 216, 216, 216,
+ 216, 18, 18, 18, 218, 18, 18, 18, 216, 216,
+ 216, 216, 216, 217, 217, 217, 18, 18, 18, 18,
+ 18, 18, 18, 18, 18, 18, 18, 18, 18, 18,
+ 18, 18, 18, 18, 18, 18, 18, 18, 18, 18,
+ 18, 18, 18, 18, 18, 18, 18, 18, 18, 18,
+ 18, 216, 18, 18, 18, 219, 220, 48, 18, 18,
+
+ 18, 18, 18, 18, 18, 18, 18, 18, 18, 18,
+ 18, 18, 18, 18, 18, 18, 18, 18, 18, 18,
+ 18, 18, 18, 18, 18, 18, 18, 18, 18, 18,
+ 18, 18, 18, 18, 18, 216, 221, 222, 18, 18,
+ 18, 18, 18, 18, 18, 18, 18, 18, 18, 18,
+ 18, 18, 18, 18, 18, 18, 18, 18, 18, 18,
+ 18, 18, 18, 135, 223, 220, 216, 18, 18, 18,
+ 18, 18, 18, 18, 18, 18, 18, 18, 18, 18,
+ 18, 216, 224, 18, 18, 18, 18, 18, 18, 18,
+ 18, 18, 18, 181, 225, 18, 18, 18, 18, 18,
+
+ 18, 18, 216, 226, 18, 18, 18, 202, 227, 18,
+ 18, 216, 228, 229, 216, 0, 216, 216, 216, 216,
+ 216, 216, 216, 216, 216, 216, 216, 216, 216
+ } ;
+
+static yyconst flex_int16_t yy_nxt[427] =
+ { 0,
+ 4, 5, 6, 7, 8, 9, 10, 9, 11, 12,
+ 13, 10, 14, 15, 16, 17, 18, 18, 9, 19,
+ 11, 20, 21, 17, 22, 23, 24, 25, 26, 27,
+ 18, 28, 29, 30, 31, 32, 33, 34, 35, 36,
+ 18, 18, 18, 37, 38, 38, 47, 49, 50, 79,
+ 38, 38, 52, 53, 66, 38, 38, 47, 80, 87,
+ 60, 112, 47, 38, 38, 113, 61, 88, 76, 67,
+ 47, 215, 89, 39, 39, 42, 43, 44, 44, 45,
+ 214, 77, 212, 46, 47, 48, 78, 209, 42, 46,
+ 46, 46, 46, 46, 46, 47, 47, 47, 47, 47,
+
+ 47, 47, 47, 47, 47, 47, 47, 47, 47, 48,
+ 47, 47, 46, 46, 45, 81, 203, 62, 82, 47,
+ 47, 54, 47, 195, 64, 47, 104, 54, 47, 63,
+ 47, 69, 54, 182, 73, 70, 93, 94, 74, 155,
+ 54, 71, 75, 72, 47, 47, 47, 47, 216, 167,
+ 56, 156, 47, 45, 47, 65, 162, 163, 47, 47,
+ 47, 47, 47, 47, 47, 165, 107, 47, 138, 47,
+ 83, 84, 85, 116, 192, 193, 38, 117, 47, 47,
+ 46, 46, 38, 43, 95, 95, 45, 38, 47, 193,
+ 193, 54, 134, 94, 94, 38, 136, 54, 96, 134,
+
+ 94, 94, 54, 166, 57, 39, 166, 58, 135, 59,
+ 54, 166, 47, 98, 98, 43, 95, 95, 213, 98,
+ 56, 213, 180, 163, 163, 98, 98, 98, 98, 98,
+ 98, 181, 135, 164, 164, 180, 163, 163, 211, 164,
+ 210, 166, 204, 193, 193, 164, 164, 164, 164, 164,
+ 164, 202, 207, 206, 205, 181, 194, 194, 204, 180,
+ 201, 200, 194, 199, 198, 197, 196, 166, 194, 194,
+ 194, 194, 194, 194, 183, 202, 208, 208, 191, 190,
+ 189, 188, 208, 187, 186, 185, 184, 166, 208, 208,
+ 208, 208, 208, 208, 55, 166, 55, 183, 134, 179,
+
+ 178, 177, 176, 175, 174, 173, 172, 171, 126, 170,
+ 169, 168, 166, 166, 137, 126, 161, 160, 159, 158,
+ 157, 154, 126, 153, 152, 151, 150, 149, 148, 147,
+ 146, 145, 144, 143, 142, 141, 140, 139, 43, 97,
+ 137, 133, 132, 131, 130, 129, 128, 127, 126, 125,
+ 124, 123, 122, 121, 120, 119, 118, 115, 114, 111,
+ 110, 109, 108, 106, 105, 103, 102, 101, 100, 99,
+ 45, 97, 92, 91, 90, 86, 68, 51, 41, 40,
+ 216, 3, 216, 216, 216, 216, 216, 216, 216, 216,
+ 216, 216, 216, 216, 216, 216, 216, 216, 216, 216,
+
+ 216, 216, 216, 216, 216, 216, 216, 216, 216, 216,
+ 216, 216, 216, 216, 216, 216, 216, 216, 216, 216,
+ 216, 216, 216, 216, 216, 216
+ } ;
+
+static yyconst flex_int16_t yy_chk[427] =
+ { 0,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 4, 10, 13, 14, 14, 30,
+ 4, 10, 16, 16, 25, 4, 10, 21, 30, 34,
+ 21, 70, 21, 4, 10, 70, 21, 34, 29, 25,
+ 13, 229, 34, 4, 10, 12, 12, 12, 12, 12,
+ 228, 29, 227, 12, 12, 12, 29, 226, 12, 12,
+ 12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
+
+ 12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
+ 12, 17, 17, 17, 62, 31, 225, 22, 31, 23,
+ 17, 19, 23, 224, 23, 22, 62, 19, 22, 22,
+ 22, 27, 19, 223, 28, 27, 43, 43, 28, 120,
+ 19, 27, 28, 27, 17, 18, 18, 18, 18, 222,
+ 19, 120, 18, 65, 18, 24, 134, 134, 18, 18,
+ 18, 18, 18, 18, 24, 221, 65, 24, 220, 24,
+ 32, 32, 32, 74, 180, 180, 38, 74, 18, 20,
+ 20, 20, 38, 44, 44, 44, 44, 38, 20, 193,
+ 193, 54, 94, 94, 94, 38, 219, 54, 218, 93,
+
+ 93, 93, 54, 215, 20, 38, 214, 20, 93, 20,
+ 54, 213, 20, 48, 48, 95, 95, 95, 212, 48,
+ 54, 209, 162, 162, 162, 48, 48, 48, 48, 48,
+ 48, 162, 93, 135, 135, 163, 163, 163, 206, 135,
+ 205, 204, 203, 192, 192, 135, 135, 135, 135, 135,
+ 135, 192, 201, 200, 196, 162, 181, 181, 195, 194,
+ 191, 190, 181, 188, 187, 186, 184, 183, 181, 181,
+ 181, 181, 181, 181, 182, 192, 202, 202, 178, 177,
+ 174, 173, 202, 172, 171, 170, 169, 167, 202, 202,
+ 202, 202, 202, 202, 217, 166, 217, 165, 164, 160,
+
+ 158, 157, 156, 155, 152, 151, 146, 145, 143, 142,
+ 140, 139, 138, 137, 136, 130, 128, 127, 125, 124,
+ 121, 119, 118, 117, 116, 114, 113, 112, 111, 110,
+ 109, 108, 107, 106, 104, 103, 102, 101, 98, 97,
+ 96, 91, 90, 89, 88, 87, 86, 85, 84, 83,
+ 82, 80, 79, 78, 77, 76, 75, 73, 71, 69,
+ 68, 67, 66, 64, 63, 61, 60, 59, 58, 57,
+ 46, 45, 37, 36, 35, 33, 26, 15, 8, 7,
+ 3, 216, 216, 216, 216, 216, 216, 216, 216, 216,
+ 216, 216, 216, 216, 216, 216, 216, 216, 216, 216,
+
+ 216, 216, 216, 216, 216, 216, 216, 216, 216, 216,
+ 216, 216, 216, 216, 216, 216, 216, 216, 216, 216,
+ 216, 216, 216, 216, 216, 216
+ } ;
+
+static yy_state_type yy_last_accepting_state;
+static char *yy_last_accepting_cpos;
+
+extern int pcap__flex_debug;
+int pcap__flex_debug = 0;
+
+/* The intent behind this definition is that it'll catch
+ * any uses of REJECT which flex missed.
+ */
+#define REJECT reject_used_but_not_detected
+#define yymore() yymore_used_but_not_detected
+#define YY_MORE_ADJ 0
+#define YY_RESTORE_YY_MORE_OFFSET
+char *pcap_text;
+#line 1 "scanner.l"
+#line 2 "scanner.l"
+/*
+ * Copyright (c) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ */
+
+#ifndef lint
+static const char rcsid[] =
+ "@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/scanner.l,v 1.1 1999/08/26 10:05:27 johana Exp $ (LBL)";
+#endif
+
+#include <sys/types.h>
+#include <sys/time.h>
+
+#include <ctype.h>
+#include <unistd.h>
+
+#include "pcap-int.h"
+
+#include "gencode.h"
+#include <pcap-namedb.h>
+#include "tokdefs.h"
+
+#include "gnuc.h"
+#ifdef HAVE_OS_PROTO_H
+#include "os-proto.h"
+#endif
+
+static int stoi(char *);
+static inline int xdtoi(int);
+
+#ifdef FLEX_SCANNER
+#define YY_NO_UNPUT
+#undef YY_INPUT
+#define YY_INPUT(buf, result, max)\
+ {\
+ char *src = in_buffer;\
+ int i;\
+\
+ if (*src == 0)\
+ result = YY_NULL;\
+ else {\
+ for (i = 0; *src && i < max; ++i)\
+ buf[i] = *src++;\
+ in_buffer += i;\
+ result = i;\
+ }\
+ }
+#else
+#undef getc
+#define getc(fp) (*in_buffer == 0 ? EOF : *in_buffer++)
+#endif
+
+#define yylval pcap_lval
+extern YYSTYPE yylval;
+
+static char *in_buffer;
+
+#line 694 "<stdout>"
+
+#define INITIAL 0
+
+#ifndef YY_NO_UNISTD_H
+/* Special case for "unistd.h", since it is non-ANSI. We include it way
+ * down here because we want the user's section 1 to have been scanned first.
+ * The user has a chance to override it with an option.
+ */
+#include <unistd.h>
+#endif
+
+#ifndef YY_EXTRA_TYPE
+#define YY_EXTRA_TYPE void *
+#endif
+
+static int yy_init_globals (void );
+
+/* Macros after this point can all be overridden by user definitions in
+ * section 1.
+ */
+
+#ifndef YY_SKIP_YYWRAP
+#ifdef __cplusplus
+extern "C" int pcap_wrap (void );
+#else
+extern int pcap_wrap (void );
+#endif
+#endif
+
+ static void yyunput (int c,char *buf_ptr );
+
+#ifndef yytext_ptr
+static void yy_flex_strncpy (char *,yyconst char *,int );
+#endif
+
+#ifdef YY_NEED_STRLEN
+static int yy_flex_strlen (yyconst char * );
+#endif
+
+#ifndef YY_NO_INPUT
+
+#ifdef __cplusplus
+static int yyinput (void );
+#else
+static int input (void );
+#endif
+
+#endif
+
+/* Amount of stuff to slurp up with each read. */
+#ifndef YY_READ_BUF_SIZE
+#define YY_READ_BUF_SIZE 8192
+#endif
+
+/* Copy whatever the last rule matched to the standard output. */
+#ifndef ECHO
+/* This used to be an fputs(), but since the string might contain NUL's,
+ * we now use fwrite().
+ */
+#define ECHO (void) fwrite( pcap_text, pcap_leng, 1, pcap_out )
+#endif
+
+/* Gets input and stuffs it into "buf". number of characters read, or YY_NULL,
+ * is returned in "result".
+ */
+#ifndef YY_INPUT
+#define YY_INPUT(buf,result,max_size) \
+ if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \
+ { \
+ int c = '*'; \
+ size_t n; \
+ for ( n = 0; n < max_size && \
+ (c = getc( pcap_in )) != EOF && c != '\n'; ++n ) \
+ buf[n] = (char) c; \
+ if ( c == '\n' ) \
+ buf[n++] = (char) c; \
+ if ( c == EOF && ferror( pcap_in ) ) \
+ YY_FATAL_ERROR( "input in flex scanner failed" ); \
+ result = n; \
+ } \
+ else \
+ { \
+ errno=0; \
+ while ( (result = fread(buf, 1, max_size, pcap_in))==0 && ferror(pcap_in)) \
+ { \
+ if( errno != EINTR) \
+ { \
+ YY_FATAL_ERROR( "input in flex scanner failed" ); \
+ break; \
+ } \
+ errno=0; \
+ clearerr(pcap_in); \
+ } \
+ }\
+\
+
+#endif
+
+/* No semi-colon after return; correct usage is to write "yyterminate();" -
+ * we don't want an extra ';' after the "return" because that will cause
+ * some compilers to complain about unreachable statements.
+ */
+#ifndef yyterminate
+#define yyterminate() return YY_NULL
+#endif
+
+/* Number of entries by which start-condition stack grows. */
+#ifndef YY_START_STACK_INCR
+#define YY_START_STACK_INCR 25
+#endif
+
+/* Report a fatal error. */
+#ifndef YY_FATAL_ERROR
+#define YY_FATAL_ERROR(msg) yy_fatal_error( msg )
+#endif
+
+/* end tables serialization structures and prototypes */
+
+/* Default declaration of generated scanner - a define so the user can
+ * easily add parameters.
+ */
+#ifndef YY_DECL
+#define YY_DECL_IS_OURS 1
+
+extern int pcap_lex (void);
+
+#define YY_DECL int pcap_lex (void)
+#endif /* !YY_DECL */
+
+/* Code executed at the beginning of each rule, after pcap_text and pcap_leng
+ * have been set up.
+ */
+#ifndef YY_USER_ACTION
+#define YY_USER_ACTION
+#endif
+
+/* Code executed at the end of each rule. */
+#ifndef YY_BREAK
+#define YY_BREAK break;
+#endif
+
+#define YY_RULE_SETUP \
+ YY_USER_ACTION
+
+/** The main scanner function which does all the work.
+ */
+YY_DECL
+{
+ register yy_state_type yy_current_state;
+ register char *yy_cp, *yy_bp;
+ register int yy_act;
+
+#line 82 "scanner.l"
+
+#line 849 "<stdout>"
+
+ if ( !(yy_init) )
+ {
+ (yy_init) = 1;
+
+#ifdef YY_USER_INIT
+ YY_USER_INIT;
+#endif
+
+ if ( ! (yy_start) )
+ (yy_start) = 1; /* first start state */
+
+ if ( ! pcap_in )
+ pcap_in = stdin;
+
+ if ( ! pcap_out )
+ pcap_out = stdout;
+
+ if ( ! YY_CURRENT_BUFFER ) {
+ pcap_ensure_buffer_stack ();
+ YY_CURRENT_BUFFER_LVALUE =
+ pcap__create_buffer(pcap_in,YY_BUF_SIZE );
+ }
+
+ pcap__load_buffer_state( );
+ }
+
+ while ( 1 ) /* loops until end-of-file is reached */
+ {
+ yy_cp = (yy_c_buf_p);
+
+ /* Support of pcap_text. */
+ *yy_cp = (yy_hold_char);
+
+ /* yy_bp points to the position in yy_ch_buf of the start of
+ * the current run.
+ */
+ yy_bp = yy_cp;
+
+ yy_current_state = (yy_start);
+yy_match:
+ do
+ {
+ register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)];
+ if ( yy_accept[yy_current_state] )
+ {
+ (yy_last_accepting_state) = yy_current_state;
+ (yy_last_accepting_cpos) = yy_cp;
+ }
+ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
+ {
+ yy_current_state = (int) yy_def[yy_current_state];
+ if ( yy_current_state >= 217 )
+ yy_c = yy_meta[(unsigned int) yy_c];
+ }
+ yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
+ ++yy_cp;
+ }
+ while ( yy_base[yy_current_state] != 382 );
+
+yy_find_action:
+ yy_act = yy_accept[yy_current_state];
+ if ( yy_act == 0 )
+ { /* have to back up */
+ yy_cp = (yy_last_accepting_cpos);
+ yy_current_state = (yy_last_accepting_state);
+ yy_act = yy_accept[yy_current_state];
+ }
+
+ YY_DO_BEFORE_ACTION;
+
+do_action: /* This label is used only to access EOF actions. */
+
+ switch ( yy_act )
+ { /* beginning of action switch */
+ case 0: /* must back up */
+ /* undo the effects of YY_DO_BEFORE_ACTION */
+ *yy_cp = (yy_hold_char);
+ yy_cp = (yy_last_accepting_cpos);
+ yy_current_state = (yy_last_accepting_state);
+ goto yy_find_action;
+
+case 1:
+YY_RULE_SETUP
+#line 83 "scanner.l"
+return DST;
+ YY_BREAK
+case 2:
+YY_RULE_SETUP
+#line 84 "scanner.l"
+return SRC;
+ YY_BREAK
+case 3:
+YY_RULE_SETUP
+#line 86 "scanner.l"
+return LINK;
+ YY_BREAK
+case 4:
+YY_RULE_SETUP
+#line 87 "scanner.l"
+return LINK;
+ YY_BREAK
+case 5:
+YY_RULE_SETUP
+#line 88 "scanner.l"
+return ARP;
+ YY_BREAK
+case 6:
+YY_RULE_SETUP
+#line 89 "scanner.l"
+return RARP;
+ YY_BREAK
+case 7:
+YY_RULE_SETUP
+#line 90 "scanner.l"
+return IP;
+ YY_BREAK
+case 8:
+YY_RULE_SETUP
+#line 91 "scanner.l"
+return TCP;
+ YY_BREAK
+case 9:
+YY_RULE_SETUP
+#line 92 "scanner.l"
+return UDP;
+ YY_BREAK
+case 10:
+YY_RULE_SETUP
+#line 93 "scanner.l"
+return ICMP;
+ YY_BREAK
+case 11:
+YY_RULE_SETUP
+#line 94 "scanner.l"
+return IGMP;
+ YY_BREAK
+case 12:
+YY_RULE_SETUP
+#line 95 "scanner.l"
+return IGRP;
+ YY_BREAK
+case 13:
+YY_RULE_SETUP
+#line 97 "scanner.l"
+return ATALK;
+ YY_BREAK
+case 14:
+YY_RULE_SETUP
+#line 98 "scanner.l"
+return DECNET;
+ YY_BREAK
+case 15:
+YY_RULE_SETUP
+#line 99 "scanner.l"
+return LAT;
+ YY_BREAK
+case 16:
+YY_RULE_SETUP
+#line 100 "scanner.l"
+return SCA;
+ YY_BREAK
+case 17:
+YY_RULE_SETUP
+#line 101 "scanner.l"
+return MOPRC;
+ YY_BREAK
+case 18:
+YY_RULE_SETUP
+#line 102 "scanner.l"
+return MOPDL;
+ YY_BREAK
+case 19:
+YY_RULE_SETUP
+#line 104 "scanner.l"
+return HOST;
+ YY_BREAK
+case 20:
+YY_RULE_SETUP
+#line 105 "scanner.l"
+return NET;
+ YY_BREAK
+case 21:
+YY_RULE_SETUP
+#line 106 "scanner.l"
+return MASK;
+ YY_BREAK
+case 22:
+YY_RULE_SETUP
+#line 107 "scanner.l"
+return PORT;
+ YY_BREAK
+case 23:
+YY_RULE_SETUP
+#line 108 "scanner.l"
+return PROTO;
+ YY_BREAK
+case 24:
+YY_RULE_SETUP
+#line 110 "scanner.l"
+return GATEWAY;
+ YY_BREAK
+case 25:
+YY_RULE_SETUP
+#line 112 "scanner.l"
+return LESS;
+ YY_BREAK
+case 26:
+YY_RULE_SETUP
+#line 113 "scanner.l"
+return GREATER;
+ YY_BREAK
+case 27:
+YY_RULE_SETUP
+#line 114 "scanner.l"
+return BYTE;
+ YY_BREAK
+case 28:
+YY_RULE_SETUP
+#line 115 "scanner.l"
+return TK_BROADCAST;
+ YY_BREAK
+case 29:
+YY_RULE_SETUP
+#line 116 "scanner.l"
+return TK_MULTICAST;
+ YY_BREAK
+case 30:
+YY_RULE_SETUP
+#line 118 "scanner.l"
+return AND;
+ YY_BREAK
+case 31:
+YY_RULE_SETUP
+#line 119 "scanner.l"
+return OR;
+ YY_BREAK
+case 32:
+YY_RULE_SETUP
+#line 120 "scanner.l"
+return '!';
+ YY_BREAK
+case 33:
+YY_RULE_SETUP
+#line 122 "scanner.l"
+return LEN;
+ YY_BREAK
+case 34:
+YY_RULE_SETUP
+#line 123 "scanner.l"
+return INBOUND;
+ YY_BREAK
+case 35:
+YY_RULE_SETUP
+#line 124 "scanner.l"
+return OUTBOUND;
+ YY_BREAK
+case 36:
+/* rule 36 can match eol */
+YY_RULE_SETUP
+#line 126 "scanner.l"
+;
+ YY_BREAK
+case 37:
+YY_RULE_SETUP
+#line 127 "scanner.l"
+return pcap_text[0];
+ YY_BREAK
+case 38:
+YY_RULE_SETUP
+#line 128 "scanner.l"
+return GEQ;
+ YY_BREAK
+case 39:
+YY_RULE_SETUP
+#line 129 "scanner.l"
+return LEQ;
+ YY_BREAK
+case 40:
+YY_RULE_SETUP
+#line 130 "scanner.l"
+return NEQ;
+ YY_BREAK
+case 41:
+YY_RULE_SETUP
+#line 131 "scanner.l"
+return '=';
+ YY_BREAK
+case 42:
+YY_RULE_SETUP
+#line 132 "scanner.l"
+return LSH;
+ YY_BREAK
+case 43:
+YY_RULE_SETUP
+#line 133 "scanner.l"
+return RSH;
+ YY_BREAK
+case 44:
+YY_RULE_SETUP
+#line 134 "scanner.l"
+{ yylval.i = stoi((char *)pcap_text); return NUM; }
+ YY_BREAK
+case 45:
+YY_RULE_SETUP
+#line 135 "scanner.l"
+{
+ yylval.s = sdup((char *)pcap_text); return HID; }
+ YY_BREAK
+case 46:
+YY_RULE_SETUP
+#line 137 "scanner.l"
+{ yylval.e = pcap_ether_aton((char *)pcap_text);
+ return EID; }
+ YY_BREAK
+case 47:
+YY_RULE_SETUP
+#line 139 "scanner.l"
+{ bpf_error("bogus ethernet address %s", pcap_text); }
+ YY_BREAK
+case 48:
+YY_RULE_SETUP
+#line 140 "scanner.l"
+{
+ yylval.s = sdup((char *)pcap_text); return ID; }
+ YY_BREAK
+case 49:
+YY_RULE_SETUP
+#line 142 "scanner.l"
+{ yylval.s = sdup((char *)pcap_text + 1); return ID; }
+ YY_BREAK
+case 50:
+YY_RULE_SETUP
+#line 143 "scanner.l"
+{
+ bpf_error("illegal token: %s\n", pcap_text); }
+ YY_BREAK
+case 51:
+YY_RULE_SETUP
+#line 145 "scanner.l"
+{ bpf_error("illegal char '%c'", *pcap_text); }
+ YY_BREAK
+case 52:
+YY_RULE_SETUP
+#line 146 "scanner.l"
+ECHO;
+ YY_BREAK
+#line 1197 "<stdout>"
+case YY_STATE_EOF(INITIAL):
+ yyterminate();
+
+ case YY_END_OF_BUFFER:
+ {
+ /* Amount of text matched not including the EOB char. */
+ int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1;
+
+ /* Undo the effects of YY_DO_BEFORE_ACTION. */
+ *yy_cp = (yy_hold_char);
+ YY_RESTORE_YY_MORE_OFFSET
+
+ if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW )
+ {
+ /* We're scanning a new file or input source. It's
+ * possible that this happened because the user
+ * just pointed pcap_in at a new source and called
+ * pcap_lex(). If so, then we have to assure
+ * consistency between YY_CURRENT_BUFFER and our
+ * globals. Here is the right place to do so, because
+ * this is the first action (other than possibly a
+ * back-up) that will match for the new input source.
+ */
+ (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
+ YY_CURRENT_BUFFER_LVALUE->yy_input_file = pcap_in;
+ YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL;
+ }
+
+ /* Note that here we test for yy_c_buf_p "<=" to the position
+ * of the first EOB in the buffer, since yy_c_buf_p will
+ * already have been incremented past the NUL character
+ * (since all states make transitions on EOB to the
+ * end-of-buffer state). Contrast this with the test
+ * in input().
+ */
+ if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
+ { /* This was really a NUL. */
+ yy_state_type yy_next_state;
+
+ (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text;
+
+ yy_current_state = yy_get_previous_state( );
+
+ /* Okay, we're now positioned to make the NUL
+ * transition. We couldn't have
+ * yy_get_previous_state() go ahead and do it
+ * for us because it doesn't know how to deal
+ * with the possibility of jamming (and we don't
+ * want to build jamming into it because then it
+ * will run more slowly).
+ */
+
+ yy_next_state = yy_try_NUL_trans( yy_current_state );
+
+ yy_bp = (yytext_ptr) + YY_MORE_ADJ;
+
+ if ( yy_next_state )
+ {
+ /* Consume the NUL. */
+ yy_cp = ++(yy_c_buf_p);
+ yy_current_state = yy_next_state;
+ goto yy_match;
+ }
+
+ else
+ {
+ yy_cp = (yy_c_buf_p);
+ goto yy_find_action;
+ }
+ }
+
+ else switch ( yy_get_next_buffer( ) )
+ {
+ case EOB_ACT_END_OF_FILE:
+ {
+ (yy_did_buffer_switch_on_eof) = 0;
+
+ if ( pcap_wrap( ) )
+ {
+ /* Note: because we've taken care in
+ * yy_get_next_buffer() to have set up
+ * pcap_text, we can now set up
+ * yy_c_buf_p so that if some total
+ * hoser (like flex itself) wants to
+ * call the scanner after we return the
+ * YY_NULL, it'll still work - another
+ * YY_NULL will get returned.
+ */
+ (yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ;
+
+ yy_act = YY_STATE_EOF(YY_START);
+ goto do_action;
+ }
+
+ else
+ {
+ if ( ! (yy_did_buffer_switch_on_eof) )
+ YY_NEW_FILE;
+ }
+ break;
+ }
+
+ case EOB_ACT_CONTINUE_SCAN:
+ (yy_c_buf_p) =
+ (yytext_ptr) + yy_amount_of_matched_text;
+
+ yy_current_state = yy_get_previous_state( );
+
+ yy_cp = (yy_c_buf_p);
+ yy_bp = (yytext_ptr) + YY_MORE_ADJ;
+ goto yy_match;
+
+ case EOB_ACT_LAST_MATCH:
+ (yy_c_buf_p) =
+ &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)];
+
+ yy_current_state = yy_get_previous_state( );
+
+ yy_cp = (yy_c_buf_p);
+ yy_bp = (yytext_ptr) + YY_MORE_ADJ;
+ goto yy_find_action;
+ }
+ break;
+ }
+
+ default:
+ YY_FATAL_ERROR(
+ "fatal flex scanner internal error--no action found" );
+ } /* end of action switch */
+ } /* end of scanning one token */
+} /* end of pcap_lex */
+
+/* yy_get_next_buffer - try to read in a new buffer
+ *
+ * Returns a code representing an action:
+ * EOB_ACT_LAST_MATCH -
+ * EOB_ACT_CONTINUE_SCAN - continue scanning from current position
+ * EOB_ACT_END_OF_FILE - end of file
+ */
+static int yy_get_next_buffer (void)
+{
+ register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf;
+ register char *source = (yytext_ptr);
+ register int number_to_move, i;
+ int ret_val;
+
+ if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] )
+ YY_FATAL_ERROR(
+ "fatal flex scanner internal error--end of buffer missed" );
+
+ if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 )
+ { /* Don't try to fill the buffer, so this is an EOF. */
+ if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 )
+ {
+ /* We matched a single character, the EOB, so
+ * treat this as a final EOF.
+ */
+ return EOB_ACT_END_OF_FILE;
+ }
+
+ else
+ {
+ /* We matched some text prior to the EOB, first
+ * process it.
+ */
+ return EOB_ACT_LAST_MATCH;
+ }
+ }
+
+ /* Try to read more data. */
+
+ /* First move last chars to start of buffer. */
+ number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1;
+
+ for ( i = 0; i < number_to_move; ++i )
+ *(dest++) = *(source++);
+
+ if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING )
+ /* don't do the read, it's not guaranteed to return an EOF,
+ * just force an EOF
+ */
+ YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0;
+
+ else
+ {
+ int num_to_read =
+ YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1;
+
+ while ( num_to_read <= 0 )
+ { /* Not enough room in the buffer - grow it. */
+
+ /* just a shorter name for the current buffer */
+ YY_BUFFER_STATE b = YY_CURRENT_BUFFER;
+
+ int yy_c_buf_p_offset =
+ (int) ((yy_c_buf_p) - b->yy_ch_buf);
+
+ if ( b->yy_is_our_buffer )
+ {
+ int new_size = b->yy_buf_size * 2;
+
+ if ( new_size <= 0 )
+ b->yy_buf_size += b->yy_buf_size / 8;
+ else
+ b->yy_buf_size *= 2;
+
+ b->yy_ch_buf = (char *)
+ /* Include room in for 2 EOB chars. */
+ pcap_realloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 );
+ }
+ else
+ /* Can't grow it, we don't own it. */
+ b->yy_ch_buf = 0;
+
+ if ( ! b->yy_ch_buf )
+ YY_FATAL_ERROR(
+ "fatal error - scanner input buffer overflow" );
+
+ (yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset];
+
+ num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size -
+ number_to_move - 1;
+
+ }
+
+ if ( num_to_read > YY_READ_BUF_SIZE )
+ num_to_read = YY_READ_BUF_SIZE;
+
+ /* Read in more data. */
+ YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]),
+ (yy_n_chars), (size_t) num_to_read );
+
+ YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
+ }
+
+ if ( (yy_n_chars) == 0 )
+ {
+ if ( number_to_move == YY_MORE_ADJ )
+ {
+ ret_val = EOB_ACT_END_OF_FILE;
+ pcap_restart(pcap_in );
+ }
+
+ else
+ {
+ ret_val = EOB_ACT_LAST_MATCH;
+ YY_CURRENT_BUFFER_LVALUE->yy_buffer_status =
+ YY_BUFFER_EOF_PENDING;
+ }
+ }
+
+ else
+ ret_val = EOB_ACT_CONTINUE_SCAN;
+
+ (yy_n_chars) += number_to_move;
+ YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR;
+ YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR;
+
+ (yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0];
+
+ return ret_val;
+}
+
+/* yy_get_previous_state - get the state just before the EOB char was reached */
+
+ static yy_state_type yy_get_previous_state (void)
+{
+ register yy_state_type yy_current_state;
+ register char *yy_cp;
+
+ yy_current_state = (yy_start);
+
+ for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )
+ {
+ register YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1);
+ if ( yy_accept[yy_current_state] )
+ {
+ (yy_last_accepting_state) = yy_current_state;
+ (yy_last_accepting_cpos) = yy_cp;
+ }
+ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
+ {
+ yy_current_state = (int) yy_def[yy_current_state];
+ if ( yy_current_state >= 217 )
+ yy_c = yy_meta[(unsigned int) yy_c];
+ }
+ yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
+ }
+
+ return yy_current_state;
+}
+
+/* yy_try_NUL_trans - try to make a transition on the NUL character
+ *
+ * synopsis
+ * next_state = yy_try_NUL_trans( current_state );
+ */
+ static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state )
+{
+ register int yy_is_jam;
+ register char *yy_cp = (yy_c_buf_p);
+
+ register YY_CHAR yy_c = 1;
+ if ( yy_accept[yy_current_state] )
+ {
+ (yy_last_accepting_state) = yy_current_state;
+ (yy_last_accepting_cpos) = yy_cp;
+ }
+ while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
+ {
+ yy_current_state = (int) yy_def[yy_current_state];
+ if ( yy_current_state >= 217 )
+ yy_c = yy_meta[(unsigned int) yy_c];
+ }
+ yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
+ yy_is_jam = (yy_current_state == 216);
+
+ return yy_is_jam ? 0 : yy_current_state;
+}
+
+ static void yyunput (int c, register char * yy_bp )
+{
+ register char *yy_cp;
+
+ yy_cp = (yy_c_buf_p);
+
+ /* undo effects of setting up pcap_text */
+ *yy_cp = (yy_hold_char);
+
+ if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 )
+ { /* need to shift things up to make room */
+ /* +2 for EOB chars. */
+ register int number_to_move = (yy_n_chars) + 2;
+ register char *dest = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[
+ YY_CURRENT_BUFFER_LVALUE->yy_buf_size + 2];
+ register char *source =
+ &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move];
+
+ while ( source > YY_CURRENT_BUFFER_LVALUE->yy_ch_buf )
+ *--dest = *--source;
+
+ yy_cp += (int) (dest - source);
+ yy_bp += (int) (dest - source);
+ YY_CURRENT_BUFFER_LVALUE->yy_n_chars =
+ (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_buf_size;
+
+ if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 )
+ YY_FATAL_ERROR( "flex scanner push-back overflow" );
+ }
+
+ *--yy_cp = (char) c;
+
+ (yytext_ptr) = yy_bp;
+ (yy_hold_char) = *yy_cp;
+ (yy_c_buf_p) = yy_cp;
+}
+
+#ifndef YY_NO_INPUT
+#ifdef __cplusplus
+ static int yyinput (void)
+#else
+ static int input (void)
+#endif
+
+{
+ int c;
+
+ *(yy_c_buf_p) = (yy_hold_char);
+
+ if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )
+ {
+ /* yy_c_buf_p now points to the character we want to return.
+ * If this occurs *before* the EOB characters, then it's a
+ * valid NUL; if not, then we've hit the end of the buffer.
+ */
+ if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
+ /* This was really a NUL. */
+ *(yy_c_buf_p) = '\0';
+
+ else
+ { /* need more input */
+ int offset = (yy_c_buf_p) - (yytext_ptr);
+ ++(yy_c_buf_p);
+
+ switch ( yy_get_next_buffer( ) )
+ {
+ case EOB_ACT_LAST_MATCH:
+ /* This happens because yy_g_n_b()
+ * sees that we've accumulated a
+ * token and flags that we need to
+ * try matching the token before
+ * proceeding. But for input(),
+ * there's no matching to consider.
+ * So convert the EOB_ACT_LAST_MATCH
+ * to EOB_ACT_END_OF_FILE.
+ */
+
+ /* Reset buffer status. */
+ pcap_restart(pcap_in );
+
+ /*FALLTHROUGH*/
+
+ case EOB_ACT_END_OF_FILE:
+ {
+ if ( pcap_wrap( ) )
+ return EOF;
+
+ if ( ! (yy_did_buffer_switch_on_eof) )
+ YY_NEW_FILE;
+#ifdef __cplusplus
+ return yyinput();
+#else
+ return input();
+#endif
+ }
+
+ case EOB_ACT_CONTINUE_SCAN:
+ (yy_c_buf_p) = (yytext_ptr) + offset;
+ break;
+ }
+ }
+ }
+
+ c = *(unsigned char *) (yy_c_buf_p); /* cast for 8-bit char's */
+ *(yy_c_buf_p) = '\0'; /* preserve pcap_text */
+ (yy_hold_char) = *++(yy_c_buf_p);
+
+ return c;
+}
+#endif /* ifndef YY_NO_INPUT */
+
+/** Immediately switch to a different input stream.
+ * @param input_file A readable stream.
+ *
+ * @note This function does not reset the start condition to @c INITIAL .
+ */
+ void pcap_restart (FILE * input_file )
+{
+
+ if ( ! YY_CURRENT_BUFFER ){
+ pcap_ensure_buffer_stack ();
+ YY_CURRENT_BUFFER_LVALUE =
+ pcap__create_buffer(pcap_in,YY_BUF_SIZE );
+ }
+
+ pcap__init_buffer(YY_CURRENT_BUFFER,input_file );
+ pcap__load_buffer_state( );
+}
+
+/** Switch to a different input buffer.
+ * @param new_buffer The new input buffer.
+ *
+ */
+ void pcap__switch_to_buffer (YY_BUFFER_STATE new_buffer )
+{
+
+ /* TODO. We should be able to replace this entire function body
+ * with
+ * pcap_pop_buffer_state();
+ * pcap_push_buffer_state(new_buffer);
+ */
+ pcap_ensure_buffer_stack ();
+ if ( YY_CURRENT_BUFFER == new_buffer )
+ return;
+
+ if ( YY_CURRENT_BUFFER )
+ {
+ /* Flush out information for old buffer. */
+ *(yy_c_buf_p) = (yy_hold_char);
+ YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
+ YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
+ }
+
+ YY_CURRENT_BUFFER_LVALUE = new_buffer;
+ pcap__load_buffer_state( );
+
+ /* We don't actually know whether we did this switch during
+ * EOF (pcap_wrap()) processing, but the only time this flag
+ * is looked at is after pcap_wrap() is called, so it's safe
+ * to go ahead and always set it.
+ */
+ (yy_did_buffer_switch_on_eof) = 1;
+}
+
+static void pcap__load_buffer_state (void)
+{
+ (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
+ (yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos;
+ pcap_in = YY_CURRENT_BUFFER_LVALUE->yy_input_file;
+ (yy_hold_char) = *(yy_c_buf_p);
+}
+
+/** Allocate and initialize an input buffer state.
+ * @param file A readable stream.
+ * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.
+ *
+ * @return the allocated buffer state.
+ */
+ YY_BUFFER_STATE pcap__create_buffer (FILE * file, int size )
+{
+ YY_BUFFER_STATE b;
+
+ b = (YY_BUFFER_STATE) pcap_alloc(sizeof( struct yy_buffer_state ) );
+ if ( ! b )
+ YY_FATAL_ERROR( "out of dynamic memory in pcap__create_buffer()" );
+
+ b->yy_buf_size = size;
+
+ /* yy_ch_buf has to be 2 characters longer than the size given because
+ * we need to put in 2 end-of-buffer characters.
+ */
+ b->yy_ch_buf = (char *) pcap_alloc(b->yy_buf_size + 2 );
+ if ( ! b->yy_ch_buf )
+ YY_FATAL_ERROR( "out of dynamic memory in pcap__create_buffer()" );
+
+ b->yy_is_our_buffer = 1;
+
+ pcap__init_buffer(b,file );
+
+ return b;
+}
+
+/** Destroy the buffer.
+ * @param b a buffer created with pcap__create_buffer()
+ *
+ */
+ void pcap__delete_buffer (YY_BUFFER_STATE b )
+{
+
+ if ( ! b )
+ return;
+
+ if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */
+ YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0;
+
+ if ( b->yy_is_our_buffer )
+ pcap_free((void *) b->yy_ch_buf );
+
+ pcap_free((void *) b );
+}
+
+#ifndef __cplusplus
+extern int isatty (int );
+#endif /* __cplusplus */
+
+/* Initializes or reinitializes a buffer.
+ * This function is sometimes called more than once on the same buffer,
+ * such as during a pcap_restart() or at EOF.
+ */
+ static void pcap__init_buffer (YY_BUFFER_STATE b, FILE * file )
+
+{
+ int oerrno = errno;
+
+ pcap__flush_buffer(b );
+
+ b->yy_input_file = file;
+ b->yy_fill_buffer = 1;
+
+ /* If b is the current buffer, then pcap__init_buffer was _probably_
+ * called from pcap_restart() or through yy_get_next_buffer.
+ * In that case, we don't want to reset the lineno or column.
+ */
+ if (b != YY_CURRENT_BUFFER){
+ b->yy_bs_lineno = 1;
+ b->yy_bs_column = 0;
+ }
+
+ b->yy_is_interactive = file ? (isatty( fileno(file) ) > 0) : 0;
+
+ errno = oerrno;
+}
+
+/** Discard all buffered characters. On the next scan, YY_INPUT will be called.
+ * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.
+ *
+ */
+ void pcap__flush_buffer (YY_BUFFER_STATE b )
+{
+ if ( ! b )
+ return;
+
+ b->yy_n_chars = 0;
+
+ /* We always need two end-of-buffer characters. The first causes
+ * a transition to the end-of-buffer state. The second causes
+ * a jam in that state.
+ */
+ b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR;
+ b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR;
+
+ b->yy_buf_pos = &b->yy_ch_buf[0];
+
+ b->yy_at_bol = 1;
+ b->yy_buffer_status = YY_BUFFER_NEW;
+
+ if ( b == YY_CURRENT_BUFFER )
+ pcap__load_buffer_state( );
+}
+
+/** Pushes the new state onto the stack. The new state becomes
+ * the current state. This function will allocate the stack
+ * if necessary.
+ * @param new_buffer The new state.
+ *
+ */
+void pcap_push_buffer_state (YY_BUFFER_STATE new_buffer )
+{
+ if (new_buffer == NULL)
+ return;
+
+ pcap_ensure_buffer_stack();
+
+ /* This block is copied from pcap__switch_to_buffer. */
+ if ( YY_CURRENT_BUFFER )
+ {
+ /* Flush out information for old buffer. */
+ *(yy_c_buf_p) = (yy_hold_char);
+ YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
+ YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
+ }
+
+ /* Only push if top exists. Otherwise, replace top. */
+ if (YY_CURRENT_BUFFER)
+ (yy_buffer_stack_top)++;
+ YY_CURRENT_BUFFER_LVALUE = new_buffer;
+
+ /* copied from pcap__switch_to_buffer. */
+ pcap__load_buffer_state( );
+ (yy_did_buffer_switch_on_eof) = 1;
+}
+
+/** Removes and deletes the top of the stack, if present.
+ * The next element becomes the new top.
+ *
+ */
+void pcap_pop_buffer_state (void)
+{
+ if (!YY_CURRENT_BUFFER)
+ return;
+
+ pcap__delete_buffer(YY_CURRENT_BUFFER );
+ YY_CURRENT_BUFFER_LVALUE = NULL;
+ if ((yy_buffer_stack_top) > 0)
+ --(yy_buffer_stack_top);
+
+ if (YY_CURRENT_BUFFER) {
+ pcap__load_buffer_state( );
+ (yy_did_buffer_switch_on_eof) = 1;
+ }
+}
+
+/* Allocates the stack if it does not exist.
+ * Guarantees space for at least one push.
+ */
+static void pcap_ensure_buffer_stack (void)
+{
+ int num_to_alloc;
+
+ if (!(yy_buffer_stack)) {
+
+ /* First allocation is just for 2 elements, since we don't know if this
+ * scanner will even need a stack. We use 2 instead of 1 to avoid an
+ * immediate realloc on the next call.
+ */
+ num_to_alloc = 1;
+ (yy_buffer_stack) = (struct yy_buffer_state**)pcap_alloc
+ (num_to_alloc * sizeof(struct yy_buffer_state*)
+ );
+
+ memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));
+
+ (yy_buffer_stack_max) = num_to_alloc;
+ (yy_buffer_stack_top) = 0;
+ return;
+ }
+
+ if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){
+
+ /* Increase the buffer to prepare for a possible push. */
+ int grow_size = 8 /* arbitrary grow size */;
+
+ num_to_alloc = (yy_buffer_stack_max) + grow_size;
+ (yy_buffer_stack) = (struct yy_buffer_state**)pcap_realloc
+ ((yy_buffer_stack),
+ num_to_alloc * sizeof(struct yy_buffer_state*)
+ );
+
+ /* zero only the new slots.*/
+ memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*));
+ (yy_buffer_stack_max) = num_to_alloc;
+ }
+}
+
+/** Setup the input buffer state to scan directly from a user-specified character buffer.
+ * @param base the character buffer
+ * @param size the size in bytes of the character buffer
+ *
+ * @return the newly allocated buffer state object.
+ */
+YY_BUFFER_STATE pcap__scan_buffer (char * base, yy_size_t size )
+{
+ YY_BUFFER_STATE b;
+
+ if ( size < 2 ||
+ base[size-2] != YY_END_OF_BUFFER_CHAR ||
+ base[size-1] != YY_END_OF_BUFFER_CHAR )
+ /* They forgot to leave room for the EOB's. */
+ return 0;
+
+ b = (YY_BUFFER_STATE) pcap_alloc(sizeof( struct yy_buffer_state ) );
+ if ( ! b )
+ YY_FATAL_ERROR( "out of dynamic memory in pcap__scan_buffer()" );
+
+ b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */
+ b->yy_buf_pos = b->yy_ch_buf = base;
+ b->yy_is_our_buffer = 0;
+ b->yy_input_file = 0;
+ b->yy_n_chars = b->yy_buf_size;
+ b->yy_is_interactive = 0;
+ b->yy_at_bol = 1;
+ b->yy_fill_buffer = 0;
+ b->yy_buffer_status = YY_BUFFER_NEW;
+
+ pcap__switch_to_buffer(b );
+
+ return b;
+}
+
+/** Setup the input buffer state to scan a string. The next call to pcap_lex() will
+ * scan from a @e copy of @a str.
+ * @param yystr a NUL-terminated string to scan
+ *
+ * @return the newly allocated buffer state object.
+ * @note If you want to scan bytes that may contain NUL values, then use
+ * pcap__scan_bytes() instead.
+ */
+YY_BUFFER_STATE pcap__scan_string (yyconst char * yystr )
+{
+
+ return pcap__scan_bytes(yystr,strlen(yystr) );
+}
+
+/** Setup the input buffer state to scan the given bytes. The next call to pcap_lex() will
+ * scan from a @e copy of @a bytes.
+ * @param bytes the byte buffer to scan
+ * @param len the number of bytes in the buffer pointed to by @a bytes.
+ *
+ * @return the newly allocated buffer state object.
+ */
+YY_BUFFER_STATE pcap__scan_bytes (yyconst char * yybytes, int _yybytes_len )
+{
+ YY_BUFFER_STATE b;
+ char *buf;
+ yy_size_t n;
+ int i;
+
+ /* Get memory for full buffer, including space for trailing EOB's. */
+ n = _yybytes_len + 2;
+ buf = (char *) pcap_alloc(n );
+ if ( ! buf )
+ YY_FATAL_ERROR( "out of dynamic memory in pcap__scan_bytes()" );
+
+ for ( i = 0; i < _yybytes_len; ++i )
+ buf[i] = yybytes[i];
+
+ buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR;
+
+ b = pcap__scan_buffer(buf,n );
+ if ( ! b )
+ YY_FATAL_ERROR( "bad buffer in pcap__scan_bytes()" );
+
+ /* It's okay to grow etc. this buffer, and we should throw it
+ * away when we're done.
+ */
+ b->yy_is_our_buffer = 1;
+
+ return b;
+}
+
+#ifndef YY_EXIT_FAILURE
+#define YY_EXIT_FAILURE 2
+#endif
+
+static void yy_fatal_error (yyconst char* msg )
+{
+ (void) fprintf( stderr, "%s\n", msg );
+ exit( YY_EXIT_FAILURE );
+}
+
+/* Redefine yyless() so it works in section 3 code. */
+
+#undef yyless
+#define yyless(n) \
+ do \
+ { \
+ /* Undo effects of setting up pcap_text. */ \
+ int yyless_macro_arg = (n); \
+ YY_LESS_LINENO(yyless_macro_arg);\
+ pcap_text[pcap_leng] = (yy_hold_char); \
+ (yy_c_buf_p) = pcap_text + yyless_macro_arg; \
+ (yy_hold_char) = *(yy_c_buf_p); \
+ *(yy_c_buf_p) = '\0'; \
+ pcap_leng = yyless_macro_arg; \
+ } \
+ while ( 0 )
+
+/* Accessor methods (get/set functions) to struct members. */
+
+/** Get the current line number.
+ *
+ */
+int pcap_get_lineno (void)
+{
+
+ return pcap_lineno;
+}
+
+/** Get the input stream.
+ *
+ */
+FILE *pcap_get_in (void)
+{
+ return pcap_in;
+}
+
+/** Get the output stream.
+ *
+ */
+FILE *pcap_get_out (void)
+{
+ return pcap_out;
+}
+
+/** Get the length of the current token.
+ *
+ */
+int pcap_get_leng (void)
+{
+ return pcap_leng;
+}
+
+/** Get the current token.
+ *
+ */
+
+char *pcap_get_text (void)
+{
+ return pcap_text;
+}
+
+/** Set the current line number.
+ * @param line_number
+ *
+ */
+void pcap_set_lineno (int line_number )
+{
+
+ pcap_lineno = line_number;
+}
+
+/** Set the input stream. This does not discard the current
+ * input buffer.
+ * @param in_str A readable stream.
+ *
+ * @see pcap__switch_to_buffer
+ */
+void pcap_set_in (FILE * in_str )
+{
+ pcap_in = in_str ;
+}
+
+void pcap_set_out (FILE * out_str )
+{
+ pcap_out = out_str ;
+}
+
+int pcap_get_debug (void)
+{
+ return pcap__flex_debug;
+}
+
+void pcap_set_debug (int bdebug )
+{
+ pcap__flex_debug = bdebug ;
+}
+
+static int yy_init_globals (void)
+{
+ /* Initialization is the same as for the non-reentrant scanner.
+ * This function is called from pcap_lex_destroy(), so don't allocate here.
+ */
+
+ (yy_buffer_stack) = 0;
+ (yy_buffer_stack_top) = 0;
+ (yy_buffer_stack_max) = 0;
+ (yy_c_buf_p) = (char *) 0;
+ (yy_init) = 0;
+ (yy_start) = 0;
+
+/* Defined in main.c */
+#ifdef YY_STDINIT
+ pcap_in = stdin;
+ pcap_out = stdout;
+#else
+ pcap_in = (FILE *) 0;
+ pcap_out = (FILE *) 0;
+#endif
+
+ /* For future reference: Set errno on error, since we are called by
+ * pcap_lex_init()
+ */
+ return 0;
+}
+
+/* pcap_lex_destroy is for both reentrant and non-reentrant scanners. */
+int pcap_lex_destroy (void)
+{
+
+ /* Pop the buffer stack, destroying each element. */
+ while(YY_CURRENT_BUFFER){
+ pcap__delete_buffer(YY_CURRENT_BUFFER );
+ YY_CURRENT_BUFFER_LVALUE = NULL;
+ pcap_pop_buffer_state();
+ }
+
+ /* Destroy the stack itself. */
+ pcap_free((yy_buffer_stack) );
+ (yy_buffer_stack) = NULL;
+
+ /* Reset the globals. This is important in a non-reentrant scanner so the next time
+ * pcap_lex() is called, initialization will occur. */
+ yy_init_globals( );
+
+ return 0;
+}
+
+/*
+ * Internal utility routines.
+ */
+
+#ifndef yytext_ptr
+static void yy_flex_strncpy (char* s1, yyconst char * s2, int n )
+{
+ register int i;
+ for ( i = 0; i < n; ++i )
+ s1[i] = s2[i];
+}
+#endif
+
+#ifdef YY_NEED_STRLEN
+static int yy_flex_strlen (yyconst char * s )
+{
+ register int n;
+ for ( n = 0; s[n]; ++n )
+ ;
+
+ return n;
+}
+#endif
+
+void *pcap_alloc (yy_size_t size )
+{
+ return (void *) malloc( size );
+}
+
+void *pcap_realloc (void * ptr, yy_size_t size )
+{
+ /* The cast to (char *) in the following accommodates both
+ * implementations that use char* generic pointers, and those
+ * that use void* generic pointers. It works with the latter
+ * because both ANSI C and C++ allow castless assignment from
+ * any pointer type to void*, and deal with argument conversions
+ * as though doing an assignment.
+ */
+ return (void *) realloc( (char *) ptr, size );
+}
+
+void pcap_free (void * ptr )
+{
+ free( (char *) ptr ); /* see pcap_realloc() for (char *) cast */
+}
+
+#define YYTABLES_NAME "yytables"
+
+#line 146 "scanner.l"
+
+
+void
+lex_init(buf)
+ char *buf;
+{
+ in_buffer = buf;
+}
+
+/*
+ * Also define a pcap_wrap. Note that if we're using flex, it will
+ * define a macro to map this identifier to pcap_wrap.
+ */
+int
+pcap_wrap()
+{
+ return 1;
+}
+
+/* Hex digit to integer. */
+static inline int
+xdtoi(c)
+ register int c;
+{
+ if (isdigit(c))
+ return c - '0';
+ else if (islower(c))
+ return c - 'a' + 10;
+ else
+ return c - 'A' + 10;
+}
+
+/*
+ * Convert string to integer. Just like atoi(), but checks for
+ * preceding 0x or 0 and uses hex or octal instead of decimal.
+ */
+static int
+stoi(s)
+ char *s;
+{
+ int base = 10;
+ int n = 0;
+
+ if (*s == '0') {
+ if (s[1] == 'x' || s[1] == 'X') {
+ s += 2;
+ base = 16;
+ }
+ else {
+ base = 8;
+ s += 1;
+ }
+ }
+ while (*s)
+ n = n * base + xdtoi(*s++);
+
+ return n;
+}
+
+
--- /dev/null
+%{
+/*
+ * Copyright (c) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ */
+
+#ifndef lint
+static const char rcsid[] =
+ "@(#) $Header: /usr/local/cvs/linux/tools/build/e100boot/libpcap-0.4/scanner.l,v 1.1 1999/08/26 10:05:27 johana Exp $ (LBL)";
+#endif
+
+#include <sys/types.h>
+#include <sys/time.h>
+
+#include <ctype.h>
+#include <unistd.h>
+
+#include "pcap-int.h"
+
+#include "gencode.h"
+#include <pcap-namedb.h>
+#include "tokdefs.h"
+
+#include "gnuc.h"
+#ifdef HAVE_OS_PROTO_H
+#include "os-proto.h"
+#endif
+
+static int stoi(char *);
+static inline int xdtoi(int);
+
+#ifdef FLEX_SCANNER
+#define YY_NO_UNPUT
+#undef YY_INPUT
+#define YY_INPUT(buf, result, max)\
+ {\
+ char *src = in_buffer;\
+ int i;\
+\
+ if (*src == 0)\
+ result = YY_NULL;\
+ else {\
+ for (i = 0; *src && i < max; ++i)\
+ buf[i] = *src++;\
+ in_buffer += i;\
+ result = i;\
+ }\
+ }
+#else
+#undef getc
+#define getc(fp) (*in_buffer == 0 ? EOF : *in_buffer++)
+#endif
+
+#define yylval pcap_lval
+extern YYSTYPE yylval;
+
+static char *in_buffer;
+
+%}
+
+N ([0-9]+|(0X|0x)[0-9A-Fa-f]+)
+B ([0-9A-Fa-f][0-9A-Fa-f]?)
+
+%a 3000
+
+%%
+dst return DST;
+src return SRC;
+
+link|ether|ppp|slip return LINK;
+fddi return LINK;
+arp return ARP;
+rarp return RARP;
+ip return IP;
+tcp return TCP;
+udp return UDP;
+icmp return ICMP;
+igmp return IGMP;
+igrp return IGRP;
+
+atalk return ATALK;
+decnet return DECNET;
+lat return LAT;
+sca return SCA;
+moprc return MOPRC;
+mopdl return MOPDL;
+
+host return HOST;
+net return NET;
+mask return MASK;
+port return PORT;
+proto return PROTO;
+
+gateway return GATEWAY;
+
+less return LESS;
+greater return GREATER;
+byte return BYTE;
+broadcast return TK_BROADCAST;
+multicast return TK_MULTICAST;
+
+and|"&&" return AND;
+or|"||" return OR;
+not return '!';
+
+len|length return LEN;
+inbound return INBOUND;
+outbound return OUTBOUND;
+
+[ \n\t] ;
+[+\-*/:\[\]!<>()&|=] return yytext[0];
+">=" return GEQ;
+"<=" return LEQ;
+"!=" return NEQ;
+"==" return '=';
+"<<" return LSH;
+">>" return RSH;
+{N} { yylval.i = stoi((char *)yytext); return NUM; }
+({N}\.{N})|({N}\.{N}\.{N})|({N}\.{N}\.{N}\.{N}) {
+ yylval.s = sdup((char *)yytext); return HID; }
+{B}:{B}:{B}:{B}:{B}:{B} { yylval.e = pcap_ether_aton((char *)yytext);
+ return EID; }
+{B}:+({B}:+)+ { bpf_error("bogus ethernet address %s", yytext); }
+[A-Za-z0-9][-_.A-Za-z0-9]*[.A-Za-z0-9] {
+ yylval.s = sdup((char *)yytext); return ID; }
+"\\"[^ !()\n\t]+ { yylval.s = sdup((char *)yytext + 1); return ID; }
+[^ \[\]\t\n\-_.A-Za-z0-9!<>()&|=]+i {
+ bpf_error("illegal token: %s\n", yytext); }
+. { bpf_error("illegal char '%c'", *yytext); }
+%%
+void
+lex_init(buf)
+ char *buf;
+{
+ in_buffer = buf;
+}
+
+/*
+ * Also define a yywrap. Note that if we're using flex, it will
+ * define a macro to map this identifier to pcap_wrap.
+ */
+int
+yywrap()
+{
+ return 1;
+}
+
+/* Hex digit to integer. */
+static inline int
+xdtoi(c)
+ register int c;
+{
+ if (isdigit(c))
+ return c - '0';
+ else if (islower(c))
+ return c - 'a' + 10;
+ else
+ return c - 'A' + 10;
+}
+
+/*
+ * Convert string to integer. Just like atoi(), but checks for
+ * preceding 0x or 0 and uses hex or octal instead of decimal.
+ */
+static int
+stoi(s)
+ char *s;
+{
+ int base = 10;
+ int n = 0;
+
+ if (*s == '0') {
+ if (s[1] == 'x' || s[1] == 'X') {
+ s += 2;
+ base = 16;
+ }
+ else {
+ base = 8;
+ s += 1;
+ }
+ }
+ while (*s)
+ n = n * base + xdtoi(*s++);
+
+ return n;
+}
+
--- /dev/null
+/* A Bison parser, made by GNU Bison 2.3. */
+
+/* Skeleton interface for Bison's Yacc-like parsers in C
+
+ Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
+ Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ Boston, MA 02110-1301, USA. */
+
+/* As a special exception, you may create a larger work that contains
+ part or all of the Bison parser skeleton and distribute that work
+ under terms of your choice, so long as that work isn't itself a
+ parser generator using the skeleton or a modified version thereof
+ as a parser skeleton. Alternatively, if you modify or redistribute
+ the parser skeleton itself, you may (at your option) remove this
+ special exception, which will cause the skeleton and the resulting
+ Bison output files to be licensed under the GNU General Public
+ License without this special exception.
+
+ This special exception was added by the Free Software Foundation in
+ version 2.2 of Bison. */
+
+/* Tokens. */
+#ifndef YYTOKENTYPE
+# define YYTOKENTYPE
+ /* Put the tokens into the symbol table, so that GDB and other debuggers
+ know about them. */
+ enum yytokentype {
+ DST = 258,
+ SRC = 259,
+ HOST = 260,
+ GATEWAY = 261,
+ NET = 262,
+ MASK = 263,
+ PORT = 264,
+ LESS = 265,
+ GREATER = 266,
+ PROTO = 267,
+ BYTE = 268,
+ ARP = 269,
+ RARP = 270,
+ IP = 271,
+ TCP = 272,
+ UDP = 273,
+ ICMP = 274,
+ IGMP = 275,
+ IGRP = 276,
+ ATALK = 277,
+ DECNET = 278,
+ LAT = 279,
+ SCA = 280,
+ MOPRC = 281,
+ MOPDL = 282,
+ TK_BROADCAST = 283,
+ TK_MULTICAST = 284,
+ NUM = 285,
+ INBOUND = 286,
+ OUTBOUND = 287,
+ LINK = 288,
+ GEQ = 289,
+ LEQ = 290,
+ NEQ = 291,
+ ID = 292,
+ EID = 293,
+ HID = 294,
+ LSH = 295,
+ RSH = 296,
+ LEN = 297,
+ AND = 298,
+ OR = 299,
+ UMINUS = 300
+ };
+#endif
+/* Tokens. */
+#define DST 258
+#define SRC 259
+#define HOST 260
+#define GATEWAY 261
+#define NET 262
+#define MASK 263
+#define PORT 264
+#define LESS 265
+#define GREATER 266
+#define PROTO 267
+#define BYTE 268
+#define ARP 269
+#define RARP 270
+#define IP 271
+#define TCP 272
+#define UDP 273
+#define ICMP 274
+#define IGMP 275
+#define IGRP 276
+#define ATALK 277
+#define DECNET 278
+#define LAT 279
+#define SCA 280
+#define MOPRC 281
+#define MOPDL 282
+#define TK_BROADCAST 283
+#define TK_MULTICAST 284
+#define NUM 285
+#define INBOUND 286
+#define OUTBOUND 287
+#define LINK 288
+#define GEQ 289
+#define LEQ 290
+#define NEQ 291
+#define ID 292
+#define EID 293
+#define HID 294
+#define LSH 295
+#define RSH 296
+#define LEN 297
+#define AND 298
+#define OR 299
+#define UMINUS 300
+
+
+
+
+#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
+typedef union YYSTYPE
+#line 82 "grammar.y"
+{
+ int i;
+ bpf_u_int32 h;
+ u_char *e;
+ char *s;
+ struct stmt *stmt;
+ struct arth *a;
+ struct {
+ struct qual q;
+ struct block *b;
+ } blk;
+ struct block *rblk;
+}
+/* Line 1489 of yacc.c. */
+#line 153 "y.tab.h"
+ YYSTYPE;
+# define yystype YYSTYPE /* obsolescent; will be withdrawn */
+# define YYSTYPE_IS_DECLARED 1
+# define YYSTYPE_IS_TRIVIAL 1
+#endif
+
+extern YYSTYPE pcap_lval;
+
--- /dev/null
+char pcap_version[] = "0.4";
--- /dev/null
+# Generated automatically from Makefile.in by configure.
+#
+# Makefile for e100boot, sbl side.
+#
+# $Id: Makefile.in,v 1.21 2003/11/21 11:38:30 pkj Exp $
+#
+
+VPATH := .:../cbl
+
+CC = gcc
+
+AXIS_USABLE_LIBS = UCLIBC GLIBC
+-include $(AXIS_TOP_DIR)/tools/build/Rules.axis
+
+CFLAGS += -I. -I../cbl/src -g -O2 -I../libpcap-0.4/ -I../libpcap-0.4/bpf/ -Wall -Wmissing-prototypes -Wno-unused
+LDFLAGS =
+LDLIBS = -L../libpcap-0.4/
+LDLIBS =
+LIBPCAP = ../libpcap-0.4/libpcap.a
+
+IMAGES := ../cbl/net/net.ima ../cbl/net_noleds/net_noleds.ima \
+ ../cbl/ser/ser.ima ../cbl/ser_noleds/ser_noleds.ima
+
+AUTOSRCS := $(addsuffix .c, $(subst .ima,_ima,$(notdir $(IMAGES))))
+
+OBJS := common.o network.o serial.o
+DEPS := $(addprefix deps/, $(subst .o,.d,$(OBJS)))
+
+STRIP ?= strip
+
+all: conf.h e100boot e100boot.stripped
+
+depend: $(DEPS)
+
+Makefile: Makefile.in
+ @echo -e "\n### New Makefile.in detected, regenerating Makefile..."
+ ./configure
+
+e100boot: common.o boot_images.o serial.o network.o $(LIBPCAP)
+ @echo -e '\n### Finally... Compiling e100boot.'
+ $(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@
+
+e100boot.stripped: e100boot
+ cp $< $@
+ $(STRIP) --strip-unneeded $@
+
+boot_images.o: boot_images.c boot_images.h $(AUTOSRCS)
+ $(CC) -c $(CFLAGS) $< -o $@
+
+conf.h:
+ ./configure
+
+reconf:
+ ./configure --cache=/dev/null
+
+clean:
+ rm -rf e100boot Makefile conf.h config.log config.cache config.status deps *.ima *.o *_ima.c* *~
+
+$(IMAGES):
+ @echo -e '\n### Making cbl boot images (*.ima)...'
+ $(MAKE) -C ../cbl
+
+ifneq ($(MAKECMDGOALS),clean)
+-include $(DEPS)
+endif
+
+deps/%.d: %.c
+ @[ -d deps ] || mkdir deps
+ $(CC) -M $(CFLAGS) $< > $@
+
+deps/%.d: %.S
+ @[ -d deps ] || mkdir deps
+ $(CC) -M $(CFLAGS) $< > $@
+
+%_ima.c: %.ima
+ @echo -e "### Creating $@ from image $<"
+ @./cconv $*_ima < $< > $@
--- /dev/null
+#
+# Makefile for e100boot, sbl side.
+#
+# $Id: Makefile.in,v 1.21 2003/11/21 11:38:30 pkj Exp $
+#
+
+VPATH := .:../cbl
+
+CC = @CC@
+
+AXIS_USABLE_LIBS = UCLIBC GLIBC
+-include $(AXIS_TOP_DIR)/tools/build/Rules.axis
+
+CFLAGS += -I. -I../cbl/src @CFLAGS@ -I../libpcap-0.4/ -I../libpcap-0.4/bpf/ -Wall -Wmissing-prototypes -Wno-unused
+LDFLAGS =
+LDLIBS = -L../libpcap-0.4/ @LIBS@
+LDLIBS =
+LIBPCAP = ../libpcap-0.4/libpcap.a
+
+IMAGES := ../cbl/net/net.ima ../cbl/net_noleds/net_noleds.ima \
+ ../cbl/ser/ser.ima ../cbl/ser_noleds/ser_noleds.ima
+
+AUTOSRCS := $(addsuffix .c, $(subst .ima,_ima,$(notdir $(IMAGES))))
+
+OBJS := common.o network.o serial.o
+DEPS := $(addprefix deps/, $(subst .o,.d,$(OBJS)))
+
+STRIP ?= strip
+
+all: conf.h e100boot e100boot.stripped
+
+depend: $(DEPS)
+
+Makefile: Makefile.in
+ @echo -e "\n### New Makefile.in detected, regenerating Makefile..."
+ ./configure
+
+e100boot: common.o boot_images.o serial.o network.o $(LIBPCAP)
+ @echo -e '\n### Finally... Compiling e100boot.'
+ $(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@
+
+e100boot.stripped: e100boot
+ cp $< $@
+ $(STRIP) --strip-unneeded $@
+
+boot_images.o: boot_images.c boot_images.h $(AUTOSRCS)
+ $(CC) -c $(CFLAGS) $< -o $@
+
+conf.h:
+ ./configure
+
+reconf:
+ ./configure --cache=/dev/null
+
+clean:
+ rm -rf e100boot Makefile conf.h config.log config.cache config.status deps *.ima *.o *_ima.c* *~
+
+$(IMAGES):
+ @echo -e '\n### Making cbl boot images (*.ima)...'
+ $(MAKE) -C ../cbl
+
+ifneq ($(MAKECMDGOALS),clean)
+-include $(DEPS)
+endif
+
+deps/%.d: %.c
+ @[ -d deps ] || mkdir deps
+ $(CC) -M $(CFLAGS) $< > $@
+
+deps/%.d: %.S
+ @[ -d deps ] || mkdir deps
+ $(CC) -M $(CFLAGS) $< > $@
+
+%_ima.c: %.ima
+ @echo -e "### Creating $@ from image $<"
+ @./cconv $*_ima < $< > $@
--- /dev/null
+/* boot_images.c - Collection of the different boot images
+ * Johan Adolfsson Axis Communications AB
+ * $Id: boot_images.c,v 1.2 2002/07/01 14:37:51 pkj Exp $
+ */
+
+#include <stdio.h>
+#include "boot_images.h"
+
+/* We include the C files here to the size etc. easy */
+#include "net_ima.c"
+#include "ser_ima.c"
+#include "net_noleds_ima.c"
+#include "ser_noleds_ima.c"
+
+struct boot_image_info_type boot_image_info[] =
+{
+ { INTERNAL_NW, net_ima, sizeof net_ima, "Network boot (default)"},
+ { INTERNAL_SER, ser_ima, sizeof ser_ima, "Serial boot"},
+ { INTERNAL_SER_NOLEDS, ser_noleds_ima, sizeof ser_noleds_ima, "Serial boot, no leds"},
+ { INTERNAL_NW_NOLEDS, net_noleds_ima, sizeof net_noleds_ima, "Network boot, no leds"},
+
+ { "DBGNONE", net_ima, sizeof net_ima, "Obsolete (use INTERNAL_NW instead)" },
+ { "DBG0", net_ima, sizeof net_ima, "Obsolete (use INTERNAL_NW instead)" },
+ { "DBG1", net_ima, sizeof net_ima, "Obsolete (use INTERNAL_NW instead)" },
+ { "DBG2", net_ima, sizeof net_ima, "Obsolete (use INTERNAL_NW instead)" },
+ { "DBG3", net_ima, sizeof net_ima, "Obsolete (use INTERNAL_NW instead)" },
+
+ { "DBGNONE_NOLEDS", net_noleds_ima, sizeof net_noleds_ima, "Obsolete (use INTERNAL_NW_NOLEDS instead)" },
+ { "DBG0_NOLEDS", net_noleds_ima, sizeof net_noleds_ima, "Obsolete (use INTERNAL_NW_NOLEDS instead)" },
+ { "DBG1_NOLEDS", net_noleds_ima, sizeof net_noleds_ima, "Obsolete (use INTERNAL_NW_NOLEDS instead)" },
+ { "DBG2_NOLEDS", net_noleds_ima, sizeof net_noleds_ima, "Obsolete (use INTERNAL_NW_NOLEDS instead)" },
+ { "DBG3_NOLEDS", net_noleds_ima, sizeof net_noleds_ima, "Obsolete (use INTERNAL_NW_NOLEDS instead)" },
+
+ { NULL, NULL, 0, NULL } /* End of array */
+};
--- /dev/null
+/* boot_images.h - Collection of the different boot images
+ * Johan Adolfsson Axis Communications AB
+ * $Id: boot_images.h,v 1.2 2002/07/01 14:37:51 pkj Exp $
+ */
+
+#define INTERNAL_SER "INTERNAL_SER"
+#define INTERNAL_NW "INTERNAL_NW"
+#define INTERNAL_NW_NOLEDS "INTERNAL_NW_NOLEDS"
+#define INTERNAL_SER_NOLEDS "INTERNAL_SER_NOLEDS"
+
+typedef struct boot_image_info_type
+{
+ const char *name;
+ const char *ptr;
+ unsigned long len;
+ const char *info;
+} boot_image_info_type;
+
+extern struct boot_image_info_type boot_image_info[];
+
--- /dev/null
+#!/usr/bin/perl
+#!
+#! FILE NAME : cconv
+#!
+#! PARAMETERS : Name of C program array variable.
+#!
+#! DESCRIPTION: Converts bytes of a binary file to C source code containing
+#! char array initialized with the binary file data.
+#!
+#! SUBROUTINES:
+#!
+#!---------------------------------------------------------------------------
+#! HISTORY
+#!
+#! DATE NAME CHANGES
+#! ---- ---- -------
+#! Dec 15 1997 Sven Ekstrom Initial version. Rewritten to Perl from C.
+#! Dec 16 1997 Sven Ekstrom Fixed bug that generated truncated result.
+#!
+#!---------------------------------------------------------------------------
+#!
+#! (C) Copyright 1997, Axis Communications AB, LUND, SWEDEN
+#!
+#!***************************************************************************
+# @(#) cconv 1.2 12/16/97
+
+#********************** CONSTANT SECTION ************************************
+
+$MyName = 'cconv';
+
+#
+# Number of bytes per line in the result.
+#
+$LineLength = 8;
+
+#********************** MAIN PROGRAM SECTION ********************************
+
+#
+# Make sure the command line contains the name of a C array.
+#
+if (scalar @ARGV != 1 || $ARGV[0] =~ /^-/)
+{
+ die "$MyName: Usage:\n",
+ "\n",
+ " Syntax\n",
+ " $MyName <name of C char array>\n",
+ "\n",
+ " <name of C char array> : This is the name of the char array where\n",
+ " the result is placed.\n",
+ "\n",
+ " Description\n",
+ "\n",
+ " Reads input from STDIN as binary data. Each byte of input data is\n",
+ " converted to C char data in hexadecimal form. The whole file read\n",
+ " from STDIN is converted and the result, C source code definition of\n",
+ " a char array, is printed on STDOUT.\n",
+ "\n";
+}
+
+#
+# Start with the name and version of this program and the name of the array.
+#
+print "\n",
+ "/* $MyName 1.2 12/16/97, Copyright (C) 1997, Axis Communications AB */\n",
+ "\n",
+ "const char $ARGV[0]\[\] =\n",
+ "{";
+
+#
+# Read all bytes from STDIN, convert them to char data and print them on
+# STDOUT.
+#
+$CurrentOffset = 0;
+while (!eof(STDIN))
+{
+ $Byte = ord(getc);
+
+ if ($CurrentOffset % $LineLength == 0)
+ {
+ #
+ # Start of a new line.
+ #
+ if ($CurrentOffset != 0)
+ {
+ #
+ # This is not the first byte.
+ #
+ print ",";
+ }
+ #
+ # The new line is indented by 2 spaces.
+ #
+ print "\n",
+ " ";
+ }
+ else
+ {
+ #
+ # Continuing an old line.
+ #
+ print ", ";
+ }
+
+ #
+ # Print the value of the byte as hex char data.
+ #
+ printf("'\\x%02x'", $Byte);
+
+ $CurrentOffset++;
+}
+
+if ($CurrentOffset == 0)
+{
+ #
+ # Initialize the array with a single byte of zero.
+ #
+ print "\n '\\x00'";
+}
+
+#
+# End with the closing bracket and semicolon.
+#
+print "\n",
+ "};\n";
+
+exit 0;
+
+
+#********************** SUBROUTINE DEFINITION SECTION ***********************
+
+#****************************************************************************
+#*
+#* SUBROUTINE :
+#*
+#* PARAMETERS :
+#*
+#* RETURNS :
+#*
+#* SIDE EFFECTS:
+#*
+#* DESCRIPTION :
+#*
+#*---------------------------------------------------------------------------
+#* HISTORY
+#*
+#* DATE NAME CHANGES
+#* ---- ---- -------
+#* May 05, 1995 Sven Ekstrom Initial version
+#*
+#****************************************************************************
+
+#sub NN
+#{
+# local() = @_;
+#
+#}
+
+#************************ END OF FILE cconv *********************************
--- /dev/null
+/*!***************************************************************************
+*!
+*! FILE NAME : common.c
+*!
+*! DESCRIPTION: Common functions for e100boot.
+*!
+*! ---------------------------------------------------------------------------
+*! HISTORY
+*!
+*! DATE NAME CHANGES
+*! ---- ---- -------
+*! ??? ? ???? Ronny Ranerup Initial version
+*! ---------------------------------------------------------------------------
+*! (C) Copyright 1999-2006 Axis Communications AB, LUND, SWEDEN
+*!***************************************************************************/
+/* $Id: common.c,v 1.13 2006/02/08 14:00:25 pkj Exp $ */
+
+/************************** Version **************************************/
+
+char version[] = "Time-stamp: $Id: common.c,v 1.13 2006/02/08 14:00:25 pkj Exp $";
+
+/************************** Include files ********************************/
+
+#include <byteswap.h>
+
+#include <conf.h>
+#include <e100boot.h>
+#include <pcap.h>
+#include "boot_images.h"
+#include <reg_des.h>
+#include <sv_addr_ag.h>
+#include <common.h>
+
+#include <serial.h>
+#include <network.h>
+
+/************************** Constants and macros *************************/
+
+#define BOOT_CMDS_FILE "BOOT_CMDS"
+
+/************************** Type definitions *****************************/
+
+struct label_t {
+ struct label_t *prev;
+ udword addr;
+ char *name;
+};
+
+/************************** Global variables *****************************/
+
+char needle[MAX_STRING_LEN] = "END"; /* search needle for --find */
+int needle_len = 3;
+
+int exitonfind = FALSE;
+
+int doing_flash = FALSE; /* Just a flag to see if we should
+ warn that it might take some
+ time. */
+
+int toFiles = FALSE; /* Dump all packets to files. */
+int cmdsOnly = FALSE; /* Just dump boot cmds to file. */
+int netBoot = TRUE; /* Do network boot? */
+int serBoot = FALSE; /* Do serial boot? */
+
+struct label_t *loop_label = NULL;
+struct label_t *label = NULL;
+
+struct packet_buf *first_packet = NULL;
+struct packet_buf *last_packet = NULL;
+
+struct packet_buf *boot_cmds_packet;
+
+int create_boot_loader = TRUE;
+
+/* We use the INTERNAL boot image as default */
+char boot_loader_file[MAX_STRING_LEN] = INTERNAL_NW;
+
+int noleds = FALSE; /* Use boot images that doesn't toggle leds? */
+
+struct boot_files_T *first_boot_file = NULL;
+struct boot_files_T *last_boot_file = NULL;
+
+unsigned int boot_cmds[SIZE_OF_BOOT_CMDS / sizeof(unsigned int)];
+int boot_cmds_cnt = 0;
+
+int svboot = FALSE;
+
+int quiet = 0;
+
+struct packet_header_T send_packet;
+struct packet_header_T *receive_packet;
+
+int seq_nr = 0;
+
+/* debug flags */
+int db1 = FALSE;
+int db2 = FALSE;
+int db3 = FALSE;
+int db4 = FALSE;
+
+char device[MAX_STRING_LEN] = "eth0";
+
+/************************** Function prototypes **************************/
+
+FILE *Fopen (const char *name, const char *mode);
+int main (int argc, const char *argv[]);
+int GetNumberOption (int *argNr, int argCount, const char *argVect[], unsigned int *ret, const char *option, int base);
+int GetStringOption (int *argNr, int argCount, const char *argVect[], char *ret, const char *option);
+int GetRegisterOption (int *argNr, int argCount, const char *argVect[], unsigned int *ret, const char *option, int base);
+struct boot_files_T* allocate_boot_file (struct boot_files_T *bf);
+struct packet_buf* CreateNewBootPacket (void);
+struct packet_buf* allocate_packet (struct packet_buf *p);
+void SigHandler (int sig);
+void CreateBootLoader (void);
+void FinishBootCmds (void);
+void ParseArgs (int argc, const char *argv[]);
+void PrintHelp (void);
+void CreateBootCmds (void);
+void handle_labels (void);
+void new_label (struct label_t **label, udword addr, const char *name);
+unsigned int swap_endian (unsigned int);
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: main
+*#
+*# PARAMETERS: Command line arguments.
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 961022 ronny Initial version
+*#
+*#***************************************************************************/
+
+int
+main(int argc, const char *argv[])
+{
+ ParseArgs(argc, argv);
+
+ if (cmdsOnly) {
+ /* We make this a special case to avoid messing up other code. */
+ CreateBootCmds();
+ FinishBootCmds();
+ SendToDevice(&boot_cmds_packet->data[SIZE_OF_HEADER],SIZE_OF_BOOT_CMDS);
+ exit(EXIT_SUCCESS);
+ }
+
+ if (netBoot && !toFiles) {
+ /* Do not bother with this if we just want to write the packets to
+ files. Means you do not have to be root to run --tofiles. */
+ net_init();
+ }
+ else if (serBoot) {
+ if (!SetupSerial()) {
+ exit(0);
+ }
+ }
+
+ CreateBootLoader();
+ CreateBootCmds();
+ FinishBootCmds();
+
+ printf("Starting boot...\n");
+ if (doing_flash) {
+ printf("We're doing a flash write, this may take up to a few minutes...\n");
+ }
+
+ if (toFiles) {
+ udword seq = 0;
+ struct packet_buf *p;
+
+ while((p = create_packet(seq++))) {
+ SendToDevice(p->data, p->size);
+ }
+
+ exit(EXIT_SUCCESS);
+ }
+
+ if (netBoot) {
+ NetBoot();
+ }
+ else if (serBoot) {
+ SerBoot();
+ }
+
+ printf("Done.\n");
+ return EXIT_SUCCESS;
+} /* main */
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: free_packet
+*#
+*# PARAMETERS: struct to free
+*#
+*# DESCRIPTION: Frees struct and data in struct.
+*#
+*# RETURNS: Pointer to next struct.
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 2000 02 07 ronny Initial version
+*#
+*#***************************************************************************/
+
+struct packet_buf*
+free_packet(struct packet_buf *p)
+{
+ struct packet_buf *next_p;
+
+ next_p = p->next;
+ free(p->data);
+ free(p);
+ return(next_p);
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: create_packet
+*#
+*# PARAMETERS: Sequence number of desired packet.
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 2000 06 28 ronny Initial version
+*#
+*#***************************************************************************/
+
+struct packet_buf*
+create_packet(udword seq)
+{
+ struct packet_buf *p = first_packet;
+ /* Should check last first? */
+
+ if (db4) printf("> create_packet seq %d\n", seq);
+
+ while (p) {
+ if (p->seq == seq) {
+ return(p);
+ }
+ p = p->next;
+ }
+
+ return(CreateNewBootPacket());
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: find_string
+*#
+*# PARAMETERS: New string to search.
+*#
+*# DESCRIPTION: Searches a number of strings for needle[], including strings
+*# overlapping between different calls.
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 020502 ronny Initial version
+*#
+*#***************************************************************************/
+
+void
+find_string(char *str)
+{
+ static int matched = 0;
+ int hs[MAX_STRING_LEN];
+ static int cur_hs = 0;
+ static int hs_len = 0;
+ static int last_hs = 0;
+
+ static int cur_needle = 0;
+
+ if (!needle[0]) {
+ return;
+ }
+ // printf("# adding >%s<\n", str);
+
+ {
+ int c = 0;
+ int s = 0;
+
+ while((c = str[s])) {
+ // printf("\n# cur_hs %d, hs_len %d\n", cur_hs, hs_len);
+ {
+ int i;
+
+ for(i = 0; i != hs_len; i++) {
+ // printf("hs[%d] = %d(%c)\n", i, (int)hs[i], hs[i] < 32 ? 'X' : hs[i]);
+ }
+ }
+
+ if (cur_hs == hs_len) {
+ // printf("adding char %d(%c) at hs[%d]\n", (int)c, c < 32 ? 'X' : c, hs_len);
+ hs[hs_len] = c;
+ hs_len++;
+ s++;
+ }
+
+ // printf("testing %d at cur_hs %d against %d at cur_needle %d\n",
+ // (int)hs[cur_hs], cur_hs, (int)needle[cur_needle], cur_needle);
+
+ if (hs[cur_hs] == needle[cur_needle]) {
+ if (cur_needle+1 == needle_len) {
+ int exitcode = EXIT_SUCCESS;
+
+ // printf("\nFound needle from --find option.\n");
+ if (exitonfind) {
+ int ret;
+ // printf("scanf (s=%d)'%s'\n", s, &str[s+1]);
+ ret = sscanf(&str[s+1], "%i", &exitcode);
+ // printf("ret %d, '%s'\n", ret, &str[s+1]);
+ }
+ printf("Exiting with code %d\n", exitcode);
+ exit(exitcode);
+ }
+ cur_needle++;
+ cur_hs++;
+ }
+ else {
+ // printf("no match, shifting hs.\n");
+ {
+ int i;
+ for(i=0; i!= hs_len-1; i++) {
+ hs[i] = hs[i+1];
+ }
+ }
+ hs_len--;
+ cur_needle = 0;
+ cur_hs = 0;
+ }
+ }
+ }
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: Fopen
+*#
+*# PARAMETERS: Name and mode, both strings.
+*#
+*# DESCRIPTION: Opens a file and returns its fd, or NULL.
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 961022 ronny Initial version
+*#
+*#***************************************************************************/
+
+FILE *
+Fopen(const char *name, const char *mode)
+{
+ FILE *fd;
+
+ if (db2) printf(">>> Fopen '%s', mode '%s'\n", name, mode);
+
+#if defined(_WIN32)
+ fd = _fsopen(name, mode, _SH_DENYNO);
+#else
+ fd = fopen(name, mode);
+#endif
+
+ if (fd == NULL) {
+ printf("<<< Fopen failed on '%s', mode '%s'\n", name, mode);
+ return ((FILE*) NULL);
+ }
+
+ if (strncmp(mode, "a", 1) == 0) {
+ if (db3) printf("* Append mode, seeking to end.\n");
+ fseek(fd, 0L, SEEK_SET);
+ }
+
+ if (db2) printf("<<< Fopen: '%s'\n", name);
+
+ return(fd);
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: ParseArgs
+*#
+*# PARAMETERS: Standard command line args.
+*#
+*# DESCRIPTION: Parses command line arguments.
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 960909 ronny Initial version
+*#***************************************************************************/
+
+void
+ParseArgs (int argc, const char *argv[])
+{
+ int argi;
+ int i;
+ int printHelp = FALSE;
+ int exitCode = EXIT_SUCCESS;
+ char dbStr[MAX_STRING_LEN]; /* Debug option string. */
+ int number;
+ int argCount;
+ const char **argVect;
+ struct stat st;
+
+ if (db4) printf(">>> ParseArgs\n");
+ argCount = argc;
+ argVect = argv;
+
+ for (argi = 1; argi < argCount; argi++) {
+ if (db4) printf("argv[%d] = '%s'\n", argi, argVect[argi]);
+ if (strncmp(argVect[argi], "--from", 6) == 0) {
+ if (GetStringOption(&argi, argCount, argVect, host1, "--from") == 0) {
+ printHelp = TRUE;
+ exitCode = EXIT_FAILURE;
+ }
+ else {
+ printf("Host: %s %s\n", host1, host2);
+ if (sscanf(host1, "%x-%x-%x-%x-%x-%x", &i, &i, &i, &i, &i, &i) == 6) {
+ printf("Ethernet address\n");
+ }
+ }
+ }
+
+ else if (strncmp(argVect[argi], "--device", 8) == 0) {
+ if (GetStringOption(&argi, argCount, argVect, device, "--device") == 0) {
+ printHelp = TRUE;
+ exitCode = EXIT_FAILURE;
+ }
+ }
+
+ else if (strncmp(argVect[argi], "--network", 9) == 0) {
+ netBoot = TRUE;
+ serBoot = FALSE;
+ strcpy(device, "eth0");
+ strcpy(boot_loader_file, INTERNAL_NW);
+ }
+
+ else if (strncmp(argVect[argi], "--serial", 8) == 0) {
+ serBoot = TRUE;
+ netBoot = FALSE;
+ strcpy(device, "/dev/ttyS0");
+ strcpy(boot_loader_file, INTERNAL_SER);
+ }
+
+ else if (strncmp(argVect[argi], "--noleds", 8) == 0) {
+ noleds = TRUE;
+ }
+
+ else if (strncmp(argVect[argi], "--images", 8) == 0) {
+ int i = 0;
+
+ printf("Internal images:\n");
+
+ while(boot_image_info[i].name) {
+ printf("'%s', %s, size %lu bytes.\n",
+ boot_image_info[i].name,
+ boot_image_info[i].info,
+ boot_image_info[i].len
+ );
+ i++;
+ }
+ exit(EXIT_SUCCESS);
+ }
+
+ else if (strncmp(argv[argi], "--baudrate", 10) == 0) {
+ if (GetNumberOption (&argi, argCount, argVect, &set_baudrate, "--baudrate", 10) == 0) {
+ printHelp = TRUE;
+ exitCode = EXIT_FAILURE;
+ }
+ }
+
+ else if (strncmp(argVect[argi], "--tofiles", 9) == 0) {
+ toFiles = TRUE;
+ }
+
+ else if (strncmp(argVect[argi], "--cmdsonly", 10) == 0) {
+ cmdsOnly = TRUE;
+ }
+
+ else if (strncmp(argVect[argi], "--to", 4) == 0) {
+ if ((GetStringOption(&argi, argCount, argVect, host2, "--to") == 0)) {
+ printHelp = TRUE;
+ exitCode = EXIT_FAILURE;
+ }
+ else {
+ printf("Host: %s %s\n", host1, host2);
+ both_addresses = TRUE;
+ if (sscanf(host2, "%x-%x-%x-%x-%x-%x", &i, &i, &i, &i, &i, &i) == 6) {
+ printf("Ethernet address\n");
+ }
+ }
+ }
+
+ else if (strncmp(argVect[argi], "--printp", 8) == 0) {
+ pPacket = 1;
+ }
+
+ else if (strncmp(argVect[argi], "--printascii", 11) == 0) {
+ pPacket = 1;
+ printPacketType = ASCII;
+ }
+
+ else if (strncmp(argVect[argi], "--printudec", 11) == 0) {
+ pPacket = 1;
+ printPacketType = UDEC;
+ }
+
+ else if (strncmp(argVect[argi], "--printhex", 10) == 0) {
+ pPacket = 1;
+ printPacketType = HEX;
+ }
+
+ else if (strncmp(argVect[argi], "--bpl", 5) == 0) {
+ if (GetNumberOption(&argi, argCount, argVect, &p_packet_bpl, "--bpl", 10) == 0) {
+ printHelp = TRUE;
+ exitCode = EXIT_FAILURE;
+ }
+ }
+
+ else if (strncmp(argVect[argi], "--promisc", 11) == 0) {
+ promisc = 1;
+ }
+
+ else if (strncmp(argVect[argi], "--5400", 6) == 0) {
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = 0xb0000000;
+ boot_cmds[boot_cmds_cnt++] = 0x000095b6;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = 0xb0000008;
+ boot_cmds[boot_cmds_cnt++] = 0x0000e751;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = 0xb000000c;
+ boot_cmds[boot_cmds_cnt++] = 0x12604040;
+ }
+
+ else if (strncmp(argVect[argi], "--5600", 6) == 0) {
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = 0xb0000000;
+ boot_cmds[boot_cmds_cnt++] = 0x000095b6;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = 0xb0000008;
+ boot_cmds[boot_cmds_cnt++] = 0x00006751;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = 0xb000000c;
+ boot_cmds[boot_cmds_cnt++] = 0x12204040;
+ }
+
+ else if (strncmp(argVect[argi], "--testcardlx", 12) == 0) {
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_DRAM_CONFIG;
+ boot_cmds[boot_cmds_cnt++] = 0x12604040;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_DRAM_TIMING;
+ boot_cmds[boot_cmds_cnt++] = 0x0000e751;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_WAITSTATES;
+ boot_cmds[boot_cmds_cnt++] = 0x00b395b5;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_BUS_CONFIG;
+ boot_cmds[boot_cmds_cnt++] = 0x00000207;
+ }
+
+ else if (strncmp(argVect[argi], "--testcard", 10) == 0) {
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_WAITSTATES;
+ boot_cmds[boot_cmds_cnt++] = 0x000010b3;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_DRAM_TIMING;
+ boot_cmds[boot_cmds_cnt++] = 0x00006543;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_DRAM_CONFIG;
+ boot_cmds[boot_cmds_cnt++] = 0x12966060;
+ }
+
+ else if (strncmp(argVect[argi], "--devboard", 10) == 0) {
+ /* Printing on serial port will not work until PORT_PB is set... */
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_PORT_PB_SET;
+ boot_cmds[boot_cmds_cnt++] = 0x01001ef3;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_PORT_PA_SET;
+ boot_cmds[boot_cmds_cnt++] = 0x00001df0;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_WAITSTATES;
+ boot_cmds[boot_cmds_cnt++] = 0x000095a6;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_DRAM_CONFIG;
+ boot_cmds[boot_cmds_cnt++] = 0x1a200040;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_DRAM_TIMING;
+ boot_cmds[boot_cmds_cnt++] = 0x00005611;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_BUS_CONFIG;
+ boot_cmds[boot_cmds_cnt++] = 0x00000104;
+ }
+
+ else if (strncmp(argVect[argi], "--verify", 8) == 0) {
+ boot_cmds[boot_cmds_cnt++] = MEM_VERIFY;
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--verify", 16);
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--verify", 16);
+ }
+
+ else if (strncmp(argVect[argi], "--setreg", 8) == 0) {
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ if ((argVect[argi+1][0] >= 'A') && (argVect[argi+1][0] <= 'Z')) {
+ GetRegisterOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--setreg", 16);
+ }
+ else {
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--setreg", 16);
+ }
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--setreg", 16);
+ }
+
+ else if (strncmp(argVect[argi], "--getreg", 8) == 0) {
+ boot_cmds[boot_cmds_cnt++] = GET_REGISTER;
+ if ((argVect[argi+1][0] >= 'A') && (argVect[argi+1][0] <= 'Z')) {
+ GetRegisterOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--getreg", 16);
+ }
+ else {
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--getreg", 16);
+ }
+ }
+
+ else if (strncmp(argVect[argi], "--pause", 7) == 0) {
+ boot_cmds[boot_cmds_cnt++] = PAUSE_LOOP;
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--pause", 16);
+ }
+
+ else if (strncmp(argVect[argi], "--memtest", 9) == 0) {
+ boot_cmds[boot_cmds_cnt++] = MEM_TEST;
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--memtest", 16);
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--memtest", 16);
+ }
+
+ else if (strncmp(argVect[argi], "--loop", 6) == 0) {
+ char str[MAX_STRING_LEN];
+ boot_cmds[boot_cmds_cnt++] = LOOP;
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--loop", 16);
+ GetStringOption(&argi, argCount, argVect, str, argVect[argi]);
+ new_label(&loop_label, boot_cmds_cnt+1, str);
+ boot_cmds_cnt++;
+ }
+
+ else if (strncmp(argVect[argi], "--label", 7) == 0) {
+ char str[MAX_STRING_LEN];
+ GetStringOption(&argi, argCount, argVect, str, "--label");
+ new_label(&label, boot_cmds_cnt, str);
+ }
+
+ else if (strncmp(argVect[argi], "--memdump", 9) == 0) {
+ boot_cmds[boot_cmds_cnt++] = MEM_DUMP;
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--memdump", 16);
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--memdump", 16);
+ }
+
+ else if (strncmp(argVect[argi], "--memclear", 10) == 0) {
+ boot_cmds[boot_cmds_cnt++] = MEM_CLEAR;
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--memclear", 16);
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--memclear", 16);
+ }
+
+ else if (strncmp(argVect[argi], "--flash", 7) == 0) {
+ boot_cmds[boot_cmds_cnt++] = FLASH;
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--flash", 16);
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--flash", 16);
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--flash", 16);
+ doing_flash = TRUE;
+ }
+
+ else if (strncmp(argVect[argi], "--jump", 6) == 0) {
+ boot_cmds[boot_cmds_cnt++] = JUMP;
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--jump", 16);
+ }
+
+ else if (strncmp(argVect[argi], "--file", 6) == 0) {
+ char str[MAX_STRING_LEN];
+ boot_cmds[boot_cmds_cnt++] = PACKET_INFO;
+ GetStringOption(&argi, argCount, argVect,
+ str, "--file"); /* file name */
+ GetNumberOption(&argi, argCount, argVect,
+ &boot_cmds[boot_cmds_cnt++], str, 16); /* address */
+ last_boot_file = allocate_boot_file(last_boot_file);
+ first_boot_file = first_boot_file ? first_boot_file : last_boot_file;
+ last_boot_file->fileName = malloc(strlen(str) + 1);
+ strcpy(last_boot_file->fileName, str);
+ last_boot_file->size_p = &boot_cmds[boot_cmds_cnt];
+ last_boot_file->size_sent = 0;
+ if (strncmp(str, "-", 1) != 0) {
+ if (stat(last_boot_file->fileName, &st) == -1) {
+ printf("Cannot get size of file '%s'. %s.\n",
+ last_boot_file->fileName, strerror(errno));
+ exit(EXIT_FAILURE);
+ }
+ if (db2) printf("* size is %d 0x%8.8x\n",
+ (int)st.st_size, (unsigned int)st.st_size);
+ last_boot_file->size = st.st_size;
+ boot_cmds[boot_cmds_cnt++] = st.st_size;
+ }
+ else {
+ GetNumberOption(&argi, argCount, argVect,
+ &last_boot_file->size , str, 16); /* size */
+
+ boot_cmds[boot_cmds_cnt++] = last_boot_file->size;
+ printf("* size is %d 0x%8.8x\n", last_boot_file->size,
+ last_boot_file->size);
+ }
+ }
+
+ else if (strncmp(argVect[argi], "--bootfile", 10) == 0) {
+ GetStringOption(&argi, argCount, argVect,
+ boot_loader_file, "--bootfile");
+ }
+
+ else if (strncmp(argVect[argi], "-d", 2) == 0) {
+ if (GetNumberOption (&argi, argCount, argVect, &number, "-d", 10) == 0) {
+ printHelp = TRUE;
+ exitCode = EXIT_FAILURE;
+ }
+ else {
+ sprintf(dbStr, "%d", number);
+ for (i = 0; i != (int) strlen(dbStr); i++) {
+ switch (dbStr[i] - '0') {
+ case 1:
+ db1 = TRUE;
+ break;
+ case 2:
+ db2 = TRUE;
+ break;
+ case 3:
+ db3 = TRUE;
+ break;
+ case 4:
+ db4 = TRUE;
+ break;
+ default:
+ printf("ERROR! Debug level %d is not defined.\n", dbStr[i] - '0');
+ printHelp = TRUE;
+ exitCode = EXIT_FAILURE;
+ break;
+ }
+ }
+ }
+ }
+
+ else if (strncmp(argVect[argi], "--find", 6) == 0) {
+ GetStringOption(&argi, argCount, argVect, needle, "--find");
+ /* convert control characters like /n to the real ascii valure */
+ {
+ int i;
+ int j = 0;
+ char c;
+ int esc = 0;
+
+ for (i = 0; (c = needle[i]); i++,j++) {
+// printf("c = %d, i %d, j %d\n", (int)c, i, j);
+ if (c == '\\') {
+// printf("esc\n");
+ esc = 1;
+ continue;
+ }
+ else if (esc) {
+ esc = 0;
+ switch(c) {
+ case 'r':
+ c = '\r';
+ break;
+
+ case 'n':
+ c = '\n';
+ break;
+
+ case '\\':
+ c = '\\';
+ break;
+
+ default:
+ printf("Uknown escape sequence '\\%c'\n", c);
+ exit(EXIT_FAILURE);
+ }
+ j--;
+ }
+ // printf("setting j %d to %d\n", j, (int)c);
+ needle[j] = c;
+ }
+ needle_len = j;
+ }
+
+ for (i = 0; needle[i]; i++) {
+ //printf("i = %d, c %d\n", i,(int)needle[i]);
+ }
+ }
+
+ else if (strncmp(argVect[argi], "--exitonfind", 12) == 0) {
+ exitonfind = TRUE;
+ }
+
+ else if (strncmp(argVect[argi], "--help", 6) == 0) {
+ printHelp = TRUE;
+ }
+
+ else {
+ printf("ERROR! Don't understand option '%s'\n", argVect[argi]);
+ printHelp = TRUE;
+ exitCode = EXIT_FAILURE;
+ }
+ }
+
+ if (printHelp == TRUE) {
+ PrintHelp();
+ exit(exitCode);
+ }
+
+ if (noleds) {
+ strcpy(&boot_loader_file[strlen(boot_loader_file)], "_NOLEDS");
+ }
+
+ handle_labels();
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: handle_labels
+*#
+*# PARAMETERS: global loop_label, label
+*#
+*# DESCRIPTION: Checks and matches labels from --loop and --label commands
+*# and inserts the resolved addresses into boot commands.
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 20020204 ronny Initial version
+*#
+*#***************************************************************************/
+
+void
+handle_labels(void)
+{
+ struct label_t *ll = loop_label;
+ struct label_t *l = label;
+ struct label_t *last_l = l;
+
+ while(ll) {
+ int match = 0;
+
+ l = last_l;
+ while(l) {
+ match = 0;
+
+ if (l->name && ll->name && (strcmp(l->name, ll->name) == 0)) {
+ match = 1;
+ boot_cmds[ll->addr] = IO_BUF_START+(l->addr*4);
+ break;
+ }
+ l = l->prev;
+ }
+ if (!match) {
+ printf("Error. No label '%s' defined as needed by --loop command.\n", ll->name);
+ exit(EXIT_FAILURE);
+ }
+ ll = ll->prev;
+ }
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: new_label
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 20020201 ronny Initial version
+*#
+*#***************************************************************************/
+
+void
+new_label(struct label_t **label, udword addr, const char *name)
+{
+ struct label_t *new_p;
+
+ new_p = malloc(sizeof(struct label_t));
+
+ if (*label == NULL) { /* first one? */
+ *label = new_p;
+ new_p->prev = NULL;
+ }
+ else {
+ new_p->prev = *label;
+ }
+ *label = new_p;
+ new_p->addr = boot_cmds_cnt;
+ new_p->name = malloc(strlen(name));
+ strcpy(new_p->name, name);
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: GetStringOption
+*#
+*# PARAMETERS: int *argNr : Returns next argc here.
+*# int argCount : Index of last argument.
+*# char *argVect[] : argv.
+*# char *ret : Copy string here.
+*# char *option : Name of the option.
+*#
+*# DESCRIPTION: Extracts a string option from argv, and updates argnr.
+*# Returns TRUE/FALSE and string in *ret.
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 960930 ronny Initial version
+*# 961203 ronny Handles filenames with spaces within 'file name'.
+*#
+*#***************************************************************************/
+
+int
+GetStringOption(int *argNr, int argCount, const char *argVect[], char *ret,
+ const char *option)
+{
+ int startChar = strlen(option);
+
+ *ret = '\0';
+
+ /* Are there any more chars after option? If not skip to next argv. */
+ if (strlen(argVect[*argNr]) <= (unsigned int)startChar) {
+ (*argNr)++;
+ startChar = 0;
+ }
+
+ /* Any args left? */
+ if (*argNr >= argCount) {
+ printf("ERROR! The option '%s' needs a string argument.\n", option);
+ PrintHelp();
+ exit(EXIT_FAILURE);
+ }
+
+ /* avoid stack overflow hacks */
+ if (strlen(&argVect[*argNr][startChar]) > MAX_STRING_LEN) {
+ printf("Argument '%s' longer than maximum allowable %d characters.\n",
+ &argVect[*argNr][startChar], MAX_STRING_LEN);
+ exit(EXIT_FAILURE);
+ }
+
+ strcpy(ret, &argVect[*argNr][startChar]);
+ if (db4) printf("<<< GetStringOption '%s'\n", ret);
+
+ return TRUE;
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: GetNumberOption
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 960930 ronny Initial version
+*#
+*#***************************************************************************/
+
+int
+GetNumberOption(int *argNr, int argCount, const char *argVect[],
+ unsigned int *ret, const char *option, int base)
+{
+ int startChar = 0;
+ int add_io_base = 0;
+
+ (*argNr)++;
+
+ if (*argNr >= argCount) {
+ printf("ERROR! The option '%s' needs a number argument.\n", option);
+ PrintHelp();
+ exit(EXIT_FAILURE);
+ }
+
+ if (argVect[*argNr][startChar] == '+') {
+ add_io_base = 1;
+ startChar++;
+ }
+
+ *ret = strtoul(&argVect[*argNr][startChar], NULL, base);
+
+ if (add_io_base) {
+ *ret += IO_BUF_START;
+ if (*ret < IO_BUF_START || *ret >= IO_BUF_END) {
+ printf("ERROR! '%s' is outside the IO buffer (option '%s').\n",
+ argVect[*argNr], option);
+ exit(EXIT_FAILURE);
+ }
+ }
+
+ if (db4) printf("<<< GetNumberOption %08x\r\n", *ret);
+
+ return TRUE;
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: GetRegisterOption
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 960930 ronny Initial version
+*#
+*#***************************************************************************/
+
+int
+GetRegisterOption(int *argNr, int argCount, const char *argVect[],
+ unsigned int *ret, const char *option, int base)
+{
+ int startChar = 0;
+
+ (*argNr)++;
+
+ if (*argNr >= argCount) {
+ printf("Error! The option '%s' needs a register name.\n", option);
+ PrintHelp();
+ exit(EXIT_FAILURE);
+ }
+
+ {
+ int r = 0;
+
+ while (reg_des[r].name) {
+ if (strcmp(reg_des[r].name, argVect[*argNr]) == 0) {
+ *ret = reg_des[r].addr;
+ return TRUE;
+ break;
+ }
+ r++;
+ }
+ }
+
+ printf("Error! Didn't find a register name matching '%s'.\n",
+ argVect[*argNr]);
+
+ exit(EXIT_FAILURE);
+
+ return FALSE;
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: PrintHelp
+*#
+*# PARAMETERS: None.
+*#
+*# DESCRIPTION: Prints help info.
+*#
+*#---------------------------------------------------------------------------
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 960909 ronny Initial version
+*#
+*#***************************************************************************/
+
+void
+PrintHelp(void)
+{
+ printf("e100boot version %s.\n", version);
+
+ printf("\ne100boot [--device devicename] [--file filename|- addr [size]]\n"
+ " [--flash ram-source flash-offset size]\n"
+ " [--pause iter]\n"
+ " [--memtest addr addr]\n"
+ " [--memclear addr addr] [--memdump addr addr]\n"
+ " [--setreg addr|regname val] [--getreg addr|regname]\n"
+ " [--verify addr val] [--label label] [--loop addr label]\n"
+ " [--5400] [--5600] [--testcard] [--devboard]\n"
+ " [--testcardlx] [--network] [--serial]\n"
+ " [--baudrate baudrate] [--bootfile file] [--jump addr]\n"
+ " [--tofiles] [--cmdsonly] [--images] [--noleds]\n"
+ " [--help]\n\n");
+
+ printf(" The commands sent to the cbl, and which are parsed by the cbl,\n"
+ " are stored at 0x%8.8x-0x%8.8x.\n\n", IO_BUF_START, IO_BUF_END);
+
+ printf(" See the man page for more details about e100boot.\n\n");
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: CreateBootLoader
+*#
+*# PARAMETERS: None.
+*#
+*# DESCRIPTION: Creates boot packets from boot file or internal loader.
+*#
+*#---------------------------------------------------------------------------
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 960909 ronny Initial version
+*#***************************************************************************/
+
+void
+CreateBootLoader(void)
+{
+ struct stat st;
+ char *buf = NULL;
+ // int size_pos = 0x18;
+ // int addr_pos = 0x28;
+ struct packet_header_T *ph;
+ int packet_size;
+ int header_size;
+ int buf_cnt = 0;
+ int i;
+ udword sum = 0;
+
+ if (create_boot_loader) {
+ int image_nbr = 0;
+ int found = 0;
+ const struct boot_image_info_type *info;
+
+ if (db4) printf("> CreateBootLoader\n");
+
+ info = &boot_image_info[image_nbr];
+
+ /* Use internal boot loader? */
+ while (!found && info->name != NULL) {
+ if (strcmp(boot_loader_file, info->name) == 0) {
+ st.st_size = info->len;
+ buf = (char*) malloc(st.st_size);
+ memcpy(buf, info->ptr, st.st_size); /* unnecessary? */
+ found = TRUE;
+ printf("Using internal boot loader: %s - %s.\n",
+ info->name, info->info);
+ }
+ else {
+ image_nbr++;
+ info = &boot_image_info[image_nbr];
+ }
+ }
+
+ /* No internal? Load it from file instead. */
+ if (!found) {
+ FILE *fd;
+
+ /* We didn't find an internal match, load the boot file from disk. */
+ if ((fd = Fopen(boot_loader_file, "r")) == NULL) {
+ printf("Cannot open bootloader '%s'. %s.\n",
+ boot_loader_file, strerror(errno));
+ exit(EXIT_FAILURE);
+ }
+
+ if (fstat(fileno(fd), &st) == -1) {
+ printf("Cannot get filestatus of bootloader '%s'. %s.\n",
+ boot_loader_file, strerror(errno));
+ exit(EXIT_FAILURE);
+ }
+
+ buf = (char*) malloc(st.st_size);
+ // printf("CreateBootLoader: buf = (char*) malloc(st.st_size); 2\n");
+ if (read(fileno(fd), buf, st.st_size) != st.st_size) {
+ printf("Read fewer bytes than there should be in %s.\n",
+ boot_loader_file);
+ exit(EXIT_FAILURE);
+ }
+
+ fclose(fd);
+ }
+
+ /* Alright, got loader in buf[] and size in st. */
+ if (netBoot) {
+ /* The etrax code for all boot methods are linked to adress
+ 380000f0 but since network boot starts execution at 380000f4
+ we have two nops in the beginning of the code which we do not
+ transmit to etrax in the network case. The link adress
+ doesn't change though. */
+ buf += 4;
+ st.st_size -= 4;
+ packet_size = DATA_SIZE;
+ }
+ else {
+ packet_size = st.st_size;
+ }
+
+ /* Hack binary, insert size and address. */
+
+ /* Giovanni Varasano (24/06/2005) : bug
+ * It is not a good habit to make code endian dependent on the host
+ * processor where cross compilation happens. Intel is little endian and
+ * PowerPC is big endian, but the target (ETRAX) is always little endian.
+ * The use of swap_endian() solves the problem.
+ */
+
+#define SIZE_PATTERN 0x12345678
+#define ADDR_PATTERN 0x87654321
+#define SIZE_POS (netBoot ? 0x0c : 0x10)
+#define ADDR_POS (netBoot ? 0x10 : 0x14)
+
+ if (swap_endian(*(udword*)&buf[SIZE_POS]) != SIZE_PATTERN) {
+ printf("Bootloader corrupt. Should contain ret/nop (0x%8.8x) at 0x%x, but contains %x\n",
+ SIZE_PATTERN, SIZE_POS, *(udword*)&buf[SIZE_POS]);
+ exit(EXIT_FAILURE);
+ }
+
+ /* How much data to load except data in first packet. */
+
+ if (netBoot) {
+ *(udword*)(&buf[SIZE_POS]) = swap_endian(st.st_size - DATA_SIZE);
+ }
+ else {
+ *(udword*)(&buf[SIZE_POS]) = swap_endian(st.st_size - 784);
+ }
+
+ if (db3) printf("Inserting boot size 0x%x at 0x%x.\n",
+ (unsigned int) *(udword*)(&buf[SIZE_POS]),
+ (unsigned int)&buf[SIZE_POS]);
+
+ if (swap_endian(*(udword*)&buf[ADDR_POS]) != ADDR_PATTERN) {
+ printf("Bootloader corrupt. Should contain ret/nop (0x%8.8x) at 0x%x, but contains %x\n",
+ ADDR_PATTERN, ADDR_POS, *(udword*)&buf[ADDR_POS]);
+ exit(EXIT_FAILURE);
+ }
+
+ if (netBoot) {
+ *(udword*)(&buf[ADDR_POS]) = swap_endian(BOOT_ADDRESS + DATA_SIZE);
+ }
+ else {
+ *(udword*)(&buf[ADDR_POS]) = swap_endian(BOOT_ADDRESS-4 + 784);
+ }
+
+ if (db3) printf("Inserting boot address 0x%x at 0x%x.\n",
+ (unsigned int)*(udword*)(&buf[ADDR_POS]),
+ (unsigned int)&buf[ADDR_POS]);
+
+
+ for (i = 0; i != st.st_size; i++) {
+ sum += ((byte*)buf)[i];
+ }
+ if (db1) printf("Checksum 0x%x, bytes %d\n", sum, i);
+
+ if (db4) {
+ int i;
+
+ for(i=0; i<st.st_size; i+=8) {
+ int j;
+
+ printf("0x%8.8x[%4.4x]: ", BOOT_ADDRESS+i, i);
+ for(j=0; i+j<st.st_size && j<8; j++) {
+ printf("%2.2x ", (unsigned char) buf[i+j]);
+ }
+ printf("\n");
+ }
+ }
+ /* Now create list of packets. */
+ while (buf_cnt <= st.st_size) {
+
+ header_size = seq_nr == 0 ?
+ SIZE_OF_FIRST_HEADER : sizeof(struct packet_header_T);
+
+ if (netBoot) {
+ packet_size = ((st.st_size - buf_cnt) < DATA_SIZE ?
+ st.st_size - buf_cnt : DATA_SIZE) + header_size;
+ }
+ else {
+ packet_size = st.st_size;
+ header_size = 0;
+ }
+
+ if (db4) printf("seq_nr %d, header_size %d, packet_size %d\n",
+ seq_nr, header_size, packet_size);
+
+ last_packet = allocate_packet(last_packet);
+
+ first_packet = first_packet ? first_packet : last_packet;
+
+ last_packet->size = packet_size;
+ last_packet->data = (char*)malloc(packet_size);
+ last_packet->seq = seq_nr;
+ last_packet->baud_rate = 9600;
+
+ last_packet->boot_file = allocate_boot_file(NULL);
+ last_packet->boot_file->fileName = boot_loader_file;
+
+ // printf("last_packet->size %8.8x\n", last_packet->size);
+ // printf("last_packet->data %8.8x\n",last_packet->data);
+
+ if (netBoot) {
+ ph = (struct packet_header_T*) last_packet->data;
+ memcpy(ph->dest, dst_addr_of_device, 6);
+ memcpy(ph->src, eth_addr_local, 6);
+ ph->length = htons(packet_size);
+ ph->snap1 = htonl(SNAP1);
+ ph->snap2 = htonl(SNAP2);
+ ph->tag = htonl(SERVER_TAG);
+ ph->seq = htonl(seq_nr);
+ if (seq_nr != 0) {
+ ph->type = htonl(BOOT_PACKET);
+ ph->id = htonl(0);
+ }
+ }
+
+ memcpy(&last_packet->data[header_size], &buf[buf_cnt],
+ packet_size - header_size);
+ if (db3) DecodeSvintoBoot(last_packet->data);
+
+ if (netBoot) {
+ buf_cnt += DATA_SIZE;
+ }
+ else {
+ buf_cnt += packet_size +1;
+ }
+
+ seq_nr++;
+ }
+ }
+
+ if (db4) printf("< CreateBootLoader\n");
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: allocate_packet
+*#
+*# PARAMETERS: None.
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 960909 ronny Initial version
+*#***************************************************************************/
+
+struct packet_buf*
+allocate_packet(struct packet_buf *p)
+{
+ if (db4) printf("> allocate_packet\n");
+
+ if (p) {
+ p->next = (struct packet_buf*) malloc(sizeof(struct packet_buf));
+ p = p->next;
+ }
+ else {
+ p = (struct packet_buf*) malloc(sizeof(struct packet_buf));
+ }
+ p->next = NULL;
+
+ return(p);
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: allocate_boot_file
+*#
+*# PARAMETERS: None.
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 960909 ronny Initial version
+*#***************************************************************************/
+
+struct boot_files_T*
+allocate_boot_file(struct boot_files_T *bf)
+{
+ if (bf) {
+ bf->next = (struct boot_files_T*) malloc(sizeof(struct boot_files_T));
+ bf = bf->next;
+ }
+ else {
+ bf = (struct boot_files_T*) malloc(sizeof(struct boot_files_T));
+ }
+ bf->next = NULL;
+
+ return(bf);
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: CreateBootCmds
+*#
+*# PARAMETERS: None.
+*#
+*# DESCRIPTION: Creates a boot packet from the boot commands. The data is
+*# filled in later by FinishBootCmds().
+*#
+*#---------------------------------------------------------------------------
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 980818 ronny Initial version
+*#***************************************************************************/
+
+void
+CreateBootCmds(void)
+{
+ struct packet_header_T *ph;
+
+ if (db4) printf("***> CreateBootCmds\n");
+
+ last_packet = allocate_packet(last_packet);
+
+ boot_cmds_packet = last_packet;
+
+ last_packet->boot_file = allocate_boot_file(NULL);
+ last_packet->boot_file->fileName = BOOT_CMDS_FILE;
+ last_packet->baud_rate = 9600;
+
+ last_packet->size = netBoot ? SIZE_OF_BOOT_CMDS + sizeof(struct packet_header_T)
+ : SIZE_OF_BOOT_CMDS;
+
+ last_packet->data = (char *) malloc(last_packet->size);
+ last_packet->seq = seq_nr;
+
+ if (netBoot) {
+ /* Create packet header. */
+ ph = (struct packet_header_T *) last_packet->data;
+ memcpy(ph->dest, dst_addr_of_device, 6);
+ memcpy(ph->src, eth_addr_local, 6);
+ ph->length = htons(last_packet->size);
+ ph->snap1 = htonl(SNAP1);
+ ph->snap2 = htonl(SNAP2);
+ ph->tag = htonl(SERVER_TAG);
+ ph->seq = htonl(seq_nr);
+ seq_nr++;
+ ph->type = htonl(BOOT_CMDS);
+ ph->id = htonl(0);
+ }
+
+ if (db3) DecodeSvintoBoot(last_packet->data);
+ if (db4) printf("<*** CreateBootCmds\n");
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: FinishBootCmds
+*#
+*# PARAMETERS: None.
+*#
+*# DESCRIPTION: Copies the boot commands into the correct packet and changes
+*# the dwords to network order.
+*#
+*#---------------------------------------------------------------------------
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 960909 ronny Initial version
+*#***************************************************************************/
+
+void
+FinishBootCmds(void)
+{
+ int i;
+ unsigned int offset = 0;
+
+ for (i = 0; i != boot_cmds_cnt; i++) {
+ boot_cmds[i] = htonl(boot_cmds[i]);
+ if (db3) printf("%8.8x\n", boot_cmds[i]);
+ }
+
+ /* Copy boot commands into packet. */
+ if (netBoot) {
+ offset = sizeof(struct packet_header_T);
+ }
+
+ memcpy(&boot_cmds_packet->data[offset], boot_cmds,
+ boot_cmds_cnt * sizeof(udword));
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: CreateNewBootPacket
+*#
+*# PARAMETERS: None.
+*#
+*# DESCRIPTION: Creates next packet for the files specified by '--file'.
+*#
+*# RETURNS: Next packet, or NULL.
+*#
+*#---------------------------------------------------------------------------
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 960909 ronny Initial version
+*#***************************************************************************/
+
+struct packet_buf*
+CreateNewBootPacket(void)
+{
+ static char buf[DATA_SIZE];
+ struct packet_header_T *ph;
+ int packet_size;
+ int header_size;
+ int i;
+ udword sum;
+ int size = 0;
+ int padding = 0;
+
+ static struct boot_files_T *bf = NULL;
+
+ if (db3) printf("> CreateNewBootPacket\n");
+
+ bf = bf ? bf : first_boot_file;
+
+ while (bf) {
+ if (!bf->fd) {
+ if (strcmp(bf->fileName, "-") == 0) {
+ bf->fd = stdin;
+ }
+ else {
+ bf->fd = fopen(bf->fileName, "r");
+ }
+
+ if (bf->fd == NULL) {
+ printf("Cannot open boot file %s. Exiting\n", bf->fileName);
+ exit(EXIT_FAILURE);
+ }
+ if (db3) printf("Opening boot file %s\n", bf->fileName);
+ }
+
+ if (!padding) {
+ size = fread(buf, 1, DATA_SIZE, bf->fd);
+ if (size == 0) {
+ if (db3) printf("Nothing more to read. Read: %d/%d\n",
+ bf->size_sent, bf->size);
+ padding = 1;
+ }
+ }
+
+ if (padding) {
+ if (bf->size_sent < bf->size) {
+ if (db3) printf("padding...\n");
+ size = (bf->size - bf->size_sent > DATA_SIZE) ?
+ DATA_SIZE : bf->size - bf->size_sent;
+ memset(buf, 0, size);
+ }
+ else {
+ if (db3) printf("All written\n");
+ padding = 0;
+ size = 0;
+ }
+ }
+
+ if (size != 0) {
+ if (db3) printf("size: %d %d/%d\n", size, bf->size_sent, bf->size);
+ bf->size_sent += size;
+ last_packet = allocate_packet(last_packet);
+
+ /* Calculate checksum. */
+ sum = 0;
+ for (i = 0; i != size; i++) {
+ sum += ((byte*)buf)[i];
+ }
+ if (db2) printf("Checksum 0x%x, bytes %d\n", sum, i);
+
+ /* Figure out size of packet. */
+ if (netBoot) {
+ header_size = seq_nr == 0 ?
+ SIZE_OF_FIRST_HEADER : sizeof(struct packet_header_T);
+
+ packet_size = ((size) < DATA_SIZE ? size : DATA_SIZE) + header_size;
+ }
+ else {
+ header_size = 0;
+ packet_size = size;
+ }
+
+ if (packet_size < 60) { /* CRC adds 4 bytes to 64 */
+ printf(
+ "Last packet from file '%s', is smaller than 64 bytes. \n"
+ "This is not allowed in the Ethernet standard. Will pad with %d "
+ "bytes.\n", bf->fileName, 60-packet_size);
+
+ *(bf->size_p) += 60-packet_size;
+ packet_size = 60;
+ }
+
+ last_packet->size = packet_size;
+ last_packet->data = (char*)malloc(packet_size);
+ last_packet->boot_file = bf;
+ last_packet->baud_rate = set_baudrate;
+
+ /* printf("size %8.8x\n", last_packet->size);*/
+ /* printf("data %8.8x\n",last_packet->data);*/
+
+ if (netBoot) {
+ /* Initialize ethernet header. */
+ ph = (struct packet_header_T*) last_packet->data;
+ memcpy(ph->dest, dst_addr_of_device, 6);
+ memcpy(ph->src, eth_addr_local, 6);
+ /* printf("packet_size %d\n", packet_size);*/
+ ph->length = htons(packet_size);
+ ph->snap1 = htonl(SNAP1);
+ ph->snap2 = htonl(SNAP2);
+ ph->tag = htonl(SERVER_TAG);
+ ph->seq = htonl(seq_nr);
+ last_packet->seq = seq_nr;
+ if (seq_nr != 0) {
+ ph->type = htonl(BOOT_PACKET);
+ ph->id = htonl(0); /* id doesn't matter, we send to a unicast address */
+ }
+ }
+
+ /* Copy data in place. */
+ memcpy(&last_packet->data[header_size], buf, packet_size - header_size);
+ if (db2) DecodeSvintoBoot(last_packet->data);
+ /* PrintPacket(last_packet->data, last_packet->size, HEX);*/
+ seq_nr++;
+
+ if (db3) printf("< CreateNewBootPacket\n");
+ return(last_packet);
+ }
+ else { /* Nothing read from fd. */
+ fclose(bf->fd);
+ bf = bf->next;
+ }
+ }
+
+ if (db3) printf("< CreateNewBootPacket\n");
+ return(NULL);
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: swap_endian
+*#
+*# PARAMETERS: u - An unsigned value.
+*#
+*# DESCRIPTION: Convert the unsigned value from host order to little endian.
+*#
+*# RETURNS: The unsigned value as little endian.
+*#
+*#***************************************************************************/
+
+unsigned int
+swap_endian(unsigned int u)
+{
+ /* If the host order is the same as the network order (which is big endian),
+ * we need to swap the bytes in the supplied value.
+ */
+ return ntohl(0x12345678) == 0x12345678 ? bswap_32(u) : u;
+}
+
+/****************** END OF FILE common.c ************************************/
--- /dev/null
+/*!***************************************************************************
+*!
+*! FILE NAME : common.h
+*!
+*! DESCRIPTION: Common stuff for e100boot.
+*!
+*! ---------------------------------------------------------------------------
+*! HISTORY
+*!
+*! DATE NAME CHANGES
+*! ---- ---- -------
+*! 2002 05 02 Ronny Ranerup Initial version
+*! ---------------------------------------------------------------------------
+*! (C) Copyright 1999, 2000, 2001, 2002 Axis Communications AB, LUND, SWEDEN
+*!***************************************************************************/
+/************************** Include files ********************************/
+/************************** Constants and macros *************************/
+/* max length of argument strings */
+#define MAX_STRING_LEN 256
+/************************** Type definitions *****************************/
+struct packet_buf {
+ unsigned int size;
+ struct packet_buf *next;
+ unsigned int seq;
+ char *data;
+ struct boot_files_T *boot_file;
+ unsigned int baud_rate;
+};
+
+struct boot_files_T {
+ char *fileName;
+ unsigned int *size_p; /* Pointer to size in boot_cmds. */
+ unsigned int size; /* Size of file. */
+ unsigned int size_sent; /* Number of bytes sent so far. */
+ struct boot_files_T *next;
+ FILE *fd;
+};
+
+/************************** Global variables *****************************/
+extern int db1;
+extern int db2;
+extern int db3;
+extern int db4;
+
+extern char device[MAX_STRING_LEN];
+extern struct packet_buf *first_packet;
+extern int cmdsOnly; /* Just dump boot cmds to file. */
+extern int toFiles; /* Dump all packets to files. */
+
+/************************** Function prototypes **************************/
+
+struct packet_buf* create_packet (unsigned int seq);
+struct packet_buf* free_packet (struct packet_buf *p);
+void find_string (char *str);
+
+
+
--- /dev/null
+/* conf.h. Generated automatically by configure. */
+#define HAVE_NET_IF_H 1
+#define HAVE_NETINET_IN_H 1 /* Socket data structure */
+#define HAVE_NETINET_IN_SYSTM_H 1
+#define HAVE_NETINET_IP_H 1
+#define HAVE_NETINET_UDP_H 1
+#define HAVE_NETINET_TCP_H 1
+#define HAVE_NETDB_H 1
+#define HAVE_ARPA_INET_H 1
+#define HAVE_SYS_SOCKET_H 1
+#define HAVE_FCNTL_H 1 /* O_RDONLY */
+#define HAVE_LINUX_IF_ETHER_H 1
+#define HAVE_SIGNAL_H 1
+#define HAVE_STRING_H 1
+#define HAVE_STDLIB_H 1
+#define HAVE_STDIO_H 1
+#define HAVE_SYS_TIME_H 1
+#define HAVE_UNISTD_H 1
+#define HAVE_SYS_STAT_H 1
+#define HAVE_SYS_TYPES_H 1
+#define HAVE_ERRNO_H 1
+#define HAVE_LINUX_SOCKIOS_H 1 /* SIOCGIFHWADDR */
+#define HAVE_CTYPE_H 1
+#define HAVE_PCAP_H 0
+#define TIME_WITH_SYS_TIME 1
+#define HAVE_SYS_SOCKET_H 1
+#define HAVE_SYS_IOCTL_H 1
+#define HAVE_TERMIOS_H 1
+
+#if HAVE_TERMIOS_H
+#include <termios.h>
+#endif
+
+#if HAVE_SYS_IOCTL_H
+#include <sys/ioctl.h>
+#endif
+
+#if HAVE_SYS_TYPES_H
+#include <sys/types.h>
+#endif
+
+#if HAVE_CTYPE_H
+#include <ctype.h>
+#endif
+
+#if HAVE_SYS_SOCKET_H
+#include <sys/socket.h>
+#endif
+
+#if HAVE_NETINET_IN_H
+#include <netinet/in.h>
+#endif
+
+#if HAVE_NET_IF_H
+#include <net/if.h>
+#endif
+
+#if HAVE_NETINET_IN_SYSTM_H
+#include <netinet/in_systm.h>
+#endif
+
+#if HAVE_NETINET_IP_H
+#include <netinet/ip.h>
+#endif
+
+#if HAVE_NETINET_UDP_H
+#include <netinet/udp.h>
+#endif
+
+#if HAVE_NETINET_TCP_H
+#include <netinet/tcp.h>
+#endif
+
+#if HAVE_NETDB_H
+#include <netdb.h>
+#endif
+
+#if HAVE_ARPA_INET_H
+#include <arpa/inet.h>
+#endif
+
+#if HAVE_SYS_SOCKET_H
+#include <sys/socket.h>
+#endif
+
+#if HAVE_FCNTL_H
+#include <fcntl.h>
+#endif
+
+#if HAVE_LINUX_IF_ETHER_H
+#include <linux/if_ether.h>
+#endif
+
+#if HAVE_SIGNAL_H
+#include <signal.h>
+#endif
+
+#if HAVE_STRING_H
+#include <string.h>
+#endif
+
+#if HAVE_STDLIB_H
+#include <stdlib.h>
+#endif
+
+#if HAVE_STDIO_H
+#include <stdio.h>
+#endif
+
+#if HAVE_UNISTD_H
+#include <unistd.h>
+#endif
+
+#if HAVE_SYS_STAT_H
+#include <sys/stat.h>
+#endif
+
+#if HAVE_ERRNO_H
+#include <errno.h>
+#endif
+
+#if HAVE_LINUX_SOCKIOS_H
+#include <linux/sockios.h>
+#endif
+
+#if HAVE_PCAP_H
+#include <pcap.h>
+#endif
+
+#if TIME_WITH_SYS_TIME
+#include <sys/time.h>
+#include <time.h>
+#else
+#if HAVE_SYS_TIME_H
+#include <sys/time.h>
+#else
+#include <time.h>
+#endif
+#endif
--- /dev/null
+#define HAVE_NET_IF_H 0
+#define HAVE_NETINET_IN_H 0 /* Socket data structure */
+#define HAVE_NETINET_IN_SYSTM_H 0
+#define HAVE_NETINET_IP_H 0
+#define HAVE_NETINET_UDP_H 0
+#define HAVE_NETINET_TCP_H 0
+#define HAVE_NETDB_H 0
+#define HAVE_ARPA_INET_H 0
+#define HAVE_SYS_SOCKET_H 0
+#define HAVE_FCNTL_H 0 /* O_RDONLY */
+#define HAVE_LINUX_IF_ETHER_H 0
+#define HAVE_SIGNAL_H 0
+#define HAVE_STRING_H 0
+#define HAVE_STDLIB_H 0
+#define HAVE_STDIO_H 0
+#define HAVE_SYS_TIME_H 0
+#define HAVE_UNISTD_H 0
+#define HAVE_SYS_STAT_H 0
+#define HAVE_SYS_TYPES_H 0
+#define HAVE_ERRNO_H 0
+#define HAVE_LINUX_SOCKIOS_H 0 /* SIOCGIFHWADDR */
+#define HAVE_CTYPE_H 0
+#define HAVE_PCAP_H 0
+#define TIME_WITH_SYS_TIME 0
+#define HAVE_SYS_SOCKET_H 0
+#define HAVE_SYS_IOCTL_H 0
+#define HAVE_TERMIOS_H 0
+
+#if HAVE_TERMIOS_H
+#include <termios.h>
+#endif
+
+#if HAVE_SYS_IOCTL_H
+#include <sys/ioctl.h>
+#endif
+
+#if HAVE_SYS_TYPES_H
+#include <sys/types.h>
+#endif
+
+#if HAVE_CTYPE_H
+#include <ctype.h>
+#endif
+
+#if HAVE_SYS_SOCKET_H
+#include <sys/socket.h>
+#endif
+
+#if HAVE_NETINET_IN_H
+#include <netinet/in.h>
+#endif
+
+#if HAVE_NET_IF_H
+#include <net/if.h>
+#endif
+
+#if HAVE_NETINET_IN_SYSTM_H
+#include <netinet/in_systm.h>
+#endif
+
+#if HAVE_NETINET_IP_H
+#include <netinet/ip.h>
+#endif
+
+#if HAVE_NETINET_UDP_H
+#include <netinet/udp.h>
+#endif
+
+#if HAVE_NETINET_TCP_H
+#include <netinet/tcp.h>
+#endif
+
+#if HAVE_NETDB_H
+#include <netdb.h>
+#endif
+
+#if HAVE_ARPA_INET_H
+#include <arpa/inet.h>
+#endif
+
+#if HAVE_SYS_SOCKET_H
+#include <sys/socket.h>
+#endif
+
+#if HAVE_FCNTL_H
+#include <fcntl.h>
+#endif
+
+#if HAVE_LINUX_IF_ETHER_H
+#include <linux/if_ether.h>
+#endif
+
+#if HAVE_SIGNAL_H
+#include <signal.h>
+#endif
+
+#if HAVE_STRING_H
+#include <string.h>
+#endif
+
+#if HAVE_STDLIB_H
+#include <stdlib.h>
+#endif
+
+#if HAVE_STDIO_H
+#include <stdio.h>
+#endif
+
+#if HAVE_UNISTD_H
+#include <unistd.h>
+#endif
+
+#if HAVE_SYS_STAT_H
+#include <sys/stat.h>
+#endif
+
+#if HAVE_ERRNO_H
+#include <errno.h>
+#endif
+
+#if HAVE_LINUX_SOCKIOS_H
+#include <linux/sockios.h>
+#endif
+
+#if HAVE_PCAP_H
+#include <pcap.h>
+#endif
+
+#if TIME_WITH_SYS_TIME
+#include <sys/time.h>
+#include <time.h>
+#else
+#if HAVE_SYS_TIME_H
+#include <sys/time.h>
+#else
+#include <time.h>
+#endif
+#endif
--- /dev/null
+# This file is a shell script that caches the results of configure
+# tests run on this system so they can be shared between configure
+# scripts and configure runs. It is not useful on other systems.
+# If it contains results you don't want to keep, you may remove or edit it.
+#
+# By default, configure uses ./config.cache as the cache file,
+# creating it if it does not exist already. You can give configure
+# the --cache-file=FILE option to use a different cache file; that is
+# what configure does when it calls configure scripts in
+# subdirectories, so they share the cache.
+# Giving --cache-file=/dev/null disables caching, for debugging configure.
+# config.status only pays attention to the cache file if you give it the
+# --recheck option to rerun configure.
+#
+ac_cv_header_arpa_inet_h=${ac_cv_header_arpa_inet_h=yes}
+ac_cv_header_ctype_h=${ac_cv_header_ctype_h=yes}
+ac_cv_header_errno_h=${ac_cv_header_errno_h=yes}
+ac_cv_header_fcntl_h=${ac_cv_header_fcntl_h=yes}
+ac_cv_header_linux_if_ether_h=${ac_cv_header_linux_if_ether_h=yes}
+ac_cv_header_linux_sockios_h=${ac_cv_header_linux_sockios_h=yes}
+ac_cv_header_net_if_h=${ac_cv_header_net_if_h=yes}
+ac_cv_header_netdb_h=${ac_cv_header_netdb_h=yes}
+ac_cv_header_netinet_in_h=${ac_cv_header_netinet_in_h=yes}
+ac_cv_header_netinet_in_systm_h=${ac_cv_header_netinet_in_systm_h=yes}
+ac_cv_header_netinet_ip_h=${ac_cv_header_netinet_ip_h=yes}
+ac_cv_header_netinet_tcp_h=${ac_cv_header_netinet_tcp_h=yes}
+ac_cv_header_netinet_udp_h=${ac_cv_header_netinet_udp_h=yes}
+ac_cv_header_pcap_pcap_h=${ac_cv_header_pcap_pcap_h=no}
+ac_cv_header_signal_h=${ac_cv_header_signal_h=yes}
+ac_cv_header_stdc=${ac_cv_header_stdc=yes}
+ac_cv_header_stdio_h=${ac_cv_header_stdio_h=yes}
+ac_cv_header_stdlib_h=${ac_cv_header_stdlib_h=yes}
+ac_cv_header_string_h=${ac_cv_header_string_h=yes}
+ac_cv_header_sys_ioctl_h=${ac_cv_header_sys_ioctl_h=yes}
+ac_cv_header_sys_socket_h=${ac_cv_header_sys_socket_h=yes}
+ac_cv_header_sys_stat_h=${ac_cv_header_sys_stat_h=yes}
+ac_cv_header_sys_time_h=${ac_cv_header_sys_time_h=yes}
+ac_cv_header_sys_types_h=${ac_cv_header_sys_types_h=yes}
+ac_cv_header_termios_h=${ac_cv_header_termios_h=yes}
+ac_cv_header_time=${ac_cv_header_time=yes}
+ac_cv_header_unistd_h=${ac_cv_header_unistd_h=yes}
+ac_cv_lib_pcap_pcap_open_live=${ac_cv_lib_pcap_pcap_open_live=no}
+ac_cv_prog_CC=${ac_cv_prog_CC=gcc}
+ac_cv_prog_CPP=${ac_cv_prog_CPP='gcc -E'}
+ac_cv_prog_cc_cross=${ac_cv_prog_cc_cross=no}
+ac_cv_prog_cc_g=${ac_cv_prog_cc_g=yes}
+ac_cv_prog_cc_works=${ac_cv_prog_cc_works=yes}
+ac_cv_prog_gcc=${ac_cv_prog_gcc=yes}
--- /dev/null
+This file contains any messages produced by compilers while
+running configure, to aid debugging if configure makes a mistake.
+
+configure:530: checking for gcc
+configure:643: checking whether the C compiler (gcc ) works
+configure:659: gcc -o conftest conftest.c 1>&5
+configure:685: checking whether the C compiler (gcc ) is a cross-compiler
+configure:690: checking whether we are using GNU C
+configure:699: gcc -E conftest.c
+configure:718: checking whether gcc accepts -g
+configure:751: checking for pcap_open_live in -lpcap
+configure:770: gcc -o conftest -g -O2 conftest.c -lpcap 1>&5
+/usr/bin/ld: cannot find -lpcap
+collect2: ld returned 1 exit status
+configure: failed program was:
+#line 759 "configure"
+#include "confdefs.h"
+/* Override any gcc2 internal prototype to avoid an error. */
+/* We use char because int might match the return type of a gcc2
+ builtin and then its argument prototype would still apply. */
+char pcap_open_live();
+
+int main() {
+pcap_open_live()
+; return 0; }
+configure:799: checking how to run the C preprocessor
+configure:820: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:879: checking for ANSI C header files
+configure:892: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:959: gcc -o conftest -g -O2 conftest.c 1>&5
+configure: In function 'main':
+configure:954: warning: incompatible implicit declaration of built-in function 'exit'
+configure:986: checking for termios.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for sys/ioctl.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for net/if.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for netinet/in.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for netinet/in_systm.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for netinet/ip.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for netinet/udp.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for netinet/tcp.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for netdb.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for arpa/inet.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for sys/socket.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for fcntl.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for linux/if_ether.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for signal.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for string.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for stdlib.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for stdio.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for sys/time.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for unistd.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for sys/stat.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for sys/types.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for errno.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for linux/sockios.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for ctype.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:986: checking for sys/socket.h
+configure:986: checking for pcap/pcap.h
+configure:996: gcc -E conftest.c >/dev/null 2>conftest.out
+configure:992:23: error: pcap/pcap.h: No such file or directory
+configure: failed program was:
+#line 991 "configure"
+#include "confdefs.h"
+#include <pcap/pcap.h>
+configure:1024: checking whether time.h and sys/time.h may both be included
+configure:1038: gcc -c -g -O2 conftest.c 1>&5
--- /dev/null
+#! /bin/sh
+# Generated automatically by configure.
+# Run this file to recreate the current configuration.
+# This directory was configured as follows,
+# on host bertha:
+#
+# ./configure
+#
+# Compiler output produced by configure, useful for debugging
+# configure, is in ./config.log if it exists.
+
+ac_cs_usage="Usage: ./config.status [--recheck] [--version] [--help]"
+for ac_option
+do
+ case "$ac_option" in
+ -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r)
+ echo "running ${CONFIG_SHELL-/bin/sh} ./configure --no-create --no-recursion"
+ exec ${CONFIG_SHELL-/bin/sh} ./configure --no-create --no-recursion ;;
+ -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
+ echo "./config.status generated by autoconf version 2.13"
+ exit 0 ;;
+ -help | --help | --hel | --he | --h)
+ echo "$ac_cs_usage"; exit 0 ;;
+ *) echo "$ac_cs_usage"; exit 1 ;;
+ esac
+done
+
+ac_given_srcdir=.
+
+trap 'rm -fr Makefile conf.h conftest*; exit 1' 1 2 15
+
+# Protect against being on the right side of a sed subst in config.status.
+sed 's/%@/@@/; s/@%/@@/; s/%g$/@g/; /@g$/s/[\\&%]/\\&/g;
+ s/@@/%@/; s/@@/@%/; s/@g$/%g/' > conftest.subs <<\CEOF
+/^[ ]*VPATH[ ]*=[^:]*$/d
+
+s%@SHELL@%/bin/sh%g
+s%@CFLAGS@%-g -O2%g
+s%@CPPFLAGS@%%g
+s%@CXXFLAGS@%%g
+s%@FFLAGS@%%g
+s%@DEFS@%-DHAVE_CONFIG_H%g
+s%@LDFLAGS@%%g
+s%@LIBS@%%g
+s%@exec_prefix@%${prefix}%g
+s%@prefix@%/usr/local%g
+s%@program_transform_name@%s,x,x,%g
+s%@bindir@%${exec_prefix}/bin%g
+s%@sbindir@%${exec_prefix}/sbin%g
+s%@libexecdir@%${exec_prefix}/libexec%g
+s%@datadir@%${prefix}/share%g
+s%@sysconfdir@%${prefix}/etc%g
+s%@sharedstatedir@%${prefix}/com%g
+s%@localstatedir@%${prefix}/var%g
+s%@libdir@%${exec_prefix}/lib%g
+s%@includedir@%${prefix}/include%g
+s%@oldincludedir@%/usr/include%g
+s%@infodir@%${prefix}/info%g
+s%@mandir@%${prefix}/man%g
+s%@CC@%gcc%g
+s%@CPP@%gcc -E%g
+
+CEOF
+
+# Split the substitutions into bite-sized pieces for seds with
+# small command number limits, like on Digital OSF/1 and HP-UX.
+ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script.
+ac_file=1 # Number of current file.
+ac_beg=1 # First line for current file.
+ac_end=$ac_max_sed_cmds # Line after last line for current file.
+ac_more_lines=:
+ac_sed_cmds=""
+while $ac_more_lines; do
+ if test $ac_beg -gt 1; then
+ sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
+ else
+ sed "${ac_end}q" conftest.subs > conftest.s$ac_file
+ fi
+ if test ! -s conftest.s$ac_file; then
+ ac_more_lines=false
+ rm -f conftest.s$ac_file
+ else
+ if test -z "$ac_sed_cmds"; then
+ ac_sed_cmds="sed -f conftest.s$ac_file"
+ else
+ ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
+ fi
+ ac_file=`expr $ac_file + 1`
+ ac_beg=$ac_end
+ ac_end=`expr $ac_end + $ac_max_sed_cmds`
+ fi
+done
+if test -z "$ac_sed_cmds"; then
+ ac_sed_cmds=cat
+fi
+
+CONFIG_FILES=${CONFIG_FILES-"Makefile"}
+for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
+ # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
+ case "$ac_file" in
+ *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
+ ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
+ *) ac_file_in="${ac_file}.in" ;;
+ esac
+
+ # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
+
+ # Remove last slash and all that follows it. Not all systems have dirname.
+ ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
+ if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
+ # The file is in a subdirectory.
+ test ! -d "$ac_dir" && mkdir "$ac_dir"
+ ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
+ # A "../" for each directory in $ac_dir_suffix.
+ ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
+ else
+ ac_dir_suffix= ac_dots=
+ fi
+
+ case "$ac_given_srcdir" in
+ .) srcdir=.
+ if test -z "$ac_dots"; then top_srcdir=.
+ else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
+ /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
+ *) # Relative path.
+ srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
+ top_srcdir="$ac_dots$ac_given_srcdir" ;;
+ esac
+
+
+ echo creating "$ac_file"
+ rm -f "$ac_file"
+ configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
+ case "$ac_file" in
+ *Makefile*) ac_comsub="1i\\
+# $configure_input" ;;
+ *) ac_comsub= ;;
+ esac
+
+ ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
+ sed -e "$ac_comsub
+s%@configure_input@%$configure_input%g
+s%@srcdir@%$srcdir%g
+s%@top_srcdir@%$top_srcdir%g
+" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
+fi; done
+rm -f conftest.s*
+
+# These sed commands are passed to sed as "A NAME B NAME C VALUE D", where
+# NAME is the cpp macro being defined and VALUE is the value it is being given.
+#
+# ac_d sets the value in "#define NAME VALUE" lines.
+ac_dA='s%^\([ ]*\)#\([ ]*define[ ][ ]*\)'
+ac_dB='\([ ][ ]*\)[^ ]*%\1#\2'
+ac_dC='\3'
+ac_dD='%g'
+# ac_u turns "#undef NAME" with trailing blanks into "#define NAME VALUE".
+ac_uA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
+ac_uB='\([ ]\)%\1#\2define\3'
+ac_uC=' '
+ac_uD='\4%g'
+# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE".
+ac_eA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
+ac_eB='$%\1#\2define\3'
+ac_eC=' '
+ac_eD='%g'
+
+if test "${CONFIG_HEADERS+set}" != set; then
+ CONFIG_HEADERS="conf.h"
+fi
+for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
+ # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
+ case "$ac_file" in
+ *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
+ ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
+ *) ac_file_in="${ac_file}.in" ;;
+ esac
+
+ echo creating $ac_file
+
+ rm -f conftest.frag conftest.in conftest.out
+ ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
+ cat $ac_file_inputs > conftest.in
+
+ cat > conftest.frag <<CEOF
+${ac_dA}STDC_HEADERS${ac_dB}STDC_HEADERS${ac_dC}1${ac_dD}
+${ac_uA}STDC_HEADERS${ac_uB}STDC_HEADERS${ac_uC}1${ac_uD}
+${ac_eA}STDC_HEADERS${ac_eB}STDC_HEADERS${ac_eC}1${ac_eD}
+${ac_dA}HAVE_TERMIOS_H${ac_dB}HAVE_TERMIOS_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_TERMIOS_H${ac_uB}HAVE_TERMIOS_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_TERMIOS_H${ac_eB}HAVE_TERMIOS_H${ac_eC}1${ac_eD}
+${ac_dA}HAVE_SYS_IOCTL_H${ac_dB}HAVE_SYS_IOCTL_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_SYS_IOCTL_H${ac_uB}HAVE_SYS_IOCTL_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_SYS_IOCTL_H${ac_eB}HAVE_SYS_IOCTL_H${ac_eC}1${ac_eD}
+${ac_dA}HAVE_NET_IF_H${ac_dB}HAVE_NET_IF_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_NET_IF_H${ac_uB}HAVE_NET_IF_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_NET_IF_H${ac_eB}HAVE_NET_IF_H${ac_eC}1${ac_eD}
+CEOF
+ sed -f conftest.frag conftest.in > conftest.out
+ rm -f conftest.in
+ mv conftest.out conftest.in
+
+ cat > conftest.frag <<CEOF
+${ac_dA}HAVE_NETINET_IN_H${ac_dB}HAVE_NETINET_IN_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_NETINET_IN_H${ac_uB}HAVE_NETINET_IN_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_NETINET_IN_H${ac_eB}HAVE_NETINET_IN_H${ac_eC}1${ac_eD}
+${ac_dA}HAVE_NETINET_IN_SYSTM_H${ac_dB}HAVE_NETINET_IN_SYSTM_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_NETINET_IN_SYSTM_H${ac_uB}HAVE_NETINET_IN_SYSTM_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_NETINET_IN_SYSTM_H${ac_eB}HAVE_NETINET_IN_SYSTM_H${ac_eC}1${ac_eD}
+${ac_dA}HAVE_NETINET_IP_H${ac_dB}HAVE_NETINET_IP_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_NETINET_IP_H${ac_uB}HAVE_NETINET_IP_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_NETINET_IP_H${ac_eB}HAVE_NETINET_IP_H${ac_eC}1${ac_eD}
+${ac_dA}HAVE_NETINET_UDP_H${ac_dB}HAVE_NETINET_UDP_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_NETINET_UDP_H${ac_uB}HAVE_NETINET_UDP_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_NETINET_UDP_H${ac_eB}HAVE_NETINET_UDP_H${ac_eC}1${ac_eD}
+CEOF
+ sed -f conftest.frag conftest.in > conftest.out
+ rm -f conftest.in
+ mv conftest.out conftest.in
+
+ cat > conftest.frag <<CEOF
+${ac_dA}HAVE_NETINET_TCP_H${ac_dB}HAVE_NETINET_TCP_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_NETINET_TCP_H${ac_uB}HAVE_NETINET_TCP_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_NETINET_TCP_H${ac_eB}HAVE_NETINET_TCP_H${ac_eC}1${ac_eD}
+${ac_dA}HAVE_NETDB_H${ac_dB}HAVE_NETDB_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_NETDB_H${ac_uB}HAVE_NETDB_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_NETDB_H${ac_eB}HAVE_NETDB_H${ac_eC}1${ac_eD}
+${ac_dA}HAVE_ARPA_INET_H${ac_dB}HAVE_ARPA_INET_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_ARPA_INET_H${ac_uB}HAVE_ARPA_INET_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_ARPA_INET_H${ac_eB}HAVE_ARPA_INET_H${ac_eC}1${ac_eD}
+${ac_dA}HAVE_SYS_SOCKET_H${ac_dB}HAVE_SYS_SOCKET_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_SYS_SOCKET_H${ac_uB}HAVE_SYS_SOCKET_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_SYS_SOCKET_H${ac_eB}HAVE_SYS_SOCKET_H${ac_eC}1${ac_eD}
+CEOF
+ sed -f conftest.frag conftest.in > conftest.out
+ rm -f conftest.in
+ mv conftest.out conftest.in
+
+ cat > conftest.frag <<CEOF
+${ac_dA}HAVE_FCNTL_H${ac_dB}HAVE_FCNTL_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_FCNTL_H${ac_uB}HAVE_FCNTL_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_FCNTL_H${ac_eB}HAVE_FCNTL_H${ac_eC}1${ac_eD}
+${ac_dA}HAVE_LINUX_IF_ETHER_H${ac_dB}HAVE_LINUX_IF_ETHER_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_LINUX_IF_ETHER_H${ac_uB}HAVE_LINUX_IF_ETHER_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_LINUX_IF_ETHER_H${ac_eB}HAVE_LINUX_IF_ETHER_H${ac_eC}1${ac_eD}
+${ac_dA}HAVE_SIGNAL_H${ac_dB}HAVE_SIGNAL_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_SIGNAL_H${ac_uB}HAVE_SIGNAL_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_SIGNAL_H${ac_eB}HAVE_SIGNAL_H${ac_eC}1${ac_eD}
+${ac_dA}HAVE_STRING_H${ac_dB}HAVE_STRING_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_STRING_H${ac_uB}HAVE_STRING_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_STRING_H${ac_eB}HAVE_STRING_H${ac_eC}1${ac_eD}
+CEOF
+ sed -f conftest.frag conftest.in > conftest.out
+ rm -f conftest.in
+ mv conftest.out conftest.in
+
+ cat > conftest.frag <<CEOF
+${ac_dA}HAVE_STDLIB_H${ac_dB}HAVE_STDLIB_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_STDLIB_H${ac_uB}HAVE_STDLIB_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_STDLIB_H${ac_eB}HAVE_STDLIB_H${ac_eC}1${ac_eD}
+${ac_dA}HAVE_STDIO_H${ac_dB}HAVE_STDIO_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_STDIO_H${ac_uB}HAVE_STDIO_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_STDIO_H${ac_eB}HAVE_STDIO_H${ac_eC}1${ac_eD}
+${ac_dA}HAVE_SYS_TIME_H${ac_dB}HAVE_SYS_TIME_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_SYS_TIME_H${ac_uB}HAVE_SYS_TIME_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_SYS_TIME_H${ac_eB}HAVE_SYS_TIME_H${ac_eC}1${ac_eD}
+${ac_dA}HAVE_UNISTD_H${ac_dB}HAVE_UNISTD_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_UNISTD_H${ac_uB}HAVE_UNISTD_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_UNISTD_H${ac_eB}HAVE_UNISTD_H${ac_eC}1${ac_eD}
+CEOF
+ sed -f conftest.frag conftest.in > conftest.out
+ rm -f conftest.in
+ mv conftest.out conftest.in
+
+ cat > conftest.frag <<CEOF
+${ac_dA}HAVE_SYS_STAT_H${ac_dB}HAVE_SYS_STAT_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_SYS_STAT_H${ac_uB}HAVE_SYS_STAT_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_SYS_STAT_H${ac_eB}HAVE_SYS_STAT_H${ac_eC}1${ac_eD}
+${ac_dA}HAVE_SYS_TYPES_H${ac_dB}HAVE_SYS_TYPES_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_SYS_TYPES_H${ac_uB}HAVE_SYS_TYPES_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_SYS_TYPES_H${ac_eB}HAVE_SYS_TYPES_H${ac_eC}1${ac_eD}
+${ac_dA}HAVE_ERRNO_H${ac_dB}HAVE_ERRNO_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_ERRNO_H${ac_uB}HAVE_ERRNO_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_ERRNO_H${ac_eB}HAVE_ERRNO_H${ac_eC}1${ac_eD}
+${ac_dA}HAVE_LINUX_SOCKIOS_H${ac_dB}HAVE_LINUX_SOCKIOS_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_LINUX_SOCKIOS_H${ac_uB}HAVE_LINUX_SOCKIOS_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_LINUX_SOCKIOS_H${ac_eB}HAVE_LINUX_SOCKIOS_H${ac_eC}1${ac_eD}
+CEOF
+ sed -f conftest.frag conftest.in > conftest.out
+ rm -f conftest.in
+ mv conftest.out conftest.in
+
+ cat > conftest.frag <<CEOF
+${ac_dA}HAVE_CTYPE_H${ac_dB}HAVE_CTYPE_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_CTYPE_H${ac_uB}HAVE_CTYPE_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_CTYPE_H${ac_eB}HAVE_CTYPE_H${ac_eC}1${ac_eD}
+${ac_dA}HAVE_SYS_SOCKET_H${ac_dB}HAVE_SYS_SOCKET_H${ac_dC}1${ac_dD}
+${ac_uA}HAVE_SYS_SOCKET_H${ac_uB}HAVE_SYS_SOCKET_H${ac_uC}1${ac_uD}
+${ac_eA}HAVE_SYS_SOCKET_H${ac_eB}HAVE_SYS_SOCKET_H${ac_eC}1${ac_eD}
+${ac_dA}TIME_WITH_SYS_TIME${ac_dB}TIME_WITH_SYS_TIME${ac_dC}1${ac_dD}
+${ac_uA}TIME_WITH_SYS_TIME${ac_uB}TIME_WITH_SYS_TIME${ac_uC}1${ac_uD}
+${ac_eA}TIME_WITH_SYS_TIME${ac_eB}TIME_WITH_SYS_TIME${ac_eC}1${ac_eD}
+s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
+CEOF
+ sed -f conftest.frag conftest.in > conftest.out
+ rm -f conftest.in
+ mv conftest.out conftest.in
+
+ rm -f conftest.frag conftest.h
+ echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
+ cat conftest.in >> conftest.h
+ rm -f conftest.in
+ if cmp -s $ac_file conftest.h 2>/dev/null; then
+ echo "$ac_file is unchanged"
+ rm -f conftest.h
+ else
+ # Remove last slash and all that follows it. Not all systems have dirname.
+ ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
+ if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
+ # The file is in a subdirectory.
+ test ! -d "$ac_dir" && mkdir "$ac_dir"
+ fi
+ rm -f $ac_file
+ mv conftest.h $ac_file
+ fi
+fi; done
+
+
+
+exit 0
--- /dev/null
+#! /bin/sh
+
+# Guess values for system-dependent variables and create Makefiles.
+# Generated automatically using autoconf version 2.13
+# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
+#
+# This configure script is free software; the Free Software Foundation
+# gives unlimited permission to copy, distribute and modify it.
+
+# Defaults:
+ac_help=
+ac_default_prefix=/usr/local
+# Any additions from configure.in:
+
+# Initialize some variables set by options.
+# The variables have the same names as the options, with
+# dashes changed to underlines.
+build=NONE
+cache_file=./config.cache
+exec_prefix=NONE
+host=NONE
+no_create=
+nonopt=NONE
+no_recursion=
+prefix=NONE
+program_prefix=NONE
+program_suffix=NONE
+program_transform_name=s,x,x,
+silent=
+site=
+srcdir=
+target=NONE
+verbose=
+x_includes=NONE
+x_libraries=NONE
+bindir='${exec_prefix}/bin'
+sbindir='${exec_prefix}/sbin'
+libexecdir='${exec_prefix}/libexec'
+datadir='${prefix}/share'
+sysconfdir='${prefix}/etc'
+sharedstatedir='${prefix}/com'
+localstatedir='${prefix}/var'
+libdir='${exec_prefix}/lib'
+includedir='${prefix}/include'
+oldincludedir='/usr/include'
+infodir='${prefix}/info'
+mandir='${prefix}/man'
+
+# Initialize some other variables.
+subdirs=
+MFLAGS= MAKEFLAGS=
+SHELL=${CONFIG_SHELL-/bin/sh}
+# Maximum number of lines to put in a shell here document.
+ac_max_here_lines=12
+
+ac_prev=
+for ac_option
+do
+
+ # If the previous option needs an argument, assign it.
+ if test -n "$ac_prev"; then
+ eval "$ac_prev=\$ac_option"
+ ac_prev=
+ continue
+ fi
+
+ case "$ac_option" in
+ -*=*) ac_optarg=`echo "$ac_option" | sed 's/[-_a-zA-Z0-9]*=//'` ;;
+ *) ac_optarg= ;;
+ esac
+
+ # Accept the important Cygnus configure options, so we can diagnose typos.
+
+ case "$ac_option" in
+
+ -bindir | --bindir | --bindi | --bind | --bin | --bi)
+ ac_prev=bindir ;;
+ -bindir=* | --bindir=* | --bindi=* | --bind=* | --bin=* | --bi=*)
+ bindir="$ac_optarg" ;;
+
+ -build | --build | --buil | --bui | --bu)
+ ac_prev=build ;;
+ -build=* | --build=* | --buil=* | --bui=* | --bu=*)
+ build="$ac_optarg" ;;
+
+ -cache-file | --cache-file | --cache-fil | --cache-fi \
+ | --cache-f | --cache- | --cache | --cach | --cac | --ca | --c)
+ ac_prev=cache_file ;;
+ -cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
+ | --cache-f=* | --cache-=* | --cache=* | --cach=* | --cac=* | --ca=* | --c=*)
+ cache_file="$ac_optarg" ;;
+
+ -datadir | --datadir | --datadi | --datad | --data | --dat | --da)
+ ac_prev=datadir ;;
+ -datadir=* | --datadir=* | --datadi=* | --datad=* | --data=* | --dat=* \
+ | --da=*)
+ datadir="$ac_optarg" ;;
+
+ -disable-* | --disable-*)
+ ac_feature=`echo $ac_option|sed -e 's/-*disable-//'`
+ # Reject names that are not valid shell variable names.
+ if test -n "`echo $ac_feature| sed 's/[-a-zA-Z0-9_]//g'`"; then
+ { echo "configure: error: $ac_feature: invalid feature name" 1>&2; exit 1; }
+ fi
+ ac_feature=`echo $ac_feature| sed 's/-/_/g'`
+ eval "enable_${ac_feature}=no" ;;
+
+ -enable-* | --enable-*)
+ ac_feature=`echo $ac_option|sed -e 's/-*enable-//' -e 's/=.*//'`
+ # Reject names that are not valid shell variable names.
+ if test -n "`echo $ac_feature| sed 's/[-_a-zA-Z0-9]//g'`"; then
+ { echo "configure: error: $ac_feature: invalid feature name" 1>&2; exit 1; }
+ fi
+ ac_feature=`echo $ac_feature| sed 's/-/_/g'`
+ case "$ac_option" in
+ *=*) ;;
+ *) ac_optarg=yes ;;
+ esac
+ eval "enable_${ac_feature}='$ac_optarg'" ;;
+
+ -exec-prefix | --exec_prefix | --exec-prefix | --exec-prefi \
+ | --exec-pref | --exec-pre | --exec-pr | --exec-p | --exec- \
+ | --exec | --exe | --ex)
+ ac_prev=exec_prefix ;;
+ -exec-prefix=* | --exec_prefix=* | --exec-prefix=* | --exec-prefi=* \
+ | --exec-pref=* | --exec-pre=* | --exec-pr=* | --exec-p=* | --exec-=* \
+ | --exec=* | --exe=* | --ex=*)
+ exec_prefix="$ac_optarg" ;;
+
+ -gas | --gas | --ga | --g)
+ # Obsolete; use --with-gas.
+ with_gas=yes ;;
+
+ -help | --help | --hel | --he)
+ # Omit some internal or obsolete options to make the list less imposing.
+ # This message is too long to be a string in the A/UX 3.1 sh.
+ cat << EOF
+Usage: configure [options] [host]
+Options: [defaults in brackets after descriptions]
+Configuration:
+ --cache-file=FILE cache test results in FILE
+ --help print this message
+ --no-create do not create output files
+ --quiet, --silent do not print \`checking...' messages
+ --version print the version of autoconf that created configure
+Directory and file names:
+ --prefix=PREFIX install architecture-independent files in PREFIX
+ [$ac_default_prefix]
+ --exec-prefix=EPREFIX install architecture-dependent files in EPREFIX
+ [same as prefix]
+ --bindir=DIR user executables in DIR [EPREFIX/bin]
+ --sbindir=DIR system admin executables in DIR [EPREFIX/sbin]
+ --libexecdir=DIR program executables in DIR [EPREFIX/libexec]
+ --datadir=DIR read-only architecture-independent data in DIR
+ [PREFIX/share]
+ --sysconfdir=DIR read-only single-machine data in DIR [PREFIX/etc]
+ --sharedstatedir=DIR modifiable architecture-independent data in DIR
+ [PREFIX/com]
+ --localstatedir=DIR modifiable single-machine data in DIR [PREFIX/var]
+ --libdir=DIR object code libraries in DIR [EPREFIX/lib]
+ --includedir=DIR C header files in DIR [PREFIX/include]
+ --oldincludedir=DIR C header files for non-gcc in DIR [/usr/include]
+ --infodir=DIR info documentation in DIR [PREFIX/info]
+ --mandir=DIR man documentation in DIR [PREFIX/man]
+ --srcdir=DIR find the sources in DIR [configure dir or ..]
+ --program-prefix=PREFIX prepend PREFIX to installed program names
+ --program-suffix=SUFFIX append SUFFIX to installed program names
+ --program-transform-name=PROGRAM
+ run sed PROGRAM on installed program names
+EOF
+ cat << EOF
+Host type:
+ --build=BUILD configure for building on BUILD [BUILD=HOST]
+ --host=HOST configure for HOST [guessed]
+ --target=TARGET configure for TARGET [TARGET=HOST]
+Features and packages:
+ --disable-FEATURE do not include FEATURE (same as --enable-FEATURE=no)
+ --enable-FEATURE[=ARG] include FEATURE [ARG=yes]
+ --with-PACKAGE[=ARG] use PACKAGE [ARG=yes]
+ --without-PACKAGE do not use PACKAGE (same as --with-PACKAGE=no)
+ --x-includes=DIR X include files are in DIR
+ --x-libraries=DIR X library files are in DIR
+EOF
+ if test -n "$ac_help"; then
+ echo "--enable and --with options recognized:$ac_help"
+ fi
+ exit 0 ;;
+
+ -host | --host | --hos | --ho)
+ ac_prev=host ;;
+ -host=* | --host=* | --hos=* | --ho=*)
+ host="$ac_optarg" ;;
+
+ -includedir | --includedir | --includedi | --included | --include \
+ | --includ | --inclu | --incl | --inc)
+ ac_prev=includedir ;;
+ -includedir=* | --includedir=* | --includedi=* | --included=* | --include=* \
+ | --includ=* | --inclu=* | --incl=* | --inc=*)
+ includedir="$ac_optarg" ;;
+
+ -infodir | --infodir | --infodi | --infod | --info | --inf)
+ ac_prev=infodir ;;
+ -infodir=* | --infodir=* | --infodi=* | --infod=* | --info=* | --inf=*)
+ infodir="$ac_optarg" ;;
+
+ -libdir | --libdir | --libdi | --libd)
+ ac_prev=libdir ;;
+ -libdir=* | --libdir=* | --libdi=* | --libd=*)
+ libdir="$ac_optarg" ;;
+
+ -libexecdir | --libexecdir | --libexecdi | --libexecd | --libexec \
+ | --libexe | --libex | --libe)
+ ac_prev=libexecdir ;;
+ -libexecdir=* | --libexecdir=* | --libexecdi=* | --libexecd=* | --libexec=* \
+ | --libexe=* | --libex=* | --libe=*)
+ libexecdir="$ac_optarg" ;;
+
+ -localstatedir | --localstatedir | --localstatedi | --localstated \
+ | --localstate | --localstat | --localsta | --localst \
+ | --locals | --local | --loca | --loc | --lo)
+ ac_prev=localstatedir ;;
+ -localstatedir=* | --localstatedir=* | --localstatedi=* | --localstated=* \
+ | --localstate=* | --localstat=* | --localsta=* | --localst=* \
+ | --locals=* | --local=* | --loca=* | --loc=* | --lo=*)
+ localstatedir="$ac_optarg" ;;
+
+ -mandir | --mandir | --mandi | --mand | --man | --ma | --m)
+ ac_prev=mandir ;;
+ -mandir=* | --mandir=* | --mandi=* | --mand=* | --man=* | --ma=* | --m=*)
+ mandir="$ac_optarg" ;;
+
+ -nfp | --nfp | --nf)
+ # Obsolete; use --without-fp.
+ with_fp=no ;;
+
+ -no-create | --no-create | --no-creat | --no-crea | --no-cre \
+ | --no-cr | --no-c)
+ no_create=yes ;;
+
+ -no-recursion | --no-recursion | --no-recursio | --no-recursi \
+ | --no-recurs | --no-recur | --no-recu | --no-rec | --no-re | --no-r)
+ no_recursion=yes ;;
+
+ -oldincludedir | --oldincludedir | --oldincludedi | --oldincluded \
+ | --oldinclude | --oldinclud | --oldinclu | --oldincl | --oldinc \
+ | --oldin | --oldi | --old | --ol | --o)
+ ac_prev=oldincludedir ;;
+ -oldincludedir=* | --oldincludedir=* | --oldincludedi=* | --oldincluded=* \
+ | --oldinclude=* | --oldinclud=* | --oldinclu=* | --oldincl=* | --oldinc=* \
+ | --oldin=* | --oldi=* | --old=* | --ol=* | --o=*)
+ oldincludedir="$ac_optarg" ;;
+
+ -prefix | --prefix | --prefi | --pref | --pre | --pr | --p)
+ ac_prev=prefix ;;
+ -prefix=* | --prefix=* | --prefi=* | --pref=* | --pre=* | --pr=* | --p=*)
+ prefix="$ac_optarg" ;;
+
+ -program-prefix | --program-prefix | --program-prefi | --program-pref \
+ | --program-pre | --program-pr | --program-p)
+ ac_prev=program_prefix ;;
+ -program-prefix=* | --program-prefix=* | --program-prefi=* \
+ | --program-pref=* | --program-pre=* | --program-pr=* | --program-p=*)
+ program_prefix="$ac_optarg" ;;
+
+ -program-suffix | --program-suffix | --program-suffi | --program-suff \
+ | --program-suf | --program-su | --program-s)
+ ac_prev=program_suffix ;;
+ -program-suffix=* | --program-suffix=* | --program-suffi=* \
+ | --program-suff=* | --program-suf=* | --program-su=* | --program-s=*)
+ program_suffix="$ac_optarg" ;;
+
+ -program-transform-name | --program-transform-name \
+ | --program-transform-nam | --program-transform-na \
+ | --program-transform-n | --program-transform- \
+ | --program-transform | --program-transfor \
+ | --program-transfo | --program-transf \
+ | --program-trans | --program-tran \
+ | --progr-tra | --program-tr | --program-t)
+ ac_prev=program_transform_name ;;
+ -program-transform-name=* | --program-transform-name=* \
+ | --program-transform-nam=* | --program-transform-na=* \
+ | --program-transform-n=* | --program-transform-=* \
+ | --program-transform=* | --program-transfor=* \
+ | --program-transfo=* | --program-transf=* \
+ | --program-trans=* | --program-tran=* \
+ | --progr-tra=* | --program-tr=* | --program-t=*)
+ program_transform_name="$ac_optarg" ;;
+
+ -q | -quiet | --quiet | --quie | --qui | --qu | --q \
+ | -silent | --silent | --silen | --sile | --sil)
+ silent=yes ;;
+
+ -sbindir | --sbindir | --sbindi | --sbind | --sbin | --sbi | --sb)
+ ac_prev=sbindir ;;
+ -sbindir=* | --sbindir=* | --sbindi=* | --sbind=* | --sbin=* \
+ | --sbi=* | --sb=*)
+ sbindir="$ac_optarg" ;;
+
+ -sharedstatedir | --sharedstatedir | --sharedstatedi \
+ | --sharedstated | --sharedstate | --sharedstat | --sharedsta \
+ | --sharedst | --shareds | --shared | --share | --shar \
+ | --sha | --sh)
+ ac_prev=sharedstatedir ;;
+ -sharedstatedir=* | --sharedstatedir=* | --sharedstatedi=* \
+ | --sharedstated=* | --sharedstate=* | --sharedstat=* | --sharedsta=* \
+ | --sharedst=* | --shareds=* | --shared=* | --share=* | --shar=* \
+ | --sha=* | --sh=*)
+ sharedstatedir="$ac_optarg" ;;
+
+ -site | --site | --sit)
+ ac_prev=site ;;
+ -site=* | --site=* | --sit=*)
+ site="$ac_optarg" ;;
+
+ -srcdir | --srcdir | --srcdi | --srcd | --src | --sr)
+ ac_prev=srcdir ;;
+ -srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*)
+ srcdir="$ac_optarg" ;;
+
+ -sysconfdir | --sysconfdir | --sysconfdi | --sysconfd | --sysconf \
+ | --syscon | --sysco | --sysc | --sys | --sy)
+ ac_prev=sysconfdir ;;
+ -sysconfdir=* | --sysconfdir=* | --sysconfdi=* | --sysconfd=* | --sysconf=* \
+ | --syscon=* | --sysco=* | --sysc=* | --sys=* | --sy=*)
+ sysconfdir="$ac_optarg" ;;
+
+ -target | --target | --targe | --targ | --tar | --ta | --t)
+ ac_prev=target ;;
+ -target=* | --target=* | --targe=* | --targ=* | --tar=* | --ta=* | --t=*)
+ target="$ac_optarg" ;;
+
+ -v | -verbose | --verbose | --verbos | --verbo | --verb)
+ verbose=yes ;;
+
+ -version | --version | --versio | --versi | --vers)
+ echo "configure generated by autoconf version 2.13"
+ exit 0 ;;
+
+ -with-* | --with-*)
+ ac_package=`echo $ac_option|sed -e 's/-*with-//' -e 's/=.*//'`
+ # Reject names that are not valid shell variable names.
+ if test -n "`echo $ac_package| sed 's/[-_a-zA-Z0-9]//g'`"; then
+ { echo "configure: error: $ac_package: invalid package name" 1>&2; exit 1; }
+ fi
+ ac_package=`echo $ac_package| sed 's/-/_/g'`
+ case "$ac_option" in
+ *=*) ;;
+ *) ac_optarg=yes ;;
+ esac
+ eval "with_${ac_package}='$ac_optarg'" ;;
+
+ -without-* | --without-*)
+ ac_package=`echo $ac_option|sed -e 's/-*without-//'`
+ # Reject names that are not valid shell variable names.
+ if test -n "`echo $ac_package| sed 's/[-a-zA-Z0-9_]//g'`"; then
+ { echo "configure: error: $ac_package: invalid package name" 1>&2; exit 1; }
+ fi
+ ac_package=`echo $ac_package| sed 's/-/_/g'`
+ eval "with_${ac_package}=no" ;;
+
+ --x)
+ # Obsolete; use --with-x.
+ with_x=yes ;;
+
+ -x-includes | --x-includes | --x-include | --x-includ | --x-inclu \
+ | --x-incl | --x-inc | --x-in | --x-i)
+ ac_prev=x_includes ;;
+ -x-includes=* | --x-includes=* | --x-include=* | --x-includ=* | --x-inclu=* \
+ | --x-incl=* | --x-inc=* | --x-in=* | --x-i=*)
+ x_includes="$ac_optarg" ;;
+
+ -x-libraries | --x-libraries | --x-librarie | --x-librari \
+ | --x-librar | --x-libra | --x-libr | --x-lib | --x-li | --x-l)
+ ac_prev=x_libraries ;;
+ -x-libraries=* | --x-libraries=* | --x-librarie=* | --x-librari=* \
+ | --x-librar=* | --x-libra=* | --x-libr=* | --x-lib=* | --x-li=* | --x-l=*)
+ x_libraries="$ac_optarg" ;;
+
+ -*) { echo "configure: error: $ac_option: invalid option; use --help to show usage" 1>&2; exit 1; }
+ ;;
+
+ *)
+ if test -n "`echo $ac_option| sed 's/[-a-z0-9.]//g'`"; then
+ echo "configure: warning: $ac_option: invalid host type" 1>&2
+ fi
+ if test "x$nonopt" != xNONE; then
+ { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; }
+ fi
+ nonopt="$ac_option"
+ ;;
+
+ esac
+done
+
+if test -n "$ac_prev"; then
+ { echo "configure: error: missing argument to --`echo $ac_prev | sed 's/_/-/g'`" 1>&2; exit 1; }
+fi
+
+trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
+
+# File descriptor usage:
+# 0 standard input
+# 1 file creation
+# 2 errors and warnings
+# 3 some systems may open it to /dev/tty
+# 4 used on the Kubota Titan
+# 6 checking for... messages and results
+# 5 compiler messages saved in config.log
+if test "$silent" = yes; then
+ exec 6>/dev/null
+else
+ exec 6>&1
+fi
+exec 5>./config.log
+
+echo "\
+This file contains any messages produced by compilers while
+running configure, to aid debugging if configure makes a mistake.
+" 1>&5
+
+# Strip out --no-create and --no-recursion so they do not pile up.
+# Also quote any args containing shell metacharacters.
+ac_configure_args=
+for ac_arg
+do
+ case "$ac_arg" in
+ -no-create | --no-create | --no-creat | --no-crea | --no-cre \
+ | --no-cr | --no-c) ;;
+ -no-recursion | --no-recursion | --no-recursio | --no-recursi \
+ | --no-recurs | --no-recur | --no-recu | --no-rec | --no-re | --no-r) ;;
+ *" "*|*" "*|*[\[\]\~\#\$\^\&\*\(\)\{\}\\\|\;\<\>\?]*)
+ ac_configure_args="$ac_configure_args '$ac_arg'" ;;
+ *) ac_configure_args="$ac_configure_args $ac_arg" ;;
+ esac
+done
+
+# NLS nuisances.
+# Only set these to C if already set. These must not be set unconditionally
+# because not all systems understand e.g. LANG=C (notably SCO).
+# Fixing LC_MESSAGES prevents Solaris sh from translating var values in `set'!
+# Non-C LC_CTYPE values break the ctype check.
+if test "${LANG+set}" = set; then LANG=C; export LANG; fi
+if test "${LC_ALL+set}" = set; then LC_ALL=C; export LC_ALL; fi
+if test "${LC_MESSAGES+set}" = set; then LC_MESSAGES=C; export LC_MESSAGES; fi
+if test "${LC_CTYPE+set}" = set; then LC_CTYPE=C; export LC_CTYPE; fi
+
+# confdefs.h avoids OS command line length limits that DEFS can exceed.
+rm -rf conftest* confdefs.h
+# AIX cpp loses on an empty file, so make sure it contains at least a newline.
+echo > confdefs.h
+
+# A filename unique to this package, relative to the directory that
+# configure is in, which we can look for to find out if srcdir is correct.
+ac_unique_file=common.c
+
+# Find the source files, if location was not specified.
+if test -z "$srcdir"; then
+ ac_srcdir_defaulted=yes
+ # Try the directory containing this script, then its parent.
+ ac_prog=$0
+ ac_confdir=`echo $ac_prog|sed 's%/[^/][^/]*$%%'`
+ test "x$ac_confdir" = "x$ac_prog" && ac_confdir=.
+ srcdir=$ac_confdir
+ if test ! -r $srcdir/$ac_unique_file; then
+ srcdir=..
+ fi
+else
+ ac_srcdir_defaulted=no
+fi
+if test ! -r $srcdir/$ac_unique_file; then
+ if test "$ac_srcdir_defaulted" = yes; then
+ { echo "configure: error: can not find sources in $ac_confdir or .." 1>&2; exit 1; }
+ else
+ { echo "configure: error: can not find sources in $srcdir" 1>&2; exit 1; }
+ fi
+fi
+srcdir=`echo "${srcdir}" | sed 's%\([^/]\)/*$%\1%'`
+
+# Prefer explicitly selected file to automatically selected ones.
+if test -z "$CONFIG_SITE"; then
+ if test "x$prefix" != xNONE; then
+ CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site"
+ else
+ CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site"
+ fi
+fi
+for ac_site_file in $CONFIG_SITE; do
+ if test -r "$ac_site_file"; then
+ echo "loading site script $ac_site_file"
+ . "$ac_site_file"
+ fi
+done
+
+if test -r "$cache_file"; then
+ echo "loading cache $cache_file"
+ . $cache_file
+else
+ echo "creating cache $cache_file"
+ > $cache_file
+fi
+
+ac_ext=c
+# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
+ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
+cross_compiling=$ac_cv_prog_cc_cross
+
+ac_exeext=
+ac_objext=o
+if (echo "testing\c"; echo 1,2,3) | grep c >/dev/null; then
+ # Stardent Vistra SVR4 grep lacks -e, says ghazi@caip.rutgers.edu.
+ if (echo -n testing; echo 1,2,3) | sed s/-n/xn/ | grep xn >/dev/null; then
+ ac_n= ac_c='
+' ac_t=' '
+ else
+ ac_n=-n ac_c= ac_t=
+ fi
+else
+ ac_n= ac_c='\c' ac_t=
+fi
+
+
+
+
+# Extract the first word of "gcc", so it can be a program name with args.
+set dummy gcc; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:530: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ if test -n "$CC"; then
+ ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_dummy="$PATH"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_prog_CC="gcc"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+fi
+fi
+CC="$ac_cv_prog_CC"
+if test -n "$CC"; then
+ echo "$ac_t""$CC" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+if test -z "$CC"; then
+ # Extract the first word of "cc", so it can be a program name with args.
+set dummy cc; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:560: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ if test -n "$CC"; then
+ ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_prog_rejected=no
+ ac_dummy="$PATH"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then
+ ac_prog_rejected=yes
+ continue
+ fi
+ ac_cv_prog_CC="cc"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+if test $ac_prog_rejected = yes; then
+ # We found a bogon in the path, so make sure we never use it.
+ set dummy $ac_cv_prog_CC
+ shift
+ if test $# -gt 0; then
+ # We chose a different compiler from the bogus one.
+ # However, it has the same basename, so the bogon will be chosen
+ # first if we set CC to just the basename; use the full file name.
+ shift
+ set dummy "$ac_dir/$ac_word" "$@"
+ shift
+ ac_cv_prog_CC="$@"
+ fi
+fi
+fi
+fi
+CC="$ac_cv_prog_CC"
+if test -n "$CC"; then
+ echo "$ac_t""$CC" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+ if test -z "$CC"; then
+ case "`uname -s`" in
+ *win32* | *WIN32*)
+ # Extract the first word of "cl", so it can be a program name with args.
+set dummy cl; ac_word=$2
+echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
+echo "configure:611: checking for $ac_word" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ if test -n "$CC"; then
+ ac_cv_prog_CC="$CC" # Let the user override the test.
+else
+ IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
+ ac_dummy="$PATH"
+ for ac_dir in $ac_dummy; do
+ test -z "$ac_dir" && ac_dir=.
+ if test -f $ac_dir/$ac_word; then
+ ac_cv_prog_CC="cl"
+ break
+ fi
+ done
+ IFS="$ac_save_ifs"
+fi
+fi
+CC="$ac_cv_prog_CC"
+if test -n "$CC"; then
+ echo "$ac_t""$CC" 1>&6
+else
+ echo "$ac_t""no" 1>&6
+fi
+ ;;
+ esac
+ fi
+ test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
+fi
+
+echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
+echo "configure:643: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
+
+ac_ext=c
+# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
+ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
+cross_compiling=$ac_cv_prog_cc_cross
+
+cat > conftest.$ac_ext << EOF
+
+#line 654 "configure"
+#include "confdefs.h"
+
+main(){return(0);}
+EOF
+if { (eval echo configure:659: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+ ac_cv_prog_cc_works=yes
+ # If we can't run a trivial program, we are probably using a cross compiler.
+ if (./conftest; exit) 2>/dev/null; then
+ ac_cv_prog_cc_cross=no
+ else
+ ac_cv_prog_cc_cross=yes
+ fi
+else
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ ac_cv_prog_cc_works=no
+fi
+rm -fr conftest*
+ac_ext=c
+# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
+ac_cpp='$CPP $CPPFLAGS'
+ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
+ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
+cross_compiling=$ac_cv_prog_cc_cross
+
+echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
+if test $ac_cv_prog_cc_works = no; then
+ { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
+fi
+echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
+echo "configure:685: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
+echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
+cross_compiling=$ac_cv_prog_cc_cross
+
+echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
+echo "configure:690: checking whether we are using GNU C" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.c <<EOF
+#ifdef __GNUC__
+ yes;
+#endif
+EOF
+if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:699: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
+ ac_cv_prog_gcc=yes
+else
+ ac_cv_prog_gcc=no
+fi
+fi
+
+echo "$ac_t""$ac_cv_prog_gcc" 1>&6
+
+if test $ac_cv_prog_gcc = yes; then
+ GCC=yes
+else
+ GCC=
+fi
+
+ac_test_CFLAGS="${CFLAGS+set}"
+ac_save_CFLAGS="$CFLAGS"
+CFLAGS=
+echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
+echo "configure:718: checking whether ${CC-cc} accepts -g" >&5
+if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ echo 'void f(){}' > conftest.c
+if test -z "`${CC-cc} -g -c conftest.c 2>&1`"; then
+ ac_cv_prog_cc_g=yes
+else
+ ac_cv_prog_cc_g=no
+fi
+rm -f conftest*
+
+fi
+
+echo "$ac_t""$ac_cv_prog_cc_g" 1>&6
+if test "$ac_test_CFLAGS" = set; then
+ CFLAGS="$ac_save_CFLAGS"
+elif test $ac_cv_prog_cc_g = yes; then
+ if test "$GCC" = yes; then
+ CFLAGS="-g -O2"
+ else
+ CFLAGS="-g"
+ fi
+else
+ if test "$GCC" = yes; then
+ CFLAGS="-O2"
+ else
+ CFLAGS=
+ fi
+fi
+
+
+echo $ac_n "checking for pcap_open_live in -lpcap""... $ac_c" 1>&6
+echo "configure:751: checking for pcap_open_live in -lpcap" >&5
+ac_lib_var=`echo pcap'_'pcap_open_live | sed 'y%./+-%__p_%'`
+if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ ac_save_LIBS="$LIBS"
+LIBS="-lpcap $LIBS"
+cat > conftest.$ac_ext <<EOF
+#line 759 "configure"
+#include "confdefs.h"
+/* Override any gcc2 internal prototype to avoid an error. */
+/* We use char because int might match the return type of a gcc2
+ builtin and then its argument prototype would still apply. */
+char pcap_open_live();
+
+int main() {
+pcap_open_live()
+; return 0; }
+EOF
+if { (eval echo configure:770: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+ rm -rf conftest*
+ eval "ac_cv_lib_$ac_lib_var=yes"
+else
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ eval "ac_cv_lib_$ac_lib_var=no"
+fi
+rm -f conftest*
+LIBS="$ac_save_LIBS"
+
+fi
+if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then
+ echo "$ac_t""yes" 1>&6
+ ac_tr_lib=HAVE_LIB`echo pcap | sed -e 's/[^a-zA-Z0-9_]/_/g' \
+ -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/'`
+ cat >> confdefs.h <<EOF
+#define $ac_tr_lib 1
+EOF
+
+ LIBS="-lpcap $LIBS"
+
+else
+ echo "$ac_t""no" 1>&6
+fi
+
+
+echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6
+echo "configure:799: checking how to run the C preprocessor" >&5
+# On Suns, sometimes $CPP names a directory.
+if test -n "$CPP" && test -d "$CPP"; then
+ CPP=
+fi
+if test -z "$CPP"; then
+if eval "test \"`echo '$''{'ac_cv_prog_CPP'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ # This must be in double quotes, not single quotes, because CPP may get
+ # substituted into the Makefile and "${CC-cc}" will confuse make.
+ CPP="${CC-cc} -E"
+ # On the NeXT, cc -E runs the code through the compiler's parser,
+ # not just through cpp.
+ cat > conftest.$ac_ext <<EOF
+#line 814 "configure"
+#include "confdefs.h"
+#include <assert.h>
+Syntax Error
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:820: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
+if test -z "$ac_err"; then
+ :
+else
+ echo "$ac_err" >&5
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ CPP="${CC-cc} -E -traditional-cpp"
+ cat > conftest.$ac_ext <<EOF
+#line 831 "configure"
+#include "confdefs.h"
+#include <assert.h>
+Syntax Error
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:837: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
+if test -z "$ac_err"; then
+ :
+else
+ echo "$ac_err" >&5
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ CPP="${CC-cc} -nologo -E"
+ cat > conftest.$ac_ext <<EOF
+#line 848 "configure"
+#include "confdefs.h"
+#include <assert.h>
+Syntax Error
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:854: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
+if test -z "$ac_err"; then
+ :
+else
+ echo "$ac_err" >&5
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ CPP=/lib/cpp
+fi
+rm -f conftest*
+fi
+rm -f conftest*
+fi
+rm -f conftest*
+ ac_cv_prog_CPP="$CPP"
+fi
+ CPP="$ac_cv_prog_CPP"
+else
+ ac_cv_prog_CPP="$CPP"
+fi
+echo "$ac_t""$CPP" 1>&6
+
+echo $ac_n "checking for ANSI C header files""... $ac_c" 1>&6
+echo "configure:879: checking for ANSI C header files" >&5
+if eval "test \"`echo '$''{'ac_cv_header_stdc'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.$ac_ext <<EOF
+#line 884 "configure"
+#include "confdefs.h"
+#include <stdlib.h>
+#include <stdarg.h>
+#include <string.h>
+#include <float.h>
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:892: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
+if test -z "$ac_err"; then
+ rm -rf conftest*
+ ac_cv_header_stdc=yes
+else
+ echo "$ac_err" >&5
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ ac_cv_header_stdc=no
+fi
+rm -f conftest*
+
+if test $ac_cv_header_stdc = yes; then
+ # SunOS 4.x string.h does not declare mem*, contrary to ANSI.
+cat > conftest.$ac_ext <<EOF
+#line 909 "configure"
+#include "confdefs.h"
+#include <string.h>
+EOF
+if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
+ egrep "memchr" >/dev/null 2>&1; then
+ :
+else
+ rm -rf conftest*
+ ac_cv_header_stdc=no
+fi
+rm -f conftest*
+
+fi
+
+if test $ac_cv_header_stdc = yes; then
+ # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI.
+cat > conftest.$ac_ext <<EOF
+#line 927 "configure"
+#include "confdefs.h"
+#include <stdlib.h>
+EOF
+if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
+ egrep "free" >/dev/null 2>&1; then
+ :
+else
+ rm -rf conftest*
+ ac_cv_header_stdc=no
+fi
+rm -f conftest*
+
+fi
+
+if test $ac_cv_header_stdc = yes; then
+ # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi.
+if test "$cross_compiling" = yes; then
+ :
+else
+ cat > conftest.$ac_ext <<EOF
+#line 948 "configure"
+#include "confdefs.h"
+#include <ctype.h>
+#define ISLOWER(c) ('a' <= (c) && (c) <= 'z')
+#define TOUPPER(c) (ISLOWER(c) ? 'A' + ((c) - 'a') : (c))
+#define XOR(e, f) (((e) && !(f)) || (!(e) && (f)))
+int main () { int i; for (i = 0; i < 256; i++)
+if (XOR (islower (i), ISLOWER (i)) || toupper (i) != TOUPPER (i)) exit(2);
+exit (0); }
+
+EOF
+if { (eval echo configure:959: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
+then
+ :
+else
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -fr conftest*
+ ac_cv_header_stdc=no
+fi
+rm -fr conftest*
+fi
+
+fi
+fi
+
+echo "$ac_t""$ac_cv_header_stdc" 1>&6
+if test $ac_cv_header_stdc = yes; then
+ cat >> confdefs.h <<\EOF
+#define STDC_HEADERS 1
+EOF
+
+fi
+
+for ac_hdr in termios.h sys/ioctl.h net/if.h netinet/in.h netinet/in_systm.h netinet/ip.h netinet/udp.h netinet/tcp.h netdb.h arpa/inet.h sys/socket.h fcntl.h linux/if_ether.h signal.h string.h stdlib.h stdio.h sys/time.h unistd.h sys/stat.h sys/types.h errno.h linux/sockios.h ctype.h sys/socket.h pcap/pcap.h
+do
+ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
+echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
+echo "configure:986: checking for $ac_hdr" >&5
+if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.$ac_ext <<EOF
+#line 991 "configure"
+#include "confdefs.h"
+#include <$ac_hdr>
+EOF
+ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
+{ (eval echo configure:996: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
+if test -z "$ac_err"; then
+ rm -rf conftest*
+ eval "ac_cv_header_$ac_safe=yes"
+else
+ echo "$ac_err" >&5
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ eval "ac_cv_header_$ac_safe=no"
+fi
+rm -f conftest*
+fi
+if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
+ echo "$ac_t""yes" 1>&6
+ ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
+ cat >> confdefs.h <<EOF
+#define $ac_tr_hdr 1
+EOF
+
+else
+ echo "$ac_t""no" 1>&6
+fi
+done
+
+
+echo $ac_n "checking whether time.h and sys/time.h may both be included""... $ac_c" 1>&6
+echo "configure:1024: checking whether time.h and sys/time.h may both be included" >&5
+if eval "test \"`echo '$''{'ac_cv_header_time'+set}'`\" = set"; then
+ echo $ac_n "(cached) $ac_c" 1>&6
+else
+ cat > conftest.$ac_ext <<EOF
+#line 1029 "configure"
+#include "confdefs.h"
+#include <sys/types.h>
+#include <sys/time.h>
+#include <time.h>
+int main() {
+struct tm *tp;
+; return 0; }
+EOF
+if { (eval echo configure:1038: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+ rm -rf conftest*
+ ac_cv_header_time=yes
+else
+ echo "configure: failed program was:" >&5
+ cat conftest.$ac_ext >&5
+ rm -rf conftest*
+ ac_cv_header_time=no
+fi
+rm -f conftest*
+fi
+
+echo "$ac_t""$ac_cv_header_time" 1>&6
+if test $ac_cv_header_time = yes; then
+ cat >> confdefs.h <<\EOF
+#define TIME_WITH_SYS_TIME 1
+EOF
+
+fi
+
+
+trap '' 1 2 15
+cat > confcache <<\EOF
+# This file is a shell script that caches the results of configure
+# tests run on this system so they can be shared between configure
+# scripts and configure runs. It is not useful on other systems.
+# If it contains results you don't want to keep, you may remove or edit it.
+#
+# By default, configure uses ./config.cache as the cache file,
+# creating it if it does not exist already. You can give configure
+# the --cache-file=FILE option to use a different cache file; that is
+# what configure does when it calls configure scripts in
+# subdirectories, so they share the cache.
+# Giving --cache-file=/dev/null disables caching, for debugging configure.
+# config.status only pays attention to the cache file if you give it the
+# --recheck option to rerun configure.
+#
+EOF
+# The following way of writing the cache mishandles newlines in values,
+# but we know of no workaround that is simple, portable, and efficient.
+# So, don't put newlines in cache variables' values.
+# Ultrix sh set writes to stderr and can't be redirected directly,
+# and sets the high bit in the cache file unless we assign to the vars.
+(set) 2>&1 |
+ case `(ac_space=' '; set | grep ac_space) 2>&1` in
+ *ac_space=\ *)
+ # `set' does not quote correctly, so add quotes (double-quote substitution
+ # turns \\\\ into \\, and sed turns \\ into \).
+ sed -n \
+ -e "s/'/'\\\\''/g" \
+ -e "s/^\\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\\)=\\(.*\\)/\\1=\${\\1='\\2'}/p"
+ ;;
+ *)
+ # `set' quotes correctly as required by POSIX, so do not add quotes.
+ sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
+ ;;
+ esac >> confcache
+if cmp -s $cache_file confcache; then
+ :
+else
+ if test -w $cache_file; then
+ echo "updating cache $cache_file"
+ cat confcache > $cache_file
+ else
+ echo "not updating unwritable cache $cache_file"
+ fi
+fi
+rm -f confcache
+
+trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
+
+test "x$prefix" = xNONE && prefix=$ac_default_prefix
+# Let make expand exec_prefix.
+test "x$exec_prefix" = xNONE && exec_prefix='${prefix}'
+
+# Any assignment to VPATH causes Sun make to only execute
+# the first set of double-colon rules, so remove it if not needed.
+# If there is a colon in the path, we need to keep it.
+if test "x$srcdir" = x.; then
+ ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d'
+fi
+
+trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
+
+DEFS=-DHAVE_CONFIG_H
+
+# Without the "./", some shells look in PATH for config.status.
+: ${CONFIG_STATUS=./config.status}
+
+echo creating $CONFIG_STATUS
+rm -f $CONFIG_STATUS
+cat > $CONFIG_STATUS <<EOF
+#! /bin/sh
+# Generated automatically by configure.
+# Run this file to recreate the current configuration.
+# This directory was configured as follows,
+# on host `(hostname || uname -n) 2>/dev/null | sed 1q`:
+#
+# $0 $ac_configure_args
+#
+# Compiler output produced by configure, useful for debugging
+# configure, is in ./config.log if it exists.
+
+ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
+for ac_option
+do
+ case "\$ac_option" in
+ -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r)
+ echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
+ exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
+ -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
+ echo "$CONFIG_STATUS generated by autoconf version 2.13"
+ exit 0 ;;
+ -help | --help | --hel | --he | --h)
+ echo "\$ac_cs_usage"; exit 0 ;;
+ *) echo "\$ac_cs_usage"; exit 1 ;;
+ esac
+done
+
+ac_given_srcdir=$srcdir
+
+trap 'rm -fr `echo "Makefile conf.h" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
+EOF
+cat >> $CONFIG_STATUS <<EOF
+
+# Protect against being on the right side of a sed subst in config.status.
+sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
+ s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
+$ac_vpsub
+$extrasub
+s%@SHELL@%$SHELL%g
+s%@CFLAGS@%$CFLAGS%g
+s%@CPPFLAGS@%$CPPFLAGS%g
+s%@CXXFLAGS@%$CXXFLAGS%g
+s%@FFLAGS@%$FFLAGS%g
+s%@DEFS@%$DEFS%g
+s%@LDFLAGS@%$LDFLAGS%g
+s%@LIBS@%$LIBS%g
+s%@exec_prefix@%$exec_prefix%g
+s%@prefix@%$prefix%g
+s%@program_transform_name@%$program_transform_name%g
+s%@bindir@%$bindir%g
+s%@sbindir@%$sbindir%g
+s%@libexecdir@%$libexecdir%g
+s%@datadir@%$datadir%g
+s%@sysconfdir@%$sysconfdir%g
+s%@sharedstatedir@%$sharedstatedir%g
+s%@localstatedir@%$localstatedir%g
+s%@libdir@%$libdir%g
+s%@includedir@%$includedir%g
+s%@oldincludedir@%$oldincludedir%g
+s%@infodir@%$infodir%g
+s%@mandir@%$mandir%g
+s%@CC@%$CC%g
+s%@CPP@%$CPP%g
+
+CEOF
+EOF
+
+cat >> $CONFIG_STATUS <<\EOF
+
+# Split the substitutions into bite-sized pieces for seds with
+# small command number limits, like on Digital OSF/1 and HP-UX.
+ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script.
+ac_file=1 # Number of current file.
+ac_beg=1 # First line for current file.
+ac_end=$ac_max_sed_cmds # Line after last line for current file.
+ac_more_lines=:
+ac_sed_cmds=""
+while $ac_more_lines; do
+ if test $ac_beg -gt 1; then
+ sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
+ else
+ sed "${ac_end}q" conftest.subs > conftest.s$ac_file
+ fi
+ if test ! -s conftest.s$ac_file; then
+ ac_more_lines=false
+ rm -f conftest.s$ac_file
+ else
+ if test -z "$ac_sed_cmds"; then
+ ac_sed_cmds="sed -f conftest.s$ac_file"
+ else
+ ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
+ fi
+ ac_file=`expr $ac_file + 1`
+ ac_beg=$ac_end
+ ac_end=`expr $ac_end + $ac_max_sed_cmds`
+ fi
+done
+if test -z "$ac_sed_cmds"; then
+ ac_sed_cmds=cat
+fi
+EOF
+
+cat >> $CONFIG_STATUS <<EOF
+
+CONFIG_FILES=\${CONFIG_FILES-"Makefile"}
+EOF
+cat >> $CONFIG_STATUS <<\EOF
+for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
+ # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
+ case "$ac_file" in
+ *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
+ ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
+ *) ac_file_in="${ac_file}.in" ;;
+ esac
+
+ # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
+
+ # Remove last slash and all that follows it. Not all systems have dirname.
+ ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
+ if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
+ # The file is in a subdirectory.
+ test ! -d "$ac_dir" && mkdir "$ac_dir"
+ ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
+ # A "../" for each directory in $ac_dir_suffix.
+ ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
+ else
+ ac_dir_suffix= ac_dots=
+ fi
+
+ case "$ac_given_srcdir" in
+ .) srcdir=.
+ if test -z "$ac_dots"; then top_srcdir=.
+ else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
+ /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
+ *) # Relative path.
+ srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
+ top_srcdir="$ac_dots$ac_given_srcdir" ;;
+ esac
+
+
+ echo creating "$ac_file"
+ rm -f "$ac_file"
+ configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
+ case "$ac_file" in
+ *Makefile*) ac_comsub="1i\\
+# $configure_input" ;;
+ *) ac_comsub= ;;
+ esac
+
+ ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
+ sed -e "$ac_comsub
+s%@configure_input@%$configure_input%g
+s%@srcdir@%$srcdir%g
+s%@top_srcdir@%$top_srcdir%g
+" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
+fi; done
+rm -f conftest.s*
+
+# These sed commands are passed to sed as "A NAME B NAME C VALUE D", where
+# NAME is the cpp macro being defined and VALUE is the value it is being given.
+#
+# ac_d sets the value in "#define NAME VALUE" lines.
+ac_dA='s%^\([ ]*\)#\([ ]*define[ ][ ]*\)'
+ac_dB='\([ ][ ]*\)[^ ]*%\1#\2'
+ac_dC='\3'
+ac_dD='%g'
+# ac_u turns "#undef NAME" with trailing blanks into "#define NAME VALUE".
+ac_uA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
+ac_uB='\([ ]\)%\1#\2define\3'
+ac_uC=' '
+ac_uD='\4%g'
+# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE".
+ac_eA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
+ac_eB='$%\1#\2define\3'
+ac_eC=' '
+ac_eD='%g'
+
+if test "${CONFIG_HEADERS+set}" != set; then
+EOF
+cat >> $CONFIG_STATUS <<EOF
+ CONFIG_HEADERS="conf.h"
+EOF
+cat >> $CONFIG_STATUS <<\EOF
+fi
+for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
+ # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
+ case "$ac_file" in
+ *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
+ ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
+ *) ac_file_in="${ac_file}.in" ;;
+ esac
+
+ echo creating $ac_file
+
+ rm -f conftest.frag conftest.in conftest.out
+ ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
+ cat $ac_file_inputs > conftest.in
+
+EOF
+
+# Transform confdefs.h into a sed script conftest.vals that substitutes
+# the proper values into config.h.in to produce config.h. And first:
+# Protect against being on the right side of a sed subst in config.status.
+# Protect against being in an unquoted here document in config.status.
+rm -f conftest.vals
+cat > conftest.hdr <<\EOF
+s/[\\&%]/\\&/g
+s%[\\$`]%\\&%g
+s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
+s%ac_d%ac_u%gp
+s%ac_u%ac_e%gp
+EOF
+sed -n -f conftest.hdr confdefs.h > conftest.vals
+rm -f conftest.hdr
+
+# This sed command replaces #undef with comments. This is necessary, for
+# example, in the case of _POSIX_SOURCE, which is predefined and required
+# on some systems where configure will not decide to define it.
+cat >> conftest.vals <<\EOF
+s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
+EOF
+
+# Break up conftest.vals because some shells have a limit on
+# the size of here documents, and old seds have small limits too.
+
+rm -f conftest.tail
+while :
+do
+ ac_lines=`grep -c . conftest.vals`
+ # grep -c gives empty output for an empty file on some AIX systems.
+ if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
+ # Write a limited-size here document to conftest.frag.
+ echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
+ sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
+ echo 'CEOF
+ sed -f conftest.frag conftest.in > conftest.out
+ rm -f conftest.in
+ mv conftest.out conftest.in
+' >> $CONFIG_STATUS
+ sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
+ rm -f conftest.vals
+ mv conftest.tail conftest.vals
+done
+rm -f conftest.vals
+
+cat >> $CONFIG_STATUS <<\EOF
+ rm -f conftest.frag conftest.h
+ echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
+ cat conftest.in >> conftest.h
+ rm -f conftest.in
+ if cmp -s $ac_file conftest.h 2>/dev/null; then
+ echo "$ac_file is unchanged"
+ rm -f conftest.h
+ else
+ # Remove last slash and all that follows it. Not all systems have dirname.
+ ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
+ if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
+ # The file is in a subdirectory.
+ test ! -d "$ac_dir" && mkdir "$ac_dir"
+ fi
+ rm -f $ac_file
+ mv conftest.h $ac_file
+ fi
+fi; done
+
+EOF
+cat >> $CONFIG_STATUS <<EOF
+
+EOF
+cat >> $CONFIG_STATUS <<\EOF
+
+exit 0
+EOF
+chmod +x $CONFIG_STATUS
+rm -fr confdefs* $ac_clean_files
+test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
+
--- /dev/null
+dnl Process this file with autoconf to produce a configure script.
+AC_INIT(common.c)
+AC_CONFIG_HEADER(conf.h)
+
+dnl Checks for programs.
+AC_PROG_CC
+
+dnl Checks for libraries.
+AC_CHECK_LIB(pcap, pcap_open_live)
+
+dnl Checks for header files.
+AC_HEADER_STDC
+AC_CHECK_HEADERS(termios.h sys/ioctl.h net/if.h netinet/in.h netinet/in_systm.h netinet/ip.h netinet/udp.h netinet/tcp.h netdb.h arpa/inet.h sys/socket.h fcntl.h linux/if_ether.h signal.h string.h stdlib.h stdio.h sys/time.h unistd.h sys/stat.h sys/types.h errno.h linux/sockios.h ctype.h sys/socket.h pcap/pcap.h)
+
+dnl Check for typedefs, structures, and compiler characteristics.
+AC_HEADER_TIME
+
+dnl Checks for library functions.
+AC_OUTPUT(Makefile)
--- /dev/null
+#!/usr/bin/perl
+
+print "struct reg_des {
+ char *name;
+ unsigned int addr;
+} reg_des[] = {\n";
+while(<>) {
+ if (/define+ (\w+) .*IO_TYPECAST+.*DWORD.*\s+(\w+)/) {
+ print " \"$1\", $2,\n";
+ }
+}
+ print " NULL, 0
+};
+";
--- /dev/null
+common.o: common.c /usr/include/byteswap.h /usr/include/bits/byteswap.h \
+ conf.h /usr/include/termios.h /usr/include/features.h \
+ /usr/include/sys/cdefs.h /usr/include/gnu/stubs.h \
+ /usr/include/bits/termios.h /usr/include/sys/ttydefaults.h \
+ /usr/include/sys/ioctl.h /usr/include/bits/ioctls.h \
+ /usr/include/asm/ioctls.h /usr/include/asm-i486/ioctls.h \
+ /usr/include/asm/ioctl.h /usr/include/asm-i486/ioctl.h \
+ /usr/include/asm-generic/ioctl.h /usr/include/bits/ioctl-types.h \
+ /usr/include/sys/types.h /usr/include/bits/types.h \
+ /usr/include/bits/wordsize.h \
+ /usr/lib/gcc/i486-linux-gnu/4.1.2/include/stddef.h \
+ /usr/include/bits/typesizes.h /usr/include/time.h /usr/include/endian.h \
+ /usr/include/bits/endian.h /usr/include/sys/select.h \
+ /usr/include/bits/select.h /usr/include/bits/sigset.h \
+ /usr/include/bits/time.h /usr/include/sys/sysmacros.h \
+ /usr/include/bits/pthreadtypes.h /usr/include/bits/sched.h \
+ /usr/include/ctype.h /usr/include/sys/socket.h /usr/include/sys/uio.h \
+ /usr/include/bits/uio.h /usr/include/bits/socket.h \
+ /usr/lib/gcc/i486-linux-gnu/4.1.2/include/limits.h \
+ /usr/lib/gcc/i486-linux-gnu/4.1.2/include/syslimits.h \
+ /usr/include/limits.h /usr/include/bits/posix1_lim.h \
+ /usr/include/bits/local_lim.h /usr/include/linux/limits.h \
+ /usr/include/bits/posix2_lim.h /usr/include/bits/sockaddr.h \
+ /usr/include/asm/socket.h /usr/include/asm-i486/socket.h \
+ /usr/include/asm/sockios.h /usr/include/asm-i486/sockios.h \
+ /usr/include/netinet/in.h /usr/include/stdint.h \
+ /usr/include/bits/wchar.h /usr/include/bits/in.h /usr/include/net/if.h \
+ /usr/include/netinet/in_systm.h /usr/include/netinet/ip.h \
+ /usr/include/netinet/udp.h /usr/include/netinet/tcp.h \
+ /usr/include/netdb.h /usr/include/rpc/netdb.h /usr/include/bits/netdb.h \
+ /usr/include/arpa/inet.h /usr/include/fcntl.h /usr/include/bits/fcntl.h \
+ /usr/include/linux/if_ether.h /usr/include/linux/types.h \
+ /usr/include/linux/posix_types.h /usr/include/linux/stddef.h \
+ /usr/include/linux/compiler.h \
+ /usr/lib/gcc/i486-linux-gnu/4.1.2/include/asm/posix_types.h \
+ /usr/include/asm/posix_types.h /usr/include/asm-i486/posix_types.h \
+ /usr/include/asm/types.h /usr/include/asm-i486/types.h \
+ /usr/include/signal.h /usr/include/bits/signum.h \
+ /usr/include/bits/siginfo.h /usr/include/bits/sigaction.h \
+ /usr/include/bits/sigcontext.h /usr/include/asm/sigcontext.h \
+ /usr/include/asm-i486/sigcontext.h /usr/include/bits/sigstack.h \
+ /usr/include/bits/sigthread.h /usr/include/string.h \
+ /usr/include/bits/string.h /usr/include/bits/string2.h \
+ /usr/include/stdlib.h /usr/include/alloca.h /usr/include/stdio.h \
+ /usr/include/libio.h /usr/include/_G_config.h /usr/include/wchar.h \
+ /usr/include/gconv.h /usr/lib/gcc/i486-linux-gnu/4.1.2/include/stdarg.h \
+ /usr/include/bits/stdio_lim.h /usr/include/bits/sys_errlist.h \
+ /usr/include/bits/stdio.h /usr/include/unistd.h \
+ /usr/include/bits/posix_opt.h /usr/include/bits/confname.h \
+ /usr/include/getopt.h /usr/include/sys/stat.h /usr/include/bits/stat.h \
+ /usr/include/errno.h /usr/include/bits/errno.h \
+ /usr/include/linux/errno.h /usr/include/asm/errno.h \
+ /usr/include/asm-i486/errno.h /usr/include/asm-generic/errno.h \
+ /usr/include/asm-generic/errno-base.h /usr/include/linux/sockios.h \
+ /usr/include/sys/time.h ../cbl/src/e100boot.h ../cbl/src/compiler.h \
+ ../libpcap-0.4/pcap.h ../libpcap-0.4/net/bpf.h boot_images.h reg_des.h \
+ ../cbl/src/sv_addr_ag.h ../cbl/src/sv_addr.agh common.h serial.h \
+ network.h
--- /dev/null
+network.o: network.c /usr/include/stdio.h /usr/include/features.h \
+ /usr/include/sys/cdefs.h /usr/include/gnu/stubs.h \
+ /usr/lib/gcc/i486-linux-gnu/4.1.2/include/stddef.h \
+ /usr/include/bits/types.h /usr/include/bits/wordsize.h \
+ /usr/include/bits/typesizes.h /usr/include/libio.h \
+ /usr/include/_G_config.h /usr/include/wchar.h /usr/include/bits/wchar.h \
+ /usr/include/gconv.h /usr/lib/gcc/i486-linux-gnu/4.1.2/include/stdarg.h \
+ /usr/include/bits/stdio_lim.h /usr/include/bits/sys_errlist.h \
+ /usr/include/bits/stdio.h ../libpcap-0.4/pcap.h \
+ /usr/include/sys/types.h /usr/include/time.h /usr/include/endian.h \
+ /usr/include/bits/endian.h /usr/include/sys/select.h \
+ /usr/include/bits/select.h /usr/include/bits/sigset.h \
+ /usr/include/bits/time.h /usr/include/sys/sysmacros.h \
+ /usr/include/bits/pthreadtypes.h /usr/include/bits/sched.h \
+ /usr/include/sys/time.h ../libpcap-0.4/net/bpf.h conf.h \
+ /usr/include/termios.h /usr/include/bits/termios.h \
+ /usr/include/sys/ttydefaults.h /usr/include/sys/ioctl.h \
+ /usr/include/bits/ioctls.h /usr/include/asm/ioctls.h \
+ /usr/include/asm-i486/ioctls.h /usr/include/asm/ioctl.h \
+ /usr/include/asm-i486/ioctl.h /usr/include/asm-generic/ioctl.h \
+ /usr/include/bits/ioctl-types.h /usr/include/ctype.h \
+ /usr/include/sys/socket.h /usr/include/sys/uio.h \
+ /usr/include/bits/uio.h /usr/include/bits/socket.h \
+ /usr/lib/gcc/i486-linux-gnu/4.1.2/include/limits.h \
+ /usr/lib/gcc/i486-linux-gnu/4.1.2/include/syslimits.h \
+ /usr/include/limits.h /usr/include/bits/posix1_lim.h \
+ /usr/include/bits/local_lim.h /usr/include/linux/limits.h \
+ /usr/include/bits/posix2_lim.h /usr/include/bits/sockaddr.h \
+ /usr/include/asm/socket.h /usr/include/asm-i486/socket.h \
+ /usr/include/asm/sockios.h /usr/include/asm-i486/sockios.h \
+ /usr/include/netinet/in.h /usr/include/stdint.h /usr/include/bits/in.h \
+ /usr/include/bits/byteswap.h /usr/include/net/if.h \
+ /usr/include/netinet/in_systm.h /usr/include/netinet/ip.h \
+ /usr/include/netinet/udp.h /usr/include/netinet/tcp.h \
+ /usr/include/netdb.h /usr/include/rpc/netdb.h /usr/include/bits/netdb.h \
+ /usr/include/arpa/inet.h /usr/include/fcntl.h /usr/include/bits/fcntl.h \
+ /usr/include/linux/if_ether.h /usr/include/linux/types.h \
+ /usr/include/linux/posix_types.h /usr/include/linux/stddef.h \
+ /usr/include/linux/compiler.h \
+ /usr/lib/gcc/i486-linux-gnu/4.1.2/include/asm/posix_types.h \
+ /usr/include/asm/posix_types.h /usr/include/asm-i486/posix_types.h \
+ /usr/include/asm/types.h /usr/include/asm-i486/types.h \
+ /usr/include/signal.h /usr/include/bits/signum.h \
+ /usr/include/bits/siginfo.h /usr/include/bits/sigaction.h \
+ /usr/include/bits/sigcontext.h /usr/include/asm/sigcontext.h \
+ /usr/include/asm-i486/sigcontext.h /usr/include/bits/sigstack.h \
+ /usr/include/bits/sigthread.h /usr/include/string.h \
+ /usr/include/bits/string.h /usr/include/bits/string2.h \
+ /usr/include/stdlib.h /usr/include/alloca.h /usr/include/unistd.h \
+ /usr/include/bits/posix_opt.h /usr/include/bits/confname.h \
+ /usr/include/getopt.h /usr/include/sys/stat.h /usr/include/bits/stat.h \
+ /usr/include/errno.h /usr/include/bits/errno.h \
+ /usr/include/linux/errno.h /usr/include/asm/errno.h \
+ /usr/include/asm-i486/errno.h /usr/include/asm-generic/errno.h \
+ /usr/include/asm-generic/errno-base.h /usr/include/linux/sockios.h \
+ ../cbl/src/e100boot.h ../cbl/src/compiler.h common.h network.h
--- /dev/null
+serial.o: serial.c conf.h /usr/include/termios.h /usr/include/features.h \
+ /usr/include/sys/cdefs.h /usr/include/gnu/stubs.h \
+ /usr/include/bits/termios.h /usr/include/sys/ttydefaults.h \
+ /usr/include/sys/ioctl.h /usr/include/bits/ioctls.h \
+ /usr/include/asm/ioctls.h /usr/include/asm-i486/ioctls.h \
+ /usr/include/asm/ioctl.h /usr/include/asm-i486/ioctl.h \
+ /usr/include/asm-generic/ioctl.h /usr/include/bits/ioctl-types.h \
+ /usr/include/sys/types.h /usr/include/bits/types.h \
+ /usr/include/bits/wordsize.h \
+ /usr/lib/gcc/i486-linux-gnu/4.1.2/include/stddef.h \
+ /usr/include/bits/typesizes.h /usr/include/time.h /usr/include/endian.h \
+ /usr/include/bits/endian.h /usr/include/sys/select.h \
+ /usr/include/bits/select.h /usr/include/bits/sigset.h \
+ /usr/include/bits/time.h /usr/include/sys/sysmacros.h \
+ /usr/include/bits/pthreadtypes.h /usr/include/bits/sched.h \
+ /usr/include/ctype.h /usr/include/sys/socket.h /usr/include/sys/uio.h \
+ /usr/include/bits/uio.h /usr/include/bits/socket.h \
+ /usr/lib/gcc/i486-linux-gnu/4.1.2/include/limits.h \
+ /usr/lib/gcc/i486-linux-gnu/4.1.2/include/syslimits.h \
+ /usr/include/limits.h /usr/include/bits/posix1_lim.h \
+ /usr/include/bits/local_lim.h /usr/include/linux/limits.h \
+ /usr/include/bits/posix2_lim.h /usr/include/bits/sockaddr.h \
+ /usr/include/asm/socket.h /usr/include/asm-i486/socket.h \
+ /usr/include/asm/sockios.h /usr/include/asm-i486/sockios.h \
+ /usr/include/netinet/in.h /usr/include/stdint.h \
+ /usr/include/bits/wchar.h /usr/include/bits/in.h \
+ /usr/include/bits/byteswap.h /usr/include/net/if.h \
+ /usr/include/netinet/in_systm.h /usr/include/netinet/ip.h \
+ /usr/include/netinet/udp.h /usr/include/netinet/tcp.h \
+ /usr/include/netdb.h /usr/include/rpc/netdb.h /usr/include/bits/netdb.h \
+ /usr/include/arpa/inet.h /usr/include/fcntl.h /usr/include/bits/fcntl.h \
+ /usr/include/linux/if_ether.h /usr/include/linux/types.h \
+ /usr/include/linux/posix_types.h /usr/include/linux/stddef.h \
+ /usr/include/linux/compiler.h \
+ /usr/lib/gcc/i486-linux-gnu/4.1.2/include/asm/posix_types.h \
+ /usr/include/asm/posix_types.h /usr/include/asm-i486/posix_types.h \
+ /usr/include/asm/types.h /usr/include/asm-i486/types.h \
+ /usr/include/signal.h /usr/include/bits/signum.h \
+ /usr/include/bits/siginfo.h /usr/include/bits/sigaction.h \
+ /usr/include/bits/sigcontext.h /usr/include/asm/sigcontext.h \
+ /usr/include/asm-i486/sigcontext.h /usr/include/bits/sigstack.h \
+ /usr/include/bits/sigthread.h /usr/include/string.h \
+ /usr/include/bits/string.h /usr/include/bits/string2.h \
+ /usr/include/stdlib.h /usr/include/alloca.h /usr/include/stdio.h \
+ /usr/include/libio.h /usr/include/_G_config.h /usr/include/wchar.h \
+ /usr/include/gconv.h /usr/lib/gcc/i486-linux-gnu/4.1.2/include/stdarg.h \
+ /usr/include/bits/stdio_lim.h /usr/include/bits/sys_errlist.h \
+ /usr/include/bits/stdio.h /usr/include/unistd.h \
+ /usr/include/bits/posix_opt.h /usr/include/bits/confname.h \
+ /usr/include/getopt.h /usr/include/sys/stat.h /usr/include/bits/stat.h \
+ /usr/include/errno.h /usr/include/bits/errno.h \
+ /usr/include/linux/errno.h /usr/include/asm/errno.h \
+ /usr/include/asm-i486/errno.h /usr/include/asm-generic/errno.h \
+ /usr/include/asm-generic/errno-base.h /usr/include/linux/sockios.h \
+ /usr/include/sys/time.h ../cbl/src/e100boot.h ../cbl/src/compiler.h \
+ serial.h common.h
--- /dev/null
+
+/* cconv 1.2 12/16/97, Copyright (C) 1997, Axis Communications AB */
+
+const char net_ima[] =
+{
+ '\x0f', '\x05', '\x0f', '\x05', '\x6f', '\xee', '\x00', '\x1f',
+ '\x00', '\x38', '\x3f', '\x0d', '\x08', '\x01', '\x00', '\x38',
+ '\x78', '\x56', '\x34', '\x12', '\x21', '\x43', '\x65', '\x87',
+ '\x6f', '\xde', '\x20', '\x00', '\x00', '\xb0', '\x5f', '\x9c',
+ '\x65', '\x6f', '\xed', '\x9b', '\x5f', '\x9c', '\x25', '\x2f',
+ '\x7f', '\x0d', '\x80', '\x18', '\x00', '\x38', '\xe9', '\x9b',
+ '\xed', '\x9b', '\x3f', '\x0d', '\x28', '\x01', '\x00', '\x38',
+ '\xfc', '\xe1', '\x7e', '\xbe', '\x7e', '\x92', '\x7f', '\x0d',
+ '\x31', '\x00', '\x00', '\xb0', '\xc9', '\x9b', '\x7f', '\x0d',
+ '\x30', '\x00', '\x00', '\xb0', '\x70', '\x0a', '\x7f', '\x92',
+ '\x7f', '\x0d', '\x80', '\x18', '\x00', '\x38', '\xc9', '\x9b',
+ '\x7f', '\x0d', '\x39', '\x00', '\x00', '\xb0', '\xc9', '\x9b',
+ '\x7f', '\x0d', '\x38', '\x00', '\x00', '\xb0', '\xc9', '\x9b',
+ '\x7f', '\x0d', '\x22', '\x1d', '\x00', '\x38', '\x70', '\x8a',
+ '\x6f', '\x9e', '\x20', '\x00', '\x00', '\xb0', '\x69', '\x9a',
+ '\x79', '\x67', '\x7f', '\x0d', '\xd6', '\x1c', '\x00', '\x38',
+ '\xe9', '\x9b', '\x6f', '\x9e', '\x22', '\x00', '\x00', '\xb0',
+ '\x59', '\x9a', '\x59', '\x94', '\x7f', '\x0d', '\x3e', '\x1d',
+ '\x00', '\x38', '\xe9', '\x9b', '\x6f', '\x9e', '\x04', '\x00',
+ '\x00', '\xb0', '\x69', '\x9a', '\x06', '\x93', '\xe1', '\x93',
+ '\x81', '\x92', '\x7f', '\x0d', '\x26', '\x1d', '\x00', '\x38',
+ '\xc9', '\x9b', '\x7f', '\x0d', '\xe8', '\x1c', '\x00', '\x38',
+ '\x70', '\x4a', '\x3f', '\xbd', '\x68', '\x02', '\x00', '\x38',
+ '\x3f', '\xbd', '\x70', '\x04', '\x00', '\x38', '\x3f', '\xbd',
+ '\x0c', '\x02', '\x00', '\x38', '\x6a', '\xa6', '\xf7', '\x30',
+ '\x0f', '\x05', '\x6f', '\x9e', '\x00', '\x01', '\x00', '\x38',
+ '\x69', '\x9a', '\x7f', '\x0d', '\x22', '\x1d', '\x00', '\x38',
+ '\xe9', '\x9a', '\x24', '\x80', '\x0f', '\x05', '\x6f', '\x9e',
+ '\x26', '\x1d', '\x00', '\x38', '\x49', '\x9a', '\xcf', '\x9e',
+ '\x01', '\x00', '\xd3', '\x20', '\x0f', '\x05', '\x6f', '\xde',
+ '\xd4', '\x01', '\x00', '\xb0', '\x4d', '\x9a', '\x38', '\x93',
+ '\x41', '\x93', '\xcd', '\x9b', '\xc1', '\xe0', '\x0f', '\x05',
+ '\x4f', '\x9e', '\x55', '\x00', '\x7f', '\x0d', '\x80', '\x18',
+ '\x00', '\x38', '\xc9', '\x9b', '\x7f', '\x0d', '\x30', '\x00',
+ '\x00', '\xb0', '\xc9', '\x9b', '\x3e', '\xbe', '\x3f', '\x0d',
+ '\xc0', '\x05', '\x00', '\x38', '\xfc', '\xe1', '\x7e', '\xbe',
+ '\x3f', '\xbd', '\xa2', '\x03', '\x00', '\x38', '\x6a', '\xa6',
+ '\x16', '\x20', '\x41', '\x92', '\x3f', '\xbd', '\x34', '\x02',
+ '\x00', '\x38', '\x6a', '\xa6', '\x0a', '\x30', '\x79', '\x86',
+ '\x3f', '\xbd', '\x70', '\x04', '\x00', '\x38', '\x79', '\x86',
+ '\x69', '\xa6', '\x3e', '\x0d', '\x84', '\xe2', '\x6f', '\x9e',
+ '\x22', '\x00', '\x00', '\xb0', '\x59', '\x9a', '\x59', '\x94',
+ '\xee', '\x9b', '\x6f', '\xce', '\x3e', '\x1d', '\x00', '\x38',
+ '\x6c', '\x9a', '\x6e', '\xda', '\xad', '\x96', '\xb9', '\x96',
+ '\xdf', '\x9c', '\x80', '\x25', '\x0a', '\xd0', '\x0f', '\x05',
+ '\x6e', '\x9a', '\xec', '\x9b', '\x04', '\xe0', '\x41', '\xa2',
+ '\x7a', '\x86', '\x7f', '\xb6', '\x04', '\xe2', '\x00', '\x00',
+ '\x88', '\xe2', '\xfe', '\x1b', '\x6f', '\x9e', '\x8c', '\x00',
+ '\x00', '\xb0', '\x79', '\x8a', '\x69', '\x9a', '\x7f', '\x0d',
+ '\x90', '\x00', '\x00', '\xb0', '\xe9', '\x9b', '\x6f', '\x9e',
+ '\x01', '\x40', '\x8c', '\x00', '\x7f', '\x0d', '\x80', '\x00',
+ '\x00', '\xb0', '\xe9', '\x9b', '\x6f', '\xce', '\x01', '\x00',
+ '\x01', '\x40', '\x7f', '\x0d', '\x84', '\x00', '\x00', '\xb0',
+ '\xec', '\xcb', '\x6f', '\xde', '\x8c', '\x00', '\x01', '\x00',
+ '\x7f', '\x0d', '\x88', '\x00', '\x00', '\xb0', '\xed', '\xdb',
+ '\x41', '\x12', '\x7f', '\x0d', '\x94', '\x00', '\x00', '\xb0',
+ '\xe1', '\x1b', '\x7f', '\x0d', '\xa0', '\x00', '\x00', '\xb0',
+ '\x70', '\x8a', '\x5f', '\x9c', '\x02', '\x01', '\x7f', '\x0d',
+ '\x9c', '\x00', '\x00', '\xb0', '\xe9', '\x9b', '\x43', '\xc2',
+ '\x7f', '\x0d', '\x98', '\x00', '\x00', '\xb0', '\xec', '\xcb',
+ '\x44', '\xd2', '\x7f', '\x0d', '\xd0', '\x01', '\x00', '\xb0',
+ '\xcd', '\xdb', '\x6f', '\x0e', '\xd4', '\x01', '\x00', '\xb0',
+ '\xc0', '\xdb', '\x6f', '\xbe', '\xa4', '\x1c', '\x00', '\x38',
+ '\x6b', '\x96', '\x4f', '\xcc', '\x26', '\x00', '\xd9', '\xcf',
+ '\x79', '\x4a', '\x6f', '\xde', '\xda', '\x1c', '\x00', '\x38',
+ '\x04', '\xb1', '\xed', '\xdb', '\x6f', '\x9e', '\xfc', '\x1c',
+ '\x00', '\x38', '\x08', '\xb1', '\xe9', '\x9b', '\x6d', '\x96',
+ '\x5f', '\xce', '\xdc', '\x05', '\xd9', '\xcf', '\x47', '\xc2',
+ '\xd9', '\xcb', '\x6f', '\x9e', '\x04', '\x01', '\x00', '\x38',
+ '\x69', '\x9a', '\x08', '\xd1', '\xe9', '\x9b', '\x6f', '\xce',
+ '\xba', '\x1c', '\x00', '\x38', '\x6f', '\x9e', '\x00', '\x8c',
+ '\x40', '\x02', '\x79', '\x67', '\x6c', '\xd6', '\xed', '\x9f',
+ '\x5f', '\x9e', '\x00', '\x01', '\x79', '\x27', '\xdd', '\x9b',
+ '\x6c', '\xa6', '\x86', '\xa2', '\x4f', '\x9c', '\x40', '\x00',
+ '\x79', '\x27', '\x06', '\xc1', '\xd9', '\x9b', '\x6f', '\x9e',
+ '\x00', '\x03', '\xaa', '\xaa', '\x79', '\x67', '\x08', '\xc1',
+ '\xe9', '\x9b', '\x6f', '\x9e', '\x56', '\x88', '\x8c', '\x40',
+ '\x79', '\x67', '\x0c', '\xc1', '\xe9', '\x9b', '\x7e', '\x92',
+ '\x79', '\x67', '\x10', '\xc1', '\xe9', '\x9b', '\x14', '\xc1',
+ '\x70', '\x8a', '\x18', '\xc1', '\x70', '\x8a', '\x6f', '\xde',
+ '\x2e', '\x1d', '\x00', '\x38', '\x6d', '\x96', '\x4f', '\xcc',
+ '\x26', '\x00', '\xd9', '\xcf', '\x47', '\xc2', '\xd9', '\xcb',
+ '\x08', '\xd1', '\xea', '\xab', '\x7f', '\x0d', '\xea', '\x1c',
+ '\x00', '\x38', '\x70', '\x0a', '\x7f', '\x0d', '\x2a', '\x1d',
+ '\x00', '\x38', '\x70', '\x8a', '\x7f', '\x0d', '\xa4', '\x01',
+ '\x00', '\xb0', '\xeb', '\xbb', '\xc0', '\x1b', '\x7f', '\xb6',
+ '\xbe', '\x1f', '\xfc', '\xe1', '\x7e', '\xbe', '\x84', '\xe2',
+ '\xfe', '\x0b', '\x6f', '\x0e', '\xda', '\x1c', '\x00', '\x38',
+ '\x0e', '\x01', '\x5d', '\x9e', '\x81', '\x93', '\xb4', '\xa0',
+ '\x7a', '\x86', '\x7d', '\x4a', '\x6f', '\x9e', '\xa4', '\x1c',
+ '\x00', '\x38', '\x7f', '\x0d', '\xa4', '\x01', '\x00', '\xb0',
+ '\xe9', '\x9b', '\x6f', '\xde', '\x16', '\x1d', '\x00', '\x38',
+ '\x6d', '\xda', '\x7d', '\x67', '\x6f', '\x9e', '\x2a', '\x1d',
+ '\x00', '\x38', '\x69', '\x9a', '\x01', '\x92', '\xe9', '\xd6',
+ '\x8a', '\x20', '\x41', '\xa2', '\x41', '\x92', '\x7f', '\x0d',
+ '\x26', '\x1d', '\x00', '\x38', '\xc9', '\x9b', '\x6f', '\x9e',
+ '\x20', '\x00', '\x00', '\xb0', '\x69', '\x9a', '\xf0', '\x93',
+ '\x7f', '\x0d', '\x3e', '\x1d', '\x00', '\x38', '\xe9', '\x9b',
+ '\x6f', '\xae', '\x22', '\x1d', '\x00', '\x38', '\x0c', '\x01',
+ '\x5b', '\xb8', '\x6a', '\xda', '\x2b', '\xd6', '\x84', '\xd2',
+ '\xea', '\xdb', '\x08', '\x01', '\x6c', '\x9e', '\x2b', '\x96',
+ '\x84', '\x92', '\xec', '\x9b', '\x60', '\xc6', '\x6f', '\xbe',
+ '\x00', '\x01', '\x00', '\x38', '\x6b', '\x9a', '\xad', '\x96',
+ '\x84', '\x92', '\xdf', '\x9c', '\xdb', '\x05', '\x0a', '\x90',
+ '\x0f', '\x05', '\x6b', '\x9a', '\x9a', '\x9a', '\x06', '\xe0',
+ '\x04', '\x92', '\x5f', '\x9e', '\xdc', '\x05', '\xdc', '\x9b',
+ '\x6f', '\xce', '\xda', '\x1c', '\x00', '\x38', '\x5c', '\xda',
+ '\x5d', '\x94', '\x26', '\x92', '\xcf', '\x9c', '\x3f', '\x00',
+ '\x04', '\x90', '\x0f', '\x05', '\x5a', '\xd2', '\xdc', '\xdb',
+ '\x6f', '\xde', '\x2a', '\x1d', '\x00', '\x38', '\x6d', '\x9a',
+ '\x01', '\x92', '\xed', '\x9b', '\x3f', '\xbd', '\x70', '\x04',
+ '\x00', '\x38', '\x41', '\xa2', '\xbe', '\x0f', '\x3e', '\x0d',
+ '\x6f', '\x9e', '\xea', '\x1c', '\x00', '\x38', '\x89', '\x0b',
+ '\x44', '\x20', '\x41', '\xc2', '\xc9', '\xcb', '\x6f', '\x9e',
+ '\x04', '\x00', '\x00', '\xb0', '\x69', '\x9a', '\x06', '\x93',
+ '\xc4', '\x92', '\x1e', '\x20', '\x0f', '\x05', '\x6f', '\x9e',
+ '\xb4', '\x1c', '\x00', '\x38', '\x6f', '\xde', '\xdc', '\x00',
+ '\x00', '\x38', '\x6d', '\xda', '\xe9', '\xdf', '\x6f', '\xce',
+ '\xe0', '\x00', '\x00', '\x38', '\x5c', '\xca', '\x16', '\xe0',
+ '\xd9', '\xcb', '\x6f', '\xde', '\xb4', '\x1c', '\x00', '\x38',
+ '\x6f', '\x9e', '\x02', '\x1d', '\x00', '\x38', '\x69', '\xce',
+ '\xed', '\xcf', '\x59', '\x9a', '\xdd', '\x9b', '\x6f', '\xde',
+ '\xb4', '\x1c', '\x00', '\x38', '\x6f', '\x9e', '\x2a', '\x1d',
+ '\x00', '\x38', '\x69', '\x9a', '\x79', '\x67', '\x1a', '\xd1',
+ '\xe9', '\x9b', '\x42', '\x92', '\x79', '\x67', '\x1e', '\xd1',
+ '\xe9', '\x9b', '\x6f', '\x9e', '\x2e', '\x1d', '\x00', '\x38',
+ '\x47', '\xd2', '\x02', '\x91', '\xdd', '\xdb', '\x4f', '\xcc',
+ '\x26', '\x00', '\xd9', '\xcb', '\x3f', '\x0d', '\xf2', '\x04',
+ '\x00', '\x38', '\x6f', '\x9e', '\x2e', '\x1d', '\x00', '\x38',
+ '\x7f', '\x0d', '\xa0', '\x01', '\x00', '\xb0', '\xe9', '\x9b',
+ '\x41', '\x92', '\x7f', '\x0d', '\xd0', '\x01', '\x00', '\xb0',
+ '\xc9', '\x9b', '\x6f', '\x9e', '\xa0', '\x01', '\x00', '\xb0',
+ '\x69', '\x9a', '\xf7', '\x20', '\x0f', '\x05', '\x7f', '\xb6',
+ '\x0f', '\x05', '\x6f', '\x9e', '\x2e', '\x1d', '\x00', '\x38',
+ '\x6f', '\xce', '\xec', '\x1c', '\x00', '\x38', '\x04', '\x91',
+ '\xec', '\xcb', '\x02', '\x91', '\x70', '\x4a', '\x8a', '\x0b',
+ '\x0c', '\x30', '\x7d', '\x86', '\x01', '\xd2', '\x4a', '\xd5',
+ '\x80', '\x0b', '\xf9', '\x20', '\x0f', '\x05', '\x7f', '\x0d',
+ '\xd2', '\x1c', '\x00', '\x38', '\x70', '\x8a', '\x6f', '\x9e',
+ '\xec', '\x1c', '\x00', '\x38', '\x47', '\xc2', '\x02', '\x91',
+ '\xdc', '\xcb', '\x08', '\x91', '\xea', '\xab', '\x01', '\xd2',
+ '\xd9', '\xdb', '\x3f', '\x0d', '\xf2', '\x04', '\x00', '\x38',
+ '\xfc', '\xe1', '\x7e', '\xbe', '\x84', '\xe2', '\xee', '\xab',
+ '\x6f', '\x9e', '\x2e', '\x1d', '\x00', '\x38', '\x6f', '\xde',
+ '\xec', '\x1c', '\x00', '\x38', '\x04', '\x91', '\xed', '\xdb',
+ '\x02', '\x91', '\x70', '\x4a', '\x4b', '\xb6', '\x04', '\x20',
+ '\x46', '\x92', '\x45', '\x92', '\x79', '\x67', '\x7f', '\x0d',
+ '\xd2', '\x1c', '\x00', '\x38', '\xe9', '\x9b', '\x79', '\x86',
+ '\x01', '\x92', '\xdf', '\x9c', '\x00', '\x40', '\xf9', '\x20',
+ '\x0f', '\x05', '\x6e', '\x9a', '\x79', '\x67', '\xee', '\x9b',
+ '\x6f', '\x9e', '\xec', '\x1c', '\x00', '\x38', '\x47', '\xd2',
+ '\x02', '\x91', '\xdd', '\xdb', '\x08', '\x91', '\xee', '\xeb',
+ '\x44', '\xd2', '\xd9', '\xdb', '\x3f', '\xbd', '\xf2', '\x04',
+ '\x00', '\x38', '\x04', '\xe2', '\x3e', '\x0d', '\x00', '\x00',
+ '\xfc', '\xe1', '\x7e', '\xbe', '\x84', '\xe2', '\xfe', '\x0b',
+ '\x4f', '\x9e', '\xaa', '\xff', '\x7f', '\x0d', '\x80', '\x18',
+ '\x00', '\x38', '\xc9', '\x9b', '\x7f', '\x0d', '\x30', '\x00',
+ '\x00', '\xb0', '\xc9', '\x9b', '\x6f', '\x0e', '\x1a', '\x05',
+ '\x00', '\x38', '\x6f', '\xae', '\x84', '\x18', '\x00', '\x38',
+ '\xb0', '\xb9', '\x6f', '\xae', '\xd6', '\x1c', '\x00', '\x38',
+ '\x6a', '\xaa', '\x7a', '\x67', '\x41', '\xb2', '\x3f', '\xbd',
+ '\x60', '\x05', '\x00', '\x38', '\x6f', '\xae', '\x50', '\x1c',
+ '\x00', '\x38', '\xb0', '\xb9', '\x6f', '\x9e', '\xf0', '\x00',
+ '\x00', '\x38', '\xef', '\x9e', '\x96', '\x1c', '\x00', '\x38',
+ '\x0e', '\x30', '\x70', '\x86', '\x09', '\x0c', '\xef', '\x9e',
+ '\x96', '\x1c', '\x00', '\x38', '\xf7', '\x20', '\x0f', '\x05',
+ '\x6f', '\xae', '\x96', '\x18', '\x00', '\x38', '\x3f', '\xbd',
+ '\x1a', '\x05', '\x00', '\x38', '\x60', '\xa6', '\x41', '\xb2',
+ '\x3f', '\xbd', '\x60', '\x05', '\x00', '\x38', '\x3f', '\xbd',
+ '\x88', '\x06', '\x00', '\x38', '\x3f', '\x0d', '\x28', '\x01',
+ '\x00', '\x38', '\xbe', '\x0f', '\x3e', '\x0d', '\x84', '\xe2',
+ '\x4f', '\x9e', '\x55', '\x00', '\x7f', '\x0d', '\x80', '\x18',
+ '\x00', '\x38', '\xc9', '\x9b', '\x7f', '\x0d', '\x30', '\x00',
+ '\x00', '\xb0', '\xc9', '\x9b', '\x6f', '\x9e', '\x30', '\x00',
+ '\x00', '\xb0', '\x69', '\xda', '\x7d', '\x87', '\x7f', '\x0d',
+ '\x80', '\x18', '\x00', '\x38', '\xcd', '\xdb', '\xc9', '\xdb',
+ '\x7e', '\x8a', '\x6e', '\x9a', '\xef', '\x9e', '\x80', '\x84',
+ '\x1e', '\x00', '\xe1', '\x30', '\x0f', '\x05', '\x6e', '\x9a',
+ '\x01', '\x92', '\xee', '\x9b', '\xed', '\xe0', '\x0f', '\x05',
+ '\xfc', '\xe1', '\x7e', '\xbe', '\x84', '\xe2', '\xfe', '\x0b',
+ '\x6f', '\x0e', '\x1a', '\x05', '\x00', '\x38', '\x6f', '\xae',
+ '\xb2', '\x18', '\x00', '\x38', '\xb0', '\xb9', '\x3f', '\xbd',
+ '\x70', '\x04', '\x00', '\x38', '\x6f', '\xae', '\x00', '\x1f',
+ '\x00', '\x38', '\x5f', '\xbc', '\xec', '\x01', '\x3f', '\xbd',
+ '\x06', '\x0a', '\x00', '\x38', '\x6f', '\xae', '\xcc', '\x18',
+ '\x00', '\x38', '\xb0', '\xb9', '\x3f', '\xbd', '\xcc', '\x06',
+ '\x00', '\x38', '\xbe', '\x0f', '\x3e', '\xbe', '\x3f', '\x0d',
+ '\x46', '\x06', '\x00', '\x38', '\xfc', '\xe1', '\x7e', '\xbe',
+ '\x98', '\xe2', '\xfe', '\x4b', '\x6f', '\xde', '\x00', '\x1f',
+ '\x00', '\x38', '\x6d', '\x9a', '\x79', '\x67', '\xed', '\x9f',
+ '\xef', '\xde', '\xec', '\x20', '\x00', '\x38', '\xf3', '\x20',
+ '\x0f', '\x05', '\x6f', '\x3e', '\x00', '\x1f', '\x00', '\x38',
+ '\xa3', '\x0b', '\xff', '\x3d', '\xfe', '\x02', '\x0f', '\x05',
+ '\x63', '\x9a', '\x81', '\x92', '\xcf', '\x9d', '\x0b', '\x00',
+ '\x5f', '\x95', '\x3f', '\xf8', '\x54', '\x02', '\x22', '\x01',
+ '\x18', '\x00', '\x62', '\x00', '\x90', '\x00', '\x96', '\x01',
+ '\xc8', '\x01', '\xe4', '\x00', '\x00', '\x02', '\xb8', '\x00',
+ '\x9a', '\x02', '\xce', '\x02', '\x6f', '\xae', '\xde', '\x18',
+ '\x00', '\x38', '\x3f', '\xbd', '\x1a', '\x05', '\x00', '\x38',
+ '\x6f', '\x0e', '\x60', '\x05', '\x00', '\x38', '\x04', '\x31',
+ '\x62', '\xae', '\x41', '\xb2', '\xb0', '\xb9', '\x08', '\x31',
+ '\x61', '\xae', '\x41', '\xb2', '\xb0', '\xb9', '\x6f', '\x0e',
+ '\x2a', '\x1d', '\x00', '\x38', '\x60', '\x9a', '\x81', '\x92',
+ '\xe0', '\x9b', '\x3f', '\xbd', '\x70', '\x04', '\x00', '\x38',
+ '\x60', '\x9a', '\x01', '\x92', '\xe0', '\x9b', '\x62', '\xaa',
+ '\x61', '\xba', '\x3f', '\xbd', '\x06', '\x0a', '\x00', '\x38',
+ '\xff', '\xed', '\x88', '\x02', '\x0c', '\x32', '\x6f', '\xae',
+ '\xec', '\x18', '\x00', '\x38', '\x3f', '\xbd', '\x1a', '\x05',
+ '\x00', '\x38', '\x6f', '\x0e', '\x60', '\x05', '\x00', '\x38',
+ '\x04', '\x31', '\x62', '\xae', '\x41', '\xb2', '\xb0', '\xb9',
+ '\x08', '\x31', '\x61', '\xae', '\x41', '\xb2', '\xb0', '\xb9',
+ '\x61', '\x1a', '\x72', '\x09', '\xe1', '\x1b', '\xff', '\xed',
+ '\x5a', '\x02', '\x0c', '\x32', '\x6f', '\xae', '\xfc', '\x18',
+ '\x00', '\x38', '\x3f', '\xbd', '\x1a', '\x05', '\x00', '\x38',
+ '\x6f', '\x1e', '\x60', '\x05', '\x00', '\x38', '\x04', '\x31',
+ '\x60', '\xae', '\x41', '\xb2', '\xb1', '\xb9', '\x60', '\xaa',
+ '\x6a', '\xaa', '\x41', '\xb2', '\xb1', '\xb9', '\xff', '\xed',
+ '\x32', '\x02', '\x08', '\x32', '\x6f', '\xae', '\x0c', '\x19',
+ '\x00', '\x38', '\x3f', '\xbd', '\x1a', '\x05', '\x00', '\x38',
+ '\x04', '\x31', '\x60', '\xae', '\x41', '\xb2', '\x3f', '\xbd',
+ '\x60', '\x05', '\x00', '\x38', '\x60', '\xaa', '\xff', '\x3d',
+ '\xc0', '\x01', '\x0f', '\x05', '\x81', '\xa2', '\xfd', '\x20',
+ '\x0f', '\x05', '\xff', '\xed', '\x06', '\x02', '\x08', '\x32',
+ '\x6f', '\x4e', '\x1a', '\x05', '\x00', '\x38', '\x6f', '\xae',
+ '\x1a', '\x19', '\x00', '\x38', '\xb4', '\xb9', '\x6f', '\x0e',
+ '\x60', '\x05', '\x00', '\x38', '\x04', '\x31', '\x62', '\xae',
+ '\x41', '\xb2', '\xb0', '\xb9', '\x08', '\x31', '\x61', '\xae',
+ '\x41', '\xb2', '\xb0', '\xb9', '\x62', '\x2a', '\x62', '\x2a',
+ '\xe1', '\x2a', '\xff', '\x3d', '\xb8', '\x01', '\x0f', '\x05',
+ '\x6f', '\xae', '\x28', '\x19', '\x00', '\x38', '\xb4', '\xb9',
+ '\xff', '\xed', '\xd0', '\x01', '\x0f', '\x05', '\x6f', '\x4e',
+ '\x1a', '\x05', '\x00', '\x38', '\x6f', '\xae', '\x38', '\x19',
+ '\x00', '\x38', '\xb4', '\xb9', '\x6f', '\x2e', '\x60', '\x05',
+ '\x00', '\x38', '\x04', '\x31', '\x61', '\xae', '\x41', '\xb2',
+ '\xb2', '\xb9', '\x08', '\x31', '\x60', '\xae', '\x41', '\xb2',
+ '\xb2', '\xb9', '\x61', '\xaa', '\x60', '\xba', '\x6e', '\xc6',
+ '\x14', '\xc2', '\x3f', '\xbd', '\x04', '\x0b', '\x00', '\x38',
+ '\x6a', '\xa6', '\x30', '\x20', '\x0f', '\x05', '\x6f', '\xae',
+ '\x44', '\x19', '\x00', '\x38', '\xb4', '\xb9', '\x14', '\xe1',
+ '\x6a', '\xaa', '\x41', '\xb2', '\xb2', '\xb9', '\x14', '\xe1',
+ '\x6a', '\xaa', '\x6a', '\xb6', '\x0f', '\xbc', '\x40', '\x00',
+ '\x8f', '\xac', '\x40', '\x00', '\x3c', '\xa3', '\x3c', '\xb3',
+ '\x3f', '\xbd', '\xac', '\x0b', '\x00', '\x38', '\xff', '\xed',
+ '\x6a', '\x01', '\x0f', '\x05', '\x6f', '\xae', '\x60', '\x19',
+ '\x00', '\x38', '\xb4', '\xb9', '\xff', '\xed', '\x54', '\x01',
+ '\x0c', '\x32', '\x6f', '\xae', '\x76', '\x19', '\x00', '\x38',
+ '\x3f', '\xbd', '\x1a', '\x05', '\x00', '\x38', '\x6f', '\x0e',
+ '\x60', '\x05', '\x00', '\x38', '\x04', '\x31', '\x62', '\xae',
+ '\x41', '\xb2', '\xb0', '\xb9', '\x08', '\x31', '\x61', '\xae',
+ '\x41', '\xb2', '\xb0', '\xb9', '\x62', '\xaa', '\x61', '\xba',
+ '\x3f', '\xbd', '\xac', '\x0b', '\x00', '\x38', '\xff', '\xed',
+ '\x22', '\x01', '\x0c', '\x32', '\x6f', '\xae', '\x82', '\x19',
+ '\x00', '\x38', '\x3f', '\xbd', '\x1a', '\x05', '\x00', '\x38',
+ '\x6f', '\x0e', '\x60', '\x05', '\x00', '\x38', '\x04', '\x31',
+ '\x62', '\xae', '\x41', '\xb2', '\xb0', '\xb9', '\x08', '\x31',
+ '\x61', '\xae', '\x41', '\xb2', '\xb0', '\xb9', '\x62', '\xaa',
+ '\xe1', '\xaa', '\xda', '\x90', '\x0f', '\x05', '\x7a', '\x0e',
+ '\x08', '\x31', '\xea', '\xaa', '\xf9', '\x80', '\x0f', '\x05',
+ '\xea', '\xe0', '\x0c', '\x32', '\x6f', '\xae', '\x8e', '\x19',
+ '\x00', '\x38', '\x3f', '\xbd', '\x1a', '\x05', '\x00', '\x38',
+ '\x6f', '\x0e', '\x60', '\x05', '\x00', '\x38', '\x04', '\x31',
+ '\x61', '\xae', '\x41', '\xb2', '\xb0', '\xb9', '\x08', '\x31',
+ '\x64', '\xae', '\x41', '\xb2', '\xb0', '\xb9', '\x0c', '\x31',
+ '\x62', '\xae', '\x41', '\xb2', '\xb0', '\xb9', '\x6f', '\x0e',
+ '\x4a', '\x15', '\x00', '\x38', '\x61', '\xaa', '\x64', '\xba',
+ '\x62', '\xca', '\xb0', '\xb9', '\x6a', '\xa6', '\xac', '\x30',
+ '\x10', '\x32', '\xc3', '\xa2', '\xae', '\x20', '\x7a', '\x86',
+ '\x62', '\xca', '\xef', '\xcd', '\x00', '\x00', '\x01', '\x00',
+ '\x64', '\xba', '\xb0', '\xb9', '\x9e', '\xe0', '\x0f', '\x05',
+ '\x6f', '\xde', '\xb4', '\x1c', '\x00', '\x38', '\x6d', '\x9a',
+ '\x7f', '\x0d', '\xc0', '\x01', '\x00', '\xb0', '\xe9', '\x9b',
+ '\x04', '\xd1', '\x59', '\x98', '\x7f', '\x0d', '\xc4', '\x01',
+ '\x00', '\xb0', '\xe9', '\x9b', '\x6f', '\x1e', '\x1a', '\x05',
+ '\x00', '\x38', '\x6f', '\xae', '\x96', '\x19', '\x00', '\x38',
+ '\xb1', '\xb9', '\x04', '\x31', '\x60', '\xae', '\x41', '\xb2',
+ '\x3f', '\xbd', '\x60', '\x05', '\x00', '\x38', '\x6f', '\xae',
+ '\x9e', '\x19', '\x00', '\x38', '\xb1', '\xb9', '\x60', '\x9a',
+ '\xb9', '\x09', '\x50', '\xe0', '\x08', '\x32', '\x6f', '\xae',
+ '\x12', '\x19', '\x00', '\x38', '\x3f', '\xbd', '\x1a', '\x05',
+ '\x00', '\x38', '\x6f', '\x0e', '\x60', '\x05', '\x00', '\x38',
+ '\x04', '\x31', '\x61', '\xae', '\x41', '\xb2', '\xb0', '\xb9',
+ '\x08', '\x31', '\x62', '\xae', '\x41', '\xb2', '\xb0', '\xb9',
+ '\x61', '\x1a', '\x61', '\x9a', '\x08', '\x30', '\x81', '\x92',
+ '\xe1', '\x9b', '\x20', '\xe0', '\x62', '\x3a', '\x1c', '\xe0',
+ '\x0c', '\x32', '\x6f', '\xae', '\xa4', '\x19', '\x00', '\x38',
+ '\x3f', '\xbd', '\x1a', '\x05', '\x00', '\x38', '\x63', '\xaa',
+ '\x41', '\xb2', '\x3f', '\xbd', '\x60', '\x05', '\x00', '\x38',
+ '\x0a', '\xe0', '\x0f', '\x05', '\xa3', '\x0b', '\xff', '\x2d',
+ '\x06', '\xfd', '\x0f', '\x05', '\x6f', '\xae', '\x9e', '\x19',
+ '\x00', '\x38', '\x3f', '\xbd', '\x1a', '\x05', '\x00', '\x38',
+ '\xbe', '\x4f', '\x04', '\xe2', '\x3e', '\x0d', '\xfc', '\xe1',
+ '\x7e', '\xbe', '\x8c', '\xe2', '\xfe', '\x2b', '\x6a', '\x26',
+ '\x6b', '\x06', '\x7f', '\x0d', '\x22', '\x1d', '\x00', '\x38',
+ '\x70', '\x8a', '\x7f', '\x0d', '\x04', '\x01', '\x00', '\x38',
+ '\xea', '\xab', '\x6f', '\x9e', '\x26', '\x1d', '\x00', '\x38',
+ '\x49', '\x9a', '\xcf', '\x9e', '\x01', '\x00', '\x86', '\x20',
+ '\x0f', '\x05', '\x6f', '\xde', '\xda', '\x1c', '\x00', '\x38',
+ '\x08', '\xd1', '\xea', '\xab', '\x7f', '\x0d', '\x00', '\x01',
+ '\x00', '\x38', '\xeb', '\xbb', '\x6b', '\x96', '\x04', '\x92',
+ '\xdf', '\x9d', '\xdc', '\x05', '\xdd', '\x9b', '\x6f', '\x9e',
+ '\xa4', '\x01', '\x00', '\xb0', '\x69', '\xda', '\x6f', '\xde',
+ '\xa4', '\x1c', '\x00', '\x38', '\xe9', '\xdb', '\x6f', '\xde',
+ '\xd4', '\x01', '\x00', '\xb0', '\x4d', '\x9a', '\x38', '\x93',
+ '\x44', '\x93', '\xcd', '\x9b', '\x6f', '\xde', '\xd4', '\x01',
+ '\x00', '\xb0', '\x4d', '\x9a', '\x07', '\x93', '\xcf', '\x9e',
+ '\x04', '\x00', '\xf7', '\x30', '\x0f', '\x05', '\x4d', '\x9a',
+ '\x38', '\x93', '\x41', '\x93', '\xcd', '\x9b', '\x3f', '\xbd',
+ '\x0c', '\x02', '\x00', '\x38', '\x6a', '\xa6', '\xf7', '\x30',
+ '\x0f', '\x05', '\x6f', '\xce', '\x22', '\x1d', '\x00', '\x38',
+ '\xec', '\x0a', '\x10', '\x80', '\x0f', '\x05', '\x6f', '\xde',
+ '\xd4', '\x01', '\x00', '\xb0', '\x4d', '\x9a', '\x38', '\x93',
+ '\x41', '\x93', '\xcd', '\x9b', '\xec', '\x0a', '\xd7', '\x90',
+ '\x71', '\x86', '\x22', '\xe0', '\x62', '\x96', '\x7f', '\x0d',
+ '\x22', '\x1d', '\x00', '\x38', '\xeb', '\xba', '\x14', '\x80',
+ '\x71', '\x86', '\x3f', '\xbd', '\x0c', '\x02', '\x00', '\x38',
+ '\x7f', '\x0d', '\x22', '\x1d', '\x00', '\x38', '\xe0', '\x0a',
+ '\xf1', '\x90', '\x71', '\x86', '\x62', '\x96', '\x20', '\x96',
+ '\xe9', '\x26', '\x0e', '\x30', '\x62', '\xd6', '\x0d', '\x1c',
+ '\x62', '\x96', '\x20', '\x96', '\xe9', '\xd6', '\xf7', '\x20',
+ '\x0f', '\x05', '\x6f', '\xae', '\xb8', '\x19', '\x00', '\x38',
+ '\x3f', '\xbd', '\x1a', '\x05', '\x00', '\x38', '\x61', '\xa6',
+ '\x41', '\xb2', '\xbe', '\x2f', '\x3e', '\xbe', '\x3f', '\x0d',
+ '\x60', '\x05', '\x00', '\x38', '\xfc', '\xe1', '\x7e', '\xbe',
+ '\x8c', '\xe2', '\xfe', '\x2b', '\x6b', '\x06', '\x6c', '\x26',
+ '\xeb', '\xa6', '\x40', '\x00', '\x6a', '\xc6', '\xe0', '\xc6',
+ '\x32', '\x00', '\x71', '\x86', '\x6c', '\xb6', '\x6c', '\x96',
+ '\x79', '\x87', '\x61', '\xd6', '\xc3', '\xd3', '\xed', '\x97',
+ '\x49', '\xd6', '\xcb', '\x9b', '\x4b', '\x9a', '\xcd', '\x96',
+ '\x0c', '\x30', '\x7d', '\x87', '\x6f', '\xae', '\xce', '\x19',
+ '\x00', '\x38', '\x40', '\xe0', '\xe2', '\xbb', '\xcb', '\xdf',
+ '\x01', '\x12', '\xc4', '\x12', '\x06', '\x30', '\xe0', '\xb6',
+ '\xd7', '\x10', '\x6c', '\x96', '\x04', '\xc2', '\xe0', '\xc6',
+ '\xc5', '\x10', '\x0f', '\x05', '\xe0', '\xa6', '\x4e', '\x00',
+ '\x6a', '\xc6', '\xe0', '\xc6', '\x40', '\x00', '\x71', '\x86',
+ '\x6c', '\xa6', '\x61', '\x96', '\xc3', '\x93', '\x6c', '\xd6',
+ '\xe9', '\xd7', '\x4a', '\x9a', '\xcd', '\x96', '\x22', '\x30',
+ '\x01', '\x12', '\x81', '\x12', '\xe2', '\xab', '\x6f', '\xae',
+ '\xec', '\x19', '\x00', '\x38', '\x3f', '\xbd', '\x1a', '\x05',
+ '\x00', '\x38', '\x62', '\xaa', '\x41', '\xb2', '\x3f', '\xbd',
+ '\x60', '\x05', '\x00', '\x38', '\x7a', '\x86', '\xbe', '\x2f',
+ '\x3e', '\x0d', '\xc4', '\x12', '\x08', '\x30', '\x01', '\xa2',
+ '\xe0', '\xa6', '\xc9', '\x10', '\x61', '\x96', '\x04', '\xc2',
+ '\xe0', '\xc6', '\xb7', '\x10', '\x0f', '\x05', '\x41', '\xa2',
+ '\xbe', '\x2f', '\x3e', '\x0d', '\xfc', '\xe1', '\x7e', '\xbe',
+ '\x94', '\xe2', '\xfe', '\x4b', '\x6b', '\x26', '\xeb', '\xa6',
+ '\x5a', '\x90', '\x6a', '\x06', '\x60', '\xa6', '\x7b', '\x86',
+ '\x3f', '\xbd', '\x60', '\x05', '\x00', '\x38', '\x6f', '\xae',
+ '\x0a', '\x1a', '\x00', '\x38', '\x3f', '\xbd', '\x1a', '\x05',
+ '\x00', '\x38', '\xe2', '\x06', '\x2a', '\x90', '\x74', '\x86',
+ '\x60', '\x16', '\x60', '\x36', '\x6f', '\xae', '\x60', '\x1a',
+ '\x00', '\x38', '\x3f', '\xbd', '\x1a', '\x05', '\x00', '\x38',
+ '\x63', '\xae', '\x7b', '\x86', '\x3f', '\xbd', '\x60', '\x05',
+ '\x00', '\x38', '\x01', '\x42', '\xc4', '\x42', '\x08', '\x30',
+ '\x04', '\x12', '\xe2', '\x16', '\xdf', '\x80', '\x0f', '\x05',
+ '\x6f', '\xae', '\xc8', '\x18', '\x00', '\x38', '\x3f', '\xbd',
+ '\x1a', '\x05', '\x00', '\x38', '\x10', '\x02', '\xe2', '\x06',
+ '\xad', '\x80', '\x60', '\xa6', '\xbe', '\x4f', '\x3e', '\x0d',
+ '\x05', '\xa1', '\x49', '\x98', '\xc2', '\x92', '\x0a', '\x30',
+ '\xc4', '\x92', '\x0e', '\x30', '\x0f', '\x05', '\x7f', '\xb6',
+ '\x7a', '\x86', '\x6a', '\xb9', '\x5a', '\xa8', '\x7f', '\xb6',
+ '\x0f', '\x05', '\x6a', '\xb9', '\x6a', '\xaa', '\x7f', '\xb6',
+ '\x0f', '\x05', '\x6a', '\xd6', '\x05', '\xa1', '\x4a', '\xaa',
+ '\x4a', '\x94', '\xc2', '\x92', '\x0a', '\x30', '\xc4', '\x92',
+ '\x10', '\x30', '\x0f', '\x05', '\x7f', '\xb6', '\x7a', '\x86',
+ '\x5c', '\xca', '\x6d', '\xb9', '\xdc', '\xcb', '\x7f', '\xb6',
+ '\x4a', '\xa4', '\x6c', '\xca', '\x6d', '\xb9', '\xec', '\xcb',
+ '\x4a', '\xa4', '\x7f', '\xb6', '\x0f', '\x05', '\xfc', '\xe1',
+ '\x7e', '\xbe', '\x84', '\xe2', '\xee', '\xbb', '\x04', '\xa1',
+ '\x49', '\x9a', '\xcf', '\x9e', '\x01', '\x00', '\x06', '\x20',
+ '\x0f', '\x05', '\x24', '\xe0', '\xc1', '\xc3', '\xcf', '\x9e',
+ '\x02', '\x00', '\x0c', '\x20', '\x6b', '\x96', '\xd0', '\x93',
+ '\x69', '\xb7', '\xee', '\xbb', '\x12', '\xe0', '\xc2', '\xc3',
+ '\x6f', '\xae', '\x36', '\x1a', '\x00', '\x38', '\x3f', '\xbd',
+ '\x1a', '\x05', '\x00', '\x38', '\x0c', '\xe0', '\x0f', '\x05',
+ '\x6c', '\xb6', '\x6e', '\xc6', '\x3f', '\xbd', '\x3a', '\x0c',
+ '\x00', '\x38', '\x04', '\xe2', '\x3e', '\x0d', '\xfc', '\xe1',
+ '\x7e', '\xbe', '\x84', '\xe2', '\xfe', '\x0b', '\x6a', '\x06',
+ '\x4f', '\xbc', '\xaa', '\x00', '\x5f', '\xcc', '\x55', '\x05',
+ '\x3f', '\xbd', '\x66', '\x0c', '\x00', '\x38', '\x60', '\xa6',
+ '\x4f', '\xbc', '\x55', '\x00', '\x5f', '\xcc', '\xaa', '\x02',
+ '\xbe', '\x0f', '\x3e', '\xbe', '\x3f', '\x0d', '\x66', '\x0c',
+ '\x00', '\x38', '\xfc', '\xe1', '\x7e', '\xbe', '\x90', '\xe2',
+ '\xfe', '\x3b', '\x6a', '\x26', '\x04', '\xa1', '\x49', '\x9a',
+ '\xcf', '\x9e', '\x02', '\x00', '\x42', '\x20', '\x6b', '\x36',
+ '\x6f', '\x0e', '\x18', '\x0c', '\x00', '\x38', '\xb0', '\xb9',
+ '\x6a', '\x16', '\x62', '\xa6', '\x63', '\xb6', '\xb0', '\xb9',
+ '\x61', '\xd6', '\xf0', '\xd3', '\x1f', '\xdf', '\x40', '\x00',
+ '\x6a', '\x96', '\xf0', '\x93', '\x1f', '\x9f', '\x40', '\x00',
+ '\xe9', '\xd6', '\x14', '\x20', '\x7c', '\x86', '\x2f', '\x1f',
+ '\x40', '\x00', '\x00', '\x00', '\x2f', '\xaf', '\x40', '\x00',
+ '\x00', '\x00', '\xea', '\x16', '\x04', '\x30', '\x0f', '\x05',
+ '\x41', '\xc2', '\x6c', '\xa6', '\xbe', '\x3f', '\x3e', '\x0d',
+ '\x6f', '\x1e', '\x18', '\x0c', '\x00', '\x38', '\xb1', '\xb9',
+ '\x4a', '\x04', '\x0f', '\x0f', '\x40', '\x00', '\x62', '\xa6',
+ '\x63', '\xb6', '\xb1', '\xb9', '\x2f', '\xaf', '\x40', '\x00',
+ '\x00', '\x00', '\xea', '\x06', '\x3a', '\x25', '\xbe', '\x3f',
+ '\x3e', '\x0d', '\xfc', '\xe1', '\x7e', '\xbe', '\xa8', '\xe2',
+ '\xfe', '\x8b', '\x6a', '\x36', '\x04', '\xa1', '\x44', '\x9e',
+ '\xcf', '\x9e', '\x02', '\x00', '\x04', '\x20', '\x41', '\x72',
+ '\x42', '\x72', '\x6f', '\x2e', '\x66', '\x0c', '\x00', '\x38',
+ '\x4f', '\xbc', '\x98', '\x00', '\x4f', '\xcc', '\x55', '\x00',
+ '\xb2', '\xb9', '\x50', '\xb2', '\xe7', '\xb4', '\x6f', '\x1e',
+ '\x18', '\x0c', '\x00', '\x38', '\x63', '\xa6', '\xb1', '\xb9',
+ '\xcf', '\xae', '\x51', '\x00', '\xff', '\x2d', '\x9c', '\x01',
+ '\x63', '\xa6', '\x51', '\xb2', '\xe7', '\xb4', '\xb1', '\xb9',
+ '\xcf', '\xae', '\x52', '\x00', '\xff', '\x2d', '\x8c', '\x01',
+ '\x63', '\xa6', '\x52', '\xb2', '\xe7', '\xb4', '\xb1', '\xb9',
+ '\xcf', '\xae', '\x59', '\x00', '\xff', '\x2d', '\x7c', '\x01',
+ '\x63', '\xa6', '\x24', '\xe1', '\x70', '\x8a', '\x6f', '\xae',
+ '\x50', '\x1a', '\x00', '\x38', '\x3f', '\xbd', '\x1a', '\x05',
+ '\x00', '\x38', '\x63', '\xaa', '\x41', '\xb2', '\x3f', '\xbd',
+ '\x60', '\x05', '\x00', '\x38', '\x4f', '\xbc', '\x27', '\x00',
+ '\xe7', '\xb4', '\x63', '\xa6', '\xb1', '\xb9', '\x41', '\x92',
+ '\xea', '\x94', '\x06', '\x32', '\xe3', '\x9b', '\x86', '\x32',
+ '\x4f', '\xbc', '\x2c', '\x00', '\xe7', '\xb4', '\x63', '\xa6',
+ '\xb1', '\xb9', '\x6a', '\x86', '\x55', '\xb2', '\xe7', '\xb4',
+ '\x63', '\xa6', '\xb1', '\xb9', '\x6a', '\x06', '\x6a', '\xb6',
+ '\x04', '\xb2', '\xe7', '\xb4', '\x63', '\xa6', '\xb1', '\xb9',
+ '\xcf', '\xae', '\x30', '\x00', '\x3e', '\x20', '\x63', '\xa6',
+ '\x4f', '\xbc', '\xf0', '\x00', '\x5f', '\xcc', '\x55', '\x05',
+ '\xb2', '\xb9', '\x63', '\xa6', '\x3f', '\xbd', '\xae', '\x0c',
+ '\x00', '\x38', '\x63', '\xa6', '\x4f', '\xbc', '\x90', '\x00',
+ '\x5f', '\xcc', '\x55', '\x05', '\xb2', '\xb9', '\x44', '\xb8',
+ '\x2b', '\xb6', '\x63', '\xa6', '\xb1', '\xb9', '\x4a', '\x54',
+ '\x0f', '\x5f', '\x80', '\xff', '\x63', '\xa6', '\x4f', '\xbc',
+ '\x98', '\x00', '\x4f', '\xcc', '\x55', '\x00', '\xb2', '\xb9',
+ '\x10', '\xe0', '\x0f', '\x05', '\x0f', '\x02', '\xe7', '\x04',
+ '\x60', '\xb6', '\xb1', '\xb9', '\xcf', '\xae', '\x03', '\x00',
+ '\x35', '\x35', '\x0a', '\x31', '\xd8', '\x8b', '\xc8', '\x82',
+ '\x12', '\xd0', '\x68', '\x46', '\x6f', '\xae', '\x62', '\x1a',
+ '\x00', '\x38', '\x3f', '\xbd', '\x1a', '\x05', '\x00', '\x38',
+ '\xd2', '\xe0', '\x7a', '\x86', '\x65', '\x56', '\x94', '\x20',
+ '\x81', '\x42', '\x90', '\xe0', '\x74', '\x86', '\xc2', '\x03',
+ '\x60', '\xb6', '\x2f', '\xb2', '\xe7', '\xb4', '\x6f', '\x1e',
+ '\x18', '\x0c', '\x00', '\x38', '\x63', '\xa6', '\xb1', '\xb9',
+ '\x6a', '\x66', '\x60', '\xb6', '\x30', '\xb2', '\xe7', '\xb4',
+ '\x63', '\xa6', '\xb1', '\xb9', '\xc8', '\xa3', '\x6a', '\x67',
+ '\xc8', '\x63', '\x60', '\xb6', '\x2d', '\xb2', '\xe7', '\xb4',
+ '\x63', '\xa6', '\xb1', '\xb9', '\x6a', '\x26', '\x2e', '\x02',
+ '\xe7', '\x04', '\x63', '\xa6', '\x60', '\xb6', '\xb1', '\xb9',
+ '\xc8', '\xa3', '\x6a', '\x27', '\x65', '\x56', '\x0a', '\x30',
+ '\x01', '\x22', '\x68', '\x96', '\xa4', '\x96', '\x04', '\xe0',
+ '\x81', '\x92', '\x64', '\x96', '\x19', '\x95', '\x63', '\xd6',
+ '\x2d', '\x95', '\x6d', '\x96', '\x24', '\xe1', '\x6d', '\xda',
+ '\x0c', '\x91', '\xed', '\xdb', '\x10', '\x91', '\xe6', '\x6b',
+ '\x14', '\x91', '\xe2', '\x2b', '\x62', '\x26', '\x10', '\xd0',
+ '\x0f', '\x05', '\x24', '\xe1', '\x29', '\x6a', '\x24', '\xe1',
+ '\xe9', '\x9b', '\x81', '\x22', '\xf5', '\x20', '\x0f', '\x05',
+ '\x24', '\xe1', '\x6d', '\xda', '\x06', '\x31', '\xed', '\xda',
+ '\x1e', '\x30', '\x65', '\x56', '\x06', '\x30', '\x01', '\x42',
+ '\x81', '\x42', '\x81', '\x42', '\x65', '\x56', '\x0c', '\x30',
+ '\xe8', '\x46', '\x64', '\x46', '\x69', '\xa0', '\x64', '\x06',
+ '\x08', '\xe0', '\x63', '\xa6', '\x61', '\xb0', '\x64', '\x06',
+ '\x63', '\xa6', '\x4f', '\xbc', '\xf0', '\x00', '\x5f', '\xcc',
+ '\x55', '\x05', '\x3f', '\xbd', '\x66', '\x0c', '\x00', '\x38',
+ '\x12', '\xe0', '\x41', '\xa2', '\x4f', '\xbc', '\xf0', '\x00',
+ '\x5f', '\xcc', '\x55', '\x05', '\x3f', '\xbd', '\x66', '\x0c',
+ '\x00', '\x38', '\x7a', '\x86', '\xbe', '\x8f', '\x04', '\xe2',
+ '\x3e', '\x0d', '\xfc', '\xe1', '\x7e', '\xbe', '\x90', '\xe2',
+ '\xfe', '\x3b', '\x06', '\xa1', '\xa0', '\x0b', '\xff', '\x2d',
+ '\x16', '\x04', '\x6a', '\x26', '\x3f', '\xbd', '\x52', '\x0d',
+ '\x00', '\x38', '\x6a', '\xa6', '\xff', '\x2d', '\x86', '\x03',
+ '\x41', '\xa2', '\x62', '\xa6', '\x3f', '\xbd', '\xae', '\x0c',
+ '\x00', '\x38', '\x62', '\xa6', '\x4f', '\xbc', '\x90', '\x00',
+ '\x5f', '\xcc', '\x55', '\x05', '\x3f', '\xbd', '\x66', '\x0c',
+ '\x00', '\x38', '\x6f', '\x1e', '\x18', '\x0c', '\x00', '\x38',
+ '\x62', '\xa6', '\x7b', '\x86', '\xb1', '\xb9', '\x6a', '\x36',
+ '\x04', '\x21', '\x40', '\xbe', '\x4b', '\xb4', '\x2b', '\xb6',
+ '\x62', '\xa6', '\xb1', '\xb9', '\x42', '\x92', '\xc0', '\x9a',
+ '\x1c', '\x20', '\x63', '\xc6', '\xf0', '\xc3', '\x53', '\x94',
+ '\xe9', '\xc6', '\x14', '\x20', '\x63', '\x06', '\x6a', '\xd6',
+ '\xf0', '\xd3', '\x5a', '\x94', '\xe9', '\xd6', '\x0a', '\x20',
+ '\xd0', '\x03', '\x6c', '\x36', '\x6d', '\xa6', '\x63', '\x06',
+ '\xd0', '\x03', '\x6a', '\x07', '\x62', '\xa6', '\x4f', '\xbc',
+ '\xf0', '\x00', '\x5f', '\xcc', '\x55', '\x05', '\x3f', '\xbd',
+ '\x66', '\x0c', '\x00', '\x38', '\xef', '\x0e', '\xc0', '\x00',
+ '\x1f', '\x00', '\xff', '\x3d', '\x48', '\x02', '\x0f', '\x05',
+ '\x60', '\x90', '\x0f', '\x05', '\xef', '\x0e', '\xc4', '\x22',
+ '\x01', '\x00', '\xb0', '\x30', '\x0f', '\x05', '\x20', '\x90',
+ '\x0f', '\x05', '\xef', '\x0e', '\x58', '\x22', '\x01', '\x00',
+ '\xff', '\x3d', '\x5a', '\x01', '\x0f', '\x05', '\xef', '\x0e',
+ '\x5b', '\x22', '\x01', '\x00', '\xff', '\x3d', '\x4e', '\x01',
+ '\x0f', '\x05', '\xff', '\xed', '\xb6', '\x02', '\x0f', '\x05',
+ '\xef', '\x0e', '\xda', '\x22', '\x01', '\x00', '\xff', '\x3d',
+ '\x9c', '\x01', '\x0f', '\x05', '\x14', '\x90', '\x0f', '\x05',
+ '\xef', '\x0e', '\xd6', '\x22', '\x01', '\x00', '\xff', '\x3d',
+ '\x8c', '\x01', '\x0f', '\x05', '\xff', '\xed', '\x94', '\x02',
+ '\x0f', '\x05', '\xef', '\x0e', '\x49', '\x22', '\x04', '\x00',
+ '\xc4', '\x30', '\x0f', '\x05', '\xff', '\xed', '\x84', '\x02',
+ '\x0f', '\x05', '\xef', '\x0e', '\xd7', '\x00', '\x20', '\x00',
+ '\xff', '\x3d', '\x6a', '\x01', '\x0f', '\x05', '\x20', '\x90',
+ '\x0f', '\x05', '\xef', '\x0e', '\xc2', '\x00', '\x1f', '\x00',
+ '\xff', '\x3d', '\x00', '\x02', '\x0f', '\x05', '\xef', '\x0e',
+ '\xc9', '\x00', '\x1f', '\x00', '\xff', '\x3d', '\x18', '\x02',
+ '\x0f', '\x05', '\xff', '\xed', '\x56', '\x02', '\x0f', '\x05',
+ '\xef', '\x0e', '\x4f', '\x00', '\x98', '\x00', '\xff', '\x3d',
+ '\x3c', '\x01', '\x0f', '\x05', '\x12', '\x90', '\x0f', '\x05',
+ '\xef', '\x0e', '\x43', '\x00', '\x98', '\x00', '\x76', '\x30',
+ '\x0f', '\x05', '\xff', '\xed', '\x36', '\x02', '\x0f', '\x05',
+ '\xef', '\x0e', '\xc2', '\x00', '\x98', '\x00', '\xff', '\x2d',
+ '\x2a', '\x02', '\x0f', '\x05', '\x6f', '\x1e', '\x46', '\x1b',
+ '\x00', '\x38', '\x61', '\x1a', '\x6f', '\xde', '\x00', '\x00',
+ '\x20', '\x00', '\x06', '\x21', '\xed', '\xdb', '\x0c', '\x21',
+ '\x70', '\x8a', '\x6f', '\x9e', '\x00', '\x00', '\x01', '\x00',
+ '\x10', '\x21', '\xe9', '\x9b', '\x5f', '\xd2', '\x14', '\x21',
+ '\xed', '\xdb', '\x6f', '\x9e', '\x00', '\x00', '\x1f', '\x00',
+ '\x18', '\x21', '\xe9', '\x9b', '\x1f', '\xdc', '\xe1', '\x7f',
+ '\x1c', '\x21', '\xed', '\xdb', '\x41', '\x92', '\x20', '\x21',
+ '\xe9', '\x9b', '\x6f', '\xde', '\x00', '\x80', '\x1f', '\x00',
+ '\x24', '\x21', '\xed', '\xdb', '\x5f', '\xdc', '\x00', '\x20',
+ '\x28', '\x21', '\xed', '\xdb', '\x42', '\xd2', '\x2c', '\x21',
+ '\xed', '\xdb', '\x6f', '\xde', '\x00', '\xc0', '\x1f', '\x00',
+ '\xff', '\xed', '\x16', '\x01', '\x0f', '\x05', '\x6f', '\x1e',
+ '\x42', '\x1b', '\x00', '\x38', '\x61', '\x1a', '\x6f', '\x9e',
+ '\x00', '\x00', '\x20', '\x00', '\x06', '\x21', '\xe9', '\x9b',
+ '\x0c', '\x21', '\x70', '\x8a', '\x5f', '\x9c', '\x00', '\x40',
+ '\x10', '\x21', '\xe9', '\x9b', '\x41', '\xd2', '\x14', '\x21',
+ '\xed', '\xdb', '\x18', '\x21', '\xe9', '\x9b', '\x5f', '\x9c',
+ '\x00', '\x20', '\x1c', '\x21', '\xe9', '\x9b', '\x42', '\x92',
+ '\x20', '\x21', '\xe9', '\x9b', '\x1f', '\x9c', '\xfe', '\x7f',
+ '\x24', '\x21', '\xe9', '\x9b', '\x28', '\x21', '\xe9', '\x9b',
+ '\x2c', '\x21', '\xed', '\xdb', '\x6f', '\x9e', '\x00', '\x00',
+ '\x01', '\x00', '\x30', '\x21', '\xe9', '\x9b', '\x34', '\x21',
+ '\xe9', '\x9b', '\x58', '\xe0', '\x5f', '\xd2', '\x6f', '\x1e',
+ '\x3a', '\x1b', '\x00', '\x38', '\x61', '\x1a', '\x6f', '\x9e',
+ '\x00', '\x00', '\x10', '\x00', '\x06', '\x21', '\xe9', '\x9b',
+ '\x0c', '\x21', '\x70', '\x8a', '\x5f', '\x9c', '\x00', '\x40',
+ '\x10', '\x21', '\xe9', '\x9b', '\x41', '\xd2', '\x14', '\x21',
+ '\xed', '\xdb', '\x18', '\x21', '\xe9', '\x9b', '\x5f', '\x9c',
+ '\x00', '\x20', '\x1c', '\x21', '\xe9', '\x9b', '\x42', '\x92',
+ '\x20', '\x21', '\xe9', '\x9b', '\x1f', '\x9c', '\xfe', '\x7f',
+ '\x24', '\x21', '\xe9', '\x9b', '\x28', '\x21', '\xe9', '\x9b',
+ '\x2c', '\x21', '\xed', '\xdb', '\x6f', '\x9e', '\x00', '\x00',
+ '\x01', '\x00', '\x30', '\x21', '\xe9', '\x9b', '\x34', '\x21',
+ '\xe9', '\x9b', '\x4f', '\xd2', '\x38', '\x21', '\xed', '\xdb',
+ '\xff', '\xed', '\x3e', '\x01', '\x0f', '\x05', '\x6f', '\x1e',
+ '\x3e', '\x1b', '\x00', '\x38', '\x61', '\x1a', '\x6f', '\x9e',
+ '\x00', '\x00', '\x10', '\x00', '\x06', '\x21', '\xe9', '\x9b',
+ '\x0c', '\x21', '\x70', '\x8a', '\x6f', '\xde', '\x00', '\x00',
+ '\x01', '\x00', '\x10', '\x21', '\xed', '\xdb', '\x4f', '\x92',
+ '\x14', '\x21', '\xe9', '\x9b', '\x6f', '\xde', '\x00', '\x00',
+ '\x0f', '\x00', '\x18', '\x21', '\xed', '\xdb', '\x1f', '\x9c',
+ '\xf1', '\x7f', '\x1c', '\x21', '\xe9', '\x9b', '\x41', '\x92',
+ '\x20', '\x21', '\xe9', '\x9b', '\x6f', '\xde', '\x00', '\x80',
+ '\x0f', '\x00', '\x24', '\x21', '\xed', '\xdb', '\x5f', '\xdc',
+ '\x00', '\x20', '\x28', '\x21', '\xed', '\xdb', '\x42', '\xd2',
+ '\x2c', '\x21', '\xed', '\xdb', '\x6f', '\xde', '\x00', '\xc0',
+ '\x0f', '\x00', '\x30', '\x21', '\xed', '\xdb', '\x5f', '\xdc',
+ '\x00', '\x40', '\x34', '\x21', '\xed', '\xdb', '\x38', '\x21',
+ '\xe9', '\x9b', '\xce', '\xe0', '\x0f', '\x05', '\x6f', '\x1e',
+ '\x42', '\x1b', '\x00', '\x38', '\x61', '\x1a', '\x6f', '\x9e',
+ '\x00', '\x00', '\x20', '\x00', '\x06', '\x21', '\xe9', '\x9b',
+ '\x0c', '\x21', '\x70', '\x8a', '\x5f', '\xdc', '\x00', '\x20',
+ '\x10', '\x21', '\xed', '\xdb', '\x48', '\x92', '\x14', '\x21',
+ '\xe9', '\x9b', '\x6f', '\x9e', '\x00', '\x00', '\x01', '\x00',
+ '\x18', '\x21', '\xe9', '\x9b', '\x1c', '\x21', '\xe9', '\x9b',
+ '\x62', '\xe0', '\x5f', '\xd2', '\x6f', '\x1e', '\x46', '\x1b',
+ '\x00', '\x38', '\x61', '\x1a', '\x6f', '\x9e', '\x00', '\x00',
+ '\x20', '\x00', '\x06', '\x21', '\xe9', '\x9b', '\x0c', '\x21',
+ '\x70', '\x8a', '\x6f', '\xde', '\x00', '\x00', '\x01', '\x00',
+ '\x10', '\x21', '\xed', '\xdb', '\x26', '\xe0', '\x5f', '\x92',
+ '\x6f', '\x1e', '\x4a', '\x1b', '\x00', '\x38', '\x61', '\x1a',
+ '\x6f', '\x9e', '\x00', '\x00', '\x40', '\x00', '\x06', '\x21',
+ '\xe9', '\x9b', '\x0c', '\x21', '\x70', '\x8a', '\x6f', '\xde',
+ '\x00', '\x00', '\x01', '\x00', '\x10', '\x21', '\xed', '\xdb',
+ '\x4f', '\x9c', '\x3f', '\x00', '\x14', '\x21', '\xe9', '\x9b',
+ '\x6f', '\xde', '\x00', '\x00', '\x1f', '\x00', '\x18', '\x21',
+ '\xed', '\xdb', '\x5f', '\x9c', '\x00', '\x20', '\x1c', '\x21',
+ '\xe9', '\x9b', '\x48', '\xd2', '\x20', '\x21', '\xed', '\xdb',
+ '\x30', '\xe0', '\x0f', '\x05', '\x04', '\x21', '\x49', '\x9a',
+ '\x6f', '\xae', '\x7e', '\x1a', '\x00', '\x38', '\xcf', '\x9e',
+ '\x01', '\x00', '\x08', '\x30', '\x0f', '\x05', '\x6f', '\xae',
+ '\x90', '\x1a', '\x00', '\x38', '\x3f', '\xbd', '\x1a', '\x05',
+ '\x00', '\x38', '\x62', '\xaa', '\x41', '\xb2', '\x3f', '\xbd',
+ '\x60', '\x05', '\x00', '\x38', '\x7a', '\x86', '\xbe', '\x3f',
+ '\x3e', '\x0d', '\x6f', '\x3e', '\x1a', '\x05', '\x00', '\x38',
+ '\x6f', '\xae', '\xa8', '\x1a', '\x00', '\x38', '\xb3', '\xb9',
+ '\x04', '\x21', '\x40', '\x9e', '\xcf', '\x9e', '\x01', '\x00',
+ '\x0c', '\x20', '\x42', '\xd2', '\x6f', '\xae', '\xb0', '\x1a',
+ '\x00', '\x38', '\xb3', '\xb9', '\x42', '\xd2', '\xc0', '\xda',
+ '\x32', '\x20', '\x47', '\xc2', '\x06', '\x21', '\x6d', '\x9e',
+ '\xc1', '\x93', '\xed', '\x9b', '\x62', '\xd6', '\x0c', '\xd1',
+ '\x69', '\x9a', '\xc1', '\x93', '\x0c', '\xd1', '\xe9', '\x9b',
+ '\x10', '\xd1', '\x69', '\x9a', '\xc1', '\x93', '\x10', '\xd1',
+ '\xe9', '\x9b', '\x81', '\xc2', '\xe9', '\x60', '\x0c', '\xd2',
+ '\x6f', '\xae', '\xb2', '\x1a', '\x00', '\x38', '\x3f', '\xbd',
+ '\x1a', '\x05', '\x00', '\x38', '\x6f', '\x0e', '\x1a', '\x05',
+ '\x00', '\x38', '\x6f', '\xae', '\xb4', '\x1a', '\x00', '\x38',
+ '\xb0', '\xb9', '\x61', '\xa6', '\xb0', '\xb9', '\x6f', '\xae',
+ '\xe6', '\x19', '\x00', '\x38', '\xb0', '\xb9', '\x62', '\xaa',
+ '\x41', '\xb2', '\x3f', '\xbd', '\x60', '\x05', '\x00', '\x38',
+ '\x41', '\xa2', '\xbe', '\x3f', '\x3e', '\x0d', '\xfc', '\xe1',
+ '\x7e', '\xbe', '\x8c', '\xe2', '\xfe', '\x2b', '\x6a', '\x16',
+ '\x6b', '\x26', '\x6f', '\x0e', '\xae', '\x0c', '\x00', '\x38',
+ '\xb0', '\xb9', '\x61', '\xa6', '\x4f', '\xbc', '\x80', '\x00',
+ '\x5f', '\xcc', '\x55', '\x05', '\x3f', '\xbd', '\x66', '\x0c',
+ '\x00', '\x38', '\x61', '\xa6', '\xb0', '\xb9', '\x04', '\x11',
+ '\x49', '\x9a', '\xcf', '\x9e', '\x02', '\x00', '\x10', '\x20',
+ '\x0f', '\x05', '\x6f', '\x9e', '\x30', '\x00', '\x30', '\x00',
+ '\x61', '\x29', '\xe9', '\x9b', '\xbe', '\x2f', '\x3e', '\x0d',
+ '\x4f', '\x9c', '\x30', '\x00', '\x61', '\x29', '\xd9', '\x9b',
+ '\xbe', '\x2f', '\x3e', '\x0d', '\x84', '\xe2', '\xfe', '\x0b',
+ '\x06', '\xa1', '\xeb', '\xba', '\x10', '\x10', '\x0f', '\x05',
+ '\x7a', '\x86', '\x7f', '\xb6', '\xbe', '\x0f', '\x10', '\xa1',
+ '\x6a', '\xaa', '\x7f', '\xb6', '\xbe', '\x0f', '\x70', '\x86',
+ '\x0c', '\xa1', '\xeb', '\xba', '\x22', '\x10', '\x7d', '\x86',
+ '\x14', '\xa1', '\xed', '\xda', '\x10', '\x00', '\x79', '\x86',
+ '\x10', '\xa1', '\x6c', '\xca', '\x01', '\x92', '\x14', '\xa1',
+ '\xe9', '\x9a', '\xf9', '\x10', '\x2c', '\xd6', '\x0c', '\xa1',
+ '\x29', '\xda', '\xe9', '\xb6', '\xd1', '\x10', '\x0f', '\x05',
+ '\x01', '\x02', '\xc7', '\x02', '\xd3', '\x80', '\x0c', '\xa2',
+ '\x7a', '\x86', '\x7f', '\xb6', '\xbe', '\x0f', '\x84', '\xe2',
+ '\xfe', '\x0b', '\x6a', '\x06', '\x6b', '\xa6', '\x6d', '\xb6',
+ '\x7d', '\x86', '\xeb', '\xd6', '\x48', '\xa0', '\x0f', '\x05',
+ '\x60', '\x9a', '\x2d', '\x96', '\x49', '\xa5', '\x59', '\x9a',
+ '\x4c', '\xd5', '\xd9', '\x9a', '\x32', '\x30', '\x02', '\xd2',
+ '\x82', '\xd2', '\x6b', '\x96', '\x2a', '\x96', '\xe9', '\xa6',
+ '\x20', '\x00', '\x6a', '\xc6', '\x60', '\xc9', '\x59', '\x9a',
+ '\xdf', '\x9e', '\xff', '\xff', '\x0a', '\x30', '\x02', '\xc2',
+ '\x82', '\xc2', '\x42', '\xa2', '\x7f', '\xb6', '\xbe', '\x0f',
+ '\x6b', '\x96', '\x2a', '\x96', '\xe9', '\xc6', '\xe5', '\x10',
+ '\x0f', '\x05', '\x41', '\xa2', '\x7f', '\xb6', '\xbe', '\x0f',
+ '\xeb', '\xd6', '\xbd', '\xb0', '\x0f', '\x05', '\x7a', '\x86',
+ '\x7f', '\xb6', '\xbe', '\x0f', '\xfc', '\xe1', '\x7e', '\xbe',
+ '\x90', '\xe2', '\xfe', '\x3b', '\x73', '\x86', '\x72', '\x86',
+ '\x6f', '\x0e', '\x4e', '\x1b', '\x00', '\x38', '\x41', '\x12',
+ '\x04', '\x01', '\xc1', '\x1b', '\xcf', '\x1e', '\x01', '\x00',
+ '\x04', '\x30', '\x42', '\x92', '\x44', '\x92', '\x05', '\x01',
+ '\xc9', '\x9b', '\x60', '\xa6', '\x3f', '\xbd', '\x42', '\x0f',
+ '\x00', '\x38', '\x6a', '\xa6', '\x0c', '\x20', '\x0f', '\x05',
+ '\xc1', '\x13', '\xcf', '\x1e', '\x03', '\x00', '\xd9', '\x80',
+ '\x0f', '\x05', '\x06', '\x01', '\x23', '\x3a', '\x0f', '\x0c',
+ '\x6c', '\x00', '\x01', '\x22', '\xc1', '\x22', '\xc7', '\x80',
+ '\x63', '\xa6', '\xbe', '\x3f', '\x3e', '\x0d', '\xfc', '\xe1',
+ '\x7e', '\xbe', '\x98', '\xe2', '\xfe', '\x5b', '\x6a', '\x16',
+ '\x6b', '\x56', '\x6c', '\x36', '\x70', '\x86', '\xed', '\x06',
+ '\x74', '\xa0', '\x6d', '\x46', '\x05', '\x11', '\x49', '\x9a',
+ '\xcf', '\x9e', '\x02', '\x00', '\x12', '\x20', '\x0f', '\x05',
+ '\x43', '\x05', '\x59', '\x9a', '\xdf', '\x9e', '\xff', '\xff',
+ '\x54', '\x30', '\x42', '\x22', '\x05', '\x11', '\x49', '\x9a',
+ '\xcf', '\x9e', '\x04', '\x00', '\x0e', '\x20', '\x61', '\xa6',
+ '\x43', '\x05', '\x69', '\x9a', '\xff', '\x92', '\x3e', '\x30',
+ '\x44', '\x22', '\x61', '\xa6', '\x3f', '\xbd', '\xae', '\x0c',
+ '\x00', '\x38', '\x61', '\xa6', '\x4f', '\xbc', '\xa0', '\x00',
+ '\x5f', '\xcc', '\x55', '\x05', '\x3f', '\xbd', '\x66', '\x0c',
+ '\x00', '\x38', '\x65', '\xb6', '\x20', '\xb6', '\x63', '\xc6',
+ '\x20', '\xc6', '\x61', '\xa6', '\x3f', '\xbd', '\x3a', '\x0c',
+ '\x00', '\x38', '\x6a', '\x26', '\x61', '\xa6', '\x65', '\xb6',
+ '\x20', '\xb6', '\x3f', '\xbd', '\xda', '\x0c', '\x00', '\x38',
+ '\x6a', '\xa6', '\xf3', '\x20', '\x61', '\xa6', '\x22', '\x06',
+ '\xe4', '\x06', '\x91', '\xb0', '\x0f', '\x05', '\xbe', '\x5f',
+ '\x3e', '\x0d', '\xfc', '\xe1', '\x7e', '\xbe', '\xa4', '\xe2',
+ '\xfe', '\x8b', '\x6a', '\x16', '\x6b', '\x06', '\x6c', '\x86',
+ '\x3f', '\xbd', '\x6c', '\x14', '\x00', '\x38', '\x6a', '\x96',
+ '\x1a', '\x30', '\x41', '\xa2', '\x60', '\xd6', '\x28', '\xd6',
+ '\xe9', '\xd6', '\x14', '\x80', '\x0f', '\x05', '\x6f', '\xae',
+ '\xb8', '\x1a', '\x00', '\x38', '\x3f', '\xbd', '\x1a', '\x05',
+ '\x00', '\x38', '\x42', '\xa2', '\xbe', '\x8f', '\x3e', '\x0d',
+ '\x6f', '\xce', '\x54', '\x1b', '\x00', '\x38', '\x6c', '\xca',
+ '\xec', '\x06', '\x1e', '\x10', '\xec', '\xd6', '\x6f', '\x9e',
+ '\x26', '\x1c', '\x00', '\x38', '\x09', '\x91', '\x70', '\x8a',
+ '\x16', '\x91', '\xe1', '\x1b', '\xac', '\x06', '\x1a', '\x91',
+ '\xe0', '\x0b', '\x1e', '\x91', '\xe8', '\x8b', '\x74', '\xe0',
+ '\x0f', '\x05', '\x5a', '\x80', '\x6c', '\x96', '\x6f', '\xde',
+ '\x26', '\x1c', '\x00', '\x38', '\x01', '\xd1', '\xe1', '\x1b',
+ '\x05', '\xd1', '\xe0', '\x0b', '\xa0', '\x96', '\x09', '\xd1',
+ '\xe9', '\x9b', '\x29', '\x16', '\x16', '\xd1', '\xe1', '\x1b',
+ '\x1a', '\xd1', '\x70', '\x8a', '\x68', '\xc6', '\xa9', '\xc6',
+ '\x1e', '\xd1', '\xec', '\xcb', '\x46', '\xe0', '\x0f', '\x05',
+ '\x6f', '\xae', '\xd4', '\x1a', '\x00', '\x38', '\x3f', '\xbd',
+ '\x1a', '\x05', '\x00', '\x38', '\x44', '\xa2', '\xbe', '\x8f',
+ '\x3e', '\x0d', '\x6f', '\xae', '\xe8', '\x1a', '\x00', '\x38',
+ '\x3f', '\xbd', '\x1a', '\x05', '\x00', '\x38', '\x60', '\xa6',
+ '\x41', '\xb2', '\x3f', '\xbd', '\x60', '\x05', '\x00', '\x38',
+ '\x43', '\xa2', '\xbe', '\x8f', '\x3e', '\x0d', '\x6f', '\x9e',
+ '\x26', '\x1c', '\x00', '\x38', '\x01', '\x91', '\xe1', '\x1b',
+ '\x05', '\x91', '\xe0', '\x0b', '\x09', '\x91', '\xe8', '\x8b',
+ '\x1e', '\x91', '\x70', '\x8a', '\x6f', '\xce', '\x26', '\x1c',
+ '\x00', '\x38', '\x7c', '\x0a', '\x0d', '\xc1', '\x70', '\x8a',
+ '\x11', '\xc1', '\x70', '\x8a', '\x15', '\xc1', '\x79', '\x0e',
+ '\x7f', '\x0d', '\x48', '\x1c', '\x00', '\x38', '\x70', '\x8a',
+ '\x7f', '\x0d', '\x4c', '\x1c', '\x00', '\x38', '\x70', '\x8a',
+ '\x0d', '\x91', '\xe8', '\x8a', '\xff', '\x8d', '\xc0', '\x01',
+ '\x75', '\x86', '\x65', '\x56', '\x04', '\x20', '\x6c', '\xd6',
+ '\x15', '\xd2', '\x65', '\x96', '\x29', '\x55', '\x65', '\x36',
+ '\x23', '\x95', '\x09', '\xd1', '\x69', '\x9a', '\x24', '\x30',
+ '\x2c', '\x36', '\x0d', '\xd1', '\xe9', '\x9a', '\x1c', '\x80',
+ '\x0f', '\x05', '\x09', '\x31', '\x69', '\x9a', '\x10', '\x30',
+ '\x0f', '\x05', '\x83', '\x0b', '\x0a', '\x20', '\x0f', '\x05',
+ '\x0d', '\x31', '\xe9', '\x9a', '\x06', '\x20', '\x0f', '\x05',
+ '\x65', '\x56', '\x35', '\x35', '\x11', '\x31', '\x63', '\x3a',
+ '\xca', '\x32', '\x4d', '\x90', '\x65', '\x96', '\x29', '\x55',
+ '\x65', '\x36', '\x23', '\x95', '\x2f', '\x3e', '\x26', '\x1c',
+ '\x00', '\x38', '\x05', '\x31', '\x64', '\x4a', '\x0d', '\x31',
+ '\x69', '\x9a', '\x29', '\x46', '\x01', '\x31', '\x27', '\x9a',
+ '\x65', '\xa6', '\xc3', '\xa3', '\xa5', '\xa6', '\xc2', '\xa3',
+ '\xa5', '\xa6', '\xc2', '\xa3', '\x2f', '\xae', '\x4e', '\x1b',
+ '\x00', '\x38', '\x64', '\xb6', '\x3f', '\xbd', '\xbc', '\x13',
+ '\x00', '\x38', '\x83', '\x0b', '\x24', '\x30', '\x6a', '\x66',
+ '\x65', '\xa6', '\xc3', '\xa3', '\xa5', '\xa6', '\xc2', '\xa3',
+ '\xa5', '\xa6', '\xc2', '\xa3', '\x2f', '\xae', '\x4e', '\x1b',
+ '\x00', '\x38', '\x64', '\xb6', '\x3f', '\xbd', '\xda', '\x0c',
+ '\x00', '\x38', '\x6a', '\xa6', '\xe5', '\x20', '\x65', '\xa6',
+ '\x73', '\x0a', '\x65', '\x26', '\xc3', '\x23', '\xa5', '\x26',
+ '\xc2', '\x23', '\xa5', '\x26', '\xc2', '\x23', '\x2f', '\x2e',
+ '\x4e', '\x1b', '\x00', '\x38', '\x62', '\xa6', '\x4f', '\xbc',
+ '\xf0', '\x00', '\x5f', '\xcc', '\x55', '\x05', '\x3f', '\xbd',
+ '\x66', '\x0c', '\x00', '\x38', '\x62', '\xa6', '\x64', '\xb6',
+ '\x67', '\xc6', '\x66', '\xd6', '\x3f', '\xbd', '\x0e', '\x14',
+ '\x00', '\x38', '\x4a', '\xa6', '\x28', '\x20', '\x7b', '\x86',
+ '\x0d', '\x31', '\x69', '\xde', '\x26', '\xd6', '\xe9', '\xdb',
+ '\x11', '\x31', '\x70', '\x8a', '\x62', '\xaa', '\x24', '\xa6',
+ '\x3f', '\xbd', '\x60', '\x05', '\x00', '\x38', '\x6f', '\xae',
+ '\xf2', '\x1a', '\x00', '\x38', '\x3f', '\xbd', '\x1a', '\x05',
+ '\x00', '\x38', '\xaa', '\xe0', '\x0f', '\x05', '\xcf', '\xae',
+ '\x01', '\x00', '\x4c', '\x30', '\x0f', '\x05', '\xcf', '\xae',
+ '\x02', '\x00', '\x46', '\x20', '\x65', '\xa6', '\x62', '\xaa',
+ '\x24', '\xa6', '\x6f', '\x1e', '\x60', '\x05', '\x00', '\x38',
+ '\x7b', '\x86', '\xb1', '\xb9', '\x6f', '\x0e', '\x1a', '\x05',
+ '\x00', '\x38', '\x6f', '\xae', '\x06', '\x1b', '\x00', '\x38',
+ '\xb0', '\xb9', '\x66', '\xa6', '\x7b', '\x86', '\xb1', '\xb9',
+ '\x6f', '\xae', '\x12', '\x1b', '\x00', '\x38', '\xb0', '\xb9',
+ '\x62', '\xa6', '\x64', '\xb6', '\x3f', '\xbd', '\x6e', '\x13',
+ '\x00', '\x38', '\x41', '\x92', '\xc3', '\x9b', '\x11', '\x31',
+ '\x6d', '\x9e', '\x01', '\x92', '\x58', '\xe0', '\xed', '\x9b',
+ '\x65', '\xa6', '\xc3', '\xa3', '\xa5', '\xa6', '\xc2', '\xa3',
+ '\xa5', '\xa6', '\xc2', '\xa3', '\x6f', '\xad', '\x4e', '\x1b',
+ '\x00', '\x38', '\x62', '\xae', '\x24', '\xa6', '\x6f', '\x1e',
+ '\x60', '\x05', '\x00', '\x38', '\x7b', '\x86', '\xb1', '\xb9',
+ '\x6f', '\x0e', '\x1a', '\x05', '\x00', '\x38', '\x6f', '\xae',
+ '\x1a', '\x1b', '\x00', '\x38', '\xb0', '\xb9', '\x66', '\xa6',
+ '\x7b', '\x86', '\xb1', '\xb9', '\x6f', '\xae', '\x12', '\x1b',
+ '\x00', '\x38', '\xb0', '\xb9', '\x62', '\xa6', '\x64', '\xb6',
+ '\x67', '\xc6', '\x66', '\xd6', '\x3f', '\xbd', '\xbe', '\x14',
+ '\x00', '\x38', '\x0d', '\x31', '\x6d', '\x9e', '\x26', '\x96',
+ '\xed', '\x9b', '\x11', '\x31', '\x70', '\x8a', '\x6f', '\xce',
+ '\x26', '\x1c', '\x00', '\x38', '\x0d', '\xc1', '\x69', '\x9a',
+ '\x7f', '\x0d', '\x48', '\x1c', '\x00', '\x38', '\x29', '\x9a',
+ '\xe8', '\x96', '\xff', '\x1d', '\x44', '\xfe', '\x0f', '\x05',
+ '\x75', '\x86', '\x6f', '\x2e', '\x4e', '\x1b', '\x00', '\x38',
+ '\x6f', '\x1e', '\x26', '\x1c', '\x00', '\x38', '\x09', '\x11',
+ '\xa0', '\x0b', '\x4c', '\x30', '\x7b', '\x86', '\x62', '\xaa',
+ '\x3f', '\xbd', '\x60', '\x05', '\x00', '\x38', '\x6f', '\xae',
+ '\x26', '\x1b', '\x00', '\x38', '\x3f', '\xbd', '\x1a', '\x05',
+ '\x00', '\x38', '\x70', '\x86', '\x09', '\x11', '\xe0', '\x0a',
+ '\x22', '\x00', '\x0f', '\x05', '\x05', '\x11', '\x29', '\x0a',
+ '\x01', '\x11', '\x6d', '\xda', '\x62', '\x99', '\x59', '\x9a',
+ '\x4d', '\x05', '\xd9', '\x9a', '\xff', '\x2d', '\x9a', '\xfd',
+ '\x0f', '\x05', '\x02', '\x02', '\x09', '\x11', '\xe0', '\x0a',
+ '\xe3', '\x10', '\x0f', '\x05', '\x6f', '\xae', '\x36', '\x1b',
+ '\x00', '\x38', '\x3f', '\xbd', '\x1a', '\x05', '\x00', '\x38',
+ '\x0f', '\x2c', '\x6c', '\x00', '\x01', '\x52', '\xc1', '\x52',
+ '\xa5', '\x80', '\x15', '\x12', '\x7a', '\x86', '\xbe', '\x8f',
+ '\x3e', '\x0d', '\x00', '\x00', '\x7f', '\xb6', '\x0f', '\x05',
+ '\x00', '\x00', '\x00', '\x00', '\x0d', '\x0a', '\x0d', '\x0a',
+ '\x44', '\x65', '\x76', '\x69', '\x63', '\x65', '\x20', '\x49',
+ '\x44', '\x20', '\x3d', '\x20', '\x00', '\x00', '\x43', '\x68',
+ '\x65', '\x63', '\x6b', '\x73', '\x75', '\x6d', '\x20', '\x6f',
+ '\x66', '\x20', '\x62', '\x6f', '\x6f', '\x74', '\x6c', '\x6f',
+ '\x61', '\x64', '\x65', '\x72', '\x20', '\x69', '\x73', '\x20',
+ '\x00', '\x00', '\x57', '\x61', '\x69', '\x74', '\x69', '\x6e',
+ '\x67', '\x20', '\x66', '\x6f', '\x72', '\x20', '\x6c', '\x6f',
+ '\x61', '\x64', '\x20', '\x69', '\x6e', '\x66', '\x6f', '\x2e',
+ '\x0d', '\x0a', '\x00', '\x00', '\x47', '\x6f', '\x74', '\x20',
+ '\x6c', '\x6f', '\x61', '\x64', '\x20', '\x69', '\x6e', '\x66',
+ '\x6f', '\x2e', '\x0d', '\x0a', '\x00', '\x00', '\x50', '\x41',
+ '\x43', '\x4b', '\x45', '\x54', '\x5f', '\x49', '\x4e', '\x46',
+ '\x4f', '\x0d', '\x0a', '\x00', '\x53', '\x45', '\x54', '\x5f',
+ '\x52', '\x45', '\x47', '\x49', '\x53', '\x54', '\x45', '\x52',
+ '\x0d', '\x0a', '\x00', '\x00', '\x47', '\x45', '\x54', '\x5f',
+ '\x52', '\x45', '\x47', '\x49', '\x53', '\x54', '\x45', '\x52',
+ '\x0d', '\x0a', '\x00', '\x00', '\x50', '\x41', '\x55', '\x53',
+ '\x45', '\x5f', '\x4c', '\x4f', '\x4f', '\x50', '\x0d', '\x0a',
+ '\x00', '\x00', '\x4d', '\x45', '\x4d', '\x5f', '\x56', '\x45',
+ '\x52', '\x49', '\x46', '\x59', '\x0d', '\x0a', '\x00', '\x00',
+ '\x76', '\x65', '\x72', '\x69', '\x66', '\x79', '\x20', '\x66',
+ '\x61', '\x69', '\x6c', '\x65', '\x64', '\x0d', '\x0a', '\x00',
+ '\x4d', '\x45', '\x4d', '\x5f', '\x54', '\x45', '\x53', '\x54',
+ '\x0d', '\x0a', '\x00', '\x00', '\x23', '\x23', '\x23', '\x20',
+ '\x4d', '\x65', '\x6d', '\x6f', '\x72', '\x79', '\x20', '\x74',
+ '\x65', '\x73', '\x74', '\x20', '\x66', '\x61', '\x69', '\x6c',
+ '\x65', '\x64', '\x20', '\x61', '\x74', '\x20', '\x00', '\x00',
+ '\x50', '\x61', '\x73', '\x73', '\x65', '\x64', '\x20', '\x6d',
+ '\x65', '\x6d', '\x6f', '\x72', '\x79', '\x20', '\x74', '\x65',
+ '\x73', '\x74', '\x2e', '\x0d', '\x0a', '\x00', '\x4d', '\x45',
+ '\x4d', '\x5f', '\x44', '\x55', '\x4d', '\x50', '\x0d', '\x0a',
+ '\x00', '\x00', '\x4d', '\x45', '\x4d', '\x5f', '\x43', '\x4c',
+ '\x45', '\x41', '\x52', '\x0d', '\x0a', '\x00', '\x46', '\x4c',
+ '\x41', '\x53', '\x48', '\x0d', '\x0a', '\x00', '\x4a', '\x55',
+ '\x4d', '\x50', '\x0d', '\x0a', '\x00', '\x00', '\x45', '\x4e',
+ '\x44', '\x0d', '\x0a', '\x00', '\x23', '\x23', '\x23', '\x20',
+ '\x55', '\x6e', '\x6b', '\x6e', '\x6f', '\x77', '\x6e', '\x20',
+ '\x74', '\x79', '\x70', '\x65', '\x3a', '\x20', '\x00', '\x00',
+ '\x43', '\x68', '\x65', '\x63', '\x6b', '\x73', '\x75', '\x6d',
+ '\x20', '\x6f', '\x66', '\x20', '\x66', '\x69', '\x6c', '\x65',
+ '\x20', '\x69', '\x73', '\x20', '\x00', '\x00', '\x23', '\x23',
+ '\x23', '\x20', '\x4d', '\x65', '\x6d', '\x6f', '\x72', '\x79',
+ '\x20', '\x74', '\x65', '\x73', '\x74', '\x20', '\x31', '\x20',
+ '\x66', '\x61', '\x69', '\x6c', '\x65', '\x64', '\x20', '\x61',
+ '\x74', '\x20', '\x00', '\x00', '\x23', '\x23', '\x23', '\x20',
+ '\x4d', '\x65', '\x6d', '\x6f', '\x72', '\x79', '\x20', '\x74',
+ '\x65', '\x73', '\x74', '\x20', '\x32', '\x20', '\x66', '\x61',
+ '\x69', '\x6c', '\x65', '\x64', '\x20', '\x61', '\x74', '\x20',
+ '\x00', '\x00', '\x20', '\x3a', '\x00', '\x00', '\x38', '\x4d',
+ '\x62', '\x20', '\x42', '\x42', '\x00', '\x00', '\x38', '\x4d',
+ '\x62', '\x20', '\x54', '\x42', '\x00', '\x00', '\x31', '\x36',
+ '\x4d', '\x62', '\x20', '\x42', '\x42', '\x00', '\x31', '\x36',
+ '\x4d', '\x62', '\x20', '\x54', '\x42', '\x00', '\x33', '\x32',
+ '\x4d', '\x62', '\x20', '\x54', '\x42', '\x00', '\x55', '\x6e',
+ '\x73', '\x75', '\x70', '\x70', '\x6f', '\x72', '\x74', '\x65',
+ '\x64', '\x20', '\x69', '\x6e', '\x74', '\x65', '\x72', '\x6c',
+ '\x65', '\x61', '\x76', '\x65', '\x21', '\x0a', '\x00', '\x00',
+ '\x46', '\x6f', '\x75', '\x6e', '\x64', '\x20', '\x31', '\x20',
+ '\x78', '\x20', '\x43', '\x46', '\x49', '\x20', '\x61', '\x74',
+ '\x20', '\x00', '\x54', '\x6f', '\x6f', '\x20', '\x6d', '\x61',
+ '\x6e', '\x79', '\x20', '\x72', '\x65', '\x67', '\x69', '\x6f',
+ '\x6e', '\x73', '\x20', '\x6f', '\x6e', '\x20', '\x63', '\x68',
+ '\x69', '\x70', '\x21', '\x0a', '\x00', '\x00', '\x4e', '\x6f',
+ '\x20', '\x73', '\x69', '\x6e', '\x67', '\x6c', '\x65', '\x20',
+ '\x78', '\x31', '\x36', '\x20', '\x61', '\x74', '\x20', '\x00',
+ '\x4e', '\x6f', '\x20', '\x69', '\x6e', '\x74', '\x65', '\x72',
+ '\x6c', '\x65', '\x61', '\x76', '\x65', '\x64', '\x20', '\x78',
+ '\x31', '\x36', '\x20', '\x61', '\x74', '\x20', '\x00', '\x00',
+ '\x46', '\x6f', '\x75', '\x6e', '\x64', '\x20', '\x00', '\x00',
+ '\x31', '\x00', '\x32', '\x00', '\x20', '\x78', '\x20', '\x00',
+ '\x46', '\x61', '\x74', '\x61', '\x6c', '\x3a', '\x20', '\x66',
+ '\x6c', '\x61', '\x73', '\x68', '\x20', '\x69', '\x73', '\x20',
+ '\x74', '\x6f', '\x6f', '\x20', '\x73', '\x6d', '\x61', '\x6c',
+ '\x6c', '\x2e', '\x0a', '\x00', '\x53', '\x65', '\x63', '\x74',
+ '\x6f', '\x72', '\x20', '\x65', '\x72', '\x61', '\x73', '\x65',
+ '\x20', '\x65', '\x72', '\x72', '\x6f', '\x72', '\x0a', '\x00',
+ '\x45', '\x72', '\x72', '\x6f', '\x72', '\x20', '\x61', '\x74',
+ '\x20', '\x00', '\x3a', '\x20', '\x4e', '\x6f', '\x20', '\x6e',
+ '\x65', '\x65', '\x64', '\x20', '\x74', '\x6f', '\x20', '\x77',
+ '\x72', '\x69', '\x74', '\x65', '\x0a', '\x00', '\x3a', '\x20',
+ '\x45', '\x72', '\x61', '\x73', '\x69', '\x6e', '\x67', '\x20',
+ '\x00', '\x00', '\x20', '\x62', '\x79', '\x74', '\x65', '\x73',
+ '\x0a', '\x00', '\x3a', '\x20', '\x57', '\x72', '\x69', '\x74',
+ '\x69', '\x6e', '\x67', '\x20', '\x00', '\x00', '\x3a', '\x20',
+ '\x56', '\x65', '\x72', '\x69', '\x66', '\x79', '\x69', '\x6e',
+ '\x67', '\x2e', '\x2e', '\x2e', '\x00', '\x00', '\x4f', '\x4b',
+ '\x0a', '\x00', '\x0e', '\x1a', '\x00', '\x38', '\x16', '\x1a',
+ '\x00', '\x38', '\x1e', '\x1a', '\x00', '\x38', '\x26', '\x1a',
+ '\x00', '\x38', '\x2e', '\x1a', '\x00', '\x38', '\x00', '\x00',
+ '\x00', '\x80', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x84', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x54', '\x68', '\x69', '\x73', '\x20', '\x62', '\x6f', '\x6f',
+ '\x74', '\x6c', '\x6f', '\x61', '\x64', '\x65', '\x72', '\x20',
+ '\x77', '\x61', '\x73', '\x20', '\x62', '\x75', '\x69', '\x6c',
+ '\x74', '\x20', '\x62', '\x79', '\x20', '\x72', '\x6f', '\x6f',
+ '\x74', '\x20', '\x6f', '\x6e', '\x20', '\x57', '\x65', '\x64',
+ '\x20', '\x4d', '\x61', '\x79', '\x20', '\x31', '\x36', '\x20',
+ '\x32', '\x31', '\x3a', '\x33', '\x31', '\x3a', '\x34', '\x31',
+ '\x20', '\x43', '\x45', '\x53', '\x54', '\x20', '\x32', '\x30',
+ '\x30', '\x37', '\x2e', '\x0d', '\x0a', '\x00'
+};
--- /dev/null
+
+/* cconv 1.2 12/16/97, Copyright (C) 1997, Axis Communications AB */
+
+const char net_noleds_ima[] =
+{
+ '\x0f', '\x05', '\x0f', '\x05', '\x6f', '\xee', '\x00', '\x1f',
+ '\x00', '\x38', '\x3f', '\x0d', '\x08', '\x01', '\x00', '\x38',
+ '\x78', '\x56', '\x34', '\x12', '\x21', '\x43', '\x65', '\x87',
+ '\x6f', '\xde', '\x20', '\x00', '\x00', '\xb0', '\x5f', '\x9c',
+ '\x65', '\x6f', '\xed', '\x9b', '\x5f', '\x9c', '\x25', '\x2f',
+ '\x7f', '\x0d', '\xf0', '\x17', '\x00', '\x38', '\xe9', '\x9b',
+ '\xed', '\x9b', '\x3f', '\x0d', '\x28', '\x01', '\x00', '\x38',
+ '\xfc', '\xe1', '\x7e', '\xbe', '\x7f', '\x0d', '\x92', '\x1c',
+ '\x00', '\x38', '\x70', '\x8a', '\x6f', '\x9e', '\x20', '\x00',
+ '\x00', '\xb0', '\x69', '\x9a', '\x79', '\x67', '\x7f', '\x0d',
+ '\x46', '\x1c', '\x00', '\x38', '\xe9', '\x9b', '\x6f', '\x9e',
+ '\x22', '\x00', '\x00', '\xb0', '\x59', '\x9a', '\x59', '\x94',
+ '\x7f', '\x0d', '\xae', '\x1c', '\x00', '\x38', '\xe9', '\x9b',
+ '\x6f', '\x9e', '\x04', '\x00', '\x00', '\xb0', '\x69', '\x9a',
+ '\x06', '\x93', '\xe1', '\x93', '\x81', '\x92', '\x7f', '\x0d',
+ '\x96', '\x1c', '\x00', '\x38', '\xc9', '\x9b', '\x7f', '\x0d',
+ '\x58', '\x1c', '\x00', '\x38', '\x70', '\x4a', '\x3f', '\xbd',
+ '\x28', '\x02', '\x00', '\x38', '\x3f', '\xbd', '\x30', '\x04',
+ '\x00', '\x38', '\x3f', '\xbd', '\xcc', '\x01', '\x00', '\x38',
+ '\x6a', '\xa6', '\xf7', '\x30', '\x0f', '\x05', '\x6f', '\x9e',
+ '\x00', '\x01', '\x00', '\x38', '\x69', '\x9a', '\x7f', '\x0d',
+ '\x92', '\x1c', '\x00', '\x38', '\xe9', '\x9a', '\x24', '\x80',
+ '\x0f', '\x05', '\x6f', '\x9e', '\x96', '\x1c', '\x00', '\x38',
+ '\x49', '\x9a', '\xcf', '\x9e', '\x01', '\x00', '\xd3', '\x20',
+ '\x0f', '\x05', '\x6f', '\xde', '\xd4', '\x01', '\x00', '\xb0',
+ '\x4d', '\x9a', '\x38', '\x93', '\x41', '\x93', '\xcd', '\x9b',
+ '\xc1', '\xe0', '\x0f', '\x05', '\x3e', '\xbe', '\x3f', '\x0d',
+ '\x80', '\x05', '\x00', '\x38', '\xfc', '\xe1', '\x7e', '\xbe',
+ '\x3f', '\xbd', '\x62', '\x03', '\x00', '\x38', '\x6a', '\xa6',
+ '\x16', '\x20', '\x41', '\x92', '\x3f', '\xbd', '\xf4', '\x01',
+ '\x00', '\x38', '\x6a', '\xa6', '\x0a', '\x30', '\x79', '\x86',
+ '\x3f', '\xbd', '\x30', '\x04', '\x00', '\x38', '\x79', '\x86',
+ '\x69', '\xa6', '\x3e', '\x0d', '\x84', '\xe2', '\x6f', '\x9e',
+ '\x22', '\x00', '\x00', '\xb0', '\x59', '\x9a', '\x59', '\x94',
+ '\xee', '\x9b', '\x6f', '\xce', '\xae', '\x1c', '\x00', '\x38',
+ '\x6c', '\x9a', '\x6e', '\xda', '\xad', '\x96', '\xb9', '\x96',
+ '\xdf', '\x9c', '\x80', '\x25', '\x0a', '\xd0', '\x0f', '\x05',
+ '\x6e', '\x9a', '\xec', '\x9b', '\x04', '\xe0', '\x41', '\xa2',
+ '\x7a', '\x86', '\x7f', '\xb6', '\x04', '\xe2', '\x00', '\x00',
+ '\x88', '\xe2', '\xfe', '\x1b', '\x6f', '\x9e', '\x8c', '\x00',
+ '\x00', '\xb0', '\x79', '\x8a', '\x69', '\x9a', '\x7f', '\x0d',
+ '\x90', '\x00', '\x00', '\xb0', '\xe9', '\x9b', '\x6f', '\x9e',
+ '\x01', '\x40', '\x8c', '\x00', '\x7f', '\x0d', '\x80', '\x00',
+ '\x00', '\xb0', '\xe9', '\x9b', '\x6f', '\xce', '\x01', '\x00',
+ '\x01', '\x40', '\x7f', '\x0d', '\x84', '\x00', '\x00', '\xb0',
+ '\xec', '\xcb', '\x6f', '\xde', '\x8c', '\x00', '\x01', '\x00',
+ '\x7f', '\x0d', '\x88', '\x00', '\x00', '\xb0', '\xed', '\xdb',
+ '\x41', '\x12', '\x7f', '\x0d', '\x94', '\x00', '\x00', '\xb0',
+ '\xe1', '\x1b', '\x7f', '\x0d', '\xa0', '\x00', '\x00', '\xb0',
+ '\x70', '\x8a', '\x5f', '\x9c', '\x02', '\x01', '\x7f', '\x0d',
+ '\x9c', '\x00', '\x00', '\xb0', '\xe9', '\x9b', '\x43', '\xc2',
+ '\x7f', '\x0d', '\x98', '\x00', '\x00', '\xb0', '\xec', '\xcb',
+ '\x44', '\xd2', '\x7f', '\x0d', '\xd0', '\x01', '\x00', '\xb0',
+ '\xcd', '\xdb', '\x6f', '\x0e', '\xd4', '\x01', '\x00', '\xb0',
+ '\xc0', '\xdb', '\x6f', '\xbe', '\x14', '\x1c', '\x00', '\x38',
+ '\x6b', '\x96', '\x4f', '\xcc', '\x26', '\x00', '\xd9', '\xcf',
+ '\x79', '\x4a', '\x6f', '\xde', '\x4a', '\x1c', '\x00', '\x38',
+ '\x04', '\xb1', '\xed', '\xdb', '\x6f', '\x9e', '\x6c', '\x1c',
+ '\x00', '\x38', '\x08', '\xb1', '\xe9', '\x9b', '\x6d', '\x96',
+ '\x5f', '\xce', '\xdc', '\x05', '\xd9', '\xcf', '\x47', '\xc2',
+ '\xd9', '\xcb', '\x6f', '\x9e', '\x04', '\x01', '\x00', '\x38',
+ '\x69', '\x9a', '\x08', '\xd1', '\xe9', '\x9b', '\x6f', '\xce',
+ '\x2a', '\x1c', '\x00', '\x38', '\x6f', '\x9e', '\x00', '\x8c',
+ '\x40', '\x02', '\x79', '\x67', '\x6c', '\xd6', '\xed', '\x9f',
+ '\x5f', '\x9e', '\x00', '\x01', '\x79', '\x27', '\xdd', '\x9b',
+ '\x6c', '\xa6', '\x86', '\xa2', '\x4f', '\x9c', '\x40', '\x00',
+ '\x79', '\x27', '\x06', '\xc1', '\xd9', '\x9b', '\x6f', '\x9e',
+ '\x00', '\x03', '\xaa', '\xaa', '\x79', '\x67', '\x08', '\xc1',
+ '\xe9', '\x9b', '\x6f', '\x9e', '\x56', '\x88', '\x8c', '\x40',
+ '\x79', '\x67', '\x0c', '\xc1', '\xe9', '\x9b', '\x7e', '\x92',
+ '\x79', '\x67', '\x10', '\xc1', '\xe9', '\x9b', '\x14', '\xc1',
+ '\x70', '\x8a', '\x18', '\xc1', '\x70', '\x8a', '\x6f', '\xde',
+ '\x9e', '\x1c', '\x00', '\x38', '\x6d', '\x96', '\x4f', '\xcc',
+ '\x26', '\x00', '\xd9', '\xcf', '\x47', '\xc2', '\xd9', '\xcb',
+ '\x08', '\xd1', '\xea', '\xab', '\x7f', '\x0d', '\x5a', '\x1c',
+ '\x00', '\x38', '\x70', '\x0a', '\x7f', '\x0d', '\x9a', '\x1c',
+ '\x00', '\x38', '\x70', '\x8a', '\x7f', '\x0d', '\xa4', '\x01',
+ '\x00', '\xb0', '\xeb', '\xbb', '\xc0', '\x1b', '\x7f', '\xb6',
+ '\xbe', '\x1f', '\xfc', '\xe1', '\x7e', '\xbe', '\x84', '\xe2',
+ '\xfe', '\x0b', '\x6f', '\x0e', '\x4a', '\x1c', '\x00', '\x38',
+ '\x0e', '\x01', '\x5d', '\x9e', '\x81', '\x93', '\xb4', '\xa0',
+ '\x7a', '\x86', '\x7d', '\x4a', '\x6f', '\x9e', '\x14', '\x1c',
+ '\x00', '\x38', '\x7f', '\x0d', '\xa4', '\x01', '\x00', '\xb0',
+ '\xe9', '\x9b', '\x6f', '\xde', '\x86', '\x1c', '\x00', '\x38',
+ '\x6d', '\xda', '\x7d', '\x67', '\x6f', '\x9e', '\x9a', '\x1c',
+ '\x00', '\x38', '\x69', '\x9a', '\x01', '\x92', '\xe9', '\xd6',
+ '\x8a', '\x20', '\x41', '\xa2', '\x41', '\x92', '\x7f', '\x0d',
+ '\x96', '\x1c', '\x00', '\x38', '\xc9', '\x9b', '\x6f', '\x9e',
+ '\x20', '\x00', '\x00', '\xb0', '\x69', '\x9a', '\xf0', '\x93',
+ '\x7f', '\x0d', '\xae', '\x1c', '\x00', '\x38', '\xe9', '\x9b',
+ '\x6f', '\xae', '\x92', '\x1c', '\x00', '\x38', '\x0c', '\x01',
+ '\x5b', '\xb8', '\x6a', '\xda', '\x2b', '\xd6', '\x84', '\xd2',
+ '\xea', '\xdb', '\x08', '\x01', '\x6c', '\x9e', '\x2b', '\x96',
+ '\x84', '\x92', '\xec', '\x9b', '\x60', '\xc6', '\x6f', '\xbe',
+ '\x00', '\x01', '\x00', '\x38', '\x6b', '\x9a', '\xad', '\x96',
+ '\x84', '\x92', '\xdf', '\x9c', '\xdb', '\x05', '\x0a', '\x90',
+ '\x0f', '\x05', '\x6b', '\x9a', '\x9a', '\x9a', '\x06', '\xe0',
+ '\x04', '\x92', '\x5f', '\x9e', '\xdc', '\x05', '\xdc', '\x9b',
+ '\x6f', '\xce', '\x4a', '\x1c', '\x00', '\x38', '\x5c', '\xda',
+ '\x5d', '\x94', '\x26', '\x92', '\xcf', '\x9c', '\x3f', '\x00',
+ '\x04', '\x90', '\x0f', '\x05', '\x5a', '\xd2', '\xdc', '\xdb',
+ '\x6f', '\xde', '\x9a', '\x1c', '\x00', '\x38', '\x6d', '\x9a',
+ '\x01', '\x92', '\xed', '\x9b', '\x3f', '\xbd', '\x30', '\x04',
+ '\x00', '\x38', '\x41', '\xa2', '\xbe', '\x0f', '\x3e', '\x0d',
+ '\x6f', '\x9e', '\x5a', '\x1c', '\x00', '\x38', '\x89', '\x0b',
+ '\x44', '\x20', '\x41', '\xc2', '\xc9', '\xcb', '\x6f', '\x9e',
+ '\x04', '\x00', '\x00', '\xb0', '\x69', '\x9a', '\x06', '\x93',
+ '\xc4', '\x92', '\x1e', '\x20', '\x0f', '\x05', '\x6f', '\x9e',
+ '\x24', '\x1c', '\x00', '\x38', '\x6f', '\xde', '\xdc', '\x00',
+ '\x00', '\x38', '\x6d', '\xda', '\xe9', '\xdf', '\x6f', '\xce',
+ '\xe0', '\x00', '\x00', '\x38', '\x5c', '\xca', '\x16', '\xe0',
+ '\xd9', '\xcb', '\x6f', '\xde', '\x24', '\x1c', '\x00', '\x38',
+ '\x6f', '\x9e', '\x72', '\x1c', '\x00', '\x38', '\x69', '\xce',
+ '\xed', '\xcf', '\x59', '\x9a', '\xdd', '\x9b', '\x6f', '\xde',
+ '\x24', '\x1c', '\x00', '\x38', '\x6f', '\x9e', '\x9a', '\x1c',
+ '\x00', '\x38', '\x69', '\x9a', '\x79', '\x67', '\x1a', '\xd1',
+ '\xe9', '\x9b', '\x42', '\x92', '\x79', '\x67', '\x1e', '\xd1',
+ '\xe9', '\x9b', '\x6f', '\x9e', '\x9e', '\x1c', '\x00', '\x38',
+ '\x47', '\xd2', '\x02', '\x91', '\xdd', '\xdb', '\x4f', '\xcc',
+ '\x26', '\x00', '\xd9', '\xcb', '\x3f', '\x0d', '\xb2', '\x04',
+ '\x00', '\x38', '\x6f', '\x9e', '\x9e', '\x1c', '\x00', '\x38',
+ '\x7f', '\x0d', '\xa0', '\x01', '\x00', '\xb0', '\xe9', '\x9b',
+ '\x41', '\x92', '\x7f', '\x0d', '\xd0', '\x01', '\x00', '\xb0',
+ '\xc9', '\x9b', '\x6f', '\x9e', '\xa0', '\x01', '\x00', '\xb0',
+ '\x69', '\x9a', '\xf7', '\x20', '\x0f', '\x05', '\x7f', '\xb6',
+ '\x0f', '\x05', '\x6f', '\x9e', '\x9e', '\x1c', '\x00', '\x38',
+ '\x6f', '\xce', '\x5c', '\x1c', '\x00', '\x38', '\x04', '\x91',
+ '\xec', '\xcb', '\x02', '\x91', '\x70', '\x4a', '\x8a', '\x0b',
+ '\x0c', '\x30', '\x7d', '\x86', '\x01', '\xd2', '\x4a', '\xd5',
+ '\x80', '\x0b', '\xf9', '\x20', '\x0f', '\x05', '\x7f', '\x0d',
+ '\x42', '\x1c', '\x00', '\x38', '\x70', '\x8a', '\x6f', '\x9e',
+ '\x5c', '\x1c', '\x00', '\x38', '\x47', '\xc2', '\x02', '\x91',
+ '\xdc', '\xcb', '\x08', '\x91', '\xea', '\xab', '\x01', '\xd2',
+ '\xd9', '\xdb', '\x3f', '\x0d', '\xb2', '\x04', '\x00', '\x38',
+ '\xfc', '\xe1', '\x7e', '\xbe', '\x84', '\xe2', '\xee', '\xab',
+ '\x6f', '\x9e', '\x9e', '\x1c', '\x00', '\x38', '\x6f', '\xde',
+ '\x5c', '\x1c', '\x00', '\x38', '\x04', '\x91', '\xed', '\xdb',
+ '\x02', '\x91', '\x70', '\x4a', '\x4b', '\xb6', '\x04', '\x20',
+ '\x46', '\x92', '\x45', '\x92', '\x79', '\x67', '\x7f', '\x0d',
+ '\x42', '\x1c', '\x00', '\x38', '\xe9', '\x9b', '\x79', '\x86',
+ '\x01', '\x92', '\xdf', '\x9c', '\x00', '\x40', '\xf9', '\x20',
+ '\x0f', '\x05', '\x6e', '\x9a', '\x79', '\x67', '\xee', '\x9b',
+ '\x6f', '\x9e', '\x5c', '\x1c', '\x00', '\x38', '\x47', '\xd2',
+ '\x02', '\x91', '\xdd', '\xdb', '\x08', '\x91', '\xee', '\xeb',
+ '\x44', '\xd2', '\xd9', '\xdb', '\x3f', '\xbd', '\xb2', '\x04',
+ '\x00', '\x38', '\x04', '\xe2', '\x3e', '\x0d', '\x00', '\x00',
+ '\xfc', '\xe1', '\x7e', '\xbe', '\x84', '\xe2', '\xfe', '\x0b',
+ '\x6f', '\x0e', '\xda', '\x04', '\x00', '\x38', '\x6f', '\xae',
+ '\xf4', '\x17', '\x00', '\x38', '\xb0', '\xb9', '\x6f', '\xae',
+ '\x46', '\x1c', '\x00', '\x38', '\x6a', '\xaa', '\x7a', '\x67',
+ '\x41', '\xb2', '\x3f', '\xbd', '\x20', '\x05', '\x00', '\x38',
+ '\x6f', '\xae', '\xc0', '\x1b', '\x00', '\x38', '\xb0', '\xb9',
+ '\x6f', '\x9e', '\xf0', '\x00', '\x00', '\x38', '\xef', '\x9e',
+ '\x06', '\x1c', '\x00', '\x38', '\x0e', '\x30', '\x70', '\x86',
+ '\x09', '\x0c', '\xef', '\x9e', '\x06', '\x1c', '\x00', '\x38',
+ '\xf7', '\x20', '\x0f', '\x05', '\x6f', '\xae', '\x06', '\x18',
+ '\x00', '\x38', '\x3f', '\xbd', '\xda', '\x04', '\x00', '\x38',
+ '\x60', '\xa6', '\x41', '\xb2', '\x3f', '\xbd', '\x20', '\x05',
+ '\x00', '\x38', '\x3f', '\xbd', '\xf6', '\x05', '\x00', '\x38',
+ '\x3f', '\x0d', '\x28', '\x01', '\x00', '\x38', '\xbe', '\x0f',
+ '\x3e', '\x0d', '\xff', '\xe0', '\x0f', '\x05', '\xfc', '\xe1',
+ '\x7e', '\xbe', '\x84', '\xe2', '\xfe', '\x0b', '\x6f', '\x0e',
+ '\xda', '\x04', '\x00', '\x38', '\x6f', '\xae', '\x22', '\x18',
+ '\x00', '\x38', '\xb0', '\xb9', '\x3f', '\xbd', '\x30', '\x04',
+ '\x00', '\x38', '\x6f', '\xae', '\x00', '\x1f', '\x00', '\x38',
+ '\x5f', '\xbc', '\xec', '\x01', '\x3f', '\xbd', '\x74', '\x09',
+ '\x00', '\x38', '\x6f', '\xae', '\x3c', '\x18', '\x00', '\x38',
+ '\xb0', '\xb9', '\x3f', '\xbd', '\x3a', '\x06', '\x00', '\x38',
+ '\xbe', '\x0f', '\x3e', '\xbe', '\x3f', '\x0d', '\xf2', '\x05',
+ '\x00', '\x38', '\xfc', '\xe1', '\x7e', '\xbe', '\x98', '\xe2',
+ '\xfe', '\x4b', '\x6f', '\xde', '\x00', '\x1f', '\x00', '\x38',
+ '\x6d', '\x9a', '\x79', '\x67', '\xed', '\x9f', '\xef', '\xde',
+ '\xec', '\x20', '\x00', '\x38', '\xf3', '\x20', '\x0f', '\x05',
+ '\x6f', '\x3e', '\x00', '\x1f', '\x00', '\x38', '\xa3', '\x0b',
+ '\xff', '\x3d', '\xfe', '\x02', '\x0f', '\x05', '\x63', '\x9a',
+ '\x81', '\x92', '\xcf', '\x9d', '\x0b', '\x00', '\x5f', '\x95',
+ '\x3f', '\xf8', '\x54', '\x02', '\x22', '\x01', '\x18', '\x00',
+ '\x62', '\x00', '\x90', '\x00', '\x96', '\x01', '\xc8', '\x01',
+ '\xe4', '\x00', '\x00', '\x02', '\xb8', '\x00', '\x9a', '\x02',
+ '\xce', '\x02', '\x6f', '\xae', '\x4e', '\x18', '\x00', '\x38',
+ '\x3f', '\xbd', '\xda', '\x04', '\x00', '\x38', '\x6f', '\x0e',
+ '\x20', '\x05', '\x00', '\x38', '\x04', '\x31', '\x62', '\xae',
+ '\x41', '\xb2', '\xb0', '\xb9', '\x08', '\x31', '\x61', '\xae',
+ '\x41', '\xb2', '\xb0', '\xb9', '\x6f', '\x0e', '\x9a', '\x1c',
+ '\x00', '\x38', '\x60', '\x9a', '\x81', '\x92', '\xe0', '\x9b',
+ '\x3f', '\xbd', '\x30', '\x04', '\x00', '\x38', '\x60', '\x9a',
+ '\x01', '\x92', '\xe0', '\x9b', '\x62', '\xaa', '\x61', '\xba',
+ '\x3f', '\xbd', '\x74', '\x09', '\x00', '\x38', '\xff', '\xed',
+ '\x88', '\x02', '\x0c', '\x32', '\x6f', '\xae', '\x5c', '\x18',
+ '\x00', '\x38', '\x3f', '\xbd', '\xda', '\x04', '\x00', '\x38',
+ '\x6f', '\x0e', '\x20', '\x05', '\x00', '\x38', '\x04', '\x31',
+ '\x62', '\xae', '\x41', '\xb2', '\xb0', '\xb9', '\x08', '\x31',
+ '\x61', '\xae', '\x41', '\xb2', '\xb0', '\xb9', '\x61', '\x1a',
+ '\x72', '\x09', '\xe1', '\x1b', '\xff', '\xed', '\x5a', '\x02',
+ '\x0c', '\x32', '\x6f', '\xae', '\x6c', '\x18', '\x00', '\x38',
+ '\x3f', '\xbd', '\xda', '\x04', '\x00', '\x38', '\x6f', '\x1e',
+ '\x20', '\x05', '\x00', '\x38', '\x04', '\x31', '\x60', '\xae',
+ '\x41', '\xb2', '\xb1', '\xb9', '\x60', '\xaa', '\x6a', '\xaa',
+ '\x41', '\xb2', '\xb1', '\xb9', '\xff', '\xed', '\x32', '\x02',
+ '\x08', '\x32', '\x6f', '\xae', '\x7c', '\x18', '\x00', '\x38',
+ '\x3f', '\xbd', '\xda', '\x04', '\x00', '\x38', '\x04', '\x31',
+ '\x60', '\xae', '\x41', '\xb2', '\x3f', '\xbd', '\x20', '\x05',
+ '\x00', '\x38', '\x60', '\xaa', '\xff', '\x3d', '\xc0', '\x01',
+ '\x0f', '\x05', '\x81', '\xa2', '\xfd', '\x20', '\x0f', '\x05',
+ '\xff', '\xed', '\x06', '\x02', '\x08', '\x32', '\x6f', '\x4e',
+ '\xda', '\x04', '\x00', '\x38', '\x6f', '\xae', '\x8a', '\x18',
+ '\x00', '\x38', '\xb4', '\xb9', '\x6f', '\x0e', '\x20', '\x05',
+ '\x00', '\x38', '\x04', '\x31', '\x62', '\xae', '\x41', '\xb2',
+ '\xb0', '\xb9', '\x08', '\x31', '\x61', '\xae', '\x41', '\xb2',
+ '\xb0', '\xb9', '\x62', '\x2a', '\x62', '\x2a', '\xe1', '\x2a',
+ '\xff', '\x3d', '\xb8', '\x01', '\x0f', '\x05', '\x6f', '\xae',
+ '\x98', '\x18', '\x00', '\x38', '\xb4', '\xb9', '\xff', '\xed',
+ '\xd0', '\x01', '\x0f', '\x05', '\x6f', '\x4e', '\xda', '\x04',
+ '\x00', '\x38', '\x6f', '\xae', '\xa8', '\x18', '\x00', '\x38',
+ '\xb4', '\xb9', '\x6f', '\x2e', '\x20', '\x05', '\x00', '\x38',
+ '\x04', '\x31', '\x61', '\xae', '\x41', '\xb2', '\xb2', '\xb9',
+ '\x08', '\x31', '\x60', '\xae', '\x41', '\xb2', '\xb2', '\xb9',
+ '\x61', '\xaa', '\x60', '\xba', '\x6e', '\xc6', '\x14', '\xc2',
+ '\x3f', '\xbd', '\x72', '\x0a', '\x00', '\x38', '\x6a', '\xa6',
+ '\x30', '\x20', '\x0f', '\x05', '\x6f', '\xae', '\xb4', '\x18',
+ '\x00', '\x38', '\xb4', '\xb9', '\x14', '\xe1', '\x6a', '\xaa',
+ '\x41', '\xb2', '\xb2', '\xb9', '\x14', '\xe1', '\x6a', '\xaa',
+ '\x6a', '\xb6', '\x0f', '\xbc', '\x40', '\x00', '\x8f', '\xac',
+ '\x40', '\x00', '\x3c', '\xa3', '\x3c', '\xb3', '\x3f', '\xbd',
+ '\x1a', '\x0b', '\x00', '\x38', '\xff', '\xed', '\x6a', '\x01',
+ '\x0f', '\x05', '\x6f', '\xae', '\xd0', '\x18', '\x00', '\x38',
+ '\xb4', '\xb9', '\xff', '\xed', '\x54', '\x01', '\x0c', '\x32',
+ '\x6f', '\xae', '\xe6', '\x18', '\x00', '\x38', '\x3f', '\xbd',
+ '\xda', '\x04', '\x00', '\x38', '\x6f', '\x0e', '\x20', '\x05',
+ '\x00', '\x38', '\x04', '\x31', '\x62', '\xae', '\x41', '\xb2',
+ '\xb0', '\xb9', '\x08', '\x31', '\x61', '\xae', '\x41', '\xb2',
+ '\xb0', '\xb9', '\x62', '\xaa', '\x61', '\xba', '\x3f', '\xbd',
+ '\x1a', '\x0b', '\x00', '\x38', '\xff', '\xed', '\x22', '\x01',
+ '\x0c', '\x32', '\x6f', '\xae', '\xf2', '\x18', '\x00', '\x38',
+ '\x3f', '\xbd', '\xda', '\x04', '\x00', '\x38', '\x6f', '\x0e',
+ '\x20', '\x05', '\x00', '\x38', '\x04', '\x31', '\x62', '\xae',
+ '\x41', '\xb2', '\xb0', '\xb9', '\x08', '\x31', '\x61', '\xae',
+ '\x41', '\xb2', '\xb0', '\xb9', '\x62', '\xaa', '\xe1', '\xaa',
+ '\xda', '\x90', '\x0f', '\x05', '\x7a', '\x0e', '\x08', '\x31',
+ '\xea', '\xaa', '\xf9', '\x80', '\x0f', '\x05', '\xea', '\xe0',
+ '\x0c', '\x32', '\x6f', '\xae', '\xfe', '\x18', '\x00', '\x38',
+ '\x3f', '\xbd', '\xda', '\x04', '\x00', '\x38', '\x6f', '\x0e',
+ '\x20', '\x05', '\x00', '\x38', '\x04', '\x31', '\x61', '\xae',
+ '\x41', '\xb2', '\xb0', '\xb9', '\x08', '\x31', '\x64', '\xae',
+ '\x41', '\xb2', '\xb0', '\xb9', '\x0c', '\x31', '\x62', '\xae',
+ '\x41', '\xb2', '\xb0', '\xb9', '\x6f', '\x0e', '\xba', '\x14',
+ '\x00', '\x38', '\x61', '\xaa', '\x64', '\xba', '\x62', '\xca',
+ '\xb0', '\xb9', '\x6a', '\xa6', '\xac', '\x30', '\x10', '\x32',
+ '\xc3', '\xa2', '\xae', '\x20', '\x7a', '\x86', '\x62', '\xca',
+ '\xef', '\xcd', '\x00', '\x00', '\x01', '\x00', '\x64', '\xba',
+ '\xb0', '\xb9', '\x9e', '\xe0', '\x0f', '\x05', '\x6f', '\xde',
+ '\x24', '\x1c', '\x00', '\x38', '\x6d', '\x9a', '\x7f', '\x0d',
+ '\xc0', '\x01', '\x00', '\xb0', '\xe9', '\x9b', '\x04', '\xd1',
+ '\x59', '\x98', '\x7f', '\x0d', '\xc4', '\x01', '\x00', '\xb0',
+ '\xe9', '\x9b', '\x6f', '\x1e', '\xda', '\x04', '\x00', '\x38',
+ '\x6f', '\xae', '\x06', '\x19', '\x00', '\x38', '\xb1', '\xb9',
+ '\x04', '\x31', '\x60', '\xae', '\x41', '\xb2', '\x3f', '\xbd',
+ '\x20', '\x05', '\x00', '\x38', '\x6f', '\xae', '\x0e', '\x19',
+ '\x00', '\x38', '\xb1', '\xb9', '\x60', '\x9a', '\xb9', '\x09',
+ '\x50', '\xe0', '\x08', '\x32', '\x6f', '\xae', '\x82', '\x18',
+ '\x00', '\x38', '\x3f', '\xbd', '\xda', '\x04', '\x00', '\x38',
+ '\x6f', '\x0e', '\x20', '\x05', '\x00', '\x38', '\x04', '\x31',
+ '\x61', '\xae', '\x41', '\xb2', '\xb0', '\xb9', '\x08', '\x31',
+ '\x62', '\xae', '\x41', '\xb2', '\xb0', '\xb9', '\x61', '\x1a',
+ '\x61', '\x9a', '\x08', '\x30', '\x81', '\x92', '\xe1', '\x9b',
+ '\x20', '\xe0', '\x62', '\x3a', '\x1c', '\xe0', '\x0c', '\x32',
+ '\x6f', '\xae', '\x14', '\x19', '\x00', '\x38', '\x3f', '\xbd',
+ '\xda', '\x04', '\x00', '\x38', '\x63', '\xaa', '\x41', '\xb2',
+ '\x3f', '\xbd', '\x20', '\x05', '\x00', '\x38', '\x0a', '\xe0',
+ '\x0f', '\x05', '\xa3', '\x0b', '\xff', '\x2d', '\x06', '\xfd',
+ '\x0f', '\x05', '\x6f', '\xae', '\x0e', '\x19', '\x00', '\x38',
+ '\x3f', '\xbd', '\xda', '\x04', '\x00', '\x38', '\xbe', '\x4f',
+ '\x04', '\xe2', '\x3e', '\x0d', '\xfc', '\xe1', '\x7e', '\xbe',
+ '\x8c', '\xe2', '\xfe', '\x2b', '\x6a', '\x26', '\x6b', '\x06',
+ '\x7f', '\x0d', '\x92', '\x1c', '\x00', '\x38', '\x70', '\x8a',
+ '\x7f', '\x0d', '\x04', '\x01', '\x00', '\x38', '\xea', '\xab',
+ '\x6f', '\x9e', '\x96', '\x1c', '\x00', '\x38', '\x49', '\x9a',
+ '\xcf', '\x9e', '\x01', '\x00', '\x86', '\x20', '\x0f', '\x05',
+ '\x6f', '\xde', '\x4a', '\x1c', '\x00', '\x38', '\x08', '\xd1',
+ '\xea', '\xab', '\x7f', '\x0d', '\x00', '\x01', '\x00', '\x38',
+ '\xeb', '\xbb', '\x6b', '\x96', '\x04', '\x92', '\xdf', '\x9d',
+ '\xdc', '\x05', '\xdd', '\x9b', '\x6f', '\x9e', '\xa4', '\x01',
+ '\x00', '\xb0', '\x69', '\xda', '\x6f', '\xde', '\x14', '\x1c',
+ '\x00', '\x38', '\xe9', '\xdb', '\x6f', '\xde', '\xd4', '\x01',
+ '\x00', '\xb0', '\x4d', '\x9a', '\x38', '\x93', '\x44', '\x93',
+ '\xcd', '\x9b', '\x6f', '\xde', '\xd4', '\x01', '\x00', '\xb0',
+ '\x4d', '\x9a', '\x07', '\x93', '\xcf', '\x9e', '\x04', '\x00',
+ '\xf7', '\x30', '\x0f', '\x05', '\x4d', '\x9a', '\x38', '\x93',
+ '\x41', '\x93', '\xcd', '\x9b', '\x3f', '\xbd', '\xcc', '\x01',
+ '\x00', '\x38', '\x6a', '\xa6', '\xf7', '\x30', '\x0f', '\x05',
+ '\x6f', '\xce', '\x92', '\x1c', '\x00', '\x38', '\xec', '\x0a',
+ '\x10', '\x80', '\x0f', '\x05', '\x6f', '\xde', '\xd4', '\x01',
+ '\x00', '\xb0', '\x4d', '\x9a', '\x38', '\x93', '\x41', '\x93',
+ '\xcd', '\x9b', '\xec', '\x0a', '\xd7', '\x90', '\x71', '\x86',
+ '\x22', '\xe0', '\x62', '\x96', '\x7f', '\x0d', '\x92', '\x1c',
+ '\x00', '\x38', '\xeb', '\xba', '\x14', '\x80', '\x71', '\x86',
+ '\x3f', '\xbd', '\xcc', '\x01', '\x00', '\x38', '\x7f', '\x0d',
+ '\x92', '\x1c', '\x00', '\x38', '\xe0', '\x0a', '\xf1', '\x90',
+ '\x71', '\x86', '\x62', '\x96', '\x20', '\x96', '\xe9', '\x26',
+ '\x0e', '\x30', '\x62', '\xd6', '\x0d', '\x1c', '\x62', '\x96',
+ '\x20', '\x96', '\xe9', '\xd6', '\xf7', '\x20', '\x0f', '\x05',
+ '\x6f', '\xae', '\x28', '\x19', '\x00', '\x38', '\x3f', '\xbd',
+ '\xda', '\x04', '\x00', '\x38', '\x61', '\xa6', '\x41', '\xb2',
+ '\xbe', '\x2f', '\x3e', '\xbe', '\x3f', '\x0d', '\x20', '\x05',
+ '\x00', '\x38', '\xfc', '\xe1', '\x7e', '\xbe', '\x8c', '\xe2',
+ '\xfe', '\x2b', '\x6b', '\x06', '\x6c', '\x26', '\xeb', '\xa6',
+ '\x40', '\x00', '\x6a', '\xc6', '\xe0', '\xc6', '\x32', '\x00',
+ '\x71', '\x86', '\x6c', '\xb6', '\x6c', '\x96', '\x79', '\x87',
+ '\x61', '\xd6', '\xc3', '\xd3', '\xed', '\x97', '\x49', '\xd6',
+ '\xcb', '\x9b', '\x4b', '\x9a', '\xcd', '\x96', '\x0c', '\x30',
+ '\x7d', '\x87', '\x6f', '\xae', '\x3e', '\x19', '\x00', '\x38',
+ '\x40', '\xe0', '\xe2', '\xbb', '\xcb', '\xdf', '\x01', '\x12',
+ '\xc4', '\x12', '\x06', '\x30', '\xe0', '\xb6', '\xd7', '\x10',
+ '\x6c', '\x96', '\x04', '\xc2', '\xe0', '\xc6', '\xc5', '\x10',
+ '\x0f', '\x05', '\xe0', '\xa6', '\x4e', '\x00', '\x6a', '\xc6',
+ '\xe0', '\xc6', '\x40', '\x00', '\x71', '\x86', '\x6c', '\xa6',
+ '\x61', '\x96', '\xc3', '\x93', '\x6c', '\xd6', '\xe9', '\xd7',
+ '\x4a', '\x9a', '\xcd', '\x96', '\x22', '\x30', '\x01', '\x12',
+ '\x81', '\x12', '\xe2', '\xab', '\x6f', '\xae', '\x5c', '\x19',
+ '\x00', '\x38', '\x3f', '\xbd', '\xda', '\x04', '\x00', '\x38',
+ '\x62', '\xaa', '\x41', '\xb2', '\x3f', '\xbd', '\x20', '\x05',
+ '\x00', '\x38', '\x7a', '\x86', '\xbe', '\x2f', '\x3e', '\x0d',
+ '\xc4', '\x12', '\x08', '\x30', '\x01', '\xa2', '\xe0', '\xa6',
+ '\xc9', '\x10', '\x61', '\x96', '\x04', '\xc2', '\xe0', '\xc6',
+ '\xb7', '\x10', '\x0f', '\x05', '\x41', '\xa2', '\xbe', '\x2f',
+ '\x3e', '\x0d', '\xfc', '\xe1', '\x7e', '\xbe', '\x94', '\xe2',
+ '\xfe', '\x4b', '\x6b', '\x26', '\xeb', '\xa6', '\x5a', '\x90',
+ '\x6a', '\x06', '\x60', '\xa6', '\x7b', '\x86', '\x3f', '\xbd',
+ '\x20', '\x05', '\x00', '\x38', '\x6f', '\xae', '\x7a', '\x19',
+ '\x00', '\x38', '\x3f', '\xbd', '\xda', '\x04', '\x00', '\x38',
+ '\xe2', '\x06', '\x2a', '\x90', '\x74', '\x86', '\x60', '\x16',
+ '\x60', '\x36', '\x6f', '\xae', '\xd0', '\x19', '\x00', '\x38',
+ '\x3f', '\xbd', '\xda', '\x04', '\x00', '\x38', '\x63', '\xae',
+ '\x7b', '\x86', '\x3f', '\xbd', '\x20', '\x05', '\x00', '\x38',
+ '\x01', '\x42', '\xc4', '\x42', '\x08', '\x30', '\x04', '\x12',
+ '\xe2', '\x16', '\xdf', '\x80', '\x0f', '\x05', '\x6f', '\xae',
+ '\x38', '\x18', '\x00', '\x38', '\x3f', '\xbd', '\xda', '\x04',
+ '\x00', '\x38', '\x10', '\x02', '\xe2', '\x06', '\xad', '\x80',
+ '\x60', '\xa6', '\xbe', '\x4f', '\x3e', '\x0d', '\x00', '\x00',
+ '\x05', '\xa1', '\x49', '\x98', '\xc2', '\x92', '\x0a', '\x30',
+ '\xc4', '\x92', '\x0e', '\x30', '\x0f', '\x05', '\x7f', '\xb6',
+ '\x7a', '\x86', '\x6a', '\xb9', '\x5a', '\xa8', '\x7f', '\xb6',
+ '\x0f', '\x05', '\x6a', '\xb9', '\x6a', '\xaa', '\x7f', '\xb6',
+ '\x0f', '\x05', '\x6a', '\xd6', '\x05', '\xa1', '\x4a', '\xaa',
+ '\x4a', '\x94', '\xc2', '\x92', '\x0a', '\x30', '\xc4', '\x92',
+ '\x10', '\x30', '\x0f', '\x05', '\x7f', '\xb6', '\x7a', '\x86',
+ '\x5c', '\xca', '\x6d', '\xb9', '\xdc', '\xcb', '\x7f', '\xb6',
+ '\x4a', '\xa4', '\x6c', '\xca', '\x6d', '\xb9', '\xec', '\xcb',
+ '\x4a', '\xa4', '\x7f', '\xb6', '\x0f', '\x05', '\xfc', '\xe1',
+ '\x7e', '\xbe', '\x84', '\xe2', '\xee', '\xbb', '\x04', '\xa1',
+ '\x49', '\x9a', '\xcf', '\x9e', '\x01', '\x00', '\x06', '\x20',
+ '\x0f', '\x05', '\x24', '\xe0', '\xc1', '\xc3', '\xcf', '\x9e',
+ '\x02', '\x00', '\x0c', '\x20', '\x6b', '\x96', '\xd0', '\x93',
+ '\x69', '\xb7', '\xee', '\xbb', '\x12', '\xe0', '\xc2', '\xc3',
+ '\x6f', '\xae', '\xa6', '\x19', '\x00', '\x38', '\x3f', '\xbd',
+ '\xda', '\x04', '\x00', '\x38', '\x0c', '\xe0', '\x0f', '\x05',
+ '\x6c', '\xb6', '\x6e', '\xc6', '\x3f', '\xbd', '\xaa', '\x0b',
+ '\x00', '\x38', '\x04', '\xe2', '\x3e', '\x0d', '\xfc', '\xe1',
+ '\x7e', '\xbe', '\x84', '\xe2', '\xfe', '\x0b', '\x6a', '\x06',
+ '\x4f', '\xbc', '\xaa', '\x00', '\x5f', '\xcc', '\x55', '\x05',
+ '\x3f', '\xbd', '\xd6', '\x0b', '\x00', '\x38', '\x60', '\xa6',
+ '\x4f', '\xbc', '\x55', '\x00', '\x5f', '\xcc', '\xaa', '\x02',
+ '\xbe', '\x0f', '\x3e', '\xbe', '\x3f', '\x0d', '\xd6', '\x0b',
+ '\x00', '\x38', '\xfc', '\xe1', '\x7e', '\xbe', '\x90', '\xe2',
+ '\xfe', '\x3b', '\x6a', '\x26', '\x04', '\xa1', '\x49', '\x9a',
+ '\xcf', '\x9e', '\x02', '\x00', '\x42', '\x20', '\x6b', '\x36',
+ '\x6f', '\x0e', '\x88', '\x0b', '\x00', '\x38', '\xb0', '\xb9',
+ '\x6a', '\x16', '\x62', '\xa6', '\x63', '\xb6', '\xb0', '\xb9',
+ '\x61', '\xd6', '\xf0', '\xd3', '\x1f', '\xdf', '\x40', '\x00',
+ '\x6a', '\x96', '\xf0', '\x93', '\x1f', '\x9f', '\x40', '\x00',
+ '\xe9', '\xd6', '\x14', '\x20', '\x7c', '\x86', '\x2f', '\x1f',
+ '\x40', '\x00', '\x00', '\x00', '\x2f', '\xaf', '\x40', '\x00',
+ '\x00', '\x00', '\xea', '\x16', '\x04', '\x30', '\x0f', '\x05',
+ '\x41', '\xc2', '\x6c', '\xa6', '\xbe', '\x3f', '\x3e', '\x0d',
+ '\x6f', '\x1e', '\x88', '\x0b', '\x00', '\x38', '\xb1', '\xb9',
+ '\x4a', '\x04', '\x0f', '\x0f', '\x40', '\x00', '\x62', '\xa6',
+ '\x63', '\xb6', '\xb1', '\xb9', '\x2f', '\xaf', '\x40', '\x00',
+ '\x00', '\x00', '\xea', '\x06', '\x3a', '\x25', '\xbe', '\x3f',
+ '\x3e', '\x0d', '\xfc', '\xe1', '\x7e', '\xbe', '\xa8', '\xe2',
+ '\xfe', '\x8b', '\x6a', '\x36', '\x04', '\xa1', '\x44', '\x9e',
+ '\xcf', '\x9e', '\x02', '\x00', '\x04', '\x20', '\x41', '\x72',
+ '\x42', '\x72', '\x6f', '\x2e', '\xd6', '\x0b', '\x00', '\x38',
+ '\x4f', '\xbc', '\x98', '\x00', '\x4f', '\xcc', '\x55', '\x00',
+ '\xb2', '\xb9', '\x50', '\xb2', '\xe7', '\xb4', '\x6f', '\x1e',
+ '\x88', '\x0b', '\x00', '\x38', '\x63', '\xa6', '\xb1', '\xb9',
+ '\xcf', '\xae', '\x51', '\x00', '\xff', '\x2d', '\x9c', '\x01',
+ '\x63', '\xa6', '\x51', '\xb2', '\xe7', '\xb4', '\xb1', '\xb9',
+ '\xcf', '\xae', '\x52', '\x00', '\xff', '\x2d', '\x8c', '\x01',
+ '\x63', '\xa6', '\x52', '\xb2', '\xe7', '\xb4', '\xb1', '\xb9',
+ '\xcf', '\xae', '\x59', '\x00', '\xff', '\x2d', '\x7c', '\x01',
+ '\x63', '\xa6', '\x24', '\xe1', '\x70', '\x8a', '\x6f', '\xae',
+ '\xc0', '\x19', '\x00', '\x38', '\x3f', '\xbd', '\xda', '\x04',
+ '\x00', '\x38', '\x63', '\xaa', '\x41', '\xb2', '\x3f', '\xbd',
+ '\x20', '\x05', '\x00', '\x38', '\x4f', '\xbc', '\x27', '\x00',
+ '\xe7', '\xb4', '\x63', '\xa6', '\xb1', '\xb9', '\x41', '\x92',
+ '\xea', '\x94', '\x06', '\x32', '\xe3', '\x9b', '\x86', '\x32',
+ '\x4f', '\xbc', '\x2c', '\x00', '\xe7', '\xb4', '\x63', '\xa6',
+ '\xb1', '\xb9', '\x6a', '\x86', '\x55', '\xb2', '\xe7', '\xb4',
+ '\x63', '\xa6', '\xb1', '\xb9', '\x6a', '\x06', '\x6a', '\xb6',
+ '\x04', '\xb2', '\xe7', '\xb4', '\x63', '\xa6', '\xb1', '\xb9',
+ '\xcf', '\xae', '\x30', '\x00', '\x3e', '\x20', '\x63', '\xa6',
+ '\x4f', '\xbc', '\xf0', '\x00', '\x5f', '\xcc', '\x55', '\x05',
+ '\xb2', '\xb9', '\x63', '\xa6', '\x3f', '\xbd', '\x1e', '\x0c',
+ '\x00', '\x38', '\x63', '\xa6', '\x4f', '\xbc', '\x90', '\x00',
+ '\x5f', '\xcc', '\x55', '\x05', '\xb2', '\xb9', '\x44', '\xb8',
+ '\x2b', '\xb6', '\x63', '\xa6', '\xb1', '\xb9', '\x4a', '\x54',
+ '\x0f', '\x5f', '\x80', '\xff', '\x63', '\xa6', '\x4f', '\xbc',
+ '\x98', '\x00', '\x4f', '\xcc', '\x55', '\x00', '\xb2', '\xb9',
+ '\x10', '\xe0', '\x0f', '\x05', '\x0f', '\x02', '\xe7', '\x04',
+ '\x60', '\xb6', '\xb1', '\xb9', '\xcf', '\xae', '\x03', '\x00',
+ '\x35', '\x35', '\x0a', '\x31', '\xd8', '\x8b', '\xc8', '\x82',
+ '\x12', '\xd0', '\x68', '\x46', '\x6f', '\xae', '\xd2', '\x19',
+ '\x00', '\x38', '\x3f', '\xbd', '\xda', '\x04', '\x00', '\x38',
+ '\xd2', '\xe0', '\x7a', '\x86', '\x65', '\x56', '\x94', '\x20',
+ '\x81', '\x42', '\x90', '\xe0', '\x74', '\x86', '\xc2', '\x03',
+ '\x60', '\xb6', '\x2f', '\xb2', '\xe7', '\xb4', '\x6f', '\x1e',
+ '\x88', '\x0b', '\x00', '\x38', '\x63', '\xa6', '\xb1', '\xb9',
+ '\x6a', '\x66', '\x60', '\xb6', '\x30', '\xb2', '\xe7', '\xb4',
+ '\x63', '\xa6', '\xb1', '\xb9', '\xc8', '\xa3', '\x6a', '\x67',
+ '\xc8', '\x63', '\x60', '\xb6', '\x2d', '\xb2', '\xe7', '\xb4',
+ '\x63', '\xa6', '\xb1', '\xb9', '\x6a', '\x26', '\x2e', '\x02',
+ '\xe7', '\x04', '\x63', '\xa6', '\x60', '\xb6', '\xb1', '\xb9',
+ '\xc8', '\xa3', '\x6a', '\x27', '\x65', '\x56', '\x0a', '\x30',
+ '\x01', '\x22', '\x68', '\x96', '\xa4', '\x96', '\x04', '\xe0',
+ '\x81', '\x92', '\x64', '\x96', '\x19', '\x95', '\x63', '\xd6',
+ '\x2d', '\x95', '\x6d', '\x96', '\x24', '\xe1', '\x6d', '\xda',
+ '\x0c', '\x91', '\xed', '\xdb', '\x10', '\x91', '\xe6', '\x6b',
+ '\x14', '\x91', '\xe2', '\x2b', '\x62', '\x26', '\x10', '\xd0',
+ '\x0f', '\x05', '\x24', '\xe1', '\x29', '\x6a', '\x24', '\xe1',
+ '\xe9', '\x9b', '\x81', '\x22', '\xf5', '\x20', '\x0f', '\x05',
+ '\x24', '\xe1', '\x6d', '\xda', '\x06', '\x31', '\xed', '\xda',
+ '\x1e', '\x30', '\x65', '\x56', '\x06', '\x30', '\x01', '\x42',
+ '\x81', '\x42', '\x81', '\x42', '\x65', '\x56', '\x0c', '\x30',
+ '\xe8', '\x46', '\x64', '\x46', '\x69', '\xa0', '\x64', '\x06',
+ '\x08', '\xe0', '\x63', '\xa6', '\x61', '\xb0', '\x64', '\x06',
+ '\x63', '\xa6', '\x4f', '\xbc', '\xf0', '\x00', '\x5f', '\xcc',
+ '\x55', '\x05', '\x3f', '\xbd', '\xd6', '\x0b', '\x00', '\x38',
+ '\x12', '\xe0', '\x41', '\xa2', '\x4f', '\xbc', '\xf0', '\x00',
+ '\x5f', '\xcc', '\x55', '\x05', '\x3f', '\xbd', '\xd6', '\x0b',
+ '\x00', '\x38', '\x7a', '\x86', '\xbe', '\x8f', '\x04', '\xe2',
+ '\x3e', '\x0d', '\xfc', '\xe1', '\x7e', '\xbe', '\x90', '\xe2',
+ '\xfe', '\x3b', '\x06', '\xa1', '\xa0', '\x0b', '\xff', '\x2d',
+ '\x16', '\x04', '\x6a', '\x26', '\x3f', '\xbd', '\xc2', '\x0c',
+ '\x00', '\x38', '\x6a', '\xa6', '\xff', '\x2d', '\x86', '\x03',
+ '\x41', '\xa2', '\x62', '\xa6', '\x3f', '\xbd', '\x1e', '\x0c',
+ '\x00', '\x38', '\x62', '\xa6', '\x4f', '\xbc', '\x90', '\x00',
+ '\x5f', '\xcc', '\x55', '\x05', '\x3f', '\xbd', '\xd6', '\x0b',
+ '\x00', '\x38', '\x6f', '\x1e', '\x88', '\x0b', '\x00', '\x38',
+ '\x62', '\xa6', '\x7b', '\x86', '\xb1', '\xb9', '\x6a', '\x36',
+ '\x04', '\x21', '\x40', '\xbe', '\x4b', '\xb4', '\x2b', '\xb6',
+ '\x62', '\xa6', '\xb1', '\xb9', '\x42', '\x92', '\xc0', '\x9a',
+ '\x1c', '\x20', '\x63', '\xc6', '\xf0', '\xc3', '\x53', '\x94',
+ '\xe9', '\xc6', '\x14', '\x20', '\x63', '\x06', '\x6a', '\xd6',
+ '\xf0', '\xd3', '\x5a', '\x94', '\xe9', '\xd6', '\x0a', '\x20',
+ '\xd0', '\x03', '\x6c', '\x36', '\x6d', '\xa6', '\x63', '\x06',
+ '\xd0', '\x03', '\x6a', '\x07', '\x62', '\xa6', '\x4f', '\xbc',
+ '\xf0', '\x00', '\x5f', '\xcc', '\x55', '\x05', '\x3f', '\xbd',
+ '\xd6', '\x0b', '\x00', '\x38', '\xef', '\x0e', '\xc0', '\x00',
+ '\x1f', '\x00', '\xff', '\x3d', '\x48', '\x02', '\x0f', '\x05',
+ '\x60', '\x90', '\x0f', '\x05', '\xef', '\x0e', '\xc4', '\x22',
+ '\x01', '\x00', '\xb0', '\x30', '\x0f', '\x05', '\x20', '\x90',
+ '\x0f', '\x05', '\xef', '\x0e', '\x58', '\x22', '\x01', '\x00',
+ '\xff', '\x3d', '\x5a', '\x01', '\x0f', '\x05', '\xef', '\x0e',
+ '\x5b', '\x22', '\x01', '\x00', '\xff', '\x3d', '\x4e', '\x01',
+ '\x0f', '\x05', '\xff', '\xed', '\xb6', '\x02', '\x0f', '\x05',
+ '\xef', '\x0e', '\xda', '\x22', '\x01', '\x00', '\xff', '\x3d',
+ '\x9c', '\x01', '\x0f', '\x05', '\x14', '\x90', '\x0f', '\x05',
+ '\xef', '\x0e', '\xd6', '\x22', '\x01', '\x00', '\xff', '\x3d',
+ '\x8c', '\x01', '\x0f', '\x05', '\xff', '\xed', '\x94', '\x02',
+ '\x0f', '\x05', '\xef', '\x0e', '\x49', '\x22', '\x04', '\x00',
+ '\xc4', '\x30', '\x0f', '\x05', '\xff', '\xed', '\x84', '\x02',
+ '\x0f', '\x05', '\xef', '\x0e', '\xd7', '\x00', '\x20', '\x00',
+ '\xff', '\x3d', '\x6a', '\x01', '\x0f', '\x05', '\x20', '\x90',
+ '\x0f', '\x05', '\xef', '\x0e', '\xc2', '\x00', '\x1f', '\x00',
+ '\xff', '\x3d', '\x00', '\x02', '\x0f', '\x05', '\xef', '\x0e',
+ '\xc9', '\x00', '\x1f', '\x00', '\xff', '\x3d', '\x18', '\x02',
+ '\x0f', '\x05', '\xff', '\xed', '\x56', '\x02', '\x0f', '\x05',
+ '\xef', '\x0e', '\x4f', '\x00', '\x98', '\x00', '\xff', '\x3d',
+ '\x3c', '\x01', '\x0f', '\x05', '\x12', '\x90', '\x0f', '\x05',
+ '\xef', '\x0e', '\x43', '\x00', '\x98', '\x00', '\x76', '\x30',
+ '\x0f', '\x05', '\xff', '\xed', '\x36', '\x02', '\x0f', '\x05',
+ '\xef', '\x0e', '\xc2', '\x00', '\x98', '\x00', '\xff', '\x2d',
+ '\x2a', '\x02', '\x0f', '\x05', '\x6f', '\x1e', '\xb6', '\x1a',
+ '\x00', '\x38', '\x61', '\x1a', '\x6f', '\xde', '\x00', '\x00',
+ '\x20', '\x00', '\x06', '\x21', '\xed', '\xdb', '\x0c', '\x21',
+ '\x70', '\x8a', '\x6f', '\x9e', '\x00', '\x00', '\x01', '\x00',
+ '\x10', '\x21', '\xe9', '\x9b', '\x5f', '\xd2', '\x14', '\x21',
+ '\xed', '\xdb', '\x6f', '\x9e', '\x00', '\x00', '\x1f', '\x00',
+ '\x18', '\x21', '\xe9', '\x9b', '\x1f', '\xdc', '\xe1', '\x7f',
+ '\x1c', '\x21', '\xed', '\xdb', '\x41', '\x92', '\x20', '\x21',
+ '\xe9', '\x9b', '\x6f', '\xde', '\x00', '\x80', '\x1f', '\x00',
+ '\x24', '\x21', '\xed', '\xdb', '\x5f', '\xdc', '\x00', '\x20',
+ '\x28', '\x21', '\xed', '\xdb', '\x42', '\xd2', '\x2c', '\x21',
+ '\xed', '\xdb', '\x6f', '\xde', '\x00', '\xc0', '\x1f', '\x00',
+ '\xff', '\xed', '\x16', '\x01', '\x0f', '\x05', '\x6f', '\x1e',
+ '\xb2', '\x1a', '\x00', '\x38', '\x61', '\x1a', '\x6f', '\x9e',
+ '\x00', '\x00', '\x20', '\x00', '\x06', '\x21', '\xe9', '\x9b',
+ '\x0c', '\x21', '\x70', '\x8a', '\x5f', '\x9c', '\x00', '\x40',
+ '\x10', '\x21', '\xe9', '\x9b', '\x41', '\xd2', '\x14', '\x21',
+ '\xed', '\xdb', '\x18', '\x21', '\xe9', '\x9b', '\x5f', '\x9c',
+ '\x00', '\x20', '\x1c', '\x21', '\xe9', '\x9b', '\x42', '\x92',
+ '\x20', '\x21', '\xe9', '\x9b', '\x1f', '\x9c', '\xfe', '\x7f',
+ '\x24', '\x21', '\xe9', '\x9b', '\x28', '\x21', '\xe9', '\x9b',
+ '\x2c', '\x21', '\xed', '\xdb', '\x6f', '\x9e', '\x00', '\x00',
+ '\x01', '\x00', '\x30', '\x21', '\xe9', '\x9b', '\x34', '\x21',
+ '\xe9', '\x9b', '\x58', '\xe0', '\x5f', '\xd2', '\x6f', '\x1e',
+ '\xaa', '\x1a', '\x00', '\x38', '\x61', '\x1a', '\x6f', '\x9e',
+ '\x00', '\x00', '\x10', '\x00', '\x06', '\x21', '\xe9', '\x9b',
+ '\x0c', '\x21', '\x70', '\x8a', '\x5f', '\x9c', '\x00', '\x40',
+ '\x10', '\x21', '\xe9', '\x9b', '\x41', '\xd2', '\x14', '\x21',
+ '\xed', '\xdb', '\x18', '\x21', '\xe9', '\x9b', '\x5f', '\x9c',
+ '\x00', '\x20', '\x1c', '\x21', '\xe9', '\x9b', '\x42', '\x92',
+ '\x20', '\x21', '\xe9', '\x9b', '\x1f', '\x9c', '\xfe', '\x7f',
+ '\x24', '\x21', '\xe9', '\x9b', '\x28', '\x21', '\xe9', '\x9b',
+ '\x2c', '\x21', '\xed', '\xdb', '\x6f', '\x9e', '\x00', '\x00',
+ '\x01', '\x00', '\x30', '\x21', '\xe9', '\x9b', '\x34', '\x21',
+ '\xe9', '\x9b', '\x4f', '\xd2', '\x38', '\x21', '\xed', '\xdb',
+ '\xff', '\xed', '\x3e', '\x01', '\x0f', '\x05', '\x6f', '\x1e',
+ '\xae', '\x1a', '\x00', '\x38', '\x61', '\x1a', '\x6f', '\x9e',
+ '\x00', '\x00', '\x10', '\x00', '\x06', '\x21', '\xe9', '\x9b',
+ '\x0c', '\x21', '\x70', '\x8a', '\x6f', '\xde', '\x00', '\x00',
+ '\x01', '\x00', '\x10', '\x21', '\xed', '\xdb', '\x4f', '\x92',
+ '\x14', '\x21', '\xe9', '\x9b', '\x6f', '\xde', '\x00', '\x00',
+ '\x0f', '\x00', '\x18', '\x21', '\xed', '\xdb', '\x1f', '\x9c',
+ '\xf1', '\x7f', '\x1c', '\x21', '\xe9', '\x9b', '\x41', '\x92',
+ '\x20', '\x21', '\xe9', '\x9b', '\x6f', '\xde', '\x00', '\x80',
+ '\x0f', '\x00', '\x24', '\x21', '\xed', '\xdb', '\x5f', '\xdc',
+ '\x00', '\x20', '\x28', '\x21', '\xed', '\xdb', '\x42', '\xd2',
+ '\x2c', '\x21', '\xed', '\xdb', '\x6f', '\xde', '\x00', '\xc0',
+ '\x0f', '\x00', '\x30', '\x21', '\xed', '\xdb', '\x5f', '\xdc',
+ '\x00', '\x40', '\x34', '\x21', '\xed', '\xdb', '\x38', '\x21',
+ '\xe9', '\x9b', '\xce', '\xe0', '\x0f', '\x05', '\x6f', '\x1e',
+ '\xb2', '\x1a', '\x00', '\x38', '\x61', '\x1a', '\x6f', '\x9e',
+ '\x00', '\x00', '\x20', '\x00', '\x06', '\x21', '\xe9', '\x9b',
+ '\x0c', '\x21', '\x70', '\x8a', '\x5f', '\xdc', '\x00', '\x20',
+ '\x10', '\x21', '\xed', '\xdb', '\x48', '\x92', '\x14', '\x21',
+ '\xe9', '\x9b', '\x6f', '\x9e', '\x00', '\x00', '\x01', '\x00',
+ '\x18', '\x21', '\xe9', '\x9b', '\x1c', '\x21', '\xe9', '\x9b',
+ '\x62', '\xe0', '\x5f', '\xd2', '\x6f', '\x1e', '\xb6', '\x1a',
+ '\x00', '\x38', '\x61', '\x1a', '\x6f', '\x9e', '\x00', '\x00',
+ '\x20', '\x00', '\x06', '\x21', '\xe9', '\x9b', '\x0c', '\x21',
+ '\x70', '\x8a', '\x6f', '\xde', '\x00', '\x00', '\x01', '\x00',
+ '\x10', '\x21', '\xed', '\xdb', '\x26', '\xe0', '\x5f', '\x92',
+ '\x6f', '\x1e', '\xba', '\x1a', '\x00', '\x38', '\x61', '\x1a',
+ '\x6f', '\x9e', '\x00', '\x00', '\x40', '\x00', '\x06', '\x21',
+ '\xe9', '\x9b', '\x0c', '\x21', '\x70', '\x8a', '\x6f', '\xde',
+ '\x00', '\x00', '\x01', '\x00', '\x10', '\x21', '\xed', '\xdb',
+ '\x4f', '\x9c', '\x3f', '\x00', '\x14', '\x21', '\xe9', '\x9b',
+ '\x6f', '\xde', '\x00', '\x00', '\x1f', '\x00', '\x18', '\x21',
+ '\xed', '\xdb', '\x5f', '\x9c', '\x00', '\x20', '\x1c', '\x21',
+ '\xe9', '\x9b', '\x48', '\xd2', '\x20', '\x21', '\xed', '\xdb',
+ '\x30', '\xe0', '\x0f', '\x05', '\x04', '\x21', '\x49', '\x9a',
+ '\x6f', '\xae', '\xee', '\x19', '\x00', '\x38', '\xcf', '\x9e',
+ '\x01', '\x00', '\x08', '\x30', '\x0f', '\x05', '\x6f', '\xae',
+ '\x00', '\x1a', '\x00', '\x38', '\x3f', '\xbd', '\xda', '\x04',
+ '\x00', '\x38', '\x62', '\xaa', '\x41', '\xb2', '\x3f', '\xbd',
+ '\x20', '\x05', '\x00', '\x38', '\x7a', '\x86', '\xbe', '\x3f',
+ '\x3e', '\x0d', '\x6f', '\x3e', '\xda', '\x04', '\x00', '\x38',
+ '\x6f', '\xae', '\x18', '\x1a', '\x00', '\x38', '\xb3', '\xb9',
+ '\x04', '\x21', '\x40', '\x9e', '\xcf', '\x9e', '\x01', '\x00',
+ '\x0c', '\x20', '\x42', '\xd2', '\x6f', '\xae', '\x20', '\x1a',
+ '\x00', '\x38', '\xb3', '\xb9', '\x42', '\xd2', '\xc0', '\xda',
+ '\x32', '\x20', '\x47', '\xc2', '\x06', '\x21', '\x6d', '\x9e',
+ '\xc1', '\x93', '\xed', '\x9b', '\x62', '\xd6', '\x0c', '\xd1',
+ '\x69', '\x9a', '\xc1', '\x93', '\x0c', '\xd1', '\xe9', '\x9b',
+ '\x10', '\xd1', '\x69', '\x9a', '\xc1', '\x93', '\x10', '\xd1',
+ '\xe9', '\x9b', '\x81', '\xc2', '\xe9', '\x60', '\x0c', '\xd2',
+ '\x6f', '\xae', '\x22', '\x1a', '\x00', '\x38', '\x3f', '\xbd',
+ '\xda', '\x04', '\x00', '\x38', '\x6f', '\x0e', '\xda', '\x04',
+ '\x00', '\x38', '\x6f', '\xae', '\x24', '\x1a', '\x00', '\x38',
+ '\xb0', '\xb9', '\x61', '\xa6', '\xb0', '\xb9', '\x6f', '\xae',
+ '\x56', '\x19', '\x00', '\x38', '\xb0', '\xb9', '\x62', '\xaa',
+ '\x41', '\xb2', '\x3f', '\xbd', '\x20', '\x05', '\x00', '\x38',
+ '\x41', '\xa2', '\xbe', '\x3f', '\x3e', '\x0d', '\xfc', '\xe1',
+ '\x7e', '\xbe', '\x8c', '\xe2', '\xfe', '\x2b', '\x6a', '\x16',
+ '\x6b', '\x26', '\x6f', '\x0e', '\x1e', '\x0c', '\x00', '\x38',
+ '\xb0', '\xb9', '\x61', '\xa6', '\x4f', '\xbc', '\x80', '\x00',
+ '\x5f', '\xcc', '\x55', '\x05', '\x3f', '\xbd', '\xd6', '\x0b',
+ '\x00', '\x38', '\x61', '\xa6', '\xb0', '\xb9', '\x04', '\x11',
+ '\x49', '\x9a', '\xcf', '\x9e', '\x02', '\x00', '\x10', '\x20',
+ '\x0f', '\x05', '\x6f', '\x9e', '\x30', '\x00', '\x30', '\x00',
+ '\x61', '\x29', '\xe9', '\x9b', '\xbe', '\x2f', '\x3e', '\x0d',
+ '\x4f', '\x9c', '\x30', '\x00', '\x61', '\x29', '\xd9', '\x9b',
+ '\xbe', '\x2f', '\x3e', '\x0d', '\x84', '\xe2', '\xfe', '\x0b',
+ '\x06', '\xa1', '\xeb', '\xba', '\x10', '\x10', '\x0f', '\x05',
+ '\x7a', '\x86', '\x7f', '\xb6', '\xbe', '\x0f', '\x10', '\xa1',
+ '\x6a', '\xaa', '\x7f', '\xb6', '\xbe', '\x0f', '\x70', '\x86',
+ '\x0c', '\xa1', '\xeb', '\xba', '\x22', '\x10', '\x7d', '\x86',
+ '\x14', '\xa1', '\xed', '\xda', '\x10', '\x00', '\x79', '\x86',
+ '\x10', '\xa1', '\x6c', '\xca', '\x01', '\x92', '\x14', '\xa1',
+ '\xe9', '\x9a', '\xf9', '\x10', '\x2c', '\xd6', '\x0c', '\xa1',
+ '\x29', '\xda', '\xe9', '\xb6', '\xd1', '\x10', '\x0f', '\x05',
+ '\x01', '\x02', '\xc7', '\x02', '\xd3', '\x80', '\x0c', '\xa2',
+ '\x7a', '\x86', '\x7f', '\xb6', '\xbe', '\x0f', '\x84', '\xe2',
+ '\xfe', '\x0b', '\x6a', '\x06', '\x6b', '\xa6', '\x6d', '\xb6',
+ '\x7d', '\x86', '\xeb', '\xd6', '\x48', '\xa0', '\x0f', '\x05',
+ '\x60', '\x9a', '\x2d', '\x96', '\x49', '\xa5', '\x59', '\x9a',
+ '\x4c', '\xd5', '\xd9', '\x9a', '\x32', '\x30', '\x02', '\xd2',
+ '\x82', '\xd2', '\x6b', '\x96', '\x2a', '\x96', '\xe9', '\xa6',
+ '\x20', '\x00', '\x6a', '\xc6', '\x60', '\xc9', '\x59', '\x9a',
+ '\xdf', '\x9e', '\xff', '\xff', '\x0a', '\x30', '\x02', '\xc2',
+ '\x82', '\xc2', '\x42', '\xa2', '\x7f', '\xb6', '\xbe', '\x0f',
+ '\x6b', '\x96', '\x2a', '\x96', '\xe9', '\xc6', '\xe5', '\x10',
+ '\x0f', '\x05', '\x41', '\xa2', '\x7f', '\xb6', '\xbe', '\x0f',
+ '\xeb', '\xd6', '\xbd', '\xb0', '\x0f', '\x05', '\x7a', '\x86',
+ '\x7f', '\xb6', '\xbe', '\x0f', '\xfc', '\xe1', '\x7e', '\xbe',
+ '\x90', '\xe2', '\xfe', '\x3b', '\x73', '\x86', '\x72', '\x86',
+ '\x6f', '\x0e', '\xbe', '\x1a', '\x00', '\x38', '\x41', '\x12',
+ '\x04', '\x01', '\xc1', '\x1b', '\xcf', '\x1e', '\x01', '\x00',
+ '\x04', '\x30', '\x42', '\x92', '\x44', '\x92', '\x05', '\x01',
+ '\xc9', '\x9b', '\x60', '\xa6', '\x3f', '\xbd', '\xb2', '\x0e',
+ '\x00', '\x38', '\x6a', '\xa6', '\x0c', '\x20', '\x0f', '\x05',
+ '\xc1', '\x13', '\xcf', '\x1e', '\x03', '\x00', '\xd9', '\x80',
+ '\x0f', '\x05', '\x06', '\x01', '\x23', '\x3a', '\x0f', '\x0c',
+ '\x6c', '\x00', '\x01', '\x22', '\xc1', '\x22', '\xc7', '\x80',
+ '\x63', '\xa6', '\xbe', '\x3f', '\x3e', '\x0d', '\xfc', '\xe1',
+ '\x7e', '\xbe', '\x98', '\xe2', '\xfe', '\x5b', '\x6a', '\x16',
+ '\x6b', '\x56', '\x6c', '\x36', '\x70', '\x86', '\xed', '\x06',
+ '\x74', '\xa0', '\x6d', '\x46', '\x05', '\x11', '\x49', '\x9a',
+ '\xcf', '\x9e', '\x02', '\x00', '\x12', '\x20', '\x0f', '\x05',
+ '\x43', '\x05', '\x59', '\x9a', '\xdf', '\x9e', '\xff', '\xff',
+ '\x54', '\x30', '\x42', '\x22', '\x05', '\x11', '\x49', '\x9a',
+ '\xcf', '\x9e', '\x04', '\x00', '\x0e', '\x20', '\x61', '\xa6',
+ '\x43', '\x05', '\x69', '\x9a', '\xff', '\x92', '\x3e', '\x30',
+ '\x44', '\x22', '\x61', '\xa6', '\x3f', '\xbd', '\x1e', '\x0c',
+ '\x00', '\x38', '\x61', '\xa6', '\x4f', '\xbc', '\xa0', '\x00',
+ '\x5f', '\xcc', '\x55', '\x05', '\x3f', '\xbd', '\xd6', '\x0b',
+ '\x00', '\x38', '\x65', '\xb6', '\x20', '\xb6', '\x63', '\xc6',
+ '\x20', '\xc6', '\x61', '\xa6', '\x3f', '\xbd', '\xaa', '\x0b',
+ '\x00', '\x38', '\x6a', '\x26', '\x61', '\xa6', '\x65', '\xb6',
+ '\x20', '\xb6', '\x3f', '\xbd', '\x4a', '\x0c', '\x00', '\x38',
+ '\x6a', '\xa6', '\xf3', '\x20', '\x61', '\xa6', '\x22', '\x06',
+ '\xe4', '\x06', '\x91', '\xb0', '\x0f', '\x05', '\xbe', '\x5f',
+ '\x3e', '\x0d', '\xfc', '\xe1', '\x7e', '\xbe', '\xa4', '\xe2',
+ '\xfe', '\x8b', '\x6a', '\x16', '\x6b', '\x06', '\x6c', '\x86',
+ '\x3f', '\xbd', '\xdc', '\x13', '\x00', '\x38', '\x6a', '\x96',
+ '\x1a', '\x30', '\x41', '\xa2', '\x60', '\xd6', '\x28', '\xd6',
+ '\xe9', '\xd6', '\x14', '\x80', '\x0f', '\x05', '\x6f', '\xae',
+ '\x28', '\x1a', '\x00', '\x38', '\x3f', '\xbd', '\xda', '\x04',
+ '\x00', '\x38', '\x42', '\xa2', '\xbe', '\x8f', '\x3e', '\x0d',
+ '\x6f', '\xce', '\xc4', '\x1a', '\x00', '\x38', '\x6c', '\xca',
+ '\xec', '\x06', '\x1e', '\x10', '\xec', '\xd6', '\x6f', '\x9e',
+ '\x96', '\x1b', '\x00', '\x38', '\x09', '\x91', '\x70', '\x8a',
+ '\x16', '\x91', '\xe1', '\x1b', '\xac', '\x06', '\x1a', '\x91',
+ '\xe0', '\x0b', '\x1e', '\x91', '\xe8', '\x8b', '\x74', '\xe0',
+ '\x0f', '\x05', '\x5a', '\x80', '\x6c', '\x96', '\x6f', '\xde',
+ '\x96', '\x1b', '\x00', '\x38', '\x01', '\xd1', '\xe1', '\x1b',
+ '\x05', '\xd1', '\xe0', '\x0b', '\xa0', '\x96', '\x09', '\xd1',
+ '\xe9', '\x9b', '\x29', '\x16', '\x16', '\xd1', '\xe1', '\x1b',
+ '\x1a', '\xd1', '\x70', '\x8a', '\x68', '\xc6', '\xa9', '\xc6',
+ '\x1e', '\xd1', '\xec', '\xcb', '\x46', '\xe0', '\x0f', '\x05',
+ '\x6f', '\xae', '\x44', '\x1a', '\x00', '\x38', '\x3f', '\xbd',
+ '\xda', '\x04', '\x00', '\x38', '\x44', '\xa2', '\xbe', '\x8f',
+ '\x3e', '\x0d', '\x6f', '\xae', '\x58', '\x1a', '\x00', '\x38',
+ '\x3f', '\xbd', '\xda', '\x04', '\x00', '\x38', '\x60', '\xa6',
+ '\x41', '\xb2', '\x3f', '\xbd', '\x20', '\x05', '\x00', '\x38',
+ '\x43', '\xa2', '\xbe', '\x8f', '\x3e', '\x0d', '\x6f', '\x9e',
+ '\x96', '\x1b', '\x00', '\x38', '\x01', '\x91', '\xe1', '\x1b',
+ '\x05', '\x91', '\xe0', '\x0b', '\x09', '\x91', '\xe8', '\x8b',
+ '\x1e', '\x91', '\x70', '\x8a', '\x6f', '\xce', '\x96', '\x1b',
+ '\x00', '\x38', '\x7c', '\x0a', '\x0d', '\xc1', '\x70', '\x8a',
+ '\x11', '\xc1', '\x70', '\x8a', '\x15', '\xc1', '\x79', '\x0e',
+ '\x7f', '\x0d', '\xb8', '\x1b', '\x00', '\x38', '\x70', '\x8a',
+ '\x7f', '\x0d', '\xbc', '\x1b', '\x00', '\x38', '\x70', '\x8a',
+ '\x0d', '\x91', '\xe8', '\x8a', '\xff', '\x8d', '\xc0', '\x01',
+ '\x75', '\x86', '\x65', '\x56', '\x04', '\x20', '\x6c', '\xd6',
+ '\x15', '\xd2', '\x65', '\x96', '\x29', '\x55', '\x65', '\x36',
+ '\x23', '\x95', '\x09', '\xd1', '\x69', '\x9a', '\x24', '\x30',
+ '\x2c', '\x36', '\x0d', '\xd1', '\xe9', '\x9a', '\x1c', '\x80',
+ '\x0f', '\x05', '\x09', '\x31', '\x69', '\x9a', '\x10', '\x30',
+ '\x0f', '\x05', '\x83', '\x0b', '\x0a', '\x20', '\x0f', '\x05',
+ '\x0d', '\x31', '\xe9', '\x9a', '\x06', '\x20', '\x0f', '\x05',
+ '\x65', '\x56', '\x35', '\x35', '\x11', '\x31', '\x63', '\x3a',
+ '\xca', '\x32', '\x4d', '\x90', '\x65', '\x96', '\x29', '\x55',
+ '\x65', '\x36', '\x23', '\x95', '\x2f', '\x3e', '\x96', '\x1b',
+ '\x00', '\x38', '\x05', '\x31', '\x64', '\x4a', '\x0d', '\x31',
+ '\x69', '\x9a', '\x29', '\x46', '\x01', '\x31', '\x27', '\x9a',
+ '\x65', '\xa6', '\xc3', '\xa3', '\xa5', '\xa6', '\xc2', '\xa3',
+ '\xa5', '\xa6', '\xc2', '\xa3', '\x2f', '\xae', '\xbe', '\x1a',
+ '\x00', '\x38', '\x64', '\xb6', '\x3f', '\xbd', '\x2c', '\x13',
+ '\x00', '\x38', '\x83', '\x0b', '\x24', '\x30', '\x6a', '\x66',
+ '\x65', '\xa6', '\xc3', '\xa3', '\xa5', '\xa6', '\xc2', '\xa3',
+ '\xa5', '\xa6', '\xc2', '\xa3', '\x2f', '\xae', '\xbe', '\x1a',
+ '\x00', '\x38', '\x64', '\xb6', '\x3f', '\xbd', '\x4a', '\x0c',
+ '\x00', '\x38', '\x6a', '\xa6', '\xe5', '\x20', '\x65', '\xa6',
+ '\x73', '\x0a', '\x65', '\x26', '\xc3', '\x23', '\xa5', '\x26',
+ '\xc2', '\x23', '\xa5', '\x26', '\xc2', '\x23', '\x2f', '\x2e',
+ '\xbe', '\x1a', '\x00', '\x38', '\x62', '\xa6', '\x4f', '\xbc',
+ '\xf0', '\x00', '\x5f', '\xcc', '\x55', '\x05', '\x3f', '\xbd',
+ '\xd6', '\x0b', '\x00', '\x38', '\x62', '\xa6', '\x64', '\xb6',
+ '\x67', '\xc6', '\x66', '\xd6', '\x3f', '\xbd', '\x7e', '\x13',
+ '\x00', '\x38', '\x4a', '\xa6', '\x28', '\x20', '\x7b', '\x86',
+ '\x0d', '\x31', '\x69', '\xde', '\x26', '\xd6', '\xe9', '\xdb',
+ '\x11', '\x31', '\x70', '\x8a', '\x62', '\xaa', '\x24', '\xa6',
+ '\x3f', '\xbd', '\x20', '\x05', '\x00', '\x38', '\x6f', '\xae',
+ '\x62', '\x1a', '\x00', '\x38', '\x3f', '\xbd', '\xda', '\x04',
+ '\x00', '\x38', '\xaa', '\xe0', '\x0f', '\x05', '\xcf', '\xae',
+ '\x01', '\x00', '\x4c', '\x30', '\x0f', '\x05', '\xcf', '\xae',
+ '\x02', '\x00', '\x46', '\x20', '\x65', '\xa6', '\x62', '\xaa',
+ '\x24', '\xa6', '\x6f', '\x1e', '\x20', '\x05', '\x00', '\x38',
+ '\x7b', '\x86', '\xb1', '\xb9', '\x6f', '\x0e', '\xda', '\x04',
+ '\x00', '\x38', '\x6f', '\xae', '\x76', '\x1a', '\x00', '\x38',
+ '\xb0', '\xb9', '\x66', '\xa6', '\x7b', '\x86', '\xb1', '\xb9',
+ '\x6f', '\xae', '\x82', '\x1a', '\x00', '\x38', '\xb0', '\xb9',
+ '\x62', '\xa6', '\x64', '\xb6', '\x3f', '\xbd', '\xde', '\x12',
+ '\x00', '\x38', '\x41', '\x92', '\xc3', '\x9b', '\x11', '\x31',
+ '\x6d', '\x9e', '\x01', '\x92', '\x58', '\xe0', '\xed', '\x9b',
+ '\x65', '\xa6', '\xc3', '\xa3', '\xa5', '\xa6', '\xc2', '\xa3',
+ '\xa5', '\xa6', '\xc2', '\xa3', '\x6f', '\xad', '\xbe', '\x1a',
+ '\x00', '\x38', '\x62', '\xae', '\x24', '\xa6', '\x6f', '\x1e',
+ '\x20', '\x05', '\x00', '\x38', '\x7b', '\x86', '\xb1', '\xb9',
+ '\x6f', '\x0e', '\xda', '\x04', '\x00', '\x38', '\x6f', '\xae',
+ '\x8a', '\x1a', '\x00', '\x38', '\xb0', '\xb9', '\x66', '\xa6',
+ '\x7b', '\x86', '\xb1', '\xb9', '\x6f', '\xae', '\x82', '\x1a',
+ '\x00', '\x38', '\xb0', '\xb9', '\x62', '\xa6', '\x64', '\xb6',
+ '\x67', '\xc6', '\x66', '\xd6', '\x3f', '\xbd', '\x2e', '\x14',
+ '\x00', '\x38', '\x0d', '\x31', '\x6d', '\x9e', '\x26', '\x96',
+ '\xed', '\x9b', '\x11', '\x31', '\x70', '\x8a', '\x6f', '\xce',
+ '\x96', '\x1b', '\x00', '\x38', '\x0d', '\xc1', '\x69', '\x9a',
+ '\x7f', '\x0d', '\xb8', '\x1b', '\x00', '\x38', '\x29', '\x9a',
+ '\xe8', '\x96', '\xff', '\x1d', '\x44', '\xfe', '\x0f', '\x05',
+ '\x75', '\x86', '\x6f', '\x2e', '\xbe', '\x1a', '\x00', '\x38',
+ '\x6f', '\x1e', '\x96', '\x1b', '\x00', '\x38', '\x09', '\x11',
+ '\xa0', '\x0b', '\x4c', '\x30', '\x7b', '\x86', '\x62', '\xaa',
+ '\x3f', '\xbd', '\x20', '\x05', '\x00', '\x38', '\x6f', '\xae',
+ '\x96', '\x1a', '\x00', '\x38', '\x3f', '\xbd', '\xda', '\x04',
+ '\x00', '\x38', '\x70', '\x86', '\x09', '\x11', '\xe0', '\x0a',
+ '\x22', '\x00', '\x0f', '\x05', '\x05', '\x11', '\x29', '\x0a',
+ '\x01', '\x11', '\x6d', '\xda', '\x62', '\x99', '\x59', '\x9a',
+ '\x4d', '\x05', '\xd9', '\x9a', '\xff', '\x2d', '\x9a', '\xfd',
+ '\x0f', '\x05', '\x02', '\x02', '\x09', '\x11', '\xe0', '\x0a',
+ '\xe3', '\x10', '\x0f', '\x05', '\x6f', '\xae', '\xa6', '\x1a',
+ '\x00', '\x38', '\x3f', '\xbd', '\xda', '\x04', '\x00', '\x38',
+ '\x0f', '\x2c', '\x6c', '\x00', '\x01', '\x52', '\xc1', '\x52',
+ '\xa5', '\x80', '\x15', '\x12', '\x7a', '\x86', '\xbe', '\x8f',
+ '\x3e', '\x0d', '\x00', '\x00', '\x7f', '\xb6', '\x0f', '\x05',
+ '\x00', '\x00', '\x00', '\x00', '\x0d', '\x0a', '\x0d', '\x0a',
+ '\x44', '\x65', '\x76', '\x69', '\x63', '\x65', '\x20', '\x49',
+ '\x44', '\x20', '\x3d', '\x20', '\x00', '\x00', '\x43', '\x68',
+ '\x65', '\x63', '\x6b', '\x73', '\x75', '\x6d', '\x20', '\x6f',
+ '\x66', '\x20', '\x62', '\x6f', '\x6f', '\x74', '\x6c', '\x6f',
+ '\x61', '\x64', '\x65', '\x72', '\x20', '\x69', '\x73', '\x20',
+ '\x00', '\x00', '\x57', '\x61', '\x69', '\x74', '\x69', '\x6e',
+ '\x67', '\x20', '\x66', '\x6f', '\x72', '\x20', '\x6c', '\x6f',
+ '\x61', '\x64', '\x20', '\x69', '\x6e', '\x66', '\x6f', '\x2e',
+ '\x0d', '\x0a', '\x00', '\x00', '\x47', '\x6f', '\x74', '\x20',
+ '\x6c', '\x6f', '\x61', '\x64', '\x20', '\x69', '\x6e', '\x66',
+ '\x6f', '\x2e', '\x0d', '\x0a', '\x00', '\x00', '\x50', '\x41',
+ '\x43', '\x4b', '\x45', '\x54', '\x5f', '\x49', '\x4e', '\x46',
+ '\x4f', '\x0d', '\x0a', '\x00', '\x53', '\x45', '\x54', '\x5f',
+ '\x52', '\x45', '\x47', '\x49', '\x53', '\x54', '\x45', '\x52',
+ '\x0d', '\x0a', '\x00', '\x00', '\x47', '\x45', '\x54', '\x5f',
+ '\x52', '\x45', '\x47', '\x49', '\x53', '\x54', '\x45', '\x52',
+ '\x0d', '\x0a', '\x00', '\x00', '\x50', '\x41', '\x55', '\x53',
+ '\x45', '\x5f', '\x4c', '\x4f', '\x4f', '\x50', '\x0d', '\x0a',
+ '\x00', '\x00', '\x4d', '\x45', '\x4d', '\x5f', '\x56', '\x45',
+ '\x52', '\x49', '\x46', '\x59', '\x0d', '\x0a', '\x00', '\x00',
+ '\x76', '\x65', '\x72', '\x69', '\x66', '\x79', '\x20', '\x66',
+ '\x61', '\x69', '\x6c', '\x65', '\x64', '\x0d', '\x0a', '\x00',
+ '\x4d', '\x45', '\x4d', '\x5f', '\x54', '\x45', '\x53', '\x54',
+ '\x0d', '\x0a', '\x00', '\x00', '\x23', '\x23', '\x23', '\x20',
+ '\x4d', '\x65', '\x6d', '\x6f', '\x72', '\x79', '\x20', '\x74',
+ '\x65', '\x73', '\x74', '\x20', '\x66', '\x61', '\x69', '\x6c',
+ '\x65', '\x64', '\x20', '\x61', '\x74', '\x20', '\x00', '\x00',
+ '\x50', '\x61', '\x73', '\x73', '\x65', '\x64', '\x20', '\x6d',
+ '\x65', '\x6d', '\x6f', '\x72', '\x79', '\x20', '\x74', '\x65',
+ '\x73', '\x74', '\x2e', '\x0d', '\x0a', '\x00', '\x4d', '\x45',
+ '\x4d', '\x5f', '\x44', '\x55', '\x4d', '\x50', '\x0d', '\x0a',
+ '\x00', '\x00', '\x4d', '\x45', '\x4d', '\x5f', '\x43', '\x4c',
+ '\x45', '\x41', '\x52', '\x0d', '\x0a', '\x00', '\x46', '\x4c',
+ '\x41', '\x53', '\x48', '\x0d', '\x0a', '\x00', '\x4a', '\x55',
+ '\x4d', '\x50', '\x0d', '\x0a', '\x00', '\x00', '\x45', '\x4e',
+ '\x44', '\x0d', '\x0a', '\x00', '\x23', '\x23', '\x23', '\x20',
+ '\x55', '\x6e', '\x6b', '\x6e', '\x6f', '\x77', '\x6e', '\x20',
+ '\x74', '\x79', '\x70', '\x65', '\x3a', '\x20', '\x00', '\x00',
+ '\x43', '\x68', '\x65', '\x63', '\x6b', '\x73', '\x75', '\x6d',
+ '\x20', '\x6f', '\x66', '\x20', '\x66', '\x69', '\x6c', '\x65',
+ '\x20', '\x69', '\x73', '\x20', '\x00', '\x00', '\x23', '\x23',
+ '\x23', '\x20', '\x4d', '\x65', '\x6d', '\x6f', '\x72', '\x79',
+ '\x20', '\x74', '\x65', '\x73', '\x74', '\x20', '\x31', '\x20',
+ '\x66', '\x61', '\x69', '\x6c', '\x65', '\x64', '\x20', '\x61',
+ '\x74', '\x20', '\x00', '\x00', '\x23', '\x23', '\x23', '\x20',
+ '\x4d', '\x65', '\x6d', '\x6f', '\x72', '\x79', '\x20', '\x74',
+ '\x65', '\x73', '\x74', '\x20', '\x32', '\x20', '\x66', '\x61',
+ '\x69', '\x6c', '\x65', '\x64', '\x20', '\x61', '\x74', '\x20',
+ '\x00', '\x00', '\x20', '\x3a', '\x00', '\x00', '\x38', '\x4d',
+ '\x62', '\x20', '\x42', '\x42', '\x00', '\x00', '\x38', '\x4d',
+ '\x62', '\x20', '\x54', '\x42', '\x00', '\x00', '\x31', '\x36',
+ '\x4d', '\x62', '\x20', '\x42', '\x42', '\x00', '\x31', '\x36',
+ '\x4d', '\x62', '\x20', '\x54', '\x42', '\x00', '\x33', '\x32',
+ '\x4d', '\x62', '\x20', '\x54', '\x42', '\x00', '\x55', '\x6e',
+ '\x73', '\x75', '\x70', '\x70', '\x6f', '\x72', '\x74', '\x65',
+ '\x64', '\x20', '\x69', '\x6e', '\x74', '\x65', '\x72', '\x6c',
+ '\x65', '\x61', '\x76', '\x65', '\x21', '\x0a', '\x00', '\x00',
+ '\x46', '\x6f', '\x75', '\x6e', '\x64', '\x20', '\x31', '\x20',
+ '\x78', '\x20', '\x43', '\x46', '\x49', '\x20', '\x61', '\x74',
+ '\x20', '\x00', '\x54', '\x6f', '\x6f', '\x20', '\x6d', '\x61',
+ '\x6e', '\x79', '\x20', '\x72', '\x65', '\x67', '\x69', '\x6f',
+ '\x6e', '\x73', '\x20', '\x6f', '\x6e', '\x20', '\x63', '\x68',
+ '\x69', '\x70', '\x21', '\x0a', '\x00', '\x00', '\x4e', '\x6f',
+ '\x20', '\x73', '\x69', '\x6e', '\x67', '\x6c', '\x65', '\x20',
+ '\x78', '\x31', '\x36', '\x20', '\x61', '\x74', '\x20', '\x00',
+ '\x4e', '\x6f', '\x20', '\x69', '\x6e', '\x74', '\x65', '\x72',
+ '\x6c', '\x65', '\x61', '\x76', '\x65', '\x64', '\x20', '\x78',
+ '\x31', '\x36', '\x20', '\x61', '\x74', '\x20', '\x00', '\x00',
+ '\x46', '\x6f', '\x75', '\x6e', '\x64', '\x20', '\x00', '\x00',
+ '\x31', '\x00', '\x32', '\x00', '\x20', '\x78', '\x20', '\x00',
+ '\x46', '\x61', '\x74', '\x61', '\x6c', '\x3a', '\x20', '\x66',
+ '\x6c', '\x61', '\x73', '\x68', '\x20', '\x69', '\x73', '\x20',
+ '\x74', '\x6f', '\x6f', '\x20', '\x73', '\x6d', '\x61', '\x6c',
+ '\x6c', '\x2e', '\x0a', '\x00', '\x53', '\x65', '\x63', '\x74',
+ '\x6f', '\x72', '\x20', '\x65', '\x72', '\x61', '\x73', '\x65',
+ '\x20', '\x65', '\x72', '\x72', '\x6f', '\x72', '\x0a', '\x00',
+ '\x45', '\x72', '\x72', '\x6f', '\x72', '\x20', '\x61', '\x74',
+ '\x20', '\x00', '\x3a', '\x20', '\x4e', '\x6f', '\x20', '\x6e',
+ '\x65', '\x65', '\x64', '\x20', '\x74', '\x6f', '\x20', '\x77',
+ '\x72', '\x69', '\x74', '\x65', '\x0a', '\x00', '\x3a', '\x20',
+ '\x45', '\x72', '\x61', '\x73', '\x69', '\x6e', '\x67', '\x20',
+ '\x00', '\x00', '\x20', '\x62', '\x79', '\x74', '\x65', '\x73',
+ '\x0a', '\x00', '\x3a', '\x20', '\x57', '\x72', '\x69', '\x74',
+ '\x69', '\x6e', '\x67', '\x20', '\x00', '\x00', '\x3a', '\x20',
+ '\x56', '\x65', '\x72', '\x69', '\x66', '\x79', '\x69', '\x6e',
+ '\x67', '\x2e', '\x2e', '\x2e', '\x00', '\x00', '\x4f', '\x4b',
+ '\x0a', '\x00', '\x7e', '\x19', '\x00', '\x38', '\x86', '\x19',
+ '\x00', '\x38', '\x8e', '\x19', '\x00', '\x38', '\x96', '\x19',
+ '\x00', '\x38', '\x9e', '\x19', '\x00', '\x38', '\x00', '\x00',
+ '\x00', '\x80', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x84', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x54', '\x68', '\x69', '\x73', '\x20', '\x62', '\x6f', '\x6f',
+ '\x74', '\x6c', '\x6f', '\x61', '\x64', '\x65', '\x72', '\x20',
+ '\x77', '\x61', '\x73', '\x20', '\x62', '\x75', '\x69', '\x6c',
+ '\x74', '\x20', '\x62', '\x79', '\x20', '\x72', '\x6f', '\x6f',
+ '\x74', '\x20', '\x6f', '\x6e', '\x20', '\x57', '\x65', '\x64',
+ '\x20', '\x4d', '\x61', '\x79', '\x20', '\x31', '\x36', '\x20',
+ '\x32', '\x31', '\x3a', '\x33', '\x31', '\x3a', '\x34', '\x33',
+ '\x20', '\x43', '\x45', '\x53', '\x54', '\x20', '\x32', '\x30',
+ '\x30', '\x37', '\x2e', '\x0d', '\x0a', '\x00'
+};
--- /dev/null
+/*!***************************************************************************
+*!
+*! FILE NAME : network.c
+*!
+*! DESCRIPTION: Network boot stuff for e100boot.
+*!
+*! ---------------------------------------------------------------------------
+*! HISTORY
+*!
+*! DATE NAME CHANGES
+*! ---- ---- -------
+*! 1996 Ronny Raneup Initial version
+*! 2002 05 02 Ronny Ranerup Moved it into this file
+*! ---------------------------------------------------------------------------
+*! (C) Copyright 1999, 2000, 2001, 2002 Axis Communications AB, LUND, SWEDEN
+*!***************************************************************************/
+
+/************************** Include files ********************************/
+
+#include <stdio.h>
+#include <pcap.h>
+#include <conf.h> /* from configure */
+
+#include <e100boot.h>
+#include <common.h>
+#include <network.h>
+
+/************************** Constants and macros *************************/
+
+#define CRC_LEN 4
+
+/************************** Type definitions *****************************/
+
+/************************** Global variables *****************************/
+
+udword highest_ack_received;
+udword last_ack_received = -1;
+int new_ack = FALSE;
+int got_new_packet = FALSE;
+
+unsigned char dst_addr_of_device[] = { 0x01, 0x40, 0x8c, 0x00, 0x01, 0x00 };
+unsigned char src_addr_of_device[] = { 0x02, 0x40, 0x8c, 0x00, 0x01, 0x00 };
+unsigned char eth_addr_local[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
+
+struct sockaddr sock_addr;
+int sock_fd;
+int pPacket = 0;
+pcap_t *pd;
+
+pcap_handler handler;
+
+struct packet_buf first_rec_packet;
+struct packet_buf *last_rec_packet = &first_rec_packet;
+
+int promisc = 1; /* promiscuous mode */
+int all_ids = TRUE;
+
+int both_addresses = FALSE;
+int p_packet_bpl = 8;
+int printPacketType = CHAR;
+
+unsigned int id;
+int one_id_only = TRUE;
+
+unsigned char buf[10000]; /* pcap buffer */
+
+const struct pcap_pkthdr *hdrG;
+
+char host1[MAX_STRING_LEN]; /* name of ethernet host */
+char host2[MAX_STRING_LEN]; /* name of ethernet host */
+
+/************************** Function prototypes **************************/
+
+int timeout (struct timeval *tvThen, int ms);
+int InitSendSocket (char *device_name);
+int highest_seq_received (void);
+struct packet_buf* ack_on_seq (int seq);
+struct packet_buf* packet_with_seq (int seq);
+struct timeval timeval_subtract (struct timeval *x, struct timeval *y);
+void GetNextPacket (void);
+void PrintPacket (const unsigned char *p, int size, int type);
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: net_init
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 2002 05 02 ronny Initial version
+*#
+*#***************************************************************************/
+void
+net_init(void)
+{
+ static char *dev;
+ static char errBuf[1000];
+
+ GetLocalEthAddr();
+ first_rec_packet.data = malloc(PACKET_SIZE);
+
+ if ((dev = pcap_lookupdev(errBuf)) == NULL) {
+ printf("Error %s\n", errBuf);
+ if (errno == EPERM)
+ {
+ printf("Make sure this program is executed with root privileges.\n");
+ }
+
+ exit(EXIT_FAILURE);
+ }
+
+ if ((pd = pcap_open_live(device, 200, promisc, 10, errBuf)) == NULL) {
+ printf("Error %s\n", errBuf);
+ if (errno == EPERM)
+ {
+ printf("Make sure this program is executed with root privileges.\n");
+ }
+
+ exit(EXIT_FAILURE);
+ }
+
+ handler = (pcap_handler) Handler;
+
+ InitSendSocket(device);
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: NetBoot
+*#
+*# DESCRIPTION: The main network boot routine.
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 2000 01 07 ronny Initial version
+*# 2002 05 02 ronny Fixed segv bug
+*#
+*#***************************************************************************/
+
+void
+NetBoot(void)
+{
+ struct packet_buf *p;
+ struct timeval tv;
+
+ gettimeofday(&tv, NULL);
+
+ p = create_packet(0);
+ SendToDevice(p->data, p->size);
+
+ while(1) {
+ static int all_trans = FALSE;
+
+ if (got_new_packet) {
+ got_new_packet = FALSE;
+
+ if (new_ack && first_packet) {
+ if (db4) {
+ printf("* got ACK %d.\n", last_ack_received);
+ printf("* ACK wanted %d.\n", first_packet->seq);
+ }
+ if (last_ack_received == first_packet->seq) {
+ if (!(p = create_packet(first_packet->seq+1))) {
+ //break;
+ }
+ first_packet = free_packet(first_packet);
+ }
+ }
+ }
+
+ if (new_ack || timeout(&tv, 500)) {
+ if (p) {
+ SendToDevice(p->data, p->size);
+ }
+ new_ack = FALSE;
+ gettimeofday(&tv, NULL);
+ }
+
+ GetNextPacket();
+ }
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: GetNextPacket
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 961022 ronny Initial version
+*#
+*#***************************************************************************/
+
+void
+GetNextPacket(void)
+{
+ int ret;
+
+ if (db2) printf("> GetNextPacket\n");
+
+ /* got_new_packet = FALSE;*/
+ if ((ret = pcap_dispatch(pd, 1, handler, buf)) == -1) {
+ pcap_perror(pd, "Error in pcap_dispatch");
+ exit(EXIT_FAILURE);
+ }
+
+ if (db2) printf("< GetNextPacket\n");
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: Handler
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 961022 ronny Initial version
+*#
+*#***************************************************************************/
+
+void
+Handler(unsigned char *buf, const struct pcap_pkthdr *hdr,
+ const unsigned char *p)
+{
+ const unsigned char *src = &p[6];
+ const unsigned char *dst = &p[0];
+ struct packet_header_T *h = (struct packet_header_T*)p;
+
+ if (db2) printf("> Handler\n");
+ got_new_packet = TRUE;
+ if ((!memcmp(src, eth_addr_local, 6) && !memcmp(dst, dst_addr_of_device, 6))
+ || (!memcmp(src, src_addr_of_device, 6) && !memcmp(dst, eth_addr_local, 6))) {
+ if (db1) printf("#RX######################################################\n");
+ if (db1) printf("Length: %u(0x%x)\n", (udword)hdr->len, (udword)hdr->len);
+ if (pPacket) PrintPacket(p, hdr->caplen, printPacketType);
+ DecodeSvintoBoot(p);
+ /* should clean up this... */
+ if ((ntohl(h->type) == ACK)) {
+ if (all_ids || (ntohl(h->id) == id)) {
+ if (all_ids && one_id_only) {
+ if (ntohl(h->id) == 0) {
+ all_ids = FALSE;
+ id = ntohl(h->id);
+ printf("Booting device with random id %8.8x.\n", id);
+ }
+ }
+ }
+ else {
+ printf("Got ACK from a new id, %8.8lx. Ignoring.\n",
+ (unsigned long)ntohl(h->id));
+ return;
+ }
+ new_ack = TRUE;
+ last_ack_received = ntohl(h->seq);
+ if (last_ack_received > highest_ack_received) {
+ highest_ack_received = last_ack_received;
+ }
+ }
+
+ if (db1) printf("#########################################################\n");
+
+ }
+ if (db2) printf("< Handler\n");
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: ack_on_seq
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 980817 ronny Initial version
+*#
+*#***************************************************************************/
+
+struct packet_buf *
+packet_with_seq(int seq)
+{
+ static int last_seq = 0;
+ struct packet_buf *p = first_packet;
+ struct packet_header_T *h;
+
+ if (seq < last_seq) {
+ p = first_packet;
+ }
+
+ while(p) {
+ h = (struct packet_header_T*)p->data;
+ if (ntohl(h->seq) == seq) {
+ return(p);
+ }
+ p = p->next;
+ }
+ return(NULL);
+}
+
+struct packet_buf *
+ack_on_seq(int seq)
+{
+ struct packet_buf *p = &first_rec_packet;
+ struct packet_header_T *h;
+
+ if (db1) printf("***> ack_on_seq: %d.\n", seq);
+
+ while (p) {
+ /* printf("\nPacket at %x.\n", p);*/
+ /* DecodeSvintoBoot(p->data);*/
+ h = (struct packet_header_T*)p->data;
+ if ( (ntohl(h->type) == ACK) && (ntohl(h->seq) == seq) ) {
+ if (all_ids || ntohl(h->id) == id) {
+ printf("***< ack_on_seq %d, ok.\n", seq);
+ return(p);
+ }
+ }
+ p = p->next;
+ }
+ if (db1) printf("***< ack_on_seq, no.\n");
+ return(NULL);
+}
+
+int
+highest_seq_received(void)
+{
+ struct packet_buf *p = &first_rec_packet;
+ struct packet_header_T *h;
+ int highest_seq = -1;
+
+ if (db1) printf("***> highest_seq_received\n");
+
+ while (p) {
+ /* printf("\nPacket at %x.\n", p);*/
+ /* DecodeSvintoBoot(p->data);*/
+ h = (struct packet_header_T*)p->data;
+ if ((ntohl(h->type) == ACK) && (all_ids || (ntohl(h->id) == id))) {
+ if ((int)ntohl(h->seq) > highest_seq) {
+ highest_seq = ntohl(h->seq);
+ if (db4) printf("Highest seq: %d\n", highest_seq);
+ }
+ }
+ p = p->next;
+ }
+
+ if (db1) printf("***< highest_seq_received: %d\n", highest_seq);
+ return(highest_seq);
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: PrintPacket
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 961022 ronny Initial version
+*#
+*#***************************************************************************/
+
+void
+PrintPacket(const unsigned char *p, int size, int type)
+{
+ int i;
+
+ /* printf("size %d\n", size);*/
+ for (i = 0; i != size; i++) {
+ if (i % p_packet_bpl == 0)
+ printf("\n%-4.4d: ", i);
+ if (type == UDEC)
+ printf("%-3d ", p[i]);
+ else if (type == HEX)
+ printf("%-2.2x ", p[i]);
+ else if (type == CHAR) {
+ if (isprint(p[i]))
+ printf("%-3c ", p[i]);
+ else
+ printf("%-3d ", p[i]);
+ }
+ else if (type == ASCII) {
+ if (isprint(p[i]))
+ printf("%c", p[i]);
+ else
+ printf(".");
+ }
+ }
+ printf("\n");
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: DecodeSvintoBoot
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION: Decodes packets that follow the e100boot protocol.
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 961022 ronny Initial version
+*#
+*#***************************************************************************/
+
+void
+DecodeSvintoBoot(const unsigned char *p)
+{
+ char *str;
+ volatile struct packet_header_T *ph = (struct packet_header_T*)p;
+
+ /* printf("size %d \n", sizeof(struct packet_header_T));*/
+
+ if (db4) printf("\n>DecodeSvintoBoot. Packet at 0x%x\n", (unsigned int)p);
+ if (db1) {
+ printf("%2.2x-%2.2x-%2.2x-%2.2x-%2.2x-%2.2x -> ", p[6],p[7],p[8],p[9],p[10], p[11]);
+ printf("%2.2x-%2.2x-%2.2x-%2.2x-%2.2x-%2.2x\n", p[0],p[1],p[2],p[3],p[4], p[5]);
+
+ printf("length : %4.4lx\n", (long)ntohs(ph->length));
+ printf("snap1 : %8.8lx\n", (long)ntohl(ph->snap1));
+ printf("snap2 : %8.8lx\n", (long)ntohl(ph->snap2));
+
+ switch (ntohl(ph->tag)) {
+ case 0xffffffff:
+ str = "(host > ETRAX)";
+ break;
+ case 0xfffffffe:
+ str = "(host < ETRAX)";
+ break;
+ default:
+ str = "(unknown)";
+ break;
+ }
+ printf("tag : %8.8lx %s\n", (unsigned long)ntohl(ph->tag), str);
+ printf("seq : %8.8lx\n", (unsigned long)ntohl(ph->seq));
+ }
+
+ switch (ntohl(ph->type)) {
+
+ case STRING:
+ str = "(STRING)";
+ fprintf(stderr, "%s", &p[sizeof(struct packet_header_T)]);
+ find_string((char*)&p[sizeof(struct packet_header_T)]);
+ break;
+
+ case NET_INT: {
+ char search_str[20];
+
+ str = "(NET_INT)";
+ sprintf(search_str, "0x%8.8x", ntohl(*(udword*)&p[sizeof(struct packet_header_T)]));
+ fprintf(stderr, search_str);
+ find_string(search_str);
+ break;
+ }
+
+ case NET_INT_NL: {
+ char search_str[20];
+
+ str = "(NET_INT_NL)";
+ sprintf(search_str, "0x%8.8x\n", ntohl(*(udword*)&p[sizeof(struct packet_header_T)]));
+ fprintf(stderr, search_str);
+ find_string(search_str);
+ break;
+ }
+
+ case ACK:
+ str = "(ACK)";
+ break;
+
+ case BOOT_PACKET:
+ str = "(bootpacket)";
+ break;
+
+ case BOOT_CMDS:
+ str = "(bootcmds)";
+ break;
+
+ default:
+ str = "(unknown)";
+ break;
+ }
+
+ if (db1) {
+ printf("(type : %8.8lx %s)\n", (unsigned long)ntohl(ph->type), str);
+ printf("(id : %8.8lx)\n", (unsigned long)ntohl(ph->id));
+ id = ntohl(ph->id);
+ }
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: GetLocalEthAddr
+*#
+*# PARAMETERS: None.
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 980818 ronny Initial version
+*#
+*#***************************************************************************/
+
+void
+GetLocalEthAddr(void)
+{
+ int fd;
+ struct ifreq ifr;
+
+ if ((fd = socket(AF_INET, SOCK_DGRAM, 0)) == -1) {
+ perror("socket (GetLocalEthAddr)");
+ exit(EXIT_FAILURE);
+ }
+
+ strcpy(ifr.ifr_name, device);
+ if (ioctl(fd, SIOCGIFHWADDR, &ifr) < 0) {
+ perror("ioctl");
+ exit(EXIT_FAILURE);
+ }
+
+ memcpy(eth_addr_local, ifr.ifr_hwaddr.sa_data, 6);
+ if (db1) printf("Ethernet adress for device %s is %2.2x-%2.2x-%2.2x-%2.2x-%2.2x-%2.2x\n",
+ device,
+ eth_addr_local[0],
+ eth_addr_local[1],
+ eth_addr_local[2],
+ eth_addr_local[3],
+ eth_addr_local[4],
+ eth_addr_local[5]);
+ shutdown(fd, 2);
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: SendToDevice
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 980818 ronny Initial version
+*#
+*#***************************************************************************/
+
+void
+SendToDevice(unsigned char *data, int data_len)
+{
+ char fName[MAX_STRING_LEN];
+ FILE *fd;
+ struct packet_header_T *h = (struct packet_header_T*) data;
+
+ if (db1) printf("***> SendToDevice\n");
+
+ if (db2) printf("Sending %d bytes at 0x%x to %s.\n", data_len, (unsigned int)data, device);
+ if (db1) printf("#TX######################################################\n");
+ if (db1) DecodeSvintoBoot(data);
+
+ if (db1) printf("#########################################################\n");
+ if (toFiles || cmdsOnly) {
+ if (cmdsOnly) { /* use a simpler name */
+ sprintf(fName, "e100boot.cmds");
+ }
+ else {
+ sprintf(fName, "e100boot.seq%lu", (unsigned long)ntohl(h->seq));
+ }
+ if (db2) printf("Writing packet to file '%s'.\n", fName);
+ if ((fd = fopen(fName, "w+")) == NULL) {
+ printf("Cannot open/create '%s'. %s.\n", fName, strerror(errno));
+ exit(EXIT_FAILURE);
+ }
+ fwrite(data, data_len, 1, fd);
+ fclose(fd);
+ }
+ else if (sendto(sock_fd, data, data_len, 0, &sock_addr, sizeof(sock_addr)) < 0) {
+ perror("Sendto failed:");
+ exit(EXIT_FAILURE);
+ }
+
+ if (db1) printf("<*** SendToDevice\n");
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: InitSendSocket
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 980818 ronny Initial version
+*#***************************************************************************/
+
+int
+InitSendSocket(char *device_name)
+{
+ if ((sock_fd = socket(AF_INET, SOCK_PACKET, htons(ETH_P_ALL))) < 0) {
+ perror("Socket call failed:");
+ exit(EXIT_FAILURE);
+ }
+
+ fcntl(sock_fd, F_SETFL, O_NDELAY);
+
+ sock_addr.sa_family = AF_INET;
+ strcpy(sock_addr.sa_data, device_name);
+
+ return sock_fd;
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: timeout
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 980817 ronny Initial version
+*#
+*#***************************************************************************/
+
+int
+timeout(struct timeval *tvThen, int ms)
+{
+ struct timeval tvNow;
+ struct timeval tvDiff;
+
+ (void) gettimeofday(&tvNow, NULL);
+ tvDiff = timeval_subtract(&tvNow, tvThen);
+ if (db4) printf("sec %d.%d\n", (int)tvDiff.tv_sec, (int)tvDiff.tv_usec);
+ if (ms * 1000 < (tvDiff.tv_sec * 1000000 + tvDiff.tv_usec)) {
+ if (db4) printf("TIMEOUT\n");
+ return(TRUE);
+ }
+
+ return(FALSE);
+}
+
+/****************************************************************************
+ *#
+ *# FUNCTION NAME: timeval_subtract
+ *#
+ *# PARAMETERS:
+ *#
+ *# DESCRIPTION: Subtract x-y, and return result.
+ *#
+ *# DATE NAME CHANGES
+ *# ---- ---- -------
+ *# 970128 ronny Initial version
+ *#
+ *#***************************************************************************/
+
+struct timeval
+timeval_subtract(struct timeval *x, struct timeval *y)
+{
+ struct timeval diff;
+
+ diff.tv_sec = x->tv_sec - y->tv_sec;
+ diff.tv_usec = x->tv_usec - y->tv_usec;
+
+ if (diff.tv_usec < 0) {
+ diff.tv_sec--;
+ diff.tv_usec = 1000000 + diff.tv_usec;
+ }
+
+ return diff;
+}
--- /dev/null
+
+extern unsigned char dst_addr_of_device[];
+extern unsigned char src_addr_of_device[];
+extern unsigned char eth_addr_local[];
+
+extern int pPacket;
+
+extern int promisc;
+
+extern char host1[MAX_STRING_LEN];
+extern char host2[MAX_STRING_LEN];
+
+extern int both_addresses;
+extern int printPacketType;
+extern int p_packet_bpl;
+
+
+#define UDEC 0
+#define CHAR 1
+#define ASCII 2
+#define HEX 3
+
+#define SIZE_OF_HEADER (sizeof(struct packet_header_T))
+#define DATA_SIZE 1460
+#define SNAP1 0xaaaa0300
+#define SNAP2 0x408c8856
+#define SERVER_TAG 0xffffffff
+#define CLIENT_TAG 0xfffffffe
+
+#define SIZE_OF_FIRST_HEADER (SIZE_OF_HEADER-8)
+#define PACKET_SIZE (DATA_SIZE + SIZE_OF_HEADER)
+#define SIZE_OF_BOOT_CMDS ((IO_BUF_END-IO_BUF_START)-CRC_LEN)
+
+#define BOOT_ADDRESS 0x380000f4
+
+
+void NetBoot (void);
+void SendToDevice (unsigned char *data, int data_len);
+void Handler (unsigned char *buf, const struct pcap_pkthdr *hdr, const unsigned char *p);
+void GetLocalEthAddr (void);
+void net_init (void);
+void DecodeSvintoBoot (const unsigned char *p);
--- /dev/null
+struct reg_des {
+ char *name;
+ unsigned int addr;
+} reg_des[] = {
+ { "R_WAITSTATES", 0xb0000000 },
+ { "R_BUS_CONFIG", 0xb0000004 },
+ { "R_BUS_STATUS", 0xb0000004 },
+ { "R_DRAM_TIMING", 0xb0000008 },
+ { "R_SDRAM_TIMING", 0xb0000008 },
+ { "R_DRAM_CONFIG", 0xb000000c },
+ { "R_SDRAM_CONFIG", 0xb000000c },
+ { "R_EXT_DMA_0_CMD", 0xb0000010 },
+ { "R_EXT_DMA_0_STAT", 0xb0000010 },
+ { "R_EXT_DMA_0_ADDR", 0xb0000014 },
+ { "R_EXT_DMA_1_CMD", 0xb0000018 },
+ { "R_EXT_DMA_1_STAT", 0xb0000018 },
+ { "R_EXT_DMA_1_ADDR", 0xb000001c },
+ { "R_TIMER_CTRL", 0xb0000020 },
+ { "R_TIMER_DATA", 0xb0000020 },
+ { "R_WATCHDOG", 0xb0000024 },
+ { "R_SHARED_RAM_CONFIG", 0xb0000040 },
+ { "R_SHARED_RAM_ADDR", 0xb0000044 },
+ { "R_GEN_CONFIG", 0xb000002c },
+ { "R_PORT_G_DATA", 0xb0000028 },
+ { "R_PORT_PA_SET", 0xb0000030 },
+ { "R_PORT_PA_READ", 0xb0000030 },
+ { "R_PORT_PB_SET", 0xb0000038 },
+ { "R_PORT_PB_READ", 0xb0000038 },
+ { "R_SERIAL0_CTRL", 0xb0000060 },
+ { "R_SERIAL0_READ", 0xb0000060 },
+ { "R_SERIAL0_XOFF", 0xb0000064 },
+ { "R_SERIAL1_CTRL", 0xb0000068 },
+ { "R_SERIAL1_READ", 0xb0000068 },
+ { "R_SERIAL1_XOFF", 0xb000006c },
+ { "R_SERIAL2_CTRL", 0xb0000070 },
+ { "R_SERIAL2_READ", 0xb0000070 },
+ { "R_SERIAL2_XOFF", 0xb0000074 },
+ { "R_SERIAL3_CTRL", 0xb0000078 },
+ { "R_SERIAL3_READ", 0xb0000078 },
+ { "R_SERIAL3_XOFF", 0xb000007c },
+ { "R_NETWORK_SA_0", 0xb0000080 },
+ { "R_NETWORK_SA_1", 0xb0000084 },
+ { "R_NETWORK_SA_2", 0xb0000088 },
+ { "R_NETWORK_GA_0", 0xb000008c },
+ { "R_NETWORK_GA_1", 0xb0000090 },
+ { "R_NETWORK_REC_CONFIG", 0xb0000094 },
+ { "R_NETWORK_GEN_CONFIG", 0xb0000098 },
+ { "R_NETWORK_TR_CTRL", 0xb000009c },
+ { "R_NETWORK_MGM_CTRL", 0xb00000a0 },
+ { "R_NETWORK_STAT", 0xb00000a0 },
+ { "R_REC_COUNTERS", 0xb00000a4 },
+ { "R_TR_COUNTERS", 0xb00000a8 },
+ { "R_PHY_COUNTERS", 0xb00000ac },
+ { "R_PAR0_CTRL_DATA", 0xb0000040 },
+ { "R_PAR0_STATUS_DATA", 0xb0000040 },
+ { "R_PAR0_CONFIG", 0xb0000044 },
+ { "R_PAR0_DELAY", 0xb0000048 },
+ { "R_PAR1_CTRL_DATA", 0xb0000050 },
+ { "R_PAR1_STATUS_DATA", 0xb0000050 },
+ { "R_PAR1_CONFIG", 0xb0000054 },
+ { "R_PAR1_DELAY", 0xb0000058 },
+ { "R_ATA_CTRL_DATA", 0xb0000040 },
+ { "R_ATA_STATUS_DATA", 0xb0000040 },
+ { "R_ATA_CONFIG", 0xb0000044 },
+ { "R_ATA_TRANSFER_CNT", 0xb0000048 },
+ { "R_SCSI0_CTRL", 0xb0000044 },
+ { "R_SCSI0_CMD_DATA", 0xb0000040 },
+ { "R_SCSI0_STATUS", 0xb0000048 },
+ { "R_SCSI1_CTRL", 0xb0000054 },
+ { "R_SCSI1_CMD_DATA", 0xb0000050 },
+ { "R_SCSI1_STATUS", 0xb0000058 },
+ { "R_IRQ_MASK0_RD", 0xb00000c0 },
+ { "R_IRQ_MASK0_CLR", 0xb00000c0 },
+ { "R_IRQ_READ0", 0xb00000c4 },
+ { "R_IRQ_MASK0_SET", 0xb00000c4 },
+ { "R_IRQ_MASK1_RD", 0xb00000c8 },
+ { "R_IRQ_MASK1_CLR", 0xb00000c8 },
+ { "R_IRQ_READ1", 0xb00000cc },
+ { "R_IRQ_MASK1_SET", 0xb00000cc },
+ { "R_IRQ_MASK2_RD", 0xb00000d0 },
+ { "R_IRQ_MASK2_CLR", 0xb00000d0 },
+ { "R_IRQ_READ2", 0xb00000d4 },
+ { "R_IRQ_MASK2_SET", 0xb00000d4 },
+ { "R_VECT_MASK_RD", 0xb00000d8 },
+ { "R_VECT_MASK_CLR", 0xb00000d8 },
+ { "R_VECT_READ", 0xb00000dc },
+ { "R_VECT_MASK_SET", 0xb00000dc },
+ { "R_SET_EOP", 0xb000003c },
+ { "R_DMA_CH0_HWSW", 0xb0000100 },
+ { "R_DMA_CH0_DESCR", 0xb000010c },
+ { "R_DMA_CH0_NEXT", 0xb0000104 },
+ { "R_DMA_CH0_BUF", 0xb0000108 },
+ { "R_DMA_CH0_FIRST", 0xb00001a0 },
+ { "R_DMA_CH1_HWSW", 0xb0000110 },
+ { "R_DMA_CH1_DESCR", 0xb000011c },
+ { "R_DMA_CH1_NEXT", 0xb0000114 },
+ { "R_DMA_CH1_BUF", 0xb0000118 },
+ { "R_DMA_CH1_FIRST", 0xb00001a4 },
+ { "R_DMA_CH2_HWSW", 0xb0000120 },
+ { "R_DMA_CH2_DESCR", 0xb000012c },
+ { "R_DMA_CH2_NEXT", 0xb0000124 },
+ { "R_DMA_CH2_BUF", 0xb0000128 },
+ { "R_DMA_CH2_FIRST", 0xb00001a8 },
+ { "R_DMA_CH3_HWSW", 0xb0000130 },
+ { "R_DMA_CH3_DESCR", 0xb000013c },
+ { "R_DMA_CH3_NEXT", 0xb0000134 },
+ { "R_DMA_CH3_BUF", 0xb0000138 },
+ { "R_DMA_CH3_FIRST", 0xb00001ac },
+ { "R_DMA_CH4_HWSW", 0xb0000140 },
+ { "R_DMA_CH4_DESCR", 0xb000014c },
+ { "R_DMA_CH4_NEXT", 0xb0000144 },
+ { "R_DMA_CH4_BUF", 0xb0000148 },
+ { "R_DMA_CH4_FIRST", 0xb00001b0 },
+ { "R_DMA_CH5_HWSW", 0xb0000150 },
+ { "R_DMA_CH5_DESCR", 0xb000015c },
+ { "R_DMA_CH5_NEXT", 0xb0000154 },
+ { "R_DMA_CH5_BUF", 0xb0000158 },
+ { "R_DMA_CH5_FIRST", 0xb00001b4 },
+ { "R_DMA_CH6_HWSW", 0xb0000160 },
+ { "R_DMA_CH6_DESCR", 0xb000016c },
+ { "R_DMA_CH6_NEXT", 0xb0000164 },
+ { "R_DMA_CH6_BUF", 0xb0000168 },
+ { "R_DMA_CH6_FIRST", 0xb00001b8 },
+ { "R_DMA_CH7_HWSW", 0xb0000170 },
+ { "R_DMA_CH7_DESCR", 0xb000017c },
+ { "R_DMA_CH7_NEXT", 0xb0000174 },
+ { "R_DMA_CH7_BUF", 0xb0000178 },
+ { "R_DMA_CH7_FIRST", 0xb00001bc },
+ { "R_DMA_CH8_HWSW", 0xb0000180 },
+ { "R_DMA_CH8_DESCR", 0xb000018c },
+ { "R_DMA_CH8_NEXT", 0xb0000184 },
+ { "R_DMA_CH8_BUF", 0xb0000188 },
+ { "R_DMA_CH8_FIRST", 0xb00001c0 },
+ { "R_DMA_CH9_HWSW", 0xb0000190 },
+ { "R_DMA_CH9_DESCR", 0xb000019c },
+ { "R_DMA_CH9_NEXT", 0xb0000194 },
+ { "R_DMA_CH9_BUF", 0xb0000198 },
+ { "R_DMA_CH9_FIRST", 0xb00001c4 },
+ { "R_TEST_MODE", 0xb00000fc },
+ { NULL, 0 }
+};
--- /dev/null
+
+/* cconv 1.2 12/16/97, Copyright (C) 1997, Axis Communications AB */
+
+const char ser_ima[] =
+{
+ '\x0f', '\x05', '\x0f', '\x05', '\x6f', '\xee', '\x00', '\x1f',
+ '\x00', '\x38', '\x3f', '\x0d', '\x08', '\x01', '\x00', '\x38',
+ '\x78', '\x56', '\x34', '\x12', '\x21', '\x43', '\x65', '\x87',
+ '\x6f', '\xde', '\x20', '\x00', '\x00', '\xb0', '\x5f', '\x9c',
+ '\x65', '\x6f', '\xed', '\x9b', '\x5f', '\x9c', '\x25', '\x2f',
+ '\x7f', '\x0d', '\x6c', '\x16', '\x00', '\x38', '\xe9', '\x9b',
+ '\xed', '\x9b', '\x3f', '\x0d', '\x28', '\x01', '\x00', '\x38',
+ '\xfc', '\xe1', '\x7e', '\xbe', '\x7e', '\x92', '\x7f', '\x0d',
+ '\x31', '\x00', '\x00', '\xb0', '\xc9', '\x9b', '\x7f', '\x0d',
+ '\x30', '\x00', '\x00', '\xb0', '\x70', '\x0a', '\x7f', '\x92',
+ '\x7f', '\x0d', '\x6c', '\x16', '\x00', '\x38', '\xc9', '\x9b',
+ '\x7f', '\x0d', '\x39', '\x00', '\x00', '\xb0', '\xc9', '\x9b',
+ '\x7f', '\x0d', '\x38', '\x00', '\x00', '\xb0', '\xc9', '\x9b',
+ '\x7f', '\x0d', '\x0e', '\x1b', '\x00', '\x38', '\x70', '\x8a',
+ '\x6f', '\x9e', '\x20', '\x00', '\x00', '\xb0', '\x69', '\x9a',
+ '\x79', '\x67', '\x7f', '\x0d', '\xc2', '\x1a', '\x00', '\x38',
+ '\xe9', '\x9b', '\x6f', '\x9e', '\x22', '\x00', '\x00', '\xb0',
+ '\x59', '\x9a', '\x59', '\x94', '\x7f', '\x0d', '\x2a', '\x1b',
+ '\x00', '\x38', '\xe9', '\x9b', '\x6f', '\x9e', '\x04', '\x00',
+ '\x00', '\xb0', '\x69', '\x9a', '\x06', '\x93', '\xe1', '\x93',
+ '\x81', '\x92', '\x7f', '\x0d', '\x12', '\x1b', '\x00', '\x38',
+ '\xc9', '\x9b', '\x7f', '\x0d', '\xd4', '\x1a', '\x00', '\x38',
+ '\x70', '\x4a', '\x3f', '\xbd', '\x68', '\x02', '\x00', '\x38',
+ '\x3f', '\xbd', '\xec', '\x02', '\x00', '\x38', '\x3f', '\xbd',
+ '\x0c', '\x02', '\x00', '\x38', '\x6a', '\xa6', '\xf7', '\x30',
+ '\x0f', '\x05', '\x6f', '\x9e', '\x00', '\x01', '\x00', '\x38',
+ '\x69', '\x9a', '\x7f', '\x0d', '\x0e', '\x1b', '\x00', '\x38',
+ '\xe9', '\x9a', '\x24', '\x80', '\x0f', '\x05', '\x6f', '\x9e',
+ '\x12', '\x1b', '\x00', '\x38', '\x49', '\x9a', '\xcf', '\x9e',
+ '\x01', '\x00', '\xd3', '\x20', '\x0f', '\x05', '\x6f', '\xde',
+ '\xd4', '\x01', '\x00', '\xb0', '\x4d', '\x9a', '\x38', '\x93',
+ '\x41', '\x93', '\xcd', '\x9b', '\xc1', '\xe0', '\x0f', '\x05',
+ '\x4f', '\x9e', '\x55', '\x00', '\x7f', '\x0d', '\x6c', '\x16',
+ '\x00', '\x38', '\xc9', '\x9b', '\x7f', '\x0d', '\x30', '\x00',
+ '\x00', '\xb0', '\xc9', '\x9b', '\x3e', '\xbe', '\x3f', '\x0d',
+ '\xac', '\x03', '\x00', '\x38', '\xfc', '\xe1', '\x7e', '\xbe',
+ '\x3f', '\xbd', '\xa8', '\x02', '\x00', '\x38', '\x6a', '\xa6',
+ '\x16', '\x20', '\x41', '\x92', '\x3f', '\xbd', '\x34', '\x02',
+ '\x00', '\x38', '\x6a', '\xa6', '\x0a', '\x30', '\x79', '\x86',
+ '\x3f', '\xbd', '\xec', '\x02', '\x00', '\x38', '\x79', '\x86',
+ '\x69', '\xa6', '\x3e', '\x0d', '\x84', '\xe2', '\x6f', '\x9e',
+ '\x22', '\x00', '\x00', '\xb0', '\x59', '\x9a', '\x59', '\x94',
+ '\xee', '\x9b', '\x6f', '\xce', '\x2a', '\x1b', '\x00', '\x38',
+ '\x6c', '\x9a', '\x6e', '\xda', '\xad', '\x96', '\xb9', '\x96',
+ '\xdf', '\x9c', '\x80', '\x25', '\x0a', '\xd0', '\x0f', '\x05',
+ '\x6e', '\x9a', '\xec', '\x9b', '\x04', '\xe0', '\x41', '\xa2',
+ '\x7a', '\x86', '\x7f', '\xb6', '\x04', '\xe2', '\x00', '\x00',
+ '\x6f', '\x9e', '\x6c', '\x16', '\x00', '\x38', '\x79', '\x8a',
+ '\x7f', '\x0d', '\x64', '\x00', '\x00', '\xb0', '\x70', '\x8a',
+ '\x4f', '\xde', '\x55', '\x00', '\x7f', '\x0d', '\x63', '\x00',
+ '\x00', '\xb0', '\xcd', '\xdb', '\x0b', '\xd2', '\x7f', '\x0d',
+ '\x62', '\x00', '\x00', '\xb0', '\xcd', '\xdb', '\xa0', '\xd2',
+ '\xc9', '\xdb', '\x7f', '\x0d', '\x61', '\x00', '\x00', '\xb0',
+ '\xcd', '\xdb', '\x41', '\x92', '\x7f', '\x0d', '\x14', '\x1b',
+ '\x00', '\x38', '\xc9', '\x9b', '\x7f', '\xb6', '\x0f', '\x05',
+ '\x6f', '\x9e', '\x60', '\x00', '\x00', '\xb0', '\x69', '\x9a',
+ '\x59', '\xb4', '\x1f', '\xbf', '\xff', '\x01', '\x88', '\x93',
+ '\x2e', '\xa0', '\x0f', '\x05', '\x6f', '\xce', '\x0e', '\x1b',
+ '\x00', '\x38', '\x6c', '\x9a', '\x6f', '\xde', '\x04', '\x01',
+ '\x00', '\x38', '\x6d', '\x99', '\xcb', '\xbb', '\x01', '\x92',
+ '\xec', '\x9b', '\x6f', '\x9e', '\x22', '\x00', '\x00', '\xb0',
+ '\x49', '\x9a', '\x49', '\x94', '\x7f', '\x0d', '\x2a', '\x1b',
+ '\x00', '\x38', '\xe9', '\x9b', '\x7f', '\xb6', '\x41', '\xa2',
+ '\x7f', '\xb6', '\x7a', '\x86', '\x6f', '\x9e', '\x61', '\x00',
+ '\x00', '\xb0', '\x49', '\x9a', '\x85', '\x93', '\xf5', '\xa0',
+ '\x0f', '\x05', '\x4f', '\x9e', '\x2b', '\x00', '\x7f', '\x0d',
+ '\x6c', '\x16', '\x00', '\x38', '\xc9', '\x9b', '\x7f', '\x0d',
+ '\x60', '\x00', '\x00', '\xb0', '\xc9', '\x9b', '\x7f', '\xb6',
+ '\x0f', '\x05', '\x8a', '\x0b', '\x28', '\x30', '\x0f', '\x05',
+ '\x6f', '\x9e', '\x61', '\x00', '\x00', '\xb0', '\x49', '\x9a',
+ '\x85', '\x93', '\x14', '\xa0', '\x0f', '\x05', '\x6f', '\x9e',
+ '\x6c', '\x16', '\x00', '\x38', '\x4a', '\xde', '\xc9', '\xdb',
+ '\x7f', '\x0d', '\x60', '\x00', '\x00', '\xb0', '\xcd', '\xdb',
+ '\x8a', '\x0b', '\xdd', '\x20', '\x0f', '\x05', '\x7f', '\xb6',
+ '\x0f', '\x05', '\xfc', '\xe1', '\x7e', '\xbe', '\x8e', '\xe2',
+ '\x4f', '\x9e', '\x30', '\x00', '\x01', '\xe1', '\xc9', '\x9b',
+ '\x4f', '\xde', '\x78', '\x00', '\x02', '\xe1', '\xcd', '\xdb',
+ '\x4d', '\x92', '\x0b', '\xe1', '\xc9', '\x9b', '\x4a', '\xd2',
+ '\x0c', '\xe1', '\xcd', '\xdb', '\x0d', '\xe1', '\x70', '\x0a',
+ '\x4b', '\xb6', '\x06', '\x20', '\x7c', '\x86', '\x0b', '\xe1',
+ '\x70', '\x0a', '\x6c', '\x96', '\xc2', '\x93', '\x6a', '\xb6',
+ '\xe9', '\xb7', '\x4b', '\xd6', '\x0f', '\xd3', '\xcf', '\xde',
+ '\x09', '\x00', '\x04', '\x80', '\x49', '\x92', '\x07', '\xd2',
+ '\xac', '\x96', '\x4e', '\xb2', '\x2e', '\xb6', '\x2b', '\x96',
+ '\x30', '\xd2', '\xf3', '\x91', '\xcd', '\xdb', '\x01', '\xc2',
+ '\xc8', '\xc2', '\xd9', '\x20', '\x6c', '\x96', '\x6e', '\xa6',
+ '\x01', '\xa2', '\x3f', '\xbd', '\x12', '\x03', '\x00', '\x38',
+ '\x0e', '\xe2', '\x3e', '\x0d', '\xfc', '\xe1', '\x7e', '\xbe',
+ '\x84', '\xe2', '\xfe', '\x0b', '\x4f', '\x9e', '\xaa', '\xff',
+ '\x7f', '\x0d', '\x6c', '\x16', '\x00', '\x38', '\xc9', '\x9b',
+ '\x7f', '\x0d', '\x30', '\x00', '\x00', '\xb0', '\xc9', '\x9b',
+ '\x6f', '\x0e', '\x12', '\x03', '\x00', '\x38', '\x6f', '\xae',
+ '\x70', '\x16', '\x00', '\x38', '\xb0', '\xb9', '\x6f', '\xae',
+ '\xc2', '\x1a', '\x00', '\x38', '\x6a', '\xaa', '\x7a', '\x67',
+ '\x41', '\xb2', '\x3f', '\xbd', '\x42', '\x03', '\x00', '\x38',
+ '\x6f', '\xae', '\x3c', '\x1a', '\x00', '\x38', '\xb0', '\xb9',
+ '\x6f', '\x9e', '\xf0', '\x00', '\x00', '\x38', '\xef', '\x9e',
+ '\x82', '\x1a', '\x00', '\x38', '\x0e', '\x30', '\x70', '\x86',
+ '\x09', '\x0c', '\xef', '\x9e', '\x82', '\x1a', '\x00', '\x38',
+ '\xf7', '\x20', '\x0f', '\x05', '\x6f', '\xae', '\x82', '\x16',
+ '\x00', '\x38', '\x3f', '\xbd', '\x12', '\x03', '\x00', '\x38',
+ '\x60', '\xa6', '\x41', '\xb2', '\x3f', '\xbd', '\x42', '\x03',
+ '\x00', '\x38', '\x3f', '\xbd', '\x74', '\x04', '\x00', '\x38',
+ '\x3f', '\x0d', '\x28', '\x01', '\x00', '\x38', '\xbe', '\x0f',
+ '\x3e', '\x0d', '\x84', '\xe2', '\x4f', '\x9e', '\x55', '\x00',
+ '\x7f', '\x0d', '\x6c', '\x16', '\x00', '\x38', '\xc9', '\x9b',
+ '\x7f', '\x0d', '\x30', '\x00', '\x00', '\xb0', '\xc9', '\x9b',
+ '\x6f', '\x9e', '\x30', '\x00', '\x00', '\xb0', '\x69', '\xda',
+ '\x7d', '\x87', '\x7f', '\x0d', '\x6c', '\x16', '\x00', '\x38',
+ '\xcd', '\xdb', '\xc9', '\xdb', '\x7e', '\x8a', '\x6e', '\x9a',
+ '\xef', '\x9e', '\x80', '\x84', '\x1e', '\x00', '\xe1', '\x30',
+ '\x0f', '\x05', '\x6e', '\x9a', '\x01', '\x92', '\xee', '\x9b',
+ '\xed', '\xe0', '\x0f', '\x05', '\xfc', '\xe1', '\x7e', '\xbe',
+ '\x84', '\xe2', '\xfe', '\x0b', '\x6f', '\x0e', '\x12', '\x03',
+ '\x00', '\x38', '\x6f', '\xae', '\x9e', '\x16', '\x00', '\x38',
+ '\xb0', '\xb9', '\x3f', '\xbd', '\xec', '\x02', '\x00', '\x38',
+ '\x6f', '\xae', '\x00', '\x1f', '\x00', '\x38', '\x5f', '\xbc',
+ '\xec', '\x01', '\x3f', '\xbd', '\xf2', '\x07', '\x00', '\x38',
+ '\x6f', '\xae', '\xb8', '\x16', '\x00', '\x38', '\xb0', '\xb9',
+ '\x3f', '\xbd', '\xb8', '\x04', '\x00', '\x38', '\xbe', '\x0f',
+ '\x3e', '\xbe', '\x3f', '\x0d', '\x32', '\x04', '\x00', '\x38',
+ '\xfc', '\xe1', '\x7e', '\xbe', '\x98', '\xe2', '\xfe', '\x4b',
+ '\x6f', '\xde', '\x00', '\x1f', '\x00', '\x38', '\x6d', '\x9a',
+ '\x79', '\x67', '\xed', '\x9f', '\xef', '\xde', '\xec', '\x20',
+ '\x00', '\x38', '\xf3', '\x20', '\x0f', '\x05', '\x6f', '\x3e',
+ '\x00', '\x1f', '\x00', '\x38', '\xa3', '\x0b', '\xff', '\x3d',
+ '\xfe', '\x02', '\x0f', '\x05', '\x63', '\x9a', '\x81', '\x92',
+ '\xcf', '\x9d', '\x0b', '\x00', '\x5f', '\x95', '\x3f', '\xf8',
+ '\x54', '\x02', '\x22', '\x01', '\x18', '\x00', '\x62', '\x00',
+ '\x90', '\x00', '\x96', '\x01', '\xc8', '\x01', '\xe4', '\x00',
+ '\x00', '\x02', '\xb8', '\x00', '\x9a', '\x02', '\xce', '\x02',
+ '\x6f', '\xae', '\xca', '\x16', '\x00', '\x38', '\x3f', '\xbd',
+ '\x12', '\x03', '\x00', '\x38', '\x6f', '\x0e', '\x42', '\x03',
+ '\x00', '\x38', '\x04', '\x31', '\x62', '\xae', '\x41', '\xb2',
+ '\xb0', '\xb9', '\x08', '\x31', '\x61', '\xae', '\x41', '\xb2',
+ '\xb0', '\xb9', '\x6f', '\x0e', '\x16', '\x1b', '\x00', '\x38',
+ '\x60', '\x9a', '\x81', '\x92', '\xe0', '\x9b', '\x3f', '\xbd',
+ '\xec', '\x02', '\x00', '\x38', '\x60', '\x9a', '\x01', '\x92',
+ '\xe0', '\x9b', '\x62', '\xaa', '\x61', '\xba', '\x3f', '\xbd',
+ '\xf2', '\x07', '\x00', '\x38', '\xff', '\xed', '\x88', '\x02',
+ '\x0c', '\x32', '\x6f', '\xae', '\xd8', '\x16', '\x00', '\x38',
+ '\x3f', '\xbd', '\x12', '\x03', '\x00', '\x38', '\x6f', '\x0e',
+ '\x42', '\x03', '\x00', '\x38', '\x04', '\x31', '\x62', '\xae',
+ '\x41', '\xb2', '\xb0', '\xb9', '\x08', '\x31', '\x61', '\xae',
+ '\x41', '\xb2', '\xb0', '\xb9', '\x61', '\x1a', '\x72', '\x09',
+ '\xe1', '\x1b', '\xff', '\xed', '\x5a', '\x02', '\x0c', '\x32',
+ '\x6f', '\xae', '\xe8', '\x16', '\x00', '\x38', '\x3f', '\xbd',
+ '\x12', '\x03', '\x00', '\x38', '\x6f', '\x1e', '\x42', '\x03',
+ '\x00', '\x38', '\x04', '\x31', '\x60', '\xae', '\x41', '\xb2',
+ '\xb1', '\xb9', '\x60', '\xaa', '\x6a', '\xaa', '\x41', '\xb2',
+ '\xb1', '\xb9', '\xff', '\xed', '\x32', '\x02', '\x08', '\x32',
+ '\x6f', '\xae', '\xf8', '\x16', '\x00', '\x38', '\x3f', '\xbd',
+ '\x12', '\x03', '\x00', '\x38', '\x04', '\x31', '\x60', '\xae',
+ '\x41', '\xb2', '\x3f', '\xbd', '\x42', '\x03', '\x00', '\x38',
+ '\x60', '\xaa', '\xff', '\x3d', '\xc0', '\x01', '\x0f', '\x05',
+ '\x81', '\xa2', '\xfd', '\x20', '\x0f', '\x05', '\xff', '\xed',
+ '\x06', '\x02', '\x08', '\x32', '\x6f', '\x4e', '\x12', '\x03',
+ '\x00', '\x38', '\x6f', '\xae', '\x06', '\x17', '\x00', '\x38',
+ '\xb4', '\xb9', '\x6f', '\x0e', '\x42', '\x03', '\x00', '\x38',
+ '\x04', '\x31', '\x62', '\xae', '\x41', '\xb2', '\xb0', '\xb9',
+ '\x08', '\x31', '\x61', '\xae', '\x41', '\xb2', '\xb0', '\xb9',
+ '\x62', '\x2a', '\x62', '\x2a', '\xe1', '\x2a', '\xff', '\x3d',
+ '\xb8', '\x01', '\x0f', '\x05', '\x6f', '\xae', '\x14', '\x17',
+ '\x00', '\x38', '\xb4', '\xb9', '\xff', '\xed', '\xd0', '\x01',
+ '\x0f', '\x05', '\x6f', '\x4e', '\x12', '\x03', '\x00', '\x38',
+ '\x6f', '\xae', '\x24', '\x17', '\x00', '\x38', '\xb4', '\xb9',
+ '\x6f', '\x2e', '\x42', '\x03', '\x00', '\x38', '\x04', '\x31',
+ '\x61', '\xae', '\x41', '\xb2', '\xb2', '\xb9', '\x08', '\x31',
+ '\x60', '\xae', '\x41', '\xb2', '\xb2', '\xb9', '\x61', '\xaa',
+ '\x60', '\xba', '\x6e', '\xc6', '\x14', '\xc2', '\x3f', '\xbd',
+ '\xf0', '\x08', '\x00', '\x38', '\x6a', '\xa6', '\x30', '\x20',
+ '\x0f', '\x05', '\x6f', '\xae', '\x30', '\x17', '\x00', '\x38',
+ '\xb4', '\xb9', '\x14', '\xe1', '\x6a', '\xaa', '\x41', '\xb2',
+ '\xb2', '\xb9', '\x14', '\xe1', '\x6a', '\xaa', '\x6a', '\xb6',
+ '\x0f', '\xbc', '\x40', '\x00', '\x8f', '\xac', '\x40', '\x00',
+ '\x3c', '\xa3', '\x3c', '\xb3', '\x3f', '\xbd', '\x98', '\x09',
+ '\x00', '\x38', '\xff', '\xed', '\x6a', '\x01', '\x0f', '\x05',
+ '\x6f', '\xae', '\x4c', '\x17', '\x00', '\x38', '\xb4', '\xb9',
+ '\xff', '\xed', '\x54', '\x01', '\x0c', '\x32', '\x6f', '\xae',
+ '\x62', '\x17', '\x00', '\x38', '\x3f', '\xbd', '\x12', '\x03',
+ '\x00', '\x38', '\x6f', '\x0e', '\x42', '\x03', '\x00', '\x38',
+ '\x04', '\x31', '\x62', '\xae', '\x41', '\xb2', '\xb0', '\xb9',
+ '\x08', '\x31', '\x61', '\xae', '\x41', '\xb2', '\xb0', '\xb9',
+ '\x62', '\xaa', '\x61', '\xba', '\x3f', '\xbd', '\x98', '\x09',
+ '\x00', '\x38', '\xff', '\xed', '\x22', '\x01', '\x0c', '\x32',
+ '\x6f', '\xae', '\x6e', '\x17', '\x00', '\x38', '\x3f', '\xbd',
+ '\x12', '\x03', '\x00', '\x38', '\x6f', '\x0e', '\x42', '\x03',
+ '\x00', '\x38', '\x04', '\x31', '\x62', '\xae', '\x41', '\xb2',
+ '\xb0', '\xb9', '\x08', '\x31', '\x61', '\xae', '\x41', '\xb2',
+ '\xb0', '\xb9', '\x62', '\xaa', '\xe1', '\xaa', '\xda', '\x90',
+ '\x0f', '\x05', '\x7a', '\x0e', '\x08', '\x31', '\xea', '\xaa',
+ '\xf9', '\x80', '\x0f', '\x05', '\xea', '\xe0', '\x0c', '\x32',
+ '\x6f', '\xae', '\x7a', '\x17', '\x00', '\x38', '\x3f', '\xbd',
+ '\x12', '\x03', '\x00', '\x38', '\x6f', '\x0e', '\x42', '\x03',
+ '\x00', '\x38', '\x04', '\x31', '\x61', '\xae', '\x41', '\xb2',
+ '\xb0', '\xb9', '\x08', '\x31', '\x64', '\xae', '\x41', '\xb2',
+ '\xb0', '\xb9', '\x0c', '\x31', '\x62', '\xae', '\x41', '\xb2',
+ '\xb0', '\xb9', '\x6f', '\x0e', '\x36', '\x13', '\x00', '\x38',
+ '\x61', '\xaa', '\x64', '\xba', '\x62', '\xca', '\xb0', '\xb9',
+ '\x6a', '\xa6', '\xac', '\x30', '\x10', '\x32', '\xc3', '\xa2',
+ '\xae', '\x20', '\x7a', '\x86', '\x62', '\xca', '\xef', '\xcd',
+ '\x00', '\x00', '\x01', '\x00', '\x64', '\xba', '\xb0', '\xb9',
+ '\x9e', '\xe0', '\x0f', '\x05', '\x6f', '\xde', '\xa0', '\x1a',
+ '\x00', '\x38', '\x6d', '\x9a', '\x7f', '\x0d', '\xc0', '\x01',
+ '\x00', '\xb0', '\xe9', '\x9b', '\x04', '\xd1', '\x59', '\x98',
+ '\x7f', '\x0d', '\xc4', '\x01', '\x00', '\xb0', '\xe9', '\x9b',
+ '\x6f', '\x1e', '\x12', '\x03', '\x00', '\x38', '\x6f', '\xae',
+ '\x82', '\x17', '\x00', '\x38', '\xb1', '\xb9', '\x04', '\x31',
+ '\x60', '\xae', '\x41', '\xb2', '\x3f', '\xbd', '\x42', '\x03',
+ '\x00', '\x38', '\x6f', '\xae', '\x8a', '\x17', '\x00', '\x38',
+ '\xb1', '\xb9', '\x60', '\x9a', '\xb9', '\x09', '\x50', '\xe0',
+ '\x08', '\x32', '\x6f', '\xae', '\xfe', '\x16', '\x00', '\x38',
+ '\x3f', '\xbd', '\x12', '\x03', '\x00', '\x38', '\x6f', '\x0e',
+ '\x42', '\x03', '\x00', '\x38', '\x04', '\x31', '\x61', '\xae',
+ '\x41', '\xb2', '\xb0', '\xb9', '\x08', '\x31', '\x62', '\xae',
+ '\x41', '\xb2', '\xb0', '\xb9', '\x61', '\x1a', '\x61', '\x9a',
+ '\x08', '\x30', '\x81', '\x92', '\xe1', '\x9b', '\x20', '\xe0',
+ '\x62', '\x3a', '\x1c', '\xe0', '\x0c', '\x32', '\x6f', '\xae',
+ '\x90', '\x17', '\x00', '\x38', '\x3f', '\xbd', '\x12', '\x03',
+ '\x00', '\x38', '\x63', '\xaa', '\x41', '\xb2', '\x3f', '\xbd',
+ '\x42', '\x03', '\x00', '\x38', '\x0a', '\xe0', '\x0f', '\x05',
+ '\xa3', '\x0b', '\xff', '\x2d', '\x06', '\xfd', '\x0f', '\x05',
+ '\x6f', '\xae', '\x8a', '\x17', '\x00', '\x38', '\x3f', '\xbd',
+ '\x12', '\x03', '\x00', '\x38', '\xbe', '\x4f', '\x04', '\xe2',
+ '\x3e', '\x0d', '\xfc', '\xe1', '\x7e', '\xbe', '\x8c', '\xe2',
+ '\xfe', '\x2b', '\x6a', '\x26', '\x6b', '\x06', '\x7f', '\x0d',
+ '\x0e', '\x1b', '\x00', '\x38', '\x70', '\x8a', '\x7f', '\x0d',
+ '\x04', '\x01', '\x00', '\x38', '\xea', '\xab', '\x6f', '\x9e',
+ '\x12', '\x1b', '\x00', '\x38', '\x49', '\x9a', '\xcf', '\x9e',
+ '\x01', '\x00', '\x86', '\x20', '\x0f', '\x05', '\x6f', '\xde',
+ '\xc6', '\x1a', '\x00', '\x38', '\x08', '\xd1', '\xea', '\xab',
+ '\x7f', '\x0d', '\x00', '\x01', '\x00', '\x38', '\xeb', '\xbb',
+ '\x6b', '\x96', '\x04', '\x92', '\xdf', '\x9d', '\xdc', '\x05',
+ '\xdd', '\x9b', '\x6f', '\x9e', '\xa4', '\x01', '\x00', '\xb0',
+ '\x69', '\xda', '\x6f', '\xde', '\x90', '\x1a', '\x00', '\x38',
+ '\xe9', '\xdb', '\x6f', '\xde', '\xd4', '\x01', '\x00', '\xb0',
+ '\x4d', '\x9a', '\x38', '\x93', '\x44', '\x93', '\xcd', '\x9b',
+ '\x6f', '\xde', '\xd4', '\x01', '\x00', '\xb0', '\x4d', '\x9a',
+ '\x07', '\x93', '\xcf', '\x9e', '\x04', '\x00', '\xf7', '\x30',
+ '\x0f', '\x05', '\x4d', '\x9a', '\x38', '\x93', '\x41', '\x93',
+ '\xcd', '\x9b', '\x3f', '\xbd', '\x0c', '\x02', '\x00', '\x38',
+ '\x6a', '\xa6', '\xf7', '\x30', '\x0f', '\x05', '\x6f', '\xce',
+ '\x0e', '\x1b', '\x00', '\x38', '\xec', '\x0a', '\x10', '\x80',
+ '\x0f', '\x05', '\x6f', '\xde', '\xd4', '\x01', '\x00', '\xb0',
+ '\x4d', '\x9a', '\x38', '\x93', '\x41', '\x93', '\xcd', '\x9b',
+ '\xec', '\x0a', '\xd7', '\x90', '\x71', '\x86', '\x22', '\xe0',
+ '\x62', '\x96', '\x7f', '\x0d', '\x0e', '\x1b', '\x00', '\x38',
+ '\xeb', '\xba', '\x14', '\x80', '\x71', '\x86', '\x3f', '\xbd',
+ '\x0c', '\x02', '\x00', '\x38', '\x7f', '\x0d', '\x0e', '\x1b',
+ '\x00', '\x38', '\xe0', '\x0a', '\xf1', '\x90', '\x71', '\x86',
+ '\x62', '\x96', '\x20', '\x96', '\xe9', '\x26', '\x0e', '\x30',
+ '\x62', '\xd6', '\x0d', '\x1c', '\x62', '\x96', '\x20', '\x96',
+ '\xe9', '\xd6', '\xf7', '\x20', '\x0f', '\x05', '\x6f', '\xae',
+ '\xa4', '\x17', '\x00', '\x38', '\x3f', '\xbd', '\x12', '\x03',
+ '\x00', '\x38', '\x61', '\xa6', '\x41', '\xb2', '\xbe', '\x2f',
+ '\x3e', '\xbe', '\x3f', '\x0d', '\x42', '\x03', '\x00', '\x38',
+ '\xfc', '\xe1', '\x7e', '\xbe', '\x8c', '\xe2', '\xfe', '\x2b',
+ '\x6b', '\x06', '\x6c', '\x26', '\xeb', '\xa6', '\x40', '\x00',
+ '\x6a', '\xc6', '\xe0', '\xc6', '\x32', '\x00', '\x71', '\x86',
+ '\x6c', '\xb6', '\x6c', '\x96', '\x79', '\x87', '\x61', '\xd6',
+ '\xc3', '\xd3', '\xed', '\x97', '\x49', '\xd6', '\xcb', '\x9b',
+ '\x4b', '\x9a', '\xcd', '\x96', '\x0c', '\x30', '\x7d', '\x87',
+ '\x6f', '\xae', '\xba', '\x17', '\x00', '\x38', '\x40', '\xe0',
+ '\xe2', '\xbb', '\xcb', '\xdf', '\x01', '\x12', '\xc4', '\x12',
+ '\x06', '\x30', '\xe0', '\xb6', '\xd7', '\x10', '\x6c', '\x96',
+ '\x04', '\xc2', '\xe0', '\xc6', '\xc5', '\x10', '\x0f', '\x05',
+ '\xe0', '\xa6', '\x4e', '\x00', '\x6a', '\xc6', '\xe0', '\xc6',
+ '\x40', '\x00', '\x71', '\x86', '\x6c', '\xa6', '\x61', '\x96',
+ '\xc3', '\x93', '\x6c', '\xd6', '\xe9', '\xd7', '\x4a', '\x9a',
+ '\xcd', '\x96', '\x22', '\x30', '\x01', '\x12', '\x81', '\x12',
+ '\xe2', '\xab', '\x6f', '\xae', '\xd8', '\x17', '\x00', '\x38',
+ '\x3f', '\xbd', '\x12', '\x03', '\x00', '\x38', '\x62', '\xaa',
+ '\x41', '\xb2', '\x3f', '\xbd', '\x42', '\x03', '\x00', '\x38',
+ '\x7a', '\x86', '\xbe', '\x2f', '\x3e', '\x0d', '\xc4', '\x12',
+ '\x08', '\x30', '\x01', '\xa2', '\xe0', '\xa6', '\xc9', '\x10',
+ '\x61', '\x96', '\x04', '\xc2', '\xe0', '\xc6', '\xb7', '\x10',
+ '\x0f', '\x05', '\x41', '\xa2', '\xbe', '\x2f', '\x3e', '\x0d',
+ '\xfc', '\xe1', '\x7e', '\xbe', '\x94', '\xe2', '\xfe', '\x4b',
+ '\x6b', '\x26', '\xeb', '\xa6', '\x5a', '\x90', '\x6a', '\x06',
+ '\x60', '\xa6', '\x7b', '\x86', '\x3f', '\xbd', '\x42', '\x03',
+ '\x00', '\x38', '\x6f', '\xae', '\xf6', '\x17', '\x00', '\x38',
+ '\x3f', '\xbd', '\x12', '\x03', '\x00', '\x38', '\xe2', '\x06',
+ '\x2a', '\x90', '\x74', '\x86', '\x60', '\x16', '\x60', '\x36',
+ '\x6f', '\xae', '\x4c', '\x18', '\x00', '\x38', '\x3f', '\xbd',
+ '\x12', '\x03', '\x00', '\x38', '\x63', '\xae', '\x7b', '\x86',
+ '\x3f', '\xbd', '\x42', '\x03', '\x00', '\x38', '\x01', '\x42',
+ '\xc4', '\x42', '\x08', '\x30', '\x04', '\x12', '\xe2', '\x16',
+ '\xdf', '\x80', '\x0f', '\x05', '\x6f', '\xae', '\xb4', '\x16',
+ '\x00', '\x38', '\x3f', '\xbd', '\x12', '\x03', '\x00', '\x38',
+ '\x10', '\x02', '\xe2', '\x06', '\xad', '\x80', '\x60', '\xa6',
+ '\xbe', '\x4f', '\x3e', '\x0d', '\x05', '\xa1', '\x49', '\x98',
+ '\xc2', '\x92', '\x0a', '\x30', '\xc4', '\x92', '\x0e', '\x30',
+ '\x0f', '\x05', '\x7f', '\xb6', '\x7a', '\x86', '\x6a', '\xb9',
+ '\x5a', '\xa8', '\x7f', '\xb6', '\x0f', '\x05', '\x6a', '\xb9',
+ '\x6a', '\xaa', '\x7f', '\xb6', '\x0f', '\x05', '\x6a', '\xd6',
+ '\x05', '\xa1', '\x4a', '\xaa', '\x4a', '\x94', '\xc2', '\x92',
+ '\x0a', '\x30', '\xc4', '\x92', '\x10', '\x30', '\x0f', '\x05',
+ '\x7f', '\xb6', '\x7a', '\x86', '\x5c', '\xca', '\x6d', '\xb9',
+ '\xdc', '\xcb', '\x7f', '\xb6', '\x4a', '\xa4', '\x6c', '\xca',
+ '\x6d', '\xb9', '\xec', '\xcb', '\x4a', '\xa4', '\x7f', '\xb6',
+ '\x0f', '\x05', '\xfc', '\xe1', '\x7e', '\xbe', '\x84', '\xe2',
+ '\xee', '\xbb', '\x04', '\xa1', '\x49', '\x9a', '\xcf', '\x9e',
+ '\x01', '\x00', '\x06', '\x20', '\x0f', '\x05', '\x24', '\xe0',
+ '\xc1', '\xc3', '\xcf', '\x9e', '\x02', '\x00', '\x0c', '\x20',
+ '\x6b', '\x96', '\xd0', '\x93', '\x69', '\xb7', '\xee', '\xbb',
+ '\x12', '\xe0', '\xc2', '\xc3', '\x6f', '\xae', '\x22', '\x18',
+ '\x00', '\x38', '\x3f', '\xbd', '\x12', '\x03', '\x00', '\x38',
+ '\x0c', '\xe0', '\x0f', '\x05', '\x6c', '\xb6', '\x6e', '\xc6',
+ '\x3f', '\xbd', '\x26', '\x0a', '\x00', '\x38', '\x04', '\xe2',
+ '\x3e', '\x0d', '\xfc', '\xe1', '\x7e', '\xbe', '\x84', '\xe2',
+ '\xfe', '\x0b', '\x6a', '\x06', '\x4f', '\xbc', '\xaa', '\x00',
+ '\x5f', '\xcc', '\x55', '\x05', '\x3f', '\xbd', '\x52', '\x0a',
+ '\x00', '\x38', '\x60', '\xa6', '\x4f', '\xbc', '\x55', '\x00',
+ '\x5f', '\xcc', '\xaa', '\x02', '\xbe', '\x0f', '\x3e', '\xbe',
+ '\x3f', '\x0d', '\x52', '\x0a', '\x00', '\x38', '\xfc', '\xe1',
+ '\x7e', '\xbe', '\x90', '\xe2', '\xfe', '\x3b', '\x6a', '\x26',
+ '\x04', '\xa1', '\x49', '\x9a', '\xcf', '\x9e', '\x02', '\x00',
+ '\x42', '\x20', '\x6b', '\x36', '\x6f', '\x0e', '\x04', '\x0a',
+ '\x00', '\x38', '\xb0', '\xb9', '\x6a', '\x16', '\x62', '\xa6',
+ '\x63', '\xb6', '\xb0', '\xb9', '\x61', '\xd6', '\xf0', '\xd3',
+ '\x1f', '\xdf', '\x40', '\x00', '\x6a', '\x96', '\xf0', '\x93',
+ '\x1f', '\x9f', '\x40', '\x00', '\xe9', '\xd6', '\x14', '\x20',
+ '\x7c', '\x86', '\x2f', '\x1f', '\x40', '\x00', '\x00', '\x00',
+ '\x2f', '\xaf', '\x40', '\x00', '\x00', '\x00', '\xea', '\x16',
+ '\x04', '\x30', '\x0f', '\x05', '\x41', '\xc2', '\x6c', '\xa6',
+ '\xbe', '\x3f', '\x3e', '\x0d', '\x6f', '\x1e', '\x04', '\x0a',
+ '\x00', '\x38', '\xb1', '\xb9', '\x4a', '\x04', '\x0f', '\x0f',
+ '\x40', '\x00', '\x62', '\xa6', '\x63', '\xb6', '\xb1', '\xb9',
+ '\x2f', '\xaf', '\x40', '\x00', '\x00', '\x00', '\xea', '\x06',
+ '\x3a', '\x25', '\xbe', '\x3f', '\x3e', '\x0d', '\xfc', '\xe1',
+ '\x7e', '\xbe', '\xa8', '\xe2', '\xfe', '\x8b', '\x6a', '\x36',
+ '\x04', '\xa1', '\x44', '\x9e', '\xcf', '\x9e', '\x02', '\x00',
+ '\x04', '\x20', '\x41', '\x72', '\x42', '\x72', '\x6f', '\x2e',
+ '\x52', '\x0a', '\x00', '\x38', '\x4f', '\xbc', '\x98', '\x00',
+ '\x4f', '\xcc', '\x55', '\x00', '\xb2', '\xb9', '\x50', '\xb2',
+ '\xe7', '\xb4', '\x6f', '\x1e', '\x04', '\x0a', '\x00', '\x38',
+ '\x63', '\xa6', '\xb1', '\xb9', '\xcf', '\xae', '\x51', '\x00',
+ '\xff', '\x2d', '\x9c', '\x01', '\x63', '\xa6', '\x51', '\xb2',
+ '\xe7', '\xb4', '\xb1', '\xb9', '\xcf', '\xae', '\x52', '\x00',
+ '\xff', '\x2d', '\x8c', '\x01', '\x63', '\xa6', '\x52', '\xb2',
+ '\xe7', '\xb4', '\xb1', '\xb9', '\xcf', '\xae', '\x59', '\x00',
+ '\xff', '\x2d', '\x7c', '\x01', '\x63', '\xa6', '\x24', '\xe1',
+ '\x70', '\x8a', '\x6f', '\xae', '\x3c', '\x18', '\x00', '\x38',
+ '\x3f', '\xbd', '\x12', '\x03', '\x00', '\x38', '\x63', '\xaa',
+ '\x41', '\xb2', '\x3f', '\xbd', '\x42', '\x03', '\x00', '\x38',
+ '\x4f', '\xbc', '\x27', '\x00', '\xe7', '\xb4', '\x63', '\xa6',
+ '\xb1', '\xb9', '\x41', '\x92', '\xea', '\x94', '\x06', '\x32',
+ '\xe3', '\x9b', '\x86', '\x32', '\x4f', '\xbc', '\x2c', '\x00',
+ '\xe7', '\xb4', '\x63', '\xa6', '\xb1', '\xb9', '\x6a', '\x86',
+ '\x55', '\xb2', '\xe7', '\xb4', '\x63', '\xa6', '\xb1', '\xb9',
+ '\x6a', '\x06', '\x6a', '\xb6', '\x04', '\xb2', '\xe7', '\xb4',
+ '\x63', '\xa6', '\xb1', '\xb9', '\xcf', '\xae', '\x30', '\x00',
+ '\x3e', '\x20', '\x63', '\xa6', '\x4f', '\xbc', '\xf0', '\x00',
+ '\x5f', '\xcc', '\x55', '\x05', '\xb2', '\xb9', '\x63', '\xa6',
+ '\x3f', '\xbd', '\x9a', '\x0a', '\x00', '\x38', '\x63', '\xa6',
+ '\x4f', '\xbc', '\x90', '\x00', '\x5f', '\xcc', '\x55', '\x05',
+ '\xb2', '\xb9', '\x44', '\xb8', '\x2b', '\xb6', '\x63', '\xa6',
+ '\xb1', '\xb9', '\x4a', '\x54', '\x0f', '\x5f', '\x80', '\xff',
+ '\x63', '\xa6', '\x4f', '\xbc', '\x98', '\x00', '\x4f', '\xcc',
+ '\x55', '\x00', '\xb2', '\xb9', '\x10', '\xe0', '\x0f', '\x05',
+ '\x0f', '\x02', '\xe7', '\x04', '\x60', '\xb6', '\xb1', '\xb9',
+ '\xcf', '\xae', '\x03', '\x00', '\x35', '\x35', '\x0a', '\x31',
+ '\xd8', '\x8b', '\xc8', '\x82', '\x12', '\xd0', '\x68', '\x46',
+ '\x6f', '\xae', '\x4e', '\x18', '\x00', '\x38', '\x3f', '\xbd',
+ '\x12', '\x03', '\x00', '\x38', '\xd2', '\xe0', '\x7a', '\x86',
+ '\x65', '\x56', '\x94', '\x20', '\x81', '\x42', '\x90', '\xe0',
+ '\x74', '\x86', '\xc2', '\x03', '\x60', '\xb6', '\x2f', '\xb2',
+ '\xe7', '\xb4', '\x6f', '\x1e', '\x04', '\x0a', '\x00', '\x38',
+ '\x63', '\xa6', '\xb1', '\xb9', '\x6a', '\x66', '\x60', '\xb6',
+ '\x30', '\xb2', '\xe7', '\xb4', '\x63', '\xa6', '\xb1', '\xb9',
+ '\xc8', '\xa3', '\x6a', '\x67', '\xc8', '\x63', '\x60', '\xb6',
+ '\x2d', '\xb2', '\xe7', '\xb4', '\x63', '\xa6', '\xb1', '\xb9',
+ '\x6a', '\x26', '\x2e', '\x02', '\xe7', '\x04', '\x63', '\xa6',
+ '\x60', '\xb6', '\xb1', '\xb9', '\xc8', '\xa3', '\x6a', '\x27',
+ '\x65', '\x56', '\x0a', '\x30', '\x01', '\x22', '\x68', '\x96',
+ '\xa4', '\x96', '\x04', '\xe0', '\x81', '\x92', '\x64', '\x96',
+ '\x19', '\x95', '\x63', '\xd6', '\x2d', '\x95', '\x6d', '\x96',
+ '\x24', '\xe1', '\x6d', '\xda', '\x0c', '\x91', '\xed', '\xdb',
+ '\x10', '\x91', '\xe6', '\x6b', '\x14', '\x91', '\xe2', '\x2b',
+ '\x62', '\x26', '\x10', '\xd0', '\x0f', '\x05', '\x24', '\xe1',
+ '\x29', '\x6a', '\x24', '\xe1', '\xe9', '\x9b', '\x81', '\x22',
+ '\xf5', '\x20', '\x0f', '\x05', '\x24', '\xe1', '\x6d', '\xda',
+ '\x06', '\x31', '\xed', '\xda', '\x1e', '\x30', '\x65', '\x56',
+ '\x06', '\x30', '\x01', '\x42', '\x81', '\x42', '\x81', '\x42',
+ '\x65', '\x56', '\x0c', '\x30', '\xe8', '\x46', '\x64', '\x46',
+ '\x69', '\xa0', '\x64', '\x06', '\x08', '\xe0', '\x63', '\xa6',
+ '\x61', '\xb0', '\x64', '\x06', '\x63', '\xa6', '\x4f', '\xbc',
+ '\xf0', '\x00', '\x5f', '\xcc', '\x55', '\x05', '\x3f', '\xbd',
+ '\x52', '\x0a', '\x00', '\x38', '\x12', '\xe0', '\x41', '\xa2',
+ '\x4f', '\xbc', '\xf0', '\x00', '\x5f', '\xcc', '\x55', '\x05',
+ '\x3f', '\xbd', '\x52', '\x0a', '\x00', '\x38', '\x7a', '\x86',
+ '\xbe', '\x8f', '\x04', '\xe2', '\x3e', '\x0d', '\xfc', '\xe1',
+ '\x7e', '\xbe', '\x90', '\xe2', '\xfe', '\x3b', '\x06', '\xa1',
+ '\xa0', '\x0b', '\xff', '\x2d', '\x16', '\x04', '\x6a', '\x26',
+ '\x3f', '\xbd', '\x3e', '\x0b', '\x00', '\x38', '\x6a', '\xa6',
+ '\xff', '\x2d', '\x86', '\x03', '\x41', '\xa2', '\x62', '\xa6',
+ '\x3f', '\xbd', '\x9a', '\x0a', '\x00', '\x38', '\x62', '\xa6',
+ '\x4f', '\xbc', '\x90', '\x00', '\x5f', '\xcc', '\x55', '\x05',
+ '\x3f', '\xbd', '\x52', '\x0a', '\x00', '\x38', '\x6f', '\x1e',
+ '\x04', '\x0a', '\x00', '\x38', '\x62', '\xa6', '\x7b', '\x86',
+ '\xb1', '\xb9', '\x6a', '\x36', '\x04', '\x21', '\x40', '\xbe',
+ '\x4b', '\xb4', '\x2b', '\xb6', '\x62', '\xa6', '\xb1', '\xb9',
+ '\x42', '\x92', '\xc0', '\x9a', '\x1c', '\x20', '\x63', '\xc6',
+ '\xf0', '\xc3', '\x53', '\x94', '\xe9', '\xc6', '\x14', '\x20',
+ '\x63', '\x06', '\x6a', '\xd6', '\xf0', '\xd3', '\x5a', '\x94',
+ '\xe9', '\xd6', '\x0a', '\x20', '\xd0', '\x03', '\x6c', '\x36',
+ '\x6d', '\xa6', '\x63', '\x06', '\xd0', '\x03', '\x6a', '\x07',
+ '\x62', '\xa6', '\x4f', '\xbc', '\xf0', '\x00', '\x5f', '\xcc',
+ '\x55', '\x05', '\x3f', '\xbd', '\x52', '\x0a', '\x00', '\x38',
+ '\xef', '\x0e', '\xc0', '\x00', '\x1f', '\x00', '\xff', '\x3d',
+ '\x48', '\x02', '\x0f', '\x05', '\x60', '\x90', '\x0f', '\x05',
+ '\xef', '\x0e', '\xc4', '\x22', '\x01', '\x00', '\xb0', '\x30',
+ '\x0f', '\x05', '\x20', '\x90', '\x0f', '\x05', '\xef', '\x0e',
+ '\x58', '\x22', '\x01', '\x00', '\xff', '\x3d', '\x5a', '\x01',
+ '\x0f', '\x05', '\xef', '\x0e', '\x5b', '\x22', '\x01', '\x00',
+ '\xff', '\x3d', '\x4e', '\x01', '\x0f', '\x05', '\xff', '\xed',
+ '\xb6', '\x02', '\x0f', '\x05', '\xef', '\x0e', '\xda', '\x22',
+ '\x01', '\x00', '\xff', '\x3d', '\x9c', '\x01', '\x0f', '\x05',
+ '\x14', '\x90', '\x0f', '\x05', '\xef', '\x0e', '\xd6', '\x22',
+ '\x01', '\x00', '\xff', '\x3d', '\x8c', '\x01', '\x0f', '\x05',
+ '\xff', '\xed', '\x94', '\x02', '\x0f', '\x05', '\xef', '\x0e',
+ '\x49', '\x22', '\x04', '\x00', '\xc4', '\x30', '\x0f', '\x05',
+ '\xff', '\xed', '\x84', '\x02', '\x0f', '\x05', '\xef', '\x0e',
+ '\xd7', '\x00', '\x20', '\x00', '\xff', '\x3d', '\x6a', '\x01',
+ '\x0f', '\x05', '\x20', '\x90', '\x0f', '\x05', '\xef', '\x0e',
+ '\xc2', '\x00', '\x1f', '\x00', '\xff', '\x3d', '\x00', '\x02',
+ '\x0f', '\x05', '\xef', '\x0e', '\xc9', '\x00', '\x1f', '\x00',
+ '\xff', '\x3d', '\x18', '\x02', '\x0f', '\x05', '\xff', '\xed',
+ '\x56', '\x02', '\x0f', '\x05', '\xef', '\x0e', '\x4f', '\x00',
+ '\x98', '\x00', '\xff', '\x3d', '\x3c', '\x01', '\x0f', '\x05',
+ '\x12', '\x90', '\x0f', '\x05', '\xef', '\x0e', '\x43', '\x00',
+ '\x98', '\x00', '\x76', '\x30', '\x0f', '\x05', '\xff', '\xed',
+ '\x36', '\x02', '\x0f', '\x05', '\xef', '\x0e', '\xc2', '\x00',
+ '\x98', '\x00', '\xff', '\x2d', '\x2a', '\x02', '\x0f', '\x05',
+ '\x6f', '\x1e', '\x32', '\x19', '\x00', '\x38', '\x61', '\x1a',
+ '\x6f', '\xde', '\x00', '\x00', '\x20', '\x00', '\x06', '\x21',
+ '\xed', '\xdb', '\x0c', '\x21', '\x70', '\x8a', '\x6f', '\x9e',
+ '\x00', '\x00', '\x01', '\x00', '\x10', '\x21', '\xe9', '\x9b',
+ '\x5f', '\xd2', '\x14', '\x21', '\xed', '\xdb', '\x6f', '\x9e',
+ '\x00', '\x00', '\x1f', '\x00', '\x18', '\x21', '\xe9', '\x9b',
+ '\x1f', '\xdc', '\xe1', '\x7f', '\x1c', '\x21', '\xed', '\xdb',
+ '\x41', '\x92', '\x20', '\x21', '\xe9', '\x9b', '\x6f', '\xde',
+ '\x00', '\x80', '\x1f', '\x00', '\x24', '\x21', '\xed', '\xdb',
+ '\x5f', '\xdc', '\x00', '\x20', '\x28', '\x21', '\xed', '\xdb',
+ '\x42', '\xd2', '\x2c', '\x21', '\xed', '\xdb', '\x6f', '\xde',
+ '\x00', '\xc0', '\x1f', '\x00', '\xff', '\xed', '\x16', '\x01',
+ '\x0f', '\x05', '\x6f', '\x1e', '\x2e', '\x19', '\x00', '\x38',
+ '\x61', '\x1a', '\x6f', '\x9e', '\x00', '\x00', '\x20', '\x00',
+ '\x06', '\x21', '\xe9', '\x9b', '\x0c', '\x21', '\x70', '\x8a',
+ '\x5f', '\x9c', '\x00', '\x40', '\x10', '\x21', '\xe9', '\x9b',
+ '\x41', '\xd2', '\x14', '\x21', '\xed', '\xdb', '\x18', '\x21',
+ '\xe9', '\x9b', '\x5f', '\x9c', '\x00', '\x20', '\x1c', '\x21',
+ '\xe9', '\x9b', '\x42', '\x92', '\x20', '\x21', '\xe9', '\x9b',
+ '\x1f', '\x9c', '\xfe', '\x7f', '\x24', '\x21', '\xe9', '\x9b',
+ '\x28', '\x21', '\xe9', '\x9b', '\x2c', '\x21', '\xed', '\xdb',
+ '\x6f', '\x9e', '\x00', '\x00', '\x01', '\x00', '\x30', '\x21',
+ '\xe9', '\x9b', '\x34', '\x21', '\xe9', '\x9b', '\x58', '\xe0',
+ '\x5f', '\xd2', '\x6f', '\x1e', '\x26', '\x19', '\x00', '\x38',
+ '\x61', '\x1a', '\x6f', '\x9e', '\x00', '\x00', '\x10', '\x00',
+ '\x06', '\x21', '\xe9', '\x9b', '\x0c', '\x21', '\x70', '\x8a',
+ '\x5f', '\x9c', '\x00', '\x40', '\x10', '\x21', '\xe9', '\x9b',
+ '\x41', '\xd2', '\x14', '\x21', '\xed', '\xdb', '\x18', '\x21',
+ '\xe9', '\x9b', '\x5f', '\x9c', '\x00', '\x20', '\x1c', '\x21',
+ '\xe9', '\x9b', '\x42', '\x92', '\x20', '\x21', '\xe9', '\x9b',
+ '\x1f', '\x9c', '\xfe', '\x7f', '\x24', '\x21', '\xe9', '\x9b',
+ '\x28', '\x21', '\xe9', '\x9b', '\x2c', '\x21', '\xed', '\xdb',
+ '\x6f', '\x9e', '\x00', '\x00', '\x01', '\x00', '\x30', '\x21',
+ '\xe9', '\x9b', '\x34', '\x21', '\xe9', '\x9b', '\x4f', '\xd2',
+ '\x38', '\x21', '\xed', '\xdb', '\xff', '\xed', '\x3e', '\x01',
+ '\x0f', '\x05', '\x6f', '\x1e', '\x2a', '\x19', '\x00', '\x38',
+ '\x61', '\x1a', '\x6f', '\x9e', '\x00', '\x00', '\x10', '\x00',
+ '\x06', '\x21', '\xe9', '\x9b', '\x0c', '\x21', '\x70', '\x8a',
+ '\x6f', '\xde', '\x00', '\x00', '\x01', '\x00', '\x10', '\x21',
+ '\xed', '\xdb', '\x4f', '\x92', '\x14', '\x21', '\xe9', '\x9b',
+ '\x6f', '\xde', '\x00', '\x00', '\x0f', '\x00', '\x18', '\x21',
+ '\xed', '\xdb', '\x1f', '\x9c', '\xf1', '\x7f', '\x1c', '\x21',
+ '\xe9', '\x9b', '\x41', '\x92', '\x20', '\x21', '\xe9', '\x9b',
+ '\x6f', '\xde', '\x00', '\x80', '\x0f', '\x00', '\x24', '\x21',
+ '\xed', '\xdb', '\x5f', '\xdc', '\x00', '\x20', '\x28', '\x21',
+ '\xed', '\xdb', '\x42', '\xd2', '\x2c', '\x21', '\xed', '\xdb',
+ '\x6f', '\xde', '\x00', '\xc0', '\x0f', '\x00', '\x30', '\x21',
+ '\xed', '\xdb', '\x5f', '\xdc', '\x00', '\x40', '\x34', '\x21',
+ '\xed', '\xdb', '\x38', '\x21', '\xe9', '\x9b', '\xce', '\xe0',
+ '\x0f', '\x05', '\x6f', '\x1e', '\x2e', '\x19', '\x00', '\x38',
+ '\x61', '\x1a', '\x6f', '\x9e', '\x00', '\x00', '\x20', '\x00',
+ '\x06', '\x21', '\xe9', '\x9b', '\x0c', '\x21', '\x70', '\x8a',
+ '\x5f', '\xdc', '\x00', '\x20', '\x10', '\x21', '\xed', '\xdb',
+ '\x48', '\x92', '\x14', '\x21', '\xe9', '\x9b', '\x6f', '\x9e',
+ '\x00', '\x00', '\x01', '\x00', '\x18', '\x21', '\xe9', '\x9b',
+ '\x1c', '\x21', '\xe9', '\x9b', '\x62', '\xe0', '\x5f', '\xd2',
+ '\x6f', '\x1e', '\x32', '\x19', '\x00', '\x38', '\x61', '\x1a',
+ '\x6f', '\x9e', '\x00', '\x00', '\x20', '\x00', '\x06', '\x21',
+ '\xe9', '\x9b', '\x0c', '\x21', '\x70', '\x8a', '\x6f', '\xde',
+ '\x00', '\x00', '\x01', '\x00', '\x10', '\x21', '\xed', '\xdb',
+ '\x26', '\xe0', '\x5f', '\x92', '\x6f', '\x1e', '\x36', '\x19',
+ '\x00', '\x38', '\x61', '\x1a', '\x6f', '\x9e', '\x00', '\x00',
+ '\x40', '\x00', '\x06', '\x21', '\xe9', '\x9b', '\x0c', '\x21',
+ '\x70', '\x8a', '\x6f', '\xde', '\x00', '\x00', '\x01', '\x00',
+ '\x10', '\x21', '\xed', '\xdb', '\x4f', '\x9c', '\x3f', '\x00',
+ '\x14', '\x21', '\xe9', '\x9b', '\x6f', '\xde', '\x00', '\x00',
+ '\x1f', '\x00', '\x18', '\x21', '\xed', '\xdb', '\x5f', '\x9c',
+ '\x00', '\x20', '\x1c', '\x21', '\xe9', '\x9b', '\x48', '\xd2',
+ '\x20', '\x21', '\xed', '\xdb', '\x30', '\xe0', '\x0f', '\x05',
+ '\x04', '\x21', '\x49', '\x9a', '\x6f', '\xae', '\x6a', '\x18',
+ '\x00', '\x38', '\xcf', '\x9e', '\x01', '\x00', '\x08', '\x30',
+ '\x0f', '\x05', '\x6f', '\xae', '\x7c', '\x18', '\x00', '\x38',
+ '\x3f', '\xbd', '\x12', '\x03', '\x00', '\x38', '\x62', '\xaa',
+ '\x41', '\xb2', '\x3f', '\xbd', '\x42', '\x03', '\x00', '\x38',
+ '\x7a', '\x86', '\xbe', '\x3f', '\x3e', '\x0d', '\x6f', '\x3e',
+ '\x12', '\x03', '\x00', '\x38', '\x6f', '\xae', '\x94', '\x18',
+ '\x00', '\x38', '\xb3', '\xb9', '\x04', '\x21', '\x40', '\x9e',
+ '\xcf', '\x9e', '\x01', '\x00', '\x0c', '\x20', '\x42', '\xd2',
+ '\x6f', '\xae', '\x9c', '\x18', '\x00', '\x38', '\xb3', '\xb9',
+ '\x42', '\xd2', '\xc0', '\xda', '\x32', '\x20', '\x47', '\xc2',
+ '\x06', '\x21', '\x6d', '\x9e', '\xc1', '\x93', '\xed', '\x9b',
+ '\x62', '\xd6', '\x0c', '\xd1', '\x69', '\x9a', '\xc1', '\x93',
+ '\x0c', '\xd1', '\xe9', '\x9b', '\x10', '\xd1', '\x69', '\x9a',
+ '\xc1', '\x93', '\x10', '\xd1', '\xe9', '\x9b', '\x81', '\xc2',
+ '\xe9', '\x60', '\x0c', '\xd2', '\x6f', '\xae', '\x9e', '\x18',
+ '\x00', '\x38', '\x3f', '\xbd', '\x12', '\x03', '\x00', '\x38',
+ '\x6f', '\x0e', '\x12', '\x03', '\x00', '\x38', '\x6f', '\xae',
+ '\xa0', '\x18', '\x00', '\x38', '\xb0', '\xb9', '\x61', '\xa6',
+ '\xb0', '\xb9', '\x6f', '\xae', '\xd2', '\x17', '\x00', '\x38',
+ '\xb0', '\xb9', '\x62', '\xaa', '\x41', '\xb2', '\x3f', '\xbd',
+ '\x42', '\x03', '\x00', '\x38', '\x41', '\xa2', '\xbe', '\x3f',
+ '\x3e', '\x0d', '\xfc', '\xe1', '\x7e', '\xbe', '\x8c', '\xe2',
+ '\xfe', '\x2b', '\x6a', '\x16', '\x6b', '\x26', '\x6f', '\x0e',
+ '\x9a', '\x0a', '\x00', '\x38', '\xb0', '\xb9', '\x61', '\xa6',
+ '\x4f', '\xbc', '\x80', '\x00', '\x5f', '\xcc', '\x55', '\x05',
+ '\x3f', '\xbd', '\x52', '\x0a', '\x00', '\x38', '\x61', '\xa6',
+ '\xb0', '\xb9', '\x04', '\x11', '\x49', '\x9a', '\xcf', '\x9e',
+ '\x02', '\x00', '\x10', '\x20', '\x0f', '\x05', '\x6f', '\x9e',
+ '\x30', '\x00', '\x30', '\x00', '\x61', '\x29', '\xe9', '\x9b',
+ '\xbe', '\x2f', '\x3e', '\x0d', '\x4f', '\x9c', '\x30', '\x00',
+ '\x61', '\x29', '\xd9', '\x9b', '\xbe', '\x2f', '\x3e', '\x0d',
+ '\x84', '\xe2', '\xfe', '\x0b', '\x06', '\xa1', '\xeb', '\xba',
+ '\x10', '\x10', '\x0f', '\x05', '\x7a', '\x86', '\x7f', '\xb6',
+ '\xbe', '\x0f', '\x10', '\xa1', '\x6a', '\xaa', '\x7f', '\xb6',
+ '\xbe', '\x0f', '\x70', '\x86', '\x0c', '\xa1', '\xeb', '\xba',
+ '\x22', '\x10', '\x7d', '\x86', '\x14', '\xa1', '\xed', '\xda',
+ '\x10', '\x00', '\x79', '\x86', '\x10', '\xa1', '\x6c', '\xca',
+ '\x01', '\x92', '\x14', '\xa1', '\xe9', '\x9a', '\xf9', '\x10',
+ '\x2c', '\xd6', '\x0c', '\xa1', '\x29', '\xda', '\xe9', '\xb6',
+ '\xd1', '\x10', '\x0f', '\x05', '\x01', '\x02', '\xc7', '\x02',
+ '\xd3', '\x80', '\x0c', '\xa2', '\x7a', '\x86', '\x7f', '\xb6',
+ '\xbe', '\x0f', '\x84', '\xe2', '\xfe', '\x0b', '\x6a', '\x06',
+ '\x6b', '\xa6', '\x6d', '\xb6', '\x7d', '\x86', '\xeb', '\xd6',
+ '\x48', '\xa0', '\x0f', '\x05', '\x60', '\x9a', '\x2d', '\x96',
+ '\x49', '\xa5', '\x59', '\x9a', '\x4c', '\xd5', '\xd9', '\x9a',
+ '\x32', '\x30', '\x02', '\xd2', '\x82', '\xd2', '\x6b', '\x96',
+ '\x2a', '\x96', '\xe9', '\xa6', '\x20', '\x00', '\x6a', '\xc6',
+ '\x60', '\xc9', '\x59', '\x9a', '\xdf', '\x9e', '\xff', '\xff',
+ '\x0a', '\x30', '\x02', '\xc2', '\x82', '\xc2', '\x42', '\xa2',
+ '\x7f', '\xb6', '\xbe', '\x0f', '\x6b', '\x96', '\x2a', '\x96',
+ '\xe9', '\xc6', '\xe5', '\x10', '\x0f', '\x05', '\x41', '\xa2',
+ '\x7f', '\xb6', '\xbe', '\x0f', '\xeb', '\xd6', '\xbd', '\xb0',
+ '\x0f', '\x05', '\x7a', '\x86', '\x7f', '\xb6', '\xbe', '\x0f',
+ '\xfc', '\xe1', '\x7e', '\xbe', '\x90', '\xe2', '\xfe', '\x3b',
+ '\x73', '\x86', '\x72', '\x86', '\x6f', '\x0e', '\x3a', '\x19',
+ '\x00', '\x38', '\x41', '\x12', '\x04', '\x01', '\xc1', '\x1b',
+ '\xcf', '\x1e', '\x01', '\x00', '\x04', '\x30', '\x42', '\x92',
+ '\x44', '\x92', '\x05', '\x01', '\xc9', '\x9b', '\x60', '\xa6',
+ '\x3f', '\xbd', '\x2e', '\x0d', '\x00', '\x38', '\x6a', '\xa6',
+ '\x0c', '\x20', '\x0f', '\x05', '\xc1', '\x13', '\xcf', '\x1e',
+ '\x03', '\x00', '\xd9', '\x80', '\x0f', '\x05', '\x06', '\x01',
+ '\x23', '\x3a', '\x0f', '\x0c', '\x6c', '\x00', '\x01', '\x22',
+ '\xc1', '\x22', '\xc7', '\x80', '\x63', '\xa6', '\xbe', '\x3f',
+ '\x3e', '\x0d', '\xfc', '\xe1', '\x7e', '\xbe', '\x98', '\xe2',
+ '\xfe', '\x5b', '\x6a', '\x16', '\x6b', '\x56', '\x6c', '\x36',
+ '\x70', '\x86', '\xed', '\x06', '\x74', '\xa0', '\x6d', '\x46',
+ '\x05', '\x11', '\x49', '\x9a', '\xcf', '\x9e', '\x02', '\x00',
+ '\x12', '\x20', '\x0f', '\x05', '\x43', '\x05', '\x59', '\x9a',
+ '\xdf', '\x9e', '\xff', '\xff', '\x54', '\x30', '\x42', '\x22',
+ '\x05', '\x11', '\x49', '\x9a', '\xcf', '\x9e', '\x04', '\x00',
+ '\x0e', '\x20', '\x61', '\xa6', '\x43', '\x05', '\x69', '\x9a',
+ '\xff', '\x92', '\x3e', '\x30', '\x44', '\x22', '\x61', '\xa6',
+ '\x3f', '\xbd', '\x9a', '\x0a', '\x00', '\x38', '\x61', '\xa6',
+ '\x4f', '\xbc', '\xa0', '\x00', '\x5f', '\xcc', '\x55', '\x05',
+ '\x3f', '\xbd', '\x52', '\x0a', '\x00', '\x38', '\x65', '\xb6',
+ '\x20', '\xb6', '\x63', '\xc6', '\x20', '\xc6', '\x61', '\xa6',
+ '\x3f', '\xbd', '\x26', '\x0a', '\x00', '\x38', '\x6a', '\x26',
+ '\x61', '\xa6', '\x65', '\xb6', '\x20', '\xb6', '\x3f', '\xbd',
+ '\xc6', '\x0a', '\x00', '\x38', '\x6a', '\xa6', '\xf3', '\x20',
+ '\x61', '\xa6', '\x22', '\x06', '\xe4', '\x06', '\x91', '\xb0',
+ '\x0f', '\x05', '\xbe', '\x5f', '\x3e', '\x0d', '\xfc', '\xe1',
+ '\x7e', '\xbe', '\xa4', '\xe2', '\xfe', '\x8b', '\x6a', '\x16',
+ '\x6b', '\x06', '\x6c', '\x86', '\x3f', '\xbd', '\x58', '\x12',
+ '\x00', '\x38', '\x6a', '\x96', '\x1a', '\x30', '\x41', '\xa2',
+ '\x60', '\xd6', '\x28', '\xd6', '\xe9', '\xd6', '\x14', '\x80',
+ '\x0f', '\x05', '\x6f', '\xae', '\xa4', '\x18', '\x00', '\x38',
+ '\x3f', '\xbd', '\x12', '\x03', '\x00', '\x38', '\x42', '\xa2',
+ '\xbe', '\x8f', '\x3e', '\x0d', '\x6f', '\xce', '\x40', '\x19',
+ '\x00', '\x38', '\x6c', '\xca', '\xec', '\x06', '\x1e', '\x10',
+ '\xec', '\xd6', '\x6f', '\x9e', '\x12', '\x1a', '\x00', '\x38',
+ '\x09', '\x91', '\x70', '\x8a', '\x16', '\x91', '\xe1', '\x1b',
+ '\xac', '\x06', '\x1a', '\x91', '\xe0', '\x0b', '\x1e', '\x91',
+ '\xe8', '\x8b', '\x74', '\xe0', '\x0f', '\x05', '\x5a', '\x80',
+ '\x6c', '\x96', '\x6f', '\xde', '\x12', '\x1a', '\x00', '\x38',
+ '\x01', '\xd1', '\xe1', '\x1b', '\x05', '\xd1', '\xe0', '\x0b',
+ '\xa0', '\x96', '\x09', '\xd1', '\xe9', '\x9b', '\x29', '\x16',
+ '\x16', '\xd1', '\xe1', '\x1b', '\x1a', '\xd1', '\x70', '\x8a',
+ '\x68', '\xc6', '\xa9', '\xc6', '\x1e', '\xd1', '\xec', '\xcb',
+ '\x46', '\xe0', '\x0f', '\x05', '\x6f', '\xae', '\xc0', '\x18',
+ '\x00', '\x38', '\x3f', '\xbd', '\x12', '\x03', '\x00', '\x38',
+ '\x44', '\xa2', '\xbe', '\x8f', '\x3e', '\x0d', '\x6f', '\xae',
+ '\xd4', '\x18', '\x00', '\x38', '\x3f', '\xbd', '\x12', '\x03',
+ '\x00', '\x38', '\x60', '\xa6', '\x41', '\xb2', '\x3f', '\xbd',
+ '\x42', '\x03', '\x00', '\x38', '\x43', '\xa2', '\xbe', '\x8f',
+ '\x3e', '\x0d', '\x6f', '\x9e', '\x12', '\x1a', '\x00', '\x38',
+ '\x01', '\x91', '\xe1', '\x1b', '\x05', '\x91', '\xe0', '\x0b',
+ '\x09', '\x91', '\xe8', '\x8b', '\x1e', '\x91', '\x70', '\x8a',
+ '\x6f', '\xce', '\x12', '\x1a', '\x00', '\x38', '\x7c', '\x0a',
+ '\x0d', '\xc1', '\x70', '\x8a', '\x11', '\xc1', '\x70', '\x8a',
+ '\x15', '\xc1', '\x79', '\x0e', '\x7f', '\x0d', '\x34', '\x1a',
+ '\x00', '\x38', '\x70', '\x8a', '\x7f', '\x0d', '\x38', '\x1a',
+ '\x00', '\x38', '\x70', '\x8a', '\x0d', '\x91', '\xe8', '\x8a',
+ '\xff', '\x8d', '\xc0', '\x01', '\x75', '\x86', '\x65', '\x56',
+ '\x04', '\x20', '\x6c', '\xd6', '\x15', '\xd2', '\x65', '\x96',
+ '\x29', '\x55', '\x65', '\x36', '\x23', '\x95', '\x09', '\xd1',
+ '\x69', '\x9a', '\x24', '\x30', '\x2c', '\x36', '\x0d', '\xd1',
+ '\xe9', '\x9a', '\x1c', '\x80', '\x0f', '\x05', '\x09', '\x31',
+ '\x69', '\x9a', '\x10', '\x30', '\x0f', '\x05', '\x83', '\x0b',
+ '\x0a', '\x20', '\x0f', '\x05', '\x0d', '\x31', '\xe9', '\x9a',
+ '\x06', '\x20', '\x0f', '\x05', '\x65', '\x56', '\x35', '\x35',
+ '\x11', '\x31', '\x63', '\x3a', '\xca', '\x32', '\x4d', '\x90',
+ '\x65', '\x96', '\x29', '\x55', '\x65', '\x36', '\x23', '\x95',
+ '\x2f', '\x3e', '\x12', '\x1a', '\x00', '\x38', '\x05', '\x31',
+ '\x64', '\x4a', '\x0d', '\x31', '\x69', '\x9a', '\x29', '\x46',
+ '\x01', '\x31', '\x27', '\x9a', '\x65', '\xa6', '\xc3', '\xa3',
+ '\xa5', '\xa6', '\xc2', '\xa3', '\xa5', '\xa6', '\xc2', '\xa3',
+ '\x2f', '\xae', '\x3a', '\x19', '\x00', '\x38', '\x64', '\xb6',
+ '\x3f', '\xbd', '\xa8', '\x11', '\x00', '\x38', '\x83', '\x0b',
+ '\x24', '\x30', '\x6a', '\x66', '\x65', '\xa6', '\xc3', '\xa3',
+ '\xa5', '\xa6', '\xc2', '\xa3', '\xa5', '\xa6', '\xc2', '\xa3',
+ '\x2f', '\xae', '\x3a', '\x19', '\x00', '\x38', '\x64', '\xb6',
+ '\x3f', '\xbd', '\xc6', '\x0a', '\x00', '\x38', '\x6a', '\xa6',
+ '\xe5', '\x20', '\x65', '\xa6', '\x73', '\x0a', '\x65', '\x26',
+ '\xc3', '\x23', '\xa5', '\x26', '\xc2', '\x23', '\xa5', '\x26',
+ '\xc2', '\x23', '\x2f', '\x2e', '\x3a', '\x19', '\x00', '\x38',
+ '\x62', '\xa6', '\x4f', '\xbc', '\xf0', '\x00', '\x5f', '\xcc',
+ '\x55', '\x05', '\x3f', '\xbd', '\x52', '\x0a', '\x00', '\x38',
+ '\x62', '\xa6', '\x64', '\xb6', '\x67', '\xc6', '\x66', '\xd6',
+ '\x3f', '\xbd', '\xfa', '\x11', '\x00', '\x38', '\x4a', '\xa6',
+ '\x28', '\x20', '\x7b', '\x86', '\x0d', '\x31', '\x69', '\xde',
+ '\x26', '\xd6', '\xe9', '\xdb', '\x11', '\x31', '\x70', '\x8a',
+ '\x62', '\xaa', '\x24', '\xa6', '\x3f', '\xbd', '\x42', '\x03',
+ '\x00', '\x38', '\x6f', '\xae', '\xde', '\x18', '\x00', '\x38',
+ '\x3f', '\xbd', '\x12', '\x03', '\x00', '\x38', '\xaa', '\xe0',
+ '\x0f', '\x05', '\xcf', '\xae', '\x01', '\x00', '\x4c', '\x30',
+ '\x0f', '\x05', '\xcf', '\xae', '\x02', '\x00', '\x46', '\x20',
+ '\x65', '\xa6', '\x62', '\xaa', '\x24', '\xa6', '\x6f', '\x1e',
+ '\x42', '\x03', '\x00', '\x38', '\x7b', '\x86', '\xb1', '\xb9',
+ '\x6f', '\x0e', '\x12', '\x03', '\x00', '\x38', '\x6f', '\xae',
+ '\xf2', '\x18', '\x00', '\x38', '\xb0', '\xb9', '\x66', '\xa6',
+ '\x7b', '\x86', '\xb1', '\xb9', '\x6f', '\xae', '\xfe', '\x18',
+ '\x00', '\x38', '\xb0', '\xb9', '\x62', '\xa6', '\x64', '\xb6',
+ '\x3f', '\xbd', '\x5a', '\x11', '\x00', '\x38', '\x41', '\x92',
+ '\xc3', '\x9b', '\x11', '\x31', '\x6d', '\x9e', '\x01', '\x92',
+ '\x58', '\xe0', '\xed', '\x9b', '\x65', '\xa6', '\xc3', '\xa3',
+ '\xa5', '\xa6', '\xc2', '\xa3', '\xa5', '\xa6', '\xc2', '\xa3',
+ '\x6f', '\xad', '\x3a', '\x19', '\x00', '\x38', '\x62', '\xae',
+ '\x24', '\xa6', '\x6f', '\x1e', '\x42', '\x03', '\x00', '\x38',
+ '\x7b', '\x86', '\xb1', '\xb9', '\x6f', '\x0e', '\x12', '\x03',
+ '\x00', '\x38', '\x6f', '\xae', '\x06', '\x19', '\x00', '\x38',
+ '\xb0', '\xb9', '\x66', '\xa6', '\x7b', '\x86', '\xb1', '\xb9',
+ '\x6f', '\xae', '\xfe', '\x18', '\x00', '\x38', '\xb0', '\xb9',
+ '\x62', '\xa6', '\x64', '\xb6', '\x67', '\xc6', '\x66', '\xd6',
+ '\x3f', '\xbd', '\xaa', '\x12', '\x00', '\x38', '\x0d', '\x31',
+ '\x6d', '\x9e', '\x26', '\x96', '\xed', '\x9b', '\x11', '\x31',
+ '\x70', '\x8a', '\x6f', '\xce', '\x12', '\x1a', '\x00', '\x38',
+ '\x0d', '\xc1', '\x69', '\x9a', '\x7f', '\x0d', '\x34', '\x1a',
+ '\x00', '\x38', '\x29', '\x9a', '\xe8', '\x96', '\xff', '\x1d',
+ '\x44', '\xfe', '\x0f', '\x05', '\x75', '\x86', '\x6f', '\x2e',
+ '\x3a', '\x19', '\x00', '\x38', '\x6f', '\x1e', '\x12', '\x1a',
+ '\x00', '\x38', '\x09', '\x11', '\xa0', '\x0b', '\x4c', '\x30',
+ '\x7b', '\x86', '\x62', '\xaa', '\x3f', '\xbd', '\x42', '\x03',
+ '\x00', '\x38', '\x6f', '\xae', '\x12', '\x19', '\x00', '\x38',
+ '\x3f', '\xbd', '\x12', '\x03', '\x00', '\x38', '\x70', '\x86',
+ '\x09', '\x11', '\xe0', '\x0a', '\x22', '\x00', '\x0f', '\x05',
+ '\x05', '\x11', '\x29', '\x0a', '\x01', '\x11', '\x6d', '\xda',
+ '\x62', '\x99', '\x59', '\x9a', '\x4d', '\x05', '\xd9', '\x9a',
+ '\xff', '\x2d', '\x9a', '\xfd', '\x0f', '\x05', '\x02', '\x02',
+ '\x09', '\x11', '\xe0', '\x0a', '\xe3', '\x10', '\x0f', '\x05',
+ '\x6f', '\xae', '\x22', '\x19', '\x00', '\x38', '\x3f', '\xbd',
+ '\x12', '\x03', '\x00', '\x38', '\x0f', '\x2c', '\x6c', '\x00',
+ '\x01', '\x52', '\xc1', '\x52', '\xa5', '\x80', '\x15', '\x12',
+ '\x7a', '\x86', '\xbe', '\x8f', '\x3e', '\x0d', '\x00', '\x00',
+ '\x7f', '\xb6', '\x0f', '\x05', '\x00', '\x00', '\x00', '\x00',
+ '\x0d', '\x0a', '\x0d', '\x0a', '\x44', '\x65', '\x76', '\x69',
+ '\x63', '\x65', '\x20', '\x49', '\x44', '\x20', '\x3d', '\x20',
+ '\x00', '\x00', '\x43', '\x68', '\x65', '\x63', '\x6b', '\x73',
+ '\x75', '\x6d', '\x20', '\x6f', '\x66', '\x20', '\x62', '\x6f',
+ '\x6f', '\x74', '\x6c', '\x6f', '\x61', '\x64', '\x65', '\x72',
+ '\x20', '\x69', '\x73', '\x20', '\x00', '\x00', '\x57', '\x61',
+ '\x69', '\x74', '\x69', '\x6e', '\x67', '\x20', '\x66', '\x6f',
+ '\x72', '\x20', '\x6c', '\x6f', '\x61', '\x64', '\x20', '\x69',
+ '\x6e', '\x66', '\x6f', '\x2e', '\x0d', '\x0a', '\x00', '\x00',
+ '\x47', '\x6f', '\x74', '\x20', '\x6c', '\x6f', '\x61', '\x64',
+ '\x20', '\x69', '\x6e', '\x66', '\x6f', '\x2e', '\x0d', '\x0a',
+ '\x00', '\x00', '\x50', '\x41', '\x43', '\x4b', '\x45', '\x54',
+ '\x5f', '\x49', '\x4e', '\x46', '\x4f', '\x0d', '\x0a', '\x00',
+ '\x53', '\x45', '\x54', '\x5f', '\x52', '\x45', '\x47', '\x49',
+ '\x53', '\x54', '\x45', '\x52', '\x0d', '\x0a', '\x00', '\x00',
+ '\x47', '\x45', '\x54', '\x5f', '\x52', '\x45', '\x47', '\x49',
+ '\x53', '\x54', '\x45', '\x52', '\x0d', '\x0a', '\x00', '\x00',
+ '\x50', '\x41', '\x55', '\x53', '\x45', '\x5f', '\x4c', '\x4f',
+ '\x4f', '\x50', '\x0d', '\x0a', '\x00', '\x00', '\x4d', '\x45',
+ '\x4d', '\x5f', '\x56', '\x45', '\x52', '\x49', '\x46', '\x59',
+ '\x0d', '\x0a', '\x00', '\x00', '\x76', '\x65', '\x72', '\x69',
+ '\x66', '\x79', '\x20', '\x66', '\x61', '\x69', '\x6c', '\x65',
+ '\x64', '\x0d', '\x0a', '\x00', '\x4d', '\x45', '\x4d', '\x5f',
+ '\x54', '\x45', '\x53', '\x54', '\x0d', '\x0a', '\x00', '\x00',
+ '\x23', '\x23', '\x23', '\x20', '\x4d', '\x65', '\x6d', '\x6f',
+ '\x72', '\x79', '\x20', '\x74', '\x65', '\x73', '\x74', '\x20',
+ '\x66', '\x61', '\x69', '\x6c', '\x65', '\x64', '\x20', '\x61',
+ '\x74', '\x20', '\x00', '\x00', '\x50', '\x61', '\x73', '\x73',
+ '\x65', '\x64', '\x20', '\x6d', '\x65', '\x6d', '\x6f', '\x72',
+ '\x79', '\x20', '\x74', '\x65', '\x73', '\x74', '\x2e', '\x0d',
+ '\x0a', '\x00', '\x4d', '\x45', '\x4d', '\x5f', '\x44', '\x55',
+ '\x4d', '\x50', '\x0d', '\x0a', '\x00', '\x00', '\x4d', '\x45',
+ '\x4d', '\x5f', '\x43', '\x4c', '\x45', '\x41', '\x52', '\x0d',
+ '\x0a', '\x00', '\x46', '\x4c', '\x41', '\x53', '\x48', '\x0d',
+ '\x0a', '\x00', '\x4a', '\x55', '\x4d', '\x50', '\x0d', '\x0a',
+ '\x00', '\x00', '\x45', '\x4e', '\x44', '\x0d', '\x0a', '\x00',
+ '\x23', '\x23', '\x23', '\x20', '\x55', '\x6e', '\x6b', '\x6e',
+ '\x6f', '\x77', '\x6e', '\x20', '\x74', '\x79', '\x70', '\x65',
+ '\x3a', '\x20', '\x00', '\x00', '\x43', '\x68', '\x65', '\x63',
+ '\x6b', '\x73', '\x75', '\x6d', '\x20', '\x6f', '\x66', '\x20',
+ '\x66', '\x69', '\x6c', '\x65', '\x20', '\x69', '\x73', '\x20',
+ '\x00', '\x00', '\x23', '\x23', '\x23', '\x20', '\x4d', '\x65',
+ '\x6d', '\x6f', '\x72', '\x79', '\x20', '\x74', '\x65', '\x73',
+ '\x74', '\x20', '\x31', '\x20', '\x66', '\x61', '\x69', '\x6c',
+ '\x65', '\x64', '\x20', '\x61', '\x74', '\x20', '\x00', '\x00',
+ '\x23', '\x23', '\x23', '\x20', '\x4d', '\x65', '\x6d', '\x6f',
+ '\x72', '\x79', '\x20', '\x74', '\x65', '\x73', '\x74', '\x20',
+ '\x32', '\x20', '\x66', '\x61', '\x69', '\x6c', '\x65', '\x64',
+ '\x20', '\x61', '\x74', '\x20', '\x00', '\x00', '\x20', '\x3a',
+ '\x00', '\x00', '\x38', '\x4d', '\x62', '\x20', '\x42', '\x42',
+ '\x00', '\x00', '\x38', '\x4d', '\x62', '\x20', '\x54', '\x42',
+ '\x00', '\x00', '\x31', '\x36', '\x4d', '\x62', '\x20', '\x42',
+ '\x42', '\x00', '\x31', '\x36', '\x4d', '\x62', '\x20', '\x54',
+ '\x42', '\x00', '\x33', '\x32', '\x4d', '\x62', '\x20', '\x54',
+ '\x42', '\x00', '\x55', '\x6e', '\x73', '\x75', '\x70', '\x70',
+ '\x6f', '\x72', '\x74', '\x65', '\x64', '\x20', '\x69', '\x6e',
+ '\x74', '\x65', '\x72', '\x6c', '\x65', '\x61', '\x76', '\x65',
+ '\x21', '\x0a', '\x00', '\x00', '\x46', '\x6f', '\x75', '\x6e',
+ '\x64', '\x20', '\x31', '\x20', '\x78', '\x20', '\x43', '\x46',
+ '\x49', '\x20', '\x61', '\x74', '\x20', '\x00', '\x54', '\x6f',
+ '\x6f', '\x20', '\x6d', '\x61', '\x6e', '\x79', '\x20', '\x72',
+ '\x65', '\x67', '\x69', '\x6f', '\x6e', '\x73', '\x20', '\x6f',
+ '\x6e', '\x20', '\x63', '\x68', '\x69', '\x70', '\x21', '\x0a',
+ '\x00', '\x00', '\x4e', '\x6f', '\x20', '\x73', '\x69', '\x6e',
+ '\x67', '\x6c', '\x65', '\x20', '\x78', '\x31', '\x36', '\x20',
+ '\x61', '\x74', '\x20', '\x00', '\x4e', '\x6f', '\x20', '\x69',
+ '\x6e', '\x74', '\x65', '\x72', '\x6c', '\x65', '\x61', '\x76',
+ '\x65', '\x64', '\x20', '\x78', '\x31', '\x36', '\x20', '\x61',
+ '\x74', '\x20', '\x00', '\x00', '\x46', '\x6f', '\x75', '\x6e',
+ '\x64', '\x20', '\x00', '\x00', '\x31', '\x00', '\x32', '\x00',
+ '\x20', '\x78', '\x20', '\x00', '\x46', '\x61', '\x74', '\x61',
+ '\x6c', '\x3a', '\x20', '\x66', '\x6c', '\x61', '\x73', '\x68',
+ '\x20', '\x69', '\x73', '\x20', '\x74', '\x6f', '\x6f', '\x20',
+ '\x73', '\x6d', '\x61', '\x6c', '\x6c', '\x2e', '\x0a', '\x00',
+ '\x53', '\x65', '\x63', '\x74', '\x6f', '\x72', '\x20', '\x65',
+ '\x72', '\x61', '\x73', '\x65', '\x20', '\x65', '\x72', '\x72',
+ '\x6f', '\x72', '\x0a', '\x00', '\x45', '\x72', '\x72', '\x6f',
+ '\x72', '\x20', '\x61', '\x74', '\x20', '\x00', '\x3a', '\x20',
+ '\x4e', '\x6f', '\x20', '\x6e', '\x65', '\x65', '\x64', '\x20',
+ '\x74', '\x6f', '\x20', '\x77', '\x72', '\x69', '\x74', '\x65',
+ '\x0a', '\x00', '\x3a', '\x20', '\x45', '\x72', '\x61', '\x73',
+ '\x69', '\x6e', '\x67', '\x20', '\x00', '\x00', '\x20', '\x62',
+ '\x79', '\x74', '\x65', '\x73', '\x0a', '\x00', '\x3a', '\x20',
+ '\x57', '\x72', '\x69', '\x74', '\x69', '\x6e', '\x67', '\x20',
+ '\x00', '\x00', '\x3a', '\x20', '\x56', '\x65', '\x72', '\x69',
+ '\x66', '\x79', '\x69', '\x6e', '\x67', '\x2e', '\x2e', '\x2e',
+ '\x00', '\x00', '\x4f', '\x4b', '\x0a', '\x00', '\xfa', '\x17',
+ '\x00', '\x38', '\x02', '\x18', '\x00', '\x38', '\x0a', '\x18',
+ '\x00', '\x38', '\x12', '\x18', '\x00', '\x38', '\x1a', '\x18',
+ '\x00', '\x38', '\x00', '\x00', '\x00', '\x80', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x84', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x54', '\x68', '\x69', '\x73',
+ '\x20', '\x62', '\x6f', '\x6f', '\x74', '\x6c', '\x6f', '\x61',
+ '\x64', '\x65', '\x72', '\x20', '\x77', '\x61', '\x73', '\x20',
+ '\x62', '\x75', '\x69', '\x6c', '\x74', '\x20', '\x62', '\x79',
+ '\x20', '\x72', '\x6f', '\x6f', '\x74', '\x20', '\x6f', '\x6e',
+ '\x20', '\x57', '\x65', '\x64', '\x20', '\x4d', '\x61', '\x79',
+ '\x20', '\x31', '\x36', '\x20', '\x32', '\x31', '\x3a', '\x33',
+ '\x31', '\x3a', '\x34', '\x34', '\x20', '\x43', '\x45', '\x53',
+ '\x54', '\x20', '\x32', '\x30', '\x30', '\x37', '\x2e', '\x0d',
+ '\x0a', '\x00'
+};
--- /dev/null
+
+/* cconv 1.2 12/16/97, Copyright (C) 1997, Axis Communications AB */
+
+const char ser_noleds_ima[] =
+{
+ '\x0f', '\x05', '\x0f', '\x05', '\x6f', '\xee', '\x00', '\x1f',
+ '\x00', '\x38', '\x3f', '\x0d', '\x08', '\x01', '\x00', '\x38',
+ '\x78', '\x56', '\x34', '\x12', '\x21', '\x43', '\x65', '\x87',
+ '\x6f', '\xde', '\x20', '\x00', '\x00', '\xb0', '\x5f', '\x9c',
+ '\x65', '\x6f', '\xed', '\x9b', '\x5f', '\x9c', '\x25', '\x2f',
+ '\x7f', '\x0d', '\xdc', '\x15', '\x00', '\x38', '\xe9', '\x9b',
+ '\xed', '\x9b', '\x3f', '\x0d', '\x28', '\x01', '\x00', '\x38',
+ '\xfc', '\xe1', '\x7e', '\xbe', '\x7f', '\x0d', '\x7e', '\x1a',
+ '\x00', '\x38', '\x70', '\x8a', '\x6f', '\x9e', '\x20', '\x00',
+ '\x00', '\xb0', '\x69', '\x9a', '\x79', '\x67', '\x7f', '\x0d',
+ '\x32', '\x1a', '\x00', '\x38', '\xe9', '\x9b', '\x6f', '\x9e',
+ '\x22', '\x00', '\x00', '\xb0', '\x59', '\x9a', '\x59', '\x94',
+ '\x7f', '\x0d', '\x9a', '\x1a', '\x00', '\x38', '\xe9', '\x9b',
+ '\x6f', '\x9e', '\x04', '\x00', '\x00', '\xb0', '\x69', '\x9a',
+ '\x06', '\x93', '\xe1', '\x93', '\x81', '\x92', '\x7f', '\x0d',
+ '\x82', '\x1a', '\x00', '\x38', '\xc9', '\x9b', '\x7f', '\x0d',
+ '\x44', '\x1a', '\x00', '\x38', '\x70', '\x4a', '\x3f', '\xbd',
+ '\x28', '\x02', '\x00', '\x38', '\x3f', '\xbd', '\xac', '\x02',
+ '\x00', '\x38', '\x3f', '\xbd', '\xcc', '\x01', '\x00', '\x38',
+ '\x6a', '\xa6', '\xf7', '\x30', '\x0f', '\x05', '\x6f', '\x9e',
+ '\x00', '\x01', '\x00', '\x38', '\x69', '\x9a', '\x7f', '\x0d',
+ '\x7e', '\x1a', '\x00', '\x38', '\xe9', '\x9a', '\x24', '\x80',
+ '\x0f', '\x05', '\x6f', '\x9e', '\x82', '\x1a', '\x00', '\x38',
+ '\x49', '\x9a', '\xcf', '\x9e', '\x01', '\x00', '\xd3', '\x20',
+ '\x0f', '\x05', '\x6f', '\xde', '\xd4', '\x01', '\x00', '\xb0',
+ '\x4d', '\x9a', '\x38', '\x93', '\x41', '\x93', '\xcd', '\x9b',
+ '\xc1', '\xe0', '\x0f', '\x05', '\x3e', '\xbe', '\x3f', '\x0d',
+ '\x6c', '\x03', '\x00', '\x38', '\xfc', '\xe1', '\x7e', '\xbe',
+ '\x3f', '\xbd', '\x68', '\x02', '\x00', '\x38', '\x6a', '\xa6',
+ '\x16', '\x20', '\x41', '\x92', '\x3f', '\xbd', '\xf4', '\x01',
+ '\x00', '\x38', '\x6a', '\xa6', '\x0a', '\x30', '\x79', '\x86',
+ '\x3f', '\xbd', '\xac', '\x02', '\x00', '\x38', '\x79', '\x86',
+ '\x69', '\xa6', '\x3e', '\x0d', '\x84', '\xe2', '\x6f', '\x9e',
+ '\x22', '\x00', '\x00', '\xb0', '\x59', '\x9a', '\x59', '\x94',
+ '\xee', '\x9b', '\x6f', '\xce', '\x9a', '\x1a', '\x00', '\x38',
+ '\x6c', '\x9a', '\x6e', '\xda', '\xad', '\x96', '\xb9', '\x96',
+ '\xdf', '\x9c', '\x80', '\x25', '\x0a', '\xd0', '\x0f', '\x05',
+ '\x6e', '\x9a', '\xec', '\x9b', '\x04', '\xe0', '\x41', '\xa2',
+ '\x7a', '\x86', '\x7f', '\xb6', '\x04', '\xe2', '\x00', '\x00',
+ '\x6f', '\x9e', '\xdc', '\x15', '\x00', '\x38', '\x79', '\x8a',
+ '\x7f', '\x0d', '\x64', '\x00', '\x00', '\xb0', '\x70', '\x8a',
+ '\x4f', '\xde', '\x55', '\x00', '\x7f', '\x0d', '\x63', '\x00',
+ '\x00', '\xb0', '\xcd', '\xdb', '\x0b', '\xd2', '\x7f', '\x0d',
+ '\x62', '\x00', '\x00', '\xb0', '\xcd', '\xdb', '\xa0', '\xd2',
+ '\xc9', '\xdb', '\x7f', '\x0d', '\x61', '\x00', '\x00', '\xb0',
+ '\xcd', '\xdb', '\x41', '\x92', '\x7f', '\x0d', '\x84', '\x1a',
+ '\x00', '\x38', '\xc9', '\x9b', '\x7f', '\xb6', '\x0f', '\x05',
+ '\x6f', '\x9e', '\x60', '\x00', '\x00', '\xb0', '\x69', '\x9a',
+ '\x59', '\xb4', '\x1f', '\xbf', '\xff', '\x01', '\x88', '\x93',
+ '\x2e', '\xa0', '\x0f', '\x05', '\x6f', '\xce', '\x7e', '\x1a',
+ '\x00', '\x38', '\x6c', '\x9a', '\x6f', '\xde', '\x04', '\x01',
+ '\x00', '\x38', '\x6d', '\x99', '\xcb', '\xbb', '\x01', '\x92',
+ '\xec', '\x9b', '\x6f', '\x9e', '\x22', '\x00', '\x00', '\xb0',
+ '\x49', '\x9a', '\x49', '\x94', '\x7f', '\x0d', '\x9a', '\x1a',
+ '\x00', '\x38', '\xe9', '\x9b', '\x7f', '\xb6', '\x41', '\xa2',
+ '\x7f', '\xb6', '\x7a', '\x86', '\x6f', '\x9e', '\x61', '\x00',
+ '\x00', '\xb0', '\x49', '\x9a', '\x85', '\x93', '\xf5', '\xa0',
+ '\x0f', '\x05', '\x4f', '\x9e', '\x2b', '\x00', '\x7f', '\x0d',
+ '\xdc', '\x15', '\x00', '\x38', '\xc9', '\x9b', '\x7f', '\x0d',
+ '\x60', '\x00', '\x00', '\xb0', '\xc9', '\x9b', '\x7f', '\xb6',
+ '\x0f', '\x05', '\x8a', '\x0b', '\x28', '\x30', '\x0f', '\x05',
+ '\x6f', '\x9e', '\x61', '\x00', '\x00', '\xb0', '\x49', '\x9a',
+ '\x85', '\x93', '\x14', '\xa0', '\x0f', '\x05', '\x6f', '\x9e',
+ '\xdc', '\x15', '\x00', '\x38', '\x4a', '\xde', '\xc9', '\xdb',
+ '\x7f', '\x0d', '\x60', '\x00', '\x00', '\xb0', '\xcd', '\xdb',
+ '\x8a', '\x0b', '\xdd', '\x20', '\x0f', '\x05', '\x7f', '\xb6',
+ '\x0f', '\x05', '\xfc', '\xe1', '\x7e', '\xbe', '\x8e', '\xe2',
+ '\x4f', '\x9e', '\x30', '\x00', '\x01', '\xe1', '\xc9', '\x9b',
+ '\x4f', '\xde', '\x78', '\x00', '\x02', '\xe1', '\xcd', '\xdb',
+ '\x4d', '\x92', '\x0b', '\xe1', '\xc9', '\x9b', '\x4a', '\xd2',
+ '\x0c', '\xe1', '\xcd', '\xdb', '\x0d', '\xe1', '\x70', '\x0a',
+ '\x4b', '\xb6', '\x06', '\x20', '\x7c', '\x86', '\x0b', '\xe1',
+ '\x70', '\x0a', '\x6c', '\x96', '\xc2', '\x93', '\x6a', '\xb6',
+ '\xe9', '\xb7', '\x4b', '\xd6', '\x0f', '\xd3', '\xcf', '\xde',
+ '\x09', '\x00', '\x04', '\x80', '\x49', '\x92', '\x07', '\xd2',
+ '\xac', '\x96', '\x4e', '\xb2', '\x2e', '\xb6', '\x2b', '\x96',
+ '\x30', '\xd2', '\xf3', '\x91', '\xcd', '\xdb', '\x01', '\xc2',
+ '\xc8', '\xc2', '\xd9', '\x20', '\x6c', '\x96', '\x6e', '\xa6',
+ '\x01', '\xa2', '\x3f', '\xbd', '\xd2', '\x02', '\x00', '\x38',
+ '\x0e', '\xe2', '\x3e', '\x0d', '\xfc', '\xe1', '\x7e', '\xbe',
+ '\x84', '\xe2', '\xfe', '\x0b', '\x6f', '\x0e', '\xd2', '\x02',
+ '\x00', '\x38', '\x6f', '\xae', '\xe0', '\x15', '\x00', '\x38',
+ '\xb0', '\xb9', '\x6f', '\xae', '\x32', '\x1a', '\x00', '\x38',
+ '\x6a', '\xaa', '\x7a', '\x67', '\x41', '\xb2', '\x3f', '\xbd',
+ '\x02', '\x03', '\x00', '\x38', '\x6f', '\xae', '\xac', '\x19',
+ '\x00', '\x38', '\xb0', '\xb9', '\x6f', '\x9e', '\xf0', '\x00',
+ '\x00', '\x38', '\xef', '\x9e', '\xf2', '\x19', '\x00', '\x38',
+ '\x0e', '\x30', '\x70', '\x86', '\x09', '\x0c', '\xef', '\x9e',
+ '\xf2', '\x19', '\x00', '\x38', '\xf7', '\x20', '\x0f', '\x05',
+ '\x6f', '\xae', '\xf2', '\x15', '\x00', '\x38', '\x3f', '\xbd',
+ '\xd2', '\x02', '\x00', '\x38', '\x60', '\xa6', '\x41', '\xb2',
+ '\x3f', '\xbd', '\x02', '\x03', '\x00', '\x38', '\x3f', '\xbd',
+ '\xe2', '\x03', '\x00', '\x38', '\x3f', '\x0d', '\x28', '\x01',
+ '\x00', '\x38', '\xbe', '\x0f', '\x3e', '\x0d', '\xff', '\xe0',
+ '\x0f', '\x05', '\xfc', '\xe1', '\x7e', '\xbe', '\x84', '\xe2',
+ '\xfe', '\x0b', '\x6f', '\x0e', '\xd2', '\x02', '\x00', '\x38',
+ '\x6f', '\xae', '\x0e', '\x16', '\x00', '\x38', '\xb0', '\xb9',
+ '\x3f', '\xbd', '\xac', '\x02', '\x00', '\x38', '\x6f', '\xae',
+ '\x00', '\x1f', '\x00', '\x38', '\x5f', '\xbc', '\xec', '\x01',
+ '\x3f', '\xbd', '\x60', '\x07', '\x00', '\x38', '\x6f', '\xae',
+ '\x28', '\x16', '\x00', '\x38', '\xb0', '\xb9', '\x3f', '\xbd',
+ '\x26', '\x04', '\x00', '\x38', '\xbe', '\x0f', '\x3e', '\xbe',
+ '\x3f', '\x0d', '\xde', '\x03', '\x00', '\x38', '\xfc', '\xe1',
+ '\x7e', '\xbe', '\x98', '\xe2', '\xfe', '\x4b', '\x6f', '\xde',
+ '\x00', '\x1f', '\x00', '\x38', '\x6d', '\x9a', '\x79', '\x67',
+ '\xed', '\x9f', '\xef', '\xde', '\xec', '\x20', '\x00', '\x38',
+ '\xf3', '\x20', '\x0f', '\x05', '\x6f', '\x3e', '\x00', '\x1f',
+ '\x00', '\x38', '\xa3', '\x0b', '\xff', '\x3d', '\xfe', '\x02',
+ '\x0f', '\x05', '\x63', '\x9a', '\x81', '\x92', '\xcf', '\x9d',
+ '\x0b', '\x00', '\x5f', '\x95', '\x3f', '\xf8', '\x54', '\x02',
+ '\x22', '\x01', '\x18', '\x00', '\x62', '\x00', '\x90', '\x00',
+ '\x96', '\x01', '\xc8', '\x01', '\xe4', '\x00', '\x00', '\x02',
+ '\xb8', '\x00', '\x9a', '\x02', '\xce', '\x02', '\x6f', '\xae',
+ '\x3a', '\x16', '\x00', '\x38', '\x3f', '\xbd', '\xd2', '\x02',
+ '\x00', '\x38', '\x6f', '\x0e', '\x02', '\x03', '\x00', '\x38',
+ '\x04', '\x31', '\x62', '\xae', '\x41', '\xb2', '\xb0', '\xb9',
+ '\x08', '\x31', '\x61', '\xae', '\x41', '\xb2', '\xb0', '\xb9',
+ '\x6f', '\x0e', '\x86', '\x1a', '\x00', '\x38', '\x60', '\x9a',
+ '\x81', '\x92', '\xe0', '\x9b', '\x3f', '\xbd', '\xac', '\x02',
+ '\x00', '\x38', '\x60', '\x9a', '\x01', '\x92', '\xe0', '\x9b',
+ '\x62', '\xaa', '\x61', '\xba', '\x3f', '\xbd', '\x60', '\x07',
+ '\x00', '\x38', '\xff', '\xed', '\x88', '\x02', '\x0c', '\x32',
+ '\x6f', '\xae', '\x48', '\x16', '\x00', '\x38', '\x3f', '\xbd',
+ '\xd2', '\x02', '\x00', '\x38', '\x6f', '\x0e', '\x02', '\x03',
+ '\x00', '\x38', '\x04', '\x31', '\x62', '\xae', '\x41', '\xb2',
+ '\xb0', '\xb9', '\x08', '\x31', '\x61', '\xae', '\x41', '\xb2',
+ '\xb0', '\xb9', '\x61', '\x1a', '\x72', '\x09', '\xe1', '\x1b',
+ '\xff', '\xed', '\x5a', '\x02', '\x0c', '\x32', '\x6f', '\xae',
+ '\x58', '\x16', '\x00', '\x38', '\x3f', '\xbd', '\xd2', '\x02',
+ '\x00', '\x38', '\x6f', '\x1e', '\x02', '\x03', '\x00', '\x38',
+ '\x04', '\x31', '\x60', '\xae', '\x41', '\xb2', '\xb1', '\xb9',
+ '\x60', '\xaa', '\x6a', '\xaa', '\x41', '\xb2', '\xb1', '\xb9',
+ '\xff', '\xed', '\x32', '\x02', '\x08', '\x32', '\x6f', '\xae',
+ '\x68', '\x16', '\x00', '\x38', '\x3f', '\xbd', '\xd2', '\x02',
+ '\x00', '\x38', '\x04', '\x31', '\x60', '\xae', '\x41', '\xb2',
+ '\x3f', '\xbd', '\x02', '\x03', '\x00', '\x38', '\x60', '\xaa',
+ '\xff', '\x3d', '\xc0', '\x01', '\x0f', '\x05', '\x81', '\xa2',
+ '\xfd', '\x20', '\x0f', '\x05', '\xff', '\xed', '\x06', '\x02',
+ '\x08', '\x32', '\x6f', '\x4e', '\xd2', '\x02', '\x00', '\x38',
+ '\x6f', '\xae', '\x76', '\x16', '\x00', '\x38', '\xb4', '\xb9',
+ '\x6f', '\x0e', '\x02', '\x03', '\x00', '\x38', '\x04', '\x31',
+ '\x62', '\xae', '\x41', '\xb2', '\xb0', '\xb9', '\x08', '\x31',
+ '\x61', '\xae', '\x41', '\xb2', '\xb0', '\xb9', '\x62', '\x2a',
+ '\x62', '\x2a', '\xe1', '\x2a', '\xff', '\x3d', '\xb8', '\x01',
+ '\x0f', '\x05', '\x6f', '\xae', '\x84', '\x16', '\x00', '\x38',
+ '\xb4', '\xb9', '\xff', '\xed', '\xd0', '\x01', '\x0f', '\x05',
+ '\x6f', '\x4e', '\xd2', '\x02', '\x00', '\x38', '\x6f', '\xae',
+ '\x94', '\x16', '\x00', '\x38', '\xb4', '\xb9', '\x6f', '\x2e',
+ '\x02', '\x03', '\x00', '\x38', '\x04', '\x31', '\x61', '\xae',
+ '\x41', '\xb2', '\xb2', '\xb9', '\x08', '\x31', '\x60', '\xae',
+ '\x41', '\xb2', '\xb2', '\xb9', '\x61', '\xaa', '\x60', '\xba',
+ '\x6e', '\xc6', '\x14', '\xc2', '\x3f', '\xbd', '\x5e', '\x08',
+ '\x00', '\x38', '\x6a', '\xa6', '\x30', '\x20', '\x0f', '\x05',
+ '\x6f', '\xae', '\xa0', '\x16', '\x00', '\x38', '\xb4', '\xb9',
+ '\x14', '\xe1', '\x6a', '\xaa', '\x41', '\xb2', '\xb2', '\xb9',
+ '\x14', '\xe1', '\x6a', '\xaa', '\x6a', '\xb6', '\x0f', '\xbc',
+ '\x40', '\x00', '\x8f', '\xac', '\x40', '\x00', '\x3c', '\xa3',
+ '\x3c', '\xb3', '\x3f', '\xbd', '\x06', '\x09', '\x00', '\x38',
+ '\xff', '\xed', '\x6a', '\x01', '\x0f', '\x05', '\x6f', '\xae',
+ '\xbc', '\x16', '\x00', '\x38', '\xb4', '\xb9', '\xff', '\xed',
+ '\x54', '\x01', '\x0c', '\x32', '\x6f', '\xae', '\xd2', '\x16',
+ '\x00', '\x38', '\x3f', '\xbd', '\xd2', '\x02', '\x00', '\x38',
+ '\x6f', '\x0e', '\x02', '\x03', '\x00', '\x38', '\x04', '\x31',
+ '\x62', '\xae', '\x41', '\xb2', '\xb0', '\xb9', '\x08', '\x31',
+ '\x61', '\xae', '\x41', '\xb2', '\xb0', '\xb9', '\x62', '\xaa',
+ '\x61', '\xba', '\x3f', '\xbd', '\x06', '\x09', '\x00', '\x38',
+ '\xff', '\xed', '\x22', '\x01', '\x0c', '\x32', '\x6f', '\xae',
+ '\xde', '\x16', '\x00', '\x38', '\x3f', '\xbd', '\xd2', '\x02',
+ '\x00', '\x38', '\x6f', '\x0e', '\x02', '\x03', '\x00', '\x38',
+ '\x04', '\x31', '\x62', '\xae', '\x41', '\xb2', '\xb0', '\xb9',
+ '\x08', '\x31', '\x61', '\xae', '\x41', '\xb2', '\xb0', '\xb9',
+ '\x62', '\xaa', '\xe1', '\xaa', '\xda', '\x90', '\x0f', '\x05',
+ '\x7a', '\x0e', '\x08', '\x31', '\xea', '\xaa', '\xf9', '\x80',
+ '\x0f', '\x05', '\xea', '\xe0', '\x0c', '\x32', '\x6f', '\xae',
+ '\xea', '\x16', '\x00', '\x38', '\x3f', '\xbd', '\xd2', '\x02',
+ '\x00', '\x38', '\x6f', '\x0e', '\x02', '\x03', '\x00', '\x38',
+ '\x04', '\x31', '\x61', '\xae', '\x41', '\xb2', '\xb0', '\xb9',
+ '\x08', '\x31', '\x64', '\xae', '\x41', '\xb2', '\xb0', '\xb9',
+ '\x0c', '\x31', '\x62', '\xae', '\x41', '\xb2', '\xb0', '\xb9',
+ '\x6f', '\x0e', '\xa6', '\x12', '\x00', '\x38', '\x61', '\xaa',
+ '\x64', '\xba', '\x62', '\xca', '\xb0', '\xb9', '\x6a', '\xa6',
+ '\xac', '\x30', '\x10', '\x32', '\xc3', '\xa2', '\xae', '\x20',
+ '\x7a', '\x86', '\x62', '\xca', '\xef', '\xcd', '\x00', '\x00',
+ '\x01', '\x00', '\x64', '\xba', '\xb0', '\xb9', '\x9e', '\xe0',
+ '\x0f', '\x05', '\x6f', '\xde', '\x10', '\x1a', '\x00', '\x38',
+ '\x6d', '\x9a', '\x7f', '\x0d', '\xc0', '\x01', '\x00', '\xb0',
+ '\xe9', '\x9b', '\x04', '\xd1', '\x59', '\x98', '\x7f', '\x0d',
+ '\xc4', '\x01', '\x00', '\xb0', '\xe9', '\x9b', '\x6f', '\x1e',
+ '\xd2', '\x02', '\x00', '\x38', '\x6f', '\xae', '\xf2', '\x16',
+ '\x00', '\x38', '\xb1', '\xb9', '\x04', '\x31', '\x60', '\xae',
+ '\x41', '\xb2', '\x3f', '\xbd', '\x02', '\x03', '\x00', '\x38',
+ '\x6f', '\xae', '\xfa', '\x16', '\x00', '\x38', '\xb1', '\xb9',
+ '\x60', '\x9a', '\xb9', '\x09', '\x50', '\xe0', '\x08', '\x32',
+ '\x6f', '\xae', '\x6e', '\x16', '\x00', '\x38', '\x3f', '\xbd',
+ '\xd2', '\x02', '\x00', '\x38', '\x6f', '\x0e', '\x02', '\x03',
+ '\x00', '\x38', '\x04', '\x31', '\x61', '\xae', '\x41', '\xb2',
+ '\xb0', '\xb9', '\x08', '\x31', '\x62', '\xae', '\x41', '\xb2',
+ '\xb0', '\xb9', '\x61', '\x1a', '\x61', '\x9a', '\x08', '\x30',
+ '\x81', '\x92', '\xe1', '\x9b', '\x20', '\xe0', '\x62', '\x3a',
+ '\x1c', '\xe0', '\x0c', '\x32', '\x6f', '\xae', '\x00', '\x17',
+ '\x00', '\x38', '\x3f', '\xbd', '\xd2', '\x02', '\x00', '\x38',
+ '\x63', '\xaa', '\x41', '\xb2', '\x3f', '\xbd', '\x02', '\x03',
+ '\x00', '\x38', '\x0a', '\xe0', '\x0f', '\x05', '\xa3', '\x0b',
+ '\xff', '\x2d', '\x06', '\xfd', '\x0f', '\x05', '\x6f', '\xae',
+ '\xfa', '\x16', '\x00', '\x38', '\x3f', '\xbd', '\xd2', '\x02',
+ '\x00', '\x38', '\xbe', '\x4f', '\x04', '\xe2', '\x3e', '\x0d',
+ '\xfc', '\xe1', '\x7e', '\xbe', '\x8c', '\xe2', '\xfe', '\x2b',
+ '\x6a', '\x26', '\x6b', '\x06', '\x7f', '\x0d', '\x7e', '\x1a',
+ '\x00', '\x38', '\x70', '\x8a', '\x7f', '\x0d', '\x04', '\x01',
+ '\x00', '\x38', '\xea', '\xab', '\x6f', '\x9e', '\x82', '\x1a',
+ '\x00', '\x38', '\x49', '\x9a', '\xcf', '\x9e', '\x01', '\x00',
+ '\x86', '\x20', '\x0f', '\x05', '\x6f', '\xde', '\x36', '\x1a',
+ '\x00', '\x38', '\x08', '\xd1', '\xea', '\xab', '\x7f', '\x0d',
+ '\x00', '\x01', '\x00', '\x38', '\xeb', '\xbb', '\x6b', '\x96',
+ '\x04', '\x92', '\xdf', '\x9d', '\xdc', '\x05', '\xdd', '\x9b',
+ '\x6f', '\x9e', '\xa4', '\x01', '\x00', '\xb0', '\x69', '\xda',
+ '\x6f', '\xde', '\x00', '\x1a', '\x00', '\x38', '\xe9', '\xdb',
+ '\x6f', '\xde', '\xd4', '\x01', '\x00', '\xb0', '\x4d', '\x9a',
+ '\x38', '\x93', '\x44', '\x93', '\xcd', '\x9b', '\x6f', '\xde',
+ '\xd4', '\x01', '\x00', '\xb0', '\x4d', '\x9a', '\x07', '\x93',
+ '\xcf', '\x9e', '\x04', '\x00', '\xf7', '\x30', '\x0f', '\x05',
+ '\x4d', '\x9a', '\x38', '\x93', '\x41', '\x93', '\xcd', '\x9b',
+ '\x3f', '\xbd', '\xcc', '\x01', '\x00', '\x38', '\x6a', '\xa6',
+ '\xf7', '\x30', '\x0f', '\x05', '\x6f', '\xce', '\x7e', '\x1a',
+ '\x00', '\x38', '\xec', '\x0a', '\x10', '\x80', '\x0f', '\x05',
+ '\x6f', '\xde', '\xd4', '\x01', '\x00', '\xb0', '\x4d', '\x9a',
+ '\x38', '\x93', '\x41', '\x93', '\xcd', '\x9b', '\xec', '\x0a',
+ '\xd7', '\x90', '\x71', '\x86', '\x22', '\xe0', '\x62', '\x96',
+ '\x7f', '\x0d', '\x7e', '\x1a', '\x00', '\x38', '\xeb', '\xba',
+ '\x14', '\x80', '\x71', '\x86', '\x3f', '\xbd', '\xcc', '\x01',
+ '\x00', '\x38', '\x7f', '\x0d', '\x7e', '\x1a', '\x00', '\x38',
+ '\xe0', '\x0a', '\xf1', '\x90', '\x71', '\x86', '\x62', '\x96',
+ '\x20', '\x96', '\xe9', '\x26', '\x0e', '\x30', '\x62', '\xd6',
+ '\x0d', '\x1c', '\x62', '\x96', '\x20', '\x96', '\xe9', '\xd6',
+ '\xf7', '\x20', '\x0f', '\x05', '\x6f', '\xae', '\x14', '\x17',
+ '\x00', '\x38', '\x3f', '\xbd', '\xd2', '\x02', '\x00', '\x38',
+ '\x61', '\xa6', '\x41', '\xb2', '\xbe', '\x2f', '\x3e', '\xbe',
+ '\x3f', '\x0d', '\x02', '\x03', '\x00', '\x38', '\xfc', '\xe1',
+ '\x7e', '\xbe', '\x8c', '\xe2', '\xfe', '\x2b', '\x6b', '\x06',
+ '\x6c', '\x26', '\xeb', '\xa6', '\x40', '\x00', '\x6a', '\xc6',
+ '\xe0', '\xc6', '\x32', '\x00', '\x71', '\x86', '\x6c', '\xb6',
+ '\x6c', '\x96', '\x79', '\x87', '\x61', '\xd6', '\xc3', '\xd3',
+ '\xed', '\x97', '\x49', '\xd6', '\xcb', '\x9b', '\x4b', '\x9a',
+ '\xcd', '\x96', '\x0c', '\x30', '\x7d', '\x87', '\x6f', '\xae',
+ '\x2a', '\x17', '\x00', '\x38', '\x40', '\xe0', '\xe2', '\xbb',
+ '\xcb', '\xdf', '\x01', '\x12', '\xc4', '\x12', '\x06', '\x30',
+ '\xe0', '\xb6', '\xd7', '\x10', '\x6c', '\x96', '\x04', '\xc2',
+ '\xe0', '\xc6', '\xc5', '\x10', '\x0f', '\x05', '\xe0', '\xa6',
+ '\x4e', '\x00', '\x6a', '\xc6', '\xe0', '\xc6', '\x40', '\x00',
+ '\x71', '\x86', '\x6c', '\xa6', '\x61', '\x96', '\xc3', '\x93',
+ '\x6c', '\xd6', '\xe9', '\xd7', '\x4a', '\x9a', '\xcd', '\x96',
+ '\x22', '\x30', '\x01', '\x12', '\x81', '\x12', '\xe2', '\xab',
+ '\x6f', '\xae', '\x48', '\x17', '\x00', '\x38', '\x3f', '\xbd',
+ '\xd2', '\x02', '\x00', '\x38', '\x62', '\xaa', '\x41', '\xb2',
+ '\x3f', '\xbd', '\x02', '\x03', '\x00', '\x38', '\x7a', '\x86',
+ '\xbe', '\x2f', '\x3e', '\x0d', '\xc4', '\x12', '\x08', '\x30',
+ '\x01', '\xa2', '\xe0', '\xa6', '\xc9', '\x10', '\x61', '\x96',
+ '\x04', '\xc2', '\xe0', '\xc6', '\xb7', '\x10', '\x0f', '\x05',
+ '\x41', '\xa2', '\xbe', '\x2f', '\x3e', '\x0d', '\xfc', '\xe1',
+ '\x7e', '\xbe', '\x94', '\xe2', '\xfe', '\x4b', '\x6b', '\x26',
+ '\xeb', '\xa6', '\x5a', '\x90', '\x6a', '\x06', '\x60', '\xa6',
+ '\x7b', '\x86', '\x3f', '\xbd', '\x02', '\x03', '\x00', '\x38',
+ '\x6f', '\xae', '\x66', '\x17', '\x00', '\x38', '\x3f', '\xbd',
+ '\xd2', '\x02', '\x00', '\x38', '\xe2', '\x06', '\x2a', '\x90',
+ '\x74', '\x86', '\x60', '\x16', '\x60', '\x36', '\x6f', '\xae',
+ '\xbc', '\x17', '\x00', '\x38', '\x3f', '\xbd', '\xd2', '\x02',
+ '\x00', '\x38', '\x63', '\xae', '\x7b', '\x86', '\x3f', '\xbd',
+ '\x02', '\x03', '\x00', '\x38', '\x01', '\x42', '\xc4', '\x42',
+ '\x08', '\x30', '\x04', '\x12', '\xe2', '\x16', '\xdf', '\x80',
+ '\x0f', '\x05', '\x6f', '\xae', '\x24', '\x16', '\x00', '\x38',
+ '\x3f', '\xbd', '\xd2', '\x02', '\x00', '\x38', '\x10', '\x02',
+ '\xe2', '\x06', '\xad', '\x80', '\x60', '\xa6', '\xbe', '\x4f',
+ '\x3e', '\x0d', '\x00', '\x00', '\x05', '\xa1', '\x49', '\x98',
+ '\xc2', '\x92', '\x0a', '\x30', '\xc4', '\x92', '\x0e', '\x30',
+ '\x0f', '\x05', '\x7f', '\xb6', '\x7a', '\x86', '\x6a', '\xb9',
+ '\x5a', '\xa8', '\x7f', '\xb6', '\x0f', '\x05', '\x6a', '\xb9',
+ '\x6a', '\xaa', '\x7f', '\xb6', '\x0f', '\x05', '\x6a', '\xd6',
+ '\x05', '\xa1', '\x4a', '\xaa', '\x4a', '\x94', '\xc2', '\x92',
+ '\x0a', '\x30', '\xc4', '\x92', '\x10', '\x30', '\x0f', '\x05',
+ '\x7f', '\xb6', '\x7a', '\x86', '\x5c', '\xca', '\x6d', '\xb9',
+ '\xdc', '\xcb', '\x7f', '\xb6', '\x4a', '\xa4', '\x6c', '\xca',
+ '\x6d', '\xb9', '\xec', '\xcb', '\x4a', '\xa4', '\x7f', '\xb6',
+ '\x0f', '\x05', '\xfc', '\xe1', '\x7e', '\xbe', '\x84', '\xe2',
+ '\xee', '\xbb', '\x04', '\xa1', '\x49', '\x9a', '\xcf', '\x9e',
+ '\x01', '\x00', '\x06', '\x20', '\x0f', '\x05', '\x24', '\xe0',
+ '\xc1', '\xc3', '\xcf', '\x9e', '\x02', '\x00', '\x0c', '\x20',
+ '\x6b', '\x96', '\xd0', '\x93', '\x69', '\xb7', '\xee', '\xbb',
+ '\x12', '\xe0', '\xc2', '\xc3', '\x6f', '\xae', '\x92', '\x17',
+ '\x00', '\x38', '\x3f', '\xbd', '\xd2', '\x02', '\x00', '\x38',
+ '\x0c', '\xe0', '\x0f', '\x05', '\x6c', '\xb6', '\x6e', '\xc6',
+ '\x3f', '\xbd', '\x96', '\x09', '\x00', '\x38', '\x04', '\xe2',
+ '\x3e', '\x0d', '\xfc', '\xe1', '\x7e', '\xbe', '\x84', '\xe2',
+ '\xfe', '\x0b', '\x6a', '\x06', '\x4f', '\xbc', '\xaa', '\x00',
+ '\x5f', '\xcc', '\x55', '\x05', '\x3f', '\xbd', '\xc2', '\x09',
+ '\x00', '\x38', '\x60', '\xa6', '\x4f', '\xbc', '\x55', '\x00',
+ '\x5f', '\xcc', '\xaa', '\x02', '\xbe', '\x0f', '\x3e', '\xbe',
+ '\x3f', '\x0d', '\xc2', '\x09', '\x00', '\x38', '\xfc', '\xe1',
+ '\x7e', '\xbe', '\x90', '\xe2', '\xfe', '\x3b', '\x6a', '\x26',
+ '\x04', '\xa1', '\x49', '\x9a', '\xcf', '\x9e', '\x02', '\x00',
+ '\x42', '\x20', '\x6b', '\x36', '\x6f', '\x0e', '\x74', '\x09',
+ '\x00', '\x38', '\xb0', '\xb9', '\x6a', '\x16', '\x62', '\xa6',
+ '\x63', '\xb6', '\xb0', '\xb9', '\x61', '\xd6', '\xf0', '\xd3',
+ '\x1f', '\xdf', '\x40', '\x00', '\x6a', '\x96', '\xf0', '\x93',
+ '\x1f', '\x9f', '\x40', '\x00', '\xe9', '\xd6', '\x14', '\x20',
+ '\x7c', '\x86', '\x2f', '\x1f', '\x40', '\x00', '\x00', '\x00',
+ '\x2f', '\xaf', '\x40', '\x00', '\x00', '\x00', '\xea', '\x16',
+ '\x04', '\x30', '\x0f', '\x05', '\x41', '\xc2', '\x6c', '\xa6',
+ '\xbe', '\x3f', '\x3e', '\x0d', '\x6f', '\x1e', '\x74', '\x09',
+ '\x00', '\x38', '\xb1', '\xb9', '\x4a', '\x04', '\x0f', '\x0f',
+ '\x40', '\x00', '\x62', '\xa6', '\x63', '\xb6', '\xb1', '\xb9',
+ '\x2f', '\xaf', '\x40', '\x00', '\x00', '\x00', '\xea', '\x06',
+ '\x3a', '\x25', '\xbe', '\x3f', '\x3e', '\x0d', '\xfc', '\xe1',
+ '\x7e', '\xbe', '\xa8', '\xe2', '\xfe', '\x8b', '\x6a', '\x36',
+ '\x04', '\xa1', '\x44', '\x9e', '\xcf', '\x9e', '\x02', '\x00',
+ '\x04', '\x20', '\x41', '\x72', '\x42', '\x72', '\x6f', '\x2e',
+ '\xc2', '\x09', '\x00', '\x38', '\x4f', '\xbc', '\x98', '\x00',
+ '\x4f', '\xcc', '\x55', '\x00', '\xb2', '\xb9', '\x50', '\xb2',
+ '\xe7', '\xb4', '\x6f', '\x1e', '\x74', '\x09', '\x00', '\x38',
+ '\x63', '\xa6', '\xb1', '\xb9', '\xcf', '\xae', '\x51', '\x00',
+ '\xff', '\x2d', '\x9c', '\x01', '\x63', '\xa6', '\x51', '\xb2',
+ '\xe7', '\xb4', '\xb1', '\xb9', '\xcf', '\xae', '\x52', '\x00',
+ '\xff', '\x2d', '\x8c', '\x01', '\x63', '\xa6', '\x52', '\xb2',
+ '\xe7', '\xb4', '\xb1', '\xb9', '\xcf', '\xae', '\x59', '\x00',
+ '\xff', '\x2d', '\x7c', '\x01', '\x63', '\xa6', '\x24', '\xe1',
+ '\x70', '\x8a', '\x6f', '\xae', '\xac', '\x17', '\x00', '\x38',
+ '\x3f', '\xbd', '\xd2', '\x02', '\x00', '\x38', '\x63', '\xaa',
+ '\x41', '\xb2', '\x3f', '\xbd', '\x02', '\x03', '\x00', '\x38',
+ '\x4f', '\xbc', '\x27', '\x00', '\xe7', '\xb4', '\x63', '\xa6',
+ '\xb1', '\xb9', '\x41', '\x92', '\xea', '\x94', '\x06', '\x32',
+ '\xe3', '\x9b', '\x86', '\x32', '\x4f', '\xbc', '\x2c', '\x00',
+ '\xe7', '\xb4', '\x63', '\xa6', '\xb1', '\xb9', '\x6a', '\x86',
+ '\x55', '\xb2', '\xe7', '\xb4', '\x63', '\xa6', '\xb1', '\xb9',
+ '\x6a', '\x06', '\x6a', '\xb6', '\x04', '\xb2', '\xe7', '\xb4',
+ '\x63', '\xa6', '\xb1', '\xb9', '\xcf', '\xae', '\x30', '\x00',
+ '\x3e', '\x20', '\x63', '\xa6', '\x4f', '\xbc', '\xf0', '\x00',
+ '\x5f', '\xcc', '\x55', '\x05', '\xb2', '\xb9', '\x63', '\xa6',
+ '\x3f', '\xbd', '\x0a', '\x0a', '\x00', '\x38', '\x63', '\xa6',
+ '\x4f', '\xbc', '\x90', '\x00', '\x5f', '\xcc', '\x55', '\x05',
+ '\xb2', '\xb9', '\x44', '\xb8', '\x2b', '\xb6', '\x63', '\xa6',
+ '\xb1', '\xb9', '\x4a', '\x54', '\x0f', '\x5f', '\x80', '\xff',
+ '\x63', '\xa6', '\x4f', '\xbc', '\x98', '\x00', '\x4f', '\xcc',
+ '\x55', '\x00', '\xb2', '\xb9', '\x10', '\xe0', '\x0f', '\x05',
+ '\x0f', '\x02', '\xe7', '\x04', '\x60', '\xb6', '\xb1', '\xb9',
+ '\xcf', '\xae', '\x03', '\x00', '\x35', '\x35', '\x0a', '\x31',
+ '\xd8', '\x8b', '\xc8', '\x82', '\x12', '\xd0', '\x68', '\x46',
+ '\x6f', '\xae', '\xbe', '\x17', '\x00', '\x38', '\x3f', '\xbd',
+ '\xd2', '\x02', '\x00', '\x38', '\xd2', '\xe0', '\x7a', '\x86',
+ '\x65', '\x56', '\x94', '\x20', '\x81', '\x42', '\x90', '\xe0',
+ '\x74', '\x86', '\xc2', '\x03', '\x60', '\xb6', '\x2f', '\xb2',
+ '\xe7', '\xb4', '\x6f', '\x1e', '\x74', '\x09', '\x00', '\x38',
+ '\x63', '\xa6', '\xb1', '\xb9', '\x6a', '\x66', '\x60', '\xb6',
+ '\x30', '\xb2', '\xe7', '\xb4', '\x63', '\xa6', '\xb1', '\xb9',
+ '\xc8', '\xa3', '\x6a', '\x67', '\xc8', '\x63', '\x60', '\xb6',
+ '\x2d', '\xb2', '\xe7', '\xb4', '\x63', '\xa6', '\xb1', '\xb9',
+ '\x6a', '\x26', '\x2e', '\x02', '\xe7', '\x04', '\x63', '\xa6',
+ '\x60', '\xb6', '\xb1', '\xb9', '\xc8', '\xa3', '\x6a', '\x27',
+ '\x65', '\x56', '\x0a', '\x30', '\x01', '\x22', '\x68', '\x96',
+ '\xa4', '\x96', '\x04', '\xe0', '\x81', '\x92', '\x64', '\x96',
+ '\x19', '\x95', '\x63', '\xd6', '\x2d', '\x95', '\x6d', '\x96',
+ '\x24', '\xe1', '\x6d', '\xda', '\x0c', '\x91', '\xed', '\xdb',
+ '\x10', '\x91', '\xe6', '\x6b', '\x14', '\x91', '\xe2', '\x2b',
+ '\x62', '\x26', '\x10', '\xd0', '\x0f', '\x05', '\x24', '\xe1',
+ '\x29', '\x6a', '\x24', '\xe1', '\xe9', '\x9b', '\x81', '\x22',
+ '\xf5', '\x20', '\x0f', '\x05', '\x24', '\xe1', '\x6d', '\xda',
+ '\x06', '\x31', '\xed', '\xda', '\x1e', '\x30', '\x65', '\x56',
+ '\x06', '\x30', '\x01', '\x42', '\x81', '\x42', '\x81', '\x42',
+ '\x65', '\x56', '\x0c', '\x30', '\xe8', '\x46', '\x64', '\x46',
+ '\x69', '\xa0', '\x64', '\x06', '\x08', '\xe0', '\x63', '\xa6',
+ '\x61', '\xb0', '\x64', '\x06', '\x63', '\xa6', '\x4f', '\xbc',
+ '\xf0', '\x00', '\x5f', '\xcc', '\x55', '\x05', '\x3f', '\xbd',
+ '\xc2', '\x09', '\x00', '\x38', '\x12', '\xe0', '\x41', '\xa2',
+ '\x4f', '\xbc', '\xf0', '\x00', '\x5f', '\xcc', '\x55', '\x05',
+ '\x3f', '\xbd', '\xc2', '\x09', '\x00', '\x38', '\x7a', '\x86',
+ '\xbe', '\x8f', '\x04', '\xe2', '\x3e', '\x0d', '\xfc', '\xe1',
+ '\x7e', '\xbe', '\x90', '\xe2', '\xfe', '\x3b', '\x06', '\xa1',
+ '\xa0', '\x0b', '\xff', '\x2d', '\x16', '\x04', '\x6a', '\x26',
+ '\x3f', '\xbd', '\xae', '\x0a', '\x00', '\x38', '\x6a', '\xa6',
+ '\xff', '\x2d', '\x86', '\x03', '\x41', '\xa2', '\x62', '\xa6',
+ '\x3f', '\xbd', '\x0a', '\x0a', '\x00', '\x38', '\x62', '\xa6',
+ '\x4f', '\xbc', '\x90', '\x00', '\x5f', '\xcc', '\x55', '\x05',
+ '\x3f', '\xbd', '\xc2', '\x09', '\x00', '\x38', '\x6f', '\x1e',
+ '\x74', '\x09', '\x00', '\x38', '\x62', '\xa6', '\x7b', '\x86',
+ '\xb1', '\xb9', '\x6a', '\x36', '\x04', '\x21', '\x40', '\xbe',
+ '\x4b', '\xb4', '\x2b', '\xb6', '\x62', '\xa6', '\xb1', '\xb9',
+ '\x42', '\x92', '\xc0', '\x9a', '\x1c', '\x20', '\x63', '\xc6',
+ '\xf0', '\xc3', '\x53', '\x94', '\xe9', '\xc6', '\x14', '\x20',
+ '\x63', '\x06', '\x6a', '\xd6', '\xf0', '\xd3', '\x5a', '\x94',
+ '\xe9', '\xd6', '\x0a', '\x20', '\xd0', '\x03', '\x6c', '\x36',
+ '\x6d', '\xa6', '\x63', '\x06', '\xd0', '\x03', '\x6a', '\x07',
+ '\x62', '\xa6', '\x4f', '\xbc', '\xf0', '\x00', '\x5f', '\xcc',
+ '\x55', '\x05', '\x3f', '\xbd', '\xc2', '\x09', '\x00', '\x38',
+ '\xef', '\x0e', '\xc0', '\x00', '\x1f', '\x00', '\xff', '\x3d',
+ '\x48', '\x02', '\x0f', '\x05', '\x60', '\x90', '\x0f', '\x05',
+ '\xef', '\x0e', '\xc4', '\x22', '\x01', '\x00', '\xb0', '\x30',
+ '\x0f', '\x05', '\x20', '\x90', '\x0f', '\x05', '\xef', '\x0e',
+ '\x58', '\x22', '\x01', '\x00', '\xff', '\x3d', '\x5a', '\x01',
+ '\x0f', '\x05', '\xef', '\x0e', '\x5b', '\x22', '\x01', '\x00',
+ '\xff', '\x3d', '\x4e', '\x01', '\x0f', '\x05', '\xff', '\xed',
+ '\xb6', '\x02', '\x0f', '\x05', '\xef', '\x0e', '\xda', '\x22',
+ '\x01', '\x00', '\xff', '\x3d', '\x9c', '\x01', '\x0f', '\x05',
+ '\x14', '\x90', '\x0f', '\x05', '\xef', '\x0e', '\xd6', '\x22',
+ '\x01', '\x00', '\xff', '\x3d', '\x8c', '\x01', '\x0f', '\x05',
+ '\xff', '\xed', '\x94', '\x02', '\x0f', '\x05', '\xef', '\x0e',
+ '\x49', '\x22', '\x04', '\x00', '\xc4', '\x30', '\x0f', '\x05',
+ '\xff', '\xed', '\x84', '\x02', '\x0f', '\x05', '\xef', '\x0e',
+ '\xd7', '\x00', '\x20', '\x00', '\xff', '\x3d', '\x6a', '\x01',
+ '\x0f', '\x05', '\x20', '\x90', '\x0f', '\x05', '\xef', '\x0e',
+ '\xc2', '\x00', '\x1f', '\x00', '\xff', '\x3d', '\x00', '\x02',
+ '\x0f', '\x05', '\xef', '\x0e', '\xc9', '\x00', '\x1f', '\x00',
+ '\xff', '\x3d', '\x18', '\x02', '\x0f', '\x05', '\xff', '\xed',
+ '\x56', '\x02', '\x0f', '\x05', '\xef', '\x0e', '\x4f', '\x00',
+ '\x98', '\x00', '\xff', '\x3d', '\x3c', '\x01', '\x0f', '\x05',
+ '\x12', '\x90', '\x0f', '\x05', '\xef', '\x0e', '\x43', '\x00',
+ '\x98', '\x00', '\x76', '\x30', '\x0f', '\x05', '\xff', '\xed',
+ '\x36', '\x02', '\x0f', '\x05', '\xef', '\x0e', '\xc2', '\x00',
+ '\x98', '\x00', '\xff', '\x2d', '\x2a', '\x02', '\x0f', '\x05',
+ '\x6f', '\x1e', '\xa2', '\x18', '\x00', '\x38', '\x61', '\x1a',
+ '\x6f', '\xde', '\x00', '\x00', '\x20', '\x00', '\x06', '\x21',
+ '\xed', '\xdb', '\x0c', '\x21', '\x70', '\x8a', '\x6f', '\x9e',
+ '\x00', '\x00', '\x01', '\x00', '\x10', '\x21', '\xe9', '\x9b',
+ '\x5f', '\xd2', '\x14', '\x21', '\xed', '\xdb', '\x6f', '\x9e',
+ '\x00', '\x00', '\x1f', '\x00', '\x18', '\x21', '\xe9', '\x9b',
+ '\x1f', '\xdc', '\xe1', '\x7f', '\x1c', '\x21', '\xed', '\xdb',
+ '\x41', '\x92', '\x20', '\x21', '\xe9', '\x9b', '\x6f', '\xde',
+ '\x00', '\x80', '\x1f', '\x00', '\x24', '\x21', '\xed', '\xdb',
+ '\x5f', '\xdc', '\x00', '\x20', '\x28', '\x21', '\xed', '\xdb',
+ '\x42', '\xd2', '\x2c', '\x21', '\xed', '\xdb', '\x6f', '\xde',
+ '\x00', '\xc0', '\x1f', '\x00', '\xff', '\xed', '\x16', '\x01',
+ '\x0f', '\x05', '\x6f', '\x1e', '\x9e', '\x18', '\x00', '\x38',
+ '\x61', '\x1a', '\x6f', '\x9e', '\x00', '\x00', '\x20', '\x00',
+ '\x06', '\x21', '\xe9', '\x9b', '\x0c', '\x21', '\x70', '\x8a',
+ '\x5f', '\x9c', '\x00', '\x40', '\x10', '\x21', '\xe9', '\x9b',
+ '\x41', '\xd2', '\x14', '\x21', '\xed', '\xdb', '\x18', '\x21',
+ '\xe9', '\x9b', '\x5f', '\x9c', '\x00', '\x20', '\x1c', '\x21',
+ '\xe9', '\x9b', '\x42', '\x92', '\x20', '\x21', '\xe9', '\x9b',
+ '\x1f', '\x9c', '\xfe', '\x7f', '\x24', '\x21', '\xe9', '\x9b',
+ '\x28', '\x21', '\xe9', '\x9b', '\x2c', '\x21', '\xed', '\xdb',
+ '\x6f', '\x9e', '\x00', '\x00', '\x01', '\x00', '\x30', '\x21',
+ '\xe9', '\x9b', '\x34', '\x21', '\xe9', '\x9b', '\x58', '\xe0',
+ '\x5f', '\xd2', '\x6f', '\x1e', '\x96', '\x18', '\x00', '\x38',
+ '\x61', '\x1a', '\x6f', '\x9e', '\x00', '\x00', '\x10', '\x00',
+ '\x06', '\x21', '\xe9', '\x9b', '\x0c', '\x21', '\x70', '\x8a',
+ '\x5f', '\x9c', '\x00', '\x40', '\x10', '\x21', '\xe9', '\x9b',
+ '\x41', '\xd2', '\x14', '\x21', '\xed', '\xdb', '\x18', '\x21',
+ '\xe9', '\x9b', '\x5f', '\x9c', '\x00', '\x20', '\x1c', '\x21',
+ '\xe9', '\x9b', '\x42', '\x92', '\x20', '\x21', '\xe9', '\x9b',
+ '\x1f', '\x9c', '\xfe', '\x7f', '\x24', '\x21', '\xe9', '\x9b',
+ '\x28', '\x21', '\xe9', '\x9b', '\x2c', '\x21', '\xed', '\xdb',
+ '\x6f', '\x9e', '\x00', '\x00', '\x01', '\x00', '\x30', '\x21',
+ '\xe9', '\x9b', '\x34', '\x21', '\xe9', '\x9b', '\x4f', '\xd2',
+ '\x38', '\x21', '\xed', '\xdb', '\xff', '\xed', '\x3e', '\x01',
+ '\x0f', '\x05', '\x6f', '\x1e', '\x9a', '\x18', '\x00', '\x38',
+ '\x61', '\x1a', '\x6f', '\x9e', '\x00', '\x00', '\x10', '\x00',
+ '\x06', '\x21', '\xe9', '\x9b', '\x0c', '\x21', '\x70', '\x8a',
+ '\x6f', '\xde', '\x00', '\x00', '\x01', '\x00', '\x10', '\x21',
+ '\xed', '\xdb', '\x4f', '\x92', '\x14', '\x21', '\xe9', '\x9b',
+ '\x6f', '\xde', '\x00', '\x00', '\x0f', '\x00', '\x18', '\x21',
+ '\xed', '\xdb', '\x1f', '\x9c', '\xf1', '\x7f', '\x1c', '\x21',
+ '\xe9', '\x9b', '\x41', '\x92', '\x20', '\x21', '\xe9', '\x9b',
+ '\x6f', '\xde', '\x00', '\x80', '\x0f', '\x00', '\x24', '\x21',
+ '\xed', '\xdb', '\x5f', '\xdc', '\x00', '\x20', '\x28', '\x21',
+ '\xed', '\xdb', '\x42', '\xd2', '\x2c', '\x21', '\xed', '\xdb',
+ '\x6f', '\xde', '\x00', '\xc0', '\x0f', '\x00', '\x30', '\x21',
+ '\xed', '\xdb', '\x5f', '\xdc', '\x00', '\x40', '\x34', '\x21',
+ '\xed', '\xdb', '\x38', '\x21', '\xe9', '\x9b', '\xce', '\xe0',
+ '\x0f', '\x05', '\x6f', '\x1e', '\x9e', '\x18', '\x00', '\x38',
+ '\x61', '\x1a', '\x6f', '\x9e', '\x00', '\x00', '\x20', '\x00',
+ '\x06', '\x21', '\xe9', '\x9b', '\x0c', '\x21', '\x70', '\x8a',
+ '\x5f', '\xdc', '\x00', '\x20', '\x10', '\x21', '\xed', '\xdb',
+ '\x48', '\x92', '\x14', '\x21', '\xe9', '\x9b', '\x6f', '\x9e',
+ '\x00', '\x00', '\x01', '\x00', '\x18', '\x21', '\xe9', '\x9b',
+ '\x1c', '\x21', '\xe9', '\x9b', '\x62', '\xe0', '\x5f', '\xd2',
+ '\x6f', '\x1e', '\xa2', '\x18', '\x00', '\x38', '\x61', '\x1a',
+ '\x6f', '\x9e', '\x00', '\x00', '\x20', '\x00', '\x06', '\x21',
+ '\xe9', '\x9b', '\x0c', '\x21', '\x70', '\x8a', '\x6f', '\xde',
+ '\x00', '\x00', '\x01', '\x00', '\x10', '\x21', '\xed', '\xdb',
+ '\x26', '\xe0', '\x5f', '\x92', '\x6f', '\x1e', '\xa6', '\x18',
+ '\x00', '\x38', '\x61', '\x1a', '\x6f', '\x9e', '\x00', '\x00',
+ '\x40', '\x00', '\x06', '\x21', '\xe9', '\x9b', '\x0c', '\x21',
+ '\x70', '\x8a', '\x6f', '\xde', '\x00', '\x00', '\x01', '\x00',
+ '\x10', '\x21', '\xed', '\xdb', '\x4f', '\x9c', '\x3f', '\x00',
+ '\x14', '\x21', '\xe9', '\x9b', '\x6f', '\xde', '\x00', '\x00',
+ '\x1f', '\x00', '\x18', '\x21', '\xed', '\xdb', '\x5f', '\x9c',
+ '\x00', '\x20', '\x1c', '\x21', '\xe9', '\x9b', '\x48', '\xd2',
+ '\x20', '\x21', '\xed', '\xdb', '\x30', '\xe0', '\x0f', '\x05',
+ '\x04', '\x21', '\x49', '\x9a', '\x6f', '\xae', '\xda', '\x17',
+ '\x00', '\x38', '\xcf', '\x9e', '\x01', '\x00', '\x08', '\x30',
+ '\x0f', '\x05', '\x6f', '\xae', '\xec', '\x17', '\x00', '\x38',
+ '\x3f', '\xbd', '\xd2', '\x02', '\x00', '\x38', '\x62', '\xaa',
+ '\x41', '\xb2', '\x3f', '\xbd', '\x02', '\x03', '\x00', '\x38',
+ '\x7a', '\x86', '\xbe', '\x3f', '\x3e', '\x0d', '\x6f', '\x3e',
+ '\xd2', '\x02', '\x00', '\x38', '\x6f', '\xae', '\x04', '\x18',
+ '\x00', '\x38', '\xb3', '\xb9', '\x04', '\x21', '\x40', '\x9e',
+ '\xcf', '\x9e', '\x01', '\x00', '\x0c', '\x20', '\x42', '\xd2',
+ '\x6f', '\xae', '\x0c', '\x18', '\x00', '\x38', '\xb3', '\xb9',
+ '\x42', '\xd2', '\xc0', '\xda', '\x32', '\x20', '\x47', '\xc2',
+ '\x06', '\x21', '\x6d', '\x9e', '\xc1', '\x93', '\xed', '\x9b',
+ '\x62', '\xd6', '\x0c', '\xd1', '\x69', '\x9a', '\xc1', '\x93',
+ '\x0c', '\xd1', '\xe9', '\x9b', '\x10', '\xd1', '\x69', '\x9a',
+ '\xc1', '\x93', '\x10', '\xd1', '\xe9', '\x9b', '\x81', '\xc2',
+ '\xe9', '\x60', '\x0c', '\xd2', '\x6f', '\xae', '\x0e', '\x18',
+ '\x00', '\x38', '\x3f', '\xbd', '\xd2', '\x02', '\x00', '\x38',
+ '\x6f', '\x0e', '\xd2', '\x02', '\x00', '\x38', '\x6f', '\xae',
+ '\x10', '\x18', '\x00', '\x38', '\xb0', '\xb9', '\x61', '\xa6',
+ '\xb0', '\xb9', '\x6f', '\xae', '\x42', '\x17', '\x00', '\x38',
+ '\xb0', '\xb9', '\x62', '\xaa', '\x41', '\xb2', '\x3f', '\xbd',
+ '\x02', '\x03', '\x00', '\x38', '\x41', '\xa2', '\xbe', '\x3f',
+ '\x3e', '\x0d', '\xfc', '\xe1', '\x7e', '\xbe', '\x8c', '\xe2',
+ '\xfe', '\x2b', '\x6a', '\x16', '\x6b', '\x26', '\x6f', '\x0e',
+ '\x0a', '\x0a', '\x00', '\x38', '\xb0', '\xb9', '\x61', '\xa6',
+ '\x4f', '\xbc', '\x80', '\x00', '\x5f', '\xcc', '\x55', '\x05',
+ '\x3f', '\xbd', '\xc2', '\x09', '\x00', '\x38', '\x61', '\xa6',
+ '\xb0', '\xb9', '\x04', '\x11', '\x49', '\x9a', '\xcf', '\x9e',
+ '\x02', '\x00', '\x10', '\x20', '\x0f', '\x05', '\x6f', '\x9e',
+ '\x30', '\x00', '\x30', '\x00', '\x61', '\x29', '\xe9', '\x9b',
+ '\xbe', '\x2f', '\x3e', '\x0d', '\x4f', '\x9c', '\x30', '\x00',
+ '\x61', '\x29', '\xd9', '\x9b', '\xbe', '\x2f', '\x3e', '\x0d',
+ '\x84', '\xe2', '\xfe', '\x0b', '\x06', '\xa1', '\xeb', '\xba',
+ '\x10', '\x10', '\x0f', '\x05', '\x7a', '\x86', '\x7f', '\xb6',
+ '\xbe', '\x0f', '\x10', '\xa1', '\x6a', '\xaa', '\x7f', '\xb6',
+ '\xbe', '\x0f', '\x70', '\x86', '\x0c', '\xa1', '\xeb', '\xba',
+ '\x22', '\x10', '\x7d', '\x86', '\x14', '\xa1', '\xed', '\xda',
+ '\x10', '\x00', '\x79', '\x86', '\x10', '\xa1', '\x6c', '\xca',
+ '\x01', '\x92', '\x14', '\xa1', '\xe9', '\x9a', '\xf9', '\x10',
+ '\x2c', '\xd6', '\x0c', '\xa1', '\x29', '\xda', '\xe9', '\xb6',
+ '\xd1', '\x10', '\x0f', '\x05', '\x01', '\x02', '\xc7', '\x02',
+ '\xd3', '\x80', '\x0c', '\xa2', '\x7a', '\x86', '\x7f', '\xb6',
+ '\xbe', '\x0f', '\x84', '\xe2', '\xfe', '\x0b', '\x6a', '\x06',
+ '\x6b', '\xa6', '\x6d', '\xb6', '\x7d', '\x86', '\xeb', '\xd6',
+ '\x48', '\xa0', '\x0f', '\x05', '\x60', '\x9a', '\x2d', '\x96',
+ '\x49', '\xa5', '\x59', '\x9a', '\x4c', '\xd5', '\xd9', '\x9a',
+ '\x32', '\x30', '\x02', '\xd2', '\x82', '\xd2', '\x6b', '\x96',
+ '\x2a', '\x96', '\xe9', '\xa6', '\x20', '\x00', '\x6a', '\xc6',
+ '\x60', '\xc9', '\x59', '\x9a', '\xdf', '\x9e', '\xff', '\xff',
+ '\x0a', '\x30', '\x02', '\xc2', '\x82', '\xc2', '\x42', '\xa2',
+ '\x7f', '\xb6', '\xbe', '\x0f', '\x6b', '\x96', '\x2a', '\x96',
+ '\xe9', '\xc6', '\xe5', '\x10', '\x0f', '\x05', '\x41', '\xa2',
+ '\x7f', '\xb6', '\xbe', '\x0f', '\xeb', '\xd6', '\xbd', '\xb0',
+ '\x0f', '\x05', '\x7a', '\x86', '\x7f', '\xb6', '\xbe', '\x0f',
+ '\xfc', '\xe1', '\x7e', '\xbe', '\x90', '\xe2', '\xfe', '\x3b',
+ '\x73', '\x86', '\x72', '\x86', '\x6f', '\x0e', '\xaa', '\x18',
+ '\x00', '\x38', '\x41', '\x12', '\x04', '\x01', '\xc1', '\x1b',
+ '\xcf', '\x1e', '\x01', '\x00', '\x04', '\x30', '\x42', '\x92',
+ '\x44', '\x92', '\x05', '\x01', '\xc9', '\x9b', '\x60', '\xa6',
+ '\x3f', '\xbd', '\x9e', '\x0c', '\x00', '\x38', '\x6a', '\xa6',
+ '\x0c', '\x20', '\x0f', '\x05', '\xc1', '\x13', '\xcf', '\x1e',
+ '\x03', '\x00', '\xd9', '\x80', '\x0f', '\x05', '\x06', '\x01',
+ '\x23', '\x3a', '\x0f', '\x0c', '\x6c', '\x00', '\x01', '\x22',
+ '\xc1', '\x22', '\xc7', '\x80', '\x63', '\xa6', '\xbe', '\x3f',
+ '\x3e', '\x0d', '\xfc', '\xe1', '\x7e', '\xbe', '\x98', '\xe2',
+ '\xfe', '\x5b', '\x6a', '\x16', '\x6b', '\x56', '\x6c', '\x36',
+ '\x70', '\x86', '\xed', '\x06', '\x74', '\xa0', '\x6d', '\x46',
+ '\x05', '\x11', '\x49', '\x9a', '\xcf', '\x9e', '\x02', '\x00',
+ '\x12', '\x20', '\x0f', '\x05', '\x43', '\x05', '\x59', '\x9a',
+ '\xdf', '\x9e', '\xff', '\xff', '\x54', '\x30', '\x42', '\x22',
+ '\x05', '\x11', '\x49', '\x9a', '\xcf', '\x9e', '\x04', '\x00',
+ '\x0e', '\x20', '\x61', '\xa6', '\x43', '\x05', '\x69', '\x9a',
+ '\xff', '\x92', '\x3e', '\x30', '\x44', '\x22', '\x61', '\xa6',
+ '\x3f', '\xbd', '\x0a', '\x0a', '\x00', '\x38', '\x61', '\xa6',
+ '\x4f', '\xbc', '\xa0', '\x00', '\x5f', '\xcc', '\x55', '\x05',
+ '\x3f', '\xbd', '\xc2', '\x09', '\x00', '\x38', '\x65', '\xb6',
+ '\x20', '\xb6', '\x63', '\xc6', '\x20', '\xc6', '\x61', '\xa6',
+ '\x3f', '\xbd', '\x96', '\x09', '\x00', '\x38', '\x6a', '\x26',
+ '\x61', '\xa6', '\x65', '\xb6', '\x20', '\xb6', '\x3f', '\xbd',
+ '\x36', '\x0a', '\x00', '\x38', '\x6a', '\xa6', '\xf3', '\x20',
+ '\x61', '\xa6', '\x22', '\x06', '\xe4', '\x06', '\x91', '\xb0',
+ '\x0f', '\x05', '\xbe', '\x5f', '\x3e', '\x0d', '\xfc', '\xe1',
+ '\x7e', '\xbe', '\xa4', '\xe2', '\xfe', '\x8b', '\x6a', '\x16',
+ '\x6b', '\x06', '\x6c', '\x86', '\x3f', '\xbd', '\xc8', '\x11',
+ '\x00', '\x38', '\x6a', '\x96', '\x1a', '\x30', '\x41', '\xa2',
+ '\x60', '\xd6', '\x28', '\xd6', '\xe9', '\xd6', '\x14', '\x80',
+ '\x0f', '\x05', '\x6f', '\xae', '\x14', '\x18', '\x00', '\x38',
+ '\x3f', '\xbd', '\xd2', '\x02', '\x00', '\x38', '\x42', '\xa2',
+ '\xbe', '\x8f', '\x3e', '\x0d', '\x6f', '\xce', '\xb0', '\x18',
+ '\x00', '\x38', '\x6c', '\xca', '\xec', '\x06', '\x1e', '\x10',
+ '\xec', '\xd6', '\x6f', '\x9e', '\x82', '\x19', '\x00', '\x38',
+ '\x09', '\x91', '\x70', '\x8a', '\x16', '\x91', '\xe1', '\x1b',
+ '\xac', '\x06', '\x1a', '\x91', '\xe0', '\x0b', '\x1e', '\x91',
+ '\xe8', '\x8b', '\x74', '\xe0', '\x0f', '\x05', '\x5a', '\x80',
+ '\x6c', '\x96', '\x6f', '\xde', '\x82', '\x19', '\x00', '\x38',
+ '\x01', '\xd1', '\xe1', '\x1b', '\x05', '\xd1', '\xe0', '\x0b',
+ '\xa0', '\x96', '\x09', '\xd1', '\xe9', '\x9b', '\x29', '\x16',
+ '\x16', '\xd1', '\xe1', '\x1b', '\x1a', '\xd1', '\x70', '\x8a',
+ '\x68', '\xc6', '\xa9', '\xc6', '\x1e', '\xd1', '\xec', '\xcb',
+ '\x46', '\xe0', '\x0f', '\x05', '\x6f', '\xae', '\x30', '\x18',
+ '\x00', '\x38', '\x3f', '\xbd', '\xd2', '\x02', '\x00', '\x38',
+ '\x44', '\xa2', '\xbe', '\x8f', '\x3e', '\x0d', '\x6f', '\xae',
+ '\x44', '\x18', '\x00', '\x38', '\x3f', '\xbd', '\xd2', '\x02',
+ '\x00', '\x38', '\x60', '\xa6', '\x41', '\xb2', '\x3f', '\xbd',
+ '\x02', '\x03', '\x00', '\x38', '\x43', '\xa2', '\xbe', '\x8f',
+ '\x3e', '\x0d', '\x6f', '\x9e', '\x82', '\x19', '\x00', '\x38',
+ '\x01', '\x91', '\xe1', '\x1b', '\x05', '\x91', '\xe0', '\x0b',
+ '\x09', '\x91', '\xe8', '\x8b', '\x1e', '\x91', '\x70', '\x8a',
+ '\x6f', '\xce', '\x82', '\x19', '\x00', '\x38', '\x7c', '\x0a',
+ '\x0d', '\xc1', '\x70', '\x8a', '\x11', '\xc1', '\x70', '\x8a',
+ '\x15', '\xc1', '\x79', '\x0e', '\x7f', '\x0d', '\xa4', '\x19',
+ '\x00', '\x38', '\x70', '\x8a', '\x7f', '\x0d', '\xa8', '\x19',
+ '\x00', '\x38', '\x70', '\x8a', '\x0d', '\x91', '\xe8', '\x8a',
+ '\xff', '\x8d', '\xc0', '\x01', '\x75', '\x86', '\x65', '\x56',
+ '\x04', '\x20', '\x6c', '\xd6', '\x15', '\xd2', '\x65', '\x96',
+ '\x29', '\x55', '\x65', '\x36', '\x23', '\x95', '\x09', '\xd1',
+ '\x69', '\x9a', '\x24', '\x30', '\x2c', '\x36', '\x0d', '\xd1',
+ '\xe9', '\x9a', '\x1c', '\x80', '\x0f', '\x05', '\x09', '\x31',
+ '\x69', '\x9a', '\x10', '\x30', '\x0f', '\x05', '\x83', '\x0b',
+ '\x0a', '\x20', '\x0f', '\x05', '\x0d', '\x31', '\xe9', '\x9a',
+ '\x06', '\x20', '\x0f', '\x05', '\x65', '\x56', '\x35', '\x35',
+ '\x11', '\x31', '\x63', '\x3a', '\xca', '\x32', '\x4d', '\x90',
+ '\x65', '\x96', '\x29', '\x55', '\x65', '\x36', '\x23', '\x95',
+ '\x2f', '\x3e', '\x82', '\x19', '\x00', '\x38', '\x05', '\x31',
+ '\x64', '\x4a', '\x0d', '\x31', '\x69', '\x9a', '\x29', '\x46',
+ '\x01', '\x31', '\x27', '\x9a', '\x65', '\xa6', '\xc3', '\xa3',
+ '\xa5', '\xa6', '\xc2', '\xa3', '\xa5', '\xa6', '\xc2', '\xa3',
+ '\x2f', '\xae', '\xaa', '\x18', '\x00', '\x38', '\x64', '\xb6',
+ '\x3f', '\xbd', '\x18', '\x11', '\x00', '\x38', '\x83', '\x0b',
+ '\x24', '\x30', '\x6a', '\x66', '\x65', '\xa6', '\xc3', '\xa3',
+ '\xa5', '\xa6', '\xc2', '\xa3', '\xa5', '\xa6', '\xc2', '\xa3',
+ '\x2f', '\xae', '\xaa', '\x18', '\x00', '\x38', '\x64', '\xb6',
+ '\x3f', '\xbd', '\x36', '\x0a', '\x00', '\x38', '\x6a', '\xa6',
+ '\xe5', '\x20', '\x65', '\xa6', '\x73', '\x0a', '\x65', '\x26',
+ '\xc3', '\x23', '\xa5', '\x26', '\xc2', '\x23', '\xa5', '\x26',
+ '\xc2', '\x23', '\x2f', '\x2e', '\xaa', '\x18', '\x00', '\x38',
+ '\x62', '\xa6', '\x4f', '\xbc', '\xf0', '\x00', '\x5f', '\xcc',
+ '\x55', '\x05', '\x3f', '\xbd', '\xc2', '\x09', '\x00', '\x38',
+ '\x62', '\xa6', '\x64', '\xb6', '\x67', '\xc6', '\x66', '\xd6',
+ '\x3f', '\xbd', '\x6a', '\x11', '\x00', '\x38', '\x4a', '\xa6',
+ '\x28', '\x20', '\x7b', '\x86', '\x0d', '\x31', '\x69', '\xde',
+ '\x26', '\xd6', '\xe9', '\xdb', '\x11', '\x31', '\x70', '\x8a',
+ '\x62', '\xaa', '\x24', '\xa6', '\x3f', '\xbd', '\x02', '\x03',
+ '\x00', '\x38', '\x6f', '\xae', '\x4e', '\x18', '\x00', '\x38',
+ '\x3f', '\xbd', '\xd2', '\x02', '\x00', '\x38', '\xaa', '\xe0',
+ '\x0f', '\x05', '\xcf', '\xae', '\x01', '\x00', '\x4c', '\x30',
+ '\x0f', '\x05', '\xcf', '\xae', '\x02', '\x00', '\x46', '\x20',
+ '\x65', '\xa6', '\x62', '\xaa', '\x24', '\xa6', '\x6f', '\x1e',
+ '\x02', '\x03', '\x00', '\x38', '\x7b', '\x86', '\xb1', '\xb9',
+ '\x6f', '\x0e', '\xd2', '\x02', '\x00', '\x38', '\x6f', '\xae',
+ '\x62', '\x18', '\x00', '\x38', '\xb0', '\xb9', '\x66', '\xa6',
+ '\x7b', '\x86', '\xb1', '\xb9', '\x6f', '\xae', '\x6e', '\x18',
+ '\x00', '\x38', '\xb0', '\xb9', '\x62', '\xa6', '\x64', '\xb6',
+ '\x3f', '\xbd', '\xca', '\x10', '\x00', '\x38', '\x41', '\x92',
+ '\xc3', '\x9b', '\x11', '\x31', '\x6d', '\x9e', '\x01', '\x92',
+ '\x58', '\xe0', '\xed', '\x9b', '\x65', '\xa6', '\xc3', '\xa3',
+ '\xa5', '\xa6', '\xc2', '\xa3', '\xa5', '\xa6', '\xc2', '\xa3',
+ '\x6f', '\xad', '\xaa', '\x18', '\x00', '\x38', '\x62', '\xae',
+ '\x24', '\xa6', '\x6f', '\x1e', '\x02', '\x03', '\x00', '\x38',
+ '\x7b', '\x86', '\xb1', '\xb9', '\x6f', '\x0e', '\xd2', '\x02',
+ '\x00', '\x38', '\x6f', '\xae', '\x76', '\x18', '\x00', '\x38',
+ '\xb0', '\xb9', '\x66', '\xa6', '\x7b', '\x86', '\xb1', '\xb9',
+ '\x6f', '\xae', '\x6e', '\x18', '\x00', '\x38', '\xb0', '\xb9',
+ '\x62', '\xa6', '\x64', '\xb6', '\x67', '\xc6', '\x66', '\xd6',
+ '\x3f', '\xbd', '\x1a', '\x12', '\x00', '\x38', '\x0d', '\x31',
+ '\x6d', '\x9e', '\x26', '\x96', '\xed', '\x9b', '\x11', '\x31',
+ '\x70', '\x8a', '\x6f', '\xce', '\x82', '\x19', '\x00', '\x38',
+ '\x0d', '\xc1', '\x69', '\x9a', '\x7f', '\x0d', '\xa4', '\x19',
+ '\x00', '\x38', '\x29', '\x9a', '\xe8', '\x96', '\xff', '\x1d',
+ '\x44', '\xfe', '\x0f', '\x05', '\x75', '\x86', '\x6f', '\x2e',
+ '\xaa', '\x18', '\x00', '\x38', '\x6f', '\x1e', '\x82', '\x19',
+ '\x00', '\x38', '\x09', '\x11', '\xa0', '\x0b', '\x4c', '\x30',
+ '\x7b', '\x86', '\x62', '\xaa', '\x3f', '\xbd', '\x02', '\x03',
+ '\x00', '\x38', '\x6f', '\xae', '\x82', '\x18', '\x00', '\x38',
+ '\x3f', '\xbd', '\xd2', '\x02', '\x00', '\x38', '\x70', '\x86',
+ '\x09', '\x11', '\xe0', '\x0a', '\x22', '\x00', '\x0f', '\x05',
+ '\x05', '\x11', '\x29', '\x0a', '\x01', '\x11', '\x6d', '\xda',
+ '\x62', '\x99', '\x59', '\x9a', '\x4d', '\x05', '\xd9', '\x9a',
+ '\xff', '\x2d', '\x9a', '\xfd', '\x0f', '\x05', '\x02', '\x02',
+ '\x09', '\x11', '\xe0', '\x0a', '\xe3', '\x10', '\x0f', '\x05',
+ '\x6f', '\xae', '\x92', '\x18', '\x00', '\x38', '\x3f', '\xbd',
+ '\xd2', '\x02', '\x00', '\x38', '\x0f', '\x2c', '\x6c', '\x00',
+ '\x01', '\x52', '\xc1', '\x52', '\xa5', '\x80', '\x15', '\x12',
+ '\x7a', '\x86', '\xbe', '\x8f', '\x3e', '\x0d', '\x00', '\x00',
+ '\x7f', '\xb6', '\x0f', '\x05', '\x00', '\x00', '\x00', '\x00',
+ '\x0d', '\x0a', '\x0d', '\x0a', '\x44', '\x65', '\x76', '\x69',
+ '\x63', '\x65', '\x20', '\x49', '\x44', '\x20', '\x3d', '\x20',
+ '\x00', '\x00', '\x43', '\x68', '\x65', '\x63', '\x6b', '\x73',
+ '\x75', '\x6d', '\x20', '\x6f', '\x66', '\x20', '\x62', '\x6f',
+ '\x6f', '\x74', '\x6c', '\x6f', '\x61', '\x64', '\x65', '\x72',
+ '\x20', '\x69', '\x73', '\x20', '\x00', '\x00', '\x57', '\x61',
+ '\x69', '\x74', '\x69', '\x6e', '\x67', '\x20', '\x66', '\x6f',
+ '\x72', '\x20', '\x6c', '\x6f', '\x61', '\x64', '\x20', '\x69',
+ '\x6e', '\x66', '\x6f', '\x2e', '\x0d', '\x0a', '\x00', '\x00',
+ '\x47', '\x6f', '\x74', '\x20', '\x6c', '\x6f', '\x61', '\x64',
+ '\x20', '\x69', '\x6e', '\x66', '\x6f', '\x2e', '\x0d', '\x0a',
+ '\x00', '\x00', '\x50', '\x41', '\x43', '\x4b', '\x45', '\x54',
+ '\x5f', '\x49', '\x4e', '\x46', '\x4f', '\x0d', '\x0a', '\x00',
+ '\x53', '\x45', '\x54', '\x5f', '\x52', '\x45', '\x47', '\x49',
+ '\x53', '\x54', '\x45', '\x52', '\x0d', '\x0a', '\x00', '\x00',
+ '\x47', '\x45', '\x54', '\x5f', '\x52', '\x45', '\x47', '\x49',
+ '\x53', '\x54', '\x45', '\x52', '\x0d', '\x0a', '\x00', '\x00',
+ '\x50', '\x41', '\x55', '\x53', '\x45', '\x5f', '\x4c', '\x4f',
+ '\x4f', '\x50', '\x0d', '\x0a', '\x00', '\x00', '\x4d', '\x45',
+ '\x4d', '\x5f', '\x56', '\x45', '\x52', '\x49', '\x46', '\x59',
+ '\x0d', '\x0a', '\x00', '\x00', '\x76', '\x65', '\x72', '\x69',
+ '\x66', '\x79', '\x20', '\x66', '\x61', '\x69', '\x6c', '\x65',
+ '\x64', '\x0d', '\x0a', '\x00', '\x4d', '\x45', '\x4d', '\x5f',
+ '\x54', '\x45', '\x53', '\x54', '\x0d', '\x0a', '\x00', '\x00',
+ '\x23', '\x23', '\x23', '\x20', '\x4d', '\x65', '\x6d', '\x6f',
+ '\x72', '\x79', '\x20', '\x74', '\x65', '\x73', '\x74', '\x20',
+ '\x66', '\x61', '\x69', '\x6c', '\x65', '\x64', '\x20', '\x61',
+ '\x74', '\x20', '\x00', '\x00', '\x50', '\x61', '\x73', '\x73',
+ '\x65', '\x64', '\x20', '\x6d', '\x65', '\x6d', '\x6f', '\x72',
+ '\x79', '\x20', '\x74', '\x65', '\x73', '\x74', '\x2e', '\x0d',
+ '\x0a', '\x00', '\x4d', '\x45', '\x4d', '\x5f', '\x44', '\x55',
+ '\x4d', '\x50', '\x0d', '\x0a', '\x00', '\x00', '\x4d', '\x45',
+ '\x4d', '\x5f', '\x43', '\x4c', '\x45', '\x41', '\x52', '\x0d',
+ '\x0a', '\x00', '\x46', '\x4c', '\x41', '\x53', '\x48', '\x0d',
+ '\x0a', '\x00', '\x4a', '\x55', '\x4d', '\x50', '\x0d', '\x0a',
+ '\x00', '\x00', '\x45', '\x4e', '\x44', '\x0d', '\x0a', '\x00',
+ '\x23', '\x23', '\x23', '\x20', '\x55', '\x6e', '\x6b', '\x6e',
+ '\x6f', '\x77', '\x6e', '\x20', '\x74', '\x79', '\x70', '\x65',
+ '\x3a', '\x20', '\x00', '\x00', '\x43', '\x68', '\x65', '\x63',
+ '\x6b', '\x73', '\x75', '\x6d', '\x20', '\x6f', '\x66', '\x20',
+ '\x66', '\x69', '\x6c', '\x65', '\x20', '\x69', '\x73', '\x20',
+ '\x00', '\x00', '\x23', '\x23', '\x23', '\x20', '\x4d', '\x65',
+ '\x6d', '\x6f', '\x72', '\x79', '\x20', '\x74', '\x65', '\x73',
+ '\x74', '\x20', '\x31', '\x20', '\x66', '\x61', '\x69', '\x6c',
+ '\x65', '\x64', '\x20', '\x61', '\x74', '\x20', '\x00', '\x00',
+ '\x23', '\x23', '\x23', '\x20', '\x4d', '\x65', '\x6d', '\x6f',
+ '\x72', '\x79', '\x20', '\x74', '\x65', '\x73', '\x74', '\x20',
+ '\x32', '\x20', '\x66', '\x61', '\x69', '\x6c', '\x65', '\x64',
+ '\x20', '\x61', '\x74', '\x20', '\x00', '\x00', '\x20', '\x3a',
+ '\x00', '\x00', '\x38', '\x4d', '\x62', '\x20', '\x42', '\x42',
+ '\x00', '\x00', '\x38', '\x4d', '\x62', '\x20', '\x54', '\x42',
+ '\x00', '\x00', '\x31', '\x36', '\x4d', '\x62', '\x20', '\x42',
+ '\x42', '\x00', '\x31', '\x36', '\x4d', '\x62', '\x20', '\x54',
+ '\x42', '\x00', '\x33', '\x32', '\x4d', '\x62', '\x20', '\x54',
+ '\x42', '\x00', '\x55', '\x6e', '\x73', '\x75', '\x70', '\x70',
+ '\x6f', '\x72', '\x74', '\x65', '\x64', '\x20', '\x69', '\x6e',
+ '\x74', '\x65', '\x72', '\x6c', '\x65', '\x61', '\x76', '\x65',
+ '\x21', '\x0a', '\x00', '\x00', '\x46', '\x6f', '\x75', '\x6e',
+ '\x64', '\x20', '\x31', '\x20', '\x78', '\x20', '\x43', '\x46',
+ '\x49', '\x20', '\x61', '\x74', '\x20', '\x00', '\x54', '\x6f',
+ '\x6f', '\x20', '\x6d', '\x61', '\x6e', '\x79', '\x20', '\x72',
+ '\x65', '\x67', '\x69', '\x6f', '\x6e', '\x73', '\x20', '\x6f',
+ '\x6e', '\x20', '\x63', '\x68', '\x69', '\x70', '\x21', '\x0a',
+ '\x00', '\x00', '\x4e', '\x6f', '\x20', '\x73', '\x69', '\x6e',
+ '\x67', '\x6c', '\x65', '\x20', '\x78', '\x31', '\x36', '\x20',
+ '\x61', '\x74', '\x20', '\x00', '\x4e', '\x6f', '\x20', '\x69',
+ '\x6e', '\x74', '\x65', '\x72', '\x6c', '\x65', '\x61', '\x76',
+ '\x65', '\x64', '\x20', '\x78', '\x31', '\x36', '\x20', '\x61',
+ '\x74', '\x20', '\x00', '\x00', '\x46', '\x6f', '\x75', '\x6e',
+ '\x64', '\x20', '\x00', '\x00', '\x31', '\x00', '\x32', '\x00',
+ '\x20', '\x78', '\x20', '\x00', '\x46', '\x61', '\x74', '\x61',
+ '\x6c', '\x3a', '\x20', '\x66', '\x6c', '\x61', '\x73', '\x68',
+ '\x20', '\x69', '\x73', '\x20', '\x74', '\x6f', '\x6f', '\x20',
+ '\x73', '\x6d', '\x61', '\x6c', '\x6c', '\x2e', '\x0a', '\x00',
+ '\x53', '\x65', '\x63', '\x74', '\x6f', '\x72', '\x20', '\x65',
+ '\x72', '\x61', '\x73', '\x65', '\x20', '\x65', '\x72', '\x72',
+ '\x6f', '\x72', '\x0a', '\x00', '\x45', '\x72', '\x72', '\x6f',
+ '\x72', '\x20', '\x61', '\x74', '\x20', '\x00', '\x3a', '\x20',
+ '\x4e', '\x6f', '\x20', '\x6e', '\x65', '\x65', '\x64', '\x20',
+ '\x74', '\x6f', '\x20', '\x77', '\x72', '\x69', '\x74', '\x65',
+ '\x0a', '\x00', '\x3a', '\x20', '\x45', '\x72', '\x61', '\x73',
+ '\x69', '\x6e', '\x67', '\x20', '\x00', '\x00', '\x20', '\x62',
+ '\x79', '\x74', '\x65', '\x73', '\x0a', '\x00', '\x3a', '\x20',
+ '\x57', '\x72', '\x69', '\x74', '\x69', '\x6e', '\x67', '\x20',
+ '\x00', '\x00', '\x3a', '\x20', '\x56', '\x65', '\x72', '\x69',
+ '\x66', '\x79', '\x69', '\x6e', '\x67', '\x2e', '\x2e', '\x2e',
+ '\x00', '\x00', '\x4f', '\x4b', '\x0a', '\x00', '\x6a', '\x17',
+ '\x00', '\x38', '\x72', '\x17', '\x00', '\x38', '\x7a', '\x17',
+ '\x00', '\x38', '\x82', '\x17', '\x00', '\x38', '\x8a', '\x17',
+ '\x00', '\x38', '\x00', '\x00', '\x00', '\x80', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x84', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00', '\x00',
+ '\x00', '\x00', '\x00', '\x00', '\x54', '\x68', '\x69', '\x73',
+ '\x20', '\x62', '\x6f', '\x6f', '\x74', '\x6c', '\x6f', '\x61',
+ '\x64', '\x65', '\x72', '\x20', '\x77', '\x61', '\x73', '\x20',
+ '\x62', '\x75', '\x69', '\x6c', '\x74', '\x20', '\x62', '\x79',
+ '\x20', '\x72', '\x6f', '\x6f', '\x74', '\x20', '\x6f', '\x6e',
+ '\x20', '\x57', '\x65', '\x64', '\x20', '\x4d', '\x61', '\x79',
+ '\x20', '\x31', '\x36', '\x20', '\x32', '\x31', '\x3a', '\x33',
+ '\x31', '\x3a', '\x34', '\x36', '\x20', '\x43', '\x45', '\x53',
+ '\x54', '\x20', '\x32', '\x30', '\x30', '\x37', '\x2e', '\x0d',
+ '\x0a', '\x00'
+};
--- /dev/null
+/*!***************************************************************************
+*!
+*! FILE NAME : serial.c
+*!
+*! DESCRIPTION: Serial boot stuff for e100boot.
+*!
+*! ---------------------------------------------------------------------------
+*! HISTORY
+*!
+*! DATE NAME CHANGES
+*! ---- ---- -------
+*! 1996 Ronny Raneup Initial version
+*! 2002 05 02 Ronny Ranerup Moved it into this file
+*! ---------------------------------------------------------------------------
+*! (C) Copyright 1999-2003 Axis Communications AB, LUND, SWEDEN
+*!***************************************************************************/
+
+/************************** Include files ********************************/
+
+#include <conf.h>
+#include <e100boot.h>
+#include <serial.h>
+#include <common.h>
+
+/************************** Type definitions *****************************/
+
+/************************** Global variables *****************************/
+
+FILE *serialFd;
+int set_baudrate = 9600; /* Baudrate for serial boot (after bootloader). */
+
+/************************** Constants and macros *************************/
+
+/************************** Function prototypes **************************/
+
+int SetControlMode(FILE *fd, int value, int onoff);
+int SetInputMode(FILE *fd, int value, int onoff);
+int SetLocalMode(FILE *fd, int value, int onoff);
+int SetOutputMode(FILE *fd, int value, int onoff);
+int WaitForRead(int s, int usecs);
+int WaitForWrite(int s, int usecs);
+void setBaudRate(unsigned int b);
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: SerBoot
+*#
+*# DESCRIPTION: The main serial boot routine.
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 2000 01 07 ronny Initial version
+*#
+*#***************************************************************************/
+
+void
+SerBoot(void)
+{
+ int seq = 0;
+ struct packet_buf *p;
+ int got_new_ack = 0;
+ int connected = 0;
+ char rec_buf;
+
+ while ((p = create_packet(seq))) {
+ int offset = 0;
+ int tr_len = 0;
+ static char fName[MAX_STRING_LEN] = {0,};
+
+ if (strcmp(fName, p->boot_file->fileName) != 0) {
+ while (connected && got_new_ack == 0) {
+ WaitForRead(fileno(serialFd), 1000000); /* Did we get data? */
+
+ if(fread(&rec_buf, 1, 1, serialFd) > 0) {
+ fwrite(&rec_buf, 1, 1, stderr);
+ if (rec_buf == '+') {
+ printf("# Got ack.\n");
+ got_new_ack = 1;
+ }
+ }
+ }
+
+ strcpy(fName, p->boot_file->fileName);
+ printf("# transmitting file '%s'\n", fName);
+ got_new_ack = 0;
+ }
+
+ printf("# transmitting %d bytes at baudrate %d.\n", (int)p->size, p->baud_rate);
+
+ // setBaudRate(p->baud_rate);
+
+ while (tr_len != p->size) {
+
+ if (WaitForRead(fileno(serialFd), 0)) { /* Did we get data? */
+ // static int connected = 0;
+ char rec_buf = 0;
+ int rec_len = 0;
+
+ if((rec_len = fread(&rec_buf, 1, 1, serialFd)) > 0) {
+ if (rec_buf == '+') {
+ if (!connected++) {
+ printf("# Got ack.\n");
+ }
+ else {
+ got_new_ack = 1;
+ printf("# Got ack.\n");
+ }
+ fwrite(&rec_buf, rec_len, 1, stderr);
+ }
+ }
+ }
+
+ if (tr_len < p->size) { /* send one byte */
+ while (!(WaitForWrite(fileno(serialFd), 1000000))) { }
+ fwrite(&p->data[offset+tr_len], 1, 1, serialFd);
+ tr_len++;
+ }
+ }
+
+ seq++; /* We have transmitted entire packet. */
+ }
+
+ printf("# Transmission done. Just listening now.\n");
+
+ while(1) {
+ if (WaitForRead(fileno(serialFd), 10000000)) { /* Did we get data? */
+ char rec_buf;
+ int rec_len = 0;
+
+ if((rec_len = fread(&rec_buf, 1, 1, serialFd)) > 0) {
+ fwrite(&rec_buf, rec_len, 1, stderr);
+ }
+ }
+ }
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: SetupSerial
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 970325 ronny Initial version
+*#
+*#***************************************************************************/
+
+int
+SetupSerial(void)
+{
+ int baudRates[] = {0, 50, 75, 110, 134, 150, 200, 300, 600,
+ 1200, 1800, 2400, 4800, 9600, 19200, 38400, 57600, 115200};
+ struct termios ti;
+ int baudrate;
+
+ if ((serialFd = fopen(device, "r+")) == NULL) {
+ perror("Can't open modem");
+ return FALSE;
+ }
+
+ /* Important. Remember this!!!!!!! */
+ /* setvbuf(serialFd, NULL, _IONBF, 0); */
+
+ setvbuf(serialFd, NULL, _IONBF, 0);
+ setvbuf(stdout, NULL, _IONBF, 0);
+
+ if (fcntl(fileno(serialFd), F_SETFL, O_NONBLOCK) == -1) {
+ perror("fcntl");
+ return FALSE;
+ }
+
+ tcflush(fileno(serialFd), TCIOFLUSH);
+
+ if (tcgetattr(fileno(serialFd), &ti)) {
+ perror("tcgetattr");
+ return FALSE;
+ }
+
+ ti.c_cc[VMIN] = 1;
+ ti.c_cc[VTIME] = 0;
+ ti.c_cc[VSTART] = 0x11;
+ ti.c_cc[VSTOP] = 0x13;
+
+ if (tcsetattr(fileno(serialFd), TCSANOW, &ti)) {
+ perror("tcsetattr");
+ return FALSE;
+ }
+
+ //if (db3) printf("outspeed: %d, inspeed: %d\n", baudRates[cfgetospeed(&ti)], baudRates[cfgetispeed(&ti)]);
+ {
+ int new_baudrate = 0;
+
+ if (set_baudrate <= 50) {
+ baudrate = B50;
+ new_baudrate = 50;
+ }
+ else if (set_baudrate <= 75) {
+ baudrate = B75;
+ new_baudrate = 75;
+ }
+ else if (set_baudrate <= 110) {
+ baudrate = B110;
+ new_baudrate = 110;
+ }
+ else if (set_baudrate <= 134) {
+ baudrate = B134;
+ new_baudrate = 134;
+ }
+ else if (set_baudrate <= 150) {
+ baudrate = B150;
+ new_baudrate = 150;
+ }
+ else if (set_baudrate <= 200) {
+ baudrate = B200;
+ new_baudrate = 200;
+ }
+ else if (set_baudrate <= 300) {
+ baudrate = B300;
+ new_baudrate = 300;
+ }
+ else if (set_baudrate <= 600) {
+ baudrate = B600;
+ new_baudrate = 600;
+ }
+ else if (set_baudrate <= 1200) {
+ baudrate = B1200;
+ new_baudrate = 1200;
+ }
+ else if (set_baudrate <= 1800) {
+ baudrate = B1800;
+ new_baudrate = 1800;
+ }
+ else if (set_baudrate <= 2400) {
+ baudrate = B2400;
+ new_baudrate = 2400;
+ }
+ else if (set_baudrate <= 4800) {
+ baudrate = B4800;
+ new_baudrate = 4800;
+ }
+ else if (set_baudrate <= 9600) {
+ baudrate = B9600;
+ new_baudrate = 9600;
+ }
+ else if (set_baudrate <= 19200) {
+ baudrate = B19200;
+ new_baudrate = 19200;
+ }
+ else if (set_baudrate <= 38400)
+ baudrate = B38400;
+#if defined(B57600) /* POSIX only defines <= 38400 */
+ else if (set_baudrate <= 57600) {
+ baudrate = B57600;
+ new_baudrate = 57600;
+ }
+#endif
+#if defined(B115200)
+ else if (set_baudrate <= 115200) {
+ baudrate = B115200;
+ new_baudrate = 115200;
+ }
+#endif
+#if defined(B230400)
+ else if (set_baudrate <= 230400) {
+ baudrate = B230400;
+ new_baudrate = 230400;
+ }
+#endif
+ else {
+ baudrate = B38400;
+ }
+
+ cfsetispeed(&ti, B9600);
+ cfsetospeed(&ti, baudrate);
+ tcsetattr(fileno(serialFd), TCSANOW, &ti);
+
+ // printf("* baudrate set to %d\n", new_baudrate);
+ set_baudrate = new_baudrate;
+
+ if (db3) printf("outspeed: %d, inspeed: %d\n", baudRates[cfgetospeed(&ti)], baudRates[cfgetispeed(&ti)]);
+ }
+
+ cfmakeraw(&ti);
+
+ SetInputMode(serialFd, IXON, FALSE);
+ SetInputMode(serialFd, IXOFF, FALSE);
+ SetInputMode(serialFd, IXANY, FALSE);
+ SetInputMode(serialFd, ICRNL, FALSE);
+ SetInputMode(serialFd, IGNPAR, TRUE);
+ SetInputMode(serialFd, IGNBRK, TRUE);
+ SetInputMode(serialFd, IGNPAR, TRUE);
+ SetInputMode(serialFd, INPCK, FALSE);
+
+ SetOutputMode(serialFd, OPOST, FALSE);
+ SetOutputMode(serialFd, ONLCR, FALSE);
+#ifdef OXTABS
+ SetOutputMode(serialFd, OXTABS, FALSE);
+#endif
+
+#ifdef ENOEOT
+ SetOutputMode(serialFd, ENOEOT, FALSE);
+#endif
+
+ SetLocalMode(serialFd, ECHO, FALSE);
+ SetLocalMode(serialFd, ISIG, FALSE);
+
+ SetLocalMode(serialFd, ICANON, FALSE);
+
+ SetControlMode(serialFd, PARENB, FALSE);
+ SetControlMode(serialFd, CLOCAL, TRUE);
+ SetControlMode(serialFd, CREAD, TRUE);
+
+ /* Disable hardware flow control. */
+#if defined(CRTSCTS)
+
+ SetControlMode(serialFd, CRTSCTS, FALSE);
+#if defined(CRTSXOFF)
+ SetControlMode(serialFd, CRTSXOFF, FALSE);
+#endif
+
+#elif defined(CCTS_OFLOW)
+
+ SetControlMode(serialFd, CCTS_OFLOW, FALSE);
+ SetControlMode(serialFd, CRTS_IFLOW, FALSE);
+
+#elif defined(CNEW_RTSCTS)
+
+ SetControlMode(serialFd, CNEW_RTSCTS, FALSE);
+
+#else
+ printf("Cannot set hardware flow control. Set it manually with a terminal program.\n");
+#endif
+
+ return TRUE;
+}
+
+void
+setBaudRate(unsigned int b)
+{
+ int baudRates[] = {0, 50, 75, 110, 134, 150, 200, 300, 600,
+ 1200, 1800, 2400, 4800, 9600, 19200, 38400, 57600, 115200};
+ struct termios ti;
+
+ if (tcgetattr(fileno(serialFd), &ti)) {
+ perror("tcgetattr");
+ exit(EXIT_FAILURE);
+ }
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: SetInputMode
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 970325 ronny Initial version
+*#
+*#***************************************************************************/
+
+int
+SetInputMode(FILE *fd, int value, int onoff)
+{
+ struct termios settings;
+ int result;
+
+ result = tcgetattr(fileno(fd), &settings);
+ if (result < 0)
+ {
+ perror("error in tcgetattr");
+ return FALSE;
+ }
+
+ if (onoff)
+ settings.c_iflag |= value;
+ else
+ settings.c_iflag &= ~value;
+
+ result = tcsetattr(fileno(fd), TCSANOW, &settings);
+ if (result < 0)
+ {
+ perror("error in tcgetattr");
+ return FALSE;
+ }
+
+ return 1;
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: SetOutputMode
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 2001 May 16 ronny Initial version
+*#
+*#***************************************************************************/
+
+int
+SetOutputMode(FILE *fd, int value, int onoff)
+{
+ struct termios settings;
+ int result;
+
+ result = tcgetattr(fileno(fd), &settings);
+ if (result < 0)
+ {
+ perror("error in tcgetattr");
+ return FALSE;
+ }
+
+ if (onoff)
+ settings.c_oflag |= value;
+ else
+ settings.c_oflag &= ~value;
+
+ result = tcsetattr(fileno(fd), TCSANOW, &settings);
+ if (result < 0)
+ {
+ perror("error in tcgetattr");
+ return FALSE;
+ }
+
+ return 1;
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: SetControlMode
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 970325 ronny Initial version
+*#
+*#***************************************************************************/
+
+int
+SetControlMode(FILE *fd, int value, int onoff)
+{
+#if !defined(_WIN32)
+ struct termios settings;
+ int result;
+
+ result = tcgetattr(fileno(fd), &settings);
+ if (result < 0)
+ {
+ perror("error in tcgetattr");
+ return FALSE;
+ }
+
+ if (onoff)
+ settings.c_cflag |= value;
+ else
+ settings.c_cflag &= ~value;
+
+ result = tcsetattr(fileno(fd), TCSANOW, &settings);
+ if (result < 0)
+ {
+ perror("error in tcgetattr");
+ return FALSE;
+ }
+#endif
+
+ return TRUE;
+}
+/****************************************************************************
+*#
+*# FUNCTION NAME: SetLocalMode
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 970325 ronny Initial version
+*#
+*#***************************************************************************/
+
+int
+SetLocalMode(FILE *fd, int value, int onoff)
+{
+#if !defined(_WIN32)
+ struct termios settings;
+ int result;
+
+ result = tcgetattr(fileno(fd), &settings);
+ if (result < 0)
+ {
+ perror("error in tcgetattr");
+ return FALSE;
+ }
+
+ if (onoff)
+ settings.c_lflag |= value;
+ else
+ settings.c_lflag &= ~value;
+
+ result = tcsetattr(fileno(fd), TCSANOW, &settings);
+ if (result < 0)
+ {
+ perror("error in tcgetattr");
+ return FALSE;
+ }
+#endif
+
+ return TRUE;
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: WaitForRead
+*#
+*# PARAMETERS: Timeout in usecs.
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 961001 ronny Initial version
+*# 971204 ronny usecs was a only one tenth of what it should be.
+*#
+*#***************************************************************************/
+
+int
+WaitForRead(int s, int usecs)
+{
+ fd_set mask;
+ int ret;
+ struct timeval tm;
+
+ tm.tv_sec = usecs/1000000;
+ tm.tv_usec = usecs%1000000;
+
+ FD_ZERO(&mask);
+ FD_SET(s, &mask);
+
+ if ((ret = select(FD_SETSIZE, &mask, NULL, NULL, &tm)) == -1) {
+ printf("<<< select failed with return: %d.\n", ret);
+ return FALSE;
+ }
+ else {
+ if (db3) printf("* select returned OK:%d\n", ret);
+ }
+
+ if (FD_ISSET(s, &mask) == 0) {
+ if (db2) printf("<<< WaitForRead. No data to read.\n");
+ return FALSE;
+ }
+
+ if (db3) printf("<<< WaitForRead OK. Returned:%d.\n", ret);
+
+ return TRUE;
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: WaitForWrite
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 2000-11-20 ronny Initial version
+*#
+*#***************************************************************************/
+
+int
+WaitForWrite(int s, int usecs)
+{
+ fd_set mask;
+ int ret;
+ struct timeval tm;
+
+ tm.tv_sec = usecs/1000000;
+ tm.tv_usec = usecs%1000000;
+
+ FD_ZERO(&mask);
+ FD_SET(s, &mask);
+
+ if ((ret = select(FD_SETSIZE, NULL, &mask, NULL, &tm)) == -1) {
+ printf("<<< select failed with return: %d.\n", ret);
+ return FALSE;
+ }
+ else {
+ if (db3) printf("* select returned OK:%d\n", ret);
+ }
+
+ if (FD_ISSET(s, &mask) == 0) {
+ if (db2) printf("<<< WaitForWrite. No data to read.\n");
+ return FALSE;
+ }
+
+ if (db3) printf("<<< WaitForWrite OK. Returned:%d.\n", ret);
+
+ return TRUE;
+}
--- /dev/null
+/*!***************************************************************************
+*!
+*! FILE NAME : serial.h
+*!
+*! DESCRIPTION: Serial boot stuff for e100boot.
+*!
+*! ---------------------------------------------------------------------------
+*! HISTORY
+*!
+*! DATE NAME CHANGES
+*! ---- ---- -------
+*! 1996 Ronny Raneup Initial version
+*! 2002 05 02 Ronny Ranerup Moved it into this file
+*! ---------------------------------------------------------------------------
+*! (C) Copyright 1999, 2000, 2001, 2002 Axis Communications AB, LUND, SWEDEN
+*!***************************************************************************/
+/************************** Include files ********************************/
+/************************** Type definitions *****************************/
+/************************** Global variables *****************************/
+
+extern int set_baudrate; /* Baudrate for serial boot (after bootloader). */
+
+/************************** Constants and macros *************************/
+/************************** Function prototypes **************************/
+int SetupSerial (void);
+void SerBoot (void);
--- /dev/null
+%.o : %.c
+ gcc -mno-cygwin -c -g -Wall -I ../ -I ../../cbl/src/ -I ../../wpdpack/Include -o $@ $<
+
+etrax100boot : common.o network.o boot_images.o
+ gcc -mno-cygwin -g -Wall -L ../../wpdpack/Lib -o $@ $^ -lwpcap -lpacket -lws2_32
+
+clean :
+ rm -f *.o etrax100boot
--- /dev/null
+/* boot_images.c - Collection of the different boot images
+ * Johan Adolfsson Axis Communications AB
+ * $Id: boot_images.c,v 1.1 2004/01/26 10:52:40 mikaelp Exp $
+ */
+
+#include <stdio.h>
+#include "boot_images.h"
+
+/* We include the C files here to the size etc. easy */
+#include "net_ima.c"
+#include "ser_ima.c"
+#include "net_noleds_ima.c"
+#include "ser_noleds_ima.c"
+
+struct boot_image_info_type boot_image_info[] =
+{
+ { INTERNAL_NW, net_ima, sizeof net_ima, "Network boot (default)"},
+ { INTERNAL_SER, ser_ima, sizeof ser_ima, "Serial boot"},
+ { INTERNAL_SER_NOLEDS, ser_noleds_ima, sizeof ser_noleds_ima, "Serial boot, no leds"},
+ { INTERNAL_NW_NOLEDS, net_noleds_ima, sizeof net_noleds_ima, "Network boot, no leds"},
+
+ { "DBGNONE", net_ima, sizeof net_ima, "Obsolete (use INTERNAL_NW instead)" },
+ { "DBG0", net_ima, sizeof net_ima, "Obsolete (use INTERNAL_NW instead)" },
+ { "DBG1", net_ima, sizeof net_ima, "Obsolete (use INTERNAL_NW instead)" },
+ { "DBG2", net_ima, sizeof net_ima, "Obsolete (use INTERNAL_NW instead)" },
+ { "DBG3", net_ima, sizeof net_ima, "Obsolete (use INTERNAL_NW instead)" },
+
+ { "DBGNONE_NOLEDS", net_noleds_ima, sizeof net_noleds_ima, "Obsolete (use INTERNAL_NW_NOLEDS instead)" },
+ { "DBG0_NOLEDS", net_noleds_ima, sizeof net_noleds_ima, "Obsolete (use INTERNAL_NW_NOLEDS instead)" },
+ { "DBG1_NOLEDS", net_noleds_ima, sizeof net_noleds_ima, "Obsolete (use INTERNAL_NW_NOLEDS instead)" },
+ { "DBG2_NOLEDS", net_noleds_ima, sizeof net_noleds_ima, "Obsolete (use INTERNAL_NW_NOLEDS instead)" },
+ { "DBG3_NOLEDS", net_noleds_ima, sizeof net_noleds_ima, "Obsolete (use INTERNAL_NW_NOLEDS instead)" },
+
+ { NULL, NULL, 0, NULL } /* End of array */
+};
--- /dev/null
+/*!***************************************************************************
+*!
+*! FILE NAME : common.c
+*!
+*! DESCRIPTION: Common functions for e100boot.
+*!
+*! ---------------------------------------------------------------------------
+*! HISTORY
+*!
+*! DATE NAME CHANGES
+*! ---- ---- -------
+*! ??? ? ???? Ronny Ranerup Initial version
+*! ---------------------------------------------------------------------------
+*! (C) Copyright 1999-2003 Axis Communications AB, LUND, SWEDEN
+*!***************************************************************************/
+/* $Id: common.c,v 1.1 2004/01/26 10:52:40 mikaelp Exp $ */
+
+/************************** Version **************************************/
+
+char version[] = "Time-stamp: $Id: common.c,v 1.1 2004/01/26 10:52:40 mikaelp Exp $";
+
+/************************** Include files ********************************/
+
+#define WIN32_LEAN_AND_MEAN
+#include <windows.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <io.h>
+#include <winsock2.h>
+
+#include <e100boot.h>
+#include <pcap.h>
+#include "boot_images.h"
+#include <reg_des.h>
+#include <sv_addr_ag.h>
+#include <common.h>
+
+#include <serial.h>
+#include <network.h>
+
+/************************** Constants and macros *************************/
+
+#define BOOT_CMDS_FILE "BOOT_CMDS"
+
+/************************** Type definitions *****************************/
+
+struct label_t {
+ struct label_t *prev;
+ udword addr;
+ char *name;
+};
+
+/************************** Global variables *****************************/
+
+char needle[MAX_STRING_LEN] = "END"; /* search needle for --find */
+int needle_len = 3;
+
+int exitonfind = FALSE;
+
+int doing_flash = FALSE; /* Just a flag to see if we should
+ warn that it might take some
+ time. */
+
+int toFiles = FALSE; /* Dump all packets to files. */
+int cmdsOnly = FALSE; /* Just dump boot cmds to file. */
+int netBoot = TRUE; /* Do network boot? */
+int serBoot = FALSE; /* Do serial boot? */
+
+struct label_t *loop_label = NULL;
+struct label_t *label = NULL;
+
+struct packet_buf *first_packet = NULL;
+struct packet_buf *last_packet = NULL;
+
+struct packet_buf *boot_cmds_packet;
+
+int create_boot_loader = TRUE;
+
+/* We use the INTERNAL boot image as default */
+char boot_loader_file[MAX_STRING_LEN] = INTERNAL_NW;
+
+int noleds = FALSE; /* Use boot images that doesn't toggle leds? */
+
+struct boot_files_T *first_boot_file = NULL;
+struct boot_files_T *last_boot_file = NULL;
+
+unsigned int boot_cmds[SIZE_OF_BOOT_CMDS / sizeof(unsigned int)];
+int boot_cmds_cnt = 0;
+
+int svboot = FALSE;
+
+int quiet = 0;
+
+struct packet_header_T send_packet;
+struct packet_header_T *receive_packet;
+
+int seq_nr = 0;
+
+/* debug flags */
+int db1 = FALSE;
+int db2 = FALSE;
+int db3 = FALSE;
+int db4 = FALSE;
+
+char device[MAX_STRING_LEN] = "";
+
+
+/************************** Function prototypes **************************/
+
+FILE *Fopen (const char *name, const char *mode);
+int main (int argc, const char *argv[]);
+int GetNumberOption (int *argNr, int argCount, const char *argVect[], unsigned int *ret, const char *option, int base);
+int GetStringOption (int *argNr, int argCount, const char *argVect[], char *ret, const char *option);
+int GetRegisterOption (int *argNr, int argCount, const char *argVect[], unsigned int *ret, const char *option, int base);
+struct boot_files_T* allocate_boot_file (struct boot_files_T *bf);
+struct packet_buf* CreateNewBootPacket (void);
+struct packet_buf* allocate_packet (struct packet_buf *p);
+void SigHandler (int sig);
+void CreateBootLoader (void);
+void FinishBootCmds (void);
+void ParseArgs (int argc, const char *argv[]);
+void PrintHelp (void);
+void CreateBootCmds (void);
+void handle_labels (void);
+void new_label (struct label_t **label, udword addr, const char *name);
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: main
+*#
+*# PARAMETERS: Command line arguments.
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 961022 ronny Initial version
+*#
+*#***************************************************************************/
+
+int
+main(int argc, const char *argv[])
+{
+ ParseArgs(argc, argv);
+
+ if (cmdsOnly) {
+ /* We make this a special case to avoid messing up other code. */
+ CreateBootCmds();
+ FinishBootCmds();
+ SendToDevice(&boot_cmds_packet->data[SIZE_OF_HEADER],SIZE_OF_BOOT_CMDS);
+ exit(EXIT_SUCCESS);
+ }
+
+ if (netBoot && !toFiles) {
+ /* Do not bother with this if we just want to write the packets to
+ files. Means you do not have to be root to run --tofiles. */
+ net_init();
+ }
+ else if (serBoot) {
+ /*if (!SetupSerial())*/ {
+ exit(0);
+ }
+ }
+
+ CreateBootLoader();
+ CreateBootCmds();
+ FinishBootCmds();
+
+ printf("Starting boot...\n");
+ if (doing_flash) {
+ printf("We're doing a flash write, this may take up to a few minutes...\n");
+ }
+
+ if (toFiles) {
+ udword seq = 0;
+ struct packet_buf *p;
+
+ while((p = create_packet(seq++))) {
+ SendToDevice(p->data, p->size);
+ }
+
+ exit(EXIT_SUCCESS);
+ }
+
+ if (netBoot) {
+ NetBoot();
+ }
+ else if (serBoot) {
+ /*SerBoot();*/
+ }
+
+ printf("Done.\n");
+ return EXIT_SUCCESS;
+} /* main */
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: free_packet
+*#
+*# PARAMETERS: struct to free
+*#
+*# DESCRIPTION: Frees struct and data in struct.
+*#
+*# RETURNS: Pointer to next struct.
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 2000 02 07 ronny Initial version
+*#
+*#***************************************************************************/
+
+struct packet_buf*
+free_packet(struct packet_buf *p)
+{
+ struct packet_buf *next_p;
+
+ next_p = p->next;
+ free(p->data);
+ free(p);
+ return(next_p);
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: create_packet
+*#
+*# PARAMETERS: Sequence number of desired packet.
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 2000 06 28 ronny Initial version
+*#
+*#***************************************************************************/
+
+struct packet_buf*
+create_packet(udword seq)
+{
+ struct packet_buf *p = first_packet;
+ /* Should check last first? */
+
+ if (db4) printf("> create_packet seq %d\n", seq);
+
+ while (p) {
+ if (p->seq == seq) {
+ return(p);
+ }
+ p = p->next;
+ }
+
+ return(CreateNewBootPacket());
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: find_string
+*#
+*# PARAMETERS: New string to search.
+*#
+*# DESCRIPTION: Searches a number of strings for needle[], including strings
+*# overlapping between different calls.
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 020502 ronny Initial version
+*#
+*#***************************************************************************/
+
+void
+find_string(char *str)
+{
+ static int matched = 0;
+ int hs[MAX_STRING_LEN];
+ static int cur_hs = 0;
+ static int hs_len = 0;
+ static int last_hs = 0;
+
+ static int cur_needle = 0;
+
+ if (!needle[0]) {
+ return;
+ }
+ // printf("# adding >%s<\n", str);
+
+ {
+ int c = 0;
+ int s = 0;
+
+ while((c = str[s])) {
+ // printf("\n# cur_hs %d, hs_len %d\n", cur_hs, hs_len);
+ {
+ int i;
+
+ for(i = 0; i != hs_len; i++) {
+ // printf("hs[%d] = %d(%c)\n", i, (int)hs[i], hs[i] < 32 ? 'X' : hs[i]);
+ }
+ }
+
+ if (cur_hs == hs_len) {
+ // printf("adding char %d(%c) at hs[%d]\n", (int)c, c < 32 ? 'X' : c, hs_len);
+ hs[hs_len] = c;
+ hs_len++;
+ s++;
+ }
+
+ // printf("testing %d at cur_hs %d against %d at cur_needle %d\n",
+ // (int)hs[cur_hs], cur_hs, (int)needle[cur_needle], cur_needle);
+
+ if (hs[cur_hs] == needle[cur_needle]) {
+ if (cur_needle+1 == needle_len) {
+ int exitcode = EXIT_SUCCESS;
+
+ // printf("\nFound needle from --find option.\n");
+ if (exitonfind) {
+ int ret;
+ // printf("scanf (s=%d)'%s'\n", s, &str[s+1]);
+ ret = sscanf(&str[s+1], "%i", &exitcode);
+ // printf("ret %d, '%s'\n", ret, &str[s+1]);
+ }
+ printf("Exiting with code %d\n", exitcode);
+ exit(exitcode);
+ }
+ cur_needle++;
+ cur_hs++;
+ }
+ else {
+ // printf("no match, shifting hs.\n");
+ {
+ int i;
+ for(i=0; i!= hs_len-1; i++) {
+ hs[i] = hs[i+1];
+ }
+ }
+ hs_len--;
+ cur_needle = 0;
+ cur_hs = 0;
+ }
+ }
+ }
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: Fopen
+*#
+*# PARAMETERS: Name and mode, both strings.
+*#
+*# DESCRIPTION: Opens a file and returns its fd, or NULL.
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 961022 ronny Initial version
+*#
+*#***************************************************************************/
+
+FILE *
+Fopen(const char *name, const char *mode)
+{
+ FILE *fd;
+
+ if (db2) printf(">>> Fopen '%s', mode '%s'\n", name, mode);
+
+ fd = fopen(name, mode);
+
+ if (fd == NULL) {
+ printf("<<< Fopen failed on '%s', mode '%s'\n", name, mode);
+ return ((FILE*) NULL);
+ }
+
+ if (strncmp(mode, "a", 1) == 0) {
+ if (db3) printf("* Append mode, seeking to end.\n");
+ fseek(fd, 0L, SEEK_SET);
+ }
+
+ if (db2) printf("<<< Fopen: '%s'\n", name);
+
+ return(fd);
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: ParseArgs
+*#
+*# PARAMETERS: Standard command line args.
+*#
+*# DESCRIPTION: Parses command line arguments.
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 960909 ronny Initial version
+*#***************************************************************************/
+
+void
+ParseArgs (int argc, const char *argv[])
+{
+ int argi;
+ int i;
+ int printHelp = FALSE;
+ int exitCode = EXIT_SUCCESS;
+ char dbStr[MAX_STRING_LEN]; /* Debug option string. */
+ int number;
+ int argCount;
+ const char **argVect;
+ struct stat st;
+
+ if (db4) printf(">>> ParseArgs\n");
+ argCount = argc;
+ argVect = argv;
+
+ for (argi = 1; argi < argCount; argi++) {
+ if (db4) printf("argv[%d] = '%s'\n", argi, argVect[argi]);
+ if (strncmp(argVect[argi], "--from", 6) == 0) {
+ if (GetStringOption(&argi, argCount, argVect, host1, "--from") == 0) {
+ printHelp = TRUE;
+ exitCode = EXIT_FAILURE;
+ }
+ else {
+ printf("Host: %s %s\n", host1, host2);
+ if (sscanf(host1, "%x-%x-%x-%x-%x-%x", &i, &i, &i, &i, &i, &i) == 6) {
+ printf("Ethernet address\n");
+ }
+ }
+ }
+
+ else if (strncmp(argVect[argi], "--device", 8) == 0) {
+ if (GetStringOption(&argi, argCount, argVect, device, "--device") == 0) {
+ printHelp = TRUE;
+ exitCode = EXIT_FAILURE;
+ }
+ }
+
+ else if (strncmp(argVect[argi], "--network", 9) == 0) {
+ netBoot = TRUE;
+ serBoot = FALSE;
+ strcpy(boot_loader_file, INTERNAL_NW);
+ }
+
+ else if (strncmp(argVect[argi], "--serial", 8) == 0) {
+ serBoot = TRUE;
+ netBoot = FALSE;
+ strcpy(device, "/dev/ttyS0");
+ strcpy(boot_loader_file, INTERNAL_SER);
+ }
+
+ else if (strncmp(argVect[argi], "--noleds", 8) == 0) {
+ noleds = TRUE;
+ }
+
+ else if (strncmp(argVect[argi], "--images", 8) == 0) {
+ int i = 0;
+
+ printf("Internal images:\n");
+
+ while(boot_image_info[i].name) {
+ printf("'%s', %s, size %lu bytes.\n",
+ boot_image_info[i].name,
+ boot_image_info[i].info,
+ boot_image_info[i].len
+ );
+ i++;
+ }
+ exit(EXIT_SUCCESS);
+ }
+
+ else if (strncmp(argv[argi], "--baudrate", 10) == 0) {
+ /* if (GetNumberOption (&argi, argCount, argVect, &set_baudrate, "--baudrate", 10) == 0)*/ {
+ printHelp = TRUE;
+ exitCode = EXIT_FAILURE;
+ }
+ }
+
+ else if (strncmp(argVect[argi], "--tofiles", 9) == 0) {
+ toFiles = TRUE;
+ }
+
+ else if (strncmp(argVect[argi], "--cmdsonly", 10) == 0) {
+ cmdsOnly = TRUE;
+ }
+
+ else if (strncmp(argVect[argi], "--to", 4) == 0) {
+ if ((GetStringOption(&argi, argCount, argVect, host2, "--to") == 0)) {
+ printHelp = TRUE;
+ exitCode = EXIT_FAILURE;
+ }
+ else {
+ printf("Host: %s %s\n", host1, host2);
+ both_addresses = TRUE;
+ if (sscanf(host2, "%x-%x-%x-%x-%x-%x", &i, &i, &i, &i, &i, &i) == 6) {
+ printf("Ethernet address\n");
+ }
+ }
+ }
+
+ else if (strncmp(argVect[argi], "--printp", 8) == 0) {
+ pPacket = 1;
+ }
+
+ else if (strncmp(argVect[argi], "--printascii", 11) == 0) {
+ pPacket = 1;
+ printPacketType = ASCII;
+ }
+
+ else if (strncmp(argVect[argi], "--printudec", 11) == 0) {
+ pPacket = 1;
+ printPacketType = UDEC;
+ }
+
+ else if (strncmp(argVect[argi], "--printhex", 10) == 0) {
+ pPacket = 1;
+ printPacketType = HEX;
+ }
+
+ else if (strncmp(argVect[argi], "--bpl", 5) == 0) {
+ if (GetNumberOption(&argi, argCount, argVect, &p_packet_bpl, "--bpl", 10) == 0) {
+ printHelp = TRUE;
+ exitCode = EXIT_FAILURE;
+ }
+ }
+
+ else if (strncmp(argVect[argi], "--promisc", 11) == 0) {
+ promisc = 1;
+ }
+
+ else if (strncmp(argVect[argi], "--5400", 6) == 0) {
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = 0xb0000000;
+ boot_cmds[boot_cmds_cnt++] = 0x000095b6;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = 0xb0000008;
+ boot_cmds[boot_cmds_cnt++] = 0x0000e751;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = 0xb000000c;
+ boot_cmds[boot_cmds_cnt++] = 0x12604040;
+ }
+
+ else if (strncmp(argVect[argi], "--5600", 6) == 0) {
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = 0xb0000000;
+ boot_cmds[boot_cmds_cnt++] = 0x000095b6;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = 0xb0000008;
+ boot_cmds[boot_cmds_cnt++] = 0x00006751;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = 0xb000000c;
+ boot_cmds[boot_cmds_cnt++] = 0x12204040;
+ }
+
+ else if (strncmp(argVect[argi], "--testcardlx", 12) == 0) {
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_DRAM_CONFIG;
+ boot_cmds[boot_cmds_cnt++] = 0x12604040;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_DRAM_TIMING;
+ boot_cmds[boot_cmds_cnt++] = 0x0000e751;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_WAITSTATES;
+ boot_cmds[boot_cmds_cnt++] = 0x00b395b5;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_BUS_CONFIG;
+ boot_cmds[boot_cmds_cnt++] = 0x00000207;
+ }
+
+ else if (strncmp(argVect[argi], "--testcard", 10) == 0) {
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_WAITSTATES;
+ boot_cmds[boot_cmds_cnt++] = 0x000010b3;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_DRAM_TIMING;
+ boot_cmds[boot_cmds_cnt++] = 0x00006543;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_DRAM_CONFIG;
+ boot_cmds[boot_cmds_cnt++] = 0x12966060;
+ }
+
+ else if (strncmp(argVect[argi], "--devboard", 10) == 0) {
+ /* Printing on serial port will not work until PORT_PB is set... */
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_PORT_PB_SET;
+ boot_cmds[boot_cmds_cnt++] = 0x01001ef3;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_PORT_PA_SET;
+ boot_cmds[boot_cmds_cnt++] = 0x00001df0;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_WAITSTATES;
+ boot_cmds[boot_cmds_cnt++] = 0x000095a6;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_DRAM_CONFIG;
+ boot_cmds[boot_cmds_cnt++] = 0x1a200040;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_DRAM_TIMING;
+ boot_cmds[boot_cmds_cnt++] = 0x00005611;
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ boot_cmds[boot_cmds_cnt++] = (unsigned int)R_BUS_CONFIG;
+ boot_cmds[boot_cmds_cnt++] = 0x00000104;
+ }
+
+ else if (strncmp(argVect[argi], "--verify", 8) == 0) {
+ boot_cmds[boot_cmds_cnt++] = MEM_VERIFY;
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--verify", 16);
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--verify", 16);
+ }
+
+ else if (strncmp(argVect[argi], "--setreg", 8) == 0) {
+ boot_cmds[boot_cmds_cnt++] = SET_REGISTER;
+ if ((argVect[argi+1][0] >= 'A') && (argVect[argi+1][0] <= 'Z')) {
+ GetRegisterOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--setreg", 16);
+ }
+ else {
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--setreg", 16);
+ }
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--setreg", 16);
+ }
+
+ else if (strncmp(argVect[argi], "--getreg", 8) == 0) {
+ boot_cmds[boot_cmds_cnt++] = GET_REGISTER;
+ if ((argVect[argi+1][0] >= 'A') && (argVect[argi+1][0] <= 'Z')) {
+ GetRegisterOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--getreg", 16);
+ }
+ else {
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--getreg", 16);
+ }
+ }
+
+ else if (strncmp(argVect[argi], "--pause", 7) == 0) {
+ boot_cmds[boot_cmds_cnt++] = PAUSE_LOOP;
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--pause", 16);
+ }
+
+ else if (strncmp(argVect[argi], "--memtest", 9) == 0) {
+ boot_cmds[boot_cmds_cnt++] = MEM_TEST;
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--memtest", 16);
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--memtest", 16);
+ }
+
+ else if (strncmp(argVect[argi], "--loop", 6) == 0) {
+ char str[MAX_STRING_LEN];
+ boot_cmds[boot_cmds_cnt++] = LOOP;
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--loop", 16);
+ GetStringOption(&argi, argCount, argVect, str, argVect[argi]);
+ new_label(&loop_label, boot_cmds_cnt+1, str);
+ boot_cmds_cnt++;
+ }
+
+ else if (strncmp(argVect[argi], "--label", 7) == 0) {
+ char str[MAX_STRING_LEN];
+ GetStringOption(&argi, argCount, argVect, str, "--label");
+ new_label(&label, boot_cmds_cnt, str);
+ }
+
+ else if (strncmp(argVect[argi], "--memdump", 9) == 0) {
+ boot_cmds[boot_cmds_cnt++] = MEM_DUMP;
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--memdump", 16);
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--memdump", 16);
+ }
+
+ else if (strncmp(argVect[argi], "--memclear", 10) == 0) {
+ boot_cmds[boot_cmds_cnt++] = MEM_CLEAR;
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--memclear", 16);
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--memclear", 16);
+ }
+
+ else if (strncmp(argVect[argi], "--flash", 7) == 0) {
+ boot_cmds[boot_cmds_cnt++] = FLASH;
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--flash", 16);
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--flash", 16);
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--flash", 16);
+ doing_flash = TRUE;
+ }
+
+ else if (strncmp(argVect[argi], "--jump", 6) == 0) {
+ boot_cmds[boot_cmds_cnt++] = JUMP;
+ GetNumberOption(&argi, argCount, argVect, &boot_cmds[boot_cmds_cnt++], "--jump", 16);
+ }
+
+ else if (strncmp(argVect[argi], "--file", 6) == 0) {
+ char str[MAX_STRING_LEN];
+ boot_cmds[boot_cmds_cnt++] = PACKET_INFO;
+ GetStringOption(&argi, argCount, argVect,
+ str, "--file"); /* file name */
+ GetNumberOption(&argi, argCount, argVect,
+ &boot_cmds[boot_cmds_cnt++], str, 16); /* address */
+ last_boot_file = allocate_boot_file(last_boot_file);
+ first_boot_file = first_boot_file ? first_boot_file : last_boot_file;
+ last_boot_file->fileName = malloc(strlen(str) + 1);
+ strcpy(last_boot_file->fileName, str);
+ last_boot_file->size_p = &boot_cmds[boot_cmds_cnt];
+ last_boot_file->fd = NULL;
+ last_boot_file->size_sent = 0;
+ if (strncmp(str, "-", 1) != 0) {
+ if (stat(last_boot_file->fileName, &st) == -1) {
+ printf("Cannot get size of file '%s'. %s.\n",
+ last_boot_file->fileName, strerror(errno));
+ exit(EXIT_FAILURE);
+ }
+ if (db2) printf("* size is %d 0x%8.8x\n",
+ (int)st.st_size, (unsigned int)st.st_size);
+ last_boot_file->size = st.st_size;
+ boot_cmds[boot_cmds_cnt++] = st.st_size;
+ }
+ else {
+ GetNumberOption(&argi, argCount, argVect,
+ &last_boot_file->size , str, 16); /* size */
+
+ boot_cmds[boot_cmds_cnt++] = last_boot_file->size;
+ printf("* size is %d 0x%8.8x\n", last_boot_file->size,
+ last_boot_file->size);
+ }
+ }
+
+ else if (strncmp(argVect[argi], "--bootfile", 10) == 0) {
+ GetStringOption(&argi, argCount, argVect,
+ boot_loader_file, "--bootfile");
+ }
+
+ else if (strncmp(argVect[argi], "-d", 2) == 0) {
+ if (GetNumberOption (&argi, argCount, argVect, &number, "-d", 10) == 0) {
+ printHelp = TRUE;
+ exitCode = EXIT_FAILURE;
+ }
+ else {
+ sprintf(dbStr, "%d", number);
+ for (i = 0; i != (int) strlen(dbStr); i++) {
+ switch (dbStr[i] - '0') {
+ case 1:
+ db1 = TRUE;
+ break;
+ case 2:
+ db2 = TRUE;
+ break;
+ case 3:
+ db3 = TRUE;
+ break;
+ case 4:
+ db4 = TRUE;
+ break;
+ default:
+ printf("ERROR! Debug level %d is not defined.\n", dbStr[i] - '0');
+ printHelp = TRUE;
+ exitCode = EXIT_FAILURE;
+ break;
+ }
+ }
+ }
+ }
+
+ else if (strncmp(argVect[argi], "--find", 6) == 0) {
+ GetStringOption(&argi, argCount, argVect, needle, "--find");
+ /* convert control characters like /n to the real ascii valure */
+ {
+ int i;
+ int j = 0;
+ char c;
+ int esc = 0;
+
+ for (i = 0; (c = needle[i]); i++,j++) {
+// printf("c = %d, i %d, j %d\n", (int)c, i, j);
+ if (c == '\\') {
+// printf("esc\n");
+ esc = 1;
+ continue;
+ }
+ else if (esc) {
+ esc = 0;
+ switch(c) {
+ case 'r':
+ c = '\r';
+ break;
+
+ case 'n':
+ c = '\n';
+ break;
+
+ case '\\':
+ c = '\\';
+ break;
+
+ default:
+ printf("Uknown escape sequence '\\%c'\n", c);
+ exit(EXIT_FAILURE);
+ }
+ j--;
+ }
+ // printf("setting j %d to %d\n", j, (int)c);
+ needle[j] = c;
+ }
+ needle_len = j;
+ }
+
+ for (i = 0; needle[i]; i++) {
+ //printf("i = %d, c %d\n", i,(int)needle[i]);
+ }
+ }
+
+ else if (strncmp(argVect[argi], "--exitonfind", 12) == 0) {
+ exitonfind = TRUE;
+ }
+
+ else if (strncmp(argVect[argi], "--help", 6) == 0) {
+ printHelp = TRUE;
+ }
+
+ else {
+ printf("ERROR! Don't understand option '%s'\n", argVect[argi]);
+ printHelp = TRUE;
+ exitCode = EXIT_FAILURE;
+ }
+ }
+
+ if (printHelp == TRUE) {
+ PrintHelp();
+ exit(exitCode);
+ }
+
+ if (noleds) {
+ strcpy(&boot_loader_file[strlen(boot_loader_file)], "_NOLEDS");
+ }
+
+ handle_labels();
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: handle_labels
+*#
+*# PARAMETERS: global loop_label, label
+*#
+*# DESCRIPTION: Checks and matches labels from --loop and --label commands
+*# and inserts the resolved addresses into boot commands.
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 20020204 ronny Initial version
+*#
+*#***************************************************************************/
+
+void
+handle_labels(void)
+{
+ struct label_t *ll = loop_label;
+ struct label_t *l = label;
+ struct label_t *last_l = l;
+
+ while(ll) {
+ int match = 0;
+
+ l = last_l;
+ while(l) {
+ match = 0;
+
+ if (l->name && ll->name && (strcmp(l->name, ll->name) == 0)) {
+ match = 1;
+ boot_cmds[ll->addr] = IO_BUF_START+(l->addr*4);
+ break;
+ }
+ l = l->prev;
+ }
+ if (!match) {
+ printf("Error. No label '%s' defined as needed by --loop command.\n", ll->name);
+ exit(EXIT_FAILURE);
+ }
+ ll = ll->prev;
+ }
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: new_label
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 20020201 ronny Initial version
+*#
+*#***************************************************************************/
+
+void
+new_label(struct label_t **label, udword addr, const char *name)
+{
+ struct label_t *new_p;
+
+ new_p = malloc(sizeof(struct label_t));
+
+ if (*label == NULL) { /* first one? */
+ *label = new_p;
+ new_p->prev = NULL;
+ }
+ else {
+ new_p->prev = *label;
+ }
+ *label = new_p;
+ new_p->addr = boot_cmds_cnt;
+ new_p->name = malloc(strlen(name));
+ strcpy(new_p->name, name);
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: GetStringOption
+*#
+*# PARAMETERS: int *argNr : Returns next argc here.
+*# int argCount : Index of last argument.
+*# char *argVect[] : argv.
+*# char *ret : Copy string here.
+*# char *option : Name of the option.
+*#
+*# DESCRIPTION: Extracts a string option from argv, and updates argnr.
+*# Returns TRUE/FALSE and string in *ret.
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 960930 ronny Initial version
+*# 961203 ronny Handles filenames with spaces within 'file name'.
+*#
+*#***************************************************************************/
+
+int
+GetStringOption(int *argNr, int argCount, const char *argVect[], char *ret,
+ const char *option)
+{
+ int startChar = strlen(option);
+
+ *ret = '\0';
+
+ /* Are there any more chars after option? If not skip to next argv. */
+ if (strlen(argVect[*argNr]) <= (unsigned int)startChar) {
+ (*argNr)++;
+ startChar = 0;
+ }
+
+ /* Any args left? */
+ if (*argNr >= argCount) {
+ printf("ERROR! The option '%s' needs a string argument.\n", option);
+ PrintHelp();
+ exit(EXIT_FAILURE);
+ }
+
+ /* avoid stack overflow hacks */
+ if (strlen(&argVect[*argNr][startChar]) > MAX_STRING_LEN) {
+ printf("Argument '%s' longer than maximum allowable %d characters.\n",
+ &argVect[*argNr][startChar], MAX_STRING_LEN);
+ exit(EXIT_FAILURE);
+ }
+
+ strcpy(ret, &argVect[*argNr][startChar]);
+ if (db4) printf("<<< GetStringOption '%s'\n", ret);
+
+ return TRUE;
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: GetNumberOption
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 960930 ronny Initial version
+*#
+*#***************************************************************************/
+
+int
+GetNumberOption(int *argNr, int argCount, const char *argVect[],
+ unsigned int *ret, const char *option, int base)
+{
+ int startChar = 0;
+ int add_io_base = 0;
+
+ (*argNr)++;
+
+ if (*argNr >= argCount) {
+ printf("ERROR! The option '%s' needs a number argument.\n", option);
+ PrintHelp();
+ exit(EXIT_FAILURE);
+ }
+
+ if (argVect[*argNr][startChar] == '+') {
+ add_io_base = 1;
+ startChar++;
+ }
+
+ *ret = strtoul(&argVect[*argNr][startChar], NULL, base);
+
+ if (add_io_base) {
+ *ret += IO_BUF_START;
+ if (*ret < IO_BUF_START || *ret >= IO_BUF_END) {
+ printf("ERROR! '%s' is outside the IO buffer (option '%s').\n",
+ argVect[*argNr], option);
+ exit(EXIT_FAILURE);
+ }
+ }
+
+ if (db4) printf("<<< GetNumberOption %08x\r\n", *ret);
+
+ return TRUE;
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: GetRegisterOption
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 960930 ronny Initial version
+*#
+*#***************************************************************************/
+
+int
+GetRegisterOption(int *argNr, int argCount, const char *argVect[],
+ unsigned int *ret, const char *option, int base)
+{
+ int startChar = 0;
+
+ (*argNr)++;
+
+ if (*argNr >= argCount) {
+ printf("Error! The option '%s' needs a register name.\n", option);
+ PrintHelp();
+ exit(EXIT_FAILURE);
+ }
+
+ {
+ int r = 0;
+
+ while (reg_des[r].name) {
+ if (strcmp(reg_des[r].name, argVect[*argNr]) == 0) {
+ *ret = reg_des[r].addr;
+ return TRUE;
+ break;
+ }
+ r++;
+ }
+ }
+
+ printf("Error! Didn't find a register name matching '%s'.\n",
+ argVect[*argNr]);
+
+ exit(EXIT_FAILURE);
+
+ return FALSE;
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: PrintHelp
+*#
+*# PARAMETERS: None.
+*#
+*# DESCRIPTION: Prints help info.
+*#
+*#---------------------------------------------------------------------------
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 960909 ronny Initial version
+*#
+*#***************************************************************************/
+
+void
+PrintHelp(void)
+{
+ printf("e100boot version %s.\n", version);
+
+ printf("\ne100boot [--device devicename] [--file filename|- addr [size]]\n"
+ " [--flash ram-source flash-offset size]\n"
+ " [--pause iter]\n"
+ " [--memtest addr addr]\n"
+ " [--memclear addr addr] [--memdump addr addr]\n"
+ " [--setreg addr|regname val] [--getreg addr|regname]\n"
+ " [--verify addr val] [--label label] [--loop addr label]\n"
+ " [--5400] [--5600] [--testcard] [--devboard]\n"
+ " [--testcardlx] [--network] [--serial]\n"
+ " [--baudrate baudrate] [--bootfile file] [--jump addr]\n"
+ " [--tofiles] [--cmdsonly] [--images] [--noleds]\n"
+ " [--help]\n\n");
+
+ printf(" The commands sent to the cbl, and which are parsed by the cbl,\n"
+ " are stored at 0x%8.8x-0x%8.8x.\n\n", IO_BUF_START, IO_BUF_END);
+
+ printf(" See the man page for more details about e100boot.\n\n");
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: CreateBootLoader
+*#
+*# PARAMETERS: None.
+*#
+*# DESCRIPTION: Creates boot packets from boot file or internal loader.
+*#
+*#---------------------------------------------------------------------------
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 960909 ronny Initial version
+*#***************************************************************************/
+
+void
+CreateBootLoader(void)
+{
+ struct stat st;
+ char *buf = NULL;
+ // int size_pos = 0x18;
+ // int addr_pos = 0x28;
+ struct packet_header_T *ph;
+ int packet_size;
+ int header_size;
+ int buf_cnt = 0;
+ int i;
+ udword sum = 0;
+
+ if (create_boot_loader) {
+ int image_nbr = 0;
+ int found = 0;
+ const struct boot_image_info_type *info;
+
+ if (db4) printf("> CreateBootLoader\n");
+
+ info = &boot_image_info[image_nbr];
+
+ /* Use internal boot loader? */
+ while (!found && info->name != NULL) {
+ if (strcmp(boot_loader_file, info->name) == 0) {
+ st.st_size = info->len;
+ buf = (char*) malloc(st.st_size);
+ memcpy(buf, info->ptr, st.st_size); /* unnecessary? */
+ found = TRUE;
+ printf("Using internal boot loader: %s - %s.\n",
+ info->name, info->info);
+ }
+ else {
+ image_nbr++;
+ info = &boot_image_info[image_nbr];
+ }
+ }
+
+ /* No internal? Load it from file instead. */
+ if (!found) {
+ FILE *fd;
+
+ /* We didn't find an internal match, load the boot file from disk. */
+ if ((fd = Fopen(boot_loader_file, "r")) == NULL) {
+ printf("Cannot open bootloader '%s'. %s.\n",
+ boot_loader_file, strerror(errno));
+ exit(EXIT_FAILURE);
+ }
+
+ if (fstat(fileno(fd), &st) == -1) {
+ printf("Cannot get filestatus of bootloader '%s'. %s.\n",
+ boot_loader_file, strerror(errno));
+ exit(EXIT_FAILURE);
+ }
+
+ buf = (char*) malloc(st.st_size);
+ // printf("CreateBootLoader: buf = (char*) malloc(st.st_size); 2\n");
+ if (read(fileno(fd), buf, st.st_size) != st.st_size) {
+ printf("Read fewer bytes than there should be in %s.\n",
+ boot_loader_file);
+ exit(EXIT_FAILURE);
+ }
+
+ fclose(fd);
+ }
+
+ /* Alright, got loader in buf[] and size in st. */
+ if (netBoot) {
+ /* The etrax code for all boot methods are linked to adress
+ 380000f0 but since network boot starts execution at 380000f4
+ we have two nops in the beginning of the code which we do not
+ transmit to etrax in the network case. The link adress
+ doesn't change though. */
+ buf += 4;
+ st.st_size -= 4;
+ packet_size = DATA_SIZE;
+ }
+ else {
+ packet_size = st.st_size;
+ }
+
+ /* Hack binary, insert size and address. */
+
+#define SIZE_PATTERN 0x12345678
+#define ADDR_PATTERN 0x87654321
+#define SIZE_POS (netBoot ? 0x0c : 0x10)
+#define ADDR_POS (netBoot ? 0x10 : 0x14)
+
+ if (*(udword*)&buf[SIZE_POS] != SIZE_PATTERN) {
+ printf("Bootloader corrupt. Should contain ret/nop (0x%8.8x) at 0x%x, but contains %x\n",
+ SIZE_PATTERN, SIZE_POS, *(udword*)&buf[SIZE_POS]);
+ exit(EXIT_FAILURE);
+ }
+
+ /* How much data to load except data in first packet. */
+
+ if (netBoot) {
+ *(udword*)(&buf[SIZE_POS]) = st.st_size - DATA_SIZE;
+ }
+ else {
+ *(udword*)(&buf[SIZE_POS]) = st.st_size - 784;
+ }
+
+ if (db3) printf("Inserting boot size 0x%x at 0x%x.\n",
+ (unsigned int) *(udword*)(&buf[SIZE_POS]),
+ (unsigned int)&buf[SIZE_POS]);
+
+ if (*(udword*)&buf[ADDR_POS] != ADDR_PATTERN) {
+ printf("Bootloader corrupt. Should contain ret/nop (0x%8.8x) at 0x%x, but contains %x\n",
+ ADDR_PATTERN, ADDR_POS, *(udword*)&buf[ADDR_POS]);
+ exit(EXIT_FAILURE);
+ }
+
+ if (netBoot) {
+ *(udword*)(&buf[ADDR_POS]) = BOOT_ADDRESS + DATA_SIZE;
+ }
+ else {
+ *(udword*)(&buf[ADDR_POS]) = BOOT_ADDRESS-4 + 784;
+ }
+
+ if (db3) printf("Inserting boot address 0x%x at 0x%x.\n",
+ (unsigned int)*(udword*)(&buf[ADDR_POS]),
+ (unsigned int)&buf[ADDR_POS]);
+
+
+ for (i = 0; i != st.st_size; i++) {
+ sum += ((byte*)buf)[i];
+ }
+ if (db1) printf("Checksum 0x%x, bytes %d\n", sum, i);
+
+ if (db4) {
+ int i;
+
+ for(i=0; i<st.st_size; i+=8) {
+ int j;
+
+ printf("0x%8.8x[%4.4x]: ", BOOT_ADDRESS+i, i);
+ for(j=0; i+j<st.st_size && j<8; j++) {
+ printf("%2.2x ", (unsigned char) buf[i+j]);
+ }
+ printf("\n");
+ }
+ }
+ /* Now create list of packets. */
+ while (buf_cnt <= st.st_size) {
+
+ header_size = seq_nr == 0 ?
+ SIZE_OF_FIRST_HEADER : sizeof(struct packet_header_T);
+
+ if (netBoot) {
+ packet_size = ((st.st_size - buf_cnt) < DATA_SIZE ?
+ st.st_size - buf_cnt : DATA_SIZE) + header_size;
+ }
+ else {
+ packet_size = st.st_size;
+ header_size = 0;
+ }
+
+ if (db4) printf("seq_nr %d, header_size %d, packet_size %d\n",
+ seq_nr, header_size, packet_size);
+
+ last_packet = allocate_packet(last_packet);
+
+ first_packet = first_packet ? first_packet : last_packet;
+
+ last_packet->size = packet_size;
+ last_packet->data = (char*)malloc(packet_size);
+ last_packet->seq = seq_nr;
+ last_packet->baud_rate = 9600;
+
+ last_packet->boot_file = allocate_boot_file(NULL);
+ last_packet->boot_file->fileName = boot_loader_file;
+
+ // printf("last_packet->size %8.8x\n", last_packet->size);
+ // printf("last_packet->data %8.8x\n",last_packet->data);
+
+ if (netBoot) {
+ ph = (struct packet_header_T*) last_packet->data;
+ memcpy(ph->dest, dst_addr_of_device, 6);
+ memcpy(ph->src, eth_addr_local, 6);
+ ph->length = htons(packet_size);
+ ph->snap1 = htonl(SNAP1);
+ ph->snap2 = htonl(SNAP2);
+ ph->tag = htonl(SERVER_TAG);
+ ph->seq = htonl(seq_nr);
+ if (seq_nr != 0) {
+ ph->type = htonl(BOOT_PACKET);
+ ph->id = htonl(0);
+ }
+ }
+
+ memcpy(&last_packet->data[header_size], &buf[buf_cnt],
+ packet_size - header_size);
+ if (db3) DecodeSvintoBoot(last_packet->data);
+
+ if (netBoot) {
+ buf_cnt += DATA_SIZE;
+ }
+ else {
+ buf_cnt += packet_size +1;
+ }
+
+ seq_nr++;
+ }
+ }
+
+ if (db4) printf("< CreateBootLoader\n");
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: allocate_packet
+*#
+*# PARAMETERS: None.
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 960909 ronny Initial version
+*#***************************************************************************/
+
+struct packet_buf*
+allocate_packet(struct packet_buf *p)
+{
+ if (db4) printf("> allocate_packet\n");
+
+ if (p) {
+ p->next = (struct packet_buf*) malloc(sizeof(struct packet_buf));
+ p = p->next;
+ }
+ else {
+ p = (struct packet_buf*) malloc(sizeof(struct packet_buf));
+ }
+ p->next = NULL;
+
+ return(p);
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: allocate_boot_file
+*#
+*# PARAMETERS: None.
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 960909 ronny Initial version
+*#***************************************************************************/
+
+struct boot_files_T*
+allocate_boot_file(struct boot_files_T *bf)
+{
+ if (bf) {
+ bf->next = (struct boot_files_T*) malloc(sizeof(struct boot_files_T));
+ bf = bf->next;
+ }
+ else {
+ bf = (struct boot_files_T*) malloc(sizeof(struct boot_files_T));
+ }
+ bf->next = NULL;
+
+ return(bf);
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: CreateBootCmds
+*#
+*# PARAMETERS: None.
+*#
+*# DESCRIPTION: Creates a boot packet from the boot commands. The data is
+*# filled in later by FinishBootCmds().
+*#
+*#---------------------------------------------------------------------------
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 980818 ronny Initial version
+*#***************************************************************************/
+
+void
+CreateBootCmds(void)
+{
+ struct packet_header_T *ph;
+
+ if (db4) printf("***> CreateBootCmds\n");
+
+ last_packet = allocate_packet(last_packet);
+
+ boot_cmds_packet = last_packet;
+
+ last_packet->boot_file = allocate_boot_file(NULL);
+ last_packet->boot_file->fileName = BOOT_CMDS_FILE;
+ last_packet->baud_rate = 9600;
+
+ last_packet->size = netBoot ? SIZE_OF_BOOT_CMDS + sizeof(struct packet_header_T)
+ : SIZE_OF_BOOT_CMDS;
+
+ last_packet->data = (char *) malloc(last_packet->size);
+ last_packet->seq = seq_nr;
+
+ if (netBoot) {
+ /* Create packet header. */
+ ph = (struct packet_header_T *) last_packet->data;
+ memcpy(ph->dest, dst_addr_of_device, 6);
+ memcpy(ph->src, eth_addr_local, 6);
+ ph->length = htons(last_packet->size);
+ ph->snap1 = htonl(SNAP1);
+ ph->snap2 = htonl(SNAP2);
+ ph->tag = htonl(SERVER_TAG);
+ ph->seq = htonl(seq_nr);
+ seq_nr++;
+ ph->type = htonl(BOOT_CMDS);
+ ph->id = htonl(0);
+ }
+
+ if (db3) DecodeSvintoBoot(last_packet->data);
+ if (db4) printf("<*** CreateBootCmds\n");
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: FinishBootCmds
+*#
+*# PARAMETERS: None.
+*#
+*# DESCRIPTION: Copies the boot commands into the correct packet and changes
+*# the dwords to network order.
+*#
+*#---------------------------------------------------------------------------
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 960909 ronny Initial version
+*#***************************************************************************/
+
+void
+FinishBootCmds(void)
+{
+ int i;
+ unsigned int offset = 0;
+
+ for (i = 0; i != boot_cmds_cnt; i++) {
+ boot_cmds[i] = htonl(boot_cmds[i]);
+ if (db3) printf("%8.8x\n", boot_cmds[i]);
+ }
+
+ /* Copy boot commands into packet. */
+ if (netBoot) {
+ offset = sizeof(struct packet_header_T);
+ }
+
+ memcpy(&boot_cmds_packet->data[offset], boot_cmds,
+ boot_cmds_cnt * sizeof(udword));
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: CreateNewBootPacket
+*#
+*# PARAMETERS: None.
+*#
+*# DESCRIPTION: Creates next packet for the files specified by '--file'.
+*#
+*# RETURNS: Next packet, or NULL.
+*#
+*#---------------------------------------------------------------------------
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 960909 ronny Initial version
+*#***************************************************************************/
+
+struct packet_buf*
+CreateNewBootPacket(void)
+{
+ static char buf[DATA_SIZE];
+ struct packet_header_T *ph;
+ int packet_size;
+ int header_size;
+ int i;
+ udword sum;
+ int size = 0;
+ int padding = 0;
+
+ static struct boot_files_T *bf = NULL;
+
+ if (db3) printf("> CreateNewBootPacket\n");
+
+ bf = bf ? bf : first_boot_file;
+
+ while (bf) {
+ if (!bf->fd) {
+ if (strcmp(bf->fileName, "-") == 0) {
+ bf->fd = stdin;
+ }
+ else {
+ bf->fd = fopen(bf->fileName, "rb");
+ }
+
+ if (bf->fd == NULL) {
+ printf("Cannot open boot file %s. Exiting\n", bf->fileName);
+ exit(EXIT_FAILURE);
+ }
+ if (db3) printf("Opening boot file %s\n", bf->fileName);
+ }
+
+ if (!padding) {
+ size = fread(buf, 1, DATA_SIZE, bf->fd);
+ if (size == 0) {
+ if (db3) printf("Nothing more to read. Read: %d/%d\n",
+ bf->size_sent, bf->size);
+ padding = 1;
+ }
+ }
+
+ if (padding) {
+ if (bf->size_sent < bf->size) {
+ if (db3) printf("padding...\n");
+ size = (bf->size - bf->size_sent > DATA_SIZE) ?
+ DATA_SIZE : bf->size - bf->size_sent;
+ memset(buf, 0, size);
+ }
+ else {
+ if (db3) printf("All written\n");
+ padding = 0;
+ size = 0;
+ }
+ }
+
+ if (size != 0) {
+ if (db3) printf("size: %d %d/%d\n", size, bf->size_sent, bf->size);
+ bf->size_sent += size;
+ last_packet = allocate_packet(last_packet);
+
+ /* Calculate checksum. */
+ sum = 0;
+ for (i = 0; i != size; i++) {
+ sum += ((byte*)buf)[i];
+ }
+ if (db2) printf("Checksum 0x%x, bytes %d\n", sum, i);
+
+ /* Figure out size of packet. */
+ if (netBoot) {
+ header_size = seq_nr == 0 ?
+ SIZE_OF_FIRST_HEADER : sizeof(struct packet_header_T);
+
+ packet_size = ((size) < DATA_SIZE ? size : DATA_SIZE) + header_size;
+ }
+ else {
+ header_size = 0;
+ packet_size = size;
+ }
+
+ if (packet_size < 60) { /* CRC adds 4 bytes to 64 */
+ printf(
+ "Last packet from file '%s', is smaller than 64 bytes. \n"
+ "This is not allowed in the Ethernet standard. Will pad with %d "
+ "bytes.\n", bf->fileName, 60-packet_size);
+
+ *(bf->size_p) += 60-packet_size;
+ packet_size = 60;
+ }
+
+ last_packet->size = packet_size;
+ last_packet->data = (char*)malloc(packet_size);
+ last_packet->boot_file = bf;
+ last_packet->baud_rate = 0;/*set_baudrate;*/
+
+ /* printf("size %8.8x\n", last_packet->size);*/
+ /* printf("data %8.8x\n",last_packet->data);*/
+
+ if (netBoot) {
+ /* Initialize ethernet header. */
+ ph = (struct packet_header_T*) last_packet->data;
+ memcpy(ph->dest, dst_addr_of_device, 6);
+ memcpy(ph->src, eth_addr_local, 6);
+ /* printf("packet_size %d\n", packet_size);*/
+ ph->length = htons(packet_size);
+ ph->snap1 = htonl(SNAP1);
+ ph->snap2 = htonl(SNAP2);
+ ph->tag = htonl(SERVER_TAG);
+ ph->seq = htonl(seq_nr);
+ last_packet->seq = seq_nr;
+ if (seq_nr != 0) {
+ ph->type = htonl(BOOT_PACKET);
+ ph->id = htonl(0); /* id doesn't matter, we send to a unicast address */
+ }
+ }
+
+ /* Copy data in place. */
+ memcpy(&last_packet->data[header_size], buf, packet_size - header_size);
+ if (db2) DecodeSvintoBoot(last_packet->data);
+ /* PrintPacket(last_packet->data, last_packet->size, HEX);*/
+ seq_nr++;
+
+ if (db3) printf("< CreateNewBootPacket\n");
+ return(last_packet);
+ }
+ else { /* Nothing read from fd. */
+ fclose(bf->fd);
+ bf = bf->next;
+ }
+ }
+
+ if (db3) printf("< CreateNewBootPacket\n");
+ return(NULL);
+}
+
+/****************** END OF FILE common.c ************************************/
--- /dev/null
+/*!***************************************************************************
+*!
+*! FILE NAME : network.c
+*!
+*! DESCRIPTION: Network boot stuff for e100boot.
+*!
+*! ---------------------------------------------------------------------------
+*! HISTORY
+*!
+*! DATE NAME CHANGES
+*! ---- ---- -------
+*! 1996 Ronny Raneup Initial version
+*! 2002 05 02 Ronny Ranerup Moved it into this file
+*! ---------------------------------------------------------------------------
+*! (C) Copyright 1999, 2000, 2001, 2002 Axis Communications AB, LUND, SWEDEN
+*!***************************************************************************/
+
+/************************** Include files ********************************/
+
+#include <stdio.h>
+#define WIN32_LEAN_AND_MEAN
+#include <windows.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <ctype.h>
+#include <sys/timeb.h>
+#include <winsock2.h>
+
+#include <pcap.h>
+#include <Packet32.h>
+#include <Ntddndis.h>
+
+#include <e100boot.h>
+#include <common.h>
+#include <network.h>
+
+/************************** Constants and macros *************************/
+
+#define CRC_LEN 4
+
+/************************** Type definitions *****************************/
+
+/************************** Global variables *****************************/
+
+udword highest_ack_received;
+udword last_ack_received = -1;
+int new_ack = FALSE;
+int got_new_packet = FALSE;
+
+unsigned char dst_addr_of_device[] = { 0x01, 0x40, 0x8c, 0x00, 0x01, 0x00 };
+unsigned char src_addr_of_device[] = { 0x02, 0x40, 0x8c, 0x00, 0x01, 0x00 };
+unsigned char eth_addr_local[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
+
+struct sockaddr sock_addr;
+int pPacket = 0;
+pcap_t *pd;
+
+pcap_handler handler;
+
+struct packet_buf first_rec_packet;
+struct packet_buf *last_rec_packet = &first_rec_packet;
+
+int promisc = 1; /* promiscuous mode */
+int all_ids = TRUE;
+
+int both_addresses = FALSE;
+int p_packet_bpl = 8;
+int printPacketType = CHAR;
+
+unsigned int id;
+int one_id_only = TRUE;
+
+unsigned char buf[16000]; /* pcap buffer */
+
+const struct pcap_pkthdr *hdrG;
+
+char host1[MAX_STRING_LEN]; /* name of ethernet host */
+char host2[MAX_STRING_LEN]; /* name of ethernet host */
+
+/************************** Function prototypes **************************/
+
+int gettimeofday (struct timeval *tv, void*);
+int timeout (struct timeval *tvThen, int ms);
+int highest_seq_received (void);
+struct packet_buf* ack_on_seq (int seq);
+struct packet_buf* packet_with_seq (int seq);
+struct timeval timeval_subtract (struct timeval *x, struct timeval *y);
+void GetNextPacket (void);
+void PrintPacket (const unsigned char *p, int size, int type);
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: net_init
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 2002 05 02 ronny Initial version
+*#
+*#***************************************************************************/
+void
+net_init(void)
+{
+ pcap_if_t* alldevs;
+ pcap_if_t* d;
+ char errbuf[PCAP_ERRBUF_SIZE];
+ LPADAPTER pAdapter;
+ char pOidDataBuf[sizeof(PACKET_OID_DATA)-1+sizeof(eth_addr_local)];
+ PPACKET_OID_DATA pOidData;
+
+ if (strlen(device) == 0) {
+ /* Retrieve the device list */
+ if (pcap_findalldevs(&alldevs, errbuf) == -1) {
+ fprintf(stderr,"Error finding devices: %s\n", errbuf);
+ exit(EXIT_FAILURE);
+ }
+
+ if (alldevs == NULL) {
+ printf("\nNo network adapters found!\n");
+ exit(EXIT_FAILURE);
+ }
+
+ /* Use first device/interface */
+ d = alldevs;
+ if (db1) printf("Using device %s (%s)\n", d->name,
+ (d->description ? d->description :
+ "No description available"));
+ strcpy(device, d->name);
+ pcap_freealldevs(alldevs);
+ }
+
+ if ((pd = pcap_open_live(device, 200, promisc, -1, errbuf)) == NULL) {
+ printf("Error opening device %s\n", errbuf);
+ exit(EXIT_FAILURE);
+ }
+
+ /* Determine Ethernet address */
+ if ((pAdapter = PacketOpenAdapter(device)) == NULL) {
+ printf("Error opening packet adapter!\n");
+ exit(EXIT_FAILURE);
+ }
+
+ pOidData = &pOidDataBuf[0];
+ pOidData->Oid = OID_802_3_CURRENT_ADDRESS;
+ pOidData->Length = sizeof(eth_addr_local);
+ if (!PacketRequest(pAdapter, FALSE, pOidData)) {
+ printf("Error obtaining adapter Ethernet address!\n");
+ exit(EXIT_FAILURE);
+ }
+
+ PacketCloseAdapter(pAdapter);
+ pAdapter = NULL;
+
+ memcpy(eth_addr_local, pOidData->Data, sizeof(eth_addr_local));
+ if (db1) printf("Ethernet adress for device is %2.2x-%2.2x-%2.2x-%2.2x-%2.2x-%2.2x\n",
+ eth_addr_local[0],
+ eth_addr_local[1],
+ eth_addr_local[2],
+ eth_addr_local[3],
+ eth_addr_local[4],
+ eth_addr_local[5]);
+
+ handler = (pcap_handler) Handler;
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: NetBoot
+*#
+*# DESCRIPTION: The main network boot routine.
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 2000 01 07 ronny Initial version
+*# 2002 05 02 ronny Fixed segv bug
+*#
+*#***************************************************************************/
+
+void
+NetBoot(void)
+{
+ struct packet_buf *p;
+ struct timeval tv;
+
+ gettimeofday(&tv, NULL);
+
+ p = create_packet(0);
+ SendToDevice(p->data, p->size);
+
+ while(1) {
+ static int all_trans = FALSE;
+
+ if (got_new_packet) {
+ got_new_packet = FALSE;
+
+ if (new_ack && first_packet) {
+ if (db4) {
+ printf("* got ACK %d.\n", last_ack_received);
+ printf("* ACK wanted %d.\n", first_packet->seq);
+ }
+ if (last_ack_received == first_packet->seq) {
+ if (!(p = create_packet(first_packet->seq+1))) {
+ //break;
+ }
+ first_packet = free_packet(first_packet);
+ }
+ }
+ }
+
+ if (new_ack || timeout(&tv, 500)) {
+ if (p) {
+ SendToDevice(p->data, p->size);
+ }
+ new_ack = FALSE;
+ gettimeofday(&tv, NULL);
+ }
+
+ GetNextPacket();
+ }
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: GetNextPacket
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 961022 ronny Initial version
+*#
+*#***************************************************************************/
+
+void
+GetNextPacket(void)
+{
+ int ret;
+
+ if (db2) printf("> GetNextPacket\n");
+
+ /* got_new_packet = FALSE;*/
+ if ((ret = pcap_dispatch(pd, 1, handler, buf)) == -1) {
+ pcap_perror(pd, "Error in pcap_dispatch");
+ exit(EXIT_FAILURE);
+ }
+
+ if (db2) printf("< GetNextPacket\n");
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: Handler
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 961022 ronny Initial version
+*#
+*#***************************************************************************/
+
+void
+Handler(unsigned char *buf, const struct pcap_pkthdr *hdr,
+ const unsigned char *p)
+{
+ const unsigned char *src = &p[6];
+ const unsigned char *dst = &p[0];
+ struct packet_header_T *h = (struct packet_header_T*)p;
+
+ if (db2) printf("> Handler\n");
+ got_new_packet = TRUE;
+ if ((!memcmp(src, eth_addr_local, 6) && !memcmp(dst, dst_addr_of_device, 6))
+ || (!memcmp(src, src_addr_of_device, 6) && !memcmp(dst, eth_addr_local, 6))) {
+ if (db1) printf("#RX######################################################\n");
+ if (db1) printf("Length: %u(0x%x)\n", (udword)hdr->len, (udword)hdr->len);
+ if (pPacket) PrintPacket(p, hdr->caplen, printPacketType);
+ DecodeSvintoBoot(p);
+ /* should clean up this... */
+ if ((ntohl(h->type) == ACK)) {
+ if (all_ids || (ntohl(h->id) == id)) {
+ if (all_ids && one_id_only) {
+ if (ntohl(h->id) == 0) {
+ all_ids = FALSE;
+ id = ntohl(h->id);
+ printf("Booting device with random id %8.8x.\n", id);
+ }
+ }
+ }
+ else {
+ printf("Got ACK from a new id, %8.8lx. Ignoring.\n",
+ (unsigned long)ntohl(h->id));
+ return;
+ }
+ new_ack = TRUE;
+ last_ack_received = ntohl(h->seq);
+ if (last_ack_received > highest_ack_received) {
+ highest_ack_received = last_ack_received;
+ }
+ }
+
+ if (db1) printf("#########################################################\n");
+
+ }
+ if (db2) printf("< Handler\n");
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: ack_on_seq
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 980817 ronny Initial version
+*#
+*#***************************************************************************/
+
+struct packet_buf *
+packet_with_seq(int seq)
+{
+ static int last_seq = 0;
+ struct packet_buf *p = first_packet;
+ struct packet_header_T *h;
+
+ if (seq < last_seq) {
+ p = first_packet;
+ }
+
+ while(p) {
+ h = (struct packet_header_T*)p->data;
+ if (ntohl(h->seq) == seq) {
+ return(p);
+ }
+ p = p->next;
+ }
+ return(NULL);
+}
+
+struct packet_buf *
+ack_on_seq(int seq)
+{
+ struct packet_buf *p = &first_rec_packet;
+ struct packet_header_T *h;
+
+ if (db1) printf("***> ack_on_seq: %d.\n", seq);
+
+ while (p) {
+ /* printf("\nPacket at %x.\n", p);*/
+ /* DecodeSvintoBoot(p->data);*/
+ h = (struct packet_header_T*)p->data;
+ if ( (ntohl(h->type) == ACK) && (ntohl(h->seq) == seq) ) {
+ if (all_ids || ntohl(h->id) == id) {
+ printf("***< ack_on_seq %d, ok.\n", seq);
+ return(p);
+ }
+ }
+ p = p->next;
+ }
+ if (db1) printf("***< ack_on_seq, no.\n");
+ return(NULL);
+}
+
+int
+highest_seq_received(void)
+{
+ struct packet_buf *p = &first_rec_packet;
+ struct packet_header_T *h;
+ int highest_seq = -1;
+
+ if (db1) printf("***> highest_seq_received\n");
+
+ while (p) {
+ /* printf("\nPacket at %x.\n", p);*/
+ /* DecodeSvintoBoot(p->data);*/
+ h = (struct packet_header_T*)p->data;
+ if ((ntohl(h->type) == ACK) && (all_ids || (ntohl(h->id) == id))) {
+ if ((int)ntohl(h->seq) > highest_seq) {
+ highest_seq = ntohl(h->seq);
+ if (db4) printf("Highest seq: %d\n", highest_seq);
+ }
+ }
+ p = p->next;
+ }
+
+ if (db1) printf("***< highest_seq_received: %d\n", highest_seq);
+ return(highest_seq);
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: PrintPacket
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 961022 ronny Initial version
+*#
+*#***************************************************************************/
+
+void
+PrintPacket(const unsigned char *p, int size, int type)
+{
+ int i;
+
+ /* printf("size %d\n", size);*/
+ for (i = 0; i != size; i++) {
+ if (i % p_packet_bpl == 0)
+ printf("\n%-4.4d: ", i);
+ if (type == UDEC)
+ printf("%-3d ", p[i]);
+ else if (type == HEX)
+ printf("%-2.2x ", p[i]);
+ else if (type == CHAR) {
+ if (isprint(p[i]))
+ printf("%-3c ", p[i]);
+ else
+ printf("%-3d ", p[i]);
+ }
+ else if (type == ASCII) {
+ if (isprint(p[i]))
+ printf("%c", p[i]);
+ else
+ printf(".");
+ }
+ }
+ printf("\n");
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: DecodeSvintoBoot
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION: Decodes packets that follow the e100boot protocol.
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 961022 ronny Initial version
+*#
+*#***************************************************************************/
+
+void
+DecodeSvintoBoot(const unsigned char *p)
+{
+ char *str;
+ volatile struct packet_header_T *ph = (struct packet_header_T*)p;
+
+ /* printf("size %d \n", sizeof(struct packet_header_T));*/
+
+ if (db4) printf("\n>DecodeSvintoBoot. Packet at 0x%x\n", (unsigned int)p);
+ if (db1) {
+ printf("%2.2x-%2.2x-%2.2x-%2.2x-%2.2x-%2.2x -> ", p[6],p[7],p[8],p[9],p[10], p[11]);
+ printf("%2.2x-%2.2x-%2.2x-%2.2x-%2.2x-%2.2x\n", p[0],p[1],p[2],p[3],p[4], p[5]);
+
+ printf("length : %4.4lx\n", (long)ntohs(ph->length));
+ printf("snap1 : %8.8lx\n", (long)ntohl(ph->snap1));
+ printf("snap2 : %8.8lx\n", (long)ntohl(ph->snap2));
+
+ switch (ntohl(ph->tag)) {
+ case 0xffffffff:
+ str = "(host > ETRAX)";
+ break;
+ case 0xfffffffe:
+ str = "(host < ETRAX)";
+ break;
+ default:
+ str = "(unknown)";
+ break;
+ }
+ printf("tag : %8.8lx %s\n", (unsigned long)ntohl(ph->tag), str);
+ printf("seq : %8.8lx\n", (unsigned long)ntohl(ph->seq));
+ }
+
+ switch (ntohl(ph->type)) {
+
+ case STRING:
+ str = "(STRING)";
+ fprintf(stderr, "%s", &p[sizeof(struct packet_header_T)]);
+ find_string((char*)&p[sizeof(struct packet_header_T)]);
+ break;
+
+ case NET_INT: {
+ char search_str[20];
+
+ str = "(NET_INT)";
+ sprintf(search_str, "0x%8.8lx", ntohl(*(udword*)&p[sizeof(struct packet_header_T)]));
+ fprintf(stderr, search_str);
+ find_string(search_str);
+ break;
+ }
+
+ case NET_INT_NL: {
+ char search_str[20];
+
+ str = "(NET_INT_NL)";
+ sprintf(search_str, "0x%8.8lx\n", ntohl(*(udword*)&p[sizeof(struct packet_header_T)]));
+ fprintf(stderr, search_str);
+ find_string(search_str);
+ break;
+ }
+
+ case ACK:
+ str = "(ACK)";
+ break;
+
+ case BOOT_PACKET:
+ str = "(bootpacket)";
+ break;
+
+ case BOOT_CMDS:
+ str = "(bootcmds)";
+ break;
+
+ default:
+ str = "(unknown)";
+ break;
+ }
+
+ if (db1) {
+ printf("(type : %8.8lx %s)\n", (unsigned long)ntohl(ph->type), str);
+ printf("(id : %8.8lx)\n", (unsigned long)ntohl(ph->id));
+ id = ntohl(ph->id);
+ }
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: SendToDevice
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 980818 ronny Initial version
+*#
+*#***************************************************************************/
+
+void
+SendToDevice(unsigned char *data, int data_len)
+{
+ char fName[MAX_STRING_LEN];
+ FILE *fd;
+ struct packet_header_T *h = (struct packet_header_T*) data;
+
+ if (db1) printf("***> SendToDevice\n");
+
+ if (db2) printf("Sending %d bytes at 0x%x to %s.\n", data_len, (unsigned int)data, device);
+ if (db1) printf("#TX######################################################\n");
+ if (db1) DecodeSvintoBoot(data);
+
+ if (db1) printf("#########################################################\n");
+ if (toFiles || cmdsOnly) {
+ if (cmdsOnly) { /* use a simpler name */
+ sprintf(fName, "e100boot.cmds");
+ }
+ else {
+ sprintf(fName, "e100boot.seq%lu", (unsigned long)ntohl(h->seq));
+ }
+ if (db2) printf("Writing packet to file '%s'.\n", fName);
+ if ((fd = fopen(fName, "w+")) == NULL) {
+ printf("Cannot open/create '%s'. %s.\n", fName, strerror(errno));
+ exit(EXIT_FAILURE);
+ }
+ fwrite(data, data_len, 1, fd);
+ fclose(fd);
+ }
+ else if (pcap_sendpacket(pd, data, data_len) < 0) {
+ perror("pcap_sendpacket failed!\n");
+ exit(EXIT_FAILURE);
+ }
+
+ if (db1) printf("<*** SendToDevice\n");
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: timeout
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 980817 ronny Initial version
+*#
+*#***************************************************************************/
+
+int
+timeout(struct timeval *tvThen, int ms)
+{
+ struct timeval tvNow;
+ struct timeval tvDiff;
+
+ (void) gettimeofday(&tvNow, NULL);
+ tvDiff = timeval_subtract(&tvNow, tvThen);
+ if (db4) printf("sec %d.%d\n", (int)tvDiff.tv_sec, (int)tvDiff.tv_usec);
+ if (ms * 1000 < (tvDiff.tv_sec * 1000000 + tvDiff.tv_usec)) {
+ if (db4) printf("TIMEOUT\n");
+ return(TRUE);
+ }
+
+ return(FALSE);
+}
+
+/****************************************************************************
+ *#
+ *# FUNCTION NAME: timeval_subtract
+ *#
+ *# PARAMETERS:
+ *#
+ *# DESCRIPTION: Subtract x-y, and return result.
+ *#
+ *# DATE NAME CHANGES
+ *# ---- ---- -------
+ *# 970128 ronny Initial version
+ *#
+ *#***************************************************************************/
+
+struct timeval
+timeval_subtract(struct timeval *x, struct timeval *y)
+{
+ struct timeval diff;
+
+ diff.tv_sec = x->tv_sec - y->tv_sec;
+ diff.tv_usec = x->tv_usec - y->tv_usec;
+
+ if (diff.tv_usec < 0) {
+ diff.tv_sec--;
+ diff.tv_usec = 1000000 + diff.tv_usec;
+ }
+
+ return diff;
+}
+
+int
+gettimeofday(struct timeval *tv, void* tz_void)
+{
+ struct _timeb tb;
+ _ftime(&tb);
+ tv->tv_sec = tb.time;
+ tv->tv_usec = tb.millitm * 1000;
+ return 0;
+}
--- /dev/null
+
+sendserial: sendserial.c
+ gcc -Wall -g -o sendserial sendserial.c
--- /dev/null
+#include <termios.h>
+#include <unistd.h>
+#include <stdio.h>
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <sys/time.h>
+#include <sys/types.h>
+#include <signal.h>
+#include <fcntl.h>
+#include <string.h>
+#include <ctype.h>
+
+#define TRUE 1
+#define FALSE 0
+
+#define db1 0
+#define db2 0
+#define db3 0
+#define db4 0
+
+#define XON ('\11')
+#define XOFF ('\13')
+
+#define START_STR_SIZE 100
+#define SERIAL_BUF_SIZE 1
+
+int GetNumberOption (int *argNr, int argCount, char *argVect[], int *ret, char *option);
+int GetStringOption (int *argNr, int argCount, char *argVect[], char *ret, char *option);
+int WaitForRead (int s, int usecs);
+int WaitForWrite (int s, int usecs);
+int SetupSerial ();
+int SetInputMode (FILE *fd, int value, int onoff);
+int SetControlMode (FILE *fd, int value, int onoff);
+int SetLocalMode (FILE *fd, int value, int onoff);
+void ParseArgs (int argc, char *argv[]);
+
+FILE *modemFd;
+char dev[100] = "/dev/ttyS0";
+char filename[100] = "";
+char serial_buf[SERIAL_BUF_SIZE];
+int baudRates[] = {0, 50, 75, 110, 134, 150, 200, 300, 600,
+ 1200, 1800, 2400, 4800, 9600, 19200, 38400, 57600, 115200};
+int check = FALSE;
+int dotime = FALSE;
+int got_start = TRUE;
+int loop = FALSE;
+int crtcts = FALSE;
+int do_print = TRUE;
+int received;
+int set_baudrate = 9600;
+int xonxoff = FALSE;
+struct timeval start;
+struct timeval stop;
+
+
+int
+main(int argc, char *argv[])
+{
+ FILE *fd;
+ char *buf;
+ int ret;
+ struct stat st;
+
+ ParseArgs(argc, argv);
+ SetupSerial();
+
+ if (strcmp(filename, "") != 0) {
+
+ /* Read file. */
+ if ((fd = fopen(filename, "r")) == NULL) {
+ perror("Can't open file\n");
+ exit(0);
+ }
+
+ if (fstat(fileno(fd), &st) != 0) {
+ perror("stat failed\n");
+ exit(0);
+ }
+
+ buf = malloc(st.st_size);
+ if (fread(buf, 1, st.st_size, fd) != st.st_size) {
+ printf("fread failed\n");
+ }
+
+ fclose(fd);
+
+ printf("# sendserial transmitting %d bytes at baudrate %d.\n", (int)st.st_size, set_baudrate);
+ printf("# transmitting...\n");
+ /* Write file. */
+ {
+ int tr_len = 0;
+ int rec_len = 0;
+ char rec_buf[1000];
+ int connected = 0;
+
+ // while (tr_len != st.st_size) {
+ while (1) {
+ if (WaitForRead(fileno(modemFd), 0)) {
+ if((rec_len = fread(rec_buf, 1, 1, modemFd)) > 0) {
+ if (!connected++) {
+ printf("# connected!\n");
+ }
+ fwrite(rec_buf, rec_len, 1, stdout);
+ }
+ }
+ if (tr_len < st.st_size) {
+ while (!(WaitForWrite(fileno(modemFd), 1000000))) { }
+ fwrite(&buf[tr_len], 1, 1, modemFd);
+ tr_len++;
+ }
+ else if (tr_len++ == st.st_size) {
+ printf("# ...transmission done.\n");
+ }
+ }
+ }
+
+ exit(0);
+
+ do {
+ ret = fwrite(buf, 1, st.st_size, modemFd);
+ printf("Wrote %d bytes of %d.\n", ret, (int)st.st_size);
+ } while(loop);
+ }
+
+ {
+ int rec_len = 0;
+ char rec_buf[1000];
+
+ while (loop) {
+ if (WaitForRead(fileno(modemFd), 1000000)) {
+ if((rec_len = fread(rec_buf, 1, 1, modemFd)) > 0) {
+ fwrite(rec_buf, rec_len, 1, stdout);
+ }
+ }
+ }
+ }
+
+ return 1;
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: ParseArgs
+*#
+*# PARAMETERS: argc,argv
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 960930 ronny Initial version
+*#
+*#***************************************************************************/
+
+void
+ParseArgs (int argc, char *argv[])
+{
+ int argi;
+
+ for (argi=1; argi < argc; argi++) {
+
+ if (strncmp(argv[argi], "--xonxoff", 9) == 0) {
+ printf("xonxoff\n");
+ xonxoff = TRUE;
+ }
+
+ else if (strncmp(argv[argi], "--crtcts", 8) == 0) {
+ printf("crtcts\n");
+ crtcts = TRUE;
+ }
+
+ else if (strncmp(argv[argi], "--loop", 6) == 0) {
+ printf("loop\n");
+ loop = TRUE;
+ }
+
+ else if (strncmp(argv[argi], "--time", 6) == 0) {
+ dotime = TRUE;
+ got_start = FALSE;
+ }
+
+ else if (strncmp(argv[argi], "--check", 6) == 0) {
+ check = TRUE;
+ }
+
+ else if (strncmp(argv[argi], "--noprint", 9) == 0) {
+ do_print = FALSE;
+ }
+
+ else if (strncmp(argv[argi], "--device", 8) == 0) {
+ if (GetStringOption (&argi, argc, argv, dev, "--device") == 0) {
+ printf("--device name\n");
+ exit(0);
+ }
+ }
+
+ else if (strncmp(argv[argi], "--file", 6) == 0) {
+ if (GetStringOption (&argi, argc, argv, filename, "--file") == 0) {
+ printf("--file name\n");
+ exit(0);
+ }
+ }
+
+ else if (strncmp(argv[argi], "--baudrate", 10) == 0) {
+ if (GetNumberOption (&argi, argc, argv, &set_baudrate, "--baudrate") == 0) {
+ printf("--baudrate baudrate\n");
+ exit(0);
+ }
+ }
+ else {
+ printf("'%s' unknown command\n", argv[argi]);
+ printf("\nsendserial --file fname [--device dname] [--baudrate baudrate] [--xonxoff] [--crtcts]\n\n");
+ printf("%dbps on %s default. No handshake.\n", set_baudrate, dev);
+ exit(1);
+ }
+ }
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: GetNumberOption
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 960930 ronny Initial version
+*#
+*#***************************************************************************/
+
+int
+GetNumberOption(int *argNr, int argCount, char *argVect[], int *ret, char *option)
+{
+ int startChar = strlen(option);
+
+ if (strlen(argVect[*argNr]) <= (unsigned int) startChar) {
+ (*argNr)++;
+ startChar = 0;
+ }
+
+ if (*argNr > argCount) {
+ printf("ERROR! The option '%s' needs a number argument.\n", option);
+ return (0);
+ }
+
+ *ret = atoi(&argVect[*argNr][startChar]);
+ return (1);
+
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: GetStringOption
+*#
+*# PARAMETERS: int *argNr : Returns next argc here.
+*# int argCount : Index of last argument.
+*# char *argVect[] : argv.
+*# char *ret : Copy string here.
+*# char *option : Name of the option.
+*#
+*# DESCRIPTION: Extracts a string option from argv, and updates argnr.
+*# Returns TRUE/FALSE and string in *ret.
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 960930 ronny Initial version
+*# 961203 ronny Handles filenames with spaces within 'file name'.
+*#
+*#***************************************************************************/
+
+int
+GetStringOption(int *argNr, int argCount, char *argVect[], char *ret, char *option)
+{
+ int startChar = strlen(option);
+ char tmp[256];
+
+ strcpy(ret, "");
+
+ /* Are there any more chars after option? If not skip to next argv. */
+ if (strlen(argVect[*argNr]) <= (unsigned int)startChar) {
+ (*argNr)++;
+ startChar = 0;
+ }
+
+ /* Any args left? */
+ if (*argNr >= argCount) {
+ printf("ERROR! The option '%s' needs a string argument.\n", option);
+ return (FALSE);
+ }
+
+ strcpy(ret, &argVect[*argNr][startChar]);
+
+ if (ret[0] == '\'' || ret[0] == '\"') {
+ if (db3) printf("Inside string\n");
+ strcpy(tmp, &ret[1]);
+ do {
+ if (tmp[strlen(tmp) - 1 ] == '\'' || tmp[strlen(tmp) - 1] == '\"') {
+ tmp[strlen(tmp) - 1] = '\0';
+ break;
+ }
+
+ (*argNr)++;
+
+ if (*argNr >= argCount) {
+ printf("ERROR! Mismatched ' or \" in options.\n");
+ return (FALSE);
+ }
+
+ strcat(tmp, &argVect[*argNr][0]);
+ if (db3) printf("tmp %s\n", tmp);
+ } while (1);
+
+ strcpy(ret, tmp);
+ }
+ if (db4) printf("<<< GetStringOption %s\n", ret);
+ return (TRUE);
+
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: SetupSerial
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 970325 ronny Initial version
+*#
+*#***************************************************************************/
+
+int
+SetupSerial()
+{
+
+ struct termios ti;
+ int baudrate;
+
+ if ((modemFd = fopen(dev, "r+")) == NULL) {
+ perror("Can't open modem\n");
+ return(FALSE);
+ }
+
+ /* Important. Remember this!!!!!!! */
+ /* setvbuf(modemFd, NULL, _IONBF, 0); */
+
+ setvbuf(modemFd, NULL, _IONBF, 0);
+ setvbuf(stdout, NULL, _IONBF, 0);
+
+ if (fcntl(fileno(modemFd), F_SETFL, O_NONBLOCK) == -1) {
+ perror("fcntl: ");
+ exit(0);
+ }
+
+ tcflush(fileno(modemFd), TCIOFLUSH);
+
+ if (tcgetattr (fileno(modemFd), &ti)) {
+ perror("tcgetattr");
+ return(FALSE);
+ }
+
+ if (db4) printf("VTIME:%d\n", ti.c_cc[VTIME]);
+ if (db4) printf("VMIN:%d\n", ti.c_cc[VMIN]);
+
+ ti.c_cc[VMIN] = 1;
+ ti.c_cc[VTIME] = 0;
+ ti.c_cc[VSTART] = XON;
+ ti.c_cc[VSTOP] = XOFF;
+
+ if (tcsetattr (fileno(modemFd), TCSANOW, &ti)) {
+ perror("tcsetattr");
+ return(FALSE);
+ }
+
+ //if (db3) printf("outspeed: %d, inspeed: %d\n", baudRates[cfgetospeed(&ti)], baudRates[cfgetispeed(&ti)]);
+ {
+ int new_baudrate = 0;
+
+ if (set_baudrate <= 50) {
+ baudrate = B50;
+ new_baudrate = 50;
+ }
+ else if (set_baudrate <= 75) {
+ baudrate = B75;
+ new_baudrate = 75;
+ }
+ else if (set_baudrate <= 110) {
+ baudrate = B110;
+ new_baudrate = 110;
+ }
+ else if (set_baudrate <= 134) {
+ baudrate = B134;
+ new_baudrate = 134;
+ }
+ else if (set_baudrate <= 150) {
+ baudrate = B150;
+ new_baudrate = 150;
+ }
+ else if (set_baudrate <= 200) {
+ baudrate = B200;
+ new_baudrate = 200;
+ }
+ else if (set_baudrate <= 300) {
+ baudrate = B300;
+ new_baudrate = 300;
+ }
+ else if (set_baudrate <= 600) {
+ baudrate = B600;
+ new_baudrate = 600;
+ }
+ else if (set_baudrate <= 1200) {
+ baudrate = B1200;
+ new_baudrate = 1200;
+ }
+ else if (set_baudrate <= 1800) {
+ baudrate = B1800;
+ new_baudrate = 1800;
+ }
+ else if (set_baudrate <= 2400) {
+ baudrate = B2400;
+ new_baudrate = 2400;
+ }
+ else if (set_baudrate <= 4800) {
+ baudrate = B4800;
+ new_baudrate = 4800;
+ }
+ else if (set_baudrate <= 9600) {
+ baudrate = B9600;
+ new_baudrate = 9600;
+ }
+ else if (set_baudrate <= 19200) {
+ baudrate = B19200;
+ new_baudrate = 19200;
+ }
+ else if (set_baudrate <= 38400)
+ baudrate = B38400;
+#if defined (B57600) /* POSIX only defines >= 38400 */
+ else if (set_baudrate <= 57600) {
+ baudrate = B57600;
+ new_baudrate = 57600;
+ }
+#endif
+#if defined (B115200)
+ else if (set_baudrate <= 115200) {
+ baudrate = B115200;
+ new_baudrate = 115200;
+ }
+#endif
+#if defined (B230400)
+ else if (set_baudrate <= 230400) {
+ baudrate = B230400;
+ new_baudrate = 230400;
+ }
+#endif
+ else {
+ baudrate = B38400;
+ }
+
+ cfsetispeed(&ti, B9600);
+ cfsetospeed(&ti, baudrate);
+ tcsetattr(fileno(modemFd), TCSANOW, &ti);
+
+ // printf("* baudrate set to %d\n", new_baudrate);
+ set_baudrate = new_baudrate;
+
+ if (db3) printf("outspeed: %d, inspeed: %d\n", baudRates[cfgetospeed(&ti)], baudRates[cfgetispeed(&ti)]);
+ }
+
+ cfmakeraw(&ti);
+
+ SetInputMode(modemFd, IXON, FALSE);
+ SetInputMode(modemFd, IXOFF, xonxoff); /* input */
+ SetInputMode(modemFd, IXANY, FALSE);
+ SetInputMode(modemFd, ICRNL, FALSE);
+ SetInputMode(modemFd, IGNPAR, TRUE);
+ SetInputMode(modemFd, IGNBRK, TRUE);
+ SetInputMode(modemFd, IGNPAR, TRUE);
+ SetInputMode(modemFd, INPCK, FALSE);
+
+ SetLocalMode(modemFd, ECHO, FALSE);
+ SetLocalMode(modemFd, ISIG, FALSE);
+
+ SetLocalMode(modemFd, ICANON, FALSE);
+
+ SetControlMode(modemFd, PARENB, FALSE);
+ SetControlMode(modemFd, CLOCAL, TRUE);
+
+ /* Disable hardware flow control. */
+#if defined(CRTSCTS)
+
+ SetControlMode(modemFd, CRTSCTS, crtcts);
+#if defined(CRTSXOFF)
+ SetControlMode(modemFd, CRTSXOFF, crtcts);
+#endif
+
+#elif defined(CCTS_OFLOW)
+
+ SetControlMode(modemFd, CCTS_OFLOW, crtcts);
+ SetControlMode(modemFd, CRTS_IFLOW, crtcts);
+
+#elif defined(CNEW_RTSCTS)
+
+ SetControlMode(modemFd, CNEW_RTSCTS, crtcts);
+
+#else
+ printf("Cannot set hardware flow control. Set it manually with a terminal program.\n");
+#endif
+
+ return(TRUE);
+
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: SetInputMode
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 970325 ronny Initial version
+*#
+*#***************************************************************************/
+
+int
+SetInputMode (FILE *fd, int value, int onoff)
+{
+ struct termios settings;
+ int result;
+
+ result = tcgetattr(fileno(fd), &settings);
+ if (result < 0)
+ {
+ perror ("error in tcgetattr");
+ return (FALSE);
+ }
+
+ if (onoff)
+ settings.c_iflag |= value;
+ else
+ settings.c_iflag &= ~value;
+
+ result = tcsetattr(fileno(fd), TCSANOW, &settings);
+ if (result < 0)
+ {
+ perror ("error in tcgetattr");
+ return(FALSE);
+ }
+
+ return 1;
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: SetControlMode
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 970325 ronny Initial version
+*#
+*#***************************************************************************/
+
+int
+SetControlMode (FILE *fd, int value, int onoff)
+{
+
+#if !defined(_WIN32)
+
+ struct termios settings;
+ int result;
+
+ result = tcgetattr (fileno(fd), &settings);
+ if (result < 0)
+ {
+ perror ("error in tcgetattr");
+ return (FALSE);
+ }
+
+ if (onoff)
+ settings.c_cflag |= value;
+ else
+ settings.c_cflag &= ~value;
+
+ result = tcsetattr (fileno(fd), TCSANOW, &settings);
+ if (result < 0)
+ {
+ perror ("error in tcgetattr");
+ return(FALSE);
+ }
+
+#endif
+
+ return (TRUE);
+}
+/****************************************************************************
+*#
+*# FUNCTION NAME: SetLocalMode
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 970325 ronny Initial version
+*#
+*#***************************************************************************/
+
+int
+SetLocalMode (FILE *fd, int value, int onoff)
+{
+
+#if !defined(_WIN32)
+
+ struct termios settings;
+ int result;
+
+ result = tcgetattr (fileno(fd), &settings);
+ if (result < 0)
+ {
+ perror ("error in tcgetattr");
+ return (FALSE);
+ }
+
+ if (onoff)
+ settings.c_lflag |= value;
+ else
+ settings.c_lflag &= ~value;
+
+ result = tcsetattr (fileno(fd), TCSANOW, &settings);
+ if (result < 0)
+ {
+ perror ("error in tcgetattr");
+ return(FALSE);
+ }
+
+#endif
+
+ return (TRUE);
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: WaitForRead
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 961001 ronny Initial version
+*# 971204 ronny usecs was a only one tenth of what it should be.
+*#
+*#***************************************************************************/
+
+int
+WaitForRead(int s, int usecs)
+{
+ fd_set mask;
+ int ret;
+ struct timeval tm;
+
+ tm.tv_sec = usecs/1000000;
+ tm.tv_usec = usecs%1000000;
+
+ FD_ZERO(&mask);
+ FD_SET(s, &mask);
+
+ if ((ret = select(FD_SETSIZE, &mask, NULL, NULL, &tm)) == -1) {
+ printf("<<< select failed with return: %d.\n", ret);
+ return(FALSE);
+ }
+ else {
+ if (db3) printf("* select returned OK:%d\n", ret);
+ }
+
+ if (FD_ISSET(s, &mask) == 0) {
+ if (db2) printf("<<< WaitForRead. No data to read.\n");
+ return (FALSE);
+ }
+
+ if (db3) printf("<<< WaitForRead OK. Returned:%d.\n", ret);
+
+ return(TRUE);
+}
+
+/****************************************************************************
+*#
+*# FUNCTION NAME: WaitForWrite
+*#
+*# PARAMETERS:
+*#
+*# DESCRIPTION:
+*#
+*#---------------------------------------------------------------------------
+*# HISTORY
+*#
+*# DATE NAME CHANGES
+*# ---- ---- -------
+*# 2000-11-20 ronny Initial version
+*#
+*#***************************************************************************/
+
+int
+WaitForWrite(int s, int usecs)
+{
+ fd_set mask;
+ int ret;
+ struct timeval tm;
+
+ tm.tv_sec = usecs/1000000;
+ tm.tv_usec = usecs%1000000;
+
+ FD_ZERO(&mask);
+ FD_SET(s, &mask);
+
+ if ((ret = select(FD_SETSIZE, NULL, &mask, NULL, &tm)) == -1) {
+ printf("<<< select failed with return: %d.\n", ret);
+ return(FALSE);
+ }
+ else {
+ if (db3) printf("* select returned OK:%d\n", ret);
+ }
+
+ if (FD_ISSET(s, &mask) == 0) {
+ if (db2) printf("<<< WaitForWrite. No data to read.\n");
+ return (FALSE);
+ }
+
+ if (db3) printf("<<< WaitForWrite OK. Returned:%d.\n", ret);
+
+ return(TRUE);
+}
+
--- /dev/null
+#
+# Copyright (C) 2006 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+# $Id$
+
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/kernel.mk
+
+PKG_NAME:=mkfimage
+PKG_VERSION:=0.1
+PKG_RELEASE:=1
+
+PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)
+
+include $(INCLUDE_DIR)/package.mk
+
+define Build/Compile
+ mkdir -p $(PKG_BUILD_DIR)
+ cp -r ./src/* $(PKG_BUILD_DIR)
+ make -C $(PKG_BUILD_DIR)
+endef
+
+define Build/InstallDev
+ $(INSTALL_BIN) $(PKG_BUILD_DIR)/mkfimage $(STAGING_DIR)/bin/mkfimage
+endef
+
+$(eval $(call Build/DefaultTargets))
--- /dev/null
+
+all: mkfimage
+ gcc mkfimage.c -o mkfimage
+
--- /dev/null
+#include <stdio.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <unistd.h>
+#include <string.h>
+#include <stdlib.h>
+
+int main(int argc, char **argv){
+ unsigned char *buffer = malloc(64 * 1024);
+ struct stat s;
+ unsigned int size_vmlinux = 0, real_size_vmlinux = 0;
+ const unsigned char *magic_str = "ACME_PART_MAGIC";
+ unsigned int loop;
+ unsigned char *magic;
+
+ if(argc != 3){
+ printf("%s in out\n", argv[0]);
+ return 1;
+ }
+
+ printf("Generating image\n");
+
+ FILE *vmlinux = fopen(argv[1], "r");
+ FILE *vmlinux_out = fopen(argv[2], "w");
+ if((!vmlinux) || (!vmlinux_out)){
+ printf("Error opening a file\n");
+ return 1;
+ }
+
+ stat(argv[1], &s);
+ size_vmlinux = s.st_size;
+ real_size_vmlinux = (size_vmlinux & 0xffff0000) + 0x10000;
+
+ printf("vmlinux = 0x%.08X / 0x%.08X\n", size_vmlinux, real_size_vmlinux);
+
+ unsigned int t = fread(buffer, 1, 64 * 1024, vmlinux);
+ for(loop = 0; loop < (64 * 1024) - sizeof(magic_str); loop++){
+ if(buffer[loop] == magic_str[0]){
+ if((magic = strstr(&buffer[loop], magic_str))){
+ printf("Magic at 0x%.08X %p %p\n", magic - buffer, magic, buffer);
+ printf("Found Magic %X%X%X%X\n",
+ buffer[loop + strlen(magic_str)],
+ buffer[loop + strlen(magic_str) + 2],
+ buffer[loop + strlen(magic_str) + 1],
+ buffer[loop + strlen(magic_str) + 3]);
+
+ buffer[loop + strlen(magic_str)] = real_size_vmlinux >> 24;
+ buffer[loop + strlen(magic_str) + 2] = (real_size_vmlinux >> 16) & 0xff;
+ buffer[loop + strlen(magic_str) + 1] = (real_size_vmlinux >> 8) & 0xff;
+ buffer[loop + strlen(magic_str) + 3] = (real_size_vmlinux) & 0xff;
+
+ printf("Replaced with %.02X%.02X%.02X%.02X\n",
+ buffer[loop + strlen(magic_str)],
+ buffer[loop + strlen(magic_str) + 2],
+ buffer[loop + strlen(magic_str) + 1],
+ buffer[loop + strlen(magic_str) + 3]);
+
+ }
+ }
+ }
+
+ fwrite(buffer, 1, 64 * 1024, vmlinux_out);
+ real_size_vmlinux -= 64 * 1024;
+ do {
+ real_size_vmlinux -= 64 * 1024;
+ memset(buffer, 0, 64 * 1024);
+ fread(buffer, 1, 64 * 1024, vmlinux);
+ fwrite(buffer, 1, 64 * 1024, vmlinux_out);
+ } while (real_size_vmlinux);
+
+ return 0;
+}
--- /dev/null
+diff -urN linux-2.6.19.2.old/include/asm-cris/Kbuild linux-2.6.19.2.dev/include/asm-cris/Kbuild
+--- linux-2.6.19.2.old/include/asm-cris/Kbuild 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/Kbuild 2007-02-09 16:51:34.000000000 +0100
+@@ -3,3 +3,6 @@
+ header-y += arch-v10/ arch-v32/
+
+ unifdef-y += rs485.h
++unifdef-y += ethernet.h
++unifdef-y += etraxgpio.h
++unifdef-y += rtc.h
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v10/Kbuild linux-2.6.19.2.dev/include/asm-cris/arch-v10/Kbuild
+--- linux-2.6.19.2.old/include/asm-cris/arch-v10/Kbuild 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v10/Kbuild 2007-02-26 21:03:05.000000000 +0100
+@@ -1,2 +1,5 @@
+ header-y += ptrace.h
+ header-y += user.h
++header-y += svinto.h
++header-y += sv_addr_ag.h
++header-y += sv_addr.agh
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v10/bug.h linux-2.6.19.2.dev/include/asm-cris/arch-v10/bug.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v10/bug.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v10/bug.h 2006-06-21 10:29:16.000000000 +0200
+@@ -0,0 +1,66 @@
++#ifndef __ASM_CRIS_ARCH_BUG_H
++#define __ASM_CRIS_ARCH_BUG_H
++
++#include <linux/stringify.h>
++
++#ifdef CONFIG_BUG
++#ifdef CONFIG_DEBUG_BUGVERBOSE
++/* The BUG() macro is used for marking obviously incorrect code paths.
++ * It will cause a message with the file name and line number to be printed,
++ * and then cause an oops. The message is actually printed by handle_BUG()
++ * in arch/cris/kernel/traps.c, and the reason we use this method of storing
++ * the file name and line number is that we do not want to affect the registers
++ * by calling printk() before causing the oops.
++ */
++
++#define BUG_PREFIX 0x0D7F
++#define BUG_MAGIC 0x00001234
++
++struct bug_frame {
++ unsigned short prefix;
++ unsigned int magic;
++ unsigned short clear;
++ unsigned short movu;
++ unsigned short line;
++ unsigned short jump;
++ unsigned char* filename;
++};
++
++#if 0
++/* Unfortunately this version of the macro does not work due to a problem
++ * with the compiler (aka a bug) when compiling with -O2, which sometimes
++ * erroneously causes the second input to be stored in a register...
++ */
++#define BUG() \
++ __asm__ __volatile__ ("clear.d [" __stringify(BUG_MAGIC) "]\n\t"\
++ "movu.w %0,$r0\n\t" \
++ "jump %1\n\t" \
++ : : "i" (__LINE__), "i" (__FILE__))
++#else
++/* This version will have to do for now, until the compiler is fixed.
++ * The drawbacks of this version are that the file name will appear multiple
++ * times in the .rodata section, and that __LINE__ and __FILE__ can probably
++ * not be used like this with newer versions of gcc.
++ */
++#define BUG() \
++ __asm__ __volatile__ ("clear.d [" __stringify(BUG_MAGIC) "]\n\t"\
++ "movu.w " __stringify(__LINE__) ",$r0\n\t"\
++ "jump 0f\n\t" \
++ ".section .rodata\n" \
++ "0:\t.string \"" __FILE__ "\"\n\t" \
++ ".previous")
++#endif
++
++#else
++
++/* This just causes an oops. */
++#define BUG() (*(int *)0 = 0)
++
++#endif
++
++#define HAVE_ARCH_BUG
++#endif
++
++#include <asm-generic/bug.h>
++
++#endif
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v10/ide.h linux-2.6.19.2.dev/include/asm-cris/arch-v10/ide.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v10/ide.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v10/ide.h 2005-08-23 11:44:36.000000000 +0200
+@@ -32,7 +32,7 @@
+ * together in a hwgroup, and will serialize accesses. this is good, because
+ * we can't access more than one interface at the same time on ETRAX100.
+ */
+- return 4;
++ return 4;
+ }
+
+ static inline unsigned long ide_default_io_base(int index)
+@@ -61,15 +61,15 @@
+ /* fill in ports for ATA addresses 0 to 7 */
+
+ for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
+- hw->io_ports[i] = data_port |
+- IO_FIELD(R_ATA_CTRL_DATA, addr, i) |
++ hw->io_ports[i] = data_port |
++ IO_FIELD(R_ATA_CTRL_DATA, addr, i) |
+ IO_STATE(R_ATA_CTRL_DATA, cs0, active);
+ }
+
+ /* the IDE control register is at ATA address 6, with CS1 active instead of CS0 */
+
+ hw->io_ports[IDE_CONTROL_OFFSET] = data_port |
+- IO_FIELD(R_ATA_CTRL_DATA, addr, 6) |
++ IO_FIELD(R_ATA_CTRL_DATA, addr, 6) |
+ IO_STATE(R_ATA_CTRL_DATA, cs1, active);
+
+ /* whats this for ? */
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v10/io.h linux-2.6.19.2.dev/include/asm-cris/arch-v10/io.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v10/io.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v10/io.h 2007-03-06 12:16:16.000000000 +0100
+@@ -56,6 +56,9 @@
+ #define LED_RED 0x02
+ #define LED_ORANGE (LED_GREEN | LED_RED)
+
++#if defined(CONFIG_ETRAX_NO_LEDS)
++#define LED_NETWORK_SET(x)
++#else
+ #if CONFIG_ETRAX_LED1G == CONFIG_ETRAX_LED1R
+ #define LED_NETWORK_SET(x) \
+ do { \
+@@ -80,6 +83,7 @@
+ LED_ACTIVE_SET_R((x) & LED_RED); \
+ } while (0)
+ #endif
++#endif
+
+ #ifdef CONFIG_ETRAX_PA_LEDS
+ #define LED_NETWORK_SET_G(x) \
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v10/juliette.h linux-2.6.19.2.dev/include/asm-cris/arch-v10/juliette.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v10/juliette.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v10/juliette.h 2004-06-03 11:28:57.000000000 +0200
+@@ -0,0 +1,328 @@
++#ifndef _ASM_JULIETTE_H
++#define _ASM_JULIETTE_H
++
++#include <asm/arch/svinto.h>
++
++/* juliette _IOC_TYPE, bits 8 to 15 in ioctl cmd */
++
++#define JULIOCTYPE 42
++
++/* supported ioctl _IOC_NR's */
++
++#define JULSTARTDMA 0x1 /* start a picture asynchronously */
++
++/* set parameters */
++
++#define SETDEFAULT 0x2 /* CCD/VIDEO/SS1M */
++#define SETPARAMETERS 0x3 /* CCD/VIDEO */
++#define SETSIZE 0x4 /* CCD/VIDEO/SS1M */
++#define SETCOMPRESSION 0x5 /* CCD/VIDEO/SS1M */
++#define SETCOLORLEVEL 0x6 /* CCD/VIDEO */
++#define SETBRIGHTNESS 0x7 /* CCD */
++#define SETROTATION 0x8 /* CCD */
++#define SETTEXT 0x9 /* CCD/VIDEO/SS1M */
++#define SETCLOCK 0xa /* CCD/VIDEO/SS1M */
++#define SETDATE 0xb /* CCD/VIDEO/SS1M */
++#define SETTIMEFORMAT 0xc /* CCD/VIDEO/SS1M */
++#define SETDATEFORMAT 0xd /* VIDEO */
++#define SETTEXTALIGNMENT 0xe /* VIDEO */
++#define SETFPS 0xf /* CCD/VIDEO/SS1M */
++#define SETVGA 0xff /* VIDEO */
++#define SETCOMMENT 0xfe /* CCD/VIDEO */
++
++/* get parameters */
++
++#define GETDRIVERTYPE 0x10 /* CCD/VIDEO/SS1M */
++#define GETNBROFCAMERAS 0x11 /* CCD/VIDEO/SS1M */
++#define GETPARAMETERS 0x12 /* CCD/VIDEO/SS1M */
++#define GETBUFFERSIZE 0x13 /* CCD/VIDEO/SS1M */
++#define GETVIDEOTYPE 0x14 /* VIDEO/SS1M */
++#define GETVIDEOSIGNAL 0x15 /* VIDEO */
++#define GETMODULATION 0x16 /* VIDEO */
++#define GETDCYVALUES 0xa0 /* CCD /SS1M */
++#define GETDCYWIDTH 0xa1 /* CCD /SS1M */
++#define GETDCYHEIGHT 0xa2 /* CCD /SS1M */
++#define GETSIZE 0xa3 /* CCD/VIDEO */
++#define GETCOMPRESSION 0xa4 /* CCD/VIDEO */
++
++/* detect and get parameters */
++
++#define DETECTMODULATION 0x17 /* VIDEO */
++#define DETECTVIDEOTYPE 0x18 /* VIDEO */
++#define DETECTVIDEOSIGNAL 0x19 /* VIDEO */
++
++/* configure default parameters */
++
++#define CONFIGUREDEFAULT 0x20 /* CCD/VIDEO/SS1M */
++#define DEFSIZE 0x21 /* CCD/VIDEO/SS1M */
++#define DEFCOMPRESSION 0x22 /* CCD/VIDEO/SS1M */
++#define DEFCOLORLEVEL 0x23 /* CCD/VIDEO */
++#define DEFBRIGHTNESS 0x24 /* CCD */
++#define DEFROTATION 0x25 /* CCD */
++#define DEFWHITEBALANCE 0x26 /* CCD */
++#define DEFEXPOSURE 0x27 /* CCD */
++#define DEFAUTOEXPWINDOW 0x28 /* CCD */
++#define DEFTEXT 0x29 /* CCD/VIDEO/SS1M */
++#define DEFCLOCK 0x2a /* CCD/VIDEO/SS1M */
++#define DEFDATE 0x2b /* CCD/VIDEO/SS1M */
++#define DEFTIMEFORMAT 0x2c /* CCD/VIDEO/SS1M */
++#define DEFDATEFORMAT 0x2d /* VIDEO */
++#define DEFTEXTALIGNMENT 0x2e /* VIDEO */
++#define DEFFPS 0x2f /* CCD/VIDEO/SS1M */
++#define DEFTEXTSTRING 0x30 /* CCD/VIDEO/SS1M */
++#define DEFHEADERINFO 0x31 /* CCD/VIDEO/SS1M */
++#define DEFWEXAR 0x32 /* CCD */
++#define DEFLINEDELAY 0x33 /* CCD */
++#define DEFDISABLEDVIDEO 0x34 /* VIDEO */
++#define DEFVIDEOTYPE 0x35 /* VIDEO */
++#define DEFMODULATION 0x36 /* VIDEO */
++#define DEFXOFFSET 0x37 /* VIDEO */
++#define DEFYOFFSET 0x38 /* VIDEO */
++#define DEFYCMODE 0x39 /* VIDEO */
++#define DEFVCRMODE 0x3a /* VIDEO */
++#define DEFSTOREDCYVALUES 0x3b /* CCD/VIDEO/SS1M */
++#define DEFWCDS 0x3c /* CCD */
++#define DEFVGA 0x3d /* VIDEO */
++#define DEFCOMMENT 0x3e /* CCD/VIDEO */
++#define DEFCOMMENTSIZE 0x3f /* CCD/VIDEO */
++#define DEFCOMMENTTEXT 0x50 /* CCD/VIDEO */
++#define DEFSTOREDCYTEXT 0x51 /* VIDEO */
++
++
++#define JULABORTDMA 0x70 /* Abort current DMA transfer */
++
++/* juliette general i/o port */
++
++#define JIO_READBITS 0x40 /* read and return current port bits */
++#define JIO_SETBITS 0x41 /* set bits marked by 1 in the argument */
++#define JIO_CLRBITS 0x42 /* clr bits marked by 1 in the argument */
++#define JIO_READDIR 0x43 /* read direction, 0=input 1=output */
++#define JIO_SETINPUT 0x44 /* set direction, 0=unchanged 1=input
++ returns current dir */
++#define JIO_SETOUTPUT 0x45 /* set direction, 0=unchanged 1=output
++ returns current dir */
++
++/**** YumYum internal adresses ****/
++
++/* Juliette buffer addresses */
++
++#define BUFFER1_VIDEO 0x1100
++#define BUFFER2_VIDEO 0x2800
++#define ACDC_BUFF_VIDEO 0x0aaa
++#define BUFFER1 0x1700
++#define BUFFER2 0x2b01
++#define ACDC_BUFFER 0x1200
++#define BUFFER1_SS1M 0x1100
++#define BUFFER2_SS1M 0x2800
++#define ACDC_BUFF_SS1M 0x0900
++
++/* Juliette parameter memory addresses */
++
++#define PA_BUFFER_CNT 0x3f09 /* CCD/VIDEO */
++#define PA_CCD_BUFFER 0x3f10 /* CCD */
++#define PA_VIDEO_BUFFER 0x3f10 /* VIDEO */
++#define PA_DCT_BUFFER 0x3f11 /* CCD/VIDEO */
++#define PA_TEMP 0x3f12 /* CCD/VIDEO */
++#define PA_VIDEOLINE_RD 0x3f13 /* VIDEO */
++#define PA_VIDEOLINE_WR 0x3f14 /* VIDEO */
++#define PA_VI_HDELAY0 0x3f15 /* VIDEO */
++#define PA_VI_VDELAY0 0x3f16 /* VIDEO */
++#define PA_VI_HDELAY1 0x3f17 /* VIDEO */
++#define PA_VI_VDELAY1 0x3f18 /* VIDEO */
++#define PA_VI_HDELAY2 0x3f19 /* VIDEO */
++#define PA_VI_VDELAY2 0x3f1a /* VIDEO */
++#define PA_VI_HDELAY3 0x3f1b /* VIDEO */
++#define PA_VI_VDELAY3 0x3f1c /* VIDEO */
++#define PA_VI_CTRL 0x3f20 /* VIDEO */
++#define PA_JPEG_CTRL 0x3f22 /* CCD/VIDEO */
++#define PA_BUFFER_SIZE 0x3f24 /* CCD/VIDEO */
++#define PA_PAL_NTSC 0x3f25 /* VIDEO */
++#define PA_MACROBLOCKS 0x3f26 /* CCD/VIDEO */
++#define PA_COLOR 0x3f27 /* VIDEO */
++#define PA_MEMCH1CNT2 0x3f28 /* CCD/VIDEO */
++#define PA_MEMCH1CNT3 0x3f29 /* VIDEO */
++#define PA_MEMCH1STR2 0x3f2a /* CCD/VIDEO */
++#define PA_MEMCH1STR3 0x3f2b /* VIDEO */
++#define PA_BUFFERS 0x3f2c /* CCD/VIDEO */
++#define PA_PROGRAM 0x3f2d /* CCD/VIDEO */
++#define PA_ROTATION 0x3f2e /* CCD */
++#define PA_PC 0x3f30 /* CCD/VIDEO */
++#define PA_PC2 0x3f31 /* VIDEO */
++#define PA_ODD_LINE 0x3f32 /* VIDEO */
++#define PA_EXP_DELAY 0x3f34 /* CCD */
++#define PA_MACROBLOCK_CNT 0x3f35 /* CCD/VIDEO */
++#define PA_DRAM_PTR1_L 0x3f36 /* CCD/VIDEO */
++#define PA_CLPOB_CNT 0x3f37 /* CCD */
++#define PA_DRAM_PTR1_H 0x3f38 /* CCD/VIDEO */
++#define PA_DRAM_PTR2_L 0x3f3a /* VIDEO */
++#define PA_DRAM_PTR2_H 0x3f3c /* VIDEO */
++#define PA_CCD_LINE_CNT 0x3f3f /* CCD */
++#define PA_VIDEO_LINE_CNT 0x3f3f /* VIDEO */
++#define PA_TEXT 0x3f41 /* CCD/VIDEO */
++#define PA_CAMERA_CHANGED 0x3f42 /* VIDEO */
++#define PA_TEXTALIGNMENT 0x3f43 /* VIDEO */
++#define PA_DISABLED 0x3f44 /* VIDEO */
++#define PA_MACROBLOCKTEXT 0x3f45 /* VIDEO */
++#define PA_VGA 0x3f46 /* VIDEO */
++#define PA_ZERO 0x3ffe /* VIDEO */
++#define PA_NULL 0x3fff /* CCD/VIDEO */
++
++typedef enum {
++ jpeg = 0,
++ dummy = 1
++} request_type;
++
++typedef enum {
++ hugesize = 0,
++ fullsize = 1,
++ halfsize = 2,
++ fieldsize = 3
++} size_type;
++
++typedef enum {
++ min = 0,
++ low = 1,
++ medium = 2,
++ high = 3,
++ very_high = 4,
++ very_low = 5,
++ q1 = 6,
++ q2 = 7,
++ q3 = 8,
++ q4 = 9,
++ q5 = 10,
++ q6 = 11
++} compr_type;
++
++typedef enum {
++ deg_0 = 0,
++ deg_180 = 1,
++ deg_90 = 2,
++ deg_270 = 3
++} rotation_type;
++
++typedef enum {
++ auto_white = 0,
++ hold = 1,
++ fixed_outdoor = 2,
++ fixed_indoor = 3,
++ fixed_fluor = 4
++} white_balance_type;
++
++typedef enum {
++ auto_exp = 0,
++ fixed_exp = 1
++} exposure_type;
++
++typedef enum {
++ no_window = 0,
++ center = 1,
++ top = 2,
++ lower = 3,
++ left = 4,
++ right = 5,
++ spot = 6,
++ cw = 7
++} exp_window_type;
++
++typedef enum {
++ h_24 = 0,
++ h_12 = 1,
++ h_24P = 2
++} hour_type;
++
++typedef enum {
++ standard = 0,
++ YYYY_MM_DD = 1,
++ Www_Mmm_DD_YYYY = 2,
++ Www_DD_MM_YYYY = 3
++} date_type;
++
++typedef enum {
++ left_align = 0,
++ center_align = 1,
++ right_align = 2
++} alignment_type;
++
++typedef enum {
++ off = 0,
++ on = 1,
++ no = 0,
++ yes = 1
++} enable_type;
++
++typedef enum {
++ disabled = 0,
++ enabled = 1,
++ extended = 2
++} comment_type;
++
++typedef enum {
++ pal = 0,
++ ntsc = 1
++} video_type;
++
++typedef enum {
++ pal_bghi_ntsc_m = 0,
++ ntsc_4_43_50hz_pal_4_43_60hz = 1,
++ pal_n_ntsc_4_43_60hz = 2,
++ ntsc_n_pal_m = 3,
++ secam_pal_4_43_60hz = 4
++} modulation_type;
++
++typedef enum {
++ cam0 = 0,
++ cam1 = 1,
++ cam2 = 2,
++ cam3 = 3,
++ quad = 32
++} camera_type;
++
++typedef enum {
++ video_driver = 0,
++ ccd_driver = 1
++} driver_type;
++
++struct jul_param {
++ request_type req_type;
++ size_type size;
++ compr_type compression;
++ rotation_type rotation;
++ int color_level;
++ int brightness;
++ white_balance_type white_balance;
++ exposure_type exposure;
++ exp_window_type auto_exp_window;
++ hour_type time_format;
++ date_type date_format;
++ alignment_type text_alignment;
++ enable_type text;
++ enable_type clock;
++ enable_type date;
++ enable_type fps;
++ enable_type vga;
++ enable_type comment;
++};
++
++struct video_param {
++ enable_type disabled;
++ modulation_type modulation;
++ video_type video;
++ enable_type signal;
++ enable_type vcr;
++ int xoffset;
++ int yoffset;
++};
++
++/* The juliette_request structure is used during the JULSTARTDMA asynchronous
++ * picture-taking ioctl call as an argument to specify a buffer which will get
++ * the final picture.
++ */
++
++struct juliette_request {
++ char *buf; /* Pointer to the buffer to hold picture data */
++ unsigned int buflen; /* Length of the above buffer */
++ unsigned int size; /* Resulting length, 0 if the picture is not ready */
++};
++
++#endif
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/Kbuild linux-2.6.19.2.dev/include/asm-cris/arch-v32/Kbuild
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/Kbuild 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/Kbuild 2007-02-09 16:51:34.000000000 +0100
+@@ -1,2 +1,3 @@
+ header-y += ptrace.h
+ header-y += user.h
++header-y += cryptocop.h
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/arbiter.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/arbiter.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/arbiter.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/arbiter.h 2006-10-13 14:45:18.000000000 +0200
+@@ -22,6 +22,7 @@
+
+ int crisv32_arbiter_allocate_bandwidth(int client, int region,
+ unsigned long bandwidth);
++void crisv32_arbiter_deallocate_bandwidth(int client, int region);
+ int crisv32_arbiter_watch(unsigned long start, unsigned long size,
+ unsigned long clients, unsigned long accesses,
+ watch_callback* cb);
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/bitops.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/bitops.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/bitops.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/bitops.h 2005-08-23 11:44:37.000000000 +0200
+@@ -16,7 +16,7 @@
+ __asm__ __volatile__ ("swapnwbr %0\n\t"
+ "lz %0,%0"
+ : "=r" (res) : "0" (w));
+-
++
+ return res;
+ }
+
+@@ -28,7 +28,7 @@
+ __asm__ __volatile__ ("swapwbr %0\n\t"
+ "lz %0,%0"
+ : "=r" (res) : "0" (w));
+-
++
+ return res;
+ }
+
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/board.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/board.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/board.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/board.h 2007-01-29 15:05:01.000000000 +0100
+@@ -0,0 +1,74 @@
++/*
++ * linux/include/asm-cris/arch-v32/board.h
++ *
++ * Types for board-specific data.
++ *
++ * Copyright (C) 2007 Axis Communications AB
++ */
++
++#ifndef __ARCH_V32_BOARD_H
++#define __ARCH_V32_BOARD_H
++
++/* A tuple for a regi base and an interrupt. */
++struct crisv32_regi_n_int {
++ u32 regi;
++ u32 irq;
++};
++
++/*
++ * SPI and SD/MMC types, arranged such that the data for mmc_spi is an
++ * add-on to SPI; the SPI data does not contain anything about SD/MMC
++ * and the SPI controller driver can't access it. SPI data is
++ * arranged to allow sharing common functions between SSER and GPIO.
++ */
++
++/* Hardware identification for the bitbanged GPIO SPI controller. */
++struct crisv32_spi_gpio_controller_data {
++ /* Names of the pins. */
++ const char *cs;
++ const char *miso;
++ const char *mosi;
++ const char *sclk;
++};
++
++/* Similar for the SSER SPI controller. */
++struct crisv32_spi_sser_controller_data {
++ /* How to connect pins and claim the SSER interface and the DMA
++ channels. */
++ int (*iface_allocate)(struct crisv32_regi_n_int *sser,
++ struct crisv32_regi_n_int *dmain,
++ struct crisv32_regi_n_int *dmaout);
++ void (*iface_free)(void);
++
++ /* Whether DMA is to be used. */
++ int using_dma;
++};
++
++struct crisv32_mmc_spi_pinstate;
++
++/*
++ * Regardless of SPI controller, these pins are needed in addition to
++ * the SPI pins when the used as a SD/MMC SPI controller.
++ */
++struct crisv32_mmc_spi_pindata {
++ /* Names of the pins. */
++ const char *card_detect;
++ const char *write_protect;
++
++ /* Related private state to interface to the mmc_spi API. */
++ struct crisv32_mmc_spi_pinstate *pinstate;
++};
++
++/* When SD/MMC SPI on GPIO, here's all the hardware-identifying data. */
++struct crisv32_mmc_spi_gpio_hwdata {
++ struct crisv32_spi_gpio_controller_data spi;
++ struct crisv32_mmc_spi_pindata mmc;
++};
++
++/* Similar for SSER. */
++struct crisv32_mmc_spi_sser_hwdata {
++ struct crisv32_spi_sser_controller_data spi;
++ struct crisv32_mmc_spi_pindata mmc;
++};
++
++#endif /* __ARCH_V32_BOARD_H */
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/bug.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/bug.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/bug.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/bug.h 2006-06-21 10:29:16.000000000 +0200
+@@ -0,0 +1,69 @@
++#ifndef __ASM_CRIS_ARCH_BUG_H
++#define __ASM_CRIS_ARCH_BUG_H
++
++#include <linux/stringify.h>
++
++#ifdef CONFIG_BUG
++#ifdef CONFIG_DEBUG_BUGVERBOSE
++/* The BUG() macro is used for marking obviously incorrect code paths.
++ * It will cause a message with the file name and line number to be printed,
++ * and then cause an oops. The message is actually printed by handle_BUG()
++ * in arch/cris/kernel/traps.c, and the reason we use this method of storing
++ * the file name and line number is that we do not want to affect the registers
++ * by calling printk() before causing the oops (this is not entirely true
++ * for CRISv32 since we need to modify the $acr register).
++ */
++
++#define BUG_PREFIX 0xFE6F
++#define BUG_MAGIC 0x00001234
++
++struct bug_frame {
++ unsigned short prefix;
++ unsigned int magic;
++ unsigned short clear;
++ unsigned short movu;
++ unsigned short line;
++ unsigned short jump;
++ unsigned char* filename;
++};
++
++#if 0
++/* Unfortunately this version of the macro does not work due to a problem
++ * with the compiler (aka a bug) when compiling with -O2, which sometimes
++ * erroneously causes the second input to be stored in a register...
++ */
++#define BUG() \
++ __asm__ __volatile__ ("move.d [" __stringify(BUG_MAGIC) "],$acr\n\t"\
++ "clear.d [$acr]\n\t" \
++ "movu.w %0,$r0\n\t" \
++ "jump %1\n\t" \
++ : : "i" (__LINE__), "i" (__FILE__))
++#else
++/* This version will have to do for now, until the compiler is fixed.
++ * The drawbacks of this version are that the file name will appear multiple
++ * times in the .rodata section, and that __LINE__ and __FILE__ can probably
++ * not be used like this with newer versions of gcc.
++ */
++#define BUG() \
++ __asm__ __volatile__ ("move.d " __stringify(BUG_MAGIC) ",$acr\n\t"\
++ "clear.d [$acr]\n\t" \
++ "movu.w " __stringify(__LINE__) ",$r0\n\t"\
++ "jump 0f\n\t" \
++ ".section .rodata\n" \
++ "0:\t.string \"" __FILE__ "\"\n\t" \
++ ".previous")
++#endif
++
++#else
++
++/* This just causes an oops. */
++#define BUG() (*(int *)0 = 0)
++
++#endif
++
++#define HAVE_ARCH_BUG
++#endif
++
++#include <asm-generic/bug.h>
++
++#endif
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/cache.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/cache.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/cache.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/cache.h 2007-01-05 09:59:53.000000000 +0100
+@@ -1,8 +1,19 @@
+ #ifndef _ASM_CRIS_ARCH_CACHE_H
+ #define _ASM_CRIS_ARCH_CACHE_H
+
++#include <asm/arch/hwregs/dma.h>
++
+ /* A cache-line is 32 bytes. */
+ #define L1_CACHE_BYTES 32
+ #define L1_CACHE_SHIFT 5
+
++void flush_dma_list(dma_descr_data* descr);
++void flush_dma_descr(dma_descr_data* descr, int flush_buf);
++
++#define flush_dma_context(c) \
++ flush_dma_list(phys_to_virt((c)->saved_data));
++
++void cris_flush_cache_range(void* buf, unsigned long len);
++void cris_flush_cache(void);
++
+ #endif /* _ASM_CRIS_ARCH_CACHE_H */
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/cryptocop.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/cryptocop.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/cryptocop.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/cryptocop.h 2005-04-20 14:33:25.000000000 +0200
+@@ -160,7 +160,7 @@
+ cryptocop_source_dma = 0,
+ cryptocop_source_des,
+ cryptocop_source_3des,
+- cryptocop_source_aes,
++ cryptocop_source_aes,
+ cryptocop_source_md5,
+ cryptocop_source_sha1,
+ cryptocop_source_csum,
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/delay.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/delay.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/delay.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/delay.h 2006-10-11 19:46:19.000000000 +0200
+@@ -1,6 +1,16 @@
+ #ifndef _ASM_CRIS_ARCH_DELAY_H
+ #define _ASM_CRIS_ARCH_DELAY_H
+
++extern void cris_delay10ns(u32 n10ns);
++#define udelay(u) cris_delay10ns((u)*100)
++#define ndelay(n) cris_delay10ns(((n)+9)/10)
++
++/*
++ * Not used anymore for udelay or ndelay. Referenced by
++ * e.g. init/calibrate.c. All other references are likely bugs;
++ * should be replaced by mdelay, udelay or ndelay.
++ */
++
+ static inline void
+ __delay(int loops)
+ {
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/dma.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/dma.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/dma.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/dma.h 2005-05-02 12:43:02.000000000 +0200
+@@ -67,7 +67,7 @@
+ dma_ext3
+ };
+
+-int crisv32_request_dma(unsigned int dmanr, const char * device_id,
++int crisv32_request_dma(unsigned int dmanr, const char * device_id,
+ unsigned options, unsigned bandwidth, enum dma_owner owner);
+ void crisv32_free_dma(unsigned int dmanr);
+
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/Makefile linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/Makefile
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/Makefile 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/Makefile 2004-01-07 22:16:18.000000000 +0100
+@@ -126,9 +126,9 @@
+
+ # From /n/asic/projects/guinness/design/
+ reg_map.h: $(DESIGNDIR)/top/rtl/global.rmap $(DESIGNDIR)/top/mod/modreg.rmap
+- $(RDES2C) -base 0xb0000000 $^
++ $(RDES2C) -base 0xb0000000 $^
+ reg_map_asm.h: $(DESIGNDIR)/top/rtl/global.rmap $(DESIGNDIR)/top/mod/modreg.rmap
+- $(RDES2C) -base 0xb0000000 -asm -outfile $@ $^
++ $(RDES2C) -base 0xb0000000 -asm -outfile $@ $^
+
+ reg_rdwr.h: $(DESIGNDIR)/top/sw/include/reg_rdwr.h
+ cat $< | sed -e 's/\$$Id\:/id\:/g' >$@
+@@ -171,14 +171,14 @@
+ done
+
+ .PHONY: axw
+-## %.axw - Generate the specified .axw file (doesn't work for all files
++## %.axw - Generate the specified .axw file (doesn't work for all files
+ ## due to inconsistent naming ir .r files.
+ %.axw: axw
+ @for RDES in $(REGDESC); do \
+ if echo "$$RDES" | grep $* ; then \
+ $(RDES2TXT) $$RDES; \
+ fi \
+- done
++ done
+
+ .PHONY: clean
+ ## clean - Remove .h files and .axw files.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/ata_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/ata_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/ata_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/ata_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/ata/rtl/ata_regs.r
+- * id: ata_regs.r,v 1.11 2005/02/09 08:27:36 kriskn Exp
++ * id: ata_regs.r,v 1.11 2005/02/09 08:27:36 kriskn Exp
+ * last modfied: Mon Apr 11 16:06:25 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/ata_defs_asm.h ../../inst/ata/rtl/ata_regs.r
+ * id: $Id: ata_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/bif_core_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/bif_core_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/bif_core_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/bif_core_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/bif/rtl/bif_core_regs.r
+- * id: bif_core_regs.r,v 1.17 2005/02/04 13:28:22 np Exp
++ * id: bif_core_regs.r,v 1.17 2005/02/04 13:28:22 np Exp
+ * last modfied: Mon Apr 11 16:06:33 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/bif_core_defs_asm.h ../../inst/bif/rtl/bif_core_regs.r
+ * id: $Id: bif_core_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/bif_dma_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/bif_dma_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/bif_dma_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/bif_dma_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/bif/rtl/bif_dma_regs.r
+- * id: bif_dma_regs.r,v 1.6 2005/02/04 13:28:31 perz Exp
++ * id: bif_dma_regs.r,v 1.6 2005/02/04 13:28:31 perz Exp
+ * last modfied: Mon Apr 11 16:06:33 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/bif_dma_defs_asm.h ../../inst/bif/rtl/bif_dma_regs.r
+ * id: $Id: bif_dma_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/bif_slave_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/bif_slave_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/bif_slave_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/bif_slave_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/bif/rtl/bif_slave_regs.r
+- * id: bif_slave_regs.r,v 1.5 2005/02/04 13:55:28 perz Exp
++ * id: bif_slave_regs.r,v 1.5 2005/02/04 13:55:28 perz Exp
+ * last modfied: Mon Apr 11 16:06:34 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/bif_slave_defs_asm.h ../../inst/bif/rtl/bif_slave_regs.r
+ * id: $Id: bif_slave_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/config_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/config_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/config_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/config_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../rtl/config_regs.r
+- * id: config_regs.r,v 1.23 2004/03/04 11:34:42 mikaeln Exp
++ * id: config_regs.r,v 1.23 2004/03/04 11:34:42 mikaeln Exp
+ * last modfied: Thu Mar 4 12:34:39 2004
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/config_defs_asm.h ../../rtl/config_regs.r
+ * id: $Id: config_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/cpu_vect.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/cpu_vect.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/cpu_vect.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/cpu_vect.h 2005-04-24 20:31:04.000000000 +0200
+@@ -3,7 +3,7 @@
+ version . */
+
+ #ifndef _______INST_CRISP_DOC_CPU_VECT_R
+-#define _______INST_CRISP_DOC_CPU_VECT_R
++#define _______INST_CRISP_DOC_CPU_VECT_R
+ #define NMI_INTR_VECT 0x00
+ #define RESERVED_1_INTR_VECT 0x01
+ #define RESERVED_2_INTR_VECT 0x02
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/cris_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/cris_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/cris_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/cris_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/crisp/doc/cris.r
+- * id: cris.r,v 1.6 2004/05/05 07:41:12 perz Exp
++ * id: cris.r,v 1.6 2004/05/05 07:41:12 perz Exp
+ * last modfied: Mon Apr 11 16:06:39 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/cris_defs_asm.h ../../inst/crisp/doc/cris.r
+ * id: $Id: cris_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/dma_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/dma_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/dma_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/dma_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/dma/inst/dma_common/rtl/dma_regdes.r
+- * id: dma_regdes.r,v 1.39 2005/02/10 14:07:23 janb Exp
++ * id: dma_regdes.r,v 1.39 2005/02/10 14:07:23 janb Exp
+ * last modfied: Mon Apr 11 16:06:51 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/dma_defs_asm.h ../../inst/dma/inst/dma_common/rtl/dma_regdes.r
+ * id: $Id: dma_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/eth_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/eth_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/eth_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/eth_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/eth/rtl/eth_regs.r
+- * id: eth_regs.r,v 1.11 2005/02/09 10:48:38 kriskn Exp
++ * id: eth_regs.r,v 1.11 2005/02/09 10:48:38 kriskn Exp
+ * last modfied: Mon Apr 11 16:07:03 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/eth_defs_asm.h ../../inst/eth/rtl/eth_regs.r
+ * id: $Id: eth_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/gio_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/gio_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/gio_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/gio_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/gio/rtl/gio_regs.r
+- * id: gio_regs.r,v 1.5 2005/02/04 09:43:21 perz Exp
++ * id: gio_regs.r,v 1.5 2005/02/04 09:43:21 perz Exp
+ * last modfied: Mon Apr 11 16:07:47 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/gio_defs_asm.h ../../inst/gio/rtl/gio_regs.r
+ * id: $Id: gio_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/intr_vect.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/intr_vect.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/intr_vect.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/intr_vect.h 2005-04-24 20:31:04.000000000 +0200
+@@ -3,7 +3,7 @@
+ version . */
+
+ #ifndef _______INST_INTR_VECT_RTL_GUINNESS_IVMASK_CONFIG_R
+-#define _______INST_INTR_VECT_RTL_GUINNESS_IVMASK_CONFIG_R
++#define _______INST_INTR_VECT_RTL_GUINNESS_IVMASK_CONFIG_R
+ #define MEMARB_INTR_VECT 0x31
+ #define GEN_IO_INTR_VECT 0x32
+ #define IOP0_INTR_VECT 0x33
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/intr_vect_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/intr_vect_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/intr_vect_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/intr_vect_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/intr_vect/rtl/guinness/ivmask.config.r
+- * id: ivmask.config.r,v 1.4 2005/02/15 16:05:38 stefans Exp
++ * id: ivmask.config.r,v 1.4 2005/02/15 16:05:38 stefans Exp
+ * last modfied: Mon Apr 11 16:08:03 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/intr_vect_defs_asm.h ../../inst/intr_vect/rtl/guinness/ivmask.config.r
+ * id: $Id: intr_vect_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/irq_nmi_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/irq_nmi_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/irq_nmi_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/irq_nmi_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../mod/irq_nmi.r
+ * id: <not found>
+ * last modfied: Thu Jan 22 09:22:43 2004
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/irq_nmi_defs_asm.h ../../mod/irq_nmi.r
+ * id: $Id: irq_nmi_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/marb_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/marb_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/marb_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/marb_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/memarb/rtl/guinness/marb_top.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:12:16 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/marb_defs_asm.h ../../inst/memarb/rtl/guinness/marb_top.r
+ * id: $Id: marb_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
+ * Any changes here will be lost.
+@@ -313,7 +313,7 @@
+ * file: ../../inst/memarb/rtl/guinness/marb_top.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:12:16 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/marb_defs_asm.h ../../inst/memarb/rtl/guinness/marb_top.r
+ * id: $Id: marb_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/mmu_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/mmu_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/mmu_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/mmu_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/mmu/doc/mmu_regs.r
+- * id: mmu_regs.r,v 1.12 2004/05/06 13:48:45 mikaeln Exp
++ * id: mmu_regs.r,v 1.12 2004/05/06 13:48:45 mikaeln Exp
+ * last modfied: Mon Apr 11 17:03:20 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/mmu_defs_asm.h ../../inst/mmu/doc/mmu_regs.r
+ * id: $Id: mmu_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/pinmux_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/pinmux_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/pinmux_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/pinmux_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/pinmux/rtl/guinness/pinmux_regs.r
+- * id: pinmux_regs.r,v 1.40 2005/02/09 16:22:59 perz Exp
++ * id: pinmux_regs.r,v 1.40 2005/02/09 16:22:59 perz Exp
+ * last modfied: Mon Apr 11 16:09:11 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/pinmux_defs_asm.h ../../inst/pinmux/rtl/guinness/pinmux_regs.r
+ * id: $Id: pinmux_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/reg_map_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/reg_map_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/reg_map_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/reg_map_asm.h 2005-04-24 20:31:04.000000000 +0200
+@@ -4,17 +4,17 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../mod/fakereg.rmap
+- * id: fakereg.rmap,v 1.3 2004/02/11 19:53:22 ronny Exp
++ * id: fakereg.rmap,v 1.3 2004/02/11 19:53:22 ronny Exp
+ * last modified: Wed Feb 11 20:53:25 2004
+ * file: ../../rtl/global.rmap
+- * id: global.rmap,v 1.3 2003/08/18 15:08:23 mikaeln Exp
++ * id: global.rmap,v 1.3 2003/08/18 15:08:23 mikaeln Exp
+ * last modified: Mon Aug 18 17:08:23 2003
+ * file: ../../mod/modreg.rmap
+- * id: modreg.rmap,v 1.31 2004/02/20 15:40:04 stefans Exp
++ * id: modreg.rmap,v 1.31 2004/02/20 15:40:04 stefans Exp
+ * last modified: Fri Feb 20 16:40:04 2004
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/reg_map_asm.h -base 0xb0000000 ../../rtl/global.rmap ../../mod/modreg.rmap ../../inst/memarb/rtl/guinness/marb_top.r ../../mod/fakereg.rmap
+- * id: $Id: reg_map_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
++ * id: $Id: reg_map_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
+ * Any changes here will be lost.
+ *
+ * -*- buffer-read-only: t -*-
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/rt_trace_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/rt_trace_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/rt_trace_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/rt_trace_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/rt_trace/rtl/rt_regs.r
+- * id: rt_regs.r,v 1.18 2005/02/08 15:45:00 stefans Exp
++ * id: rt_regs.r,v 1.18 2005/02/08 15:45:00 stefans Exp
+ * last modfied: Mon Apr 11 16:09:14 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/rt_trace_defs_asm.h ../../inst/rt_trace/rtl/rt_regs.r
+ * id: $Id: rt_trace_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/ser_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/ser_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/ser_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/ser_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/ser/rtl/ser_regs.r
+- * id: ser_regs.r,v 1.23 2005/02/08 13:58:35 perz Exp
++ * id: ser_regs.r,v 1.23 2005/02/08 13:58:35 perz Exp
+ * last modfied: Mon Apr 11 16:09:21 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/ser_defs_asm.h ../../inst/ser/rtl/ser_regs.r
+ * id: $Id: ser_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/sser_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/sser_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/sser_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/sser_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/syncser/rtl/sser_regs.r
+- * id: sser_regs.r,v 1.24 2005/02/11 14:27:36 gunnard Exp
++ * id: sser_regs.r,v 1.24 2005/02/11 14:27:36 gunnard Exp
+ * last modfied: Mon Apr 11 16:09:48 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/sser_defs_asm.h ../../inst/syncser/rtl/sser_regs.r
+ * id: $Id: sser_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/strcop_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/strcop_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/strcop_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/strcop_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/strcop/rtl/strcop_regs.r
+- * id: strcop_regs.r,v 1.5 2003/10/15 12:09:45 kriskn Exp
++ * id: strcop_regs.r,v 1.5 2003/10/15 12:09:45 kriskn Exp
+ * last modfied: Mon Apr 11 16:09:38 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/strcop_defs_asm.h ../../inst/strcop/rtl/strcop_regs.r
+ * id: $Id: strcop_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/strmux_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/strmux_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/strmux_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/strmux_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/strmux/rtl/guinness/strmux_regs.r
+- * id: strmux_regs.r,v 1.10 2005/02/10 10:10:46 perz Exp
++ * id: strmux_regs.r,v 1.10 2005/02/10 10:10:46 perz Exp
+ * last modfied: Mon Apr 11 16:09:43 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/strmux_defs_asm.h ../../inst/strmux/rtl/guinness/strmux_regs.r
+ * id: $Id: strmux_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/timer_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/timer_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/asm/timer_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/asm/timer_defs_asm.h 2005-04-24 20:31:04.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/timer/rtl/timer_regs.r
+- * id: timer_regs.r,v 1.7 2003/03/11 11:16:59 perz Exp
++ * id: timer_regs.r,v 1.7 2003/03/11 11:16:59 perz Exp
+ * last modfied: Mon Apr 11 16:09:53 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/timer_defs_asm.h ../../inst/timer/rtl/timer_regs.r
+ * id: $Id: timer_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/ata_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/ata_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/ata_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/ata_defs.h 2005-04-24 20:30:58.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/ata/rtl/ata_regs.r
+- * id: ata_regs.r,v 1.11 2005/02/09 08:27:36 kriskn Exp
++ * id: ata_regs.r,v 1.11 2005/02/09 08:27:36 kriskn Exp
+ * last modfied: Mon Apr 11 16:06:25 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile ata_defs.h ../../inst/ata/rtl/ata_regs.r
+ * id: $Id: ata_defs.h,v 1.7 2005/04/24 18:30:58 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/bif_core_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/bif_core_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/bif_core_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/bif_core_defs.h 2005-04-24 20:30:58.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/bif/rtl/bif_core_regs.r
+- * id: bif_core_regs.r,v 1.17 2005/02/04 13:28:22 np Exp
++ * id: bif_core_regs.r,v 1.17 2005/02/04 13:28:22 np Exp
+ * last modfied: Mon Apr 11 16:06:33 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile bif_core_defs.h ../../inst/bif/rtl/bif_core_regs.r
+ * id: $Id: bif_core_defs.h,v 1.3 2005/04/24 18:30:58 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/bif_dma_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/bif_dma_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/bif_dma_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/bif_dma_defs.h 2005-04-24 20:30:58.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/bif/rtl/bif_dma_regs.r
+- * id: bif_dma_regs.r,v 1.6 2005/02/04 13:28:31 perz Exp
++ * id: bif_dma_regs.r,v 1.6 2005/02/04 13:28:31 perz Exp
+ * last modfied: Mon Apr 11 16:06:33 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile bif_dma_defs.h ../../inst/bif/rtl/bif_dma_regs.r
+ * id: $Id: bif_dma_defs.h,v 1.2 2005/04/24 18:30:58 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/bif_slave_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/bif_slave_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/bif_slave_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/bif_slave_defs.h 2005-04-24 20:30:58.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/bif/rtl/bif_slave_regs.r
+- * id: bif_slave_regs.r,v 1.5 2005/02/04 13:55:28 perz Exp
++ * id: bif_slave_regs.r,v 1.5 2005/02/04 13:55:28 perz Exp
+ * last modfied: Mon Apr 11 16:06:34 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile bif_slave_defs.h ../../inst/bif/rtl/bif_slave_regs.r
+ * id: $Id: bif_slave_defs.h,v 1.2 2005/04/24 18:30:58 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/config_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/config_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/config_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/config_defs.h 2005-04-24 20:30:58.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../rtl/config_regs.r
+- * id: config_regs.r,v 1.23 2004/03/04 11:34:42 mikaeln Exp
++ * id: config_regs.r,v 1.23 2004/03/04 11:34:42 mikaeln Exp
+ * last modfied: Thu Mar 4 12:34:39 2004
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile config_defs.h ../../rtl/config_regs.r
+ * id: $Id: config_defs.h,v 1.6 2005/04/24 18:30:58 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/cpu_vect.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/cpu_vect.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/cpu_vect.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/cpu_vect.h 2005-04-24 20:30:58.000000000 +0200
+@@ -3,7 +3,7 @@
+ version . */
+
+ #ifndef _______INST_CRISP_DOC_CPU_VECT_R
+-#define _______INST_CRISP_DOC_CPU_VECT_R
++#define _______INST_CRISP_DOC_CPU_VECT_R
+ #define NMI_INTR_VECT 0x00
+ #define RESERVED_1_INTR_VECT 0x01
+ #define RESERVED_2_INTR_VECT 0x02
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/dma.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/dma.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/dma.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/dma.h 2006-06-25 17:01:59.000000000 +0200
+@@ -1,6 +1,6 @@
+-/* $Id: dma.h,v 1.7 2005/04/24 18:30:58 starvik Exp $
++/* $Id: dma.h,v 1.8 2006/06/25 15:01:59 starvik Exp $
+ *
+- * DMA C definitions and help macros
++ * DMA C definitions and help macros
+ *
+ */
+
+@@ -98,10 +98,10 @@
+
+ // give stream command
+ #define DMA_WR_CMD( inst, cmd_par ) \
+- do { reg_dma_rw_stream_cmd r = {0}; \
+- do { r = REG_RD( dma, inst, rw_stream_cmd ); } while( r.busy ); \
+- r.cmd = (cmd_par); \
+- REG_WR( dma, inst, rw_stream_cmd, r ); \
++ do { reg_dma_rw_stream_cmd __x = {0}; \
++ do { __x = REG_RD( dma, inst, rw_stream_cmd ); } while( __x.busy ); \
++ __x.cmd = (cmd_par); \
++ REG_WR( dma, inst, rw_stream_cmd, __x ); \
+ } while( 0 )
+
+ // load: g,c,d:burst
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/dma_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/dma_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/dma_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/dma_defs.h 2005-04-24 20:30:58.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/dma/inst/dma_common/rtl/dma_regdes.r
+- * id: dma_regdes.r,v 1.39 2005/02/10 14:07:23 janb Exp
++ * id: dma_regdes.r,v 1.39 2005/02/10 14:07:23 janb Exp
+ * last modfied: Mon Apr 11 16:06:51 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile dma_defs.h ../../inst/dma/inst/dma_common/rtl/dma_regdes.r
+ * id: $Id: dma_defs.h,v 1.7 2005/04/24 18:30:58 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/eth_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/eth_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/eth_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/eth_defs.h 2006-01-26 14:45:30.000000000 +0100
+@@ -3,12 +3,12 @@
+
+ /*
+ * This file is autogenerated from
+- * file: ../../inst/eth/rtl/eth_regs.r
+- * id: eth_regs.r,v 1.11 2005/02/09 10:48:38 kriskn Exp
+- * last modfied: Mon Apr 11 16:07:03 2005
+- *
+- * by /n/asic/design/tools/rdesc/src/rdes2c --outfile eth_defs.h ../../inst/eth/rtl/eth_regs.r
+- * id: $Id: eth_defs.h,v 1.6 2005/04/24 18:30:58 starvik Exp $
++ * file: eth.r
++ * id: eth_regs.r,v 1.16 2005/05/20 15:41:22 perz Exp
++ * last modfied: Mon Jan 9 06:06:41 2006
++ *
++ * by /n/asic/design/tools/rdesc/rdes2c eth.r
++ * id: $Id: eth_defs.h,v 1.7 2006/01/26 13:45:30 karljope Exp $
+ * Any changes here will be lost.
+ *
+ * -*- buffer-read-only: t -*-
+@@ -116,26 +116,28 @@
+
+ /* Register rw_ga_lo, scope eth, type rw */
+ typedef struct {
+- unsigned int table : 32;
++ unsigned int tbl : 32;
+ } reg_eth_rw_ga_lo;
+ #define REG_RD_ADDR_eth_rw_ga_lo 16
+ #define REG_WR_ADDR_eth_rw_ga_lo 16
+
+ /* Register rw_ga_hi, scope eth, type rw */
+ typedef struct {
+- unsigned int table : 32;
++ unsigned int tbl : 32;
+ } reg_eth_rw_ga_hi;
+ #define REG_RD_ADDR_eth_rw_ga_hi 20
+ #define REG_WR_ADDR_eth_rw_ga_hi 20
+
+ /* Register rw_gen_ctrl, scope eth, type rw */
+ typedef struct {
+- unsigned int en : 1;
+- unsigned int phy : 2;
+- unsigned int protocol : 1;
+- unsigned int loopback : 1;
+- unsigned int flow_ctrl_dis : 1;
+- unsigned int dummy1 : 26;
++ unsigned int en : 1;
++ unsigned int phy : 2;
++ unsigned int protocol : 1;
++ unsigned int loopback : 1;
++ unsigned int flow_ctrl : 1;
++ unsigned int gtxclk_out : 1;
++ unsigned int phyrst_n : 1;
++ unsigned int dummy1 : 24;
+ } reg_eth_rw_gen_ctrl;
+ #define REG_RD_ADDR_eth_rw_gen_ctrl 24
+ #define REG_WR_ADDR_eth_rw_gen_ctrl 24
+@@ -150,22 +152,23 @@
+ unsigned int oversize : 1;
+ unsigned int bad_crc : 1;
+ unsigned int duplex : 1;
+- unsigned int max_size : 1;
+- unsigned int dummy1 : 23;
++ unsigned int max_size : 16;
++ unsigned int dummy1 : 8;
+ } reg_eth_rw_rec_ctrl;
+ #define REG_RD_ADDR_eth_rw_rec_ctrl 28
+ #define REG_WR_ADDR_eth_rw_rec_ctrl 28
+
+ /* Register rw_tr_ctrl, scope eth, type rw */
+ typedef struct {
+- unsigned int crc : 1;
+- unsigned int pad : 1;
+- unsigned int retry : 1;
+- unsigned int ignore_col : 1;
+- unsigned int cancel : 1;
+- unsigned int hsh_delay : 1;
+- unsigned int ignore_crs : 1;
+- unsigned int dummy1 : 25;
++ unsigned int crc : 1;
++ unsigned int pad : 1;
++ unsigned int retry : 1;
++ unsigned int ignore_col : 1;
++ unsigned int cancel : 1;
++ unsigned int hsh_delay : 1;
++ unsigned int ignore_crs : 1;
++ unsigned int carrier_ext : 1;
++ unsigned int dummy1 : 24;
+ } reg_eth_rw_tr_ctrl;
+ #define REG_RD_ADDR_eth_rw_tr_ctrl 32
+ #define REG_WR_ADDR_eth_rw_tr_ctrl 32
+@@ -180,13 +183,10 @@
+
+ /* Register rw_mgm_ctrl, scope eth, type rw */
+ typedef struct {
+- unsigned int mdio : 1;
+- unsigned int mdoe : 1;
+- unsigned int mdc : 1;
+- unsigned int phyclk : 1;
+- unsigned int txdata : 4;
+- unsigned int txen : 1;
+- unsigned int dummy1 : 23;
++ unsigned int mdio : 1;
++ unsigned int mdoe : 1;
++ unsigned int mdc : 1;
++ unsigned int dummy1 : 29;
+ } reg_eth_rw_mgm_ctrl;
+ #define REG_RD_ADDR_eth_rw_mgm_ctrl 40
+ #define REG_WR_ADDR_eth_rw_mgm_ctrl 40
+@@ -196,17 +196,8 @@
+ unsigned int mdio : 1;
+ unsigned int exc_col : 1;
+ unsigned int urun : 1;
+- unsigned int phyclk : 1;
+- unsigned int txdata : 4;
+- unsigned int txen : 1;
+- unsigned int col : 1;
+- unsigned int crs : 1;
+- unsigned int txclk : 1;
+- unsigned int rxdata : 4;
+- unsigned int rxer : 1;
+- unsigned int rxdv : 1;
+- unsigned int rxclk : 1;
+- unsigned int dummy1 : 13;
++ unsigned int clk_125 : 1;
++ unsigned int dummy1 : 28;
+ } reg_eth_r_stat;
+ #define REG_RD_ADDR_eth_r_stat 44
+
+@@ -274,83 +265,83 @@
+
+ /* Register rw_intr_mask, scope eth, type rw */
+ typedef struct {
+- unsigned int crc : 1;
+- unsigned int align : 1;
+- unsigned int oversize : 1;
+- unsigned int congestion : 1;
+- unsigned int single_col : 1;
+- unsigned int mult_col : 1;
+- unsigned int late_col : 1;
+- unsigned int deferred : 1;
+- unsigned int carrier_loss : 1;
+- unsigned int sqe_test_err : 1;
+- unsigned int orun : 1;
+- unsigned int urun : 1;
+- unsigned int excessive_col : 1;
+- unsigned int mdio : 1;
+- unsigned int dummy1 : 18;
++ unsigned int crc : 1;
++ unsigned int align : 1;
++ unsigned int oversize : 1;
++ unsigned int congestion : 1;
++ unsigned int single_col : 1;
++ unsigned int mult_col : 1;
++ unsigned int late_col : 1;
++ unsigned int deferred : 1;
++ unsigned int carrier_loss : 1;
++ unsigned int sqe_test_err : 1;
++ unsigned int orun : 1;
++ unsigned int urun : 1;
++ unsigned int exc_col : 1;
++ unsigned int mdio : 1;
++ unsigned int dummy1 : 18;
+ } reg_eth_rw_intr_mask;
+ #define REG_RD_ADDR_eth_rw_intr_mask 76
+ #define REG_WR_ADDR_eth_rw_intr_mask 76
+
+ /* Register rw_ack_intr, scope eth, type rw */
+ typedef struct {
+- unsigned int crc : 1;
+- unsigned int align : 1;
+- unsigned int oversize : 1;
+- unsigned int congestion : 1;
+- unsigned int single_col : 1;
+- unsigned int mult_col : 1;
+- unsigned int late_col : 1;
+- unsigned int deferred : 1;
+- unsigned int carrier_loss : 1;
+- unsigned int sqe_test_err : 1;
+- unsigned int orun : 1;
+- unsigned int urun : 1;
+- unsigned int excessive_col : 1;
+- unsigned int mdio : 1;
+- unsigned int dummy1 : 18;
++ unsigned int crc : 1;
++ unsigned int align : 1;
++ unsigned int oversize : 1;
++ unsigned int congestion : 1;
++ unsigned int single_col : 1;
++ unsigned int mult_col : 1;
++ unsigned int late_col : 1;
++ unsigned int deferred : 1;
++ unsigned int carrier_loss : 1;
++ unsigned int sqe_test_err : 1;
++ unsigned int orun : 1;
++ unsigned int urun : 1;
++ unsigned int exc_col : 1;
++ unsigned int mdio : 1;
++ unsigned int dummy1 : 18;
+ } reg_eth_rw_ack_intr;
+ #define REG_RD_ADDR_eth_rw_ack_intr 80
+ #define REG_WR_ADDR_eth_rw_ack_intr 80
+
+ /* Register r_intr, scope eth, type r */
+ typedef struct {
+- unsigned int crc : 1;
+- unsigned int align : 1;
+- unsigned int oversize : 1;
+- unsigned int congestion : 1;
+- unsigned int single_col : 1;
+- unsigned int mult_col : 1;
+- unsigned int late_col : 1;
+- unsigned int deferred : 1;
+- unsigned int carrier_loss : 1;
+- unsigned int sqe_test_err : 1;
+- unsigned int orun : 1;
+- unsigned int urun : 1;
+- unsigned int excessive_col : 1;
+- unsigned int mdio : 1;
+- unsigned int dummy1 : 18;
++ unsigned int crc : 1;
++ unsigned int align : 1;
++ unsigned int oversize : 1;
++ unsigned int congestion : 1;
++ unsigned int single_col : 1;
++ unsigned int mult_col : 1;
++ unsigned int late_col : 1;
++ unsigned int deferred : 1;
++ unsigned int carrier_loss : 1;
++ unsigned int sqe_test_err : 1;
++ unsigned int orun : 1;
++ unsigned int urun : 1;
++ unsigned int exc_col : 1;
++ unsigned int mdio : 1;
++ unsigned int dummy1 : 18;
+ } reg_eth_r_intr;
+ #define REG_RD_ADDR_eth_r_intr 84
+
+ /* Register r_masked_intr, scope eth, type r */
+ typedef struct {
+- unsigned int crc : 1;
+- unsigned int align : 1;
+- unsigned int oversize : 1;
+- unsigned int congestion : 1;
+- unsigned int single_col : 1;
+- unsigned int mult_col : 1;
+- unsigned int late_col : 1;
+- unsigned int deferred : 1;
+- unsigned int carrier_loss : 1;
+- unsigned int sqe_test_err : 1;
+- unsigned int orun : 1;
+- unsigned int urun : 1;
+- unsigned int excessive_col : 1;
+- unsigned int mdio : 1;
+- unsigned int dummy1 : 18;
++ unsigned int crc : 1;
++ unsigned int align : 1;
++ unsigned int oversize : 1;
++ unsigned int congestion : 1;
++ unsigned int single_col : 1;
++ unsigned int mult_col : 1;
++ unsigned int late_col : 1;
++ unsigned int deferred : 1;
++ unsigned int carrier_loss : 1;
++ unsigned int sqe_test_err : 1;
++ unsigned int orun : 1;
++ unsigned int urun : 1;
++ unsigned int exc_col : 1;
++ unsigned int mdio : 1;
++ unsigned int dummy1 : 18;
+ } reg_eth_r_masked_intr;
+ #define REG_RD_ADDR_eth_r_masked_intr 88
+
+@@ -360,12 +351,15 @@
+ regk_eth_discard = 0x00000000,
+ regk_eth_ether = 0x00000000,
+ regk_eth_full = 0x00000001,
++ regk_eth_gmii = 0x00000003,
++ regk_eth_gtxclk = 0x00000001,
+ regk_eth_half = 0x00000000,
+ regk_eth_hsh = 0x00000001,
+ regk_eth_mii = 0x00000001,
++ regk_eth_mii_arec = 0x00000002,
+ regk_eth_mii_clk = 0x00000000,
+- regk_eth_mii_rec = 0x00000002,
+ regk_eth_no = 0x00000000,
++ regk_eth_phyrst = 0x00000000,
+ regk_eth_rec = 0x00000001,
+ regk_eth_rw_ga_hi_default = 0x00000000,
+ regk_eth_rw_ga_lo_default = 0x00000000,
+@@ -377,8 +371,8 @@
+ regk_eth_rw_ma1_lo_default = 0x00000000,
+ regk_eth_rw_mgm_ctrl_default = 0x00000000,
+ regk_eth_rw_test_ctrl_default = 0x00000000,
+- regk_eth_size1518 = 0x00000000,
+- regk_eth_size1522 = 0x00000001,
++ regk_eth_size1518 = 0x000005ee,
++ regk_eth_size1522 = 0x000005f2,
+ regk_eth_yes = 0x00000001
+ };
+ #endif /* __eth_defs_h */
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/eth_defs_fs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/eth_defs_fs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/eth_defs_fs.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/eth_defs_fs.h 2007-02-07 10:36:10.000000000 +0100
+@@ -0,0 +1,384 @@
++#ifndef __eth_defs_h
++#define __eth_defs_h
++
++/*
++ * This file is autogenerated from
++ * file: eth_regs.r
++ * id: eth_regs.r,v 1.17 2006/02/08 16:47:19 perz Exp perz
++ * last modfied: Tue Feb 6 13:57:16 2007
++ *
++ * by /n/asic/design/io/eth/inst/rdesc/rdes2c eth_regs.r
++ * id: $Id: eth_defs_fs.h,v 1.1 2007/02/07 09:36:10 karljope Exp $
++ * Any changes here will be lost.
++ *
++ * -*- buffer-read-only: t -*-
++ */
++/* Main access macros */
++#ifndef REG_RD
++#define REG_RD( scope, inst, reg ) \
++ REG_READ( reg_##scope##_##reg, \
++ (inst) + REG_RD_ADDR_##scope##_##reg )
++#endif
++
++#ifndef REG_WR
++#define REG_WR( scope, inst, reg, val ) \
++ REG_WRITE( reg_##scope##_##reg, \
++ (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
++#endif
++
++#ifndef REG_RD_VECT
++#define REG_RD_VECT( scope, inst, reg, index ) \
++ REG_READ( reg_##scope##_##reg, \
++ (inst) + REG_RD_ADDR_##scope##_##reg + \
++ (index) * STRIDE_##scope##_##reg )
++#endif
++
++#ifndef REG_WR_VECT
++#define REG_WR_VECT( scope, inst, reg, index, val ) \
++ REG_WRITE( reg_##scope##_##reg, \
++ (inst) + REG_WR_ADDR_##scope##_##reg + \
++ (index) * STRIDE_##scope##_##reg, (val) )
++#endif
++
++#ifndef REG_RD_INT
++#define REG_RD_INT( scope, inst, reg ) \
++ REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
++#endif
++
++#ifndef REG_WR_INT
++#define REG_WR_INT( scope, inst, reg, val ) \
++ REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
++#endif
++
++#ifndef REG_RD_INT_VECT
++#define REG_RD_INT_VECT( scope, inst, reg, index ) \
++ REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
++ (index) * STRIDE_##scope##_##reg )
++#endif
++
++#ifndef REG_WR_INT_VECT
++#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
++ REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
++ (index) * STRIDE_##scope##_##reg, (val) )
++#endif
++
++#ifndef REG_TYPE_CONV
++#define REG_TYPE_CONV( type, orgtype, val ) \
++ ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
++#endif
++
++#ifndef reg_page_size
++#define reg_page_size 8192
++#endif
++
++#ifndef REG_ADDR
++#define REG_ADDR( scope, inst, reg ) \
++ ( (inst) + REG_RD_ADDR_##scope##_##reg )
++#endif
++
++#ifndef REG_ADDR_VECT
++#define REG_ADDR_VECT( scope, inst, reg, index ) \
++ ( (inst) + REG_RD_ADDR_##scope##_##reg + \
++ (index) * STRIDE_##scope##_##reg )
++#endif
++
++/* C-code for register scope eth */
++
++/* Register rw_ma0_lo, scope eth, type rw */
++typedef struct {
++ unsigned int addr : 32;
++} reg_eth_rw_ma0_lo;
++#define REG_RD_ADDR_eth_rw_ma0_lo 0
++#define REG_WR_ADDR_eth_rw_ma0_lo 0
++
++/* Register rw_ma0_hi, scope eth, type rw */
++typedef struct {
++ unsigned int addr : 16;
++ unsigned int dummy1 : 16;
++} reg_eth_rw_ma0_hi;
++#define REG_RD_ADDR_eth_rw_ma0_hi 4
++#define REG_WR_ADDR_eth_rw_ma0_hi 4
++
++/* Register rw_ma1_lo, scope eth, type rw */
++typedef struct {
++ unsigned int addr : 32;
++} reg_eth_rw_ma1_lo;
++#define REG_RD_ADDR_eth_rw_ma1_lo 8
++#define REG_WR_ADDR_eth_rw_ma1_lo 8
++
++/* Register rw_ma1_hi, scope eth, type rw */
++typedef struct {
++ unsigned int addr : 16;
++ unsigned int dummy1 : 16;
++} reg_eth_rw_ma1_hi;
++#define REG_RD_ADDR_eth_rw_ma1_hi 12
++#define REG_WR_ADDR_eth_rw_ma1_hi 12
++
++/* Register rw_ga_lo, scope eth, type rw */
++typedef struct {
++ unsigned int table : 32;
++} reg_eth_rw_ga_lo;
++#define REG_RD_ADDR_eth_rw_ga_lo 16
++#define REG_WR_ADDR_eth_rw_ga_lo 16
++
++/* Register rw_ga_hi, scope eth, type rw */
++typedef struct {
++ unsigned int table : 32;
++} reg_eth_rw_ga_hi;
++#define REG_RD_ADDR_eth_rw_ga_hi 20
++#define REG_WR_ADDR_eth_rw_ga_hi 20
++
++/* Register rw_gen_ctrl, scope eth, type rw */
++typedef struct {
++ unsigned int en : 1;
++ unsigned int phy : 2;
++ unsigned int protocol : 1;
++ unsigned int loopback : 1;
++ unsigned int flow_ctrl : 1;
++ unsigned int dummy1 : 26;
++} reg_eth_rw_gen_ctrl;
++#define REG_RD_ADDR_eth_rw_gen_ctrl 24
++#define REG_WR_ADDR_eth_rw_gen_ctrl 24
++
++/* Register rw_rec_ctrl, scope eth, type rw */
++typedef struct {
++ unsigned int ma0 : 1;
++ unsigned int ma1 : 1;
++ unsigned int individual : 1;
++ unsigned int broadcast : 1;
++ unsigned int undersize : 1;
++ unsigned int oversize : 1;
++ unsigned int bad_crc : 1;
++ unsigned int duplex : 1;
++ unsigned int max_size : 1;
++ unsigned int dummy1 : 23;
++} reg_eth_rw_rec_ctrl;
++#define REG_RD_ADDR_eth_rw_rec_ctrl 28
++#define REG_WR_ADDR_eth_rw_rec_ctrl 28
++
++/* Register rw_tr_ctrl, scope eth, type rw */
++typedef struct {
++ unsigned int crc : 1;
++ unsigned int pad : 1;
++ unsigned int retry : 1;
++ unsigned int ignore_col : 1;
++ unsigned int cancel : 1;
++ unsigned int hsh_delay : 1;
++ unsigned int ignore_crs : 1;
++ unsigned int dummy1 : 25;
++} reg_eth_rw_tr_ctrl;
++#define REG_RD_ADDR_eth_rw_tr_ctrl 32
++#define REG_WR_ADDR_eth_rw_tr_ctrl 32
++
++/* Register rw_clr_err, scope eth, type rw */
++typedef struct {
++ unsigned int clr : 1;
++ unsigned int dummy1 : 31;
++} reg_eth_rw_clr_err;
++#define REG_RD_ADDR_eth_rw_clr_err 36
++#define REG_WR_ADDR_eth_rw_clr_err 36
++
++/* Register rw_mgm_ctrl, scope eth, type rw */
++typedef struct {
++ unsigned int mdio : 1;
++ unsigned int mdoe : 1;
++ unsigned int mdc : 1;
++ unsigned int phyclk : 1;
++ unsigned int txdata : 4;
++ unsigned int txen : 1;
++ unsigned int dummy1 : 23;
++} reg_eth_rw_mgm_ctrl;
++#define REG_RD_ADDR_eth_rw_mgm_ctrl 40
++#define REG_WR_ADDR_eth_rw_mgm_ctrl 40
++
++/* Register r_stat, scope eth, type r */
++typedef struct {
++ unsigned int mdio : 1;
++ unsigned int exc_col : 1;
++ unsigned int urun : 1;
++ unsigned int phyclk : 1;
++ unsigned int txdata : 4;
++ unsigned int txen : 1;
++ unsigned int col : 1;
++ unsigned int crs : 1;
++ unsigned int txclk : 1;
++ unsigned int rxdata : 4;
++ unsigned int rxer : 1;
++ unsigned int rxdv : 1;
++ unsigned int rxclk : 1;
++ unsigned int dummy1 : 13;
++} reg_eth_r_stat;
++#define REG_RD_ADDR_eth_r_stat 44
++
++/* Register rs_rec_cnt, scope eth, type rs */
++typedef struct {
++ unsigned int crc_err : 8;
++ unsigned int align_err : 8;
++ unsigned int oversize : 8;
++ unsigned int congestion : 8;
++} reg_eth_rs_rec_cnt;
++#define REG_RD_ADDR_eth_rs_rec_cnt 48
++
++/* Register r_rec_cnt, scope eth, type r */
++typedef struct {
++ unsigned int crc_err : 8;
++ unsigned int align_err : 8;
++ unsigned int oversize : 8;
++ unsigned int congestion : 8;
++} reg_eth_r_rec_cnt;
++#define REG_RD_ADDR_eth_r_rec_cnt 52
++
++/* Register rs_tr_cnt, scope eth, type rs */
++typedef struct {
++ unsigned int single_col : 8;
++ unsigned int mult_col : 8;
++ unsigned int late_col : 8;
++ unsigned int deferred : 8;
++} reg_eth_rs_tr_cnt;
++#define REG_RD_ADDR_eth_rs_tr_cnt 56
++
++/* Register r_tr_cnt, scope eth, type r */
++typedef struct {
++ unsigned int single_col : 8;
++ unsigned int mult_col : 8;
++ unsigned int late_col : 8;
++ unsigned int deferred : 8;
++} reg_eth_r_tr_cnt;
++#define REG_RD_ADDR_eth_r_tr_cnt 60
++
++/* Register rs_phy_cnt, scope eth, type rs */
++typedef struct {
++ unsigned int carrier_loss : 8;
++ unsigned int sqe_err : 8;
++ unsigned int dummy1 : 16;
++} reg_eth_rs_phy_cnt;
++#define REG_RD_ADDR_eth_rs_phy_cnt 64
++
++/* Register r_phy_cnt, scope eth, type r */
++typedef struct {
++ unsigned int carrier_loss : 8;
++ unsigned int sqe_err : 8;
++ unsigned int dummy1 : 16;
++} reg_eth_r_phy_cnt;
++#define REG_RD_ADDR_eth_r_phy_cnt 68
++
++/* Register rw_test_ctrl, scope eth, type rw */
++typedef struct {
++ unsigned int snmp_inc : 1;
++ unsigned int snmp : 1;
++ unsigned int backoff : 1;
++ unsigned int dummy1 : 29;
++} reg_eth_rw_test_ctrl;
++#define REG_RD_ADDR_eth_rw_test_ctrl 72
++#define REG_WR_ADDR_eth_rw_test_ctrl 72
++
++/* Register rw_intr_mask, scope eth, type rw */
++typedef struct {
++ unsigned int crc : 1;
++ unsigned int align : 1;
++ unsigned int oversize : 1;
++ unsigned int congestion : 1;
++ unsigned int single_col : 1;
++ unsigned int mult_col : 1;
++ unsigned int late_col : 1;
++ unsigned int deferred : 1;
++ unsigned int carrier_loss : 1;
++ unsigned int sqe_test_err : 1;
++ unsigned int orun : 1;
++ unsigned int urun : 1;
++ unsigned int exc_col : 1;
++ unsigned int mdio : 1;
++ unsigned int dummy1 : 18;
++} reg_eth_rw_intr_mask;
++#define REG_RD_ADDR_eth_rw_intr_mask 76
++#define REG_WR_ADDR_eth_rw_intr_mask 76
++
++/* Register rw_ack_intr, scope eth, type rw */
++typedef struct {
++ unsigned int crc : 1;
++ unsigned int align : 1;
++ unsigned int oversize : 1;
++ unsigned int congestion : 1;
++ unsigned int single_col : 1;
++ unsigned int mult_col : 1;
++ unsigned int late_col : 1;
++ unsigned int deferred : 1;
++ unsigned int carrier_loss : 1;
++ unsigned int sqe_test_err : 1;
++ unsigned int orun : 1;
++ unsigned int urun : 1;
++ unsigned int exc_col : 1;
++ unsigned int mdio : 1;
++ unsigned int dummy1 : 18;
++} reg_eth_rw_ack_intr;
++#define REG_RD_ADDR_eth_rw_ack_intr 80
++#define REG_WR_ADDR_eth_rw_ack_intr 80
++
++/* Register r_intr, scope eth, type r */
++typedef struct {
++ unsigned int crc : 1;
++ unsigned int align : 1;
++ unsigned int oversize : 1;
++ unsigned int congestion : 1;
++ unsigned int single_col : 1;
++ unsigned int mult_col : 1;
++ unsigned int late_col : 1;
++ unsigned int deferred : 1;
++ unsigned int carrier_loss : 1;
++ unsigned int sqe_test_err : 1;
++ unsigned int orun : 1;
++ unsigned int urun : 1;
++ unsigned int exc_col : 1;
++ unsigned int mdio : 1;
++ unsigned int dummy1 : 18;
++} reg_eth_r_intr;
++#define REG_RD_ADDR_eth_r_intr 84
++
++/* Register r_masked_intr, scope eth, type r */
++typedef struct {
++ unsigned int crc : 1;
++ unsigned int align : 1;
++ unsigned int oversize : 1;
++ unsigned int congestion : 1;
++ unsigned int single_col : 1;
++ unsigned int mult_col : 1;
++ unsigned int late_col : 1;
++ unsigned int deferred : 1;
++ unsigned int carrier_loss : 1;
++ unsigned int sqe_test_err : 1;
++ unsigned int orun : 1;
++ unsigned int urun : 1;
++ unsigned int exc_col : 1;
++ unsigned int mdio : 1;
++ unsigned int dummy1 : 18;
++} reg_eth_r_masked_intr;
++#define REG_RD_ADDR_eth_r_masked_intr 88
++
++
++/* Constants */
++enum {
++ regk_eth_discard = 0x00000000,
++ regk_eth_ether = 0x00000000,
++ regk_eth_full = 0x00000001,
++ regk_eth_half = 0x00000000,
++ regk_eth_hsh = 0x00000001,
++ regk_eth_mii = 0x00000001,
++ regk_eth_mii_arec = 0x00000002,
++ regk_eth_mii_clk = 0x00000000,
++ regk_eth_no = 0x00000000,
++ regk_eth_rec = 0x00000001,
++ regk_eth_rw_ga_hi_default = 0x00000000,
++ regk_eth_rw_ga_lo_default = 0x00000000,
++ regk_eth_rw_gen_ctrl_default = 0x00000000,
++ regk_eth_rw_intr_mask_default = 0x00000000,
++ regk_eth_rw_ma0_hi_default = 0x00000000,
++ regk_eth_rw_ma0_lo_default = 0x00000000,
++ regk_eth_rw_ma1_hi_default = 0x00000000,
++ regk_eth_rw_ma1_lo_default = 0x00000000,
++ regk_eth_rw_mgm_ctrl_default = 0x00000000,
++ regk_eth_rw_test_ctrl_default = 0x00000000,
++ regk_eth_size1518 = 0x00000000,
++ regk_eth_size1522 = 0x00000001,
++ regk_eth_yes = 0x00000001
++};
++#endif /* __eth_defs_h */
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/extmem_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/extmem_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/extmem_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/extmem_defs.h 2004-06-04 09:15:33.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/ext_mem/mod/extmem_regs.r
+- * id: extmem_regs.r,v 1.1 2004/02/16 13:29:30 np Exp
++ * id: extmem_regs.r,v 1.1 2004/02/16 13:29:30 np Exp
+ * last modfied: Tue Mar 30 22:26:21 2004
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile extmem_defs.h ../../inst/ext_mem/mod/extmem_regs.r
+ * id: $Id: extmem_defs.h,v 1.5 2004/06/04 07:15:33 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/gio_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/gio_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/gio_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/gio_defs.h 2005-04-24 20:30:58.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/gio/rtl/gio_regs.r
+- * id: gio_regs.r,v 1.5 2005/02/04 09:43:21 perz Exp
++ * id: gio_regs.r,v 1.5 2005/02/04 09:43:21 perz Exp
+ * last modfied: Mon Apr 11 16:07:47 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile gio_defs.h ../../inst/gio/rtl/gio_regs.r
+ * id: $Id: gio_defs.h,v 1.6 2005/04/24 18:30:58 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/intr_vect.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/intr_vect.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/intr_vect.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/intr_vect.h 2005-05-23 14:59:21.000000000 +0200
+@@ -3,7 +3,7 @@
+ version . */
+
+ #ifndef _______INST_INTR_VECT_RTL_GUINNESS_IVMASK_CONFIG_R
+-#define _______INST_INTR_VECT_RTL_GUINNESS_IVMASK_CONFIG_R
++#define _______INST_INTR_VECT_RTL_GUINNESS_IVMASK_CONFIG_R
+ #define MEMARB_INTR_VECT 0x31
+ #define GEN_IO_INTR_VECT 0x32
+ #define IOP0_INTR_VECT 0x33
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/intr_vect_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/intr_vect_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/intr_vect_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/intr_vect_defs.h 2005-04-24 20:30:58.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/intr_vect/rtl/guinness/ivmask.config.r
+- * id: ivmask.config.r,v 1.4 2005/02/15 16:05:38 stefans Exp
++ * id: ivmask.config.r,v 1.4 2005/02/15 16:05:38 stefans Exp
+ * last modfied: Mon Apr 11 16:08:03 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile intr_vect_defs.h ../../inst/intr_vect/rtl/guinness/ivmask.config.r
+ * id: $Id: intr_vect_defs.h,v 1.8 2005/04/24 18:30:58 starvik Exp $
+ * Any changes here will be lost.
+@@ -209,7 +209,7 @@
+ #define REG_RD_ADDR_intr_vect_r_guru 16
+
+ /* Register rw_ipi, scope intr_vect, type rw */
+-typedef struct
++typedef struct
+ {
+ unsigned int vector;
+ } reg_intr_vect_rw_ipi;
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/Makefile linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/Makefile
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/Makefile 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/Makefile 2004-01-07 21:34:55.000000000 +0100
+@@ -125,14 +125,14 @@
+ done
+
+ .PHONY: axw
+-## %.axw - Generate the specified .axw file (doesn't work for all files
++## %.axw - Generate the specified .axw file (doesn't work for all files
+ ## due to inconsistent naming of .r files.
+ %.axw: axw
+ @for RDES in $(IOPROCREGDESC); do \
+ if echo "$$RDES" | grep $* ; then \
+ $(RDES2TXT) $$RDES; \
+ fi \
+- done
++ done
+
+ .PHONY: clean
+ ## clean - Remove .h files and .axw files.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_crc_par_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_crc_par_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_crc_par_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_crc_par_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/iop_crc_par.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:08:45 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_crc_par_defs_asm.h ../../inst/io_proc/rtl/iop_crc_par.r
+ * id: $Id: iop_crc_par_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_dmc_in_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_dmc_in_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_dmc_in_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_dmc_in_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/io_proc/rtl/iop_dmc_in.r
+- * id: iop_dmc_in.r,v 1.26 2005/02/16 09:14:17 niklaspa Exp
++ * id: iop_dmc_in.r,v 1.26 2005/02/16 09:14:17 niklaspa Exp
+ * last modfied: Mon Apr 11 16:08:45 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_dmc_in_defs_asm.h ../../inst/io_proc/rtl/iop_dmc_in.r
+ * id: $Id: iop_dmc_in_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_dmc_out_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_dmc_out_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_dmc_out_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_dmc_out_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/io_proc/rtl/iop_dmc_out.r
+- * id: iop_dmc_out.r,v 1.30 2005/02/16 09:14:11 niklaspa Exp
++ * id: iop_dmc_out.r,v 1.30 2005/02/16 09:14:11 niklaspa Exp
+ * last modfied: Mon Apr 11 16:08:45 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_dmc_out_defs_asm.h ../../inst/io_proc/rtl/iop_dmc_out.r
+ * id: $Id: iop_dmc_out_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_in_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_in_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_in_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_in_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/iop_fifo_in.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:10:07 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_fifo_in_defs_asm.h ../../inst/io_proc/rtl/iop_fifo_in.r
+ * id: $Id: iop_fifo_in_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_in_extra_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_in_extra_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_in_extra_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_in_extra_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/iop_fifo_in_extra.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:10:08 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_fifo_in_extra_defs_asm.h ../../inst/io_proc/rtl/iop_fifo_in_extra.r
+ * id: $Id: iop_fifo_in_extra_defs_asm.h,v 1.1 2005/04/24 18:31:06 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_out_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_out_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_out_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_out_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/iop_fifo_out.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:10:09 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_fifo_out_defs_asm.h ../../inst/io_proc/rtl/iop_fifo_out.r
+ * id: $Id: iop_fifo_out_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_out_extra_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_out_extra_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_out_extra_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_fifo_out_extra_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/iop_fifo_out_extra.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:10:10 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_fifo_out_extra_defs_asm.h ../../inst/io_proc/rtl/iop_fifo_out_extra.r
+ * id: $Id: iop_fifo_out_extra_defs_asm.h,v 1.1 2005/04/24 18:31:06 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_mpu_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_mpu_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_mpu_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_mpu_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/io_proc/rtl/iop_mpu.r
+- * id: iop_mpu.r,v 1.30 2005/02/17 08:12:33 niklaspa Exp
++ * id: iop_mpu.r,v 1.30 2005/02/17 08:12:33 niklaspa Exp
+ * last modfied: Mon Apr 11 16:08:45 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_mpu_defs_asm.h ../../inst/io_proc/rtl/iop_mpu.r
+ * id: $Id: iop_mpu_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_reg_space_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_reg_space_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_reg_space_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_reg_space_asm.h 2005-04-24 20:31:06.000000000 +0200
+@@ -1,5 +1,5 @@
+ /* Autogenerated Changes here will be lost!
+- * generated by ../gen_sw.pl Mon Apr 11 16:10:18 2005 iop_sw.cfg
++ * generated by ../gen_sw.pl Mon Apr 11 16:10:18 2005 iop_sw.cfg
+ */
+ #define iop_version 0
+ #define iop_fifo_in0_extra 64
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sap_in_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sap_in_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sap_in_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sap_in_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/iop_sap_in.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:08:45 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_sap_in_defs_asm.h ../../inst/io_proc/rtl/iop_sap_in.r
+ * id: $Id: iop_sap_in_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sap_out_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sap_out_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sap_out_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sap_out_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/iop_sap_out.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:08:46 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_sap_out_defs_asm.h ../../inst/io_proc/rtl/iop_sap_out.r
+ * id: $Id: iop_sap_out_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_scrc_in_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_scrc_in_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_scrc_in_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_scrc_in_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/io_proc/rtl/iop_scrc_in.r
+- * id: iop_scrc_in.r,v 1.10 2005/02/16 09:13:58 niklaspa Exp
++ * id: iop_scrc_in.r,v 1.10 2005/02/16 09:13:58 niklaspa Exp
+ * last modfied: Mon Apr 11 16:08:46 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_scrc_in_defs_asm.h ../../inst/io_proc/rtl/iop_scrc_in.r
+ * id: $Id: iop_scrc_in_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_scrc_out_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_scrc_out_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_scrc_out_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_scrc_out_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/io_proc/rtl/iop_scrc_out.r
+- * id: iop_scrc_out.r,v 1.11 2005/02/16 09:13:38 niklaspa Exp
++ * id: iop_scrc_out.r,v 1.11 2005/02/16 09:13:38 niklaspa Exp
+ * last modfied: Mon Apr 11 16:08:46 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_scrc_out_defs_asm.h ../../inst/io_proc/rtl/iop_scrc_out.r
+ * id: $Id: iop_scrc_out_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_spu_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_spu_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_spu_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_spu_defs_asm.h 2005-04-24 20:31:06.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/iop_spu.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:08:46 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_spu_defs_asm.h ../../inst/io_proc/rtl/iop_spu.r
+ * id: $Id: iop_spu_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_cfg_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_cfg_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_cfg_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_cfg_defs_asm.h 2005-04-24 20:31:07.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/guinness/iop_sw_cfg.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:10:19 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_sw_cfg_defs_asm.h ../../inst/io_proc/rtl/guinness/iop_sw_cfg.r
+ * id: $Id: iop_sw_cfg_defs_asm.h,v 1.5 2005/04/24 18:31:07 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_cpu_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_cpu_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_cpu_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_cpu_defs_asm.h 2005-04-24 20:31:07.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/guinness/iop_sw_cpu.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:10:19 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_sw_cpu_defs_asm.h ../../inst/io_proc/rtl/guinness/iop_sw_cpu.r
+ * id: $Id: iop_sw_cpu_defs_asm.h,v 1.5 2005/04/24 18:31:07 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_mpu_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_mpu_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_mpu_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_mpu_defs_asm.h 2005-04-24 20:31:07.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/guinness/iop_sw_mpu.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:10:19 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_sw_mpu_defs_asm.h ../../inst/io_proc/rtl/guinness/iop_sw_mpu.r
+ * id: $Id: iop_sw_mpu_defs_asm.h,v 1.5 2005/04/24 18:31:07 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_spu_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_spu_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_spu_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_sw_spu_defs_asm.h 2005-04-24 20:31:07.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/guinness/iop_sw_spu.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:10:19 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_sw_spu_defs_asm.h ../../inst/io_proc/rtl/guinness/iop_sw_spu.r
+ * id: $Id: iop_sw_spu_defs_asm.h,v 1.5 2005/04/24 18:31:07 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_timer_grp_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_timer_grp_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_timer_grp_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_timer_grp_defs_asm.h 2005-04-24 20:31:07.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/io_proc/rtl/iop_timer_grp.r
+- * id: iop_timer_grp.r,v 1.29 2005/02/16 09:13:27 niklaspa Exp
++ * id: iop_timer_grp.r,v 1.29 2005/02/16 09:13:27 niklaspa Exp
+ * last modfied: Mon Apr 11 16:08:46 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_timer_grp_defs_asm.h ../../inst/io_proc/rtl/iop_timer_grp.r
+ * id: $Id: iop_timer_grp_defs_asm.h,v 1.5 2005/04/24 18:31:07 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_trigger_grp_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_trigger_grp_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_trigger_grp_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_trigger_grp_defs_asm.h 2005-04-24 20:31:07.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/io_proc/rtl/iop_trigger_grp.r
+- * id: iop_trigger_grp.r,v 0.20 2005/02/16 09:13:20 niklaspa Exp
++ * id: iop_trigger_grp.r,v 0.20 2005/02/16 09:13:20 niklaspa Exp
+ * last modfied: Mon Apr 11 16:08:46 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_trigger_grp_defs_asm.h ../../inst/io_proc/rtl/iop_trigger_grp.r
+ * id: $Id: iop_trigger_grp_defs_asm.h,v 1.5 2005/04/24 18:31:07 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_version_defs_asm.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_version_defs_asm.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/asm/iop_version_defs_asm.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/asm/iop_version_defs_asm.h 2005-04-24 20:31:07.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/io_proc/rtl/guinness/iop_version.r
+- * id: iop_version.r,v 1.3 2004/04/22 12:37:54 jonaso Exp
++ * id: iop_version.r,v 1.3 2004/04/22 12:37:54 jonaso Exp
+ * last modfied: Mon Apr 11 16:08:44 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_version_defs_asm.h ../../inst/io_proc/rtl/guinness/iop_version.r
+ * id: $Id: iop_version_defs_asm.h,v 1.5 2005/04/24 18:31:07 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_crc_par_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_crc_par_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_crc_par_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_crc_par_defs.h 2005-04-24 20:31:05.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/iop_crc_par.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:08:45 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_crc_par_defs.h ../../inst/io_proc/rtl/iop_crc_par.r
+ * id: $Id: iop_crc_par_defs.h,v 1.5 2005/04/24 18:31:05 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_dmc_in_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_dmc_in_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_dmc_in_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_dmc_in_defs.h 2005-04-24 20:31:05.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/io_proc/rtl/iop_dmc_in.r
+- * id: iop_dmc_in.r,v 1.26 2005/02/16 09:14:17 niklaspa Exp
++ * id: iop_dmc_in.r,v 1.26 2005/02/16 09:14:17 niklaspa Exp
+ * last modfied: Mon Apr 11 16:08:45 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_dmc_in_defs.h ../../inst/io_proc/rtl/iop_dmc_in.r
+ * id: $Id: iop_dmc_in_defs.h,v 1.5 2005/04/24 18:31:05 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_dmc_out_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_dmc_out_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_dmc_out_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_dmc_out_defs.h 2005-04-24 20:31:05.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/io_proc/rtl/iop_dmc_out.r
+- * id: iop_dmc_out.r,v 1.30 2005/02/16 09:14:11 niklaspa Exp
++ * id: iop_dmc_out.r,v 1.30 2005/02/16 09:14:11 niklaspa Exp
+ * last modfied: Mon Apr 11 16:08:45 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_dmc_out_defs.h ../../inst/io_proc/rtl/iop_dmc_out.r
+ * id: $Id: iop_dmc_out_defs.h,v 1.5 2005/04/24 18:31:05 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_in_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_in_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_in_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_in_defs.h 2005-04-24 20:31:05.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/iop_fifo_in.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:10:07 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_fifo_in_defs.h ../../inst/io_proc/rtl/iop_fifo_in.r
+ * id: $Id: iop_fifo_in_defs.h,v 1.4 2005/04/24 18:31:05 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_in_extra_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_in_extra_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_in_extra_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_in_extra_defs.h 2005-04-24 20:31:05.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/iop_fifo_in_extra.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:10:08 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_fifo_in_extra_defs.h ../../inst/io_proc/rtl/iop_fifo_in_extra.r
+ * id: $Id: iop_fifo_in_extra_defs.h,v 1.1 2005/04/24 18:31:05 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_out_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_out_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_out_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_out_defs.h 2005-04-24 20:31:05.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/iop_fifo_out.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:10:09 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_fifo_out_defs.h ../../inst/io_proc/rtl/iop_fifo_out.r
+ * id: $Id: iop_fifo_out_defs.h,v 1.4 2005/04/24 18:31:05 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_out_extra_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_out_extra_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_out_extra_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_fifo_out_extra_defs.h 2005-04-24 20:31:05.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/iop_fifo_out_extra.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:10:10 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_fifo_out_extra_defs.h ../../inst/io_proc/rtl/iop_fifo_out_extra.r
+ * id: $Id: iop_fifo_out_extra_defs.h,v 1.1 2005/04/24 18:31:05 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_mpu_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_mpu_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_mpu_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_mpu_defs.h 2005-04-24 20:31:05.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/io_proc/rtl/iop_mpu.r
+- * id: iop_mpu.r,v 1.30 2005/02/17 08:12:33 niklaspa Exp
++ * id: iop_mpu.r,v 1.30 2005/02/17 08:12:33 niklaspa Exp
+ * last modfied: Mon Apr 11 16:08:45 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_mpu_defs.h ../../inst/io_proc/rtl/iop_mpu.r
+ * id: $Id: iop_mpu_defs.h,v 1.5 2005/04/24 18:31:05 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_mpu_macros.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_mpu_macros.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_mpu_macros.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_mpu_macros.h 2004-01-07 16:18:30.000000000 +0100
+@@ -96,189 +96,189 @@
+ #define MPU_ADD_RRR(S,N,D) (0x4000008C | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ADD_RRS(S,N,D) (0x4000048C | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ADD_RSR(S,N,D) (0x4000018C | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ADD_RSS(S,N,D) (0x4000058C | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ADD_SRR(S,N,D) (0x4000028C | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ADD_SRS(S,N,D) (0x4000068C | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ADD_SSR(S,N,D) (0x4000038C | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ADD_SSS(S,N,D) (0x4000078C | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ADDQ_RIR(S,N,D) (0x10000000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 16) - 1)) << 0)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ADDQ_IRR(S,N,D) (0x10000000 | ((S & ((1 << 16) - 1)) << 0)\
+ | ((N & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ADDX_IRR_INSTR(S,N,D) (0xC000008C | ((N & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ADDX_IRR_IMM(S,N,D) (S & 0xFFFFFFFF)
+
+ #define MPU_ADDX_RIR_INSTR(S,N,D) (0xC000008C | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ADDX_RIR_IMM(S,N,D) (N & 0xFFFFFFFF)
+
+ #define MPU_ADDX_ISR_INSTR(S,N,D) (0xC000028C | ((N & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ADDX_ISR_IMM(S,N,D) (S & 0xFFFFFFFF)
+
+ #define MPU_ADDX_SIR_INSTR(S,N,D) (0xC000028C | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ADDX_SIR_IMM(S,N,D) (N & 0xFFFFFFFF)
+
+ #define MPU_ADDX_IRS_INSTR(S,N,D) (0xC000048C | ((N & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ADDX_IRS_IMM(S,N,D) (S & 0xFFFFFFFF)
+
+ #define MPU_ADDX_RIS_INSTR(S,N,D) (0xC000048C | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ADDX_RIS_IMM(S,N,D) (N & 0xFFFFFFFF)
+
+ #define MPU_ADDX_ISS_INSTR(S,N,D) (0xC000068C | ((N & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ADDX_ISS_IMM(S,N,D) (S & 0xFFFFFFFF)
+
+ #define MPU_ADDX_SIS_INSTR(S,N,D) (0xC000068C | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ADDX_SIS_IMM(S,N,D) (N & 0xFFFFFFFF)
+
+ #define MPU_AND_RRR(S,N,D) (0x4000008A | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_AND_RRS(S,N,D) (0x4000048A | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_AND_RSR(S,N,D) (0x4000018A | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_AND_RSS(S,N,D) (0x4000058A | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_AND_SRR(S,N,D) (0x4000028A | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_AND_SRS(S,N,D) (0x4000068A | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_AND_SSR(S,N,D) (0x4000038A | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_AND_SSS(S,N,D) (0x4000078A | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ANDQ_RIR(S,N,D) (0x08000000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 16) - 1)) << 0)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ANDQ_IRR(S,N,D) (0x08000000 | ((S & ((1 << 16) - 1)) << 0)\
+ | ((N & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ANDX_RIR_INSTR(S,N,D) (0xC000008A | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ANDX_RIR_IMM(S,N,D) (N & 0xFFFFFFFF)
+
+ #define MPU_ANDX_IRR_INSTR(S,N,D) (0xC000008A | ((N & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ANDX_IRR_IMM(S,N,D) (S & 0xFFFFFFFF)
+
+ #define MPU_ANDX_ISR_INSTR(S,N,D) (0xC000028A | ((N & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ANDX_ISR_IMM(S,N,D) (S & 0xFFFFFFFF)
+
+ #define MPU_ANDX_SIR_INSTR(S,N,D) (0xC000028A | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ANDX_SIR_IMM(S,N,D) (N & 0xFFFFFFFF)
+
+ #define MPU_ANDX_IRS_INSTR(S,N,D) (0xC000048A | ((N & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ANDX_IRS_IMM(S,N,D) (S & 0xFFFFFFFF)
+
+ #define MPU_ANDX_ISS_INSTR(S,N,D) (0xC000068A | ((N & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ANDX_ISS_IMM(S,N,D) (S & 0xFFFFFFFF)
+
+ #define MPU_ANDX_RIS_INSTR(S,N,D) (0xC000048A | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ANDX_RIS_IMM(S,N,D) (N & 0xFFFFFFFF)
+
+ #define MPU_ANDX_SIS_INSTR(S,N,D) (0xC000068A | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ANDX_SIS_IMM(S,N,D) (N & 0xFFFFFFFF)
+
+ #define MPU_BA_I(S) (0x60000000 | ((S & ((1 << 16) - 1)) << 0))
+-
++
+ #define MPU_BAR_R(S) (0x62000000 | ((S & ((1 << 5) - 1)) << 11))
+-
++
+ #define MPU_BAR_S(S) (0x63000000 | ((S & ((1 << 5) - 1)) << 11))
+-
++
+ #define MPU_BBC_RII(S,N,D) (0x78000000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 21)\
+ | ((D & ((1 << 16) - 1)) << 0))
+-
++
+ #define MPU_BBS_RII(S,N,D) (0x7C000000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 21)\
+ | ((D & ((1 << 16) - 1)) << 0))
+-
++
+ #define MPU_BNZ_RI(S,D) (0x74400000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 16) - 1)) << 0))
+-
++
+ #define MPU_BMI_RI(S,D) (0x7FE00000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 16) - 1)) << 0))
+-
++
+ #define MPU_BPL_RI(S,D) (0x7BE00000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 16) - 1)) << 0))
+-
++
+ #define MPU_BZ_RI(S,D) (0x74000000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 16) - 1)) << 0))
+-
++
+ #define MPU_DI() (0x40000001)
+
+ #define MPU_EI() (0x40000003)
+@@ -286,243 +286,243 @@
+ #define MPU_HALT() (0x40000002)
+
+ #define MPU_JIR_I(S) (0x60200000 | ((S & ((1 << 16) - 1)) << 0))
+-
++
+ #define MPU_JIR_R(S) (0x62200000 | ((S & ((1 << 5) - 1)) << 11))
+-
++
+ #define MPU_JIR_S(S) (0x63200000 | ((S & ((1 << 5) - 1)) << 11))
+-
++
+ #define MPU_JNT() (0x61000000)
+
+ #define MPU_JSR_I(S) (0x60400000 | ((S & ((1 << 16) - 1)) << 0))
+-
++
+ #define MPU_JSR_R(S) (0x62400000 | ((S & ((1 << 5) - 1)) << 11))
+-
++
+ #define MPU_JSR_S(S) (0x63400000 | ((S & ((1 << 5) - 1)) << 11))
+-
++
+ #define MPU_LSL_RRR(S,N,D) (0x4000008E | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_LSL_RRS(S,N,D) (0x4000048E | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_LSL_RSR(S,N,D) (0x4000018E | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_LSL_RSS(S,N,D) (0x4000058E | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_LSL_SRR(S,N,D) (0x4000028E | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_LSL_SRS(S,N,D) (0x4000068E | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_LSL_SSR(S,N,D) (0x4000038E | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_LSL_SSS(S,N,D) (0x4000078E | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_LSLQ_RIR(S,N,D) (0x18000000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 16) - 1)) << 0)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_LSR_RRR(S,N,D) (0x4000008F | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_LSR_RRS(S,N,D) (0x4000048F | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_LSR_RSR(S,N,D) (0x4000018F | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_LSR_RSS(S,N,D) (0x4000058F | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_LSR_SRR(S,N,D) (0x4000028F | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_LSR_SRS(S,N,D) (0x4000068F | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_LSR_SSR(S,N,D) (0x4000038F | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_LSR_SSS(S,N,D) (0x4000078F | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_LSRQ_RIR(S,N,D) (0x1C000000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 16) - 1)) << 0)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_LW_IR(S,D) (0x64400000 | ((S & ((1 << 16) - 1)) << 0)\
+ | ((D & ((1 << 5) - 1)) << 16))
+-
++
+ #define MPU_LW_IS(S,D) (0x64600000 | ((S & ((1 << 16) - 1)) << 0)\
+ | ((D & ((1 << 5) - 1)) << 16))
+-
++
+ #define MPU_LW_RR(S,D) (0x66400000 | ((S & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 16))
+-
++
+ #define MPU_LW_RS(S,D) (0x66600000 | ((S & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 16))
+-
++
+ #define MPU_LW_SR(S,D) (0x67400000 | ((S & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 16))
+-
++
+ #define MPU_LW_SS(S,D) (0x67600000 | ((S & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 16))
+-
++
+ #define MPU_LW_RIR(S,N,D) (0x66400000 | ((S & ((1 << 5) - 1)) << 11)\
+ | ((N & ((1 << 8) - 1)) << 0)\
+ | ((D & ((1 << 5) - 1)) << 16))
+-
++
+ #define MPU_LW_RIS(S,N,D) (0x66600000 | ((S & ((1 << 5) - 1)) << 11)\
+ | ((N & ((1 << 8) - 1)) << 0)\
+ | ((D & ((1 << 5) - 1)) << 16))
+-
++
+ #define MPU_LW_SIR(S,N,D) (0x67400000 | ((S & ((1 << 5) - 1)) << 11)\
+ | ((N & ((1 << 8) - 1)) << 0)\
+ | ((D & ((1 << 5) - 1)) << 16))
+-
++
+ #define MPU_LW_SIS(S,N,D) (0x67600000 | ((S & ((1 << 5) - 1)) << 11)\
+ | ((N & ((1 << 8) - 1)) << 0)\
+ | ((D & ((1 << 5) - 1)) << 16))
+-
++
+ #define MPU_MOVE_RR(S,D) (0x40000081 | ((S & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_MOVE_RS(S,D) (0x40000481 | ((S & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_MOVE_SR(S,D) (0x40000181 | ((S & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_MOVE_SS(S,D) (0x40000581 | ((S & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_MOVEQ_IR(S,D) (0x24000000 | ((S & ((1 << 16) - 1)) << 0)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_MOVEQ_IS(S,D) (0x2C000000 | ((S & ((1 << 16) - 1)) << 0)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_MOVEX_IR_INSTR(S,D) (0xC0000081 | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_MOVEX_IR_IMM(S,D) (S & 0xFFFFFFFF)
+
+ #define MPU_MOVEX_IS_INSTR(S,D) (0xC0000481 | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_MOVEX_IS_IMM(S,D) (S & 0xFFFFFFFF)
+
+ #define MPU_NOP() (0x40000000)
+
+ #define MPU_NOT_RR(S,D) (0x40100081 | ((S & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_NOT_RS(S,D) (0x40100481 | ((S & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_NOT_SR(S,D) (0x40100181 | ((S & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_NOT_SS(S,D) (0x40100581 | ((S & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_OR_RRR(S,N,D) (0x4000008B | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_OR_RRS(S,N,D) (0x4000048B | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_OR_RSR(S,N,D) (0x4000018B | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_OR_RSS(S,N,D) (0x4000058B | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_OR_SRR(S,N,D) (0x4000028B | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_OR_SRS(S,N,D) (0x4000068B | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_OR_SSR(S,N,D) (0x4000038B | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_OR_SSS(S,N,D) (0x4000078B | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ORQ_RIR(S,N,D) (0x0C000000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 16) - 1)) << 0)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ORQ_IRR(S,N,D) (0x0C000000 | ((S & ((1 << 16) - 1)) << 0)\
+ | ((N & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ORX_RIR_INSTR(S,N,D) (0xC000008B | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ORX_RIR_IMM(S,N,D) (N & 0xFFFFFFFF)
+
+ #define MPU_ORX_IRR_INSTR(S,N,D) (0xC000008B | ((N & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ORX_IRR_IMM(S,N,D) (S & 0xFFFFFFFF)
+
+ #define MPU_ORX_SIR_INSTR(S,N,D) (0xC000028B | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ORX_SIR_IMM(S,N,D) (N & 0xFFFFFFFF)
+
+ #define MPU_ORX_ISR_INSTR(S,N,D) (0xC000028B | ((N & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ORX_ISR_IMM(S,N,D) (S & 0xFFFFFFFF)
+
+ #define MPU_ORX_RIS_INSTR(S,N,D) (0xC000048B | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ORX_RIS_IMM(S,N,D) (N & 0xFFFFFFFF)
+
+ #define MPU_ORX_IRS_INSTR(S,N,D) (0xC000048B | ((N & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ORX_IRS_IMM(S,N,D) (S & 0xFFFFFFFF)
+
+ #define MPU_ORX_SIS_INSTR(S,N,D) (0xC000068B | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ORX_SIS_IMM(S,N,D) (N & 0xFFFFFFFF)
+
+ #define MPU_ORX_ISS_INSTR(S,N,D) (0xC000068B | ((N & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_ORX_ISS_IMM(S,N,D) (S & 0xFFFFFFFF)
+
+ #define MPU_RET() (0x63003000)
+@@ -531,232 +531,232 @@
+
+ #define MPU_RR_IR(S,D) (0x50000000 | ((S & ((1 << 11) - 1)) << 0)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_RR_SR(S,D) (0x50008000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_RW_RI(S,D) (0x56000000 | ((S & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 11) - 1)) << 0))
+-
++
+ #define MPU_RW_RS(S,D) (0x57000000 | ((S & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 16))
+-
++
+ #define MPU_RWQ_II(S,D) (0x58000000 | ((S & ((1 << 16) - 1)) << 11)\
+ | ((D & ((1 << 11) - 1)) << 0))
+-
++
+ #define MPU_RWQ_IS(S,D) (0x55000000 | ((S & ((1 << 16) - 1)) << 0)\
+ | ((D & ((1 << 5) - 1)) << 16))
+-
++
+ #define MPU_RWX_II_INSTR(S,D) (0xD4000000 | ((D & ((1 << 11) - 1)) << 0))
+-
++
+ #define MPU_RWX_II_IMM(S,D) (S & 0xFFFFFFFF)
+
+ #define MPU_RWX_IS_INSTR(S,D) (0xD5000000 | ((D & ((1 << 5) - 1)) << 16))
+-
++
+ #define MPU_RWX_IS_IMM(S,D) (S & 0xFFFFFFFF)
+
+ #define MPU_SUB_RRR(S,N,D) (0x4000008D | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_SUB_RRS(S,N,D) (0x4000048D | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_SUB_RSR(S,N,D) (0x4000018D | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_SUB_RSS(S,N,D) (0x4000058D | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_SUB_SRR(S,N,D) (0x4000028D | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_SUB_SRS(S,N,D) (0x4000068D | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_SUB_SSR(S,N,D) (0x4000038D | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_SUB_SSS(S,N,D) (0x4000078D | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_SUBQ_RIR(S,N,D) (0x14000000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 16) - 1)) << 0)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_SUBX_RIR_INSTR(S,N,D) (0xC000008D | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_SUBX_RIR_IMM(S,N,D) (N & 0xFFFFFFFF)
+
+ #define MPU_SUBX_SIR_INSTR(S,N,D) (0xC000028D | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_SUBX_SIR_IMM(S,N,D) (N & 0xFFFFFFFF)
+
+ #define MPU_SUBX_RIS_INSTR(S,N,D) (0xC000048D | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_SUBX_RIS_IMM(S,N,D) (N & 0xFFFFFFFF)
+
+ #define MPU_SUBX_SIS_INSTR(S,N,D) (0xC000068D | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_SUBX_SIS_IMM(S,N,D) (N & 0xFFFFFFFF)
+
+ #define MPU_SW_RI(S,D) (0x64000000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 16) - 1)) << 0))
+-
++
+ #define MPU_SW_SI(S,D) (0x64200000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 16) - 1)) << 0))
+-
++
+ #define MPU_SW_RR(S,D) (0x66000000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 11))
+-
++
+ #define MPU_SW_SR(S,D) (0x66200000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 11))
+-
++
+ #define MPU_SW_RS(S,D) (0x67000000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 11))
+-
++
+ #define MPU_SW_SS(S,D) (0x67200000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 11))
+-
++
+ #define MPU_SW_RIR(S,N,D) (0x66000000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 8) - 1)) << 0)\
+ | ((D & ((1 << 5) - 1)) << 11))
+-
++
+ #define MPU_SW_SIR(S,N,D) (0x66200000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 8) - 1)) << 0)\
+ | ((D & ((1 << 5) - 1)) << 11))
+-
++
+ #define MPU_SW_RIS(S,N,D) (0x67000000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 8) - 1)) << 0)\
+ | ((D & ((1 << 5) - 1)) << 11))
+-
++
+ #define MPU_SW_SIS(S,N,D) (0x67200000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 8) - 1)) << 0)\
+ | ((D & ((1 << 5) - 1)) << 11))
+-
++
+ #define MPU_SWX_II_INSTR(S,D) (0xE4000000 | ((D & ((1 << 16) - 1)) << 0))
+-
++
+ #define MPU_SWX_II_IMM(S,D) (S & 0xFFFFFFFF)
+
+ #define MPU_SWX_IR_INSTR(S,D) (0xE6000000 | ((D & ((1 << 5) - 1)) << 11))
+-
++
+ #define MPU_SWX_IR_IMM(S,D) (S & 0xFFFFFFFF)
+
+ #define MPU_SWX_IS_INSTR(S,D) (0xE7000000 | ((D & ((1 << 5) - 1)) << 11))
+-
++
+ #define MPU_SWX_IS_IMM(S,D) (S & 0xFFFFFFFF)
+
+ #define MPU_SWX_IIR_INSTR(S,N,D) (0xE6000000 | ((N & ((1 << 8) - 1)) << 0)\
+ | ((D & ((1 << 5) - 1)) << 11))
+-
++
+ #define MPU_SWX_IIR_IMM(S,N,D) (S & 0xFFFFFFFF)
+
+ #define MPU_SWX_IIS_INSTR(S,N,D) (0xE7000000 | ((N & ((1 << 8) - 1)) << 0)\
+ | ((D & ((1 << 5) - 1)) << 11))
+-
++
+ #define MPU_SWX_IIS_IMM(S,N,D) (S & 0xFFFFFFFF)
+
+ #define MPU_XOR_RRR(S,N,D) (0x40000089 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_XOR_RRS(S,N,D) (0x40000489 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_XOR_RSR(S,N,D) (0x40000189 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_XOR_RSS(S,N,D) (0x40000589 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_XOR_SRR(S,N,D) (0x40000289 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_XOR_SRS(S,N,D) (0x40000689 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_XOR_SSR(S,N,D) (0x40000389 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_XOR_SSS(S,N,D) (0x40000789 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_XOR_RR(S,D) (0x40000088 | ((S & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_XOR_RS(S,D) (0x40000488 | ((S & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_XOR_SR(S,D) (0x40000188 | ((S & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_XOR_SS(S,D) (0x40000588 | ((S & ((1 << 5) - 1)) << 11)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_XORQ_RIR(S,N,D) (0x04000000 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((N & ((1 << 16) - 1)) << 0)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_XORQ_IRR(S,N,D) (0x04000000 | ((S & ((1 << 16) - 1)) << 0)\
+ | ((N & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_XORX_RIR_INSTR(S,N,D) (0xC0000089 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_XORX_RIR_IMM(S,N,D) (N & 0xFFFFFFFF)
+
+ #define MPU_XORX_IRR_INSTR(S,N,D) (0xC0000089 | ((N & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_XORX_IRR_IMM(S,N,D) (S & 0xFFFFFFFF)
+
+ #define MPU_XORX_SIR_INSTR(S,N,D) (0xC0000289 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_XORX_SIR_IMM(S,N,D) (N & 0xFFFFFFFF)
+
+ #define MPU_XORX_ISR_INSTR(S,N,D) (0xC0000289 | ((N & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_XORX_ISR_IMM(S,N,D) (S & 0xFFFFFFFF)
+
+ #define MPU_XORX_RIS_INSTR(S,N,D) (0xC0000489 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_XORX_RIS_IMM(S,N,D) (N & 0xFFFFFFFF)
+
+ #define MPU_XORX_IRS_INSTR(S,N,D) (0xC0000489 | ((N & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_XORX_IRS_IMM(S,N,D) (S & 0xFFFFFFFF)
+
+ #define MPU_XORX_SIS_INSTR(S,N,D) (0xC0000689 | ((S & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_XORX_SIS_IMM(S,N,D) (N & 0xFFFFFFFF)
+
+ #define MPU_XORX_ISS_INSTR(S,N,D) (0xC0000689 | ((N & ((1 << 5) - 1)) << 16)\
+ | ((D & ((1 << 5) - 1)) << 21))
+-
++
+ #define MPU_XORX_ISS_IMM(S,N,D) (S & 0xFFFFFFFF)
+
+
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_reg_space.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_reg_space.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_reg_space.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_reg_space.h 2005-04-24 20:31:05.000000000 +0200
+@@ -1,5 +1,5 @@
+ /* Autogenerated Changes here will be lost!
+- * generated by ../gen_sw.pl Mon Apr 11 16:10:18 2005 iop_sw.cfg
++ * generated by ../gen_sw.pl Mon Apr 11 16:10:18 2005 iop_sw.cfg
+ */
+ #define regi_iop_version (regi_iop + 0)
+ #define regi_iop_fifo_in0_extra (regi_iop + 64)
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sap_in_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sap_in_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sap_in_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sap_in_defs.h 2005-04-24 20:31:05.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/iop_sap_in.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:08:45 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_sap_in_defs.h ../../inst/io_proc/rtl/iop_sap_in.r
+ * id: $Id: iop_sap_in_defs.h,v 1.5 2005/04/24 18:31:05 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sap_out_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sap_out_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sap_out_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sap_out_defs.h 2005-04-24 20:31:05.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/iop_sap_out.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:08:46 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_sap_out_defs.h ../../inst/io_proc/rtl/iop_sap_out.r
+ * id: $Id: iop_sap_out_defs.h,v 1.5 2005/04/24 18:31:05 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_scrc_in_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_scrc_in_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_scrc_in_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_scrc_in_defs.h 2005-04-24 20:31:05.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/io_proc/rtl/iop_scrc_in.r
+- * id: iop_scrc_in.r,v 1.10 2005/02/16 09:13:58 niklaspa Exp
++ * id: iop_scrc_in.r,v 1.10 2005/02/16 09:13:58 niklaspa Exp
+ * last modfied: Mon Apr 11 16:08:46 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_scrc_in_defs.h ../../inst/io_proc/rtl/iop_scrc_in.r
+ * id: $Id: iop_scrc_in_defs.h,v 1.4 2005/04/24 18:31:05 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_scrc_out_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_scrc_out_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_scrc_out_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_scrc_out_defs.h 2005-04-24 20:31:05.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/io_proc/rtl/iop_scrc_out.r
+- * id: iop_scrc_out.r,v 1.11 2005/02/16 09:13:38 niklaspa Exp
++ * id: iop_scrc_out.r,v 1.11 2005/02/16 09:13:38 niklaspa Exp
+ * last modfied: Mon Apr 11 16:08:46 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_scrc_out_defs.h ../../inst/io_proc/rtl/iop_scrc_out.r
+ * id: $Id: iop_scrc_out_defs.h,v 1.4 2005/04/24 18:31:05 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_spu_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_spu_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_spu_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_spu_defs.h 2005-04-24 20:31:05.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/iop_spu.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:08:46 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_spu_defs.h ../../inst/io_proc/rtl/iop_spu.r
+ * id: $Id: iop_spu_defs.h,v 1.5 2005/04/24 18:31:05 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sw_cfg_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sw_cfg_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sw_cfg_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sw_cfg_defs.h 2005-04-24 20:31:05.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/guinness/iop_sw_cfg.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:10:19 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_sw_cfg_defs.h ../../inst/io_proc/rtl/guinness/iop_sw_cfg.r
+ * id: $Id: iop_sw_cfg_defs.h,v 1.4 2005/04/24 18:31:05 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sw_cpu_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sw_cpu_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sw_cpu_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sw_cpu_defs.h 2005-04-24 20:31:05.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/guinness/iop_sw_cpu.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:10:19 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_sw_cpu_defs.h ../../inst/io_proc/rtl/guinness/iop_sw_cpu.r
+ * id: $Id: iop_sw_cpu_defs.h,v 1.4 2005/04/24 18:31:05 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sw_mpu_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sw_mpu_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sw_mpu_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sw_mpu_defs.h 2005-04-24 20:31:05.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/guinness/iop_sw_mpu.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:10:19 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_sw_mpu_defs.h ../../inst/io_proc/rtl/guinness/iop_sw_mpu.r
+ * id: $Id: iop_sw_mpu_defs.h,v 1.4 2005/04/24 18:31:05 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sw_spu_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sw_spu_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_sw_spu_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_sw_spu_defs.h 2005-04-24 20:31:05.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/io_proc/rtl/guinness/iop_sw_spu.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:10:19 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_sw_spu_defs.h ../../inst/io_proc/rtl/guinness/iop_sw_spu.r
+ * id: $Id: iop_sw_spu_defs.h,v 1.4 2005/04/24 18:31:05 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_timer_grp_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_timer_grp_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_timer_grp_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_timer_grp_defs.h 2005-04-24 20:31:05.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/io_proc/rtl/iop_timer_grp.r
+- * id: iop_timer_grp.r,v 1.29 2005/02/16 09:13:27 niklaspa Exp
++ * id: iop_timer_grp.r,v 1.29 2005/02/16 09:13:27 niklaspa Exp
+ * last modfied: Mon Apr 11 16:08:46 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_timer_grp_defs.h ../../inst/io_proc/rtl/iop_timer_grp.r
+ * id: $Id: iop_timer_grp_defs.h,v 1.5 2005/04/24 18:31:05 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_trigger_grp_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_trigger_grp_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_trigger_grp_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_trigger_grp_defs.h 2005-04-24 20:31:05.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/io_proc/rtl/iop_trigger_grp.r
+- * id: iop_trigger_grp.r,v 0.20 2005/02/16 09:13:20 niklaspa Exp
++ * id: iop_trigger_grp.r,v 0.20 2005/02/16 09:13:20 niklaspa Exp
+ * last modfied: Mon Apr 11 16:08:46 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_trigger_grp_defs.h ../../inst/io_proc/rtl/iop_trigger_grp.r
+ * id: $Id: iop_trigger_grp_defs.h,v 1.5 2005/04/24 18:31:05 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_version_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_version_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/iop/iop_version_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/iop/iop_version_defs.h 2005-04-24 20:31:05.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/io_proc/rtl/guinness/iop_version.r
+- * id: iop_version.r,v 1.3 2004/04/22 12:37:54 jonaso Exp
++ * id: iop_version.r,v 1.3 2004/04/22 12:37:54 jonaso Exp
+ * last modfied: Mon Apr 11 16:08:44 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_version_defs.h ../../inst/io_proc/rtl/guinness/iop_version.r
+ * id: $Id: iop_version_defs.h,v 1.4 2005/04/24 18:31:05 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/irq_nmi_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/irq_nmi_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/irq_nmi_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/irq_nmi_defs.h 2005-04-24 20:30:58.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../mod/irq_nmi.r
+ * id: <not found>
+ * last modfied: Thu Jan 22 09:22:43 2004
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile irq_nmi_defs.h ../../mod/irq_nmi.r
+ * id: $Id: irq_nmi_defs.h,v 1.1 2005/04/24 18:30:58 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/marb_bp_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/marb_bp_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/marb_bp_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/marb_bp_defs.h 2004-06-04 09:15:33.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/memarb/rtl/guinness/marb_top.r
+ * id: <not found>
+ * last modfied: Fri Nov 7 15:36:04 2003
+- *
++ *
+ * by /n/asic/projects/guinness/design/top/inst/rdesc/rdes2c ../../rtl/global.rmap ../../mod/modreg.rmap -base 0xb0000000 ../../inst/memarb/rtl/guinness/marb_top.r
+ * id: $Id: marb_bp_defs.h,v 1.2 2004/06/04 07:15:33 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/marb_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/marb_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/marb_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/marb_defs.h 2005-04-24 20:30:58.000000000 +0200
+@@ -6,7 +6,7 @@
+ * file: ../../inst/memarb/rtl/guinness/marb_top.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:12:16 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile marb_defs.h ../../inst/memarb/rtl/guinness/marb_top.r
+ * id: $Id: marb_defs.h,v 1.3 2005/04/24 18:30:58 starvik Exp $
+ * Any changes here will be lost.
+@@ -265,7 +265,7 @@
+ * file: ../../inst/memarb/rtl/guinness/marb_top.r
+ * id: <not found>
+ * last modfied: Mon Apr 11 16:12:16 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile marb_defs.h ../../inst/memarb/rtl/guinness/marb_top.r
+ * id: $Id: marb_defs.h,v 1.3 2005/04/24 18:30:58 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/pinmux_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/pinmux_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/pinmux_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/pinmux_defs.h 2005-04-24 20:30:58.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/pinmux/rtl/guinness/pinmux_regs.r
+- * id: pinmux_regs.r,v 1.40 2005/02/09 16:22:59 perz Exp
++ * id: pinmux_regs.r,v 1.40 2005/02/09 16:22:59 perz Exp
+ * last modfied: Mon Apr 11 16:09:11 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile pinmux_defs.h ../../inst/pinmux/rtl/guinness/pinmux_regs.r
+ * id: $Id: pinmux_defs.h,v 1.3 2005/04/24 18:30:58 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/reg_map.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/reg_map.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/reg_map.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/reg_map.h 2005-04-24 20:30:58.000000000 +0200
+@@ -4,17 +4,17 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../mod/fakereg.rmap
+- * id: fakereg.rmap,v 1.3 2004/02/11 19:53:22 ronny Exp
++ * id: fakereg.rmap,v 1.3 2004/02/11 19:53:22 ronny Exp
+ * last modified: Wed Feb 11 20:53:25 2004
+ * file: ../../rtl/global.rmap
+- * id: global.rmap,v 1.3 2003/08/18 15:08:23 mikaeln Exp
++ * id: global.rmap,v 1.3 2003/08/18 15:08:23 mikaeln Exp
+ * last modified: Mon Aug 18 17:08:23 2003
+ * file: ../../mod/modreg.rmap
+- * id: modreg.rmap,v 1.31 2004/02/20 15:40:04 stefans Exp
++ * id: modreg.rmap,v 1.31 2004/02/20 15:40:04 stefans Exp
+ * last modified: Fri Feb 20 16:40:04 2004
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c -map -base 0xb0000000 ../../rtl/global.rmap ../../mod/modreg.rmap ../../inst/io_proc/rtl/guinness/iop_top.r ../../inst/memarb/rtl/guinness/marb_top.r ../../mod/fakereg.rmap
+- * id: $Id: reg_map.h,v 1.7 2005/04/24 18:30:58 starvik Exp $
++ * id: $Id: reg_map.h,v 1.7 2005/04/24 18:30:58 starvik Exp $
+ * Any changes here will be lost.
+ *
+ * -*- buffer-read-only: t -*-
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/rt_trace_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/rt_trace_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/rt_trace_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/rt_trace_defs.h 2005-04-24 20:30:58.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/rt_trace/rtl/rt_regs.r
+- * id: rt_regs.r,v 1.18 2005/02/08 15:45:00 stefans Exp
++ * id: rt_regs.r,v 1.18 2005/02/08 15:45:00 stefans Exp
+ * last modfied: Mon Apr 11 16:09:14 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile rt_trace_defs.h ../../inst/rt_trace/rtl/rt_regs.r
+ * id: $Id: rt_trace_defs.h,v 1.1 2005/04/24 18:30:58 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/ser_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/ser_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/ser_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/ser_defs.h 2005-04-24 20:30:58.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/ser/rtl/ser_regs.r
+- * id: ser_regs.r,v 1.23 2005/02/08 13:58:35 perz Exp
++ * id: ser_regs.r,v 1.23 2005/02/08 13:58:35 perz Exp
+ * last modfied: Mon Apr 11 16:09:21 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile ser_defs.h ../../inst/ser/rtl/ser_regs.r
+ * id: $Id: ser_defs.h,v 1.10 2005/04/24 18:30:58 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/sser_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/sser_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/sser_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/sser_defs.h 2005-04-24 20:30:58.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/syncser/rtl/sser_regs.r
+- * id: sser_regs.r,v 1.24 2005/02/11 14:27:36 gunnard Exp
++ * id: sser_regs.r,v 1.24 2005/02/11 14:27:36 gunnard Exp
+ * last modfied: Mon Apr 11 16:09:48 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile sser_defs.h ../../inst/syncser/rtl/sser_regs.r
+ * id: $Id: sser_defs.h,v 1.3 2005/04/24 18:30:58 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/strcop.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/strcop.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/strcop.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/strcop.h 2003-10-22 15:27:12.000000000 +0200
+@@ -54,4 +54,4 @@
+ hash_iv = 1
+ };
+
+-
++
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/strcop_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/strcop_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/strcop_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/strcop_defs.h 2005-04-24 20:30:58.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/strcop/rtl/strcop_regs.r
+- * id: strcop_regs.r,v 1.5 2003/10/15 12:09:45 kriskn Exp
++ * id: strcop_regs.r,v 1.5 2003/10/15 12:09:45 kriskn Exp
+ * last modfied: Mon Apr 11 16:09:38 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile strcop_defs.h ../../inst/strcop/rtl/strcop_regs.r
+ * id: $Id: strcop_defs.h,v 1.7 2005/04/24 18:30:58 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/strmux_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/strmux_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/strmux_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/strmux_defs.h 2005-04-24 20:30:58.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/strmux/rtl/guinness/strmux_regs.r
+- * id: strmux_regs.r,v 1.10 2005/02/10 10:10:46 perz Exp
++ * id: strmux_regs.r,v 1.10 2005/02/10 10:10:46 perz Exp
+ * last modfied: Mon Apr 11 16:09:43 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile strmux_defs.h ../../inst/strmux/rtl/guinness/strmux_regs.r
+ * id: $Id: strmux_defs.h,v 1.5 2005/04/24 18:30:58 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/supp_reg.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/supp_reg.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/supp_reg.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/supp_reg.h 2004-12-17 11:23:03.000000000 +0100
+@@ -37,7 +37,7 @@
+ #define RW_MM_TLB_HI 6
+ #define RW_MM_TLB_PGD 7
+
+-#define BANK_GC 0
++#define BANK_GC 0
+ #define BANK_IM 1
+ #define BANK_DM 2
+ #define BANK_BP 3
+@@ -63,7 +63,7 @@
+ SPEC_REG_WR(SPEC_REG_SRS,b); \
+ NOP(); \
+ NOP(); \
+- NOP();
++ NOP();
+
+ #define SUPP_REG_WR(r,v) \
+ __asm__ __volatile__ ("move %0, $S" STRINGIFYFY(r) "\n\t" \
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/timer_defs.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/timer_defs.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/hwregs/timer_defs.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/hwregs/timer_defs.h 2005-04-24 20:30:58.000000000 +0200
+@@ -4,9 +4,9 @@
+ /*
+ * This file is autogenerated from
+ * file: ../../inst/timer/rtl/timer_regs.r
+- * id: timer_regs.r,v 1.7 2003/03/11 11:16:59 perz Exp
++ * id: timer_regs.r,v 1.7 2003/03/11 11:16:59 perz Exp
+ * last modfied: Mon Apr 11 16:09:53 2005
+- *
++ *
+ * by /n/asic/design/tools/rdesc/src/rdes2c --outfile timer_defs.h ../../inst/timer/rtl/timer_regs.r
+ * id: $Id: timer_defs.h,v 1.6 2005/04/24 18:30:58 starvik Exp $
+ * Any changes here will be lost.
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/ide.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/ide.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/ide.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/ide.h 2005-08-23 11:44:37.000000000 +0200
+@@ -33,7 +33,7 @@
+ * together in a hwgroup, and will serialize accesses. this is good, because
+ * we can't access more than one interface at the same time on ETRAX100.
+ */
+- return ATA_INTR_VECT;
++ return ATA_INTR_VECT;
+ }
+
+ static inline unsigned long ide_default_io_base(int index)
+@@ -44,7 +44,7 @@
+ * so we can use the io_base to remember that bitfield.
+ */
+ ctrl2.sel = index;
+-
++
+ return REG_TYPE_CONV(unsigned long, reg_ata_rw_ctrl2, ctrl2);
+ }
+
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/io.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/io.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/io.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/io.h 2006-12-06 14:17:02.000000000 +0100
+@@ -1,6 +1,7 @@
+ #ifndef _ASM_ARCH_CRIS_IO_H
+ #define _ASM_ARCH_CRIS_IO_H
+
++#include <linux/spinlock.h>
+ #include <asm/arch/hwregs/reg_map.h>
+ #include <asm/arch/hwregs/reg_rdwr.h>
+ #include <asm/arch/hwregs/gio_defs.h>
+@@ -13,10 +14,11 @@
+
+ struct crisv32_ioport
+ {
+- unsigned long* oe;
+- unsigned long* data;
+- unsigned long* data_in;
++ volatile unsigned long* oe;
++ volatile unsigned long* data;
++ volatile unsigned long* data_in;
+ unsigned int pin_count;
++ spinlock_t lock;
+ };
+
+ struct crisv32_iopin
+@@ -34,22 +36,37 @@
+ extern struct crisv32_iopin crisv32_led3_green;
+ extern struct crisv32_iopin crisv32_led3_red;
+
++extern struct crisv32_iopin crisv32_led_net0_green;
++extern struct crisv32_iopin crisv32_led_net0_red;
++extern struct crisv32_iopin crisv32_led_net1_green;
++extern struct crisv32_iopin crisv32_led_net1_red;
++
+ static inline void crisv32_io_set(struct crisv32_iopin* iopin,
+ int val)
+ {
++ long flags;
++ spin_lock_irqsave(&iopin->port->lock, flags);
++
+ if (val)
+ *iopin->port->data |= iopin->bit;
+ else
+ *iopin->port->data &= ~iopin->bit;
++
++ spin_unlock_irqrestore(&iopin->port->lock, flags);
+ }
+
+ static inline void crisv32_io_set_dir(struct crisv32_iopin* iopin,
+ enum crisv32_io_dir dir)
+ {
++ long flags;
++ spin_lock_irqsave(&iopin->port->lock, flags);
++
+ if (dir == crisv32_io_dir_in)
+ *iopin->port->oe &= ~iopin->bit;
+ else
+ *iopin->port->oe |= iopin->bit;
++
++ spin_unlock_irqrestore(&iopin->port->lock, flags);
+ }
+
+ static inline int crisv32_io_rd(struct crisv32_iopin* iopin)
+@@ -60,28 +77,51 @@
+ int crisv32_io_get(struct crisv32_iopin* iopin,
+ unsigned int port, unsigned int pin);
+ int crisv32_io_get_name(struct crisv32_iopin* iopin,
+- char* name);
++ const char* name);
+
+ #define LED_OFF 0x00
+ #define LED_GREEN 0x01
+ #define LED_RED 0x02
+ #define LED_ORANGE (LED_GREEN | LED_RED)
+
+-#define LED_NETWORK_SET(x) \
+- do { \
+- LED_NETWORK_SET_G((x) & LED_GREEN); \
+- LED_NETWORK_SET_R((x) & LED_RED); \
++#if (defined(CONFIG_ETRAX_NBR_LED_GRP_ONE) || defined(CONFIG_ETRAX_NBR_LED_GRP_TWO))
++#define LED_NETWORK_GRP0_SET(x) \
++ do { \
++ LED_NETWORK_GRP0_SET_G((x) & LED_GREEN); \
++ LED_NETWORK_GRP0_SET_R((x) & LED_RED); \
+ } while (0)
++#else
++#define LED_NETWORK_GRP0_SET(x) while (0) {}
++#endif
++
++#define LED_NETWORK_GRP0_SET_G(x) \
++ crisv32_io_set(&crisv32_led_net0_green, !(x));
++
++#define LED_NETWORK_GRP0_SET_R(x) \
++ crisv32_io_set(&crisv32_led_net0_red, !(x));
++
++#if defined(CONFIG_ETRAX_NBR_LED_GRP_TWO)
++#define LED_NETWORK_GRP1_SET(x) \
++ do { \
++ LED_NETWORK_GRP1_SET_G((x) & LED_GREEN); \
++ LED_NETWORK_GRP1_SET_R((x) & LED_RED); \
++ } while (0)
++#else
++#define LED_NETWORK_GRP1_SET(x) while (0) {}
++#endif
++
++#define LED_NETWORK_GRP1_SET_G(x) \
++ crisv32_io_set(&crisv32_led_net1_green, !(x));
++
++#define LED_NETWORK_GRP1_SET_R(x) \
++ crisv32_io_set(&crisv32_led_net1_red, !(x));
++
+ #define LED_ACTIVE_SET(x) \
+ do { \
+ LED_ACTIVE_SET_G((x) & LED_GREEN); \
+ LED_ACTIVE_SET_R((x) & LED_RED); \
+ } while (0)
+
+-#define LED_NETWORK_SET_G(x) \
+- crisv32_io_set(&crisv32_led1_green, !(x));
+-#define LED_NETWORK_SET_R(x) \
+- crisv32_io_set(&crisv32_led1_red, !(x));
+ #define LED_ACTIVE_SET_G(x) \
+ crisv32_io_set(&crisv32_led2_green, !(x));
+ #define LED_ACTIVE_SET_R(x) \
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/irq.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/irq.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/irq.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/irq.h 2006-10-13 14:45:18.000000000 +0200
+@@ -50,7 +50,7 @@
+ #define IRQ_NAME2(nr) nr##_interrupt(void)
+ #define IRQ_NAME(nr) IRQ_NAME2(IRQ##nr)
+
+-/*
++/*
+ * The reason for setting the S-bit when debugging the kernel is that we want
+ * hardware breakpoints to remain active while we are in an exception handler.
+ * Note that we cannot simply copy S1, since we may come here from user-space,
+@@ -86,7 +86,7 @@
+ "moveq 1, $r11\n\t" \
+ "jump ret_from_intr\n\t" \
+ "nop\n\t");
+-/*
++/*
+ * This is subtle. The timer interrupt is crucial and it should not be disabled
+ * for too long. However, if it had been a normal interrupt as per BUILD_IRQ, it
+ * would have been BLOCK'ed, and then softirq's are run before we return here to
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/juliette.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/juliette.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/juliette.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/juliette.h 2004-06-09 11:20:19.000000000 +0200
+@@ -166,7 +166,7 @@
+ #define PA_NULL 0x3fff /* CCD/VIDEO */
+
+ typedef enum {
+- jpeg = 0,
++ jpeg = 0,
+ dummy = 1
+ } request_type;
+
+@@ -176,8 +176,8 @@
+ halfsize = 2,
+ fieldsize = 3
+ } size_type;
+-
+-typedef enum {
++
++typedef enum {
+ min = 0,
+ low = 1,
+ medium = 2,
+@@ -192,14 +192,14 @@
+ q6 = 11
+ } compr_type;
+
+-typedef enum {
++typedef enum {
+ deg_0 = 0,
+ deg_180 = 1,
+ deg_90 = 2,
+ deg_270 = 3
+ } rotation_type;
+
+-typedef enum {
++typedef enum {
+ auto_white = 0,
+ hold = 1,
+ fixed_outdoor = 2,
+@@ -207,12 +207,12 @@
+ fixed_fluor = 4
+ } white_balance_type;
+
+-typedef enum {
++typedef enum {
+ auto_exp = 0,
+ fixed_exp = 1
+ } exposure_type;
+
+-typedef enum {
++typedef enum {
+ no_window = 0,
+ center = 1,
+ top = 2,
+@@ -242,7 +242,7 @@
+ right_align = 2
+ } alignment_type;
+
+-typedef enum {
++typedef enum {
+ off = 0,
+ on = 1,
+ no = 0,
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/mmu.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/mmu.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/mmu.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/mmu.h 2004-11-23 19:36:19.000000000 +0100
+@@ -34,7 +34,7 @@
+ * +-----+------+--------+-------+--------+-------+---------+
+ */
+
+-/*
++/*
+ * Defines for accessing the bits. Also define some synonyms for use with
+ * the software-based defined bits below.
+ */
+@@ -46,7 +46,7 @@
+ #define _PAGE_SILENT_READ (1 << 3) /* Same as above. */
+ #define _PAGE_GLOBAL (1 << 4) /* Global page. */
+
+-/*
++/*
+ * The hardware doesn't care about these bits, but the kernel uses them in
+ * software.
+ */
+@@ -84,9 +84,9 @@
+
+ #define _KERNPG_TABLE (_PAGE_TABLE | _PAGE_KERNEL)
+
+-/* CRISv32 can do page protection for execute.
++/* CRISv32 can do page protection for execute.
+ * Write permissions imply read permissions.
+- * Note that the numbers are in Execute-Write-Read order!
++ * Note that the numbers are in Execute-Write-Read order!
+ */
+ #define __P000 PAGE_NONE
+ #define __P001 PAGE_READONLY
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/offset.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/offset.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/offset.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/offset.h 2005-08-29 09:36:28.000000000 +0200
+@@ -27,7 +27,7 @@
+ #define THREAD_usp 4 /* offsetof(struct thread_struct, usp) */
+ #define THREAD_ccs 8 /* offsetof(struct thread_struct, ccs) */
+
+-#define TASK_pid 149 /* offsetof(struct task_struct, pid) */
++#define TASK_pid 151 /* offsetof(struct task_struct, pid) */
+
+ #define LCLONE_VM 256 /* CLONE_VM */
+ #define LCLONE_UNTRACED 8388608 /* CLONE_UNTRACED */
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/page.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/page.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/page.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/page.h 2006-10-13 14:45:18.000000000 +0200
+@@ -11,7 +11,7 @@
+ * selected bit it's possible to convert between KSEG_x and 0x40000000 where the
+ * DRAM really resides. DRAM is virtually at 0xc.
+ */
+-#ifndef CONFIG_ETRAXFS_SIM
++#ifndef CONFIG_ETRAXFS_SIM
+ #define __pa(x) ((unsigned long)(x) & 0x7fffffff)
+ #define __va(x) ((void *)((unsigned long)(x) | 0x80000000))
+ #else
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/pinmux.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/pinmux.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/pinmux.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/pinmux.h 2005-07-02 14:30:13.000000000 +0200
+@@ -1,7 +1,7 @@
+ #ifndef _ASM_CRIS_ARCH_PINMUX_H
+ #define _ASM_CRIS_ARCH_PINMUX_H
+
+-#define PORT_B 0
++#define PORT_B 0
+ #define PORT_C 1
+ #define PORT_D 2
+ #define PORT_E 3
+@@ -34,6 +34,7 @@
+ int crisv32_pinmux_alloc(int port, int first_pin, int last_pin, enum pin_mode);
+ int crisv32_pinmux_alloc_fixed(enum fixed_function function);
+ int crisv32_pinmux_dealloc(int port, int first_pin, int last_pin);
++int crisv32_pinmux_dealloc_fixed(enum fixed_function function);
+ void crisv32_pinmux_dump(void);
+
+ #endif
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/processor.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/processor.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/processor.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/processor.h 2006-10-13 14:45:18.000000000 +0200
+@@ -19,7 +19,7 @@
+ unsigned long ccs; /* Saved flags register. */
+ };
+
+-/*
++/*
+ * User-space process size. This is hardcoded into a few places, so don't
+ * changed it unless everything's clear!
+ */
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/ptrace.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/ptrace.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/ptrace.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/ptrace.h 2004-10-21 13:51:21.000000000 +0200
+@@ -49,7 +49,7 @@
+ #define CCS_SHIFT 10 /* Shift count for each level in CCS */
+
+ /* pt_regs not only specifices the format in the user-struct during
+- * ptrace but is also the frame format used in the kernel prologue/epilogues
++ * ptrace but is also the frame format used in the kernel prologue/epilogues
+ * themselves
+ */
+
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/spinlock.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/spinlock.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/spinlock.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/spinlock.h 2007-01-09 10:31:32.000000000 +0100
+@@ -19,7 +19,7 @@
+ __asm__ volatile ("move.d %1,%0" \
+ : "=m" (lock->lock) \
+ : "r" (1) \
+- : "memory");
++ : "memory");
+ }
+
+ static inline int _raw_spin_trylock(spinlock_t *lock)
+@@ -80,7 +80,7 @@
+ {
+ unsigned long flags;
+ local_irq_save(flags);
+- _raw_spin_lock(&rw->lock);
++ _raw_spin_lock(&rw->lock);
+
+ rw->counter++;
+
+@@ -92,7 +92,7 @@
+ {
+ unsigned long flags;
+ local_irq_save(flags);
+- _raw_spin_lock(&rw->lock);
++ _raw_spin_lock(&rw->lock);
+
+ rw->counter--;
+
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/system.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/system.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/system.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/system.h 2006-10-13 14:45:18.000000000 +0200
+@@ -39,7 +39,7 @@
+ #define xchg(ptr,x) \
+ ((__typeof__(*(ptr)))__xchg((unsigned long) (x),(ptr),sizeof(*(ptr))))
+
+-#define tas(ptr) (xchg((ptr),1))
++#define tas(ptr) (xchg((ptr),1))
+
+ struct __xchg_dummy { unsigned long a[100]; };
+ #define __xg(x) ((struct __xchg_dummy *)(x))
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/timex.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/timex.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/timex.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/timex.h 2005-08-23 11:44:37.000000000 +0200
+@@ -6,8 +6,8 @@
+ #include <asm/arch/hwregs/timer_defs.h>
+
+ /*
+- * The clock runs at 100MHz, we divide it by 1000000. If you change anything
+- * here you must check time.c as well.
++ * The clock runs at 100MHz, we divide it by 1000000. If you change anything
++ * here you must check time.c as well.
+ */
+
+ #define CLOCK_TICK_RATE 100000000 /* Underlying frequency of the HZ timer */
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/tlb.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/tlb.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/tlb.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/tlb.h 2003-07-02 11:29:45.000000000 +0200
+@@ -2,8 +2,8 @@
+ #define _CRIS_ARCH_TLB_H
+
+ /*
+- * The TLB is a 64-entry cache. Each entry has a 8-bit page_id that is used
+- * to store the "process" it belongs to (=> fast mm context switch). The
++ * The TLB is a 64-entry cache. Each entry has a 8-bit page_id that is used
++ * to store the "process" it belongs to (=> fast mm context switch). The
+ * last page_id is never used so we can make TLB entries that never matches.
+ */
+ #define NUM_TLB_ENTRIES 64
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/uaccess.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/uaccess.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/uaccess.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/uaccess.h 2006-01-04 07:13:04.000000000 +0100
+@@ -1,4 +1,4 @@
+-/*
++/*
+ * Authors: Hans-Peter Nilsson (hp@axis.com)
+ *
+ */
+diff -urN linux-2.6.19.2.old/include/asm-cris/arch-v32/unistd.h linux-2.6.19.2.dev/include/asm-cris/arch-v32/unistd.h
+--- linux-2.6.19.2.old/include/asm-cris/arch-v32/unistd.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/arch-v32/unistd.h 2005-10-31 09:50:44.000000000 +0100
+@@ -16,7 +16,8 @@
+ ".endif\n\t" \
+ "break 13" \
+ : "=r" (__a) \
+- : "r" (__n_)); \
++ : "r" (__n_) \
++ : "memory"); \
+ if (__a >= 0) \
+ return (type) __a; \
+ errno = -__a; \
+@@ -33,7 +34,8 @@
+ ".endif\n\t" \
+ "break 13" \
+ : "=r" (__a) \
+- : "r" (__n_), "0" (__a)); \
++ : "r" (__n_), "0" (__a) \
++ : "memory"); \
+ if (__a >= 0) \
+ return (type) __a; \
+ errno = -__a; \
+@@ -51,7 +53,8 @@
+ ".endif\n\t" \
+ "break 13" \
+ : "=r" (__a) \
+- : "r" (__n_), "0" (__a), "r" (__b)); \
++ : "r" (__n_), "0" (__a), "r" (__b) \
++ : "memory"); \
+ if (__a >= 0) \
+ return (type) __a; \
+ errno = -__a; \
+@@ -70,7 +73,8 @@
+ ".endif\n\t" \
+ "break 13" \
+ : "=r" (__a) \
+- : "r" (__n_), "0" (__a), "r" (__b), "r" (__c)); \
++ : "r" (__n_), "0" (__a), "r" (__b), "r" (__c) \
++ : "memory"); \
+ if (__a >= 0) \
+ return (type) __a; \
+ errno = -__a; \
+@@ -91,12 +95,13 @@
+ "break 13" \
+ : "=r" (__a) \
+ : "r" (__n_), "0" (__a), "r" (__b), \
+- "r" (__c), "r" (__d)); \
++ "r" (__c), "r" (__d)\
++ : "memory"); \
+ if (__a >= 0) \
+ return (type) __a; \
+ errno = -__a; \
+ return (type) -1; \
+-}
++}
+
+ #define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \
+ type5,arg5) \
+@@ -114,7 +119,8 @@
+ "break 13" \
+ : "=r" (__a) \
+ : "r" (__n_), "0" (__a), "r" (__b), \
+- "r" (__c), "r" (__d), "h" (__e)); \
++ "r" (__c), "r" (__d), "h" (__e) \
++ : "memory"); \
+ if (__a >= 0) \
+ return (type) __a; \
+ errno = -__a; \
+@@ -138,7 +144,8 @@
+ "break 13" \
+ : "=r" (__a) \
+ : "r" (__n_), "0" (__a), "r" (__b), \
+- "r" (__c), "r" (__d), "h" (__e), "x" (__f)); \
++ "r" (__c), "r" (__d), "h" (__e), "x" (__f) \
++ : "memory"); \
+ if (__a >= 0) \
+ return (type) __a; \
+ errno = -__a; \
+diff -urN linux-2.6.19.2.old/include/asm-cris/atomic.h linux-2.6.19.2.dev/include/asm-cris/atomic.h
+--- linux-2.6.19.2.old/include/asm-cris/atomic.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/atomic.h 2006-07-03 15:11:43.000000000 +0200
+@@ -5,6 +5,7 @@
+
+ #include <asm/system.h>
+ #include <asm/arch/atomic.h>
++#include <linux/compiler.h>
+
+ /*
+ * Atomic operations that C can't guarantee us. Useful for
+@@ -89,7 +90,7 @@
+ unsigned long flags;
+ int retval;
+ cris_atomic_save(v, flags);
+- retval = (v->counter)++;
++ retval = ++(v->counter);
+ cris_atomic_restore(v, flags);
+ return retval;
+ }
+@@ -99,7 +100,7 @@
+ unsigned long flags;
+ int retval;
+ cris_atomic_save(v, flags);
+- retval = (v->counter)--;
++ retval = --(v->counter);
+ cris_atomic_restore(v, flags);
+ return retval;
+ }
+diff -urN linux-2.6.19.2.old/include/asm-cris/axisflashmap.h linux-2.6.19.2.dev/include/asm-cris/axisflashmap.h
+--- linux-2.6.19.2.old/include/asm-cris/axisflashmap.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/axisflashmap.h 2006-09-07 14:24:25.000000000 +0200
+@@ -15,18 +15,18 @@
+ /* The partitiontable_head is located at offset +10: */
+ struct partitiontable_head {
+ __u16 magic; /* PARTITION_TABLE_MAGIC */
+- __u16 size; /* Length of ptable block (not header) */
+- __u32 checksum; /* simple longword sum */
++ __u16 size; /* Length of ptable block (entries + end marker) */
++ __u32 checksum; /* simple longword sum, over entries + end marker */
+ };
+
+ /* And followed by partition table entries */
+ struct partitiontable_entry {
+- __u32 offset; /* Offset is relative to the sector the ptable is in */
+- __u32 size;
++ __u32 offset; /* relative to the sector the ptable is in */
++ __u32 size; /* in bytes */
+ __u32 checksum; /* simple longword sum */
+- __u16 type;
+- __u16 flags; /* bit 0: ro/rw = 1/0 */
+- __u32 future0; /* 16 bytes reserved for future use */
++ __u16 type; /* see type codes below */
++ __u16 flags; /* bit 0: ro/rw = 1/0 */
++ __u32 future0; /* 16 bytes reserved for future use */
+ __u32 future1;
+ __u32 future2;
+ __u32 future3;
+@@ -35,10 +35,25 @@
+ #define PARTITIONTABLE_END_MARKER 0xFFFFFFFF
+ #define PARTITIONTABLE_END_MARKER_SIZE 4
+
+-/*#define PARTITION_TYPE_RESCUE 0x0000?*/ /* Not used, maybe it should? */
++#define PARTITIONTABLE_END_PAD 10
++
++/* Complete structure for whole partition table */
++/* note that table may end before CONFIG_ETRAX_PTABLE_ENTRIES by setting
++ * offset of the last entry + 1 to PARTITIONTABLE_END_MARKER.
++ */
++struct partitiontable {
++ __u8 skip[PARTITION_TABLE_OFFSET];
++ struct partitiontable_head head;
++ struct partitiontable_entry entries[];
++};
++
+ #define PARTITION_TYPE_PARAM 0x0001
+ #define PARTITION_TYPE_KERNEL 0x0002
+ #define PARTITION_TYPE_JFFS 0x0003
++#define PARTITION_TYPE_JFFS2 0x0000
++
++#define PARTITION_FLAGS_READONLY_MASK 0x0001
++#define PARTITION_FLAGS_READONLY 0x0001
+
+ /* The master mtd for the entire flash. */
+ extern struct mtd_info* axisflash_mtd;
+diff -urN linux-2.6.19.2.old/include/asm-cris/bitops.h linux-2.6.19.2.dev/include/asm-cris/bitops.h
+--- linux-2.6.19.2.old/include/asm-cris/bitops.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/bitops.h 2007-01-09 10:31:32.000000000 +0100
+@@ -155,7 +155,7 @@
+ #include <asm-generic/bitops/hweight.h>
+ #include <asm-generic/bitops/find.h>
+
+-#include <asm-generic/bitops/ext2-non-atomic.h>
++//#include <asm-generic/bitops/ext2-non-atomic.h>
+
+ #define ext2_set_bit_atomic(l,n,a) test_and_set_bit(n,a)
+ #define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a)
+diff -urN linux-2.6.19.2.old/include/asm-cris/bug.h linux-2.6.19.2.dev/include/asm-cris/bug.h
+--- linux-2.6.19.2.old/include/asm-cris/bug.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/bug.h 2006-06-21 10:29:15.000000000 +0200
+@@ -1,4 +1,4 @@
+ #ifndef _CRIS_BUG_H
+ #define _CRIS_BUG_H
+-#include <asm-generic/bug.h>
++#include <asm/arch/bug.h>
+ #endif
+diff -urN linux-2.6.19.2.old/include/asm-cris/delay.h linux-2.6.19.2.dev/include/asm-cris/delay.h
+--- linux-2.6.19.2.old/include/asm-cris/delay.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/delay.h 2006-10-11 19:46:19.000000000 +0200
+@@ -13,10 +13,13 @@
+
+ extern unsigned long loops_per_usec; /* arch/cris/mm/init.c */
+
++/* May be defined by arch/delay.h. */
++#ifndef udelay
+ static inline void udelay(unsigned long usecs)
+ {
+ __delay(usecs * loops_per_usec);
+ }
++#endif
+
+ #endif /* defined(_CRIS_DELAY_H) */
+
+diff -urN linux-2.6.19.2.old/include/asm-cris/ethernet.h linux-2.6.19.2.dev/include/asm-cris/ethernet.h
+--- linux-2.6.19.2.old/include/asm-cris/ethernet.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/ethernet.h 2006-07-06 07:58:52.000000000 +0200
+@@ -15,4 +15,7 @@
+ #define SET_ETH_DUPLEX_AUTO SIOCDEVPRIVATE+3 /* Auto neg duplex */
+ #define SET_ETH_DUPLEX_HALF SIOCDEVPRIVATE+4 /* Full duplex */
+ #define SET_ETH_DUPLEX_FULL SIOCDEVPRIVATE+5 /* Half duplex */
++#define SET_ETH_ENABLE_LEDS SIOCDEVPRIVATE+6 /* Enable net LEDs */
++#define SET_ETH_DISABLE_LEDS SIOCDEVPRIVATE+7 /* Disable net LEDs */
++#define SET_ETH_AUTONEG SIOCDEVPRIVATE+8
+ #endif /* _CRIS_ETHERNET_H */
+diff -urN linux-2.6.19.2.old/include/asm-cris/etraxgpio.h linux-2.6.19.2.dev/include/asm-cris/etraxgpio.h
+--- linux-2.6.19.2.old/include/asm-cris/etraxgpio.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/etraxgpio.h 2007-01-09 10:31:32.000000000 +0100
+@@ -16,15 +16,19 @@
+ * For ETRAX FS (ARCH_V32):
+ * /dev/gpioa minor 0, 8 bit GPIO, each bit can change direction
+ * /dev/gpiob minor 1, 18 bit GPIO, each bit can change direction
+- * /dev/gpioc minor 2, 18 bit GPIO, each bit can change direction
+- * /dev/gpiod minor 3, 18 bit GPIO, each bit can change direction
+- * /dev/gpioe minor 4, 18 bit GPIO, each bit can change direction
+- * /dev/leds minor 5, Access to leds depending on kernelconfig
++ * /dev/gpioc minor 3, 18 bit GPIO, each bit can change direction
++ * /dev/gpiod minor 4, 18 bit GPIO, each bit can change direction
++ * /dev/gpioe minor 5, 18 bit GPIO, each bit can change direction
++ * /dev/leds minor 2, Access to leds depending on kernelconfig
+ *
+ */
+ #ifndef _ASM_ETRAXGPIO_H
+ #define _ASM_ETRAXGPIO_H
+
++#ifndef __KERNEL__
++#include <linux/autoconf.h>
++#endif
++
+ /* etraxgpio _IOC_TYPE, bits 8 to 15 in ioctl cmd */
+ #ifdef CONFIG_ETRAX_ARCH_V10
+ #define ETRAXGPIO_IOCTYPE 43
+@@ -42,8 +46,13 @@
+ #define GPIO_MINOR_C 3
+ #define GPIO_MINOR_D 4
+ #define GPIO_MINOR_E 5
++#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
++#define GPIO_MINOR_V 6
++#define GPIO_MINOR_LAST 6
++#else
+ #define GPIO_MINOR_LAST 5
+ #endif
++#endif
+
+ /* supported ioctl _IOC_NR's */
+
+diff -urN linux-2.6.19.2.old/include/asm-cris/fasttimer.h linux-2.6.19.2.dev/include/asm-cris/fasttimer.h
+--- linux-2.6.19.2.old/include/asm-cris/fasttimer.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/fasttimer.h 2006-12-11 12:22:38.000000000 +0100
+@@ -1,9 +1,9 @@
+-/* $Id: fasttimer.h,v 1.3 2004/05/14 10:19:19 starvik Exp $
++/*
+ * linux/include/asm-cris/fasttimer.h
+ *
+ * Fast timers for ETRAX100LX
+ * This may be useful in other OS than Linux so use 2 space indentation...
+- * Copyright (C) 2000, 2002 Axis Communications AB
++ * Copyright (C) 2000-2006 Axis Communications AB
+ */
+ #include <linux/time.h> /* struct timeval */
+ #include <linux/timex.h>
+@@ -12,11 +12,16 @@
+
+ typedef void fast_timer_function_type(unsigned long);
+
++struct fasttime_t {
++ unsigned long tv_jiff; /* jiffies */
++ unsigned long tv_usec; /* microseconds */
++};
++
+ struct fast_timer{ /* Close to timer_list */
+ struct fast_timer *next;
+ struct fast_timer *prev;
+- struct timeval tv_set;
+- struct timeval tv_expires;
++ struct fasttime_t tv_set;
++ struct fasttime_t tv_expires;
+ unsigned long delay_us;
+ fast_timer_function_type *function;
+ unsigned long data;
+@@ -38,6 +43,6 @@
+ void schedule_usleep(unsigned long us);
+
+
+-void fast_timer_init(void);
++int fast_timer_init(void);
+
+ #endif
+diff -urN linux-2.6.19.2.old/include/asm-cris/hardirq.h linux-2.6.19.2.dev/include/asm-cris/hardirq.h
+--- linux-2.6.19.2.old/include/asm-cris/hardirq.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/hardirq.h 2005-10-31 09:50:43.000000000 +0100
+@@ -1,6 +1,7 @@
+ #ifndef __ASM_HARDIRQ_H
+ #define __ASM_HARDIRQ_H
+
++#include <asm/irq.h>
+ #include <linux/threads.h>
+ #include <linux/cache.h>
+
+diff -urN linux-2.6.19.2.old/include/asm-cris/io.h linux-2.6.19.2.dev/include/asm-cris/io.h
+--- linux-2.6.19.2.old/include/asm-cris/io.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/io.h 2006-01-04 07:13:03.000000000 +0100
+@@ -127,8 +127,8 @@
+
+ #define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void __force *)(b),(c),(d))
+
+-/* The following is junk needed for the arch-independent code but which
+- * we never use in the CRIS port
++/* I/O port access. Normally there is no I/O space on CRIS but when Cardbus/PCI
++ * is enable the request is passed through the bridge.
+ */
+
+ #define IO_SPACE_LIMIT 0xffff
+diff -urN linux-2.6.19.2.old/include/asm-cris/irq_regs.h linux-2.6.19.2.dev/include/asm-cris/irq_regs.h
+--- linux-2.6.19.2.old/include/asm-cris/irq_regs.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/irq_regs.h 2007-01-09 10:31:32.000000000 +0100
+@@ -0,0 +1 @@
++#include <asm-generic/irq_regs.h>
+diff -urN linux-2.6.19.2.old/include/asm-cris/pgtable.h linux-2.6.19.2.dev/include/asm-cris/pgtable.h
+--- linux-2.6.19.2.old/include/asm-cris/pgtable.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/pgtable.h 2007-01-12 15:41:37.000000000 +0100
+@@ -279,7 +279,7 @@
+ #define pte_unmap(pte) do { } while (0)
+ #define pte_unmap_nested(pte) do { } while (0)
+ #define pte_pfn(x) ((unsigned long)(__va((x).pte)) >> PAGE_SHIFT)
+-#define pfn_pte(pfn, prot) __pte((__pa((pfn) << PAGE_SHIFT)) | pgprot_val(prot))
++#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
+
+ #define pte_ERROR(e) \
+ printk("%s:%d: bad pte %p(%08lx).\n", __FILE__, __LINE__, &(e), pte_val(e))
+diff -urN linux-2.6.19.2.old/include/asm-cris/semaphore-helper.h linux-2.6.19.2.dev/include/asm-cris/semaphore-helper.h
+--- linux-2.6.19.2.old/include/asm-cris/semaphore-helper.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/semaphore-helper.h 2005-08-23 11:44:35.000000000 +0200
+@@ -20,12 +20,12 @@
+ /*
+ * These two _must_ execute atomically wrt each other.
+ */
+-extern inline void wake_one_more(struct semaphore * sem)
++static inline void wake_one_more(struct semaphore * sem)
+ {
+ atomic_inc(&sem->waking);
+ }
+
+-extern inline int waking_non_zero(struct semaphore *sem)
++static inline int waking_non_zero(struct semaphore *sem)
+ {
+ unsigned long flags;
+ int ret = 0;
+@@ -40,7 +40,7 @@
+ return ret;
+ }
+
+-extern inline int waking_non_zero_interruptible(struct semaphore *sem,
++static inline int waking_non_zero_interruptible(struct semaphore *sem,
+ struct task_struct *tsk)
+ {
+ int ret = 0;
+@@ -59,7 +59,7 @@
+ return ret;
+ }
+
+-extern inline int waking_non_zero_trylock(struct semaphore *sem)
++static inline int waking_non_zero_trylock(struct semaphore *sem)
+ {
+ int ret = 1;
+ unsigned long flags;
+diff -urN linux-2.6.19.2.old/include/asm-cris/semaphore.h linux-2.6.19.2.dev/include/asm-cris/semaphore.h
+--- linux-2.6.19.2.old/include/asm-cris/semaphore.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/semaphore.h 2006-01-04 07:13:03.000000000 +0100
+@@ -51,7 +51,6 @@
+ {
+ sema_init(sem, 0);
+ }
+-
+ extern void __down(struct semaphore * sem);
+ extern int __down_interruptible(struct semaphore * sem);
+ extern int __down_trylock(struct semaphore * sem);
+diff -urN linux-2.6.19.2.old/include/asm-cris/smp.h linux-2.6.19.2.dev/include/asm-cris/smp.h
+--- linux-2.6.19.2.old/include/asm-cris/smp.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/smp.h 2005-10-31 09:50:43.000000000 +0100
+@@ -4,7 +4,7 @@
+ #include <linux/cpumask.h>
+
+ extern cpumask_t phys_cpu_present_map;
+-#define cpu_possible_map phys_cpu_present_map
++extern cpumask_t cpu_possible_map;
+
+ #define __smp_processor_id() (current_thread_info()->cpu)
+
+diff -urN linux-2.6.19.2.old/include/asm-cris/sync_serial.h linux-2.6.19.2.dev/include/asm-cris/sync_serial.h
+--- linux-2.6.19.2.old/include/asm-cris/sync_serial.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/sync_serial.h 2005-11-10 15:43:16.000000000 +0100
+@@ -1,9 +1,9 @@
+-/*
++/*
+ * ioctl defines for synchronous serial port driver
+ *
+ * Copyright (c) 2001-2003 Axis Communications AB
+- *
+- * Author: Mikael Starvik
++ *
++ * Author: Mikael Starvik
+ *
+ */
+
+@@ -24,7 +24,7 @@
+ #define SSP150 0
+ #define SSP300 1
+ #define SSP600 2
+-#define SSP1200 3
++#define SSP1200 3
+ #define SSP2400 4
+ #define SSP4800 5
+ #define SSP9600 6
+@@ -67,6 +67,7 @@
+ /* Values for SSP_FRAME_SYNC */
+ #define NORMAL_SYNC 1
+ #define EARLY_SYNC 2
++#define SECOND_WORD_SYNC 0x40000
+
+ #define BIT_SYNC 4
+ #define WORD_SYNC 8
+@@ -86,6 +87,8 @@
+ #define CLOCK_GATED 0x10000
+ #define CLOCK_NOT_GATED 0x20000
+
++
++
+ /* Values for SSP_IPOLARITY and SSP_OPOLARITY */
+ #define CLOCK_NORMAL 1
+ #define CLOCK_INVERT 2
+diff -urN linux-2.6.19.2.old/include/asm-cris/thread_info.h linux-2.6.19.2.dev/include/asm-cris/thread_info.h
+--- linux-2.6.19.2.old/include/asm-cris/thread_info.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/thread_info.h 2006-03-22 11:01:27.000000000 +0100
+@@ -32,6 +32,7 @@
+ unsigned long flags; /* low level flags */
+ __u32 cpu; /* current CPU */
+ int preempt_count; /* 0 => preemptable, <0 => BUG */
++ __u32 tls; /* TLS for this thread */
+
+ mm_segment_t addr_limit; /* thread address space:
+ 0-0xBFFFFFFF for user-thead
+@@ -82,6 +83,7 @@
+ #define TIF_NOTIFY_RESUME 1 /* resumption notification requested */
+ #define TIF_SIGPENDING 2 /* signal pending */
+ #define TIF_NEED_RESCHED 3 /* rescheduling necessary */
++#define TIF_RESTORE_SIGMASK 9 /* restore signal mask in do_signal() */
+ #define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
+ #define TIF_MEMDIE 17
+
+@@ -89,6 +91,7 @@
+ #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
+ #define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
+ #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
++#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
+ #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
+
+ #define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
+diff -urN linux-2.6.19.2.old/include/asm-cris/unistd.h linux-2.6.19.2.dev/include/asm-cris/unistd.h
+--- linux-2.6.19.2.old/include/asm-cris/unistd.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/include/asm-cris/unistd.h 2007-01-09 10:31:32.000000000 +0100
+@@ -255,6 +255,7 @@
+ #define __NR_io_submit 248
+ #define __NR_io_cancel 249
+ #define __NR_fadvise64 250
++/* 251 is available for reuse (was briefly sys_set_zone_reclaim) */
+ #define __NR_exit_group 252
+ #define __NR_lookup_dcookie 253
+ #define __NR_epoll_create 254
+@@ -292,10 +293,41 @@
+ #define __NR_add_key 286
+ #define __NR_request_key 287
+ #define __NR_keyctl 288
++#define __NR_ioprio_set 289
++#define __NR_ioprio_get 290
++#define __NR_inotify_init 291
++#define __NR_inotify_add_watch 292
++#define __NR_inotify_rm_watch 293
++#define __NR_migrate_pages 294
++#define __NR_openat 295
++#define __NR_mkdirat 296
++#define __NR_mknodat 297
++#define __NR_fchownat 298
++#define __NR_futimesat 299
++#define __NR_fstatat64 300
++#define __NR_unlinkat 301
++#define __NR_renameat 302
++#define __NR_linkat 303
++#define __NR_symlinkat 304
++#define __NR_readlinkat 305
++#define __NR_fchmodat 306
++#define __NR_faccessat 307
++#define __NR_pselect6 308
++#define __NR_ppoll 309
++#define __NR_unshare 310
++#define __NR_set_robust_list 311
++#define __NR_get_robust_list 312
++#define __NR_splice 313
++#define __NR_sync_file_range 314
++#define __NR_tee 315
++#define __NR_vmsplice 316
++#define __NR_move_pages 317
++#define __NR_getcpu 318
++#define __NR_epoll_pwait 319
+
+ #ifdef __KERNEL__
+
+-#define NR_syscalls 289
++#define NR_syscalls 320
+
+ #include <asm/arch/unistd.h>
+
+@@ -321,6 +353,7 @@
+ #define __ARCH_WANT_SYS_SIGPENDING
+ #define __ARCH_WANT_SYS_SIGPROCMASK
+ #define __ARCH_WANT_SYS_RT_SIGACTION
++#define __ARCH_WANT_SYS_RT_SIGSUSPEND
+
+ /*
+ * "Conditional" syscalls
--- /dev/null
+diff -urN linux-2.6.19.2.old/arch/cris/Kconfig linux-2.6.19.2.dev/arch/cris/Kconfig
+--- linux-2.6.19.2.old/arch/cris/Kconfig 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/Kconfig 2007-01-17 18:17:18.000000000 +0100
+@@ -16,6 +16,10 @@
+ config RWSEM_XCHGADD_ALGORITHM
+ bool
+
++config GENERIC_IOMAP
++ bool
++ default y
++
+ config GENERIC_FIND_NEXT_BIT
+ bool
+ default y
+@@ -42,6 +46,29 @@
+
+ source "fs/Kconfig.binfmt"
+
++config GENERIC_HARDIRQS
++ bool
++ default y
++
++config SMP
++ bool "SMP"
++ help
++ SMP support. Always Say N.
++
++config NR_CPUS
++ int
++ depends on SMP
++ default 2
++
++config SCHED_MC
++ bool "Multi-core scheduler support"
++ depends on SMP
++ default y
++ help
++ Multi-core scheduler support improves the CPU scheduler's decision
++ making when dealing with multi-core CPU chips at a cost of slightly
++ increased overhead in some places. If unsure say N here.
++
+ config ETRAX_CMDLINE
+ string "Kernel command line"
+ default "root=/dev/mtdblock3"
+@@ -70,17 +97,11 @@
+ timers).
+ This is needed if CONFIG_ETRAX_SERIAL_FAST_TIMER is enabled.
+
+-config PREEMPT
+- bool "Preemptible Kernel"
+- help
+- This option reduces the latency of the kernel when reacting to
+- real-time or interactive events by allowing a low priority process to
+- be preempted even if it is in kernel mode executing a system call.
+- This allows applications to run more reliably even when the system is
+- under load.
++config OOM_REBOOT
++ bool "Enable reboot at out of memory"
+
+- Say Y here if you are building a kernel for a desktop, embedded
+- or real-time system. Say N if you are unsure.
++source "kernel/Kconfig.preempt"
++source "kernel/Kconfig.sched"
+
+ source mm/Kconfig
+
+@@ -107,6 +128,16 @@
+ help
+ Support the xsim ETRAX Simulator.
+
++config ETRAXFS
++ bool "ETRAX-FS-V32"
++ help
++ Support CRIS V32.
++
++config ETRAXFS_SIM
++ bool "ETRAX-FS-V32-Simulator"
++ help
++ Support CRIS V32 VCS simualtor.
++
+ endchoice
+
+ config ETRAX_ARCH_V10
+@@ -114,6 +145,11 @@
+ default y if ETRAX100LX || ETRAX100LX_V2
+ default n if !(ETRAX100LX || ETRAX100LX_V2)
+
++config ETRAX_ARCH_V32
++ bool
++ default y if ETRAXFS || ETRAXFS_SIM
++ default n if !(ETRAXFS || ETRAXFS_SIM)
++
+ config ETRAX_DRAM_SIZE
+ int "DRAM size (dec, in MB)"
+ default "8"
+@@ -121,12 +157,23 @@
+ Size of DRAM (decimal in MB) typically 2, 8 or 16.
+
+ config ETRAX_FLASH_BUSWIDTH
+- int "Buswidth of flash in bytes"
++ int "Buswidth of NOR flash in bytes"
+ default "2"
+ help
+- Width in bytes of the Flash bus (1, 2 or 4). Is usually 2.
++ Width in bytes of the NOR Flash bus (1, 2 or 4). Is usually 2.
+
+-source arch/cris/arch-v10/Kconfig
++config ETRAX_NANDFLASH_BUSWIDTH
++ int "Buswidth of NAND flash in bytes"
++ default "1"
++ help
++ Width in bytes of the NAND flash (1 or 2).
++
++config ETRAX_FLASH1_SIZE
++ int "FLASH1 size (dec, in MB. 0 = Unknown)"
++ default "0"
++
++# arch/cris/arch is a symlink to correct arch (arch-v10 or arch-v32)
++source arch/cris/arch/Kconfig
+
+ endmenu
+
+@@ -134,7 +181,8 @@
+
+ # bring in ETRAX built-in drivers
+ menu "Drivers for built-in interfaces"
+-source arch/cris/arch-v10/drivers/Kconfig
++# arch/cris/arch is a symlink to correct arch (arch-v10 or arch-v32)
++source arch/cris/arch/drivers/Kconfig
+
+ endmenu
+
+@@ -181,6 +229,10 @@
+
+ source "sound/Kconfig"
+
++source "drivers/pcmcia/Kconfig"
++
++source "drivers/pci/Kconfig"
++
+ source "drivers/usb/Kconfig"
+
+ source "arch/cris/Kconfig.debug"
+diff -urN linux-2.6.19.2.old/arch/cris/Kconfig.debug linux-2.6.19.2.dev/arch/cris/Kconfig.debug
+--- linux-2.6.19.2.old/arch/cris/Kconfig.debug 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/Kconfig.debug 2005-10-31 09:48:02.000000000 +0100
+@@ -1,14 +1,15 @@
+ menu "Kernel hacking"
+
++source "lib/Kconfig.debug"
++
+ #bool 'Debug kmalloc/kfree' CONFIG_DEBUG_MALLOC
++
+ config PROFILING
+ bool "Kernel profiling support"
+
+ config SYSTEM_PROFILER
+ bool "System profiling support"
+
+-source "lib/Kconfig.debug"
+-
+ config ETRAX_KGDB
+ bool "Use kernel GDB debugger"
+ depends on DEBUG_KERNEL
+diff -urN linux-2.6.19.2.old/arch/cris/Makefile linux-2.6.19.2.dev/arch/cris/Makefile
+--- linux-2.6.19.2.old/arch/cris/Makefile 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/Makefile 2006-11-29 17:05:40.000000000 +0100
+@@ -1,4 +1,4 @@
+-# $Id: Makefile,v 1.28 2005/03/17 10:44:37 larsv Exp $
++# $Id: Makefile,v 1.41 2006/11/29 16:05:40 ricardw Exp $
+ # cris/Makefile
+ #
+ # This file is included by the global makefile so that you can add your own
+@@ -10,14 +10,11 @@
+ # License. See the file "COPYING" in the main directory of this archive
+ # for more details.
+
+-# A bug in ld prevents us from having a (constant-value) symbol in a
+-# "ORIGIN =" or "LENGTH =" expression.
+-
+ arch-y := v10
+ arch-$(CONFIG_ETRAX_ARCH_V10) := v10
+ arch-$(CONFIG_ETRAX_ARCH_V32) := v32
+
+-# No config avaiable for make clean etc
++# No config available for make clean etc
+ ifneq ($(arch-y),)
+ SARCH := arch-$(arch-y)
+ else
+@@ -52,79 +49,58 @@
+ # cris object files path
+ OBJ_ARCH = $(objtree)/arch/$(ARCH)
+
+-target_boot_arch_dir = $(OBJ_ARCH)/$(SARCH)/boot
+-target_boot_dir = $(OBJ_ARCH)/boot
+-src_boot_dir = $(SRC_ARCH)/boot
+-target_compressed_dir = $(OBJ_ARCH)/boot/compressed
+-src_compressed_dir = $(SRC_ARCH)/boot/compressed
+-target_rescue_dir = $(OBJ_ARCH)/boot/rescue
+-src_rescue_dir = $(SRC_ARCH)/boot/rescue
+-
+-export target_boot_arch_dir target_boot_dir src_boot_dir target_compressed_dir src_compressed_dir target_rescue_dir src_rescue_dir
+-
+-vmlinux.bin: vmlinux
+- $(OBJCOPY) $(OBJCOPYFLAGS) vmlinux vmlinux.bin
+-
+-timage: vmlinux.bin
+- cat vmlinux.bin cramfs.img >timage
+-
+-simimage: timage
+- cp vmlinux.bin simvmlinux.bin
+-
+-# the following will remake timage without compiling the kernel
+-# it does of course require that all object files exist...
+-
+-cramfs:
+-## cramfs - Creates a cramfs image
+- mkcramfs -b 8192 -m romfs_meta.txt root cramfs.img
+- cat vmlinux.bin cramfs.img >timage
+-
+-clinux: vmlinux.bin decompress.bin rescue.bin
+-
+-decompress.bin: $(target_boot_dir)
+- @$(MAKE) -f $(src_compressed_dir)/Makefile $(target_compressed_dir)/decompress.bin
+-
+-$(target_rescue_dir)/rescue.bin: $(target_boot_dir)
+- @$(MAKE) -f $(src_rescue_dir)/Makefile $(target_rescue_dir)/rescue.bin
++boot := arch/$(ARCH)/boot
++MACHINE := arch/$(ARCH)/$(SARCH)
+
+-zImage: $(target_boot_dir) vmlinux.bin $(target_rescue_dir)/rescue.bin
+-## zImage - Compressed kernel (gzip)
+- @$(MAKE) -f $(src_boot_dir)/Makefile zImage
++all: zImage
+
+-$(target_boot_dir): $(target_boot_arch_dir)
+- ln -sfn $< $@
+-
+-$(target_boot_arch_dir):
+- mkdir -p $@
+-
+-compressed: zImage
+-
+-archmrproper:
+-archclean:
+- @if [ -d arch/$(ARCH)/boot ]; then \
+- $(MAKE) $(clean)=arch/$(ARCH)/boot ; \
+- fi
+- rm -f timage vmlinux.bin decompress.bin rescue.bin cramfs.img
+- rm -rf $(LD_SCRIPT).tmp
++zImage Image: vmlinux
++ $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@
+
+ archprepare: $(SRC_ARCH)/.links $(srctree)/include/asm-$(ARCH)/.arch
+
+ # Create some links to make all tools happy
+ $(SRC_ARCH)/.links:
+ @rm -rf $(SRC_ARCH)/drivers
+- @ln -sfn $(SRC_ARCH)/$(SARCH)/drivers $(SRC_ARCH)/drivers
++ @ln -sfn $(SARCH)/drivers $(SRC_ARCH)/drivers
+ @rm -rf $(SRC_ARCH)/boot
+- @ln -sfn $(SRC_ARCH)/$(SARCH)/boot $(SRC_ARCH)/boot
++ @ln -sfn $(SARCH)/boot $(SRC_ARCH)/boot
+ @rm -rf $(SRC_ARCH)/lib
+- @ln -sfn $(SRC_ARCH)/$(SARCH)/lib $(SRC_ARCH)/lib
+- @ln -sfn $(SRC_ARCH)/$(SARCH) $(SRC_ARCH)/arch
+- @ln -sfn $(SRC_ARCH)/$(SARCH)/vmlinux.lds.S $(SRC_ARCH)/kernel/vmlinux.lds.S
+- @ln -sfn $(SRC_ARCH)/$(SARCH)/kernel/asm-offsets.c $(SRC_ARCH)/kernel/asm-offsets.c
++ @ln -sfn $(SARCH)/lib $(SRC_ARCH)/lib
++ @rm -rf $(SRC_ARCH)/arch
++ @ln -sfn $(SARCH) $(SRC_ARCH)/arch
++ @rm -rf $(SRC_ARCH)/kernel/vmlinux.lds.S
++ @ln -sfn ../$(SARCH)/vmlinux.lds.S $(SRC_ARCH)/kernel/vmlinux.lds.S
++ @rm -rf $(SRC_ARCH)/kernel/asm-offsets.c
++ @ln -sfn ../$(SARCH)/kernel/asm-offsets.c $(SRC_ARCH)/kernel/asm-offsets.c
+ @touch $@
+
+ # Create link to sub arch includes
+ $(srctree)/include/asm-$(ARCH)/.arch: $(wildcard include/config/arch/*.h)
+- @echo ' Making $(srctree)/include/asm-$(ARCH)/arch -> $(srctree)/include/asm-$(ARCH)/$(SARCH) symlink'
++ @echo ' SYMLINK include/asm-$(ARCH)/arch -> include/asm-$(ARCH)/$(SARCH)'
+ @rm -f include/asm-$(ARCH)/arch
+- @ln -sf $(srctree)/include/asm-$(ARCH)/$(SARCH) $(srctree)/include/asm-$(ARCH)/arch
++ @ln -sf $(SARCH) $(srctree)/include/asm-$(ARCH)/arch
+ @touch $@
++
++archclean:
++ $(Q)if [ -e arch/$(ARCH)/boot ]; then \
++ $(MAKE) $(clean)=arch/$(ARCH)/boot; \
++ fi
++
++CLEAN_FILES += \
++ $(MACHINE)/boot/zImage \
++ $(SRC_ARCH)/.links \
++ $(srctree)/include/asm-$(ARCH)/.arch
++
++MRPROPER_FILES += \
++ $(SRC_ARCH)/drivers \
++ $(SRC_ARCH)/boot \
++ $(SRC_ARCH)/lib \
++ $(SRC_ARCH)/arch \
++ $(SRC_ARCH)/kernel/vmlinux.lds.S \
++ $(SRC_ARCH)/kernel/asm-offsets.c
++
++define archhelp
++ echo '* zImage - Compressed kernel image (arch/$(ARCH)/boot/zImage)'
++ echo '* Image - Uncompressed kernel image (arch/$(ARCH)/boot/Image)'
++endef
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/README.mm linux-2.6.19.2.dev/arch/cris/arch-v10/README.mm
+--- linux-2.6.19.2.old/arch/cris/arch-v10/README.mm 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/README.mm 2005-08-23 11:44:32.000000000 +0200
+@@ -3,6 +3,9 @@
+ HISTORY:
+
+ $Log: README.mm,v $
++Revision 1.2 2005/08/23 09:44:32 starvik
++extern inline -> static inline. Patch provided by Adrian Bunk <bunk@stusta.de>
++
+ Revision 1.1 2001/12/17 13:59:27 bjornw
+ Initial revision
+
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/boot/Makefile linux-2.6.19.2.dev/arch/cris/arch-v10/boot/Makefile
+--- linux-2.6.19.2.old/arch/cris/arch-v10/boot/Makefile 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/boot/Makefile 2006-11-29 17:05:40.000000000 +0100
+@@ -1,13 +1,21 @@
+ #
+-# arch/cris/boot/Makefile
++# arch/cris/arch-v10/boot/Makefile
+ #
+-target = $(target_boot_dir)
+-src = $(src_boot_dir)
+
+-zImage: compressed/vmlinuz
++OBJCOPY = objcopy-cris
++OBJCOPYFLAGS = -O binary --remove-section=.bss
+
+-compressed/vmlinuz:
+- @$(MAKE) -f $(src)/compressed/Makefile $(target_compressed_dir)/vmlinuz
++subdir- := compressed rescue
++targets := Image
+
+-clean:
+- @$(MAKE) -f $(src)/compressed/Makefile clean
++$(obj)/Image: vmlinux FORCE
++ $(call if_changed,objcopy)
++ @echo ' Kernel: $@ is ready'
++
++$(obj)/compressed/vmlinux: $(obj)/Image FORCE
++ $(Q)$(MAKE) $(build)=$(obj)/compressed $@
++ $(Q)$(MAKE) $(build)=$(obj)/rescue $(obj)/rescue/rescue.bin
++
++$(obj)/zImage: $(obj)/compressed/vmlinux
++ @cp $< $@
++ @echo ' Kernel: $@ is ready'
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/boot/compressed/Makefile linux-2.6.19.2.dev/arch/cris/arch-v10/boot/compressed/Makefile
+--- linux-2.6.19.2.old/arch/cris/arch-v10/boot/compressed/Makefile 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/boot/compressed/Makefile 2006-10-11 17:47:04.000000000 +0200
+@@ -1,45 +1,34 @@
+ #
+-# create a compressed vmlinuz image from the binary vmlinux.bin file
++# arch/cris/arch-v10/boot/compressed/Makefile
+ #
+-target = $(target_compressed_dir)
+-src = $(src_compressed_dir)
+
+ CC = gcc-cris -melf $(LINUXINCLUDE)
+ CFLAGS = -O2
+ LD = ld-cris
++LDFLAGS = -T $(obj)/decompress.ld
++OBJECTS = $(obj)/head.o $(obj)/misc.o
+ OBJCOPY = objcopy-cris
+ OBJCOPYFLAGS = -O binary --remove-section=.bss
+-OBJECTS = $(target)/head.o $(target)/misc.o
+
+-# files to compress
+-SYSTEM = $(objtree)/vmlinux.bin
++quiet_cmd_image = BUILD $@
++cmd_image = cat $(obj)/decompress.bin $(obj)/piggy.gz > $@
+
+-all: $(target_compressed_dir)/vmlinuz
++targets := vmlinux piggy.gz decompress.o decompress.bin
+
+-$(target)/decompress.bin: $(OBJECTS)
+- $(LD) -T $(src)/decompress.ld -o $(target)/decompress.o $(OBJECTS)
+- $(OBJCOPY) $(OBJCOPYFLAGS) $(target)/decompress.o $(target)/decompress.bin
++$(obj)/decompress.o: $(OBJECTS) FORCE
++ $(call if_changed,ld)
+
+-# Create vmlinuz image in top-level build directory
+-$(target_compressed_dir)/vmlinuz: $(target) piggy.img $(target)/decompress.bin
+- @echo " COMPR vmlinux.bin --> vmlinuz"
+- @cat $(target)/decompress.bin piggy.img > $(target_compressed_dir)/vmlinuz
+- @rm -f piggy.img
++$(obj)/decompress.bin: $(obj)/decompress.o FORCE
++ $(call if_changed,objcopy)
+
+-$(target)/head.o: $(src)/head.S
+- $(CC) -D__ASSEMBLY__ -traditional -c $< -o $@
++$(obj)/head.o: $(obj)/head.S .config
++ @$(CC) -D__ASSEMBLY__ -traditional -c $< -o $@
+
+-$(target)/misc.o: $(src)/misc.c
+- $(CC) -D__KERNEL__ -c $< -o $@
++$(obj)/misc.o: $(obj)/misc.c .config
++ @$(CC) -D__KERNEL__ -c $< -o $@
+
+-# gzip the kernel image
+-
+-piggy.img: $(SYSTEM)
+- @cat $(SYSTEM) | gzip -f -9 > piggy.img
+-
+-$(target):
+- mkdir -p $(target)
+-
+-clean:
+- rm -f piggy.img $(objtree)/vmlinuz
++$(obj)/vmlinux: $(obj)/piggy.gz $(obj)/decompress.bin FORCE
++ $(call if_changed,image)
+
++$(obj)/piggy.gz: $(obj)/../Image FORCE
++ $(call if_changed,gzip)
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/boot/compressed/misc.c linux-2.6.19.2.dev/arch/cris/arch-v10/boot/compressed/misc.c
+--- linux-2.6.19.2.old/arch/cris/arch-v10/boot/compressed/misc.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/boot/compressed/misc.c 2006-10-13 14:43:10.000000000 +0200
+@@ -1,7 +1,7 @@
+ /*
+ * misc.c
+ *
+- * $Id: misc.c,v 1.6 2003/10/27 08:04:31 starvik Exp $
++ * $Id: misc.c,v 1.7 2006/10/13 12:43:10 starvik Exp $
+ *
+ * This is a collection of several routines from gzip-1.0.3
+ * adapted for Linux.
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/boot/rescue/Makefile linux-2.6.19.2.dev/arch/cris/arch-v10/boot/rescue/Makefile
+--- linux-2.6.19.2.old/arch/cris/arch-v10/boot/rescue/Makefile 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/boot/rescue/Makefile 2006-11-30 11:42:39.000000000 +0100
+@@ -1,56 +1,38 @@
+ #
+-# Makefile for rescue code
++# Makefile for rescue (bootstrap) code
+ #
+-target = $(target_rescue_dir)
+-src = $(src_rescue_dir)
+
+ CC = gcc-cris -mlinux $(LINUXINCLUDE)
+ CFLAGS = -O2
+-LD = gcc-cris -mlinux -nostdlib
++AFLAGS = -traditional
++LD = gcc-cris -mlinux -nostdlib
++LDFLAGS = -T $(obj)/rescue.ld
+ OBJCOPY = objcopy-cris
+ OBJCOPYFLAGS = -O binary --remove-section=.bss
++obj-y = head.o
++OBJECT = $(obj)/$(obj-y)
+
+-all: $(target)/rescue.bin $(target)/testrescue.bin $(target)/kimagerescue.bin
++targets := rescue.o rescue.bin
+
+-$(target)/rescue.bin: $(target) $(target)/head.o
+- $(LD) -T $(src)/rescue.ld -o $(target)/rescue.o $(target)/head.o
+- $(OBJCOPY) $(OBJCOPYFLAGS) $(target)/rescue.o $(target)/rescue.bin
+-# Place a copy in top-level build directory
+- cp -p $(target)/rescue.bin $(objtree)
++$(obj)/rescue.o: $(OBJECT) FORCE
++ $(call if_changed,ld)
+
+-$(target)/testrescue.bin: $(target) $(target)/testrescue.o
+- $(OBJCOPY) $(OBJCOPYFLAGS) $(target)/testrescue.o tr.bin
++$(obj)/rescue.bin: $(obj)/rescue.o FORCE
++ $(call if_changed,objcopy)
++ cp -p $(obj)/rescue.bin $(objtree)
++
++$(obj)/testrescue.bin: $(obj)/testrescue.o
++ $(OBJCOPY) $(OBJCOPYFLAGS) $(obj)/testrescue.o tr.bin
+ # Pad it to 784 bytes
+ dd if=/dev/zero of=tmp2423 bs=1 count=784
+ cat tr.bin tmp2423 >testrescue_tmp.bin
+- dd if=testrescue_tmp.bin of=$(target)/testrescue.bin bs=1 count=784
++ dd if=testrescue_tmp.bin of=$(obj)/testrescue.bin bs=1 count=784
+ rm tr.bin tmp2423 testrescue_tmp.bin
+
+-$(target)/kimagerescue.bin: $(target) $(target)/kimagerescue.o
+- $(OBJCOPY) $(OBJCOPYFLAGS) $(target)/kimagerescue.o ktr.bin
++$(obj)/kimagerescue.bin: $(obj)/kimagerescue.o
++ $(OBJCOPY) $(OBJCOPYFLAGS) $(obj)/kimagerescue.o ktr.bin
+ # Pad it to 784 bytes, that's what the rescue loader expects
+ dd if=/dev/zero of=tmp2423 bs=1 count=784
+ cat ktr.bin tmp2423 >kimagerescue_tmp.bin
+- dd if=kimagerescue_tmp.bin of=$(target)/kimagerescue.bin bs=1 count=784
++ dd if=kimagerescue_tmp.bin of=$(obj)/kimagerescue.bin bs=1 count=784
+ rm ktr.bin tmp2423 kimagerescue_tmp.bin
+-
+-$(target):
+- mkdir -p $(target)
+-
+-$(target)/head.o: $(src)/head.S
+- $(CC) -D__ASSEMBLY__ -traditional -c $< -o $*.o
+-
+-$(target)/testrescue.o: $(src)/testrescue.S
+- $(CC) -D__ASSEMBLY__ -traditional -c $< -o $*.o
+-
+-$(target)/kimagerescue.o: $(src)/kimagerescue.S
+- $(CC) -D__ASSEMBLY__ -traditional -c $< -o $*.o
+-
+-clean:
+- rm -f $(target)/*.o $(target)/*.bin
+-
+-fastdep:
+-
+-modules:
+-
+-modules-install:
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/boot/rescue/head.S linux-2.6.19.2.dev/arch/cris/arch-v10/boot/rescue/head.S
+--- linux-2.6.19.2.old/arch/cris/arch-v10/boot/rescue/head.S 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/boot/rescue/head.S 2006-10-13 14:43:10.000000000 +0200
+@@ -1,4 +1,4 @@
+-/* $Id: head.S,v 1.7 2005/03/07 12:11:06 starvik Exp $
++/* $Id: head.S,v 1.9 2006/10/13 12:43:10 starvik Exp $
+ *
+ * Rescue code, made to reside at the beginning of the
+ * flash-memory. when it starts, it checks a partition
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/boot/rescue/kimagerescue.S linux-2.6.19.2.dev/arch/cris/arch-v10/boot/rescue/kimagerescue.S
+--- linux-2.6.19.2.old/arch/cris/arch-v10/boot/rescue/kimagerescue.S 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/boot/rescue/kimagerescue.S 2006-11-29 17:05:41.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* $Id: kimagerescue.S,v 1.1 2001/12/17 13:59:27 bjornw Exp $
++/* $Id: kimagerescue.S,v 1.3 2006/11/29 16:05:41 ricardw Exp $
+ *
+ * Rescue code to be prepended on a kimage and copied to the
+ * rescue serial port.
+@@ -7,7 +7,7 @@
+ */
+
+ #define ASSEMBLER_MACROS_ONLY
+-#include <asm/sv_addr_ag.h>
++#include <asm/arch/sv_addr_ag.h>
+
+ #define CODE_START 0x40004000
+ #define CODE_LENGTH 784
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/boot/rescue/testrescue.S linux-2.6.19.2.dev/arch/cris/arch-v10/boot/rescue/testrescue.S
+--- linux-2.6.19.2.old/arch/cris/arch-v10/boot/rescue/testrescue.S 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/boot/rescue/testrescue.S 2006-11-29 17:05:41.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* $Id: testrescue.S,v 1.1 2001/12/17 13:59:27 bjornw Exp $
++/* $Id: testrescue.S,v 1.2 2006/11/29 16:05:41 ricardw Exp $
+ *
+ * Simple testcode to download by the rescue block.
+ * Just lits some LEDs to show it was downloaded correctly.
+@@ -7,7 +7,7 @@
+ */
+
+ #define ASSEMBLER_MACROS_ONLY
+-#include <asm/sv_addr_ag.h>
++#include <asm/arch/sv_addr_ag.h>
+
+ .text
+
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/defconfig linux-2.6.19.2.dev/arch/cris/arch-v10/defconfig
+--- linux-2.6.19.2.old/arch/cris/arch-v10/defconfig 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/defconfig 2006-01-03 15:48:23.000000000 +0100
+@@ -106,7 +106,6 @@
+ CONFIG_ETRAX_I2C_USES_PB_NOT_PB_I2C=y
+ # CONFIG_ETRAX_I2C_EEPROM is not set
+ CONFIG_ETRAX_GPIO=y
+-CONFIG_ETRAX_PA_BUTTON_BITMASK=02
+ CONFIG_ETRAX_PA_CHANGEABLE_DIR=00
+ CONFIG_ETRAX_PA_CHANGEABLE_BITS=FF
+ CONFIG_ETRAX_PB_CHANGEABLE_DIR=00
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/drivers/Kconfig linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/Kconfig
+--- linux-2.6.19.2.old/arch/cris/arch-v10/drivers/Kconfig 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/Kconfig 2007-01-09 10:29:18.000000000 +0100
+@@ -6,6 +6,12 @@
+ This option enables the ETRAX 100LX built-in 10/100Mbit Ethernet
+ controller.
+
++config ETRAX_NO_PHY
++ bool "PHY not present"
++ depends on ETRAX_ETHERNET
++ help
++ Enable if PHY is not present.
++
+ choice
+ prompt "Network LED behavior"
+ depends on ETRAX_ETHERNET
+@@ -90,7 +96,7 @@
+
+ config ETRAX_SERIAL_PORT0_DMA6_OUT
+ bool "DMA 6"
+-
++ depends on !ETRAX_DEBUG_PORT0
+ endchoice
+
+ choice
+@@ -103,7 +109,7 @@
+
+ config ETRAX_SERIAL_PORT0_DMA7_IN
+ bool "DMA 7"
+-
++ depends on !ETRAX_DEBUG_PORT0
+ endchoice
+
+ choice
+@@ -204,7 +210,7 @@
+
+ config ETRAX_SERIAL_PORT1_DMA8_OUT
+ bool "DMA 8"
+-
++ depends on !ETRAX_DEBUG_PORT1
+ endchoice
+
+ choice
+@@ -217,7 +223,7 @@
+
+ config ETRAX_SERIAL_PORT1_DMA9_IN
+ bool "DMA 9"
+-
++ depends on !ETRAX_DEBUG_PORT1
+ endchoice
+
+ choice
+@@ -321,7 +327,7 @@
+
+ config ETRAX_SERIAL_PORT2_DMA2_OUT
+ bool "DMA 2"
+-
++ depends on !ETRAX_DEBUG_PORT2
+ endchoice
+
+ choice
+@@ -334,7 +340,7 @@
+
+ config ETRAX_SERIAL_PORT2_DMA3_IN
+ bool "DMA 3"
+-
++ depends on !ETRAX_DEBUG_PORT2
+ endchoice
+
+ choice
+@@ -435,7 +441,7 @@
+
+ config ETRAX_SERIAL_PORT3_DMA4_OUT
+ bool "DMA 4"
+-
++ depends on !ETRAX_DEBUG_PORT3
+ endchoice
+
+ choice
+@@ -448,7 +454,7 @@
+
+ config ETRAX_SERIAL_PORT3_DMA5_IN
+ bool "DMA 5"
+-
++ depends on !ETRAX_DEBUG_PORT3
+ endchoice
+
+ choice
+@@ -514,8 +520,7 @@
+ bool "RS-485 support"
+ depends on ETRAX_SERIAL
+ help
+- Enables support for RS-485 serial communication. For a primer on
+- RS-485, see <http://www.hw.cz/english/docs/rs485/rs485.html>.
++ Enables support for RS-485 serial communication.
+
+ config ETRAX_RS485_ON_PA
+ bool "RS-485 mode on PA"
+@@ -541,6 +546,27 @@
+ loopback. Not all products are able to do this in software only.
+ Axis 2400/2401 must disable receiver.
+
++config ETRAX_SYNCHRONOUS_SERIAL
++ bool "Synchronous serial port driver"
++ help
++ Select this to enable the synchronous serial port driver.
++
++config ETRAX_SYNCHRONOUS_SERIAL_PORT0
++ bool "Synchronous serial port 0 enabled (sser1)"
++ depends on ETRAX_SYNCHRONOUS_SERIAL
++
++config ETRAX_SYNCHRONOUS_SERIAL0_DMA
++ bool "Use DMA for synchronous serial port 0"
++ depends on ETRAX_SYNCHRONOUS_SERIAL_PORT0
++
++config ETRAX_SYNCHRONOUS_SERIAL_PORT1
++ bool "Synchronous serial port 1 enabled (sser3)"
++ depends on ETRAX_SYNCHRONOUS_SERIAL
++
++config ETRAX_SYNCHRONOUS_SERIAL1_DMA
++ bool "Use DMA for synchronous serial port 1"
++ depends on ETRAX_SYNCHRONOUS_SERIAL_PORT1
++
+ config ETRAX_IDE
+ bool "ATA/IDE support"
+ select IDE
+@@ -604,8 +630,7 @@
+ select MTD
+ select MTD_CFI
+ select MTD_CFI_AMDSTD
+- select MTD_OBSOLETE_CHIPS
+- select MTD_AMDSTD
++ select MTD_JEDECPROBE
+ select MTD_CHAR
+ select MTD_BLOCK
+ select MTD_PARTITIONS
+@@ -615,6 +640,15 @@
+ This option enables MTD mapping of flash devices. Needed to use
+ flash memories. If unsure, say Y.
+
++config ETRAX_AXISFLASHMAP_MTD0WHOLE
++ bool "MTD0 is whole boot flash device"
++ depends on ETRAX_AXISFLASHMAP
++ default N
++ help
++ When this option is not set, mtd0 refers to the first partition
++ on the boot flash device. When set, mtd0 refers to the whole
++ device, with mtd1 referring to the first partition etc.
++
+ config ETRAX_PTABLE_SECTOR
+ int "Byte-offset of partition table sector"
+ depends on ETRAX_AXISFLASHMAP
+@@ -715,19 +749,6 @@
+ Remember that you need to setup the port directions appropriately in
+ the General configuration.
+
+-config ETRAX_PA_BUTTON_BITMASK
+- hex "PA-buttons bitmask"
+- depends on ETRAX_GPIO
+- default "02"
+- help
+- This is a bitmask with information about what bits on PA that
+- are used for buttons.
+- Most products has a so called TEST button on PA1, if that's true
+- use 02 here.
+- Use 00 if there are no buttons on PA.
+- If the bitmask is <> 00 a button driver will be included in the gpio
+- driver. ETRAX general I/O support must be enabled.
+-
+ config ETRAX_PA_CHANGEABLE_DIR
+ hex "PA user changeable dir mask"
+ depends on ETRAX_GPIO
+@@ -768,6 +789,40 @@
+ Bit set = changeable.
+ You probably want 00 here.
+
++config ETRAX_DEF_R_PORT_G_DIR
++ bool "Port G Output"
++ help
++ CONFIG_ETRAX_DEF_R_PORT_G_DIR:
++ Set the direction of specified pins to output.
++
++config ETRAX_DEF_R_PORT_G0_DIR_OUT
++ bool "G0"
++ depends on ETRAX_DEF_R_PORT_G_DIR
++ help
++ CONFIG_ETRAX_DEF_R_PORT_G0_DIR_OUT:
++ Set G0 to output.
++
++config ETRAX_DEF_R_PORT_G8_15_DIR_OUT
++ bool "G8-G15"
++ depends on ETRAX_DEF_R_PORT_G_DIR
++ help
++ CONFIG_ETRAX_DEF_R_PORT_G8_15_DIR_OUT:
++ Set G8-G15 to output.
++
++config ETRAX_DEF_R_PORT_G16_23_DIR_OUT
++ bool "G16-G23"
++ depends on ETRAX_DEF_R_PORT_G_DIR
++ help
++ CONFIG_ETRAX_DEF_R_PORT_G16_23_DIR_OUT:
++ Set G16-G23 to output.
++
++config ETRAX_DEF_R_PORT_G24_DIR_OUT
++ bool "G24"
++ depends on ETRAX_DEF_R_PORT_G_DIR
++ help
++ CONFIG_ETRAX_DEF_R_PORT_G24_DIR_OUT:
++ Set G24 to output.
++
+ config ETRAX_RTC
+ bool "Real Time Clock support"
+ depends on ETRAX_ARCH_V10
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/drivers/Makefile linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/Makefile
+--- linux-2.6.19.2.old/arch/cris/arch-v10/drivers/Makefile 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/Makefile 2005-12-12 10:05:46.000000000 +0100
+@@ -8,5 +8,5 @@
+ obj-$(CONFIG_ETRAX_GPIO) += gpio.o
+ obj-$(CONFIG_ETRAX_DS1302) += ds1302.o
+ obj-$(CONFIG_ETRAX_PCF8563) += pcf8563.o
+-
++obj-$(CONFIG_ETRAX_SYNCHRONOUS_SERIAL) += sync_serial.o
+
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/drivers/axisflashmap.c linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/axisflashmap.c
+--- linux-2.6.19.2.old/arch/cris/arch-v10/drivers/axisflashmap.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/axisflashmap.c 2006-11-22 13:26:55.000000000 +0100
+@@ -11,6 +11,26 @@
+ * partition split defined below.
+ *
+ * $Log: axisflashmap.c,v $
++ * Revision 1.17 2006/11/22 12:26:55 ricardw
++ * Added CONFIG_ETRAX_AXISFLASHMAP_MTD0WHOLE option which when enabled puts mtd0
++ * as whole device, with first partition at mtd1, etc.
++ *
++ * Revision 1.16 2006/10/30 15:17:57 pkj
++ * Avoid a compiler warning.
++ *
++ * Revision 1.15 2006/10/13 12:43:10 starvik
++ * Merge of 2.6.18
++ *
++ * Revision 1.14 2006/08/30 13:20:00 karljope
++ * Do not use deprecated amd_flash to probe flash memory.
++ * Probe for flash chip with CFI first and if no chip was found try jedec_probe.
++ *
++ * Revision 1.13 2006/01/04 06:09:45 starvik
++ * Merge of Linux 2.6.15
++ *
++ * Revision 1.12 2005/06/21 09:13:06 starvik
++ * Change const char* to const char[] to save space (from domen@coderock.org).
++ *
+ * Revision 1.11 2004/11/15 10:27:14 starvik
+ * Corrected typo (Thanks to Milton Miller <miltonm@bga.com>).
+ *
+@@ -300,6 +320,15 @@
+ },
+ };
+
++#ifdef CONFIG_ETRAX_AXISFLASHMAP_MTD0WHOLE
++/* Main flash device */
++static struct mtd_partition main_partition = {
++ .name = "main",
++ .size = 0,
++ .offset = 0
++};
++#endif
++
+ /*
+ * Probe a chip select for AMD-compatible (JEDEC) or CFI-compatible flash
+ * chips in that order (because the amd_flash-driver is faster).
+@@ -312,12 +341,12 @@
+ "%s: Probing a 0x%08lx bytes large window at 0x%08lx.\n",
+ map_cs->name, map_cs->size, map_cs->map_priv_1);
+
+-#ifdef CONFIG_MTD_AMDSTD
+- mtd_cs = do_map_probe("amd_flash", map_cs);
+-#endif
+ #ifdef CONFIG_MTD_CFI
++ mtd_cs = do_map_probe("cfi_probe", map_cs);
++#endif
++#ifdef CONFIG_MTD_JEDECPROBE
+ if (!mtd_cs) {
+- mtd_cs = do_map_probe("cfi_probe", map_cs);
++ mtd_cs = do_map_probe("jedec_probe", map_cs);
+ }
+ #endif
+
+@@ -396,7 +425,7 @@
+ struct partitiontable_head *ptable_head = NULL;
+ struct partitiontable_entry *ptable;
+ int use_default_ptable = 1; /* Until proven otherwise. */
+- const char *pmsg = " /dev/flash%d at 0x%08x, size 0x%08x\n";
++ const char pmsg[] = " /dev/flash%d at 0x%08x, size 0x%08x\n";
+
+ if (!(mymtd = flash_probe())) {
+ /* There's no reason to use this module if no flash chip can
+@@ -491,6 +520,16 @@
+ pidx++;
+ }
+
++#ifdef CONFIG_ETRAX_AXISFLASHMAP_MTD0WHOLE
++ if (mymtd) {
++ main_partition.size = mymtd->size;
++ err = add_mtd_partitions(mymtd, &main_partition, 1);
++ if (err)
++ panic("axisflashmap: Could not initialize "
++ "partition for whole main mtd device!\n");
++ }
++#endif
++
+ if (mymtd) {
+ if (use_default_ptable) {
+ printk(KERN_INFO " Using default partition table.\n");
+@@ -524,7 +563,7 @@
+ }
+
+ printk(KERN_INFO " Adding RAM partition for romfs image:\n");
+- printk(pmsg, pidx, romfs_start, romfs_length);
++ printk(pmsg, pidx, (unsigned)romfs_start, (unsigned)romfs_length);
+
+ err = mtdram_init_device(mtd_ram, (void*)romfs_start,
+ romfs_length, "romfs");
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/drivers/ds1302.c linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/ds1302.c
+--- linux-2.6.19.2.old/arch/cris/arch-v10/drivers/ds1302.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/ds1302.c 2006-10-27 16:31:23.000000000 +0200
+@@ -6,136 +6,9 @@
+ *!
+ *! Functions exported: ds1302_readreg, ds1302_writereg, ds1302_init
+ *!
+-*! $Log: ds1302.c,v $
+-*! Revision 1.18 2005/01/24 09:11:26 mikaelam
+-*! Minor changes to get DS1302 RTC chip driver to work
+-*!
+-*! Revision 1.17 2005/01/05 06:11:22 starvik
+-*! No need to do local_irq_disable after local_irq_save.
+-*!
+-*! Revision 1.16 2004/12/13 12:21:52 starvik
+-*! Added I/O and DMA allocators from Linux 2.4
+-*!
+-*! Revision 1.14 2004/08/24 06:48:43 starvik
+-*! Whitespace cleanup
+-*!
+-*! Revision 1.13 2004/05/28 09:26:59 starvik
+-*! Modified I2C initialization to work in 2.6.
+-*!
+-*! Revision 1.12 2004/05/14 07:58:03 starvik
+-*! Merge of changes from 2.4
+-*!
+-*! Revision 1.10 2004/02/04 09:25:12 starvik
+-*! Merge of Linux 2.6.2
+-*!
+-*! Revision 1.9 2003/07/04 08:27:37 starvik
+-*! Merge of Linux 2.5.74
+-*!
+-*! Revision 1.8 2003/04/09 05:20:47 starvik
+-*! Merge of Linux 2.5.67
+-*!
+-*! Revision 1.6 2003/01/09 14:42:51 starvik
+-*! Merge of Linux 2.5.55
+-*!
+-*! Revision 1.4 2002/12/11 13:13:57 starvik
+-*! Added arch/ to v10 specific includes
+-*! Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
+-*!
+-*! Revision 1.3 2002/11/20 11:56:10 starvik
+-*! Merge of Linux 2.5.48
+-*!
+-*! Revision 1.2 2002/11/18 13:16:06 starvik
+-*! Linux 2.5 port of latest 2.4 drivers
+-*!
+-*! Revision 1.15 2002/10/11 16:14:33 johana
+-*! Added CONFIG_ETRAX_DS1302_TRICKLE_CHARGE and initial setting of the
+-*! trcklecharge register.
+-*!
+-*! Revision 1.14 2002/10/10 12:15:38 magnusmn
+-*! Added support for having the RST signal on bit g0
+-*!
+-*! Revision 1.13 2002/05/29 15:16:08 johana
+-*! Removed unused variables.
+-*!
+-*! Revision 1.12 2002/04/10 15:35:25 johana
+-*! Moved probe function closer to init function and marked it __init.
+-*!
+-*! Revision 1.11 2001/06/14 12:35:52 jonashg
+-*! The ATA hack is back. It is unfortunately the only way to set g27 to output.
+-*!
+-*! Revision 1.9 2001/06/14 10:00:14 jonashg
+-*! No need for tempudelay to be inline anymore (had to adjust the usec to
+-*! loops conversion because of this to make it slow enough to be a udelay).
+-*!
+-*! Revision 1.8 2001/06/14 08:06:32 jonashg
+-*! Made tempudelay delay usecs (well, just a tad more).
+-*!
+-*! Revision 1.7 2001/06/13 14:18:11 jonashg
+-*! Only allow processes with SYS_TIME capability to set time and charge.
+-*!
+-*! Revision 1.6 2001/06/12 15:22:07 jonashg
+-*! * Made init function __init.
+-*! * Parameter to out_byte() is unsigned char.
+-*! * The magic number 42 has got a name.
+-*! * Removed comment about /proc (nothing is exported there).
+-*!
+-*! Revision 1.5 2001/06/12 14:35:13 jonashg
+-*! Gave the module a name and added it to printk's.
+-*!
+-*! Revision 1.4 2001/05/31 14:53:40 jonashg
+-*! Made tempudelay() inline so that the watchdog doesn't reset (see
+-*! function comment).
+-*!
+-*! Revision 1.3 2001/03/26 16:03:06 bjornw
+-*! Needs linux/config.h
+-*!
+-*! Revision 1.2 2001/03/20 19:42:00 bjornw
+-*! Use the ETRAX prefix on the DS1302 options
+-*!
+-*! Revision 1.1 2001/03/20 09:13:50 magnusmn
+-*! Linux 2.4 port
+-*!
+-*! Revision 1.10 2000/07/05 15:38:23 bjornw
+-*! Dont update kernel time when a RTC_SET_TIME is done
+-*!
+-*! Revision 1.9 2000/03/02 15:42:59 macce
+-*! * Hack to make RTC work on all 2100/2400
+-*!
+-*! Revision 1.8 2000/02/23 16:59:18 torbjore
+-*! added setup of R_GEN_CONFIG when RTC is connected to the generic port.
+-*!
+-*! Revision 1.7 2000/01/17 15:51:43 johana
+-*! Added RTC_SET_CHARGE ioctl to enable trickle charger.
+-*!
+-*! Revision 1.6 1999/10/27 13:19:47 bjornw
+-*! Added update_xtime_from_cmos which reads back the updated RTC into the kernel.
+-*! /dev/rtc calls it now.
+-*!
+-*! Revision 1.5 1999/10/27 12:39:37 bjornw
+-*! Disabled superuser check. Anyone can now set the time.
+-*!
+-*! Revision 1.4 1999/09/02 13:27:46 pkj
+-*! Added shadow for R_PORT_PB_CONFIG.
+-*! Renamed port_g_shadow to port_g_data_shadow.
+-*!
+-*! Revision 1.3 1999/09/02 08:28:06 pkj
+-*! Made it possible to select either port PB or the generic port for the RST
+-*! signal line to the DS1302 RTC.
+-*! Also make sure the RST bit is configured as output on Port PB (if used).
+-*!
+-*! Revision 1.2 1999/09/01 14:47:20 bjornw
+-*! Added support for /dev/rtc operations with ioctl RD_TIME and SET_TIME to read
+-*! and set the date. Register as major 121.
+-*!
+-*! Revision 1.1 1999/09/01 09:45:29 bjornw
+-*! Implemented a DS1302 RTC driver.
+-*!
+-*!
+ *! ---------------------------------------------------------------------------
+ *!
+-*! (C) Copyright 1999, 2000, 2001, 2002, 2003, 2004 Axis Communications AB, LUND, SWEDEN
+-*!
+-*! $Id: ds1302.c,v 1.18 2005/01/24 09:11:26 mikaelam Exp $
++*! (C) Copyright 1999-2006 Axis Communications AB, LUND, SWEDEN
+ *!
+ *!***************************************************************************/
+
+@@ -305,14 +178,7 @@
+ void
+ ds1302_writereg(int reg, unsigned char val)
+ {
+-#ifndef CONFIG_ETRAX_RTC_READONLY
+ int do_writereg = 1;
+-#else
+- int do_writereg = 0;
+-
+- if (reg == RTC_TRICKLECHARGER)
+- do_writereg = 1;
+-#endif
+
+ if (do_writereg) {
+ ds1302_wenable();
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/drivers/eeprom.c linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/eeprom.c
+--- linux-2.6.19.2.old/arch/cris/arch-v10/drivers/eeprom.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/eeprom.c 2006-10-13 14:43:10.000000000 +0200
+@@ -20,6 +20,9 @@
+ *! in the spin-lock.
+ *!
+ *! $Log: eeprom.c,v $
++*! Revision 1.13 2006/10/13 12:43:10 starvik
++*! Merge of 2.6.18
++*!
+ *! Revision 1.12 2005/06/19 17:06:46 starvik
+ *! Merge of Linux 2.6.12.
+ *!
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/drivers/gpio.c linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/gpio.c
+--- linux-2.6.19.2.old/arch/cris/arch-v10/drivers/gpio.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/gpio.c 2007-02-05 12:54:34.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* $Id: gpio.c,v 1.17 2005/06/19 17:06:46 starvik Exp $
++/* $Id: gpio.c,v 1.28 2007/02/05 11:54:34 pkj Exp $
+ *
+ * Etrax general port I/O device
+ *
+@@ -9,6 +9,40 @@
+ * Johan Adolfsson (read/set directions, write, port G)
+ *
+ * $Log: gpio.c,v $
++ * Revision 1.28 2007/02/05 11:54:34 pkj
++ * Merge of Linux 2.6.19
++ *
++ * Revision 1.27 2006/12/12 11:08:30 edgar
++ * In etrax_gpio_wake_up_check(), make flags unsigned long.
++ *
++ * Revision 1.26 2006/11/02 10:54:29 pkj
++ * Restored unique device id for request_irq() which was lost in the
++ * merge of 2.6.18.
++ *
++ * Revision 1.25 2006/10/13 12:43:10 starvik
++ * Merge of 2.6.18
++ *
++ * Revision 1.24 2006/07/13 07:42:20 starvik
++ * Set unique device id in request_irq
++ *
++ * Revision 1.23 2006/06/21 09:38:46 starvik
++ * Use correct spinlock macros
++ *
++ * Revision 1.22 2005/08/29 07:32:16 starvik
++ * Merge of 2.6.13
++ *
++ * Revision 1.21 2005/08/16 17:10:54 edgar
++ * dont leave locked spinlocks when returning.
++ *
++ * Revision 1.20 2005/08/15 13:10:47 orjanf
++ * Don't link struct into alarmlist until fully initialized.
++ *
++ * Revision 1.19 2005/07/13 11:43:11 karljope
++ * Corrected typo
++ *
++ * Revision 1.18 2005/06/21 12:26:53 starvik
++ * Improved alarm list locking.
++ *
+ * Revision 1.17 2005/06/19 17:06:46 starvik
+ * Merge of Linux 2.6.12.
+ *
+@@ -277,7 +311,7 @@
+ unsigned int mask = 0;
+ struct gpio_private *priv = (struct gpio_private *)file->private_data;
+ unsigned long data;
+- spin_lock(&gpio_lock);
++ spin_lock_irq(&gpio_lock);
+ poll_wait(file, &priv->alarm_wq, wait);
+ if (priv->minor == GPIO_MINOR_A) {
+ unsigned long flags;
+@@ -297,15 +331,17 @@
+ data = *R_PORT_PB_DATA;
+ else if (priv->minor == GPIO_MINOR_G)
+ data = *R_PORT_G_DATA;
+- else
++ else {
++ spin_unlock_irq(&gpio_lock);
+ return 0;
++ }
+
+ if ((data & priv->highalarm) ||
+ (~data & priv->lowalarm)) {
+ mask = POLLIN|POLLRDNORM;
+ }
+
+- spin_unlock(&gpio_lock);
++ spin_unlock_irq(&gpio_lock);
+
+ DP(printk("gpio_poll ready: mask 0x%08X\n", mask));
+
+@@ -314,10 +350,12 @@
+
+ int etrax_gpio_wake_up_check(void)
+ {
+- struct gpio_private *priv = alarmlist;
++ struct gpio_private *priv;
+ unsigned long data = 0;
+ int ret = 0;
+- spin_lock(&gpio_lock);
++ unsigned long flags;
++ spin_lock_irqsave(&gpio_lock, flags);
++ priv = alarmlist;
+ while (priv) {
+ if (USE_PORTS(priv)) {
+ data = *priv->port;
+@@ -332,12 +370,12 @@
+ }
+ priv = priv->next;
+ }
+- spin_unlock(&gpio_lock);
++ spin_unlock_irqrestore(&gpio_lock, flags);
+ return ret;
+ }
+
+ static irqreturn_t
+-gpio_poll_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
++gpio_poll_timer_interrupt(int irq, void *dev_id)
+ {
+ if (gpio_some_alarms) {
+ etrax_gpio_wake_up_check();
+@@ -347,7 +385,7 @@
+ }
+
+ static irqreturn_t
+-gpio_pa_interrupt(int irq, void *dev_id, struct pt_regs *regs)
++gpio_pa_interrupt(int irq, void *dev_id)
+ {
+ unsigned long tmp;
+ spin_lock(&gpio_lock);
+@@ -376,9 +414,6 @@
+ struct gpio_private *priv = (struct gpio_private *)file->private_data;
+ unsigned char data, clk_mask, data_mask, write_msb;
+ unsigned long flags;
+-
+- spin_lock(&gpio_lock);
+-
+ ssize_t retval = count;
+ if (priv->minor !=GPIO_MINOR_A && priv->minor != GPIO_MINOR_B) {
+ return -EFAULT;
+@@ -394,6 +429,7 @@
+ if (clk_mask == 0 || data_mask == 0) {
+ return -EPERM;
+ }
++ spin_lock_irq(&gpio_lock);
+ write_msb = priv->write_msb;
+ D(printk("gpio_write: %lu to data 0x%02X clk 0x%02X msb: %i\n",count, data_mask, clk_mask, write_msb));
+ while (count--) {
+@@ -425,7 +461,7 @@
+ }
+ }
+ }
+- spin_unlock(&gpio_lock);
++ spin_unlock_irq(&gpio_lock);
+ return retval;
+ }
+
+@@ -445,13 +481,12 @@
+
+ if (!priv)
+ return -ENOMEM;
++ memset(priv, 0, sizeof(*priv));
+
+ priv->minor = p;
+
+- /* initialize the io/alarm struct and link it into our alarmlist */
++ /* initialize the io/alarm struct */
+
+- priv->next = alarmlist;
+- alarmlist = priv;
+ if (USE_PORTS(priv)) { /* A and B */
+ priv->port = ports[p];
+ priv->shadow = shads[p];
+@@ -476,6 +511,12 @@
+
+ filp->private_data = (void *)priv;
+
++ /* link it into our alarmlist */
++ spin_lock_irq(&gpio_lock);
++ priv->next = alarmlist;
++ alarmlist = priv;
++ spin_unlock_irq(&gpio_lock);
++
+ return 0;
+ }
+
+@@ -485,10 +526,10 @@
+ struct gpio_private *p;
+ struct gpio_private *todel;
+
+- spin_lock(&gpio_lock);
++ spin_lock_irq(&gpio_lock);
+
+- p = alarmlist;
+- todel = (struct gpio_private *)filp->private_data;
++ p = alarmlist;
++ todel = (struct gpio_private *)filp->private_data;
+
+ /* unlink from alarmlist and free the private structure */
+
+@@ -506,12 +547,13 @@
+ while (p) {
+ if (p->highalarm | p->lowalarm) {
+ gpio_some_alarms = 1;
++ spin_unlock_irq(&gpio_lock);
+ return 0;
+ }
+ p = p->next;
+ }
+ gpio_some_alarms = 0;
+- spin_unlock(&gpio_lock);
++ spin_unlock_irq(&gpio_lock);
+ return 0;
+ }
+
+@@ -691,6 +733,8 @@
+ /* Must update gpio_some_alarms */
+ struct gpio_private *p = alarmlist;
+ int some_alarms;
++ spin_lock_irq(&gpio_lock);
++ p = alarmlist;
+ some_alarms = 0;
+ while (p) {
+ if (p->highalarm | p->lowalarm) {
+@@ -700,6 +744,7 @@
+ p = p->next;
+ }
+ gpio_some_alarms = some_alarms;
++ spin_unlock_irq(&gpio_lock);
+ }
+ break;
+ case IO_READDIR: /* Use IO_SETGET_INPUT/OUTPUT instead! */
+@@ -937,11 +982,11 @@
+ * in some tests.
+ */
+ if (request_irq(TIMER0_IRQ_NBR, gpio_poll_timer_interrupt,
+- IRQF_SHARED | IRQF_DISABLED,"gpio poll", NULL)) {
++ IRQF_SHARED | IRQF_DISABLED,"gpio poll", gpio_name)) {
+ printk(KERN_CRIT "err: timer0 irq for gpio\n");
+ }
+ if (request_irq(PA_IRQ_NBR, gpio_pa_interrupt,
+- IRQF_SHARED | IRQF_DISABLED,"gpio PA", NULL)) {
++ IRQF_SHARED | IRQF_DISABLED,"gpio PA", gpio_name)) {
+ printk(KERN_CRIT "err: PA irq for gpio\n");
+ }
+
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/drivers/i2c.c linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/i2c.c
+--- linux-2.6.19.2.old/arch/cris/arch-v10/drivers/i2c.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/i2c.c 2006-10-13 14:43:10.000000000 +0200
+@@ -11,7 +11,25 @@
+ *! Jan 14 2000 Johan Adolfsson Fixed PB shadow register stuff -
+ *! don't use PB_I2C if DS1302 uses same bits,
+ *! use PB.
++*! June 23 2003 Pieter Grimmerink Added 'i2c_sendnack'. i2c_readreg now
++*! generates nack on last received byte,
++*! instead of ack.
++*! i2c_getack changed data level while clock
++*! was high, causing DS75 to see a stop condition
++*!
+ *! $Log: i2c.c,v $
++*! Revision 1.17 2006/10/13 12:43:10 starvik
++*! Merge of 2.6.18
++*!
++*! Revision 1.16 2005/09/29 13:33:35 bjarne
++*! If "first" should have any purpos it should probably change value....
++*!
++*! Revision 1.15 2005/08/29 07:32:16 starvik
++*! Merge of 2.6.13
++*!
++*! Revision 1.14 2005/06/30 18:07:31 starvik
++*! Added the sendnack patch from 2.4.
++*!
+ *! Revision 1.13 2005/03/07 13:13:07 starvik
+ *! Added spinlocks to protect states etc
+ *!
+@@ -84,7 +102,7 @@
+ *! (C) Copyright 1999-2002 Axis Communications AB, LUND, SWEDEN
+ *!
+ *!***************************************************************************/
+-/* $Id: i2c.c,v 1.13 2005/03/07 13:13:07 starvik Exp $ */
++/* $Id: i2c.c,v 1.17 2006/10/13 12:43:10 starvik Exp $ */
+
+ /****************** INCLUDE FILES SECTION ***********************************/
+
+@@ -480,7 +498,7 @@
+ i2c_delay(CLOCK_HIGH_TIME);
+ i2c_clk(I2C_CLOCK_LOW);
+ i2c_delay(CLOCK_LOW_TIME);
+-
++
+ i2c_dir_in();
+ }
+
+@@ -622,7 +640,7 @@
+ * last received byte needs to be nacked
+ * instead of acked
+ */
+- i2c_sendack();
++ i2c_sendnack();
+ /*
+ * end sequence
+ */
+@@ -708,6 +726,7 @@
+ if (!first) {
+ return res;
+ }
++ first = 0;
+
+ /* Setup and enable the Port B I2C interface */
+
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/drivers/pcf8563.c linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/pcf8563.c
+--- linux-2.6.19.2.old/arch/cris/arch-v10/drivers/pcf8563.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/pcf8563.c 2006-10-27 17:22:12.000000000 +0200
+@@ -8,14 +8,13 @@
+ * low detector are also provided. All address and data are transferred
+ * serially via two-line bidirectional I2C-bus. Maximum bus speed is
+ * 400 kbits/s. The built-in word address register is incremented
+- * automatically after each written or read bute.
++ * automatically after each written or read byte.
+ *
+- * Copyright (c) 2002, Axis Communications AB
++ * Copyright (c) 2002-2006, Axis Communications AB
+ * All rights reserved.
+ *
+ * Author: Tobias Anderberg <tobiasa@axis.com>.
+ *
+- * $Id: pcf8563.c,v 1.11 2005/03/07 13:13:07 starvik Exp $
+ */
+
+ #include <linux/module.h>
+@@ -27,93 +26,105 @@
+ #include <linux/ioctl.h>
+ #include <linux/delay.h>
+ #include <linux/bcd.h>
+-#include <linux/capability.h>
+
+ #include <asm/uaccess.h>
+ #include <asm/system.h>
+ #include <asm/io.h>
+-#include <asm/arch/svinto.h>
+ #include <asm/rtc.h>
++
+ #include "i2c.h"
+
+-#define PCF8563_MAJOR 121 /* Local major number. */
+-#define DEVICE_NAME "rtc" /* Name which is registered in /proc/devices. */
+-#define PCF8563_NAME "PCF8563"
+-#define DRIVER_VERSION "$Revision: 1.11 $"
+-
+-/* I2C bus slave registers. */
+-#define RTC_I2C_READ 0xa3
+-#define RTC_I2C_WRITE 0xa2
++#define PCF8563_MAJOR 121 /* Local major number. */
++#define DEVICE_NAME "rtc" /* Name which is registered in /proc/devices. */
++#define PCF8563_NAME "PCF8563"
++#define DRIVER_VERSION "$Revision: 1.18 $"
+
+ /* Two simple wrapper macros, saves a few keystrokes. */
+ #define rtc_read(x) i2c_readreg(RTC_I2C_READ, x)
+ #define rtc_write(x,y) i2c_writereg(RTC_I2C_WRITE, x, y)
+
+ static DEFINE_SPINLOCK(rtc_lock); /* Protect state etc */
+-
++
+ static const unsigned char days_in_month[] =
+ { 0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 };
+
+ int pcf8563_ioctl(struct inode *, struct file *, unsigned int, unsigned long);
+
++/* Cache VL bit value read at driver init since writing the RTC_SECOND
++ * register clears the VL status.
++ */
++static int voltage_low = 0;
++
+ static struct file_operations pcf8563_fops = {
+- .owner = THIS_MODULE,
+- .ioctl = pcf8563_ioctl,
++ owner: THIS_MODULE,
++ ioctl: pcf8563_ioctl,
+ };
+
+ unsigned char
+-pcf8563_readreg(int reg)
++pcf8563_readreg(int reg)
+ {
+- unsigned char res = i2c_readreg(RTC_I2C_READ, reg);
++ unsigned char res = rtc_read(reg);
+
+- /* The PCF8563 does not return 0 for unimplemented bits */
+- switch(reg)
+- {
++ /* The PCF8563 does not return 0 for unimplemented bits. */
++ switch (reg) {
+ case RTC_SECONDS:
+ case RTC_MINUTES:
+- res &= 0x7f;
+- break;
++ res &= 0x7F;
++ break;
+ case RTC_HOURS:
+ case RTC_DAY_OF_MONTH:
+- res &= 0x3f;
+- break;
++ res &= 0x3F;
++ break;
++ case RTC_WEEKDAY:
++ res &= 0x07;
++ break;
+ case RTC_MONTH:
+- res = (res & 0x1f) - 1; /* PCF8563 returns month in range 1-12 */
+- break;
++ res &= 0x1F;
++ break;
++ case RTC_CONTROL1:
++ res &= 0xA8;
++ break;
++ case RTC_CONTROL2:
++ res &= 0x1F;
++ break;
++ case RTC_CLOCKOUT_FREQ:
++ case RTC_TIMER_CONTROL:
++ res &= 0x83;
++ break;
+ }
+ return res;
+ }
+
+ void
+-pcf8563_writereg(int reg, unsigned char val)
++pcf8563_writereg(int reg, unsigned char val)
+ {
+-#ifdef CONFIG_ETRAX_RTC_READONLY
+- if (reg == RTC_CONTROL1 || (reg >= RTC_SECONDS && reg <= RTC_YEAR))
+- return;
+-#endif
+-
+ rtc_write(reg, val);
+ }
+
+ void
+ get_rtc_time(struct rtc_time *tm)
+ {
+- tm->tm_sec = rtc_read(RTC_SECONDS);
+- tm->tm_min = rtc_read(RTC_MINUTES);
++ tm->tm_sec = rtc_read(RTC_SECONDS);
++ tm->tm_min = rtc_read(RTC_MINUTES);
+ tm->tm_hour = rtc_read(RTC_HOURS);
+ tm->tm_mday = rtc_read(RTC_DAY_OF_MONTH);
+- tm->tm_mon = rtc_read(RTC_MONTH);
++ tm->tm_wday = rtc_read(RTC_WEEKDAY);
++ tm->tm_mon = rtc_read(RTC_MONTH);
+ tm->tm_year = rtc_read(RTC_YEAR);
+
+- if (tm->tm_sec & 0x80)
+- printk(KERN_WARNING "%s: RTC Low Voltage - date/time is not reliable!\n", PCF8563_NAME);
++ if (tm->tm_sec & 0x80) {
++ printk(KERN_WARNING "%s: RTC Voltage Low - reliable date/time "
++ "information is no longer guaranteed!\n", PCF8563_NAME);
++ }
+
+- tm->tm_year = BCD_TO_BIN(tm->tm_year) + ((tm->tm_mon & 0x80) ? 100 : 0);
+- tm->tm_sec &= 0x7f;
+- tm->tm_min &= 0x7f;
+- tm->tm_hour &= 0x3f;
+- tm->tm_mday &= 0x3f;
+- tm->tm_mon &= 0x1f;
++ tm->tm_year = BCD_TO_BIN(tm->tm_year) +
++ ((tm->tm_mon & 0x80) ? 100 : 0);
++ tm->tm_sec &= 0x7F;
++ tm->tm_min &= 0x7F;
++ tm->tm_hour &= 0x3F;
++ tm->tm_mday &= 0x3F;
++ tm->tm_wday &= 0x07; /* Not coded in BCD. */
++ tm->tm_mon &= 0x1F;
+
+ BCD_TO_BIN(tm->tm_sec);
+ BCD_TO_BIN(tm->tm_min);
+@@ -126,17 +137,25 @@
+ int __init
+ pcf8563_init(void)
+ {
+- int ret;
++ static int res = 0;
++ static int first = 1;
++
++ if (!first) {
++ return res;
++ }
++ first = 0;
+
+- if ((ret = i2c_init())) {
+- printk(KERN_CRIT "pcf8563_init: failed to init i2c\n");
+- return ret;
++ /* Initiate the i2c protocol. */
++ res = i2c_init();
++ if (res < 0) {
++ printk(KERN_CRIT "pcf8563_init: Failed to init i2c.\n");
++ return res;
+ }
+
+ /*
+ * First of all we need to reset the chip. This is done by
+- * clearing control1, control2 and clk freq, clear the
+- * Voltage Low bit, and resetting all alarms.
++ * clearing control1, control2 and clk freq and resetting
++ * all alarms.
+ */
+ if (rtc_write(RTC_CONTROL1, 0x00) < 0)
+ goto err;
+@@ -147,41 +166,44 @@
+ if (rtc_write(RTC_CLOCKOUT_FREQ, 0x00) < 0)
+ goto err;
+
+- /* Clear the VL bit in the seconds register. */
+- ret = rtc_read(RTC_SECONDS);
+-
+- if (rtc_write(RTC_SECONDS, (ret & 0x7f)) < 0)
++ if (rtc_write(RTC_TIMER_CONTROL, 0x03) < 0)
+ goto err;
+-
++
+ /* Reset the alarms. */
+- if (rtc_write(RTC_MINUTE_ALARM, 0x00) < 0)
++ if (rtc_write(RTC_MINUTE_ALARM, 0x80) < 0)
+ goto err;
+-
+- if (rtc_write(RTC_HOUR_ALARM, 0x00) < 0)
++
++ if (rtc_write(RTC_HOUR_ALARM, 0x80) < 0)
+ goto err;
+-
+- if (rtc_write(RTC_DAY_ALARM, 0x00) < 0)
++
++ if (rtc_write(RTC_DAY_ALARM, 0x80) < 0)
+ goto err;
+-
+- if (rtc_write(RTC_WEEKDAY_ALARM, 0x00) < 0)
++
++ if (rtc_write(RTC_WEEKDAY_ALARM, 0x80) < 0)
+ goto err;
+-
+- /* Check for low voltage, and warn about it.. */
+- if (rtc_read(RTC_SECONDS) & 0x80)
+- printk(KERN_WARNING "%s: RTC Low Voltage - date/time is not reliable!\n", PCF8563_NAME);
+-
+- return 0;
++
++ /* Check for low voltage, and warn about it. */
++ if (rtc_read(RTC_SECONDS) & 0x80) {
++ voltage_low = 1;
++ printk(KERN_WARNING "%s: RTC Voltage Low - reliable "
++ "date/time information is no longer guaranteed!\n",
++ PCF8563_NAME);
++ }
++
++ return res;
+
+ err:
+ printk(KERN_INFO "%s: Error initializing chip.\n", PCF8563_NAME);
+- return -1;
++ res = -1;
++ return res;
+ }
+
+ void __exit
+ pcf8563_exit(void)
+ {
+ if (unregister_chrdev(PCF8563_MAJOR, DEVICE_NAME) < 0) {
+- printk(KERN_INFO "%s: Unable to unregister device.\n", PCF8563_NAME);
++ printk(KERN_INFO "%s: Unable to unregister device.\n",
++ PCF8563_NAME);
+ }
+ }
+
+@@ -190,7 +212,8 @@
+ * POSIX says so!
+ */
+ int
+-pcf8563_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg)
++pcf8563_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
++ unsigned long arg)
+ {
+ /* Some sanity checks. */
+ if (_IOC_TYPE(cmd) != RTC_MAGIC)
+@@ -201,123 +224,151 @@
+
+ switch (cmd) {
+ case RTC_RD_TIME:
+- {
+- struct rtc_time tm;
+-
+- spin_lock(&rtc_lock);
+- get_rtc_time(&tm);
++ {
++ struct rtc_time tm;
+
+- if (copy_to_user((struct rtc_time *) arg, &tm, sizeof(struct rtc_time))) {
+- spin_unlock(&rtc_lock);
+- return -EFAULT;
+- }
++ spin_lock(&rtc_lock);
++ memset(&tm, 0, sizeof tm);
++ get_rtc_time(&tm);
+
++ if (copy_to_user((struct rtc_time *) arg, &tm,
++ sizeof tm)) {
+ spin_unlock(&rtc_lock);
+- return 0;
++ return -EFAULT;
+ }
+- break;
++
++ spin_unlock(&rtc_lock);
++
++ return 0;
++ }
+ case RTC_SET_TIME:
+- {
+-#ifdef CONFIG_ETRAX_RTC_READONLY
++ {
++ int leap;
++ int year;
++ int century;
++ struct rtc_time tm;
++
++ memset(&tm, 0, sizeof tm);
++ if (!capable(CAP_SYS_TIME))
+ return -EPERM;
+-#else
+- int leap;
+- int century;
+- struct rtc_time tm;
+-
+- memset(&tm, 0, sizeof (struct rtc_time));
+- if (!capable(CAP_SYS_TIME))
+- return -EPERM;
+-
+- if (copy_from_user(&tm, (struct rtc_time *) arg, sizeof(struct rtc_time)))
+- return -EFAULT;
+-
+- /* Convert from struct tm to struct rtc_time. */
+- tm.tm_year += 1900;
+- tm.tm_mon += 1;
+-
+- leap = ((tm.tm_mon == 2) && ((tm.tm_year % 4) == 0)) ? 1 : 0;
+-
+- /* Perform some sanity checks. */
+- if ((tm.tm_year < 1970) ||
+- (tm.tm_mon > 12) ||
+- (tm.tm_mday == 0) ||
+- (tm.tm_mday > days_in_month[tm.tm_mon] + leap) ||
+- (tm.tm_hour >= 24) ||
+- (tm.tm_min >= 60) ||
+- (tm.tm_sec >= 60))
+- return -EINVAL;
+-
+- century = (tm.tm_year >= 2000) ? 0x80 : 0;
+- tm.tm_year = tm.tm_year % 100;
+-
+- BIN_TO_BCD(tm.tm_year);
+- BIN_TO_BCD(tm.tm_mday);
+- BIN_TO_BCD(tm.tm_hour);
+- BIN_TO_BCD(tm.tm_min);
+- BIN_TO_BCD(tm.tm_sec);
+- tm.tm_mon |= century;
+-
+- spin_lock(&rtc_lock);
+-
+- rtc_write(RTC_YEAR, tm.tm_year);
+- rtc_write(RTC_MONTH, tm.tm_mon);
+- rtc_write(RTC_DAY_OF_MONTH, tm.tm_mday);
+- rtc_write(RTC_HOURS, tm.tm_hour);
+- rtc_write(RTC_MINUTES, tm.tm_min);
+- rtc_write(RTC_SECONDS, tm.tm_sec);
+
+- spin_unlock(&rtc_lock);
++ if (copy_from_user(&tm, (struct rtc_time *) arg,
++ sizeof tm)) {
++ return -EFAULT;
++ }
+
+- return 0;
+-#endif /* !CONFIG_ETRAX_RTC_READONLY */
++ /* Convert from struct tm to struct rtc_time. */
++ tm.tm_year += 1900;
++ tm.tm_mon += 1;
++
++ /*
++ * Check if tm.tm_year is a leap year. A year is a leap
++ * year if it is divisible by 4 but not 100, except
++ * that years divisible by 400 _are_ leap years.
++ */
++ year = tm.tm_year;
++ leap = (tm.tm_mon == 2) &&
++ ((year % 4 == 0 && year % 100 != 0) || year % 400 == 0);
++
++ /* Perform some sanity checks. */
++ if ((tm.tm_year < 1970) ||
++ (tm.tm_mon > 12) ||
++ (tm.tm_mday == 0) ||
++ (tm.tm_mday > days_in_month[tm.tm_mon] + leap) ||
++ (tm.tm_wday >= 7) ||
++ (tm.tm_hour >= 24) ||
++ (tm.tm_min >= 60) ||
++ (tm.tm_sec >= 60)) {
++ return -EINVAL;
+ }
+
+- case RTC_VLOW_RD:
+- {
+- int vl_bit = 0;
++ century = (tm.tm_year >= 2000) ? 0x80 : 0;
++ tm.tm_year = tm.tm_year % 100;
+
+- if (rtc_read(RTC_SECONDS) & 0x80) {
+- vl_bit = 1;
+- printk(KERN_WARNING "%s: RTC Voltage Low - reliable "
+- "date/time information is no longer guaranteed!\n",
+- PCF8563_NAME);
+- }
+- if (copy_to_user((int *) arg, &vl_bit, sizeof(int)))
+- return -EFAULT;
++ BIN_TO_BCD(tm.tm_year);
++ BIN_TO_BCD(tm.tm_mon);
++ BIN_TO_BCD(tm.tm_mday);
++ BIN_TO_BCD(tm.tm_hour);
++ BIN_TO_BCD(tm.tm_min);
++ BIN_TO_BCD(tm.tm_sec);
++ tm.tm_mon |= century;
++
++ spin_lock(&rtc_lock);
++
++ rtc_write(RTC_YEAR, tm.tm_year);
++ rtc_write(RTC_MONTH, tm.tm_mon);
++ rtc_write(RTC_WEEKDAY, tm.tm_wday); /* Not coded in BCD. */
++ rtc_write(RTC_DAY_OF_MONTH, tm.tm_mday);
++ rtc_write(RTC_HOURS, tm.tm_hour);
++ rtc_write(RTC_MINUTES, tm.tm_min);
++ rtc_write(RTC_SECONDS, tm.tm_sec);
++
++ spin_unlock(&rtc_lock);
+
+ return 0;
+ }
++ case RTC_VLOW_RD:
++ if (voltage_low) {
++ printk(KERN_WARNING "%s: RTC Voltage Low - "
++ "reliable date/time information is no "
++ "longer guaranteed!\n", PCF8563_NAME);
++ }
++
++ if (copy_to_user((int *) arg, &voltage_low, sizeof(int))) {
++ return -EFAULT;
++ }
++
++ return 0;
+
+ case RTC_VLOW_SET:
+ {
+- /* Clear the VL bit in the seconds register */
++ /* Clear the VL bit in the seconds register in case
++ * the time has not been set already (which would
++ * have cleared it). This does not really matter
++ * because of the cached voltage_low value but do it
++ * anyway for consistency. */
++
+ int ret = rtc_read(RTC_SECONDS);
+
+ rtc_write(RTC_SECONDS, (ret & 0x7F));
+
++ /* Clear the cached value. */
++ voltage_low = 0;
++
+ return 0;
+ }
+-
+ default:
+- return -ENOTTY;
++ return -ENOTTY;
+ }
+
+ return 0;
+ }
+
+-static int __init
++static int __init
+ pcf8563_register(void)
+ {
+- pcf8563_init();
++ if (pcf8563_init() < 0) {
++ printk(KERN_INFO "%s: Unable to initialize Real-Time Clock "
++ "Driver, %s\n", PCF8563_NAME, DRIVER_VERSION);
++ return -1;
++ }
++
+ if (register_chrdev(PCF8563_MAJOR, DEVICE_NAME, &pcf8563_fops) < 0) {
+- printk(KERN_INFO "%s: Unable to get major numer %d for RTC device.\n",
+- PCF8563_NAME, PCF8563_MAJOR);
++ printk(KERN_INFO "%s: Unable to get major numer %d for RTC "
++ "device.\n", PCF8563_NAME, PCF8563_MAJOR);
+ return -1;
+ }
+
+- printk(KERN_INFO "%s Real-Time Clock Driver, %s\n", PCF8563_NAME, DRIVER_VERSION);
+- return 0;
++ printk(KERN_INFO "%s Real-Time Clock Driver, %s\n", PCF8563_NAME,
++ DRIVER_VERSION);
++
++ /* Check for low voltage, and warn about it. */
++ if (voltage_low) {
++ printk(KERN_WARNING "%s: RTC Voltage Low - reliable date/time "
++ "information is no longer guaranteed!\n", PCF8563_NAME);
++ }
++
++ return 0;
+ }
+
+ module_init(pcf8563_register);
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/drivers/sync_serial.c linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/sync_serial.c
+--- linux-2.6.19.2.old/arch/cris/arch-v10/drivers/sync_serial.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/drivers/sync_serial.c 2007-02-05 12:56:34.000000000 +0100
+@@ -0,0 +1,1329 @@
++/*
++ * Simple synchronous serial port driver for ETRAX 100LX.
++ *
++ * Synchronous serial ports are used for continuous streamed data like audio.
++ * The default setting for this driver is compatible with the STA 013 MP3
++ * decoder. The driver can easily be tuned to fit other audio encoder/decoders
++ * and SPI
++ *
++ * Copyright (c) 2001-2006 Axis Communications AB
++ *
++ * Author: Mikael Starvik, Johan Adolfsson
++ *
++ */
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/types.h>
++#include <linux/errno.h>
++#include <linux/major.h>
++#include <linux/sched.h>
++#include <linux/slab.h>
++#include <linux/interrupt.h>
++#include <linux/poll.h>
++#include <linux/init.h>
++#include <linux/timer.h>
++#include <asm/irq.h>
++#include <asm/dma.h>
++#include <asm/io.h>
++#include <asm/arch/svinto.h>
++#include <asm/uaccess.h>
++#include <asm/system.h>
++#include <asm/sync_serial.h>
++#include <asm/arch/io_interface_mux.h>
++
++/* The receiver is a bit tricky beacuse of the continuous stream of data.*/
++/* */
++/* Three DMA descriptors are linked together. Each DMA descriptor is */
++/* responsible for port->bufchunk of a common buffer. */
++/* */
++/* +---------------------------------------------+ */
++/* | +----------+ +----------+ +----------+ | */
++/* +-> | Descr[0] |-->| Descr[1] |-->| Descr[2] |-+ */
++/* +----------+ +----------+ +----------+ */
++/* | | | */
++/* v v v */
++/* +-------------------------------------+ */
++/* | BUFFER | */
++/* +-------------------------------------+ */
++/* |<- data_avail ->| */
++/* readp writep */
++/* */
++/* If the application keeps up the pace readp will be right after writep.*/
++/* If the application can't keep the pace we have to throw away data. */
++/* The idea is that readp should be ready with the data pointed out by */
++/* Descr[i] when the DMA has filled in Descr[i+1]. */
++/* Otherwise we will discard */
++/* the rest of the data pointed out by Descr1 and set readp to the start */
++/* of Descr2 */
++
++#define SYNC_SERIAL_MAJOR 125
++
++/* IN_BUFFER_SIZE should be a multiple of 6 to make sure that 24 bit */
++/* words can be handled */
++#define IN_BUFFER_SIZE 12288
++#define IN_DESCR_SIZE 256
++#define NUM_IN_DESCR (IN_BUFFER_SIZE/IN_DESCR_SIZE)
++#define OUT_BUFFER_SIZE 4096
++
++#define DEFAULT_FRAME_RATE 0
++#define DEFAULT_WORD_RATE 7
++
++/* NOTE: Enabling some debug will likely cause overrun or underrun,
++ * especially if manual mode is use.
++ */
++#define DEBUG(x)
++#define DEBUGREAD(x)
++#define DEBUGWRITE(x)
++#define DEBUGPOLL(x)
++#define DEBUGRXINT(x)
++#define DEBUGTXINT(x)
++
++/* Define some macros to access ETRAX 100 registers */
++#define SETF(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
++ IO_FIELD_(reg##_, field##_, val)
++#define SETS(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
++ IO_STATE_(reg##_, field##_, _##val)
++
++typedef struct sync_port
++{
++ /* Etrax registers and bits*/
++ const volatile unsigned * const status;
++ volatile unsigned * const ctrl_data;
++ volatile unsigned * const output_dma_first;
++ volatile unsigned char * const output_dma_cmd;
++ volatile unsigned char * const output_dma_clr_irq;
++ volatile unsigned * const input_dma_first;
++ volatile unsigned char * const input_dma_cmd;
++ volatile unsigned * const input_dma_descr;
++ /* 8*4 */
++ volatile unsigned char * const input_dma_clr_irq;
++ volatile unsigned * const data_out;
++ const volatile unsigned * const data_in;
++ char data_avail_bit; /* In R_IRQ_MASK1_RD/SET/CLR */
++ char transmitter_ready_bit; /* In R_IRQ_MASK1_RD/SET/CLR */
++ char input_dma_descr_bit; /* In R_IRQ_MASK2_RD */
++
++ char output_dma_bit; /* In R_IRQ_MASK2_RD */
++ /* End of fields initialised in array */
++ char started; /* 1 if port has been started */
++ char port_nbr; /* Port 0 or 1 */
++ char busy; /* 1 if port is busy */
++
++ char enabled; /* 1 if port is enabled */
++ char use_dma; /* 1 if port uses dma */
++ char tr_running;
++
++ char init_irqs;
++
++ unsigned int ctrl_data_shadow; /* Register shadow */
++ volatile unsigned int out_count; /* Remaining bytes for current transfer */
++ unsigned char* outp; /* Current position in out_buffer */
++ /* 16*4 */
++ volatile unsigned char* volatile readp; /* Next byte to be read by application */
++ volatile unsigned char* volatile writep; /* Next byte to be written by etrax */
++ unsigned int in_buffer_size;
++ unsigned int inbufchunk;
++ struct etrax_dma_descr out_descr __attribute__ ((aligned(32)));
++ struct etrax_dma_descr in_descr[NUM_IN_DESCR] __attribute__ ((aligned(32)));
++ unsigned char out_buffer[OUT_BUFFER_SIZE] __attribute__ ((aligned(32)));
++ unsigned char in_buffer[IN_BUFFER_SIZE]__attribute__ ((aligned(32)));
++ unsigned char flip[IN_BUFFER_SIZE] __attribute__ ((aligned(32)));
++ struct etrax_dma_descr* next_rx_desc;
++ struct etrax_dma_descr* prev_rx_desc;
++ int full;
++
++ wait_queue_head_t out_wait_q;
++ wait_queue_head_t in_wait_q;
++} sync_port;
++
++
++static int etrax_sync_serial_init(void);
++static void initialize_port(int portnbr);
++static inline int sync_data_avail(struct sync_port *port);
++
++static int sync_serial_open(struct inode *, struct file*);
++static int sync_serial_release(struct inode*, struct file*);
++static unsigned int sync_serial_poll(struct file *filp, poll_table *wait);
++
++static int sync_serial_ioctl(struct inode*, struct file*,
++ unsigned int cmd, unsigned long arg);
++static ssize_t sync_serial_write(struct file * file, const char * buf,
++ size_t count, loff_t *ppos);
++static ssize_t sync_serial_read(struct file *file, char *buf,
++ size_t count, loff_t *ppos);
++
++#if (defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0) && \
++ defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL0_DMA)) || \
++ (defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT1) && \
++ defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL1_DMA))
++#define SYNC_SER_DMA
++#endif
++
++static void send_word(sync_port* port);
++static void start_dma(struct sync_port *port, const char* data, int count);
++static void start_dma_in(sync_port* port);
++#ifdef SYNC_SER_DMA
++static irqreturn_t tr_interrupt(int irq, void *dev_id);
++static irqreturn_t rx_interrupt(int irq, void *dev_id);
++#endif
++#if (defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0) && \
++ !defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL0_DMA)) || \
++ (defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT1) && \
++ !defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL1_DMA))
++#define SYNC_SER_MANUAL
++#endif
++#ifdef SYNC_SER_MANUAL
++static irqreturn_t manual_interrupt(int irq, void *dev_id);
++#endif
++
++/* The ports */
++static struct sync_port ports[]=
++{
++ {
++ .status = R_SYNC_SERIAL1_STATUS,
++ .ctrl_data = R_SYNC_SERIAL1_CTRL,
++ .output_dma_first = R_DMA_CH8_FIRST,
++ .output_dma_cmd = R_DMA_CH8_CMD,
++ .output_dma_clr_irq = R_DMA_CH8_CLR_INTR,
++ .input_dma_first = R_DMA_CH9_FIRST,
++ .input_dma_cmd = R_DMA_CH9_CMD,
++ .input_dma_descr = R_DMA_CH9_DESCR,
++ .input_dma_clr_irq = R_DMA_CH9_CLR_INTR,
++ .data_out = R_SYNC_SERIAL1_TR_DATA,
++ .data_in = R_SYNC_SERIAL1_REC_DATA,
++ .data_avail_bit = IO_BITNR(R_IRQ_MASK1_RD, ser1_data),
++ .transmitter_ready_bit = IO_BITNR(R_IRQ_MASK1_RD, ser1_ready),
++ .input_dma_descr_bit = IO_BITNR(R_IRQ_MASK2_RD, dma9_descr),
++ .output_dma_bit = IO_BITNR(R_IRQ_MASK2_RD, dma8_eop),
++ .init_irqs = 1,
++#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL0_DMA)
++ .use_dma = 1,
++#else
++ .use_dma = 0,
++#endif
++ },
++ {
++ .status = R_SYNC_SERIAL3_STATUS,
++ .ctrl_data = R_SYNC_SERIAL3_CTRL,
++ .output_dma_first = R_DMA_CH4_FIRST,
++ .output_dma_cmd = R_DMA_CH4_CMD,
++ .output_dma_clr_irq = R_DMA_CH4_CLR_INTR,
++ .input_dma_first = R_DMA_CH5_FIRST,
++ .input_dma_cmd = R_DMA_CH5_CMD,
++ .input_dma_descr = R_DMA_CH5_DESCR,
++ .input_dma_clr_irq = R_DMA_CH5_CLR_INTR,
++ .data_out = R_SYNC_SERIAL3_TR_DATA,
++ .data_in = R_SYNC_SERIAL3_REC_DATA,
++ .data_avail_bit = IO_BITNR(R_IRQ_MASK1_RD, ser3_data),
++ .transmitter_ready_bit = IO_BITNR(R_IRQ_MASK1_RD, ser3_ready),
++ .input_dma_descr_bit = IO_BITNR(R_IRQ_MASK2_RD, dma5_descr),
++ .output_dma_bit = IO_BITNR(R_IRQ_MASK2_RD, dma4_eop),
++ .init_irqs = 1,
++#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL1_DMA)
++ .use_dma = 1,
++#else
++ .use_dma = 0,
++#endif
++ }
++};
++
++/* Register shadows */
++static unsigned sync_serial_prescale_shadow = 0;
++
++#define NUMBER_OF_PORTS (sizeof(ports)/sizeof(sync_port))
++
++static struct file_operations sync_serial_fops = {
++ .owner = THIS_MODULE,
++ .write = sync_serial_write,
++ .read = sync_serial_read,
++ .poll = sync_serial_poll,
++ .ioctl = sync_serial_ioctl,
++ .open = sync_serial_open,
++ .release = sync_serial_release
++};
++
++static int __init etrax_sync_serial_init(void)
++{
++ ports[0].enabled = 0;
++ ports[1].enabled = 0;
++
++#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0)
++ if (cris_request_io_interface(if_sync_serial_1, "sync_ser1")) {
++ printk(KERN_CRIT "ETRAX100LX sync_serial: Could not allocate IO group for port %d\n", 0);
++ return -EBUSY;
++ }
++#endif
++#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT1)
++ if (cris_request_io_interface(if_sync_serial_3, "sync_ser3")) {
++#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0)
++ cris_free_io_interface(if_sync_serial_1);
++#endif
++ printk(KERN_CRIT "ETRAX100LX sync_serial: Could not allocate IO group for port %d\n", 1);
++ return -EBUSY;
++ }
++#endif
++
++ if (register_chrdev(SYNC_SERIAL_MAJOR,"sync serial", &sync_serial_fops) <0 )
++ {
++#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT1)
++ cris_free_io_interface(if_sync_serial_3);
++#endif
++#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0)
++ cris_free_io_interface(if_sync_serial_1);
++#endif
++ printk("unable to get major for synchronous serial port\n");
++ return -EBUSY;
++ }
++
++ /* Deselect synchronous serial ports while configuring. */
++ SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode1, async);
++ SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode3, async);
++ *R_GEN_CONFIG_II = gen_config_ii_shadow;
++
++ /* Initialize Ports */
++#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0)
++ ports[0].enabled = 1;
++ SETS(port_pb_i2c_shadow, R_PORT_PB_I2C, syncser1, ss1extra);
++ SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode1, sync);
++#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL0_DMA)
++ ports[0].use_dma = 1;
++#else
++ ports[0].use_dma = 0;
++#endif
++ initialize_port(0);
++#endif
++
++#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT1)
++ ports[1].enabled = 1;
++ SETS(port_pb_i2c_shadow, R_PORT_PB_I2C, syncser3, ss3extra);
++ SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode3, sync);
++#if defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL1_DMA)
++ ports[1].use_dma = 1;
++#else
++ ports[1].use_dma = 0;
++#endif
++ initialize_port(1);
++#endif
++
++ *R_PORT_PB_I2C = port_pb_i2c_shadow; /* Use PB4/PB7 */
++
++ /* Set up timing */
++ *R_SYNC_SERIAL_PRESCALE = sync_serial_prescale_shadow = (
++ IO_STATE(R_SYNC_SERIAL_PRESCALE, clk_sel_u1, codec) |
++ IO_STATE(R_SYNC_SERIAL_PRESCALE, word_stb_sel_u1, external) |
++ IO_STATE(R_SYNC_SERIAL_PRESCALE, clk_sel_u3, codec) |
++ IO_STATE(R_SYNC_SERIAL_PRESCALE, word_stb_sel_u3, external) |
++ IO_STATE(R_SYNC_SERIAL_PRESCALE, prescaler, div4) |
++ IO_FIELD(R_SYNC_SERIAL_PRESCALE, frame_rate, DEFAULT_FRAME_RATE) |
++ IO_FIELD(R_SYNC_SERIAL_PRESCALE, word_rate, DEFAULT_WORD_RATE) |
++ IO_STATE(R_SYNC_SERIAL_PRESCALE, warp_mode, normal));
++
++ /* Select synchronous ports */
++ *R_GEN_CONFIG_II = gen_config_ii_shadow;
++
++ printk("ETRAX 100LX synchronous serial port driver\n");
++ return 0;
++}
++
++static void __init initialize_port(int portnbr)
++{
++ struct sync_port* port = &ports[portnbr];
++
++ DEBUG(printk("Init sync serial port %d\n", portnbr));
++
++ port->started = 0;
++ port->port_nbr = portnbr;
++ port->busy = 0;
++ port->tr_running = 0;
++
++ port->out_count = 0;
++ port->outp = port->out_buffer;
++
++ port->readp = port->flip;
++ port->writep = port->flip;
++ port->in_buffer_size = IN_BUFFER_SIZE;
++ port->inbufchunk = IN_DESCR_SIZE;
++ port->next_rx_desc = &port->in_descr[0];
++ port->prev_rx_desc = &port->in_descr[NUM_IN_DESCR-1];
++ port->prev_rx_desc->ctrl = d_eol;
++
++ init_waitqueue_head(&port->out_wait_q);
++ init_waitqueue_head(&port->in_wait_q);
++
++ port->ctrl_data_shadow =
++ IO_STATE(R_SYNC_SERIAL1_CTRL, tr_baud, c115k2Hz) |
++ IO_STATE(R_SYNC_SERIAL1_CTRL, mode, master_output) |
++ IO_STATE(R_SYNC_SERIAL1_CTRL, error, ignore) |
++ IO_STATE(R_SYNC_SERIAL1_CTRL, rec_enable, disable) |
++ IO_STATE(R_SYNC_SERIAL1_CTRL, f_synctype, normal) |
++ IO_STATE(R_SYNC_SERIAL1_CTRL, f_syncsize, word) |
++ IO_STATE(R_SYNC_SERIAL1_CTRL, f_sync, on) |
++ IO_STATE(R_SYNC_SERIAL1_CTRL, clk_mode, normal) |
++ IO_STATE(R_SYNC_SERIAL1_CTRL, clk_halt, stopped) |
++ IO_STATE(R_SYNC_SERIAL1_CTRL, bitorder, msb) |
++ IO_STATE(R_SYNC_SERIAL1_CTRL, tr_enable, disable) |
++ IO_STATE(R_SYNC_SERIAL1_CTRL, wordsize, size8bit) |
++ IO_STATE(R_SYNC_SERIAL1_CTRL, buf_empty, lmt_8) |
++ IO_STATE(R_SYNC_SERIAL1_CTRL, buf_full, lmt_8) |
++ IO_STATE(R_SYNC_SERIAL1_CTRL, flow_ctrl, enabled) |
++ IO_STATE(R_SYNC_SERIAL1_CTRL, clk_polarity, neg) |
++ IO_STATE(R_SYNC_SERIAL1_CTRL, frame_polarity, normal)|
++ IO_STATE(R_SYNC_SERIAL1_CTRL, status_polarity, inverted)|
++ IO_STATE(R_SYNC_SERIAL1_CTRL, clk_driver, normal) |
++ IO_STATE(R_SYNC_SERIAL1_CTRL, frame_driver, normal) |
++ IO_STATE(R_SYNC_SERIAL1_CTRL, status_driver, normal)|
++ IO_STATE(R_SYNC_SERIAL1_CTRL, def_out0, high);
++
++ if (port->use_dma)
++ port->ctrl_data_shadow |= IO_STATE(R_SYNC_SERIAL1_CTRL, dma_enable, on);
++ else
++ port->ctrl_data_shadow |= IO_STATE(R_SYNC_SERIAL1_CTRL, dma_enable, off);
++
++ *port->ctrl_data = port->ctrl_data_shadow;
++}
++
++static inline int sync_data_avail(struct sync_port *port)
++{
++ int avail;
++ unsigned char *start;
++ unsigned char *end;
++
++ start = (unsigned char*)port->readp; /* cast away volatile */
++ end = (unsigned char*)port->writep; /* cast away volatile */
++ /* 0123456789 0123456789
++ * ----- - -----
++ * ^rp ^wp ^wp ^rp
++ */
++
++ if (end >= start)
++ avail = end - start;
++ else
++ avail = port->in_buffer_size - (start - end);
++ return avail;
++}
++
++static inline int sync_data_avail_to_end(struct sync_port *port)
++{
++ int avail;
++ unsigned char *start;
++ unsigned char *end;
++
++ start = (unsigned char*)port->readp; /* cast away volatile */
++ end = (unsigned char*)port->writep; /* cast away volatile */
++ /* 0123456789 0123456789
++ * ----- -----
++ * ^rp ^wp ^wp ^rp
++ */
++
++ if (end >= start)
++ avail = end - start;
++ else
++ avail = port->flip + port->in_buffer_size - start;
++ return avail;
++}
++
++
++static int sync_serial_open(struct inode *inode, struct file *file)
++{
++ int dev = MINOR(inode->i_rdev);
++ sync_port* port;
++ int mode;
++
++ DEBUG(printk("Open sync serial port %d\n", dev));
++
++ if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled)
++ {
++ DEBUG(printk("Invalid minor %d\n", dev));
++ return -ENODEV;
++ }
++ port = &ports[dev];
++ /* Allow open this device twice (assuming one reader and one writer) */
++ if (port->busy == 2)
++ {
++ DEBUG(printk("Device is busy.. \n"));
++ return -EBUSY;
++ }
++ if (port->init_irqs) {
++ if (port->use_dma) {
++ if (port == &ports[0]){
++#ifdef SYNC_SER_DMA
++ if(request_irq(24,
++ tr_interrupt,
++ 0,
++ "synchronous serial 1 dma tr",
++ &ports[0])) {
++ printk(KERN_CRIT "Can't allocate sync serial port 1 IRQ");
++ return -EBUSY;
++ } else if(request_irq(25,
++ rx_interrupt,
++ 0,
++ "synchronous serial 1 dma rx",
++ &ports[0])) {
++ free_irq(24, &port[0]);
++ printk(KERN_CRIT "Can't allocate sync serial port 1 IRQ");
++ return -EBUSY;
++ } else if (cris_request_dma(8,
++ "synchronous serial 1 dma tr",
++ DMA_VERBOSE_ON_ERROR,
++ dma_ser1)) {
++ free_irq(24, &port[0]);
++ free_irq(25, &port[0]);
++ printk(KERN_CRIT "Can't allocate sync serial port 1 TX DMA channel");
++ return -EBUSY;
++ } else if (cris_request_dma(9,
++ "synchronous serial 1 dma rec",
++ DMA_VERBOSE_ON_ERROR,
++ dma_ser1)) {
++ cris_free_dma(8, NULL);
++ free_irq(24, &port[0]);
++ free_irq(25, &port[0]);
++ printk(KERN_CRIT "Can't allocate sync serial port 1 RX DMA channel");
++ return -EBUSY;
++ }
++#endif
++ RESET_DMA(8); WAIT_DMA(8);
++ RESET_DMA(9); WAIT_DMA(9);
++ *R_DMA_CH8_CLR_INTR = IO_STATE(R_DMA_CH8_CLR_INTR, clr_eop, do) |
++ IO_STATE(R_DMA_CH8_CLR_INTR, clr_descr, do);
++ *R_DMA_CH9_CLR_INTR = IO_STATE(R_DMA_CH9_CLR_INTR, clr_eop, do) |
++ IO_STATE(R_DMA_CH9_CLR_INTR, clr_descr, do);
++ *R_IRQ_MASK2_SET =
++ IO_STATE(R_IRQ_MASK2_SET, dma8_eop, set) |
++ IO_STATE(R_IRQ_MASK2_SET, dma9_descr, set);
++ }
++ else if (port == &ports[1]){
++#ifdef SYNC_SER_DMA
++ if (request_irq(20,
++ tr_interrupt,
++ 0,
++ "synchronous serial 3 dma tr",
++ &ports[1])) {
++ printk(KERN_CRIT "Can't allocate sync serial port 3 IRQ");
++ return -EBUSY;
++ } else if (request_irq(21,
++ rx_interrupt,
++ 0,
++ "synchronous serial 3 dma rx",
++ &ports[1])) {
++ free_irq(20, &ports[1]);
++ printk(KERN_CRIT "Can't allocate sync serial port 3 IRQ");
++ return -EBUSY;
++ } else if (cris_request_dma(4,
++ "synchronous serial 3 dma tr",
++ DMA_VERBOSE_ON_ERROR,
++ dma_ser3)) {
++ free_irq(21, &ports[1]);
++ free_irq(20, &ports[1]);
++ printk(KERN_CRIT "Can't allocate sync serial port 3 TX DMA channel");
++ return -EBUSY;
++ } else if (cris_request_dma(5,
++ "synchronous serial 3 dma rec",
++ DMA_VERBOSE_ON_ERROR,
++ dma_ser3)) {
++ cris_free_dma(4, NULL);
++ free_irq(21, &ports[1]);
++ free_irq(20, &ports[1]);
++ printk(KERN_CRIT "Can't allocate sync serial port 3 RX DMA channel");
++ return -EBUSY;
++ }
++#endif
++ RESET_DMA(4); WAIT_DMA(4);
++ RESET_DMA(5); WAIT_DMA(5);
++ *R_DMA_CH4_CLR_INTR = IO_STATE(R_DMA_CH4_CLR_INTR, clr_eop, do) |
++ IO_STATE(R_DMA_CH4_CLR_INTR, clr_descr, do);
++ *R_DMA_CH5_CLR_INTR = IO_STATE(R_DMA_CH5_CLR_INTR, clr_eop, do) |
++ IO_STATE(R_DMA_CH5_CLR_INTR, clr_descr, do);
++ *R_IRQ_MASK2_SET =
++ IO_STATE(R_IRQ_MASK2_SET, dma4_eop, set) |
++ IO_STATE(R_IRQ_MASK2_SET, dma5_descr, set);
++ }
++ start_dma_in(port);
++ port->init_irqs = 0;
++ } else { /* !port->use_dma */
++#ifdef SYNC_SER_MANUAL
++ if (port == &ports[0]) {
++ if (request_irq(8,
++ manual_interrupt,
++ IRQF_SHARED | IRQF_DISABLED,
++ "synchronous serial manual irq",
++ &ports[0])) {
++ printk("Can't allocate sync serial manual irq");
++ return -EBUSY;
++ }
++ } else if (port == &ports[1]) {
++ if (request_irq(8,
++ manual_interrupt,
++ IRQF_SHARED | IRQF_DISABLED,
++ "synchronous serial manual irq",
++ &ports[1])) {
++ printk(KERN_CRIT "Can't allocate sync serial manual irq");
++ return -EBUSY;
++ }
++ }
++ port->init_irqs = 0;
++#else
++ panic("sync_serial: Manual mode not supported.\n");
++#endif /* SYNC_SER_MANUAL */
++ }
++ } /* port->init_irqs */
++
++ port->busy++;
++ /* Start port if we use it as input */
++ mode = IO_EXTRACT(R_SYNC_SERIAL1_CTRL, mode, port->ctrl_data_shadow);
++ if (mode == IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, mode, master_input) ||
++ mode == IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, mode, slave_input) ||
++ mode == IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, mode, master_bidir) ||
++ mode == IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, mode, slave_bidir)) {
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_halt, running);
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, tr_enable, enable);
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, rec_enable, enable);
++ port->started = 1;
++ *port->ctrl_data = port->ctrl_data_shadow;
++ if (!port->use_dma)
++ *R_IRQ_MASK1_SET = 1 << port->data_avail_bit;
++ DEBUG(printk("sser%d rec started\n", dev));
++ }
++ return 0;
++}
++
++static int sync_serial_release(struct inode *inode, struct file *file)
++{
++ int dev = MINOR(inode->i_rdev);
++ sync_port* port;
++
++ if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled)
++ {
++ DEBUG(printk("Invalid minor %d\n", dev));
++ return -ENODEV;
++ }
++ port = &ports[dev];
++ if (port->busy)
++ port->busy--;
++ if (!port->busy)
++ *R_IRQ_MASK1_CLR = ((1 << port->data_avail_bit) |
++ (1 << port->transmitter_ready_bit));
++
++ return 0;
++}
++
++
++
++static unsigned int sync_serial_poll(struct file *file, poll_table *wait)
++{
++ int dev = MINOR(file->f_dentry->d_inode->i_rdev);
++ unsigned int mask = 0;
++ sync_port* port;
++ DEBUGPOLL( static unsigned int prev_mask = 0; );
++
++ port = &ports[dev];
++ poll_wait(file, &port->out_wait_q, wait);
++ poll_wait(file, &port->in_wait_q, wait);
++ /* Some room to write */
++ if (port->out_count < OUT_BUFFER_SIZE)
++ mask |= POLLOUT | POLLWRNORM;
++ /* At least an inbufchunk of data */
++ if (sync_data_avail(port) >= port->inbufchunk)
++ mask |= POLLIN | POLLRDNORM;
++
++ DEBUGPOLL(if (mask != prev_mask)
++ printk("sync_serial_poll: mask 0x%08X %s %s\n", mask,
++ mask&POLLOUT?"POLLOUT":"", mask&POLLIN?"POLLIN":"");
++ prev_mask = mask;
++ );
++ return mask;
++}
++
++static int sync_serial_ioctl(struct inode *inode, struct file *file,
++ unsigned int cmd, unsigned long arg)
++{
++ int return_val = 0;
++ unsigned long flags;
++
++ int dev = MINOR(file->f_dentry->d_inode->i_rdev);
++ sync_port* port;
++
++ if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled)
++ {
++ DEBUG(printk("Invalid minor %d\n", dev));
++ return -1;
++ }
++ port = &ports[dev];
++
++ local_irq_save(flags);
++ /* Disable port while changing config */
++ if (dev)
++ {
++ if (port->use_dma) {
++ RESET_DMA(4); WAIT_DMA(4);
++ port->tr_running = 0;
++ port->out_count = 0;
++ port->outp = port->out_buffer;
++ *R_DMA_CH4_CLR_INTR = IO_STATE(R_DMA_CH4_CLR_INTR, clr_eop, do) |
++ IO_STATE(R_DMA_CH4_CLR_INTR, clr_descr, do);
++ }
++ SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode3, async);
++ }
++ else
++ {
++ if (port->use_dma) {
++ RESET_DMA(8); WAIT_DMA(8);
++ port->tr_running = 0;
++ port->out_count = 0;
++ port->outp = port->out_buffer;
++ *R_DMA_CH8_CLR_INTR = IO_STATE(R_DMA_CH8_CLR_INTR, clr_eop, do) |
++ IO_STATE(R_DMA_CH8_CLR_INTR, clr_descr, do);
++ }
++ SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode1, async);
++ }
++ *R_GEN_CONFIG_II = gen_config_ii_shadow;
++ local_irq_restore(flags);
++
++ switch(cmd)
++ {
++ case SSP_SPEED:
++ if (GET_SPEED(arg) == CODEC)
++ {
++ if (dev)
++ SETS(sync_serial_prescale_shadow, R_SYNC_SERIAL_PRESCALE, clk_sel_u3, codec);
++ else
++ SETS(sync_serial_prescale_shadow, R_SYNC_SERIAL_PRESCALE, clk_sel_u1, codec);
++
++ SETF(sync_serial_prescale_shadow, R_SYNC_SERIAL_PRESCALE, prescaler, GET_FREQ(arg));
++ SETF(sync_serial_prescale_shadow, R_SYNC_SERIAL_PRESCALE, frame_rate, GET_FRAME_RATE(arg));
++ SETF(sync_serial_prescale_shadow, R_SYNC_SERIAL_PRESCALE, word_rate, GET_WORD_RATE(arg));
++ }
++ else
++ {
++ SETF(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, tr_baud, GET_SPEED(arg));
++ if (dev)
++ SETS(sync_serial_prescale_shadow, R_SYNC_SERIAL_PRESCALE, clk_sel_u3, baudrate);
++ else
++ SETS(sync_serial_prescale_shadow, R_SYNC_SERIAL_PRESCALE, clk_sel_u1, baudrate);
++ }
++ break;
++ case SSP_MODE:
++ if (arg > 5)
++ return -EINVAL;
++ if (arg == MASTER_OUTPUT || arg == SLAVE_OUTPUT)
++ *R_IRQ_MASK1_CLR = 1 << port->data_avail_bit;
++ else if (!port->use_dma)
++ *R_IRQ_MASK1_SET = 1 << port->data_avail_bit;
++ SETF(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, mode, arg);
++ break;
++ case SSP_FRAME_SYNC:
++ if (arg & NORMAL_SYNC)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_synctype, normal);
++ else if (arg & EARLY_SYNC)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_synctype, early);
++
++ if (arg & BIT_SYNC)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_syncsize, bit);
++ else if (arg & WORD_SYNC)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_syncsize, word);
++ else if (arg & EXTENDED_SYNC)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_syncsize, extended);
++
++ if (arg & SYNC_ON)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_sync, on);
++ else if (arg & SYNC_OFF)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_sync, off);
++
++ if (arg & WORD_SIZE_8)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, wordsize, size8bit);
++ else if (arg & WORD_SIZE_12)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, wordsize, size12bit);
++ else if (arg & WORD_SIZE_16)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, wordsize, size16bit);
++ else if (arg & WORD_SIZE_24)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, wordsize, size24bit);
++ else if (arg & WORD_SIZE_32)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, wordsize, size32bit);
++
++ if (arg & BIT_ORDER_MSB)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, bitorder, msb);
++ else if (arg & BIT_ORDER_LSB)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, bitorder, lsb);
++
++ if (arg & FLOW_CONTROL_ENABLE)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, flow_ctrl, enabled);
++ else if (arg & FLOW_CONTROL_DISABLE)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, flow_ctrl, disabled);
++
++ if (arg & CLOCK_NOT_GATED)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_mode, normal);
++ else if (arg & CLOCK_GATED)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_mode, gated);
++
++ break;
++ case SSP_IPOLARITY:
++ /* NOTE!! negedge is considered NORMAL */
++ if (arg & CLOCK_NORMAL)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_polarity, neg);
++ else if (arg & CLOCK_INVERT)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_polarity, pos);
++
++ if (arg & FRAME_NORMAL)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, frame_polarity, normal);
++ else if (arg & FRAME_INVERT)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, frame_polarity, inverted);
++
++ if (arg & STATUS_NORMAL)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, status_polarity, normal);
++ else if (arg & STATUS_INVERT)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, status_polarity, inverted);
++ break;
++ case SSP_OPOLARITY:
++ if (arg & CLOCK_NORMAL)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_driver, normal);
++ else if (arg & CLOCK_INVERT)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_driver, inverted);
++
++ if (arg & FRAME_NORMAL)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, frame_driver, normal);
++ else if (arg & FRAME_INVERT)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, frame_driver, inverted);
++
++ if (arg & STATUS_NORMAL)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, status_driver, normal);
++ else if (arg & STATUS_INVERT)
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, status_driver, inverted);
++ break;
++ case SSP_SPI:
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, flow_ctrl, disabled);
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, bitorder, msb);
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, wordsize, size8bit);
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_sync, on);
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_syncsize, word);
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, f_synctype, normal);
++ if (arg & SPI_SLAVE)
++ {
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, frame_polarity, inverted);
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_polarity, neg);
++ SETF(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, mode, SLAVE_INPUT);
++ }
++ else
++ {
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, frame_driver, inverted);
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_driver, inverted);
++ SETF(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, mode, MASTER_OUTPUT);
++ }
++ break;
++ case SSP_INBUFCHUNK:
++#if 0
++ if (arg > port->in_buffer_size/NUM_IN_DESCR)
++ return -EINVAL;
++ port->inbufchunk = arg;
++ /* Make sure in_buffer_size is a multiple of inbufchunk */
++ port->in_buffer_size = (port->in_buffer_size/port->inbufchunk) * port->inbufchunk;
++ DEBUG(printk("inbufchunk %i in_buffer_size: %i\n", port->inbufchunk, port->in_buffer_size));
++ if (port->use_dma) {
++ if (port->port_nbr == 0) {
++ RESET_DMA(9);
++ WAIT_DMA(9);
++ } else {
++ RESET_DMA(5);
++ WAIT_DMA(5);
++ }
++ start_dma_in(port);
++ }
++#endif
++ break;
++ default:
++ return_val = -1;
++ }
++ /* Make sure we write the config without interruption */
++ local_irq_save(flags);
++ /* Set config and enable port */
++ *port->ctrl_data = port->ctrl_data_shadow;
++ nop(); nop(); nop(); nop();
++ *R_SYNC_SERIAL_PRESCALE = sync_serial_prescale_shadow;
++ nop(); nop(); nop(); nop();
++ if (dev)
++ SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode3, sync);
++ else
++ SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode1, sync);
++
++ *R_GEN_CONFIG_II = gen_config_ii_shadow;
++ /* Reset DMA. At readout from serial port the data could be shifted
++ * one byte if not resetting DMA.
++ */
++ if (port->use_dma) {
++ if (port->port_nbr == 0) {
++ RESET_DMA(9);
++ WAIT_DMA(9);
++ } else {
++ RESET_DMA(5);
++ WAIT_DMA(5);
++ }
++ start_dma_in(port);
++ }
++ local_irq_restore(flags);
++ return return_val;
++}
++
++
++static ssize_t sync_serial_write(struct file * file, const char * buf,
++ size_t count, loff_t *ppos)
++{
++ int dev = MINOR(file->f_dentry->d_inode->i_rdev);
++ DECLARE_WAITQUEUE(wait, current);
++ sync_port *port;
++ unsigned long flags;
++ unsigned long c, c1;
++ unsigned long free_outp;
++ unsigned long outp;
++ unsigned long out_buffer;
++
++ if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled)
++ {
++ DEBUG(printk("Invalid minor %d\n", dev));
++ return -ENODEV;
++ }
++ port = &ports[dev];
++
++ DEBUGWRITE(printk("W d%d c %lu (%d/%d)\n", port->port_nbr, count, port->out_count, OUT_BUFFER_SIZE));
++ /* Space to end of buffer */
++ /*
++ * out_buffer <c1>012345<- c ->OUT_BUFFER_SIZE
++ * outp^ +out_count
++ ^free_outp
++ * out_buffer 45<- c ->0123OUT_BUFFER_SIZE
++ * +out_count outp^
++ * free_outp
++ *
++ */
++
++ /* Read variables that may be updated by interrupts */
++ local_irq_save(flags);
++ count = count > OUT_BUFFER_SIZE - port->out_count ? OUT_BUFFER_SIZE - port->out_count : count;
++ outp = (unsigned long)port->outp;
++ free_outp = outp + port->out_count;
++ local_irq_restore(flags);
++ out_buffer = (unsigned long)port->out_buffer;
++
++ /* Find out where and how much to write */
++ if (free_outp >= out_buffer + OUT_BUFFER_SIZE)
++ free_outp -= OUT_BUFFER_SIZE;
++ if (free_outp >= outp)
++ c = out_buffer + OUT_BUFFER_SIZE - free_outp;
++ else
++ c = outp - free_outp;
++ if (c > count)
++ c = count;
++
++// DEBUGWRITE(printk("w op %08lX fop %08lX c %lu\n", outp, free_outp, c));
++ if (copy_from_user((void*)free_outp, buf, c))
++ return -EFAULT;
++
++ if (c != count) {
++ buf += c;
++ c1 = count - c;
++ DEBUGWRITE(printk("w2 fi %lu c %lu c1 %lu\n", free_outp-out_buffer, c, c1));
++ if (copy_from_user((void*)out_buffer, buf, c1))
++ return -EFAULT;
++ }
++ local_irq_save(flags);
++ port->out_count += count;
++ local_irq_restore(flags);
++
++ /* Make sure transmitter/receiver is running */
++ if (!port->started)
++ {
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_halt, running);
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, tr_enable, enable);
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, rec_enable, enable);
++ port->started = 1;
++ }
++
++ *port->ctrl_data = port->ctrl_data_shadow;
++
++ if (file->f_flags & O_NONBLOCK) {
++ local_irq_save(flags);
++ if (!port->tr_running) {
++ if (!port->use_dma) {
++ /* Start sender by writing data */
++ send_word(port);
++ /* and enable transmitter ready IRQ */
++ *R_IRQ_MASK1_SET = 1 << port->transmitter_ready_bit;
++ } else {
++ start_dma(port, (unsigned char* volatile )port->outp, c);
++ }
++ }
++ local_irq_restore(flags);
++ DEBUGWRITE(printk("w d%d c %lu NB\n",
++ port->port_nbr, count));
++ return count;
++ }
++
++ /* Sleep until all sent */
++
++ add_wait_queue(&port->out_wait_q, &wait);
++ set_current_state(TASK_INTERRUPTIBLE);
++ local_irq_save(flags);
++ if (!port->tr_running) {
++ if (!port->use_dma) {
++ /* Start sender by writing data */
++ send_word(port);
++ /* and enable transmitter ready IRQ */
++ *R_IRQ_MASK1_SET = 1 << port->transmitter_ready_bit;
++ } else {
++ start_dma(port, port->outp, c);
++ }
++ }
++ local_irq_restore(flags);
++ schedule();
++ set_current_state(TASK_RUNNING);
++ remove_wait_queue(&port->out_wait_q, &wait);
++ if (signal_pending(current))
++ {
++ return -EINTR;
++ }
++ DEBUGWRITE(printk("w d%d c %lu\n", port->port_nbr, count));
++ return count;
++}
++
++static ssize_t sync_serial_read(struct file * file, char * buf,
++ size_t count, loff_t *ppos)
++{
++ int dev = MINOR(file->f_dentry->d_inode->i_rdev);
++ int avail;
++ sync_port *port;
++ unsigned char* start;
++ unsigned char* end;
++ unsigned long flags;
++
++ if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled)
++ {
++ DEBUG(printk("Invalid minor %d\n", dev));
++ return -ENODEV;
++ }
++ port = &ports[dev];
++
++ DEBUGREAD(printk("R%d c %d ri %lu wi %lu /%lu\n", dev, count, port->readp - port->flip, port->writep - port->flip, port->in_buffer_size));
++
++ if (!port->started)
++ {
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, clk_halt, running);
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, tr_enable, enable);
++ SETS(port->ctrl_data_shadow, R_SYNC_SERIAL1_CTRL, rec_enable, enable);
++ port->started = 1;
++ }
++ *port->ctrl_data = port->ctrl_data_shadow;
++
++
++ /* Calculate number of available bytes */
++ /* Save pointers to avoid that they are modified by interrupt */
++ local_irq_save(flags);
++ start = (unsigned char*)port->readp; /* cast away volatile */
++ end = (unsigned char*)port->writep; /* cast away volatile */
++ local_irq_restore(flags);
++ while ((start == end) && !port->full) /* No data */
++ {
++ if (file->f_flags & O_NONBLOCK)
++ {
++ return -EAGAIN;
++ }
++
++ interruptible_sleep_on(&port->in_wait_q);
++ if (signal_pending(current))
++ {
++ return -EINTR;
++ }
++ local_irq_save(flags);
++ start = (unsigned char*)port->readp; /* cast away volatile */
++ end = (unsigned char*)port->writep; /* cast away volatile */
++ local_irq_restore(flags);
++ }
++
++ /* Lazy read, never return wrapped data. */
++ if (port->full)
++ avail = port->in_buffer_size;
++ else if (end > start)
++ avail = end - start;
++ else
++ avail = port->flip + port->in_buffer_size - start;
++
++ count = count > avail ? avail : count;
++ if (copy_to_user(buf, start, count))
++ return -EFAULT;
++ /* Disable interrupts while updating readp */
++ local_irq_save(flags);
++ port->readp += count;
++ if (port->readp >= port->flip + port->in_buffer_size) /* Wrap? */
++ port->readp = port->flip;
++ port->full = 0;
++ local_irq_restore(flags);
++ DEBUGREAD(printk("r %d\n", count));
++ return count;
++}
++
++static void send_word(sync_port* port)
++{
++ switch(IO_EXTRACT(R_SYNC_SERIAL1_CTRL, wordsize, port->ctrl_data_shadow))
++ {
++ case IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, wordsize, size8bit):
++ port->out_count--;
++ *port->data_out = *port->outp++;
++ if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE)
++ port->outp = port->out_buffer;
++ break;
++ case IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, wordsize, size12bit):
++ {
++ int data = (*port->outp++) << 8;
++ data |= *port->outp++;
++ port->out_count-=2;
++ *port->data_out = data;
++ if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE)
++ port->outp = port->out_buffer;
++ }
++ break;
++ case IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, wordsize, size16bit):
++ port->out_count-=2;
++ *port->data_out = *(unsigned short *)port->outp;
++ port->outp+=2;
++ if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE)
++ port->outp = port->out_buffer;
++ break;
++ case IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, wordsize, size24bit):
++ port->out_count-=3;
++ *port->data_out = *(unsigned int *)port->outp;
++ port->outp+=3;
++ if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE)
++ port->outp = port->out_buffer;
++ break;
++ case IO_STATE_VALUE(R_SYNC_SERIAL1_CTRL, wordsize, size32bit):
++ port->out_count-=4;
++ *port->data_out = *(unsigned int *)port->outp;
++ port->outp+=4;
++ if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE)
++ port->outp = port->out_buffer;
++ break;
++ }
++}
++
++
++static void start_dma(struct sync_port* port, const char* data, int count)
++{
++ port->tr_running = 1;
++ port->out_descr.hw_len = 0;
++ port->out_descr.next = 0;
++ port->out_descr.ctrl = d_eol | d_eop; /* No d_wait to avoid glitches */
++ port->out_descr.sw_len = count;
++ port->out_descr.buf = virt_to_phys((char*)data);
++ port->out_descr.status = 0;
++
++ *port->output_dma_first = virt_to_phys(&port->out_descr);
++ *port->output_dma_cmd = IO_STATE(R_DMA_CH0_CMD, cmd, start);
++ DEBUGTXINT(printk("dma %08lX c %d\n", (unsigned long)data, count));
++}
++
++static void start_dma_in(sync_port* port)
++{
++ int i;
++ unsigned long buf;
++ port->writep = port->flip;
++
++ if (port->writep > port->flip + port->in_buffer_size)
++ {
++ panic("Offset too large in sync serial driver\n");
++ return;
++ }
++ buf = virt_to_phys(port->in_buffer);
++ for (i = 0; i < NUM_IN_DESCR; i++) {
++ port->in_descr[i].sw_len = port->inbufchunk;
++ port->in_descr[i].ctrl = d_int;
++ port->in_descr[i].next = virt_to_phys(&port->in_descr[i+1]);
++ port->in_descr[i].buf = buf;
++ port->in_descr[i].hw_len = 0;
++ port->in_descr[i].status = 0;
++ port->in_descr[i].fifo_len = 0;
++ buf += port->inbufchunk;
++ prepare_rx_descriptor(&port->in_descr[i]);
++ }
++ /* Link the last descriptor to the first */
++ port->in_descr[i-1].next = virt_to_phys(&port->in_descr[0]);
++ port->in_descr[i-1].ctrl |= d_eol;
++ port->next_rx_desc = &port->in_descr[0];
++ port->prev_rx_desc = &port->in_descr[NUM_IN_DESCR - 1];
++ *port->input_dma_first = virt_to_phys(port->next_rx_desc);
++ *port->input_dma_cmd = IO_STATE(R_DMA_CH0_CMD, cmd, start);
++}
++
++#ifdef SYNC_SER_DMA
++static irqreturn_t tr_interrupt(int irq, void *dev_id)
++{
++ unsigned long ireg = *R_IRQ_MASK2_RD;
++ int i;
++ struct etrax_dma_descr *descr;
++ unsigned int sentl;
++ int handled = 0;
++
++ for (i = 0; i < NUMBER_OF_PORTS; i++)
++ {
++ sync_port *port = &ports[i];
++ if (!port->enabled || !port->use_dma )
++ continue;
++
++ if (ireg & (1 << port->output_dma_bit)) /* IRQ active for the port? */
++ {
++ handled = 1;
++
++ /* Clear IRQ */
++ *port->output_dma_clr_irq =
++ IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do) |
++ IO_STATE(R_DMA_CH0_CLR_INTR, clr_descr, do);
++
++ descr = &port->out_descr;
++ if (!(descr->status & d_stop)) {
++ sentl = descr->sw_len;
++ } else
++ /* otherwise we find the amount of data sent here */
++ sentl = descr->hw_len;
++ port->out_count -= sentl;
++ port->outp += sentl;
++ if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE)
++ port->outp = port->out_buffer;
++ if (port->out_count) {
++ int c;
++ c = port->out_buffer + OUT_BUFFER_SIZE - port->outp;
++ if (c > port->out_count)
++ c = port->out_count;
++ DEBUGTXINT(printk("tx_int DMAWRITE %i %i\n", sentl, c));
++ start_dma(port, port->outp, c);
++ } else {
++ DEBUGTXINT(printk("tx_int DMA stop %i\n", sentl));
++ port->tr_running = 0;
++ }
++ wake_up_interruptible(&port->out_wait_q); /* wake up the waiting process */
++ }
++ }
++ return IRQ_RETVAL(handled);
++} /* tr_interrupt */
++
++static irqreturn_t rx_interrupt(int irq, void *dev_id)
++{
++ unsigned long ireg = *R_IRQ_MASK2_RD;
++ int i;
++ int handled = 0;
++
++ for (i = 0; i < NUMBER_OF_PORTS; i++)
++ {
++ sync_port *port = &ports[i];
++
++ if (!port->enabled || !port->use_dma )
++ continue;
++
++ if (ireg & (1 << port->input_dma_descr_bit)) /* Descriptor interrupt */
++ {
++ handled = 1;
++ while (*port->input_dma_descr != virt_to_phys(port->next_rx_desc)) {
++
++ if (port->writep + port->inbufchunk > port->flip + port->in_buffer_size) {
++ int first_size = port->flip + port->in_buffer_size - port->writep;
++ memcpy(port->writep, phys_to_virt(port->next_rx_desc->buf), first_size);
++ memcpy(port->flip, phys_to_virt(port->next_rx_desc->buf+first_size), port->inbufchunk - first_size);
++ port->writep = port->flip + port->inbufchunk - first_size;
++ } else {
++ memcpy(port->writep, phys_to_virt(port->next_rx_desc->buf), port->inbufchunk);
++ port->writep += port->inbufchunk;
++ if (port->writep >= port->flip + port->in_buffer_size)
++ port->writep = port->flip;
++ }
++ if (port->writep == port->readp)
++ {
++ port->full = 1;
++ }
++
++ prepare_rx_descriptor(port->next_rx_desc);
++ port->next_rx_desc->ctrl |= d_eol;
++ port->prev_rx_desc->ctrl &= ~d_eol;
++ port->prev_rx_desc = phys_to_virt((unsigned)port->next_rx_desc);
++ port->next_rx_desc = phys_to_virt((unsigned)port->next_rx_desc->next);
++ wake_up_interruptible(&port->in_wait_q); /* wake up the waiting process */
++ *port->input_dma_cmd = IO_STATE(R_DMA_CH1_CMD, cmd, restart);
++ /* DMA has reached end of descriptor */
++ *port->input_dma_clr_irq =
++ IO_STATE(R_DMA_CH0_CLR_INTR, clr_descr, do);
++ }
++ }
++ }
++
++ return IRQ_RETVAL(handled);
++} /* rx_interrupt */
++#endif /* SYNC_SER_DMA */
++
++#ifdef SYNC_SER_MANUAL
++static irqreturn_t manual_interrupt(int irq, void *dev_id)
++{
++ int i;
++ int handled = 0;
++
++ for (i = 0; i < NUMBER_OF_PORTS; i++)
++ {
++ sync_port* port = &ports[i];
++
++ if (!port->enabled || port->use_dma)
++ {
++ continue;
++ }
++
++ if (*R_IRQ_MASK1_RD & (1 << port->data_avail_bit)) /* Data received? */
++ {
++ handled = 1;
++ /* Read data */
++ switch(port->ctrl_data_shadow & IO_MASK(R_SYNC_SERIAL1_CTRL, wordsize))
++ {
++ case IO_STATE(R_SYNC_SERIAL1_CTRL, wordsize, size8bit):
++ *port->writep++ = *(volatile char *)port->data_in;
++ break;
++ case IO_STATE(R_SYNC_SERIAL1_CTRL, wordsize, size12bit):
++ {
++ int data = *(unsigned short *)port->data_in;
++ *port->writep = (data & 0x0ff0) >> 4;
++ *(port->writep + 1) = data & 0x0f;
++ port->writep+=2;
++ }
++ break;
++ case IO_STATE(R_SYNC_SERIAL1_CTRL, wordsize, size16bit):
++ *(unsigned short*)port->writep = *(volatile unsigned short *)port->data_in;
++ port->writep+=2;
++ break;
++ case IO_STATE(R_SYNC_SERIAL1_CTRL, wordsize, size24bit):
++ *(unsigned int*)port->writep = *port->data_in;
++ port->writep+=3;
++ break;
++ case IO_STATE(R_SYNC_SERIAL1_CTRL, wordsize, size32bit):
++ *(unsigned int*)port->writep = *port->data_in;
++ port->writep+=4;
++ break;
++ }
++
++ if (port->writep >= port->flip + port->in_buffer_size) /* Wrap? */
++ port->writep = port->flip;
++ if (port->writep == port->readp) {
++ /* receive buffer overrun, discard oldest data
++ */
++ port->readp++;
++ if (port->readp >= port->flip + port->in_buffer_size) /* Wrap? */
++ port->readp = port->flip;
++ }
++ if (sync_data_avail(port) >= port->inbufchunk)
++ wake_up_interruptible(&port->in_wait_q); /* Wake up application */
++ }
++
++ if (*R_IRQ_MASK1_RD & (1 << port->transmitter_ready_bit)) /* Transmitter ready? */
++ {
++ if (port->out_count > 0) /* More data to send */
++ send_word(port);
++ else /* transmission finished */
++ {
++ *R_IRQ_MASK1_CLR = 1 << port->transmitter_ready_bit; /* Turn off IRQ */
++ wake_up_interruptible(&port->out_wait_q); /* Wake up application */
++ }
++ }
++ }
++ return IRQ_RETVAL(handled);
++}
++#endif
++
++module_init(etrax_sync_serial_init);
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/debugport.c linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/debugport.c
+--- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/debugport.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/debugport.c 2006-10-30 16:17:57.000000000 +0100
+@@ -12,6 +12,34 @@
+ * init_etrax_debug()
+ *
+ * $Log: debugport.c,v $
++ * Revision 1.36 2006/10/30 15:17:57 pkj
++ * Avoid a compiler warning.
++ *
++ * Revision 1.35 2006/10/13 12:43:11 starvik
++ * Merge of 2.6.18
++ *
++ * Revision 1.34 2006/09/29 10:32:01 starvik
++ * Don't reference serial driver if not present
++ *
++ * Revision 1.33 2006/09/08 07:59:29 karljope
++ * Makes v10 boot again when watchdog is enabled
++ *
++ * Revision 1.32 2006/06/20 08:23:36 pkj
++ * Reverted incorrect merge.
++ *
++ * Revision 1.31 2006/05/17 12:22:10 edgar
++ * check port before disable ints
++ *
++ * Revision 1.30 2005/11/15 12:08:42 starvik
++ * Set index when no debug port is defined
++ *
++ * Revision 1.29 2005/08/29 07:32:17 starvik
++ * Merge of 2.6.13
++ *
++ * Revision 1.28 2005/07/02 12:29:35 starvik
++ * Use the generic oops_in_progress instead of the raw_printk hack.
++ * Moved some functions to achr-independent code.
++ *
+ * Revision 1.27 2005/06/10 10:34:14 starvik
+ * Real console support
+ *
+@@ -112,6 +140,8 @@
+ #include <asm/arch/svinto.h>
+ #include <asm/io.h> /* Get SIMCOUT. */
+
++extern void reset_watchdog(void);
++
+ struct dbg_port
+ {
+ unsigned int index;
+@@ -188,7 +218,9 @@
+ }
+ };
+
++#ifdef CONFIG_ETRAX_SERIAL
+ extern struct tty_driver *serial_driver;
++#endif
+
+ struct dbg_port* port =
+ #if defined(CONFIG_ETRAX_DEBUG_PORT0)
+@@ -368,11 +400,12 @@
+ {
+ int i;
+ unsigned long flags;
+- local_irq_save(flags);
+-
++
+ if (!port)
+ return;
+-
++
++ local_irq_save(flags);
++
+ /* Send data */
+ for (i = 0; i < len; i++) {
+ /* LF -> CRLF */
+@@ -386,26 +419,16 @@
+ ;
+ *port->write = buf[i];
+ }
+- local_irq_restore(flags);
+-}
+
+-int raw_printk(const char *fmt, ...)
+-{
+- static char buf[1024];
+- int printed_len;
+- static int first = 1;
+- if (first) {
+- /* Force reinitialization of the port to get manual mode. */
+- port->started = 0;
+- start_port(port);
+- first = 0;
+- }
+- va_list args;
+- va_start(args, fmt);
+- printed_len = vsnprintf(buf, sizeof(buf), fmt, args);
+- va_end(args);
+- console_write_direct(NULL, buf, strlen(buf));
+- return printed_len;
++ /*
++ * Feed the watchdog, otherwise it will reset the chip during boot.
++ * The time to send an ordinary boot message line (10-90 chars)
++ * varies between 1-8ms at 115200. What makes up for the additional
++ * 90ms that allows the watchdog to bite?
++ */
++ reset_watchdog();
++
++ local_irq_restore(flags);
+ }
+
+ static void
+@@ -500,6 +523,7 @@
+ return 0;
+ }
+
++
+ /* This is a dummy serial device that throws away anything written to it.
+ * This is used when no debug output is wanted.
+ */
+@@ -555,7 +579,13 @@
+ {
+ if (port)
+ *index = port->index;
++ else
++ *index = 0;
++#ifdef CONFIG_ETRAX_SERIAL
+ return port ? serial_driver : &dummy_driver;
++#else
++ return &dummy_driver;
++#endif
+ }
+
+ static struct console sercons = {
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/entry.S linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/entry.S
+--- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/entry.S 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/entry.S 2007-01-09 10:36:17.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* $Id: entry.S,v 1.28 2005/06/20 05:06:30 starvik Exp $
++/* $Id: entry.S,v 1.38 2007/01/09 09:36:17 starvik Exp $
+ *
+ * linux/arch/cris/entry.S
+ *
+@@ -7,6 +7,41 @@
+ * Authors: Bjorn Wesen (bjornw@axis.com)
+ *
+ * $Log: entry.S,v $
++ * Revision 1.38 2007/01/09 09:36:17 starvik
++ * Corrected kernel_execve
++ *
++ * Revision 1.37 2007/01/09 09:29:18 starvik
++ * Merge of Linux 2.6.19
++ *
++ * Revision 1.36 2006/12/08 13:08:54 orjanf
++ * Copied from Linux 2.4:
++ * * Return from an pin-generated NMI the same way as for other interrupts.
++ * * Reverse check order between external nmi and watchdog nmi to avoid false
++ * watchdog oops in case of a glitch on the nmi pin.
++ *
++ * Revision 1.35 2006/10/13 12:43:11 starvik
++ * Merge of 2.6.18
++ *
++ * Revision 1.34 2006/06/25 15:00:09 starvik
++ * Merge of Linux 2.6.17
++ *
++ * Revision 1.33 2006/05/19 12:23:09 orjanf
++ * * Moved blocking of ethernet rx/tx irq from ethernet interrupt handler to
++ * low-level asm interrupt handlers. Fixed in the multiple interrupt handler
++ * also. Copied from Linux 2.4.
++ *
++ * Revision 1.32 2006/03/23 14:53:57 starvik
++ * Corrected signal handling.
++ *
++ * Revision 1.31 2006/03/22 09:56:55 starvik
++ * Merge of Linux 2.6.16
++ *
++ * Revision 1.30 2005/10/31 08:48:03 starvik
++ * Merge of Linux 2.6.14
++ *
++ * Revision 1.29 2005/08/29 07:32:17 starvik
++ * Merge of 2.6.13
++ *
+ * Revision 1.28 2005/06/20 05:06:30 starvik
+ * Remove unnecessary diff to kernel.org tree
+ *
+@@ -500,9 +535,8 @@
+ ;; deal with pending signals and notify-resume requests
+
+ move.d $r9, $r10 ; do_notify_resume syscall/irq param
+- moveq 0, $r11 ; oldset param - 0 in this case
+- move.d $sp, $r12 ; the regs param
+- move.d $r1, $r13 ; the thread_info_flags parameter
++ move.d $sp, $r11 ; the regs param
++ move.d $r1, $r12 ; the thread_info_flags parameter
+ jsr do_notify_resume
+
+ ba _Rexit
+@@ -653,7 +687,7 @@
+ ;; special handlers for breakpoint and NMI
+ hwbreakpoint:
+ push $dccr
+- di
++ di
+ push $r10
+ push $r11
+ move.d [hw_bp_trig_ptr],$r10
+@@ -678,13 +712,19 @@
+ push $r10 ; push orig_r10
+ clear.d [$sp=$sp-4] ; frametype == 0, normal frame
+
++ ;; If there is a glitch on the NMI pin shorter than ~100ns
++ ;; (i.e. non-active by the time we get here) then the nmi_pin bit
++ ;; in R_IRQ_MASK0_RD will already be cleared. The watchdog_nmi bit
++ ;; is cleared by us however (when feeding the watchdog), which is why
++ ;; we use that bit to determine what brought us here.
++
+ move.d [R_IRQ_MASK0_RD], $r1 ; External NMI or watchdog?
+- and.d 0x80000000, $r1
+- beq wdog
++ and.d (1<<30), $r1
++ bne wdog
+ move.d $sp, $r10
+ jsr handle_nmi
+ setf m ; Enable NMI again
+- retb ; Return from NMI
++ ba _Rexit ; Return the standard way
+ nop
+ wdog:
+ #if defined(CONFIG_ETRAX_WATCHDOG) && !defined(CONFIG_SVINTO_SIM)
+@@ -774,23 +814,10 @@
+ movem $r13, [$sp]
+ push $r10 ; push orig_r10
+ clear.d [$sp=$sp-4] ; frametype == 0, normal frame
+-
+- moveq 2, $r2 ; first bit we care about is the timer0 irq
+- move.d [R_VECT_MASK_RD], $r0; read the irq bits that triggered the multiple irq
+- move.d $r0, [R_VECT_MASK_CLR] ; Block all active IRQs
+-1:
+- btst $r2, $r0 ; check for the irq given by bit r2
+- bpl 2f
+- move.d $r2, $r10 ; First argument to do_IRQ
+- move.d $sp, $r11 ; second argument to do_IRQ
+- jsr do_IRQ
+-2:
+- addq 1, $r2 ; next vector bit
+- cmp.b 32, $r2
+- bne 1b ; process all irq's up to and including number 31
+- moveq 0, $r9 ; make ret_from_intr realise we came from an ir
+-
+- move.d $r0, [R_VECT_MASK_SET] ; Unblock all the IRQs
++
++ move.d $sp, $r10
++ jsr do_multiple_IRQ
++
+ jump ret_from_intr
+
+ do_sigtrap:
+@@ -836,6 +863,13 @@
+ pop $r0 ; Restore r0.
+ ba do_sigtrap ; SIGTRAP the offending process.
+ pop $dccr ; Restore dccr in delay slot.
++
++ .global kernel_execve
++kernel_execve:
++ move.d __NR_execve, $r9
++ break 13
++ ret
++ nop
+
+ .data
+
+@@ -1135,7 +1169,38 @@
+ .long sys_add_key
+ .long sys_request_key
+ .long sys_keyctl
+-
++ .long sys_ioprio_set
++ .long sys_ioprio_get /* 290 */
++ .long sys_inotify_init
++ .long sys_inotify_add_watch
++ .long sys_inotify_rm_watch
++ .long sys_migrate_pages
++ .long sys_openat /* 295 */
++ .long sys_mkdirat
++ .long sys_mknodat
++ .long sys_fchownat
++ .long sys_futimesat
++ .long sys_fstatat64 /* 300 */
++ .long sys_unlinkat
++ .long sys_renameat
++ .long sys_linkat
++ .long sys_symlinkat
++ .long sys_readlinkat /* 305 */
++ .long sys_fchmodat
++ .long sys_faccessat
++ .long sys_pselect6
++ .long sys_ppoll
++ .long sys_unshare /* 310 */
++ .long sys_set_robust_list
++ .long sys_get_robust_list
++ .long sys_splice
++ .long sys_sync_file_range
++ .long sys_tee /* 315 */
++ .long sys_vmsplice
++ .long sys_move_pages
++ .long sys_getcpu
++ .long sys_epoll_pwait
++
+ /*
+ * NOTE!! This doesn't have to be exact - we just have
+ * to make sure we have _enough_ of the "sys_ni_syscall"
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/fasttimer.c linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/fasttimer.c
+--- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/fasttimer.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/fasttimer.c 2007-02-05 12:54:34.000000000 +0100
+@@ -1,97 +1,10 @@
+-/* $Id: fasttimer.c,v 1.9 2005/03/04 08:16:16 starvik Exp $
++/*
+ * linux/arch/cris/kernel/fasttimer.c
+ *
+ * Fast timers for ETRAX100/ETRAX100LX
+ * This may be useful in other OS than Linux so use 2 space indentation...
+ *
+- * $Log: fasttimer.c,v $
+- * Revision 1.9 2005/03/04 08:16:16 starvik
+- * Merge of Linux 2.6.11.
+- *
+- * Revision 1.8 2005/01/05 06:09:29 starvik
+- * cli()/sti() will be obsolete in 2.6.11.
+- *
+- * Revision 1.7 2005/01/03 13:35:46 starvik
+- * Removed obsolete stuff.
+- * Mark fast timer IRQ as not shared.
+- *
+- * Revision 1.6 2004/05/14 10:18:39 starvik
+- * Export fast_timer_list
+- *
+- * Revision 1.5 2004/05/14 07:58:01 starvik
+- * Merge of changes from 2.4
+- *
+- * Revision 1.4 2003/07/04 08:27:41 starvik
+- * Merge of Linux 2.5.74
+- *
+- * Revision 1.3 2002/12/12 08:26:32 starvik
+- * Don't use C-comments inside CVS comments
+- *
+- * Revision 1.2 2002/12/11 15:42:02 starvik
+- * Extracted v10 (ETRAX 100LX) specific stuff from arch/cris/kernel/
+- *
+- * Revision 1.1 2002/11/18 07:58:06 starvik
+- * Fast timers (from Linux 2.4)
+- *
+- * Revision 1.5 2002/10/15 06:21:39 starvik
+- * Added call to init_waitqueue_head
+- *
+- * Revision 1.4 2002/05/28 17:47:59 johana
+- * Added del_fast_timer()
+- *
+- * Revision 1.3 2002/05/28 16:16:07 johana
+- * Handle empty fast_timer_list
+- *
+- * Revision 1.2 2002/05/27 15:38:42 johana
+- * Made it compile without warnings on Linux 2.4.
+- * (includes, wait_queue, PROC_FS and snprintf)
+- *
+- * Revision 1.1 2002/05/27 15:32:25 johana
+- * arch/etrax100/kernel/fasttimer.c v1.8 from the elinux tree.
+- *
+- * Revision 1.8 2001/11/27 13:50:40 pkj
+- * Disable interrupts while stopping the timer and while modifying the
+- * list of active timers in timer1_handler() as it may be interrupted
+- * by other interrupts (e.g., the serial interrupt) which may add fast
+- * timers.
+- *
+- * Revision 1.7 2001/11/22 11:50:32 pkj
+- * * Only store information about the last 16 timers.
+- * * proc_fasttimer_read() now uses an allocated buffer, since it
+- * requires more space than just a page even for only writing the
+- * last 16 timers. The buffer is only allocated on request, so
+- * unless /proc/fasttimer is read, it is never allocated.
+- * * Renamed fast_timer_started to fast_timers_started to match
+- * fast_timers_added and fast_timers_expired.
+- * * Some clean-up.
+- *
+- * Revision 1.6 2000/12/13 14:02:08 johana
+- * Removed volatile for fast_timer_list
+- *
+- * Revision 1.5 2000/12/13 13:55:35 johana
+- * Added DEBUG_LOG, added som cli() and cleanup
+- *
+- * Revision 1.4 2000/12/05 13:48:50 johana
+- * Added range check when writing proc file, modified timer int handling
+- *
+- * Revision 1.3 2000/11/23 10:10:20 johana
+- * More debug/logging possibilities.
+- * Moved GET_JIFFIES_USEC() to timex.h and time.c
+- *
+- * Revision 1.2 2000/11/01 13:41:04 johana
+- * Clean up and bugfixes.
+- * Created new do_gettimeofday_fast() that gets a timeval struct
+- * with time based on jiffies and *R_TIMER0_DATA, uses a table
+- * for fast conversion of timer value to microseconds.
+- * (Much faster the standard do_gettimeofday() and we don't really
+- * wan't to use the true time - we wan't the "uptime" so timers don't screw up
+- * when we change the time.
+- * TODO: Add efficient support for continuous timers as well.
+- *
+- * Revision 1.1 2000/10/26 15:49:16 johana
+- * Added fasttimer, highresolution timers.
+- *
+- * Copyright (C) 2000,2001 2002 Axis Communications AB, Lund, Sweden
++ * Copyright (C) 2000-2006 Axis Communications AB, Lund, Sweden
+ */
+
+ #include <linux/errno.h>
+@@ -136,13 +49,13 @@
+
+ #define __INLINE__ inline
+
+-static int fast_timer_running = 0;
+-static int fast_timers_added = 0;
+-static int fast_timers_started = 0;
+-static int fast_timers_expired = 0;
+-static int fast_timers_deleted = 0;
+-static int fast_timer_is_init = 0;
+-static int fast_timer_ints = 0;
++static unsigned int fast_timer_running = 0;
++static unsigned int fast_timers_added = 0;
++static unsigned int fast_timers_started = 0;
++static unsigned int fast_timers_expired = 0;
++static unsigned int fast_timers_deleted = 0;
++static unsigned int fast_timer_is_init = 0;
++static unsigned int fast_timer_ints = 0;
+
+ struct fast_timer *fast_timer_list = NULL;
+
+@@ -150,8 +63,8 @@
+ #define DEBUG_LOG_MAX 128
+ static const char * debug_log_string[DEBUG_LOG_MAX];
+ static unsigned long debug_log_value[DEBUG_LOG_MAX];
+-static int debug_log_cnt = 0;
+-static int debug_log_cnt_wrapped = 0;
++static unsigned int debug_log_cnt = 0;
++static unsigned int debug_log_cnt_wrapped = 0;
+
+ #define DEBUG_LOG(string, value) \
+ { \
+@@ -206,41 +119,25 @@
+ int timer_delay_settings[NUM_TIMER_STATS];
+
+ /* Not true gettimeofday, only checks the jiffies (uptime) + useconds */
+-void __INLINE__ do_gettimeofday_fast(struct timeval *tv)
++void __INLINE__ do_gettimeofday_fast(struct fasttime_t *tv)
+ {
+- unsigned long sec = jiffies;
+- unsigned long usec = GET_JIFFIES_USEC();
+-
+- usec += (sec % HZ) * (1000000 / HZ);
+- sec = sec / HZ;
+-
+- if (usec > 1000000)
+- {
+- usec -= 1000000;
+- sec++;
+- }
+- tv->tv_sec = sec;
+- tv->tv_usec = usec;
++ tv->tv_jiff = jiffies;
++ tv->tv_usec = GET_JIFFIES_USEC();
+ }
+
+-int __INLINE__ timeval_cmp(struct timeval *t0, struct timeval *t1)
++int __INLINE__ timeval_cmp(struct fasttime_t *t0, struct fasttime_t *t1)
+ {
+- if (t0->tv_sec < t1->tv_sec)
+- {
++ /* Compare jiffies. Takes care of wrapping */
++ if (time_before(t0->tv_jiff, t1->tv_jiff))
+ return -1;
+- }
+- else if (t0->tv_sec > t1->tv_sec)
+- {
++ else if (time_after(t0->tv_jiff, t1->tv_jiff))
+ return 1;
+- }
++
++ /* Compare us */
+ if (t0->tv_usec < t1->tv_usec)
+- {
+ return -1;
+- }
+ else if (t0->tv_usec > t1->tv_usec)
+- {
+ return 1;
+- }
+ return 0;
+ }
+
+@@ -340,7 +237,7 @@
+ printk(KERN_WARNING
+ "timer name: %s data: 0x%08lX already in list!\n", name, data);
+ sanity_failed++;
+- return;
++ goto done;
+ }
+ else
+ {
+@@ -356,11 +253,11 @@
+ t->name = name;
+
+ t->tv_expires.tv_usec = t->tv_set.tv_usec + delay_us % 1000000;
+- t->tv_expires.tv_sec = t->tv_set.tv_sec + delay_us / 1000000;
++ t->tv_expires.tv_jiff = t->tv_set.tv_jiff + delay_us / 1000000 / HZ;
+ if (t->tv_expires.tv_usec > 1000000)
+ {
+ t->tv_expires.tv_usec -= 1000000;
+- t->tv_expires.tv_sec++;
++ t->tv_expires.tv_jiff += HZ;
+ }
+ #ifdef FAST_TIMER_LOG
+ timer_added_log[fast_timers_added % NUM_TIMER_STATS] = *t;
+@@ -401,6 +298,7 @@
+
+ D2(printk("start_one_shot_timer: %d us done\n", delay_us));
+
++done:
+ local_irq_restore(flags);
+ } /* start_one_shot_timer */
+
+@@ -444,11 +342,18 @@
+ /* Timer 1 interrupt handler */
+
+ static irqreturn_t
+-timer1_handler(int irq, void *dev_id, struct pt_regs *regs)
++timer1_handler(int irq, void *dev_id)
+ {
+ struct fast_timer *t;
+ unsigned long flags;
+
++ /* We keep interrupts disabled not only when we modify the
++ * fast timer list, but any time we hold a reference to a
++ * timer in the list, since del_fast_timer may be called
++ * from (another) interrupt context. Thus, the only time
++ * when interrupts are enabled is when calling the timer
++ * callback function.
++ */
+ local_irq_save(flags);
+
+ /* Clear timer1 irq */
+@@ -466,16 +371,16 @@
+ fast_timer_running = 0;
+ fast_timer_ints++;
+
+- local_irq_restore(flags);
+-
+ t = fast_timer_list;
+ while (t)
+ {
+- struct timeval tv;
++ struct fasttime_t tv;
++ fast_timer_function_type *f;
++ unsigned long d;
+
+ /* Has it really expired? */
+ do_gettimeofday_fast(&tv);
+- D1(printk("t: %is %06ius\n", tv.tv_sec, tv.tv_usec));
++ D1(printk("t: %is %06ius\n", tv.tv_jiff, tv.tv_usec));
+
+ if (timeval_cmp(&t->tv_expires, &tv) <= 0)
+ {
+@@ -486,7 +391,6 @@
+ fast_timers_expired++;
+
+ /* Remove this timer before call, since it may reuse the timer */
+- local_irq_save(flags);
+ if (t->prev)
+ {
+ t->prev->next = t->next;
+@@ -501,11 +405,21 @@
+ }
+ t->prev = NULL;
+ t->next = NULL;
+- local_irq_restore(flags);
+
+- if (t->function != NULL)
++ /* Save function callback data before enabling interrupts,
++ * since the timer may be removed and we don't know how it
++ * was allocated (e.g. ->function and ->data may become
++ * overwritten after deletion if the timer was stack-allocated).
++ */
++ f = t->function;
++ d = t->data;
++
++ if (f != NULL)
+ {
+- t->function(t->data);
++ /* Run the callback function with interrupts enabled. */
++ local_irq_restore(flags);
++ f(d);
++ local_irq_save(flags);
+ }
+ else
+ {
+@@ -518,16 +432,19 @@
+ D1(printk(".\n"));
+ }
+
+- local_irq_save(flags);
+ if ((t = fast_timer_list) != NULL)
+ {
+ /* Start next timer.. */
+- long us;
+- struct timeval tv;
++ long us = 0;
++ struct fasttime_t tv;
+
+ do_gettimeofday_fast(&tv);
+- us = ((t->tv_expires.tv_sec - tv.tv_sec) * 1000000 +
+- t->tv_expires.tv_usec - tv.tv_usec);
++
++ /* time_after_eq takes care of wrapping */
++ if (time_after_eq(t->tv_expires.tv_jiff, tv.tv_jiff))
++ us = ((t->tv_expires.tv_jiff - tv.tv_jiff) * 1000000 / HZ +
++ t->tv_expires.tv_usec - tv.tv_usec);
++
+ if (us > 0)
+ {
+ if (!fast_timer_running)
+@@ -537,7 +454,6 @@
+ #endif
+ start_timer1(us);
+ }
+- local_irq_restore(flags);
+ break;
+ }
+ else
+@@ -548,9 +464,10 @@
+ D1(printk("e! %d\n", us));
+ }
+ }
+- local_irq_restore(flags);
+ }
+
++ local_irq_restore(flags);
++
+ if (!t)
+ {
+ D1(printk("t1 stop!\n"));
+@@ -575,28 +492,17 @@
+ void schedule_usleep(unsigned long us)
+ {
+ struct fast_timer t;
+-#ifdef DECLARE_WAITQUEUE
+ wait_queue_head_t sleep_wait;
+ init_waitqueue_head(&sleep_wait);
+- {
+- DECLARE_WAITQUEUE(wait, current);
+-#else
+- struct wait_queue *sleep_wait = NULL;
+- struct wait_queue wait = { current, NULL };
+-#endif
+
+ D1(printk("schedule_usleep(%d)\n", us));
+- add_wait_queue(&sleep_wait, &wait);
+- set_current_state(TASK_INTERRUPTIBLE);
+ start_one_shot_timer(&t, wake_up_func, (unsigned long)&sleep_wait, us,
+ "usleep");
+- schedule();
+- set_current_state(TASK_RUNNING);
+- remove_wait_queue(&sleep_wait, &wait);
++ /* Uninterruptible sleep on the fast timer. (The condition is somewhat
++ redundant since the timer is what wakes us up.) */
++ wait_event(sleep_wait, !fast_timer_pending(&t));
++
+ D1(printk("done schedule_usleep(%d)\n", us));
+-#ifdef DECLARE_WAITQUEUE
+- }
+-#endif
+ }
+
+ #ifdef CONFIG_PROC_FS
+@@ -616,7 +522,7 @@
+ unsigned long flags;
+ int i = 0;
+ int num_to_show;
+- struct timeval tv;
++ struct fasttime_t tv;
+ struct fast_timer *t, *nextt;
+ static char *bigbuf = NULL;
+ static unsigned long used;
+@@ -624,7 +530,8 @@
+ if (!bigbuf && !(bigbuf = vmalloc(BIG_BUF_SIZE)))
+ {
+ used = 0;
+- bigbuf[0] = '\0';
++ if (buf)
++ buf[0] = '\0';
+ return 0;
+ }
+
+@@ -646,7 +553,7 @@
+ used += sprintf(bigbuf + used, "Fast timer running: %s\n",
+ fast_timer_running ? "yes" : "no");
+ used += sprintf(bigbuf + used, "Current time: %lu.%06lu\n",
+- (unsigned long)tv.tv_sec,
++ (unsigned long)tv.tv_jiff,
+ (unsigned long)tv.tv_usec);
+ #ifdef FAST_TIMER_SANITY_CHECKS
+ used += sprintf(bigbuf + used, "Sanity failed: %i\n",
+@@ -696,9 +603,9 @@
+ "d: %6li us data: 0x%08lX"
+ "\n",
+ t->name,
+- (unsigned long)t->tv_set.tv_sec,
++ (unsigned long)t->tv_set.tv_jiff,
+ (unsigned long)t->tv_set.tv_usec,
+- (unsigned long)t->tv_expires.tv_sec,
++ (unsigned long)t->tv_expires.tv_jiff,
+ (unsigned long)t->tv_expires.tv_usec,
+ t->delay_us,
+ t->data
+@@ -718,9 +625,9 @@
+ "d: %6li us data: 0x%08lX"
+ "\n",
+ t->name,
+- (unsigned long)t->tv_set.tv_sec,
++ (unsigned long)t->tv_set.tv_jiff,
+ (unsigned long)t->tv_set.tv_usec,
+- (unsigned long)t->tv_expires.tv_sec,
++ (unsigned long)t->tv_expires.tv_jiff,
+ (unsigned long)t->tv_expires.tv_usec,
+ t->delay_us,
+ t->data
+@@ -738,9 +645,9 @@
+ "d: %6li us data: 0x%08lX"
+ "\n",
+ t->name,
+- (unsigned long)t->tv_set.tv_sec,
++ (unsigned long)t->tv_set.tv_jiff,
+ (unsigned long)t->tv_set.tv_usec,
+- (unsigned long)t->tv_expires.tv_sec,
++ (unsigned long)t->tv_expires.tv_jiff,
+ (unsigned long)t->tv_expires.tv_usec,
+ t->delay_us,
+ t->data
+@@ -761,15 +668,15 @@
+ /* " func: 0x%08lX" */
+ "\n",
+ t->name,
+- (unsigned long)t->tv_set.tv_sec,
++ (unsigned long)t->tv_set.tv_jiff,
+ (unsigned long)t->tv_set.tv_usec,
+- (unsigned long)t->tv_expires.tv_sec,
++ (unsigned long)t->tv_expires.tv_jiff,
+ (unsigned long)t->tv_expires.tv_usec,
+ t->delay_us,
+ t->data
+ /* , t->function */
+ );
+- local_irq_disable();
++ local_irq_save(flags);
+ if (t->next != nextt)
+ {
+ printk(KERN_WARNING "timer removed!\n");
+@@ -798,7 +705,7 @@
+ static struct fast_timer tr[10];
+ static int exp_num[10];
+
+-static struct timeval tv_exp[100];
++static struct fasttime_t tv_exp[100];
+
+ static void test_timeout(unsigned long data)
+ {
+@@ -836,7 +743,7 @@
+ int prev_num;
+ int j;
+
+- struct timeval tv, tv0, tv1, tv2;
++ struct fasttime_t tv, tv0, tv1, tv2;
+
+ printk("fast_timer_test() start\n");
+ do_gettimeofday_fast(&tv);
+@@ -849,7 +756,7 @@
+ {
+ do_gettimeofday_fast(&tv_exp[j]);
+ }
+- printk("fast_timer_test() %is %06i\n", tv.tv_sec, tv.tv_usec);
++ printk("fast_timer_test() %is %06i\n", tv.tv_jiff, tv.tv_usec);
+
+ for (j = 0; j < 1000; j++)
+ {
+@@ -859,11 +766,11 @@
+ for (j = 0; j < 100; j++)
+ {
+ printk("%i.%i %i.%i %i.%i %i.%i %i.%i\n",
+- tv_exp[j].tv_sec,tv_exp[j].tv_usec,
+- tv_exp[j+1].tv_sec,tv_exp[j+1].tv_usec,
+- tv_exp[j+2].tv_sec,tv_exp[j+2].tv_usec,
+- tv_exp[j+3].tv_sec,tv_exp[j+3].tv_usec,
+- tv_exp[j+4].tv_sec,tv_exp[j+4].tv_usec);
++ tv_exp[j].tv_jiff,tv_exp[j].tv_usec,
++ tv_exp[j+1].tv_jiff,tv_exp[j+1].tv_usec,
++ tv_exp[j+2].tv_jiff,tv_exp[j+2].tv_usec,
++ tv_exp[j+3].tv_jiff,tv_exp[j+3].tv_usec,
++ tv_exp[j+4].tv_jiff,tv_exp[j+4].tv_usec);
+ j += 4;
+ }
+ do_gettimeofday_fast(&tv0);
+@@ -895,9 +802,9 @@
+ }
+ }
+ do_gettimeofday_fast(&tv2);
+- printk("Timers started %is %06i\n", tv0.tv_sec, tv0.tv_usec);
+- printk("Timers started at %is %06i\n", tv1.tv_sec, tv1.tv_usec);
+- printk("Timers done %is %06i\n", tv2.tv_sec, tv2.tv_usec);
++ printk("Timers started %is %06i\n", tv0.tv_jiff, tv0.tv_usec);
++ printk("Timers started at %is %06i\n", tv1.tv_jiff, tv1.tv_usec);
++ printk("Timers done %is %06i\n", tv2.tv_jiff, tv2.tv_usec);
+ DP(printk("buf0:\n");
+ printk(buf0);
+ printk("buf1:\n");
+@@ -919,9 +826,9 @@
+ printk("%-10s set: %6is %06ius exp: %6is %06ius "
+ "data: 0x%08X func: 0x%08X\n",
+ t->name,
+- t->tv_set.tv_sec,
++ t->tv_set.tv_jiff,
+ t->tv_set.tv_usec,
+- t->tv_expires.tv_sec,
++ t->tv_expires.tv_jiff,
+ t->tv_expires.tv_usec,
+ t->data,
+ t->function
+@@ -929,10 +836,10 @@
+
+ printk(" del: %6ius did exp: %6is %06ius as #%i error: %6li\n",
+ t->delay_us,
+- tv_exp[j].tv_sec,
++ tv_exp[j].tv_jiff,
+ tv_exp[j].tv_usec,
+ exp_num[j],
+- (tv_exp[j].tv_sec - t->tv_expires.tv_sec)*1000000 + tv_exp[j].tv_usec - t->tv_expires.tv_usec);
++ (tv_exp[j].tv_jiff - t->tv_expires.tv_jiff)*1000000 + tv_exp[j].tv_usec - t->tv_expires.tv_usec);
+ }
+ proc_fasttimer_read(buf5, NULL, 0, 0, 0);
+ printk("buf5 after all done:\n");
+@@ -942,7 +849,7 @@
+ #endif
+
+
+-void fast_timer_init(void)
++int fast_timer_init(void)
+ {
+ /* For some reason, request_irq() hangs when called froom time_init() */
+ if (!fast_timer_is_init)
+@@ -975,4 +882,6 @@
+ fast_timer_test();
+ #endif
+ }
++ return 0;
+ }
++__initcall(fast_timer_init);
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/head.S linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/head.S
+--- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/head.S 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/head.S 2006-10-20 09:33:26.000000000 +0200
+@@ -1,4 +1,4 @@
+-/* $Id: head.S,v 1.10 2005/06/20 05:12:54 starvik Exp $
++/* $Id: head.S,v 1.13 2006/10/20 07:33:26 kjelld Exp $
+ *
+ * Head of the kernel - alter with care
+ *
+@@ -7,6 +7,19 @@
+ * Authors: Bjorn Wesen (bjornw@axis.com)
+ *
+ * $Log: head.S,v $
++ * Revision 1.13 2006/10/20 07:33:26 kjelld
++ * If serial port 2 is used, select it in R_GEN_CONFIG.
++ * If serial port 2 is used, setup the control registers for the port.
++ * This is done to avoid a puls on the TXD line during start up.
++ * This puls could disturbe some units (e.g. some Axis 214 with internal
++ * ver. 1.08).
++ *
++ * Revision 1.12 2006/10/13 12:43:11 starvik
++ * Merge of 2.6.18
++ *
++ * Revision 1.11 2005/08/29 07:32:17 starvik
++ * Merge of 2.6.13
++ *
+ * Revision 1.10 2005/06/20 05:12:54 starvik
+ * Remove unnecessary diff to kernel.org tree
+ *
+@@ -595,11 +608,17 @@
+
+ moveq 0,$r0
+
++ ;; Select or disable serial port 2
++#ifdef CONFIG_ETRAX_SERIAL_PORT2
++ or.d IO_STATE (R_GEN_CONFIG, ser2, select),$r0
++#else
++ or.d IO_STATE (R_GEN_CONFIG, ser2, disable),$r0
++#endif
++
+ ;; Init interfaces (disable them).
+ or.d IO_STATE (R_GEN_CONFIG, scsi0, disable) \
+ | IO_STATE (R_GEN_CONFIG, ata, disable) \
+ | IO_STATE (R_GEN_CONFIG, par0, disable) \
+- | IO_STATE (R_GEN_CONFIG, ser2, disable) \
+ | IO_STATE (R_GEN_CONFIG, mio, disable) \
+ | IO_STATE (R_GEN_CONFIG, scsi1, disable) \
+ | IO_STATE (R_GEN_CONFIG, scsi0w, disable) \
+@@ -801,6 +820,41 @@
+ | IO_STATE (R_SERIAL1_TR_CTRL, tr_bitnr, tr_8bit),$r0
+ move.b $r0,[R_SERIAL1_TR_CTRL]
+
++#ifdef CONFIG_ETRAX_SERIAL_PORT2
++ ;; setup the serial port 2 at 115200 baud for debug purposes
++
++ moveq IO_STATE (R_SERIAL2_XOFF, tx_stop, enable) \
++ | IO_STATE (R_SERIAL2_XOFF, auto_xoff, disable) \
++ | IO_FIELD (R_SERIAL2_XOFF, xoff_char, 0),$r0
++ move.d $r0,[R_SERIAL2_XOFF]
++
++ ; 115.2kbaud for both transmit and receive
++ move.b IO_STATE (R_SERIAL2_BAUD, tr_baud, c115k2Hz) \
++ | IO_STATE (R_SERIAL2_BAUD, rec_baud, c115k2Hz),$r0
++ move.b $r0,[R_SERIAL2_BAUD]
++
++ ; Set up and enable the serial2 receiver.
++ move.b IO_STATE (R_SERIAL2_REC_CTRL, dma_err, stop) \
++ | IO_STATE (R_SERIAL2_REC_CTRL, rec_enable, enable) \
++ | IO_STATE (R_SERIAL2_REC_CTRL, rts_, active) \
++ | IO_STATE (R_SERIAL2_REC_CTRL, sampling, middle) \
++ | IO_STATE (R_SERIAL2_REC_CTRL, rec_stick_par, normal) \
++ | IO_STATE (R_SERIAL2_REC_CTRL, rec_par, even) \
++ | IO_STATE (R_SERIAL2_REC_CTRL, rec_par_en, disable) \
++ | IO_STATE (R_SERIAL2_REC_CTRL, rec_bitnr, rec_8bit),$r0
++ move.b $r0,[R_SERIAL2_REC_CTRL]
++
++ ; Set up and enable the serial2 transmitter.
++ move.b IO_FIELD (R_SERIAL2_TR_CTRL, txd, 0) \
++ | IO_STATE (R_SERIAL2_TR_CTRL, tr_enable, enable) \
++ | IO_STATE (R_SERIAL2_TR_CTRL, auto_cts, disabled) \
++ | IO_STATE (R_SERIAL2_TR_CTRL, stop_bits, one_bit) \
++ | IO_STATE (R_SERIAL2_TR_CTRL, tr_stick_par, normal) \
++ | IO_STATE (R_SERIAL2_TR_CTRL, tr_par, even) \
++ | IO_STATE (R_SERIAL2_TR_CTRL, tr_par_en, disable) \
++ | IO_STATE (R_SERIAL2_TR_CTRL, tr_bitnr, tr_8bit),$r0
++ move.b $r0,[R_SERIAL2_TR_CTRL]
++#endif
+
+ #ifdef CONFIG_ETRAX_SERIAL_PORT3
+ ;; setup the serial port 3 at 115200 baud for debug purposes
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/io_interface_mux.c linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/io_interface_mux.c
+--- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/io_interface_mux.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/io_interface_mux.c 2006-10-04 20:21:18.000000000 +0200
+@@ -1,10 +1,10 @@
+ /* IO interface mux allocator for ETRAX100LX.
+- * Copyright 2004, Axis Communications AB
+- * $Id: io_interface_mux.c,v 1.2 2004/12/21 12:08:38 starvik Exp $
++ * Copyright 2004-2006, Axis Communications AB
++ * $Id: io_interface_mux.c,v 1.4 2006/10/04 18:21:18 henriken Exp $
+ */
+
+
+-/* C.f. ETRAX100LX Designer's Reference 20.9 */
++/* C.f. ETRAX100LX Designer's Reference 19.9 */
+
+ #include <linux/kernel.h>
+ #include <linux/slab.h>
+@@ -35,7 +35,7 @@
+ struct watcher
+ {
+ void (*notify)(const unsigned int gpio_in_available,
+- const unsigned int gpio_out_available,
++ const unsigned int gpio_out_available,
+ const unsigned char pa_available,
+ const unsigned char pb_available);
+ struct watcher *next;
+@@ -45,17 +45,40 @@
+ struct if_group
+ {
+ enum io_if_group group;
+- unsigned char used;
+- enum cris_io_interface owner;
++ // name - the name of the group 'A' to 'F'
++ char *name;
++ // used - a bit mask of all pins in the group in the order listed
++ // in in the tables in 19.9.1 to 19.9.6. Note that no
++ // distinction is made between in, out and in/out pins.
++ unsigned int used;
+ };
+
+
+ struct interface
+ {
+ enum cris_io_interface ioif;
++ // name - the name of the interface
++ char *name;
++ // groups - OR'ed together io_if_group flags describing what pin groups
++ // the interface uses pins in.
+ unsigned char groups;
++ // used - set when the interface is allocated.
+ unsigned char used;
+ char *owner;
++ // group_a through group_f - bit masks describing what pins in the
++ // pin groups the interface uses.
++ unsigned int group_a;
++ unsigned int group_b;
++ unsigned int group_c;
++ unsigned int group_d;
++ unsigned int group_e;
++ unsigned int group_f;
++
++ // gpio_g_in, gpio_g_out, gpio_b - bit masks telling what pins in the
++ // GPIO ports the interface uses. This
++ // could be reconstucted using the group_X
++ // masks and a table of what pins the GPIO
++ // ports use, but that would be messy.
+ unsigned int gpio_g_in;
+ unsigned int gpio_g_out;
+ unsigned char gpio_b;
+@@ -64,26 +87,32 @@
+ static struct if_group if_groups[6] = {
+ {
+ .group = group_a,
++ .name = "A",
+ .used = 0,
+ },
+ {
+ .group = group_b,
++ .name = "B",
+ .used = 0,
+ },
+ {
+ .group = group_c,
++ .name = "C",
+ .used = 0,
+ },
+ {
+ .group = group_d,
++ .name = "D",
+ .used = 0,
+ },
+ {
+ .group = group_e,
++ .name = "E",
+ .used = 0,
+ },
+ {
+ .group = group_f,
++ .name = "F",
+ .used = 0,
+ }
+ };
+@@ -94,14 +123,32 @@
+ /* Begin Non-multiplexed interfaces */
+ {
+ .ioif = if_eth,
++ .name = "ethernet",
+ .groups = 0,
++
++ .group_a = 0,
++ .group_b = 0,
++ .group_c = 0,
++ .group_d = 0,
++ .group_e = 0,
++ .group_f = 0,
++
+ .gpio_g_in = 0,
+ .gpio_g_out = 0,
+ .gpio_b = 0
+ },
+ {
+ .ioif = if_serial_0,
++ .name = "serial_0",
+ .groups = 0,
++
++ .group_a = 0,
++ .group_b = 0,
++ .group_c = 0,
++ .group_d = 0,
++ .group_e = 0,
++ .group_f = 0,
++
+ .gpio_g_in = 0,
+ .gpio_g_out = 0,
+ .gpio_b = 0
+@@ -109,172 +156,385 @@
+ /* End Non-multiplexed interfaces */
+ {
+ .ioif = if_serial_1,
++ .name = "serial_1",
+ .groups = group_e,
++
++ .group_a = 0,
++ .group_b = 0,
++ .group_c = 0,
++ .group_d = 0,
++ .group_e = 0x0f,
++ .group_f = 0,
++
+ .gpio_g_in = 0x00000000,
+ .gpio_g_out = 0x00000000,
+ .gpio_b = 0x00
+ },
+ {
+ .ioif = if_serial_2,
++ .name = "serial_2",
+ .groups = group_b,
++
++ .group_a = 0,
++ .group_b = 0x0f,
++ .group_c = 0,
++ .group_d = 0,
++ .group_e = 0,
++ .group_f = 0,
++
+ .gpio_g_in = 0x000000c0,
+ .gpio_g_out = 0x000000c0,
+ .gpio_b = 0x00
+ },
+ {
+ .ioif = if_serial_3,
++ .name = "serial_3",
+ .groups = group_c,
++
++ .group_a = 0,
++ .group_b = 0,
++ .group_c = 0x0f,
++ .group_d = 0,
++ .group_e = 0,
++ .group_f = 0,
++
+ .gpio_g_in = 0xc0000000,
+ .gpio_g_out = 0xc0000000,
+ .gpio_b = 0x00
+ },
+ {
+ .ioif = if_sync_serial_1,
+- .groups = group_e | group_f, /* if_sync_serial_1 and if_sync_serial_3
+- can be used simultaneously */
++ .name = "sync_serial_1",
++ .groups = group_e | group_f,
++
++ .group_a = 0,
++ .group_b = 0,
++ .group_c = 0,
++ .group_d = 0,
++ .group_e = 0x0f,
++ .group_f = 0x10,
++
+ .gpio_g_in = 0x00000000,
+ .gpio_g_out = 0x00000000,
+ .gpio_b = 0x10
+ },
+ {
+ .ioif = if_sync_serial_3,
++ .name = "sync_serial_3",
+ .groups = group_c | group_f,
++
++ .group_a = 0,
++ .group_b = 0,
++ .group_c = 0x0f,
++ .group_d = 0,
++ .group_e = 0,
++ .group_f = 0x80,
++
+ .gpio_g_in = 0xc0000000,
+ .gpio_g_out = 0xc0000000,
+ .gpio_b = 0x80
+ },
+ {
+ .ioif = if_shared_ram,
++ .name = "shared_ram",
+ .groups = group_a,
++
++ .group_a = 0x7f8ff,
++ .group_b = 0,
++ .group_c = 0,
++ .group_d = 0,
++ .group_e = 0,
++ .group_f = 0,
++
+ .gpio_g_in = 0x0000ff3e,
+ .gpio_g_out = 0x0000ff38,
+ .gpio_b = 0x00
+ },
+ {
+ .ioif = if_shared_ram_w,
++ .name = "shared_ram_w",
+ .groups = group_a | group_d,
++
++ .group_a = 0x7f8ff,
++ .group_b = 0,
++ .group_c = 0,
++ .group_d = 0xff,
++ .group_e = 0,
++ .group_f = 0,
++
+ .gpio_g_in = 0x00ffff3e,
+ .gpio_g_out = 0x00ffff38,
+ .gpio_b = 0x00
+ },
+ {
+ .ioif = if_par_0,
++ .name = "par_0",
+ .groups = group_a,
++
++ .group_a = 0x7fbff,
++ .group_b = 0,
++ .group_c = 0,
++ .group_d = 0,
++ .group_e = 0,
++ .group_f = 0,
++
+ .gpio_g_in = 0x0000ff3e,
+ .gpio_g_out = 0x0000ff3e,
+ .gpio_b = 0x00
+ },
+ {
+ .ioif = if_par_1,
++ .name = "par_1",
+ .groups = group_d,
++
++ .group_a = 0,
++ .group_b = 0,
++ .group_c = 0,
++ .group_d = 0x7feff,
++ .group_e = 0,
++ .group_f = 0,
++
+ .gpio_g_in = 0x3eff0000,
+ .gpio_g_out = 0x3eff0000,
+ .gpio_b = 0x00
+ },
+ {
+ .ioif = if_par_w,
++ .name = "par_w",
+ .groups = group_a | group_d,
++
++ .group_a = 0x7fbff,
++ .group_b = 0,
++ .group_c = 0,
++ .group_d = 0xff,
++ .group_e = 0,
++ .group_f = 0,
++
+ .gpio_g_in = 0x00ffff3e,
+ .gpio_g_out = 0x00ffff3e,
+ .gpio_b = 0x00
+ },
+ {
+ .ioif = if_scsi8_0,
+- .groups = group_a | group_b | group_f, /* if_scsi8_0 and if_scsi8_1
+- can be used simultaneously */
++ .name = "scsi8_0",
++ .groups = group_a | group_b | group_f,
++
++ .group_a = 0x7ffff,
++ .group_b = 0x0f,
++ .group_c = 0,
++ .group_d = 0,
++ .group_e = 0,
++ .group_f = 0x10,
++
+ .gpio_g_in = 0x0000ffff,
+ .gpio_g_out = 0x0000ffff,
+ .gpio_b = 0x10
+ },
+ {
+ .ioif = if_scsi8_1,
+- .groups = group_c | group_d | group_f, /* if_scsi8_0 and if_scsi8_1
+- can be used simultaneously */
++ .name = "scsi8_1",
++ .groups = group_c | group_d | group_f,
++
++ .group_a = 0,
++ .group_b = 0,
++ .group_c = 0x0f,
++ .group_d = 0x7ffff,
++ .group_e = 0,
++ .group_f = 0x80,
++
+ .gpio_g_in = 0xffff0000,
+ .gpio_g_out = 0xffff0000,
+ .gpio_b = 0x80
+ },
+ {
+ .ioif = if_scsi_w,
++ .name = "scsi_w",
+ .groups = group_a | group_b | group_d | group_f,
++
++ .group_a = 0x7ffff,
++ .group_b = 0x0f,
++ .group_c = 0,
++ .group_d = 0x601ff,
++ .group_e = 0,
++ .group_f = 0x90,
++
+ .gpio_g_in = 0x01ffffff,
+ .gpio_g_out = 0x07ffffff,
+ .gpio_b = 0x80
+ },
+ {
+ .ioif = if_ata,
++ .name = "ata",
+ .groups = group_a | group_b | group_c | group_d,
++
++ .group_a = 0x7ffff,
++ .group_b = 0x0f,
++ .group_c = 0x0f,
++ .group_d = 0x7cfff,
++ .group_e = 0,
++ .group_f = 0,
++
+ .gpio_g_in = 0xf9ffffff,
+ .gpio_g_out = 0xffffffff,
+ .gpio_b = 0x80
+ },
+ {
+ .ioif = if_csp,
+- .groups = group_f, /* if_csp and if_i2c can be used simultaneously */
++ .name = "csp",
++ .groups = group_f,
++
++ .group_a = 0,
++ .group_b = 0,
++ .group_c = 0,
++ .group_d = 0,
++ .group_e = 0,
++ .group_f = 0xfc,
++
+ .gpio_g_in = 0x00000000,
+ .gpio_g_out = 0x00000000,
+ .gpio_b = 0xfc
+ },
+ {
+ .ioif = if_i2c,
+- .groups = group_f, /* if_csp and if_i2c can be used simultaneously */
++ .name = "i2c",
++ .groups = group_f,
++
++ .group_a = 0,
++ .group_b = 0,
++ .group_c = 0,
++ .group_d = 0,
++ .group_e = 0,
++ .group_f = 0x03,
++
+ .gpio_g_in = 0x00000000,
+ .gpio_g_out = 0x00000000,
+ .gpio_b = 0x03
+ },
+ {
+ .ioif = if_usb_1,
++ .name = "usb_1",
+ .groups = group_e | group_f,
++
++ .group_a = 0,
++ .group_b = 0,
++ .group_c = 0,
++ .group_d = 0,
++ .group_e = 0x0f,
++ .group_f = 0x2c,
++
+ .gpio_g_in = 0x00000000,
+ .gpio_g_out = 0x00000000,
+ .gpio_b = 0x2c
+ },
+ {
+ .ioif = if_usb_2,
++ .name = "usb_2",
+ .groups = group_d,
+- .gpio_g_in = 0x0e000000,
+- .gpio_g_out = 0x3c000000,
++
++ .group_a = 0,
++ .group_b = 0,
++ .group_c = 0,
++ .group_d = 0,
++ .group_e = 0x33e00,
++ .group_f = 0,
++
++ .gpio_g_in = 0x3e000000,
++ .gpio_g_out = 0x0c000000,
+ .gpio_b = 0x00
+ },
+ /* GPIO pins */
+ {
+ .ioif = if_gpio_grp_a,
++ .name = "gpio_a",
+ .groups = group_a,
++
++ .group_a = 0,
++ .group_b = 0,
++ .group_c = 0,
++ .group_d = 0,
++ .group_e = 0,
++ .group_f = 0,
++
+ .gpio_g_in = 0x0000ff3f,
+ .gpio_g_out = 0x0000ff3f,
+ .gpio_b = 0x00
+ },
+ {
+ .ioif = if_gpio_grp_b,
++ .name = "gpio_b",
+ .groups = group_b,
++
++ .group_a = 0,
++ .group_b = 0,
++ .group_c = 0,
++ .group_d = 0,
++ .group_e = 0,
++ .group_f = 0,
++
+ .gpio_g_in = 0x000000c0,
+ .gpio_g_out = 0x000000c0,
+ .gpio_b = 0x00
+ },
+ {
+ .ioif = if_gpio_grp_c,
++ .name = "gpio_c",
+ .groups = group_c,
++
++ .group_a = 0,
++ .group_b = 0,
++ .group_c = 0,
++ .group_d = 0,
++ .group_e = 0,
++ .group_f = 0,
++
+ .gpio_g_in = 0xc0000000,
+ .gpio_g_out = 0xc0000000,
+ .gpio_b = 0x00
+ },
+ {
+ .ioif = if_gpio_grp_d,
++ .name = "gpio_d",
+ .groups = group_d,
++
++ .group_a = 0,
++ .group_b = 0,
++ .group_c = 0,
++ .group_d = 0,
++ .group_e = 0,
++ .group_f = 0,
++
+ .gpio_g_in = 0x3fff0000,
+ .gpio_g_out = 0x3fff0000,
+ .gpio_b = 0x00
+ },
+ {
+ .ioif = if_gpio_grp_e,
++ .name = "gpio_e",
+ .groups = group_e,
++
++ .group_a = 0,
++ .group_b = 0,
++ .group_c = 0,
++ .group_d = 0,
++ .group_e = 0,
++ .group_f = 0,
++
+ .gpio_g_in = 0x00000000,
+ .gpio_g_out = 0x00000000,
+ .gpio_b = 0x00
+ },
+ {
+ .ioif = if_gpio_grp_f,
++ .name = "gpio_f",
+ .groups = group_f,
++
++ .group_a = 0,
++ .group_b = 0,
++ .group_c = 0,
++ .group_d = 0,
++ .group_e = 0,
++ .group_f = 0,
++
+ .gpio_g_in = 0x00000000,
+ .gpio_g_out = 0x00000000,
+ .gpio_b = 0xff
+@@ -284,11 +544,13 @@
+
+ static struct watcher *watchers = NULL;
+
++// The pins that are free to use in the GPIO ports.
+ static unsigned int gpio_in_pins = 0xffffffff;
+ static unsigned int gpio_out_pins = 0xffffffff;
+ static unsigned char gpio_pb_pins = 0xff;
+ static unsigned char gpio_pa_pins = 0xff;
+
++// Identifiers for the owners of the GPIO pins.
+ static enum cris_io_interface gpio_pa_owners[8];
+ static enum cris_io_interface gpio_pb_owners[8];
+ static enum cris_io_interface gpio_pg_owners[32];
+@@ -318,7 +580,7 @@
+ struct watcher *w = watchers;
+
+ DBG(printk("io_interface_mux: notifying watchers\n"));
+-
++
+ while (NULL != w) {
+ w->notify((const unsigned int)gpio_in_pins,
+ (const unsigned int)gpio_out_pins,
+@@ -354,37 +616,48 @@
+
+ if (interfaces[ioif].used) {
+ local_irq_restore(flags);
+- printk(KERN_CRIT "cris_io_interface: Cannot allocate interface for %s, in use by %s\n",
++ printk(KERN_CRIT "cris_io_interface: Cannot allocate interface %s for %s, in use by %s\n",
++ interfaces[ioif].name,
+ device_id,
+ interfaces[ioif].owner);
+ return -EBUSY;
+ }
+
+- /* Check that all required groups are free before allocating, */
++ /* Check that all required pins in the used groups are free
++ * before allocating. */
+ group_set = interfaces[ioif].groups;
+ while (NULL != (grp = get_group(group_set))) {
+- if (grp->used) {
+- if (grp->group == group_f) {
+- if ((if_sync_serial_1 == ioif) ||
+- (if_sync_serial_3 == ioif)) {
+- if ((grp->owner != if_sync_serial_1) &&
+- (grp->owner != if_sync_serial_3)) {
+- local_irq_restore(flags);
+- return -EBUSY;
+- }
+- } else if ((if_scsi8_0 == ioif) ||
+- (if_scsi8_1 == ioif)) {
+- if ((grp->owner != if_scsi8_0) &&
+- (grp->owner != if_scsi8_1)) {
+- local_irq_restore(flags);
+- return -EBUSY;
+- }
+- }
+- } else {
+- local_irq_restore(flags);
+- return -EBUSY;
+- }
++ unsigned int if_group_use = 0;
++
++ switch(grp->group) {
++ case group_a:
++ if_group_use = interfaces[ioif].group_a;
++ break;
++ case group_b:
++ if_group_use = interfaces[ioif].group_b;
++ break;
++ case group_c:
++ if_group_use = interfaces[ioif].group_c;
++ break;
++ case group_d:
++ if_group_use = interfaces[ioif].group_d;
++ break;
++ case group_e:
++ if_group_use = interfaces[ioif].group_e;
++ break;
++ case group_f:
++ if_group_use = interfaces[ioif].group_f;
++ break;
++ default:
++ BUG_ON(1);
+ }
++
++ if(if_group_use & grp->used) {
++ local_irq_restore(flags);
++ printk(KERN_INFO "cris_request_io_interface: group %s needed by %s not available\n", grp->name, interfaces[ioif].name);
++ return -EBUSY;
++ }
++
+ group_set = clear_group_from_set(group_set, grp);
+ }
+
+@@ -392,22 +665,16 @@
+ if (((interfaces[ioif].gpio_g_in & gpio_in_pins) != interfaces[ioif].gpio_g_in) ||
+ ((interfaces[ioif].gpio_g_out & gpio_out_pins) != interfaces[ioif].gpio_g_out) ||
+ ((interfaces[ioif].gpio_b & gpio_pb_pins) != interfaces[ioif].gpio_b)) {
+- printk(KERN_CRIT "cris_request_io_interface: Could not get required pins for interface %u\n",
+- ioif);
++ local_irq_restore(flags);
++ printk(KERN_CRIT "cris_request_io_interface: Could not get required pins for interface %s\n",
++ interfaces[ioif].name);
+ return -EBUSY;
+ }
+
+- /* All needed I/O pins and pin groups are free, allocate. */
+- group_set = interfaces[ioif].groups;
+- while (NULL != (grp = get_group(group_set))) {
+- grp->used = 1;
+- grp->owner = ioif;
+- group_set = clear_group_from_set(group_set, grp);
+- }
+-
++ /* Check which registers need to be reconfigured. */
+ gens = genconfig_shadow;
+ gens_ii = gen_config_ii_shadow;
+-
++
+ set_gen_config = 1;
+ switch (ioif)
+ {
+@@ -494,9 +761,43 @@
+ set_gen_config = 0;
+ break;
+ default:
+- panic("cris_request_io_interface: Bad interface %u submitted for %s\n",
+- ioif,
+- device_id);
++ local_irq_restore(flags);
++ printk(KERN_INFO "cris_request_io_interface: Bad interface %u submitted for %s\n",
++ ioif,
++ device_id);
++ return -EBUSY;
++ }
++
++ /* All needed I/O pins and pin groups are free, allocate. */
++ group_set = interfaces[ioif].groups;
++ while (NULL != (grp = get_group(group_set))) {
++ unsigned int if_group_use = 0;
++
++ switch(grp->group) {
++ case group_a:
++ if_group_use = interfaces[ioif].group_a;
++ break;
++ case group_b:
++ if_group_use = interfaces[ioif].group_b;
++ break;
++ case group_c:
++ if_group_use = interfaces[ioif].group_c;
++ break;
++ case group_d:
++ if_group_use = interfaces[ioif].group_d;
++ break;
++ case group_e:
++ if_group_use = interfaces[ioif].group_e;
++ break;
++ case group_f:
++ if_group_use = interfaces[ioif].group_f;
++ break;
++ default:
++ BUG_ON(1);
++ }
++ grp->used |= if_group_use;
++
++ group_set = clear_group_from_set(group_set, grp);
+ }
+
+ interfaces[ioif].used = 1;
+@@ -528,7 +829,7 @@
+
+ DBG(printk("GPIO pins: available after: g_in=0x%08x g_out=0x%08x pb=0x%02x\n",
+ gpio_in_pins, gpio_out_pins, gpio_pb_pins));
+-
++
+ local_irq_restore(flags);
+
+ notify_watchers();
+@@ -559,43 +860,36 @@
+ }
+ group_set = interfaces[ioif].groups;
+ while (NULL != (grp = get_group(group_set))) {
+- if (grp->group == group_f) {
+- switch (ioif)
+- {
+- case if_sync_serial_1:
+- if ((grp->owner == if_sync_serial_1) &&
+- interfaces[if_sync_serial_3].used) {
+- grp->owner = if_sync_serial_3;
+- } else
+- grp->used = 0;
+- break;
+- case if_sync_serial_3:
+- if ((grp->owner == if_sync_serial_3) &&
+- interfaces[if_sync_serial_1].used) {
+- grp->owner = if_sync_serial_1;
+- } else
+- grp->used = 0;
+- break;
+- case if_scsi8_0:
+- if ((grp->owner == if_scsi8_0) &&
+- interfaces[if_scsi8_1].used) {
+- grp->owner = if_scsi8_1;
+- } else
+- grp->used = 0;
+- break;
+- case if_scsi8_1:
+- if ((grp->owner == if_scsi8_1) &&
+- interfaces[if_scsi8_0].used) {
+- grp->owner = if_scsi8_0;
+- } else
+- grp->used = 0;
+- break;
+- default:
+- grp->used = 0;
+- }
+- } else {
+- grp->used = 0;
++ unsigned int if_group_use = 0;
++
++ switch(grp->group) {
++ case group_a:
++ if_group_use = interfaces[ioif].group_a;
++ break;
++ case group_b:
++ if_group_use = interfaces[ioif].group_b;
++ break;
++ case group_c:
++ if_group_use = interfaces[ioif].group_c;
++ break;
++ case group_d:
++ if_group_use = interfaces[ioif].group_d;
++ break;
++ case group_e:
++ if_group_use = interfaces[ioif].group_e;
++ break;
++ case group_f:
++ if_group_use = interfaces[ioif].group_f;
++ break;
++ default:
++ BUG_ON(1);
+ }
++
++ if ((grp->used & if_group_use) != if_group_use) {
++ BUG_ON(1);
++ }
++ grp->used = grp->used & ~if_group_use;
++
+ group_set = clear_group_from_set(group_set, grp);
+ }
+ interfaces[ioif].used = 0;
+@@ -784,7 +1078,7 @@
+
+ for (i = start_bit; i <= stop_bit; i++) {
+ owners[i] = if_unclaimed;
+- }
++ }
+ local_irq_restore(flags);
+ notify_watchers();
+
+@@ -821,7 +1115,7 @@
+ }
+
+ void cris_io_interface_delete_watcher(void (*notify)(const unsigned int gpio_in_available,
+- const unsigned int gpio_out_available,
++ const unsigned int gpio_out_available,
+ const unsigned char pa_available,
+ const unsigned char pb_available))
+ {
+@@ -870,7 +1164,7 @@
+
+ module_init(cris_io_interface_init);
+
+-
++
+ EXPORT_SYMBOL(cris_request_io_interface);
+ EXPORT_SYMBOL(cris_free_io_interface);
+ EXPORT_SYMBOL(cris_io_interface_allocate_pins);
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/irq.c linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/irq.c
+--- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/irq.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/irq.c 2006-10-30 16:17:03.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* $Id: irq.c,v 1.4 2005/01/04 12:22:28 starvik Exp $
++/* $Id: irq.c,v 1.9 2006/10/30 15:17:03 pkj Exp $
+ *
+ * linux/arch/cris/kernel/irq.c
+ *
+@@ -12,7 +12,9 @@
+ */
+
+ #include <asm/irq.h>
++#include <asm/current.h>
+ #include <linux/irq.h>
++#include <linux/interrupt.h>
+ #include <linux/kernel.h>
+ #include <linux/init.h>
+
+@@ -75,8 +77,8 @@
+ BUILD_IRQ(13, 0x2000)
+ void mmu_bus_fault(void); /* IRQ 14 is the bus fault interrupt */
+ void multiple_interrupt(void); /* IRQ 15 is the multiple IRQ interrupt */
+-BUILD_IRQ(16, 0x10000)
+-BUILD_IRQ(17, 0x20000)
++BUILD_IRQ(16, 0x10000 | 0x20000) /* ethernet tx interrupt needs to block rx */
++BUILD_IRQ(17, 0x20000 | 0x10000) /* ...and vice versa */
+ BUILD_IRQ(18, 0x40000)
+ BUILD_IRQ(19, 0x80000)
+ BUILD_IRQ(20, 0x100000)
+@@ -147,6 +149,55 @@
+ void do_sigtrap(void); /* from entry.S */
+ void gdb_handle_breakpoint(void); /* from entry.S */
+
++extern void do_IRQ(int irq, struct pt_regs * regs);
++
++/* Handle multiple IRQs */
++void do_multiple_IRQ(struct pt_regs* regs)
++{
++ int bit;
++ unsigned masked;
++ unsigned mask;
++ unsigned ethmask = 0;
++
++ /* Get interrupts to mask and handle */
++ mask = masked = *R_VECT_MASK_RD;
++
++ /* Never mask timer IRQ */
++ mask &= ~(IO_MASK(R_VECT_MASK_RD, timer0));
++
++ /*
++ * If either ethernet interrupt (rx or tx) is active then block
++ * the other one too. Unblock afterwards also.
++ */
++ if (mask &
++ (IO_STATE(R_VECT_MASK_RD, dma0, active) |
++ IO_STATE(R_VECT_MASK_RD, dma1, active))) {
++ ethmask = (IO_MASK(R_VECT_MASK_RD, dma0) |
++ IO_MASK(R_VECT_MASK_RD, dma1));
++ }
++
++ /* Block them */
++ *R_VECT_MASK_CLR = (mask | ethmask);
++
++ /* An extra irq_enter here to prevent softIRQs to run after
++ * each do_IRQ. This will decrease the interrupt latency.
++ */
++ irq_enter();
++
++ /* Handle all IRQs */
++ for (bit = 2; bit < 32; bit++) {
++ if (masked & (1 << bit)) {
++ do_IRQ(bit, regs);
++ }
++ }
++
++ /* This irq_exit() will trigger the soft IRQs. */
++ irq_exit();
++
++ /* Unblock the IRQs again */
++ *R_VECT_MASK_SET = (masked | ethmask);
++}
++
+ /* init_IRQ() is called by start_kernel and is responsible for fixing IRQ masks and
+ setting the irq vector table.
+ */
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/kgdb.c linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/kgdb.c
+--- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/kgdb.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/kgdb.c 2006-03-22 10:56:55.000000000 +0100
+@@ -18,6 +18,10 @@
+ *! Jul 21 1999 Bjorn Wesen eLinux port
+ *!
+ *! $Log: kgdb.c,v $
++*! Revision 1.7 2006/03/22 09:56:55 starvik
++*! Merge of Linux 2.6.16
++*!
++*!
+ *! Revision 1.6 2005/01/14 10:12:17 starvik
+ *! KGDB on separate port.
+ *! Console fixes from 2.4.
+@@ -75,7 +79,7 @@
+ *!
+ *!---------------------------------------------------------------------------
+ *!
+-*! $Id: kgdb.c,v 1.6 2005/01/14 10:12:17 starvik Exp $
++*! $Id: kgdb.c,v 1.7 2006/03/22 09:56:55 starvik Exp $
+ *!
+ *! (C) Copyright 1999, Axis Communications AB, LUND, SWEDEN
+ *!
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/process.c linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/process.c
+--- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/process.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/process.c 2006-10-13 14:43:11.000000000 +0200
+@@ -1,4 +1,4 @@
+-/* $Id: process.c,v 1.12 2004/12/27 11:18:32 starvik Exp $
++/* $Id: process.c,v 1.14 2006/10/13 12:43:11 starvik Exp $
+ *
+ * linux/arch/cris/kernel/process.c
+ *
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/ptrace.c linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/ptrace.c
+--- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/ptrace.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/ptrace.c 2006-10-30 16:17:57.000000000 +0100
+@@ -66,6 +66,7 @@
+ ptrace_disable(struct task_struct *child)
+ {
+ /* Todo - pending singlesteps? */
++ clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
+ }
+
+ /*
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/setup.c linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/setup.c
+--- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/setup.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/setup.c 2006-10-13 14:43:11.000000000 +0200
+@@ -1,4 +1,4 @@
+-/*
++/*
+ *
+ * linux/arch/cris/arch-v10/kernel/setup.c
+ *
+@@ -13,6 +13,7 @@
+ #include <linux/seq_file.h>
+ #include <linux/proc_fs.h>
+ #include <linux/delay.h>
++#include <linux/param.h>
+
+ #ifdef CONFIG_PROC_FS
+ #define HAS_FPU 0x0001
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/signal.c linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/signal.c
+--- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/signal.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/signal.c 2006-03-22 10:56:55.000000000 +0100
+@@ -41,7 +41,7 @@
+ */
+ #define RESTART_CRIS_SYS(regs) regs->r10 = regs->orig_r10; regs->irp -= 2;
+
+-int do_signal(int canrestart, sigset_t *oldset, struct pt_regs *regs);
++void do_signal(int canrestart, struct pt_regs *regs);
+
+ /*
+ * Atomically swap in the new signal mask, and wait for a signal. Define
+@@ -52,68 +52,16 @@
+ sys_sigsuspend(old_sigset_t mask, long r11, long r12, long r13, long mof,
+ long srp, struct pt_regs *regs)
+ {
+- sigset_t saveset;
+-
+ mask &= _BLOCKABLE;
+ spin_lock_irq(¤t->sighand->siglock);
+- saveset = current->blocked;
+- siginitset(¤t->blocked, mask);
+- recalc_sigpending();
+- spin_unlock_irq(¤t->sighand->siglock);
+-
+- regs->r10 = -EINTR;
+- while (1) {
+- current->state = TASK_INTERRUPTIBLE;
+- schedule();
+- if (do_signal(0, &saveset, regs))
+- /* We will get here twice: once to call the signal
+- handler, then again to return from the
+- sigsuspend system call. When calling the
+- signal handler, R10 holds the signal number as
+- set through do_signal. The sigsuspend call
+- will return with the restored value set above;
+- always -EINTR. */
+- return regs->r10;
+- }
+-}
+-
+-/* Define dummy arguments to be able to reach the regs argument. (Note that
+- * this arrangement relies on size_t occupying one register.)
+- */
+-int
+-sys_rt_sigsuspend(sigset_t *unewset, size_t sigsetsize, long r12, long r13,
+- long mof, long srp, struct pt_regs *regs)
+-{
+- sigset_t saveset, newset;
+-
+- /* XXX: Don't preclude handling different sized sigset_t's. */
+- if (sigsetsize != sizeof(sigset_t))
+- return -EINVAL;
+-
+- if (copy_from_user(&newset, unewset, sizeof(newset)))
+- return -EFAULT;
+- sigdelsetmask(&newset, ~_BLOCKABLE);
+-
+- spin_lock_irq(¤t->sighand->siglock);
+- saveset = current->blocked;
+- current->blocked = newset;
++ current->saved_sigmask = current->blocked;
++ siginitset(¤t->blocked, mask);
+ recalc_sigpending();
+ spin_unlock_irq(¤t->sighand->siglock);
+-
+- regs->r10 = -EINTR;
+- while (1) {
+- current->state = TASK_INTERRUPTIBLE;
+- schedule();
+- if (do_signal(0, &saveset, regs))
+- /* We will get here twice: once to call the signal
+- handler, then again to return from the
+- sigsuspend system call. When calling the
+- signal handler, R10 holds the signal number as
+- set through do_signal. The sigsuspend call
+- will return with the restored value set above;
+- always -EINTR. */
+- return regs->r10;
+- }
++ current->state = TASK_INTERRUPTIBLE;
++ schedule();
++ set_thread_flag(TIF_RESTORE_SIGMASK);
++ return -ERESTARTNOHAND;
+ }
+
+ int
+@@ -353,8 +301,8 @@
+ * user-mode trampoline.
+ */
+
+-static void setup_frame(int sig, struct k_sigaction *ka,
+- sigset_t *set, struct pt_regs * regs)
++static int setup_frame(int sig, struct k_sigaction *ka,
++ sigset_t *set, struct pt_regs * regs)
+ {
+ struct sigframe __user *frame;
+ unsigned long return_ip;
+@@ -402,14 +350,15 @@
+
+ wrusp((unsigned long)frame);
+
+- return;
++ return 0;
+
+ give_sigsegv:
+ force_sigsegv(sig, current);
++ return -EFAULT;
+ }
+
+-static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
+- sigset_t *set, struct pt_regs * regs)
++static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
++ sigset_t *set, struct pt_regs * regs)
+ {
+ struct rt_sigframe __user *frame;
+ unsigned long return_ip;
+@@ -466,21 +415,24 @@
+
+ wrusp((unsigned long)frame);
+
+- return;
++ return 0;
+
+ give_sigsegv:
+ force_sigsegv(sig, current);
++ return -EFAULT;
+ }
+
+ /*
+ * OK, we're invoking a handler
+ */
+
+-static inline void
++static inline int
+ handle_signal(int canrestart, unsigned long sig,
+ siginfo_t *info, struct k_sigaction *ka,
+ sigset_t *oldset, struct pt_regs * regs)
+ {
++ int ret;
++
+ /* Are we from a system call? */
+ if (canrestart) {
+ /* If so, check system call restarting.. */
+@@ -510,19 +462,20 @@
+
+ /* Set up the stack frame */
+ if (ka->sa.sa_flags & SA_SIGINFO)
+- setup_rt_frame(sig, ka, info, oldset, regs);
++ ret = setup_rt_frame(sig, ka, info, oldset, regs);
+ else
+- setup_frame(sig, ka, oldset, regs);
++ ret = setup_frame(sig, ka, oldset, regs);
+
+- if (ka->sa.sa_flags & SA_ONESHOT)
+- ka->sa.sa_handler = SIG_DFL;
++ if (ret == 0) {
++ spin_lock_irq(¤t->sighand->siglock);
++ sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask);
++ if (!(ka->sa.sa_flags & SA_NODEFER))
++ sigaddset(¤t->blocked,sig);
++ recalc_sigpending();
++ spin_unlock_irq(¤t->sighand->siglock);
++ }
+
+- spin_lock_irq(¤t->sighand->siglock);
+- sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask);
+- if (!(ka->sa.sa_flags & SA_NODEFER))
+- sigaddset(¤t->blocked,sig);
+- recalc_sigpending();
+- spin_unlock_irq(¤t->sighand->siglock);
++ return ret;
+ }
+
+ /*
+@@ -537,12 +490,13 @@
+ * mode below.
+ */
+
+-int do_signal(int canrestart, sigset_t *oldset, struct pt_regs *regs)
++void do_signal(int canrestart, struct pt_regs *regs)
+ {
+ siginfo_t info;
+ int signr;
+ struct k_sigaction ka;
+-
++ sigset_t *oldset;
++
+ /*
+ * We want the common case to go fast, which
+ * is why we may in certain cases get here from
+@@ -550,16 +504,26 @@
+ * if so.
+ */
+ if (!user_mode(regs))
+- return 1;
++ return;
+
+- if (!oldset)
++ if (test_thread_flag(TIF_RESTORE_SIGMASK))
++ oldset = ¤t->saved_sigmask;
++ else
+ oldset = ¤t->blocked;
+
+ signr = get_signal_to_deliver(&info, &ka, regs, NULL);
+ if (signr > 0) {
+ /* Whee! Actually deliver the signal. */
+- handle_signal(canrestart, signr, &info, &ka, oldset, regs);
+- return 1;
++ if (handle_signal(canrestart, signr, &info, &ka, oldset, regs)) {
++ /* a signal was successfully delivered; the saved
++ * sigmask will have been stored in the signal frame,
++ * and will be restored by sigreturn, so we can simply
++ * clear the TIF_RESTORE_SIGMASK flag */
++ if (test_thread_flag(TIF_RESTORE_SIGMASK))
++ clear_thread_flag(TIF_RESTORE_SIGMASK);
++ }
++
++ return;
+ }
+
+ /* Did we come from a system call? */
+@@ -575,5 +539,11 @@
+ regs->irp -= 2;
+ }
+ }
+- return 0;
++
++ /* if there's no signal to deliver, we just put the saved sigmask
++ * back */
++ if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
++ clear_thread_flag(TIF_RESTORE_SIGMASK);
++ sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL);
++ }
+ }
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/time.c linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/time.c
+--- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/time.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/time.c 2007-01-09 10:29:18.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* $Id: time.c,v 1.5 2004/09/29 06:12:46 starvik Exp $
++/* $Id: time.c,v 1.10 2007/01/09 09:29:18 starvik Exp $
+ *
+ * linux/arch/cris/arch-v10/kernel/time.c
+ *
+@@ -20,6 +20,7 @@
+ #include <asm/io.h>
+ #include <asm/delay.h>
+ #include <asm/rtc.h>
++#include <asm/irq_regs.h>
+
+ /* define this if you need to use print_timestamp */
+ /* it will make jiffies at 96 hz instead of 100 hz though */
+@@ -202,8 +203,9 @@
+ extern void cris_do_profile(struct pt_regs *regs);
+
+ static inline irqreturn_t
+-timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
++timer_interrupt(int irq, void *dev_id)
+ {
++ struct pt_regs* regs = get_irq_regs();
+ /* acknowledge the timer irq */
+
+ #ifdef USE_CASCADE_TIMERS
+@@ -222,9 +224,11 @@
+ #endif
+
+ /* reset watchdog otherwise it resets us! */
+-
+ reset_watchdog();
+
++ /* Update statistics. */
++ update_process_times(user_mode(regs));
++
+ /* call the real timer interrupt handler */
+
+ do_timer(1);
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/kernel/traps.c linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/traps.c
+--- linux-2.6.19.2.old/arch/cris/arch-v10/kernel/traps.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/kernel/traps.c 2006-12-11 14:04:24.000000000 +0100
+@@ -1,13 +1,10 @@
+-/* $Id: traps.c,v 1.4 2005/04/24 18:47:55 starvik Exp $
++/*
++ * Helper functions for trap handlers
+ *
+- * linux/arch/cris/arch-v10/traps.c
++ * Copyright (C) 2000-2006, Axis Communications AB.
+ *
+- * Heler functions for trap handlers
+- *
+- * Copyright (C) 2000-2002 Axis Communications AB
+- *
+- * Authors: Bjorn Wesen
+- * Hans-Peter Nilsson
++ * Authors: Bjorn Wesen
++ * Hans-Peter Nilsson
+ *
+ */
+
+@@ -15,124 +12,118 @@
+ #include <asm/uaccess.h>
+ #include <asm/arch/sv_addr_ag.h>
+
+-extern int raw_printk(const char *fmt, ...);
+-
+-void
+-show_registers(struct pt_regs * regs)
++void
++show_registers(struct pt_regs *regs)
+ {
+- /* We either use rdusp() - the USP register, which might not
+- correspond to the current process for all cases we're called,
+- or we use the current->thread.usp, which is not up to date for
+- the current process. Experience shows we want the USP
+- register. */
++ /*
++ * It's possible to use either the USP register or current->thread.usp.
++ * USP might not correspond to the current process for all cases this
++ * function is called, and current->thread.usp isn't up to date for the
++ * current process. Experience shows that using USP is the way to go.
++ */
+ unsigned long usp = rdusp();
+
+- raw_printk("IRP: %08lx SRP: %08lx DCCR: %08lx USP: %08lx MOF: %08lx\n",
+- regs->irp, regs->srp, regs->dccr, usp, regs->mof );
+- raw_printk(" r0: %08lx r1: %08lx r2: %08lx r3: %08lx\n",
++ printk("IRP: %08lx SRP: %08lx DCCR: %08lx USP: %08lx MOF: %08lx\n",
++ regs->irp, regs->srp, regs->dccr, usp, regs->mof);
++
++ printk(" r0: %08lx r1: %08lx r2: %08lx r3: %08lx\n",
+ regs->r0, regs->r1, regs->r2, regs->r3);
+- raw_printk(" r4: %08lx r5: %08lx r6: %08lx r7: %08lx\n",
++
++ printk(" r4: %08lx r5: %08lx r6: %08lx r7: %08lx\n",
+ regs->r4, regs->r5, regs->r6, regs->r7);
+- raw_printk(" r8: %08lx r9: %08lx r10: %08lx r11: %08lx\n",
++
++ printk(" r8: %08lx r9: %08lx r10: %08lx r11: %08lx\n",
+ regs->r8, regs->r9, regs->r10, regs->r11);
+- raw_printk("r12: %08lx r13: %08lx oR10: %08lx sp: %08lx\n",
+- regs->r12, regs->r13, regs->orig_r10, regs);
+- raw_printk("R_MMU_CAUSE: %08lx\n", (unsigned long)*R_MMU_CAUSE);
+- raw_printk("Process %s (pid: %d, stackpage=%08lx)\n",
++
++ printk("r12: %08lx r13: %08lx oR10: %08lx sp: %08lx\n",
++ regs->r12, regs->r13, regs->orig_r10, (long unsigned)regs);
++
++ printk("R_MMU_CAUSE: %08lx\n", (unsigned long)*R_MMU_CAUSE);
++
++ printk("Process %s (pid: %d, stackpage=%08lx)\n",
+ current->comm, current->pid, (unsigned long)current);
+
+ /*
+- * When in-kernel, we also print out the stack and code at the
+- * time of the fault..
+- */
+- if (! user_mode(regs)) {
+- int i;
++ * When in-kernel, we also print out the stack and code at the
++ * time of the fault..
++ */
++ if (!user_mode(regs)) {
++ int i;
+
+- show_stack(NULL, (unsigned long*)usp);
++ show_stack(NULL, (unsigned long *)usp);
+
+- /* Dump kernel stack if the previous dump wasn't one. */
++ /*
++ * If the previous stack-dump wasn't a kernel one, dump the
++ * kernel stack now.
++ */
+ if (usp != 0)
+- show_stack (NULL, NULL);
++ show_stack(NULL, NULL);
+
+- raw_printk("\nCode: ");
+- if(regs->irp < PAGE_OFFSET)
+- goto bad;
+-
+- /* Often enough the value at regs->irp does not point to
+- the interesting instruction, which is most often the
+- _previous_ instruction. So we dump at an offset large
+- enough that instruction decoding should be in sync at
+- the interesting point, but small enough to fit on a row
+- (sort of). We point out the regs->irp location in a
+- ksymoops-friendly way by wrapping the byte for that
+- address in parentheses. */
+- for(i = -12; i < 12; i++)
+- {
+- unsigned char c;
+- if(__get_user(c, &((unsigned char*)regs->irp)[i])) {
+-bad:
+- raw_printk(" Bad IP value.");
+- break;
+- }
++ printk("\nCode: ");
++
++ if (regs->irp < PAGE_OFFSET)
++ goto bad_value;
++
++ /*
++ * Quite often the value at regs->irp doesn't point to the
++ * interesting instruction, which often is the previous
++ * instruction. So dump at an offset large enough that the
++ * instruction decoding should be in sync at the interesting
++ * point, but small enough to fit on a row. The regs->irp
++ * location is pointed out in a ksymoops-friendly way by
++ * wrapping the byte for that address in parenthesises.
++ */
++ for (i = -12; i < 12; i++) {
++ unsigned char c;
++
++ if (__get_user(c, &((unsigned char *)regs->irp)[i])) {
++bad_value:
++ printk(" Bad IP value.");
++ break;
++ }
+
+ if (i == 0)
+- raw_printk("(%02x) ", c);
++ printk("(%02x) ", c);
+ else
+- raw_printk("%02x ", c);
+- }
+- raw_printk("\n");
+- }
++ printk("%02x ", c);
++ }
++ printk("\n");
++ }
+ }
+
+-/* Called from entry.S when the watchdog has bitten
+- * We print out something resembling an oops dump, and if
+- * we have the nice doggy development flag set, we halt here
+- * instead of rebooting.
+- */
+-
+-extern void reset_watchdog(void);
+-extern void stop_watchdog(void);
+-
+-
+ void
+-watchdog_bite_hook(struct pt_regs *regs)
++arch_enable_nmi(void)
+ {
+-#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
+- local_irq_disable();
+- stop_watchdog();
+- show_registers(regs);
+- while(1) /* nothing */;
+-#else
+- show_registers(regs);
+-#endif
++ asm volatile ("setf m");
+ }
+
+-/* This is normally the 'Oops' routine */
+-void
+-die_if_kernel(const char * str, struct pt_regs * regs, long err)
++extern void (*nmi_handler)(struct pt_regs*);
++void handle_nmi(struct pt_regs* regs)
+ {
+- if(user_mode(regs))
+- return;
+-
+-#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
+- /* This printout might take too long and trigger the
+- * watchdog normally. If we're in the nice doggy
+- * development mode, stop the watchdog during printout.
+- */
+- stop_watchdog();
+-#endif
+-
+- raw_printk("%s: %04lx\n", str, err & 0xffff);
+-
+- show_registers(regs);
++ if (nmi_handler)
++ nmi_handler(regs);
+
+-#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
+- reset_watchdog();
+-#endif
+- do_exit(SIGSEGV);
++ /* Wait until nmi is no longer active. (We enable NMI immediately after
++ returning from this function, and we don't want it happening while
++ exiting from the NMI interrupt handler.) */
++ while(*R_IRQ_MASK0_RD & IO_STATE(R_IRQ_MASK0_RD, nmi_pin, active));
+ }
+
+-void arch_enable_nmi(void)
++#ifdef CONFIG_DEBUG_BUGVERBOSE
++void
++handle_BUG(struct pt_regs *regs)
+ {
+- asm volatile("setf m");
++ struct bug_frame f;
++ unsigned char c;
++ unsigned long irp = regs->irp;
++
++ if (__copy_from_user(&f, (const void __user *)(irp - 8), sizeof f))
++ return;
++ if (f.prefix != BUG_PREFIX || f.magic != BUG_MAGIC)
++ return;
++ if (__get_user(c, f.filename))
++ f.filename = "<bad filename>";
++
++ printk("kernel BUG at %s:%d!\n", f.filename, f.line);
+ }
++#endif
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/lib/checksum.S linux-2.6.19.2.dev/arch/cris/arch-v10/lib/checksum.S
+--- linux-2.6.19.2.old/arch/cris/arch-v10/lib/checksum.S 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/lib/checksum.S 2005-08-16 12:38:52.000000000 +0200
+@@ -1,4 +1,4 @@
+-/* $Id: checksum.S,v 1.1 2001/12/17 13:59:27 bjornw Exp $
++/* $Id: checksum.S,v 1.2 2005/08/16 10:38:52 edgar Exp $
+ * A fast checksum routine using movem
+ * Copyright (c) 1998-2001 Axis Communications AB
+ *
+@@ -61,8 +61,6 @@
+
+ ax
+ addq 0,$r12
+- ax ; do it again, since we might have generated a carry
+- addq 0,$r12
+
+ subq 10*4,$r11
+ bge _mloop
+@@ -88,10 +86,6 @@
+ lsrq 16,$r13 ; r13 = checksum >> 16
+ and.d $r9,$r12 ; checksum = checksum & 0xffff
+ add.d $r13,$r12 ; checksum += r13
+- move.d $r12,$r13 ; do the same again, maybe we got a carry last add
+- lsrq 16,$r13
+- and.d $r9,$r12
+- add.d $r13,$r12
+
+ _no_fold:
+ cmpq 2,$r11
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/lib/checksumcopy.S linux-2.6.19.2.dev/arch/cris/arch-v10/lib/checksumcopy.S
+--- linux-2.6.19.2.old/arch/cris/arch-v10/lib/checksumcopy.S 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/lib/checksumcopy.S 2005-08-16 12:38:52.000000000 +0200
+@@ -1,4 +1,4 @@
+-/* $Id: checksumcopy.S,v 1.1 2001/12/17 13:59:27 bjornw Exp $
++/* $Id: checksumcopy.S,v 1.2 2005/08/16 10:38:52 edgar Exp $
+ * A fast checksum+copy routine using movem
+ * Copyright (c) 1998, 2001 Axis Communications AB
+ *
+@@ -67,8 +67,6 @@
+
+ ax
+ addq 0,$r13
+- ax ; do it again, since we might have generated a carry
+- addq 0,$r13
+
+ subq 10*4,$r12
+ bge _mloop
+@@ -91,10 +89,6 @@
+ lsrq 16,$r9 ; r0 = checksum >> 16
+ and.d 0xffff,$r13 ; checksum = checksum & 0xffff
+ add.d $r9,$r13 ; checksum += r0
+- move.d $r13,$r9 ; do the same again, maybe we got a carry last add
+- lsrq 16,$r9
+- and.d 0xffff,$r13
+- add.d $r9,$r13
+
+ _no_fold:
+ cmpq 2,$r12
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/lib/dram_init.S linux-2.6.19.2.dev/arch/cris/arch-v10/lib/dram_init.S
+--- linux-2.6.19.2.old/arch/cris/arch-v10/lib/dram_init.S 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/lib/dram_init.S 2006-10-13 14:43:11.000000000 +0200
+@@ -1,4 +1,4 @@
+-/* $Id: dram_init.S,v 1.4 2003/09/22 09:21:59 starvik Exp $
++/* $Id: dram_init.S,v 1.5 2006/10/13 12:43:11 starvik Exp $
+ *
+ * DRAM/SDRAM initialization - alter with care
+ * This file is intended to be included from other assembler files
+@@ -11,6 +11,9 @@
+ * Authors: Mikael Starvik (starvik@axis.com)
+ *
+ * $Log: dram_init.S,v $
++ * Revision 1.5 2006/10/13 12:43:11 starvik
++ * Merge of 2.6.18
++ *
+ * Revision 1.4 2003/09/22 09:21:59 starvik
+ * Decompresser is linked to 0x407xxxxx and sdram commands are at 0x000xxxxx
+ * so we need to mask off 12 bits.
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/mm/fault.c linux-2.6.19.2.dev/arch/cris/arch-v10/mm/fault.c
+--- linux-2.6.19.2.old/arch/cris/arch-v10/mm/fault.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/mm/fault.c 2006-12-11 12:32:10.000000000 +0100
+@@ -73,7 +73,7 @@
+ /* leave it to the MM system fault handler */
+ if (miss)
+ do_page_fault(address, regs, 0, writeac);
+- else
++ else
+ do_page_fault(address, regs, 1, we);
+
+ /* Reload TLB with new entry to avoid an extra miss exception.
+@@ -84,12 +84,13 @@
+ local_irq_disable();
+ pmd = (pmd_t *)(pgd + pgd_index(address));
+ if (pmd_none(*pmd))
+- return;
++ goto exit;
+ pte = *pte_offset_kernel(pmd, address);
+ if (!pte_present(pte))
+- return;
++ goto exit;
+ *R_TLB_SELECT = select;
+ *R_TLB_HI = cause;
+ *R_TLB_LO = pte_val(pte);
++exit:
+ local_irq_restore(flags);
+ }
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v10/mm/tlb.c linux-2.6.19.2.dev/arch/cris/arch-v10/mm/tlb.c
+--- linux-2.6.19.2.old/arch/cris/arch-v10/mm/tlb.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v10/mm/tlb.c 2006-08-07 12:08:35.000000000 +0200
+@@ -179,23 +179,26 @@
+ switch_mm(struct mm_struct *prev, struct mm_struct *next,
+ struct task_struct *tsk)
+ {
+- /* make sure we have a context */
++ if (prev != next) {
++ /* make sure we have a context */
++ get_mmu_context(next);
++
++ /* remember the pgd for the fault handlers
++ * this is similar to the pgd register in some other CPU's.
++ * we need our own copy of it because current and active_mm
++ * might be invalid at points where we still need to derefer
++ * the pgd.
++ */
+
+- get_mmu_context(next);
++ per_cpu(current_pgd, smp_processor_id()) = next->pgd;
+
+- /* remember the pgd for the fault handlers
+- * this is similar to the pgd register in some other CPU's.
+- * we need our own copy of it because current and active_mm
+- * might be invalid at points where we still need to derefer
+- * the pgd.
+- */
+-
+- per_cpu(current_pgd, smp_processor_id()) = next->pgd;
+-
+- /* switch context in the MMU */
++ /* switch context in the MMU */
+
+- D(printk("switching mmu_context to %d (%p)\n", next->context, next));
++ D(printk("switching mmu_context to %d (%p)\n",
++ next->context, next));
+
+- *R_MMU_CONTEXT = IO_FIELD(R_MMU_CONTEXT, page_id, next->context.page_id);
++ *R_MMU_CONTEXT = IO_FIELD(R_MMU_CONTEXT,
++ page_id, next->context.page_id);
++ }
+ }
+
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/Kconfig linux-2.6.19.2.dev/arch/cris/arch-v32/Kconfig
+--- linux-2.6.19.2.old/arch/cris/arch-v32/Kconfig 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/Kconfig 2007-01-09 10:29:18.000000000 +0100
+@@ -1,23 +1,66 @@
++source drivers/cpufreq/Kconfig
++
+ config ETRAX_DRAM_VIRTUAL_BASE
+ hex
+ depends on ETRAX_ARCH_V32
+ default "c0000000"
+
+-config ETRAX_LED1G
+- string "First green LED bit"
++choice
++ prompt "Nbr of Ethernet LED groups"
+ depends on ETRAX_ARCH_V32
++ default ETRAX_NBR_LED_GRP_ONE
++ help
++ Select how many Ethernet LED groups that can be used. Usually one per Ethernet
++ interface is a good choice.
++
++config ETRAX_NBR_LED_GRP_ZERO
++ bool "Use zero LED groups"
++ help
++ Select this if you do not want any Ethernet LEDs.
++
++config ETRAX_NBR_LED_GRP_ONE
++ bool "Use one LED group"
++ help
++ Select this if you want one Ethernet LED group. This LED group can be used for
++ one or more Ethernet interfaces. However, it is recomended that each Ethernet
++ interface use a dedicated LED group.
++
++config ETRAX_NBR_LED_GRP_TWO
++ bool "Use two LED groups"
++ help
++ Select this if you want two Ethernet LED groups. This is the best choice if you
++ have more than one Ethernet interface and would like to have separate LEDs for
++ the interfaces.
++
++endchoice
++
++config ETRAX_LED_G_NET0
++ string "Ethernet LED group 0 green LED bit"
++ depends on ETRAX_ARCH_V32 && (ETRAX_NBR_LED_GRP_ONE || ETRAX_NBR_LED_GRP_TWO)
+ default "PA3"
+ help
+- Bit to use for the first green LED (network LED).
+- Most Axis products use bit A3 here.
++ Bit to use for the green LED in Ethernet LED group 0.
+
+-config ETRAX_LED1R
+- string "First red LED bit"
+- depends on ETRAX_ARCH_V32
++config ETRAX_LED_R_NET0
++ string "Ethernet LED group 0 red LED bit"
++ depends on ETRAX_ARCH_V32 && (ETRAX_NBR_LED_GRP_ONE || ETRAX_NBR_LED_GRP_TWO)
+ default "PA4"
+ help
+- Bit to use for the first red LED (network LED).
+- Most Axis products use bit A4 here.
++ Bit to use for the red LED in Ethernet LED group 0.
++
++config ETRAX_LED_G_NET1
++ string "Ethernet group 1 green LED bit"
++ depends on ETRAX_ARCH_V32 && ETRAX_NBR_LED_GRP_TWO
++ default ""
++ help
++ Bit to use for the green LED in Ethernet LED group 1.
++
++config ETRAX_LED_R_NET1
++ string "Ethernet group 1 red LED bit"
++ depends on ETRAX_ARCH_V32 && ETRAX_NBR_LED_GRP_TWO
++ default ""
++ help
++ Bit to use for the red LED in Ethernet LED group 1.
+
+ config ETRAX_LED2G
+ string "Second green LED bit"
+@@ -294,3 +337,22 @@
+ help
+ Configures the initial data for the general port E bits. Most
+ products should use 00000 here.
++
++config ETRAX_DEF_GIO_PV_OE
++ hex "GIO_PV_OE"
++ depends on ETRAX_VIRTUAL_GPIO
++ default "0000"
++ help
++ Configures the direction of virtual general port V bits. 1 is out,
++ 0 is in. This is often totally different depending on the product
++ used. These bits are used for all kinds of stuff. If you don't know
++ what to use, it is always safe to put all as inputs, although
++ floating inputs isn't good.
++
++config ETRAX_DEF_GIO_PV_OUT
++ hex "GIO_PV_OUT"
++ depends on ETRAX_VIRTUAL_GPIO
++ default "0000"
++ help
++ Configures the initial data for the virtual general port V bits.
++ Most products should use 0000 here.
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/Makefile linux-2.6.19.2.dev/arch/cris/arch-v32/boot/Makefile
+--- linux-2.6.19.2.old/arch/cris/arch-v32/boot/Makefile 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/Makefile 2006-11-29 17:05:41.000000000 +0100
+@@ -1,14 +1,21 @@
+ #
+ # arch/cris/arch-v32/boot/Makefile
+ #
+-target = $(target_boot_dir)
+-src = $(src_boot_dir)
+
+-zImage: compressed/vmlinuz
++OBJCOPY = objcopy-cris
++OBJCOPYFLAGS = -O binary -R .note -R .comment
+
+-compressed/vmlinuz: $(objtree)/vmlinux
+- @$(MAKE) -f $(src)/compressed/Makefile $(objtree)/vmlinuz
++subdir- := compressed rescue
++targets := Image
+
+-clean:
+- rm -f zImage tools/build compressed/vmlinux.out
+- @$(MAKE) -f $(src)/compressed/Makefile clean
++$(obj)/Image: vmlinux FORCE
++ $(call if_changed,objcopy)
++ @echo ' Kernel: $@ is ready'
++
++$(obj)/compressed/vmlinux: $(obj)/Image FORCE
++ $(Q)$(MAKE) $(build)=$(obj)/compressed $@
++ $(Q)$(MAKE) $(build)=$(obj)/rescue $(obj)/rescue/rescue.bin
++
++$(obj)/zImage: $(obj)/compressed/vmlinux
++ @cp $< $@
++ @echo ' Kernel: $@ is ready'
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/compressed/Makefile linux-2.6.19.2.dev/arch/cris/arch-v32/boot/compressed/Makefile
+--- linux-2.6.19.2.old/arch/cris/arch-v32/boot/compressed/Makefile 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/compressed/Makefile 2006-11-29 17:05:42.000000000 +0100
+@@ -1,41 +1,29 @@
+ #
+-# lx25/arch/cris/arch-v32/boot/compressed/Makefile
++# arch/cris/arch-v32/boot/compressed/Makefile
+ #
+-# create a compressed vmlinux image from the original vmlinux files and romfs
+-#
+-
+-target = $(target_compressed_dir)
+-src = $(src_compressed_dir)
+
+ CC = gcc-cris -mlinux -march=v32 -I $(TOPDIR)/include
+ CFLAGS = -O2
+ LD = gcc-cris -mlinux -march=v32 -nostdlib
++LDFLAGS = -T $(obj)/decompress.ld
++obj-y = head.o misc.o
++OBJECTS = $(obj)/head.o $(obj)/misc.o
+ OBJCOPY = objcopy-cris
+ OBJCOPYFLAGS = -O binary --remove-section=.bss
+-OBJECTS = $(target)/head.o $(target)/misc.o
+-
+-# files to compress
+-SYSTEM = $(objtree)/vmlinux.bin
+-
+-all: vmlinuz
+-
+-$(target)/decompress.bin: $(OBJECTS)
+- $(LD) -T $(src)/decompress.ld -o $(target)/decompress.o $(OBJECTS)
+- $(OBJCOPY) $(OBJCOPYFLAGS) $(target)/decompress.o $(target)/decompress.bin
+
+-$(objtree)/vmlinuz: $(target) piggy.img $(target)/decompress.bin
+- cat $(target)/decompress.bin piggy.img > $(objtree)/vmlinuz
+- rm -f piggy.img
+- cp $(objtree)/vmlinuz $(src)
++quiet_cmd_image = BUILD $@
++cmd_image = cat $(obj)/decompress.bin $(obj)/piggy.gz > $@
+
+-$(target)/head.o: $(src)/head.S
+- $(CC) -D__ASSEMBLY__ -c $< -o $@
++targets := vmlinux piggy.gz decompress.o decompress.bin
+
+-# gzip the kernel image
++$(obj)/decompress.o: $(OBJECTS) FORCE
++ $(call if_changed,ld)
+
+-piggy.img: $(SYSTEM)
+- cat $(SYSTEM) | gzip -f -9 > piggy.img
++$(obj)/decompress.bin: $(obj)/decompress.o FORCE
++ $(call if_changed,objcopy)
+
+-clean:
+- rm -f piggy.img $(objtree)/vmlinuz vmlinuz.o decompress.o decompress.bin $(OBJECTS)
++$(obj)/vmlinux: $(obj)/piggy.gz $(obj)/decompress.bin FORCE
++ $(call if_changed,image)
+
++$(obj)/piggy.gz: $(obj)/../Image FORCE
++ $(call if_changed,gzip)
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/compressed/README linux-2.6.19.2.dev/arch/cris/arch-v32/boot/compressed/README
+--- linux-2.6.19.2.old/arch/cris/arch-v32/boot/compressed/README 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/compressed/README 2003-08-21 11:37:03.000000000 +0200
+@@ -5,14 +5,14 @@
+ This can be slightly confusing because it's a process with many steps.
+
+ The kernel object built by the arch/etrax100/Makefile, vmlinux, is split
+-by that makefile into text and data binary files, vmlinux.text and
++by that makefile into text and data binary files, vmlinux.text and
+ vmlinux.data.
+
+ Those files together with a ROM filesystem can be catted together and
+ burned into a flash or executed directly at the DRAM origin.
+
+ They can also be catted together and compressed with gzip, which is what
+-happens in this makefile. Together they make up piggy.img.
++happens in this makefile. Together they make up piggy.img.
+
+ The decompressor is built into the file decompress.o. It is turned into
+ the binary file decompress.bin, which is catted together with piggy.img
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/compressed/decompress.ld linux-2.6.19.2.dev/arch/cris/arch-v32/boot/compressed/decompress.ld
+--- linux-2.6.19.2.old/arch/cris/arch-v32/boot/compressed/decompress.ld 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/compressed/decompress.ld 2003-08-21 11:57:56.000000000 +0200
+@@ -1,7 +1,7 @@
+ /*#OUTPUT_FORMAT(elf32-us-cris) */
+ OUTPUT_ARCH (crisv32)
+
+-MEMORY
++MEMORY
+ {
+ dram : ORIGIN = 0x40700000,
+ LENGTH = 0x00100000
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/compressed/head.S linux-2.6.19.2.dev/arch/cris/arch-v32/boot/compressed/head.S
+--- linux-2.6.19.2.old/arch/cris/arch-v32/boot/compressed/head.S 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/compressed/head.S 2007-01-09 10:29:20.000000000 +0100
+@@ -2,19 +2,19 @@
+ * Code that sets up the DRAM registers, calls the
+ * decompressor to unpack the piggybacked kernel, and jumps.
+ *
+- * Copyright (C) 1999 - 2003, Axis Communications AB
++ * Copyright (C) 1999 - 2006, Axis Communications AB
+ */
+
+ #define ASSEMBLER_MACROS_ONLY
+ #include <asm/arch/hwregs/asm/reg_map_asm.h>
+ #include <asm/arch/hwregs/asm/gio_defs_asm.h>
+ #include <asm/arch/hwregs/asm/config_defs_asm.h>
+-
++
+ #define RAM_INIT_MAGIC 0x56902387
+ #define COMMAND_LINE_MAGIC 0x87109563
+
+ ;; Exported symbols
+-
++
+ .globl input_data
+
+ .text
+@@ -29,53 +29,16 @@
+ REG_STATE(config, rw_clk_ctrl, fix_io, yes), $r0
+ move.d $r0, [$r1]
+
+- ;; If booting from NAND flash we first have to copy some
+- ;; data from NAND flash to internal RAM to get the code
+- ;; that initializes the SDRAM. Lets copy 20 KB. This
+- ;; code executes at 0x38010000 if booting from NAND and
+- ;; we are guaranted that at least 0x200 bytes are good so
+- ;; lets start from there. The first 8192 bytes in the nand
+- ;; flash is spliced with zeroes and is thus 16384 bytes.
+- move.d 0x38010200, $r10
+- move.d 0x14200, $r11 ; Start offset in NAND flash 0x10200 + 16384
+- move.d 0x5000, $r12 ; Length of copy
+-
+- ;; Before this code the tools add a partitiontable so the PC
+- ;; has an offset from the linked address.
+-offset1:
+- lapcq ., $r13 ; get PC
+- add.d first_copy_complete-offset1, $r13
+-
+-#include "../../lib/nand_init.S"
+-
+-first_copy_complete:
+- ;; Initialze the DRAM registers.
++ ;; Initialize the DRAM registers.
+ cmp.d RAM_INIT_MAGIC, $r8 ; Already initialized?
+ beq dram_init_finished
+ nop
+
+ #include "../../lib/dram_init.S"
+-
++
+ dram_init_finished:
+- lapcq ., $r13 ; get PC
+- add.d second_copy_complete-dram_init_finished, $r13
+-
+- move.d REG_ADDR(config, regi_config, r_bootsel), $r0
+- move.d [$r0], $r0
+- and.d REG_MASK(config, r_bootsel, boot_mode), $r0
+- cmp.d REG_STATE(config, r_bootsel, boot_mode, nand), $r0
+- bne second_copy_complete ; No NAND boot
+- nop
+-
+- ;; Copy 2MB from NAND flash to SDRAM (at 2-4MB into the SDRAM)
+- move.d 0x40204000, $r10
+- move.d 0x8000, $r11
+- move.d 0x200000, $r12
+- ba copy_nand_to_ram
+- nop
+-second_copy_complete:
+-
+- ;; Initiate the PA port.
++
++ ;; Initiate the GIO ports.
+ move.d CONFIG_ETRAX_DEF_GIO_PA_OUT, $r0
+ move.d REG_ADDR(gio, regi_gio, rw_pa_dout), $r1
+ move.d $r0, [$r1]
+@@ -84,57 +47,74 @@
+ move.d REG_ADDR(gio, regi_gio, rw_pa_oe), $r1
+ move.d $r0, [$r1]
+
++ move.d CONFIG_ETRAX_DEF_GIO_PB_OUT, $r0
++ move.d REG_ADDR(gio, regi_gio, rw_pb_dout), $r1
++ move.d $r0, [$r1]
++
++ move.d CONFIG_ETRAX_DEF_GIO_PB_OE, $r0
++ move.d REG_ADDR(gio, regi_gio, rw_pb_oe), $r1
++ move.d $r0, [$r1]
++
++ move.d CONFIG_ETRAX_DEF_GIO_PC_OUT, $r0
++ move.d REG_ADDR(gio, regi_gio, rw_pc_dout), $r1
++ move.d $r0, [$r1]
++
++ move.d CONFIG_ETRAX_DEF_GIO_PC_OE, $r0
++ move.d REG_ADDR(gio, regi_gio, rw_pc_oe), $r1
++ move.d $r0, [$r1]
++
++ move.d CONFIG_ETRAX_DEF_GIO_PD_OUT, $r0
++ move.d REG_ADDR(gio, regi_gio, rw_pd_dout), $r1
++ move.d $r0, [$r1]
++
++ move.d CONFIG_ETRAX_DEF_GIO_PD_OE, $r0
++ move.d REG_ADDR(gio, regi_gio, rw_pd_oe), $r1
++ move.d $r0, [$r1]
++
++ move.d CONFIG_ETRAX_DEF_GIO_PE_OUT, $r0
++ move.d REG_ADDR(gio, regi_gio, rw_pe_dout), $r1
++ move.d $r0, [$r1]
++
++ move.d CONFIG_ETRAX_DEF_GIO_PE_OE, $r0
++ move.d REG_ADDR(gio, regi_gio, rw_pe_oe), $r1
++ move.d $r0, [$r1]
++
+ ;; Setup the stack to a suitably high address.
+- ;; We assume 8 MB is the minimum DRAM and put
++ ;; We assume 8 MB is the minimum DRAM and put
+ ;; the SP at the top for now.
+
+ move.d 0x40800000, $sp
+
+- ;; Figure out where the compressed piggyback image is
+- ;; in the flash (since we wont try to copy it to DRAM
+- ;; before unpacking). It is at _edata, but in flash.
++ ;; Figure out where the compressed piggyback image is.
++ ;; It is either in [NOR] flash (we don't want to copy it
++ ;; to DRAM before unpacking), or copied to DRAM
++ ;; by the [NAND] flash boot loader.
++ ;; The piggyback image is at _edata, but relative to where the
++ ;; image is actually located in memory, not where it is linked
++ ;; (the decompressor is linked at 0x40700000+ and runs there).
+ ;; Use (_edata - herami) as offset to the current PC.
+
+- move.d REG_ADDR(config, regi_config, r_bootsel), $r0
+- move.d [$r0], $r0
+- and.d REG_MASK(config, r_bootsel, boot_mode), $r0
+- cmp.d REG_STATE(config, r_bootsel, boot_mode, nand), $r0
+- beq hereami2
+- nop
+-hereami:
++hereami:
+ lapcq ., $r5 ; get PC
+ and.d 0x7fffffff, $r5 ; strip any non-cache bit
+- move.d $r5, $r0 ; save for later - flash address of 'herami'
++ move.d $r5, $r0 ; source address of 'herami'
+ add.d _edata, $r5
+ sub.d hereami, $r5 ; r5 = flash address of '_edata'
+ move.d hereami, $r1 ; destination
+- ba 2f
+- nop
+-hereami2:
+- lapcq ., $r5 ; get PC
+- and.d 0x00ffffff, $r5 ; strip any non-cache bit
+- move.d $r5, $r6
+- or.d 0x40200000, $r6
+- move.d $r6, $r0 ; save for later - flash address of 'herami'
+- add.d _edata, $r5
+- sub.d hereami2, $r5 ; r5 = flash address of '_edata'
+- add.d 0x40200000, $r5
+- move.d hereami2, $r1 ; destination
+-2:
+- ;; Copy text+data to DRAM
+
++ ;; Copy text+data to DRAM
++
+ move.d _edata, $r2 ; end destination
+-1: move.w [$r0+], $r3
+- move.w $r3, [$r1+]
+- cmp.d $r2, $r1
++1: move.w [$r0+], $r3 ; from herami+ source
++ move.w $r3, [$r1+] ; to hereami+ destination (linked address)
++ cmp.d $r2, $r1 ; finish when destination == _edata
+ bcs 1b
+ nop
+-
+- move.d input_data, $r0 ; for the decompressor
++ move.d input_data, $r0 ; for the decompressor
+ move.d $r5, [$r0] ; for the decompressor
+
+ ;; Clear the decompressors BSS (between _edata and _end)
+-
++
+ moveq 0, $r0
+ move.d _edata, $r1
+ move.d _end, $r2
+@@ -144,40 +124,47 @@
+ nop
+
+ ;; Save command line magic and address.
+- move.d _cmd_line_magic, $r12
+- move.d $r10, [$r12]
+- move.d _cmd_line_addr, $r12
+- move.d $r11, [$r12]
+-
++ move.d _cmd_line_magic, $r0
++ move.d $r10, [$r0]
++ move.d _cmd_line_addr, $r0
++ move.d $r11, [$r0]
++
++ ;; Save boot source indicator
++ move.d _boot_source, $r0
++ move.d $r12, [$r0]
++
+ ;; Do the decompression and save compressed size in _inptr
+
+ jsr decompress_kernel
+ nop
+
++ ;; Restore boot source indicator
++ move.d _boot_source, $r12
++ move.d [$r12], $r12
++
+ ;; Restore command line magic and address.
+ move.d _cmd_line_magic, $r10
+ move.d [$r10], $r10
+ move.d _cmd_line_addr, $r11
+ move.d [$r11], $r11
+-
++
+ ;; Put start address of root partition in r9 so the kernel can use it
+ ;; when mounting from flash
+ move.d input_data, $r0
+ move.d [$r0], $r9 ; flash address of compressed kernel
+ move.d inptr, $r0
+ add.d [$r0], $r9 ; size of compressed kernel
+- cmp.d 0x40200000, $r9
+- blo enter_kernel
+- nop
+- sub.d 0x40200000, $r9
+- add.d 0x4000, $r9
+-
+-enter_kernel:
++ cmp.d 0x40000000, $r9 ; image in DRAM ?
++ blo enter_kernel ; no, must be [NOR] flash, jump
++ nop ; delay slot
++ and.d 0x001fffff, $r9 ; assume compressed kernel was < 2M
++
++enter_kernel:
+ ;; Enter the decompressed kernel
+ move.d RAM_INIT_MAGIC, $r8 ; Tell kernel that DRAM is initialized
+ jump 0x40004000 ; kernel is linked to this address
+ nop
+-
++
+ .data
+
+ input_data:
+@@ -185,8 +172,8 @@
+ _cmd_line_magic:
+ .dword 0
+ _cmd_line_addr:
++ .dword 0
++_boot_source:
+ .dword 0
+-is_nand_boot:
+- .dword 0
+-
++
+ #include "../../lib/hw_settings.S"
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/compressed/misc.c linux-2.6.19.2.dev/arch/cris/arch-v32/boot/compressed/misc.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/boot/compressed/misc.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/compressed/misc.c 2006-11-03 11:35:51.000000000 +0100
+@@ -1,15 +1,15 @@
+ /*
+ * misc.c
+ *
+- * $Id: misc.c,v 1.8 2005/04/24 18:34:29 starvik Exp $
+- *
+- * This is a collection of several routines from gzip-1.0.3
++ * $Id: misc.c,v 1.12 2006/11/03 10:35:51 pkj Exp $
++ *
++ * This is a collection of several routines from gzip-1.0.3
+ * adapted for Linux.
+ *
+ * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
+ * puts by Nick Holloway 1993, better puts by Martin Mares 1995
+ * adoptation for Linux/CRIS Axis Communications AB, 1999
+- *
++ *
+ */
+
+ /* where the piggybacked kernel image expects itself to live.
+@@ -20,11 +20,11 @@
+
+ #define KERNEL_LOAD_ADR 0x40004000
+
+-
+ #include <linux/types.h>
+ #include <asm/arch/hwregs/reg_rdwr.h>
+ #include <asm/arch/hwregs/reg_map.h>
+ #include <asm/arch/hwregs/ser_defs.h>
++#include <asm/arch/hwregs/pinmux_defs.h>
+
+ /*
+ * gzip declarations
+@@ -66,8 +66,8 @@
+ #define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */
+ #define RESERVED 0xC0 /* bit 6,7: reserved */
+
+-#define get_byte() inbuf[inptr++]
+-
++#define get_byte() inbuf[inptr++]
++
+ /* Diagnostic functions */
+ #ifdef DEBUG
+ # define Assert(cond,msg) {if(!(cond)) error(msg);}
+@@ -96,20 +96,20 @@
+ static long bytes_out = 0;
+ static uch *output_data;
+ static unsigned long output_ptr = 0;
+-
++
+ static void *malloc(int size);
+ static void free(void *where);
+ static void error(char *m);
+ static void gzip_mark(void **);
+ static void gzip_release(void **);
+-
++
+ static void puts(const char *);
+
+ /* the "heap" is put directly after the BSS ends, at end */
+-
++
+ extern int _end;
+ static long free_mem_ptr = (long)&_end;
+-
++
+ #include "../../../../../lib/inflate.c"
+
+ static void *malloc(int size)
+@@ -152,7 +152,7 @@
+ rs = REG_RD(ser, regi_ser, rs_stat_din);
+ }
+ while (!rs.tr_rdy);/* Wait for tranceiver. */
+-
++
+ REG_WR(ser, regi_ser, rw_dout, dout);
+ }
+
+@@ -209,9 +209,9 @@
+ ulg c = crc; /* temporary variable */
+ unsigned n;
+ uch *in, *out, ch;
+-
++
+ in = window;
+- out = &output_data[output_ptr];
++ out = &output_data[output_ptr];
+ for (n = 0; n < outcnt; n++) {
+ ch = *out++ = *in++;
+ c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
+@@ -225,9 +225,9 @@
+ static void
+ error(char *x)
+ {
+- puts("\n\n");
++ puts("\r\n\n");
+ puts(x);
+- puts("\n\n -- System halted\n");
++ puts("\r\n\n -- System halted\n");
+
+ while(1); /* Halt */
+ }
+@@ -246,13 +246,13 @@
+ reg_ser_rw_rec_ctrl rec_ctrl;
+ reg_ser_rw_tr_baud_div tr_baud;
+ reg_ser_rw_rec_baud_div rec_baud;
+-
++
+ /* Turn off XOFF. */
+ xoff = REG_RD(ser, regi_ser, rw_xoff);
+-
++
+ xoff.chr = 0;
+ xoff.automatic = regk_ser_no;
+-
++
+ REG_WR(ser, regi_ser, rw_xoff, xoff);
+
+ /* Set baudrate and stopbits. */
+@@ -260,19 +260,21 @@
+ rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
+ tr_baud = REG_RD(ser, regi_ser, rw_tr_baud_div);
+ rec_baud = REG_RD(ser, regi_ser, rw_rec_baud_div);
+-
++
+ tr_ctrl.stop_bits = 1; /* 2 stop bits. */
+-
+- /*
+- * The baudrate setup is a bit fishy, but in the end the tranceiver is
+- * set to 4800 and the receiver to 115200. The magic value is
+- * 29.493 MHz.
++ tr_ctrl.en = 1; /* enable transmitter */
++ rec_ctrl.en = 1; /* enabler receiver */
++
++ /*
++ * The baudrate setup used to be a bit fishy, but now transmitter and
++ * receiver are both set to the intended baud rate, 115200.
++ * The magic value is 29.493 MHz.
+ */
+ tr_ctrl.base_freq = regk_ser_f29_493;
+ rec_ctrl.base_freq = regk_ser_f29_493;
+- tr_baud.div = (29493000 / 8) / 4800;
++ tr_baud.div = (29493000 / 8) / 115200;
+ rec_baud.div = (29493000 / 8) / 115200;
+-
++
+ REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
+ REG_WR(ser, regi_ser, rw_tr_baud_div, tr_baud);
+ REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
+@@ -283,22 +285,28 @@
+ decompress_kernel()
+ {
+ char revision;
+-
++ reg_pinmux_rw_hwprot hwprot;
++
+ /* input_data is set in head.S */
+ inbuf = input_data;
+-
++
++ hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
+ #ifdef CONFIG_ETRAX_DEBUG_PORT0
+ serial_setup(regi_ser0);
+ #endif
+ #ifdef CONFIG_ETRAX_DEBUG_PORT1
++ hwprot.ser1 = regk_pinmux_yes;
+ serial_setup(regi_ser1);
+ #endif
+ #ifdef CONFIG_ETRAX_DEBUG_PORT2
++ hwprot.ser2 = regk_pinmux_yes;
+ serial_setup(regi_ser2);
+ #endif
+ #ifdef CONFIG_ETRAX_DEBUG_PORT3
++ hwprot.ser3 = regk_pinmux_yes;
+ serial_setup(regi_ser3);
+ #endif
++ REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
+
+ setup_normal_output_buffer();
+
+@@ -307,11 +315,11 @@
+ __asm__ volatile ("move $vr,%0" : "=rm" (revision));
+ if (revision < 32)
+ {
+- puts("You need an ETRAX FS to run Linux 2.6/crisv32.\n");
++ puts("You need an ETRAX FS to run Linux 2.6/crisv32.\r\n");
+ while(1);
+ }
+
+- puts("Uncompressing Linux...\n");
++ puts("Uncompressing Linux...\r\n");
+ gunzip();
+- puts("Done. Now booting the kernel.\n");
++ puts("Done. Now booting the kernel.\r\n");
+ }
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/Makefile linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/Makefile
+--- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/Makefile 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/Makefile 2007-01-17 14:24:50.000000000 +0100
+@@ -1,36 +1,29 @@
+ #
+-# Makefile for rescue code
++# Makefile for rescue (bootstrap) code
+ #
+-target = $(target_rescue_dir)
+-src = $(src_rescue_dir)
+
+ CC = gcc-cris -mlinux -march=v32 $(LINUXINCLUDE)
+ CFLAGS = -O2
+-LD = gcc-cris -mlinux -march=v32 -nostdlib
++LD = gcc-cris -mlinux -march=v32 -nostdlib
++LDFLAGS = -T $(obj)/rescue.ld
++LDPOSTFLAGS = -lgcc
+ OBJCOPY = objcopy-cris
+ OBJCOPYFLAGS = -O binary --remove-section=.bss
+-
+-all: $(target)/rescue.bin
+-
+-rescue: rescue.bin
+- # do nothing
+-
+-$(target)/rescue.bin: $(target) $(target)/head.o
+- $(LD) -T $(src)/rescue.ld -o $(target)/rescue.o $(target)/head.o
+- $(OBJCOPY) $(OBJCOPYFLAGS) $(target)/rescue.o $(target)/rescue.bin
+- cp -p $(target)/rescue.bin $(objtree)
+-
+-$(target):
+- mkdir -p $(target)
+-
+-$(target)/head.o: $(src)/head.S
+- $(CC) -D__ASSEMBLY__ -c $< -o $*.o
+-
+-clean:
+- rm -f $(target)/*.o $(target)/*.bin
+-
+-fastdep:
+-
+-modules:
+-
+-modules-install:
++obj-y = head.o bootload.o crisv32_nand.o nand_base.o nand_ids.o nand_ecc.o \
++ lib.o
++OBJECTS = $(obj)/head.o $(obj)/bootload.o \
++ $(obj)/crisv32_nand.o $(obj)/nand_base.o \
++ $(obj)/nand_ids.o $(obj)/nand_ecc.o \
++ $(obj)/lib.o $(obj)/../../lib/lib.a
++
++targets := rescue.o rescue.bin
++
++quiet_cmd_ldlibgcc = LD $@
++cmd_ldlibgcc = $(LD) $(LDFLAGS) $(filter-out FORCE,$^) $(LDPOSTFLAGS) -o $@
++
++$(obj)/rescue.o: $(OBJECTS) FORCE
++ $(call if_changed,ldlibgcc)
++
++$(obj)/rescue.bin: $(obj)/rescue.o FORCE
++ $(call if_changed,objcopy)
++ cp -p $(obj)/rescue.bin $(objtree)
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/bootload.c linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/bootload.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/bootload.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/bootload.c 2006-11-28 11:05:39.000000000 +0100
+@@ -0,0 +1,277 @@
++/*
++ * bootload.c
++ * Simple boot loader for NAND chips on Etrax FS
++ *
++ * $Id: bootload.c,v 1.8 2006/11/28 10:05:39 ricardw Exp $
++ *
++ */
++
++#include <linux/types.h>
++#include <linux/delay.h>
++
++#include "mtd.h"
++#include "nand.h"
++
++#include <asm/arch/hwregs/reg_rdwr.h>
++#include <asm/arch/hwregs/reg_map.h>
++#include <asm/arch/hwregs/pinmux_defs.h>
++
++#include "lib.h"
++
++#define BOOT_ADDR (CONFIG_ETRAX_PTABLE_SECTOR + 0x40200000)
++
++/* bits for nand_rw() `cmd'; or together as needed */
++
++#define NANDRW_READ 0x01
++#define NANDRW_WRITE 0x00
++#define NANDRW_JFFS2 0x02
++#define NANDRW_JFFS2_SKIP 0x04
++
++#define ROUND_DOWN(value, boundary) ((value) & (~((boundary)-1)))
++
++/* set $r8 to RAM_INIT_MAGIC, $r12 to NAND_BOOT_MAGIC then jump */
++#define BOOT(addr) __asm__ volatile (" \
++ move.d 0x56902387, $r8\n\
++ move.d 0x9A9DB001, $r12\n\
++ jump %0\n\
++ nop\n\
++ " : : "r" (addr))
++
++#define D(x)
++
++extern struct mtd_info *crisv32_nand_flash_probe(void);
++
++extern int _end, _bss, _edata;
++
++/*
++ * NAND read/write from U-Boot 1.4.4
++ * Modified for newer mtd and use of mtd interface instead of nand directly.
++ *
++ * cmd: 0: NANDRW_WRITE write, fail on bad block
++ * 1: NANDRW_READ read, fail on bad block
++ * 2: NANDRW_WRITE | NANDRW_JFFS2 write, skip bad blocks
++ * 3: NANDRW_READ | NANDRW_JFFS2 read, data all 0xff for bad blocks
++ * 7: NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP read, skip bad blocks
++ */
++static int
++nand_rw (struct mtd_info* mtd, int cmd,
++ size_t start, size_t len,
++ size_t *retlen, u_char * buf)
++{
++ int ret = 0, n, total = 0;
++
++ /* eblk (once set) is the start of the erase block containing the
++ * data being processed.
++ */
++ size_t eblk = ~0; /* force mismatch on first pass */
++ size_t erasesize = mtd->erasesize;
++
++ while (len) {
++ if ((start & (-erasesize)) != eblk) {
++ /* have crossed into new erase block, deal with
++ * it if it is marked bad.
++ */
++ eblk = start & (-erasesize); /* start of block */
++ D(
++ puts("New block ");
++ putx(eblk);
++ putnl();
++ )
++ if (mtd->block_isbad(mtd, eblk)) {
++ if (cmd == (NANDRW_READ | NANDRW_JFFS2)) {
++ while (len > 0 &&
++ start - eblk < erasesize) {
++ *(buf++) = 0xff;
++ ++start;
++ ++total;
++ --len;
++ }
++ continue;
++ } else if (cmd == (NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP)) {
++ start += erasesize;
++ continue;
++ } else if (cmd == (NANDRW_WRITE | NANDRW_JFFS2)) {
++ /* skip bad block */
++ start += erasesize;
++ continue;
++ } else {
++ ret = 1;
++ break;
++ }
++ }
++ }
++ /* The ECC will not be calculated correctly if
++ less than 512 is written or read */
++ /* Is request at least 512 bytes AND it starts on a proper boundry */
++ if((start != ROUND_DOWN(start, 0x200)) || (len < 0x200))
++ puts("Warning block writes should be at least 512 bytes and start on a 512 byte boundry\r\n");
++
++#if 0
++ buf = (void *) 0x38008000; /* to fixed address, for testing */
++#endif
++
++ if (cmd & NANDRW_READ) {
++ ret = mtd->read_ecc(mtd, start,
++ min(len, eblk + erasesize - start),
++ (size_t *)&n, (u_char*)buf,
++ NULL, NULL);
++ } else {
++ ret = mtd->write_ecc(mtd, start,
++ min(len, eblk + erasesize - start),
++ (size_t *)&n, (u_char*)buf,
++ NULL, NULL);
++ }
++
++ if (ret) {
++ break;
++ }
++
++ start += n;
++ buf += n;
++ total += n;
++ len -= n;
++ }
++ if (retlen)
++ *retlen = total;
++
++ return ret;
++}
++
++
++void
++bootload()
++{
++ char revision;
++ struct mtd_info *mtd;
++
++ serial_init();
++
++ __asm__ volatile ("move $vr,%0" : "=rm" (revision));
++ if (revision < 32)
++ {
++ puts("You need an ETRAX FS to run Linux 2.6/crisv32.\r\n");
++ while(1);
++ }
++
++ puts("\r\n\nETRAX FS NAND boot loader\r\n");
++ puts("=========================\r\n");
++ puts("Rev 1, " __DATE__ " " __TIME__ "\r\n");
++
++ puts("CPU revision: ");
++ putx(revision);
++ putnl();
++
++ puts("Bootloader main at ") ;
++ putx((int) bootload);
++ putnl();
++
++ puts("Data end: ");
++ putx((long) &_edata);
++ putnl();
++
++ puts("Bss: ");
++ putx((long) &_bss);
++ putnl();
++
++ puts("Heap: ");
++ putx((long) &_end);
++ putnl();
++
++#if 0 /* loop calibration */
++ volatile int i;
++ puts ("10000 loops...");
++ for (i = 0; i < 10000; i++)
++ udelay(1000);
++ puts("done\r\n");
++#endif
++
++ puts("Identifying nand chip...\r\n");
++ mtd = crisv32_nand_flash_probe();
++ puts("Done.\r\n");
++
++ if (mtd) {
++ puts("Chip identified. ");
++#if 0 /* print chip parameters */
++ if (mtd->name)
++ puts(mtd->name);
++
++ puts("\r\ntype: ");
++ putx(mtd->type);
++ puts("\r\nflags: ");
++ putx(mtd->flags);
++ puts("\r\nsize: ");
++ putx(mtd->size);
++ puts("\r\nerasesize: ");
++ putx(mtd->erasesize);
++ puts("\r\noobblock: ");
++ putx(mtd->oobblock);
++ puts("\r\noobsize: ");
++ putx(mtd->oobsize);
++ puts("\r\necctype: ");
++ putx(mtd->ecctype);
++ puts("\r\neccsize: ");
++ putx(mtd->eccsize);
++#endif
++ putnl();
++
++ puts("Bad blocks:\r\n");
++
++ int i;
++ for (i = 0; i < mtd->size; i += mtd->erasesize) {
++ if (mtd->block_isbad(mtd, i)) {
++ putx(i);
++ putnl();
++ }
++ }
++
++#if 0 /* print oob parameters */
++ puts("Oob info:\r\n");
++ puts("useecc: ");
++ putx(mtd->oobinfo.useecc);
++ puts("\r\neccbytes: ");
++ putx(mtd->oobinfo.eccbytes);
++ puts("\r\neccpos: ");
++ for (i = 0; i < mtd->oobinfo.eccbytes; i++) {
++ putx(mtd->oobinfo.eccpos[i]);
++ putc(' ');
++ }
++ putnl();
++#endif
++
++ puts("Bootload in progress...");
++ int res, copied;
++ res = nand_rw(mtd,
++ NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP,
++ CONFIG_ETRAX_PTABLE_SECTOR,
++ 0x200000, /* 2 megs */
++ &copied,
++ (void *) BOOT_ADDR);
++
++ puts("complete, status ");
++ putx(res);
++ puts(", loaded ");
++ putx(copied);
++ puts(" bytes\r\n");
++#if 1
++ puts("Data in DRAM:\r\n");
++ putx(* (int *) (BOOT_ADDR + 0));
++ putc(' ');
++ putx(* (int *) (BOOT_ADDR + 4));
++ putc(' ');
++ putx(* (int *) (BOOT_ADDR + 8));
++ putnl();
++#endif
++
++ if (res)
++ error("Corrupt data in NAND flash.");
++ else
++ {
++ puts("Booting...\r\n");
++ BOOT(BOOT_ADDR);
++ }
++ } else
++ error("No NAND flash chip found to boot from.");
++
++ while (1)
++ ; /* hang around until hell freezes over */
++}
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/crisv32_nand.c linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/crisv32_nand.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/crisv32_nand.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/crisv32_nand.c 2006-11-21 15:40:02.000000000 +0100
+@@ -0,0 +1,157 @@
++/*
++ * Taken from arch/cris/arch-v32/drivers/nandflash.c
++ * and modified to use for boot loader.
++ *
++ * Copyright (c) 2004
++ *
++ * Derived from drivers/mtd/nand/spia.c
++ * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
++ *
++ * $Id: crisv32_nand.c,v 1.2 2006/11/21 14:40:02 ricardw Exp $
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++#include "mtd.h"
++#include "nand.h"
++
++#if 0
++#include <linux/mtd/partitions.h>
++#endif
++
++#if 0
++#include <asm/arch/memmap.h>
++#endif
++
++#include <asm/arch/hwregs/reg_map.h>
++#include <asm/arch/hwregs/reg_rdwr.h>
++#include <asm/arch/hwregs/gio_defs.h>
++#include <asm/arch/hwregs/bif_core_defs.h>
++
++#include "lib.h"
++
++/* Hardware */
++
++#define CE_BIT 4
++#define CLE_BIT 5
++#define ALE_BIT 6
++#define BY_BIT 7
++
++#define NAND_RD_ADDR 0x90000000 /* read address */
++#define NAND_WR_ADDR 0x94000000 /* write address */
++
++static struct mtd_info *crisv32_mtd = NULL;
++
++/*
++ * hardware specific access to control-lines
++ */
++static void crisv32_hwcontrol(struct mtd_info *mtd, int cmd)
++{
++ unsigned long flags;
++ reg_gio_rw_pa_dout dout = REG_RD(gio, regi_gio, rw_pa_dout);
++
++ switch(cmd){
++ case NAND_CTL_SETCLE:
++ dout.data |= (1<<CLE_BIT);
++ break;
++ case NAND_CTL_CLRCLE:
++ dout.data &= ~(1<<CLE_BIT);
++ break;
++ case NAND_CTL_SETALE:
++ dout.data |= (1<<ALE_BIT);
++ break;
++ case NAND_CTL_CLRALE:
++ dout.data &= ~(1<<ALE_BIT);
++ break;
++ case NAND_CTL_SETNCE:
++ dout.data &= ~(1<<CE_BIT);
++ break;
++ case NAND_CTL_CLRNCE:
++ dout.data |= (1<<CE_BIT);
++ break;
++ }
++ REG_WR(gio, regi_gio, rw_pa_dout, dout);
++#if 0
++ /* read from gpio reg to flush pipeline.
++ * doesn't seem to be necessary.
++ */
++ (void) REG_RD(gio, regi_gio, rw_pa_dout); /* gpio sync */
++#endif
++}
++
++/*
++ * read device ready pin
++ */
++int crisv32_device_ready(struct mtd_info *mtd)
++{
++ reg_gio_r_pa_din din = REG_RD(gio, regi_gio, r_pa_din);
++ return ((din.data & (1 << BY_BIT)) >> BY_BIT);
++}
++
++/*
++ * Main initialization routine
++ */
++struct mtd_info* crisv32_nand_flash_probe (void)
++{
++ reg_bif_core_rw_grp3_cfg bif_cfg = REG_RD(bif_core, regi_bif_core, rw_grp3_cfg);
++ reg_gio_rw_pa_oe pa_oe = REG_RD(gio, regi_gio, rw_pa_oe);
++ struct nand_chip *this;
++ int err = 0;
++
++ /* Allocate memory for MTD device structure and private data */
++ crisv32_mtd = malloc (sizeof(struct mtd_info) + sizeof (struct nand_chip));
++ if (!crisv32_mtd) {
++ puts ("Unable to allocate CRISv32 NAND MTD device structure.\r\n");
++ err = -ENOMEM;
++ return NULL;
++ }
++
++ /* Get pointer to private data */
++ this = (struct nand_chip *) (&crisv32_mtd[1]);
++
++ pa_oe.oe |= 1 << CE_BIT;
++ pa_oe.oe |= 1 << ALE_BIT;
++ pa_oe.oe |= 1 << CLE_BIT;
++ pa_oe.oe &= ~ (1 << BY_BIT);
++ REG_WR(gio, regi_gio, rw_pa_oe, pa_oe);
++
++ bif_cfg.gated_csp0 = regk_bif_core_rd;
++ bif_cfg.gated_csp1 = regk_bif_core_wr;
++ REG_WR(bif_core, regi_bif_core, rw_grp3_cfg, bif_cfg);
++
++ /* Initialize structures */
++ memset((char *) crisv32_mtd, 0, sizeof(struct mtd_info));
++ memset((char *) this, 0, sizeof(struct nand_chip));
++
++ /* Link the private data with the MTD structure */
++ crisv32_mtd->priv = this;
++
++ /* Set address of NAND IO lines */
++ this->IO_ADDR_R = (void *) NAND_RD_ADDR;
++ this->IO_ADDR_W = (void *) NAND_WR_ADDR;
++ this->hwcontrol = crisv32_hwcontrol;
++ this->dev_ready = crisv32_device_ready;
++ /* 20 us command delay time */
++ this->chip_delay = 20;
++ this->eccmode = NAND_ECC_SOFT;
++
++#if 0 /* don't use BBT in boot loader */
++ /* Enable the following for a flash based bad block table */
++ this->options = NAND_USE_FLASH_BBT;
++#endif
++ /* don't scan for BBT */
++ this->options = NAND_SKIP_BBTSCAN;
++
++ /* Scan to find existance of the device */
++ if (nand_scan (crisv32_mtd, 1)) {
++ err = -ENXIO;
++ puts ("nand_scan failed\r\n");
++ free (crisv32_mtd);
++ return NULL;
++ }
++
++ return crisv32_mtd;
++}
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/head.S linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/head.S
+--- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/head.S 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/head.S 2007-01-31 16:52:19.000000000 +0100
+@@ -1,14 +1,85 @@
+-/* $Id: head.S,v 1.4 2004/11/01 16:10:28 starvik Exp $
+- *
+- * This used to be the rescue code but now that is handled by the
+- * RedBoot based RFL instead. Nothing to see here, move along.
++/* $Id: head.S,v 1.16 2007/01/31 15:52:19 pkj Exp $
++ *
++ * Simple boot loader which can also handle NAND chips.
+ */
+
+-#include <asm/arch/hwregs/reg_map_asm.h>
+-#include <asm/arch/hwregs/config_defs_asm.h>
++#include <asm/arch/hwregs/asm/reg_map_asm.h>
++#include <asm/arch/hwregs/asm/config_defs_asm.h>
++
++#define RAM_INIT_MAGIC 0x56902387
++#define NAND_BOOT_MAGIC 0x9A9DB001
++
++;; Debugging. Normally all these are set to 0.
++#define LEDS (0)
++#define LEDTEST (0)
++#define FLASH_LEDS_INSTEAD_OF_BOOT (0)
++#define SERIAL_DUMP (0)
++#define SERIAL_PORT (0)
++#define SERIAL_RECEIVE (0)
++
++#if LEDS
++#include <asm/arch/hwregs/asm/gio_defs_asm.h>
++#include <asm/arch/hwregs/asm/pinmux_defs_asm.h>
++#include <asm/arch/hwregs/asm/bif_core_defs_asm.h>
++#endif
++
++#if SERIAL_DUMP
++#include <asm/arch/hwregs/asm/ser_defs_asm.h>
++#include <asm/arch/hwregs/asm/pinmux_defs_asm.h>
++#endif
++
++
++#if (SERIAL_PORT == 0)
++#define regi_serial regi_ser0
++#endif
++#if (SERIAL_PORT == 1)
++#define regi_serial regi_ser1
++#endif
++
++;; Macros
++
++#if LEDS
++.macro SAY x
++ orq 31, $r9
++ and.d ~(\x), $r9
++ move.d $r9, [$r8]
++.endm
++#else
++.macro SAY x
++ ;; nothing
++.endm
++#endif
++
++#if SERIAL_DUMP
++.macro DISPLAY x
++ move.d \x, $r6 ; save value
++ moveq 28, $r5 ; counter / shift amount
++8:
++ move.d $r6, $r3 ; fetch value
++ bsr nybbleout
++ lsr.d $r5, $r3 ; shift nybble we want (delay slot)
++ subq 4, $r5 ; count down bits
++ bpl 8b ; loop
++ nop
++ bsr serout
++ moveq 13, $r3 ; delay slot
++ bsr serout
++ moveq 10, $r3 ; delay slot
++.endm
++#else
++.macro DISPLAY x
++ ;; nothing
++.endm
++#endif
++
++
++;; Code
+
+ .text
++start:
+
++ ;; TODO: Add code for Ronny's search-for-good-block boot rom algorithm
++
+ ;; Start clocks for used blocks.
+ move.d REG_ADDR(config, regi_config, rw_clk_ctrl), $r1
+ move.d [$r1], $r0
+@@ -17,22 +88,258 @@
+ REG_STATE(config, rw_clk_ctrl, fix_io, yes), $r0
+ move.d $r0, [$r1]
+
+- ;; Copy 68KB NAND flash to Internal RAM (if NAND boot)
+- move.d 0x38004000, $r10
+- move.d 0x8000, $r11
+- move.d 0x11000, $r12
+- move.d copy_complete, $r13
+- and.d 0x000fffff, $r13
+- or.d 0x38000000, $r13
++
++#if LEDS
++ ;; set up for led control on PB 0..4
++ move.d REG_ADDR(gio, regi_gio, rw_pb_dout), $r8 ; output reg
++ move.d [$r8], $r9 ; shadow
++
++ ;; set up pinmux
++ move.d REG_ADDR(pinmux, regi_pinmux, rw_pb_gio), $r2
++ move.d [$r2], $r3
++ orq 31, $r3
++ move.d $r3, [$r2]
++
++ ;; set up GPIO
++ ;; set to outputs
++ move.d REG_ADDR(gio, regi_gio, rw_pb_oe), $r2
++ move.d [$r2], $r3
++ orq 31, $r3
++ move.d $r3, [$r2]
++
++
++#if LEDTEST
++ ;; led test
++
++ moveq 0, $r1 ; led 5-bit binary counter
++1:
++ or.d 31, $r9
++ xor $r1, $r9
++ move.d $r9, [$r8]
++ addq 1, $r1
++
++ move.d 100000000, $r2 ; delay loop (100e6 => 1s @200Mc)
++2:
++ bne 2b
++ subq 1, $r2
++
++ ba 1b ; loop
++ nop
++#endif
++
++#endif
++
++
++check_nand_boot:
++ ;; Check boot source by checking highest nybble of PC:
++ ;; If we're running at address 0x0XXXXXXX, we're in flash/eprom/sram
++ ;; If we're running at address 0x38000000, we're in internal RAM,
++ ;; so we're most likely coming from NAND.
++ ;; If we're running at address 0x40000000, we're in SDRAM,
++ ;; so we've most likely been started by some sort of bootstrapper
++ ;; e.g. fsboot, which in turn implies NAND, else we would be booting
++ ;; normally at 0x0XXXXXXX
++
++ SAY 1
++
++here:
++ lapcq ., $r0 ; get PC
++ sub.d (here-start), $r0 ; offset from here
++ beq normal_boot ; running at address 0 - normal boot
++ move.d $r0, $r13 ; save offset for later (unused delay slot)
++ lsrq 28, $r0 ; get highest nybble
++
++ SAY 2
++
++ ;; Prepare to copy 128KB of the NAND flash to internal RAM
++ move.d 0x38000200, $r10 ; dest in internal RAM
++ move.d 0x1fe00, $r12 ; #bytes
++ cmpq 4, $r0 ; running in RAM => started by fsboot
++ bhs copy_from_ram
++ movu.w 0x0200, $r11 ; source in flash (byte address) (DELAY SLOT)
+
+ #include "../../lib/nand_init.S"
+
+- ;; No NAND found
++#if LEDS
++ ;; must set up registers again (clobbered by nand_init)
++ move.d REG_ADDR(gio, regi_gio, rw_pb_dout), $r8 ; output reg
++ move.d [$r8], $r9 ; shadow
++#endif
++
++ SAY 3
++
++ ba copy_complete
++ nop
++
++ ; Since the code above has to reside within the first 256 bytes of
++ ; NAND flash, verify that the code so far hasn't gone past this
++ ; limit. If you're considering removing this, you haven't
++ ; properly understood the problem; see nand_init.S for details.
++ .org PAGE_SIZE_ADDRESSES ; from nand_init.S
++ .org PAGE_SIZE_BYTES ; from nand_init.S
++
++normal_boot:
++ SAY 4
++
++ ;; Normal NOR boot
+ move.d CONFIG_ETRAX_PTABLE_SECTOR, $r10
+- jump $r10 ; Jump to decompresser
++ jump $r10 ; Jump to decompresser
++ nop
++
++copy_from_ram:
++ add.d $r13, $r11 ; mem offs + src offs -> src addr
++1:
++ move.d [$r11+], $r0 ; read source
++ subq 4, $r12 ; 4 bytes at a time
++ bne 1b ; loop until done
++ move.d $r0, [$r10+] ; write dest (DELAY SLOT)
++ jump copy_complete ; jump to internal RAM
++ nop ; delay slot
++
++copy_complete:
++ SAY 5
++
++#if FLASH_LEDS_INSTEAD_OF_BOOT
++
++flash:
++
++ ;; led test
++
++ moveq 0, $r1 ; led binary counter
++1:
++ or.d 31, $r9
++ xor $r1, $r9
++ move.d $r9, [$r8]
++ addq 1, $r1
++
++ move.d 100000000, $r2 ; delay loop (100e6 => 1s)
++2:
++ bne 2b
++ subq 1, $r2
++
++ ba 1b ; loop forever
+ nop
++#endif
+
+-copy_complete:
+- move.d 0x38000000 + CONFIG_ETRAX_PTABLE_SECTOR, $r10
+- jump $r10 ; Jump to decompresser
++
++#if SERIAL_DUMP
++ ;; dump memory to serial port
++
++#if (SERIAL_PORT == 1)
++ ;; set up serial-1 pins
++ move.d REG_ADDR(pinmux, regi_pinmux, rw_hwprot), $r1
++ move.d [$r1], $r0
++ or.d REG_STATE(pinmux, rw_hwprot, ser1, yes), $r0
++ move.d $r0, [$r1]
++#endif
++
++ ;; rw_xoff: chr and automatic = 0
++ move.d REG_ADDR(ser, regi_serial, rw_xoff), $r1
++ move.d [$r1], $r0
++ and.d ~(REG_MASK(ser, rw_xoff, automatic) | REG_MASK(ser, rw_xoff, chr)), $r0
++ move.d $r0, [$r1]
++
++ ;; tr control
++ move.d REG_ADDR(ser, regi_serial, rw_tr_ctrl), $r1
++ move.d [$r1], $r0
++ and.d ~(REG_MASK(ser, rw_tr_ctrl, base_freq) | REG_MASK(ser, rw_tr_ctrl, stop_bits)), $r0
++ or.d REG_STATE(ser, rw_tr_ctrl, stop_bits, bits2) | REG_STATE(ser, rw_tr_ctrl, base_freq, f29_493) | REG_STATE(ser, rw_tr_ctrl, en, yes), $r0
++ move.d $r0, [$r1]
++
++ ;; tr baud
++ move.d REG_ADDR(ser, regi_serial, rw_tr_baud_div), $r1
++ move.d [$r1], $r0
++ move.w (29493000 / 8) / 115200, $r0
++ move.d $r0, [$r1]
++
++#if SERIAL_RECEIVE
++ ;; rec control
++ move.d REG_ADDR(ser, regi_serial, rw_rec_ctrl), $r1
++ move.d [$r1], $r0
++ and.d ~(REG_MASK(ser, rw_rec_ctrl, base_freq)), $r0
++ or.d REG_STATE(ser, rw_rec_ctrl, base_freq, f29_493) | REG_STATE(ser, rw_tr_ctrl, en, yes), $r0
++ move.d $r0, [$r1]
++
++ ;; rec baud
++ move.d REG_ADDR(ser, regi_serial, rw_rec_baud_div), $r1
++ move.d [$r1], $r0
++ move.w (29493000 / 8) / 115200, $r0
++ move.d $r0, [$r1]
++#endif
++
++ ;; dump memory
++
++ move.d 0x38000000, $r5 ; pointer
++
++ bsr serout
++ moveq 13, $r3
++ bsr serout
++ moveq 10, $r3
++ bsr serout
++ moveq 10, $r3
++
++1:
++ movu.b [$r5+], $r3 ; get value
++ move.d $r3, $r6 ; save
++
++ bsr nybbleout
++ lsrq 4, $r3 ; high nybble (delay slot)
++
++ move.d $r6, $r3 ; restore
++ bsr nybbleout
++ andq 15, $r3 ; delay slot
++
++ movu.b 32, $r3
++ bsr serout
+ nop
++
++ move.d $r5, $r3
++ andq 15, $r3
++ bne 1b
++ nop
++
++ bsr serout
++ moveq 13, $r3 ; delay slot
++ bsr serout
++ moveq 10, $r3 ; delay slot
++
++ ba 1b ; loop forever
++ nop
++
++nybbleout:
++ cmpq 10, $r3
++ blo 1f
++ addq 48, $r3 ; delay slot
++ addq 7, $r3
++1:
++serout:
++ move.d REG_ADDR(ser, regi_serial, rs_stat_din), $r1
++ move.d REG_ADDR(ser, regi_serial, rw_dout), $r2
++2:
++ move.d [$r1], $r4
++ btstq REG_BIT(ser, rs_stat_din, tr_rdy), $r4
++ bpl 2b
++ nop
++ ret
++ move.d $r3, [$r2] ; delay slot
++
++#endif
++
++;; Init DRAM
++
++#include "../../lib/dram_init.S"
++ move.d RAM_INIT_MAGIC, $r8 ; tell kernel boot loader dram init'd
++ move.d NAND_BOOT_MAGIC, $r12 ; booted from NAND flash
++
++;; TODO: Clear .bss (not needed yet because size of .bss is zero)
++;; TODO: Change .ld script so that BSS is in DRAM?
++
++;; Ok, time to do something. Continue with boot loader in C.
++;; Must set up minimal C environment first though.
++
++ move.d 0x38020000, $sp ; stack pointer at top of internal RAM
++
++ move.d bootload, $r10
++ jump $r10 ; Jump to boot loader
++ nop
++
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/lib.c linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/lib.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/lib.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/lib.c 2006-11-03 11:35:52.000000000 +0100
+@@ -0,0 +1,243 @@
++/*
++ * lib.c
++ * Small practical functions for boot loader
++ * malloc/free
++ * memcpy/memset
++ * writeb/writew/readb/readw
++ * putc/puts/putnybble/putx
++ * error/error2/BUG
++ * serial_init
++ *
++ * $Id: lib.c,v 1.4 2006/11/03 10:35:52 pkj Exp $
++ *
++ */
++
++#include <linux/types.h>
++#include <asm/arch/hwregs/reg_rdwr.h>
++#include <asm/arch/hwregs/reg_map.h>
++#include <asm/arch/hwregs/ser_defs.h>
++#include <asm/arch/hwregs/pinmux_defs.h>
++
++#include "lib.h"
++
++/* the "heap" is put directly after BSS ends, at _end */
++
++extern int _end;
++static long free_mem_ptr = (long)&_end;
++
++void *malloc(int size)
++{
++ void *p;
++
++ if (size <0) error("Malloc error");
++
++ free_mem_ptr = (free_mem_ptr + 3) & ~3; /* Align */
++
++ p = (void *)free_mem_ptr;
++ free_mem_ptr += size;
++
++ return p;
++}
++
++void free(void *where)
++{ /* Don't care */
++}
++
++/* I/O */
++
++unsigned char readb(const volatile void *addr)
++{
++ return *(volatile unsigned char *) addr;
++}
++
++unsigned short readw(const volatile void *addr)
++{
++ return *(volatile unsigned short *) addr;
++}
++
++void writeb(unsigned char b, volatile void *addr)
++{
++ *(volatile unsigned char *) addr = b;
++}
++
++void writew(unsigned short b, volatile void *addr)
++{
++ *(volatile unsigned short *) addr = b;
++}
++
++/* info and error messages to serial console */
++
++#ifndef CONFIG_ETRAX_DEBUG_PORT_NULL
++static inline void
++serout(const char c, reg_scope_instances regi_ser)
++{
++ reg_ser_rs_stat_din rs;
++ reg_ser_rw_dout dout = {.data = c};
++
++ do {
++ rs = REG_RD(ser, regi_ser, rs_stat_din);
++ }
++ while (!rs.tr_rdy);/* Wait for tranceiver. */
++
++ REG_WR(ser, regi_ser, rw_dout, dout);
++}
++
++
++void
++putc(const char c)
++{
++#ifdef CONFIG_ETRAX_DEBUG_PORT0
++ serout(c, regi_ser0);
++#endif
++#ifdef CONFIG_ETRAX_DEBUG_PORT1
++ serout(c, regi_ser1);
++#endif
++#ifdef CONFIG_ETRAX_DEBUG_PORT2
++ serout(c, regi_ser2);
++#endif
++#ifdef CONFIG_ETRAX_DEBUG_PORT3
++ serout(c, regi_ser3);
++#endif
++}
++
++
++void
++puts(const char *s)
++{
++ while (*s)
++ putc(*s++);
++}
++
++void
++putnybble(int n)
++{
++ putc("0123456789abcdef"[n & 15]);
++}
++
++void
++putx(int x)
++{
++ int i;
++
++ puts("0x");
++ for (i = 7; i >= 0; i--)
++ putnybble(x >> 4*i);
++}
++
++void
++putnl()
++{
++ puts("\r\n");
++}
++
++#endif /* CONFIG_ETRAX_DEBUG_PORT_NULL */
++
++void*
++memset(void* s, int c, size_t n)
++{
++ int i;
++ char *ss = (char*)s;
++
++ for (i=0;i<n;i++) ss[i] = c;
++}
++
++void*
++memcpy(void* __dest, __const void* __src,
++ size_t __n)
++{
++ int i;
++ char *d = (char *)__dest, *s = (char *)__src;
++
++ for (i=0;i<__n;i++) d[i] = s[i];
++}
++
++void
++error(const char *x)
++{
++ puts("\r\n\n");
++ puts(x);
++ puts("\r\n\n -- System halted\n");
++
++ while(1); /* Halt */
++}
++
++void
++error2(const char *x, int y, const char *z)
++{
++ puts("\r\n\n");
++ puts(x);
++ putc(':');
++ putx(y);
++ putc(':');
++ puts(z);
++ puts("\r\n\n -- System halted\n");
++
++ while(1); /* Halt */
++}
++
++static inline void
++serial_setup(reg_scope_instances regi_ser)
++{
++ reg_ser_rw_xoff xoff;
++ reg_ser_rw_tr_ctrl tr_ctrl;
++ reg_ser_rw_rec_ctrl rec_ctrl;
++ reg_ser_rw_tr_baud_div tr_baud;
++ reg_ser_rw_rec_baud_div rec_baud;
++
++ /* Turn off XOFF. */
++ xoff = REG_RD(ser, regi_ser, rw_xoff);
++
++ xoff.chr = 0;
++ xoff.automatic = regk_ser_no;
++
++ REG_WR(ser, regi_ser, rw_xoff, xoff);
++
++ /* Set baudrate and stopbits. */
++ tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
++ rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
++ tr_baud = REG_RD(ser, regi_ser, rw_tr_baud_div);
++ rec_baud = REG_RD(ser, regi_ser, rw_rec_baud_div);
++
++ tr_ctrl.stop_bits = 1; /* 2 stop bits. */
++ tr_ctrl.en = 1; /* enable transmitter */
++ rec_ctrl.en = 1; /* enabler receiver */
++
++ /*
++ * The baudrate setup used to be a bit fishy, but now transmitter and
++ * receiver are both set to the intended baud rate, 115200.
++ * The magic value is 29.493 MHz.
++ */
++ tr_ctrl.base_freq = regk_ser_f29_493;
++ rec_ctrl.base_freq = regk_ser_f29_493;
++ tr_baud.div = (29493000 / 8) / 115200;
++ rec_baud.div = (29493000 / 8) / 115200;
++
++ REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
++ REG_WR(ser, regi_ser, rw_tr_baud_div, tr_baud);
++ REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
++ REG_WR(ser, regi_ser, rw_rec_baud_div, rec_baud);
++}
++
++void
++serial_init()
++{
++ reg_pinmux_rw_hwprot hwprot;
++
++ hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
++#ifdef CONFIG_ETRAX_DEBUG_PORT0
++ serial_setup(regi_ser0);
++#endif
++#ifdef CONFIG_ETRAX_DEBUG_PORT1
++ hwprot.ser1 = regk_pinmux_yes;
++ serial_setup(regi_ser1);
++#endif
++#ifdef CONFIG_ETRAX_DEBUG_PORT2
++ hwprot.ser2 = regk_pinmux_yes;
++ serial_setup(regi_ser2);
++#endif
++#ifdef CONFIG_ETRAX_DEBUG_PORT3
++ hwprot.ser3 = regk_pinmux_yes;
++ serial_setup(regi_ser3);
++#endif
++ REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
++}
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/lib.h linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/lib.h
+--- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/lib.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/lib.h 2006-11-03 11:35:52.000000000 +0100
+@@ -0,0 +1,56 @@
++/*
++ * lib.c
++ * Small practical functions for boot loader
++ * malloc/free
++ * memset/memcpy
++ * putc/puts/putnybble/putd
++ * writeb/writew/readb/readw
++ * error/error2/BUG
++ * serial_init
++ *
++ * $Id: lib.h,v 1.3 2006/11/03 10:35:52 pkj Exp $
++ *
++ */
++
++#ifndef _LIB_H
++#define _LIB_H
++
++#include <linux/types.h>
++
++/* nice stuff we need without having any library around */
++
++void* memset(void* s, int c, size_t n);
++void* memcpy(void* __dest, __const void* __src,
++ size_t __n);
++
++#define memzero(s, n) memset ((s), 0, (n))
++
++#undef BUG
++#define BUG() error2("BUG in " __FILE__, __LINE__, __FUNCTION__)
++
++void *malloc(int size);
++void free(void *where);
++void error(const char *m);
++void error2(const char *m, int l, const char *f);
++void serial_init(void);
++
++#ifndef CONFIG_ETRAX_DEBUG_PORT_NULL
++void putc(const char);
++void puts(const char *);
++void putnybble(int n);
++void putx(int x);
++void putnl();
++#else
++#define putc(ch)
++#define puts(str)
++#define putnybble(nyb)
++#define putx(x)
++#define putnl()
++#endif /* CONFIG_ETRAX_DEBUG_PORT_NULL */
++
++unsigned char readb(const volatile void *addr);
++unsigned short readw(const volatile void *addr);
++void writeb(unsigned char b, volatile void *addr);
++void writew(unsigned short b, volatile void *addr);
++
++#endif /* _LIB_H */
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/mtd-abi.h linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/mtd-abi.h
+--- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/mtd-abi.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/mtd-abi.h 2006-09-06 11:21:07.000000000 +0200
+@@ -0,0 +1,121 @@
++/*
++ * $Id: mtd-abi.h,v 1.1 2006/09/06 09:21:07 ricardw Exp $
++ *
++ * Portions of MTD ABI definition which are shared by kernel and user space
++ */
++
++#ifndef __MTD_ABI_H__
++#define __MTD_ABI_H__
++
++#ifndef __KERNEL__ /* Urgh. The whole point of splitting this out into
++ separate files was to avoid #ifdef __KERNEL__ */
++#define __user
++#endif
++
++struct erase_info_user {
++ uint32_t start;
++ uint32_t length;
++};
++
++struct mtd_oob_buf {
++ uint32_t start;
++ uint32_t length;
++ unsigned char __user *ptr;
++};
++
++#define MTD_ABSENT 0
++#define MTD_RAM 1
++#define MTD_ROM 2
++#define MTD_NORFLASH 3
++#define MTD_NANDFLASH 4
++#define MTD_PEROM 5
++#define MTD_DATAFLASH 6
++#define MTD_OTHER 14
++#define MTD_UNKNOWN 15
++
++#define MTD_CLEAR_BITS 1 // Bits can be cleared (flash)
++#define MTD_SET_BITS 2 // Bits can be set
++#define MTD_ERASEABLE 4 // Has an erase function
++#define MTD_WRITEB_WRITEABLE 8 // Direct IO is possible
++#define MTD_VOLATILE 16 // Set for RAMs
++#define MTD_XIP 32 // eXecute-In-Place possible
++#define MTD_OOB 64 // Out-of-band data (NAND flash)
++#define MTD_ECC 128 // Device capable of automatic ECC
++#define MTD_NO_VIRTBLOCKS 256 // Virtual blocks not allowed
++#define MTD_PROGRAM_REGIONS 512 // Configurable Programming Regions
++
++// Some common devices / combinations of capabilities
++#define MTD_CAP_ROM 0
++#define MTD_CAP_RAM (MTD_CLEAR_BITS|MTD_SET_BITS|MTD_WRITEB_WRITEABLE)
++#define MTD_CAP_NORFLASH (MTD_CLEAR_BITS|MTD_ERASEABLE)
++#define MTD_CAP_NANDFLASH (MTD_CLEAR_BITS|MTD_ERASEABLE|MTD_OOB)
++#define MTD_WRITEABLE (MTD_CLEAR_BITS|MTD_SET_BITS)
++
++
++// Types of automatic ECC/Checksum available
++#define MTD_ECC_NONE 0 // No automatic ECC available
++#define MTD_ECC_RS_DiskOnChip 1 // Automatic ECC on DiskOnChip
++#define MTD_ECC_SW 2 // SW ECC for Toshiba & Samsung devices
++
++/* ECC byte placement */
++#define MTD_NANDECC_OFF 0 // Switch off ECC (Not recommended)
++#define MTD_NANDECC_PLACE 1 // Use the given placement in the structure (YAFFS1 legacy mode)
++#define MTD_NANDECC_AUTOPLACE 2 // Use the default placement scheme
++#define MTD_NANDECC_PLACEONLY 3 // Use the given placement in the structure (Do not store ecc result on read)
++#define MTD_NANDECC_AUTOPL_USR 4 // Use the given autoplacement scheme rather than using the default
++
++/* OTP mode selection */
++#define MTD_OTP_OFF 0
++#define MTD_OTP_FACTORY 1
++#define MTD_OTP_USER 2
++
++struct mtd_info_user {
++ uint8_t type;
++ uint32_t flags;
++ uint32_t size; // Total size of the MTD
++ uint32_t erasesize;
++ uint32_t oobblock; // Size of OOB blocks (e.g. 512)
++ uint32_t oobsize; // Amount of OOB data per block (e.g. 16)
++ uint32_t ecctype;
++ uint32_t eccsize;
++};
++
++struct region_info_user {
++ uint32_t offset; /* At which this region starts,
++ * from the beginning of the MTD */
++ uint32_t erasesize; /* For this region */
++ uint32_t numblocks; /* Number of blocks in this region */
++ uint32_t regionindex;
++};
++
++struct otp_info {
++ uint32_t start;
++ uint32_t length;
++ uint32_t locked;
++};
++
++#define MEMGETINFO _IOR('M', 1, struct mtd_info_user)
++#define MEMERASE _IOW('M', 2, struct erase_info_user)
++#define MEMWRITEOOB _IOWR('M', 3, struct mtd_oob_buf)
++#define MEMREADOOB _IOWR('M', 4, struct mtd_oob_buf)
++#define MEMLOCK _IOW('M', 5, struct erase_info_user)
++#define MEMUNLOCK _IOW('M', 6, struct erase_info_user)
++#define MEMGETREGIONCOUNT _IOR('M', 7, int)
++#define MEMGETREGIONINFO _IOWR('M', 8, struct region_info_user)
++#define MEMSETOOBSEL _IOW('M', 9, struct nand_oobinfo)
++#define MEMGETOOBSEL _IOR('M', 10, struct nand_oobinfo)
++#define MEMGETBADBLOCK _IOW('M', 11, loff_t)
++#define MEMSETBADBLOCK _IOW('M', 12, loff_t)
++#define OTPSELECT _IOR('M', 13, int)
++#define OTPGETREGIONCOUNT _IOW('M', 14, int)
++#define OTPGETREGIONINFO _IOW('M', 15, struct otp_info)
++#define OTPLOCK _IOR('M', 16, struct otp_info)
++
++struct nand_oobinfo {
++ uint32_t useecc;
++ uint32_t eccbytes;
++ uint32_t oobfree[8][2];
++ uint32_t eccpos[32];
++};
++
++#endif /* __MTD_ABI_H__ */
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/mtd.h linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/mtd.h
+--- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/mtd.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/mtd.h 2006-12-14 07:59:24.000000000 +0100
+@@ -0,0 +1,270 @@
++/*
++ * $Id: mtd.h,v 1.5 2006/12/14 06:59:24 ricardw Exp $
++ *
++ * Copyright (C) 1999-2003 David Woodhouse <dwmw2@infradead.org> et al.
++ *
++ * Released under GPL
++ */
++
++#ifndef __MTD_MTD_H__
++#define __MTD_MTD_H__
++
++#ifndef __KERNEL__
++#error This is a kernel header. Perhaps include mtd-user.h instead?
++#endif
++
++/* only include absolutely necessary linux headers which will not change
++ * significantly
++ */
++#include <linux/types.h>
++#include <linux/errno.h>
++
++#if 0
++#include <linux/module.h>
++#include <linux/uio.h>
++#include <linux/notifier.h>
++
++#include <linux/mtd/compatmac.h>
++#include <mtd/mtd-abi.h>
++#endif
++
++#include "mtd-abi.h"
++
++/* local config, we don't want linux/config.h here */
++/* any undef/define pairs here avoid warnings due to linux autoconf includes */
++#undef CONFIG_MTD_PARTITIONS
++#undef CONFIG_MTD_DEBUG
++#undef CONFIG_MTD_NAND_VERIFY_WRITE
++#define CONFIG_MTD_NAND_VERIFY_WRITE
++
++/* our MTD config */
++
++#define NAND_BBT_SUPPORT 0
++#define NAND_WRITE_SUPPORT 0
++#define NAND_ERASE_SUPPORT 0
++#define NAND_MULTICHIP_SUPPORT 0
++#define NAND_HWECC_SUPPORT 0
++#define NAND_KVEC_SUPPORT 0
++
++
++#define MTD_CHAR_MAJOR 90
++#define MTD_BLOCK_MAJOR 31
++#define MAX_MTD_DEVICES 16
++
++#define MTD_ERASE_PENDING 0x01
++#define MTD_ERASING 0x02
++#define MTD_ERASE_SUSPEND 0x04
++#define MTD_ERASE_DONE 0x08
++#define MTD_ERASE_FAILED 0x10
++
++/* If the erase fails, fail_addr might indicate exactly which block failed. If
++ fail_addr = 0xffffffff, the failure was not at the device level or was not
++ specific to any particular block. */
++struct erase_info {
++ struct mtd_info *mtd;
++ u_int32_t addr;
++ u_int32_t len;
++ u_int32_t fail_addr;
++ u_long time;
++ u_long retries;
++ u_int dev;
++ u_int cell;
++ void (*callback) (struct erase_info *self);
++ u_long priv;
++ u_char state;
++ struct erase_info *next;
++};
++
++struct mtd_erase_region_info {
++ u_int32_t offset; /* At which this region starts, from the beginning of the MTD */
++ u_int32_t erasesize; /* For this region */
++ u_int32_t numblocks; /* Number of blocks of erasesize in this region */
++};
++
++struct mtd_info {
++ u_char type;
++ u_int32_t flags;
++ u_int32_t size; // Total size of the MTD
++
++ /* "Major" erase size for the device. Naïve users may take this
++ * to be the only erase size available, or may use the more detailed
++ * information below if they desire
++ */
++ u_int32_t erasesize;
++
++ u_int32_t oobblock; // Size of OOB blocks (e.g. 512)
++ u_int32_t oobsize; // Amount of OOB data per block (e.g. 16)
++ u_int32_t ecctype;
++ u_int32_t eccsize;
++
++ /*
++ * Reuse some of the above unused fields in the case of NOR flash
++ * with configurable programming regions to avoid modifying the
++ * user visible structure layout/size. Only valid when the
++ * MTD_PROGRAM_REGIONS flag is set.
++ * (Maybe we should have an union for those?)
++ */
++#define MTD_PROGREGION_SIZE(mtd) (mtd)->oobblock
++#define MTD_PROGREGION_CTRLMODE_VALID(mtd) (mtd)->oobsize
++#define MTD_PROGREGION_CTRLMODE_INVALID(mtd) (mtd)->ecctype
++
++ // Kernel-only stuff starts here.
++ char *name;
++ int index;
++
++ // oobinfo is a nand_oobinfo structure, which can be set by iotcl (MEMSETOOBINFO)
++ struct nand_oobinfo oobinfo;
++ u_int32_t oobavail; // Number of bytes in OOB area available for fs
++
++ /* Data for variable erase regions. If numeraseregions is zero,
++ * it means that the whole device has erasesize as given above.
++ */
++ int numeraseregions;
++ struct mtd_erase_region_info *eraseregions;
++
++ /* This really shouldn't be here. It can go away in 2.5 */
++ u_int32_t bank_size;
++
++ int (*erase) (struct mtd_info *mtd, struct erase_info *instr);
++
++ /* This stuff for eXecute-In-Place */
++ int (*point) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char **mtdbuf);
++
++ /* We probably shouldn't allow XIP if the unpoint isn't a NULL */
++ void (*unpoint) (struct mtd_info *mtd, u_char * addr, loff_t from, size_t len);
++
++
++ int (*read) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
++ int (*write) (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf);
++
++ int (*read_ecc) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf, u_char *eccbuf, struct nand_oobinfo *oobsel);
++ int (*write_ecc) (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf, u_char *eccbuf, struct nand_oobinfo *oobsel);
++
++ int (*read_oob) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
++ int (*write_oob) (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf);
++
++ /*
++ * Methods to access the protection register area, present in some
++ * flash devices. The user data is one time programmable but the
++ * factory data is read only.
++ */
++ int (*get_fact_prot_info) (struct mtd_info *mtd, struct otp_info *buf, size_t len);
++ int (*read_fact_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
++ int (*get_user_prot_info) (struct mtd_info *mtd, struct otp_info *buf, size_t len);
++ int (*read_user_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
++ int (*write_user_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf);
++ int (*lock_user_prot_reg) (struct mtd_info *mtd, loff_t from, size_t len);
++
++#if NAND_KVEC_SUPPORT
++ /* kvec-based read/write methods. We need these especially for NAND flash,
++ with its limited number of write cycles per erase.
++ NB: The 'count' parameter is the number of _vectors_, each of
++ which contains an (ofs, len) tuple.
++ */
++ int (*readv) (struct mtd_info *mtd, struct kvec *vecs, unsigned long count, loff_t from, size_t *retlen);
++ int (*readv_ecc) (struct mtd_info *mtd, struct kvec *vecs, unsigned long count, loff_t from,
++ size_t *retlen, u_char *eccbuf, struct nand_oobinfo *oobsel);
++ int (*writev) (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count, loff_t to, size_t *retlen);
++ int (*writev_ecc) (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count, loff_t to,
++ size_t *retlen, u_char *eccbuf, struct nand_oobinfo *oobsel);
++#endif
++
++ /* Sync */
++ void (*sync) (struct mtd_info *mtd);
++
++ /* Chip-supported device locking */
++ int (*lock) (struct mtd_info *mtd, loff_t ofs, size_t len);
++ int (*unlock) (struct mtd_info *mtd, loff_t ofs, size_t len);
++
++ /* Power Management functions */
++ int (*suspend) (struct mtd_info *mtd);
++ void (*resume) (struct mtd_info *mtd);
++
++ /* Bad block management functions */
++ int (*block_isbad) (struct mtd_info *mtd, loff_t ofs);
++ int (*block_markbad) (struct mtd_info *mtd, loff_t ofs);
++
++#if 0 /* don't know what this is for */
++ struct notifier_block reboot_notifier; /* default mode before reboot */
++#endif
++
++ void *priv;
++
++ struct module *owner;
++ int usecount;
++};
++
++#if 0 /* don't need these */
++ /* Kernel-side ioctl definitions */
++
++extern int add_mtd_device(struct mtd_info *mtd);
++extern int del_mtd_device (struct mtd_info *mtd);
++
++extern struct mtd_info *get_mtd_device(struct mtd_info *mtd, int num);
++
++extern void put_mtd_device(struct mtd_info *mtd);
++
++
++struct mtd_notifier {
++ void (*add)(struct mtd_info *mtd);
++ void (*remove)(struct mtd_info *mtd);
++ struct list_head list;
++};
++
++
++extern void register_mtd_user (struct mtd_notifier *new);
++extern int unregister_mtd_user (struct mtd_notifier *old);
++#endif
++
++#if NAND_KVEC_SUPPORT
++int default_mtd_writev(struct mtd_info *mtd, const struct kvec *vecs,
++ unsigned long count, loff_t to, size_t *retlen);
++
++int default_mtd_readv(struct mtd_info *mtd, struct kvec *vecs,
++ unsigned long count, loff_t from, size_t *retlen);
++#endif
++
++#define MTD_ERASE(mtd, args...) (*(mtd->erase))(mtd, args)
++#define MTD_POINT(mtd, a,b,c,d) (*(mtd->point))(mtd, a,b,c, (u_char **)(d))
++#define MTD_UNPOINT(mtd, arg) (*(mtd->unpoint))(mtd, (u_char *)arg)
++#define MTD_READ(mtd, args...) (*(mtd->read))(mtd, args)
++#define MTD_WRITE(mtd, args...) (*(mtd->write))(mtd, args)
++#define MTD_READV(mtd, args...) (*(mtd->readv))(mtd, args)
++#define MTD_WRITEV(mtd, args...) (*(mtd->writev))(mtd, args)
++#define MTD_READECC(mtd, args...) (*(mtd->read_ecc))(mtd, args)
++#define MTD_WRITEECC(mtd, args...) (*(mtd->write_ecc))(mtd, args)
++#define MTD_READOOB(mtd, args...) (*(mtd->read_oob))(mtd, args)
++#define MTD_WRITEOOB(mtd, args...) (*(mtd->write_oob))(mtd, args)
++#define MTD_SYNC(mtd) do { if (mtd->sync) (*(mtd->sync))(mtd); } while (0)
++
++
++#ifdef CONFIG_MTD_PARTITIONS
++void mtd_erase_callback(struct erase_info *instr);
++#else
++static inline void mtd_erase_callback(struct erase_info *instr)
++{
++ if (instr->callback)
++ instr->callback(instr);
++}
++#endif
++
++/*
++ * Debugging macro and defines
++ */
++#define MTD_DEBUG_LEVEL0 (0) /* Quiet */
++#define MTD_DEBUG_LEVEL1 (1) /* Audible */
++#define MTD_DEBUG_LEVEL2 (2) /* Loud */
++#define MTD_DEBUG_LEVEL3 (3) /* Noisy */
++
++#ifdef CONFIG_MTD_DEBUG
++#define DEBUG(n, args...) \
++ do { \
++ if (n <= CONFIG_MTD_DEBUG_VERBOSE) \
++ printk(KERN_INFO args); \
++ } while(0)
++#else /* CONFIG_MTD_DEBUG */
++#define DEBUG(n, args...) do { } while(0)
++
++#endif /* CONFIG_MTD_DEBUG */
++
++#endif /* __MTD_MTD_H__ */
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand.h linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand.h
+--- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand.h 2006-11-03 11:35:52.000000000 +0100
+@@ -0,0 +1,521 @@
++/*
++ * linux/include/linux/mtd/nand.h
++ *
++ * Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com>
++ * Steven J. Hill <sjhill@realitydiluted.com>
++ * Thomas Gleixner <tglx@linutronix.de>
++ *
++ * $Id: nand.h,v 1.4 2006/11/03 10:35:52 pkj Exp $
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * Info:
++ * Contains standard defines and IDs for NAND flash devices
++ *
++ * Changelog:
++ * 01-31-2000 DMW Created
++ * 09-18-2000 SJH Moved structure out of the Disk-On-Chip drivers
++ * so it can be used by other NAND flash device
++ * drivers. I also changed the copyright since none
++ * of the original contents of this file are specific
++ * to DoC devices. David can whack me with a baseball
++ * bat later if I did something naughty.
++ * 10-11-2000 SJH Added private NAND flash structure for driver
++ * 10-24-2000 SJH Added prototype for 'nand_scan' function
++ * 10-29-2001 TG changed nand_chip structure to support
++ * hardwarespecific function for accessing control lines
++ * 02-21-2002 TG added support for different read/write adress and
++ * ready/busy line access function
++ * 02-26-2002 TG added chip_delay to nand_chip structure to optimize
++ * command delay times for different chips
++ * 04-28-2002 TG OOB config defines moved from nand.c to avoid duplicate
++ * defines in jffs2/wbuf.c
++ * 08-07-2002 TG forced bad block location to byte 5 of OOB, even if
++ * CONFIG_MTD_NAND_ECC_JFFS2 is not set
++ * 08-10-2002 TG extensions to nand_chip structure to support HW-ECC
++ *
++ * 08-29-2002 tglx nand_chip structure: data_poi for selecting
++ * internal / fs-driver buffer
++ * support for 6byte/512byte hardware ECC
++ * read_ecc, write_ecc extended for different oob-layout
++ * oob layout selections: NAND_NONE_OOB, NAND_JFFS2_OOB,
++ * NAND_YAFFS_OOB
++ * 11-25-2002 tglx Added Manufacturer code FUJITSU, NATIONAL
++ * Split manufacturer and device ID structures
++ *
++ * 02-08-2004 tglx added option field to nand structure for chip anomalities
++ * 05-25-2004 tglx added bad block table support, ST-MICRO manufacturer id
++ * update of nand_chip structure description
++ * 01-17-2005 dmarlin added extended commands for AG-AND device and added option
++ * for BBT_AUTO_REFRESH.
++ * 01-20-2005 dmarlin added optional pointer to hardware specific callback for
++ * extra error status checks.
++ */
++#ifndef __LINUX_MTD_NAND_H
++#define __LINUX_MTD_NAND_H
++
++#if 0 /* avoid these as much as possible */
++#include <linux/wait.h>
++#include <linux/spinlock.h>
++#include <linux/mtd/mtd.h>
++#endif
++
++#include "mtd.h" /* local */
++
++#include <linux/kernel.h> /* we do need this though ... */
++
++struct mtd_info;
++/* Scan and identify a NAND device */
++extern int nand_scan (struct mtd_info *mtd, int max_chips);
++/* Free resources held by the NAND device */
++extern void nand_release (struct mtd_info *mtd);
++
++/* Read raw data from the device without ECC */
++extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len, size_t ooblen);
++
++
++/* The maximum number of NAND chips in an array */
++#define NAND_MAX_CHIPS 8
++
++/* This constant declares the max. oobsize / page, which
++ * is supported now. If you add a chip with bigger oobsize/page
++ * adjust this accordingly.
++ */
++#define NAND_MAX_OOBSIZE 64
++
++/*
++ * Constants for hardware specific CLE/ALE/NCE function
++*/
++/* Select the chip by setting nCE to low */
++#define NAND_CTL_SETNCE 1
++/* Deselect the chip by setting nCE to high */
++#define NAND_CTL_CLRNCE 2
++/* Select the command latch by setting CLE to high */
++#define NAND_CTL_SETCLE 3
++/* Deselect the command latch by setting CLE to low */
++#define NAND_CTL_CLRCLE 4
++/* Select the address latch by setting ALE to high */
++#define NAND_CTL_SETALE 5
++/* Deselect the address latch by setting ALE to low */
++#define NAND_CTL_CLRALE 6
++/* Set write protection by setting WP to high. Not used! */
++#define NAND_CTL_SETWP 7
++/* Clear write protection by setting WP to low. Not used! */
++#define NAND_CTL_CLRWP 8
++
++/*
++ * Standard NAND flash commands
++ */
++#define NAND_CMD_READ0 0
++#define NAND_CMD_READ1 1
++#define NAND_CMD_PAGEPROG 0x10
++#define NAND_CMD_READOOB 0x50
++#define NAND_CMD_ERASE1 0x60
++#define NAND_CMD_STATUS 0x70
++#define NAND_CMD_STATUS_MULTI 0x71
++#define NAND_CMD_SEQIN 0x80
++#define NAND_CMD_READID 0x90
++#define NAND_CMD_ERASE2 0xd0
++#define NAND_CMD_RESET 0xff
++
++/* Extended commands for large page devices */
++#define NAND_CMD_READSTART 0x30
++#define NAND_CMD_CACHEDPROG 0x15
++
++/* Extended commands for AG-AND device */
++/*
++ * Note: the command for NAND_CMD_DEPLETE1 is really 0x00 but
++ * there is no way to distinguish that from NAND_CMD_READ0
++ * until the remaining sequence of commands has been completed
++ * so add a high order bit and mask it off in the command.
++ */
++#define NAND_CMD_DEPLETE1 0x100
++#define NAND_CMD_DEPLETE2 0x38
++#define NAND_CMD_STATUS_MULTI 0x71
++#define NAND_CMD_STATUS_ERROR 0x72
++/* multi-bank error status (banks 0-3) */
++#define NAND_CMD_STATUS_ERROR0 0x73
++#define NAND_CMD_STATUS_ERROR1 0x74
++#define NAND_CMD_STATUS_ERROR2 0x75
++#define NAND_CMD_STATUS_ERROR3 0x76
++#define NAND_CMD_STATUS_RESET 0x7f
++#define NAND_CMD_STATUS_CLEAR 0xff
++
++/* Status bits */
++#define NAND_STATUS_FAIL 0x01
++#define NAND_STATUS_FAIL_N1 0x02
++#define NAND_STATUS_TRUE_READY 0x20
++#define NAND_STATUS_READY 0x40
++#define NAND_STATUS_WP 0x80
++
++/*
++ * Constants for ECC_MODES
++ */
++
++/* No ECC. Usage is not recommended ! */
++#define NAND_ECC_NONE 0
++/* Software ECC 3 byte ECC per 256 Byte data */
++#define NAND_ECC_SOFT 1
++/* Hardware ECC 3 byte ECC per 256 Byte data */
++#define NAND_ECC_HW3_256 2
++/* Hardware ECC 3 byte ECC per 512 Byte data */
++#define NAND_ECC_HW3_512 3
++/* Hardware ECC 3 byte ECC per 512 Byte data */
++#define NAND_ECC_HW6_512 4
++/* Hardware ECC 8 byte ECC per 512 Byte data */
++#define NAND_ECC_HW8_512 6
++/* Hardware ECC 12 byte ECC per 2048 Byte data */
++#define NAND_ECC_HW12_2048 7
++
++/*
++ * Constants for Hardware ECC
++ */
++/* Reset Hardware ECC for read */
++#define NAND_ECC_READ 0
++/* Reset Hardware ECC for write */
++#define NAND_ECC_WRITE 1
++/* Enable Hardware ECC before syndrom is read back from flash */
++#define NAND_ECC_READSYN 2
++
++/* Bit mask for flags passed to do_nand_read_ecc */
++#define NAND_GET_DEVICE 0x80
++
++
++/* Option constants for bizarre disfunctionality and real
++* features
++*/
++/* Chip can not auto increment pages */
++#define NAND_NO_AUTOINCR 0x00000001
++/* Buswitdh is 16 bit */
++#define NAND_BUSWIDTH_16 0x00000002
++/* Device supports partial programming without padding */
++#define NAND_NO_PADDING 0x00000004
++/* Chip has cache program function */
++#define NAND_CACHEPRG 0x00000008
++/* Chip has copy back function */
++#define NAND_COPYBACK 0x00000010
++/* AND Chip which has 4 banks and a confusing page / block
++ * assignment. See Renesas datasheet for further information */
++#define NAND_IS_AND 0x00000020
++/* Chip has a array of 4 pages which can be read without
++ * additional ready /busy waits */
++#define NAND_4PAGE_ARRAY 0x00000040
++/* Chip requires that BBT is periodically rewritten to prevent
++ * bits from adjacent blocks from 'leaking' in altering data.
++ * This happens with the Renesas AG-AND chips, possibly others. */
++#define BBT_AUTO_REFRESH 0x00000080
++
++/* Options valid for Samsung large page devices */
++#define NAND_SAMSUNG_LP_OPTIONS \
++ (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK)
++
++/* Macros to identify the above */
++#define NAND_CANAUTOINCR(chip) (!(chip->options & NAND_NO_AUTOINCR))
++#define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING))
++#define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG))
++#define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK))
++
++/* Mask to zero out the chip options, which come from the id table */
++#define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR)
++
++/* Non chip related options */
++/* Use a flash based bad block table. This option is passed to the
++ * default bad block table function. */
++#define NAND_USE_FLASH_BBT 0x00010000
++/* The hw ecc generator provides a syndrome instead a ecc value on read
++ * This can only work if we have the ecc bytes directly behind the
++ * data bytes. Applies for DOC and AG-AND Renesas HW Reed Solomon generators */
++#define NAND_HWECC_SYNDROME 0x00020000
++/* This option skips the bbt scan during initialization. */
++#define NAND_SKIP_BBTSCAN 0x00040000
++
++/* Options set by nand scan */
++/* Nand scan has allocated oob_buf */
++#define NAND_OOBBUF_ALLOC 0x40000000
++/* Nand scan has allocated data_buf */
++#define NAND_DATABUF_ALLOC 0x80000000
++
++
++/*
++ * nand_state_t - chip states
++ * Enumeration for NAND flash chip state
++ */
++typedef enum {
++ FL_READY,
++ FL_READING,
++ FL_WRITING,
++ FL_ERASING,
++ FL_SYNCING,
++ FL_CACHEDPRG,
++ FL_PM_SUSPENDED,
++} nand_state_t;
++
++/* Keep gcc happy */
++struct nand_chip;
++
++/**
++ * struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independend devices
++ * @lock: protection lock
++ * @active: the mtd device which holds the controller currently
++ * @wq: wait queue to sleep on if a NAND operation is in progress
++ * used instead of the per chip wait queue when a hw controller is available
++ */
++#if NAND_HWECC_SUPPORT
++struct nand_hw_control {
++ spinlock_t lock;
++ struct nand_chip *active;
++ wait_queue_head_t wq;
++};
++#endif
++
++/**
++ * struct nand_chip - NAND Private Flash Chip Data
++ * @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device
++ * @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device
++ * @read_byte: [REPLACEABLE] read one byte from the chip
++ * @write_byte: [REPLACEABLE] write one byte to the chip
++ * @read_word: [REPLACEABLE] read one word from the chip
++ * @write_word: [REPLACEABLE] write one word to the chip
++ * @write_buf: [REPLACEABLE] write data from the buffer to the chip
++ * @read_buf: [REPLACEABLE] read data from the chip into the buffer
++ * @verify_buf: [REPLACEABLE] verify buffer contents against the chip data
++ * @select_chip: [REPLACEABLE] select chip nr
++ * @block_bad: [REPLACEABLE] check, if the block is bad
++ * @block_markbad: [REPLACEABLE] mark the block bad
++ * @hwcontrol: [BOARDSPECIFIC] hardwarespecific function for accesing control-lines
++ * @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing device ready/busy line
++ * If set to NULL no access to ready/busy is available and the ready/busy information
++ * is read from the chip status register
++ * @cmdfunc: [REPLACEABLE] hardwarespecific function for writing commands to the chip
++ * @waitfunc: [REPLACEABLE] hardwarespecific function for wait on ready
++ * @calculate_ecc: [REPLACEABLE] function for ecc calculation or readback from ecc hardware
++ * @correct_data: [REPLACEABLE] function for ecc correction, matching to ecc generator (sw/hw)
++ * @enable_hwecc: [BOARDSPECIFIC] function to enable (reset) hardware ecc generator. Must only
++ * be provided if a hardware ECC is available
++ * @erase_cmd: [INTERN] erase command write function, selectable due to AND support
++ * @scan_bbt: [REPLACEABLE] function to scan bad block table
++ * @eccmode: [BOARDSPECIFIC] mode of ecc, see defines
++ * @eccsize: [INTERN] databytes used per ecc-calculation
++ * @eccbytes: [INTERN] number of ecc bytes per ecc-calculation step
++ * @eccsteps: [INTERN] number of ecc calculation steps per page
++ * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR)
++ * @chip_lock: [INTERN] spinlock used to protect access to this structure and the chip
++ * @wq: [INTERN] wait queue to sleep on if a NAND operation is in progress
++ * @state: [INTERN] the current state of the NAND device
++ * @page_shift: [INTERN] number of address bits in a page (column address bits)
++ * @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock
++ * @bbt_erase_shift: [INTERN] number of address bits in a bbt entry
++ * @chip_shift: [INTERN] number of address bits in one chip
++ * @data_buf: [INTERN] internal buffer for one page + oob
++ * @oob_buf: [INTERN] oob buffer for one eraseblock
++ * @oobdirty: [INTERN] indicates that oob_buf must be reinitialized
++ * @data_poi: [INTERN] pointer to a data buffer
++ * @options: [BOARDSPECIFIC] various chip options. They can partly be set to inform nand_scan about
++ * special functionality. See the defines for further explanation
++ * @badblockpos: [INTERN] position of the bad block marker in the oob area
++ * @numchips: [INTERN] number of physical chips
++ * @chipsize: [INTERN] the size of one chip for multichip arrays
++ * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1
++ * @pagebuf: [INTERN] holds the pagenumber which is currently in data_buf
++ * @autooob: [REPLACEABLE] the default (auto)placement scheme
++ * @bbt: [INTERN] bad block table pointer
++ * @bbt_td: [REPLACEABLE] bad block table descriptor for flash lookup
++ * @bbt_md: [REPLACEABLE] bad block table mirror descriptor
++ * @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial bad block scan
++ * @controller: [OPTIONAL] a pointer to a hardware controller structure which is shared among multiple independend devices
++ * @priv: [OPTIONAL] pointer to private chip date
++ * @errstat: [OPTIONAL] hardware specific function to perform additional error status checks
++ * (determine if errors are correctable)
++ */
++
++struct nand_chip {
++ void __iomem *IO_ADDR_R;
++ void __iomem *IO_ADDR_W;
++
++ u_char (*read_byte)(struct mtd_info *mtd);
++ void (*write_byte)(struct mtd_info *mtd, u_char byte);
++ u16 (*read_word)(struct mtd_info *mtd);
++ void (*write_word)(struct mtd_info *mtd, u16 word);
++
++ void (*write_buf)(struct mtd_info *mtd, const u_char *buf, int len);
++ void (*read_buf)(struct mtd_info *mtd, u_char *buf, int len);
++ int (*verify_buf)(struct mtd_info *mtd, const u_char *buf, int len);
++ void (*select_chip)(struct mtd_info *mtd, int chip);
++ int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip);
++ int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
++ void (*hwcontrol)(struct mtd_info *mtd, int cmd);
++ int (*dev_ready)(struct mtd_info *mtd);
++ void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, int page_addr);
++ int (*waitfunc)(struct mtd_info *mtd, struct nand_chip *this, int state);
++ int (*calculate_ecc)(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code);
++ int (*correct_data)(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc);
++ void (*enable_hwecc)(struct mtd_info *mtd, int mode);
++ void (*erase_cmd)(struct mtd_info *mtd, int page);
++ int (*scan_bbt)(struct mtd_info *mtd);
++ int eccmode;
++ int eccsize;
++ int eccbytes;
++ int eccsteps;
++ int chip_delay;
++#if 0 /* no spinlocks or wait queues in boot loader */
++ spinlock_t chip_lock;
++ wait_queue_head_t wq;
++#endif
++ nand_state_t state;
++ int page_shift;
++ int phys_erase_shift;
++ int bbt_erase_shift;
++ int chip_shift;
++ u_char *data_buf;
++ u_char *oob_buf;
++ int oobdirty;
++ u_char *data_poi;
++ unsigned int options;
++ int badblockpos;
++ int numchips;
++ unsigned long chipsize;
++ int pagemask;
++ int pagebuf;
++ struct nand_oobinfo *autooob;
++ uint8_t *bbt;
++ struct nand_bbt_descr *bbt_td;
++ struct nand_bbt_descr *bbt_md;
++ struct nand_bbt_descr *badblock_pattern;
++ struct nand_hw_control *controller;
++ void *priv;
++ int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page);
++};
++
++/*
++ * NAND Flash Manufacturer ID Codes
++ */
++#define NAND_MFR_TOSHIBA 0x98
++#define NAND_MFR_SAMSUNG 0xec
++#define NAND_MFR_FUJITSU 0x04
++#define NAND_MFR_NATIONAL 0x8f
++#define NAND_MFR_RENESAS 0x07
++#define NAND_MFR_STMICRO 0x20
++#define NAND_MFR_HYNIX 0xad
++
++/**
++ * struct nand_flash_dev - NAND Flash Device ID Structure
++ *
++ * @name: Identify the device type
++ * @id: device ID code
++ * @pagesize: Pagesize in bytes. Either 256 or 512 or 0
++ * If the pagesize is 0, then the real pagesize
++ * and the eraseize are determined from the
++ * extended id bytes in the chip
++ * @erasesize: Size of an erase block in the flash device.
++ * @chipsize: Total chipsize in Mega Bytes
++ * @options: Bitfield to store chip relevant options
++ */
++struct nand_flash_dev {
++ char *name;
++ int id;
++ unsigned long pagesize;
++ unsigned long chipsize;
++ unsigned long erasesize;
++ unsigned long options;
++};
++
++/**
++ * struct nand_manufacturers - NAND Flash Manufacturer ID Structure
++ * @name: Manufacturer name
++ * @id: manufacturer ID code of device.
++*/
++struct nand_manufacturers {
++ int id;
++ char * name;
++};
++
++extern struct nand_flash_dev nand_flash_ids[];
++extern struct nand_manufacturers nand_manuf_ids[];
++
++/**
++ * struct nand_bbt_descr - bad block table descriptor
++ * @options: options for this descriptor
++ * @pages: the page(s) where we find the bbt, used with option BBT_ABSPAGE
++ * when bbt is searched, then we store the found bbts pages here.
++ * Its an array and supports up to 8 chips now
++ * @offs: offset of the pattern in the oob area of the page
++ * @veroffs: offset of the bbt version counter in the oob are of the page
++ * @version: version read from the bbt page during scan
++ * @len: length of the pattern, if 0 no pattern check is performed
++ * @maxblocks: maximum number of blocks to search for a bbt. This number of
++ * blocks is reserved at the end of the device where the tables are
++ * written.
++ * @reserved_block_code: if non-0, this pattern denotes a reserved (rather than
++ * bad) block in the stored bbt
++ * @pattern: pattern to identify bad block table or factory marked good /
++ * bad blocks, can be NULL, if len = 0
++ *
++ * Descriptor for the bad block table marker and the descriptor for the
++ * pattern which identifies good and bad blocks. The assumption is made
++ * that the pattern and the version count are always located in the oob area
++ * of the first block.
++ */
++struct nand_bbt_descr {
++ int options;
++ int pages[NAND_MAX_CHIPS];
++ int offs;
++ int veroffs;
++ uint8_t version[NAND_MAX_CHIPS];
++ int len;
++ int maxblocks;
++ int reserved_block_code;
++ uint8_t *pattern;
++};
++
++/* Options for the bad block table descriptors */
++
++/* The number of bits used per block in the bbt on the device */
++#define NAND_BBT_NRBITS_MSK 0x0000000F
++#define NAND_BBT_1BIT 0x00000001
++#define NAND_BBT_2BIT 0x00000002
++#define NAND_BBT_4BIT 0x00000004
++#define NAND_BBT_8BIT 0x00000008
++/* The bad block table is in the last good block of the device */
++#define NAND_BBT_LASTBLOCK 0x00000010
++/* The bbt is at the given page, else we must scan for the bbt */
++#define NAND_BBT_ABSPAGE 0x00000020
++/* The bbt is at the given page, else we must scan for the bbt */
++#define NAND_BBT_SEARCH 0x00000040
++/* bbt is stored per chip on multichip devices */
++#define NAND_BBT_PERCHIP 0x00000080
++/* bbt has a version counter at offset veroffs */
++#define NAND_BBT_VERSION 0x00000100
++/* Create a bbt if none axists */
++#define NAND_BBT_CREATE 0x00000200
++/* Search good / bad pattern through all pages of a block */
++#define NAND_BBT_SCANALLPAGES 0x00000400
++/* Scan block empty during good / bad block scan */
++#define NAND_BBT_SCANEMPTY 0x00000800
++/* Write bbt if neccecary */
++#define NAND_BBT_WRITE 0x00001000
++/* Read and write back block contents when writing bbt */
++#define NAND_BBT_SAVECONTENT 0x00002000
++/* Search good / bad pattern on the first and the second page */
++#define NAND_BBT_SCAN2NDPAGE 0x00004000
++
++/* The maximum number of blocks to scan for a bbt */
++#define NAND_BBT_SCAN_MAXBLOCKS 4
++
++extern int nand_scan_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd);
++extern int nand_update_bbt (struct mtd_info *mtd, loff_t offs);
++extern int nand_default_bbt (struct mtd_info *mtd);
++extern int nand_isbad_bbt (struct mtd_info *mtd, loff_t offs, int allowbbt);
++extern int nand_erase_nand (struct mtd_info *mtd, struct erase_info *instr, int allowbbt);
++extern int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
++ size_t * retlen, u_char * buf, u_char * oob_buf,
++ struct nand_oobinfo *oobsel, int flags);
++
++/*
++* Constants for oob configuration
++*/
++#define NAND_SMALL_BADBLOCK_POS 5
++#define NAND_LARGE_BADBLOCK_POS 0
++
++#endif /* __LINUX_MTD_NAND_H */
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand_base.c linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand_base.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand_base.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand_base.c 2006-11-10 09:55:58.000000000 +0100
+@@ -0,0 +1,2910 @@
++/*
++ * Snitched from drivers/mtd/nand_base.c
++ * Modified to run outside Linux.
++ * #if 0'd to remove non-essential functionality
++ *
++ * Overview:
++ * This is the generic MTD driver for NAND flash devices. It should be
++ * capable of working with almost all NAND chips currently available.
++ * Basic support for AG-AND chips is provided.
++ *
++ * Additional technical information is available on
++ * http://www.linux-mtd.infradead.org/tech/nand.html
++ *
++ * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
++ * 2002 Thomas Gleixner (tglx@linutronix.de)
++ *
++ * 02-08-2004 tglx: support for strange chips, which cannot auto increment
++ * pages on read / read_oob
++ *
++ * 03-17-2004 tglx: Check ready before auto increment check. Simon Bayes
++ * pointed this out, as he marked an auto increment capable chip
++ * as NOAUTOINCR in the board driver.
++ * Make reads over block boundaries work too
++ *
++ * 04-14-2004 tglx: first working version for 2k page size chips
++ *
++ * 05-19-2004 tglx: Basic support for Renesas AG-AND chips
++ *
++ * 09-24-2004 tglx: add support for hardware controllers (e.g. ECC) shared
++ * among multiple independend devices. Suggestions and initial patch
++ * from Ben Dooks <ben-mtd@fluff.org>
++ *
++ * 12-05-2004 dmarlin: add workaround for Renesas AG-AND chips "disturb" issue.
++ * Basically, any block not rewritten may lose data when surrounding blocks
++ * are rewritten many times. JFFS2 ensures this doesn't happen for blocks
++ * it uses, but the Bad Block Table(s) may not be rewritten. To ensure they
++ * do not lose data, force them to be rewritten when some of the surrounding
++ * blocks are erased. Rather than tracking a specific nearby block (which
++ * could itself go bad), use a page address 'mask' to select several blocks
++ * in the same area, and rewrite the BBT when any of them are erased.
++ *
++ * 01-03-2005 dmarlin: added support for the device recovery command sequence for Renesas
++ * AG-AND chips. If there was a sudden loss of power during an erase operation,
++ * a "device recovery" operation must be performed when power is restored
++ * to ensure correct operation.
++ *
++ * 01-20-2005 dmarlin: added support for optional hardware specific callback routine to
++ * perform extra error status checks on erase and write failures. This required
++ * adding a wrapper function for nand_read_ecc.
++ *
++ * 08-20-2005 vwool: suspend/resume added
++ *
++ * Credits:
++ * David Woodhouse for adding multichip support
++ *
++ * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
++ * rework for 2K page size chips
++ *
++ * TODO:
++ * Enable cached programming for 2k page size chips
++ * Check, if mtd->ecctype should be set to MTD_ECC_HW
++ * if we have HW ecc support.
++ * The AG-AND chips have nice features for speed improvement,
++ * which are not supported yet. Read / program 4 pages in one go.
++ *
++ * $Id: nand_base.c,v 1.11 2006/11/10 08:55:58 ricardw Exp $
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++#include <linux/types.h>
++#include <linux/delay.h>
++#include <linux/errno.h>
++#if 0
++#include <linux/sched.h>
++#include <linux/slab.h>
++#endif
++
++#include "mtd.h"
++#include "nand.h"
++#include "nand_ecc.h"
++
++#if 0
++#include <linux/mtd/compatmac.h>
++#include <linux/interrupt.h>
++#include <linux/bitops.h>
++#include <asm/io.h>
++#endif
++
++#ifdef CONFIG_MTD_PARTITIONS
++#include <linux/mtd/partitions.h>
++
++#endif
++
++#include "lib.h"
++
++#define GPIO_SYNC 0
++
++#undef DEBUG /* from mtd.h */
++#define DEBUG(n, args...) do { } while(0)
++
++#define D(x)
++
++/* Define default oob placement schemes for large and small page devices */
++static struct nand_oobinfo nand_oob_8 = {
++ .useecc = MTD_NANDECC_AUTOPLACE,
++ .eccbytes = 3,
++ .eccpos = {0, 1, 2},
++ .oobfree = { {3, 2}, {6, 2} }
++};
++
++static struct nand_oobinfo nand_oob_16 = {
++ .useecc = MTD_NANDECC_AUTOPLACE,
++ .eccbytes = 6,
++ .eccpos = {0, 1, 2, 3, 6, 7},
++ .oobfree = { {8, 8} }
++};
++
++static struct nand_oobinfo nand_oob_64 = {
++ .useecc = MTD_NANDECC_AUTOPLACE,
++ .eccbytes = 24,
++ .eccpos = {
++ 40, 41, 42, 43, 44, 45, 46, 47,
++ 48, 49, 50, 51, 52, 53, 54, 55,
++ 56, 57, 58, 59, 60, 61, 62, 63},
++ .oobfree = { {2, 38} }
++};
++
++/* This is used for padding purposes in nand_write_oob */
++#if NAND_WRITE_SUPPORT
++static u_char ffchars[] = {
++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
++};
++#endif
++
++/*
++ * NAND low-level MTD interface functions
++ */
++static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len);
++static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len);
++static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len);
++
++static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf);
++static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
++ size_t * retlen, u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel);
++static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf);
++static int nand_write (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf);
++static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
++ size_t * retlen, const u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel);
++static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char *buf);
++#if NAND_KVEC_SUPPORT
++static int nand_writev (struct mtd_info *mtd, const struct kvec *vecs,
++ unsigned long count, loff_t to, size_t * retlen);
++static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs,
++ unsigned long count, loff_t to, size_t * retlen, u_char *eccbuf, struct nand_oobinfo *oobsel);
++#endif
++static int nand_erase (struct mtd_info *mtd, struct erase_info *instr);
++static void nand_sync (struct mtd_info *mtd);
++
++/* Some internal functions */
++static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page, u_char *oob_buf,
++ struct nand_oobinfo *oobsel, int mode);
++#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
++static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int page, int numpages,
++ u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode);
++#else
++#define nand_verify_pages(...) (0)
++#endif
++
++static int nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state);
++
++/**
++ * nand_release_device - [GENERIC] release chip
++ * @mtd: MTD device structure
++ *
++ * Deselect, release chip lock and wake up anyone waiting on the device
++ */
++static void nand_release_device (struct mtd_info *mtd)
++{
++ struct nand_chip *this = mtd->priv;
++
++ /* De-select the NAND device */
++ this->select_chip(mtd, -1);
++#if 0
++
++ if (this->controller) {
++ /* Release the controller and the chip */
++ spin_lock(&this->controller->lock);
++ this->controller->active = NULL;
++ this->state = FL_READY;
++ wake_up(&this->controller->wq);
++ spin_unlock(&this->controller->lock);
++ } else {
++ /* Release the chip */
++ spin_lock(&this->chip_lock);
++ this->state = FL_READY;
++ wake_up(&this->wq);
++ spin_unlock(&this->chip_lock);
++ }
++#endif
++}
++
++/**
++ * nand_read_byte - [DEFAULT] read one byte from the chip
++ * @mtd: MTD device structure
++ *
++ * Default read function for 8bit buswith
++ */
++static u_char nand_read_byte(struct mtd_info *mtd)
++{
++ struct nand_chip *this = mtd->priv;
++ return readb(this->IO_ADDR_R);
++}
++
++/**
++ * nand_write_byte - [DEFAULT] write one byte to the chip
++ * @mtd: MTD device structure
++ * @byte: pointer to data byte to write
++ *
++ * Default write function for 8it buswith
++ */
++static void nand_write_byte(struct mtd_info *mtd, u_char byte)
++{
++ struct nand_chip *this = mtd->priv;
++ writeb(byte, this->IO_ADDR_W);
++
++#if GPIO_SYNC
++ /* Bus sync: Read from address we just wrote.
++ * This generates no signal to the NAND flash, since only chip
++ * select lines are pulled out to the chip, and read is not
++ * gated with chip select for the write area.
++ * Turns out this is (probably) the wrong way to do it; the
++ * right way is to set up suitable wait states in the kernel
++ * config (CONFIG_ETRAX_MEM_GRP3_CONFIG).
++ */
++ (void) readb(this->IO_ADDR_W); /* that's right, IO_ADDR_W */
++#endif
++}
++
++/**
++ * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
++ * @mtd: MTD device structure
++ *
++ * Default read function for 16bit buswith with
++ * endianess conversion
++ */
++static u_char nand_read_byte16(struct mtd_info *mtd)
++{
++ struct nand_chip *this = mtd->priv;
++ return (u_char) cpu_to_le16(readw(this->IO_ADDR_R));
++}
++
++/**
++ * nand_write_byte16 - [DEFAULT] write one byte endianess aware to the chip
++ * @mtd: MTD device structure
++ * @byte: pointer to data byte to write
++ *
++ * Default write function for 16bit buswith with
++ * endianess conversion
++ */
++static void nand_write_byte16(struct mtd_info *mtd, u_char byte)
++{
++ struct nand_chip *this = mtd->priv;
++ writew(le16_to_cpu((u16) byte), this->IO_ADDR_W);
++}
++
++/**
++ * nand_read_word - [DEFAULT] read one word from the chip
++ * @mtd: MTD device structure
++ *
++ * Default read function for 16bit buswith without
++ * endianess conversion
++ */
++static u16 nand_read_word(struct mtd_info *mtd)
++{
++ struct nand_chip *this = mtd->priv;
++ return readw(this->IO_ADDR_R);
++}
++
++/**
++ * nand_write_word - [DEFAULT] write one word to the chip
++ * @mtd: MTD device structure
++ * @word: data word to write
++ *
++ * Default write function for 16bit buswith without
++ * endianess conversion
++ */
++static void nand_write_word(struct mtd_info *mtd, u16 word)
++{
++ struct nand_chip *this = mtd->priv;
++ writew(word, this->IO_ADDR_W);
++}
++
++/**
++ * nand_select_chip - [DEFAULT] control CE line
++ * @mtd: MTD device structure
++ * @chip: chipnumber to select, -1 for deselect
++ *
++ * Default select function for 1 chip devices.
++ */
++static void nand_select_chip(struct mtd_info *mtd, int chip)
++{
++ struct nand_chip *this = mtd->priv;
++ switch(chip) {
++ case -1:
++ this->hwcontrol(mtd, NAND_CTL_CLRNCE);
++ break;
++ case 0:
++ this->hwcontrol(mtd, NAND_CTL_SETNCE);
++ break;
++
++ default:
++ BUG();
++ }
++}
++
++/**
++ * nand_write_buf - [DEFAULT] write buffer to chip
++ * @mtd: MTD device structure
++ * @buf: data buffer
++ * @len: number of bytes to write
++ *
++ * Default write function for 8bit buswith
++ */
++static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
++{
++ int i;
++ struct nand_chip *this = mtd->priv;
++
++ for (i=0; i<len; i++)
++ writeb(buf[i], this->IO_ADDR_W);
++}
++
++/**
++ * nand_read_buf - [DEFAULT] read chip data into buffer
++ * @mtd: MTD device structure
++ * @buf: buffer to store date
++ * @len: number of bytes to read
++ *
++ * Default read function for 8bit buswith
++ */
++static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
++{
++ int i;
++ struct nand_chip *this = mtd->priv;
++
++ for (i=0; i<len; i++)
++ buf[i] = readb(this->IO_ADDR_R);
++}
++
++/**
++ * nand_verify_buf - [DEFAULT] Verify chip data against buffer
++ * @mtd: MTD device structure
++ * @buf: buffer containing the data to compare
++ * @len: number of bytes to compare
++ *
++ * Default verify function for 8bit buswith
++ */
++static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
++{
++ int i;
++ struct nand_chip *this = mtd->priv;
++
++ for (i=0; i<len; i++)
++ if (buf[i] != readb(this->IO_ADDR_R))
++ return -EFAULT;
++
++ return 0;
++}
++
++/**
++ * nand_write_buf16 - [DEFAULT] write buffer to chip
++ * @mtd: MTD device structure
++ * @buf: data buffer
++ * @len: number of bytes to write
++ *
++ * Default write function for 16bit buswith
++ */
++static void nand_write_buf16(struct mtd_info *mtd, const u_char *buf, int len)
++{
++ int i;
++ struct nand_chip *this = mtd->priv;
++ u16 *p = (u16 *) buf;
++ len >>= 1;
++
++ for (i=0; i<len; i++)
++ writew(p[i], this->IO_ADDR_W);
++
++}
++
++/**
++ * nand_read_buf16 - [DEFAULT] read chip data into buffer
++ * @mtd: MTD device structure
++ * @buf: buffer to store date
++ * @len: number of bytes to read
++ *
++ * Default read function for 16bit buswith
++ */
++static void nand_read_buf16(struct mtd_info *mtd, u_char *buf, int len)
++{
++ int i;
++ struct nand_chip *this = mtd->priv;
++ u16 *p = (u16 *) buf;
++ len >>= 1;
++
++ for (i=0; i<len; i++)
++ p[i] = readw(this->IO_ADDR_R);
++}
++
++/**
++ * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
++ * @mtd: MTD device structure
++ * @buf: buffer containing the data to compare
++ * @len: number of bytes to compare
++ *
++ * Default verify function for 16bit buswith
++ */
++static int nand_verify_buf16(struct mtd_info *mtd, const u_char *buf, int len)
++{
++ int i;
++ struct nand_chip *this = mtd->priv;
++ u16 *p = (u16 *) buf;
++ len >>= 1;
++
++ for (i=0; i<len; i++)
++ if (p[i] != readw(this->IO_ADDR_R))
++ return -EFAULT;
++
++ return 0;
++}
++
++/**
++ * nand_block_bad - [DEFAULT] Read bad block marker from the chip
++ * @mtd: MTD device structure
++ * @ofs: offset from device start
++ * @getchip: 0, if the chip is already selected
++ *
++ * Check, if the block is bad.
++ */
++static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
++{
++ int page, chipnr, res = 0;
++ struct nand_chip *this = mtd->priv;
++ u16 bad;
++
++ if (getchip) {
++ page = (int)(ofs >> this->page_shift);
++ chipnr = (int)(ofs >> this->chip_shift);
++
++ /* Grab the lock and see if the device is available */
++ nand_get_device (this, mtd, FL_READING);
++
++ /* Select the NAND device */
++ this->select_chip(mtd, chipnr);
++ } else
++ page = (int) ofs;
++
++ if (this->options & NAND_BUSWIDTH_16) {
++ this->cmdfunc (mtd, NAND_CMD_READOOB, this->badblockpos & 0xFE, page & this->pagemask);
++ bad = cpu_to_le16(this->read_word(mtd));
++ if (this->badblockpos & 0x1)
++ bad >>= 8;
++ if ((bad & 0xFF) != 0xff)
++ res = 1;
++ } else {
++ this->cmdfunc (mtd, NAND_CMD_READOOB, this->badblockpos, page & this->pagemask);
++ if (this->read_byte(mtd) != 0xff)
++ res = 1;
++ }
++
++ if (getchip) {
++ /* Deselect and wake up anyone waiting on the device */
++ nand_release_device(mtd);
++ }
++
++ return res;
++}
++
++/**
++ * nand_default_block_markbad - [DEFAULT] mark a block bad
++ * @mtd: MTD device structure
++ * @ofs: offset from device start
++ *
++ * This is the default implementation, which can be overridden by
++ * a hardware specific driver.
++*/
++#if NAND_WRITE_SUPPORT
++static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
++{
++ struct nand_chip *this = mtd->priv;
++ u_char buf[2] = {0, 0};
++ size_t retlen;
++ int block;
++
++ /* Get block number */
++ block = ((int) ofs) >> this->bbt_erase_shift;
++ if (this->bbt)
++ this->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
++
++#if NAND_BBT_SUPPORT
++ /* Do we have a flash based bad block table ? */
++ if (this->options & NAND_USE_FLASH_BBT)
++ return nand_update_bbt (mtd, ofs);
++#endif
++
++ /* We write two bytes, so we dont have to mess with 16 bit access */
++ ofs += mtd->oobsize + (this->badblockpos & ~0x01);
++ return nand_write_oob (mtd, ofs , 2, &retlen, buf);
++}
++#endif
++
++/**
++ * nand_check_wp - [GENERIC] check if the chip is write protected
++ * @mtd: MTD device structure
++ * Check, if the device is write protected
++ *
++ * The function expects, that the device is already selected
++ */
++#if NAND_WRITE_SUPPORT
++static int nand_check_wp (struct mtd_info *mtd)
++{
++ struct nand_chip *this = mtd->priv;
++ /* Check the WP bit */
++ this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
++ return (this->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
++}
++#endif
++
++/**
++ * nand_block_checkbad - [GENERIC] Check if a block is marked bad
++ * @mtd: MTD device structure
++ * @ofs: offset from device start
++ * @getchip: 0, if the chip is already selected
++ * @allowbbt: 1, if its allowed to access the bbt area
++ *
++ * Check, if the block is bad. Either by reading the bad block table or
++ * calling of the scan function.
++ */
++static int nand_block_checkbad (struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
++{
++ struct nand_chip *this = mtd->priv;
++
++ if (!this->bbt)
++ return this->block_bad(mtd, ofs, getchip);
++
++#if NAND_BBT_SUPPORT
++ /* Return info from the table */
++ return nand_isbad_bbt (mtd, ofs, allowbbt);
++#endif
++ BUG(); /* should not happen */
++}
++
++/*
++ * Wait for the ready pin, after a command
++ * The timeout is catched later.
++ */
++static void nand_wait_ready(struct mtd_info *mtd)
++{
++ struct nand_chip *this = mtd->priv;
++#if 0
++ unsigned long timeo = jiffies + 2;
++#endif
++
++ /* wait until command is processed or timeout occures */
++ do {
++ if (this->dev_ready(mtd))
++ return;
++#if 0
++ touch_softlockup_watchdog();
++ } while (time_before(jiffies, timeo));
++#endif
++ } while (1);
++}
++
++/**
++ * nand_command - [DEFAULT] Send command to NAND device
++ * @mtd: MTD device structure
++ * @command: the command to be sent
++ * @column: the column address for this command, -1 if none
++ * @page_addr: the page address for this command, -1 if none
++ *
++ * Send command to NAND device. This function is used for small page
++ * devices (256/512 Bytes per page)
++ */
++static void nand_command (struct mtd_info *mtd, unsigned command, int column, int page_addr)
++{
++ register struct nand_chip *this = mtd->priv;
++
++ /* Begin command latch cycle */
++ this->hwcontrol(mtd, NAND_CTL_SETCLE);
++ /*
++ * Write out the command to the device.
++ */
++ if (command == NAND_CMD_SEQIN) {
++ int readcmd;
++
++ if (column >= mtd->oobblock) {
++ /* OOB area */
++ column -= mtd->oobblock;
++ readcmd = NAND_CMD_READOOB;
++ } else if (column < 256) {
++ /* First 256 bytes --> READ0 */
++ readcmd = NAND_CMD_READ0;
++ } else {
++ column -= 256;
++ readcmd = NAND_CMD_READ1;
++ }
++ this->write_byte(mtd, readcmd);
++ }
++ this->write_byte(mtd, command);
++
++ /* Set ALE and clear CLE to start address cycle */
++ this->hwcontrol(mtd, NAND_CTL_CLRCLE);
++
++ if (column != -1 || page_addr != -1) {
++ this->hwcontrol(mtd, NAND_CTL_SETALE);
++
++ /* Serially input address */
++ if (column != -1) {
++ /* Adjust columns for 16 bit buswidth */
++ if (this->options & NAND_BUSWIDTH_16)
++ column >>= 1;
++ this->write_byte(mtd, column);
++ }
++ if (page_addr != -1) {
++ this->write_byte(mtd, (unsigned char) (page_addr & 0xff));
++ this->write_byte(mtd, (unsigned char) ((page_addr >> 8) & 0xff));
++ /* One more address cycle for devices > 32MiB */
++ if (this->chipsize > (32 << 20))
++ this->write_byte(mtd, (unsigned char) ((page_addr >> 16) & 0x0f));
++ }
++ /* Latch in address */
++ this->hwcontrol(mtd, NAND_CTL_CLRALE);
++ }
++
++ /*
++ * program and erase have their own busy handlers
++ * status and sequential in needs no delay
++ */
++ switch (command) {
++
++ case NAND_CMD_PAGEPROG:
++ case NAND_CMD_ERASE1:
++ case NAND_CMD_ERASE2:
++ case NAND_CMD_SEQIN:
++ case NAND_CMD_STATUS:
++ return;
++
++ case NAND_CMD_RESET:
++ if (this->dev_ready)
++ break;
++ udelay(this->chip_delay);
++ this->hwcontrol(mtd, NAND_CTL_SETCLE);
++ this->write_byte(mtd, NAND_CMD_STATUS);
++ this->hwcontrol(mtd, NAND_CTL_CLRCLE);
++ while ( !(this->read_byte(mtd) & NAND_STATUS_READY));
++ return;
++
++ /* This applies to read commands */
++ default:
++ /*
++ * If we don't have access to the busy pin, we apply the given
++ * command delay
++ */
++ if (!this->dev_ready) {
++ udelay (this->chip_delay);
++ return;
++ }
++ }
++ /* Apply this short delay always to ensure that we do wait tWB in
++ * any case on any machine. */
++ ndelay (100);
++
++ nand_wait_ready(mtd);
++}
++
++/**
++ * nand_command_lp - [DEFAULT] Send command to NAND large page device
++ * @mtd: MTD device structure
++ * @command: the command to be sent
++ * @column: the column address for this command, -1 if none
++ * @page_addr: the page address for this command, -1 if none
++ *
++ * Send command to NAND device. This is the version for the new large page devices
++ * We dont have the seperate regions as we have in the small page devices.
++ * We must emulate NAND_CMD_READOOB to keep the code compatible.
++ *
++ */
++static void nand_command_lp (struct mtd_info *mtd, unsigned command, int column, int page_addr)
++{
++ register struct nand_chip *this = mtd->priv;
++
++ /* Emulate NAND_CMD_READOOB */
++ if (command == NAND_CMD_READOOB) {
++ column += mtd->oobblock;
++ command = NAND_CMD_READ0;
++ }
++
++
++ /* Begin command latch cycle */
++ this->hwcontrol(mtd, NAND_CTL_SETCLE);
++ /* Write out the command to the device. */
++ this->write_byte(mtd, (command & 0xff));
++ /* End command latch cycle */
++ this->hwcontrol(mtd, NAND_CTL_CLRCLE);
++
++ if (column != -1 || page_addr != -1) {
++ this->hwcontrol(mtd, NAND_CTL_SETALE);
++
++ /* Serially input address */
++ if (column != -1) {
++ /* Adjust columns for 16 bit buswidth */
++ if (this->options & NAND_BUSWIDTH_16)
++ column >>= 1;
++ this->write_byte(mtd, column & 0xff);
++ this->write_byte(mtd, column >> 8);
++ }
++ if (page_addr != -1) {
++ this->write_byte(mtd, (unsigned char) (page_addr & 0xff));
++ this->write_byte(mtd, (unsigned char) ((page_addr >> 8) & 0xff));
++ /* One more address cycle for devices > 128MiB */
++ if (this->chipsize > (128 << 20))
++ this->write_byte(mtd, (unsigned char) ((page_addr >> 16) & 0xff));
++ }
++ /* Latch in address */
++ this->hwcontrol(mtd, NAND_CTL_CLRALE);
++ }
++
++ /*
++ * program and erase have their own busy handlers
++ * status, sequential in, and deplete1 need no delay
++ */
++ switch (command) {
++
++ case NAND_CMD_CACHEDPROG:
++ case NAND_CMD_PAGEPROG:
++ case NAND_CMD_ERASE1:
++ case NAND_CMD_ERASE2:
++ case NAND_CMD_SEQIN:
++ case NAND_CMD_STATUS:
++ case NAND_CMD_DEPLETE1:
++ return;
++
++ /*
++ * read error status commands require only a short delay
++ */
++ case NAND_CMD_STATUS_ERROR:
++ case NAND_CMD_STATUS_ERROR0:
++ case NAND_CMD_STATUS_ERROR1:
++ case NAND_CMD_STATUS_ERROR2:
++ case NAND_CMD_STATUS_ERROR3:
++ udelay(this->chip_delay);
++ return;
++
++ case NAND_CMD_RESET:
++ if (this->dev_ready)
++ break;
++ udelay(this->chip_delay);
++ this->hwcontrol(mtd, NAND_CTL_SETCLE);
++ this->write_byte(mtd, NAND_CMD_STATUS);
++ this->hwcontrol(mtd, NAND_CTL_CLRCLE);
++ while ( !(this->read_byte(mtd) & NAND_STATUS_READY));
++ return;
++
++ case NAND_CMD_READ0:
++ /* Begin command latch cycle */
++ this->hwcontrol(mtd, NAND_CTL_SETCLE);
++ /* Write out the start read command */
++ this->write_byte(mtd, NAND_CMD_READSTART);
++ /* End command latch cycle */
++ this->hwcontrol(mtd, NAND_CTL_CLRCLE);
++ /* Fall through into ready check */
++
++ /* This applies to read commands */
++ default:
++ /*
++ * If we don't have access to the busy pin, we apply the given
++ * command delay
++ */
++ if (!this->dev_ready) {
++ udelay (this->chip_delay);
++ return;
++ }
++ }
++
++ /* Apply this short delay always to ensure that we do wait tWB in
++ * any case on any machine. */
++ ndelay (100);
++
++ nand_wait_ready(mtd);
++}
++
++/**
++ * nand_get_device - [GENERIC] Get chip for selected access
++ * @this: the nand chip descriptor
++ * @mtd: MTD device structure
++ * @new_state: the state which is requested
++ *
++ * Get the device and lock it for exclusive access
++ */
++static int nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state)
++{
++ this->state = new_state;
++ return 0;
++#if 0
++ struct nand_chip *active;
++ spinlock_t *lock;
++ wait_queue_head_t *wq;
++ DECLARE_WAITQUEUE (wait, current);
++
++ lock = (this->controller) ? &this->controller->lock : &this->chip_lock;
++ wq = (this->controller) ? &this->controller->wq : &this->wq;
++retry:
++ active = this;
++ spin_lock(lock);
++
++ /* Hardware controller shared among independend devices */
++ if (this->controller) {
++ if (this->controller->active)
++ active = this->controller->active;
++ else
++ this->controller->active = this;
++ }
++ if (active == this && this->state == FL_READY) {
++ this->state = new_state;
++ spin_unlock(lock);
++ return 0;
++ }
++ if (new_state == FL_PM_SUSPENDED) {
++ spin_unlock(lock);
++ return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
++ }
++ set_current_state(TASK_UNINTERRUPTIBLE);
++ add_wait_queue(wq, &wait);
++ spin_unlock(lock);
++ schedule();
++ remove_wait_queue(wq, &wait);
++ goto retry;
++#endif
++}
++
++/**
++ * nand_wait - [DEFAULT] wait until the command is done
++ * @mtd: MTD device structure
++ * @this: NAND chip structure
++ * @state: state to select the max. timeout value
++ *
++ * Wait for command done. This applies to erase and program only
++ * Erase can take up to 400ms and program up to 20ms according to
++ * general NAND and SmartMedia specs
++ *
++*/
++static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
++{
++
++#if 0
++ unsigned long timeo = jiffies;
++#endif
++ int status;
++
++#if 0
++ if (state == FL_ERASING)
++ timeo += (HZ * 400) / 1000;
++ else
++ timeo += (HZ * 20) / 1000;
++#endif
++
++ /* Apply this short delay always to ensure that we do wait tWB in
++ * any case on any machine. */
++ ndelay (100);
++
++ if ((state == FL_ERASING) && (this->options & NAND_IS_AND))
++ this->cmdfunc (mtd, NAND_CMD_STATUS_MULTI, -1, -1);
++ else
++ this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
++
++#if 0
++ while (time_before(jiffies, timeo)) {
++ /* Check, if we were interrupted */
++ if (this->state != state)
++ return 0;
++#endif
++ while (1) { /* wait indefinitely */
++
++ if (this->dev_ready) {
++ if (this->dev_ready(mtd))
++ break;
++ } else {
++ if (this->read_byte(mtd) & NAND_STATUS_READY)
++ break;
++ }
++
++#if 0
++ cond_resched();
++#endif
++ }
++ status = (int) this->read_byte(mtd);
++ return status;
++}
++
++/**
++ * nand_write_page - [GENERIC] write one page
++ * @mtd: MTD device structure
++ * @this: NAND chip structure
++ * @page: startpage inside the chip, must be called with (page & this->pagemask)
++ * @oob_buf: out of band data buffer
++ * @oobsel: out of band selecttion structre
++ * @cached: 1 = enable cached programming if supported by chip
++ *
++ * Nand_page_program function is used for write and writev !
++ * This function will always program a full page of data
++ * If you call it with a non page aligned buffer, you're lost :)
++ *
++ * Cached programming is not supported yet.
++ */
++#if NAND_WRITE_SUPPORT
++static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page,
++ u_char *oob_buf, struct nand_oobinfo *oobsel, int cached)
++{
++ int i, status;
++ u_char ecc_code[32];
++ int eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
++ int *oob_config = oobsel->eccpos;
++ int datidx = 0, eccidx = 0, eccsteps = this->eccsteps;
++ int eccbytes = 0;
++
++ /* FIXME: Enable cached programming */
++ cached = 0;
++
++ /* Send command to begin auto page programming */
++ this->cmdfunc (mtd, NAND_CMD_SEQIN, 0x00, page);
++
++ /* Write out complete page of data, take care of eccmode */
++ switch (eccmode) {
++ /* No ecc, write all */
++ case NAND_ECC_NONE:
++ puts ("Writing data without ECC to NAND-FLASH is not recommended\r\n");
++ this->write_buf(mtd, this->data_poi, mtd->oobblock);
++ break;
++
++ /* Software ecc 3/256, write all */
++ case NAND_ECC_SOFT:
++ for (; eccsteps; eccsteps--) {
++ this->calculate_ecc(mtd, &this->data_poi[datidx], ecc_code);
++ for (i = 0; i < 3; i++, eccidx++)
++ oob_buf[oob_config[eccidx]] = ecc_code[i];
++ datidx += this->eccsize;
++ }
++ this->write_buf(mtd, this->data_poi, mtd->oobblock);
++ break;
++ default:
++ eccbytes = this->eccbytes;
++ for (; eccsteps; eccsteps--) {
++ /* enable hardware ecc logic for write */
++ this->enable_hwecc(mtd, NAND_ECC_WRITE);
++ this->write_buf(mtd, &this->data_poi[datidx], this->eccsize);
++ this->calculate_ecc(mtd, &this->data_poi[datidx], ecc_code);
++ for (i = 0; i < eccbytes; i++, eccidx++)
++ oob_buf[oob_config[eccidx]] = ecc_code[i];
++ /* If the hardware ecc provides syndromes then
++ * the ecc code must be written immidiately after
++ * the data bytes (words) */
++ if (this->options & NAND_HWECC_SYNDROME)
++ this->write_buf(mtd, ecc_code, eccbytes);
++ datidx += this->eccsize;
++ }
++ break;
++ }
++
++ /* Write out OOB data */
++ if (this->options & NAND_HWECC_SYNDROME)
++ this->write_buf(mtd, &oob_buf[oobsel->eccbytes], mtd->oobsize - oobsel->eccbytes);
++ else
++ this->write_buf(mtd, oob_buf, mtd->oobsize);
++
++ /* Send command to actually program the data */
++ this->cmdfunc (mtd, cached ? NAND_CMD_CACHEDPROG : NAND_CMD_PAGEPROG, -1, -1);
++
++ if (!cached) {
++ /* call wait ready function */
++ status = this->waitfunc (mtd, this, FL_WRITING);
++
++ /* See if operation failed and additional status checks are available */
++ if ((status & NAND_STATUS_FAIL) && (this->errstat)) {
++ status = this->errstat(mtd, this, FL_WRITING, status, page);
++ }
++
++ /* See if device thinks it succeeded */
++ if (status & NAND_STATUS_FAIL) {
++ DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write, page 0x%08x, ", __FUNCTION__, page);
++ return -EIO;
++ }
++ } else {
++ /* FIXME: Implement cached programming ! */
++ /* wait until cache is ready*/
++ // status = this->waitfunc (mtd, this, FL_CACHEDRPG);
++ }
++ return 0;
++}
++#endif
++
++#if NAND_WRITE_SUPPORT
++#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
++/**
++ * nand_verify_pages - [GENERIC] verify the chip contents after a write
++ * @mtd: MTD device structure
++ * @this: NAND chip structure
++ * @page: startpage inside the chip, must be called with (page & this->pagemask)
++ * @numpages: number of pages to verify
++ * @oob_buf: out of band data buffer
++ * @oobsel: out of band selecttion structre
++ * @chipnr: number of the current chip
++ * @oobmode: 1 = full buffer verify, 0 = ecc only
++ *
++ * The NAND device assumes that it is always writing to a cleanly erased page.
++ * Hence, it performs its internal write verification only on bits that
++ * transitioned from 1 to 0. The device does NOT verify the whole page on a
++ * byte by byte basis. It is possible that the page was not completely erased
++ * or the page is becoming unusable due to wear. The read with ECC would catch
++ * the error later when the ECC page check fails, but we would rather catch
++ * it early in the page write stage. Better to write no data than invalid data.
++ */
++static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int page, int numpages,
++ u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode)
++{
++ int i, j, datidx = 0, oobofs = 0, res = -EIO;
++ int eccsteps = this->eccsteps;
++ int hweccbytes;
++ u_char oobdata[64];
++
++ hweccbytes = (this->options & NAND_HWECC_SYNDROME) ? (oobsel->eccbytes / eccsteps) : 0;
++
++ /* Send command to read back the first page */
++ this->cmdfunc (mtd, NAND_CMD_READ0, 0, page);
++
++ for(;;) {
++ for (j = 0; j < eccsteps; j++) {
++ /* Loop through and verify the data */
++ if (this->verify_buf(mtd, &this->data_poi[datidx], mtd->eccsize)) {
++ DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
++ goto out;
++ }
++ datidx += mtd->eccsize;
++ /* Have we a hw generator layout ? */
++ if (!hweccbytes)
++ continue;
++ if (this->verify_buf(mtd, &this->oob_buf[oobofs], hweccbytes)) {
++ DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
++ goto out;
++ }
++ oobofs += hweccbytes;
++ }
++
++ /* check, if we must compare all data or if we just have to
++ * compare the ecc bytes
++ */
++ if (oobmode) {
++ if (this->verify_buf(mtd, &oob_buf[oobofs], mtd->oobsize - hweccbytes * eccsteps)) {
++ DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
++ goto out;
++ }
++ } else {
++ /* Read always, else autoincrement fails */
++ this->read_buf(mtd, oobdata, mtd->oobsize - hweccbytes * eccsteps);
++
++ if (oobsel->useecc != MTD_NANDECC_OFF && !hweccbytes) {
++ int ecccnt = oobsel->eccbytes;
++
++ for (i = 0; i < ecccnt; i++) {
++ int idx = oobsel->eccpos[i];
++ if (oobdata[idx] != oob_buf[oobofs + idx] ) {
++ DEBUG (MTD_DEBUG_LEVEL0,
++ "%s: Failed ECC write "
++ "verify, page 0x%08x, " "%6i bytes were succesful\n", __FUNCTION__, page, i);
++ goto out;
++ }
++ }
++ }
++ }
++ oobofs += mtd->oobsize - hweccbytes * eccsteps;
++ page++;
++ numpages--;
++
++ /* Apply delay or wait for ready/busy pin
++ * Do this before the AUTOINCR check, so no problems
++ * arise if a chip which does auto increment
++ * is marked as NOAUTOINCR by the board driver.
++ * Do this also before returning, so the chip is
++ * ready for the next command.
++ */
++ if (!this->dev_ready)
++ udelay (this->chip_delay);
++ else
++ nand_wait_ready(mtd);
++
++ /* All done, return happy */
++ if (!numpages)
++ return 0;
++
++
++ /* Check, if the chip supports auto page increment */
++ if (!NAND_CANAUTOINCR(this))
++ this->cmdfunc (mtd, NAND_CMD_READ0, 0x00, page);
++ }
++ /*
++ * Terminate the read command. We come here in case of an error
++ * So we must issue a reset command.
++ */
++out:
++ this->cmdfunc (mtd, NAND_CMD_RESET, -1, -1);
++ return res;
++}
++#endif
++#endif
++
++/**
++ * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc
++ * @mtd: MTD device structure
++ * @from: offset to read from
++ * @len: number of bytes to read
++ * @retlen: pointer to variable to store the number of read bytes
++ * @buf: the databuffer to put data
++ *
++ * This function simply calls nand_do_read_ecc with oob buffer and oobsel = NULL
++ * and flags = 0xff
++ */
++static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf)
++{
++ return nand_do_read_ecc (mtd, from, len, retlen, buf, NULL, &mtd->oobinfo, 0xff);
++}
++
++
++/**
++ * nand_read_ecc - [MTD Interface] MTD compability function for nand_do_read_ecc
++ * @mtd: MTD device structure
++ * @from: offset to read from
++ * @len: number of bytes to read
++ * @retlen: pointer to variable to store the number of read bytes
++ * @buf: the databuffer to put data
++ * @oob_buf: filesystem supplied oob data buffer
++ * @oobsel: oob selection structure
++ *
++ * This function simply calls nand_do_read_ecc with flags = 0xff
++ */
++static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
++ size_t * retlen, u_char * buf, u_char * oob_buf, struct nand_oobinfo *oobsel)
++{
++ /* use userspace supplied oobinfo, if zero */
++ if (oobsel == NULL)
++ oobsel = &mtd->oobinfo;
++ return nand_do_read_ecc(mtd, from, len, retlen, buf, oob_buf, oobsel, 0xff);
++}
++
++
++/**
++ * nand_do_read_ecc - [MTD Interface] Read data with ECC
++ * @mtd: MTD device structure
++ * @from: offset to read from
++ * @len: number of bytes to read
++ * @retlen: pointer to variable to store the number of read bytes
++ * @buf: the databuffer to put data
++ * @oob_buf: filesystem supplied oob data buffer (can be NULL)
++ * @oobsel: oob selection structure
++ * @flags: flag to indicate if nand_get_device/nand_release_device should be preformed
++ * and how many corrected error bits are acceptable:
++ * bits 0..7 - number of tolerable errors
++ * bit 8 - 0 == do not get/release chip, 1 == get/release chip
++ *
++ * NAND read with ECC
++ */
++int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
++ size_t * retlen, u_char * buf, u_char * oob_buf,
++ struct nand_oobinfo *oobsel, int flags)
++{
++
++ int i, j, col, realpage, page, end, ecc, chipnr, sndcmd = 1;
++ int read = 0, oob = 0, ecc_status = 0, ecc_failed = 0;
++ struct nand_chip *this = mtd->priv;
++ u_char *data_poi, *oob_data = oob_buf;
++ u_char ecc_calc[32];
++ u_char ecc_code[32];
++ int eccmode, eccsteps;
++ int *oob_config, datidx;
++ int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
++ int eccbytes;
++ int compareecc = 1;
++ int oobreadlen;
++
++
++ DEBUG (MTD_DEBUG_LEVEL3, "nand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
++ D(
++ puts ("nand_read_ecc: from = ");
++ putx (from);
++ puts (", len = ");
++ putx(len);
++ putnl();
++ )
++
++ /* Do not allow reads past end of device */
++ if ((from + len) > mtd->size) {
++ DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: Attempt read beyond end of device\n");
++ D(puts("nand_read_ecc: Attempt read beyond end of device\r\n"));
++ *retlen = 0;
++ return -EINVAL;
++ }
++
++ /* Grab the lock and see if the device is available */
++ if (flags & NAND_GET_DEVICE)
++ nand_get_device (this, mtd, FL_READING);
++
++ /* Autoplace of oob data ? Use the default placement scheme */
++ if (oobsel->useecc == MTD_NANDECC_AUTOPLACE)
++ oobsel = this->autooob;
++
++ eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
++ oob_config = oobsel->eccpos;
++
++ /* Select the NAND device */
++ chipnr = (int)(from >> this->chip_shift);
++ this->select_chip(mtd, chipnr);
++
++ /* First we calculate the starting page */
++ realpage = (int) (from >> this->page_shift);
++ page = realpage & this->pagemask;
++
++ /* Get raw starting column */
++ col = from & (mtd->oobblock - 1);
++
++ end = mtd->oobblock;
++ ecc = this->eccsize;
++ eccbytes = this->eccbytes;
++
++ if ((eccmode == NAND_ECC_NONE) || (this->options & NAND_HWECC_SYNDROME))
++ compareecc = 0;
++
++ oobreadlen = mtd->oobsize;
++ if (this->options & NAND_HWECC_SYNDROME)
++ oobreadlen -= oobsel->eccbytes;
++
++ /* Loop until all data read */
++ while (read < len) {
++
++ int aligned = (!col && (len - read) >= end);
++ /*
++ * If the read is not page aligned, we have to read into data buffer
++ * due to ecc, else we read into return buffer direct
++ */
++ if (aligned)
++ data_poi = &buf[read];
++ else
++ data_poi = this->data_buf;
++
++ /* Check, if we have this page in the buffer
++ *
++ * FIXME: Make it work when we must provide oob data too,
++ * check the usage of data_buf oob field
++ */
++ if (realpage == this->pagebuf && !oob_buf) {
++ /* aligned read ? */
++ if (aligned)
++ memcpy (data_poi, this->data_buf, end);
++ goto readdata;
++ }
++
++ /* Check, if we must send the read command */
++ if (sndcmd) {
++ this->cmdfunc (mtd, NAND_CMD_READ0, 0x00, page);
++ sndcmd = 0;
++ }
++
++ /* get oob area, if we have no oob buffer from fs-driver */
++ if (!oob_buf || oobsel->useecc == MTD_NANDECC_AUTOPLACE ||
++ oobsel->useecc == MTD_NANDECC_AUTOPL_USR)
++ oob_data = &this->data_buf[end];
++
++ eccsteps = this->eccsteps;
++
++ switch (eccmode) {
++ case NAND_ECC_NONE: { /* No ECC, Read in a page */
++#if 0
++ static unsigned long lastwhinge = 0;
++ if ((lastwhinge / HZ) != (jiffies / HZ)) {
++ puts ("Reading data from NAND FLASH without ECC is not recommended\r\n");
++ lastwhinge = jiffies;
++ }
++#endif
++ this->read_buf(mtd, data_poi, end);
++ break;
++ }
++
++ case NAND_ECC_SOFT: /* Software ECC 3/256: Read in a page + oob data */
++ this->read_buf(mtd, data_poi, end);
++ for (i = 0, datidx = 0; eccsteps; eccsteps--, i+=3, datidx += ecc)
++ this->calculate_ecc(mtd, &data_poi[datidx], &ecc_calc[i]);
++ break;
++
++ default:
++#if NAND_HWECC_SUPPORT
++ for (i = 0, datidx = 0; eccsteps; eccsteps--, i+=eccbytes, datidx += ecc) {
++ this->enable_hwecc(mtd, NAND_ECC_READ);
++ this->read_buf(mtd, &data_poi[datidx], ecc);
++
++ /* HW ecc with syndrome calculation must read the
++ * syndrome from flash immidiately after the data */
++ if (!compareecc) {
++ /* Some hw ecc generators need to know when the
++ * syndrome is read from flash */
++ this->enable_hwecc(mtd, NAND_ECC_READSYN);
++ this->read_buf(mtd, &oob_data[i], eccbytes);
++ /* We calc error correction directly, it checks the hw
++ * generator for an error, reads back the syndrome and
++ * does the error correction on the fly */
++ ecc_status = this->correct_data(mtd, &data_poi[datidx], &oob_data[i], &ecc_code[i]);
++ if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) {
++ DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: "
++ "Failed ECC read, page 0x%08x on chip %d\n", page, chipnr);
++ ecc_failed++;
++ }
++ } else {
++ this->calculate_ecc(mtd, &data_poi[datidx], &ecc_calc[i]);
++ }
++ }
++#endif
++ break;
++ }
++
++ /* read oobdata */
++ this->read_buf(mtd, &oob_data[mtd->oobsize - oobreadlen], oobreadlen);
++
++ /* Skip ECC check, if not requested (ECC_NONE or HW_ECC with syndromes) */
++ if (!compareecc)
++ goto readoob;
++
++ /* Pick the ECC bytes out of the oob data */
++ for (j = 0; j < oobsel->eccbytes; j++)
++ ecc_code[j] = oob_data[oob_config[j]];
++
++ /* correct data, if neccecary */
++ for (i = 0, j = 0, datidx = 0; i < this->eccsteps; i++, datidx += ecc) {
++ ecc_status = this->correct_data(mtd, &data_poi[datidx], &ecc_code[j], &ecc_calc[j]);
++
++ /* Get next chunk of ecc bytes */
++ j += eccbytes;
++
++ /* Check, if we have a fs supplied oob-buffer,
++ * This is the legacy mode. Used by YAFFS1
++ * Should go away some day
++ */
++ if (oob_buf && oobsel->useecc == MTD_NANDECC_PLACE) {
++ int *p = (int *)(&oob_data[mtd->oobsize]);
++ p[i] = ecc_status;
++ }
++
++ if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) {
++ DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page);
++ D(
++ puts ("nand_read_ecc: " "Failed ECC read, page ");
++ putx (page);
++ putnl();
++ )
++ ecc_failed++;
++ }
++ }
++
++ readoob:
++ /* check, if we have a fs supplied oob-buffer */
++ if (oob_buf) {
++ /* without autoplace. Legacy mode used by YAFFS1 */
++ switch(oobsel->useecc) {
++ case MTD_NANDECC_AUTOPLACE:
++ case MTD_NANDECC_AUTOPL_USR:
++ /* Walk through the autoplace chunks */
++ for (i = 0; oobsel->oobfree[i][1]; i++) {
++ int from = oobsel->oobfree[i][0];
++ int num = oobsel->oobfree[i][1];
++ memcpy(&oob_buf[oob], &oob_data[from], num);
++ oob += num;
++ }
++ break;
++ case MTD_NANDECC_PLACE:
++ /* YAFFS1 legacy mode */
++ oob_data += this->eccsteps * sizeof (int);
++ default:
++ oob_data += mtd->oobsize;
++ }
++ }
++ readdata:
++ /* Partial page read, transfer data into fs buffer */
++ if (!aligned) {
++ for (j = col; j < end && read < len; j++)
++ buf[read++] = data_poi[j];
++ this->pagebuf = realpage;
++ } else
++ read += mtd->oobblock;
++
++ /* Apply delay or wait for ready/busy pin
++ * Do this before the AUTOINCR check, so no problems
++ * arise if a chip which does auto increment
++ * is marked as NOAUTOINCR by the board driver.
++ */
++ if (!this->dev_ready)
++ udelay (this->chip_delay);
++ else
++ nand_wait_ready(mtd);
++
++ if (read == len)
++ break;
++
++ /* For subsequent reads align to page boundary. */
++ col = 0;
++ /* Increment page address */
++ realpage++;
++
++ page = realpage & this->pagemask;
++ /* Check, if we cross a chip boundary */
++ if (!page) {
++ chipnr++;
++ this->select_chip(mtd, -1);
++ this->select_chip(mtd, chipnr);
++ }
++ /* Check, if the chip supports auto page increment
++ * or if we have hit a block boundary.
++ */
++ if (!NAND_CANAUTOINCR(this) || !(page & blockcheck))
++ sndcmd = 1;
++ }
++
++ /* Deselect and wake up anyone waiting on the device */
++ if (flags & NAND_GET_DEVICE)
++ nand_release_device(mtd);
++
++ /*
++ * Return success, if no ECC failures, else -EBADMSG
++ * fs driver will take care of that, because
++ * retlen == desired len and result == -EBADMSG
++ */
++ *retlen = read;
++ return ecc_failed ? -EBADMSG : 0;
++}
++
++/**
++ * nand_read_oob - [MTD Interface] NAND read out-of-band
++ * @mtd: MTD device structure
++ * @from: offset to read from
++ * @len: number of bytes to read
++ * @retlen: pointer to variable to store the number of read bytes
++ * @buf: the databuffer to put data
++ *
++ * NAND read out-of-band data from the spare area
++ */
++static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf)
++{
++ int i, col, page, chipnr;
++ struct nand_chip *this = mtd->priv;
++ int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
++
++ DEBUG (MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
++
++ /* Shift to get page */
++ page = (int)(from >> this->page_shift);
++ chipnr = (int)(from >> this->chip_shift);
++
++ /* Mask to get column */
++ col = from & (mtd->oobsize - 1);
++
++ /* Initialize return length value */
++ *retlen = 0;
++
++ /* Do not allow reads past end of device */
++ if ((from + len) > mtd->size) {
++ DEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: Attempt read beyond end of device\n");
++ *retlen = 0;
++ return -EINVAL;
++ }
++
++ /* Grab the lock and see if the device is available */
++ nand_get_device (this, mtd , FL_READING);
++
++ /* Select the NAND device */
++ this->select_chip(mtd, chipnr);
++
++ /* Send the read command */
++ this->cmdfunc (mtd, NAND_CMD_READOOB, col, page & this->pagemask);
++ /*
++ * Read the data, if we read more than one page
++ * oob data, let the device transfer the data !
++ */
++ i = 0;
++ while (i < len) {
++ int thislen = mtd->oobsize - col;
++ thislen = min_t(int, thislen, len);
++ this->read_buf(mtd, &buf[i], thislen);
++ i += thislen;
++
++ /* Read more ? */
++ if (i < len) {
++ page++;
++ col = 0;
++
++ /* Check, if we cross a chip boundary */
++ if (!(page & this->pagemask)) {
++ chipnr++;
++ this->select_chip(mtd, -1);
++ this->select_chip(mtd, chipnr);
++ }
++
++ /* Apply delay or wait for ready/busy pin
++ * Do this before the AUTOINCR check, so no problems
++ * arise if a chip which does auto increment
++ * is marked as NOAUTOINCR by the board driver.
++ */
++ if (!this->dev_ready)
++ udelay (this->chip_delay);
++ else
++ nand_wait_ready(mtd);
++
++ /* Check, if the chip supports auto page increment
++ * or if we have hit a block boundary.
++ */
++ if (!NAND_CANAUTOINCR(this) || !(page & blockcheck)) {
++ /* For subsequent page reads set offset to 0 */
++ this->cmdfunc (mtd, NAND_CMD_READOOB, 0x0, page & this->pagemask);
++ }
++ }
++ }
++
++ /* Deselect and wake up anyone waiting on the device */
++ nand_release_device(mtd);
++
++ /* Return happy */
++ *retlen = len;
++ return 0;
++}
++
++/**
++ * nand_read_raw - [GENERIC] Read raw data including oob into buffer
++ * @mtd: MTD device structure
++ * @buf: temporary buffer
++ * @from: offset to read from
++ * @len: number of bytes to read
++ * @ooblen: number of oob data bytes to read
++ *
++ * Read raw data including oob into buffer
++ */
++int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len, size_t ooblen)
++{
++ struct nand_chip *this = mtd->priv;
++ int page = (int) (from >> this->page_shift);
++ int chip = (int) (from >> this->chip_shift);
++ int sndcmd = 1;
++ int cnt = 0;
++ int pagesize = mtd->oobblock + mtd->oobsize;
++ int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
++
++ /* Do not allow reads past end of device */
++ if ((from + len) > mtd->size) {
++ DEBUG (MTD_DEBUG_LEVEL0, "nand_read_raw: Attempt read beyond end of device\n");
++ return -EINVAL;
++ }
++
++ /* Grab the lock and see if the device is available */
++ nand_get_device (this, mtd , FL_READING);
++
++ this->select_chip (mtd, chip);
++
++ /* Add requested oob length */
++ len += ooblen;
++
++ while (len) {
++ if (sndcmd)
++ this->cmdfunc (mtd, NAND_CMD_READ0, 0, page & this->pagemask);
++ sndcmd = 0;
++
++ this->read_buf (mtd, &buf[cnt], pagesize);
++
++ len -= pagesize;
++ cnt += pagesize;
++ page++;
++
++ if (!this->dev_ready)
++ udelay (this->chip_delay);
++ else
++ nand_wait_ready(mtd);
++
++ /* Check, if the chip supports auto page increment */
++ if (!NAND_CANAUTOINCR(this) || !(page & blockcheck))
++ sndcmd = 1;
++ }
++
++ /* Deselect and wake up anyone waiting on the device */
++ nand_release_device(mtd);
++ return 0;
++}
++
++
++/**
++ * nand_prepare_oobbuf - [GENERIC] Prepare the out of band buffer
++ * @mtd: MTD device structure
++ * @fsbuf: buffer given by fs driver
++ * @oobsel: out of band selection structre
++ * @autoplace: 1 = place given buffer into the oob bytes
++ * @numpages: number of pages to prepare
++ *
++ * Return:
++ * 1. Filesystem buffer available and autoplacement is off,
++ * return filesystem buffer
++ * 2. No filesystem buffer or autoplace is off, return internal
++ * buffer
++ * 3. Filesystem buffer is given and autoplace selected
++ * put data from fs buffer into internal buffer and
++ * retrun internal buffer
++ *
++ * Note: The internal buffer is filled with 0xff. This must
++ * be done only once, when no autoplacement happens
++ * Autoplacement sets the buffer dirty flag, which
++ * forces the 0xff fill before using the buffer again.
++ *
++*/
++#if NAND_WRITE_SUPPORT
++static u_char * nand_prepare_oobbuf (struct mtd_info *mtd, u_char *fsbuf, struct nand_oobinfo *oobsel,
++ int autoplace, int numpages)
++{
++ struct nand_chip *this = mtd->priv;
++ int i, len, ofs;
++
++ /* Zero copy fs supplied buffer */
++ if (fsbuf && !autoplace)
++ return fsbuf;
++
++ /* Check, if the buffer must be filled with ff again */
++ if (this->oobdirty) {
++ memset (this->oob_buf, 0xff,
++ mtd->oobsize << (this->phys_erase_shift - this->page_shift));
++ this->oobdirty = 0;
++ }
++
++ /* If we have no autoplacement or no fs buffer use the internal one */
++ if (!autoplace || !fsbuf)
++ return this->oob_buf;
++
++ /* Walk through the pages and place the data */
++ this->oobdirty = 1;
++ ofs = 0;
++ while (numpages--) {
++ for (i = 0, len = 0; len < mtd->oobavail; i++) {
++ int to = ofs + oobsel->oobfree[i][0];
++ int num = oobsel->oobfree[i][1];
++ memcpy (&this->oob_buf[to], fsbuf, num);
++ len += num;
++ fsbuf += num;
++ }
++ ofs += mtd->oobavail;
++ }
++ return this->oob_buf;
++}
++#endif
++
++#define NOTALIGNED(x) (x & (mtd->oobblock-1)) != 0
++
++/**
++ * nand_write - [MTD Interface] compability function for nand_write_ecc
++ * @mtd: MTD device structure
++ * @to: offset to write to
++ * @len: number of bytes to write
++ * @retlen: pointer to variable to store the number of written bytes
++ * @buf: the data to write
++ *
++ * This function simply calls nand_write_ecc with oob buffer and oobsel = NULL
++ *
++*/
++#if NAND_WRITE_SUPPORT
++static int nand_write (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf)
++{
++ return (nand_write_ecc (mtd, to, len, retlen, buf, NULL, NULL));
++}
++#endif
++
++/**
++ * nand_write_ecc - [MTD Interface] NAND write with ECC
++ * @mtd: MTD device structure
++ * @to: offset to write to
++ * @len: number of bytes to write
++ * @retlen: pointer to variable to store the number of written bytes
++ * @buf: the data to write
++ * @eccbuf: filesystem supplied oob data buffer
++ * @oobsel: oob selection structure
++ *
++ * NAND write with ECC
++ */
++#if NAND_WRITE_SUPPORT
++static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
++ size_t * retlen, const u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel)
++{
++ int startpage, page, ret = -EIO, oob = 0, written = 0, chipnr;
++ int autoplace = 0, numpages, totalpages;
++ struct nand_chip *this = mtd->priv;
++ u_char *oobbuf, *bufstart;
++ int ppblock = (1 << (this->phys_erase_shift - this->page_shift));
++
++ DEBUG (MTD_DEBUG_LEVEL3, "nand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
++
++ /* Initialize retlen, in case of early exit */
++ *retlen = 0;
++
++ /* Do not allow write past end of device */
++ if ((to + len) > mtd->size) {
++ DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: Attempt to write past end of page\n");
++ return -EINVAL;
++ }
++
++ /* reject writes, which are not page aligned */
++ if (NOTALIGNED (to) || NOTALIGNED(len)) {
++ puts ("nand_write_ecc: Attempt to write not page aligned data\r\n");
++ return -EINVAL;
++ }
++
++ /* Grab the lock and see if the device is available */
++ nand_get_device (this, mtd, FL_WRITING);
++
++ /* Calculate chipnr */
++ chipnr = (int)(to >> this->chip_shift);
++ /* Select the NAND device */
++ this->select_chip(mtd, chipnr);
++
++ /* Check, if it is write protected */
++ if (nand_check_wp(mtd))
++ goto out;
++
++ /* if oobsel is NULL, use chip defaults */
++ if (oobsel == NULL)
++ oobsel = &mtd->oobinfo;
++
++ /* Autoplace of oob data ? Use the default placement scheme */
++ if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) {
++ oobsel = this->autooob;
++ autoplace = 1;
++ }
++ if (oobsel->useecc == MTD_NANDECC_AUTOPL_USR)
++ autoplace = 1;
++
++ /* Setup variables and oob buffer */
++ totalpages = len >> this->page_shift;
++ page = (int) (to >> this->page_shift);
++ /* Invalidate the page cache, if we write to the cached page */
++ if (page <= this->pagebuf && this->pagebuf < (page + totalpages))
++ this->pagebuf = -1;
++
++ /* Set it relative to chip */
++ page &= this->pagemask;
++ startpage = page;
++ /* Calc number of pages we can write in one go */
++ numpages = min (ppblock - (startpage & (ppblock - 1)), totalpages);
++ oobbuf = nand_prepare_oobbuf (mtd, eccbuf, oobsel, autoplace, numpages);
++ bufstart = (u_char *)buf;
++
++ /* Loop until all data is written */
++ while (written < len) {
++
++ this->data_poi = (u_char*) &buf[written];
++ /* Write one page. If this is the last page to write
++ * or the last page in this block, then use the
++ * real pageprogram command, else select cached programming
++ * if supported by the chip.
++ */
++ ret = nand_write_page (mtd, this, page, &oobbuf[oob], oobsel, (--numpages > 0));
++ if (ret) {
++ DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: write_page failed %d\n", ret);
++ goto out;
++ }
++ /* Next oob page */
++ oob += mtd->oobsize;
++ /* Update written bytes count */
++ written += mtd->oobblock;
++ if (written == len)
++ goto cmp;
++
++ /* Increment page address */
++ page++;
++
++ /* Have we hit a block boundary ? Then we have to verify and
++ * if verify is ok, we have to setup the oob buffer for
++ * the next pages.
++ */
++ if (!(page & (ppblock - 1))){
++ int ofs;
++ this->data_poi = bufstart;
++ ret = nand_verify_pages (mtd, this, startpage,
++ page - startpage,
++ oobbuf, oobsel, chipnr, (eccbuf != NULL));
++ if (ret) {
++ DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret);
++ goto out;
++ }
++ *retlen = written;
++
++ ofs = autoplace ? mtd->oobavail : mtd->oobsize;
++ if (eccbuf)
++ eccbuf += (page - startpage) * ofs;
++ totalpages -= page - startpage;
++ numpages = min (totalpages, ppblock);
++ page &= this->pagemask;
++ startpage = page;
++ oobbuf = nand_prepare_oobbuf (mtd, eccbuf, oobsel,
++ autoplace, numpages);
++ oob = 0;
++ /* Check, if we cross a chip boundary */
++ if (!page) {
++ chipnr++;
++ this->select_chip(mtd, -1);
++ this->select_chip(mtd, chipnr);
++ }
++ }
++ }
++ /* Verify the remaining pages */
++cmp:
++ this->data_poi = bufstart;
++ ret = nand_verify_pages (mtd, this, startpage, totalpages,
++ oobbuf, oobsel, chipnr, (eccbuf != NULL));
++ if (!ret)
++ *retlen = written;
++ else
++ DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret);
++
++out:
++ /* Deselect and wake up anyone waiting on the device */
++ nand_release_device(mtd);
++
++ return ret;
++}
++#endif
++
++
++/**
++ * nand_write_oob - [MTD Interface] NAND write out-of-band
++ * @mtd: MTD device structure
++ * @to: offset to write to
++ * @len: number of bytes to write
++ * @retlen: pointer to variable to store the number of written bytes
++ * @buf: the data to write
++ *
++ * NAND write out-of-band
++ */
++#if NAND_WRITE_SUPPORT
++static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf)
++{
++ int column, page, status, ret = -EIO, chipnr;
++ struct nand_chip *this = mtd->priv;
++
++ DEBUG (MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
++
++ /* Shift to get page */
++ page = (int) (to >> this->page_shift);
++ chipnr = (int) (to >> this->chip_shift);
++
++ /* Mask to get column */
++ column = to & (mtd->oobsize - 1);
++
++ /* Initialize return length value */
++ *retlen = 0;
++
++ /* Do not allow write past end of page */
++ if ((column + len) > mtd->oobsize) {
++ DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: Attempt to write past end of page\n");
++ return -EINVAL;
++ }
++
++ /* Grab the lock and see if the device is available */
++ nand_get_device (this, mtd, FL_WRITING);
++
++ /* Select the NAND device */
++ this->select_chip(mtd, chipnr);
++
++ /* Reset the chip. Some chips (like the Toshiba TC5832DC found
++ in one of my DiskOnChip 2000 test units) will clear the whole
++ data page too if we don't do this. I have no clue why, but
++ I seem to have 'fixed' it in the doc2000 driver in
++ August 1999. dwmw2. */
++ this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
++
++ /* Check, if it is write protected */
++ if (nand_check_wp(mtd))
++ goto out;
++
++ /* Invalidate the page cache, if we write to the cached page */
++ if (page == this->pagebuf)
++ this->pagebuf = -1;
++
++ if (NAND_MUST_PAD(this)) {
++ /* Write out desired data */
++ this->cmdfunc (mtd, NAND_CMD_SEQIN, mtd->oobblock, page & this->pagemask);
++ /* prepad 0xff for partial programming */
++ this->write_buf(mtd, ffchars, column);
++ /* write data */
++ this->write_buf(mtd, buf, len);
++ /* postpad 0xff for partial programming */
++ this->write_buf(mtd, ffchars, mtd->oobsize - (len+column));
++ } else {
++ /* Write out desired data */
++ this->cmdfunc (mtd, NAND_CMD_SEQIN, mtd->oobblock + column, page & this->pagemask);
++ /* write data */
++ this->write_buf(mtd, buf, len);
++ }
++ /* Send command to program the OOB data */
++ this->cmdfunc (mtd, NAND_CMD_PAGEPROG, -1, -1);
++
++ status = this->waitfunc (mtd, this, FL_WRITING);
++
++ /* See if device thinks it succeeded */
++ if (status & NAND_STATUS_FAIL) {
++ DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write, page 0x%08x\n", page);
++ ret = -EIO;
++ goto out;
++ }
++ /* Return happy */
++ *retlen = len;
++
++#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
++ /* Send command to read back the data */
++ this->cmdfunc (mtd, NAND_CMD_READOOB, column, page & this->pagemask);
++
++ if (this->verify_buf(mtd, buf, len)) {
++ DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write verify, page 0x%08x\n", page);
++ ret = -EIO;
++ goto out;
++ }
++#endif
++ ret = 0;
++out:
++ /* Deselect and wake up anyone waiting on the device */
++ nand_release_device(mtd);
++
++ return ret;
++}
++#endif
++
++
++/**
++ * nand_writev - [MTD Interface] compabilty function for nand_writev_ecc
++ * @mtd: MTD device structure
++ * @vecs: the iovectors to write
++ * @count: number of vectors
++ * @to: offset to write to
++ * @retlen: pointer to variable to store the number of written bytes
++ *
++ * NAND write with kvec. This just calls the ecc function
++ */
++#if NAND_KVEC_SUPPORT
++#if NAND_WRITE_SUPPORT
++static int nand_writev (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count,
++ loff_t to, size_t * retlen)
++{
++ return (nand_writev_ecc (mtd, vecs, count, to, retlen, NULL, NULL));
++}
++#endif
++#endif
++
++/**
++ * nand_writev_ecc - [MTD Interface] write with iovec with ecc
++ * @mtd: MTD device structure
++ * @vecs: the iovectors to write
++ * @count: number of vectors
++ * @to: offset to write to
++ * @retlen: pointer to variable to store the number of written bytes
++ * @eccbuf: filesystem supplied oob data buffer
++ * @oobsel: oob selection structure
++ *
++ * NAND write with iovec with ecc
++ */
++#if NAND_KVEC_SUPPORT
++#if NAND_WRITE_SUPPORT
++static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count,
++ loff_t to, size_t * retlen, u_char *eccbuf, struct nand_oobinfo *oobsel)
++{
++ int i, page, len, total_len, ret = -EIO, written = 0, chipnr;
++ int oob, numpages, autoplace = 0, startpage;
++ struct nand_chip *this = mtd->priv;
++ int ppblock = (1 << (this->phys_erase_shift - this->page_shift));
++ u_char *oobbuf, *bufstart;
++
++ /* Preset written len for early exit */
++ *retlen = 0;
++
++ /* Calculate total length of data */
++ total_len = 0;
++ for (i = 0; i < count; i++)
++ total_len += (int) vecs[i].iov_len;
++
++ DEBUG (MTD_DEBUG_LEVEL3,
++ "nand_writev: to = 0x%08x, len = %i, count = %ld\n", (unsigned int) to, (unsigned int) total_len, count);
++
++ /* Do not allow write past end of page */
++ if ((to + total_len) > mtd->size) {
++ DEBUG (MTD_DEBUG_LEVEL0, "nand_writev: Attempted write past end of device\n");
++ return -EINVAL;
++ }
++
++ /* reject writes, which are not page aligned */
++ if (NOTALIGNED (to) || NOTALIGNED(total_len)) {
++ puts ("nand_write_ecc: Attempt to write not page aligned data\r\n");
++ return -EINVAL;
++ }
++
++ /* Grab the lock and see if the device is available */
++ nand_get_device (this, mtd, FL_WRITING);
++
++ /* Get the current chip-nr */
++ chipnr = (int) (to >> this->chip_shift);
++ /* Select the NAND device */
++ this->select_chip(mtd, chipnr);
++
++ /* Check, if it is write protected */
++ if (nand_check_wp(mtd))
++ goto out;
++
++ /* if oobsel is NULL, use chip defaults */
++ if (oobsel == NULL)
++ oobsel = &mtd->oobinfo;
++
++ /* Autoplace of oob data ? Use the default placement scheme */
++ if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) {
++ oobsel = this->autooob;
++ autoplace = 1;
++ }
++ if (oobsel->useecc == MTD_NANDECC_AUTOPL_USR)
++ autoplace = 1;
++
++ /* Setup start page */
++ page = (int) (to >> this->page_shift);
++ /* Invalidate the page cache, if we write to the cached page */
++ if (page <= this->pagebuf && this->pagebuf < ((to + total_len) >> this->page_shift))
++ this->pagebuf = -1;
++
++ startpage = page & this->pagemask;
++
++ /* Loop until all kvec' data has been written */
++ len = 0;
++ while (count) {
++ /* If the given tuple is >= pagesize then
++ * write it out from the iov
++ */
++ if ((vecs->iov_len - len) >= mtd->oobblock) {
++ /* Calc number of pages we can write
++ * out of this iov in one go */
++ numpages = (vecs->iov_len - len) >> this->page_shift;
++ /* Do not cross block boundaries */
++ numpages = min (ppblock - (startpage & (ppblock - 1)), numpages);
++ oobbuf = nand_prepare_oobbuf (mtd, NULL, oobsel, autoplace, numpages);
++ bufstart = (u_char *)vecs->iov_base;
++ bufstart += len;
++ this->data_poi = bufstart;
++ oob = 0;
++ for (i = 1; i <= numpages; i++) {
++ /* Write one page. If this is the last page to write
++ * then use the real pageprogram command, else select
++ * cached programming if supported by the chip.
++ */
++ ret = nand_write_page (mtd, this, page & this->pagemask,
++ &oobbuf[oob], oobsel, i != numpages);
++ if (ret)
++ goto out;
++ this->data_poi += mtd->oobblock;
++ len += mtd->oobblock;
++ oob += mtd->oobsize;
++ page++;
++ }
++ /* Check, if we have to switch to the next tuple */
++ if (len >= (int) vecs->iov_len) {
++ vecs++;
++ len = 0;
++ count--;
++ }
++ } else {
++ /* We must use the internal buffer, read data out of each
++ * tuple until we have a full page to write
++ */
++ int cnt = 0;
++ while (cnt < mtd->oobblock) {
++ if (vecs->iov_base != NULL && vecs->iov_len)
++ this->data_buf[cnt++] = ((u_char *) vecs->iov_base)[len++];
++ /* Check, if we have to switch to the next tuple */
++ if (len >= (int) vecs->iov_len) {
++ vecs++;
++ len = 0;
++ count--;
++ }
++ }
++ this->pagebuf = page;
++ this->data_poi = this->data_buf;
++ bufstart = this->data_poi;
++ numpages = 1;
++ oobbuf = nand_prepare_oobbuf (mtd, NULL, oobsel, autoplace, numpages);
++ ret = nand_write_page (mtd, this, page & this->pagemask,
++ oobbuf, oobsel, 0);
++ if (ret)
++ goto out;
++ page++;
++ }
++
++ this->data_poi = bufstart;
++ ret = nand_verify_pages (mtd, this, startpage, numpages, oobbuf, oobsel, chipnr, 0);
++ if (ret)
++ goto out;
++
++ written += mtd->oobblock * numpages;
++ /* All done ? */
++ if (!count)
++ break;
++
++ startpage = page & this->pagemask;
++ /* Check, if we cross a chip boundary */
++ if (!startpage) {
++ chipnr++;
++ this->select_chip(mtd, -1);
++ this->select_chip(mtd, chipnr);
++ }
++ }
++ ret = 0;
++out:
++ /* Deselect and wake up anyone waiting on the device */
++ nand_release_device(mtd);
++
++ *retlen = written;
++ return ret;
++}
++#endif
++#endif
++
++/**
++ * single_erease_cmd - [GENERIC] NAND standard block erase command function
++ * @mtd: MTD device structure
++ * @page: the page address of the block which will be erased
++ *
++ * Standard erase command for NAND chips
++ */
++#if NAND_ERASE_SUPPORT
++static void single_erase_cmd (struct mtd_info *mtd, int page)
++{
++ struct nand_chip *this = mtd->priv;
++ /* Send commands to erase a block */
++ this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page);
++ this->cmdfunc (mtd, NAND_CMD_ERASE2, -1, -1);
++}
++#endif
++
++/**
++ * multi_erease_cmd - [GENERIC] AND specific block erase command function
++ * @mtd: MTD device structure
++ * @page: the page address of the block which will be erased
++ *
++ * AND multi block erase command function
++ * Erase 4 consecutive blocks
++ */
++#if NAND_ERASE_SUPPORT
++static void multi_erase_cmd (struct mtd_info *mtd, int page)
++{
++ struct nand_chip *this = mtd->priv;
++ /* Send commands to erase a block */
++ this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++);
++ this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++);
++ this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++);
++ this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page);
++ this->cmdfunc (mtd, NAND_CMD_ERASE2, -1, -1);
++}
++#endif
++
++/**
++ * nand_erase - [MTD Interface] erase block(s)
++ * @mtd: MTD device structure
++ * @instr: erase instruction
++ *
++ * Erase one ore more blocks
++ */
++#if NAND_ERASE_SUPPORT
++static int nand_erase (struct mtd_info *mtd, struct erase_info *instr)
++{
++ return nand_erase_nand (mtd, instr, 0);
++}
++#endif
++
++#define BBT_PAGE_MASK 0xffffff3f
++/**
++ * nand_erase_intern - [NAND Interface] erase block(s)
++ * @mtd: MTD device structure
++ * @instr: erase instruction
++ * @allowbbt: allow erasing the bbt area
++ *
++ * Erase one ore more blocks
++ */
++#if NAND_ERASE_SUPPORT
++int nand_erase_nand (struct mtd_info *mtd, struct erase_info *instr, int allowbbt)
++{
++ int page, len, status, pages_per_block, ret, chipnr;
++ struct nand_chip *this = mtd->priv;
++ int rewrite_bbt[NAND_MAX_CHIPS]={0}; /* flags to indicate the page, if bbt needs to be rewritten. */
++ unsigned int bbt_masked_page; /* bbt mask to compare to page being erased. */
++ /* It is used to see if the current page is in the same */
++ /* 256 block group and the same bank as the bbt. */
++
++ DEBUG (MTD_DEBUG_LEVEL3,
++ "nand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
++
++ /* Start address must align on block boundary */
++ if (instr->addr & ((1 << this->phys_erase_shift) - 1)) {
++ DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n");
++ return -EINVAL;
++ }
++
++ /* Length must align on block boundary */
++ if (instr->len & ((1 << this->phys_erase_shift) - 1)) {
++ DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Length not block aligned\n");
++ return -EINVAL;
++ }
++
++ /* Do not allow erase past end of device */
++ if ((instr->len + instr->addr) > mtd->size) {
++ DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Erase past end of device\n");
++ return -EINVAL;
++ }
++
++ instr->fail_addr = 0xffffffff;
++
++ /* Grab the lock and see if the device is available */
++ nand_get_device (this, mtd, FL_ERASING);
++
++ /* Shift to get first page */
++ page = (int) (instr->addr >> this->page_shift);
++ chipnr = (int) (instr->addr >> this->chip_shift);
++
++ /* Calculate pages in each block */
++ pages_per_block = 1 << (this->phys_erase_shift - this->page_shift);
++
++ /* Select the NAND device */
++ this->select_chip(mtd, chipnr);
++
++ /* Check the WP bit */
++ /* Check, if it is write protected */
++ if (nand_check_wp(mtd)) {
++ DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Device is write protected!!!\n");
++ instr->state = MTD_ERASE_FAILED;
++ goto erase_exit;
++ }
++
++ /* if BBT requires refresh, set the BBT page mask to see if the BBT should be rewritten */
++ if (this->options & BBT_AUTO_REFRESH) {
++ bbt_masked_page = this->bbt_td->pages[chipnr] & BBT_PAGE_MASK;
++ } else {
++ bbt_masked_page = 0xffffffff; /* should not match anything */
++ }
++
++ /* Loop through the pages */
++ len = instr->len;
++
++ instr->state = MTD_ERASING;
++
++ while (len) {
++ /* Check if we have a bad block, we do not erase bad blocks ! */
++ if (nand_block_checkbad(mtd, ((loff_t) page) << this->page_shift, 0, allowbbt)) {
++ puts ("nand_erase: attempt to erase a bad block at page ");
++ putx (page);
++ putnl ();
++ instr->state = MTD_ERASE_FAILED;
++ goto erase_exit;
++ }
++
++ /* Invalidate the page cache, if we erase the block which contains
++ the current cached page */
++ if (page <= this->pagebuf && this->pagebuf < (page + pages_per_block))
++ this->pagebuf = -1;
++
++ this->erase_cmd (mtd, page & this->pagemask);
++
++ status = this->waitfunc (mtd, this, FL_ERASING);
++
++ /* See if operation failed and additional status checks are available */
++ if ((status & NAND_STATUS_FAIL) && (this->errstat)) {
++ status = this->errstat(mtd, this, FL_ERASING, status, page);
++ }
++
++ /* See if block erase succeeded */
++ if (status & NAND_STATUS_FAIL) {
++ DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: " "Failed erase, page 0x%08x\n", page);
++ instr->state = MTD_ERASE_FAILED;
++ instr->fail_addr = (page << this->page_shift);
++ goto erase_exit;
++ }
++
++ /* if BBT requires refresh, set the BBT rewrite flag to the page being erased */
++ if (this->options & BBT_AUTO_REFRESH) {
++ if (((page & BBT_PAGE_MASK) == bbt_masked_page) &&
++ (page != this->bbt_td->pages[chipnr])) {
++ rewrite_bbt[chipnr] = (page << this->page_shift);
++ }
++ }
++
++ /* Increment page address and decrement length */
++ len -= (1 << this->phys_erase_shift);
++ page += pages_per_block;
++
++ /* Check, if we cross a chip boundary */
++ if (len && !(page & this->pagemask)) {
++ chipnr++;
++ this->select_chip(mtd, -1);
++ this->select_chip(mtd, chipnr);
++
++ /* if BBT requires refresh and BBT-PERCHIP,
++ * set the BBT page mask to see if this BBT should be rewritten */
++ if ((this->options & BBT_AUTO_REFRESH) && (this->bbt_td->options & NAND_BBT_PERCHIP)) {
++ bbt_masked_page = this->bbt_td->pages[chipnr] & BBT_PAGE_MASK;
++ }
++
++ }
++ }
++ instr->state = MTD_ERASE_DONE;
++
++erase_exit:
++
++ ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
++#if 0
++ /* Do call back function */
++ if (!ret)
++ mtd_erase_callback(instr);
++#endif
++
++ /* Deselect and wake up anyone waiting on the device */
++ nand_release_device(mtd);
++
++#if NAND_BBT_SUPPORT
++ /* if BBT requires refresh and erase was successful, rewrite any selected bad block tables */
++ if ((this->options & BBT_AUTO_REFRESH) && (!ret)) {
++ for (chipnr = 0; chipnr < this->numchips; chipnr++) {
++ if (rewrite_bbt[chipnr]) {
++ /* update the BBT for chip */
++ DEBUG (MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt (%d:0x%0x 0x%0x)\n",
++ chipnr, rewrite_bbt[chipnr], this->bbt_td->pages[chipnr]);
++ nand_update_bbt (mtd, rewrite_bbt[chipnr]);
++ }
++ }
++ }
++#endif
++
++ /* Return more or less happy */
++ return ret;
++}
++#endif
++
++/**
++ * nand_sync - [MTD Interface] sync
++ * @mtd: MTD device structure
++ *
++ * Sync is actually a wait for chip ready function
++ */
++#if 0 /* not needed */
++static void nand_sync (struct mtd_info *mtd)
++{
++ struct nand_chip *this = mtd->priv;
++
++ DEBUG (MTD_DEBUG_LEVEL3, "nand_sync: called\n");
++
++ /* Grab the lock and see if the device is available */
++ nand_get_device (this, mtd, FL_SYNCING);
++ /* Release it and go back */
++ nand_release_device (mtd);
++}
++#endif
++
++
++/**
++ * nand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
++ * @mtd: MTD device structure
++ * @ofs: offset relative to mtd start
++ */
++static int nand_block_isbad (struct mtd_info *mtd, loff_t ofs)
++{
++ /* Check for invalid offset */
++ if (ofs > mtd->size)
++ return -EINVAL;
++
++ return nand_block_checkbad (mtd, ofs, 1, 0);
++}
++
++/**
++ * nand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
++ * @mtd: MTD device structure
++ * @ofs: offset relative to mtd start
++ */
++#if NAND_WRITE_SUPPORT
++static int nand_block_markbad (struct mtd_info *mtd, loff_t ofs)
++{
++ struct nand_chip *this = mtd->priv;
++ int ret;
++
++ if ((ret = nand_block_isbad(mtd, ofs))) {
++ /* If it was bad already, return success and do nothing. */
++ if (ret > 0)
++ return 0;
++ return ret;
++ }
++
++ return this->block_markbad(mtd, ofs);
++}
++#endif
++
++/**
++ * nand_suspend - [MTD Interface] Suspend the NAND flash
++ * @mtd: MTD device structure
++ */
++#if 0 /* don't need it */
++static int nand_suspend(struct mtd_info *mtd)
++{
++ struct nand_chip *this = mtd->priv;
++
++ return nand_get_device (this, mtd, FL_PM_SUSPENDED);
++}
++#endif
++
++/**
++ * nand_resume - [MTD Interface] Resume the NAND flash
++ * @mtd: MTD device structure
++ */
++#if 0 /* don't need it */
++static void nand_resume(struct mtd_info *mtd)
++{
++ struct nand_chip *this = mtd->priv;
++
++ if (this->state == FL_PM_SUSPENDED)
++ nand_release_device(mtd);
++ else
++ puts("resume() called for the chip which is not in suspended state\n");
++
++}
++#endif
++
++
++/**
++ * nand_scan - [NAND Interface] Scan for the NAND device
++ * @mtd: MTD device structure
++ * @maxchips: Number of chips to scan for
++ *
++ * This fills out all the not initialized function pointers
++ * with the defaults.
++ * The flash ID is read and the mtd/chip structures are
++ * filled with the appropriate values. Buffers are allocated if
++ * they are not provided by the board driver
++ *
++ */
++int nand_scan (struct mtd_info *mtd, int maxchips)
++{
++ int i, nand_maf_id, nand_dev_id, busw, maf_id;
++ struct nand_chip *this = mtd->priv;
++
++ /* Get buswidth to select the correct functions*/
++ busw = this->options & NAND_BUSWIDTH_16;
++
++ /* check for proper chip_delay setup, set 20us if not */
++ if (!this->chip_delay)
++ this->chip_delay = 20;
++
++ /* check, if a user supplied command function given */
++ if (this->cmdfunc == NULL)
++ this->cmdfunc = nand_command;
++
++ /* check, if a user supplied wait function given */
++ if (this->waitfunc == NULL)
++ this->waitfunc = nand_wait;
++
++ if (!this->select_chip)
++ this->select_chip = nand_select_chip;
++ if (!this->write_byte)
++ this->write_byte = busw ? nand_write_byte16 : nand_write_byte;
++ if (!this->read_byte)
++ this->read_byte = busw ? nand_read_byte16 : nand_read_byte;
++ if (!this->write_word)
++ this->write_word = nand_write_word;
++ if (!this->read_word)
++ this->read_word = nand_read_word;
++ if (!this->block_bad)
++ this->block_bad = nand_block_bad;
++#if NAND_WRITE_SUPPORT
++ if (!this->block_markbad)
++ this->block_markbad = nand_default_block_markbad;
++#endif
++ if (!this->write_buf)
++ this->write_buf = busw ? nand_write_buf16 : nand_write_buf;
++ if (!this->read_buf)
++ this->read_buf = busw ? nand_read_buf16 : nand_read_buf;
++ if (!this->verify_buf)
++ this->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf;
++#if NAND_BBT_SUPPORT
++ if (!this->scan_bbt)
++ this->scan_bbt = nand_default_bbt;
++#endif
++
++ /* Select the device */
++ this->select_chip(mtd, 0);
++
++ /* Send the command for reading device ID */
++ this->cmdfunc (mtd, NAND_CMD_READID, 0x00, -1);
++
++ /* Read manufacturer and device IDs */
++ nand_maf_id = this->read_byte(mtd);
++ nand_dev_id = this->read_byte(mtd);
++
++ /* Print and store flash device information */
++ for (i = 0; nand_flash_ids[i].name != NULL; i++) {
++
++ if (nand_dev_id != nand_flash_ids[i].id)
++ continue;
++
++ if (!mtd->name) mtd->name = nand_flash_ids[i].name;
++ this->chipsize = nand_flash_ids[i].chipsize << 20;
++
++ /* New devices have all the information in additional id bytes */
++ if (!nand_flash_ids[i].pagesize) {
++ int extid;
++ /* The 3rd id byte contains non relevant data ATM */
++ extid = this->read_byte(mtd);
++ /* The 4th id byte is the important one */
++ extid = this->read_byte(mtd);
++ /* Calc pagesize */
++ mtd->oobblock = 1024 << (extid & 0x3);
++ extid >>= 2;
++ /* Calc oobsize */
++ mtd->oobsize = (8 << (extid & 0x01)) * (mtd->oobblock >> 9);
++ extid >>= 2;
++ /* Calc blocksize. Blocksize is multiples of 64KiB */
++ mtd->erasesize = (64 * 1024) << (extid & 0x03);
++ extid >>= 2;
++ /* Get buswidth information */
++ busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
++
++ } else {
++ /* Old devices have this data hardcoded in the
++ * device id table */
++ mtd->erasesize = nand_flash_ids[i].erasesize;
++ mtd->oobblock = nand_flash_ids[i].pagesize;
++ mtd->oobsize = mtd->oobblock / 32;
++ busw = nand_flash_ids[i].options & NAND_BUSWIDTH_16;
++ }
++
++ /* Try to identify manufacturer */
++ for (maf_id = 0; nand_manuf_ids[maf_id].id != 0x0; maf_id++) {
++ if (nand_manuf_ids[maf_id].id == nand_maf_id)
++ break;
++ }
++
++ /* Check, if buswidth is correct. Hardware drivers should set
++ * this correct ! */
++ if (busw != (this->options & NAND_BUSWIDTH_16)) {
++#if 0
++ puts ("Manufacturer ID: ");
++ putx (nand_maf_id);
++ puts (", Chip ID: ");
++ putx (nand_dev_id);
++ puts (" (");
++ puts (nand_manuf_ids[maf_id].name);
++ putc (' ');
++ puts (mtd->name);
++ puts (")\r\n");
++#endif
++ puts ("Expected NAND bus width ");
++ putx ((this->options & NAND_BUSWIDTH_16) ? 16 : 8);
++ puts (",found ");
++ putx (busw ? 16 : 8);
++ putnl();
++ this->select_chip(mtd, -1);
++ return 1;
++ }
++
++ /* Calculate the address shift from the page size */
++ this->page_shift = ffs(mtd->oobblock) - 1;
++ this->bbt_erase_shift = this->phys_erase_shift = ffs(mtd->erasesize) - 1;
++ this->chip_shift = ffs(this->chipsize) - 1;
++
++ /* Set the bad block position */
++ this->badblockpos = mtd->oobblock > 512 ?
++ NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS;
++
++ /* Get chip options, preserve non chip based options */
++ this->options &= ~NAND_CHIPOPTIONS_MSK;
++ this->options |= nand_flash_ids[i].options & NAND_CHIPOPTIONS_MSK;
++ /* Set this as a default. Board drivers can override it, if neccecary */
++ this->options |= NAND_NO_AUTOINCR;
++ /* Check if this is a not a samsung device. Do not clear the options
++ * for chips which are not having an extended id.
++ */
++ if (nand_maf_id != NAND_MFR_SAMSUNG && !nand_flash_ids[i].pagesize)
++ this->options &= ~NAND_SAMSUNG_LP_OPTIONS;
++
++#if NAND_ERASE_SUPPORT
++ /* Check for AND chips with 4 page planes */
++ if (this->options & NAND_4PAGE_ARRAY)
++ this->erase_cmd = multi_erase_cmd;
++ else
++ this->erase_cmd = single_erase_cmd;
++#endif
++
++ /* Do not replace user supplied command function ! */
++ if (mtd->oobblock > 512 && this->cmdfunc == nand_command)
++ this->cmdfunc = nand_command_lp;
++
++ puts ("Manufacturer ID / Chip ID: ");
++ putx (nand_maf_id << 8 | nand_dev_id);
++ puts (" (");
++ puts (nand_manuf_ids[maf_id].name);
++ putc (' ');
++ puts (nand_flash_ids[i].name);
++ puts (")\r\n");
++ break;
++ }
++
++ if (!nand_flash_ids[i].name) {
++ puts ("No NAND device found!!!\r\n");
++ this->select_chip(mtd, -1);
++ return 1;
++ }
++
++#if NAND_MULTICHIP_SUPPORT
++ for (i=1; i < maxchips; i++) {
++ this->select_chip(mtd, i);
++
++ /* Send the command for reading device ID */
++ this->cmdfunc (mtd, NAND_CMD_READID, 0x00, -1);
++
++ /* Read manufacturer and device IDs */
++ if (nand_maf_id != this->read_byte(mtd) ||
++ nand_dev_id != this->read_byte(mtd))
++ break;
++ }
++ if (i > 1) {
++ putx (i);
++ puts (" NAND chips detected\r\n");
++ }
++#endif
++
++ /* Allocate buffers, if neccecary */
++ if (!this->oob_buf) {
++ size_t len;
++ len = mtd->oobsize << (this->phys_erase_shift - this->page_shift);
++ this->oob_buf = malloc (len);
++ if (!this->oob_buf) {
++ puts ("nand_scan(): Cannot allocate oob_buf\r\n");
++ return -ENOMEM;
++ }
++ this->options |= NAND_OOBBUF_ALLOC;
++ }
++
++ if (!this->data_buf) {
++ size_t len;
++ len = mtd->oobblock + mtd->oobsize;
++ this->data_buf = malloc (len);
++ if (!this->data_buf) {
++ if (this->options & NAND_OOBBUF_ALLOC)
++ free (this->oob_buf);
++ puts ("nand_scan(): Cannot allocate data_buf\r\n");
++ return -ENOMEM;
++ }
++ this->options |= NAND_DATABUF_ALLOC;
++ }
++
++#if NAND_MULTICHIP_SUPP0RT
++ /* Store the number of chips and calc total size for mtd */
++ this->numchips = i;
++ mtd->size = i * this->chipsize;
++#else
++ /* Store the number of chips and calc total size for mtd */
++ this->numchips = 1;
++ mtd->size = this->chipsize;
++#endif
++
++ /* Convert chipsize to number of pages per chip -1. */
++ this->pagemask = (this->chipsize >> this->page_shift) - 1;
++ /* Preset the internal oob buffer */
++ memset(this->oob_buf, 0xff, mtd->oobsize << (this->phys_erase_shift - this->page_shift));
++
++ /* If no default placement scheme is given, select an
++ * appropriate one */
++ if (!this->autooob) {
++ /* Select the appropriate default oob placement scheme for
++ * placement agnostic filesystems */
++ switch (mtd->oobsize) {
++ case 8:
++ this->autooob = &nand_oob_8;
++ break;
++ case 16:
++ this->autooob = &nand_oob_16;
++ break;
++ case 64:
++ this->autooob = &nand_oob_64;
++ break;
++ default:
++ puts ("No oob scheme defined for oobsize ");
++ putx (mtd->oobsize);
++ putnl ();
++ BUG();
++ }
++ }
++
++ /* The number of bytes available for the filesystem to place fs dependend
++ * oob data */
++ mtd->oobavail = 0;
++ for (i = 0; this->autooob->oobfree[i][1]; i++)
++ mtd->oobavail += this->autooob->oobfree[i][1];
++
++ /*
++ * check ECC mode, default to software
++ * if 3byte/512byte hardware ECC is selected and we have 256 byte pagesize
++ * fallback to software ECC
++ */
++ this->eccsize = 256; /* set default eccsize */
++ this->eccbytes = 3;
++
++ switch (this->eccmode) {
++#if NAND_HWECC_SUPPORT
++ case NAND_ECC_HW12_2048:
++ if (mtd->oobblock < 2048) {
++ puts ("2048 byte HW ECC not possible on ");
++ putx (mtd->oobblock);
++ puts (" byte page size, fallback to SW ECC\r\n");
++ this->eccmode = NAND_ECC_SOFT;
++ this->calculate_ecc = nand_calculate_ecc;
++ this->correct_data = nand_correct_data;
++ } else
++ this->eccsize = 2048;
++ break;
++
++ case NAND_ECC_HW3_512:
++ case NAND_ECC_HW6_512:
++ case NAND_ECC_HW8_512:
++ if (mtd->oobblock == 256) {
++ puts ("512 byte HW ECC not possible on 256 Byte pagesize, fallback to SW ECC\r\n");
++ this->eccmode = NAND_ECC_SOFT;
++ this->calculate_ecc = nand_calculate_ecc;
++ this->correct_data = nand_correct_data;
++ } else
++ this->eccsize = 512; /* set eccsize to 512 */
++ break;
++
++ case NAND_ECC_HW3_256:
++ break;
++#endif
++
++ case NAND_ECC_NONE:
++ puts ("NAND_ECC_NONE selected by board driver. This is not recommended !!\r\n");
++ this->eccmode = NAND_ECC_NONE;
++ break;
++
++ case NAND_ECC_SOFT:
++ this->calculate_ecc = nand_calculate_ecc;
++ this->correct_data = nand_correct_data;
++ break;
++
++ default:
++ puts ("Invalid NAND_ECC_MODE ");
++ putx (this->eccmode);
++ putnl ();
++ BUG();
++ }
++
++ /* Check hardware ecc function availability and adjust number of ecc bytes per
++ * calculation step
++ */
++ switch (this->eccmode) {
++ case NAND_ECC_HW12_2048:
++ this->eccbytes += 4;
++ case NAND_ECC_HW8_512:
++ this->eccbytes += 2;
++ case NAND_ECC_HW6_512:
++ this->eccbytes += 3;
++ case NAND_ECC_HW3_512:
++ case NAND_ECC_HW3_256:
++ if (this->calculate_ecc && this->correct_data && this->enable_hwecc)
++ break;
++ puts ("No ECC functions supplied, Hardware ECC not possible\r\n");
++ BUG();
++ }
++
++ mtd->eccsize = this->eccsize;
++
++ /* Set the number of read / write steps for one page to ensure ECC generation */
++ switch (this->eccmode) {
++ case NAND_ECC_HW12_2048:
++ this->eccsteps = mtd->oobblock / 2048;
++ break;
++ case NAND_ECC_HW3_512:
++ case NAND_ECC_HW6_512:
++ case NAND_ECC_HW8_512:
++ this->eccsteps = mtd->oobblock / 512;
++ break;
++ case NAND_ECC_HW3_256:
++ case NAND_ECC_SOFT:
++ this->eccsteps = mtd->oobblock / 256;
++ break;
++
++ case NAND_ECC_NONE:
++ this->eccsteps = 1;
++ break;
++ }
++
++ /* Initialize state, waitqueue and spinlock */
++ this->state = FL_READY;
++#if 0
++ init_waitqueue_head (&this->wq);
++ spin_lock_init (&this->chip_lock);
++#endif
++
++ /* De-select the device */
++ this->select_chip(mtd, -1);
++
++ /* Invalidate the pagebuffer reference */
++ this->pagebuf = -1;
++
++ /* Fill in remaining MTD driver data */
++ mtd->type = MTD_NANDFLASH;
++ mtd->flags = MTD_CAP_NANDFLASH | MTD_ECC;
++ mtd->ecctype = MTD_ECC_SW;
++#if NAND_ERASE_SUPPORT
++ mtd->erase = nand_erase;
++#endif
++#if 0 /* not needed */
++ mtd->point = NULL;
++ mtd->unpoint = NULL;
++#endif
++ mtd->read = nand_read;
++#if NAND_WRITE_SUPPORT
++ mtd->write = nand_write;
++#endif
++ mtd->read_ecc = nand_read_ecc;
++#if NAND_WRITE_SUPPORT
++ mtd->write_ecc = nand_write_ecc;
++#endif
++ mtd->read_oob = nand_read_oob;
++#if NAND_WRITE_SUPPORT
++ mtd->write_oob = nand_write_oob;
++#endif
++#if NAND_KVEC_SUPPORT
++ mtd->readv = NULL;
++#endif
++#if NAND_WRITE_SUPPORT && NAND_KVEC_SUPPORT
++ mtd->writev = nand_writev;
++ mtd->writev_ecc = nand_writev_ecc;
++#endif
++#if 0 /* not needed */
++ mtd->sync = nand_sync;
++ mtd->lock = NULL;
++ mtd->unlock = NULL;
++ mtd->suspend = nand_suspend;
++ mtd->resume = nand_resume;
++#endif
++ mtd->block_isbad = nand_block_isbad;
++#if NAND_WRITE_SUPPORT
++ mtd->block_markbad = nand_block_markbad;
++#endif
++
++ /* and make the autooob the default one */
++ memcpy(&mtd->oobinfo, this->autooob, sizeof(mtd->oobinfo));
++
++#ifdef THIS_MODULE /* normally isn't for us */
++ mtd->owner = THIS_MODULE;
++#endif
++
++ /* Check, if we should skip the bad block table scan */
++ if (this->options & NAND_SKIP_BBTSCAN)
++ return 0;
++
++#if NAND_BBT_SUPPORT
++ /* Build bad block table */
++ return this->scan_bbt (mtd);
++#else
++ return -1;
++#endif
++}
++
++/**
++ * nand_release - [NAND Interface] Free resources held by the NAND device
++ * @mtd: MTD device structure
++*/
++#if 0 /* don't need it */
++void nand_release (struct mtd_info *mtd)
++{
++ struct nand_chip *this = mtd->priv;
++
++#if 0
++#ifdef CONFIG_MTD_PARTITIONS
++ /* Deregister partitions */
++ del_mtd_partitions (mtd);
++#endif
++ /* Deregister the device */
++ del_mtd_device (mtd);
++#endif
++
++ /* Free bad block table memory */
++ free (this->bbt);
++ /* Buffer allocated by nand_scan ? */
++ if (this->options & NAND_OOBBUF_ALLOC)
++ free (this->oob_buf);
++ /* Buffer allocated by nand_scan ? */
++ if (this->options & NAND_DATABUF_ALLOC)
++ free (this->data_buf);
++}
++#endif
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand_bbt.c linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand_bbt.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand_bbt.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand_bbt.c 2006-11-10 09:55:58.000000000 +0100
+@@ -0,0 +1,1151 @@
++/*
++ * drivers/mtd/nand_bbt.c
++ *
++ * Overview:
++ * Bad block table support for the NAND driver
++ *
++ * Copyright (C) 2004 Thomas Gleixner (tglx@linutronix.de)
++ *
++ * $Id: nand_bbt.c,v 1.5 2006/11/10 08:55:58 ricardw Exp $
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * Description:
++ *
++ * When nand_scan_bbt is called, then it tries to find the bad block table
++ * depending on the options in the bbt descriptor(s). If a bbt is found
++ * then the contents are read and the memory based bbt is created. If a
++ * mirrored bbt is selected then the mirror is searched too and the
++ * versions are compared. If the mirror has a greater version number
++ * than the mirror bbt is used to build the memory based bbt.
++ * If the tables are not versioned, then we "or" the bad block information.
++ * If one of the bbt's is out of date or does not exist it is (re)created.
++ * If no bbt exists at all then the device is scanned for factory marked
++ * good / bad blocks and the bad block tables are created.
++ *
++ * For manufacturer created bbts like the one found on M-SYS DOC devices
++ * the bbt is searched and read but never created
++ *
++ * The autogenerated bad block table is located in the last good blocks
++ * of the device. The table is mirrored, so it can be updated eventually.
++ * The table is marked in the oob area with an ident pattern and a version
++ * number which indicates which of both tables is more up to date.
++ *
++ * The table uses 2 bits per block
++ * 11b: block is good
++ * 00b: block is factory marked bad
++ * 01b, 10b: block is marked bad due to wear
++ *
++ * The memory bad block table uses the following scheme:
++ * 00b: block is good
++ * 01b: block is marked bad due to wear
++ * 10b: block is reserved (to protect the bbt area)
++ * 11b: block is factory marked bad
++ *
++ * Multichip devices like DOC store the bad block info per floor.
++ *
++ * Following assumptions are made:
++ * - bbts start at a page boundary, if autolocated on a block boundary
++ * - the space neccecary for a bbt in FLASH does not exceed a block boundary
++ *
++ */
++
++#if 0
++#include <linux/slab.h>
++#endif
++
++#include <linux/types.h>
++#include "mtd.h"
++#include "nand.h"
++#include "nand_ecc.h"
++
++#if 0
++#include <linux/mtd/compatmac.h>
++#include <linux/bitops.h>
++#endif
++
++#include <linux/delay.h>
++
++#include "lib.h"
++
++
++/**
++ * check_pattern - [GENERIC] check if a pattern is in the buffer
++ * @buf: the buffer to search
++ * @len: the length of buffer to search
++ * @paglen: the pagelength
++ * @td: search pattern descriptor
++ *
++ * Check for a pattern at the given place. Used to search bad block
++ * tables and good / bad block identifiers.
++ * If the SCAN_EMPTY option is set then check, if all bytes except the
++ * pattern area contain 0xff
++ *
++*/
++static int check_pattern (uint8_t *buf, int len, int paglen, struct nand_bbt_descr *td)
++{
++ int i, end = 0;
++ uint8_t *p = buf;
++
++ end = paglen + td->offs;
++ if (td->options & NAND_BBT_SCANEMPTY) {
++ for (i = 0; i < end; i++) {
++ if (p[i] != 0xff)
++ return -1;
++ }
++ }
++ p += end;
++
++ /* Compare the pattern */
++ for (i = 0; i < td->len; i++) {
++ if (p[i] != td->pattern[i])
++ return -1;
++ }
++
++ if (td->options & NAND_BBT_SCANEMPTY) {
++ p += td->len;
++ end += td->len;
++ for (i = end; i < len; i++) {
++ if (*p++ != 0xff)
++ return -1;
++ }
++ }
++ return 0;
++}
++
++/**
++ * check_short_pattern - [GENERIC] check if a pattern is in the buffer
++ * @buf: the buffer to search
++ * @td: search pattern descriptor
++ *
++ * Check for a pattern at the given place. Used to search bad block
++ * tables and good / bad block identifiers. Same as check_pattern, but
++ * no optional empty check
++ *
++*/
++static int check_short_pattern (uint8_t *buf, struct nand_bbt_descr *td)
++{
++ int i;
++ uint8_t *p = buf;
++
++ /* Compare the pattern */
++ for (i = 0; i < td->len; i++) {
++ if (p[td->offs + i] != td->pattern[i])
++ return -1;
++ }
++ return 0;
++}
++
++/**
++ * read_bbt - [GENERIC] Read the bad block table starting from page
++ * @mtd: MTD device structure
++ * @buf: temporary buffer
++ * @page: the starting page
++ * @num: the number of bbt descriptors to read
++ * @bits: number of bits per block
++ * @offs: offset in the memory table
++ * @reserved_block_code: Pattern to identify reserved blocks
++ *
++ * Read the bad block table starting from page.
++ *
++ */
++static int read_bbt (struct mtd_info *mtd, uint8_t *buf, int page, int num,
++ int bits, int offs, int reserved_block_code)
++{
++ int res, i, j, act = 0;
++ struct nand_chip *this = mtd->priv;
++ size_t retlen, len, totlen;
++ loff_t from;
++ uint8_t msk = (uint8_t) ((1 << bits) - 1);
++
++ totlen = (num * bits) >> 3;
++ from = ((loff_t)page) << this->page_shift;
++
++ while (totlen) {
++ len = min (totlen, (size_t) (1 << this->bbt_erase_shift));
++ res = mtd->read_ecc (mtd, from, len, &retlen, buf, NULL, this->autooob);
++ if (res < 0) {
++ if (retlen != len) {
++ puts ("nand_bbt: Error reading bad block table\n");
++ return res;
++ }
++ puts ("nand_bbt: ECC error while reading bad block table\n");
++ }
++
++ /* Analyse data */
++ for (i = 0; i < len; i++) {
++ uint8_t dat = buf[i];
++ for (j = 0; j < 8; j += bits, act += 2) {
++ uint8_t tmp = (dat >> j) & msk;
++ if (tmp == msk)
++ continue;
++ if (reserved_block_code &&
++ (tmp == reserved_block_code)) {
++ puts ("nand_read_bbt: Reserved block at");
++ putx (((offs << 2) + (act >> 1)) << this->bbt_erase_shift);
++ putnl ();
++ this->bbt[offs + (act >> 3)] |= 0x2 << (act & 0x06);
++ continue;
++ }
++ /* Leave it for now, if its matured we can move this
++ * message to MTD_DEBUG_LEVEL0 */
++ puts ("nand_read_bbt: Bad block at ");
++ putx (((offs << 2) + (act >> 1)) << this->bbt_erase_shift);
++ putnl ();
++ /* Factory marked bad or worn out ? */
++ if (tmp == 0)
++ this->bbt[offs + (act >> 3)] |= 0x3 << (act & 0x06);
++ else
++ this->bbt[offs + (act >> 3)] |= 0x1 << (act & 0x06);
++ }
++ }
++ totlen -= len;
++ from += len;
++ }
++ return 0;
++}
++
++/**
++ * read_abs_bbt - [GENERIC] Read the bad block table starting at a given page
++ * @mtd: MTD device structure
++ * @buf: temporary buffer
++ * @td: descriptor for the bad block table
++ * @chip: read the table for a specific chip, -1 read all chips.
++ * Applies only if NAND_BBT_PERCHIP option is set
++ *
++ * Read the bad block table for all chips starting at a given page
++ * We assume that the bbt bits are in consecutive order.
++*/
++static int read_abs_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td, int chip)
++{
++ struct nand_chip *this = mtd->priv;
++ int res = 0, i;
++ int bits;
++
++ bits = td->options & NAND_BBT_NRBITS_MSK;
++ if (td->options & NAND_BBT_PERCHIP) {
++ int offs = 0;
++ for (i = 0; i < this->numchips; i++) {
++ if (chip == -1 || chip == i)
++ res = read_bbt (mtd, buf, td->pages[i], this->chipsize >> this->bbt_erase_shift, bits, offs, td->reserved_block_code);
++ if (res)
++ return res;
++ offs += this->chipsize >> (this->bbt_erase_shift + 2);
++ }
++ } else {
++ res = read_bbt (mtd, buf, td->pages[0], mtd->size >> this->bbt_erase_shift, bits, 0, td->reserved_block_code);
++ if (res)
++ return res;
++ }
++ return 0;
++}
++
++/**
++ * read_abs_bbts - [GENERIC] Read the bad block table(s) for all chips starting at a given page
++ * @mtd: MTD device structure
++ * @buf: temporary buffer
++ * @td: descriptor for the bad block table
++ * @md: descriptor for the bad block table mirror
++ *
++ * Read the bad block table(s) for all chips starting at a given page
++ * We assume that the bbt bits are in consecutive order.
++ *
++*/
++static int read_abs_bbts (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td,
++ struct nand_bbt_descr *md)
++{
++ struct nand_chip *this = mtd->priv;
++
++ /* Read the primary version, if available */
++ if (td->options & NAND_BBT_VERSION) {
++ nand_read_raw (mtd, buf, td->pages[0] << this->page_shift, mtd->oobblock, mtd->oobsize);
++ td->version[0] = buf[mtd->oobblock + td->veroffs];
++ puts ("Bad block table at page ");
++ putx (td->pages[0]);
++ puts (", version ");
++ putx (td->version[0]);
++ putnl ();
++ }
++
++ /* Read the mirror version, if available */
++ if (md && (md->options & NAND_BBT_VERSION)) {
++ nand_read_raw (mtd, buf, md->pages[0] << this->page_shift, mtd->oobblock, mtd->oobsize);
++ md->version[0] = buf[mtd->oobblock + md->veroffs];
++ puts ("Bad block table at page ");
++ putx (md->pages[0]);
++ puts (", version ");
++ putx (md->version[0]);
++ putnl ();
++ }
++
++ return 1;
++}
++
++/**
++ * create_bbt - [GENERIC] Create a bad block table by scanning the device
++ * @mtd: MTD device structure
++ * @buf: temporary buffer
++ * @bd: descriptor for the good/bad block search pattern
++ * @chip: create the table for a specific chip, -1 read all chips.
++ * Applies only if NAND_BBT_PERCHIP option is set
++ *
++ * Create a bad block table by scanning the device
++ * for the given good/bad block identify pattern
++ */
++static int create_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *bd, int chip)
++{
++ struct nand_chip *this = mtd->priv;
++ int i, j, numblocks, len, scanlen;
++ int startblock;
++ loff_t from;
++ size_t readlen, ooblen;
++
++ puts ("Scanning device for bad blocks\n");
++
++ if (bd->options & NAND_BBT_SCANALLPAGES)
++ len = 1 << (this->bbt_erase_shift - this->page_shift);
++ else {
++ if (bd->options & NAND_BBT_SCAN2NDPAGE)
++ len = 2;
++ else
++ len = 1;
++ }
++
++ if (!(bd->options & NAND_BBT_SCANEMPTY)) {
++ /* We need only read few bytes from the OOB area */
++ scanlen = ooblen = 0;
++ readlen = bd->len;
++ } else {
++ /* Full page content should be read */
++ scanlen = mtd->oobblock + mtd->oobsize;
++ readlen = len * mtd->oobblock;
++ ooblen = len * mtd->oobsize;
++ }
++
++ if (chip == -1) {
++ /* Note that numblocks is 2 * (real numblocks) here, see i+=2 below as it
++ * makes shifting and masking less painful */
++ numblocks = mtd->size >> (this->bbt_erase_shift - 1);
++ startblock = 0;
++ from = 0;
++ } else {
++ if (chip >= this->numchips) {
++ puts ("create_bbt(): chipnr (");
++ putx (chip + 1);
++ puts (" > available chips ");
++ putx (this->numchips);
++ putnl ();
++ return -EINVAL;
++ }
++ numblocks = this->chipsize >> (this->bbt_erase_shift - 1);
++ startblock = chip * numblocks;
++ numblocks += startblock;
++ from = startblock << (this->bbt_erase_shift - 1);
++ }
++
++ for (i = startblock; i < numblocks;) {
++ int ret;
++
++ if (bd->options & NAND_BBT_SCANEMPTY)
++ if ((ret = nand_read_raw (mtd, buf, from, readlen, ooblen)))
++ return ret;
++
++ for (j = 0; j < len; j++) {
++ if (!(bd->options & NAND_BBT_SCANEMPTY)) {
++ size_t retlen;
++
++ /* Read the full oob until read_oob is fixed to
++ * handle single byte reads for 16 bit buswidth */
++ ret = mtd->read_oob(mtd, from + j * mtd->oobblock,
++ mtd->oobsize, &retlen, buf);
++ if (ret)
++ return ret;
++
++ if (check_short_pattern (buf, bd)) {
++ this->bbt[i >> 3] |= 0x03 << (i & 0x6);
++ puts ("Bad eraseblock ");
++ putx (i >> 1);
++ puts (" at ");
++ putx ((unsigned int) from);
++ putnl ();
++ break;
++ }
++ } else {
++ if (check_pattern (&buf[j * scanlen], scanlen, mtd->oobblock, bd)) {
++ this->bbt[i >> 3] |= 0x03 << (i & 0x6);
++ puts ("Bad eraseblock ");
++ putx (i >> 1);
++ puts (" at ");
++ putx ((unsigned int) from);
++ putnl ();
++ break;
++ }
++ }
++ }
++ i += 2;
++ from += (1 << this->bbt_erase_shift);
++ }
++ return 0;
++}
++
++/**
++ * search_bbt - [GENERIC] scan the device for a specific bad block table
++ * @mtd: MTD device structure
++ * @buf: temporary buffer
++ * @td: descriptor for the bad block table
++ *
++ * Read the bad block table by searching for a given ident pattern.
++ * Search is preformed either from the beginning up or from the end of
++ * the device downwards. The search starts always at the start of a
++ * block.
++ * If the option NAND_BBT_PERCHIP is given, each chip is searched
++ * for a bbt, which contains the bad block information of this chip.
++ * This is neccecary to provide support for certain DOC devices.
++ *
++ * The bbt ident pattern resides in the oob area of the first page
++ * in a block.
++ */
++static int search_bbt (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td)
++{
++ struct nand_chip *this = mtd->priv;
++ int i, chips;
++ int bits, startblock, block, dir;
++ int scanlen = mtd->oobblock + mtd->oobsize;
++ int bbtblocks;
++
++ /* Search direction top -> down ? */
++ if (td->options & NAND_BBT_LASTBLOCK) {
++ startblock = (mtd->size >> this->bbt_erase_shift) -1;
++ dir = -1;
++ } else {
++ startblock = 0;
++ dir = 1;
++ }
++
++ /* Do we have a bbt per chip ? */
++ if (td->options & NAND_BBT_PERCHIP) {
++ chips = this->numchips;
++ bbtblocks = this->chipsize >> this->bbt_erase_shift;
++ startblock &= bbtblocks - 1;
++ } else {
++ chips = 1;
++ bbtblocks = mtd->size >> this->bbt_erase_shift;
++ }
++
++ /* Number of bits for each erase block in the bbt */
++ bits = td->options & NAND_BBT_NRBITS_MSK;
++
++ for (i = 0; i < chips; i++) {
++ /* Reset version information */
++ td->version[i] = 0;
++ td->pages[i] = -1;
++ /* Scan the maximum number of blocks */
++ for (block = 0; block < td->maxblocks; block++) {
++ int actblock = startblock + dir * block;
++ /* Read first page */
++ nand_read_raw (mtd, buf, actblock << this->bbt_erase_shift, mtd->oobblock, mtd->oobsize);
++ if (!check_pattern(buf, scanlen, mtd->oobblock, td)) {
++ td->pages[i] = actblock << (this->bbt_erase_shift - this->page_shift);
++ if (td->options & NAND_BBT_VERSION) {
++ td->version[i] = buf[mtd->oobblock + td->veroffs];
++ }
++ break;
++ }
++ }
++ startblock += this->chipsize >> this->bbt_erase_shift;
++ }
++ /* Check, if we found a bbt for each requested chip */
++ for (i = 0; i < chips; i++) {
++ if (td->pages[i] == -1) {
++ puts ("Bad block table not found for chip ");
++ putx (i);
++ putnl ();
++ } else {
++ puts ("Bad block table found at page ");
++ putx (td->pages[i]);
++ puts (" version ");
++ putx (td->version[i]);
++ putnl ();
++ }
++ }
++ return 0;
++}
++
++/**
++ * search_read_bbts - [GENERIC] scan the device for bad block table(s)
++ * @mtd: MTD device structure
++ * @buf: temporary buffer
++ * @td: descriptor for the bad block table
++ * @md: descriptor for the bad block table mirror
++ *
++ * Search and read the bad block table(s)
++*/
++static int search_read_bbts (struct mtd_info *mtd, uint8_t *buf,
++ struct nand_bbt_descr *td, struct nand_bbt_descr *md)
++{
++ /* Search the primary table */
++ search_bbt (mtd, buf, td);
++
++ /* Search the mirror table */
++ if (md)
++ search_bbt (mtd, buf, md);
++
++ /* Force result check */
++ return 1;
++}
++
++
++/**
++ * write_bbt - [GENERIC] (Re)write the bad block table
++ *
++ * @mtd: MTD device structure
++ * @buf: temporary buffer
++ * @td: descriptor for the bad block table
++ * @md: descriptor for the bad block table mirror
++ * @chipsel: selector for a specific chip, -1 for all
++ *
++ * (Re)write the bad block table
++ *
++*/
++static int write_bbt (struct mtd_info *mtd, uint8_t *buf,
++ struct nand_bbt_descr *td, struct nand_bbt_descr *md, int chipsel)
++{
++ struct nand_chip *this = mtd->priv;
++ struct nand_oobinfo oobinfo;
++ struct erase_info einfo;
++ int i, j, res, chip = 0;
++ int bits, startblock, dir, page, offs, numblocks, sft, sftmsk;
++ int nrchips, bbtoffs, pageoffs;
++ uint8_t msk[4];
++ uint8_t rcode = td->reserved_block_code;
++ size_t retlen, len = 0;
++ loff_t to;
++
++ if (!rcode)
++ rcode = 0xff;
++ /* Write bad block table per chip rather than per device ? */
++ if (td->options & NAND_BBT_PERCHIP) {
++ numblocks = (int) (this->chipsize >> this->bbt_erase_shift);
++ /* Full device write or specific chip ? */
++ if (chipsel == -1) {
++ nrchips = this->numchips;
++ } else {
++ nrchips = chipsel + 1;
++ chip = chipsel;
++ }
++ } else {
++ numblocks = (int) (mtd->size >> this->bbt_erase_shift);
++ nrchips = 1;
++ }
++
++ /* Loop through the chips */
++ for (; chip < nrchips; chip++) {
++
++ /* There was already a version of the table, reuse the page
++ * This applies for absolute placement too, as we have the
++ * page nr. in td->pages.
++ */
++ if (td->pages[chip] != -1) {
++ page = td->pages[chip];
++ goto write;
++ }
++
++ /* Automatic placement of the bad block table */
++ /* Search direction top -> down ? */
++ if (td->options & NAND_BBT_LASTBLOCK) {
++ startblock = numblocks * (chip + 1) - 1;
++ dir = -1;
++ } else {
++ startblock = chip * numblocks;
++ dir = 1;
++ }
++
++ for (i = 0; i < td->maxblocks; i++) {
++ int block = startblock + dir * i;
++ /* Check, if the block is bad */
++ switch ((this->bbt[block >> 2] >> (2 * (block & 0x03))) & 0x03) {
++ case 0x01:
++ case 0x03:
++ continue;
++ }
++ page = block << (this->bbt_erase_shift - this->page_shift);
++ /* Check, if the block is used by the mirror table */
++ if (!md || md->pages[chip] != page)
++ goto write;
++ }
++ puts ("No space left to write bad block table\r\n");
++ return -ENOSPC;
++write:
++
++ /* Set up shift count and masks for the flash table */
++ bits = td->options & NAND_BBT_NRBITS_MSK;
++ switch (bits) {
++ case 1: sft = 3; sftmsk = 0x07; msk[0] = 0x00; msk[1] = 0x01; msk[2] = ~rcode; msk[3] = 0x01; break;
++ case 2: sft = 2; sftmsk = 0x06; msk[0] = 0x00; msk[1] = 0x01; msk[2] = ~rcode; msk[3] = 0x03; break;
++ case 4: sft = 1; sftmsk = 0x04; msk[0] = 0x00; msk[1] = 0x0C; msk[2] = ~rcode; msk[3] = 0x0f; break;
++ case 8: sft = 0; sftmsk = 0x00; msk[0] = 0x00; msk[1] = 0x0F; msk[2] = ~rcode; msk[3] = 0xff; break;
++ default: return -EINVAL;
++ }
++
++ bbtoffs = chip * (numblocks >> 2);
++
++ to = ((loff_t) page) << this->page_shift;
++
++ memcpy (&oobinfo, this->autooob, sizeof(oobinfo));
++ oobinfo.useecc = MTD_NANDECC_PLACEONLY;
++
++ /* Must we save the block contents ? */
++ if (td->options & NAND_BBT_SAVECONTENT) {
++ /* Make it block aligned */
++ to &= ~((loff_t) ((1 << this->bbt_erase_shift) - 1));
++ len = 1 << this->bbt_erase_shift;
++ res = mtd->read_ecc (mtd, to, len, &retlen, buf, &buf[len], &oobinfo);
++ if (res < 0) {
++ if (retlen != len) {
++ puts ("nand_bbt: Error reading block for writing the bad block table\r\n");
++ return res;
++ }
++ puts ("nand_bbt: ECC error while reading block for writing bad block table\r\n");
++ }
++ /* Calc the byte offset in the buffer */
++ pageoffs = page - (int)(to >> this->page_shift);
++ offs = pageoffs << this->page_shift;
++ /* Preset the bbt area with 0xff */
++ memset (&buf[offs], 0xff, (size_t)(numblocks >> sft));
++ /* Preset the bbt's oob area with 0xff */
++ memset (&buf[len + pageoffs * mtd->oobsize], 0xff,
++ ((len >> this->page_shift) - pageoffs) * mtd->oobsize);
++ if (td->options & NAND_BBT_VERSION) {
++ buf[len + (pageoffs * mtd->oobsize) + td->veroffs] = td->version[chip];
++ }
++ } else {
++ /* Calc length */
++ len = (size_t) (numblocks >> sft);
++ /* Make it page aligned ! */
++ len = (len + (mtd->oobblock-1)) & ~(mtd->oobblock-1);
++ /* Preset the buffer with 0xff */
++ memset (buf, 0xff, len + (len >> this->page_shift) * mtd->oobsize);
++ offs = 0;
++ /* Pattern is located in oob area of first page */
++ memcpy (&buf[len + td->offs], td->pattern, td->len);
++ if (td->options & NAND_BBT_VERSION) {
++ buf[len + td->veroffs] = td->version[chip];
++ }
++ }
++
++ /* walk through the memory table */
++ for (i = 0; i < numblocks; ) {
++ uint8_t dat;
++ dat = this->bbt[bbtoffs + (i >> 2)];
++ for (j = 0; j < 4; j++ , i++) {
++ int sftcnt = (i << (3 - sft)) & sftmsk;
++ /* Do not store the reserved bbt blocks ! */
++ buf[offs + (i >> sft)] &= ~(msk[dat & 0x03] << sftcnt);
++ dat >>= 2;
++ }
++ }
++
++ memset (&einfo, 0, sizeof (einfo));
++ einfo.mtd = mtd;
++ einfo.addr = (unsigned long) to;
++ einfo.len = 1 << this->bbt_erase_shift;
++ res = nand_erase_nand (mtd, &einfo, 1);
++ if (res < 0) {
++ puts ("nand_bbt: Error during block erase: ");
++ putx (res);
++ putnl();
++ return res;
++ }
++
++ res = mtd->write_ecc (mtd, to, len, &retlen, buf, &buf[len], &oobinfo);
++ if (res < 0) {
++ puts ("nand_bbt: Error while writing bad block table ");
++ putx (res);
++ putnl ();
++ return res;
++ }
++ puts ("Bad block table written to ");
++ putx ((unsigned int) to);
++ puts (", version ");
++ putx (td->version[chip]);
++ putnl ();
++
++ /* Mark it as used */
++ td->pages[chip] = page;
++ }
++ return 0;
++}
++
++/**
++ * nand_memory_bbt - [GENERIC] create a memory based bad block table
++ * @mtd: MTD device structure
++ * @bd: descriptor for the good/bad block search pattern
++ *
++ * The function creates a memory based bbt by scanning the device
++ * for manufacturer / software marked good / bad blocks
++*/
++static inline int nand_memory_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd)
++{
++ struct nand_chip *this = mtd->priv;
++
++ bd->options &= ~NAND_BBT_SCANEMPTY;
++ return create_bbt (mtd, this->data_buf, bd, -1);
++}
++
++/**
++ * check_create - [GENERIC] create and write bbt(s) if neccecary
++ * @mtd: MTD device structure
++ * @buf: temporary buffer
++ * @bd: descriptor for the good/bad block search pattern
++ *
++ * The function checks the results of the previous call to read_bbt
++ * and creates / updates the bbt(s) if neccecary
++ * Creation is neccecary if no bbt was found for the chip/device
++ * Update is neccecary if one of the tables is missing or the
++ * version nr. of one table is less than the other
++*/
++static int check_create (struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *bd)
++{
++ int i, chips, writeops, chipsel, res;
++ struct nand_chip *this = mtd->priv;
++ struct nand_bbt_descr *td = this->bbt_td;
++ struct nand_bbt_descr *md = this->bbt_md;
++ struct nand_bbt_descr *rd, *rd2;
++
++ /* Do we have a bbt per chip ? */
++ if (td->options & NAND_BBT_PERCHIP)
++ chips = this->numchips;
++ else
++ chips = 1;
++
++ for (i = 0; i < chips; i++) {
++ writeops = 0;
++ rd = NULL;
++ rd2 = NULL;
++ /* Per chip or per device ? */
++ chipsel = (td->options & NAND_BBT_PERCHIP) ? i : -1;
++ /* Mirrored table avilable ? */
++ if (md) {
++ if (td->pages[i] == -1 && md->pages[i] == -1) {
++ writeops = 0x03;
++ goto create;
++ }
++
++ if (td->pages[i] == -1) {
++ rd = md;
++ td->version[i] = md->version[i];
++ writeops = 1;
++ goto writecheck;
++ }
++
++ if (md->pages[i] == -1) {
++ rd = td;
++ md->version[i] = td->version[i];
++ writeops = 2;
++ goto writecheck;
++ }
++
++ if (td->version[i] == md->version[i]) {
++ rd = td;
++ if (!(td->options & NAND_BBT_VERSION))
++ rd2 = md;
++ goto writecheck;
++ }
++
++ if (((int8_t) (td->version[i] - md->version[i])) > 0) {
++ rd = td;
++ md->version[i] = td->version[i];
++ writeops = 2;
++ } else {
++ rd = md;
++ td->version[i] = md->version[i];
++ writeops = 1;
++ }
++
++ goto writecheck;
++
++ } else {
++ if (td->pages[i] == -1) {
++ writeops = 0x01;
++ goto create;
++ }
++ rd = td;
++ goto writecheck;
++ }
++create:
++ /* Create the bad block table by scanning the device ? */
++ if (!(td->options & NAND_BBT_CREATE))
++ continue;
++
++ /* Create the table in memory by scanning the chip(s) */
++ create_bbt (mtd, buf, bd, chipsel);
++
++ td->version[i] = 1;
++ if (md)
++ md->version[i] = 1;
++writecheck:
++ /* read back first ? */
++ if (rd)
++ read_abs_bbt (mtd, buf, rd, chipsel);
++ /* If they weren't versioned, read both. */
++ if (rd2)
++ read_abs_bbt (mtd, buf, rd2, chipsel);
++
++ /* Write the bad block table to the device ? */
++ if ((writeops & 0x01) && (td->options & NAND_BBT_WRITE)) {
++ res = write_bbt (mtd, buf, td, md, chipsel);
++ if (res < 0)
++ return res;
++ }
++
++ /* Write the mirror bad block table to the device ? */
++ if ((writeops & 0x02) && md && (md->options & NAND_BBT_WRITE)) {
++ res = write_bbt (mtd, buf, md, td, chipsel);
++ if (res < 0)
++ return res;
++ }
++ }
++ return 0;
++}
++
++/**
++ * mark_bbt_regions - [GENERIC] mark the bad block table regions
++ * @mtd: MTD device structure
++ * @td: bad block table descriptor
++ *
++ * The bad block table regions are marked as "bad" to prevent
++ * accidental erasures / writes. The regions are identified by
++ * the mark 0x02.
++*/
++static void mark_bbt_region (struct mtd_info *mtd, struct nand_bbt_descr *td)
++{
++ struct nand_chip *this = mtd->priv;
++ int i, j, chips, block, nrblocks, update;
++ uint8_t oldval, newval;
++
++ /* Do we have a bbt per chip ? */
++ if (td->options & NAND_BBT_PERCHIP) {
++ chips = this->numchips;
++ nrblocks = (int)(this->chipsize >> this->bbt_erase_shift);
++ } else {
++ chips = 1;
++ nrblocks = (int)(mtd->size >> this->bbt_erase_shift);
++ }
++
++ for (i = 0; i < chips; i++) {
++ if ((td->options & NAND_BBT_ABSPAGE) ||
++ !(td->options & NAND_BBT_WRITE)) {
++ if (td->pages[i] == -1) continue;
++ block = td->pages[i] >> (this->bbt_erase_shift - this->page_shift);
++ block <<= 1;
++ oldval = this->bbt[(block >> 3)];
++ newval = oldval | (0x2 << (block & 0x06));
++ this->bbt[(block >> 3)] = newval;
++ if ((oldval != newval) && td->reserved_block_code)
++ nand_update_bbt(mtd, block << (this->bbt_erase_shift - 1));
++ continue;
++ }
++ update = 0;
++ if (td->options & NAND_BBT_LASTBLOCK)
++ block = ((i + 1) * nrblocks) - td->maxblocks;
++ else
++ block = i * nrblocks;
++ block <<= 1;
++ for (j = 0; j < td->maxblocks; j++) {
++ oldval = this->bbt[(block >> 3)];
++ newval = oldval | (0x2 << (block & 0x06));
++ this->bbt[(block >> 3)] = newval;
++ if (oldval != newval) update = 1;
++ block += 2;
++ }
++ /* If we want reserved blocks to be recorded to flash, and some
++ new ones have been marked, then we need to update the stored
++ bbts. This should only happen once. */
++ if (update && td->reserved_block_code)
++ nand_update_bbt(mtd, (block - 2) << (this->bbt_erase_shift - 1));
++ }
++}
++
++/**
++ * nand_scan_bbt - [NAND Interface] scan, find, read and maybe create bad block table(s)
++ * @mtd: MTD device structure
++ * @bd: descriptor for the good/bad block search pattern
++ *
++ * The function checks, if a bad block table(s) is/are already
++ * available. If not it scans the device for manufacturer
++ * marked good / bad blocks and writes the bad block table(s) to
++ * the selected place.
++ *
++ * The bad block table memory is allocated here. It must be freed
++ * by calling the nand_free_bbt function.
++ *
++*/
++int nand_scan_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd)
++{
++ struct nand_chip *this = mtd->priv;
++ int len, res = 0;
++ uint8_t *buf;
++ struct nand_bbt_descr *td = this->bbt_td;
++ struct nand_bbt_descr *md = this->bbt_md;
++
++ len = mtd->size >> (this->bbt_erase_shift + 2);
++ /* Allocate memory (2bit per block) */
++ this->bbt = malloc (len);
++ if (!this->bbt) {
++ puts ("nand_scan_bbt: Out of memory\r\n");
++ return -ENOMEM;
++ }
++ /* Clear the memory bad block table */
++ memset (this->bbt, 0x00, len);
++
++ /* If no primary table decriptor is given, scan the device
++ * to build a memory based bad block table
++ */
++ if (!td) {
++ if ((res = nand_memory_bbt(mtd, bd))) {
++ puts ("nand_bbt: Can't scan flash and build the RAM-based BBT\r\n");
++ free (this->bbt);
++ this->bbt = NULL;
++ }
++ return res;
++ }
++
++ /* Allocate a temporary buffer for one eraseblock incl. oob */
++ len = (1 << this->bbt_erase_shift);
++ len += (len >> this->page_shift) * mtd->oobsize;
++ buf = malloc (len);
++ if (!buf) {
++ puts ("nand_bbt: Out of memory\r\n");
++ free (this->bbt);
++ this->bbt = NULL;
++ return -ENOMEM;
++ }
++
++ /* Is the bbt at a given page ? */
++ if (td->options & NAND_BBT_ABSPAGE) {
++ res = read_abs_bbts (mtd, buf, td, md);
++ } else {
++ /* Search the bad block table using a pattern in oob */
++ res = search_read_bbts (mtd, buf, td, md);
++ }
++
++ if (res)
++ res = check_create (mtd, buf, bd);
++
++ /* Prevent the bbt regions from erasing / writing */
++ mark_bbt_region (mtd, td);
++ if (md)
++ mark_bbt_region (mtd, md);
++
++ free (buf);
++ return res;
++}
++
++
++/**
++ * nand_update_bbt - [NAND Interface] update bad block table(s)
++ * @mtd: MTD device structure
++ * @offs: the offset of the newly marked block
++ *
++ * The function updates the bad block table(s)
++*/
++int nand_update_bbt (struct mtd_info *mtd, loff_t offs)
++{
++ struct nand_chip *this = mtd->priv;
++ int len, res = 0, writeops = 0;
++ int chip, chipsel;
++ uint8_t *buf;
++ struct nand_bbt_descr *td = this->bbt_td;
++ struct nand_bbt_descr *md = this->bbt_md;
++
++ if (!this->bbt || !td)
++ return -EINVAL;
++
++ len = mtd->size >> (this->bbt_erase_shift + 2);
++ /* Allocate a temporary buffer for one eraseblock incl. oob */
++ len = (1 << this->bbt_erase_shift);
++ len += (len >> this->page_shift) * mtd->oobsize;
++ buf = malloc (len);
++ if (!buf) {
++ puts ("nand_update_bbt: Out of memory\r\n");
++ return -ENOMEM;
++ }
++
++ writeops = md != NULL ? 0x03 : 0x01;
++
++ /* Do we have a bbt per chip ? */
++ if (td->options & NAND_BBT_PERCHIP) {
++ chip = (int) (offs >> this->chip_shift);
++ chipsel = chip;
++ } else {
++ chip = 0;
++ chipsel = -1;
++ }
++
++ td->version[chip]++;
++ if (md)
++ md->version[chip]++;
++
++ /* Write the bad block table to the device ? */
++ if ((writeops & 0x01) && (td->options & NAND_BBT_WRITE)) {
++ res = write_bbt (mtd, buf, td, md, chipsel);
++ if (res < 0)
++ goto out;
++ }
++ /* Write the mirror bad block table to the device ? */
++ if ((writeops & 0x02) && md && (md->options & NAND_BBT_WRITE)) {
++ res = write_bbt (mtd, buf, md, td, chipsel);
++ }
++
++out:
++ free (buf);
++ return res;
++}
++
++/* Define some generic bad / good block scan pattern which are used
++ * while scanning a device for factory marked good / bad blocks. */
++static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
++
++static struct nand_bbt_descr smallpage_memorybased = {
++ .options = NAND_BBT_SCAN2NDPAGE,
++ .offs = 5,
++ .len = 1,
++ .pattern = scan_ff_pattern
++};
++
++static struct nand_bbt_descr largepage_memorybased = {
++ .options = 0,
++ .offs = 0,
++ .len = 2,
++ .pattern = scan_ff_pattern
++};
++
++static struct nand_bbt_descr smallpage_flashbased = {
++ .options = NAND_BBT_SCANEMPTY | NAND_BBT_SCANALLPAGES,
++ .offs = 5,
++ .len = 1,
++ .pattern = scan_ff_pattern
++};
++
++static struct nand_bbt_descr largepage_flashbased = {
++ .options = NAND_BBT_SCANEMPTY | NAND_BBT_SCANALLPAGES,
++ .offs = 0,
++ .len = 2,
++ .pattern = scan_ff_pattern
++};
++
++static uint8_t scan_agand_pattern[] = { 0x1C, 0x71, 0xC7, 0x1C, 0x71, 0xC7 };
++
++static struct nand_bbt_descr agand_flashbased = {
++ .options = NAND_BBT_SCANEMPTY | NAND_BBT_SCANALLPAGES,
++ .offs = 0x20,
++ .len = 6,
++ .pattern = scan_agand_pattern
++};
++
++/* Generic flash bbt decriptors
++*/
++static uint8_t bbt_pattern[] = {'B', 'b', 't', '0' };
++static uint8_t mirror_pattern[] = {'1', 't', 'b', 'B' };
++
++static struct nand_bbt_descr bbt_main_descr = {
++ .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
++ | NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
++ .offs = 8,
++ .len = 4,
++ .veroffs = 12,
++ .maxblocks = 4,
++ .pattern = bbt_pattern
++};
++
++static struct nand_bbt_descr bbt_mirror_descr = {
++ .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
++ | NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
++ .offs = 8,
++ .len = 4,
++ .veroffs = 12,
++ .maxblocks = 4,
++ .pattern = mirror_pattern
++};
++
++/**
++ * nand_default_bbt - [NAND Interface] Select a default bad block table for the device
++ * @mtd: MTD device structure
++ *
++ * This function selects the default bad block table
++ * support for the device and calls the nand_scan_bbt function
++ *
++*/
++int nand_default_bbt (struct mtd_info *mtd)
++{
++ struct nand_chip *this = mtd->priv;
++
++ /* Default for AG-AND. We must use a flash based
++ * bad block table as the devices have factory marked
++ * _good_ blocks. Erasing those blocks leads to loss
++ * of the good / bad information, so we _must_ store
++ * this information in a good / bad table during
++ * startup
++ */
++ if (this->options & NAND_IS_AND) {
++ /* Use the default pattern descriptors */
++ if (!this->bbt_td) {
++ this->bbt_td = &bbt_main_descr;
++ this->bbt_md = &bbt_mirror_descr;
++ }
++ this->options |= NAND_USE_FLASH_BBT;
++ return nand_scan_bbt (mtd, &agand_flashbased);
++ }
++
++
++ /* Is a flash based bad block table requested ? */
++ if (this->options & NAND_USE_FLASH_BBT) {
++ /* Use the default pattern descriptors */
++ if (!this->bbt_td) {
++ this->bbt_td = &bbt_main_descr;
++ this->bbt_md = &bbt_mirror_descr;
++ }
++ if (!this->badblock_pattern) {
++ this->badblock_pattern = (mtd->oobblock > 512) ?
++ &largepage_flashbased : &smallpage_flashbased;
++ }
++ } else {
++ this->bbt_td = NULL;
++ this->bbt_md = NULL;
++ if (!this->badblock_pattern) {
++ this->badblock_pattern = (mtd->oobblock > 512) ?
++ &largepage_memorybased : &smallpage_memorybased;
++ }
++ }
++ return nand_scan_bbt (mtd, this->badblock_pattern);
++}
++
++/**
++ * nand_isbad_bbt - [NAND Interface] Check if a block is bad
++ * @mtd: MTD device structure
++ * @offs: offset in the device
++ * @allowbbt: allow access to bad block table region
++ *
++*/
++int nand_isbad_bbt (struct mtd_info *mtd, loff_t offs, int allowbbt)
++{
++ struct nand_chip *this = mtd->priv;
++ int block;
++ uint8_t res;
++
++ /* Get block number * 2 */
++ block = (int) (offs >> (this->bbt_erase_shift - 1));
++ res = (this->bbt[block >> 3] >> (block & 0x06)) & 0x03;
++
++ DEBUG (MTD_DEBUG_LEVEL2, "nand_isbad_bbt(): bbt info for offs 0x%08x: (block %d) 0x%02x\n",
++ (unsigned int)offs, block >> 1, res);
++
++ switch ((int)res) {
++ case 0x00: return 0;
++ case 0x01: return 1;
++ case 0x02: return allowbbt ? 0 : 1;
++ }
++ return 1;
++}
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand_ecc.c linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand_ecc.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand_ecc.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand_ecc.c 2006-08-04 16:38:14.000000000 +0200
+@@ -0,0 +1,246 @@
++/*
++ * This file contains an ECC algorithm from Toshiba that detects and
++ * corrects 1 bit errors in a 256 byte block of data.
++ *
++ * Taken from drivers/mtd/nand/nand_ecc.c, modified for
++ * NAND flash boot on Etrax FS.
++ *
++ * Copyright (C) 2000-2004 Steven J. Hill (sjhill@realitydiluted.com)
++ * Toshiba America Electronics Components, Inc.
++ *
++ * $Id: nand_ecc.c,v 1.1 2006/08/04 14:38:14 ricardw Exp $
++ *
++ * This file is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the
++ * Free Software Foundation; either version 2 or (at your option) any
++ * later version.
++ *
++ * This file is distributed in the hope that it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
++ * for more details.
++ *
++ * You should have received a copy of the GNU General Public License along
++ * with this file; if not, write to the Free Software Foundation, Inc.,
++ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
++ *
++ * As a special exception, if other files instantiate templates or use
++ * macros or inline functions from these files, or you compile these
++ * files and link them with other works to produce a work based on these
++ * files, these files do not by themselves cause the resulting work to be
++ * covered by the GNU General Public License. However the source code for
++ * these files must still be made available in accordance with section (3)
++ * of the GNU General Public License.
++ *
++ * This exception does not invalidate any other reasons why a work based on
++ * this file might be covered by the GNU General Public License.
++ */
++
++#include <linux/types.h>
++#if 0
++#include <linux/kernel.h>
++#include <linux/module.h>
++#endif
++#include "nand_ecc.h"
++
++/*
++ * Pre-calculated 256-way 1 byte column parity
++ */
++static const u_char nand_ecc_precalc_table[] = {
++ 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00,
++ 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
++ 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
++ 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
++ 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
++ 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
++ 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
++ 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
++ 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
++ 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
++ 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
++ 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
++ 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
++ 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
++ 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
++ 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00
++};
++
++
++/**
++ * nand_trans_result - [GENERIC] create non-inverted ECC
++ * @reg2: line parity reg 2
++ * @reg3: line parity reg 3
++ * @ecc_code: ecc
++ *
++ * Creates non-inverted ECC code from line parity
++ */
++static void nand_trans_result(u_char reg2, u_char reg3,
++ u_char *ecc_code)
++{
++ u_char a, b, i, tmp1, tmp2;
++
++ /* Initialize variables */
++ a = b = 0x80;
++ tmp1 = tmp2 = 0;
++
++ /* Calculate first ECC byte */
++ for (i = 0; i < 4; i++) {
++ if (reg3 & a) /* LP15,13,11,9 --> ecc_code[0] */
++ tmp1 |= b;
++ b >>= 1;
++ if (reg2 & a) /* LP14,12,10,8 --> ecc_code[0] */
++ tmp1 |= b;
++ b >>= 1;
++ a >>= 1;
++ }
++
++ /* Calculate second ECC byte */
++ b = 0x80;
++ for (i = 0; i < 4; i++) {
++ if (reg3 & a) /* LP7,5,3,1 --> ecc_code[1] */
++ tmp2 |= b;
++ b >>= 1;
++ if (reg2 & a) /* LP6,4,2,0 --> ecc_code[1] */
++ tmp2 |= b;
++ b >>= 1;
++ a >>= 1;
++ }
++
++ /* Store two of the ECC bytes */
++ ecc_code[0] = tmp1;
++ ecc_code[1] = tmp2;
++}
++
++/**
++ * nand_calculate_ecc - [NAND Interface] Calculate 3 byte ECC code for 256 byte block
++ * @mtd: MTD block structure
++ * @dat: raw data
++ * @ecc_code: buffer for ECC
++ */
++int nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
++{
++ u_char idx, reg1, reg2, reg3;
++ int j;
++
++ /* Initialize variables */
++ reg1 = reg2 = reg3 = 0;
++ ecc_code[0] = ecc_code[1] = ecc_code[2] = 0;
++
++ /* Build up column parity */
++ for(j = 0; j < 256; j++) {
++
++ /* Get CP0 - CP5 from table */
++ idx = nand_ecc_precalc_table[dat[j]];
++ reg1 ^= (idx & 0x3f);
++
++ /* All bit XOR = 1 ? */
++ if (idx & 0x40) {
++ reg3 ^= (u_char) j;
++ reg2 ^= ~((u_char) j);
++ }
++ }
++
++ /* Create non-inverted ECC code from line parity */
++ nand_trans_result(reg2, reg3, ecc_code);
++
++ /* Calculate final ECC code */
++ ecc_code[0] = ~ecc_code[0];
++ ecc_code[1] = ~ecc_code[1];
++ ecc_code[2] = ((~reg1) << 2) | 0x03;
++ return 0;
++}
++
++/**
++ * nand_correct_data - [NAND Interface] Detect and correct bit error(s)
++ * @mtd: MTD block structure
++ * @dat: raw data read from the chip
++ * @read_ecc: ECC from the chip
++ * @calc_ecc: the ECC calculated from raw data
++ *
++ * Detect and correct a 1 bit error for 256 byte block
++ */
++int nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc)
++{
++ u_char a, b, c, d1, d2, d3, add, bit, i;
++
++ /* Do error detection */
++ d1 = calc_ecc[0] ^ read_ecc[0];
++ d2 = calc_ecc[1] ^ read_ecc[1];
++ d3 = calc_ecc[2] ^ read_ecc[2];
++
++ if ((d1 | d2 | d3) == 0) {
++ /* No errors */
++ return 0;
++ }
++ else {
++ a = (d1 ^ (d1 >> 1)) & 0x55;
++ b = (d2 ^ (d2 >> 1)) & 0x55;
++ c = (d3 ^ (d3 >> 1)) & 0x54;
++
++ /* Found and will correct single bit error in the data */
++ if ((a == 0x55) && (b == 0x55) && (c == 0x54)) {
++ c = 0x80;
++ add = 0;
++ a = 0x80;
++ for (i=0; i<4; i++) {
++ if (d1 & c)
++ add |= a;
++ c >>= 2;
++ a >>= 1;
++ }
++ c = 0x80;
++ for (i=0; i<4; i++) {
++ if (d2 & c)
++ add |= a;
++ c >>= 2;
++ a >>= 1;
++ }
++ bit = 0;
++ b = 0x04;
++ c = 0x80;
++ for (i=0; i<3; i++) {
++ if (d3 & c)
++ bit |= b;
++ c >>= 2;
++ b >>= 1;
++ }
++ b = 0x01;
++ a = dat[add];
++ a ^= (b << bit);
++ dat[add] = a;
++ return 1;
++ }
++ else {
++ i = 0;
++ while (d1) {
++ if (d1 & 0x01)
++ ++i;
++ d1 >>= 1;
++ }
++ while (d2) {
++ if (d2 & 0x01)
++ ++i;
++ d2 >>= 1;
++ }
++ while (d3) {
++ if (d3 & 0x01)
++ ++i;
++ d3 >>= 1;
++ }
++ if (i == 1) {
++ /* ECC Code Error Correction */
++ read_ecc[0] = calc_ecc[0];
++ read_ecc[1] = calc_ecc[1];
++ read_ecc[2] = calc_ecc[2];
++ return 2;
++ }
++ else {
++ /* Uncorrectable Error */
++ return -1;
++ }
++ }
++ }
++
++ /* Should never happen */
++ return -1;
++}
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand_ecc.h linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand_ecc.h
+--- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand_ecc.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand_ecc.h 2006-08-04 16:38:14.000000000 +0200
+@@ -0,0 +1,30 @@
++/*
++ * drivers/mtd/nand_ecc.h
++ *
++ * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
++ *
++ * $Id: nand_ecc.h,v 1.1 2006/08/04 14:38:14 ricardw Exp $
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * This file is the header for the ECC algorithm.
++ */
++
++#ifndef __MTD_NAND_ECC_H__
++#define __MTD_NAND_ECC_H__
++
++struct mtd_info;
++
++/*
++ * Calculate 3 byte ECC code for 256 byte block
++ */
++int nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code);
++
++/*
++ * Detect and correct a 1 bit error for 256 byte block
++ */
++int nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc);
++
++#endif /* __MTD_NAND_ECC_H__ */
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand_ids.c linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand_ids.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/nand_ids.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/nand_ids.c 2006-08-04 16:38:14.000000000 +0200
+@@ -0,0 +1,133 @@
++/*
++ * drivers/mtd/nandids.c
++ *
++ * Copyright (C) 2002 Thomas Gleixner (tglx@linutronix.de)
++ *
++ * $Id: nand_ids.c,v 1.1 2006/08/04 14:38:14 ricardw Exp $
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++#if 0
++#include <linux/module.h>
++#endif
++
++#include "nand.h"
++/*
++* Chip ID list
++*
++* Name. ID code, pagesize, chipsize in MegaByte, eraseblock size,
++* options
++*
++* Pagesize; 0, 256, 512
++* 0 get this information from the extended chip ID
+++ 256 256 Byte page size
++* 512 512 Byte page size
++*/
++struct nand_flash_dev nand_flash_ids[] = {
++ {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
++ {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
++ {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
++ {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
++ {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
++ {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
++ {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
++ {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
++ {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
++ {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
++
++ {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
++ {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
++ {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
++ {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
++
++ {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
++ {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
++ {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
++ {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
++
++ {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
++ {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
++ {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
++ {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
++
++ {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
++ {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
++ {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
++ {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
++
++ {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
++ {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0},
++ {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
++ {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
++ {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16},
++ {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
++ {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16},
++
++ {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
++
++ /* These are the new chips with large page size. The pagesize
++ * and the erasesize is determined from the extended id bytes
++ */
++ /*512 Megabit */
++ {"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
++ {"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
++ {"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
++ {"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
++
++ /* 1 Gigabit */
++ {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
++ {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
++ {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
++ {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
++
++ /* 2 Gigabit */
++ {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
++ {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
++ {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
++ {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
++
++ /* 4 Gigabit */
++ {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
++ {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
++ {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
++ {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
++
++ /* 8 Gigabit */
++ {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
++ {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
++ {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
++ {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
++
++ /* 16 Gigabit */
++ {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
++ {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
++ {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
++ {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
++
++ /* Renesas AND 1 Gigabit. Those chips do not support extended id and have a strange page/block layout !
++ * The chosen minimum erasesize is 4 * 2 * 2048 = 16384 Byte, as those chips have an array of 4 page planes
++ * 1 block = 2 pages, but due to plane arrangement the blocks 0-3 consists of page 0 + 4,1 + 5, 2 + 6, 3 + 7
++ * Anyway JFFS2 would increase the eraseblock size so we chose a combined one which can be erased in one go
++ * There are more speed improvements for reads and writes possible, but not implemented now
++ */
++ {"AND 128MiB 3,3V 8-bit", 0x01, 2048, 128, 0x4000, NAND_IS_AND | NAND_NO_AUTOINCR | NAND_4PAGE_ARRAY | BBT_AUTO_REFRESH},
++
++ {NULL,}
++};
++
++/*
++* Manufacturer ID list
++*/
++struct nand_manufacturers nand_manuf_ids[] = {
++ {NAND_MFR_TOSHIBA, "Toshiba"},
++ {NAND_MFR_SAMSUNG, "Samsung"},
++ {NAND_MFR_FUJITSU, "Fujitsu"},
++ {NAND_MFR_NATIONAL, "National"},
++ {NAND_MFR_RENESAS, "Renesas"},
++ {NAND_MFR_STMICRO, "ST Micro"},
++ {NAND_MFR_HYNIX, "Hynix"},
++ {0x0, "Unknown"}
++};
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/rescue.ld linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/rescue.ld
+--- linux-2.6.19.2.old/arch/cris/arch-v32/boot/rescue/rescue.ld 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/boot/rescue/rescue.ld 2006-10-18 10:52:47.000000000 +0200
+@@ -1,20 +1,40 @@
+-MEMORY
++/*#OUTPUT_FORMAT(elf32-us-cris) */
++OUTPUT_ARCH (crisv32)
++
++MEMORY
+ {
+- flash : ORIGIN = 0x00000000,
+- LENGTH = 0x00100000
++ bootblk : ORIGIN = 0x38000000,
++ LENGTH = 0x00004000
++ intmem : ORIGIN = 0x38004000,
++ LENGTH = 0x00005000
+ }
+
+ SECTIONS
+ {
+ .text :
+ {
+- stext = . ;
++ _stext = . ;
+ *(.text)
+- etext = . ;
+- } > flash
++ *(.rodata)
++ *(.rodata.*)
++ _etext = . ;
++ } > bootblk
+ .data :
+ {
+ *(.data)
+- edata = . ;
+- } > flash
++ _edata = . ;
++ } > bootblk
++ .bss :
++ {
++ _bss = . ;
++ *(.bss)
++ _end = ALIGN( 0x10 ) ;
++ } > intmem
++
++ /* Get rid of stuff from EXPORT_SYMBOL(foo). */
++ /DISCARD/ :
++ {
++ *(__ksymtab_strings)
++ *(__ksymtab)
++ }
+ }
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/Kconfig linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/Kconfig
+--- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/Kconfig 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/Kconfig 2007-01-29 16:14:16.000000000 +0100
+@@ -6,14 +6,6 @@
+ This option enables the ETRAX FS built-in 10/100Mbit Ethernet
+ controller.
+
+-config ETRAX_ETHERNET_HW_CSUM
+- bool "Hardware accelerated ethernet checksum and scatter/gather"
+- depends on ETRAX_ETHERNET
+- depends on ETRAX_STREAMCOPROC
+- default y
+- help
+- Hardware acceleration of checksumming and scatter/gather
+-
+ config ETRAX_ETHERNET_IFACE0
+ depends on ETRAX_ETHERNET
+ bool "Enable network interface 0"
+@@ -23,6 +15,52 @@
+ bool "Enable network interface 1 (uses DMA6 and DMA7)"
+
+ choice
++ prompt "Eth0 led group"
++ depends on ETRAX_ETHERNET_IFACE0
++ default ETRAX_ETH0_USE_LEDGRP0
++
++config ETRAX_ETH0_USE_LEDGRP0
++ bool "Use LED grp 0"
++ depends on ETRAX_NBR_LED_GRP_ONE || ETRAX_NBR_LED_GRP_TWO
++ help
++ Use LED grp 0 for eth0
++
++config ETRAX_ETH0_USE_LEDGRP1
++ bool "Use LED grp 1"
++ depends on ETRAX_NBR_LED_GRP_TWO
++ help
++ Use LED grp 1 for eth0
++
++config ETRAX_ETH0_USE_LEDGRPNULL
++ bool "Use no LEDs for eth0"
++ help
++ Use no LEDs for eth0
++endchoice
++
++choice
++ prompt "Eth1 led group"
++ depends on ETRAX_ETHERNET_IFACE1
++ default ETRAX_ETH1_USE_LEDGRP1
++
++config ETRAX_ETH1_USE_LEDGRP0
++ bool "Use LED grp 0"
++ depends on ETRAX_NBR_LED_GRP_ONE || ETRAX_NBR_LED_GRP_TWO
++ help
++ Use LED grp 0 for eth1
++
++config ETRAX_ETH1_USE_LEDGRP1
++ bool "Use LED grp 1"
++ depends on ETRAX_NBR_LED_GRP_TWO
++ help
++ Use LED grp 1 for eth1
++
++config ETRAX_ETH1_USE_LEDGRPNULL
++ bool "Use no LEDs for eth1"
++ help
++ Use no LEDs for eth1
++endchoice
++
++choice
+ prompt "Network LED behavior"
+ depends on ETRAX_ETHERNET
+ default ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY
+@@ -56,10 +94,25 @@
+ config ETRAXFS_SERIAL
+ bool "Serial-port support"
+ depends on ETRAX_ARCH_V32
++ select SERIAL_CORE
++ select SERIAL_CORE_CONSOLE
+ help
+ Enables the ETRAX FS serial driver for ser0 (ttyS0)
+ You probably want this enabled.
+
++config ETRAX_RS485
++ bool "RS-485 support"
++ depends on ETRAXFS_SERIAL
++ help
++ Enables support for RS-485 serial communication.
++
++config ETRAX_RS485_DISABLE_RECEIVER
++ bool "Disable serial receiver"
++ depends on ETRAX_RS485
++ help
++ It is necessary to disable the serial receiver to avoid serial
++ loopback. Not all products are able to do this in software only.
++
+ config ETRAX_SERIAL_PORT0
+ bool "Serial port 0 enabled"
+ depends on ETRAXFS_SERIAL
+@@ -70,6 +123,31 @@
+ ser0 can use dma4 or dma6 for output and dma5 or dma7 for input.
+
+ choice
++ prompt "Ser0 default port type "
++ depends on ETRAX_SERIAL_PORT0
++ default ETRAX_SERIAL_PORT0_TYPE_232
++ help
++ Type of serial port.
++
++config ETRAX_SERIAL_PORT0_TYPE_232
++ bool "Ser0 is a RS-232 port"
++ help
++ Configure serial port 0 to be a RS-232 port.
++
++config ETRAX_SERIAL_PORT0_TYPE_485HD
++ bool "Ser0 is a half duplex RS-485 port"
++ depends on ETRAX_RS485
++ help
++ Configure serial port 0 to be a half duplex (two wires) RS-485 port.
++
++config ETRAX_SERIAL_PORT0_TYPE_485FD
++ bool "Ser0 is a full duplex RS-485 port"
++ depends on ETRAX_RS485
++ help
++ Configure serial port 0 to be a full duplex (four wires) RS-485 port.
++endchoice
++
++choice
+ prompt "Ser0 DMA in channel "
+ depends on ETRAX_SERIAL_PORT0
+ default ETRAX_SERIAL_PORT0_NO_DMA_IN
+@@ -139,6 +217,31 @@
+ Enables the ETRAX FS serial driver for ser1 (ttyS1).
+
+ choice
++ prompt "Ser1 default port type"
++ depends on ETRAX_SERIAL_PORT1
++ default ETRAX_SERIAL_PORT1_TYPE_232
++ help
++ Type of serial port.
++
++config ETRAX_SERIAL_PORT1_TYPE_232
++ bool "Ser1 is a RS-232 port"
++ help
++ Configure serial port 1 to be a RS-232 port.
++
++config ETRAX_SERIAL_PORT1_TYPE_485HD
++ bool "Ser1 is a half duplex RS-485 port"
++ depends on ETRAX_RS485
++ help
++ Configure serial port 1 to be a half duplex (two wires) RS-485 port.
++
++config ETRAX_SERIAL_PORT1_TYPE_485FD
++ bool "Ser1 is a full duplex RS-485 port"
++ depends on ETRAX_RS485
++ help
++ Configure serial port 1 to be a full duplex (four wires) RS-485 port.
++endchoice
++
++choice
+ prompt "Ser1 DMA in channel "
+ depends on ETRAX_SERIAL_PORT1
+ default ETRAX_SERIAL_PORT1_NO_DMA_IN
+@@ -210,6 +313,31 @@
+ Enables the ETRAX FS serial driver for ser2 (ttyS2).
+
+ choice
++ prompt "Ser2 default port type"
++ depends on ETRAX_SERIAL_PORT2
++ default ETRAX_SERIAL_PORT2_TYPE_232
++ help
++ What DMA channel to use for ser2
++
++config ETRAX_SERIAL_PORT2_TYPE_232
++ bool "Ser2 is a RS-232 port"
++ help
++ Configure serial port 2 to be a RS-232 port.
++
++config ETRAX_SERIAL_PORT2_TYPE_485HD
++ bool "Ser2 is a half duplex RS-485 port"
++ depends on ETRAX_RS485
++ help
++ Configure serial port 2 to be a half duplex (two wires) RS-485 port.
++
++config ETRAX_SERIAL_PORT2_TYPE_485FD
++ bool "Ser2 is a full duplex RS-485 port"
++ depends on ETRAX_RS485
++ help
++ Configure serial port 2 to be a full duplex (four wires) RS-485 port.
++endchoice
++
++choice
+ prompt "Ser2 DMA in channel "
+ depends on ETRAX_SERIAL_PORT2
+ default ETRAX_SERIAL_PORT2_NO_DMA_IN
+@@ -279,6 +407,31 @@
+ Enables the ETRAX FS serial driver for ser3 (ttyS3).
+
+ choice
++ prompt "Ser3 default port type"
++ depends on ETRAX_SERIAL_PORT3
++ default ETRAX_SERIAL_PORT3_TYPE_232
++ help
++ What DMA channel to use for ser3.
++
++config ETRAX_SERIAL_PORT3_TYPE_232
++ bool "Ser3 is a RS-232 port"
++ help
++ Configure serial port 3 to be a RS-232 port.
++
++config ETRAX_SERIAL_PORT3_TYPE_485HD
++ bool "Ser3 is a half duplex RS-485 port"
++ depends on ETRAX_RS485
++ help
++ Configure serial port 3 to be a half duplex (two wires) RS-485 port.
++
++config ETRAX_SERIAL_PORT3_TYPE_485FD
++ bool "Ser3 is a full duplex RS-485 port"
++ depends on ETRAX_RS485
++ help
++ Configure serial port 3 to be a full duplex (four wires) RS-485 port.
++endchoice
++
++choice
+ prompt "Ser3 DMA in channel "
+ depends on ETRAX_SERIAL_PORT3
+ default ETRAX_SERIAL_PORT3_NO_DMA_IN
+@@ -341,38 +494,6 @@
+ string "Ser 3 CD bit (empty = not used)"
+ depends on ETRAX_SERIAL_PORT3
+
+-config ETRAX_RS485
+- bool "RS-485 support"
+- depends on ETRAX_SERIAL
+- help
+- Enables support for RS-485 serial communication. For a primer on
+- RS-485, see <http://www.hw.cz/english/docs/rs485/rs485.html>.
+-
+-config ETRAX_RS485_DISABLE_RECEIVER
+- bool "Disable serial receiver"
+- depends on ETRAX_RS485
+- help
+- It is necessary to disable the serial receiver to avoid serial
+- loopback. Not all products are able to do this in software only.
+- Axis 2400/2401 must disable receiver.
+-
+-config ETRAX_AXISFLASHMAP
+- bool "Axis flash-map support"
+- depends on ETRAX_ARCH_V32
+- select MTD
+- select MTD_CFI
+- select MTD_CFI_AMDSTD
+- select MTD_OBSOLETE_CHIPS
+- select MTD_AMDSTD
+- select MTD_CHAR
+- select MTD_BLOCK
+- select MTD_PARTITIONS
+- select MTD_CONCAT
+- select MTD_COMPLEX_MAPPINGS
+- help
+- This option enables MTD mapping of flash devices. Needed to use
+- flash memories. If unsure, say Y.
+-
+ config ETRAX_SYNCHRONOUS_SERIAL
+ bool "Synchronous serial-port support"
+ depends on ETRAX_ARCH_V32
+@@ -405,6 +526,31 @@
+ A synchronous serial port can run in manual or DMA mode.
+ Selecting this option will make it run in DMA mode.
+
++config ETRAX_AXISFLASHMAP
++ bool "Axis flash-map support"
++ depends on ETRAX_ARCH_V32
++ select MTD
++ select MTD_CFI
++ select MTD_CFI_AMDSTD
++ select MTD_JEDECPROBE
++ select MTD_CHAR
++ select MTD_BLOCK
++ select MTD_PARTITIONS
++ select MTD_CONCAT
++ select MTD_COMPLEX_MAPPINGS
++ help
++ This option enables MTD mapping of flash devices. Needed to use
++ flash memories. If unsure, say Y.
++
++config ETRAX_AXISFLASHMAP_MTD0WHOLE
++ bool "MTD0 is whole boot flash device"
++ depends on ETRAX_AXISFLASHMAP
++ default N
++ help
++ When this option is not set, mtd0 refers to the first partition
++ on the boot flash device. When set, mtd0 refers to the whole
++ device, with mtd1 referring to the first partition etc.
++
+ config ETRAX_PTABLE_SECTOR
+ int "Byte-offset of partition table sector"
+ depends on ETRAX_AXISFLASHMAP
+@@ -425,11 +571,19 @@
+ This option enables MTD mapping of NAND flash devices. Needed to use
+ NAND flash memories. If unsure, say Y.
+
++config ETRAX_NANDBOOT
++ bool "Boot from NAND flash"
++ depends on ETRAX_NANDFLASH
++ help
++ This options enables booting from NAND flash devices.
++ Say Y if your boot code, kernel and root file system is in
++ NAND flash. Say N if they are in NOR flash.
++
+ config ETRAX_I2C
+ bool "I2C driver"
+ depends on ETRAX_ARCH_V32
+ help
+- This option enabled the I2C driver used by e.g. the RTC driver.
++ This option enables the I2C driver used by e.g. the RTC driver.
+
+ config ETRAX_I2C_DATA_PORT
+ string "I2C data pin"
+@@ -476,18 +630,19 @@
+ Remember that you need to setup the port directions appropriately in
+ the General configuration.
+
+-config ETRAX_PA_BUTTON_BITMASK
+- hex "PA-buttons bitmask"
++config ETRAX_VIRTUAL_GPIO
++ bool "Virtual GPIO support"
+ depends on ETRAX_GPIO
+- default "0x02"
+ help
+- This is a bitmask (8 bits) with information about what bits on PA
+- that are used for buttons.
+- Most products has a so called TEST button on PA1, if that is true
+- use 0x02 here.
+- Use 00 if there are no buttons on PA.
+- If the bitmask is <> 00 a button driver will be included in the gpio
+- driver. ETRAX general I/O support must be enabled.
++ Enables the virtual Etrax general port device (major 120, minor 6).
++ It uses an I/O expander for the I2C-bus.
++
++config ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN
++ int "Virtual GPIO interrupt pin on PA pin"
++ range 0 7
++ depends on ETRAX_VIRTUAL_GPIO
++ help
++ The pin to use on PA for virtual gpio interrupt.
+
+ config ETRAX_PA_CHANGEABLE_DIR
+ hex "PA user changeable dir mask"
+@@ -584,6 +739,25 @@
+ that a user can change the value on using ioctl's.
+ Bit set = changeable.
+
++config ETRAX_PV_CHANGEABLE_DIR
++ hex "PV user changeable dir mask"
++ depends on ETRAX_VIRTUAL_GPIO
++ default "0x0000"
++ help
++ This is a bitmask (16 bits) with information of what bits in PV
++ that a user can change direction on using ioctl's.
++ Bit set = changeable.
++ You probably want 0x0000 here, but it depends on your hardware.
++
++config ETRAX_PV_CHANGEABLE_BITS
++ hex "PV user changeable bits mask"
++ depends on ETRAX_VIRTUAL_GPIO
++ default "0x0000"
++ help
++ This is a bitmask (16 bits) with information of what bits in PV
++ that a user can change the value on using ioctl's.
++ Bit set = changeable.
++
+ config ETRAX_IDE
+ bool "ATA/IDE support"
+ depends on ETRAX_ARCH_V32
+@@ -603,11 +777,11 @@
+ select HOTPLUG
+ select PCCARD_NONSTATIC
+ help
+- Enabled the ETRAX Carbus driver.
++ Enabled the ETRAX Carbus driver.
+
+ config PCI
+ bool
+- depends on ETRAX_CARDBUS
++ depends on ETRAX_CARDBUS
+ default y
+
+ config ETRAX_IOP_FW_LOAD
+@@ -623,3 +797,175 @@
+ help
+ This option enables a driver for the stream co-processor
+ for cryptographic operations.
++
++source drivers/mmc/Kconfig
++
++config ETRAX_SPI_MMC
++# Make this one of several "choices" (possible simultaneously but
++# suggested uniquely) when an IOP driver emerges for "real" MMC/SD
++# protocol support.
++ tristate
++ depends on MMC
++ default MMC
++ select SPI
++ select MMC_SPI
++ select ETRAX_SPI_MMC_BOARD
++
++# For the parts that can't be a module (due to restrictions in
++# framework elsewhere).
++config ETRAX_SPI_MMC_BOARD
++ boolean
++ default n
++
++# While the board info is MMC_SPI only, the drivers are written to be
++# independent of MMC_SPI, so we'll keep SPI non-dependent on the
++# MMC_SPI config choices (well, except for a single depends-on-line
++# for the board-info file until a separate non-MMC SPI board file
++# emerges).
++# FIXME: When that happens, we'll need to be able to ask for and
++# configure non-MMC SPI ports together with MMC_SPI ports (if multiple
++# SPI ports are enabled).
++
++config ETRAX_SPI_SSER0
++ tristate "SPI using synchronous serial port 0 (sser0)"
++ depends on ETRAX_SPI_MMC
++ default m if MMC_SPI=m
++ default y if MMC_SPI=y
++ default y if MMC_SPI=n
++ select SPI_ETRAX_SSER
++ help
++ Say Y for an MMC/SD socket connected to synchronous serial port 0,
++ or for devices using the SPI protocol on that port. Say m if you
++ want to build it as a module, which will be named spi_crisv32_sser.
++ (You need to select MMC separately.)
++
++config ETRAX_SPI_SSER0_DMA
++ bool "DMA for SPI on sser0 enabled"
++ depends on ETRAX_SPI_SSER0
++ depends on !ETRAX_SERIAL_PORT1_DMA4_OUT && !ETRAX_SERIAL_PORT1_DMA5_IN
++ default y
++ help
++ Say Y if using DMA (dma4/dma5) for SPI on synchronous serial port 0.
++
++config ETRAX_SPI_MMC_CD_SSER0_PIN
++ string "MMC/SD card detect pin for SPI on sser0"
++ depends on ETRAX_SPI_SSER0 && MMC_SPI
++ default "pd11"
++ help
++ The pin to use for SD/MMC card detect. This pin should be pulled up
++ and grounded when a card is present. If defined as " " (space), no
++ pin is selected. A card must then always be inserted for proper
++ action.
++
++config ETRAX_SPI_MMC_WP_SSER0_PIN
++ string "MMC/SD card write-protect pin for SPI on sser0"
++ depends on ETRAX_SPI_SSER0 && MMC_SPI
++ default "pd10"
++ help
++ The pin to use for the SD/MMC write-protect signal for a memory
++ card. If defined as " " (space), the card is considered writable.
++
++config ETRAX_SPI_SSER1
++ tristate "SPI using synchronous serial port 1 (sser1)"
++ depends on ETRAX_SPI_MMC
++ default m if MMC_SPI=m && ETRAX_SPI_SSER0=n
++ default y if MMC_SPI=y && ETRAX_SPI_SSER0=n
++ default y if MMC_SPI=n && ETRAX_SPI_SSER0=n
++ select SPI_ETRAX_SSER
++ help
++ Say Y for an MMC/SD socket connected to synchronous serial port 1,
++ or for devices using the SPI protocol on that port. Say m if you
++ want to build it as a module, which will be named spi_crisv32_sser.
++ (You need to select MMC separately.)
++
++config ETRAX_SPI_SSER1_DMA
++ bool "DMA for SPI on sser1 enabled"
++ depends on ETRAX_SPI_SSER1 && !ETRAX_ETHERNET_IFACE1
++ depends on !ETRAX_SERIAL_PORT0_DMA6_OUT && !ETRAX_SERIAL_PORT0_DMA7_IN
++ default y
++ help
++ Say Y if using DMA (dma6/dma7) for SPI on synchronous serial port 1.
++
++config ETRAX_SPI_MMC_CD_SSER1_PIN
++ string "MMC/SD card detect pin for SPI on sser1"
++ depends on ETRAX_SPI_SSER1 && MMC_SPI
++ default "pd12"
++ help
++ The pin to use for SD/MMC card detect. This pin should be pulled up
++ and grounded when a card is present. If defined as " " (space), no
++ pin is selected. A card must then always be inserted for proper
++ action.
++
++config ETRAX_SPI_MMC_WP_SSER1_PIN
++ string "MMC/SD card write-protect pin for SPI on sser1"
++ depends on ETRAX_SPI_SSER1 && MMC_SPI
++ default "pd9"
++ help
++ The pin to use for the SD/MMC write-protect signal for a memory
++ card. If defined as " " (space), the card is considered writable.
++
++config ETRAX_SPI_GPIO
++ tristate "Bitbanged SPI using gpio pins"
++ depends on ETRAX_SPI_MMC
++ select SPI_ETRAX_GPIO
++ default m if MMC_SPI=m && ETRAX_SPI_SSER0=n && ETRAX_SPI_SSER1=n
++ default y if MMC_SPI=y && ETRAX_SPI_SSER0=n && ETRAX_SPI_SSER1=n
++ default y if MMC_SPI=n && ETRAX_SPI_SSER0=n && ETRAX_SPI_SSER1=n
++ help
++ Say Y for an MMC/SD socket connected to general I/O pins (but not
++ a complete synchronous serial ports), or for devices using the SPI
++ protocol on general I/O pins. Slow and slows down the system.
++ Say m to build it as a module, which will be called spi_crisv32_gpio.
++ (You need to select MMC separately.)
++
++# The default match that of sser0, only because that's how it was tested.
++config ETRAX_SPI_CS_PIN
++ string "SPI chip select pin"
++ depends on ETRAX_SPI_GPIO
++ default "pc3"
++ help
++ The pin to use for SPI chip select.
++
++config ETRAX_SPI_CLK_PIN
++ string "SPI clock pin"
++ depends on ETRAX_SPI_GPIO
++ default "pc1"
++ help
++ The pin to use for the SPI clock.
++
++config ETRAX_SPI_DATAIN_PIN
++ string "SPI MISO (data in) pin"
++ depends on ETRAX_SPI_GPIO
++ default "pc16"
++ help
++ The pin to use for SPI data in from the device.
++
++config ETRAX_SPI_DATAOUT_PIN
++ string "SPI MOSI (data out) pin"
++ depends on ETRAX_SPI_GPIO
++ default "pc0"
++ help
++ The pin to use for SPI data out to the device.
++
++config ETRAX_SPI_MMC_CD_GPIO_PIN
++ string "MMC/SD card detect pin for SPI using gpio (space for none)"
++ depends on ETRAX_SPI_GPIO && MMC_SPI
++ default "pd11"
++ help
++ The pin to use for SD/MMC card detect. This pin should be pulled up
++ and grounded when a card is present. If defined as " " (space), no
++ pin is selected. A card must then always be inserted for proper
++ action.
++
++config ETRAX_SPI_MMC_WP_GPIO_PIN
++ string "MMC/SD card write-protect pin for SPI using gpio (space for none)"
++ depends on ETRAX_SPI_GPIO && MMC_SPI
++ default "pd10"
++ help
++ The pin to use for the SD/MMC write-protect signal for a memory
++ card. If defined as " " (space), the card is considered writable.
++
++# Avoid choices causing non-working configs by conditionalizing the inclusion.
++if ETRAX_SPI_MMC
++source drivers/spi/Kconfig
++endif
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/Makefile linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/Makefile
+--- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/Makefile 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/Makefile 2007-01-29 16:14:16.000000000 +0100
+@@ -11,3 +11,4 @@
+ obj-$(CONFIG_ETRAX_I2C) += i2c.o
+ obj-$(CONFIG_ETRAX_SYNCHRONOUS_SERIAL) += sync_serial.o
+ obj-$(CONFIG_PCI) += pci/
++obj-$(CONFIG_ETRAX_SPI_MMC_BOARD) += board_mmcspi.o
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/axisflashmap.c linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/axisflashmap.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/axisflashmap.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/axisflashmap.c 2007-02-06 17:37:50.000000000 +0100
+@@ -11,7 +11,7 @@
+ * partition split defined below.
+ *
+ * Copy of os/lx25/arch/cris/arch-v10/drivers/axisflashmap.c 1.5
+- * with minor changes.
++ * with quite a few changes now.
+ *
+ */
+
+@@ -27,6 +27,8 @@
+ #include <linux/mtd/mtdram.h>
+ #include <linux/mtd/partitions.h>
+
++#include <linux/cramfs_fs.h>
++
+ #include <asm/arch/hwregs/config_defs.h>
+ #include <asm/axisflashmap.h>
+ #include <asm/mmu.h>
+@@ -37,16 +39,24 @@
+ #define FLASH_UNCACHED_ADDR KSEG_E
+ #define FLASH_CACHED_ADDR KSEG_F
+
++#define PAGESIZE (512)
++
+ #if CONFIG_ETRAX_FLASH_BUSWIDTH==1
+ #define flash_data __u8
+ #elif CONFIG_ETRAX_FLASH_BUSWIDTH==2
+ #define flash_data __u16
+ #elif CONFIG_ETRAX_FLASH_BUSWIDTH==4
+-#define flash_data __u16
++#define flash_data __u32
+ #endif
+
+ /* From head.S */
+-extern unsigned long romfs_start, romfs_length, romfs_in_flash;
++extern unsigned long romfs_in_flash; /* 1 when romfs_start, _length in flash */
++extern unsigned long romfs_start, romfs_length;
++extern unsigned long nand_boot; /* 1 when booted from nand flash */
++
++struct partition_name {
++ char name[6];
++};
+
+ /* The master mtd for the entire flash. */
+ struct mtd_info* axisflash_mtd = NULL;
+@@ -112,32 +122,20 @@
+ .map_priv_1 = FLASH_UNCACHED_ADDR + MEM_CSE0_SIZE
+ };
+
+-/* If no partition-table was found, we use this default-set. */
+-#define MAX_PARTITIONS 7
+-#define NUM_DEFAULT_PARTITIONS 3
++#define MAX_PARTITIONS 7
++#ifdef CONFIG_ETRAX_NANDBOOT
++#define NUM_DEFAULT_PARTITIONS 4
++#define DEFAULT_ROOTFS_PARTITION_NO 2
++#define DEFAULT_MEDIA_SIZE 0x2000000 /* 32 megs */
++#else
++#define NUM_DEFAULT_PARTITIONS 3
++#define DEFAULT_ROOTFS_PARTITION_NO (-1)
++#define DEFAULT_MEDIA_SIZE 0x800000 /* 8 megs */
++#endif
+
+-/*
+- * Default flash size is 2MB. CONFIG_ETRAX_PTABLE_SECTOR is most likely the
+- * size of one flash block and "filesystem"-partition needs 5 blocks to be able
+- * to use JFFS.
+- */
+-static struct mtd_partition axis_default_partitions[NUM_DEFAULT_PARTITIONS] = {
+- {
+- .name = "boot firmware",
+- .size = CONFIG_ETRAX_PTABLE_SECTOR,
+- .offset = 0
+- },
+- {
+- .name = "kernel",
+- .size = 0x200000 - (6 * CONFIG_ETRAX_PTABLE_SECTOR),
+- .offset = CONFIG_ETRAX_PTABLE_SECTOR
+- },
+- {
+- .name = "filesystem",
+- .size = 5 * CONFIG_ETRAX_PTABLE_SECTOR,
+- .offset = 0x200000 - (5 * CONFIG_ETRAX_PTABLE_SECTOR)
+- }
+-};
++#if (MAX_PARTITIONS < NUM_DEFAULT_PARTITIONS)
++#error MAX_PARTITIONS must be >= than NUM_DEFAULT_PARTITIONS
++#endif
+
+ /* Initialize the ones normally used. */
+ static struct mtd_partition axis_partitions[MAX_PARTITIONS] = {
+@@ -178,6 +176,56 @@
+ },
+ };
+
++
++/* If no partition-table was found, we use this default-set.
++ * Default flash size is 8MB (NOR). CONFIG_ETRAX_PTABLE_SECTOR is most
++ * likely the size of one flash block and "filesystem"-partition needs
++ * to be >=5 blocks to be able to use JFFS.
++ */
++static struct mtd_partition axis_default_partitions[NUM_DEFAULT_PARTITIONS] = {
++ {
++ .name = "boot firmware",
++ .size = CONFIG_ETRAX_PTABLE_SECTOR,
++ .offset = 0
++ },
++ {
++ .name = "kernel",
++ .size = 10 * CONFIG_ETRAX_PTABLE_SECTOR,
++ .offset = CONFIG_ETRAX_PTABLE_SECTOR
++ },
++#define FILESYSTEM_SECTOR (11 * CONFIG_ETRAX_PTABLE_SECTOR)
++#ifdef CONFIG_ETRAX_NANDBOOT
++ {
++ .name = "rootfs",
++ .size = 10 * CONFIG_ETRAX_PTABLE_SECTOR,
++ .offset = FILESYSTEM_SECTOR
++ },
++#undef FILESYSTEM_SECTOR
++#define FILESYSTEM_SECTOR (21 * CONFIG_ETRAX_PTABLE_SECTOR)
++#endif
++ {
++ .name = "rwfs",
++ .size = DEFAULT_MEDIA_SIZE - FILESYSTEM_SECTOR,
++ .offset = FILESYSTEM_SECTOR
++ }
++};
++
++#ifdef CONFIG_ETRAX_AXISFLASHMAP_MTD0WHOLE
++/* Main flash device */
++static struct mtd_partition main_partition = {
++ .name = "main",
++ .size = 0,
++ .offset = 0
++};
++#endif
++
++/* Auxilliary partition if we find another flash */
++static struct mtd_partition aux_partition = {
++ .name = "aux",
++ .size = 0,
++ .offset = 0
++};
++
+ /*
+ * Probe a chip select for AMD-compatible (JEDEC) or CFI-compatible flash
+ * chips in that order (because the amd_flash-driver is faster).
+@@ -186,23 +234,23 @@
+ {
+ struct mtd_info *mtd_cs = NULL;
+
+- printk(KERN_INFO
++ printk(KERN_INFO
+ "%s: Probing a 0x%08lx bytes large window at 0x%08lx.\n",
+ map_cs->name, map_cs->size, map_cs->map_priv_1);
+
+-#ifdef CONFIG_MTD_AMDSTD
+- mtd_cs = do_map_probe("amd_flash", map_cs);
+-#endif
+ #ifdef CONFIG_MTD_CFI
++ mtd_cs = do_map_probe("cfi_probe", map_cs);
++#endif
++#ifdef CONFIG_MTD_JEDECPROBE
+ if (!mtd_cs) {
+- mtd_cs = do_map_probe("cfi_probe", map_cs);
++ mtd_cs = do_map_probe("jedec_probe", map_cs);
+ }
+ #endif
+
+ return mtd_cs;
+ }
+
+-/*
++/*
+ * Probe each chip select individually for flash chips. If there are chips on
+ * both cse0 and cse1, the mtd_info structs will be concatenated to one struct
+ * so that MTD partitions can cross chip boundries.
+@@ -217,22 +265,17 @@
+ {
+ struct mtd_info *mtd_cse0;
+ struct mtd_info *mtd_cse1;
+- struct mtd_info *mtd_nand = NULL;
+ struct mtd_info *mtd_total;
+- struct mtd_info *mtds[3];
++ struct mtd_info *mtds[2];
+ int count = 0;
+
+ if ((mtd_cse0 = probe_cs(&map_cse0)) != NULL)
+ mtds[count++] = mtd_cse0;
+ if ((mtd_cse1 = probe_cs(&map_cse1)) != NULL)
+ mtds[count++] = mtd_cse1;
++
+
+-#ifdef CONFIG_ETRAX_NANDFLASH
+- if ((mtd_nand = crisv32_nand_flash_probe()) != NULL)
+- mtds[count++] = mtd_nand;
+-#endif
+-
+- if (!mtd_cse0 && !mtd_cse1 && !mtd_nand) {
++ if (!mtd_cse0 && !mtd_cse1) {
+ /* No chip found. */
+ return NULL;
+ }
+@@ -248,7 +291,7 @@
+ */
+ mtd_total = mtd_concat_create(mtds,
+ count,
+- "cse0+cse1+nand");
++ "cse0+cse1");
+ #else
+ printk(KERN_ERR "%s and %s: Cannot concatenate due to kernel "
+ "(mis)configuration!\n", map_cse0.name, map_cse1.name);
+@@ -260,57 +303,155 @@
+
+ /* The best we can do now is to only use what we found
+ * at cse0.
+- */
++ */
+ mtd_total = mtd_cse0;
+ map_destroy(mtd_cse1);
+ }
+ } else {
+- mtd_total = mtd_cse0? mtd_cse0 : mtd_cse1 ? mtd_cse1 : mtd_nand;
+-
++ mtd_total = mtd_cse0 ? mtd_cse0 : mtd_cse1;
++
+ }
+
+ return mtd_total;
+ }
+
+-extern unsigned long crisv32_nand_boot;
+-extern unsigned long crisv32_nand_cramfs_offset;
+-
+ /*
+ * Probe the flash chip(s) and, if it succeeds, read the partition-table
+ * and register the partitions with MTD.
+ */
+ static int __init init_axis_flash(void)
+ {
+- struct mtd_info *mymtd;
++ struct mtd_info *main_mtd;
++ struct mtd_info *aux_mtd = NULL;
+ int err = 0;
+ int pidx = 0;
+ struct partitiontable_head *ptable_head = NULL;
+ struct partitiontable_entry *ptable;
+- int use_default_ptable = 1; /* Until proven otherwise. */
+- const char *pmsg = KERN_INFO " /dev/flash%d at 0x%08x, size 0x%08x\n";
+- static char page[512];
++ int ptable_ok = 0;
++ static char page[PAGESIZE];
+ size_t len;
++ int ram_rootfs_partition = -1; /* -1 => no RAM rootfs partition */
++ int part;
++
++ /* We need a root fs. If it resides in RAM, we need to use an
++ * MTDRAM device, so it must be enabled in the kernel config,
++ * but its size must be configured as 0 so as not to conflict
++ * with our usage.
++ */
++#if !defined(CONFIG_MTD_MTDRAM) || (CONFIG_MTDRAM_TOTAL_SIZE != 0) || (CONFIG_MTDRAM_ABS_POS != 0)
++ if (!romfs_in_flash && !nand_boot) {
++ printk(KERN_EMERG "axisflashmap: Cannot create an MTD RAM "
++ "device; configure CONFIG_MTD_MTDRAM with size = 0!\n");
++ panic("This kernel cannot boot from RAM!\n");
++ }
++#endif
+
+ #ifndef CONFIG_ETRAXFS_SIM
+- mymtd = flash_probe();
+- mymtd->read(mymtd, CONFIG_ETRAX_PTABLE_SECTOR, 512, &len, page);
+- ptable_head = (struct partitiontable_head *)(page + PARTITION_TABLE_OFFSET);
++ main_mtd = flash_probe();
++ if (main_mtd)
++ printk(KERN_INFO "%s: 0x%08x bytes of NOR flash memory.\n",
++ main_mtd->name, main_mtd->size);
++
++#ifdef CONFIG_ETRAX_NANDFLASH
++ aux_mtd = crisv32_nand_flash_probe();
++ if (aux_mtd)
++ printk(KERN_INFO "%s: 0x%08x bytes of NAND flash memory.\n",
++ aux_mtd->name, aux_mtd->size);
+
+- if (!mymtd) {
++#ifdef CONFIG_ETRAX_NANDBOOT
++ {
++ struct mtd_info *tmp_mtd;
++
++ printk(KERN_INFO "axisflashmap: Set to boot from NAND flash, "
++ "making NAND flash primary device.\n");
++ tmp_mtd = main_mtd;
++ main_mtd = aux_mtd;
++ aux_mtd = tmp_mtd;
++ }
++#endif /* CONFIG_ETRAX_NANDBOOT */
++#endif /* CONFIG_ETRAX_NANDFLASH */
++
++ if (!main_mtd && !aux_mtd) {
+ /* There's no reason to use this module if no flash chip can
+ * be identified. Make sure that's understood.
+ */
+ printk(KERN_INFO "axisflashmap: Found no flash chip.\n");
+- } else {
+- printk(KERN_INFO "%s: 0x%08x bytes of flash memory.\n",
+- mymtd->name, mymtd->size);
+- axisflash_mtd = mymtd;
+ }
+
+- if (mymtd) {
+- mymtd->owner = THIS_MODULE;
++#if 0 /* Dump flash memory so we can see what is going on */
++ if (main_mtd) {
++ int sectoraddr, i;
++ for (sectoraddr = 0; sectoraddr < 2*65536+4096; sectoraddr += PAGESIZE) {
++ main_mtd->read(main_mtd, sectoraddr, PAGESIZE, &len, page);
++ printk(KERN_INFO
++ "Sector at %d (length %d):\n",
++ sectoraddr, len);
++ for (i = 0; i < PAGESIZE; i += 16) {
++ printk(KERN_INFO
++ "%02x %02x %02x %02x %02x %02x %02x %02x "
++ "%02x %02x %02x %02x %02x %02x %02x %02x\n",
++ page[i] & 255, page[i+1] & 255,
++ page[i+2] & 255, page[i+3] & 255,
++ page[i+4] & 255, page[i+5] & 255,
++ page[i+6] & 255, page[i+7] & 255,
++ page[i+8] & 255, page[i+9] & 255,
++ page[i+10] & 255, page[i+11] & 255,
++ page[i+12] & 255, page[i+13] & 255,
++ page[i+14] & 255, page[i+15] & 255);
++ }
++
++ }
++ }
++#endif
++
++ if (main_mtd) {
++ main_mtd->owner = THIS_MODULE;
++ axisflash_mtd = main_mtd;
++
++ loff_t ptable_sector = CONFIG_ETRAX_PTABLE_SECTOR;
++
++ pidx++; /* First partition (rescue) is always set to the default. */
++#ifdef CONFIG_ETRAX_NANDBOOT
++ /* We know where the partition table should be located,
++ * it will be in first good block after that.
++ */
++ int blockstat;
++ do {
++ blockstat = main_mtd->block_isbad(main_mtd, ptable_sector);
++ if (blockstat < 0)
++ ptable_sector = 0; /* read error */
++ else if (blockstat)
++ ptable_sector += main_mtd->erasesize;
++ } while (blockstat && ptable_sector);
++#endif
++ if (ptable_sector) {
++ main_mtd->read(main_mtd, ptable_sector, PAGESIZE, &len, page);
++ ptable_head = &((struct partitiontable *) page)->head;
++ }
++
++#if 0 /* Dump partition table so we can see what is going on */
++ printk(KERN_INFO
++ "axisflashmap: flash read %d bytes at 0x%08x, data: "
++ "%02x %02x %02x %02x %02x %02x %02x %02x\n",
++ len, CONFIG_ETRAX_PTABLE_SECTOR,
++ page[0] & 255, page[1] & 255,
++ page[2] & 255, page[3] & 255,
++ page[4] & 255, page[5] & 255,
++ page[6] & 255, page[7] & 255);
++ printk(KERN_INFO
++ "axisflashmap: partition table offset %d, data: "
++ "%02x %02x %02x %02x %02x %02x %02x %02x\n",
++ PARTITION_TABLE_OFFSET,
++ page[PARTITION_TABLE_OFFSET+0] & 255,
++ page[PARTITION_TABLE_OFFSET+1] & 255,
++ page[PARTITION_TABLE_OFFSET+2] & 255,
++ page[PARTITION_TABLE_OFFSET+3] & 255,
++ page[PARTITION_TABLE_OFFSET+4] & 255,
++ page[PARTITION_TABLE_OFFSET+5] & 255,
++ page[PARTITION_TABLE_OFFSET+6] & 255,
++ page[PARTITION_TABLE_OFFSET+7] & 255);
++#endif
+ }
+- pidx++; /* First partition is always set to the default. */
+
+ if (ptable_head && (ptable_head->magic == PARTITION_TABLE_MAGIC)
+ && (ptable_head->size <
+@@ -323,7 +464,6 @@
+ /* Looks like a start, sane length and end of a
+ * partition table, lets check csum etc.
+ */
+- int ptable_ok = 0;
+ struct partitiontable_entry *max_addr =
+ (struct partitiontable_entry *)
+ ((unsigned long)ptable_head + sizeof(*ptable_head) +
+@@ -331,7 +471,7 @@
+ unsigned long offset = CONFIG_ETRAX_PTABLE_SECTOR;
+ unsigned char *p;
+ unsigned long csum = 0;
+-
++
+ ptable = (struct partitiontable_entry *)
+ ((unsigned long)ptable_head + sizeof(*ptable_head));
+
+@@ -343,108 +483,177 @@
+ csum += *p++;
+ csum += *p++;
+ csum += *p++;
+- }
++ }
+ ptable_ok = (csum == ptable_head->checksum);
+
+ /* Read the entries and use/show the info. */
+- printk(KERN_INFO " Found a%s partition table at 0x%p-0x%p.\n",
++ printk(KERN_INFO "axisflashmap: "
++ "Found a%s partition table at 0x%p-0x%p.\n",
+ (ptable_ok ? " valid" : "n invalid"), ptable_head,
+ max_addr);
+
+ /* We have found a working bootblock. Now read the
+- * partition table. Scan the table. It ends when
+- * there is 0xffffffff, that is, empty flash.
++ * partition table. Scan the table. It ends with 0xffffffff.
+ */
+ while (ptable_ok
+- && ptable->offset != 0xffffffff
++ && ptable->offset != PARTITIONTABLE_END_MARKER
+ && ptable < max_addr
+- && pidx < MAX_PARTITIONS) {
++ && pidx < MAX_PARTITIONS - 1) {
+
+- axis_partitions[pidx].offset = offset + ptable->offset + (crisv32_nand_boot ? 16384 : 0);
+- axis_partitions[pidx].size = ptable->size;
+-
+- printk(pmsg, pidx, axis_partitions[pidx].offset,
+- axis_partitions[pidx].size);
++ axis_partitions[pidx].offset = offset + ptable->offset;
++#ifdef CONFIG_ETRAX_NANDFLASH
++ if (main_mtd->type == MTD_NANDFLASH) {
++ axis_partitions[pidx].size =
++ (((ptable+1)->offset ==
++ PARTITIONTABLE_END_MARKER) ?
++ main_mtd->size :
++ ((ptable+1)->offset + offset)) -
++ (ptable->offset + offset);
++
++ } else
++#endif /* CONFIG_ETRAX_NANDFLASH */
++ axis_partitions[pidx].size = ptable->size;
++#ifdef CONFIG_ETRAX_NANDBOOT
++ /* Save partition number of jffs2 ro partition.
++ * Needed if RAM booting or root file system in RAM.
++ */
++ if (!nand_boot &&
++ ram_rootfs_partition < 0 && /* not already set */
++ ptable->type == PARTITION_TYPE_JFFS2 &&
++ (ptable->flags & PARTITION_FLAGS_READONLY_MASK) ==
++ PARTITION_FLAGS_READONLY)
++ ram_rootfs_partition = pidx;
++#endif /* CONFIG_ETRAX_NANDBOOT */
+ pidx++;
+ ptable++;
+ }
+- use_default_ptable = !ptable_ok;
+ }
+
+- if (romfs_in_flash) {
+- /* Add an overlapping device for the root partition (romfs). */
++ /* Decide whether to use default partition table. */
++ /* Only use default table if we actually have a device (main_mtd) */
+
+- axis_partitions[pidx].name = "romfs";
+- if (crisv32_nand_boot) {
+- char* data = kmalloc(1024, GFP_KERNEL);
+- int len;
+- int offset = crisv32_nand_cramfs_offset & ~(1024-1);
+- char* tmp;
+-
+- mymtd->read(mymtd, offset, 1024, &len, data);
+- tmp = &data[crisv32_nand_cramfs_offset % 512];
+- axis_partitions[pidx].size = *(unsigned*)(tmp + 4);
+- axis_partitions[pidx].offset = crisv32_nand_cramfs_offset;
+- kfree(data);
+- } else {
+- axis_partitions[pidx].size = romfs_length;
+- axis_partitions[pidx].offset = romfs_start - FLASH_CACHED_ADDR;
+- }
++ struct mtd_partition *partition = &axis_partitions[0];
++ if (main_mtd && !ptable_ok) {
++ memcpy(axis_partitions, axis_default_partitions,
++ sizeof(axis_default_partitions));
++ pidx = NUM_DEFAULT_PARTITIONS;
++ ram_rootfs_partition = DEFAULT_ROOTFS_PARTITION_NO;
++ }
+
++ /* Add artificial partitions for rootfs if necessary */
++ if (romfs_in_flash) {
++ /* rootfs is in directly accessible flash memory = NOR flash.
++ Add an overlapping device for the rootfs partition. */
++ printk(KERN_INFO "axisflashmap: Adding partition for "
++ "overlapping root file system image\n");
++ axis_partitions[pidx].size = romfs_length;
++ axis_partitions[pidx].offset = romfs_start - FLASH_CACHED_ADDR;
++ axis_partitions[pidx].name = "romfs";
+ axis_partitions[pidx].mask_flags |= MTD_WRITEABLE;
+-
+- printk(KERN_INFO
+- " Adding readonly flash partition for romfs image:\n");
+- printk(pmsg, pidx, axis_partitions[pidx].offset,
+- axis_partitions[pidx].size);
++ ram_rootfs_partition = -1;
+ pidx++;
+ }
+-
+- if (mymtd) {
+- if (use_default_ptable) {
+- printk(KERN_INFO " Using default partition table.\n");
+- err = add_mtd_partitions(mymtd, axis_default_partitions,
+- NUM_DEFAULT_PARTITIONS);
+- } else {
+- err = add_mtd_partitions(mymtd, axis_partitions, pidx);
++ else if (romfs_length && !nand_boot) {
++ /* romfs exists in memory, but not in flash, so must be in RAM.
++ * Configure an MTDRAM partition. */
++ if (ram_rootfs_partition < 0) { /* none set yet */
++ ram_rootfs_partition = pidx; /* put it at the end */
++ pidx++;
+ }
++ printk(KERN_INFO "axisflashmap: Adding partition for "
++ "root file system image in RAM\n");
++ axis_partitions[ram_rootfs_partition].size = romfs_length;
++ axis_partitions[ram_rootfs_partition].offset = romfs_start;
++ axis_partitions[ram_rootfs_partition].name = "romfs";
++ axis_partitions[ram_rootfs_partition].mask_flags |=
++ MTD_WRITEABLE;
++ }
+
+- if (err) {
+- panic("axisflashmap could not add MTD partitions!\n");
+- }
++#ifdef CONFIG_ETRAX_AXISFLASHMAP_MTD0WHOLE
++ if (main_mtd) {
++ main_partition.size = main_mtd->size;
++ err = add_mtd_partitions(main_mtd, &main_partition, 1);
++ if (err)
++ panic("axisflashmap: Could not initialize "
++ "partition for whole main mtd device!\n");
+ }
+-/* CONFIG_EXTRAXFS_SIM */
+ #endif
+
+- if (!romfs_in_flash) {
+- /* Create an RAM device for the root partition (romfs). */
++ /* Now, register all partitions with mtd.
++ * We do this one at a time so we can slip in an MTDRAM device
++ * in the proper place if required. */
++
++ for (part = 0; part < pidx; part++) {
++ if (part == ram_rootfs_partition) {
++ /* add MTDRAM partition here */
++ struct mtd_info *mtd_ram;
++
++ mtd_ram = kmalloc(sizeof(struct mtd_info), GFP_KERNEL);
++ if (!mtd_ram)
++ panic("axisflashmap: Couldn't allocate memory "
++ "for mtd_info!\n");
++ printk(KERN_INFO "axisflashmap: Adding RAM partition "
++ "for rootfs image.\n");
++ err = mtdram_init_device(mtd_ram,
++ (void *)partition[part].offset,
++ partition[part].size,
++ partition[part].name);
++ if (err)
++ panic("axisflashmap: Could not initialize "
++ "MTD RAM device!\n");
++ /* JFFS2 likes to have an erasesize. Keep potential
++ * JFFS2 rootfs happy by providing one. Since image
++ * was most likely created for main mtd, use that
++ * erasesize, if available. Otherwise, make a guess. */
++ mtd_ram->erasesize = (main_mtd ? main_mtd->erasesize :
++ CONFIG_ETRAX_PTABLE_SECTOR);
++ } else {
++ err = add_mtd_partitions(main_mtd,
++ &partition[part], 1);
++ if (err)
++ panic("axisflashmap: Could not add mtd "
++ "partition %d\n", part);
++ }
++ }
+
+-#if !defined(CONFIG_MTD_MTDRAM) || (CONFIG_MTDRAM_TOTAL_SIZE != 0) || (CONFIG_MTDRAM_ABS_POS != 0)
+- /* No use trying to boot this kernel from RAM. Panic! */
+- printk(KERN_EMERG "axisflashmap: Cannot create an MTD RAM "
+- "device due to kernel (mis)configuration!\n");
+- panic("This kernel cannot boot from RAM!\n");
+-#else
+- struct mtd_info *mtd_ram;
++#endif /* CONFIG_EXTRAXFS_SIM */
+
+- mtd_ram = (struct mtd_info *)kmalloc(sizeof(struct mtd_info),
+- GFP_KERNEL);
+- if (!mtd_ram) {
+- panic("axisflashmap couldn't allocate memory for "
+- "mtd_info!\n");
+- }
++#ifdef CONFIG_ETRAXFS_SIM
++ /* For simulator, always use a RAM partition.
++ * The rootfs will be found after the kernel in RAM,
++ * with romfs_start and romfs_end indicating location and size.
++ */
++ struct mtd_info *mtd_ram;
++
++ mtd_ram = (struct mtd_info *)kmalloc(sizeof(struct mtd_info),
++ GFP_KERNEL);
++ if (!mtd_ram) {
++ panic("axisflashmap: Couldn't allocate memory for "
++ "mtd_info!\n");
++ }
+
+- printk(KERN_INFO " Adding RAM partition for romfs image:\n");
+- printk(pmsg, pidx, romfs_start, romfs_length);
++ printk(KERN_INFO "axisflashmap: Adding RAM partition for romfs, "
++ "at %u, size %u\n",
++ (unsigned) romfs_start, (unsigned) romfs_length);
++
++ err = mtdram_init_device(mtd_ram, (void*)romfs_start,
++ romfs_length, "romfs");
++ if (err) {
++ panic("axisflashmap: Could not initialize MTD RAM "
++ "device!\n");
++ }
++#endif /* CONFIG_EXTRAXFS_SIM */
++
++#ifndef CONFIG_ETRAXFS_SIM
++ if (aux_mtd) {
++ aux_partition.size = aux_mtd->size;
++ err = add_mtd_partitions(aux_mtd, &aux_partition, 1);
++ if (err)
++ panic("axisflashmap: Could not initialize "
++ "aux mtd device!\n");
+
+- err = mtdram_init_device(mtd_ram, (void*)romfs_start,
+- romfs_length, "romfs");
+- if (err) {
+- panic("axisflashmap could not initialize MTD RAM "
+- "device!\n");
+- }
+-#endif
+ }
++#endif /* CONFIG_EXTRAXFS_SIM */
+
+ return err;
+ }
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/board_mmcspi.c linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/board_mmcspi.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/board_mmcspi.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/board_mmcspi.c 2007-01-29 15:51:19.000000000 +0100
+@@ -0,0 +1,686 @@
++/*
++ * Somewhat generic "board-side" code to support SPI drivers for chips
++ * with a CRIS v32 and later. Not really board-specific, and only for
++ * registration of SPI devices for MMC, hence the "mmcspi" part of the
++ * name instead of a proper board name.
++ *
++ * Copyright (c) 2007 Axis Communications AB
++ *
++ * TODO: SDIO interrupt-pin support (though can't be done until
++ * there's support added in both the mmc_spi and the mmc frameworks).
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++
++#include <linux/types.h>
++#include <linux/platform_device.h>
++#include <linux/spi/spi.h>
++#include <linux/spi/mmc_spi.h>
++#include <linux/mmc/host.h>
++#include <asm/arch/board.h>
++#include <asm/arch/pinmux.h>
++#include <asm/arch/dma.h>
++#include <linux/err.h>
++
++#include <asm/io.h>
++
++/* We need some housekeeping. */
++#define CONCAT_(a, b) a ## b
++#define CONCAT(a, b) CONCAT_(a, b)
++#define CONCAT3(a, b, c) CONCAT(CONCAT(a, b), c)
++
++/* Grr. Why not define them as usual in autoconf, #ifdef REVEAL_MODULES? */
++#if !defined(CONFIG_SPI_ETRAX_SSER) && defined(CONFIG_SPI_ETRAX_SSER_MODULE)
++#define CONFIG_SPI_ETRAX_SSER
++#endif
++
++#if !defined(CONFIG_ETRAX_SPI_SSER0) && defined(CONFIG_ETRAX_SPI_SSER0_MODULE)
++#define CONFIG_ETRAX_SPI_SSER0
++#endif
++
++#if !defined(CONFIG_ETRAX_SPI_SSER1) && defined(CONFIG_ETRAX_SPI_SSER1_MODULE)
++#define CONFIG_ETRAX_SPI_SSER1
++#endif
++
++#if !defined(CONFIG_SPI_ETRAX_GPIO) && defined(CONFIG_SPI_ETRAX_GPIO_MODULE)
++#define CONFIG_SPI_ETRAX_GPIO
++#endif
++
++#define CONFIGURED_PIN(x) ((x) != NULL && *(x) != 0 && *(x) != ' ')
++
++/* Helper function to configure an iopin for input. */
++
++static int crisv32_config_pin_in(struct crisv32_iopin *pin, const char *name)
++{
++ int ret = crisv32_io_get_name(pin, name);
++ if (ret)
++ return ret;
++
++ crisv32_io_set_dir(pin, crisv32_io_dir_in);
++ return 0;
++}
++
++/*
++ * Writable data pointed to by the constant parts of each MMC_SPI bus
++ * interface. Should only hold MMC-specific state (for the
++ * MMC-specific pins), nothing SPI-generic.
++ */
++
++struct crisv32_mmc_spi_pinstate {
++ struct crisv32_iopin write_protect_pin;
++ struct crisv32_iopin card_detect_pin;
++
++ /* We must poll for card-detect, which we do each: */
++#define CARD_DETECT_CHECK_INTERVAL (2*HZ)
++ /* We poll using a self-arming workqueue function. */
++ struct work_struct cd_work;
++
++ /* When we detect a change in card presence, we call this
++ * function, supplied by the mmc_spi framework: */
++ irqreturn_t (*detectfunc)(int, void *);
++
++ /*
++ * We call that function with this parameter as the second
++ * one. We must assume the other parameters are unused, as we
++ * don't have an interrupt context.
++ */
++ void *detectfunc_param2;
++
++ /* State for the card-detect worker. */
++ int card_present;
++};
++
++/* Rearming "work" function for card-detect polling. */
++
++static void crisv32_cd_worker(void *x)
++{
++ struct crisv32_mmc_spi_pinstate *state = x;
++
++ /* It's a pull-up, so a card is present when 0. */
++ int card_present = crisv32_io_rd(&state->card_detect_pin) == 0;
++
++ if (card_present != state->card_present) {
++ state->card_present = card_present;
++ state->detectfunc(0, state->detectfunc_param2);
++ }
++ schedule_delayed_work(&state->cd_work, CARD_DETECT_CHECK_INTERVAL);
++}
++
++/* The parts of MMC-specific configuration common to GPIO and SSER. */
++
++static int crisv32_mmcspi_config_common(struct spi_device *spidev,
++ irqreturn_t (*intfunc)(int, void *),
++ struct mmc_host *mmc_host,
++ const struct crisv32_mmc_spi_pindata *pd)
++{
++ int ret = 0;
++ struct crisv32_mmc_spi_pinstate *ps = pd->pinstate;
++
++ /*
++ * If we don't have a card-detect pin, the card must be
++ * present at startup (including insmod/modprobe). No
++ * re-scans are done if no card is present at that time.
++ */
++ if (CONFIGURED_PIN(pd->card_detect)) {
++ ret = crisv32_config_pin_in(&ps->card_detect_pin,
++ pd->card_detect);
++
++ if (ret != 0)
++ goto bad_card_detect;
++
++ /* Need to cast away const from pd, unfortunately. */
++ INIT_WORK(&ps->cd_work, crisv32_cd_worker, (void *) ps);
++ ps->card_present = 1;
++ ps->detectfunc = intfunc;
++ ps->detectfunc_param2 = mmc_host;
++ crisv32_cd_worker(ps);
++ } else
++ ps->detectfunc = NULL;
++
++ /*
++ * We set up for checking for presence of a write-protect pin
++ * as pin.port being non-NULL.
++ */
++ memset(&ps->write_protect_pin, 0, sizeof ps->write_protect_pin);
++ if (CONFIGURED_PIN(pd->write_protect)) {
++ ret = crisv32_config_pin_in(&ps->write_protect_pin,
++ pd->write_protect);
++
++ if (ret != 0)
++ goto bad_write_protect;
++ }
++
++ return 0;
++
++ bad_write_protect:
++ if (ps->detectfunc) {
++ cancel_rearming_delayed_work(&ps->cd_work);
++ ps->detectfunc = NULL;
++ }
++
++ bad_card_detect:
++ return ret;
++}
++
++/* A function to undo crisv32_mmcspi_config_common. */
++
++static void crisv32_mmcspi_deconfig_common(const struct
++ crisv32_mmc_spi_pindata *pd)
++{
++ if (pd->pinstate->detectfunc) {
++ cancel_rearming_delayed_work(&pd->pinstate->cd_work);
++ pd->pinstate->detectfunc = NULL;
++ }
++
++ /* We don't have to undo the pin allocations, being GPIO. */
++}
++
++/* Helper function for write-protect sense. */
++
++static int crisv32_mmcspi_get_ro_helper(struct crisv32_mmc_spi_pinstate *ps)
++{
++ return ps->write_protect_pin.port != NULL
++ && crisv32_io_rd(&ps->write_protect_pin) != 0;
++}
++
++/* The hardware-interface-specific SPI+MMC parts. */
++
++#ifdef CONFIG_SPI_ETRAX_SSER
++static const char crisv32_matching_spi_sser_driver_name[] __init_or_module
++ = "spi_crisv32_sser";
++
++/*
++ * Make up something we can use in tables and function without
++ * #ifdef-cluttering.
++ */
++#ifdef CONFIG_ETRAX_SPI_SSER0_DMA
++#define WITH_ETRAX_SPI_SSER0_DMA 1
++#else
++#define WITH_ETRAX_SPI_SSER0_DMA 0
++#endif
++#ifdef CONFIG_ETRAX_SPI_SSER1_DMA
++#define WITH_ETRAX_SPI_SSER1_DMA 1
++#else
++#define WITH_ETRAX_SPI_SSER1_DMA 0
++#endif
++
++/* Write-protect sense for the SSER interface. */
++
++static int crisv32_mmcspi_sser_get_ro(struct device *dev)
++{
++ struct spi_device *spidev = to_spi_device(dev);
++ struct crisv32_mmc_spi_sser_hwdata *sser_defs
++ = spidev->controller_data;
++ struct crisv32_mmc_spi_pindata *pd = &sser_defs->mmc;
++ return crisv32_mmcspi_get_ro_helper(pd->pinstate);
++}
++
++/* Initialize the MMC-specific parts of the MMC+SPI interface, SSER. */
++
++static int crisv32_mmcspi_sser_init(struct device *dev,
++ irqreturn_t (*intfunc)(int, void *),
++ void *xmmc_host)
++{
++ struct mmc_host *mmc_host = xmmc_host;
++ struct spi_device *spidev = to_spi_device(dev);
++ struct crisv32_mmc_spi_sser_hwdata *sser_defs
++ = spidev->controller_data;
++ int ret = crisv32_mmcspi_config_common(spidev, intfunc, mmc_host,
++ &sser_defs->mmc);
++ if (ret != 0)
++ return ret;
++
++ mmc_host->f_max = spidev->max_speed_hz;
++
++ /*
++ * Let's just set this to ceil(100e6/65536). It wouldn't be
++ * hard to change the base frequency to support down to 450Hz,
++ * but there's no apparent requirement from known hardware.
++ * Would also require adjustments to the SPI code, not just
++ * here.
++ *
++ * On second thought, let's not set f_min unconditionally, as
++ * mmc doesn't treat it as a limit, but as the frequency to
++ * use at initialization. We stick with what mmc_spi sets, if
++ * it fits.
++ */
++ if (mmc_host->f_min < 1526)
++ mmc_host->f_min = 1526;
++
++ dev_info(dev, "CRIS v32 mmc_spi support hooked to SPI on sser%d"
++ " (cd: %s, wp: %s)\n",
++ spidev->master->bus_num,
++ CONFIGURED_PIN(sser_defs->mmc.card_detect)
++ ? sser_defs->mmc.card_detect : "(none)",
++ CONFIGURED_PIN(sser_defs->mmc.write_protect)
++ ? sser_defs->mmc.write_protect : "(none)");
++ return 0;
++}
++
++/* Similarly, to undo crisv32_mmcspi_sser_init. */
++
++static void crisv32_mmcspi_sser_exit(struct device *dev, void *xmmc_host)
++{
++ struct spi_device *spidev = to_spi_device(dev);
++ struct crisv32_mmc_spi_sser_hwdata *sser_defs
++ = spidev->controller_data;
++
++ crisv32_mmcspi_deconfig_common(&sser_defs->mmc);
++}
++
++/*
++ * Connect sser and DMA channels and return the proper numbers to use.
++ *
++ * This function exists really only to avoid having the following constants
++ * tabled: regi_sserN, SSERn_INTR_VECT, pinmux_sserN, SYNC_SERn_TX_DMA_NBR,
++ * SYNC_SERn_RX_DMA_NBR dma_sserN, regi_dmaM, regi_dmaN, DMAm_INTR_VECT,
++ * DMAn_INTR_VECT. I might have missed some. :-)
++ */
++static int crisv32_allocate_sser(struct crisv32_regi_n_int *sserp,
++ struct crisv32_regi_n_int *dmainp,
++ struct crisv32_regi_n_int *dmaoutp,
++ u32 sserno)
++{
++ int ret;
++ u32 regi_sser = sserno == 0 ? regi_sser0 : regi_sser1;
++ u32 sser_irq = sserno == 0 ? SSER0_INTR_VECT : SSER1_INTR_VECT;
++ BUG_ON(sserno > 1 || sserp == NULL);
++
++ ret = crisv32_pinmux_alloc_fixed(sserno == 0
++ ? pinmux_sser0 : pinmux_sser1);
++ if (ret != 0)
++ return ret;
++
++ sserp->regi = regi_sser;
++ sserp->irq = sser_irq;
++
++ if (dmaoutp) {
++ crisv32_request_dma(sserno == 0
++ ? SYNC_SER0_TX_DMA_NBR
++ : SYNC_SER1_TX_DMA_NBR,
++ "SD/MMC SPI dma tr",
++ DMA_VERBOSE_ON_ERROR | DMA_PANIC_ON_ERROR,
++ /* Let's be brave and ask for the
++ max. Except it's simplex, so
++ let's request half the max
++ speed in either direction. */
++ 50 * 1000 * 1000 / 8 / 2,
++ sserno == 0 ? dma_sser0 : dma_sser1);
++ dmaoutp->regi = sserno == 0
++ ? CONCAT(regi_dma, SYNC_SER0_TX_DMA_NBR)
++ : CONCAT(regi_dma, SYNC_SER1_TX_DMA_NBR);
++ dmaoutp->irq = sserno == 0
++ ? CONCAT3(DMA, SYNC_SER0_TX_DMA_NBR, _INTR_VECT)
++ : CONCAT3(DMA, SYNC_SER1_TX_DMA_NBR, _INTR_VECT);
++ }
++
++ if (dmainp) {
++ crisv32_request_dma(sserno == 0
++ ? SYNC_SER0_RX_DMA_NBR
++ : SYNC_SER1_RX_DMA_NBR,
++ "SD/MMC SPI dma rec",
++ DMA_VERBOSE_ON_ERROR | DMA_PANIC_ON_ERROR,
++ 50 * 1000 * 1000 / 8 / 2,
++ sserno == 0 ? dma_sser0 : dma_sser1);
++ dmainp->regi = sserno == 0
++ ? CONCAT(regi_dma, SYNC_SER0_RX_DMA_NBR)
++ : CONCAT(regi_dma, SYNC_SER1_RX_DMA_NBR);
++ dmainp->irq = sserno == 0
++ ? CONCAT3(DMA, SYNC_SER0_RX_DMA_NBR, _INTR_VECT)
++ : CONCAT3(DMA, SYNC_SER1_RX_DMA_NBR, _INTR_VECT);
++ }
++
++ return 0;
++}
++
++/* Undo whatever allocations et. al. that crisv32_allocate_sser did. */
++
++static void crisv32_free_sser(u32 sserno, int with_dma)
++{
++ int ret;
++
++ if (with_dma) {
++ crisv32_free_dma(sserno == 0
++ ? SYNC_SER0_RX_DMA_NBR
++ : SYNC_SER1_RX_DMA_NBR);
++ crisv32_free_dma(sserno == 0
++ ? SYNC_SER0_TX_DMA_NBR
++ : SYNC_SER1_TX_DMA_NBR);
++ }
++
++ ret = crisv32_pinmux_dealloc_fixed(sserno == 0
++ ? pinmux_sser0 : pinmux_sser1);
++
++ if (ret != 0)
++ panic("%s: crisv32_pinmux_dealloc_fixed returned %d\n",
++ __FUNCTION__, ret);
++}
++
++/* Convenience-macro to avoid typos causing diffs between sser ports. */
++
++#define SSER_CDATA(n) \
++ { \
++ { \
++ .using_dma = WITH_ETRAX_SPI_SSER##n##_DMA, \
++ .iface_allocate = crisv32_allocate_sser##n, \
++ .iface_free = crisv32_free_sser##n \
++ }, \
++ { \
++ .card_detect \
++ = CONFIG_ETRAX_SPI_MMC_CD_SSER##n##_PIN,\
++ .write_protect \
++ = CONFIG_ETRAX_SPI_MMC_WP_SSER##n##_PIN,\
++ .pinstate \
++ = &crisv32_mmcspi_sser##n##_pinstate \
++ } \
++ }
++
++#ifdef CONFIG_ETRAX_SPI_SSER0
++
++/* Allocate hardware to go with sser0 and fill in the right numbers. */
++
++static int crisv32_allocate_sser0(struct crisv32_regi_n_int *sserp,
++ struct crisv32_regi_n_int *dmainp,
++ struct crisv32_regi_n_int *dmaoutp)
++{
++ return crisv32_allocate_sser(sserp, dmainp, dmaoutp, 0);
++}
++
++/* Undo those allocations. */
++
++static void crisv32_free_sser0(void)
++{
++ crisv32_free_sser(0, WITH_ETRAX_SPI_SSER0_DMA);
++}
++
++static struct crisv32_mmc_spi_pinstate crisv32_mmcspi_sser0_pinstate;
++static const struct crisv32_mmc_spi_sser_hwdata crisv32_mmcspi_sser0_cdata
++ = SSER_CDATA(0);
++#endif /* CONFIG_ETRAX_SPI_SSER0 */
++
++#ifdef CONFIG_ETRAX_SPI_SSER1
++
++/* Allocate hardware to go with sser0 and fill in the right numbers. */
++
++static int crisv32_allocate_sser1(struct crisv32_regi_n_int *sserp,
++ struct crisv32_regi_n_int *dmainp,
++ struct crisv32_regi_n_int *dmaoutp)
++{
++ return crisv32_allocate_sser(sserp, dmainp, dmaoutp, 1);
++}
++
++/* Undo those allocations. */
++
++static void crisv32_free_sser1(void)
++{
++ crisv32_free_sser(1, WITH_ETRAX_SPI_SSER1_DMA);
++}
++
++static struct crisv32_mmc_spi_pinstate crisv32_mmcspi_sser1_pinstate;
++static const struct crisv32_mmc_spi_sser_hwdata crisv32_mmcspi_sser1_cdata
++ = SSER_CDATA(1);
++
++#endif /* CONFIG_ETRAX_SPI_SSER1 */
++
++static struct mmc_spi_platform_data crisv32_mmcspi_sser_pdata = {
++ .init = crisv32_mmcspi_sser_init,
++ .exit = __devexit_p(crisv32_mmcspi_sser_exit),
++ .detect_delay = 0,
++ .get_ro = crisv32_mmcspi_sser_get_ro,
++ .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
++ .setpower = NULL
++};
++
++#endif /* CONFIG_SPI_ETRAX_SSER */
++
++#ifdef CONFIG_SPI_ETRAX_GPIO
++
++static const char crisv32_matching_spi_gpio_driver_name[] __init_or_module
++ = "spi_crisv32_gpio";
++
++/* Write-protect sense for the GPIO interface. */
++
++static int crisv32_mmcspi_gpio_get_ro(struct device *dev)
++{
++ struct spi_device *spidev = to_spi_device(dev);
++ struct crisv32_mmc_spi_gpio_hwdata *gpio_defs
++ = spidev->controller_data;
++ struct crisv32_mmc_spi_pindata *pd = &gpio_defs->mmc;
++
++ return crisv32_mmcspi_get_ro_helper(pd->pinstate);
++}
++
++/* Initialize the MMC-specific parts of the MMC+SPI interface, GPIO. */
++
++static int crisv32_mmcspi_gpio_init(struct device *dev,
++ irqreturn_t (*intfunc)(int, void *),
++ void *xmmc_host)
++{
++ struct mmc_host *mmc_host = xmmc_host;
++ struct spi_device *spidev = to_spi_device(dev);
++ struct crisv32_mmc_spi_gpio_hwdata *gpio_defs
++ = spidev->controller_data;
++ int ret = crisv32_mmcspi_config_common(spidev, intfunc, mmc_host,
++ &gpio_defs->mmc);
++ if (ret)
++ return ret;
++
++ mmc_host->f_max = spidev->max_speed_hz;
++
++ /*
++ * We don't set f_min, as the mmc code doesn't treat it as a
++ * limit, but as the frequency to use at initialization. We
++ * stick with what mmc_spi sets.
++ */
++ dev_info(dev, "CRIS v32 mmc_spi support hooked to SPI on GPIO"
++ " (bus #%d, cd: %s, wp: %s)\n",
++ spidev->master->bus_num,
++ CONFIGURED_PIN(gpio_defs->mmc.card_detect)
++ ? gpio_defs->mmc.card_detect : "(none)",
++ CONFIGURED_PIN(gpio_defs->mmc.write_protect)
++ ? gpio_defs->mmc.write_protect : "(none)");
++ return 0;
++}
++
++/* Similarly, to undo crisv32_mmcspi_gpio_init. */
++
++static void crisv32_mmcspi_gpio_exit(struct device *dev, void *xmmc_host)
++{
++ struct spi_device *spidev = to_spi_device(dev);
++ struct crisv32_mmc_spi_gpio_hwdata *gpio_defs
++ = spidev->controller_data;
++
++ crisv32_mmcspi_deconfig_common(&gpio_defs->mmc);
++}
++
++static const struct mmc_spi_platform_data crisv32_mmcspi_gpio_pdata = {
++ .init = crisv32_mmcspi_gpio_init,
++ .exit = __devexit_p(crisv32_mmcspi_gpio_exit),
++ .detect_delay = 0,
++ .get_ro = crisv32_mmcspi_gpio_get_ro,
++ .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
++ .setpower = NULL
++};
++
++static struct crisv32_mmc_spi_pinstate crisv32_mmcspi_gpio_pinstate;
++static const struct crisv32_mmc_spi_gpio_hwdata crisv32_mmcspi_gpio_cdata = {
++ {
++ .cs = CONFIG_ETRAX_SPI_CS_PIN,
++ .miso = CONFIG_ETRAX_SPI_DATAIN_PIN,
++ .mosi = CONFIG_ETRAX_SPI_DATAOUT_PIN,
++ .sclk = CONFIG_ETRAX_SPI_CLK_PIN
++ },
++ {
++ .card_detect = CONFIG_ETRAX_SPI_MMC_CD_GPIO_PIN,
++ .write_protect = CONFIG_ETRAX_SPI_MMC_WP_GPIO_PIN,
++ .pinstate = &crisv32_mmcspi_gpio_pinstate
++ }
++};
++#endif /* CONFIG_SPI_ETRAX_GPIO */
++
++struct crisv32_s_b_i_and_driver_info {
++ struct spi_board_info sbi;
++ const char *driver_name;
++
++ /*
++ * We have to adjust the platform device at time of creation
++ * below, to allow the Linux DMA framework to handle DMA. In
++ * the name of simplicity, we state the dma:able property
++ * twice, a bit redundantly; here and in the controller_data
++ * structure pointed to by spi_board_info.
++ */
++ int dma_able;
++};
++
++/* Convenience-macro to avoid typos causing diffs between sser ports. */
++
++#define SSER_CONFIG(n) \
++ { \
++ /* \
++ * No meaningful values for .irq or .chip_select, \
++ * so we leave them out. \
++ */ \
++ { \
++ .modalias = "mmc_spi", \
++ .platform_data \
++ = &crisv32_mmcspi_sser_pdata, \
++ /* \
++ * Casting to avoid a compiler const-warning. \
++ */ \
++ .controller_data \
++ = ((void *) \
++ &crisv32_mmcspi_sser##n##_cdata), \
++ .max_speed_hz = 50 * 1000 * 1000, \
++ .bus_num = n, \
++ /* \
++ * We only provide one mode, so it must be \
++ * default. \
++ */ \
++ .mode = SPI_MODE_3 \
++ }, \
++ crisv32_matching_spi_sser_driver_name, \
++ WITH_ETRAX_SPI_SSER##n##_DMA \
++ }
++
++static const struct crisv32_s_b_i_and_driver_info
++crisv32_mmcspi_devices[] __initdata = {
++#ifdef CONFIG_ETRAX_SPI_SSER0
++ SSER_CONFIG(0),
++#endif
++#ifdef CONFIG_ETRAX_SPI_SSER1
++ SSER_CONFIG(1),
++#endif
++#ifdef CONFIG_SPI_ETRAX_GPIO
++ {
++ {
++ .modalias = "mmc_spi",
++ .platform_data = &crisv32_mmcspi_gpio_pdata,
++ /* Casting to avoid a compiler const-warning. */
++ .controller_data
++ = (void *) &crisv32_mmcspi_gpio_cdata,
++
++ /* No, we can't even reach this number with GPIO. */
++ .max_speed_hz = 5 * 1000 * 1000,
++ .bus_num = 2
++ },
++ crisv32_matching_spi_gpio_driver_name,
++ 0
++ },
++#endif
++};
++
++/* Must not be __initdata. */
++static const char controller_data_ptr_name[] = "controller_data_ptr";
++static u64 allmem_mask = ~(u32) 0;
++
++/*
++ * We have to register the SSER and GPIO "platform_device"s separately
++ * from the "spi_board_info"s in order to have the drivers separated
++ * from the hardware instance info.
++ */
++
++static int __init crisv32_register_mmcspi(void)
++{
++ int ret;
++ void *retp;
++ const struct crisv32_s_b_i_and_driver_info *sbip;
++
++ for (sbip = crisv32_mmcspi_devices;
++ sbip < crisv32_mmcspi_devices
++ + ARRAY_SIZE(crisv32_mmcspi_devices);
++ sbip++) {
++
++ /*
++ * We have to pass the controller data as a device
++ * "resource" (FIXME: too?), so it can be available
++ * for the setup *before* starting the SPI core -
++ * which is where .controller_data makes it to the SPI
++ * structure!
++ */
++ struct resource mmcspi_res = {
++ .start = (resource_size_t) sbip->sbi.controller_data,
++ .end = (resource_size_t) sbip->sbi.controller_data,
++ .name = controller_data_ptr_name
++ };
++
++ /*
++ * Presumably we could pass the irqs and register
++ * addresses and... as individual resources here
++ * instead of privately in spi_board_info
++ * .controller_data, and make that part a bit more
++ * readable. Maybe not worthwhile.
++ */
++ /* Need to cast away const here. FIXME: fix the pdrs API. */
++ retp = platform_device_alloc(sbip->driver_name,
++ sbip->sbi.bus_num);
++ if (IS_ERR_VALUE(PTR_ERR(retp)))
++ return PTR_ERR(retp);
++
++ /*
++ * We can't use platform_device_register_simple as we
++ * want to set stuff in the device to mark that we'd
++ * prefer buffers explicitly passed as DMA-able.
++ * Disabling/omitting the "if" below, cause testing of
++ * the non-DMA-mem execution path of a DMA-capable
++ * driver.
++ */
++ if (sbip->dma_able) {
++ struct platform_device *pdev = retp;
++
++ pdev->dev.dma_mask = &allmem_mask;
++ pdev->dev.coherent_dma_mask = allmem_mask;
++ }
++
++ if ((ret = platform_device_add_resources(retp, &mmcspi_res, 1)) != 0
++ || (ret = platform_device_add(retp)) != 0) {
++ platform_device_put(retp);
++ return ret;
++ }
++
++ /*
++ * The cost of keeping all info rooted at
++ * crisv32_mmcspi_devices is the allocation overhead
++ * for allocating separately each board info (in the
++ * unlikely event that there's more than one).
++ */
++ ret = spi_register_board_info(&sbip->sbi, 1);
++ if (ret != 0)
++ return ret;
++ }
++
++ return 0;
++}
++#ifdef MODULE
++#error "Non-module because spi_register_board_info is one-way; there's no unregister function"
++#endif
++
++/*
++ * Needs to be called before __initcall/module_init because the SPI
++ * bus scanning happens when the actual driver registers with the SPI
++ * machinery (spi_bitbang_start/spi_register_master), not when the
++ * device registers (spi_register_board_info).
++ */
++subsys_initcall(crisv32_register_mmcspi);
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/cryptocop.c linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/cryptocop.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/cryptocop.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/cryptocop.c 2007-01-09 10:29:20.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* $Id: cryptocop.c,v 1.13 2005/04/21 17:27:55 henriken Exp $
++/* $Id: cryptocop.c,v 1.22 2007/01/09 09:29:20 starvik Exp $
+ *
+ * Stream co-processor driver for the ETRAX FS
+ *
+@@ -1718,7 +1718,7 @@
+ * i = i + 1
+ * }
+ * i = Nk
+- *
++ *
+ * while (i < (Nb * (Nr + 1))) {
+ * temp = w[i - 1]
+ * if ((i mod Nk) == 0) {
+@@ -1886,7 +1886,7 @@
+ }
+
+ static irqreturn_t
+-dma_done_interrupt(int irq, void *dev_id, struct pt_regs * regs)
++dma_done_interrupt(int irq, void *dev_id)
+ {
+ struct cryptocop_prio_job *done_job;
+ reg_dma_rw_ack_intr ack_intr = {
+@@ -2226,6 +2226,7 @@
+ &pj->iop->ctx_out, (char*)virt_to_phys(&pj->iop->ctx_out)));
+
+ /* Start input DMA. */
++ flush_dma_context(&pj->iop->ctx_in);
+ DMA_START_CONTEXT(regi_dma9, virt_to_phys(&pj->iop->ctx_in));
+
+ /* Start output DMA. */
+@@ -3459,7 +3460,7 @@
+ int err;
+ int i;
+ static int initialized = 0;
+-
++
+ if (initialized)
+ return 0;
+
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/gpio.c linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/gpio.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/gpio.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/gpio.c 2007-01-09 10:29:20.000000000 +0100
+@@ -1,68 +1,15 @@
+-/* $Id: gpio.c,v 1.16 2005/06/19 17:06:49 starvik Exp $
+- *
++/*
+ * ETRAX CRISv32 general port I/O device
+ *
+- * Copyright (c) 1999, 2000, 2001, 2002, 2003 Axis Communications AB
++ * Copyright (c) 1999-2006 Axis Communications AB
+ *
+ * Authors: Bjorn Wesen (initial version)
+ * Ola Knutsson (LED handling)
+ * Johan Adolfsson (read/set directions, write, port G,
+ * port to ETRAX FS.
+ *
+- * $Log: gpio.c,v $
+- * Revision 1.16 2005/06/19 17:06:49 starvik
+- * Merge of Linux 2.6.12.
+- *
+- * Revision 1.15 2005/05/25 08:22:20 starvik
+- * Changed GPIO port order to fit packages/devices/axis-2.4.
+- *
+- * Revision 1.14 2005/04/24 18:35:08 starvik
+- * Updated with final register headers.
+- *
+- * Revision 1.13 2005/03/15 15:43:00 starvik
+- * dev_id needs to be supplied for shared IRQs.
+- *
+- * Revision 1.12 2005/03/10 17:12:00 starvik
+- * Protect alarm list with spinlock.
+- *
+- * Revision 1.11 2005/01/05 06:08:59 starvik
+- * No need to do local_irq_disable after local_irq_save.
+- *
+- * Revision 1.10 2004/11/19 08:38:31 starvik
+- * Removed old crap.
+- *
+- * Revision 1.9 2004/05/14 07:58:02 starvik
+- * Merge of changes from 2.4
+- *
+- * Revision 1.8 2003/09/11 07:29:50 starvik
+- * Merge of Linux 2.6.0-test5
+- *
+- * Revision 1.7 2003/07/10 13:25:46 starvik
+- * Compiles for 2.5.74
+- * Lindented ethernet.c
+- *
+- * Revision 1.6 2003/07/04 08:27:46 starvik
+- * Merge of Linux 2.5.74
+- *
+- * Revision 1.5 2003/06/10 08:26:37 johana
+- * Etrax -> ETRAX CRISv32
+- *
+- * Revision 1.4 2003/06/05 14:22:48 johana
+- * Initialise some_alarms.
+- *
+- * Revision 1.3 2003/06/05 10:15:46 johana
+- * New INTR_VECT macros.
+- * Enable interrupts in global config.
+- *
+- * Revision 1.2 2003/06/03 15:52:50 johana
+- * Initial CRIS v32 version.
+- *
+- * Revision 1.1 2003/06/03 08:53:15 johana
+- * Copy of os/lx25/arch/cris/arch-v10/drivers/gpio.c version 1.7.
+- *
+ */
+
+-
+ #include <linux/module.h>
+ #include <linux/sched.h>
+ #include <linux/slab.h>
+@@ -85,6 +32,13 @@
+ #include <asm/system.h>
+ #include <asm/irq.h>
+
++#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
++#include "i2c.h"
++
++#define VIRT_I2C_ADDR 0x40
++#endif
++
++
+ /* The following gio ports on ETRAX FS is available:
+ * pa 8 bits, supports interrupts off, hi, low, set, posedge, negedge anyedge
+ * pb 18 bits
+@@ -111,6 +65,10 @@
+ static wait_queue_head_t *gpio_wq;
+ #endif
+
++#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
++static int virtual_gpio_ioctl(struct file *file, unsigned int cmd,
++ unsigned long arg);
++#endif
+ static int gpio_ioctl(struct inode *inode, struct file *file,
+ unsigned int cmd, unsigned long arg);
+ static ssize_t gpio_write(struct file * file, const char * buf, size_t count,
+@@ -148,55 +106,75 @@
+ #define GIO_REG_RD_ADDR(reg) (volatile unsigned long*) (regi_gio + REG_RD_ADDR_gio_##reg )
+ #define GIO_REG_WR_ADDR(reg) (volatile unsigned long*) (regi_gio + REG_RD_ADDR_gio_##reg )
+ unsigned long led_dummy;
++#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
++static unsigned long virtual_dummy;
++static unsigned long virtual_rw_pv_oe = CONFIG_ETRAX_DEF_GIO_PV_OE;
++static unsigned short cached_virtual_gpio_read = 0;
++#endif
+
+-static volatile unsigned long *data_out[NUM_PORTS] = {
+- GIO_REG_WR_ADDR(rw_pa_dout),
+- GIO_REG_WR_ADDR(rw_pb_dout),
++static volatile unsigned long *data_out[NUM_PORTS] = {
++ GIO_REG_WR_ADDR(rw_pa_dout),
++ GIO_REG_WR_ADDR(rw_pb_dout),
+ &led_dummy,
+- GIO_REG_WR_ADDR(rw_pc_dout),
+- GIO_REG_WR_ADDR(rw_pd_dout),
++ GIO_REG_WR_ADDR(rw_pc_dout),
++ GIO_REG_WR_ADDR(rw_pd_dout),
+ GIO_REG_WR_ADDR(rw_pe_dout),
++#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
++ &virtual_dummy,
++#endif
+ };
+
+-static volatile unsigned long *data_in[NUM_PORTS] = {
+- GIO_REG_RD_ADDR(r_pa_din),
+- GIO_REG_RD_ADDR(r_pb_din),
++static volatile unsigned long *data_in[NUM_PORTS] = {
++ GIO_REG_RD_ADDR(r_pa_din),
++ GIO_REG_RD_ADDR(r_pb_din),
+ &led_dummy,
+- GIO_REG_RD_ADDR(r_pc_din),
+- GIO_REG_RD_ADDR(r_pd_din),
++ GIO_REG_RD_ADDR(r_pc_din),
++ GIO_REG_RD_ADDR(r_pd_din),
+ GIO_REG_RD_ADDR(r_pe_din),
++#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
++ &virtual_dummy,
++#endif
+ };
+
+-static unsigned long changeable_dir[NUM_PORTS] = {
++static unsigned long changeable_dir[NUM_PORTS] = {
+ CONFIG_ETRAX_PA_CHANGEABLE_DIR,
+ CONFIG_ETRAX_PB_CHANGEABLE_DIR,
+ 0,
+ CONFIG_ETRAX_PC_CHANGEABLE_DIR,
+- CONFIG_ETRAX_PD_CHANGEABLE_DIR,
++ CONFIG_ETRAX_PD_CHANGEABLE_DIR,
+ CONFIG_ETRAX_PE_CHANGEABLE_DIR,
++#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
++ CONFIG_ETRAX_PV_CHANGEABLE_DIR,
++#endif
+ };
+
+-static unsigned long changeable_bits[NUM_PORTS] = {
++static unsigned long changeable_bits[NUM_PORTS] = {
+ CONFIG_ETRAX_PA_CHANGEABLE_BITS,
+ CONFIG_ETRAX_PB_CHANGEABLE_BITS,
+ 0,
+ CONFIG_ETRAX_PC_CHANGEABLE_BITS,
+ CONFIG_ETRAX_PD_CHANGEABLE_BITS,
+ CONFIG_ETRAX_PE_CHANGEABLE_BITS,
++#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
++ CONFIG_ETRAX_PV_CHANGEABLE_BITS,
++#endif
+ };
+
+-static volatile unsigned long *dir_oe[NUM_PORTS] = {
+- GIO_REG_WR_ADDR(rw_pa_oe),
+- GIO_REG_WR_ADDR(rw_pb_oe),
++static volatile unsigned long *dir_oe[NUM_PORTS] = {
++ GIO_REG_WR_ADDR(rw_pa_oe),
++ GIO_REG_WR_ADDR(rw_pb_oe),
+ &led_dummy,
+- GIO_REG_WR_ADDR(rw_pc_oe),
+- GIO_REG_WR_ADDR(rw_pd_oe),
++ GIO_REG_WR_ADDR(rw_pc_oe),
++ GIO_REG_WR_ADDR(rw_pd_oe),
+ GIO_REG_WR_ADDR(rw_pe_oe),
++#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
++ &virtual_rw_pv_oe,
++#endif
+ };
+
+
+
+-static unsigned int
++static unsigned int
+ gpio_poll(struct file *file,
+ poll_table *wait)
+ {
+@@ -278,7 +256,7 @@
+ return 0;
+
+ if ((data & priv->highalarm) ||
+- (~data & priv->lowalarm)) {
++ (~data & priv->lowalarm)) {
+ mask = POLLIN|POLLRDNORM;
+ }
+
+@@ -288,11 +266,26 @@
+
+ int etrax_gpio_wake_up_check(void)
+ {
+- struct gpio_private *priv = alarmlist;
++ struct gpio_private *priv;
+ unsigned long data = 0;
++ unsigned long flags;
+ int ret = 0;
++ spin_lock_irqsave(&alarm_lock, flags);
++ priv = alarmlist;
+ while (priv) {
++#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
++ if (priv->minor == GPIO_MINOR_V) {
++ data = (unsigned long)cached_virtual_gpio_read;
++ }
++ else {
++ data = *data_in[priv->minor];
++ if (priv->minor == GPIO_MINOR_A) {
++ priv->lowalarm |= (1 << CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN);
++ }
++ }
++#else
+ data = *data_in[priv->minor];
++#endif
+ if ((data & priv->highalarm) ||
+ (~data & priv->lowalarm)) {
+ DP(printk("etrax_gpio_wake_up_check %i\n",priv->minor));
+@@ -301,11 +294,12 @@
+ }
+ priv = priv->next;
+ }
++ spin_unlock_irqrestore(&alarm_lock, flags);
+ return ret;
+ }
+
+-static irqreturn_t
+-gpio_poll_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
++static irqreturn_t
++gpio_poll_timer_interrupt(int irq, void *dev_id)
+ {
+ if (gpio_some_alarms) {
+ return IRQ_RETVAL(etrax_gpio_wake_up_check());
+@@ -314,14 +308,17 @@
+ }
+
+ static irqreturn_t
+-gpio_pa_interrupt(int irq, void *dev_id, struct pt_regs *regs)
++gpio_pa_interrupt(int irq, void *dev_id)
+ {
+ reg_gio_rw_intr_mask intr_mask;
+ reg_gio_r_masked_intr masked_intr;
+ reg_gio_rw_ack_intr ack_intr;
+ unsigned long tmp;
+ unsigned long tmp2;
+-
++#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
++ unsigned char enable_gpiov_ack = 0;
++#endif
++
+ /* Find what PA interrupts are active */
+ masked_intr = REG_RD(gio, regi_gio, r_masked_intr);
+ tmp = REG_TYPE_CONV(unsigned long, reg_gio_r_masked_intr, masked_intr);
+@@ -331,6 +328,17 @@
+ tmp &= (gpio_pa_high_alarms | gpio_pa_low_alarms);
+ spin_unlock(&alarm_lock);
+
++#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
++ /* Something changed on virtual GPIO. Interrupt is acked by
++ * reading the device.
++ */
++ if (tmp & (1 << CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN)) {
++ i2c_read(VIRT_I2C_ADDR, (void *)&cached_virtual_gpio_read,
++ sizeof(cached_virtual_gpio_read));
++ enable_gpiov_ack = 1;
++ }
++#endif
++
+ /* Ack them */
+ ack_intr = REG_TYPE_CONV(reg_gio_rw_ack_intr, unsigned long, tmp);
+ REG_WR(gio, regi_gio, rw_ack_intr, ack_intr);
+@@ -339,13 +347,21 @@
+ intr_mask = REG_RD(gio, regi_gio, rw_intr_mask);
+ tmp2 = REG_TYPE_CONV(unsigned long, reg_gio_rw_intr_mask, intr_mask);
+ tmp2 &= ~tmp;
++#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
++ /* Do not disable interrupt on virtual GPIO. Changes on virtual
++ * pins are only noticed by an interrupt.
++ */
++ if (enable_gpiov_ack) {
++ tmp2 |= (1 << CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN);
++ }
++#endif
+ intr_mask = REG_TYPE_CONV(reg_gio_rw_intr_mask, unsigned long, tmp2);
+ REG_WR(gio, regi_gio, rw_intr_mask, intr_mask);
+
+ if (gpio_some_alarms) {
+ return IRQ_RETVAL(etrax_gpio_wake_up_check());
+ }
+- return IRQ_NONE;
++ return IRQ_NONE;
+ }
+
+
+@@ -358,8 +374,13 @@
+ unsigned long shadow;
+ volatile unsigned long *port;
+ ssize_t retval = count;
+- /* Only bits 0-7 may be used for write operations but allow all
++ /* Only bits 0-7 may be used for write operations but allow all
+ devices except leds... */
++#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
++ if (priv->minor == GPIO_MINOR_V) {
++ return -EFAULT;
++ }
++#endif
+ if (priv->minor == GPIO_MINOR_LEDS) {
+ return -EFAULT;
+ }
+@@ -416,25 +437,24 @@
+
+ static int
+ gpio_open(struct inode *inode, struct file *filp)
+-{
++{
+ struct gpio_private *priv;
+ int p = iminor(inode);
+
+ if (p > GPIO_MINOR_LAST)
+ return -EINVAL;
+
+- priv = (struct gpio_private *)kmalloc(sizeof(struct gpio_private),
++ priv = (struct gpio_private *)kmalloc(sizeof(struct gpio_private),
+ GFP_KERNEL);
+
+ if (!priv)
+ return -ENOMEM;
++ memset(priv, 0, sizeof(*priv));
+
+ priv->minor = p;
+
+- /* initialize the io/alarm struct and link it into our alarmlist */
++ /* initialize the io/alarm struct */
+
+- priv->next = alarmlist;
+- alarmlist = priv;
+ priv->clk_mask = 0;
+ priv->data_mask = 0;
+ priv->highalarm = 0;
+@@ -443,20 +463,30 @@
+
+ filp->private_data = (void *)priv;
+
++ /* link it into our alarmlist */
++ spin_lock_irq(&alarm_lock);
++ priv->next = alarmlist;
++ alarmlist = priv;
++ spin_unlock_irq(&alarm_lock);
++
+ return 0;
+ }
+
+ static int
+ gpio_release(struct inode *inode, struct file *filp)
+ {
+- struct gpio_private *p = alarmlist;
+- struct gpio_private *todel = (struct gpio_private *)filp->private_data;
++ struct gpio_private *p;
++ struct gpio_private *todel;
+ /* local copies while updating them: */
+ unsigned long a_high, a_low;
+ unsigned long some_alarms;
+
+ /* unlink from alarmlist and free the private structure */
+
++ spin_lock_irq(&alarm_lock);
++ p = alarmlist;
++ todel = (struct gpio_private *)filp->private_data;
++
+ if (p == todel) {
+ alarmlist = todel->next;
+ } else {
+@@ -473,6 +503,9 @@
+ a_low = 0;
+ while (p) {
+ if (p->minor == GPIO_MINOR_A) {
++#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
++ p->lowalarm |= (1 << CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN);
++#endif
+ a_high |= p->highalarm;
+ a_low |= p->lowalarm;
+ }
+@@ -483,23 +516,30 @@
+ p = p->next;
+ }
+
+- spin_lock(&alarm_lock);
++#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
++ /* Variables 'some_alarms' and 'a_low' needs to be set here again
++ * to ensure that interrupt for virtual GPIO is handled.
++ */
++ some_alarms = 1;
++ a_low |= (1 << CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN);
++#endif
++
+ gpio_some_alarms = some_alarms;
+ gpio_pa_high_alarms = a_high;
+ gpio_pa_low_alarms = a_low;
+- spin_unlock(&alarm_lock);
++ spin_unlock_irq(&alarm_lock);
+
+ return 0;
+ }
+
+-/* Main device API. ioctl's to read/set/clear bits, as well as to
++/* Main device API. ioctl's to read/set/clear bits, as well as to
+ * set alarms to wait for using a subsequent select().
+ */
+
+ unsigned long inline setget_input(struct gpio_private *priv, unsigned long arg)
+ {
+- /* Set direction 0=unchanged 1=input,
+- * return mask with 1=input
++ /* Set direction 0=unchanged 1=input,
++ * return mask with 1=input
+ */
+ unsigned long flags;
+ unsigned long dir_shadow;
+@@ -512,6 +552,10 @@
+
+ if (priv->minor == GPIO_MINOR_A)
+ dir_shadow ^= 0xFF; /* Only 8 bits */
++#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
++ else if (priv->minor == GPIO_MINOR_V)
++ dir_shadow ^= 0xFFFF; /* Only 16 bits */
++#endif
+ else
+ dir_shadow ^= 0x3FFFF; /* Only 18 bits */
+ return dir_shadow;
+@@ -546,6 +590,11 @@
+ return -EINVAL;
+ }
+
++#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
++ if (priv->minor == GPIO_MINOR_V)
++ return virtual_gpio_ioctl(file, cmd, arg);
++#endif
++
+ switch (_IOC_NR(cmd)) {
+ case IO_READBITS: /* Use IO_READ_INBITS and IO_READ_OUTBITS instead */
+ // read the port
+@@ -553,8 +602,6 @@
+ break;
+ case IO_SETBITS:
+ local_irq_save(flags);
+- if (arg & 0x04)
+- printk("GPIO SET 2\n");
+ // set changeable bits with a 1 in arg
+ shadow = *data_out[priv->minor];
+ shadow |= (arg & changeable_bits[priv->minor]);
+@@ -563,8 +610,6 @@
+ break;
+ case IO_CLRBITS:
+ local_irq_save(flags);
+- if (arg & 0x04)
+- printk("GPIO CLR 2\n");
+ // clear changeable bits with a 1 in arg
+ shadow = *data_out[priv->minor];
+ shadow &= ~(arg & changeable_bits[priv->minor]);
+@@ -574,52 +619,52 @@
+ case IO_HIGHALARM:
+ // set alarm when bits with 1 in arg go high
+ priv->highalarm |= arg;
+- spin_lock(&alarm_lock);
++ spin_lock_irqsave(&alarm_lock, flags);
+ gpio_some_alarms = 1;
+ if (priv->minor == GPIO_MINOR_A) {
+ gpio_pa_high_alarms |= arg;
+ }
+- spin_unlock(&alarm_lock);
++ spin_unlock_irqrestore(&alarm_lock, flags);
+ break;
+ case IO_LOWALARM:
+ // set alarm when bits with 1 in arg go low
+ priv->lowalarm |= arg;
+- spin_lock(&alarm_lock);
++ spin_lock_irqsave(&alarm_lock, flags);
+ gpio_some_alarms = 1;
+ if (priv->minor == GPIO_MINOR_A) {
+ gpio_pa_low_alarms |= arg;
+ }
+- spin_unlock(&alarm_lock);
++ spin_unlock_irqrestore(&alarm_lock, flags);
+ break;
+ case IO_CLRALARM:
+ // clear alarm for bits with 1 in arg
+ priv->highalarm &= ~arg;
+ priv->lowalarm &= ~arg;
+- spin_lock(&alarm_lock);
++ spin_lock_irqsave(&alarm_lock, flags);
+ if (priv->minor == GPIO_MINOR_A) {
+- if (gpio_pa_high_alarms & arg ||
++ if (gpio_pa_high_alarms & arg ||
+ gpio_pa_low_alarms & arg) {
+ /* Must update the gpio_pa_*alarms masks */
+ }
+ }
+- spin_unlock(&alarm_lock);
++ spin_unlock_irqrestore(&alarm_lock, flags);
+ break;
+ case IO_READDIR: /* Use IO_SETGET_INPUT/OUTPUT instead! */
+ /* Read direction 0=input 1=output */
+ return *dir_oe[priv->minor];
+ case IO_SETINPUT: /* Use IO_SETGET_INPUT instead! */
+- /* Set direction 0=unchanged 1=input,
+- * return mask with 1=input
++ /* Set direction 0=unchanged 1=input,
++ * return mask with 1=input
+ */
+ return setget_input(priv, arg);
+ break;
+ case IO_SETOUTPUT: /* Use IO_SETGET_OUTPUT instead! */
+- /* Set direction 0=unchanged 1=output,
+- * return mask with 1=output
++ /* Set direction 0=unchanged 1=output,
++ * return mask with 1=output
+ */
+ return setget_output(priv, arg);
+
+- case IO_CFG_WRITE_MODE:
++ case IO_CFG_WRITE_MODE:
+ {
+ unsigned long dir_shadow;
+ dir_shadow = *dir_oe[priv->minor];
+@@ -641,7 +686,7 @@
+ }
+ break;
+ }
+- case IO_READ_INBITS:
++ case IO_READ_INBITS:
+ /* *arg is result of reading the input pins */
+ val = *data_in[priv->minor];
+ if (copy_to_user((unsigned long*)arg, &val, sizeof(val)))
+@@ -654,7 +699,7 @@
+ if (copy_to_user((unsigned long*)arg, &val, sizeof(val)))
+ return -EFAULT;
+ break;
+- case IO_SETGET_INPUT:
++ case IO_SETGET_INPUT:
+ /* bits set in *arg is set to input,
+ * *arg updated with current input pins.
+ */
+@@ -684,6 +729,132 @@
+ return 0;
+ }
+
++#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
++static int
++virtual_gpio_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
++{
++ unsigned long flags;
++ unsigned short val;
++ unsigned short shadow;
++ struct gpio_private *priv = (struct gpio_private *)file->private_data;
++
++ switch (_IOC_NR(cmd)) {
++ case IO_SETBITS:
++ local_irq_save(flags);
++ // set changeable bits with a 1 in arg
++ i2c_read(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
++ shadow |= ~*dir_oe[priv->minor];
++ shadow |= (arg & changeable_bits[priv->minor]);
++ i2c_write(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
++ local_irq_restore(flags);
++ break;
++ case IO_CLRBITS:
++ local_irq_save(flags);
++ // clear changeable bits with a 1 in arg
++ i2c_read(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
++ shadow |= ~*dir_oe[priv->minor];
++ shadow &= ~(arg & changeable_bits[priv->minor]);
++ i2c_write(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
++ local_irq_restore(flags);
++ break;
++ case IO_HIGHALARM:
++ // set alarm when bits with 1 in arg go high
++ priv->highalarm |= arg;
++ spin_lock(&alarm_lock);
++ gpio_some_alarms = 1;
++ spin_unlock(&alarm_lock);
++ break;
++ case IO_LOWALARM:
++ // set alarm when bits with 1 in arg go low
++ priv->lowalarm |= arg;
++ spin_lock(&alarm_lock);
++ gpio_some_alarms = 1;
++ spin_unlock(&alarm_lock);
++ break;
++ case IO_CLRALARM:
++ // clear alarm for bits with 1 in arg
++ priv->highalarm &= ~arg;
++ priv->lowalarm &= ~arg;
++ spin_lock(&alarm_lock);
++ spin_unlock(&alarm_lock);
++ break;
++ case IO_CFG_WRITE_MODE:
++ {
++ unsigned long dir_shadow;
++ dir_shadow = *dir_oe[priv->minor];
++
++ priv->clk_mask = arg & 0xFF;
++ priv->data_mask = (arg >> 8) & 0xFF;
++ priv->write_msb = (arg >> 16) & 0x01;
++ /* Check if we're allowed to change the bits and
++ * the direction is correct
++ */
++ if (!((priv->clk_mask & changeable_bits[priv->minor]) &&
++ (priv->data_mask & changeable_bits[priv->minor]) &&
++ (priv->clk_mask & dir_shadow) &&
++ (priv->data_mask & dir_shadow)))
++ {
++ priv->clk_mask = 0;
++ priv->data_mask = 0;
++ return -EPERM;
++ }
++ break;
++ }
++ case IO_READ_INBITS:
++ /* *arg is result of reading the input pins */
++ val = cached_virtual_gpio_read;
++ val &= ~*dir_oe[priv->minor];
++ if (copy_to_user((unsigned long*)arg, &val, sizeof(val)))
++ return -EFAULT;
++ return 0;
++ break;
++ case IO_READ_OUTBITS:
++ /* *arg is result of reading the output shadow */
++ i2c_read(VIRT_I2C_ADDR, (void *)&val, sizeof(val));
++ val &= *dir_oe[priv->minor];
++ if (copy_to_user((unsigned long*)arg, &val, sizeof(val)))
++ return -EFAULT;
++ break;
++ case IO_SETGET_INPUT:
++ {
++ /* bits set in *arg is set to input,
++ * *arg updated with current input pins.
++ */
++ unsigned short input_mask = ~*dir_oe[priv->minor];
++ if (copy_from_user(&val, (unsigned long*)arg, sizeof(val)))
++ return -EFAULT;
++ val = setget_input(priv, val);
++ if (copy_to_user((unsigned long*)arg, &val, sizeof(val)))
++ return -EFAULT;
++ if ((input_mask & val) != input_mask) {
++ /* Input pins changed. All ports desired as input
++ * should be set to logic 1.
++ */
++ unsigned short change = input_mask ^ val;
++ i2c_read(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
++ shadow &= ~change;
++ shadow |= val;
++ i2c_write(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
++ }
++ break;
++ }
++ case IO_SETGET_OUTPUT:
++ /* bits set in *arg is set to output,
++ * *arg updated with current output pins.
++ */
++ if (copy_from_user(&val, (unsigned long*)arg, sizeof(val)))
++ return -EFAULT;
++ val = setget_output(priv, val);
++ if (copy_to_user((unsigned long*)arg, &val, sizeof(val)))
++ return -EFAULT;
++ break;
++ default:
++ return -EINVAL;
++ } /* switch */
++ return 0;
++}
++#endif /* CONFIG_ETRAX_VIRTUAL_GPIO */
++
+ static int
+ gpio_leds_ioctl(unsigned int cmd, unsigned long arg)
+ {
+@@ -714,6 +885,66 @@
+ .release = gpio_release,
+ };
+
++#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
++static void
++virtual_gpio_init(void)
++{
++ reg_gio_rw_intr_cfg intr_cfg;
++ reg_gio_rw_intr_mask intr_mask;
++ unsigned short shadow;
++
++ shadow = ~virtual_rw_pv_oe; /* Input ports should be set to logic 1 */
++ shadow |= CONFIG_ETRAX_DEF_GIO_PV_OUT;
++ i2c_write(VIRT_I2C_ADDR, (void *)&shadow, sizeof(shadow));
++
++ /* Set interrupt mask and on what state the interrupt shall trigger.
++ * For virtual gpio the interrupt shall trigger on logic '0'.
++ */
++ intr_cfg = REG_RD(gio, regi_gio, rw_intr_cfg);
++ intr_mask = REG_RD(gio, regi_gio, rw_intr_mask);
++
++ switch (CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN) {
++ case 0:
++ intr_cfg.pa0 = regk_gio_lo;
++ intr_mask.pa0 = regk_gio_yes;
++ break;
++ case 1:
++ intr_cfg.pa1 = regk_gio_lo;
++ intr_mask.pa1 = regk_gio_yes;
++ break;
++ case 2:
++ intr_cfg.pa2 = regk_gio_lo;
++ intr_mask.pa2 = regk_gio_yes;
++ break;
++ case 3:
++ intr_cfg.pa3 = regk_gio_lo;
++ intr_mask.pa3 = regk_gio_yes;
++ break;
++ case 4:
++ intr_cfg.pa4 = regk_gio_lo;
++ intr_mask.pa4 = regk_gio_yes;
++ break;
++ case 5:
++ intr_cfg.pa5 = regk_gio_lo;
++ intr_mask.pa5 = regk_gio_yes;
++ break;
++ case 6:
++ intr_cfg.pa6 = regk_gio_lo;
++ intr_mask.pa6 = regk_gio_yes;
++ break;
++ case 7:
++ intr_cfg.pa7 = regk_gio_lo;
++ intr_mask.pa7 = regk_gio_yes;
++ break;
++ }
++
++ REG_WR(gio, regi_gio, rw_intr_cfg, intr_cfg);
++ REG_WR(gio, regi_gio, rw_intr_mask, intr_mask);
++
++ gpio_pa_low_alarms |= (1 << CONFIG_ETRAX_VIRTUAL_GPIO_INTERRUPT_PA_PIN);
++ gpio_some_alarms = 1;
++}
++#endif
+
+ /* main driver initialization routine, called from mem.c */
+
+@@ -732,17 +963,18 @@
+ }
+
+ /* Clear all leds */
+- LED_NETWORK_SET(0);
++ LED_NETWORK_GRP0_SET(0);
++ LED_NETWORK_GRP1_SET(0);
+ LED_ACTIVE_SET(0);
+ LED_DISK_READ(0);
+ LED_DISK_WRITE(0);
+
+- printk("ETRAX FS GPIO driver v2.5, (c) 2003-2005 Axis Communications AB\n");
++ printk("ETRAX FS GPIO driver v2.5, (c) 2003-2006 Axis Communications AB\n");
+ /* We call etrax_gpio_wake_up_check() from timer interrupt and
+ * from cpu_idle() in kernel/process.c
+ * The check in cpu_idle() reduces latency from ~15 ms to ~6 ms
+ * in some tests.
+- */
++ */
+ if (request_irq(TIMER_INTR_VECT, gpio_poll_timer_interrupt,
+ IRQF_SHARED | IRQF_DISABLED,"gpio poll", &alarmlist)) {
+ printk("err: timer0 irq for gpio\n");
+@@ -757,6 +989,10 @@
+ intr_mask.gen_io = 1;
+ REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
+
++#ifdef CONFIG_ETRAX_VIRTUAL_GPIO
++ virtual_gpio_init();
++#endif
++
+ return res;
+ }
+
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/i2c.c linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/i2c.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/i2c.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/i2c.c 2006-11-06 16:48:06.000000000 +0100
+@@ -8,11 +8,11 @@
+ *!
+ *! Nov 30 1998 Torbjorn Eliasson Initial version.
+ *! Bjorn Wesen Elinux kernel version.
+-*! Jan 14 2000 Johan Adolfsson Fixed PB shadow register stuff -
++*! Jan 14 2000 Johan Adolfsson Fixed PB shadow register stuff -
+ *! don't use PB_I2C if DS1302 uses same bits,
+ *! use PB.
+ *| June 23 2003 Pieter Grimmerink Added 'i2c_sendnack'. i2c_readreg now
+-*| generates nack on last received byte,
++*| generates nack on last received byte,
+ *| instead of ack.
+ *| i2c_getack changed data level while clock
+ *| was high, causing DS75 to see a stop condition
+@@ -22,7 +22,7 @@
+ *! (C) Copyright 1999-2002 Axis Communications AB, LUND, SWEDEN
+ *!
+ *!***************************************************************************/
+-/* $Id: i2c.c,v 1.2 2005/05/09 15:29:49 starvik Exp $ */
++/* $Id: i2c.c,v 1.6 2006/11/06 15:48:06 imres Exp $ */
+ /****************** INCLUDE FILES SECTION ***********************************/
+
+ #include <linux/module.h>
+@@ -60,8 +60,8 @@
+ #define I2C_DATA_HIGH 1
+ #define I2C_DATA_LOW 0
+
+-#define i2c_enable()
+-#define i2c_disable()
++#define i2c_enable()
++#define i2c_disable()
+
+ /* enable or disable output-enable, to select output or input on the i2c bus */
+
+@@ -79,6 +79,8 @@
+
+ #define i2c_delay(usecs) udelay(usecs)
+
++static DEFINE_SPINLOCK(i2c_lock); /* Protect directions etc */
++
+ /****************** VARIABLE SECTION ************************************/
+
+ static struct crisv32_iopin cris_i2c_clk;
+@@ -154,7 +156,7 @@
+ } else {
+ i2c_data(I2C_DATA_LOW);
+ }
+-
++
+ i2c_delay(CLOCK_LOW_TIME/2);
+ i2c_clk(I2C_CLOCK_HIGH);
+ i2c_delay(CLOCK_HIGH_TIME);
+@@ -213,7 +215,7 @@
+ }
+ i2c_clk(I2C_CLOCK_HIGH);
+ i2c_delay(CLOCK_HIGH_TIME);
+-
++
+ /*
+ * we leave the clock low, getbyte is usually followed
+ * by sendack/nack, they assume the clock to be low
+@@ -252,6 +254,7 @@
+ * generate ACK clock pulse
+ */
+ i2c_clk(I2C_CLOCK_HIGH);
++#if 0
+ /*
+ * Use PORT PB instead of I2C
+ * for input. (I2C not working)
+@@ -264,6 +267,8 @@
+ i2c_data(1);
+ i2c_disable();
+ i2c_dir_in();
++#endif
++
+ /*
+ * now wait for ack
+ */
+@@ -285,13 +290,15 @@
+ * before we enable our output. If we keep data high
+ * and enable output, we would generate a stop condition.
+ */
++#if 0
+ i2c_data(I2C_DATA_LOW);
+-
++
+ /*
+ * end clock pulse
+ */
+ i2c_enable();
+ i2c_dir_out();
++#endif
+ i2c_clk(I2C_CLOCK_LOW);
+ i2c_delay(CLOCK_HIGH_TIME/4);
+ /*
+@@ -338,7 +345,7 @@
+ */
+ i2c_data(I2C_DATA_HIGH);
+ i2c_delay(CLOCK_LOW_TIME);
+-
++
+ i2c_dir_in();
+ }
+
+@@ -369,24 +376,160 @@
+ i2c_delay(CLOCK_HIGH_TIME);
+ i2c_clk(I2C_CLOCK_LOW);
+ i2c_delay(CLOCK_LOW_TIME);
+-
++
+ i2c_dir_in();
+ }
+
+ /*#---------------------------------------------------------------------------
+ *#
++*# FUNCTION NAME: i2c_write
++*#
++*# DESCRIPTION : Writes a value to an I2C device
++*#
++*#--------------------------------------------------------------------------*/
++int
++i2c_write(unsigned char theSlave, void *data, size_t nbytes)
++{
++ int error, cntr = 3;
++ unsigned char bytes_wrote = 0;
++ unsigned char value;
++ unsigned long flags;
++
++ spin_lock(&i2c_lock);
++
++ do {
++ error = 0;
++ /*
++ * we don't like to be interrupted
++ */
++ local_irq_save(flags);
++
++ i2c_start();
++ /*
++ * send slave address
++ */
++ i2c_outbyte((theSlave & 0xfe));
++ /*
++ * wait for ack
++ */
++ if(!i2c_getack())
++ error = 1;
++ /*
++ * send data
++ */
++ for (bytes_wrote = 0; bytes_wrote < nbytes; bytes_wrote++) {
++ memcpy(&value, data + bytes_wrote, sizeof value);
++ i2c_outbyte(value);
++ /*
++ * now it's time to wait for ack
++ */
++ if (!i2c_getack())
++ error |= 4;
++ }
++ /*
++ * end byte stream
++ */
++ i2c_stop();
++ /*
++ * enable interrupt again
++ */
++ local_irq_restore(flags);
++
++ } while(error && cntr--);
++
++ i2c_delay(CLOCK_LOW_TIME);
++
++ spin_unlock(&i2c_lock);
++
++ return -error;
++}
++
++/*#---------------------------------------------------------------------------
++*#
++*# FUNCTION NAME: i2c_read
++*#
++*# DESCRIPTION : Reads a value from an I2C device
++*#
++*#--------------------------------------------------------------------------*/
++int
++i2c_read(unsigned char theSlave, void *data, size_t nbytes)
++{
++ unsigned char b = 0;
++ unsigned char bytes_read = 0;
++ int error, cntr = 3;
++ unsigned long flags;
++
++ spin_lock(&i2c_lock);
++
++ do {
++ error = 0;
++ memset(data, 0, nbytes);
++ /*
++ * we don't like to be interrupted
++ */
++ local_irq_save(flags);
++ /*
++ * generate start condition
++ */
++ i2c_start();
++
++ /*
++ * send slave address
++ */
++ i2c_outbyte((theSlave | 0x01));
++ /*
++ * wait for ack
++ */
++ if(!i2c_getack())
++ error = 1;
++ /*
++ * fetch data
++ */
++ for (bytes_read = 0; bytes_read < nbytes; bytes_read++) {
++ b = i2c_inbyte();
++ memcpy(data + bytes_read, &b, sizeof b);
++
++ if (bytes_read < (nbytes - 1)) {
++ i2c_sendack();
++ }
++ }
++ /*
++ * last received byte needs to be nacked
++ * instead of acked
++ */
++ i2c_sendnack();
++ /*
++ * end sequence
++ */
++ i2c_stop();
++ /*
++ * enable interrupt again
++ */
++ local_irq_restore(flags);
++
++ } while(error && cntr--);
++
++ spin_unlock(&i2c_lock);
++
++ return -error;
++}
++
++/*#---------------------------------------------------------------------------
++*#
+ *# FUNCTION NAME: i2c_writereg
+ *#
+ *# DESCRIPTION : Writes a value to an I2C device
+ *#
+ *#--------------------------------------------------------------------------*/
+ int
+-i2c_writereg(unsigned char theSlave, unsigned char theReg,
++i2c_writereg(unsigned char theSlave, unsigned char theReg,
+ unsigned char theValue)
+ {
+ int error, cntr = 3;
+ unsigned long flags;
+
++ spin_lock(&i2c_lock);
++
+ do {
+ error = 0;
+ /*
+@@ -431,10 +574,12 @@
+ * enable interrupt again
+ */
+ local_irq_restore(flags);
+-
++
+ } while(error && cntr--);
+
+ i2c_delay(CLOCK_LOW_TIME);
++
++ spin_unlock(&i2c_lock);
+
+ return -error;
+ }
+@@ -453,6 +598,8 @@
+ int error, cntr = 3;
+ unsigned long flags;
+
++ spin_lock(&i2c_lock);
++
+ do {
+ error = 0;
+ /*
+@@ -463,7 +610,7 @@
+ * generate start condition
+ */
+ i2c_start();
+-
++
+ /*
+ * send slave address
+ */
+@@ -482,7 +629,7 @@
+ * now it's time to wait for ack
+ */
+ if(!i2c_getack())
+- error = 1;
++ error |= 2;
+ /*
+ * repeat start condition
+ */
+@@ -496,7 +643,7 @@
+ * wait for ack
+ */
+ if(!i2c_getack())
+- error = 1;
++ error |= 4;
+ /*
+ * fetch register
+ */
+@@ -514,9 +661,11 @@
+ * enable interrupt again
+ */
+ local_irq_restore(flags);
+-
++
+ } while(error && cntr--);
+
++ spin_unlock(&i2c_lock);
++
+ return b;
+ }
+
+@@ -546,7 +695,7 @@
+ switch (_IOC_NR(cmd)) {
+ case I2C_WRITEREG:
+ /* write to an i2c slave */
+- D(printk("i2cw %d %d %d\n",
++ D(printk("i2cw %d %d %d\n",
+ I2C_ARGSLAVE(arg),
+ I2C_ARGREG(arg),
+ I2C_ARGVALUE(arg)));
+@@ -558,18 +707,18 @@
+ {
+ unsigned char val;
+ /* read from an i2c slave */
+- D(printk("i2cr %d %d ",
++ D(printk("i2cr %d %d ",
+ I2C_ARGSLAVE(arg),
+ I2C_ARGREG(arg)));
+ val = i2c_readreg(I2C_ARGSLAVE(arg), I2C_ARGREG(arg));
+ D(printk("= %d\n", val));
+ return val;
+- }
++ }
+ default:
+ return -EINVAL;
+
+ }
+-
++
+ return 0;
+ }
+
+@@ -583,28 +732,53 @@
+ int __init
+ i2c_init(void)
+ {
+- int res;
++ static int res = 0;
++ static int first = 1;
++
++ if (!first) {
++ return res;
++ }
++ first = 0;
+
+- /* Setup and enable the Port B I2C interface */
++ /* Setup and enable the DATA and CLK pins */
+
+- crisv32_io_get_name(&cris_i2c_data, CONFIG_ETRAX_I2C_DATA_PORT);
+- crisv32_io_get_name(&cris_i2c_clk, CONFIG_ETRAX_I2C_CLK_PORT);
++ res = crisv32_io_get_name(&cris_i2c_data, CONFIG_ETRAX_I2C_DATA_PORT);
++ if (res < 0) {
++ return res;
++ }
++
++ res = crisv32_io_get_name(&cris_i2c_clk, CONFIG_ETRAX_I2C_CLK_PORT);
++ crisv32_io_set_dir(&cris_i2c_clk, crisv32_io_dir_out);
++
++ return res;
++}
+
+- /* register char device */
+
++int __init
++i2c_register(void)
++{
++
++ int res;
++
++ res = i2c_init();
++ if (res < 0) {
++ return res;
++ }
++
++ /* register char device */
+ res = register_chrdev(I2C_MAJOR, i2c_name, &i2c_fops);
+ if(res < 0) {
+ printk(KERN_ERR "i2c: couldn't get a major number.\n");
+ return res;
+ }
+
+- printk(KERN_INFO "I2C driver v2.2, (c) 1999-2001 Axis Communications AB\n");
+-
++ printk(KERN_INFO "I2C driver v2.2, (c) 1999-2004 Axis Communications AB\n");
++
+ return 0;
+ }
+
+ /* this makes sure that i2c_init is called during boot */
+
+-module_init(i2c_init);
++module_init(i2c_register);
+
+ /****************** END OF FILE i2c.c ********************************/
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/i2c.h linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/i2c.h
+--- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/i2c.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/i2c.h 2006-11-06 16:48:06.000000000 +0100
+@@ -3,6 +3,8 @@
+
+ /* High level I2C actions */
+ int __init i2c_init(void);
++int i2c_write(unsigned char theSlave, void *data, size_t nbytes);
++int i2c_read(unsigned char theSlave, void *data, size_t nbytes);
+ int i2c_writereg(unsigned char theSlave, unsigned char theReg, unsigned char theValue);
+ unsigned char i2c_readreg(unsigned char theSlave, unsigned char theReg);
+
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/iop_fw_load.c linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/iop_fw_load.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/iop_fw_load.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/iop_fw_load.c 2005-04-07 11:27:46.000000000 +0200
+@@ -67,12 +67,12 @@
+ return -ENODEV;
+
+ /* get firmware */
+- retval = request_firmware(&fw_entry,
+- fw_name,
++ retval = request_firmware(&fw_entry,
++ fw_name,
+ &iop_spu_device[spu_inst]);
+ if (retval != 0)
+ {
+- printk(KERN_ERR
++ printk(KERN_ERR
+ "iop_load_spu: Failed to load firmware \"%s\"\n",
+ fw_name);
+ return retval;
+@@ -123,7 +123,7 @@
+ return retval;
+ }
+
+-int iop_fw_load_mpu(unsigned char *fw_name)
++int iop_fw_load_mpu(unsigned char *fw_name)
+ {
+ const unsigned int start_addr = 0;
+ reg_iop_mpu_rw_ctrl mpu_ctrl;
+@@ -135,13 +135,13 @@
+ retval = request_firmware(&fw_entry, fw_name, &iop_mpu_device);
+ if (retval != 0)
+ {
+- printk(KERN_ERR
++ printk(KERN_ERR
+ "iop_load_spu: Failed to load firmware \"%s\"\n",
+ fw_name);
+ return retval;
+ }
+ data = (u32 *) fw_entry->data;
+-
++
+ /* disable MPU */
+ mpu_ctrl.en = regk_iop_mpu_no;
+ REG_WR(iop_mpu, regi_iop_mpu, rw_ctrl, mpu_ctrl);
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/nandflash.c linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/nandflash.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/nandflash.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/nandflash.c 2006-10-16 14:56:46.000000000 +0200
+@@ -5,8 +5,8 @@
+ *
+ * Derived from drivers/mtd/nand/spia.c
+ * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
+- *
+- * $Id: nandflash.c,v 1.3 2005/06/01 10:57:12 starvik Exp $
++ *
++ * $Id: nandflash.c,v 1.8 2006/10/16 12:56:46 ricardw Exp $
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+@@ -32,37 +32,53 @@
+ #define ALE_BIT 6
+ #define BY_BIT 7
+
++/* Bitmask for control pins */
++#define PIN_BITMASK ((1 << CE_BIT) | (1 << CLE_BIT) | (1 << ALE_BIT))
++
++/* Bitmask for mtd nand control bits */
++#define CTRL_BITMASK (NAND_NCE | NAND_CLE | NAND_ALE)
++
++
+ static struct mtd_info *crisv32_mtd = NULL;
+-/*
++/*
+ * hardware specific access to control-lines
+ */
+-static void crisv32_hwcontrol(struct mtd_info *mtd, int cmd)
++static void crisv32_hwcontrol(struct mtd_info *mtd, int cmd,
++ unsigned int ctrl)
+ {
+ unsigned long flags;
+- reg_gio_rw_pa_dout dout = REG_RD(gio, regi_gio, rw_pa_dout);
++ reg_gio_rw_pa_dout dout;
++ struct nand_chip *this = mtd->priv;
+
+ local_irq_save(flags);
+- switch(cmd){
+- case NAND_CTL_SETCLE:
+- dout.data |= (1<<CLE_BIT);
+- break;
+- case NAND_CTL_CLRCLE:
+- dout.data &= ~(1<<CLE_BIT);
+- break;
+- case NAND_CTL_SETALE:
+- dout.data |= (1<<ALE_BIT);
+- break;
+- case NAND_CTL_CLRALE:
+- dout.data &= ~(1<<ALE_BIT);
+- break;
+- case NAND_CTL_SETNCE:
+- dout.data |= (1<<CE_BIT);
+- break;
+- case NAND_CTL_CLRNCE:
+- dout.data &= ~(1<<CE_BIT);
+- break;
++
++ /* control bits change */
++ if (ctrl & NAND_CTRL_CHANGE) {
++ dout = REG_RD(gio, regi_gio, rw_pa_dout);
++ dout.data &= ~PIN_BITMASK;
++
++#if (CE_BIT == 4 && NAND_NCE == 1 && \
++ CLE_BIT == 5 && NAND_CLE == 2 && \
++ ALE_BIT == 6 && NAND_ALE == 4)
++ /* Pins in same order as control bits, but shifted.
++ * Optimize for this case; works for 2.6.18 */
++ dout.data |= ((ctrl & CTRL_BITMASK) ^ NAND_NCE) << CE_BIT;
++#else
++ /* the slow way */
++ if (!(ctrl & NAND_NCE))
++ dout.data |= (1 << CE_BIT);
++ if (ctrl & NAND_CLE)
++ dout.data |= (1 << CLE_BIT);
++ if (ctrl & NAND_ALE)
++ dout.data |= (1 << ALE_BIT);
++#endif
++ REG_WR(gio, regi_gio, rw_pa_dout, dout);
+ }
+- REG_WR(gio, regi_gio, rw_pa_dout, dout);
++
++ /* command to chip */
++ if (cmd != NAND_CMD_NONE)
++ writeb(cmd, this->IO_ADDR_W);
++
+ local_irq_restore(flags);
+ }
+
+@@ -129,26 +145,26 @@
+ /* Set address of NAND IO lines */
+ this->IO_ADDR_R = read_cs;
+ this->IO_ADDR_W = write_cs;
+- this->hwcontrol = crisv32_hwcontrol;
++ this->cmd_ctrl = crisv32_hwcontrol;
+ this->dev_ready = crisv32_device_ready;
+ /* 20 us command delay time */
+- this->chip_delay = 20;
+- this->eccmode = NAND_ECC_SOFT;
++ this->chip_delay = 20;
++ this->ecc.mode = NAND_ECC_SOFT;
+
+ /* Enable the following for a flash based bad block table */
+- this->options = NAND_USE_FLASH_BBT;
++ /* this->options = NAND_USE_FLASH_BBT; */
+
+ /* Scan to find existance of the device */
+ if (nand_scan (crisv32_mtd, 1)) {
+ err = -ENXIO;
+ goto out_ior;
+ }
+-
++
+ return crisv32_mtd;
+-
++
+ out_ior:
+ iounmap((void *)read_cs);
+- iounmap((void *)write_cs);
++ iounmap((void *)write_cs);
+ out_mtd:
+ kfree (crisv32_mtd);
+ return NULL;
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/pcf8563.c linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/pcf8563.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/pcf8563.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/pcf8563.c 2006-10-27 17:22:13.000000000 +0200
+@@ -10,7 +10,7 @@
+ * 400 kbits/s. The built-in word address register is incremented
+ * automatically after each written or read byte.
+ *
+- * Copyright (c) 2002-2003, Axis Communications AB
++ * Copyright (c) 2002-2006, Axis Communications AB
+ * All rights reserved.
+ *
+ * Author: Tobias Anderberg <tobiasa@axis.com>.
+@@ -37,24 +37,27 @@
+ #define PCF8563_MAJOR 121 /* Local major number. */
+ #define DEVICE_NAME "rtc" /* Name which is registered in /proc/devices. */
+ #define PCF8563_NAME "PCF8563"
+-#define DRIVER_VERSION "$Revision: 1.1 $"
++#define DRIVER_VERSION "$Revision: 1.9 $"
+
+ /* Two simple wrapper macros, saves a few keystrokes. */
+ #define rtc_read(x) i2c_readreg(RTC_I2C_READ, x)
+ #define rtc_write(x,y) i2c_writereg(RTC_I2C_WRITE, x, y)
+
++static DEFINE_SPINLOCK(rtc_lock); /* Protect state etc */
++
+ static const unsigned char days_in_month[] =
+ { 0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 };
+
+ int pcf8563_ioctl(struct inode *, struct file *, unsigned int, unsigned long);
+-int pcf8563_open(struct inode *, struct file *);
+-int pcf8563_release(struct inode *, struct file *);
++
++/* Cache VL bit value read at driver init since writing the RTC_SECOND
++ * register clears the VL status.
++ */
++static int voltage_low = 0;
+
+ static struct file_operations pcf8563_fops = {
+ owner: THIS_MODULE,
+ ioctl: pcf8563_ioctl,
+- open: pcf8563_open,
+- release: pcf8563_release,
+ };
+
+ unsigned char
+@@ -62,7 +65,7 @@
+ {
+ unsigned char res = rtc_read(reg);
+
+- /* The PCF8563 does not return 0 for unimplemented bits */
++ /* The PCF8563 does not return 0 for unimplemented bits. */
+ switch (reg) {
+ case RTC_SECONDS:
+ case RTC_MINUTES:
+@@ -95,11 +98,6 @@
+ void
+ pcf8563_writereg(int reg, unsigned char val)
+ {
+-#ifdef CONFIG_ETRAX_RTC_READONLY
+- if (reg == RTC_CONTROL1 || (reg >= RTC_SECONDS && reg <= RTC_YEAR))
+- return;
+-#endif
+-
+ rtc_write(reg, val);
+ }
+
+@@ -114,11 +112,13 @@
+ tm->tm_mon = rtc_read(RTC_MONTH);
+ tm->tm_year = rtc_read(RTC_YEAR);
+
+- if (tm->tm_sec & 0x80)
++ if (tm->tm_sec & 0x80) {
+ printk(KERN_WARNING "%s: RTC Voltage Low - reliable date/time "
+ "information is no longer guaranteed!\n", PCF8563_NAME);
++ }
+
+- tm->tm_year = BCD_TO_BIN(tm->tm_year) + ((tm->tm_mon & 0x80) ? 100 : 0);
++ tm->tm_year = BCD_TO_BIN(tm->tm_year) +
++ ((tm->tm_mon & 0x80) ? 100 : 0);
+ tm->tm_sec &= 0x7F;
+ tm->tm_min &= 0x7F;
+ tm->tm_hour &= 0x3F;
+@@ -137,8 +137,20 @@
+ int __init
+ pcf8563_init(void)
+ {
++ static int res = 0;
++ static int first = 1;
++
++ if (!first) {
++ return res;
++ }
++ first = 0;
++
+ /* Initiate the i2c protocol. */
+- i2c_init();
++ res = i2c_init();
++ if (res < 0) {
++ printk(KERN_CRIT "pcf8563_init: Failed to init i2c.\n");
++ return res;
++ }
+
+ /*
+ * First of all we need to reset the chip. This is done by
+@@ -170,31 +182,28 @@
+ if (rtc_write(RTC_WEEKDAY_ALARM, 0x80) < 0)
+ goto err;
+
+- if (register_chrdev(PCF8563_MAJOR, DEVICE_NAME, &pcf8563_fops) < 0) {
+- printk(KERN_INFO "%s: Unable to get major numer %d for RTC device.\n",
+- PCF8563_NAME, PCF8563_MAJOR);
+- return -1;
++ /* Check for low voltage, and warn about it. */
++ if (rtc_read(RTC_SECONDS) & 0x80) {
++ voltage_low = 1;
++ printk(KERN_WARNING "%s: RTC Voltage Low - reliable "
++ "date/time information is no longer guaranteed!\n",
++ PCF8563_NAME);
+ }
+
+- printk(KERN_INFO "%s Real-Time Clock Driver, %s\n", PCF8563_NAME, DRIVER_VERSION);
+-
+- /* Check for low voltage, and warn about it.. */
+- if (rtc_read(RTC_SECONDS) & 0x80)
+- printk(KERN_WARNING "%s: RTC Voltage Low - reliable date/time "
+- "information is no longer guaranteed!\n", PCF8563_NAME);
+-
+- return 0;
++ return res;
+
+ err:
+ printk(KERN_INFO "%s: Error initializing chip.\n", PCF8563_NAME);
+- return -1;
++ res = -1;
++ return res;
+ }
+
+ void __exit
+ pcf8563_exit(void)
+ {
+ if (unregister_chrdev(PCF8563_MAJOR, DEVICE_NAME) < 0) {
+- printk(KERN_INFO "%s: Unable to unregister device.\n", PCF8563_NAME);
++ printk(KERN_INFO "%s: Unable to unregister device.\n",
++ PCF8563_NAME);
+ }
+ }
+
+@@ -203,7 +212,8 @@
+ * POSIX says so!
+ */
+ int
+-pcf8563_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg)
++pcf8563_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
++ unsigned long arg)
+ {
+ /* Some sanity checks. */
+ if (_IOC_TYPE(cmd) != RTC_MAGIC)
+@@ -217,31 +227,35 @@
+ {
+ struct rtc_time tm;
+
+- memset(&tm, 0, sizeof (struct rtc_time));
++ spin_lock(&rtc_lock);
++ memset(&tm, 0, sizeof tm);
+ get_rtc_time(&tm);
+
+- if (copy_to_user((struct rtc_time *) arg, &tm, sizeof tm)) {
++ if (copy_to_user((struct rtc_time *) arg, &tm,
++ sizeof tm)) {
++ spin_unlock(&rtc_lock);
+ return -EFAULT;
+ }
+
++ spin_unlock(&rtc_lock);
++
+ return 0;
+ }
+-
+ case RTC_SET_TIME:
+ {
+-#ifdef CONFIG_ETRAX_RTC_READONLY
+- return -EPERM;
+-#else
+ int leap;
+ int year;
+ int century;
+ struct rtc_time tm;
+
++ memset(&tm, 0, sizeof tm);
+ if (!capable(CAP_SYS_TIME))
+ return -EPERM;
+
+- if (copy_from_user(&tm, (struct rtc_time *) arg, sizeof tm))
++ if (copy_from_user(&tm, (struct rtc_time *) arg,
++ sizeof tm)) {
+ return -EFAULT;
++ }
+
+ /* Convert from struct tm to struct rtc_time. */
+ tm.tm_year += 1900;
+@@ -253,7 +267,8 @@
+ * that years divisible by 400 _are_ leap years.
+ */
+ year = tm.tm_year;
+- leap = (tm.tm_mon == 2) && ((year % 4 == 0 && year % 100 != 0) || year % 400 == 0);
++ leap = (tm.tm_mon == 2) &&
++ ((year % 4 == 0 && year % 100 != 0) || year % 400 == 0);
+
+ /* Perform some sanity checks. */
+ if ((tm.tm_year < 1970) ||
+@@ -263,19 +278,23 @@
+ (tm.tm_wday >= 7) ||
+ (tm.tm_hour >= 24) ||
+ (tm.tm_min >= 60) ||
+- (tm.tm_sec >= 60))
++ (tm.tm_sec >= 60)) {
+ return -EINVAL;
++ }
+
+ century = (tm.tm_year >= 2000) ? 0x80 : 0;
+ tm.tm_year = tm.tm_year % 100;
+
+ BIN_TO_BCD(tm.tm_year);
++ BIN_TO_BCD(tm.tm_mon);
+ BIN_TO_BCD(tm.tm_mday);
+ BIN_TO_BCD(tm.tm_hour);
+ BIN_TO_BCD(tm.tm_min);
+ BIN_TO_BCD(tm.tm_sec);
+ tm.tm_mon |= century;
+
++ spin_lock(&rtc_lock);
++
+ rtc_write(RTC_YEAR, tm.tm_year);
+ rtc_write(RTC_MONTH, tm.tm_mon);
+ rtc_write(RTC_WEEKDAY, tm.tm_wday); /* Not coded in BCD. */
+@@ -284,36 +303,40 @@
+ rtc_write(RTC_MINUTES, tm.tm_min);
+ rtc_write(RTC_SECONDS, tm.tm_sec);
+
++ spin_unlock(&rtc_lock);
++
+ return 0;
+-#endif /* !CONFIG_ETRAX_RTC_READONLY */
+ }
+-
+ case RTC_VLOW_RD:
+- {
+- int vl_bit = 0;
+-
+- if (rtc_read(RTC_SECONDS) & 0x80) {
+- vl_bit = 1;
+- printk(KERN_WARNING "%s: RTC Voltage Low - reliable "
+- "date/time information is no longer guaranteed!\n",
+- PCF8563_NAME);
++ if (voltage_low) {
++ printk(KERN_WARNING "%s: RTC Voltage Low - "
++ "reliable date/time information is no "
++ "longer guaranteed!\n", PCF8563_NAME);
+ }
+- if (copy_to_user((int *) arg, &vl_bit, sizeof(int)))
+- return -EFAULT;
+
++ if (copy_to_user((int *) arg, &voltage_low, sizeof(int))) {
++ return -EFAULT;
++ }
++
+ return 0;
+- }
+
+ case RTC_VLOW_SET:
+ {
+- /* Clear the VL bit in the seconds register */
++ /* Clear the VL bit in the seconds register in case
++ * the time has not been set already (which would
++ * have cleared it). This does not really matter
++ * because of the cached voltage_low value but do it
++ * anyway for consistency. */
++
+ int ret = rtc_read(RTC_SECONDS);
+
+ rtc_write(RTC_SECONDS, (ret & 0x7F));
+
++ /* Clear the cached value. */
++ voltage_low = 0;
++
+ return 0;
+ }
+-
+ default:
+ return -ENOTTY;
+ }
+@@ -321,17 +344,32 @@
+ return 0;
+ }
+
+-int
+-pcf8563_open(struct inode *inode, struct file *filp)
++static int __init
++pcf8563_register(void)
+ {
+- return 0;
+-}
++ if (pcf8563_init() < 0) {
++ printk(KERN_INFO "%s: Unable to initialize Real-Time Clock "
++ "Driver, %s\n", PCF8563_NAME, DRIVER_VERSION);
++ return -1;
++ }
++
++ if (register_chrdev(PCF8563_MAJOR, DEVICE_NAME, &pcf8563_fops) < 0) {
++ printk(KERN_INFO "%s: Unable to get major numer %d for RTC "
++ "device.\n", PCF8563_NAME, PCF8563_MAJOR);
++ return -1;
++ }
++
++ printk(KERN_INFO "%s Real-Time Clock Driver, %s\n", PCF8563_NAME,
++ DRIVER_VERSION);
++
++ /* Check for low voltage, and warn about it. */
++ if (voltage_low) {
++ printk(KERN_WARNING "%s: RTC Voltage Low - reliable date/time "
++ "information is no longer guaranteed!\n", PCF8563_NAME);
++ }
+
+-int
+-pcf8563_release(struct inode *inode, struct file *filp)
+-{
+ return 0;
+ }
+
+-module_init(pcf8563_init);
++module_init(pcf8563_register);
+ module_exit(pcf8563_exit);
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/pci/bios.c linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/pci/bios.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/pci/bios.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/pci/bios.c 2006-10-13 14:43:15.000000000 +0200
+@@ -60,7 +60,7 @@
+ u16 cmd, old_cmd;
+ int idx;
+ struct resource *r;
+-
++
+ pci_read_config_word(dev, PCI_COMMAND, &cmd);
+ old_cmd = cmd;
+ for(idx=0; idx<6; idx++) {
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/pci/dma.c linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/pci/dma.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/pci/dma.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/pci/dma.c 2005-10-31 09:48:04.000000000 +0100
+@@ -62,7 +62,7 @@
+ {
+ struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL;
+ int order = get_order(size);
+-
++
+ if (mem && vaddr >= mem->virt_base && vaddr < (mem->virt_base + (mem->size << PAGE_SHIFT))) {
+ int page = (vaddr - mem->virt_base) >> PAGE_SHIFT;
+
+@@ -120,7 +120,7 @@
+ void dma_release_declared_memory(struct device *dev)
+ {
+ struct dma_coherent_mem *mem = dev->dma_mem;
+-
++
+ if(!mem)
+ return;
+ dev->dma_mem = NULL;
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/drivers/sync_serial.c linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/sync_serial.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/drivers/sync_serial.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/drivers/sync_serial.c 2007-01-09 10:29:20.000000000 +0100
+@@ -50,7 +50,7 @@
+ /* readp writep */
+ /* */
+ /* If the application keeps up the pace readp will be right after writep.*/
+-/* If the application can't keep the pace we have to throw away data. */
++/* If the application can't keep the pace we have to throw away data. */
+ /* The idea is that readp should be ready with the data pointed out by */
+ /* Descr[i] when the DMA has filled in Descr[i+1]. */
+ /* Otherwise we will discard */
+@@ -65,6 +65,7 @@
+ #define IN_DESCR_SIZE 256
+ #define NUM_IN_DESCR (IN_BUFFER_SIZE/IN_DESCR_SIZE)
+ #define OUT_BUFFER_SIZE 4096
++#define NUM_OUT_DESCRS 4
+
+ #define DEFAULT_FRAME_RATE 0
+ #define DEFAULT_WORD_RATE 7
+@@ -112,7 +113,7 @@
+
+ dma_descr_data in_descr[NUM_IN_DESCR] __attribute__ ((__aligned__(16)));
+ dma_descr_context in_context __attribute__ ((__aligned__(32)));
+- dma_descr_data out_descr __attribute__ ((__aligned__(16)));
++ dma_descr_data out_descr[NUM_OUT_DESCRS] __attribute__ ((__aligned__(16)));
+ dma_descr_context out_context __attribute__ ((__aligned__(32)));
+ wait_queue_head_t out_wait_q;
+ wait_queue_head_t in_wait_q;
+@@ -130,9 +131,9 @@
+
+ static int sync_serial_ioctl(struct inode*, struct file*,
+ unsigned int cmd, unsigned long arg);
+-static ssize_t sync_serial_write(struct file * file, const char * buf,
++static ssize_t sync_serial_write(struct file * file, const char * buf,
+ size_t count, loff_t *ppos);
+-static ssize_t sync_serial_read(struct file *file, char *buf,
++static ssize_t sync_serial_read(struct file *file, char *buf,
+ size_t count, loff_t *ppos);
+
+ #if (defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0) && \
+@@ -146,8 +147,8 @@
+ static void start_dma(struct sync_port *port, const char* data, int count);
+ static void start_dma_in(sync_port* port);
+ #ifdef SYNC_SER_DMA
+-static irqreturn_t tr_interrupt(int irq, void *dev_id, struct pt_regs * regs);
+-static irqreturn_t rx_interrupt(int irq, void *dev_id, struct pt_regs * regs);
++static irqreturn_t tr_interrupt(int irq, void *dev_id);
++static irqreturn_t rx_interrupt(int irq, void *dev_id);
+ #endif
+
+ #if (defined(CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0) && \
+@@ -157,7 +158,7 @@
+ #define SYNC_SER_MANUAL
+ #endif
+ #ifdef SYNC_SER_MANUAL
+-static irqreturn_t manual_interrupt(int irq, void *dev_id, struct pt_regs * regs);
++static irqreturn_t manual_interrupt(int irq, void *dev_id);
+ #endif
+
+ /* The ports */
+@@ -201,8 +202,8 @@
+ {
+ ports[0].enabled = 0;
+ ports[1].enabled = 0;
+-
+- if (register_chrdev(SYNC_SERIAL_MAJOR,"sync serial", &sync_serial_fops) <0 )
++
++ if (register_chrdev(SYNC_SERIAL_MAJOR,"sync serial", &sync_serial_fops) <0 )
+ {
+ printk("unable to get major for synchronous serial port\n");
+ return -EBUSY;
+@@ -243,13 +244,13 @@
+
+ DEBUG(printk("Init sync serial port %d\n", portnbr));
+
+- port->port_nbr = portnbr;
++ port->port_nbr = portnbr;
+ port->init_irqs = 1;
+
+ port->outp = port->out_buffer;
+ port->output = 1;
+ port->input = 0;
+-
++
+ port->readp = port->flip;
+ port->writep = port->flip;
+ port->in_buffer_size = IN_BUFFER_SIZE;
+@@ -286,11 +287,16 @@
+ tr_cfg.sample_size = 7;
+ tr_cfg.sh_dir = regk_sser_msbfirst;
+ tr_cfg.use_dma = port->use_dma ? regk_sser_yes : regk_sser_no;
++#if 0
+ tr_cfg.rate_ctrl = regk_sser_bulk;
+ tr_cfg.data_pin_use = regk_sser_dout;
++#else
++ tr_cfg.rate_ctrl = regk_sser_iso;
++ tr_cfg.data_pin_use = regk_sser_dout;
++#endif
+ tr_cfg.bulk_wspace = 1;
+ REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);
+-
++
+ rec_cfg.sample_size = 7;
+ rec_cfg.sh_dir = regk_sser_msbfirst;
+ rec_cfg.use_dma = port->use_dma ? regk_sser_yes : regk_sser_no;
+@@ -303,17 +309,17 @@
+ int avail;
+ unsigned char *start;
+ unsigned char *end;
+-
++
+ start = (unsigned char*)port->readp; /* cast away volatile */
+ end = (unsigned char*)port->writep; /* cast away volatile */
+ /* 0123456789 0123456789
+ * ----- - -----
+ * ^rp ^wp ^wp ^rp
+ */
+-
++
+ if (end >= start)
+ avail = end - start;
+- else
++ else
+ avail = port->in_buffer_size - (start - end);
+ return avail;
+ }
+@@ -323,17 +329,17 @@
+ int avail;
+ unsigned char *start;
+ unsigned char *end;
+-
++
+ start = (unsigned char*)port->readp; /* cast away volatile */
+ end = (unsigned char*)port->writep; /* cast away volatile */
+ /* 0123456789 0123456789
+ * ----- -----
+ * ^rp ^wp ^wp ^rp
+ */
+-
++
+ if (end >= start)
+ avail = end - start;
+- else
++ else
+ avail = port->flip + port->in_buffer_size - start;
+ return avail;
+ }
+@@ -343,10 +349,10 @@
+ int dev = iminor(inode);
+ sync_port* port;
+ reg_dma_rw_cfg cfg = {.en = regk_dma_yes};
+- reg_dma_rw_intr_mask intr_mask = {.data = regk_dma_yes};
+-
+- DEBUG(printk("Open sync serial port %d\n", dev));
++ reg_dma_rw_intr_mask intr_mask = {.data = regk_dma_yes};
+
++ DEBUG(printk("Open sync serial port %d\n", dev));
++
+ if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled)
+ {
+ DEBUG(printk("Invalid minor %d\n", dev));
+@@ -354,7 +360,7 @@
+ }
+ port = &ports[dev];
+ /* Allow open this device twice (assuming one reader and one writer) */
+- if (port->busy == 2)
++ if (port->busy == 2)
+ {
+ DEBUG(printk("Device is busy.. \n"));
+ return -EBUSY;
+@@ -422,8 +428,8 @@
+ DMA_VERBOSE_ON_ERROR,
+ 0,
+ dma_sser1)) {
+- free_irq(21, &ports[1]);
+- free_irq(20, &ports[1]);
++ free_irq(DMA6_INTR_VECT, &ports[1]);
++ free_irq(DMA7_INTR_VECT, &ports[1]);
+ printk(KERN_CRIT "Can't allocate sync serial port 3 TX DMA channel");
+ return -EBUSY;
+ } else if (crisv32_request_dma(SYNC_SER1_RX_DMA_NBR,
+@@ -446,7 +452,7 @@
+ /* Enable DMA IRQs */
+ REG_WR(dma, port->regi_dmain, rw_intr_mask, intr_mask);
+ REG_WR(dma, port->regi_dmaout, rw_intr_mask, intr_mask);
+- /* Set up wordsize = 2 for DMAs. */
++ /* Set up wordsize = 1 for DMAs. */
+ DMA_WR_CMD (port->regi_dmain, regk_dma_set_w_size1);
+ DMA_WR_CMD (port->regi_dmaout, regk_dma_set_w_size1);
+
+@@ -497,7 +503,7 @@
+ port = &ports[dev];
+ if (port->busy)
+ port->busy--;
+- if (!port->busy)
++ if (!port->busy)
+ /* XXX */ ;
+ return 0;
+ }
+@@ -508,17 +514,29 @@
+ unsigned int mask = 0;
+ sync_port* port;
+ DEBUGPOLL( static unsigned int prev_mask = 0; );
+-
++
+ port = &ports[dev];
++
++ if (!port->started)
++ {
++ reg_sser_rw_cfg cfg = REG_RD(sser, port->regi_sser, rw_cfg);
++ reg_sser_rw_rec_cfg rec_cfg = REG_RD(sser, port->regi_sser, rw_rec_cfg);
++ cfg.en = regk_sser_yes;
++ rec_cfg.rec_en = port->input;
++ REG_WR(sser, port->regi_sser, rw_cfg, cfg);
++ REG_WR(sser, port->regi_sser, rw_rec_cfg, rec_cfg);
++ port->started = 1;
++ }
++
+ poll_wait(file, &port->out_wait_q, wait);
+ poll_wait(file, &port->in_wait_q, wait);
+ /* Some room to write */
+- if (port->out_count < OUT_BUFFER_SIZE)
++ if (port->output && port->out_count < OUT_BUFFER_SIZE)
+ mask |= POLLOUT | POLLWRNORM;
+ /* At least an inbufchunk of data */
+- if (sync_data_avail(port) >= port->inbufchunk)
++ if (port->input && sync_data_avail(port) >= port->inbufchunk)
+ mask |= POLLIN | POLLRDNORM;
+-
++
+ DEBUGPOLL(if (mask != prev_mask)
+ printk("sync_serial_poll: mask 0x%08X %s %s\n", mask,
+ mask&POLLOUT?"POLLOUT":"", mask&POLLIN?"POLLIN":"");
+@@ -531,14 +549,15 @@
+ unsigned int cmd, unsigned long arg)
+ {
+ int return_val = 0;
++ int dma_w_size = regk_dma_set_w_size1;
+ int dev = iminor(file->f_dentry->d_inode);
+ sync_port* port;
+ reg_sser_rw_tr_cfg tr_cfg;
+ reg_sser_rw_rec_cfg rec_cfg;
+- reg_sser_rw_frm_cfg frm_cfg;
++ reg_sser_rw_frm_cfg frm_cfg;
+ reg_sser_rw_cfg gen_cfg;
+ reg_sser_rw_intr_mask intr_mask;
+-
++
+ if (dev < 0 || dev >= NUMBER_OF_PORTS || !ports[dev].enabled)
+ {
+ DEBUG(printk("Invalid minor %d\n", dev));
+@@ -558,9 +577,32 @@
+ case SSP_SPEED:
+ if (GET_SPEED(arg) == CODEC)
+ {
++ unsigned int freq;
++
+ gen_cfg.base_freq = regk_sser_f32;
+- /* FREQ = 0 => 4 MHz => clk_div = 7*/
+- gen_cfg.clk_div = 6 + (1 << GET_FREQ(arg));
++
++ /* Clock divider will internally be
++ * gen_cfg.clk_div + 1.
++ */
++
++ freq = GET_FREQ(arg);
++ switch (freq)
++ {
++ case FREQ_32kHz:
++ case FREQ_64kHz:
++ case FREQ_128kHz:
++ case FREQ_256kHz:
++ gen_cfg.clk_div = 125 * (1 << (freq - FREQ_256kHz)) - 1;
++ break;
++ case FREQ_512kHz:
++ gen_cfg.clk_div = 62;
++ break;
++ case FREQ_1MHz:
++ case FREQ_2MHz:
++ case FREQ_4MHz:
++ gen_cfg.clk_div = 8 * (1 << freq) - 1;
++ break;
++ }
+ }
+ else
+ {
+@@ -625,87 +667,118 @@
+ case MASTER_OUTPUT:
+ port->output = 1;
+ port->input = 0;
++ frm_cfg.out_on = regk_sser_tr;
++ frm_cfg.frame_pin_dir = regk_sser_out;
+ gen_cfg.clk_dir = regk_sser_out;
+ break;
+ case SLAVE_OUTPUT:
+ port->output = 1;
+ port->input = 0;
++ frm_cfg.frame_pin_dir = regk_sser_in;
+ gen_cfg.clk_dir = regk_sser_in;
+ break;
+ case MASTER_INPUT:
+ port->output = 0;
+ port->input = 1;
++ frm_cfg.frame_pin_dir = regk_sser_out;
++ frm_cfg.out_on = regk_sser_intern_tb;
+ gen_cfg.clk_dir = regk_sser_out;
+ break;
+ case SLAVE_INPUT:
+ port->output = 0;
+ port->input = 1;
++ frm_cfg.frame_pin_dir = regk_sser_in;
+ gen_cfg.clk_dir = regk_sser_in;
+ break;
+ case MASTER_BIDIR:
+ port->output = 1;
+ port->input = 1;
++ frm_cfg.frame_pin_dir = regk_sser_out;
++ frm_cfg.out_on = regk_sser_intern_tb;
+ gen_cfg.clk_dir = regk_sser_out;
+ break;
+ case SLAVE_BIDIR:
+ port->output = 1;
+ port->input = 1;
++ frm_cfg.frame_pin_dir = regk_sser_in;
+ gen_cfg.clk_dir = regk_sser_in;
+ break;
+ default:
+ spin_unlock_irq(&port->lock);
+ return -EINVAL;
+-
++
+ }
+ if (!port->use_dma || (arg == MASTER_OUTPUT || arg == SLAVE_OUTPUT))
+ intr_mask.rdav = regk_sser_yes;
+ break;
+ case SSP_FRAME_SYNC:
+- if (arg & NORMAL_SYNC)
++ if (arg & NORMAL_SYNC) {
++ frm_cfg.rec_delay = 1;
+ frm_cfg.tr_delay = 1;
++ }
+ else if (arg & EARLY_SYNC)
+- frm_cfg.tr_delay = 0;
++ frm_cfg.rec_delay = frm_cfg.tr_delay = 0;
++ else if (arg & SECOND_WORD_SYNC) {
++ frm_cfg.rec_delay = 17;
++ frm_cfg.tr_delay = 1;
++ }
++
++
+
+ tr_cfg.bulk_wspace = frm_cfg.tr_delay;
+ frm_cfg.early_wend = regk_sser_yes;
+- if (arg & BIT_SYNC)
++ if (arg & BIT_SYNC)
+ frm_cfg.type = regk_sser_edge;
+ else if (arg & WORD_SYNC)
+ frm_cfg.type = regk_sser_level;
+ else if (arg & EXTENDED_SYNC)
+ frm_cfg.early_wend = regk_sser_no;
+-
++
+ if (arg & SYNC_ON)
+ frm_cfg.frame_pin_use = regk_sser_frm;
+ else if (arg & SYNC_OFF)
+ frm_cfg.frame_pin_use = regk_sser_gio0;
+-
+- if (arg & WORD_SIZE_8)
++
++ if (arg & WORD_SIZE_8) {
+ rec_cfg.sample_size = tr_cfg.sample_size = 7;
+- else if (arg & WORD_SIZE_12)
++ dma_w_size = regk_dma_set_w_size1;
++ }
++ else if (arg & WORD_SIZE_12) {
+ rec_cfg.sample_size = tr_cfg.sample_size = 11;
+- else if (arg & WORD_SIZE_16)
++ dma_w_size = regk_dma_set_w_size2;
++ }
++ else if (arg & WORD_SIZE_16) {
+ rec_cfg.sample_size = tr_cfg.sample_size = 15;
+- else if (arg & WORD_SIZE_24)
++ dma_w_size = regk_dma_set_w_size2;
++ }
++ else if (arg & WORD_SIZE_24) {
+ rec_cfg.sample_size = tr_cfg.sample_size = 23;
+- else if (arg & WORD_SIZE_32)
++ dma_w_size = regk_dma_set_w_size2;
++ }
++ else if (arg & WORD_SIZE_32) {
+ rec_cfg.sample_size = tr_cfg.sample_size = 31;
++ dma_w_size = regk_dma_set_w_size2;
++ }
+
+ if (arg & BIT_ORDER_MSB)
+ rec_cfg.sh_dir = tr_cfg.sh_dir = regk_sser_msbfirst;
+ else if (arg & BIT_ORDER_LSB)
+ rec_cfg.sh_dir = tr_cfg.sh_dir = regk_sser_lsbfirst;
+-
+- if (arg & FLOW_CONTROL_ENABLE)
++
++ if (arg & FLOW_CONTROL_ENABLE) {
++ frm_cfg.status_pin_use = regk_sser_frm;
+ rec_cfg.fifo_thr = regk_sser_thr16;
+- else if (arg & FLOW_CONTROL_DISABLE)
++ }
++ else if (arg & FLOW_CONTROL_DISABLE) {
++ frm_cfg.status_pin_use = regk_sser_gio0;
+ rec_cfg.fifo_thr = regk_sser_inf;
++ }
+
+ if (arg & CLOCK_NOT_GATED)
+ gen_cfg.gate_clk = regk_sser_no;
+ else if (arg & CLOCK_GATED)
+ gen_cfg.gate_clk = regk_sser_yes;
+-
++
+ break;
+ case SSP_IPOLARITY:
+ /* NOTE!! negedge is considered NORMAL */
+@@ -713,12 +786,12 @@
+ rec_cfg.clk_pol = regk_sser_neg;
+ else if (arg & CLOCK_INVERT)
+ rec_cfg.clk_pol = regk_sser_pos;
+-
++
+ if (arg & FRAME_NORMAL)
+ frm_cfg.level = regk_sser_pos_hi;
+ else if (arg & FRAME_INVERT)
+ frm_cfg.level = regk_sser_neg_lo;
+-
++
+ if (arg & STATUS_NORMAL)
+ gen_cfg.hold_pol = regk_sser_pos;
+ else if (arg & STATUS_INVERT)
+@@ -726,15 +799,15 @@
+ break;
+ case SSP_OPOLARITY:
+ if (arg & CLOCK_NORMAL)
+- gen_cfg.out_clk_pol = regk_sser_neg;
+- else if (arg & CLOCK_INVERT)
+ gen_cfg.out_clk_pol = regk_sser_pos;
+-
++ else if (arg & CLOCK_INVERT)
++ gen_cfg.out_clk_pol = regk_sser_neg;
++
+ if (arg & FRAME_NORMAL)
+ frm_cfg.level = regk_sser_pos_hi;
+ else if (arg & FRAME_INVERT)
+ frm_cfg.level = regk_sser_neg_lo;
+-
++
+ if (arg & STATUS_NORMAL)
+ gen_cfg.hold_pol = regk_sser_pos;
+ else if (arg & STATUS_INVERT)
+@@ -772,9 +845,10 @@
+
+ if (port->started)
+ {
+- tr_cfg.tr_en = port->output;
+ rec_cfg.rec_en = port->input;
++ gen_cfg.en = (port->output | port->input);
+ }
++
+
+ REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);
+ REG_WR(sser, port->regi_sser, rw_rec_cfg, rec_cfg);
+@@ -782,11 +856,24 @@
+ REG_WR(sser, port->regi_sser, rw_intr_mask, intr_mask);
+ REG_WR(sser, port->regi_sser, rw_cfg, gen_cfg);
+
++
++ if (cmd == SSP_FRAME_SYNC &&
++ (arg & (WORD_SIZE_8 | WORD_SIZE_12 | WORD_SIZE_16 | WORD_SIZE_24 | WORD_SIZE_32))) {
++ int en = gen_cfg.en;
++ gen_cfg.en = 0;
++ REG_WR(sser, port->regi_sser, rw_cfg, gen_cfg);
++ /* ##### Should DMA be stoped before we change dma size? */
++ DMA_WR_CMD (port->regi_dmain, dma_w_size);
++ DMA_WR_CMD (port->regi_dmaout, dma_w_size);
++ gen_cfg.en = en;
++ REG_WR(sser, port->regi_sser, rw_cfg, gen_cfg);
++ }
++
+ spin_unlock_irq(&port->lock);
+ return return_val;
+ }
+
+-static ssize_t sync_serial_write(struct file * file, const char * buf,
++static ssize_t sync_serial_write(struct file * file, const char * buf,
+ size_t count, loff_t *ppos)
+ {
+ int dev = iminor(file->f_dentry->d_inode);
+@@ -807,7 +894,7 @@
+
+ DEBUGWRITE(printk("W d%d c %lu (%d/%d)\n", port->port_nbr, count, port->out_count, OUT_BUFFER_SIZE));
+ /* Space to end of buffer */
+- /*
++ /*
+ * out_buffer <c1>012345<- c ->OUT_BUFFER_SIZE
+ * outp^ +out_count
+ ^free_outp
+@@ -824,7 +911,7 @@
+ free_outp = outp + port->out_count;
+ spin_unlock_irqrestore(&port->lock, flags);
+ out_buffer = (unsigned long)port->out_buffer;
+-
++
+ /* Find out where and how much to write */
+ if (free_outp >= out_buffer + OUT_BUFFER_SIZE)
+ free_outp -= OUT_BUFFER_SIZE;
+@@ -834,7 +921,7 @@
+ c = outp - free_outp;
+ if (c > count)
+ c = count;
+-
++
+ // DEBUGWRITE(printk("w op %08lX fop %08lX c %lu\n", outp, free_outp, c));
+ if (copy_from_user((void*)free_outp, buf, c))
+ return -EFAULT;
+@@ -854,13 +941,10 @@
+ if (!port->started)
+ {
+ reg_sser_rw_cfg cfg = REG_RD(sser, port->regi_sser, rw_cfg);
+- reg_sser_rw_tr_cfg tr_cfg = REG_RD(sser, port->regi_sser, rw_tr_cfg);
+ reg_sser_rw_rec_cfg rec_cfg = REG_RD(sser, port->regi_sser, rw_rec_cfg);
+ cfg.en = regk_sser_yes;
+- tr_cfg.tr_en = port->output;
+ rec_cfg.rec_en = port->input;
+ REG_WR(sser, port->regi_sser, rw_cfg, cfg);
+- REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);
+ REG_WR(sser, port->regi_sser, rw_rec_cfg, rec_cfg);
+ port->started = 1;
+ }
+@@ -887,7 +971,7 @@
+ }
+
+ /* Sleep until all sent */
+-
++
+ add_wait_queue(&port->out_wait_q, &wait);
+ set_current_state(TASK_INTERRUPTIBLE);
+ spin_lock_irqsave(&port->lock, flags);
+@@ -916,13 +1000,13 @@
+ return count;
+ }
+
+-static ssize_t sync_serial_read(struct file * file, char * buf,
++static ssize_t sync_serial_read(struct file * file, char * buf,
+ size_t count, loff_t *ppos)
+ {
+ int dev = iminor(file->f_dentry->d_inode);
+ int avail;
+ sync_port *port;
+- unsigned char* start;
++ unsigned char* start;
+ unsigned char* end;
+ unsigned long flags;
+
+@@ -949,7 +1033,7 @@
+ port->started = 1;
+ }
+
+-
++
+ /* Calculate number of available bytes */
+ /* Save pointers to avoid that they are modified by interrupt */
+ spin_lock_irqsave(&port->lock, flags);
+@@ -958,11 +1042,12 @@
+ spin_unlock_irqrestore(&port->lock, flags);
+ while ((start == end) && !port->full) /* No data */
+ {
++ DEBUGREAD(printk("&"));
+ if (file->f_flags & O_NONBLOCK)
+- {
++ {
+ return -EAGAIN;
+ }
+-
++
+ interruptible_sleep_on(&port->in_wait_q);
+ if (signal_pending(current))
+ {
+@@ -979,9 +1064,9 @@
+ avail = port->in_buffer_size;
+ else if (end > start)
+ avail = end - start;
+- else
++ else
+ avail = port->flip + port->in_buffer_size - start;
+-
++
+ count = count > avail ? avail : count;
+ if (copy_to_user(buf, start, count))
+ return -EFAULT;
+@@ -1016,7 +1101,7 @@
+ data |= *port->outp++;
+ port->out_count-=2;
+ tr_data.data = data;
+- REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
++ REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
+ if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE)
+ port->outp = port->out_buffer;
+ }
+@@ -1032,7 +1117,7 @@
+ case 24:
+ port->out_count-=3;
+ tr_data.data = *(unsigned short *)port->outp;
+- REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
++ REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
+ port->outp+=2;
+ tr_data.data = *port->outp++;
+ REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
+@@ -1042,10 +1127,10 @@
+ case 32:
+ port->out_count-=4;
+ tr_data.data = *(unsigned short *)port->outp;
+- REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
++ REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
+ port->outp+=2;
+ tr_data.data = *(unsigned short *)port->outp;
+- REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
++ REG_WR(sser, port->regi_sser, rw_tr_data, tr_data);
+ port->outp+=2;
+ if (port->outp >= port->out_buffer + OUT_BUFFER_SIZE)
+ port->outp = port->out_buffer;
+@@ -1056,15 +1141,27 @@
+
+ static void start_dma(struct sync_port* port, const char* data, int count)
+ {
++ int i;
++ reg_sser_rw_tr_cfg tr_cfg = REG_RD(sser, port->regi_sser, rw_tr_cfg);
+ port->tr_running = 1;
+- port->out_descr.buf = (char*)virt_to_phys((char*)data);
+- port->out_descr.after = port->out_descr.buf + count;
+- port->out_descr.eol = port->out_descr.intr = 1;
++ for (i = 0; i < NUM_OUT_DESCRS; i++)
++ {
++ port->out_descr[i].buf = (char*)virt_to_phys(port->out_buffer + 1024*i);
++ port->out_descr[i].after = port->out_descr[i].buf + 1024;
++ port->out_descr[i].eol = 0;
++ port->out_descr[i].intr = 1;
++ port->out_descr[i].next = virt_to_phys(&port->out_descr[i+1]);
++ }
++ port->out_descr[i-1].next = virt_to_phys(&port->out_descr[0]);
+
+- port->out_context.saved_data = (dma_descr_data*)virt_to_phys(&port->out_descr);
+- port->out_context.saved_data_buf = port->out_descr.buf;
++ port->out_context.saved_data = (dma_descr_data*)virt_to_phys(&port->out_descr[0]);
++ port->out_context.saved_data_buf = port->out_descr[0].buf;
+
+ DMA_START_CONTEXT(port->regi_dmaout, virt_to_phys((char*)&port->out_context));
++
++ tr_cfg.tr_en = regk_sser_yes;
++ REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);
++
+ DEBUGTXINT(printk("dma %08lX c %d\n", (unsigned long)data, count));
+ }
+
+@@ -1073,7 +1170,7 @@
+ int i;
+ char* buf;
+ port->writep = port->flip;
+-
++
+ if (port->writep > port->flip + port->in_buffer_size)
+ {
+ panic("Offset too large in sync serial driver\n");
+@@ -1099,7 +1196,7 @@
+ }
+
+ #ifdef SYNC_SER_DMA
+-static irqreturn_t tr_interrupt(int irq, void *dev_id, struct pt_regs * regs)
++static irqreturn_t tr_interrupt(int irq, void *dev_id)
+ {
+ reg_dma_r_masked_intr masked;
+ reg_dma_rw_ack_intr ack_intr = {.data = regk_dma_yes};
+@@ -1108,7 +1205,7 @@
+ unsigned int sentl;
+ int found = 0;
+
+- for (i = 0; i < NUMBER_OF_PORTS; i++)
++ for (i = 0; i < NUMBER_OF_PORTS; i++)
+ {
+ sync_port *port = &ports[i];
+ if (!port->enabled || !port->use_dma )
+@@ -1133,18 +1230,21 @@
+ if (c > port->out_count)
+ c = port->out_count;
+ DEBUGTXINT(printk("tx_int DMAWRITE %i %i\n", sentl, c));
+- start_dma(port, port->outp, c);
++ //start_dma(port, port->outp, c);
+ } else {
+- DEBUGTXINT(printk("tx_int DMA stop %i\n", sentl));
++ reg_sser_rw_tr_cfg tr_cfg = REG_RD(sser, port->regi_sser, rw_tr_cfg);
++ DEBUGTXINT(printk("tx_int DMA stop %i\n", sentl));
+ port->tr_running = 0;
++ tr_cfg.tr_en = regk_sser_no;
++ REG_WR(sser, port->regi_sser, rw_tr_cfg, tr_cfg);
+ }
+ wake_up_interruptible(&port->out_wait_q); /* wake up the waiting process */
+- }
++ }
+ }
+ return IRQ_RETVAL(found);
+ } /* tr_interrupt */
+
+-static irqreturn_t rx_interrupt(int irq, void *dev_id, struct pt_regs * regs)
++static irqreturn_t rx_interrupt(int irq, void *dev_id)
+ {
+ reg_dma_r_masked_intr masked;
+ reg_dma_rw_ack_intr ack_intr = {.data = regk_dma_yes};
+@@ -1152,7 +1252,7 @@
+ int i;
+ int found = 0;
+
+- for (i = 0; i < NUMBER_OF_PORTS; i++)
++ for (i = 0; i < NUMBER_OF_PORTS; i++)
+ {
+ sync_port *port = &ports[i];
+
+@@ -1164,17 +1264,17 @@
+ if (masked.data) /* Descriptor interrupt */
+ {
+ found = 1;
+- while (REG_RD(dma, port->regi_dmain, rw_data) !=
++ while (REG_RD(dma, port->regi_dmain, rw_data) !=
+ virt_to_phys(port->next_rx_desc)) {
+-
++ DEBUGRXINT(printk("!"));
+ if (port->writep + port->inbufchunk > port->flip + port->in_buffer_size) {
+ int first_size = port->flip + port->in_buffer_size - port->writep;
+ memcpy((char*)port->writep, phys_to_virt((unsigned)port->next_rx_desc->buf), first_size);
+ memcpy(port->flip, phys_to_virt((unsigned)port->next_rx_desc->buf+first_size), port->inbufchunk - first_size);
+ port->writep = port->flip + port->inbufchunk - first_size;
+ } else {
+- memcpy((char*)port->writep,
+- phys_to_virt((unsigned)port->next_rx_desc->buf),
++ memcpy((char*)port->writep,
++ phys_to_virt((unsigned)port->next_rx_desc->buf),
+ port->inbufchunk);
+ port->writep += port->inbufchunk;
+ if (port->writep >= port->flip + port->in_buffer_size)
+@@ -1184,11 +1284,13 @@
+ {
+ port->full = 1;
+ }
+-
+- port->next_rx_desc->eol = 0;
+- port->prev_rx_desc->eol = 1;
+- port->prev_rx_desc = phys_to_virt((unsigned)port->next_rx_desc);
++
++ port->next_rx_desc->eol = 1;
++ port->prev_rx_desc->eol = 0;
++ flush_dma_descr(port->prev_rx_desc,0); // Cache bug workaround
++ port->prev_rx_desc = port->next_rx_desc;
+ port->next_rx_desc = phys_to_virt((unsigned)port->next_rx_desc->next);
++ flush_dma_descr(port->prev_rx_desc,1); // Cache bug workaround
+ wake_up_interruptible(&port->in_wait_q); /* wake up the waiting process */
+ DMA_CONTINUE(port->regi_dmain);
+ REG_WR(dma, port->regi_dmain, rw_ack_intr, ack_intr);
+@@ -1201,7 +1303,7 @@
+ #endif /* SYNC_SER_DMA */
+
+ #ifdef SYNC_SER_MANUAL
+-static irqreturn_t manual_interrupt(int irq, void *dev_id, struct pt_regs * regs)
++static irqreturn_t manual_interrupt(int irq, void *dev_id)
+ {
+ int i;
+ int found = 0;
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/Makefile linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/Makefile
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/Makefile 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/Makefile 2006-12-06 14:17:02.000000000 +0100
+@@ -1,4 +1,4 @@
+-# $Id: Makefile,v 1.11 2004/12/17 10:16:13 starvik Exp $
++# $Id: Makefile,v 1.13 2006/12/06 13:17:02 starvik Exp $
+ #
+ # Makefile for the linux kernel.
+ #
+@@ -8,7 +8,7 @@
+
+ obj-y := entry.o traps.o irq.o debugport.o dma.o pinmux.o \
+ process.o ptrace.o setup.o signal.o traps.o time.o \
+- arbiter.o io.o
++ arbiter.o io.o cache.o cacheflush.o
+
+ obj-$(CONFIG_ETRAXFS_SIM) += vcs_hook.o
+
+@@ -16,6 +16,7 @@
+ obj-$(CONFIG_ETRAX_KGDB) += kgdb.o kgdb_asm.o
+ obj-$(CONFIG_ETRAX_FAST_TIMER) += fasttimer.o
+ obj-$(CONFIG_MODULES) += crisksyms.o
++obj-$(CONFIG_CPU_FREQ) += cpufreq.o
+
+ clean:
+
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/arbiter.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/arbiter.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/arbiter.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/arbiter.c 2006-10-13 14:43:13.000000000 +0200
+@@ -6,7 +6,7 @@
+ * bandwidth (e.g. ethernet) and then the remaining slots are divided
+ * on all the active clients.
+ *
+- * Copyright (c) 2004, 2005 Axis Communications AB.
++ * Copyright (c) 2004, 2005, 2006 Axis Communications AB.
+ */
+
+ #include <asm/arch/hwregs/reg_map.h>
+@@ -44,35 +44,88 @@
+ {regi_marb_bp3}
+ };
+
+-static int requested_slots[NBR_OF_REGIONS][NBR_OF_CLIENTS];
+-static int active_clients[NBR_OF_REGIONS][NBR_OF_CLIENTS];
++static u8 requested_slots[NBR_OF_REGIONS][NBR_OF_CLIENTS];
++static u8 active_clients[NBR_OF_REGIONS][NBR_OF_CLIENTS];
+ static int max_bandwidth[NBR_OF_REGIONS] = {SDRAM_BANDWIDTH, INTMEM_BANDWIDTH};
+
+ DEFINE_SPINLOCK(arbiter_lock);
+
+-static irqreturn_t
++static irqreturn_t
+ crisv32_arbiter_irq(int irq, void* dev_id, struct pt_regs* regs);
+
+-static void crisv32_arbiter_config(int region)
++/*
++ * "I'm the arbiter, I know the score.
++ * From square one I'll be watching all 64."
++ * (memory arbiter slots, that is)
++ *
++ * Or in other words:
++ * Program the memory arbiter slots for "region" according to what's
++ * in requested_slots[] and active_clients[], while minimizing
++ * latency. A caller may pass a non-zero positive amount for
++ * "unused_slots", which must then be the unallocated, remaining
++ * number of slots, free to hand out to any client.
++ */
++
++static void crisv32_arbiter_config(int region, int unused_slots)
+ {
+ int slot;
+ int client;
+ int interval = 0;
+- int val[NBR_OF_SLOTS];
++
++ /*
++ * This vector corresponds to the hardware arbiter slots (see
++ * the hardware documentation for semantics). We initialize
++ * each slot with a suitable sentinel value outside the valid
++ * range {0 .. NBR_OF_CLIENTS - 1} and replace them with
++ * client indexes. Then it's fed to the hardware.
++ */
++ s8 val[NBR_OF_SLOTS];
+
+ for (slot = 0; slot < NBR_OF_SLOTS; slot++)
+- val[slot] = NBR_OF_CLIENTS + 1;
++ val[slot] = -1;
+
+ for (client = 0; client < NBR_OF_CLIENTS; client++)
+ {
+ int pos;
++ /* Allocate the requested non-zero number of slots, but
++ * also give clients with zero-requests one slot each
++ * while stocks last. We do the latter here, in client
++ * order. This makes sure zero-request clients are the
++ * first to get to any spare slots, else those slots
++ * could, when bandwidth is allocated close to the limit,
++ * all be allocated to low-index non-zero-request clients
++ * in the default-fill loop below. Another positive but
++ * secondary effect is a somewhat better spread of the
++ * zero-bandwidth clients in the vector, avoiding some of
++ * the latency that could otherwise be caused by the
++ * partitioning of non-zero-bandwidth clients at low
++ * indexes and zero-bandwidth clients at high
++ * indexes. (Note that this spreading can only affect the
++ * unallocated bandwidth.) All the above only matters for
++ * memory-intensive situations, of course.
++ */
+ if (!requested_slots[region][client])
+- continue;
+- interval = NBR_OF_SLOTS / requested_slots[region][client];
++ {
++ /*
++ * Skip inactive clients. Also skip zero-slot
++ * allocations in this pass when there are no known
++ * free slots.
++ */
++ if (!active_clients[region][client] || unused_slots <= 0)
++ continue;
++
++ unused_slots--;
++
++ /* Only allocate one slot for this client. */
++ interval = NBR_OF_SLOTS;
++ }
++ else
++ interval = NBR_OF_SLOTS / requested_slots[region][client];
++
+ pos = 0;
+ while (pos < NBR_OF_SLOTS)
+ {
+- if (val[pos] != NBR_OF_CLIENTS + 1)
++ if (val[pos] >= 0)
+ pos++;
+ else
+ {
+@@ -85,7 +138,13 @@
+ client = 0;
+ for (slot = 0; slot < NBR_OF_SLOTS; slot++)
+ {
+- if (val[slot] == NBR_OF_CLIENTS + 1)
++ /*
++ * Allocate remaining slots in round-robin
++ * client-number order for active clients. For this
++ * pass, we ignore requested bandwidth and previous
++ * allocations.
++ */
++ if (val[slot] < 0)
+ {
+ int first = client;
+ while(!active_clients[region][client]) {
+@@ -100,7 +159,7 @@
+ REG_WR_INT_VECT(marb, regi_marb, rw_ext_slots, slot, val[slot]);
+ else if (region == INT_REGION)
+ REG_WR_INT_VECT(marb, regi_marb, rw_int_slots, slot, val[slot]);
+- }
++ }
+ }
+
+ extern char _stext, _etext;
+@@ -111,18 +170,28 @@
+
+ if (initialized)
+ return;
+-
++
+ initialized = 1;
+
+- /* CPU caches are active. */
+- active_clients[EXT_REGION][10] = active_clients[EXT_REGION][11] = 1;
+- crisv32_arbiter_config(EXT_REGION);
+- crisv32_arbiter_config(INT_REGION);
++ /*
++ * CPU caches are always set to active, but with zero
++ * bandwidth allocated. It should be ok to allocate zero
++ * bandwidth for the caches, because DMA for other channels
++ * will supposedly finish, once their programmed amount is
++ * done, and then the caches will get access according to the
++ * "fixed scheme" for unclaimed slots. Though, if for some
++ * use-case somewhere, there's a maximum CPU latency for
++ * e.g. some interrupt, we have to start allocating specific
++ * bandwidth for the CPU caches too.
++ */
++ active_clients[EXT_REGION][10] = active_clients[EXT_REGION][11] = 1;
++ crisv32_arbiter_config(EXT_REGION, 0);
++ crisv32_arbiter_config(INT_REGION, 0);
+
+ if (request_irq(MEMARB_INTR_VECT, crisv32_arbiter_irq, IRQF_DISABLED,
+ "arbiter", NULL))
+ printk(KERN_ERR "Couldn't allocate arbiter IRQ\n");
+-
++
+ #ifndef CONFIG_ETRAX_KGDB
+ /* Global watch for writes to kernel text segment. */
+ crisv32_arbiter_watch(virt_to_phys(&_stext), &_etext - &_stext,
+@@ -130,6 +199,7 @@
+ #endif
+ }
+
++/* Main entry for bandwidth allocation. */
+
+
+ int crisv32_arbiter_allocate_bandwidth(int client, int region,
+@@ -141,39 +211,76 @@
+ int req;
+
+ crisv32_arbiter_init();
+-
++
+ for (i = 0; i < NBR_OF_CLIENTS; i++)
+ {
+ total_assigned += requested_slots[region][i];
+ total_clients += active_clients[region][i];
+ }
+- req = NBR_OF_SLOTS / (max_bandwidth[region] / bandwidth);
+
+- if (total_assigned + total_clients + req + 1 > NBR_OF_SLOTS)
++ /* Avoid division by 0 for 0-bandwidth requests. */
++ req = bandwidth == 0
++ ? 0 : NBR_OF_SLOTS / (max_bandwidth[region] / bandwidth);
++
++ /*
++ * We make sure that there are enough slots only for non-zero
++ * requests. Requesting 0 bandwidth *may* allocate slots,
++ * though if all bandwidth is allocated, such a client won't
++ * get any and will have to rely on getting memory access
++ * according to the fixed scheme that's the default when one
++ * of the slot-allocated clients doesn't claim their slot.
++ */
++ if (total_assigned + req > NBR_OF_SLOTS)
+ return -ENOMEM;
+
+ active_clients[region][client] = 1;
+ requested_slots[region][client] = req;
+- crisv32_arbiter_config(region);
++ crisv32_arbiter_config(region, NBR_OF_SLOTS - total_assigned);
+
+ return 0;
+ }
+
++/*
++ * Main entry for bandwidth deallocation.
++ *
++ * Strictly speaking, for a somewhat constant set of clients where
++ * each client gets a constant bandwidth and is just enabled or
++ * disabled (somewhat dynamically), no action is necessary here to
++ * avoid starvation for non-zero-allocation clients, as the allocated
++ * slots will just be unused. However, handing out those unused slots
++ * to active clients avoids needless latency if the "fixed scheme"
++ * would give unclaimed slots to an eager low-index client.
++ */
++
++void crisv32_arbiter_deallocate_bandwidth(int client, int region)
++{
++ int i;
++ int total_assigned = 0;
++
++ requested_slots[region][client] = 0;
++ active_clients[region][client] = 0;
++
++ for (i = 0; i < NBR_OF_CLIENTS; i++)
++ total_assigned += requested_slots[region][i];
++
++ crisv32_arbiter_config(region, NBR_OF_SLOTS - total_assigned);
++}
++
+ int crisv32_arbiter_watch(unsigned long start, unsigned long size,
+ unsigned long clients, unsigned long accesses,
+ watch_callback* cb)
+ {
+ int i;
+-
++
+ crisv32_arbiter_init();
+-
++
+ if (start > 0x80000000) {
+ printk("Arbiter: %lX doesn't look like a physical address", start);
+ return -EFAULT;
+ }
+
+ spin_lock(&arbiter_lock);
+-
++
+ for (i = 0; i < NUMBER_OF_BP; i++) {
+ if (!watches[i].used) {
+ reg_marb_rw_intr_mask intr_mask = REG_RD(marb, regi_marb, rw_intr_mask);
+@@ -214,7 +321,7 @@
+ crisv32_arbiter_init();
+
+ spin_lock(&arbiter_lock);
+-
++
+ if ((id < 0) || (id >= NUMBER_OF_BP) || (!watches[id].used)) {
+ spin_unlock(&arbiter_lock);
+ return -EINVAL;
+@@ -239,7 +346,7 @@
+
+ extern void show_registers(struct pt_regs *regs);
+
+-static irqreturn_t
++static irqreturn_t
+ crisv32_arbiter_irq(int irq, void* dev_id, struct pt_regs* regs)
+ {
+ reg_marb_r_masked_intr masked_intr = REG_RD(marb, regi_marb, r_masked_intr);
+@@ -248,10 +355,10 @@
+ reg_marb_bp_r_brk_op r_op;
+ reg_marb_bp_r_brk_first_client r_first;
+ reg_marb_bp_r_brk_size r_size;
+- reg_marb_bp_rw_ack ack = {0};
++ reg_marb_bp_rw_ack ack = {0};
+ reg_marb_rw_ack_intr ack_intr = {.bp0=1,.bp1=1,.bp2=1,.bp3=1};
+ struct crisv32_watch_entry* watch;
+-
++
+ if (masked_intr.bp0) {
+ watch = &watches[0];
+ ack_intr.bp0 = regk_marb_yes;
+@@ -291,6 +398,6 @@
+ if (watch->cb)
+ watch->cb();
+
+-
++
+ return IRQ_HANDLED;
+ }
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/asm-offsets.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/asm-offsets.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/asm-offsets.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/asm-offsets.c 2003-06-02 10:39:38.000000000 +0200
+@@ -16,8 +16,8 @@
+ {
+ #define ENTRY(entry) DEFINE(PT_ ## entry, offsetof(struct pt_regs, entry))
+ ENTRY(orig_r10);
+- ENTRY(r13);
+- ENTRY(r12);
++ ENTRY(r13);
++ ENTRY(r12);
+ ENTRY(r11);
+ ENTRY(r10);
+ ENTRY(r9);
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/cache.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/cache.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/cache.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/cache.c 2007-01-23 13:09:57.000000000 +0100
+@@ -0,0 +1,31 @@
++#include <linux/module.h>
++#include <asm/io.h>
++#include <asm/arch/cache.h>
++#include <asm/arch/hwregs/dma.h>
++
++// This file is used to workaround a cache bug, Guinness TR 106
++
++inline void flush_dma_descr(dma_descr_data* descr, int flush_buf)
++{
++ // Flush descriptor to make sure we get correct in_eop and after
++ asm volatile ("ftagd [%0]" :: "r" (descr));
++ // Flush buffer pointed out by descriptor
++ if (flush_buf)
++ cris_flush_cache_range(phys_to_virt((unsigned)descr->buf), (unsigned)(descr->after - descr->buf));
++}
++
++void flush_dma_list(dma_descr_data* descr)
++{
++ while(1)
++ {
++ flush_dma_descr(descr, 1);
++ if (descr->eol)
++ break;
++ descr = phys_to_virt((unsigned)descr->next);
++ }
++}
++
++EXPORT_SYMBOL(flush_dma_list);
++EXPORT_SYMBOL(flush_dma_descr);
++EXPORT_SYMBOL(cris_flush_cache);
++EXPORT_SYMBOL(cris_flush_cache_range);
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/cacheflush.S linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/cacheflush.S
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/cacheflush.S 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/cacheflush.S 2006-12-06 14:17:02.000000000 +0100
+@@ -0,0 +1,93 @@
++ .global cris_flush_cache_range
++cris_flush_cache_range:
++ move.d 1024, $r12
++ cmp.d $r11, $r12
++ bhi cris_flush_1KB
++ nop
++ add.d $r10, $r11
++cris_flush_last:
++ addq 32, $r10
++ cmp.d $r11, $r10
++ blt cris_flush_last
++ ftagd [$r10]
++ ret
++ nop
++cris_flush_1KB:
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ftagd [$r10]
++ addq 32, $r10
++ ba cris_flush_cache_range
++ sub.d $r12, $r11
++
++ .global cris_flush_cache
++cris_flush_cache:
++ moveq 0, $r10
++cris_flush_line:
++ move.d 16*1024, $r11
++ addq 16, $r10
++ cmp.d $r10, $r11
++ blt cris_flush_line
++ fidxd [$r10]
++ ret
++ nop
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/cpufreq.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/cpufreq.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/cpufreq.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/cpufreq.c 2006-11-03 11:35:52.000000000 +0100
+@@ -0,0 +1,147 @@
++#include <linux/init.h>
++#include <linux/module.h>
++#include <linux/cpufreq.h>
++#include <asm/arch/hwregs/reg_map.h>
++#include <asm/arch/hwregs/reg_rdwr.h>
++#include <asm/arch/hwregs/config_defs.h>
++#include <asm/arch/hwregs/bif_core_defs.h>
++
++static int
++cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val, void *data);
++
++static struct notifier_block cris_sdram_freq_notifier_block = {
++ .notifier_call = cris_sdram_freq_notifier
++};
++
++static struct cpufreq_frequency_table cris_freq_table[] = {
++ {0x01, 6000},
++ {0x02, 200000},
++ {0, CPUFREQ_TABLE_END},
++};
++
++static unsigned int cris_freq_get_cpu_frequency(unsigned int cpu)
++{
++ reg_config_rw_clk_ctrl clk_ctrl;
++ clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl);
++ return clk_ctrl.pll ? 200000 : 6000;
++}
++
++static void cris_freq_set_cpu_state (unsigned int state)
++{
++ int i;
++ struct cpufreq_freqs freqs;
++ reg_config_rw_clk_ctrl clk_ctrl;
++ clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl);
++
++ for_each_cpu(i) {
++ freqs.old = cris_freq_get_cpu_frequency(i);
++ freqs.new = cris_freq_table[state].frequency;
++ freqs.cpu = i;
++ }
++
++ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
++
++ local_irq_disable();
++
++ // Even though we may be SMP they will share the same clock
++ // so all settings are made on CPU0.
++ if (cris_freq_table[state].frequency == 200000)
++ clk_ctrl.pll = 1;
++ else
++ clk_ctrl.pll = 0;
++ REG_WR(config, regi_config, rw_clk_ctrl, clk_ctrl);
++
++ local_irq_enable();
++
++ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
++};
++
++static int cris_freq_verify (struct cpufreq_policy *policy)
++{
++ return cpufreq_frequency_table_verify(policy, &cris_freq_table[0]);
++}
++
++static int cris_freq_target (struct cpufreq_policy *policy,
++ unsigned int target_freq,
++ unsigned int relation)
++{
++ unsigned int newstate = 0;
++
++ if (cpufreq_frequency_table_target(policy, cris_freq_table, target_freq, relation, &newstate))
++ return -EINVAL;
++
++ cris_freq_set_cpu_state(newstate);
++
++ return 0;
++}
++
++static int cris_freq_cpu_init(struct cpufreq_policy *policy)
++{
++ int result;
++
++ /* cpuinfo and default policy values */
++ policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
++ policy->cpuinfo.transition_latency = 1000000; /* 1ms */
++ policy->cur = cris_freq_get_cpu_frequency(0);
++
++ result = cpufreq_frequency_table_cpuinfo(policy, cris_freq_table);
++ if (result)
++ return (result);
++
++ cpufreq_frequency_table_get_attr(cris_freq_table, policy->cpu);
++
++ return 0;
++}
++
++
++static int cris_freq_cpu_exit(struct cpufreq_policy *policy)
++{
++ cpufreq_frequency_table_put_attr(policy->cpu);
++ return 0;
++}
++
++
++static struct freq_attr* cris_freq_attr[] = {
++ &cpufreq_freq_attr_scaling_available_freqs,
++ NULL,
++};
++
++static struct cpufreq_driver cris_freq_driver = {
++ .get = cris_freq_get_cpu_frequency,
++ .verify = cris_freq_verify,
++ .target = cris_freq_target,
++ .init = cris_freq_cpu_init,
++ .exit = cris_freq_cpu_exit,
++ .name = "cris_freq",
++ .owner = THIS_MODULE,
++ .attr = cris_freq_attr,
++};
++
++static int __init cris_freq_init(void)
++{
++ int ret;
++ ret = cpufreq_register_driver(&cris_freq_driver);
++ cpufreq_register_notifier(&cris_sdram_freq_notifier_block,
++ CPUFREQ_TRANSITION_NOTIFIER);
++ return ret;
++}
++
++static int
++cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val, void *data)
++{
++ int i;
++ struct cpufreq_freqs *freqs = data;
++ if (val == CPUFREQ_PRECHANGE) {
++ reg_bif_core_rw_sdram_timing timing =
++ REG_RD(bif_core, regi_bif_core, rw_sdram_timing);
++ timing.cpd = (freqs->new == 200000 ? 0 : 1);
++
++ if (freqs->new == 200000)
++ for (i = 0; i < 50000; i++);
++ REG_WR(bif_core, regi_bif_core, rw_sdram_timing, timing);
++ }
++ return 0;
++}
++
++
++module_init(cris_freq_init);
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/crisksyms.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/crisksyms.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/crisksyms.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/crisksyms.c 2006-11-21 04:21:34.000000000 +0100
+@@ -3,6 +3,7 @@
+ #include <asm/arch/dma.h>
+ #include <asm/arch/intmem.h>
+ #include <asm/arch/pinmux.h>
++#include <asm/arch/io.h>
+
+ /* Functions for allocating DMA channels */
+ EXPORT_SYMBOL(crisv32_request_dma);
+@@ -16,7 +17,11 @@
+
+ /* Functions for handling pinmux */
+ EXPORT_SYMBOL(crisv32_pinmux_alloc);
++EXPORT_SYMBOL(crisv32_pinmux_alloc_fixed);
+ EXPORT_SYMBOL(crisv32_pinmux_dealloc);
++EXPORT_SYMBOL(crisv32_pinmux_dealloc_fixed);
++EXPORT_SYMBOL(crisv32_io_get_name);
++EXPORT_SYMBOL(crisv32_io_get);
+
+ /* Functions masking/unmasking interrupts */
+ EXPORT_SYMBOL(mask_irq);
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/debugport.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/debugport.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/debugport.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/debugport.c 2006-10-13 14:43:13.000000000 +0200
+@@ -4,18 +4,13 @@
+
+ #include <linux/console.h>
+ #include <linux/init.h>
+-#include <linux/major.h>
+-#include <linux/delay.h>
+-#include <linux/tty.h>
+ #include <asm/system.h>
+-#include <asm/io.h>
++#include <asm/arch/hwregs/reg_rdwr.h>
++#include <asm/arch/hwregs/reg_map.h>
+ #include <asm/arch/hwregs/ser_defs.h>
+ #include <asm/arch/hwregs/dma_defs.h>
+ #include <asm/arch/pinmux.h>
+
+-#include <asm/irq.h>
+-#include <asm/arch/hwregs/intr_vect_defs.h>
+-
+ struct dbg_port
+ {
+ unsigned char nbr;
+@@ -26,7 +21,7 @@
+ unsigned int bits;
+ };
+
+-struct dbg_port ports[] =
++struct dbg_port ports[] =
+ {
+ {
+ 0,
+@@ -89,15 +84,6 @@
+ #endif
+ #endif
+
+-#ifdef CONFIG_ETRAXFS_SIM
+-extern void print_str( const char *str );
+-static char buffer[1024];
+-static char msg[] = "Debug: ";
+-static int buffer_pos = sizeof(msg) - 1;
+-#endif
+-
+-extern struct tty_driver *serial_driver;
+-
+ static void
+ start_port(struct dbg_port* p)
+ {
+@@ -118,7 +104,7 @@
+ /* Set up serial port registers */
+ reg_ser_rw_tr_ctrl tr_ctrl = {0};
+ reg_ser_rw_tr_dma_en tr_dma_en = {0};
+-
++
+ reg_ser_rw_rec_ctrl rec_ctrl = {0};
+ reg_ser_rw_tr_baud_div tr_baud_div = {0};
+ reg_ser_rw_rec_baud_div rec_baud_div = {0};
+@@ -148,6 +134,7 @@
+ tr_ctrl.data_bits = regk_ser_bits7;
+ rec_ctrl.data_bits = regk_ser_bits7;
+ }
++
+
+ REG_WR (ser, p->instance, rw_tr_baud_div, tr_baud_div);
+ REG_WR (ser, p->instance, rw_rec_baud_div, rec_baud_div);
+@@ -156,124 +143,21 @@
+ REG_WR (ser, p->instance, rw_rec_ctrl, rec_ctrl);
+ }
+
+-/* No debug */
+-#ifdef CONFIG_ETRAX_DEBUG_PORT_NULL
+-
+-static void
+-console_write(struct console *co, const char *buf, unsigned int len)
+-{
+- return;
+-}
+-
+-/* Target debug */
+-#elif !defined(CONFIG_ETRAXFS_SIM)
+-
+-static void
+-console_write_direct(struct console *co, const char *buf, unsigned int len)
+-{
+- int i;
+- reg_ser_r_stat_din stat;
+- reg_ser_rw_tr_dma_en tr_dma_en, old;
+-
+- /* Switch to manual mode */
+- tr_dma_en = old = REG_RD (ser, port->instance, rw_tr_dma_en);
+- if (tr_dma_en.en == regk_ser_yes) {
+- tr_dma_en.en = regk_ser_no;
+- REG_WR(ser, port->instance, rw_tr_dma_en, tr_dma_en);
+- }
+-
+- /* Send data */
+- for (i = 0; i < len; i++) {
+- /* LF -> CRLF */
+- if (buf[i] == '\n') {
+- do {
+- stat = REG_RD (ser, port->instance, r_stat_din);
+- } while (!stat.tr_rdy);
+- REG_WR_INT (ser, port->instance, rw_dout, '\r');
+- }
+- /* Wait until transmitter is ready and send.*/
+- do {
+- stat = REG_RD (ser, port->instance, r_stat_din);
+- } while (!stat.tr_rdy);
+- REG_WR_INT (ser, port->instance, rw_dout, buf[i]);
+- }
+-
+- /* Restore mode */
+- if (tr_dma_en.en != old.en)
+- REG_WR(ser, port->instance, rw_tr_dma_en, old);
+-}
+-
+-static void
+-console_write(struct console *co, const char *buf, unsigned int len)
+-{
+- if (!port)
+- return;
+- console_write_direct(co, buf, len);
+-}
+-
+-
+-
+-#else
+-
+-/* VCS debug */
+-
+-static void
+-console_write(struct console *co, const char *buf, unsigned int len)
+-{
+- char* pos;
+- pos = memchr(buf, '\n', len);
+- if (pos) {
+- int l = ++pos - buf;
+- memcpy(buffer + buffer_pos, buf, l);
+- memcpy(buffer, msg, sizeof(msg) - 1);
+- buffer[buffer_pos + l] = '\0';
+- print_str(buffer);
+- buffer_pos = sizeof(msg) - 1;
+- if (pos - buf != len) {
+- memcpy(buffer + buffer_pos, pos, len - l);
+- buffer_pos += len - l;
+- }
+- } else {
+- memcpy(buffer + buffer_pos, buf, len);
+- buffer_pos += len;
+- }
+-}
+-
+-#endif
+-
+-int raw_printk(const char *fmt, ...)
+-{
+- static char buf[1024];
+- int printed_len;
+- va_list args;
+- va_start(args, fmt);
+- printed_len = vsnprintf(buf, sizeof(buf), fmt, args);
+- va_end(args);
+- console_write(NULL, buf, strlen(buf));
+- return printed_len;
+-}
+-
+-void
+-stupid_debug(char* buf)
+-{
+- console_write(NULL, buf, strlen(buf));
+-}
+-
+ #ifdef CONFIG_ETRAX_KGDB
+ /* Use polling to get a single character from the kernel debug port */
+ int
+ getDebugChar(void)
+ {
+- reg_ser_rs_status_data stat;
++ reg_ser_rs_stat_din stat;
+ reg_ser_rw_ack_intr ack_intr = { 0 };
+
+ do {
+- stat = REG_RD(ser, kgdb_instance, rs_status_data);
+- } while (!stat.data_avail);
++ stat = REG_RD(ser, kgdb_port->instance, rs_stat_din);
++ } while (!stat.dav);
+
+ /* Ack the data_avail interrupt. */
+- ack_intr.data_avail = 1;
+- REG_WR(ser, kgdb_instance, rw_ack_intr, ack_intr);
++ ack_intr.dav = 1;
++ REG_WR(ser, kgdb_port->instance, rw_ack_intr, ack_intr);
+
+ return stat.data;
+ }
+@@ -282,173 +166,18 @@
+ void
+ putDebugChar(int val)
+ {
+- reg_ser_r_status_data stat;
++ reg_ser_r_stat_din stat;
+ do {
+- stat = REG_RD (ser, kgdb_instance, r_status_data);
+- } while (!stat.tr_ready);
+- REG_WR (ser, kgdb_instance, rw_data_out, REG_TYPE_CONV(reg_ser_rw_data_out, int, val));
++ stat = REG_RD (ser, kgdb_port->instance, r_stat_din);
++ } while (!stat.tr_rdy);
++ REG_WR_INT (ser, kgdb_port->instance, rw_dout, val);
+ }
+ #endif /* CONFIG_ETRAX_KGDB */
+
+-static int __init
+-console_setup(struct console *co, char *options)
+-{
+- char* s;
+-
+- if (options) {
+- port = &ports[co->index];
+- port->baudrate = 115200;
+- port->parity = 'N';
+- port->bits = 8;
+- port->baudrate = simple_strtoul(options, NULL, 10);
+- s = options;
+- while(*s >= '0' && *s <= '9')
+- s++;
+- if (*s) port->parity = *s++;
+- if (*s) port->bits = *s++ - '0';
+- port->started = 0;
+- start_port(port);
+- }
+- return 0;
+-}
+-
+-/* This is a dummy serial device that throws away anything written to it.
+- * This is used when no debug output is wanted.
+- */
+-static struct tty_driver dummy_driver;
+-
+-static int dummy_open(struct tty_struct *tty, struct file * filp)
+-{
+- return 0;
+-}
+-
+-static void dummy_close(struct tty_struct *tty, struct file * filp)
+-{
+-}
+-
+-static int dummy_write(struct tty_struct * tty,
+- const unsigned char *buf, int count)
+-{
+- return count;
+-}
+-
+-static int
+-dummy_write_room(struct tty_struct *tty)
+-{
+- return 8192;
+-}
+-
+-void __init
+-init_dummy_console(void)
+-{
+- memset(&dummy_driver, 0, sizeof(struct tty_driver));
+- dummy_driver.driver_name = "serial";
+- dummy_driver.name = "ttyS";
+- dummy_driver.major = TTY_MAJOR;
+- dummy_driver.minor_start = 68;
+- dummy_driver.num = 1; /* etrax100 has 4 serial ports */
+- dummy_driver.type = TTY_DRIVER_TYPE_SERIAL;
+- dummy_driver.subtype = SERIAL_TYPE_NORMAL;
+- dummy_driver.init_termios = tty_std_termios;
+- dummy_driver.init_termios.c_cflag =
+- B115200 | CS8 | CREAD | HUPCL | CLOCAL; /* is normally B9600 default... */
+- dummy_driver.flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
+-
+- dummy_driver.open = dummy_open;
+- dummy_driver.close = dummy_close;
+- dummy_driver.write = dummy_write;
+- dummy_driver.write_room = dummy_write_room;
+- if (tty_register_driver(&dummy_driver))
+- panic("Couldn't register dummy serial driver\n");
+-}
+-
+-static struct tty_driver*
+-crisv32_console_device(struct console* co, int *index)
+-{
+- if (port)
+- *index = port->nbr;
+- return port ? serial_driver : &dummy_driver;
+-}
+-
+-static struct console sercons = {
+- name : "ttyS",
+- write: console_write,
+- read : NULL,
+- device : crisv32_console_device,
+- unblank : NULL,
+- setup : console_setup,
+- flags : CON_PRINTBUFFER,
+- index : -1,
+- cflag : 0,
+- next : NULL
+-};
+-static struct console sercons0 = {
+- name : "ttyS",
+- write: console_write,
+- read : NULL,
+- device : crisv32_console_device,
+- unblank : NULL,
+- setup : console_setup,
+- flags : CON_PRINTBUFFER,
+- index : 0,
+- cflag : 0,
+- next : NULL
+-};
+-
+-static struct console sercons1 = {
+- name : "ttyS",
+- write: console_write,
+- read : NULL,
+- device : crisv32_console_device,
+- unblank : NULL,
+- setup : console_setup,
+- flags : CON_PRINTBUFFER,
+- index : 1,
+- cflag : 0,
+- next : NULL
+-};
+-static struct console sercons2 = {
+- name : "ttyS",
+- write: console_write,
+- read : NULL,
+- device : crisv32_console_device,
+- unblank : NULL,
+- setup : console_setup,
+- flags : CON_PRINTBUFFER,
+- index : 2,
+- cflag : 0,
+- next : NULL
+-};
+-static struct console sercons3 = {
+- name : "ttyS",
+- write: console_write,
+- read : NULL,
+- device : crisv32_console_device,
+- unblank : NULL,
+- setup : console_setup,
+- flags : CON_PRINTBUFFER,
+- index : 3,
+- cflag : 0,
+- next : NULL
+-};
+-
+ /* Register console for printk's, etc. */
+ int __init
+ init_etrax_debug(void)
+ {
+- static int first = 1;
+-
+- if (!first) {
+- unregister_console(&sercons);
+- register_console(&sercons0);
+- register_console(&sercons1);
+- register_console(&sercons2);
+- register_console(&sercons3);
+- init_dummy_console();
+- return 0;
+- }
+- first = 0;
+- register_console(&sercons);
+ start_port(port);
+
+ #ifdef CONFIG_ETRAX_KGDB
+@@ -456,5 +185,3 @@
+ #endif /* CONFIG_ETRAX_KGDB */
+ return 0;
+ }
+-
+-__initcall(init_etrax_debug);
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/dma.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/dma.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/dma.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/dma.c 2007-02-02 08:45:22.000000000 +0100
+@@ -12,6 +12,16 @@
+ #include <asm/system.h>
+ #include <asm/arch/arbiter.h>
+
++/*
++ * The memory region we allocated bandwidth for is stored in
++ * used_dma_channels as an in-use flag.
++ */
++enum dma_region_allocated_marker {
++ DMA_NO_REGION_ALLOCATED = 0,
++ DMA_INT_REGION_ALLOCATED = 1,
++ DMA_EXT_REGION_ALLOCATED = 2
++};
++
+ static char used_dma_channels[MAX_DMA_CHANNELS];
+ static const char * used_dma_channels_users[MAX_DMA_CHANNELS];
+
+@@ -74,7 +84,7 @@
+ if (options & DMA_VERBOSE_ON_ERROR) {
+ printk("Failed to request DMA %i for %s, only 0-%i valid)\n", dmanr, device_id, MAX_DMA_CHANNELS-1);
+ }
+-
++
+ if (options & DMA_PANIC_ON_ERROR)
+ panic("request_dma error!");
+ return -EINVAL;
+@@ -202,13 +212,14 @@
+ if (dmanr == 3)
+ strmux_cfg.dma3 = regk_strmux_ext3;
+ else if (dmanr == 9)
+- strmux_cfg.dma9 = regk_strmux_ext2;
++ strmux_cfg.dma9 = regk_strmux_ext3;
+ else
+- panic("Invalid DMA channel for ext2\n");
++ panic("Invalid DMA channel for ext3\n");
+ break;
+ }
+
+- used_dma_channels[dmanr] = 1;
++ used_dma_channels[dmanr] = options & DMA_INT_MEM
++ ? DMA_INT_REGION_ALLOCATED : DMA_EXT_REGION_ALLOCATED;
+ used_dma_channels_users[dmanr] = device_id;
+ REG_WR(config, regi_config, rw_clk_ctrl, clk_ctrl);
+ REG_WR(strmux, regi_strmux, rw_cfg, strmux_cfg);
+@@ -218,7 +229,12 @@
+
+ void crisv32_free_dma(unsigned int dmanr)
+ {
++ int region;
++
+ spin_lock(&dma_lock);
++ region = used_dma_channels[dmanr] == DMA_INT_REGION_ALLOCATED
++ ? INT_REGION : EXT_REGION;
+ used_dma_channels[dmanr] = 0;
++ crisv32_arbiter_deallocate_bandwidth(dmanr, region);
+ spin_unlock(&dma_lock);
+ }
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/entry.S linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/entry.S
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/entry.S 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/entry.S 2007-01-09 10:29:19.000000000 +0100
+@@ -11,7 +11,7 @@
+ *
+ * Stack layout in 'ret_from_system_call':
+ * ptrace needs to have all regs on the stack.
+- * if the order here is changed, it needs to be
++ * if the order here is changed, it needs to be
+ * updated in fork.c:copy_process, signal.c:do_signal,
+ * ptrace.c and ptrace.h
+ *
+@@ -40,7 +40,7 @@
+ .globl sys_call_table
+
+ ; Check if preemptive kernel scheduling should be done.
+-#ifdef CONFIG_PREEMPT
++#ifdef CONFIG_PREEMPT
+ _resume_kernel:
+ di
+ ; Load current task struct.
+@@ -81,7 +81,7 @@
+ nop
+ ba ret_from_sys_call
+ nop
+-
++
+ ret_from_intr:
+ ;; Check for resched if preemptive kernel, or if we're going back to
+ ;; user-mode. This test matches the user_regs(regs) macro. Don't simply
+@@ -93,7 +93,7 @@
+ bpl _resume_kernel
+
+ ; Note that di below is in delay slot.
+-
++
+ _resume_userspace:
+ di ; So need_resched and sigpending don't change.
+
+@@ -107,19 +107,19 @@
+ nop
+ ba _Rexit
+ nop
+-
++
+ ;; The system_call is called by a BREAK instruction, which looks pretty
+ ;; much like any other exception.
+ ;;
+ ;; System calls can't be made from interrupts but we still stack ERP
+ ;; to have a complete stack frame.
+- ;;
++ ;;
+ ;; In r9 we have the wanted syscall number. Arguments come in r10,r11,r12,
+ ;; r13,mof,srp
+ ;;
+ ;; This function looks on the _surface_ like spaghetti programming, but it's
+- ;; really designed so that the fast-path does not force cache-loading of
+- ;; non-used instructions. Only the non-common cases cause the outlined code
++ ;; really designed so that the fast-path does not force cache-loading of
++ ;; non-used instructions. Only the non-common cases cause the outlined code
+ ;; to run..
+
+ system_call:
+@@ -151,7 +151,7 @@
+ or.d (1<<9), $r0
+ move $r0, $ccs
+ #endif
+-
++
+ movs.w -ENOSYS, $r0
+ addoq +PT_r10, $sp, $acr
+ move.d $r0, [$acr]
+@@ -166,9 +166,9 @@
+ bmi _syscall_trace_entry
+ nop
+
+-_syscall_traced:
++_syscall_traced:
+ ;; Check for sanity in the requested syscall number.
+- cmpu.w NR_syscalls, $r9
++ cmpu.w NR_syscalls, $r9
+ bhs ret_from_sys_call
+ lslq 2, $r9 ; Multiply by 4, in the delay slot.
+
+@@ -177,7 +177,7 @@
+ move.d $sp, $r0
+ subq 4, $sp
+ move.d $r0, [$sp]
+-
++
+ ;; The registers carrying parameters (R10-R13) are intact. The optional
+ ;; fifth and sixth parameters is in MOF and SRP respectivly. Put them
+ ;; back on the stack.
+@@ -185,33 +185,33 @@
+ move $srp, [$sp]
+ subq 4, $sp
+ move $mof, [$sp]
+-
++
+ ;; Actually to the system call.
+ addo.d +sys_call_table, $r9, $acr
+ move.d [$acr], $acr
+ jsr $acr
+ nop
+-
++
+ addq 3*4, $sp ; Pop the mof, srp and regs parameters.
+ addoq +PT_r10, $sp, $acr
+ move.d $r10, [$acr] ; Save the return value.
+
+- moveq 1, $r9 ; "Parameter" to ret_from_sys_call to
++ moveq 1, $r9 ; "Parameter" to ret_from_sys_call to
+ ; show it was a sys call.
+-
++
+ ;; Fall through into ret_from_sys_call to return.
+-
++
+ ret_from_sys_call:
+ ;; R9 is a parameter:
+ ;; >= 1 from syscall
+ ;; 0 from irq
+-
++
+ ;; Get the current task-struct pointer.
+- movs.w -8192, $r0 ; THREAD_SIZE == 8192
++ movs.w -8192, $r0 ; THREAD_SIZE == 8192
+ and.d $sp, $r0
+
+ di ; Make sure need_resched and sigpending don't change.
+-
++
+ addoq +TI_flags, $r0, $acr
+ move.d [$acr], $r1
+ and.d _TIF_ALLWORK_MASK, $r1
+@@ -253,14 +253,14 @@
+ move.d $r1, $r9
+ ba _resume_userspace
+ nop
+-
++
+ _work_pending:
+ addoq +TI_flags, $r0, $acr
+ move.d [$acr], $r10
+ btstq TIF_NEED_RESCHED, $r10 ; Need resched?
+ bpl _work_notifysig ; No, must be signal/notify.
+ nop
+-
++
+ _work_resched:
+ move.d $r9, $r1 ; Preserve R9.
+ jsr schedule
+@@ -281,28 +281,26 @@
+ ;; Deal with pending signals and notify-resume requests.
+
+ addoq +TI_flags, $r0, $acr
+- move.d [$acr], $r13 ; The thread_info_flags parameter.
+- move.d $r9, $r10 ; do_notify_resume syscall/irq param.
+- moveq 0, $r11 ; oldset param - 0 in this case.
+- move.d $sp, $r12 ; The regs param.
++ move.d [$acr], $r12 ; The thread_info_flags parameter.
++ move.d $sp, $r11 ; The regs param.
+ jsr do_notify_resume
+- nop
+-
++ move.d $r9, $r10 ; do_notify_resume syscall/irq param.
++
+ ba _Rexit
+ nop
+
+ ;; We get here as a sidetrack when we've entered a syscall with the
+ ;; trace-bit set. We need to call do_syscall_trace and then continue
+ ;; with the call.
+-
++
+ _syscall_trace_entry:
+ ;; PT_r10 in the frame contains -ENOSYS as required, at this point.
+-
++
+ jsr do_syscall_trace
+ nop
+
+ ;; Now re-enter the syscall code to do the syscall itself. We need to
+- ;; restore R9 here to contain the wanted syscall, and the other
++ ;; restore R9 here to contain the wanted syscall, and the other
+ ;; parameter-bearing registers.
+ addoq +PT_r9, $sp, $acr
+ move.d [$acr], $r9
+@@ -318,10 +316,10 @@
+ move [$acr], $mof
+ addoq +PT_srp, $sp, $acr
+ move [$acr], $srp
+-
++
+ ba _syscall_traced
+ nop
+-
++
+ ;; Resume performs the actual task-switching, by switching stack
+ ;; pointers. Input arguments are:
+ ;;
+@@ -331,7 +329,7 @@
+ ;;
+ ;; Returns old current in R10.
+
+-resume:
++resume:
+ subq 4, $sp
+ move $srp, [$sp] ; Keep old/new PC on the stack.
+ add.d $r12, $r10 ; R10 = current tasks tss.
+@@ -341,14 +339,14 @@
+
+ addoq +THREAD_usp, $r10, $acr
+ move $usp, [$acr] ; Save user-mode stackpointer.
+-
++
+ ;; See copy_thread for the reason why register R9 is saved.
+ subq 10*4, $sp
+ movem $r9, [$sp] ; Save non-scratch registers and R9.
+-
++
+ addoq +THREAD_ksp, $r10, $acr
+ move.d $sp, [$acr] ; Save kernel SP for old task.
+-
++
+ move.d $sp, $r10 ; Return last running task in R10.
+ and.d -8192, $r10 ; Get thread_info from stackpointer.
+ addoq +TI_task, $r10, $acr
+@@ -360,7 +358,7 @@
+
+ addoq +THREAD_usp, $r11, $acr
+ move [$acr], $usp ; Restore user-mode stackpointer.
+-
++
+ addoq +THREAD_ccs, $r11, $acr
+ move [$acr], $ccs ; Restore IRQ enable status.
+ move.d [$sp+], $acr
+@@ -407,7 +405,7 @@
+ movem [$sp+], $r13
+ move.d [$sp+], $acr
+ move [$sp], $srs
+- addq 4, $sp
++ addq 4, $sp
+ move [$sp+], $mof
+ move [$sp+], $spc
+ move [$sp+], $ccs
+@@ -419,7 +417,7 @@
+
+ .comm cause_of_death, 4 ;; Don't declare this anywhere.
+
+-spurious_interrupt:
++spurious_interrupt:
+ di
+ jump hard_reset_now
+ nop
+@@ -494,31 +492,38 @@
+ ;; thread_info as first parameter
+ move.d $r9, $r10
+ moveq 5, $r11 ; SIGTRAP as second argument.
+- jsr ugdb_trap_user
++ jsr ugdb_trap_user
+ nop
+ jump ret_from_intr ; Use the return routine for interrupts.
+ nop
+-
+-gdb_handle_exception:
++
++gdb_handle_exception:
+ subq 4, $sp
+ move.d $r0, [$sp]
+ #ifdef CONFIG_ETRAX_KGDB
+- move $ccs, $r0 ; U-flag not affected by previous insns.
++ move $ccs, $r0 ; U-flag not affected by previous insns.
+ btstq 16, $r0 ; Test the U-flag.
+- bmi _ugdb_handle_exception ; Go to user mode debugging.
+- nop ; Empty delay-slot (cannot pop R0 here).
++ bmi _ugdb_handle_exception ; Go to user mode debugging.
++ nop ; Empty delay-slot (cannot pop R0 here).
+ ba kgdb_handle_exception ; Go to kernel debugging.
+ move.d [$sp+], $r0 ; Restore R0 in delay slot.
+ #endif
+-
++
+ _ugdb_handle_exception:
+ ba do_sigtrap ; SIGTRAP the offending process.
+ move.d [$sp+], $r0 ; Restore R0 in delay slot.
+
++ .global kernel_execve
++kernel_execve:
++ move.d __NR_execve, $r9
++ break 13
++ ret
++ nop
++
+ .data
+
+ .section .rodata,"a"
+-sys_call_table:
++sys_call_table:
+ .long sys_restart_syscall ; 0 - old "setup()" system call, used
+ ; for restarting.
+ .long sys_exit
+@@ -647,7 +652,7 @@
+ .long sys_adjtimex
+ .long sys_mprotect /* 125 */
+ .long sys_sigprocmask
+- .long sys_ni_syscall /* old "create_module" */
++ .long sys_ni_syscall /* old "create_module" */
+ .long sys_init_module
+ .long sys_delete_module
+ .long sys_ni_syscall /* 130: old "get_kernel_syms" */
+@@ -789,7 +794,7 @@
+ .long sys_clock_getres
+ .long sys_clock_nanosleep
+ .long sys_statfs64
+- .long sys_fstatfs64
++ .long sys_fstatfs64
+ .long sys_tgkill /* 270 */
+ .long sys_utimes
+ .long sys_fadvise64_64
+@@ -805,7 +810,43 @@
+ .long sys_mq_getsetattr
+ .long sys_ni_syscall /* reserved for kexec */
+ .long sys_waitid
+-
++ .long sys_ni_syscall /* 285 */ /* available */
++ .long sys_add_key
++ .long sys_request_key
++ .long sys_keyctl
++ .long sys_ioprio_set
++ .long sys_ioprio_get /* 290 */
++ .long sys_inotify_init
++ .long sys_inotify_add_watch
++ .long sys_inotify_rm_watch
++ .long sys_migrate_pages
++ .long sys_openat /* 295 */
++ .long sys_mkdirat
++ .long sys_mknodat
++ .long sys_fchownat
++ .long sys_futimesat
++ .long sys_fstatat64 /* 300 */
++ .long sys_unlinkat
++ .long sys_renameat
++ .long sys_linkat
++ .long sys_symlinkat
++ .long sys_readlinkat /* 305 */
++ .long sys_fchmodat
++ .long sys_faccessat
++ .long sys_pselect6
++ .long sys_ppoll
++ .long sys_unshare /* 310 */
++ .long sys_set_robust_list
++ .long sys_set_robust_list
++ .long sys_get_robust_list
++ .long sys_splice
++ .long sys_sync_file_range
++ .long sys_tee /* 315 */
++ .long sys_vmsplice
++ .long sys_move_pages
++ .long sys_getcpu
++ .long sys_epoll_pwait
++
+ /*
+ * NOTE!! This doesn't have to be exact - we just have
+ * to make sure we have _enough_ of the "sys_ni_syscall"
+@@ -816,4 +857,4 @@
+ .rept NR_syscalls - (.-sys_call_table) / 4
+ .long sys_ni_syscall
+ .endr
+-
++
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/fasttimer.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/fasttimer.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/fasttimer.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/fasttimer.c 2007-01-09 10:29:19.000000000 +0100
+@@ -1,110 +1,10 @@
+-/* $Id: fasttimer.c,v 1.11 2005/01/04 11:15:46 starvik Exp $
++/*
+ * linux/arch/cris/kernel/fasttimer.c
+ *
+ * Fast timers for ETRAX FS
+ * This may be useful in other OS than Linux so use 2 space indentation...
+ *
+- * $Log: fasttimer.c,v $
+- * Revision 1.11 2005/01/04 11:15:46 starvik
+- * Don't share timer IRQ.
+- *
+- * Revision 1.10 2004/12/07 09:19:38 starvik
+- * Corrected includes.
+- * Use correct interrupt macros.
+- *
+- * Revision 1.9 2004/05/14 10:18:58 starvik
+- * Export fast_timer_list
+- *
+- * Revision 1.8 2004/05/14 07:58:03 starvik
+- * Merge of changes from 2.4
+- *
+- * Revision 1.7 2003/07/10 12:06:14 starvik
+- * Return IRQ_NONE if irq wasn't handled
+- *
+- * Revision 1.6 2003/07/04 08:27:49 starvik
+- * Merge of Linux 2.5.74
+- *
+- * Revision 1.5 2003/06/05 10:16:22 johana
+- * New INTR_VECT macros.
+- *
+- * Revision 1.4 2003/06/03 08:49:45 johana
+- * Fixed typo.
+- *
+- * Revision 1.3 2003/06/02 12:51:27 johana
+- * Now compiles.
+- * Commented some include files that probably can be removed.
+- *
+- * Revision 1.2 2003/06/02 12:09:41 johana
+- * Ported to ETRAX FS using the trig interrupt instead of timer1.
+- *
+- * Revision 1.3 2002/12/12 08:26:32 starvik
+- * Don't use C-comments inside CVS comments
+- *
+- * Revision 1.2 2002/12/11 15:42:02 starvik
+- * Extracted v10 (ETRAX 100LX) specific stuff from arch/cris/kernel/
+- *
+- * Revision 1.1 2002/11/18 07:58:06 starvik
+- * Fast timers (from Linux 2.4)
+- *
+- * Revision 1.5 2002/10/15 06:21:39 starvik
+- * Added call to init_waitqueue_head
+- *
+- * Revision 1.4 2002/05/28 17:47:59 johana
+- * Added del_fast_timer()
+- *
+- * Revision 1.3 2002/05/28 16:16:07 johana
+- * Handle empty fast_timer_list
+- *
+- * Revision 1.2 2002/05/27 15:38:42 johana
+- * Made it compile without warnings on Linux 2.4.
+- * (includes, wait_queue, PROC_FS and snprintf)
+- *
+- * Revision 1.1 2002/05/27 15:32:25 johana
+- * arch/etrax100/kernel/fasttimer.c v1.8 from the elinux tree.
+- *
+- * Revision 1.8 2001/11/27 13:50:40 pkj
+- * Disable interrupts while stopping the timer and while modifying the
+- * list of active timers in timer1_handler() as it may be interrupted
+- * by other interrupts (e.g., the serial interrupt) which may add fast
+- * timers.
+- *
+- * Revision 1.7 2001/11/22 11:50:32 pkj
+- * * Only store information about the last 16 timers.
+- * * proc_fasttimer_read() now uses an allocated buffer, since it
+- * requires more space than just a page even for only writing the
+- * last 16 timers. The buffer is only allocated on request, so
+- * unless /proc/fasttimer is read, it is never allocated.
+- * * Renamed fast_timer_started to fast_timers_started to match
+- * fast_timers_added and fast_timers_expired.
+- * * Some clean-up.
+- *
+- * Revision 1.6 2000/12/13 14:02:08 johana
+- * Removed volatile for fast_timer_list
+- *
+- * Revision 1.5 2000/12/13 13:55:35 johana
+- * Added DEBUG_LOG, added som cli() and cleanup
+- *
+- * Revision 1.4 2000/12/05 13:48:50 johana
+- * Added range check when writing proc file, modified timer int handling
+- *
+- * Revision 1.3 2000/11/23 10:10:20 johana
+- * More debug/logging possibilities.
+- * Moved GET_JIFFIES_USEC() to timex.h and time.c
+- *
+- * Revision 1.2 2000/11/01 13:41:04 johana
+- * Clean up and bugfixes.
+- * Created new do_gettimeofday_fast() that gets a timeval struct
+- * with time based on jiffies and *R_TIMER0_DATA, uses a table
+- * for fast conversion of timer value to microseconds.
+- * (Much faster the standard do_gettimeofday() and we don't really
+- * wan't to use the true time - we wan't the "uptime" so timers don't screw up
+- * when we change the time.
+- * TODO: Add efficient support for continuous timers as well.
+- *
+- * Revision 1.1 2000/10/26 15:49:16 johana
+- * Added fasttimer, highresolution timers.
+- *
+- * Copyright (C) 2000,2001 2002, 2003 Axis Communications AB, Lund, Sweden
++ * Copyright (C) 2000-2006 Axis Communications AB, Lund, Sweden
+ */
+
+ #include <linux/errno.h>
+@@ -128,13 +28,13 @@
+ #include <asm/fasttimer.h>
+ #include <linux/proc_fs.h>
+
+-/*
+- * timer0 is running at 100MHz and generating jiffies timer ticks
++/*
++ * timer0 is running at 100MHz and generating jiffies timer ticks
+ * at 100 or 1000 HZ.
+ * fasttimer gives an API that gives timers that expire "between" the jiffies
+ * giving microsecond resolution (10 ns).
+ * fasttimer uses reg_timer_rw_trig register to get interrupt when
+- * r_time reaches a certain value.
++ * r_time reaches a certain value.
+ */
+
+
+@@ -151,19 +51,19 @@
+ #define SANITYCHECK(x)
+ #endif
+
+-#define D1(x)
+-#define D2(x)
+-#define DP(x)
++#define D1(x)
++#define D2(x)
++#define DP(x)
+
+ #define __INLINE__ inline
+
+-static int fast_timer_running = 0;
+-static int fast_timers_added = 0;
+-static int fast_timers_started = 0;
+-static int fast_timers_expired = 0;
+-static int fast_timers_deleted = 0;
+-static int fast_timer_is_init = 0;
+-static int fast_timer_ints = 0;
++static unsigned int fast_timer_running = 0;
++static unsigned int fast_timers_added = 0;
++static unsigned int fast_timers_started = 0;
++static unsigned int fast_timers_expired = 0;
++static unsigned int fast_timers_deleted = 0;
++static unsigned int fast_timer_is_init = 0;
++static unsigned int fast_timer_ints = 0;
+
+ struct fast_timer *fast_timer_list = NULL;
+
+@@ -171,8 +71,8 @@
+ #define DEBUG_LOG_MAX 128
+ static const char * debug_log_string[DEBUG_LOG_MAX];
+ static unsigned long debug_log_value[DEBUG_LOG_MAX];
+-static int debug_log_cnt = 0;
+-static int debug_log_cnt_wrapped = 0;
++static unsigned int debug_log_cnt = 0;
++static unsigned int debug_log_cnt_wrapped = 0;
+
+ #define DEBUG_LOG(string, value) \
+ { \
+@@ -202,48 +102,33 @@
+ int timer_div_settings[NUM_TIMER_STATS];
+ int timer_delay_settings[NUM_TIMER_STATS];
+
++struct work_struct fast_work;
+
+ static void
+-timer_trig_handler(void);
++timer_trig_handler(void* dummy);
+
+
+
+ /* Not true gettimeofday, only checks the jiffies (uptime) + useconds */
+-void __INLINE__ do_gettimeofday_fast(struct timeval *tv)
++void __INLINE__ do_gettimeofday_fast(struct fasttime_t *tv)
+ {
+- unsigned long sec = jiffies;
+- unsigned long usec = GET_JIFFIES_USEC();
+-
+- usec += (sec % HZ) * (1000000 / HZ);
+- sec = sec / HZ;
+-
+- if (usec > 1000000)
+- {
+- usec -= 1000000;
+- sec++;
+- }
+- tv->tv_sec = sec;
+- tv->tv_usec = usec;
++ tv->tv_jiff = jiffies;
++ tv->tv_usec = GET_JIFFIES_USEC();
+ }
+
+-int __INLINE__ timeval_cmp(struct timeval *t0, struct timeval *t1)
++int __INLINE__ timeval_cmp(struct fasttime_t *t0, struct fasttime_t *t1)
+ {
+- if (t0->tv_sec < t1->tv_sec)
+- {
++ /* Compare jiffies. Takes care of wrapping */
++ if (time_before(t0->tv_jiff, t1->tv_jiff))
+ return -1;
+- }
+- else if (t0->tv_sec > t1->tv_sec)
+- {
++ else if (time_after(t0->tv_jiff, t1->tv_jiff))
+ return 1;
+- }
++
++ /* Compare us */
+ if (t0->tv_usec < t1->tv_usec)
+- {
+ return -1;
+- }
+ else if (t0->tv_usec > t1->tv_usec)
+- {
+ return 1;
+- }
+ return 0;
+ }
+
+@@ -254,20 +139,23 @@
+ reg_timer_rw_intr_mask intr_mask;
+ reg_timer_rw_trig trig;
+ reg_timer_rw_trig_cfg trig_cfg = { 0 };
+- reg_timer_r_time r_time;
+-
+- r_time = REG_RD(timer, regi_timer, r_time);
++ reg_timer_r_time r_time0;
++ reg_timer_r_time r_time1;
++ unsigned char trig_wrap;
++ unsigned char time_wrap;
+
++ r_time0 = REG_RD(timer, regi_timer, r_time);
++
+ D1(printk("start_timer_trig : %d us freq: %i div: %i\n",
+ delay_us, freq_index, div));
+ /* Clear trig irq */
+ intr_mask = REG_RD(timer, regi_timer, rw_intr_mask);
+ intr_mask.trig = 0;
+ REG_WR(timer, regi_timer, rw_intr_mask, intr_mask);
+-
+- /* Set timer values */
++
++ /* Set timer values and check if trigger wraps. */
+ /* r_time is 100MHz (10 ns resolution) */
+- trig = r_time + delay_us*(1000/10);
++ trig_wrap = (trig = r_time0 + delay_us*(1000/10)) < r_time0;
+
+ timer_div_settings[fast_timers_started % NUM_TIMER_STATS] = trig;
+ timer_delay_settings[fast_timers_started % NUM_TIMER_STATS] = delay_us;
+@@ -275,15 +163,17 @@
+ /* Ack interrupt */
+ ack_intr.trig = 1;
+ REG_WR(timer, regi_timer, rw_ack_intr, ack_intr);
+-
++
+ /* Start timer */
+ REG_WR(timer, regi_timer, rw_trig, trig);
+ trig_cfg.tmr = regk_timer_time;
+ REG_WR(timer, regi_timer, rw_trig_cfg, trig_cfg);
+
+ /* Check if we have already passed the trig time */
+- r_time = REG_RD(timer, regi_timer, r_time);
+- if (r_time < trig) {
++ r_time1 = REG_RD(timer, regi_timer, r_time);
++ time_wrap = r_time1 < r_time0;
++
++ if ((trig_wrap && !time_wrap) || (r_time1 < trig)) {
+ /* No, Enable trig irq */
+ intr_mask = REG_RD(timer, regi_timer, rw_intr_mask);
+ intr_mask.trig = 1;
+@@ -291,16 +181,17 @@
+ fast_timers_started++;
+ fast_timer_running = 1;
+ }
+- else
++ else
+ {
+ /* We have passed the time, disable trig point, ack intr */
+ trig_cfg.tmr = regk_timer_off;
+ REG_WR(timer, regi_timer, rw_trig_cfg, trig_cfg);
+ REG_WR(timer, regi_timer, rw_ack_intr, ack_intr);
+- /* call the int routine directly */
+- timer_trig_handler();
++ /* call the int routine */
++ INIT_WORK(&fast_work, timer_trig_handler, (void*)NULL);
++ schedule_work(&fast_work);
+ }
+-
++
+ }
+
+ /* In version 1.4 this function takes 27 - 50 us */
+@@ -327,7 +218,7 @@
+ {
+ printk("timer name: %s data: 0x%08lX already in list!\n", name, data);
+ sanity_failed++;
+- return;
++ goto done;
+ }
+ else
+ {
+@@ -343,11 +234,11 @@
+ t->name = name;
+
+ t->tv_expires.tv_usec = t->tv_set.tv_usec + delay_us % 1000000;
+- t->tv_expires.tv_sec = t->tv_set.tv_sec + delay_us / 1000000;
++ t->tv_expires.tv_jiff = t->tv_set.tv_jiff + delay_us / 1000000 / HZ;
+ if (t->tv_expires.tv_usec > 1000000)
+ {
+ t->tv_expires.tv_usec -= 1000000;
+- t->tv_expires.tv_sec++;
++ t->tv_expires.tv_jiff += HZ;
+ }
+ #ifdef FAST_TIMER_LOG
+ timer_added_log[fast_timers_added % NUM_TIMER_STATS] = *t;
+@@ -388,6 +279,7 @@
+
+ D2(printk("start_one_shot_timer: %d us done\n", delay_us));
+
++done:
+ local_irq_restore(flags);
+ } /* start_one_shot_timer */
+
+@@ -431,26 +323,32 @@
+ /* Timer interrupt handler for trig interrupts */
+
+ static irqreturn_t
+-timer_trig_interrupt(int irq, void *dev_id, struct pt_regs *regs)
++timer_trig_interrupt(int irq, void *dev_id)
+ {
+ reg_timer_r_masked_intr masked_intr;
+-
+ /* Check if the timer interrupt is for us (a trig int) */
+ masked_intr = REG_RD(timer, regi_timer, r_masked_intr);
+ if (!masked_intr.trig)
+ return IRQ_NONE;
+- timer_trig_handler();
++ timer_trig_handler(NULL);
+ return IRQ_HANDLED;
+ }
+
+-static void timer_trig_handler(void)
++static void timer_trig_handler(void* dummy)
+ {
+ reg_timer_rw_ack_intr ack_intr = { 0 };
+ reg_timer_rw_intr_mask intr_mask;
+ reg_timer_rw_trig_cfg trig_cfg = { 0 };
+ struct fast_timer *t;
+- unsigned long flags;
++ unsigned long flags;
+
++ /* We keep interrupts disabled not only when we modify the
++ * fast timer list, but any time we hold a reference to a
++ * timer in the list, since del_fast_timer may be called
++ * from (another) interrupt context. Thus, the only time
++ * when interrupts are enabled is when calling the timer
++ * callback function.
++ */
+ local_irq_save(flags);
+
+ /* Clear timer trig interrupt */
+@@ -470,16 +368,17 @@
+ fast_timer_running = 0;
+ fast_timer_ints++;
+
+- local_irq_restore(flags);
++ fast_timer_function_type *f;
++ unsigned long d;
+
+ t = fast_timer_list;
+ while (t)
+ {
+- struct timeval tv;
++ struct fasttime_t tv;
+
+ /* Has it really expired? */
+ do_gettimeofday_fast(&tv);
+- D1(printk("t: %is %06ius\n", tv.tv_sec, tv.tv_usec));
++ D1(printk("t: %is %06ius\n", tv.tv_jiff, tv.tv_usec));
+
+ if (timeval_cmp(&t->tv_expires, &tv) <= 0)
+ {
+@@ -490,7 +389,6 @@
+ fast_timers_expired++;
+
+ /* Remove this timer before call, since it may reuse the timer */
+- local_irq_save(flags);
+ if (t->prev)
+ {
+ t->prev->next = t->next;
+@@ -505,11 +403,21 @@
+ }
+ t->prev = NULL;
+ t->next = NULL;
+- local_irq_restore(flags);
+
+- if (t->function != NULL)
++ /* Save function callback data before enabling interrupts,
++ * since the timer may be removed and we don't know how it
++ * was allocated (e.g. ->function and ->data may become
++ * overwritten after deletion if the timer was stack-allocated).
++ */
++ f = t->function;
++ d = t->data;
++
++ if (f != NULL)
+ {
+- t->function(t->data);
++ /* Run the callback function with interrupts enabled. */
++ local_irq_restore(flags);
++ f(d);
++ local_irq_save(flags);
+ }
+ else
+ {
+@@ -522,16 +430,19 @@
+ D1(printk(".\n"));
+ }
+
+- local_irq_save(flags);
+ if ((t = fast_timer_list) != NULL)
+ {
+ /* Start next timer.. */
+- long us;
+- struct timeval tv;
++ long us = 0;
++ struct fasttime_t tv;
+
+ do_gettimeofday_fast(&tv);
+- us = ((t->tv_expires.tv_sec - tv.tv_sec) * 1000000 +
+- t->tv_expires.tv_usec - tv.tv_usec);
++
++ /* time_after_eq takes care of wrapping */
++ if (time_after_eq(t->tv_expires.tv_jiff, tv.tv_jiff))
++ us = ((t->tv_expires.tv_jiff - tv.tv_jiff) * 1000000 / HZ +
++ t->tv_expires.tv_usec - tv.tv_usec);
++
+ if (us > 0)
+ {
+ if (!fast_timer_running)
+@@ -541,7 +452,6 @@
+ #endif
+ start_timer_trig(us);
+ }
+- local_irq_restore(flags);
+ break;
+ }
+ else
+@@ -552,9 +462,10 @@
+ D1(printk("e! %d\n", us));
+ }
+ }
+- local_irq_restore(flags);
+ }
+
++ local_irq_restore(flags);
++
+ if (!t)
+ {
+ D1(printk("ttrig stop!\n"));
+@@ -577,28 +488,17 @@
+ void schedule_usleep(unsigned long us)
+ {
+ struct fast_timer t;
+-#ifdef DECLARE_WAITQUEUE
+ wait_queue_head_t sleep_wait;
+ init_waitqueue_head(&sleep_wait);
+- {
+- DECLARE_WAITQUEUE(wait, current);
+-#else
+- struct wait_queue *sleep_wait = NULL;
+- struct wait_queue wait = { current, NULL };
+-#endif
+
+ D1(printk("schedule_usleep(%d)\n", us));
+- add_wait_queue(&sleep_wait, &wait);
+- set_current_state(TASK_INTERRUPTIBLE);
+ start_one_shot_timer(&t, wake_up_func, (unsigned long)&sleep_wait, us,
+ "usleep");
+- schedule();
+- set_current_state(TASK_RUNNING);
+- remove_wait_queue(&sleep_wait, &wait);
++ /* Uninterruptible sleep on the fast timer. (The condition is somewhat
++ redundant since the timer is what wakes us up.) */
++ wait_event(sleep_wait, !fast_timer_pending(&t));
++
+ D1(printk("done schedule_usleep(%d)\n", us));
+-#ifdef DECLARE_WAITQUEUE
+- }
+-#endif
+ }
+
+ #ifdef CONFIG_PROC_FS
+@@ -638,7 +538,7 @@
+ unsigned long flags;
+ int i = 0;
+ int num_to_show;
+- struct timeval tv;
++ struct fasttime_t tv;
+ struct fast_timer *t, *nextt;
+ static char *bigbuf = NULL;
+ static unsigned long used;
+@@ -646,7 +546,8 @@
+ if (!bigbuf && !(bigbuf = vmalloc(BIG_BUF_SIZE)))
+ {
+ used = 0;
+- bigbuf[0] = '\0';
++ if (buf)
++ buf[0] = '\0';
+ return 0;
+ }
+
+@@ -668,7 +569,7 @@
+ used += sprintf(bigbuf + used, "Fast timer running: %s\n",
+ fast_timer_running ? "yes" : "no");
+ used += sprintf(bigbuf + used, "Current time: %lu.%06lu\n",
+- (unsigned long)tv.tv_sec,
++ (unsigned long)tv.tv_jiff,
+ (unsigned long)tv.tv_usec);
+ #ifdef FAST_TIMER_SANITY_CHECKS
+ used += sprintf(bigbuf + used, "Sanity failed: %i\n",
+@@ -717,9 +618,9 @@
+ "d: %6li us data: 0x%08lX"
+ "\n",
+ t->name,
+- (unsigned long)t->tv_set.tv_sec,
++ (unsigned long)t->tv_set.tv_jiff,
+ (unsigned long)t->tv_set.tv_usec,
+- (unsigned long)t->tv_expires.tv_sec,
++ (unsigned long)t->tv_expires.tv_jiff,
+ (unsigned long)t->tv_expires.tv_usec,
+ t->delay_us,
+ t->data
+@@ -739,9 +640,9 @@
+ "d: %6li us data: 0x%08lX"
+ "\n",
+ t->name,
+- (unsigned long)t->tv_set.tv_sec,
++ (unsigned long)t->tv_set.tv_jiff,
+ (unsigned long)t->tv_set.tv_usec,
+- (unsigned long)t->tv_expires.tv_sec,
++ (unsigned long)t->tv_expires.tv_jiff,
+ (unsigned long)t->tv_expires.tv_usec,
+ t->delay_us,
+ t->data
+@@ -759,9 +660,9 @@
+ "d: %6li us data: 0x%08lX"
+ "\n",
+ t->name,
+- (unsigned long)t->tv_set.tv_sec,
++ (unsigned long)t->tv_set.tv_jiff,
+ (unsigned long)t->tv_set.tv_usec,
+- (unsigned long)t->tv_expires.tv_sec,
++ (unsigned long)t->tv_expires.tv_jiff,
+ (unsigned long)t->tv_expires.tv_usec,
+ t->delay_us,
+ t->data
+@@ -772,7 +673,6 @@
+
+ used += sprintf(bigbuf + used, "Active timers:\n");
+ local_irq_save(flags);
+- local_irq_save(flags);
+ t = fast_timer_list;
+ while (t != NULL && (used+100 < BIG_BUF_SIZE))
+ {
+@@ -783,15 +683,15 @@
+ /* " func: 0x%08lX" */
+ "\n",
+ t->name,
+- (unsigned long)t->tv_set.tv_sec,
++ (unsigned long)t->tv_set.tv_jiff,
+ (unsigned long)t->tv_set.tv_usec,
+- (unsigned long)t->tv_expires.tv_sec,
++ (unsigned long)t->tv_expires.tv_jiff,
+ (unsigned long)t->tv_expires.tv_usec,
+ t->delay_us,
+ t->data
+ /* , t->function */
+ );
+- local_irq_disable();
++ local_irq_save(flags);
+ if (t->next != nextt)
+ {
+ printk("timer removed!\n");
+@@ -822,7 +722,7 @@
+ static struct fast_timer tr[10];
+ static int exp_num[10];
+
+-static struct timeval tv_exp[100];
++static struct fasttime_t tv_exp[100];
+
+ static void test_timeout(unsigned long data)
+ {
+@@ -860,7 +760,7 @@
+ int prev_num;
+ int j;
+
+- struct timeval tv, tv0, tv1, tv2;
++ struct fasttime_t tv, tv0, tv1, tv2;
+
+ printk("fast_timer_test() start\n");
+ do_gettimeofday_fast(&tv);
+@@ -873,7 +773,7 @@
+ {
+ do_gettimeofday_fast(&tv_exp[j]);
+ }
+- printk("fast_timer_test() %is %06i\n", tv.tv_sec, tv.tv_usec);
++ printk("fast_timer_test() %is %06i\n", tv.tv_jiff, tv.tv_usec);
+
+ for (j = 0; j < 1000; j++)
+ {
+@@ -883,11 +783,11 @@
+ for (j = 0; j < 100; j++)
+ {
+ printk("%i.%i %i.%i %i.%i %i.%i %i.%i\n",
+- tv_exp[j].tv_sec,tv_exp[j].tv_usec,
+- tv_exp[j+1].tv_sec,tv_exp[j+1].tv_usec,
+- tv_exp[j+2].tv_sec,tv_exp[j+2].tv_usec,
+- tv_exp[j+3].tv_sec,tv_exp[j+3].tv_usec,
+- tv_exp[j+4].tv_sec,tv_exp[j+4].tv_usec);
++ tv_exp[j].tv_jiff,tv_exp[j].tv_usec,
++ tv_exp[j+1].tv_jiff,tv_exp[j+1].tv_usec,
++ tv_exp[j+2].tv_jiff,tv_exp[j+2].tv_usec,
++ tv_exp[j+3].tv_jiff,tv_exp[j+3].tv_usec,
++ tv_exp[j+4].tv_jiff,tv_exp[j+4].tv_usec);
+ j += 4;
+ }
+ do_gettimeofday_fast(&tv0);
+@@ -919,9 +819,9 @@
+ }
+ }
+ do_gettimeofday_fast(&tv2);
+- printk("Timers started %is %06i\n", tv0.tv_sec, tv0.tv_usec);
+- printk("Timers started at %is %06i\n", tv1.tv_sec, tv1.tv_usec);
+- printk("Timers done %is %06i\n", tv2.tv_sec, tv2.tv_usec);
++ printk("Timers started %is %06i\n", tv0.tv_jiff, tv0.tv_usec);
++ printk("Timers started at %is %06i\n", tv1.tv_jiff, tv1.tv_usec);
++ printk("Timers done %is %06i\n", tv2.tv_jiff, tv2.tv_usec);
+ DP(printk("buf0:\n");
+ printk(buf0);
+ printk("buf1:\n");
+@@ -943,9 +843,9 @@
+ printk("%-10s set: %6is %06ius exp: %6is %06ius "
+ "data: 0x%08X func: 0x%08X\n",
+ t->name,
+- t->tv_set.tv_sec,
++ t->tv_set.tv_jiff,
+ t->tv_set.tv_usec,
+- t->tv_expires.tv_sec,
++ t->tv_expires.tv_jiff,
+ t->tv_expires.tv_usec,
+ t->data,
+ t->function
+@@ -953,10 +853,10 @@
+
+ printk(" del: %6ius did exp: %6is %06ius as #%i error: %6li\n",
+ t->delay_us,
+- tv_exp[j].tv_sec,
++ tv_exp[j].tv_jiff,
+ tv_exp[j].tv_usec,
+ exp_num[j],
+- (tv_exp[j].tv_sec - t->tv_expires.tv_sec)*1000000 + tv_exp[j].tv_usec - t->tv_expires.tv_usec);
++ (tv_exp[j].tv_jiff - t->tv_expires.tv_jiff)*1000000 + tv_exp[j].tv_usec - t->tv_expires.tv_usec);
+ }
+ proc_fasttimer_read(buf5, NULL, 0, 0, 0);
+ printk("buf5 after all done:\n");
+@@ -966,7 +866,7 @@
+ #endif
+
+
+-void fast_timer_init(void)
++int fast_timer_init(void)
+ {
+ /* For some reason, request_irq() hangs when called froom time_init() */
+ if (!fast_timer_is_init)
+@@ -981,10 +881,10 @@
+ proc_register_dynamic(&proc_root, &fasttimer_proc_entry);
+ #endif
+ #endif /* PROC_FS */
+- if(request_irq(TIMER_INTR_VECT, timer_trig_interrupt, IRQF_DISABLED,
+- "fast timer int", NULL))
++ if(request_irq(TIMER_INTR_VECT, timer_trig_interrupt, SA_SHIRQ | SA_INTERRUPT,
++ "fast timer int", &fast_timer_list))
+ {
+- printk("err: timer1 irq\n");
++ printk("err: fasttimer irq\n");
+ }
+ fast_timer_is_init = 1;
+ #ifdef FAST_TIMER_TEST
+@@ -992,4 +892,6 @@
+ fast_timer_test();
+ #endif
+ }
++ return 0;
+ }
++__initcall(fast_timer_init);
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/head.S linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/head.S
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/head.S 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/head.S 2007-01-09 10:29:19.000000000 +0100
+@@ -4,7 +4,6 @@
+ * Copyright (C) 2003, Axis Communications AB
+ */
+
+-
+ #define ASSEMBLER_MACROS_ONLY
+
+ /*
+@@ -12,14 +11,21 @@
+ * -traditional must not be used when assembling this file.
+ */
+ #include <asm/arch/hwregs/reg_rdwr.h>
++#include <asm/arch/memmap.h>
++#include <asm/arch/hwregs/intr_vect.h>
+ #include <asm/arch/hwregs/asm/mmu_defs_asm.h>
+ #include <asm/arch/hwregs/asm/reg_map_asm.h>
+ #include <asm/arch/hwregs/asm/config_defs_asm.h>
+ #include <asm/arch/hwregs/asm/bif_core_defs_asm.h>
+-
++#include <asm/arch/hwregs/asm/pinmux_defs_asm.h>
++#include <asm/arch/hwregs/asm/gio_defs_asm.h>
++
+ #define CRAMFS_MAGIC 0x28cd3d45
++#define JHEAD_MAGIC 0x1FF528A6
++#define JHEAD_SIZE 8
+ #define RAM_INIT_MAGIC 0x56902387
+-#define COMMAND_LINE_MAGIC 0x87109563
++#define COMMAND_LINE_MAGIC 0x87109563
++#define NAND_BOOT_MAGIC 0x9a9db001
+
+ ;; NOTE: R8 and R9 carry information from the decompressor (if the
+ ;; kernel was compressed). They must not be used in the code below
+@@ -30,11 +36,10 @@
+ .global romfs_start
+ .global romfs_length
+ .global romfs_in_flash
++ .global nand_boot
+ .global swapper_pg_dir
+- .global crisv32_nand_boot
+- .global crisv32_nand_cramfs_offset
+
+- ;; Dummy section to make it bootable with current VCS simulator
++ ;; Dummy section to make it bootable with current VCS simulator
+ #ifdef CONFIG_ETRAXFS_SIM
+ .section ".boot", "ax"
+ ba tstart
+@@ -42,13 +47,13 @@
+ #endif
+
+ .text
+-tstart:
++tstart:
+ ;; This is the entry point of the kernel. The CPU is currently in
+ ;; supervisor mode.
+- ;;
++ ;;
+ ;; 0x00000000 if flash.
+ ;; 0x40004000 if DRAM.
+- ;;
++ ;;
+ di
+
+ ;; Start clocks for used blocks.
+@@ -72,20 +77,25 @@
+ move.d REG_ADDR(bif_core, regi_bif_core, rw_grp4_cfg), $r0
+ move.d CONFIG_ETRAX_MEM_GRP4_CONFIG, $r1
+ move.d $r1, [$r0]
+-
+-#ifdef CONFIG_ETRAXFS_SIM
++
++#ifdef CONFIG_ETRAXFS_SIM
+ ;; Set up minimal flash waitstates
+ move.d 0, $r10
+ move.d REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg), $r11
+ move.d $r10, [$r11]
+-#endif
++#endif
+
++#ifdef CONFIG_SMP
++secondary_cpu_entry: /* Entry point for secondary CPUs */
++ di
++#endif
++
+ ;; Setup and enable the MMU. Use same configuration for both the data
+ ;; and the instruction MMU.
+ ;;
+ ;; Note; 3 cycles is needed for a bank-select to take effect. Further;
+ ;; bank 1 is the instruction MMU, bank 2 is the data MMU.
+-#ifndef CONFIG_ETRAXFS_SIM
++#ifndef CONFIG_ETRAXFS_SIM
+ move.d REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8) \
+ | REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4) \
+ | REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
+@@ -96,7 +106,7 @@
+ | REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 0) \
+ | REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb) \
+ | REG_FIELD(mmu, rw_mm_kbase_hi, base_a, 0xa), $r0
+-#endif
++#endif
+
+ ;; Temporary map of 0x40 -> 0x40 and 0x00 -> 0x00.
+ move.d REG_FIELD(mmu, rw_mm_kbase_lo, base_4, 4) \
+@@ -146,8 +156,8 @@
+ | REG_STATE(mmu, rw_mm_cfg, seg_2, page) \
+ | REG_STATE(mmu, rw_mm_cfg, seg_1, page) \
+ | REG_STATE(mmu, rw_mm_cfg, seg_0, linear), $r2
+-#endif
+-
++#endif
++
+ ;; Update instruction MMU.
+ move 1, $srs
+ nop
+@@ -165,7 +175,7 @@
+ move $r0, $s2 ; kbase_hi.
+ move $r1, $s1 ; kbase_lo
+ move $r2, $s0 ; mm_cfg, virtual memory configuration.
+-
++
+ ;; Enable data and instruction MMU.
+ move 0, $srs
+ moveq 0xf, $r0 ; IMMU, DMMU, DCache, Icache on
+@@ -183,17 +193,11 @@
+ nop
+ nop
+ nop
+- move $s10, $r0
++ move $s12, $r0
+ cmpq 0, $r0
+ beq master_cpu
+ nop
+ slave_cpu:
+- ; A slave waits for cpu_now_booting to be equal to CPU ID.
+- move.d cpu_now_booting, $r1
+-slave_wait:
+- cmp.d [$r1], $r0
+- bne slave_wait
+- nop
+ ; Time to boot-up. Get stack location provided by master CPU.
+ move.d smp_init_current_idle_thread, $r1
+ move.d [$r1], $sp
+@@ -203,9 +207,16 @@
+ jsr smp_callin
+ nop
+ master_cpu:
+-#endif
++ /* Set up entry point for secondary CPUs. The boot ROM has set up
++ * EBP at start of internal memory. The CPU will get there
++ * later when we issue an IPI to them... */
++ move.d MEM_INTMEM_START + IPI_INTR_VECT * 4, $r0
++ move.d secondary_cpu_entry, $r1
++ move.d $r1, [$r0]
++#endif
+ #ifndef CONFIG_ETRAXFS_SIM
+- ;; Check if starting from DRAM or flash.
++ ; Check if starting from DRAM (network->RAM boot or unpacked
++ ; compressed kernel), or directly from flash.
+ lapcq ., $r0
+ and.d 0x7fffffff, $r0 ; Mask off the non-cache bit.
+ cmp.d 0x10000, $r0 ; Arbitrary, something above this code.
+@@ -238,6 +249,7 @@
+ ;; Copy the text and data section to DRAM. This depends on that the
+ ;; variables used below are correctly set up by the linker script.
+ ;; The calculated value stored in R4 is used below.
++ ;; Leave the cramfs file system (piggybacked after the kernel) in flash.
+ moveq 0, $r0 ; Source.
+ move.d text_start, $r1 ; Destination.
+ move.d __vmlinux_end, $r2
+@@ -249,7 +261,7 @@
+ blo 1b
+ nop
+
+- ;; Keep CRAMFS in flash.
++ ;; Check for cramfs.
+ moveq 0, $r0
+ move.d romfs_length, $r1
+ move.d $r0, [$r1]
+@@ -257,7 +269,8 @@
+ cmp.d CRAMFS_MAGIC, $r0
+ bne 1f
+ nop
+-
++
++ ;; Set length and start of cramfs, set romfs_in_flash flag
+ addoq +4, $r4, $acr
+ move.d [$acr], $r0
+ move.d romfs_length, $r1
+@@ -273,35 +286,32 @@
+ nop
+
+ _inram:
+- ;; Check if booting from NAND flash (in that case we just remember the offset
+- ;; into the flash where cramfs should be).
+- move.d REG_ADDR(config, regi_config, r_bootsel), $r0
+- move.d [$r0], $r0
+- and.d REG_MASK(config, r_bootsel, boot_mode), $r0
+- cmp.d REG_STATE(config, r_bootsel, boot_mode, nand), $r0
+- bne move_cramfs
+- moveq 1,$r0
+- move.d crisv32_nand_boot, $r1
+- move.d $r0, [$r1]
+- move.d crisv32_nand_cramfs_offset, $r1
+- move.d $r9, [$r1]
++ ;; Check if booting from NAND flash; if so, set appropriate flags
++ ;; and move on.
++ cmp.d NAND_BOOT_MAGIC, $r12
++ bne move_cramfs ; not nand, jump
+ moveq 1, $r0
+- move.d romfs_in_flash, $r1
++ move.d nand_boot, $r1 ; tell axisflashmap we're booting from NAND
++ move.d $r0, [$r1]
++ moveq 0, $r0 ; tell axisflashmap romfs is not in
++ move.d romfs_in_flash, $r1 ; (directly accessed) flash
+ move.d $r0, [$r1]
+- jump _start_it
++ jump _start_it ; continue with boot
+ nop
+
+-move_cramfs:
+- ;; Move the cramfs after BSS.
++move_cramfs:
++ ;; kernel is in DRAM.
++ ;; Must figure out if there is a piggybacked rootfs image or not.
++ ;; Set romfs_length to 0 => no rootfs image available by default.
+ moveq 0, $r0
+ move.d romfs_length, $r1
+ move.d $r0, [$r1]
+
+-#ifndef CONFIG_ETRAXFS_SIM
++#ifndef CONFIG_ETRAXFS_SIM
+ ;; The kernel could have been unpacked to DRAM by the loader, but
+- ;; the cramfs image could still be inte the flash immediately
+- ;; following the compressed kernel image. The loaded passes the address
+- ;; of the bute succeeding the last compressed byte in the flash in
++ ;; the cramfs image could still be in the flash immediately
++ ;; following the compressed kernel image. The loader passes the address
++ ;; of the byte succeeding the last compressed byte in the flash in
+ ;; register R9 when starting the kernel.
+ cmp.d 0x0ffffff8, $r9
+ bhs _no_romfs_in_flash ; R9 points outside the flash area.
+@@ -309,12 +319,14 @@
+ #else
+ ba _no_romfs_in_flash
+ nop
+-#endif
++#endif
++ ;; cramfs rootfs might to be in flash. Check for it.
+ move.d [$r9], $r0 ; cramfs_super.magic
+ cmp.d CRAMFS_MAGIC, $r0
+ bne _no_romfs_in_flash
+ nop
+
++ ;; found cramfs in flash. set address and size, and romfs_in_flash flag.
+ addoq +4, $r9, $acr
+ move.d [$acr], $r0
+ move.d romfs_length, $r1
+@@ -330,29 +342,45 @@
+ nop
+
+ _no_romfs_in_flash:
+- ;; Look for cramfs.
+-#ifndef CONFIG_ETRAXFS_SIM
++ ;; No romfs in flash, so look for cramfs, or jffs2 with jhead,
++ ;; after kernel in RAM, as is the case with network->RAM boot.
++ ;; For cramfs, partition starts with magic and length.
++ ;; For jffs2, a jhead is prepended which contains with magic and length.
++ ;; The jhead is not part of the jffs2 partition however.
++#ifndef CONFIG_ETRAXFS_SIM
+ move.d __vmlinux_end, $r0
+ #else
+- move.d __end, $r0
+-#endif
++ move.d __end, $r0
++#endif
+ move.d [$r0], $r1
+- cmp.d CRAMFS_MAGIC, $r1
+- bne 2f
++ cmp.d CRAMFS_MAGIC, $r1 ; cramfs magic?
++ beq 2f ; yes, jump
++ nop
++ cmp.d JHEAD_MAGIC, $r1 ; jffs2 (jhead) magic?
++ bne 4f ; no, skip copy
++ nop
++ addq 4, $r0 ; location of jffs2 size
++ move.d [$r0+], $r2 ; fetch jffs2 size -> r2
++ ; r0 now points to start of jffs2
++ ba 3f
+ nop
++2:
++ addoq +4, $r0, $acr ; location of cramfs size
++ move.d [$acr], $r2 ; fetch cramfs size -> r2
++ ; r0 still points to start of cramfs
++3:
++ ;; Now, move the root fs to after kernel's BSS
+
+- addoq +4, $r0, $acr
+- move.d [$acr], $r2
+- move.d _end, $r1
++ move.d _end, $r1 ; start of cramfs -> r1
+ move.d romfs_start, $r3
+- move.d $r1, [$r3]
++ move.d $r1, [$r3] ; store at romfs_start (for axisflashmap)
+ move.d romfs_length, $r3
+- move.d $r2, [$r3]
++ move.d $r2, [$r3] ; store size at romfs_length
+
+-#ifndef CONFIG_ETRAXFS_SIM
+- add.d $r2, $r0
++#ifndef CONFIG_ETRAXFS_SIM
++ add.d $r2, $r0 ; copy from end and downwards
+ add.d $r2, $r1
+-
++
+ lsrq 1, $r2 ; Size is in bytes, we copy words.
+ addq 1, $r2
+ 1:
+@@ -364,17 +392,24 @@
+ bne 1b
+ nop
+ #endif
+-
+-2:
++
++4:
++ ;; BSS move done.
++ ;; Clear romfs_in_flash flag, as we now know romfs is in DRAM
++ ;; Also clear nand_boot flag; if we got here, we know we've not
++ ;; booted from NAND flash.
+ moveq 0, $r0
+ move.d romfs_in_flash, $r1
+ move.d $r0, [$r1]
++ moveq 0, $r0
++ move.d nand_boot, $r1
++ move.d $r0, [$r1]
+
+ jump _start_it ; Jump to cached code.
+ nop
+-
++
+ _start_it:
+-
++
+ ;; Check if kernel command line is supplied
+ cmp.d COMMAND_LINE_MAGIC, $r10
+ bne no_command_line
+@@ -383,9 +418,9 @@
+ move.d 256, $r13
+ move.d cris_command_line, $r10
+ or.d 0x80000000, $r11 ; Make it virtual
+-1:
+- move.b [$r11+], $r12
+- move.b $r12, [$r10+]
++1:
++ move.b [$r11+], $r1
++ move.b $r1, [$r10+]
+ subq 1, $r13
+ bne 1b
+ nop
+@@ -401,7 +436,7 @@
+ move.d etrax_irv, $r1 ; Set the exception base register and pointer.
+ move.d $r0, [$r1]
+
+-#ifndef CONFIG_ETRAXFS_SIM
++#ifndef CONFIG_ETRAXFS_SIM
+ ;; Clear the BSS region from _bss_start to _end.
+ move.d __bss_start, $r0
+ move.d _end, $r1
+@@ -429,17 +464,31 @@
+ .data
+ etrax_irv:
+ .dword 0
++
++; Variables for communication with the Axis flash map driver (axisflashmap),
++; and for setting up memory in arch/cris/kernel/setup.c .
++
++; romfs_start is set to the start of the root file system, if it exists
++; in directly accessible memory (i.e. NOR Flash when booting from Flash,
++; or RAM when booting directly from a network-downloaded RAM image)
+ romfs_start:
+ .dword 0
++
++; romfs_length is set to the size of the root file system image, if it exists
++; in directly accessible memory (see romfs_start). Otherwise it is set to 0.
+ romfs_length:
+ .dword 0
++
++; romfs_in_flash is set to 1 if the root file system resides in directly
++; accessible flash memory (i.e. NOR flash). It is set to 0 for RAM boot
++; or NAND flash boot.
+ romfs_in_flash:
+ .dword 0
+-crisv32_nand_boot:
+- .dword 0
+-crisv32_nand_cramfs_offset:
+- .dword 0
+
++; nand_boot is set to 1 when the kernel has been booted from NAND flash
++nand_boot:
++ .dword 0
++
+ swapper_pg_dir = 0xc0002000
+
+ .section ".init.data", "aw"
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/io.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/io.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/io.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/io.c 2006-11-21 00:04:55.000000000 +0100
+@@ -1,7 +1,7 @@
+-/*
++/*
+ * Helper functions for I/O pins.
+ *
+- * Copyright (c) 2004 Axis Communications AB.
++ * Copyright (c) 2004, 2006 Axis Communications AB.
+ */
+
+ #include <linux/types.h>
+@@ -15,6 +15,10 @@
+ #include <asm/arch/pinmux.h>
+ #include <asm/arch/hwregs/gio_defs.h>
+
++#ifndef DEBUG
++#define DEBUG(x)
++#endif
++
+ struct crisv32_ioport crisv32_ioports[] =
+ {
+ {
+@@ -46,13 +50,15 @@
+ (unsigned long*)REG_ADDR(gio, regi_gio, rw_pe_dout),
+ (unsigned long*)REG_ADDR(gio, regi_gio, r_pe_din),
+ 18
+- }
++ }
+ };
+
+ #define NBR_OF_PORTS sizeof(crisv32_ioports)/sizeof(struct crisv32_ioport)
+
+-struct crisv32_iopin crisv32_led1_green;
+-struct crisv32_iopin crisv32_led1_red;
++struct crisv32_iopin crisv32_led_net0_green;
++struct crisv32_iopin crisv32_led_net0_red;
++struct crisv32_iopin crisv32_led_net1_green;
++struct crisv32_iopin crisv32_led_net1_red;
+ struct crisv32_iopin crisv32_led2_green;
+ struct crisv32_iopin crisv32_led2_red;
+ struct crisv32_iopin crisv32_led3_green;
+@@ -76,34 +82,54 @@
+ static int __init crisv32_io_init(void)
+ {
+ int ret = 0;
++
++ u32 i;
++
++ /* Locks *should* be dynamically initialized. */
++ for (i = 0; i < ARRAY_SIZE(crisv32_ioports); i++)
++ spin_lock_init (&crisv32_ioports[i].lock);
++ spin_lock_init (&dummy_port.lock);
++
+ /* Initialize LEDs */
+- ret += crisv32_io_get_name(&crisv32_led1_green, CONFIG_ETRAX_LED1G);
+- ret += crisv32_io_get_name(&crisv32_led1_red, CONFIG_ETRAX_LED1R);
++#if (defined(CONFIG_ETRAX_NBR_LED_GRP_ONE) || defined(CONFIG_ETRAX_NBR_LED_GRP_TWO))
++ ret += crisv32_io_get_name(&crisv32_led_net0_green, CONFIG_ETRAX_LED_G_NET0);
++ crisv32_io_set_dir(&crisv32_led_net0_green, crisv32_io_dir_out);
++ if (strcmp(CONFIG_ETRAX_LED_G_NET0, CONFIG_ETRAX_LED_R_NET0)) {
++ ret += crisv32_io_get_name(&crisv32_led_net0_red, CONFIG_ETRAX_LED_R_NET0);
++ crisv32_io_set_dir(&crisv32_led_net0_red, crisv32_io_dir_out);
++ } else
++ crisv32_led_net0_red = dummy_led;
++#endif
++
++#ifdef CONFIG_ETRAX_NBR_LED_GRP_TWO
++ ret += crisv32_io_get_name(&crisv32_led_net1_green, CONFIG_ETRAX_LED_G_NET1);
++ crisv32_io_set_dir(&crisv32_led_net1_green, crisv32_io_dir_out);
++ if (strcmp(CONFIG_ETRAX_LED_G_NET1, CONFIG_ETRAX_LED_R_NET1)) {
++ crisv32_io_get_name(&crisv32_led_net1_red, CONFIG_ETRAX_LED_R_NET1);
++ crisv32_io_set_dir(&crisv32_led_net1_red, crisv32_io_dir_out);
++ } else
++ crisv32_led_net1_red = dummy_led;
++#endif
++
+ ret += crisv32_io_get_name(&crisv32_led2_green, CONFIG_ETRAX_LED2G);
+ ret += crisv32_io_get_name(&crisv32_led2_red, CONFIG_ETRAX_LED2R);
+ ret += crisv32_io_get_name(&crisv32_led3_green, CONFIG_ETRAX_LED3G);
+ ret += crisv32_io_get_name(&crisv32_led3_red, CONFIG_ETRAX_LED3R);
+- crisv32_io_set_dir(&crisv32_led1_green, crisv32_io_dir_out);
+- crisv32_io_set_dir(&crisv32_led1_red, crisv32_io_dir_out);
++
+ crisv32_io_set_dir(&crisv32_led2_green, crisv32_io_dir_out);
+ crisv32_io_set_dir(&crisv32_led2_red, crisv32_io_dir_out);
+ crisv32_io_set_dir(&crisv32_led3_green, crisv32_io_dir_out);
+ crisv32_io_set_dir(&crisv32_led3_red, crisv32_io_dir_out);
+
+- if (!strcmp(CONFIG_ETRAX_LED1G, CONFIG_ETRAX_LED1R))
+- crisv32_led1_red = dummy_led;
+- if (!strcmp(CONFIG_ETRAX_LED2G, CONFIG_ETRAX_LED2R))
+- crisv32_led2_red = dummy_led;
+-
+ return ret;
+ }
+
+ __initcall(crisv32_io_init);
+
+-int crisv32_io_get(struct crisv32_iopin* iopin,
++int crisv32_io_get(struct crisv32_iopin* iopin,
+ unsigned int port, unsigned int pin)
+ {
+- if (port > NBR_OF_PORTS)
++ if (port > NBR_OF_PORTS)
+ return -EINVAL;
+ if (port > crisv32_ioports[port].pin_count)
+ return -EINVAL;
+@@ -111,14 +137,17 @@
+ iopin->bit = 1 << pin;
+ iopin->port = &crisv32_ioports[port];
+
+- if (crisv32_pinmux_alloc(port, pin, pin, pinmux_gpio))
++ /* Only allocate pinmux gpiopins if port != PORT_A (port 0) */
++ /* NOTE! crisv32_pinmux_alloc thinks PORT_B is port 0 */
++ if (port != 0 && crisv32_pinmux_alloc(port-1, pin, pin, pinmux_gpio))
+ return -EIO;
+-
++ DEBUG(printk("crisv32_io_get: Allocated pin %d on port %d\n", pin, port ));
++
+ return 0;
+ }
+
+ int crisv32_io_get_name(struct crisv32_iopin* iopin,
+- char* name)
++ const char* name)
+ {
+ int port;
+ int pin;
+@@ -128,7 +157,7 @@
+
+ if (toupper(*name) < 'A' || toupper(*name) > 'E')
+ return -EINVAL;
+-
++
+ port = toupper(*name) - 'A';
+ name++;
+ pin = simple_strtoul(name, NULL, 10);
+@@ -139,9 +168,12 @@
+ iopin->bit = 1 << pin;
+ iopin->port = &crisv32_ioports[port];
+
+- if (crisv32_pinmux_alloc(port, pin, pin, pinmux_gpio))
++ /* Only allocate pinmux gpiopins if port != PORT_A (port 0) */
++ /* NOTE! crisv32_pinmux_alloc thinks PORT_B is port 0 */
++ if (port != 0 && crisv32_pinmux_alloc(port-1, pin, pin, pinmux_gpio))
+ return -EIO;
+
++ DEBUG(printk("crisv32_io_get_name: Allocated pin %d on port %d\n", pin, port));
+ return 0;
+ }
+
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/irq.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/irq.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/irq.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/irq.c 2006-10-13 14:43:13.000000000 +0200
+@@ -44,10 +44,10 @@
+ cpumask_t mask; /* The CPUs to which the IRQ may be allocated. */
+ };
+
+-struct cris_irq_allocation irq_allocations[NR_IRQS] =
++struct cris_irq_allocation irq_allocations[NR_IRQS] =
+ {[0 ... NR_IRQS - 1] = {0, CPU_MASK_ALL}};
+
+-static unsigned long irq_regs[NR_CPUS] =
++static unsigned long irq_regs[NR_CPUS] =
+ {
+ regi_irq,
+ #ifdef CONFIG_SMP
+@@ -79,9 +79,9 @@
+ extern void kgdb_init(void);
+ extern void breakpoint(void);
+
+-/*
+- * Build the IRQ handler stubs using macros from irq.h. First argument is the
+- * IRQ number, the second argument is the corresponding bit in
++/*
++ * Build the IRQ handler stubs using macros from irq.h. First argument is the
++ * IRQ number, the second argument is the corresponding bit in
+ * intr_rw_vect_mask found in asm/arch/hwregs/intr_vect_defs.h.
+ */
+ BUILD_IRQ(0x31, (1 << 0)) /* memarb */
+@@ -139,7 +139,7 @@
+
+ spin_lock_irqsave(&irq_lock, flags);
+ intr_mask = REG_RD_INT(intr_vect, irq_regs[cpu], rw_mask);
+-
++
+ /* Remember; 1 let thru, 0 block. */
+ intr_mask &= ~(1 << (irq - FIRST_IRQ));
+
+@@ -152,10 +152,10 @@
+ {
+ int intr_mask;
+ unsigned long flags;
+-
++
+ spin_lock_irqsave(&irq_lock, flags);
+ intr_mask = REG_RD_INT(intr_vect, irq_regs[cpu], rw_mask);
+-
++
+ /* Remember; 1 let thru, 0 block. */
+ intr_mask |= (1 << (irq - FIRST_IRQ));
+
+@@ -168,7 +168,7 @@
+ {
+ int cpu;
+ unsigned long flags;
+-
++
+ spin_lock_irqsave(&irq_lock, flags);
+ cpu = irq_allocations[irq - FIRST_IRQ].cpu;
+
+@@ -178,12 +178,12 @@
+ spin_unlock_irqrestore(&irq_lock, flags);
+ return smp_processor_id();
+ }
+-
++
+
+ /* Let the interrupt stay if possible */
+ if (cpu_isset(cpu, irq_allocations[irq - FIRST_IRQ].mask))
+ goto out;
+-
++
+ /* IRQ must be moved to another CPU. */
+ cpu = first_cpu(irq_allocations[irq - FIRST_IRQ].mask);
+ irq_allocations[irq - FIRST_IRQ].cpu = cpu;
+@@ -287,7 +287,7 @@
+ * interrupt from the CPU and software has to sort out which
+ * interrupts that happened. There are two special cases here:
+ *
+- * 1. Timer interrupts may never be blocked because of the
++ * 1. Timer interrupts may never be blocked because of the
+ * watchdog (refer to comment in include/asr/arch/irq.h)
+ * 2. GDB serial port IRQs are unhandled here and will be handled
+ * as a single IRQ when it strikes again because the GDB
+@@ -304,33 +304,33 @@
+ cpu = smp_processor_id();
+
+ /* An extra irq_enter here to prevent softIRQs to run after
+- * each do_IRQ. This will decrease the interrupt latency.
++ * each do_IRQ. This will decrease the interrupt latency.
+ */
+ irq_enter();
+
+ /* Get which IRQs that happend. */
+ masked = REG_RD_INT(intr_vect, irq_regs[cpu], r_masked_vect);
+-
++
+ /* Calculate new IRQ mask with these IRQs disabled. */
+ mask = REG_RD_INT(intr_vect, irq_regs[cpu], rw_mask);
+ mask &= ~masked;
+
+ /* Timer IRQ is never masked */
+ if (masked & TIMER_MASK)
+- mask |= TIMER_MASK;
++ mask |= TIMER_MASK;
+
+ /* Block all the IRQs */
+ REG_WR_INT(intr_vect, irq_regs[cpu], rw_mask, mask);
+-
++
+ /* Check for timer IRQ and handle it special. */
+ if (masked & TIMER_MASK) {
+ masked &= ~TIMER_MASK;
+- do_IRQ(TIMER_INTR_VECT, regs);
++ do_IRQ(TIMER_INTR_VECT, regs);
+ }
+
+ #ifdef IGNORE_MASK
+ /* Remove IRQs that can't be handled as multiple. */
+- masked &= ~IGNORE_MASK;
++ masked &= ~IGNORE_MASK;
+ #endif
+
+ /* Handle the rest of the IRQs. */
+@@ -377,7 +377,7 @@
+ irq_desc[TIMER_INTR_VECT].status |= IRQ_PER_CPU;
+ irq_allocations[IPI_INTR_VECT - FIRST_IRQ].cpu = CPU_FIXED;
+ irq_desc[IPI_INTR_VECT].status |= IRQ_PER_CPU;
+-
++
+ set_exception_vector(0x00, nmi_interrupt);
+ set_exception_vector(0x30, multiple_interrupt);
+
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/kgdb.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/kgdb.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/kgdb.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/kgdb.c 2005-07-06 11:40:49.000000000 +0200
+@@ -25,7 +25,7 @@
+ * kgdb usage notes:
+ * -----------------
+ *
+- * If you select CONFIG_ETRAX_KGDB in the configuration, the kernel will be
++ * If you select CONFIG_ETRAX_KGDB in the configuration, the kernel will be
+ * built with different gcc flags: "-g" is added to get debug infos, and
+ * "-fomit-frame-pointer" is omitted to make debugging easier. Since the
+ * resulting kernel will be quite big (approx. > 7 MB), it will be stripped
+@@ -118,7 +118,7 @@
+ * call to kgdb_init() is necessary in order to allow any breakpoints
+ * or error conditions to be properly intercepted and reported to gdb.
+ * Two, a breakpoint needs to be generated to begin communication. This
+- * is most easily accomplished by a call to breakpoint().
++ * is most easily accomplished by a call to breakpoint().
+ *
+ * The following gdb commands are supported:
+ *
+@@ -382,8 +382,8 @@
+ int getDebugChar(void);
+
+ #ifdef CONFIG_ETRAXFS_SIM
+-int getDebugChar(void)
+-{
++int getDebugChar(void)
++{
+ return socketread();
+ }
+ #endif
+@@ -490,7 +490,7 @@
+
+ /********************************** Breakpoint *******************************/
+ /* Use an internal stack in the breakpoint and interrupt response routines.
+- FIXME: How do we know the size of this stack is enough?
++ FIXME: How do we know the size of this stack is enough?
+ Global so it can be reached from assembler code. */
+ #define INTERNAL_STACK_SIZE 1024
+ char internal_stack[INTERNAL_STACK_SIZE];
+@@ -511,7 +511,7 @@
+ gdb_cris_strcpy(char *s1, const char *s2)
+ {
+ char *s = s1;
+-
++
+ for (s = s1; (*s++ = *s2++) != '\0'; )
+ ;
+ return s1;
+@@ -522,7 +522,7 @@
+ gdb_cris_strlen(const char *s)
+ {
+ const char *sc;
+-
++
+ for (sc = s; *sc != '\0'; sc++)
+ ;
+ return (sc - s);
+@@ -534,7 +534,7 @@
+ {
+ const unsigned char uc = c;
+ const unsigned char *su;
+-
++
+ for (su = s; 0 < n; ++su, --n)
+ if (*su == uc)
+ return (void *)su;
+@@ -549,15 +549,15 @@
+ char *s1;
+ char *sd;
+ int x = 0;
+-
++
+ for (s1 = (char*)s; (sd = gdb_cris_memchr(hexchars, *s1, base)) != NULL; ++s1)
+ x = x * base + (sd - hexchars);
+-
++
+ if (endptr) {
+ /* Unconverted suffix is stored in endptr unless endptr is NULL. */
+ *endptr = s1;
+ }
+-
++
+ return x;
+ }
+
+@@ -629,7 +629,7 @@
+ } else if (regno == PID) {
+ /* 32-bit register. */
+ *valptr = *(unsigned int *)((char *)®.pid);
+-
++
+ } else if (regno == SRS) {
+ /* 8-bit register. */
+ *valptr = (unsigned int)(*(unsigned char *)((char *)®.srs));
+@@ -726,7 +726,7 @@
+ *buf++ = highhex (ch);
+ *buf++ = lowhex (ch);
+ }
+-
++
+ /* Terminate properly. */
+ *buf = '\0';
+ return buf;
+@@ -804,7 +804,7 @@
+ continue;
+
+ buffer[count] = 0;
+-
++
+ if (ch == '#') {
+ xmitcsum = hex(getDebugChar()) << 4;
+ xmitcsum += hex(getDebugChar());
+@@ -836,7 +836,7 @@
+ int checksum;
+ int runlen;
+ int encode;
+-
++
+ do {
+ char *src = buffer;
+ putDebugChar('$');
+@@ -905,42 +905,42 @@
+ {
+ char *ptr = output_buffer;
+ unsigned int reg_cont;
+-
++
+ /* Send trap type (converted to signal) */
+
+- *ptr++ = 'T';
++ *ptr++ = 'T';
+ *ptr++ = highhex(sigval);
+ *ptr++ = lowhex(sigval);
+
+ if (((reg.exs & 0xff00) >> 8) == 0xc) {
+-
++
+ /* Some kind of hardware watchpoint triggered. Find which one
+ and determine its type (read/write/access). */
+ int S, bp, trig_bits = 0, rw_bits = 0;
+ int trig_mask = 0;
+ unsigned int *bp_d_regs = &sreg.s3_3;
+ /* In a lot of cases, the stopped data address will simply be EDA.
+- In some cases, we adjust it to match the watched data range.
++ In some cases, we adjust it to match the watched data range.
+ (We don't want to change the actual EDA though). */
+ unsigned int stopped_data_address;
+ /* The S field of EXS. */
+ S = (reg.exs & 0xffff0000) >> 16;
+-
++
+ if (S & 1) {
+ /* Instruction watchpoint. */
+ /* FIXME: Check against, and possibly adjust reported EDA. */
+ } else {
+ /* Data watchpoint. Find the one that triggered. */
+ for (bp = 0; bp < 6; bp++) {
+-
++
+ /* Dx_RD, Dx_WR in the S field of EXS for this BP. */
+ int bitpos_trig = 1 + bp * 2;
+ /* Dx_BPRD, Dx_BPWR in BP_CTRL for this BP. */
+ int bitpos_config = 2 + bp * 4;
+-
++
+ /* Get read/write trig bits for this BP. */
+ trig_bits = (S & (3 << bitpos_trig)) >> bitpos_trig;
+-
++
+ /* Read/write config bits for this BP. */
+ rw_bits = (sreg.s0_3 & (3 << bitpos_config)) >> bitpos_config;
+ if (trig_bits) {
+@@ -949,11 +949,11 @@
+ if ((rw_bits == 0x1 && trig_bits != 0x1) ||
+ (rw_bits == 0x2 && trig_bits != 0x2))
+ panic("Invalid r/w trigging for this BP");
+-
++
+ /* Mark this BP as trigged for future reference. */
+ trig_mask |= (1 << bp);
+-
+- if (reg.eda >= bp_d_regs[bp * 2] &&
++
++ if (reg.eda >= bp_d_regs[bp * 2] &&
+ reg.eda <= bp_d_regs[bp * 2 + 1]) {
+ /* EDA withing range for this BP; it must be the one
+ we're looking for. */
+@@ -972,7 +972,7 @@
+
+ /* Read/write config bits for this BP (needed later). */
+ rw_bits = (sreg.s0_3 & (3 << bitpos_config)) >> bitpos_config;
+-
++
+ if (trig_mask & (1 << bp)) {
+ /* EDA within 31 bytes of the configured start address? */
+ if (reg.eda + 31 >= bp_d_regs[bp * 2]) {
+@@ -987,12 +987,12 @@
+ }
+ }
+ }
+-
++
+ /* No match yet? */
+ BUG_ON(bp >= 6);
+ /* Note that we report the type according to what the BP is configured
+ for (otherwise we'd never report an 'awatch'), not according to how
+- it trigged. We did check that the trigged bits match what the BP is
++ it trigged. We did check that the trigged bits match what the BP is
+ configured for though. */
+ if (rw_bits == 0x1) {
+ /* read */
+@@ -1110,12 +1110,12 @@
+
+ if (sigval == SIGTRAP) {
+ /* Break 8, single step or hardware breakpoint exception. */
+-
++
+ /* Check IDX field of EXS. */
+ if (((reg.exs & 0xff00) >> 8) == 0x18) {
+
+ /* Break 8. */
+-
++
+ /* Static (compiled) breakpoints must return to the next instruction
+ in order to avoid infinite loops (default value of ERP). Dynamic
+ (gdb-invoked) must subtract the size of the break instruction from
+@@ -1132,7 +1132,7 @@
+ reg.pc -= 2;
+ }
+ }
+-
++
+ } else if (((reg.exs & 0xff00) >> 8) == 0x3) {
+ /* Single step. */
+ /* Don't fiddle with S1. */
+@@ -1190,10 +1190,10 @@
+ unsigned int *bp_d_regs = &sreg.s3_3;
+
+ /* The watchpoint allocation scheme is the simplest possible.
+- For example, if a region is watched for read and
++ For example, if a region is watched for read and
+ a write watch is requested, a new watchpoint will
+ be used. Also, if a watch for a region that is already
+- covered by one or more existing watchpoints, a new
++ covered by one or more existing watchpoints, a new
+ watchpoint will be used. */
+
+ /* First, find a free data watchpoint. */
+@@ -1205,13 +1205,13 @@
+ break;
+ }
+ }
+-
++
+ if (bp > 5) {
+ /* We're out of watchpoints. */
+ gdb_cris_strcpy(output_buffer, error_message[E04]);
+ return;
+ }
+-
++
+ /* Configure the control register first. */
+ if (type == '3' || type == '4') {
+ /* Trigger on read. */
+@@ -1221,11 +1221,11 @@
+ /* Trigger on write. */
+ sreg.s0_3 |= (2 << (2 + bp * 4));
+ }
+-
++
+ /* Ugly pointer arithmetics to configure the watched range. */
+ bp_d_regs[bp * 2] = addr;
+ bp_d_regs[bp * 2 + 1] = (addr + len - 1);
+- }
++ }
+
+ /* Set the S1 flag to enable watchpoints. */
+ reg.ccs |= (1 << (S_CCS_BITNR + CCS_SHIFT));
+@@ -1258,7 +1258,7 @@
+ /* Not in use. */
+ gdb_cris_strcpy(output_buffer, error_message[E04]);
+ return;
+- }
++ }
+ /* Deconfigure. */
+ sreg.s1_3 = 0;
+ sreg.s2_3 = 0;
+@@ -1268,8 +1268,8 @@
+ unsigned int *bp_d_regs = &sreg.s3_3;
+ /* Try to find a watchpoint that is configured for the
+ specified range, then check that read/write also matches. */
+-
+- /* Ugly pointer arithmetic, since I cannot rely on a
++
++ /* Ugly pointer arithmetic, since I cannot rely on a
+ single switch (addr) as there may be several watchpoints with
+ the same start address for example. */
+
+@@ -1279,7 +1279,7 @@
+ /* Matching range. */
+ int bitpos = 2 + bp * 4;
+ int rw_bits;
+-
++
+ /* Read/write bits for this BP. */
+ rw_bits = (sreg.s0_3 & (0x3 << bitpos)) >> bitpos;
+
+@@ -1347,7 +1347,7 @@
+ (char *)&sreg + (reg.srs * 16 * sizeof(unsigned int)),
+ 16 * sizeof(unsigned int));
+ break;
+- }
++ }
+ case 'G':
+ /* Write registers. GXX..XX
+ Each byte of register data is described by two hex digits.
+@@ -1357,11 +1357,11 @@
+ hex2mem((char *)®, &input_buffer[1], sizeof(registers));
+ /* Support registers. */
+ hex2mem((char *)&sreg + (reg.srs * 16 * sizeof(unsigned int)),
+- &input_buffer[1] + sizeof(registers),
++ &input_buffer[1] + sizeof(registers),
+ 16 * sizeof(unsigned int));
+ gdb_cris_strcpy(output_buffer, "OK");
+ break;
+-
++
+ case 'P':
+ /* Write register. Pn...=r...
+ Write register n..., hex value without 0x, with value r...,
+@@ -1393,7 +1393,7 @@
+ }
+ }
+ break;
+-
++
+ case 'm':
+ /* Read from memory. mAA..AA,LLLL
+ AA..AA is the address and LLLL is the length.
+@@ -1416,7 +1416,7 @@
+ mem2hex(output_buffer, addr, len);
+ }
+ break;
+-
++
+ case 'X':
+ /* Write to memory. XAA..AA,LLLL:XX..XX
+ AA..AA is the start address, LLLL is the number of bytes, and
+@@ -1448,7 +1448,7 @@
+ }
+ }
+ break;
+-
++
+ case 'c':
+ /* Continue execution. cAA..AA
+ AA..AA is the address where execution is resumed. If AA..AA is
+@@ -1472,15 +1472,15 @@
+ if ((sreg.s0_3 & 0x3fff) == 0) {
+ reg.ccs &= ~(1 << (S_CCS_BITNR + CCS_SHIFT));
+ }
+-
++
+ return;
+-
++
+ case 's':
+ /* Step. sAA..AA
+ AA..AA is the address where execution is resumed. If AA..AA is
+ omitted, resume at the present address. Success: return to the
+ executing thread. Failure: will never know. */
+-
++
+ if (input_buffer[1] != '\0') {
+ /* FIXME: Doesn't handle address argument. */
+ gdb_cris_strcpy(output_buffer, error_message[E04]);
+@@ -1497,7 +1497,7 @@
+ return;
+
+ case 'Z':
+-
++
+ /* Insert breakpoint or watchpoint, Ztype,addr,length.
+ Remote protocol says: A remote target shall return an empty string
+ for an unrecognized breakpoint or watchpoint packet type. */
+@@ -1522,7 +1522,7 @@
+ int addr = gdb_cris_strtol(&input_buffer[3], &lenptr, 16);
+ int len = gdb_cris_strtol(lenptr + 1, &dataptr, 16);
+ char type = input_buffer[1];
+-
++
+ remove_watchpoint(type, addr, len);
+ break;
+ }
+@@ -1537,14 +1537,14 @@
+ output_buffer[2] = lowhex(sigval);
+ output_buffer[3] = 0;
+ break;
+-
++
+ case 'D':
+ /* Detach from host. D
+ Success: OK, and return to the executing thread.
+ Failure: will never know */
+ putpacket("OK");
+ return;
+-
++
+ case 'k':
+ case 'r':
+ /* kill request or reset request.
+@@ -1552,7 +1552,7 @@
+ Failure: will never know. */
+ kill_restart();
+ break;
+-
++
+ case 'C':
+ case 'S':
+ case '!':
+@@ -1570,7 +1570,7 @@
+ and ignored (below)? */
+ gdb_cris_strcpy(output_buffer, error_message[E04]);
+ break;
+-
++
+ default:
+ /* The stub should ignore other request and send an empty
+ response ($#<checksum>). This way we can extend the protocol and GDB
+@@ -1587,7 +1587,7 @@
+ {
+ reg_intr_vect_rw_mask intr_mask;
+ reg_ser_rw_intr_mask ser_intr_mask;
+-
++
+ /* Configure the kgdb serial port. */
+ #if defined(CONFIG_ETRAX_KGDB_PORT0)
+ /* Note: no shortcut registered (not handled by multiple_interrupt).
+@@ -1597,9 +1597,9 @@
+ intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
+ intr_mask.ser0 = 1;
+ REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
+-
++
+ ser_intr_mask = REG_RD(ser, regi_ser0, rw_intr_mask);
+- ser_intr_mask.data_avail = regk_ser_yes;
++ ser_intr_mask.dav = regk_ser_yes;
+ REG_WR(ser, regi_ser0, rw_intr_mask, ser_intr_mask);
+ #elif defined(CONFIG_ETRAX_KGDB_PORT1)
+ /* Note: no shortcut registered (not handled by multiple_interrupt).
+@@ -1609,9 +1609,9 @@
+ intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
+ intr_mask.ser1 = 1;
+ REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
+-
++
+ ser_intr_mask = REG_RD(ser, regi_ser1, rw_intr_mask);
+- ser_intr_mask.data_avail = regk_ser_yes;
++ ser_intr_mask.dav = regk_ser_yes;
+ REG_WR(ser, regi_ser1, rw_intr_mask, ser_intr_mask);
+ #elif defined(CONFIG_ETRAX_KGDB_PORT2)
+ /* Note: no shortcut registered (not handled by multiple_interrupt).
+@@ -1621,9 +1621,9 @@
+ intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
+ intr_mask.ser2 = 1;
+ REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
+-
++
+ ser_intr_mask = REG_RD(ser, regi_ser2, rw_intr_mask);
+- ser_intr_mask.data_avail = regk_ser_yes;
++ ser_intr_mask.dav = regk_ser_yes;
+ REG_WR(ser, regi_ser2, rw_intr_mask, ser_intr_mask);
+ #elif defined(CONFIG_ETRAX_KGDB_PORT3)
+ /* Note: no shortcut registered (not handled by multiple_interrupt).
+@@ -1635,7 +1635,7 @@
+ REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
+
+ ser_intr_mask = REG_RD(ser, regi_ser3, rw_intr_mask);
+- ser_intr_mask.data_avail = regk_ser_yes;
++ ser_intr_mask.dav = regk_ser_yes;
+ REG_WR(ser, regi_ser3, rw_intr_mask, ser_intr_mask);
+ #endif
+
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/kgdb_asm.S linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/kgdb_asm.S
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/kgdb_asm.S 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/kgdb_asm.S 2006-10-13 14:43:13.000000000 +0200
+@@ -11,7 +11,7 @@
+ .globl kgdb_handle_exception
+
+ kgdb_handle_exception:
+-
++
+ ;; Create a register image of the caller.
+ ;;
+ ;; First of all, save the ACR on the stack since we need it for address calculations.
+@@ -262,7 +262,7 @@
+ ;; Nothing in S15, bank 3
+ clear.d [$acr]
+ addq 4, $acr
+-
++
+ ;; Check what got us here: get IDX field of EXS.
+ move $exs, $r10
+ and.d 0xff00, $r10
+@@ -307,7 +307,7 @@
+ handle_comm:
+ move.d internal_stack+1020, $sp ; Use the internal stack which grows upwards
+ jsr handle_exception ; Interactive routine
+- nop
++ nop
+
+ ;;
+ ;; Return to the caller
+@@ -345,7 +345,7 @@
+ ;; Nothing in S6 - S7, bank 0.
+ addq 4, $acr
+ addq 4, $acr
+-
++
+ move.d [$acr], $r0
+ move $r0, $s8
+ addq 4, $acr
+@@ -507,7 +507,7 @@
+ addq 8, $acr
+
+ ;; Skip BZ, VR.
+- addq 2, $acr
++ addq 2, $acr
+
+ move [$acr], $pid ; Restore PID
+ addq 4, $acr
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/pinmux.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/pinmux.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/pinmux.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/pinmux.c 2006-08-11 10:32:21.000000000 +0200
+@@ -1,7 +1,7 @@
+-/*
++/*
+ * Allocator for I/O pins. All pins are allocated to GPIO at bootup.
+ * Unassigned pins and GPIO pins can be allocated to a fixed interface
+- * or the I/O processor instead.
++ * or the I/O processor instead.
+ *
+ * Copyright (c) 2004 Axis Communications AB.
+ */
+@@ -33,9 +33,10 @@
+
+ if (!initialized) {
+ reg_pinmux_rw_pa pa = REG_RD(pinmux, regi_pinmux, rw_pa);
++ REG_WR_INT(pinmux, regi_pinmux, rw_hwprot, 0);
+ initialized = 1;
+- pa.pa0 = pa.pa1 = pa.pa2 = pa.pa3 =
+- pa.pa4 = pa.pa5 = pa.pa6 = pa.pa7 = regk_pinmux_yes;
++ pa.pa0 = pa.pa1 = pa.pa2 = pa.pa3 =
++ pa.pa4 = pa.pa5 = pa.pa6 = pa.pa7 = regk_pinmux_yes;
+ REG_WR(pinmux, regi_pinmux, rw_pa, pa);
+ crisv32_pinmux_alloc(PORT_B, 0, PORT_PINS - 1, pinmux_gpio);
+ crisv32_pinmux_alloc(PORT_C, 0, PORT_PINS - 1, pinmux_gpio);
+@@ -46,124 +47,137 @@
+ return 0;
+ }
+
+-int
+-crisv32_pinmux_alloc(int port, int first_pin, int last_pin, enum pin_mode mode)
++/*
++ * must be called with the pinmux_lock held.
++ */
++static int __crisv32_pinmux_alloc(int port, int first_pin, int last_pin,
++ enum pin_mode mode)
+ {
+ int i;
+- unsigned long flags;
+
+- crisv32_pinmux_init();
+-
+- if (port > PORTS)
++ if (port >= PORTS ||
++ first_pin < 0 || last_pin >= PORT_PINS || last_pin < first_pin)
+ return -EINVAL;
+-
+- spin_lock_irqsave(&pinmux_lock, flags);
+-
+- for (i = first_pin; i <= last_pin; i++)
++
++ for (i = first_pin; i <= last_pin; i++)
+ {
+- if ((pins[port][i] != pinmux_none) && (pins[port][i] != pinmux_gpio) &&
+- (pins[port][i] != mode))
++ if ((pins[port][i] != pinmux_none)
++ && (pins[port][i] != pinmux_gpio)
++ && (pins[port][i] != mode))
+ {
+- spin_unlock_irqrestore(&pinmux_lock, flags);
+ #ifdef DEBUG
+ panic("Pinmux alloc failed!\n");
+ #endif
+ return -EPERM;
+ }
+ }
+-
++
+ for (i = first_pin; i <= last_pin; i++)
+ pins[port][i] = mode;
+
+ crisv32_pinmux_set(port);
+-
+- spin_unlock_irqrestore(&pinmux_lock, flags);
+-
+ return 0;
+ }
+
+ int
++crisv32_pinmux_alloc(int port, int first_pin, int last_pin, enum pin_mode mode)
++{
++ int r;
++ unsigned long flags;
++
++ crisv32_pinmux_init();
++
++ spin_lock_irqsave(&pinmux_lock, flags);
++ r = __crisv32_pinmux_alloc(port, first_pin, last_pin, mode);
++ spin_unlock_irqrestore(&pinmux_lock, flags);
++ return r;
++}
++
++int
+ crisv32_pinmux_alloc_fixed(enum fixed_function function)
+ {
+ int ret = -EINVAL;
+ char saved[sizeof pins];
+ unsigned long flags;
+-
++ reg_pinmux_rw_hwprot hwprot;
++
++ crisv32_pinmux_init();
++
+ spin_lock_irqsave(&pinmux_lock, flags);
+
+ /* Save internal data for recovery */
+ memcpy(saved, pins, sizeof pins);
+-
+- reg_pinmux_rw_hwprot hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
+-
++
++ hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
++
+ switch(function)
+ {
+ case pinmux_ser1:
+- ret = crisv32_pinmux_alloc(PORT_C, 4, 7, pinmux_fixed);
++ ret = __crisv32_pinmux_alloc(PORT_C, 4, 7, pinmux_fixed);
+ hwprot.ser1 = regk_pinmux_yes;
+ break;
+ case pinmux_ser2:
+- ret = crisv32_pinmux_alloc(PORT_C, 8, 11, pinmux_fixed);
++ ret = __crisv32_pinmux_alloc(PORT_C, 8, 11, pinmux_fixed);
+ hwprot.ser2 = regk_pinmux_yes;
+ break;
+ case pinmux_ser3:
+- ret = crisv32_pinmux_alloc(PORT_C, 12, 15, pinmux_fixed);
++ ret = __crisv32_pinmux_alloc(PORT_C, 12, 15, pinmux_fixed);
+ hwprot.ser3 = regk_pinmux_yes;
+ break;
+ case pinmux_sser0:
+- ret = crisv32_pinmux_alloc(PORT_C, 0, 3, pinmux_fixed);
+- ret |= crisv32_pinmux_alloc(PORT_C, 16, 16, pinmux_fixed);
++ ret = __crisv32_pinmux_alloc(PORT_C, 0, 3, pinmux_fixed);
++ ret |= __crisv32_pinmux_alloc(PORT_C, 16, 16, pinmux_fixed);
+ hwprot.sser0 = regk_pinmux_yes;
+ break;
+ case pinmux_sser1:
+- ret = crisv32_pinmux_alloc(PORT_D, 0, 4, pinmux_fixed);
++ ret = __crisv32_pinmux_alloc(PORT_D, 0, 4, pinmux_fixed);
+ hwprot.sser1 = regk_pinmux_yes;
+ break;
+ case pinmux_ata0:
+- ret = crisv32_pinmux_alloc(PORT_D, 5, 7, pinmux_fixed);
+- ret |= crisv32_pinmux_alloc(PORT_D, 15, 17, pinmux_fixed);
++ ret = __crisv32_pinmux_alloc(PORT_D, 5, 7, pinmux_fixed);
++ ret |= __crisv32_pinmux_alloc(PORT_D, 15, 17, pinmux_fixed);
+ hwprot.ata0 = regk_pinmux_yes;
+ break;
+ case pinmux_ata1:
+- ret = crisv32_pinmux_alloc(PORT_D, 0, 4, pinmux_fixed);
+- ret |= crisv32_pinmux_alloc(PORT_E, 17, 17, pinmux_fixed);
++ ret = __crisv32_pinmux_alloc(PORT_D, 0, 4, pinmux_fixed);
++ ret |= __crisv32_pinmux_alloc(PORT_E, 17, 17, pinmux_fixed);
+ hwprot.ata1 = regk_pinmux_yes;
+ break;
+ case pinmux_ata2:
+- ret = crisv32_pinmux_alloc(PORT_C, 11, 15, pinmux_fixed);
+- ret |= crisv32_pinmux_alloc(PORT_E, 3, 3, pinmux_fixed);
++ ret = __crisv32_pinmux_alloc(PORT_C, 11, 15, pinmux_fixed);
++ ret |= __crisv32_pinmux_alloc(PORT_E, 3, 3, pinmux_fixed);
+ hwprot.ata2 = regk_pinmux_yes;
+ break;
+ case pinmux_ata3:
+- ret = crisv32_pinmux_alloc(PORT_C, 8, 10, pinmux_fixed);
+- ret |= crisv32_pinmux_alloc(PORT_C, 0, 2, pinmux_fixed);
++ ret = __crisv32_pinmux_alloc(PORT_C, 8, 10, pinmux_fixed);
++ ret |= __crisv32_pinmux_alloc(PORT_C, 0, 2, pinmux_fixed);
+ hwprot.ata2 = regk_pinmux_yes;
+ break;
+ case pinmux_ata:
+- ret = crisv32_pinmux_alloc(PORT_B, 0, 15, pinmux_fixed);
+- ret |= crisv32_pinmux_alloc(PORT_D, 8, 15, pinmux_fixed);
++ ret = __crisv32_pinmux_alloc(PORT_B, 0, 15, pinmux_fixed);
++ ret |= __crisv32_pinmux_alloc(PORT_D, 8, 15, pinmux_fixed);
+ hwprot.ata = regk_pinmux_yes;
+ break;
+ case pinmux_eth1:
+- ret = crisv32_pinmux_alloc(PORT_E, 0, 17, pinmux_fixed);
++ ret = __crisv32_pinmux_alloc(PORT_E, 0, 17, pinmux_fixed);
+ hwprot.eth1 = regk_pinmux_yes;
+ hwprot.eth1_mgm = regk_pinmux_yes;
+ break;
+ case pinmux_timer:
+- ret = crisv32_pinmux_alloc(PORT_C, 16, 16, pinmux_fixed);
++ ret = __crisv32_pinmux_alloc(PORT_C, 16, 16, pinmux_fixed);
+ hwprot.timer = regk_pinmux_yes;
+ spin_unlock_irqrestore(&pinmux_lock, flags);
+ return ret;
+ }
+-
++
+ if (!ret)
+ REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
+ else
+ memcpy(pins, saved, sizeof pins);
+-
+- spin_unlock_irqrestore(&pinmux_lock, flags);
+-
+- return ret;
++
++ spin_unlock_irqrestore(&pinmux_lock, flags);
++
++ return ret;
+ }
+
+ void
+@@ -189,33 +203,126 @@
+ #endif
+ }
+
+-int
+-crisv32_pinmux_dealloc(int port, int first_pin, int last_pin)
++/*
++ * must be called with the pinmux_lock held.
++ */
++static int __crisv32_pinmux_dealloc(int port, int first_pin, int last_pin)
+ {
+ int i;
++
++ if (port > PORTS)
++ return -EINVAL;
++
++ for (i = first_pin; i <= last_pin; i++)
++ pins[port][i] = pinmux_none;
++
++ crisv32_pinmux_set(port);
++
++ return 0;
++}
++
++int crisv32_pinmux_dealloc(int port, int first_pin, int last_pin)
++{
++ int r;
+ unsigned long flags;
+
+ crisv32_pinmux_init();
++
++ spin_lock_irqsave(&pinmux_lock, flags);
++ r = __crisv32_pinmux_dealloc(port, first_pin, last_pin);
++ spin_unlock_irqrestore(&pinmux_lock, flags);
++ return r;
++}
+
+- if (port > PORTS)
+- return -EINVAL;
++int
++crisv32_pinmux_dealloc_fixed(enum fixed_function function)
++{
++ int ret = -EINVAL;
++ char saved[sizeof pins];
++ unsigned long flags;
+
+ spin_lock_irqsave(&pinmux_lock, flags);
+
+- for (i = first_pin; i <= last_pin; i++)
+- pins[port][i] = pinmux_none;
++ /* Save internal data for recovery */
++ memcpy(saved, pins, sizeof pins);
++
++ reg_pinmux_rw_hwprot hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
++
++ switch(function)
++ {
++ case pinmux_ser1:
++ ret = __crisv32_pinmux_dealloc(PORT_C, 4, 7);
++ hwprot.ser1 = regk_pinmux_no;
++ break;
++ case pinmux_ser2:
++ ret = __crisv32_pinmux_dealloc(PORT_C, 8, 11);
++ hwprot.ser2 = regk_pinmux_no;
++ break;
++ case pinmux_ser3:
++ ret = __crisv32_pinmux_dealloc(PORT_C, 12, 15);
++ hwprot.ser3 = regk_pinmux_no;
++ break;
++ case pinmux_sser0:
++ ret = __crisv32_pinmux_dealloc(PORT_C, 0, 3);
++ ret |= __crisv32_pinmux_dealloc(PORT_C, 16, 16);
++ hwprot.sser0 = regk_pinmux_no;
++ break;
++ case pinmux_sser1:
++ ret = __crisv32_pinmux_dealloc(PORT_D, 0, 4);
++ hwprot.sser1 = regk_pinmux_no;
++ break;
++ case pinmux_ata0:
++ ret = __crisv32_pinmux_dealloc(PORT_D, 5, 7);
++ ret |= __crisv32_pinmux_dealloc(PORT_D, 15, 17);
++ hwprot.ata0 = regk_pinmux_no;
++ break;
++ case pinmux_ata1:
++ ret = __crisv32_pinmux_dealloc(PORT_D, 0, 4);
++ ret |= __crisv32_pinmux_dealloc(PORT_E, 17, 17);
++ hwprot.ata1 = regk_pinmux_no;
++ break;
++ case pinmux_ata2:
++ ret = __crisv32_pinmux_dealloc(PORT_C, 11, 15);
++ ret |= __crisv32_pinmux_dealloc(PORT_E, 3, 3);
++ hwprot.ata2 = regk_pinmux_no;
++ break;
++ case pinmux_ata3:
++ ret = __crisv32_pinmux_dealloc(PORT_C, 8, 10);
++ ret |= __crisv32_pinmux_dealloc(PORT_C, 0, 2);
++ hwprot.ata2 = regk_pinmux_no;
++ break;
++ case pinmux_ata:
++ ret = __crisv32_pinmux_dealloc(PORT_B, 0, 15);
++ ret |= __crisv32_pinmux_dealloc(PORT_D, 8, 15);
++ hwprot.ata = regk_pinmux_no;
++ break;
++ case pinmux_eth1:
++ ret = __crisv32_pinmux_dealloc(PORT_E, 0, 17);
++ hwprot.eth1 = regk_pinmux_no;
++ hwprot.eth1_mgm = regk_pinmux_no;
++ break;
++ case pinmux_timer:
++ ret = __crisv32_pinmux_dealloc(PORT_C, 16, 16);
++ hwprot.timer = regk_pinmux_no;
++ spin_unlock_irqrestore(&pinmux_lock, flags);
++ return ret;
++ }
++
++ if (!ret)
++ REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
++ else
++ memcpy(pins, saved, sizeof pins);
+
+- crisv32_pinmux_set(port);
+ spin_unlock_irqrestore(&pinmux_lock, flags);
+-
+- return 0;
++
++ return ret;
+ }
+
+ void
+ crisv32_pinmux_dump(void)
+ {
+ int i, j;
+-
++
+ crisv32_pinmux_init();
+
+ for (i = 0; i < PORTS; i++)
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/process.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/process.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/process.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/process.c 2006-10-13 14:43:13.000000000 +0200
+@@ -74,9 +74,9 @@
+ #else
+ {
+ reg_timer_rw_wd_ctrl wd_ctrl = {0};
+-
++
+ stop_watchdog();
+-
++
+ wd_ctrl.key = 16; /* Arbitrary key. */
+ wd_ctrl.cnt = 1; /* Minimum time. */
+ wd_ctrl.cmd = regk_timer_start;
+@@ -141,7 +141,7 @@
+ {
+ struct pt_regs *childregs;
+ struct switch_stack *swstack;
+-
++
+ /*
+ * Put the pt_regs structure at the end of the new kernel stack page and
+ * fix it up. Note: the task_struct doubles as the kernel stack for the
+@@ -152,7 +152,7 @@
+ p->set_child_tid = p->clear_child_tid = NULL;
+ childregs->r10 = 0; /* Child returns 0 after a fork/clone. */
+
+- /* Set a new TLS ?
++ /* Set a new TLS ?
+ * The TLS is in $mof beacuse it is the 5th argument to sys_clone.
+ */
+ if (p->mm && (clone_flags & CLONE_SETTLS)) {
+@@ -165,20 +165,20 @@
+ /* Paramater to ret_from_sys_call. 0 is don't restart the syscall. */
+ swstack->r9 = 0;
+
+- /*
++ /*
+ * We want to return into ret_from_sys_call after the _resume.
+ * ret_from_fork will call ret_from_sys_call.
+ */
+ swstack->return_ip = (unsigned long) ret_from_fork;
+-
++
+ /* Fix the user-mode and kernel-mode stackpointer. */
+- p->thread.usp = usp;
++ p->thread.usp = usp;
+ p->thread.ksp = (unsigned long) swstack;
+
+ return 0;
+ }
+
+-/*
++/*
+ * Be aware of the "magic" 7th argument in the four system-calls below.
+ * They need the latest stackframe, which is put as the 7th argument by
+ * entry.S. The previous arguments are dummies or actually used, but need
+@@ -200,7 +200,7 @@
+
+ /* FIXME: Is parent_tid/child_tid really third/fourth argument? Update lib? */
+ asmlinkage int
+-sys_clone(unsigned long newusp, unsigned long flags, int *parent_tid, int *child_tid,
++sys_clone(unsigned long newusp, unsigned long flags, int *parent_tid, int *child_tid,
+ unsigned long tls, long srp, struct pt_regs *regs)
+ {
+ if (!newusp)
+@@ -209,11 +209,11 @@
+ return do_fork(flags, newusp, regs, 0, parent_tid, child_tid);
+ }
+
+-/*
++/*
+ * vfork is a system call in i386 because of register-pressure - maybe
+ * we can remove it and handle it in libc but we put it here until then.
+ */
+-asmlinkage int
++asmlinkage int
+ sys_vfork(long r10, long r11, long r12, long r13, long mof, long srp,
+ struct pt_regs *regs)
+ {
+@@ -222,7 +222,7 @@
+
+ /* sys_execve() executes a new program. */
+ asmlinkage int
+-sys_execve(const char *fname, char **argv, char **envp, long r13, long mof, long srp,
++sys_execve(const char *fname, char **argv, char **envp, long r13, long mof, long srp,
+ struct pt_regs *regs)
+ {
+ int error;
+@@ -254,13 +254,13 @@
+ unsigned long usp = rdusp();
+ printk("ERP: %08lx SRP: %08lx CCS: %08lx USP: %08lx MOF: %08lx\n",
+ regs->erp, regs->srp, regs->ccs, usp, regs->mof);
+-
++
+ printk(" r0: %08lx r1: %08lx r2: %08lx r3: %08lx\n",
+ regs->r0, regs->r1, regs->r2, regs->r3);
+-
++
+ printk(" r4: %08lx r5: %08lx r6: %08lx r7: %08lx\n",
+ regs->r4, regs->r5, regs->r6, regs->r7);
+-
++
+ printk(" r8: %08lx r9: %08lx r10: %08lx r11: %08lx\n",
+ regs->r8, regs->r9, regs->r10, regs->r11);
+
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/ptrace.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/ptrace.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/ptrace.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/ptrace.c 2006-03-22 10:56:56.000000000 +0100
+@@ -20,7 +20,7 @@
+ #include <asm/processor.h>
+ #include <asm/arch/hwregs/supp_reg.h>
+
+-/*
++/*
+ * Determines which bits in CCS the user has access to.
+ * 1 = access, 0 = no access.
+ */
+@@ -84,7 +84,7 @@
+ *
+ * Make sure the single step bit is not set.
+ */
+-void
++void
+ ptrace_disable(struct task_struct *child)
+ {
+ unsigned long tmp;
+@@ -105,7 +105,7 @@
+ unsigned long __user *datap = (unsigned long __user *)data;
+
+ switch (request) {
+- /* Read word at location address. */
++ /* Read word at location address. */
+ case PTRACE_PEEKTEXT:
+ case PTRACE_PEEKDATA: {
+ unsigned long tmp;
+@@ -122,11 +122,11 @@
+ tmp = *(unsigned long*)addr;
+ } else {
+ copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
+-
++
+ if (copied != sizeof(tmp))
+ break;
+ }
+-
++
+ ret = put_user(tmp,datap);
+ break;
+ }
+@@ -143,18 +143,18 @@
+ ret = put_user(tmp, datap);
+ break;
+ }
+-
++
+ /* Write the word at location address. */
+ case PTRACE_POKETEXT:
+ case PTRACE_POKEDATA:
+ ret = 0;
+-
++
+ if (access_process_vm(child, addr, &data, sizeof(data), 1) == sizeof(data))
+ break;
+-
++
+ ret = -EIO;
+ break;
+-
++
+ /* Write the word at location address in the USER area. */
+ case PTRACE_POKEUSR:
+ ret = -EIO;
+@@ -178,10 +178,10 @@
+ case PTRACE_SYSCALL:
+ case PTRACE_CONT:
+ ret = -EIO;
+-
++
+ if (!valid_signal(data))
+ break;
+-
++
+ /* Continue means no single-step. */
+ put_reg(child, PT_SPC, 0);
+
+@@ -198,27 +198,27 @@
+ else {
+ clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
+ }
+-
++
+ child->exit_code = data;
+-
++
+ /* TODO: make sure any pending breakpoint is killed */
+ wake_up_process(child);
+ ret = 0;
+-
++
+ break;
+-
++
+ /* Make the child exit by sending it a sigkill. */
+ case PTRACE_KILL:
+ ret = 0;
+-
++
+ if (child->exit_state == EXIT_ZOMBIE)
+ break;
+-
++
+ child->exit_code = SIGKILL;
+-
++
+ /* Deconfigure single-step and h/w bp. */
+ ptrace_disable(child);
+-
++
+ /* TODO: make sure any pending breakpoint is killed */
+ wake_up_process(child);
+ break;
+@@ -227,7 +227,7 @@
+ case PTRACE_SINGLESTEP: {
+ unsigned long tmp;
+ ret = -EIO;
+-
++
+ /* Set up SPC if not set already (in which case we have
+ no other choice but to trust it). */
+ if (!get_reg(child, PT_SPC)) {
+@@ -240,7 +240,7 @@
+
+ if (!valid_signal(data))
+ break;
+-
++
+ clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
+
+ /* TODO: set some clever breakpoint mechanism... */
+@@ -259,15 +259,15 @@
+ case PTRACE_GETREGS: {
+ int i;
+ unsigned long tmp;
+-
++
+ for (i = 0; i <= PT_MAX; i++) {
+ tmp = get_reg(child, i);
+-
++
+ if (put_user(tmp, datap)) {
+ ret = -EFAULT;
+ goto out_tsk;
+ }
+-
++
+ datap++;
+ }
+
+@@ -279,22 +279,22 @@
+ case PTRACE_SETREGS: {
+ int i;
+ unsigned long tmp;
+-
++
+ for (i = 0; i <= PT_MAX; i++) {
+ if (get_user(tmp, datap)) {
+ ret = -EFAULT;
+ goto out_tsk;
+ }
+-
++
+ if (i == PT_CCS) {
+ tmp &= CCS_MASK;
+ tmp |= get_reg(child, PT_CCS) & ~CCS_MASK;
+ }
+-
++
+ put_reg(child, i, tmp);
+ datap++;
+ }
+-
++
+ ret = 0;
+ break;
+ }
+@@ -304,6 +304,7 @@
+ break;
+ }
+
++out_tsk:
+ return ret;
+ }
+
+@@ -311,15 +312,15 @@
+ {
+ if (!test_thread_flag(TIF_SYSCALL_TRACE))
+ return;
+-
++
+ if (!(current->ptrace & PT_PTRACED))
+ return;
+-
++
+ /* the 0x80 provides a way for the tracing parent to distinguish
+ between a syscall stop and SIGTRAP delivery */
+ ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
+ ? 0x80 : 0));
+-
++
+ /*
+ * This isn't the same as continuing with a signal, but it will do for
+ * normal use.
+@@ -338,7 +339,7 @@
+ int copied;
+ int opsize = 0;
+
+- /* Read the opcode at pc (do what PTRACE_PEEKTEXT would do). */
++ /* Read the opcode at pc (do what PTRACE_PEEKTEXT would do). */
+ copied = access_process_vm(child, pc, &opcode, sizeof(opcode), 0);
+ if (copied != sizeof(opcode))
+ return 0;
+@@ -361,7 +362,7 @@
+ opsize = 6;
+ break;
+ default:
+- panic("ERROR: Couldn't find size of opcode 0x%lx at 0x%lx\n",
++ panic("ERROR: Couldn't find size of opcode 0x%lx at 0x%lx\n",
+ opcode, pc);
+ }
+
+@@ -378,7 +379,7 @@
+ /* Delay slot bit set. Report as stopped on proper
+ instruction. */
+ if (spc) {
+- /* Rely on SPC if set. FIXME: We might want to check
++ /* Rely on SPC if set. FIXME: We might want to check
+ that EXS indicates we stopped due to a single-step
+ exception. */
+ pc = spc;
+@@ -422,7 +423,7 @@
+ register int old_srs;
+
+ #ifdef CONFIG_ETRAX_KGDB
+- /* Ignore write, but pretend it was ok if value is 0
++ /* Ignore write, but pretend it was ok if value is 0
+ (we don't want POKEUSR/SETREGS failing unnessecarily). */
+ return (data == 0) ? ret : -1;
+ #endif
+@@ -431,7 +432,7 @@
+ if (!bp_owner)
+ bp_owner = pid;
+ else if (bp_owner != pid) {
+- /* Ignore write, but pretend it was ok if value is 0
++ /* Ignore write, but pretend it was ok if value is 0
+ (we don't want POKEUSR/SETREGS failing unnessecarily). */
+ return (data == 0) ? ret : -1;
+ }
+@@ -440,7 +441,7 @@
+ SPEC_REG_RD(SPEC_REG_SRS, old_srs);
+ /* Switch to BP bank. */
+ SUPP_BANK_SEL(BANK_BP);
+-
++
+ switch (regno - PT_BP) {
+ case 0:
+ SUPP_REG_WR(0, data); break;
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/setup.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/setup.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/setup.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/setup.c 2006-10-13 14:43:13.000000000 +0200
+@@ -40,12 +40,12 @@
+
+ {"ETRAX 100LX", 10, 8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA | HAS_USB
+ | HAS_MMU | HAS_MMU_BUG},
+-
++
+ {"ETRAX 100LX v2", 11, 8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA | HAS_USB
+ | HAS_MMU},
+-
++
+ {"ETRAX FS", 32, 32, HAS_ETHERNET100 | HAS_ATA | HAS_MMU},
+-
++
+ {"Unknown", 0, 0, 0}
+ };
+
+@@ -67,7 +67,7 @@
+ #endif
+
+ revision = rdvr();
+-
++
+ for (i = 0; i < entries; i++) {
+ if (cpinfo[i].rev == revision) {
+ info = &cpinfo[i];
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/signal.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/signal.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/signal.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/signal.c 2006-03-22 10:56:56.000000000 +0100
+@@ -50,7 +50,7 @@
+ unsigned char retcode[8]; /* Trampoline code. */
+ };
+
+-int do_signal(int restart, sigset_t *oldset, struct pt_regs *regs);
++void do_signal(int restart, struct pt_regs *regs);
+ void keep_debug_flags(unsigned long oldccs, unsigned long oldspc,
+ struct pt_regs *regs);
+ /*
+@@ -61,74 +61,16 @@
+ sys_sigsuspend(old_sigset_t mask, long r11, long r12, long r13, long mof,
+ long srp, struct pt_regs *regs)
+ {
+- sigset_t saveset;
+-
+ mask &= _BLOCKABLE;
+-
+ spin_lock_irq(¤t->sighand->siglock);
+-
+- saveset = current->blocked;
+-
++ current->saved_sigmask = current->blocked;
+ siginitset(¤t->blocked, mask);
+-
+ recalc_sigpending();
+ spin_unlock_irq(¤t->sighand->siglock);
+-
+- regs->r10 = -EINTR;
+-
+- while (1) {
+- current->state = TASK_INTERRUPTIBLE;
+- schedule();
+-
+- if (do_signal(0, &saveset, regs)) {
+- /*
+- * This point is reached twice: once to call
+- * the signal handler, then again to return
+- * from the sigsuspend system call. When
+- * calling the signal handler, R10 hold the
+- * signal number as set by do_signal(). The
+- * sigsuspend call will always return with
+- * the restored value above; -EINTR.
+- */
+- return regs->r10;
+- }
+- }
+-}
+-
+-/* Define some dummy arguments to be able to reach the regs argument. */
+-int
+-sys_rt_sigsuspend(sigset_t *unewset, size_t sigsetsize, long r12, long r13,
+- long mof, long srp, struct pt_regs *regs)
+-{
+- sigset_t saveset;
+- sigset_t newset;
+-
+- if (sigsetsize != sizeof(sigset_t))
+- return -EINVAL;
+-
+- if (copy_from_user(&newset, unewset, sizeof(newset)))
+- return -EFAULT;
+-
+- sigdelsetmask(&newset, ~_BLOCKABLE);
+- spin_lock_irq(¤t->sighand->siglock);
+-
+- saveset = current->blocked;
+- current->blocked = newset;
+-
+- recalc_sigpending();
+- spin_unlock_irq(¤t->sighand->siglock);
+-
+- regs->r10 = -EINTR;
+-
+- while (1) {
+- current->state = TASK_INTERRUPTIBLE;
+- schedule();
+-
+- if (do_signal(0, &saveset, regs)) {
+- /* See comment in function above. */
+- return regs->r10;
+- }
+- }
++ current->state = TASK_INTERRUPTIBLE;
++ schedule();
++ set_thread_flag(TIF_RESTORE_SIGMASK);
++ return -ERESTARTNOHAND;
+ }
+
+ int
+@@ -263,7 +205,7 @@
+ unsigned long oldccs = regs->ccs;
+
+ frame = (struct rt_signal_frame *) rdusp();
+-
++
+ /*
+ * Since the signal is stacked on a dword boundary, the frame
+ * should be dword aligned here as well. It it's not, then the
+@@ -285,7 +227,7 @@
+
+ recalc_sigpending();
+ spin_unlock_irq(¤t->sighand->siglock);
+-
++
+ if (restore_sigcontext(regs, &frame->uc.uc_mcontext))
+ goto badframe;
+
+@@ -311,7 +253,7 @@
+
+ err = 0;
+ usp = rdusp();
+-
++
+ /*
+ * Copy the registers. They are located first in sc, so it's
+ * possible to use sc directly.
+@@ -351,7 +293,7 @@
+ * which performs the syscall sigreturn(), or a provided user-mode
+ * trampoline.
+ */
+-static void
++static int
+ setup_frame(int sig, struct k_sigaction *ka, sigset_t *set,
+ struct pt_regs * regs)
+ {
+@@ -388,7 +330,7 @@
+ /* Trampoline - the desired return ip is in the signal return page. */
+ return_ip = cris_signal_return_page;
+
+- /*
++ /*
+ * This is movu.w __NR_sigreturn, r9; break 13;
+ *
+ * WE DO NOT USE IT ANY MORE! It's only left here for historical
+@@ -402,7 +344,7 @@
+
+ if (err)
+ goto give_sigsegv;
+-
++
+ /*
+ * Set up registers for signal handler.
+ *
+@@ -417,16 +359,17 @@
+ /* Actually move the USP to reflect the stacked frame. */
+ wrusp((unsigned long)frame);
+
+- return;
++ return 0;
+
+ give_sigsegv:
+ if (sig == SIGSEGV)
+ ka->sa.sa_handler = SIG_DFL;
+-
++
+ force_sig(SIGSEGV, current);
++ return -EFAULT;
+ }
+
+-static void
++static int
+ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
+ sigset_t *set, struct pt_regs * regs)
+ {
+@@ -441,11 +384,11 @@
+ goto give_sigsegv;
+
+ /* TODO: what is the current->exec_domain stuff and invmap ? */
+-
++
+ err |= __put_user(&frame->info, &frame->pinfo);
+ err |= __put_user(&frame->uc, &frame->puc);
+ err |= copy_siginfo_to_user(&frame->info, info);
+-
++
+ if (err)
+ goto give_sigsegv;
+
+@@ -467,7 +410,7 @@
+ /* Trampoline - the desired return ip is in the signal return page. */
+ return_ip = cris_signal_return_page + 6;
+
+- /*
++ /*
+ * This is movu.w __NR_rt_sigreturn, r9; break 13;
+ *
+ * WE DO NOT USE IT ANY MORE! It's only left here for historical
+@@ -478,7 +421,7 @@
+
+ err |= __put_user(__NR_rt_sigreturn,
+ (short __user*)(frame->retcode+2));
+-
++
+ err |= __put_user(0xe93d, (short __user*)(frame->retcode+4));
+ }
+
+@@ -503,21 +446,24 @@
+ /* Actually move the usp to reflect the stacked frame. */
+ wrusp((unsigned long)frame);
+
+- return;
++ return 0;
+
+ give_sigsegv:
+ if (sig == SIGSEGV)
+ ka->sa.sa_handler = SIG_DFL;
+-
++
+ force_sig(SIGSEGV, current);
++ return -EFAULT;
+ }
+
+ /* Invoke a singal handler to, well, handle the signal. */
+-static inline void
++static inline int
+ handle_signal(int canrestart, unsigned long sig,
+ siginfo_t *info, struct k_sigaction *ka,
+ sigset_t *oldset, struct pt_regs * regs)
+ {
++ int ret;
++
+ /* Check if this got called from a system call. */
+ if (canrestart) {
+ /* If so, check system call restarting. */
+@@ -561,19 +507,23 @@
+
+ /* Set up the stack frame. */
+ if (ka->sa.sa_flags & SA_SIGINFO)
+- setup_rt_frame(sig, ka, info, oldset, regs);
++ ret = setup_rt_frame(sig, ka, info, oldset, regs);
+ else
+- setup_frame(sig, ka, oldset, regs);
++ ret = setup_frame(sig, ka, oldset, regs);
+
+ if (ka->sa.sa_flags & SA_ONESHOT)
+ ka->sa.sa_handler = SIG_DFL;
+
+- spin_lock_irq(¤t->sighand->siglock);
+- sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask);
+- if (!(ka->sa.sa_flags & SA_NODEFER))
+- sigaddset(¤t->blocked,sig);
+- recalc_sigpending();
+- spin_unlock_irq(¤t->sighand->siglock);
++ if (ret == 0) {
++ spin_lock_irq(¤t->sighand->siglock);
++ sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask);
++ if (!(ka->sa.sa_flags & SA_NODEFER))
++ sigaddset(¤t->blocked,sig);
++ recalc_sigpending();
++ spin_unlock_irq(¤t->sighand->siglock);
++ }
++
++ return ret;
+ }
+
+ /*
+@@ -587,12 +537,13 @@
+ * we can use user_mode(regs) to see if we came directly from kernel or user
+ * mode below.
+ */
+-int
+-do_signal(int canrestart, sigset_t *oldset, struct pt_regs *regs)
++void
++do_signal(int canrestart, struct pt_regs *regs)
+ {
+ int signr;
+ siginfo_t info;
+ struct k_sigaction ka;
++ sigset_t *oldset;
+
+ /*
+ * The common case should go fast, which is why this point is
+@@ -600,17 +551,27 @@
+ * without doing anything.
+ */
+ if (!user_mode(regs))
+- return 1;
++ return;
+
+- if (!oldset)
++ if (test_thread_flag(TIF_RESTORE_SIGMASK))
++ oldset = ¤t->saved_sigmask;
++ else
+ oldset = ¤t->blocked;
+
+ signr = get_signal_to_deliver(&info, &ka, regs, NULL);
+-
++
+ if (signr > 0) {
+- /* Deliver the signal. */
+- handle_signal(canrestart, signr, &info, &ka, oldset, regs);
+- return 1;
++ /* Whee! Actually deliver the signal. */
++ if (handle_signal(canrestart, signr, &info, &ka, oldset, regs)) {
++ /* a signal was successfully delivered; the saved
++ * sigmask will have been stored in the signal frame,
++ * and will be restored by sigreturn, so we can simply
++ * clear the TIF_RESTORE_SIGMASK flag */
++ if (test_thread_flag(TIF_RESTORE_SIGMASK))
++ clear_thread_flag(TIF_RESTORE_SIGMASK);
++ }
++
++ return;
+ }
+
+ /* Got here from a system call? */
+@@ -621,14 +582,19 @@
+ regs->r10 == -ERESTARTNOINTR) {
+ RESTART_CRIS_SYS(regs);
+ }
+-
++
+ if (regs->r10 == -ERESTART_RESTARTBLOCK){
+ regs->r10 = __NR_restart_syscall;
+ regs->erp -= 2;
+ }
+ }
+-
+- return 0;
++
++ /* if there's no signal to deliver, we just put the saved sigmask
++ * back */
++ if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
++ clear_thread_flag(TIF_RESTORE_SIGMASK);
++ sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL);
++ }
+ }
+
+ asmlinkage void
+@@ -651,7 +617,7 @@
+ sys_kill(ti->task->pid, sig);
+ }
+
+-void
++void
+ keep_debug_flags(unsigned long oldccs, unsigned long oldspc,
+ struct pt_regs *regs)
+ {
+@@ -666,7 +632,7 @@
+ regs->ccs |= (1 << (S_CCS_BITNR + CCS_SHIFT));
+ /* Assume the SPC is valid and interesting. */
+ regs->spc = oldspc;
+-
++
+ } else if (oldccs & (1 << (S_CCS_BITNR + CCS_SHIFT))) {
+ /* If a h/w bp was set in the signal handler we need
+ to keep the S flag. */
+@@ -679,7 +645,7 @@
+ have forgotten all about it. */
+ regs->spc = 0;
+ regs->ccs &= ~(1 << (S_CCS_BITNR + CCS_SHIFT));
+- }
++ }
+ }
+
+ /* Set up the trampolines on the signal return page. */
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/smp.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/smp.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/smp.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/smp.c 2007-01-09 10:29:19.000000000 +0100
+@@ -20,6 +20,7 @@
+ #define IPI_SCHEDULE 1
+ #define IPI_CALL 2
+ #define IPI_FLUSH_TLB 4
++#define IPI_BOOT 8
+
+ #define FLUSH_ALL (void*)0xffffffff
+
+@@ -30,6 +31,8 @@
+ cpumask_t cpu_online_map = CPU_MASK_NONE;
+ EXPORT_SYMBOL(cpu_online_map);
+ cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
++cpumask_t cpu_possible_map;
++EXPORT_SYMBOL(cpu_possible_map);
+ EXPORT_SYMBOL(phys_cpu_present_map);
+
+ /* Variables used during SMP boot */
+@@ -55,7 +58,7 @@
+ extern int setup_irq(int, struct irqaction *);
+
+ /* Mode registers */
+-static unsigned long irq_regs[NR_CPUS] =
++static unsigned long irq_regs[NR_CPUS] =
+ {
+ regi_irq,
+ regi_irq2
+@@ -97,6 +100,7 @@
+
+ cpu_set(0, cpu_online_map);
+ cpu_set(0, phys_cpu_present_map);
++ cpu_set(0, cpu_possible_map);
+ }
+
+ void __init smp_cpus_done(unsigned int max_cpus)
+@@ -109,6 +113,7 @@
+ {
+ unsigned timeout;
+ struct task_struct *idle;
++ cpumask_t cpu_mask = CPU_MASK_NONE;
+
+ idle = fork_idle(cpuid);
+ if (IS_ERR(idle))
+@@ -120,6 +125,12 @@
+ smp_init_current_idle_thread = task_thread_info(idle);
+ cpu_now_booting = cpuid;
+
++ /* Kick it */
++ cpu_set(cpuid, cpu_online_map);
++ cpu_set(cpuid, cpu_mask);
++ send_ipi(IPI_BOOT, 0, cpu_mask);
++ cpu_clear(cpuid, cpu_online_map);
++
+ /* Wait for CPU to come online */
+ for (timeout = 0; timeout < 10000; timeout++) {
+ if(cpu_online(cpuid)) {
+@@ -142,7 +153,7 @@
+ * specific stuff such as the local timer and the MMU. */
+ void __init smp_callin(void)
+ {
+- extern void cpu_idle(void);
++ extern void cpu_idle(void);
+
+ int cpu = cpu_now_booting;
+ reg_intr_vect_rw_mask vect_mask = {0};
+@@ -190,8 +201,8 @@
+
+ /* cache_decay_ticks is used by the scheduler to decide if a process
+ * is "hot" on one CPU. A higher value means a higher penalty to move
+- * a process to another CPU. Our cache is rather small so we report
+- * 1 tick.
++ * a process to another CPU. Our cache is rather small so we report
++ * 1 tick.
+ */
+ unsigned long cache_decay_ticks = 1;
+
+@@ -205,14 +216,14 @@
+ {
+ cpumask_t cpu_mask = CPU_MASK_NONE;
+ cpu_set(cpu, cpu_mask);
+- send_ipi(IPI_SCHEDULE, 0, cpu_mask);
++ send_ipi(IPI_SCHEDULE, 0, cpu_mask);
+ }
+
+ /* TLB flushing
+ *
+ * Flush needs to be done on the local CPU and on any other CPU that
+ * may have the same mapping. The mm->cpu_vm_mask is used to keep track
+- * of which CPUs that a specific process has been executed on.
++ * of which CPUs that a specific process has been executed on.
+ */
+ void flush_tlb_common(struct mm_struct* mm, struct vm_area_struct* vma, unsigned long addr)
+ {
+@@ -244,7 +255,7 @@
+ cpu_set(smp_processor_id(), mm->cpu_vm_mask);
+ }
+
+-void flush_tlb_page(struct vm_area_struct *vma,
++void flush_tlb_page(struct vm_area_struct *vma,
+ unsigned long addr)
+ {
+ __flush_tlb_page(vma, addr);
+@@ -252,8 +263,8 @@
+ }
+
+ /* Inter processor interrupts
+- *
+- * The IPIs are used for:
++ *
++ * The IPIs are used for:
+ * * Force a schedule on a CPU
+ * * FLush TLB on other CPUs
+ * * Call a function on other CPUs
+@@ -341,7 +352,7 @@
+ else if (flush_vma == FLUSH_ALL)
+ __flush_tlb_mm(flush_mm);
+ else
+- __flush_tlb_page(flush_vma, flush_addr);
++ __flush_tlb_page(flush_vma, flush_addr);
+ }
+
+ ipi.vector = 0;
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/time.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/time.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/time.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/time.c 2007-01-09 10:29:19.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* $Id: time.c,v 1.19 2005/04/29 05:40:09 starvik Exp $
++/* $Id: time.c,v 1.25 2007/01/09 09:29:19 starvik Exp $
+ *
+ * linux/arch/cris/arch-v32/kernel/time.c
+ *
+@@ -14,12 +14,14 @@
+ #include <linux/sched.h>
+ #include <linux/init.h>
+ #include <linux/threads.h>
++#include <linux/cpufreq.h>
+ #include <asm/types.h>
+ #include <asm/signal.h>
+ #include <asm/io.h>
+ #include <asm/delay.h>
+ #include <asm/rtc.h>
+ #include <asm/irq.h>
++#include <asm/irq_regs.h>
+
+ #include <asm/arch/hwregs/reg_map.h>
+ #include <asm/arch/hwregs/reg_rdwr.h>
+@@ -31,7 +33,7 @@
+ #define ETRAX_WD_HZ 763 /* watchdog counts at 763 Hz */
+ #define ETRAX_WD_CNT ((2*ETRAX_WD_HZ)/HZ + 1) /* Number of 763 counts before watchdog bites */
+
+-unsigned long timer_regs[NR_CPUS] =
++unsigned long timer_regs[NR_CPUS] =
+ {
+ regi_timer,
+ #ifdef CONFIG_SMP
+@@ -44,6 +46,15 @@
+ extern int setup_irq(int, struct irqaction *);
+ extern int have_rtc;
+
++#ifdef CONFIG_CPU_FREQ
++static int
++cris_time_freq_notifier(struct notifier_block *nb, unsigned long val, void *data);
++
++static struct notifier_block cris_time_freq_notifier_block = {
++ .notifier_call = cris_time_freq_notifier
++};
++#endif
++
+ unsigned long get_ns_in_jiffie(void)
+ {
+ reg_timer_r_tmr0_data data;
+@@ -63,7 +74,7 @@
+ static unsigned long jiffies_p = 0;
+
+ /*
+- * cache volatile jiffies temporarily; we have IRQs turned off.
++ * cache volatile jiffies temporarily; we have IRQs turned off.
+ */
+ unsigned long jiffies_t;
+
+@@ -82,7 +93,7 @@
+ */
+ if( jiffies_t == jiffies_p ) {
+ if( count > count_p ) {
+- /* Timer wrapped, use new count and prescale
++ /* Timer wrapped, use new count and prescale
+ * increase the time corresponding to one jiffie
+ */
+ usec_count = 1000000/HZ;
+@@ -101,7 +112,7 @@
+ * The watchdog timer is an 8-bit timer with a configurable start value.
+ * Once started the whatchdog counts downwards with a frequency of 763 Hz
+ * (100/131072 MHz). When the watchdog counts down to 1, it generates an
+- * NMI (Non Maskable Interrupt), and when it counts down to 0, it resets the
++ * NMI (Non Maskable Interrupt), and when it counts down to 0, it resets the
+ * chip.
+ */
+ /* This gives us 1.3 ms to do something useful when the NMI comes */
+@@ -124,7 +135,7 @@
+ {
+ #if defined(CONFIG_ETRAX_WATCHDOG)
+ reg_timer_rw_wd_ctrl wd_ctrl = { 0 };
+-
++
+ /* only keep watchdog happy as long as we have memory left! */
+ if(nr_free_pages() > WATCHDOG_MIN_FREE_PAGES) {
+ /* reset the watchdog with the inverse of the old key */
+@@ -139,7 +150,7 @@
+
+ /* stop the watchdog - we still need the correct key */
+
+-void
++void
+ stop_watchdog(void)
+ {
+ #if defined(CONFIG_ETRAX_WATCHDOG)
+@@ -149,7 +160,7 @@
+ wd_ctrl.cmd = regk_timer_stop;
+ wd_ctrl.key = watchdog_key;
+ REG_WR(timer, regi_timer, rw_wd_ctrl, wd_ctrl);
+-#endif
++#endif
+ }
+
+ extern void show_registers(struct pt_regs *regs);
+@@ -160,7 +171,8 @@
+ #if defined(CONFIG_ETRAX_WATCHDOG)
+ extern int cause_of_death;
+
+- raw_printk("Watchdog bite\n");
++ oops_in_progress = 1;
++ printk("Watchdog bite\n");
+
+ /* Check if forced restart or unexpected watchdog */
+ if (cause_of_death == 0xbedead) {
+@@ -169,8 +181,9 @@
+
+ /* Unexpected watchdog, stop the watchdog and dump registers*/
+ stop_watchdog();
+- raw_printk("Oops: bitten by watchdog\n");
+- show_registers(regs);
++ printk("Oops: bitten by watchdog\n");
++ show_registers(regs);
++ oops_in_progress = 0;
+ #ifndef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
+ reset_watchdog();
+ #endif
+@@ -191,8 +204,9 @@
+ extern void cris_do_profile(struct pt_regs *regs);
+
+ static inline irqreturn_t
+-timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
++timer_interrupt(int irq, void *dev_id)
+ {
++ struct pt_regs* regs = get_irq_regs();
+ int cpu = smp_processor_id();
+ reg_timer_r_masked_intr masked_intr;
+ reg_timer_rw_ack_intr ack_intr = { 0 };
+@@ -226,7 +240,7 @@
+ * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
+ * called as close as possible to 500 ms before the new second starts.
+ *
+- * The division here is not time critical since it will run once in
++ * The division here is not time critical since it will run once in
+ * 11 minutes
+ */
+ if ((time_status & STA_UNSYNC) == 0 &&
+@@ -246,7 +260,7 @@
+ */
+
+ static struct irqaction irq_timer = {
+- .mask = timer_interrupt,
++ .handler = timer_interrupt,
+ .flags = IRQF_SHARED | IRQF_DISABLED,
+ .mask = CPU_MASK_NONE,
+ .name = "timer"
+@@ -262,7 +276,7 @@
+
+ /* Setup the etrax timers
+ * Base frequency is 100MHz, divider 1000000 -> 100 HZ
+- * We use timer0, so timer1 is free.
++ * We use timer0, so timer1 is free.
+ * The trig timer is used by the fasttimer API if enabled.
+ */
+
+@@ -284,11 +298,11 @@
+ {
+ reg_intr_vect_rw_mask intr_mask;
+
+- /* probe for the RTC and read it if it exists
+- * Before the RTC can be probed the loops_per_usec variable needs
+- * to be initialized to make usleep work. A better value for
+- * loops_per_usec is calculated by the kernel later once the
+- * clock has started.
++ /* probe for the RTC and read it if it exists
++ * Before the RTC can be probed the loops_per_usec variable needs
++ * to be initialized to make usleep work. A better value for
++ * loops_per_usec is calculated by the kernel later once the
++ * clock has started.
+ */
+ loops_per_usec = 50;
+
+@@ -297,7 +311,7 @@
+ xtime.tv_sec = 0;
+ xtime.tv_nsec = 0;
+ have_rtc = 0;
+- } else {
++ } else {
+ /* get the current time */
+ have_rtc = 1;
+ update_xtime_from_cmos();
+@@ -316,9 +330,9 @@
+ intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
+ intr_mask.timer = 1;
+ REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
+-
++
+ /* now actually register the timer irq handler that calls timer_interrupt() */
+-
++
+ setup_irq(TIMER_INTR_VECT, &irq_timer);
+
+ /* enable watchdog if we should use one */
+@@ -330,10 +344,7 @@
+ /* If we use the hardware watchdog, we want to trap it as an NMI
+ and dump registers before it resets us. For this to happen, we
+ must set the "m" NMI enable flag (which once set, is unset only
+- when an NMI is taken).
+-
+- The same goes for the external NMI, but that doesn't have any
+- driver or infrastructure support yet. */
++ when an NMI is taken). */
+ {
+ unsigned long flags;
+ local_save_flags(flags);
+@@ -341,4 +352,27 @@
+ local_irq_restore(flags);
+ }
+ #endif
++
++#ifdef CONFIG_CPU_FREQ
++ cpufreq_register_notifier(&cris_time_freq_notifier_block,
++ CPUFREQ_TRANSITION_NOTIFIER);
++#endif
++}
++
++#ifdef CONFIG_CPU_FREQ
++static int
++cris_time_freq_notifier(struct notifier_block *nb, unsigned long val, void *data)
++{
++ struct cpufreq_freqs *freqs = data;
++ if (val == CPUFREQ_POSTCHANGE) {
++ reg_timer_r_tmr0_data data;
++ reg_timer_rw_tmr0_div div = (freqs->new * 500) / HZ;
++ do
++ {
++ data = REG_RD(timer, timer_regs[freqs->cpu], r_tmr0_data);
++ } while (data > 20);
++ REG_WR(timer, timer_regs[freqs->cpu], rw_tmr0_div, div);
++ }
++ return 0;
+ }
++#endif
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/traps.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/traps.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/traps.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/traps.c 2006-12-11 14:04:24.000000000 +0100
+@@ -1,50 +1,43 @@
+ /*
+- * Copyright (C) 2003, Axis Communications AB.
++ * Copyright (C) 2003-2006, Axis Communications AB.
+ */
+
+ #include <linux/ptrace.h>
+ #include <asm/uaccess.h>
+-
+ #include <asm/arch/hwregs/supp_reg.h>
+-
+-extern void reset_watchdog(void);
+-extern void stop_watchdog(void);
+-
+-extern int raw_printk(const char *fmt, ...);
++#include <asm/arch/hwregs/intr_vect_defs.h>
+
+ void
+ show_registers(struct pt_regs *regs)
+ {
+ /*
+ * It's possible to use either the USP register or current->thread.usp.
+- * USP might not correspond to the current proccess for all cases this
++ * USP might not correspond to the current process for all cases this
+ * function is called, and current->thread.usp isn't up to date for the
+- * current proccess. Experience shows that using USP is the way to go.
++ * current process. Experience shows that using USP is the way to go.
+ */
+- unsigned long usp;
++ unsigned long usp = rdusp();
+ unsigned long d_mmu_cause;
+ unsigned long i_mmu_cause;
+
+- usp = rdusp();
++ printk("CPU: %d\n", smp_processor_id());
+
+- raw_printk("CPU: %d\n", smp_processor_id());
++ printk("ERP: %08lx SRP: %08lx CCS: %08lx USP: %08lx MOF: %08lx\n",
++ regs->erp, regs->srp, regs->ccs, usp, regs->mof);
+
+- raw_printk("ERP: %08lx SRP: %08lx CCS: %08lx USP: %08lx MOF: %08lx\n",
+- regs->erp, regs->srp, regs->ccs, usp, regs->mof);
++ printk(" r0: %08lx r1: %08lx r2: %08lx r3: %08lx\n",
++ regs->r0, regs->r1, regs->r2, regs->r3);
+
+- raw_printk(" r0: %08lx r1: %08lx r2: %08lx r3: %08lx\n",
+- regs->r0, regs->r1, regs->r2, regs->r3);
++ printk(" r4: %08lx r5: %08lx r6: %08lx r7: %08lx\n",
++ regs->r4, regs->r5, regs->r6, regs->r7);
+
+- raw_printk(" r4: %08lx r5: %08lx r6: %08lx r7: %08lx\n",
+- regs->r4, regs->r5, regs->r6, regs->r7);
++ printk(" r8: %08lx r9: %08lx r10: %08lx r11: %08lx\n",
++ regs->r8, regs->r9, regs->r10, regs->r11);
+
+- raw_printk(" r8: %08lx r9: %08lx r10: %08lx r11: %08lx\n",
+- regs->r8, regs->r9, regs->r10, regs->r11);
++ printk("r12: %08lx r13: %08lx oR10: %08lx acr: %08lx\n",
++ regs->r12, regs->r13, regs->orig_r10, regs->acr);
+
+- raw_printk("r12: %08lx r13: %08lx oR10: %08lx acr: %08lx\n",
+- regs->r12, regs->r13, regs->orig_r10, regs->acr);
+-
+- raw_printk("sp: %08lx\n", regs);
++ printk(" sp: %08lx\n", (unsigned long)regs);
+
+ SUPP_BANK_SEL(BANK_IM);
+ SUPP_REG_RD(RW_MM_CAUSE, i_mmu_cause);
+@@ -52,18 +45,20 @@
+ SUPP_BANK_SEL(BANK_DM);
+ SUPP_REG_RD(RW_MM_CAUSE, d_mmu_cause);
+
+- raw_printk(" Data MMU Cause: %08lx\n", d_mmu_cause);
+- raw_printk("Instruction MMU Cause: %08lx\n", i_mmu_cause);
++ printk(" Data MMU Cause: %08lx\n", d_mmu_cause);
++ printk("Instruction MMU Cause: %08lx\n", i_mmu_cause);
+
+- raw_printk("Process %s (pid: %d, stackpage: %08lx)\n",
+- current->comm, current->pid, (unsigned long) current);
++ printk("Process %s (pid: %d, stackpage=%08lx)\n",
++ current->comm, current->pid, (unsigned long)current);
+
+- /* Show additional info if in kernel-mode. */
++ /*
++ * When in-kernel, we also print out the stack and code at the
++ * time of the fault..
++ */
+ if (!user_mode(regs)) {
+ int i;
+- unsigned char c;
+
+- show_stack(NULL, (unsigned long *) usp);
++ show_stack(NULL, (unsigned long *)usp);
+
+ /*
+ * If the previous stack-dump wasn't a kernel one, dump the
+@@ -72,7 +67,7 @@
+ if (usp != 0)
+ show_stack(NULL, NULL);
+
+- raw_printk("\nCode: ");
++ printk("\nCode: ");
+
+ if (regs->erp < PAGE_OFFSET)
+ goto bad_value;
+@@ -84,76 +79,65 @@
+ * instruction decoding should be in sync at the interesting
+ * point, but small enough to fit on a row. The regs->erp
+ * location is pointed out in a ksymoops-friendly way by
+- * wrapping the byte for that address in parenthesis.
++ * wrapping the byte for that address in parenthesises.
+ */
+ for (i = -12; i < 12; i++) {
+- if (__get_user(c, &((unsigned char *) regs->erp)[i])) {
++ unsigned char c;
++
++ if (__get_user(c, &((unsigned char *)regs->erp)[i])) {
+ bad_value:
+- raw_printk(" Bad IP value.");
++ printk(" Bad IP value.");
+ break;
+ }
+
+ if (i == 0)
+- raw_printk("(%02x) ", c);
++ printk("(%02x) ", c);
+ else
+- raw_printk("%02x ", c);
++ printk("%02x ", c);
+ }
+-
+- raw_printk("\n");
++ printk("\n");
+ }
+ }
+
+-/*
+- * This gets called from entry.S when the watchdog has bitten. Show something
+- * similiar to an Oops dump, and if the kernel if configured to be a nice doggy;
+- * halt instead of reboot.
+- */
+ void
+-watchdog_bite_hook(struct pt_regs *regs)
++arch_enable_nmi(void)
+ {
+-#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
+- local_irq_disable();
+- stop_watchdog();
+- show_registers(regs);
+-
+- while (1)
+- ; /* Do nothing. */
+-#else
+- show_registers(regs);
+-#endif
++ unsigned long flags;
++
++ local_save_flags(flags);
++ flags |= (1 << 30); /* NMI M flag is at bit 30 */
++ local_irq_restore(flags);
+ }
+
+-/* This is normally the Oops function. */
+-void
+-die_if_kernel(const char *str, struct pt_regs *regs, long err)
++extern void (*nmi_handler)(struct pt_regs*);
++void handle_nmi(struct pt_regs* regs)
+ {
+- if (user_mode(regs))
+- return;
++ reg_intr_vect_r_nmi r;
+
+-#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
+- /*
+- * This printout might take too long and could trigger
+- * the watchdog normally. If NICE_DOGGY is set, simply
+- * stop the watchdog during the printout.
+- */
+- stop_watchdog();
+-#endif
+-
+- raw_printk("%s: %04lx\n", str, err & 0xffff);
++ if (nmi_handler)
++ nmi_handler(regs);
+
+- show_registers(regs);
+-
+-#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
+- reset_watchdog();
+-#endif
+-
+- do_exit(SIGSEGV);
++ /* Wait until nmi is no longer active. */
++ do {
++ r = REG_RD(intr_vect, regi_irq, r_nmi);
++ } while (r.ext == regk_intr_vect_on);
+ }
+
+-void arch_enable_nmi(void)
++#ifdef CONFIG_DEBUG_BUGVERBOSE
++void
++handle_BUG(struct pt_regs *regs)
+ {
+- unsigned long flags;
+- local_save_flags(flags);
+- flags |= (1<<30); /* NMI M flag is at bit 30 */
+- local_irq_restore(flags);
++ struct bug_frame f;
++ unsigned char c;
++ unsigned long erp = regs->erp;
++
++ if (__copy_from_user(&f, (const void __user *)(erp - 8), sizeof f))
++ return;
++ if (f.prefix != BUG_PREFIX || f.magic != BUG_MAGIC)
++ return;
++ if (__get_user(c, f.filename))
++ f.filename = "<bad filename>";
++
++ printk("kernel BUG at %s:%d!\n", f.filename, f.line);
+ }
++#endif
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/vcs_hook.c linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/vcs_hook.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/vcs_hook.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/vcs_hook.c 1970-01-01 01:00:00.000000000 +0100
+@@ -1,96 +0,0 @@
+-// $Id: vcs_hook.c,v 1.2 2003/08/12 12:01:06 starvik Exp $
+-//
+-// Call simulator hook. This is the part running in the
+-// simulated program.
+-//
+-
+-#include "vcs_hook.h"
+-#include <stdarg.h>
+-#include <asm/arch-v32/hwregs/reg_map.h>
+-#include <asm/arch-v32/hwregs/intr_vect_defs.h>
+-
+-#define HOOK_TRIG_ADDR 0xb7000000 /* hook cvlog model reg address */
+-#define HOOK_MEM_BASE_ADDR 0xa0000000 /* csp4 (shared mem) base addr */
+-
+-#define HOOK_DATA(offset) ((unsigned*) HOOK_MEM_BASE_ADDR)[offset]
+-#define VHOOK_DATA(offset) ((volatile unsigned*) HOOK_MEM_BASE_ADDR)[offset]
+-#define HOOK_TRIG(funcid) do { *((unsigned *) HOOK_TRIG_ADDR) = funcid; } while(0)
+-#define HOOK_DATA_BYTE(offset) ((unsigned char*) HOOK_MEM_BASE_ADDR)[offset]
+-
+-
+-// ------------------------------------------------------------------ hook_call
+-int hook_call( unsigned id, unsigned pcnt, ...) {
+- va_list ap;
+- unsigned i;
+- unsigned ret;
+-#ifdef USING_SOS
+- PREEMPT_OFF_SAVE();
+-#endif
+-
+- // pass parameters
+- HOOK_DATA(0) = id;
+-
+- /* Have to make hook_print_str a special case since we call with a
+- parameter of byte type. Should perhaps be a separate
+- hook_call. */
+-
+- if (id == hook_print_str) {
+- int i;
+- char *str;
+-
+- HOOK_DATA(1) = pcnt;
+-
+- va_start(ap, pcnt);
+- str = (char*)va_arg(ap,unsigned);
+-
+- for (i=0; i!=pcnt; i++) {
+- HOOK_DATA_BYTE(8+i) = str[i];
+- }
+- HOOK_DATA_BYTE(8+i) = 0; /* null byte */
+- }
+- else {
+- va_start(ap, pcnt);
+- for( i = 1; i <= pcnt; i++ ) HOOK_DATA(i) = va_arg(ap,unsigned);
+- va_end(ap);
+- }
+-
+- // read from mem to make sure data has propagated to memory before trigging
+- *((volatile unsigned*) HOOK_MEM_BASE_ADDR);
+-
+- // trigger hook
+- HOOK_TRIG(id);
+-
+- // wait for call to finish
+- while( VHOOK_DATA(0) > 0 ) {}
+-
+- // extract return value
+-
+- ret = VHOOK_DATA(1);
+-
+-#ifdef USING_SOS
+- PREEMPT_RESTORE();
+-#endif
+- return ret;
+-}
+-
+-unsigned
+-hook_buf(unsigned i)
+-{
+- return (HOOK_DATA(i));
+-}
+-
+-void print_str( const char *str ) {
+- int i;
+- for (i=1; str[i]; i++); /* find null at end of string */
+- hook_call(hook_print_str, i, str);
+-}
+-
+-// --------------------------------------------------------------- CPU_KICK_DOG
+-void CPU_KICK_DOG(void) {
+- (void) hook_call( hook_kick_dog, 0 );
+-}
+-
+-// ------------------------------------------------------- CPU_WATCHDOG_TIMEOUT
+-void CPU_WATCHDOG_TIMEOUT( unsigned t ) {
+- (void) hook_call( hook_dog_timeout, 1, t );
+-}
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/kernel/vcs_hook.h linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/vcs_hook.h
+--- linux-2.6.19.2.old/arch/cris/arch-v32/kernel/vcs_hook.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/kernel/vcs_hook.h 1970-01-01 01:00:00.000000000 +0100
+@@ -1,42 +0,0 @@
+-// $Id: vcs_hook.h,v 1.1 2003/08/12 12:01:06 starvik Exp $
+-//
+-// Call simulator hook functions
+-
+-#ifndef HOOK_H
+-#define HOOK_H
+-
+-int hook_call( unsigned id, unsigned pcnt, ...);
+-
+-enum hook_ids {
+- hook_debug_on = 1,
+- hook_debug_off,
+- hook_stop_sim_ok,
+- hook_stop_sim_fail,
+- hook_alloc_shared,
+- hook_ptr_shared,
+- hook_free_shared,
+- hook_file2shared,
+- hook_cmp_shared,
+- hook_print_params,
+- hook_sim_time,
+- hook_stop_sim,
+- hook_kick_dog,
+- hook_dog_timeout,
+- hook_rand,
+- hook_srand,
+- hook_rand_range,
+- hook_print_str,
+- hook_print_hex,
+- hook_cmp_offset_shared,
+- hook_fill_random_shared,
+- hook_alloc_random_data,
+- hook_calloc_random_data,
+- hook_print_int,
+- hook_print_uint,
+- hook_fputc,
+- hook_init_fd,
+- hook_sbrk
+-
+-};
+-
+-#endif
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/lib/Makefile linux-2.6.19.2.dev/arch/cris/arch-v32/lib/Makefile
+--- linux-2.6.19.2.old/arch/cris/arch-v32/lib/Makefile 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/lib/Makefile 2006-10-11 19:29:20.000000000 +0200
+@@ -2,5 +2,5 @@
+ # Makefile for Etrax-specific library files..
+ #
+
+-lib-y = checksum.o checksumcopy.o string.o usercopy.o memset.o csumcpfruser.o spinlock.o
++lib-y = checksum.o checksumcopy.o string.o usercopy.o memset.o csumcpfruser.o spinlock.o delay.o
+
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/lib/checksum.S linux-2.6.19.2.dev/arch/cris/arch-v32/lib/checksum.S
+--- linux-2.6.19.2.old/arch/cris/arch-v32/lib/checksum.S 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/lib/checksum.S 2005-08-15 15:53:12.000000000 +0200
+@@ -7,15 +7,15 @@
+
+ .globl csum_partial
+ csum_partial:
+-
++
+ ;; r10 - src
+ ;; r11 - length
+ ;; r12 - checksum
+
+ ;; check for breakeven length between movem and normal word looping versions
+- ;; we also do _NOT_ want to compute a checksum over more than the
++ ;; we also do _NOT_ want to compute a checksum over more than the
+ ;; actual length when length < 40
+-
++
+ cmpu.w 80,$r11
+ blo _word_loop
+ nop
+@@ -24,17 +24,17 @@
+ ;; this overhead is why we have a check above for breakeven length
+ ;; only r0 - r8 have to be saved, the other ones are clobber-able
+ ;; according to the ABI
+-
++
+ subq 9*4,$sp
+ subq 10*4,$r11 ; update length for the first loop
+ movem $r8,[$sp]
+-
++
+ ;; do a movem checksum
+
+ _mloop: movem [$r10+],$r9 ; read 10 longwords
+
+ ;; perform dword checksumming on the 10 longwords
+-
++
+ add.d $r0,$r12
+ addc $r1,$r12
+ addc $r2,$r12
+@@ -48,9 +48,8 @@
+
+ ;; fold the carry into the checksum, to avoid having to loop the carry
+ ;; back into the top
+-
++
+ addc 0,$r12
+- addc 0,$r12 ; do it again, since we might have generated a carry
+
+ subq 10*4,$r11
+ bge _mloop
+@@ -68,34 +67,30 @@
+
+ ;; fold 32-bit checksum into a 16-bit checksum, to avoid carries below.
+ ;; r9 and r13 can be used as temporaries.
+-
++
+ moveq -1,$r9 ; put 0xffff in r9, faster than move.d 0xffff,r9
+ lsrq 16,$r9
+-
++
+ move.d $r12,$r13
+ lsrq 16,$r13 ; r13 = checksum >> 16
+ and.d $r9,$r12 ; checksum = checksum & 0xffff
+ add.d $r13,$r12 ; checksum += r13
+- move.d $r12,$r13 ; do the same again, maybe we got a carry last add
+- lsrq 16,$r13
+- and.d $r9,$r12
+- add.d $r13,$r12
+
+ _no_fold:
+ cmpq 2,$r11
+ blt _no_words
+ nop
+-
++
+ ;; checksum the rest of the words
+-
++
+ subq 2,$r11
+-
++
+ _wloop: subq 2,$r11
+ bge _wloop
+ addu.w [$r10+],$r12
+-
++
+ addq 2,$r11
+-
++
+ _no_words:
+ ;; see if we have one odd byte more
+ cmpq 1,$r11
+@@ -104,7 +99,7 @@
+ ret
+ move.d $r12,$r10
+
+-_do_byte:
++_do_byte:
+ ;; copy and checksum the last byte
+ addu.b [$r10],$r12
+ ret
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/lib/checksumcopy.S linux-2.6.19.2.dev/arch/cris/arch-v32/lib/checksumcopy.S
+--- linux-2.6.19.2.old/arch/cris/arch-v32/lib/checksumcopy.S 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/lib/checksumcopy.S 2005-08-15 15:53:12.000000000 +0200
+@@ -3,23 +3,23 @@
+ * Copyright (c) 1998, 2001, 2003 Axis Communications AB
+ *
+ * Authors: Bjorn Wesen
+- *
++ *
+ * csum_partial_copy_nocheck(const char *src, char *dst,
+ * int len, unsigned int sum)
+ */
+
+ .globl csum_partial_copy_nocheck
+-csum_partial_copy_nocheck:
+-
++csum_partial_copy_nocheck:
++
+ ;; r10 - src
+ ;; r11 - dst
+ ;; r12 - length
+ ;; r13 - checksum
+
+ ;; check for breakeven length between movem and normal word looping versions
+- ;; we also do _NOT_ want to compute a checksum over more than the
++ ;; we also do _NOT_ want to compute a checksum over more than the
+ ;; actual length when length < 40
+-
++
+ cmpu.w 80,$r12
+ blo _word_loop
+ nop
+@@ -28,19 +28,19 @@
+ ;; this overhead is why we have a check above for breakeven length
+ ;; only r0 - r8 have to be saved, the other ones are clobber-able
+ ;; according to the ABI
+-
++
+ subq 9*4,$sp
+ subq 10*4,$r12 ; update length for the first loop
+ movem $r8,[$sp]
+-
++
+ ;; do a movem copy and checksum
+-
++
+ 1: ;; A failing userspace access (the read) will have this as PC.
+ _mloop: movem [$r10+],$r9 ; read 10 longwords
+ movem $r9,[$r11+] ; write 10 longwords
+
+ ;; perform dword checksumming on the 10 longwords
+-
++
+ add.d $r0,$r13
+ addc $r1,$r13
+ addc $r2,$r13
+@@ -54,9 +54,8 @@
+
+ ;; fold the carry into the checksum, to avoid having to loop the carry
+ ;; back into the top
+-
++
+ addc 0,$r13
+- addc 0,$r13 ; do it again, since we might have generated a carry
+
+ subq 10*4,$r12
+ bge _mloop
+@@ -74,34 +73,30 @@
+
+ ;; fold 32-bit checksum into a 16-bit checksum, to avoid carries below
+ ;; r9 can be used as temporary.
+-
++
+ move.d $r13,$r9
+ lsrq 16,$r9 ; r0 = checksum >> 16
+ and.d 0xffff,$r13 ; checksum = checksum & 0xffff
+ add.d $r9,$r13 ; checksum += r0
+- move.d $r13,$r9 ; do the same again, maybe we got a carry last add
+- lsrq 16,$r9
+- and.d 0xffff,$r13
+- add.d $r9,$r13
+-
++
+ _no_fold:
+ cmpq 2,$r12
+ blt _no_words
+ nop
+-
++
+ ;; copy and checksum the rest of the words
+-
++
+ subq 2,$r12
+-
++
+ 2: ;; A failing userspace access for the read below will have this as PC.
+ _wloop: move.w [$r10+],$r9
+ addu.w $r9,$r13
+ subq 2,$r12
+ bge _wloop
+ move.w $r9,[$r11+]
+-
++
+ addq 2,$r12
+-
++
+ _no_words:
+ ;; see if we have one odd byte more
+ cmpq 1,$r12
+@@ -110,7 +105,7 @@
+ ret
+ move.d $r13,$r10
+
+-_do_byte:
++_do_byte:
+ ;; copy and checksum the last byte
+ 3: ;; A failing userspace access for the read below will have this as PC.
+ move.b [$r10],$r9
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/lib/delay.c linux-2.6.19.2.dev/arch/cris/arch-v32/lib/delay.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/lib/delay.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/lib/delay.c 2006-10-16 01:08:41.000000000 +0200
+@@ -0,0 +1,28 @@
++/*
++ * Precise Delay Loops for ETRAX FS
++ *
++ * Copyright (C) 2006 Axis Communications AB.
++ *
++ */
++
++#include <asm/arch/hwregs/reg_map.h>
++#include <asm/arch/hwregs/reg_rdwr.h>
++#include <asm/arch/hwregs/timer_defs.h>
++#include <linux/types.h>
++#include <linux/delay.h>
++#include <linux/module.h>
++
++/*
++ * On ETRAX FS, we can check the free-running read-only 100MHz timer
++ * getting 32-bit 10ns precision, theoretically good for 42.94967295
++ * seconds. Unsigned arithmetic and careful expression handles
++ * wrapping.
++ */
++
++void cris_delay10ns(u32 n10ns)
++{
++ u32 t0 = REG_RD(timer, regi_timer, r_time);
++ while (REG_RD(timer, regi_timer, r_time) - t0 < n10ns)
++ ;
++}
++EXPORT_SYMBOL(cris_delay10ns);
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/lib/dram_init.S linux-2.6.19.2.dev/arch/cris/arch-v32/lib/dram_init.S
+--- linux-2.6.19.2.old/arch/cris/arch-v32/lib/dram_init.S 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/lib/dram_init.S 2006-11-28 11:06:19.000000000 +0100
+@@ -1,14 +1,14 @@
+-/* $Id: dram_init.S,v 1.4 2005/04/24 18:48:32 starvik Exp $
+- *
++/* $Id: dram_init.S,v 1.9 2006/11/28 10:06:19 ricardw Exp $
++ *
+ * DRAM/SDRAM initialization - alter with care
+ * This file is intended to be included from other assembler files
+ *
+- * Note: This file may not modify r8 or r9 because they are used to
+- * carry information from the decompresser to the kernel
++ * Note: This file may not modify r8 .. r12 because they are used to
++ * carry information from the decompressor to the kernel
+ *
+ * Copyright (C) 2000-2003 Axis Communications AB
+ *
+- * Authors: Mikael Starvik (starvik@axis.com)
++ * Authors: Mikael Starvik (starvik@axis.com)
+ */
+
+ /* Just to be certain the config file is included, we include it here
+@@ -18,13 +18,13 @@
+
+ #include <asm/arch/hwregs/asm/reg_map_asm.h>
+ #include <asm/arch/hwregs/asm/bif_core_defs_asm.h>
+-
+- ;; WARNING! The registers r8 and r9 are used as parameters carrying
+- ;; information from the decompressor (if the kernel was compressed).
++
++ ;; WARNING! The registers r8 .. r12 are used as parameters carrying
++ ;; information from the decompressor (if the kernel was compressed).
+ ;; They should not be used in the code below.
+
+ ; Refer to BIF MDS for a description of SDRAM initialization
+-
++
+ ; Bank configuration
+ move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp0), $r0
+ move.d CONFIG_ETRAX_SDRAM_GRP0_CONFIG, $r1
+@@ -33,7 +33,7 @@
+ move.d CONFIG_ETRAX_SDRAM_GRP1_CONFIG, $r1
+ move.d $r1, [$r0]
+
+- ; Calculate value of mrs_data
++ ; Calculate value of mrs_data
+ ; CAS latency = 2 && bus_width = 32 => 0x40
+ ; CAS latency = 3 && bus_width = 32 => 0x60
+ ; CAS latency = 2 && bus_width = 16 => 0x20
+@@ -43,7 +43,7 @@
+ move.d CONFIG_ETRAX_SDRAM_COMMAND, $r2
+ bne _set_timing
+ nop
+-
++
+ move.d 0x40, $r4 ; Assume 32 bits and CAS latency = 2
+ move.d CONFIG_ETRAX_SDRAM_TIMING, $r1
+ and.d 0x07, $r1 ; Get CAS latency
+@@ -51,7 +51,7 @@
+ beq _bw_check
+ nop
+ move.d 0x60, $r4
+-
++
+ _bw_check:
+ ; Assume that group 0 width is equal to group 1. This assumption
+ ; is wrong for a group 1 only hardware (such as the grand old
+@@ -67,23 +67,27 @@
+ move.d CONFIG_ETRAX_SDRAM_TIMING, $r1
+ and.d ~(3 << reg_bif_core_rw_sdram_timing___ref___lsb), $r1
+ move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing), $r0
+- move.d $r1, [$r0]
++ move.d $r1, [$r0]
++
++ ; Wait 200us
++ move.d 10000, $r2
++1: bne 1b
++ subq 1, $r2
+
+ ; Issue NOP command
+ move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cmd), $r5
+ moveq regk_bif_core_nop, $r1
+ move.d $r1, [$r5]
+-
++
+ ; Wait 200us
+ move.d 10000, $r2
+ 1: bne 1b
+ subq 1, $r2
+-
++
+ ; Issue initialization command sequence
+- move.d _sdram_commands_start, $r2
+- and.d 0x000fffff, $r2 ; Make sure commands are read from flash
+- move.d _sdram_commands_end, $r3
+- and.d 0x000fffff, $r3
++ lapc.d _sdram_commands_start, $r2 ; position-independent
++ lapc.d _sdram_commands_end, $r3 ; position-independent
++
+ 1: clear.d $r6
+ move.b [$r2+], $r6 ; Load command
+ or.d $r4, $r6 ; Add calculated mrs
+@@ -100,7 +104,7 @@
+ move.d CONFIG_ETRAX_SDRAM_TIMING, $r1
+ move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing), $r0
+ move.d $r1, [$r0]
+-
++
+ ; Initialization finished
+ ba _sdram_commands_end
+ nop
+@@ -116,4 +120,4 @@
+ .byte regk_bif_core_ref ; refresh
+ .byte regk_bif_core_ref ; refresh
+ .byte regk_bif_core_mrs ; mrs
+-_sdram_commands_end:
++_sdram_commands_end:
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/lib/hw_settings.S linux-2.6.19.2.dev/arch/cris/arch-v32/lib/hw_settings.S
+--- linux-2.6.19.2.old/arch/cris/arch-v32/lib/hw_settings.S 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/lib/hw_settings.S 2006-10-13 14:43:15.000000000 +0200
+@@ -1,25 +1,25 @@
+ /*
+- * $Id: hw_settings.S,v 1.3 2005/04/24 18:36:57 starvik Exp $
+- *
++ * $Id: hw_settings.S,v 1.5 2006/10/13 12:43:15 starvik Exp $
++ *
+ * This table is used by some tools to extract hardware parameters.
+ * The table should be included in the kernel and the decompressor.
+ * Don't forget to update the tools if you change this table.
+ *
+ * Copyright (C) 2001 Axis Communications AB
+ *
+- * Authors: Mikael Starvik (starvik@axis.com)
++ * Authors: Mikael Starvik (starvik@axis.com)
+ */
+
+ #include <asm/arch/hwregs/asm/reg_map_asm.h>
+ #include <asm/arch/hwregs/asm/bif_core_defs_asm.h>
+ #include <asm/arch/hwregs/asm/gio_defs_asm.h>
+-
++
+ .ascii "HW_PARAM_MAGIC" ; Magic number
+ .dword 0xc0004000 ; Kernel start address
+
+ ; Debug port
+ #ifdef CONFIG_ETRAX_DEBUG_PORT0
+- .dword 0
++ .dword 0
+ #elif defined(CONFIG_ETRAX_DEBUG_PORT1)
+ .dword 1
+ #elif defined(CONFIG_ETRAX_DEBUG_PORT2)
+@@ -28,9 +28,9 @@
+ .dword 3
+ #else
+ .dword 4 ; No debug
+-#endif
++#endif
+
+- ; Register values
++ ; Register values
+ .dword REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg)
+ .dword CONFIG_ETRAX_MEM_GRP1_CONFIG
+ .dword REG_ADDR(bif_core, regi_bif_core, rw_grp2_cfg)
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/lib/memset.c linux-2.6.19.2.dev/arch/cris/arch-v32/lib/memset.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/lib/memset.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/lib/memset.c 2003-07-02 05:00:14.000000000 +0200
+@@ -66,7 +66,7 @@
+
+ {
+ register char *dst __asm__ ("r13") = pdst;
+-
++
+ /* This is NONPORTABLE, but since this whole routine is */
+ /* grossly nonportable that doesn't matter. */
+
+@@ -156,7 +156,7 @@
+ }
+
+ /* Either we directly starts copying, using dword copying
+- in a loop, or we copy as much as possible with 'movem'
++ in a loop, or we copy as much as possible with 'movem'
+ and then the last block (<44 bytes) is copied here.
+ This will work since 'movem' will have updated src,dst,n. */
+
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/lib/nand_init.S linux-2.6.19.2.dev/arch/cris/arch-v32/lib/nand_init.S
+--- linux-2.6.19.2.old/arch/cris/arch-v32/lib/nand_init.S 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/lib/nand_init.S 2007-01-31 16:52:19.000000000 +0100
+@@ -9,14 +9,16 @@
+ ##
+ ## Some notes about the bug/feature for future reference:
+ ## The bootrom copies the first 127 KB from NAND flash to internal
+-## memory. The problem is that it does a bytewise copy. NAND flashes
+-## does autoincrement on the address so for a 16-bite device each
+-## read/write increases the address by two. So the copy loop in the
++## memory. The problem is that it does a bytewise copy, copying
++## a single byte from the lowest byte of the bus for each address.
++## NAND flashes autoincrement on the address so for a 16 bit device
++## each read/write increases the address by two. So the copy loop in the
+ ## bootrom will discard every second byte. This is solved by inserting
+-## zeroes in every second byte in the first erase block.
++## zeroes in every second byte in the first erase block, in order
++## to get contiguous code.
+ ##
+ ## The bootrom also incorrectly assumes that it can read the flash
+-## linear with only one read command but the flash will actually
++## linearly with only one read command but the flash will actually
+ ## switch between normal area and spare area if you do that so we
+ ## can't trust more than the first 256 bytes.
+ ##
+@@ -29,14 +31,16 @@
+ #include <asm/arch/hwregs/asm/config_defs_asm.h>
+
+ ;; There are 8-bit NAND flashes and 16-bit NAND flashes.
+-;; We need to treat them slightly different.
+-#if CONFIG_ETRAX_FLASH_BUSWIDTH==2
+-#define PAGE_SIZE 256
++;; We need to treat them slightly differently.
++#if CONFIG_ETRAX_NANDFLASH_BUSWIDTH==2
++#define PAGE_SIZE_ADDRESSES 256
+ #else
+-#error 2
+-#define PAGE_SIZE 512
++#define PAGE_SIZE_ADDRESSES 512
+ #endif
++
++;; Block size for erase
+ #define ERASE_BLOCK 16384
++#define PAGE_SIZE_BYTES 512
+
+ ;; GPIO pins connected to NAND flash
+ #define CE 4
+@@ -49,6 +53,7 @@
+ #define NAND_WR_ADDR 0x94000000
+
+ #define READ_CMD 0x00
++#define RESET_CMD 0xFF
+
+ ;; Readability macros
+ #define CSP_MASK \
+@@ -58,6 +63,10 @@
+ REG_STATE(bif_core, rw_grp3_cfg, gated_csp0, rd) | \
+ REG_STATE(bif_core, rw_grp3_cfg, gated_csp1, wr)
+
++;; Normally we initialize GPIO and bus interfaces.
++;; This is strictly not necessary; boot ROM does this for us.
++#define INTERFACE_SETUP (1)
++
+ ;;----------------------------------------------------------------------------
+ ;; Macros to set/clear GPIO bits
+
+@@ -71,16 +80,41 @@
+ move.d $r9, [$r2]
+ .endm
+
++.macro GPIO_SYNC
++;; Originally, we read back data written to nand flash in order
++;; to flush the pipeline. It turned out however, that the real
++;; culprit was a lack of wait states.
++;; This macro remains in the code however in case this conclusion
++;; is wrong too.
++;;
++;; move.d [$r2], $r9 ; read back to flush pipeline
++.endm
++
+ ;;----------------------------------------------------------------------------
++;; Read value from bus to temporary register to sync with previous write
++;; This generates no signal to the NAND flash, since only chip select lines are
++;; pulled out to the chip, and read is not gated with chip select for the write
++;; area.
+
+-nand_boot:
+- ;; Check if nand boot was selected
+- move.d REG_ADDR(config, regi_config, r_bootsel), $r0
+- move.d [$r0], $r0
+- and.d REG_MASK(config, r_bootsel, boot_mode), $r0
+- cmp.d REG_STATE(config, r_bootsel, boot_mode, nand), $r0
+- bne normal_boot ; No NAND boot
+- nop
++.macro BUS_SYNC r
++ move.b [$r1], \r
++.endm
++
++;;----------------------------------------------------------------------------
++;; Delay macro
++;; x = delay = 10*x + 20 ns, e.g. DELAY 25 => 270ns delay, max 63 (650 ns)
++;;(@200Mc)
++;; r is temp reg used
++;; Macro currently not used, save for a rainy day.
++
++.macro DELAY x, r
++ clear.d \r
++ addq (\x),\r ; addq zero-extends its argument
++7: bne 7b
++ subq 1, \r
++.endm
++
++;;----------------------------------------------------------------------------
+
+ copy_nand_to_ram:
+ ;; copy_nand_to_ram
+@@ -88,7 +122,6 @@
+ ;; r10 - destination
+ ;; r11 - source offset
+ ;; r12 - size
+- ;; r13 - Address to jump to after completion
+ ;; Note : r10-r12 are clobbered on return
+ ;; Registers used:
+ ;; r0 - NAND_RD_ADDR
+@@ -96,83 +129,99 @@
+ ;; r2 - reg_gio_rw_pa_dout
+ ;; r3 - reg_gio_r_pa_din
+ ;; r4 - tmp
+- ;; r5 - byte counter within a page
+- ;; r6 - reg_pinmux_rw_pa
+- ;; r7 - reg_gio_rw_pa_oe
+- ;; r8 - reg_bif_core_rw_grp3_cfg
++ ;; r5 - byte counter within a page / tmp2
++ ;; r6 - r_bootsel masked w/ 0x18
++ ;; r7 - n/u
++ ;; r8 - n/u
+ ;; r9 - reg_gio_rw_pa_dout shadow
+- move.d 0x90000000, $r0
+- move.d 0x94000000, $r1
++ move.d NAND_RD_ADDR, $r0
++ move.d NAND_WR_ADDR, $r1
+ move.d REG_ADDR(gio, regi_gio, rw_pa_dout), $r2
+ move.d REG_ADDR(gio, regi_gio, r_pa_din), $r3
+- move.d REG_ADDR(pinmux, regi_pinmux, rw_pa), $r6
+- move.d REG_ADDR(gio, regi_gio, rw_pa_oe), $r7
+- move.d REG_ADDR(bif_core, regi_bif_core, rw_grp3_cfg), $r8
+
+-#if CONFIG_ETRAX_FLASH_BUSWIDTH==2
++#if CONFIG_ETRAX_NANDFLASH_BUSWIDTH==2
+ lsrq 1, $r11
+ #endif
++
++#if INTERFACE_SETUP
++ ;; Set up pinmux
++ move.d REG_ADDR(pinmux, regi_pinmux, rw_pa), $r5
++ move.d [$r5], $r4
++ or.b 0xf0, $r4 ; bits 4,5,6,7
++ move.d $r4, [$r5]
++
+ ;; Set up GPIO
+- move.d [$r2], $r9
+- move.d [$r7], $r4
++ move.d REG_ADDR(gio, regi_gio, rw_pa_oe), $r5
++ move.d [$r5], $r4
+ or.b (1<<ALE) | (1 << CLE) | (1<<CE), $r4
+- move.d $r4, [$r7]
++ move.d $r4, [$r5]
+
++#endif
+ ;; Set up bif
+- move.d [$r8], $r4
+- and.d CSP_MASK, $r4
++ move.d REG_ADDR(bif_core, regi_bif_core, rw_grp3_cfg), $r5
++ move.d CONFIG_ETRAX_MEM_GRP3_CONFIG, $r4 ; wait states
++ and.d ~CSP_MASK, $r4
+ or.d CSP_VAL, $r4
+- move.d $r4, [$r8]
++ move.d $r4, [$r5]
++
++ move.d [$r2], $r9 ; fetch PA DOUT to shadow register
++
++ ;; figure out how many address cycles the flash needs
++ move.d REG_ADDR(config, regi_config, r_bootsel), $r5
++ move.d [$r5], $r6
++ andq 0x18, $r6 ; mask out bs3,4 (00=>3, 08=>4, 18=>5 cycles)
+
+ 1: ;; Copy one page
+ CLR CE
+ SET CLE
++ GPIO_SYNC
+ moveq READ_CMD, $r4
+ move.b $r4, [$r1]
+- moveq 20, $r4
+-2: bne 2b
+- subq 1, $r4
++ BUS_SYNC $r4
+ CLR CLE
+ SET ALE
+- clear.w [$r1] ; Column address = 0
+- move.d $r11, $r4
++ GPIO_SYNC
++ clear.b [$r1] ; Column address = 0
++ move.d $r11, $r4 ; Address
++ lsrq 9, $r4 ; Row address is A9 and up
++ move.b $r4, [$r1] ; Row address byte #0
+ lsrq 8, $r4
+- move.b $r4, [$r1] ; Row address
++ cmpq 0x08, $r6 ; 8 => Z, 0 => C, 18h => NZ,NC
++ bcs 4f ; C (3 cycles) => jump
++ move.b $r4, [$r1] ; Row address byte #1 (DELAY SLOT) (no flagset)
++ beq 3f ; Z (4 cycles) => jump
++ lsrq 8, $r4 ; (DELAY SLOT)
++ move.b $r4, [$r1] ; Row address byte #2 (5 cyc only)
+ lsrq 8, $r4
+- move.b $r4, [$r1] ; Row adddress
+- moveq 20, $r4
+-2: bne 2b
+- subq 1, $r4
++3:
++ move.b $r4, [$r1] ; Row address byte #3 (5 cyc) or #2 (4 cyc)
++4:
++ BUS_SYNC $r4
+ CLR ALE
++ GPIO_SYNC
++
+ 2: move.d [$r3], $r4
+ and.d 1 << BY, $r4
+ beq 2b
+- movu.w PAGE_SIZE, $r5
++ nop
++ movu.w PAGE_SIZE_ADDRESSES, $r5
+ 2: ; Copy one byte/word
+-#if CONFIG_ETRAX_FLASH_BUSWIDTH==2
++#if CONFIG_ETRAX_NANDFLASH_BUSWIDTH==2
+ move.w [$r0], $r4
+ #else
+ move.b [$r0], $r4
+ #endif
+ subq 1, $r5
+ bne 2b
+-#if CONFIG_ETRAX_FLASH_BUSWIDTH==2
++#if CONFIG_ETRAX_NANDFLASH_BUSWIDTH==2
+ move.w $r4, [$r10+]
+- subu.w PAGE_SIZE*2, $r12
+ #else
+ move.b $r4, [$r10+]
+- subu.w PAGE_SIZE, $r12
+ #endif
+- bpl 1b
+- addu.w PAGE_SIZE, $r11
++ subu.w PAGE_SIZE_BYTES, $r12
++ bhi 1b
++ addu.w PAGE_SIZE_ADDRESSES, $r11
+
+- ;; End of copy
+- jump $r13
+- nop
++ SET CE
+
+- ;; This will warn if the code above is too large. If you consider
+- ;; to remove this you don't understand the bug/feature.
+- .org 256
+- .org ERASE_BLOCK
+-
+-normal_boot:
++ ;; End of copy
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/lib/spinlock.S linux-2.6.19.2.dev/arch/cris/arch-v32/lib/spinlock.S
+--- linux-2.6.19.2.old/arch/cris/arch-v32/lib/spinlock.S 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/lib/spinlock.S 2006-05-24 11:38:43.000000000 +0200
+@@ -1,22 +1,22 @@
+ ;; Core of the spinlock implementation
+ ;;
+-;; Copyright (C) 2004 Axis Communications AB.
++;; Copyright (C) 2004 Axis Communications AB.
+ ;;
+-;; Author: Mikael Starvik
+-
++;; Author: Mikael Starvik
+
++
+ .global cris_spin_lock
+ .global cris_spin_trylock
+
+ .text
+-
++
+ cris_spin_lock:
+ clearf p
+-1: test.d [$r10]
++1: test.b [$r10]
+ beq 1b
+ clearf p
+ ax
+- clear.d [$r10]
++ clear.b [$r10]
+ bcs 1b
+ clearf p
+ ret
+@@ -24,10 +24,10 @@
+
+ cris_spin_trylock:
+ clearf p
+-1: move.d [$r10], $r11
++1: move.b [$r10], $r11
+ ax
+- clear.d [$r10]
++ clear.b [$r10]
+ bcs 1b
+ clearf p
+ ret
+- move.d $r11,$r10
++ movu.b $r11,$r10
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/lib/string.c linux-2.6.19.2.dev/arch/cris/arch-v32/lib/string.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/lib/string.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/lib/string.c 2003-07-02 05:00:14.000000000 +0200
+@@ -48,8 +48,8 @@
+ register char *dst __asm__ ("r13") = pdst;
+ register const char *src __asm__ ("r11") = psrc;
+ register int n __asm__ ("r12") = pn;
+-
+-
++
++
+ /* When src is aligned but not dst, this makes a few extra needless
+ cycles. I believe it would take as many to check that the
+ re-alignment was unnecessary. */
+@@ -117,13 +117,13 @@
+ ;; Restore registers from stack \n\
+ movem [$sp+],$r10"
+
+- /* Outputs */ : "=r" (dst), "=r" (src), "=r" (n)
++ /* Outputs */ : "=r" (dst), "=r" (src), "=r" (n)
+ /* Inputs */ : "0" (dst), "1" (src), "2" (n));
+-
++
+ }
+
+ /* Either we directly starts copying, using dword copying
+- in a loop, or we copy as much as possible with 'movem'
++ in a loop, or we copy as much as possible with 'movem'
+ and then the last block (<44 bytes) is copied here.
+ This will work since 'movem' will have updated src,dst,n. */
+
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/mm/init.c linux-2.6.19.2.dev/arch/cris/arch-v32/mm/init.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/mm/init.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/mm/init.c 2006-10-13 14:43:14.000000000 +0200
+@@ -34,12 +34,12 @@
+ unsigned long mmu_kbase_hi;
+ unsigned long mmu_kbase_lo;
+ unsigned short mmu_page_id;
+-
+- /*
++
++ /*
+ * Make sure the current pgd table points to something sane, even if it
+ * is most probably not used until the next switch_mm.
+ */
+- per_cpu(current_pgd, smp_processor_id()) = init_mm.pgd;
++ per_cpu(current_pgd, smp_processor_id()) = init_mm.pgd;
+
+ #ifdef CONFIG_SMP
+ {
+@@ -65,7 +65,7 @@
+ REG_STATE(mmu, rw_mm_cfg, seg_d, page) |
+ REG_STATE(mmu, rw_mm_cfg, seg_c, linear) |
+ REG_STATE(mmu, rw_mm_cfg, seg_b, linear) |
+-#ifndef CONFIG_ETRAXFS_SIM
++#ifndef CONFIG_ETRAXFS_SIM
+ REG_STATE(mmu, rw_mm_cfg, seg_a, page) |
+ #else
+ REG_STATE(mmu, rw_mm_cfg, seg_a, linear) |
+@@ -115,7 +115,7 @@
+ SUPP_REG_WR(RW_MM_KBASE_HI, mmu_kbase_hi);
+ SUPP_REG_WR(RW_MM_KBASE_LO, mmu_kbase_lo);
+ SUPP_REG_WR(RW_MM_TLB_HI, mmu_page_id);
+-
++
+ /* Update the data MMU. */
+ SUPP_BANK_SEL(BANK_DM);
+ SUPP_REG_WR(RW_MM_CFG, mmu_config);
+@@ -125,7 +125,7 @@
+
+ SPEC_REG_WR(SPEC_REG_PID, 0);
+
+- /*
++ /*
+ * The MMU has been enabled ever since head.S but just to make it
+ * totally obvious enable it here as well.
+ */
+@@ -133,7 +133,7 @@
+ SUPP_REG_WR(RW_GC_CFG, 0xf); /* IMMU, DMMU, ICache, DCache on */
+ }
+
+-void __init
++void __init
+ paging_init(void)
+ {
+ int i;
+@@ -160,13 +160,13 @@
+ for (i = 1; i < MAX_NR_ZONES; i++)
+ zones_size[i] = 0;
+
+- /*
++ /*
+ * Use free_area_init_node instead of free_area_init, because it is
+- * designed for systems where the DRAM starts at an address
++ * designed for systems where the DRAM starts at an address
+ * substantially higher than 0, like us (we start at PAGE_OFFSET). This
+ * saves space in the mem_map page array.
+ */
+ free_area_init_node(0, &contig_page_data, zones_size, PAGE_OFFSET >> PAGE_SHIFT, 0);
+-
++
+ mem_map = contig_page_data.node_mem_map;
+ }
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/mm/intmem.c linux-2.6.19.2.dev/arch/cris/arch-v32/mm/intmem.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/mm/intmem.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/mm/intmem.c 2006-01-02 12:27:04.000000000 +0100
+@@ -27,7 +27,7 @@
+ {
+ static int initiated = 0;
+ if (!initiated) {
+- struct intmem_allocation* alloc =
++ struct intmem_allocation* alloc =
+ (struct intmem_allocation*)kmalloc(sizeof *alloc, GFP_KERNEL);
+ INIT_LIST_HEAD(&intmem_allocations);
+ intmem_virtual = ioremap(MEM_INTMEM_START, MEM_INTMEM_SIZE);
+@@ -44,7 +44,7 @@
+ struct intmem_allocation* allocation;
+ struct intmem_allocation* tmp;
+ void* ret = NULL;
+-
++
+ preempt_disable();
+ crisv32_intmem_init();
+
+@@ -55,7 +55,7 @@
+ if (allocation->status == STATUS_FREE &&
+ allocation->size >= size + alignment) {
+ if (allocation->size > size + alignment) {
+- struct intmem_allocation* alloc =
++ struct intmem_allocation* alloc =
+ (struct intmem_allocation*)
+ kmalloc(sizeof *alloc, GFP_ATOMIC);
+ alloc->status = STATUS_FREE;
+@@ -73,13 +73,13 @@
+ allocation->offset += alignment;
+ list_add_tail(&tmp->entry, &allocation->entry);
+ }
+- }
++ }
+ allocation->status = STATUS_ALLOCATED;
+ allocation->size = size;
+ ret = (void*)((int)intmem_virtual + allocation->offset);
+ }
+ }
+- preempt_enable();
++ preempt_enable();
+ return ret;
+ }
+
+@@ -96,22 +96,22 @@
+
+ list_for_each_entry_safe(allocation, tmp, &intmem_allocations, entry) {
+ if (allocation->offset == (int)(addr - intmem_virtual)) {
+- struct intmem_allocation* prev =
+- list_entry(allocation->entry.prev,
++ struct intmem_allocation* prev =
++ list_entry(allocation->entry.prev,
+ struct intmem_allocation, entry);
+- struct intmem_allocation* next =
+- list_entry(allocation->entry.next,
++ struct intmem_allocation* next =
++ list_entry(allocation->entry.next,
+ struct intmem_allocation, entry);
+
+ allocation->status = STATUS_FREE;
+ /* Join with prev and/or next if also free */
+- if (prev->status == STATUS_FREE) {
++ if ((prev != &intmem_allocations) && (prev->status == STATUS_FREE)) {
+ prev->size += allocation->size;
+ list_del(&allocation->entry);
+ kfree(allocation);
+ allocation = prev;
+ }
+- if (next->status == STATUS_FREE) {
++ if ((next != &intmem_allocations) && (next->status == STATUS_FREE)) {
+ allocation->size += next->size;
+ list_del(&next->entry);
+ kfree(next);
+@@ -125,13 +125,13 @@
+
+ void* crisv32_intmem_phys_to_virt(unsigned long addr)
+ {
+- return (void*)(addr - MEM_INTMEM_START+
++ return (void*)(addr - MEM_INTMEM_START+
+ (unsigned long)intmem_virtual);
+ }
+
+ unsigned long crisv32_intmem_virt_to_phys(void* addr)
+ {
+- return (unsigned long)((unsigned long )addr -
++ return (unsigned long)((unsigned long )addr -
+ (unsigned long)intmem_virtual + MEM_INTMEM_START);
+ }
+
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/mm/mmu.S linux-2.6.19.2.dev/arch/cris/arch-v32/mm/mmu.S
+--- linux-2.6.19.2.old/arch/cris/arch-v32/mm/mmu.S 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/mm/mmu.S 2006-08-04 10:10:20.000000000 +0200
+@@ -1,3 +1,5 @@
++; WARNING : The refill handler has been modified, see below !!!
++
+ /*
+ * Copyright (C) 2003 Axis Communications AB
+ *
+@@ -9,7 +11,7 @@
+
+ #include <asm/page.h>
+ #include <asm/pgtable.h>
+-
++
+ ; Save all register. Must save in same order as struct pt_regs.
+ .macro SAVE_ALL
+ subq 12, $sp
+@@ -29,11 +31,11 @@
+ subq 14*4, $sp
+ movem $r13, [$sp]
+ subq 4, $sp
+- move.d $r10, [$sp]
++ move.d $r10, [$sp]
+ .endm
+
+ ; Bus fault handler. Extracts relevant information and calls mm subsystem
+-; to handle the fault.
++; to handle the fault.
+ .macro MMU_BUS_FAULT_HANDLER handler, mmu, we, ex
+ .globl \handler
+ \handler:
+@@ -45,7 +47,7 @@
+ orq \ex << 1, $r13 ; execute?
+ move $s3, $r10 ; rw_mm_cause
+ and.d ~8191, $r10 ; Get faulting page start address
+-
++
+ jsr do_page_fault
+ nop
+ ba ret_from_intr
+@@ -59,15 +61,28 @@
+ ; The code below handles case 1 and calls the mm subsystem for case 2 and 3.
+ ; Do not touch this code without very good reasons and extensive testing.
+ ; Note that the code is optimized to minimize stalls (makes the code harder
+-; to read).
++; to read).
++;
++; WARNING !!!
++; Modified by Mikael Asker 060725: added a workaround for strange TLB
++; behavior. If the same PTE is present in more than one set, the TLB
++; doesn't recognize it and we get stuck in a loop of refill exceptions.
++; The workaround detects such loops and exits them by flushing
++; the TLB contents. The problem and workaround were verified
++; in VCS by Mikael Starvik.
+ ;
+ ; Each page is 8 KB. Each PMD holds 8192/4 PTEs (each PTE is 4 bytes) so each
+-; PMD holds 16 MB of virtual memory.
++; PMD holds 16 MB of virtual memory.
+ ; Bits 0-12 : Offset within a page
+ ; Bits 13-23 : PTE offset within a PMD
+ ; Bits 24-31 : PMD offset within the PGD
+-
++
+ .macro MMU_REFILL_HANDLER handler, mmu
++ .data
++1: .dword 0 ; refill_count
++ ; == 0 <=> last_refill_cause is invalid
++2: .dword 0 ; last_refill_cause
++ .text
+ .globl \handler
+ \handler:
+ subq 4, $sp
+@@ -76,40 +91,88 @@
+ subq 4, $sp
+ move \mmu, $srs ; Select MMU support register bank
+ move.d $acr, [$sp]
+- subq 4, $sp
+- move.d $r0, [$sp]
+-#ifdef CONFIG_SMP
++ subq 12, $sp
++ move.d 1b, $acr ; Point to refill_count
++ movem $r2, [$sp]
++
++ test.d [$acr] ; refill_count == 0 ?
++ beq 5f ; yes, last_refill_cause is invalid
++ move.d $acr, $r1
++
++ ; last_refill_cause is valid, investigate cause
++ addq 4, $r1 ; Point to last_refill_cause
++ move $s3, $r0 ; Get rw_mm_cause
++ move.d [$r1], $r2 ; Get last_refill_cause
++ cmp.d $r0, $r2 ; rw_mm_cause == last_refill_cause ?
++ beq 6f ; yes, increment count
++ moveq 1, $r2
++
++ ; rw_mm_cause != last_refill_cause
++ move.d $r2, [$acr] ; refill_count = 1
++ move.d $r0, [$r1] ; last_refill_cause = rw_mm_cause
++
++3: ; Probably not in a loop, continue normal processing
++#ifdef CONFIG_SMP
+ move $s7, $acr ; PGD
+ #else
+ move.d per_cpu__current_pgd, $acr ; PGD
+ #endif
+ ; Look up PMD in PGD
+- move $s3, $r0 ; rw_mm_cause
+ lsrq 24, $r0 ; Get PMD index into PGD (bit 24-31)
+ move.d [$acr], $acr ; PGD for the current process
+ addi $r0.d, $acr, $acr
+ move $s3, $r0 ; rw_mm_cause
+ move.d [$acr], $acr ; Get PMD
+- beq 1f
++ beq 8f
+ ; Look up PTE in PMD
+ lsrq PAGE_SHIFT, $r0
+ and.w PAGE_MASK, $acr ; Remove PMD flags
+ and.d 0x7ff, $r0 ; Get PTE index into PMD (bit 13-23)
+ addi $r0.d, $acr, $acr
+ move.d [$acr], $acr ; Get PTE
+- beq 2f
+- move.d [$sp+], $r0 ; Pop r0 in delayslot
++ beq 9f
++ movem [$sp], $r2 ; Restore r0-r2 in delay slot
++ addq 12, $sp
+ ; Store in TLB
+ move $acr, $s5
+- ; Return
++4: ; Return
+ move.d [$sp+], $acr
+ move [$sp], $srs
+ addq 4, $sp
+ rete
+ rfe
+-1: ; PMD missing, let the mm subsystem fix it up.
+- move.d [$sp+], $r0 ; Pop r0
+-2: ; PTE missing, let the mm subsystem fix it up.
++
++5: ; last_refill_cause is invalid
++ moveq 1, $r2
++ addq 4, $r1 ; Point to last_refill_cause
++ move.d $r2, [$acr] ; refill_count = 1
++ move $s3, $r0 ; Get rw_mm_cause
++ ba 3b ; Continue normal processing
++ move.d $r0,[$r1] ; last_refill_cause = rw_mm_cause
++
++6: ; rw_mm_cause == last_refill_cause
++ move.d [$acr], $r2 ; Get refill_count
++ cmpq 4, $r2 ; refill_count > 4 ?
++ bhi 7f ; yes
++ addq 1, $r2 ; refill_count++
++ ba 3b ; Continue normal processing
++ move.d $r2, [$acr]
++
++7: ; refill_count > 4, error
++ subq 4, $sp
++ move $srp, [$sp]
++ jsr __flush_tlb_all
++ move.d $acr, $r0 ; Save pointer to refill_count
++ move [$sp+], $srp
++ clear.d [$r0] ; refill_count = 0
++ movem [$sp], $r2
++ ba 4b ; Return
++ addq 12, $sp
++
++8: ; PMD missing, let the mm subsystem fix it up.
++ movem [$sp], $r2 ; Restore r0-r2
++9: ; PTE missing, let the mm subsystem fix it up.
++ addq 12, $sp
+ move.d [$sp+], $acr
+ move [$sp], $srs
+ addq 4, $sp
+@@ -128,7 +191,7 @@
+ ba ret_from_intr
+ nop
+ .endm
+-
++
+ ; This is the MMU bus fault handlers.
+
+ MMU_REFILL_HANDLER i_mmu_refill, 1
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/mm/tlb.c linux-2.6.19.2.dev/arch/cris/arch-v32/mm/tlb.c
+--- linux-2.6.19.2.old/arch/cris/arch-v32/mm/tlb.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/mm/tlb.c 2006-08-07 12:06:44.000000000 +0200
+@@ -2,7 +2,7 @@
+ * Low level TLB handling.
+ *
+ * Copyright (C) 2000-2003, Axis Communications AB.
+- *
++ *
+ * Authors: Bjorn Wesen <bjornw@axis.com>
+ * Tobias Anderberg <tobiasa@axis.com>, CRISv32 port.
+ */
+@@ -79,7 +79,7 @@
+ void
+ __flush_tlb_mm(struct mm_struct *mm)
+ {
+- int i;
++ int i;
+ int mmu;
+ unsigned long flags;
+ unsigned long page_id;
+@@ -90,7 +90,7 @@
+
+ if (page_id == NO_CONTEXT)
+ return;
+-
++
+ /* Mark the TLB entries that match the page_id as invalid. */
+ local_save_flags(flags);
+ local_irq_disable();
+@@ -99,15 +99,15 @@
+ SUPP_BANK_SEL(mmu);
+ for (i = 0; i < NUM_TLB_ENTRIES; i++) {
+ UPDATE_TLB_SEL_IDX(i);
+-
++
+ /* Get the page_id */
+ SUPP_REG_RD(RW_MM_TLB_HI, tlb_hi);
+
+ /* Check if the page_id match. */
+ if ((tlb_hi & 0xff) == page_id) {
+ mmu_tlb_hi = (REG_FIELD(mmu, rw_mm_tlb_hi, pid,
+- INVALID_PAGEID)
+- | REG_FIELD(mmu, rw_mm_tlb_hi, vpn,
++ INVALID_PAGEID)
++ | REG_FIELD(mmu, rw_mm_tlb_hi, vpn,
+ i & 0xf));
+
+ UPDATE_TLB_HILO(mmu_tlb_hi, 0);
+@@ -135,7 +135,7 @@
+ return;
+
+ addr &= PAGE_MASK;
+-
++
+ /*
+ * Invalidate those TLB entries that match both the mm context and the
+ * requested virtual address.
+@@ -150,11 +150,11 @@
+ SUPP_REG_RD(RW_MM_TLB_HI, tlb_hi);
+
+ /* Check if page_id and address matches */
+- if (((tlb_hi & 0xff) == page_id) &&
++ if (((tlb_hi & 0xff) == page_id) &&
+ ((tlb_hi & PAGE_MASK) == addr)) {
+ mmu_tlb_hi = REG_FIELD(mmu, rw_mm_tlb_hi, pid,
+ INVALID_PAGEID) | addr;
+-
++
+ UPDATE_TLB_HILO(mmu_tlb_hi, 0);
+ }
+ }
+@@ -178,33 +178,35 @@
+ static DEFINE_SPINLOCK(mmu_context_lock);
+
+ /* Called in schedule() just before actually doing the switch_to. */
+-void
++void
+ switch_mm(struct mm_struct *prev, struct mm_struct *next,
+ struct task_struct *tsk)
+-{
+- int cpu = smp_processor_id();
+-
+- /* Make sure there is a MMU context. */
+- spin_lock(&mmu_context_lock);
+- get_mmu_context(next);
+- cpu_set(cpu, next->cpu_vm_mask);
+- spin_unlock(&mmu_context_lock);
+-
+- /*
+- * Remember the pgd for the fault handlers. Keep a seperate copy of it
+- * because current and active_mm might be invalid at points where
+- * there's still a need to derefer the pgd.
+- */
+- per_cpu(current_pgd, cpu) = next->pgd;
+-
+- /* Switch context in the MMU. */
+- if (tsk && task_thread_info(tsk))
+- {
+- SPEC_REG_WR(SPEC_REG_PID, next->context.page_id | task_thread_info(tsk)->tls);
+- }
+- else
+- {
+- SPEC_REG_WR(SPEC_REG_PID, next->context.page_id);
+- }
++{
++ if (prev != next) {
++ int cpu = smp_processor_id();
++
++ /* Make sure there is a MMU context. */
++ spin_lock(&mmu_context_lock);
++ get_mmu_context(next);
++ cpu_set(cpu, next->cpu_vm_mask);
++ spin_unlock(&mmu_context_lock);
++
++ /*
++ * Remember the pgd for the fault handlers. Keep a seperate copy of it
++ * because current and active_mm might be invalid at points where
++ * there's still a need to derefer the pgd.
++ */
++ per_cpu(current_pgd, cpu) = next->pgd;
++
++ /* Switch context in the MMU. */
++ if (tsk && task_thread_info(tsk))
++ {
++ SPEC_REG_WR(SPEC_REG_PID, next->context.page_id | task_thread_info(tsk)->tls);
++ }
++ else
++ {
++ SPEC_REG_WR(SPEC_REG_PID, next->context.page_id);
++ }
++ }
+ }
+
+diff -urN linux-2.6.19.2.old/arch/cris/arch-v32/vmlinux.lds.S linux-2.6.19.2.dev/arch/cris/arch-v32/vmlinux.lds.S
+--- linux-2.6.19.2.old/arch/cris/arch-v32/vmlinux.lds.S 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/arch-v32/vmlinux.lds.S 2006-10-13 14:43:11.000000000 +0200
+@@ -5,11 +5,11 @@
+ * script. It is for example quite vital that all generated sections
+ * that are used are actually named here, otherwise the linker will
+ * put them at the end, where the init stuff is which is FREED after
+- * the kernel has booted.
+- */
++ * the kernel has booted.
++ */
+
+ #include <asm-generic/vmlinux.lds.h>
+-
++
+ jiffies = jiffies_64;
+ SECTIONS
+ {
+@@ -20,7 +20,7 @@
+ /* The boot section is only necessary until the VCS top level testbench */
+ /* includes both flash and DRAM. */
+ .boot : { *(.boot) }
+-
++
+ . = DRAM_VIRTUAL_BASE + 0x4000; /* See head.S and pages reserved at the start. */
+
+ _text = .; /* Text and read-only data. */
+@@ -35,7 +35,7 @@
+ *(.text.__*)
+ }
+
+- _etext = . ; /* End of text section. */
++ _etext = . ; /* End of text section. */
+ __etext = .;
+
+ . = ALIGN(4); /* Exception table. */
+@@ -59,7 +59,7 @@
+
+ . = ALIGN(8192); /* Init code and data. */
+ __init_begin = .;
+- .init.text : {
++ .init.text : {
+ _sinittext = .;
+ *(.init.text)
+ _einittext = .;
+@@ -81,7 +81,7 @@
+ *(.initcall5.init);
+ *(.initcall6.init);
+ *(.initcall7.init);
+- __initcall_end = .;
++ __initcall_end = .;
+ }
+
+ .con_initcall.init : {
+@@ -94,20 +94,20 @@
+ __per_cpu_start = .;
+ .data.percpu : { *(.data.percpu) }
+ __per_cpu_end = .;
+-
++
+ .init.ramfs : {
+ __initramfs_start = .;
+ *(.init.ramfs)
+ __initramfs_end = .;
+- /*
++ /*
+ * We fill to the next page, so we can discard all init
+ * pages without needing to consider what payload might be
+ * appended to the kernel image.
+ */
+- FILL (0);
++ FILL (0);
+ . = ALIGN (8192);
+ }
+-
++
+ __vmlinux_end = .; /* Last address of the physical file. */
+ __init_end = .;
+
+diff -urN linux-2.6.19.2.old/arch/cris/kernel/crisksyms.c linux-2.6.19.2.dev/arch/cris/kernel/crisksyms.c
+--- linux-2.6.19.2.old/arch/cris/kernel/crisksyms.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/kernel/crisksyms.c 2006-11-03 13:49:17.000000000 +0100
+@@ -9,7 +9,7 @@
+ #include <linux/kernel.h>
+ #include <linux/string.h>
+ #include <linux/tty.h>
+-
++
+ #include <asm/semaphore.h>
+ #include <asm/processor.h>
+ #include <asm/uaccess.h>
+@@ -28,6 +28,7 @@
+ extern void __ashldi3(void);
+ extern void __ashrdi3(void);
+ extern void __lshrdi3(void);
++extern void __negdi2(void);
+ extern void iounmap(volatile void * __iomem);
+
+ /* Platform dependent support */
+@@ -35,18 +36,7 @@
+ EXPORT_SYMBOL(get_cmos_time);
+ EXPORT_SYMBOL(loops_per_usec);
+
+-/* String functions */
+-EXPORT_SYMBOL(memcmp);
+-EXPORT_SYMBOL(memmove);
+-EXPORT_SYMBOL(strstr);
+-EXPORT_SYMBOL(strcpy);
+-EXPORT_SYMBOL(strchr);
+-EXPORT_SYMBOL(strcmp);
+-EXPORT_SYMBOL(strlen);
+-EXPORT_SYMBOL(strcat);
+-EXPORT_SYMBOL(strncat);
+-EXPORT_SYMBOL(strncmp);
+-EXPORT_SYMBOL(strncpy);
++EXPORT_SYMBOL(ktime_get_ts);
+
+ /* Math functions */
+ EXPORT_SYMBOL(__Udiv);
+@@ -56,6 +46,7 @@
+ EXPORT_SYMBOL(__ashldi3);
+ EXPORT_SYMBOL(__ashrdi3);
+ EXPORT_SYMBOL(__lshrdi3);
++EXPORT_SYMBOL(__negdi2);
+
+ /* Memory functions */
+ EXPORT_SYMBOL(__ioremap);
+@@ -85,4 +76,4 @@
+ EXPORT_SYMBOL(del_fast_timer);
+ EXPORT_SYMBOL(schedule_usleep);
+ #endif
+-
++EXPORT_SYMBOL(csum_partial);
+diff -urN linux-2.6.19.2.old/arch/cris/kernel/irq.c linux-2.6.19.2.dev/arch/cris/kernel/irq.c
+--- linux-2.6.19.2.old/arch/cris/kernel/irq.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/kernel/irq.c 2007-01-09 10:29:20.000000000 +0100
+@@ -92,14 +92,16 @@
+ asmlinkage void do_IRQ(int irq, struct pt_regs * regs)
+ {
+ unsigned long sp;
++ struct pt_regs *old_regs = set_irq_regs(regs);
+ irq_enter();
+ sp = rdsp();
+ if (unlikely((sp & (PAGE_SIZE - 1)) < (PAGE_SIZE/8))) {
+ printk("do_IRQ: stack overflow: %lX\n", sp);
+ show_stack(NULL, (unsigned long *)sp);
+ }
+- __do_IRQ(irq, regs);
++ __do_IRQ(irq);
+ irq_exit();
++ set_irq_regs(old_regs);
+ }
+
+ void weird_irq(void)
+diff -urN linux-2.6.19.2.old/arch/cris/kernel/process.c linux-2.6.19.2.dev/arch/cris/kernel/process.c
+--- linux-2.6.19.2.old/arch/cris/kernel/process.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/kernel/process.c 2006-06-25 17:00:10.000000000 +0200
+@@ -1,4 +1,4 @@
+-/* $Id: process.c,v 1.21 2005/03/04 08:16:17 starvik Exp $
++/* $Id: process.c,v 1.26 2006/06/25 15:00:10 starvik Exp $
+ *
+ * linux/arch/cris/kernel/process.c
+ *
+@@ -8,6 +8,21 @@
+ * Authors: Bjorn Wesen (bjornw@axis.com)
+ *
+ * $Log: process.c,v $
++ * Revision 1.26 2006/06/25 15:00:10 starvik
++ * Merge of Linux 2.6.17
++ *
++ * Revision 1.25 2006/03/22 09:56:56 starvik
++ * Merge of Linux 2.6.16
++ *
++ * Revision 1.24 2006/01/04 06:09:48 starvik
++ * Merge of Linux 2.6.15
++ *
++ * Revision 1.23 2005/08/29 07:32:19 starvik
++ * Merge of 2.6.13
++ *
++ * Revision 1.22 2005/08/18 08:33:18 starvik
++ * Corrected signature of machine_restart
++ *
+ * Revision 1.21 2005/03/04 08:16:17 starvik
+ * Merge of Linux 2.6.11.
+ *
+@@ -195,12 +210,18 @@
+ */
+ void (*pm_idle)(void);
+
++extern void default_idle(void);
++
++void (*pm_power_off)(void);
++EXPORT_SYMBOL(pm_power_off);
++
+ /*
+ * The idle thread. There's no useful work to be
+ * done, so just try to conserve power and have a
+ * low exit latency (ie sit in a loop waiting for
+ * somebody to say that they'd like to reschedule)
+ */
++
+ void cpu_idle (void)
+ {
+ /* endless idle loop with no priority at all */
+diff -urN linux-2.6.19.2.old/arch/cris/kernel/profile.c linux-2.6.19.2.dev/arch/cris/kernel/profile.c
+--- linux-2.6.19.2.old/arch/cris/kernel/profile.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/kernel/profile.c 2004-10-05 08:22:44.000000000 +0200
+@@ -42,7 +42,7 @@
+ return count;
+ }
+
+-static ssize_t
++static ssize_t
+ write_cris_profile(struct file *file, const char __user *buf,
+ size_t count, loff_t *ppos)
+ {
+diff -urN linux-2.6.19.2.old/arch/cris/kernel/ptrace.c linux-2.6.19.2.dev/arch/cris/kernel/ptrace.c
+--- linux-2.6.19.2.old/arch/cris/kernel/ptrace.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/kernel/ptrace.c 2006-03-23 15:54:02.000000000 +0100
+@@ -8,6 +8,9 @@
+ * Authors: Bjorn Wesen
+ *
+ * $Log: ptrace.c,v $
++ * Revision 1.11 2006/03/23 14:54:02 starvik
++ * Corrected signal handling.
++ *
+ * Revision 1.10 2004/09/22 11:50:01 orjanf
+ * * Moved get_reg/put_reg to arch-specific files.
+ * * Added functions to access debug registers (CRISv32).
+@@ -82,13 +85,13 @@
+ /* notification of userspace execution resumption
+ * - triggered by current->work.notify_resume
+ */
+-extern int do_signal(int canrestart, sigset_t *oldset, struct pt_regs *regs);
++extern int do_signal(int canrestart, struct pt_regs *regs);
+
+
+-void do_notify_resume(int canrestart, sigset_t *oldset, struct pt_regs *regs,
++void do_notify_resume(int canrestart, struct pt_regs *regs,
+ __u32 thread_info_flags )
+ {
+ /* deal with pending signal delivery */
+ if (thread_info_flags & _TIF_SIGPENDING)
+- do_signal(canrestart,oldset,regs);
++ do_signal(canrestart,regs);
+ }
+diff -urN linux-2.6.19.2.old/arch/cris/kernel/semaphore.c linux-2.6.19.2.dev/arch/cris/kernel/semaphore.c
+--- linux-2.6.19.2.old/arch/cris/kernel/semaphore.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/kernel/semaphore.c 2005-10-31 09:48:05.000000000 +0100
+@@ -4,7 +4,7 @@
+ */
+
+ #include <linux/sched.h>
+-#include <linux/init.h>
++#include <asm/semaphore.h>
+ #include <asm/semaphore-helper.h>
+
+ /*
+@@ -95,6 +95,7 @@
+ tsk->state = TASK_RUNNING; \
+ remove_wait_queue(&sem->wait, &wait);
+
++
+ void __sched __down(struct semaphore * sem)
+ {
+ DOWN_VAR
+diff -urN linux-2.6.19.2.old/arch/cris/kernel/setup.c linux-2.6.19.2.dev/arch/cris/kernel/setup.c
+--- linux-2.6.19.2.old/arch/cris/kernel/setup.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/kernel/setup.c 2007-01-09 10:29:20.000000000 +0100
+@@ -18,7 +18,7 @@
+ #include <linux/screen_info.h>
+ #include <linux/utsname.h>
+ #include <linux/pfn.h>
+-
++#include <linux/cpu.h>
+ #include <asm/setup.h>
+
+ /*
+@@ -36,6 +36,8 @@
+
+ extern unsigned long romfs_start, romfs_length, romfs_in_flash; /* from head.S */
+
++static struct cpu cpu_devices[NR_CPUS];
++
+ extern void show_etrax_copyright(void); /* arch-vX/kernel/setup.c */
+
+ /* This mainly sets up the memory area, and can be really confusing.
+@@ -187,4 +189,14 @@
+ .show = show_cpuinfo,
+ };
+
++static int __init topology_init(void)
++{
++ int i;
++
++ for_each_possible_cpu(i) {
++ return register_cpu(&cpu_devices[i], i);
++ }
++}
++
++subsys_initcall(topology_init);
+
+diff -urN linux-2.6.19.2.old/arch/cris/kernel/sys_cris.c linux-2.6.19.2.dev/arch/cris/kernel/sys_cris.c
+--- linux-2.6.19.2.old/arch/cris/kernel/sys_cris.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/kernel/sys_cris.c 2007-01-09 10:29:20.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* $Id: sys_cris.c,v 1.6 2004/03/11 11:38:40 starvik Exp $
++/* $Id: sys_cris.c,v 1.7 2007/01/09 09:29:20 starvik Exp $
+ *
+ * linux/arch/cris/kernel/sys_cris.c
+ *
+@@ -172,3 +172,4 @@
+ return -ENOSYS;
+ }
+ }
++
+diff -urN linux-2.6.19.2.old/arch/cris/kernel/time.c linux-2.6.19.2.dev/arch/cris/kernel/time.c
+--- linux-2.6.19.2.old/arch/cris/kernel/time.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/kernel/time.c 2007-01-09 10:29:20.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* $Id: time.c,v 1.18 2005/03/04 08:16:17 starvik Exp $
++/* $Id: time.c,v 1.23 2007/01/09 09:29:20 starvik Exp $
+ *
+ * linux/arch/cris/kernel/time.c
+ *
+@@ -172,10 +172,6 @@
+ mon = CMOS_READ(RTC_MONTH);
+ year = CMOS_READ(RTC_YEAR);
+
+- printk(KERN_DEBUG
+- "rtc: sec 0x%x min 0x%x hour 0x%x day 0x%x mon 0x%x year 0x%x\n",
+- sec, min, hour, day, mon, year);
+-
+ BCD_TO_BIN(sec);
+ BCD_TO_BIN(min);
+ BCD_TO_BIN(hour);
+@@ -208,11 +204,11 @@
+ cris_do_profile(struct pt_regs* regs)
+ {
+
+-#if CONFIG_SYSTEM_PROFILER
++#ifdef CONFIG_SYSTEM_PROFILER
+ cris_profile_sample(regs);
+ #endif
+
+-#if CONFIG_PROFILING
++#ifdef CONFIG_PROFILING
+ profile_tick(CPU_PROFILING, regs);
+ #endif
+ }
+@@ -222,10 +218,15 @@
+ */
+ unsigned long long sched_clock(void)
+ {
+- return (unsigned long long)jiffies * (1000000000 / HZ);
++ unsigned long long ns;
++
++ ns = jiffies;
++ ns *= 1000000000 / HZ;
++ ns += get_ns_in_jiffie();
++ return ns;
+ }
+
+-static int
++static int
+ __init init_udelay(void)
+ {
+ loops_per_usec = (loops_per_jiffy * HZ) / 1000000;
+diff -urN linux-2.6.19.2.old/arch/cris/kernel/traps.c linux-2.6.19.2.dev/arch/cris/kernel/traps.c
+--- linux-2.6.19.2.old/arch/cris/kernel/traps.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/kernel/traps.c 2006-12-11 14:04:23.000000000 +0100
+@@ -1,66 +1,78 @@
+-/* $Id: traps.c,v 1.11 2005/01/24 16:03:19 orjanf Exp $
+- *
++/*
+ * linux/arch/cris/traps.c
+ *
+- * Here we handle the break vectors not used by the system call
+- * mechanism, as well as some general stack/register dumping
++ * Here we handle the break vectors not used by the system call
++ * mechanism, as well as some general stack/register dumping
+ * things.
+- *
+- * Copyright (C) 2000-2002 Axis Communications AB
++ *
++ * Copyright (C) 2000-2006 Axis Communications AB
+ *
+ * Authors: Bjorn Wesen
+- * Hans-Peter Nilsson
++ * Hans-Peter Nilsson
+ *
+ */
+
+ #include <linux/init.h>
+ #include <linux/module.h>
++
+ #include <asm/pgtable.h>
+ #include <asm/uaccess.h>
+
++extern void arch_enable_nmi(void);
++extern void stop_watchdog(void);
++extern void reset_watchdog(void);
++extern void show_registers(struct pt_regs *regs);
++
++#ifdef CONFIG_DEBUG_BUGVERBOSE
++extern void handle_BUG(struct pt_regs *regs);
++#else
++#define handle_BUG(regs)
++#endif
++
+ static int kstack_depth_to_print = 24;
+
+-extern int raw_printk(const char *fmt, ...);
++void (*nmi_handler)(struct pt_regs*);
+
+-void show_trace(unsigned long * stack)
++void
++show_trace(unsigned long *stack)
+ {
+ unsigned long addr, module_start, module_end;
+ extern char _stext, _etext;
+ int i;
+
+- raw_printk("\nCall Trace: ");
++ printk("\nCall Trace: ");
+
+- i = 1;
+- module_start = VMALLOC_START;
+- module_end = VMALLOC_END;
++ i = 1;
++ module_start = VMALLOC_START;
++ module_end = VMALLOC_END;
+
+- while (((long) stack & (THREAD_SIZE-1)) != 0) {
+- if (__get_user (addr, stack)) {
++ while (((long)stack & (THREAD_SIZE-1)) != 0) {
++ if (__get_user(addr, stack)) {
+ /* This message matches "failing address" marked
+ s390 in ksymoops, so lines containing it will
+ not be filtered out by ksymoops. */
+- raw_printk ("Failing address 0x%lx\n", (unsigned long)stack);
++ printk("Failing address 0x%lx\n", (unsigned long)stack);
+ break;
+ }
+ stack++;
+
+- /*
+- * If the address is either in the text segment of the
+- * kernel, or in the region which contains vmalloc'ed
+- * memory, it *may* be the address of a calling
+- * routine; if so, print it so that someone tracing
+- * down the cause of the crash will be able to figure
+- * out the call path that was taken.
+- */
+- if (((addr >= (unsigned long) &_stext) &&
+- (addr <= (unsigned long) &_etext)) ||
+- ((addr >= module_start) && (addr <= module_end))) {
+- if (i && ((i % 8) == 0))
+- raw_printk("\n ");
+- raw_printk("[<%08lx>] ", addr);
+- i++;
+- }
+- }
++ /*
++ * If the address is either in the text segment of the
++ * kernel, or in the region which contains vmalloc'ed
++ * memory, it *may* be the address of a calling
++ * routine; if so, print it so that someone tracing
++ * down the cause of the crash will be able to figure
++ * out the call path that was taken.
++ */
++ if (((addr >= (unsigned long)&_stext) &&
++ (addr <= (unsigned long)&_etext)) ||
++ ((addr >= module_start) && (addr <= module_end))) {
++ if (i && ((i % 8) == 0))
++ printk("\n ");
++ printk("[<%08lx>] ", addr);
++ i++;
++ }
++ }
+ }
+
+ /*
+@@ -78,109 +90,150 @@
+ * with the ksymoops maintainer.
+ */
+
+-void
++void
+ show_stack(struct task_struct *task, unsigned long *sp)
+ {
+- unsigned long *stack, addr;
+- int i;
++ unsigned long *stack, addr;
++ int i;
+
+ /*
+ * debugging aid: "show_stack(NULL);" prints a
+ * back trace.
+ */
+
+- if(sp == NULL) {
++ if (sp == NULL) {
+ if (task)
+ sp = (unsigned long*)task->thread.ksp;
+ else
+ sp = (unsigned long*)rdsp();
+ }
+
+- stack = sp;
++ stack = sp;
+
+- raw_printk("\nStack from %08lx:\n ", (unsigned long)stack);
+- for(i = 0; i < kstack_depth_to_print; i++) {
+- if (((long) stack & (THREAD_SIZE-1)) == 0)
+- break;
+- if (i && ((i % 8) == 0))
+- raw_printk("\n ");
+- if (__get_user (addr, stack)) {
++ printk("\nStack from %08lx:\n ", (unsigned long)stack);
++ for (i = 0; i < kstack_depth_to_print; i++) {
++ if (((long)stack & (THREAD_SIZE-1)) == 0)
++ break;
++ if (i && ((i % 8) == 0))
++ printk("\n ");
++ if (__get_user(addr, stack)) {
+ /* This message matches "failing address" marked
+ s390 in ksymoops, so lines containing it will
+ not be filtered out by ksymoops. */
+- raw_printk ("Failing address 0x%lx\n", (unsigned long)stack);
++ printk("Failing address 0x%lx\n", (unsigned long)stack);
+ break;
+ }
+ stack++;
+- raw_printk("%08lx ", addr);
+- }
++ printk("%08lx ", addr);
++ }
+ show_trace(sp);
+ }
+
+-static void (*nmi_handler)(struct pt_regs*);
+-extern void arch_enable_nmi(void);
++#if 0
++/* displays a short stack trace */
+
+-void set_nmi_handler(void (*handler)(struct pt_regs*))
++int
++show_stack(void)
+ {
+- nmi_handler = handler;
+- arch_enable_nmi();
++ unsigned long *sp = (unsigned long *)rdusp();
++ int i;
++
++ printk("Stack dump [0x%08lx]:\n", (unsigned long)sp);
++ for (i = 0; i < 16; i++)
++ printk("sp + %d: 0x%08lx\n", i*4, sp[i]);
++ return 0;
+ }
++#endif
+
+-void handle_nmi(struct pt_regs* regs)
++void
++dump_stack(void)
+ {
+- if (nmi_handler)
+- nmi_handler(regs);
++ show_stack(NULL, NULL);
++}
++
++EXPORT_SYMBOL(dump_stack);
++
++void
++set_nmi_handler(void (*handler)(struct pt_regs*))
++{
++ nmi_handler = handler;
++ arch_enable_nmi();
+ }
+
+ #ifdef CONFIG_DEBUG_NMI_OOPS
+-void oops_nmi_handler(struct pt_regs* regs)
++void
++oops_nmi_handler(struct pt_regs* regs)
+ {
+- stop_watchdog();
+- raw_printk("NMI!\n");
+- show_registers(regs);
++ stop_watchdog();
++ oops_in_progress = 1;
++ printk("NMI!\n");
++ show_registers(regs);
++ oops_in_progress = 0;
+ }
+
+-static int
+-__init oops_nmi_register(void)
++static int __init
++oops_nmi_register(void)
+ {
+- set_nmi_handler(oops_nmi_handler);
+- return 0;
++ set_nmi_handler(oops_nmi_handler);
++ return 0;
+ }
+
+ __initcall(oops_nmi_register);
+
+ #endif
+
+-#if 0
+-/* displays a short stack trace */
+-
+-int
+-show_stack()
++/*
++ * This gets called from entry.S when the watchdog has bitten. Show something
++ * similiar to an Oops dump, and if the kernel is configured to be a nice
++ * doggy, then halt instead of reboot.
++ */
++void
++watchdog_bite_hook(struct pt_regs *regs)
+ {
+- unsigned long *sp = (unsigned long *)rdusp();
+- int i;
+- raw_printk("Stack dump [0x%08lx]:\n", (unsigned long)sp);
+- for(i = 0; i < 16; i++)
+- raw_printk("sp + %d: 0x%08lx\n", i*4, sp[i]);
+- return 0;
+-}
++#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
++ local_irq_disable();
++ stop_watchdog();
++ show_registers(regs);
++
++ while (1)
++ ; /* Do nothing. */
++#else
++ show_registers(regs);
+ #endif
++}
+
+-void dump_stack(void)
++/* This is normally the Oops function. */
++void
++die_if_kernel(const char *str, struct pt_regs *regs, long err)
+ {
+- show_stack(NULL, NULL);
+-}
++ if (user_mode(regs))
++ return;
+
+-EXPORT_SYMBOL(dump_stack);
++#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
++ /*
++ * This printout might take too long and could trigger
++ * the watchdog normally. If NICE_DOGGY is set, simply
++ * stop the watchdog during the printout.
++ */
++ stop_watchdog();
++#endif
+
+-void __init
+-trap_init(void)
+-{
+- /* Nothing needs to be done */
++ handle_BUG(regs);
++
++ printk("%s: %04lx\n", str, err & 0xffff);
++
++ show_registers(regs);
++
++ oops_in_progress = 0;
++
++#ifdef CONFIG_ETRAX_WATCHDOG_NICE_DOGGY
++ reset_watchdog();
++#endif
++ do_exit(SIGSEGV);
+ }
+
+-void spinning_cpu(void* addr)
++void __init
++trap_init(void)
+ {
+- raw_printk("CPU %d spinning on %X\n", smp_processor_id(), addr);
+- dump_stack();
++ /* Nothing needs to be done */
+ }
+diff -urN linux-2.6.19.2.old/arch/cris/mm/fault.c linux-2.6.19.2.dev/arch/cris/mm/fault.c
+--- linux-2.6.19.2.old/arch/cris/mm/fault.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/mm/fault.c 2006-09-29 13:14:06.000000000 +0200
+@@ -1,11 +1,27 @@
+ /*
+ * linux/arch/cris/mm/fault.c
+ *
+- * Copyright (C) 2000, 2001 Axis Communications AB
++ * Copyright (C) 2000-2006 Axis Communications AB
++ *
++ * Authors: Bjorn Wesen
+ *
+- * Authors: Bjorn Wesen
+- *
+ * $Log: fault.c,v $
++ * Revision 1.25 2006/09/29 11:14:06 orjanf
++ * * Use arch-independent macro to get irp/erp for v10/v32.
++ *
++ * Revision 1.24 2006/09/29 10:58:09 orjanf
++ * * Added user mode SIGSEGV printk.
++ *
++ * Revision 1.23 2006/06/20 07:42:56 pkj
++ * Removed an unnecessary reference to raw_printk().
++ *
++ * Revision 1.22 2005/08/29 07:32:20 starvik
++ * Merge of 2.6.13
++ *
++ * Revision 1.21 2005/07/02 12:29:37 starvik
++ * Use the generic oops_in_progress instead of the raw_printk hack.
++ * Moved some functions to achr-independent code.
++ *
+ * Revision 1.20 2005/03/04 08:16:18 starvik
+ * Merge of Linux 2.6.11.
+ *
+@@ -135,7 +151,6 @@
+
+ extern int find_fixup_code(struct pt_regs *);
+ extern void die_if_kernel(const char *, struct pt_regs *, long);
+-extern int raw_printk(const char *fmt, ...);
+
+ /* debug of low-level TLB reload */
+ #undef DEBUG
+@@ -164,8 +179,8 @@
+ * address.
+ *
+ * error_code:
+- * bit 0 == 0 means no page found, 1 means protection fault
+- * bit 1 == 0 means read, 1 means write
++ * bit 0 == 0 means no page found, 1 means protection fault
++ * bit 1 == 0 means read, 1 means write
+ *
+ * If this routine detects a bad access, it returns 1, otherwise it
+ * returns 0.
+@@ -180,9 +195,9 @@
+ struct vm_area_struct * vma;
+ siginfo_t info;
+
+- D(printk("Page fault for %lX on %X at %lX, prot %d write %d\n",
+- address, smp_processor_id(), instruction_pointer(regs),
+- protection, writeaccess));
++ D(printk("Page fault for %lX on %X at %lX, prot %d write %d\n",
++ address, smp_processor_id(), instruction_pointer(regs),
++ protection, writeaccess));
+
+ tsk = current;
+
+@@ -318,6 +333,8 @@
+ /* info.si_code has been set above */
+ info.si_addr = (void *)address;
+ force_sig_info(SIGSEGV, &info, tsk);
++ printk(KERN_NOTICE "%s (pid %d) segfaults for page address %08lx at pc %08lx\n",
++ tsk->comm, tsk->pid, address, instruction_pointer(regs));
+ return;
+ }
+
+@@ -325,7 +342,7 @@
+
+ /* Are we prepared to handle this kernel fault?
+ *
+- * (The kernel has valid exception-points in the source
++ * (The kernel has valid exception-points in the source
+ * when it acesses user-memory. When it fails in one
+ * of those points, we find it in a table and do a jump
+ * to some fixup code that loads an appropriate error
+@@ -340,13 +357,17 @@
+ * terminate things with extreme prejudice.
+ */
+
+- if ((unsigned long) (address) < PAGE_SIZE)
+- raw_printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference");
+- else
+- raw_printk(KERN_ALERT "Unable to handle kernel access");
+- raw_printk(" at virtual address %08lx\n",address);
++ if (!oops_in_progress) {
++ oops_in_progress = 1;
++ if ((unsigned long) (address) < PAGE_SIZE)
++ printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference");
++ else
++ printk(KERN_ALERT "Unable to handle kernel access");
++ printk(" at virtual address %08lx\n",address);
+
+- die_if_kernel("Oops", regs, (writeaccess << 1) | protection);
++ die_if_kernel("Oops", regs, (writeaccess << 1) | protection);
++ oops_in_progress = 0;
++ }
+
+ do_exit(SIGKILL);
+
+@@ -405,8 +426,8 @@
+ /* Since we're two-level, we don't need to do both
+ * set_pgd and set_pmd (they do the same thing). If
+ * we go three-level at some point, do the right thing
+- * with pgd_present and set_pgd here.
+- *
++ * with pgd_present and set_pgd here.
++ *
+ * Also, since the vmalloc area is global, we don't
+ * need to copy individual PTE's, it is enough to
+ * copy the pgd pointer into the pte page of the
+diff -urN linux-2.6.19.2.old/arch/cris/mm/init.c linux-2.6.19.2.dev/arch/cris/mm/init.c
+--- linux-2.6.19.2.old/arch/cris/mm/init.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/arch/cris/mm/init.c 2006-06-25 17:00:10.000000000 +0200
+@@ -7,6 +7,15 @@
+ * Authors: Bjorn Wesen (bjornw@axis.com)
+ *
+ * $Log: init.c,v $
++ * Revision 1.14 2006/06/25 15:00:10 starvik
++ * Merge of Linux 2.6.17
++ *
++ * Revision 1.13 2005/06/20 05:30:00 starvik
++ * Remove unnecessary diff to kernel.org tree
++ *
++ * Revision 1.12 2004/08/16 12:37:24 starvik
++ * Merge of Linux 2.6.8
++ *
+ * Revision 1.11 2004/05/28 09:28:56 starvik
+ * Calculation of loops_per_usec moved because initalization order has changed
+ * in Linux 2.6.
--- /dev/null
+diff -urN linux-2.6.19.2.orig/drivers/ide/cris/ide-cris.c linux-2.6.19.2.dev/drivers/ide/cris/ide-cris.c
+--- linux-2.6.19.2.orig/drivers/ide/cris/ide-cris.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/drivers/ide/cris/ide-cris.c 2006-12-06 14:17:02.000000000 +0100
+@@ -1,8 +1,8 @@
+-/* $Id: cris-ide-driver.patch,v 1.1 2005/06/29 21:39:07 akpm Exp $
++/* $Id: ide-cris.c,v 1.10 2006/12/06 13:17:02 starvik Exp $
+ *
+ * Etrax specific IDE functions, like init and PIO-mode setting etc.
+ * Almost the entire ide.c is used for the rest of the Etrax ATA driver.
+- * Copyright (c) 2000-2005 Axis Communications AB
++ * Copyright (c) 2000-2006 Axis Communications AB
+ *
+ * Authors: Bjorn Wesen (initial version)
+ * Mikael Starvik (crisv32 port)
+@@ -43,8 +43,8 @@
+
+ #define IDE_REGISTER_TIMEOUT 300
+
+-#define LOWDB(x)
+-#define D(x)
++#define LOWDB(x)
++#define D(x)
+
+ enum /* Transfer types */
+ {
+@@ -88,12 +88,50 @@
+ #define ATA_PIO0_STROBE 39
+ #define ATA_PIO0_HOLD 9
+
+-int
++/*
++ * On ETRAX FS, an interrupt remains latched and active until ack:ed.
++ * Further, ATA acks are without effect as long as INTRQ is asserted, as the
++ * corresponding ATA interrupt is continuously set to active. There will be a
++ * clearing ack at the usual cris_ide_ack_intr call, but that serves just to
++ * gracefully handle an actual spurious interrupt or similar situation (which
++ * will cause an early return without further actions, see the ide_intr
++ * function).
++ *
++ * However, the normal case at time of this writing is that nothing has
++ * changed from when INTRQ was asserted until the cris_ide_ack_intr call; no
++ * ATA registers written and no status register read, so INTRQ will *remain*
++ * asserted, thus *another* interrupt will be latched, and will be seen as a
++ * spurious interrupt after the "real" interrupt is serviced. With lots of
++ * ATA traffic (as in a trivial file-copy between two drives), this will trig
++ * the condition desc->irqs_unhandled > 99900 in
++ * kernel/irq/spurious.c:note_interrupt and the system will halt.
++ *
++ * To actually get rid of the interrupt corresponding to the current INTRQ
++ * assertion, we make a second ack after the next ATA register read or write;
++ * i.e. when INTRQ must be deasserted. At that time, we don't have the hwif
++ * pointer available, so we need to stash a local copy (safe, because it'll be
++ * set and cleared within the same spin_lock_irqsave region). The pointer
++ * serves doubly as a boolean flag that an ack is needed. The caller must
++ * NULL the pointer after the "second ack".
++ */
++
++static ide_hwif_t *hwif_to_ack;
++
++static int
+ cris_ide_ack_intr(ide_hwif_t* hwif)
+ {
+- reg_ata_rw_ctrl2 ctrl2 = REG_TYPE_CONV(reg_ata_rw_ctrl2,
++ /*
++ * The interrupt is shared so we need to find the interface bit number
++ * to ack. We define the ATA I/O register addresses to have the
++ * format of ata rw_ctrl2 register contents, conveniently holding this
++ * number.
++ */
++ reg_ata_rw_ctrl2 ctrl2 = REG_TYPE_CONV(reg_ata_rw_ctrl2,
+ int, hwif->io_ports[0]);
+ REG_WR_INT(ata, regi_ata, rw_ack_intr, 1 << ctrl2.sel);
++
++ /* Prepare to ack again, see above. */
++ hwif_to_ack = hwif;
+ return 1;
+ }
+
+@@ -122,8 +160,24 @@
+
+ static void
+ cris_ide_write_command(unsigned long command)
+-{
++{
+ REG_WR_INT(ata, regi_ata, rw_ctrl2, command); /* write data to the drive's register */
++
++ /*
++ * Perform a pending ack if needed; see hwif_ack definition. Perhaps
++ * we should check closer that this call is really a part of the
++ * preparation to read the ATA status register or write to the ATA
++ * command register (causing deassert of INTRQ; see the ATA standard),
++ * but at time of this writing (and expected to sanely remain so), the
++ * first ATA register activity after an cris_ide_ack_intr call is
++ * certain to do exactly that.
++ */
++ if (hwif_to_ack) {
++ /* The drive may take this long to deassert INTRQ. */
++ ndelay(400);
++ cris_ide_ack_intr(hwif_to_ack);
++ hwif_to_ack = NULL;
++ }
+ }
+
+ static void
+@@ -160,8 +214,8 @@
+ {
+ reg_ata_rw_ctrl2 ctrl2 = {0};
+ ctrl2.addr = addr;
+- ctrl2.cs1 = cs1;
+- ctrl2.cs0 = cs0;
++ ctrl2.cs1 = !cs1;
++ ctrl2.cs0 = !cs0;
+ return REG_TYPE_CONV(int, reg_ata_rw_ctrl2, ctrl2);
+ }
+
+@@ -184,14 +238,14 @@
+
+ intr_mask.bus0 = regk_ata_yes;
+ intr_mask.bus1 = regk_ata_yes;
+- intr_mask.bus2 = regk_ata_yes;
++ intr_mask.bus2 = regk_ata_yes;
+ intr_mask.bus3 = regk_ata_yes;
+
+ REG_WR(ata, regi_ata, rw_intr_mask, intr_mask);
+
+ crisv32_request_dma(2, "ETRAX FS built-in ATA", DMA_VERBOSE_ON_ERROR, 0, dma_ata);
+ crisv32_request_dma(3, "ETRAX FS built-in ATA", DMA_VERBOSE_ON_ERROR, 0, dma_ata);
+-
++
+ crisv32_pinmux_alloc_fixed(pinmux_ata);
+ crisv32_pinmux_alloc_fixed(pinmux_ata0);
+ crisv32_pinmux_alloc_fixed(pinmux_ata1);
+@@ -204,14 +258,15 @@
+ DMA_ENABLE(regi_dma3);
+
+ DMA_WR_CMD (regi_dma2, regk_dma_set_w_size2);
+- DMA_WR_CMD (regi_dma3, regk_dma_set_w_size2);
++ DMA_WR_CMD (regi_dma3, regk_dma_set_w_size2);
+ }
+
+ static dma_descr_context mycontext __attribute__ ((__aligned__(32)));
+
+ #define cris_dma_descr_type dma_descr_data
+-#define cris_pio_read regk_ata_rd
+-#define cris_ultra_mask 0x7
++#define cris_pio_read (regk_ata_rd << 24)
++#define cris_ultra_mask 0x0 /* 0x7 for UDMA */
++#define IRQ ATA_INTR_VECT
+ #define MAX_DESCR_SIZE 0xffffffffUL
+
+ static unsigned long
+@@ -226,6 +281,8 @@
+ d->buf = (char*)virt_to_phys(buf);
+ d->after = d->buf + len;
+ d->eol = last;
++ /* assume descriptors are consecutively placed in memory */
++ d->next = last ? 0 : (cris_dma_descr_type*)virt_to_phys(d+1);
+ }
+
+ static void
+@@ -237,8 +294,10 @@
+ mycontext.saved_data = (dma_descr_data*)virt_to_phys(d);
+ mycontext.saved_data_buf = d->buf;
+ /* start the dma channel */
++ if (dir)
++ flush_dma_context(&mycontext); // Cache bug workaround
+ DMA_START_CONTEXT(dir ? regi_dma3 : regi_dma2, virt_to_phys(&mycontext));
+-
++
+ /* initiate a multi word dma read using PIO handshaking */
+ trf_cnt.cnt = len >> 1;
+ /* Due to a "feature" the transfer count has to be one extra word for UDMA. */
+@@ -248,7 +307,7 @@
+
+ ctrl2.rw = dir ? regk_ata_rd : regk_ata_wr;
+ ctrl2.trf_mode = regk_ata_dma;
+- ctrl2.hsh = type == TYPE_PIO ? regk_ata_pio :
++ ctrl2.hsh = type == TYPE_PIO ? regk_ata_pio :
+ type == TYPE_DMA ? regk_ata_dma : regk_ata_udma;
+ ctrl2.multi = regk_ata_yes;
+ ctrl2.dma_size = regk_ata_word;
+@@ -339,7 +398,7 @@
+ #define ATA_PIO0_STROBE 19
+ #define ATA_PIO0_HOLD 4
+
+-int
++int
+ cris_ide_ack_intr(ide_hwif_t* hwif)
+ {
+ return 1;
+@@ -348,13 +407,13 @@
+ static inline int
+ cris_ide_busy(void)
+ {
+- return *R_ATA_STATUS_DATA & IO_MASK(R_ATA_STATUS_DATA, busy) ;
++ return *R_ATA_STATUS_DATA & IO_MASK(R_ATA_STATUS_DATA, busy) ;
+ }
+
+ static inline int
+ cris_ide_ready(void)
+ {
+- return *R_ATA_STATUS_DATA & IO_MASK(R_ATA_STATUS_DATA, tr_rdy) ;
++ return *R_ATA_STATUS_DATA & IO_MASK(R_ATA_STATUS_DATA, tr_rdy) ;
+ }
+
+ static inline int
+@@ -364,12 +423,12 @@
+ *data = (unsigned short)status;
+ return status & IO_MASK(R_ATA_STATUS_DATA, dav);
+ }
+-
++
+ static void
+ cris_ide_write_command(unsigned long command)
+ {
+- *R_ATA_CTRL_DATA = command;
+-}
++ *R_ATA_CTRL_DATA = command;
++}
+
+ static void
+ cris_ide_set_speed(int type, int setup, int strobe, int hold)
+@@ -406,8 +465,8 @@
+ cris_ide_reg_addr(unsigned long addr, int cs0, int cs1)
+ {
+ return IO_FIELD(R_ATA_CTRL_DATA, addr, addr) |
+- IO_FIELD(R_ATA_CTRL_DATA, cs0, cs0) |
+- IO_FIELD(R_ATA_CTRL_DATA, cs1, cs1);
++ IO_FIELD(R_ATA_CTRL_DATA, cs0, cs0 ? 0 : 1) |
++ IO_FIELD(R_ATA_CTRL_DATA, cs1, cs1 ? 0 : 1);
+ }
+
+ static __init void
+@@ -484,6 +543,7 @@
+ #define cris_dma_descr_type etrax_dma_descr
+ #define cris_pio_read IO_STATE(R_ATA_CTRL_DATA, rw, read)
+ #define cris_ultra_mask 0x0
++#define IRQ 4
+ #define MAX_DESCR_SIZE 0x10000UL
+
+ static unsigned long
+@@ -497,8 +557,8 @@
+ {
+ d->buf = virt_to_phys(buf);
+ d->sw_len = len == MAX_DESCR_SIZE ? 0 : len;
+- if (last)
+- d->ctrl |= d_eol;
++ d->ctrl = last ? d_eol : 0;
++ d->next = last ? 0 : virt_to_phys(d+1); /* assumes descr's in array */
+ }
+
+ static void cris_ide_start_dma(ide_drive_t *drive, cris_dma_descr_type *d, int dir, int type, int len)
+@@ -521,14 +581,14 @@
+ *R_DMA_CH2_FIRST = virt_to_phys(d);
+ *R_DMA_CH2_CMD = IO_STATE(R_DMA_CH2_CMD, cmd, start);
+ }
+-
++
+ /* initiate a multi word dma read using DMA handshaking */
+
+ *R_ATA_TRANSFER_CNT =
+ IO_FIELD(R_ATA_TRANSFER_CNT, count, len >> 1);
+
+ cmd = dir ? IO_STATE(R_ATA_CTRL_DATA, rw, read) : IO_STATE(R_ATA_CTRL_DATA, rw, write);
+- cmd |= type == TYPE_PIO ? IO_STATE(R_ATA_CTRL_DATA, handsh, pio) :
++ cmd |= type == TYPE_PIO ? IO_STATE(R_ATA_CTRL_DATA, handsh, pio) :
+ IO_STATE(R_ATA_CTRL_DATA, handsh, dma);
+ *R_ATA_CTRL_DATA =
+ cmd |
+@@ -570,7 +630,7 @@
+ }
+
+ #endif
+-
++
+ void
+ cris_ide_outw(unsigned short data, unsigned long reg) {
+ int timeleft;
+@@ -597,7 +657,7 @@
+ if(!timeleft)
+ printk("ATA timeout reg 0x%lx := 0x%x\n", reg, data);
+
+- cris_ide_write_command(reg|data); /* write data to the drive's register */
++ cris_ide_write_command(reg|data); /* write data to the drive's register */
+
+ timeleft = IDE_REGISTER_TIMEOUT;
+ /* wait for transmitter ready */
+@@ -684,13 +744,15 @@
+ static void cris_atapi_output_bytes(ide_drive_t *drive, void *, unsigned int);
+ static int cris_dma_off (ide_drive_t *drive);
+ static int cris_dma_on (ide_drive_t *drive);
++static int cris_dma_host_off (ide_drive_t *drive);
++static int cris_dma_host_on (ide_drive_t *drive);
+
+ static void tune_cris_ide(ide_drive_t *drive, u8 pio)
+ {
+ int setup, strobe, hold;
+
+ switch(pio)
+- {
++ {
+ case 0:
+ setup = ATA_PIO0_SETUP;
+ strobe = ATA_PIO0_STROBE;
+@@ -715,7 +777,7 @@
+ setup = ATA_PIO4_SETUP;
+ strobe = ATA_PIO4_STROBE;
+ hold = ATA_PIO4_HOLD;
+- break;
++ break;
+ default:
+ return;
+ }
+@@ -733,7 +795,7 @@
+ }
+
+ switch(speed)
+- {
++ {
+ case XFER_UDMA_0:
+ cyc = ATA_UDMA0_CYC;
+ dvs = ATA_UDMA0_DVS;
+@@ -765,7 +827,7 @@
+ if (speed >= XFER_UDMA_0)
+ cris_ide_set_speed(TYPE_UDMA, cyc, dvs, 0);
+ else
+- cris_ide_set_speed(TYPE_DMA, 0, strobe, hold);
++ cris_ide_set_speed(TYPE_DMA, 0, strobe, hold);
+
+ return 0;
+ }
+@@ -790,11 +852,13 @@
+
+ for(h = 0; h < MAX_HWIFS; h++) {
+ ide_hwif_t *hwif = &ide_hwifs[h];
+- ide_setup_ports(&hw, cris_ide_base_address(h),
++ memset(&hw, 0, sizeof(hw));
++ ide_setup_ports(&hw, cris_ide_base_address(h),
+ ide_offsets,
+ 0, 0, cris_ide_ack_intr,
+- ide_default_irq(0));
++ IRQ);
+ ide_register_hw(&hw, &hwif);
++ hwif->irq = IRQ;
+ hwif->mmio = 2;
+ hwif->chipset = ide_etrax100;
+ hwif->tuneproc = &tune_cris_ide;
+@@ -814,13 +878,15 @@
+ hwif->OUTBSYNC = &cris_ide_outbsync;
+ hwif->INB = &cris_ide_inb;
+ hwif->INW = &cris_ide_inw;
+- hwif->ide_dma_host_off = &cris_dma_off;
+- hwif->ide_dma_host_on = &cris_dma_on;
++ hwif->ide_dma_host_off = &cris_dma_host_off;
++ hwif->ide_dma_host_on = &cris_dma_host_on;
+ hwif->ide_dma_off_quietly = &cris_dma_off;
++ hwif->ide_dma_on = &cris_dma_on;
+ hwif->udma_four = 0;
+ hwif->ultra_mask = cris_ultra_mask;
+ hwif->mwdma_mask = 0x07; /* Multiword DMA 0-2 */
+ hwif->swdma_mask = 0x07; /* Singleword DMA 0-2 */
++ hwif->rqsize = 256;
+ }
+
+ /* Reset pulse */
+@@ -835,13 +901,25 @@
+ cris_ide_set_speed(TYPE_UDMA, ATA_UDMA2_CYC, ATA_UDMA2_DVS, 0);
+ }
+
++static int cris_dma_host_off (ide_drive_t *drive)
++{
++ return 0;
++}
++
++static int cris_dma_host_on (ide_drive_t *drive)
++{
++ return 0;
++}
++
+ static int cris_dma_off (ide_drive_t *drive)
+ {
++ drive->using_dma = 0;
+ return 0;
+ }
+
+ static int cris_dma_on (ide_drive_t *drive)
+ {
++ drive->using_dma = 1;
+ return 0;
+ }
+
+@@ -958,30 +1036,28 @@
+ size += sg_dma_len(sg);
+ }
+
+- /* did we run out of descriptors? */
+-
+- if(count >= MAX_DMA_DESCRS) {
+- printk("%s: too few DMA descriptors\n", drive->name);
+- return 1;
+- }
+-
+- /* however, this case is more difficult - rw_trf_cnt cannot be more
+- than 65536 words per transfer, so in that case we need to either
++ /* rw_trf_cnt cannot be more than 131072 words per transfer,
++ (- 1 word for UDMA CRC) so in that case we need to either:
+ 1) use a DMA interrupt to re-trigger rw_trf_cnt and continue with
+ the descriptors, or
+ 2) simply do the request here, and get dma_intr to only ide_end_request on
+ those blocks that were actually set-up for transfer.
++ (The ide framework will issue a new request for the remainder)
+ */
+
+- if(ata_tot_size + size > 131072) {
++ if(ata_tot_size + size > 262140) {
+ printk("too large total ATA DMA request, %d + %d!\n", ata_tot_size, (int)size);
+ return 1;
+ }
+
+- /* If size > MAX_DESCR_SIZE it has to be splitted into new descriptors. Since we
+- don't handle size > 131072 only one split is necessary */
++ /* If size > MAX_DESCR_SIZE it has to be splitted into new descriptors. */
+
+- if(size > MAX_DESCR_SIZE) {
++ while (size > MAX_DESCR_SIZE) {
++ /* did we run out of descriptors? */
++ if(count >= MAX_DMA_DESCRS) {
++ printk("%s: too few DMA descriptors\n", drive->name);
++ return 1;
++ }
+ cris_ide_fill_descriptor(&ata_descrs[count], (void*)addr, MAX_DESCR_SIZE, 0);
+ count++;
+ ata_tot_size += MAX_DESCR_SIZE;
+@@ -989,6 +1065,11 @@
+ addr += MAX_DESCR_SIZE;
+ }
+
++ /* did we run out of descriptors? */
++ if(count >= MAX_DMA_DESCRS) {
++ printk("%s: too few DMA descriptors\n", drive->name);
++ return 1;
++ }
+ cris_ide_fill_descriptor(&ata_descrs[count], (void*)addr, size,i ? 0 : 1);
+ count++;
+ ata_tot_size += size;
+@@ -1050,8 +1131,12 @@
+
+ if (id && (id->capability & 1)) {
+ if (ide_use_dma(drive)) {
+- if (cris_config_drive_for_dma(drive))
+- return hwif->ide_dma_on(drive);
++ if (cris_config_drive_for_dma(drive)) {
++ if (hwif->ide_dma_on)
++ return hwif->ide_dma_on(drive);
++ else
++ return 1;
++ }
+ }
+ }
+
+--- linux-2.6.19.2.orig/drivers/serial/crisv10.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/drivers/serial/crisv10.c 2007-01-09 10:30:54.000000000 +0100
+@@ -2,7 +2,7 @@
+ *
+ * Serial port driver for the ETRAX 100LX chip
+ *
+- * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Axis Communications AB
++ * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004 Axis Communications AB
+ *
+ * Many, many authors. Based once upon a time on serial.c for 16x50.
+ *
+@@ -445,6 +445,7 @@
+
+ #include <asm/io.h>
+ #include <asm/irq.h>
++#include <asm/dma.h>
+ #include <asm/system.h>
+ #include <asm/bitops.h>
+ #include <linux/delay.h>
+@@ -454,8 +455,9 @@
+ /* non-arch dependent serial structures are in linux/serial.h */
+ #include <linux/serial.h>
+ /* while we keep our own stuff (struct e100_serial) in a local .h file */
+-#include "serial.h"
++#include "crisv10.h"
+ #include <asm/fasttimer.h>
++#include <asm/arch/io_interface_mux.h>
+
+ #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
+ #ifndef CONFIG_ETRAX_FAST_TIMER
+@@ -586,11 +588,10 @@
+ static void change_speed(struct e100_serial *info);
+ static void rs_throttle(struct tty_struct * tty);
+ static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
+-static int rs_write(struct tty_struct * tty, int from_user,
++static int rs_write(struct tty_struct * tty,
+ const unsigned char *buf, int count);
+ #ifdef CONFIG_ETRAX_RS485
+-static int e100_write_rs485(struct tty_struct * tty, int from_user,
+- const unsigned char *buf, int count);
++static int e100_write_rs485(struct tty_struct * tty, const unsigned char *buf, int count);
+ #endif
+ static int get_lsr_info(struct e100_serial * info, unsigned int *value);
+
+@@ -677,20 +678,39 @@
+ .rx_ctrl = DEF_RX,
+ .tx_ctrl = DEF_TX,
+ .iseteop = 2,
++ .dma_owner = dma_ser0,
++ .io_if = if_serial_0,
+ #ifdef CONFIG_ETRAX_SERIAL_PORT0
+ .enabled = 1,
+ #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
+ .dma_out_enabled = 1,
++ .dma_out_nbr = SER0_TX_DMA_NBR,
++ .dma_out_irq_nbr = SER0_DMA_TX_IRQ_NBR,
++ .dma_out_irq_flags = IRQF_DISABLED,
++ .dma_out_irq_description = "serial 0 dma tr",
+ #else
+ .dma_out_enabled = 0,
++ .dma_out_nbr = UINT_MAX,
++ .dma_out_irq_nbr = 0,
++ .dma_out_irq_flags = 0,
++ .dma_out_irq_description = NULL,
+ #endif
+ #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
+ .dma_in_enabled = 1,
++ .dma_in_nbr = SER0_RX_DMA_NBR,
++ .dma_in_irq_nbr = SER0_DMA_RX_IRQ_NBR,
++ .dma_in_irq_flags = IRQF_DISABLED,
++ .dma_in_irq_description = "serial 0 dma rec",
+ #else
+- .dma_in_enabled = 0
++ .dma_in_enabled = 0,
++ .dma_in_nbr = UINT_MAX,
++ .dma_in_irq_nbr = 0,
++ .dma_in_irq_flags = 0,
++ .dma_in_irq_description = NULL,
+ #endif
+ #else
+ .enabled = 0,
++ .io_if_description = NULL,
+ .dma_out_enabled = 0,
+ .dma_in_enabled = 0
+ #endif
+@@ -712,20 +732,42 @@
+ .rx_ctrl = DEF_RX,
+ .tx_ctrl = DEF_TX,
+ .iseteop = 3,
++ .dma_owner = dma_ser1,
++ .io_if = if_serial_1,
+ #ifdef CONFIG_ETRAX_SERIAL_PORT1
+ .enabled = 1,
++ .io_if_description = "ser1",
+ #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
+ .dma_out_enabled = 1,
++ .dma_out_nbr = SER1_TX_DMA_NBR,
++ .dma_out_irq_nbr = SER1_DMA_TX_IRQ_NBR,
++ .dma_out_irq_flags = IRQF_DISABLED,
++ .dma_out_irq_description = "serial 1 dma tr",
+ #else
+ .dma_out_enabled = 0,
++ .dma_out_nbr = UINT_MAX,
++ .dma_out_irq_nbr = 0,
++ .dma_out_irq_flags = 0,
++ .dma_out_irq_description = NULL,
+ #endif
+ #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
+ .dma_in_enabled = 1,
++ .dma_in_nbr = SER1_RX_DMA_NBR,
++ .dma_in_irq_nbr = SER1_DMA_RX_IRQ_NBR,
++ .dma_in_irq_flags = IRQF_DISABLED,
++ .dma_in_irq_description = "serial 1 dma rec",
+ #else
+- .dma_in_enabled = 0
++ .dma_in_enabled = 0,
++ .dma_in_enabled = 0,
++ .dma_in_nbr = UINT_MAX,
++ .dma_in_irq_nbr = 0,
++ .dma_in_irq_flags = 0,
++ .dma_in_irq_description = NULL,
+ #endif
+ #else
+ .enabled = 0,
++ .io_if_description = NULL,
++ .dma_in_irq_nbr = 0,
+ .dma_out_enabled = 0,
+ .dma_in_enabled = 0
+ #endif
+@@ -746,20 +788,40 @@
+ .rx_ctrl = DEF_RX,
+ .tx_ctrl = DEF_TX,
+ .iseteop = 0,
++ .dma_owner = dma_ser2,
++ .io_if = if_serial_2,
+ #ifdef CONFIG_ETRAX_SERIAL_PORT2
+ .enabled = 1,
++ .io_if_description = "ser2",
+ #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
+ .dma_out_enabled = 1,
++ .dma_out_nbr = SER2_TX_DMA_NBR,
++ .dma_out_irq_nbr = SER2_DMA_TX_IRQ_NBR,
++ .dma_out_irq_flags = IRQF_DISABLED,
++ .dma_out_irq_description = "serial 2 dma tr",
+ #else
+ .dma_out_enabled = 0,
++ .dma_in_nbr = UINT_MAX,
++ .dma_in_irq_nbr = 0,
++ .dma_in_irq_flags = 0,
++ .dma_in_irq_description = NULL,
+ #endif
+ #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
+ .dma_in_enabled = 1,
++ .dma_in_nbr = SER2_RX_DMA_NBR,
++ .dma_in_irq_nbr = SER2_DMA_RX_IRQ_NBR,
++ .dma_in_irq_flags = IRQF_DISABLED,
++ .dma_in_irq_description = "serial 2 dma rec",
+ #else
+- .dma_in_enabled = 0
++ .dma_in_enabled = 0,
++ .dma_in_nbr = UINT_MAX,
++ .dma_in_irq_nbr = 0,
++ .dma_in_irq_flags = 0,
++ .dma_in_irq_description = NULL,
+ #endif
+ #else
+ .enabled = 0,
++ .io_if_description = NULL,
+ .dma_out_enabled = 0,
+ .dma_in_enabled = 0
+ #endif
+@@ -780,20 +842,40 @@
+ .rx_ctrl = DEF_RX,
+ .tx_ctrl = DEF_TX,
+ .iseteop = 1,
++ .dma_owner = dma_ser3,
++ .io_if = if_serial_3,
+ #ifdef CONFIG_ETRAX_SERIAL_PORT3
+ .enabled = 1,
++ .io_if_description = "ser3",
+ #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
+ .dma_out_enabled = 1,
++ .dma_out_nbr = SER3_TX_DMA_NBR,
++ .dma_out_irq_nbr = SER3_DMA_TX_IRQ_NBR,
++ .dma_out_irq_flags = IRQF_DISABLED,
++ .dma_out_irq_description = "serial 3 dma tr",
+ #else
+ .dma_out_enabled = 0,
++ .dma_out_nbr = UINT_MAX,
++ .dma_out_irq_nbr = 0,
++ .dma_out_irq_flags = 0,
++ .dma_out_irq_description = NULL,
+ #endif
+ #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
+ .dma_in_enabled = 1,
++ .dma_in_nbr = SER3_RX_DMA_NBR,
++ .dma_in_irq_nbr = SER3_DMA_RX_IRQ_NBR,
++ .dma_in_irq_flags = IRQF_DISABLED,
++ .dma_in_irq_description = "serial 3 dma rec",
+ #else
+- .dma_in_enabled = 0
++ .dma_in_enabled = 0,
++ .dma_in_nbr = UINT_MAX,
++ .dma_in_irq_nbr = 0,
++ .dma_in_irq_flags = 0,
++ .dma_in_irq_description = NULL
+ #endif
+ #else
+ .enabled = 0,
++ .io_if_description = NULL,
+ .dma_out_enabled = 0,
+ .dma_in_enabled = 0
+ #endif
+@@ -1414,12 +1496,11 @@
+ {
+ unsigned long flags;
+
+- save_flags(flags);
+- cli();
++ local_irq_save(flags);
+ *e100_modem_pins[info->line].dtr_shadow &= ~mask;
+ *e100_modem_pins[info->line].dtr_shadow |= (set ? 0 : mask);
+ *e100_modem_pins[info->line].dtr_port = *e100_modem_pins[info->line].dtr_shadow;
+- restore_flags(flags);
++ local_irq_restore(flags);
+ }
+
+ #ifdef SERIAL_DEBUG_IO
+@@ -1438,12 +1519,11 @@
+ {
+ #ifndef CONFIG_SVINTO_SIM
+ unsigned long flags;
+- save_flags(flags);
+- cli();
++ local_irq_save(flags);
+ info->rx_ctrl &= ~E100_RTS_MASK;
+ info->rx_ctrl |= (set ? 0 : E100_RTS_MASK); /* RTS is active low */
+ info->port[REG_REC_CTRL] = info->rx_ctrl;
+- restore_flags(flags);
++ local_irq_restore(flags);
+ #ifdef SERIAL_DEBUG_IO
+ printk("ser%i rts %i\n", info->line, set);
+ #endif
+@@ -1461,12 +1541,11 @@
+ unsigned char mask = e100_modem_pins[info->line].ri_mask;
+ unsigned long flags;
+
+- save_flags(flags);
+- cli();
++ local_irq_save(flags);
+ *e100_modem_pins[info->line].ri_shadow &= ~mask;
+ *e100_modem_pins[info->line].ri_shadow |= (set ? 0 : mask);
+ *e100_modem_pins[info->line].ri_port = *e100_modem_pins[info->line].ri_shadow;
+- restore_flags(flags);
++ local_irq_restore(flags);
+ }
+ #endif
+ }
+@@ -1479,12 +1558,11 @@
+ unsigned char mask = e100_modem_pins[info->line].cd_mask;
+ unsigned long flags;
+
+- save_flags(flags);
+- cli();
++ local_irq_save(flags);
+ *e100_modem_pins[info->line].cd_shadow &= ~mask;
+ *e100_modem_pins[info->line].cd_shadow |= (set ? 0 : mask);
+ *e100_modem_pins[info->line].cd_port = *e100_modem_pins[info->line].cd_shadow;
+- restore_flags(flags);
++ local_irq_restore(flags);
+ }
+ #endif
+ }
+@@ -1558,8 +1636,7 @@
+ /* Disable output DMA channel for the serial port in question
+ * ( set to something other then serialX)
+ */
+- save_flags(flags);
+- cli();
++ local_irq_save(flags);
+ DFLOW(DEBUG_LOG(info->line, "disable_txdma_channel %i\n", info->line));
+ if (info->line == 0) {
+ if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma6)) ==
+@@ -1587,7 +1664,7 @@
+ }
+ }
+ *R_GEN_CONFIG = genconfig_shadow;
+- restore_flags(flags);
++ local_irq_restore(flags);
+ }
+
+
+@@ -1595,8 +1672,7 @@
+ {
+ unsigned long flags;
+
+- save_flags(flags);
+- cli();
++ local_irq_save(flags);
+ DFLOW(DEBUG_LOG(info->line, "enable_txdma_channel %i\n", info->line));
+ /* Enable output DMA channel for the serial port in question */
+ if (info->line == 0) {
+@@ -1613,7 +1689,7 @@
+ genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, serial3);
+ }
+ *R_GEN_CONFIG = genconfig_shadow;
+- restore_flags(flags);
++ local_irq_restore(flags);
+ }
+
+ static void e100_disable_rxdma_channel(struct e100_serial *info)
+@@ -1623,8 +1699,7 @@
+ /* Disable input DMA channel for the serial port in question
+ * ( set to something other then serialX)
+ */
+- save_flags(flags);
+- cli();
++ local_irq_save(flags);
+ if (info->line == 0) {
+ if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma7)) ==
+ IO_STATE(R_GEN_CONFIG, dma7, serial0)) {
+@@ -1651,7 +1726,7 @@
+ }
+ }
+ *R_GEN_CONFIG = genconfig_shadow;
+- restore_flags(flags);
++ local_irq_restore(flags);
+ }
+
+
+@@ -1659,8 +1734,7 @@
+ {
+ unsigned long flags;
+
+- save_flags(flags);
+- cli();
++ local_irq_save(flags);
+ /* Enable input DMA channel for the serial port in question */
+ if (info->line == 0) {
+ genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
+@@ -1676,7 +1750,7 @@
+ genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, serial3);
+ }
+ *R_GEN_CONFIG = genconfig_shadow;
+- restore_flags(flags);
++ local_irq_restore(flags);
+ }
+
+ #ifdef SERIAL_HANDLE_EARLY_ERRORS
+@@ -1783,7 +1857,7 @@
+ }
+
+ static int
+-e100_write_rs485(struct tty_struct *tty, int from_user,
++e100_write_rs485(struct tty_struct *tty,
+ const unsigned char *buf, int count)
+ {
+ struct e100_serial * info = (struct e100_serial *)tty->driver_data;
+@@ -1796,7 +1870,7 @@
+ */
+ info->rs485.enabled = 1;
+ /* rs_write now deals with RS485 if enabled */
+- count = rs_write(tty, from_user, buf, count);
++ count = rs_write(tty, buf, count);
+ info->rs485.enabled = old_enabled;
+ return count;
+ }
+@@ -1834,7 +1908,7 @@
+ unsigned long flags;
+ unsigned long xoff;
+
+- save_flags(flags); cli();
++ local_irq_save(flags);
+ DFLOW(DEBUG_LOG(info->line, "XOFF rs_stop xmit %i\n",
+ CIRC_CNT(info->xmit.head,
+ info->xmit.tail,SERIAL_XMIT_SIZE)));
+@@ -1846,7 +1920,7 @@
+ }
+
+ *((unsigned long *)&info->port[REG_XOFF]) = xoff;
+- restore_flags(flags);
++ local_irq_restore(flags);
+ }
+ }
+
+@@ -1858,7 +1932,7 @@
+ unsigned long flags;
+ unsigned long xoff;
+
+- save_flags(flags); cli();
++ local_irq_save(flags);
+ DFLOW(DEBUG_LOG(info->line, "XOFF rs_start xmit %i\n",
+ CIRC_CNT(info->xmit.head,
+ info->xmit.tail,SERIAL_XMIT_SIZE)));
+@@ -1873,7 +1947,7 @@
+ info->xmit.head != info->xmit.tail && info->xmit.buf)
+ e100_enable_serial_tx_ready_irq(info);
+
+- restore_flags(flags);
++ local_irq_restore(flags);
+ }
+ }
+
+@@ -2053,8 +2127,7 @@
+ static void flush_timeout_function(unsigned long data);
+ #define START_FLUSH_FAST_TIMER_TIME(info, string, usec) {\
+ unsigned long timer_flags; \
+- save_flags(timer_flags); \
+- cli(); \
++ local_irq_save(timer_flags); \
+ if (fast_timers[info->line].function == NULL) { \
+ serial_fast_timer_started++; \
+ TIMERD(DEBUG_LOG(info->line, "start_timer %i ", info->line)); \
+@@ -2068,7 +2141,7 @@
+ else { \
+ TIMERD(DEBUG_LOG(info->line, "timer %i already running\n", info->line)); \
+ } \
+- restore_flags(timer_flags); \
++ local_irq_restore(timer_flags); \
+ }
+ #define START_FLUSH_FAST_TIMER(info, string) START_FLUSH_FAST_TIMER_TIME(info, string, info->flush_time_usec)
+
+@@ -2097,8 +2170,7 @@
+ {
+ unsigned long flags;
+
+- save_flags(flags);
+- cli();
++ local_irq_save(flags);
+
+ if (!info->first_recv_buffer)
+ info->first_recv_buffer = buffer;
+@@ -2111,7 +2183,7 @@
+ if (info->recv_cnt > info->max_recv_cnt)
+ info->max_recv_cnt = info->recv_cnt;
+
+- restore_flags(flags);
++ local_irq_restore(flags);
+ }
+
+ static int
+@@ -2131,11 +2203,7 @@
+ info->icount.rx++;
+ } else {
+ struct tty_struct *tty = info->tty;
+- *tty->flip.char_buf_ptr = data;
+- *tty->flip.flag_buf_ptr = flag;
+- tty->flip.flag_buf_ptr++;
+- tty->flip.char_buf_ptr++;
+- tty->flip.count++;
++ tty_insert_flip_char(tty, data, flag);
+ info->icount.rx++;
+ }
+
+@@ -2320,7 +2388,6 @@
+ */
+ return;
+ #endif
+- info->tty->flip.count = 0;
+ if (info->uses_dma_in) {
+ /* reset the input dma channel to be sure it works */
+
+@@ -2482,70 +2549,21 @@
+ {
+ struct tty_struct *tty;
+ struct etrax_recv_buffer *buffer;
+- unsigned int length;
+ unsigned long flags;
+- int max_flip_size;
+-
+- if (!info->first_recv_buffer)
+- return;
+
+- save_flags(flags);
+- cli();
++ local_irq_save(flags);
++ tty = info->tty;
+
+- if (!(tty = info->tty)) {
+- restore_flags(flags);
++ if (!tty) {
++ local_irq_restore(flags);
+ return;
+ }
+
+- length = tty->flip.count;
+- /* Don't flip more than the ldisc has room for.
+- * The return value from ldisc.receive_room(tty) - might not be up to
+- * date, the previous flip of up to TTY_FLIPBUF_SIZE might be on the
+- * processed and not accounted for yet.
+- * Since we use DMA, 1 SERIAL_DESCR_BUF_SIZE could be on the way.
+- * Lets buffer data here and let flow control take care of it.
+- * Since we normally flip large chunks, the ldisc don't react
+- * with throttle until too late if we flip to much.
+- */
+- max_flip_size = tty->ldisc.receive_room(tty);
+- if (max_flip_size < 0)
+- max_flip_size = 0;
+- if (max_flip_size <= (TTY_FLIPBUF_SIZE + /* Maybe not accounted for */
+- length + info->recv_cnt + /* We have this queued */
+- 2*SERIAL_DESCR_BUF_SIZE + /* This could be on the way */
+- TTY_THRESHOLD_THROTTLE)) { /* Some slack */
+- /* check TTY_THROTTLED first so it indicates our state */
+- if (!test_and_set_bit(TTY_THROTTLED, &tty->flags)) {
+- DFLOW(DEBUG_LOG(info->line,"flush_to_flip throttles room %lu\n", max_flip_size));
+- rs_throttle(tty);
+- }
+-#if 0
+- else if (max_flip_size <= (TTY_FLIPBUF_SIZE + /* Maybe not accounted for */
+- length + info->recv_cnt + /* We have this queued */
+- SERIAL_DESCR_BUF_SIZE + /* This could be on the way */
+- TTY_THRESHOLD_THROTTLE)) { /* Some slack */
+- DFLOW(DEBUG_LOG(info->line,"flush_to_flip throttles again! %lu\n", max_flip_size));
+- rs_throttle(tty);
+- }
+-#endif
+- }
+-
+- if (max_flip_size > TTY_FLIPBUF_SIZE)
+- max_flip_size = TTY_FLIPBUF_SIZE;
+-
+- while ((buffer = info->first_recv_buffer) && length < max_flip_size) {
++ while ((buffer = info->first_recv_buffer)) {
+ unsigned int count = buffer->length;
+
+- if (length + count > max_flip_size)
+- count = max_flip_size - length;
+-
+- memcpy(tty->flip.char_buf_ptr + length, buffer->buffer, count);
+- memset(tty->flip.flag_buf_ptr + length, TTY_NORMAL, count);
+- tty->flip.flag_buf_ptr[length] = buffer->error;
+-
+- length += count;
++ tty_insert_flip_string(tty, buffer->buffer, count);
+ info->recv_cnt -= count;
+- DFLIP(DEBUG_LOG(info->line,"flip: %i\n", length));
+
+ if (count == buffer->length) {
+ info->first_recv_buffer = buffer->next;
+@@ -2560,24 +2578,7 @@
+ if (!info->first_recv_buffer)
+ info->last_recv_buffer = NULL;
+
+- tty->flip.count = length;
+- DFLIP(if (tty->ldisc.chars_in_buffer(tty) > 3500) {
+- DEBUG_LOG(info->line, "ldisc %lu\n",
+- tty->ldisc.chars_in_buffer(tty));
+- DEBUG_LOG(info->line, "flip.count %lu\n",
+- tty->flip.count);
+- }
+- );
+- restore_flags(flags);
+-
+- DFLIP(
+- if (1) {
+- DEBUG_LOG(info->line, "*** rxtot %i\n", info->icount.rx);
+- DEBUG_LOG(info->line, "ldisc %lu\n", tty->ldisc.chars_in_buffer(tty));
+- DEBUG_LOG(info->line, "room %lu\n", tty->ldisc.receive_room(tty));
+- }
+-
+- );
++ local_irq_restore(flags);
+
+ /* this includes a check for low-latency */
+ tty_flip_buffer_push(tty);
+@@ -2722,21 +2723,7 @@
+ printk("!NO TTY!\n");
+ return info;
+ }
+- if (tty->flip.count >= TTY_FLIPBUF_SIZE - TTY_THRESHOLD_THROTTLE) {
+- /* check TTY_THROTTLED first so it indicates our state */
+- if (!test_and_set_bit(TTY_THROTTLED, &tty->flags)) {
+- DFLOW(DEBUG_LOG(info->line, "rs_throttle flip.count: %i\n", tty->flip.count));
+- rs_throttle(tty);
+- }
+- }
+- if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
+- DEBUG_LOG(info->line, "force FLIP! %i\n", tty->flip.count);
+- tty->flip.work.func((void *) tty);
+- if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
+- DEBUG_LOG(info->line, "FLIP FULL! %i\n", tty->flip.count);
+- return info; /* if TTY_DONT_FLIP is set */
+- }
+- }
++
+ /* Read data and status at the same time */
+ data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]);
+ more_data:
+@@ -2789,27 +2776,25 @@
+ DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
+ info->errorcode = ERRCODE_INSERT_BREAK;
+ } else {
++ unsigned char data = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
++ char flag = TTY_NORMAL;
+ if (info->errorcode == ERRCODE_INSERT_BREAK) {
+- info->icount.brk++;
+- *tty->flip.char_buf_ptr = 0;
+- *tty->flip.flag_buf_ptr = TTY_BREAK;
+- tty->flip.flag_buf_ptr++;
+- tty->flip.char_buf_ptr++;
+- tty->flip.count++;
++ struct tty_struct *tty = info->tty;
++ tty_insert_flip_char(tty, 0, flag);
+ info->icount.rx++;
+ }
+- *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
+
+ if (data_read & IO_MASK(R_SERIAL0_READ, par_err)) {
+ info->icount.parity++;
+- *tty->flip.flag_buf_ptr = TTY_PARITY;
++ flag = TTY_PARITY;
+ } else if (data_read & IO_MASK(R_SERIAL0_READ, overrun)) {
+ info->icount.overrun++;
+- *tty->flip.flag_buf_ptr = TTY_OVERRUN;
++ flag = TTY_OVERRUN;
+ } else if (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) {
+ info->icount.frame++;
+- *tty->flip.flag_buf_ptr = TTY_FRAME;
++ flag = TTY_FRAME;
+ }
++ tty_insert_flip_char(tty, data, flag);
+ info->errorcode = 0;
+ }
+ info->break_detected_cnt = 0;
+@@ -2825,16 +2810,12 @@
+ log_int(rdpc(), 0, 0);
+ }
+ );
+- *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
+- *tty->flip.flag_buf_ptr = 0;
++ tty_insert_flip_char(tty, IO_EXTRACT(R_SERIAL0_READ, data_in, data_read), TTY_NORMAL);
+ } else {
+ DEBUG_LOG(info->line, "ser_rx int but no data_avail %08lX\n", data_read);
+ }
+
+
+- tty->flip.flag_buf_ptr++;
+- tty->flip.char_buf_ptr++;
+- tty->flip.count++;
+ info->icount.rx++;
+ data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]);
+ if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
+@@ -2972,7 +2953,7 @@
+ if (info->x_char) {
+ unsigned char rstat;
+ DFLOW(DEBUG_LOG(info->line, "tx_int: xchar 0x%02X\n", info->x_char));
+- save_flags(flags); cli();
++ local_irq_save(flags);
+ rstat = info->port[REG_STATUS];
+ DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
+
+@@ -2981,7 +2962,7 @@
+ info->x_char = 0;
+ /* We must enable since it is disabled in ser_interrupt */
+ e100_enable_serial_tx_ready_irq(info);
+- restore_flags(flags);
++ local_irq_restore(flags);
+ return;
+ }
+ if (info->uses_dma_out) {
+@@ -2989,7 +2970,7 @@
+ int i;
+ /* We only use normal tx interrupt when sending x_char */
+ DFLOW(DEBUG_LOG(info->line, "tx_int: xchar sent\n", 0));
+- save_flags(flags); cli();
++ local_irq_save(flags);
+ rstat = info->port[REG_STATUS];
+ DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
+ e100_disable_serial_tx_ready_irq(info);
+@@ -3002,7 +2983,7 @@
+ nop();
+
+ *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, continue);
+- restore_flags(flags);
++ local_irq_restore(flags);
+ return;
+ }
+ /* Normal char-by-char interrupt */
+@@ -3016,7 +2997,7 @@
+ }
+ DINTR2(DEBUG_LOG(info->line, "tx_int %c\n", info->xmit.buf[info->xmit.tail]));
+ /* Send a byte, rs485 timing is critical so turn of ints */
+- save_flags(flags); cli();
++ local_irq_save(flags);
+ info->port[REG_TR_DATA] = info->xmit.buf[info->xmit.tail];
+ info->xmit.tail = (info->xmit.tail + 1) & (SERIAL_XMIT_SIZE-1);
+ info->icount.tx++;
+@@ -3040,7 +3021,7 @@
+ /* We must enable since it is disabled in ser_interrupt */
+ e100_enable_serial_tx_ready_irq(info);
+ }
+- restore_flags(flags);
++ local_irq_restore(flags);
+
+ if (CIRC_CNT(info->xmit.head,
+ info->xmit.tail,
+@@ -3065,7 +3046,7 @@
+ int handled = 0;
+ static volatile unsigned long reentered_ready_mask = 0;
+
+- save_flags(flags); cli();
++ local_irq_save(flags);
+ irq_mask1_rd = *R_IRQ_MASK1_RD;
+ /* First handle all rx interrupts with ints disabled */
+ info = rs_table;
+@@ -3110,7 +3091,7 @@
+ /* Unblock the serial interrupt */
+ *R_VECT_MASK_SET = IO_STATE(R_VECT_MASK_SET, serial, set);
+
+- sti();
++ local_irq_enable();
+ ready_mask = (1 << (8+1+2*0)); /* ser0 tr_ready */
+ info = rs_table;
+ for (i = 0; i < NR_PORTS; i++) {
+@@ -3123,11 +3104,11 @@
+ ready_mask <<= 2;
+ }
+ /* handle_ser_tx_interrupt enables tr_ready interrupts */
+- cli();
++ local_irq_disable();
+ /* Handle reentered TX interrupt */
+ irq_mask1_rd = reentered_ready_mask;
+ }
+- cli();
++ local_irq_disable();
+ tx_started = 0;
+ } else {
+ unsigned long ready_mask;
+@@ -3143,7 +3124,7 @@
+ }
+ }
+
+- restore_flags(flags);
++ local_irq_restore(flags);
+ return IRQ_RETVAL(handled);
+ } /* ser_interrupt */
+ #endif
+@@ -3192,13 +3173,12 @@
+ if (!xmit_page)
+ return -ENOMEM;
+
+- save_flags(flags);
+- cli();
++ local_irq_save(flags);
+
+ /* if it was already initialized, skip this */
+
+ if (info->flags & ASYNC_INITIALIZED) {
+- restore_flags(flags);
++ local_irq_restore(flags);
+ free_page(xmit_page);
+ return 0;
+ }
+@@ -3324,7 +3304,7 @@
+
+ info->flags |= ASYNC_INITIALIZED;
+
+- restore_flags(flags);
++ local_irq_restore(flags);
+ return 0;
+ }
+
+@@ -3375,8 +3355,7 @@
+ info->irq);
+ #endif
+
+- save_flags(flags);
+- cli(); /* Disable interrupts */
++ local_irq_save(flags);
+
+ if (info->xmit.buf) {
+ free_page((unsigned long)info->xmit.buf);
+@@ -3400,7 +3379,7 @@
+ set_bit(TTY_IO_ERROR, &info->tty->flags);
+
+ info->flags &= ~ASYNC_INITIALIZED;
+- restore_flags(flags);
++ local_irq_restore(flags);
+ }
+
+
+@@ -3492,8 +3471,7 @@
+
+ #ifndef CONFIG_SVINTO_SIM
+ /* start with default settings and then fill in changes */
+- save_flags(flags);
+- cli();
++ local_irq_save(flags);
+ /* 8 bit, no/even parity */
+ info->rx_ctrl &= ~(IO_MASK(R_SERIAL0_REC_CTRL, rec_bitnr) |
+ IO_MASK(R_SERIAL0_REC_CTRL, rec_par_en) |
+@@ -3557,7 +3535,7 @@
+ }
+
+ *((unsigned long *)&info->port[REG_XOFF]) = xoff;
+- restore_flags(flags);
++ local_irq_restore(flags);
+ #endif /* !CONFIG_SVINTO_SIM */
+
+ update_char_time(info);
+@@ -3585,13 +3563,12 @@
+
+ /* this protection might not exactly be necessary here */
+
+- save_flags(flags);
+- cli();
++ local_irq_save(flags);
+ start_transmit(info);
+- restore_flags(flags);
++ local_irq_restore(flags);
+ }
+
+-static int rs_raw_write(struct tty_struct * tty, int from_user,
++static int rs_raw_write(struct tty_struct * tty,
+ const unsigned char *buf, int count)
+ {
+ int c, ret = 0;
+@@ -3614,72 +3591,37 @@
+ SIMCOUT(buf, count);
+ return count;
+ #endif
+- save_flags(flags);
++ local_save_flags(flags);
+ DFLOW(DEBUG_LOG(info->line, "write count %i ", count));
+ DFLOW(DEBUG_LOG(info->line, "ldisc %i\n", tty->ldisc.chars_in_buffer(tty)));
+
+
+- /* the cli/restore_flags pairs below are needed because the
++ /* the local_irq_disable/restore_flags pairs below are needed because the
+ * DMA interrupt handler moves the info->xmit values. the memcpy
+ * needs to be in the critical region unfortunately, because we
+ * need to read xmit values, memcpy, write xmit values in one
+ * atomic operation... this could perhaps be avoided by more clever
+ * design.
+ */
+- if (from_user) {
+- mutex_lock(&tmp_buf_mutex);
+- while (1) {
+- int c1;
+- c = CIRC_SPACE_TO_END(info->xmit.head,
+- info->xmit.tail,
+- SERIAL_XMIT_SIZE);
+- if (count < c)
+- c = count;
+- if (c <= 0)
+- break;
+-
+- c -= copy_from_user(tmp_buf, buf, c);
+- if (!c) {
+- if (!ret)
+- ret = -EFAULT;
+- break;
+- }
+- cli();
+- c1 = CIRC_SPACE_TO_END(info->xmit.head,
+- info->xmit.tail,
+- SERIAL_XMIT_SIZE);
+- if (c1 < c)
+- c = c1;
+- memcpy(info->xmit.buf + info->xmit.head, tmp_buf, c);
+- info->xmit.head = ((info->xmit.head + c) &
+- (SERIAL_XMIT_SIZE-1));
+- restore_flags(flags);
+- buf += c;
+- count -= c;
+- ret += c;
+- }
+- mutex_unlock(&tmp_buf_mutex);
+- } else {
+- cli();
+- while (count) {
+- c = CIRC_SPACE_TO_END(info->xmit.head,
+- info->xmit.tail,
+- SERIAL_XMIT_SIZE);
+-
+- if (count < c)
+- c = count;
+- if (c <= 0)
+- break;
+-
+- memcpy(info->xmit.buf + info->xmit.head, buf, c);
+- info->xmit.head = (info->xmit.head + c) &
+- (SERIAL_XMIT_SIZE-1);
+- buf += c;
+- count -= c;
+- ret += c;
+- }
+- restore_flags(flags);
++ local_irq_disable();
++ while (count) {
++ c = CIRC_SPACE_TO_END(info->xmit.head,
++ info->xmit.tail,
++ SERIAL_XMIT_SIZE);
++
++ if (count < c)
++ c = count;
++ if (c <= 0)
++ break;
++
++ memcpy(info->xmit.buf + info->xmit.head, buf, c);
++ info->xmit.head = (info->xmit.head + c) &
++ (SERIAL_XMIT_SIZE-1);
++ buf += c;
++ count -= c;
++ ret += c;
+ }
++ local_irq_restore(flags);
+
+ /* enable transmitter if not running, unless the tty is stopped
+ * this does not need IRQ protection since if tr_running == 0
+@@ -3698,7 +3640,7 @@
+ } /* raw_raw_write() */
+
+ static int
+-rs_write(struct tty_struct * tty, int from_user,
++rs_write(struct tty_struct * tty,
+ const unsigned char *buf, int count)
+ {
+ #if defined(CONFIG_ETRAX_RS485)
+@@ -3725,7 +3667,7 @@
+ }
+ #endif /* CONFIG_ETRAX_RS485 */
+
+- count = rs_raw_write(tty, from_user, buf, count);
++ count = rs_raw_write(tty, buf, count);
+
+ #if defined(CONFIG_ETRAX_RS485)
+ if (info->rs485.enabled)
+@@ -3793,10 +3735,9 @@
+ struct e100_serial *info = (struct e100_serial *)tty->driver_data;
+ unsigned long flags;
+
+- save_flags(flags);
+- cli();
++ local_irq_save(flags);
+ info->xmit.head = info->xmit.tail = 0;
+- restore_flags(flags);
++ local_irq_restore(flags);
+
+ wake_up_interruptible(&tty->write_wait);
+
+@@ -3818,7 +3759,7 @@
+ {
+ struct e100_serial *info = (struct e100_serial *)tty->driver_data;
+ unsigned long flags;
+- save_flags(flags); cli();
++ local_irq_save(flags);
+ if (info->uses_dma_out) {
+ /* Put the DMA on hold and disable the channel */
+ *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, hold);
+@@ -3835,7 +3776,7 @@
+ DFLOW(DEBUG_LOG(info->line, "rs_send_xchar 0x%02X\n", ch));
+ info->x_char = ch;
+ e100_enable_serial_tx_ready_irq(info);
+- restore_flags(flags);
++ local_irq_restore(flags);
+ }
+
+ /*
+@@ -4085,61 +4026,6 @@
+ return 0;
+ }
+
+-
+-static int
+-set_modem_info(struct e100_serial * info, unsigned int cmd,
+- unsigned int *value)
+-{
+- unsigned int arg;
+-
+- if (copy_from_user(&arg, value, sizeof(int)))
+- return -EFAULT;
+-
+- switch (cmd) {
+- case TIOCMBIS:
+- if (arg & TIOCM_RTS) {
+- e100_rts(info, 1);
+- }
+- if (arg & TIOCM_DTR) {
+- e100_dtr(info, 1);
+- }
+- /* Handle FEMALE behaviour */
+- if (arg & TIOCM_RI) {
+- e100_ri_out(info, 1);
+- }
+- if (arg & TIOCM_CD) {
+- e100_cd_out(info, 1);
+- }
+- break;
+- case TIOCMBIC:
+- if (arg & TIOCM_RTS) {
+- e100_rts(info, 0);
+- }
+- if (arg & TIOCM_DTR) {
+- e100_dtr(info, 0);
+- }
+- /* Handle FEMALE behaviour */
+- if (arg & TIOCM_RI) {
+- e100_ri_out(info, 0);
+- }
+- if (arg & TIOCM_CD) {
+- e100_cd_out(info, 0);
+- }
+- break;
+- case TIOCMSET:
+- e100_rts(info, arg & TIOCM_RTS);
+- e100_dtr(info, arg & TIOCM_DTR);
+- /* Handle FEMALE behaviour */
+- e100_ri_out(info, arg & TIOCM_RI);
+- e100_cd_out(info, arg & TIOCM_CD);
+- break;
+- default:
+- return -EINVAL;
+- }
+- return 0;
+-}
+-
+-
+ static void
+ rs_break(struct tty_struct *tty, int break_state)
+ {
+@@ -4149,8 +4035,7 @@
+ if (!info->port)
+ return;
+
+- save_flags(flags);
+- cli();
++ local_irq_save(flags);
+ if (break_state == -1) {
+ /* Go to manual mode and set the txd pin to 0 */
+ info->tx_ctrl &= 0x3F; /* Clear bit 7 (txd) and 6 (tr_enable) */
+@@ -4158,7 +4043,42 @@
+ info->tx_ctrl |= (0x80 | 0x40); /* Set bit 7 (txd) and 6 (tr_enable) */
+ }
+ info->port[REG_TR_CTRL] = info->tx_ctrl;
+- restore_flags(flags);
++ local_irq_restore(flags);
++}
++
++static int
++rs_tiocmset(struct tty_struct *tty, struct file * file, unsigned int set, unsigned int clear)
++{
++ struct e100_serial * info = (struct e100_serial *)tty->driver_data;
++
++ if (clear & TIOCM_RTS) {
++ e100_rts(info, 0);
++ }
++ if (clear & TIOCM_DTR) {
++ e100_dtr(info, 0);
++ }
++ /* Handle FEMALE behaviour */
++ if (clear & TIOCM_RI) {
++ e100_ri_out(info, 0);
++ }
++ if (clear & TIOCM_CD) {
++ e100_cd_out(info, 0);
++ }
++
++ if (set & TIOCM_RTS) {
++ e100_rts(info, 1);
++ }
++ if (set & TIOCM_DTR) {
++ e100_dtr(info, 1);
++ }
++ /* Handle FEMALE behaviour */
++ if (set & TIOCM_RI) {
++ e100_ri_out(info, 1);
++ }
++ if (set & TIOCM_CD) {
++ e100_cd_out(info, 1);
++ }
++ return 0;
+ }
+
+ static int
+@@ -4177,10 +4097,6 @@
+ switch (cmd) {
+ case TIOCMGET:
+ return get_modem_info(info, (unsigned int *) arg);
+- case TIOCMBIS:
+- case TIOCMBIC:
+- case TIOCMSET:
+- return set_modem_info(info, cmd, (unsigned int *) arg);
+ case TIOCGSERIAL:
+ return get_serial_info(info,
+ (struct serial_struct *) arg);
+@@ -4212,7 +4128,7 @@
+ if (copy_from_user(&rs485wr, (struct rs485_write*)arg, sizeof(rs485wr)))
+ return -EFAULT;
+
+- return e100_write_rs485(tty, 1, rs485wr.outc, rs485wr.outc_size);
++ return e100_write_rs485(tty, rs485wr.outc, rs485wr.outc_size);
+ }
+ #endif
+
+@@ -4242,46 +4158,6 @@
+
+ }
+
+-/* In debugport.c - register a console write function that uses the normal
+- * serial driver
+- */
+-typedef int (*debugport_write_function)(int i, const char *buf, unsigned int len);
+-
+-extern debugport_write_function debug_write_function;
+-
+-static int rs_debug_write_function(int i, const char *buf, unsigned int len)
+-{
+- int cnt;
+- int written = 0;
+- struct tty_struct *tty;
+- static int recurse_cnt = 0;
+-
+- tty = rs_table[i].tty;
+- if (tty) {
+- unsigned long flags;
+- if (recurse_cnt > 5) /* We skip this debug output */
+- return 1;
+-
+- local_irq_save(flags);
+- recurse_cnt++;
+- local_irq_restore(flags);
+- do {
+- cnt = rs_write(tty, 0, buf + written, len);
+- if (cnt >= 0) {
+- written += cnt;
+- buf += cnt;
+- len -= cnt;
+- } else
+- len = cnt;
+- } while(len > 0);
+- local_irq_save(flags);
+- recurse_cnt--;
+- local_irq_restore(flags);
+- return 1;
+- }
+- return 0;
+-}
+-
+ /*
+ * ------------------------------------------------------------
+ * rs_close()
+@@ -4303,11 +4179,10 @@
+
+ /* interrupts are disabled for this entire function */
+
+- save_flags(flags);
+- cli();
++ local_irq_save(flags);
+
+ if (tty_hung_up_p(filp)) {
+- restore_flags(flags);
++ local_irq_restore(flags);
+ return;
+ }
+
+@@ -4334,7 +4209,7 @@
+ info->count = 0;
+ }
+ if (info->count) {
+- restore_flags(flags);
++ local_irq_restore(flags);
+ return;
+ }
+ info->flags |= ASYNC_CLOSING;
+@@ -4388,7 +4263,7 @@
+ }
+ info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
+ wake_up_interruptible(&info->close_wait);
+- restore_flags(flags);
++ local_irq_restore(flags);
+
+ /* port closed */
+
+@@ -4410,6 +4285,28 @@
+ #endif
+ }
+ #endif
++
++ /*
++ * Release any allocated DMA irq's.
++ */
++ if (info->dma_in_enabled) {
++ cris_free_dma(info->dma_in_nbr, info->dma_in_irq_description);
++ free_irq(info->dma_in_irq_nbr,
++ info);
++ info->uses_dma_in = 0;
++#ifdef SERIAL_DEBUG_OPEN
++ printk("DMA irq '%s' freed\n", info->dma_in_irq_description);
++#endif
++ }
++ if (info->dma_out_enabled) {
++ free_irq(info->dma_out_irq_nbr,
++ info);
++ cris_free_dma(info->dma_out_nbr, info->dma_out_irq_description);
++ info->uses_dma_out = 0;
++#ifdef SERIAL_DEBUG_OPEN
++ printk("DMA irq '%s' freed\n", info->dma_out_irq_description);
++#endif
++ }
+ }
+
+ /*
+@@ -4485,7 +4382,7 @@
+ if (tty_hung_up_p(filp) ||
+ (info->flags & ASYNC_CLOSING)) {
+ if (info->flags & ASYNC_CLOSING)
+- interruptible_sleep_on(&info->close_wait);
++ wait_event_interruptible(info->close_wait, 0);
+ #ifdef SERIAL_DO_RESTART
+ if (info->flags & ASYNC_HUP_NOTIFY)
+ return -EAGAIN;
+@@ -4523,21 +4420,19 @@
+ printk("block_til_ready before block: ttyS%d, count = %d\n",
+ info->line, info->count);
+ #endif
+- save_flags(flags);
+- cli();
++ local_irq_save(flags);
+ if (!tty_hung_up_p(filp)) {
+ extra_count++;
+ info->count--;
+ }
+- restore_flags(flags);
++ local_irq_restore(flags);
+ info->blocked_open++;
+ while (1) {
+- save_flags(flags);
+- cli();
++ local_irq_save(flags);
+ /* assert RTS and DTR */
+ e100_rts(info, 1);
+ e100_dtr(info, 1);
+- restore_flags(flags);
++ local_irq_restore(flags);
+ set_current_state(TASK_INTERRUPTIBLE);
+ if (tty_hung_up_p(filp) ||
+ !(info->flags & ASYNC_INITIALIZED)) {
+@@ -4589,9 +4484,9 @@
+ struct e100_serial *info;
+ int retval, line;
+ unsigned long page;
++ int allocated_resources = 0;
+
+ /* find which port we want to open */
+-
+ line = tty->index;
+
+ if (line < 0 || line >= NR_PORTS)
+@@ -4632,7 +4527,7 @@
+ if (tty_hung_up_p(filp) ||
+ (info->flags & ASYNC_CLOSING)) {
+ if (info->flags & ASYNC_CLOSING)
+- interruptible_sleep_on(&info->close_wait);
++ wait_event_interruptible(info->close_wait, 0);
+ #ifdef SERIAL_DO_RESTART
+ return ((info->flags & ASYNC_HUP_NOTIFY) ?
+ -EAGAIN : -ERESTARTSYS);
+@@ -4642,12 +4537,79 @@
+ }
+
+ /*
++ * If DMA is enabled try to allocate the irq's.
++ */
++ if (info->count == 1) {
++ allocated_resources = 1;
++ if (info->dma_in_enabled) {
++ if (request_irq(info->dma_in_irq_nbr,
++ rec_interrupt,
++ info->dma_in_irq_flags,
++ info->dma_in_irq_description,
++ info)) {
++ printk(KERN_WARNING "DMA irq '%s' busy; falling back to non-DMA mode\n", info->dma_in_irq_description);
++ /* Make sure we never try to use DMA in for the port again. */
++ info->dma_in_enabled = 0;
++ } else if (cris_request_dma(info->dma_in_nbr,
++ info->dma_in_irq_description,
++ DMA_VERBOSE_ON_ERROR,
++ info->dma_owner)) {
++ free_irq(info->dma_in_irq_nbr, info);
++ printk(KERN_WARNING "DMA '%s' busy; falling back to non-DMA mode\n", info->dma_in_irq_description);
++ /* Make sure we never try to use DMA in for the port again. */
++ info->dma_in_enabled = 0;
++ }
++#ifdef SERIAL_DEBUG_OPEN
++ else printk("DMA irq '%s' allocated\n", info->dma_in_irq_description);
++#endif
++ }
++ if (info->dma_out_enabled) {
++ if (request_irq(info->dma_out_irq_nbr,
++ tr_interrupt,
++ info->dma_out_irq_flags,
++ info->dma_out_irq_description,
++ info)) {
++ printk(KERN_WARNING "DMA irq '%s' busy; falling back to non-DMA mode\n", info->dma_out_irq_description);
++ /* Make sure we never try to use DMA out for the port again. */
++ info->dma_out_enabled = 0;
++ } else if (cris_request_dma(info->dma_out_nbr,
++ info->dma_out_irq_description,
++ DMA_VERBOSE_ON_ERROR,
++ info->dma_owner)) {
++ free_irq(info->dma_out_irq_nbr, info);
++ printk(KERN_WARNING "DMA '%s' busy; falling back to non-DMA mode\n", info->dma_out_irq_description);
++ /* Make sure we never try to use DMA in for the port again. */
++ info->dma_out_enabled = 0;
++ }
++#ifdef SERIAL_DEBUG_OPEN
++ else printk("DMA irq '%s' allocated\n", info->dma_out_irq_description);
++#endif
++ }
++ }
++
++ /*
+ * Start up the serial port
+ */
+
+ retval = startup(info);
+- if (retval)
+- return retval;
++ if (retval) {
++ if (allocated_resources) {
++ if (info->dma_out_enabled) {
++ cris_free_dma(info->dma_out_nbr, info->dma_out_irq_description);
++ free_irq(info->dma_out_irq_nbr,
++ info);
++ }
++ if (info->dma_in_enabled) {
++ cris_free_dma(info->dma_in_nbr, info->dma_in_irq_description);
++ free_irq(info->dma_in_irq_nbr,
++ info);
++ }
++ }
++ /* FIXME Decrease count info->count here too? */
++ return retval;
++
++ }
++
+
+ retval = block_til_ready(tty, filp, info);
+ if (retval) {
+@@ -4655,6 +4617,19 @@
+ printk("rs_open returning after block_til_ready with %d\n",
+ retval);
+ #endif
++ if (allocated_resources) {
++ if (info->dma_out_enabled) {
++ cris_free_dma(info->dma_out_nbr, info->dma_out_irq_description);
++ free_irq(info->dma_out_irq_nbr,
++ info);
++ }
++ if (info->dma_in_enabled) {
++ cris_free_dma(info->dma_in_nbr, info->dma_in_irq_description);
++ free_irq(info->dma_in_irq_nbr,
++ info);
++ }
++ }
++
+ return retval;
+ }
+
+@@ -4844,6 +4819,7 @@
+ .send_xchar = rs_send_xchar,
+ .wait_until_sent = rs_wait_until_sent,
+ .read_proc = rs_read_proc,
++ .tiocmset = rs_tiocmset
+ };
+
+ static int __init
+@@ -4863,7 +4839,22 @@
+ #if !defined(CONFIG_ETRAX_SERIAL_FAST_TIMER)
+ init_timer(&flush_timer);
+ flush_timer.function = timed_flush_handler;
+- mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
++ mod_timer(&flush_timer, jiffies + 5);
++#endif
++
++#if defined(CONFIG_ETRAX_RS485)
++#if defined(CONFIG_ETRAX_RS485_ON_PA)
++ if (cris_io_interface_allocate_pins(if_ser0, 'a', rs485_pa_bit, rs485_pa_bit)) {
++ printk(KERN_CRIT "ETRAX100LX serial: Could not allocate RS485 pin\n");
++ return -EBUSY;
++ }
++#endif
++#if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
++ if (cris_io_interface_allocate_pins(if_ser0, 'g', rs485_pa_bit, rs485_port_g_bit)) {
++ printk(KERN_CRIT "ETRAX100LX serial: Could not allocate RS485 pin\n");
++ return -EBUSY;
++ }
++#endif
+ #endif
+
+ /* Initialize the tty_driver structure */
+@@ -4888,6 +4879,14 @@
+ /* do some initializing for the separate ports */
+
+ for (i = 0, info = rs_table; i < NR_PORTS; i++,info++) {
++ if (info->enabled) {
++ if (cris_request_io_interface(info->io_if, info->io_if_description)) {
++ printk(KERN_CRIT "ETRAX100LX async serial: Could not allocate IO pins for %s, port %d\n",
++ info->io_if_description,
++ i);
++ info->enabled = 0;
++ }
++ }
+ info->uses_dma_in = 0;
+ info->uses_dma_out = 0;
+ info->line = i;
+@@ -4939,64 +4938,16 @@
+ #endif
+
+ #ifndef CONFIG_SVINTO_SIM
++#ifndef CONFIG_ETRAX_KGDB
+ /* Not needed in simulator. May only complicate stuff. */
+ /* hook the irq's for DMA channel 6 and 7, serial output and input, and some more... */
+
+- if (request_irq(SERIAL_IRQ_NBR, ser_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial ", NULL))
+- panic("irq8");
+-
+-#ifdef CONFIG_ETRAX_SERIAL_PORT0
+-#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
+- if (request_irq(SER0_DMA_TX_IRQ_NBR, tr_interrupt, IRQF_DISABLED, "serial 0 dma tr", NULL))
+- panic("irq22");
+-#endif
+-#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
+- if (request_irq(SER0_DMA_RX_IRQ_NBR, rec_interrupt, IRQF_DISABLED, "serial 0 dma rec", NULL))
+- panic("irq23");
+-#endif
+-#endif
+-
+-#ifdef CONFIG_ETRAX_SERIAL_PORT1
+-#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
+- if (request_irq(SER1_DMA_TX_IRQ_NBR, tr_interrupt, IRQF_DISABLED, "serial 1 dma tr", NULL))
+- panic("irq24");
+-#endif
+-#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
+- if (request_irq(SER1_DMA_RX_IRQ_NBR, rec_interrupt, IRQF_DISABLED, "serial 1 dma rec", NULL))
+- panic("irq25");
+-#endif
+-#endif
+-#ifdef CONFIG_ETRAX_SERIAL_PORT2
+- /* DMA Shared with par0 (and SCSI0 and ATA) */
+-#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
+- if (request_irq(SER2_DMA_TX_IRQ_NBR, tr_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial 2 dma tr", NULL))
+- panic("irq18");
+-#endif
+-#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
+- if (request_irq(SER2_DMA_RX_IRQ_NBR, rec_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial 2 dma rec", NULL))
+- panic("irq19");
+-#endif
+-#endif
+-#ifdef CONFIG_ETRAX_SERIAL_PORT3
+- /* DMA Shared with par1 (and SCSI1 and Extern DMA 0) */
+-#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
+- if (request_irq(SER3_DMA_TX_IRQ_NBR, tr_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial 3 dma tr", NULL))
+- panic("irq20");
+-#endif
+-#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
+- if (request_irq(SER3_DMA_RX_IRQ_NBR, rec_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial 3 dma rec", NULL))
+- panic("irq21");
+-#endif
+-#endif
++ if (request_irq(SERIAL_IRQ_NBR, ser_interrupt, IRQF_SHARED | IRQF_DISABLED, "serial ", driver))
++ panic("%s: Failed to request irq8", __FUNCTION__);
+
+-#ifdef CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
+- if (request_irq(TIMER1_IRQ_NBR, timeout_interrupt, IRQF_SHARED | IRQF_DISABLED,
+- "fast serial dma timeout", NULL)) {
+- printk(KERN_CRIT "err: timer1 irq\n");
+- }
+ #endif
+ #endif /* CONFIG_SVINTO_SIM */
+- debug_write_function = rs_debug_write_function;
++
+ return 0;
+ }
+
+--- linux-2.6.19.2.orig/drivers/serial/crisv10.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/drivers/serial/crisv10.h 2006-10-13 14:44:38.000000000 +0200
+@@ -9,6 +9,8 @@
+
+ #include <linux/circ_buf.h>
+ #include <asm/termios.h>
++#include <asm/dma.h>
++#include <asm/arch/io_interface_mux.h>
+
+ /* Software state per channel */
+
+@@ -61,6 +63,19 @@
+ u8 dma_in_enabled:1; /* Set to 1 if DMA should be used */
+
+ /* end of fields defined in rs_table[] in .c-file */
++ int dma_owner;
++ unsigned int dma_in_nbr;
++ unsigned int dma_out_nbr;
++ unsigned int dma_in_irq_nbr;
++ unsigned int dma_out_irq_nbr;
++ unsigned long dma_in_irq_flags;
++ unsigned long dma_out_irq_flags;
++ char *dma_in_irq_description;
++ char *dma_out_irq_description;
++
++ enum cris_io_interface io_if;
++ char *io_if_description;
++
+ u8 uses_dma_in; /* Set to 1 if DMA is used */
+ u8 uses_dma_out; /* Set to 1 if DMA is used */
+ u8 forced_eop; /* a fifo eop has been forced */
+--- linux-2.6.19.2.orig/drivers/serial/crisv32.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/drivers/serial/crisv32.c 2007-01-05 09:59:53.000000000 +0100
+@@ -0,0 +1,2333 @@
++/* $Id: crisv32.c,v 1.78 2007/01/05 08:59:53 starvik Exp $
++ *
++ * Serial port driver for the ETRAX FS chip
++ *
++ * Copyright (C) 1998-2006 Axis Communications AB
++ *
++ * Many, many authors. Based once upon a time on serial.c for 16x50.
++ *
++ * Johan Adolfsson - port to ETRAX FS
++ * Mikael Starvik - port to serial_core framework
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/console.h>
++#include <linux/types.h>
++#include <linux/errno.h>
++#include <linux/serial_core.h>
++
++#include <asm/io.h>
++#include <asm/irq.h>
++#include <asm/system.h>
++#include <asm/uaccess.h>
++
++#include <asm/arch/dma.h>
++#include <asm/arch/system.h>
++#include <asm/arch/pinmux.h>
++#include <asm/arch/hwregs/dma.h>
++#include <asm/arch/hwregs/reg_rdwr.h>
++#include <asm/arch/hwregs/ser_defs.h>
++#include <asm/arch/hwregs/dma_defs.h>
++#include <asm/arch/hwregs/gio_defs.h>
++#include <asm/arch/hwregs/intr_vect_defs.h>
++#include <asm/arch/hwregs/reg_map.h>
++
++#define UART_NR 5 /* 4 ports + dummy port */
++#define SERIAL_RECV_DESCRIPTORS 8
++
++/* We only buffer 255 characters here, no need for more tx descriptors. */
++#define SERIAL_TX_DESCRIPTORS 4
++
++/* Kept for experimental purposes. */
++#define ETRAX_SER_FIFO_SIZE 1
++#define SERIAL_DESCR_BUF_SIZE 256
++#define regi_NULL 0
++#define DMA_WAIT_UNTIL_RESET(inst) \
++ do { \
++ reg_dma_rw_stat r; \
++ do { \
++ r = REG_RD(dma, (inst), rw_stat); \
++ } while (r.mode != regk_dma_rst); \
++ } while (0)
++
++/* Macro to set up control lines for a port. */
++#define SETUP_PINS(port) \
++ if (serial_cris_ports[port].used) { \
++ if (strcmp(CONFIG_ETRAX_SER##port##_DTR_BIT, "")) \
++ crisv32_io_get_name(&serial_cris_ports[port].dtr_pin, \
++ CONFIG_ETRAX_SER##port##_DTR_BIT); \
++ else \
++ serial_cris_ports[port].dtr_pin = dummy_pin; \
++ if (strcmp(CONFIG_ETRAX_SER##port##_DSR_BIT, "")) \
++ crisv32_io_get_name(&serial_cris_ports[port].dsr_pin, \
++ CONFIG_ETRAX_SER##port##_DSR_BIT); \
++ else \
++ serial_cris_ports[port].dsr_pin = dummy_pin; \
++ if (strcmp(CONFIG_ETRAX_SER##port##_RI_BIT, "")) \
++ crisv32_io_get_name(&serial_cris_ports[port].ri_pin, \
++ CONFIG_ETRAX_SER##port##_RI_BIT); \
++ else \
++ serial_cris_ports[port].ri_pin = dummy_pin; \
++ if (strcmp(CONFIG_ETRAX_SER##port##_CD_BIT, "")) \
++ crisv32_io_get_name(&serial_cris_ports[port].cd_pin, \
++ CONFIG_ETRAX_SER##port##_CD_BIT); \
++ else \
++ serial_cris_ports[port].cd_pin = dummy_pin; \
++ }
++
++/* Set a serial port register if anything has changed. */
++#define MODIFY_REG(instance, reg, var) \
++ if (REG_RD_INT(ser, instance, reg) \
++ != REG_TYPE_CONV(int, reg_ser_##reg, var)) \
++ REG_WR(ser, instance, reg, var);
++
++/*
++ * Regarding RS485 operation in crisv32 serial driver.
++ * ---------------------------------------------------
++ * RS485 can be run in two modes, full duplex using four wires (485FD) and
++ * half duplex using two wires (485HD). The default mode of each serial port
++ * is configured in the kernel configuration. The available modes are:
++ * RS-232, RS-485 half duplex, and RS-485 full duplex.
++ *
++ * In the 485HD mode the direction of the data bus must be able to switch.
++ * The direction of the transceiver is controlled by the RTS signal. Hence
++ * the auto_rts function in the ETRAX FS chip is enabled in this mode, which
++ * automatically toggle RTS when transmitting. The initial direction of the
++ * port is receiving.
++ *
++ * In the 485FD mode two transceivers will be used, one in each direction.
++ * Usually the hardware can handle both 485HD and 485FD, which implies that
++ * one of the transceivers can change direction. Consequently that transceiver
++ * must be tied to operate in the opposite direction of the other one, setting
++ * and keeping RTS to a fixed value do this.
++ *
++ * There are two special "ioctl" that can configure the ports. These two are
++ * left for backward compatible with older applications. The effects of using
++ * them are described below:
++ * The TIOCSERSETRS485:
++ * This ioctl sets a serial port in 232 mode to 485HD mode or vise versa. The
++ * state of the port is kept when closing the port. Note that this ioctl has no
++ * effect on a serial port in the 485FD mode.
++ * The TIOCSERWRRS485:
++ * This ioctl set a serial port in 232 mode to 485HD mode and writes the data
++ * "included" in the ioctl to the port. The port will then stay in 485HD mode.
++ * Using this ioctl on a serial port in the 485HD mode will transmit the data
++ * without changing the mode. Using this ioctl on a serial port in 485FD mode
++ * will not change the mode and simply send the data using the 485FD mode.
++ */
++
++#define TYPE_232 0
++#define TYPE_485HD 1
++#define TYPE_485FD 2
++
++struct etrax_recv_buffer {
++ struct etrax_recv_buffer *next;
++ unsigned short length;
++ unsigned char error;
++ unsigned char pad;
++
++ unsigned char buffer[0];
++};
++
++struct uart_cris_port {
++ struct uart_port port;
++
++ int initialized;
++ int used;
++ int irq;
++
++ /* Used to check if port enabled as well by testing for zero. */
++ reg_scope_instances regi_ser;
++ reg_scope_instances regi_dmain;
++ reg_scope_instances regi_dmaout;
++
++ struct crisv32_iopin dtr_pin;
++ struct crisv32_iopin dsr_pin;
++ struct crisv32_iopin ri_pin;
++ struct crisv32_iopin cd_pin;
++
++ struct dma_descr_context tr_context_descr
++ __attribute__ ((__aligned__(32)));
++ struct dma_descr_data tr_descr[SERIAL_TX_DESCRIPTORS]
++ __attribute__ ((__aligned__(32)));
++ struct dma_descr_context rec_context_descr
++ __attribute__ ((__aligned__(32)));
++ struct dma_descr_data rec_descr[SERIAL_RECV_DESCRIPTORS]
++ __attribute__ ((__aligned__(32)));
++
++ /* This is the first one in the list the HW is working on now. */
++ struct dma_descr_data* first_tx_descr;
++
++ /* This is the last one in the list the HW is working on now. */
++ struct dma_descr_data* last_tx_descr;
++
++ /* This is how many characters the HW is working on now. */
++ unsigned int tx_pending_chars;
++
++ int tx_started;
++ unsigned int cur_rec_descr;
++ struct etrax_recv_buffer *first_recv_buffer;
++ struct etrax_recv_buffer *last_recv_buffer;
++
++ unsigned int recv_cnt;
++ unsigned int max_recv_cnt;
++
++ /* The time for 1 char, in usecs. */
++ unsigned long char_time_usec;
++
++ /* Last tx usec in the jiffies. */
++ unsigned long last_tx_active_usec;
++
++ /* Last tx time in jiffies. */
++ unsigned long last_tx_active;
++
++ /* Last rx usec in the jiffies. */
++ unsigned long last_rx_active_usec;
++
++ /* Last rx time in jiffies. */
++ unsigned long last_rx_active;
++
++#ifdef CONFIG_ETRAX_RS485
++ /* RS-485 support, duh. */
++ struct rs485_control rs485;
++#endif
++ int port_type;
++};
++
++extern struct uart_driver serial_cris_driver;
++static struct uart_port *console_port;
++static int console_baud = 115200;
++static struct uart_cris_port serial_cris_ports[UART_NR] = {
++{
++#ifdef CONFIG_ETRAX_SERIAL_PORT0
++ .used = 1,
++ .irq = SER0_INTR_VECT,
++ .regi_ser = regi_ser0,
++ /*
++ * We initialize the dma stuff like this to get a compiler error
++ * if a CONFIG is missing
++ */
++ .regi_dmain =
++# ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
++ regi_dma7,
++# endif
++# ifdef CONFIG_ETRAX_SERIAL_PORT0_NO_DMA_IN
++ regi_NULL,
++# endif
++
++ .regi_dmaout =
++# ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
++ regi_dma6,
++# endif
++# ifdef CONFIG_ETRAX_SERIAL_PORT0_NO_DMA_OUT
++ regi_NULL,
++# endif
++
++# ifdef CONFIG_ETRAX_RS485
++# ifdef CONFIG_ETRAX_SERIAL_PORT0_TYPE_485HD
++ .port_type = TYPE_485HD,
++# endif
++# ifdef CONFIG_ETRAX_SERIAL_PORT0_TYPE_485FD
++ .port_type = TYPE_485FD,
++# endif
++# endif
++#else
++ .regi_ser = regi_NULL,
++ .regi_dmain = regi_NULL,
++ .regi_dmaout = regi_NULL,
++#endif
++}, /* ttyS0 */
++{
++#ifdef CONFIG_ETRAX_SERIAL_PORT1
++ .used = 1,
++ .irq = SER1_INTR_VECT,
++ .regi_ser = regi_ser1,
++ .regi_dmain =
++# ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA5_IN
++ regi_dma5,
++# endif
++# ifdef CONFIG_ETRAX_SERIAL_PORT1_NO_DMA_IN
++ regi_NULL,
++# endif
++
++ .regi_dmaout =
++# ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA4_OUT
++ regi_dma4,
++# endif
++# ifdef CONFIG_ETRAX_SERIAL_PORT1_NO_DMA_OUT
++ regi_NULL,
++# endif
++
++# ifdef CONFIG_ETRAX_RS485
++# ifdef CONFIG_ETRAX_SERIAL_PORT1_TYPE_485HD
++ .port_type = TYPE_485HD,
++# endif
++# ifdef CONFIG_ETRAX_SERIAL_PORT1_TYPE_485FD
++ .port_type = TYPE_485FD,
++# endif
++# endif
++#else
++ .regi_ser = regi_NULL,
++ .regi_dmain = regi_NULL,
++ .regi_dmaout = regi_NULL,
++#endif
++}, /* ttyS1 */
++{
++#ifdef CONFIG_ETRAX_SERIAL_PORT2
++ .used = 1,
++ .irq = SER2_INTR_VECT,
++ .regi_ser = regi_ser2,
++ .regi_dmain =
++# ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
++ regi_dma3,
++# endif
++# ifdef CONFIG_ETRAX_SERIAL_PORT2_NO_DMA_IN
++ regi_NULL,
++# endif
++
++ .regi_dmaout =
++# ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
++ regi_dma2,
++# endif
++# ifdef CONFIG_ETRAX_SERIAL_PORT2_NO_DMA_OUT
++ regi_NULL,
++# endif
++
++# ifdef CONFIG_ETRAX_RS485
++# ifdef CONFIG_ETRAX_SERIAL_PORT2_TYPE_485HD
++ .port_type = TYPE_485HD,
++# endif
++# ifdef CONFIG_ETRAX_SERIAL_PORT2_TYPE_485FD
++ .port_type = TYPE_485FD,
++# endif
++# endif
++#else
++ .regi_ser = regi_NULL,
++ .regi_dmain = regi_NULL,
++ .regi_dmaout = regi_NULL,
++#endif
++}, /* ttyS2 */
++{
++#ifdef CONFIG_ETRAX_SERIAL_PORT3
++ .used = 1,
++ .irq = SER3_INTR_VECT,
++ .regi_ser = regi_ser3,
++ .regi_dmain =
++# ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA9_IN
++ regi_dma9,
++# endif
++# ifdef CONFIG_ETRAX_SERIAL_PORT3_NO_DMA_IN
++ regi_NULL,
++# endif
++
++ .regi_dmaout =
++# ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA8_OUT
++ regi_dma8,
++# endif
++# ifdef CONFIG_ETRAX_SERIAL_PORT3_NO_DMA_OUT
++ regi_NULL,
++# endif
++
++# ifdef CONFIG_ETRAX_RS485
++# ifdef CONFIG_ETRAX_SERIAL_PORT3_TYPE_485HD
++ .port_type = TYPE_485HD,
++# endif
++# ifdef CONFIG_ETRAX_SERIAL_PORT3_TYPE_485FD
++ .port_type = TYPE_485FD,
++# endif
++# endif
++#else
++ .regi_ser = regi_NULL,
++ .regi_dmain = regi_NULL,
++ .regi_dmaout = regi_NULL,
++#endif
++}, /* ttyS3 */
++{
++#ifdef CONFIG_ETRAX_DEBUG_PORT_NULL
++ .used = 1,
++#endif
++ .regi_ser = regi_NULL
++} /* Dummy console port */
++
++};
++
++/* Dummy pin used for unused CD, DSR, DTR and RI signals. */
++static unsigned long io_dummy;
++static struct crisv32_ioport dummy_port =
++{
++ &io_dummy,
++ &io_dummy,
++ &io_dummy,
++ 18
++};
++static struct crisv32_iopin dummy_pin =
++{
++ &dummy_port,
++ 0
++};
++
++static int selected_console =
++#if defined(CONFIG_ETRAX_DEBUG_PORT0)
++0;
++#elif defined(CONFIG_ETRAX_DEBUG_PORT1)
++1;
++#elif defined(CONFIG_ETRAX_DEBUG_PORT2)
++2;
++#elif defined(CONFIG_ETRAX_DEBUG_PORT3)
++3;
++#else /* CONFIG_ETRAX_DEBUG_PORT_NULL */
++4;
++#endif
++
++extern void reset_watchdog(void);
++
++/*
++ * Interrupts are disabled on entering
++ */
++static void
++cris_console_write(struct console *co, const char *s, unsigned int count)
++{
++ struct uart_cris_port *up;
++ int i;
++ reg_ser_r_stat_din stat;
++ reg_ser_rw_tr_dma_en tr_dma_en, old;
++
++ up = &serial_cris_ports[selected_console];
++
++ /*
++ * This function isn't covered by the struct uart_ops, so we
++ * have to check manually that the port really is there,
++ * configured and live.
++ */
++ if (!up->regi_ser)
++ return;
++
++ /* Switch to manual mode. */
++ tr_dma_en = old = REG_RD (ser, up->regi_ser, rw_tr_dma_en);
++ if (tr_dma_en.en == regk_ser_yes) {
++ tr_dma_en.en = regk_ser_no;
++ REG_WR(ser, up->regi_ser, rw_tr_dma_en, tr_dma_en);
++ }
++
++ /* Send data. */
++ for (i = 0; i < count; i++) {
++ /* LF -> CRLF */
++ if (s[i] == '\n') {
++ do {
++ stat = REG_RD (ser, up->regi_ser, r_stat_din);
++ } while (!stat.tr_rdy);
++ REG_WR_INT (ser, up->regi_ser, rw_dout, '\r');
++ }
++ /* Wait until transmitter is ready and send. */
++ do {
++ stat = REG_RD (ser, up->regi_ser, r_stat_din);
++ } while (!stat.tr_rdy);
++ REG_WR_INT (ser, up->regi_ser, rw_dout, s[i]);
++
++ /* Feed watchdog, because this may take looong time. */
++ reset_watchdog();
++ }
++
++ /* Restore mode. */
++ if (tr_dma_en.en != old.en)
++ REG_WR(ser, up->regi_ser, rw_tr_dma_en, old);
++}
++
++static void cris_serial_port_init(struct uart_port *port, int line);
++static int __init
++cris_console_setup(struct console *co, char *options)
++{
++ struct uart_port *port;
++ int baud = 115200;
++ int bits = 8;
++ int parity = 'n';
++ int flow = 'n';
++
++ if (co->index >= UART_NR)
++ co->index = 0;
++ if (options)
++ selected_console = co->index;
++ port = &serial_cris_ports[selected_console].port;
++ console_port = port;
++
++ if (options)
++ uart_parse_options(options, &baud, &parity, &bits, &flow);
++ console_baud = baud;
++ cris_serial_port_init(port, selected_console);
++ co->index = port->line;
++ uart_set_options(port, co, baud, parity, bits, flow);
++
++ return 0;
++}
++
++static struct tty_driver*
++cris_console_device(struct console* co, int *index)
++{
++ struct uart_driver *p = co->data;
++ *index = selected_console;
++ return p->tty_driver;
++}
++
++static struct console cris_console = {
++ .name = "ttyS",
++ .write = cris_console_write,
++ .device = cris_console_device,
++ .setup = cris_console_setup,
++ .flags = CON_PRINTBUFFER,
++ .index = -1,
++ .data = &serial_cris_driver,
++};
++
++#define SERIAL_CRIS_CONSOLE &cris_console
++
++struct uart_driver serial_cris_driver = {
++ .owner = THIS_MODULE,
++ .driver_name = "serial",
++ .dev_name = "ttyS",
++ .major = TTY_MAJOR,
++ .minor = 64,
++ .nr = UART_NR,
++ .cons = SERIAL_CRIS_CONSOLE,
++};
++
++static int inline crisv32_serial_get_rts(struct uart_cris_port *up)
++{
++ reg_scope_instances regi_ser = up->regi_ser;
++ /*
++ * Return what the user has controlled rts to or
++ * what the pin is? (if auto_rts is used it differs during tx)
++ */
++ reg_ser_r_stat_din rstat = REG_RD(ser, regi_ser, r_stat_din);
++ return !(rstat.rts_n == regk_ser_active);
++}
++
++/*
++ * A set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
++ * 0=0V , 1=3.3V
++ */
++static inline void crisv32_serial_set_rts(struct uart_cris_port *up, int set)
++{
++ reg_scope_instances regi_ser = up->regi_ser;
++
++#ifdef CONFIG_ETRAX_RS485
++ /* Never toggle RTS if port is in 485 mode. If port is in 485FD mode we
++ * do not want to send with the reciever and for 485HD mode auto_rts
++ * take care of the RTS for us.
++ */
++ if (!up->rs485.enabled) {
++#else
++ {
++#endif
++ unsigned long flags;
++ reg_ser_rw_rec_ctrl rec_ctrl;
++
++ local_irq_save(flags);
++ rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
++ if (set)
++ rec_ctrl.rts_n = regk_ser_active;
++ else
++ rec_ctrl.rts_n = regk_ser_inactive;
++ REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
++ local_irq_restore(flags);
++ }
++}
++
++/* Input */
++static int inline crisv32_serial_get_cts(struct uart_cris_port *up)
++{
++ reg_scope_instances regi_ser = up->regi_ser;
++ reg_ser_r_stat_din rstat = REG_RD(ser, regi_ser, r_stat_din);
++ return (rstat.cts_n == regk_ser_active);
++}
++
++/*
++ * Send a single character for XON/XOFF purposes. We do it in this separate
++ * function instead of the alternative support port.x_char, in the ...start_tx
++ * function, so we don't mix up this case with possibly enabling transmission
++ * of queued-up data (in case that's disabled after *receiving* an XOFF or
++ * negative CTS). This function is used for both DMA and non-DMA case; see HW
++ * docs specifically blessing sending characters manually when DMA for
++ * transmission is enabled and running. We may be asked to transmit despite
++ * the transmitter being disabled by a ..._stop_tx call so we need to enable
++ * it temporarily but restore the state afterwards.
++ *
++ * Beware: I'm not sure how the RS-485 stuff is supposed to work. Using
++ * XON/XOFF seems problematic if there are several controllers, but if it's
++ * actually RS-422 (multi-drop; one sender and multiple receivers), it might
++ * Just Work, so don't bail out just because it looks a little suspicious.
++ */
++
++void serial_cris_send_xchar(struct uart_port *port, char ch)
++{
++ struct uart_cris_port *up = (struct uart_cris_port *)port;
++ reg_ser_rw_dout dout = { .data = ch };
++ reg_ser_rw_ack_intr ack_intr = { .tr_rdy = regk_ser_yes };
++ reg_ser_r_stat_din rstat;
++ reg_ser_rw_tr_ctrl prev_tr_ctrl, tr_ctrl;
++ reg_scope_instances regi_ser = up->regi_ser;
++ unsigned long flags;
++
++ /*
++ * Wait for tr_rdy in case a character is already being output. Make
++ * sure we have integrity between the register reads and the writes
++ * below, but don't busy-wait with interrupts off and the port lock
++ * taken.
++ */
++ spin_lock_irqsave(&port->lock, flags);
++ do {
++ spin_unlock_irqrestore(&port->lock, flags);
++ spin_lock_irqsave(&port->lock, flags);
++ prev_tr_ctrl = tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
++ rstat = REG_RD(ser, regi_ser, r_stat_din);
++ } while (!rstat.tr_rdy);
++
++ /*
++ * Ack an interrupt if one was just issued for the previous character
++ * that was output. This is required for non-DMA as the interrupt is
++ * used as the only indicator that the transmitter is ready and it
++ * isn't while this x_char is being transmitted.
++ */
++ REG_WR(ser, regi_ser, rw_ack_intr, ack_intr);
++
++ /* Enable the transmitter in case it was disabled. */
++ tr_ctrl.stop = 0;
++ REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
++
++ /*
++ * Finally, send the blessed character; nothing should stop it now,
++ * except for an xoff-detected state, which we'll handle below.
++ */
++ REG_WR(ser, regi_ser, rw_dout, dout);
++ up->port.icount.tx++;
++
++ /* There might be an xoff state to clear. */
++ rstat = REG_RD(ser, up->regi_ser, r_stat_din);
++
++ /*
++ * Clear any xoff state that *may* have been there to
++ * inhibit transmission of the character.
++ */
++ if (rstat.xoff_detect) {
++ reg_ser_rw_xoff_clr xoff_clr = { .clr = 1 };
++ REG_WR(ser, regi_ser, rw_xoff_clr, xoff_clr);
++ reg_ser_rw_tr_dma_en tr_dma_en
++ = REG_RD(ser, regi_ser, rw_tr_dma_en);
++
++ /*
++ * If we had an xoff state but cleared it, instead sneak in a
++ * disabled state for the transmitter, after the character we
++ * sent. Thus we keep the port disabled, just as if the xoff
++ * state was still in effect (or actually, as if stop_tx had
++ * been called, as we stop DMA too).
++ */
++ prev_tr_ctrl.stop = 1;
++
++ tr_dma_en.en = 0;
++ REG_WR(ser, regi_ser, rw_tr_dma_en, tr_dma_en);
++ }
++
++ /* Restore "previous" enabled/disabled state of the transmitter. */
++ REG_WR(ser, regi_ser, rw_tr_ctrl, prev_tr_ctrl);
++
++ spin_unlock_irqrestore(&port->lock, flags);
++}
++
++static void transmit_chars_dma(struct uart_cris_port *up);
++
++/*
++ * Do not spin_lock_irqsave or disable interrupts by other means here; it's
++ * already done by the caller.
++ */
++
++static void serial_cris_start_tx(struct uart_port *port)
++{
++ struct uart_cris_port *up = (struct uart_cris_port *)port;
++ reg_scope_instances regi_ser = up->regi_ser;
++ reg_ser_rw_tr_ctrl tr_ctrl;
++
++ tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
++ tr_ctrl.stop = regk_ser_no;
++ REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
++ if (!up->regi_dmaout) {
++ reg_ser_rw_intr_mask intr_mask =
++ REG_RD(ser, regi_ser, rw_intr_mask);
++ intr_mask.tr_rdy = regk_ser_yes;
++ REG_WR(ser, regi_ser, rw_intr_mask, intr_mask);
++ } else {
++ /*
++ * We're called possibly to re-enable transmission after it
++ * has been disabled. If so, DMA needs to be re-enabled.
++ */
++ reg_ser_rw_tr_dma_en tr_dma_en = { .en = 1 };
++ REG_WR(ser, regi_ser, rw_tr_dma_en, tr_dma_en);
++ transmit_chars_dma(up);
++ }
++}
++
++/*
++ * This function handles both the DMA and non-DMA case by ordering the
++ * transmitter to stop of after the current character. We don't need to wait
++ * for any such character to be completely transmitted; we do that where it
++ * matters, like in serial_cris_set_termios. Don't busy-wait here; see
++ * Documentation/serial/driver: this function is called within
++ * spin_lock_irq{,save} and thus separate ones would be disastrous (when SMP).
++ * There's no documented need to set the txd pin to any particular value;
++ * break setting is controlled solely by serial_cris_break_ctl.
++ */
++
++static void serial_cris_stop_tx(struct uart_port *port)
++{
++ struct uart_cris_port *up = (struct uart_cris_port *)port;
++ reg_scope_instances regi_ser = up->regi_ser;
++ reg_ser_rw_tr_ctrl tr_ctrl;
++ reg_ser_rw_intr_mask intr_mask;
++ reg_ser_rw_tr_dma_en tr_dma_en = {0};
++ reg_ser_rw_xoff_clr xoff_clr = {0};
++
++ /*
++ * For the non-DMA case, we'd get a tr_rdy interrupt that we're not
++ * interested in as we're not transmitting any characters. For the
++ * DMA case, that interrupt is already turned off, but no reason to
++ * waste code on conditionals here.
++ */
++ intr_mask = REG_RD(ser, regi_ser, rw_intr_mask);
++ intr_mask.tr_rdy = regk_ser_no;
++ REG_WR(ser, regi_ser, rw_intr_mask, intr_mask);
++
++ tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
++ tr_ctrl.stop = 1;
++ REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
++
++ /*
++ * Always clear possible hardware xoff-detected state here, no need to
++ * unnecessary consider mctrl settings and when they change. We clear
++ * it here rather than in start_tx: both functions are called as the
++ * effect of XOFF processing, but start_tx is also called when upper
++ * levels tell the driver that there are more characters to send, so
++ * avoid adding code there.
++ */
++ xoff_clr.clr = 1;
++ REG_WR(ser, regi_ser, rw_xoff_clr, xoff_clr);
++
++ /*
++ * Disable transmitter DMA, so that if we're in XON/XOFF, we can send
++ * those single characters without also giving go-ahead for queued up
++ * DMA data.
++ */
++ tr_dma_en.en = 0;
++ REG_WR(ser, regi_ser, rw_tr_dma_en, tr_dma_en);
++}
++
++static void serial_cris_stop_rx(struct uart_port *port)
++{
++ struct uart_cris_port *up = (struct uart_cris_port *)port;
++ reg_scope_instances regi_ser = up->regi_ser;
++ reg_ser_rw_rec_ctrl rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
++
++ rec_ctrl.en = regk_ser_no;
++ REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
++}
++
++static void serial_cris_enable_ms(struct uart_port *port)
++{
++}
++
++static void check_modem_status(struct uart_cris_port *up)
++{
++}
++
++static unsigned int serial_cris_tx_empty(struct uart_port *port)
++{
++ struct uart_cris_port *up = (struct uart_cris_port *)port;
++ unsigned long flags;
++ unsigned int ret;
++ reg_ser_r_stat_din rstat = {0};
++
++ spin_lock_irqsave(&up->port.lock, flags);
++ if (up->regi_dmaout) {
++ /*
++ * For DMA, before looking at r_stat, we need to check that we
++ * either haven't actually started or that end-of-list is
++ * reached, else a tr_empty indication is just an internal
++ * state. The caller qualifies, if needed, that the
++ * port->info.xmit buffer is empty, so we don't need to
++ * check that.
++ */
++ reg_dma_rw_stat status = REG_RD(dma, up->regi_dmaout, rw_stat);
++
++ if (!up->tx_started) {
++ ret = 1;
++ goto done;
++ }
++
++ if (status.list_state != regk_dma_data_at_eol) {
++ ret = 0;
++ goto done;
++ }
++ }
++
++ rstat = REG_RD(ser, up->regi_ser, r_stat_din);
++ ret = rstat.tr_empty ? TIOCSER_TEMT : 0;
++
++ done:
++ spin_unlock_irqrestore(&up->port.lock, flags);
++ return ret;
++}
++static unsigned int serial_cris_get_mctrl(struct uart_port *port)
++{
++ struct uart_cris_port *up = (struct uart_cris_port *)port;
++ unsigned int ret;
++
++ ret = 0;
++ if (crisv32_serial_get_rts(up))
++ ret |= TIOCM_RTS;
++ if (crisv32_io_rd(&up->dtr_pin))
++ ret |= TIOCM_DTR;
++ if (crisv32_io_rd(&up->cd_pin))
++ ret |= TIOCM_CD;
++ if (crisv32_io_rd(&up->ri_pin))
++ ret |= TIOCM_RI;
++ if (!crisv32_io_rd(&up->dsr_pin))
++ ret |= TIOCM_DSR;
++ if (crisv32_serial_get_cts(up))
++ ret |= TIOCM_CTS;
++ return ret;
++}
++
++static void serial_cris_set_mctrl(struct uart_port *port, unsigned int mctrl)
++{
++ struct uart_cris_port *up = (struct uart_cris_port *)port;
++
++ crisv32_serial_set_rts(up, mctrl & TIOCM_RTS ? 1 : 0);
++ crisv32_io_set(&up->dtr_pin, mctrl & TIOCM_DTR ? 1 : 0);
++ crisv32_io_set(&up->ri_pin, mctrl & TIOCM_RNG ? 1 : 0);
++ crisv32_io_set(&up->cd_pin, mctrl & TIOCM_CD ? 1 : 0);
++}
++
++static void serial_cris_break_ctl(struct uart_port *port, int break_state)
++{
++ struct uart_cris_port *up = (struct uart_cris_port *)port;
++ unsigned long flags;
++ reg_ser_rw_tr_ctrl tr_ctrl;
++ reg_ser_rw_tr_dma_en tr_dma_en;
++ reg_ser_rw_intr_mask intr_mask;
++
++ spin_lock_irqsave(&up->port.lock, flags);
++ tr_ctrl = REG_RD(ser, up->regi_ser, rw_tr_ctrl);
++ tr_dma_en = REG_RD(ser, up->regi_ser, rw_tr_dma_en);
++ intr_mask = REG_RD(ser, up->regi_ser, rw_intr_mask);
++
++ if (break_state != 0) { /* Send break */
++ /*
++ * We need to disable DMA (if used) or tr_rdy interrupts if no
++ * DMA. No need to make this conditional on use of DMA;
++ * disabling will be a no-op for the other mode.
++ */
++ intr_mask.tr_rdy = regk_ser_no;
++ tr_dma_en.en = 0;
++
++ /*
++ * Stop transmission and set the txd pin to 0 after the
++ * current character. The txd setting will take effect after
++ * any current transmission has completed.
++ */
++ tr_ctrl.stop = 1;
++ tr_ctrl.txd = 0;
++ } else {
++ /* Re-enable either transmit DMA or the serial interrupt. */
++ if (up->regi_dmaout)
++ tr_dma_en.en = 1;
++ else
++ intr_mask.tr_rdy = regk_ser_yes;
++
++
++ tr_ctrl.stop = 0;
++ tr_ctrl.txd = 1;
++ }
++ REG_WR(ser, up->regi_ser, rw_tr_ctrl, tr_ctrl);
++ REG_WR(ser, up->regi_ser, rw_tr_dma_en, tr_dma_en);
++ REG_WR(ser, up->regi_ser, rw_intr_mask, intr_mask);
++
++ spin_unlock_irqrestore(&up->port.lock, flags);
++}
++
++/*
++ * The output DMA channel is free - use it to send as many chars as
++ * possible.
++ */
++
++static void
++transmit_chars_dma(struct uart_cris_port *up)
++{
++ struct dma_descr_data *descr, *pending_descr, *dmapos;
++ struct dma_descr_data *last_tx_descr;
++ struct circ_buf *xmit = &up->port.info->xmit;
++ unsigned int sentl = 0;
++ reg_dma_rw_ack_intr ack_intr = { .data = regk_dma_yes };
++ reg_dma_rw_stat status;
++ reg_scope_instances regi_dmaout = up->regi_dmaout;
++ unsigned int chars_in_q;
++ unsigned int chars_to_send;
++
++ /* Acknowledge dma data descriptor irq, if there was one. */
++ REG_WR(dma, regi_dmaout, rw_ack_intr, ack_intr);
++
++ /*
++ * First get the amount of bytes sent during the last DMA transfer,
++ * and update xmit accordingly.
++ */
++ status = REG_RD(dma, regi_dmaout, rw_stat);
++ if (status.list_state == regk_dma_data_at_eol || !up->tx_started)
++ dmapos = phys_to_virt((int)up->last_tx_descr->next);
++ else
++ dmapos = phys_to_virt(REG_RD_INT(dma, regi_dmaout, rw_data));
++
++ pending_descr = up->first_tx_descr;
++ while (pending_descr != dmapos) {
++ sentl += pending_descr->after - pending_descr->buf;
++ pending_descr->after = pending_descr->buf = NULL;
++ pending_descr = phys_to_virt((int)pending_descr->next);
++ }
++
++ up->first_tx_descr = pending_descr;
++ last_tx_descr = up->last_tx_descr;
++
++ /* Update stats. */
++ up->port.icount.tx += sentl;
++
++ up->tx_pending_chars -= sentl;
++
++ /* Update xmit buffer. */
++ xmit->tail = (xmit->tail + sentl) & (UART_XMIT_SIZE - 1);
++
++ /*
++ * Find out the largest amount of consecutive bytes we want to send
++ * now.
++ */
++ chars_in_q = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
++
++ if (chars_in_q == 0)
++ /* Tell upper layers that we're now idle. */
++ goto done;
++
++ /* Some of those characters are actually pending output. */
++ chars_to_send = chars_in_q - up->tx_pending_chars;
++
++ /*
++ * Clamp the new number of pending chars to the advertised
++ * one.
++ */
++ if (chars_to_send + up->tx_pending_chars > up->port.fifosize)
++ chars_to_send = up->port.fifosize - up->tx_pending_chars;
++
++ /* If we don't want to send any, we're done. */
++ if (chars_to_send == 0)
++ goto done;
++
++ descr = phys_to_virt((int)last_tx_descr->next);
++
++ /*
++ * We can't send anything if we could make the condition in
++ * the while-loop above (reaping finished descriptors) be met
++ * immediately before the first iteration. However, don't
++ * mistake the full state for the empty state.
++ */
++ if ((descr == up->first_tx_descr && up->tx_pending_chars != 0)
++ || descr->next == up->first_tx_descr)
++ goto done;
++
++ /* Set up the descriptor for output. */
++ descr->buf = (void*)virt_to_phys(xmit->buf + xmit->tail
++ + up->tx_pending_chars);
++ descr->after = descr->buf + chars_to_send;
++ descr->eol = 1;
++ descr->out_eop = 0;
++ descr->intr = 1;
++ descr->wait = 0;
++ descr->in_eop = 0;
++ descr->md = 0;
++ /*
++ * Make sure GCC doesn't move this eol clear before the eol set
++ * above.
++ */
++ barrier();
++ last_tx_descr->eol = 0;
++
++ up->last_tx_descr = descr;
++ up->tx_pending_chars += chars_to_send;
++
++ if (!up->tx_started) {
++ up->tx_started = 1;
++ up->tr_context_descr.next = 0;
++ up->tr_context_descr.saved_data
++ = (dma_descr_data*)virt_to_phys(descr);
++ up->tr_context_descr.saved_data_buf = descr->buf;
++ DMA_START_CONTEXT(regi_dmaout,
++ virt_to_phys(&up->tr_context_descr));
++ } else
++ DMA_CONTINUE_DATA(regi_dmaout);
++
++ /* DMA is now running (hopefully). */
++
++ done:
++ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
++ uart_write_wakeup(&up->port);
++}
++
++static void
++transmit_chars_no_dma(struct uart_cris_port *up)
++{
++ int count;
++ struct circ_buf *xmit = &up->port.info->xmit;
++
++ reg_scope_instances regi_ser = up->regi_ser;
++ reg_ser_r_stat_din rstat;
++ reg_ser_rw_ack_intr ack_intr = { .tr_rdy = regk_ser_yes };
++
++ if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
++ /* No more to send, so disable the interrupt. */
++ reg_ser_rw_intr_mask intr_mask;
++ intr_mask = REG_RD(ser, regi_ser, rw_intr_mask);
++ intr_mask.tr_rdy = 0;
++ intr_mask.tr_empty = 0;
++ REG_WR(ser, regi_ser, rw_intr_mask, intr_mask);
++ return;
++ }
++
++ count = ETRAX_SER_FIFO_SIZE;
++ do {
++ reg_ser_rw_dout dout = { .data = xmit->buf[xmit->tail] };
++ REG_WR(ser, regi_ser, rw_dout, dout);
++ REG_WR(ser, regi_ser, rw_ack_intr, ack_intr);
++ xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
++ up->port.icount.tx++;
++ if (xmit->head == xmit->tail)
++ break;
++ rstat = REG_RD(ser, regi_ser, r_stat_din);
++ } while ((--count > 0) && rstat.tr_rdy);
++
++ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
++ uart_write_wakeup(&up->port);
++} /* transmit_chars_no_dma */
++
++static struct etrax_recv_buffer *
++alloc_recv_buffer(unsigned int size)
++{
++ struct etrax_recv_buffer *buffer;
++
++ if (!(buffer = kmalloc(sizeof *buffer + size, GFP_ATOMIC)))
++ panic("%s: Could not allocate %d bytes buffer\n",
++ __FUNCTION__, size);
++
++ buffer->next = NULL;
++ buffer->length = 0;
++ buffer->error = TTY_NORMAL;
++
++ return buffer;
++}
++
++static void
++append_recv_buffer(struct uart_cris_port *up,
++ struct etrax_recv_buffer *buffer)
++{
++ unsigned long flags;
++
++ local_irq_save(flags);
++
++ if (!up->first_recv_buffer)
++ up->first_recv_buffer = buffer;
++ else
++ up->last_recv_buffer->next = buffer;
++
++ up->last_recv_buffer = buffer;
++
++ up->recv_cnt += buffer->length;
++ if (up->recv_cnt > up->max_recv_cnt)
++ up->max_recv_cnt = up->recv_cnt;
++
++ local_irq_restore(flags);
++}
++
++static int
++add_char_and_flag(struct uart_cris_port *up, unsigned char data,
++ unsigned char flag)
++{
++ struct etrax_recv_buffer *buffer;
++
++ buffer = alloc_recv_buffer(4);
++ buffer->length = 1;
++ buffer->error = flag;
++ buffer->buffer[0] = data;
++
++ append_recv_buffer(up, buffer);
++
++ up->port.icount.rx++;
++
++ return 1;
++}
++
++static void
++flush_to_flip_buffer(struct uart_cris_port *up)
++{
++ struct tty_struct *tty;
++ struct etrax_recv_buffer *buffer;
++
++ tty = up->port.info->tty;
++ if (!up->first_recv_buffer || !tty)
++ return;
++
++ while ((buffer = up->first_recv_buffer)) {
++ unsigned int count = (unsigned int)
++ tty_insert_flip_string(tty, buffer->buffer,
++ buffer->length);
++
++ up->recv_cnt -= count;
++
++ if (count == buffer->length) {
++ up->first_recv_buffer = buffer->next;
++ kfree(buffer);
++ } else {
++ buffer->length -= count;
++ memmove(buffer->buffer, buffer->buffer + count,
++ buffer->length);
++ buffer->error = TTY_NORMAL;
++ }
++ }
++
++ if (!up->first_recv_buffer)
++ up->last_recv_buffer = NULL;
++
++ /* This call includes a check for low-latency. */
++ tty_flip_buffer_push(tty);
++}
++
++static unsigned int
++handle_descr_data(struct uart_cris_port *up, struct dma_descr_data *descr,
++ unsigned int recvl)
++{
++ struct etrax_recv_buffer *buffer
++ = phys_to_virt((unsigned long)descr->buf) - sizeof *buffer;
++
++ if (up->recv_cnt + recvl > 65536) {
++ printk(KERN_ERR "Too much pending incoming data on %s!"
++ " Dropping %u bytes.\n", up->port.info->tty->name,
++ recvl);
++ return 0;
++ }
++
++ buffer->length = recvl;
++
++ append_recv_buffer(up, buffer);
++
++ flush_to_flip_buffer(up);
++
++ buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE);
++ descr->buf = (void*)virt_to_phys(buffer->buffer);
++ descr->after = descr->buf + SERIAL_DESCR_BUF_SIZE;
++
++ return recvl;
++}
++
++static unsigned int
++handle_all_descr_data(struct uart_cris_port *up)
++{
++ struct dma_descr_data *descr
++ = &up->rec_descr[(up->cur_rec_descr - 1)
++ % SERIAL_RECV_DESCRIPTORS];
++ struct dma_descr_data *prev_descr;
++ unsigned int recvl;
++ unsigned int ret = 0;
++ reg_scope_instances regi_dmain = up->regi_dmain;
++
++ while (1) {
++ prev_descr = descr;
++ descr = &up->rec_descr[up->cur_rec_descr];
++
++ if (descr == phys_to_virt(REG_RD(dma, regi_dmain, rw_data)))
++ break;
++
++ if (++up->cur_rec_descr == SERIAL_RECV_DESCRIPTORS)
++ up->cur_rec_descr = 0;
++
++ /* Find out how many bytes were read. */
++ recvl = descr->after - descr->buf;
++
++ /* Update stats. */
++ up->port.icount.rx += recvl;
++
++ ret += handle_descr_data(up, descr, recvl);
++ descr->eol = 1;
++ /*
++ * Make sure GCC doesn't move this eol clear before the
++ * eol set above.
++ */
++ barrier();
++ prev_descr->eol = 0;
++ flush_dma_descr(descr,1); // Cache bug workaround
++ flush_dma_descr(prev_descr,0); // Cache bug workaround
++ }
++
++ return ret;
++}
++
++static void
++receive_chars_dma(struct uart_cris_port *up)
++{
++ reg_ser_r_stat_din rstat;
++ reg_dma_rw_ack_intr ack_intr = {0};
++
++ /* Acknowledge both dma_descr and dma_eop irq. */
++ ack_intr.data = 1;
++ ack_intr.in_eop = 1;
++ REG_WR(dma, up->regi_dmain, rw_ack_intr, ack_intr);
++
++ handle_all_descr_data(up);
++
++ /* Read the status register to detect errors. */
++ rstat = REG_RD(ser, up->regi_ser, r_stat_din);
++
++ if (rstat.framing_err | rstat.par_err | rstat.orun) {
++ /*
++ * If we got an error, we must reset it by reading the
++ * rs_stat_din register and put the data in buffer manually.
++ */
++ reg_ser_rs_stat_din stat_din;
++ stat_din = REG_RD(ser, up->regi_ser, rs_stat_din);
++
++ if (stat_din.par_err)
++ add_char_and_flag(up, stat_din.data, TTY_PARITY);
++ else if (stat_din.orun)
++ add_char_and_flag(up, stat_din.data, TTY_OVERRUN);
++ else if (stat_din.framing_err)
++ add_char_and_flag(up, stat_din.data, TTY_FRAME);
++ }
++
++ /* Restart the receiving DMA, in case it got stuck on an EOL. */
++ DMA_CONTINUE_DATA(up->regi_dmain);
++}
++
++void receive_chars_no_dma(struct uart_cris_port *up)
++{
++ reg_ser_rs_stat_din stat_din;
++ reg_ser_r_stat_din rstat;
++ struct tty_struct *tty;
++ struct uart_icount *icount;
++ int max_count = 16;
++ char flag;
++ reg_ser_rw_ack_intr ack_intr = { 0 };
++
++ rstat = REG_RD(ser, up->regi_ser, r_stat_din);
++ up->last_rx_active_usec = GET_JIFFIES_USEC();
++ up->last_rx_active = jiffies;
++ icount = &up->port.icount;
++ tty = up->port.info->tty;
++
++ do {
++ stat_din = REG_RD(ser, up->regi_ser, rs_stat_din);
++
++ flag = TTY_NORMAL;
++ ack_intr.dav = 1;
++ REG_WR(ser, up->regi_ser, rw_ack_intr, ack_intr);
++ icount->rx++;
++
++ if (stat_din.framing_err | stat_din.par_err | stat_din.orun) {
++ if (stat_din.data == 0x00 &&
++ stat_din.framing_err) {
++ /* Most likely a break. */
++ flag = TTY_BREAK;
++ icount->brk++;
++ } else if (stat_din.par_err) {
++ flag = TTY_PARITY;
++ icount->parity++;
++ } else if (stat_din.orun) {
++ flag = TTY_OVERRUN;
++ icount->overrun++;
++ } else if (stat_din.framing_err) {
++ flag = TTY_FRAME;
++ icount->frame++;
++ }
++ }
++
++ /*
++ * If this becomes important, we probably *could* handle this
++ * gracefully by keeping track of the unhandled character.
++ */
++ if (!tty_insert_flip_char(tty, stat_din.data, flag))
++ panic("%s: No tty buffer space", __FUNCTION__);
++ rstat = REG_RD(ser, up->regi_ser, r_stat_din);
++ } while (rstat.dav && (max_count-- > 0));
++ spin_unlock(&up->port.lock);
++ tty_flip_buffer_push(tty);
++ spin_lock(&up->port.lock);
++} /* receive_chars_no_dma */
++
++/*
++ * DMA output channel interrupt handler.
++ * this interrupt is called from DMA2(ser2), DMA8(ser3), DMA6(ser0) or
++ * DMA4(ser1) when they have finished a descriptor with the intr flag set.
++ */
++
++static irqreturn_t
++dma_tr_interrupt(int irq, void *dev_id, struct pt_regs * regs)
++{
++ struct uart_cris_port *up = (struct uart_cris_port *)dev_id;
++ reg_dma_r_masked_intr masked_intr;
++ reg_scope_instances regi_dmaout;
++ int handled = 0;
++
++ spin_lock(&up->port.lock);
++ regi_dmaout = up->regi_dmaout;
++ if (!regi_dmaout) {
++ spin_unlock(&up->port.lock);
++ return IRQ_NONE;
++ }
++
++ /*
++ * Check for dma_descr (don't need to check for dma_eop in
++ * output DMA for serial).
++ */
++ masked_intr = REG_RD(dma, regi_dmaout, r_masked_intr);
++
++ if (masked_intr.data) {
++ /* We can send a new dma bunch. make it so. */
++
++ /*
++ * Read jiffies_usec first.
++ * We want this time to be as late as possible.
++ */
++ up->last_tx_active_usec = GET_JIFFIES_USEC();
++ up->last_tx_active = jiffies;
++ transmit_chars_dma(up);
++ handled = 1;
++ }
++ check_modem_status(up);
++ spin_unlock(&up->port.lock);
++ return IRQ_RETVAL(handled);
++}
++
++/* DMA input channel interrupt handler. */
++
++static irqreturn_t
++dma_rec_interrupt(int irq, void *dev_id, struct pt_regs * regs)
++{
++ struct uart_cris_port *up = (struct uart_cris_port *)dev_id;
++ reg_dma_r_masked_intr masked_intr;
++ reg_scope_instances regi_dmain;
++ int handled = 0;
++
++ spin_lock(&up->port.lock);
++ regi_dmain = up->regi_dmain;
++ if (!regi_dmain) {
++ spin_unlock(&up->port.lock);
++ return IRQ_NONE;
++ }
++
++ /* Check for both dma_eop and dma_descr for the input dma channel. */
++ masked_intr = REG_RD(dma, regi_dmain, r_masked_intr);
++ if (masked_intr.data || masked_intr.in_eop) {
++ /* We have received something. */
++ receive_chars_dma(up);
++ handled = 1;
++ }
++ check_modem_status(up);
++ spin_unlock(&up->port.lock);
++ return IRQ_RETVAL(handled);
++}
++
++/* "Normal" serial port interrupt handler - both rx and tx. */
++
++static irqreturn_t
++ser_interrupt(int irq, void *dev_id, struct pt_regs *regs)
++{
++ struct uart_cris_port *up = (struct uart_cris_port *)dev_id;
++ reg_scope_instances regi_ser;
++ int handled = 0;
++
++ spin_lock(&up->port.lock);
++ if (up->regi_dmain && up->regi_dmaout) {
++ spin_unlock(&up->port.lock);
++ return IRQ_NONE;
++ }
++
++ regi_ser = up->regi_ser;
++
++ if (regi_ser) {
++ reg_ser_r_masked_intr masked_intr;
++ masked_intr = REG_RD(ser, regi_ser, r_masked_intr);
++ /*
++ * Check what interrupts are active before taking
++ * actions. If DMA is used the interrupt shouldn't
++ * be enabled.
++ */
++ if (masked_intr.dav) {
++ receive_chars_no_dma(up);
++ handled = 1;
++ }
++ check_modem_status(up);
++
++ if (masked_intr.tr_rdy) {
++ transmit_chars_no_dma(up);
++ handled = 1;
++ }
++ }
++ spin_unlock(&up->port.lock);
++ return IRQ_RETVAL(handled);
++} /* ser_interrupt */
++
++static int start_recv_dma(struct uart_cris_port *up)
++{
++ struct dma_descr_data *descr = up->rec_descr;
++ struct etrax_recv_buffer *buffer;
++ int i;
++
++ /* Set up the receiving descriptors. */
++ for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++) {
++ buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE);
++ descr[i].next = (void*)virt_to_phys(&descr[i+1]);
++ descr[i].buf = (void*)virt_to_phys(buffer->buffer);
++ descr[i].after = descr[i].buf + SERIAL_DESCR_BUF_SIZE;
++ descr[i].eol = 0;
++ descr[i].out_eop = 0;
++ descr[i].intr = 1;
++ descr[i].wait = 0;
++ descr[i].in_eop = 0;
++ descr[i].md = 0;
++
++ }
++
++ /* Link the last descriptor to the first. */
++ descr[i-1].next = (void*)virt_to_phys(&descr[0]);
++
++ /* And mark it as end of list. */
++ descr[i-1].eol = 1;
++
++ /* Start with the first descriptor in the list. */
++ up->cur_rec_descr = 0;
++ up->rec_context_descr.next = 0;
++ up->rec_context_descr.saved_data
++ = (dma_descr_data *)virt_to_phys(&descr[up->cur_rec_descr]);
++ up->rec_context_descr.saved_data_buf = descr[up->cur_rec_descr].buf;
++
++ /* Start the DMA. */
++ DMA_START_CONTEXT(up->regi_dmain,
++ virt_to_phys(&up->rec_context_descr));
++
++ /* Input DMA should be running now. */
++ return 1;
++}
++
++
++static void start_receive(struct uart_cris_port *up)
++{
++ reg_scope_instances regi_dmain = up->regi_dmain;
++ if (regi_dmain) {
++ start_recv_dma(up);
++ }
++}
++
++
++static void start_transmitter(struct uart_cris_port *up)
++{
++ int i;
++ reg_scope_instances regi_dmaout = up->regi_dmaout;
++ if (regi_dmaout) {
++ for (i = 0; i < SERIAL_TX_DESCRIPTORS; i++) {
++ memset(&up->tr_descr[i], 0, sizeof(up->tr_descr[i]));
++ up->tr_descr[i].eol = 1;
++ up->tr_descr[i].intr = 1;
++ up->tr_descr[i].next = (dma_descr_data *)
++ virt_to_phys(&up->tr_descr[i+1]);
++ }
++ up->tr_descr[i-1].next = (dma_descr_data *)
++ virt_to_phys(&up->tr_descr[0]);
++ up->first_tx_descr = &up->tr_descr[0];
++
++ /*
++ * We'll be counting up to up->last_tx_descr->next from
++ * up->first_tx_descr when starting DMA, so we should make
++ * them the same for the very first round. If instead we'd
++ * set last_tx_descr = first_tx_descr, we'd rely on
++ * accidentally working code and data as we'd take a pass over
++ * the first, unused, descriptor.
++ */
++ up->last_tx_descr = &up->tr_descr[i-1];
++ up->tx_started = 0;
++ up->tx_pending_chars = 0;
++ }
++}
++
++static int serial_cris_startup(struct uart_port *port)
++{
++ struct uart_cris_port *up = (struct uart_cris_port *)port;
++ unsigned long flags;
++ reg_intr_vect_rw_mask intr_mask;
++ reg_ser_rw_intr_mask ser_intr_mask = {0};
++ reg_dma_rw_intr_mask dmain_intr_mask = {0};
++ reg_dma_rw_intr_mask dmaout_intr_mask = {0};
++ reg_dma_rw_cfg cfg = {.en = 1};
++ reg_scope_instances regi_dma;
++
++ spin_lock_irqsave(&up->port.lock, flags);
++
++ intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
++
++ dmain_intr_mask.data = dmain_intr_mask.in_eop = regk_dma_yes;
++ dmaout_intr_mask.data = regk_dma_yes;
++ if (!up->regi_dmain)
++ ser_intr_mask.dav = regk_ser_yes;
++
++ if (port->line == 0) {
++ if (request_irq(SER0_INTR_VECT, ser_interrupt,
++ IRQF_SHARED | IRQF_DISABLED, "ser0",
++ &serial_cris_ports[0]))
++ panic("irq ser0");
++ /* Enable the ser0 irq in global config. */
++ intr_mask.ser0 = 1;
++ /* Port ser0 can use dma6 for tx and dma7 for rx. */
++#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
++ if (request_irq(DMA6_INTR_VECT, dma_tr_interrupt,
++ IRQF_DISABLED, "serial 0 dma tr",
++ &serial_cris_ports[0]))
++ panic("irq ser0txdma");
++ crisv32_request_dma(6, "ser0", DMA_PANIC_ON_ERROR, 0,
++ dma_ser0);
++ /* Enable the dma6 irq in global config. */
++ intr_mask.dma6 = 1;
++#endif
++#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
++ if (request_irq(DMA7_INTR_VECT, dma_rec_interrupt,
++ IRQF_DISABLED, "serial 0 dma rec",
++ &serial_cris_ports[0]))
++ panic("irq ser0rxdma");
++ crisv32_request_dma(7, "ser0", DMA_PANIC_ON_ERROR, 0,
++ dma_ser0);
++ /* Enable the dma7 irq in global config. */
++ intr_mask.dma7 = 1;
++#endif
++ } else if (port->line == 1) {
++ if (request_irq(SER1_INTR_VECT, ser_interrupt,
++ IRQF_SHARED | IRQF_DISABLED, "ser1",
++ &serial_cris_ports[1]))
++ panic("irq ser1");
++ /* Enable the ser1 irq in global config. */
++ intr_mask.ser1 = 1;
++
++ /* Port ser1 can use dma4 for tx and dma5 for rx. */
++#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA4_OUT
++ if (request_irq(DMA4_INTR_VECT, dma_tr_interrupt,
++ IRQF_DISABLED, "serial 1 dma tr",
++ &serial_cris_ports[1]))
++ panic("irq ser1txdma");
++ crisv32_request_dma(4, "ser1", DMA_PANIC_ON_ERROR, 0,
++ dma_ser1);
++ /* Enable the dma4 irq in global config. */
++ intr_mask.dma4 = 1;
++#endif
++#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA5_IN
++ if (request_irq(DMA5_INTR_VECT, dma_rec_interrupt,
++ IRQF_DISABLED, "serial 1 dma rec",
++ &serial_cris_ports[1]))
++ panic("irq ser1rxdma");
++ crisv32_request_dma(5, "ser1", DMA_PANIC_ON_ERROR, 0,
++ dma_ser1);
++ /* Enable the dma5 irq in global config. */
++ intr_mask.dma5 = 1;
++#endif
++ } else if (port->line == 2) {
++ if (request_irq(SER2_INTR_VECT, ser_interrupt,
++ IRQF_SHARED | IRQF_DISABLED, "ser2",
++ &serial_cris_ports[2]))
++ panic("irq ser2");
++ /* Enable the ser2 irq in global config. */
++ intr_mask.ser2 = 1;
++
++ /* Port ser2 can use dma2 for tx and dma3 for rx. */
++#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
++ if (request_irq(DMA2_INTR_VECT, dma_tr_interrupt,
++ IRQF_DISABLED, "serial 2 dma tr",
++ &serial_cris_ports[2]))
++ panic("irq ser2txdma");
++ crisv32_request_dma(2, "ser2", DMA_PANIC_ON_ERROR, 0,
++ dma_ser2);
++ /* Enable the dma2 irq in global config. */
++ intr_mask.dma2 = 1;
++#endif
++#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
++ if (request_irq(DMA3_INTR_VECT, dma_rec_interrupt,
++ IRQF_DISABLED, "serial 2 dma rec",
++ &serial_cris_ports[2]))
++ panic("irq ser2rxdma");
++ crisv32_request_dma(3, "ser2", DMA_PANIC_ON_ERROR, 0,
++ dma_ser2);
++ /* Enable the dma3 irq in global config. */
++ intr_mask.dma3 = 1;
++#endif
++ } else if (port->line == 3) {
++ if (request_irq(SER3_INTR_VECT, ser_interrupt,
++ IRQF_SHARED | IRQF_DISABLED, "ser3",
++ &serial_cris_ports[3]))
++ panic("irq ser3" );
++ /* Enable the ser3 irq in global config. */
++ intr_mask.ser3 = 1;
++
++ /* Port ser3 can use dma8 for tx and dma9 for rx. */
++#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA8_OUT
++ if (request_irq(DMA8_INTR_VECT, dma_tr_interrupt,
++ IRQF_DISABLED, "serial 3 dma tr",
++ &serial_cris_ports[3]))
++ panic("irq ser3txdma");
++ crisv32_request_dma(8, "ser3", DMA_PANIC_ON_ERROR, 0,
++ dma_ser3);
++ /* Enable the dma2 irq in global config. */
++ intr_mask.dma8 = 1;
++#endif
++#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA9_IN
++ if (request_irq(DMA9_INTR_VECT, dma_rec_interrupt,
++ IRQF_DISABLED, "serial 3 dma rec",
++ &serial_cris_ports[3]))
++ panic("irq ser3rxdma");
++ crisv32_request_dma(9, "ser3", DMA_PANIC_ON_ERROR, 0,
++ dma_ser3);
++ /* Enable the dma3 irq in global config. */
++ intr_mask.dma9 = 1;
++#endif
++ }
++
++ /*
++ * Reset the DMA channels and make sure their interrupts are cleared.
++ */
++
++ regi_dma = up->regi_dmain;
++ if (regi_dma) {
++ reg_dma_rw_ack_intr ack_intr = { 0 };
++ DMA_RESET(regi_dma);
++ /* Wait until reset cycle is complete. */
++ DMA_WAIT_UNTIL_RESET(regi_dma);
++ REG_WR(dma, regi_dma, rw_cfg, cfg);
++ /* Make sure the irqs are cleared. */
++ ack_intr.group = 1;
++ ack_intr.ctxt = 1;
++ ack_intr.data = 1;
++ ack_intr.in_eop = 1;
++ ack_intr.stream_cmd = 1;
++ REG_WR(dma, regi_dma, rw_ack_intr, ack_intr);
++ }
++ regi_dma = up->regi_dmaout;
++ if (regi_dma) {
++ reg_dma_rw_ack_intr ack_intr = { 0 };
++ DMA_RESET(regi_dma);
++ /* Wait until reset cycle is complete. */
++ DMA_WAIT_UNTIL_RESET(regi_dma);
++ REG_WR(dma, regi_dma, rw_cfg, cfg);
++ /* Make sure the irqs are cleared. */
++ ack_intr.group = 1;
++ ack_intr.ctxt = 1;
++ ack_intr.data = 1;
++ ack_intr.in_eop = 1;
++ ack_intr.stream_cmd = 1;
++ REG_WR(dma, regi_dma, rw_ack_intr, ack_intr);
++ }
++
++ REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
++ REG_WR(ser, up->regi_ser, rw_intr_mask, ser_intr_mask);
++ if (up->regi_dmain)
++ REG_WR(dma, up->regi_dmain, rw_intr_mask, dmain_intr_mask);
++ if (up->regi_dmaout)
++ REG_WR(dma, up->regi_dmaout, rw_intr_mask, dmaout_intr_mask);
++
++ start_receive(up);
++ start_transmitter(up);
++
++ serial_cris_set_mctrl(&up->port, up->port.mctrl);
++ spin_unlock_irqrestore(&up->port.lock, flags);
++
++ return 0;
++}
++
++static void serial_cris_shutdown(struct uart_port *port)
++{
++ struct uart_cris_port *up = (struct uart_cris_port *)port;
++ unsigned long flags;
++ reg_intr_vect_rw_mask intr_mask;
++
++ spin_lock_irqsave(&up->port.lock, flags);
++
++ intr_mask = REG_RD(intr_vect, regi_irq, rw_mask);
++ serial_cris_stop_tx(port);
++ serial_cris_stop_rx(port);
++
++ if (port->line == 0) {
++ intr_mask.ser0 = 0;
++ free_irq(SER0_INTR_VECT, &serial_cris_ports[0]);
++#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
++ intr_mask.dma6 = 0;
++ crisv32_free_dma(6);
++ free_irq(DMA6_INTR_VECT, &serial_cris_ports[0]);
++#endif
++#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
++ intr_mask.dma7 = 0;
++ crisv32_free_dma(7);
++ free_irq(DMA7_INTR_VECT, &serial_cris_ports[0]);
++#endif
++ } else if (port->line == 1) {
++ intr_mask.ser1 = 0;
++ free_irq(SER1_INTR_VECT, &serial_cris_ports[1]);
++#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA4_OUT
++ intr_mask.dma4 = 0;
++ crisv32_free_dma(4);
++ free_irq(DMA4_INTR_VECT, &serial_cris_ports[1]);
++#endif
++#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA5_IN
++ intr_mask.dma5 = 0;
++ crisv32_free_dma(5);
++ free_irq(DMA5_INTR_VECT, &serial_cris_ports[1]);
++#endif
++ } else if (port->line == 2) {
++ intr_mask.ser2 = 0;
++ free_irq(SER2_INTR_VECT, &serial_cris_ports[2]);
++#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
++ intr_mask.dma2 = 0;
++ crisv32_free_dma(2);
++ free_irq(DMA2_INTR_VECT, &serial_cris_ports[2]);
++#endif
++#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
++ intr_mask.dma3 = 0;
++ crisv32_free_dma(3);
++ free_irq(DMA3_INTR_VECT, &serial_cris_ports[2]);
++#endif
++ } else if (port->line == 3) {
++ intr_mask.ser3 = 0;
++ free_irq(SER3_INTR_VECT, &serial_cris_ports[3]);
++#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA8_OUT
++ intr_mask.dma8 = 0;
++ crisv32_free_dma(8);
++ free_irq(DMA8_INTR_VECT, &serial_cris_ports[3]);
++#endif
++#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA9_IN
++ intr_mask.dma9 = 0;
++ crisv32_free_dma(9);
++ free_irq(DMA9_INTR_VECT, &serial_cris_ports[3]);
++#endif
++ }
++
++ REG_WR(intr_vect, regi_irq, rw_mask, intr_mask);
++
++ serial_cris_set_mctrl(&up->port, up->port.mctrl);
++
++ if (up->regi_dmain) {
++ struct etrax_recv_buffer *rb;
++ struct etrax_recv_buffer *rb_next;
++ int i;
++ struct dma_descr_data *descr;
++
++ /*
++ * In case of DMA and receive errors, there might be pending
++ * receive buffers still linked here and not flushed upwards.
++ * Release them.
++ */
++ for (rb = up->first_recv_buffer; rb != NULL; rb = rb_next) {
++ rb_next = rb->next;
++ kfree (rb);
++ }
++ up->first_recv_buffer = NULL;
++ up->last_recv_buffer = NULL;
++
++ /*
++ * Also release buffers that were attached to the DMA
++ * before we shut down the hardware above.
++ */
++ for (i = 0, descr = up->rec_descr;
++ i < SERIAL_RECV_DESCRIPTORS;
++ i++)
++ if (descr[i].buf) {
++ rb = phys_to_virt((u32) descr[i].buf)
++ - sizeof *rb;
++ kfree(rb);
++ descr[i].buf = NULL;
++ }
++ }
++
++ spin_unlock_irqrestore(&up->port.lock, flags);
++
++}
++
++static void
++serial_cris_set_termios(struct uart_port *port, struct termios *termios,
++ struct termios *old)
++{
++ struct uart_cris_port *up = (struct uart_cris_port *)port;
++ unsigned long flags;
++ reg_ser_rw_xoff xoff;
++ reg_ser_rw_xoff_clr xoff_clr = {0};
++ reg_ser_rw_tr_ctrl tx_ctrl = {0};
++ reg_ser_rw_tr_dma_en tx_dma_en = {0};
++ reg_ser_rw_rec_ctrl rx_ctrl = {0};
++ reg_ser_rw_tr_baud_div tx_baud_div = {0};
++ reg_ser_rw_rec_baud_div rx_baud_div = {0};
++ reg_ser_r_stat_din rstat;
++ int baud;
++
++ if (old &&
++ termios->c_cflag == old->c_cflag &&
++ termios->c_iflag == old->c_iflag)
++ return;
++
++ /* Start with default settings and then fill in changes. */
++
++ /* Tx: 8 bit, no/even parity, 1 stop bit, no cts. */
++ tx_ctrl.base_freq = regk_ser_f29_493;
++ tx_ctrl.en = 0;
++ tx_ctrl.stop = 0;
++#ifdef CONFIG_ETRAX_RS485
++ if (up->rs485.enabled && (up->port_type != TYPE_485FD)) {
++ tx_ctrl.auto_rts = regk_ser_yes;
++ } else
++#endif
++ tx_ctrl.auto_rts = regk_ser_no;
++ tx_ctrl.txd = 1;
++ tx_ctrl.auto_cts = 0;
++ /* Rx: 8 bit, no/even parity. */
++ if (up->regi_dmain) {
++ rx_ctrl.dma_mode = 1;
++ rx_ctrl.auto_eop = 1;
++ }
++ rx_ctrl.dma_err = regk_ser_stop;
++ rx_ctrl.sampling = regk_ser_majority;
++ rx_ctrl.timeout = 1;
++
++#ifdef CONFIG_ETRAX_RS485
++ if (up->rs485.enabled && (up->port_type != TYPE_485FD)) {
++# ifdef CONFIG_ETRAX_RS485_DISABLE_RECEIVER
++ rx_ctrl.half_duplex = regk_ser_yes;
++# endif
++ rx_ctrl.rts_n = up->rs485.rts_after_sent ?
++ regk_ser_active : regk_ser_inactive;
++ } else if (up->port_type == TYPE_485FD) {
++ rx_ctrl.rts_n = regk_ser_active;
++ } else
++#endif
++ rx_ctrl.rts_n = regk_ser_inactive;
++
++ /* Common for tx and rx: 8N1. */
++ tx_ctrl.data_bits = regk_ser_bits8;
++ rx_ctrl.data_bits = regk_ser_bits8;
++ tx_ctrl.par = regk_ser_even;
++ rx_ctrl.par = regk_ser_even;
++ tx_ctrl.par_en = regk_ser_no;
++ rx_ctrl.par_en = regk_ser_no;
++
++ tx_ctrl.stop_bits = regk_ser_bits1;
++
++
++ /* Change baud-rate and write it to the hardware. */
++
++ /* baud_clock = base_freq / (divisor*8)
++ * divisor = base_freq / (baud_clock * 8)
++ * base_freq is either:
++ * off, ext, 29.493MHz, 32.000 MHz, 32.768 MHz or 100 MHz
++ * 20.493MHz is used for standard baudrates
++ */
++
++ /*
++ * For the console port we keep the original baudrate here. Not very
++ * beautiful.
++ */
++ if ((port != console_port) || old)
++ baud = uart_get_baud_rate(port, termios, old, 0,
++ port->uartclk / 8);
++ else
++ baud = console_baud;
++
++ tx_baud_div.div = 29493000 / (8 * baud);
++ /* Rx uses same as tx. */
++ rx_baud_div.div = tx_baud_div.div;
++ rx_ctrl.base_freq = tx_ctrl.base_freq;
++
++ if ((termios->c_cflag & CSIZE) == CS7) {
++ /* Set 7 bit mode. */
++ tx_ctrl.data_bits = regk_ser_bits7;
++ rx_ctrl.data_bits = regk_ser_bits7;
++ }
++
++ if (termios->c_cflag & CSTOPB) {
++ /* Set 2 stop bit mode. */
++ tx_ctrl.stop_bits = regk_ser_bits2;
++ }
++
++ if (termios->c_cflag & PARENB) {
++ /* Enable parity. */
++ tx_ctrl.par_en = regk_ser_yes;
++ rx_ctrl.par_en = regk_ser_yes;
++ }
++
++ if (termios->c_cflag & CMSPAR) {
++ if (termios->c_cflag & PARODD) {
++ /* Set mark parity if PARODD and CMSPAR. */
++ tx_ctrl.par = regk_ser_mark;
++ rx_ctrl.par = regk_ser_mark;
++ } else {
++ tx_ctrl.par = regk_ser_space;
++ rx_ctrl.par = regk_ser_space;
++ }
++ } else {
++ if (termios->c_cflag & PARODD) {
++ /* Set odd parity. */
++ tx_ctrl.par = regk_ser_odd;
++ rx_ctrl.par = regk_ser_odd;
++ }
++ }
++
++ if (termios->c_cflag & CRTSCTS) {
++ /* Enable automatic CTS handling. */
++ tx_ctrl.auto_cts = regk_ser_yes;
++ }
++
++ /* Make sure the tx and rx are enabled. */
++ tx_ctrl.en = regk_ser_yes;
++ rx_ctrl.en = regk_ser_yes;
++
++ /*
++ * Wait for tr_idle in case a character is being output, so it won't
++ * be damaged by the changes we do below. It seems the termios
++ * changes "sometimes" (we can't see e.g. a tcsetattr TCSANOW
++ * parameter here) should take place no matter what state. However,
++ * in case we should wait, we may have a non-empty transmitter state
++ * as we tell the upper layers that we're all done when we've passed
++ * characters to the hardware, but we don't wait for them being
++ * actually shifted out.
++ */
++ spin_lock_irqsave(&port->lock, flags);
++
++ /*
++ * None of our interrupts re-enable DMA, so it's thankfully ok to
++ * disable it once, outside the loop.
++ */
++ tx_dma_en.en = 0;
++ REG_WR(ser, up->regi_ser, rw_tr_dma_en, tx_dma_en);
++ do {
++ /*
++ * Make sure we have integrity between the read r_stat status
++ * and us writing the registers below, but don't busy-wait
++ * with interrupts off. We need to keep the port lock though
++ * (if we go SMP), so nobody else writes characters.
++ */
++ local_irq_restore(flags);
++ local_irq_save(flags);
++ rstat = REG_RD(ser, up->regi_ser, r_stat_din);
++ } while (!rstat.tr_idle);
++
++ /* Actually write the control regs (if modified) to the hardware. */
++
++ uart_update_timeout(port, termios->c_cflag, port->uartclk/8);
++ MODIFY_REG(up->regi_ser, rw_rec_baud_div, rx_baud_div);
++ MODIFY_REG(up->regi_ser, rw_rec_ctrl, rx_ctrl);
++
++ MODIFY_REG(up->regi_ser, rw_tr_baud_div, tx_baud_div);
++ MODIFY_REG(up->regi_ser, rw_tr_ctrl, tx_ctrl);
++
++ tx_dma_en.en = up->regi_dmaout != 0;
++ REG_WR(ser, up->regi_ser, rw_tr_dma_en, tx_dma_en);
++
++ xoff = REG_RD(ser, up->regi_ser, rw_xoff);
++
++ if (up->port.info && (up->port.info->tty->termios->c_iflag & IXON)) {
++ xoff.chr = STOP_CHAR(up->port.info->tty);
++ xoff.automatic = regk_ser_yes;
++ } else
++ xoff.automatic = regk_ser_no;
++
++ MODIFY_REG(up->regi_ser, rw_xoff, xoff);
++
++ /*
++ * Make sure we don't start in an automatically shut-off state due to
++ * a previous early exit.
++ */
++ xoff_clr.clr = 1;
++ REG_WR(ser, up->regi_ser, rw_xoff_clr, xoff_clr);
++
++ serial_cris_set_mctrl(&up->port, up->port.mctrl);
++ spin_unlock_irqrestore(&up->port.lock, flags);
++}
++
++static const char *
++serial_cris_type(struct uart_port *port)
++{
++ return "CRISv32";
++}
++
++static void serial_cris_release_port(struct uart_port *port)
++{
++}
++
++static int serial_cris_request_port(struct uart_port *port)
++{
++ return 0;
++}
++
++static void serial_cris_config_port(struct uart_port *port, int flags)
++{
++ struct uart_cris_port *up = (struct uart_cris_port *)port;
++ up->port.type = PORT_CRIS;
++}
++
++#if defined(CONFIG_ETRAX_RS485)
++
++static void cris_set_rs485_mode(struct uart_cris_port* up) {
++ reg_ser_rw_tr_ctrl tr_ctrl;
++ reg_ser_rw_rec_ctrl rec_ctrl;
++ reg_scope_instances regi_ser = up->regi_ser;
++
++ if (up->port_type == TYPE_485FD)
++ /* We do not want to change anything if we are in 485FD mode */
++ return;
++
++ tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
++ rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
++
++ /* Set port in RS-485 mode */
++ if (up->rs485.enabled) {
++ tr_ctrl.auto_rts = regk_ser_yes;
++ rec_ctrl.rts_n = up->rs485.rts_after_sent ?
++ regk_ser_active : regk_ser_inactive;
++#ifdef CONFIG_ETRAX_RS485_DISABLE_RECEIVER
++ rec_ctrl.half_duplex = regk_ser_yes;
++#endif
++ }
++ /* Set port to RS-232 mode */
++ else {
++ rec_ctrl.rts_n = regk_ser_inactive;
++ tr_ctrl.auto_rts = regk_ser_no;
++ rec_ctrl.half_duplex = regk_ser_no;
++ }
++
++ REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
++ REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
++}
++
++/* Enable/disable RS-485 mode on selected port. */
++static int
++cris_enable_rs485(struct uart_cris_port* up, struct rs485_control *r)
++{
++ if (up->port_type == TYPE_485FD)
++ /* Port in 485FD mode can not chage mode */
++ goto out;
++
++ up->rs485.enabled = 0x1 & r->enabled;
++ up->rs485.rts_on_send = 0x01 & r->rts_on_send;
++ up->rs485.rts_after_sent = 0x01 & r->rts_after_sent;
++ up->rs485.delay_rts_before_send = r->delay_rts_before_send;
++
++ cris_set_rs485_mode(up);
++ out:
++ return 0;
++}
++
++
++/* Enable RS485 mode on port and send the data. Port will stay
++ * in 485 mode after the data has been sent.
++ */
++static int
++cris_write_rs485(struct uart_cris_port* up, const unsigned char *buf,
++ int count)
++{
++ up->rs485.enabled = 1;
++
++ /* Set the port in RS485 mode */
++ cris_set_rs485_mode(up);
++
++ /* Send the data */
++ count = serial_cris_driver.tty_driver->write(up->port.info->tty, buf, count);
++
++ return count;
++}
++
++#endif /* CONFIG_ETRAX_RS485 */
++
++static int serial_cris_ioctl(struct uart_port *port, unsigned int cmd,
++ unsigned long arg)
++{
++ struct uart_cris_port *up = (struct uart_cris_port *)port;
++
++ switch (cmd) {
++#if defined(CONFIG_ETRAX_RS485)
++ case TIOCSERSETRS485: {
++ struct rs485_control rs485ctrl;
++ if (copy_from_user(&rs485ctrl, (struct rs485_control*) arg,
++ sizeof(rs485ctrl)))
++ return -EFAULT;
++
++ return cris_enable_rs485(up, &rs485ctrl);
++ }
++
++ case TIOCSERWRRS485: {
++ struct rs485_write rs485wr;
++ if (copy_from_user(&rs485wr, (struct rs485_write*)arg,
++ sizeof(rs485wr)))
++ return -EFAULT;
++
++ return cris_write_rs485(up, rs485wr.outc, rs485wr.outc_size);
++ }
++#endif
++ default:
++ return -ENOIOCTLCMD;
++ }
++
++ return 0;
++}
++
++static const struct uart_ops serial_cris_pops = {
++ .tx_empty = serial_cris_tx_empty,
++ .set_mctrl = serial_cris_set_mctrl,
++ .get_mctrl = serial_cris_get_mctrl,
++ .stop_tx = serial_cris_stop_tx,
++ .start_tx = serial_cris_start_tx,
++ .send_xchar = serial_cris_send_xchar,
++ .stop_rx = serial_cris_stop_rx,
++ .enable_ms = serial_cris_enable_ms,
++ .break_ctl = serial_cris_break_ctl,
++ .startup = serial_cris_startup,
++ .shutdown = serial_cris_shutdown,
++ .set_termios = serial_cris_set_termios,
++ .type = serial_cris_type,
++ .release_port = serial_cris_release_port,
++ .request_port = serial_cris_request_port,
++ .config_port = serial_cris_config_port,
++ .ioctl = serial_cris_ioctl,
++};
++
++/*
++ * It's too easy to break CONFIG_ETRAX_DEBUG_PORT_NULL and the
++ * no-config choices by adding and moving code to before a necessary
++ * early exit in all functions for the special case of
++ * up->regi_ser == 0. This collection of dummy functions lets us
++ * avoid that. Maybe there should be a generic table of dummy serial
++ * functions?
++ */
++
++static unsigned int serial_cris_tx_empty_dummy(struct uart_port *port)
++{
++ return TIOCSER_TEMT;
++}
++
++static void serial_cris_set_mctrl_dummy(struct uart_port *port,
++ unsigned int mctrl)
++{
++}
++
++static unsigned int serial_cris_get_mctrl_dummy(struct uart_port *port)
++{
++ return 0;
++}
++
++static void serial_cris_stop_tx_dummy(struct uart_port *port)
++{
++}
++
++static void serial_cris_start_tx_dummy(struct uart_port *port)
++{
++ /* Discard outbound characters. */
++ struct uart_cris_port *up = (struct uart_cris_port *)port;
++ struct circ_buf *xmit = &up->port.info->xmit;
++ xmit->tail = xmit->head;
++ uart_write_wakeup(port);
++}
++
++#define serial_cris_stop_rx_dummy serial_cris_stop_tx_dummy
++
++#define serial_cris_enable_ms_dummy serial_cris_stop_tx_dummy
++
++static void serial_cris_break_ctl_dummy(struct uart_port *port,
++ int break_state)
++{
++}
++
++static int serial_cris_startup_dummy(struct uart_port *port)
++{
++ return 0;
++}
++
++#define serial_cris_shutdown_dummy serial_cris_stop_tx_dummy
++
++static void
++serial_cris_set_termios_dummy(struct uart_port *port, struct termios *termios,
++ struct termios *old)
++{
++}
++
++#define serial_cris_release_port_dummy serial_cris_stop_tx_dummy
++#define serial_cris_request_port_dummy serial_cris_startup_dummy
++
++static const struct uart_ops serial_cris_dummy_pops = {
++ /*
++ * We *could* save one or two of those with different
++ * signature by casting and knowledge of the ABI, but it's
++ * just not worth the maintenance headache.
++ * For the ones we don't define here, the default (usually meaning
++ * "unimplemented") makes sense.
++ */
++ .tx_empty = serial_cris_tx_empty_dummy,
++ .set_mctrl = serial_cris_set_mctrl_dummy,
++ .get_mctrl = serial_cris_get_mctrl_dummy,
++ .stop_tx = serial_cris_stop_tx_dummy,
++ .start_tx = serial_cris_start_tx_dummy,
++ .stop_rx = serial_cris_stop_rx_dummy,
++ .enable_ms = serial_cris_enable_ms_dummy,
++ .break_ctl = serial_cris_break_ctl_dummy,
++ .startup = serial_cris_startup_dummy,
++ .shutdown = serial_cris_shutdown_dummy,
++ .set_termios = serial_cris_set_termios_dummy,
++
++ /* This one we keep the same. */
++ .type = serial_cris_type,
++
++ .release_port = serial_cris_release_port_dummy,
++ .request_port = serial_cris_request_port_dummy,
++
++ /*
++ * This one we keep the same too, as long as it doesn't do
++ * anything else but to set the type.
++ */
++ .config_port = serial_cris_config_port,
++};
++
++static void cris_serial_port_init(struct uart_port *port, int line)
++{
++ struct uart_cris_port *up = (struct uart_cris_port *)port;
++ static int first = 1;
++
++ if (up->initialized)
++ return;
++ up->initialized = 1;
++ port->line = line;
++ spin_lock_init(&port->lock);
++ port->ops =
++ up->regi_ser == 0 ? &serial_cris_dummy_pops :
++ &serial_cris_pops;
++ port->irq = up->irq;
++ port->iobase = up->regi_ser ? up->regi_ser : 1;
++ port->uartclk = 29493000;
++
++ /*
++ * We can't fit any more than 255 here (unsigned char), though
++ * actually UART_XMIT_SIZE characters could be pending output (if it
++ * wasn't for the single test in transmit_chars_dma). At time of this
++ * writing, the definition of "fifosize" is here the amount of
++ * characters that can be pending output after a start_tx call until
++ * tx_empty returns 1: see serial_core.c:uart_wait_until_sent. This
++ * matters for timeout calculations unfortunately, but keeping larger
++ * amounts at the DMA wouldn't win much so let's just play nice.
++ */
++ port->fifosize = 255;
++ port->flags = UPF_BOOT_AUTOCONF;
++
++#ifdef CONFIG_ETRAX_RS485
++ /* Set sane defaults. */
++ up->rs485.rts_on_send = 0;
++ up->rs485.rts_after_sent = 1;
++ up->rs485.delay_rts_before_send = 0;
++ if (up->port_type > TYPE_232)
++ up->rs485.enabled = 1;
++ else
++ up->rs485.enabled = 0;
++#endif
++
++ if (first) {
++ first = 0;
++#ifdef CONFIG_ETRAX_SERIAL_PORT0
++ SETUP_PINS(0);
++#endif
++#ifdef CONFIG_ETRAX_SERIAL_PORT1
++ SETUP_PINS(1);
++#endif
++#ifdef CONFIG_ETRAX_SERIAL_PORT2
++ SETUP_PINS(2);
++#endif
++#ifdef CONFIG_ETRAX_SERIAL_PORT3
++ SETUP_PINS(3);
++#endif
++ }
++}
++
++static int __init serial_cris_init(void)
++{
++ int ret, i;
++ reg_ser_rw_rec_ctrl rec_ctrl;
++ printk(KERN_INFO "Serial: CRISv32 driver $Revision: 1.78 $ ");
++
++ ret = uart_register_driver(&serial_cris_driver);
++ if (ret)
++ goto out;
++
++ for (i = 0; i < UART_NR; i++) {
++ if (serial_cris_ports[i].used) {
++#ifdef CONFIG_ETRAX_RS485
++ /* Make sure that the RTS pin stays low when allocating
++ * pins for a port in 485 mode.
++ */
++ if (serial_cris_ports[i].port_type > TYPE_232) {
++ rec_ctrl = REG_RD(ser, serial_cris_ports[i].regi_ser, rw_rec_ctrl);
++ rec_ctrl.rts_n = regk_ser_active;
++ REG_WR(ser, serial_cris_ports[i].regi_ser, rw_rec_ctrl, rec_ctrl);
++ }
++#endif
++ switch (serial_cris_ports[i].regi_ser) {
++ case regi_ser1:
++ if (crisv32_pinmux_alloc_fixed(pinmux_ser1)) {
++ printk("Failed to allocate pins for ser1, disable port\n");
++ serial_cris_ports[i].used = 0;
++ continue;
++ }
++ break;
++ case regi_ser2:
++ if (crisv32_pinmux_alloc_fixed(pinmux_ser2)) {
++ printk("Failed to allocate pins for ser2, disable port\n");
++ serial_cris_ports[i].used = 0;
++ continue;
++ }
++ break;
++ case regi_ser3:
++ if (crisv32_pinmux_alloc_fixed(pinmux_ser3)) {
++ printk("Failed to allocate pins for ser3, disable port\n");
++ serial_cris_ports[i].used = 0;
++ continue;
++ }
++ break;
++ }
++
++ struct uart_port *port = &serial_cris_ports[i].port;
++ cris_console.index = i;
++ cris_serial_port_init(port, i);
++ uart_add_one_port(&serial_cris_driver, port);
++ }
++ }
++
++out:
++ return ret;
++}
++
++static void __exit serial_cris_exit(void)
++{
++ int i;
++ for (i = 0; i < UART_NR; i++)
++ if (serial_cris_ports[i].used) {
++ switch (serial_cris_ports[i].regi_ser) {
++ case regi_ser1:
++ crisv32_pinmux_dealloc_fixed(pinmux_ser1);
++ break;
++ case regi_ser2:
++ crisv32_pinmux_dealloc_fixed(pinmux_ser2);
++ break;
++ case regi_ser3:
++ crisv32_pinmux_dealloc_fixed(pinmux_ser3);
++ break;
++ }
++ uart_remove_one_port(&serial_cris_driver,
++ &serial_cris_ports[i].port);
++ }
++ uart_unregister_driver(&serial_cris_driver);
++}
++
++module_init(serial_cris_init);
++module_exit(serial_cris_exit);
+--- linux-2.6.19.2.orig/drivers/usb/host/hc_crisv10.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/drivers/usb/host/hc-crisv10.c 2007-02-26 20:58:29.000000000 +0100
+@@ -1,219 +1,51 @@
+ /*
+- * usb-host.c: ETRAX 100LX USB Host Controller Driver (HCD)
+ *
+- * Copyright (c) 2002, 2003 Axis Communications AB.
++ * ETRAX 100LX USB Host Controller Driver
++ *
++ * Copyright (C) 2005, 2006 Axis Communications AB
++ *
++ * Author: Konrad Eriksson <konrad.eriksson@axis.se>
++ *
+ */
+
++#include <linux/module.h>
+ #include <linux/kernel.h>
+-#include <linux/delay.h>
+-#include <linux/ioport.h>
+-#include <linux/sched.h>
+-#include <linux/slab.h>
+-#include <linux/errno.h>
+-#include <linux/unistd.h>
+-#include <linux/interrupt.h>
+ #include <linux/init.h>
+-#include <linux/list.h>
++#include <linux/moduleparam.h>
+ #include <linux/spinlock.h>
++#include <linux/usb.h>
++#include <linux/platform_device.h>
+
+-#include <asm/uaccess.h>
+ #include <asm/io.h>
+ #include <asm/irq.h>
+-#include <asm/dma.h>
+-#include <asm/system.h>
+-#include <asm/arch/svinto.h>
++#include <asm/arch/dma.h>
++#include <asm/arch/io_interface_mux.h>
+
+-#include <linux/usb.h>
+-/* Ugly include because we don't live with the other host drivers. */
+-#include <../drivers/usb/core/hcd.h>
+-#include <../drivers/usb/core/usb.h>
+-
+-#include "hc_crisv10.h"
++#include "../core/hcd.h"
++#include "../core/hub.h"
++#include "hc-crisv10.h"
++#include "hc-cris-dbg.h"
++
++
++/***************************************************************************/
++/***************************************************************************/
++/* Host Controller settings */
++/***************************************************************************/
++/***************************************************************************/
++
++#define VERSION "1.00"
++#define COPYRIGHT "(c) 2005, 2006 Axis Communications AB"
++#define DESCRIPTION "ETRAX 100LX USB Host Controller"
+
+ #define ETRAX_USB_HC_IRQ USB_HC_IRQ_NBR
+ #define ETRAX_USB_RX_IRQ USB_DMA_RX_IRQ_NBR
+ #define ETRAX_USB_TX_IRQ USB_DMA_TX_IRQ_NBR
+
+-static const char *usb_hcd_version = "$Revision: 1.2 $";
+-
+-#undef KERN_DEBUG
+-#define KERN_DEBUG ""
+-
+-
+-#undef USB_DEBUG_RH
+-#undef USB_DEBUG_EPID
+-#undef USB_DEBUG_SB
+-#undef USB_DEBUG_DESC
+-#undef USB_DEBUG_URB
+-#undef USB_DEBUG_TRACE
+-#undef USB_DEBUG_BULK
+-#undef USB_DEBUG_CTRL
+-#undef USB_DEBUG_INTR
+-#undef USB_DEBUG_ISOC
+-
+-#ifdef USB_DEBUG_RH
+-#define dbg_rh(format, arg...) printk(KERN_DEBUG __FILE__ ": (RH) " format "\n" , ## arg)
+-#else
+-#define dbg_rh(format, arg...) do {} while (0)
+-#endif
+-
+-#ifdef USB_DEBUG_EPID
+-#define dbg_epid(format, arg...) printk(KERN_DEBUG __FILE__ ": (EPID) " format "\n" , ## arg)
+-#else
+-#define dbg_epid(format, arg...) do {} while (0)
+-#endif
+-
+-#ifdef USB_DEBUG_SB
+-#define dbg_sb(format, arg...) printk(KERN_DEBUG __FILE__ ": (SB) " format "\n" , ## arg)
+-#else
+-#define dbg_sb(format, arg...) do {} while (0)
+-#endif
+-
+-#ifdef USB_DEBUG_CTRL
+-#define dbg_ctrl(format, arg...) printk(KERN_DEBUG __FILE__ ": (CTRL) " format "\n" , ## arg)
+-#else
+-#define dbg_ctrl(format, arg...) do {} while (0)
+-#endif
+-
+-#ifdef USB_DEBUG_BULK
+-#define dbg_bulk(format, arg...) printk(KERN_DEBUG __FILE__ ": (BULK) " format "\n" , ## arg)
+-#else
+-#define dbg_bulk(format, arg...) do {} while (0)
+-#endif
+-
+-#ifdef USB_DEBUG_INTR
+-#define dbg_intr(format, arg...) printk(KERN_DEBUG __FILE__ ": (INTR) " format "\n" , ## arg)
+-#else
+-#define dbg_intr(format, arg...) do {} while (0)
+-#endif
+-
+-#ifdef USB_DEBUG_ISOC
+-#define dbg_isoc(format, arg...) printk(KERN_DEBUG __FILE__ ": (ISOC) " format "\n" , ## arg)
+-#else
+-#define dbg_isoc(format, arg...) do {} while (0)
+-#endif
+-
+-#ifdef USB_DEBUG_TRACE
+-#define DBFENTER (printk(": Entering: %s\n", __FUNCTION__))
+-#define DBFEXIT (printk(": Exiting: %s\n", __FUNCTION__))
+-#else
+-#define DBFENTER do {} while (0)
+-#define DBFEXIT do {} while (0)
+-#endif
+-
+-#define usb_pipeslow(pipe) (((pipe) >> 26) & 1)
+-
+-/*-------------------------------------------------------------------
+- Virtual Root Hub
+- -------------------------------------------------------------------*/
+-
+-static __u8 root_hub_dev_des[] =
+-{
+- 0x12, /* __u8 bLength; */
+- 0x01, /* __u8 bDescriptorType; Device */
+- 0x00, /* __le16 bcdUSB; v1.0 */
+- 0x01,
+- 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
+- 0x00, /* __u8 bDeviceSubClass; */
+- 0x00, /* __u8 bDeviceProtocol; */
+- 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
+- 0x00, /* __le16 idVendor; */
+- 0x00,
+- 0x00, /* __le16 idProduct; */
+- 0x00,
+- 0x00, /* __le16 bcdDevice; */
+- 0x00,
+- 0x00, /* __u8 iManufacturer; */
+- 0x02, /* __u8 iProduct; */
+- 0x01, /* __u8 iSerialNumber; */
+- 0x01 /* __u8 bNumConfigurations; */
+-};
+-
+-/* Configuration descriptor */
+-static __u8 root_hub_config_des[] =
+-{
+- 0x09, /* __u8 bLength; */
+- 0x02, /* __u8 bDescriptorType; Configuration */
+- 0x19, /* __le16 wTotalLength; */
+- 0x00,
+- 0x01, /* __u8 bNumInterfaces; */
+- 0x01, /* __u8 bConfigurationValue; */
+- 0x00, /* __u8 iConfiguration; */
+- 0x40, /* __u8 bmAttributes; Bit 7: Bus-powered */
+- 0x00, /* __u8 MaxPower; */
+-
+- /* interface */
+- 0x09, /* __u8 if_bLength; */
+- 0x04, /* __u8 if_bDescriptorType; Interface */
+- 0x00, /* __u8 if_bInterfaceNumber; */
+- 0x00, /* __u8 if_bAlternateSetting; */
+- 0x01, /* __u8 if_bNumEndpoints; */
+- 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
+- 0x00, /* __u8 if_bInterfaceSubClass; */
+- 0x00, /* __u8 if_bInterfaceProtocol; */
+- 0x00, /* __u8 if_iInterface; */
+-
+- /* endpoint */
+- 0x07, /* __u8 ep_bLength; */
+- 0x05, /* __u8 ep_bDescriptorType; Endpoint */
+- 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
+- 0x03, /* __u8 ep_bmAttributes; Interrupt */
+- 0x08, /* __le16 ep_wMaxPacketSize; 8 Bytes */
+- 0x00,
+- 0xff /* __u8 ep_bInterval; 255 ms */
+-};
+-
+-static __u8 root_hub_hub_des[] =
+-{
+- 0x09, /* __u8 bLength; */
+- 0x29, /* __u8 bDescriptorType; Hub-descriptor */
+- 0x02, /* __u8 bNbrPorts; */
+- 0x00, /* __u16 wHubCharacteristics; */
+- 0x00,
+- 0x01, /* __u8 bPwrOn2pwrGood; 2ms */
+- 0x00, /* __u8 bHubContrCurrent; 0 mA */
+- 0x00, /* __u8 DeviceRemovable; *** 7 Ports max *** */
+- 0xff /* __u8 PortPwrCtrlMask; *** 7 ports max *** */
+-};
+-
+-static DEFINE_TIMER(bulk_start_timer, NULL, 0, 0);
+-static DEFINE_TIMER(bulk_eot_timer, NULL, 0, 0);
+-
+-/* We want the start timer to expire before the eot timer, because the former might start
+- traffic, thus making it unnecessary for the latter to time out. */
+-#define BULK_START_TIMER_INTERVAL (HZ/10) /* 100 ms */
+-#define BULK_EOT_TIMER_INTERVAL (HZ/10+2) /* 120 ms */
+-
+-#define OK(x) len = (x); dbg_rh("OK(%d): line: %d", x, __LINE__); break
+-#define CHECK_ALIGN(x) if (((__u32)(x)) & 0x00000003) \
+-{panic("Alignment check (DWORD) failed at %s:%s:%d\n", __FILE__, __FUNCTION__, __LINE__);}
+-
+-#define SLAB_FLAG (in_interrupt() ? SLAB_ATOMIC : SLAB_KERNEL)
+-#define KMALLOC_FLAG (in_interrupt() ? GFP_ATOMIC : GFP_KERNEL)
+-
+-/* Most helpful debugging aid */
+-#define assert(expr) ((void) ((expr) ? 0 : (err("assert failed at line %d",__LINE__))))
+-
+-/* Alternative assert define which stops after a failed assert. */
+-/*
+-#define assert(expr) \
+-{ \
+- if (!(expr)) { \
+- err("assert failed at line %d",__LINE__); \
+- while (1); \
+- } \
+-}
+-*/
+-
++/* Number of physical ports in Etrax 100LX */
++#define USB_ROOT_HUB_PORTS 2
+
+-/* FIXME: Should RX_BUF_SIZE be a config option, or maybe we should adjust it dynamically?
+- To adjust it dynamically we would have to get an interrupt when we reach the end
+- of the rx descriptor list, or when we get close to the end, and then allocate more
+- descriptors. */
+-
+-#define NBR_OF_RX_DESC 512
+-#define RX_DESC_BUF_SIZE 1024
+-#define RX_BUF_SIZE (NBR_OF_RX_DESC * RX_DESC_BUF_SIZE)
++const char hc_name[] = "hc-crisv10";
++const char product_desc[] = DESCRIPTION;
+
+ /* The number of epids is, among other things, used for pre-allocating
+ ctrl, bulk and isoc EP descriptors (one for each epid).
+@@ -221,4332 +53,4632 @@
+ #define NBR_OF_EPIDS 32
+
+ /* Support interrupt traffic intervals up to 128 ms. */
+-#define MAX_INTR_INTERVAL 128
++#define MAX_INTR_INTERVAL 128
+
+-/* If periodic traffic (intr or isoc) is to be used, then one entry in the EP table
+- must be "invalid". By this we mean that we shouldn't care about epid attentions
+- for this epid, or at least handle them differently from epid attentions for "valid"
+- epids. This define determines which one to use (don't change it). */
+-#define INVALID_EPID 31
++/* If periodic traffic (intr or isoc) is to be used, then one entry in the EP
++ table must be "invalid". By this we mean that we shouldn't care about epid
++ attentions for this epid, or at least handle them differently from epid
++ attentions for "valid" epids. This define determines which one to use
++ (don't change it). */
++#define INVALID_EPID 31
+ /* A special epid for the bulk dummys. */
+-#define DUMMY_EPID 30
+-
+-/* This is just a software cache for the valid entries in R_USB_EPT_DATA. */
+-static __u32 epid_usage_bitmask;
+-
+-/* A bitfield to keep information on in/out traffic is needed to uniquely identify
+- an endpoint on a device, since the most significant bit which indicates traffic
+- direction is lacking in the ep_id field (ETRAX epids can handle both in and
+- out traffic on endpoints that are otherwise identical). The USB framework, however,
+- relies on them to be handled separately. For example, bulk IN and OUT urbs cannot
+- be queued in the same list, since they would block each other. */
+-static __u32 epid_out_traffic;
+-
+-/* DMA IN cache bug. Align the DMA IN buffers to 32 bytes, i.e. a cache line.
+- Since RX_DESC_BUF_SIZE is 1024 is a multiple of 32, all rx buffers will be cache aligned. */
+-static volatile unsigned char RxBuf[RX_BUF_SIZE] __attribute__ ((aligned (32)));
+-static volatile USB_IN_Desc_t RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned (4)));
+-
+-/* Pointers into RxDescList. */
+-static volatile USB_IN_Desc_t *myNextRxDesc;
+-static volatile USB_IN_Desc_t *myLastRxDesc;
+-static volatile USB_IN_Desc_t *myPrevRxDesc;
+-
+-/* EP descriptors must be 32-bit aligned. */
+-static volatile USB_EP_Desc_t TxCtrlEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
+-static volatile USB_EP_Desc_t TxBulkEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
+-/* After each enabled bulk EP (IN or OUT) we put two disabled EP descriptors with the eol flag set,
+- causing the DMA to stop the DMA channel. The first of these two has the intr flag set, which
+- gives us a dma8_sub0_descr interrupt. When we receive this, we advance the DMA one step in the
+- EP list and then restart the bulk channel, thus forcing a switch between bulk EP descriptors
+- in each frame. */
+-static volatile USB_EP_Desc_t TxBulkDummyEPList[NBR_OF_EPIDS][2] __attribute__ ((aligned (4)));
+-
+-static volatile USB_EP_Desc_t TxIsocEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
+-static volatile USB_SB_Desc_t TxIsocSB_zout __attribute__ ((aligned (4)));
+-
+-static volatile USB_EP_Desc_t TxIntrEPList[MAX_INTR_INTERVAL] __attribute__ ((aligned (4)));
+-static volatile USB_SB_Desc_t TxIntrSB_zout __attribute__ ((aligned (4)));
+-
+-/* A zout transfer makes a memory access at the address of its buf pointer, which means that setting
+- this buf pointer to 0 will cause an access to the flash. In addition to this, setting sw_len to 0
+- results in a 16/32 bytes (depending on DMA burst size) transfer. Instead, we set it to 1, and point
+- it to this buffer. */
+-static int zout_buffer[4] __attribute__ ((aligned (4)));
++#define DUMMY_EPID 30
+
+-/* Cache for allocating new EP and SB descriptors. */
+-static kmem_cache_t *usb_desc_cache;
++/* Module settings */
+
+-/* Cache for the registers allocated in the top half. */
+-static kmem_cache_t *top_half_reg_cache;
++MODULE_DESCRIPTION(DESCRIPTION);
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Konrad Eriksson <konrad.eriksson@axis.se>");
+
+-/* Cache for the data allocated in the isoc descr top half. */
+-static kmem_cache_t *isoc_compl_cache;
+
+-static struct usb_bus *etrax_usb_bus;
++/* Module parameters */
+
+-/* This is a circular (double-linked) list of the active urbs for each epid.
+- The head is never removed, and new urbs are linked onto the list as
+- urb_entry_t elements. Don't reference urb_list directly; use the wrapper
+- functions instead. Note that working with these lists might require spinlock
+- protection. */
+-static struct list_head urb_list[NBR_OF_EPIDS];
++/* 0 = No ports enabled
++ 1 = Only port 1 enabled (on board ethernet on devboard)
++ 2 = Only port 2 enabled (external connector on devboard)
++ 3 = Both ports enabled
++*/
++static unsigned int ports = 3;
++module_param(ports, uint, S_IRUGO);
++MODULE_PARM_DESC(ports, "Bitmask indicating USB ports to use");
+
+-/* Read about the need and usage of this lock in submit_ctrl_urb. */
+-static spinlock_t urb_list_lock;
+
+-/* Used when unlinking asynchronously. */
+-static struct list_head urb_unlink_list;
++/***************************************************************************/
++/***************************************************************************/
++/* Shared global variables for this module */
++/***************************************************************************/
++/***************************************************************************/
+
+-/* for returning string descriptors in UTF-16LE */
+-static int ascii2utf (char *ascii, __u8 *utf, int utfmax)
+-{
+- int retval;
++/* EP descriptor lists for non period transfers. Must be 32-bit aligned. */
++static volatile struct USB_EP_Desc TxBulkEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
+
+- for (retval = 0; *ascii && utfmax > 1; utfmax -= 2, retval += 2) {
+- *utf++ = *ascii++ & 0x7f;
+- *utf++ = 0;
+- }
+- return retval;
+-}
++static volatile struct USB_EP_Desc TxCtrlEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
+
+-static int usb_root_hub_string (int id, int serial, char *type, __u8 *data, int len)
+-{
+- char buf [30];
++/* EP descriptor lists for period transfers. Must be 32-bit aligned. */
++static volatile struct USB_EP_Desc TxIntrEPList[MAX_INTR_INTERVAL] __attribute__ ((aligned (4)));
++static volatile struct USB_SB_Desc TxIntrSB_zout __attribute__ ((aligned (4)));
+
+- // assert (len > (2 * (sizeof (buf) + 1)));
+- // assert (strlen (type) <= 8);
++static volatile struct USB_EP_Desc TxIsocEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
++static volatile struct USB_SB_Desc TxIsocSB_zout __attribute__ ((aligned (4)));
+
+- // language ids
+- if (id == 0) {
+- *data++ = 4; *data++ = 3; /* 4 bytes data */
+- *data++ = 0; *data++ = 0; /* some language id */
+- return 4;
+-
+- // serial number
+- } else if (id == 1) {
+- sprintf (buf, "%x", serial);
+-
+- // product description
+- } else if (id == 2) {
+- sprintf (buf, "USB %s Root Hub", type);
+-
+- // id 3 == vendor description
+-
+- // unsupported IDs --> "stall"
+- } else
+- return 0;
+-
+- data [0] = 2 + ascii2utf (buf, data + 2, len - 2);
+- data [1] = 3;
+- return data [0];
+-}
++static volatile struct USB_SB_Desc TxIsocSBList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
+
+-/* Wrappers around the list functions (include/linux/list.h). */
++/* After each enabled bulk EP IN we put two disabled EP descriptors with the eol flag set,
++ causing the DMA to stop the DMA channel. The first of these two has the intr flag set, which
++ gives us a dma8_sub0_descr interrupt. When we receive this, we advance the DMA one step in the
++ EP list and then restart the bulk channel, thus forcing a switch between bulk EP descriptors
++ in each frame. */
++static volatile struct USB_EP_Desc TxBulkDummyEPList[NBR_OF_EPIDS][2] __attribute__ ((aligned (4)));
+
+-static inline int urb_list_empty(int epid)
++/* List of URB pointers, where each points to the active URB for a epid.
++ For Bulk, Ctrl and Intr this means which URB that currently is added to
++ DMA lists (Isoc URBs are all directly added to DMA lists). As soon as
++ URB has completed is the queue examined and the first URB in queue is
++ removed and moved to the activeUrbList while its state change to STARTED and
++ its transfer(s) gets added to DMA list (exception Isoc where URBs enter
++ state STARTED directly and added transfers added to DMA lists). */
++static struct urb *activeUrbList[NBR_OF_EPIDS];
++
++/* Additional software state info for each epid */
++static struct etrax_epid epid_state[NBR_OF_EPIDS];
++
++/* Timer handles for bulk traffic timer used to avoid DMA bug where DMA stops
++ even if there is new data waiting to be processed */
++static struct timer_list bulk_start_timer = TIMER_INITIALIZER(NULL, 0, 0);
++static struct timer_list bulk_eot_timer = TIMER_INITIALIZER(NULL, 0, 0);
++
++/* We want the start timer to expire before the eot timer, because the former
++ might start traffic, thus making it unnecessary for the latter to time
++ out. */
++#define BULK_START_TIMER_INTERVAL (HZ/50) /* 20 ms */
++#define BULK_EOT_TIMER_INTERVAL (HZ/16) /* 60 ms */
++
++/* Delay before a URB completion happen when it's scheduled to be delayed */
++#define LATER_TIMER_DELAY (HZ/50) /* 20 ms */
++
++/* Simplifying macros for checking software state info of a epid */
++/* ----------------------------------------------------------------------- */
++#define epid_inuse(epid) epid_state[epid].inuse
++#define epid_out_traffic(epid) epid_state[epid].out_traffic
++#define epid_isoc(epid) (epid_state[epid].type == PIPE_ISOCHRONOUS ? 1 : 0)
++#define epid_intr(epid) (epid_state[epid].type == PIPE_INTERRUPT ? 1 : 0)
++
++
++/***************************************************************************/
++/***************************************************************************/
++/* DEBUG FUNCTIONS */
++/***************************************************************************/
++/***************************************************************************/
++/* Note that these functions are always available in their "__" variants,
++ for use in error situations. The "__" missing variants are controlled by
++ the USB_DEBUG_DESC/USB_DEBUG_URB macros. */
++static void __dump_urb(struct urb* purb)
+ {
+- return list_empty(&urb_list[epid]);
++ struct crisv10_urb_priv *urb_priv = purb->hcpriv;
++ int urb_num = -1;
++ if(urb_priv) {
++ urb_num = urb_priv->urb_num;
++ }
++ printk("\nURB:0x%x[%d]\n", (unsigned int)purb, urb_num);
++ printk("dev :0x%08lx\n", (unsigned long)purb->dev);
++ printk("pipe :0x%08x\n", purb->pipe);
++ printk("status :%d\n", purb->status);
++ printk("transfer_flags :0x%08x\n", purb->transfer_flags);
++ printk("transfer_buffer :0x%08lx\n", (unsigned long)purb->transfer_buffer);
++ printk("transfer_buffer_length:%d\n", purb->transfer_buffer_length);
++ printk("actual_length :%d\n", purb->actual_length);
++ printk("setup_packet :0x%08lx\n", (unsigned long)purb->setup_packet);
++ printk("start_frame :%d\n", purb->start_frame);
++ printk("number_of_packets :%d\n", purb->number_of_packets);
++ printk("interval :%d\n", purb->interval);
++ printk("error_count :%d\n", purb->error_count);
++ printk("context :0x%08lx\n", (unsigned long)purb->context);
++ printk("complete :0x%08lx\n\n", (unsigned long)purb->complete);
++}
++
++static void __dump_in_desc(volatile struct USB_IN_Desc *in)
++{
++ printk("\nUSB_IN_Desc at 0x%08lx\n", (unsigned long)in);
++ printk(" sw_len : 0x%04x (%d)\n", in->sw_len, in->sw_len);
++ printk(" command : 0x%04x\n", in->command);
++ printk(" next : 0x%08lx\n", in->next);
++ printk(" buf : 0x%08lx\n", in->buf);
++ printk(" hw_len : 0x%04x (%d)\n", in->hw_len, in->hw_len);
++ printk(" status : 0x%04x\n\n", in->status);
++}
++
++static void __dump_sb_desc(volatile struct USB_SB_Desc *sb)
++{
++ char tt = (sb->command & 0x30) >> 4;
++ char *tt_string;
++
++ switch (tt) {
++ case 0:
++ tt_string = "zout";
++ break;
++ case 1:
++ tt_string = "in";
++ break;
++ case 2:
++ tt_string = "out";
++ break;
++ case 3:
++ tt_string = "setup";
++ break;
++ default:
++ tt_string = "unknown (weird)";
++ }
++
++ printk(" USB_SB_Desc at 0x%08lx ", (unsigned long)sb);
++ printk(" command:0x%04x (", sb->command);
++ printk("rem:%d ", (sb->command & 0x3f00) >> 8);
++ printk("full:%d ", (sb->command & 0x40) >> 6);
++ printk("tt:%d(%s) ", tt, tt_string);
++ printk("intr:%d ", (sb->command & 0x8) >> 3);
++ printk("eot:%d ", (sb->command & 0x2) >> 1);
++ printk("eol:%d)", sb->command & 0x1);
++ printk(" sw_len:0x%04x(%d)", sb->sw_len, sb->sw_len);
++ printk(" next:0x%08lx", sb->next);
++ printk(" buf:0x%08lx\n", sb->buf);
++}
++
++
++static void __dump_ep_desc(volatile struct USB_EP_Desc *ep)
++{
++ printk("USB_EP_Desc at 0x%08lx ", (unsigned long)ep);
++ printk(" command:0x%04x (", ep->command);
++ printk("ep_id:%d ", (ep->command & 0x1f00) >> 8);
++ printk("enable:%d ", (ep->command & 0x10) >> 4);
++ printk("intr:%d ", (ep->command & 0x8) >> 3);
++ printk("eof:%d ", (ep->command & 0x2) >> 1);
++ printk("eol:%d)", ep->command & 0x1);
++ printk(" hw_len:0x%04x(%d)", ep->hw_len, ep->hw_len);
++ printk(" next:0x%08lx", ep->next);
++ printk(" sub:0x%08lx\n", ep->sub);
+ }
+
+-/* Returns first urb for this epid, or NULL if list is empty. */
+-static inline struct urb *urb_list_first(int epid)
++static inline void __dump_ep_list(int pipe_type)
+ {
+- struct urb *first_urb = 0;
++ volatile struct USB_EP_Desc *ep;
++ volatile struct USB_EP_Desc *first_ep;
++ volatile struct USB_SB_Desc *sb;
++
++ switch (pipe_type)
++ {
++ case PIPE_BULK:
++ first_ep = &TxBulkEPList[0];
++ break;
++ case PIPE_CONTROL:
++ first_ep = &TxCtrlEPList[0];
++ break;
++ case PIPE_INTERRUPT:
++ first_ep = &TxIntrEPList[0];
++ break;
++ case PIPE_ISOCHRONOUS:
++ first_ep = &TxIsocEPList[0];
++ break;
++ default:
++ warn("Cannot dump unknown traffic type");
++ return;
++ }
++ ep = first_ep;
++
++ printk("\n\nDumping EP list...\n\n");
++
++ do {
++ __dump_ep_desc(ep);
++ /* Cannot phys_to_virt on 0 as it turns into 80000000, which is != 0. */
++ sb = ep->sub ? phys_to_virt(ep->sub) : 0;
++ while (sb) {
++ __dump_sb_desc(sb);
++ sb = sb->next ? phys_to_virt(sb->next) : 0;
++ }
++ ep = (volatile struct USB_EP_Desc *)(phys_to_virt(ep->next));
+
+- if (!urb_list_empty(epid)) {
+- /* Get the first urb (i.e. head->next). */
+- urb_entry_t *urb_entry = list_entry((&urb_list[epid])->next, urb_entry_t, list);
+- first_urb = urb_entry->urb;
+- }
+- return first_urb;
++ } while (ep != first_ep);
+ }
+
+-/* Adds an urb_entry last in the list for this epid. */
+-static inline void urb_list_add(struct urb *urb, int epid)
++static inline void __dump_ept_data(int epid)
+ {
+- urb_entry_t *urb_entry = (urb_entry_t *)kmalloc(sizeof(urb_entry_t), KMALLOC_FLAG);
+- assert(urb_entry);
++ unsigned long flags;
++ __u32 r_usb_ept_data;
+
+- urb_entry->urb = urb;
+- list_add_tail(&urb_entry->list, &urb_list[epid]);
++ if (epid < 0 || epid > 31) {
++ printk("Cannot dump ept data for invalid epid %d\n", epid);
++ return;
++ }
++
++ local_irq_save(flags);
++ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
++ nop();
++ r_usb_ept_data = *R_USB_EPT_DATA;
++ local_irq_restore(flags);
++
++ printk(" R_USB_EPT_DATA = 0x%x for epid %d :\n", r_usb_ept_data, epid);
++ if (r_usb_ept_data == 0) {
++ /* No need for more detailed printing. */
++ return;
++ }
++ printk(" valid : %d\n", (r_usb_ept_data & 0x80000000) >> 31);
++ printk(" hold : %d\n", (r_usb_ept_data & 0x40000000) >> 30);
++ printk(" error_count_in : %d\n", (r_usb_ept_data & 0x30000000) >> 28);
++ printk(" t_in : %d\n", (r_usb_ept_data & 0x08000000) >> 27);
++ printk(" low_speed : %d\n", (r_usb_ept_data & 0x04000000) >> 26);
++ printk(" port : %d\n", (r_usb_ept_data & 0x03000000) >> 24);
++ printk(" error_code : %d\n", (r_usb_ept_data & 0x00c00000) >> 22);
++ printk(" t_out : %d\n", (r_usb_ept_data & 0x00200000) >> 21);
++ printk(" error_count_out : %d\n", (r_usb_ept_data & 0x00180000) >> 19);
++ printk(" max_len : %d\n", (r_usb_ept_data & 0x0003f800) >> 11);
++ printk(" ep : %d\n", (r_usb_ept_data & 0x00000780) >> 7);
++ printk(" dev : %d\n", (r_usb_ept_data & 0x0000003f));
++}
++
++static inline void __dump_ept_data_iso(int epid)
++{
++ unsigned long flags;
++ __u32 ept_data;
++
++ if (epid < 0 || epid > 31) {
++ printk("Cannot dump ept data for invalid epid %d\n", epid);
++ return;
++ }
++
++ local_irq_save(flags);
++ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
++ nop();
++ ept_data = *R_USB_EPT_DATA_ISO;
++ local_irq_restore(flags);
++
++ printk(" R_USB_EPT_DATA = 0x%x for epid %d :\n", ept_data, epid);
++ if (ept_data == 0) {
++ /* No need for more detailed printing. */
++ return;
++ }
++ printk(" valid : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, valid,
++ ept_data));
++ printk(" port : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, port,
++ ept_data));
++ printk(" error_code : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, error_code,
++ ept_data));
++ printk(" max_len : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, max_len,
++ ept_data));
++ printk(" ep : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, ep,
++ ept_data));
++ printk(" dev : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, dev,
++ ept_data));
+ }
+
+-/* Search through the list for an element that contains this urb. (The list
+- is expected to be short and the one we are about to delete will often be
+- the first in the list.) */
+-static inline urb_entry_t *__urb_list_entry(struct urb *urb, int epid)
++static inline void __dump_ept_data_list(void)
+ {
+- struct list_head *entry;
+- struct list_head *tmp;
+- urb_entry_t *urb_entry;
+-
+- list_for_each_safe(entry, tmp, &urb_list[epid]) {
+- urb_entry = list_entry(entry, urb_entry_t, list);
+- assert(urb_entry);
+- assert(urb_entry->urb);
+-
+- if (urb_entry->urb == urb) {
+- return urb_entry;
+- }
+- }
+- return 0;
+-}
++ int i;
+
+-/* Delete an urb from the list. */
+-static inline void urb_list_del(struct urb *urb, int epid)
+-{
+- urb_entry_t *urb_entry = __urb_list_entry(urb, epid);
+- assert(urb_entry);
++ printk("Dumping the whole R_USB_EPT_DATA list\n");
+
+- /* Delete entry and free. */
+- list_del(&urb_entry->list);
+- kfree(urb_entry);
++ for (i = 0; i < 32; i++) {
++ __dump_ept_data(i);
++ }
++}
++
++static void debug_epid(int epid) {
++ int i;
++
++ if(epid_isoc(epid)) {
++ __dump_ept_data_iso(epid);
++ } else {
++ __dump_ept_data(epid);
++ }
++
++ printk("Bulk:\n");
++ for(i = 0; i < 32; i++) {
++ if(IO_EXTRACT(USB_EP_command, epid, TxBulkEPList[i].command) ==
++ epid) {
++ printk("%d: ", i); __dump_ep_desc(&(TxBulkEPList[i]));
++ }
++ }
++
++ printk("Ctrl:\n");
++ for(i = 0; i < 32; i++) {
++ if(IO_EXTRACT(USB_EP_command, epid, TxCtrlEPList[i].command) ==
++ epid) {
++ printk("%d: ", i); __dump_ep_desc(&(TxCtrlEPList[i]));
++ }
++ }
++
++ printk("Intr:\n");
++ for(i = 0; i < MAX_INTR_INTERVAL; i++) {
++ if(IO_EXTRACT(USB_EP_command, epid, TxIntrEPList[i].command) ==
++ epid) {
++ printk("%d: ", i); __dump_ep_desc(&(TxIntrEPList[i]));
++ }
++ }
++
++ printk("Isoc:\n");
++ for(i = 0; i < 32; i++) {
++ if(IO_EXTRACT(USB_EP_command, epid, TxIsocEPList[i].command) ==
++ epid) {
++ printk("%d: ", i); __dump_ep_desc(&(TxIsocEPList[i]));
++ }
++ }
++
++ __dump_ept_data_list();
++ __dump_ep_list(PIPE_INTERRUPT);
++ printk("\n\n");
++}
++
++
++
++char* hcd_status_to_str(__u8 bUsbStatus) {
++ static char hcd_status_str[128];
++ hcd_status_str[0] = '\0';
++ if(bUsbStatus & IO_STATE(R_USB_STATUS, ourun, yes)) {
++ strcat(hcd_status_str, "ourun ");
++ }
++ if(bUsbStatus & IO_STATE(R_USB_STATUS, perror, yes)) {
++ strcat(hcd_status_str, "perror ");
++ }
++ if(bUsbStatus & IO_STATE(R_USB_STATUS, device_mode, yes)) {
++ strcat(hcd_status_str, "device_mode ");
++ }
++ if(bUsbStatus & IO_STATE(R_USB_STATUS, host_mode, yes)) {
++ strcat(hcd_status_str, "host_mode ");
++ }
++ if(bUsbStatus & IO_STATE(R_USB_STATUS, started, yes)) {
++ strcat(hcd_status_str, "started ");
++ }
++ if(bUsbStatus & IO_STATE(R_USB_STATUS, running, yes)) {
++ strcat(hcd_status_str, "running ");
++ }
++ return hcd_status_str;
++}
++
++
++char* sblist_to_str(struct USB_SB_Desc* sb_desc) {
++ static char sblist_to_str_buff[128];
++ char tmp[32], tmp2[32];
++ sblist_to_str_buff[0] = '\0';
++ while(sb_desc != NULL) {
++ switch(IO_EXTRACT(USB_SB_command, tt, sb_desc->command)) {
++ case 0: sprintf(tmp, "zout"); break;
++ case 1: sprintf(tmp, "in"); break;
++ case 2: sprintf(tmp, "out"); break;
++ case 3: sprintf(tmp, "setup"); break;
++ }
++ sprintf(tmp2, "(%s %d)", tmp, sb_desc->sw_len);
++ strcat(sblist_to_str_buff, tmp2);
++ if(sb_desc->next != 0) {
++ sb_desc = phys_to_virt(sb_desc->next);
++ } else {
++ sb_desc = NULL;
++ }
++ }
++ return sblist_to_str_buff;
++}
++
++char* port_status_to_str(__u16 wPortStatus) {
++ static char port_status_str[128];
++ port_status_str[0] = '\0';
++ if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, connected, yes)) {
++ strcat(port_status_str, "connected ");
++ }
++ if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, yes)) {
++ strcat(port_status_str, "enabled ");
++ }
++ if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, suspended, yes)) {
++ strcat(port_status_str, "suspended ");
++ }
++ if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, reset, yes)) {
++ strcat(port_status_str, "reset ");
++ }
++ if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, speed, full)) {
++ strcat(port_status_str, "full-speed ");
++ } else {
++ strcat(port_status_str, "low-speed ");
++ }
++ return port_status_str;
++}
++
++
++char* endpoint_to_str(struct usb_endpoint_descriptor *ed) {
++ static char endpoint_to_str_buff[128];
++ char tmp[32];
++ int epnum = ed->bEndpointAddress & 0x0F;
++ int dir = ed->bEndpointAddress & 0x80;
++ int type = ed->bmAttributes & 0x03;
++ endpoint_to_str_buff[0] = '\0';
++ sprintf(endpoint_to_str_buff, "ep:%d ", epnum);
++ switch(type) {
++ case 0:
++ sprintf(tmp, " ctrl");
++ break;
++ case 1:
++ sprintf(tmp, " isoc");
++ break;
++ case 2:
++ sprintf(tmp, " bulk");
++ break;
++ case 3:
++ sprintf(tmp, " intr");
++ break;
++ }
++ strcat(endpoint_to_str_buff, tmp);
++ if(dir) {
++ sprintf(tmp, " in");
++ } else {
++ sprintf(tmp, " out");
++ }
++ strcat(endpoint_to_str_buff, tmp);
++
++ return endpoint_to_str_buff;
++}
++
++/* Debug helper functions for Transfer Controller */
++char* pipe_to_str(unsigned int pipe) {
++ static char pipe_to_str_buff[128];
++ char tmp[64];
++ sprintf(pipe_to_str_buff, "dir:%s", str_dir(pipe));
++ sprintf(tmp, " type:%s", str_type(pipe));
++ strcat(pipe_to_str_buff, tmp);
++
++ sprintf(tmp, " dev:%d", usb_pipedevice(pipe));
++ strcat(pipe_to_str_buff, tmp);
++ sprintf(tmp, " ep:%d", usb_pipeendpoint(pipe));
++ strcat(pipe_to_str_buff, tmp);
++ return pipe_to_str_buff;
+ }
+
+-/* Move an urb to the end of the list. */
+-static inline void urb_list_move_last(struct urb *urb, int epid)
+-{
+- urb_entry_t *urb_entry = __urb_list_entry(urb, epid);
+- assert(urb_entry);
+-
+- list_move_tail(&urb_entry->list, &urb_list[epid]);
+-}
+
+-/* Get the next urb in the list. */
+-static inline struct urb *urb_list_next(struct urb *urb, int epid)
+-{
+- urb_entry_t *urb_entry = __urb_list_entry(urb, epid);
++#define USB_DEBUG_DESC 1
+
+- assert(urb_entry);
++#ifdef USB_DEBUG_DESC
++#define dump_in_desc(x) __dump_in_desc(x)
++#define dump_sb_desc(...) __dump_sb_desc(...)
++#define dump_ep_desc(x) __dump_ep_desc(x)
++#define dump_ept_data(x) __dump_ept_data(x)
++#else
++#define dump_in_desc(...) do {} while (0)
++#define dump_sb_desc(...) do {} while (0)
++#define dump_ep_desc(...) do {} while (0)
++#endif
+
+- if (urb_entry->list.next != &urb_list[epid]) {
+- struct list_head *elem = urb_entry->list.next;
+- urb_entry = list_entry(elem, urb_entry_t, list);
+- return urb_entry->urb;
+- } else {
+- return NULL;
+- }
+-}
+
++/* Uncomment this to enable massive function call trace
++ #define USB_DEBUG_TRACE */
+
++#ifdef USB_DEBUG_TRACE
++#define DBFENTER (printk(": Entering: %s\n", __FUNCTION__))
++#define DBFEXIT (printk(": Exiting: %s\n", __FUNCTION__))
++#else
++#define DBFENTER do {} while (0)
++#define DBFEXIT do {} while (0)
++#endif
+
+-/* For debug purposes only. */
+-static inline void urb_list_dump(int epid)
+-{
+- struct list_head *entry;
+- struct list_head *tmp;
+- urb_entry_t *urb_entry;
+- int i = 0;
+-
+- info("Dumping urb list for epid %d", epid);
+-
+- list_for_each_safe(entry, tmp, &urb_list[epid]) {
+- urb_entry = list_entry(entry, urb_entry_t, list);
+- info(" entry %d, urb = 0x%lx", i, (unsigned long)urb_entry->urb);
+- }
+-}
++#define CHECK_ALIGN(x) if (((__u32)(x)) & 0x00000003) \
++{panic("Alignment check (DWORD) failed at %s:%s:%d\n", __FILE__, __FUNCTION__, __LINE__);}
+
+-static void init_rx_buffers(void);
+-static int etrax_rh_unlink_urb(struct urb *urb);
+-static void etrax_rh_send_irq(struct urb *urb);
+-static void etrax_rh_init_int_timer(struct urb *urb);
+-static void etrax_rh_int_timer_do(unsigned long ptr);
+-
+-static int etrax_usb_setup_epid(struct urb *urb);
+-static int etrax_usb_lookup_epid(struct urb *urb);
+-static int etrax_usb_allocate_epid(void);
+-static void etrax_usb_free_epid(int epid);
+-
+-static int etrax_remove_from_sb_list(struct urb *urb);
+-
+-static void* etrax_usb_buffer_alloc(struct usb_bus* bus, size_t size,
+- unsigned mem_flags, dma_addr_t *dma);
+-static void etrax_usb_buffer_free(struct usb_bus *bus, size_t size, void *addr, dma_addr_t dma);
+-
+-static void etrax_usb_add_to_bulk_sb_list(struct urb *urb, int epid);
+-static void etrax_usb_add_to_ctrl_sb_list(struct urb *urb, int epid);
+-static void etrax_usb_add_to_intr_sb_list(struct urb *urb, int epid);
+-static void etrax_usb_add_to_isoc_sb_list(struct urb *urb, int epid);
+-
+-static int etrax_usb_submit_bulk_urb(struct urb *urb);
+-static int etrax_usb_submit_ctrl_urb(struct urb *urb);
+-static int etrax_usb_submit_intr_urb(struct urb *urb);
+-static int etrax_usb_submit_isoc_urb(struct urb *urb);
+-
+-static int etrax_usb_submit_urb(struct urb *urb, unsigned mem_flags);
+-static int etrax_usb_unlink_urb(struct urb *urb, int status);
+-static int etrax_usb_get_frame_number(struct usb_device *usb_dev);
+-
+-static irqreturn_t etrax_usb_tx_interrupt(int irq, void *vhc);
+-static irqreturn_t etrax_usb_rx_interrupt(int irq, void *vhc);
+-static irqreturn_t etrax_usb_hc_interrupt_top_half(int irq, void *vhc);
+-static void etrax_usb_hc_interrupt_bottom_half(void *data);
+-
+-static void etrax_usb_isoc_descr_interrupt_bottom_half(void *data);
+-
+-
+-/* The following is a list of interrupt handlers for the host controller interrupts we use.
+- They are called from etrax_usb_hc_interrupt_bottom_half. */
+-static void etrax_usb_hc_isoc_eof_interrupt(void);
+-static void etrax_usb_hc_bulk_eot_interrupt(int timer_induced);
+-static void etrax_usb_hc_epid_attn_interrupt(usb_interrupt_registers_t *reg);
+-static void etrax_usb_hc_port_status_interrupt(usb_interrupt_registers_t *reg);
+-static void etrax_usb_hc_ctl_status_interrupt(usb_interrupt_registers_t *reg);
+-
+-static int etrax_rh_submit_urb (struct urb *urb);
+-
+-/* Forward declaration needed because they are used in the rx interrupt routine. */
+-static void etrax_usb_complete_urb(struct urb *urb, int status);
+-static void etrax_usb_complete_bulk_urb(struct urb *urb, int status);
+-static void etrax_usb_complete_ctrl_urb(struct urb *urb, int status);
+-static void etrax_usb_complete_intr_urb(struct urb *urb, int status);
+-static void etrax_usb_complete_isoc_urb(struct urb *urb, int status);
++/* Most helpful debugging aid */
++#define ASSERT(expr) ((void) ((expr) ? 0 : (err("assert failed at: %s %d",__FUNCTION__, __LINE__))))
+
+-static int etrax_usb_hc_init(void);
+-static void etrax_usb_hc_cleanup(void);
+
+-static struct usb_operations etrax_usb_device_operations =
+-{
+- .get_frame_number = etrax_usb_get_frame_number,
+- .submit_urb = etrax_usb_submit_urb,
+- .unlink_urb = etrax_usb_unlink_urb,
+- .buffer_alloc = etrax_usb_buffer_alloc,
+- .buffer_free = etrax_usb_buffer_free
+-};
++/***************************************************************************/
++/***************************************************************************/
++/* Forward declarations */
++/***************************************************************************/
++/***************************************************************************/
++void crisv10_hcd_epid_attn_irq(struct crisv10_irq_reg *reg);
++void crisv10_hcd_port_status_irq(struct crisv10_irq_reg *reg);
++void crisv10_hcd_ctl_status_irq(struct crisv10_irq_reg *reg);
++void crisv10_hcd_isoc_eof_irq(struct crisv10_irq_reg *reg);
++
++void rh_port_status_change(__u16[]);
++int rh_clear_port_feature(__u8, __u16);
++int rh_set_port_feature(__u8, __u16);
++static void rh_disable_port(unsigned int port);
++
++static void check_finished_bulk_tx_epids(struct usb_hcd *hcd,
++ int timer);
++
++static int tc_setup_epid(struct usb_host_endpoint *ep, struct urb *urb,
++ int mem_flags);
++static void tc_free_epid(struct usb_host_endpoint *ep);
++static int tc_allocate_epid(void);
++static void tc_finish_urb(struct usb_hcd *hcd, struct urb *urb, int status);
++static void tc_finish_urb_later(struct usb_hcd *hcd, struct urb *urb,
++ int status);
++
++static int urb_priv_create(struct usb_hcd *hcd, struct urb *urb, int epid,
++ int mem_flags);
++static void urb_priv_free(struct usb_hcd *hcd, struct urb *urb);
++
++static inline struct urb *urb_list_first(int epid);
++static inline void urb_list_add(struct urb *urb, int epid,
++ int mem_flags);
++static inline urb_entry_t *urb_list_entry(struct urb *urb, int epid);
++static inline void urb_list_del(struct urb *urb, int epid);
++static inline void urb_list_move_last(struct urb *urb, int epid);
++static inline struct urb *urb_list_next(struct urb *urb, int epid);
++
++int create_sb_for_urb(struct urb *urb, int mem_flags);
++int init_intr_urb(struct urb *urb, int mem_flags);
++
++static inline void etrax_epid_set(__u8 index, __u32 data);
++static inline void etrax_epid_clear_error(__u8 index);
++static inline void etrax_epid_set_toggle(__u8 index, __u8 dirout,
++ __u8 toggle);
++static inline __u8 etrax_epid_get_toggle(__u8 index, __u8 dirout);
++static inline __u32 etrax_epid_get(__u8 index);
++
++/* We're accessing the same register position in Etrax so
++ when we do full access the internal difference doesn't matter */
++#define etrax_epid_iso_set(index, data) etrax_epid_set(index, data)
++#define etrax_epid_iso_get(index) etrax_epid_get(index)
++
++
++static void tc_dma_process_isoc_urb(struct urb *urb);
++static void tc_dma_process_queue(int epid);
++static void tc_dma_unlink_intr_urb(struct urb *urb);
++static irqreturn_t tc_dma_tx_interrupt(int irq, void *vhc);
++static irqreturn_t tc_dma_rx_interrupt(int irq, void *vhc);
++
++static void tc_bulk_start_timer_func(unsigned long dummy);
++static void tc_bulk_eot_timer_func(unsigned long dummy);
++
++
++/*************************************************************/
++/*************************************************************/
++/* Host Controler Driver block */
++/*************************************************************/
++/*************************************************************/
++
++/* HCD operations */
++static irqreturn_t crisv10_hcd_top_irq(int irq, void*);
++static int crisv10_hcd_reset(struct usb_hcd *);
++static int crisv10_hcd_start(struct usb_hcd *);
++static void crisv10_hcd_stop(struct usb_hcd *);
++#ifdef CONFIG_PM
++static int crisv10_hcd_suspend(struct device *, u32, u32);
++static int crisv10_hcd_resume(struct device *, u32);
++#endif /* CONFIG_PM */
++static int crisv10_hcd_get_frame(struct usb_hcd *);
++
++static int tc_urb_enqueue(struct usb_hcd *, struct usb_host_endpoint *ep, struct urb *, gfp_t mem_flags);
++static int tc_urb_dequeue(struct usb_hcd *, struct urb *);
++static void tc_endpoint_disable(struct usb_hcd *, struct usb_host_endpoint *ep);
++
++static int rh_status_data_request(struct usb_hcd *, char *);
++static int rh_control_request(struct usb_hcd *, u16, u16, u16, char*, u16);
++
++#ifdef CONFIG_PM
++static int crisv10_hcd_hub_suspend(struct usb_hcd *);
++static int crisv10_hcd_hub_resume(struct usb_hcd *);
++#endif /* CONFIG_PM */
++#ifdef CONFIG_USB_OTG
++static int crisv10_hcd_start_port_reset(struct usb_hcd *, unsigned);
++#endif /* CONFIG_USB_OTG */
++
++/* host controller driver interface */
++static const struct hc_driver crisv10_hc_driver =
++ {
++ .description = hc_name,
++ .product_desc = product_desc,
++ .hcd_priv_size = sizeof(struct crisv10_hcd),
++
++ /* Attaching IRQ handler manualy in probe() */
++ /* .irq = crisv10_hcd_irq, */
++
++ .flags = HCD_USB11,
++
++ /* called to init HCD and root hub */
++ .reset = crisv10_hcd_reset,
++ .start = crisv10_hcd_start,
++
++ /* cleanly make HCD stop writing memory and doing I/O */
++ .stop = crisv10_hcd_stop,
++
++ /* return current frame number */
++ .get_frame_number = crisv10_hcd_get_frame,
++
++
++ /* Manage i/o requests via the Transfer Controller */
++ .urb_enqueue = tc_urb_enqueue,
++ .urb_dequeue = tc_urb_dequeue,
++
++ /* hw synch, freeing endpoint resources that urb_dequeue can't */
++ .endpoint_disable = tc_endpoint_disable,
++
++
++ /* Root Hub support */
++ .hub_status_data = rh_status_data_request,
++ .hub_control = rh_control_request,
++#ifdef CONFIG_PM
++ .hub_suspend = rh_suspend_request,
++ .hub_resume = rh_resume_request,
++#endif /* CONFIG_PM */
++#ifdef CONFIG_USB_OTG
++ .start_port_reset = crisv10_hcd_start_port_reset,
++#endif /* CONFIG_USB_OTG */
++ };
+
+-/* Note that these functions are always available in their "__" variants, for use in
+- error situations. The "__" missing variants are controlled by the USB_DEBUG_DESC/
+- USB_DEBUG_URB macros. */
+-static void __dump_urb(struct urb* purb)
+-{
+- printk("\nurb :0x%08lx\n", (unsigned long)purb);
+- printk("dev :0x%08lx\n", (unsigned long)purb->dev);
+- printk("pipe :0x%08x\n", purb->pipe);
+- printk("status :%d\n", purb->status);
+- printk("transfer_flags :0x%08x\n", purb->transfer_flags);
+- printk("transfer_buffer :0x%08lx\n", (unsigned long)purb->transfer_buffer);
+- printk("transfer_buffer_length:%d\n", purb->transfer_buffer_length);
+- printk("actual_length :%d\n", purb->actual_length);
+- printk("setup_packet :0x%08lx\n", (unsigned long)purb->setup_packet);
+- printk("start_frame :%d\n", purb->start_frame);
+- printk("number_of_packets :%d\n", purb->number_of_packets);
+- printk("interval :%d\n", purb->interval);
+- printk("error_count :%d\n", purb->error_count);
+- printk("context :0x%08lx\n", (unsigned long)purb->context);
+- printk("complete :0x%08lx\n\n", (unsigned long)purb->complete);
+-}
+
+-static void __dump_in_desc(volatile USB_IN_Desc_t *in)
+-{
+- printk("\nUSB_IN_Desc at 0x%08lx\n", (unsigned long)in);
+- printk(" sw_len : 0x%04x (%d)\n", in->sw_len, in->sw_len);
+- printk(" command : 0x%04x\n", in->command);
+- printk(" next : 0x%08lx\n", in->next);
+- printk(" buf : 0x%08lx\n", in->buf);
+- printk(" hw_len : 0x%04x (%d)\n", in->hw_len, in->hw_len);
+- printk(" status : 0x%04x\n\n", in->status);
+-}
++/*
++ * conversion between pointers to a hcd and the corresponding
++ * crisv10_hcd
++ */
+
+-static void __dump_sb_desc(volatile USB_SB_Desc_t *sb)
++static inline struct crisv10_hcd *hcd_to_crisv10_hcd(struct usb_hcd *hcd)
+ {
+- char tt = (sb->command & 0x30) >> 4;
+- char *tt_string;
+-
+- switch (tt) {
+- case 0:
+- tt_string = "zout";
+- break;
+- case 1:
+- tt_string = "in";
+- break;
+- case 2:
+- tt_string = "out";
+- break;
+- case 3:
+- tt_string = "setup";
+- break;
+- default:
+- tt_string = "unknown (weird)";
+- }
+-
+- printk("\n USB_SB_Desc at 0x%08lx\n", (unsigned long)sb);
+- printk(" command : 0x%04x\n", sb->command);
+- printk(" rem : %d\n", (sb->command & 0x3f00) >> 8);
+- printk(" full : %d\n", (sb->command & 0x40) >> 6);
+- printk(" tt : %d (%s)\n", tt, tt_string);
+- printk(" intr : %d\n", (sb->command & 0x8) >> 3);
+- printk(" eot : %d\n", (sb->command & 0x2) >> 1);
+- printk(" eol : %d\n", sb->command & 0x1);
+- printk(" sw_len : 0x%04x (%d)\n", sb->sw_len, sb->sw_len);
+- printk(" next : 0x%08lx\n", sb->next);
+- printk(" buf : 0x%08lx\n\n", sb->buf);
++ return (struct crisv10_hcd *) hcd->hcd_priv;
+ }
+
+-
+-static void __dump_ep_desc(volatile USB_EP_Desc_t *ep)
++static inline struct usb_hcd *crisv10_hcd_to_hcd(struct crisv10_hcd *hcd)
+ {
+- printk("\nUSB_EP_Desc at 0x%08lx\n", (unsigned long)ep);
+- printk(" command : 0x%04x\n", ep->command);
+- printk(" ep_id : %d\n", (ep->command & 0x1f00) >> 8);
+- printk(" enable : %d\n", (ep->command & 0x10) >> 4);
+- printk(" intr : %d\n", (ep->command & 0x8) >> 3);
+- printk(" eof : %d\n", (ep->command & 0x2) >> 1);
+- printk(" eol : %d\n", ep->command & 0x1);
+- printk(" hw_len : 0x%04x (%d)\n", ep->hw_len, ep->hw_len);
+- printk(" next : 0x%08lx\n", ep->next);
+- printk(" sub : 0x%08lx\n\n", ep->sub);
++ return container_of((void *) hcd, struct usb_hcd, hcd_priv);
+ }
+
+-static inline void __dump_ep_list(int pipe_type)
++/* check if specified port is in use */
++static inline int port_in_use(unsigned int port)
+ {
+- volatile USB_EP_Desc_t *ep;
+- volatile USB_EP_Desc_t *first_ep;
+- volatile USB_SB_Desc_t *sb;
+-
+- switch (pipe_type)
+- {
+- case PIPE_BULK:
+- first_ep = &TxBulkEPList[0];
+- break;
+- case PIPE_CONTROL:
+- first_ep = &TxCtrlEPList[0];
+- break;
+- case PIPE_INTERRUPT:
+- first_ep = &TxIntrEPList[0];
+- break;
+- case PIPE_ISOCHRONOUS:
+- first_ep = &TxIsocEPList[0];
+- break;
+- default:
+- warn("Cannot dump unknown traffic type");
+- return;
+- }
+- ep = first_ep;
+-
+- printk("\n\nDumping EP list...\n\n");
+-
+- do {
+- __dump_ep_desc(ep);
+- /* Cannot phys_to_virt on 0 as it turns into 80000000, which is != 0. */
+- sb = ep->sub ? phys_to_virt(ep->sub) : 0;
+- while (sb) {
+- __dump_sb_desc(sb);
+- sb = sb->next ? phys_to_virt(sb->next) : 0;
+- }
+- ep = (volatile USB_EP_Desc_t *)(phys_to_virt(ep->next));
+-
+- } while (ep != first_ep);
++ return ports & (1 << port);
+ }
+
+-static inline void __dump_ept_data(int epid)
++/* number of ports in use */
++static inline unsigned int num_ports(void)
+ {
+- unsigned long flags;
+- __u32 r_usb_ept_data;
+-
+- if (epid < 0 || epid > 31) {
+- printk("Cannot dump ept data for invalid epid %d\n", epid);
+- return;
+- }
+-
+- save_flags(flags);
+- cli();
+- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
+- nop();
+- r_usb_ept_data = *R_USB_EPT_DATA;
+- restore_flags(flags);
+-
+- printk("\nR_USB_EPT_DATA = 0x%x for epid %d :\n", r_usb_ept_data, epid);
+- if (r_usb_ept_data == 0) {
+- /* No need for more detailed printing. */
+- return;
+- }
+- printk(" valid : %d\n", (r_usb_ept_data & 0x80000000) >> 31);
+- printk(" hold : %d\n", (r_usb_ept_data & 0x40000000) >> 30);
+- printk(" error_count_in : %d\n", (r_usb_ept_data & 0x30000000) >> 28);
+- printk(" t_in : %d\n", (r_usb_ept_data & 0x08000000) >> 27);
+- printk(" low_speed : %d\n", (r_usb_ept_data & 0x04000000) >> 26);
+- printk(" port : %d\n", (r_usb_ept_data & 0x03000000) >> 24);
+- printk(" error_code : %d\n", (r_usb_ept_data & 0x00c00000) >> 22);
+- printk(" t_out : %d\n", (r_usb_ept_data & 0x00200000) >> 21);
+- printk(" error_count_out : %d\n", (r_usb_ept_data & 0x00180000) >> 19);
+- printk(" max_len : %d\n", (r_usb_ept_data & 0x0003f800) >> 11);
+- printk(" ep : %d\n", (r_usb_ept_data & 0x00000780) >> 7);
+- printk(" dev : %d\n", (r_usb_ept_data & 0x0000003f));
++ unsigned int i, num = 0;
++ for (i = 0; i < USB_ROOT_HUB_PORTS; i++)
++ if (port_in_use(i))
++ num++;
++ return num;
+ }
+
+-static inline void __dump_ept_data_list(void)
++/* map hub port number to the port number used internally by the HC */
++static inline unsigned int map_port(unsigned int port)
+ {
+- int i;
+-
+- printk("Dumping the whole R_USB_EPT_DATA list\n");
+-
+- for (i = 0; i < 32; i++) {
+- __dump_ept_data(i);
+- }
++ unsigned int i, num = 0;
++ for (i = 0; i < USB_ROOT_HUB_PORTS; i++)
++ if (port_in_use(i))
++ if (++num == port)
++ return i;
++ return -1;
+ }
+-#ifdef USB_DEBUG_DESC
+-#define dump_in_desc(...) __dump_in_desc(...)
+-#define dump_sb_desc(...) __dump_sb_desc(...)
+-#define dump_ep_desc(...) __dump_ep_desc(...)
+-#else
+-#define dump_in_desc(...) do {} while (0)
+-#define dump_sb_desc(...) do {} while (0)
+-#define dump_ep_desc(...) do {} while (0)
+-#endif
+
+-#ifdef USB_DEBUG_URB
+-#define dump_urb(x) __dump_urb(x)
+-#else
+-#define dump_urb(x) do {} while (0)
++/* size of descriptors in slab cache */
++#ifndef MAX
++#define MAX(x, y) ((x) > (y) ? (x) : (y))
+ #endif
+
+-static void init_rx_buffers(void)
+-{
+- int i;
+
+- DBFENTER;
++/******************************************************************/
++/* Hardware Interrupt functions */
++/******************************************************************/
++
++/* Fast interrupt handler for HC */
++static irqreturn_t crisv10_hcd_top_irq(int irq, void *vcd)
++{
++ struct usb_hcd *hcd = vcd;
++ struct crisv10_irq_reg reg;
++ __u32 irq_mask;
++ unsigned long flags;
++
++ DBFENTER;
++
++ ASSERT(hcd != NULL);
++ reg.hcd = hcd;
++
++ /* Turn of other interrupts while handling these sensitive cases */
++ local_irq_save(flags);
++
++ /* Read out which interrupts that are flaged */
++ irq_mask = *R_USB_IRQ_MASK_READ;
++ reg.r_usb_irq_mask_read = irq_mask;
++
++ /* Reading R_USB_STATUS clears the ctl_status interrupt. Note that
++ R_USB_STATUS must be read before R_USB_EPID_ATTN since reading the latter
++ clears the ourun and perror fields of R_USB_STATUS. */
++ reg.r_usb_status = *R_USB_STATUS;
++
++ /* Reading R_USB_EPID_ATTN clears the iso_eof, bulk_eot and epid_attn
++ interrupts. */
++ reg.r_usb_epid_attn = *R_USB_EPID_ATTN;
++
++ /* Reading R_USB_RH_PORT_STATUS_1 and R_USB_RH_PORT_STATUS_2 clears the
++ port_status interrupt. */
++ reg.r_usb_rh_port_status_1 = *R_USB_RH_PORT_STATUS_1;
++ reg.r_usb_rh_port_status_2 = *R_USB_RH_PORT_STATUS_2;
++
++ /* Reading R_USB_FM_NUMBER clears the sof interrupt. */
++ /* Note: the lower 11 bits contain the actual frame number, sent with each
++ sof. */
++ reg.r_usb_fm_number = *R_USB_FM_NUMBER;
++
++ /* Interrupts are handled in order of priority. */
++ if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, port_status)) {
++ crisv10_hcd_port_status_irq(®);
++ }
++ if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, epid_attn)) {
++ crisv10_hcd_epid_attn_irq(®);
++ }
++ if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, ctl_status)) {
++ crisv10_hcd_ctl_status_irq(®);
++ }
++ if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, iso_eof)) {
++ crisv10_hcd_isoc_eof_irq(®);
++ }
++ if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, bulk_eot)) {
++ /* Update/restart the bulk start timer since obviously the channel is
++ running. */
++ mod_timer(&bulk_start_timer, jiffies + BULK_START_TIMER_INTERVAL);
++ /* Update/restart the bulk eot timer since we just received an bulk eot
++ interrupt. */
++ mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
++
++ /* Check for finished bulk transfers on epids */
++ check_finished_bulk_tx_epids(hcd, 0);
++ }
++ local_irq_restore(flags);
++
++ DBFEXIT;
++ return IRQ_HANDLED;
++}
++
++
++void crisv10_hcd_epid_attn_irq(struct crisv10_irq_reg *reg) {
++ struct usb_hcd *hcd = reg->hcd;
++ struct crisv10_urb_priv *urb_priv;
++ int epid;
++ DBFENTER;
++
++ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
++ if (test_bit(epid, (void *)®->r_usb_epid_attn)) {
++ struct urb *urb;
++ __u32 ept_data;
++ int error_code;
++
++ if (epid == DUMMY_EPID || epid == INVALID_EPID) {
++ /* We definitely don't care about these ones. Besides, they are
++ always disabled, so any possible disabling caused by the
++ epid attention interrupt is irrelevant. */
++ warn("Got epid_attn for INVALID_EPID or DUMMY_EPID (%d).", epid);
++ continue;
++ }
++
++ if(!epid_inuse(epid)) {
++ irq_err("Epid attention on epid:%d that isn't in use\n", epid);
++ printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
++ debug_epid(epid);
++ continue;
++ }
++
++ /* Note that although there are separate R_USB_EPT_DATA and
++ R_USB_EPT_DATA_ISO registers, they are located at the same address and
++ are of the same size. In other words, this read should be ok for isoc
++ also. */
++ ept_data = etrax_epid_get(epid);
++ error_code = IO_EXTRACT(R_USB_EPT_DATA, error_code, ept_data);
++
++ /* Get the active URB for this epid. We blatantly assume
++ that only this URB could have caused the epid attention. */
++ urb = activeUrbList[epid];
++ if (urb == NULL) {
++ irq_err("Attention on epid:%d error:%d with no active URB.\n",
++ epid, error_code);
++ printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
++ debug_epid(epid);
++ continue;
++ }
++
++ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
++ ASSERT(urb_priv);
++
++ /* Using IO_STATE_VALUE on R_USB_EPT_DATA should be ok for isoc also. */
++ if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
++
++ /* Isoc traffic doesn't have error_count_in/error_count_out. */
++ if ((usb_pipetype(urb->pipe) != PIPE_ISOCHRONOUS) &&
++ (IO_EXTRACT(R_USB_EPT_DATA, error_count_in, ept_data) == 3 ||
++ IO_EXTRACT(R_USB_EPT_DATA, error_count_out, ept_data) == 3)) {
++ /* Check if URB allready is marked for late-finish, we can get
++ several 3rd error for Intr traffic when a device is unplugged */
++ if(urb_priv->later_data == NULL) {
++ /* 3rd error. */
++ irq_warn("3rd error for epid:%d (%s %s) URB:0x%x[%d]\n", epid,
++ str_dir(urb->pipe), str_type(urb->pipe),
++ (unsigned int)urb, urb_priv->urb_num);
++
++ tc_finish_urb_later(hcd, urb, -EPROTO);
++ }
++
++ } else if (reg->r_usb_status & IO_MASK(R_USB_STATUS, perror)) {
++ irq_warn("Perror for epid:%d\n", epid);
++ printk("FM_NUMBER: %d\n", reg->r_usb_fm_number & 0x7ff);
++ printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
++ __dump_urb(urb);
++ debug_epid(epid);
++
++ if (!(ept_data & IO_MASK(R_USB_EPT_DATA, valid))) {
++ /* invalid ep_id */
++ panic("Perror because of invalid epid."
++ " Deconfigured too early?");
++ } else {
++ /* past eof1, near eof, zout transfer, setup transfer */
++ /* Dump the urb and the relevant EP descriptor. */
++ panic("Something wrong with DMA descriptor contents."
++ " Too much traffic inserted?");
++ }
++ } else if (reg->r_usb_status & IO_MASK(R_USB_STATUS, ourun)) {
++ /* buffer ourun */
++ printk("FM_NUMBER: %d\n", reg->r_usb_fm_number & 0x7ff);
++ printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
++ __dump_urb(urb);
++ debug_epid(epid);
+
+- for (i = 0; i < (NBR_OF_RX_DESC - 1); i++) {
+- RxDescList[i].sw_len = RX_DESC_BUF_SIZE;
+- RxDescList[i].command = 0;
+- RxDescList[i].next = virt_to_phys(&RxDescList[i + 1]);
+- RxDescList[i].buf = virt_to_phys(RxBuf + (i * RX_DESC_BUF_SIZE));
+- RxDescList[i].hw_len = 0;
+- RxDescList[i].status = 0;
+-
+- /* DMA IN cache bug. (struct etrax_dma_descr has the same layout as USB_IN_Desc
+- for the relevant fields.) */
+- prepare_rx_descriptor((struct etrax_dma_descr*)&RxDescList[i]);
++ panic("Buffer overrun/underrun for epid:%d. DMA too busy?", epid);
++ } else {
++ irq_warn("Attention on epid:%d (%s %s) with no error code\n", epid,
++ str_dir(urb->pipe), str_type(urb->pipe));
++ printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
++ __dump_urb(urb);
++ debug_epid(epid);
++ }
+
++ } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code,
++ stall)) {
++ /* Not really a protocol error, just says that the endpoint gave
++ a stall response. Note that error_code cannot be stall for isoc. */
++ if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
++ panic("Isoc traffic cannot stall");
+ }
+
+- RxDescList[i].sw_len = RX_DESC_BUF_SIZE;
+- RxDescList[i].command = IO_STATE(USB_IN_command, eol, yes);
+- RxDescList[i].next = virt_to_phys(&RxDescList[0]);
+- RxDescList[i].buf = virt_to_phys(RxBuf + (i * RX_DESC_BUF_SIZE));
+- RxDescList[i].hw_len = 0;
+- RxDescList[i].status = 0;
++ tc_dbg("Stall for epid:%d (%s %s) URB:0x%x\n", epid,
++ str_dir(urb->pipe), str_type(urb->pipe), (unsigned int)urb);
++ tc_finish_urb(hcd, urb, -EPIPE);
++
++ } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code,
++ bus_error)) {
++ /* Two devices responded to a transaction request. Must be resolved
++ by software. FIXME: Reset ports? */
++ panic("Bus error for epid %d."
++ " Two devices responded to transaction request\n",
++ epid);
++
++ } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code,
++ buffer_error)) {
++ /* DMA overrun or underrun. */
++ irq_warn("Buffer overrun/underrun for epid:%d (%s %s)\n", epid,
++ str_dir(urb->pipe), str_type(urb->pipe));
++
++ /* It seems that error_code = buffer_error in
++ R_USB_EPT_DATA/R_USB_EPT_DATA_ISO and ourun = yes in R_USB_STATUS
++ are the same error. */
++ tc_finish_urb(hcd, urb, -EPROTO);
++ } else {
++ irq_warn("Unknown attention on epid:%d (%s %s)\n", epid,
++ str_dir(urb->pipe), str_type(urb->pipe));
++ dump_ept_data(epid);
++ }
++ }
++ }
++ DBFEXIT;
++}
++
++void crisv10_hcd_port_status_irq(struct crisv10_irq_reg *reg)
++{
++ __u16 port_reg[USB_ROOT_HUB_PORTS];
++ DBFENTER;
++ port_reg[0] = reg->r_usb_rh_port_status_1;
++ port_reg[1] = reg->r_usb_rh_port_status_2;
++ rh_port_status_change(port_reg);
++ DBFEXIT;
++}
++
++void crisv10_hcd_isoc_eof_irq(struct crisv10_irq_reg *reg)
++{
++ int epid;
++ struct urb *urb;
++ struct crisv10_urb_priv *urb_priv;
++
++ DBFENTER;
++
++ for (epid = 0; epid < NBR_OF_EPIDS - 1; epid++) {
++
++ /* Only check epids that are in use, is valid and has SB list */
++ if (!epid_inuse(epid) || epid == INVALID_EPID ||
++ TxIsocEPList[epid].sub == 0 || epid == DUMMY_EPID) {
++ /* Nothing here to see. */
++ continue;
++ }
++ ASSERT(epid_isoc(epid));
++
++ /* Get the active URB for this epid (if any). */
++ urb = activeUrbList[epid];
++ if (urb == 0) {
++ isoc_warn("Ignoring NULL urb for epid:%d\n", epid);
++ continue;
++ }
++ if(!epid_out_traffic(epid)) {
++ /* Sanity check. */
++ ASSERT(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
++
++ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
++ ASSERT(urb_priv);
++
++ if (urb_priv->urb_state == NOT_STARTED) {
++ /* If ASAP is not set and urb->start_frame is the current frame,
++ start the transfer. */
++ if (!(urb->transfer_flags & URB_ISO_ASAP) &&
++ (urb->start_frame == (*R_USB_FM_NUMBER & 0x7ff))) {
++ /* EP should not be enabled if we're waiting for start_frame */
++ ASSERT((TxIsocEPList[epid].command &
++ IO_STATE(USB_EP_command, enable, yes)) == 0);
++
++ isoc_warn("Enabling isoc IN EP descr for epid %d\n", epid);
++ TxIsocEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
++
++ /* This urb is now active. */
++ urb_priv->urb_state = STARTED;
++ continue;
++ }
++ }
++ }
++ }
++
++ DBFEXIT;
++}
++
++void crisv10_hcd_ctl_status_irq(struct crisv10_irq_reg *reg)
++{
++ struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(reg->hcd);
++
++ DBFENTER;
++ ASSERT(crisv10_hcd);
++
++ irq_dbg("ctr_status_irq, controller status: %s\n",
++ hcd_status_to_str(reg->r_usb_status));
++
++ /* FIXME: What should we do if we get ourun or perror? Dump the EP and SB
++ list for the corresponding epid? */
++ if (reg->r_usb_status & IO_MASK(R_USB_STATUS, ourun)) {
++ panic("USB controller got ourun.");
++ }
++ if (reg->r_usb_status & IO_MASK(R_USB_STATUS, perror)) {
++
++ /* Before, etrax_usb_do_intr_recover was called on this epid if it was
++ an interrupt pipe. I don't see how re-enabling all EP descriptors
++ will help if there was a programming error. */
++ panic("USB controller got perror.");
++ }
++
++ /* Keep track of USB Controller, if it's running or not */
++ if(reg->r_usb_status & IO_STATE(R_USB_STATUS, running, yes)) {
++ crisv10_hcd->running = 1;
++ } else {
++ crisv10_hcd->running = 0;
++ }
++
++ if (reg->r_usb_status & IO_MASK(R_USB_STATUS, device_mode)) {
++ /* We should never operate in device mode. */
++ panic("USB controller in device mode.");
++ }
++
++ /* Set the flag to avoid getting "Unlink after no-IRQ? Controller is probably
++ using the wrong IRQ" from hcd_unlink_urb() in drivers/usb/core/hcd.c */
++ set_bit(HCD_FLAG_SAW_IRQ, ®->hcd->flags);
++
++ DBFEXIT;
++}
++
++
++/******************************************************************/
++/* Host Controller interface functions */
++/******************************************************************/
++
++static inline void crisv10_ready_wait(void) {
++ volatile int timeout = 10000;
++ /* Check the busy bit of USB controller in Etrax */
++ while((*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy)) &&
++ (timeout-- > 0));
++ if(timeout == 0) {
++ warn("Timeout while waiting for USB controller to be idle\n");
++ }
++}
++
++/* reset host controller */
++static int crisv10_hcd_reset(struct usb_hcd *hcd)
++{
++ DBFENTER;
++ hcd_dbg(hcd, "reset\n");
++
++
++ /* Reset the USB interface. */
++ /*
++ *R_USB_COMMAND =
++ IO_STATE(R_USB_COMMAND, port_sel, nop) |
++ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
++ IO_STATE(R_USB_COMMAND, ctrl_cmd, reset);
++ nop();
++ */
++ DBFEXIT;
++ return 0;
++}
++
++/* start host controller */
++static int crisv10_hcd_start(struct usb_hcd *hcd)
++{
++ DBFENTER;
++ hcd_dbg(hcd, "start\n");
++
++ crisv10_ready_wait();
++
++ /* Start processing of USB traffic. */
++ *R_USB_COMMAND =
++ IO_STATE(R_USB_COMMAND, port_sel, nop) |
++ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
++ IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
++
++ nop();
++
++ hcd->state = HC_STATE_RUNNING;
++
++ DBFEXIT;
++ return 0;
++}
++
++/* stop host controller */
++static void crisv10_hcd_stop(struct usb_hcd *hcd)
++{
++ DBFENTER;
++ hcd_dbg(hcd, "stop\n");
++ crisv10_hcd_reset(hcd);
++ DBFEXIT;
++}
++
++/* return the current frame number */
++static int crisv10_hcd_get_frame(struct usb_hcd *hcd)
++{
++ DBFENTER;
++ DBFEXIT;
++ return (*R_USB_FM_NUMBER & 0x7ff);
++}
++
++#ifdef CONFIG_USB_OTG
++
++static int crisv10_hcd_start_port_reset(struct usb_hcd *hcd, unsigned port)
++{
++ return 0; /* no-op for now */
++}
++
++#endif /* CONFIG_USB_OTG */
++
++
++/******************************************************************/
++/* Root Hub functions */
++/******************************************************************/
++
++/* root hub status */
++static const struct usb_hub_status rh_hub_status =
++ {
++ .wHubStatus = 0,
++ .wHubChange = 0,
++ };
++
++/* root hub descriptor */
++static const u8 rh_hub_descr[] =
++ {
++ 0x09, /* bDescLength */
++ 0x29, /* bDescriptorType */
++ USB_ROOT_HUB_PORTS, /* bNbrPorts */
++ 0x00, /* wHubCharacteristics */
++ 0x00,
++ 0x01, /* bPwrOn2pwrGood */
++ 0x00, /* bHubContrCurrent */
++ 0x00, /* DeviceRemovable */
++ 0xff /* PortPwrCtrlMask */
++ };
++
++/* Actual holder of root hub status*/
++struct crisv10_rh rh;
++
++/* Initialize root hub data structures (called from dvdrv_hcd_probe()) */
++int rh_init(void) {
++ int i;
++ /* Reset port status flags */
++ for (i = 0; i < USB_ROOT_HUB_PORTS; i++) {
++ rh.wPortChange[i] = 0;
++ rh.wPortStatusPrev[i] = 0;
++ }
++ return 0;
++}
++
++#define RH_FEAT_MASK ((1<<USB_PORT_FEAT_CONNECTION)|\
++ (1<<USB_PORT_FEAT_ENABLE)|\
++ (1<<USB_PORT_FEAT_SUSPEND)|\
++ (1<<USB_PORT_FEAT_RESET))
++
++/* Handle port status change interrupt (called from bottom part interrupt) */
++void rh_port_status_change(__u16 port_reg[]) {
++ int i;
++ __u16 wChange;
++
++ for(i = 0; i < USB_ROOT_HUB_PORTS; i++) {
++ /* Xor out changes since last read, masked for important flags */
++ wChange = (port_reg[i] & RH_FEAT_MASK) ^ rh.wPortStatusPrev[i];
++ /* Or changes together with (if any) saved changes */
++ rh.wPortChange[i] |= wChange;
++ /* Save new status */
++ rh.wPortStatusPrev[i] = port_reg[i];
++
++ if(wChange) {
++ rh_dbg("Interrupt port_status change port%d: %s Current-status:%s\n", i+1,
++ port_status_to_str(wChange),
++ port_status_to_str(port_reg[i]));
++ }
++ }
++}
++
++/* Construct port status change bitmap for the root hub */
++static int rh_status_data_request(struct usb_hcd *hcd, char *buf)
++{
++ struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(hcd);
++ unsigned int i;
++
++ DBFENTER;
++ /*
++ * corresponds to hub status change EP (USB 2.0 spec section 11.13.4)
++ * return bitmap indicating ports with status change
++ */
++ *buf = 0;
++ spin_lock(&crisv10_hcd->lock);
++ for (i = 1; i <= crisv10_hcd->num_ports; i++) {
++ if (rh.wPortChange[map_port(i)]) {
++ *buf |= (1 << i);
++ rh_dbg("rh_status_data_request, change on port %d: %s Current Status: %s\n", i,
++ port_status_to_str(rh.wPortChange[map_port(i)]),
++ port_status_to_str(rh.wPortStatusPrev[map_port(i)]));
++ }
++ }
++ spin_unlock(&crisv10_hcd->lock);
++ DBFEXIT;
++ return *buf == 0 ? 0 : 1;
++}
++
++/* Handle a control request for the root hub (called from hcd_driver) */
++static int rh_control_request(struct usb_hcd *hcd,
++ u16 typeReq,
++ u16 wValue,
++ u16 wIndex,
++ char *buf,
++ u16 wLength) {
++
++ struct crisv10_hcd *crisv10_hcd = hcd_to_crisv10_hcd(hcd);
++ int retval = 0;
++ int len;
++ DBFENTER;
++
++ switch (typeReq) {
++ case GetHubDescriptor:
++ rh_dbg("GetHubDescriptor\n");
++ len = min_t(unsigned int, sizeof rh_hub_descr, wLength);
++ memcpy(buf, rh_hub_descr, len);
++ buf[2] = crisv10_hcd->num_ports;
++ break;
++ case GetHubStatus:
++ rh_dbg("GetHubStatus\n");
++ len = min_t(unsigned int, sizeof rh_hub_status, wLength);
++ memcpy(buf, &rh_hub_status, len);
++ break;
++ case GetPortStatus:
++ if (!wIndex || wIndex > crisv10_hcd->num_ports)
++ goto error;
++ rh_dbg("GetportStatus, port:%d change:%s status:%s\n", wIndex,
++ port_status_to_str(rh.wPortChange[map_port(wIndex)]),
++ port_status_to_str(rh.wPortStatusPrev[map_port(wIndex)]));
++ *(u16 *) buf = cpu_to_le16(rh.wPortStatusPrev[map_port(wIndex)]);
++ *(u16 *) (buf + 2) = cpu_to_le16(rh.wPortChange[map_port(wIndex)]);
++ break;
++ case SetHubFeature:
++ rh_dbg("SetHubFeature\n");
++ case ClearHubFeature:
++ rh_dbg("ClearHubFeature\n");
++ switch (wValue) {
++ case C_HUB_OVER_CURRENT:
++ case C_HUB_LOCAL_POWER:
++ rh_warn("Not implemented hub request:%d \n", typeReq);
++ /* not implemented */
++ break;
++ default:
++ goto error;
++ }
++ break;
++ case SetPortFeature:
++ if (!wIndex || wIndex > crisv10_hcd->num_ports)
++ goto error;
++ if(rh_set_port_feature(map_port(wIndex), wValue))
++ goto error;
++ break;
++ case ClearPortFeature:
++ if (!wIndex || wIndex > crisv10_hcd->num_ports)
++ goto error;
++ if(rh_clear_port_feature(map_port(wIndex), wValue))
++ goto error;
++ break;
++ default:
++ rh_warn("Unknown hub request: %d\n", typeReq);
++ error:
++ retval = -EPIPE;
++ }
++ DBFEXIT;
++ return retval;
++}
++
++int rh_set_port_feature(__u8 bPort, __u16 wFeature) {
++ __u8 bUsbCommand = 0;
++ switch(wFeature) {
++ case USB_PORT_FEAT_RESET:
++ rh_dbg("SetPortFeature: reset\n");
++ bUsbCommand |= IO_STATE(R_USB_COMMAND, port_cmd, reset);
++ goto set;
++ break;
++ case USB_PORT_FEAT_SUSPEND:
++ rh_dbg("SetPortFeature: suspend\n");
++ bUsbCommand |= IO_STATE(R_USB_COMMAND, port_cmd, suspend);
++ goto set;
++ break;
++ case USB_PORT_FEAT_POWER:
++ rh_dbg("SetPortFeature: power\n");
++ break;
++ case USB_PORT_FEAT_C_CONNECTION:
++ rh_dbg("SetPortFeature: c_connection\n");
++ break;
++ case USB_PORT_FEAT_C_RESET:
++ rh_dbg("SetPortFeature: c_reset\n");
++ break;
++ case USB_PORT_FEAT_C_OVER_CURRENT:
++ rh_dbg("SetPortFeature: c_over_current\n");
++ break;
++
++ set:
++ /* Select which port via the port_sel field */
++ bUsbCommand |= IO_FIELD(R_USB_COMMAND, port_sel, bPort+1);
++
++ /* Make sure the controller isn't busy. */
++ crisv10_ready_wait();
++ /* Send out the actual command to the USB controller */
++ *R_USB_COMMAND = bUsbCommand;
++
++ /* If port reset then also bring USB controller into running state */
++ if(wFeature == USB_PORT_FEAT_RESET) {
++ /* Wait a while for controller to first become started after port reset */
++ udelay(12000); /* 12ms blocking wait */
++
++ /* Make sure the controller isn't busy. */
++ crisv10_ready_wait();
++
++ /* If all enabled ports were disabled the host controller goes down into
++ started mode, so we need to bring it back into the running state.
++ (This is safe even if it's already in the running state.) */
++ *R_USB_COMMAND =
++ IO_STATE(R_USB_COMMAND, port_sel, nop) |
++ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
++ IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
++ }
++
++ break;
++ default:
++ rh_dbg("SetPortFeature: unknown feature\n");
++ return -1;
++ }
++ return 0;
++}
++
++int rh_clear_port_feature(__u8 bPort, __u16 wFeature) {
++ switch(wFeature) {
++ case USB_PORT_FEAT_ENABLE:
++ rh_dbg("ClearPortFeature: enable\n");
++ rh_disable_port(bPort);
++ break;
++ case USB_PORT_FEAT_SUSPEND:
++ rh_dbg("ClearPortFeature: suspend\n");
++ break;
++ case USB_PORT_FEAT_POWER:
++ rh_dbg("ClearPortFeature: power\n");
++ break;
++
++ case USB_PORT_FEAT_C_ENABLE:
++ rh_dbg("ClearPortFeature: c_enable\n");
++ goto clear;
++ case USB_PORT_FEAT_C_SUSPEND:
++ rh_dbg("ClearPortFeature: c_suspend\n");
++ goto clear;
++ case USB_PORT_FEAT_C_CONNECTION:
++ rh_dbg("ClearPortFeature: c_connection\n");
++ goto clear;
++ case USB_PORT_FEAT_C_OVER_CURRENT:
++ rh_dbg("ClearPortFeature: c_over_current\n");
++ goto clear;
++ case USB_PORT_FEAT_C_RESET:
++ rh_dbg("ClearPortFeature: c_reset\n");
++ goto clear;
++ clear:
++ rh.wPortChange[bPort] &= ~(1 << (wFeature - 16));
++ break;
++ default:
++ rh_dbg("ClearPortFeature: unknown feature\n");
++ return -1;
++ }
++ return 0;
++}
++
++
++#ifdef CONFIG_PM
++/* Handle a suspend request for the root hub (called from hcd_driver) */
++static int rh_suspend_request(struct usb_hcd *hcd)
++{
++ return 0; /* no-op for now */
++}
++
++/* Handle a resume request for the root hub (called from hcd_driver) */
++static int rh_resume_request(struct usb_hcd *hcd)
++{
++ return 0; /* no-op for now */
++}
++#endif /* CONFIG_PM */
++
++
++
++/* Wrapper function for workaround port disable registers in USB controller */
++static void rh_disable_port(unsigned int port) {
++ volatile int timeout = 10000;
++ volatile char* usb_portx_disable;
++ switch(port) {
++ case 0:
++ usb_portx_disable = R_USB_PORT1_DISABLE;
++ break;
++ case 1:
++ usb_portx_disable = R_USB_PORT2_DISABLE;
++ break;
++ default:
++ /* Invalid port index */
++ return;
++ }
++ /* Set disable flag in special register */
++ *usb_portx_disable = IO_STATE(R_USB_PORT1_DISABLE, disable, yes);
++ /* Wait until not enabled anymore */
++ while((rh.wPortStatusPrev[port] &
++ IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, yes)) &&
++ (timeout-- > 0));
++ if(timeout == 0) {
++ warn("Timeout while waiting for port %d to become disabled\n", port);
++ }
++ /* clear disable flag in special register */
++ *usb_portx_disable = IO_STATE(R_USB_PORT1_DISABLE, disable, no);
++ rh_info("Physical port %d disabled\n", port+1);
++}
++
++
++/******************************************************************/
++/* Transfer Controller (TC) functions */
++/******************************************************************/
++
++/* FIXME: Should RX_BUF_SIZE be a config option, or maybe we should adjust it
++ dynamically?
++ To adjust it dynamically we would have to get an interrupt when we reach
++ the end of the rx descriptor list, or when we get close to the end, and
++ then allocate more descriptors. */
++#define NBR_OF_RX_DESC 512
++#define RX_DESC_BUF_SIZE 1024
++#define RX_BUF_SIZE (NBR_OF_RX_DESC * RX_DESC_BUF_SIZE)
+
+- myNextRxDesc = &RxDescList[0];
+- myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
+- myPrevRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
+
+- *R_DMA_CH9_FIRST = virt_to_phys(myNextRxDesc);
+- *R_DMA_CH9_CMD = IO_STATE(R_DMA_CH9_CMD, cmd, start);
++/* Local variables for Transfer Controller */
++/* --------------------------------------- */
+
+- DBFEXIT;
+-}
++/* This is a circular (double-linked) list of the active urbs for each epid.
++ The head is never removed, and new urbs are linked onto the list as
++ urb_entry_t elements. Don't reference urb_list directly; use the wrapper
++ functions instead (which includes spin_locks) */
++static struct list_head urb_list[NBR_OF_EPIDS];
+
+-static void init_tx_bulk_ep(void)
+-{
+- int i;
++/* Read about the need and usage of this lock in submit_ctrl_urb. */
++/* Lock for URB lists for each EPID */
++static spinlock_t urb_list_lock;
+
+- DBFENTER;
++/* Lock for EPID array register (R_USB_EPT_x) in Etrax */
++static spinlock_t etrax_epid_lock;
+
+- for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
+- CHECK_ALIGN(&TxBulkEPList[i]);
+- TxBulkEPList[i].hw_len = 0;
+- TxBulkEPList[i].command = IO_FIELD(USB_EP_command, epid, i);
+- TxBulkEPList[i].sub = 0;
+- TxBulkEPList[i].next = virt_to_phys(&TxBulkEPList[i + 1]);
+-
+- /* Initiate two EPs, disabled and with the eol flag set. No need for any
+- preserved epid. */
+-
+- /* The first one has the intr flag set so we get an interrupt when the DMA
+- channel is about to become disabled. */
+- CHECK_ALIGN(&TxBulkDummyEPList[i][0]);
+- TxBulkDummyEPList[i][0].hw_len = 0;
+- TxBulkDummyEPList[i][0].command = (IO_FIELD(USB_EP_command, epid, DUMMY_EPID) |
+- IO_STATE(USB_EP_command, eol, yes) |
+- IO_STATE(USB_EP_command, intr, yes));
+- TxBulkDummyEPList[i][0].sub = 0;
+- TxBulkDummyEPList[i][0].next = virt_to_phys(&TxBulkDummyEPList[i][1]);
+-
+- /* The second one. */
+- CHECK_ALIGN(&TxBulkDummyEPList[i][1]);
+- TxBulkDummyEPList[i][1].hw_len = 0;
+- TxBulkDummyEPList[i][1].command = (IO_FIELD(USB_EP_command, epid, DUMMY_EPID) |
+- IO_STATE(USB_EP_command, eol, yes));
+- TxBulkDummyEPList[i][1].sub = 0;
+- /* The last dummy's next pointer is the same as the current EP's next pointer. */
+- TxBulkDummyEPList[i][1].next = virt_to_phys(&TxBulkEPList[i + 1]);
+- }
++/* Lock for dma8 sub0 handling */
++static spinlock_t etrax_dma8_sub0_lock;
+
+- /* Configure the last one. */
+- CHECK_ALIGN(&TxBulkEPList[i]);
+- TxBulkEPList[i].hw_len = 0;
+- TxBulkEPList[i].command = (IO_STATE(USB_EP_command, eol, yes) |
+- IO_FIELD(USB_EP_command, epid, i));
+- TxBulkEPList[i].sub = 0;
+- TxBulkEPList[i].next = virt_to_phys(&TxBulkEPList[0]);
+-
+- /* No need configuring dummy EPs for the last one as it will never be used for
+- bulk traffic (i == INVALD_EPID at this point). */
+-
+- /* Set up to start on the last EP so we will enable it when inserting traffic
+- for the first time (imitating the situation where the DMA has stopped
+- because there was no more traffic). */
+- *R_DMA_CH8_SUB0_EP = virt_to_phys(&TxBulkEPList[i]);
+- /* No point in starting the bulk channel yet.
+- *R_DMA_CH8_SUB0_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start); */
+- DBFEXIT;
+-}
++/* DMA IN cache bug. Align the DMA IN buffers to 32 bytes, i.e. a cache line.
++ Since RX_DESC_BUF_SIZE is 1024 is a multiple of 32, all rx buffers will be
++ cache aligned. */
++static volatile unsigned char RxBuf[RX_BUF_SIZE] __attribute__ ((aligned (32)));
++static volatile struct USB_IN_Desc RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned (4)));
+
+-static void init_tx_ctrl_ep(void)
+-{
+- int i;
++/* Pointers into RxDescList. */
++static volatile struct USB_IN_Desc *myNextRxDesc;
++static volatile struct USB_IN_Desc *myLastRxDesc;
+
+- DBFENTER;
++/* A zout transfer makes a memory access at the address of its buf pointer,
++ which means that setting this buf pointer to 0 will cause an access to the
++ flash. In addition to this, setting sw_len to 0 results in a 16/32 bytes
++ (depending on DMA burst size) transfer.
++ Instead, we set it to 1, and point it to this buffer. */
++static int zout_buffer[4] __attribute__ ((aligned (4)));
+
+- for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
+- CHECK_ALIGN(&TxCtrlEPList[i]);
+- TxCtrlEPList[i].hw_len = 0;
+- TxCtrlEPList[i].command = IO_FIELD(USB_EP_command, epid, i);
+- TxCtrlEPList[i].sub = 0;
+- TxCtrlEPList[i].next = virt_to_phys(&TxCtrlEPList[i + 1]);
+- }
++/* Cache for allocating new EP and SB descriptors. */
++static kmem_cache_t *usb_desc_cache;
+
+- CHECK_ALIGN(&TxCtrlEPList[i]);
+- TxCtrlEPList[i].hw_len = 0;
+- TxCtrlEPList[i].command = (IO_STATE(USB_EP_command, eol, yes) |
+- IO_FIELD(USB_EP_command, epid, i));
++/* Cache for the data allocated in the isoc descr top half. */
++static kmem_cache_t *isoc_compl_cache;
+
+- TxCtrlEPList[i].sub = 0;
+- TxCtrlEPList[i].next = virt_to_phys(&TxCtrlEPList[0]);
++/* Cache for the data allocated when delayed finishing of URBs */
++static kmem_cache_t *later_data_cache;
+
+- *R_DMA_CH8_SUB1_EP = virt_to_phys(&TxCtrlEPList[0]);
+- *R_DMA_CH8_SUB1_CMD = IO_STATE(R_DMA_CH8_SUB1_CMD, cmd, start);
+
+- DBFEXIT;
++/* Counter to keep track of how many Isoc EP we have sat up. Used to enable
++ and disable iso_eof interrupt. We only need these interrupts when we have
++ Isoc data endpoints (consumes CPU cycles).
++ FIXME: This could be more fine granular, so this interrupt is only enabled
++ when we have a In Isoc URB not URB_ISO_ASAP flaged queued. */
++static int isoc_epid_counter;
++
++/* Protecting wrapper functions for R_USB_EPT_x */
++/* -------------------------------------------- */
++static inline void etrax_epid_set(__u8 index, __u32 data) {
++ unsigned long flags;
++ spin_lock_irqsave(&etrax_epid_lock, flags);
++ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
++ nop();
++ *R_USB_EPT_DATA = data;
++ spin_unlock_irqrestore(&etrax_epid_lock, flags);
++}
++
++static inline void etrax_epid_clear_error(__u8 index) {
++ unsigned long flags;
++ spin_lock_irqsave(&etrax_epid_lock, flags);
++ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
++ nop();
++ *R_USB_EPT_DATA &=
++ ~(IO_MASK(R_USB_EPT_DATA, error_count_in) |
++ IO_MASK(R_USB_EPT_DATA, error_count_out) |
++ IO_MASK(R_USB_EPT_DATA, error_code));
++ spin_unlock_irqrestore(&etrax_epid_lock, flags);
++}
++
++static inline void etrax_epid_set_toggle(__u8 index, __u8 dirout,
++ __u8 toggle) {
++ unsigned long flags;
++ spin_lock_irqsave(&etrax_epid_lock, flags);
++ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
++ nop();
++ if(dirout) {
++ *R_USB_EPT_DATA &= ~IO_MASK(R_USB_EPT_DATA, t_out);
++ *R_USB_EPT_DATA |= IO_FIELD(R_USB_EPT_DATA, t_out, toggle);
++ } else {
++ *R_USB_EPT_DATA &= ~IO_MASK(R_USB_EPT_DATA, t_in);
++ *R_USB_EPT_DATA |= IO_FIELD(R_USB_EPT_DATA, t_in, toggle);
++ }
++ spin_unlock_irqrestore(&etrax_epid_lock, flags);
++}
++
++static inline __u8 etrax_epid_get_toggle(__u8 index, __u8 dirout) {
++ unsigned long flags;
++ __u8 toggle;
++ spin_lock_irqsave(&etrax_epid_lock, flags);
++ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
++ nop();
++ if (dirout) {
++ toggle = IO_EXTRACT(R_USB_EPT_DATA, t_out, *R_USB_EPT_DATA);
++ } else {
++ toggle = IO_EXTRACT(R_USB_EPT_DATA, t_in, *R_USB_EPT_DATA);
++ }
++ spin_unlock_irqrestore(&etrax_epid_lock, flags);
++ return toggle;
++}
++
++
++static inline __u32 etrax_epid_get(__u8 index) {
++ unsigned long flags;
++ __u32 data;
++ spin_lock_irqsave(&etrax_epid_lock, flags);
++ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
++ nop();
++ data = *R_USB_EPT_DATA;
++ spin_unlock_irqrestore(&etrax_epid_lock, flags);
++ return data;
++}
++
++
++
++
++/* Main functions for Transfer Controller */
++/* -------------------------------------- */
++
++/* Init structs, memories and lists used by Transfer Controller */
++int tc_init(struct usb_hcd *hcd) {
++ int i;
++ /* Clear software state info for all epids */
++ memset(epid_state, 0, sizeof(struct etrax_epid) * NBR_OF_EPIDS);
++
++ /* Set Invalid and Dummy as being in use and disabled */
++ epid_state[INVALID_EPID].inuse = 1;
++ epid_state[DUMMY_EPID].inuse = 1;
++ epid_state[INVALID_EPID].disabled = 1;
++ epid_state[DUMMY_EPID].disabled = 1;
++
++ /* Clear counter for how many Isoc epids we have sat up */
++ isoc_epid_counter = 0;
++
++ /* Initialize the urb list by initiating a head for each list.
++ Also reset list hodling active URB for each epid */
++ for (i = 0; i < NBR_OF_EPIDS; i++) {
++ INIT_LIST_HEAD(&urb_list[i]);
++ activeUrbList[i] = NULL;
++ }
++
++ /* Init lock for URB lists */
++ spin_lock_init(&urb_list_lock);
++ /* Init lock for Etrax R_USB_EPT register */
++ spin_lock_init(&etrax_epid_lock);
++ /* Init lock for Etrax dma8 sub0 handling */
++ spin_lock_init(&etrax_dma8_sub0_lock);
++
++ /* We use kmem_cache_* to make sure that all DMA desc. are dword aligned */
++
++ /* Note that we specify sizeof(struct USB_EP_Desc) as the size, but also
++ allocate SB descriptors from this cache. This is ok since
++ sizeof(struct USB_EP_Desc) == sizeof(struct USB_SB_Desc). */
++ usb_desc_cache = kmem_cache_create("usb_desc_cache",
++ sizeof(struct USB_EP_Desc), 0,
++ SLAB_HWCACHE_ALIGN, 0, 0);
++ if(usb_desc_cache == NULL) {
++ return -ENOMEM;
++ }
++
++ /* Create slab cache for speedy allocation of memory for isoc bottom-half
++ interrupt handling */
++ isoc_compl_cache =
++ kmem_cache_create("isoc_compl_cache",
++ sizeof(struct crisv10_isoc_complete_data),
++ 0, SLAB_HWCACHE_ALIGN, 0, 0);
++ if(isoc_compl_cache == NULL) {
++ return -ENOMEM;
++ }
++
++ /* Create slab cache for speedy allocation of memory for later URB finish
++ struct */
++ later_data_cache =
++ kmem_cache_create("later_data_cache",
++ sizeof(struct urb_later_data),
++ 0, SLAB_HWCACHE_ALIGN, 0, 0);
++ if(later_data_cache == NULL) {
++ return -ENOMEM;
++ }
++
++
++ /* Initiate the bulk start timer. */
++ init_timer(&bulk_start_timer);
++ bulk_start_timer.expires = jiffies + BULK_START_TIMER_INTERVAL;
++ bulk_start_timer.function = tc_bulk_start_timer_func;
++ add_timer(&bulk_start_timer);
++
++
++ /* Initiate the bulk eot timer. */
++ init_timer(&bulk_eot_timer);
++ bulk_eot_timer.expires = jiffies + BULK_EOT_TIMER_INTERVAL;
++ bulk_eot_timer.function = tc_bulk_eot_timer_func;
++ bulk_eot_timer.data = (unsigned long)hcd;
++ add_timer(&bulk_eot_timer);
++
++ return 0;
++}
++
++/* Uninitialize all resources used by Transfer Controller */
++void tc_destroy(void) {
++
++ /* Destroy all slab cache */
++ kmem_cache_destroy(usb_desc_cache);
++ kmem_cache_destroy(isoc_compl_cache);
++ kmem_cache_destroy(later_data_cache);
++
++ /* Remove timers */
++ del_timer(&bulk_start_timer);
++ del_timer(&bulk_eot_timer);
++}
++
++static void restart_dma8_sub0(void) {
++ unsigned long flags;
++ spin_lock_irqsave(&etrax_dma8_sub0_lock, flags);
++ /* Verify that the dma is not running */
++ if ((*R_DMA_CH8_SUB0_CMD & IO_MASK(R_DMA_CH8_SUB0_CMD, cmd)) == 0) {
++ struct USB_EP_Desc *ep = (struct USB_EP_Desc *)phys_to_virt(*R_DMA_CH8_SUB0_EP);
++ while (DUMMY_EPID == IO_EXTRACT(USB_EP_command, epid, ep->command)) {
++ ep = (struct USB_EP_Desc *)phys_to_virt(ep->next);
++ }
++ /* Advance the DMA to the next EP descriptor that is not a DUMMY_EPID.
++ * ep->next is already a physical address; no need for a virt_to_phys. */
++ *R_DMA_CH8_SUB0_EP = ep->next;
++ /* Restart the DMA */
++ *R_DMA_CH8_SUB0_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start);
++ }
++ spin_unlock_irqrestore(&etrax_dma8_sub0_lock, flags);
++}
++
++/* queue an URB with the transfer controller (called from hcd_driver) */
++static int tc_urb_enqueue(struct usb_hcd *hcd,
++ struct usb_host_endpoint *ep,
++ struct urb *urb,
++ gfp_t mem_flags) {
++ int epid;
++ int retval;
++ int bustime = 0;
++ int maxpacket;
++ unsigned long flags;
++ struct crisv10_urb_priv *urb_priv;
++ struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(hcd);
++ DBFENTER;
++
++ if(!(crisv10_hcd->running)) {
++ /* The USB Controller is not running, probably because no device is
++ attached. No idea to enqueue URBs then */
++ tc_warn("Rejected enqueueing of URB:0x%x because no dev attached\n",
++ (unsigned int)urb);
++ return -ENOENT;
++ }
++
++ maxpacket = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
++ /* Special case check for In Isoc transfers. Specification states that each
++ In Isoc transfer consists of one packet and therefore it should fit into
++ the transfer-buffer of an URB.
++ We do the check here to be sure (an invalid scenario can be produced with
++ parameters to the usbtest suite) */
++ if(usb_pipeisoc(urb->pipe) && usb_pipein(urb->pipe) &&
++ (urb->transfer_buffer_length < maxpacket)) {
++ tc_err("Submit In Isoc URB with buffer length:%d to pipe with maxpacketlen: %d\n", urb->transfer_buffer_length, maxpacket);
++ return -EMSGSIZE;
++ }
++
++ /* Check if there is enough bandwidth for periodic transfer */
++ if(usb_pipeint(urb->pipe) || usb_pipeisoc(urb->pipe)) {
++ /* only check (and later claim) if not already claimed */
++ if (urb->bandwidth == 0) {
++ bustime = usb_check_bandwidth(urb->dev, urb);
++ if (bustime < 0) {
++ tc_err("Not enough periodic bandwidth\n");
++ return -ENOSPC;
++ }
++ }
++ }
++
++ /* Check if there is a epid for URBs destination, if not this function
++ set up one. */
++ epid = tc_setup_epid(ep, urb, mem_flags);
++ if (epid < 0) {
++ tc_err("Failed setup epid:%d for URB:0x%x\n", epid, (unsigned int)urb);
++ DBFEXIT;
++ return -ENOMEM;
++ }
++
++ if(urb == activeUrbList[epid]) {
++ tc_err("Resubmition of allready active URB:0x%x\n", (unsigned int)urb);
++ return -ENXIO;
++ }
++
++ if(urb_list_entry(urb, epid)) {
++ tc_err("Resubmition of allready queued URB:0x%x\n", (unsigned int)urb);
++ return -ENXIO;
++ }
++
++ /* If we actively have flaged endpoint as disabled then refuse submition */
++ if(epid_state[epid].disabled) {
++ return -ENOENT;
++ }
++
++ /* Allocate and init HC-private data for URB */
++ if(urb_priv_create(hcd, urb, epid, mem_flags) != 0) {
++ DBFEXIT;
++ return -ENOMEM;
++ }
++ urb_priv = urb->hcpriv;
++
++ tc_dbg("Enqueue URB:0x%x[%d] epid:%d (%s) bufflen:%d\n",
++ (unsigned int)urb, urb_priv->urb_num, epid,
++ pipe_to_str(urb->pipe), urb->transfer_buffer_length);
++
++ /* Create and link SBs required for this URB */
++ retval = create_sb_for_urb(urb, mem_flags);
++ if(retval != 0) {
++ tc_err("Failed to create SBs for URB:0x%x[%d]\n", (unsigned int)urb,
++ urb_priv->urb_num);
++ urb_priv_free(hcd, urb);
++ DBFEXIT;
++ return retval;
++ }
++
++ /* Init intr EP pool if this URB is a INTR transfer. This pool is later
++ used when inserting EPs in the TxIntrEPList. We do the alloc here
++ so we can't run out of memory later */
++ if(usb_pipeint(urb->pipe)) {
++ retval = init_intr_urb(urb, mem_flags);
++ if(retval != 0) {
++ tc_warn("Failed to init Intr URB\n");
++ urb_priv_free(hcd, urb);
++ DBFEXIT;
++ return retval;
++ }
++ }
++
++ /* Disable other access when inserting USB */
++ local_irq_save(flags);
++
++ /* Claim bandwidth, if needed */
++ if(bustime) {
++ usb_claim_bandwidth(urb->dev, urb, bustime, 0);
++ }
++
++ /* Add URB to EP queue */
++ urb_list_add(urb, epid, mem_flags);
++
++ if(usb_pipeisoc(urb->pipe)) {
++ /* Special processing of Isoc URBs. */
++ tc_dma_process_isoc_urb(urb);
++ } else {
++ /* Process EP queue for rest of the URB types (Bulk, Ctrl, Intr) */
++ tc_dma_process_queue(epid);
++ }
++
++ local_irq_restore(flags);
++
++ DBFEXIT;
++ return 0;
++}
++
++/* remove an URB from the transfer controller queues (called from hcd_driver)*/
++static int tc_urb_dequeue(struct usb_hcd *hcd, struct urb *urb) {
++ struct crisv10_urb_priv *urb_priv;
++ unsigned long flags;
++ int epid;
++
++ DBFENTER;
++ /* Disable interrupts here since a descriptor interrupt for the isoc epid
++ will modify the sb list. This could possibly be done more granular, but
++ urb_dequeue should not be used frequently anyway.
++ */
++ local_irq_save(flags);
++
++ urb_priv = urb->hcpriv;
++
++ if (!urb_priv) {
++ /* This happens if a device driver calls unlink on an urb that
++ was never submitted (lazy driver) or if the urb was completed
++ while dequeue was being called. */
++ tc_warn("Dequeing of not enqueued URB:0x%x\n", (unsigned int)urb);
++ local_irq_restore(flags);
++ return 0;
++ }
++ epid = urb_priv->epid;
++
++ tc_warn("Dequeing %s URB:0x%x[%d] (%s %s epid:%d) status:%d %s\n",
++ (urb == activeUrbList[epid]) ? "active" : "queued",
++ (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
++ str_type(urb->pipe), epid, urb->status,
++ (urb_priv->later_data) ? "later-sched" : "");
++
++ /* For Bulk, Ctrl and Intr are only one URB active at a time. So any URB
++ that isn't active can be dequeued by just removing it from the queue */
++ if(usb_pipebulk(urb->pipe) || usb_pipecontrol(urb->pipe) ||
++ usb_pipeint(urb->pipe)) {
++
++ /* Check if URB haven't gone further than the queue */
++ if(urb != activeUrbList[epid]) {
++ ASSERT(urb_priv->later_data == NULL);
++ tc_warn("Dequeing URB:0x%x[%d] (%s %s epid:%d) from queue"
++ " (not active)\n", (unsigned int)urb, urb_priv->urb_num,
++ str_dir(urb->pipe), str_type(urb->pipe), epid);
++
++ /* Finish the URB with error status from USB core */
++ tc_finish_urb(hcd, urb, urb->status);
++ local_irq_restore(flags);
++ return 0;
++ }
++ }
++
++ /* Set URB status to Unlink for handling when interrupt comes. */
++ urb_priv->urb_state = UNLINK;
++
++ /* Differentiate dequeing of Bulk and Ctrl from Isoc and Intr */
++ switch(usb_pipetype(urb->pipe)) {
++ case PIPE_BULK:
++ /* Check if EP still is enabled */
++ if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
++ /* The EP was enabled, disable it. */
++ TxBulkEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
++ }
++ /* Kicking dummy list out of the party. */
++ TxBulkEPList[epid].next = virt_to_phys(&TxBulkEPList[(epid + 1) % NBR_OF_EPIDS]);
++ break;
++ case PIPE_CONTROL:
++ /* Check if EP still is enabled */
++ if (TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
++ /* The EP was enabled, disable it. */
++ TxCtrlEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
++ }
++ break;
++ case PIPE_ISOCHRONOUS:
++ /* Disabling, busy-wait and unlinking of Isoc SBs will be done in
++ finish_isoc_urb(). Because there might the case when URB is dequeued
++ but there are other valid URBs waiting */
++
++ /* Check if In Isoc EP still is enabled */
++ if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
++ /* The EP was enabled, disable it. */
++ TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
++ }
++ break;
++ case PIPE_INTERRUPT:
++ /* Special care is taken for interrupt URBs. EPs are unlinked in
++ tc_finish_urb */
++ break;
++ default:
++ break;
++ }
++
++ /* Asynchronous unlink, finish the URB later from scheduled or other
++ event (data finished, error) */
++ tc_finish_urb_later(hcd, urb, urb->status);
++
++ local_irq_restore(flags);
++ DBFEXIT;
++ return 0;
++}
++
++
++static void tc_sync_finish_epid(struct usb_hcd *hcd, int epid) {
++ volatile int timeout = 10000;
++ struct urb* urb;
++ struct crisv10_urb_priv* urb_priv;
++ unsigned long flags;
++
++ volatile struct USB_EP_Desc *first_ep; /* First EP in the list. */
++ volatile struct USB_EP_Desc *curr_ep; /* Current EP, the iterator. */
++ volatile struct USB_EP_Desc *next_ep; /* The EP after current. */
++
++ int type = epid_state[epid].type;
++
++ /* Setting this flag will cause enqueue() to return -ENOENT for new
++ submitions on this endpoint and finish_urb() wont process queue further */
++ epid_state[epid].disabled = 1;
++
++ switch(type) {
++ case PIPE_BULK:
++ /* Check if EP still is enabled */
++ if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
++ /* The EP was enabled, disable it. */
++ TxBulkEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
++ tc_warn("sync_finish: Disabling EP for epid:%d\n", epid);
++
++ /* Do busy-wait until DMA not using this EP descriptor anymore */
++ while((*R_DMA_CH8_SUB0_EP ==
++ virt_to_phys(&TxBulkEPList[epid])) &&
++ (timeout-- > 0));
++ if(timeout == 0) {
++ warn("Timeout while waiting for DMA-TX-Bulk to leave EP for"
++ " epid:%d\n", epid);
++ }
++ }
++ break;
++
++ case PIPE_CONTROL:
++ /* Check if EP still is enabled */
++ if (TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
++ /* The EP was enabled, disable it. */
++ TxCtrlEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
++ tc_warn("sync_finish: Disabling EP for epid:%d\n", epid);
++
++ /* Do busy-wait until DMA not using this EP descriptor anymore */
++ while((*R_DMA_CH8_SUB1_EP ==
++ virt_to_phys(&TxCtrlEPList[epid])) &&
++ (timeout-- > 0));
++ if(timeout == 0) {
++ warn("Timeout while waiting for DMA-TX-Ctrl to leave EP for"
++ " epid:%d\n", epid);
++ }
++ }
++ break;
++
++ case PIPE_INTERRUPT:
++ local_irq_save(flags);
++ /* Disable all Intr EPs belonging to epid */
++ first_ep = &TxIntrEPList[0];
++ curr_ep = first_ep;
++ do {
++ next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
++ if (IO_EXTRACT(USB_EP_command, epid, next_ep->command) == epid) {
++ /* Disable EP */
++ next_ep->command &= ~IO_MASK(USB_EP_command, enable);
++ }
++ curr_ep = phys_to_virt(curr_ep->next);
++ } while (curr_ep != first_ep);
++
++ local_irq_restore(flags);
++ break;
++
++ case PIPE_ISOCHRONOUS:
++ /* Check if EP still is enabled */
++ if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
++ tc_warn("sync_finish: Disabling Isoc EP for epid:%d\n", epid);
++ /* The EP was enabled, disable it. */
++ TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
++
++ while((*R_DMA_CH8_SUB3_EP == virt_to_phys(&TxIsocEPList[epid])) &&
++ (timeout-- > 0));
++ if(timeout == 0) {
++ warn("Timeout while waiting for DMA-TX-Isoc to leave EP for"
++ " epid:%d\n", epid);
++ }
++ }
++ break;
++ }
++
++ local_irq_save(flags);
++
++ /* Finish if there is active URB for this endpoint */
++ if(activeUrbList[epid] != NULL) {
++ urb = activeUrbList[epid];
++ urb_priv = urb->hcpriv;
++ ASSERT(urb_priv);
++ tc_warn("Sync finish %s URB:0x%x[%d] (%s %s epid:%d) status:%d %s\n",
++ (urb == activeUrbList[epid]) ? "active" : "queued",
++ (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
++ str_type(urb->pipe), epid, urb->status,
++ (urb_priv->later_data) ? "later-sched" : "");
++
++ tc_finish_urb(hcd, activeUrbList[epid], -ENOENT);
++ ASSERT(activeUrbList[epid] == NULL);
++ }
++
++ /* Finish any queued URBs for this endpoint. There won't be any resubmitions
++ because epid_disabled causes enqueue() to fail for this endpoint */
++ while((urb = urb_list_first(epid)) != NULL) {
++ urb_priv = urb->hcpriv;
++ ASSERT(urb_priv);
++
++ tc_warn("Sync finish %s URB:0x%x[%d] (%s %s epid:%d) status:%d %s\n",
++ (urb == activeUrbList[epid]) ? "active" : "queued",
++ (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
++ str_type(urb->pipe), epid, urb->status,
++ (urb_priv->later_data) ? "later-sched" : "");
++
++ tc_finish_urb(hcd, urb, -ENOENT);
++ }
++ epid_state[epid].disabled = 0;
++ local_irq_restore(flags);
++}
++
++/* free resources associated with an endpoint (called from hcd_driver) */
++static void tc_endpoint_disable(struct usb_hcd *hcd,
++ struct usb_host_endpoint *ep) {
++ DBFENTER;
++ /* Only free epid if it has been allocated. We get two endpoint_disable
++ requests for ctrl endpoints so ignore the second one */
++ if(ep->hcpriv != NULL) {
++ struct crisv10_ep_priv *ep_priv = ep->hcpriv;
++ int epid = ep_priv->epid;
++ tc_warn("endpoint_disable ep:0x%x ep-priv:0x%x (%s) (epid:%d freed)\n",
++ (unsigned int)ep, (unsigned int)ep->hcpriv,
++ endpoint_to_str(&(ep->desc)), epid);
++
++ tc_sync_finish_epid(hcd, epid);
++
++ ASSERT(activeUrbList[epid] == NULL);
++ ASSERT(list_empty(&urb_list[epid]));
++
++ tc_free_epid(ep);
++ } else {
++ tc_dbg("endpoint_disable ep:0x%x ep-priv:0x%x (%s)\n", (unsigned int)ep,
++ (unsigned int)ep->hcpriv, endpoint_to_str(&(ep->desc)));
++ }
++ DBFEXIT;
++}
++
++static void tc_finish_urb_later_proc(void *data) {
++ unsigned long flags;
++ struct urb_later_data* uld = (struct urb_later_data*)data;
++ local_irq_save(flags);
++ if(uld->urb == NULL) {
++ late_dbg("Later finish of URB = NULL (allready finished)\n");
++ } else {
++ struct crisv10_urb_priv* urb_priv = uld->urb->hcpriv;
++ ASSERT(urb_priv);
++ if(urb_priv->urb_num == uld->urb_num) {
++ late_dbg("Later finish of URB:0x%x[%d]\n", (unsigned int)(uld->urb),
++ urb_priv->urb_num);
++ if(uld->status != uld->urb->status) {
++ errno_dbg("Later-finish URB with status:%d, later-status:%d\n",
++ uld->urb->status, uld->status);
++ }
++ if(uld != urb_priv->later_data) {
++ panic("Scheduled uld not same as URBs uld\n");
++ }
++ tc_finish_urb(uld->hcd, uld->urb, uld->status);
++ } else {
++ late_warn("Ignoring later finish of URB:0x%x[%d]"
++ ", urb_num doesn't match current URB:0x%x[%d]",
++ (unsigned int)(uld->urb), uld->urb_num,
++ (unsigned int)(uld->urb), urb_priv->urb_num);
++ }
++ }
++ local_irq_restore(flags);
++ kmem_cache_free(later_data_cache, uld);
++}
++
++static void tc_finish_urb_later(struct usb_hcd *hcd, struct urb *urb,
++ int status) {
++ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
++ struct urb_later_data* uld;
++
++ ASSERT(urb_priv);
++
++ if(urb_priv->later_data != NULL) {
++ /* Later-finish allready scheduled for this URB, just update status to
++ return when finishing later */
++ errno_dbg("Later-finish schedule change URB status:%d with new"
++ " status:%d\n", urb_priv->later_data->status, status);
++
++ urb_priv->later_data->status = status;
++ return;
++ }
++
++ uld = kmem_cache_alloc(later_data_cache, SLAB_ATOMIC);
++ ASSERT(uld);
++
++ uld->hcd = hcd;
++ uld->urb = urb;
++ uld->urb_num = urb_priv->urb_num;
++ uld->status = status;
++
++ INIT_WORK(&uld->ws, tc_finish_urb_later_proc, uld);
++ urb_priv->later_data = uld;
++
++ /* Schedule the finishing of the URB to happen later */
++ schedule_delayed_work(&uld->ws, LATER_TIMER_DELAY);
++}
++
++static void tc_finish_isoc_urb(struct usb_hcd *hcd, struct urb *urb,
++ int status);
++
++static void tc_finish_urb(struct usb_hcd *hcd, struct urb *urb, int status) {
++ struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(hcd);
++ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
++ int epid;
++ char toggle;
++ int urb_num;
++
++ DBFENTER;
++ ASSERT(urb_priv != NULL);
++ epid = urb_priv->epid;
++ urb_num = urb_priv->urb_num;
++
++ if(urb != activeUrbList[epid]) {
++ if(urb_list_entry(urb, epid)) {
++ /* Remove this URB from the list. Only happens when URB are finished
++ before having been processed (dequeing) */
++ urb_list_del(urb, epid);
++ } else {
++ tc_warn("Finishing of URB:0x%x[%d] neither active or in queue for"
++ " epid:%d\n", (unsigned int)urb, urb_num, epid);
++ }
++ }
++
++ /* Cancel any pending later-finish of this URB */
++ if(urb_priv->later_data) {
++ urb_priv->later_data->urb = NULL;
++ }
++
++ /* For an IN pipe, we always set the actual length, regardless of whether
++ there was an error or not (which means the device driver can use the data
++ if it wants to). */
++ if(usb_pipein(urb->pipe)) {
++ urb->actual_length = urb_priv->rx_offset;
++ } else {
++ /* Set actual_length for OUT urbs also; the USB mass storage driver seems
++ to want that. */
++ if (status == 0 && urb->status == -EINPROGRESS) {
++ urb->actual_length = urb->transfer_buffer_length;
++ } else {
++ /* We wouldn't know of any partial writes if there was an error. */
++ urb->actual_length = 0;
++ }
++ }
++
++
++ /* URB status mangling */
++ if(urb->status == -EINPROGRESS) {
++ /* The USB core hasn't changed the status, let's set our finish status */
++ urb->status = status;
++
++ if ((status == 0) && (urb->transfer_flags & URB_SHORT_NOT_OK) &&
++ usb_pipein(urb->pipe) &&
++ (urb->actual_length != urb->transfer_buffer_length)) {
++ /* URB_SHORT_NOT_OK means that short reads (shorter than the endpoint's
++ max length) is to be treated as an error. */
++ errno_dbg("Finishing URB:0x%x[%d] with SHORT_NOT_OK flag and short"
++ " data:%d\n", (unsigned int)urb, urb_num,
++ urb->actual_length);
++ urb->status = -EREMOTEIO;
++ }
++
++ if(urb_priv->urb_state == UNLINK) {
++ /* URB has been requested to be unlinked asynchronously */
++ urb->status = -ECONNRESET;
++ errno_dbg("Fixing unlink status of URB:0x%x[%d] to:%d\n",
++ (unsigned int)urb, urb_num, urb->status);
++ }
++ } else {
++ /* The USB Core wants to signal some error via the URB, pass it through */
++ }
++
++ /* use completely different finish function for Isoc URBs */
++ if(usb_pipeisoc(urb->pipe)) {
++ tc_finish_isoc_urb(hcd, urb, status);
++ return;
++ }
++
++ /* Do special unlinking of EPs for Intr traffic */
++ if(usb_pipeint(urb->pipe)) {
++ tc_dma_unlink_intr_urb(urb);
++ }
++
++ /* Release allocated bandwidth for periodic transfers */
++ if(usb_pipeint(urb->pipe) || usb_pipeisoc(urb->pipe))
++ usb_release_bandwidth(urb->dev, urb, 0);
++
++ /* This URB is active on EP */
++ if(urb == activeUrbList[epid]) {
++ /* We need to fiddle with the toggle bits because the hardware doesn't do
++ it for us. */
++ toggle = etrax_epid_get_toggle(epid, usb_pipeout(urb->pipe));
++ usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
++ usb_pipeout(urb->pipe), toggle);
++
++ /* Checks for Ctrl and Bulk EPs */
++ switch(usb_pipetype(urb->pipe)) {
++ case PIPE_BULK:
++ /* Check so Bulk EP realy is disabled before finishing active URB */
++ ASSERT((TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) ==
++ IO_STATE(USB_EP_command, enable, no));
++ /* Disable sub-pointer for EP to avoid next tx_interrupt() to
++ process Bulk EP. */
++ TxBulkEPList[epid].sub = 0;
++ /* No need to wait for the DMA before changing the next pointer.
++ The modulo NBR_OF_EPIDS isn't actually necessary, since we will never use
++ the last one (INVALID_EPID) for actual traffic. */
++ TxBulkEPList[epid].next =
++ virt_to_phys(&TxBulkEPList[(epid + 1) % NBR_OF_EPIDS]);
++ break;
++ case PIPE_CONTROL:
++ /* Check so Ctrl EP realy is disabled before finishing active URB */
++ ASSERT((TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) ==
++ IO_STATE(USB_EP_command, enable, no));
++ /* Disable sub-pointer for EP to avoid next tx_interrupt() to
++ process Ctrl EP. */
++ TxCtrlEPList[epid].sub = 0;
++ break;
++ }
++ }
++
++ /* Free HC-private URB data*/
++ urb_priv_free(hcd, urb);
++
++ if(urb->status) {
++ errno_dbg("finish_urb (URB:0x%x[%d] %s %s) (data:%d) status:%d\n",
++ (unsigned int)urb, urb_num, str_dir(urb->pipe),
++ str_type(urb->pipe), urb->actual_length, urb->status);
++ } else {
++ tc_dbg("finish_urb (URB:0x%x[%d] %s %s) (data:%d) status:%d\n",
++ (unsigned int)urb, urb_num, str_dir(urb->pipe),
++ str_type(urb->pipe), urb->actual_length, urb->status);
++ }
++
++ /* If we just finished an active URB, clear active pointer. */
++ if (urb == activeUrbList[epid]) {
++ /* Make URB not active on EP anymore */
++ activeUrbList[epid] = NULL;
++
++ if(urb->status == 0) {
++ /* URB finished sucessfully, process queue to see if there are any more
++ URBs waiting before we call completion function.*/
++ if(crisv10_hcd->running) {
++ /* Only process queue if USB controller is running */
++ tc_dma_process_queue(epid);
++ } else {
++ tc_warn("No processing of queue for epid:%d, USB Controller not"
++ " running\n", epid);
++ }
++ }
++ }
++
++ /* Hand the URB from HCD to its USB device driver, using its completion
++ functions */
++ usb_hcd_giveback_urb (hcd, urb);
++
++ /* Check the queue once more if the URB returned with error, because we
++ didn't do it before the completion function because the specification
++ states that the queue should not restart until all it's unlinked
++ URBs have been fully retired, with the completion functions run */
++ if(crisv10_hcd->running) {
++ /* Only process queue if USB controller is running */
++ tc_dma_process_queue(epid);
++ } else {
++ tc_warn("No processing of queue for epid:%d, USB Controller not running\n",
++ epid);
++ }
++
++ DBFEXIT;
++}
++
++static void tc_finish_isoc_urb(struct usb_hcd *hcd, struct urb *urb,
++ int status) {
++ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
++ int epid, i;
++ volatile int timeout = 10000;
++
++ ASSERT(urb_priv);
++ epid = urb_priv->epid;
++
++ ASSERT(usb_pipeisoc(urb->pipe));
++
++ /* Set that all isoc packets have status and length set before
++ completing the urb. */
++ for (i = urb_priv->isoc_packet_counter; i < urb->number_of_packets; i++){
++ urb->iso_frame_desc[i].actual_length = 0;
++ urb->iso_frame_desc[i].status = -EPROTO;
++ }
++
++ /* Check if the URB is currently active (done or error) */
++ if(urb == activeUrbList[epid]) {
++ /* Check if there are another In Isoc URB queued for this epid */
++ if (!list_empty(&urb_list[epid])&& !epid_state[epid].disabled) {
++ /* Move it from queue to active and mark it started so Isoc transfers
++ won't be interrupted.
++ All Isoc URBs data transfers are already added to DMA lists so we
++ don't have to insert anything in DMA lists here. */
++ activeUrbList[epid] = urb_list_first(epid);
++ ((struct crisv10_urb_priv *)(activeUrbList[epid]->hcpriv))->urb_state =
++ STARTED;
++ urb_list_del(activeUrbList[epid], epid);
++
++ if(urb->status) {
++ errno_dbg("finish_isoc_urb (URB:0x%x[%d] %s %s) (%d of %d packets)"
++ " status:%d, new waiting URB:0x%x[%d]\n",
++ (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
++ str_type(urb->pipe), urb_priv->isoc_packet_counter,
++ urb->number_of_packets, urb->status,
++ (unsigned int)activeUrbList[epid],
++ ((struct crisv10_urb_priv *)(activeUrbList[epid]->hcpriv))->urb_num);
++ }
++
++ } else { /* No other URB queued for this epid */
++ if(urb->status) {
++ errno_dbg("finish_isoc_urb (URB:0x%x[%d] %s %s) (%d of %d packets)"
++ " status:%d, no new URB waiting\n",
++ (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
++ str_type(urb->pipe), urb_priv->isoc_packet_counter,
++ urb->number_of_packets, urb->status);
++ }
++
++ /* Check if EP is still enabled, then shut it down. */
++ if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
++ isoc_dbg("Isoc EP enabled for epid:%d, disabling it\n", epid);
++
++ /* Should only occur for In Isoc EPs where SB isn't consumed. */
++ ASSERT(usb_pipein(urb->pipe));
++
++ /* Disable it and wait for it to stop */
++ TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
++
++ /* Ah, the luxury of busy-wait. */
++ while((*R_DMA_CH8_SUB3_EP == virt_to_phys(&TxIsocEPList[epid])) &&
++ (timeout-- > 0));
++ if(timeout == 0) {
++ warn("Timeout while waiting for DMA-TX-Isoc to leave EP for epid:%d\n", epid);
++ }
++ }
++
++ /* Unlink SB to say that epid is finished. */
++ TxIsocEPList[epid].sub = 0;
++ TxIsocEPList[epid].hw_len = 0;
++
++ /* No URB active for EP anymore */
++ activeUrbList[epid] = NULL;
++ }
++ } else { /* Finishing of not active URB (queued up with SBs thought) */
++ isoc_warn("finish_isoc_urb (URB:0x%x %s) (%d of %d packets) status:%d,"
++ " SB queued but not active\n",
++ (unsigned int)urb, str_dir(urb->pipe),
++ urb_priv->isoc_packet_counter, urb->number_of_packets,
++ urb->status);
++ if(usb_pipeout(urb->pipe)) {
++ /* Finishing of not yet active Out Isoc URB needs unlinking of SBs. */
++ struct USB_SB_Desc *iter_sb, *prev_sb, *next_sb;
++
++ iter_sb = TxIsocEPList[epid].sub ?
++ phys_to_virt(TxIsocEPList[epid].sub) : 0;
++ prev_sb = 0;
++
++ /* SB that is linked before this URBs first SB */
++ while (iter_sb && (iter_sb != urb_priv->first_sb)) {
++ prev_sb = iter_sb;
++ iter_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
++ }
++
++ if (iter_sb == 0) {
++ /* Unlink of the URB currently being transmitted. */
++ prev_sb = 0;
++ iter_sb = TxIsocEPList[epid].sub ? phys_to_virt(TxIsocEPList[epid].sub) : 0;
++ }
++
++ while (iter_sb && (iter_sb != urb_priv->last_sb)) {
++ iter_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
++ }
++
++ if (iter_sb) {
++ next_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
++ } else {
++ /* This should only happen if the DMA has completed
++ processing the SB list for this EP while interrupts
++ are disabled. */
++ isoc_dbg("Isoc urb not found, already sent?\n");
++ next_sb = 0;
++ }
++ if (prev_sb) {
++ prev_sb->next = next_sb ? virt_to_phys(next_sb) : 0;
++ } else {
++ TxIsocEPList[epid].sub = next_sb ? virt_to_phys(next_sb) : 0;
++ }
++ }
++ }
++
++ /* Free HC-private URB data*/
++ urb_priv_free(hcd, urb);
++
++ usb_release_bandwidth(urb->dev, urb, 0);
++
++ /* Hand the URB from HCD to its USB device driver, using its completion
++ functions */
++ usb_hcd_giveback_urb (hcd, urb);
++}
++
++static __u32 urb_num = 0;
++
++/* allocate and initialize URB private data */
++static int urb_priv_create(struct usb_hcd *hcd, struct urb *urb, int epid,
++ int mem_flags) {
++ struct crisv10_urb_priv *urb_priv;
++
++ urb_priv = kmalloc(sizeof *urb_priv, mem_flags);
++ if (!urb_priv)
++ return -ENOMEM;
++ memset(urb_priv, 0, sizeof *urb_priv);
++
++ urb_priv->epid = epid;
++ urb_priv->urb_state = NOT_STARTED;
++
++ urb->hcpriv = urb_priv;
++ /* Assign URB a sequence number, and increment counter */
++ urb_priv->urb_num = urb_num;
++ urb_num++;
++ return 0;
++}
++
++/* free URB private data */
++static void urb_priv_free(struct usb_hcd *hcd, struct urb *urb) {
++ int i;
++ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
++ ASSERT(urb_priv != 0);
++
++ /* Check it has any SBs linked that needs to be freed*/
++ if(urb_priv->first_sb != NULL) {
++ struct USB_SB_Desc *next_sb, *first_sb, *last_sb;
++ int i = 0;
++ first_sb = urb_priv->first_sb;
++ last_sb = urb_priv->last_sb;
++ ASSERT(last_sb);
++ while(first_sb != last_sb) {
++ next_sb = (struct USB_SB_Desc *)phys_to_virt(first_sb->next);
++ kmem_cache_free(usb_desc_cache, first_sb);
++ first_sb = next_sb;
++ i++;
++ }
++ kmem_cache_free(usb_desc_cache, last_sb);
++ i++;
++ }
++
++ /* Check if it has any EPs in its Intr pool that also needs to be freed */
++ if(urb_priv->intr_ep_pool_length > 0) {
++ for(i = 0; i < urb_priv->intr_ep_pool_length; i++) {
++ kfree(urb_priv->intr_ep_pool[i]);
++ }
++ /*
++ tc_dbg("Freed %d EPs from URB:0x%x EP pool\n",
++ urb_priv->intr_ep_pool_length, (unsigned int)urb);
++ */
++ }
++
++ kfree(urb_priv);
++ urb->hcpriv = NULL;
++}
++
++static int ep_priv_create(struct usb_host_endpoint *ep, int mem_flags) {
++ struct crisv10_ep_priv *ep_priv;
++
++ ep_priv = kmalloc(sizeof *ep_priv, mem_flags);
++ if (!ep_priv)
++ return -ENOMEM;
++ memset(ep_priv, 0, sizeof *ep_priv);
++
++ ep->hcpriv = ep_priv;
++ return 0;
++}
++
++static void ep_priv_free(struct usb_host_endpoint *ep) {
++ struct crisv10_ep_priv *ep_priv = ep->hcpriv;
++ ASSERT(ep_priv);
++ kfree(ep_priv);
++ ep->hcpriv = NULL;
++}
++
++/* EPID handling functions, managing EP-list in Etrax through wrappers */
++/* ------------------------------------------------------------------- */
++
++/* Sets up a new EPID for an endpoint or returns existing if found */
++static int tc_setup_epid(struct usb_host_endpoint *ep, struct urb *urb,
++ int mem_flags) {
++ int epid;
++ char devnum, endpoint, out_traffic, slow;
++ int maxlen;
++ __u32 epid_data;
++ struct crisv10_ep_priv *ep_priv = ep->hcpriv;
++
++ DBFENTER;
++
++ /* Check if a valid epid already is setup for this endpoint */
++ if(ep_priv != NULL) {
++ return ep_priv->epid;
++ }
++
++ /* We must find and initiate a new epid for this urb. */
++ epid = tc_allocate_epid();
++
++ if (epid == -1) {
++ /* Failed to allocate a new epid. */
++ DBFEXIT;
++ return epid;
++ }
++
++ /* We now have a new epid to use. Claim it. */
++ epid_state[epid].inuse = 1;
++
++ /* Init private data for new endpoint */
++ if(ep_priv_create(ep, mem_flags) != 0) {
++ return -ENOMEM;
++ }
++ ep_priv = ep->hcpriv;
++ ep_priv->epid = epid;
++
++ devnum = usb_pipedevice(urb->pipe);
++ endpoint = usb_pipeendpoint(urb->pipe);
++ slow = (urb->dev->speed == USB_SPEED_LOW);
++ maxlen = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
++
++ if (usb_pipetype(urb->pipe) == PIPE_CONTROL) {
++ /* We want both IN and OUT control traffic to be put on the same
++ EP/SB list. */
++ out_traffic = 1;
++ } else {
++ out_traffic = usb_pipeout(urb->pipe);
++ }
++
++ if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
++ epid_data = IO_STATE(R_USB_EPT_DATA_ISO, valid, yes) |
++ /* FIXME: Change any to the actual port? */
++ IO_STATE(R_USB_EPT_DATA_ISO, port, any) |
++ IO_FIELD(R_USB_EPT_DATA_ISO, max_len, maxlen) |
++ IO_FIELD(R_USB_EPT_DATA_ISO, ep, endpoint) |
++ IO_FIELD(R_USB_EPT_DATA_ISO, dev, devnum);
++ etrax_epid_iso_set(epid, epid_data);
++ } else {
++ epid_data = IO_STATE(R_USB_EPT_DATA, valid, yes) |
++ IO_FIELD(R_USB_EPT_DATA, low_speed, slow) |
++ /* FIXME: Change any to the actual port? */
++ IO_STATE(R_USB_EPT_DATA, port, any) |
++ IO_FIELD(R_USB_EPT_DATA, max_len, maxlen) |
++ IO_FIELD(R_USB_EPT_DATA, ep, endpoint) |
++ IO_FIELD(R_USB_EPT_DATA, dev, devnum);
++ etrax_epid_set(epid, epid_data);
++ }
++
++ epid_state[epid].out_traffic = out_traffic;
++ epid_state[epid].type = usb_pipetype(urb->pipe);
++
++ tc_warn("Setting up ep:0x%x epid:%d (addr:%d endp:%d max_len:%d %s %s %s)\n",
++ (unsigned int)ep, epid, devnum, endpoint, maxlen,
++ str_type(urb->pipe), out_traffic ? "out" : "in",
++ slow ? "low" : "full");
++
++ /* Enable Isoc eof interrupt if we set up the first Isoc epid */
++ if(usb_pipeisoc(urb->pipe)) {
++ isoc_epid_counter++;
++ if(isoc_epid_counter == 1) {
++ isoc_warn("Enabled Isoc eof interrupt\n");
++ *R_USB_IRQ_MASK_SET |= IO_STATE(R_USB_IRQ_MASK_SET, iso_eof, set);
++ }
++ }
++
++ DBFEXIT;
++ return epid;
++}
++
++static void tc_free_epid(struct usb_host_endpoint *ep) {
++ unsigned long flags;
++ struct crisv10_ep_priv *ep_priv = ep->hcpriv;
++ int epid;
++ volatile int timeout = 10000;
++
++ DBFENTER;
++
++ if (ep_priv == NULL) {
++ tc_warn("Trying to free unused epid on ep:0x%x\n", (unsigned int)ep);
++ DBFEXIT;
++ return;
++ }
++
++ epid = ep_priv->epid;
++
++ /* Disable Isoc eof interrupt if we free the last Isoc epid */
++ if(epid_isoc(epid)) {
++ ASSERT(isoc_epid_counter > 0);
++ isoc_epid_counter--;
++ if(isoc_epid_counter == 0) {
++ *R_USB_IRQ_MASK_SET &= ~IO_STATE(R_USB_IRQ_MASK_SET, iso_eof, set);
++ isoc_warn("Disabled Isoc eof interrupt\n");
++ }
++ }
++
++ /* Take lock manualy instead of in epid_x_x wrappers,
++ because we need to be polling here */
++ spin_lock_irqsave(&etrax_epid_lock, flags);
++
++ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
++ nop();
++ while((*R_USB_EPT_DATA & IO_MASK(R_USB_EPT_DATA, hold)) &&
++ (timeout-- > 0));
++ if(timeout == 0) {
++ warn("Timeout while waiting for epid:%d to drop hold\n", epid);
++ }
++ /* This will, among other things, set the valid field to 0. */
++ *R_USB_EPT_DATA = 0;
++ spin_unlock_irqrestore(&etrax_epid_lock, flags);
++
++ /* Free resource in software state info list */
++ epid_state[epid].inuse = 0;
++
++ /* Free private endpoint data */
++ ep_priv_free(ep);
++
++ DBFEXIT;
++}
++
++static int tc_allocate_epid(void) {
++ int i;
++ DBFENTER;
++ for (i = 0; i < NBR_OF_EPIDS; i++) {
++ if (!epid_inuse(i)) {
++ DBFEXIT;
++ return i;
++ }
++ }
++
++ tc_warn("Found no free epids\n");
++ DBFEXIT;
++ return -1;
+ }
+
+
+-static void init_tx_intr_ep(void)
+-{
+- int i;
++/* Wrappers around the list functions (include/linux/list.h). */
++/* ---------------------------------------------------------- */
++static inline int __urb_list_empty(int epid) {
++ int retval;
++ retval = list_empty(&urb_list[epid]);
++ return retval;
++}
+
+- DBFENTER;
++/* Returns first urb for this epid, or NULL if list is empty. */
++static inline struct urb *urb_list_first(int epid) {
++ unsigned long flags;
++ struct urb *first_urb = 0;
++ spin_lock_irqsave(&urb_list_lock, flags);
++ if (!__urb_list_empty(epid)) {
++ /* Get the first urb (i.e. head->next). */
++ urb_entry_t *urb_entry = list_entry((&urb_list[epid])->next, urb_entry_t, list);
++ first_urb = urb_entry->urb;
++ }
++ spin_unlock_irqrestore(&urb_list_lock, flags);
++ return first_urb;
++}
+
+- /* Read comment at zout_buffer declaration for an explanation to this. */
+- TxIntrSB_zout.sw_len = 1;
+- TxIntrSB_zout.next = 0;
+- TxIntrSB_zout.buf = virt_to_phys(&zout_buffer[0]);
+- TxIntrSB_zout.command = (IO_FIELD(USB_SB_command, rem, 0) |
+- IO_STATE(USB_SB_command, tt, zout) |
+- IO_STATE(USB_SB_command, full, yes) |
+- IO_STATE(USB_SB_command, eot, yes) |
+- IO_STATE(USB_SB_command, eol, yes));
+-
+- for (i = 0; i < (MAX_INTR_INTERVAL - 1); i++) {
+- CHECK_ALIGN(&TxIntrEPList[i]);
+- TxIntrEPList[i].hw_len = 0;
+- TxIntrEPList[i].command =
+- (IO_STATE(USB_EP_command, eof, yes) |
+- IO_STATE(USB_EP_command, enable, yes) |
+- IO_FIELD(USB_EP_command, epid, INVALID_EPID));
+- TxIntrEPList[i].sub = virt_to_phys(&TxIntrSB_zout);
+- TxIntrEPList[i].next = virt_to_phys(&TxIntrEPList[i + 1]);
+- }
++/* Adds an urb_entry last in the list for this epid. */
++static inline void urb_list_add(struct urb *urb, int epid, int mem_flags) {
++ unsigned long flags;
++ urb_entry_t *urb_entry = (urb_entry_t *)kmalloc(sizeof(urb_entry_t), mem_flags);
++ ASSERT(urb_entry);
++
++ urb_entry->urb = urb;
++ spin_lock_irqsave(&urb_list_lock, flags);
++ list_add_tail(&urb_entry->list, &urb_list[epid]);
++ spin_unlock_irqrestore(&urb_list_lock, flags);
++}
+
+- CHECK_ALIGN(&TxIntrEPList[i]);
+- TxIntrEPList[i].hw_len = 0;
+- TxIntrEPList[i].command =
+- (IO_STATE(USB_EP_command, eof, yes) |
+- IO_STATE(USB_EP_command, eol, yes) |
+- IO_STATE(USB_EP_command, enable, yes) |
+- IO_FIELD(USB_EP_command, epid, INVALID_EPID));
+- TxIntrEPList[i].sub = virt_to_phys(&TxIntrSB_zout);
+- TxIntrEPList[i].next = virt_to_phys(&TxIntrEPList[0]);
+-
+- *R_DMA_CH8_SUB2_EP = virt_to_phys(&TxIntrEPList[0]);
+- *R_DMA_CH8_SUB2_CMD = IO_STATE(R_DMA_CH8_SUB2_CMD, cmd, start);
+- DBFEXIT;
++/* Search through the list for an element that contains this urb. (The list
++ is expected to be short and the one we are about to delete will often be
++ the first in the list.)
++ Should be protected by spin_locks in calling function */
++static inline urb_entry_t *__urb_list_entry(struct urb *urb, int epid) {
++ struct list_head *entry;
++ struct list_head *tmp;
++ urb_entry_t *urb_entry;
++
++ list_for_each_safe(entry, tmp, &urb_list[epid]) {
++ urb_entry = list_entry(entry, urb_entry_t, list);
++ ASSERT(urb_entry);
++ ASSERT(urb_entry->urb);
++
++ if (urb_entry->urb == urb) {
++ return urb_entry;
++ }
++ }
++ return 0;
++}
++
++/* Same function as above but for global use. Protects list by spinlock */
++static inline urb_entry_t *urb_list_entry(struct urb *urb, int epid) {
++ unsigned long flags;
++ urb_entry_t *urb_entry;
++ spin_lock_irqsave(&urb_list_lock, flags);
++ urb_entry = __urb_list_entry(urb, epid);
++ spin_unlock_irqrestore(&urb_list_lock, flags);
++ return (urb_entry);
+ }
+
+-static void init_tx_isoc_ep(void)
+-{
+- int i;
++/* Delete an urb from the list. */
++static inline void urb_list_del(struct urb *urb, int epid) {
++ unsigned long flags;
++ urb_entry_t *urb_entry;
++
++ /* Delete entry and free. */
++ spin_lock_irqsave(&urb_list_lock, flags);
++ urb_entry = __urb_list_entry(urb, epid);
++ ASSERT(urb_entry);
++
++ list_del(&urb_entry->list);
++ spin_unlock_irqrestore(&urb_list_lock, flags);
++ kfree(urb_entry);
++}
+
+- DBFENTER;
++/* Move an urb to the end of the list. */
++static inline void urb_list_move_last(struct urb *urb, int epid) {
++ unsigned long flags;
++ urb_entry_t *urb_entry;
++
++ spin_lock_irqsave(&urb_list_lock, flags);
++ urb_entry = __urb_list_entry(urb, epid);
++ ASSERT(urb_entry);
++
++ list_del(&urb_entry->list);
++ list_add_tail(&urb_entry->list, &urb_list[epid]);
++ spin_unlock_irqrestore(&urb_list_lock, flags);
++}
+
+- /* Read comment at zout_buffer declaration for an explanation to this. */
+- TxIsocSB_zout.sw_len = 1;
+- TxIsocSB_zout.next = 0;
+- TxIsocSB_zout.buf = virt_to_phys(&zout_buffer[0]);
+- TxIsocSB_zout.command = (IO_FIELD(USB_SB_command, rem, 0) |
+- IO_STATE(USB_SB_command, tt, zout) |
+- IO_STATE(USB_SB_command, full, yes) |
+- IO_STATE(USB_SB_command, eot, yes) |
+- IO_STATE(USB_SB_command, eol, yes));
+-
+- /* The last isochronous EP descriptor is a dummy. */
+-
+- for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
+- CHECK_ALIGN(&TxIsocEPList[i]);
+- TxIsocEPList[i].hw_len = 0;
+- TxIsocEPList[i].command = IO_FIELD(USB_EP_command, epid, i);
+- TxIsocEPList[i].sub = 0;
+- TxIsocEPList[i].next = virt_to_phys(&TxIsocEPList[i + 1]);
++/* Get the next urb in the list. */
++static inline struct urb *urb_list_next(struct urb *urb, int epid) {
++ unsigned long flags;
++ urb_entry_t *urb_entry;
++
++ spin_lock_irqsave(&urb_list_lock, flags);
++ urb_entry = __urb_list_entry(urb, epid);
++ ASSERT(urb_entry);
++
++ if (urb_entry->list.next != &urb_list[epid]) {
++ struct list_head *elem = urb_entry->list.next;
++ urb_entry = list_entry(elem, urb_entry_t, list);
++ spin_unlock_irqrestore(&urb_list_lock, flags);
++ return urb_entry->urb;
++ } else {
++ spin_unlock_irqrestore(&urb_list_lock, flags);
++ return NULL;
++ }
++}
++
++struct USB_EP_Desc* create_ep(int epid, struct USB_SB_Desc* sb_desc,
++ int mem_flags) {
++ struct USB_EP_Desc *ep_desc;
++ ep_desc = (struct USB_EP_Desc *) kmem_cache_alloc(usb_desc_cache, mem_flags);
++ if(ep_desc == NULL)
++ return NULL;
++ memset(ep_desc, 0, sizeof(struct USB_EP_Desc));
++
++ ep_desc->hw_len = 0;
++ ep_desc->command = (IO_FIELD(USB_EP_command, epid, epid) |
++ IO_STATE(USB_EP_command, enable, yes));
++ if(sb_desc == NULL) {
++ ep_desc->sub = 0;
++ } else {
++ ep_desc->sub = virt_to_phys(sb_desc);
++ }
++ return ep_desc;
++}
++
++#define TT_ZOUT 0
++#define TT_IN 1
++#define TT_OUT 2
++#define TT_SETUP 3
++
++#define CMD_EOL IO_STATE(USB_SB_command, eol, yes)
++#define CMD_INTR IO_STATE(USB_SB_command, intr, yes)
++#define CMD_FULL IO_STATE(USB_SB_command, full, yes)
++
++/* Allocation and setup of a generic SB. Used to create SETUP, OUT and ZOUT
++ SBs. Also used by create_sb_in() to avoid same allocation procedure at two
++ places */
++struct USB_SB_Desc* create_sb(struct USB_SB_Desc* sb_prev, int tt, void* data,
++ int datalen, int mem_flags) {
++ struct USB_SB_Desc *sb_desc;
++ sb_desc = (struct USB_SB_Desc*)kmem_cache_alloc(usb_desc_cache, mem_flags);
++ if(sb_desc == NULL)
++ return NULL;
++ memset(sb_desc, 0, sizeof(struct USB_SB_Desc));
++
++ sb_desc->command = IO_FIELD(USB_SB_command, tt, tt) |
++ IO_STATE(USB_SB_command, eot, yes);
++
++ sb_desc->sw_len = datalen;
++ if(data != NULL) {
++ sb_desc->buf = virt_to_phys(data);
++ } else {
++ sb_desc->buf = 0;
++ }
++ if(sb_prev != NULL) {
++ sb_prev->next = virt_to_phys(sb_desc);
++ }
++ return sb_desc;
++}
++
++/* Creates a copy of an existing SB by allocation space for it and copy
++ settings */
++struct USB_SB_Desc* create_sb_copy(struct USB_SB_Desc* sb_orig, int mem_flags) {
++ struct USB_SB_Desc *sb_desc;
++ sb_desc = (struct USB_SB_Desc*)kmem_cache_alloc(usb_desc_cache, mem_flags);
++ if(sb_desc == NULL)
++ return NULL;
++
++ memcpy(sb_desc, sb_orig, sizeof(struct USB_SB_Desc));
++ return sb_desc;
++}
++
++/* A specific create_sb function for creation of in SBs. This is due to
++ that datalen in In SBs shows how many packets we are expecting. It also
++ sets up the rem field to show if how many bytes we expect in last packet
++ if it's not a full one */
++struct USB_SB_Desc* create_sb_in(struct USB_SB_Desc* sb_prev, int datalen,
++ int maxlen, int mem_flags) {
++ struct USB_SB_Desc *sb_desc;
++ sb_desc = create_sb(sb_prev, TT_IN, NULL,
++ datalen ? (datalen - 1) / maxlen + 1 : 0, mem_flags);
++ if(sb_desc == NULL)
++ return NULL;
++ sb_desc->command |= IO_FIELD(USB_SB_command, rem, datalen % maxlen);
++ return sb_desc;
++}
++
++void set_sb_cmds(struct USB_SB_Desc *sb_desc, __u16 flags) {
++ sb_desc->command |= flags;
++}
++
++int create_sb_for_urb(struct urb *urb, int mem_flags) {
++ int is_out = !usb_pipein(urb->pipe);
++ int type = usb_pipetype(urb->pipe);
++ int maxlen = usb_maxpacket(urb->dev, urb->pipe, is_out);
++ int buf_len = urb->transfer_buffer_length;
++ void *buf = buf_len > 0 ? urb->transfer_buffer : NULL;
++ struct USB_SB_Desc *sb_desc = NULL;
++
++ struct crisv10_urb_priv *urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
++ ASSERT(urb_priv != NULL);
++
++ switch(type) {
++ case PIPE_CONTROL:
++ /* Setup stage */
++ sb_desc = create_sb(NULL, TT_SETUP, urb->setup_packet, 8, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++ set_sb_cmds(sb_desc, CMD_FULL);
++
++ /* Attach first SB to URB */
++ urb_priv->first_sb = sb_desc;
++
++ if (is_out) { /* Out Control URB */
++ /* If this Control OUT transfer has an optional data stage we add
++ an OUT token before the mandatory IN (status) token */
++ if ((buf_len > 0) && buf) {
++ sb_desc = create_sb(sb_desc, TT_OUT, buf, buf_len, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++ set_sb_cmds(sb_desc, CMD_FULL);
++ }
++
++ /* Status stage */
++ /* The data length has to be exactly 1. This is due to a requirement
++ of the USB specification that a host must be prepared to receive
++ data in the status phase */
++ sb_desc = create_sb(sb_desc, TT_IN, NULL, 1, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++ } else { /* In control URB */
++ /* Data stage */
++ sb_desc = create_sb_in(sb_desc, buf_len, maxlen, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++
++ /* Status stage */
++ /* Read comment at zout_buffer declaration for an explanation to this. */
++ sb_desc = create_sb(sb_desc, TT_ZOUT, &zout_buffer[0], 1, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++ /* Set descriptor interrupt flag for in URBs so we can finish URB after
++ zout-packet has been sent */
++ set_sb_cmds(sb_desc, CMD_INTR | CMD_FULL);
++ }
++ /* Set end-of-list flag in last SB */
++ set_sb_cmds(sb_desc, CMD_EOL);
++ /* Attach last SB to URB */
++ urb_priv->last_sb = sb_desc;
++ break;
++
++ case PIPE_BULK:
++ if (is_out) { /* Out Bulk URB */
++ sb_desc = create_sb(NULL, TT_OUT, buf, buf_len, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++ /* The full field is set to yes, even if we don't actually check that
++ this is a full-length transfer (i.e., that transfer_buffer_length %
++ maxlen = 0).
++ Setting full prevents the USB controller from sending an empty packet
++ in that case. However, if URB_ZERO_PACKET was set we want that. */
++ if (!(urb->transfer_flags & URB_ZERO_PACKET)) {
++ set_sb_cmds(sb_desc, CMD_FULL);
++ }
++ } else { /* In Bulk URB */
++ sb_desc = create_sb_in(NULL, buf_len, maxlen, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++ }
++ /* Set end-of-list flag for last SB */
++ set_sb_cmds(sb_desc, CMD_EOL);
++
++ /* Attach SB to URB */
++ urb_priv->first_sb = sb_desc;
++ urb_priv->last_sb = sb_desc;
++ break;
++
++ case PIPE_INTERRUPT:
++ if(is_out) { /* Out Intr URB */
++ sb_desc = create_sb(NULL, TT_OUT, buf, buf_len, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++
++ /* The full field is set to yes, even if we don't actually check that
++ this is a full-length transfer (i.e., that transfer_buffer_length %
++ maxlen = 0).
++ Setting full prevents the USB controller from sending an empty packet
++ in that case. However, if URB_ZERO_PACKET was set we want that. */
++ if (!(urb->transfer_flags & URB_ZERO_PACKET)) {
++ set_sb_cmds(sb_desc, CMD_FULL);
++ }
++ /* Only generate TX interrupt if it's a Out URB*/
++ set_sb_cmds(sb_desc, CMD_INTR);
++
++ } else { /* In Intr URB */
++ sb_desc = create_sb_in(NULL, buf_len, maxlen, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++ }
++ /* Set end-of-list flag for last SB */
++ set_sb_cmds(sb_desc, CMD_EOL);
++
++ /* Attach SB to URB */
++ urb_priv->first_sb = sb_desc;
++ urb_priv->last_sb = sb_desc;
++
++ break;
++ case PIPE_ISOCHRONOUS:
++ if(is_out) { /* Out Isoc URB */
++ int i;
++ if(urb->number_of_packets == 0) {
++ tc_err("Can't create SBs for Isoc URB with zero packets\n");
++ return -EPIPE;
++ }
++ /* Create one SB descriptor for each packet and link them together. */
++ for(i = 0; i < urb->number_of_packets; i++) {
++ if (urb->iso_frame_desc[i].length > 0) {
++
++ sb_desc = create_sb(sb_desc, TT_OUT, urb->transfer_buffer +
++ urb->iso_frame_desc[i].offset,
++ urb->iso_frame_desc[i].length, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++
++ /* Check if it's a full length packet */
++ if (urb->iso_frame_desc[i].length ==
++ usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe))) {
++ set_sb_cmds(sb_desc, CMD_FULL);
++ }
++
++ } else { /* zero length packet */
++ sb_desc = create_sb(sb_desc, TT_ZOUT, &zout_buffer[0], 1, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++ set_sb_cmds(sb_desc, CMD_FULL);
++ }
++ /* Attach first SB descriptor to URB */
++ if (i == 0) {
++ urb_priv->first_sb = sb_desc;
++ }
++ }
++ /* Set interrupt and end-of-list flags in last SB */
++ set_sb_cmds(sb_desc, CMD_INTR | CMD_EOL);
++ /* Attach last SB descriptor to URB */
++ urb_priv->last_sb = sb_desc;
++ tc_dbg("Created %d out SBs for Isoc URB:0x%x\n",
++ urb->number_of_packets, (unsigned int)urb);
++ } else { /* In Isoc URB */
++ /* Actual number of packets is not relevant for periodic in traffic as
++ long as it is more than zero. Set to 1 always. */
++ sb_desc = create_sb(sb_desc, TT_IN, NULL, 1, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++ /* Set end-of-list flags for SB */
++ set_sb_cmds(sb_desc, CMD_EOL);
++
++ /* Attach SB to URB */
++ urb_priv->first_sb = sb_desc;
++ urb_priv->last_sb = sb_desc;
++ }
++ break;
++ default:
++ tc_err("Unknown pipe-type\n");
++ return -EPIPE;
++ break;
++ }
++ return 0;
++}
++
++int init_intr_urb(struct urb *urb, int mem_flags) {
++ struct crisv10_urb_priv *urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
++ struct USB_EP_Desc* ep_desc;
++ int interval;
++ int i;
++ int ep_count;
++
++ ASSERT(urb_priv != NULL);
++ ASSERT(usb_pipeint(urb->pipe));
++ /* We can't support interval longer than amount of eof descriptors in
++ TxIntrEPList */
++ if(urb->interval > MAX_INTR_INTERVAL) {
++ tc_err("Interrupt interval %dms too big (max: %dms)\n", urb->interval,
++ MAX_INTR_INTERVAL);
++ return -EINVAL;
++ }
++
++ /* We assume that the SB descriptors already have been setup */
++ ASSERT(urb_priv->first_sb != NULL);
++
++ /* Round of the interval to 2^n, it is obvious that this code favours
++ smaller numbers, but that is actually a good thing */
++ /* FIXME: The "rounding error" for larger intervals will be quite
++ large. For in traffic this shouldn't be a problem since it will only
++ mean that we "poll" more often. */
++ interval = urb->interval;
++ for (i = 0; interval; i++) {
++ interval = interval >> 1;
++ }
++ urb_priv->interval = 1 << (i - 1);
++
++ /* We can only have max interval for Out Interrupt due to that we can only
++ handle one linked in EP for a certain epid in the Intr descr array at the
++ time. The USB Controller in the Etrax 100LX continues to process Intr EPs
++ so we have no way of knowing which one that caused the actual transfer if
++ we have several linked in. */
++ if(usb_pipeout(urb->pipe)) {
++ urb_priv->interval = MAX_INTR_INTERVAL;
++ }
++
++ /* Calculate amount of EPs needed */
++ ep_count = MAX_INTR_INTERVAL / urb_priv->interval;
++
++ for(i = 0; i < ep_count; i++) {
++ ep_desc = create_ep(urb_priv->epid, urb_priv->first_sb, mem_flags);
++ if(ep_desc == NULL) {
++ /* Free any descriptors that we may have allocated before failure */
++ while(i > 0) {
++ i--;
++ kfree(urb_priv->intr_ep_pool[i]);
++ }
++ return -ENOMEM;
++ }
++ urb_priv->intr_ep_pool[i] = ep_desc;
++ }
++ urb_priv->intr_ep_pool_length = ep_count;
++ return 0;
++}
++
++/* DMA RX/TX functions */
++/* ----------------------- */
++
++static void tc_dma_init_rx_list(void) {
++ int i;
++
++ /* Setup descriptor list except last one */
++ for (i = 0; i < (NBR_OF_RX_DESC - 1); i++) {
++ RxDescList[i].sw_len = RX_DESC_BUF_SIZE;
++ RxDescList[i].command = 0;
++ RxDescList[i].next = virt_to_phys(&RxDescList[i + 1]);
++ RxDescList[i].buf = virt_to_phys(RxBuf + (i * RX_DESC_BUF_SIZE));
++ RxDescList[i].hw_len = 0;
++ RxDescList[i].status = 0;
++
++ /* DMA IN cache bug. (struct etrax_dma_descr has the same layout as
++ USB_IN_Desc for the relevant fields.) */
++ prepare_rx_descriptor((struct etrax_dma_descr*)&RxDescList[i]);
++
++ }
++ /* Special handling of last descriptor */
++ RxDescList[i].sw_len = RX_DESC_BUF_SIZE;
++ RxDescList[i].command = IO_STATE(USB_IN_command, eol, yes);
++ RxDescList[i].next = virt_to_phys(&RxDescList[0]);
++ RxDescList[i].buf = virt_to_phys(RxBuf + (i * RX_DESC_BUF_SIZE));
++ RxDescList[i].hw_len = 0;
++ RxDescList[i].status = 0;
++
++ /* Setup list pointers that show progress in list */
++ myNextRxDesc = &RxDescList[0];
++ myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
++
++ flush_etrax_cache();
++ /* Point DMA to first descriptor in list and start it */
++ *R_DMA_CH9_FIRST = virt_to_phys(myNextRxDesc);
++ *R_DMA_CH9_CMD = IO_STATE(R_DMA_CH9_CMD, cmd, start);
++}
++
++
++static void tc_dma_init_tx_bulk_list(void) {
++ int i;
++ volatile struct USB_EP_Desc *epDescr;
++
++ for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
++ epDescr = &(TxBulkEPList[i]);
++ CHECK_ALIGN(epDescr);
++ epDescr->hw_len = 0;
++ epDescr->command = IO_FIELD(USB_EP_command, epid, i);
++ epDescr->sub = 0;
++ epDescr->next = virt_to_phys(&TxBulkEPList[i + 1]);
++
++ /* Initiate two EPs, disabled and with the eol flag set. No need for any
++ preserved epid. */
++
++ /* The first one has the intr flag set so we get an interrupt when the DMA
++ channel is about to become disabled. */
++ CHECK_ALIGN(&TxBulkDummyEPList[i][0]);
++ TxBulkDummyEPList[i][0].hw_len = 0;
++ TxBulkDummyEPList[i][0].command = (IO_FIELD(USB_EP_command, epid, DUMMY_EPID) |
++ IO_STATE(USB_EP_command, eol, yes) |
++ IO_STATE(USB_EP_command, intr, yes));
++ TxBulkDummyEPList[i][0].sub = 0;
++ TxBulkDummyEPList[i][0].next = virt_to_phys(&TxBulkDummyEPList[i][1]);
++
++ /* The second one. */
++ CHECK_ALIGN(&TxBulkDummyEPList[i][1]);
++ TxBulkDummyEPList[i][1].hw_len = 0;
++ TxBulkDummyEPList[i][1].command = (IO_FIELD(USB_EP_command, epid, DUMMY_EPID) |
++ IO_STATE(USB_EP_command, eol, yes));
++ TxBulkDummyEPList[i][1].sub = 0;
++ /* The last dummy's next pointer is the same as the current EP's next pointer. */
++ TxBulkDummyEPList[i][1].next = virt_to_phys(&TxBulkEPList[i + 1]);
++ }
++
++ /* Special handling of last descr in list, make list circular */
++ epDescr = &TxBulkEPList[i];
++ CHECK_ALIGN(epDescr);
++ epDescr->hw_len = 0;
++ epDescr->command = IO_STATE(USB_EP_command, eol, yes) |
++ IO_FIELD(USB_EP_command, epid, i);
++ epDescr->sub = 0;
++ epDescr->next = virt_to_phys(&TxBulkEPList[0]);
++
++ /* Init DMA sub-channel pointers to last item in each list */
++ *R_DMA_CH8_SUB0_EP = virt_to_phys(&TxBulkEPList[i]);
++ /* No point in starting the bulk channel yet.
++ *R_DMA_CH8_SUB0_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start); */
++}
++
++static void tc_dma_init_tx_ctrl_list(void) {
++ int i;
++ volatile struct USB_EP_Desc *epDescr;
++
++ for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
++ epDescr = &(TxCtrlEPList[i]);
++ CHECK_ALIGN(epDescr);
++ epDescr->hw_len = 0;
++ epDescr->command = IO_FIELD(USB_EP_command, epid, i);
++ epDescr->sub = 0;
++ epDescr->next = virt_to_phys(&TxCtrlEPList[i + 1]);
++ }
++ /* Special handling of last descr in list, make list circular */
++ epDescr = &TxCtrlEPList[i];
++ CHECK_ALIGN(epDescr);
++ epDescr->hw_len = 0;
++ epDescr->command = IO_STATE(USB_EP_command, eol, yes) |
++ IO_FIELD(USB_EP_command, epid, i);
++ epDescr->sub = 0;
++ epDescr->next = virt_to_phys(&TxCtrlEPList[0]);
++
++ /* Init DMA sub-channel pointers to last item in each list */
++ *R_DMA_CH8_SUB1_EP = virt_to_phys(&TxCtrlEPList[i]);
++ /* No point in starting the ctrl channel yet.
++ *R_DMA_CH8_SUB1_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start); */
++}
++
++
++static void tc_dma_init_tx_intr_list(void) {
++ int i;
++
++ TxIntrSB_zout.sw_len = 1;
++ TxIntrSB_zout.next = 0;
++ TxIntrSB_zout.buf = virt_to_phys(&zout_buffer[0]);
++ TxIntrSB_zout.command = (IO_FIELD(USB_SB_command, rem, 0) |
++ IO_STATE(USB_SB_command, tt, zout) |
++ IO_STATE(USB_SB_command, full, yes) |
++ IO_STATE(USB_SB_command, eot, yes) |
++ IO_STATE(USB_SB_command, eol, yes));
++
++ for (i = 0; i < (MAX_INTR_INTERVAL - 1); i++) {
++ CHECK_ALIGN(&TxIntrEPList[i]);
++ TxIntrEPList[i].hw_len = 0;
++ TxIntrEPList[i].command =
++ (IO_STATE(USB_EP_command, eof, yes) |
++ IO_STATE(USB_EP_command, enable, yes) |
++ IO_FIELD(USB_EP_command, epid, INVALID_EPID));
++ TxIntrEPList[i].sub = virt_to_phys(&TxIntrSB_zout);
++ TxIntrEPList[i].next = virt_to_phys(&TxIntrEPList[i + 1]);
++ }
++
++ /* Special handling of last descr in list, make list circular */
++ CHECK_ALIGN(&TxIntrEPList[i]);
++ TxIntrEPList[i].hw_len = 0;
++ TxIntrEPList[i].command =
++ (IO_STATE(USB_EP_command, eof, yes) |
++ IO_STATE(USB_EP_command, eol, yes) |
++ IO_STATE(USB_EP_command, enable, yes) |
++ IO_FIELD(USB_EP_command, epid, INVALID_EPID));
++ TxIntrEPList[i].sub = virt_to_phys(&TxIntrSB_zout);
++ TxIntrEPList[i].next = virt_to_phys(&TxIntrEPList[0]);
++
++ intr_dbg("Initiated Intr EP descriptor list\n");
++
++
++ /* Connect DMA 8 sub-channel 2 to first in list */
++ *R_DMA_CH8_SUB2_EP = virt_to_phys(&TxIntrEPList[0]);
++}
++
++static void tc_dma_init_tx_isoc_list(void) {
++ int i;
++
++ DBFENTER;
++
++ /* Read comment at zout_buffer declaration for an explanation to this. */
++ TxIsocSB_zout.sw_len = 1;
++ TxIsocSB_zout.next = 0;
++ TxIsocSB_zout.buf = virt_to_phys(&zout_buffer[0]);
++ TxIsocSB_zout.command = (IO_FIELD(USB_SB_command, rem, 0) |
++ IO_STATE(USB_SB_command, tt, zout) |
++ IO_STATE(USB_SB_command, full, yes) |
++ IO_STATE(USB_SB_command, eot, yes) |
++ IO_STATE(USB_SB_command, eol, yes));
++
++ /* The last isochronous EP descriptor is a dummy. */
++ for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
++ CHECK_ALIGN(&TxIsocEPList[i]);
++ TxIsocEPList[i].hw_len = 0;
++ TxIsocEPList[i].command = IO_FIELD(USB_EP_command, epid, i);
++ TxIsocEPList[i].sub = 0;
++ TxIsocEPList[i].next = virt_to_phys(&TxIsocEPList[i + 1]);
++ }
++
++ CHECK_ALIGN(&TxIsocEPList[i]);
++ TxIsocEPList[i].hw_len = 0;
++
++ /* Must enable the last EP descr to get eof interrupt. */
++ TxIsocEPList[i].command = (IO_STATE(USB_EP_command, enable, yes) |
++ IO_STATE(USB_EP_command, eof, yes) |
++ IO_STATE(USB_EP_command, eol, yes) |
++ IO_FIELD(USB_EP_command, epid, INVALID_EPID));
++ TxIsocEPList[i].sub = virt_to_phys(&TxIsocSB_zout);
++ TxIsocEPList[i].next = virt_to_phys(&TxIsocEPList[0]);
++
++ *R_DMA_CH8_SUB3_EP = virt_to_phys(&TxIsocEPList[0]);
++ *R_DMA_CH8_SUB3_CMD = IO_STATE(R_DMA_CH8_SUB3_CMD, cmd, start);
++}
++
++static int tc_dma_init(struct usb_hcd *hcd) {
++ tc_dma_init_rx_list();
++ tc_dma_init_tx_bulk_list();
++ tc_dma_init_tx_ctrl_list();
++ tc_dma_init_tx_intr_list();
++ tc_dma_init_tx_isoc_list();
++
++ if (cris_request_dma(USB_TX_DMA_NBR,
++ "ETRAX 100LX built-in USB (Tx)",
++ DMA_VERBOSE_ON_ERROR,
++ dma_usb)) {
++ err("Could not allocate DMA ch 8 for USB");
++ return -EBUSY;
++ }
++
++ if (cris_request_dma(USB_RX_DMA_NBR,
++ "ETRAX 100LX built-in USB (Rx)",
++ DMA_VERBOSE_ON_ERROR,
++ dma_usb)) {
++ err("Could not allocate DMA ch 9 for USB");
++ return -EBUSY;
++ }
++
++ *R_IRQ_MASK2_SET =
++ /* Note that these interrupts are not used. */
++ IO_STATE(R_IRQ_MASK2_SET, dma8_sub0_descr, set) |
++ /* Sub channel 1 (ctrl) descr. interrupts are used. */
++ IO_STATE(R_IRQ_MASK2_SET, dma8_sub1_descr, set) |
++ IO_STATE(R_IRQ_MASK2_SET, dma8_sub2_descr, set) |
++ /* Sub channel 3 (isoc) descr. interrupts are used. */
++ IO_STATE(R_IRQ_MASK2_SET, dma8_sub3_descr, set);
++
++ /* Note that the dma9_descr interrupt is not used. */
++ *R_IRQ_MASK2_SET =
++ IO_STATE(R_IRQ_MASK2_SET, dma9_eop, set) |
++ IO_STATE(R_IRQ_MASK2_SET, dma9_descr, set);
++
++ if (request_irq(ETRAX_USB_RX_IRQ, tc_dma_rx_interrupt, 0,
++ "ETRAX 100LX built-in USB (Rx)", hcd)) {
++ err("Could not allocate IRQ %d for USB", ETRAX_USB_RX_IRQ);
++ return -EBUSY;
++ }
++
++ if (request_irq(ETRAX_USB_TX_IRQ, tc_dma_tx_interrupt, 0,
++ "ETRAX 100LX built-in USB (Tx)", hcd)) {
++ err("Could not allocate IRQ %d for USB", ETRAX_USB_TX_IRQ);
++ return -EBUSY;
++ }
++
++ return 0;
++}
++
++static void tc_dma_destroy(void) {
++ free_irq(ETRAX_USB_RX_IRQ, NULL);
++ free_irq(ETRAX_USB_TX_IRQ, NULL);
++
++ cris_free_dma(USB_TX_DMA_NBR, "ETRAX 100LX built-in USB (Tx)");
++ cris_free_dma(USB_RX_DMA_NBR, "ETRAX 100LX built-in USB (Rx)");
++
++}
++
++static void tc_dma_link_intr_urb(struct urb *urb);
++
++/* Handle processing of Bulk, Ctrl and Intr queues */
++static void tc_dma_process_queue(int epid) {
++ struct urb *urb;
++ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
++ unsigned long flags;
++ char toggle;
++
++ if(epid_state[epid].disabled) {
++ /* Don't process any URBs on a disabled endpoint */
++ return;
++ }
++
++ /* Do not disturb us while fiddling with EPs and epids */
++ local_irq_save(flags);
++
++ /* For bulk, Ctrl and Intr can we only have one URB active at a time for
++ a specific EP. */
++ if(activeUrbList[epid] != NULL) {
++ /* An URB is already active on EP, skip checking queue */
++ local_irq_restore(flags);
++ return;
++ }
++
++ urb = urb_list_first(epid);
++ if(urb == NULL) {
++ /* No URB waiting in EP queue. Nothing do to */
++ local_irq_restore(flags);
++ return;
++ }
++
++ urb_priv = urb->hcpriv;
++ ASSERT(urb_priv != NULL);
++ ASSERT(urb_priv->urb_state == NOT_STARTED);
++ ASSERT(!usb_pipeisoc(urb->pipe));
++
++ /* Remove this URB from the queue and move it to active */
++ activeUrbList[epid] = urb;
++ urb_list_del(urb, epid);
++
++ urb_priv->urb_state = STARTED;
++
++ /* Reset error counters (regardless of which direction this traffic is). */
++ etrax_epid_clear_error(epid);
++
++ /* Special handling of Intr EP lists */
++ if(usb_pipeint(urb->pipe)) {
++ tc_dma_link_intr_urb(urb);
++ local_irq_restore(flags);
++ return;
++ }
++
++ /* Software must preset the toggle bits for Bulk and Ctrl */
++ if(usb_pipecontrol(urb->pipe)) {
++ /* Toggle bits are initialized only during setup transaction in a
++ CTRL transfer */
++ etrax_epid_set_toggle(epid, 0, 0);
++ etrax_epid_set_toggle(epid, 1, 0);
++ } else {
++ toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
++ usb_pipeout(urb->pipe));
++ etrax_epid_set_toggle(epid, usb_pipeout(urb->pipe), toggle);
++ }
++
++ tc_dbg("Added SBs from (URB:0x%x %s %s) to epid %d: %s\n",
++ (unsigned int)urb, str_dir(urb->pipe), str_type(urb->pipe), epid,
++ sblist_to_str(urb_priv->first_sb));
++
++ /* We start the DMA sub channel without checking if it's running or not,
++ because:
++ 1) If it's already running, issuing the start command is a nop.
++ 2) We avoid a test-and-set race condition. */
++ switch(usb_pipetype(urb->pipe)) {
++ case PIPE_BULK:
++ /* Assert that the EP descriptor is disabled. */
++ ASSERT(!(TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)));
++
++ /* Set up and enable the EP descriptor. */
++ TxBulkEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
++ TxBulkEPList[epid].hw_len = 0;
++ TxBulkEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
++
++ /* Check if the dummy list is already with us (if several urbs were queued). */
++ if (usb_pipein(urb->pipe) && (TxBulkEPList[epid].next != virt_to_phys(&TxBulkDummyEPList[epid][0]))) {
++ tc_dbg("Inviting dummy list to the party for urb 0x%lx, epid %d",
++ (unsigned long)urb, epid);
++
++ /* We don't need to check if the DMA is at this EP or not before changing the
++ next pointer, since we will do it in one 32-bit write (EP descriptors are
++ 32-bit aligned). */
++ TxBulkEPList[epid].next = virt_to_phys(&TxBulkDummyEPList[epid][0]);
++ }
++
++ restart_dma8_sub0();
++
++ /* Update/restart the bulk start timer since we just started the channel.*/
++ mod_timer(&bulk_start_timer, jiffies + BULK_START_TIMER_INTERVAL);
++ /* Update/restart the bulk eot timer since we just inserted traffic. */
++ mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
++ break;
++ case PIPE_CONTROL:
++ /* Assert that the EP descriptor is disabled. */
++ ASSERT(!(TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)));
++
++ /* Set up and enable the EP descriptor. */
++ TxCtrlEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
++ TxCtrlEPList[epid].hw_len = 0;
++ TxCtrlEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
++
++ *R_DMA_CH8_SUB1_CMD = IO_STATE(R_DMA_CH8_SUB1_CMD, cmd, start);
++ break;
++ }
++ local_irq_restore(flags);
++}
++
++static void tc_dma_link_intr_urb(struct urb *urb) {
++ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
++ volatile struct USB_EP_Desc *tmp_ep;
++ struct USB_EP_Desc *ep_desc;
++ int i = 0, epid;
++ int pool_idx = 0;
++
++ ASSERT(urb_priv != NULL);
++ epid = urb_priv->epid;
++ ASSERT(urb_priv->interval > 0);
++ ASSERT(urb_priv->intr_ep_pool_length > 0);
++
++ tmp_ep = &TxIntrEPList[0];
++
++ /* Only insert one EP descriptor in list for Out Intr URBs.
++ We can only handle Out Intr with interval of 128ms because
++ it's not possible to insert several Out Intr EPs because they
++ are not consumed by the DMA. */
++ if(usb_pipeout(urb->pipe)) {
++ ep_desc = urb_priv->intr_ep_pool[0];
++ ASSERT(ep_desc);
++ ep_desc->next = tmp_ep->next;
++ tmp_ep->next = virt_to_phys(ep_desc);
++ i++;
++ } else {
++ /* Loop through Intr EP descriptor list and insert EP for URB at
++ specified interval */
++ do {
++ /* Each EP descriptor with eof flag sat signals a new frame */
++ if (tmp_ep->command & IO_MASK(USB_EP_command, eof)) {
++ /* Insert a EP from URBs EP pool at correct interval */
++ if ((i % urb_priv->interval) == 0) {
++ ep_desc = urb_priv->intr_ep_pool[pool_idx];
++ ASSERT(ep_desc);
++ ep_desc->next = tmp_ep->next;
++ tmp_ep->next = virt_to_phys(ep_desc);
++ pool_idx++;
++ ASSERT(pool_idx <= urb_priv->intr_ep_pool_length);
+ }
++ i++;
++ }
++ tmp_ep = (struct USB_EP_Desc *)phys_to_virt(tmp_ep->next);
++ } while(tmp_ep != &TxIntrEPList[0]);
++ }
++
++ intr_dbg("Added SBs to intr epid %d: %s interval:%d (%d EP)\n", epid,
++ sblist_to_str(urb_priv->first_sb), urb_priv->interval, pool_idx);
++
++ /* We start the DMA sub channel without checking if it's running or not,
++ because:
++ 1) If it's already running, issuing the start command is a nop.
++ 2) We avoid a test-and-set race condition. */
++ *R_DMA_CH8_SUB2_CMD = IO_STATE(R_DMA_CH8_SUB2_CMD, cmd, start);
++}
++
++static void tc_dma_process_isoc_urb(struct urb *urb) {
++ unsigned long flags;
++ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
++ int epid;
++
++ /* Do not disturb us while fiddling with EPs and epids */
++ local_irq_save(flags);
++
++ ASSERT(urb_priv);
++ ASSERT(urb_priv->first_sb);
++ epid = urb_priv->epid;
++
++ if(activeUrbList[epid] == NULL) {
++ /* EP is idle, so make this URB active */
++ activeUrbList[epid] = urb;
++ urb_list_del(urb, epid);
++ ASSERT(TxIsocEPList[epid].sub == 0);
++ ASSERT(!(TxIsocEPList[epid].command &
++ IO_STATE(USB_EP_command, enable, yes)));
++
++ /* Differentiate between In and Out Isoc. Because In SBs are not consumed*/
++ if(usb_pipein(urb->pipe)) {
++ /* Each EP for In Isoc will have only one SB descriptor, setup when
++ submitting the first active urb. We do it here by copying from URBs
++ pre-allocated SB. */
++ memcpy((void *)&(TxIsocSBList[epid]), urb_priv->first_sb,
++ sizeof(TxIsocSBList[epid]));
++ TxIsocEPList[epid].hw_len = 0;
++ TxIsocEPList[epid].sub = virt_to_phys(&(TxIsocSBList[epid]));
++ } else {
++ /* For Out Isoc we attach the pre-allocated list of SBs for the URB */
++ TxIsocEPList[epid].hw_len = 0;
++ TxIsocEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
++
++ isoc_dbg("Attached first URB:0x%x[%d] to epid:%d first_sb:0x%x"
++ " last_sb::0x%x\n",
++ (unsigned int)urb, urb_priv->urb_num, epid,
++ (unsigned int)(urb_priv->first_sb),
++ (unsigned int)(urb_priv->last_sb));
++ }
++
++ if (urb->transfer_flags & URB_ISO_ASAP) {
++ /* The isoc transfer should be started as soon as possible. The
++ start_frame field is a return value if URB_ISO_ASAP was set. Comparing
++ R_USB_FM_NUMBER with a USB Chief trace shows that the first isoc IN
++ token is sent 2 frames later. I'm not sure how this affects usage of
++ the start_frame field by the device driver, or how it affects things
++ when USB_ISO_ASAP is not set, so therefore there's no compensation for
++ the 2 frame "lag" here. */
++ urb->start_frame = (*R_USB_FM_NUMBER & 0x7ff);
++ TxIsocEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
++ urb_priv->urb_state = STARTED;
++ isoc_dbg("URB_ISO_ASAP set, urb->start_frame set to %d\n",
++ urb->start_frame);
++ } else {
++ /* Not started yet. */
++ urb_priv->urb_state = NOT_STARTED;
++ isoc_warn("urb_priv->urb_state set to NOT_STARTED for URB:0x%x\n",
++ (unsigned int)urb);
++ }
++
++ } else {
++ /* An URB is already active on the EP. Leave URB in queue and let
++ finish_isoc_urb process it after current active URB */
++ ASSERT(TxIsocEPList[epid].sub != 0);
++
++ if(usb_pipein(urb->pipe)) {
++ /* Because there already is a active In URB on this epid we do nothing
++ and the finish_isoc_urb() function will handle switching to next URB*/
++
++ } else { /* For Out Isoc, insert new URBs traffic last in SB-list. */
++ struct USB_SB_Desc *temp_sb_desc;
++
++ /* Set state STARTED to all Out Isoc URBs added to SB list because we
++ don't know how many of them that are finished before descr interrupt*/
++ urb_priv->urb_state = STARTED;
++
++ /* Find end of current SB list by looking for SB with eol flag sat */
++ temp_sb_desc = phys_to_virt(TxIsocEPList[epid].sub);
++ while ((temp_sb_desc->command & IO_MASK(USB_SB_command, eol)) !=
++ IO_STATE(USB_SB_command, eol, yes)) {
++ ASSERT(temp_sb_desc->next);
++ temp_sb_desc = phys_to_virt(temp_sb_desc->next);
++ }
++
++ isoc_dbg("Appended URB:0x%x[%d] (first:0x%x last:0x%x) to epid:%d"
++ " sub:0x%x eol:0x%x\n",
++ (unsigned int)urb, urb_priv->urb_num,
++ (unsigned int)(urb_priv->first_sb),
++ (unsigned int)(urb_priv->last_sb), epid,
++ (unsigned int)phys_to_virt(TxIsocEPList[epid].sub),
++ (unsigned int)temp_sb_desc);
++
++ /* Next pointer must be set before eol is removed. */
++ temp_sb_desc->next = virt_to_phys(urb_priv->first_sb);
++ /* Clear the previous end of list flag since there is a new in the
++ added SB descriptor list. */
++ temp_sb_desc->command &= ~IO_MASK(USB_SB_command, eol);
++
++ if (!(TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable))) {
++ __u32 epid_data;
++ /* 8.8.5 in Designer's Reference says we should check for and correct
++ any errors in the EP here. That should not be necessary if
++ epid_attn is handled correctly, so we assume all is ok. */
++ epid_data = etrax_epid_iso_get(epid);
++ if (IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data) !=
++ IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
++ isoc_err("Disabled Isoc EP with error:%d on epid:%d when appending"
++ " URB:0x%x[%d]\n",
++ IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data), epid,
++ (unsigned int)urb, urb_priv->urb_num);
++ }
++
++ /* The SB list was exhausted. */
++ if (virt_to_phys(urb_priv->last_sb) != TxIsocEPList[epid].sub) {
++ /* The new sublist did not get processed before the EP was
++ disabled. Setup the EP again. */
++
++ if(virt_to_phys(temp_sb_desc) == TxIsocEPList[epid].sub) {
++ isoc_dbg("EP for epid:%d stoped at SB:0x%x before newly inserted"
++ ", restarting from this URBs SB:0x%x\n",
++ epid, (unsigned int)temp_sb_desc,
++ (unsigned int)(urb_priv->first_sb));
++ TxIsocEPList[epid].hw_len = 0;
++ TxIsocEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
++ urb->start_frame = (*R_USB_FM_NUMBER & 0x7ff);
++ /* Enable the EP again so data gets processed this time */
++ TxIsocEPList[epid].command |=
++ IO_STATE(USB_EP_command, enable, yes);
++
++ } else {
++ /* The EP has been disabled but not at end this URB (god knows
++ where). This should generate an epid_attn so we should not be
++ here */
++ isoc_warn("EP was disabled on sb:0x%x before SB list for"
++ " URB:0x%x[%d] got processed\n",
++ (unsigned int)phys_to_virt(TxIsocEPList[epid].sub),
++ (unsigned int)urb, urb_priv->urb_num);
++ }
++ } else {
++ /* This might happend if we are slow on this function and isn't
++ an error. */
++ isoc_dbg("EP was disabled and finished with SBs from appended"
++ " URB:0x%x[%d]\n", (unsigned int)urb, urb_priv->urb_num);
++ }
++ }
++ }
++ }
++
++ /* Start the DMA sub channel */
++ *R_DMA_CH8_SUB3_CMD = IO_STATE(R_DMA_CH8_SUB3_CMD, cmd, start);
++
++ local_irq_restore(flags);
++}
++
++static void tc_dma_unlink_intr_urb(struct urb *urb) {
++ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
++ volatile struct USB_EP_Desc *first_ep; /* First EP in the list. */
++ volatile struct USB_EP_Desc *curr_ep; /* Current EP, the iterator. */
++ volatile struct USB_EP_Desc *next_ep; /* The EP after current. */
++ volatile struct USB_EP_Desc *unlink_ep; /* The one we should remove from
++ the list. */
++ int count = 0;
++ volatile int timeout = 10000;
++ int epid;
++
++ /* Read 8.8.4 in Designer's Reference, "Removing an EP Descriptor from the
++ List". */
++ ASSERT(urb_priv);
++ ASSERT(urb_priv->intr_ep_pool_length > 0);
++ epid = urb_priv->epid;
++
++ /* First disable all Intr EPs belonging to epid for this URB */
++ first_ep = &TxIntrEPList[0];
++ curr_ep = first_ep;
++ do {
++ next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
++ if (IO_EXTRACT(USB_EP_command, epid, next_ep->command) == epid) {
++ /* Disable EP */
++ next_ep->command &= ~IO_MASK(USB_EP_command, enable);
++ }
++ curr_ep = phys_to_virt(curr_ep->next);
++ } while (curr_ep != first_ep);
++
++
++ /* Now unlink all EPs belonging to this epid from Descr list */
++ first_ep = &TxIntrEPList[0];
++ curr_ep = first_ep;
++ do {
++ next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
++ if (IO_EXTRACT(USB_EP_command, epid, next_ep->command) == epid) {
++ /* This is the one we should unlink. */
++ unlink_ep = next_ep;
++
++ /* Actually unlink the EP from the DMA list. */
++ curr_ep->next = unlink_ep->next;
++
++ /* Wait until the DMA is no longer at this descriptor. */
++ while((*R_DMA_CH8_SUB2_EP == virt_to_phys(unlink_ep)) &&
++ (timeout-- > 0));
++ if(timeout == 0) {
++ warn("Timeout while waiting for DMA-TX-Intr to leave unlink EP\n");
++ }
++
++ count++;
++ }
++ curr_ep = phys_to_virt(curr_ep->next);
++ } while (curr_ep != first_ep);
++
++ if(count != urb_priv->intr_ep_pool_length) {
++ intr_warn("Unlinked %d of %d Intr EPs for URB:0x%x[%d]\n", count,
++ urb_priv->intr_ep_pool_length, (unsigned int)urb,
++ urb_priv->urb_num);
++ } else {
++ intr_dbg("Unlinked %d of %d interrupt EPs for URB:0x%x\n", count,
++ urb_priv->intr_ep_pool_length, (unsigned int)urb);
++ }
++}
++
++static void check_finished_bulk_tx_epids(struct usb_hcd *hcd,
++ int timer) {
++ unsigned long flags;
++ int epid;
++ struct urb *urb;
++ struct crisv10_urb_priv * urb_priv;
++ __u32 epid_data;
++
++ /* Protect TxEPList */
++ local_irq_save(flags);
++
++ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
++ /* A finished EP descriptor is disabled and has a valid sub pointer */
++ if (!(TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) &&
++ (TxBulkEPList[epid].sub != 0)) {
++
++ /* Get the active URB for this epid */
++ urb = activeUrbList[epid];
++ /* Sanity checks */
++ ASSERT(urb);
++ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
++ ASSERT(urb_priv);
++
++ /* Only handle finished out Bulk EPs here,
++ and let RX interrupt take care of the rest */
++ if(!epid_out_traffic(epid)) {
++ continue;
++ }
++
++ if(timer) {
++ tc_warn("Found finished %s Bulk epid:%d URB:0x%x[%d] from timeout\n",
++ epid_out_traffic(epid) ? "Out" : "In", epid, (unsigned int)urb,
++ urb_priv->urb_num);
++ } else {
++ tc_dbg("Found finished %s Bulk epid:%d URB:0x%x[%d] from interrupt\n",
++ epid_out_traffic(epid) ? "Out" : "In", epid, (unsigned int)urb,
++ urb_priv->urb_num);
++ }
++
++ if(urb_priv->urb_state == UNLINK) {
++ /* This Bulk URB is requested to be unlinked, that means that the EP
++ has been disabled and we might not have sent all data */
++ tc_finish_urb(hcd, urb, urb->status);
++ continue;
++ }
++
++ ASSERT(urb_priv->urb_state == STARTED);
++ if (phys_to_virt(TxBulkEPList[epid].sub) != urb_priv->last_sb) {
++ tc_err("Endpoint got disabled before reaching last sb\n");
++ }
++
++ epid_data = etrax_epid_get(epid);
++ if (IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data) ==
++ IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
++ /* This means that the endpoint has no error, is disabled
++ and had inserted traffic, i.e. transfer successfully completed. */
++ tc_finish_urb(hcd, urb, 0);
++ } else {
++ /* Shouldn't happen. We expect errors to be caught by epid
++ attention. */
++ tc_err("Found disabled bulk EP desc (epid:%d error:%d)\n",
++ epid, IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data));
++ }
++ } else {
++ tc_dbg("Ignoring In Bulk epid:%d, let RX interrupt handle it\n", epid);
++ }
++ }
++
++ local_irq_restore(flags);
++}
++
++static void check_finished_ctrl_tx_epids(struct usb_hcd *hcd) {
++ unsigned long flags;
++ int epid;
++ struct urb *urb;
++ struct crisv10_urb_priv * urb_priv;
++ __u32 epid_data;
++
++ /* Protect TxEPList */
++ local_irq_save(flags);
++
++ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
++ if(epid == DUMMY_EPID)
++ continue;
++
++ /* A finished EP descriptor is disabled and has a valid sub pointer */
++ if (!(TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) &&
++ (TxCtrlEPList[epid].sub != 0)) {
++
++ /* Get the active URB for this epid */
++ urb = activeUrbList[epid];
++
++ if(urb == NULL) {
++ tc_warn("Found finished Ctrl epid:%d with no active URB\n", epid);
++ continue;
++ }
++
++ /* Sanity checks */
++ ASSERT(usb_pipein(urb->pipe));
++ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
++ ASSERT(urb_priv);
++ if (phys_to_virt(TxCtrlEPList[epid].sub) != urb_priv->last_sb) {
++ tc_err("Endpoint got disabled before reaching last sb\n");
++ }
++
++ epid_data = etrax_epid_get(epid);
++ if (IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data) ==
++ IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
++ /* This means that the endpoint has no error, is disabled
++ and had inserted traffic, i.e. transfer successfully completed. */
++
++ /* Check if RX-interrupt for In Ctrl has been processed before
++ finishing the URB */
++ if(urb_priv->ctrl_rx_done) {
++ tc_dbg("Finishing In Ctrl URB:0x%x[%d] in tx_interrupt\n",
++ (unsigned int)urb, urb_priv->urb_num);
++ tc_finish_urb(hcd, urb, 0);
++ } else {
++ /* If we get zout descriptor interrupt before RX was done for a
++ In Ctrl transfer, then we flag that and it will be finished
++ in the RX-Interrupt */
++ urb_priv->ctrl_zout_done = 1;
++ tc_dbg("Got zout descr interrupt before RX interrupt\n");
++ }
++ } else {
++ /* Shouldn't happen. We expect errors to be caught by epid
++ attention. */
++ tc_err("Found disabled Ctrl EP desc (epid:%d URB:0x%x[%d]) error_code:%d\n", epid, (unsigned int)urb, urb_priv->urb_num, IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data));
++ __dump_ep_desc(&(TxCtrlEPList[epid]));
++ __dump_ept_data(epid);
++ }
++ }
++ }
++ local_irq_restore(flags);
++}
++
++/* This function goes through all epids that are setup for Out Isoc transfers
++ and marks (isoc_out_done) all queued URBs that the DMA has finished
++ transfer for.
++ No URB completetion is done here to make interrupt routine return quickly.
++ URBs are completed later with help of complete_isoc_bottom_half() that
++ becomes schedules when this functions is finished. */
++static void check_finished_isoc_tx_epids(void) {
++ unsigned long flags;
++ int epid;
++ struct urb *urb;
++ struct crisv10_urb_priv * urb_priv;
++ struct USB_SB_Desc* sb_desc;
++ int epid_done;
++
++ /* Protect TxIsocEPList */
++ local_irq_save(flags);
++
++ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
++ if (TxIsocEPList[epid].sub == 0 || epid == INVALID_EPID ||
++ !epid_out_traffic(epid)) {
++ /* Nothing here to see. */
++ continue;
++ }
++ ASSERT(epid_inuse(epid));
++ ASSERT(epid_isoc(epid));
++
++ sb_desc = phys_to_virt(TxIsocEPList[epid].sub);
++ /* Find the last descriptor of the currently active URB for this ep.
++ This is the first descriptor in the sub list marked for a descriptor
++ interrupt. */
++ while (sb_desc && !IO_EXTRACT(USB_SB_command, intr, sb_desc->command)) {
++ sb_desc = sb_desc->next ? phys_to_virt(sb_desc->next) : 0;
++ }
++ ASSERT(sb_desc);
++
++ isoc_dbg("Descr IRQ checking epid:%d sub:0x%x intr:0x%x\n",
++ epid, (unsigned int)phys_to_virt(TxIsocEPList[epid].sub),
++ (unsigned int)sb_desc);
++
++ urb = activeUrbList[epid];
++ if(urb == NULL) {
++ isoc_err("Isoc Descr irq on epid:%d with no active URB\n", epid);
++ continue;
++ }
++
++ epid_done = 0;
++ while(urb && !epid_done) {
++ /* Sanity check. */
++ ASSERT(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
++ ASSERT(usb_pipeout(urb->pipe));
++
++ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
++ ASSERT(urb_priv);
++ ASSERT(urb_priv->urb_state == STARTED ||
++ urb_priv->urb_state == UNLINK);
++
++ if (sb_desc != urb_priv->last_sb) {
++ /* This urb has been sent. */
++ urb_priv->isoc_out_done = 1;
++
++ } else { /* Found URB that has last_sb as the interrupt reason */
++
++ /* Check if EP has been disabled, meaning that all transfers are done*/
++ if(!(TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable))) {
++ ASSERT((sb_desc->command & IO_MASK(USB_SB_command, eol)) ==
++ IO_STATE(USB_SB_command, eol, yes));
++ ASSERT(sb_desc->next == 0);
++ urb_priv->isoc_out_done = 1;
++ } else {
++ isoc_dbg("Skipping URB:0x%x[%d] because EP not disabled yet\n",
++ (unsigned int)urb, urb_priv->urb_num);
++ }
++ /* Stop looking any further in queue */
++ epid_done = 1;
++ }
++
++ if (!epid_done) {
++ if(urb == activeUrbList[epid]) {
++ urb = urb_list_first(epid);
++ } else {
++ urb = urb_list_next(urb, epid);
++ }
++ }
++ } /* END: while(urb && !epid_done) */
++ }
++
++ local_irq_restore(flags);
++}
++
++
++/* This is where the Out Isoc URBs are realy completed. This function is
++ scheduled from tc_dma_tx_interrupt() when one or more Out Isoc transfers
++ are done. This functions completes all URBs earlier marked with
++ isoc_out_done by fast interrupt routine check_finished_isoc_tx_epids() */
++
++static void complete_isoc_bottom_half(void *data) {
++ struct crisv10_isoc_complete_data *comp_data;
++ struct usb_iso_packet_descriptor *packet;
++ struct crisv10_urb_priv * urb_priv;
++ unsigned long flags;
++ struct urb* urb;
++ int epid_done;
++ int epid;
++ int i;
++
++ comp_data = (struct crisv10_isoc_complete_data*)data;
++
++ local_irq_save(flags);
++
++ for (epid = 0; epid < NBR_OF_EPIDS - 1; epid++) {
++ if(!epid_inuse(epid) || !epid_isoc(epid) || !epid_out_traffic(epid) || epid == DUMMY_EPID) {
++ /* Only check valid Out Isoc epids */
++ continue;
++ }
++
++ isoc_dbg("Isoc bottom-half checking epid:%d, sub:0x%x\n", epid,
++ (unsigned int)phys_to_virt(TxIsocEPList[epid].sub));
++
++ /* The descriptor interrupt handler has marked all transmitted Out Isoc
++ URBs with isoc_out_done. Now we traverse all epids and for all that
++ have out Isoc traffic we traverse its URB list and complete the
++ transmitted URBs. */
++ epid_done = 0;
++ while (!epid_done) {
++
++ /* Get the active urb (if any) */
++ urb = activeUrbList[epid];
++ if (urb == 0) {
++ isoc_dbg("No active URB on epid:%d anymore\n", epid);
++ epid_done = 1;
++ continue;
++ }
++
++ /* Sanity check. */
++ ASSERT(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
++ ASSERT(usb_pipeout(urb->pipe));
++
++ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
++ ASSERT(urb_priv);
++
++ if (!(urb_priv->isoc_out_done)) {
++ /* We have reached URB that isn't flaged done yet, stop traversing. */
++ isoc_dbg("Stoped traversing Out Isoc URBs on epid:%d"
++ " before not yet flaged URB:0x%x[%d]\n",
++ epid, (unsigned int)urb, urb_priv->urb_num);
++ epid_done = 1;
++ continue;
++ }
++
++ /* This urb has been sent. */
++ isoc_dbg("Found URB:0x%x[%d] that is flaged isoc_out_done\n",
++ (unsigned int)urb, urb_priv->urb_num);
++
++ /* Set ok on transfered packets for this URB and finish it */
++ for (i = 0; i < urb->number_of_packets; i++) {
++ packet = &urb->iso_frame_desc[i];
++ packet->status = 0;
++ packet->actual_length = packet->length;
++ }
++ urb_priv->isoc_packet_counter = urb->number_of_packets;
++ tc_finish_urb(comp_data->hcd, urb, 0);
++
++ } /* END: while(!epid_done) */
++ } /* END: for(epid...) */
++
++ local_irq_restore(flags);
++ kmem_cache_free(isoc_compl_cache, comp_data);
++}
++
++
++static void check_finished_intr_tx_epids(struct usb_hcd *hcd) {
++ unsigned long flags;
++ int epid;
++ struct urb *urb;
++ struct crisv10_urb_priv * urb_priv;
++ volatile struct USB_EP_Desc *curr_ep; /* Current EP, the iterator. */
++ volatile struct USB_EP_Desc *next_ep; /* The EP after current. */
++
++ /* Protect TxintrEPList */
++ local_irq_save(flags);
++
++ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
++ if(!epid_inuse(epid) || !epid_intr(epid) || !epid_out_traffic(epid)) {
++ /* Nothing to see on this epid. Only check valid Out Intr epids */
++ continue;
++ }
++
++ urb = activeUrbList[epid];
++ if(urb == 0) {
++ intr_warn("Found Out Intr epid:%d with no active URB\n", epid);
++ continue;
++ }
++
++ /* Sanity check. */
++ ASSERT(usb_pipetype(urb->pipe) == PIPE_INTERRUPT);
++ ASSERT(usb_pipeout(urb->pipe));
++
++ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
++ ASSERT(urb_priv);
++
++ /* Go through EPs between first and second sof-EP. It's here Out Intr EPs
++ are inserted.*/
++ curr_ep = &TxIntrEPList[0];
++ do {
++ next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
++ if(next_ep == urb_priv->intr_ep_pool[0]) {
++ /* We found the Out Intr EP for this epid */
++
++ /* Disable it so it doesn't get processed again */
++ next_ep->command &= ~IO_MASK(USB_EP_command, enable);
++
++ /* Finish the active Out Intr URB with status OK */
++ tc_finish_urb(hcd, urb, 0);
++ }
++ curr_ep = phys_to_virt(curr_ep->next);
++ } while (curr_ep != &TxIntrEPList[1]);
++
++ }
++ local_irq_restore(flags);
++}
++
++/* Interrupt handler for DMA8/IRQ24 with subchannels (called from hardware intr) */
++static irqreturn_t tc_dma_tx_interrupt(int irq, void *vhc) {
++ struct usb_hcd *hcd = (struct usb_hcd*)vhc;
++ ASSERT(hcd);
++
++ if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub0_descr)) {
++ /* Clear this interrupt */
++ *R_DMA_CH8_SUB0_CLR_INTR = IO_STATE(R_DMA_CH8_SUB0_CLR_INTR, clr_descr, do);
++ restart_dma8_sub0();
++ }
++
++ if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub1_descr)) {
++ /* Clear this interrupt */
++ *R_DMA_CH8_SUB1_CLR_INTR = IO_STATE(R_DMA_CH8_SUB1_CLR_INTR, clr_descr, do);
++ check_finished_ctrl_tx_epids(hcd);
++ }
++
++ if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub2_descr)) {
++ /* Clear this interrupt */
++ *R_DMA_CH8_SUB2_CLR_INTR = IO_STATE(R_DMA_CH8_SUB2_CLR_INTR, clr_descr, do);
++ check_finished_intr_tx_epids(hcd);
++ }
++
++ if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub3_descr)) {
++ struct crisv10_isoc_complete_data* comp_data;
++
++ /* Flag done Out Isoc for later completion */
++ check_finished_isoc_tx_epids();
++
++ /* Clear this interrupt */
++ *R_DMA_CH8_SUB3_CLR_INTR = IO_STATE(R_DMA_CH8_SUB3_CLR_INTR, clr_descr, do);
++ /* Schedule bottom half of Out Isoc completion function. This function
++ finishes the URBs marked with isoc_out_done */
++ comp_data = (struct crisv10_isoc_complete_data*)
++ kmem_cache_alloc(isoc_compl_cache, SLAB_ATOMIC);
++ ASSERT(comp_data != NULL);
++ comp_data ->hcd = hcd;
++
++ INIT_WORK(&comp_data->usb_bh, complete_isoc_bottom_half, comp_data);
++ schedule_work(&comp_data->usb_bh);
++ }
++
++ return IRQ_HANDLED;
++}
++
++/* Interrupt handler for DMA9/IRQ25 (called from hardware intr) */
++static irqreturn_t tc_dma_rx_interrupt(int irq, void *vhc) {
++ unsigned long flags;
++ struct urb *urb;
++ struct usb_hcd *hcd = (struct usb_hcd*)vhc;
++ struct crisv10_urb_priv *urb_priv;
++ int epid = 0;
++ int real_error;
++
++ ASSERT(hcd);
++
++ /* Clear this interrupt. */
++ *R_DMA_CH9_CLR_INTR = IO_STATE(R_DMA_CH9_CLR_INTR, clr_eop, do);
++
++ /* Custom clear interrupt for this interrupt */
++ /* The reason we cli here is that we call the driver's callback functions. */
++ local_irq_save(flags);
++
++ /* Note that this while loop assumes that all packets span only
++ one rx descriptor. */
++ while(myNextRxDesc->status & IO_MASK(USB_IN_status, eop)) {
++ epid = IO_EXTRACT(USB_IN_status, epid, myNextRxDesc->status);
++ /* Get the active URB for this epid */
++ urb = activeUrbList[epid];
++
++ ASSERT(epid_inuse(epid));
++ if (!urb) {
++ dma_err("No urb for epid %d in rx interrupt\n", epid);
++ goto skip_out;
++ }
++
++ /* Check if any errors on epid */
++ real_error = 0;
++ if (myNextRxDesc->status & IO_MASK(USB_IN_status, error)) {
++ __u32 r_usb_ept_data;
++
++ if (usb_pipeisoc(urb->pipe)) {
++ r_usb_ept_data = etrax_epid_iso_get(epid);
++ if((r_usb_ept_data & IO_MASK(R_USB_EPT_DATA_ISO, valid)) &&
++ (IO_EXTRACT(R_USB_EPT_DATA_ISO, error_code, r_usb_ept_data) == 0) &&
++ (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata))) {
++ /* Not an error, just a failure to receive an expected iso
++ in packet in this frame. This is not documented
++ in the designers reference. Continue processing.
++ */
++ } else real_error = 1;
++ } else real_error = 1;
++ }
++
++ if(real_error) {
++ dma_err("Error in RX descr on epid:%d for URB 0x%x",
++ epid, (unsigned int)urb);
++ dump_ept_data(epid);
++ dump_in_desc(myNextRxDesc);
++ goto skip_out;
++ }
++
++ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
++ ASSERT(urb_priv);
++ ASSERT(urb_priv->urb_state == STARTED ||
++ urb_priv->urb_state == UNLINK);
++
++ if ((usb_pipetype(urb->pipe) == PIPE_BULK) ||
++ (usb_pipetype(urb->pipe) == PIPE_CONTROL) ||
++ (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)) {
++
++ /* We get nodata for empty data transactions, and the rx descriptor's
++ hw_len field is not valid in that case. No data to copy in other
++ words. */
++ if (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata)) {
++ /* No data to copy */
++ } else {
++ /*
++ dma_dbg("Processing RX for URB:0x%x epid:%d (data:%d ofs:%d)\n",
++ (unsigned int)urb, epid, myNextRxDesc->hw_len,
++ urb_priv->rx_offset);
++ */
++ /* Only copy data if URB isn't flaged to be unlinked*/
++ if(urb_priv->urb_state != UNLINK) {
++ /* Make sure the data fits in the buffer. */
++ if(urb_priv->rx_offset + myNextRxDesc->hw_len
++ <= urb->transfer_buffer_length) {
++
++ /* Copy the data to URBs buffer */
++ memcpy(urb->transfer_buffer + urb_priv->rx_offset,
++ phys_to_virt(myNextRxDesc->buf), myNextRxDesc->hw_len);
++ urb_priv->rx_offset += myNextRxDesc->hw_len;
++ } else {
++ /* Signal overflow when returning URB */
++ urb->status = -EOVERFLOW;
++ tc_finish_urb_later(hcd, urb, urb->status);
++ }
++ }
++ }
++
++ /* Check if it was the last packet in the transfer */
++ if (myNextRxDesc->status & IO_MASK(USB_IN_status, eot)) {
++ /* Special handling for In Ctrl URBs. */
++ if(usb_pipecontrol(urb->pipe) && usb_pipein(urb->pipe) &&
++ !(urb_priv->ctrl_zout_done)) {
++ /* Flag that RX part of Ctrl transfer is done. Because zout descr
++ interrupt hasn't happend yet will the URB be finished in the
++ TX-Interrupt. */
++ urb_priv->ctrl_rx_done = 1;
++ tc_dbg("Not finishing In Ctrl URB:0x%x from rx_interrupt, waiting"
++ " for zout\n", (unsigned int)urb);
++ } else {
++ tc_finish_urb(hcd, urb, 0);
++ }
++ }
++ } else { /* ISOC RX */
++ /*
++ isoc_dbg("Processing RX for epid:%d (URB:0x%x) ISOC pipe\n",
++ epid, (unsigned int)urb);
++ */
++
++ struct usb_iso_packet_descriptor *packet;
++
++ if (urb_priv->urb_state == UNLINK) {
++ isoc_warn("Ignoring Isoc Rx data for urb being unlinked.\n");
++ goto skip_out;
++ } else if (urb_priv->urb_state == NOT_STARTED) {
++ isoc_err("What? Got Rx data for Isoc urb that isn't started?\n");
++ goto skip_out;
++ }
++
++ packet = &urb->iso_frame_desc[urb_priv->isoc_packet_counter];
++ ASSERT(packet);
++ packet->status = 0;
++
++ if (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata)) {
++ /* We get nodata for empty data transactions, and the rx descriptor's
++ hw_len field is not valid in that case. We copy 0 bytes however to
++ stay in synch. */
++ packet->actual_length = 0;
++ } else {
++ packet->actual_length = myNextRxDesc->hw_len;
++ /* Make sure the data fits in the buffer. */
++ ASSERT(packet->actual_length <= packet->length);
++ memcpy(urb->transfer_buffer + packet->offset,
++ phys_to_virt(myNextRxDesc->buf), packet->actual_length);
++ if(packet->actual_length > 0)
++ isoc_dbg("Copied %d bytes, packet %d for URB:0x%x[%d]\n",
++ packet->actual_length, urb_priv->isoc_packet_counter,
++ (unsigned int)urb, urb_priv->urb_num);
++ }
++
++ /* Increment the packet counter. */
++ urb_priv->isoc_packet_counter++;
++
++ /* Note that we don't care about the eot field in the rx descriptor's
++ status. It will always be set for isoc traffic. */
++ if (urb->number_of_packets == urb_priv->isoc_packet_counter) {
++ /* Complete the urb with status OK. */
++ tc_finish_urb(hcd, urb, 0);
++ }
++ }
++
++ skip_out:
++ myNextRxDesc->status = 0;
++ myNextRxDesc->command |= IO_MASK(USB_IN_command, eol);
++ myLastRxDesc->command &= ~IO_MASK(USB_IN_command, eol);
++ myLastRxDesc = myNextRxDesc;
++ myNextRxDesc = phys_to_virt(myNextRxDesc->next);
++ flush_etrax_cache();
++ *R_DMA_CH9_CMD = IO_STATE(R_DMA_CH9_CMD, cmd, restart);
++ }
++
++ local_irq_restore(flags);
++
++ return IRQ_HANDLED;
++}
++
++static void tc_bulk_start_timer_func(unsigned long dummy) {
++ /* We might enable an EP descriptor behind the current DMA position when
++ it's about to decide that there are no more bulk traffic and it should
++ stop the bulk channel.
++ Therefore we periodically check if the bulk channel is stopped and there
++ is an enabled bulk EP descriptor, in which case we start the bulk
++ channel. */
++
++ if (!(*R_DMA_CH8_SUB0_CMD & IO_MASK(R_DMA_CH8_SUB0_CMD, cmd))) {
++ int epid;
++
++ timer_dbg("bulk_start_timer: Bulk DMA channel not running.\n");
++
++ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
++ if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
++ timer_warn("Found enabled EP for epid %d, starting bulk channel.\n",
++ epid);
++ restart_dma8_sub0();
++
++ /* Restart the bulk eot timer since we just started the bulk channel.*/
++ mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
++
++ /* No need to search any further. */
++ break;
++ }
++ }
++ } else {
++ timer_dbg("bulk_start_timer: Bulk DMA channel running.\n");
++ }
++}
++
++static void tc_bulk_eot_timer_func(unsigned long dummy) {
++ struct usb_hcd *hcd = (struct usb_hcd*)dummy;
++ ASSERT(hcd);
++ /* Because of a race condition in the top half, we might miss a bulk eot.
++ This timer "simulates" a bulk eot if we don't get one for a while,
++ hopefully correcting the situation. */
++ timer_dbg("bulk_eot_timer timed out.\n");
++ check_finished_bulk_tx_epids(hcd, 1);
++}
++
++
++/*************************************************************/
++/*************************************************************/
++/* Device driver block */
++/*************************************************************/
++/*************************************************************/
++
++/* Forward declarations for device driver functions */
++static int devdrv_hcd_probe(struct device *);
++static int devdrv_hcd_remove(struct device *);
++#ifdef CONFIG_PM
++static int devdrv_hcd_suspend(struct device *, u32, u32);
++static int devdrv_hcd_resume(struct device *, u32);
++#endif /* CONFIG_PM */
++
++/* the device */
++static struct platform_device *devdrv_hc_platform_device;
++
++/* device driver interface */
++static struct device_driver devdrv_hc_device_driver = {
++ .name = (char *) hc_name,
++ .bus = &platform_bus_type,
++
++ .probe = devdrv_hcd_probe,
++ .remove = devdrv_hcd_remove,
++
++#ifdef CONFIG_PM
++ .suspend = devdrv_hcd_suspend,
++ .resume = devdrv_hcd_resume,
++#endif /* CONFIG_PM */
++};
+
+- CHECK_ALIGN(&TxIsocEPList[i]);
+- TxIsocEPList[i].hw_len = 0;
+-
+- /* Must enable the last EP descr to get eof interrupt. */
+- TxIsocEPList[i].command = (IO_STATE(USB_EP_command, enable, yes) |
+- IO_STATE(USB_EP_command, eof, yes) |
+- IO_STATE(USB_EP_command, eol, yes) |
+- IO_FIELD(USB_EP_command, epid, INVALID_EPID));
+- TxIsocEPList[i].sub = virt_to_phys(&TxIsocSB_zout);
+- TxIsocEPList[i].next = virt_to_phys(&TxIsocEPList[0]);
+-
+- *R_DMA_CH8_SUB3_EP = virt_to_phys(&TxIsocEPList[0]);
+- *R_DMA_CH8_SUB3_CMD = IO_STATE(R_DMA_CH8_SUB3_CMD, cmd, start);
+-
+- DBFEXIT;
+-}
+-
+-static void etrax_usb_unlink_intr_urb(struct urb *urb)
++/* initialize the host controller and driver */
++static int __init_or_module devdrv_hcd_probe(struct device *dev)
+ {
+- volatile USB_EP_Desc_t *first_ep; /* First EP in the list. */
+- volatile USB_EP_Desc_t *curr_ep; /* Current EP, the iterator. */
+- volatile USB_EP_Desc_t *next_ep; /* The EP after current. */
+- volatile USB_EP_Desc_t *unlink_ep; /* The one we should remove from the list. */
+-
+- int epid;
+-
+- /* Read 8.8.4 in Designer's Reference, "Removing an EP Descriptor from the List". */
+-
+- DBFENTER;
+-
+- epid = ((etrax_urb_priv_t *)urb->hcpriv)->epid;
+-
+- first_ep = &TxIntrEPList[0];
+- curr_ep = first_ep;
+-
+-
+- /* Note that this loop removes all EP descriptors with this epid. This assumes
+- that all EP descriptors belong to the one and only urb for this epid. */
+-
+- do {
+- next_ep = (USB_EP_Desc_t *)phys_to_virt(curr_ep->next);
+-
+- if (IO_EXTRACT(USB_EP_command, epid, next_ep->command) == epid) {
+-
+- dbg_intr("Found EP to unlink for epid %d", epid);
+-
+- /* This is the one we should unlink. */
+- unlink_ep = next_ep;
+-
+- /* Actually unlink the EP from the DMA list. */
+- curr_ep->next = unlink_ep->next;
+-
+- /* Wait until the DMA is no longer at this descriptor. */
+- while (*R_DMA_CH8_SUB2_EP == virt_to_phys(unlink_ep));
++ struct usb_hcd *hcd;
++ struct crisv10_hcd *crisv10_hcd;
++ int retval;
++
++ /* Check DMA burst length */
++ if(IO_EXTRACT(R_BUS_CONFIG, dma_burst, *R_BUS_CONFIG) !=
++ IO_STATE(R_BUS_CONFIG, dma_burst, burst32)) {
++ devdrv_err("Invalid DMA burst length in Etrax 100LX,"
++ " needs to be 32\n");
++ return -EPERM;
++ }
++
++ hcd = usb_create_hcd(&crisv10_hc_driver, dev, dev->bus_id);
++ if (!hcd)
++ return -ENOMEM;
++
++ crisv10_hcd = hcd_to_crisv10_hcd(hcd);
++ spin_lock_init(&crisv10_hcd->lock);
++ crisv10_hcd->num_ports = num_ports();
++ crisv10_hcd->running = 0;
++
++ dev_set_drvdata(dev, crisv10_hcd);
++
++ devdrv_dbg("ETRAX USB IRQs HC:%d RX:%d TX:%d\n", ETRAX_USB_HC_IRQ,
++ ETRAX_USB_RX_IRQ, ETRAX_USB_TX_IRQ);
++
++ /* Print out chip version read from registers */
++ int rev_maj = *R_USB_REVISION & IO_MASK(R_USB_REVISION, major);
++ int rev_min = *R_USB_REVISION & IO_MASK(R_USB_REVISION, minor);
++ if(rev_min == 0) {
++ devdrv_info("Etrax 100LX USB Revision %d v1,2\n", rev_maj);
++ } else {
++ devdrv_info("Etrax 100LX USB Revision %d v%d\n", rev_maj, rev_min);
++ }
++
++ devdrv_info("Bulk timer interval, start:%d eot:%d\n",
++ BULK_START_TIMER_INTERVAL,
++ BULK_EOT_TIMER_INTERVAL);
++
++
++ /* Init root hub data structures */
++ if(rh_init()) {
++ devdrv_err("Failed init data for Root Hub\n");
++ retval = -ENOMEM;
++ }
++
++ if(port_in_use(0)) {
++ if (cris_request_io_interface(if_usb_1, "ETRAX100LX USB-HCD")) {
++ printk(KERN_CRIT "usb-host: request IO interface usb1 failed");
++ retval = -EBUSY;
++ goto out;
++ }
++ devdrv_info("Claimed interface for USB physical port 1\n");
++ }
++ if(port_in_use(1)) {
++ if (cris_request_io_interface(if_usb_2, "ETRAX100LX USB-HCD")) {
++ /* Free first interface if second failed to be claimed */
++ if(port_in_use(0)) {
++ cris_free_io_interface(if_usb_1);
++ }
++ printk(KERN_CRIT "usb-host: request IO interface usb2 failed");
++ retval = -EBUSY;
++ goto out;
++ }
++ devdrv_info("Claimed interface for USB physical port 2\n");
++ }
++
++ /* Init transfer controller structs and locks */
++ if((retval = tc_init(hcd)) != 0) {
++ goto out;
++ }
++
++ /* Attach interrupt functions for DMA and init DMA controller */
++ if((retval = tc_dma_init(hcd)) != 0) {
++ goto out;
++ }
++
++ /* Attach the top IRQ handler for USB controller interrupts */
++ if (request_irq(ETRAX_USB_HC_IRQ, crisv10_hcd_top_irq, 0,
++ "ETRAX 100LX built-in USB (HC)", hcd)) {
++ err("Could not allocate IRQ %d for USB", ETRAX_USB_HC_IRQ);
++ retval = -EBUSY;
++ goto out;
++ }
++
++ /* iso_eof is only enabled when isoc traffic is running. */
++ *R_USB_IRQ_MASK_SET =
++ /* IO_STATE(R_USB_IRQ_MASK_SET, iso_eof, set) | */
++ IO_STATE(R_USB_IRQ_MASK_SET, bulk_eot, set) |
++ IO_STATE(R_USB_IRQ_MASK_SET, epid_attn, set) |
++ IO_STATE(R_USB_IRQ_MASK_SET, port_status, set) |
++ IO_STATE(R_USB_IRQ_MASK_SET, ctl_status, set);
++
++
++ crisv10_ready_wait();
++ /* Reset the USB interface. */
++ *R_USB_COMMAND =
++ IO_STATE(R_USB_COMMAND, port_sel, nop) |
++ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
++ IO_STATE(R_USB_COMMAND, ctrl_cmd, reset);
++
++ /* Designer's Reference, p. 8 - 10 says we should Initate R_USB_FM_PSTART to
++ 0x2A30 (10800), to guarantee that control traffic gets 10% of the
++ bandwidth, and periodic transfer may allocate the rest (90%).
++ This doesn't work though.
++ The value 11960 is chosen to be just after the SOF token, with a couple
++ of bit times extra for possible bit stuffing. */
++ *R_USB_FM_PSTART = IO_FIELD(R_USB_FM_PSTART, value, 11960);
++
++ crisv10_ready_wait();
++ /* Configure the USB interface as a host controller. */
++ *R_USB_COMMAND =
++ IO_STATE(R_USB_COMMAND, port_sel, nop) |
++ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
++ IO_STATE(R_USB_COMMAND, ctrl_cmd, host_config);
++
++
++ /* Check so controller not busy before enabling ports */
++ crisv10_ready_wait();
++
++ /* Enable selected USB ports */
++ if(port_in_use(0)) {
++ *R_USB_PORT1_DISABLE = IO_STATE(R_USB_PORT1_DISABLE, disable, no);
++ } else {
++ *R_USB_PORT1_DISABLE = IO_STATE(R_USB_PORT1_DISABLE, disable, yes);
++ }
++ if(port_in_use(1)) {
++ *R_USB_PORT2_DISABLE = IO_STATE(R_USB_PORT2_DISABLE, disable, no);
++ } else {
++ *R_USB_PORT2_DISABLE = IO_STATE(R_USB_PORT2_DISABLE, disable, yes);
++ }
++
++ crisv10_ready_wait();
++ /* Start processing of USB traffic. */
++ *R_USB_COMMAND =
++ IO_STATE(R_USB_COMMAND, port_sel, nop) |
++ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
++ IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
++
++ /* Do not continue probing initialization before USB interface is done */
++ crisv10_ready_wait();
++
++ /* Register our Host Controller to USB Core
++ * Finish the remaining parts of generic HCD initialization: allocate the
++ * buffers of consistent memory, register the bus
++ * and call the driver's reset() and start() routines. */
++ retval = usb_add_hcd(hcd, ETRAX_USB_HC_IRQ, IRQF_DISABLED);
++ if (retval != 0) {
++ devdrv_err("Failed registering HCD driver\n");
++ goto out;
++ }
++
++ return 0;
++
++ out:
++ devdrv_hcd_remove(dev);
++ return retval;
++}
++
++
++/* cleanup after the host controller and driver */
++static int __init_or_module devdrv_hcd_remove(struct device *dev)
++{
++ struct crisv10_hcd *crisv10_hcd = dev_get_drvdata(dev);
++ struct usb_hcd *hcd;
++
++ if (!crisv10_hcd)
++ return 0;
++ hcd = crisv10_hcd_to_hcd(crisv10_hcd);
++
++
++ /* Stop USB Controller in Etrax 100LX */
++ crisv10_hcd_reset(hcd);
++
++ usb_remove_hcd(hcd);
++ devdrv_dbg("Removed HCD from USB Core\n");
++
++ /* Free USB Controller IRQ */
++ free_irq(ETRAX_USB_HC_IRQ, NULL);
++
++ /* Free resources */
++ tc_dma_destroy();
++ tc_destroy();
++
++
++ if(port_in_use(0)) {
++ cris_free_io_interface(if_usb_1);
++ }
++ if(port_in_use(1)) {
++ cris_free_io_interface(if_usb_2);
++ }
++
++ devdrv_dbg("Freed all claimed resources\n");
++
++ return 0;
++}
++
++
++#ifdef CONFIG_PM
++
++static int devdrv_hcd_suspend(struct usb_hcd *hcd, u32 state, u32 level)
++{
++ return 0; /* no-op for now */
++}
++
++static int devdrv_hcd_resume(struct usb_hcd *hcd, u32 level)
++{
++ return 0; /* no-op for now */
++}
++
++#endif /* CONFIG_PM */
++
++
++
++/*************************************************************/
++/*************************************************************/
++/* Module block */
++/*************************************************************/
++/*************************************************************/
++
++/* register driver */
++static int __init module_hcd_init(void)
++{
++
++ if (usb_disabled())
++ return -ENODEV;
++
++ /* Here we select enabled ports by following defines created from
++ menuconfig */
++#ifndef CONFIG_ETRAX_USB_HOST_PORT1
++ ports &= ~(1<<0);
++#endif
++#ifndef CONFIG_ETRAX_USB_HOST_PORT2
++ ports &= ~(1<<1);
++#endif
+
+- /* Now we are free to remove it and its SB descriptor.
+- Note that it is assumed here that there is only one sb in the
+- sb list for this ep. */
+- kmem_cache_free(usb_desc_cache, phys_to_virt(unlink_ep->sub));
+- kmem_cache_free(usb_desc_cache, (USB_EP_Desc_t *)unlink_ep);
+- }
++ printk(KERN_INFO "%s version "VERSION" "COPYRIGHT"\n", product_desc);
+
+- curr_ep = phys_to_virt(curr_ep->next);
++ devdrv_hc_platform_device =
++ platform_device_register_simple((char *) hc_name, 0, NULL, 0);
+
+- } while (curr_ep != first_ep);
+- urb->hcpriv = NULL;
++ if (IS_ERR(devdrv_hc_platform_device))
++ return PTR_ERR(devdrv_hc_platform_device);
++ return driver_register(&devdrv_hc_device_driver);
++ /*
++ * Note that we do not set the DMA mask for the device,
++ * i.e. we pretend that we will use PIO, since no specific
++ * allocation routines are needed for DMA buffers. This will
++ * cause the HCD buffer allocation routines to fall back to
++ * kmalloc().
++ */
+ }
+
+-void etrax_usb_do_intr_recover(int epid)
+-{
+- USB_EP_Desc_t *first_ep, *tmp_ep;
++/* unregister driver */
++static void __exit module_hcd_exit(void)
++{
++ driver_unregister(&devdrv_hc_device_driver);
++}
+
+- DBFENTER;
+-
+- first_ep = (USB_EP_Desc_t *)phys_to_virt(*R_DMA_CH8_SUB2_EP);
+- tmp_ep = first_ep;
+-
+- /* What this does is simply to walk the list of interrupt
+- ep descriptors and enable those that are disabled. */
+-
+- do {
+- if (IO_EXTRACT(USB_EP_command, epid, tmp_ep->command) == epid &&
+- !(tmp_ep->command & IO_MASK(USB_EP_command, enable))) {
+- tmp_ep->command |= IO_STATE(USB_EP_command, enable, yes);
+- }
+-
+- tmp_ep = (USB_EP_Desc_t *)phys_to_virt(tmp_ep->next);
+-
+- } while (tmp_ep != first_ep);
+-
+-
+- DBFEXIT;
+-}
+-
+-static int etrax_rh_unlink_urb (struct urb *urb)
+-{
+- etrax_hc_t *hc;
+-
+- DBFENTER;
+-
+- hc = urb->dev->bus->hcpriv;
+-
+- if (hc->rh.urb == urb) {
+- hc->rh.send = 0;
+- del_timer(&hc->rh.rh_int_timer);
+- }
+-
+- DBFEXIT;
+- return 0;
+-}
+-
+-static void etrax_rh_send_irq(struct urb *urb)
+-{
+- __u16 data = 0;
+- etrax_hc_t *hc = urb->dev->bus->hcpriv;
+- DBFENTER;
+-
+-/*
+- dbg_rh("R_USB_FM_NUMBER : 0x%08X", *R_USB_FM_NUMBER);
+- dbg_rh("R_USB_FM_REMAINING: 0x%08X", *R_USB_FM_REMAINING);
+-*/
+-
+- data |= (hc->rh.wPortChange_1) ? (1 << 1) : 0;
+- data |= (hc->rh.wPortChange_2) ? (1 << 2) : 0;
+-
+- *((__u16 *)urb->transfer_buffer) = cpu_to_le16(data);
+- /* FIXME: Why is actual_length set to 1 when data is 2 bytes?
+- Since only 1 byte is used, why not declare data as __u8? */
+- urb->actual_length = 1;
+- urb->status = 0;
+-
+- if (hc->rh.send && urb->complete) {
+- dbg_rh("wPortChange_1: 0x%04X", hc->rh.wPortChange_1);
+- dbg_rh("wPortChange_2: 0x%04X", hc->rh.wPortChange_2);
+-
+- urb->complete(urb, NULL);
+- }
+-
+- DBFEXIT;
+-}
+-
+-static void etrax_rh_init_int_timer(struct urb *urb)
+-{
+- etrax_hc_t *hc;
+-
+- DBFENTER;
+-
+- hc = urb->dev->bus->hcpriv;
+- hc->rh.interval = urb->interval;
+- init_timer(&hc->rh.rh_int_timer);
+- hc->rh.rh_int_timer.function = etrax_rh_int_timer_do;
+- hc->rh.rh_int_timer.data = (unsigned long)urb;
+- /* FIXME: Is the jiffies resolution enough? All intervals < 10 ms will be mapped
+- to 0, and the rest to the nearest lower 10 ms. */
+- hc->rh.rh_int_timer.expires = jiffies + ((HZ * hc->rh.interval) / 1000);
+- add_timer(&hc->rh.rh_int_timer);
+-
+- DBFEXIT;
+-}
+-
+-static void etrax_rh_int_timer_do(unsigned long ptr)
+-{
+- struct urb *urb;
+- etrax_hc_t *hc;
+-
+- DBFENTER;
+-
+- urb = (struct urb*)ptr;
+- hc = urb->dev->bus->hcpriv;
+-
+- if (hc->rh.send) {
+- etrax_rh_send_irq(urb);
+- }
+-
+- DBFEXIT;
+-}
+-
+-static int etrax_usb_setup_epid(struct urb *urb)
+-{
+- int epid;
+- char devnum, endpoint, out_traffic, slow;
+- int maxlen;
+- unsigned long flags;
+-
+- DBFENTER;
+-
+- epid = etrax_usb_lookup_epid(urb);
+- if ((epid != -1)){
+- /* An epid that fits this urb has been found. */
+- DBFEXIT;
+- return epid;
+- }
+-
+- /* We must find and initiate a new epid for this urb. */
+- epid = etrax_usb_allocate_epid();
+-
+- if (epid == -1) {
+- /* Failed to allocate a new epid. */
+- DBFEXIT;
+- return epid;
+- }
+-
+- /* We now have a new epid to use. Initiate it. */
+- set_bit(epid, (void *)&epid_usage_bitmask);
+-
+- devnum = usb_pipedevice(urb->pipe);
+- endpoint = usb_pipeendpoint(urb->pipe);
+- slow = usb_pipeslow(urb->pipe);
+- maxlen = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
+- if (usb_pipetype(urb->pipe) == PIPE_CONTROL) {
+- /* We want both IN and OUT control traffic to be put on the same EP/SB list. */
+- out_traffic = 1;
+- } else {
+- out_traffic = usb_pipeout(urb->pipe);
+- }
+-
+- save_flags(flags);
+- cli();
+-
+- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
+- nop();
+-
+- if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
+- *R_USB_EPT_DATA_ISO = IO_STATE(R_USB_EPT_DATA_ISO, valid, yes) |
+- /* FIXME: Change any to the actual port? */
+- IO_STATE(R_USB_EPT_DATA_ISO, port, any) |
+- IO_FIELD(R_USB_EPT_DATA_ISO, max_len, maxlen) |
+- IO_FIELD(R_USB_EPT_DATA_ISO, ep, endpoint) |
+- IO_FIELD(R_USB_EPT_DATA_ISO, dev, devnum);
+- } else {
+- *R_USB_EPT_DATA = IO_STATE(R_USB_EPT_DATA, valid, yes) |
+- IO_FIELD(R_USB_EPT_DATA, low_speed, slow) |
+- /* FIXME: Change any to the actual port? */
+- IO_STATE(R_USB_EPT_DATA, port, any) |
+- IO_FIELD(R_USB_EPT_DATA, max_len, maxlen) |
+- IO_FIELD(R_USB_EPT_DATA, ep, endpoint) |
+- IO_FIELD(R_USB_EPT_DATA, dev, devnum);
+- }
+-
+- restore_flags(flags);
+-
+- if (out_traffic) {
+- set_bit(epid, (void *)&epid_out_traffic);
+- } else {
+- clear_bit(epid, (void *)&epid_out_traffic);
+- }
+-
+- dbg_epid("Setting up epid %d with devnum %d, endpoint %d and max_len %d (%s)",
+- epid, devnum, endpoint, maxlen, out_traffic ? "OUT" : "IN");
+-
+- DBFEXIT;
+- return epid;
+-}
+-
+-static void etrax_usb_free_epid(int epid)
+-{
+- unsigned long flags;
+-
+- DBFENTER;
+-
+- if (!test_bit(epid, (void *)&epid_usage_bitmask)) {
+- warn("Trying to free unused epid %d", epid);
+- DBFEXIT;
+- return;
+- }
+-
+- save_flags(flags);
+- cli();
+-
+- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
+- nop();
+- while (*R_USB_EPT_DATA & IO_MASK(R_USB_EPT_DATA, hold));
+- /* This will, among other things, set the valid field to 0. */
+- *R_USB_EPT_DATA = 0;
+- restore_flags(flags);
+-
+- clear_bit(epid, (void *)&epid_usage_bitmask);
+-
+-
+- dbg_epid("Freed epid %d", epid);
+-
+- DBFEXIT;
+-}
+-
+-static int etrax_usb_lookup_epid(struct urb *urb)
+-{
+- int i;
+- __u32 data;
+- char devnum, endpoint, slow, out_traffic;
+- int maxlen;
+- unsigned long flags;
+-
+- DBFENTER;
+-
+- devnum = usb_pipedevice(urb->pipe);
+- endpoint = usb_pipeendpoint(urb->pipe);
+- slow = usb_pipeslow(urb->pipe);
+- maxlen = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
+- if (usb_pipetype(urb->pipe) == PIPE_CONTROL) {
+- /* We want both IN and OUT control traffic to be put on the same EP/SB list. */
+- out_traffic = 1;
+- } else {
+- out_traffic = usb_pipeout(urb->pipe);
+- }
+-
+- /* Step through att epids. */
+- for (i = 0; i < NBR_OF_EPIDS; i++) {
+- if (test_bit(i, (void *)&epid_usage_bitmask) &&
+- test_bit(i, (void *)&epid_out_traffic) == out_traffic) {
+-
+- save_flags(flags);
+- cli();
+- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, i);
+- nop();
+-
+- if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
+- data = *R_USB_EPT_DATA_ISO;
+- restore_flags(flags);
+-
+- if ((IO_MASK(R_USB_EPT_DATA_ISO, valid) & data) &&
+- (IO_EXTRACT(R_USB_EPT_DATA_ISO, dev, data) == devnum) &&
+- (IO_EXTRACT(R_USB_EPT_DATA_ISO, ep, data) == endpoint) &&
+- (IO_EXTRACT(R_USB_EPT_DATA_ISO, max_len, data) == maxlen)) {
+- dbg_epid("Found epid %d for devnum %d, endpoint %d (%s)",
+- i, devnum, endpoint, out_traffic ? "OUT" : "IN");
+- DBFEXIT;
+- return i;
+- }
+- } else {
+- data = *R_USB_EPT_DATA;
+- restore_flags(flags);
+-
+- if ((IO_MASK(R_USB_EPT_DATA, valid) & data) &&
+- (IO_EXTRACT(R_USB_EPT_DATA, dev, data) == devnum) &&
+- (IO_EXTRACT(R_USB_EPT_DATA, ep, data) == endpoint) &&
+- (IO_EXTRACT(R_USB_EPT_DATA, low_speed, data) == slow) &&
+- (IO_EXTRACT(R_USB_EPT_DATA, max_len, data) == maxlen)) {
+- dbg_epid("Found epid %d for devnum %d, endpoint %d (%s)",
+- i, devnum, endpoint, out_traffic ? "OUT" : "IN");
+- DBFEXIT;
+- return i;
+- }
+- }
+- }
+- }
+-
+- DBFEXIT;
+- return -1;
+-}
+-
+-static int etrax_usb_allocate_epid(void)
+-{
+- int i;
+-
+- DBFENTER;
+-
+- for (i = 0; i < NBR_OF_EPIDS; i++) {
+- if (!test_bit(i, (void *)&epid_usage_bitmask)) {
+- dbg_epid("Found free epid %d", i);
+- DBFEXIT;
+- return i;
+- }
+- }
+-
+- dbg_epid("Found no free epids");
+- DBFEXIT;
+- return -1;
+-}
+-
+-static int etrax_usb_submit_urb(struct urb *urb, unsigned mem_flags)
+-{
+- etrax_hc_t *hc;
+- int ret = -EINVAL;
+-
+- DBFENTER;
+-
+- if (!urb->dev || !urb->dev->bus) {
+- return -ENODEV;
+- }
+- if (usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe)) <= 0) {
+- info("Submit urb to pipe with maxpacketlen 0, pipe 0x%X\n", urb->pipe);
+- return -EMSGSIZE;
+- }
+-
+- if (urb->timeout) {
+- /* FIXME. */
+- warn("urb->timeout specified, ignoring.");
+- }
+-
+- hc = (etrax_hc_t*)urb->dev->bus->hcpriv;
+-
+- if (usb_pipedevice(urb->pipe) == hc->rh.devnum) {
+- /* This request is for the Virtual Root Hub. */
+- ret = etrax_rh_submit_urb(urb);
+-
+- } else if (usb_pipetype(urb->pipe) == PIPE_BULK) {
+-
+- ret = etrax_usb_submit_bulk_urb(urb);
+-
+- } else if (usb_pipetype(urb->pipe) == PIPE_CONTROL) {
+-
+- ret = etrax_usb_submit_ctrl_urb(urb);
+-
+- } else if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT) {
+- int bustime;
+-
+- if (urb->bandwidth == 0) {
+- bustime = usb_check_bandwidth(urb->dev, urb);
+- if (bustime < 0) {
+- ret = bustime;
+- } else {
+- ret = etrax_usb_submit_intr_urb(urb);
+- if (ret == 0)
+- usb_claim_bandwidth(urb->dev, urb, bustime, 0);
+- }
+- } else {
+- /* Bandwidth already set. */
+- ret = etrax_usb_submit_intr_urb(urb);
+- }
+-
+- } else if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
+- int bustime;
+-
+- if (urb->bandwidth == 0) {
+- bustime = usb_check_bandwidth(urb->dev, urb);
+- if (bustime < 0) {
+- ret = bustime;
+- } else {
+- ret = etrax_usb_submit_isoc_urb(urb);
+- if (ret == 0)
+- usb_claim_bandwidth(urb->dev, urb, bustime, 0);
+- }
+- } else {
+- /* Bandwidth already set. */
+- ret = etrax_usb_submit_isoc_urb(urb);
+- }
+- }
+-
+- DBFEXIT;
+-
+- if (ret != 0)
+- printk("Submit URB error %d\n", ret);
+-
+- return ret;
+-}
+-
+-static int etrax_usb_unlink_urb(struct urb *urb, int status)
+-{
+- etrax_hc_t *hc;
+- etrax_urb_priv_t *urb_priv;
+- int epid;
+- unsigned int flags;
+-
+- DBFENTER;
+-
+- if (!urb) {
+- return -EINVAL;
+- }
+-
+- /* Disable interrupts here since a descriptor interrupt for the isoc epid
+- will modify the sb list. This could possibly be done more granular, but
+- unlink_urb should not be used frequently anyway.
+- */
+-
+- save_flags(flags);
+- cli();
+-
+- if (!urb->dev || !urb->dev->bus) {
+- restore_flags(flags);
+- return -ENODEV;
+- }
+- if (!urb->hcpriv) {
+- /* This happens if a device driver calls unlink on an urb that
+- was never submitted (lazy driver) or if the urb was completed
+- while unlink was being called. */
+- restore_flags(flags);
+- return 0;
+- }
+- if (urb->transfer_flags & URB_ASYNC_UNLINK) {
+- /* FIXME. */
+- /* If URB_ASYNC_UNLINK is set:
+- unlink
+- move to a separate urb list
+- call complete at next sof with ECONNRESET
+-
+- If not:
+- wait 1 ms
+- unlink
+- call complete with ENOENT
+- */
+- warn("URB_ASYNC_UNLINK set, ignoring.");
+- }
+-
+- /* One might think that urb->status = -EINPROGRESS would be a requirement for unlinking,
+- but that doesn't work for interrupt and isochronous traffic since they are completed
+- repeatedly, and urb->status is set then. That may in itself be a bug though. */
+-
+- hc = urb->dev->bus->hcpriv;
+- urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
+- epid = urb_priv->epid;
+-
+- /* Set the urb status (synchronous unlink). */
+- urb->status = -ENOENT;
+- urb_priv->urb_state = UNLINK;
+-
+- if (usb_pipedevice(urb->pipe) == hc->rh.devnum) {
+- int ret;
+- ret = etrax_rh_unlink_urb(urb);
+- DBFEXIT;
+- restore_flags(flags);
+- return ret;
+-
+- } else if (usb_pipetype(urb->pipe) == PIPE_BULK) {
+-
+- dbg_bulk("Unlink of bulk urb (0x%lx)", (unsigned long)urb);
+-
+- if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
+- /* The EP was enabled, disable it and wait. */
+- TxBulkEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
+-
+- /* Ah, the luxury of busy-wait. */
+- while (*R_DMA_CH8_SUB0_EP == virt_to_phys(&TxBulkEPList[epid]));
+- }
+- /* Kicking dummy list out of the party. */
+- TxBulkEPList[epid].next = virt_to_phys(&TxBulkEPList[(epid + 1) % NBR_OF_EPIDS]);
+-
+- } else if (usb_pipetype(urb->pipe) == PIPE_CONTROL) {
+-
+- dbg_ctrl("Unlink of ctrl urb (0x%lx)", (unsigned long)urb);
+-
+- if (TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
+- /* The EP was enabled, disable it and wait. */
+- TxCtrlEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
+-
+- /* Ah, the luxury of busy-wait. */
+- while (*R_DMA_CH8_SUB1_EP == virt_to_phys(&TxCtrlEPList[epid]));
+- }
+-
+- } else if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT) {
+-
+- dbg_intr("Unlink of intr urb (0x%lx)", (unsigned long)urb);
+-
+- /* Separate function because it's a tad more complicated. */
+- etrax_usb_unlink_intr_urb(urb);
+-
+- } else if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
+-
+- dbg_isoc("Unlink of isoc urb (0x%lx)", (unsigned long)urb);
+-
+- if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
+- /* The EP was enabled, disable it and wait. */
+- TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
+-
+- /* Ah, the luxury of busy-wait. */
+- while (*R_DMA_CH8_SUB3_EP == virt_to_phys(&TxIsocEPList[epid]));
+- }
+- }
+-
+- /* Note that we need to remove the urb from the urb list *before* removing its SB
+- descriptors. (This means that the isoc eof handler might get a null urb when we
+- are unlinking the last urb.) */
+-
+- if (usb_pipetype(urb->pipe) == PIPE_BULK) {
+-
+- urb_list_del(urb, epid);
+- TxBulkEPList[epid].sub = 0;
+- etrax_remove_from_sb_list(urb);
+-
+- } else if (usb_pipetype(urb->pipe) == PIPE_CONTROL) {
+-
+- urb_list_del(urb, epid);
+- TxCtrlEPList[epid].sub = 0;
+- etrax_remove_from_sb_list(urb);
+-
+- } else if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT) {
+-
+- urb_list_del(urb, epid);
+- /* Sanity check (should never happen). */
+- assert(urb_list_empty(epid));
+-
+- /* Release allocated bandwidth. */
+- usb_release_bandwidth(urb->dev, urb, 0);
+-
+- } else if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
+-
+- if (usb_pipeout(urb->pipe)) {
+-
+- USB_SB_Desc_t *iter_sb, *prev_sb, *next_sb;
+-
+- if (__urb_list_entry(urb, epid)) {
+-
+- urb_list_del(urb, epid);
+- iter_sb = TxIsocEPList[epid].sub ? phys_to_virt(TxIsocEPList[epid].sub) : 0;
+- prev_sb = 0;
+- while (iter_sb && (iter_sb != urb_priv->first_sb)) {
+- prev_sb = iter_sb;
+- iter_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
+- }
+-
+- if (iter_sb == 0) {
+- /* Unlink of the URB currently being transmitted. */
+- prev_sb = 0;
+- iter_sb = TxIsocEPList[epid].sub ? phys_to_virt(TxIsocEPList[epid].sub) : 0;
+- }
+-
+- while (iter_sb && (iter_sb != urb_priv->last_sb)) {
+- iter_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
+- }
+- if (iter_sb) {
+- next_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
+- } else {
+- /* This should only happen if the DMA has completed
+- processing the SB list for this EP while interrupts
+- are disabled. */
+- dbg_isoc("Isoc urb not found, already sent?");
+- next_sb = 0;
+- }
+- if (prev_sb) {
+- prev_sb->next = next_sb ? virt_to_phys(next_sb) : 0;
+- } else {
+- TxIsocEPList[epid].sub = next_sb ? virt_to_phys(next_sb) : 0;
+- }
+-
+- etrax_remove_from_sb_list(urb);
+- if (urb_list_empty(epid)) {
+- TxIsocEPList[epid].sub = 0;
+- dbg_isoc("Last isoc out urb epid %d", epid);
+- } else if (next_sb || prev_sb) {
+- dbg_isoc("Re-enable isoc out epid %d", epid);
+-
+- TxIsocEPList[epid].hw_len = 0;
+- TxIsocEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
+- } else {
+- TxIsocEPList[epid].sub = 0;
+- dbg_isoc("URB list non-empty and no SB list, EP disabled");
+- }
+- } else {
+- dbg_isoc("Urb 0x%p not found, completed already?", urb);
+- }
+- } else {
+-
+- urb_list_del(urb, epid);
+-
+- /* For in traffic there is only one SB descriptor for each EP even
+- though there may be several urbs (all urbs point at the same SB). */
+- if (urb_list_empty(epid)) {
+- /* No more urbs, remove the SB. */
+- TxIsocEPList[epid].sub = 0;
+- etrax_remove_from_sb_list(urb);
+- } else {
+- TxIsocEPList[epid].hw_len = 0;
+- TxIsocEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
+- }
+- }
+- /* Release allocated bandwidth. */
+- usb_release_bandwidth(urb->dev, urb, 1);
+- }
+- /* Free the epid if urb list is empty. */
+- if (urb_list_empty(epid)) {
+- etrax_usb_free_epid(epid);
+- }
+- restore_flags(flags);
+-
+- /* Must be done before calling completion handler. */
+- kfree(urb_priv);
+- urb->hcpriv = 0;
+-
+- if (urb->complete) {
+- urb->complete(urb, NULL);
+- }
+-
+- DBFEXIT;
+- return 0;
+-}
+-
+-static int etrax_usb_get_frame_number(struct usb_device *usb_dev)
+-{
+- DBFENTER;
+- DBFEXIT;
+- return (*R_USB_FM_NUMBER & 0x7ff);
+-}
+-
+-static irqreturn_t etrax_usb_tx_interrupt(int irq, void *vhc)
+-{
+- DBFENTER;
+-
+- /* This interrupt handler could be used when unlinking EP descriptors. */
+-
+- if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub0_descr)) {
+- USB_EP_Desc_t *ep;
+-
+- //dbg_bulk("dma8_sub0_descr (BULK) intr.");
+-
+- /* It should be safe clearing the interrupt here, since we don't expect to get a new
+- one until we restart the bulk channel. */
+- *R_DMA_CH8_SUB0_CLR_INTR = IO_STATE(R_DMA_CH8_SUB0_CLR_INTR, clr_descr, do);
+-
+- /* Wait while the DMA is running (though we don't expect it to be). */
+- while (*R_DMA_CH8_SUB0_CMD & IO_MASK(R_DMA_CH8_SUB0_CMD, cmd));
+-
+- /* Advance the DMA to the next EP descriptor. */
+- ep = (USB_EP_Desc_t *)phys_to_virt(*R_DMA_CH8_SUB0_EP);
+-
+- //dbg_bulk("descr intr: DMA is at 0x%lx", (unsigned long)ep);
+-
+- /* ep->next is already a physical address; no need for a virt_to_phys. */
+- *R_DMA_CH8_SUB0_EP = ep->next;
+-
+- /* Start the DMA bulk channel again. */
+- *R_DMA_CH8_SUB0_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start);
+- }
+- if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub1_descr)) {
+- struct urb *urb;
+- int epid;
+- etrax_urb_priv_t *urb_priv;
+- unsigned long int flags;
+-
+- dbg_ctrl("dma8_sub1_descr (CTRL) intr.");
+- *R_DMA_CH8_SUB1_CLR_INTR = IO_STATE(R_DMA_CH8_SUB1_CLR_INTR, clr_descr, do);
+-
+- /* The complete callback gets called so we cli. */
+- save_flags(flags);
+- cli();
+-
+- for (epid = 0; epid < NBR_OF_EPIDS - 1; epid++) {
+- if ((TxCtrlEPList[epid].sub == 0) ||
+- (epid == DUMMY_EPID) ||
+- (epid == INVALID_EPID)) {
+- /* Nothing here to see. */
+- continue;
+- }
+-
+- /* Get the first urb (if any). */
+- urb = urb_list_first(epid);
+-
+- if (urb) {
+-
+- /* Sanity check. */
+- assert(usb_pipetype(urb->pipe) == PIPE_CONTROL);
+-
+- urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
+- assert(urb_priv);
+-
+- if (urb_priv->urb_state == WAITING_FOR_DESCR_INTR) {
+- assert(!(TxCtrlEPList[urb_priv->epid].command & IO_MASK(USB_EP_command, enable)));
+-
+- etrax_usb_complete_urb(urb, 0);
+- }
+- }
+- }
+- restore_flags(flags);
+- }
+- if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub2_descr)) {
+- dbg_intr("dma8_sub2_descr (INTR) intr.");
+- *R_DMA_CH8_SUB2_CLR_INTR = IO_STATE(R_DMA_CH8_SUB2_CLR_INTR, clr_descr, do);
+- }
+- if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub3_descr)) {
+- struct urb *urb;
+- int epid;
+- int epid_done;
+- etrax_urb_priv_t *urb_priv;
+- USB_SB_Desc_t *sb_desc;
+-
+- usb_isoc_complete_data_t *comp_data = NULL;
+-
+- /* One or more isoc out transfers are done. */
+- dbg_isoc("dma8_sub3_descr (ISOC) intr.");
+-
+- /* For each isoc out EP search for the first sb_desc with the intr flag
+- set. This descriptor must be the last packet from an URB. Then
+- traverse the URB list for the EP until the URB with urb_priv->last_sb
+- matching the intr-marked sb_desc is found. All URBs before this have
+- been sent.
+- */
+-
+- for (epid = 0; epid < NBR_OF_EPIDS - 1; epid++) {
+- /* Skip past epids with no SB lists, epids used for in traffic,
+- and special (dummy, invalid) epids. */
+- if ((TxIsocEPList[epid].sub == 0) ||
+- (test_bit(epid, (void *)&epid_out_traffic) == 0) ||
+- (epid == DUMMY_EPID) ||
+- (epid == INVALID_EPID)) {
+- /* Nothing here to see. */
+- continue;
+- }
+- sb_desc = phys_to_virt(TxIsocEPList[epid].sub);
+-
+- /* Find the last descriptor of the currently active URB for this ep.
+- This is the first descriptor in the sub list marked for a descriptor
+- interrupt. */
+- while (sb_desc && !IO_EXTRACT(USB_SB_command, intr, sb_desc->command)) {
+- sb_desc = sb_desc->next ? phys_to_virt(sb_desc->next) : 0;
+- }
+- assert(sb_desc);
+-
+- dbg_isoc("Check epid %d, sub 0x%p, SB 0x%p",
+- epid,
+- phys_to_virt(TxIsocEPList[epid].sub),
+- sb_desc);
+-
+- epid_done = 0;
+-
+- /* Get the first urb (if any). */
+- urb = urb_list_first(epid);
+- assert(urb);
+-
+- while (urb && !epid_done) {
+-
+- /* Sanity check. */
+- assert(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
+-
+- if (!usb_pipeout(urb->pipe)) {
+- /* descr interrupts are generated only for out pipes. */
+- epid_done = 1;
+- continue;
+- }
+-
+- urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
+- assert(urb_priv);
+-
+- if (sb_desc != urb_priv->last_sb) {
+-
+- /* This urb has been sent. */
+- dbg_isoc("out URB 0x%p sent", urb);
+-
+- urb_priv->urb_state = TRANSFER_DONE;
+-
+- } else if ((sb_desc == urb_priv->last_sb) &&
+- !(TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable))) {
+-
+- assert((sb_desc->command & IO_MASK(USB_SB_command, eol)) == IO_STATE(USB_SB_command, eol, yes));
+- assert(sb_desc->next == 0);
+-
+- dbg_isoc("out URB 0x%p last in list, epid disabled", urb);
+- TxIsocEPList[epid].sub = 0;
+- TxIsocEPList[epid].hw_len = 0;
+- urb_priv->urb_state = TRANSFER_DONE;
+-
+- epid_done = 1;
+-
+- } else {
+- epid_done = 1;
+- }
+- if (!epid_done) {
+- urb = urb_list_next(urb, epid);
+- }
+- }
+-
+- }
+-
+- *R_DMA_CH8_SUB3_CLR_INTR = IO_STATE(R_DMA_CH8_SUB3_CLR_INTR, clr_descr, do);
+-
+- comp_data = (usb_isoc_complete_data_t*)kmem_cache_alloc(isoc_compl_cache, SLAB_ATOMIC);
+- assert(comp_data != NULL);
+-
+- INIT_WORK(&comp_data->usb_bh, etrax_usb_isoc_descr_interrupt_bottom_half, comp_data);
+- schedule_work(&comp_data->usb_bh);
+- }
+-
+- DBFEXIT;
+- return IRQ_HANDLED;
+-}
+-
+-static void etrax_usb_isoc_descr_interrupt_bottom_half(void *data)
+-{
+- usb_isoc_complete_data_t *comp_data = (usb_isoc_complete_data_t*)data;
+-
+- struct urb *urb;
+- int epid;
+- int epid_done;
+- etrax_urb_priv_t *urb_priv;
+-
+- DBFENTER;
+-
+- dbg_isoc("dma8_sub3_descr (ISOC) bottom half.");
+-
+- for (epid = 0; epid < NBR_OF_EPIDS - 1; epid++) {
+- unsigned long flags;
+-
+- save_flags(flags);
+- cli();
+-
+- epid_done = 0;
+-
+- /* The descriptor interrupt handler has marked all transmitted isoch. out
+- URBs with TRANSFER_DONE. Now we traverse all epids and for all that
+- have isoch. out traffic traverse its URB list and complete the
+- transmitted URB.
+- */
+-
+- while (!epid_done) {
+-
+- /* Get the first urb (if any). */
+- urb = urb_list_first(epid);
+- if (urb == 0) {
+- epid_done = 1;
+- continue;
+- }
+-
+- if (usb_pipetype(urb->pipe) != PIPE_ISOCHRONOUS) {
+- epid_done = 1;
+- continue;
+- }
+-
+- if (!usb_pipeout(urb->pipe)) {
+- /* descr interrupts are generated only for out pipes. */
+- epid_done = 1;
+- continue;
+- }
+-
+- dbg_isoc("Check epid %d, SB 0x%p", epid, (char*)TxIsocEPList[epid].sub);
+-
+- urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
+- assert(urb_priv);
+-
+- if (urb_priv->urb_state == TRANSFER_DONE) {
+- int i;
+- struct usb_iso_packet_descriptor *packet;
+-
+- /* This urb has been sent. */
+- dbg_isoc("Completing isoc out URB 0x%p", urb);
+-
+- for (i = 0; i < urb->number_of_packets; i++) {
+- packet = &urb->iso_frame_desc[i];
+- packet->status = 0;
+- packet->actual_length = packet->length;
+- }
+-
+- etrax_usb_complete_isoc_urb(urb, 0);
+-
+- if (urb_list_empty(epid)) {
+- etrax_usb_free_epid(epid);
+- epid_done = 1;
+- }
+- } else {
+- epid_done = 1;
+- }
+- }
+- restore_flags(flags);
+-
+- }
+- kmem_cache_free(isoc_compl_cache, comp_data);
+-
+- DBFEXIT;
+-}
+-
+-
+-
+-static irqreturn_t etrax_usb_rx_interrupt(int irq, void *vhc)
+-{
+- struct urb *urb;
+- etrax_urb_priv_t *urb_priv;
+- int epid = 0;
+- unsigned long flags;
+-
+- /* Isoc diagnostics. */
+- static int curr_fm = 0;
+- static int prev_fm = 0;
+-
+- DBFENTER;
+-
+- /* Clear this interrupt. */
+- *R_DMA_CH9_CLR_INTR = IO_STATE(R_DMA_CH9_CLR_INTR, clr_eop, do);
+-
+- /* Note that this while loop assumes that all packets span only
+- one rx descriptor. */
+-
+- /* The reason we cli here is that we call the driver's callback functions. */
+- save_flags(flags);
+- cli();
+-
+- while (myNextRxDesc->status & IO_MASK(USB_IN_status, eop)) {
+-
+- epid = IO_EXTRACT(USB_IN_status, epid, myNextRxDesc->status);
+- urb = urb_list_first(epid);
+-
+- //printk("eop for epid %d, first urb 0x%lx\n", epid, (unsigned long)urb);
+-
+- if (!urb) {
+- err("No urb for epid %d in rx interrupt", epid);
+- __dump_ept_data(epid);
+- goto skip_out;
+- }
+-
+- /* Note that we cannot indescriminately assert(usb_pipein(urb->pipe)) since
+- ctrl pipes are not. */
+-
+- if (myNextRxDesc->status & IO_MASK(USB_IN_status, error)) {
+- __u32 r_usb_ept_data;
+- int no_error = 0;
+-
+- assert(test_bit(epid, (void *)&epid_usage_bitmask));
+-
+- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
+- nop();
+- if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
+- r_usb_ept_data = *R_USB_EPT_DATA_ISO;
+-
+- if ((r_usb_ept_data & IO_MASK(R_USB_EPT_DATA_ISO, valid)) &&
+- (IO_EXTRACT(R_USB_EPT_DATA_ISO, error_code, r_usb_ept_data) == 0) &&
+- (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata))) {
+- /* Not an error, just a failure to receive an expected iso
+- in packet in this frame. This is not documented
+- in the designers reference.
+- */
+- no_error++;
+- } else {
+- warn("R_USB_EPT_DATA_ISO for epid %d = 0x%x", epid, r_usb_ept_data);
+- }
+- } else {
+- r_usb_ept_data = *R_USB_EPT_DATA;
+- warn("R_USB_EPT_DATA for epid %d = 0x%x", epid, r_usb_ept_data);
+- }
+-
+- if (!no_error){
+- warn("error in rx desc->status, epid %d, first urb = 0x%lx",
+- epid, (unsigned long)urb);
+- __dump_in_desc(myNextRxDesc);
+-
+- warn("R_USB_STATUS = 0x%x", *R_USB_STATUS);
+-
+- /* Check that ept was disabled when error occurred. */
+- switch (usb_pipetype(urb->pipe)) {
+- case PIPE_BULK:
+- assert(!(TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)));
+- break;
+- case PIPE_CONTROL:
+- assert(!(TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)));
+- break;
+- case PIPE_INTERRUPT:
+- assert(!(TxIntrEPList[epid].command & IO_MASK(USB_EP_command, enable)));
+- break;
+- case PIPE_ISOCHRONOUS:
+- assert(!(TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)));
+- break;
+- default:
+- warn("etrax_usb_rx_interrupt: bad pipetype %d in urb 0x%p",
+- usb_pipetype(urb->pipe),
+- urb);
+- }
+- etrax_usb_complete_urb(urb, -EPROTO);
+- goto skip_out;
+- }
+- }
+-
+- urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
+- assert(urb_priv);
+-
+- if ((usb_pipetype(urb->pipe) == PIPE_BULK) ||
+- (usb_pipetype(urb->pipe) == PIPE_CONTROL) ||
+- (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)) {
+-
+- if (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata)) {
+- /* We get nodata for empty data transactions, and the rx descriptor's
+- hw_len field is not valid in that case. No data to copy in other
+- words. */
+- } else {
+- /* Make sure the data fits in the buffer. */
+- assert(urb_priv->rx_offset + myNextRxDesc->hw_len
+- <= urb->transfer_buffer_length);
+-
+- memcpy(urb->transfer_buffer + urb_priv->rx_offset,
+- phys_to_virt(myNextRxDesc->buf), myNextRxDesc->hw_len);
+- urb_priv->rx_offset += myNextRxDesc->hw_len;
+- }
+-
+- if (myNextRxDesc->status & IO_MASK(USB_IN_status, eot)) {
+- if ((usb_pipetype(urb->pipe) == PIPE_CONTROL) &&
+- ((TxCtrlEPList[urb_priv->epid].command & IO_MASK(USB_EP_command, enable)) ==
+- IO_STATE(USB_EP_command, enable, yes))) {
+- /* The EP is still enabled, so the OUT packet used to ack
+- the in data is probably not processed yet. If the EP
+- sub pointer has not moved beyond urb_priv->last_sb mark
+- it for a descriptor interrupt and complete the urb in
+- the descriptor interrupt handler.
+- */
+- USB_SB_Desc_t *sub = TxCtrlEPList[urb_priv->epid].sub ? phys_to_virt(TxCtrlEPList[urb_priv->epid].sub) : 0;
+-
+- while ((sub != NULL) && (sub != urb_priv->last_sb)) {
+- sub = sub->next ? phys_to_virt(sub->next) : 0;
+- }
+- if (sub != NULL) {
+- /* The urb has not been fully processed. */
+- urb_priv->urb_state = WAITING_FOR_DESCR_INTR;
+- } else {
+- warn("(CTRL) epid enabled and urb (0x%p) processed, ep->sub=0x%p", urb, (char*)TxCtrlEPList[urb_priv->epid].sub);
+- etrax_usb_complete_urb(urb, 0);
+- }
+- } else {
+- etrax_usb_complete_urb(urb, 0);
+- }
+- }
+-
+- } else if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
+-
+- struct usb_iso_packet_descriptor *packet;
+-
+- if (urb_priv->urb_state == UNLINK) {
+- info("Ignoring rx data for urb being unlinked.");
+- goto skip_out;
+- } else if (urb_priv->urb_state == NOT_STARTED) {
+- info("What? Got rx data for urb that isn't started?");
+- goto skip_out;
+- }
+-
+- packet = &urb->iso_frame_desc[urb_priv->isoc_packet_counter];
+- packet->status = 0;
+-
+- if (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata)) {
+- /* We get nodata for empty data transactions, and the rx descriptor's
+- hw_len field is not valid in that case. We copy 0 bytes however to
+- stay in synch. */
+- packet->actual_length = 0;
+- } else {
+- packet->actual_length = myNextRxDesc->hw_len;
+- /* Make sure the data fits in the buffer. */
+- assert(packet->actual_length <= packet->length);
+- memcpy(urb->transfer_buffer + packet->offset,
+- phys_to_virt(myNextRxDesc->buf), packet->actual_length);
+- }
+-
+- /* Increment the packet counter. */
+- urb_priv->isoc_packet_counter++;
+-
+- /* Note that we don't care about the eot field in the rx descriptor's status.
+- It will always be set for isoc traffic. */
+- if (urb->number_of_packets == urb_priv->isoc_packet_counter) {
+-
+- /* Out-of-synch diagnostics. */
+- curr_fm = (*R_USB_FM_NUMBER & 0x7ff);
+- if (((prev_fm + urb_priv->isoc_packet_counter) % (0x7ff + 1)) != curr_fm) {
+- /* This test is wrong, if there is more than one isoc
+- in endpoint active it will always calculate wrong
+- since prev_fm is shared by all endpoints.
+-
+- FIXME Make this check per URB using urb->start_frame.
+- */
+- dbg_isoc("Out of synch? Previous frame = %d, current frame = %d",
+- prev_fm, curr_fm);
+-
+- }
+- prev_fm = curr_fm;
+-
+- /* Complete the urb with status OK. */
+- etrax_usb_complete_isoc_urb(urb, 0);
+- }
+- }
+-
+- skip_out:
+-
+- /* DMA IN cache bug. Flush the DMA IN buffer from the cache. (struct etrax_dma_descr
+- has the same layout as USB_IN_Desc for the relevant fields.) */
+- prepare_rx_descriptor((struct etrax_dma_descr*)myNextRxDesc);
+-
+- myPrevRxDesc = myNextRxDesc;
+- myPrevRxDesc->command |= IO_MASK(USB_IN_command, eol);
+- myLastRxDesc->command &= ~IO_MASK(USB_IN_command, eol);
+- myLastRxDesc = myPrevRxDesc;
+-
+- myNextRxDesc->status = 0;
+- myNextRxDesc = phys_to_virt(myNextRxDesc->next);
+- }
+-
+- restore_flags(flags);
+-
+- DBFEXIT;
+-
+- return IRQ_HANDLED;
+-}
+-
+-
+-/* This function will unlink the SB descriptors associated with this urb. */
+-static int etrax_remove_from_sb_list(struct urb *urb)
+-{
+- USB_SB_Desc_t *next_sb, *first_sb, *last_sb;
+- etrax_urb_priv_t *urb_priv;
+- int i = 0;
+-
+- DBFENTER;
+-
+- urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
+- assert(urb_priv);
+-
+- /* Just a sanity check. Since we don't fiddle with the DMA list the EP descriptor
+- doesn't really need to be disabled, it's just that we expect it to be. */
+- if (usb_pipetype(urb->pipe) == PIPE_BULK) {
+- assert(!(TxBulkEPList[urb_priv->epid].command & IO_MASK(USB_EP_command, enable)));
+- } else if (usb_pipetype(urb->pipe) == PIPE_CONTROL) {
+- assert(!(TxCtrlEPList[urb_priv->epid].command & IO_MASK(USB_EP_command, enable)));
+- }
+-
+- first_sb = urb_priv->first_sb;
+- last_sb = urb_priv->last_sb;
+-
+- assert(first_sb);
+- assert(last_sb);
+-
+- while (first_sb != last_sb) {
+- next_sb = (USB_SB_Desc_t *)phys_to_virt(first_sb->next);
+- kmem_cache_free(usb_desc_cache, first_sb);
+- first_sb = next_sb;
+- i++;
+- }
+- kmem_cache_free(usb_desc_cache, last_sb);
+- i++;
+- dbg_sb("%d SB descriptors freed", i);
+- /* Compare i with urb->number_of_packets for Isoc traffic.
+- Should be same when calling unlink_urb */
+-
+- DBFEXIT;
+-
+- return i;
+-}
+-
+-static int etrax_usb_submit_bulk_urb(struct urb *urb)
+-{
+- int epid;
+- int empty;
+- unsigned long flags;
+- etrax_urb_priv_t *urb_priv;
+-
+- DBFENTER;
+-
+- /* Epid allocation, empty check and list add must be protected.
+- Read about this in etrax_usb_submit_ctrl_urb. */
+-
+- spin_lock_irqsave(&urb_list_lock, flags);
+- epid = etrax_usb_setup_epid(urb);
+- if (epid == -1) {
+- DBFEXIT;
+- spin_unlock_irqrestore(&urb_list_lock, flags);
+- return -ENOMEM;
+- }
+- empty = urb_list_empty(epid);
+- urb_list_add(urb, epid);
+- spin_unlock_irqrestore(&urb_list_lock, flags);
+-
+- dbg_bulk("Adding bulk %s urb 0x%lx to %s list, epid %d",
+- usb_pipein(urb->pipe) ? "IN" : "OUT", (unsigned long)urb, empty ? "empty" : "", epid);
+-
+- /* Mark the urb as being in progress. */
+- urb->status = -EINPROGRESS;
+-
+- /* Setup the hcpriv data. */
+- urb_priv = kzalloc(sizeof(etrax_urb_priv_t), KMALLOC_FLAG);
+- assert(urb_priv != NULL);
+- /* This sets rx_offset to 0. */
+- urb_priv->urb_state = NOT_STARTED;
+- urb->hcpriv = urb_priv;
+-
+- if (empty) {
+- etrax_usb_add_to_bulk_sb_list(urb, epid);
+- }
+-
+- DBFEXIT;
+-
+- return 0;
+-}
+-
+-static void etrax_usb_add_to_bulk_sb_list(struct urb *urb, int epid)
+-{
+- USB_SB_Desc_t *sb_desc;
+- etrax_urb_priv_t *urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
+- unsigned long flags;
+- char maxlen;
+-
+- DBFENTER;
+-
+- dbg_bulk("etrax_usb_add_to_bulk_sb_list, urb 0x%lx", (unsigned long)urb);
+-
+- maxlen = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
+-
+- sb_desc = (USB_SB_Desc_t*)kmem_cache_alloc(usb_desc_cache, SLAB_FLAG);
+- assert(sb_desc != NULL);
+- memset(sb_desc, 0, sizeof(USB_SB_Desc_t));
+-
+-
+- if (usb_pipeout(urb->pipe)) {
+-
+- dbg_bulk("Grabbing bulk OUT, urb 0x%lx, epid %d", (unsigned long)urb, epid);
+-
+- /* This is probably a sanity check of the bulk transaction length
+- not being larger than 64 kB. */
+- if (urb->transfer_buffer_length > 0xffff) {
+- panic("urb->transfer_buffer_length > 0xffff");
+- }
+-
+- sb_desc->sw_len = urb->transfer_buffer_length;
+-
+- /* The rem field is don't care if it's not a full-length transfer, so setting
+- it shouldn't hurt. Also, rem isn't used for OUT traffic. */
+- sb_desc->command = (IO_FIELD(USB_SB_command, rem, 0) |
+- IO_STATE(USB_SB_command, tt, out) |
+- IO_STATE(USB_SB_command, eot, yes) |
+- IO_STATE(USB_SB_command, eol, yes));
+-
+- /* The full field is set to yes, even if we don't actually check that this is
+- a full-length transfer (i.e., that transfer_buffer_length % maxlen = 0).
+- Setting full prevents the USB controller from sending an empty packet in
+- that case. However, if URB_ZERO_PACKET was set we want that. */
+- if (!(urb->transfer_flags & URB_ZERO_PACKET)) {
+- sb_desc->command |= IO_STATE(USB_SB_command, full, yes);
+- }
+-
+- sb_desc->buf = virt_to_phys(urb->transfer_buffer);
+- sb_desc->next = 0;
+-
+- } else if (usb_pipein(urb->pipe)) {
+-
+- dbg_bulk("Grabbing bulk IN, urb 0x%lx, epid %d", (unsigned long)urb, epid);
+-
+- sb_desc->sw_len = urb->transfer_buffer_length ?
+- (urb->transfer_buffer_length - 1) / maxlen + 1 : 0;
+-
+- /* The rem field is don't care if it's not a full-length transfer, so setting
+- it shouldn't hurt. */
+- sb_desc->command =
+- (IO_FIELD(USB_SB_command, rem,
+- urb->transfer_buffer_length % maxlen) |
+- IO_STATE(USB_SB_command, tt, in) |
+- IO_STATE(USB_SB_command, eot, yes) |
+- IO_STATE(USB_SB_command, eol, yes));
+-
+- sb_desc->buf = 0;
+- sb_desc->next = 0;
+- }
+-
+- urb_priv->first_sb = sb_desc;
+- urb_priv->last_sb = sb_desc;
+- urb_priv->epid = epid;
+-
+- urb->hcpriv = urb_priv;
+-
+- /* Reset toggle bits and reset error count. */
+- save_flags(flags);
+- cli();
+-
+- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
+- nop();
+-
+- /* FIXME: Is this a special case since the hold field is checked,
+- or should we check hold in a lot of other cases as well? */
+- if (*R_USB_EPT_DATA & IO_MASK(R_USB_EPT_DATA, hold)) {
+- panic("Hold was set in %s", __FUNCTION__);
+- }
+-
+- /* Reset error counters (regardless of which direction this traffic is). */
+- *R_USB_EPT_DATA &=
+- ~(IO_MASK(R_USB_EPT_DATA, error_count_in) |
+- IO_MASK(R_USB_EPT_DATA, error_count_out));
+-
+- /* Software must preset the toggle bits. */
+- if (usb_pipeout(urb->pipe)) {
+- char toggle =
+- usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe), usb_pipeout(urb->pipe));
+- *R_USB_EPT_DATA &= ~IO_MASK(R_USB_EPT_DATA, t_out);
+- *R_USB_EPT_DATA |= IO_FIELD(R_USB_EPT_DATA, t_out, toggle);
+- } else {
+- char toggle =
+- usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe), usb_pipeout(urb->pipe));
+- *R_USB_EPT_DATA &= ~IO_MASK(R_USB_EPT_DATA, t_in);
+- *R_USB_EPT_DATA |= IO_FIELD(R_USB_EPT_DATA, t_in, toggle);
+- }
+-
+- /* Assert that the EP descriptor is disabled. */
+- assert(!(TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)));
+-
+- /* The reason we set the EP's sub pointer directly instead of
+- walking the SB list and linking it last in the list is that we only
+- have one active urb at a time (the rest are queued). */
+-
+- /* Note that we cannot have interrupts running when we have set the SB descriptor
+- but the EP is not yet enabled. If a bulk eot happens for another EP, we will
+- find this EP disabled and with a SB != 0, which will make us think that it's done. */
+- TxBulkEPList[epid].sub = virt_to_phys(sb_desc);
+- TxBulkEPList[epid].hw_len = 0;
+- /* Note that we don't have to fill in the ep_id field since this
+- was done when we allocated the EP descriptors in init_tx_bulk_ep. */
+-
+- /* Check if the dummy list is already with us (if several urbs were queued). */
+- if (TxBulkEPList[epid].next != virt_to_phys(&TxBulkDummyEPList[epid][0])) {
+-
+- dbg_bulk("Inviting dummy list to the party for urb 0x%lx, epid %d",
+- (unsigned long)urb, epid);
+-
+- /* The last EP in the dummy list already has its next pointer set to
+- TxBulkEPList[epid].next. */
+-
+- /* We don't need to check if the DMA is at this EP or not before changing the
+- next pointer, since we will do it in one 32-bit write (EP descriptors are
+- 32-bit aligned). */
+- TxBulkEPList[epid].next = virt_to_phys(&TxBulkDummyEPList[epid][0]);
+- }
+- /* Enable the EP descr. */
+- dbg_bulk("Enabling bulk EP for urb 0x%lx, epid %d", (unsigned long)urb, epid);
+- TxBulkEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
+-
+- /* Everything is set up, safe to enable interrupts again. */
+- restore_flags(flags);
+-
+- /* If the DMA bulk channel isn't running, we need to restart it if it
+- has stopped at the last EP descriptor (DMA stopped because there was
+- no more traffic) or if it has stopped at a dummy EP with the intr flag
+- set (DMA stopped because we were too slow in inserting new traffic). */
+- if (!(*R_DMA_CH8_SUB0_CMD & IO_MASK(R_DMA_CH8_SUB0_CMD, cmd))) {
+-
+- USB_EP_Desc_t *ep;
+- ep = (USB_EP_Desc_t *)phys_to_virt(*R_DMA_CH8_SUB0_EP);
+- dbg_bulk("DMA channel not running in add");
+- dbg_bulk("DMA is at 0x%lx", (unsigned long)ep);
+-
+- if (*R_DMA_CH8_SUB0_EP == virt_to_phys(&TxBulkEPList[NBR_OF_EPIDS - 1]) ||
+- (ep->command & 0x8) >> 3) {
+- *R_DMA_CH8_SUB0_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start);
+- /* Update/restart the bulk start timer since we just started the channel. */
+- mod_timer(&bulk_start_timer, jiffies + BULK_START_TIMER_INTERVAL);
+- /* Update/restart the bulk eot timer since we just inserted traffic. */
+- mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
+- }
+- }
+-
+- DBFEXIT;
+-}
+-
+-static void etrax_usb_complete_bulk_urb(struct urb *urb, int status)
+-{
+- etrax_urb_priv_t *urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
+- int epid = urb_priv->epid;
+- unsigned long flags;
+-
+- DBFENTER;
+-
+- if (status)
+- warn("Completing bulk urb with status %d.", status);
+-
+- dbg_bulk("Completing bulk urb 0x%lx for epid %d", (unsigned long)urb, epid);
+-
+- /* Update the urb list. */
+- urb_list_del(urb, epid);
+-
+- /* For an IN pipe, we always set the actual length, regardless of whether there was
+- an error or not (which means the device driver can use the data if it wants to). */
+- if (usb_pipein(urb->pipe)) {
+- urb->actual_length = urb_priv->rx_offset;
+- } else {
+- /* Set actual_length for OUT urbs also; the USB mass storage driver seems
+- to want that. We wouldn't know of any partial writes if there was an error. */
+- if (status == 0) {
+- urb->actual_length = urb->transfer_buffer_length;
+- } else {
+- urb->actual_length = 0;
+- }
+- }
+-
+- /* FIXME: Is there something of the things below we shouldn't do if there was an error?
+- Like, maybe we shouldn't toggle the toggle bits, or maybe we shouldn't insert more traffic. */
+-
+- save_flags(flags);
+- cli();
+-
+- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
+- nop();
+-
+- /* We need to fiddle with the toggle bits because the hardware doesn't do it for us. */
+- if (usb_pipeout(urb->pipe)) {
+- char toggle =
+- IO_EXTRACT(R_USB_EPT_DATA, t_out, *R_USB_EPT_DATA);
+- usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
+- usb_pipeout(urb->pipe), toggle);
+- } else {
+- char toggle =
+- IO_EXTRACT(R_USB_EPT_DATA, t_in, *R_USB_EPT_DATA);
+- usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
+- usb_pipeout(urb->pipe), toggle);
+- }
+- restore_flags(flags);
+-
+- /* Remember to free the SBs. */
+- etrax_remove_from_sb_list(urb);
+- kfree(urb_priv);
+- urb->hcpriv = 0;
+-
+- /* If there are any more urb's in the list we'd better start sending */
+- if (!urb_list_empty(epid)) {
+-
+- struct urb *new_urb;
+-
+- /* Get the first urb. */
+- new_urb = urb_list_first(epid);
+- assert(new_urb);
+-
+- dbg_bulk("More bulk for epid %d", epid);
+-
+- etrax_usb_add_to_bulk_sb_list(new_urb, epid);
+- }
+-
+- urb->status = status;
+-
+- /* We let any non-zero status from the layer above have precedence. */
+- if (status == 0) {
+- /* URB_SHORT_NOT_OK means that short reads (shorter than the endpoint's max length)
+- is to be treated as an error. */
+- if (urb->transfer_flags & URB_SHORT_NOT_OK) {
+- if (usb_pipein(urb->pipe) &&
+- (urb->actual_length !=
+- usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe)))) {
+- urb->status = -EREMOTEIO;
+- }
+- }
+- }
+-
+- if (urb->complete) {
+- urb->complete(urb, NULL);
+- }
+-
+- if (urb_list_empty(epid)) {
+- /* This means that this EP is now free, deconfigure it. */
+- etrax_usb_free_epid(epid);
+-
+- /* No more traffic; time to clean up.
+- Must set sub pointer to 0, since we look at the sub pointer when handling
+- the bulk eot interrupt. */
+-
+- dbg_bulk("No bulk for epid %d", epid);
+-
+- TxBulkEPList[epid].sub = 0;
+-
+- /* Unlink the dummy list. */
+-
+- dbg_bulk("Kicking dummy list out of party for urb 0x%lx, epid %d",
+- (unsigned long)urb, epid);
+-
+- /* No need to wait for the DMA before changing the next pointer.
+- The modulo NBR_OF_EPIDS isn't actually necessary, since we will never use
+- the last one (INVALID_EPID) for actual traffic. */
+- TxBulkEPList[epid].next =
+- virt_to_phys(&TxBulkEPList[(epid + 1) % NBR_OF_EPIDS]);
+- }
+-
+- DBFEXIT;
+-}
+-
+-static int etrax_usb_submit_ctrl_urb(struct urb *urb)
+-{
+- int epid;
+- int empty;
+- unsigned long flags;
+- etrax_urb_priv_t *urb_priv;
+-
+- DBFENTER;
+-
+- /* FIXME: Return -ENXIO if there is already a queued urb for this endpoint? */
+-
+- /* Epid allocation, empty check and list add must be protected.
+-
+- Epid allocation because if we find an existing epid for this endpoint an urb might be
+- completed (emptying the list) before we add the new urb to the list, causing the epid
+- to be de-allocated. We would then start the transfer with an invalid epid -> epid attn.
+-
+- Empty check and add because otherwise we might conclude that the list is not empty,
+- after which it becomes empty before we add the new urb to the list, causing us not to
+- insert the new traffic into the SB list. */
+-
+- spin_lock_irqsave(&urb_list_lock, flags);
+- epid = etrax_usb_setup_epid(urb);
+- if (epid == -1) {
+- spin_unlock_irqrestore(&urb_list_lock, flags);
+- DBFEXIT;
+- return -ENOMEM;
+- }
+- empty = urb_list_empty(epid);
+- urb_list_add(urb, epid);
+- spin_unlock_irqrestore(&urb_list_lock, flags);
+-
+- dbg_ctrl("Adding ctrl urb 0x%lx to %s list, epid %d",
+- (unsigned long)urb, empty ? "empty" : "", epid);
+-
+- /* Mark the urb as being in progress. */
+- urb->status = -EINPROGRESS;
+-
+- /* Setup the hcpriv data. */
+- urb_priv = kzalloc(sizeof(etrax_urb_priv_t), KMALLOC_FLAG);
+- assert(urb_priv != NULL);
+- /* This sets rx_offset to 0. */
+- urb_priv->urb_state = NOT_STARTED;
+- urb->hcpriv = urb_priv;
+-
+- if (empty) {
+- etrax_usb_add_to_ctrl_sb_list(urb, epid);
+- }
+-
+- DBFEXIT;
+-
+- return 0;
+-}
+-
+-static void etrax_usb_add_to_ctrl_sb_list(struct urb *urb, int epid)
+-{
+- USB_SB_Desc_t *sb_desc_setup;
+- USB_SB_Desc_t *sb_desc_data;
+- USB_SB_Desc_t *sb_desc_status;
+-
+- etrax_urb_priv_t *urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
+-
+- unsigned long flags;
+- char maxlen;
+-
+- DBFENTER;
+-
+- maxlen = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
+-
+- sb_desc_setup = (USB_SB_Desc_t*)kmem_cache_alloc(usb_desc_cache, SLAB_FLAG);
+- assert(sb_desc_setup != NULL);
+- sb_desc_status = (USB_SB_Desc_t*)kmem_cache_alloc(usb_desc_cache, SLAB_FLAG);
+- assert(sb_desc_status != NULL);
+-
+- /* Initialize the mandatory setup SB descriptor (used only in control transfers) */
+- sb_desc_setup->sw_len = 8;
+- sb_desc_setup->command = (IO_FIELD(USB_SB_command, rem, 0) |
+- IO_STATE(USB_SB_command, tt, setup) |
+- IO_STATE(USB_SB_command, full, yes) |
+- IO_STATE(USB_SB_command, eot, yes));
+-
+- sb_desc_setup->buf = virt_to_phys(urb->setup_packet);
+-
+- if (usb_pipeout(urb->pipe)) {
+- dbg_ctrl("Transfer for epid %d is OUT", epid);
+-
+- /* If this Control OUT transfer has an optional data stage we add an OUT token
+- before the mandatory IN (status) token, hence the reordered SB list */
+-
+- sb_desc_setup->next = virt_to_phys(sb_desc_status);
+- if (urb->transfer_buffer) {
+-
+- dbg_ctrl("This OUT transfer has an extra data stage");
+-
+- sb_desc_data = (USB_SB_Desc_t*)kmem_cache_alloc(usb_desc_cache, SLAB_FLAG);
+- assert(sb_desc_data != NULL);
+-
+- sb_desc_setup->next = virt_to_phys(sb_desc_data);
+-
+- sb_desc_data->sw_len = urb->transfer_buffer_length;
+- sb_desc_data->command = (IO_STATE(USB_SB_command, tt, out) |
+- IO_STATE(USB_SB_command, full, yes) |
+- IO_STATE(USB_SB_command, eot, yes));
+- sb_desc_data->buf = virt_to_phys(urb->transfer_buffer);
+- sb_desc_data->next = virt_to_phys(sb_desc_status);
+- }
+-
+- sb_desc_status->sw_len = 1;
+- sb_desc_status->command = (IO_FIELD(USB_SB_command, rem, 0) |
+- IO_STATE(USB_SB_command, tt, in) |
+- IO_STATE(USB_SB_command, eot, yes) |
+- IO_STATE(USB_SB_command, intr, yes) |
+- IO_STATE(USB_SB_command, eol, yes));
+-
+- sb_desc_status->buf = 0;
+- sb_desc_status->next = 0;
+-
+- } else if (usb_pipein(urb->pipe)) {
+-
+- dbg_ctrl("Transfer for epid %d is IN", epid);
+- dbg_ctrl("transfer_buffer_length = %d", urb->transfer_buffer_length);
+- dbg_ctrl("rem is calculated to %d", urb->transfer_buffer_length % maxlen);
+-
+- sb_desc_data = (USB_SB_Desc_t*)kmem_cache_alloc(usb_desc_cache, SLAB_FLAG);
+- assert(sb_desc_data != NULL);
+-
+- sb_desc_setup->next = virt_to_phys(sb_desc_data);
+-
+- sb_desc_data->sw_len = urb->transfer_buffer_length ?
+- (urb->transfer_buffer_length - 1) / maxlen + 1 : 0;
+- dbg_ctrl("sw_len got %d", sb_desc_data->sw_len);
+-
+- sb_desc_data->command =
+- (IO_FIELD(USB_SB_command, rem,
+- urb->transfer_buffer_length % maxlen) |
+- IO_STATE(USB_SB_command, tt, in) |
+- IO_STATE(USB_SB_command, eot, yes));
+-
+- sb_desc_data->buf = 0;
+- sb_desc_data->next = virt_to_phys(sb_desc_status);
+-
+- /* Read comment at zout_buffer declaration for an explanation to this. */
+- sb_desc_status->sw_len = 1;
+- sb_desc_status->command = (IO_FIELD(USB_SB_command, rem, 0) |
+- IO_STATE(USB_SB_command, tt, zout) |
+- IO_STATE(USB_SB_command, full, yes) |
+- IO_STATE(USB_SB_command, eot, yes) |
+- IO_STATE(USB_SB_command, intr, yes) |
+- IO_STATE(USB_SB_command, eol, yes));
+-
+- sb_desc_status->buf = virt_to_phys(&zout_buffer[0]);
+- sb_desc_status->next = 0;
+- }
+-
+- urb_priv->first_sb = sb_desc_setup;
+- urb_priv->last_sb = sb_desc_status;
+- urb_priv->epid = epid;
+-
+- urb_priv->urb_state = STARTED;
+-
+- /* Reset toggle bits and reset error count, remember to di and ei */
+- /* Warning: it is possible that this locking doesn't work with bottom-halves */
+-
+- save_flags(flags);
+- cli();
+-
+- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
+- nop();
+- if (*R_USB_EPT_DATA & IO_MASK(R_USB_EPT_DATA, hold)) {
+- panic("Hold was set in %s", __FUNCTION__);
+- }
+-
+-
+- /* FIXME: Compare with etrax_usb_add_to_bulk_sb_list where the toggle bits
+- are set to a specific value. Why the difference? Read "Transfer and Toggle Bits
+- in Designer's Reference, p. 8 - 11. */
+- *R_USB_EPT_DATA &=
+- ~(IO_MASK(R_USB_EPT_DATA, error_count_in) |
+- IO_MASK(R_USB_EPT_DATA, error_count_out) |
+- IO_MASK(R_USB_EPT_DATA, t_in) |
+- IO_MASK(R_USB_EPT_DATA, t_out));
+-
+- /* Since we use the rx interrupt to complete ctrl urbs, we can enable interrupts now
+- (i.e. we don't check the sub pointer on an eot interrupt like we do for bulk traffic). */
+- restore_flags(flags);
+-
+- /* Assert that the EP descriptor is disabled. */
+- assert(!(TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)));
+-
+- /* Set up and enable the EP descriptor. */
+- TxCtrlEPList[epid].sub = virt_to_phys(sb_desc_setup);
+- TxCtrlEPList[epid].hw_len = 0;
+- TxCtrlEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
+-
+- /* We start the DMA sub channel without checking if it's running or not, because:
+- 1) If it's already running, issuing the start command is a nop.
+- 2) We avoid a test-and-set race condition. */
+- *R_DMA_CH8_SUB1_CMD = IO_STATE(R_DMA_CH8_SUB1_CMD, cmd, start);
+-
+- DBFEXIT;
+-}
+-
+-static void etrax_usb_complete_ctrl_urb(struct urb *urb, int status)
+-{
+- etrax_urb_priv_t *urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
+- int epid = urb_priv->epid;
+-
+- DBFENTER;
+-
+- if (status)
+- warn("Completing ctrl urb with status %d.", status);
+-
+- dbg_ctrl("Completing ctrl epid %d, urb 0x%lx", epid, (unsigned long)urb);
+-
+- /* Remove this urb from the list. */
+- urb_list_del(urb, epid);
+-
+- /* For an IN pipe, we always set the actual length, regardless of whether there was
+- an error or not (which means the device driver can use the data if it wants to). */
+- if (usb_pipein(urb->pipe)) {
+- urb->actual_length = urb_priv->rx_offset;
+- }
+-
+- /* FIXME: Is there something of the things below we shouldn't do if there was an error?
+- Like, maybe we shouldn't insert more traffic. */
+-
+- /* Remember to free the SBs. */
+- etrax_remove_from_sb_list(urb);
+- kfree(urb_priv);
+- urb->hcpriv = 0;
+-
+- /* If there are any more urbs in the list we'd better start sending. */
+- if (!urb_list_empty(epid)) {
+- struct urb *new_urb;
+-
+- /* Get the first urb. */
+- new_urb = urb_list_first(epid);
+- assert(new_urb);
+-
+- dbg_ctrl("More ctrl for epid %d, first urb = 0x%lx", epid, (unsigned long)new_urb);
+-
+- etrax_usb_add_to_ctrl_sb_list(new_urb, epid);
+- }
+-
+- urb->status = status;
+-
+- /* We let any non-zero status from the layer above have precedence. */
+- if (status == 0) {
+- /* URB_SHORT_NOT_OK means that short reads (shorter than the endpoint's max length)
+- is to be treated as an error. */
+- if (urb->transfer_flags & URB_SHORT_NOT_OK) {
+- if (usb_pipein(urb->pipe) &&
+- (urb->actual_length !=
+- usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe)))) {
+- urb->status = -EREMOTEIO;
+- }
+- }
+- }
+-
+- if (urb->complete) {
+- urb->complete(urb, NULL);
+- }
+-
+- if (urb_list_empty(epid)) {
+- /* No more traffic. Time to clean up. */
+- etrax_usb_free_epid(epid);
+- /* Must set sub pointer to 0. */
+- dbg_ctrl("No ctrl for epid %d", epid);
+- TxCtrlEPList[epid].sub = 0;
+- }
+-
+- DBFEXIT;
+-}
+-
+-static int etrax_usb_submit_intr_urb(struct urb *urb)
+-{
+-
+- int epid;
+-
+- DBFENTER;
+-
+- if (usb_pipeout(urb->pipe)) {
+- /* Unsupported transfer type.
+- We don't support interrupt out traffic. (If we do, we can't support
+- intervals for neither in or out traffic, but are forced to schedule all
+- interrupt traffic in one frame.) */
+- return -EINVAL;
+- }
+-
+- epid = etrax_usb_setup_epid(urb);
+- if (epid == -1) {
+- DBFEXIT;
+- return -ENOMEM;
+- }
+-
+- if (!urb_list_empty(epid)) {
+- /* There is already a queued urb for this endpoint. */
+- etrax_usb_free_epid(epid);
+- return -ENXIO;
+- }
+-
+- urb->status = -EINPROGRESS;
+-
+- dbg_intr("Add intr urb 0x%lx, to list, epid %d", (unsigned long)urb, epid);
+-
+- urb_list_add(urb, epid);
+- etrax_usb_add_to_intr_sb_list(urb, epid);
+-
+- return 0;
+-
+- DBFEXIT;
+-}
+-
+-static void etrax_usb_add_to_intr_sb_list(struct urb *urb, int epid)
+-{
+-
+- volatile USB_EP_Desc_t *tmp_ep;
+- volatile USB_EP_Desc_t *first_ep;
+-
+- char maxlen;
+- int interval;
+- int i;
+-
+- etrax_urb_priv_t *urb_priv;
+-
+- DBFENTER;
+-
+- maxlen = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
+- interval = urb->interval;
+-
+- urb_priv = kzalloc(sizeof(etrax_urb_priv_t), KMALLOC_FLAG);
+- assert(urb_priv != NULL);
+- urb->hcpriv = urb_priv;
+-
+- first_ep = &TxIntrEPList[0];
+-
+- /* Round of the interval to 2^n, it is obvious that this code favours
+- smaller numbers, but that is actually a good thing */
+- /* FIXME: The "rounding error" for larger intervals will be quite
+- large. For in traffic this shouldn't be a problem since it will only
+- mean that we "poll" more often. */
+- for (i = 0; interval; i++) {
+- interval = interval >> 1;
+- }
+- interval = 1 << (i - 1);
+-
+- dbg_intr("Interval rounded to %d", interval);
+-
+- tmp_ep = first_ep;
+- i = 0;
+- do {
+- if (tmp_ep->command & IO_MASK(USB_EP_command, eof)) {
+- if ((i % interval) == 0) {
+- /* Insert the traffic ep after tmp_ep */
+- USB_EP_Desc_t *ep_desc;
+- USB_SB_Desc_t *sb_desc;
+-
+- dbg_intr("Inserting EP for epid %d", epid);
+-
+- ep_desc = (USB_EP_Desc_t *)
+- kmem_cache_alloc(usb_desc_cache, SLAB_FLAG);
+- sb_desc = (USB_SB_Desc_t *)
+- kmem_cache_alloc(usb_desc_cache, SLAB_FLAG);
+- assert(ep_desc != NULL);
+- CHECK_ALIGN(ep_desc);
+- assert(sb_desc != NULL);
+-
+- ep_desc->sub = virt_to_phys(sb_desc);
+- ep_desc->hw_len = 0;
+- ep_desc->command = (IO_FIELD(USB_EP_command, epid, epid) |
+- IO_STATE(USB_EP_command, enable, yes));
+-
+-
+- /* Round upwards the number of packets of size maxlen
+- that this SB descriptor should receive. */
+- sb_desc->sw_len = urb->transfer_buffer_length ?
+- (urb->transfer_buffer_length - 1) / maxlen + 1 : 0;
+- sb_desc->next = 0;
+- sb_desc->buf = 0;
+- sb_desc->command =
+- (IO_FIELD(USB_SB_command, rem, urb->transfer_buffer_length % maxlen) |
+- IO_STATE(USB_SB_command, tt, in) |
+- IO_STATE(USB_SB_command, eot, yes) |
+- IO_STATE(USB_SB_command, eol, yes));
+-
+- ep_desc->next = tmp_ep->next;
+- tmp_ep->next = virt_to_phys(ep_desc);
+- }
+- i++;
+- }
+- tmp_ep = (USB_EP_Desc_t *)phys_to_virt(tmp_ep->next);
+- } while (tmp_ep != first_ep);
+-
+-
+- /* Note that first_sb/last_sb doesn't apply to interrupt traffic. */
+- urb_priv->epid = epid;
+-
+- /* We start the DMA sub channel without checking if it's running or not, because:
+- 1) If it's already running, issuing the start command is a nop.
+- 2) We avoid a test-and-set race condition. */
+- *R_DMA_CH8_SUB2_CMD = IO_STATE(R_DMA_CH8_SUB2_CMD, cmd, start);
+-
+- DBFEXIT;
+-}
+-
+-
+-
+-static void etrax_usb_complete_intr_urb(struct urb *urb, int status)
+-{
+- etrax_urb_priv_t *urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
+- int epid = urb_priv->epid;
+-
+- DBFENTER;
+-
+- if (status)
+- warn("Completing intr urb with status %d.", status);
+-
+- dbg_intr("Completing intr epid %d, urb 0x%lx", epid, (unsigned long)urb);
+-
+- urb->status = status;
+- urb->actual_length = urb_priv->rx_offset;
+-
+- dbg_intr("interrupt urb->actual_length = %d", urb->actual_length);
+-
+- /* We let any non-zero status from the layer above have precedence. */
+- if (status == 0) {
+- /* URB_SHORT_NOT_OK means that short reads (shorter than the endpoint's max length)
+- is to be treated as an error. */
+- if (urb->transfer_flags & URB_SHORT_NOT_OK) {
+- if (urb->actual_length !=
+- usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe))) {
+- urb->status = -EREMOTEIO;
+- }
+- }
+- }
+-
+- /* The driver will resubmit the URB so we need to remove it first */
+- etrax_usb_unlink_urb(urb, 0);
+- if (urb->complete) {
+- urb->complete(urb, NULL);
+- }
+-
+- DBFEXIT;
+-}
+-
+-
+-static int etrax_usb_submit_isoc_urb(struct urb *urb)
+-{
+- int epid;
+- unsigned long flags;
+-
+- DBFENTER;
+-
+- dbg_isoc("Submitting isoc urb = 0x%lx", (unsigned long)urb);
+-
+- /* Epid allocation, empty check and list add must be protected.
+- Read about this in etrax_usb_submit_ctrl_urb. */
+-
+- spin_lock_irqsave(&urb_list_lock, flags);
+- /* Is there an active epid for this urb ? */
+- epid = etrax_usb_setup_epid(urb);
+- if (epid == -1) {
+- DBFEXIT;
+- spin_unlock_irqrestore(&urb_list_lock, flags);
+- return -ENOMEM;
+- }
+-
+- /* Ok, now we got valid endpoint, lets insert some traffic */
+-
+- urb->status = -EINPROGRESS;
+-
+- /* Find the last urb in the URB_List and add this urb after that one.
+- Also add the traffic, that is do an etrax_usb_add_to_isoc_sb_list. This
+- is important to make this in "real time" since isochronous traffic is
+- time sensitive. */
+-
+- dbg_isoc("Adding isoc urb to (possibly empty) list");
+- urb_list_add(urb, epid);
+- etrax_usb_add_to_isoc_sb_list(urb, epid);
+- spin_unlock_irqrestore(&urb_list_lock, flags);
+-
+- DBFEXIT;
+-
+- return 0;
+-}
+-
+-static void etrax_usb_check_error_isoc_ep(const int epid)
+-{
+- unsigned long int flags;
+- int error_code;
+- __u32 r_usb_ept_data;
+-
+- /* We can't read R_USB_EPID_ATTN here since it would clear the iso_eof,
+- bulk_eot and epid_attn interrupts. So we just check the status of
+- the epid without testing if for it in R_USB_EPID_ATTN. */
+-
+-
+- save_flags(flags);
+- cli();
+- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
+- nop();
+- /* Note that although there are separate R_USB_EPT_DATA and R_USB_EPT_DATA_ISO
+- registers, they are located at the same address and are of the same size.
+- In other words, this read should be ok for isoc also. */
+- r_usb_ept_data = *R_USB_EPT_DATA;
+- restore_flags(flags);
+-
+- error_code = IO_EXTRACT(R_USB_EPT_DATA_ISO, error_code, r_usb_ept_data);
+-
+- if (r_usb_ept_data & IO_MASK(R_USB_EPT_DATA, hold)) {
+- warn("Hold was set for epid %d.", epid);
+- return;
+- }
+-
+- if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA_ISO, error_code, no_error)) {
+-
+- /* This indicates that the SB list of the ept was completed before
+- new data was appended to it. This is not an error, but indicates
+- large system or USB load and could possibly cause trouble for
+- very timing sensitive USB device drivers so we log it.
+- */
+- info("Isoc. epid %d disabled with no error", epid);
+- return;
+-
+- } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA_ISO, error_code, stall)) {
+- /* Not really a protocol error, just says that the endpoint gave
+- a stall response. Note that error_code cannot be stall for isoc. */
+- panic("Isoc traffic cannot stall");
+-
+- } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA_ISO, error_code, bus_error)) {
+- /* Two devices responded to a transaction request. Must be resolved
+- by software. FIXME: Reset ports? */
+- panic("Bus error for epid %d."
+- " Two devices responded to transaction request",
+- epid);
+-
+- } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code, buffer_error)) {
+- /* DMA overrun or underrun. */
+- warn("Buffer overrun/underrun for epid %d. DMA too busy?", epid);
+-
+- /* It seems that error_code = buffer_error in
+- R_USB_EPT_DATA/R_USB_EPT_DATA_ISO and ourun = yes in R_USB_STATUS
+- are the same error. */
+- }
+-}
+-
+-
+-static void etrax_usb_add_to_isoc_sb_list(struct urb *urb, int epid)
+-{
+-
+- int i = 0;
+-
+- etrax_urb_priv_t *urb_priv;
+- USB_SB_Desc_t *prev_sb_desc, *next_sb_desc, *temp_sb_desc;
+-
+- DBFENTER;
+-
+- prev_sb_desc = next_sb_desc = temp_sb_desc = NULL;
+-
+- urb_priv = kzalloc(sizeof(etrax_urb_priv_t), GFP_ATOMIC);
+- assert(urb_priv != NULL);
+-
+- urb->hcpriv = urb_priv;
+- urb_priv->epid = epid;
+-
+- if (usb_pipeout(urb->pipe)) {
+-
+- if (urb->number_of_packets == 0) panic("etrax_usb_add_to_isoc_sb_list 0 packets\n");
+-
+- dbg_isoc("Transfer for epid %d is OUT", epid);
+- dbg_isoc("%d packets in URB", urb->number_of_packets);
+-
+- /* Create one SB descriptor for each packet and link them together. */
+- for (i = 0; i < urb->number_of_packets; i++) {
+- if (!urb->iso_frame_desc[i].length)
+- continue;
+-
+- next_sb_desc = (USB_SB_Desc_t*)kmem_cache_alloc(usb_desc_cache, SLAB_ATOMIC);
+- assert(next_sb_desc != NULL);
+-
+- if (urb->iso_frame_desc[i].length > 0) {
+-
+- next_sb_desc->command = (IO_STATE(USB_SB_command, tt, out) |
+- IO_STATE(USB_SB_command, eot, yes));
+-
+- next_sb_desc->sw_len = urb->iso_frame_desc[i].length;
+- next_sb_desc->buf = virt_to_phys((char*)urb->transfer_buffer + urb->iso_frame_desc[i].offset);
+-
+- /* Check if full length transfer. */
+- if (urb->iso_frame_desc[i].length ==
+- usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe))) {
+- next_sb_desc->command |= IO_STATE(USB_SB_command, full, yes);
+- }
+- } else {
+- dbg_isoc("zero len packet");
+- next_sb_desc->command = (IO_FIELD(USB_SB_command, rem, 0) |
+- IO_STATE(USB_SB_command, tt, zout) |
+- IO_STATE(USB_SB_command, eot, yes) |
+- IO_STATE(USB_SB_command, full, yes));
+-
+- next_sb_desc->sw_len = 1;
+- next_sb_desc->buf = virt_to_phys(&zout_buffer[0]);
+- }
+-
+- /* First SB descriptor that belongs to this urb */
+- if (i == 0)
+- urb_priv->first_sb = next_sb_desc;
+- else
+- prev_sb_desc->next = virt_to_phys(next_sb_desc);
+-
+- prev_sb_desc = next_sb_desc;
+- }
+-
+- next_sb_desc->command |= (IO_STATE(USB_SB_command, intr, yes) |
+- IO_STATE(USB_SB_command, eol, yes));
+- next_sb_desc->next = 0;
+- urb_priv->last_sb = next_sb_desc;
+-
+- } else if (usb_pipein(urb->pipe)) {
+-
+- dbg_isoc("Transfer for epid %d is IN", epid);
+- dbg_isoc("transfer_buffer_length = %d", urb->transfer_buffer_length);
+- dbg_isoc("rem is calculated to %d", urb->iso_frame_desc[urb->number_of_packets - 1].length);
+-
+- /* Note that in descriptors for periodic traffic are not consumed. This means that
+- the USB controller never propagates in the SB list. In other words, if there already
+- is an SB descriptor in the list for this EP we don't have to do anything. */
+- if (TxIsocEPList[epid].sub == 0) {
+- dbg_isoc("Isoc traffic not already running, allocating SB");
+-
+- next_sb_desc = (USB_SB_Desc_t*)kmem_cache_alloc(usb_desc_cache, SLAB_ATOMIC);
+- assert(next_sb_desc != NULL);
+-
+- next_sb_desc->command = (IO_STATE(USB_SB_command, tt, in) |
+- IO_STATE(USB_SB_command, eot, yes) |
+- IO_STATE(USB_SB_command, eol, yes));
+-
+- next_sb_desc->next = 0;
+- next_sb_desc->sw_len = 1; /* Actual number of packets is not relevant
+- for periodic in traffic as long as it is more
+- than zero. Set to 1 always. */
+- next_sb_desc->buf = 0;
+-
+- /* The rem field is don't care for isoc traffic, so we don't set it. */
+-
+- /* Only one SB descriptor that belongs to this urb. */
+- urb_priv->first_sb = next_sb_desc;
+- urb_priv->last_sb = next_sb_desc;
+-
+- } else {
+-
+- dbg_isoc("Isoc traffic already running, just setting first/last_sb");
+-
+- /* Each EP for isoc in will have only one SB descriptor, setup when submitting the
+- already active urb. Note that even though we may have several first_sb/last_sb
+- pointing at the same SB descriptor, they are freed only once (when the list has
+- become empty). */
+- urb_priv->first_sb = phys_to_virt(TxIsocEPList[epid].sub);
+- urb_priv->last_sb = phys_to_virt(TxIsocEPList[epid].sub);
+- return;
+- }
+-
+- }
+-
+- /* Find the spot to insert this urb and add it. */
+- if (TxIsocEPList[epid].sub == 0) {
+- /* First SB descriptor inserted in this list (in or out). */
+- dbg_isoc("Inserting SB desc first in list");
+- TxIsocEPList[epid].hw_len = 0;
+- TxIsocEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
+-
+- } else {
+- /* Isochronous traffic is already running, insert new traffic last (only out). */
+- dbg_isoc("Inserting SB desc last in list");
+- temp_sb_desc = phys_to_virt(TxIsocEPList[epid].sub);
+- while ((temp_sb_desc->command & IO_MASK(USB_SB_command, eol)) !=
+- IO_STATE(USB_SB_command, eol, yes)) {
+- assert(temp_sb_desc->next);
+- temp_sb_desc = phys_to_virt(temp_sb_desc->next);
+- }
+- dbg_isoc("Appending list on desc 0x%p", temp_sb_desc);
+-
+- /* Next pointer must be set before eol is removed. */
+- temp_sb_desc->next = virt_to_phys(urb_priv->first_sb);
+- /* Clear the previous end of list flag since there is a new in the
+- added SB descriptor list. */
+- temp_sb_desc->command &= ~IO_MASK(USB_SB_command, eol);
+-
+- if (!(TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable))) {
+- /* 8.8.5 in Designer's Reference says we should check for and correct
+- any errors in the EP here. That should not be necessary if epid_attn
+- is handled correctly, so we assume all is ok. */
+- dbg_isoc("EP disabled");
+- etrax_usb_check_error_isoc_ep(epid);
+-
+- /* The SB list was exhausted. */
+- if (virt_to_phys(urb_priv->last_sb) != TxIsocEPList[epid].sub) {
+- /* The new sublist did not get processed before the EP was
+- disabled. Setup the EP again. */
+- dbg_isoc("Set EP sub to new list");
+- TxIsocEPList[epid].hw_len = 0;
+- TxIsocEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
+- }
+- }
+- }
+-
+- if (urb->transfer_flags & URB_ISO_ASAP) {
+- /* The isoc transfer should be started as soon as possible. The start_frame
+- field is a return value if URB_ISO_ASAP was set. Comparing R_USB_FM_NUMBER
+- with a USB Chief trace shows that the first isoc IN token is sent 2 frames
+- later. I'm not sure how this affects usage of the start_frame field by the
+- device driver, or how it affects things when USB_ISO_ASAP is not set, so
+- therefore there's no compensation for the 2 frame "lag" here. */
+- urb->start_frame = (*R_USB_FM_NUMBER & 0x7ff);
+- TxIsocEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
+- urb_priv->urb_state = STARTED;
+- dbg_isoc("URB_ISO_ASAP set, urb->start_frame set to %d", urb->start_frame);
+- } else {
+- /* Not started yet. */
+- urb_priv->urb_state = NOT_STARTED;
+- dbg_isoc("urb_priv->urb_state set to NOT_STARTED");
+- }
+-
+- /* We start the DMA sub channel without checking if it's running or not, because:
+- 1) If it's already running, issuing the start command is a nop.
+- 2) We avoid a test-and-set race condition. */
+- *R_DMA_CH8_SUB3_CMD = IO_STATE(R_DMA_CH8_SUB3_CMD, cmd, start);
+-
+- DBFEXIT;
+-}
+-
+-static void etrax_usb_complete_isoc_urb(struct urb *urb, int status)
+-{
+- etrax_urb_priv_t *urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
+- int epid = urb_priv->epid;
+- int auto_resubmit = 0;
+-
+- DBFENTER;
+- dbg_isoc("complete urb 0x%p, status %d", urb, status);
+-
+- if (status)
+- warn("Completing isoc urb with status %d.", status);
+-
+- if (usb_pipein(urb->pipe)) {
+- int i;
+-
+- /* Make that all isoc packets have status and length set before
+- completing the urb. */
+- for (i = urb_priv->isoc_packet_counter; i < urb->number_of_packets; i++) {
+- urb->iso_frame_desc[i].actual_length = 0;
+- urb->iso_frame_desc[i].status = -EPROTO;
+- }
+-
+- urb_list_del(urb, epid);
+-
+- if (!list_empty(&urb_list[epid])) {
+- ((etrax_urb_priv_t *)(urb_list_first(epid)->hcpriv))->urb_state = STARTED;
+- } else {
+- unsigned long int flags;
+- if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
+- /* The EP was enabled, disable it and wait. */
+- TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
+-
+- /* Ah, the luxury of busy-wait. */
+- while (*R_DMA_CH8_SUB3_EP == virt_to_phys(&TxIsocEPList[epid]));
+- }
+-
+- etrax_remove_from_sb_list(urb);
+- TxIsocEPList[epid].sub = 0;
+- TxIsocEPList[epid].hw_len = 0;
+-
+- save_flags(flags);
+- cli();
+- etrax_usb_free_epid(epid);
+- restore_flags(flags);
+- }
+-
+- urb->hcpriv = 0;
+- kfree(urb_priv);
+-
+- /* Release allocated bandwidth. */
+- usb_release_bandwidth(urb->dev, urb, 0);
+- } else if (usb_pipeout(urb->pipe)) {
+- int freed_descr;
+-
+- dbg_isoc("Isoc out urb complete 0x%p", urb);
+-
+- /* Update the urb list. */
+- urb_list_del(urb, epid);
+-
+- freed_descr = etrax_remove_from_sb_list(urb);
+- dbg_isoc("freed %d descriptors of %d packets", freed_descr, urb->number_of_packets);
+- assert(freed_descr == urb->number_of_packets);
+- urb->hcpriv = 0;
+- kfree(urb_priv);
+-
+- /* Release allocated bandwidth. */
+- usb_release_bandwidth(urb->dev, urb, 0);
+- }
+-
+- urb->status = status;
+- if (urb->complete) {
+- urb->complete(urb, NULL);
+- }
+-
+- if (auto_resubmit) {
+- /* Check that urb was not unlinked by the complete callback. */
+- if (__urb_list_entry(urb, epid)) {
+- /* Move this one down the list. */
+- urb_list_move_last(urb, epid);
+-
+- /* Mark the now first urb as started (may already be). */
+- ((etrax_urb_priv_t *)(urb_list_first(epid)->hcpriv))->urb_state = STARTED;
+-
+- /* Must set this to 0 since this urb is still active after
+- completion. */
+- urb_priv->isoc_packet_counter = 0;
+- } else {
+- warn("(ISOC) automatic resubmit urb 0x%p removed by complete.", urb);
+- }
+- }
+-
+- DBFEXIT;
+-}
+-
+-static void etrax_usb_complete_urb(struct urb *urb, int status)
+-{
+- switch (usb_pipetype(urb->pipe)) {
+- case PIPE_BULK:
+- etrax_usb_complete_bulk_urb(urb, status);
+- break;
+- case PIPE_CONTROL:
+- etrax_usb_complete_ctrl_urb(urb, status);
+- break;
+- case PIPE_INTERRUPT:
+- etrax_usb_complete_intr_urb(urb, status);
+- break;
+- case PIPE_ISOCHRONOUS:
+- etrax_usb_complete_isoc_urb(urb, status);
+- break;
+- default:
+- err("Unknown pipetype");
+- }
+-}
+-
+-
+-
+-static irqreturn_t etrax_usb_hc_interrupt_top_half(int irq, void *vhc)
+-{
+- usb_interrupt_registers_t *reg;
+- unsigned long flags;
+- __u32 irq_mask;
+- __u8 status;
+- __u32 epid_attn;
+- __u16 port_status_1;
+- __u16 port_status_2;
+- __u32 fm_number;
+-
+- DBFENTER;
+-
+- /* Read critical registers into local variables, do kmalloc afterwards. */
+- save_flags(flags);
+- cli();
+-
+- irq_mask = *R_USB_IRQ_MASK_READ;
+- /* Reading R_USB_STATUS clears the ctl_status interrupt. Note that R_USB_STATUS
+- must be read before R_USB_EPID_ATTN since reading the latter clears the
+- ourun and perror fields of R_USB_STATUS. */
+- status = *R_USB_STATUS;
+-
+- /* Reading R_USB_EPID_ATTN clears the iso_eof, bulk_eot and epid_attn interrupts. */
+- epid_attn = *R_USB_EPID_ATTN;
+-
+- /* Reading R_USB_RH_PORT_STATUS_1 and R_USB_RH_PORT_STATUS_2 clears the
+- port_status interrupt. */
+- port_status_1 = *R_USB_RH_PORT_STATUS_1;
+- port_status_2 = *R_USB_RH_PORT_STATUS_2;
+-
+- /* Reading R_USB_FM_NUMBER clears the sof interrupt. */
+- /* Note: the lower 11 bits contain the actual frame number, sent with each sof. */
+- fm_number = *R_USB_FM_NUMBER;
+-
+- restore_flags(flags);
+-
+- reg = (usb_interrupt_registers_t *)kmem_cache_alloc(top_half_reg_cache, SLAB_ATOMIC);
+-
+- assert(reg != NULL);
+-
+- reg->hc = (etrax_hc_t *)vhc;
+-
+- /* Now put register values into kmalloc'd area. */
+- reg->r_usb_irq_mask_read = irq_mask;
+- reg->r_usb_status = status;
+- reg->r_usb_epid_attn = epid_attn;
+- reg->r_usb_rh_port_status_1 = port_status_1;
+- reg->r_usb_rh_port_status_2 = port_status_2;
+- reg->r_usb_fm_number = fm_number;
+-
+- INIT_WORK(®->usb_bh, etrax_usb_hc_interrupt_bottom_half, reg);
+- schedule_work(®->usb_bh);
+-
+- DBFEXIT;
+-
+- return IRQ_HANDLED;
+-}
+-
+-static void etrax_usb_hc_interrupt_bottom_half(void *data)
+-{
+- usb_interrupt_registers_t *reg = (usb_interrupt_registers_t *)data;
+- __u32 irq_mask = reg->r_usb_irq_mask_read;
+-
+- DBFENTER;
+-
+- /* Interrupts are handled in order of priority. */
+- if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, epid_attn)) {
+- etrax_usb_hc_epid_attn_interrupt(reg);
+- }
+- if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, port_status)) {
+- etrax_usb_hc_port_status_interrupt(reg);
+- }
+- if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, ctl_status)) {
+- etrax_usb_hc_ctl_status_interrupt(reg);
+- }
+- if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, iso_eof)) {
+- etrax_usb_hc_isoc_eof_interrupt();
+- }
+- if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, bulk_eot)) {
+- /* Update/restart the bulk start timer since obviously the channel is running. */
+- mod_timer(&bulk_start_timer, jiffies + BULK_START_TIMER_INTERVAL);
+- /* Update/restart the bulk eot timer since we just received an bulk eot interrupt. */
+- mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
+-
+- etrax_usb_hc_bulk_eot_interrupt(0);
+- }
+-
+- kmem_cache_free(top_half_reg_cache, reg);
+-
+- DBFEXIT;
+-}
+-
+-
+-void etrax_usb_hc_isoc_eof_interrupt(void)
+-{
+- struct urb *urb;
+- etrax_urb_priv_t *urb_priv;
+- int epid;
+- unsigned long flags;
+-
+- DBFENTER;
+-
+- /* Do not check the invalid epid (it has a valid sub pointer). */
+- for (epid = 0; epid < NBR_OF_EPIDS - 1; epid++) {
+-
+- /* Do not check the invalid epid (it has a valid sub pointer). */
+- if ((epid == DUMMY_EPID) || (epid == INVALID_EPID))
+- continue;
+-
+- /* Disable interrupts to block the isoc out descriptor interrupt handler
+- from being called while the isoc EPID list is being checked.
+- */
+- save_flags(flags);
+- cli();
+-
+- if (TxIsocEPList[epid].sub == 0) {
+- /* Nothing here to see. */
+- restore_flags(flags);
+- continue;
+- }
+-
+- /* Get the first urb (if any). */
+- urb = urb_list_first(epid);
+- if (urb == 0) {
+- warn("Ignoring NULL urb");
+- restore_flags(flags);
+- continue;
+- }
+- if (usb_pipein(urb->pipe)) {
+-
+- /* Sanity check. */
+- assert(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
+-
+- urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
+- assert(urb_priv);
+-
+- if (urb_priv->urb_state == NOT_STARTED) {
+-
+- /* If ASAP is not set and urb->start_frame is the current frame,
+- start the transfer. */
+- if (!(urb->transfer_flags & URB_ISO_ASAP) &&
+- (urb->start_frame == (*R_USB_FM_NUMBER & 0x7ff))) {
+-
+- dbg_isoc("Enabling isoc IN EP descr for epid %d", epid);
+- TxIsocEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
+-
+- /* This urb is now active. */
+- urb_priv->urb_state = STARTED;
+- continue;
+- }
+- }
+- }
+- restore_flags(flags);
+- }
+-
+- DBFEXIT;
+-
+-}
+-
+-void etrax_usb_hc_bulk_eot_interrupt(int timer_induced)
+-{
+- int epid;
+-
+- /* The technique is to run one urb at a time, wait for the eot interrupt at which
+- point the EP descriptor has been disabled. */
+-
+- DBFENTER;
+- dbg_bulk("bulk eot%s", timer_induced ? ", called by timer" : "");
+-
+- for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
+-
+- if (!(TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) &&
+- (TxBulkEPList[epid].sub != 0)) {
+-
+- struct urb *urb;
+- etrax_urb_priv_t *urb_priv;
+- unsigned long flags;
+- __u32 r_usb_ept_data;
+-
+- /* Found a disabled EP descriptor which has a non-null sub pointer.
+- Verify that this ctrl EP descriptor got disabled no errors.
+- FIXME: Necessary to check error_code? */
+- dbg_bulk("for epid %d?", epid);
+-
+- /* Get the first urb. */
+- urb = urb_list_first(epid);
+-
+- /* FIXME: Could this happen for valid reasons? Why did it disappear? Because of
+- wrong unlinking? */
+- if (!urb) {
+- warn("NULL urb for epid %d", epid);
+- continue;
+- }
+-
+- assert(urb);
+- urb_priv = (etrax_urb_priv_t *)urb->hcpriv;
+- assert(urb_priv);
+-
+- /* Sanity checks. */
+- assert(usb_pipetype(urb->pipe) == PIPE_BULK);
+- if (phys_to_virt(TxBulkEPList[epid].sub) != urb_priv->last_sb) {
+- err("bulk endpoint got disabled before reaching last sb");
+- }
+-
+- /* For bulk IN traffic, there seems to be a race condition between
+- between the bulk eot and eop interrupts, or rather an uncertainty regarding
+- the order in which they happen. Normally we expect the eop interrupt from
+- DMA channel 9 to happen before the eot interrupt.
+-
+- Therefore, we complete the bulk IN urb in the rx interrupt handler instead. */
+-
+- if (usb_pipein(urb->pipe)) {
+- dbg_bulk("in urb, continuing");
+- continue;
+- }
+-
+- save_flags(flags);
+- cli();
+- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
+- nop();
+- r_usb_ept_data = *R_USB_EPT_DATA;
+- restore_flags(flags);
+-
+- if (IO_EXTRACT(R_USB_EPT_DATA, error_code, r_usb_ept_data) ==
+- IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
+- /* This means that the endpoint has no error, is disabled
+- and had inserted traffic, i.e. transfer successfully completed. */
+- etrax_usb_complete_bulk_urb(urb, 0);
+- } else {
+- /* Shouldn't happen. We expect errors to be caught by epid attention. */
+- err("Found disabled bulk EP desc, error_code != no_error");
+- }
+- }
+- }
+-
+- /* Normally, we should find (at least) one disabled EP descriptor with a valid sub pointer.
+- However, because of the uncertainty in the deliverance of the eop/eot interrupts, we may
+- not. Also, we might find two disabled EPs when handling an eot interrupt, and then find
+- none the next time. */
+-
+- DBFEXIT;
+-
+-}
+-
+-void etrax_usb_hc_epid_attn_interrupt(usb_interrupt_registers_t *reg)
+-{
+- /* This function handles the epid attention interrupt. There are a variety of reasons
+- for this interrupt to happen (Designer's Reference, p. 8 - 22 for the details):
+-
+- invalid ep_id - Invalid epid in an EP (EP disabled).
+- stall - Not strictly an error condition (EP disabled).
+- 3rd error - Three successive transaction errors (EP disabled).
+- buffer ourun - Buffer overrun or underrun (EP disabled).
+- past eof1 - Intr or isoc transaction proceeds past EOF1.
+- near eof - Intr or isoc transaction would not fit inside the frame.
+- zout transfer - If zout transfer for a bulk endpoint (EP disabled).
+- setup transfer - If setup transfer for a non-ctrl endpoint (EP disabled). */
+-
+- int epid;
+-
+-
+- DBFENTER;
+-
+- assert(reg != NULL);
+-
+- /* Note that we loop through all epids. We still want to catch errors for
+- the invalid one, even though we might handle them differently. */
+- for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
+-
+- if (test_bit(epid, (void *)®->r_usb_epid_attn)) {
+-
+- struct urb *urb;
+- __u32 r_usb_ept_data;
+- unsigned long flags;
+- int error_code;
+-
+- save_flags(flags);
+- cli();
+- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
+- nop();
+- /* Note that although there are separate R_USB_EPT_DATA and R_USB_EPT_DATA_ISO
+- registers, they are located at the same address and are of the same size.
+- In other words, this read should be ok for isoc also. */
+- r_usb_ept_data = *R_USB_EPT_DATA;
+- restore_flags(flags);
+-
+- /* First some sanity checks. */
+- if (epid == INVALID_EPID) {
+- /* FIXME: What if it became disabled? Could seriously hurt interrupt
+- traffic. (Use do_intr_recover.) */
+- warn("Got epid_attn for INVALID_EPID (%d).", epid);
+- err("R_USB_EPT_DATA = 0x%x", r_usb_ept_data);
+- err("R_USB_STATUS = 0x%x", reg->r_usb_status);
+- continue;
+- } else if (epid == DUMMY_EPID) {
+- /* We definitely don't care about these ones. Besides, they are
+- always disabled, so any possible disabling caused by the
+- epid attention interrupt is irrelevant. */
+- warn("Got epid_attn for DUMMY_EPID (%d).", epid);
+- continue;
+- }
+-
+- /* Get the first urb in the urb list for this epid. We blatantly assume
+- that only the first urb could have caused the epid attention.
+- (For bulk and ctrl, only one urb is active at any one time. For intr
+- and isoc we remove them once they are completed.) */
+- urb = urb_list_first(epid);
+-
+- if (urb == NULL) {
+- err("Got epid_attn for epid %i with no urb.", epid);
+- err("R_USB_EPT_DATA = 0x%x", r_usb_ept_data);
+- err("R_USB_STATUS = 0x%x", reg->r_usb_status);
+- continue;
+- }
+-
+- switch (usb_pipetype(urb->pipe)) {
+- case PIPE_BULK:
+- warn("Got epid attn for bulk endpoint, epid %d", epid);
+- break;
+- case PIPE_CONTROL:
+- warn("Got epid attn for control endpoint, epid %d", epid);
+- break;
+- case PIPE_INTERRUPT:
+- warn("Got epid attn for interrupt endpoint, epid %d", epid);
+- break;
+- case PIPE_ISOCHRONOUS:
+- warn("Got epid attn for isochronous endpoint, epid %d", epid);
+- break;
+- }
+-
+- if (usb_pipetype(urb->pipe) != PIPE_ISOCHRONOUS) {
+- if (r_usb_ept_data & IO_MASK(R_USB_EPT_DATA, hold)) {
+- warn("Hold was set for epid %d.", epid);
+- continue;
+- }
+- }
+-
+- /* Even though error_code occupies bits 22 - 23 in both R_USB_EPT_DATA and
+- R_USB_EPT_DATA_ISOC, we separate them here so we don't forget in other places. */
+- if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
+- error_code = IO_EXTRACT(R_USB_EPT_DATA_ISO, error_code, r_usb_ept_data);
+- } else {
+- error_code = IO_EXTRACT(R_USB_EPT_DATA, error_code, r_usb_ept_data);
+- }
+-
+- /* Using IO_STATE_VALUE on R_USB_EPT_DATA should be ok for isoc also. */
+- if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
+-
+- /* Isoc traffic doesn't have error_count_in/error_count_out. */
+- if ((usb_pipetype(urb->pipe) != PIPE_ISOCHRONOUS) &&
+- (IO_EXTRACT(R_USB_EPT_DATA, error_count_in, r_usb_ept_data) == 3 ||
+- IO_EXTRACT(R_USB_EPT_DATA, error_count_out, r_usb_ept_data) == 3)) {
+- /* 3rd error. */
+- warn("3rd error for epid %i", epid);
+- etrax_usb_complete_urb(urb, -EPROTO);
+-
+- } else if (reg->r_usb_status & IO_MASK(R_USB_STATUS, perror)) {
+-
+- warn("Perror for epid %d", epid);
+-
+- if (!(r_usb_ept_data & IO_MASK(R_USB_EPT_DATA, valid))) {
+- /* invalid ep_id */
+- panic("Perror because of invalid epid."
+- " Deconfigured too early?");
+- } else {
+- /* past eof1, near eof, zout transfer, setup transfer */
+-
+- /* Dump the urb and the relevant EP descriptor list. */
+-
+- __dump_urb(urb);
+- __dump_ept_data(epid);
+- __dump_ep_list(usb_pipetype(urb->pipe));
+-
+- panic("Something wrong with DMA descriptor contents."
+- " Too much traffic inserted?");
+- }
+- } else if (reg->r_usb_status & IO_MASK(R_USB_STATUS, ourun)) {
+- /* buffer ourun */
+- panic("Buffer overrun/underrun for epid %d. DMA too busy?", epid);
+- }
+-
+- } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code, stall)) {
+- /* Not really a protocol error, just says that the endpoint gave
+- a stall response. Note that error_code cannot be stall for isoc. */
+- if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
+- panic("Isoc traffic cannot stall");
+- }
+-
+- warn("Stall for epid %d", epid);
+- etrax_usb_complete_urb(urb, -EPIPE);
+-
+- } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code, bus_error)) {
+- /* Two devices responded to a transaction request. Must be resolved
+- by software. FIXME: Reset ports? */
+- panic("Bus error for epid %d."
+- " Two devices responded to transaction request",
+- epid);
+-
+- } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code, buffer_error)) {
+- /* DMA overrun or underrun. */
+- warn("Buffer overrun/underrun for epid %d. DMA too busy?", epid);
+-
+- /* It seems that error_code = buffer_error in
+- R_USB_EPT_DATA/R_USB_EPT_DATA_ISO and ourun = yes in R_USB_STATUS
+- are the same error. */
+- etrax_usb_complete_urb(urb, -EPROTO);
+- }
+- }
+- }
+-
+- DBFEXIT;
+-
+-}
+-
+-void etrax_usb_bulk_start_timer_func(unsigned long dummy)
+-{
+-
+- /* We might enable an EP descriptor behind the current DMA position when it's about
+- to decide that there are no more bulk traffic and it should stop the bulk channel.
+- Therefore we periodically check if the bulk channel is stopped and there is an
+- enabled bulk EP descriptor, in which case we start the bulk channel. */
+- dbg_bulk("bulk_start_timer timed out.");
+-
+- if (!(*R_DMA_CH8_SUB0_CMD & IO_MASK(R_DMA_CH8_SUB0_CMD, cmd))) {
+- int epid;
+-
+- dbg_bulk("Bulk DMA channel not running.");
+-
+- for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
+- if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
+- dbg_bulk("Found enabled EP for epid %d, starting bulk channel.\n",
+- epid);
+- *R_DMA_CH8_SUB0_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start);
+-
+- /* Restart the bulk eot timer since we just started the bulk channel. */
+- mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
+-
+- /* No need to search any further. */
+- break;
+- }
+- }
+- } else {
+- dbg_bulk("Bulk DMA channel running.");
+- }
+-}
+-
+-void etrax_usb_hc_port_status_interrupt(usb_interrupt_registers_t *reg)
+-{
+- etrax_hc_t *hc = reg->hc;
+- __u16 r_usb_rh_port_status_1 = reg->r_usb_rh_port_status_1;
+- __u16 r_usb_rh_port_status_2 = reg->r_usb_rh_port_status_2;
+-
+- DBFENTER;
+-
+- /* The Etrax RH does not include a wPortChange register, so this has to be handled in software
+- (by saving the old port status value for comparison when the port status interrupt happens).
+- See section 11.16.2.6.2 in the USB 1.1 spec for details. */
+-
+- dbg_rh("hc->rh.prev_wPortStatus_1 = 0x%x", hc->rh.prev_wPortStatus_1);
+- dbg_rh("hc->rh.prev_wPortStatus_2 = 0x%x", hc->rh.prev_wPortStatus_2);
+- dbg_rh("r_usb_rh_port_status_1 = 0x%x", r_usb_rh_port_status_1);
+- dbg_rh("r_usb_rh_port_status_2 = 0x%x", r_usb_rh_port_status_2);
+-
+- /* C_PORT_CONNECTION is set on any transition. */
+- hc->rh.wPortChange_1 |=
+- ((r_usb_rh_port_status_1 & (1 << RH_PORT_CONNECTION)) !=
+- (hc->rh.prev_wPortStatus_1 & (1 << RH_PORT_CONNECTION))) ?
+- (1 << RH_PORT_CONNECTION) : 0;
+-
+- hc->rh.wPortChange_2 |=
+- ((r_usb_rh_port_status_2 & (1 << RH_PORT_CONNECTION)) !=
+- (hc->rh.prev_wPortStatus_2 & (1 << RH_PORT_CONNECTION))) ?
+- (1 << RH_PORT_CONNECTION) : 0;
+-
+- /* C_PORT_ENABLE is _only_ set on a one to zero transition, i.e. when
+- the port is disabled, not when it's enabled. */
+- hc->rh.wPortChange_1 |=
+- ((hc->rh.prev_wPortStatus_1 & (1 << RH_PORT_ENABLE))
+- && !(r_usb_rh_port_status_1 & (1 << RH_PORT_ENABLE))) ?
+- (1 << RH_PORT_ENABLE) : 0;
+-
+- hc->rh.wPortChange_2 |=
+- ((hc->rh.prev_wPortStatus_2 & (1 << RH_PORT_ENABLE))
+- && !(r_usb_rh_port_status_2 & (1 << RH_PORT_ENABLE))) ?
+- (1 << RH_PORT_ENABLE) : 0;
+-
+- /* C_PORT_SUSPEND is set to one when the device has transitioned out
+- of the suspended state, i.e. when suspend goes from one to zero. */
+- hc->rh.wPortChange_1 |=
+- ((hc->rh.prev_wPortStatus_1 & (1 << RH_PORT_SUSPEND))
+- && !(r_usb_rh_port_status_1 & (1 << RH_PORT_SUSPEND))) ?
+- (1 << RH_PORT_SUSPEND) : 0;
+-
+- hc->rh.wPortChange_2 |=
+- ((hc->rh.prev_wPortStatus_2 & (1 << RH_PORT_SUSPEND))
+- && !(r_usb_rh_port_status_2 & (1 << RH_PORT_SUSPEND))) ?
+- (1 << RH_PORT_SUSPEND) : 0;
+-
+-
+- /* C_PORT_RESET is set when reset processing on this port is complete. */
+- hc->rh.wPortChange_1 |=
+- ((hc->rh.prev_wPortStatus_1 & (1 << RH_PORT_RESET))
+- && !(r_usb_rh_port_status_1 & (1 << RH_PORT_RESET))) ?
+- (1 << RH_PORT_RESET) : 0;
+-
+- hc->rh.wPortChange_2 |=
+- ((hc->rh.prev_wPortStatus_2 & (1 << RH_PORT_RESET))
+- && !(r_usb_rh_port_status_2 & (1 << RH_PORT_RESET))) ?
+- (1 << RH_PORT_RESET) : 0;
+-
+- /* Save the new values for next port status change. */
+- hc->rh.prev_wPortStatus_1 = r_usb_rh_port_status_1;
+- hc->rh.prev_wPortStatus_2 = r_usb_rh_port_status_2;
+-
+- dbg_rh("hc->rh.wPortChange_1 set to 0x%x", hc->rh.wPortChange_1);
+- dbg_rh("hc->rh.wPortChange_2 set to 0x%x", hc->rh.wPortChange_2);
+-
+- DBFEXIT;
+-
+-}
+-
+-void etrax_usb_hc_ctl_status_interrupt(usb_interrupt_registers_t *reg)
+-{
+- DBFENTER;
+-
+- /* FIXME: What should we do if we get ourun or perror? Dump the EP and SB
+- list for the corresponding epid? */
+- if (reg->r_usb_status & IO_MASK(R_USB_STATUS, ourun)) {
+- panic("USB controller got ourun.");
+- }
+- if (reg->r_usb_status & IO_MASK(R_USB_STATUS, perror)) {
+-
+- /* Before, etrax_usb_do_intr_recover was called on this epid if it was
+- an interrupt pipe. I don't see how re-enabling all EP descriptors
+- will help if there was a programming error. */
+- panic("USB controller got perror.");
+- }
+-
+- if (reg->r_usb_status & IO_MASK(R_USB_STATUS, device_mode)) {
+- /* We should never operate in device mode. */
+- panic("USB controller in device mode.");
+- }
+-
+- /* These if-statements could probably be nested. */
+- if (reg->r_usb_status & IO_MASK(R_USB_STATUS, host_mode)) {
+- info("USB controller in host mode.");
+- }
+- if (reg->r_usb_status & IO_MASK(R_USB_STATUS, started)) {
+- info("USB controller started.");
+- }
+- if (reg->r_usb_status & IO_MASK(R_USB_STATUS, running)) {
+- info("USB controller running.");
+- }
+-
+- DBFEXIT;
+-
+-}
+-
+-
+-static int etrax_rh_submit_urb(struct urb *urb)
+-{
+- struct usb_device *usb_dev = urb->dev;
+- etrax_hc_t *hc = usb_dev->bus->hcpriv;
+- unsigned int pipe = urb->pipe;
+- struct usb_ctrlrequest *cmd = (struct usb_ctrlrequest *) urb->setup_packet;
+- void *data = urb->transfer_buffer;
+- int leni = urb->transfer_buffer_length;
+- int len = 0;
+- int stat = 0;
+-
+- __u16 bmRType_bReq;
+- __u16 wValue;
+- __u16 wIndex;
+- __u16 wLength;
+-
+- DBFENTER;
+-
+- /* FIXME: What is this interrupt urb that is sent to the root hub? */
+- if (usb_pipetype (pipe) == PIPE_INTERRUPT) {
+- dbg_rh("Root-Hub submit IRQ: every %d ms", urb->interval);
+- hc->rh.urb = urb;
+- hc->rh.send = 1;
+- /* FIXME: We could probably remove this line since it's done
+- in etrax_rh_init_int_timer. (Don't remove it from
+- etrax_rh_init_int_timer though.) */
+- hc->rh.interval = urb->interval;
+- etrax_rh_init_int_timer(urb);
+- DBFEXIT;
+-
+- return 0;
+- }
+-
+- bmRType_bReq = cmd->bRequestType | (cmd->bRequest << 8);
+- wValue = le16_to_cpu(cmd->wValue);
+- wIndex = le16_to_cpu(cmd->wIndex);
+- wLength = le16_to_cpu(cmd->wLength);
+-
+- dbg_rh("bmRType_bReq : 0x%04x (%d)", bmRType_bReq, bmRType_bReq);
+- dbg_rh("wValue : 0x%04x (%d)", wValue, wValue);
+- dbg_rh("wIndex : 0x%04x (%d)", wIndex, wIndex);
+- dbg_rh("wLength : 0x%04x (%d)", wLength, wLength);
+-
+- switch (bmRType_bReq) {
+-
+- /* Request Destination:
+- without flags: Device,
+- RH_INTERFACE: interface,
+- RH_ENDPOINT: endpoint,
+- RH_CLASS means HUB here,
+- RH_OTHER | RH_CLASS almost ever means HUB_PORT here
+- */
+-
+- case RH_GET_STATUS:
+- *(__u16 *) data = cpu_to_le16 (1);
+- OK (2);
+-
+- case RH_GET_STATUS | RH_INTERFACE:
+- *(__u16 *) data = cpu_to_le16 (0);
+- OK (2);
+-
+- case RH_GET_STATUS | RH_ENDPOINT:
+- *(__u16 *) data = cpu_to_le16 (0);
+- OK (2);
+-
+- case RH_GET_STATUS | RH_CLASS:
+- *(__u32 *) data = cpu_to_le32 (0);
+- OK (4); /* hub power ** */
+-
+- case RH_GET_STATUS | RH_OTHER | RH_CLASS:
+- if (wIndex == 1) {
+- *((__u16*)data) = cpu_to_le16(hc->rh.prev_wPortStatus_1);
+- *((__u16*)data + 1) = cpu_to_le16(hc->rh.wPortChange_1);
+- } else if (wIndex == 2) {
+- *((__u16*)data) = cpu_to_le16(hc->rh.prev_wPortStatus_2);
+- *((__u16*)data + 1) = cpu_to_le16(hc->rh.wPortChange_2);
+- } else {
+- dbg_rh("RH_GET_STATUS whith invalid wIndex!");
+- OK(0);
+- }
+-
+- OK(4);
+-
+- case RH_CLEAR_FEATURE | RH_ENDPOINT:
+- switch (wValue) {
+- case (RH_ENDPOINT_STALL):
+- OK (0);
+- }
+- break;
+-
+- case RH_CLEAR_FEATURE | RH_CLASS:
+- switch (wValue) {
+- case (RH_C_HUB_OVER_CURRENT):
+- OK (0); /* hub power over current ** */
+- }
+- break;
+-
+- case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
+- switch (wValue) {
+- case (RH_PORT_ENABLE):
+- if (wIndex == 1) {
+-
+- dbg_rh("trying to do disable port 1");
+-
+- *R_USB_PORT1_DISABLE = IO_STATE(R_USB_PORT1_DISABLE, disable, yes);
+-
+- while (hc->rh.prev_wPortStatus_1 &
+- IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, yes));
+- *R_USB_PORT1_DISABLE = IO_STATE(R_USB_PORT1_DISABLE, disable, no);
+- dbg_rh("Port 1 is disabled");
+-
+- } else if (wIndex == 2) {
+-
+- dbg_rh("trying to do disable port 2");
+-
+- *R_USB_PORT2_DISABLE = IO_STATE(R_USB_PORT2_DISABLE, disable, yes);
+-
+- while (hc->rh.prev_wPortStatus_2 &
+- IO_STATE(R_USB_RH_PORT_STATUS_2, enabled, yes));
+- *R_USB_PORT2_DISABLE = IO_STATE(R_USB_PORT2_DISABLE, disable, no);
+- dbg_rh("Port 2 is disabled");
+-
+- } else {
+- dbg_rh("RH_CLEAR_FEATURE->RH_PORT_ENABLE "
+- "with invalid wIndex == %d!", wIndex);
+- }
+-
+- OK (0);
+- case (RH_PORT_SUSPEND):
+- /* Opposite to suspend should be resume, so we'll do a resume. */
+- /* FIXME: USB 1.1, 11.16.2.2 says:
+- "Clearing the PORT_SUSPEND feature causes a host-initiated resume
+- on the specified port. If the port is not in the Suspended state,
+- the hub should treat this request as a functional no-operation."
+- Shouldn't we check if the port is in a suspended state before
+- resuming? */
+-
+- /* Make sure the controller isn't busy. */
+- while (*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy));
+-
+- if (wIndex == 1) {
+- *R_USB_COMMAND =
+- IO_STATE(R_USB_COMMAND, port_sel, port1) |
+- IO_STATE(R_USB_COMMAND, port_cmd, resume) |
+- IO_STATE(R_USB_COMMAND, ctrl_cmd, nop);
+- } else if (wIndex == 2) {
+- *R_USB_COMMAND =
+- IO_STATE(R_USB_COMMAND, port_sel, port2) |
+- IO_STATE(R_USB_COMMAND, port_cmd, resume) |
+- IO_STATE(R_USB_COMMAND, ctrl_cmd, nop);
+- } else {
+- dbg_rh("RH_CLEAR_FEATURE->RH_PORT_SUSPEND "
+- "with invalid wIndex == %d!", wIndex);
+- }
+-
+- OK (0);
+- case (RH_PORT_POWER):
+- OK (0); /* port power ** */
+- case (RH_C_PORT_CONNECTION):
+- if (wIndex == 1) {
+- hc->rh.wPortChange_1 &= ~(1 << RH_PORT_CONNECTION);
+- } else if (wIndex == 2) {
+- hc->rh.wPortChange_2 &= ~(1 << RH_PORT_CONNECTION);
+- } else {
+- dbg_rh("RH_CLEAR_FEATURE->RH_C_PORT_CONNECTION "
+- "with invalid wIndex == %d!", wIndex);
+- }
+-
+- OK (0);
+- case (RH_C_PORT_ENABLE):
+- if (wIndex == 1) {
+- hc->rh.wPortChange_1 &= ~(1 << RH_PORT_ENABLE);
+- } else if (wIndex == 2) {
+- hc->rh.wPortChange_2 &= ~(1 << RH_PORT_ENABLE);
+- } else {
+- dbg_rh("RH_CLEAR_FEATURE->RH_C_PORT_ENABLE "
+- "with invalid wIndex == %d!", wIndex);
+- }
+- OK (0);
+- case (RH_C_PORT_SUSPEND):
+-/*** WR_RH_PORTSTAT(RH_PS_PSSC); */
+- OK (0);
+- case (RH_C_PORT_OVER_CURRENT):
+- OK (0); /* port power over current ** */
+- case (RH_C_PORT_RESET):
+- if (wIndex == 1) {
+- hc->rh.wPortChange_1 &= ~(1 << RH_PORT_RESET);
+- } else if (wIndex == 2) {
+- hc->rh.wPortChange_2 &= ~(1 << RH_PORT_RESET);
+- } else {
+- dbg_rh("RH_CLEAR_FEATURE->RH_C_PORT_RESET "
+- "with invalid index == %d!", wIndex);
+- }
+-
+- OK (0);
+-
+- }
+- break;
+-
+- case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
+- switch (wValue) {
+- case (RH_PORT_SUSPEND):
+-
+- /* Make sure the controller isn't busy. */
+- while (*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy));
+-
+- if (wIndex == 1) {
+- *R_USB_COMMAND =
+- IO_STATE(R_USB_COMMAND, port_sel, port1) |
+- IO_STATE(R_USB_COMMAND, port_cmd, suspend) |
+- IO_STATE(R_USB_COMMAND, ctrl_cmd, nop);
+- } else if (wIndex == 2) {
+- *R_USB_COMMAND =
+- IO_STATE(R_USB_COMMAND, port_sel, port2) |
+- IO_STATE(R_USB_COMMAND, port_cmd, suspend) |
+- IO_STATE(R_USB_COMMAND, ctrl_cmd, nop);
+- } else {
+- dbg_rh("RH_SET_FEATURE->RH_PORT_SUSPEND "
+- "with invalid wIndex == %d!", wIndex);
+- }
+-
+- OK (0);
+- case (RH_PORT_RESET):
+- if (wIndex == 1) {
+-
+- port_1_reset:
+- dbg_rh("Doing reset of port 1");
+-
+- /* Make sure the controller isn't busy. */
+- while (*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy));
+-
+- *R_USB_COMMAND =
+- IO_STATE(R_USB_COMMAND, port_sel, port1) |
+- IO_STATE(R_USB_COMMAND, port_cmd, reset) |
+- IO_STATE(R_USB_COMMAND, ctrl_cmd, nop);
+-
+- /* We must wait at least 10 ms for the device to recover.
+- 15 ms should be enough. */
+- udelay(15000);
+-
+- /* Wait for reset bit to go low (should be done by now). */
+- while (hc->rh.prev_wPortStatus_1 &
+- IO_STATE(R_USB_RH_PORT_STATUS_1, reset, yes));
+-
+- /* If the port status is
+- 1) connected and enabled then there is a device and everything is fine
+- 2) neither connected nor enabled then there is no device, also fine
+- 3) connected and not enabled then we try again
+- (Yes, there are other port status combinations besides these.) */
+-
+- if ((hc->rh.prev_wPortStatus_1 &
+- IO_STATE(R_USB_RH_PORT_STATUS_1, connected, yes)) &&
+- (hc->rh.prev_wPortStatus_1 &
+- IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, no))) {
+- dbg_rh("Connected device on port 1, but port not enabled?"
+- " Trying reset again.");
+- goto port_2_reset;
+- }
+-
+- /* Diagnostic printouts. */
+- if ((hc->rh.prev_wPortStatus_1 &
+- IO_STATE(R_USB_RH_PORT_STATUS_1, connected, no)) &&
+- (hc->rh.prev_wPortStatus_1 &
+- IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, no))) {
+- dbg_rh("No connected device on port 1");
+- } else if ((hc->rh.prev_wPortStatus_1 &
+- IO_STATE(R_USB_RH_PORT_STATUS_1, connected, yes)) &&
+- (hc->rh.prev_wPortStatus_1 &
+- IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, yes))) {
+- dbg_rh("Connected device on port 1, port 1 enabled");
+- }
+-
+- } else if (wIndex == 2) {
+-
+- port_2_reset:
+- dbg_rh("Doing reset of port 2");
+-
+- /* Make sure the controller isn't busy. */
+- while (*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy));
+-
+- /* Issue the reset command. */
+- *R_USB_COMMAND =
+- IO_STATE(R_USB_COMMAND, port_sel, port2) |
+- IO_STATE(R_USB_COMMAND, port_cmd, reset) |
+- IO_STATE(R_USB_COMMAND, ctrl_cmd, nop);
+-
+- /* We must wait at least 10 ms for the device to recover.
+- 15 ms should be enough. */
+- udelay(15000);
+-
+- /* Wait for reset bit to go low (should be done by now). */
+- while (hc->rh.prev_wPortStatus_2 &
+- IO_STATE(R_USB_RH_PORT_STATUS_2, reset, yes));
+-
+- /* If the port status is
+- 1) connected and enabled then there is a device and everything is fine
+- 2) neither connected nor enabled then there is no device, also fine
+- 3) connected and not enabled then we try again
+- (Yes, there are other port status combinations besides these.) */
+-
+- if ((hc->rh.prev_wPortStatus_2 &
+- IO_STATE(R_USB_RH_PORT_STATUS_2, connected, yes)) &&
+- (hc->rh.prev_wPortStatus_2 &
+- IO_STATE(R_USB_RH_PORT_STATUS_2, enabled, no))) {
+- dbg_rh("Connected device on port 2, but port not enabled?"
+- " Trying reset again.");
+- goto port_2_reset;
+- }
+-
+- /* Diagnostic printouts. */
+- if ((hc->rh.prev_wPortStatus_2 &
+- IO_STATE(R_USB_RH_PORT_STATUS_2, connected, no)) &&
+- (hc->rh.prev_wPortStatus_2 &
+- IO_STATE(R_USB_RH_PORT_STATUS_2, enabled, no))) {
+- dbg_rh("No connected device on port 2");
+- } else if ((hc->rh.prev_wPortStatus_2 &
+- IO_STATE(R_USB_RH_PORT_STATUS_2, connected, yes)) &&
+- (hc->rh.prev_wPortStatus_2 &
+- IO_STATE(R_USB_RH_PORT_STATUS_2, enabled, yes))) {
+- dbg_rh("Connected device on port 2, port 2 enabled");
+- }
+-
+- } else {
+- dbg_rh("RH_SET_FEATURE->RH_PORT_RESET with invalid wIndex = %d", wIndex);
+- }
+-
+- /* Make sure the controller isn't busy. */
+- while (*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy));
+-
+- /* If all enabled ports were disabled the host controller goes down into
+- started mode, so we need to bring it back into the running state.
+- (This is safe even if it's already in the running state.) */
+- *R_USB_COMMAND =
+- IO_STATE(R_USB_COMMAND, port_sel, nop) |
+- IO_STATE(R_USB_COMMAND, port_cmd, reset) |
+- IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
+-
+- dbg_rh("...Done");
+- OK(0);
+-
+- case (RH_PORT_POWER):
+- OK (0); /* port power ** */
+- case (RH_PORT_ENABLE):
+- /* There is no port enable command in the host controller, so if the
+- port is already enabled, we do nothing. If not, we reset the port
+- (with an ugly goto). */
+-
+- if (wIndex == 1) {
+- if (hc->rh.prev_wPortStatus_1 &
+- IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, no)) {
+- goto port_1_reset;
+- }
+- } else if (wIndex == 2) {
+- if (hc->rh.prev_wPortStatus_2 &
+- IO_STATE(R_USB_RH_PORT_STATUS_2, enabled, no)) {
+- goto port_2_reset;
+- }
+- } else {
+- dbg_rh("RH_SET_FEATURE->RH_GET_STATUS with invalid wIndex = %d", wIndex);
+- }
+- OK (0);
+- }
+- break;
+-
+- case RH_SET_ADDRESS:
+- hc->rh.devnum = wValue;
+- dbg_rh("RH address set to: %d", hc->rh.devnum);
+- OK (0);
+-
+- case RH_GET_DESCRIPTOR:
+- switch ((wValue & 0xff00) >> 8) {
+- case (0x01): /* device descriptor */
+- len = min_t(unsigned int, leni, min_t(unsigned int, sizeof (root_hub_dev_des), wLength));
+- memcpy (data, root_hub_dev_des, len);
+- OK (len);
+- case (0x02): /* configuration descriptor */
+- len = min_t(unsigned int, leni, min_t(unsigned int, sizeof (root_hub_config_des), wLength));
+- memcpy (data, root_hub_config_des, len);
+- OK (len);
+- case (0x03): /* string descriptors */
+- len = usb_root_hub_string (wValue & 0xff,
+- 0xff, "ETRAX 100LX",
+- data, wLength);
+- if (len > 0) {
+- OK(min(leni, len));
+- } else {
+- stat = -EPIPE;
+- }
+-
+- }
+- break;
+-
+- case RH_GET_DESCRIPTOR | RH_CLASS:
+- root_hub_hub_des[2] = hc->rh.numports;
+- len = min_t(unsigned int, leni, min_t(unsigned int, sizeof (root_hub_hub_des), wLength));
+- memcpy (data, root_hub_hub_des, len);
+- OK (len);
+-
+- case RH_GET_CONFIGURATION:
+- *(__u8 *) data = 0x01;
+- OK (1);
+-
+- case RH_SET_CONFIGURATION:
+- OK (0);
+-
+- default:
+- stat = -EPIPE;
+- }
+-
+- urb->actual_length = len;
+- urb->status = stat;
+- urb->dev = NULL;
+- if (urb->complete) {
+- urb->complete(urb, NULL);
+- }
+- DBFEXIT;
+-
+- return 0;
+-}
+-
+-static void
+-etrax_usb_bulk_eot_timer_func(unsigned long dummy)
+-{
+- /* Because of a race condition in the top half, we might miss a bulk eot.
+- This timer "simulates" a bulk eot if we don't get one for a while, hopefully
+- correcting the situation. */
+- dbg_bulk("bulk_eot_timer timed out.");
+- etrax_usb_hc_bulk_eot_interrupt(1);
+-}
+-
+-static void*
+-etrax_usb_buffer_alloc(struct usb_bus* bus, size_t size,
+- unsigned mem_flags, dma_addr_t *dma)
+-{
+- return kmalloc(size, mem_flags);
+-}
+-
+-static void
+-etrax_usb_buffer_free(struct usb_bus *bus, size_t size, void *addr, dma_addr_t dma)
+-{
+- kfree(addr);
+-}
+-
+-
+-static struct device fake_device;
+-
+-static int __init etrax_usb_hc_init(void)
+-{
+- static etrax_hc_t *hc;
+- struct usb_bus *bus;
+- struct usb_device *usb_rh;
+- int i;
+-
+- DBFENTER;
+-
+- info("ETRAX 100LX USB-HCD %s (c) 2001-2003 Axis Communications AB\n", usb_hcd_version);
+-
+- hc = kmalloc(sizeof(etrax_hc_t), GFP_KERNEL);
+- assert(hc != NULL);
+-
+- /* We use kmem_cache_* to make sure that all DMA desc. are dword aligned */
+- /* Note that we specify sizeof(USB_EP_Desc_t) as the size, but also allocate
+- SB descriptors from this cache. This is ok since sizeof(USB_EP_Desc_t) ==
+- sizeof(USB_SB_Desc_t). */
+-
+- usb_desc_cache = kmem_cache_create("usb_desc_cache", sizeof(USB_EP_Desc_t), 0,
+- SLAB_HWCACHE_ALIGN, 0, 0);
+- assert(usb_desc_cache != NULL);
+-
+- top_half_reg_cache = kmem_cache_create("top_half_reg_cache",
+- sizeof(usb_interrupt_registers_t),
+- 0, SLAB_HWCACHE_ALIGN, 0, 0);
+- assert(top_half_reg_cache != NULL);
+-
+- isoc_compl_cache = kmem_cache_create("isoc_compl_cache",
+- sizeof(usb_isoc_complete_data_t),
+- 0, SLAB_HWCACHE_ALIGN, 0, 0);
+- assert(isoc_compl_cache != NULL);
+-
+- etrax_usb_bus = bus = usb_alloc_bus(&etrax_usb_device_operations);
+- hc->bus = bus;
+- bus->bus_name="ETRAX 100LX";
+- bus->hcpriv = hc;
+-
+- /* Initialize RH to the default address.
+- And make sure that we have no status change indication */
+- hc->rh.numports = 2; /* The RH has two ports */
+- hc->rh.devnum = 1;
+- hc->rh.wPortChange_1 = 0;
+- hc->rh.wPortChange_2 = 0;
+-
+- /* Also initate the previous values to zero */
+- hc->rh.prev_wPortStatus_1 = 0;
+- hc->rh.prev_wPortStatus_2 = 0;
+-
+- /* Initialize the intr-traffic flags */
+- /* FIXME: This isn't used. (Besides, the error field isn't initialized.) */
+- hc->intr.sleeping = 0;
+- hc->intr.wq = NULL;
+-
+- epid_usage_bitmask = 0;
+- epid_out_traffic = 0;
+-
+- /* Mark the invalid epid as being used. */
+- set_bit(INVALID_EPID, (void *)&epid_usage_bitmask);
+- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, INVALID_EPID);
+- nop();
+- /* The valid bit should still be set ('invalid' is in our world; not the hardware's). */
+- *R_USB_EPT_DATA = (IO_STATE(R_USB_EPT_DATA, valid, yes) |
+- IO_FIELD(R_USB_EPT_DATA, max_len, 1));
+-
+- /* Mark the dummy epid as being used. */
+- set_bit(DUMMY_EPID, (void *)&epid_usage_bitmask);
+- *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, DUMMY_EPID);
+- nop();
+- *R_USB_EPT_DATA = (IO_STATE(R_USB_EPT_DATA, valid, no) |
+- IO_FIELD(R_USB_EPT_DATA, max_len, 1));
+-
+- /* Initialize the urb list by initiating a head for each list. */
+- for (i = 0; i < NBR_OF_EPIDS; i++) {
+- INIT_LIST_HEAD(&urb_list[i]);
+- }
+- spin_lock_init(&urb_list_lock);
+-
+- INIT_LIST_HEAD(&urb_unlink_list);
+-
+-
+- /* Initiate the bulk start timer. */
+- init_timer(&bulk_start_timer);
+- bulk_start_timer.expires = jiffies + BULK_START_TIMER_INTERVAL;
+- bulk_start_timer.function = etrax_usb_bulk_start_timer_func;
+- add_timer(&bulk_start_timer);
+-
+-
+- /* Initiate the bulk eot timer. */
+- init_timer(&bulk_eot_timer);
+- bulk_eot_timer.expires = jiffies + BULK_EOT_TIMER_INTERVAL;
+- bulk_eot_timer.function = etrax_usb_bulk_eot_timer_func;
+- add_timer(&bulk_eot_timer);
+-
+- /* Set up the data structures for USB traffic. Note that this must be done before
+- any interrupt that relies on sane DMA list occurrs. */
+- init_rx_buffers();
+- init_tx_bulk_ep();
+- init_tx_ctrl_ep();
+- init_tx_intr_ep();
+- init_tx_isoc_ep();
+-
+- device_initialize(&fake_device);
+- kobject_set_name(&fake_device.kobj, "etrax_usb");
+- kobject_add(&fake_device.kobj);
+- kobject_uevent(&fake_device.kobj, KOBJ_ADD);
+- hc->bus->controller = &fake_device;
+- usb_register_bus(hc->bus);
+-
+- *R_IRQ_MASK2_SET =
+- /* Note that these interrupts are not used. */
+- IO_STATE(R_IRQ_MASK2_SET, dma8_sub0_descr, set) |
+- /* Sub channel 1 (ctrl) descr. interrupts are used. */
+- IO_STATE(R_IRQ_MASK2_SET, dma8_sub1_descr, set) |
+- IO_STATE(R_IRQ_MASK2_SET, dma8_sub2_descr, set) |
+- /* Sub channel 3 (isoc) descr. interrupts are used. */
+- IO_STATE(R_IRQ_MASK2_SET, dma8_sub3_descr, set);
+-
+- /* Note that the dma9_descr interrupt is not used. */
+- *R_IRQ_MASK2_SET =
+- IO_STATE(R_IRQ_MASK2_SET, dma9_eop, set) |
+- IO_STATE(R_IRQ_MASK2_SET, dma9_descr, set);
+-
+- /* FIXME: Enable iso_eof only when isoc traffic is running. */
+- *R_USB_IRQ_MASK_SET =
+- IO_STATE(R_USB_IRQ_MASK_SET, iso_eof, set) |
+- IO_STATE(R_USB_IRQ_MASK_SET, bulk_eot, set) |
+- IO_STATE(R_USB_IRQ_MASK_SET, epid_attn, set) |
+- IO_STATE(R_USB_IRQ_MASK_SET, port_status, set) |
+- IO_STATE(R_USB_IRQ_MASK_SET, ctl_status, set);
+-
+-
+- if (request_irq(ETRAX_USB_HC_IRQ, etrax_usb_hc_interrupt_top_half, 0,
+- "ETRAX 100LX built-in USB (HC)", hc)) {
+- err("Could not allocate IRQ %d for USB", ETRAX_USB_HC_IRQ);
+- etrax_usb_hc_cleanup();
+- DBFEXIT;
+- return -1;
+- }
+-
+- if (request_irq(ETRAX_USB_RX_IRQ, etrax_usb_rx_interrupt, 0,
+- "ETRAX 100LX built-in USB (Rx)", hc)) {
+- err("Could not allocate IRQ %d for USB", ETRAX_USB_RX_IRQ);
+- etrax_usb_hc_cleanup();
+- DBFEXIT;
+- return -1;
+- }
+-
+- if (request_irq(ETRAX_USB_TX_IRQ, etrax_usb_tx_interrupt, 0,
+- "ETRAX 100LX built-in USB (Tx)", hc)) {
+- err("Could not allocate IRQ %d for USB", ETRAX_USB_TX_IRQ);
+- etrax_usb_hc_cleanup();
+- DBFEXIT;
+- return -1;
+- }
+-
+- /* R_USB_COMMAND:
+- USB commands in host mode. The fields in this register should all be
+- written to in one write. Do not read-modify-write one field at a time. A
+- write to this register will trigger events in the USB controller and an
+- incomplete command may lead to unpredictable results, and in worst case
+- even to a deadlock in the controller.
+- (Note however that the busy field is read-only, so no need to write to it.) */
+-
+- /* Check the busy bit before writing to R_USB_COMMAND. */
+-
+- while (*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy));
+-
+- /* Reset the USB interface. */
+- *R_USB_COMMAND =
+- IO_STATE(R_USB_COMMAND, port_sel, nop) |
+- IO_STATE(R_USB_COMMAND, port_cmd, reset) |
+- IO_STATE(R_USB_COMMAND, ctrl_cmd, reset);
+-
+- /* Designer's Reference, p. 8 - 10 says we should Initate R_USB_FM_PSTART to 0x2A30 (10800),
+- to guarantee that control traffic gets 10% of the bandwidth, and periodic transfer may
+- allocate the rest (90%). This doesn't work though. Read on for a lenghty explanation.
+-
+- While there is a difference between rev. 2 and rev. 3 of the ETRAX 100LX regarding the NAK
+- behaviour, it doesn't solve this problem. What happens is that a control transfer will not
+- be interrupted in its data stage when PSTART happens (the point at which periodic traffic
+- is started). Thus, if PSTART is set to 10800 and its IN or OUT token is NAKed until just before
+- PSTART happens, it will continue the IN/OUT transfer as long as it's ACKed. After it's done,
+- there may be too little time left for an isochronous transfer, causing an epid attention
+- interrupt due to perror. The work-around for this is to let the control transfers run at the
+- end of the frame instead of at the beginning, and will be interrupted just fine if it doesn't
+- fit into the frame. However, since there will *always* be a control transfer at the beginning
+- of the frame, regardless of what we set PSTART to, that transfer might be a 64-byte transfer
+- which consumes up to 15% of the frame, leaving only 85% for periodic traffic. The solution to
+- this would be to 'dummy allocate' 5% of the frame with the usb_claim_bandwidth function to make
+- sure that the periodic transfers that are inserted will always fit in the frame.
+-
+- The idea was suggested that a control transfer could be split up into several 8 byte transfers,
+- so that it would be interrupted by PSTART, but since this can't be done for an IN transfer this
+- hasn't been implemented.
+-
+- The value 11960 is chosen to be just after the SOF token, with a couple of bit times extra
+- for possible bit stuffing. */
+-
+- *R_USB_FM_PSTART = IO_FIELD(R_USB_FM_PSTART, value, 11960);
+-
+-#ifdef CONFIG_ETRAX_USB_HOST_PORT1
+- *R_USB_PORT1_DISABLE = IO_STATE(R_USB_PORT1_DISABLE, disable, no);
+-#endif
+-
+-#ifdef CONFIG_ETRAX_USB_HOST_PORT2
+- *R_USB_PORT2_DISABLE = IO_STATE(R_USB_PORT2_DISABLE, disable, no);
+-#endif
+-
+- while (*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy));
+-
+- /* Configure the USB interface as a host controller. */
+- *R_USB_COMMAND =
+- IO_STATE(R_USB_COMMAND, port_sel, nop) |
+- IO_STATE(R_USB_COMMAND, port_cmd, reset) |
+- IO_STATE(R_USB_COMMAND, ctrl_cmd, host_config);
+-
+- /* Note: Do not reset any ports here. Await the port status interrupts, to have a controlled
+- sequence of resetting the ports. If we reset both ports now, and there are devices
+- on both ports, we will get a bus error because both devices will answer the set address
+- request. */
+-
+- while (*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy));
+-
+- /* Start processing of USB traffic. */
+- *R_USB_COMMAND =
+- IO_STATE(R_USB_COMMAND, port_sel, nop) |
+- IO_STATE(R_USB_COMMAND, port_cmd, reset) |
+- IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
+-
+- while (*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy));
+-
+- usb_rh = usb_alloc_dev(NULL, hc->bus, 0);
+- hc->bus->root_hub = usb_rh;
+- usb_rh->state = USB_STATE_ADDRESS;
+- usb_rh->speed = USB_SPEED_FULL;
+- usb_rh->devnum = 1;
+- hc->bus->devnum_next = 2;
+- usb_rh->ep0.desc.wMaxPacketSize = __const_cpu_to_le16(64);
+- usb_get_device_descriptor(usb_rh, USB_DT_DEVICE_SIZE);
+- usb_new_device(usb_rh);
+-
+- DBFEXIT;
+-
+- return 0;
+-}
+-
+-static void etrax_usb_hc_cleanup(void)
+-{
+- DBFENTER;
+-
+- free_irq(ETRAX_USB_HC_IRQ, NULL);
+- free_irq(ETRAX_USB_RX_IRQ, NULL);
+- free_irq(ETRAX_USB_TX_IRQ, NULL);
+-
+- usb_deregister_bus(etrax_usb_bus);
+-
+- /* FIXME: call kmem_cache_destroy here? */
+-
+- DBFEXIT;
+-}
+
+-module_init(etrax_usb_hc_init);
+-module_exit(etrax_usb_hc_cleanup);
++/* Module hooks */
++module_init(module_hcd_init);
++module_exit(module_hcd_exit);
+--- linux-2.6.19.2.orig/drivers/usb/host/hc-crisv10.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/drivers/usb/host/hc-crisv10.c 2007-02-26 20:58:29.000000000 +0100
+@@ -0,0 +1,4684 @@
++/*
++ *
++ * ETRAX 100LX USB Host Controller Driver
++ *
++ * Copyright (C) 2005, 2006 Axis Communications AB
++ *
++ * Author: Konrad Eriksson <konrad.eriksson@axis.se>
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/moduleparam.h>
++#include <linux/spinlock.h>
++#include <linux/usb.h>
++#include <linux/platform_device.h>
++
++#include <asm/io.h>
++#include <asm/irq.h>
++#include <asm/arch/dma.h>
++#include <asm/arch/io_interface_mux.h>
++
++#include "../core/hcd.h"
++#include "../core/hub.h"
++#include "hc-crisv10.h"
++#include "hc-cris-dbg.h"
++
++
++/***************************************************************************/
++/***************************************************************************/
++/* Host Controller settings */
++/***************************************************************************/
++/***************************************************************************/
++
++#define VERSION "1.00"
++#define COPYRIGHT "(c) 2005, 2006 Axis Communications AB"
++#define DESCRIPTION "ETRAX 100LX USB Host Controller"
++
++#define ETRAX_USB_HC_IRQ USB_HC_IRQ_NBR
++#define ETRAX_USB_RX_IRQ USB_DMA_RX_IRQ_NBR
++#define ETRAX_USB_TX_IRQ USB_DMA_TX_IRQ_NBR
++
++/* Number of physical ports in Etrax 100LX */
++#define USB_ROOT_HUB_PORTS 2
++
++const char hc_name[] = "hc-crisv10";
++const char product_desc[] = DESCRIPTION;
++
++/* The number of epids is, among other things, used for pre-allocating
++ ctrl, bulk and isoc EP descriptors (one for each epid).
++ Assumed to be > 1 when initiating the DMA lists. */
++#define NBR_OF_EPIDS 32
++
++/* Support interrupt traffic intervals up to 128 ms. */
++#define MAX_INTR_INTERVAL 128
++
++/* If periodic traffic (intr or isoc) is to be used, then one entry in the EP
++ table must be "invalid". By this we mean that we shouldn't care about epid
++ attentions for this epid, or at least handle them differently from epid
++ attentions for "valid" epids. This define determines which one to use
++ (don't change it). */
++#define INVALID_EPID 31
++/* A special epid for the bulk dummys. */
++#define DUMMY_EPID 30
++
++/* Module settings */
++
++MODULE_DESCRIPTION(DESCRIPTION);
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Konrad Eriksson <konrad.eriksson@axis.se>");
++
++
++/* Module parameters */
++
++/* 0 = No ports enabled
++ 1 = Only port 1 enabled (on board ethernet on devboard)
++ 2 = Only port 2 enabled (external connector on devboard)
++ 3 = Both ports enabled
++*/
++static unsigned int ports = 3;
++module_param(ports, uint, S_IRUGO);
++MODULE_PARM_DESC(ports, "Bitmask indicating USB ports to use");
++
++
++/***************************************************************************/
++/***************************************************************************/
++/* Shared global variables for this module */
++/***************************************************************************/
++/***************************************************************************/
++
++/* EP descriptor lists for non period transfers. Must be 32-bit aligned. */
++static volatile struct USB_EP_Desc TxBulkEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
++
++static volatile struct USB_EP_Desc TxCtrlEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
++
++/* EP descriptor lists for period transfers. Must be 32-bit aligned. */
++static volatile struct USB_EP_Desc TxIntrEPList[MAX_INTR_INTERVAL] __attribute__ ((aligned (4)));
++static volatile struct USB_SB_Desc TxIntrSB_zout __attribute__ ((aligned (4)));
++
++static volatile struct USB_EP_Desc TxIsocEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
++static volatile struct USB_SB_Desc TxIsocSB_zout __attribute__ ((aligned (4)));
++
++static volatile struct USB_SB_Desc TxIsocSBList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
++
++/* After each enabled bulk EP IN we put two disabled EP descriptors with the eol flag set,
++ causing the DMA to stop the DMA channel. The first of these two has the intr flag set, which
++ gives us a dma8_sub0_descr interrupt. When we receive this, we advance the DMA one step in the
++ EP list and then restart the bulk channel, thus forcing a switch between bulk EP descriptors
++ in each frame. */
++static volatile struct USB_EP_Desc TxBulkDummyEPList[NBR_OF_EPIDS][2] __attribute__ ((aligned (4)));
++
++/* List of URB pointers, where each points to the active URB for a epid.
++ For Bulk, Ctrl and Intr this means which URB that currently is added to
++ DMA lists (Isoc URBs are all directly added to DMA lists). As soon as
++ URB has completed is the queue examined and the first URB in queue is
++ removed and moved to the activeUrbList while its state change to STARTED and
++ its transfer(s) gets added to DMA list (exception Isoc where URBs enter
++ state STARTED directly and added transfers added to DMA lists). */
++static struct urb *activeUrbList[NBR_OF_EPIDS];
++
++/* Additional software state info for each epid */
++static struct etrax_epid epid_state[NBR_OF_EPIDS];
++
++/* Timer handles for bulk traffic timer used to avoid DMA bug where DMA stops
++ even if there is new data waiting to be processed */
++static struct timer_list bulk_start_timer = TIMER_INITIALIZER(NULL, 0, 0);
++static struct timer_list bulk_eot_timer = TIMER_INITIALIZER(NULL, 0, 0);
++
++/* We want the start timer to expire before the eot timer, because the former
++ might start traffic, thus making it unnecessary for the latter to time
++ out. */
++#define BULK_START_TIMER_INTERVAL (HZ/50) /* 20 ms */
++#define BULK_EOT_TIMER_INTERVAL (HZ/16) /* 60 ms */
++
++/* Delay before a URB completion happen when it's scheduled to be delayed */
++#define LATER_TIMER_DELAY (HZ/50) /* 20 ms */
++
++/* Simplifying macros for checking software state info of a epid */
++/* ----------------------------------------------------------------------- */
++#define epid_inuse(epid) epid_state[epid].inuse
++#define epid_out_traffic(epid) epid_state[epid].out_traffic
++#define epid_isoc(epid) (epid_state[epid].type == PIPE_ISOCHRONOUS ? 1 : 0)
++#define epid_intr(epid) (epid_state[epid].type == PIPE_INTERRUPT ? 1 : 0)
++
++
++/***************************************************************************/
++/***************************************************************************/
++/* DEBUG FUNCTIONS */
++/***************************************************************************/
++/***************************************************************************/
++/* Note that these functions are always available in their "__" variants,
++ for use in error situations. The "__" missing variants are controlled by
++ the USB_DEBUG_DESC/USB_DEBUG_URB macros. */
++static void __dump_urb(struct urb* purb)
++{
++ struct crisv10_urb_priv *urb_priv = purb->hcpriv;
++ int urb_num = -1;
++ if(urb_priv) {
++ urb_num = urb_priv->urb_num;
++ }
++ printk("\nURB:0x%x[%d]\n", (unsigned int)purb, urb_num);
++ printk("dev :0x%08lx\n", (unsigned long)purb->dev);
++ printk("pipe :0x%08x\n", purb->pipe);
++ printk("status :%d\n", purb->status);
++ printk("transfer_flags :0x%08x\n", purb->transfer_flags);
++ printk("transfer_buffer :0x%08lx\n", (unsigned long)purb->transfer_buffer);
++ printk("transfer_buffer_length:%d\n", purb->transfer_buffer_length);
++ printk("actual_length :%d\n", purb->actual_length);
++ printk("setup_packet :0x%08lx\n", (unsigned long)purb->setup_packet);
++ printk("start_frame :%d\n", purb->start_frame);
++ printk("number_of_packets :%d\n", purb->number_of_packets);
++ printk("interval :%d\n", purb->interval);
++ printk("error_count :%d\n", purb->error_count);
++ printk("context :0x%08lx\n", (unsigned long)purb->context);
++ printk("complete :0x%08lx\n\n", (unsigned long)purb->complete);
++}
++
++static void __dump_in_desc(volatile struct USB_IN_Desc *in)
++{
++ printk("\nUSB_IN_Desc at 0x%08lx\n", (unsigned long)in);
++ printk(" sw_len : 0x%04x (%d)\n", in->sw_len, in->sw_len);
++ printk(" command : 0x%04x\n", in->command);
++ printk(" next : 0x%08lx\n", in->next);
++ printk(" buf : 0x%08lx\n", in->buf);
++ printk(" hw_len : 0x%04x (%d)\n", in->hw_len, in->hw_len);
++ printk(" status : 0x%04x\n\n", in->status);
++}
++
++static void __dump_sb_desc(volatile struct USB_SB_Desc *sb)
++{
++ char tt = (sb->command & 0x30) >> 4;
++ char *tt_string;
++
++ switch (tt) {
++ case 0:
++ tt_string = "zout";
++ break;
++ case 1:
++ tt_string = "in";
++ break;
++ case 2:
++ tt_string = "out";
++ break;
++ case 3:
++ tt_string = "setup";
++ break;
++ default:
++ tt_string = "unknown (weird)";
++ }
++
++ printk(" USB_SB_Desc at 0x%08lx ", (unsigned long)sb);
++ printk(" command:0x%04x (", sb->command);
++ printk("rem:%d ", (sb->command & 0x3f00) >> 8);
++ printk("full:%d ", (sb->command & 0x40) >> 6);
++ printk("tt:%d(%s) ", tt, tt_string);
++ printk("intr:%d ", (sb->command & 0x8) >> 3);
++ printk("eot:%d ", (sb->command & 0x2) >> 1);
++ printk("eol:%d)", sb->command & 0x1);
++ printk(" sw_len:0x%04x(%d)", sb->sw_len, sb->sw_len);
++ printk(" next:0x%08lx", sb->next);
++ printk(" buf:0x%08lx\n", sb->buf);
++}
++
++
++static void __dump_ep_desc(volatile struct USB_EP_Desc *ep)
++{
++ printk("USB_EP_Desc at 0x%08lx ", (unsigned long)ep);
++ printk(" command:0x%04x (", ep->command);
++ printk("ep_id:%d ", (ep->command & 0x1f00) >> 8);
++ printk("enable:%d ", (ep->command & 0x10) >> 4);
++ printk("intr:%d ", (ep->command & 0x8) >> 3);
++ printk("eof:%d ", (ep->command & 0x2) >> 1);
++ printk("eol:%d)", ep->command & 0x1);
++ printk(" hw_len:0x%04x(%d)", ep->hw_len, ep->hw_len);
++ printk(" next:0x%08lx", ep->next);
++ printk(" sub:0x%08lx\n", ep->sub);
++}
++
++static inline void __dump_ep_list(int pipe_type)
++{
++ volatile struct USB_EP_Desc *ep;
++ volatile struct USB_EP_Desc *first_ep;
++ volatile struct USB_SB_Desc *sb;
++
++ switch (pipe_type)
++ {
++ case PIPE_BULK:
++ first_ep = &TxBulkEPList[0];
++ break;
++ case PIPE_CONTROL:
++ first_ep = &TxCtrlEPList[0];
++ break;
++ case PIPE_INTERRUPT:
++ first_ep = &TxIntrEPList[0];
++ break;
++ case PIPE_ISOCHRONOUS:
++ first_ep = &TxIsocEPList[0];
++ break;
++ default:
++ warn("Cannot dump unknown traffic type");
++ return;
++ }
++ ep = first_ep;
++
++ printk("\n\nDumping EP list...\n\n");
++
++ do {
++ __dump_ep_desc(ep);
++ /* Cannot phys_to_virt on 0 as it turns into 80000000, which is != 0. */
++ sb = ep->sub ? phys_to_virt(ep->sub) : 0;
++ while (sb) {
++ __dump_sb_desc(sb);
++ sb = sb->next ? phys_to_virt(sb->next) : 0;
++ }
++ ep = (volatile struct USB_EP_Desc *)(phys_to_virt(ep->next));
++
++ } while (ep != first_ep);
++}
++
++static inline void __dump_ept_data(int epid)
++{
++ unsigned long flags;
++ __u32 r_usb_ept_data;
++
++ if (epid < 0 || epid > 31) {
++ printk("Cannot dump ept data for invalid epid %d\n", epid);
++ return;
++ }
++
++ local_irq_save(flags);
++ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
++ nop();
++ r_usb_ept_data = *R_USB_EPT_DATA;
++ local_irq_restore(flags);
++
++ printk(" R_USB_EPT_DATA = 0x%x for epid %d :\n", r_usb_ept_data, epid);
++ if (r_usb_ept_data == 0) {
++ /* No need for more detailed printing. */
++ return;
++ }
++ printk(" valid : %d\n", (r_usb_ept_data & 0x80000000) >> 31);
++ printk(" hold : %d\n", (r_usb_ept_data & 0x40000000) >> 30);
++ printk(" error_count_in : %d\n", (r_usb_ept_data & 0x30000000) >> 28);
++ printk(" t_in : %d\n", (r_usb_ept_data & 0x08000000) >> 27);
++ printk(" low_speed : %d\n", (r_usb_ept_data & 0x04000000) >> 26);
++ printk(" port : %d\n", (r_usb_ept_data & 0x03000000) >> 24);
++ printk(" error_code : %d\n", (r_usb_ept_data & 0x00c00000) >> 22);
++ printk(" t_out : %d\n", (r_usb_ept_data & 0x00200000) >> 21);
++ printk(" error_count_out : %d\n", (r_usb_ept_data & 0x00180000) >> 19);
++ printk(" max_len : %d\n", (r_usb_ept_data & 0x0003f800) >> 11);
++ printk(" ep : %d\n", (r_usb_ept_data & 0x00000780) >> 7);
++ printk(" dev : %d\n", (r_usb_ept_data & 0x0000003f));
++}
++
++static inline void __dump_ept_data_iso(int epid)
++{
++ unsigned long flags;
++ __u32 ept_data;
++
++ if (epid < 0 || epid > 31) {
++ printk("Cannot dump ept data for invalid epid %d\n", epid);
++ return;
++ }
++
++ local_irq_save(flags);
++ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
++ nop();
++ ept_data = *R_USB_EPT_DATA_ISO;
++ local_irq_restore(flags);
++
++ printk(" R_USB_EPT_DATA = 0x%x for epid %d :\n", ept_data, epid);
++ if (ept_data == 0) {
++ /* No need for more detailed printing. */
++ return;
++ }
++ printk(" valid : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, valid,
++ ept_data));
++ printk(" port : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, port,
++ ept_data));
++ printk(" error_code : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, error_code,
++ ept_data));
++ printk(" max_len : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, max_len,
++ ept_data));
++ printk(" ep : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, ep,
++ ept_data));
++ printk(" dev : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, dev,
++ ept_data));
++}
++
++static inline void __dump_ept_data_list(void)
++{
++ int i;
++
++ printk("Dumping the whole R_USB_EPT_DATA list\n");
++
++ for (i = 0; i < 32; i++) {
++ __dump_ept_data(i);
++ }
++}
++
++static void debug_epid(int epid) {
++ int i;
++
++ if(epid_isoc(epid)) {
++ __dump_ept_data_iso(epid);
++ } else {
++ __dump_ept_data(epid);
++ }
++
++ printk("Bulk:\n");
++ for(i = 0; i < 32; i++) {
++ if(IO_EXTRACT(USB_EP_command, epid, TxBulkEPList[i].command) ==
++ epid) {
++ printk("%d: ", i); __dump_ep_desc(&(TxBulkEPList[i]));
++ }
++ }
++
++ printk("Ctrl:\n");
++ for(i = 0; i < 32; i++) {
++ if(IO_EXTRACT(USB_EP_command, epid, TxCtrlEPList[i].command) ==
++ epid) {
++ printk("%d: ", i); __dump_ep_desc(&(TxCtrlEPList[i]));
++ }
++ }
++
++ printk("Intr:\n");
++ for(i = 0; i < MAX_INTR_INTERVAL; i++) {
++ if(IO_EXTRACT(USB_EP_command, epid, TxIntrEPList[i].command) ==
++ epid) {
++ printk("%d: ", i); __dump_ep_desc(&(TxIntrEPList[i]));
++ }
++ }
++
++ printk("Isoc:\n");
++ for(i = 0; i < 32; i++) {
++ if(IO_EXTRACT(USB_EP_command, epid, TxIsocEPList[i].command) ==
++ epid) {
++ printk("%d: ", i); __dump_ep_desc(&(TxIsocEPList[i]));
++ }
++ }
++
++ __dump_ept_data_list();
++ __dump_ep_list(PIPE_INTERRUPT);
++ printk("\n\n");
++}
++
++
++
++char* hcd_status_to_str(__u8 bUsbStatus) {
++ static char hcd_status_str[128];
++ hcd_status_str[0] = '\0';
++ if(bUsbStatus & IO_STATE(R_USB_STATUS, ourun, yes)) {
++ strcat(hcd_status_str, "ourun ");
++ }
++ if(bUsbStatus & IO_STATE(R_USB_STATUS, perror, yes)) {
++ strcat(hcd_status_str, "perror ");
++ }
++ if(bUsbStatus & IO_STATE(R_USB_STATUS, device_mode, yes)) {
++ strcat(hcd_status_str, "device_mode ");
++ }
++ if(bUsbStatus & IO_STATE(R_USB_STATUS, host_mode, yes)) {
++ strcat(hcd_status_str, "host_mode ");
++ }
++ if(bUsbStatus & IO_STATE(R_USB_STATUS, started, yes)) {
++ strcat(hcd_status_str, "started ");
++ }
++ if(bUsbStatus & IO_STATE(R_USB_STATUS, running, yes)) {
++ strcat(hcd_status_str, "running ");
++ }
++ return hcd_status_str;
++}
++
++
++char* sblist_to_str(struct USB_SB_Desc* sb_desc) {
++ static char sblist_to_str_buff[128];
++ char tmp[32], tmp2[32];
++ sblist_to_str_buff[0] = '\0';
++ while(sb_desc != NULL) {
++ switch(IO_EXTRACT(USB_SB_command, tt, sb_desc->command)) {
++ case 0: sprintf(tmp, "zout"); break;
++ case 1: sprintf(tmp, "in"); break;
++ case 2: sprintf(tmp, "out"); break;
++ case 3: sprintf(tmp, "setup"); break;
++ }
++ sprintf(tmp2, "(%s %d)", tmp, sb_desc->sw_len);
++ strcat(sblist_to_str_buff, tmp2);
++ if(sb_desc->next != 0) {
++ sb_desc = phys_to_virt(sb_desc->next);
++ } else {
++ sb_desc = NULL;
++ }
++ }
++ return sblist_to_str_buff;
++}
++
++char* port_status_to_str(__u16 wPortStatus) {
++ static char port_status_str[128];
++ port_status_str[0] = '\0';
++ if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, connected, yes)) {
++ strcat(port_status_str, "connected ");
++ }
++ if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, yes)) {
++ strcat(port_status_str, "enabled ");
++ }
++ if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, suspended, yes)) {
++ strcat(port_status_str, "suspended ");
++ }
++ if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, reset, yes)) {
++ strcat(port_status_str, "reset ");
++ }
++ if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, speed, full)) {
++ strcat(port_status_str, "full-speed ");
++ } else {
++ strcat(port_status_str, "low-speed ");
++ }
++ return port_status_str;
++}
++
++
++char* endpoint_to_str(struct usb_endpoint_descriptor *ed) {
++ static char endpoint_to_str_buff[128];
++ char tmp[32];
++ int epnum = ed->bEndpointAddress & 0x0F;
++ int dir = ed->bEndpointAddress & 0x80;
++ int type = ed->bmAttributes & 0x03;
++ endpoint_to_str_buff[0] = '\0';
++ sprintf(endpoint_to_str_buff, "ep:%d ", epnum);
++ switch(type) {
++ case 0:
++ sprintf(tmp, " ctrl");
++ break;
++ case 1:
++ sprintf(tmp, " isoc");
++ break;
++ case 2:
++ sprintf(tmp, " bulk");
++ break;
++ case 3:
++ sprintf(tmp, " intr");
++ break;
++ }
++ strcat(endpoint_to_str_buff, tmp);
++ if(dir) {
++ sprintf(tmp, " in");
++ } else {
++ sprintf(tmp, " out");
++ }
++ strcat(endpoint_to_str_buff, tmp);
++
++ return endpoint_to_str_buff;
++}
++
++/* Debug helper functions for Transfer Controller */
++char* pipe_to_str(unsigned int pipe) {
++ static char pipe_to_str_buff[128];
++ char tmp[64];
++ sprintf(pipe_to_str_buff, "dir:%s", str_dir(pipe));
++ sprintf(tmp, " type:%s", str_type(pipe));
++ strcat(pipe_to_str_buff, tmp);
++
++ sprintf(tmp, " dev:%d", usb_pipedevice(pipe));
++ strcat(pipe_to_str_buff, tmp);
++ sprintf(tmp, " ep:%d", usb_pipeendpoint(pipe));
++ strcat(pipe_to_str_buff, tmp);
++ return pipe_to_str_buff;
++}
++
++
++#define USB_DEBUG_DESC 1
++
++#ifdef USB_DEBUG_DESC
++#define dump_in_desc(x) __dump_in_desc(x)
++#define dump_sb_desc(...) __dump_sb_desc(...)
++#define dump_ep_desc(x) __dump_ep_desc(x)
++#define dump_ept_data(x) __dump_ept_data(x)
++#else
++#define dump_in_desc(...) do {} while (0)
++#define dump_sb_desc(...) do {} while (0)
++#define dump_ep_desc(...) do {} while (0)
++#endif
++
++
++/* Uncomment this to enable massive function call trace
++ #define USB_DEBUG_TRACE */
++
++#ifdef USB_DEBUG_TRACE
++#define DBFENTER (printk(": Entering: %s\n", __FUNCTION__))
++#define DBFEXIT (printk(": Exiting: %s\n", __FUNCTION__))
++#else
++#define DBFENTER do {} while (0)
++#define DBFEXIT do {} while (0)
++#endif
++
++#define CHECK_ALIGN(x) if (((__u32)(x)) & 0x00000003) \
++{panic("Alignment check (DWORD) failed at %s:%s:%d\n", __FILE__, __FUNCTION__, __LINE__);}
++
++/* Most helpful debugging aid */
++#define ASSERT(expr) ((void) ((expr) ? 0 : (err("assert failed at: %s %d",__FUNCTION__, __LINE__))))
++
++
++/***************************************************************************/
++/***************************************************************************/
++/* Forward declarations */
++/***************************************************************************/
++/***************************************************************************/
++void crisv10_hcd_epid_attn_irq(struct crisv10_irq_reg *reg);
++void crisv10_hcd_port_status_irq(struct crisv10_irq_reg *reg);
++void crisv10_hcd_ctl_status_irq(struct crisv10_irq_reg *reg);
++void crisv10_hcd_isoc_eof_irq(struct crisv10_irq_reg *reg);
++
++void rh_port_status_change(__u16[]);
++int rh_clear_port_feature(__u8, __u16);
++int rh_set_port_feature(__u8, __u16);
++static void rh_disable_port(unsigned int port);
++
++static void check_finished_bulk_tx_epids(struct usb_hcd *hcd,
++ int timer);
++
++static int tc_setup_epid(struct usb_host_endpoint *ep, struct urb *urb,
++ int mem_flags);
++static void tc_free_epid(struct usb_host_endpoint *ep);
++static int tc_allocate_epid(void);
++static void tc_finish_urb(struct usb_hcd *hcd, struct urb *urb, int status);
++static void tc_finish_urb_later(struct usb_hcd *hcd, struct urb *urb,
++ int status);
++
++static int urb_priv_create(struct usb_hcd *hcd, struct urb *urb, int epid,
++ int mem_flags);
++static void urb_priv_free(struct usb_hcd *hcd, struct urb *urb);
++
++static inline struct urb *urb_list_first(int epid);
++static inline void urb_list_add(struct urb *urb, int epid,
++ int mem_flags);
++static inline urb_entry_t *urb_list_entry(struct urb *urb, int epid);
++static inline void urb_list_del(struct urb *urb, int epid);
++static inline void urb_list_move_last(struct urb *urb, int epid);
++static inline struct urb *urb_list_next(struct urb *urb, int epid);
++
++int create_sb_for_urb(struct urb *urb, int mem_flags);
++int init_intr_urb(struct urb *urb, int mem_flags);
++
++static inline void etrax_epid_set(__u8 index, __u32 data);
++static inline void etrax_epid_clear_error(__u8 index);
++static inline void etrax_epid_set_toggle(__u8 index, __u8 dirout,
++ __u8 toggle);
++static inline __u8 etrax_epid_get_toggle(__u8 index, __u8 dirout);
++static inline __u32 etrax_epid_get(__u8 index);
++
++/* We're accessing the same register position in Etrax so
++ when we do full access the internal difference doesn't matter */
++#define etrax_epid_iso_set(index, data) etrax_epid_set(index, data)
++#define etrax_epid_iso_get(index) etrax_epid_get(index)
++
++
++static void tc_dma_process_isoc_urb(struct urb *urb);
++static void tc_dma_process_queue(int epid);
++static void tc_dma_unlink_intr_urb(struct urb *urb);
++static irqreturn_t tc_dma_tx_interrupt(int irq, void *vhc);
++static irqreturn_t tc_dma_rx_interrupt(int irq, void *vhc);
++
++static void tc_bulk_start_timer_func(unsigned long dummy);
++static void tc_bulk_eot_timer_func(unsigned long dummy);
++
++
++/*************************************************************/
++/*************************************************************/
++/* Host Controler Driver block */
++/*************************************************************/
++/*************************************************************/
++
++/* HCD operations */
++static irqreturn_t crisv10_hcd_top_irq(int irq, void*);
++static int crisv10_hcd_reset(struct usb_hcd *);
++static int crisv10_hcd_start(struct usb_hcd *);
++static void crisv10_hcd_stop(struct usb_hcd *);
++#ifdef CONFIG_PM
++static int crisv10_hcd_suspend(struct device *, u32, u32);
++static int crisv10_hcd_resume(struct device *, u32);
++#endif /* CONFIG_PM */
++static int crisv10_hcd_get_frame(struct usb_hcd *);
++
++static int tc_urb_enqueue(struct usb_hcd *, struct usb_host_endpoint *ep, struct urb *, gfp_t mem_flags);
++static int tc_urb_dequeue(struct usb_hcd *, struct urb *);
++static void tc_endpoint_disable(struct usb_hcd *, struct usb_host_endpoint *ep);
++
++static int rh_status_data_request(struct usb_hcd *, char *);
++static int rh_control_request(struct usb_hcd *, u16, u16, u16, char*, u16);
++
++#ifdef CONFIG_PM
++static int crisv10_hcd_hub_suspend(struct usb_hcd *);
++static int crisv10_hcd_hub_resume(struct usb_hcd *);
++#endif /* CONFIG_PM */
++#ifdef CONFIG_USB_OTG
++static int crisv10_hcd_start_port_reset(struct usb_hcd *, unsigned);
++#endif /* CONFIG_USB_OTG */
++
++/* host controller driver interface */
++static const struct hc_driver crisv10_hc_driver =
++ {
++ .description = hc_name,
++ .product_desc = product_desc,
++ .hcd_priv_size = sizeof(struct crisv10_hcd),
++
++ /* Attaching IRQ handler manualy in probe() */
++ /* .irq = crisv10_hcd_irq, */
++
++ .flags = HCD_USB11,
++
++ /* called to init HCD and root hub */
++ .reset = crisv10_hcd_reset,
++ .start = crisv10_hcd_start,
++
++ /* cleanly make HCD stop writing memory and doing I/O */
++ .stop = crisv10_hcd_stop,
++
++ /* return current frame number */
++ .get_frame_number = crisv10_hcd_get_frame,
++
++
++ /* Manage i/o requests via the Transfer Controller */
++ .urb_enqueue = tc_urb_enqueue,
++ .urb_dequeue = tc_urb_dequeue,
++
++ /* hw synch, freeing endpoint resources that urb_dequeue can't */
++ .endpoint_disable = tc_endpoint_disable,
++
++
++ /* Root Hub support */
++ .hub_status_data = rh_status_data_request,
++ .hub_control = rh_control_request,
++#ifdef CONFIG_PM
++ .hub_suspend = rh_suspend_request,
++ .hub_resume = rh_resume_request,
++#endif /* CONFIG_PM */
++#ifdef CONFIG_USB_OTG
++ .start_port_reset = crisv10_hcd_start_port_reset,
++#endif /* CONFIG_USB_OTG */
++ };
++
++
++/*
++ * conversion between pointers to a hcd and the corresponding
++ * crisv10_hcd
++ */
++
++static inline struct crisv10_hcd *hcd_to_crisv10_hcd(struct usb_hcd *hcd)
++{
++ return (struct crisv10_hcd *) hcd->hcd_priv;
++}
++
++static inline struct usb_hcd *crisv10_hcd_to_hcd(struct crisv10_hcd *hcd)
++{
++ return container_of((void *) hcd, struct usb_hcd, hcd_priv);
++}
++
++/* check if specified port is in use */
++static inline int port_in_use(unsigned int port)
++{
++ return ports & (1 << port);
++}
++
++/* number of ports in use */
++static inline unsigned int num_ports(void)
++{
++ unsigned int i, num = 0;
++ for (i = 0; i < USB_ROOT_HUB_PORTS; i++)
++ if (port_in_use(i))
++ num++;
++ return num;
++}
++
++/* map hub port number to the port number used internally by the HC */
++static inline unsigned int map_port(unsigned int port)
++{
++ unsigned int i, num = 0;
++ for (i = 0; i < USB_ROOT_HUB_PORTS; i++)
++ if (port_in_use(i))
++ if (++num == port)
++ return i;
++ return -1;
++}
++
++/* size of descriptors in slab cache */
++#ifndef MAX
++#define MAX(x, y) ((x) > (y) ? (x) : (y))
++#endif
++
++
++/******************************************************************/
++/* Hardware Interrupt functions */
++/******************************************************************/
++
++/* Fast interrupt handler for HC */
++static irqreturn_t crisv10_hcd_top_irq(int irq, void *vcd)
++{
++ struct usb_hcd *hcd = vcd;
++ struct crisv10_irq_reg reg;
++ __u32 irq_mask;
++ unsigned long flags;
++
++ DBFENTER;
++
++ ASSERT(hcd != NULL);
++ reg.hcd = hcd;
++
++ /* Turn of other interrupts while handling these sensitive cases */
++ local_irq_save(flags);
++
++ /* Read out which interrupts that are flaged */
++ irq_mask = *R_USB_IRQ_MASK_READ;
++ reg.r_usb_irq_mask_read = irq_mask;
++
++ /* Reading R_USB_STATUS clears the ctl_status interrupt. Note that
++ R_USB_STATUS must be read before R_USB_EPID_ATTN since reading the latter
++ clears the ourun and perror fields of R_USB_STATUS. */
++ reg.r_usb_status = *R_USB_STATUS;
++
++ /* Reading R_USB_EPID_ATTN clears the iso_eof, bulk_eot and epid_attn
++ interrupts. */
++ reg.r_usb_epid_attn = *R_USB_EPID_ATTN;
++
++ /* Reading R_USB_RH_PORT_STATUS_1 and R_USB_RH_PORT_STATUS_2 clears the
++ port_status interrupt. */
++ reg.r_usb_rh_port_status_1 = *R_USB_RH_PORT_STATUS_1;
++ reg.r_usb_rh_port_status_2 = *R_USB_RH_PORT_STATUS_2;
++
++ /* Reading R_USB_FM_NUMBER clears the sof interrupt. */
++ /* Note: the lower 11 bits contain the actual frame number, sent with each
++ sof. */
++ reg.r_usb_fm_number = *R_USB_FM_NUMBER;
++
++ /* Interrupts are handled in order of priority. */
++ if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, port_status)) {
++ crisv10_hcd_port_status_irq(®);
++ }
++ if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, epid_attn)) {
++ crisv10_hcd_epid_attn_irq(®);
++ }
++ if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, ctl_status)) {
++ crisv10_hcd_ctl_status_irq(®);
++ }
++ if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, iso_eof)) {
++ crisv10_hcd_isoc_eof_irq(®);
++ }
++ if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, bulk_eot)) {
++ /* Update/restart the bulk start timer since obviously the channel is
++ running. */
++ mod_timer(&bulk_start_timer, jiffies + BULK_START_TIMER_INTERVAL);
++ /* Update/restart the bulk eot timer since we just received an bulk eot
++ interrupt. */
++ mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
++
++ /* Check for finished bulk transfers on epids */
++ check_finished_bulk_tx_epids(hcd, 0);
++ }
++ local_irq_restore(flags);
++
++ DBFEXIT;
++ return IRQ_HANDLED;
++}
++
++
++void crisv10_hcd_epid_attn_irq(struct crisv10_irq_reg *reg) {
++ struct usb_hcd *hcd = reg->hcd;
++ struct crisv10_urb_priv *urb_priv;
++ int epid;
++ DBFENTER;
++
++ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
++ if (test_bit(epid, (void *)®->r_usb_epid_attn)) {
++ struct urb *urb;
++ __u32 ept_data;
++ int error_code;
++
++ if (epid == DUMMY_EPID || epid == INVALID_EPID) {
++ /* We definitely don't care about these ones. Besides, they are
++ always disabled, so any possible disabling caused by the
++ epid attention interrupt is irrelevant. */
++ warn("Got epid_attn for INVALID_EPID or DUMMY_EPID (%d).", epid);
++ continue;
++ }
++
++ if(!epid_inuse(epid)) {
++ irq_err("Epid attention on epid:%d that isn't in use\n", epid);
++ printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
++ debug_epid(epid);
++ continue;
++ }
++
++ /* Note that although there are separate R_USB_EPT_DATA and
++ R_USB_EPT_DATA_ISO registers, they are located at the same address and
++ are of the same size. In other words, this read should be ok for isoc
++ also. */
++ ept_data = etrax_epid_get(epid);
++ error_code = IO_EXTRACT(R_USB_EPT_DATA, error_code, ept_data);
++
++ /* Get the active URB for this epid. We blatantly assume
++ that only this URB could have caused the epid attention. */
++ urb = activeUrbList[epid];
++ if (urb == NULL) {
++ irq_err("Attention on epid:%d error:%d with no active URB.\n",
++ epid, error_code);
++ printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
++ debug_epid(epid);
++ continue;
++ }
++
++ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
++ ASSERT(urb_priv);
++
++ /* Using IO_STATE_VALUE on R_USB_EPT_DATA should be ok for isoc also. */
++ if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
++
++ /* Isoc traffic doesn't have error_count_in/error_count_out. */
++ if ((usb_pipetype(urb->pipe) != PIPE_ISOCHRONOUS) &&
++ (IO_EXTRACT(R_USB_EPT_DATA, error_count_in, ept_data) == 3 ||
++ IO_EXTRACT(R_USB_EPT_DATA, error_count_out, ept_data) == 3)) {
++ /* Check if URB allready is marked for late-finish, we can get
++ several 3rd error for Intr traffic when a device is unplugged */
++ if(urb_priv->later_data == NULL) {
++ /* 3rd error. */
++ irq_warn("3rd error for epid:%d (%s %s) URB:0x%x[%d]\n", epid,
++ str_dir(urb->pipe), str_type(urb->pipe),
++ (unsigned int)urb, urb_priv->urb_num);
++
++ tc_finish_urb_later(hcd, urb, -EPROTO);
++ }
++
++ } else if (reg->r_usb_status & IO_MASK(R_USB_STATUS, perror)) {
++ irq_warn("Perror for epid:%d\n", epid);
++ printk("FM_NUMBER: %d\n", reg->r_usb_fm_number & 0x7ff);
++ printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
++ __dump_urb(urb);
++ debug_epid(epid);
++
++ if (!(ept_data & IO_MASK(R_USB_EPT_DATA, valid))) {
++ /* invalid ep_id */
++ panic("Perror because of invalid epid."
++ " Deconfigured too early?");
++ } else {
++ /* past eof1, near eof, zout transfer, setup transfer */
++ /* Dump the urb and the relevant EP descriptor. */
++ panic("Something wrong with DMA descriptor contents."
++ " Too much traffic inserted?");
++ }
++ } else if (reg->r_usb_status & IO_MASK(R_USB_STATUS, ourun)) {
++ /* buffer ourun */
++ printk("FM_NUMBER: %d\n", reg->r_usb_fm_number & 0x7ff);
++ printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
++ __dump_urb(urb);
++ debug_epid(epid);
++
++ panic("Buffer overrun/underrun for epid:%d. DMA too busy?", epid);
++ } else {
++ irq_warn("Attention on epid:%d (%s %s) with no error code\n", epid,
++ str_dir(urb->pipe), str_type(urb->pipe));
++ printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
++ __dump_urb(urb);
++ debug_epid(epid);
++ }
++
++ } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code,
++ stall)) {
++ /* Not really a protocol error, just says that the endpoint gave
++ a stall response. Note that error_code cannot be stall for isoc. */
++ if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
++ panic("Isoc traffic cannot stall");
++ }
++
++ tc_dbg("Stall for epid:%d (%s %s) URB:0x%x\n", epid,
++ str_dir(urb->pipe), str_type(urb->pipe), (unsigned int)urb);
++ tc_finish_urb(hcd, urb, -EPIPE);
++
++ } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code,
++ bus_error)) {
++ /* Two devices responded to a transaction request. Must be resolved
++ by software. FIXME: Reset ports? */
++ panic("Bus error for epid %d."
++ " Two devices responded to transaction request\n",
++ epid);
++
++ } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code,
++ buffer_error)) {
++ /* DMA overrun or underrun. */
++ irq_warn("Buffer overrun/underrun for epid:%d (%s %s)\n", epid,
++ str_dir(urb->pipe), str_type(urb->pipe));
++
++ /* It seems that error_code = buffer_error in
++ R_USB_EPT_DATA/R_USB_EPT_DATA_ISO and ourun = yes in R_USB_STATUS
++ are the same error. */
++ tc_finish_urb(hcd, urb, -EPROTO);
++ } else {
++ irq_warn("Unknown attention on epid:%d (%s %s)\n", epid,
++ str_dir(urb->pipe), str_type(urb->pipe));
++ dump_ept_data(epid);
++ }
++ }
++ }
++ DBFEXIT;
++}
++
++void crisv10_hcd_port_status_irq(struct crisv10_irq_reg *reg)
++{
++ __u16 port_reg[USB_ROOT_HUB_PORTS];
++ DBFENTER;
++ port_reg[0] = reg->r_usb_rh_port_status_1;
++ port_reg[1] = reg->r_usb_rh_port_status_2;
++ rh_port_status_change(port_reg);
++ DBFEXIT;
++}
++
++void crisv10_hcd_isoc_eof_irq(struct crisv10_irq_reg *reg)
++{
++ int epid;
++ struct urb *urb;
++ struct crisv10_urb_priv *urb_priv;
++
++ DBFENTER;
++
++ for (epid = 0; epid < NBR_OF_EPIDS - 1; epid++) {
++
++ /* Only check epids that are in use, is valid and has SB list */
++ if (!epid_inuse(epid) || epid == INVALID_EPID ||
++ TxIsocEPList[epid].sub == 0 || epid == DUMMY_EPID) {
++ /* Nothing here to see. */
++ continue;
++ }
++ ASSERT(epid_isoc(epid));
++
++ /* Get the active URB for this epid (if any). */
++ urb = activeUrbList[epid];
++ if (urb == 0) {
++ isoc_warn("Ignoring NULL urb for epid:%d\n", epid);
++ continue;
++ }
++ if(!epid_out_traffic(epid)) {
++ /* Sanity check. */
++ ASSERT(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
++
++ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
++ ASSERT(urb_priv);
++
++ if (urb_priv->urb_state == NOT_STARTED) {
++ /* If ASAP is not set and urb->start_frame is the current frame,
++ start the transfer. */
++ if (!(urb->transfer_flags & URB_ISO_ASAP) &&
++ (urb->start_frame == (*R_USB_FM_NUMBER & 0x7ff))) {
++ /* EP should not be enabled if we're waiting for start_frame */
++ ASSERT((TxIsocEPList[epid].command &
++ IO_STATE(USB_EP_command, enable, yes)) == 0);
++
++ isoc_warn("Enabling isoc IN EP descr for epid %d\n", epid);
++ TxIsocEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
++
++ /* This urb is now active. */
++ urb_priv->urb_state = STARTED;
++ continue;
++ }
++ }
++ }
++ }
++
++ DBFEXIT;
++}
++
++void crisv10_hcd_ctl_status_irq(struct crisv10_irq_reg *reg)
++{
++ struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(reg->hcd);
++
++ DBFENTER;
++ ASSERT(crisv10_hcd);
++
++ irq_dbg("ctr_status_irq, controller status: %s\n",
++ hcd_status_to_str(reg->r_usb_status));
++
++ /* FIXME: What should we do if we get ourun or perror? Dump the EP and SB
++ list for the corresponding epid? */
++ if (reg->r_usb_status & IO_MASK(R_USB_STATUS, ourun)) {
++ panic("USB controller got ourun.");
++ }
++ if (reg->r_usb_status & IO_MASK(R_USB_STATUS, perror)) {
++
++ /* Before, etrax_usb_do_intr_recover was called on this epid if it was
++ an interrupt pipe. I don't see how re-enabling all EP descriptors
++ will help if there was a programming error. */
++ panic("USB controller got perror.");
++ }
++
++ /* Keep track of USB Controller, if it's running or not */
++ if(reg->r_usb_status & IO_STATE(R_USB_STATUS, running, yes)) {
++ crisv10_hcd->running = 1;
++ } else {
++ crisv10_hcd->running = 0;
++ }
++
++ if (reg->r_usb_status & IO_MASK(R_USB_STATUS, device_mode)) {
++ /* We should never operate in device mode. */
++ panic("USB controller in device mode.");
++ }
++
++ /* Set the flag to avoid getting "Unlink after no-IRQ? Controller is probably
++ using the wrong IRQ" from hcd_unlink_urb() in drivers/usb/core/hcd.c */
++ set_bit(HCD_FLAG_SAW_IRQ, ®->hcd->flags);
++
++ DBFEXIT;
++}
++
++
++/******************************************************************/
++/* Host Controller interface functions */
++/******************************************************************/
++
++static inline void crisv10_ready_wait(void) {
++ volatile int timeout = 10000;
++ /* Check the busy bit of USB controller in Etrax */
++ while((*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy)) &&
++ (timeout-- > 0));
++ if(timeout == 0) {
++ warn("Timeout while waiting for USB controller to be idle\n");
++ }
++}
++
++/* reset host controller */
++static int crisv10_hcd_reset(struct usb_hcd *hcd)
++{
++ DBFENTER;
++ hcd_dbg(hcd, "reset\n");
++
++
++ /* Reset the USB interface. */
++ /*
++ *R_USB_COMMAND =
++ IO_STATE(R_USB_COMMAND, port_sel, nop) |
++ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
++ IO_STATE(R_USB_COMMAND, ctrl_cmd, reset);
++ nop();
++ */
++ DBFEXIT;
++ return 0;
++}
++
++/* start host controller */
++static int crisv10_hcd_start(struct usb_hcd *hcd)
++{
++ DBFENTER;
++ hcd_dbg(hcd, "start\n");
++
++ crisv10_ready_wait();
++
++ /* Start processing of USB traffic. */
++ *R_USB_COMMAND =
++ IO_STATE(R_USB_COMMAND, port_sel, nop) |
++ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
++ IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
++
++ nop();
++
++ hcd->state = HC_STATE_RUNNING;
++
++ DBFEXIT;
++ return 0;
++}
++
++/* stop host controller */
++static void crisv10_hcd_stop(struct usb_hcd *hcd)
++{
++ DBFENTER;
++ hcd_dbg(hcd, "stop\n");
++ crisv10_hcd_reset(hcd);
++ DBFEXIT;
++}
++
++/* return the current frame number */
++static int crisv10_hcd_get_frame(struct usb_hcd *hcd)
++{
++ DBFENTER;
++ DBFEXIT;
++ return (*R_USB_FM_NUMBER & 0x7ff);
++}
++
++#ifdef CONFIG_USB_OTG
++
++static int crisv10_hcd_start_port_reset(struct usb_hcd *hcd, unsigned port)
++{
++ return 0; /* no-op for now */
++}
++
++#endif /* CONFIG_USB_OTG */
++
++
++/******************************************************************/
++/* Root Hub functions */
++/******************************************************************/
++
++/* root hub status */
++static const struct usb_hub_status rh_hub_status =
++ {
++ .wHubStatus = 0,
++ .wHubChange = 0,
++ };
++
++/* root hub descriptor */
++static const u8 rh_hub_descr[] =
++ {
++ 0x09, /* bDescLength */
++ 0x29, /* bDescriptorType */
++ USB_ROOT_HUB_PORTS, /* bNbrPorts */
++ 0x00, /* wHubCharacteristics */
++ 0x00,
++ 0x01, /* bPwrOn2pwrGood */
++ 0x00, /* bHubContrCurrent */
++ 0x00, /* DeviceRemovable */
++ 0xff /* PortPwrCtrlMask */
++ };
++
++/* Actual holder of root hub status*/
++struct crisv10_rh rh;
++
++/* Initialize root hub data structures (called from dvdrv_hcd_probe()) */
++int rh_init(void) {
++ int i;
++ /* Reset port status flags */
++ for (i = 0; i < USB_ROOT_HUB_PORTS; i++) {
++ rh.wPortChange[i] = 0;
++ rh.wPortStatusPrev[i] = 0;
++ }
++ return 0;
++}
++
++#define RH_FEAT_MASK ((1<<USB_PORT_FEAT_CONNECTION)|\
++ (1<<USB_PORT_FEAT_ENABLE)|\
++ (1<<USB_PORT_FEAT_SUSPEND)|\
++ (1<<USB_PORT_FEAT_RESET))
++
++/* Handle port status change interrupt (called from bottom part interrupt) */
++void rh_port_status_change(__u16 port_reg[]) {
++ int i;
++ __u16 wChange;
++
++ for(i = 0; i < USB_ROOT_HUB_PORTS; i++) {
++ /* Xor out changes since last read, masked for important flags */
++ wChange = (port_reg[i] & RH_FEAT_MASK) ^ rh.wPortStatusPrev[i];
++ /* Or changes together with (if any) saved changes */
++ rh.wPortChange[i] |= wChange;
++ /* Save new status */
++ rh.wPortStatusPrev[i] = port_reg[i];
++
++ if(wChange) {
++ rh_dbg("Interrupt port_status change port%d: %s Current-status:%s\n", i+1,
++ port_status_to_str(wChange),
++ port_status_to_str(port_reg[i]));
++ }
++ }
++}
++
++/* Construct port status change bitmap for the root hub */
++static int rh_status_data_request(struct usb_hcd *hcd, char *buf)
++{
++ struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(hcd);
++ unsigned int i;
++
++ DBFENTER;
++ /*
++ * corresponds to hub status change EP (USB 2.0 spec section 11.13.4)
++ * return bitmap indicating ports with status change
++ */
++ *buf = 0;
++ spin_lock(&crisv10_hcd->lock);
++ for (i = 1; i <= crisv10_hcd->num_ports; i++) {
++ if (rh.wPortChange[map_port(i)]) {
++ *buf |= (1 << i);
++ rh_dbg("rh_status_data_request, change on port %d: %s Current Status: %s\n", i,
++ port_status_to_str(rh.wPortChange[map_port(i)]),
++ port_status_to_str(rh.wPortStatusPrev[map_port(i)]));
++ }
++ }
++ spin_unlock(&crisv10_hcd->lock);
++ DBFEXIT;
++ return *buf == 0 ? 0 : 1;
++}
++
++/* Handle a control request for the root hub (called from hcd_driver) */
++static int rh_control_request(struct usb_hcd *hcd,
++ u16 typeReq,
++ u16 wValue,
++ u16 wIndex,
++ char *buf,
++ u16 wLength) {
++
++ struct crisv10_hcd *crisv10_hcd = hcd_to_crisv10_hcd(hcd);
++ int retval = 0;
++ int len;
++ DBFENTER;
++
++ switch (typeReq) {
++ case GetHubDescriptor:
++ rh_dbg("GetHubDescriptor\n");
++ len = min_t(unsigned int, sizeof rh_hub_descr, wLength);
++ memcpy(buf, rh_hub_descr, len);
++ buf[2] = crisv10_hcd->num_ports;
++ break;
++ case GetHubStatus:
++ rh_dbg("GetHubStatus\n");
++ len = min_t(unsigned int, sizeof rh_hub_status, wLength);
++ memcpy(buf, &rh_hub_status, len);
++ break;
++ case GetPortStatus:
++ if (!wIndex || wIndex > crisv10_hcd->num_ports)
++ goto error;
++ rh_dbg("GetportStatus, port:%d change:%s status:%s\n", wIndex,
++ port_status_to_str(rh.wPortChange[map_port(wIndex)]),
++ port_status_to_str(rh.wPortStatusPrev[map_port(wIndex)]));
++ *(u16 *) buf = cpu_to_le16(rh.wPortStatusPrev[map_port(wIndex)]);
++ *(u16 *) (buf + 2) = cpu_to_le16(rh.wPortChange[map_port(wIndex)]);
++ break;
++ case SetHubFeature:
++ rh_dbg("SetHubFeature\n");
++ case ClearHubFeature:
++ rh_dbg("ClearHubFeature\n");
++ switch (wValue) {
++ case C_HUB_OVER_CURRENT:
++ case C_HUB_LOCAL_POWER:
++ rh_warn("Not implemented hub request:%d \n", typeReq);
++ /* not implemented */
++ break;
++ default:
++ goto error;
++ }
++ break;
++ case SetPortFeature:
++ if (!wIndex || wIndex > crisv10_hcd->num_ports)
++ goto error;
++ if(rh_set_port_feature(map_port(wIndex), wValue))
++ goto error;
++ break;
++ case ClearPortFeature:
++ if (!wIndex || wIndex > crisv10_hcd->num_ports)
++ goto error;
++ if(rh_clear_port_feature(map_port(wIndex), wValue))
++ goto error;
++ break;
++ default:
++ rh_warn("Unknown hub request: %d\n", typeReq);
++ error:
++ retval = -EPIPE;
++ }
++ DBFEXIT;
++ return retval;
++}
++
++int rh_set_port_feature(__u8 bPort, __u16 wFeature) {
++ __u8 bUsbCommand = 0;
++ switch(wFeature) {
++ case USB_PORT_FEAT_RESET:
++ rh_dbg("SetPortFeature: reset\n");
++ bUsbCommand |= IO_STATE(R_USB_COMMAND, port_cmd, reset);
++ goto set;
++ break;
++ case USB_PORT_FEAT_SUSPEND:
++ rh_dbg("SetPortFeature: suspend\n");
++ bUsbCommand |= IO_STATE(R_USB_COMMAND, port_cmd, suspend);
++ goto set;
++ break;
++ case USB_PORT_FEAT_POWER:
++ rh_dbg("SetPortFeature: power\n");
++ break;
++ case USB_PORT_FEAT_C_CONNECTION:
++ rh_dbg("SetPortFeature: c_connection\n");
++ break;
++ case USB_PORT_FEAT_C_RESET:
++ rh_dbg("SetPortFeature: c_reset\n");
++ break;
++ case USB_PORT_FEAT_C_OVER_CURRENT:
++ rh_dbg("SetPortFeature: c_over_current\n");
++ break;
++
++ set:
++ /* Select which port via the port_sel field */
++ bUsbCommand |= IO_FIELD(R_USB_COMMAND, port_sel, bPort+1);
++
++ /* Make sure the controller isn't busy. */
++ crisv10_ready_wait();
++ /* Send out the actual command to the USB controller */
++ *R_USB_COMMAND = bUsbCommand;
++
++ /* If port reset then also bring USB controller into running state */
++ if(wFeature == USB_PORT_FEAT_RESET) {
++ /* Wait a while for controller to first become started after port reset */
++ udelay(12000); /* 12ms blocking wait */
++
++ /* Make sure the controller isn't busy. */
++ crisv10_ready_wait();
++
++ /* If all enabled ports were disabled the host controller goes down into
++ started mode, so we need to bring it back into the running state.
++ (This is safe even if it's already in the running state.) */
++ *R_USB_COMMAND =
++ IO_STATE(R_USB_COMMAND, port_sel, nop) |
++ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
++ IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
++ }
++
++ break;
++ default:
++ rh_dbg("SetPortFeature: unknown feature\n");
++ return -1;
++ }
++ return 0;
++}
++
++int rh_clear_port_feature(__u8 bPort, __u16 wFeature) {
++ switch(wFeature) {
++ case USB_PORT_FEAT_ENABLE:
++ rh_dbg("ClearPortFeature: enable\n");
++ rh_disable_port(bPort);
++ break;
++ case USB_PORT_FEAT_SUSPEND:
++ rh_dbg("ClearPortFeature: suspend\n");
++ break;
++ case USB_PORT_FEAT_POWER:
++ rh_dbg("ClearPortFeature: power\n");
++ break;
++
++ case USB_PORT_FEAT_C_ENABLE:
++ rh_dbg("ClearPortFeature: c_enable\n");
++ goto clear;
++ case USB_PORT_FEAT_C_SUSPEND:
++ rh_dbg("ClearPortFeature: c_suspend\n");
++ goto clear;
++ case USB_PORT_FEAT_C_CONNECTION:
++ rh_dbg("ClearPortFeature: c_connection\n");
++ goto clear;
++ case USB_PORT_FEAT_C_OVER_CURRENT:
++ rh_dbg("ClearPortFeature: c_over_current\n");
++ goto clear;
++ case USB_PORT_FEAT_C_RESET:
++ rh_dbg("ClearPortFeature: c_reset\n");
++ goto clear;
++ clear:
++ rh.wPortChange[bPort] &= ~(1 << (wFeature - 16));
++ break;
++ default:
++ rh_dbg("ClearPortFeature: unknown feature\n");
++ return -1;
++ }
++ return 0;
++}
++
++
++#ifdef CONFIG_PM
++/* Handle a suspend request for the root hub (called from hcd_driver) */
++static int rh_suspend_request(struct usb_hcd *hcd)
++{
++ return 0; /* no-op for now */
++}
++
++/* Handle a resume request for the root hub (called from hcd_driver) */
++static int rh_resume_request(struct usb_hcd *hcd)
++{
++ return 0; /* no-op for now */
++}
++#endif /* CONFIG_PM */
++
++
++
++/* Wrapper function for workaround port disable registers in USB controller */
++static void rh_disable_port(unsigned int port) {
++ volatile int timeout = 10000;
++ volatile char* usb_portx_disable;
++ switch(port) {
++ case 0:
++ usb_portx_disable = R_USB_PORT1_DISABLE;
++ break;
++ case 1:
++ usb_portx_disable = R_USB_PORT2_DISABLE;
++ break;
++ default:
++ /* Invalid port index */
++ return;
++ }
++ /* Set disable flag in special register */
++ *usb_portx_disable = IO_STATE(R_USB_PORT1_DISABLE, disable, yes);
++ /* Wait until not enabled anymore */
++ while((rh.wPortStatusPrev[port] &
++ IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, yes)) &&
++ (timeout-- > 0));
++ if(timeout == 0) {
++ warn("Timeout while waiting for port %d to become disabled\n", port);
++ }
++ /* clear disable flag in special register */
++ *usb_portx_disable = IO_STATE(R_USB_PORT1_DISABLE, disable, no);
++ rh_info("Physical port %d disabled\n", port+1);
++}
++
++
++/******************************************************************/
++/* Transfer Controller (TC) functions */
++/******************************************************************/
++
++/* FIXME: Should RX_BUF_SIZE be a config option, or maybe we should adjust it
++ dynamically?
++ To adjust it dynamically we would have to get an interrupt when we reach
++ the end of the rx descriptor list, or when we get close to the end, and
++ then allocate more descriptors. */
++#define NBR_OF_RX_DESC 512
++#define RX_DESC_BUF_SIZE 1024
++#define RX_BUF_SIZE (NBR_OF_RX_DESC * RX_DESC_BUF_SIZE)
++
++
++/* Local variables for Transfer Controller */
++/* --------------------------------------- */
++
++/* This is a circular (double-linked) list of the active urbs for each epid.
++ The head is never removed, and new urbs are linked onto the list as
++ urb_entry_t elements. Don't reference urb_list directly; use the wrapper
++ functions instead (which includes spin_locks) */
++static struct list_head urb_list[NBR_OF_EPIDS];
++
++/* Read about the need and usage of this lock in submit_ctrl_urb. */
++/* Lock for URB lists for each EPID */
++static spinlock_t urb_list_lock;
++
++/* Lock for EPID array register (R_USB_EPT_x) in Etrax */
++static spinlock_t etrax_epid_lock;
++
++/* Lock for dma8 sub0 handling */
++static spinlock_t etrax_dma8_sub0_lock;
++
++/* DMA IN cache bug. Align the DMA IN buffers to 32 bytes, i.e. a cache line.
++ Since RX_DESC_BUF_SIZE is 1024 is a multiple of 32, all rx buffers will be
++ cache aligned. */
++static volatile unsigned char RxBuf[RX_BUF_SIZE] __attribute__ ((aligned (32)));
++static volatile struct USB_IN_Desc RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned (4)));
++
++/* Pointers into RxDescList. */
++static volatile struct USB_IN_Desc *myNextRxDesc;
++static volatile struct USB_IN_Desc *myLastRxDesc;
++
++/* A zout transfer makes a memory access at the address of its buf pointer,
++ which means that setting this buf pointer to 0 will cause an access to the
++ flash. In addition to this, setting sw_len to 0 results in a 16/32 bytes
++ (depending on DMA burst size) transfer.
++ Instead, we set it to 1, and point it to this buffer. */
++static int zout_buffer[4] __attribute__ ((aligned (4)));
++
++/* Cache for allocating new EP and SB descriptors. */
++static kmem_cache_t *usb_desc_cache;
++
++/* Cache for the data allocated in the isoc descr top half. */
++static kmem_cache_t *isoc_compl_cache;
++
++/* Cache for the data allocated when delayed finishing of URBs */
++static kmem_cache_t *later_data_cache;
++
++
++/* Counter to keep track of how many Isoc EP we have sat up. Used to enable
++ and disable iso_eof interrupt. We only need these interrupts when we have
++ Isoc data endpoints (consumes CPU cycles).
++ FIXME: This could be more fine granular, so this interrupt is only enabled
++ when we have a In Isoc URB not URB_ISO_ASAP flaged queued. */
++static int isoc_epid_counter;
++
++/* Protecting wrapper functions for R_USB_EPT_x */
++/* -------------------------------------------- */
++static inline void etrax_epid_set(__u8 index, __u32 data) {
++ unsigned long flags;
++ spin_lock_irqsave(&etrax_epid_lock, flags);
++ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
++ nop();
++ *R_USB_EPT_DATA = data;
++ spin_unlock_irqrestore(&etrax_epid_lock, flags);
++}
++
++static inline void etrax_epid_clear_error(__u8 index) {
++ unsigned long flags;
++ spin_lock_irqsave(&etrax_epid_lock, flags);
++ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
++ nop();
++ *R_USB_EPT_DATA &=
++ ~(IO_MASK(R_USB_EPT_DATA, error_count_in) |
++ IO_MASK(R_USB_EPT_DATA, error_count_out) |
++ IO_MASK(R_USB_EPT_DATA, error_code));
++ spin_unlock_irqrestore(&etrax_epid_lock, flags);
++}
++
++static inline void etrax_epid_set_toggle(__u8 index, __u8 dirout,
++ __u8 toggle) {
++ unsigned long flags;
++ spin_lock_irqsave(&etrax_epid_lock, flags);
++ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
++ nop();
++ if(dirout) {
++ *R_USB_EPT_DATA &= ~IO_MASK(R_USB_EPT_DATA, t_out);
++ *R_USB_EPT_DATA |= IO_FIELD(R_USB_EPT_DATA, t_out, toggle);
++ } else {
++ *R_USB_EPT_DATA &= ~IO_MASK(R_USB_EPT_DATA, t_in);
++ *R_USB_EPT_DATA |= IO_FIELD(R_USB_EPT_DATA, t_in, toggle);
++ }
++ spin_unlock_irqrestore(&etrax_epid_lock, flags);
++}
++
++static inline __u8 etrax_epid_get_toggle(__u8 index, __u8 dirout) {
++ unsigned long flags;
++ __u8 toggle;
++ spin_lock_irqsave(&etrax_epid_lock, flags);
++ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
++ nop();
++ if (dirout) {
++ toggle = IO_EXTRACT(R_USB_EPT_DATA, t_out, *R_USB_EPT_DATA);
++ } else {
++ toggle = IO_EXTRACT(R_USB_EPT_DATA, t_in, *R_USB_EPT_DATA);
++ }
++ spin_unlock_irqrestore(&etrax_epid_lock, flags);
++ return toggle;
++}
++
++
++static inline __u32 etrax_epid_get(__u8 index) {
++ unsigned long flags;
++ __u32 data;
++ spin_lock_irqsave(&etrax_epid_lock, flags);
++ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
++ nop();
++ data = *R_USB_EPT_DATA;
++ spin_unlock_irqrestore(&etrax_epid_lock, flags);
++ return data;
++}
++
++
++
++
++/* Main functions for Transfer Controller */
++/* -------------------------------------- */
++
++/* Init structs, memories and lists used by Transfer Controller */
++int tc_init(struct usb_hcd *hcd) {
++ int i;
++ /* Clear software state info for all epids */
++ memset(epid_state, 0, sizeof(struct etrax_epid) * NBR_OF_EPIDS);
++
++ /* Set Invalid and Dummy as being in use and disabled */
++ epid_state[INVALID_EPID].inuse = 1;
++ epid_state[DUMMY_EPID].inuse = 1;
++ epid_state[INVALID_EPID].disabled = 1;
++ epid_state[DUMMY_EPID].disabled = 1;
++
++ /* Clear counter for how many Isoc epids we have sat up */
++ isoc_epid_counter = 0;
++
++ /* Initialize the urb list by initiating a head for each list.
++ Also reset list hodling active URB for each epid */
++ for (i = 0; i < NBR_OF_EPIDS; i++) {
++ INIT_LIST_HEAD(&urb_list[i]);
++ activeUrbList[i] = NULL;
++ }
++
++ /* Init lock for URB lists */
++ spin_lock_init(&urb_list_lock);
++ /* Init lock for Etrax R_USB_EPT register */
++ spin_lock_init(&etrax_epid_lock);
++ /* Init lock for Etrax dma8 sub0 handling */
++ spin_lock_init(&etrax_dma8_sub0_lock);
++
++ /* We use kmem_cache_* to make sure that all DMA desc. are dword aligned */
++
++ /* Note that we specify sizeof(struct USB_EP_Desc) as the size, but also
++ allocate SB descriptors from this cache. This is ok since
++ sizeof(struct USB_EP_Desc) == sizeof(struct USB_SB_Desc). */
++ usb_desc_cache = kmem_cache_create("usb_desc_cache",
++ sizeof(struct USB_EP_Desc), 0,
++ SLAB_HWCACHE_ALIGN, 0, 0);
++ if(usb_desc_cache == NULL) {
++ return -ENOMEM;
++ }
++
++ /* Create slab cache for speedy allocation of memory for isoc bottom-half
++ interrupt handling */
++ isoc_compl_cache =
++ kmem_cache_create("isoc_compl_cache",
++ sizeof(struct crisv10_isoc_complete_data),
++ 0, SLAB_HWCACHE_ALIGN, 0, 0);
++ if(isoc_compl_cache == NULL) {
++ return -ENOMEM;
++ }
++
++ /* Create slab cache for speedy allocation of memory for later URB finish
++ struct */
++ later_data_cache =
++ kmem_cache_create("later_data_cache",
++ sizeof(struct urb_later_data),
++ 0, SLAB_HWCACHE_ALIGN, 0, 0);
++ if(later_data_cache == NULL) {
++ return -ENOMEM;
++ }
++
++
++ /* Initiate the bulk start timer. */
++ init_timer(&bulk_start_timer);
++ bulk_start_timer.expires = jiffies + BULK_START_TIMER_INTERVAL;
++ bulk_start_timer.function = tc_bulk_start_timer_func;
++ add_timer(&bulk_start_timer);
++
++
++ /* Initiate the bulk eot timer. */
++ init_timer(&bulk_eot_timer);
++ bulk_eot_timer.expires = jiffies + BULK_EOT_TIMER_INTERVAL;
++ bulk_eot_timer.function = tc_bulk_eot_timer_func;
++ bulk_eot_timer.data = (unsigned long)hcd;
++ add_timer(&bulk_eot_timer);
++
++ return 0;
++}
++
++/* Uninitialize all resources used by Transfer Controller */
++void tc_destroy(void) {
++
++ /* Destroy all slab cache */
++ kmem_cache_destroy(usb_desc_cache);
++ kmem_cache_destroy(isoc_compl_cache);
++ kmem_cache_destroy(later_data_cache);
++
++ /* Remove timers */
++ del_timer(&bulk_start_timer);
++ del_timer(&bulk_eot_timer);
++}
++
++static void restart_dma8_sub0(void) {
++ unsigned long flags;
++ spin_lock_irqsave(&etrax_dma8_sub0_lock, flags);
++ /* Verify that the dma is not running */
++ if ((*R_DMA_CH8_SUB0_CMD & IO_MASK(R_DMA_CH8_SUB0_CMD, cmd)) == 0) {
++ struct USB_EP_Desc *ep = (struct USB_EP_Desc *)phys_to_virt(*R_DMA_CH8_SUB0_EP);
++ while (DUMMY_EPID == IO_EXTRACT(USB_EP_command, epid, ep->command)) {
++ ep = (struct USB_EP_Desc *)phys_to_virt(ep->next);
++ }
++ /* Advance the DMA to the next EP descriptor that is not a DUMMY_EPID.
++ * ep->next is already a physical address; no need for a virt_to_phys. */
++ *R_DMA_CH8_SUB0_EP = ep->next;
++ /* Restart the DMA */
++ *R_DMA_CH8_SUB0_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start);
++ }
++ spin_unlock_irqrestore(&etrax_dma8_sub0_lock, flags);
++}
++
++/* queue an URB with the transfer controller (called from hcd_driver) */
++static int tc_urb_enqueue(struct usb_hcd *hcd,
++ struct usb_host_endpoint *ep,
++ struct urb *urb,
++ gfp_t mem_flags) {
++ int epid;
++ int retval;
++ int bustime = 0;
++ int maxpacket;
++ unsigned long flags;
++ struct crisv10_urb_priv *urb_priv;
++ struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(hcd);
++ DBFENTER;
++
++ if(!(crisv10_hcd->running)) {
++ /* The USB Controller is not running, probably because no device is
++ attached. No idea to enqueue URBs then */
++ tc_warn("Rejected enqueueing of URB:0x%x because no dev attached\n",
++ (unsigned int)urb);
++ return -ENOENT;
++ }
++
++ maxpacket = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
++ /* Special case check for In Isoc transfers. Specification states that each
++ In Isoc transfer consists of one packet and therefore it should fit into
++ the transfer-buffer of an URB.
++ We do the check here to be sure (an invalid scenario can be produced with
++ parameters to the usbtest suite) */
++ if(usb_pipeisoc(urb->pipe) && usb_pipein(urb->pipe) &&
++ (urb->transfer_buffer_length < maxpacket)) {
++ tc_err("Submit In Isoc URB with buffer length:%d to pipe with maxpacketlen: %d\n", urb->transfer_buffer_length, maxpacket);
++ return -EMSGSIZE;
++ }
++
++ /* Check if there is enough bandwidth for periodic transfer */
++ if(usb_pipeint(urb->pipe) || usb_pipeisoc(urb->pipe)) {
++ /* only check (and later claim) if not already claimed */
++ if (urb->bandwidth == 0) {
++ bustime = usb_check_bandwidth(urb->dev, urb);
++ if (bustime < 0) {
++ tc_err("Not enough periodic bandwidth\n");
++ return -ENOSPC;
++ }
++ }
++ }
++
++ /* Check if there is a epid for URBs destination, if not this function
++ set up one. */
++ epid = tc_setup_epid(ep, urb, mem_flags);
++ if (epid < 0) {
++ tc_err("Failed setup epid:%d for URB:0x%x\n", epid, (unsigned int)urb);
++ DBFEXIT;
++ return -ENOMEM;
++ }
++
++ if(urb == activeUrbList[epid]) {
++ tc_err("Resubmition of allready active URB:0x%x\n", (unsigned int)urb);
++ return -ENXIO;
++ }
++
++ if(urb_list_entry(urb, epid)) {
++ tc_err("Resubmition of allready queued URB:0x%x\n", (unsigned int)urb);
++ return -ENXIO;
++ }
++
++ /* If we actively have flaged endpoint as disabled then refuse submition */
++ if(epid_state[epid].disabled) {
++ return -ENOENT;
++ }
++
++ /* Allocate and init HC-private data for URB */
++ if(urb_priv_create(hcd, urb, epid, mem_flags) != 0) {
++ DBFEXIT;
++ return -ENOMEM;
++ }
++ urb_priv = urb->hcpriv;
++
++ tc_dbg("Enqueue URB:0x%x[%d] epid:%d (%s) bufflen:%d\n",
++ (unsigned int)urb, urb_priv->urb_num, epid,
++ pipe_to_str(urb->pipe), urb->transfer_buffer_length);
++
++ /* Create and link SBs required for this URB */
++ retval = create_sb_for_urb(urb, mem_flags);
++ if(retval != 0) {
++ tc_err("Failed to create SBs for URB:0x%x[%d]\n", (unsigned int)urb,
++ urb_priv->urb_num);
++ urb_priv_free(hcd, urb);
++ DBFEXIT;
++ return retval;
++ }
++
++ /* Init intr EP pool if this URB is a INTR transfer. This pool is later
++ used when inserting EPs in the TxIntrEPList. We do the alloc here
++ so we can't run out of memory later */
++ if(usb_pipeint(urb->pipe)) {
++ retval = init_intr_urb(urb, mem_flags);
++ if(retval != 0) {
++ tc_warn("Failed to init Intr URB\n");
++ urb_priv_free(hcd, urb);
++ DBFEXIT;
++ return retval;
++ }
++ }
++
++ /* Disable other access when inserting USB */
++ local_irq_save(flags);
++
++ /* Claim bandwidth, if needed */
++ if(bustime) {
++ usb_claim_bandwidth(urb->dev, urb, bustime, 0);
++ }
++
++ /* Add URB to EP queue */
++ urb_list_add(urb, epid, mem_flags);
++
++ if(usb_pipeisoc(urb->pipe)) {
++ /* Special processing of Isoc URBs. */
++ tc_dma_process_isoc_urb(urb);
++ } else {
++ /* Process EP queue for rest of the URB types (Bulk, Ctrl, Intr) */
++ tc_dma_process_queue(epid);
++ }
++
++ local_irq_restore(flags);
++
++ DBFEXIT;
++ return 0;
++}
++
++/* remove an URB from the transfer controller queues (called from hcd_driver)*/
++static int tc_urb_dequeue(struct usb_hcd *hcd, struct urb *urb) {
++ struct crisv10_urb_priv *urb_priv;
++ unsigned long flags;
++ int epid;
++
++ DBFENTER;
++ /* Disable interrupts here since a descriptor interrupt for the isoc epid
++ will modify the sb list. This could possibly be done more granular, but
++ urb_dequeue should not be used frequently anyway.
++ */
++ local_irq_save(flags);
++
++ urb_priv = urb->hcpriv;
++
++ if (!urb_priv) {
++ /* This happens if a device driver calls unlink on an urb that
++ was never submitted (lazy driver) or if the urb was completed
++ while dequeue was being called. */
++ tc_warn("Dequeing of not enqueued URB:0x%x\n", (unsigned int)urb);
++ local_irq_restore(flags);
++ return 0;
++ }
++ epid = urb_priv->epid;
++
++ tc_warn("Dequeing %s URB:0x%x[%d] (%s %s epid:%d) status:%d %s\n",
++ (urb == activeUrbList[epid]) ? "active" : "queued",
++ (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
++ str_type(urb->pipe), epid, urb->status,
++ (urb_priv->later_data) ? "later-sched" : "");
++
++ /* For Bulk, Ctrl and Intr are only one URB active at a time. So any URB
++ that isn't active can be dequeued by just removing it from the queue */
++ if(usb_pipebulk(urb->pipe) || usb_pipecontrol(urb->pipe) ||
++ usb_pipeint(urb->pipe)) {
++
++ /* Check if URB haven't gone further than the queue */
++ if(urb != activeUrbList[epid]) {
++ ASSERT(urb_priv->later_data == NULL);
++ tc_warn("Dequeing URB:0x%x[%d] (%s %s epid:%d) from queue"
++ " (not active)\n", (unsigned int)urb, urb_priv->urb_num,
++ str_dir(urb->pipe), str_type(urb->pipe), epid);
++
++ /* Finish the URB with error status from USB core */
++ tc_finish_urb(hcd, urb, urb->status);
++ local_irq_restore(flags);
++ return 0;
++ }
++ }
++
++ /* Set URB status to Unlink for handling when interrupt comes. */
++ urb_priv->urb_state = UNLINK;
++
++ /* Differentiate dequeing of Bulk and Ctrl from Isoc and Intr */
++ switch(usb_pipetype(urb->pipe)) {
++ case PIPE_BULK:
++ /* Check if EP still is enabled */
++ if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
++ /* The EP was enabled, disable it. */
++ TxBulkEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
++ }
++ /* Kicking dummy list out of the party. */
++ TxBulkEPList[epid].next = virt_to_phys(&TxBulkEPList[(epid + 1) % NBR_OF_EPIDS]);
++ break;
++ case PIPE_CONTROL:
++ /* Check if EP still is enabled */
++ if (TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
++ /* The EP was enabled, disable it. */
++ TxCtrlEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
++ }
++ break;
++ case PIPE_ISOCHRONOUS:
++ /* Disabling, busy-wait and unlinking of Isoc SBs will be done in
++ finish_isoc_urb(). Because there might the case when URB is dequeued
++ but there are other valid URBs waiting */
++
++ /* Check if In Isoc EP still is enabled */
++ if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
++ /* The EP was enabled, disable it. */
++ TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
++ }
++ break;
++ case PIPE_INTERRUPT:
++ /* Special care is taken for interrupt URBs. EPs are unlinked in
++ tc_finish_urb */
++ break;
++ default:
++ break;
++ }
++
++ /* Asynchronous unlink, finish the URB later from scheduled or other
++ event (data finished, error) */
++ tc_finish_urb_later(hcd, urb, urb->status);
++
++ local_irq_restore(flags);
++ DBFEXIT;
++ return 0;
++}
++
++
++static void tc_sync_finish_epid(struct usb_hcd *hcd, int epid) {
++ volatile int timeout = 10000;
++ struct urb* urb;
++ struct crisv10_urb_priv* urb_priv;
++ unsigned long flags;
++
++ volatile struct USB_EP_Desc *first_ep; /* First EP in the list. */
++ volatile struct USB_EP_Desc *curr_ep; /* Current EP, the iterator. */
++ volatile struct USB_EP_Desc *next_ep; /* The EP after current. */
++
++ int type = epid_state[epid].type;
++
++ /* Setting this flag will cause enqueue() to return -ENOENT for new
++ submitions on this endpoint and finish_urb() wont process queue further */
++ epid_state[epid].disabled = 1;
++
++ switch(type) {
++ case PIPE_BULK:
++ /* Check if EP still is enabled */
++ if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
++ /* The EP was enabled, disable it. */
++ TxBulkEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
++ tc_warn("sync_finish: Disabling EP for epid:%d\n", epid);
++
++ /* Do busy-wait until DMA not using this EP descriptor anymore */
++ while((*R_DMA_CH8_SUB0_EP ==
++ virt_to_phys(&TxBulkEPList[epid])) &&
++ (timeout-- > 0));
++ if(timeout == 0) {
++ warn("Timeout while waiting for DMA-TX-Bulk to leave EP for"
++ " epid:%d\n", epid);
++ }
++ }
++ break;
++
++ case PIPE_CONTROL:
++ /* Check if EP still is enabled */
++ if (TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
++ /* The EP was enabled, disable it. */
++ TxCtrlEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
++ tc_warn("sync_finish: Disabling EP for epid:%d\n", epid);
++
++ /* Do busy-wait until DMA not using this EP descriptor anymore */
++ while((*R_DMA_CH8_SUB1_EP ==
++ virt_to_phys(&TxCtrlEPList[epid])) &&
++ (timeout-- > 0));
++ if(timeout == 0) {
++ warn("Timeout while waiting for DMA-TX-Ctrl to leave EP for"
++ " epid:%d\n", epid);
++ }
++ }
++ break;
++
++ case PIPE_INTERRUPT:
++ local_irq_save(flags);
++ /* Disable all Intr EPs belonging to epid */
++ first_ep = &TxIntrEPList[0];
++ curr_ep = first_ep;
++ do {
++ next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
++ if (IO_EXTRACT(USB_EP_command, epid, next_ep->command) == epid) {
++ /* Disable EP */
++ next_ep->command &= ~IO_MASK(USB_EP_command, enable);
++ }
++ curr_ep = phys_to_virt(curr_ep->next);
++ } while (curr_ep != first_ep);
++
++ local_irq_restore(flags);
++ break;
++
++ case PIPE_ISOCHRONOUS:
++ /* Check if EP still is enabled */
++ if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
++ tc_warn("sync_finish: Disabling Isoc EP for epid:%d\n", epid);
++ /* The EP was enabled, disable it. */
++ TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
++
++ while((*R_DMA_CH8_SUB3_EP == virt_to_phys(&TxIsocEPList[epid])) &&
++ (timeout-- > 0));
++ if(timeout == 0) {
++ warn("Timeout while waiting for DMA-TX-Isoc to leave EP for"
++ " epid:%d\n", epid);
++ }
++ }
++ break;
++ }
++
++ local_irq_save(flags);
++
++ /* Finish if there is active URB for this endpoint */
++ if(activeUrbList[epid] != NULL) {
++ urb = activeUrbList[epid];
++ urb_priv = urb->hcpriv;
++ ASSERT(urb_priv);
++ tc_warn("Sync finish %s URB:0x%x[%d] (%s %s epid:%d) status:%d %s\n",
++ (urb == activeUrbList[epid]) ? "active" : "queued",
++ (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
++ str_type(urb->pipe), epid, urb->status,
++ (urb_priv->later_data) ? "later-sched" : "");
++
++ tc_finish_urb(hcd, activeUrbList[epid], -ENOENT);
++ ASSERT(activeUrbList[epid] == NULL);
++ }
++
++ /* Finish any queued URBs for this endpoint. There won't be any resubmitions
++ because epid_disabled causes enqueue() to fail for this endpoint */
++ while((urb = urb_list_first(epid)) != NULL) {
++ urb_priv = urb->hcpriv;
++ ASSERT(urb_priv);
++
++ tc_warn("Sync finish %s URB:0x%x[%d] (%s %s epid:%d) status:%d %s\n",
++ (urb == activeUrbList[epid]) ? "active" : "queued",
++ (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
++ str_type(urb->pipe), epid, urb->status,
++ (urb_priv->later_data) ? "later-sched" : "");
++
++ tc_finish_urb(hcd, urb, -ENOENT);
++ }
++ epid_state[epid].disabled = 0;
++ local_irq_restore(flags);
++}
++
++/* free resources associated with an endpoint (called from hcd_driver) */
++static void tc_endpoint_disable(struct usb_hcd *hcd,
++ struct usb_host_endpoint *ep) {
++ DBFENTER;
++ /* Only free epid if it has been allocated. We get two endpoint_disable
++ requests for ctrl endpoints so ignore the second one */
++ if(ep->hcpriv != NULL) {
++ struct crisv10_ep_priv *ep_priv = ep->hcpriv;
++ int epid = ep_priv->epid;
++ tc_warn("endpoint_disable ep:0x%x ep-priv:0x%x (%s) (epid:%d freed)\n",
++ (unsigned int)ep, (unsigned int)ep->hcpriv,
++ endpoint_to_str(&(ep->desc)), epid);
++
++ tc_sync_finish_epid(hcd, epid);
++
++ ASSERT(activeUrbList[epid] == NULL);
++ ASSERT(list_empty(&urb_list[epid]));
++
++ tc_free_epid(ep);
++ } else {
++ tc_dbg("endpoint_disable ep:0x%x ep-priv:0x%x (%s)\n", (unsigned int)ep,
++ (unsigned int)ep->hcpriv, endpoint_to_str(&(ep->desc)));
++ }
++ DBFEXIT;
++}
++
++static void tc_finish_urb_later_proc(void *data) {
++ unsigned long flags;
++ struct urb_later_data* uld = (struct urb_later_data*)data;
++ local_irq_save(flags);
++ if(uld->urb == NULL) {
++ late_dbg("Later finish of URB = NULL (allready finished)\n");
++ } else {
++ struct crisv10_urb_priv* urb_priv = uld->urb->hcpriv;
++ ASSERT(urb_priv);
++ if(urb_priv->urb_num == uld->urb_num) {
++ late_dbg("Later finish of URB:0x%x[%d]\n", (unsigned int)(uld->urb),
++ urb_priv->urb_num);
++ if(uld->status != uld->urb->status) {
++ errno_dbg("Later-finish URB with status:%d, later-status:%d\n",
++ uld->urb->status, uld->status);
++ }
++ if(uld != urb_priv->later_data) {
++ panic("Scheduled uld not same as URBs uld\n");
++ }
++ tc_finish_urb(uld->hcd, uld->urb, uld->status);
++ } else {
++ late_warn("Ignoring later finish of URB:0x%x[%d]"
++ ", urb_num doesn't match current URB:0x%x[%d]",
++ (unsigned int)(uld->urb), uld->urb_num,
++ (unsigned int)(uld->urb), urb_priv->urb_num);
++ }
++ }
++ local_irq_restore(flags);
++ kmem_cache_free(later_data_cache, uld);
++}
++
++static void tc_finish_urb_later(struct usb_hcd *hcd, struct urb *urb,
++ int status) {
++ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
++ struct urb_later_data* uld;
++
++ ASSERT(urb_priv);
++
++ if(urb_priv->later_data != NULL) {
++ /* Later-finish allready scheduled for this URB, just update status to
++ return when finishing later */
++ errno_dbg("Later-finish schedule change URB status:%d with new"
++ " status:%d\n", urb_priv->later_data->status, status);
++
++ urb_priv->later_data->status = status;
++ return;
++ }
++
++ uld = kmem_cache_alloc(later_data_cache, SLAB_ATOMIC);
++ ASSERT(uld);
++
++ uld->hcd = hcd;
++ uld->urb = urb;
++ uld->urb_num = urb_priv->urb_num;
++ uld->status = status;
++
++ INIT_WORK(&uld->ws, tc_finish_urb_later_proc, uld);
++ urb_priv->later_data = uld;
++
++ /* Schedule the finishing of the URB to happen later */
++ schedule_delayed_work(&uld->ws, LATER_TIMER_DELAY);
++}
++
++static void tc_finish_isoc_urb(struct usb_hcd *hcd, struct urb *urb,
++ int status);
++
++static void tc_finish_urb(struct usb_hcd *hcd, struct urb *urb, int status) {
++ struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(hcd);
++ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
++ int epid;
++ char toggle;
++ int urb_num;
++
++ DBFENTER;
++ ASSERT(urb_priv != NULL);
++ epid = urb_priv->epid;
++ urb_num = urb_priv->urb_num;
++
++ if(urb != activeUrbList[epid]) {
++ if(urb_list_entry(urb, epid)) {
++ /* Remove this URB from the list. Only happens when URB are finished
++ before having been processed (dequeing) */
++ urb_list_del(urb, epid);
++ } else {
++ tc_warn("Finishing of URB:0x%x[%d] neither active or in queue for"
++ " epid:%d\n", (unsigned int)urb, urb_num, epid);
++ }
++ }
++
++ /* Cancel any pending later-finish of this URB */
++ if(urb_priv->later_data) {
++ urb_priv->later_data->urb = NULL;
++ }
++
++ /* For an IN pipe, we always set the actual length, regardless of whether
++ there was an error or not (which means the device driver can use the data
++ if it wants to). */
++ if(usb_pipein(urb->pipe)) {
++ urb->actual_length = urb_priv->rx_offset;
++ } else {
++ /* Set actual_length for OUT urbs also; the USB mass storage driver seems
++ to want that. */
++ if (status == 0 && urb->status == -EINPROGRESS) {
++ urb->actual_length = urb->transfer_buffer_length;
++ } else {
++ /* We wouldn't know of any partial writes if there was an error. */
++ urb->actual_length = 0;
++ }
++ }
++
++
++ /* URB status mangling */
++ if(urb->status == -EINPROGRESS) {
++ /* The USB core hasn't changed the status, let's set our finish status */
++ urb->status = status;
++
++ if ((status == 0) && (urb->transfer_flags & URB_SHORT_NOT_OK) &&
++ usb_pipein(urb->pipe) &&
++ (urb->actual_length != urb->transfer_buffer_length)) {
++ /* URB_SHORT_NOT_OK means that short reads (shorter than the endpoint's
++ max length) is to be treated as an error. */
++ errno_dbg("Finishing URB:0x%x[%d] with SHORT_NOT_OK flag and short"
++ " data:%d\n", (unsigned int)urb, urb_num,
++ urb->actual_length);
++ urb->status = -EREMOTEIO;
++ }
++
++ if(urb_priv->urb_state == UNLINK) {
++ /* URB has been requested to be unlinked asynchronously */
++ urb->status = -ECONNRESET;
++ errno_dbg("Fixing unlink status of URB:0x%x[%d] to:%d\n",
++ (unsigned int)urb, urb_num, urb->status);
++ }
++ } else {
++ /* The USB Core wants to signal some error via the URB, pass it through */
++ }
++
++ /* use completely different finish function for Isoc URBs */
++ if(usb_pipeisoc(urb->pipe)) {
++ tc_finish_isoc_urb(hcd, urb, status);
++ return;
++ }
++
++ /* Do special unlinking of EPs for Intr traffic */
++ if(usb_pipeint(urb->pipe)) {
++ tc_dma_unlink_intr_urb(urb);
++ }
++
++ /* Release allocated bandwidth for periodic transfers */
++ if(usb_pipeint(urb->pipe) || usb_pipeisoc(urb->pipe))
++ usb_release_bandwidth(urb->dev, urb, 0);
++
++ /* This URB is active on EP */
++ if(urb == activeUrbList[epid]) {
++ /* We need to fiddle with the toggle bits because the hardware doesn't do
++ it for us. */
++ toggle = etrax_epid_get_toggle(epid, usb_pipeout(urb->pipe));
++ usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
++ usb_pipeout(urb->pipe), toggle);
++
++ /* Checks for Ctrl and Bulk EPs */
++ switch(usb_pipetype(urb->pipe)) {
++ case PIPE_BULK:
++ /* Check so Bulk EP realy is disabled before finishing active URB */
++ ASSERT((TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) ==
++ IO_STATE(USB_EP_command, enable, no));
++ /* Disable sub-pointer for EP to avoid next tx_interrupt() to
++ process Bulk EP. */
++ TxBulkEPList[epid].sub = 0;
++ /* No need to wait for the DMA before changing the next pointer.
++ The modulo NBR_OF_EPIDS isn't actually necessary, since we will never use
++ the last one (INVALID_EPID) for actual traffic. */
++ TxBulkEPList[epid].next =
++ virt_to_phys(&TxBulkEPList[(epid + 1) % NBR_OF_EPIDS]);
++ break;
++ case PIPE_CONTROL:
++ /* Check so Ctrl EP realy is disabled before finishing active URB */
++ ASSERT((TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) ==
++ IO_STATE(USB_EP_command, enable, no));
++ /* Disable sub-pointer for EP to avoid next tx_interrupt() to
++ process Ctrl EP. */
++ TxCtrlEPList[epid].sub = 0;
++ break;
++ }
++ }
++
++ /* Free HC-private URB data*/
++ urb_priv_free(hcd, urb);
++
++ if(urb->status) {
++ errno_dbg("finish_urb (URB:0x%x[%d] %s %s) (data:%d) status:%d\n",
++ (unsigned int)urb, urb_num, str_dir(urb->pipe),
++ str_type(urb->pipe), urb->actual_length, urb->status);
++ } else {
++ tc_dbg("finish_urb (URB:0x%x[%d] %s %s) (data:%d) status:%d\n",
++ (unsigned int)urb, urb_num, str_dir(urb->pipe),
++ str_type(urb->pipe), urb->actual_length, urb->status);
++ }
++
++ /* If we just finished an active URB, clear active pointer. */
++ if (urb == activeUrbList[epid]) {
++ /* Make URB not active on EP anymore */
++ activeUrbList[epid] = NULL;
++
++ if(urb->status == 0) {
++ /* URB finished sucessfully, process queue to see if there are any more
++ URBs waiting before we call completion function.*/
++ if(crisv10_hcd->running) {
++ /* Only process queue if USB controller is running */
++ tc_dma_process_queue(epid);
++ } else {
++ tc_warn("No processing of queue for epid:%d, USB Controller not"
++ " running\n", epid);
++ }
++ }
++ }
++
++ /* Hand the URB from HCD to its USB device driver, using its completion
++ functions */
++ usb_hcd_giveback_urb (hcd, urb);
++
++ /* Check the queue once more if the URB returned with error, because we
++ didn't do it before the completion function because the specification
++ states that the queue should not restart until all it's unlinked
++ URBs have been fully retired, with the completion functions run */
++ if(crisv10_hcd->running) {
++ /* Only process queue if USB controller is running */
++ tc_dma_process_queue(epid);
++ } else {
++ tc_warn("No processing of queue for epid:%d, USB Controller not running\n",
++ epid);
++ }
++
++ DBFEXIT;
++}
++
++static void tc_finish_isoc_urb(struct usb_hcd *hcd, struct urb *urb,
++ int status) {
++ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
++ int epid, i;
++ volatile int timeout = 10000;
++
++ ASSERT(urb_priv);
++ epid = urb_priv->epid;
++
++ ASSERT(usb_pipeisoc(urb->pipe));
++
++ /* Set that all isoc packets have status and length set before
++ completing the urb. */
++ for (i = urb_priv->isoc_packet_counter; i < urb->number_of_packets; i++){
++ urb->iso_frame_desc[i].actual_length = 0;
++ urb->iso_frame_desc[i].status = -EPROTO;
++ }
++
++ /* Check if the URB is currently active (done or error) */
++ if(urb == activeUrbList[epid]) {
++ /* Check if there are another In Isoc URB queued for this epid */
++ if (!list_empty(&urb_list[epid])&& !epid_state[epid].disabled) {
++ /* Move it from queue to active and mark it started so Isoc transfers
++ won't be interrupted.
++ All Isoc URBs data transfers are already added to DMA lists so we
++ don't have to insert anything in DMA lists here. */
++ activeUrbList[epid] = urb_list_first(epid);
++ ((struct crisv10_urb_priv *)(activeUrbList[epid]->hcpriv))->urb_state =
++ STARTED;
++ urb_list_del(activeUrbList[epid], epid);
++
++ if(urb->status) {
++ errno_dbg("finish_isoc_urb (URB:0x%x[%d] %s %s) (%d of %d packets)"
++ " status:%d, new waiting URB:0x%x[%d]\n",
++ (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
++ str_type(urb->pipe), urb_priv->isoc_packet_counter,
++ urb->number_of_packets, urb->status,
++ (unsigned int)activeUrbList[epid],
++ ((struct crisv10_urb_priv *)(activeUrbList[epid]->hcpriv))->urb_num);
++ }
++
++ } else { /* No other URB queued for this epid */
++ if(urb->status) {
++ errno_dbg("finish_isoc_urb (URB:0x%x[%d] %s %s) (%d of %d packets)"
++ " status:%d, no new URB waiting\n",
++ (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
++ str_type(urb->pipe), urb_priv->isoc_packet_counter,
++ urb->number_of_packets, urb->status);
++ }
++
++ /* Check if EP is still enabled, then shut it down. */
++ if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
++ isoc_dbg("Isoc EP enabled for epid:%d, disabling it\n", epid);
++
++ /* Should only occur for In Isoc EPs where SB isn't consumed. */
++ ASSERT(usb_pipein(urb->pipe));
++
++ /* Disable it and wait for it to stop */
++ TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
++
++ /* Ah, the luxury of busy-wait. */
++ while((*R_DMA_CH8_SUB3_EP == virt_to_phys(&TxIsocEPList[epid])) &&
++ (timeout-- > 0));
++ if(timeout == 0) {
++ warn("Timeout while waiting for DMA-TX-Isoc to leave EP for epid:%d\n", epid);
++ }
++ }
++
++ /* Unlink SB to say that epid is finished. */
++ TxIsocEPList[epid].sub = 0;
++ TxIsocEPList[epid].hw_len = 0;
++
++ /* No URB active for EP anymore */
++ activeUrbList[epid] = NULL;
++ }
++ } else { /* Finishing of not active URB (queued up with SBs thought) */
++ isoc_warn("finish_isoc_urb (URB:0x%x %s) (%d of %d packets) status:%d,"
++ " SB queued but not active\n",
++ (unsigned int)urb, str_dir(urb->pipe),
++ urb_priv->isoc_packet_counter, urb->number_of_packets,
++ urb->status);
++ if(usb_pipeout(urb->pipe)) {
++ /* Finishing of not yet active Out Isoc URB needs unlinking of SBs. */
++ struct USB_SB_Desc *iter_sb, *prev_sb, *next_sb;
++
++ iter_sb = TxIsocEPList[epid].sub ?
++ phys_to_virt(TxIsocEPList[epid].sub) : 0;
++ prev_sb = 0;
++
++ /* SB that is linked before this URBs first SB */
++ while (iter_sb && (iter_sb != urb_priv->first_sb)) {
++ prev_sb = iter_sb;
++ iter_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
++ }
++
++ if (iter_sb == 0) {
++ /* Unlink of the URB currently being transmitted. */
++ prev_sb = 0;
++ iter_sb = TxIsocEPList[epid].sub ? phys_to_virt(TxIsocEPList[epid].sub) : 0;
++ }
++
++ while (iter_sb && (iter_sb != urb_priv->last_sb)) {
++ iter_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
++ }
++
++ if (iter_sb) {
++ next_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
++ } else {
++ /* This should only happen if the DMA has completed
++ processing the SB list for this EP while interrupts
++ are disabled. */
++ isoc_dbg("Isoc urb not found, already sent?\n");
++ next_sb = 0;
++ }
++ if (prev_sb) {
++ prev_sb->next = next_sb ? virt_to_phys(next_sb) : 0;
++ } else {
++ TxIsocEPList[epid].sub = next_sb ? virt_to_phys(next_sb) : 0;
++ }
++ }
++ }
++
++ /* Free HC-private URB data*/
++ urb_priv_free(hcd, urb);
++
++ usb_release_bandwidth(urb->dev, urb, 0);
++
++ /* Hand the URB from HCD to its USB device driver, using its completion
++ functions */
++ usb_hcd_giveback_urb (hcd, urb);
++}
++
++static __u32 urb_num = 0;
++
++/* allocate and initialize URB private data */
++static int urb_priv_create(struct usb_hcd *hcd, struct urb *urb, int epid,
++ int mem_flags) {
++ struct crisv10_urb_priv *urb_priv;
++
++ urb_priv = kmalloc(sizeof *urb_priv, mem_flags);
++ if (!urb_priv)
++ return -ENOMEM;
++ memset(urb_priv, 0, sizeof *urb_priv);
++
++ urb_priv->epid = epid;
++ urb_priv->urb_state = NOT_STARTED;
++
++ urb->hcpriv = urb_priv;
++ /* Assign URB a sequence number, and increment counter */
++ urb_priv->urb_num = urb_num;
++ urb_num++;
++ return 0;
++}
++
++/* free URB private data */
++static void urb_priv_free(struct usb_hcd *hcd, struct urb *urb) {
++ int i;
++ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
++ ASSERT(urb_priv != 0);
++
++ /* Check it has any SBs linked that needs to be freed*/
++ if(urb_priv->first_sb != NULL) {
++ struct USB_SB_Desc *next_sb, *first_sb, *last_sb;
++ int i = 0;
++ first_sb = urb_priv->first_sb;
++ last_sb = urb_priv->last_sb;
++ ASSERT(last_sb);
++ while(first_sb != last_sb) {
++ next_sb = (struct USB_SB_Desc *)phys_to_virt(first_sb->next);
++ kmem_cache_free(usb_desc_cache, first_sb);
++ first_sb = next_sb;
++ i++;
++ }
++ kmem_cache_free(usb_desc_cache, last_sb);
++ i++;
++ }
++
++ /* Check if it has any EPs in its Intr pool that also needs to be freed */
++ if(urb_priv->intr_ep_pool_length > 0) {
++ for(i = 0; i < urb_priv->intr_ep_pool_length; i++) {
++ kfree(urb_priv->intr_ep_pool[i]);
++ }
++ /*
++ tc_dbg("Freed %d EPs from URB:0x%x EP pool\n",
++ urb_priv->intr_ep_pool_length, (unsigned int)urb);
++ */
++ }
++
++ kfree(urb_priv);
++ urb->hcpriv = NULL;
++}
++
++static int ep_priv_create(struct usb_host_endpoint *ep, int mem_flags) {
++ struct crisv10_ep_priv *ep_priv;
++
++ ep_priv = kmalloc(sizeof *ep_priv, mem_flags);
++ if (!ep_priv)
++ return -ENOMEM;
++ memset(ep_priv, 0, sizeof *ep_priv);
++
++ ep->hcpriv = ep_priv;
++ return 0;
++}
++
++static void ep_priv_free(struct usb_host_endpoint *ep) {
++ struct crisv10_ep_priv *ep_priv = ep->hcpriv;
++ ASSERT(ep_priv);
++ kfree(ep_priv);
++ ep->hcpriv = NULL;
++}
++
++/* EPID handling functions, managing EP-list in Etrax through wrappers */
++/* ------------------------------------------------------------------- */
++
++/* Sets up a new EPID for an endpoint or returns existing if found */
++static int tc_setup_epid(struct usb_host_endpoint *ep, struct urb *urb,
++ int mem_flags) {
++ int epid;
++ char devnum, endpoint, out_traffic, slow;
++ int maxlen;
++ __u32 epid_data;
++ struct crisv10_ep_priv *ep_priv = ep->hcpriv;
++
++ DBFENTER;
++
++ /* Check if a valid epid already is setup for this endpoint */
++ if(ep_priv != NULL) {
++ return ep_priv->epid;
++ }
++
++ /* We must find and initiate a new epid for this urb. */
++ epid = tc_allocate_epid();
++
++ if (epid == -1) {
++ /* Failed to allocate a new epid. */
++ DBFEXIT;
++ return epid;
++ }
++
++ /* We now have a new epid to use. Claim it. */
++ epid_state[epid].inuse = 1;
++
++ /* Init private data for new endpoint */
++ if(ep_priv_create(ep, mem_flags) != 0) {
++ return -ENOMEM;
++ }
++ ep_priv = ep->hcpriv;
++ ep_priv->epid = epid;
++
++ devnum = usb_pipedevice(urb->pipe);
++ endpoint = usb_pipeendpoint(urb->pipe);
++ slow = (urb->dev->speed == USB_SPEED_LOW);
++ maxlen = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
++
++ if (usb_pipetype(urb->pipe) == PIPE_CONTROL) {
++ /* We want both IN and OUT control traffic to be put on the same
++ EP/SB list. */
++ out_traffic = 1;
++ } else {
++ out_traffic = usb_pipeout(urb->pipe);
++ }
++
++ if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
++ epid_data = IO_STATE(R_USB_EPT_DATA_ISO, valid, yes) |
++ /* FIXME: Change any to the actual port? */
++ IO_STATE(R_USB_EPT_DATA_ISO, port, any) |
++ IO_FIELD(R_USB_EPT_DATA_ISO, max_len, maxlen) |
++ IO_FIELD(R_USB_EPT_DATA_ISO, ep, endpoint) |
++ IO_FIELD(R_USB_EPT_DATA_ISO, dev, devnum);
++ etrax_epid_iso_set(epid, epid_data);
++ } else {
++ epid_data = IO_STATE(R_USB_EPT_DATA, valid, yes) |
++ IO_FIELD(R_USB_EPT_DATA, low_speed, slow) |
++ /* FIXME: Change any to the actual port? */
++ IO_STATE(R_USB_EPT_DATA, port, any) |
++ IO_FIELD(R_USB_EPT_DATA, max_len, maxlen) |
++ IO_FIELD(R_USB_EPT_DATA, ep, endpoint) |
++ IO_FIELD(R_USB_EPT_DATA, dev, devnum);
++ etrax_epid_set(epid, epid_data);
++ }
++
++ epid_state[epid].out_traffic = out_traffic;
++ epid_state[epid].type = usb_pipetype(urb->pipe);
++
++ tc_warn("Setting up ep:0x%x epid:%d (addr:%d endp:%d max_len:%d %s %s %s)\n",
++ (unsigned int)ep, epid, devnum, endpoint, maxlen,
++ str_type(urb->pipe), out_traffic ? "out" : "in",
++ slow ? "low" : "full");
++
++ /* Enable Isoc eof interrupt if we set up the first Isoc epid */
++ if(usb_pipeisoc(urb->pipe)) {
++ isoc_epid_counter++;
++ if(isoc_epid_counter == 1) {
++ isoc_warn("Enabled Isoc eof interrupt\n");
++ *R_USB_IRQ_MASK_SET |= IO_STATE(R_USB_IRQ_MASK_SET, iso_eof, set);
++ }
++ }
++
++ DBFEXIT;
++ return epid;
++}
++
++static void tc_free_epid(struct usb_host_endpoint *ep) {
++ unsigned long flags;
++ struct crisv10_ep_priv *ep_priv = ep->hcpriv;
++ int epid;
++ volatile int timeout = 10000;
++
++ DBFENTER;
++
++ if (ep_priv == NULL) {
++ tc_warn("Trying to free unused epid on ep:0x%x\n", (unsigned int)ep);
++ DBFEXIT;
++ return;
++ }
++
++ epid = ep_priv->epid;
++
++ /* Disable Isoc eof interrupt if we free the last Isoc epid */
++ if(epid_isoc(epid)) {
++ ASSERT(isoc_epid_counter > 0);
++ isoc_epid_counter--;
++ if(isoc_epid_counter == 0) {
++ *R_USB_IRQ_MASK_SET &= ~IO_STATE(R_USB_IRQ_MASK_SET, iso_eof, set);
++ isoc_warn("Disabled Isoc eof interrupt\n");
++ }
++ }
++
++ /* Take lock manualy instead of in epid_x_x wrappers,
++ because we need to be polling here */
++ spin_lock_irqsave(&etrax_epid_lock, flags);
++
++ *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
++ nop();
++ while((*R_USB_EPT_DATA & IO_MASK(R_USB_EPT_DATA, hold)) &&
++ (timeout-- > 0));
++ if(timeout == 0) {
++ warn("Timeout while waiting for epid:%d to drop hold\n", epid);
++ }
++ /* This will, among other things, set the valid field to 0. */
++ *R_USB_EPT_DATA = 0;
++ spin_unlock_irqrestore(&etrax_epid_lock, flags);
++
++ /* Free resource in software state info list */
++ epid_state[epid].inuse = 0;
++
++ /* Free private endpoint data */
++ ep_priv_free(ep);
++
++ DBFEXIT;
++}
++
++static int tc_allocate_epid(void) {
++ int i;
++ DBFENTER;
++ for (i = 0; i < NBR_OF_EPIDS; i++) {
++ if (!epid_inuse(i)) {
++ DBFEXIT;
++ return i;
++ }
++ }
++
++ tc_warn("Found no free epids\n");
++ DBFEXIT;
++ return -1;
++}
++
++
++/* Wrappers around the list functions (include/linux/list.h). */
++/* ---------------------------------------------------------- */
++static inline int __urb_list_empty(int epid) {
++ int retval;
++ retval = list_empty(&urb_list[epid]);
++ return retval;
++}
++
++/* Returns first urb for this epid, or NULL if list is empty. */
++static inline struct urb *urb_list_first(int epid) {
++ unsigned long flags;
++ struct urb *first_urb = 0;
++ spin_lock_irqsave(&urb_list_lock, flags);
++ if (!__urb_list_empty(epid)) {
++ /* Get the first urb (i.e. head->next). */
++ urb_entry_t *urb_entry = list_entry((&urb_list[epid])->next, urb_entry_t, list);
++ first_urb = urb_entry->urb;
++ }
++ spin_unlock_irqrestore(&urb_list_lock, flags);
++ return first_urb;
++}
++
++/* Adds an urb_entry last in the list for this epid. */
++static inline void urb_list_add(struct urb *urb, int epid, int mem_flags) {
++ unsigned long flags;
++ urb_entry_t *urb_entry = (urb_entry_t *)kmalloc(sizeof(urb_entry_t), mem_flags);
++ ASSERT(urb_entry);
++
++ urb_entry->urb = urb;
++ spin_lock_irqsave(&urb_list_lock, flags);
++ list_add_tail(&urb_entry->list, &urb_list[epid]);
++ spin_unlock_irqrestore(&urb_list_lock, flags);
++}
++
++/* Search through the list for an element that contains this urb. (The list
++ is expected to be short and the one we are about to delete will often be
++ the first in the list.)
++ Should be protected by spin_locks in calling function */
++static inline urb_entry_t *__urb_list_entry(struct urb *urb, int epid) {
++ struct list_head *entry;
++ struct list_head *tmp;
++ urb_entry_t *urb_entry;
++
++ list_for_each_safe(entry, tmp, &urb_list[epid]) {
++ urb_entry = list_entry(entry, urb_entry_t, list);
++ ASSERT(urb_entry);
++ ASSERT(urb_entry->urb);
++
++ if (urb_entry->urb == urb) {
++ return urb_entry;
++ }
++ }
++ return 0;
++}
++
++/* Same function as above but for global use. Protects list by spinlock */
++static inline urb_entry_t *urb_list_entry(struct urb *urb, int epid) {
++ unsigned long flags;
++ urb_entry_t *urb_entry;
++ spin_lock_irqsave(&urb_list_lock, flags);
++ urb_entry = __urb_list_entry(urb, epid);
++ spin_unlock_irqrestore(&urb_list_lock, flags);
++ return (urb_entry);
++}
++
++/* Delete an urb from the list. */
++static inline void urb_list_del(struct urb *urb, int epid) {
++ unsigned long flags;
++ urb_entry_t *urb_entry;
++
++ /* Delete entry and free. */
++ spin_lock_irqsave(&urb_list_lock, flags);
++ urb_entry = __urb_list_entry(urb, epid);
++ ASSERT(urb_entry);
++
++ list_del(&urb_entry->list);
++ spin_unlock_irqrestore(&urb_list_lock, flags);
++ kfree(urb_entry);
++}
++
++/* Move an urb to the end of the list. */
++static inline void urb_list_move_last(struct urb *urb, int epid) {
++ unsigned long flags;
++ urb_entry_t *urb_entry;
++
++ spin_lock_irqsave(&urb_list_lock, flags);
++ urb_entry = __urb_list_entry(urb, epid);
++ ASSERT(urb_entry);
++
++ list_del(&urb_entry->list);
++ list_add_tail(&urb_entry->list, &urb_list[epid]);
++ spin_unlock_irqrestore(&urb_list_lock, flags);
++}
++
++/* Get the next urb in the list. */
++static inline struct urb *urb_list_next(struct urb *urb, int epid) {
++ unsigned long flags;
++ urb_entry_t *urb_entry;
++
++ spin_lock_irqsave(&urb_list_lock, flags);
++ urb_entry = __urb_list_entry(urb, epid);
++ ASSERT(urb_entry);
++
++ if (urb_entry->list.next != &urb_list[epid]) {
++ struct list_head *elem = urb_entry->list.next;
++ urb_entry = list_entry(elem, urb_entry_t, list);
++ spin_unlock_irqrestore(&urb_list_lock, flags);
++ return urb_entry->urb;
++ } else {
++ spin_unlock_irqrestore(&urb_list_lock, flags);
++ return NULL;
++ }
++}
++
++struct USB_EP_Desc* create_ep(int epid, struct USB_SB_Desc* sb_desc,
++ int mem_flags) {
++ struct USB_EP_Desc *ep_desc;
++ ep_desc = (struct USB_EP_Desc *) kmem_cache_alloc(usb_desc_cache, mem_flags);
++ if(ep_desc == NULL)
++ return NULL;
++ memset(ep_desc, 0, sizeof(struct USB_EP_Desc));
++
++ ep_desc->hw_len = 0;
++ ep_desc->command = (IO_FIELD(USB_EP_command, epid, epid) |
++ IO_STATE(USB_EP_command, enable, yes));
++ if(sb_desc == NULL) {
++ ep_desc->sub = 0;
++ } else {
++ ep_desc->sub = virt_to_phys(sb_desc);
++ }
++ return ep_desc;
++}
++
++#define TT_ZOUT 0
++#define TT_IN 1
++#define TT_OUT 2
++#define TT_SETUP 3
++
++#define CMD_EOL IO_STATE(USB_SB_command, eol, yes)
++#define CMD_INTR IO_STATE(USB_SB_command, intr, yes)
++#define CMD_FULL IO_STATE(USB_SB_command, full, yes)
++
++/* Allocation and setup of a generic SB. Used to create SETUP, OUT and ZOUT
++ SBs. Also used by create_sb_in() to avoid same allocation procedure at two
++ places */
++struct USB_SB_Desc* create_sb(struct USB_SB_Desc* sb_prev, int tt, void* data,
++ int datalen, int mem_flags) {
++ struct USB_SB_Desc *sb_desc;
++ sb_desc = (struct USB_SB_Desc*)kmem_cache_alloc(usb_desc_cache, mem_flags);
++ if(sb_desc == NULL)
++ return NULL;
++ memset(sb_desc, 0, sizeof(struct USB_SB_Desc));
++
++ sb_desc->command = IO_FIELD(USB_SB_command, tt, tt) |
++ IO_STATE(USB_SB_command, eot, yes);
++
++ sb_desc->sw_len = datalen;
++ if(data != NULL) {
++ sb_desc->buf = virt_to_phys(data);
++ } else {
++ sb_desc->buf = 0;
++ }
++ if(sb_prev != NULL) {
++ sb_prev->next = virt_to_phys(sb_desc);
++ }
++ return sb_desc;
++}
++
++/* Creates a copy of an existing SB by allocation space for it and copy
++ settings */
++struct USB_SB_Desc* create_sb_copy(struct USB_SB_Desc* sb_orig, int mem_flags) {
++ struct USB_SB_Desc *sb_desc;
++ sb_desc = (struct USB_SB_Desc*)kmem_cache_alloc(usb_desc_cache, mem_flags);
++ if(sb_desc == NULL)
++ return NULL;
++
++ memcpy(sb_desc, sb_orig, sizeof(struct USB_SB_Desc));
++ return sb_desc;
++}
++
++/* A specific create_sb function for creation of in SBs. This is due to
++ that datalen in In SBs shows how many packets we are expecting. It also
++ sets up the rem field to show if how many bytes we expect in last packet
++ if it's not a full one */
++struct USB_SB_Desc* create_sb_in(struct USB_SB_Desc* sb_prev, int datalen,
++ int maxlen, int mem_flags) {
++ struct USB_SB_Desc *sb_desc;
++ sb_desc = create_sb(sb_prev, TT_IN, NULL,
++ datalen ? (datalen - 1) / maxlen + 1 : 0, mem_flags);
++ if(sb_desc == NULL)
++ return NULL;
++ sb_desc->command |= IO_FIELD(USB_SB_command, rem, datalen % maxlen);
++ return sb_desc;
++}
++
++void set_sb_cmds(struct USB_SB_Desc *sb_desc, __u16 flags) {
++ sb_desc->command |= flags;
++}
++
++int create_sb_for_urb(struct urb *urb, int mem_flags) {
++ int is_out = !usb_pipein(urb->pipe);
++ int type = usb_pipetype(urb->pipe);
++ int maxlen = usb_maxpacket(urb->dev, urb->pipe, is_out);
++ int buf_len = urb->transfer_buffer_length;
++ void *buf = buf_len > 0 ? urb->transfer_buffer : NULL;
++ struct USB_SB_Desc *sb_desc = NULL;
++
++ struct crisv10_urb_priv *urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
++ ASSERT(urb_priv != NULL);
++
++ switch(type) {
++ case PIPE_CONTROL:
++ /* Setup stage */
++ sb_desc = create_sb(NULL, TT_SETUP, urb->setup_packet, 8, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++ set_sb_cmds(sb_desc, CMD_FULL);
++
++ /* Attach first SB to URB */
++ urb_priv->first_sb = sb_desc;
++
++ if (is_out) { /* Out Control URB */
++ /* If this Control OUT transfer has an optional data stage we add
++ an OUT token before the mandatory IN (status) token */
++ if ((buf_len > 0) && buf) {
++ sb_desc = create_sb(sb_desc, TT_OUT, buf, buf_len, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++ set_sb_cmds(sb_desc, CMD_FULL);
++ }
++
++ /* Status stage */
++ /* The data length has to be exactly 1. This is due to a requirement
++ of the USB specification that a host must be prepared to receive
++ data in the status phase */
++ sb_desc = create_sb(sb_desc, TT_IN, NULL, 1, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++ } else { /* In control URB */
++ /* Data stage */
++ sb_desc = create_sb_in(sb_desc, buf_len, maxlen, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++
++ /* Status stage */
++ /* Read comment at zout_buffer declaration for an explanation to this. */
++ sb_desc = create_sb(sb_desc, TT_ZOUT, &zout_buffer[0], 1, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++ /* Set descriptor interrupt flag for in URBs so we can finish URB after
++ zout-packet has been sent */
++ set_sb_cmds(sb_desc, CMD_INTR | CMD_FULL);
++ }
++ /* Set end-of-list flag in last SB */
++ set_sb_cmds(sb_desc, CMD_EOL);
++ /* Attach last SB to URB */
++ urb_priv->last_sb = sb_desc;
++ break;
++
++ case PIPE_BULK:
++ if (is_out) { /* Out Bulk URB */
++ sb_desc = create_sb(NULL, TT_OUT, buf, buf_len, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++ /* The full field is set to yes, even if we don't actually check that
++ this is a full-length transfer (i.e., that transfer_buffer_length %
++ maxlen = 0).
++ Setting full prevents the USB controller from sending an empty packet
++ in that case. However, if URB_ZERO_PACKET was set we want that. */
++ if (!(urb->transfer_flags & URB_ZERO_PACKET)) {
++ set_sb_cmds(sb_desc, CMD_FULL);
++ }
++ } else { /* In Bulk URB */
++ sb_desc = create_sb_in(NULL, buf_len, maxlen, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++ }
++ /* Set end-of-list flag for last SB */
++ set_sb_cmds(sb_desc, CMD_EOL);
++
++ /* Attach SB to URB */
++ urb_priv->first_sb = sb_desc;
++ urb_priv->last_sb = sb_desc;
++ break;
++
++ case PIPE_INTERRUPT:
++ if(is_out) { /* Out Intr URB */
++ sb_desc = create_sb(NULL, TT_OUT, buf, buf_len, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++
++ /* The full field is set to yes, even if we don't actually check that
++ this is a full-length transfer (i.e., that transfer_buffer_length %
++ maxlen = 0).
++ Setting full prevents the USB controller from sending an empty packet
++ in that case. However, if URB_ZERO_PACKET was set we want that. */
++ if (!(urb->transfer_flags & URB_ZERO_PACKET)) {
++ set_sb_cmds(sb_desc, CMD_FULL);
++ }
++ /* Only generate TX interrupt if it's a Out URB*/
++ set_sb_cmds(sb_desc, CMD_INTR);
++
++ } else { /* In Intr URB */
++ sb_desc = create_sb_in(NULL, buf_len, maxlen, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++ }
++ /* Set end-of-list flag for last SB */
++ set_sb_cmds(sb_desc, CMD_EOL);
++
++ /* Attach SB to URB */
++ urb_priv->first_sb = sb_desc;
++ urb_priv->last_sb = sb_desc;
++
++ break;
++ case PIPE_ISOCHRONOUS:
++ if(is_out) { /* Out Isoc URB */
++ int i;
++ if(urb->number_of_packets == 0) {
++ tc_err("Can't create SBs for Isoc URB with zero packets\n");
++ return -EPIPE;
++ }
++ /* Create one SB descriptor for each packet and link them together. */
++ for(i = 0; i < urb->number_of_packets; i++) {
++ if (urb->iso_frame_desc[i].length > 0) {
++
++ sb_desc = create_sb(sb_desc, TT_OUT, urb->transfer_buffer +
++ urb->iso_frame_desc[i].offset,
++ urb->iso_frame_desc[i].length, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++
++ /* Check if it's a full length packet */
++ if (urb->iso_frame_desc[i].length ==
++ usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe))) {
++ set_sb_cmds(sb_desc, CMD_FULL);
++ }
++
++ } else { /* zero length packet */
++ sb_desc = create_sb(sb_desc, TT_ZOUT, &zout_buffer[0], 1, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++ set_sb_cmds(sb_desc, CMD_FULL);
++ }
++ /* Attach first SB descriptor to URB */
++ if (i == 0) {
++ urb_priv->first_sb = sb_desc;
++ }
++ }
++ /* Set interrupt and end-of-list flags in last SB */
++ set_sb_cmds(sb_desc, CMD_INTR | CMD_EOL);
++ /* Attach last SB descriptor to URB */
++ urb_priv->last_sb = sb_desc;
++ tc_dbg("Created %d out SBs for Isoc URB:0x%x\n",
++ urb->number_of_packets, (unsigned int)urb);
++ } else { /* In Isoc URB */
++ /* Actual number of packets is not relevant for periodic in traffic as
++ long as it is more than zero. Set to 1 always. */
++ sb_desc = create_sb(sb_desc, TT_IN, NULL, 1, mem_flags);
++ if(sb_desc == NULL)
++ return -ENOMEM;
++ /* Set end-of-list flags for SB */
++ set_sb_cmds(sb_desc, CMD_EOL);
++
++ /* Attach SB to URB */
++ urb_priv->first_sb = sb_desc;
++ urb_priv->last_sb = sb_desc;
++ }
++ break;
++ default:
++ tc_err("Unknown pipe-type\n");
++ return -EPIPE;
++ break;
++ }
++ return 0;
++}
++
++int init_intr_urb(struct urb *urb, int mem_flags) {
++ struct crisv10_urb_priv *urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
++ struct USB_EP_Desc* ep_desc;
++ int interval;
++ int i;
++ int ep_count;
++
++ ASSERT(urb_priv != NULL);
++ ASSERT(usb_pipeint(urb->pipe));
++ /* We can't support interval longer than amount of eof descriptors in
++ TxIntrEPList */
++ if(urb->interval > MAX_INTR_INTERVAL) {
++ tc_err("Interrupt interval %dms too big (max: %dms)\n", urb->interval,
++ MAX_INTR_INTERVAL);
++ return -EINVAL;
++ }
++
++ /* We assume that the SB descriptors already have been setup */
++ ASSERT(urb_priv->first_sb != NULL);
++
++ /* Round of the interval to 2^n, it is obvious that this code favours
++ smaller numbers, but that is actually a good thing */
++ /* FIXME: The "rounding error" for larger intervals will be quite
++ large. For in traffic this shouldn't be a problem since it will only
++ mean that we "poll" more often. */
++ interval = urb->interval;
++ for (i = 0; interval; i++) {
++ interval = interval >> 1;
++ }
++ urb_priv->interval = 1 << (i - 1);
++
++ /* We can only have max interval for Out Interrupt due to that we can only
++ handle one linked in EP for a certain epid in the Intr descr array at the
++ time. The USB Controller in the Etrax 100LX continues to process Intr EPs
++ so we have no way of knowing which one that caused the actual transfer if
++ we have several linked in. */
++ if(usb_pipeout(urb->pipe)) {
++ urb_priv->interval = MAX_INTR_INTERVAL;
++ }
++
++ /* Calculate amount of EPs needed */
++ ep_count = MAX_INTR_INTERVAL / urb_priv->interval;
++
++ for(i = 0; i < ep_count; i++) {
++ ep_desc = create_ep(urb_priv->epid, urb_priv->first_sb, mem_flags);
++ if(ep_desc == NULL) {
++ /* Free any descriptors that we may have allocated before failure */
++ while(i > 0) {
++ i--;
++ kfree(urb_priv->intr_ep_pool[i]);
++ }
++ return -ENOMEM;
++ }
++ urb_priv->intr_ep_pool[i] = ep_desc;
++ }
++ urb_priv->intr_ep_pool_length = ep_count;
++ return 0;
++}
++
++/* DMA RX/TX functions */
++/* ----------------------- */
++
++static void tc_dma_init_rx_list(void) {
++ int i;
++
++ /* Setup descriptor list except last one */
++ for (i = 0; i < (NBR_OF_RX_DESC - 1); i++) {
++ RxDescList[i].sw_len = RX_DESC_BUF_SIZE;
++ RxDescList[i].command = 0;
++ RxDescList[i].next = virt_to_phys(&RxDescList[i + 1]);
++ RxDescList[i].buf = virt_to_phys(RxBuf + (i * RX_DESC_BUF_SIZE));
++ RxDescList[i].hw_len = 0;
++ RxDescList[i].status = 0;
++
++ /* DMA IN cache bug. (struct etrax_dma_descr has the same layout as
++ USB_IN_Desc for the relevant fields.) */
++ prepare_rx_descriptor((struct etrax_dma_descr*)&RxDescList[i]);
++
++ }
++ /* Special handling of last descriptor */
++ RxDescList[i].sw_len = RX_DESC_BUF_SIZE;
++ RxDescList[i].command = IO_STATE(USB_IN_command, eol, yes);
++ RxDescList[i].next = virt_to_phys(&RxDescList[0]);
++ RxDescList[i].buf = virt_to_phys(RxBuf + (i * RX_DESC_BUF_SIZE));
++ RxDescList[i].hw_len = 0;
++ RxDescList[i].status = 0;
++
++ /* Setup list pointers that show progress in list */
++ myNextRxDesc = &RxDescList[0];
++ myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
++
++ flush_etrax_cache();
++ /* Point DMA to first descriptor in list and start it */
++ *R_DMA_CH9_FIRST = virt_to_phys(myNextRxDesc);
++ *R_DMA_CH9_CMD = IO_STATE(R_DMA_CH9_CMD, cmd, start);
++}
++
++
++static void tc_dma_init_tx_bulk_list(void) {
++ int i;
++ volatile struct USB_EP_Desc *epDescr;
++
++ for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
++ epDescr = &(TxBulkEPList[i]);
++ CHECK_ALIGN(epDescr);
++ epDescr->hw_len = 0;
++ epDescr->command = IO_FIELD(USB_EP_command, epid, i);
++ epDescr->sub = 0;
++ epDescr->next = virt_to_phys(&TxBulkEPList[i + 1]);
++
++ /* Initiate two EPs, disabled and with the eol flag set. No need for any
++ preserved epid. */
++
++ /* The first one has the intr flag set so we get an interrupt when the DMA
++ channel is about to become disabled. */
++ CHECK_ALIGN(&TxBulkDummyEPList[i][0]);
++ TxBulkDummyEPList[i][0].hw_len = 0;
++ TxBulkDummyEPList[i][0].command = (IO_FIELD(USB_EP_command, epid, DUMMY_EPID) |
++ IO_STATE(USB_EP_command, eol, yes) |
++ IO_STATE(USB_EP_command, intr, yes));
++ TxBulkDummyEPList[i][0].sub = 0;
++ TxBulkDummyEPList[i][0].next = virt_to_phys(&TxBulkDummyEPList[i][1]);
++
++ /* The second one. */
++ CHECK_ALIGN(&TxBulkDummyEPList[i][1]);
++ TxBulkDummyEPList[i][1].hw_len = 0;
++ TxBulkDummyEPList[i][1].command = (IO_FIELD(USB_EP_command, epid, DUMMY_EPID) |
++ IO_STATE(USB_EP_command, eol, yes));
++ TxBulkDummyEPList[i][1].sub = 0;
++ /* The last dummy's next pointer is the same as the current EP's next pointer. */
++ TxBulkDummyEPList[i][1].next = virt_to_phys(&TxBulkEPList[i + 1]);
++ }
++
++ /* Special handling of last descr in list, make list circular */
++ epDescr = &TxBulkEPList[i];
++ CHECK_ALIGN(epDescr);
++ epDescr->hw_len = 0;
++ epDescr->command = IO_STATE(USB_EP_command, eol, yes) |
++ IO_FIELD(USB_EP_command, epid, i);
++ epDescr->sub = 0;
++ epDescr->next = virt_to_phys(&TxBulkEPList[0]);
++
++ /* Init DMA sub-channel pointers to last item in each list */
++ *R_DMA_CH8_SUB0_EP = virt_to_phys(&TxBulkEPList[i]);
++ /* No point in starting the bulk channel yet.
++ *R_DMA_CH8_SUB0_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start); */
++}
++
++static void tc_dma_init_tx_ctrl_list(void) {
++ int i;
++ volatile struct USB_EP_Desc *epDescr;
++
++ for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
++ epDescr = &(TxCtrlEPList[i]);
++ CHECK_ALIGN(epDescr);
++ epDescr->hw_len = 0;
++ epDescr->command = IO_FIELD(USB_EP_command, epid, i);
++ epDescr->sub = 0;
++ epDescr->next = virt_to_phys(&TxCtrlEPList[i + 1]);
++ }
++ /* Special handling of last descr in list, make list circular */
++ epDescr = &TxCtrlEPList[i];
++ CHECK_ALIGN(epDescr);
++ epDescr->hw_len = 0;
++ epDescr->command = IO_STATE(USB_EP_command, eol, yes) |
++ IO_FIELD(USB_EP_command, epid, i);
++ epDescr->sub = 0;
++ epDescr->next = virt_to_phys(&TxCtrlEPList[0]);
++
++ /* Init DMA sub-channel pointers to last item in each list */
++ *R_DMA_CH8_SUB1_EP = virt_to_phys(&TxCtrlEPList[i]);
++ /* No point in starting the ctrl channel yet.
++ *R_DMA_CH8_SUB1_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start); */
++}
++
++
++static void tc_dma_init_tx_intr_list(void) {
++ int i;
++
++ TxIntrSB_zout.sw_len = 1;
++ TxIntrSB_zout.next = 0;
++ TxIntrSB_zout.buf = virt_to_phys(&zout_buffer[0]);
++ TxIntrSB_zout.command = (IO_FIELD(USB_SB_command, rem, 0) |
++ IO_STATE(USB_SB_command, tt, zout) |
++ IO_STATE(USB_SB_command, full, yes) |
++ IO_STATE(USB_SB_command, eot, yes) |
++ IO_STATE(USB_SB_command, eol, yes));
++
++ for (i = 0; i < (MAX_INTR_INTERVAL - 1); i++) {
++ CHECK_ALIGN(&TxIntrEPList[i]);
++ TxIntrEPList[i].hw_len = 0;
++ TxIntrEPList[i].command =
++ (IO_STATE(USB_EP_command, eof, yes) |
++ IO_STATE(USB_EP_command, enable, yes) |
++ IO_FIELD(USB_EP_command, epid, INVALID_EPID));
++ TxIntrEPList[i].sub = virt_to_phys(&TxIntrSB_zout);
++ TxIntrEPList[i].next = virt_to_phys(&TxIntrEPList[i + 1]);
++ }
++
++ /* Special handling of last descr in list, make list circular */
++ CHECK_ALIGN(&TxIntrEPList[i]);
++ TxIntrEPList[i].hw_len = 0;
++ TxIntrEPList[i].command =
++ (IO_STATE(USB_EP_command, eof, yes) |
++ IO_STATE(USB_EP_command, eol, yes) |
++ IO_STATE(USB_EP_command, enable, yes) |
++ IO_FIELD(USB_EP_command, epid, INVALID_EPID));
++ TxIntrEPList[i].sub = virt_to_phys(&TxIntrSB_zout);
++ TxIntrEPList[i].next = virt_to_phys(&TxIntrEPList[0]);
++
++ intr_dbg("Initiated Intr EP descriptor list\n");
++
++
++ /* Connect DMA 8 sub-channel 2 to first in list */
++ *R_DMA_CH8_SUB2_EP = virt_to_phys(&TxIntrEPList[0]);
++}
++
++static void tc_dma_init_tx_isoc_list(void) {
++ int i;
++
++ DBFENTER;
++
++ /* Read comment at zout_buffer declaration for an explanation to this. */
++ TxIsocSB_zout.sw_len = 1;
++ TxIsocSB_zout.next = 0;
++ TxIsocSB_zout.buf = virt_to_phys(&zout_buffer[0]);
++ TxIsocSB_zout.command = (IO_FIELD(USB_SB_command, rem, 0) |
++ IO_STATE(USB_SB_command, tt, zout) |
++ IO_STATE(USB_SB_command, full, yes) |
++ IO_STATE(USB_SB_command, eot, yes) |
++ IO_STATE(USB_SB_command, eol, yes));
++
++ /* The last isochronous EP descriptor is a dummy. */
++ for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
++ CHECK_ALIGN(&TxIsocEPList[i]);
++ TxIsocEPList[i].hw_len = 0;
++ TxIsocEPList[i].command = IO_FIELD(USB_EP_command, epid, i);
++ TxIsocEPList[i].sub = 0;
++ TxIsocEPList[i].next = virt_to_phys(&TxIsocEPList[i + 1]);
++ }
++
++ CHECK_ALIGN(&TxIsocEPList[i]);
++ TxIsocEPList[i].hw_len = 0;
++
++ /* Must enable the last EP descr to get eof interrupt. */
++ TxIsocEPList[i].command = (IO_STATE(USB_EP_command, enable, yes) |
++ IO_STATE(USB_EP_command, eof, yes) |
++ IO_STATE(USB_EP_command, eol, yes) |
++ IO_FIELD(USB_EP_command, epid, INVALID_EPID));
++ TxIsocEPList[i].sub = virt_to_phys(&TxIsocSB_zout);
++ TxIsocEPList[i].next = virt_to_phys(&TxIsocEPList[0]);
++
++ *R_DMA_CH8_SUB3_EP = virt_to_phys(&TxIsocEPList[0]);
++ *R_DMA_CH8_SUB3_CMD = IO_STATE(R_DMA_CH8_SUB3_CMD, cmd, start);
++}
++
++static int tc_dma_init(struct usb_hcd *hcd) {
++ tc_dma_init_rx_list();
++ tc_dma_init_tx_bulk_list();
++ tc_dma_init_tx_ctrl_list();
++ tc_dma_init_tx_intr_list();
++ tc_dma_init_tx_isoc_list();
++
++ if (cris_request_dma(USB_TX_DMA_NBR,
++ "ETRAX 100LX built-in USB (Tx)",
++ DMA_VERBOSE_ON_ERROR,
++ dma_usb)) {
++ err("Could not allocate DMA ch 8 for USB");
++ return -EBUSY;
++ }
++
++ if (cris_request_dma(USB_RX_DMA_NBR,
++ "ETRAX 100LX built-in USB (Rx)",
++ DMA_VERBOSE_ON_ERROR,
++ dma_usb)) {
++ err("Could not allocate DMA ch 9 for USB");
++ return -EBUSY;
++ }
++
++ *R_IRQ_MASK2_SET =
++ /* Note that these interrupts are not used. */
++ IO_STATE(R_IRQ_MASK2_SET, dma8_sub0_descr, set) |
++ /* Sub channel 1 (ctrl) descr. interrupts are used. */
++ IO_STATE(R_IRQ_MASK2_SET, dma8_sub1_descr, set) |
++ IO_STATE(R_IRQ_MASK2_SET, dma8_sub2_descr, set) |
++ /* Sub channel 3 (isoc) descr. interrupts are used. */
++ IO_STATE(R_IRQ_MASK2_SET, dma8_sub3_descr, set);
++
++ /* Note that the dma9_descr interrupt is not used. */
++ *R_IRQ_MASK2_SET =
++ IO_STATE(R_IRQ_MASK2_SET, dma9_eop, set) |
++ IO_STATE(R_IRQ_MASK2_SET, dma9_descr, set);
++
++ if (request_irq(ETRAX_USB_RX_IRQ, tc_dma_rx_interrupt, 0,
++ "ETRAX 100LX built-in USB (Rx)", hcd)) {
++ err("Could not allocate IRQ %d for USB", ETRAX_USB_RX_IRQ);
++ return -EBUSY;
++ }
++
++ if (request_irq(ETRAX_USB_TX_IRQ, tc_dma_tx_interrupt, 0,
++ "ETRAX 100LX built-in USB (Tx)", hcd)) {
++ err("Could not allocate IRQ %d for USB", ETRAX_USB_TX_IRQ);
++ return -EBUSY;
++ }
++
++ return 0;
++}
++
++static void tc_dma_destroy(void) {
++ free_irq(ETRAX_USB_RX_IRQ, NULL);
++ free_irq(ETRAX_USB_TX_IRQ, NULL);
++
++ cris_free_dma(USB_TX_DMA_NBR, "ETRAX 100LX built-in USB (Tx)");
++ cris_free_dma(USB_RX_DMA_NBR, "ETRAX 100LX built-in USB (Rx)");
++
++}
++
++static void tc_dma_link_intr_urb(struct urb *urb);
++
++/* Handle processing of Bulk, Ctrl and Intr queues */
++static void tc_dma_process_queue(int epid) {
++ struct urb *urb;
++ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
++ unsigned long flags;
++ char toggle;
++
++ if(epid_state[epid].disabled) {
++ /* Don't process any URBs on a disabled endpoint */
++ return;
++ }
++
++ /* Do not disturb us while fiddling with EPs and epids */
++ local_irq_save(flags);
++
++ /* For bulk, Ctrl and Intr can we only have one URB active at a time for
++ a specific EP. */
++ if(activeUrbList[epid] != NULL) {
++ /* An URB is already active on EP, skip checking queue */
++ local_irq_restore(flags);
++ return;
++ }
++
++ urb = urb_list_first(epid);
++ if(urb == NULL) {
++ /* No URB waiting in EP queue. Nothing do to */
++ local_irq_restore(flags);
++ return;
++ }
++
++ urb_priv = urb->hcpriv;
++ ASSERT(urb_priv != NULL);
++ ASSERT(urb_priv->urb_state == NOT_STARTED);
++ ASSERT(!usb_pipeisoc(urb->pipe));
++
++ /* Remove this URB from the queue and move it to active */
++ activeUrbList[epid] = urb;
++ urb_list_del(urb, epid);
++
++ urb_priv->urb_state = STARTED;
++
++ /* Reset error counters (regardless of which direction this traffic is). */
++ etrax_epid_clear_error(epid);
++
++ /* Special handling of Intr EP lists */
++ if(usb_pipeint(urb->pipe)) {
++ tc_dma_link_intr_urb(urb);
++ local_irq_restore(flags);
++ return;
++ }
++
++ /* Software must preset the toggle bits for Bulk and Ctrl */
++ if(usb_pipecontrol(urb->pipe)) {
++ /* Toggle bits are initialized only during setup transaction in a
++ CTRL transfer */
++ etrax_epid_set_toggle(epid, 0, 0);
++ etrax_epid_set_toggle(epid, 1, 0);
++ } else {
++ toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
++ usb_pipeout(urb->pipe));
++ etrax_epid_set_toggle(epid, usb_pipeout(urb->pipe), toggle);
++ }
++
++ tc_dbg("Added SBs from (URB:0x%x %s %s) to epid %d: %s\n",
++ (unsigned int)urb, str_dir(urb->pipe), str_type(urb->pipe), epid,
++ sblist_to_str(urb_priv->first_sb));
++
++ /* We start the DMA sub channel without checking if it's running or not,
++ because:
++ 1) If it's already running, issuing the start command is a nop.
++ 2) We avoid a test-and-set race condition. */
++ switch(usb_pipetype(urb->pipe)) {
++ case PIPE_BULK:
++ /* Assert that the EP descriptor is disabled. */
++ ASSERT(!(TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)));
++
++ /* Set up and enable the EP descriptor. */
++ TxBulkEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
++ TxBulkEPList[epid].hw_len = 0;
++ TxBulkEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
++
++ /* Check if the dummy list is already with us (if several urbs were queued). */
++ if (usb_pipein(urb->pipe) && (TxBulkEPList[epid].next != virt_to_phys(&TxBulkDummyEPList[epid][0]))) {
++ tc_dbg("Inviting dummy list to the party for urb 0x%lx, epid %d",
++ (unsigned long)urb, epid);
++
++ /* We don't need to check if the DMA is at this EP or not before changing the
++ next pointer, since we will do it in one 32-bit write (EP descriptors are
++ 32-bit aligned). */
++ TxBulkEPList[epid].next = virt_to_phys(&TxBulkDummyEPList[epid][0]);
++ }
++
++ restart_dma8_sub0();
++
++ /* Update/restart the bulk start timer since we just started the channel.*/
++ mod_timer(&bulk_start_timer, jiffies + BULK_START_TIMER_INTERVAL);
++ /* Update/restart the bulk eot timer since we just inserted traffic. */
++ mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
++ break;
++ case PIPE_CONTROL:
++ /* Assert that the EP descriptor is disabled. */
++ ASSERT(!(TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)));
++
++ /* Set up and enable the EP descriptor. */
++ TxCtrlEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
++ TxCtrlEPList[epid].hw_len = 0;
++ TxCtrlEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
++
++ *R_DMA_CH8_SUB1_CMD = IO_STATE(R_DMA_CH8_SUB1_CMD, cmd, start);
++ break;
++ }
++ local_irq_restore(flags);
++}
++
++static void tc_dma_link_intr_urb(struct urb *urb) {
++ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
++ volatile struct USB_EP_Desc *tmp_ep;
++ struct USB_EP_Desc *ep_desc;
++ int i = 0, epid;
++ int pool_idx = 0;
++
++ ASSERT(urb_priv != NULL);
++ epid = urb_priv->epid;
++ ASSERT(urb_priv->interval > 0);
++ ASSERT(urb_priv->intr_ep_pool_length > 0);
++
++ tmp_ep = &TxIntrEPList[0];
++
++ /* Only insert one EP descriptor in list for Out Intr URBs.
++ We can only handle Out Intr with interval of 128ms because
++ it's not possible to insert several Out Intr EPs because they
++ are not consumed by the DMA. */
++ if(usb_pipeout(urb->pipe)) {
++ ep_desc = urb_priv->intr_ep_pool[0];
++ ASSERT(ep_desc);
++ ep_desc->next = tmp_ep->next;
++ tmp_ep->next = virt_to_phys(ep_desc);
++ i++;
++ } else {
++ /* Loop through Intr EP descriptor list and insert EP for URB at
++ specified interval */
++ do {
++ /* Each EP descriptor with eof flag sat signals a new frame */
++ if (tmp_ep->command & IO_MASK(USB_EP_command, eof)) {
++ /* Insert a EP from URBs EP pool at correct interval */
++ if ((i % urb_priv->interval) == 0) {
++ ep_desc = urb_priv->intr_ep_pool[pool_idx];
++ ASSERT(ep_desc);
++ ep_desc->next = tmp_ep->next;
++ tmp_ep->next = virt_to_phys(ep_desc);
++ pool_idx++;
++ ASSERT(pool_idx <= urb_priv->intr_ep_pool_length);
++ }
++ i++;
++ }
++ tmp_ep = (struct USB_EP_Desc *)phys_to_virt(tmp_ep->next);
++ } while(tmp_ep != &TxIntrEPList[0]);
++ }
++
++ intr_dbg("Added SBs to intr epid %d: %s interval:%d (%d EP)\n", epid,
++ sblist_to_str(urb_priv->first_sb), urb_priv->interval, pool_idx);
++
++ /* We start the DMA sub channel without checking if it's running or not,
++ because:
++ 1) If it's already running, issuing the start command is a nop.
++ 2) We avoid a test-and-set race condition. */
++ *R_DMA_CH8_SUB2_CMD = IO_STATE(R_DMA_CH8_SUB2_CMD, cmd, start);
++}
++
++static void tc_dma_process_isoc_urb(struct urb *urb) {
++ unsigned long flags;
++ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
++ int epid;
++
++ /* Do not disturb us while fiddling with EPs and epids */
++ local_irq_save(flags);
++
++ ASSERT(urb_priv);
++ ASSERT(urb_priv->first_sb);
++ epid = urb_priv->epid;
++
++ if(activeUrbList[epid] == NULL) {
++ /* EP is idle, so make this URB active */
++ activeUrbList[epid] = urb;
++ urb_list_del(urb, epid);
++ ASSERT(TxIsocEPList[epid].sub == 0);
++ ASSERT(!(TxIsocEPList[epid].command &
++ IO_STATE(USB_EP_command, enable, yes)));
++
++ /* Differentiate between In and Out Isoc. Because In SBs are not consumed*/
++ if(usb_pipein(urb->pipe)) {
++ /* Each EP for In Isoc will have only one SB descriptor, setup when
++ submitting the first active urb. We do it here by copying from URBs
++ pre-allocated SB. */
++ memcpy((void *)&(TxIsocSBList[epid]), urb_priv->first_sb,
++ sizeof(TxIsocSBList[epid]));
++ TxIsocEPList[epid].hw_len = 0;
++ TxIsocEPList[epid].sub = virt_to_phys(&(TxIsocSBList[epid]));
++ } else {
++ /* For Out Isoc we attach the pre-allocated list of SBs for the URB */
++ TxIsocEPList[epid].hw_len = 0;
++ TxIsocEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
++
++ isoc_dbg("Attached first URB:0x%x[%d] to epid:%d first_sb:0x%x"
++ " last_sb::0x%x\n",
++ (unsigned int)urb, urb_priv->urb_num, epid,
++ (unsigned int)(urb_priv->first_sb),
++ (unsigned int)(urb_priv->last_sb));
++ }
++
++ if (urb->transfer_flags & URB_ISO_ASAP) {
++ /* The isoc transfer should be started as soon as possible. The
++ start_frame field is a return value if URB_ISO_ASAP was set. Comparing
++ R_USB_FM_NUMBER with a USB Chief trace shows that the first isoc IN
++ token is sent 2 frames later. I'm not sure how this affects usage of
++ the start_frame field by the device driver, or how it affects things
++ when USB_ISO_ASAP is not set, so therefore there's no compensation for
++ the 2 frame "lag" here. */
++ urb->start_frame = (*R_USB_FM_NUMBER & 0x7ff);
++ TxIsocEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
++ urb_priv->urb_state = STARTED;
++ isoc_dbg("URB_ISO_ASAP set, urb->start_frame set to %d\n",
++ urb->start_frame);
++ } else {
++ /* Not started yet. */
++ urb_priv->urb_state = NOT_STARTED;
++ isoc_warn("urb_priv->urb_state set to NOT_STARTED for URB:0x%x\n",
++ (unsigned int)urb);
++ }
++
++ } else {
++ /* An URB is already active on the EP. Leave URB in queue and let
++ finish_isoc_urb process it after current active URB */
++ ASSERT(TxIsocEPList[epid].sub != 0);
++
++ if(usb_pipein(urb->pipe)) {
++ /* Because there already is a active In URB on this epid we do nothing
++ and the finish_isoc_urb() function will handle switching to next URB*/
++
++ } else { /* For Out Isoc, insert new URBs traffic last in SB-list. */
++ struct USB_SB_Desc *temp_sb_desc;
++
++ /* Set state STARTED to all Out Isoc URBs added to SB list because we
++ don't know how many of them that are finished before descr interrupt*/
++ urb_priv->urb_state = STARTED;
++
++ /* Find end of current SB list by looking for SB with eol flag sat */
++ temp_sb_desc = phys_to_virt(TxIsocEPList[epid].sub);
++ while ((temp_sb_desc->command & IO_MASK(USB_SB_command, eol)) !=
++ IO_STATE(USB_SB_command, eol, yes)) {
++ ASSERT(temp_sb_desc->next);
++ temp_sb_desc = phys_to_virt(temp_sb_desc->next);
++ }
++
++ isoc_dbg("Appended URB:0x%x[%d] (first:0x%x last:0x%x) to epid:%d"
++ " sub:0x%x eol:0x%x\n",
++ (unsigned int)urb, urb_priv->urb_num,
++ (unsigned int)(urb_priv->first_sb),
++ (unsigned int)(urb_priv->last_sb), epid,
++ (unsigned int)phys_to_virt(TxIsocEPList[epid].sub),
++ (unsigned int)temp_sb_desc);
++
++ /* Next pointer must be set before eol is removed. */
++ temp_sb_desc->next = virt_to_phys(urb_priv->first_sb);
++ /* Clear the previous end of list flag since there is a new in the
++ added SB descriptor list. */
++ temp_sb_desc->command &= ~IO_MASK(USB_SB_command, eol);
++
++ if (!(TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable))) {
++ __u32 epid_data;
++ /* 8.8.5 in Designer's Reference says we should check for and correct
++ any errors in the EP here. That should not be necessary if
++ epid_attn is handled correctly, so we assume all is ok. */
++ epid_data = etrax_epid_iso_get(epid);
++ if (IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data) !=
++ IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
++ isoc_err("Disabled Isoc EP with error:%d on epid:%d when appending"
++ " URB:0x%x[%d]\n",
++ IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data), epid,
++ (unsigned int)urb, urb_priv->urb_num);
++ }
++
++ /* The SB list was exhausted. */
++ if (virt_to_phys(urb_priv->last_sb) != TxIsocEPList[epid].sub) {
++ /* The new sublist did not get processed before the EP was
++ disabled. Setup the EP again. */
++
++ if(virt_to_phys(temp_sb_desc) == TxIsocEPList[epid].sub) {
++ isoc_dbg("EP for epid:%d stoped at SB:0x%x before newly inserted"
++ ", restarting from this URBs SB:0x%x\n",
++ epid, (unsigned int)temp_sb_desc,
++ (unsigned int)(urb_priv->first_sb));
++ TxIsocEPList[epid].hw_len = 0;
++ TxIsocEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
++ urb->start_frame = (*R_USB_FM_NUMBER & 0x7ff);
++ /* Enable the EP again so data gets processed this time */
++ TxIsocEPList[epid].command |=
++ IO_STATE(USB_EP_command, enable, yes);
++
++ } else {
++ /* The EP has been disabled but not at end this URB (god knows
++ where). This should generate an epid_attn so we should not be
++ here */
++ isoc_warn("EP was disabled on sb:0x%x before SB list for"
++ " URB:0x%x[%d] got processed\n",
++ (unsigned int)phys_to_virt(TxIsocEPList[epid].sub),
++ (unsigned int)urb, urb_priv->urb_num);
++ }
++ } else {
++ /* This might happend if we are slow on this function and isn't
++ an error. */
++ isoc_dbg("EP was disabled and finished with SBs from appended"
++ " URB:0x%x[%d]\n", (unsigned int)urb, urb_priv->urb_num);
++ }
++ }
++ }
++ }
++
++ /* Start the DMA sub channel */
++ *R_DMA_CH8_SUB3_CMD = IO_STATE(R_DMA_CH8_SUB3_CMD, cmd, start);
++
++ local_irq_restore(flags);
++}
++
++static void tc_dma_unlink_intr_urb(struct urb *urb) {
++ struct crisv10_urb_priv *urb_priv = urb->hcpriv;
++ volatile struct USB_EP_Desc *first_ep; /* First EP in the list. */
++ volatile struct USB_EP_Desc *curr_ep; /* Current EP, the iterator. */
++ volatile struct USB_EP_Desc *next_ep; /* The EP after current. */
++ volatile struct USB_EP_Desc *unlink_ep; /* The one we should remove from
++ the list. */
++ int count = 0;
++ volatile int timeout = 10000;
++ int epid;
++
++ /* Read 8.8.4 in Designer's Reference, "Removing an EP Descriptor from the
++ List". */
++ ASSERT(urb_priv);
++ ASSERT(urb_priv->intr_ep_pool_length > 0);
++ epid = urb_priv->epid;
++
++ /* First disable all Intr EPs belonging to epid for this URB */
++ first_ep = &TxIntrEPList[0];
++ curr_ep = first_ep;
++ do {
++ next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
++ if (IO_EXTRACT(USB_EP_command, epid, next_ep->command) == epid) {
++ /* Disable EP */
++ next_ep->command &= ~IO_MASK(USB_EP_command, enable);
++ }
++ curr_ep = phys_to_virt(curr_ep->next);
++ } while (curr_ep != first_ep);
++
++
++ /* Now unlink all EPs belonging to this epid from Descr list */
++ first_ep = &TxIntrEPList[0];
++ curr_ep = first_ep;
++ do {
++ next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
++ if (IO_EXTRACT(USB_EP_command, epid, next_ep->command) == epid) {
++ /* This is the one we should unlink. */
++ unlink_ep = next_ep;
++
++ /* Actually unlink the EP from the DMA list. */
++ curr_ep->next = unlink_ep->next;
++
++ /* Wait until the DMA is no longer at this descriptor. */
++ while((*R_DMA_CH8_SUB2_EP == virt_to_phys(unlink_ep)) &&
++ (timeout-- > 0));
++ if(timeout == 0) {
++ warn("Timeout while waiting for DMA-TX-Intr to leave unlink EP\n");
++ }
++
++ count++;
++ }
++ curr_ep = phys_to_virt(curr_ep->next);
++ } while (curr_ep != first_ep);
++
++ if(count != urb_priv->intr_ep_pool_length) {
++ intr_warn("Unlinked %d of %d Intr EPs for URB:0x%x[%d]\n", count,
++ urb_priv->intr_ep_pool_length, (unsigned int)urb,
++ urb_priv->urb_num);
++ } else {
++ intr_dbg("Unlinked %d of %d interrupt EPs for URB:0x%x\n", count,
++ urb_priv->intr_ep_pool_length, (unsigned int)urb);
++ }
++}
++
++static void check_finished_bulk_tx_epids(struct usb_hcd *hcd,
++ int timer) {
++ unsigned long flags;
++ int epid;
++ struct urb *urb;
++ struct crisv10_urb_priv * urb_priv;
++ __u32 epid_data;
++
++ /* Protect TxEPList */
++ local_irq_save(flags);
++
++ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
++ /* A finished EP descriptor is disabled and has a valid sub pointer */
++ if (!(TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) &&
++ (TxBulkEPList[epid].sub != 0)) {
++
++ /* Get the active URB for this epid */
++ urb = activeUrbList[epid];
++ /* Sanity checks */
++ ASSERT(urb);
++ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
++ ASSERT(urb_priv);
++
++ /* Only handle finished out Bulk EPs here,
++ and let RX interrupt take care of the rest */
++ if(!epid_out_traffic(epid)) {
++ continue;
++ }
++
++ if(timer) {
++ tc_warn("Found finished %s Bulk epid:%d URB:0x%x[%d] from timeout\n",
++ epid_out_traffic(epid) ? "Out" : "In", epid, (unsigned int)urb,
++ urb_priv->urb_num);
++ } else {
++ tc_dbg("Found finished %s Bulk epid:%d URB:0x%x[%d] from interrupt\n",
++ epid_out_traffic(epid) ? "Out" : "In", epid, (unsigned int)urb,
++ urb_priv->urb_num);
++ }
++
++ if(urb_priv->urb_state == UNLINK) {
++ /* This Bulk URB is requested to be unlinked, that means that the EP
++ has been disabled and we might not have sent all data */
++ tc_finish_urb(hcd, urb, urb->status);
++ continue;
++ }
++
++ ASSERT(urb_priv->urb_state == STARTED);
++ if (phys_to_virt(TxBulkEPList[epid].sub) != urb_priv->last_sb) {
++ tc_err("Endpoint got disabled before reaching last sb\n");
++ }
++
++ epid_data = etrax_epid_get(epid);
++ if (IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data) ==
++ IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
++ /* This means that the endpoint has no error, is disabled
++ and had inserted traffic, i.e. transfer successfully completed. */
++ tc_finish_urb(hcd, urb, 0);
++ } else {
++ /* Shouldn't happen. We expect errors to be caught by epid
++ attention. */
++ tc_err("Found disabled bulk EP desc (epid:%d error:%d)\n",
++ epid, IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data));
++ }
++ } else {
++ tc_dbg("Ignoring In Bulk epid:%d, let RX interrupt handle it\n", epid);
++ }
++ }
++
++ local_irq_restore(flags);
++}
++
++static void check_finished_ctrl_tx_epids(struct usb_hcd *hcd) {
++ unsigned long flags;
++ int epid;
++ struct urb *urb;
++ struct crisv10_urb_priv * urb_priv;
++ __u32 epid_data;
++
++ /* Protect TxEPList */
++ local_irq_save(flags);
++
++ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
++ if(epid == DUMMY_EPID)
++ continue;
++
++ /* A finished EP descriptor is disabled and has a valid sub pointer */
++ if (!(TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) &&
++ (TxCtrlEPList[epid].sub != 0)) {
++
++ /* Get the active URB for this epid */
++ urb = activeUrbList[epid];
++
++ if(urb == NULL) {
++ tc_warn("Found finished Ctrl epid:%d with no active URB\n", epid);
++ continue;
++ }
++
++ /* Sanity checks */
++ ASSERT(usb_pipein(urb->pipe));
++ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
++ ASSERT(urb_priv);
++ if (phys_to_virt(TxCtrlEPList[epid].sub) != urb_priv->last_sb) {
++ tc_err("Endpoint got disabled before reaching last sb\n");
++ }
++
++ epid_data = etrax_epid_get(epid);
++ if (IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data) ==
++ IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
++ /* This means that the endpoint has no error, is disabled
++ and had inserted traffic, i.e. transfer successfully completed. */
++
++ /* Check if RX-interrupt for In Ctrl has been processed before
++ finishing the URB */
++ if(urb_priv->ctrl_rx_done) {
++ tc_dbg("Finishing In Ctrl URB:0x%x[%d] in tx_interrupt\n",
++ (unsigned int)urb, urb_priv->urb_num);
++ tc_finish_urb(hcd, urb, 0);
++ } else {
++ /* If we get zout descriptor interrupt before RX was done for a
++ In Ctrl transfer, then we flag that and it will be finished
++ in the RX-Interrupt */
++ urb_priv->ctrl_zout_done = 1;
++ tc_dbg("Got zout descr interrupt before RX interrupt\n");
++ }
++ } else {
++ /* Shouldn't happen. We expect errors to be caught by epid
++ attention. */
++ tc_err("Found disabled Ctrl EP desc (epid:%d URB:0x%x[%d]) error_code:%d\n", epid, (unsigned int)urb, urb_priv->urb_num, IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data));
++ __dump_ep_desc(&(TxCtrlEPList[epid]));
++ __dump_ept_data(epid);
++ }
++ }
++ }
++ local_irq_restore(flags);
++}
++
++/* This function goes through all epids that are setup for Out Isoc transfers
++ and marks (isoc_out_done) all queued URBs that the DMA has finished
++ transfer for.
++ No URB completetion is done here to make interrupt routine return quickly.
++ URBs are completed later with help of complete_isoc_bottom_half() that
++ becomes schedules when this functions is finished. */
++static void check_finished_isoc_tx_epids(void) {
++ unsigned long flags;
++ int epid;
++ struct urb *urb;
++ struct crisv10_urb_priv * urb_priv;
++ struct USB_SB_Desc* sb_desc;
++ int epid_done;
++
++ /* Protect TxIsocEPList */
++ local_irq_save(flags);
++
++ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
++ if (TxIsocEPList[epid].sub == 0 || epid == INVALID_EPID ||
++ !epid_out_traffic(epid)) {
++ /* Nothing here to see. */
++ continue;
++ }
++ ASSERT(epid_inuse(epid));
++ ASSERT(epid_isoc(epid));
++
++ sb_desc = phys_to_virt(TxIsocEPList[epid].sub);
++ /* Find the last descriptor of the currently active URB for this ep.
++ This is the first descriptor in the sub list marked for a descriptor
++ interrupt. */
++ while (sb_desc && !IO_EXTRACT(USB_SB_command, intr, sb_desc->command)) {
++ sb_desc = sb_desc->next ? phys_to_virt(sb_desc->next) : 0;
++ }
++ ASSERT(sb_desc);
++
++ isoc_dbg("Descr IRQ checking epid:%d sub:0x%x intr:0x%x\n",
++ epid, (unsigned int)phys_to_virt(TxIsocEPList[epid].sub),
++ (unsigned int)sb_desc);
++
++ urb = activeUrbList[epid];
++ if(urb == NULL) {
++ isoc_err("Isoc Descr irq on epid:%d with no active URB\n", epid);
++ continue;
++ }
++
++ epid_done = 0;
++ while(urb && !epid_done) {
++ /* Sanity check. */
++ ASSERT(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
++ ASSERT(usb_pipeout(urb->pipe));
++
++ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
++ ASSERT(urb_priv);
++ ASSERT(urb_priv->urb_state == STARTED ||
++ urb_priv->urb_state == UNLINK);
++
++ if (sb_desc != urb_priv->last_sb) {
++ /* This urb has been sent. */
++ urb_priv->isoc_out_done = 1;
++
++ } else { /* Found URB that has last_sb as the interrupt reason */
++
++ /* Check if EP has been disabled, meaning that all transfers are done*/
++ if(!(TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable))) {
++ ASSERT((sb_desc->command & IO_MASK(USB_SB_command, eol)) ==
++ IO_STATE(USB_SB_command, eol, yes));
++ ASSERT(sb_desc->next == 0);
++ urb_priv->isoc_out_done = 1;
++ } else {
++ isoc_dbg("Skipping URB:0x%x[%d] because EP not disabled yet\n",
++ (unsigned int)urb, urb_priv->urb_num);
++ }
++ /* Stop looking any further in queue */
++ epid_done = 1;
++ }
++
++ if (!epid_done) {
++ if(urb == activeUrbList[epid]) {
++ urb = urb_list_first(epid);
++ } else {
++ urb = urb_list_next(urb, epid);
++ }
++ }
++ } /* END: while(urb && !epid_done) */
++ }
++
++ local_irq_restore(flags);
++}
++
++
++/* This is where the Out Isoc URBs are realy completed. This function is
++ scheduled from tc_dma_tx_interrupt() when one or more Out Isoc transfers
++ are done. This functions completes all URBs earlier marked with
++ isoc_out_done by fast interrupt routine check_finished_isoc_tx_epids() */
++
++static void complete_isoc_bottom_half(void *data) {
++ struct crisv10_isoc_complete_data *comp_data;
++ struct usb_iso_packet_descriptor *packet;
++ struct crisv10_urb_priv * urb_priv;
++ unsigned long flags;
++ struct urb* urb;
++ int epid_done;
++ int epid;
++ int i;
++
++ comp_data = (struct crisv10_isoc_complete_data*)data;
++
++ local_irq_save(flags);
++
++ for (epid = 0; epid < NBR_OF_EPIDS - 1; epid++) {
++ if(!epid_inuse(epid) || !epid_isoc(epid) || !epid_out_traffic(epid) || epid == DUMMY_EPID) {
++ /* Only check valid Out Isoc epids */
++ continue;
++ }
++
++ isoc_dbg("Isoc bottom-half checking epid:%d, sub:0x%x\n", epid,
++ (unsigned int)phys_to_virt(TxIsocEPList[epid].sub));
++
++ /* The descriptor interrupt handler has marked all transmitted Out Isoc
++ URBs with isoc_out_done. Now we traverse all epids and for all that
++ have out Isoc traffic we traverse its URB list and complete the
++ transmitted URBs. */
++ epid_done = 0;
++ while (!epid_done) {
++
++ /* Get the active urb (if any) */
++ urb = activeUrbList[epid];
++ if (urb == 0) {
++ isoc_dbg("No active URB on epid:%d anymore\n", epid);
++ epid_done = 1;
++ continue;
++ }
++
++ /* Sanity check. */
++ ASSERT(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
++ ASSERT(usb_pipeout(urb->pipe));
++
++ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
++ ASSERT(urb_priv);
++
++ if (!(urb_priv->isoc_out_done)) {
++ /* We have reached URB that isn't flaged done yet, stop traversing. */
++ isoc_dbg("Stoped traversing Out Isoc URBs on epid:%d"
++ " before not yet flaged URB:0x%x[%d]\n",
++ epid, (unsigned int)urb, urb_priv->urb_num);
++ epid_done = 1;
++ continue;
++ }
++
++ /* This urb has been sent. */
++ isoc_dbg("Found URB:0x%x[%d] that is flaged isoc_out_done\n",
++ (unsigned int)urb, urb_priv->urb_num);
++
++ /* Set ok on transfered packets for this URB and finish it */
++ for (i = 0; i < urb->number_of_packets; i++) {
++ packet = &urb->iso_frame_desc[i];
++ packet->status = 0;
++ packet->actual_length = packet->length;
++ }
++ urb_priv->isoc_packet_counter = urb->number_of_packets;
++ tc_finish_urb(comp_data->hcd, urb, 0);
++
++ } /* END: while(!epid_done) */
++ } /* END: for(epid...) */
++
++ local_irq_restore(flags);
++ kmem_cache_free(isoc_compl_cache, comp_data);
++}
++
++
++static void check_finished_intr_tx_epids(struct usb_hcd *hcd) {
++ unsigned long flags;
++ int epid;
++ struct urb *urb;
++ struct crisv10_urb_priv * urb_priv;
++ volatile struct USB_EP_Desc *curr_ep; /* Current EP, the iterator. */
++ volatile struct USB_EP_Desc *next_ep; /* The EP after current. */
++
++ /* Protect TxintrEPList */
++ local_irq_save(flags);
++
++ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
++ if(!epid_inuse(epid) || !epid_intr(epid) || !epid_out_traffic(epid)) {
++ /* Nothing to see on this epid. Only check valid Out Intr epids */
++ continue;
++ }
++
++ urb = activeUrbList[epid];
++ if(urb == 0) {
++ intr_warn("Found Out Intr epid:%d with no active URB\n", epid);
++ continue;
++ }
++
++ /* Sanity check. */
++ ASSERT(usb_pipetype(urb->pipe) == PIPE_INTERRUPT);
++ ASSERT(usb_pipeout(urb->pipe));
++
++ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
++ ASSERT(urb_priv);
++
++ /* Go through EPs between first and second sof-EP. It's here Out Intr EPs
++ are inserted.*/
++ curr_ep = &TxIntrEPList[0];
++ do {
++ next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
++ if(next_ep == urb_priv->intr_ep_pool[0]) {
++ /* We found the Out Intr EP for this epid */
++
++ /* Disable it so it doesn't get processed again */
++ next_ep->command &= ~IO_MASK(USB_EP_command, enable);
++
++ /* Finish the active Out Intr URB with status OK */
++ tc_finish_urb(hcd, urb, 0);
++ }
++ curr_ep = phys_to_virt(curr_ep->next);
++ } while (curr_ep != &TxIntrEPList[1]);
++
++ }
++ local_irq_restore(flags);
++}
++
++/* Interrupt handler for DMA8/IRQ24 with subchannels (called from hardware intr) */
++static irqreturn_t tc_dma_tx_interrupt(int irq, void *vhc) {
++ struct usb_hcd *hcd = (struct usb_hcd*)vhc;
++ ASSERT(hcd);
++
++ if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub0_descr)) {
++ /* Clear this interrupt */
++ *R_DMA_CH8_SUB0_CLR_INTR = IO_STATE(R_DMA_CH8_SUB0_CLR_INTR, clr_descr, do);
++ restart_dma8_sub0();
++ }
++
++ if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub1_descr)) {
++ /* Clear this interrupt */
++ *R_DMA_CH8_SUB1_CLR_INTR = IO_STATE(R_DMA_CH8_SUB1_CLR_INTR, clr_descr, do);
++ check_finished_ctrl_tx_epids(hcd);
++ }
++
++ if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub2_descr)) {
++ /* Clear this interrupt */
++ *R_DMA_CH8_SUB2_CLR_INTR = IO_STATE(R_DMA_CH8_SUB2_CLR_INTR, clr_descr, do);
++ check_finished_intr_tx_epids(hcd);
++ }
++
++ if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub3_descr)) {
++ struct crisv10_isoc_complete_data* comp_data;
++
++ /* Flag done Out Isoc for later completion */
++ check_finished_isoc_tx_epids();
++
++ /* Clear this interrupt */
++ *R_DMA_CH8_SUB3_CLR_INTR = IO_STATE(R_DMA_CH8_SUB3_CLR_INTR, clr_descr, do);
++ /* Schedule bottom half of Out Isoc completion function. This function
++ finishes the URBs marked with isoc_out_done */
++ comp_data = (struct crisv10_isoc_complete_data*)
++ kmem_cache_alloc(isoc_compl_cache, SLAB_ATOMIC);
++ ASSERT(comp_data != NULL);
++ comp_data ->hcd = hcd;
++
++ INIT_WORK(&comp_data->usb_bh, complete_isoc_bottom_half, comp_data);
++ schedule_work(&comp_data->usb_bh);
++ }
++
++ return IRQ_HANDLED;
++}
++
++/* Interrupt handler for DMA9/IRQ25 (called from hardware intr) */
++static irqreturn_t tc_dma_rx_interrupt(int irq, void *vhc) {
++ unsigned long flags;
++ struct urb *urb;
++ struct usb_hcd *hcd = (struct usb_hcd*)vhc;
++ struct crisv10_urb_priv *urb_priv;
++ int epid = 0;
++ int real_error;
++
++ ASSERT(hcd);
++
++ /* Clear this interrupt. */
++ *R_DMA_CH9_CLR_INTR = IO_STATE(R_DMA_CH9_CLR_INTR, clr_eop, do);
++
++ /* Custom clear interrupt for this interrupt */
++ /* The reason we cli here is that we call the driver's callback functions. */
++ local_irq_save(flags);
++
++ /* Note that this while loop assumes that all packets span only
++ one rx descriptor. */
++ while(myNextRxDesc->status & IO_MASK(USB_IN_status, eop)) {
++ epid = IO_EXTRACT(USB_IN_status, epid, myNextRxDesc->status);
++ /* Get the active URB for this epid */
++ urb = activeUrbList[epid];
++
++ ASSERT(epid_inuse(epid));
++ if (!urb) {
++ dma_err("No urb for epid %d in rx interrupt\n", epid);
++ goto skip_out;
++ }
++
++ /* Check if any errors on epid */
++ real_error = 0;
++ if (myNextRxDesc->status & IO_MASK(USB_IN_status, error)) {
++ __u32 r_usb_ept_data;
++
++ if (usb_pipeisoc(urb->pipe)) {
++ r_usb_ept_data = etrax_epid_iso_get(epid);
++ if((r_usb_ept_data & IO_MASK(R_USB_EPT_DATA_ISO, valid)) &&
++ (IO_EXTRACT(R_USB_EPT_DATA_ISO, error_code, r_usb_ept_data) == 0) &&
++ (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata))) {
++ /* Not an error, just a failure to receive an expected iso
++ in packet in this frame. This is not documented
++ in the designers reference. Continue processing.
++ */
++ } else real_error = 1;
++ } else real_error = 1;
++ }
++
++ if(real_error) {
++ dma_err("Error in RX descr on epid:%d for URB 0x%x",
++ epid, (unsigned int)urb);
++ dump_ept_data(epid);
++ dump_in_desc(myNextRxDesc);
++ goto skip_out;
++ }
++
++ urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
++ ASSERT(urb_priv);
++ ASSERT(urb_priv->urb_state == STARTED ||
++ urb_priv->urb_state == UNLINK);
++
++ if ((usb_pipetype(urb->pipe) == PIPE_BULK) ||
++ (usb_pipetype(urb->pipe) == PIPE_CONTROL) ||
++ (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)) {
++
++ /* We get nodata for empty data transactions, and the rx descriptor's
++ hw_len field is not valid in that case. No data to copy in other
++ words. */
++ if (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata)) {
++ /* No data to copy */
++ } else {
++ /*
++ dma_dbg("Processing RX for URB:0x%x epid:%d (data:%d ofs:%d)\n",
++ (unsigned int)urb, epid, myNextRxDesc->hw_len,
++ urb_priv->rx_offset);
++ */
++ /* Only copy data if URB isn't flaged to be unlinked*/
++ if(urb_priv->urb_state != UNLINK) {
++ /* Make sure the data fits in the buffer. */
++ if(urb_priv->rx_offset + myNextRxDesc->hw_len
++ <= urb->transfer_buffer_length) {
++
++ /* Copy the data to URBs buffer */
++ memcpy(urb->transfer_buffer + urb_priv->rx_offset,
++ phys_to_virt(myNextRxDesc->buf), myNextRxDesc->hw_len);
++ urb_priv->rx_offset += myNextRxDesc->hw_len;
++ } else {
++ /* Signal overflow when returning URB */
++ urb->status = -EOVERFLOW;
++ tc_finish_urb_later(hcd, urb, urb->status);
++ }
++ }
++ }
++
++ /* Check if it was the last packet in the transfer */
++ if (myNextRxDesc->status & IO_MASK(USB_IN_status, eot)) {
++ /* Special handling for In Ctrl URBs. */
++ if(usb_pipecontrol(urb->pipe) && usb_pipein(urb->pipe) &&
++ !(urb_priv->ctrl_zout_done)) {
++ /* Flag that RX part of Ctrl transfer is done. Because zout descr
++ interrupt hasn't happend yet will the URB be finished in the
++ TX-Interrupt. */
++ urb_priv->ctrl_rx_done = 1;
++ tc_dbg("Not finishing In Ctrl URB:0x%x from rx_interrupt, waiting"
++ " for zout\n", (unsigned int)urb);
++ } else {
++ tc_finish_urb(hcd, urb, 0);
++ }
++ }
++ } else { /* ISOC RX */
++ /*
++ isoc_dbg("Processing RX for epid:%d (URB:0x%x) ISOC pipe\n",
++ epid, (unsigned int)urb);
++ */
++
++ struct usb_iso_packet_descriptor *packet;
++
++ if (urb_priv->urb_state == UNLINK) {
++ isoc_warn("Ignoring Isoc Rx data for urb being unlinked.\n");
++ goto skip_out;
++ } else if (urb_priv->urb_state == NOT_STARTED) {
++ isoc_err("What? Got Rx data for Isoc urb that isn't started?\n");
++ goto skip_out;
++ }
++
++ packet = &urb->iso_frame_desc[urb_priv->isoc_packet_counter];
++ ASSERT(packet);
++ packet->status = 0;
++
++ if (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata)) {
++ /* We get nodata for empty data transactions, and the rx descriptor's
++ hw_len field is not valid in that case. We copy 0 bytes however to
++ stay in synch. */
++ packet->actual_length = 0;
++ } else {
++ packet->actual_length = myNextRxDesc->hw_len;
++ /* Make sure the data fits in the buffer. */
++ ASSERT(packet->actual_length <= packet->length);
++ memcpy(urb->transfer_buffer + packet->offset,
++ phys_to_virt(myNextRxDesc->buf), packet->actual_length);
++ if(packet->actual_length > 0)
++ isoc_dbg("Copied %d bytes, packet %d for URB:0x%x[%d]\n",
++ packet->actual_length, urb_priv->isoc_packet_counter,
++ (unsigned int)urb, urb_priv->urb_num);
++ }
++
++ /* Increment the packet counter. */
++ urb_priv->isoc_packet_counter++;
++
++ /* Note that we don't care about the eot field in the rx descriptor's
++ status. It will always be set for isoc traffic. */
++ if (urb->number_of_packets == urb_priv->isoc_packet_counter) {
++ /* Complete the urb with status OK. */
++ tc_finish_urb(hcd, urb, 0);
++ }
++ }
++
++ skip_out:
++ myNextRxDesc->status = 0;
++ myNextRxDesc->command |= IO_MASK(USB_IN_command, eol);
++ myLastRxDesc->command &= ~IO_MASK(USB_IN_command, eol);
++ myLastRxDesc = myNextRxDesc;
++ myNextRxDesc = phys_to_virt(myNextRxDesc->next);
++ flush_etrax_cache();
++ *R_DMA_CH9_CMD = IO_STATE(R_DMA_CH9_CMD, cmd, restart);
++ }
++
++ local_irq_restore(flags);
++
++ return IRQ_HANDLED;
++}
++
++static void tc_bulk_start_timer_func(unsigned long dummy) {
++ /* We might enable an EP descriptor behind the current DMA position when
++ it's about to decide that there are no more bulk traffic and it should
++ stop the bulk channel.
++ Therefore we periodically check if the bulk channel is stopped and there
++ is an enabled bulk EP descriptor, in which case we start the bulk
++ channel. */
++
++ if (!(*R_DMA_CH8_SUB0_CMD & IO_MASK(R_DMA_CH8_SUB0_CMD, cmd))) {
++ int epid;
++
++ timer_dbg("bulk_start_timer: Bulk DMA channel not running.\n");
++
++ for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
++ if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
++ timer_warn("Found enabled EP for epid %d, starting bulk channel.\n",
++ epid);
++ restart_dma8_sub0();
++
++ /* Restart the bulk eot timer since we just started the bulk channel.*/
++ mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
++
++ /* No need to search any further. */
++ break;
++ }
++ }
++ } else {
++ timer_dbg("bulk_start_timer: Bulk DMA channel running.\n");
++ }
++}
++
++static void tc_bulk_eot_timer_func(unsigned long dummy) {
++ struct usb_hcd *hcd = (struct usb_hcd*)dummy;
++ ASSERT(hcd);
++ /* Because of a race condition in the top half, we might miss a bulk eot.
++ This timer "simulates" a bulk eot if we don't get one for a while,
++ hopefully correcting the situation. */
++ timer_dbg("bulk_eot_timer timed out.\n");
++ check_finished_bulk_tx_epids(hcd, 1);
++}
++
++
++/*************************************************************/
++/*************************************************************/
++/* Device driver block */
++/*************************************************************/
++/*************************************************************/
++
++/* Forward declarations for device driver functions */
++static int devdrv_hcd_probe(struct device *);
++static int devdrv_hcd_remove(struct device *);
++#ifdef CONFIG_PM
++static int devdrv_hcd_suspend(struct device *, u32, u32);
++static int devdrv_hcd_resume(struct device *, u32);
++#endif /* CONFIG_PM */
++
++/* the device */
++static struct platform_device *devdrv_hc_platform_device;
++
++/* device driver interface */
++static struct device_driver devdrv_hc_device_driver = {
++ .name = (char *) hc_name,
++ .bus = &platform_bus_type,
++
++ .probe = devdrv_hcd_probe,
++ .remove = devdrv_hcd_remove,
++
++#ifdef CONFIG_PM
++ .suspend = devdrv_hcd_suspend,
++ .resume = devdrv_hcd_resume,
++#endif /* CONFIG_PM */
++};
++
++/* initialize the host controller and driver */
++static int __init_or_module devdrv_hcd_probe(struct device *dev)
++{
++ struct usb_hcd *hcd;
++ struct crisv10_hcd *crisv10_hcd;
++ int retval;
++
++ /* Check DMA burst length */
++ if(IO_EXTRACT(R_BUS_CONFIG, dma_burst, *R_BUS_CONFIG) !=
++ IO_STATE(R_BUS_CONFIG, dma_burst, burst32)) {
++ devdrv_err("Invalid DMA burst length in Etrax 100LX,"
++ " needs to be 32\n");
++ return -EPERM;
++ }
++
++ hcd = usb_create_hcd(&crisv10_hc_driver, dev, dev->bus_id);
++ if (!hcd)
++ return -ENOMEM;
++
++ crisv10_hcd = hcd_to_crisv10_hcd(hcd);
++ spin_lock_init(&crisv10_hcd->lock);
++ crisv10_hcd->num_ports = num_ports();
++ crisv10_hcd->running = 0;
++
++ dev_set_drvdata(dev, crisv10_hcd);
++
++ devdrv_dbg("ETRAX USB IRQs HC:%d RX:%d TX:%d\n", ETRAX_USB_HC_IRQ,
++ ETRAX_USB_RX_IRQ, ETRAX_USB_TX_IRQ);
++
++ /* Print out chip version read from registers */
++ int rev_maj = *R_USB_REVISION & IO_MASK(R_USB_REVISION, major);
++ int rev_min = *R_USB_REVISION & IO_MASK(R_USB_REVISION, minor);
++ if(rev_min == 0) {
++ devdrv_info("Etrax 100LX USB Revision %d v1,2\n", rev_maj);
++ } else {
++ devdrv_info("Etrax 100LX USB Revision %d v%d\n", rev_maj, rev_min);
++ }
++
++ devdrv_info("Bulk timer interval, start:%d eot:%d\n",
++ BULK_START_TIMER_INTERVAL,
++ BULK_EOT_TIMER_INTERVAL);
++
++
++ /* Init root hub data structures */
++ if(rh_init()) {
++ devdrv_err("Failed init data for Root Hub\n");
++ retval = -ENOMEM;
++ }
++
++ if(port_in_use(0)) {
++ if (cris_request_io_interface(if_usb_1, "ETRAX100LX USB-HCD")) {
++ printk(KERN_CRIT "usb-host: request IO interface usb1 failed");
++ retval = -EBUSY;
++ goto out;
++ }
++ devdrv_info("Claimed interface for USB physical port 1\n");
++ }
++ if(port_in_use(1)) {
++ if (cris_request_io_interface(if_usb_2, "ETRAX100LX USB-HCD")) {
++ /* Free first interface if second failed to be claimed */
++ if(port_in_use(0)) {
++ cris_free_io_interface(if_usb_1);
++ }
++ printk(KERN_CRIT "usb-host: request IO interface usb2 failed");
++ retval = -EBUSY;
++ goto out;
++ }
++ devdrv_info("Claimed interface for USB physical port 2\n");
++ }
++
++ /* Init transfer controller structs and locks */
++ if((retval = tc_init(hcd)) != 0) {
++ goto out;
++ }
++
++ /* Attach interrupt functions for DMA and init DMA controller */
++ if((retval = tc_dma_init(hcd)) != 0) {
++ goto out;
++ }
++
++ /* Attach the top IRQ handler for USB controller interrupts */
++ if (request_irq(ETRAX_USB_HC_IRQ, crisv10_hcd_top_irq, 0,
++ "ETRAX 100LX built-in USB (HC)", hcd)) {
++ err("Could not allocate IRQ %d for USB", ETRAX_USB_HC_IRQ);
++ retval = -EBUSY;
++ goto out;
++ }
++
++ /* iso_eof is only enabled when isoc traffic is running. */
++ *R_USB_IRQ_MASK_SET =
++ /* IO_STATE(R_USB_IRQ_MASK_SET, iso_eof, set) | */
++ IO_STATE(R_USB_IRQ_MASK_SET, bulk_eot, set) |
++ IO_STATE(R_USB_IRQ_MASK_SET, epid_attn, set) |
++ IO_STATE(R_USB_IRQ_MASK_SET, port_status, set) |
++ IO_STATE(R_USB_IRQ_MASK_SET, ctl_status, set);
++
++
++ crisv10_ready_wait();
++ /* Reset the USB interface. */
++ *R_USB_COMMAND =
++ IO_STATE(R_USB_COMMAND, port_sel, nop) |
++ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
++ IO_STATE(R_USB_COMMAND, ctrl_cmd, reset);
++
++ /* Designer's Reference, p. 8 - 10 says we should Initate R_USB_FM_PSTART to
++ 0x2A30 (10800), to guarantee that control traffic gets 10% of the
++ bandwidth, and periodic transfer may allocate the rest (90%).
++ This doesn't work though.
++ The value 11960 is chosen to be just after the SOF token, with a couple
++ of bit times extra for possible bit stuffing. */
++ *R_USB_FM_PSTART = IO_FIELD(R_USB_FM_PSTART, value, 11960);
++
++ crisv10_ready_wait();
++ /* Configure the USB interface as a host controller. */
++ *R_USB_COMMAND =
++ IO_STATE(R_USB_COMMAND, port_sel, nop) |
++ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
++ IO_STATE(R_USB_COMMAND, ctrl_cmd, host_config);
++
++
++ /* Check so controller not busy before enabling ports */
++ crisv10_ready_wait();
++
++ /* Enable selected USB ports */
++ if(port_in_use(0)) {
++ *R_USB_PORT1_DISABLE = IO_STATE(R_USB_PORT1_DISABLE, disable, no);
++ } else {
++ *R_USB_PORT1_DISABLE = IO_STATE(R_USB_PORT1_DISABLE, disable, yes);
++ }
++ if(port_in_use(1)) {
++ *R_USB_PORT2_DISABLE = IO_STATE(R_USB_PORT2_DISABLE, disable, no);
++ } else {
++ *R_USB_PORT2_DISABLE = IO_STATE(R_USB_PORT2_DISABLE, disable, yes);
++ }
++
++ crisv10_ready_wait();
++ /* Start processing of USB traffic. */
++ *R_USB_COMMAND =
++ IO_STATE(R_USB_COMMAND, port_sel, nop) |
++ IO_STATE(R_USB_COMMAND, port_cmd, reset) |
++ IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
++
++ /* Do not continue probing initialization before USB interface is done */
++ crisv10_ready_wait();
++
++ /* Register our Host Controller to USB Core
++ * Finish the remaining parts of generic HCD initialization: allocate the
++ * buffers of consistent memory, register the bus
++ * and call the driver's reset() and start() routines. */
++ retval = usb_add_hcd(hcd, ETRAX_USB_HC_IRQ, IRQF_DISABLED);
++ if (retval != 0) {
++ devdrv_err("Failed registering HCD driver\n");
++ goto out;
++ }
++
++ return 0;
++
++ out:
++ devdrv_hcd_remove(dev);
++ return retval;
++}
++
++
++/* cleanup after the host controller and driver */
++static int __init_or_module devdrv_hcd_remove(struct device *dev)
++{
++ struct crisv10_hcd *crisv10_hcd = dev_get_drvdata(dev);
++ struct usb_hcd *hcd;
++
++ if (!crisv10_hcd)
++ return 0;
++ hcd = crisv10_hcd_to_hcd(crisv10_hcd);
++
++
++ /* Stop USB Controller in Etrax 100LX */
++ crisv10_hcd_reset(hcd);
++
++ usb_remove_hcd(hcd);
++ devdrv_dbg("Removed HCD from USB Core\n");
++
++ /* Free USB Controller IRQ */
++ free_irq(ETRAX_USB_HC_IRQ, NULL);
++
++ /* Free resources */
++ tc_dma_destroy();
++ tc_destroy();
++
++
++ if(port_in_use(0)) {
++ cris_free_io_interface(if_usb_1);
++ }
++ if(port_in_use(1)) {
++ cris_free_io_interface(if_usb_2);
++ }
++
++ devdrv_dbg("Freed all claimed resources\n");
++
++ return 0;
++}
++
++
++#ifdef CONFIG_PM
++
++static int devdrv_hcd_suspend(struct usb_hcd *hcd, u32 state, u32 level)
++{
++ return 0; /* no-op for now */
++}
++
++static int devdrv_hcd_resume(struct usb_hcd *hcd, u32 level)
++{
++ return 0; /* no-op for now */
++}
++
++#endif /* CONFIG_PM */
++
++
++
++/*************************************************************/
++/*************************************************************/
++/* Module block */
++/*************************************************************/
++/*************************************************************/
++
++/* register driver */
++static int __init module_hcd_init(void)
++{
++
++ if (usb_disabled())
++ return -ENODEV;
++
++ /* Here we select enabled ports by following defines created from
++ menuconfig */
++#ifndef CONFIG_ETRAX_USB_HOST_PORT1
++ ports &= ~(1<<0);
++#endif
++#ifndef CONFIG_ETRAX_USB_HOST_PORT2
++ ports &= ~(1<<1);
++#endif
++
++ printk(KERN_INFO "%s version "VERSION" "COPYRIGHT"\n", product_desc);
++
++ devdrv_hc_platform_device =
++ platform_device_register_simple((char *) hc_name, 0, NULL, 0);
++
++ if (IS_ERR(devdrv_hc_platform_device))
++ return PTR_ERR(devdrv_hc_platform_device);
++ return driver_register(&devdrv_hc_device_driver);
++ /*
++ * Note that we do not set the DMA mask for the device,
++ * i.e. we pretend that we will use PIO, since no specific
++ * allocation routines are needed for DMA buffers. This will
++ * cause the HCD buffer allocation routines to fall back to
++ * kmalloc().
++ */
++}
++
++/* unregister driver */
++static void __exit module_hcd_exit(void)
++{
++ driver_unregister(&devdrv_hc_device_driver);
++}
++
++
++/* Module hooks */
++module_init(module_hcd_init);
++module_exit(module_hcd_exit);
+--- linux-2.6.19.2.orig/drivers/usb/host/hc_crisv10.h 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/drivers/usb/host/hc_crisv10.h 1970-01-01 01:00:00.000000000 +0100
+@@ -1,289 +0,0 @@
+-#ifndef __LINUX_ETRAX_USB_H
+-#define __LINUX_ETRAX_USB_H
+-
+-#include <linux/types.h>
+-#include <linux/list.h>
+-
+-typedef struct USB_IN_Desc {
+- volatile __u16 sw_len;
+- volatile __u16 command;
+- volatile unsigned long next;
+- volatile unsigned long buf;
+- volatile __u16 hw_len;
+- volatile __u16 status;
+-} USB_IN_Desc_t;
+-
+-typedef struct USB_SB_Desc {
+- volatile __u16 sw_len;
+- volatile __u16 command;
+- volatile unsigned long next;
+- volatile unsigned long buf;
+- __u32 dummy;
+-} USB_SB_Desc_t;
+-
+-typedef struct USB_EP_Desc {
+- volatile __u16 hw_len;
+- volatile __u16 command;
+- volatile unsigned long sub;
+- volatile unsigned long next;
+- __u32 dummy;
+-} USB_EP_Desc_t;
+-
+-struct virt_root_hub {
+- int devnum;
+- void *urb;
+- void *int_addr;
+- int send;
+- int interval;
+- int numports;
+- struct timer_list rh_int_timer;
+- volatile __u16 wPortChange_1;
+- volatile __u16 wPortChange_2;
+- volatile __u16 prev_wPortStatus_1;
+- volatile __u16 prev_wPortStatus_2;
+-};
+-
+-struct etrax_usb_intr_traffic {
+- int sleeping;
+- int error;
+- struct wait_queue *wq;
+-};
+-
+-typedef struct etrax_usb_hc {
+- struct usb_bus *bus;
+- struct virt_root_hub rh;
+- struct etrax_usb_intr_traffic intr;
+-} etrax_hc_t;
+-
+-typedef enum {
+- STARTED,
+- NOT_STARTED,
+- UNLINK,
+- TRANSFER_DONE,
+- WAITING_FOR_DESCR_INTR
+-} etrax_usb_urb_state_t;
+-
+-
+-
+-typedef struct etrax_usb_urb_priv {
+- /* The first_sb field is used for freeing all SB descriptors belonging
+- to an urb. The corresponding ep descriptor's sub pointer cannot be
+- used for this since the DMA advances the sub pointer as it processes
+- the sb list. */
+- USB_SB_Desc_t *first_sb;
+- /* The last_sb field referes to the last SB descriptor that belongs to
+- this urb. This is important to know so we can free the SB descriptors
+- that ranges between first_sb and last_sb. */
+- USB_SB_Desc_t *last_sb;
+-
+- /* The rx_offset field is used in ctrl and bulk traffic to keep track
+- of the offset in the urb's transfer_buffer where incoming data should be
+- copied to. */
+- __u32 rx_offset;
+-
+- /* Counter used in isochronous transfers to keep track of the
+- number of packets received/transmitted. */
+- __u32 isoc_packet_counter;
+-
+- /* This field is used to pass information about the urb's current state between
+- the various interrupt handlers (thus marked volatile). */
+- volatile etrax_usb_urb_state_t urb_state;
+-
+- /* Connection between the submitted urb and ETRAX epid number */
+- __u8 epid;
+-
+- /* The rx_data_list field is used for periodic traffic, to hold
+- received data for later processing in the the complete_urb functions,
+- where the data us copied to the urb's transfer_buffer. Basically, we
+- use this intermediate storage because we don't know when it's safe to
+- reuse the transfer_buffer (FIXME?). */
+- struct list_head rx_data_list;
+-} etrax_urb_priv_t;
+-
+-/* This struct is for passing data from the top half to the bottom half. */
+-typedef struct usb_interrupt_registers
+-{
+- etrax_hc_t *hc;
+- __u32 r_usb_epid_attn;
+- __u8 r_usb_status;
+- __u16 r_usb_rh_port_status_1;
+- __u16 r_usb_rh_port_status_2;
+- __u32 r_usb_irq_mask_read;
+- __u32 r_usb_fm_number;
+- struct work_struct usb_bh;
+-} usb_interrupt_registers_t;
+-
+-/* This struct is for passing data from the isoc top half to the isoc bottom half. */
+-typedef struct usb_isoc_complete_data
+-{
+- struct urb *urb;
+- struct work_struct usb_bh;
+-} usb_isoc_complete_data_t;
+-
+-/* This struct holds data we get from the rx descriptors for DMA channel 9
+- for periodic traffic (intr and isoc). */
+-typedef struct rx_data
+-{
+- void *data;
+- int length;
+- struct list_head list;
+-} rx_data_t;
+-
+-typedef struct urb_entry
+-{
+- struct urb *urb;
+- struct list_head list;
+-} urb_entry_t;
+-
+-/* ---------------------------------------------------------------------------
+- Virtual Root HUB
+- ------------------------------------------------------------------------- */
+-/* destination of request */
+-#define RH_INTERFACE 0x01
+-#define RH_ENDPOINT 0x02
+-#define RH_OTHER 0x03
+-
+-#define RH_CLASS 0x20
+-#define RH_VENDOR 0x40
+-
+-/* Requests: bRequest << 8 | bmRequestType */
+-#define RH_GET_STATUS 0x0080
+-#define RH_CLEAR_FEATURE 0x0100
+-#define RH_SET_FEATURE 0x0300
+-#define RH_SET_ADDRESS 0x0500
+-#define RH_GET_DESCRIPTOR 0x0680
+-#define RH_SET_DESCRIPTOR 0x0700
+-#define RH_GET_CONFIGURATION 0x0880
+-#define RH_SET_CONFIGURATION 0x0900
+-#define RH_GET_STATE 0x0280
+-#define RH_GET_INTERFACE 0x0A80
+-#define RH_SET_INTERFACE 0x0B00
+-#define RH_SYNC_FRAME 0x0C80
+-/* Our Vendor Specific Request */
+-#define RH_SET_EP 0x2000
+-
+-
+-/* Hub port features */
+-#define RH_PORT_CONNECTION 0x00
+-#define RH_PORT_ENABLE 0x01
+-#define RH_PORT_SUSPEND 0x02
+-#define RH_PORT_OVER_CURRENT 0x03
+-#define RH_PORT_RESET 0x04
+-#define RH_PORT_POWER 0x08
+-#define RH_PORT_LOW_SPEED 0x09
+-#define RH_C_PORT_CONNECTION 0x10
+-#define RH_C_PORT_ENABLE 0x11
+-#define RH_C_PORT_SUSPEND 0x12
+-#define RH_C_PORT_OVER_CURRENT 0x13
+-#define RH_C_PORT_RESET 0x14
+-
+-/* Hub features */
+-#define RH_C_HUB_LOCAL_POWER 0x00
+-#define RH_C_HUB_OVER_CURRENT 0x01
+-
+-#define RH_DEVICE_REMOTE_WAKEUP 0x00
+-#define RH_ENDPOINT_STALL 0x01
+-
+-/* Our Vendor Specific feature */
+-#define RH_REMOVE_EP 0x00
+-
+-
+-#define RH_ACK 0x01
+-#define RH_REQ_ERR -1
+-#define RH_NACK 0x00
+-
+-/* Field definitions for */
+-
+-#define USB_IN_command__eol__BITNR 0 /* command macros */
+-#define USB_IN_command__eol__WIDTH 1
+-#define USB_IN_command__eol__no 0
+-#define USB_IN_command__eol__yes 1
+-
+-#define USB_IN_command__intr__BITNR 3
+-#define USB_IN_command__intr__WIDTH 1
+-#define USB_IN_command__intr__no 0
+-#define USB_IN_command__intr__yes 1
+-
+-#define USB_IN_status__eop__BITNR 1 /* status macros. */
+-#define USB_IN_status__eop__WIDTH 1
+-#define USB_IN_status__eop__no 0
+-#define USB_IN_status__eop__yes 1
+-
+-#define USB_IN_status__eot__BITNR 5
+-#define USB_IN_status__eot__WIDTH 1
+-#define USB_IN_status__eot__no 0
+-#define USB_IN_status__eot__yes 1
+-
+-#define USB_IN_status__error__BITNR 6
+-#define USB_IN_status__error__WIDTH 1
+-#define USB_IN_status__error__no 0
+-#define USB_IN_status__error__yes 1
+-
+-#define USB_IN_status__nodata__BITNR 7
+-#define USB_IN_status__nodata__WIDTH 1
+-#define USB_IN_status__nodata__no 0
+-#define USB_IN_status__nodata__yes 1
+-
+-#define USB_IN_status__epid__BITNR 8
+-#define USB_IN_status__epid__WIDTH 5
+-
+-#define USB_EP_command__eol__BITNR 0
+-#define USB_EP_command__eol__WIDTH 1
+-#define USB_EP_command__eol__no 0
+-#define USB_EP_command__eol__yes 1
+-
+-#define USB_EP_command__eof__BITNR 1
+-#define USB_EP_command__eof__WIDTH 1
+-#define USB_EP_command__eof__no 0
+-#define USB_EP_command__eof__yes 1
+-
+-#define USB_EP_command__intr__BITNR 3
+-#define USB_EP_command__intr__WIDTH 1
+-#define USB_EP_command__intr__no 0
+-#define USB_EP_command__intr__yes 1
+-
+-#define USB_EP_command__enable__BITNR 4
+-#define USB_EP_command__enable__WIDTH 1
+-#define USB_EP_command__enable__no 0
+-#define USB_EP_command__enable__yes 1
+-
+-#define USB_EP_command__hw_valid__BITNR 5
+-#define USB_EP_command__hw_valid__WIDTH 1
+-#define USB_EP_command__hw_valid__no 0
+-#define USB_EP_command__hw_valid__yes 1
+-
+-#define USB_EP_command__epid__BITNR 8
+-#define USB_EP_command__epid__WIDTH 5
+-
+-#define USB_SB_command__eol__BITNR 0 /* command macros. */
+-#define USB_SB_command__eol__WIDTH 1
+-#define USB_SB_command__eol__no 0
+-#define USB_SB_command__eol__yes 1
+-
+-#define USB_SB_command__eot__BITNR 1
+-#define USB_SB_command__eot__WIDTH 1
+-#define USB_SB_command__eot__no 0
+-#define USB_SB_command__eot__yes 1
+-
+-#define USB_SB_command__intr__BITNR 3
+-#define USB_SB_command__intr__WIDTH 1
+-#define USB_SB_command__intr__no 0
+-#define USB_SB_command__intr__yes 1
+-
+-#define USB_SB_command__tt__BITNR 4
+-#define USB_SB_command__tt__WIDTH 2
+-#define USB_SB_command__tt__zout 0
+-#define USB_SB_command__tt__in 1
+-#define USB_SB_command__tt__out 2
+-#define USB_SB_command__tt__setup 3
+-
+-
+-#define USB_SB_command__rem__BITNR 8
+-#define USB_SB_command__rem__WIDTH 6
+-
+-#define USB_SB_command__full__BITNR 6
+-#define USB_SB_command__full__WIDTH 1
+-#define USB_SB_command__full__no 0
+-#define USB_SB_command__full__yes 1
+-
+-#endif
+--- linux-2.6.19.2.orig/drivers/usb/host/hc-crisv10.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/drivers/usb/host/hc-crisv10.h 2006-01-27 13:59:58.000000000 +0100
+@@ -0,0 +1,330 @@
++#ifndef __LINUX_ETRAX_USB_H
++#define __LINUX_ETRAX_USB_H
++
++#include <linux/types.h>
++#include <linux/list.h>
++
++struct USB_IN_Desc {
++ volatile __u16 sw_len;
++ volatile __u16 command;
++ volatile unsigned long next;
++ volatile unsigned long buf;
++ volatile __u16 hw_len;
++ volatile __u16 status;
++};
++
++struct USB_SB_Desc {
++ volatile __u16 sw_len;
++ volatile __u16 command;
++ volatile unsigned long next;
++ volatile unsigned long buf;
++};
++
++struct USB_EP_Desc {
++ volatile __u16 hw_len;
++ volatile __u16 command;
++ volatile unsigned long sub;
++ volatile unsigned long next;
++};
++
++
++/* Root Hub port status struct */
++struct crisv10_rh {
++ volatile __u16 wPortChange[2];
++ volatile __u16 wPortStatusPrev[2];
++};
++
++/* HCD description */
++struct crisv10_hcd {
++ spinlock_t lock;
++ __u8 num_ports;
++ __u8 running;
++};
++
++
++/* Endpoint HC private data description */
++struct crisv10_ep_priv {
++ int epid;
++};
++
++/* Additional software state info for a USB Controller epid */
++struct etrax_epid {
++ __u8 inuse; /* !0 = setup in Etrax and used for a endpoint */
++ __u8 disabled; /* !0 = Temporarly disabled to avoid resubmission */
++ __u8 type; /* Setup as: PIPE_BULK, PIPE_CONTROL ... */
++ __u8 out_traffic; /* !0 = This epid is for out traffic */
++};
++
++/* Struct to hold information of scheduled later URB completion */
++struct urb_later_data {
++ struct work_struct ws;
++ struct usb_hcd *hcd;
++ struct urb *urb;
++ int urb_num;
++ int status;
++};
++
++
++typedef enum {
++ STARTED,
++ NOT_STARTED,
++ UNLINK,
++} crisv10_urb_state_t;
++
++
++struct crisv10_urb_priv {
++ /* Sequence number for this URB. Every new submited URB gets this from
++ a incrementing counter. Used when a URB is scheduled for later finish to
++ be sure that the intended URB hasn't already been completed (device
++ drivers has a tendency to reuse URBs once they are completed, causing us
++ to not be able to single old ones out only based on the URB pointer.) */
++ __u32 urb_num;
++
++ /* The first_sb field is used for freeing all SB descriptors belonging
++ to an urb. The corresponding ep descriptor's sub pointer cannot be
++ used for this since the DMA advances the sub pointer as it processes
++ the sb list. */
++ struct USB_SB_Desc *first_sb;
++
++ /* The last_sb field referes to the last SB descriptor that belongs to
++ this urb. This is important to know so we can free the SB descriptors
++ that ranges between first_sb and last_sb. */
++ struct USB_SB_Desc *last_sb;
++
++ /* The rx_offset field is used in ctrl and bulk traffic to keep track
++ of the offset in the urb's transfer_buffer where incoming data should be
++ copied to. */
++ __u32 rx_offset;
++
++ /* Counter used in isochronous transfers to keep track of the
++ number of packets received/transmitted. */
++ __u32 isoc_packet_counter;
++
++ /* Flag that marks if this Isoc Out URB has finished it's transfer. Used
++ because several URBs can be finished before list is processed */
++ __u8 isoc_out_done;
++
++ /* This field is used to pass information about the urb's current state
++ between the various interrupt handlers (thus marked volatile). */
++ volatile crisv10_urb_state_t urb_state;
++
++ /* In Ctrl transfers consist of (at least) 3 packets: SETUP, IN and ZOUT.
++ When DMA8 sub-channel 2 has processed the SB list for this sequence we
++ get a interrupt. We also get a interrupt for In transfers and which
++ one of these interrupts that comes first depends of data size and device.
++ To be sure that we have got both interrupts before we complete the URB
++ we have these to flags that shows which part that has completed.
++ We can then check when we get one of the interrupts that if the other has
++ occured it's safe for us to complete the URB, otherwise we set appropriate
++ flag and do the completion when we get the other interrupt. */
++ volatile unsigned char ctrl_zout_done;
++ volatile unsigned char ctrl_rx_done;
++
++ /* Connection between the submitted urb and ETRAX epid number */
++ __u8 epid;
++
++ /* The rx_data_list field is used for periodic traffic, to hold
++ received data for later processing in the the complete_urb functions,
++ where the data us copied to the urb's transfer_buffer. Basically, we
++ use this intermediate storage because we don't know when it's safe to
++ reuse the transfer_buffer (FIXME?). */
++ struct list_head rx_data_list;
++
++
++ /* The interval time rounded up to closest 2^N */
++ int interval;
++
++ /* Pool of EP descriptors needed if it's a INTR transfer.
++ Amount of EPs in pool correspons to how many INTR that should
++ be inserted in TxIntrEPList (max 128, defined by MAX_INTR_INTERVAL) */
++ struct USB_EP_Desc* intr_ep_pool[128];
++
++ /* The mount of EPs allocated for this INTR URB */
++ int intr_ep_pool_length;
++
++ /* Pointer to info struct if URB is scheduled to be finished later */
++ struct urb_later_data* later_data;
++};
++
++
++/* This struct is for passing data from the top half to the bottom half irq
++ handlers */
++struct crisv10_irq_reg {
++ struct usb_hcd* hcd;
++ __u32 r_usb_epid_attn;
++ __u8 r_usb_status;
++ __u16 r_usb_rh_port_status_1;
++ __u16 r_usb_rh_port_status_2;
++ __u32 r_usb_irq_mask_read;
++ __u32 r_usb_fm_number;
++ struct work_struct usb_bh;
++};
++
++
++/* This struct is for passing data from the isoc top half to the isoc bottom
++ half. */
++struct crisv10_isoc_complete_data {
++ struct usb_hcd *hcd;
++ struct urb *urb;
++ struct work_struct usb_bh;
++};
++
++/* Entry item for URB lists for each endpint */
++typedef struct urb_entry
++{
++ struct urb *urb;
++ struct list_head list;
++} urb_entry_t;
++
++/* ---------------------------------------------------------------------------
++ Virtual Root HUB
++ ------------------------------------------------------------------------- */
++/* destination of request */
++#define RH_INTERFACE 0x01
++#define RH_ENDPOINT 0x02
++#define RH_OTHER 0x03
++
++#define RH_CLASS 0x20
++#define RH_VENDOR 0x40
++
++/* Requests: bRequest << 8 | bmRequestType */
++#define RH_GET_STATUS 0x0080
++#define RH_CLEAR_FEATURE 0x0100
++#define RH_SET_FEATURE 0x0300
++#define RH_SET_ADDRESS 0x0500
++#define RH_GET_DESCRIPTOR 0x0680
++#define RH_SET_DESCRIPTOR 0x0700
++#define RH_GET_CONFIGURATION 0x0880
++#define RH_SET_CONFIGURATION 0x0900
++#define RH_GET_STATE 0x0280
++#define RH_GET_INTERFACE 0x0A80
++#define RH_SET_INTERFACE 0x0B00
++#define RH_SYNC_FRAME 0x0C80
++/* Our Vendor Specific Request */
++#define RH_SET_EP 0x2000
++
++
++/* Hub port features */
++#define RH_PORT_CONNECTION 0x00
++#define RH_PORT_ENABLE 0x01
++#define RH_PORT_SUSPEND 0x02
++#define RH_PORT_OVER_CURRENT 0x03
++#define RH_PORT_RESET 0x04
++#define RH_PORT_POWER 0x08
++#define RH_PORT_LOW_SPEED 0x09
++#define RH_C_PORT_CONNECTION 0x10
++#define RH_C_PORT_ENABLE 0x11
++#define RH_C_PORT_SUSPEND 0x12
++#define RH_C_PORT_OVER_CURRENT 0x13
++#define RH_C_PORT_RESET 0x14
++
++/* Hub features */
++#define RH_C_HUB_LOCAL_POWER 0x00
++#define RH_C_HUB_OVER_CURRENT 0x01
++
++#define RH_DEVICE_REMOTE_WAKEUP 0x00
++#define RH_ENDPOINT_STALL 0x01
++
++/* Our Vendor Specific feature */
++#define RH_REMOVE_EP 0x00
++
++
++#define RH_ACK 0x01
++#define RH_REQ_ERR -1
++#define RH_NACK 0x00
++
++/* Field definitions for */
++
++#define USB_IN_command__eol__BITNR 0 /* command macros */
++#define USB_IN_command__eol__WIDTH 1
++#define USB_IN_command__eol__no 0
++#define USB_IN_command__eol__yes 1
++
++#define USB_IN_command__intr__BITNR 3
++#define USB_IN_command__intr__WIDTH 1
++#define USB_IN_command__intr__no 0
++#define USB_IN_command__intr__yes 1
++
++#define USB_IN_status__eop__BITNR 1 /* status macros. */
++#define USB_IN_status__eop__WIDTH 1
++#define USB_IN_status__eop__no 0
++#define USB_IN_status__eop__yes 1
++
++#define USB_IN_status__eot__BITNR 5
++#define USB_IN_status__eot__WIDTH 1
++#define USB_IN_status__eot__no 0
++#define USB_IN_status__eot__yes 1
++
++#define USB_IN_status__error__BITNR 6
++#define USB_IN_status__error__WIDTH 1
++#define USB_IN_status__error__no 0
++#define USB_IN_status__error__yes 1
++
++#define USB_IN_status__nodata__BITNR 7
++#define USB_IN_status__nodata__WIDTH 1
++#define USB_IN_status__nodata__no 0
++#define USB_IN_status__nodata__yes 1
++
++#define USB_IN_status__epid__BITNR 8
++#define USB_IN_status__epid__WIDTH 5
++
++#define USB_EP_command__eol__BITNR 0
++#define USB_EP_command__eol__WIDTH 1
++#define USB_EP_command__eol__no 0
++#define USB_EP_command__eol__yes 1
++
++#define USB_EP_command__eof__BITNR 1
++#define USB_EP_command__eof__WIDTH 1
++#define USB_EP_command__eof__no 0
++#define USB_EP_command__eof__yes 1
++
++#define USB_EP_command__intr__BITNR 3
++#define USB_EP_command__intr__WIDTH 1
++#define USB_EP_command__intr__no 0
++#define USB_EP_command__intr__yes 1
++
++#define USB_EP_command__enable__BITNR 4
++#define USB_EP_command__enable__WIDTH 1
++#define USB_EP_command__enable__no 0
++#define USB_EP_command__enable__yes 1
++
++#define USB_EP_command__hw_valid__BITNR 5
++#define USB_EP_command__hw_valid__WIDTH 1
++#define USB_EP_command__hw_valid__no 0
++#define USB_EP_command__hw_valid__yes 1
++
++#define USB_EP_command__epid__BITNR 8
++#define USB_EP_command__epid__WIDTH 5
++
++#define USB_SB_command__eol__BITNR 0 /* command macros. */
++#define USB_SB_command__eol__WIDTH 1
++#define USB_SB_command__eol__no 0
++#define USB_SB_command__eol__yes 1
++
++#define USB_SB_command__eot__BITNR 1
++#define USB_SB_command__eot__WIDTH 1
++#define USB_SB_command__eot__no 0
++#define USB_SB_command__eot__yes 1
++
++#define USB_SB_command__intr__BITNR 3
++#define USB_SB_command__intr__WIDTH 1
++#define USB_SB_command__intr__no 0
++#define USB_SB_command__intr__yes 1
++
++#define USB_SB_command__tt__BITNR 4
++#define USB_SB_command__tt__WIDTH 2
++#define USB_SB_command__tt__zout 0
++#define USB_SB_command__tt__in 1
++#define USB_SB_command__tt__out 2
++#define USB_SB_command__tt__setup 3
++
++
++#define USB_SB_command__rem__BITNR 8
++#define USB_SB_command__rem__WIDTH 6
++
++#define USB_SB_command__full__BITNR 6
++#define USB_SB_command__full__WIDTH 1
++#define USB_SB_command__full__no 0
++#define USB_SB_command__full__yes 1
++
++#endif
+diff -urN linux-2.6.19.2.orig/drivers/net/cris/Makefile linux-2.6.19.2.dev/drivers/net/cris/Makefile
+--- linux-2.6.19.2.orig/drivers/net/cris/Makefile 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/drivers/net/cris/Makefile 2005-01-04 13:09:12.000000000 +0100
+@@ -1 +1,2 @@
+ obj-$(CONFIG_ETRAX_ARCH_V10) += eth_v10.o
++obj-$(CONFIG_ETRAX_ARCH_V32) += eth_v32.o
+diff -urN linux-2.6.19.2.orig/drivers/net/cris/eth_v10.c linux-2.6.19.2.dev/drivers/net/cris/eth_v10.c
+--- linux-2.6.19.2.orig/drivers/net/cris/eth_v10.c 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.dev/drivers/net/cris/eth_v10.c 2007-01-15 16:35:48.000000000 +0100
+@@ -1,221 +1,10 @@
+-/* $Id: ethernet.c,v 1.31 2004/10/18 14:49:03 starvik Exp $
+- *
+- * e100net.c: A network driver for the ETRAX 100LX network controller.
++/*
++ * Driver for the ETRAX 100LX network controller.
+ *
+- * Copyright (c) 1998-2002 Axis Communications AB.
++ * Copyright (c) 1998-2006 Axis Communications AB.
+ *
+ * The outline of this driver comes from skeleton.c.
+ *
+- * $Log: ethernet.c,v $
+- * Revision 1.31 2004/10/18 14:49:03 starvik
+- * Use RX interrupt as random source
+- *
+- * Revision 1.30 2004/09/29 10:44:04 starvik
+- * Enabed MAC-address output again
+- *
+- * Revision 1.29 2004/08/24 07:14:05 starvik
+- * Make use of generic MDIO interface and constants.
+- *
+- * Revision 1.28 2004/08/20 09:37:11 starvik
+- * Added support for Intel LXT972A. Creds to Randy Scarborough.
+- *
+- * Revision 1.27 2004/08/16 12:37:22 starvik
+- * Merge of Linux 2.6.8
+- *
+- * Revision 1.25 2004/06/21 10:29:57 starvik
+- * Merge of Linux 2.6.7
+- *
+- * Revision 1.23 2004/06/09 05:29:22 starvik
+- * Avoid any race where R_DMA_CH1_FIRST is NULL (may trigger cache bug).
+- *
+- * Revision 1.22 2004/05/14 07:58:03 starvik
+- * Merge of changes from 2.4
+- *
+- * Revision 1.20 2004/03/11 11:38:40 starvik
+- * Merge of Linux 2.6.4
+- *
+- * Revision 1.18 2003/12/03 13:45:46 starvik
+- * Use hardware pad for short packets to prevent information leakage.
+- *
+- * Revision 1.17 2003/07/04 08:27:37 starvik
+- * Merge of Linux 2.5.74
+- *
+- * Revision 1.16 2003/04/24 08:28:22 starvik
+- * New LED behaviour: LED off when no link
+- *
+- * Revision 1.15 2003/04/09 05:20:47 starvik
+- * Merge of Linux 2.5.67
+- *
+- * Revision 1.13 2003/03/06 16:11:01 henriken
+- * Off by one error in group address register setting.
+- *
+- * Revision 1.12 2003/02/27 17:24:19 starvik
+- * Corrected Rev to Revision
+- *
+- * Revision 1.11 2003/01/24 09:53:21 starvik
+- * Oops. Initialize GA to 0, not to 1
+- *
+- * Revision 1.10 2003/01/24 09:50:55 starvik
+- * Initialize GA_0 and GA_1 to 0 to avoid matching of unwanted packets
+- *
+- * Revision 1.9 2002/12/13 07:40:58 starvik
+- * Added basic ethtool interface
+- * Handled out of memory when allocating new buffers
+- *
+- * Revision 1.8 2002/12/11 13:13:57 starvik
+- * Added arch/ to v10 specific includes
+- * Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
+- *
+- * Revision 1.7 2002/11/26 09:41:42 starvik
+- * Added e100_set_config (standard interface to set media type)
+- * Added protection against preemptive scheduling
+- * Added standard MII ioctls
+- *
+- * Revision 1.6 2002/11/21 07:18:18 starvik
+- * Timers must be initialized in 2.5.48
+- *
+- * Revision 1.5 2002/11/20 11:56:11 starvik
+- * Merge of Linux 2.5.48
+- *
+- * Revision 1.4 2002/11/18 07:26:46 starvik
+- * Linux 2.5 port of latest Linux 2.4 ethernet driver
+- *
+- * Revision 1.33 2002/10/02 20:16:17 hp
+- * SETF, SETS: Use underscored IO_x_ macros rather than incorrect token concatenation
+- *
+- * Revision 1.32 2002/09/16 06:05:58 starvik
+- * Align memory returned by dev_alloc_skb
+- * Moved handling of sent packets to interrupt to avoid reference counting problem
+- *
+- * Revision 1.31 2002/09/10 13:28:23 larsv
+- * Return -EINVAL for unknown ioctls to avoid confusing tools that tests
+- * for supported functionality by issuing special ioctls, i.e. wireless
+- * extensions.
+- *
+- * Revision 1.30 2002/05/07 18:50:08 johana
+- * Correct spelling in comments.
+- *
+- * Revision 1.29 2002/05/06 05:38:49 starvik
+- * Performance improvements:
+- * Large packets are not copied (breakpoint set to 256 bytes)
+- * The cache bug workaround is delayed until half of the receive list
+- * has been used
+- * Added transmit list
+- * Transmit interrupts are only enabled when transmit queue is full
+- *
+- * Revision 1.28.2.1 2002/04/30 08:15:51 starvik
+- * Performance improvements:
+- * Large packets are not copied (breakpoint set to 256 bytes)
+- * The cache bug workaround is delayed until half of the receive list
+- * has been used.
+- * Added transmit list
+- * Transmit interrupts are only enabled when transmit queue is full
+- *
+- * Revision 1.28 2002/04/22 11:47:21 johana
+- * Fix according to 2.4.19-pre7. time_after/time_before and
+- * missing end of comment.
+- * The patch has a typo for ethernet.c in e100_clear_network_leds(),
+- * that is fixed here.
+- *
+- * Revision 1.27 2002/04/12 11:55:11 bjornw
+- * Added TODO
+- *
+- * Revision 1.26 2002/03/15 17:11:02 bjornw
+- * Use prepare_rx_descriptor after the CPU has touched the receiving descs
+- *
+- * Revision 1.25 2002/03/08 13:07:53 bjornw
+- * Unnecessary spinlock removed
+- *
+- * Revision 1.24 2002/02/20 12:57:43 fredriks
+- * Replaced MIN() with min().
+- *
+- * Revision 1.23 2002/02/20 10:58:14 fredriks
+- * Strip the Ethernet checksum (4 bytes) before forwarding a frame to upper layers.
+- *
+- * Revision 1.22 2002/01/30 07:48:22 matsfg
+- * Initiate R_NETWORK_TR_CTRL
+- *
+- * Revision 1.21 2001/11/23 11:54:49 starvik
+- * Added IFF_PROMISC and IFF_ALLMULTI handling in set_multicast_list
+- * Removed compiler warnings
+- *
+- * Revision 1.20 2001/11/12 19:26:00 pkj
+- * * Corrected e100_negotiate() to not assign half to current_duplex when
+- * it was supposed to compare them...
+- * * Cleaned up failure handling in e100_open().
+- * * Fixed compiler warnings.
+- *
+- * Revision 1.19 2001/11/09 07:43:09 starvik
+- * Added full duplex support
+- * Added ioctl to set speed and duplex
+- * Clear LED timer only runs when LED is lit
+- *
+- * Revision 1.18 2001/10/03 14:40:43 jonashg
+- * Update rx_bytes counter.
+- *
+- * Revision 1.17 2001/06/11 12:43:46 olof
+- * Modified defines for network LED behavior
+- *
+- * Revision 1.16 2001/05/30 06:12:46 markusl
+- * TxDesc.next should not be set to NULL
+- *
+- * Revision 1.15 2001/05/29 10:27:04 markusl
+- * Updated after review remarks:
+- * +Use IO_EXTRACT
+- * +Handle underrun
+- *
+- * Revision 1.14 2001/05/29 09:20:14 jonashg
+- * Use driver name on printk output so one can tell which driver that complains.
+- *
+- * Revision 1.13 2001/05/09 12:35:59 johana
+- * Use DMA_NBR and IRQ_NBR defines from dma.h and irq.h
+- *
+- * Revision 1.12 2001/04/05 11:43:11 tobiasa
+- * Check dev before panic.
+- *
+- * Revision 1.11 2001/04/04 11:21:05 markusl
+- * Updated according to review remarks
+- *
+- * Revision 1.10 2001/03/26 16:03:06 bjornw
+- * Needs linux/config.h
+- *
+- * Revision 1.9 2001/03/19 14:47:48 pkj
+- * * Make sure there is always a pause after the network LEDs are
+- * changed so they will not look constantly lit during heavy traffic.
+- * * Always use HZ when setting times relative to jiffies.
+- * * Use LED_NETWORK_SET() when setting the network LEDs.
+- *
+- * Revision 1.8 2001/02/27 13:52:48 bjornw
+- * malloc.h -> slab.h
+- *
+- * Revision 1.7 2001/02/23 13:46:38 bjornw
+- * Spellling check
+- *
+- * Revision 1.6 2001/01/26 15:21:04 starvik
+- * Don't disable interrupts while reading MDIO registers (MDIO is slow)
+- * Corrected promiscuous mode
+- * Improved deallocation of IRQs ("ifconfig eth0 down" now works)
+- *
+- * Revision 1.5 2000/11/29 17:22:22 bjornw
+- * Get rid of the udword types legacy stuff
+- *
+- * Revision 1.4 2000/11/22 16:36:09 bjornw
+- * Please marketing by using the correct case when spelling Etrax.
+- *
+- * Revision 1.3 2000/11/21 16:43:04 bjornw
+- * Minor short->int change
+- *
+- * Revision 1.2 2000/11/08 14:27:57 bjornw
+- * 2.4 port
+- *
+- * Revision 1.1 2000/11/06 13:56:00 bjornw
+- * Verbatim copy of the 1.24 version of e100net.c from elinux
+- *
+- * Revision 1.24 2000/10/04 15:55:23 bjornw
+- * * Use virt_to_phys etc. for DMA addresses
+- * * Removed bogus CHECKSUM_UNNECESSARY
+- *
+- *
+ */
+
+
+@@ -251,6 +40,7 @@
+ #include <asm/bitops.h>
+ #include <asm/ethernet.h>
+ #include <asm/cache.h>
++#include <asm/arch/io_interface_mux.h>
+
+ //#define ETHDEBUG
+ #define D(x)
+@@ -280,6 +70,9 @@
+ * by this lock as well.
+ */
+ spinlock_t lock;
++
++ spinlock_t led_lock; /* Protect LED state */
++ spinlock_t transceiver_lock; /* Protect transceiver state. */
+ };
+
+ typedef struct etrax_eth_descr
+@@ -296,8 +89,6 @@
+ void (*check_duplex)(struct net_device* dev);
+ };
+
+-struct transceiver_ops* transceiver;
+-
+ /* Duplex settings */
+ enum duplex
+ {
+@@ -308,7 +99,7 @@
+
+ /* Dma descriptors etc. */
+
+-#define MAX_MEDIA_DATA_SIZE 1518
++#define MAX_MEDIA_DATA_SIZE 1522
+
+ #define MIN_PACKET_LEN 46
+ #define ETHER_HEAD_LEN 14
+@@ -332,9 +123,9 @@
+ #define MDIO_TDK_DIAGNOSTIC_DPLX 0x800
+
+ /*Intel LXT972A specific*/
+-#define MDIO_INT_STATUS_REG_2 0x0011
+-#define MDIO_INT_FULL_DUPLEX_IND ( 1 << 9 )
+-#define MDIO_INT_SPEED ( 1 << 14 )
++#define MDIO_INT_STATUS_REG_2 0x0011
++#define MDIO_INT_FULL_DUPLEX_IND (1 << 9)
++#define MDIO_INT_SPEED (1 << 14)
+
+ /* Network flash constants */
+ #define NET_FLASH_TIME (HZ/50) /* 20 ms */
+@@ -345,8 +136,8 @@
+ #define NO_NETWORK_ACTIVITY 0
+ #define NETWORK_ACTIVITY 1
+
+-#define NBR_OF_RX_DESC 64
+-#define NBR_OF_TX_DESC 256
++#define NBR_OF_RX_DESC 32
++#define NBR_OF_TX_DESC 16
+
+ /* Large packets are sent directly to upper layers while small packets are */
+ /* copied (to reduce memory waste). The following constant decides the breakpoint */
+@@ -368,7 +159,6 @@
+ static etrax_eth_descr *myNextRxDesc; /* Points to the next descriptor to
+ to be processed */
+ static etrax_eth_descr *myLastRxDesc; /* The last processed descriptor */
+-static etrax_eth_descr *myPrevRxDesc; /* The descriptor right before myNextRxDesc */
+
+ static etrax_eth_descr RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned(32)));
+
+@@ -378,7 +168,6 @@
+ static etrax_eth_descr TxDescList[NBR_OF_TX_DESC] __attribute__ ((aligned(32)));
+
+ static unsigned int network_rec_config_shadow = 0;
+-static unsigned int mdio_phy_addr; /* Transciever address */
+
+ static unsigned int network_tr_ctrl_shadow = 0;
+
+@@ -412,7 +201,7 @@
+ static void e100_tx_timeout(struct net_device *dev);
+ static struct net_device_stats *e100_get_stats(struct net_device *dev);
+ static void set_multicast_list(struct net_device *dev);
+-static void e100_hardware_send_packet(char *buf, int length);
++static void e100_hardware_send_packet(struct net_local* np, char *buf, int length);
+ static void update_rx_stats(struct net_device_stats *);
+ static void update_tx_stats(struct net_device_stats *);
+ static int e100_probe_transceiver(struct net_device* dev);
+@@ -435,7 +224,10 @@
+ static void e100_set_network_leds(int active);
+
+ static const struct ethtool_ops e100_ethtool_ops;
+-
++#if defined(CONFIG_ETRAX_NO_PHY)
++static void dummy_check_speed(struct net_device* dev);
++static void dummy_check_duplex(struct net_device* dev);
++#else
+ static void broadcom_check_speed(struct net_device* dev);
+ static void broadcom_check_duplex(struct net_device* dev);
+ static void tdk_check_speed(struct net_device* dev);
+@@ -444,16 +236,29 @@
+ static void intel_check_duplex(struct net_device* dev);
+ static void generic_check_speed(struct net_device* dev);
+ static void generic_check_duplex(struct net_device* dev);
++#endif
++#ifdef CONFIG_NET_POLL_CONTROLLER
++static void e100_netpoll(struct net_device* dev);
++#endif
++
++static int autoneg_normal = 1;
+
+ struct transceiver_ops transceivers[] =
+ {
++#if defined(CONFIG_ETRAX_NO_PHY)
++ {0x0000, dummy_check_speed, dummy_check_duplex} /* Dummy */
++#else
+ {0x1018, broadcom_check_speed, broadcom_check_duplex}, /* Broadcom */
+ {0xC039, tdk_check_speed, tdk_check_duplex}, /* TDK 2120 */
+ {0x039C, tdk_check_speed, tdk_check_duplex}, /* TDK 2120C */
+- {0x04de, intel_check_speed, intel_check_duplex}, /* Intel LXT972A*/
++ {0x04de, intel_check_speed, intel_check_duplex}, /* Intel LXT972A*/
+ {0x0000, generic_check_speed, generic_check_duplex} /* Generic, must be last */
++#endif
+ };
+
++struct transceiver_ops* transceiver = &transceivers[0];
++static unsigned int mdio_phy_addr = 0; /* PHY address on MDIO bus */
++
+ #define tx_done(dev) (*R_DMA_CH0_CMD == 0)
+
+ /*
+@@ -468,18 +273,26 @@
+ etrax_ethernet_init(void)
+ {
+ struct net_device *dev;
+- struct net_local* np;
++ struct net_local* np;
+ int i, err;
+
+ printk(KERN_INFO
+- "ETRAX 100LX 10/100MBit ethernet v2.0 (c) 2000-2003 Axis Communications AB\n");
+-
++ "ETRAX 100LX 10/100MBit ethernet v2.0 (c) 1998-2006 Axis Communications AB\n");
++
++ if (cris_request_io_interface(if_eth, cardname)) {
++ printk(KERN_CRIT "etrax_ethernet_init failed to get IO interface\n");
++ return -EBUSY;
++ }
++
+ dev = alloc_etherdev(sizeof(struct net_local));
+- np = dev->priv;
+-
+ if (!dev)
+ return -ENOMEM;
++
++ np = netdev_priv(dev);
+
++ /* we do our own locking */
++ dev->features |= NETIF_F_LLTX;
++
+ dev->base_addr = (unsigned int)R_NETWORK_SA_0; /* just to have something to show */
+
+ /* now setup our etrax specific stuff */
+@@ -495,18 +308,26 @@
+ dev->get_stats = e100_get_stats;
+ dev->set_multicast_list = set_multicast_list;
+ dev->set_mac_address = e100_set_mac_address;
+- dev->ethtool_ops = &e100_ethtool_ops;
++ dev->ethtool_ops = &e100_ethtool_ops;
+ dev->do_ioctl = e100_ioctl;
+- dev->set_config = e100_set_config;
++ dev->set_config = e100_set_config;
+ dev->tx_timeout = e100_tx_timeout;
++#ifdef CONFIG_NET_POLL_CONTROLLER
++ dev->poll_controller = e100_netpoll;
++#endif
++
++ spin_lock_init(&np->lock);
++ spin_lock_init(&np->led_lock);
++ spin_lock_init(&np->transceiver_lock);
+
+ /* Initialise the list of Etrax DMA-descriptors */
+
+ /* Initialise receive descriptors */
+
+ for (i = 0; i < NBR_OF_RX_DESC; i++) {
+- /* Allocate two extra cachelines to make sure that buffer used by DMA
+- * does not share cacheline with any other data (to avoid cache bug)
++ /* Allocate two extra cachelines to make sure that buffer used
++ * by DMA does not share cacheline with any other data (to
++ * avoid cache bug)
+ */
+ RxDescList[i].skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
+ if (!RxDescList[i].skb)
+@@ -517,6 +338,7 @@
+ RxDescList[i].descr.buf = L1_CACHE_ALIGN(virt_to_phys(RxDescList[i].skb->data));
+ RxDescList[i].descr.status = 0;
+ RxDescList[i].descr.hw_len = 0;
++
+ prepare_rx_descriptor(&RxDescList[i].descr);
+ }
+
+@@ -542,7 +364,6 @@
+
+ myNextRxDesc = &RxDescList[0];
+ myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
+- myPrevRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
+ myFirstTxDesc = &TxDescList[0];
+ myNextTxDesc = &TxDescList[0];
+ myLastTxDesc = &TxDescList[NBR_OF_TX_DESC - 1];
+@@ -563,18 +384,19 @@
+ current_speed = 10;
+ current_speed_selection = 0; /* Auto */
+ speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
+- duplex_timer.data = (unsigned long)dev;
++ speed_timer.data = (unsigned long)dev;
+ speed_timer.function = e100_check_speed;
+
+ clear_led_timer.function = e100_clear_network_leds;
++ clear_led_timer.data = (unsigned long)dev;
+
+ full_duplex = 0;
+ current_duplex = autoneg;
+ duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
+- duplex_timer.data = (unsigned long)dev;
++ duplex_timer.data = (unsigned long)dev;
+ duplex_timer.function = e100_check_duplex;
+
+- /* Initialize mii interface */
++ /* Initialize mii interface */
+ np->mii_if.phy_id = mdio_phy_addr;
+ np->mii_if.phy_id_mask = 0x1f;
+ np->mii_if.reg_num_mask = 0x1f;
+@@ -586,6 +408,9 @@
+ /* unwanted addresses are matched */
+ *R_NETWORK_GA_0 = 0x00000000;
+ *R_NETWORK_GA_1 = 0x00000000;
++
++ /* Initialize next time the led can flash */
++ led_next_time = jiffies;
+ return 0;
+ }
+
+@@ -596,7 +421,7 @@
+ static int
+ e100_set_mac_address(struct net_device *dev, void *p)
+ {
+- struct net_local *np = (struct net_local *)dev->priv;
++ struct net_local *np = netdev_priv(dev);
+ struct sockaddr *addr = p;
+ int i;
+
+@@ -680,17 +505,36 @@
+ /* allocate the irq corresponding to the transmitting DMA */
+
+ if (request_irq(NETWORK_DMA_TX_IRQ_NBR, e100rxtx_interrupt, 0,
+- cardname, (void *)dev)) {
++ cardname, (void *)dev)) {
+ goto grace_exit1;
+ }
+
+ /* allocate the irq corresponding to the network errors etc */
+
+ if (request_irq(NETWORK_STATUS_IRQ_NBR, e100nw_interrupt, 0,
+- cardname, (void *)dev)) {
++ cardname, (void *)dev)) {
+ goto grace_exit2;
+ }
+
++ /*
++ * Always allocate the DMA channels after the IRQ,
++ * and clean up on failure.
++ */
++
++ if (cris_request_dma(NETWORK_TX_DMA_NBR,
++ cardname,
++ DMA_VERBOSE_ON_ERROR,
++ dma_eth)) {
++ goto grace_exit3;
++ }
++
++ if (cris_request_dma(NETWORK_RX_DMA_NBR,
++ cardname,
++ DMA_VERBOSE_ON_ERROR,
++ dma_eth)) {
++ goto grace_exit4;
++ }
++
+ /* give the HW an idea of what MAC address we want */
+
+ *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
+@@ -705,6 +549,7 @@
+
+ *R_NETWORK_REC_CONFIG = 0xd; /* broadcast rec, individ. rec, ma0 enabled */
+ #else
++ SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, max_size, size1522);
+ SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, broadcast, receive);
+ SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, ma0, enable);
+ SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
+@@ -724,8 +569,7 @@
+ SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, crc, enable);
+ *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
+
+- save_flags(flags);
+- cli();
++ local_irq_save(flags);
+
+ /* enable the irq's for ethernet DMA */
+
+@@ -757,12 +601,13 @@
+
+ *R_DMA_CH0_FIRST = 0;
+ *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
++ netif_start_queue(dev);
+
+- restore_flags(flags);
++ local_irq_restore(flags);
+
+ /* Probe for transceiver */
+ if (e100_probe_transceiver(dev))
+- goto grace_exit3;
++ goto grace_exit5;
+
+ /* Start duplex/speed timers */
+ add_timer(&speed_timer);
+@@ -771,10 +616,14 @@
+ /* We are now ready to accept transmit requeusts from
+ * the queueing layer of the networking.
+ */
+- netif_start_queue(dev);
++ netif_carrier_on(dev);
+
+ return 0;
+
++grace_exit5:
++ cris_free_dma(NETWORK_RX_DMA_NBR, cardname);
++grace_exit4:
++ cris_free_dma(NETWORK_TX_DMA_NBR, cardname);
+ grace_exit3:
+ free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
+ grace_exit2:
+@@ -785,7 +634,13 @@
+ return -EAGAIN;
+ }
+
+-
++#if defined(CONFIG_ETRAX_NO_PHY)
++static void
++dummy_check_speed(struct net_device* dev)
++{
++ current_speed = 100;
++}
++#else
+ static void
+ generic_check_speed(struct net_device* dev)
+ {
+@@ -821,15 +676,18 @@
+ data = e100_get_mdio_reg(dev, mdio_phy_addr, MDIO_INT_STATUS_REG_2);
+ current_speed = (data & MDIO_INT_SPEED ? 100 : 10);
+ }
+-
++#endif
+ static void
+ e100_check_speed(unsigned long priv)
+ {
+ struct net_device* dev = (struct net_device*)priv;
++ struct net_local *np = netdev_priv(dev);
+ static int led_initiated = 0;
+ unsigned long data;
+ int old_speed = current_speed;
+
++ spin_lock(&np->transceiver_lock);
++
+ data = e100_get_mdio_reg(dev, mdio_phy_addr, MII_BMSR);
+ if (!(data & BMSR_LSTATUS)) {
+ current_speed = 0;
+@@ -837,14 +695,22 @@
+ transceiver->check_speed(dev);
+ }
+
++ spin_lock(&np->led_lock);
+ if ((old_speed != current_speed) || !led_initiated) {
+ led_initiated = 1;
+ e100_set_network_leds(NO_NETWORK_ACTIVITY);
++ if (current_speed)
++ netif_carrier_on(dev);
++ else
++ netif_carrier_off(dev);
+ }
++ spin_unlock(&np->led_lock);
+
+ /* Reinitialize the timer. */
+ speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
+ add_timer(&speed_timer);
++
++ spin_unlock(&np->transceiver_lock);
+ }
+
+ static void
+@@ -857,7 +723,7 @@
+ ADVERTISE_10HALF | ADVERTISE_10FULL);
+
+ switch (current_speed_selection) {
+- case 10 :
++ case 10:
+ if (current_duplex == full)
+ data |= ADVERTISE_10FULL;
+ else if (current_duplex == half)
+@@ -866,7 +732,7 @@
+ data |= ADVERTISE_10HALF | ADVERTISE_10FULL;
+ break;
+
+- case 100 :
++ case 100:
+ if (current_duplex == full)
+ data |= ADVERTISE_100FULL;
+ else if (current_duplex == half)
+@@ -875,45 +741,54 @@
+ data |= ADVERTISE_100HALF | ADVERTISE_100FULL;
+ break;
+
+- case 0 : /* Auto */
++ case 0: /* Auto */
+ if (current_duplex == full)
+ data |= ADVERTISE_100FULL | ADVERTISE_10FULL;
+ else if (current_duplex == half)
+ data |= ADVERTISE_100HALF | ADVERTISE_10HALF;
+ else
+ data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
+- ADVERTISE_100HALF | ADVERTISE_100FULL;
++ ADVERTISE_100HALF | ADVERTISE_100FULL;
+ break;
+
+- default : /* assume autoneg speed and duplex */
++ default: /* assume autoneg speed and duplex */
+ data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
+- ADVERTISE_100HALF | ADVERTISE_100FULL;
++ ADVERTISE_100HALF | ADVERTISE_100FULL;
++ break;
+ }
+
+ e100_set_mdio_reg(dev, mdio_phy_addr, MII_ADVERTISE, data);
+
+ /* Renegotiate with link partner */
+- data = e100_get_mdio_reg(dev, mdio_phy_addr, MII_BMCR);
+- data |= BMCR_ANENABLE | BMCR_ANRESTART;
+-
++ if (autoneg_normal) {
++ data = e100_get_mdio_reg(dev, mdio_phy_addr, MII_BMCR);
++ data |= BMCR_ANENABLE | BMCR_ANRESTART;
++ }
+ e100_set_mdio_reg(dev, mdio_phy_addr, MII_BMCR, data);
+ }
+
+ static void
+ e100_set_speed(struct net_device* dev, unsigned long speed)
+ {
++ struct net_local *np = netdev_priv(dev);
++
++ spin_lock(&np->transceiver_lock);
+ if (speed != current_speed_selection) {
+ current_speed_selection = speed;
+ e100_negotiate(dev);
+ }
++ spin_unlock(&np->transceiver_lock);
+ }
+
+ static void
+ e100_check_duplex(unsigned long priv)
+ {
+ struct net_device *dev = (struct net_device *)priv;
+- struct net_local *np = (struct net_local *)dev->priv;
+- int old_duplex = full_duplex;
++ struct net_local *np = netdev_priv(dev);
++ int old_duplex;
++
++ spin_lock(&np->transceiver_lock);
++ old_duplex = full_duplex;
+ transceiver->check_duplex(dev);
+ if (old_duplex != full_duplex) {
+ /* Duplex changed */
+@@ -925,12 +800,20 @@
+ duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
+ add_timer(&duplex_timer);
+ np->mii_if.full_duplex = full_duplex;
++ spin_unlock(&np->transceiver_lock);
+ }
+-
++#if defined(CONFIG_ETRAX_NO_PHY)
++static void
++dummy_check_duplex(struct net_device* dev)
++{
++ full_duplex = 1;
++}
++#else
+ static void
+ generic_check_duplex(struct net_device* dev)
+ {
+ unsigned long data;
++
+ data = e100_get_mdio_reg(dev, mdio_phy_addr, MII_ADVERTISE);
+ if ((data & ADVERTISE_10FULL) ||
+ (data & ADVERTISE_100FULL))
+@@ -943,6 +826,7 @@
+ tdk_check_duplex(struct net_device* dev)
+ {
+ unsigned long data;
++
+ data = e100_get_mdio_reg(dev, mdio_phy_addr, MDIO_TDK_DIAGNOSTIC_REG);
+ full_duplex = (data & MDIO_TDK_DIAGNOSTIC_DPLX) ? 1 : 0;
+ }
+@@ -951,6 +835,7 @@
+ broadcom_check_duplex(struct net_device* dev)
+ {
+ unsigned long data;
++
+ data = e100_get_mdio_reg(dev, mdio_phy_addr, MDIO_AUX_CTRL_STATUS_REG);
+ full_duplex = (data & MDIO_BC_FULL_DUPLEX_IND) ? 1 : 0;
+ }
+@@ -959,26 +844,35 @@
+ intel_check_duplex(struct net_device* dev)
+ {
+ unsigned long data;
++
+ data = e100_get_mdio_reg(dev, mdio_phy_addr, MDIO_INT_STATUS_REG_2);
+ full_duplex = (data & MDIO_INT_FULL_DUPLEX_IND) ? 1 : 0;
+ }
+-
++#endif
+ static void
+ e100_set_duplex(struct net_device* dev, enum duplex new_duplex)
+ {
++ struct net_local *np = netdev_priv(dev);
++
++ spin_lock(&np->transceiver_lock);
+ if (new_duplex != current_duplex) {
+ current_duplex = new_duplex;
+ e100_negotiate(dev);
+ }
++ spin_unlock(&np->transceiver_lock);
+ }
+
+ static int
+ e100_probe_transceiver(struct net_device* dev)
+ {
++#if !defined(CONFIG_ETRAX_NO_PHY)
+ unsigned int phyid_high;
+ unsigned int phyid_low;
+ unsigned int oui;
+ struct transceiver_ops* ops = NULL;
++ struct net_local *np = netdev_priv(dev);
++
++ spin_lock(&np->transceiver_lock);
+
+ /* Probe MDIO physical address */
+ for (mdio_phy_addr = 0; mdio_phy_addr <= 31; mdio_phy_addr++) {
+@@ -986,7 +880,7 @@
+ break;
+ }
+ if (mdio_phy_addr == 32)
+- return -ENODEV;
++ return -ENODEV;
+
+ /* Get manufacturer */
+ phyid_high = e100_get_mdio_reg(dev, mdio_phy_addr, MII_PHYSID1);
+@@ -999,6 +893,8 @@
+ }
+ transceiver = ops;
+
++ spin_unlock(&np->transceiver_lock);
++#endif
+ return 0;
+ }
+
+@@ -1006,7 +902,7 @@
+ e100_get_mdio_reg(struct net_device *dev, int phy_id, int location)
+ {
+ unsigned short cmd; /* Data to be sent on MDIO port */
+- int data; /* Data read from MDIO */
++ int data; /* Data read from MDIO */
+ int bitCounter;
+
+ /* Start of frame, OP Code, Physical Address, Register Address */
+@@ -1082,6 +978,7 @@
+ e100_receive_mdio_bit()
+ {
+ unsigned char bit;
++
+ *R_NETWORK_MGM_CTRL = 0;
+ bit = IO_EXTRACT(R_NETWORK_STAT, mdio, *R_NETWORK_STAT);
+ udelay(1);
+@@ -1117,7 +1014,7 @@
+ static void
+ e100_tx_timeout(struct net_device *dev)
+ {
+- struct net_local *np = (struct net_local *)dev->priv;
++ struct net_local *np = netdev_priv(dev);
+ unsigned long flags;
+
+ spin_lock_irqsave(&np->lock, flags);
+@@ -1139,8 +1036,7 @@
+ e100_reset_transceiver(dev);
+
+ /* and get rid of the packets that never got an interrupt */
+- while (myFirstTxDesc != myNextTxDesc)
+- {
++ while (myFirstTxDesc != myNextTxDesc) {
+ dev_kfree_skb(myFirstTxDesc->skb);
+ myFirstTxDesc->skb = 0;
+ myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
+@@ -1166,7 +1062,7 @@
+ static int
+ e100_send_packet(struct sk_buff *skb, struct net_device *dev)
+ {
+- struct net_local *np = (struct net_local *)dev->priv;
++ struct net_local *np = netdev_priv(dev);
+ unsigned char *buf = skb->data;
+ unsigned long flags;
+
+@@ -1179,7 +1075,7 @@
+
+ dev->trans_start = jiffies;
+
+- e100_hardware_send_packet(buf, skb->len);
++ e100_hardware_send_packet(np, buf, skb->len);
+
+ myNextTxDesc = phys_to_virt(myNextTxDesc->descr.next);
+
+@@ -1202,13 +1098,15 @@
+ e100rxtx_interrupt(int irq, void *dev_id)
+ {
+ struct net_device *dev = (struct net_device *)dev_id;
+- struct net_local *np = (struct net_local *)dev->priv;
+- unsigned long irqbits = *R_IRQ_MASK2_RD;
++ struct net_local *np = netdev_priv(dev);
++ unsigned long irqbits;
+
+- /* Disable RX/TX IRQs to avoid reentrancy */
+- *R_IRQ_MASK2_CLR =
+- IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
+- IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
++ /*
++ * Note that both rx and tx interrupts are blocked at this point,
++ * regardless of which got us here.
++ */
++
++ irqbits = *R_IRQ_MASK2_RD;
+
+ /* Handle received packets */
+ if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma1_eop, active)) {
+@@ -1224,7 +1122,7 @@
+ * allocate a new buffer to put a packet in.
+ */
+ e100_rx(dev);
+- ((struct net_local *)dev->priv)->stats.rx_packets++;
++ np->stats.rx_packets++;
+ /* restart/continue on the channel, for safety */
+ *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, restart);
+ /* clear dma channel 1 eop/descr irq bits */
+@@ -1239,8 +1137,7 @@
+
+ /* Report any packets that have been sent */
+ while (myFirstTxDesc != phys_to_virt(*R_DMA_CH0_FIRST) &&
+- myFirstTxDesc != myNextTxDesc)
+- {
++ (netif_queue_stopped(dev) || myFirstTxDesc != myNextTxDesc)) {
+ np->stats.tx_bytes += myFirstTxDesc->skb->len;
+ np->stats.tx_packets++;
+
+@@ -1249,19 +1146,15 @@
+ dev_kfree_skb_irq(myFirstTxDesc->skb);
+ myFirstTxDesc->skb = 0;
+ myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
++ /* Wake up queue. */
++ netif_wake_queue(dev);
+ }
+
+ if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma0_eop, active)) {
+- /* acknowledge the eop interrupt and wake up queue */
++ /* acknowledge the eop interrupt. */
+ *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
+- netif_wake_queue(dev);
+ }
+
+- /* Enable RX/TX IRQs again */
+- *R_IRQ_MASK2_SET =
+- IO_STATE(R_IRQ_MASK2_SET, dma0_eop, set) |
+- IO_STATE(R_IRQ_MASK2_SET, dma1_eop, set);
+-
+ return IRQ_HANDLED;
+ }
+
+@@ -1269,7 +1162,7 @@
+ e100nw_interrupt(int irq, void *dev_id)
+ {
+ struct net_device *dev = (struct net_device *)dev_id;
+- struct net_local *np = (struct net_local *)dev->priv;
++ struct net_local *np = netdev_priv(dev);
+ unsigned long irqbits = *R_IRQ_MASK0_RD;
+
+ /* check for underrun irq */
+@@ -1291,7 +1184,6 @@
+ SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
+ *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
+ SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
+- *R_NETWORK_TR_CTRL = IO_STATE(R_NETWORK_TR_CTRL, clr_error, clr);
+ np->stats.tx_errors++;
+ D(printk("ethernet excessive collisions!\n"));
+ }
+@@ -1304,12 +1196,13 @@
+ {
+ struct sk_buff *skb;
+ int length = 0;
+- struct net_local *np = (struct net_local *)dev->priv;
++ struct net_local *np = netdev_priv(dev);
+ unsigned char *skb_data_ptr;
+ #ifdef ETHDEBUG
+ int i;
+ #endif
+-
++ etrax_eth_descr *prevRxDesc; /* The descriptor right before myNextRxDesc */
++ spin_lock(&np->led_lock);
+ if (!led_active && time_after(jiffies, led_next_time)) {
+ /* light the network leds depending on the current speed. */
+ e100_set_network_leds(NETWORK_ACTIVITY);
+@@ -1319,9 +1212,10 @@
+ led_active = 1;
+ mod_timer(&clear_led_timer, jiffies + HZ/10);
+ }
++ spin_unlock(&np->led_lock);
+
+ length = myNextRxDesc->descr.hw_len - 4;
+- ((struct net_local *)dev->priv)->stats.rx_bytes += length;
++ np->stats.rx_bytes += length;
+
+ #ifdef ETHDEBUG
+ printk("Got a packet of length %d:\n", length);
+@@ -1341,7 +1235,7 @@
+ if (!skb) {
+ np->stats.rx_errors++;
+ printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
+- return;
++ goto update_nextrxdesc;
+ }
+
+ skb_put(skb, length - ETHER_HEAD_LEN); /* allocate room for the packet body */
+@@ -1358,15 +1252,15 @@
+ else {
+ /* Large packet, send directly to upper layers and allocate new
+ * memory (aligned to cache line boundary to avoid bug).
+- * Before sending the skb to upper layers we must make sure that
+- * skb->data points to the aligned start of the packet.
++ * Before sending the skb to upper layers we must make sure
++ * that skb->data points to the aligned start of the packet.
+ */
+ int align;
+ struct sk_buff *new_skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
+ if (!new_skb) {
+ np->stats.rx_errors++;
+ printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
+- return;
++ goto update_nextrxdesc;
+ }
+ skb = myNextRxDesc->skb;
+ align = (int)phys_to_virt(myNextRxDesc->descr.buf) - (int)skb->data;
+@@ -1382,9 +1276,10 @@
+ /* Send the packet to the upper layers */
+ netif_rx(skb);
+
++ update_nextrxdesc:
+ /* Prepare for next packet */
+ myNextRxDesc->descr.status = 0;
+- myPrevRxDesc = myNextRxDesc;
++ prevRxDesc = myNextRxDesc;
+ myNextRxDesc = phys_to_virt(myNextRxDesc->descr.next);
+
+ rx_queue_len++;
+@@ -1392,9 +1287,9 @@
+ /* Check if descriptors should be returned */
+ if (rx_queue_len == RX_QUEUE_THRESHOLD) {
+ flush_etrax_cache();
+- myPrevRxDesc->descr.ctrl |= d_eol;
++ prevRxDesc->descr.ctrl |= d_eol;
+ myLastRxDesc->descr.ctrl &= ~d_eol;
+- myLastRxDesc = myPrevRxDesc;
++ myLastRxDesc = prevRxDesc;
+ rx_queue_len = 0;
+ }
+ }
+@@ -1403,7 +1298,7 @@
+ static int
+ e100_close(struct net_device *dev)
+ {
+- struct net_local *np = (struct net_local *)dev->priv;
++ struct net_local *np = netdev_priv(dev);
+
+ printk(KERN_INFO "Closing %s.\n", dev->name);
+
+@@ -1431,6 +1326,9 @@
+ free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
+ free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
+
++ cris_free_dma(NETWORK_TX_DMA_NBR, cardname);
++ cris_free_dma(NETWORK_RX_DMA_NBR, cardname);
++
+ /* Update the statistics here. */
+
+ update_rx_stats(&np->stats);
+@@ -1448,46 +1346,56 @@
+ {
+ struct mii_ioctl_data *data = if_mii(ifr);
+ struct net_local *np = netdev_priv(dev);
++ int ret = 0;
++ int old_autoneg;
+
+ spin_lock(&np->lock); /* Preempt protection */
+ switch (cmd) {
+- case SIOCGMIIPHY: /* Get PHY address */
++ case SIOCGMIIPHY: /* Get PHY address */
+ data->phy_id = mdio_phy_addr;
+ break;
+- case SIOCGMIIREG: /* Read MII register */
++ case SIOCGMIIREG: /* Read MII register */
+ data->val_out = e100_get_mdio_reg(dev, mdio_phy_addr, data->reg_num);
+ break;
+- case SIOCSMIIREG: /* Write MII register */
++ case SIOCSMIIREG: /* Write MII register */
+ e100_set_mdio_reg(dev, mdio_phy_addr, data->reg_num, data->val_in);
+ break;
++
+ /* The ioctls below should be considered obsolete but are */
+ /* still present for compatability with old scripts/apps */
+- case SET_ETH_SPEED_10: /* 10 Mbps */
++ case SET_ETH_SPEED_10: /* 10 Mbps */
+ e100_set_speed(dev, 10);
+ break;
+- case SET_ETH_SPEED_100: /* 100 Mbps */
++ case SET_ETH_SPEED_100: /* 100 Mbps */
+ e100_set_speed(dev, 100);
+ break;
+- case SET_ETH_SPEED_AUTO: /* Auto negotiate speed */
++ case SET_ETH_SPEED_AUTO: /* Auto-negotiate speed */
+ e100_set_speed(dev, 0);
+ break;
+- case SET_ETH_DUPLEX_HALF: /* Half duplex. */
++ case SET_ETH_DUPLEX_HALF: /* Half duplex */
+ e100_set_duplex(dev, half);
+ break;
+- case SET_ETH_DUPLEX_FULL: /* Full duplex. */
++ case SET_ETH_DUPLEX_FULL: /* Full duplex */
+ e100_set_duplex(dev, full);
+ break;
+- case SET_ETH_DUPLEX_AUTO: /* Autonegotiate duplex*/
++ case SET_ETH_DUPLEX_AUTO: /* Auto-negotiate duplex */
+ e100_set_duplex(dev, autoneg);
+ break;
++ case SET_ETH_AUTONEG:
++ old_autoneg = autoneg_normal;
++ autoneg_normal = *(int*)data;
++ if (autoneg_normal != old_autoneg)
++ e100_negotiate(dev);
++ break;
+ default:
++ spin_unlock(&np->lock);
+ return -EINVAL;
+ }
+ spin_unlock(&np->lock);
+- return 0;
++ return ret;
+ }
+
+-static int e100_set_settings(struct net_device *dev,
++static int e100_get_settings(struct net_device *dev,
+ struct ethtool_cmd *ecmd)
+ {
+ ecmd->supported = SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII |
+@@ -1565,7 +1473,8 @@
+ static int
+ e100_set_config(struct net_device *dev, struct ifmap *map)
+ {
+- struct net_local *np = (struct net_local *)dev->priv;
++ struct net_local *np = netdev_priv(dev);
++
+ spin_lock(&np->lock); /* Preempt protection */
+
+ switch(map->port) {
+@@ -1574,21 +1483,25 @@
+ e100_set_speed(dev, 0);
+ e100_set_duplex(dev, autoneg);
+ break;
++
+ case IF_PORT_10BASET:
+ e100_set_speed(dev, 10);
+ e100_set_duplex(dev, autoneg);
+ break;
++
+ case IF_PORT_100BASET:
+ case IF_PORT_100BASETX:
+ e100_set_speed(dev, 100);
+ e100_set_duplex(dev, autoneg);
+ break;
++
+ case IF_PORT_100BASEFX:
+ case IF_PORT_10BASE2:
+ case IF_PORT_AUI:
+ spin_unlock(&np->lock);
+ return -EOPNOTSUPP;
+ break;
++
+ default:
+ printk(KERN_ERR "%s: Invalid media selected", dev->name);
+ spin_unlock(&np->lock);
+@@ -1602,6 +1515,7 @@
+ update_rx_stats(struct net_device_stats *es)
+ {
+ unsigned long r = *R_REC_COUNTERS;
++
+ /* update stats relevant to reception errors */
+ es->rx_fifo_errors += IO_EXTRACT(R_REC_COUNTERS, congestion, r);
+ es->rx_crc_errors += IO_EXTRACT(R_REC_COUNTERS, crc_error, r);
+@@ -1613,11 +1527,11 @@
+ update_tx_stats(struct net_device_stats *es)
+ {
+ unsigned long r = *R_TR_COUNTERS;
++
+ /* update stats relevant to transmission errors */
+ es->collisions +=
+ IO_EXTRACT(R_TR_COUNTERS, single_col, r) +
+ IO_EXTRACT(R_TR_COUNTERS, multiple_col, r);
+- es->tx_errors += IO_EXTRACT(R_TR_COUNTERS, deferred, r);
+ }
+
+ /*
+@@ -1627,8 +1541,9 @@
+ static struct net_device_stats *
+ e100_get_stats(struct net_device *dev)
+ {
+- struct net_local *lp = (struct net_local *)dev->priv;
++ struct net_local *lp = netdev_priv(dev);
+ unsigned long flags;
++
+ spin_lock_irqsave(&lp->lock, flags);
+
+ update_rx_stats(&lp->stats);
+@@ -1640,21 +1555,21 @@
+
+ /*
+ * Set or clear the multicast filter for this adaptor.
+- * num_addrs == -1 Promiscuous mode, receive all packets
+- * num_addrs == 0 Normal mode, clear multicast list
+- * num_addrs > 0 Multicast mode, receive normal and MC packets,
+- * and do best-effort filtering.
++ * num_addrs == -1 Promiscuous mode, receive all packets
++ * num_addrs == 0 Normal mode, clear multicast list
++ * num_addrs > 0 Multicast mode, receive normal and MC packets,
++ * and do best-effort filtering.
+ */
+ static void
+ set_multicast_list(struct net_device *dev)
+ {
+- struct net_local *lp = (struct net_local *)dev->priv;
++ struct net_local *lp = netdev_priv(dev);
+ int num_addr = dev->mc_count;
+ unsigned long int lo_bits;
+ unsigned long int hi_bits;
++
+ spin_lock(&lp->lock);
+- if (dev->flags & IFF_PROMISC)
+- {
++ if (dev->flags & IFF_PROMISC) {
+ /* promiscuous mode */
+ lo_bits = 0xfffffffful;
+ hi_bits = 0xfffffffful;
+@@ -1684,9 +1599,10 @@
+ struct dev_mc_list *dmi = dev->mc_list;
+ int i;
+ char *baddr;
++
+ lo_bits = 0x00000000ul;
+ hi_bits = 0x00000000ul;
+- for (i=0; i<num_addr; i++) {
++ for (i = 0; i < num_addr; i++) {
+ /* Calculate the hash index for the GA registers */
+
+ hash_ix = 0;
+@@ -1713,8 +1629,7 @@
+
+ if (hash_ix >= 32) {
+ hi_bits |= (1 << (hash_ix-32));
+- }
+- else {
++ } else {
+ lo_bits |= (1 << hash_ix);
+ }
+ dmi = dmi->next;
+@@ -1729,10 +1644,11 @@
+ }
+
+ void
+-e100_hardware_send_packet(char *buf, int length)
++e100_hardware_send_packet(struct net_local *np, char *buf, int length)
+ {
+ D(printk("e100 send pack, buf 0x%x len %d\n", buf, length));
+
++ spin_lock(&np->led_lock);
+ if (!led_active && time_after(jiffies, led_next_time)) {
+ /* light the network leds depending on the current speed. */
+ e100_set_network_leds(NETWORK_ACTIVITY);
+@@ -1742,15 +1658,16 @@
+ led_active = 1;
+ mod_timer(&clear_led_timer, jiffies + HZ/10);
+ }
++ spin_unlock(&np->led_lock);
+
+ /* configure the tx dma descriptor */
+ myNextTxDesc->descr.sw_len = length;
+ myNextTxDesc->descr.ctrl = d_eop | d_eol | d_wait;
+ myNextTxDesc->descr.buf = virt_to_phys(buf);
+
+- /* Move end of list */
+- myLastTxDesc->descr.ctrl &= ~d_eol;
+- myLastTxDesc = myNextTxDesc;
++ /* Move end of list */
++ myLastTxDesc->descr.ctrl &= ~d_eol;
++ myLastTxDesc = myNextTxDesc;
+
+ /* Restart DMA channel */
+ *R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, restart);
+@@ -1759,6 +1676,11 @@
+ static void
+ e100_clear_network_leds(unsigned long dummy)
+ {
++ struct net_device *dev = (struct net_device *)dummy;
++ struct net_local *np = netdev_priv(dev);
++
++ spin_lock(&np->led_lock);
++
+ if (led_active && time_after(jiffies, led_next_time)) {
+ e100_set_network_leds(NO_NETWORK_ACTIVITY);
+
+@@ -1766,6 +1688,8 @@
+ led_next_time = jiffies + NET_FLASH_PAUSE;
+ led_active = 0;
+ }
++
++ spin_unlock(&np->led_lock);
+ }
+
+ static void
+@@ -1786,19 +1710,25 @@
+ #else
+ LED_NETWORK_SET(LED_OFF);
+ #endif
+- }
+- else if (light_leds) {
++ } else if (light_leds) {
+ if (current_speed == 10) {
+ LED_NETWORK_SET(LED_ORANGE);
+ } else {
+ LED_NETWORK_SET(LED_GREEN);
+ }
+- }
+- else {
++ } else {
+ LED_NETWORK_SET(LED_OFF);
+ }
+ }
+
++#ifdef CONFIG_NET_POLL_CONTROLLER
++static void
++e100_netpoll(struct net_device* netdev)
++{
++ e100rxtx_interrupt(NETWORK_DMA_TX_IRQ_NBR, netdev, NULL);
++}
++#endif
++
+ static int
+ etrax_init_module(void)
+ {
+diff -urN linux-2.6.19.2.orig/drivers/net/cris/eth_v32.c linux-2.6.19.2.dev/drivers/net/cris/eth_v32.c
+--- linux-2.6.19.2.orig/drivers/net/cris/eth_v32.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/drivers/net/cris/eth_v32.c 2007-02-06 11:10:37.000000000 +0100
+@@ -0,0 +1,2305 @@
++/*
++ * Driver for the ETRAX FS network controller.
++ *
++ * Copyright (c) 2003-2006 Axis Communications AB.
++ */
++
++#include <linux/module.h>
++
++#include <linux/kernel.h>
++#include <linux/sched.h>
++#include <linux/delay.h>
++#include <linux/types.h>
++#include <linux/fcntl.h>
++#include <linux/interrupt.h>
++#include <linux/ptrace.h>
++#include <linux/ioport.h>
++#include <linux/in.h>
++#include <linux/slab.h>
++#include <linux/string.h>
++#include <linux/spinlock.h>
++#include <linux/errno.h>
++#include <linux/init.h>
++#include <linux/cpufreq.h>
++
++#include <linux/netdevice.h>
++#include <linux/etherdevice.h>
++#include <linux/skbuff.h>
++#include <linux/ethtool.h>
++#include <linux/mii.h>
++
++#include <asm/io.h> /* LED_* I/O functions */
++#include <asm/irq.h>
++#include <asm/arch/hwregs/reg_map.h>
++#include <asm/arch/hwregs/reg_rdwr.h>
++#include <asm/arch/hwregs/dma.h>
++#include <asm/arch/hwregs/eth_defs.h>
++#include <asm/arch/hwregs/config_defs.h>
++#include <asm/arch/hwregs/intr_vect_defs.h>
++#include <asm/system.h>
++#include <asm/bitops.h>
++#include <asm/ethernet.h>
++#include <asm/arch/dma.h>
++#include <asm/arch/intmem.h>
++#include <asm/arch/pinmux.h>
++
++#include "eth_v32.h"
++
++#define DEBUG(x)
++#define GET_BIT(bit,val) (((val) >> (bit)) & 0x01)
++
++/* Toggle network LEDs on/off at runtime */
++static int use_network_leds = 1;
++
++static void update_rx_stats(struct crisv32_ethernet_local *np);
++static void update_tx_stats(struct crisv32_ethernet_local *np);
++static void crisv32_eth_setup_controller(struct net_device *dev);
++static int crisv32_eth_request_irqdma(struct net_device *dev);
++static void crisv32_eth_init_rings(struct net_device *dev);
++static void crisv32_eth_reset_rings(struct net_device *dev);
++static void crisv32_ethernet_bug(struct net_device *dev);
++
++/*
++ * The name of the card. Is used for messages and in the requests for
++ * io regions, irqs and dma channels.
++ */
++static const char *cardname = "ETRAX FS built-in ethernet controller";
++
++static int autoneg_normal = 1;
++
++/* Some chipset needs special care. */
++struct transceiver_ops transceivers[] = {
++ {0x1018, broadcom_check_speed, broadcom_check_duplex},
++ /* TDK 2120 and TDK 2120C */
++ {0xC039, tdk_check_speed, tdk_check_duplex},
++ {0x039C, tdk_check_speed, tdk_check_duplex},
++ /* Intel LXT972A*/
++ {0x04de, intel_check_speed, intel_check_duplex},
++ /* National Semiconductor DP83865 */
++ {0x0017, national_check_speed, national_check_duplex},
++ /* Generic, must be last. */
++ {0x0000, generic_check_speed, generic_check_duplex}
++};
++
++static struct net_device *crisv32_dev[2];
++static struct crisv32_eth_leds *crisv32_leds[3];
++
++#ifdef CONFIG_CPU_FREQ
++static int
++crisv32_ethernet_freq_notifier(struct notifier_block *nb, unsigned long val,
++ void *data);
++
++static struct notifier_block crisv32_ethernet_freq_notifier_block = {
++ .notifier_call = crisv32_ethernet_freq_notifier
++};
++#endif
++
++/*
++ * mask in and out tx/rx interrupts.
++ */
++static inline void crisv32_disable_tx_ints(struct crisv32_ethernet_local *np)
++{
++ reg_dma_rw_intr_mask intr_mask_tx = { .data = regk_dma_no };
++ REG_WR(dma, np->dma_out_inst, rw_intr_mask, intr_mask_tx);
++}
++
++static inline void crisv32_enable_tx_ints(struct crisv32_ethernet_local *np)
++{
++ reg_dma_rw_intr_mask intr_mask_tx = { .data = regk_dma_yes };
++ REG_WR(dma, np->dma_out_inst, rw_intr_mask, intr_mask_tx);
++}
++
++static inline void crisv32_disable_rx_ints(struct crisv32_ethernet_local *np)
++{
++ reg_dma_rw_intr_mask intr_mask_rx = { .in_eop = regk_dma_no };
++ REG_WR(dma, np->dma_in_inst, rw_intr_mask, intr_mask_rx);
++}
++
++static inline void crisv32_enable_rx_ints(struct crisv32_ethernet_local *np)
++{
++ reg_dma_rw_intr_mask intr_mask_rx = { .in_eop = regk_dma_yes };
++ REG_WR(dma, np->dma_in_inst, rw_intr_mask, intr_mask_rx);
++}
++
++/* start/stop receiver */
++static inline void crisv32_start_receiver(struct crisv32_ethernet_local *np)
++{
++ reg_eth_rw_rec_ctrl rec_ctrl;
++
++ rec_ctrl = REG_RD(eth, np->eth_inst, rw_rec_ctrl);
++ rec_ctrl.ma0 = regk_eth_yes;
++ rec_ctrl.broadcast = regk_eth_rec;
++ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl);
++}
++
++static inline void crisv32_stop_receiver(struct crisv32_ethernet_local *np)
++{
++ reg_eth_rw_rec_ctrl rec_ctrl;
++
++ rec_ctrl = REG_RD(eth, np->eth_inst, rw_rec_ctrl);
++ rec_ctrl.ma0 = regk_eth_no;
++ rec_ctrl.broadcast = regk_eth_discard;
++ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl);
++}
++
++static int __init
++crisv32_eth_request_irqdma(struct net_device *dev)
++{
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ /* Allocate IRQs and DMAs. */
++ if (np->eth_inst == regi_eth0) {
++ if (request_irq(DMA0_INTR_VECT, crisv32tx_eth_interrupt,
++ 0, cardname, dev)) {
++ return -EAGAIN;
++ }
++
++ if (request_irq(DMA1_INTR_VECT, crisv32rx_eth_interrupt,
++ IRQF_SAMPLE_RANDOM, cardname, dev)) {
++ goto err0_1;
++ }
++
++ if (crisv32_request_dma(0, cardname, DMA_VERBOSE_ON_ERROR,
++ 12500000, dma_eth0))
++ goto err0_2;
++
++ if (crisv32_request_dma(1, cardname, DMA_VERBOSE_ON_ERROR,
++ 12500000, dma_eth0))
++ goto err0_3;
++
++ if (request_irq(ETH0_INTR_VECT, crisv32nw_eth_interrupt, 0,
++ cardname, dev)) {
++ crisv32_free_dma(1);
++ err0_3:
++ crisv32_free_dma(0);
++ err0_2:
++ free_irq(DMA1_INTR_VECT, dev);
++ err0_1:
++ free_irq(DMA0_INTR_VECT, dev);
++ return -EAGAIN;
++ }
++ } else {
++ if (request_irq(DMA6_INTR_VECT, crisv32tx_eth_interrupt,
++ 0, cardname, dev))
++ return -EAGAIN;
++
++ if (request_irq(DMA7_INTR_VECT, crisv32rx_eth_interrupt,
++ IRQF_SAMPLE_RANDOM, cardname, dev))
++ goto err1_1;
++
++ if (crisv32_request_dma(6, cardname, DMA_VERBOSE_ON_ERROR,
++ 0, dma_eth1))
++ goto err1_2;
++
++ if (crisv32_request_dma(7, cardname, DMA_VERBOSE_ON_ERROR,
++ 0, dma_eth1))
++ goto err1_3;
++
++ if (request_irq(ETH1_INTR_VECT, crisv32nw_eth_interrupt, 0,
++ cardname, dev)) {
++ crisv32_free_dma(7);
++ err1_3:
++ crisv32_free_dma(6);
++ err1_2:
++ free_irq(DMA7_INTR_VECT, dev);
++ err1_1:
++ free_irq(DMA6_INTR_VECT, dev);
++ return -EAGAIN;
++ }
++ }
++ return 0;
++}
++
++static void __init
++crisv32_eth_setup_controller(struct net_device *dev)
++{
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ reg_config_rw_pad_ctrl pad_ctrl;
++
++ reg_eth_rw_tr_ctrl tr_ctrl = {
++ .retry = regk_eth_yes,
++ .pad = regk_eth_yes,
++ .crc = regk_eth_yes
++ };
++
++ reg_eth_rw_rec_ctrl rec_ctrl = {
++ .ma0 = regk_eth_no, /* enable at open() */
++ .broadcast = regk_eth_no,
++ .max_size = regk_eth_size1522
++ };
++
++ reg_eth_rw_ga_lo ga_lo = { 0 };
++ reg_eth_rw_ga_hi ga_hi = { 0 };
++
++ reg_eth_rw_gen_ctrl gen_ctrl = {
++ .phy = regk_eth_mii_clk,
++ .flow_ctrl = regk_eth_yes
++ };
++
++ /*
++ * Initialize group address registers to make sure that no
++ * unwanted addresses are matched.
++ */
++ REG_WR(eth, np->eth_inst, rw_ga_lo, ga_lo);
++ REG_WR(eth, np->eth_inst, rw_ga_hi, ga_hi);
++
++ /* Configure receiver and transmitter */
++ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl);
++ REG_WR(eth, np->eth_inst, rw_tr_ctrl, tr_ctrl);
++
++ /* Enable ethernet controller with mii clk. */
++ REG_WR(eth, np->eth_inst, rw_gen_ctrl, gen_ctrl);
++ gen_ctrl.en = regk_eth_yes;
++ REG_WR(eth, np->eth_inst, rw_gen_ctrl, gen_ctrl);
++
++ /* keep reset low (RESET_LEN) */
++ udelay(500);
++
++ /* done */
++ pad_ctrl = REG_RD(config, regi_config, rw_pad_ctrl);
++ pad_ctrl.phyrst_n = 1;
++ REG_WR(config, regi_config, rw_pad_ctrl, pad_ctrl);
++
++ /* Let the PHY reset (RESET_WAIT) */
++ udelay(200);
++
++ crisv32_eth_probe_transceiver(dev);
++}
++
++static void __init
++crisv32_eth_init_rings(struct net_device *dev)
++{
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++ int i;
++
++ /* Initialise receive descriptors for interface. */
++ for (i = 0; i < NBR_RX_DESC; i++) {
++ struct sk_buff *skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE);
++
++ np->dma_rx_descr_list[i].skb = skb;
++ np->dma_rx_descr_list[i].descr.buf =
++ (char*)virt_to_phys(skb->data);
++ np->dma_rx_descr_list[i].descr.after =
++ (char*)virt_to_phys(skb->data + MAX_MEDIA_DATA_SIZE);
++
++ np->dma_rx_descr_list[i].descr.eol = 0;
++ np->dma_rx_descr_list[i].descr.in_eop = 0;
++ np->dma_rx_descr_list[i].descr.next =
++ (void *) virt_to_phys(&np->dma_rx_descr_list[i + 1].descr);
++ }
++ /* bend the list into a ring */
++ np->dma_rx_descr_list[NBR_RX_DESC - 1].descr.next =
++ (void *) virt_to_phys(&np->dma_rx_descr_list[0].descr);
++
++ /* Initialize transmit descriptors. */
++ for (i = 0; i < NBR_TX_DESC; i++) {
++ np->dma_tx_descr_list[i].descr.wait = 1;
++ np->dma_tx_descr_list[i].descr.eol = 0;
++ np->dma_tx_descr_list[i].descr.out_eop = 0;
++ np->dma_tx_descr_list[i].descr.next =
++ (void*)virt_to_phys(&np->dma_tx_descr_list[i+1].descr);
++ }
++ /* bend the list into a ring */
++ np->dma_tx_descr_list[NBR_TX_DESC - 1].descr.next =
++ (void *) virt_to_phys(&np->dma_tx_descr_list[0].descr);
++
++ crisv32_eth_reset_rings(dev);
++}
++
++static void
++crisv32_eth_reset_rings(struct net_device *dev)
++{
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++ int i;
++
++ /* free un-handled tx packets */
++ while(np->txpackets
++ || np->catch_tx_desc != np->active_tx_desc) {
++ np->txpackets--;
++ if (np->catch_tx_desc->skb)
++ dev_kfree_skb(np->catch_tx_desc->skb);
++
++ np->catch_tx_desc->skb = 0;
++ np->catch_tx_desc =
++ phys_to_virt((int)np->catch_tx_desc->descr.next);
++ } while (np->catch_tx_desc != np->active_tx_desc);
++ WARN_ON(np->txpackets != 0);
++ np->txpackets = 0;
++
++ /* cleanup the rx-ring */
++ for (i = 0; i < NBR_RX_DESC; i++) {
++ struct sk_buff *skb;
++ skb = np->dma_rx_descr_list[i].skb;
++ if (!skb
++ || (np->dma_rx_descr_list[i].descr.buf !=
++ (void *)virt_to_phys(skb->data)))
++ {
++ printk("%s:%d: damaged rx-ring! "
++ "i=%d skb=%p %lx %lx %p %p\n",
++ __func__, __LINE__, i,
++ skb,
++ virt_to_phys(skb->data),
++ virt_to_phys(skb->data + MAX_MEDIA_DATA_SIZE),
++ np->dma_rx_descr_list[i].descr.buf,
++ np->dma_rx_descr_list[i].descr.after);
++ WARN_ON(1);
++ crisv32_ethernet_bug(dev);
++ if (skb)
++ dev_kfree_skb(skb);
++ skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE);
++ np->dma_rx_descr_list[i].skb = skb;
++ np->dma_rx_descr_list[i].descr.buf =
++ (char*)virt_to_phys(skb->data);
++ }
++ np->dma_rx_descr_list[i].descr.after =
++ (char*)virt_to_phys(skb->data
++ + MAX_MEDIA_DATA_SIZE);
++ np->dma_rx_descr_list[i].descr.eol = 0;
++ np->dma_rx_descr_list[i].descr.in_eop = 0;
++ /* Workaround cache bug */
++ flush_dma_descr(&np->dma_rx_descr_list[i].descr, 1);
++ }
++
++ /* reset rx-ring */
++ np->active_rx_desc = &np->dma_rx_descr_list[0];
++ np->prev_rx_desc = &np->dma_rx_descr_list[NBR_RX_DESC - 1];
++ np->last_rx_desc = np->prev_rx_desc;
++ np->dma_rx_descr_list[NBR_RX_DESC - 1].descr.eol = 1;
++
++ /* reset tx-ring */
++ np->dma_tx_descr_list[0].descr.buf =
++ np->dma_tx_descr_list[0].descr.after = 0;
++ np->dma_rx_descr_list[i].descr.in_eop = 0;
++ np->dma_tx_descr_list[0].descr.eol = 1;
++
++ np->active_tx_desc = &np->dma_tx_descr_list[0];
++ np->prev_tx_desc = &np->dma_tx_descr_list[NBR_TX_DESC - 1];
++ np->catch_tx_desc = &np->dma_tx_descr_list[0];
++
++ /* Fill context descriptors. */
++ np->ctxt_in.next = 0;
++ np->ctxt_in.saved_data =
++ (void *)virt_to_phys(&np->active_rx_desc->descr);
++ np->ctxt_in.saved_data_buf = np->active_rx_desc->descr.buf;
++
++ np->ctxt_out.next = 0;
++ np->ctxt_out.saved_data =
++ (void *)virt_to_phys(&np->dma_tx_descr_list[0].descr);
++}
++
++static void __init
++crisv32_init_leds(int ledgrp, struct net_device* dev)
++{
++ struct timer_list timer_init = TIMER_INITIALIZER(NULL, 0, 0);
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ /* Use already allocated led grp if initialized */
++ if (crisv32_leds[ledgrp] != NULL) {
++ np->leds = crisv32_leds[ledgrp];
++ return;
++ }
++
++ crisv32_leds[ledgrp] = kmalloc(sizeof(struct crisv32_eth_leds),GFP_KERNEL);
++
++ crisv32_leds[ledgrp]->ledgrp = ledgrp;
++ crisv32_leds[ledgrp]->led_active = 0;
++ /* NOTE: Should this value be set to zero as the jiffies timer can wrap? */
++ crisv32_leds[ledgrp]->led_next_time = jiffies;
++
++ crisv32_leds[ledgrp]->clear_led_timer = timer_init;
++ crisv32_leds[ledgrp]->clear_led_timer.function = crisv32_clear_network_leds;
++ crisv32_leds[ledgrp]->clear_led_timer.data = (unsigned long) dev;
++
++ spin_lock_init(&crisv32_leds[ledgrp]->led_lock);
++
++ np->leds = crisv32_leds[ledgrp];
++}
++
++static int __init
++crisv32_ethernet_init(void)
++{
++ struct crisv32_ethernet_local *np;
++ int ret = 0;
++
++ printk("ETRAX FS 10/100MBit ethernet v0.01 (c)"
++ " 2003 Axis Communications AB\n");
++
++#ifdef CONFIG_ETRAX_ETHERNET_IFACE0
++{
++ int iface0 = 0;
++ /* Default MAC address for interface 0.
++ * The real one will be set later. */
++ static struct sockaddr default_mac_iface0 =
++ {0, {0x00, 0x40, 0x8C, 0xCD, 0x00, 0x00}};
++
++ if (!(crisv32_dev[iface0] = alloc_etherdev(sizeof *np)))
++ return -ENOMEM;
++
++ ret |= crisv32_ethernet_device_init(crisv32_dev[iface0]);
++
++#if defined(CONFIG_ETRAX_ETH0_USE_LEDGRP0)
++ crisv32_init_leds(LED_GRP_0,crisv32_dev[iface0]);
++#elif defined(CONFIG_ETRAX_ETH0_USE_LEDGRP1)
++ crisv32_init_leds(LED_GRP_1,crisv32_dev[iface0]);
++#else
++ crisv32_init_leds(LED_GRP_NONE,crisv32_dev[iface0]);
++#endif
++
++ np = (struct crisv32_ethernet_local *) crisv32_dev[iface0]->priv;
++ np->eth_inst = regi_eth0;
++ np->dma_out_inst = regi_dma0;
++ np->dma_in_inst = regi_dma1;
++
++ register_netdev(crisv32_dev[iface0]);
++
++ /* Set up default MAC address */
++ memcpy(crisv32_dev[iface0]->dev_addr, default_mac_iface0.sa_data, 6);
++ crisv32_eth_set_mac_address(crisv32_dev[iface0], &default_mac_iface0);
++ if (crisv32_eth_request_irqdma(crisv32_dev[iface0]))
++ printk("%s: eth0 unable to allocate IRQ and DMA resources\n",
++ __func__);
++ np->txpackets = 0;
++ crisv32_eth_init_rings(crisv32_dev[iface0]);
++ crisv32_eth_setup_controller(crisv32_dev[iface0]);
++}
++#endif /* CONFIG_ETRAX_ETHERNET_IFACE0 */
++
++#ifdef CONFIG_ETRAX_ETHERNET_IFACE1
++{
++ int iface1 = 0;
++ /* Default MAC address for interface 1.
++ * The real one will be set later. */
++ static struct sockaddr default_mac_iface1 =
++ {0, {0x00, 0x40, 0x8C, 0xCD, 0x00, 0x01}};
++
++ if (crisv32_pinmux_alloc_fixed(pinmux_eth1))
++ panic("Eth pinmux\n");
++
++ /* Increase index to device array if interface 0 is enabled as well.*/
++#ifdef CONFIG_ETRAX_ETHERNET_IFACE0
++ iface1++;
++#endif
++ if (!(crisv32_dev[iface1] = alloc_etherdev(sizeof *np)))
++ return -ENOMEM;
++
++ ret |= crisv32_ethernet_device_init(crisv32_dev[iface1]);
++
++#if defined(CONFIG_ETRAX_ETH1_USE_LEDGRP0)
++ crisv32_init_leds(LED_GRP_0,crisv32_dev[iface1]);
++#elif defined(CONFIG_ETRAX_ETH1_USE_LEDGRP1)
++ crisv32_init_leds(LED_GRP_1,crisv32_dev[iface1]);
++#else
++ crisv32_init_leds(LED_GRP_NONE,crisv32_dev[iface1]);
++#endif
++
++ np = (struct crisv32_ethernet_local *) crisv32_dev[iface1]->priv;
++ np->eth_inst = regi_eth1;
++ np->dma_out_inst = regi_dma6;
++ np->dma_in_inst = regi_dma7;
++
++ register_netdev(crisv32_dev[iface1]);
++
++ /* Set up default MAC address */
++ memcpy(crisv32_dev[iface1]->dev_addr, default_mac_iface1.sa_data, 6);
++ crisv32_eth_set_mac_address(crisv32_dev[iface1], &default_mac_iface1);
++
++ if (crisv32_eth_request_irqdma(crisv32_dev[iface1]))
++ printk("%s: eth1 unable to allocate IRQ and DMA resources\n",
++ __func__);
++ np->txpackets = 0;
++ crisv32_eth_init_rings(crisv32_dev[iface1]);
++ crisv32_eth_setup_controller(crisv32_dev[iface1]);
++}
++#endif /* CONFIG_ETRAX_ETHERNET_IFACE1 */
++
++#ifdef CONFIG_CPU_FREQ
++ cpufreq_register_notifier(&crisv32_ethernet_freq_notifier_block,
++ CPUFREQ_TRANSITION_NOTIFIER);
++#endif
++
++ return ret;
++}
++
++static int __init
++crisv32_ethernet_device_init(struct net_device* dev)
++{
++ struct timer_list timer_init = TIMER_INITIALIZER(NULL, 0, 0);
++ struct crisv32_ethernet_local *np;
++
++ dev->base_addr = 0; /* Just to have something to show. */
++
++ /* we do our own locking */
++ dev->features |= NETIF_F_LLTX;
++
++ /* We use several IRQs and DMAs so just report 0 here. */
++ dev->irq = 0;
++ dev->dma = 0;
++
++ /*
++ * Fill in our handlers so the network layer can talk to us in the
++ * future.
++ */
++ dev->open = crisv32_eth_open;
++ dev->hard_start_xmit = crisv32_eth_send_packet;
++ dev->stop = crisv32_eth_close;
++ dev->get_stats = crisv32_get_stats;
++ dev->set_multicast_list = crisv32_eth_set_multicast_list;
++ dev->set_mac_address = crisv32_eth_set_mac_address;
++ dev->ethtool_ops = &crisv32_ethtool_ops;
++ dev->do_ioctl = crisv32_eth_ioctl;
++ dev->set_config = crisv32_eth_set_config;
++ dev->tx_timeout = crisv32_eth_tx_timeout;
++#ifdef CONFIG_NET_POLL_CONTROLLER
++ dev->poll_controller = crisv32_netpoll;
++#endif
++
++ np = netdev_priv(dev);
++
++ spin_lock_init(&np->lock);
++ spin_lock_init(&np->transceiver_lock);
++
++ /* Initialize speed indicator stuff. */
++ np->current_speed = 10;
++ np->current_speed_selection = 0; /* Auto. */
++ np->speed_timer = timer_init;
++ np->speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
++ np->speed_timer.data = (unsigned long) dev;
++ np->speed_timer.function = crisv32_eth_check_speed;
++
++ np->full_duplex = 0;
++ np->current_duplex = autoneg;
++ np->duplex_timer = timer_init;
++ np->duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
++ np->duplex_timer.data = (unsigned long) dev;
++ np->duplex_timer.function = crisv32_eth_check_duplex;
++
++ return 0;
++}
++
++static int
++crisv32_eth_open(struct net_device *dev)
++{
++ struct sockaddr mac_addr;
++ reg_dma_rw_ack_intr ack_intr = { .data = 1,.in_eop = 1 };
++ reg_dma_rw_cfg dma_cfg = { .en = 1 };
++ reg_eth_rw_clr_err clr_err = {.clr = regk_eth_yes};
++ int intr_mask_nw = 0x1cff;
++ int eth_ack_intr = 0xffff;
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ spin_lock(&np->lock);
++#ifdef CONFIG_CRIS_MACH_ARTPEC3
++ np->gigabit_mode = 0;
++#endif
++ crisv32_disable_tx_ints(np);
++ crisv32_disable_rx_ints(np);
++
++ REG_WR(eth, np->eth_inst, rw_clr_err, clr_err);
++ REG_WR_INT(eth, np->eth_inst, rw_ack_intr, eth_ack_intr);
++ REG_WR_INT(eth, np->eth_inst, rw_intr_mask, intr_mask_nw);
++ crisv32_eth_reset_rings(dev);
++
++ /* Give the hardware an idea of what MAC address we want. */
++ memcpy(mac_addr.sa_data, dev->dev_addr, dev->addr_len);
++ crisv32_eth_set_mac_address(dev, &mac_addr);
++
++ /* Enable irq and make sure that the irqs are cleared. */
++ REG_WR(dma, np->dma_out_inst, rw_ack_intr, ack_intr);
++ REG_WR(dma, np->dma_in_inst, rw_ack_intr, ack_intr);
++
++ /* Prepare input DMA. */
++ DMA_RESET(np->dma_in_inst);
++ DMA_ENABLE(np->dma_in_inst);
++#ifdef CONFIG_CRIS_MACH_ARTPEC3
++ DMA_WR_CMD(np->dma_in_inst, regk_dma_set_w_size2);
++#endif
++ DMA_START_CONTEXT( np->dma_in_inst, virt_to_phys(&np->ctxt_in));
++ DMA_CONTINUE(np->dma_in_inst);
++ crisv32_enable_rx_ints(np);
++ crisv32_start_receiver(np);
++
++ /* Prepare output DMA. */
++#ifdef CONFIG_CRIS_MACH_ARTPEC3
++ DMA_WR_CMD(np->dma_out_inst, regk_dma_set_w_size4);
++#endif
++ REG_WR(dma, np->dma_out_inst, rw_cfg, dma_cfg);
++ netif_start_queue(dev);
++ crisv32_enable_tx_ints(np);
++
++ /* Start duplex/speed timers */
++ add_timer(&np->speed_timer);
++ add_timer(&np->duplex_timer);
++
++ spin_unlock(&np->lock);
++ /*
++ * We are now ready to accept transmit requeusts from the queueing
++ * layer of the networking.
++ */
++ netif_carrier_on(dev);
++
++ return 0;
++}
++
++static int
++crisv32_eth_close(struct net_device *dev)
++{
++ reg_dma_rw_ack_intr ack_intr = {0};
++
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++ unsigned long flags;
++
++ printk(KERN_INFO "Closing %s.\n", dev->name);
++
++ /* stop the receiver before the DMA channels to avoid overruns. */
++ crisv32_stop_receiver(np);
++
++ spin_lock_irqsave(&np->lock, flags);
++ netif_stop_queue(dev);
++
++ /* Reset the TX DMA in case it has hung on something. */
++ DMA_RESET(np->dma_in_inst);
++
++ /* Stop DMA */
++ DMA_STOP(np->dma_in_inst);
++ DMA_STOP(np->dma_out_inst);
++
++ /* Disable irq and make sure that the irqs are cleared. */
++ crisv32_disable_tx_ints(np);
++ ack_intr.data = 1;
++ REG_WR(dma, np->dma_out_inst, rw_ack_intr, ack_intr);
++
++ crisv32_disable_rx_ints(np);
++ ack_intr.in_eop = 1;
++ REG_WR(dma, np->dma_in_inst, rw_ack_intr, ack_intr);
++
++ np->sender_started = 0;
++ spin_unlock_irqrestore(&np->lock, flags);
++
++ /* Update the statistics. */
++ update_rx_stats(np);
++ update_tx_stats(np);
++
++ /* Stop speed/duplex timers */
++ del_timer(&np->speed_timer);
++ del_timer(&np->duplex_timer);
++
++ return 0;
++}
++
++static int
++crisv32_eth_set_mac_address(struct net_device *dev, void *vpntr)
++{
++ int i;
++ unsigned char *addr = ((struct sockaddr*)vpntr)->sa_data;
++
++ reg_eth_rw_ma0_lo ma0_lo =
++ { addr[0] | (addr[1] << 8) | (addr[2] << 16) | (addr[3] << 24)};
++
++ reg_eth_rw_ma0_hi ma0_hi = { addr[4] | (addr[5] << 8) };
++
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ /* Remember the address. */
++ memcpy(dev->dev_addr, addr, dev->addr_len);
++
++ /*
++ * Write the address to the hardware.
++ * Note the way the address is wrapped:
++ * ma0_l0 = a0_0 | (a0_1 << 8) | (a0_2 << 16) | (a0_3 << 24);
++ * ma0_hi = a0_4 | (a0_5 << 8);
++ */
++ REG_WR(eth, np->eth_inst, rw_ma0_lo, ma0_lo);
++ REG_WR(eth, np->eth_inst, rw_ma0_hi, ma0_hi);
++
++ printk(KERN_INFO "%s: changed MAC to ", dev->name);
++
++ for (i = 0; i < 5; i++)
++ printk("%02X:", dev->dev_addr[i]);
++
++ printk("%02X\n", dev->dev_addr[i]);
++
++ return 0;
++}
++
++static irqreturn_t
++crisv32rx_eth_interrupt(int irq, void *dev_id)
++{
++ reg_dma_r_masked_intr masked_in;
++ reg_dma_rw_cmd cmd = {0};
++ reg_dma_rw_ack_intr ack_intr = {0};
++ struct net_device *dev = (struct net_device *) dev_id;
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ masked_in = REG_RD(dma, np->dma_in_inst, r_masked_intr);
++
++ if (masked_in.in_eop) {
++ DEBUG(printk("EOP_IN interrupt\n"));
++
++ /* Acknowledge input dma interrupt. */
++ ack_intr.in_eop = 1;
++ REG_WR(dma, np->dma_in_inst, rw_ack_intr, ack_intr);
++
++ np->new_rx_package = 1;
++ /* Check if complete packets were indeed received. */
++ while (np->active_rx_desc->descr.in_eop == 1
++ && np->new_rx_package) {
++ /*
++ * Take out the buffer and give it to the OS, then
++ * allocate a new buffer to put a packet in.
++ */
++ crisv32_eth_receive_packet(dev);
++
++ /* Update number of packets received. */
++ np->stats.rx_packets++;
++
++ /* Restarts input dma. */
++ cmd.cont_data = 1;
++ REG_WR(dma, np->dma_in_inst, rw_cmd, cmd);
++
++ /* Acknowledge input dma interrupt. */
++ REG_WR(dma, np->dma_in_inst, rw_ack_intr, ack_intr);
++ }
++ }
++ return IRQ_HANDLED;
++}
++
++static irqreturn_t
++crisv32tx_eth_interrupt(int irq, void *dev_id)
++{
++ reg_dma_rw_stat stat;
++ dma_descr_data *dma_pos;
++ reg_dma_rw_ack_intr ack_intr = { .data = 1 };
++ reg_dma_r_masked_intr masked_out;
++
++ struct net_device *dev = (struct net_device *) dev_id;
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++ unsigned long flags;
++
++ masked_out = REG_RD(dma, np->dma_out_inst, r_masked_intr);
++
++ /* Get the current output dma position. */
++ stat = REG_RD(dma, np->dma_out_inst, rw_stat);
++ if (stat.list_state == regk_dma_data_at_eol)
++ dma_pos = &np->active_tx_desc->descr;
++ else
++ dma_pos = phys_to_virt(REG_RD_INT(dma, np->dma_out_inst,
++ rw_data));
++
++ /* ack the interrupt */
++ REG_WR(dma, np->dma_out_inst, rw_ack_intr, ack_intr);
++
++ /* protect against ethernet excessive-col interrupts */
++ spin_lock_irqsave(&np->lock, flags);
++
++ /* Take care of transmited dma descriptors and report sent packet. */
++ while (np->txpackets && ((&np->catch_tx_desc->descr != dma_pos)
++ || netif_queue_stopped(dev))) {
++ /* Update sent packet statistics. */
++ np->stats.tx_bytes += np->catch_tx_desc->skb->len;
++ np->stats.tx_packets++;
++
++ dev_kfree_skb_irq(np->catch_tx_desc->skb);
++ np->catch_tx_desc->skb = 0;
++ np->txpackets--;
++ np->catch_tx_desc =
++ phys_to_virt((int)np->catch_tx_desc->descr.next);
++#ifdef CONFIG_CRIS_MACH_ARTPEC3
++ if (np->gigabit_mode) {
++ np->intmem_tx_buf_catch->free = 1;
++ np->intmem_tx_buf_catch = np->intmem_tx_buf_catch->next;
++ }
++#endif
++ netif_wake_queue(dev);
++ }
++ spin_unlock_irqrestore(&np->lock, flags);
++ return IRQ_HANDLED;
++}
++
++
++/* Update receive errors. */
++static void
++update_rx_stats(struct crisv32_ethernet_local *np)
++{
++ reg_eth_rs_rec_cnt r;
++ reg_eth_rs_phy_cnt rp;
++
++ r = REG_RD(eth, np->eth_inst, rs_rec_cnt);
++ rp = REG_RD(eth, np->eth_inst, rs_phy_cnt);
++
++ np->stats.rx_fifo_errors += r.congestion;
++ np->stats.rx_crc_errors += r.crc_err;
++ np->stats.rx_frame_errors += r.align_err;
++ np->stats.rx_length_errors += r.oversize;
++}
++
++/* Update transmit errors. */
++static void
++update_tx_stats(struct crisv32_ethernet_local *np)
++{
++ reg_eth_rs_tr_cnt r;
++
++ r = REG_RD(eth, np->eth_inst, rs_tr_cnt);
++
++ np->stats.collisions += r.single_col + r.mult_col;
++ np->stats.tx_errors += r.deferred;
++}
++
++/* Get current statistics. */
++static struct net_device_stats *
++crisv32_get_stats(struct net_device *dev)
++{
++ unsigned long flags;
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ spin_lock_irqsave(&np->lock, flags);
++
++ update_rx_stats(np);
++ update_tx_stats(np);
++
++ spin_unlock_irqrestore(&np->lock, flags);
++
++ return &np->stats;
++}
++
++/* Check for network errors. This acknowledge the received interrupt. */
++static irqreturn_t
++crisv32nw_eth_interrupt(int irq, void *dev_id)
++{
++ struct net_device *dev = (struct net_device *) dev_id;
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++ reg_eth_r_masked_intr intr_mask;
++ int ack_intr = 0xffff;
++ reg_eth_rw_clr_err clr_err;
++
++ intr_mask = REG_RD(eth, np->eth_inst, r_masked_intr);
++
++ /*
++ * Check for underrun and/or excessive collisions. Note that the
++ * rw_clr_err register clears both underrun and excessive collision
++ * errors, so there's no need to check them separately.
++ */
++ if (np->sender_started
++ && (intr_mask.urun || intr_mask.exc_col)) {
++ unsigned long flags;
++ dma_descr_data *dma_pos;
++ reg_dma_rw_stat stat;
++
++ /* Get the current output dma position. */
++ stat = REG_RD(dma, np->dma_out_inst, rw_stat);
++ if (stat.list_state == regk_dma_data_at_eol)
++ dma_pos = &np->active_tx_desc->descr;
++ else
++ dma_pos = phys_to_virt(REG_RD_INT(dma,
++ np->dma_out_inst,
++ rw_data));
++
++ /*
++ * Protect against the tx-interrupt messing with
++ * the tx-ring.
++ */
++ spin_lock_irqsave(&np->lock, flags);
++ /*
++ * If we have more than one packet in the tx-ring
++ * drop one and move ahead. Upper layers rely on
++ * packeloss when doing congestion control.
++ */
++ if (intr_mask.exc_col && np->txpackets > 1) {
++ dev_kfree_skb_irq(np->catch_tx_desc->skb);
++ np->catch_tx_desc->skb = 0;
++ np->catch_tx_desc =
++ phys_to_virt((int)
++ np->catch_tx_desc->descr.next);
++ np->txpackets--;
++ netif_wake_queue(dev);
++ }
++ np->ctxt_out.next = 0;
++ if (np->txpackets) {
++ np->ctxt_out.saved_data = (void *)
++ virt_to_phys(&np->catch_tx_desc->descr);
++ np->ctxt_out.saved_data_buf =
++ np->catch_tx_desc->descr.buf;
++
++ /* restart the DMA */
++ DMA_START_CONTEXT(np->dma_out_inst,
++ (int) virt_to_phys(&np->ctxt_out));
++ }
++ else {
++ /* let the next packet restart the DMA */
++ np->ctxt_out.saved_data = (void *)
++ virt_to_phys(&np->active_tx_desc->descr);
++ np->sender_started = 0;
++ }
++
++ spin_unlock_irqrestore(&np->lock, flags);
++ np->stats.tx_errors++;
++ }
++
++ REG_WR_INT(eth, np->eth_inst, rw_ack_intr, ack_intr);
++ clr_err.clr = 1;
++ REG_WR(eth, np->eth_inst, rw_clr_err, clr_err);
++
++ update_rx_stats(np);
++ update_tx_stats(np);
++
++ return IRQ_HANDLED;
++}
++
++/* We have a good packet(s), get it/them out of the buffers. */
++static void
++crisv32_eth_receive_packet(struct net_device *dev)
++{
++ int length;
++ struct sk_buff *skb;
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++ struct sk_buff *tmp;
++ unsigned long flags;
++
++ DEBUG(printk("crisv32_receive_packet\n"));
++
++ /* Activate LED */
++ spin_lock_irqsave(&np->leds->led_lock, flags);
++ if (!np->leds->led_active && time_after(jiffies, np->leds->led_next_time)) {
++ /* light the network leds depending on the current speed. */
++ crisv32_set_network_leds(LED_ACTIVITY, dev);
++
++ /* Set the earliest time we may clear the LED */
++ np->leds->led_next_time = jiffies + NET_FLASH_TIME;
++ np->leds->led_active = 1;
++ np->leds->clear_led_timer.data = (unsigned long) dev;
++ mod_timer(&np->leds->clear_led_timer, jiffies + HZ/10);
++ }
++ spin_unlock_irqrestore(&np->leds->led_lock, flags);
++
++ /* Discard CRC (4 bytes). */
++ length = (np->active_rx_desc->descr.after) -
++ (np->active_rx_desc->descr.buf) - 4;
++
++ /* Update received packet statistics. */
++ np->stats.rx_bytes += length;
++
++ if (np->active_rx_desc != np->last_rx_desc) {
++#ifdef CONFIG_CRIS_MACH_ARTPEC3
++ if (np->gigabit_mode) {
++ skb = dev_alloc_skb(length);
++ if(!skb) {
++ np->stats.rx_errors++;
++ printk(KERN_NOTICE "%s: memory squeeze,"
++ " dropping packet.", dev->name);
++ return;
++ }
++ /* Allocate room for the packet body. */
++ skb_put(skb, length - ETHER_HEAD_LEN);
++ /* Allocate room for the header and copy the data to
++ * the SKB */
++ memcpy(skb_push(skb, ETHER_HEAD_LEN),
++ crisv32_intmem_phys_to_virt((unsigned long)np->active_rx_desc->descr.buf), length);
++ skb->dev = dev;
++ skb->protocol = eth_type_trans(skb, dev);
++ skb->ip_summed = CHECKSUM_NONE;
++ /* Send the packet to the upper layer. */
++ netif_rx(skb);
++ np->last_rx_desc =
++ (void *) phys_to_virt(np->last_rx_desc->descr.next);
++ } else {
++#endif
++ tmp = dev_alloc_skb(MAX_MEDIA_DATA_SIZE);
++ if (!tmp) {
++ np->stats.rx_errors++;
++ printk(KERN_NOTICE "%s: memory squeeze,"
++ " dropping packet.",
++ dev->name);
++ return;
++ }
++ skb = np->active_rx_desc->skb;
++ np->active_rx_desc->skb = tmp;
++ skb_put(skb, length);
++
++ np->active_rx_desc->descr.buf =
++ (void *) virt_to_phys(np->active_rx_desc->skb->data);
++ np->active_rx_desc->descr.after =
++ np->active_rx_desc->descr.buf + MAX_MEDIA_DATA_SIZE;
++
++ skb->dev = dev;
++ skb->protocol = eth_type_trans(skb, dev);
++ skb->ip_summed = CHECKSUM_NONE;
++
++ /* Send the packet to the upper layer. */
++ netif_rx(skb);
++ np->last_rx_desc =
++ phys_to_virt((int)
++ np->last_rx_desc->descr.next);
++ }
++#ifdef CONFIG_CRIS_MACH_ARTPEC3
++ }
++#endif
++ /*
++ * When the input DMA reaches eol precaution must be taken, otherwise
++ * the DMA could stop. The problem occurs if the eol flag is re-placed
++ * on the descriptor that the DMA stands on before the DMA proceed to
++ * the next descriptor. This case could, for example, happen if there
++ * is a traffic burst and then the network goes silent. To prevent this
++ * we make sure that we do not set the eol flag on the descriptor that
++ * the DMA stands on.
++ */
++ if(virt_to_phys(&np->active_rx_desc->descr) !=
++ REG_RD_INT(dma, np->dma_in_inst, rw_saved_data)) {
++ np->active_rx_desc->descr.after =
++ np->active_rx_desc->descr.buf + MAX_MEDIA_DATA_SIZE;
++ np->active_rx_desc->descr.eol = 1;
++ np->active_rx_desc->descr.in_eop = 0;
++ np->active_rx_desc =
++ phys_to_virt((int)np->active_rx_desc->descr.next);
++ barrier();
++ np->prev_rx_desc->descr.eol = 0;
++ flush_dma_descr(&np->prev_rx_desc->descr, 0); // Workaround cache bug
++ np->prev_rx_desc =
++ phys_to_virt((int)np->prev_rx_desc->descr.next);
++ flush_dma_descr(&np->prev_rx_desc->descr, 1); // Workaround cache bug
++ } else {
++ np->new_rx_package = 0;
++ }
++}
++
++/*
++ * This function (i.e. hard_start_xmit) is protected from concurent calls by a
++ * spinlock (xmit_lock) in the net_device structure.
++ */
++static int
++crisv32_eth_send_packet(struct sk_buff *skb, struct net_device *dev)
++{
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++ unsigned char *buf = skb->data;
++ unsigned long flags;
++
++ dev->trans_start = jiffies;
++
++ spin_lock_irqsave(&np->leds->led_lock, flags);
++ if (!np->leds->led_active && time_after(jiffies, np->leds->led_next_time)) {
++ /* light the network leds depending on the current speed. */
++ crisv32_set_network_leds(LED_ACTIVITY, dev);
++
++ /* Set the earliest time we may clear the LED */
++ np->leds->led_next_time = jiffies + NET_FLASH_TIME;
++ np->leds->led_active = 1;
++ np->leds->clear_led_timer.data = (unsigned long) dev;
++ mod_timer(&np->leds->clear_led_timer, jiffies + HZ/10);
++ }
++ spin_unlock_irqrestore(&np->leds->led_lock, flags);
++
++ /*
++ * Need to disable irq to avoid updating pointer in interrupt while
++ * sending packets.
++ */
++ spin_lock_irqsave(&np->lock, flags);
++
++ np->active_tx_desc->skb = skb;
++#ifdef CONFIG_CRIS_MACH_ARTPEC3
++ if (np->gigabit_mode) {
++ if(np->intmem_tx_buf_active->free) {
++ memcpy(np->intmem_tx_buf_active->buf,
++ skb->data, skb->len);
++ np->intmem_tx_buf_active->free = 0;
++ crisv32_eth_hw_send_packet(
++ np->intmem_tx_buf_active->buf, skb->len, np);
++ np->intmem_tx_buf_active =
++ np->intmem_tx_buf_active->next;
++ } else {
++ printk("%s: Internal tx memory buffer not free!\n\r",
++ __FILE__);
++ spin_unlock_irqrestore(&np->lock, flags);
++ return 1;
++ }
++ }
++ else
++#endif
++ {
++ crisv32_eth_hw_send_packet(buf, skb->len, np);
++ }
++ /* Stop queue if full. */
++ if (np->active_tx_desc == np->catch_tx_desc)
++ netif_stop_queue(dev);
++
++ np->txpackets++;
++ spin_unlock_irqrestore(&np->lock, flags);
++
++ return 0;
++}
++
++
++static void
++crisv32_eth_hw_send_packet(unsigned char *buf, int length, void *priv)
++{
++ struct crisv32_ethernet_local *np =
++ (struct crisv32_ethernet_local *) priv;
++
++ /* Configure the tx dma descriptor. */
++#ifdef CONFIG_CRIS_MACH_ARTPEC3
++ if (np->gigabit_mode) {
++ np->active_tx_desc->descr.buf = (unsigned char *) crisv32_intmem_virt_to_phys(buf);
++ } else
++#endif
++ {
++ np->active_tx_desc->descr.buf = (unsigned char *) virt_to_phys(buf);
++ }
++
++ np->active_tx_desc->descr.after = np->active_tx_desc->descr.buf +
++ length;
++ np->active_tx_desc->descr.intr = 1;
++ np->active_tx_desc->descr.out_eop = 1;
++
++ /* Move eol. */
++ np->active_tx_desc->descr.eol = 1;
++ np->prev_tx_desc->descr.eol = 0;
++
++
++ /* Update pointers. */
++ np->prev_tx_desc = np->active_tx_desc;
++ np->active_tx_desc = phys_to_virt((int)np->active_tx_desc->descr.next);
++
++ /* Start DMA. */
++ crisv32_start_dma_out(np);
++}
++
++static void
++crisv32_start_dma_out(struct crisv32_ethernet_local* np)
++{
++ if (!np->sender_started) {
++ /* Start DMA for the first time. */
++ np->ctxt_out.saved_data_buf = np->prev_tx_desc->descr.buf;
++ REG_WR(dma, np->dma_out_inst, rw_group_down,
++ (int) virt_to_phys(&np->ctxt_out));
++ DMA_WR_CMD(np->dma_out_inst, regk_dma_load_c);
++ DMA_WR_CMD(np->dma_out_inst, regk_dma_load_d | regk_dma_burst);
++ np->sender_started = 1;
++ } else {
++ DMA_CONTINUE_DATA(np->dma_out_inst);
++ }
++}
++
++/*
++ * Called by upper layers if they decide it took too long to complete sending
++ * a packet - we need to reset and stuff.
++ */
++static void
++crisv32_eth_tx_timeout(struct net_device *dev)
++{
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++ reg_dma_rw_cfg cfg = {0};
++ reg_dma_rw_stat stat = {0};
++ unsigned long flags;
++
++ printk(KERN_WARNING "%s: transmit timed out\n", dev->name);
++
++
++ spin_lock_irqsave(&np->lock, flags);
++ crisv32_ethernet_bug(dev);
++
++ np->txpackets = 0;
++ /* Update error stats. */
++ np->stats.tx_errors++;
++
++ /* Reset the TX DMA in case it has hung on something. */
++ cfg.en = 0;
++ REG_WR(dma, np->dma_out_inst, rw_cfg, cfg);
++
++ do {
++ stat = REG_RD(dma, np->dma_out_inst, rw_stat);
++ } while (stat.mode != regk_dma_rst);
++
++ /* Reset the tranceiver. */
++ crisv32_eth_reset_tranceiver(dev);
++
++ /* Get rid of the packets that never got an interrupt. */
++ do {
++ if (np->catch_tx_desc->skb)
++ dev_kfree_skb(np->catch_tx_desc->skb);
++
++ np->catch_tx_desc->skb = 0;
++ np->catch_tx_desc =
++ phys_to_virt((int)np->catch_tx_desc->descr.next);
++ } while (np->catch_tx_desc != np->active_tx_desc);
++
++
++ /* Start output DMA. */
++ REG_WR(dma, np->dma_out_inst, rw_group_down,
++ (int) virt_to_phys(&np->ctxt_out));
++ DMA_WR_CMD(np->dma_out_inst, regk_dma_load_c);
++ DMA_WR_CMD(np->dma_out_inst, regk_dma_load_d | regk_dma_burst);
++ spin_unlock_irqrestore(&np->lock, flags);
++
++ /* Tell the upper layers we're ok again. */
++ netif_wake_queue(dev);
++}
++
++/*
++ * Set or clear the multicast filter for this adaptor.
++ * num_addrs == -1 Promiscuous mode, receive all packets
++ * num_addrs == 0 Normal mode, clear multicast list
++ * num_addrs > 0 Multicast mode, receive normal and MC packets,
++ * and do best-effort filtering.
++ */
++static void
++crisv32_eth_set_multicast_list(struct net_device *dev)
++{
++ int num_addr = dev->mc_count;
++ unsigned long int lo_bits;
++ unsigned long int hi_bits;
++ reg_eth_rw_rec_ctrl rec_ctrl = {0};
++ reg_eth_rw_ga_lo ga_lo = {0};
++ reg_eth_rw_ga_hi ga_hi = {0};
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ if (dev->flags & IFF_PROMISC) {
++ /* Promiscuous mode. */
++ lo_bits = 0xfffffffful;
++ hi_bits = 0xfffffffful;
++
++ /* Enable individual receive. */
++ rec_ctrl = (reg_eth_rw_rec_ctrl) REG_RD(eth, np->eth_inst,
++ rw_rec_ctrl);
++ rec_ctrl.individual = regk_eth_yes;
++ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl);
++ } else if (dev->flags & IFF_ALLMULTI) {
++ /* Enable all multicasts. */
++ lo_bits = 0xfffffffful;
++ hi_bits = 0xfffffffful;
++
++ /* Disable individual receive */
++ rec_ctrl =
++ (reg_eth_rw_rec_ctrl) REG_RD(eth, np->eth_inst, rw_rec_ctrl);
++ rec_ctrl.individual = regk_eth_no;
++ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl);
++ } else if (num_addr == 0) {
++ /* Normal, clear the mc list. */
++ lo_bits = 0x00000000ul;
++ hi_bits = 0x00000000ul;
++
++ /* Disable individual receive */
++ rec_ctrl =
++ (reg_eth_rw_rec_ctrl) REG_RD(eth, np->eth_inst, rw_rec_ctrl);
++ rec_ctrl.individual = regk_eth_no;
++ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl);
++ } else {
++ /* MC mode, receive normal and MC packets. */
++ char hash_ix;
++ struct dev_mc_list *dmi = dev->mc_list;
++ int i;
++ char *baddr;
++ lo_bits = 0x00000000ul;
++ hi_bits = 0x00000000ul;
++
++ for (i = 0; i < num_addr; i++) {
++ /* Calculate the hash index for the GA registers. */
++ hash_ix = 0;
++ baddr = dmi->dmi_addr;
++ hash_ix ^= (*baddr) & 0x3f;
++ hash_ix ^= ((*baddr) >> 6) & 0x03;
++ ++baddr;
++ hash_ix ^= ((*baddr) << 2) & 0x03c;
++ hash_ix ^= ((*baddr) >> 4) & 0xf;
++ ++baddr;
++ hash_ix ^= ((*baddr) << 4) & 0x30;
++ hash_ix ^= ((*baddr) >> 2) & 0x3f;
++ ++baddr;
++ hash_ix ^= (*baddr) & 0x3f;
++ hash_ix ^= ((*baddr) >> 6) & 0x03;
++ ++baddr;
++ hash_ix ^= ((*baddr) << 2) & 0x03c;
++ hash_ix ^= ((*baddr) >> 4) & 0xf;
++ ++baddr;
++ hash_ix ^= ((*baddr) << 4) & 0x30;
++ hash_ix ^= ((*baddr) >> 2) & 0x3f;
++
++ hash_ix &= 0x3f;
++
++ if (hash_ix > 32)
++ hi_bits |= (1 << (hash_ix - 32));
++ else
++ lo_bits |= (1 << hash_ix);
++
++ dmi = dmi->next;
++ }
++
++ /* Disable individual receive. */
++ rec_ctrl =
++ (reg_eth_rw_rec_ctrl) REG_RD(eth, np->eth_inst, rw_rec_ctrl);
++ rec_ctrl.individual = regk_eth_no;
++ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl);
++ }
++
++ ga_lo.tbl = (unsigned int) lo_bits;
++ ga_hi.tbl = (unsigned int) hi_bits;
++
++ REG_WR(eth, np->eth_inst, rw_ga_lo, ga_lo);
++ REG_WR(eth, np->eth_inst, rw_ga_hi, ga_hi);
++}
++
++static int
++crisv32_eth_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
++{
++ struct mii_ioctl_data *data = if_mii(ifr);
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++ int old_autoneg;
++
++ spin_lock(&np->lock); /* Preempt protection */
++ switch (cmd) {
++ case SIOCGMIIPHY: /* Get PHY address */
++ data->phy_id = np->mdio_phy_addr;
++ break;
++ case SIOCGMIIREG: /* Read MII register */
++ data->val_out = crisv32_eth_get_mdio_reg(dev,
++ data->reg_num);
++ break;
++ case SIOCSMIIREG: /* Write MII register */
++ crisv32_eth_set_mdio_reg(dev, data->reg_num,
++ data->val_in);
++ break;
++ case SET_ETH_ENABLE_LEDS:
++ use_network_leds = 1;
++ break;
++ case SET_ETH_DISABLE_LEDS:
++ use_network_leds = 0;
++ break;
++ case SET_ETH_AUTONEG:
++ old_autoneg = autoneg_normal;
++ autoneg_normal = *(int*)data;
++ if (autoneg_normal != old_autoneg)
++ crisv32_eth_negotiate(dev);
++ break;
++ default:
++ spin_unlock(&np->lock); /* Preempt protection */
++ return -EINVAL;
++ }
++ spin_unlock(&np->lock);
++ return 0;
++}
++
++static int crisv32_eth_get_settings(struct net_device *dev,
++ struct ethtool_cmd *ecmd)
++{
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++ /* What about GMII and 1000xpause? not included in ethtool.h */
++ ecmd->supported = SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII |
++ SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
++ SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
++#ifdef CONFIG_CRIS_MACH_ARTPEC3
++ ecmd->supported |= SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full;
++#endif
++ ecmd->port = PORT_TP;
++ ecmd->transceiver = XCVR_EXTERNAL;
++ ecmd->phy_address = np->mdio_phy_addr;
++ ecmd->speed = np->current_speed;
++ ecmd->duplex = np->full_duplex;
++ ecmd->advertising = ADVERTISED_TP;
++
++ if (np->current_duplex == autoneg && np->current_speed_selection == 0)
++ ecmd->advertising |= ADVERTISED_Autoneg;
++ else {
++ ecmd->advertising |=
++ ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
++ ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
++#ifdef CONFIG_CRIS_MACH_ARTPEC3
++ ecmd->advertising |= ADVERTISED_1000baseT_Half |
++ ADVERTISED_1000baseT_Full;
++#endif
++ if (np->current_speed_selection == 10)
++ ecmd->advertising &= ~(ADVERTISED_100baseT_Half |
++ ADVERTISED_100baseT_Full |
++ ADVERTISED_1000baseT_Half |
++ ADVERTISED_1000baseT_Full);
++
++ else if (np->current_speed_selection == 100)
++ ecmd->advertising &= ~(ADVERTISED_10baseT_Half |
++ ADVERTISED_10baseT_Full |
++ ADVERTISED_1000baseT_Half |
++ ADVERTISED_1000baseT_Full);
++
++ else if (np->current_speed_selection == 1000)
++ ecmd->advertising &= ~(ADVERTISED_10baseT_Half |
++ ADVERTISED_10baseT_Full |
++ ADVERTISED_100baseT_Half |
++ ADVERTISED_100baseT_Full);
++
++ if (np->current_duplex == half)
++ ecmd->advertising &= ~(ADVERTISED_10baseT_Full |
++ ADVERTISED_100baseT_Full |
++ ADVERTISED_1000baseT_Full);
++ else if (np->current_duplex == full)
++ ecmd->advertising &= ~(ADVERTISED_10baseT_Half |
++ ADVERTISED_100baseT_Half |
++ ADVERTISED_1000baseT_Half);
++ }
++
++ ecmd->autoneg = AUTONEG_ENABLE;
++ return 0;
++}
++
++static int crisv32_eth_set_settings(struct net_device *dev,
++ struct ethtool_cmd *ecmd)
++{
++ if (ecmd->autoneg == AUTONEG_ENABLE) {
++ crisv32_eth_set_duplex(dev, autoneg);
++ crisv32_eth_set_speed(dev, 0);
++ } else {
++ crisv32_eth_set_duplex(dev, ecmd->duplex);
++ crisv32_eth_set_speed(dev, ecmd->speed);
++ }
++
++ return 0;
++}
++
++static void crisv32_eth_get_drvinfo(struct net_device *dev,
++ struct ethtool_drvinfo *info)
++{
++ strncpy(info->driver, "ETRAX FS", sizeof(info->driver) - 1);
++ strncpy(info->version, "$Revision: 1.96 $", sizeof(info->version) - 1);
++ strncpy(info->fw_version, "N/A", sizeof(info->fw_version) - 1);
++ strncpy(info->bus_info, "N/A", sizeof(info->bus_info) - 1);
++}
++
++static int crisv32_eth_nway_reset(struct net_device *dev)
++{
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ if (np->current_duplex == autoneg && np->current_speed_selection == 0)
++ crisv32_eth_negotiate(dev);
++ return 0;
++}
++
++static struct ethtool_ops crisv32_ethtool_ops = {
++ .get_settings = crisv32_eth_get_settings,
++ .set_settings = crisv32_eth_set_settings,
++ .get_drvinfo = crisv32_eth_get_drvinfo,
++ .nway_reset = crisv32_eth_nway_reset,
++ .get_link = ethtool_op_get_link,
++};
++
++/* Is this function really needed? Use ethtool instead? */
++static int
++crisv32_eth_set_config(struct net_device *dev, struct ifmap *map)
++{
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ spin_lock(&np->lock); /* Preempt protection */
++
++ switch(map->port) {
++ case IF_PORT_UNKNOWN:
++ /* Use autoneg */
++ crisv32_eth_set_speed(dev, 0);
++ crisv32_eth_set_duplex(dev, autoneg);
++ break;
++ case IF_PORT_10BASET:
++ crisv32_eth_set_speed(dev, 10);
++ crisv32_eth_set_duplex(dev, autoneg);
++ break;
++ case IF_PORT_100BASET:
++ case IF_PORT_100BASETX:
++ crisv32_eth_set_speed(dev, 100);
++ crisv32_eth_set_duplex(dev, autoneg);
++ break;
++ case IF_PORT_100BASEFX:
++ case IF_PORT_10BASE2:
++ case IF_PORT_AUI:
++ spin_unlock(&np->lock);
++ return -EOPNOTSUPP;
++ break;
++ default:
++ printk(KERN_ERR "%s: Invalid media selected",
++ dev->name);
++ spin_unlock(&np->lock);
++ return -EINVAL;
++ }
++ spin_unlock(&np->lock);
++ return 0;
++}
++
++#ifdef CONFIG_CRIS_MACH_ARTPEC3
++/*
++ * Switch the behaviour of the tx and rx buffers using
++ * external or internal memory. Usage of the internal
++ * memory is required for gigabit operation.
++ */
++static void
++crisv32_eth_switch_intmem_usage(struct net_device *dev)
++{
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ int i;
++ reg_dma_rw_stat stat;
++ reg_dma_rw_cfg cfg = {0};
++ reg_dma_rw_intr_mask intr_mask_in = { .in_eop = regk_dma_yes };
++ reg_dma_rw_ack_intr ack_intr = { .data = 1,.in_eop = 1 };
++ unsigned char *intmem_tmp;
++
++ /* Notify the kernel that the interface has stopped */
++ netif_stop_queue(dev);
++
++ /* Stop the receiver DMA */
++ cfg.en = regk_dma_no;
++ REG_WR(dma, np->dma_in_inst, rw_cfg, cfg);
++
++ if (!(np->gigabit_mode)) {
++ /* deallocate SKBs in rx_desc */
++ for (i = 0; i < NBR_RX_DESC; i++)
++ dev_kfree_skb(np->dma_rx_descr_list[i].skb);
++
++ /* Init TX*/
++ for(i=0; i < NBR_INTMEM_TX_BUF; i++) {
++ /* Allocate internal memory */
++ intmem_tmp = NULL;
++ intmem_tmp = crisv32_intmem_alloc(MAX_MEDIA_DATA_SIZE,
++ 32);
++ /* Check that we really got the memory */
++ if (intmem_tmp == NULL) {
++ printk(KERN_ERR "%s: Can't allocate intmem for"
++ " RX buffer nbr: %d\n", dev->name, i);
++ return;
++ }
++ /* Setup the list entry */
++ np->tx_intmem_buf_list[i].free = 1;
++ np->tx_intmem_buf_list[i].buf = intmem_tmp;
++ np->tx_intmem_buf_list[i].next = &np->tx_intmem_buf_list[i + 1];
++ }
++ /* Setup the last list entry */
++ np->tx_intmem_buf_list[NBR_INTMEM_TX_BUF - 1].next = &np->tx_intmem_buf_list[0];
++ /* Setup initial pointer */
++ np->intmem_tx_buf_active = np->tx_intmem_buf_list;
++ np->intmem_tx_buf_catch = np->tx_intmem_buf_list;
++
++ /* Init RX */
++ for (i=0; i < NBR_INTMEM_RX_DESC; i++) {
++ /* Allocate internal memory */
++ intmem_tmp = NULL;
++ intmem_tmp = crisv32_intmem_alloc(MAX_MEDIA_DATA_SIZE, 32);
++ /* Check that we really got the memory */
++ if (intmem_tmp == NULL) {
++ printk(KERN_ERR "%s: Can't allocate intmem for"
++ " desc nbr: %d\n", dev->name, i);
++ return;
++ }
++ /* Setup the descriptors*/
++ np->dma_rx_descr_list[i].skb = NULL;
++ np->dma_rx_descr_list[i].descr.buf =
++ (void *) crisv32_intmem_virt_to_phys(intmem_tmp);
++ np->dma_rx_descr_list[i].descr.after =
++ (void *) crisv32_intmem_virt_to_phys(intmem_tmp + MAX_MEDIA_DATA_SIZE);
++ np->dma_rx_descr_list[i].descr.eol = 0;
++ np->dma_rx_descr_list[i].descr.in_eop = 0;
++ np->dma_rx_descr_list[i].descr.next =
++ (void *) virt_to_phys(&np->dma_rx_descr_list[i+1].descr);
++ }
++ /* Setup the last rx descriptor */
++ np->dma_rx_descr_list[NBR_INTMEM_RX_DESC - 1].descr.eol = 1;
++ np->dma_rx_descr_list[NBR_INTMEM_RX_DESC - 1].descr.next =
++ (void*) virt_to_phys(&np->dma_rx_descr_list[0].descr);
++ /* Initialise initial receive pointers. */
++ np->active_rx_desc = &np->dma_rx_descr_list[0];
++ np->prev_rx_desc = &np->dma_rx_descr_list[NBR_INTMEM_RX_DESC - 1];
++ np->last_rx_desc = np->prev_rx_desc;
++
++ np->gigabit_mode = 1;
++ } else {
++ /* dealloc TX intmem */
++ for(i=0; i < NBR_INTMEM_TX_BUF; i++)
++ crisv32_intmem_free(np->tx_intmem_buf_list[i].buf);
++
++ /* dealloc RX intmem */
++ for (i=0; i < NBR_INTMEM_RX_DESC; i++)
++ crisv32_intmem_free(crisv32_intmem_phys_to_virt((unsigned long)np->dma_rx_descr_list[i].descr.buf));
++
++ /* Setup new rx_desc and alloc SKBs */
++ for (i = 0; i < NBR_RX_DESC; i++) {
++ struct sk_buff *skb;
++
++ skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE);
++ np->dma_rx_descr_list[i].skb = skb;
++ np->dma_rx_descr_list[i].descr.buf =
++ (char*)virt_to_phys(skb->data);
++ np->dma_rx_descr_list[i].descr.after =
++ (char*)virt_to_phys(skb->data + MAX_MEDIA_DATA_SIZE);
++
++ np->dma_rx_descr_list[i].descr.eol = 0;
++ np->dma_rx_descr_list[i].descr.in_eop = 0;
++ np->dma_rx_descr_list[i].descr.next =
++ (void *) virt_to_phys(&np->dma_rx_descr_list[i + 1].descr);
++ }
++
++ np->dma_rx_descr_list[NBR_RX_DESC - 1].descr.eol = 1;
++ np->dma_rx_descr_list[NBR_RX_DESC - 1].descr.next =
++ (void *) virt_to_phys(&np->dma_rx_descr_list[0].descr);
++
++ /* Initialise initial receive pointers. */
++ np->active_rx_desc = &np->dma_rx_descr_list[0];
++ np->prev_rx_desc = &np->dma_rx_descr_list[NBR_RX_DESC - 1];
++ np->last_rx_desc = np->prev_rx_desc;
++
++ np->gigabit_mode = 0;
++ }
++
++ /* Fill context descriptors. */
++ np->ctxt_in.next = 0;
++ np->ctxt_in.saved_data =
++ (dma_descr_data *) virt_to_phys(&np->dma_rx_descr_list[0].descr);
++ np->ctxt_in.saved_data_buf = np->dma_rx_descr_list[0].descr.buf;
++
++ /* Enable irq and make sure that the irqs are cleared. */
++ REG_WR(dma, np->dma_in_inst, rw_intr_mask, intr_mask_in);
++ REG_WR(dma, np->dma_in_inst, rw_ack_intr, ack_intr);
++
++ /* Start input dma */
++ cfg.en = regk_dma_yes;
++ REG_WR(dma, np->dma_in_inst, rw_cfg, cfg);
++ REG_WR(dma, np->dma_in_inst, rw_group_down,
++ (int) virt_to_phys(&np->ctxt_in));
++
++ DMA_WR_CMD(np->dma_in_inst, regk_dma_load_c);
++ DMA_WR_CMD(np->dma_in_inst, regk_dma_load_d | regk_dma_burst);
++
++ netif_wake_queue(dev);
++
++ stat = REG_RD(dma, np->dma_in_inst, rw_stat);
++}
++#endif
++
++static void
++crisv32_eth_negotiate(struct net_device *dev)
++{
++ unsigned short data =
++ crisv32_eth_get_mdio_reg(dev, MII_ADVERTISE);
++ unsigned short ctrl1000 =
++ crisv32_eth_get_mdio_reg(dev, MII_CTRL1000);
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ /* Make all capabilities available */
++ data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
++ ADVERTISE_100HALF | ADVERTISE_100FULL;
++ ctrl1000 |= ADVERTISE_1000HALF | ADVERTISE_1000FULL;
++
++ /* Remove the speed capabilities that we that do not want */
++ switch (np->current_speed_selection) {
++ case 10 :
++ data &= ~(ADVERTISE_100HALF | ADVERTISE_100FULL);
++ ctrl1000 &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL);
++ break;
++ case 100 :
++ data &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL);
++ ctrl1000 &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL);
++ break;
++ case 1000 :
++ data &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
++ ADVERTISE_100HALF | ADVERTISE_100FULL);
++ break;
++ }
++
++ /* Remove the duplex capabilites that we do not want */
++ if (np->current_duplex == full) {
++ data &= ~(ADVERTISE_10HALF | ADVERTISE_100HALF);
++ ctrl1000 &= ~(ADVERTISE_1000HALF);
++ }
++ else if (np->current_duplex == half) {
++ data &= ~(ADVERTISE_10FULL | ADVERTISE_100FULL);
++ ctrl1000 &= ~(ADVERTISE_1000FULL);
++ }
++
++ crisv32_eth_set_mdio_reg(dev, MII_ADVERTISE, data);
++#ifdef CONFIG_CRIS_MACH_ARTPEC3
++ crisv32_eth_set_mdio_reg(dev, MII_CTRL1000, ctrl1000);
++#endif
++
++ /* Renegotiate with link partner */
++ if (autoneg_normal) {
++ data = crisv32_eth_get_mdio_reg(dev, MII_BMCR);
++ data |= BMCR_ANENABLE | BMCR_ANRESTART;
++ }
++ crisv32_eth_set_mdio_reg(dev, MII_BMCR, data);
++}
++static void
++crisv32_eth_check_speed(unsigned long idev)
++{
++ static int led_initiated = 0;
++ struct net_device *dev = (struct net_device *) idev;
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ unsigned long data;
++ int old_speed;
++ unsigned long flags;
++
++ BUG_ON(!np);
++ BUG_ON(!np->transceiver);
++
++ spin_lock(&np->transceiver_lock);
++
++ old_speed = np->current_speed;
++ data = crisv32_eth_get_mdio_reg(dev, MII_BMSR);
++
++ if (!(data & BMSR_LSTATUS))
++ np->current_speed = 0;
++ else
++ np->transceiver->check_speed(dev);
++
++#ifdef CONFIG_CRIS_MACH_ARTPEC3
++ if ((old_speed != np->current_speed)
++ && ((old_speed == 1000) || (np->current_speed == 1000))) {
++ /* Switch between mii and gmii */
++ reg_eth_rw_gen_ctrl gen_ctrl = REG_RD(eth, np->eth_inst,
++ rw_gen_ctrl);
++ reg_eth_rw_tr_ctrl tr_ctrl = REG_RD(eth, np->eth_inst,
++ rw_tr_ctrl);
++ if (old_speed == 1000) {
++ gen_ctrl.phy = regk_eth_mii;
++ gen_ctrl.gtxclk_out = regk_eth_no;
++ tr_ctrl.carrier_ext = regk_eth_no;
++ }
++ else {
++ gen_ctrl.phy = regk_eth_gmii;
++ gen_ctrl.gtxclk_out = regk_eth_yes;
++ tr_ctrl.carrier_ext = regk_eth_yes;
++ }
++ REG_WR(eth, np->eth_inst, rw_tr_ctrl, tr_ctrl);
++ REG_WR(eth, np->eth_inst, rw_gen_ctrl, gen_ctrl);
++
++ crisv32_eth_switch_intmem_usage(dev);
++ }
++#endif
++
++ spin_lock_irqsave(&np->leds->led_lock, flags);
++ if ((old_speed != np->current_speed) || !led_initiated) {
++ led_initiated = 1;
++ np->leds->clear_led_timer.data = (unsigned long) dev;
++ if (np->current_speed) {
++ netif_carrier_on(dev);
++ crisv32_set_network_leds(LED_LINK, dev);
++ } else {
++ netif_carrier_off(dev);
++ crisv32_set_network_leds(LED_NOLINK, dev);
++ }
++ }
++ spin_unlock_irqrestore(&np->leds->led_lock, flags);
++
++ /* Reinitialize the timer. */
++ np->speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
++ add_timer(&np->speed_timer);
++
++ spin_unlock(&np->transceiver_lock);
++}
++
++static void
++crisv32_eth_set_speed(struct net_device *dev, unsigned long speed)
++{
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ spin_lock(&np->transceiver_lock);
++ if (np->current_speed_selection != speed) {
++ np->current_speed_selection = speed;
++ crisv32_eth_negotiate(dev);
++ }
++ spin_unlock(&np->transceiver_lock);
++}
++
++static void
++crisv32_eth_check_duplex(unsigned long idev)
++{
++ struct net_device *dev = (struct net_device *) idev;
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++ reg_eth_rw_rec_ctrl rec_ctrl;
++ int old_duplex = np->full_duplex;
++
++ np->transceiver->check_duplex(dev);
++
++ if (old_duplex != np->full_duplex) {
++ /* Duplex changed. */
++ rec_ctrl = (reg_eth_rw_rec_ctrl) REG_RD(eth, np->eth_inst,
++ rw_rec_ctrl);
++ rec_ctrl.duplex = np->full_duplex;
++ REG_WR(eth, np->eth_inst, rw_rec_ctrl, rec_ctrl);
++ }
++
++ /* Reinitialize the timer. */
++ np->duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
++ add_timer(&np->duplex_timer);
++}
++
++static void
++crisv32_eth_set_duplex(struct net_device *dev, enum duplex new_duplex)
++{
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++ spin_lock(&np->transceiver_lock);
++ if (np->current_duplex != new_duplex) {
++ np->current_duplex = new_duplex;
++ crisv32_eth_negotiate(dev);
++ }
++ spin_unlock(&np->transceiver_lock);
++}
++
++static int
++crisv32_eth_probe_transceiver(struct net_device *dev)
++{
++ unsigned int phyid_high;
++ unsigned int phyid_low;
++ unsigned int oui;
++ struct transceiver_ops *ops = NULL;
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ /* Probe MDIO physical address. */
++ for (np->mdio_phy_addr = 0;
++ np->mdio_phy_addr <= 31; np->mdio_phy_addr++) {
++ if (crisv32_eth_get_mdio_reg(dev, MII_BMSR) != 0xffff)
++ break;
++ }
++
++ if (np->mdio_phy_addr == 32)
++ return -ENODEV;
++
++ /* Get manufacturer. */
++ phyid_high = crisv32_eth_get_mdio_reg(dev, MII_PHYSID1);
++ phyid_low = crisv32_eth_get_mdio_reg(dev, MII_PHYSID2);
++
++ oui = (phyid_high << 6) | (phyid_low >> 10);
++
++ for (ops = &transceivers[0]; ops->oui; ops++) {
++ if (ops->oui == oui)
++ break;
++ }
++
++ np->transceiver = ops;
++ return 0;
++}
++
++static void
++generic_check_speed(struct net_device *dev)
++{
++ unsigned long data;
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ data = crisv32_eth_get_mdio_reg(dev, MII_ADVERTISE);
++ if ((data & ADVERTISE_100FULL) ||
++ (data & ADVERTISE_100HALF))
++ np->current_speed = 100;
++ else
++ np->current_speed = 10;
++}
++
++static void
++generic_check_duplex(struct net_device *dev)
++{
++ unsigned long data;
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ data = crisv32_eth_get_mdio_reg(dev, MII_ADVERTISE);
++ if ((data & ADVERTISE_10FULL) ||
++ (data & ADVERTISE_100FULL))
++ np->full_duplex = 1;
++ else
++ np->full_duplex = 0;
++}
++
++static void
++broadcom_check_speed(struct net_device *dev)
++{
++ unsigned long data;
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ data = crisv32_eth_get_mdio_reg(dev, MDIO_AUX_CTRL_STATUS_REG);
++ np->current_speed = (data & MDIO_BC_SPEED ? 100 : 10);
++}
++
++static void
++broadcom_check_duplex(struct net_device *dev)
++{
++ unsigned long data;
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ data = crisv32_eth_get_mdio_reg(dev, MDIO_AUX_CTRL_STATUS_REG);
++ np->full_duplex = (data & MDIO_BC_FULL_DUPLEX_IND) ? 1 : 0;
++}
++
++static void
++tdk_check_speed(struct net_device *dev)
++{
++ unsigned long data;
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ data = crisv32_eth_get_mdio_reg(dev, MDIO_TDK_DIAGNOSTIC_REG);
++ np->current_speed = (data & MDIO_TDK_DIAGNOSTIC_RATE ? 100 : 10);
++}
++
++static void
++tdk_check_duplex(struct net_device *dev)
++{
++ unsigned long data;
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ data = crisv32_eth_get_mdio_reg(dev, MDIO_TDK_DIAGNOSTIC_REG);
++ np->full_duplex = (data & MDIO_TDK_DIAGNOSTIC_DPLX) ? 1 : 0;
++
++}
++
++static void
++intel_check_speed(struct net_device *dev)
++{
++ unsigned long data;
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++ data = crisv32_eth_get_mdio_reg(dev, MDIO_INT_STATUS_REG_2);
++ np->current_speed = (data & MDIO_INT_SPEED ? 100 : 10);
++}
++
++static void
++intel_check_duplex(struct net_device *dev)
++{
++ unsigned long data;
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ data = crisv32_eth_get_mdio_reg(dev, MDIO_INT_STATUS_REG_2);
++ np->full_duplex = (data & MDIO_INT_FULL_DUPLEX_IND) ? 1 : 0;
++}
++
++static void
++national_check_speed(struct net_device *dev)
++{
++ unsigned long data;
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ data = crisv32_eth_get_mdio_reg(dev, MDIO_NAT_LINK_AN_REG);
++ if (data & MDIO_NAT_1000)
++ np->current_speed = 1000;
++ else if (data & MDIO_NAT_100)
++ np->current_speed = 100;
++ else
++ np->current_speed = 10;
++}
++
++static void
++national_check_duplex(struct net_device *dev)
++{
++ unsigned long data;
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ data = crisv32_eth_get_mdio_reg(dev, MDIO_NAT_LINK_AN_REG);
++ if (data & MDIO_NAT_FULL_DUPLEX_IND)
++ np->full_duplex = 1;
++ else
++ np->full_duplex = 0;
++}
++
++static void
++crisv32_eth_reset_tranceiver(struct net_device *dev)
++{
++ int i;
++ unsigned short cmd;
++ unsigned short data;
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ data = crisv32_eth_get_mdio_reg(dev, MII_BMCR);
++
++ cmd = (MDIO_START << 14)
++ | (MDIO_WRITE << 12)
++ | (np->mdio_phy_addr << 7)
++ | (MII_BMCR << 2);
++
++ crisv32_eth_send_mdio_cmd(dev, cmd, 1);
++
++ data |= 0x8000;
++
++ /* Magic value is number of bits. */
++ for (i = 15; i >= 0; i--)
++ crisv32_eth_send_mdio_bit(dev, GET_BIT(i, data));
++}
++
++static unsigned short
++crisv32_eth_get_mdio_reg(struct net_device *dev, unsigned char reg_num)
++{
++ int i;
++ unsigned short cmd; /* Data to be sent on MDIO port. */
++ unsigned short data; /* Data read from MDIO. */
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ /* Start of frame, OP Code, Physical Address, Register Address. */
++ cmd = (MDIO_START << 14)
++ | (MDIO_READ << 12)
++ | (np->mdio_phy_addr << 7)
++ | (reg_num << 2);
++
++ crisv32_eth_send_mdio_cmd(dev, cmd, 0);
++
++ data = 0;
++
++ /* Receive data. Magic value is number of bits. */
++ for (i = 15; i >= 0; i--)
++ data |= (crisv32_eth_receive_mdio_bit(dev) << i);
++
++ return data;
++}
++
++static void
++crisv32_eth_set_mdio_reg(struct net_device *dev, unsigned char reg, int value)
++{
++ int bitCounter;
++ unsigned short cmd;
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ cmd = (MDIO_START << 14)
++ | (MDIO_WRITE << 12)
++ | (np->mdio_phy_addr << 7)
++ | (reg << 2);
++
++ crisv32_eth_send_mdio_cmd(dev, cmd, 1);
++
++ /* Data... */
++ for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
++ crisv32_eth_send_mdio_bit(dev, GET_BIT(bitCounter, value));
++ }
++}
++
++static void
++crisv32_eth_send_mdio_cmd(struct net_device *dev, unsigned short cmd,
++ int write_cmd)
++{
++ int i;
++ unsigned char data = 0x2;
++
++ /* Preamble. Magic value is number of bits. */
++ for (i = 31; i >= 0; i--)
++ crisv32_eth_send_mdio_bit(dev, GET_BIT(i, MDIO_PREAMBLE));
++
++ for (i = 15; i >= 2; i--)
++ crisv32_eth_send_mdio_bit(dev, GET_BIT(i, cmd));
++
++ /* Turnaround. */
++ for (i = 1; i >= 0; i--)
++ if (write_cmd)
++ crisv32_eth_send_mdio_bit(dev, GET_BIT(i, data));
++ else
++ crisv32_eth_receive_mdio_bit(dev);
++}
++
++static void
++crisv32_eth_send_mdio_bit(struct net_device *dev, unsigned char bit)
++{
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ reg_eth_rw_mgm_ctrl mgm_ctrl = {
++ .mdoe = regk_eth_yes,
++ .mdio = bit & 1
++ };
++
++ REG_WR(eth, np->eth_inst, rw_mgm_ctrl, mgm_ctrl);
++
++ udelay(1);
++
++ mgm_ctrl.mdc = 1;
++ REG_WR(eth, np->eth_inst, rw_mgm_ctrl, mgm_ctrl);
++
++ udelay(1);
++}
++
++static unsigned char
++crisv32_eth_receive_mdio_bit(struct net_device *dev)
++{
++ reg_eth_r_stat stat;
++ reg_eth_rw_mgm_ctrl mgm_ctrl = {0};
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++
++ REG_WR(eth, np->eth_inst, rw_mgm_ctrl, mgm_ctrl);
++ stat = REG_RD(eth, np->eth_inst, r_stat);
++
++ udelay(1);
++
++ mgm_ctrl.mdc = 1;
++ REG_WR(eth, np->eth_inst, rw_mgm_ctrl, mgm_ctrl);
++
++ udelay(1);
++ return stat.mdio;
++}
++
++static void
++crisv32_clear_network_leds(unsigned long priv)
++{
++ struct net_device *dev = (struct net_device*)priv;
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++ unsigned long flags;
++
++ spin_lock_irqsave(&np->leds->led_lock, flags);
++ if (np->leds->led_active && time_after(jiffies, np->leds->led_next_time)) {
++ crisv32_set_network_leds(LED_NOACTIVITY, dev);
++
++ /* Set the earliest time we may set the LED */
++ np->leds->led_next_time = jiffies + NET_FLASH_PAUSE;
++ np->leds->led_active = 0;
++ }
++ spin_unlock_irqrestore(&np->leds->led_lock, flags);
++}
++
++static void
++crisv32_set_network_leds(int active, struct net_device *dev)
++{
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++ int light_leds = 0;
++
++ if (np->leds->ledgrp == LED_GRP_NONE)
++ return;
++
++ if (active == LED_NOLINK) {
++ if (dev == crisv32_dev[0])
++ np->leds->ifisup[0] = 0;
++ else
++ np->leds->ifisup[1] = 0;
++ }
++ else if (active == LED_LINK) {
++ if (dev == crisv32_dev[0])
++ np->leds->ifisup[0] = 1;
++ else
++ np->leds->ifisup[1] = 1;
++#if defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK)
++ light_leds = 1;
++ } else {
++ light_leds = (active == LED_NOACTIVITY);
++#elif defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY)
++ light_leds = 0;
++ } else {
++ light_leds = (active == LED_ACTIVITY);
++#else
++#error "Define either CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK or CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY"
++#endif
++ }
++
++ if (!use_network_leds) {
++ NET_LED_SET(np->leds->ledgrp,LED_OFF);
++ return;
++ }
++
++ if (!np->current_speed) {
++ /* Set link down if none of the interfaces that use this led group is up */
++ if ((np->leds->ifisup[0] + np->leds->ifisup[1]) == 0) {
++#if defined(CONFIG_ETRAX_NETWORK_RED_ON_NO_CONNECTION)
++ /* Make LED red, link is down */
++ NET_LED_SET(np->leds->ledgrp,LED_RED);
++#else
++ NET_LED_SET(np->leds->ledgrp,LED_OFF);
++#endif
++ }
++ }
++ else if (light_leds) {
++ if (np->current_speed == 10) {
++ NET_LED_SET(np->leds->ledgrp,LED_ORANGE);
++ } else {
++ NET_LED_SET(np->leds->ledgrp,LED_GREEN);
++ }
++ }
++ else {
++ NET_LED_SET(np->leds->ledgrp,LED_OFF);
++ }
++}
++
++#ifdef CONFIG_NET_POLL_CONTROLLER
++static void
++crisv32_netpoll(struct net_device* netdev)
++{
++ crisv32rx_eth_interrupt(DMA0_INTR_VECT, netdev, NULL);
++}
++#endif
++
++#ifdef CONFIG_CPU_FREQ
++static int
++crisv32_ethernet_freq_notifier(struct notifier_block *nb,
++ unsigned long val, void *data)
++{
++ struct cpufreq_freqs *freqs = data;
++ if (val == CPUFREQ_POSTCHANGE) {
++ int i;
++ for (i = 0; i < 2; i++) {
++ struct net_device* dev = crisv32_dev[i];
++ unsigned short data;
++ if (dev == NULL)
++ continue;
++
++ data = crisv32_eth_get_mdio_reg(dev, MII_BMCR);
++ if (freqs->new == 200000)
++ data &= ~BMCR_PDOWN;
++ else
++ data |= BMCR_PDOWN;
++ crisv32_eth_set_mdio_reg(dev, MII_BMCR, data);
++ }
++ }
++ return 0;
++}
++#endif
++
++/*
++ * Must be called with the np->lock held.
++ */
++static void crisv32_ethernet_bug(struct net_device *dev)
++{
++ struct crisv32_ethernet_local *np = netdev_priv(dev);
++ dma_descr_data *dma_pos;
++ dma_descr_data *in_dma_pos;
++ reg_dma_rw_stat stat = {0};
++ reg_dma_rw_stat in_stat = {0};
++ int i;
++
++ /* Get the current output dma position. */
++ stat = REG_RD(dma, np->dma_out_inst, rw_stat);
++ dma_pos = phys_to_virt(REG_RD_INT(dma, np->dma_out_inst, rw_data));
++ in_stat = REG_RD(dma, np->dma_in_inst, rw_stat);
++ in_dma_pos = phys_to_virt(REG_RD_INT(dma, np->dma_in_inst, rw_data));
++
++ printk("%s:\n"
++ "stat.list_state=%x\n"
++ "stat.mode=%x\n"
++ "stat.stream_cmd_src=%x\n"
++ "dma_pos=%x\n"
++ "in_stat.list_state=%x\n"
++ "in_stat.mode=%x\n"
++ "in_stat.stream_cmd_src=%x\n"
++ "in_dma_pos=%x\n"
++ "catch=%x active=%x\n"
++ "packets=%d queue=%d\n"
++ "intr_vect.r_vect=%x\n"
++ "dma.r_masked_intr=%x dma.rw_ack_intr=%x "
++ "dma.r_intr=%x dma.rw_intr_masked=%x\n"
++ "eth.r_stat=%x\n",
++ __func__,
++ stat.list_state, stat.mode, stat.stream_cmd_src,
++ (unsigned int)dma_pos,
++ in_stat.list_state, in_stat.mode, in_stat.stream_cmd_src,
++ (unsigned int)in_dma_pos,
++ (unsigned int)&np->catch_tx_desc->descr,
++ (unsigned int)&np->active_tx_desc->descr,
++ np->txpackets,
++ netif_queue_stopped(dev),
++ REG_RD_INT(intr_vect, regi_irq, r_vect),
++ REG_RD_INT(dma, np->dma_out_inst, r_masked_intr),
++ REG_RD_INT(dma, np->dma_out_inst, rw_ack_intr),
++ REG_RD_INT(dma, np->dma_out_inst, r_intr),
++ REG_RD_INT(dma, np->dma_out_inst, rw_intr_mask),
++ REG_RD_INT(eth, np->eth_inst, r_stat));
++
++ printk("tx-descriptors:\n");
++ for (i = 0; i < NBR_TX_DESC; i++) {
++ printk("txdesc[%d]=0x%x\n", i, (unsigned int)
++ virt_to_phys(&np->dma_tx_descr_list[i].descr));
++ printk("txdesc[%d].skb=0x%x\n", i,
++ (unsigned int)np->dma_tx_descr_list[i].skb);
++ printk("txdesc[%d].buf=0x%x\n", i,
++ (unsigned int)np->dma_tx_descr_list[i].descr.buf);
++ printk("txdesc[%d].after=0x%x\n", i,
++ (unsigned int)np->dma_tx_descr_list[i].descr.after);
++ printk("txdesc[%d].intr=%x\n", i,
++ np->dma_tx_descr_list[i].descr.intr);
++ printk("txdesc[%d].eol=%x\n", i,
++ np->dma_tx_descr_list[i].descr.eol);
++ printk("txdesc[%d].out_eop=%x\n", i,
++ np->dma_tx_descr_list[i].descr.out_eop);
++ printk("txdesc[%d].wait=%x\n", i,
++ np->dma_tx_descr_list[i].descr.wait);
++ }
++}
++
++
++static int
++crisv32_init_module(void)
++{
++ return crisv32_ethernet_init();
++}
++
++module_init(crisv32_init_module);
+diff -urN linux-2.6.19.2.orig/drivers/net/cris/eth_v32.h linux-2.6.19.2.dev/drivers/net/cris/eth_v32.h
+--- linux-2.6.19.2.orig/drivers/net/cris/eth_v32.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/drivers/net/cris/eth_v32.h 2007-02-06 11:10:37.000000000 +0100
+@@ -0,0 +1,248 @@
++/*
++ * Definitions for ETRAX FS ethernet driver.
++ *
++ * Copyright (C) 2003, 2004, 2005 Axis Communications.
++ */
++
++#ifndef _ETRAX_ETHERNET_H_
++#define _ETRAX_ETHERNET_H_
++
++#include <asm/arch/hwregs/dma.h>
++
++
++#define MAX_MEDIA_DATA_SIZE 1522 /* Max packet size. */
++
++#define NBR_RX_DESC 64 /* Number of RX descriptors. */
++#define NBR_TX_DESC 16 /* Number of TX descriptors. */
++#ifdef CONFIG_CRIS_MACH_ARTPEC3
++#define NBR_INTMEM_RX_DESC 5 /* Number of RX descriptors in int. mem.
++ * when running in gigabit mode.
++ * Should be less then NBR_RX_DESC
++ */
++#define NBR_INTMEM_TX_BUF 4 /* Number of TX buffers in int. mem
++ * when running in gigabit mode.
++ * Should be less than NBR_TX_DESC
++ */
++#endif
++
++/* Large packets are sent directly to upper layers while small packets
++ * are copied (to reduce memory waste). The following constant
++ * decides the breakpoint.
++ */
++#define RX_COPYBREAK (256)
++
++#define ETHER_HEAD_LEN (14)
++
++/*
++** MDIO constants.
++*/
++#define MDIO_START 0x1
++#define MDIO_READ 0x2
++#define MDIO_WRITE 0x1
++#define MDIO_PREAMBLE 0xfffffffful
++
++/* Broadcom specific */
++#define MDIO_AUX_CTRL_STATUS_REG 0x18
++#define MDIO_BC_FULL_DUPLEX_IND 0x1
++#define MDIO_BC_SPEED 0x2
++
++/* TDK specific */
++#define MDIO_TDK_DIAGNOSTIC_REG 18
++#define MDIO_TDK_DIAGNOSTIC_RATE 0x400
++#define MDIO_TDK_DIAGNOSTIC_DPLX 0x800
++
++/*Intel LXT972A specific*/
++#define MDIO_INT_STATUS_REG_2 0x0011
++#define MDIO_INT_FULL_DUPLEX_IND ( 0x0001 << 9 )
++#define MDIO_INT_SPEED ( 0x0001 << 14 )
++
++/*National Semiconductor DP83865 specific*/
++#define MDIO_NAT_LINK_AN_REG 0x11
++#define MDIO_NAT_1000 (0x0001 << 4)
++#define MDIO_NAT_100 (0x0001 << 3)
++#define MDIO_NAT_FULL_DUPLEX_IND (0x0001 << 1)
++
++/* Network flash constants */
++#define NET_FLASH_TIME (HZ/50) /* 20 ms */
++#define NET_FLASH_PAUSE (HZ/100) /* 10 ms */
++#define NET_LINK_UP_CHECK_INTERVAL (2*HZ) /* 2 seconds. */
++#define NET_DUPLEX_CHECK_INTERVAL (2*HZ) /* 2 seconds. */
++
++/* Duplex settings. */
++enum duplex {
++ half,
++ full,
++ autoneg
++};
++
++/* Some transceivers requires special handling. */
++struct transceiver_ops {
++ unsigned int oui;
++ void (*check_speed) (struct net_device * dev);
++ void (*check_duplex) (struct net_device * dev);
++};
++
++typedef struct crisv32_eth_descr {
++ dma_descr_data descr __attribute__ ((__aligned__(32)));
++ struct sk_buff *skb;
++ unsigned char *linearized_packet;
++} crisv32_eth_descr;
++
++
++
++#ifdef CONFIG_CRIS_MACH_ARTPEC3
++struct tx_buffer_list {
++ struct tx_buffer_list *next;
++ unsigned char *buf;
++ char free;
++};
++#endif
++
++/* LED stuff */
++#define LED_GRP_0 0
++#define LED_GRP_1 1
++#define LED_GRP_NONE 2
++
++#define LED_ACTIVITY 0
++#define LED_NOACTIVITY 1
++#define LED_LINK 2
++#define LED_NOLINK 3
++
++struct crisv32_eth_leds {
++ unsigned int ledgrp;
++ int led_active;
++ unsigned long led_next_time;
++ struct timer_list clear_led_timer;
++ spinlock_t led_lock; /* Protect LED state */
++ int ifisup[2];
++};
++
++#define NET_LED_SET(x,y) \
++ do { \
++ if (x == 0) LED_NETWORK_GRP0_SET(y); \
++ if (x == 1) LED_NETWORK_GRP1_SET(y); \
++ } while (0)
++
++/* Information that need to be kept for each device. */
++struct crisv32_ethernet_local {
++ dma_descr_context ctxt_in __attribute__ ((__aligned__(32)));
++ dma_descr_context ctxt_out __attribute__ ((__aligned__(32)));
++
++ crisv32_eth_descr *active_rx_desc;
++ crisv32_eth_descr *prev_rx_desc;
++ crisv32_eth_descr *last_rx_desc;
++
++ crisv32_eth_descr *active_tx_desc;
++ crisv32_eth_descr *prev_tx_desc;
++ crisv32_eth_descr *catch_tx_desc;
++
++ crisv32_eth_descr dma_rx_descr_list[NBR_RX_DESC];
++ crisv32_eth_descr dma_tx_descr_list[NBR_TX_DESC];
++#ifdef CONFIG_CRIS_MACH_ARTPEC3
++ struct tx_buffer_list tx_intmem_buf_list[NBR_INTMEM_TX_BUF];
++ struct tx_buffer_list *intmem_tx_buf_active;
++ struct tx_buffer_list *intmem_tx_buf_catch;
++ char gigabit_mode;
++#endif
++ char new_rx_package;
++
++ /* DMA and ethernet registers for the device. */
++ int eth_inst;
++ int dma_in_inst;
++ int dma_out_inst;
++
++ /* Network speed indication. */
++ struct timer_list speed_timer;
++ int current_speed; /* Speed read from tranceiver */
++ int current_speed_selection; /* Speed selected by user */
++ int sender_started;
++ int txpackets;
++
++ struct crisv32_eth_leds *leds;
++
++ /* Duplex. */
++ struct timer_list duplex_timer;
++ int full_duplex;
++ enum duplex current_duplex;
++
++ struct net_device_stats stats;
++
++ /* Transciever address. */
++ unsigned int mdio_phy_addr;
++
++ struct transceiver_ops *transceiver;
++
++ /*
++ * TX control lock. This protects the transmit buffer ring state along
++ * with the "tx full" state of the driver. This means all netif_queue
++ * flow control actions are protected by this lock as well.
++ */
++ spinlock_t lock;
++ spinlock_t transceiver_lock; /* Protect transceiver state. */
++};
++
++/* Function prototypes. */
++static int crisv32_ethernet_init(void);
++static int crisv32_ethernet_device_init(struct net_device* dev);
++static int crisv32_eth_open(struct net_device *dev);
++static int crisv32_eth_close(struct net_device *dev);
++static int crisv32_eth_set_mac_address(struct net_device *dev, void *vpntr);
++static irqreturn_t crisv32rx_eth_interrupt(int irq, void *dev_id);
++static irqreturn_t crisv32tx_eth_interrupt(int irq, void *dev_id);
++static irqreturn_t crisv32nw_eth_interrupt(int irq, void *dev_id);
++static void crisv32_eth_receive_packet(struct net_device *dev);
++static int crisv32_eth_send_packet(struct sk_buff *skb, struct net_device *dev);
++static void crisv32_eth_hw_send_packet(unsigned char *buf, int length,
++ void *priv);
++static void crisv32_eth_tx_timeout(struct net_device *dev);
++static void crisv32_eth_set_multicast_list(struct net_device *dev);
++static int crisv32_eth_ioctl(struct net_device *dev, struct ifreq *ifr,
++ int cmd);
++static int crisv32_eth_set_config(struct net_device* dev, struct ifmap* map);
++#ifdef CONFIG_CRIS_MACH_ARTPEC3
++static void crisv32_eth_switch_intmem_usage(struct net_device *dev);
++#endif
++static void crisv32_eth_negotiate(struct net_device *dev);
++static void crisv32_eth_check_speed(unsigned long idev);
++static void crisv32_eth_set_speed(struct net_device *dev, unsigned long speed);
++static void crisv32_eth_check_duplex(unsigned long idev);
++static void crisv32_eth_set_duplex(struct net_device *dev, enum duplex);
++static int crisv32_eth_probe_transceiver(struct net_device *dev);
++
++static struct ethtool_ops crisv32_ethtool_ops;
++
++static void generic_check_speed(struct net_device *dev);
++static void generic_check_duplex(struct net_device *dev);
++static void broadcom_check_speed(struct net_device *dev);
++static void broadcom_check_duplex(struct net_device *dev);
++static void tdk_check_speed(struct net_device *dev);
++static void tdk_check_duplex(struct net_device *dev);
++static void intel_check_speed(struct net_device* dev);
++static void intel_check_duplex(struct net_device *dev);
++static void national_check_speed(struct net_device* dev);
++static void national_check_duplex(struct net_device *dev);
++
++#ifdef CONFIG_NET_POLL_CONTROLLER
++static void crisv32_netpoll(struct net_device* dev);
++#endif
++
++static void crisv32_clear_network_leds(unsigned long dummy);
++static void crisv32_set_network_leds(int active, struct net_device* dev);
++
++static void crisv32_eth_reset_tranceiver(struct net_device *dev);
++static unsigned short crisv32_eth_get_mdio_reg(struct net_device *dev,
++ unsigned char reg_num);
++static void crisv32_eth_set_mdio_reg(struct net_device *dev,
++ unsigned char reg_num,
++ int val);
++static void crisv32_eth_send_mdio_cmd(struct net_device *dev,
++ unsigned short cmd, int write_cmd);
++static void crisv32_eth_send_mdio_bit(struct net_device *dev,
++ unsigned char bit);
++static unsigned char crisv32_eth_receive_mdio_bit(struct net_device *dev);
++
++static struct net_device_stats *crisv32_get_stats(struct net_device *dev);
++static void crisv32_start_dma_out(struct crisv32_ethernet_local* np);
++
++
++#endif /* _ETRAX_ETHERNET_H_ */
--- /dev/null
+--- linux-2.6.19.2.old/kernel/Kconfig.sched 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2.dev/kernel/Kconfig.sched 2007-02-05 12:22:39.000000000 +0100
+@@ -0,0 +1,18 @@
++#
++# Scheduler tuning
++#
++
++config OVERRIDE_SCHED_STARVATION_LIMIT
++ bool "Override scheduler STARVATION_LIMIT"
++ help
++ This threshold sets the maximum time a task may wait in the
++ expired runqueue when deciding to re-insert interactive tasks
++ into the active runqueue. The time-limit is in ms but scales with
++ the number of running tasks in the system.
++
++config SCHED_STARVATION_LIMIT
++ int "Scheduler Starvation Limit"
++ depends on OVERRIDE_SCHED_STARVATION_LIMIT
++ default 10
++ help
++ Starvation limit in milliseconds per running task.
--- /dev/null
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/Makefile linux-2.6.19.2/arch/cris/arch-v10/boot/Makefile
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/Makefile 2007-05-19 14:31:06.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/Makefile 2007-05-19 14:32:24.000000000 +0200
+@@ -2,7 +2,7 @@
+ # arch/cris/arch-v10/boot/Makefile
+ #
+
+-OBJCOPY = objcopy-cris
++OBJCOPY = /usr/local/cris/objcopy-cris
+ OBJCOPYFLAGS = -O binary --remove-section=.bss
+
+ subdir- := compressed rescue
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/Makefile linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/Makefile
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/Makefile 2007-05-19 14:31:06.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/Makefile 2007-05-19 14:33:45.000000000 +0200
+@@ -4,10 +4,10 @@
+
+ CC = gcc-cris -melf $(LINUXINCLUDE)
+ CFLAGS = -O2
+-LD = ld-cris
++LD = /usr/local/cris/ld-cris
+ LDFLAGS = -T $(obj)/decompress.ld
+ OBJECTS = $(obj)/head.o $(obj)/misc.o
+-OBJCOPY = objcopy-cris
++OBJCOPY = /usr/local/cris/objcopy-cris
+ OBJCOPYFLAGS = -O binary --remove-section=.bss
+
+ quiet_cmd_image = BUILD $@
+@@ -22,10 +22,10 @@
+ $(call if_changed,objcopy)
+
+ $(obj)/head.o: $(obj)/head.S .config
+- @$(CC) -D__ASSEMBLY__ -traditional -c $< -o $@
++ /usr/local/cris/gcc-cris -melf $(LINUXINCLUDE) -D__ASSEMBLY__ -traditional -c $< -o $@
+
+ $(obj)/misc.o: $(obj)/misc.c .config
+- @$(CC) -D__KERNEL__ -c $< -o $@
++ /usr/local/cris/gcc-cris -melf $(LINUXINCLUDE) -D__KERNEL__ -c $< -o $@
+
+ $(obj)/vmlinux: $(obj)/piggy.gz $(obj)/decompress.bin FORCE
+ $(call if_changed,image)
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/rescue/Makefile linux-2.6.19.2/arch/cris/arch-v10/boot/rescue/Makefile
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/rescue/Makefile 2007-05-19 14:31:06.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/rescue/Makefile 2007-05-19 14:34:25.000000000 +0200
+@@ -2,12 +2,12 @@
+ # Makefile for rescue (bootstrap) code
+ #
+
+-CC = gcc-cris -mlinux $(LINUXINCLUDE)
++CC = /usr/local/cris/gcc-cris -mlinux $(LINUXINCLUDE)
+ CFLAGS = -O2
+ AFLAGS = -traditional
+-LD = gcc-cris -mlinux -nostdlib
++LD = /usr/local/cris/gcc-cris -mlinux -nostdlib
+ LDFLAGS = -T $(obj)/rescue.ld
+-OBJCOPY = objcopy-cris
++OBJCOPY = /usr/local/cris/objcopy-cris
+ OBJCOPYFLAGS = -O binary --remove-section=.bss
+ obj-y = head.o
+ OBJECT = $(obj)/$(obj-y)
--- /dev/null
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/lib/memset.c linux-2.6.19.2/arch/cris/arch-v10/lib/memset.c
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/lib/memset.c 2007-05-20 01:46:35.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/lib/memset.c 2007-05-20 01:51:47.000000000 +0200
+@@ -29,224 +29,21 @@
+
+ #include <linux/types.h>
+
+-/* No, there's no macro saying 12*4, since it is "hard" to get it into
+- the asm in a good way. Thus better to expose the problem everywhere.
+- */
+
+-/* Assuming 1 cycle per dword written or read (ok, not really true), and
+- one per instruction, then 43+3*(n/48-1) <= 24+24*(n/48-1)
+- so n >= 45.7; n >= 0.9; we win on the first full 48-byte block to set. */
+-
+-#define ZERO_BLOCK_SIZE (1*12*4)
+-
+-void *memset(void *pdst,
+- int c,
+- size_t plen)
++/**
++ * memset - Fill a region of memory with the given value
++ * @s: Pointer to the start of the area.
++ * @c: The byte to fill the area with
++ * @count: The size of the area.
++ *
++ * Do not use memset() to access IO space, use memset_io() instead.
++ */
++void *memset(void *s, int c, size_t count)
+ {
+- /* Ok. Now we want the parameters put in special registers.
+- Make sure the compiler is able to make something useful of this. */
+-
+- register char *return_dst __asm__ ("r10") = pdst;
+- register int n __asm__ ("r12") = plen;
+- register int lc __asm__ ("r11") = c;
+-
+- /* Most apps use memset sanely. Only those memsetting about 3..4
+- bytes or less get penalized compared to the generic implementation
+- - and that's not really sane use. */
+-
+- /* Ugh. This is fragile at best. Check with newer GCC releases, if
+- they compile cascaded "x |= x << 8" sanely! */
+- __asm__("movu.b %0,$r13\n\t"
+- "lslq 8,$r13\n\t"
+- "move.b %0,$r13\n\t"
+- "move.d $r13,%0\n\t"
+- "lslq 16,$r13\n\t"
+- "or.d $r13,%0"
+- : "=r" (lc) : "0" (lc) : "r13");
+-
+- {
+- register char *dst __asm__ ("r13") = pdst;
+-
+- /* This is NONPORTABLE, but since this whole routine is */
+- /* grossly nonportable that doesn't matter. */
+-
+- if (((unsigned long) pdst & 3) != 0
+- /* Oops! n=0 must be a legal call, regardless of alignment. */
+- && n >= 3)
+- {
+- if ((unsigned long)dst & 1)
+- {
+- *dst = (char) lc;
+- n--;
+- dst++;
+- }
+-
+- if ((unsigned long)dst & 2)
+- {
+- *(short *)dst = lc;
+- n -= 2;
+- dst += 2;
+- }
+- }
+-
+- /* Now the fun part. For the threshold value of this, check the equation
+- above. */
+- /* Decide which copying method to use. */
+- if (n >= ZERO_BLOCK_SIZE)
+- {
+- /* For large copies we use 'movem' */
+-
+- /* It is not optimal to tell the compiler about clobbering any
+- registers; that will move the saving/restoring of those registers
+- to the function prologue/epilogue, and make non-movem sizes
+- suboptimal.
+-
+- This method is not foolproof; it assumes that the "asm reg"
+- declarations at the beginning of the function really are used
+- here (beware: they may be moved to temporary registers).
+- This way, we do not have to save/move the registers around into
+- temporaries; we can safely use them straight away.
+-
+- If you want to check that the allocation was right; then
+- check the equalities in the first comment. It should say
+- "r13=r13, r12=r12, r11=r11" */
+- __asm__ volatile ("
+- ;; Check that the following is true (same register names on
+- ;; both sides of equal sign, as in r8=r8):
+- ;; %0=r13, %1=r12, %4=r11
+- ;;
+- ;; Save the registers we'll clobber in the movem process
+- ;; on the stack. Don't mention them to gcc, it will only be
+- ;; upset.
+- subq 11*4,$sp
+- movem $r10,[$sp]
+-
+- move.d $r11,$r0
+- move.d $r11,$r1
+- move.d $r11,$r2
+- move.d $r11,$r3
+- move.d $r11,$r4
+- move.d $r11,$r5
+- move.d $r11,$r6
+- move.d $r11,$r7
+- move.d $r11,$r8
+- move.d $r11,$r9
+- move.d $r11,$r10
+-
+- ;; Now we've got this:
+- ;; r13 - dst
+- ;; r12 - n
+-
+- ;; Update n for the first loop
+- subq 12*4,$r12
+-0:
+- subq 12*4,$r12
+- bge 0b
+- movem $r11,[$r13+]
+-
+- addq 12*4,$r12 ;; compensate for last loop underflowing n
+-
+- ;; Restore registers from stack
+- movem [$sp+],$r10"
+-
+- /* Outputs */ : "=r" (dst), "=r" (n)
+- /* Inputs */ : "0" (dst), "1" (n), "r" (lc));
+-
+- }
+-
+- /* Either we directly starts copying, using dword copying
+- in a loop, or we copy as much as possible with 'movem'
+- and then the last block (<44 bytes) is copied here.
+- This will work since 'movem' will have updated src,dst,n. */
+-
+- while ( n >= 16 )
+- {
+- *((long*)dst)++ = lc;
+- *((long*)dst)++ = lc;
+- *((long*)dst)++ = lc;
+- *((long*)dst)++ = lc;
+- n -= 16;
+- }
++ char *xs = s;
+
+- /* A switch() is definitely the fastest although it takes a LOT of code.
+- * Particularly if you inline code this.
+- */
+- switch (n)
+- {
+- case 0:
+- break;
+- case 1:
+- *(char*)dst = (char) lc;
+- break;
+- case 2:
+- *(short*)dst = (short) lc;
+- break;
+- case 3:
+- *((short*)dst)++ = (short) lc;
+- *(char*)dst = (char) lc;
+- break;
+- case 4:
+- *((long*)dst)++ = lc;
+- break;
+- case 5:
+- *((long*)dst)++ = lc;
+- *(char*)dst = (char) lc;
+- break;
+- case 6:
+- *((long*)dst)++ = lc;
+- *(short*)dst = (short) lc;
+- break;
+- case 7:
+- *((long*)dst)++ = lc;
+- *((short*)dst)++ = (short) lc;
+- *(char*)dst = (char) lc;
+- break;
+- case 8:
+- *((long*)dst)++ = lc;
+- *((long*)dst)++ = lc;
+- break;
+- case 9:
+- *((long*)dst)++ = lc;
+- *((long*)dst)++ = lc;
+- *(char*)dst = (char) lc;
+- break;
+- case 10:
+- *((long*)dst)++ = lc;
+- *((long*)dst)++ = lc;
+- *(short*)dst = (short) lc;
+- break;
+- case 11:
+- *((long*)dst)++ = lc;
+- *((long*)dst)++ = lc;
+- *((short*)dst)++ = (short) lc;
+- *(char*)dst = (char) lc;
+- break;
+- case 12:
+- *((long*)dst)++ = lc;
+- *((long*)dst)++ = lc;
+- *((long*)dst)++ = lc;
+- break;
+- case 13:
+- *((long*)dst)++ = lc;
+- *((long*)dst)++ = lc;
+- *((long*)dst)++ = lc;
+- *(char*)dst = (char) lc;
+- break;
+- case 14:
+- *((long*)dst)++ = lc;
+- *((long*)dst)++ = lc;
+- *((long*)dst)++ = lc;
+- *(short*)dst = (short) lc;
+- break;
+- case 15:
+- *((long*)dst)++ = lc;
+- *((long*)dst)++ = lc;
+- *((long*)dst)++ = lc;
+- *((short*)dst)++ = (short) lc;
+- *(char*)dst = (char) lc;
+- break;
+- }
+- }
++ while (count--)
++ *xs++ = c;
++ return s;
++}
+
+- return return_dst; /* destination pointer. */
+-} /* memset() */
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/lib/string.c linux-2.6.19.2/arch/cris/arch-v10/lib/string.c
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/lib/string.c 2007-05-20 01:46:35.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/lib/string.c 2007-05-20 01:51:19.000000000 +0200
+@@ -33,193 +33,21 @@
+
+ #include <linux/types.h>
+
+-void *memcpy(void *pdst,
+- const void *psrc,
+- size_t pn)
++ /**
++ * memcpy - Copy one area of memory to another
++ * @dest: Where to copy to
++ * @src: Where to copy from
++ * @count: The size of the area.
++ *
++ * You should not use this function to access IO space, use memcpy_toio()
++ * or memcpy_fromio() instead.
++ */
++void *memcpy(void *dest, const void *src, size_t count)
+ {
+- /* Ok. Now we want the parameters put in special registers.
+- Make sure the compiler is able to make something useful of this.
+- As it is now: r10 -> r13; r11 -> r11 (nop); r12 -> r12 (nop).
++ char *tmp = dest;
++ const char *s = src;
+
+- If gcc was allright, it really would need no temporaries, and no
+- stack space to save stuff on. */
+-
+- register void *return_dst __asm__ ("r10") = pdst;
+- register char *dst __asm__ ("r13") = pdst;
+- register const char *src __asm__ ("r11") = psrc;
+- register int n __asm__ ("r12") = pn;
+-
+-
+- /* When src is aligned but not dst, this makes a few extra needless
+- cycles. I believe it would take as many to check that the
+- re-alignment was unnecessary. */
+- if (((unsigned long) dst & 3) != 0
+- /* Don't align if we wouldn't copy more than a few bytes; so we
+- don't have to check further for overflows. */
+- && n >= 3)
+- {
+- if ((unsigned long) dst & 1)
+- {
+- n--;
+- *(char*)dst = *(char*)src;
+- src++;
+- dst++;
+- }
+-
+- if ((unsigned long) dst & 2)
+- {
+- n -= 2;
+- *(short*)dst = *(short*)src;
+- src += 2;
+- dst += 2;
+- }
+- }
+-
+- /* Decide which copying method to use. */
+- if (n >= 44*2) /* Break even between movem and
+- move16 is at 38.7*2, but modulo 44. */
+- {
+- /* For large copies we use 'movem' */
+-
+- /* It is not optimal to tell the compiler about clobbering any
+- registers; that will move the saving/restoring of those registers
+- to the function prologue/epilogue, and make non-movem sizes
+- suboptimal.
+-
+- This method is not foolproof; it assumes that the "asm reg"
+- declarations at the beginning of the function really are used
+- here (beware: they may be moved to temporary registers).
+- This way, we do not have to save/move the registers around into
+- temporaries; we can safely use them straight away.
+-
+- If you want to check that the allocation was right; then
+- check the equalities in the first comment. It should say
+- "r13=r13, r11=r11, r12=r12" */
+- __asm__ volatile ("
+- ;; Check that the following is true (same register names on
+- ;; both sides of equal sign, as in r8=r8):
+- ;; %0=r13, %1=r11, %2=r12
+- ;;
+- ;; Save the registers we'll use in the movem process
+- ;; on the stack.
+- subq 11*4,$sp
+- movem $r10,[$sp]
+-
+- ;; Now we've got this:
+- ;; r11 - src
+- ;; r13 - dst
+- ;; r12 - n
+-
+- ;; Update n for the first loop
+- subq 44,$r12
+-0:
+- movem [$r11+],$r10
+- subq 44,$r12
+- bge 0b
+- movem $r10,[$r13+]
+-
+- addq 44,$r12 ;; compensate for last loop underflowing n
+-
+- ;; Restore registers from stack
+- movem [$sp+],$r10"
+-
+- /* Outputs */ : "=r" (dst), "=r" (src), "=r" (n)
+- /* Inputs */ : "0" (dst), "1" (src), "2" (n));
+-
+- }
+-
+- /* Either we directly starts copying, using dword copying
+- in a loop, or we copy as much as possible with 'movem'
+- and then the last block (<44 bytes) is copied here.
+- This will work since 'movem' will have updated src,dst,n. */
+-
+- while ( n >= 16 )
+- {
+- *((long*)dst)++ = *((long*)src)++;
+- *((long*)dst)++ = *((long*)src)++;
+- *((long*)dst)++ = *((long*)src)++;
+- *((long*)dst)++ = *((long*)src)++;
+- n -= 16;
+- }
+-
+- /* A switch() is definitely the fastest although it takes a LOT of code.
+- * Particularly if you inline code this.
+- */
+- switch (n)
+- {
+- case 0:
+- break;
+- case 1:
+- *(char*)dst = *(char*)src;
+- break;
+- case 2:
+- *(short*)dst = *(short*)src;
+- break;
+- case 3:
+- *((short*)dst)++ = *((short*)src)++;
+- *(char*)dst = *(char*)src;
+- break;
+- case 4:
+- *((long*)dst)++ = *((long*)src)++;
+- break;
+- case 5:
+- *((long*)dst)++ = *((long*)src)++;
+- *(char*)dst = *(char*)src;
+- break;
+- case 6:
+- *((long*)dst)++ = *((long*)src)++;
+- *(short*)dst = *(short*)src;
+- break;
+- case 7:
+- *((long*)dst)++ = *((long*)src)++;
+- *((short*)dst)++ = *((short*)src)++;
+- *(char*)dst = *(char*)src;
+- break;
+- case 8:
+- *((long*)dst)++ = *((long*)src)++;
+- *((long*)dst)++ = *((long*)src)++;
+- break;
+- case 9:
+- *((long*)dst)++ = *((long*)src)++;
+- *((long*)dst)++ = *((long*)src)++;
+- *(char*)dst = *(char*)src;
+- break;
+- case 10:
+- *((long*)dst)++ = *((long*)src)++;
+- *((long*)dst)++ = *((long*)src)++;
+- *(short*)dst = *(short*)src;
+- break;
+- case 11:
+- *((long*)dst)++ = *((long*)src)++;
+- *((long*)dst)++ = *((long*)src)++;
+- *((short*)dst)++ = *((short*)src)++;
+- *(char*)dst = *(char*)src;
+- break;
+- case 12:
+- *((long*)dst)++ = *((long*)src)++;
+- *((long*)dst)++ = *((long*)src)++;
+- *((long*)dst)++ = *((long*)src)++;
+- break;
+- case 13:
+- *((long*)dst)++ = *((long*)src)++;
+- *((long*)dst)++ = *((long*)src)++;
+- *((long*)dst)++ = *((long*)src)++;
+- *(char*)dst = *(char*)src;
+- break;
+- case 14:
+- *((long*)dst)++ = *((long*)src)++;
+- *((long*)dst)++ = *((long*)src)++;
+- *((long*)dst)++ = *((long*)src)++;
+- *(short*)dst = *(short*)src;
+- break;
+- case 15:
+- *((long*)dst)++ = *((long*)src)++;
+- *((long*)dst)++ = *((long*)src)++;
+- *((long*)dst)++ = *((long*)src)++;
+- *((short*)dst)++ = *((short*)src)++;
+- *(char*)dst = *(char*)src;
+- break;
+- }
+-
+- return return_dst; /* destination pointer. */
+-} /* memcpy() */
++ while (count--)
++ *tmp++ = *s++;
++ return dest;
++}
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/lib/usercopy.c linux-2.6.19.2/arch/cris/arch-v10/lib/usercopy.c
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/lib/usercopy.c 2007-05-16 22:11:26.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/lib/usercopy.c 2007-05-16 23:17:41.000000000 +0200
+@@ -88,63 +88,38 @@
+ If you want to check that the allocation was right; then
+ check the equalities in the first comment. It should say
+ "r13=r13, r11=r11, r12=r12". */
+- __asm__ volatile ("\
+- .ifnc %0%1%2%3,$r13$r11$r12$r10 \n\
+- .err \n\
+- .endif \n\
+-
+- ;; Save the registers we'll use in the movem process
+- ;; on the stack.
+- subq 11*4,$sp
+- movem $r10,[$sp]
+-
+- ;; Now we've got this:
+- ;; r11 - src
+- ;; r13 - dst
+- ;; r12 - n
+-
+- ;; Update n for the first loop
+- subq 44,$r12
+-
+-; Since the noted PC of a faulting instruction in a delay-slot of a taken
+-; branch, is that of the branch target, we actually point at the from-movem
+-; for this case. There is no ambiguity here; if there was a fault in that
+-; instruction (meaning a kernel oops), the faulted PC would be the address
+-; after *that* movem.
+-
+-0:
+- movem [$r11+],$r10
+- subq 44,$r12
+- bge 0b
+- movem $r10,[$r13+]
+-1:
+- addq 44,$r12 ;; compensate for last loop underflowing n
+-
+- ;; Restore registers from stack
+- movem [$sp+],$r10
+-2:
+- .section .fixup,\"ax\"
+-
+-; To provide a correct count in r10 of bytes that failed to be copied,
+-; we jump back into the loop if the loop-branch was taken. There is no
+-; performance penalty for sany use; the program will segfault soon enough.
+-
+-3:
+- move.d [$sp],$r10
+- addq 44,$r10
+- move.d $r10,[$sp]
+- jump 0b
+-4:
+- movem [$sp+],$r10
+- addq 44,$r10
+- addq 44,$r12
+- jump 2b
+-
+- .previous
+- .section __ex_table,\"a\"
+- .dword 0b,3b
+- .dword 1b,4b
+- .previous"
++ __asm__ volatile (
++ ".ifnc %0%1%2%3,$r13$r11$r12$r10 \n\t"
++ ".err \n\t"
++ ".endif \n\t"
++ "subq 11*4,$sp\n\t"
++ "movem $r10,[$sp]\n\t"
++ "subq 44,$r12\n\t"
++ "0:\n\t"
++ "movem [$r11+],$r10\n\t"
++ "subq 44,$r12\n\t"
++ "bge 0b\n\t"
++ "movem $r10,[$r13+]\n\t"
++ "1:\n\t"
++ "addq 44,$r12 \n\t"
++ "movem [$sp+],$r10\n\t"
++ "2:\n\t"
++ ".section .fixup,\"ax\"\n\t"
++ "3:\n\t"
++ "move.d [$sp],$r10\n\t"
++ "addq 44,$r10\n\t"
++ "move.d $r10,[$sp]\n\t"
++ "jump 0b\n\t"
++ "4:\n\t"
++ "movem [$sp+],$r10\n\t"
++ "addq 44,$r10\n\t"
++ "addq 44,$r12\n\t"
++ "jump 2b\n\t"
++ ".previous\n\t"
++ ".section __ex_table,\"a\"\n\t"
++ ".dword 0b,3b\n\t"
++ ".dword 1b,4b\n\t"
++ ".previous\n\t"
+
+ /* Outputs */ : "=r" (dst), "=r" (src), "=r" (n), "=r" (retn)
+ /* Inputs */ : "0" (dst), "1" (src), "2" (n), "3" (retn));
+@@ -253,60 +228,32 @@
+ If you want to check that the allocation was right; then
+ check the equalities in the first comment. It should say
+ "r13=r13, r11=r11, r12=r12" */
+- __asm__ volatile ("
+- .ifnc %0%1%2%3,$r13$r11$r12$r10 \n\
+- .err \n\
+- .endif \n\
+-
+- ;; Save the registers we'll use in the movem process
+- ;; on the stack.
+- subq 11*4,$sp
+- movem $r10,[$sp]
+-
+- ;; Now we've got this:
+- ;; r11 - src
+- ;; r13 - dst
+- ;; r12 - n
+-
+- ;; Update n for the first loop
+- subq 44,$r12
+-0:
+- movem [$r11+],$r10
+-1:
+- subq 44,$r12
+- bge 0b
+- movem $r10,[$r13+]
+-
+- addq 44,$r12 ;; compensate for last loop underflowing n
+-
+- ;; Restore registers from stack
+- movem [$sp+],$r10
+-4:
+- .section .fixup,\"ax\"
+-
+-;; Do not jump back into the loop if we fail. For some uses, we get a
+-;; page fault somewhere on the line. Without checking for page limits,
+-;; we don't know where, but we need to copy accurately and keep an
+-;; accurate count; not just clear the whole line. To do that, we fall
+-;; down in the code below, proceeding with smaller amounts. It should
+-;; be kept in mind that we have to cater to code like what at one time
+-;; was in fs/super.c:
+-;; i = size - copy_from_user((void *)page, data, size);
+-;; which would cause repeated faults while clearing the remainder of
+-;; the SIZE bytes at PAGE after the first fault.
+-;; A caveat here is that we must not fall through from a failing page
+-;; to a valid page.
+-
+-3:
+- movem [$sp+],$r10
+- addq 44,$r12 ;; Get back count before faulting point.
+- subq 44,$r11 ;; Get back pointer to faulting movem-line.
+- jump 4b ;; Fall through, pretending the fault didn't happen.
+-
+- .previous
+- .section __ex_table,\"a\"
+- .dword 1b,3b
+- .previous"
++ __asm__ volatile (
++ ".ifnc %0%1%2%3,$r13$r11$r12$r10 \n\t"
++ ".err \n\t"
++ ".endif \n\t"
++ "subq 11*4,$sp\n\t"
++ "movem $r10,[$sp]\n\t"
++ "subq 44,$r12\n\t"
++ "0:\n\t"
++ "movem [$r11+],$r10\n\t"
++ "1:\n\t"
++ "subq 44,$r12\n\t"
++ "bge 0b\n\t"
++ "movem $r10,[$r13+]\n\t"
++ "addq 44,$r12 \n\t"
++ "movem [$sp+],$r10\n\t"
++ "4:\n\t"
++ ".section .fixup,\"ax\"\n\t"
++ "3:\n\t"
++ "movem [$sp+],$r10\n\t"
++ "addq 44,$r12\n\t"
++ "subq 44,$r11\n\t"
++ "jump 4b \n\t"
++ ".previous\n\t"
++ ".section __ex_table,\"a\"\n\t"
++ ".dword 1b,3b\n\t"
++ ".previous\n\t"
+
+ /* Outputs */ : "=r" (dst), "=r" (src), "=r" (n), "=r" (retn)
+ /* Inputs */ : "0" (dst), "1" (src), "2" (n), "3" (retn));
+@@ -425,66 +372,50 @@
+ If you want to check that the allocation was right; then
+ check the equalities in the first comment. It should say
+ something like "r13=r13, r11=r11, r12=r12". */
+- __asm__ volatile ("
+- .ifnc %0%1%2,$r13$r12$r10 \n\
+- .err \n\
+- .endif \n\
+-
+- ;; Save the registers we'll clobber in the movem process
+- ;; on the stack. Don't mention them to gcc, it will only be
+- ;; upset.
+- subq 11*4,$sp
+- movem $r10,[$sp]
+-
+- clear.d $r0
+- clear.d $r1
+- clear.d $r2
+- clear.d $r3
+- clear.d $r4
+- clear.d $r5
+- clear.d $r6
+- clear.d $r7
+- clear.d $r8
+- clear.d $r9
+- clear.d $r10
+- clear.d $r11
+-
+- ;; Now we've got this:
+- ;; r13 - dst
+- ;; r12 - n
+-
+- ;; Update n for the first loop
+- subq 12*4,$r12
+-0:
+- subq 12*4,$r12
+- bge 0b
+- movem $r11,[$r13+]
+-1:
+- addq 12*4,$r12 ;; compensate for last loop underflowing n
+-
+- ;; Restore registers from stack
+- movem [$sp+],$r10
+-2:
+- .section .fixup,\"ax\"
+-3:
+- move.d [$sp],$r10
+- addq 12*4,$r10
+- move.d $r10,[$sp]
+- clear.d $r10
+- jump 0b
+-
+-4:
+- movem [$sp+],$r10
+- addq 12*4,$r10
+- addq 12*4,$r12
+- jump 2b
+-
+- .previous
+- .section __ex_table,\"a\"
+- .dword 0b,3b
+- .dword 1b,4b
+- .previous"
+-
++ __asm__ volatile (
++ ".ifnc %0%1%2,$r13$r12$r10\n\t"
++ ".err \n\t"
++ ".endif\n\t"
++ "subq 11*4,$sp\n\t"
++ "movem $r10,[$sp]\n\t"
++ "clear.d $r0\n\t"
++ "clear.d $r1\n\t"
++ "clear.d $r2\n\t"
++ "clear.d $r3\n\t"
++ "clear.d $r4\n\t"
++ "clear.d $r5\n\t"
++ "clear.d $r6\n\t"
++ "clear.d $r7\n\t"
++ "clear.d $r8\n\t"
++ "clear.d $r9\n\t"
++ "clear.d $r10\n\t"
++ "clear.d $r11\n\t"
++ "subq 12*4,$r12\n\t"
++ "0:\n\t"
++ "subq 12*4,$r12\n\t"
++ "bge 0b\n\t"
++ "movem $r11,[$r13+]\n\t"
++ "1: \n\t"
++ "addq 12*4,$r12 \n\t"
++ "movem [$sp+],$r10\n\t"
++ "2:\n\t"
++ ".section .fixup,\"ax\"\n\t"
++ "3:\n\t"
++ "move.d [$sp],$r10\n\t"
++ "addq 12*4,$r10\n\t"
++ "move.d $r10,[$sp]\n\t"
++ "clear.d $r10\n\t"
++ "jump 0b\n\t"
++ "4:\n\t"
++ "movem [$sp+],$r10\n\t"
++ "addq 12*4,$r10\n\t"
++ "addq 12*4,$r12\n\t"
++ "jump 2b\n\t"
++ ".previous\n\t"
++ ".section __ex_table,\"a\"\n\t"
++ ".dword 0b,3b\n\t"
++ ".dword 1b,4b\n\t"
++ ".previous\n\t"
+ /* Outputs */ : "=r" (dst), "=r" (n), "=r" (retn)
+ /* Inputs */ : "0" (dst), "1" (n), "2" (retn)
+ /* Clobber */ : "r11");
--- /dev/null
+diff -urN linux-2.6.19.2.orig/mm/page_alloc.c linux-2.6.19.2/mm/page_alloc.c
+--- linux-2.6.19.2.orig/mm/page_alloc.c 2007-05-20 03:26:41.000000000 +0200
++++ linux-2.6.19.2/mm/page_alloc.c 2007-05-20 03:28:22.000000000 +0200
+@@ -1200,7 +1200,7 @@
+ unsigned int nr_free_pages(void)
+ {
+ unsigned int sum = 0;
+- struct zone *zone;
++ volatile struct zone *zone;
+
+ for_each_zone(zone)
+ sum += zone->free_pages;
--- /dev/null
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/axisflashmap.c linux-2.6.19.2/arch/cris/arch-v10/drivers/axisflashmap.c
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/axisflashmap.c 2007-05-21 23:12:27.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/drivers/axisflashmap.c 2007-05-21 23:13:09.000000000 +0200
+@@ -256,7 +256,7 @@
+
+ /* If no partition-table was found, we use this default-set. */
+ #define MAX_PARTITIONS 7
+-#define NUM_DEFAULT_PARTITIONS 3
++#define NUM_DEFAULT_PARTITIONS 3
+
+ /*
+ * Default flash size is 2MB. CONFIG_ETRAX_PTABLE_SECTOR is most likely the
+@@ -265,19 +265,19 @@
+ */
+ static struct mtd_partition axis_default_partitions[NUM_DEFAULT_PARTITIONS] = {
+ {
+- .name = "boot firmware",
+- .size = CONFIG_ETRAX_PTABLE_SECTOR,
++ .name = "kernel",
++ .size = 0x200000,
+ .offset = 0
+ },
+ {
+- .name = "kernel",
+- .size = 0x200000 - (6 * CONFIG_ETRAX_PTABLE_SECTOR),
+- .offset = CONFIG_ETRAX_PTABLE_SECTOR
++ .name = "filesystem",
++ .size = 0x200000,
++ .offset = 0x200000
+ },
+ {
+- .name = "filesystem",
+- .size = 5 * CONFIG_ETRAX_PTABLE_SECTOR,
+- .offset = 0x200000 - (5 * CONFIG_ETRAX_PTABLE_SECTOR)
++ .name = "filesystem2",
++ .size = 0x400000,
++ .offset = 0x400000
+ }
+ };
+
+009-flashmap.patch
--- /dev/null
+Binary files linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/.axisflashmap.c.swp and linux-2.6.19.2/arch/cris/arch-v10/drivers/.axisflashmap.c.swp differ
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/axisflashmap.c linux-2.6.19.2/arch/cris/arch-v10/drivers/axisflashmap.c
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/axisflashmap.c 2007-05-28 01:40:09.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/drivers/axisflashmap.c 2007-05-28 01:41:29.000000000 +0200
+@@ -256,7 +256,7 @@
+
+ /* If no partition-table was found, we use this default-set. */
+ #define MAX_PARTITIONS 7
+-#define NUM_DEFAULT_PARTITIONS 3
++#define NUM_DEFAULT_PARTITIONS 2
+
+ /*
+ * Default flash size is 2MB. CONFIG_ETRAX_PTABLE_SECTOR is most likely the
+@@ -270,15 +270,10 @@
+ .offset = 0
+ },
+ {
+- .name = "filesystem",
+- .size = 0x200000,
++ .name = "rootfs",
++ .size = 0x600000,
+ .offset = 0x200000
+ },
+- {
+- .name = "filesystem2",
+- .size = 0x400000,
+- .offset = 0x400000
+- }
+ };
+
+ /* Initialize the ones normally used. */
+Binary files linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/axisflashmap.o and linux-2.6.19.2/arch/cris/arch-v10/drivers/axisflashmap.o differ
+Binary files linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/built-in.o and linux-2.6.19.2/arch/cris/arch-v10/drivers/built-in.o differ
--- /dev/null
+--- linux-2.6.19.2.orig/drivers/serial/crisv10.c 2007-05-26 18:12:33.000000000 +0200
++++ linux-2.6.19.2/drivers/serial/crisv10.c 2007-05-26 19:24:56.000000000 +0200
+@@ -442,6 +442,7 @@
+ #include <asm/uaccess.h>
+ #include <linux/kernel.h>
+ #include <linux/mutex.h>
++#include <linux/miscdevice.h>
+
+ #include <asm/io.h>
+ #include <asm/irq.h>
+@@ -4822,6 +4823,12 @@
+ .tiocmset = rs_tiocmset
+ };
+
++#define CONFIG_ETRAX_SYSFS_NODES
++#ifdef CONFIG_ETRAX_SYSFS_NODES
++static struct class *mem_class;
++#endif
++
++static struct class *rs_class;
+ static int __init
+ rs_init(void)
+ {
+@@ -4948,6 +4955,30 @@
+ #endif
+ #endif /* CONFIG_SVINTO_SIM */
+
++#ifdef CONFIG_ETRAX_SYSFS_NODES
++
++ rs_class = class_create(THIS_MODULE, "rs_tty");
++#ifdef CONFIG_ETRAX_SERIAL_PORT0
++ class_device_create(rs_class, NULL,
++ MKDEV(TTY_MAJOR, 64),
++ NULL, "ttyS0");
++#endif
++#ifdef CONFIG_ETRAX_SERIAL_PORT1
++ class_device_create(rs_class, NULL,
++ MKDEV(TTY_MAJOR, 65),
++ NULL, "ttyS1");
++#endif
++#ifdef CONFIG_ETRAX_SERIAL_PORT2
++ class_device_create(rs_class, NULL,
++ MKDEV(TTY_MAJOR, 66),
++ NULL, "ttyS2");
++#endif
++#ifdef CONFIG_ETRAX_SERIAL_PORT3
++ class_device_create(rs_class, NULL,
++ MKDEV(TTY_MAJOR, 67),
++ NULL, "ttyS3");
++#endif
++#endif
+ return 0;
+ }
+
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/Kconfig 2007-05-26 18:12:22.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/drivers/Kconfig 2007-05-26 19:26:06.000000000 +0200
+@@ -900,3 +900,9 @@
+ 1 = 2kohm, 2 = 4kohm, 3 = 4kohm
+ 4 = 1 diode, 8 = 2 diodes
+ Allowed values are (increasing current): 0, 11, 10, 9, 7, 6, 5
++
++config ETRAX_SYSFS_NODES
++ bool "Create device nodes using sysfs for builtin devices"
++ default n
++ help
++ Creates device nodes inside the rootfs dynamically for all the builtin devices
+--- linux-2.6.19.2.orig/drivers/serial/crisv10.c 2007-05-28 20:37:56.000000000 +0200
++++ linux-2.6.19.2/drivers/serial/crisv10.c 2007-05-28 20:39:07.000000000 +0200
+@@ -4823,12 +4823,11 @@
+ .tiocmset = rs_tiocmset
+ };
+
+-#define CONFIG_ETRAX_SYSFS_NODES
+ #ifdef CONFIG_ETRAX_SYSFS_NODES
+-static struct class *mem_class;
++static struct class *rs_class;
+ #endif
+
+-static struct class *rs_class;
++
+ static int __init
+ rs_init(void)
+ {
--- /dev/null
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/Makefile linux-2.6.19.2/arch/cris/arch-v10/boot/Makefile
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/Makefile 2007-05-28 16:28:34.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/Makefile 2007-05-28 17:24:26.000000000 +0200
+@@ -5,7 +5,7 @@
+ OBJCOPY = /usr/local/cris/objcopy-cris
+ OBJCOPYFLAGS = -O binary --remove-section=.bss
+
+-subdir- := compressed rescue
++subdir- := compressed
+ targets := Image
+
+ $(obj)/Image: vmlinux FORCE
+@@ -14,8 +14,12 @@
+
+ $(obj)/compressed/vmlinux: $(obj)/Image FORCE
+ $(Q)$(MAKE) $(build)=$(obj)/compressed $@
+- $(Q)$(MAKE) $(build)=$(obj)/rescue $(obj)/rescue/rescue.bin
+
+ $(obj)/zImage: $(obj)/compressed/vmlinux
+ @cp $< $@
++ @cp $(obj)/compressed/vmlinux $(obj)/zImage_custom
++ @cp $(obj)/compressed/vmlinux_MCM $(obj)/zImage_MCM
++ @cp $(obj)/compressed/vmlinux_416 $(obj)/zImage_416
++ @cp $(obj)/compressed/vmlinux_816 $(obj)/zImage_816
++ @cp $(obj)/compressed/vmlinux_832 $(obj)/zImage_832
+ @echo ' Kernel: $@ is ready'
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/Makefile linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/Makefile
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/Makefile 2007-05-28 16:28:34.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/Makefile 2007-05-28 17:03:02.000000000 +0200
+@@ -17,18 +17,34 @@
+
+ $(obj)/decompress.o: $(OBJECTS) FORCE
+ $(call if_changed,ld)
++ $(LD) $(LDFLAGS) arch/cris/boot/compressed/head_MCM.o arch/cris/boot/compressed/misc.o -o arch/cris/boot/compressed/decompress_MCM.o
++ $(LD) $(LDFLAGS) arch/cris/boot/compressed/head_416.o arch/cris/boot/compressed/misc.o -o arch/cris/boot/compressed/decompress_416.o
++ $(LD) $(LDFLAGS) arch/cris/boot/compressed/head_816.o arch/cris/boot/compressed/misc.o -o arch/cris/boot/compressed/decompress_816.o
++ $(LD) $(LDFLAGS) arch/cris/boot/compressed/head_832.o arch/cris/boot/compressed/misc.o -o arch/cris/boot/compressed/decompress_832.o
+
+ $(obj)/decompress.bin: $(obj)/decompress.o FORCE
+ $(call if_changed,objcopy)
++ $(OBJCOPY) $(OBJCOPYFLAGS) $(obj)/decompress_MCM.o $(obj)/decompress_MCM.bin
++ $(OBJCOPY) $(OBJCOPYFLAGS) $(obj)/decompress_416.o $(obj)/decompress_416.bin
++ $(OBJCOPY) $(OBJCOPYFLAGS) $(obj)/decompress_816.o $(obj)/decompress_816.bin
++ $(OBJCOPY) $(OBJCOPYFLAGS) $(obj)/decompress_832.o $(obj)/decompress_832.bin
++
++$(obj)/head.o: $(obj)/head.S .config FORCE
++ /usr/local/cris/gcc-cris -melf -Iinclude -include include/linux/autoconf.h -D__ASSEMBLY__ -traditional -c $< -o $@
++ /usr/local/cris/gcc-cris -melf -Iinclude -include include/linux/autoconf.h -D__ASSEMBLY__ -traditional -c arch/cris/boot/compressed/head_MCM.S -o arch/cris/boot/compressed/head_MCM.o
++ /usr/local/cris/gcc-cris -melf -Iinclude -include include/linux/autoconf.h -D__ASSEMBLY__ -traditional -c arch/cris/boot/compressed/head_416.S -o arch/cris/boot/compressed/head_416.o
++ /usr/local/cris/gcc-cris -melf -Iinclude -include include/linux/autoconf.h -D__ASSEMBLY__ -traditional -c arch/cris/boot/compressed/head_816.S -o arch/cris/boot/compressed/head_816.o
++ /usr/local/cris/gcc-cris -melf -Iinclude -include include/linux/autoconf.h -D__ASSEMBLY__ -traditional -c arch/cris/boot/compressed/head_832.S -o arch/cris/boot/compressed/head_832.o
+
+-$(obj)/head.o: $(obj)/head.S .config
+- /usr/local/cris/gcc-cris -melf $(LINUXINCLUDE) -D__ASSEMBLY__ -traditional -c $< -o $@
+-
+-$(obj)/misc.o: $(obj)/misc.c .config
++$(obj)/misc.o: $(obj)/misc.c .config FORCE
+ /usr/local/cris/gcc-cris -melf $(LINUXINCLUDE) -D__KERNEL__ -c $< -o $@
+
+ $(obj)/vmlinux: $(obj)/piggy.gz $(obj)/decompress.bin FORCE
+ $(call if_changed,image)
++ cat $(obj)/decompress_MCM.bin $(obj)/piggy.gz > $(obj)/vmlinux_MCM
++ cat $(obj)/decompress_416.bin $(obj)/piggy.gz > $(obj)/vmlinux_416
++ cat $(obj)/decompress_816.bin $(obj)/piggy.gz > $(obj)/vmlinux_816
++ cat $(obj)/decompress_832.bin $(obj)/piggy.gz > $(obj)/vmlinux_832
+
+ $(obj)/piggy.gz: $(obj)/../Image FORCE
+ $(call if_changed,gzip)
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/dram_init.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/dram_init.S
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/dram_init.S 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/dram_init.S 2007-05-28 16:42:15.000000000 +0200
+@@ -0,0 +1,207 @@
++/* $Id: dram_init.S,v 1.5 2006/10/13 12:43:11 starvik Exp $
++ *
++ * DRAM/SDRAM initialization - alter with care
++ * This file is intended to be included from other assembler files
++ *
++ * Note: This file may not modify r9 because r9 is used to carry
++ * information from the decompresser to the kernel
++ *
++ * Copyright (C) 2000, 2001 Axis Communications AB
++ *
++ * Authors: Mikael Starvik (starvik@axis.com)
++ *
++ * $Log: dram_init.S,v $
++ * Revision 1.5 2006/10/13 12:43:11 starvik
++ * Merge of 2.6.18
++ *
++ * Revision 1.4 2003/09/22 09:21:59 starvik
++ * Decompresser is linked to 0x407xxxxx and sdram commands are at 0x000xxxxx
++ * so we need to mask off 12 bits.
++ *
++ * Revision 1.3 2003/03/31 09:38:37 starvik
++ * Corrected calculation of end of sdram init commands
++ *
++ * Revision 1.2 2002/11/19 13:33:29 starvik
++ * Changes from Linux 2.4
++ *
++ * Revision 1.13 2002/10/30 07:42:28 starvik
++ * Always read SDRAM command sequence from flash
++ *
++ * Revision 1.12 2002/08/09 11:37:37 orjanf
++ * Added double initialization work-around for Samsung SDRAMs.
++ *
++ * Revision 1.11 2002/06/04 11:43:21 starvik
++ * Check if mrs_data is specified in kernelconfig (necessary for MCM)
++ *
++ * Revision 1.10 2001/10/04 12:00:21 martinnn
++ * Added missing underscores.
++ *
++ * Revision 1.9 2001/10/01 14:47:35 bjornw
++ * Added register prefixes and removed underscores
++ *
++ * Revision 1.8 2001/05/15 07:12:45 hp
++ * Copy warning from head.S about r8 and r9
++ *
++ * Revision 1.7 2001/04/18 12:05:39 bjornw
++ * Fixed comments, and explicitely include config.h to be sure its there
++ *
++ * Revision 1.6 2001/04/10 06:20:16 starvik
++ * Delay should be 200us, not 200ns
++ *
++ * Revision 1.5 2001/04/09 06:01:13 starvik
++ * Added support for 100 MHz SDRAMs
++ *
++ * Revision 1.4 2001/03/26 14:24:01 bjornw
++ * Namechange of some config options
++ *
++ * Revision 1.3 2001/03/23 08:29:41 starvik
++ * Corrected calculation of mrs_data
++ *
++ * Revision 1.2 2001/02/08 15:20:00 starvik
++ * Corrected SDRAM initialization
++ * Should now be included as inline
++ *
++ * Revision 1.1 2001/01/29 13:08:02 starvik
++ * Initial version
++ * This file should be included from all assembler files that needs to
++ * initialize DRAM/SDRAM.
++ *
++ */
++
++/* Just to be certain the config file is included, we include it here
++ * explicitely instead of depending on it being included in the file that
++ * uses this code.
++ */
++
++
++ ;; WARNING! The registers r8 and r9 are used as parameters carrying
++ ;; information from the decompressor (if the kernel was compressed).
++ ;; They should not be used in the code below.
++
++#ifndef CONFIG_SVINTO_SIM
++ move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0
++ move.d $r0, [R_WAITSTATES]
++
++ move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0
++ move.d $r0, [R_BUS_CONFIG]
++
++#ifndef CONFIG_ETRAX_SDRAM
++ move.d CONFIG_ETRAX_DEF_R_DRAM_CONFIG, $r0
++ move.d $r0, [R_DRAM_CONFIG]
++
++ move.d CONFIG_ETRAX_DEF_R_DRAM_TIMING, $r0
++ move.d $r0, [R_DRAM_TIMING]
++#else
++ ;; Samsung SDRAMs seem to require to be initialized twice to work properly.
++ moveq 2, $r6
++_sdram_init:
++
++ ; Refer to ETRAX 100LX Designers Reference for a description of SDRAM initialization
++
++ ; Bank configuration
++ move.d CONFIG_ETRAX_DEF_R_SDRAM_CONFIG, $r0
++ move.d $r0, [R_SDRAM_CONFIG]
++
++ ; Calculate value of mrs_data
++ ; CAS latency = 2 && bus_width = 32 => 0x40
++ ; CAS latency = 3 && bus_width = 32 => 0x60
++ ; CAS latency = 2 && bus_width = 16 => 0x20
++ ; CAS latency = 3 && bus_width = 16 => 0x30
++
++ ; Check if value is already supplied in kernel config
++ move.d CONFIG_ETRAX_DEF_R_SDRAM_TIMING, $r2
++ and.d 0x00ff0000, $r2
++ bne _set_timing
++ lsrq 16, $r2
++
++ move.d 0x40, $r2 ; Assume 32 bits and CAS latency = 2
++ move.d CONFIG_ETRAX_DEF_R_SDRAM_TIMING, $r1
++ move.d $r1, $r3
++ and.d 0x03, $r1 ; Get CAS latency
++ and.d 0x1000, $r3 ; 50 or 100 MHz?
++ beq _speed_50
++ nop
++_speed_100:
++ cmp.d 0x00, $r1 ; CAS latency = 2?
++ beq _bw_check
++ nop
++ or.d 0x20, $r2 ; CAS latency = 3
++ ba _bw_check
++ nop
++_speed_50:
++ cmp.d 0x01, $r1 ; CAS latency = 2?
++ beq _bw_check
++ nop
++ or.d 0x20, $r2 ; CAS latency = 3
++_bw_check:
++ move.d CONFIG_ETRAX_DEF_R_SDRAM_CONFIG, $r1
++ and.d 0x800000, $r1 ; DRAM width is bit 23
++ bne _set_timing
++ nop
++ lsrq 1, $r2 ; 16 bits. Shift down value.
++
++ ; Set timing parameters. Starts master clock
++_set_timing:
++ move.d CONFIG_ETRAX_DEF_R_SDRAM_TIMING, $r1
++ and.d 0x8000f9ff, $r1 ; Make sure mrs data and command is 0
++ or.d 0x80000000, $r1 ; Make sure sdram enable bit is set
++ move.d $r1, $r5
++ or.d 0x0000c000, $r1 ; ref = disable
++ lslq 16, $r2 ; mrs data starts at bit 16
++ or.d $r2, $r1
++ move.d $r1, [R_SDRAM_TIMING]
++
++ ; Wait 200us
++ move.d 10000, $r2
++1: bne 1b
++ subq 1, $r2
++
++ ; Issue initialization command sequence
++ move.d _sdram_commands_start, $r2
++ and.d 0x000fffff, $r2 ; Make sure commands are read from flash
++ move.d _sdram_commands_end, $r3
++ and.d 0x000fffff, $r3
++1: clear.d $r4
++ move.b [$r2+], $r4
++ lslq 9, $r4 ; Command starts at bit 9
++ or.d $r1, $r4
++ move.d $r4, [R_SDRAM_TIMING]
++ nop ; Wait five nop cycles between each command
++ nop
++ nop
++ nop
++ nop
++ cmp.d $r2, $r3
++ bne 1b
++ nop
++ move.d $r5, [R_SDRAM_TIMING]
++ subq 1, $r6
++ bne _sdram_init
++ nop
++ ba _sdram_commands_end
++ nop
++
++_sdram_commands_start:
++ .byte 3 ; Precharge
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 1 ; mrs
++ .byte 0 ; nop
++_sdram_commands_end:
++#endif
++#endif
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/dram_init_416.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/dram_init_416.S
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/dram_init_416.S 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/dram_init_416.S 2007-05-28 20:02:25.000000000 +0200
+@@ -0,0 +1,207 @@
++/* $Id: dram_init.S,v 1.5 2006/10/13 12:43:11 starvik Exp $
++ *
++ * DRAM/SDRAM initialization - alter with care
++ * This file is intended to be included from other assembler files
++ *
++ * Note: This file may not modify r9 because r9 is used to carry
++ * information from the decompresser to the kernel
++ *
++ * Copyright (C) 2000, 2001 Axis Communications AB
++ *
++ * Authors: Mikael Starvik (starvik@axis.com)
++ *
++ * $Log: dram_init.S,v $
++ * Revision 1.5 2006/10/13 12:43:11 starvik
++ * Merge of 2.6.18
++ *
++ * Revision 1.4 2003/09/22 09:21:59 starvik
++ * Decompresser is linked to 0x407xxxxx and sdram commands are at 0x000xxxxx
++ * so we need to mask off 12 bits.
++ *
++ * Revision 1.3 2003/03/31 09:38:37 starvik
++ * Corrected calculation of end of sdram init commands
++ *
++ * Revision 1.2 2002/11/19 13:33:29 starvik
++ * Changes from Linux 2.4
++ *
++ * Revision 1.13 2002/10/30 07:42:28 starvik
++ * Always read SDRAM command sequence from flash
++ *
++ * Revision 1.12 2002/08/09 11:37:37 orjanf
++ * Added double initialization work-around for Samsung SDRAMs.
++ *
++ * Revision 1.11 2002/06/04 11:43:21 starvik
++ * Check if mrs_data is specified in kernelconfig (necessary for MCM)
++ *
++ * Revision 1.10 2001/10/04 12:00:21 martinnn
++ * Added missing underscores.
++ *
++ * Revision 1.9 2001/10/01 14:47:35 bjornw
++ * Added register prefixes and removed underscores
++ *
++ * Revision 1.8 2001/05/15 07:12:45 hp
++ * Copy warning from head.S about r8 and r9
++ *
++ * Revision 1.7 2001/04/18 12:05:39 bjornw
++ * Fixed comments, and explicitely include config.h to be sure its there
++ *
++ * Revision 1.6 2001/04/10 06:20:16 starvik
++ * Delay should be 200us, not 200ns
++ *
++ * Revision 1.5 2001/04/09 06:01:13 starvik
++ * Added support for 100 MHz SDRAMs
++ *
++ * Revision 1.4 2001/03/26 14:24:01 bjornw
++ * Namechange of some config options
++ *
++ * Revision 1.3 2001/03/23 08:29:41 starvik
++ * Corrected calculation of mrs_data
++ *
++ * Revision 1.2 2001/02/08 15:20:00 starvik
++ * Corrected SDRAM initialization
++ * Should now be included as inline
++ *
++ * Revision 1.1 2001/01/29 13:08:02 starvik
++ * Initial version
++ * This file should be included from all assembler files that needs to
++ * initialize DRAM/SDRAM.
++ *
++ */
++
++/* Just to be certain the config file is included, we include it here
++ * explicitely instead of depending on it being included in the file that
++ * uses this code.
++ */
++
++
++ ;; WARNING! The registers r8 and r9 are used as parameters carrying
++ ;; information from the decompressor (if the kernel was compressed).
++ ;; They should not be used in the code below.
++
++#ifndef CONFIG_SVINTO_SIM
++ move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0
++ move.d $r0, [R_WAITSTATES]
++
++ move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0
++ move.d $r0, [R_BUS_CONFIG]
++
++#ifndef CONFIG_ETRAX_SDRAM
++ move.d CONFIG_ETRAX_DEF_R_DRAM_CONFIG, $r0
++ move.d $r0, [R_DRAM_CONFIG]
++
++ move.d CONFIG_ETRAX_DEF_R_DRAM_TIMING, $r0
++ move.d $r0, [R_DRAM_TIMING]
++#else
++ ;; Samsung SDRAMs seem to require to be initialized twice to work properly.
++ moveq 2, $r6
++_sdram_init:
++
++ ; Refer to ETRAX 100LX Designers Reference for a description of SDRAM initialization
++
++ ; Bank configuration
++ move.d 0x09603636, $r0
++ move.d $r0, [R_SDRAM_CONFIG]
++
++ ; Calculate value of mrs_data
++ ; CAS latency = 2 && bus_width = 32 => 0x40
++ ; CAS latency = 3 && bus_width = 32 => 0x60
++ ; CAS latency = 2 && bus_width = 16 => 0x20
++ ; CAS latency = 3 && bus_width = 16 => 0x30
++
++ ; Check if value is already supplied in kernel config
++ move.d 0x80008002, $r2
++ and.d 0x00ff0000, $r2
++ bne _set_timing
++ lsrq 16, $r2
++
++ move.d 0x40, $r2 ; Assume 32 bits and CAS latency = 2
++ move.d 0x80008002, $r1
++ move.d $r1, $r3
++ and.d 0x03, $r1 ; Get CAS latency
++ and.d 0x1000, $r3 ; 50 or 100 MHz?
++ beq _speed_50
++ nop
++_speed_100:
++ cmp.d 0x00, $r1 ; CAS latency = 2?
++ beq _bw_check
++ nop
++ or.d 0x20, $r2 ; CAS latency = 3
++ ba _bw_check
++ nop
++_speed_50:
++ cmp.d 0x01, $r1 ; CAS latency = 2?
++ beq _bw_check
++ nop
++ or.d 0x20, $r2 ; CAS latency = 3
++_bw_check:
++ move.d 0x09603636, $r1
++ and.d 0x800000, $r1 ; DRAM width is bit 23
++ bne _set_timing
++ nop
++ lsrq 1, $r2 ; 16 bits. Shift down value.
++
++ ; Set timing parameters. Starts master clock
++_set_timing:
++ move.d 0x80008002, $r1
++ and.d 0x8000f9ff, $r1 ; Make sure mrs data and command is 0
++ or.d 0x80000000, $r1 ; Make sure sdram enable bit is set
++ move.d $r1, $r5
++ or.d 0x0000c000, $r1 ; ref = disable
++ lslq 16, $r2 ; mrs data starts at bit 16
++ or.d $r2, $r1
++ move.d $r1, [R_SDRAM_TIMING]
++
++ ; Wait 200us
++ move.d 10000, $r2
++1: bne 1b
++ subq 1, $r2
++
++ ; Issue initialization command sequence
++ move.d _sdram_commands_start, $r2
++ and.d 0x000fffff, $r2 ; Make sure commands are read from flash
++ move.d _sdram_commands_end, $r3
++ and.d 0x000fffff, $r3
++1: clear.d $r4
++ move.b [$r2+], $r4
++ lslq 9, $r4 ; Command starts at bit 9
++ or.d $r1, $r4
++ move.d $r4, [R_SDRAM_TIMING]
++ nop ; Wait five nop cycles between each command
++ nop
++ nop
++ nop
++ nop
++ cmp.d $r2, $r3
++ bne 1b
++ nop
++ move.d $r5, [R_SDRAM_TIMING]
++ subq 1, $r6
++ bne _sdram_init
++ nop
++ ba _sdram_commands_end
++ nop
++
++_sdram_commands_start:
++ .byte 3 ; Precharge
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 1 ; mrs
++ .byte 0 ; nop
++_sdram_commands_end:
++#endif
++#endif
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/dram_init_816.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/dram_init_816.S
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/dram_init_816.S 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/dram_init_816.S 2007-05-28 20:04:05.000000000 +0200
+@@ -0,0 +1,207 @@
++/* $Id: dram_init.S,v 1.5 2006/10/13 12:43:11 starvik Exp $
++ *
++ * DRAM/SDRAM initialization - alter with care
++ * This file is intended to be included from other assembler files
++ *
++ * Note: This file may not modify r9 because r9 is used to carry
++ * information from the decompresser to the kernel
++ *
++ * Copyright (C) 2000, 2001 Axis Communications AB
++ *
++ * Authors: Mikael Starvik (starvik@axis.com)
++ *
++ * $Log: dram_init.S,v $
++ * Revision 1.5 2006/10/13 12:43:11 starvik
++ * Merge of 2.6.18
++ *
++ * Revision 1.4 2003/09/22 09:21:59 starvik
++ * Decompresser is linked to 0x407xxxxx and sdram commands are at 0x000xxxxx
++ * so we need to mask off 12 bits.
++ *
++ * Revision 1.3 2003/03/31 09:38:37 starvik
++ * Corrected calculation of end of sdram init commands
++ *
++ * Revision 1.2 2002/11/19 13:33:29 starvik
++ * Changes from Linux 2.4
++ *
++ * Revision 1.13 2002/10/30 07:42:28 starvik
++ * Always read SDRAM command sequence from flash
++ *
++ * Revision 1.12 2002/08/09 11:37:37 orjanf
++ * Added double initialization work-around for Samsung SDRAMs.
++ *
++ * Revision 1.11 2002/06/04 11:43:21 starvik
++ * Check if mrs_data is specified in kernelconfig (necessary for MCM)
++ *
++ * Revision 1.10 2001/10/04 12:00:21 martinnn
++ * Added missing underscores.
++ *
++ * Revision 1.9 2001/10/01 14:47:35 bjornw
++ * Added register prefixes and removed underscores
++ *
++ * Revision 1.8 2001/05/15 07:12:45 hp
++ * Copy warning from head.S about r8 and r9
++ *
++ * Revision 1.7 2001/04/18 12:05:39 bjornw
++ * Fixed comments, and explicitely include config.h to be sure its there
++ *
++ * Revision 1.6 2001/04/10 06:20:16 starvik
++ * Delay should be 200us, not 200ns
++ *
++ * Revision 1.5 2001/04/09 06:01:13 starvik
++ * Added support for 100 MHz SDRAMs
++ *
++ * Revision 1.4 2001/03/26 14:24:01 bjornw
++ * Namechange of some config options
++ *
++ * Revision 1.3 2001/03/23 08:29:41 starvik
++ * Corrected calculation of mrs_data
++ *
++ * Revision 1.2 2001/02/08 15:20:00 starvik
++ * Corrected SDRAM initialization
++ * Should now be included as inline
++ *
++ * Revision 1.1 2001/01/29 13:08:02 starvik
++ * Initial version
++ * This file should be included from all assembler files that needs to
++ * initialize DRAM/SDRAM.
++ *
++ */
++
++/* Just to be certain the config file is included, we include it here
++ * explicitely instead of depending on it being included in the file that
++ * uses this code.
++ */
++
++
++ ;; WARNING! The registers r8 and r9 are used as parameters carrying
++ ;; information from the decompressor (if the kernel was compressed).
++ ;; They should not be used in the code below.
++
++#ifndef CONFIG_SVINTO_SIM
++ move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0
++ move.d $r0, [R_WAITSTATES]
++
++ move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0
++ move.d $r0, [R_BUS_CONFIG]
++
++#ifndef CONFIG_ETRAX_SDRAM
++ move.d CONFIG_ETRAX_DEF_R_DRAM_CONFIG, $r0
++ move.d $r0, [R_DRAM_CONFIG]
++
++ move.d CONFIG_ETRAX_DEF_R_DRAM_TIMING, $r0
++ move.d $r0, [R_DRAM_TIMING]
++#else
++ ;; Samsung SDRAMs seem to require to be initialized twice to work properly.
++ moveq 2, $r6
++_sdram_init:
++
++ ; Refer to ETRAX 100LX Designers Reference for a description of SDRAM initialization
++
++ ; Bank configuration
++ move.d 0x09603636, $r0
++ move.d $r0, [R_SDRAM_CONFIG]
++
++ ; Calculate value of mrs_data
++ ; CAS latency = 2 && bus_width = 32 => 0x40
++ ; CAS latency = 3 && bus_width = 32 => 0x60
++ ; CAS latency = 2 && bus_width = 16 => 0x20
++ ; CAS latency = 3 && bus_width = 16 => 0x30
++
++ ; Check if value is already supplied in kernel config
++ move.d 0x80008002, $r2
++ and.d 0x00ff0000, $r2
++ bne _set_timing
++ lsrq 16, $r2
++
++ move.d 0x40, $r2 ; Assume 32 bits and CAS latency = 2
++ move.d 0x80008002, $r1
++ move.d $r1, $r3
++ and.d 0x03, $r1 ; Get CAS latency
++ and.d 0x1000, $r3 ; 50 or 100 MHz?
++ beq _speed_50
++ nop
++_speed_100:
++ cmp.d 0x00, $r1 ; CAS latency = 2?
++ beq _bw_check
++ nop
++ or.d 0x20, $r2 ; CAS latency = 3
++ ba _bw_check
++ nop
++_speed_50:
++ cmp.d 0x01, $r1 ; CAS latency = 2?
++ beq _bw_check
++ nop
++ or.d 0x20, $r2 ; CAS latency = 3
++_bw_check:
++ move.d 0x09603636, $r1
++ and.d 0x800000, $r1 ; DRAM width is bit 23
++ bne _set_timing
++ nop
++ lsrq 1, $r2 ; 16 bits. Shift down value.
++
++ ; Set timing parameters. Starts master clock
++_set_timing:
++ move.d 0x80008002, $r1
++ and.d 0x8000f9ff, $r1 ; Make sure mrs data and command is 0
++ or.d 0x80000000, $r1 ; Make sure sdram enable bit is set
++ move.d $r1, $r5
++ or.d 0x0000c000, $r1 ; ref = disable
++ lslq 16, $r2 ; mrs data starts at bit 16
++ or.d $r2, $r1
++ move.d $r1, [R_SDRAM_TIMING]
++
++ ; Wait 200us
++ move.d 10000, $r2
++1: bne 1b
++ subq 1, $r2
++
++ ; Issue initialization command sequence
++ move.d _sdram_commands_start, $r2
++ and.d 0x000fffff, $r2 ; Make sure commands are read from flash
++ move.d _sdram_commands_end, $r3
++ and.d 0x000fffff, $r3
++1: clear.d $r4
++ move.b [$r2+], $r4
++ lslq 9, $r4 ; Command starts at bit 9
++ or.d $r1, $r4
++ move.d $r4, [R_SDRAM_TIMING]
++ nop ; Wait five nop cycles between each command
++ nop
++ nop
++ nop
++ nop
++ cmp.d $r2, $r3
++ bne 1b
++ nop
++ move.d $r5, [R_SDRAM_TIMING]
++ subq 1, $r6
++ bne _sdram_init
++ nop
++ ba _sdram_commands_end
++ nop
++
++_sdram_commands_start:
++ .byte 3 ; Precharge
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 1 ; mrs
++ .byte 0 ; nop
++_sdram_commands_end:
++#endif
++#endif
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/dram_init_832.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/dram_init_832.S
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/dram_init_832.S 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/dram_init_832.S 2007-05-28 20:04:57.000000000 +0200
+@@ -0,0 +1,207 @@
++/* $Id: dram_init.S,v 1.5 2006/10/13 12:43:11 starvik Exp $
++ *
++ * DRAM/SDRAM initialization - alter with care
++ * This file is intended to be included from other assembler files
++ *
++ * Note: This file may not modify r9 because r9 is used to carry
++ * information from the decompresser to the kernel
++ *
++ * Copyright (C) 2000, 2001 Axis Communications AB
++ *
++ * Authors: Mikael Starvik (starvik@axis.com)
++ *
++ * $Log: dram_init.S,v $
++ * Revision 1.5 2006/10/13 12:43:11 starvik
++ * Merge of 2.6.18
++ *
++ * Revision 1.4 2003/09/22 09:21:59 starvik
++ * Decompresser is linked to 0x407xxxxx and sdram commands are at 0x000xxxxx
++ * so we need to mask off 12 bits.
++ *
++ * Revision 1.3 2003/03/31 09:38:37 starvik
++ * Corrected calculation of end of sdram init commands
++ *
++ * Revision 1.2 2002/11/19 13:33:29 starvik
++ * Changes from Linux 2.4
++ *
++ * Revision 1.13 2002/10/30 07:42:28 starvik
++ * Always read SDRAM command sequence from flash
++ *
++ * Revision 1.12 2002/08/09 11:37:37 orjanf
++ * Added double initialization work-around for Samsung SDRAMs.
++ *
++ * Revision 1.11 2002/06/04 11:43:21 starvik
++ * Check if mrs_data is specified in kernelconfig (necessary for MCM)
++ *
++ * Revision 1.10 2001/10/04 12:00:21 martinnn
++ * Added missing underscores.
++ *
++ * Revision 1.9 2001/10/01 14:47:35 bjornw
++ * Added register prefixes and removed underscores
++ *
++ * Revision 1.8 2001/05/15 07:12:45 hp
++ * Copy warning from head.S about r8 and r9
++ *
++ * Revision 1.7 2001/04/18 12:05:39 bjornw
++ * Fixed comments, and explicitely include config.h to be sure its there
++ *
++ * Revision 1.6 2001/04/10 06:20:16 starvik
++ * Delay should be 200us, not 200ns
++ *
++ * Revision 1.5 2001/04/09 06:01:13 starvik
++ * Added support for 100 MHz SDRAMs
++ *
++ * Revision 1.4 2001/03/26 14:24:01 bjornw
++ * Namechange of some config options
++ *
++ * Revision 1.3 2001/03/23 08:29:41 starvik
++ * Corrected calculation of mrs_data
++ *
++ * Revision 1.2 2001/02/08 15:20:00 starvik
++ * Corrected SDRAM initialization
++ * Should now be included as inline
++ *
++ * Revision 1.1 2001/01/29 13:08:02 starvik
++ * Initial version
++ * This file should be included from all assembler files that needs to
++ * initialize DRAM/SDRAM.
++ *
++ */
++
++/* Just to be certain the config file is included, we include it here
++ * explicitely instead of depending on it being included in the file that
++ * uses this code.
++ */
++
++
++ ;; WARNING! The registers r8 and r9 are used as parameters carrying
++ ;; information from the decompressor (if the kernel was compressed).
++ ;; They should not be used in the code below.
++
++#ifndef CONFIG_SVINTO_SIM
++ move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0
++ move.d $r0, [R_WAITSTATES]
++
++ move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0
++ move.d $r0, [R_BUS_CONFIG]
++
++#ifndef CONFIG_ETRAX_SDRAM
++ move.d CONFIG_ETRAX_DEF_R_DRAM_CONFIG, $r0
++ move.d $r0, [R_DRAM_CONFIG]
++
++ move.d CONFIG_ETRAX_DEF_R_DRAM_TIMING, $r0
++ move.d $r0, [R_DRAM_TIMING]
++#else
++ ;; Samsung SDRAMs seem to require to be initialized twice to work properly.
++ moveq 2, $r6
++_sdram_init:
++
++ ; Refer to ETRAX 100LX Designers Reference for a description of SDRAM initialization
++
++ ; Bank configuration
++ move.d 0x09603737, $r0
++ move.d $r0, [R_SDRAM_CONFIG]
++
++ ; Calculate value of mrs_data
++ ; CAS latency = 2 && bus_width = 32 => 0x40
++ ; CAS latency = 3 && bus_width = 32 => 0x60
++ ; CAS latency = 2 && bus_width = 16 => 0x20
++ ; CAS latency = 3 && bus_width = 16 => 0x30
++
++ ; Check if value is already supplied in kernel config
++ move.d 0x80008002, $r2
++ and.d 0x00ff0000, $r2
++ bne _set_timing
++ lsrq 16, $r2
++
++ move.d 0x40, $r2 ; Assume 32 bits and CAS latency = 2
++ move.d 0x80008002, $r1
++ move.d $r1, $r3
++ and.d 0x03, $r1 ; Get CAS latency
++ and.d 0x1000, $r3 ; 50 or 100 MHz?
++ beq _speed_50
++ nop
++_speed_100:
++ cmp.d 0x00, $r1 ; CAS latency = 2?
++ beq _bw_check
++ nop
++ or.d 0x20, $r2 ; CAS latency = 3
++ ba _bw_check
++ nop
++_speed_50:
++ cmp.d 0x01, $r1 ; CAS latency = 2?
++ beq _bw_check
++ nop
++ or.d 0x20, $r2 ; CAS latency = 3
++_bw_check:
++ move.d 0x09603737, $r1
++ and.d 0x800000, $r1 ; DRAM width is bit 23
++ bne _set_timing
++ nop
++ lsrq 1, $r2 ; 16 bits. Shift down value.
++
++ ; Set timing parameters. Starts master clock
++_set_timing:
++ move.d 0x80008002, $r1
++ and.d 0x8000f9ff, $r1 ; Make sure mrs data and command is 0
++ or.d 0x80000000, $r1 ; Make sure sdram enable bit is set
++ move.d $r1, $r5
++ or.d 0x0000c000, $r1 ; ref = disable
++ lslq 16, $r2 ; mrs data starts at bit 16
++ or.d $r2, $r1
++ move.d $r1, [R_SDRAM_TIMING]
++
++ ; Wait 200us
++ move.d 10000, $r2
++1: bne 1b
++ subq 1, $r2
++
++ ; Issue initialization command sequence
++ move.d _sdram_commands_start, $r2
++ and.d 0x000fffff, $r2 ; Make sure commands are read from flash
++ move.d _sdram_commands_end, $r3
++ and.d 0x000fffff, $r3
++1: clear.d $r4
++ move.b [$r2+], $r4
++ lslq 9, $r4 ; Command starts at bit 9
++ or.d $r1, $r4
++ move.d $r4, [R_SDRAM_TIMING]
++ nop ; Wait five nop cycles between each command
++ nop
++ nop
++ nop
++ nop
++ cmp.d $r2, $r3
++ bne 1b
++ nop
++ move.d $r5, [R_SDRAM_TIMING]
++ subq 1, $r6
++ bne _sdram_init
++ nop
++ ba _sdram_commands_end
++ nop
++
++_sdram_commands_start:
++ .byte 3 ; Precharge
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 1 ; mrs
++ .byte 0 ; nop
++_sdram_commands_end:
++#endif
++#endif
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/dram_init_MCM.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/dram_init_MCM.S
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/dram_init_MCM.S 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/dram_init_MCM.S 2007-05-28 20:03:13.000000000 +0200
+@@ -0,0 +1,207 @@
++/* $Id: dram_init.S,v 1.5 2006/10/13 12:43:11 starvik Exp $
++ *
++ * DRAM/SDRAM initialization - alter with care
++ * This file is intended to be included from other assembler files
++ *
++ * Note: This file may not modify r9 because r9 is used to carry
++ * information from the decompresser to the kernel
++ *
++ * Copyright (C) 2000, 2001 Axis Communications AB
++ *
++ * Authors: Mikael Starvik (starvik@axis.com)
++ *
++ * $Log: dram_init.S,v $
++ * Revision 1.5 2006/10/13 12:43:11 starvik
++ * Merge of 2.6.18
++ *
++ * Revision 1.4 2003/09/22 09:21:59 starvik
++ * Decompresser is linked to 0x407xxxxx and sdram commands are at 0x000xxxxx
++ * so we need to mask off 12 bits.
++ *
++ * Revision 1.3 2003/03/31 09:38:37 starvik
++ * Corrected calculation of end of sdram init commands
++ *
++ * Revision 1.2 2002/11/19 13:33:29 starvik
++ * Changes from Linux 2.4
++ *
++ * Revision 1.13 2002/10/30 07:42:28 starvik
++ * Always read SDRAM command sequence from flash
++ *
++ * Revision 1.12 2002/08/09 11:37:37 orjanf
++ * Added double initialization work-around for Samsung SDRAMs.
++ *
++ * Revision 1.11 2002/06/04 11:43:21 starvik
++ * Check if mrs_data is specified in kernelconfig (necessary for MCM)
++ *
++ * Revision 1.10 2001/10/04 12:00:21 martinnn
++ * Added missing underscores.
++ *
++ * Revision 1.9 2001/10/01 14:47:35 bjornw
++ * Added register prefixes and removed underscores
++ *
++ * Revision 1.8 2001/05/15 07:12:45 hp
++ * Copy warning from head.S about r8 and r9
++ *
++ * Revision 1.7 2001/04/18 12:05:39 bjornw
++ * Fixed comments, and explicitely include config.h to be sure its there
++ *
++ * Revision 1.6 2001/04/10 06:20:16 starvik
++ * Delay should be 200us, not 200ns
++ *
++ * Revision 1.5 2001/04/09 06:01:13 starvik
++ * Added support for 100 MHz SDRAMs
++ *
++ * Revision 1.4 2001/03/26 14:24:01 bjornw
++ * Namechange of some config options
++ *
++ * Revision 1.3 2001/03/23 08:29:41 starvik
++ * Corrected calculation of mrs_data
++ *
++ * Revision 1.2 2001/02/08 15:20:00 starvik
++ * Corrected SDRAM initialization
++ * Should now be included as inline
++ *
++ * Revision 1.1 2001/01/29 13:08:02 starvik
++ * Initial version
++ * This file should be included from all assembler files that needs to
++ * initialize DRAM/SDRAM.
++ *
++ */
++
++/* Just to be certain the config file is included, we include it here
++ * explicitely instead of depending on it being included in the file that
++ * uses this code.
++ */
++
++
++ ;; WARNING! The registers r8 and r9 are used as parameters carrying
++ ;; information from the decompressor (if the kernel was compressed).
++ ;; They should not be used in the code below.
++
++#ifndef CONFIG_SVINTO_SIM
++ move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0
++ move.d $r0, [R_WAITSTATES]
++
++ move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0
++ move.d $r0, [R_BUS_CONFIG]
++
++#ifndef CONFIG_ETRAX_SDRAM
++ move.d CONFIG_ETRAX_DEF_R_DRAM_CONFIG, $r0
++ move.d $r0, [R_DRAM_CONFIG]
++
++ move.d CONFIG_ETRAX_DEF_R_DRAM_TIMING, $r0
++ move.d $r0, [R_DRAM_TIMING]
++#else
++ ;; Samsung SDRAMs seem to require to be initialized twice to work properly.
++ moveq 2, $r6
++_sdram_init:
++
++ ; Refer to ETRAX 100LX Designers Reference for a description of SDRAM initialization
++
++ ; Bank configuration
++ move.d 0x09603636, $r0
++ move.d $r0, [R_SDRAM_CONFIG]
++
++ ; Calculate value of mrs_data
++ ; CAS latency = 2 && bus_width = 32 => 0x40
++ ; CAS latency = 3 && bus_width = 32 => 0x60
++ ; CAS latency = 2 && bus_width = 16 => 0x20
++ ; CAS latency = 3 && bus_width = 16 => 0x30
++
++ ; Check if value is already supplied in kernel config
++ move.d 0x80608002, $r2
++ and.d 0x00ff0000, $r2
++ bne _set_timing
++ lsrq 16, $r2
++
++ move.d 0x40, $r2 ; Assume 32 bits and CAS latency = 2
++ move.d 0x80608002, $r1
++ move.d $r1, $r3
++ and.d 0x03, $r1 ; Get CAS latency
++ and.d 0x1000, $r3 ; 50 or 100 MHz?
++ beq _speed_50
++ nop
++_speed_100:
++ cmp.d 0x00, $r1 ; CAS latency = 2?
++ beq _bw_check
++ nop
++ or.d 0x20, $r2 ; CAS latency = 3
++ ba _bw_check
++ nop
++_speed_50:
++ cmp.d 0x01, $r1 ; CAS latency = 2?
++ beq _bw_check
++ nop
++ or.d 0x20, $r2 ; CAS latency = 3
++_bw_check:
++ move.d 0x09603636, $r1
++ and.d 0x800000, $r1 ; DRAM width is bit 23
++ bne _set_timing
++ nop
++ lsrq 1, $r2 ; 16 bits. Shift down value.
++
++ ; Set timing parameters. Starts master clock
++_set_timing:
++ move.d 0x80608002, $r1
++ and.d 0x8000f9ff, $r1 ; Make sure mrs data and command is 0
++ or.d 0x80000000, $r1 ; Make sure sdram enable bit is set
++ move.d $r1, $r5
++ or.d 0x0000c000, $r1 ; ref = disable
++ lslq 16, $r2 ; mrs data starts at bit 16
++ or.d $r2, $r1
++ move.d $r1, [R_SDRAM_TIMING]
++
++ ; Wait 200us
++ move.d 10000, $r2
++1: bne 1b
++ subq 1, $r2
++
++ ; Issue initialization command sequence
++ move.d _sdram_commands_start, $r2
++ and.d 0x000fffff, $r2 ; Make sure commands are read from flash
++ move.d _sdram_commands_end, $r3
++ and.d 0x000fffff, $r3
++1: clear.d $r4
++ move.b [$r2+], $r4
++ lslq 9, $r4 ; Command starts at bit 9
++ or.d $r1, $r4
++ move.d $r4, [R_SDRAM_TIMING]
++ nop ; Wait five nop cycles between each command
++ nop
++ nop
++ nop
++ nop
++ cmp.d $r2, $r3
++ bne 1b
++ nop
++ move.d $r5, [R_SDRAM_TIMING]
++ subq 1, $r6
++ bne _sdram_init
++ nop
++ ba _sdram_commands_end
++ nop
++
++_sdram_commands_start:
++ .byte 3 ; Precharge
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 2 ; refresh
++ .byte 0 ; nop
++ .byte 1 ; mrs
++ .byte 0 ; nop
++_sdram_commands_end:
++#endif
++#endif
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/head_416.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/head_416.S
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/head_416.S 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/head_416.S 2007-05-28 17:16:28.000000000 +0200
+@@ -0,0 +1,126 @@
++/*
++ * arch/cris/boot/compressed/head.S
++ *
++ * Copyright (C) 1999, 2001 Axis Communications AB
++ *
++ * Code that sets up the DRAM registers, calls the
++ * decompressor to unpack the piggybacked kernel, and jumps.
++ *
++ */
++
++#define ASSEMBLER_MACROS_ONLY
++#include <asm/arch/sv_addr_ag.h>
++
++#define RAM_INIT_MAGIC 0x56902387
++#define COMMAND_LINE_MAGIC 0x87109563
++
++ ;; Exported symbols
++
++ .globl _input_data
++
++
++ .text
++
++ nop
++ di
++
++;; We need to initialze DRAM registers before we start using the DRAM
++
++ cmp.d RAM_INIT_MAGIC, r8 ; Already initialized?
++ beq dram_init_finished
++ nop
++
++#include "dram_init_416.S"
++
++dram_init_finished:
++
++ ;; Initiate the PA and PB ports
++
++ move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA, r0
++ move.b r0, [R_PORT_PA_DATA]
++
++ move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR, r0
++ move.b r0, [R_PORT_PA_DIR]
++
++ move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA, r0
++ move.b r0, [R_PORT_PB_DATA]
++
++ move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR, r0
++ move.b r0, [R_PORT_PB_DIR]
++
++ ;; Setup the stack to a suitably high address.
++ ;; We assume 8 MB is the minimum DRAM in an eLinux
++ ;; product and put the sp at the top for now.
++
++ move.d 0x40800000, sp
++
++ ;; Figure out where the compressed piggyback image is
++ ;; in the flash (since we wont try to copy it to DRAM
++ ;; before unpacking). It is at _edata, but in flash.
++ ;; Use (_edata - basse) as offset to the current PC.
++
++basse: move.d pc, r5
++ and.d 0x7fffffff, r5 ; strip any non-cache bit
++ subq 2, r5 ; compensate for the move.d pc instr
++ move.d r5, r0 ; save for later - flash address of 'basse'
++ add.d _edata, r5
++ sub.d basse, r5 ; r5 = flash address of '_edata'
++
++ ;; Copy text+data to DRAM
++
++ move.d basse, r1 ; destination
++ move.d _edata, r2 ; end destination
++1: move.w [r0+], r3
++ move.w r3, [r1+]
++ cmp.d r2, r1
++ bcs 1b
++ nop
++
++ move.d r5, [_input_data] ; for the decompressor
++
++
++ ;; Clear the decompressors BSS (between _edata and _end)
++
++ moveq 0, r0
++ move.d _edata, r1
++ move.d _end, r2
++1: move.w r0, [r1+]
++ cmp.d r2, r1
++ bcs 1b
++ nop
++
++ ;; Save command line magic and address.
++ move.d _cmd_line_magic, $r12
++ move.d $r10, [$r12]
++ move.d _cmd_line_addr, $r12
++ move.d $r11, [$r12]
++
++ ;; Do the decompression and save compressed size in _inptr
++
++ jsr _decompress_kernel
++
++ ;; Put start address of root partition in r9 so the kernel can use it
++ ;; when mounting from flash
++
++ move.d [_input_data], r9 ; flash address of compressed kernel
++ add.d [_inptr], r9 ; size of compressed kernel
++
++ ;; Restore command line magic and address.
++ move.d _cmd_line_magic, $r10
++ move.d [$r10], $r10
++ move.d _cmd_line_addr, $r11
++ move.d [$r11], $r11
++
++ ;; Enter the decompressed kernel
++ move.d RAM_INIT_MAGIC, r8 ; Tell kernel that DRAM is initialized
++ jump 0x40004000 ; kernel is linked to this address
++
++ .data
++
++_input_data:
++ .dword 0 ; used by the decompressor
++_cmd_line_magic:
++ .dword 0
++_cmd_line_addr:
++ .dword 0
++#include "hw_settings_416.S"
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/head_816.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/head_816.S
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/head_816.S 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/head_816.S 2007-05-28 17:16:58.000000000 +0200
+@@ -0,0 +1,126 @@
++/*
++ * arch/cris/boot/compressed/head.S
++ *
++ * Copyright (C) 1999, 2001 Axis Communications AB
++ *
++ * Code that sets up the DRAM registers, calls the
++ * decompressor to unpack the piggybacked kernel, and jumps.
++ *
++ */
++
++#define ASSEMBLER_MACROS_ONLY
++#include <asm/arch/sv_addr_ag.h>
++
++#define RAM_INIT_MAGIC 0x56902387
++#define COMMAND_LINE_MAGIC 0x87109563
++
++ ;; Exported symbols
++
++ .globl _input_data
++
++
++ .text
++
++ nop
++ di
++
++;; We need to initialze DRAM registers before we start using the DRAM
++
++ cmp.d RAM_INIT_MAGIC, r8 ; Already initialized?
++ beq dram_init_finished
++ nop
++
++#include "dram_init_816.S"
++
++dram_init_finished:
++
++ ;; Initiate the PA and PB ports
++
++ move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA, r0
++ move.b r0, [R_PORT_PA_DATA]
++
++ move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR, r0
++ move.b r0, [R_PORT_PA_DIR]
++
++ move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA, r0
++ move.b r0, [R_PORT_PB_DATA]
++
++ move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR, r0
++ move.b r0, [R_PORT_PB_DIR]
++
++ ;; Setup the stack to a suitably high address.
++ ;; We assume 8 MB is the minimum DRAM in an eLinux
++ ;; product and put the sp at the top for now.
++
++ move.d 0x40800000, sp
++
++ ;; Figure out where the compressed piggyback image is
++ ;; in the flash (since we wont try to copy it to DRAM
++ ;; before unpacking). It is at _edata, but in flash.
++ ;; Use (_edata - basse) as offset to the current PC.
++
++basse: move.d pc, r5
++ and.d 0x7fffffff, r5 ; strip any non-cache bit
++ subq 2, r5 ; compensate for the move.d pc instr
++ move.d r5, r0 ; save for later - flash address of 'basse'
++ add.d _edata, r5
++ sub.d basse, r5 ; r5 = flash address of '_edata'
++
++ ;; Copy text+data to DRAM
++
++ move.d basse, r1 ; destination
++ move.d _edata, r2 ; end destination
++1: move.w [r0+], r3
++ move.w r3, [r1+]
++ cmp.d r2, r1
++ bcs 1b
++ nop
++
++ move.d r5, [_input_data] ; for the decompressor
++
++
++ ;; Clear the decompressors BSS (between _edata and _end)
++
++ moveq 0, r0
++ move.d _edata, r1
++ move.d _end, r2
++1: move.w r0, [r1+]
++ cmp.d r2, r1
++ bcs 1b
++ nop
++
++ ;; Save command line magic and address.
++ move.d _cmd_line_magic, $r12
++ move.d $r10, [$r12]
++ move.d _cmd_line_addr, $r12
++ move.d $r11, [$r12]
++
++ ;; Do the decompression and save compressed size in _inptr
++
++ jsr _decompress_kernel
++
++ ;; Put start address of root partition in r9 so the kernel can use it
++ ;; when mounting from flash
++
++ move.d [_input_data], r9 ; flash address of compressed kernel
++ add.d [_inptr], r9 ; size of compressed kernel
++
++ ;; Restore command line magic and address.
++ move.d _cmd_line_magic, $r10
++ move.d [$r10], $r10
++ move.d _cmd_line_addr, $r11
++ move.d [$r11], $r11
++
++ ;; Enter the decompressed kernel
++ move.d RAM_INIT_MAGIC, r8 ; Tell kernel that DRAM is initialized
++ jump 0x40004000 ; kernel is linked to this address
++
++ .data
++
++_input_data:
++ .dword 0 ; used by the decompressor
++_cmd_line_magic:
++ .dword 0
++_cmd_line_addr:
++ .dword 0
++#include "hw_settings_816.S"
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/head_832.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/head_832.S
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/head_832.S 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/head_832.S 2007-05-28 17:17:12.000000000 +0200
+@@ -0,0 +1,126 @@
++/*
++ * arch/cris/boot/compressed/head.S
++ *
++ * Copyright (C) 1999, 2001 Axis Communications AB
++ *
++ * Code that sets up the DRAM registers, calls the
++ * decompressor to unpack the piggybacked kernel, and jumps.
++ *
++ */
++
++#define ASSEMBLER_MACROS_ONLY
++#include <asm/arch/sv_addr_ag.h>
++
++#define RAM_INIT_MAGIC 0x56902387
++#define COMMAND_LINE_MAGIC 0x87109563
++
++ ;; Exported symbols
++
++ .globl _input_data
++
++
++ .text
++
++ nop
++ di
++
++;; We need to initialze DRAM registers before we start using the DRAM
++
++ cmp.d RAM_INIT_MAGIC, r8 ; Already initialized?
++ beq dram_init_finished
++ nop
++
++#include "dram_init_832.S"
++
++dram_init_finished:
++
++ ;; Initiate the PA and PB ports
++
++ move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA, r0
++ move.b r0, [R_PORT_PA_DATA]
++
++ move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR, r0
++ move.b r0, [R_PORT_PA_DIR]
++
++ move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA, r0
++ move.b r0, [R_PORT_PB_DATA]
++
++ move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR, r0
++ move.b r0, [R_PORT_PB_DIR]
++
++ ;; Setup the stack to a suitably high address.
++ ;; We assume 8 MB is the minimum DRAM in an eLinux
++ ;; product and put the sp at the top for now.
++
++ move.d 0x40800000, sp
++
++ ;; Figure out where the compressed piggyback image is
++ ;; in the flash (since we wont try to copy it to DRAM
++ ;; before unpacking). It is at _edata, but in flash.
++ ;; Use (_edata - basse) as offset to the current PC.
++
++basse: move.d pc, r5
++ and.d 0x7fffffff, r5 ; strip any non-cache bit
++ subq 2, r5 ; compensate for the move.d pc instr
++ move.d r5, r0 ; save for later - flash address of 'basse'
++ add.d _edata, r5
++ sub.d basse, r5 ; r5 = flash address of '_edata'
++
++ ;; Copy text+data to DRAM
++
++ move.d basse, r1 ; destination
++ move.d _edata, r2 ; end destination
++1: move.w [r0+], r3
++ move.w r3, [r1+]
++ cmp.d r2, r1
++ bcs 1b
++ nop
++
++ move.d r5, [_input_data] ; for the decompressor
++
++
++ ;; Clear the decompressors BSS (between _edata and _end)
++
++ moveq 0, r0
++ move.d _edata, r1
++ move.d _end, r2
++1: move.w r0, [r1+]
++ cmp.d r2, r1
++ bcs 1b
++ nop
++
++ ;; Save command line magic and address.
++ move.d _cmd_line_magic, $r12
++ move.d $r10, [$r12]
++ move.d _cmd_line_addr, $r12
++ move.d $r11, [$r12]
++
++ ;; Do the decompression and save compressed size in _inptr
++
++ jsr _decompress_kernel
++
++ ;; Put start address of root partition in r9 so the kernel can use it
++ ;; when mounting from flash
++
++ move.d [_input_data], r9 ; flash address of compressed kernel
++ add.d [_inptr], r9 ; size of compressed kernel
++
++ ;; Restore command line magic and address.
++ move.d _cmd_line_magic, $r10
++ move.d [$r10], $r10
++ move.d _cmd_line_addr, $r11
++ move.d [$r11], $r11
++
++ ;; Enter the decompressed kernel
++ move.d RAM_INIT_MAGIC, r8 ; Tell kernel that DRAM is initialized
++ jump 0x40004000 ; kernel is linked to this address
++
++ .data
++
++_input_data:
++ .dword 0 ; used by the decompressor
++_cmd_line_magic:
++ .dword 0
++_cmd_line_addr:
++ .dword 0
++#include "hw_settings_832.S"
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/head_MCM.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/head_MCM.S
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/head_MCM.S 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/head_MCM.S 2007-05-28 17:17:51.000000000 +0200
+@@ -0,0 +1,126 @@
++/*
++ * arch/cris/boot/compressed/head.S
++ *
++ * Copyright (C) 1999, 2001 Axis Communications AB
++ *
++ * Code that sets up the DRAM registers, calls the
++ * decompressor to unpack the piggybacked kernel, and jumps.
++ *
++ */
++
++#define ASSEMBLER_MACROS_ONLY
++#include <asm/arch/sv_addr_ag.h>
++
++#define RAM_INIT_MAGIC 0x56902387
++#define COMMAND_LINE_MAGIC 0x87109563
++
++ ;; Exported symbols
++
++ .globl _input_data
++
++
++ .text
++
++ nop
++ di
++
++;; We need to initialze DRAM registers before we start using the DRAM
++
++ cmp.d RAM_INIT_MAGIC, r8 ; Already initialized?
++ beq dram_init_finished
++ nop
++
++#include "dram_init_MCM.S"
++
++dram_init_finished:
++
++ ;; Initiate the PA and PB ports
++
++ move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA, r0
++ move.b r0, [R_PORT_PA_DATA]
++
++ move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR, r0
++ move.b r0, [R_PORT_PA_DIR]
++
++ move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA, r0
++ move.b r0, [R_PORT_PB_DATA]
++
++ move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR, r0
++ move.b r0, [R_PORT_PB_DIR]
++
++ ;; Setup the stack to a suitably high address.
++ ;; We assume 8 MB is the minimum DRAM in an eLinux
++ ;; product and put the sp at the top for now.
++
++ move.d 0x40800000, sp
++
++ ;; Figure out where the compressed piggyback image is
++ ;; in the flash (since we wont try to copy it to DRAM
++ ;; before unpacking). It is at _edata, but in flash.
++ ;; Use (_edata - basse) as offset to the current PC.
++
++basse: move.d pc, r5
++ and.d 0x7fffffff, r5 ; strip any non-cache bit
++ subq 2, r5 ; compensate for the move.d pc instr
++ move.d r5, r0 ; save for later - flash address of 'basse'
++ add.d _edata, r5
++ sub.d basse, r5 ; r5 = flash address of '_edata'
++
++ ;; Copy text+data to DRAM
++
++ move.d basse, r1 ; destination
++ move.d _edata, r2 ; end destination
++1: move.w [r0+], r3
++ move.w r3, [r1+]
++ cmp.d r2, r1
++ bcs 1b
++ nop
++
++ move.d r5, [_input_data] ; for the decompressor
++
++
++ ;; Clear the decompressors BSS (between _edata and _end)
++
++ moveq 0, r0
++ move.d _edata, r1
++ move.d _end, r2
++1: move.w r0, [r1+]
++ cmp.d r2, r1
++ bcs 1b
++ nop
++
++ ;; Save command line magic and address.
++ move.d _cmd_line_magic, $r12
++ move.d $r10, [$r12]
++ move.d _cmd_line_addr, $r12
++ move.d $r11, [$r12]
++
++ ;; Do the decompression and save compressed size in _inptr
++
++ jsr _decompress_kernel
++
++ ;; Put start address of root partition in r9 so the kernel can use it
++ ;; when mounting from flash
++
++ move.d [_input_data], r9 ; flash address of compressed kernel
++ add.d [_inptr], r9 ; size of compressed kernel
++
++ ;; Restore command line magic and address.
++ move.d _cmd_line_magic, $r10
++ move.d [$r10], $r10
++ move.d _cmd_line_addr, $r11
++ move.d [$r11], $r11
++
++ ;; Enter the decompressed kernel
++ move.d RAM_INIT_MAGIC, r8 ; Tell kernel that DRAM is initialized
++ jump 0x40004000 ; kernel is linked to this address
++
++ .data
++
++_input_data:
++ .dword 0 ; used by the decompressor
++_cmd_line_magic:
++ .dword 0
++_cmd_line_addr:
++ .dword 0
++#include "hw_settings_MCM.S"
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings.S
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings.S 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings.S 2007-05-28 17:14:14.000000000 +0200
+@@ -0,0 +1,62 @@
++/*
++ * $Id: hw_settings.S,v 1.1 2001/12/17 13:59:27 bjornw Exp $
++ *
++ * This table is used by some tools to extract hardware parameters.
++ * The table should be included in the kernel and the decompressor.
++ * Don't forget to update the tools if you change this table.
++ *
++ * Copyright (C) 2001 Axis Communications AB
++ *
++ * Authors: Mikael Starvik (starvik@axis.com)
++ */
++
++#define PA_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PA_DIR << 8) | \
++ (CONFIG_ETRAX_DEF_R_PORT_PA_DATA))
++#define PB_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG << 16) | \
++ (CONFIG_ETRAX_DEF_R_PORT_PB_DIR << 8) | \
++ (CONFIG_ETRAX_DEF_R_PORT_PB_DATA))
++
++ .ascii "HW_PARAM_MAGIC" ; Magic number
++ .dword 0xc0004000 ; Kernel start address
++
++ ; Debug port
++#ifdef CONFIG_ETRAX_DEBUG_PORT0
++ .dword 0
++#elif defined(CONFIG_ETRAX_DEBUG_PORT1)
++ .dword 1
++#elif defined(CONFIG_ETRAX_DEBUG_PORT2)
++ .dword 2
++#elif defined(CONFIG_ETRAX_DEBUG_PORT3)
++ .dword 3
++#else
++ .dword 4 ; No debug
++#endif
++
++ ; SDRAM or EDO DRAM?
++#ifdef CONFIG_ETRAX_SDRAM
++ .dword 1
++#else
++ .dword 0
++#endif
++
++ ; Register values
++ .dword R_WAITSTATES
++ .dword CONFIG_ETRAX_DEF_R_WAITSTATES
++ .dword R_BUS_CONFIG
++ .dword CONFIG_ETRAX_DEF_R_BUS_CONFIG
++#ifdef CONFIG_ETRAX_SDRAM
++ .dword R_SDRAM_CONFIG
++ .dword CONFIG_ETRAX_DEF_R_SDRAM_CONFIG
++ .dword R_SDRAM_TIMING
++ .dword CONFIG_ETRAX_DEF_R_SDRAM_TIMING
++#else
++ .dword R_DRAM_CONFIG
++ .dword CONFIG_ETRAX_DEF_R_DRAM_CONFIG
++ .dword R_DRAM_TIMING
++ .dword CONFIG_ETRAX_DEF_R_DRAM_TIMING
++#endif
++ .dword R_PORT_PA_SET
++ .dword PA_SET_VALUE
++ .dword R_PORT_PB_SET
++ .dword PB_SET_VALUE
++ .dword 0 ; No more register values
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_416.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_416.S
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_416.S 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_416.S 2007-05-28 20:12:02.000000000 +0200
+@@ -0,0 +1,62 @@
++/*
++ * $Id: hw_settings.S,v 1.1 2001/12/17 13:59:27 bjornw Exp $
++ *
++ * This table is used by some tools to extract hardware parameters.
++ * The table should be included in the kernel and the decompressor.
++ * Don't forget to update the tools if you change this table.
++ *
++ * Copyright (C) 2001 Axis Communications AB
++ *
++ * Authors: Mikael Starvik (starvik@axis.com)
++ */
++
++#define PA_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PA_DIR << 8) | \
++ (CONFIG_ETRAX_DEF_R_PORT_PA_DATA))
++#define PB_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG << 16) | \
++ (CONFIG_ETRAX_DEF_R_PORT_PB_DIR << 8) | \
++ (CONFIG_ETRAX_DEF_R_PORT_PB_DATA))
++
++ .ascii "HW_PARAM_MAGIC" ; Magic number
++ .dword 0xc0004000 ; Kernel start address
++
++ ; Debug port
++#ifdef CONFIG_ETRAX_DEBUG_PORT0
++ .dword 0
++#elif defined(CONFIG_ETRAX_DEBUG_PORT1)
++ .dword 1
++#elif defined(CONFIG_ETRAX_DEBUG_PORT2)
++ .dword 2
++#elif defined(CONFIG_ETRAX_DEBUG_PORT3)
++ .dword 3
++#else
++ .dword 4 ; No debug
++#endif
++
++ ; SDRAM or EDO DRAM?
++#ifdef CONFIG_ETRAX_SDRAM
++ .dword 1
++#else
++ .dword 0
++#endif
++
++ ; Register values
++ .dword R_WAITSTATES
++ .dword CONFIG_ETRAX_DEF_R_WAITSTATES
++ .dword R_BUS_CONFIG
++ .dword CONFIG_ETRAX_DEF_R_BUS_CONFIG
++#ifdef CONFIG_ETRAX_SDRAM
++ .dword R_SDRAM_CONFIG
++ .dword 0x09603636
++ .dword R_SDRAM_TIMING
++ .dword 0x80008002
++#else
++ .dword R_DRAM_CONFIG
++ .dword CONFIG_ETRAX_DEF_R_DRAM_CONFIG
++ .dword R_DRAM_TIMING
++ .dword CONFIG_ETRAX_DEF_R_DRAM_TIMING
++#endif
++ .dword R_PORT_PA_SET
++ .dword PA_SET_VALUE
++ .dword R_PORT_PB_SET
++ .dword PB_SET_VALUE
++ .dword 0 ; No more register values
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_816.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_816.S
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_816.S 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_816.S 2007-05-28 20:12:29.000000000 +0200
+@@ -0,0 +1,62 @@
++/*
++ * $Id: hw_settings.S,v 1.1 2001/12/17 13:59:27 bjornw Exp $
++ *
++ * This table is used by some tools to extract hardware parameters.
++ * The table should be included in the kernel and the decompressor.
++ * Don't forget to update the tools if you change this table.
++ *
++ * Copyright (C) 2001 Axis Communications AB
++ *
++ * Authors: Mikael Starvik (starvik@axis.com)
++ */
++
++#define PA_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PA_DIR << 8) | \
++ (CONFIG_ETRAX_DEF_R_PORT_PA_DATA))
++#define PB_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG << 16) | \
++ (CONFIG_ETRAX_DEF_R_PORT_PB_DIR << 8) | \
++ (CONFIG_ETRAX_DEF_R_PORT_PB_DATA))
++
++ .ascii "HW_PARAM_MAGIC" ; Magic number
++ .dword 0xc0004000 ; Kernel start address
++
++ ; Debug port
++#ifdef CONFIG_ETRAX_DEBUG_PORT0
++ .dword 0
++#elif defined(CONFIG_ETRAX_DEBUG_PORT1)
++ .dword 1
++#elif defined(CONFIG_ETRAX_DEBUG_PORT2)
++ .dword 2
++#elif defined(CONFIG_ETRAX_DEBUG_PORT3)
++ .dword 3
++#else
++ .dword 4 ; No debug
++#endif
++
++ ; SDRAM or EDO DRAM?
++#ifdef CONFIG_ETRAX_SDRAM
++ .dword 1
++#else
++ .dword 0
++#endif
++
++ ; Register values
++ .dword R_WAITSTATES
++ .dword CONFIG_ETRAX_DEF_R_WAITSTATES
++ .dword R_BUS_CONFIG
++ .dword CONFIG_ETRAX_DEF_R_BUS_CONFIG
++#ifdef CONFIG_ETRAX_SDRAM
++ .dword R_SDRAM_CONFIG
++ .dword 0x09603636
++ .dword R_SDRAM_TIMING
++ .dword 0x80008002
++#else
++ .dword R_DRAM_CONFIG
++ .dword CONFIG_ETRAX_DEF_R_DRAM_CONFIG
++ .dword R_DRAM_TIMING
++ .dword CONFIG_ETRAX_DEF_R_DRAM_TIMING
++#endif
++ .dword R_PORT_PA_SET
++ .dword PA_SET_VALUE
++ .dword R_PORT_PB_SET
++ .dword PB_SET_VALUE
++ .dword 0 ; No more register values
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_832.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_832.S
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_832.S 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_832.S 2007-05-28 20:12:55.000000000 +0200
+@@ -0,0 +1,62 @@
++/*
++ * $Id: hw_settings.S,v 1.1 2001/12/17 13:59:27 bjornw Exp $
++ *
++ * This table is used by some tools to extract hardware parameters.
++ * The table should be included in the kernel and the decompressor.
++ * Don't forget to update the tools if you change this table.
++ *
++ * Copyright (C) 2001 Axis Communications AB
++ *
++ * Authors: Mikael Starvik (starvik@axis.com)
++ */
++
++#define PA_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PA_DIR << 8) | \
++ (CONFIG_ETRAX_DEF_R_PORT_PA_DATA))
++#define PB_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG << 16) | \
++ (CONFIG_ETRAX_DEF_R_PORT_PB_DIR << 8) | \
++ (CONFIG_ETRAX_DEF_R_PORT_PB_DATA))
++
++ .ascii "HW_PARAM_MAGIC" ; Magic number
++ .dword 0xc0004000 ; Kernel start address
++
++ ; Debug port
++#ifdef CONFIG_ETRAX_DEBUG_PORT0
++ .dword 0
++#elif defined(CONFIG_ETRAX_DEBUG_PORT1)
++ .dword 1
++#elif defined(CONFIG_ETRAX_DEBUG_PORT2)
++ .dword 2
++#elif defined(CONFIG_ETRAX_DEBUG_PORT3)
++ .dword 3
++#else
++ .dword 4 ; No debug
++#endif
++
++ ; SDRAM or EDO DRAM?
++#ifdef CONFIG_ETRAX_SDRAM
++ .dword 1
++#else
++ .dword 0
++#endif
++
++ ; Register values
++ .dword R_WAITSTATES
++ .dword CONFIG_ETRAX_DEF_R_WAITSTATES
++ .dword R_BUS_CONFIG
++ .dword CONFIG_ETRAX_DEF_R_BUS_CONFIG
++#ifdef CONFIG_ETRAX_SDRAM
++ .dword R_SDRAM_CONFIG
++ .dword CONFIG_ETRAX_DEF_R_SDRAM_CONFIG
++ .dword R_SDRAM_TIMING
++ .dword CONFIG_ETRAX_DEF_R_SDRAM_TIMING
++#else
++ .dword R_DRAM_CONFIG
++ .dword 0x09603737
++ .dword R_DRAM_TIMING
++ .dword 0x80008002
++#endif
++ .dword R_PORT_PA_SET
++ .dword PA_SET_VALUE
++ .dword R_PORT_PB_SET
++ .dword PB_SET_VALUE
++ .dword 0 ; No more register values
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S 2007-05-28 20:11:31.000000000 +0200
+@@ -0,0 +1,62 @@
++/*
++ * $Id: hw_settings.S,v 1.1 2001/12/17 13:59:27 bjornw Exp $
++ *
++ * This table is used by some tools to extract hardware parameters.
++ * The table should be included in the kernel and the decompressor.
++ * Don't forget to update the tools if you change this table.
++ *
++ * Copyright (C) 2001 Axis Communications AB
++ *
++ * Authors: Mikael Starvik (starvik@axis.com)
++ */
++
++#define PA_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PA_DIR << 8) | \
++ (CONFIG_ETRAX_DEF_R_PORT_PA_DATA))
++#define PB_SET_VALUE ((CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG << 16) | \
++ (CONFIG_ETRAX_DEF_R_PORT_PB_DIR << 8) | \
++ (CONFIG_ETRAX_DEF_R_PORT_PB_DATA))
++
++ .ascii "HW_PARAM_MAGIC" ; Magic number
++ .dword 0xc0004000 ; Kernel start address
++
++ ; Debug port
++#ifdef CONFIG_ETRAX_DEBUG_PORT0
++ .dword 0
++#elif defined(CONFIG_ETRAX_DEBUG_PORT1)
++ .dword 1
++#elif defined(CONFIG_ETRAX_DEBUG_PORT2)
++ .dword 2
++#elif defined(CONFIG_ETRAX_DEBUG_PORT3)
++ .dword 3
++#else
++ .dword 4 ; No debug
++#endif
++
++ ; SDRAM or EDO DRAM?
++#ifdef CONFIG_ETRAX_SDRAM
++ .dword 1
++#else
++ .dword 0
++#endif
++
++ ; Register values
++ .dword R_WAITSTATES
++ .dword CONFIG_ETRAX_DEF_R_WAITSTATES
++ .dword R_BUS_CONFIG
++ .dword CONFIG_ETRAX_DEF_R_BUS_CONFIG
++#ifdef CONFIG_ETRAX_SDRAM
++ .dword R_SDRAM_CONFIG
++ .dword 0x09603636
++ .dword R_SDRAM_TIMING
++ .dword 0x80608002
++#else
++ .dword R_DRAM_CONFIG
++ .dword CONFIG_ETRAX_DEF_R_DRAM_CONFIG
++ .dword R_DRAM_TIMING
++ .dword CONFIG_ETRAX_DEF_R_DRAM_TIMING
++#endif
++ .dword R_PORT_PA_SET
++ .dword PA_SET_VALUE
++ .dword R_PORT_PB_SET
++ .dword PB_SET_VALUE
++ .dword 0 ; No more register values
--- /dev/null
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/misc.c linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/misc.c
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/misc.c 2007-05-28 21:53:52.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/misc.c 2007-05-28 22:23:16.000000000 +0200
+@@ -143,9 +143,10 @@
+ static void
+ puts(const char *s)
+ {
+-#ifndef CONFIG_ETRAX_DEBUG_PORT_NULL
+- while(*s) {
+-#ifdef CONFIG_ETRAX_DEBUG_PORT0
++#if defined(CONFIG_ETRAX_DEBUG_PORT0) || defined(CONFIG_ETRAX_DEBUG_PORT1) || defined(CONFIG_ETRAX_DEBUG_PORT2) || defined(CONFIG_ETRAX_DEBUG_PORT3) || defined(CONFIG_ETRAX_SERIAL_PORT0)
++
++while(*s) {
++#if defined(CONFIG_ETRAX_DEBUG_PORT0) || defined(CONFIG_ETRAX_SERIAL_PORT0)
+ while(!(*R_SERIAL0_STATUS & (1 << 5))) ;
+ *R_SERIAL0_TR_DATA = *s++;
+ #endif
+@@ -232,7 +233,7 @@
+ /* input_data is set in head.S */
+ inbuf = input_data;
+
+-#ifdef CONFIG_ETRAX_DEBUG_PORT0
++#if defined(CONFIG_ETRAX_DEBUG_PORT0) || defined(CONFIG_ETRAX_SERIAL_PORT0)
+ *R_SERIAL0_XOFF = 0;
+ *R_SERIAL0_BAUD = 0x99;
+ *R_SERIAL0_TR_CTRL = 0x40;
--- /dev/null
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/misc.c linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/misc.c
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/misc.c 2007-05-28 22:35:23.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/misc.c 2007-05-28 22:40:43.000000000 +0200
+@@ -266,8 +266,16 @@
+ puts("You need an ETRAX 100LX to run linux 2.6\n");
+ while(1);
+ }
++ puts("\r\n _ _ _ \r\n");
++ puts(" | | (_) | \r\n");
++ puts(" __ _ ___ _ __ ___ ___ ___ _ _ ___| |_ ___ _ __ ___ ___ _| |_\r\n");
++ puts(" / _` |/ __| '_ ` _ \\ / _ \\/ __| | | / __| __/ _ \\ '_ ` _ \\/ __| | | __|\r\n");
++ puts(" | (_| | (__| | | | | | __/\\__ \\ |_| \\__ \\ || __/ | | | | \\__ \\_| | |_ \r\n");
++ puts(" \\__,_|\\___|_| |_| |_|\\___||___/\\__, |___/\\__\\___|_| |_| |_|___(_)_|\\__|\r\n");
++ puts(" __/ | \r\n");
++ puts(" |___/ FOXBOARD @ www.acmesystems.it \r\n");
+
+- puts("Uncompressing Linux...\n");
++ puts("Uncompressing Linux...\r\n");
+ gunzip();
+- puts("Done. Now booting the kernel.\n");
++ puts("Done. Now booting the kernel.\r\n");
+ }
--- /dev/null
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/ds1302.c linux-2.6.19.2/arch/cris/arch-v10/drivers/ds1302.c
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/ds1302.c 2007-05-28 22:35:23.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/drivers/ds1302.c 2007-05-28 22:55:40.000000000 +0200
+@@ -21,7 +21,7 @@
+ #include <linux/delay.h>
+ #include <linux/bcd.h>
+ #include <linux/capability.h>
+-
++#include <linux/device.h>
+ #include <asm/uaccess.h>
+ #include <asm/system.h>
+ #include <asm/arch/svinto.h>
+@@ -480,6 +480,10 @@
+ return 0;
+ }
+
++#ifdef CONFIG_SYSFS
++static struct class *rtc_class;
++#endif
++
+ static int __init ds1302_register(void)
+ {
+ ds1302_init();
+@@ -488,7 +492,15 @@
+ ds1302_name, RTC_MAJOR_NR);
+ return -1;
+ }
+- return 0;
++
++ #ifdef CONFIG_SYSFS
++ rtc_class = class_create(THIS_MODULE, "rtc");
++ class_device_create(rtc_class, NULL,
++ MKDEV(RTC_MAJOR_NR, 0),
++ NULL, "rtc");
++ #endif
++
++ return 0;
+
+ }
+
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/eeprom.c linux-2.6.19.2/arch/cris/arch-v10/drivers/eeprom.c
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/eeprom.c 2007-05-28 22:35:23.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/drivers/eeprom.c 2007-05-28 23:03:45.000000000 +0200
+@@ -103,6 +103,7 @@
+ #include <linux/delay.h>
+ #include <linux/interrupt.h>
+ #include <linux/wait.h>
++#include <linux/device.h>
+ #include <asm/uaccess.h>
+ #include "i2c.h"
+
+@@ -185,6 +186,9 @@
+ };
+
+ /* eeprom init call. Probes for different eeprom models. */
++#ifdef CONFIG_SYSFS
++static struct class *eep_class;
++#endif
+
+ int __init eeprom_init(void)
+ {
+@@ -202,7 +206,13 @@
+ eeprom_name, EEPROM_MAJOR_NR);
+ return -1;
+ }
+-
++
++#ifdef CONFIG_SYSFS
++ eep_class = class_create(THIS_MODULE, "eep");
++ class_device_create(eep_class, NULL, MKDEV(EEPROM_MAJOR, 0), NULL, "eeprom");
++#endif
++
++
+ printk("EEPROM char device v0.3, (c) 2000 Axis Communications AB\n");
+
+ /*
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/gpio.c linux-2.6.19.2/arch/cris/arch-v10/drivers/gpio.c
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/gpio.c 2007-05-28 22:35:23.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/drivers/gpio.c 2007-05-28 22:59:27.000000000 +0200
+@@ -181,6 +181,7 @@
+ #include <linux/poll.h>
+ #include <linux/init.h>
+ #include <linux/interrupt.h>
++#include <linux/device.h>
+
+ #include <asm/etraxgpio.h>
+ #include <asm/arch/svinto.h>
+@@ -938,6 +939,10 @@
+
+ /* main driver initialization routine, called from mem.c */
+
++#ifdef CONFIG_SYSFS
++static struct class *gpio_class;
++#endif
++
+ static __init int
+ gpio_init(void)
+ {
+@@ -955,6 +960,14 @@
+ return res;
+ }
+
++#ifdef CONFIG_SYSFS
++ gpio_class = class_create(THIS_MODULE, "gpio");
++ class_device_create(gpio_class, NULL, MKDEV(GPIO_MAJOR, 0), NULL, "gpioa");
++ class_device_create(gpio_class, NULL, MKDEV(GPIO_MAJOR, 1), NULL, "gpiob");
++ class_device_create(gpio_class, NULL, MKDEV(GPIO_MAJOR, 2), NULL, "leds");
++ class_device_create(gpio_class, NULL, MKDEV(GPIO_MAJOR, 3), NULL, "gpiog");
++#endif
++
+ /* Clear all leds */
+ #if defined (CONFIG_ETRAX_CSP0_LEDS) || defined (CONFIG_ETRAX_PA_LEDS) || defined (CONFIG_ETRAX_PB_LEDS)
+ LED_NETWORK_SET(0);
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/pcf8563.c linux-2.6.19.2/arch/cris/arch-v10/drivers/pcf8563.c
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/pcf8563.c 2007-05-28 22:35:23.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/drivers/pcf8563.c 2007-05-28 23:09:02.000000000 +0200
+@@ -26,6 +26,7 @@
+ #include <linux/ioctl.h>
+ #include <linux/delay.h>
+ #include <linux/bcd.h>
++#include <linux/device.h>
+
+ #include <asm/uaccess.h>
+ #include <asm/system.h>
+@@ -344,6 +345,10 @@
+ return 0;
+ }
+
++#ifdef CONFIG_SYSFS
++static struct class *pcf8563_class;
++#endif
++
+ static int __init
+ pcf8563_register(void)
+ {
+@@ -358,6 +363,10 @@
+ "device.\n", PCF8563_NAME, PCF8563_MAJOR);
+ return -1;
+ }
++#ifdef CONFIG_SYSFS
++ pcf8563_class = class_create(THIS_MODULE, "pcf8563");
++ class_device_create(pcf8563_class, NULL, MKDEV(PCF8563_MAJOR, 0), NULL, "rtc");
++#endif
+
+ printk(KERN_INFO "%s Real-Time Clock Driver, %s\n", PCF8563_NAME,
+ DRIVER_VERSION);
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/sync_serial.c linux-2.6.19.2/arch/cris/arch-v10/drivers/sync_serial.c
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/sync_serial.c 2007-05-28 22:35:23.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/drivers/sync_serial.c 2007-05-28 23:06:41.000000000 +0200
+@@ -29,6 +29,8 @@
+ #include <asm/uaccess.h>
+ #include <asm/system.h>
+ #include <asm/sync_serial.h>
++#include <linux/device.h>
++
+ #include <asm/arch/io_interface_mux.h>
+
+ /* The receiver is a bit tricky beacuse of the continuous stream of data.*/
+@@ -241,6 +243,9 @@
+ .open = sync_serial_open,
+ .release = sync_serial_release
+ };
++#ifdef CONFIG_SYSFS
++static struct class *syncser_class;
++#endif
+
+ static int __init etrax_sync_serial_init(void)
+ {
+@@ -274,6 +279,11 @@
+ printk("unable to get major for synchronous serial port\n");
+ return -EBUSY;
+ }
++#ifdef CONFIG_SYSFS
++ syncser_class = class_create(THIS_MODULE, "syncser");
++ class_device_create(syncser_class, NULL, MKDEV(SYNC_SERIAL_MAJOR, 0), NULL, "syncser0");
++ class_device_create(syncser_class, NULL, MKDEV(SYNC_SERIAL_MAJOR, 1), NULL, "syncser1");
++#endif
+
+ /* Deselect synchronous serial ports while configuring. */
+ SETS(gen_config_ii_shadow, R_GEN_CONFIG_II, sermode1, async);
--- /dev/null
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings.S
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings.S 2007-05-29 23:30:35.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings.S 2007-05-29 23:33:44.000000000 +0200
+@@ -60,3 +60,5 @@
+ .dword R_PORT_PB_SET
+ .dword PB_SET_VALUE
+ .dword 0 ; No more register values
++ .ascii "ACME_PART_MAGIC" ; Magic number
++ .dword 0xdeadc0de
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_416.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_416.S
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_416.S 2007-05-29 23:30:35.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_416.S 2007-05-29 23:33:44.000000000 +0200
+@@ -60,3 +60,5 @@
+ .dword R_PORT_PB_SET
+ .dword PB_SET_VALUE
+ .dword 0 ; No more register values
++ .ascii "ACME_PART_MAGIC" ; Magic number
++ .dword 0xdeadc0de
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_816.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_816.S
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_816.S 2007-05-29 23:30:35.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_816.S 2007-05-29 23:33:44.000000000 +0200
+@@ -60,3 +60,5 @@
+ .dword R_PORT_PB_SET
+ .dword PB_SET_VALUE
+ .dword 0 ; No more register values
++ .ascii "ACME_PART_MAGIC" ; Magic number
++ .dword 0xdeadc0de
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_832.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_832.S
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_832.S 2007-05-29 23:30:35.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_832.S 2007-05-29 23:33:44.000000000 +0200
+@@ -60,3 +60,5 @@
+ .dword R_PORT_PB_SET
+ .dword PB_SET_VALUE
+ .dword 0 ; No more register values
++ .ascii "ACME_PART_MAGIC" ; Magic number
++ .dword 0xdeadc0de
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S 2007-05-29 23:30:35.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S 2007-05-29 23:33:44.000000000 +0200
+@@ -60,3 +60,5 @@
+ .dword R_PORT_PB_SET
+ .dword PB_SET_VALUE
+ .dword 0 ; No more register values
++ .ascii "ACME_PART_MAGIC" ; Magic number
++ .dword 0xdeadc0de
+diff -urN linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/axisflashmap.c linux-2.6.19.2/arch/cris/arch-v10/drivers/axisflashmap.c
+--- linux-2.6.19.2.orig/arch/cris/arch-v10/drivers/axisflashmap.c 2007-05-29 23:30:36.000000000 +0200
++++ linux-2.6.19.2/arch/cris/arch-v10/drivers/axisflashmap.c 2007-05-29 23:36:31.000000000 +0200
+@@ -421,6 +421,11 @@
+ struct partitiontable_entry *ptable;
+ int use_default_ptable = 1; /* Until proven otherwise. */
+ const char pmsg[] = " /dev/flash%d at 0x%08x, size 0x%08x\n";
++ unsigned int kernel_part_size = 0;
++ unsigned char *flash_mem = (unsigned char*)(FLASH_CACHED_ADDR);
++ unsigned int flash_scan_count = 0;
++ const char *part_magic = "ACME_PART_MAGIC";
++ unsigned int magic_len = strlen(part_magic);
+
+ if (!(mymtd = flash_probe())) {
+ /* There's no reason to use this module if no flash chip can
+@@ -432,6 +437,32 @@
+ mymtd->name, mymtd->size);
+ axisflash_mtd = mymtd;
+ }
++ /* scan flash to findout where out partition starts */
++
++ printk(KERN_INFO "Scanning flash for end of kernel magic\n");
++ for(flash_scan_count = 0; flash_scan_count < 100000; flash_scan_count++){
++ if(strncmp(&flash_mem[flash_scan_count], part_magic, magic_len - 1) == 0){
++ //printk(KERN_INFO "Found end of kernel magic at 0x%.08X\n", flash_scan_count);
++ kernel_part_size = flash_mem[flash_scan_count + magic_len ];
++ kernel_part_size <<= 8;
++ kernel_part_size += flash_mem[flash_scan_count + magic_len + 2];
++ kernel_part_size <<= 8;
++ kernel_part_size += flash_mem[flash_scan_count + magic_len + 1];
++ kernel_part_size <<= 8;
++ kernel_part_size += flash_mem[flash_scan_count + magic_len + 3];
++ printk(KERN_INFO "Kernel ends at 0x%.08X\n", kernel_part_size);
++ flash_scan_count = 1100000;
++ }
++ }
++
++
++ if(kernel_part_size){
++ kernel_part_size = (kernel_part_size & 0xffff0000);
++ //printk(KERN_INFO "Configuring partition sizes total flash 0x%.08X - kernel 0x%.08X - rootfs 0x%.08X\n", mymtd->size, kernel_part_size, mymtd->size - kernel_part_size);
++ axis_default_partitions[0].size = kernel_part_size;
++ axis_default_partitions[1].size = mymtd->size - axis_default_partitions[0].size;
++ axis_default_partitions[1].offset = axis_default_partitions[0].size;
++ }
+
+ if (mymtd) {
+ mymtd->owner = THIS_MODULE;
+@@ -527,7 +558,7 @@
+
+ if (mymtd) {
+ if (use_default_ptable) {
+- printk(KERN_INFO " Using default partition table.\n");
++ printk(KERN_INFO " Using ACME partition table.\n");
+ err = add_mtd_partitions(mymtd, axis_default_partitions,
+ NUM_DEFAULT_PARTITIONS);
+ } else {
--- /dev/null
+diff -urN linux-2.6.19.2.orig/drivers/mtd/chips/cfi_cmdset_0002.c linux-2.6.19.2/drivers/mtd/chips/cfi_cmdset_0002.c
+--- linux-2.6.19.2.orig/drivers/mtd/chips/cfi_cmdset_0002.c 2007-05-30 21:23:01.000000000 +0200
++++ linux-2.6.19.2/drivers/mtd/chips/cfi_cmdset_0002.c 2007-05-30 21:38:13.000000000 +0200
+@@ -291,8 +291,7 @@
+ kfree(mtd);
+ return NULL;
+ }
+-
+- if (extp->MajorVersion != '1' ||
++ if (extp->MajorVersion < '0' || extp->MajorVersion > '3' ||
+ (extp->MinorVersion < '0' || extp->MinorVersion > '4')) {
+ if (cfi->mfr == MANUFACTURER_SAMSUNG &&
+ (extp->MajorVersion == '3' && extp->MinorVersion == '3')) {
--- /dev/null
+diff -urN linux-2.6.19.2//arch/cris/arch-v10/boot/compressed/hw_settings.S /tmp/linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings.S
+--- linux-2.6.19.2//arch/cris/arch-v10/boot/compressed/hw_settings.S 2007-06-01 00:37:57.000000000 +0200
++++ /tmp/linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings.S 2007-06-01 00:34:55.000000000 +0200
+@@ -62,3 +62,5 @@
+ .dword 0 ; No more register values
+ .ascii "ACME_PART_MAGIC" ; Magic number
+ .dword 0xdeadc0de
++ .ascii "ACME_RAM_MAGIC" ; Magic number
++ .dword 0x2000000
+diff -urN linux-2.6.19.2//arch/cris/arch-v10/boot/compressed/hw_settings_416.S /tmp/linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_416.S
+--- linux-2.6.19.2//arch/cris/arch-v10/boot/compressed/hw_settings_416.S 2007-06-01 00:37:57.000000000 +0200
++++ /tmp/linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_416.S 2007-06-01 00:34:55.000000000 +0200
+@@ -62,3 +62,5 @@
+ .dword 0 ; No more register values
+ .ascii "ACME_PART_MAGIC" ; Magic number
+ .dword 0xdeadc0de
++ .ascii "ACME_RAM_MAGIC" ; Magic number
++ .dword 0x1000000
+diff -urN linux-2.6.19.2//arch/cris/arch-v10/boot/compressed/hw_settings_816.S /tmp/linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_816.S
+--- linux-2.6.19.2//arch/cris/arch-v10/boot/compressed/hw_settings_816.S 2007-06-01 00:37:57.000000000 +0200
++++ /tmp/linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_816.S 2007-06-01 00:34:55.000000000 +0200
+@@ -62,3 +62,5 @@
+ .dword 0 ; No more register values
+ .ascii "ACME_PART_MAGIC" ; Magic number
+ .dword 0xdeadc0de
++ .ascii "ACME_RAM_MAGIC" ; Magic number
++ .dword 0x1000000
+diff -urN linux-2.6.19.2//arch/cris/arch-v10/boot/compressed/hw_settings_832.S /tmp/linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_832.S
+--- linux-2.6.19.2//arch/cris/arch-v10/boot/compressed/hw_settings_832.S 2007-06-01 00:37:57.000000000 +0200
++++ /tmp/linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_832.S 2007-06-01 00:34:55.000000000 +0200
+@@ -62,3 +62,5 @@
+ .dword 0 ; No more register values
+ .ascii "ACME_PART_MAGIC" ; Magic number
+ .dword 0xdeadc0de
++ .ascii "ACME_RAM_MAGIC" ; Magic number
++ .dword 0x2000000
+diff -urN linux-2.6.19.2//arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S /tmp/linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S
+--- linux-2.6.19.2//arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S 2007-06-01 00:37:57.000000000 +0200
++++ /tmp/linux-2.6.19.2/arch/cris/arch-v10/boot/compressed/hw_settings_MCM.S 2007-06-01 00:34:55.000000000 +0200
+@@ -62,3 +62,5 @@
+ .dword 0 ; No more register values
+ .ascii "ACME_PART_MAGIC" ; Magic number
+ .dword 0xdeadc0de
++ .ascii "ACME_RAM_MAGIC" ; Magic number
++ .dword 0x1000000
+--- linux-2.6.19.2//arch/cris/kernel/setup.c 2007-06-01 00:37:55.000000000 +0200
++++ /tmp/linux-2.6.19.2/arch/cris/kernel/setup.c 2007-06-01 00:34:55.000000000 +0200
+@@ -55,6 +55,13 @@
+ * boot code and the system.
+ *
+ */
++#ifdef CONFIG_CRIS_LOW_MAP
++#define FLASH_UNCACHED_ADDR KSEG_8
++#define FLASH_CACHED_ADDR KSEG_5
++#else
++#define FLASH_UNCACHED_ADDR KSEG_E
++#define FLASH_CACHED_ADDR KSEG_F
++#endif
+
+ void __init
+ setup_arch(char **cmdline_p)
+@@ -63,15 +70,37 @@
+ unsigned long bootmap_size;
+ unsigned long start_pfn, max_pfn;
+ unsigned long memory_start;
+-
++ unsigned int ram_size = 0;
++ unsigned char *flash_mem = (unsigned char*)(FLASH_CACHED_ADDR);
++ unsigned int ram_scan_count = 0;
++ const char *ram_magic = "ACME_RAM_MAGIC";
++ unsigned int magic_len = strlen(ram_magic);
++ unsigned long dend;
+ /* register an initial console printing routine for printk's */
+
+ init_etrax_debug();
+
+ /* we should really poll for DRAM size! */
++ printk(KERN_INFO "Determinig RAM size\n");
++ for(ram_scan_count = 0; ram_scan_count < 100000; ram_scan_count++){
++ if(strncmp(&flash_mem[ram_scan_count], ram_magic, magic_len - 1) == 0){
++ ram_size = flash_mem[ram_scan_count + magic_len ];
++ ram_size <<= 8;
++ ram_size += flash_mem[ram_scan_count + magic_len + 2];
++ ram_size <<= 8;
++ ram_size += flash_mem[ram_scan_count + magic_len + 1];
++ ram_size <<= 8;
++ ram_size += flash_mem[ram_scan_count + magic_len + 3];
++ printk(KERN_INFO "RAM size is %uMB\n", 16 * ram_size);
++ ram_scan_count = 1100000;
++ }
++ }
+
+ high_memory = &dram_end;
+-
++ dend = dram_start + 16 * 1024 * 1024 * ram_size;
++ if(ram_size == 1){
++ high_memory = 0xc1000000;
++ }
+ if(romfs_in_flash || !romfs_length) {
+ /* if we have the romfs in flash, or if there is no rom filesystem,
+ * our free area starts directly after the BSS
--- /dev/null
+diff -urN linux-2.6.19.old/fs/Kconfig linux-2.6.19.dev/fs/Kconfig
+--- linux-2.6.19.old/fs/Kconfig 2006-12-14 03:13:16.000000000 +0100
++++ linux-2.6.19.dev/fs/Kconfig 2006-12-14 03:13:16.000000000 +0100
+@@ -1457,6 +1457,71 @@
+
+ If unsure, say N.
+
++config SQUASHFS
++ tristate "SquashFS 3.0 - Squashed file system support"
++ select ZLIB_INFLATE
++ help
++ Saying Y here includes support for SquashFS 3.0 (a Compressed Read-Only File
++ System). Squashfs is a highly compressed read-only filesystem for Linux.
++ It uses zlib compression to compress both files, inodes and directories.
++ Inodes in the system are very small and all blocks are packed to minimise
++ data overhead. Block sizes greater than 4K are supported up to a maximum of 64K.
++ SquashFS 3.0 supports 64 bit filesystems and files (larger than 4GB), full
++ uid/gid information, hard links and timestamps.
++
++ Squashfs is intended for general read-only filesystem use, for archival
++ use (i.e. in cases where a .tar.gz file may be used), and in embedded
++ systems where low overhead is needed. Further information and filesystem tools
++ are available from http://squashfs.sourceforge.net.
++
++ If you want to compile this as a module ( = code which can be
++ inserted in and removed from the running kernel whenever you want),
++ say M here and read <file:Documentation/modules.txt>. The module
++ will be called squashfs. Note that the root file system (the one
++ containing the directory /) cannot be compiled as a module.
++
++ If unsure, say N.
++
++config SQUASHFS_EMBEDDED
++
++ bool "Additional options for memory-constrained systems"
++ depends on SQUASHFS
++ default n
++ help
++ Saying Y here allows you to specify cache sizes and how Squashfs
++ allocates memory. This is only intended for memory constrained
++ systems.
++
++ If unsure, say N.
++
++config SQUASHFS_FRAGMENT_CACHE_SIZE
++ int "Number of fragments cached" if SQUASHFS_EMBEDDED
++ depends on SQUASHFS
++ default "3"
++ help
++ By default SquashFS caches the last 3 fragments read from
++ the filesystem. Increasing this amount may mean SquashFS
++ has to re-read fragments less often from disk, at the expense
++ of extra system memory. Decreasing this amount will mean
++ SquashFS uses less memory at the expense of extra reads from disk.
++
++ Note there must be at least one cached fragment. Anything
++ much more than three will probably not make much difference.
++
++config SQUASHFS_VMALLOC
++ bool "Use Vmalloc rather than Kmalloc" if SQUASHFS_EMBEDDED
++ depends on SQUASHFS
++ default n
++ help
++ By default SquashFS uses kmalloc to obtain fragment cache memory.
++ Kmalloc memory is the standard kernel allocator, but it can fail
++ on memory constrained systems. Because of the way Vmalloc works,
++ Vmalloc can succeed when kmalloc fails. Specifying this option
++ will make SquashFS always use Vmalloc to allocate the
++ fragment cache memory.
++
++ If unsure, say N.
++
+ config VXFS_FS
+ tristate "FreeVxFS file system support (VERITAS VxFS(TM) compatible)"
+ depends on BLOCK
+diff -urN linux-2.6.19.old/fs/Makefile linux-2.6.19.dev/fs/Makefile
+--- linux-2.6.19.old/fs/Makefile 2006-12-14 03:13:16.000000000 +0100
++++ linux-2.6.19.dev/fs/Makefile 2006-12-14 03:13:16.000000000 +0100
+@@ -67,6 +67,7 @@
+ obj-$(CONFIG_JBD2) += jbd2/
+ obj-$(CONFIG_EXT2_FS) += ext2/
+ obj-$(CONFIG_CRAMFS) += cramfs/
++obj-$(CONFIG_SQUASHFS) += squashfs/
+ obj-$(CONFIG_RAMFS) += ramfs/
+ obj-$(CONFIG_HUGETLBFS) += hugetlbfs/
+ obj-$(CONFIG_CODA_FS) += coda/
+diff -urN linux-2.6.19.old/fs/squashfs/inode.c linux-2.6.19.dev/fs/squashfs/inode.c
+--- linux-2.6.19.old/fs/squashfs/inode.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/fs/squashfs/inode.c 2006-12-14 03:13:16.000000000 +0100
+@@ -0,0 +1,2124 @@
++/*
++ * Squashfs - a compressed read only filesystem for Linux
++ *
++ * Copyright (c) 2002, 2003, 2004, 2005, 2006
++ * Phillip Lougher <phillip@lougher.org.uk>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2,
++ * or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
++ *
++ * inode.c
++ */
++
++#include <linux/types.h>
++#include <linux/squashfs_fs.h>
++#include <linux/module.h>
++#include <linux/errno.h>
++#include <linux/slab.h>
++#include <linux/fs.h>
++#include <linux/smp_lock.h>
++#include <linux/slab.h>
++#include <linux/squashfs_fs_sb.h>
++#include <linux/squashfs_fs_i.h>
++#include <linux/buffer_head.h>
++#include <linux/vfs.h>
++#include <linux/init.h>
++#include <linux/dcache.h>
++#include <linux/wait.h>
++#include <linux/zlib.h>
++#include <linux/blkdev.h>
++#include <linux/vmalloc.h>
++#include <asm/uaccess.h>
++#include <asm/semaphore.h>
++
++#include "squashfs.h"
++
++static void squashfs_put_super(struct super_block *);
++static int squashfs_statfs(struct dentry *, struct kstatfs *);
++static int squashfs_symlink_readpage(struct file *file, struct page *page);
++static int squashfs_readpage(struct file *file, struct page *page);
++static int squashfs_readpage4K(struct file *file, struct page *page);
++static int squashfs_readdir(struct file *, void *, filldir_t);
++static struct inode *squashfs_alloc_inode(struct super_block *sb);
++static void squashfs_destroy_inode(struct inode *inode);
++static int init_inodecache(void);
++static void destroy_inodecache(void);
++static struct dentry *squashfs_lookup(struct inode *, struct dentry *,
++ struct nameidata *);
++static struct inode *squashfs_iget(struct super_block *s, squashfs_inode_t inode);
++static long long read_blocklist(struct inode *inode, int index,
++ int readahead_blks, char *block_list,
++ unsigned short **block_p, unsigned int *bsize);
++static int squashfs_get_sb(struct file_system_type *, int,
++ const char *, void *, struct vfsmount *);
++
++
++static z_stream stream;
++
++static struct file_system_type squashfs_fs_type = {
++ .owner = THIS_MODULE,
++ .name = "squashfs",
++ .get_sb = squashfs_get_sb,
++ .kill_sb = kill_block_super,
++ .fs_flags = FS_REQUIRES_DEV
++};
++
++static unsigned char squashfs_filetype_table[] = {
++ DT_UNKNOWN, DT_DIR, DT_REG, DT_LNK, DT_BLK, DT_CHR, DT_FIFO, DT_SOCK
++};
++
++static struct super_operations squashfs_ops = {
++ .alloc_inode = squashfs_alloc_inode,
++ .destroy_inode = squashfs_destroy_inode,
++ .statfs = squashfs_statfs,
++ .put_super = squashfs_put_super,
++};
++
++SQSH_EXTERN struct address_space_operations squashfs_symlink_aops = {
++ .readpage = squashfs_symlink_readpage
++};
++
++SQSH_EXTERN struct address_space_operations squashfs_aops = {
++ .readpage = squashfs_readpage
++};
++
++SQSH_EXTERN struct address_space_operations squashfs_aops_4K = {
++ .readpage = squashfs_readpage4K
++};
++
++static struct file_operations squashfs_dir_ops = {
++ .read = generic_read_dir,
++ .readdir = squashfs_readdir
++};
++
++SQSH_EXTERN struct inode_operations squashfs_dir_inode_ops = {
++ .lookup = squashfs_lookup
++};
++
++
++static struct buffer_head *get_block_length(struct super_block *s,
++ int *cur_index, int *offset, int *c_byte)
++{
++ struct squashfs_sb_info *msblk = s->s_fs_info;
++ unsigned short temp;
++ struct buffer_head *bh;
++
++ if (!(bh = sb_bread(s, *cur_index)))
++ goto out;
++
++ if (msblk->devblksize - *offset == 1) {
++ if (msblk->swap)
++ ((unsigned char *) &temp)[1] = *((unsigned char *)
++ (bh->b_data + *offset));
++ else
++ ((unsigned char *) &temp)[0] = *((unsigned char *)
++ (bh->b_data + *offset));
++ brelse(bh);
++ if (!(bh = sb_bread(s, ++(*cur_index))))
++ goto out;
++ if (msblk->swap)
++ ((unsigned char *) &temp)[0] = *((unsigned char *)
++ bh->b_data);
++ else
++ ((unsigned char *) &temp)[1] = *((unsigned char *)
++ bh->b_data);
++ *c_byte = temp;
++ *offset = 1;
++ } else {
++ if (msblk->swap) {
++ ((unsigned char *) &temp)[1] = *((unsigned char *)
++ (bh->b_data + *offset));
++ ((unsigned char *) &temp)[0] = *((unsigned char *)
++ (bh->b_data + *offset + 1));
++ } else {
++ ((unsigned char *) &temp)[0] = *((unsigned char *)
++ (bh->b_data + *offset));
++ ((unsigned char *) &temp)[1] = *((unsigned char *)
++ (bh->b_data + *offset + 1));
++ }
++ *c_byte = temp;
++ *offset += 2;
++ }
++
++ if (SQUASHFS_CHECK_DATA(msblk->sblk.flags)) {
++ if (*offset == msblk->devblksize) {
++ brelse(bh);
++ if (!(bh = sb_bread(s, ++(*cur_index))))
++ goto out;
++ *offset = 0;
++ }
++ if (*((unsigned char *) (bh->b_data + *offset)) !=
++ SQUASHFS_MARKER_BYTE) {
++ ERROR("Metadata block marker corrupt @ %x\n",
++ *cur_index);
++ brelse(bh);
++ goto out;
++ }
++ (*offset)++;
++ }
++ return bh;
++
++out:
++ return NULL;
++}
++
++
++SQSH_EXTERN unsigned int squashfs_read_data(struct super_block *s, char *buffer,
++ long long index, unsigned int length,
++ long long *next_index)
++{
++ struct squashfs_sb_info *msblk = s->s_fs_info;
++ struct buffer_head *bh[((SQUASHFS_FILE_MAX_SIZE - 1) >>
++ msblk->devblksize_log2) + 2];
++ unsigned int offset = index & ((1 << msblk->devblksize_log2) - 1);
++ unsigned int cur_index = index >> msblk->devblksize_log2;
++ int bytes, avail_bytes, b = 0, k;
++ char *c_buffer;
++ unsigned int compressed;
++ unsigned int c_byte = length;
++
++ if (c_byte) {
++ bytes = msblk->devblksize - offset;
++ compressed = SQUASHFS_COMPRESSED_BLOCK(c_byte);
++ c_buffer = compressed ? msblk->read_data : buffer;
++ c_byte = SQUASHFS_COMPRESSED_SIZE_BLOCK(c_byte);
++
++ TRACE("Block @ 0x%llx, %scompressed size %d\n", index, compressed
++ ? "" : "un", (unsigned int) c_byte);
++
++ if (!(bh[0] = sb_getblk(s, cur_index)))
++ goto block_release;
++
++ for (b = 1; bytes < c_byte; b++) {
++ if (!(bh[b] = sb_getblk(s, ++cur_index)))
++ goto block_release;
++ bytes += msblk->devblksize;
++ }
++ ll_rw_block(READ, b, bh);
++ } else {
++ if (!(bh[0] = get_block_length(s, &cur_index, &offset,
++ &c_byte)))
++ goto read_failure;
++
++ bytes = msblk->devblksize - offset;
++ compressed = SQUASHFS_COMPRESSED(c_byte);
++ c_buffer = compressed ? msblk->read_data : buffer;
++ c_byte = SQUASHFS_COMPRESSED_SIZE(c_byte);
++
++ TRACE("Block @ 0x%llx, %scompressed size %d\n", index, compressed
++ ? "" : "un", (unsigned int) c_byte);
++
++ for (b = 1; bytes < c_byte; b++) {
++ if (!(bh[b] = sb_getblk(s, ++cur_index)))
++ goto block_release;
++ bytes += msblk->devblksize;
++ }
++ ll_rw_block(READ, b - 1, bh + 1);
++ }
++
++ if (compressed)
++ down(&msblk->read_data_mutex);
++
++ for (bytes = 0, k = 0; k < b; k++) {
++ avail_bytes = (c_byte - bytes) > (msblk->devblksize - offset) ?
++ msblk->devblksize - offset :
++ c_byte - bytes;
++ wait_on_buffer(bh[k]);
++ if (!buffer_uptodate(bh[k]))
++ goto block_release;
++ memcpy(c_buffer + bytes, bh[k]->b_data + offset, avail_bytes);
++ bytes += avail_bytes;
++ offset = 0;
++ brelse(bh[k]);
++ }
++
++ /*
++ * uncompress block
++ */
++ if (compressed) {
++ int zlib_err;
++
++ stream.next_in = c_buffer;
++ stream.avail_in = c_byte;
++ stream.next_out = buffer;
++ stream.avail_out = msblk->read_size;
++
++ if (((zlib_err = zlib_inflateInit(&stream)) != Z_OK) ||
++ ((zlib_err = zlib_inflate(&stream, Z_FINISH))
++ != Z_STREAM_END) || ((zlib_err =
++ zlib_inflateEnd(&stream)) != Z_OK)) {
++ ERROR("zlib_fs returned unexpected result 0x%x\n",
++ zlib_err);
++ bytes = 0;
++ } else
++ bytes = stream.total_out;
++
++ up(&msblk->read_data_mutex);
++ }
++
++ if (next_index)
++ *next_index = index + c_byte + (length ? 0 :
++ (SQUASHFS_CHECK_DATA(msblk->sblk.flags)
++ ? 3 : 2));
++ return bytes;
++
++block_release:
++ while (--b >= 0)
++ brelse(bh[b]);
++
++read_failure:
++ ERROR("sb_bread failed reading block 0x%x\n", cur_index);
++ return 0;
++}
++
++
++SQSH_EXTERN int squashfs_get_cached_block(struct super_block *s, char *buffer,
++ long long block, unsigned int offset,
++ int length, long long *next_block,
++ unsigned int *next_offset)
++{
++ struct squashfs_sb_info *msblk = s->s_fs_info;
++ int n, i, bytes, return_length = length;
++ long long next_index;
++
++ TRACE("Entered squashfs_get_cached_block [%llx:%x]\n", block, offset);
++
++ while ( 1 ) {
++ for (i = 0; i < SQUASHFS_CACHED_BLKS; i++)
++ if (msblk->block_cache[i].block == block)
++ break;
++
++ down(&msblk->block_cache_mutex);
++
++ if (i == SQUASHFS_CACHED_BLKS) {
++ /* read inode header block */
++ for (i = msblk->next_cache, n = SQUASHFS_CACHED_BLKS;
++ n ; n --, i = (i + 1) %
++ SQUASHFS_CACHED_BLKS)
++ if (msblk->block_cache[i].block !=
++ SQUASHFS_USED_BLK)
++ break;
++
++ if (n == 0) {
++ wait_queue_t wait;
++
++ init_waitqueue_entry(&wait, current);
++ add_wait_queue(&msblk->waitq, &wait);
++ set_current_state(TASK_UNINTERRUPTIBLE);
++ up(&msblk->block_cache_mutex);
++ schedule();
++ set_current_state(TASK_RUNNING);
++ remove_wait_queue(&msblk->waitq, &wait);
++ continue;
++ }
++ msblk->next_cache = (i + 1) % SQUASHFS_CACHED_BLKS;
++
++ if (msblk->block_cache[i].block ==
++ SQUASHFS_INVALID_BLK) {
++ if (!(msblk->block_cache[i].data =
++ kmalloc(SQUASHFS_METADATA_SIZE,
++ GFP_KERNEL))) {
++ ERROR("Failed to allocate cache"
++ "block\n");
++ up(&msblk->block_cache_mutex);
++ goto out;
++ }
++ }
++
++ msblk->block_cache[i].block = SQUASHFS_USED_BLK;
++ up(&msblk->block_cache_mutex);
++
++ if (!(msblk->block_cache[i].length =
++ squashfs_read_data(s,
++ msblk->block_cache[i].data,
++ block, 0, &next_index))) {
++ ERROR("Unable to read cache block [%llx:%x]\n",
++ block, offset);
++ goto out;
++ }
++
++ down(&msblk->block_cache_mutex);
++ wake_up(&msblk->waitq);
++ msblk->block_cache[i].block = block;
++ msblk->block_cache[i].next_index = next_index;
++ TRACE("Read cache block [%llx:%x]\n", block, offset);
++ }
++
++ if (msblk->block_cache[i].block != block) {
++ up(&msblk->block_cache_mutex);
++ continue;
++ }
++
++ if ((bytes = msblk->block_cache[i].length - offset) >= length) {
++ if (buffer)
++ memcpy(buffer, msblk->block_cache[i].data +
++ offset, length);
++ if (msblk->block_cache[i].length - offset == length) {
++ *next_block = msblk->block_cache[i].next_index;
++ *next_offset = 0;
++ } else {
++ *next_block = block;
++ *next_offset = offset + length;
++ }
++ up(&msblk->block_cache_mutex);
++ goto finish;
++ } else {
++ if (buffer) {
++ memcpy(buffer, msblk->block_cache[i].data +
++ offset, bytes);
++ buffer += bytes;
++ }
++ block = msblk->block_cache[i].next_index;
++ up(&msblk->block_cache_mutex);
++ length -= bytes;
++ offset = 0;
++ }
++ }
++
++finish:
++ return return_length;
++out:
++ return 0;
++}
++
++
++static int get_fragment_location(struct super_block *s, unsigned int fragment,
++ long long *fragment_start_block,
++ unsigned int *fragment_size)
++{
++ struct squashfs_sb_info *msblk = s->s_fs_info;
++ long long start_block =
++ msblk->fragment_index[SQUASHFS_FRAGMENT_INDEX(fragment)];
++ int offset = SQUASHFS_FRAGMENT_INDEX_OFFSET(fragment);
++ struct squashfs_fragment_entry fragment_entry;
++
++ if (msblk->swap) {
++ struct squashfs_fragment_entry sfragment_entry;
++
++ if (!squashfs_get_cached_block(s, (char *) &sfragment_entry,
++ start_block, offset,
++ sizeof(sfragment_entry), &start_block,
++ &offset))
++ goto out;
++ SQUASHFS_SWAP_FRAGMENT_ENTRY(&fragment_entry, &sfragment_entry);
++ } else
++ if (!squashfs_get_cached_block(s, (char *) &fragment_entry,
++ start_block, offset,
++ sizeof(fragment_entry), &start_block,
++ &offset))
++ goto out;
++
++ *fragment_start_block = fragment_entry.start_block;
++ *fragment_size = fragment_entry.size;
++
++ return 1;
++
++out:
++ return 0;
++}
++
++
++SQSH_EXTERN void release_cached_fragment(struct squashfs_sb_info *msblk, struct
++ squashfs_fragment_cache *fragment)
++{
++ down(&msblk->fragment_mutex);
++ fragment->locked --;
++ wake_up(&msblk->fragment_wait_queue);
++ up(&msblk->fragment_mutex);
++}
++
++
++SQSH_EXTERN struct squashfs_fragment_cache *get_cached_fragment(struct super_block
++ *s, long long start_block,
++ int length)
++{
++ int i, n;
++ struct squashfs_sb_info *msblk = s->s_fs_info;
++
++ while ( 1 ) {
++ down(&msblk->fragment_mutex);
++
++ for (i = 0; i < SQUASHFS_CACHED_FRAGMENTS &&
++ msblk->fragment[i].block != start_block; i++);
++
++ if (i == SQUASHFS_CACHED_FRAGMENTS) {
++ for (i = msblk->next_fragment, n =
++ SQUASHFS_CACHED_FRAGMENTS; n &&
++ msblk->fragment[i].locked; n--, i = (i + 1) %
++ SQUASHFS_CACHED_FRAGMENTS);
++
++ if (n == 0) {
++ wait_queue_t wait;
++
++ init_waitqueue_entry(&wait, current);
++ add_wait_queue(&msblk->fragment_wait_queue,
++ &wait);
++ set_current_state(TASK_UNINTERRUPTIBLE);
++ up(&msblk->fragment_mutex);
++ schedule();
++ set_current_state(TASK_RUNNING);
++ remove_wait_queue(&msblk->fragment_wait_queue,
++ &wait);
++ continue;
++ }
++ msblk->next_fragment = (msblk->next_fragment + 1) %
++ SQUASHFS_CACHED_FRAGMENTS;
++
++ if (msblk->fragment[i].data == NULL)
++ if (!(msblk->fragment[i].data = SQUASHFS_ALLOC
++ (SQUASHFS_FILE_MAX_SIZE))) {
++ ERROR("Failed to allocate fragment "
++ "cache block\n");
++ up(&msblk->fragment_mutex);
++ goto out;
++ }
++
++ msblk->fragment[i].block = SQUASHFS_INVALID_BLK;
++ msblk->fragment[i].locked = 1;
++ up(&msblk->fragment_mutex);
++
++ if (!(msblk->fragment[i].length = squashfs_read_data(s,
++ msblk->fragment[i].data,
++ start_block, length, NULL))) {
++ ERROR("Unable to read fragment cache block "
++ "[%llx]\n", start_block);
++ msblk->fragment[i].locked = 0;
++ goto out;
++ }
++
++ msblk->fragment[i].block = start_block;
++ TRACE("New fragment %d, start block %lld, locked %d\n",
++ i, msblk->fragment[i].block,
++ msblk->fragment[i].locked);
++ break;
++ }
++
++ msblk->fragment[i].locked++;
++ up(&msblk->fragment_mutex);
++ TRACE("Got fragment %d, start block %lld, locked %d\n", i,
++ msblk->fragment[i].block,
++ msblk->fragment[i].locked);
++ break;
++ }
++
++ return &msblk->fragment[i];
++
++out:
++ return NULL;
++}
++
++
++static struct inode *squashfs_new_inode(struct super_block *s,
++ struct squashfs_base_inode_header *inodeb)
++{
++ struct squashfs_sb_info *msblk = s->s_fs_info;
++ struct inode *i = new_inode(s);
++
++ if (i) {
++ i->i_ino = inodeb->inode_number;
++ i->i_mtime.tv_sec = inodeb->mtime;
++ i->i_atime.tv_sec = inodeb->mtime;
++ i->i_ctime.tv_sec = inodeb->mtime;
++ i->i_uid = msblk->uid[inodeb->uid];
++ i->i_mode = inodeb->mode;
++ i->i_size = 0;
++ if (inodeb->guid == SQUASHFS_GUIDS)
++ i->i_gid = i->i_uid;
++ else
++ i->i_gid = msblk->guid[inodeb->guid];
++ }
++
++ return i;
++}
++
++
++static struct inode *squashfs_iget(struct super_block *s, squashfs_inode_t inode)
++{
++ struct inode *i;
++ struct squashfs_sb_info *msblk = s->s_fs_info;
++ struct squashfs_super_block *sblk = &msblk->sblk;
++ long long block = SQUASHFS_INODE_BLK(inode) +
++ sblk->inode_table_start;
++ unsigned int offset = SQUASHFS_INODE_OFFSET(inode);
++ long long next_block;
++ unsigned int next_offset;
++ union squashfs_inode_header id, sid;
++ struct squashfs_base_inode_header *inodeb = &id.base,
++ *sinodeb = &sid.base;
++
++ TRACE("Entered squashfs_iget\n");
++
++ if (msblk->swap) {
++ if (!squashfs_get_cached_block(s, (char *) sinodeb, block,
++ offset, sizeof(*sinodeb), &next_block,
++ &next_offset))
++ goto failed_read;
++ SQUASHFS_SWAP_BASE_INODE_HEADER(inodeb, sinodeb,
++ sizeof(*sinodeb));
++ } else
++ if (!squashfs_get_cached_block(s, (char *) inodeb, block,
++ offset, sizeof(*inodeb), &next_block,
++ &next_offset))
++ goto failed_read;
++
++ switch(inodeb->inode_type) {
++ case SQUASHFS_FILE_TYPE: {
++ unsigned int frag_size;
++ long long frag_blk;
++ struct squashfs_reg_inode_header *inodep = &id.reg;
++ struct squashfs_reg_inode_header *sinodep = &sid.reg;
++
++ if (msblk->swap) {
++ if (!squashfs_get_cached_block(s, (char *)
++ sinodep, block, offset,
++ sizeof(*sinodep), &next_block,
++ &next_offset))
++ goto failed_read;
++ SQUASHFS_SWAP_REG_INODE_HEADER(inodep, sinodep);
++ } else
++ if (!squashfs_get_cached_block(s, (char *)
++ inodep, block, offset,
++ sizeof(*inodep), &next_block,
++ &next_offset))
++ goto failed_read;
++
++ frag_blk = SQUASHFS_INVALID_BLK;
++ if (inodep->fragment != SQUASHFS_INVALID_FRAG &&
++ !get_fragment_location(s,
++ inodep->fragment, &frag_blk, &frag_size))
++ goto failed_read;
++
++ if((i = squashfs_new_inode(s, inodeb)) == NULL)
++ goto failed_read1;
++
++ i->i_nlink = 1;
++ i->i_size = inodep->file_size;
++ i->i_fop = &generic_ro_fops;
++ i->i_mode |= S_IFREG;
++ i->i_blocks = ((i->i_size - 1) >> 9) + 1;
++ SQUASHFS_I(i)->u.s1.fragment_start_block = frag_blk;
++ SQUASHFS_I(i)->u.s1.fragment_size = frag_size;
++ SQUASHFS_I(i)->u.s1.fragment_offset = inodep->offset;
++ SQUASHFS_I(i)->start_block = inodep->start_block;
++ SQUASHFS_I(i)->u.s1.block_list_start = next_block;
++ SQUASHFS_I(i)->offset = next_offset;
++ if (sblk->block_size > 4096)
++ i->i_data.a_ops = &squashfs_aops;
++ else
++ i->i_data.a_ops = &squashfs_aops_4K;
++
++ TRACE("File inode %x:%x, start_block %llx, "
++ "block_list_start %llx, offset %x\n",
++ SQUASHFS_INODE_BLK(inode), offset,
++ inodep->start_block, next_block,
++ next_offset);
++ break;
++ }
++ case SQUASHFS_LREG_TYPE: {
++ unsigned int frag_size;
++ long long frag_blk;
++ struct squashfs_lreg_inode_header *inodep = &id.lreg;
++ struct squashfs_lreg_inode_header *sinodep = &sid.lreg;
++
++ if (msblk->swap) {
++ if (!squashfs_get_cached_block(s, (char *)
++ sinodep, block, offset,
++ sizeof(*sinodep), &next_block,
++ &next_offset))
++ goto failed_read;
++ SQUASHFS_SWAP_LREG_INODE_HEADER(inodep, sinodep);
++ } else
++ if (!squashfs_get_cached_block(s, (char *)
++ inodep, block, offset,
++ sizeof(*inodep), &next_block,
++ &next_offset))
++ goto failed_read;
++
++ frag_blk = SQUASHFS_INVALID_BLK;
++ if (inodep->fragment != SQUASHFS_INVALID_FRAG &&
++ !get_fragment_location(s,
++ inodep->fragment, &frag_blk, &frag_size))
++ goto failed_read;
++
++ if((i = squashfs_new_inode(s, inodeb)) == NULL)
++ goto failed_read1;
++
++ i->i_nlink = inodep->nlink;
++ i->i_size = inodep->file_size;
++ i->i_fop = &generic_ro_fops;
++ i->i_mode |= S_IFREG;
++ i->i_blocks = ((i->i_size - 1) >> 9) + 1;
++ SQUASHFS_I(i)->u.s1.fragment_start_block = frag_blk;
++ SQUASHFS_I(i)->u.s1.fragment_size = frag_size;
++ SQUASHFS_I(i)->u.s1.fragment_offset = inodep->offset;
++ SQUASHFS_I(i)->start_block = inodep->start_block;
++ SQUASHFS_I(i)->u.s1.block_list_start = next_block;
++ SQUASHFS_I(i)->offset = next_offset;
++ if (sblk->block_size > 4096)
++ i->i_data.a_ops = &squashfs_aops;
++ else
++ i->i_data.a_ops = &squashfs_aops_4K;
++
++ TRACE("File inode %x:%x, start_block %llx, "
++ "block_list_start %llx, offset %x\n",
++ SQUASHFS_INODE_BLK(inode), offset,
++ inodep->start_block, next_block,
++ next_offset);
++ break;
++ }
++ case SQUASHFS_DIR_TYPE: {
++ struct squashfs_dir_inode_header *inodep = &id.dir;
++ struct squashfs_dir_inode_header *sinodep = &sid.dir;
++
++ if (msblk->swap) {
++ if (!squashfs_get_cached_block(s, (char *)
++ sinodep, block, offset,
++ sizeof(*sinodep), &next_block,
++ &next_offset))
++ goto failed_read;
++ SQUASHFS_SWAP_DIR_INODE_HEADER(inodep, sinodep);
++ } else
++ if (!squashfs_get_cached_block(s, (char *)
++ inodep, block, offset,
++ sizeof(*inodep), &next_block,
++ &next_offset))
++ goto failed_read;
++
++ if((i = squashfs_new_inode(s, inodeb)) == NULL)
++ goto failed_read1;
++
++ i->i_nlink = inodep->nlink;
++ i->i_size = inodep->file_size;
++ i->i_op = &squashfs_dir_inode_ops;
++ i->i_fop = &squashfs_dir_ops;
++ i->i_mode |= S_IFDIR;
++ SQUASHFS_I(i)->start_block = inodep->start_block;
++ SQUASHFS_I(i)->offset = inodep->offset;
++ SQUASHFS_I(i)->u.s2.directory_index_count = 0;
++ SQUASHFS_I(i)->u.s2.parent_inode = inodep->parent_inode;
++
++ TRACE("Directory inode %x:%x, start_block %x, offset "
++ "%x\n", SQUASHFS_INODE_BLK(inode),
++ offset, inodep->start_block,
++ inodep->offset);
++ break;
++ }
++ case SQUASHFS_LDIR_TYPE: {
++ struct squashfs_ldir_inode_header *inodep = &id.ldir;
++ struct squashfs_ldir_inode_header *sinodep = &sid.ldir;
++
++ if (msblk->swap) {
++ if (!squashfs_get_cached_block(s, (char *)
++ sinodep, block, offset,
++ sizeof(*sinodep), &next_block,
++ &next_offset))
++ goto failed_read;
++ SQUASHFS_SWAP_LDIR_INODE_HEADER(inodep,
++ sinodep);
++ } else
++ if (!squashfs_get_cached_block(s, (char *)
++ inodep, block, offset,
++ sizeof(*inodep), &next_block,
++ &next_offset))
++ goto failed_read;
++
++ if((i = squashfs_new_inode(s, inodeb)) == NULL)
++ goto failed_read1;
++
++ i->i_nlink = inodep->nlink;
++ i->i_size = inodep->file_size;
++ i->i_op = &squashfs_dir_inode_ops;
++ i->i_fop = &squashfs_dir_ops;
++ i->i_mode |= S_IFDIR;
++ SQUASHFS_I(i)->start_block = inodep->start_block;
++ SQUASHFS_I(i)->offset = inodep->offset;
++ SQUASHFS_I(i)->u.s2.directory_index_start = next_block;
++ SQUASHFS_I(i)->u.s2.directory_index_offset =
++ next_offset;
++ SQUASHFS_I(i)->u.s2.directory_index_count =
++ inodep->i_count;
++ SQUASHFS_I(i)->u.s2.parent_inode = inodep->parent_inode;
++
++ TRACE("Long directory inode %x:%x, start_block %x, "
++ "offset %x\n",
++ SQUASHFS_INODE_BLK(inode), offset,
++ inodep->start_block, inodep->offset);
++ break;
++ }
++ case SQUASHFS_SYMLINK_TYPE: {
++ struct squashfs_symlink_inode_header *inodep =
++ &id.symlink;
++ struct squashfs_symlink_inode_header *sinodep =
++ &sid.symlink;
++
++ if (msblk->swap) {
++ if (!squashfs_get_cached_block(s, (char *)
++ sinodep, block, offset,
++ sizeof(*sinodep), &next_block,
++ &next_offset))
++ goto failed_read;
++ SQUASHFS_SWAP_SYMLINK_INODE_HEADER(inodep,
++ sinodep);
++ } else
++ if (!squashfs_get_cached_block(s, (char *)
++ inodep, block, offset,
++ sizeof(*inodep), &next_block,
++ &next_offset))
++ goto failed_read;
++
++ if((i = squashfs_new_inode(s, inodeb)) == NULL)
++ goto failed_read1;
++
++ i->i_nlink = inodep->nlink;
++ i->i_size = inodep->symlink_size;
++ i->i_op = &page_symlink_inode_operations;
++ i->i_data.a_ops = &squashfs_symlink_aops;
++ i->i_mode |= S_IFLNK;
++ SQUASHFS_I(i)->start_block = next_block;
++ SQUASHFS_I(i)->offset = next_offset;
++
++ TRACE("Symbolic link inode %x:%x, start_block %llx, "
++ "offset %x\n",
++ SQUASHFS_INODE_BLK(inode), offset,
++ next_block, next_offset);
++ break;
++ }
++ case SQUASHFS_BLKDEV_TYPE:
++ case SQUASHFS_CHRDEV_TYPE: {
++ struct squashfs_dev_inode_header *inodep = &id.dev;
++ struct squashfs_dev_inode_header *sinodep = &sid.dev;
++
++ if (msblk->swap) {
++ if (!squashfs_get_cached_block(s, (char *)
++ sinodep, block, offset,
++ sizeof(*sinodep), &next_block,
++ &next_offset))
++ goto failed_read;
++ SQUASHFS_SWAP_DEV_INODE_HEADER(inodep, sinodep);
++ } else
++ if (!squashfs_get_cached_block(s, (char *)
++ inodep, block, offset,
++ sizeof(*inodep), &next_block,
++ &next_offset))
++ goto failed_read;
++
++ if ((i = squashfs_new_inode(s, inodeb)) == NULL)
++ goto failed_read1;
++
++ i->i_nlink = inodep->nlink;
++ i->i_mode |= (inodeb->inode_type ==
++ SQUASHFS_CHRDEV_TYPE) ? S_IFCHR :
++ S_IFBLK;
++ init_special_inode(i, i->i_mode,
++ old_decode_dev(inodep->rdev));
++
++ TRACE("Device inode %x:%x, rdev %x\n",
++ SQUASHFS_INODE_BLK(inode), offset,
++ inodep->rdev);
++ break;
++ }
++ case SQUASHFS_FIFO_TYPE:
++ case SQUASHFS_SOCKET_TYPE: {
++ struct squashfs_ipc_inode_header *inodep = &id.ipc;
++ struct squashfs_ipc_inode_header *sinodep = &sid.ipc;
++
++ if (msblk->swap) {
++ if (!squashfs_get_cached_block(s, (char *)
++ sinodep, block, offset,
++ sizeof(*sinodep), &next_block,
++ &next_offset))
++ goto failed_read;
++ SQUASHFS_SWAP_IPC_INODE_HEADER(inodep, sinodep);
++ } else
++ if (!squashfs_get_cached_block(s, (char *)
++ inodep, block, offset,
++ sizeof(*inodep), &next_block,
++ &next_offset))
++ goto failed_read;
++
++ if ((i = squashfs_new_inode(s, inodeb)) == NULL)
++ goto failed_read1;
++
++ i->i_nlink = inodep->nlink;
++ i->i_mode |= (inodeb->inode_type == SQUASHFS_FIFO_TYPE)
++ ? S_IFIFO : S_IFSOCK;
++ init_special_inode(i, i->i_mode, 0);
++ break;
++ }
++ default:
++ ERROR("Unknown inode type %d in squashfs_iget!\n",
++ inodeb->inode_type);
++ goto failed_read1;
++ }
++
++ insert_inode_hash(i);
++ return i;
++
++failed_read:
++ ERROR("Unable to read inode [%llx:%x]\n", block, offset);
++
++failed_read1:
++ return NULL;
++}
++
++
++static int read_fragment_index_table(struct super_block *s)
++{
++ struct squashfs_sb_info *msblk = s->s_fs_info;
++ struct squashfs_super_block *sblk = &msblk->sblk;
++
++ /* Allocate fragment index table */
++ if (!(msblk->fragment_index = kmalloc(SQUASHFS_FRAGMENT_INDEX_BYTES
++ (sblk->fragments), GFP_KERNEL))) {
++ ERROR("Failed to allocate uid/gid table\n");
++ return 0;
++ }
++
++ if (SQUASHFS_FRAGMENT_INDEX_BYTES(sblk->fragments) &&
++ !squashfs_read_data(s, (char *)
++ msblk->fragment_index,
++ sblk->fragment_table_start,
++ SQUASHFS_FRAGMENT_INDEX_BYTES
++ (sblk->fragments) |
++ SQUASHFS_COMPRESSED_BIT_BLOCK, NULL)) {
++ ERROR("unable to read fragment index table\n");
++ return 0;
++ }
++
++ if (msblk->swap) {
++ int i;
++ long long fragment;
++
++ for (i = 0; i < SQUASHFS_FRAGMENT_INDEXES(sblk->fragments);
++ i++) {
++ SQUASHFS_SWAP_FRAGMENT_INDEXES((&fragment),
++ &msblk->fragment_index[i], 1);
++ msblk->fragment_index[i] = fragment;
++ }
++ }
++
++ return 1;
++}
++
++
++static int supported_squashfs_filesystem(struct squashfs_sb_info *msblk, int silent)
++{
++ struct squashfs_super_block *sblk = &msblk->sblk;
++
++ msblk->iget = squashfs_iget;
++ msblk->read_blocklist = read_blocklist;
++ msblk->read_fragment_index_table = read_fragment_index_table;
++
++ if (sblk->s_major == 1) {
++ if (!squashfs_1_0_supported(msblk)) {
++ SERROR("Major/Minor mismatch, Squashfs 1.0 filesystems "
++ "are unsupported\n");
++ SERROR("Please recompile with "
++ "Squashfs 1.0 support enabled\n");
++ return 0;
++ }
++ } else if (sblk->s_major == 2) {
++ if (!squashfs_2_0_supported(msblk)) {
++ SERROR("Major/Minor mismatch, Squashfs 2.0 filesystems "
++ "are unsupported\n");
++ SERROR("Please recompile with "
++ "Squashfs 2.0 support enabled\n");
++ return 0;
++ }
++ } else if(sblk->s_major != SQUASHFS_MAJOR || sblk->s_minor >
++ SQUASHFS_MINOR) {
++ SERROR("Major/Minor mismatch, trying to mount newer %d.%d "
++ "filesystem\n", sblk->s_major, sblk->s_minor);
++ SERROR("Please update your kernel\n");
++ return 0;
++ }
++
++ return 1;
++}
++
++
++static int squashfs_fill_super(struct super_block *s, void *data, int silent)
++{
++ struct squashfs_sb_info *msblk;
++ struct squashfs_super_block *sblk;
++ int i;
++ char b[BDEVNAME_SIZE];
++ struct inode *root;
++
++ TRACE("Entered squashfs_read_superblock\n");
++
++ if (!(s->s_fs_info = kmalloc(sizeof(struct squashfs_sb_info),
++ GFP_KERNEL))) {
++ ERROR("Failed to allocate superblock\n");
++ goto failure;
++ }
++ memset(s->s_fs_info, 0, sizeof(struct squashfs_sb_info));
++ msblk = s->s_fs_info;
++ sblk = &msblk->sblk;
++
++ msblk->devblksize = sb_min_blocksize(s, BLOCK_SIZE);
++ msblk->devblksize_log2 = ffz(~msblk->devblksize);
++
++ init_MUTEX(&msblk->read_data_mutex);
++ init_MUTEX(&msblk->read_page_mutex);
++ init_MUTEX(&msblk->block_cache_mutex);
++ init_MUTEX(&msblk->fragment_mutex);
++ init_MUTEX(&msblk->meta_index_mutex);
++
++ init_waitqueue_head(&msblk->waitq);
++ init_waitqueue_head(&msblk->fragment_wait_queue);
++
++ if (!squashfs_read_data(s, (char *) sblk, SQUASHFS_START,
++ sizeof(struct squashfs_super_block) |
++ SQUASHFS_COMPRESSED_BIT_BLOCK, NULL)) {
++ SERROR("unable to read superblock\n");
++ goto failed_mount;
++ }
++
++ /* Check it is a SQUASHFS superblock */
++ msblk->swap = 0;
++ if ((s->s_magic = sblk->s_magic) != SQUASHFS_MAGIC) {
++ if (sblk->s_magic == SQUASHFS_MAGIC_SWAP) {
++ struct squashfs_super_block ssblk;
++
++ WARNING("Mounting a different endian SQUASHFS "
++ "filesystem on %s\n", bdevname(s->s_bdev, b));
++
++ SQUASHFS_SWAP_SUPER_BLOCK(&ssblk, sblk);
++ memcpy(sblk, &ssblk, sizeof(struct squashfs_super_block));
++ msblk->swap = 1;
++ } else {
++ SERROR("Can't find a SQUASHFS superblock on %s\n",
++ bdevname(s->s_bdev, b));
++ goto failed_mount;
++ }
++ }
++
++ /* Check the MAJOR & MINOR versions */
++ if(!supported_squashfs_filesystem(msblk, silent))
++ goto failed_mount;
++
++ TRACE("Found valid superblock on %s\n", bdevname(s->s_bdev, b));
++ TRACE("Inodes are %scompressed\n",
++ SQUASHFS_UNCOMPRESSED_INODES
++ (sblk->flags) ? "un" : "");
++ TRACE("Data is %scompressed\n",
++ SQUASHFS_UNCOMPRESSED_DATA(sblk->flags)
++ ? "un" : "");
++ TRACE("Check data is %s present in the filesystem\n",
++ SQUASHFS_CHECK_DATA(sblk->flags) ?
++ "" : "not");
++ TRACE("Filesystem size %lld bytes\n", sblk->bytes_used);
++ TRACE("Block size %d\n", sblk->block_size);
++ TRACE("Number of inodes %d\n", sblk->inodes);
++ if (sblk->s_major > 1)
++ TRACE("Number of fragments %d\n", sblk->fragments);
++ TRACE("Number of uids %d\n", sblk->no_uids);
++ TRACE("Number of gids %d\n", sblk->no_guids);
++ TRACE("sblk->inode_table_start %llx\n", sblk->inode_table_start);
++ TRACE("sblk->directory_table_start %llx\n", sblk->directory_table_start);
++ if (sblk->s_major > 1)
++ TRACE("sblk->fragment_table_start %llx\n",
++ sblk->fragment_table_start);
++ TRACE("sblk->uid_start %llx\n", sblk->uid_start);
++
++ s->s_flags |= MS_RDONLY;
++ s->s_op = &squashfs_ops;
++
++ /* Init inode_table block pointer array */
++ if (!(msblk->block_cache = kmalloc(sizeof(struct squashfs_cache) *
++ SQUASHFS_CACHED_BLKS, GFP_KERNEL))) {
++ ERROR("Failed to allocate block cache\n");
++ goto failed_mount;
++ }
++
++ for (i = 0; i < SQUASHFS_CACHED_BLKS; i++)
++ msblk->block_cache[i].block = SQUASHFS_INVALID_BLK;
++
++ msblk->next_cache = 0;
++
++ /* Allocate read_data block */
++ msblk->read_size = (sblk->block_size < SQUASHFS_METADATA_SIZE) ?
++ SQUASHFS_METADATA_SIZE :
++ sblk->block_size;
++
++ if (!(msblk->read_data = kmalloc(msblk->read_size, GFP_KERNEL))) {
++ ERROR("Failed to allocate read_data block\n");
++ goto failed_mount;
++ }
++
++ /* Allocate read_page block */
++ if (!(msblk->read_page = kmalloc(sblk->block_size, GFP_KERNEL))) {
++ ERROR("Failed to allocate read_page block\n");
++ goto failed_mount;
++ }
++
++ /* Allocate uid and gid tables */
++ if (!(msblk->uid = kmalloc((sblk->no_uids + sblk->no_guids) *
++ sizeof(unsigned int), GFP_KERNEL))) {
++ ERROR("Failed to allocate uid/gid table\n");
++ goto failed_mount;
++ }
++ msblk->guid = msblk->uid + sblk->no_uids;
++
++ if (msblk->swap) {
++ unsigned int suid[sblk->no_uids + sblk->no_guids];
++
++ if (!squashfs_read_data(s, (char *) &suid, sblk->uid_start,
++ ((sblk->no_uids + sblk->no_guids) *
++ sizeof(unsigned int)) |
++ SQUASHFS_COMPRESSED_BIT_BLOCK, NULL)) {
++ ERROR("unable to read uid/gid table\n");
++ goto failed_mount;
++ }
++
++ SQUASHFS_SWAP_DATA(msblk->uid, suid, (sblk->no_uids +
++ sblk->no_guids), (sizeof(unsigned int) * 8));
++ } else
++ if (!squashfs_read_data(s, (char *) msblk->uid, sblk->uid_start,
++ ((sblk->no_uids + sblk->no_guids) *
++ sizeof(unsigned int)) |
++ SQUASHFS_COMPRESSED_BIT_BLOCK, NULL)) {
++ ERROR("unable to read uid/gid table\n");
++ goto failed_mount;
++ }
++
++
++ if (sblk->s_major == 1 && squashfs_1_0_supported(msblk))
++ goto allocate_root;
++
++ if (!(msblk->fragment = kmalloc(sizeof(struct squashfs_fragment_cache) *
++ SQUASHFS_CACHED_FRAGMENTS, GFP_KERNEL))) {
++ ERROR("Failed to allocate fragment block cache\n");
++ goto failed_mount;
++ }
++
++ for (i = 0; i < SQUASHFS_CACHED_FRAGMENTS; i++) {
++ msblk->fragment[i].locked = 0;
++ msblk->fragment[i].block = SQUASHFS_INVALID_BLK;
++ msblk->fragment[i].data = NULL;
++ }
++
++ msblk->next_fragment = 0;
++
++ /* Allocate fragment index table */
++ if (msblk->read_fragment_index_table(s) == 0)
++ goto failed_mount;
++
++allocate_root:
++ if ((root = (msblk->iget)(s, sblk->root_inode)) == NULL)
++ goto failed_mount;
++
++ if ((s->s_root = d_alloc_root(root)) == NULL) {
++ ERROR("Root inode create failed\n");
++ iput(root);
++ goto failed_mount;
++ }
++
++ TRACE("Leaving squashfs_read_super\n");
++ return 0;
++
++failed_mount:
++ kfree(msblk->fragment_index);
++ kfree(msblk->fragment);
++ kfree(msblk->uid);
++ kfree(msblk->read_page);
++ kfree(msblk->read_data);
++ kfree(msblk->block_cache);
++ kfree(msblk->fragment_index_2);
++ kfree(s->s_fs_info);
++ s->s_fs_info = NULL;
++ return -EINVAL;
++
++failure:
++ return -ENOMEM;
++}
++
++
++static int squashfs_statfs(struct dentry *dentry, struct kstatfs *buf)
++{
++ struct squashfs_sb_info *msblk = dentry->d_inode->i_sb->s_fs_info;
++ struct squashfs_super_block *sblk = &msblk->sblk;
++
++ TRACE("Entered squashfs_statfs\n");
++
++ buf->f_type = SQUASHFS_MAGIC;
++ buf->f_bsize = sblk->block_size;
++ buf->f_blocks = ((sblk->bytes_used - 1) >> sblk->block_log) + 1;
++ buf->f_bfree = buf->f_bavail = 0;
++ buf->f_files = sblk->inodes;
++ buf->f_ffree = 0;
++ buf->f_namelen = SQUASHFS_NAME_LEN;
++
++ return 0;
++}
++
++
++static int squashfs_symlink_readpage(struct file *file, struct page *page)
++{
++ struct inode *inode = page->mapping->host;
++ int index = page->index << PAGE_CACHE_SHIFT, length, bytes;
++ long long block = SQUASHFS_I(inode)->start_block;
++ int offset = SQUASHFS_I(inode)->offset;
++ void *pageaddr = kmap(page);
++
++ TRACE("Entered squashfs_symlink_readpage, page index %ld, start block "
++ "%llx, offset %x\n", page->index,
++ SQUASHFS_I(inode)->start_block,
++ SQUASHFS_I(inode)->offset);
++
++ for (length = 0; length < index; length += bytes) {
++ if (!(bytes = squashfs_get_cached_block(inode->i_sb, NULL,
++ block, offset, PAGE_CACHE_SIZE, &block,
++ &offset))) {
++ ERROR("Unable to read symbolic link [%llx:%x]\n", block,
++ offset);
++ goto skip_read;
++ }
++ }
++
++ if (length != index) {
++ ERROR("(squashfs_symlink_readpage) length != index\n");
++ bytes = 0;
++ goto skip_read;
++ }
++
++ bytes = (i_size_read(inode) - length) > PAGE_CACHE_SIZE ? PAGE_CACHE_SIZE :
++ i_size_read(inode) - length;
++
++ if (!(bytes = squashfs_get_cached_block(inode->i_sb, pageaddr, block,
++ offset, bytes, &block, &offset)))
++ ERROR("Unable to read symbolic link [%llx:%x]\n", block, offset);
++
++skip_read:
++ memset(pageaddr + bytes, 0, PAGE_CACHE_SIZE - bytes);
++ kunmap(page);
++ SetPageUptodate(page);
++ unlock_page(page);
++
++ return 0;
++}
++
++
++struct meta_index *locate_meta_index(struct inode *inode, int index, int offset)
++{
++ struct meta_index *meta = NULL;
++ struct squashfs_sb_info *msblk = inode->i_sb->s_fs_info;
++ int i;
++
++ down(&msblk->meta_index_mutex);
++
++ TRACE("locate_meta_index: index %d, offset %d\n", index, offset);
++
++ if(msblk->meta_index == NULL)
++ goto not_allocated;
++
++ for (i = 0; i < SQUASHFS_META_NUMBER; i ++)
++ if (msblk->meta_index[i].inode_number == inode->i_ino &&
++ msblk->meta_index[i].offset >= offset &&
++ msblk->meta_index[i].offset <= index &&
++ msblk->meta_index[i].locked == 0) {
++ TRACE("locate_meta_index: entry %d, offset %d\n", i,
++ msblk->meta_index[i].offset);
++ meta = &msblk->meta_index[i];
++ offset = meta->offset;
++ }
++
++ if (meta)
++ meta->locked = 1;
++
++not_allocated:
++ up(&msblk->meta_index_mutex);
++
++ return meta;
++}
++
++
++struct meta_index *empty_meta_index(struct inode *inode, int offset, int skip)
++{
++ struct squashfs_sb_info *msblk = inode->i_sb->s_fs_info;
++ struct meta_index *meta = NULL;
++ int i;
++
++ down(&msblk->meta_index_mutex);
++
++ TRACE("empty_meta_index: offset %d, skip %d\n", offset, skip);
++
++ if(msblk->meta_index == NULL) {
++ if (!(msblk->meta_index = kmalloc(sizeof(struct meta_index) *
++ SQUASHFS_META_NUMBER, GFP_KERNEL))) {
++ ERROR("Failed to allocate meta_index\n");
++ goto failed;
++ }
++ for(i = 0; i < SQUASHFS_META_NUMBER; i++) {
++ msblk->meta_index[i].inode_number = 0;
++ msblk->meta_index[i].locked = 0;
++ }
++ msblk->next_meta_index = 0;
++ }
++
++ for(i = SQUASHFS_META_NUMBER; i &&
++ msblk->meta_index[msblk->next_meta_index].locked; i --)
++ msblk->next_meta_index = (msblk->next_meta_index + 1) %
++ SQUASHFS_META_NUMBER;
++
++ if(i == 0) {
++ TRACE("empty_meta_index: failed!\n");
++ goto failed;
++ }
++
++ TRACE("empty_meta_index: returned meta entry %d, %p\n",
++ msblk->next_meta_index,
++ &msblk->meta_index[msblk->next_meta_index]);
++
++ meta = &msblk->meta_index[msblk->next_meta_index];
++ msblk->next_meta_index = (msblk->next_meta_index + 1) %
++ SQUASHFS_META_NUMBER;
++
++ meta->inode_number = inode->i_ino;
++ meta->offset = offset;
++ meta->skip = skip;
++ meta->entries = 0;
++ meta->locked = 1;
++
++failed:
++ up(&msblk->meta_index_mutex);
++ return meta;
++}
++
++
++void release_meta_index(struct inode *inode, struct meta_index *meta)
++{
++ meta->locked = 0;
++}
++
++
++static int read_block_index(struct super_block *s, int blocks, char *block_list,
++ long long *start_block, int *offset)
++{
++ struct squashfs_sb_info *msblk = s->s_fs_info;
++ unsigned int *block_listp;
++ int block = 0;
++
++ if (msblk->swap) {
++ char sblock_list[blocks << 2];
++
++ if (!squashfs_get_cached_block(s, sblock_list, *start_block,
++ *offset, blocks << 2, start_block, offset)) {
++ ERROR("Unable to read block list [%llx:%x]\n",
++ *start_block, *offset);
++ goto failure;
++ }
++ SQUASHFS_SWAP_INTS(((unsigned int *)block_list),
++ ((unsigned int *)sblock_list), blocks);
++ } else
++ if (!squashfs_get_cached_block(s, block_list, *start_block,
++ *offset, blocks << 2, start_block, offset)) {
++ ERROR("Unable to read block list [%llx:%x]\n",
++ *start_block, *offset);
++ goto failure;
++ }
++
++ for (block_listp = (unsigned int *) block_list; blocks;
++ block_listp++, blocks --)
++ block += SQUASHFS_COMPRESSED_SIZE_BLOCK(*block_listp);
++
++ return block;
++
++failure:
++ return -1;
++}
++
++
++#define SIZE 256
++
++static inline int calculate_skip(int blocks) {
++ int skip = (blocks - 1) / ((SQUASHFS_SLOTS * SQUASHFS_META_ENTRIES + 1) * SQUASHFS_META_INDEXES);
++ return skip >= 7 ? 7 : skip + 1;
++}
++
++
++static int get_meta_index(struct inode *inode, int index,
++ long long *index_block, int *index_offset,
++ long long *data_block, char *block_list)
++{
++ struct squashfs_sb_info *msblk = inode->i_sb->s_fs_info;
++ struct squashfs_super_block *sblk = &msblk->sblk;
++ int skip = calculate_skip(i_size_read(inode) >> sblk->block_log);
++ int offset = 0;
++ struct meta_index *meta;
++ struct meta_entry *meta_entry;
++ long long cur_index_block = SQUASHFS_I(inode)->u.s1.block_list_start;
++ int cur_offset = SQUASHFS_I(inode)->offset;
++ long long cur_data_block = SQUASHFS_I(inode)->start_block;
++ int i;
++
++ index /= SQUASHFS_META_INDEXES * skip;
++
++ while ( offset < index ) {
++ meta = locate_meta_index(inode, index, offset + 1);
++
++ if (meta == NULL) {
++ if ((meta = empty_meta_index(inode, offset + 1,
++ skip)) == NULL)
++ goto all_done;
++ } else {
++ offset = index < meta->offset + meta->entries ? index :
++ meta->offset + meta->entries - 1;
++ meta_entry = &meta->meta_entry[offset - meta->offset];
++ cur_index_block = meta_entry->index_block + sblk->inode_table_start;
++ cur_offset = meta_entry->offset;
++ cur_data_block = meta_entry->data_block;
++ TRACE("get_meta_index: offset %d, meta->offset %d, "
++ "meta->entries %d\n", offset, meta->offset,
++ meta->entries);
++ TRACE("get_meta_index: index_block 0x%llx, offset 0x%x"
++ " data_block 0x%llx\n", cur_index_block,
++ cur_offset, cur_data_block);
++ }
++
++ for (i = meta->offset + meta->entries; i <= index &&
++ i < meta->offset + SQUASHFS_META_ENTRIES; i++) {
++ int blocks = skip * SQUASHFS_META_INDEXES;
++
++ while (blocks) {
++ int block = blocks > (SIZE >> 2) ? (SIZE >> 2) :
++ blocks;
++ int res = read_block_index(inode->i_sb, block,
++ block_list, &cur_index_block,
++ &cur_offset);
++
++ if (res == -1)
++ goto failed;
++
++ cur_data_block += res;
++ blocks -= block;
++ }
++
++ meta_entry = &meta->meta_entry[i - meta->offset];
++ meta_entry->index_block = cur_index_block - sblk->inode_table_start;
++ meta_entry->offset = cur_offset;
++ meta_entry->data_block = cur_data_block;
++ meta->entries ++;
++ offset ++;
++ }
++
++ TRACE("get_meta_index: meta->offset %d, meta->entries %d\n",
++ meta->offset, meta->entries);
++
++ release_meta_index(inode, meta);
++ }
++
++all_done:
++ *index_block = cur_index_block;
++ *index_offset = cur_offset;
++ *data_block = cur_data_block;
++
++ return offset * SQUASHFS_META_INDEXES * skip;
++
++failed:
++ release_meta_index(inode, meta);
++ return -1;
++}
++
++
++static long long read_blocklist(struct inode *inode, int index,
++ int readahead_blks, char *block_list,
++ unsigned short **block_p, unsigned int *bsize)
++{
++ long long block_ptr;
++ int offset;
++ long long block;
++ int res = get_meta_index(inode, index, &block_ptr, &offset, &block,
++ block_list);
++
++ TRACE("read_blocklist: res %d, index %d, block_ptr 0x%llx, offset"
++ " 0x%x, block 0x%llx\n", res, index, block_ptr, offset,
++ block);
++
++ if(res == -1)
++ goto failure;
++
++ index -= res;
++
++ while ( index ) {
++ int blocks = index > (SIZE >> 2) ? (SIZE >> 2) : index;
++ int res = read_block_index(inode->i_sb, blocks, block_list,
++ &block_ptr, &offset);
++ if (res == -1)
++ goto failure;
++ block += res;
++ index -= blocks;
++ }
++
++ if (read_block_index(inode->i_sb, 1, block_list,
++ &block_ptr, &offset) == -1)
++ goto failure;
++ *bsize = *((unsigned int *) block_list);
++
++ return block;
++
++failure:
++ return 0;
++}
++
++
++static int squashfs_readpage(struct file *file, struct page *page)
++{
++ struct inode *inode = page->mapping->host;
++ struct squashfs_sb_info *msblk = inode->i_sb->s_fs_info;
++ struct squashfs_super_block *sblk = &msblk->sblk;
++ unsigned char block_list[SIZE];
++ long long block;
++ unsigned int bsize, i = 0, bytes = 0, byte_offset = 0;
++ int index = page->index >> (sblk->block_log - PAGE_CACHE_SHIFT);
++ void *pageaddr;
++ struct squashfs_fragment_cache *fragment = NULL;
++ char *data_ptr = msblk->read_page;
++
++ int mask = (1 << (sblk->block_log - PAGE_CACHE_SHIFT)) - 1;
++ int start_index = page->index & ~mask;
++ int end_index = start_index | mask;
++
++ TRACE("Entered squashfs_readpage, page index %lx, start block %llx\n",
++ page->index,
++ SQUASHFS_I(inode)->start_block);
++
++ if (page->index >= ((i_size_read(inode) + PAGE_CACHE_SIZE - 1) >>
++ PAGE_CACHE_SHIFT))
++ goto skip_read;
++
++ if (SQUASHFS_I(inode)->u.s1.fragment_start_block == SQUASHFS_INVALID_BLK
++ || index < (i_size_read(inode) >>
++ sblk->block_log)) {
++ if ((block = (msblk->read_blocklist)(inode, index, 1,
++ block_list, NULL, &bsize)) == 0)
++ goto skip_read;
++
++ down(&msblk->read_page_mutex);
++
++ if (!(bytes = squashfs_read_data(inode->i_sb, msblk->read_page,
++ block, bsize, NULL))) {
++ ERROR("Unable to read page, block %llx, size %x\n", block,
++ bsize);
++ up(&msblk->read_page_mutex);
++ goto skip_read;
++ }
++ } else {
++ if ((fragment = get_cached_fragment(inode->i_sb,
++ SQUASHFS_I(inode)->
++ u.s1.fragment_start_block,
++ SQUASHFS_I(inode)->u.s1.fragment_size))
++ == NULL) {
++ ERROR("Unable to read page, block %llx, size %x\n",
++ SQUASHFS_I(inode)->
++ u.s1.fragment_start_block,
++ (int) SQUASHFS_I(inode)->
++ u.s1.fragment_size);
++ goto skip_read;
++ }
++ bytes = SQUASHFS_I(inode)->u.s1.fragment_offset +
++ (i_size_read(inode) & (sblk->block_size
++ - 1));
++ byte_offset = SQUASHFS_I(inode)->u.s1.fragment_offset;
++ data_ptr = fragment->data;
++ }
++
++ for (i = start_index; i <= end_index && byte_offset < bytes;
++ i++, byte_offset += PAGE_CACHE_SIZE) {
++ struct page *push_page;
++ int available_bytes = (bytes - byte_offset) > PAGE_CACHE_SIZE ?
++ PAGE_CACHE_SIZE : bytes - byte_offset;
++
++ TRACE("bytes %d, i %d, byte_offset %d, available_bytes %d\n",
++ bytes, i, byte_offset, available_bytes);
++
++ if (i == page->index) {
++ pageaddr = kmap_atomic(page, KM_USER0);
++ memcpy(pageaddr, data_ptr + byte_offset,
++ available_bytes);
++ memset(pageaddr + available_bytes, 0,
++ PAGE_CACHE_SIZE - available_bytes);
++ kunmap_atomic(pageaddr, KM_USER0);
++ flush_dcache_page(page);
++ SetPageUptodate(page);
++ unlock_page(page);
++ } else if ((push_page =
++ grab_cache_page_nowait(page->mapping, i))) {
++ pageaddr = kmap_atomic(push_page, KM_USER0);
++
++ memcpy(pageaddr, data_ptr + byte_offset,
++ available_bytes);
++ memset(pageaddr + available_bytes, 0,
++ PAGE_CACHE_SIZE - available_bytes);
++ kunmap_atomic(pageaddr, KM_USER0);
++ flush_dcache_page(push_page);
++ SetPageUptodate(push_page);
++ unlock_page(push_page);
++ page_cache_release(push_page);
++ }
++ }
++
++ if (SQUASHFS_I(inode)->u.s1.fragment_start_block == SQUASHFS_INVALID_BLK
++ || index < (i_size_read(inode) >>
++ sblk->block_log))
++ up(&msblk->read_page_mutex);
++ else
++ release_cached_fragment(msblk, fragment);
++
++ return 0;
++
++skip_read:
++ pageaddr = kmap_atomic(page, KM_USER0);
++ memset(pageaddr + bytes, 0, PAGE_CACHE_SIZE - bytes);
++ kunmap_atomic(pageaddr, KM_USER0);
++ flush_dcache_page(page);
++ SetPageUptodate(page);
++ unlock_page(page);
++
++ return 0;
++}
++
++
++static int squashfs_readpage4K(struct file *file, struct page *page)
++{
++ struct inode *inode = page->mapping->host;
++ struct squashfs_sb_info *msblk = inode->i_sb->s_fs_info;
++ struct squashfs_super_block *sblk = &msblk->sblk;
++ unsigned char block_list[SIZE];
++ long long block;
++ unsigned int bsize, bytes = 0;
++ void *pageaddr;
++
++ TRACE("Entered squashfs_readpage4K, page index %lx, start block %llx\n",
++ page->index,
++ SQUASHFS_I(inode)->start_block);
++
++ if (page->index >= ((i_size_read(inode) + PAGE_CACHE_SIZE - 1) >>
++ PAGE_CACHE_SHIFT)) {
++ pageaddr = kmap_atomic(page, KM_USER0);
++ goto skip_read;
++ }
++
++ if (SQUASHFS_I(inode)->u.s1.fragment_start_block == SQUASHFS_INVALID_BLK
++ || page->index < (i_size_read(inode) >>
++ sblk->block_log)) {
++ block = (msblk->read_blocklist)(inode, page->index, 1,
++ block_list, NULL, &bsize);
++
++ down(&msblk->read_page_mutex);
++ bytes = squashfs_read_data(inode->i_sb, msblk->read_page, block,
++ bsize, NULL);
++ pageaddr = kmap_atomic(page, KM_USER0);
++ if (bytes)
++ memcpy(pageaddr, msblk->read_page, bytes);
++ else
++ ERROR("Unable to read page, block %llx, size %x\n",
++ block, bsize);
++ up(&msblk->read_page_mutex);
++ } else {
++ struct squashfs_fragment_cache *fragment =
++ get_cached_fragment(inode->i_sb,
++ SQUASHFS_I(inode)->
++ u.s1.fragment_start_block,
++ SQUASHFS_I(inode)-> u.s1.fragment_size);
++ pageaddr = kmap_atomic(page, KM_USER0);
++ if (fragment) {
++ bytes = i_size_read(inode) & (sblk->block_size - 1);
++ memcpy(pageaddr, fragment->data + SQUASHFS_I(inode)->
++ u.s1.fragment_offset, bytes);
++ release_cached_fragment(msblk, fragment);
++ } else
++ ERROR("Unable to read page, block %llx, size %x\n",
++ SQUASHFS_I(inode)->
++ u.s1.fragment_start_block, (int)
++ SQUASHFS_I(inode)-> u.s1.fragment_size);
++ }
++
++skip_read:
++ memset(pageaddr + bytes, 0, PAGE_CACHE_SIZE - bytes);
++ kunmap_atomic(pageaddr, KM_USER0);
++ flush_dcache_page(page);
++ SetPageUptodate(page);
++ unlock_page(page);
++
++ return 0;
++}
++
++
++static int get_dir_index_using_offset(struct super_block *s, long long
++ *next_block, unsigned int *next_offset,
++ long long index_start,
++ unsigned int index_offset, int i_count,
++ long long f_pos)
++{
++ struct squashfs_sb_info *msblk = s->s_fs_info;
++ struct squashfs_super_block *sblk = &msblk->sblk;
++ int i, length = 0;
++ struct squashfs_dir_index index;
++
++ TRACE("Entered get_dir_index_using_offset, i_count %d, f_pos %d\n",
++ i_count, (unsigned int) f_pos);
++
++ f_pos =- 3;
++ if (f_pos == 0)
++ goto finish;
++
++ for (i = 0; i < i_count; i++) {
++ if (msblk->swap) {
++ struct squashfs_dir_index sindex;
++ squashfs_get_cached_block(s, (char *) &sindex,
++ index_start, index_offset,
++ sizeof(sindex), &index_start,
++ &index_offset);
++ SQUASHFS_SWAP_DIR_INDEX(&index, &sindex);
++ } else
++ squashfs_get_cached_block(s, (char *) &index,
++ index_start, index_offset,
++ sizeof(index), &index_start,
++ &index_offset);
++
++ if (index.index > f_pos)
++ break;
++
++ squashfs_get_cached_block(s, NULL, index_start, index_offset,
++ index.size + 1, &index_start,
++ &index_offset);
++
++ length = index.index;
++ *next_block = index.start_block + sblk->directory_table_start;
++ }
++
++ *next_offset = (length + *next_offset) % SQUASHFS_METADATA_SIZE;
++
++finish:
++ return length + 3;
++}
++
++
++static int get_dir_index_using_name(struct super_block *s, long long
++ *next_block, unsigned int *next_offset,
++ long long index_start,
++ unsigned int index_offset, int i_count,
++ const char *name, int size)
++{
++ struct squashfs_sb_info *msblk = s->s_fs_info;
++ struct squashfs_super_block *sblk = &msblk->sblk;
++ int i, length = 0;
++ char buffer[sizeof(struct squashfs_dir_index) + SQUASHFS_NAME_LEN + 1];
++ struct squashfs_dir_index *index = (struct squashfs_dir_index *) buffer;
++ char str[SQUASHFS_NAME_LEN + 1];
++
++ TRACE("Entered get_dir_index_using_name, i_count %d\n", i_count);
++
++ strncpy(str, name, size);
++ str[size] = '\0';
++
++ for (i = 0; i < i_count; i++) {
++ if (msblk->swap) {
++ struct squashfs_dir_index sindex;
++ squashfs_get_cached_block(s, (char *) &sindex,
++ index_start, index_offset,
++ sizeof(sindex), &index_start,
++ &index_offset);
++ SQUASHFS_SWAP_DIR_INDEX(index, &sindex);
++ } else
++ squashfs_get_cached_block(s, (char *) index,
++ index_start, index_offset,
++ sizeof(struct squashfs_dir_index),
++ &index_start, &index_offset);
++
++ squashfs_get_cached_block(s, index->name, index_start,
++ index_offset, index->size + 1,
++ &index_start, &index_offset);
++
++ index->name[index->size + 1] = '\0';
++
++ if (strcmp(index->name, str) > 0)
++ break;
++
++ length = index->index;
++ *next_block = index->start_block + sblk->directory_table_start;
++ }
++
++ *next_offset = (length + *next_offset) % SQUASHFS_METADATA_SIZE;
++ return length + 3;
++}
++
++
++static int squashfs_readdir(struct file *file, void *dirent, filldir_t filldir)
++{
++ struct inode *i = file->f_dentry->d_inode;
++ struct squashfs_sb_info *msblk = i->i_sb->s_fs_info;
++ struct squashfs_super_block *sblk = &msblk->sblk;
++ long long next_block = SQUASHFS_I(i)->start_block +
++ sblk->directory_table_start;
++ int next_offset = SQUASHFS_I(i)->offset, length = 0, dirs_read = 0,
++ dir_count;
++ struct squashfs_dir_header dirh;
++ char buffer[sizeof(struct squashfs_dir_entry) + SQUASHFS_NAME_LEN + 1];
++ struct squashfs_dir_entry *dire = (struct squashfs_dir_entry *) buffer;
++
++ TRACE("Entered squashfs_readdir [%llx:%x]\n", next_block, next_offset);
++
++ while(file->f_pos < 3) {
++ char *name;
++ int size, i_ino;
++
++ if(file->f_pos == 0) {
++ name = ".";
++ size = 1;
++ i_ino = i->i_ino;
++ } else {
++ name = "..";
++ size = 2;
++ i_ino = SQUASHFS_I(i)->u.s2.parent_inode;
++ }
++ TRACE("Calling filldir(%x, %s, %d, %d, %d, %d)\n",
++ (unsigned int) dirent, name, size, (int)
++ file->f_pos, i_ino,
++ squashfs_filetype_table[1]);
++
++ if (filldir(dirent, name, size,
++ file->f_pos, i_ino,
++ squashfs_filetype_table[1]) < 0) {
++ TRACE("Filldir returned less than 0\n");
++ goto finish;
++ }
++ file->f_pos += size;
++ dirs_read++;
++ }
++
++ length = get_dir_index_using_offset(i->i_sb, &next_block, &next_offset,
++ SQUASHFS_I(i)->u.s2.directory_index_start,
++ SQUASHFS_I(i)->u.s2.directory_index_offset,
++ SQUASHFS_I(i)->u.s2.directory_index_count,
++ file->f_pos);
++
++ while (length < i_size_read(i)) {
++ /* read directory header */
++ if (msblk->swap) {
++ struct squashfs_dir_header sdirh;
++
++ if (!squashfs_get_cached_block(i->i_sb, (char *) &sdirh,
++ next_block, next_offset, sizeof(sdirh),
++ &next_block, &next_offset))
++ goto failed_read;
++
++ length += sizeof(sdirh);
++ SQUASHFS_SWAP_DIR_HEADER(&dirh, &sdirh);
++ } else {
++ if (!squashfs_get_cached_block(i->i_sb, (char *) &dirh,
++ next_block, next_offset, sizeof(dirh),
++ &next_block, &next_offset))
++ goto failed_read;
++
++ length += sizeof(dirh);
++ }
++
++ dir_count = dirh.count + 1;
++ while (dir_count--) {
++ if (msblk->swap) {
++ struct squashfs_dir_entry sdire;
++ if (!squashfs_get_cached_block(i->i_sb, (char *)
++ &sdire, next_block, next_offset,
++ sizeof(sdire), &next_block,
++ &next_offset))
++ goto failed_read;
++
++ length += sizeof(sdire);
++ SQUASHFS_SWAP_DIR_ENTRY(dire, &sdire);
++ } else {
++ if (!squashfs_get_cached_block(i->i_sb, (char *)
++ dire, next_block, next_offset,
++ sizeof(*dire), &next_block,
++ &next_offset))
++ goto failed_read;
++
++ length += sizeof(*dire);
++ }
++
++ if (!squashfs_get_cached_block(i->i_sb, dire->name,
++ next_block, next_offset,
++ dire->size + 1, &next_block,
++ &next_offset))
++ goto failed_read;
++
++ length += dire->size + 1;
++
++ if (file->f_pos >= length)
++ continue;
++
++ dire->name[dire->size + 1] = '\0';
++
++ TRACE("Calling filldir(%x, %s, %d, %d, %x:%x, %d, %d)\n",
++ (unsigned int) dirent, dire->name,
++ dire->size + 1, (int) file->f_pos,
++ dirh.start_block, dire->offset,
++ dirh.inode_number + dire->inode_number,
++ squashfs_filetype_table[dire->type]);
++
++ if (filldir(dirent, dire->name, dire->size + 1,
++ file->f_pos,
++ dirh.inode_number + dire->inode_number,
++ squashfs_filetype_table[dire->type])
++ < 0) {
++ TRACE("Filldir returned less than 0\n");
++ goto finish;
++ }
++ file->f_pos = length;
++ dirs_read++;
++ }
++ }
++
++finish:
++ return dirs_read;
++
++failed_read:
++ ERROR("Unable to read directory block [%llx:%x]\n", next_block,
++ next_offset);
++ return 0;
++}
++
++
++static struct dentry *squashfs_lookup(struct inode *i, struct dentry *dentry,
++ struct nameidata *nd)
++{
++ const unsigned char *name = dentry->d_name.name;
++ int len = dentry->d_name.len;
++ struct inode *inode = NULL;
++ struct squashfs_sb_info *msblk = i->i_sb->s_fs_info;
++ struct squashfs_super_block *sblk = &msblk->sblk;
++ long long next_block = SQUASHFS_I(i)->start_block +
++ sblk->directory_table_start;
++ int next_offset = SQUASHFS_I(i)->offset, length = 0,
++ dir_count;
++ struct squashfs_dir_header dirh;
++ char buffer[sizeof(struct squashfs_dir_entry) + SQUASHFS_NAME_LEN];
++ struct squashfs_dir_entry *dire = (struct squashfs_dir_entry *) buffer;
++
++ TRACE("Entered squashfs_lookup [%llx:%x]\n", next_block, next_offset);
++
++ if (len > SQUASHFS_NAME_LEN)
++ goto exit_loop;
++
++ length = get_dir_index_using_name(i->i_sb, &next_block, &next_offset,
++ SQUASHFS_I(i)->u.s2.directory_index_start,
++ SQUASHFS_I(i)->u.s2.directory_index_offset,
++ SQUASHFS_I(i)->u.s2.directory_index_count, name,
++ len);
++
++ while (length < i_size_read(i)) {
++ /* read directory header */
++ if (msblk->swap) {
++ struct squashfs_dir_header sdirh;
++ if (!squashfs_get_cached_block(i->i_sb, (char *) &sdirh,
++ next_block, next_offset, sizeof(sdirh),
++ &next_block, &next_offset))
++ goto failed_read;
++
++ length += sizeof(sdirh);
++ SQUASHFS_SWAP_DIR_HEADER(&dirh, &sdirh);
++ } else {
++ if (!squashfs_get_cached_block(i->i_sb, (char *) &dirh,
++ next_block, next_offset, sizeof(dirh),
++ &next_block, &next_offset))
++ goto failed_read;
++
++ length += sizeof(dirh);
++ }
++
++ dir_count = dirh.count + 1;
++ while (dir_count--) {
++ if (msblk->swap) {
++ struct squashfs_dir_entry sdire;
++ if (!squashfs_get_cached_block(i->i_sb, (char *)
++ &sdire, next_block,next_offset,
++ sizeof(sdire), &next_block,
++ &next_offset))
++ goto failed_read;
++
++ length += sizeof(sdire);
++ SQUASHFS_SWAP_DIR_ENTRY(dire, &sdire);
++ } else {
++ if (!squashfs_get_cached_block(i->i_sb, (char *)
++ dire, next_block,next_offset,
++ sizeof(*dire), &next_block,
++ &next_offset))
++ goto failed_read;
++
++ length += sizeof(*dire);
++ }
++
++ if (!squashfs_get_cached_block(i->i_sb, dire->name,
++ next_block, next_offset, dire->size + 1,
++ &next_block, &next_offset))
++ goto failed_read;
++
++ length += dire->size + 1;
++
++ if (name[0] < dire->name[0])
++ goto exit_loop;
++
++ if ((len == dire->size + 1) && !strncmp(name,
++ dire->name, len)) {
++ squashfs_inode_t ino =
++ SQUASHFS_MKINODE(dirh.start_block,
++ dire->offset);
++
++ TRACE("calling squashfs_iget for directory "
++ "entry %s, inode %x:%x, %d\n", name,
++ dirh.start_block, dire->offset,
++ dirh.inode_number + dire->inode_number);
++
++ inode = (msblk->iget)(i->i_sb, ino);
++
++ goto exit_loop;
++ }
++ }
++ }
++
++exit_loop:
++ d_add(dentry, inode);
++ return ERR_PTR(0);
++
++failed_read:
++ ERROR("Unable to read directory block [%llx:%x]\n", next_block,
++ next_offset);
++ goto exit_loop;
++}
++
++
++static void squashfs_put_super(struct super_block *s)
++{
++ int i;
++
++ if (s->s_fs_info) {
++ struct squashfs_sb_info *sbi = s->s_fs_info;
++ if (sbi->block_cache)
++ for (i = 0; i < SQUASHFS_CACHED_BLKS; i++)
++ if (sbi->block_cache[i].block !=
++ SQUASHFS_INVALID_BLK)
++ kfree(sbi->block_cache[i].data);
++ if (sbi->fragment)
++ for (i = 0; i < SQUASHFS_CACHED_FRAGMENTS; i++)
++ SQUASHFS_FREE(sbi->fragment[i].data);
++ kfree(sbi->fragment);
++ kfree(sbi->block_cache);
++ kfree(sbi->read_data);
++ kfree(sbi->read_page);
++ kfree(sbi->uid);
++ kfree(sbi->fragment_index);
++ kfree(sbi->fragment_index_2);
++ kfree(sbi->meta_index);
++ kfree(s->s_fs_info);
++ s->s_fs_info = NULL;
++ }
++}
++
++
++static int squashfs_get_sb(struct file_system_type *fs_type,
++ int flags, const char *dev_name, void *data,
++ struct vfsmount *mnt)
++{
++ return get_sb_bdev(fs_type, flags, dev_name, data, squashfs_fill_super, mnt);
++}
++
++
++static int __init init_squashfs_fs(void)
++{
++ int err = init_inodecache();
++ if (err)
++ goto out;
++
++ printk(KERN_INFO "squashfs: version 3.0 (2006/03/15) "
++ "Phillip Lougher\n");
++
++ if (!(stream.workspace = vmalloc(zlib_inflate_workspacesize()))) {
++ ERROR("Failed to allocate zlib workspace\n");
++ destroy_inodecache();
++ err = -ENOMEM;
++ goto out;
++ }
++
++ if ((err = register_filesystem(&squashfs_fs_type))) {
++ vfree(stream.workspace);
++ destroy_inodecache();
++ }
++
++out:
++ return err;
++}
++
++
++static void __exit exit_squashfs_fs(void)
++{
++ vfree(stream.workspace);
++ unregister_filesystem(&squashfs_fs_type);
++ destroy_inodecache();
++}
++
++
++static kmem_cache_t * squashfs_inode_cachep;
++
++
++static struct inode *squashfs_alloc_inode(struct super_block *sb)
++{
++ struct squashfs_inode_info *ei;
++ ei = kmem_cache_alloc(squashfs_inode_cachep, SLAB_KERNEL);
++ if (!ei)
++ return NULL;
++ return &ei->vfs_inode;
++}
++
++
++static void squashfs_destroy_inode(struct inode *inode)
++{
++ kmem_cache_free(squashfs_inode_cachep, SQUASHFS_I(inode));
++}
++
++
++static void init_once(void * foo, kmem_cache_t * cachep, unsigned long flags)
++{
++ struct squashfs_inode_info *ei = foo;
++
++ if ((flags & (SLAB_CTOR_VERIFY|SLAB_CTOR_CONSTRUCTOR)) ==
++ SLAB_CTOR_CONSTRUCTOR)
++ inode_init_once(&ei->vfs_inode);
++}
++
++
++static int __init init_inodecache(void)
++{
++ squashfs_inode_cachep = kmem_cache_create("squashfs_inode_cache",
++ sizeof(struct squashfs_inode_info),
++ 0, SLAB_HWCACHE_ALIGN|SLAB_RECLAIM_ACCOUNT,
++ init_once, NULL);
++ if (squashfs_inode_cachep == NULL)
++ return -ENOMEM;
++ return 0;
++}
++
++
++static void destroy_inodecache(void)
++{
++ kmem_cache_destroy(squashfs_inode_cachep);
++}
++
++
++module_init(init_squashfs_fs);
++module_exit(exit_squashfs_fs);
++MODULE_DESCRIPTION("squashfs, a compressed read-only filesystem");
++MODULE_AUTHOR("Phillip Lougher <phillip@lougher.org.uk>");
++MODULE_LICENSE("GPL");
+diff -urN linux-2.6.19.old/fs/squashfs/Makefile linux-2.6.19.dev/fs/squashfs/Makefile
+--- linux-2.6.19.old/fs/squashfs/Makefile 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/fs/squashfs/Makefile 2006-12-14 03:13:16.000000000 +0100
+@@ -0,0 +1,7 @@
++#
++# Makefile for the linux squashfs routines.
++#
++
++obj-$(CONFIG_SQUASHFS) += squashfs.o
++squashfs-y += inode.o
++squashfs-y += squashfs2_0.o
+diff -urN linux-2.6.19.old/fs/squashfs/squashfs2_0.c linux-2.6.19.dev/fs/squashfs/squashfs2_0.c
+--- linux-2.6.19.old/fs/squashfs/squashfs2_0.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/fs/squashfs/squashfs2_0.c 2006-12-14 03:13:16.000000000 +0100
+@@ -0,0 +1,758 @@
++/*
++ * Squashfs - a compressed read only filesystem for Linux
++ *
++ * Copyright (c) 2002, 2003, 2004, 2005, 2006
++ * Phillip Lougher <phillip@lougher.org.uk>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2,
++ * or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
++ *
++ * squashfs2_0.c
++ */
++
++#include <linux/types.h>
++#include <linux/squashfs_fs.h>
++#include <linux/module.h>
++#include <linux/errno.h>
++#include <linux/slab.h>
++#include <linux/fs.h>
++#include <linux/smp_lock.h>
++#include <linux/slab.h>
++#include <linux/squashfs_fs_sb.h>
++#include <linux/squashfs_fs_i.h>
++#include <linux/buffer_head.h>
++#include <linux/vfs.h>
++#include <linux/init.h>
++#include <linux/dcache.h>
++#include <linux/wait.h>
++#include <linux/zlib.h>
++#include <linux/blkdev.h>
++#include <linux/vmalloc.h>
++#include <asm/uaccess.h>
++#include <asm/semaphore.h>
++
++#include "squashfs.h"
++static int squashfs_readdir_2(struct file *file, void *dirent, filldir_t filldir);
++static struct dentry *squashfs_lookup_2(struct inode *, struct dentry *,
++ struct nameidata *);
++
++static struct file_operations squashfs_dir_ops_2 = {
++ .read = generic_read_dir,
++ .readdir = squashfs_readdir_2
++};
++
++static struct inode_operations squashfs_dir_inode_ops_2 = {
++ .lookup = squashfs_lookup_2
++};
++
++static unsigned char squashfs_filetype_table[] = {
++ DT_UNKNOWN, DT_DIR, DT_REG, DT_LNK, DT_BLK, DT_CHR, DT_FIFO, DT_SOCK
++};
++
++static int read_fragment_index_table_2(struct super_block *s)
++{
++ struct squashfs_sb_info *msblk = s->s_fs_info;
++ struct squashfs_super_block *sblk = &msblk->sblk;
++
++ if (!(msblk->fragment_index_2 = kmalloc(SQUASHFS_FRAGMENT_INDEX_BYTES_2
++ (sblk->fragments), GFP_KERNEL))) {
++ ERROR("Failed to allocate uid/gid table\n");
++ return 0;
++ }
++
++ if (SQUASHFS_FRAGMENT_INDEX_BYTES_2(sblk->fragments) &&
++ !squashfs_read_data(s, (char *)
++ msblk->fragment_index_2,
++ sblk->fragment_table_start,
++ SQUASHFS_FRAGMENT_INDEX_BYTES_2
++ (sblk->fragments) |
++ SQUASHFS_COMPRESSED_BIT_BLOCK, NULL)) {
++ ERROR("unable to read fragment index table\n");
++ return 0;
++ }
++
++ if (msblk->swap) {
++ int i;
++ unsigned int fragment;
++
++ for (i = 0; i < SQUASHFS_FRAGMENT_INDEXES_2(sblk->fragments);
++ i++) {
++ SQUASHFS_SWAP_FRAGMENT_INDEXES_2((&fragment),
++ &msblk->fragment_index_2[i], 1);
++ msblk->fragment_index_2[i] = fragment;
++ }
++ }
++
++ return 1;
++}
++
++
++static int get_fragment_location_2(struct super_block *s, unsigned int fragment,
++ long long *fragment_start_block,
++ unsigned int *fragment_size)
++{
++ struct squashfs_sb_info *msblk = s->s_fs_info;
++ long long start_block =
++ msblk->fragment_index_2[SQUASHFS_FRAGMENT_INDEX_2(fragment)];
++ int offset = SQUASHFS_FRAGMENT_INDEX_OFFSET_2(fragment);
++ struct squashfs_fragment_entry_2 fragment_entry;
++
++ if (msblk->swap) {
++ struct squashfs_fragment_entry_2 sfragment_entry;
++
++ if (!squashfs_get_cached_block(s, (char *) &sfragment_entry,
++ start_block, offset,
++ sizeof(sfragment_entry), &start_block,
++ &offset))
++ goto out;
++ SQUASHFS_SWAP_FRAGMENT_ENTRY_2(&fragment_entry, &sfragment_entry);
++ } else
++ if (!squashfs_get_cached_block(s, (char *) &fragment_entry,
++ start_block, offset,
++ sizeof(fragment_entry), &start_block,
++ &offset))
++ goto out;
++
++ *fragment_start_block = fragment_entry.start_block;
++ *fragment_size = fragment_entry.size;
++
++ return 1;
++
++out:
++ return 0;
++}
++
++
++static struct inode *squashfs_new_inode(struct super_block *s,
++ struct squashfs_base_inode_header_2 *inodeb, unsigned int ino)
++{
++ struct squashfs_sb_info *msblk = s->s_fs_info;
++ struct squashfs_super_block *sblk = &msblk->sblk;
++ struct inode *i = new_inode(s);
++
++ if (i) {
++ i->i_ino = ino;
++ i->i_mtime.tv_sec = sblk->mkfs_time;
++ i->i_atime.tv_sec = sblk->mkfs_time;
++ i->i_ctime.tv_sec = sblk->mkfs_time;
++ i->i_uid = msblk->uid[inodeb->uid];
++ i->i_mode = inodeb->mode;
++ i->i_nlink = 1;
++ i->i_size = 0;
++ if (inodeb->guid == SQUASHFS_GUIDS)
++ i->i_gid = i->i_uid;
++ else
++ i->i_gid = msblk->guid[inodeb->guid];
++ }
++
++ return i;
++}
++
++
++static struct inode *squashfs_iget_2(struct super_block *s, squashfs_inode_t inode)
++{
++ struct inode *i;
++ struct squashfs_sb_info *msblk = s->s_fs_info;
++ struct squashfs_super_block *sblk = &msblk->sblk;
++ unsigned int block = SQUASHFS_INODE_BLK(inode) +
++ sblk->inode_table_start;
++ unsigned int offset = SQUASHFS_INODE_OFFSET(inode);
++ unsigned int ino = SQUASHFS_MK_VFS_INODE(block
++ - sblk->inode_table_start, offset);
++ long long next_block;
++ unsigned int next_offset;
++ union squashfs_inode_header_2 id, sid;
++ struct squashfs_base_inode_header_2 *inodeb = &id.base,
++ *sinodeb = &sid.base;
++
++ TRACE("Entered squashfs_iget\n");
++
++ if (msblk->swap) {
++ if (!squashfs_get_cached_block(s, (char *) sinodeb, block,
++ offset, sizeof(*sinodeb), &next_block,
++ &next_offset))
++ goto failed_read;
++ SQUASHFS_SWAP_BASE_INODE_HEADER_2(inodeb, sinodeb,
++ sizeof(*sinodeb));
++ } else
++ if (!squashfs_get_cached_block(s, (char *) inodeb, block,
++ offset, sizeof(*inodeb), &next_block,
++ &next_offset))
++ goto failed_read;
++
++ switch(inodeb->inode_type) {
++ case SQUASHFS_FILE_TYPE: {
++ struct squashfs_reg_inode_header_2 *inodep = &id.reg;
++ struct squashfs_reg_inode_header_2 *sinodep = &sid.reg;
++ long long frag_blk;
++ unsigned int frag_size;
++
++ if (msblk->swap) {
++ if (!squashfs_get_cached_block(s, (char *)
++ sinodep, block, offset,
++ sizeof(*sinodep), &next_block,
++ &next_offset))
++ goto failed_read;
++ SQUASHFS_SWAP_REG_INODE_HEADER_2(inodep, sinodep);
++ } else
++ if (!squashfs_get_cached_block(s, (char *)
++ inodep, block, offset,
++ sizeof(*inodep), &next_block,
++ &next_offset))
++ goto failed_read;
++
++ frag_blk = SQUASHFS_INVALID_BLK;
++ if (inodep->fragment != SQUASHFS_INVALID_FRAG &&
++ !get_fragment_location_2(s,
++ inodep->fragment, &frag_blk, &frag_size))
++ goto failed_read;
++
++ if((i = squashfs_new_inode(s, inodeb, ino)) == NULL)
++ goto failed_read1;
++
++ i->i_size = inodep->file_size;
++ i->i_fop = &generic_ro_fops;
++ i->i_mode |= S_IFREG;
++ i->i_mtime.tv_sec = inodep->mtime;
++ i->i_atime.tv_sec = inodep->mtime;
++ i->i_ctime.tv_sec = inodep->mtime;
++ i->i_blocks = ((i->i_size - 1) >> 9) + 1;
++ i->i_blksize = PAGE_CACHE_SIZE;
++ SQUASHFS_I(i)->u.s1.fragment_start_block = frag_blk;
++ SQUASHFS_I(i)->u.s1.fragment_size = frag_size;
++ SQUASHFS_I(i)->u.s1.fragment_offset = inodep->offset;
++ SQUASHFS_I(i)->start_block = inodep->start_block;
++ SQUASHFS_I(i)->u.s1.block_list_start = next_block;
++ SQUASHFS_I(i)->offset = next_offset;
++ if (sblk->block_size > 4096)
++ i->i_data.a_ops = &squashfs_aops;
++ else
++ i->i_data.a_ops = &squashfs_aops_4K;
++
++ TRACE("File inode %x:%x, start_block %x, "
++ "block_list_start %llx, offset %x\n",
++ SQUASHFS_INODE_BLK(inode), offset,
++ inodep->start_block, next_block,
++ next_offset);
++ break;
++ }
++ case SQUASHFS_DIR_TYPE: {
++ struct squashfs_dir_inode_header_2 *inodep = &id.dir;
++ struct squashfs_dir_inode_header_2 *sinodep = &sid.dir;
++
++ if (msblk->swap) {
++ if (!squashfs_get_cached_block(s, (char *)
++ sinodep, block, offset,
++ sizeof(*sinodep), &next_block,
++ &next_offset))
++ goto failed_read;
++ SQUASHFS_SWAP_DIR_INODE_HEADER_2(inodep, sinodep);
++ } else
++ if (!squashfs_get_cached_block(s, (char *)
++ inodep, block, offset,
++ sizeof(*inodep), &next_block,
++ &next_offset))
++ goto failed_read;
++
++ if((i = squashfs_new_inode(s, inodeb, ino)) == NULL)
++ goto failed_read1;
++
++ i->i_size = inodep->file_size;
++ i->i_op = &squashfs_dir_inode_ops_2;
++ i->i_fop = &squashfs_dir_ops_2;
++ i->i_mode |= S_IFDIR;
++ i->i_mtime.tv_sec = inodep->mtime;
++ i->i_atime.tv_sec = inodep->mtime;
++ i->i_ctime.tv_sec = inodep->mtime;
++ SQUASHFS_I(i)->start_block = inodep->start_block;
++ SQUASHFS_I(i)->offset = inodep->offset;
++ SQUASHFS_I(i)->u.s2.directory_index_count = 0;
++ SQUASHFS_I(i)->u.s2.parent_inode = 0;
++
++ TRACE("Directory inode %x:%x, start_block %x, offset "
++ "%x\n", SQUASHFS_INODE_BLK(inode),
++ offset, inodep->start_block,
++ inodep->offset);
++ break;
++ }
++ case SQUASHFS_LDIR_TYPE: {
++ struct squashfs_ldir_inode_header_2 *inodep = &id.ldir;
++ struct squashfs_ldir_inode_header_2 *sinodep = &sid.ldir;
++
++ if (msblk->swap) {
++ if (!squashfs_get_cached_block(s, (char *)
++ sinodep, block, offset,
++ sizeof(*sinodep), &next_block,
++ &next_offset))
++ goto failed_read;
++ SQUASHFS_SWAP_LDIR_INODE_HEADER_2(inodep,
++ sinodep);
++ } else
++ if (!squashfs_get_cached_block(s, (char *)
++ inodep, block, offset,
++ sizeof(*inodep), &next_block,
++ &next_offset))
++ goto failed_read;
++
++ if((i = squashfs_new_inode(s, inodeb, ino)) == NULL)
++ goto failed_read1;
++
++ i->i_size = inodep->file_size;
++ i->i_op = &squashfs_dir_inode_ops_2;
++ i->i_fop = &squashfs_dir_ops_2;
++ i->i_mode |= S_IFDIR;
++ i->i_mtime.tv_sec = inodep->mtime;
++ i->i_atime.tv_sec = inodep->mtime;
++ i->i_ctime.tv_sec = inodep->mtime;
++ SQUASHFS_I(i)->start_block = inodep->start_block;
++ SQUASHFS_I(i)->offset = inodep->offset;
++ SQUASHFS_I(i)->u.s2.directory_index_start = next_block;
++ SQUASHFS_I(i)->u.s2.directory_index_offset =
++ next_offset;
++ SQUASHFS_I(i)->u.s2.directory_index_count =
++ inodep->i_count;
++ SQUASHFS_I(i)->u.s2.parent_inode = 0;
++
++ TRACE("Long directory inode %x:%x, start_block %x, "
++ "offset %x\n",
++ SQUASHFS_INODE_BLK(inode), offset,
++ inodep->start_block, inodep->offset);
++ break;
++ }
++ case SQUASHFS_SYMLINK_TYPE: {
++ struct squashfs_symlink_inode_header_2 *inodep =
++ &id.symlink;
++ struct squashfs_symlink_inode_header_2 *sinodep =
++ &sid.symlink;
++
++ if (msblk->swap) {
++ if (!squashfs_get_cached_block(s, (char *)
++ sinodep, block, offset,
++ sizeof(*sinodep), &next_block,
++ &next_offset))
++ goto failed_read;
++ SQUASHFS_SWAP_SYMLINK_INODE_HEADER_2(inodep,
++ sinodep);
++ } else
++ if (!squashfs_get_cached_block(s, (char *)
++ inodep, block, offset,
++ sizeof(*inodep), &next_block,
++ &next_offset))
++ goto failed_read;
++
++ if((i = squashfs_new_inode(s, inodeb, ino)) == NULL)
++ goto failed_read1;
++
++ i->i_size = inodep->symlink_size;
++ i->i_op = &page_symlink_inode_operations;
++ i->i_data.a_ops = &squashfs_symlink_aops;
++ i->i_mode |= S_IFLNK;
++ SQUASHFS_I(i)->start_block = next_block;
++ SQUASHFS_I(i)->offset = next_offset;
++
++ TRACE("Symbolic link inode %x:%x, start_block %llx, "
++ "offset %x\n",
++ SQUASHFS_INODE_BLK(inode), offset,
++ next_block, next_offset);
++ break;
++ }
++ case SQUASHFS_BLKDEV_TYPE:
++ case SQUASHFS_CHRDEV_TYPE: {
++ struct squashfs_dev_inode_header_2 *inodep = &id.dev;
++ struct squashfs_dev_inode_header_2 *sinodep = &sid.dev;
++
++ if (msblk->swap) {
++ if (!squashfs_get_cached_block(s, (char *)
++ sinodep, block, offset,
++ sizeof(*sinodep), &next_block,
++ &next_offset))
++ goto failed_read;
++ SQUASHFS_SWAP_DEV_INODE_HEADER_2(inodep, sinodep);
++ } else
++ if (!squashfs_get_cached_block(s, (char *)
++ inodep, block, offset,
++ sizeof(*inodep), &next_block,
++ &next_offset))
++ goto failed_read;
++
++ if ((i = squashfs_new_inode(s, inodeb, ino)) == NULL)
++ goto failed_read1;
++
++ i->i_mode |= (inodeb->inode_type ==
++ SQUASHFS_CHRDEV_TYPE) ? S_IFCHR :
++ S_IFBLK;
++ init_special_inode(i, i->i_mode,
++ old_decode_dev(inodep->rdev));
++
++ TRACE("Device inode %x:%x, rdev %x\n",
++ SQUASHFS_INODE_BLK(inode), offset,
++ inodep->rdev);
++ break;
++ }
++ case SQUASHFS_FIFO_TYPE:
++ case SQUASHFS_SOCKET_TYPE: {
++ if ((i = squashfs_new_inode(s, inodeb, ino)) == NULL)
++ goto failed_read1;
++
++ i->i_mode |= (inodeb->inode_type == SQUASHFS_FIFO_TYPE)
++ ? S_IFIFO : S_IFSOCK;
++ init_special_inode(i, i->i_mode, 0);
++ break;
++ }
++ default:
++ ERROR("Unknown inode type %d in squashfs_iget!\n",
++ inodeb->inode_type);
++ goto failed_read1;
++ }
++
++ insert_inode_hash(i);
++ return i;
++
++failed_read:
++ ERROR("Unable to read inode [%x:%x]\n", block, offset);
++
++failed_read1:
++ return NULL;
++}
++
++
++static int get_dir_index_using_offset(struct super_block *s, long long
++ *next_block, unsigned int *next_offset,
++ long long index_start,
++ unsigned int index_offset, int i_count,
++ long long f_pos)
++{
++ struct squashfs_sb_info *msblk = s->s_fs_info;
++ struct squashfs_super_block *sblk = &msblk->sblk;
++ int i, length = 0;
++ struct squashfs_dir_index_2 index;
++
++ TRACE("Entered get_dir_index_using_offset, i_count %d, f_pos %d\n",
++ i_count, (unsigned int) f_pos);
++
++ if (f_pos == 0)
++ goto finish;
++
++ for (i = 0; i < i_count; i++) {
++ if (msblk->swap) {
++ struct squashfs_dir_index_2 sindex;
++ squashfs_get_cached_block(s, (char *) &sindex,
++ index_start, index_offset,
++ sizeof(sindex), &index_start,
++ &index_offset);
++ SQUASHFS_SWAP_DIR_INDEX_2(&index, &sindex);
++ } else
++ squashfs_get_cached_block(s, (char *) &index,
++ index_start, index_offset,
++ sizeof(index), &index_start,
++ &index_offset);
++
++ if (index.index > f_pos)
++ break;
++
++ squashfs_get_cached_block(s, NULL, index_start, index_offset,
++ index.size + 1, &index_start,
++ &index_offset);
++
++ length = index.index;
++ *next_block = index.start_block + sblk->directory_table_start;
++ }
++
++ *next_offset = (length + *next_offset) % SQUASHFS_METADATA_SIZE;
++
++finish:
++ return length;
++}
++
++
++static int get_dir_index_using_name(struct super_block *s, long long
++ *next_block, unsigned int *next_offset,
++ long long index_start,
++ unsigned int index_offset, int i_count,
++ const char *name, int size)
++{
++ struct squashfs_sb_info *msblk = s->s_fs_info;
++ struct squashfs_super_block *sblk = &msblk->sblk;
++ int i, length = 0;
++ char buffer[sizeof(struct squashfs_dir_index_2) + SQUASHFS_NAME_LEN + 1];
++ struct squashfs_dir_index_2 *index = (struct squashfs_dir_index_2 *) buffer;
++ char str[SQUASHFS_NAME_LEN + 1];
++
++ TRACE("Entered get_dir_index_using_name, i_count %d\n", i_count);
++
++ strncpy(str, name, size);
++ str[size] = '\0';
++
++ for (i = 0; i < i_count; i++) {
++ if (msblk->swap) {
++ struct squashfs_dir_index_2 sindex;
++ squashfs_get_cached_block(s, (char *) &sindex,
++ index_start, index_offset,
++ sizeof(sindex), &index_start,
++ &index_offset);
++ SQUASHFS_SWAP_DIR_INDEX_2(index, &sindex);
++ } else
++ squashfs_get_cached_block(s, (char *) index,
++ index_start, index_offset,
++ sizeof(struct squashfs_dir_index_2),
++ &index_start, &index_offset);
++
++ squashfs_get_cached_block(s, index->name, index_start,
++ index_offset, index->size + 1,
++ &index_start, &index_offset);
++
++ index->name[index->size + 1] = '\0';
++
++ if (strcmp(index->name, str) > 0)
++ break;
++
++ length = index->index;
++ *next_block = index->start_block + sblk->directory_table_start;
++ }
++
++ *next_offset = (length + *next_offset) % SQUASHFS_METADATA_SIZE;
++ return length;
++}
++
++
++static int squashfs_readdir_2(struct file *file, void *dirent, filldir_t filldir)
++{
++ struct inode *i = file->f_dentry->d_inode;
++ struct squashfs_sb_info *msblk = i->i_sb->s_fs_info;
++ struct squashfs_super_block *sblk = &msblk->sblk;
++ long long next_block = SQUASHFS_I(i)->start_block +
++ sblk->directory_table_start;
++ int next_offset = SQUASHFS_I(i)->offset, length = 0, dirs_read = 0,
++ dir_count;
++ struct squashfs_dir_header_2 dirh;
++ char buffer[sizeof(struct squashfs_dir_entry_2) + SQUASHFS_NAME_LEN + 1];
++ struct squashfs_dir_entry_2 *dire = (struct squashfs_dir_entry_2 *) buffer;
++
++ TRACE("Entered squashfs_readdir_2 [%llx:%x]\n", next_block, next_offset);
++
++ length = get_dir_index_using_offset(i->i_sb, &next_block, &next_offset,
++ SQUASHFS_I(i)->u.s2.directory_index_start,
++ SQUASHFS_I(i)->u.s2.directory_index_offset,
++ SQUASHFS_I(i)->u.s2.directory_index_count,
++ file->f_pos);
++
++ while (length < i_size_read(i)) {
++ /* read directory header */
++ if (msblk->swap) {
++ struct squashfs_dir_header_2 sdirh;
++
++ if (!squashfs_get_cached_block(i->i_sb, (char *) &sdirh,
++ next_block, next_offset, sizeof(sdirh),
++ &next_block, &next_offset))
++ goto failed_read;
++
++ length += sizeof(sdirh);
++ SQUASHFS_SWAP_DIR_HEADER_2(&dirh, &sdirh);
++ } else {
++ if (!squashfs_get_cached_block(i->i_sb, (char *) &dirh,
++ next_block, next_offset, sizeof(dirh),
++ &next_block, &next_offset))
++ goto failed_read;
++
++ length += sizeof(dirh);
++ }
++
++ dir_count = dirh.count + 1;
++ while (dir_count--) {
++ if (msblk->swap) {
++ struct squashfs_dir_entry_2 sdire;
++ if (!squashfs_get_cached_block(i->i_sb, (char *)
++ &sdire, next_block, next_offset,
++ sizeof(sdire), &next_block,
++ &next_offset))
++ goto failed_read;
++
++ length += sizeof(sdire);
++ SQUASHFS_SWAP_DIR_ENTRY_2(dire, &sdire);
++ } else {
++ if (!squashfs_get_cached_block(i->i_sb, (char *)
++ dire, next_block, next_offset,
++ sizeof(*dire), &next_block,
++ &next_offset))
++ goto failed_read;
++
++ length += sizeof(*dire);
++ }
++
++ if (!squashfs_get_cached_block(i->i_sb, dire->name,
++ next_block, next_offset,
++ dire->size + 1, &next_block,
++ &next_offset))
++ goto failed_read;
++
++ length += dire->size + 1;
++
++ if (file->f_pos >= length)
++ continue;
++
++ dire->name[dire->size + 1] = '\0';
++
++ TRACE("Calling filldir(%x, %s, %d, %d, %x:%x, %d)\n",
++ (unsigned int) dirent, dire->name,
++ dire->size + 1, (int) file->f_pos,
++ dirh.start_block, dire->offset,
++ squashfs_filetype_table[dire->type]);
++
++ if (filldir(dirent, dire->name, dire->size + 1,
++ file->f_pos, SQUASHFS_MK_VFS_INODE(
++ dirh.start_block, dire->offset),
++ squashfs_filetype_table[dire->type])
++ < 0) {
++ TRACE("Filldir returned less than 0\n");
++ goto finish;
++ }
++ file->f_pos = length;
++ dirs_read++;
++ }
++ }
++
++finish:
++ return dirs_read;
++
++failed_read:
++ ERROR("Unable to read directory block [%llx:%x]\n", next_block,
++ next_offset);
++ return 0;
++}
++
++
++static struct dentry *squashfs_lookup_2(struct inode *i, struct dentry *dentry,
++ struct nameidata *nd)
++{
++ const unsigned char *name = dentry->d_name.name;
++ int len = dentry->d_name.len;
++ struct inode *inode = NULL;
++ struct squashfs_sb_info *msblk = i->i_sb->s_fs_info;
++ struct squashfs_super_block *sblk = &msblk->sblk;
++ long long next_block = SQUASHFS_I(i)->start_block +
++ sblk->directory_table_start;
++ int next_offset = SQUASHFS_I(i)->offset, length = 0,
++ dir_count;
++ struct squashfs_dir_header_2 dirh;
++ char buffer[sizeof(struct squashfs_dir_entry_2) + SQUASHFS_NAME_LEN];
++ struct squashfs_dir_entry_2 *dire = (struct squashfs_dir_entry_2 *) buffer;
++ int sorted = sblk->s_major == 2 && sblk->s_minor >= 1;
++
++ TRACE("Entered squashfs_lookup [%llx:%x]\n", next_block, next_offset);
++
++ if (len > SQUASHFS_NAME_LEN)
++ goto exit_loop;
++
++ length = get_dir_index_using_name(i->i_sb, &next_block, &next_offset,
++ SQUASHFS_I(i)->u.s2.directory_index_start,
++ SQUASHFS_I(i)->u.s2.directory_index_offset,
++ SQUASHFS_I(i)->u.s2.directory_index_count, name,
++ len);
++
++ while (length < i_size_read(i)) {
++ /* read directory header */
++ if (msblk->swap) {
++ struct squashfs_dir_header_2 sdirh;
++ if (!squashfs_get_cached_block(i->i_sb, (char *) &sdirh,
++ next_block, next_offset, sizeof(sdirh),
++ &next_block, &next_offset))
++ goto failed_read;
++
++ length += sizeof(sdirh);
++ SQUASHFS_SWAP_DIR_HEADER_2(&dirh, &sdirh);
++ } else {
++ if (!squashfs_get_cached_block(i->i_sb, (char *) &dirh,
++ next_block, next_offset, sizeof(dirh),
++ &next_block, &next_offset))
++ goto failed_read;
++
++ length += sizeof(dirh);
++ }
++
++ dir_count = dirh.count + 1;
++ while (dir_count--) {
++ if (msblk->swap) {
++ struct squashfs_dir_entry_2 sdire;
++ if (!squashfs_get_cached_block(i->i_sb, (char *)
++ &sdire, next_block,next_offset,
++ sizeof(sdire), &next_block,
++ &next_offset))
++ goto failed_read;
++
++ length += sizeof(sdire);
++ SQUASHFS_SWAP_DIR_ENTRY_2(dire, &sdire);
++ } else {
++ if (!squashfs_get_cached_block(i->i_sb, (char *)
++ dire, next_block,next_offset,
++ sizeof(*dire), &next_block,
++ &next_offset))
++ goto failed_read;
++
++ length += sizeof(*dire);
++ }
++
++ if (!squashfs_get_cached_block(i->i_sb, dire->name,
++ next_block, next_offset, dire->size + 1,
++ &next_block, &next_offset))
++ goto failed_read;
++
++ length += dire->size + 1;
++
++ if (sorted && name[0] < dire->name[0])
++ goto exit_loop;
++
++ if ((len == dire->size + 1) && !strncmp(name,
++ dire->name, len)) {
++ squashfs_inode_t ino =
++ SQUASHFS_MKINODE(dirh.start_block,
++ dire->offset);
++
++ TRACE("calling squashfs_iget for directory "
++ "entry %s, inode %x:%x, %lld\n", name,
++ dirh.start_block, dire->offset, ino);
++
++ inode = (msblk->iget)(i->i_sb, ino);
++
++ goto exit_loop;
++ }
++ }
++ }
++
++exit_loop:
++ d_add(dentry, inode);
++ return ERR_PTR(0);
++
++failed_read:
++ ERROR("Unable to read directory block [%llx:%x]\n", next_block,
++ next_offset);
++ goto exit_loop;
++}
++
++
++int squashfs_2_0_supported(struct squashfs_sb_info *msblk)
++{
++ struct squashfs_super_block *sblk = &msblk->sblk;
++
++ msblk->iget = squashfs_iget_2;
++ msblk->read_fragment_index_table = read_fragment_index_table_2;
++
++ sblk->bytes_used = sblk->bytes_used_2;
++ sblk->uid_start = sblk->uid_start_2;
++ sblk->guid_start = sblk->guid_start_2;
++ sblk->inode_table_start = sblk->inode_table_start_2;
++ sblk->directory_table_start = sblk->directory_table_start_2;
++ sblk->fragment_table_start = sblk->fragment_table_start_2;
++
++ return 1;
++}
+diff -urN linux-2.6.19.old/fs/squashfs/squashfs.h linux-2.6.19.dev/fs/squashfs/squashfs.h
+--- linux-2.6.19.old/fs/squashfs/squashfs.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/fs/squashfs/squashfs.h 2006-12-14 03:13:16.000000000 +0100
+@@ -0,0 +1,86 @@
++/*
++ * Squashfs - a compressed read only filesystem for Linux
++ *
++ * Copyright (c) 2002, 2003, 2004, 2005, 2006
++ * Phillip Lougher <phillip@lougher.org.uk>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2,
++ * or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
++ *
++ * squashfs.h
++ */
++
++#ifdef CONFIG_SQUASHFS_1_0_COMPATIBILITY
++#undef CONFIG_SQUASHFS_1_0_COMPATIBILITY
++#endif
++
++#ifdef SQUASHFS_TRACE
++#define TRACE(s, args...) printk(KERN_NOTICE "SQUASHFS: "s, ## args)
++#else
++#define TRACE(s, args...) {}
++#endif
++
++#define ERROR(s, args...) printk(KERN_ERR "SQUASHFS error: "s, ## args)
++
++#define SERROR(s, args...) do { \
++ if (!silent) \
++ printk(KERN_ERR "SQUASHFS error: "s, ## args);\
++ } while(0)
++
++#define WARNING(s, args...) printk(KERN_WARNING "SQUASHFS: "s, ## args)
++
++static inline struct squashfs_inode_info *SQUASHFS_I(struct inode *inode)
++{
++ return list_entry(inode, struct squashfs_inode_info, vfs_inode);
++}
++
++#if defined(CONFIG_SQUASHFS_1_0_COMPATIBILITY ) || defined(CONFIG_SQUASHFS_2_0_COMPATIBILITY)
++#define SQSH_EXTERN
++extern unsigned int squashfs_read_data(struct super_block *s, char *buffer,
++ long long index, unsigned int length,
++ long long *next_index);
++extern int squashfs_get_cached_block(struct super_block *s, char *buffer,
++ long long block, unsigned int offset,
++ int length, long long *next_block,
++ unsigned int *next_offset);
++extern void release_cached_fragment(struct squashfs_sb_info *msblk, struct
++ squashfs_fragment_cache *fragment);
++extern struct squashfs_fragment_cache *get_cached_fragment(struct super_block
++ *s, long long start_block,
++ int length);
++extern struct address_space_operations squashfs_symlink_aops;
++extern struct address_space_operations squashfs_aops;
++extern struct address_space_operations squashfs_aops_4K;
++extern struct inode_operations squashfs_dir_inode_ops;
++#else
++#define SQSH_EXTERN static
++#endif
++
++#ifdef CONFIG_SQUASHFS_1_0_COMPATIBILITY
++extern int squashfs_1_0_supported(struct squashfs_sb_info *msblk);
++#else
++static inline int squashfs_1_0_supported(struct squashfs_sb_info *msblk)
++{
++ return 0;
++}
++#endif
++
++#ifdef CONFIG_SQUASHFS_2_0_COMPATIBILITY
++extern int squashfs_2_0_supported(struct squashfs_sb_info *msblk);
++#else
++static inline int squashfs_2_0_supported(struct squashfs_sb_info *msblk)
++{
++ return 0;
++}
++#endif
+diff -urN linux-2.6.19.old/include/linux/squashfs_fs.h linux-2.6.19.dev/include/linux/squashfs_fs.h
+--- linux-2.6.19.old/include/linux/squashfs_fs.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/include/linux/squashfs_fs.h 2006-12-14 03:13:16.000000000 +0100
+@@ -0,0 +1,911 @@
++#ifndef SQUASHFS_FS
++#define SQUASHFS_FS
++
++/*
++ * Squashfs
++ *
++ * Copyright (c) 2002, 2003, 2004, 2005, 2006
++ * Phillip Lougher <phillip@lougher.org.uk>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2,
++ * or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
++ *
++ * squashfs_fs.h
++ */
++
++#ifndef CONFIG_SQUASHFS_2_0_COMPATIBILITY
++#define CONFIG_SQUASHFS_2_0_COMPATIBILITY
++#endif
++
++#ifdef CONFIG_SQUASHFS_VMALLOC
++#define SQUASHFS_ALLOC(a) vmalloc(a)
++#define SQUASHFS_FREE(a) vfree(a)
++#else
++#define SQUASHFS_ALLOC(a) kmalloc(a, GFP_KERNEL)
++#define SQUASHFS_FREE(a) kfree(a)
++#endif
++#define SQUASHFS_CACHED_FRAGMENTS CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE
++#define SQUASHFS_MAJOR 3
++#define SQUASHFS_MINOR 0
++#define SQUASHFS_MAGIC 0x73717368
++#define SQUASHFS_MAGIC_SWAP 0x68737173
++#define SQUASHFS_START 0
++
++/* size of metadata (inode and directory) blocks */
++#define SQUASHFS_METADATA_SIZE 8192
++#define SQUASHFS_METADATA_LOG 13
++
++/* default size of data blocks */
++#define SQUASHFS_FILE_SIZE 65536
++#define SQUASHFS_FILE_LOG 16
++
++#define SQUASHFS_FILE_MAX_SIZE 65536
++
++/* Max number of uids and gids */
++#define SQUASHFS_UIDS 256
++#define SQUASHFS_GUIDS 255
++
++/* Max length of filename (not 255) */
++#define SQUASHFS_NAME_LEN 256
++
++#define SQUASHFS_INVALID ((long long) 0xffffffffffff)
++#define SQUASHFS_INVALID_FRAG ((unsigned int) 0xffffffff)
++#define SQUASHFS_INVALID_BLK ((long long) -1)
++#define SQUASHFS_USED_BLK ((long long) -2)
++
++/* Filesystem flags */
++#define SQUASHFS_NOI 0
++#define SQUASHFS_NOD 1
++#define SQUASHFS_CHECK 2
++#define SQUASHFS_NOF 3
++#define SQUASHFS_NO_FRAG 4
++#define SQUASHFS_ALWAYS_FRAG 5
++#define SQUASHFS_DUPLICATE 6
++
++#define SQUASHFS_BIT(flag, bit) ((flag >> bit) & 1)
++
++#define SQUASHFS_UNCOMPRESSED_INODES(flags) SQUASHFS_BIT(flags, \
++ SQUASHFS_NOI)
++
++#define SQUASHFS_UNCOMPRESSED_DATA(flags) SQUASHFS_BIT(flags, \
++ SQUASHFS_NOD)
++
++#define SQUASHFS_UNCOMPRESSED_FRAGMENTS(flags) SQUASHFS_BIT(flags, \
++ SQUASHFS_NOF)
++
++#define SQUASHFS_NO_FRAGMENTS(flags) SQUASHFS_BIT(flags, \
++ SQUASHFS_NO_FRAG)
++
++#define SQUASHFS_ALWAYS_FRAGMENTS(flags) SQUASHFS_BIT(flags, \
++ SQUASHFS_ALWAYS_FRAG)
++
++#define SQUASHFS_DUPLICATES(flags) SQUASHFS_BIT(flags, \
++ SQUASHFS_DUPLICATE)
++
++#define SQUASHFS_CHECK_DATA(flags) SQUASHFS_BIT(flags, \
++ SQUASHFS_CHECK)
++
++#define SQUASHFS_MKFLAGS(noi, nod, check_data, nof, no_frag, always_frag, \
++ duplicate_checking) (noi | (nod << 1) | (check_data << 2) \
++ | (nof << 3) | (no_frag << 4) | (always_frag << 5) | \
++ (duplicate_checking << 6))
++
++/* Max number of types and file types */
++#define SQUASHFS_DIR_TYPE 1
++#define SQUASHFS_FILE_TYPE 2
++#define SQUASHFS_SYMLINK_TYPE 3
++#define SQUASHFS_BLKDEV_TYPE 4
++#define SQUASHFS_CHRDEV_TYPE 5
++#define SQUASHFS_FIFO_TYPE 6
++#define SQUASHFS_SOCKET_TYPE 7
++#define SQUASHFS_LDIR_TYPE 8
++#define SQUASHFS_LREG_TYPE 9
++
++/* 1.0 filesystem type definitions */
++#define SQUASHFS_TYPES 5
++#define SQUASHFS_IPC_TYPE 0
++
++/* Flag whether block is compressed or uncompressed, bit is set if block is
++ * uncompressed */
++#define SQUASHFS_COMPRESSED_BIT (1 << 15)
++
++#define SQUASHFS_COMPRESSED_SIZE(B) (((B) & ~SQUASHFS_COMPRESSED_BIT) ? \
++ (B) & ~SQUASHFS_COMPRESSED_BIT : SQUASHFS_COMPRESSED_BIT)
++
++#define SQUASHFS_COMPRESSED(B) (!((B) & SQUASHFS_COMPRESSED_BIT))
++
++#define SQUASHFS_COMPRESSED_BIT_BLOCK (1 << 24)
++
++#define SQUASHFS_COMPRESSED_SIZE_BLOCK(B) (((B) & \
++ ~SQUASHFS_COMPRESSED_BIT_BLOCK) ? (B) & \
++ ~SQUASHFS_COMPRESSED_BIT_BLOCK : SQUASHFS_COMPRESSED_BIT_BLOCK)
++
++#define SQUASHFS_COMPRESSED_BLOCK(B) (!((B) & SQUASHFS_COMPRESSED_BIT_BLOCK))
++
++/*
++ * Inode number ops. Inodes consist of a compressed block number, and an
++ * uncompressed offset within that block
++ */
++#define SQUASHFS_INODE_BLK(a) ((unsigned int) ((a) >> 16))
++
++#define SQUASHFS_INODE_OFFSET(a) ((unsigned int) ((a) & 0xffff))
++
++#define SQUASHFS_MKINODE(A, B) ((squashfs_inode_t)(((squashfs_inode_t) (A)\
++ << 16) + (B)))
++
++/* Compute 32 bit VFS inode number from squashfs inode number */
++#define SQUASHFS_MK_VFS_INODE(a, b) ((unsigned int) (((a) << 8) + \
++ ((b) >> 2) + 1))
++/* XXX */
++
++/* Translate between VFS mode and squashfs mode */
++#define SQUASHFS_MODE(a) ((a) & 0xfff)
++
++/* fragment and fragment table defines */
++#define SQUASHFS_FRAGMENT_BYTES(A) (A * sizeof(struct squashfs_fragment_entry))
++
++#define SQUASHFS_FRAGMENT_INDEX(A) (SQUASHFS_FRAGMENT_BYTES(A) / \
++ SQUASHFS_METADATA_SIZE)
++
++#define SQUASHFS_FRAGMENT_INDEX_OFFSET(A) (SQUASHFS_FRAGMENT_BYTES(A) % \
++ SQUASHFS_METADATA_SIZE)
++
++#define SQUASHFS_FRAGMENT_INDEXES(A) ((SQUASHFS_FRAGMENT_BYTES(A) + \
++ SQUASHFS_METADATA_SIZE - 1) / \
++ SQUASHFS_METADATA_SIZE)
++
++#define SQUASHFS_FRAGMENT_INDEX_BYTES(A) (SQUASHFS_FRAGMENT_INDEXES(A) *\
++ sizeof(long long))
++
++/* cached data constants for filesystem */
++#define SQUASHFS_CACHED_BLKS 8
++
++#define SQUASHFS_MAX_FILE_SIZE_LOG 64
++
++#define SQUASHFS_MAX_FILE_SIZE ((long long) 1 << \
++ (SQUASHFS_MAX_FILE_SIZE_LOG - 2))
++
++#define SQUASHFS_MARKER_BYTE 0xff
++
++/* meta index cache */
++#define SQUASHFS_META_INDEXES (SQUASHFS_METADATA_SIZE / sizeof(unsigned int))
++#define SQUASHFS_META_ENTRIES 31
++#define SQUASHFS_META_NUMBER 8
++#define SQUASHFS_SLOTS 4
++
++struct meta_entry {
++ long long data_block;
++ unsigned int index_block;
++ unsigned short offset;
++ unsigned short pad;
++};
++
++struct meta_index {
++ unsigned int inode_number;
++ unsigned int offset;
++ unsigned short entries;
++ unsigned short skip;
++ unsigned short locked;
++ unsigned short pad;
++ struct meta_entry meta_entry[SQUASHFS_META_ENTRIES];
++};
++
++
++/*
++ * definitions for structures on disk
++ */
++
++typedef long long squashfs_block_t;
++typedef long long squashfs_inode_t;
++
++struct squashfs_super_block {
++ unsigned int s_magic;
++ unsigned int inodes;
++ unsigned int bytes_used_2;
++ unsigned int uid_start_2;
++ unsigned int guid_start_2;
++ unsigned int inode_table_start_2;
++ unsigned int directory_table_start_2;
++ unsigned int s_major:16;
++ unsigned int s_minor:16;
++ unsigned int block_size_1:16;
++ unsigned int block_log:16;
++ unsigned int flags:8;
++ unsigned int no_uids:8;
++ unsigned int no_guids:8;
++ unsigned int mkfs_time /* time of filesystem creation */;
++ squashfs_inode_t root_inode;
++ unsigned int block_size;
++ unsigned int fragments;
++ unsigned int fragment_table_start_2;
++ long long bytes_used;
++ long long uid_start;
++ long long guid_start;
++ long long inode_table_start;
++ long long directory_table_start;
++ long long fragment_table_start;
++ long long unused;
++} __attribute__ ((packed));
++
++struct squashfs_dir_index {
++ unsigned int index;
++ unsigned int start_block;
++ unsigned char size;
++ unsigned char name[0];
++} __attribute__ ((packed));
++
++#define SQUASHFS_BASE_INODE_HEADER \
++ unsigned int inode_type:4; \
++ unsigned int mode:12; \
++ unsigned int uid:8; \
++ unsigned int guid:8; \
++ unsigned int mtime; \
++ unsigned int inode_number;
++
++struct squashfs_base_inode_header {
++ SQUASHFS_BASE_INODE_HEADER;
++} __attribute__ ((packed));
++
++struct squashfs_ipc_inode_header {
++ SQUASHFS_BASE_INODE_HEADER;
++ unsigned int nlink;
++} __attribute__ ((packed));
++
++struct squashfs_dev_inode_header {
++ SQUASHFS_BASE_INODE_HEADER;
++ unsigned int nlink;
++ unsigned short rdev;
++} __attribute__ ((packed));
++
++struct squashfs_symlink_inode_header {
++ SQUASHFS_BASE_INODE_HEADER;
++ unsigned int nlink;
++ unsigned short symlink_size;
++ char symlink[0];
++} __attribute__ ((packed));
++
++struct squashfs_reg_inode_header {
++ SQUASHFS_BASE_INODE_HEADER;
++ squashfs_block_t start_block;
++ unsigned int fragment;
++ unsigned int offset;
++ unsigned int file_size;
++ unsigned short block_list[0];
++} __attribute__ ((packed));
++
++struct squashfs_lreg_inode_header {
++ SQUASHFS_BASE_INODE_HEADER;
++ unsigned int nlink;
++ squashfs_block_t start_block;
++ unsigned int fragment;
++ unsigned int offset;
++ long long file_size;
++ unsigned short block_list[0];
++} __attribute__ ((packed));
++
++struct squashfs_dir_inode_header {
++ SQUASHFS_BASE_INODE_HEADER;
++ unsigned int nlink;
++ unsigned int file_size:19;
++ unsigned int offset:13;
++ unsigned int start_block;
++ unsigned int parent_inode;
++} __attribute__ ((packed));
++
++struct squashfs_ldir_inode_header {
++ SQUASHFS_BASE_INODE_HEADER;
++ unsigned int nlink;
++ unsigned int file_size:27;
++ unsigned int offset:13;
++ unsigned int start_block;
++ unsigned int i_count:16;
++ unsigned int parent_inode;
++ struct squashfs_dir_index index[0];
++} __attribute__ ((packed));
++
++union squashfs_inode_header {
++ struct squashfs_base_inode_header base;
++ struct squashfs_dev_inode_header dev;
++ struct squashfs_symlink_inode_header symlink;
++ struct squashfs_reg_inode_header reg;
++ struct squashfs_lreg_inode_header lreg;
++ struct squashfs_dir_inode_header dir;
++ struct squashfs_ldir_inode_header ldir;
++ struct squashfs_ipc_inode_header ipc;
++};
++
++struct squashfs_dir_entry {
++ unsigned int offset:13;
++ unsigned int type:3;
++ unsigned int size:8;
++ int inode_number:16;
++ char name[0];
++} __attribute__ ((packed));
++
++struct squashfs_dir_header {
++ unsigned int count:8;
++ unsigned int start_block;
++ unsigned int inode_number;
++} __attribute__ ((packed));
++
++struct squashfs_fragment_entry {
++ long long start_block;
++ unsigned int size;
++ unsigned int unused;
++} __attribute__ ((packed));
++
++extern int squashfs_uncompress_block(void *d, int dstlen, void *s, int srclen);
++extern int squashfs_uncompress_init(void);
++extern int squashfs_uncompress_exit(void);
++
++/*
++ * macros to convert each packed bitfield structure from little endian to big
++ * endian and vice versa. These are needed when creating or using a filesystem
++ * on a machine with different byte ordering to the target architecture.
++ *
++ */
++
++#define SQUASHFS_SWAP_START \
++ int bits;\
++ int b_pos;\
++ unsigned long long val;\
++ unsigned char *s;\
++ unsigned char *d;
++
++#define SQUASHFS_SWAP_SUPER_BLOCK(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_super_block));\
++ SQUASHFS_SWAP((s)->s_magic, d, 0, 32);\
++ SQUASHFS_SWAP((s)->inodes, d, 32, 32);\
++ SQUASHFS_SWAP((s)->bytes_used_2, d, 64, 32);\
++ SQUASHFS_SWAP((s)->uid_start_2, d, 96, 32);\
++ SQUASHFS_SWAP((s)->guid_start_2, d, 128, 32);\
++ SQUASHFS_SWAP((s)->inode_table_start_2, d, 160, 32);\
++ SQUASHFS_SWAP((s)->directory_table_start_2, d, 192, 32);\
++ SQUASHFS_SWAP((s)->s_major, d, 224, 16);\
++ SQUASHFS_SWAP((s)->s_minor, d, 240, 16);\
++ SQUASHFS_SWAP((s)->block_size_1, d, 256, 16);\
++ SQUASHFS_SWAP((s)->block_log, d, 272, 16);\
++ SQUASHFS_SWAP((s)->flags, d, 288, 8);\
++ SQUASHFS_SWAP((s)->no_uids, d, 296, 8);\
++ SQUASHFS_SWAP((s)->no_guids, d, 304, 8);\
++ SQUASHFS_SWAP((s)->mkfs_time, d, 312, 32);\
++ SQUASHFS_SWAP((s)->root_inode, d, 344, 64);\
++ SQUASHFS_SWAP((s)->block_size, d, 408, 32);\
++ SQUASHFS_SWAP((s)->fragments, d, 440, 32);\
++ SQUASHFS_SWAP((s)->fragment_table_start_2, d, 472, 32);\
++ SQUASHFS_SWAP((s)->bytes_used, d, 504, 64);\
++ SQUASHFS_SWAP((s)->uid_start, d, 568, 64);\
++ SQUASHFS_SWAP((s)->guid_start, d, 632, 64);\
++ SQUASHFS_SWAP((s)->inode_table_start, d, 696, 64);\
++ SQUASHFS_SWAP((s)->directory_table_start, d, 760, 64);\
++ SQUASHFS_SWAP((s)->fragment_table_start, d, 824, 64);\
++ SQUASHFS_SWAP((s)->unused, d, 888, 64);\
++}
++
++#define SQUASHFS_SWAP_BASE_INODE_CORE(s, d, n)\
++ SQUASHFS_MEMSET(s, d, n);\
++ SQUASHFS_SWAP((s)->inode_type, d, 0, 4);\
++ SQUASHFS_SWAP((s)->mode, d, 4, 12);\
++ SQUASHFS_SWAP((s)->uid, d, 16, 8);\
++ SQUASHFS_SWAP((s)->guid, d, 24, 8);\
++ SQUASHFS_SWAP((s)->mtime, d, 32, 32);\
++ SQUASHFS_SWAP((s)->inode_number, d, 64, 32);
++
++#define SQUASHFS_SWAP_BASE_INODE_HEADER(s, d, n) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, n)\
++}
++
++#define SQUASHFS_SWAP_IPC_INODE_HEADER(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, \
++ sizeof(struct squashfs_ipc_inode_header))\
++ SQUASHFS_SWAP((s)->nlink, d, 96, 32);\
++}
++
++#define SQUASHFS_SWAP_DEV_INODE_HEADER(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, \
++ sizeof(struct squashfs_dev_inode_header)); \
++ SQUASHFS_SWAP((s)->nlink, d, 96, 32);\
++ SQUASHFS_SWAP((s)->rdev, d, 128, 16);\
++}
++
++#define SQUASHFS_SWAP_SYMLINK_INODE_HEADER(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, \
++ sizeof(struct squashfs_symlink_inode_header));\
++ SQUASHFS_SWAP((s)->nlink, d, 96, 32);\
++ SQUASHFS_SWAP((s)->symlink_size, d, 128, 16);\
++}
++
++#define SQUASHFS_SWAP_REG_INODE_HEADER(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, \
++ sizeof(struct squashfs_reg_inode_header));\
++ SQUASHFS_SWAP((s)->start_block, d, 96, 64);\
++ SQUASHFS_SWAP((s)->fragment, d, 160, 32);\
++ SQUASHFS_SWAP((s)->offset, d, 192, 32);\
++ SQUASHFS_SWAP((s)->file_size, d, 224, 32);\
++}
++
++#define SQUASHFS_SWAP_LREG_INODE_HEADER(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, \
++ sizeof(struct squashfs_lreg_inode_header));\
++ SQUASHFS_SWAP((s)->nlink, d, 96, 32);\
++ SQUASHFS_SWAP((s)->start_block, d, 128, 64);\
++ SQUASHFS_SWAP((s)->fragment, d, 192, 32);\
++ SQUASHFS_SWAP((s)->offset, d, 224, 32);\
++ SQUASHFS_SWAP((s)->file_size, d, 256, 64);\
++}
++
++#define SQUASHFS_SWAP_DIR_INODE_HEADER(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, \
++ sizeof(struct squashfs_dir_inode_header));\
++ SQUASHFS_SWAP((s)->nlink, d, 96, 32);\
++ SQUASHFS_SWAP((s)->file_size, d, 128, 19);\
++ SQUASHFS_SWAP((s)->offset, d, 147, 13);\
++ SQUASHFS_SWAP((s)->start_block, d, 160, 32);\
++ SQUASHFS_SWAP((s)->parent_inode, d, 192, 32);\
++}
++
++#define SQUASHFS_SWAP_LDIR_INODE_HEADER(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_SWAP_BASE_INODE_CORE(s, d, \
++ sizeof(struct squashfs_ldir_inode_header));\
++ SQUASHFS_SWAP((s)->nlink, d, 96, 32);\
++ SQUASHFS_SWAP((s)->file_size, d, 128, 27);\
++ SQUASHFS_SWAP((s)->offset, d, 155, 13);\
++ SQUASHFS_SWAP((s)->start_block, d, 168, 32);\
++ SQUASHFS_SWAP((s)->i_count, d, 200, 16);\
++ SQUASHFS_SWAP((s)->parent_inode, d, 216, 32);\
++}
++
++#define SQUASHFS_SWAP_DIR_INDEX(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_dir_index));\
++ SQUASHFS_SWAP((s)->index, d, 0, 32);\
++ SQUASHFS_SWAP((s)->start_block, d, 32, 32);\
++ SQUASHFS_SWAP((s)->size, d, 64, 8);\
++}
++
++#define SQUASHFS_SWAP_DIR_HEADER(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_dir_header));\
++ SQUASHFS_SWAP((s)->count, d, 0, 8);\
++ SQUASHFS_SWAP((s)->start_block, d, 8, 32);\
++ SQUASHFS_SWAP((s)->inode_number, d, 40, 32);\
++}
++
++#define SQUASHFS_SWAP_DIR_ENTRY(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_dir_entry));\
++ SQUASHFS_SWAP((s)->offset, d, 0, 13);\
++ SQUASHFS_SWAP((s)->type, d, 13, 3);\
++ SQUASHFS_SWAP((s)->size, d, 16, 8);\
++ SQUASHFS_SWAP((s)->inode_number, d, 24, 16);\
++}
++
++#define SQUASHFS_SWAP_FRAGMENT_ENTRY(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_fragment_entry));\
++ SQUASHFS_SWAP((s)->start_block, d, 0, 64);\
++ SQUASHFS_SWAP((s)->size, d, 64, 32);\
++}
++
++#define SQUASHFS_SWAP_SHORTS(s, d, n) {\
++ int entry;\
++ int bit_position;\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_MEMSET(s, d, n * 2);\
++ for(entry = 0, bit_position = 0; entry < n; entry++, bit_position += \
++ 16)\
++ SQUASHFS_SWAP(s[entry], d, bit_position, 16);\
++}
++
++#define SQUASHFS_SWAP_INTS(s, d, n) {\
++ int entry;\
++ int bit_position;\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_MEMSET(s, d, n * 4);\
++ for(entry = 0, bit_position = 0; entry < n; entry++, bit_position += \
++ 32)\
++ SQUASHFS_SWAP(s[entry], d, bit_position, 32);\
++}
++
++#define SQUASHFS_SWAP_LONG_LONGS(s, d, n) {\
++ int entry;\
++ int bit_position;\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_MEMSET(s, d, n * 8);\
++ for(entry = 0, bit_position = 0; entry < n; entry++, bit_position += \
++ 64)\
++ SQUASHFS_SWAP(s[entry], d, bit_position, 64);\
++}
++
++#define SQUASHFS_SWAP_DATA(s, d, n, bits) {\
++ int entry;\
++ int bit_position;\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_MEMSET(s, d, n * bits / 8);\
++ for(entry = 0, bit_position = 0; entry < n; entry++, bit_position += \
++ bits)\
++ SQUASHFS_SWAP(s[entry], d, bit_position, bits);\
++}
++
++#define SQUASHFS_SWAP_FRAGMENT_INDEXES(s, d, n) SQUASHFS_SWAP_LONG_LONGS(s, d, n)
++
++#ifdef CONFIG_SQUASHFS_1_0_COMPATIBILITY
++
++struct squashfs_base_inode_header_1 {
++ unsigned int inode_type:4;
++ unsigned int mode:12; /* protection */
++ unsigned int uid:4; /* index into uid table */
++ unsigned int guid:4; /* index into guid table */
++} __attribute__ ((packed));
++
++struct squashfs_ipc_inode_header_1 {
++ unsigned int inode_type:4;
++ unsigned int mode:12; /* protection */
++ unsigned int uid:4; /* index into uid table */
++ unsigned int guid:4; /* index into guid table */
++ unsigned int type:4;
++ unsigned int offset:4;
++} __attribute__ ((packed));
++
++struct squashfs_dev_inode_header_1 {
++ unsigned int inode_type:4;
++ unsigned int mode:12; /* protection */
++ unsigned int uid:4; /* index into uid table */
++ unsigned int guid:4; /* index into guid table */
++ unsigned short rdev;
++} __attribute__ ((packed));
++
++struct squashfs_symlink_inode_header_1 {
++ unsigned int inode_type:4;
++ unsigned int mode:12; /* protection */
++ unsigned int uid:4; /* index into uid table */
++ unsigned int guid:4; /* index into guid table */
++ unsigned short symlink_size;
++ char symlink[0];
++} __attribute__ ((packed));
++
++struct squashfs_reg_inode_header_1 {
++ unsigned int inode_type:4;
++ unsigned int mode:12; /* protection */
++ unsigned int uid:4; /* index into uid table */
++ unsigned int guid:4; /* index into guid table */
++ unsigned int mtime;
++ unsigned int start_block;
++ unsigned int file_size:32;
++ unsigned short block_list[0];
++} __attribute__ ((packed));
++
++struct squashfs_dir_inode_header_1 {
++ unsigned int inode_type:4;
++ unsigned int mode:12; /* protection */
++ unsigned int uid:4; /* index into uid table */
++ unsigned int guid:4; /* index into guid table */
++ unsigned int file_size:19;
++ unsigned int offset:13;
++ unsigned int mtime;
++ unsigned int start_block:24;
++} __attribute__ ((packed));
++
++#define SQUASHFS_SWAP_BASE_INODE_CORE_1(s, d, n) \
++ SQUASHFS_MEMSET(s, d, n);\
++ SQUASHFS_SWAP((s)->inode_type, d, 0, 4);\
++ SQUASHFS_SWAP((s)->mode, d, 4, 12);\
++ SQUASHFS_SWAP((s)->uid, d, 16, 4);\
++ SQUASHFS_SWAP((s)->guid, d, 20, 4);
++
++#define SQUASHFS_SWAP_BASE_INODE_HEADER_1(s, d, n) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_SWAP_BASE_INODE_CORE_1(s, d, n)\
++}
++
++#define SQUASHFS_SWAP_IPC_INODE_HEADER_1(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_SWAP_BASE_INODE_CORE_1(s, d, \
++ sizeof(struct squashfs_ipc_inode_header_1));\
++ SQUASHFS_SWAP((s)->type, d, 24, 4);\
++ SQUASHFS_SWAP((s)->offset, d, 28, 4);\
++}
++
++#define SQUASHFS_SWAP_DEV_INODE_HEADER_1(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_SWAP_BASE_INODE_CORE_1(s, d, \
++ sizeof(struct squashfs_dev_inode_header_1));\
++ SQUASHFS_SWAP((s)->rdev, d, 24, 16);\
++}
++
++#define SQUASHFS_SWAP_SYMLINK_INODE_HEADER_1(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_SWAP_BASE_INODE_CORE_1(s, d, \
++ sizeof(struct squashfs_symlink_inode_header_1));\
++ SQUASHFS_SWAP((s)->symlink_size, d, 24, 16);\
++}
++
++#define SQUASHFS_SWAP_REG_INODE_HEADER_1(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_SWAP_BASE_INODE_CORE_1(s, d, \
++ sizeof(struct squashfs_reg_inode_header_1));\
++ SQUASHFS_SWAP((s)->mtime, d, 24, 32);\
++ SQUASHFS_SWAP((s)->start_block, d, 56, 32);\
++ SQUASHFS_SWAP((s)->file_size, d, 88, 32);\
++}
++
++#define SQUASHFS_SWAP_DIR_INODE_HEADER_1(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_SWAP_BASE_INODE_CORE_1(s, d, \
++ sizeof(struct squashfs_dir_inode_header_1));\
++ SQUASHFS_SWAP((s)->file_size, d, 24, 19);\
++ SQUASHFS_SWAP((s)->offset, d, 43, 13);\
++ SQUASHFS_SWAP((s)->mtime, d, 56, 32);\
++ SQUASHFS_SWAP((s)->start_block, d, 88, 24);\
++}
++
++#endif
++
++#ifdef CONFIG_SQUASHFS_2_0_COMPATIBILITY
++
++struct squashfs_dir_index_2 {
++ unsigned int index:27;
++ unsigned int start_block:29;
++ unsigned char size;
++ unsigned char name[0];
++} __attribute__ ((packed));
++
++struct squashfs_base_inode_header_2 {
++ unsigned int inode_type:4;
++ unsigned int mode:12; /* protection */
++ unsigned int uid:8; /* index into uid table */
++ unsigned int guid:8; /* index into guid table */
++} __attribute__ ((packed));
++
++struct squashfs_ipc_inode_header_2 {
++ unsigned int inode_type:4;
++ unsigned int mode:12; /* protection */
++ unsigned int uid:8; /* index into uid table */
++ unsigned int guid:8; /* index into guid table */
++} __attribute__ ((packed));
++
++struct squashfs_dev_inode_header_2 {
++ unsigned int inode_type:4;
++ unsigned int mode:12; /* protection */
++ unsigned int uid:8; /* index into uid table */
++ unsigned int guid:8; /* index into guid table */
++ unsigned short rdev;
++} __attribute__ ((packed));
++
++struct squashfs_symlink_inode_header_2 {
++ unsigned int inode_type:4;
++ unsigned int mode:12; /* protection */
++ unsigned int uid:8; /* index into uid table */
++ unsigned int guid:8; /* index into guid table */
++ unsigned short symlink_size;
++ char symlink[0];
++} __attribute__ ((packed));
++
++struct squashfs_reg_inode_header_2 {
++ unsigned int inode_type:4;
++ unsigned int mode:12; /* protection */
++ unsigned int uid:8; /* index into uid table */
++ unsigned int guid:8; /* index into guid table */
++ unsigned int mtime;
++ unsigned int start_block;
++ unsigned int fragment;
++ unsigned int offset;
++ unsigned int file_size:32;
++ unsigned short block_list[0];
++} __attribute__ ((packed));
++
++struct squashfs_dir_inode_header_2 {
++ unsigned int inode_type:4;
++ unsigned int mode:12; /* protection */
++ unsigned int uid:8; /* index into uid table */
++ unsigned int guid:8; /* index into guid table */
++ unsigned int file_size:19;
++ unsigned int offset:13;
++ unsigned int mtime;
++ unsigned int start_block:24;
++} __attribute__ ((packed));
++
++struct squashfs_ldir_inode_header_2 {
++ unsigned int inode_type:4;
++ unsigned int mode:12; /* protection */
++ unsigned int uid:8; /* index into uid table */
++ unsigned int guid:8; /* index into guid table */
++ unsigned int file_size:27;
++ unsigned int offset:13;
++ unsigned int mtime;
++ unsigned int start_block:24;
++ unsigned int i_count:16;
++ struct squashfs_dir_index_2 index[0];
++} __attribute__ ((packed));
++
++union squashfs_inode_header_2 {
++ struct squashfs_base_inode_header_2 base;
++ struct squashfs_dev_inode_header_2 dev;
++ struct squashfs_symlink_inode_header_2 symlink;
++ struct squashfs_reg_inode_header_2 reg;
++ struct squashfs_dir_inode_header_2 dir;
++ struct squashfs_ldir_inode_header_2 ldir;
++ struct squashfs_ipc_inode_header_2 ipc;
++};
++
++struct squashfs_dir_header_2 {
++ unsigned int count:8;
++ unsigned int start_block:24;
++} __attribute__ ((packed));
++
++struct squashfs_dir_entry_2 {
++ unsigned int offset:13;
++ unsigned int type:3;
++ unsigned int size:8;
++ char name[0];
++} __attribute__ ((packed));
++
++struct squashfs_fragment_entry_2 {
++ unsigned int start_block;
++ unsigned int size;
++} __attribute__ ((packed));
++
++#define SQUASHFS_SWAP_BASE_INODE_CORE_2(s, d, n)\
++ SQUASHFS_MEMSET(s, d, n);\
++ SQUASHFS_SWAP((s)->inode_type, d, 0, 4);\
++ SQUASHFS_SWAP((s)->mode, d, 4, 12);\
++ SQUASHFS_SWAP((s)->uid, d, 16, 8);\
++ SQUASHFS_SWAP((s)->guid, d, 24, 8);\
++
++#define SQUASHFS_SWAP_BASE_INODE_HEADER_2(s, d, n) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_SWAP_BASE_INODE_CORE_2(s, d, n)\
++}
++
++#define SQUASHFS_SWAP_IPC_INODE_HEADER_2(s, d) \
++ SQUASHFS_SWAP_BASE_INODE_HEADER_2(s, d, sizeof(struct squashfs_ipc_inode_header_2))
++
++#define SQUASHFS_SWAP_DEV_INODE_HEADER_2(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_SWAP_BASE_INODE_CORE_2(s, d, \
++ sizeof(struct squashfs_dev_inode_header_2)); \
++ SQUASHFS_SWAP((s)->rdev, d, 32, 16);\
++}
++
++#define SQUASHFS_SWAP_SYMLINK_INODE_HEADER_2(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_SWAP_BASE_INODE_CORE_2(s, d, \
++ sizeof(struct squashfs_symlink_inode_header_2));\
++ SQUASHFS_SWAP((s)->symlink_size, d, 32, 16);\
++}
++
++#define SQUASHFS_SWAP_REG_INODE_HEADER_2(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_SWAP_BASE_INODE_CORE_2(s, d, \
++ sizeof(struct squashfs_reg_inode_header_2));\
++ SQUASHFS_SWAP((s)->mtime, d, 32, 32);\
++ SQUASHFS_SWAP((s)->start_block, d, 64, 32);\
++ SQUASHFS_SWAP((s)->fragment, d, 96, 32);\
++ SQUASHFS_SWAP((s)->offset, d, 128, 32);\
++ SQUASHFS_SWAP((s)->file_size, d, 160, 32);\
++}
++
++#define SQUASHFS_SWAP_DIR_INODE_HEADER_2(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_SWAP_BASE_INODE_CORE_2(s, d, \
++ sizeof(struct squashfs_dir_inode_header_2));\
++ SQUASHFS_SWAP((s)->file_size, d, 32, 19);\
++ SQUASHFS_SWAP((s)->offset, d, 51, 13);\
++ SQUASHFS_SWAP((s)->mtime, d, 64, 32);\
++ SQUASHFS_SWAP((s)->start_block, d, 96, 24);\
++}
++
++#define SQUASHFS_SWAP_LDIR_INODE_HEADER_2(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_SWAP_BASE_INODE_CORE_2(s, d, \
++ sizeof(struct squashfs_ldir_inode_header_2));\
++ SQUASHFS_SWAP((s)->file_size, d, 32, 27);\
++ SQUASHFS_SWAP((s)->offset, d, 59, 13);\
++ SQUASHFS_SWAP((s)->mtime, d, 72, 32);\
++ SQUASHFS_SWAP((s)->start_block, d, 104, 24);\
++ SQUASHFS_SWAP((s)->i_count, d, 128, 16);\
++}
++
++#define SQUASHFS_SWAP_DIR_INDEX_2(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_dir_index_2));\
++ SQUASHFS_SWAP((s)->index, d, 0, 27);\
++ SQUASHFS_SWAP((s)->start_block, d, 27, 29);\
++ SQUASHFS_SWAP((s)->size, d, 56, 8);\
++}
++#define SQUASHFS_SWAP_DIR_HEADER_2(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_dir_header_2));\
++ SQUASHFS_SWAP((s)->count, d, 0, 8);\
++ SQUASHFS_SWAP((s)->start_block, d, 8, 24);\
++}
++
++#define SQUASHFS_SWAP_DIR_ENTRY_2(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_dir_entry_2));\
++ SQUASHFS_SWAP((s)->offset, d, 0, 13);\
++ SQUASHFS_SWAP((s)->type, d, 13, 3);\
++ SQUASHFS_SWAP((s)->size, d, 16, 8);\
++}
++
++#define SQUASHFS_SWAP_FRAGMENT_ENTRY_2(s, d) {\
++ SQUASHFS_SWAP_START\
++ SQUASHFS_MEMSET(s, d, sizeof(struct squashfs_fragment_entry_2));\
++ SQUASHFS_SWAP((s)->start_block, d, 0, 32);\
++ SQUASHFS_SWAP((s)->size, d, 32, 32);\
++}
++
++#define SQUASHFS_SWAP_FRAGMENT_INDEXES_2(s, d, n) SQUASHFS_SWAP_INTS(s, d, n)
++
++/* fragment and fragment table defines */
++#define SQUASHFS_FRAGMENT_BYTES_2(A) (A * sizeof(struct squashfs_fragment_entry_2))
++
++#define SQUASHFS_FRAGMENT_INDEX_2(A) (SQUASHFS_FRAGMENT_BYTES_2(A) / \
++ SQUASHFS_METADATA_SIZE)
++
++#define SQUASHFS_FRAGMENT_INDEX_OFFSET_2(A) (SQUASHFS_FRAGMENT_BYTES_2(A) % \
++ SQUASHFS_METADATA_SIZE)
++
++#define SQUASHFS_FRAGMENT_INDEXES_2(A) ((SQUASHFS_FRAGMENT_BYTES_2(A) + \
++ SQUASHFS_METADATA_SIZE - 1) / \
++ SQUASHFS_METADATA_SIZE)
++
++#define SQUASHFS_FRAGMENT_INDEX_BYTES_2(A) (SQUASHFS_FRAGMENT_INDEXES_2(A) *\
++ sizeof(int))
++
++#endif
++
++#ifdef __KERNEL__
++
++/*
++ * macros used to swap each structure entry, taking into account
++ * bitfields and different bitfield placing conventions on differing
++ * architectures
++ */
++
++#include <asm/byteorder.h>
++
++#ifdef __BIG_ENDIAN
++ /* convert from little endian to big endian */
++#define SQUASHFS_SWAP(value, p, pos, tbits) _SQUASHFS_SWAP(value, p, pos, \
++ tbits, b_pos)
++#else
++ /* convert from big endian to little endian */
++#define SQUASHFS_SWAP(value, p, pos, tbits) _SQUASHFS_SWAP(value, p, pos, \
++ tbits, 64 - tbits - b_pos)
++#endif
++
++#define _SQUASHFS_SWAP(value, p, pos, tbits, SHIFT) {\
++ b_pos = pos % 8;\
++ val = 0;\
++ s = (unsigned char *)p + (pos / 8);\
++ d = ((unsigned char *) &val) + 7;\
++ for(bits = 0; bits < (tbits + b_pos); bits += 8) \
++ *d-- = *s++;\
++ value = (val >> (SHIFT))/* & ((1 << tbits) - 1)*/;\
++}
++
++#define SQUASHFS_MEMSET(s, d, n) memset(s, 0, n);
++
++#endif
++#endif
+diff -urN linux-2.6.19.old/include/linux/squashfs_fs_i.h linux-2.6.19.dev/include/linux/squashfs_fs_i.h
+--- linux-2.6.19.old/include/linux/squashfs_fs_i.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/include/linux/squashfs_fs_i.h 2006-12-14 03:13:16.000000000 +0100
+@@ -0,0 +1,45 @@
++#ifndef SQUASHFS_FS_I
++#define SQUASHFS_FS_I
++/*
++ * Squashfs
++ *
++ * Copyright (c) 2002, 2003, 2004, 2005, 2006
++ * Phillip Lougher <phillip@lougher.org.uk>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2,
++ * or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
++ *
++ * squashfs_fs_i.h
++ */
++
++struct squashfs_inode_info {
++ long long start_block;
++ unsigned int offset;
++ union {
++ struct {
++ long long fragment_start_block;
++ unsigned int fragment_size;
++ unsigned int fragment_offset;
++ long long block_list_start;
++ } s1;
++ struct {
++ long long directory_index_start;
++ unsigned int directory_index_offset;
++ unsigned int directory_index_count;
++ unsigned int parent_inode;
++ } s2;
++ } u;
++ struct inode vfs_inode;
++};
++#endif
+diff -urN linux-2.6.19.old/include/linux/squashfs_fs_sb.h linux-2.6.19.dev/include/linux/squashfs_fs_sb.h
+--- linux-2.6.19.old/include/linux/squashfs_fs_sb.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/include/linux/squashfs_fs_sb.h 2006-12-14 03:13:16.000000000 +0100
+@@ -0,0 +1,74 @@
++#ifndef SQUASHFS_FS_SB
++#define SQUASHFS_FS_SB
++/*
++ * Squashfs
++ *
++ * Copyright (c) 2002, 2003, 2004, 2005, 2006
++ * Phillip Lougher <phillip@lougher.org.uk>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version 2,
++ * or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
++ *
++ * squashfs_fs_sb.h
++ */
++
++#include <linux/squashfs_fs.h>
++
++struct squashfs_cache {
++ long long block;
++ int length;
++ long long next_index;
++ char *data;
++};
++
++struct squashfs_fragment_cache {
++ long long block;
++ int length;
++ unsigned int locked;
++ char *data;
++};
++
++struct squashfs_sb_info {
++ struct squashfs_super_block sblk;
++ int devblksize;
++ int devblksize_log2;
++ int swap;
++ struct squashfs_cache *block_cache;
++ struct squashfs_fragment_cache *fragment;
++ int next_cache;
++ int next_fragment;
++ int next_meta_index;
++ unsigned int *uid;
++ unsigned int *guid;
++ long long *fragment_index;
++ unsigned int *fragment_index_2;
++ unsigned int read_size;
++ char *read_data;
++ char *read_page;
++ struct semaphore read_data_mutex;
++ struct semaphore read_page_mutex;
++ struct semaphore block_cache_mutex;
++ struct semaphore fragment_mutex;
++ struct semaphore meta_index_mutex;
++ wait_queue_head_t waitq;
++ wait_queue_head_t fragment_wait_queue;
++ struct meta_index *meta_index;
++ struct inode *(*iget)(struct super_block *s, squashfs_inode_t \
++ inode);
++ long long (*read_blocklist)(struct inode *inode, int \
++ index, int readahead_blks, char *block_list, \
++ unsigned short **block_p, unsigned int *bsize);
++ int (*read_fragment_index_table)(struct super_block *s);
++};
++#endif
+diff -urN linux-2.6.19.old/init/do_mounts_rd.c linux-2.6.19.dev/init/do_mounts_rd.c
+--- linux-2.6.19.old/init/do_mounts_rd.c 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/init/do_mounts_rd.c 2006-12-14 03:13:16.000000000 +0100
+@@ -5,6 +5,7 @@
+ #include <linux/ext2_fs.h>
+ #include <linux/romfs_fs.h>
+ #include <linux/cramfs_fs.h>
++#include <linux/squashfs_fs.h>
+ #include <linux/initrd.h>
+ #include <linux/string.h>
+
+@@ -39,6 +40,7 @@
+ * numbers could not be found.
+ *
+ * We currently check for the following magic numbers:
++ * squashfs
+ * minix
+ * ext2
+ * romfs
+@@ -53,6 +55,7 @@
+ struct ext2_super_block *ext2sb;
+ struct romfs_super_block *romfsb;
+ struct cramfs_super *cramfsb;
++ struct squashfs_super_block *squashfsb;
+ int nblocks = -1;
+ unsigned char *buf;
+
+@@ -64,6 +67,7 @@
+ ext2sb = (struct ext2_super_block *) buf;
+ romfsb = (struct romfs_super_block *) buf;
+ cramfsb = (struct cramfs_super *) buf;
++ squashfsb = (struct squashfs_super_block *) buf;
+ memset(buf, 0xe5, size);
+
+ /*
+@@ -101,6 +105,15 @@
+ goto done;
+ }
+
++ /* squashfs is at block zero too */
++ if (squashfsb->s_magic == SQUASHFS_MAGIC) {
++ printk(KERN_NOTICE
++ "RAMDISK: squashfs filesystem found at block %d\n",
++ start_block);
++ nblocks = (squashfsb->bytes_used+BLOCK_SIZE-1)>>BLOCK_SIZE_BITS;
++ goto done;
++ }
++
+ /*
+ * Read block 1 to test for minix and ext2 superblock
+ */
--- /dev/null
+--- linux-2.6.19.old/lib/Makefile 2007-04-18 17:41:22.679403384 +0200
++++ linux-2.6.19.dev/lib/Makefile 2007-04-18 17:41:43.303268080 +0200
+@@ -54,6 +54,7 @@
+ obj-$(CONFIG_AUDIT_GENERIC) += audit.o
+
+ obj-$(CONFIG_SWIOTLB) += swiotlb.o
++obj-y += LzmaDecode.o
+
+ hostprogs-y := gen_crc32table
+ clean-files := crc32table.h
+--- linux-2.6.19.old/lib/LzmaDecode.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/lib/LzmaDecode.c 2006-12-14 03:13:20.000000000 +0100
+@@ -0,0 +1,663 @@
++/*
++ LzmaDecode.c
++ LZMA Decoder
++
++ LZMA SDK 4.05 Copyright (c) 1999-2004 Igor Pavlov (2004-08-25)
++ http://www.7-zip.org/
++
++ LZMA SDK is licensed under two licenses:
++ 1) GNU Lesser General Public License (GNU LGPL)
++ 2) Common Public License (CPL)
++ It means that you can select one of these two licenses and
++ follow rules of that license.
++
++ SPECIAL EXCEPTION:
++ Igor Pavlov, as the author of this code, expressly permits you to
++ statically or dynamically link your code (or bind by name) to the
++ interfaces of this file without subjecting your linked code to the
++ terms of the CPL or GNU LGPL. Any modifications or additions
++ to this file, however, are subject to the LGPL or CPL terms.
++*/
++
++#include <linux/LzmaDecode.h>
++
++#ifndef Byte
++#define Byte unsigned char
++#endif
++
++#define kNumTopBits 24
++#define kTopValue ((UInt32)1 << kNumTopBits)
++
++#define kNumBitModelTotalBits 11
++#define kBitModelTotal (1 << kNumBitModelTotalBits)
++#define kNumMoveBits 5
++
++typedef struct _CRangeDecoder
++{
++ Byte *Buffer;
++ Byte *BufferLim;
++ UInt32 Range;
++ UInt32 Code;
++ #ifdef _LZMA_IN_CB
++ ILzmaInCallback *InCallback;
++ int Result;
++ #endif
++ int ExtraBytes;
++} CRangeDecoder;
++
++Byte RangeDecoderReadByte(CRangeDecoder *rd)
++{
++ if (rd->Buffer == rd->BufferLim)
++ {
++ #ifdef _LZMA_IN_CB
++ UInt32 size;
++ rd->Result = rd->InCallback->Read(rd->InCallback, &rd->Buffer, &size);
++ rd->BufferLim = rd->Buffer + size;
++ if (size == 0)
++ #endif
++ {
++ rd->ExtraBytes = 1;
++ return 0xFF;
++ }
++ }
++ return (*rd->Buffer++);
++}
++
++/* #define ReadByte (*rd->Buffer++) */
++#define ReadByte (RangeDecoderReadByte(rd))
++
++void RangeDecoderInit(CRangeDecoder *rd,
++ #ifdef _LZMA_IN_CB
++ ILzmaInCallback *inCallback
++ #else
++ Byte *stream, UInt32 bufferSize
++ #endif
++ )
++{
++ int i;
++ #ifdef _LZMA_IN_CB
++ rd->InCallback = inCallback;
++ rd->Buffer = rd->BufferLim = 0;
++ #else
++ rd->Buffer = stream;
++ rd->BufferLim = stream + bufferSize;
++ #endif
++ rd->ExtraBytes = 0;
++ rd->Code = 0;
++ rd->Range = (0xFFFFFFFF);
++ for(i = 0; i < 5; i++)
++ rd->Code = (rd->Code << 8) | ReadByte;
++}
++
++#define RC_INIT_VAR UInt32 range = rd->Range; UInt32 code = rd->Code;
++#define RC_FLUSH_VAR rd->Range = range; rd->Code = code;
++#define RC_NORMALIZE if (range < kTopValue) { range <<= 8; code = (code << 8) | ReadByte; }
++
++UInt32 RangeDecoderDecodeDirectBits(CRangeDecoder *rd, int numTotalBits)
++{
++ RC_INIT_VAR
++ UInt32 result = 0;
++ int i;
++ for (i = numTotalBits; i > 0; i--)
++ {
++ /* UInt32 t; */
++ range >>= 1;
++
++ result <<= 1;
++ if (code >= range)
++ {
++ code -= range;
++ result |= 1;
++ }
++ /*
++ t = (code - range) >> 31;
++ t &= 1;
++ code -= range & (t - 1);
++ result = (result + result) | (1 - t);
++ */
++ RC_NORMALIZE
++ }
++ RC_FLUSH_VAR
++ return result;
++}
++
++int RangeDecoderBitDecode(CProb *prob, CRangeDecoder *rd)
++{
++ UInt32 bound = (rd->Range >> kNumBitModelTotalBits) * *prob;
++ if (rd->Code < bound)
++ {
++ rd->Range = bound;
++ *prob += (kBitModelTotal - *prob) >> kNumMoveBits;
++ if (rd->Range < kTopValue)
++ {
++ rd->Code = (rd->Code << 8) | ReadByte;
++ rd->Range <<= 8;
++ }
++ return 0;
++ }
++ else
++ {
++ rd->Range -= bound;
++ rd->Code -= bound;
++ *prob -= (*prob) >> kNumMoveBits;
++ if (rd->Range < kTopValue)
++ {
++ rd->Code = (rd->Code << 8) | ReadByte;
++ rd->Range <<= 8;
++ }
++ return 1;
++ }
++}
++
++#define RC_GET_BIT2(prob, mi, A0, A1) \
++ UInt32 bound = (range >> kNumBitModelTotalBits) * *prob; \
++ if (code < bound) \
++ { A0; range = bound; *prob += (kBitModelTotal - *prob) >> kNumMoveBits; mi <<= 1; } \
++ else \
++ { A1; range -= bound; code -= bound; *prob -= (*prob) >> kNumMoveBits; mi = (mi + mi) + 1; } \
++ RC_NORMALIZE
++
++#define RC_GET_BIT(prob, mi) RC_GET_BIT2(prob, mi, ; , ;)
++
++int RangeDecoderBitTreeDecode(CProb *probs, int numLevels, CRangeDecoder *rd)
++{
++ int mi = 1;
++ int i;
++ #ifdef _LZMA_LOC_OPT
++ RC_INIT_VAR
++ #endif
++ for(i = numLevels; i > 0; i--)
++ {
++ #ifdef _LZMA_LOC_OPT
++ CProb *prob = probs + mi;
++ RC_GET_BIT(prob, mi)
++ #else
++ mi = (mi + mi) + RangeDecoderBitDecode(probs + mi, rd);
++ #endif
++ }
++ #ifdef _LZMA_LOC_OPT
++ RC_FLUSH_VAR
++ #endif
++ return mi - (1 << numLevels);
++}
++
++int RangeDecoderReverseBitTreeDecode(CProb *probs, int numLevels, CRangeDecoder *rd)
++{
++ int mi = 1;
++ int i;
++ int symbol = 0;
++ #ifdef _LZMA_LOC_OPT
++ RC_INIT_VAR
++ #endif
++ for(i = 0; i < numLevels; i++)
++ {
++ #ifdef _LZMA_LOC_OPT
++ CProb *prob = probs + mi;
++ RC_GET_BIT2(prob, mi, ; , symbol |= (1 << i))
++ #else
++ int bit = RangeDecoderBitDecode(probs + mi, rd);
++ mi = mi + mi + bit;
++ symbol |= (bit << i);
++ #endif
++ }
++ #ifdef _LZMA_LOC_OPT
++ RC_FLUSH_VAR
++ #endif
++ return symbol;
++}
++
++Byte LzmaLiteralDecode(CProb *probs, CRangeDecoder *rd)
++{
++ int symbol = 1;
++ #ifdef _LZMA_LOC_OPT
++ RC_INIT_VAR
++ #endif
++ do
++ {
++ #ifdef _LZMA_LOC_OPT
++ CProb *prob = probs + symbol;
++ RC_GET_BIT(prob, symbol)
++ #else
++ symbol = (symbol + symbol) | RangeDecoderBitDecode(probs + symbol, rd);
++ #endif
++ }
++ while (symbol < 0x100);
++ #ifdef _LZMA_LOC_OPT
++ RC_FLUSH_VAR
++ #endif
++ return symbol;
++}
++
++Byte LzmaLiteralDecodeMatch(CProb *probs, CRangeDecoder *rd, Byte matchByte)
++{
++ int symbol = 1;
++ #ifdef _LZMA_LOC_OPT
++ RC_INIT_VAR
++ #endif
++ do
++ {
++ int bit;
++ int matchBit = (matchByte >> 7) & 1;
++ matchByte <<= 1;
++ #ifdef _LZMA_LOC_OPT
++ {
++ CProb *prob = probs + ((1 + matchBit) << 8) + symbol;
++ RC_GET_BIT2(prob, symbol, bit = 0, bit = 1)
++ }
++ #else
++ bit = RangeDecoderBitDecode(probs + ((1 + matchBit) << 8) + symbol, rd);
++ symbol = (symbol << 1) | bit;
++ #endif
++ if (matchBit != bit)
++ {
++ while (symbol < 0x100)
++ {
++ #ifdef _LZMA_LOC_OPT
++ CProb *prob = probs + symbol;
++ RC_GET_BIT(prob, symbol)
++ #else
++ symbol = (symbol + symbol) | RangeDecoderBitDecode(probs + symbol, rd);
++ #endif
++ }
++ break;
++ }
++ }
++ while (symbol < 0x100);
++ #ifdef _LZMA_LOC_OPT
++ RC_FLUSH_VAR
++ #endif
++ return symbol;
++}
++
++#define kNumPosBitsMax 4
++#define kNumPosStatesMax (1 << kNumPosBitsMax)
++
++#define kLenNumLowBits 3
++#define kLenNumLowSymbols (1 << kLenNumLowBits)
++#define kLenNumMidBits 3
++#define kLenNumMidSymbols (1 << kLenNumMidBits)
++#define kLenNumHighBits 8
++#define kLenNumHighSymbols (1 << kLenNumHighBits)
++
++#define LenChoice 0
++#define LenChoice2 (LenChoice + 1)
++#define LenLow (LenChoice2 + 1)
++#define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
++#define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))
++#define kNumLenProbs (LenHigh + kLenNumHighSymbols)
++
++int LzmaLenDecode(CProb *p, CRangeDecoder *rd, int posState)
++{
++ if(RangeDecoderBitDecode(p + LenChoice, rd) == 0)
++ return RangeDecoderBitTreeDecode(p + LenLow +
++ (posState << kLenNumLowBits), kLenNumLowBits, rd);
++ if(RangeDecoderBitDecode(p + LenChoice2, rd) == 0)
++ return kLenNumLowSymbols + RangeDecoderBitTreeDecode(p + LenMid +
++ (posState << kLenNumMidBits), kLenNumMidBits, rd);
++ return kLenNumLowSymbols + kLenNumMidSymbols +
++ RangeDecoderBitTreeDecode(p + LenHigh, kLenNumHighBits, rd);
++}
++
++#define kNumStates 12
++
++#define kStartPosModelIndex 4
++#define kEndPosModelIndex 14
++#define kNumFullDistances (1 << (kEndPosModelIndex >> 1))
++
++#define kNumPosSlotBits 6
++#define kNumLenToPosStates 4
++
++#define kNumAlignBits 4
++#define kAlignTableSize (1 << kNumAlignBits)
++
++#define kMatchMinLen 2
++
++#define IsMatch 0
++#define IsRep (IsMatch + (kNumStates << kNumPosBitsMax))
++#define IsRepG0 (IsRep + kNumStates)
++#define IsRepG1 (IsRepG0 + kNumStates)
++#define IsRepG2 (IsRepG1 + kNumStates)
++#define IsRep0Long (IsRepG2 + kNumStates)
++#define PosSlot (IsRep0Long + (kNumStates << kNumPosBitsMax))
++#define SpecPos (PosSlot + (kNumLenToPosStates << kNumPosSlotBits))
++#define Align (SpecPos + kNumFullDistances - kEndPosModelIndex)
++#define LenCoder (Align + kAlignTableSize)
++#define RepLenCoder (LenCoder + kNumLenProbs)
++#define Literal (RepLenCoder + kNumLenProbs)
++
++#if Literal != LZMA_BASE_SIZE
++StopCompilingDueBUG
++#endif
++
++#ifdef _LZMA_OUT_READ
++
++typedef struct _LzmaVarState
++{
++ CRangeDecoder RangeDecoder;
++ Byte *Dictionary;
++ UInt32 DictionarySize;
++ UInt32 DictionaryPos;
++ UInt32 GlobalPos;
++ UInt32 Reps[4];
++ int lc;
++ int lp;
++ int pb;
++ int State;
++ int PreviousIsMatch;
++ int RemainLen;
++} LzmaVarState;
++
++int LzmaDecoderInit(
++ unsigned char *buffer, UInt32 bufferSize,
++ int lc, int lp, int pb,
++ unsigned char *dictionary, UInt32 dictionarySize,
++ #ifdef _LZMA_IN_CB
++ ILzmaInCallback *inCallback
++ #else
++ unsigned char *inStream, UInt32 inSize
++ #endif
++ )
++{
++ LzmaVarState *vs = (LzmaVarState *)buffer;
++ CProb *p = (CProb *)(buffer + sizeof(LzmaVarState));
++ UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + lp));
++ UInt32 i;
++ if (bufferSize < numProbs * sizeof(CProb) + sizeof(LzmaVarState))
++ return LZMA_RESULT_NOT_ENOUGH_MEM;
++ vs->Dictionary = dictionary;
++ vs->DictionarySize = dictionarySize;
++ vs->DictionaryPos = 0;
++ vs->GlobalPos = 0;
++ vs->Reps[0] = vs->Reps[1] = vs->Reps[2] = vs->Reps[3] = 1;
++ vs->lc = lc;
++ vs->lp = lp;
++ vs->pb = pb;
++ vs->State = 0;
++ vs->PreviousIsMatch = 0;
++ vs->RemainLen = 0;
++ dictionary[dictionarySize - 1] = 0;
++ for (i = 0; i < numProbs; i++)
++ p[i] = kBitModelTotal >> 1;
++ RangeDecoderInit(&vs->RangeDecoder,
++ #ifdef _LZMA_IN_CB
++ inCallback
++ #else
++ inStream, inSize
++ #endif
++ );
++ return LZMA_RESULT_OK;
++}
++
++int LzmaDecode(unsigned char *buffer,
++ unsigned char *outStream, UInt32 outSize,
++ UInt32 *outSizeProcessed)
++{
++ LzmaVarState *vs = (LzmaVarState *)buffer;
++ CProb *p = (CProb *)(buffer + sizeof(LzmaVarState));
++ CRangeDecoder rd = vs->RangeDecoder;
++ int state = vs->State;
++ int previousIsMatch = vs->PreviousIsMatch;
++ Byte previousByte;
++ UInt32 rep0 = vs->Reps[0], rep1 = vs->Reps[1], rep2 = vs->Reps[2], rep3 = vs->Reps[3];
++ UInt32 nowPos = 0;
++ UInt32 posStateMask = (1 << (vs->pb)) - 1;
++ UInt32 literalPosMask = (1 << (vs->lp)) - 1;
++ int lc = vs->lc;
++ int len = vs->RemainLen;
++ UInt32 globalPos = vs->GlobalPos;
++
++ Byte *dictionary = vs->Dictionary;
++ UInt32 dictionarySize = vs->DictionarySize;
++ UInt32 dictionaryPos = vs->DictionaryPos;
++
++ if (len == -1)
++ {
++ *outSizeProcessed = 0;
++ return LZMA_RESULT_OK;
++ }
++
++ while(len > 0 && nowPos < outSize)
++ {
++ UInt32 pos = dictionaryPos - rep0;
++ if (pos >= dictionarySize)
++ pos += dictionarySize;
++ outStream[nowPos++] = dictionary[dictionaryPos] = dictionary[pos];
++ if (++dictionaryPos == dictionarySize)
++ dictionaryPos = 0;
++ len--;
++ }
++ if (dictionaryPos == 0)
++ previousByte = dictionary[dictionarySize - 1];
++ else
++ previousByte = dictionary[dictionaryPos - 1];
++#else
++
++int LzmaDecode(
++ Byte *buffer, UInt32 bufferSize,
++ int lc, int lp, int pb,
++ #ifdef _LZMA_IN_CB
++ ILzmaInCallback *inCallback,
++ #else
++ unsigned char *inStream, UInt32 inSize,
++ #endif
++ unsigned char *outStream, UInt32 outSize,
++ UInt32 *outSizeProcessed)
++{
++ UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + lp));
++ CProb *p = (CProb *)buffer;
++ CRangeDecoder rd;
++ UInt32 i;
++ int state = 0;
++ int previousIsMatch = 0;
++ Byte previousByte = 0;
++ UInt32 rep0 = 1, rep1 = 1, rep2 = 1, rep3 = 1;
++ UInt32 nowPos = 0;
++ UInt32 posStateMask = (1 << pb) - 1;
++ UInt32 literalPosMask = (1 << lp) - 1;
++ int len = 0;
++ if (bufferSize < numProbs * sizeof(CProb))
++ return LZMA_RESULT_NOT_ENOUGH_MEM;
++ for (i = 0; i < numProbs; i++)
++ p[i] = kBitModelTotal >> 1;
++ RangeDecoderInit(&rd,
++ #ifdef _LZMA_IN_CB
++ inCallback
++ #else
++ inStream, inSize
++ #endif
++ );
++#endif
++
++ *outSizeProcessed = 0;
++ while(nowPos < outSize)
++ {
++ int posState = (int)(
++ (nowPos
++ #ifdef _LZMA_OUT_READ
++ + globalPos
++ #endif
++ )
++ & posStateMask);
++ #ifdef _LZMA_IN_CB
++ if (rd.Result != LZMA_RESULT_OK)
++ return rd.Result;
++ #endif
++ if (rd.ExtraBytes != 0)
++ return LZMA_RESULT_DATA_ERROR;
++ if (RangeDecoderBitDecode(p + IsMatch + (state << kNumPosBitsMax) + posState, &rd) == 0)
++ {
++ CProb *probs = p + Literal + (LZMA_LIT_SIZE *
++ (((
++ (nowPos
++ #ifdef _LZMA_OUT_READ
++ + globalPos
++ #endif
++ )
++ & literalPosMask) << lc) + (previousByte >> (8 - lc))));
++
++ if (state < 4) state = 0;
++ else if (state < 10) state -= 3;
++ else state -= 6;
++ if (previousIsMatch)
++ {
++ Byte matchByte;
++ #ifdef _LZMA_OUT_READ
++ UInt32 pos = dictionaryPos - rep0;
++ if (pos >= dictionarySize)
++ pos += dictionarySize;
++ matchByte = dictionary[pos];
++ #else
++ matchByte = outStream[nowPos - rep0];
++ #endif
++ previousByte = LzmaLiteralDecodeMatch(probs, &rd, matchByte);
++ previousIsMatch = 0;
++ }
++ else
++ previousByte = LzmaLiteralDecode(probs, &rd);
++ outStream[nowPos++] = previousByte;
++ #ifdef _LZMA_OUT_READ
++ dictionary[dictionaryPos] = previousByte;
++ if (++dictionaryPos == dictionarySize)
++ dictionaryPos = 0;
++ #endif
++ }
++ else
++ {
++ previousIsMatch = 1;
++ if (RangeDecoderBitDecode(p + IsRep + state, &rd) == 1)
++ {
++ if (RangeDecoderBitDecode(p + IsRepG0 + state, &rd) == 0)
++ {
++ if (RangeDecoderBitDecode(p + IsRep0Long + (state << kNumPosBitsMax) + posState, &rd) == 0)
++ {
++ #ifdef _LZMA_OUT_READ
++ UInt32 pos;
++ #endif
++ if (
++ (nowPos
++ #ifdef _LZMA_OUT_READ
++ + globalPos
++ #endif
++ )
++ == 0)
++ return LZMA_RESULT_DATA_ERROR;
++ state = state < 7 ? 9 : 11;
++ #ifdef _LZMA_OUT_READ
++ pos = dictionaryPos - rep0;
++ if (pos >= dictionarySize)
++ pos += dictionarySize;
++ previousByte = dictionary[pos];
++ dictionary[dictionaryPos] = previousByte;
++ if (++dictionaryPos == dictionarySize)
++ dictionaryPos = 0;
++ #else
++ previousByte = outStream[nowPos - rep0];
++ #endif
++ outStream[nowPos++] = previousByte;
++ continue;
++ }
++ }
++ else
++ {
++ UInt32 distance;
++ if(RangeDecoderBitDecode(p + IsRepG1 + state, &rd) == 0)
++ distance = rep1;
++ else
++ {
++ if(RangeDecoderBitDecode(p + IsRepG2 + state, &rd) == 0)
++ distance = rep2;
++ else
++ {
++ distance = rep3;
++ rep3 = rep2;
++ }
++ rep2 = rep1;
++ }
++ rep1 = rep0;
++ rep0 = distance;
++ }
++ len = LzmaLenDecode(p + RepLenCoder, &rd, posState);
++ state = state < 7 ? 8 : 11;
++ }
++ else
++ {
++ int posSlot;
++ rep3 = rep2;
++ rep2 = rep1;
++ rep1 = rep0;
++ state = state < 7 ? 7 : 10;
++ len = LzmaLenDecode(p + LenCoder, &rd, posState);
++ posSlot = RangeDecoderBitTreeDecode(p + PosSlot +
++ ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<
++ kNumPosSlotBits), kNumPosSlotBits, &rd);
++ if (posSlot >= kStartPosModelIndex)
++ {
++ int numDirectBits = ((posSlot >> 1) - 1);
++ rep0 = ((2 | ((UInt32)posSlot & 1)) << numDirectBits);
++ if (posSlot < kEndPosModelIndex)
++ {
++ rep0 += RangeDecoderReverseBitTreeDecode(
++ p + SpecPos + rep0 - posSlot - 1, numDirectBits, &rd);
++ }
++ else
++ {
++ rep0 += RangeDecoderDecodeDirectBits(&rd,
++ numDirectBits - kNumAlignBits) << kNumAlignBits;
++ rep0 += RangeDecoderReverseBitTreeDecode(p + Align, kNumAlignBits, &rd);
++ }
++ }
++ else
++ rep0 = posSlot;
++ rep0++;
++ }
++ if (rep0 == (UInt32)(0))
++ {
++ /* it's for stream version */
++ len = -1;
++ break;
++ }
++ if (rep0 > nowPos
++ #ifdef _LZMA_OUT_READ
++ + globalPos
++ #endif
++ )
++ {
++ return LZMA_RESULT_DATA_ERROR;
++ }
++ len += kMatchMinLen;
++ do
++ {
++ #ifdef _LZMA_OUT_READ
++ UInt32 pos = dictionaryPos - rep0;
++ if (pos >= dictionarySize)
++ pos += dictionarySize;
++ previousByte = dictionary[pos];
++ dictionary[dictionaryPos] = previousByte;
++ if (++dictionaryPos == dictionarySize)
++ dictionaryPos = 0;
++ #else
++ previousByte = outStream[nowPos - rep0];
++ #endif
++ outStream[nowPos++] = previousByte;
++ len--;
++ }
++ while(len > 0 && nowPos < outSize);
++ }
++ }
++
++ #ifdef _LZMA_OUT_READ
++ vs->RangeDecoder = rd;
++ vs->DictionaryPos = dictionaryPos;
++ vs->GlobalPos = globalPos + nowPos;
++ vs->Reps[0] = rep0;
++ vs->Reps[1] = rep1;
++ vs->Reps[2] = rep2;
++ vs->Reps[3] = rep3;
++ vs->State = state;
++ vs->PreviousIsMatch = previousIsMatch;
++ vs->RemainLen = len;
++ #endif
++
++ *outSizeProcessed = nowPos;
++ return LZMA_RESULT_OK;
++}
+--- linux-2.6.19.old/include/linux/LzmaDecode.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/include/linux/LzmaDecode.h 2006-12-14 03:13:20.000000000 +0100
+@@ -0,0 +1,100 @@
++/*
++ LzmaDecode.h
++ LZMA Decoder interface
++
++ LZMA SDK 4.05 Copyright (c) 1999-2004 Igor Pavlov (2004-08-25)
++ http://www.7-zip.org/
++
++ LZMA SDK is licensed under two licenses:
++ 1) GNU Lesser General Public License (GNU LGPL)
++ 2) Common Public License (CPL)
++ It means that you can select one of these two licenses and
++ follow rules of that license.
++
++ SPECIAL EXCEPTION:
++ Igor Pavlov, as the author of this code, expressly permits you to
++ statically or dynamically link your code (or bind by name) to the
++ interfaces of this file without subjecting your linked code to the
++ terms of the CPL or GNU LGPL. Any modifications or additions
++ to this file, however, are subject to the LGPL or CPL terms.
++*/
++
++#ifndef __LZMADECODE_H
++#define __LZMADECODE_H
++
++/* #define _LZMA_IN_CB */
++/* Use callback for input data */
++
++/* #define _LZMA_OUT_READ */
++/* Use read function for output data */
++
++/* #define _LZMA_PROB32 */
++/* It can increase speed on some 32-bit CPUs,
++ but memory usage will be doubled in that case */
++
++/* #define _LZMA_LOC_OPT */
++/* Enable local speed optimizations inside code */
++
++#ifndef UInt32
++#ifdef _LZMA_UINT32_IS_ULONG
++#define UInt32 unsigned long
++#else
++#define UInt32 unsigned int
++#endif
++#endif
++
++#ifdef _LZMA_PROB32
++#define CProb UInt32
++#else
++#define CProb unsigned short
++#endif
++
++#define LZMA_RESULT_OK 0
++#define LZMA_RESULT_DATA_ERROR 1
++#define LZMA_RESULT_NOT_ENOUGH_MEM 2
++
++#ifdef _LZMA_IN_CB
++typedef struct _ILzmaInCallback
++{
++ int (*Read)(void *object, unsigned char **buffer, UInt32 *bufferSize);
++} ILzmaInCallback;
++#endif
++
++#define LZMA_BASE_SIZE 1846
++#define LZMA_LIT_SIZE 768
++
++/*
++bufferSize = (LZMA_BASE_SIZE + (LZMA_LIT_SIZE << (lc + lp)))* sizeof(CProb)
++bufferSize += 100 in case of _LZMA_OUT_READ
++by default CProb is unsigned short,
++but if specify _LZMA_PROB_32, CProb will be UInt32(unsigned int)
++*/
++
++#ifdef _LZMA_OUT_READ
++int LzmaDecoderInit(
++ unsigned char *buffer, UInt32 bufferSize,
++ int lc, int lp, int pb,
++ unsigned char *dictionary, UInt32 dictionarySize,
++ #ifdef _LZMA_IN_CB
++ ILzmaInCallback *inCallback
++ #else
++ unsigned char *inStream, UInt32 inSize
++ #endif
++);
++#endif
++
++int LzmaDecode(
++ unsigned char *buffer,
++ #ifndef _LZMA_OUT_READ
++ UInt32 bufferSize,
++ int lc, int lp, int pb,
++ #ifdef _LZMA_IN_CB
++ ILzmaInCallback *inCallback,
++ #else
++ unsigned char *inStream, UInt32 inSize,
++ #endif
++ #endif
++ unsigned char *outStream, UInt32 outSize,
++ UInt32 *outSizeProcessed);
++
++#endif
+
--- /dev/null
+diff -urN linux-2.6.19.old/fs/squashfs/inode.c linux-2.6.19.dev/fs/squashfs/inode.c
+--- linux-2.6.19.old/fs/squashfs/inode.c 2006-12-14 03:13:20.000000000 +0100
++++ linux-2.6.19.dev/fs/squashfs/inode.c 2006-12-14 03:13:20.000000000 +0100
+@@ -4,6 +4,9 @@
+ * Copyright (c) 2002, 2003, 2004, 2005, 2006
+ * Phillip Lougher <phillip@lougher.org.uk>
+ *
++ * LZMA decompressor support added by Oleg I. Vdovikin
++ * Copyright (c) 2005 Oleg I.Vdovikin <oleg@cs.msu.su>
++ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2,
+@@ -21,6 +24,7 @@
+ * inode.c
+ */
+
++#define SQUASHFS_LZMA
+ #include <linux/types.h>
+ #include <linux/squashfs_fs.h>
+ #include <linux/module.h>
+@@ -44,6 +48,19 @@
+
+ #include "squashfs.h"
+
++#ifdef SQUASHFS_LZMA
++#include <linux/LzmaDecode.h>
++
++/* default LZMA settings, should be in sync with mksquashfs */
++#define LZMA_LC 3
++#define LZMA_LP 0
++#define LZMA_PB 2
++
++#define LZMA_WORKSPACE_SIZE ((LZMA_BASE_SIZE + \
++ (LZMA_LIT_SIZE << (LZMA_LC + LZMA_LP))) * sizeof(CProb))
++
++#endif
++
+ static void squashfs_put_super(struct super_block *);
+ static int squashfs_statfs(struct dentry *, struct kstatfs *);
+ static int squashfs_symlink_readpage(struct file *file, struct page *page);
+@@ -64,7 +81,11 @@
+ const char *, void *, struct vfsmount *);
+
+
++#ifdef SQUASHFS_LZMA
++static unsigned char lzma_workspace[LZMA_WORKSPACE_SIZE];
++#else
+ static z_stream stream;
++#endif
+
+ static struct file_system_type squashfs_fs_type = {
+ .owner = THIS_MODULE,
+@@ -249,6 +270,15 @@
+ if (compressed) {
+ int zlib_err;
+
++#ifdef SQUASHFS_LZMA
++ if ((zlib_err = LzmaDecode(lzma_workspace,
++ LZMA_WORKSPACE_SIZE, LZMA_LC, LZMA_LP, LZMA_PB,
++ c_buffer, c_byte, buffer, msblk->read_size, &bytes)) != LZMA_RESULT_OK)
++ {
++ ERROR("lzma returned unexpected result 0x%x\n", zlib_err);
++ bytes = 0;
++ }
++#else
+ stream.next_in = c_buffer;
+ stream.avail_in = c_byte;
+ stream.next_out = buffer;
+@@ -263,7 +293,7 @@
+ bytes = 0;
+ } else
+ bytes = stream.total_out;
+-
++#endif
+ up(&msblk->read_data_mutex);
+ }
+
+@@ -2045,15 +2075,19 @@
+ printk(KERN_INFO "squashfs: version 3.0 (2006/03/15) "
+ "Phillip Lougher\n");
+
++#ifndef SQUASHFS_LZMA
+ if (!(stream.workspace = vmalloc(zlib_inflate_workspacesize()))) {
+ ERROR("Failed to allocate zlib workspace\n");
+ destroy_inodecache();
+ err = -ENOMEM;
+ goto out;
+ }
++#endif
+
+ if ((err = register_filesystem(&squashfs_fs_type))) {
++#ifndef SQUASHFS_LZMA
+ vfree(stream.workspace);
++#endif
+ destroy_inodecache();
+ }
+
+@@ -2064,7 +2098,9 @@
+
+ static void __exit exit_squashfs_fs(void)
+ {
++#ifndef SQUASHFS_LZMA
+ vfree(stream.workspace);
++#endif
+ unregister_filesystem(&squashfs_fs_type);
+ destroy_inodecache();
+ }
+
--- /dev/null
+diff -urN linux-2.6.19.old/Makefile linux-2.6.19.dev/Makefile
+--- linux-2.6.19.old/Makefile 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/Makefile 2006-12-14 03:13:23.000000000 +0100
+@@ -513,6 +513,9 @@
+ NOSTDINC_FLAGS += -nostdinc -isystem $(shell $(CC) -print-file-name=include)
+ CHECKFLAGS += $(NOSTDINC_FLAGS)
+
++# improve gcc optimization
++CFLAGS += $(call cc-option,-funit-at-a-time,)
++
+ # warn about C99 declaration after statement
+ CFLAGS += $(call cc-option,-Wdeclaration-after-statement,)
+
--- /dev/null
+diff -urN linux-2.6.19.old/include/asm-mips/system.h linux-2.6.19.dev/include/asm-mips/system.h
+--- linux-2.6.19.old/include/asm-mips/system.h 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/include/asm-mips/system.h 2006-12-14 03:13:28.000000000 +0100
+@@ -311,7 +311,7 @@
+ if something tries to do an invalid xchg(). */
+ extern void __xchg_called_with_bad_pointer(void);
+
+-static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
++static __always_inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
+ {
+ switch (size) {
+ case 4:
--- /dev/null
+diff -urN linux-2.6.19.old/drivers/mtd/chips/cfi_cmdset_0002.c linux-2.6.19.dev/drivers/mtd/chips/cfi_cmdset_0002.c
+--- linux-2.6.19.old/drivers/mtd/chips/cfi_cmdset_0002.c 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/drivers/mtd/chips/cfi_cmdset_0002.c 2006-12-14 03:13:30.000000000 +0100
+@@ -50,6 +50,7 @@
+ #define SST49LF004B 0x0060
+ #define SST49LF008A 0x005a
+ #define AT49BV6416 0x00d6
++#define MANUFACTURER_SAMSUNG 0x00ec
+
+ static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
+ static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
+@@ -293,12 +294,19 @@
+
+ if (extp->MajorVersion != '1' ||
+ (extp->MinorVersion < '0' || extp->MinorVersion > '4')) {
+- printk(KERN_ERR " Unknown Amd/Fujitsu Extended Query "
+- "version %c.%c.\n", extp->MajorVersion,
+- extp->MinorVersion);
+- kfree(extp);
+- kfree(mtd);
+- return NULL;
++ if (cfi->mfr == MANUFACTURER_SAMSUNG &&
++ (extp->MajorVersion == '3' && extp->MinorVersion == '3')) {
++ printk(KERN_NOTICE " Newer Samsung flash detected, "
++ "should be compatibile with Amd/Fujitsu.\n");
++ }
++ else {
++ printk(KERN_ERR " Unknown Amd/Fujitsu Extended Query "
++ "version %c.%c.\n", extp->MajorVersion,
++ extp->MinorVersion);
++ kfree(extp);
++ kfree(mtd);
++ return NULL;
++ }
+ }
+
+ /* Install our own private info structure */
--- /dev/null
+--- linux.old/drivers/mtd/chips/cfi_cmdset_0001.c 2007-02-13 02:41:50.816650352 +0100
++++ linux.dev/drivers/mtd/chips/cfi_cmdset_0001.c 2007-02-13 02:42:13.782159064 +0100
+@@ -908,7 +908,7 @@
+
+ static int __xipram xip_wait_for_operation(
+ struct map_info *map, struct flchip *chip,
+- unsigned long adr, unsigned int chip_op_time )
++ unsigned long adr, int *chip_op_time )
+ {
+ struct cfi_private *cfi = map->fldrv_priv;
+ struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
+@@ -917,7 +917,7 @@
+ flstate_t oldstate, newstate;
+
+ start = xip_currtime();
+- usec = chip_op_time * 8;
++ usec = *chip_op_time * 8;
+ if (usec == 0)
+ usec = 500000;
+ done = 0;
+@@ -1027,8 +1027,8 @@
+ #define XIP_INVAL_CACHED_RANGE(map, from, size) \
+ INVALIDATE_CACHED_RANGE(map, from, size)
+
+-#define INVAL_CACHE_AND_WAIT(map, chip, cmd_adr, inval_adr, inval_len, usec) \
+- xip_wait_for_operation(map, chip, cmd_adr, usec)
++#define INVAL_CACHE_AND_WAIT(map, chip, cmd_adr, inval_adr, inval_len, p_usec) \
++ xip_wait_for_operation(map, chip, cmd_adr, p_usec)
+
+ #else
+
+@@ -1040,65 +1040,65 @@
+ static int inval_cache_and_wait_for_operation(
+ struct map_info *map, struct flchip *chip,
+ unsigned long cmd_adr, unsigned long inval_adr, int inval_len,
+- unsigned int chip_op_time)
++ int *chip_op_time )
+ {
+ struct cfi_private *cfi = map->fldrv_priv;
+ map_word status, status_OK = CMD(0x80);
+- int chip_state = chip->state;
+- unsigned int timeo, sleep_time;
++ int z, chip_state = chip->state;
++ unsigned long timeo;
+
+ spin_unlock(chip->mutex);
+ if (inval_len)
+ INVALIDATE_CACHED_RANGE(map, inval_adr, inval_len);
++ if (*chip_op_time)
++ cfi_udelay(*chip_op_time);
+ spin_lock(chip->mutex);
+
+- /* set our timeout to 8 times the expected delay */
+- timeo = chip_op_time * 8;
+- if (!timeo)
+- timeo = 500000;
+- sleep_time = chip_op_time / 2;
++ timeo = *chip_op_time * 8 * HZ / 1000000;
++ if (timeo < HZ/2)
++ timeo = HZ/2;
++ timeo += jiffies;
+
++ z = 0;
+ for (;;) {
++ if (chip->state != chip_state) {
++ /* Someone's suspended the operation: sleep */
++ DECLARE_WAITQUEUE(wait, current);
++
++ set_current_state(TASK_UNINTERRUPTIBLE);
++ add_wait_queue(&chip->wq, &wait);
++ spin_unlock(chip->mutex);
++ schedule();
++ remove_wait_queue(&chip->wq, &wait);
++ timeo = jiffies + (HZ / 2); /* FIXME */
++ spin_lock(chip->mutex);
++ continue;
++ }
++
+ status = map_read(map, cmd_adr);
+ if (map_word_andequal(map, status, status_OK, status_OK))
+ break;
+
+- if (!timeo) {
++ /* OK Still waiting */
++ if (time_after(jiffies, timeo)) {
+ map_write(map, CMD(0x70), cmd_adr);
+ chip->state = FL_STATUS;
+ return -ETIME;
+ }
+
+- /* OK Still waiting. Drop the lock, wait a while and retry. */
++ /* Latency issues. Drop the lock, wait a while and retry */
++ z++;
+ spin_unlock(chip->mutex);
+- if (sleep_time >= 1000000/HZ) {
+- /*
+- * Half of the normal delay still remaining
+- * can be performed with a sleeping delay instead
+- * of busy waiting.
+- */
+- msleep(sleep_time/1000);
+- timeo -= sleep_time;
+- sleep_time = 1000000/HZ;
+- } else {
+- udelay(1);
+- cond_resched();
+- timeo--;
+- }
++ cfi_udelay(1);
+ spin_lock(chip->mutex);
+-
+- while (chip->state != chip_state) {
+- /* Someone's suspended the operation: sleep */
+- DECLARE_WAITQUEUE(wait, current);
+- set_current_state(TASK_UNINTERRUPTIBLE);
+- add_wait_queue(&chip->wq, &wait);
+- spin_unlock(chip->mutex);
+- schedule();
+- remove_wait_queue(&chip->wq, &wait);
+- spin_lock(chip->mutex);
+- }
+ }
+
++ if (!z) {
++ if (!--(*chip_op_time))
++ *chip_op_time = 1;
++ } else if (z > 1)
++ ++(*chip_op_time);
++
+ /* Done and happy. */
+ chip->state = FL_STATUS;
+ return 0;
+@@ -1107,7 +1107,8 @@
+ #endif
+
+ #define WAIT_TIMEOUT(map, chip, adr, udelay) \
+- INVAL_CACHE_AND_WAIT(map, chip, adr, 0, 0, udelay);
++ ({ int __udelay = (udelay); \
++ INVAL_CACHE_AND_WAIT(map, chip, adr, 0, 0, &__udelay); })
+
+
+ static int do_point_onechip (struct map_info *map, struct flchip *chip, loff_t adr, size_t len)
+@@ -1331,7 +1332,7 @@
+
+ ret = INVAL_CACHE_AND_WAIT(map, chip, adr,
+ adr, map_bankwidth(map),
+- chip->word_write_time);
++ &chip->word_write_time);
+ if (ret) {
+ xip_enable(map, chip, adr);
+ printk(KERN_ERR "%s: word write error (status timeout)\n", map->name);
+@@ -1568,7 +1569,7 @@
+
+ ret = INVAL_CACHE_AND_WAIT(map, chip, cmd_adr,
+ adr, len,
+- chip->buffer_write_time);
++ &chip->buffer_write_time);
+ if (ret) {
+ map_write(map, CMD(0x70), cmd_adr);
+ chip->state = FL_STATUS;
+@@ -1703,7 +1704,7 @@
+
+ ret = INVAL_CACHE_AND_WAIT(map, chip, adr,
+ adr, len,
+- chip->erase_time);
++ &chip->erase_time);
+ if (ret) {
+ map_write(map, CMD(0x70), adr);
+ chip->state = FL_STATUS;
--- /dev/null
+diff -urN linux-2.6.19.old/fs/squashfs/Makefile linux-2.6.19.dev/fs/squashfs/Makefile
+--- linux-2.6.19.old/fs/squashfs/Makefile 2006-12-14 03:13:22.000000000 +0100
++++ linux-2.6.19.dev/fs/squashfs/Makefile 2006-12-14 03:13:31.000000000 +0100
+@@ -4,4 +4,3 @@
+
+ obj-$(CONFIG_SQUASHFS) += squashfs.o
+ squashfs-y += inode.o
+-squashfs-y += squashfs2_0.o
+diff -urN linux-2.6.19.old/fs/squashfs/squashfs.h linux-2.6.19.dev/fs/squashfs/squashfs.h
+--- linux-2.6.19.old/fs/squashfs/squashfs.h 2006-12-14 03:13:20.000000000 +0100
++++ linux-2.6.19.dev/fs/squashfs/squashfs.h 2006-12-14 03:13:31.000000000 +0100
+@@ -24,6 +24,9 @@
+ #ifdef CONFIG_SQUASHFS_1_0_COMPATIBILITY
+ #undef CONFIG_SQUASHFS_1_0_COMPATIBILITY
+ #endif
++#ifdef CONFIG_SQUASHFS_2_0_COMPATIBILITY
++#undef CONFIG_SQUASHFS_2_0_COMPATIBILITY
++#endif
+
+ #ifdef SQUASHFS_TRACE
+ #define TRACE(s, args...) printk(KERN_NOTICE "SQUASHFS: "s, ## args)
--- /dev/null
+diff -ur linux.old/drivers/mtd/Kconfig linux.dev/drivers/mtd/Kconfig
+--- linux.old/drivers/mtd/Kconfig 2007-01-10 20:10:37.000000000 +0100
++++ linux.dev/drivers/mtd/Kconfig 2007-02-19 23:00:53.739457000 +0100
+@@ -49,6 +49,11 @@
+ devices. Partitioning on NFTL 'devices' is a different - that's the
+ 'normal' form of partitioning used on a block device.
+
++config MTD_SPLIT_ROOTFS
++ bool "Automatically split rootfs partition for squashfs"
++ depends on MTD_PARTITIONS
++ default y
++
+ config MTD_REDBOOT_PARTS
+ tristate "RedBoot partition table parsing"
+ depends on MTD_PARTITIONS
+diff -ur linux.old/drivers/mtd/mtdpart.c linux.dev/drivers/mtd/mtdpart.c
+--- linux.old/drivers/mtd/mtdpart.c 2007-01-10 20:10:37.000000000 +0100
++++ linux.dev/drivers/mtd/mtdpart.c 2007-02-20 00:01:38.587355896 +0100
+@@ -20,6 +20,8 @@
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/partitions.h>
+ #include <linux/mtd/compatmac.h>
++#include <linux/squashfs_fs.h>
++#include <linux/root_dev.h>
+
+ /* Our partition linked list */
+ static LIST_HEAD(mtd_partitions);
+@@ -303,6 +305,173 @@
+ return 0;
+ }
+
++static u_int32_t cur_offset = 0;
++static int add_mtd_partition(struct mtd_info *master, const struct mtd_partition *part, int i)
++{
++ struct mtd_part *slave;
++
++ /* allocate the partition structure */
++ slave = kmalloc (sizeof(*slave), GFP_KERNEL);
++ if (!slave) {
++ printk ("memory allocation error while creating partitions for \"%s\"\n",
++ master->name);
++ del_mtd_partitions(master);
++ return -ENOMEM;
++ }
++ memset(slave, 0, sizeof(*slave));
++ list_add(&slave->list, &mtd_partitions);
++
++ /* set up the MTD object for this partition */
++ slave->mtd.type = master->type;
++ slave->mtd.flags = master->flags & ~part->mask_flags;
++ slave->mtd.size = part->size;
++ slave->mtd.writesize = master->writesize;
++ slave->mtd.oobsize = master->oobsize;
++ slave->mtd.ecctype = master->ecctype;
++ slave->mtd.eccsize = master->eccsize;
++
++ slave->mtd.name = part->name;
++ slave->mtd.bank_size = master->bank_size;
++ slave->mtd.owner = master->owner;
++
++ slave->mtd.read = part_read;
++ slave->mtd.write = part_write;
++
++ if(master->point && master->unpoint){
++ slave->mtd.point = part_point;
++ slave->mtd.unpoint = part_unpoint;
++ }
++
++ if (master->read_oob)
++ slave->mtd.read_oob = part_read_oob;
++ if (master->write_oob)
++ slave->mtd.write_oob = part_write_oob;
++ if(master->read_user_prot_reg)
++ slave->mtd.read_user_prot_reg = part_read_user_prot_reg;
++ if(master->read_fact_prot_reg)
++ slave->mtd.read_fact_prot_reg = part_read_fact_prot_reg;
++ if(master->write_user_prot_reg)
++ slave->mtd.write_user_prot_reg = part_write_user_prot_reg;
++ if(master->lock_user_prot_reg)
++ slave->mtd.lock_user_prot_reg = part_lock_user_prot_reg;
++ if(master->get_user_prot_info)
++ slave->mtd.get_user_prot_info = part_get_user_prot_info;
++ if(master->get_fact_prot_info)
++ slave->mtd.get_fact_prot_info = part_get_fact_prot_info;
++ if (master->sync)
++ slave->mtd.sync = part_sync;
++ if (!i && master->suspend && master->resume) {
++ slave->mtd.suspend = part_suspend;
++ slave->mtd.resume = part_resume;
++ }
++ if (master->writev)
++ slave->mtd.writev = part_writev;
++ if (master->lock)
++ slave->mtd.lock = part_lock;
++ if (master->unlock)
++ slave->mtd.unlock = part_unlock;
++ if (master->block_isbad)
++ slave->mtd.block_isbad = part_block_isbad;
++ if (master->block_markbad)
++ slave->mtd.block_markbad = part_block_markbad;
++ slave->mtd.erase = part_erase;
++ slave->master = master;
++ slave->offset = part->offset;
++ slave->index = i;
++
++ if (slave->offset == MTDPART_OFS_APPEND)
++ slave->offset = cur_offset;
++ if (slave->offset == MTDPART_OFS_NXTBLK) {
++ slave->offset = cur_offset;
++ if ((cur_offset % master->erasesize) != 0) {
++ /* Round up to next erasesize */
++ slave->offset = ((cur_offset / master->erasesize) + 1) * master->erasesize;
++ printk(KERN_NOTICE "Moving partition %d: "
++ "0x%08x -> 0x%08x\n", i,
++ cur_offset, slave->offset);
++ }
++ }
++ if (slave->mtd.size == MTDPART_SIZ_FULL)
++ slave->mtd.size = master->size - slave->offset;
++ cur_offset = slave->offset + slave->mtd.size;
++
++ printk (KERN_NOTICE "0x%08x-0x%08x : \"%s\"\n", slave->offset,
++ slave->offset + slave->mtd.size, slave->mtd.name);
++
++ /* let's do some sanity checks */
++ if (slave->offset >= master->size) {
++ /* let's register it anyway to preserve ordering */
++ slave->offset = 0;
++ slave->mtd.size = 0;
++ printk ("mtd: partition \"%s\" is out of reach -- disabled\n",
++ part->name);
++ }
++ if (slave->offset + slave->mtd.size > master->size) {
++ slave->mtd.size = master->size - slave->offset;
++ printk ("mtd: partition \"%s\" extends beyond the end of device \"%s\" -- size truncated to %#x\n",
++ part->name, master->name, slave->mtd.size);
++ }
++ if (master->numeraseregions>1) {
++ /* Deal with variable erase size stuff */
++ int i;
++ struct mtd_erase_region_info *regions = master->eraseregions;
++
++ /* Find the first erase regions which is part of this partition. */
++ for (i=0; i < master->numeraseregions && slave->offset >= regions[i].offset; i++)
++ ;
++
++ for (i--; i < master->numeraseregions && slave->offset + slave->mtd.size > regions[i].offset; i++) {
++ if (slave->mtd.erasesize < regions[i].erasesize) {
++ slave->mtd.erasesize = regions[i].erasesize;
++ }
++ }
++ } else {
++ /* Single erase size */
++ slave->mtd.erasesize = master->erasesize;
++ }
++
++ if ((slave->mtd.flags & MTD_WRITEABLE) &&
++ (slave->offset % slave->mtd.erasesize)) {
++ /* Doesn't start on a boundary of major erase size */
++ /* FIXME: Let it be writable if it is on a boundary of _minor_ erase size though */
++ slave->mtd.flags &= ~MTD_WRITEABLE;
++ printk ("mtd: partition \"%s\" doesn't start on an erase block boundary -- force read-only\n",
++ part->name);
++ }
++ if ((slave->mtd.flags & MTD_WRITEABLE) &&
++ (slave->mtd.size % slave->mtd.erasesize)) {
++ slave->mtd.flags &= ~MTD_WRITEABLE;
++ printk ("mtd: partition \"%s\" doesn't end on an erase block -- force read-only\n",
++ part->name);
++ }
++
++ slave->mtd.ecclayout = master->ecclayout;
++ if (master->block_isbad) {
++ uint32_t offs = 0;
++
++ while(offs < slave->mtd.size) {
++ if (master->block_isbad(master,
++ offs + slave->offset))
++ slave->mtd.ecc_stats.badblocks++;
++ offs += slave->mtd.erasesize;
++ }
++ }
++
++ if(part->mtdp)
++ { /* store the object pointer (caller may or may not register it */
++ *part->mtdp = &slave->mtd;
++ slave->registered = 0;
++ }
++ else
++ {
++ /* register our partition */
++ add_mtd_device(&slave->mtd);
++ slave->registered = 1;
++ }
++
++ return 0;
++}
++
+ /*
+ * This function, given a master MTD object and a partition table, creates
+ * and registers slave MTD objects which are bound to the master according to
+@@ -314,171 +483,53 @@
+ const struct mtd_partition *parts,
+ int nbparts)
+ {
+- struct mtd_part *slave;
+- u_int32_t cur_offset = 0;
+- int i;
++ struct mtd_partition *part;
++ int i, ret = 0;
+
+ printk (KERN_NOTICE "Creating %d MTD partitions on \"%s\":\n", nbparts, master->name);
+
+ for (i = 0; i < nbparts; i++) {
++ part = (struct mtd_partition *) &parts[i];
++ ret = add_mtd_partition(master, part, i);
++ if (ret)
++ return ret;
++ if (strcmp(part->name, "rootfs") == 0) {
++#ifdef CONFIG_MTD_SPLIT_ROOTFS
++ int len;
++ char buf[512];
++ struct squashfs_super_block *sb = (struct squashfs_super_block *) buf;
++#define ROOTFS_SPLIT_NAME "rootfs_data"
++ if ((master->read(master, part->offset, sizeof(struct squashfs_super_block), &len, buf) == 0) &&
++ (len == sizeof(struct squashfs_super_block)) &&
++ (*((u32 *) buf) == SQUASHFS_MAGIC) &&
++ (sb->bytes_used > 0)) {
++
++
++ part = kmalloc(sizeof(struct mtd_partition), GFP_KERNEL);
++ memcpy(part, &parts[i], sizeof(struct mtd_partition));
++
++ part->name = kmalloc(sizeof(ROOTFS_SPLIT_NAME) + 1, GFP_KERNEL);
++ strcpy(part->name, ROOTFS_SPLIT_NAME);
++
++ len = (u32) sb->bytes_used;
++ len += (part->offset & 0x000fffff);
++ len += (master->erasesize - 1);
++ len &= ~(master->erasesize - 1);
++ len -= (part->offset & 0x000fffff);
++ part->offset += len;
++ part->size -= len;
++
++ if (master->erasesize <= part->size)
++ ret = add_mtd_partition(master, part, i + 1);
++ else
++ kfree(part->name);
++ if (ret)
++ return ret;
+
+- /* allocate the partition structure */
+- slave = kmalloc (sizeof(*slave), GFP_KERNEL);
+- if (!slave) {
+- printk ("memory allocation error while creating partitions for \"%s\"\n",
+- master->name);
+- del_mtd_partitions(master);
+- return -ENOMEM;
+- }
+- memset(slave, 0, sizeof(*slave));
+- list_add(&slave->list, &mtd_partitions);
+-
+- /* set up the MTD object for this partition */
+- slave->mtd.type = master->type;
+- slave->mtd.flags = master->flags & ~parts[i].mask_flags;
+- slave->mtd.size = parts[i].size;
+- slave->mtd.writesize = master->writesize;
+- slave->mtd.oobsize = master->oobsize;
+- slave->mtd.ecctype = master->ecctype;
+- slave->mtd.eccsize = master->eccsize;
+-
+- slave->mtd.name = parts[i].name;
+- slave->mtd.bank_size = master->bank_size;
+- slave->mtd.owner = master->owner;
+-
+- slave->mtd.read = part_read;
+- slave->mtd.write = part_write;
+-
+- if(master->point && master->unpoint){
+- slave->mtd.point = part_point;
+- slave->mtd.unpoint = part_unpoint;
+- }
+-
+- if (master->read_oob)
+- slave->mtd.read_oob = part_read_oob;
+- if (master->write_oob)
+- slave->mtd.write_oob = part_write_oob;
+- if(master->read_user_prot_reg)
+- slave->mtd.read_user_prot_reg = part_read_user_prot_reg;
+- if(master->read_fact_prot_reg)
+- slave->mtd.read_fact_prot_reg = part_read_fact_prot_reg;
+- if(master->write_user_prot_reg)
+- slave->mtd.write_user_prot_reg = part_write_user_prot_reg;
+- if(master->lock_user_prot_reg)
+- slave->mtd.lock_user_prot_reg = part_lock_user_prot_reg;
+- if(master->get_user_prot_info)
+- slave->mtd.get_user_prot_info = part_get_user_prot_info;
+- if(master->get_fact_prot_info)
+- slave->mtd.get_fact_prot_info = part_get_fact_prot_info;
+- if (master->sync)
+- slave->mtd.sync = part_sync;
+- if (!i && master->suspend && master->resume) {
+- slave->mtd.suspend = part_suspend;
+- slave->mtd.resume = part_resume;
+- }
+- if (master->writev)
+- slave->mtd.writev = part_writev;
+- if (master->lock)
+- slave->mtd.lock = part_lock;
+- if (master->unlock)
+- slave->mtd.unlock = part_unlock;
+- if (master->block_isbad)
+- slave->mtd.block_isbad = part_block_isbad;
+- if (master->block_markbad)
+- slave->mtd.block_markbad = part_block_markbad;
+- slave->mtd.erase = part_erase;
+- slave->master = master;
+- slave->offset = parts[i].offset;
+- slave->index = i;
+-
+- if (slave->offset == MTDPART_OFS_APPEND)
+- slave->offset = cur_offset;
+- if (slave->offset == MTDPART_OFS_NXTBLK) {
+- slave->offset = cur_offset;
+- if ((cur_offset % master->erasesize) != 0) {
+- /* Round up to next erasesize */
+- slave->offset = ((cur_offset / master->erasesize) + 1) * master->erasesize;
+- printk(KERN_NOTICE "Moving partition %d: "
+- "0x%08x -> 0x%08x\n", i,
+- cur_offset, slave->offset);
++ kfree(part);
+ }
+- }
+- if (slave->mtd.size == MTDPART_SIZ_FULL)
+- slave->mtd.size = master->size - slave->offset;
+- cur_offset = slave->offset + slave->mtd.size;
+-
+- printk (KERN_NOTICE "0x%08x-0x%08x : \"%s\"\n", slave->offset,
+- slave->offset + slave->mtd.size, slave->mtd.name);
+-
+- /* let's do some sanity checks */
+- if (slave->offset >= master->size) {
+- /* let's register it anyway to preserve ordering */
+- slave->offset = 0;
+- slave->mtd.size = 0;
+- printk ("mtd: partition \"%s\" is out of reach -- disabled\n",
+- parts[i].name);
+- }
+- if (slave->offset + slave->mtd.size > master->size) {
+- slave->mtd.size = master->size - slave->offset;
+- printk ("mtd: partition \"%s\" extends beyond the end of device \"%s\" -- size truncated to %#x\n",
+- parts[i].name, master->name, slave->mtd.size);
+- }
+- if (master->numeraseregions>1) {
+- /* Deal with variable erase size stuff */
+- int i;
+- struct mtd_erase_region_info *regions = master->eraseregions;
+-
+- /* Find the first erase regions which is part of this partition. */
+- for (i=0; i < master->numeraseregions && slave->offset >= regions[i].offset; i++)
+- ;
+-
+- for (i--; i < master->numeraseregions && slave->offset + slave->mtd.size > regions[i].offset; i++) {
+- if (slave->mtd.erasesize < regions[i].erasesize) {
+- slave->mtd.erasesize = regions[i].erasesize;
+- }
+- }
+- } else {
+- /* Single erase size */
+- slave->mtd.erasesize = master->erasesize;
+- }
+-
+- if ((slave->mtd.flags & MTD_WRITEABLE) &&
+- (slave->offset % slave->mtd.erasesize)) {
+- /* Doesn't start on a boundary of major erase size */
+- /* FIXME: Let it be writable if it is on a boundary of _minor_ erase size though */
+- slave->mtd.flags &= ~MTD_WRITEABLE;
+- printk ("mtd: partition \"%s\" doesn't start on an erase block boundary -- force read-only\n",
+- parts[i].name);
+- }
+- if ((slave->mtd.flags & MTD_WRITEABLE) &&
+- (slave->mtd.size % slave->mtd.erasesize)) {
+- slave->mtd.flags &= ~MTD_WRITEABLE;
+- printk ("mtd: partition \"%s\" doesn't end on an erase block -- force read-only\n",
+- parts[i].name);
+- }
+-
+- slave->mtd.ecclayout = master->ecclayout;
+- if (master->block_isbad) {
+- uint32_t offs = 0;
+-
+- while(offs < slave->mtd.size) {
+- if (master->block_isbad(master,
+- offs + slave->offset))
+- slave->mtd.ecc_stats.badblocks++;
+- offs += slave->mtd.erasesize;
+- }
+- }
+-
+- if(parts[i].mtdp)
+- { /* store the object pointer (caller may or may not register it */
+- *parts[i].mtdp = &slave->mtd;
+- slave->registered = 0;
+- }
+- else
+- {
+- /* register our partition */
+- add_mtd_device(&slave->mtd);
+- slave->registered = 1;
++#endif /* CONFIG_MTD_SPLIT_ROOTFS */
++ ROOT_DEV = MKDEV(MTD_BLOCK_MAJOR, i);
+ }
+ }
+
--- /dev/null
+--- linux.old/drivers/mtd/devices/block2mtd.c 2007-03-02 01:00:13.866987272 +0100
++++ linux.dev/drivers/mtd/devices/block2mtd.c 2007-03-02 02:03:45.558522080 +0100
+@@ -16,6 +16,7 @@
+ #include <linux/list.h>
+ #include <linux/init.h>
+ #include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
+ #include <linux/buffer_head.h>
+ #include <linux/mutex.h>
+ #include <linux/mount.h>
+@@ -287,10 +288,11 @@
+
+
+ /* FIXME: ensure that mtd->size % erase_size == 0 */
+-static struct block2mtd_dev *add_device(char *devname, int erase_size)
++static struct block2mtd_dev *add_device(char *devname, int erase_size, char *mtdname)
+ {
+ struct block_device *bdev;
+ struct block2mtd_dev *dev;
++ struct mtd_partition *part;
+
+ if (!devname)
+ return NULL;
+@@ -330,14 +332,18 @@
+
+ /* Setup the MTD structure */
+ /* make the name contain the block device in */
+- dev->mtd.name = kmalloc(sizeof("block2mtd: ") + strlen(devname),
+- GFP_KERNEL);
++
++ if (!mtdname)
++ mtdname = devname;
++
++ dev->mtd.name = kmalloc(strlen(mtdname), GFP_KERNEL);
++
+ if (!dev->mtd.name)
+ goto devinit_err;
++
++ strcpy(dev->mtd.name, mtdname);
+
+- sprintf(dev->mtd.name, "block2mtd: %s", devname);
+-
+- dev->mtd.size = dev->blkdev->bd_inode->i_size & PAGE_MASK;
++ dev->mtd.size = dev->blkdev->bd_inode->i_size & PAGE_MASK & ~(erase_size - 1);
+ dev->mtd.erasesize = erase_size;
+ dev->mtd.writesize = 1;
+ dev->mtd.type = MTD_RAM;
+@@ -349,15 +355,18 @@
+ dev->mtd.read = block2mtd_read;
+ dev->mtd.priv = dev;
+ dev->mtd.owner = THIS_MODULE;
+-
+- if (add_mtd_device(&dev->mtd)) {
++
++ part = kzalloc(sizeof(struct mtd_partition), GFP_KERNEL);
++ part->name = dev->mtd.name;
++ part->offset = 0;
++ part->size = dev->mtd.size;
++ if (add_mtd_partitions(&dev->mtd, part, 1)) {
+ /* Device didnt get added, so free the entry */
+ goto devinit_err;
+ }
+ list_add(&dev->list, &blkmtd_device_list);
+ INFO("mtd%d: [%s] erase_size = %dKiB [%d]", dev->mtd.index,
+- dev->mtd.name + strlen("blkmtd: "),
+- dev->mtd.erasesize >> 10, dev->mtd.erasesize);
++ mtdname, dev->mtd.erasesize >> 10, dev->mtd.erasesize);
+ return dev;
+
+ devinit_err:
+@@ -430,9 +439,9 @@
+
+ static int block2mtd_setup2(const char *val)
+ {
+- char buf[80 + 12]; /* 80 for device, 12 for erase size */
++ char buf[80 + 12 + 80]; /* 80 for device, 12 for erase size, 80 for name */
+ char *str = buf;
+- char *token[2];
++ char *token[3];
+ char *name;
+ size_t erase_size = PAGE_SIZE;
+ int i, ret;
+@@ -443,7 +452,7 @@
+ strcpy(str, val);
+ kill_final_newline(str);
+
+- for (i = 0; i < 2; i++)
++ for (i = 0; i < 3; i++)
+ token[i] = strsep(&str, ",");
+
+ if (str)
+@@ -463,8 +472,10 @@
+ parse_err("illegal erase size");
+ }
+ }
++ if (token[2] && (strlen(token[2]) + 1 > 80))
++ parse_err("mtd device name too long");
+
+- add_device(name, erase_size);
++ add_device(name, erase_size, token[2]);
+
+ return 0;
+ }
+@@ -498,7 +509,7 @@
+
+
+ module_param_call(block2mtd, block2mtd_setup, NULL, NULL, 0200);
+-MODULE_PARM_DESC(block2mtd, "Device to use. \"block2mtd=<dev>[,<erasesize>]\"");
++MODULE_PARM_DESC(block2mtd, "Device to use. \"block2mtd=<dev>[,<erasesize>[,<name>]]\"");
+
+ static int __init block2mtd_init(void)
+ {
--- /dev/null
+diff -urN linux.old/include/linux/netfilter_ipv4/ip_conntrack.h linux.dev/include/linux/netfilter_ipv4/ip_conntrack.h
+--- linux.old/include/linux/netfilter_ipv4/ip_conntrack.h 2007-01-01 05:17:07.000000000 +0100
++++ linux.dev/include/linux/netfilter_ipv4/ip_conntrack.h 2007-01-01 05:18:48.000000000 +0100
+@@ -127,6 +127,15 @@
+ /* Traversed often, so hopefully in different cacheline to top */
+ /* These are my tuples; original and reply */
+ struct ip_conntrack_tuple_hash tuplehash[IP_CT_DIR_MAX];
++
++#if defined(CONFIG_IP_NF_MATCH_LAYER7) || defined(CONFIG_IP_NF_MATCH_LAYER7_MODULE)
++ struct {
++ char * app_proto; /* e.g. "http". NULL before decision. "unknown" after decision if no match */
++ char * app_data; /* application layer data so far. NULL after match decision */
++ unsigned int app_data_len;
++ } layer7;
++#endif
++
+ };
+
+ struct ip_conntrack_expect
+diff -urN linux.old/include/linux/netfilter_ipv4/ipt_layer7.h linux.dev/include/linux/netfilter_ipv4/ipt_layer7.h
+--- linux.old/include/linux/netfilter_ipv4/ipt_layer7.h 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/include/linux/netfilter_ipv4/ipt_layer7.h 2007-01-01 05:18:48.000000000 +0100
+@@ -0,0 +1,26 @@
++/*
++ By Matthew Strait <quadong@users.sf.net>, Dec 2003.
++ http://l7-filter.sf.net
++
++ This program is free software; you can redistribute it and/or
++ modify it under the terms of the GNU General Public License
++ as published by the Free Software Foundation; either version
++ 2 of the License, or (at your option) any later version.
++ http://www.gnu.org/licenses/gpl.txt
++*/
++
++#ifndef _IPT_LAYER7_H
++#define _IPT_LAYER7_H
++
++#define MAX_PATTERN_LEN 8192
++#define MAX_PROTOCOL_LEN 256
++
++typedef char *(*proc_ipt_search) (char *, char, char *);
++
++struct ipt_layer7_info {
++ char protocol[MAX_PROTOCOL_LEN];
++ char invert:1;
++ char pattern[MAX_PATTERN_LEN];
++};
++
++#endif /* _IPT_LAYER7_H */
+diff -urN linux.old/net/ipv4/netfilter/ip_conntrack_core.c linux.dev/net/ipv4/netfilter/ip_conntrack_core.c
+--- linux.old/net/ipv4/netfilter/ip_conntrack_core.c 2007-01-01 05:17:07.000000000 +0100
++++ linux.dev/net/ipv4/netfilter/ip_conntrack_core.c 2007-01-01 05:18:48.000000000 +0100
+@@ -337,6 +337,13 @@
+ * too. */
+ ip_ct_remove_expectations(ct);
+
++ #if defined(CONFIG_IP_NF_MATCH_LAYER7) || defined(CONFIG_IP_NF_MATCH_LAYER7_MODULE)
++ if(ct->layer7.app_proto)
++ kfree(ct->layer7.app_proto);
++ if(ct->layer7.app_data)
++ kfree(ct->layer7.app_data);
++ #endif
++
+ /* We overload first tuple to link into unconfirmed list. */
+ if (!is_confirmed(ct)) {
+ BUG_ON(list_empty(&ct->tuplehash[IP_CT_DIR_ORIGINAL].list));
+diff -urN linux.old/net/ipv4/netfilter/ip_conntrack_standalone.c linux.dev/net/ipv4/netfilter/ip_conntrack_standalone.c
+--- linux.old/net/ipv4/netfilter/ip_conntrack_standalone.c 2007-01-01 05:17:07.000000000 +0100
++++ linux.dev/net/ipv4/netfilter/ip_conntrack_standalone.c 2007-01-01 05:18:48.000000000 +0100
+@@ -192,6 +192,12 @@
+ return -ENOSPC;
+ #endif
+
++#if defined(CONFIG_IP_NF_MATCH_LAYER7) || defined(CONFIG_IP_NF_MATCH_LAYER7_MODULE)
++ if(conntrack->layer7.app_proto)
++ if (seq_printf(s, "l7proto=%s ",conntrack->layer7.app_proto))
++ return 1;
++#endif
++
+ if (seq_printf(s, "use=%u\n", atomic_read(&conntrack->ct_general.use)))
+ return -ENOSPC;
+
+diff -urN linux.old/net/ipv4/netfilter/ipt_layer7.c linux.dev/net/ipv4/netfilter/ipt_layer7.c
+--- linux.old/net/ipv4/netfilter/ipt_layer7.c 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/net/ipv4/netfilter/ipt_layer7.c 2007-01-01 05:18:48.000000000 +0100
+@@ -0,0 +1,573 @@
++/*
++ Kernel module to match application layer (OSI layer 7) data in connections.
++
++ http://l7-filter.sf.net
++
++ By Matthew Strait and Ethan Sommer, 2003-2006.
++
++ This program is free software; you can redistribute it and/or
++ modify it under the terms of the GNU General Public License
++ as published by the Free Software Foundation; either version
++ 2 of the License, or (at your option) any later version.
++ http://www.gnu.org/licenses/gpl.txt
++
++ Based on ipt_string.c (C) 2000 Emmanuel Roger <winfield@freegates.be>
++ and cls_layer7.c (C) 2003 Matthew Strait, Ethan Sommer, Justin Levandoski
++*/
++
++#include <linux/module.h>
++#include <linux/skbuff.h>
++#include <linux/netfilter_ipv4/ip_conntrack.h>
++#include <linux/proc_fs.h>
++#include <linux/ctype.h>
++#include <net/ip.h>
++#include <net/tcp.h>
++#include <linux/spinlock.h>
++
++#include "regexp/regexp.c"
++
++#include <linux/netfilter_ipv4/ipt_layer7.h>
++#include <linux/netfilter_ipv4/ip_tables.h>
++
++MODULE_AUTHOR("Matthew Strait <quadong@users.sf.net>, Ethan Sommer <sommere@users.sf.net>");
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("iptables application layer match module");
++MODULE_VERSION("2.0");
++
++static int maxdatalen = 2048; // this is the default
++module_param(maxdatalen, int, 0444);
++MODULE_PARM_DESC(maxdatalen, "maximum bytes of data looked at by l7-filter");
++
++#ifdef CONFIG_IP_NF_MATCH_LAYER7_DEBUG
++ #define DPRINTK(format,args...) printk(format,##args)
++#else
++ #define DPRINTK(format,args...)
++#endif
++
++#define TOTAL_PACKETS master_conntrack->counters[IP_CT_DIR_ORIGINAL].packets + \
++ master_conntrack->counters[IP_CT_DIR_REPLY].packets
++
++/* Number of packets whose data we look at.
++This can be modified through /proc/net/layer7_numpackets */
++static int num_packets = 10;
++
++static struct pattern_cache {
++ char * regex_string;
++ regexp * pattern;
++ struct pattern_cache * next;
++} * first_pattern_cache = NULL;
++
++/* I'm new to locking. Here are my assumptions:
++
++- No one will write to /proc/net/layer7_numpackets over and over very fast;
++ if they did, nothing awful would happen.
++
++- This code will never be processing the same packet twice at the same time,
++ because iptables rules are traversed in order.
++
++- It doesn't matter if two packets from different connections are in here at
++ the same time, because they don't share any data.
++
++- It _does_ matter if two packets from the same connection (or one from a
++ master and one from its child) are here at the same time. In this case,
++ we have to protect the conntracks and the list of compiled patterns.
++*/
++DEFINE_RWLOCK(ct_lock);
++DEFINE_SPINLOCK(list_lock);
++
++#ifdef CONFIG_IP_NF_MATCH_LAYER7_DEBUG
++/* Converts an unfriendly string into a friendly one by
++replacing unprintables with periods and all whitespace with " ". */
++static char * friendly_print(unsigned char * s)
++{
++ char * f = kmalloc(strlen(s) + 1, GFP_ATOMIC);
++ int i;
++
++ if(!f) {
++ if (net_ratelimit())
++ printk(KERN_ERR "layer7: out of memory in friendly_print, bailing.\n");
++ return NULL;
++ }
++
++ for(i = 0; i < strlen(s); i++){
++ if(isprint(s[i]) && s[i] < 128) f[i] = s[i];
++ else if(isspace(s[i])) f[i] = ' ';
++ else f[i] = '.';
++ }
++ f[i] = '\0';
++ return f;
++}
++
++static char dec2hex(int i)
++{
++ switch (i) {
++ case 0 ... 9:
++ return (char)(i + '0');
++ break;
++ case 10 ... 15:
++ return (char)(i - 10 + 'a');
++ break;
++ default:
++ if (net_ratelimit())
++ printk("Problem in dec2hex\n");
++ return '\0';
++ }
++}
++
++static char * hex_print(unsigned char * s)
++{
++ char * g = kmalloc(strlen(s)*3 + 1, GFP_ATOMIC);
++ int i;
++
++ if(!g) {
++ if (net_ratelimit())
++ printk(KERN_ERR "layer7: out of memory in hex_print, bailing.\n");
++ return NULL;
++ }
++
++ for(i = 0; i < strlen(s); i++) {
++ g[i*3 ] = dec2hex(s[i]/16);
++ g[i*3 + 1] = dec2hex(s[i]%16);
++ g[i*3 + 2] = ' ';
++ }
++ g[i*3] = '\0';
++
++ return g;
++}
++#endif // DEBUG
++
++/* Use instead of regcomp. As we expect to be seeing the same regexps over and
++over again, it make sense to cache the results. */
++static regexp * compile_and_cache(char * regex_string, char * protocol)
++{
++ struct pattern_cache * node = first_pattern_cache;
++ struct pattern_cache * last_pattern_cache = first_pattern_cache;
++ struct pattern_cache * tmp;
++ unsigned int len;
++
++ while (node != NULL) {
++ if (!strcmp(node->regex_string, regex_string))
++ return node->pattern;
++
++ last_pattern_cache = node;/* points at the last non-NULL node */
++ node = node->next;
++ }
++
++ /* If we reach the end of the list, then we have not yet cached
++ the pattern for this regex. Let's do that now.
++ Be paranoid about running out of memory to avoid list corruption. */
++ tmp = kmalloc(sizeof(struct pattern_cache), GFP_ATOMIC);
++
++ if(!tmp) {
++ if (net_ratelimit())
++ printk(KERN_ERR "layer7: out of memory in compile_and_cache, bailing.\n");
++ return NULL;
++ }
++
++ tmp->regex_string = kmalloc(strlen(regex_string) + 1, GFP_ATOMIC);
++ tmp->pattern = kmalloc(sizeof(struct regexp), GFP_ATOMIC);
++ tmp->next = NULL;
++
++ if(!tmp->regex_string || !tmp->pattern) {
++ if (net_ratelimit())
++ printk(KERN_ERR "layer7: out of memory in compile_and_cache, bailing.\n");
++ kfree(tmp->regex_string);
++ kfree(tmp->pattern);
++ kfree(tmp);
++ return NULL;
++ }
++
++ /* Ok. The new node is all ready now. */
++ node = tmp;
++
++ if(first_pattern_cache == NULL) /* list is empty */
++ first_pattern_cache = node; /* make node the beginning */
++ else
++ last_pattern_cache->next = node; /* attach node to the end */
++
++ /* copy the string and compile the regex */
++ len = strlen(regex_string);
++ DPRINTK("About to compile this: \"%s\"\n", regex_string);
++ node->pattern = regcomp(regex_string, &len);
++ if ( !node->pattern ) {
++ if (net_ratelimit())
++ printk(KERN_ERR "layer7: Error compiling regexp \"%s\" (%s)\n", regex_string, protocol);
++ /* pattern is now cached as NULL, so we won't try again. */
++ }
++
++ strcpy(node->regex_string, regex_string);
++ return node->pattern;
++}
++
++static int can_handle(const struct sk_buff *skb)
++{
++ if(!skb->nh.iph) /* not IP */
++ return 0;
++ if(skb->nh.iph->protocol != IPPROTO_TCP &&
++ skb->nh.iph->protocol != IPPROTO_UDP &&
++ skb->nh.iph->protocol != IPPROTO_ICMP)
++ return 0;
++ return 1;
++}
++
++/* Returns offset the into the skb->data that the application data starts */
++static int app_data_offset(const struct sk_buff *skb)
++{
++ /* In case we are ported somewhere (ebtables?) where skb->nh.iph
++ isn't set, this can be gotten from 4*(skb->data[0] & 0x0f) as well. */
++ int ip_hl = 4*skb->nh.iph->ihl;
++
++ if( skb->nh.iph->protocol == IPPROTO_TCP ) {
++ /* 12 == offset into TCP header for the header length field.
++ Can't get this with skb->h.th->doff because the tcphdr
++ struct doesn't get set when routing (this is confirmed to be
++ true in Netfilter as well as QoS.) */
++ int tcp_hl = 4*(skb->data[ip_hl + 12] >> 4);
++
++ return ip_hl + tcp_hl;
++ } else if( skb->nh.iph->protocol == IPPROTO_UDP ) {
++ return ip_hl + 8; /* UDP header is always 8 bytes */
++ } else if( skb->nh.iph->protocol == IPPROTO_ICMP ) {
++ return ip_hl + 8; /* ICMP header is 8 bytes */
++ } else {
++ if (net_ratelimit())
++ printk(KERN_ERR "layer7: tried to handle unknown protocol!\n");
++ return ip_hl + 8; /* something reasonable */
++ }
++}
++
++/* handles whether there's a match when we aren't appending data anymore */
++static int match_no_append(struct ip_conntrack * conntrack, struct ip_conntrack * master_conntrack,
++ enum ip_conntrack_info ctinfo, enum ip_conntrack_info master_ctinfo,
++ struct ipt_layer7_info * info)
++{
++ /* If we're in here, throw the app data away */
++ write_lock(&ct_lock);
++ if(master_conntrack->layer7.app_data != NULL) {
++
++ #ifdef CONFIG_IP_NF_MATCH_LAYER7_DEBUG
++ if(!master_conntrack->layer7.app_proto) {
++ char * f = friendly_print(master_conntrack->layer7.app_data);
++ char * g = hex_print(master_conntrack->layer7.app_data);
++ DPRINTK("\nl7-filter gave up after %d bytes (%d packets):\n%s\n",
++ strlen(f), TOTAL_PACKETS, f);
++ kfree(f);
++ DPRINTK("In hex: %s\n", g);
++ kfree(g);
++ }
++ #endif
++
++ kfree(master_conntrack->layer7.app_data);
++ master_conntrack->layer7.app_data = NULL; /* don't free again */
++ }
++ write_unlock(&ct_lock);
++
++ if(master_conntrack->layer7.app_proto){
++ /* Here child connections set their .app_proto (for /proc/net/ip_conntrack) */
++ write_lock(&ct_lock);
++ if(!conntrack->layer7.app_proto) {
++ conntrack->layer7.app_proto = kmalloc(strlen(master_conntrack->layer7.app_proto)+1, GFP_ATOMIC);
++ if(!conntrack->layer7.app_proto){
++ if (net_ratelimit())
++ printk(KERN_ERR "layer7: out of memory in match_no_append, bailing.\n");
++ write_unlock(&ct_lock);
++ return 1;
++ }
++ strcpy(conntrack->layer7.app_proto, master_conntrack->layer7.app_proto);
++ }
++ write_unlock(&ct_lock);
++
++ return (!strcmp(master_conntrack->layer7.app_proto, info->protocol));
++ }
++ else {
++ /* If not classified, set to "unknown" to distinguish from
++ connections that are still being tested. */
++ write_lock(&ct_lock);
++ master_conntrack->layer7.app_proto = kmalloc(strlen("unknown")+1, GFP_ATOMIC);
++ if(!master_conntrack->layer7.app_proto){
++ if (net_ratelimit())
++ printk(KERN_ERR "layer7: out of memory in match_no_append, bailing.\n");
++ write_unlock(&ct_lock);
++ return 1;
++ }
++ strcpy(master_conntrack->layer7.app_proto, "unknown");
++ write_unlock(&ct_lock);
++ return 0;
++ }
++}
++
++/* add the new app data to the conntrack. Return number of bytes added. */
++static int add_data(struct ip_conntrack * master_conntrack,
++ char * app_data, int appdatalen)
++{
++ int length = 0, i;
++ int oldlength = master_conntrack->layer7.app_data_len;
++
++ // This is a fix for a race condition by Deti Fliegl. However, I'm not
++ // clear on whether the race condition exists or whether this really
++ // fixes it. I might just be being dense... Anyway, if it's not really
++ // a fix, all it does is waste a very small amount of time.
++ if(!master_conntrack->layer7.app_data) return 0;
++
++ /* Strip nulls. Make everything lower case (our regex lib doesn't
++ do case insensitivity). Add it to the end of the current data. */
++ for(i = 0; i < maxdatalen-oldlength-1 &&
++ i < appdatalen; i++) {
++ if(app_data[i] != '\0') {
++ master_conntrack->layer7.app_data[length+oldlength] =
++ /* the kernel version of tolower mungs 'upper ascii' */
++ isascii(app_data[i])? tolower(app_data[i]) : app_data[i];
++ length++;
++ }
++ }
++
++ master_conntrack->layer7.app_data[length+oldlength] = '\0';
++ master_conntrack->layer7.app_data_len = length + oldlength;
++
++ return length;
++}
++
++/* Returns true on match and false otherwise. */
++static int match(const struct sk_buff *skbin,
++ const struct net_device *in, const struct net_device *out,
++ const struct xt_match *match, const void *matchinfo,
++ int offset, unsigned int protoff, int *hotdrop)
++{
++ /* sidestep const without getting a compiler warning... */
++ struct sk_buff * skb = (struct sk_buff *)skbin;
++
++ struct ipt_layer7_info * info = (struct ipt_layer7_info *)matchinfo;
++ enum ip_conntrack_info master_ctinfo, ctinfo;
++ struct ip_conntrack *master_conntrack, *conntrack;
++ unsigned char * app_data;
++ unsigned int pattern_result, appdatalen;
++ regexp * comppattern;
++
++ if(!can_handle(skb)){
++ DPRINTK("layer7: This is some protocol I can't handle.\n");
++ return info->invert;
++ }
++
++ /* Treat parent & all its children together as one connection, except
++ for the purpose of setting conntrack->layer7.app_proto in the actual
++ connection. This makes /proc/net/ip_conntrack more satisfying. */
++ if(!(conntrack = ip_conntrack_get((struct sk_buff *)skb, &ctinfo)) ||
++ !(master_conntrack = ip_conntrack_get((struct sk_buff *)skb, &master_ctinfo))) {
++ //DPRINTK("layer7: packet is not from a known connection, giving up.\n");
++ return info->invert;
++ }
++
++ /* Try to get a master conntrack (and its master etc) for FTP, etc. */
++ while (master_ct(master_conntrack) != NULL)
++ master_conntrack = master_ct(master_conntrack);
++
++ /* if we've classified it or seen too many packets */
++ if(TOTAL_PACKETS > num_packets ||
++ master_conntrack->layer7.app_proto) {
++
++ pattern_result = match_no_append(conntrack, master_conntrack, ctinfo, master_ctinfo, info);
++
++ /* skb->cb[0] == seen. Avoid doing things twice if there are two l7
++ rules. I'm not sure that using cb for this purpose is correct, although
++ it says "put your private variables there". But it doesn't look like it
++ is being used for anything else in the skbs that make it here. How can
++ I write to cb without making the compiler angry? */
++ skb->cb[0] = 1; /* marking it seen here is probably irrelevant, but consistant */
++
++ return (pattern_result ^ info->invert);
++ }
++
++ if(skb_is_nonlinear(skb)){
++ if(skb_linearize(skb) != 0){
++ if (net_ratelimit())
++ printk(KERN_ERR "layer7: failed to linearize packet, bailing.\n");
++ return info->invert;
++ }
++ }
++
++ /* now that the skb is linearized, it's safe to set these. */
++ app_data = skb->data + app_data_offset(skb);
++ appdatalen = skb->tail - app_data;
++
++ spin_lock_bh(&list_lock);
++ /* the return value gets checked later, when we're ready to use it */
++ comppattern = compile_and_cache(info->pattern, info->protocol);
++ spin_unlock_bh(&list_lock);
++
++ /* On the first packet of a connection, allocate space for app data */
++ write_lock(&ct_lock);
++ if(TOTAL_PACKETS == 1 && !skb->cb[0] && !master_conntrack->layer7.app_data) {
++ master_conntrack->layer7.app_data = kmalloc(maxdatalen, GFP_ATOMIC);
++ if(!master_conntrack->layer7.app_data){
++ if (net_ratelimit())
++ printk(KERN_ERR "layer7: out of memory in match, bailing.\n");
++ write_unlock(&ct_lock);
++ return info->invert;
++ }
++
++ master_conntrack->layer7.app_data[0] = '\0';
++ }
++ write_unlock(&ct_lock);
++
++ /* Can be here, but unallocated, if numpackets is increased near
++ the beginning of a connection */
++ if(master_conntrack->layer7.app_data == NULL)
++ return (info->invert); /* unmatched */
++
++ if(!skb->cb[0]){
++ int newbytes;
++ write_lock(&ct_lock);
++ newbytes = add_data(master_conntrack, app_data, appdatalen);
++ write_unlock(&ct_lock);
++
++ if(newbytes == 0) { /* didn't add any data */
++ skb->cb[0] = 1;
++ /* Didn't match before, not going to match now */
++ return info->invert;
++ }
++ }
++
++ /* If looking for "unknown", then never match. "Unknown" means that
++ we've given up; we're still trying with these packets. */
++ read_lock(&ct_lock);
++ if(!strcmp(info->protocol, "unknown")) {
++ pattern_result = 0;
++ /* If the regexp failed to compile, don't bother running it */
++ } else if(comppattern && regexec(comppattern, master_conntrack->layer7.app_data)) {
++ DPRINTK("layer7: matched %s\n", info->protocol);
++ pattern_result = 1;
++ } else pattern_result = 0;
++ read_unlock(&ct_lock);
++
++ if(pattern_result) {
++ write_lock(&ct_lock);
++ master_conntrack->layer7.app_proto = kmalloc(strlen(info->protocol)+1, GFP_ATOMIC);
++ if(!master_conntrack->layer7.app_proto){
++ if (net_ratelimit())
++ printk(KERN_ERR "layer7: out of memory in match, bailing.\n");
++ write_unlock(&ct_lock);
++ return (pattern_result ^ info->invert);
++ }
++ strcpy(master_conntrack->layer7.app_proto, info->protocol);
++ write_unlock(&ct_lock);
++ }
++
++ /* mark the packet seen */
++ skb->cb[0] = 1;
++
++ return (pattern_result ^ info->invert);
++}
++
++static struct ipt_match layer7_match = {
++ .name = "layer7",
++ .match = &match,
++ .matchsize = sizeof(struct ipt_layer7_info),
++ .me = THIS_MODULE
++};
++
++/* taken from drivers/video/modedb.c */
++static int my_atoi(const char *s)
++{
++ int val = 0;
++
++ for (;; s++) {
++ switch (*s) {
++ case '0'...'9':
++ val = 10*val+(*s-'0');
++ break;
++ default:
++ return val;
++ }
++ }
++}
++
++/* write out num_packets to userland. */
++static int layer7_read_proc(char* page, char ** start, off_t off, int count,
++ int* eof, void * data)
++{
++ if(num_packets > 99 && net_ratelimit())
++ printk(KERN_ERR "layer7: NOT REACHED. num_packets too big\n");
++
++ page[0] = num_packets/10 + '0';
++ page[1] = num_packets%10 + '0';
++ page[2] = '\n';
++ page[3] = '\0';
++
++ *eof=1;
++
++ return 3;
++}
++
++/* Read in num_packets from userland */
++static int layer7_write_proc(struct file* file, const char* buffer,
++ unsigned long count, void *data)
++{
++ char * foo = kmalloc(count, GFP_ATOMIC);
++
++ if(!foo){
++ if (net_ratelimit())
++ printk(KERN_ERR "layer7: out of memory, bailing. num_packets unchanged.\n");
++ return count;
++ }
++
++ if(copy_from_user(foo, buffer, count)) {
++ return -EFAULT;
++ }
++
++
++ num_packets = my_atoi(foo);
++ kfree (foo);
++
++ /* This has an arbitrary limit to make the math easier. I'm lazy.
++ But anyway, 99 is a LOT! If you want more, you're doing it wrong! */
++ if(num_packets > 99) {
++ printk(KERN_WARNING "layer7: num_packets can't be > 99.\n");
++ num_packets = 99;
++ } else if(num_packets < 1) {
++ printk(KERN_WARNING "layer7: num_packets can't be < 1.\n");
++ num_packets = 1;
++ }
++
++ return count;
++}
++
++/* register the proc file */
++static void layer7_init_proc(void)
++{
++ struct proc_dir_entry* entry;
++ entry = create_proc_entry("layer7_numpackets", 0644, proc_net);
++ entry->read_proc = layer7_read_proc;
++ entry->write_proc = layer7_write_proc;
++}
++
++static void layer7_cleanup_proc(void)
++{
++ remove_proc_entry("layer7_numpackets", proc_net);
++}
++
++static int __init ipt_layer7_init(void)
++{
++ need_conntrack();
++
++ layer7_init_proc();
++ if(maxdatalen < 1) {
++ printk(KERN_WARNING "layer7: maxdatalen can't be < 1, using 1\n");
++ maxdatalen = 1;
++ }
++ /* This is not a hard limit. It's just here to prevent people from
++ bringing their slow machines to a grinding halt. */
++ else if(maxdatalen > 65536) {
++ printk(KERN_WARNING "layer7: maxdatalen can't be > 65536, using 65536\n");
++ maxdatalen = 65536;
++ }
++ return ipt_register_match(&layer7_match);
++}
++
++static void __exit ipt_layer7_fini(void)
++{
++ layer7_cleanup_proc();
++ ipt_unregister_match(&layer7_match);
++}
++
++module_init(ipt_layer7_init);
++module_exit(ipt_layer7_fini);
+diff -urN linux.old/net/ipv4/netfilter/Kconfig linux.dev/net/ipv4/netfilter/Kconfig
+--- linux.old/net/ipv4/netfilter/Kconfig 2007-01-01 05:17:07.000000000 +0100
++++ linux.dev/net/ipv4/netfilter/Kconfig 2007-01-01 05:18:48.000000000 +0100
+@@ -248,6 +248,24 @@
+
+ To compile it as a module, choose M here. If unsure, say N.
+
++config IP_NF_MATCH_LAYER7
++ tristate "Layer 7 match support (EXPERIMENTAL)"
++ depends on IP_NF_IPTABLES && IP_NF_CT_ACCT && IP_NF_CONNTRACK && EXPERIMENTAL
++ help
++ Say Y if you want to be able to classify connections (and their
++ packets) based on regular expression matching of their application
++ layer data. This is one way to classify applications such as
++ peer-to-peer filesharing systems that do not always use the same
++ port.
++
++ To compile it as a module, choose M here. If unsure, say N.
++
++config IP_NF_MATCH_LAYER7_DEBUG
++ bool "Layer 7 debugging output"
++ depends on IP_NF_MATCH_LAYER7
++ help
++ Say Y to get lots of debugging output.
++
+ config IP_NF_MATCH_TOS
+ tristate "TOS match support"
+ depends on IP_NF_IPTABLES
+diff -urN linux.old/net/ipv4/netfilter/Makefile linux.dev/net/ipv4/netfilter/Makefile
+--- linux.old/net/ipv4/netfilter/Makefile 2007-01-01 05:17:07.000000000 +0100
++++ linux.dev/net/ipv4/netfilter/Makefile 2007-01-01 05:18:48.000000000 +0100
+@@ -63,6 +63,8 @@
+ obj-$(CONFIG_IP_NF_MATCH_TTL) += ipt_ttl.o
+ obj-$(CONFIG_IP_NF_MATCH_ADDRTYPE) += ipt_addrtype.o
+
++obj-$(CONFIG_IP_NF_MATCH_LAYER7) += ipt_layer7.o
++
+ # targets
+ obj-$(CONFIG_IP_NF_TARGET_REJECT) += ipt_REJECT.o
+ obj-$(CONFIG_IP_NF_TARGET_TOS) += ipt_TOS.o
+diff -urN linux.old/net/ipv4/netfilter/regexp/regexp.c linux.dev/net/ipv4/netfilter/regexp/regexp.c
+--- linux.old/net/ipv4/netfilter/regexp/regexp.c 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/net/ipv4/netfilter/regexp/regexp.c 2007-01-01 05:18:48.000000000 +0100
+@@ -0,0 +1,1197 @@
++/*
++ * regcomp and regexec -- regsub and regerror are elsewhere
++ * @(#)regexp.c 1.3 of 18 April 87
++ *
++ * Copyright (c) 1986 by University of Toronto.
++ * Written by Henry Spencer. Not derived from licensed software.
++ *
++ * Permission is granted to anyone to use this software for any
++ * purpose on any computer system, and to redistribute it freely,
++ * subject to the following restrictions:
++ *
++ * 1. The author is not responsible for the consequences of use of
++ * this software, no matter how awful, even if they arise
++ * from defects in it.
++ *
++ * 2. The origin of this software must not be misrepresented, either
++ * by explicit claim or by omission.
++ *
++ * 3. Altered versions must be plainly marked as such, and must not
++ * be misrepresented as being the original software.
++ *
++ * Beware that some of this code is subtly aware of the way operator
++ * precedence is structured in regular expressions. Serious changes in
++ * regular-expression syntax might require a total rethink.
++ *
++ * This code was modified by Ethan Sommer to work within the kernel
++ * (it now uses kmalloc etc..)
++ *
++ * Modified slightly by Matthew Strait to use more modern C.
++ */
++
++#include "regexp.h"
++#include "regmagic.h"
++
++/* added by ethan and matt. Lets it work in both kernel and user space.
++(So iptables can use it, for instance.) Yea, it goes both ways... */
++#if __KERNEL__
++ #define malloc(foo) kmalloc(foo,GFP_ATOMIC)
++#else
++ #define printk(format,args...) printf(format,##args)
++#endif
++
++void regerror(char * s)
++{
++ printk("<3>Regexp: %s\n", s);
++ /* NOTREACHED */
++}
++
++/*
++ * The "internal use only" fields in regexp.h are present to pass info from
++ * compile to execute that permits the execute phase to run lots faster on
++ * simple cases. They are:
++ *
++ * regstart char that must begin a match; '\0' if none obvious
++ * reganch is the match anchored (at beginning-of-line only)?
++ * regmust string (pointer into program) that match must include, or NULL
++ * regmlen length of regmust string
++ *
++ * Regstart and reganch permit very fast decisions on suitable starting points
++ * for a match, cutting down the work a lot. Regmust permits fast rejection
++ * of lines that cannot possibly match. The regmust tests are costly enough
++ * that regcomp() supplies a regmust only if the r.e. contains something
++ * potentially expensive (at present, the only such thing detected is * or +
++ * at the start of the r.e., which can involve a lot of backup). Regmlen is
++ * supplied because the test in regexec() needs it and regcomp() is computing
++ * it anyway.
++ */
++
++/*
++ * Structure for regexp "program". This is essentially a linear encoding
++ * of a nondeterministic finite-state machine (aka syntax charts or
++ * "railroad normal form" in parsing technology). Each node is an opcode
++ * plus a "next" pointer, possibly plus an operand. "Next" pointers of
++ * all nodes except BRANCH implement concatenation; a "next" pointer with
++ * a BRANCH on both ends of it is connecting two alternatives. (Here we
++ * have one of the subtle syntax dependencies: an individual BRANCH (as
++ * opposed to a collection of them) is never concatenated with anything
++ * because of operator precedence.) The operand of some types of node is
++ * a literal string; for others, it is a node leading into a sub-FSM. In
++ * particular, the operand of a BRANCH node is the first node of the branch.
++ * (NB this is *not* a tree structure: the tail of the branch connects
++ * to the thing following the set of BRANCHes.) The opcodes are:
++ */
++
++/* definition number opnd? meaning */
++#define END 0 /* no End of program. */
++#define BOL 1 /* no Match "" at beginning of line. */
++#define EOL 2 /* no Match "" at end of line. */
++#define ANY 3 /* no Match any one character. */
++#define ANYOF 4 /* str Match any character in this string. */
++#define ANYBUT 5 /* str Match any character not in this string. */
++#define BRANCH 6 /* node Match this alternative, or the next... */
++#define BACK 7 /* no Match "", "next" ptr points backward. */
++#define EXACTLY 8 /* str Match this string. */
++#define NOTHING 9 /* no Match empty string. */
++#define STAR 10 /* node Match this (simple) thing 0 or more times. */
++#define PLUS 11 /* node Match this (simple) thing 1 or more times. */
++#define OPEN 20 /* no Mark this point in input as start of #n. */
++ /* OPEN+1 is number 1, etc. */
++#define CLOSE 30 /* no Analogous to OPEN. */
++
++/*
++ * Opcode notes:
++ *
++ * BRANCH The set of branches constituting a single choice are hooked
++ * together with their "next" pointers, since precedence prevents
++ * anything being concatenated to any individual branch. The
++ * "next" pointer of the last BRANCH in a choice points to the
++ * thing following the whole choice. This is also where the
++ * final "next" pointer of each individual branch points; each
++ * branch starts with the operand node of a BRANCH node.
++ *
++ * BACK Normal "next" pointers all implicitly point forward; BACK
++ * exists to make loop structures possible.
++ *
++ * STAR,PLUS '?', and complex '*' and '+', are implemented as circular
++ * BRANCH structures using BACK. Simple cases (one character
++ * per match) are implemented with STAR and PLUS for speed
++ * and to minimize recursive plunges.
++ *
++ * OPEN,CLOSE ...are numbered at compile time.
++ */
++
++/*
++ * A node is one char of opcode followed by two chars of "next" pointer.
++ * "Next" pointers are stored as two 8-bit pieces, high order first. The
++ * value is a positive offset from the opcode of the node containing it.
++ * An operand, if any, simply follows the node. (Note that much of the
++ * code generation knows about this implicit relationship.)
++ *
++ * Using two bytes for the "next" pointer is vast overkill for most things,
++ * but allows patterns to get big without disasters.
++ */
++#define OP(p) (*(p))
++#define NEXT(p) (((*((p)+1)&0377)<<8) + (*((p)+2)&0377))
++#define OPERAND(p) ((p) + 3)
++
++/*
++ * See regmagic.h for one further detail of program structure.
++ */
++
++
++/*
++ * Utility definitions.
++ */
++#ifndef CHARBITS
++#define UCHARAT(p) ((int)*(unsigned char *)(p))
++#else
++#define UCHARAT(p) ((int)*(p)&CHARBITS)
++#endif
++
++#define FAIL(m) { regerror(m); return(NULL); }
++#define ISMULT(c) ((c) == '*' || (c) == '+' || (c) == '?')
++#define META "^$.[()|?+*\\"
++
++/*
++ * Flags to be passed up and down.
++ */
++#define HASWIDTH 01 /* Known never to match null string. */
++#define SIMPLE 02 /* Simple enough to be STAR/PLUS operand. */
++#define SPSTART 04 /* Starts with * or +. */
++#define WORST 0 /* Worst case. */
++
++/*
++ * Global work variables for regcomp().
++ */
++struct match_globals {
++char *reginput; /* String-input pointer. */
++char *regbol; /* Beginning of input, for ^ check. */
++char **regstartp; /* Pointer to startp array. */
++char **regendp; /* Ditto for endp. */
++char *regparse; /* Input-scan pointer. */
++int regnpar; /* () count. */
++char regdummy;
++char *regcode; /* Code-emit pointer; ®dummy = don't. */
++long regsize; /* Code size. */
++};
++
++/*
++ * Forward declarations for regcomp()'s friends.
++ */
++#ifndef STATIC
++#define STATIC static
++#endif
++STATIC char *reg(struct match_globals *g, int paren,int *flagp);
++STATIC char *regbranch(struct match_globals *g, int *flagp);
++STATIC char *regpiece(struct match_globals *g, int *flagp);
++STATIC char *regatom(struct match_globals *g, int *flagp);
++STATIC char *regnode(struct match_globals *g, char op);
++STATIC char *regnext(struct match_globals *g, char *p);
++STATIC void regc(struct match_globals *g, char b);
++STATIC void reginsert(struct match_globals *g, char op, char *opnd);
++STATIC void regtail(struct match_globals *g, char *p, char *val);
++STATIC void regoptail(struct match_globals *g, char *p, char *val);
++
++
++__kernel_size_t my_strcspn(const char *s1,const char *s2)
++{
++ char *scan1;
++ char *scan2;
++ int count;
++
++ count = 0;
++ for (scan1 = (char *)s1; *scan1 != '\0'; scan1++) {
++ for (scan2 = (char *)s2; *scan2 != '\0';) /* ++ moved down. */
++ if (*scan1 == *scan2++)
++ return(count);
++ count++;
++ }
++ return(count);
++}
++
++/*
++ - regcomp - compile a regular expression into internal code
++ *
++ * We can't allocate space until we know how big the compiled form will be,
++ * but we can't compile it (and thus know how big it is) until we've got a
++ * place to put the code. So we cheat: we compile it twice, once with code
++ * generation turned off and size counting turned on, and once "for real".
++ * This also means that we don't allocate space until we are sure that the
++ * thing really will compile successfully, and we never have to move the
++ * code and thus invalidate pointers into it. (Note that it has to be in
++ * one piece because free() must be able to free it all.)
++ *
++ * Beware that the optimization-preparation code in here knows about some
++ * of the structure of the compiled regexp.
++ */
++regexp *
++regcomp(char *exp,int *patternsize)
++{
++ register regexp *r;
++ register char *scan;
++ register char *longest;
++ register int len;
++ int flags;
++ struct match_globals g;
++
++ /* commented out by ethan
++ extern char *malloc();
++ */
++
++ if (exp == NULL)
++ FAIL("NULL argument");
++
++ /* First pass: determine size, legality. */
++ g.regparse = exp;
++ g.regnpar = 1;
++ g.regsize = 0L;
++ g.regcode = &g.regdummy;
++ regc(&g, MAGIC);
++ if (reg(&g, 0, &flags) == NULL)
++ return(NULL);
++
++ /* Small enough for pointer-storage convention? */
++ if (g.regsize >= 32767L) /* Probably could be 65535L. */
++ FAIL("regexp too big");
++
++ /* Allocate space. */
++ *patternsize=sizeof(regexp) + (unsigned)g.regsize;
++ r = (regexp *)malloc(sizeof(regexp) + (unsigned)g.regsize);
++ if (r == NULL)
++ FAIL("out of space");
++
++ /* Second pass: emit code. */
++ g.regparse = exp;
++ g.regnpar = 1;
++ g.regcode = r->program;
++ regc(&g, MAGIC);
++ if (reg(&g, 0, &flags) == NULL)
++ return(NULL);
++
++ /* Dig out information for optimizations. */
++ r->regstart = '\0'; /* Worst-case defaults. */
++ r->reganch = 0;
++ r->regmust = NULL;
++ r->regmlen = 0;
++ scan = r->program+1; /* First BRANCH. */
++ if (OP(regnext(&g, scan)) == END) { /* Only one top-level choice. */
++ scan = OPERAND(scan);
++
++ /* Starting-point info. */
++ if (OP(scan) == EXACTLY)
++ r->regstart = *OPERAND(scan);
++ else if (OP(scan) == BOL)
++ r->reganch++;
++
++ /*
++ * If there's something expensive in the r.e., find the
++ * longest literal string that must appear and make it the
++ * regmust. Resolve ties in favor of later strings, since
++ * the regstart check works with the beginning of the r.e.
++ * and avoiding duplication strengthens checking. Not a
++ * strong reason, but sufficient in the absence of others.
++ */
++ if (flags&SPSTART) {
++ longest = NULL;
++ len = 0;
++ for (; scan != NULL; scan = regnext(&g, scan))
++ if (OP(scan) == EXACTLY && strlen(OPERAND(scan)) >= len) {
++ longest = OPERAND(scan);
++ len = strlen(OPERAND(scan));
++ }
++ r->regmust = longest;
++ r->regmlen = len;
++ }
++ }
++
++ return(r);
++}
++
++/*
++ - reg - regular expression, i.e. main body or parenthesized thing
++ *
++ * Caller must absorb opening parenthesis.
++ *
++ * Combining parenthesis handling with the base level of regular expression
++ * is a trifle forced, but the need to tie the tails of the branches to what
++ * follows makes it hard to avoid.
++ */
++static char *
++reg(struct match_globals *g, int paren, int *flagp /* Parenthesized? */ )
++{
++ register char *ret;
++ register char *br;
++ register char *ender;
++ register int parno = 0; /* 0 makes gcc happy */
++ int flags;
++
++ *flagp = HASWIDTH; /* Tentatively. */
++
++ /* Make an OPEN node, if parenthesized. */
++ if (paren) {
++ if (g->regnpar >= NSUBEXP)
++ FAIL("too many ()");
++ parno = g->regnpar;
++ g->regnpar++;
++ ret = regnode(g, OPEN+parno);
++ } else
++ ret = NULL;
++
++ /* Pick up the branches, linking them together. */
++ br = regbranch(g, &flags);
++ if (br == NULL)
++ return(NULL);
++ if (ret != NULL)
++ regtail(g, ret, br); /* OPEN -> first. */
++ else
++ ret = br;
++ if (!(flags&HASWIDTH))
++ *flagp &= ~HASWIDTH;
++ *flagp |= flags&SPSTART;
++ while (*g->regparse == '|') {
++ g->regparse++;
++ br = regbranch(g, &flags);
++ if (br == NULL)
++ return(NULL);
++ regtail(g, ret, br); /* BRANCH -> BRANCH. */
++ if (!(flags&HASWIDTH))
++ *flagp &= ~HASWIDTH;
++ *flagp |= flags&SPSTART;
++ }
++
++ /* Make a closing node, and hook it on the end. */
++ ender = regnode(g, (paren) ? CLOSE+parno : END);
++ regtail(g, ret, ender);
++
++ /* Hook the tails of the branches to the closing node. */
++ for (br = ret; br != NULL; br = regnext(g, br))
++ regoptail(g, br, ender);
++
++ /* Check for proper termination. */
++ if (paren && *g->regparse++ != ')') {
++ FAIL("unmatched ()");
++ } else if (!paren && *g->regparse != '\0') {
++ if (*g->regparse == ')') {
++ FAIL("unmatched ()");
++ } else
++ FAIL("junk on end"); /* "Can't happen". */
++ /* NOTREACHED */
++ }
++
++ return(ret);
++}
++
++/*
++ - regbranch - one alternative of an | operator
++ *
++ * Implements the concatenation operator.
++ */
++static char *
++regbranch(struct match_globals *g, int *flagp)
++{
++ register char *ret;
++ register char *chain;
++ register char *latest;
++ int flags;
++
++ *flagp = WORST; /* Tentatively. */
++
++ ret = regnode(g, BRANCH);
++ chain = NULL;
++ while (*g->regparse != '\0' && *g->regparse != '|' && *g->regparse != ')') {
++ latest = regpiece(g, &flags);
++ if (latest == NULL)
++ return(NULL);
++ *flagp |= flags&HASWIDTH;
++ if (chain == NULL) /* First piece. */
++ *flagp |= flags&SPSTART;
++ else
++ regtail(g, chain, latest);
++ chain = latest;
++ }
++ if (chain == NULL) /* Loop ran zero times. */
++ (void) regnode(g, NOTHING);
++
++ return(ret);
++}
++
++/*
++ - regpiece - something followed by possible [*+?]
++ *
++ * Note that the branching code sequences used for ? and the general cases
++ * of * and + are somewhat optimized: they use the same NOTHING node as
++ * both the endmarker for their branch list and the body of the last branch.
++ * It might seem that this node could be dispensed with entirely, but the
++ * endmarker role is not redundant.
++ */
++static char *
++regpiece(struct match_globals *g, int *flagp)
++{
++ register char *ret;
++ register char op;
++ register char *next;
++ int flags;
++
++ ret = regatom(g, &flags);
++ if (ret == NULL)
++ return(NULL);
++
++ op = *g->regparse;
++ if (!ISMULT(op)) {
++ *flagp = flags;
++ return(ret);
++ }
++
++ if (!(flags&HASWIDTH) && op != '?')
++ FAIL("*+ operand could be empty");
++ *flagp = (op != '+') ? (WORST|SPSTART) : (WORST|HASWIDTH);
++
++ if (op == '*' && (flags&SIMPLE))
++ reginsert(g, STAR, ret);
++ else if (op == '*') {
++ /* Emit x* as (x&|), where & means "self". */
++ reginsert(g, BRANCH, ret); /* Either x */
++ regoptail(g, ret, regnode(g, BACK)); /* and loop */
++ regoptail(g, ret, ret); /* back */
++ regtail(g, ret, regnode(g, BRANCH)); /* or */
++ regtail(g, ret, regnode(g, NOTHING)); /* null. */
++ } else if (op == '+' && (flags&SIMPLE))
++ reginsert(g, PLUS, ret);
++ else if (op == '+') {
++ /* Emit x+ as x(&|), where & means "self". */
++ next = regnode(g, BRANCH); /* Either */
++ regtail(g, ret, next);
++ regtail(g, regnode(g, BACK), ret); /* loop back */
++ regtail(g, next, regnode(g, BRANCH)); /* or */
++ regtail(g, ret, regnode(g, NOTHING)); /* null. */
++ } else if (op == '?') {
++ /* Emit x? as (x|) */
++ reginsert(g, BRANCH, ret); /* Either x */
++ regtail(g, ret, regnode(g, BRANCH)); /* or */
++ next = regnode(g, NOTHING); /* null. */
++ regtail(g, ret, next);
++ regoptail(g, ret, next);
++ }
++ g->regparse++;
++ if (ISMULT(*g->regparse))
++ FAIL("nested *?+");
++
++ return(ret);
++}
++
++/*
++ - regatom - the lowest level
++ *
++ * Optimization: gobbles an entire sequence of ordinary characters so that
++ * it can turn them into a single node, which is smaller to store and
++ * faster to run. Backslashed characters are exceptions, each becoming a
++ * separate node; the code is simpler that way and it's not worth fixing.
++ */
++static char *
++regatom(struct match_globals *g, int *flagp)
++{
++ register char *ret;
++ int flags;
++
++ *flagp = WORST; /* Tentatively. */
++
++ switch (*g->regparse++) {
++ case '^':
++ ret = regnode(g, BOL);
++ break;
++ case '$':
++ ret = regnode(g, EOL);
++ break;
++ case '.':
++ ret = regnode(g, ANY);
++ *flagp |= HASWIDTH|SIMPLE;
++ break;
++ case '[': {
++ register int class;
++ register int classend;
++
++ if (*g->regparse == '^') { /* Complement of range. */
++ ret = regnode(g, ANYBUT);
++ g->regparse++;
++ } else
++ ret = regnode(g, ANYOF);
++ if (*g->regparse == ']' || *g->regparse == '-')
++ regc(g, *g->regparse++);
++ while (*g->regparse != '\0' && *g->regparse != ']') {
++ if (*g->regparse == '-') {
++ g->regparse++;
++ if (*g->regparse == ']' || *g->regparse == '\0')
++ regc(g, '-');
++ else {
++ class = UCHARAT(g->regparse-2)+1;
++ classend = UCHARAT(g->regparse);
++ if (class > classend+1)
++ FAIL("invalid [] range");
++ for (; class <= classend; class++)
++ regc(g, class);
++ g->regparse++;
++ }
++ } else
++ regc(g, *g->regparse++);
++ }
++ regc(g, '\0');
++ if (*g->regparse != ']')
++ FAIL("unmatched []");
++ g->regparse++;
++ *flagp |= HASWIDTH|SIMPLE;
++ }
++ break;
++ case '(':
++ ret = reg(g, 1, &flags);
++ if (ret == NULL)
++ return(NULL);
++ *flagp |= flags&(HASWIDTH|SPSTART);
++ break;
++ case '\0':
++ case '|':
++ case ')':
++ FAIL("internal urp"); /* Supposed to be caught earlier. */
++ break;
++ case '?':
++ case '+':
++ case '*':
++ FAIL("?+* follows nothing");
++ break;
++ case '\\':
++ if (*g->regparse == '\0')
++ FAIL("trailing \\");
++ ret = regnode(g, EXACTLY);
++ regc(g, *g->regparse++);
++ regc(g, '\0');
++ *flagp |= HASWIDTH|SIMPLE;
++ break;
++ default: {
++ register int len;
++ register char ender;
++
++ g->regparse--;
++ len = my_strcspn((const char *)g->regparse, (const char *)META);
++ if (len <= 0)
++ FAIL("internal disaster");
++ ender = *(g->regparse+len);
++ if (len > 1 && ISMULT(ender))
++ len--; /* Back off clear of ?+* operand. */
++ *flagp |= HASWIDTH;
++ if (len == 1)
++ *flagp |= SIMPLE;
++ ret = regnode(g, EXACTLY);
++ while (len > 0) {
++ regc(g, *g->regparse++);
++ len--;
++ }
++ regc(g, '\0');
++ }
++ break;
++ }
++
++ return(ret);
++}
++
++/*
++ - regnode - emit a node
++ */
++static char * /* Location. */
++regnode(struct match_globals *g, char op)
++{
++ register char *ret;
++ register char *ptr;
++
++ ret = g->regcode;
++ if (ret == &g->regdummy) {
++ g->regsize += 3;
++ return(ret);
++ }
++
++ ptr = ret;
++ *ptr++ = op;
++ *ptr++ = '\0'; /* Null "next" pointer. */
++ *ptr++ = '\0';
++ g->regcode = ptr;
++
++ return(ret);
++}
++
++/*
++ - regc - emit (if appropriate) a byte of code
++ */
++static void
++regc(struct match_globals *g, char b)
++{
++ if (g->regcode != &g->regdummy)
++ *g->regcode++ = b;
++ else
++ g->regsize++;
++}
++
++/*
++ - reginsert - insert an operator in front of already-emitted operand
++ *
++ * Means relocating the operand.
++ */
++static void
++reginsert(struct match_globals *g, char op, char* opnd)
++{
++ register char *src;
++ register char *dst;
++ register char *place;
++
++ if (g->regcode == &g->regdummy) {
++ g->regsize += 3;
++ return;
++ }
++
++ src = g->regcode;
++ g->regcode += 3;
++ dst = g->regcode;
++ while (src > opnd)
++ *--dst = *--src;
++
++ place = opnd; /* Op node, where operand used to be. */
++ *place++ = op;
++ *place++ = '\0';
++ *place++ = '\0';
++}
++
++/*
++ - regtail - set the next-pointer at the end of a node chain
++ */
++static void
++regtail(struct match_globals *g, char *p, char *val)
++{
++ register char *scan;
++ register char *temp;
++ register int offset;
++
++ if (p == &g->regdummy)
++ return;
++
++ /* Find last node. */
++ scan = p;
++ for (;;) {
++ temp = regnext(g, scan);
++ if (temp == NULL)
++ break;
++ scan = temp;
++ }
++
++ if (OP(scan) == BACK)
++ offset = scan - val;
++ else
++ offset = val - scan;
++ *(scan+1) = (offset>>8)&0377;
++ *(scan+2) = offset&0377;
++}
++
++/*
++ - regoptail - regtail on operand of first argument; nop if operandless
++ */
++static void
++regoptail(struct match_globals *g, char *p, char *val)
++{
++ /* "Operandless" and "op != BRANCH" are synonymous in practice. */
++ if (p == NULL || p == &g->regdummy || OP(p) != BRANCH)
++ return;
++ regtail(g, OPERAND(p), val);
++}
++
++/*
++ * regexec and friends
++ */
++
++
++/*
++ * Forwards.
++ */
++STATIC int regtry(struct match_globals *g, regexp *prog, char *string);
++STATIC int regmatch(struct match_globals *g, char *prog);
++STATIC int regrepeat(struct match_globals *g, char *p);
++
++#ifdef DEBUG
++int regnarrate = 0;
++void regdump();
++STATIC char *regprop(char *op);
++#endif
++
++/*
++ - regexec - match a regexp against a string
++ */
++int
++regexec(regexp *prog, char *string)
++{
++ register char *s;
++ struct match_globals g;
++
++ /* Be paranoid... */
++ if (prog == NULL || string == NULL) {
++ printk("<3>Regexp: NULL parameter\n");
++ return(0);
++ }
++
++ /* Check validity of program. */
++ if (UCHARAT(prog->program) != MAGIC) {
++ printk("<3>Regexp: corrupted program\n");
++ return(0);
++ }
++
++ /* If there is a "must appear" string, look for it. */
++ if (prog->regmust != NULL) {
++ s = string;
++ while ((s = strchr(s, prog->regmust[0])) != NULL) {
++ if (strncmp(s, prog->regmust, prog->regmlen) == 0)
++ break; /* Found it. */
++ s++;
++ }
++ if (s == NULL) /* Not present. */
++ return(0);
++ }
++
++ /* Mark beginning of line for ^ . */
++ g.regbol = string;
++
++ /* Simplest case: anchored match need be tried only once. */
++ if (prog->reganch)
++ return(regtry(&g, prog, string));
++
++ /* Messy cases: unanchored match. */
++ s = string;
++ if (prog->regstart != '\0')
++ /* We know what char it must start with. */
++ while ((s = strchr(s, prog->regstart)) != NULL) {
++ if (regtry(&g, prog, s))
++ return(1);
++ s++;
++ }
++ else
++ /* We don't -- general case. */
++ do {
++ if (regtry(&g, prog, s))
++ return(1);
++ } while (*s++ != '\0');
++
++ /* Failure. */
++ return(0);
++}
++
++/*
++ - regtry - try match at specific point
++ */
++static int /* 0 failure, 1 success */
++regtry(struct match_globals *g, regexp *prog, char *string)
++{
++ register int i;
++ register char **sp;
++ register char **ep;
++
++ g->reginput = string;
++ g->regstartp = prog->startp;
++ g->regendp = prog->endp;
++
++ sp = prog->startp;
++ ep = prog->endp;
++ for (i = NSUBEXP; i > 0; i--) {
++ *sp++ = NULL;
++ *ep++ = NULL;
++ }
++ if (regmatch(g, prog->program + 1)) {
++ prog->startp[0] = string;
++ prog->endp[0] = g->reginput;
++ return(1);
++ } else
++ return(0);
++}
++
++/*
++ - regmatch - main matching routine
++ *
++ * Conceptually the strategy is simple: check to see whether the current
++ * node matches, call self recursively to see whether the rest matches,
++ * and then act accordingly. In practice we make some effort to avoid
++ * recursion, in particular by going through "ordinary" nodes (that don't
++ * need to know whether the rest of the match failed) by a loop instead of
++ * by recursion.
++ */
++static int /* 0 failure, 1 success */
++regmatch(struct match_globals *g, char *prog)
++{
++ register char *scan = prog; /* Current node. */
++ char *next; /* Next node. */
++
++#ifdef DEBUG
++ if (scan != NULL && regnarrate)
++ fprintf(stderr, "%s(\n", regprop(scan));
++#endif
++ while (scan != NULL) {
++#ifdef DEBUG
++ if (regnarrate)
++ fprintf(stderr, "%s...\n", regprop(scan));
++#endif
++ next = regnext(g, scan);
++
++ switch (OP(scan)) {
++ case BOL:
++ if (g->reginput != g->regbol)
++ return(0);
++ break;
++ case EOL:
++ if (*g->reginput != '\0')
++ return(0);
++ break;
++ case ANY:
++ if (*g->reginput == '\0')
++ return(0);
++ g->reginput++;
++ break;
++ case EXACTLY: {
++ register int len;
++ register char *opnd;
++
++ opnd = OPERAND(scan);
++ /* Inline the first character, for speed. */
++ if (*opnd != *g->reginput)
++ return(0);
++ len = strlen(opnd);
++ if (len > 1 && strncmp(opnd, g->reginput, len) != 0)
++ return(0);
++ g->reginput += len;
++ }
++ break;
++ case ANYOF:
++ if (*g->reginput == '\0' || strchr(OPERAND(scan), *g->reginput) == NULL)
++ return(0);
++ g->reginput++;
++ break;
++ case ANYBUT:
++ if (*g->reginput == '\0' || strchr(OPERAND(scan), *g->reginput) != NULL)
++ return(0);
++ g->reginput++;
++ break;
++ case NOTHING:
++ case BACK:
++ break;
++ case OPEN+1:
++ case OPEN+2:
++ case OPEN+3:
++ case OPEN+4:
++ case OPEN+5:
++ case OPEN+6:
++ case OPEN+7:
++ case OPEN+8:
++ case OPEN+9: {
++ register int no;
++ register char *save;
++
++ no = OP(scan) - OPEN;
++ save = g->reginput;
++
++ if (regmatch(g, next)) {
++ /*
++ * Don't set startp if some later
++ * invocation of the same parentheses
++ * already has.
++ */
++ if (g->regstartp[no] == NULL)
++ g->regstartp[no] = save;
++ return(1);
++ } else
++ return(0);
++ }
++ break;
++ case CLOSE+1:
++ case CLOSE+2:
++ case CLOSE+3:
++ case CLOSE+4:
++ case CLOSE+5:
++ case CLOSE+6:
++ case CLOSE+7:
++ case CLOSE+8:
++ case CLOSE+9:
++ {
++ register int no;
++ register char *save;
++
++ no = OP(scan) - CLOSE;
++ save = g->reginput;
++
++ if (regmatch(g, next)) {
++ /*
++ * Don't set endp if some later
++ * invocation of the same parentheses
++ * already has.
++ */
++ if (g->regendp[no] == NULL)
++ g->regendp[no] = save;
++ return(1);
++ } else
++ return(0);
++ }
++ break;
++ case BRANCH: {
++ register char *save;
++
++ if (OP(next) != BRANCH) /* No choice. */
++ next = OPERAND(scan); /* Avoid recursion. */
++ else {
++ do {
++ save = g->reginput;
++ if (regmatch(g, OPERAND(scan)))
++ return(1);
++ g->reginput = save;
++ scan = regnext(g, scan);
++ } while (scan != NULL && OP(scan) == BRANCH);
++ return(0);
++ /* NOTREACHED */
++ }
++ }
++ break;
++ case STAR:
++ case PLUS: {
++ register char nextch;
++ register int no;
++ register char *save;
++ register int min;
++
++ /*
++ * Lookahead to avoid useless match attempts
++ * when we know what character comes next.
++ */
++ nextch = '\0';
++ if (OP(next) == EXACTLY)
++ nextch = *OPERAND(next);
++ min = (OP(scan) == STAR) ? 0 : 1;
++ save = g->reginput;
++ no = regrepeat(g, OPERAND(scan));
++ while (no >= min) {
++ /* If it could work, try it. */
++ if (nextch == '\0' || *g->reginput == nextch)
++ if (regmatch(g, next))
++ return(1);
++ /* Couldn't or didn't -- back up. */
++ no--;
++ g->reginput = save + no;
++ }
++ return(0);
++ }
++ break;
++ case END:
++ return(1); /* Success! */
++ break;
++ default:
++ printk("<3>Regexp: memory corruption\n");
++ return(0);
++ break;
++ }
++
++ scan = next;
++ }
++
++ /*
++ * We get here only if there's trouble -- normally "case END" is
++ * the terminating point.
++ */
++ printk("<3>Regexp: corrupted pointers\n");
++ return(0);
++}
++
++/*
++ - regrepeat - repeatedly match something simple, report how many
++ */
++static int
++regrepeat(struct match_globals *g, char *p)
++{
++ register int count = 0;
++ register char *scan;
++ register char *opnd;
++
++ scan = g->reginput;
++ opnd = OPERAND(p);
++ switch (OP(p)) {
++ case ANY:
++ count = strlen(scan);
++ scan += count;
++ break;
++ case EXACTLY:
++ while (*opnd == *scan) {
++ count++;
++ scan++;
++ }
++ break;
++ case ANYOF:
++ while (*scan != '\0' && strchr(opnd, *scan) != NULL) {
++ count++;
++ scan++;
++ }
++ break;
++ case ANYBUT:
++ while (*scan != '\0' && strchr(opnd, *scan) == NULL) {
++ count++;
++ scan++;
++ }
++ break;
++ default: /* Oh dear. Called inappropriately. */
++ printk("<3>Regexp: internal foulup\n");
++ count = 0; /* Best compromise. */
++ break;
++ }
++ g->reginput = scan;
++
++ return(count);
++}
++
++/*
++ - regnext - dig the "next" pointer out of a node
++ */
++static char*
++regnext(struct match_globals *g, char *p)
++{
++ register int offset;
++
++ if (p == &g->regdummy)
++ return(NULL);
++
++ offset = NEXT(p);
++ if (offset == 0)
++ return(NULL);
++
++ if (OP(p) == BACK)
++ return(p-offset);
++ else
++ return(p+offset);
++}
++
++#ifdef DEBUG
++
++STATIC char *regprop();
++
++/*
++ - regdump - dump a regexp onto stdout in vaguely comprehensible form
++ */
++void
++regdump(regexp *r)
++{
++ register char *s;
++ register char op = EXACTLY; /* Arbitrary non-END op. */
++ register char *next;
++ /* extern char *strchr(); */
++
++
++ s = r->program + 1;
++ while (op != END) { /* While that wasn't END last time... */
++ op = OP(s);
++ printf("%2d%s", s-r->program, regprop(s)); /* Where, what. */
++ next = regnext(s);
++ if (next == NULL) /* Next ptr. */
++ printf("(0)");
++ else
++ printf("(%d)", (s-r->program)+(next-s));
++ s += 3;
++ if (op == ANYOF || op == ANYBUT || op == EXACTLY) {
++ /* Literal string, where present. */
++ while (*s != '\0') {
++ putchar(*s);
++ s++;
++ }
++ s++;
++ }
++ putchar('\n');
++ }
++
++ /* Header fields of interest. */
++ if (r->regstart != '\0')
++ printf("start `%c' ", r->regstart);
++ if (r->reganch)
++ printf("anchored ");
++ if (r->regmust != NULL)
++ printf("must have \"%s\"", r->regmust);
++ printf("\n");
++}
++
++/*
++ - regprop - printable representation of opcode
++ */
++static char *
++regprop(char *op)
++{
++#define BUFLEN 50
++ register char *p;
++ static char buf[BUFLEN];
++
++ strcpy(buf, ":");
++
++ switch (OP(op)) {
++ case BOL:
++ p = "BOL";
++ break;
++ case EOL:
++ p = "EOL";
++ break;
++ case ANY:
++ p = "ANY";
++ break;
++ case ANYOF:
++ p = "ANYOF";
++ break;
++ case ANYBUT:
++ p = "ANYBUT";
++ break;
++ case BRANCH:
++ p = "BRANCH";
++ break;
++ case EXACTLY:
++ p = "EXACTLY";
++ break;
++ case NOTHING:
++ p = "NOTHING";
++ break;
++ case BACK:
++ p = "BACK";
++ break;
++ case END:
++ p = "END";
++ break;
++ case OPEN+1:
++ case OPEN+2:
++ case OPEN+3:
++ case OPEN+4:
++ case OPEN+5:
++ case OPEN+6:
++ case OPEN+7:
++ case OPEN+8:
++ case OPEN+9:
++ snprintf(buf+strlen(buf),BUFLEN-strlen(buf), "OPEN%d", OP(op)-OPEN);
++ p = NULL;
++ break;
++ case CLOSE+1:
++ case CLOSE+2:
++ case CLOSE+3:
++ case CLOSE+4:
++ case CLOSE+5:
++ case CLOSE+6:
++ case CLOSE+7:
++ case CLOSE+8:
++ case CLOSE+9:
++ snprintf(buf+strlen(buf),BUFLEN-strlen(buf), "CLOSE%d", OP(op)-CLOSE);
++ p = NULL;
++ break;
++ case STAR:
++ p = "STAR";
++ break;
++ case PLUS:
++ p = "PLUS";
++ break;
++ default:
++ printk("<3>Regexp: corrupted opcode\n");
++ break;
++ }
++ if (p != NULL)
++ strncat(buf, p, BUFLEN-strlen(buf));
++ return(buf);
++}
++#endif
++
++
+diff -urN linux.old/net/ipv4/netfilter/regexp/regexp.h linux.dev/net/ipv4/netfilter/regexp/regexp.h
+--- linux.old/net/ipv4/netfilter/regexp/regexp.h 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/net/ipv4/netfilter/regexp/regexp.h 2007-01-01 05:18:48.000000000 +0100
+@@ -0,0 +1,41 @@
++/*
++ * Definitions etc. for regexp(3) routines.
++ *
++ * Caveat: this is V8 regexp(3) [actually, a reimplementation thereof],
++ * not the System V one.
++ */
++
++#ifndef REGEXP_H
++#define REGEXP_H
++
++
++/*
++http://www.opensource.apple.com/darwinsource/10.3/expect-1/expect/expect.h ,
++which contains a version of this library, says:
++
++ *
++ * NSUBEXP must be at least 10, and no greater than 117 or the parser
++ * will not work properly.
++ *
++
++However, it looks rather like this library is limited to 10. If you think
++otherwise, let us know.
++*/
++
++#define NSUBEXP 10
++typedef struct regexp {
++ char *startp[NSUBEXP];
++ char *endp[NSUBEXP];
++ char regstart; /* Internal use only. */
++ char reganch; /* Internal use only. */
++ char *regmust; /* Internal use only. */
++ int regmlen; /* Internal use only. */
++ char program[1]; /* Unwarranted chumminess with compiler. */
++} regexp;
++
++regexp * regcomp(char *exp, int *patternsize);
++int regexec(regexp *prog, char *string);
++void regsub(regexp *prog, char *source, char *dest);
++void regerror(char *s);
++
++#endif
+diff -urN linux.old/net/ipv4/netfilter/regexp/regmagic.h linux.dev/net/ipv4/netfilter/regexp/regmagic.h
+--- linux.old/net/ipv4/netfilter/regexp/regmagic.h 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/net/ipv4/netfilter/regexp/regmagic.h 2007-01-01 05:18:48.000000000 +0100
+@@ -0,0 +1,5 @@
++/*
++ * The first byte of the regexp internal "program" is actually this magic
++ * number; the start node begins in the second byte.
++ */
++#define MAGIC 0234
+diff -urN linux.old/net/ipv4/netfilter/regexp/regsub.c linux.dev/net/ipv4/netfilter/regexp/regsub.c
+--- linux.old/net/ipv4/netfilter/regexp/regsub.c 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/net/ipv4/netfilter/regexp/regsub.c 2007-01-01 05:18:48.000000000 +0100
+@@ -0,0 +1,95 @@
++/*
++ * regsub
++ * @(#)regsub.c 1.3 of 2 April 86
++ *
++ * Copyright (c) 1986 by University of Toronto.
++ * Written by Henry Spencer. Not derived from licensed software.
++ *
++ * Permission is granted to anyone to use this software for any
++ * purpose on any computer system, and to redistribute it freely,
++ * subject to the following restrictions:
++ *
++ * 1. The author is not responsible for the consequences of use of
++ * this software, no matter how awful, even if they arise
++ * from defects in it.
++ *
++ * 2. The origin of this software must not be misrepresented, either
++ * by explicit claim or by omission.
++ *
++ * 3. Altered versions must be plainly marked as such, and must not
++ * be misrepresented as being the original software.
++ *
++ *
++ * This code was modified by Ethan Sommer to work within the kernel
++ * (it now uses kmalloc etc..)
++ *
++ */
++#include "regexp.h"
++#include "regmagic.h"
++#include <linux/string.h>
++
++
++#ifndef CHARBITS
++#define UCHARAT(p) ((int)*(unsigned char *)(p))
++#else
++#define UCHARAT(p) ((int)*(p)&CHARBITS)
++#endif
++
++#if 0
++//void regerror(char * s)
++//{
++// printk("regexp(3): %s", s);
++// /* NOTREACHED */
++//}
++#endif
++
++/*
++ - regsub - perform substitutions after a regexp match
++ */
++void
++regsub(regexp * prog, char * source, char * dest)
++{
++ register char *src;
++ register char *dst;
++ register char c;
++ register int no;
++ register int len;
++
++ /* Not necessary and gcc doesn't like it -MLS */
++ /*extern char *strncpy();*/
++
++ if (prog == NULL || source == NULL || dest == NULL) {
++ regerror("NULL parm to regsub");
++ return;
++ }
++ if (UCHARAT(prog->program) != MAGIC) {
++ regerror("damaged regexp fed to regsub");
++ return;
++ }
++
++ src = source;
++ dst = dest;
++ while ((c = *src++) != '\0') {
++ if (c == '&')
++ no = 0;
++ else if (c == '\\' && '0' <= *src && *src <= '9')
++ no = *src++ - '0';
++ else
++ no = -1;
++
++ if (no < 0) { /* Ordinary character. */
++ if (c == '\\' && (*src == '\\' || *src == '&'))
++ c = *src++;
++ *dst++ = c;
++ } else if (prog->startp[no] != NULL && prog->endp[no] != NULL) {
++ len = prog->endp[no] - prog->startp[no];
++ (void) strncpy(dst, prog->startp[no], len);
++ dst += len;
++ if (len != 0 && *(dst-1) == '\0') { /* strncpy hit NUL. */
++ regerror("damaged match string");
++ return;
++ }
++ }
++ }
++ *dst++ = '\0';
++}
--- /dev/null
+diff -ur linux.dev/include/linux/netfilter_ipv4/ipt_layer7.h linux.dev2/include/linux/netfilter_ipv4/ipt_layer7.h
+--- linux.dev/include/linux/netfilter_ipv4/ipt_layer7.h 2007-01-01 05:18:48.000000000 +0100
++++ linux.dev2/include/linux/netfilter_ipv4/ipt_layer7.h 2007-01-01 05:30:46.000000000 +0100
+@@ -21,6 +21,7 @@
+ char protocol[MAX_PROTOCOL_LEN];
+ char invert:1;
+ char pattern[MAX_PATTERN_LEN];
++ char pkt;
+ };
+
+ #endif /* _IPT_LAYER7_H */
+diff -ur linux.dev/net/ipv4/netfilter/ipt_layer7.c linux.dev2/net/ipv4/netfilter/ipt_layer7.c
+--- linux.dev/net/ipv4/netfilter/ipt_layer7.c 2007-01-01 05:18:48.000000000 +0100
++++ linux.dev2/net/ipv4/netfilter/ipt_layer7.c 2007-01-01 05:30:46.000000000 +0100
+@@ -296,33 +296,34 @@
+ }
+ }
+
+-/* add the new app data to the conntrack. Return number of bytes added. */
+-static int add_data(struct ip_conntrack * master_conntrack,
+- char * app_data, int appdatalen)
++static int add_datastr(char *target, int offset, char *app_data, int len)
+ {
+ int length = 0, i;
+- int oldlength = master_conntrack->layer7.app_data_len;
+-
+- // This is a fix for a race condition by Deti Fliegl. However, I'm not
+- // clear on whether the race condition exists or whether this really
+- // fixes it. I might just be being dense... Anyway, if it's not really
+- // a fix, all it does is waste a very small amount of time.
+- if(!master_conntrack->layer7.app_data) return 0;
++ if(!target) return 0;
+
+ /* Strip nulls. Make everything lower case (our regex lib doesn't
+ do case insensitivity). Add it to the end of the current data. */
+- for(i = 0; i < maxdatalen-oldlength-1 &&
+- i < appdatalen; i++) {
++ for(i = 0; i < maxdatalen-offset-1 && i < len; i++) {
+ if(app_data[i] != '\0') {
+- master_conntrack->layer7.app_data[length+oldlength] =
++ target[length+offset] =
+ /* the kernel version of tolower mungs 'upper ascii' */
+ isascii(app_data[i])? tolower(app_data[i]) : app_data[i];
+ length++;
+ }
+ }
++ target[length+offset] = '\0';
+
+- master_conntrack->layer7.app_data[length+oldlength] = '\0';
+- master_conntrack->layer7.app_data_len = length + oldlength;
++ return length;
++}
++
++/* add the new app data to the conntrack. Return number of bytes added. */
++static int add_data(struct ip_conntrack * master_conntrack,
++ char * app_data, int appdatalen)
++{
++ int length;
++
++ length = add_datastr(master_conntrack->layer7.app_data, master_conntrack->layer7.app_data_len, app_data, appdatalen);
++ master_conntrack->layer7.app_data_len += length;
+
+ return length;
+ }
+@@ -339,7 +340,7 @@
+ struct ipt_layer7_info * info = (struct ipt_layer7_info *)matchinfo;
+ enum ip_conntrack_info master_ctinfo, ctinfo;
+ struct ip_conntrack *master_conntrack, *conntrack;
+- unsigned char * app_data;
++ unsigned char *app_data, *tmp_data;
+ unsigned int pattern_result, appdatalen;
+ regexp * comppattern;
+
+@@ -362,8 +363,8 @@
+ master_conntrack = master_ct(master_conntrack);
+
+ /* if we've classified it or seen too many packets */
+- if(TOTAL_PACKETS > num_packets ||
+- master_conntrack->layer7.app_proto) {
++ if(!info->pkt && (TOTAL_PACKETS > num_packets ||
++ master_conntrack->layer7.app_proto)) {
+
+ pattern_result = match_no_append(conntrack, master_conntrack, ctinfo, master_ctinfo, info);
+
+@@ -394,6 +395,23 @@
+ comppattern = compile_and_cache(info->pattern, info->protocol);
+ spin_unlock_bh(&list_lock);
+
++ if (info->pkt) {
++ tmp_data = kmalloc(maxdatalen, GFP_ATOMIC);
++ if(!tmp_data){
++ if (net_ratelimit())
++ printk(KERN_ERR "layer7: out of memory in match, bailing.\n");
++ return info->invert;
++ }
++
++ tmp_data[0] = '\0';
++ add_datastr(tmp_data, 0, app_data, appdatalen);
++ pattern_result = ((comppattern && regexec(comppattern, tmp_data)) ? 1 : 0);
++ kfree(tmp_data);
++ tmp_data = NULL;
++
++ return (pattern_result ^ info->invert);
++ }
++
+ /* On the first packet of a connection, allocate space for app data */
+ write_lock(&ct_lock);
+ if(TOTAL_PACKETS == 1 && !skb->cb[0] && !master_conntrack->layer7.app_data) {
--- /dev/null
+diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ipt_ipp2p.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ipt_ipp2p.h
+--- linux-2.6.19.old/include/linux/netfilter_ipv4/ipt_ipp2p.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ipt_ipp2p.h 2006-12-14 03:13:39.000000000 +0100
+@@ -0,0 +1,31 @@
++#ifndef __IPT_IPP2P_H
++#define __IPT_IPP2P_H
++#define IPP2P_VERSION "0.8.1_rc1"
++
++struct ipt_p2p_info {
++ int cmd;
++ int debug;
++};
++
++#endif //__IPT_IPP2P_H
++
++#define SHORT_HAND_IPP2P 1 /* --ipp2p switch*/
++//#define SHORT_HAND_DATA 4 /* --ipp2p-data switch*/
++#define SHORT_HAND_NONE 5 /* no short hand*/
++
++#define IPP2P_EDK (1 << 1)
++#define IPP2P_DATA_KAZAA (1 << 2)
++#define IPP2P_DATA_EDK (1 << 3)
++#define IPP2P_DATA_DC (1 << 4)
++#define IPP2P_DC (1 << 5)
++#define IPP2P_DATA_GNU (1 << 6)
++#define IPP2P_GNU (1 << 7)
++#define IPP2P_KAZAA (1 << 8)
++#define IPP2P_BIT (1 << 9)
++#define IPP2P_APPLE (1 << 10)
++#define IPP2P_SOUL (1 << 11)
++#define IPP2P_WINMX (1 << 12)
++#define IPP2P_ARES (1 << 13)
++#define IPP2P_MUTE (1 << 14)
++#define IPP2P_WASTE (1 << 15)
++#define IPP2P_XDCC (1 << 16)
+diff -urN linux-2.6.19.old/net/ipv4/netfilter/ipt_ipp2p.c linux-2.6.19.dev/net/ipv4/netfilter/ipt_ipp2p.c
+--- linux-2.6.19.old/net/ipv4/netfilter/ipt_ipp2p.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/netfilter/ipt_ipp2p.c 2006-12-14 03:13:39.000000000 +0100
+@@ -0,0 +1,881 @@
++#if defined(MODVERSIONS)
++#include <linux/modversions.h>
++#endif
++#include <linux/module.h>
++#include <linux/netfilter_ipv4/ip_tables.h>
++#include <linux/version.h>
++#include <linux/netfilter_ipv4/ipt_ipp2p.h>
++#include <net/tcp.h>
++#include <net/udp.h>
++
++#define get_u8(X,O) (*(__u8 *)(X + O))
++#define get_u16(X,O) (*(__u16 *)(X + O))
++#define get_u32(X,O) (*(__u32 *)(X + O))
++
++MODULE_AUTHOR("Eicke Friedrich/Klaus Degner <ipp2p@ipp2p.org>");
++MODULE_DESCRIPTION("An extension to iptables to identify P2P traffic.");
++MODULE_LICENSE("GPL");
++
++
++/*Search for UDP eDonkey/eMule/Kad commands*/
++int
++udp_search_edk (unsigned char *haystack, int packet_len)
++{
++ unsigned char *t = haystack;
++ t += 8;
++
++ switch (t[0]) {
++ case 0xe3:
++ { /*edonkey*/
++ switch (t[1])
++ {
++ /* client -> server status request */
++ case 0x96:
++ if (packet_len == 14) return ((IPP2P_EDK * 100) + 50);
++ break;
++ /* server -> client status request */
++ case 0x97: if (packet_len == 42) return ((IPP2P_EDK * 100) + 51);
++ break;
++ /* server description request */
++ /* e3 2a ff f0 .. | size == 6 */
++ case 0xa2: if ( (packet_len == 14) && ( get_u16(t,2) == __constant_htons(0xfff0) ) ) return ((IPP2P_EDK * 100) + 52);
++ break;
++ /* server description response */
++ /* e3 a3 ff f0 .. | size > 40 && size < 200 */
++ //case 0xa3: return ((IPP2P_EDK * 100) + 53);
++ // break;
++ case 0x9a: if (packet_len==26) return ((IPP2P_EDK * 100) + 54);
++ break;
++
++ case 0x92: if (packet_len==18) return ((IPP2P_EDK * 100) + 55);
++ break;
++ }
++ break;
++ }
++ case 0xe4:
++ {
++ switch (t[1])
++ {
++ /* e4 20 .. | size == 43 */
++ case 0x20: if ((packet_len == 43) && (t[2] != 0x00) && (t[34] != 0x00)) return ((IPP2P_EDK * 100) + 60);
++ break;
++ /* e4 00 .. 00 | size == 35 ? */
++ case 0x00: if ((packet_len == 35) && (t[26] == 0x00)) return ((IPP2P_EDK * 100) + 61);
++ break;
++ /* e4 10 .. 00 | size == 35 ? */
++ case 0x10: if ((packet_len == 35) && (t[26] == 0x00)) return ((IPP2P_EDK * 100) + 62);
++ break;
++ /* e4 18 .. 00 | size == 35 ? */
++ case 0x18: if ((packet_len == 35) && (t[26] == 0x00)) return ((IPP2P_EDK * 100) + 63);
++ break;
++ /* e4 52 .. | size = 44 */
++ case 0x52: if (packet_len == 44 ) return ((IPP2P_EDK * 100) + 64);
++ break;
++ /* e4 58 .. | size == 6 */
++ case 0x58: if (packet_len == 14 ) return ((IPP2P_EDK * 100) + 65);
++ break;
++ /* e4 59 .. | size == 2 */
++ case 0x59: if (packet_len == 10 )return ((IPP2P_EDK * 100) + 66);
++ break;
++ /* e4 28 .. | packet_len == 52,77,102,127... */
++ case 0x28: if (((packet_len-52) % 25) == 0) return ((IPP2P_EDK * 100) + 67);
++ break;
++ /* e4 50 xx xx | size == 4 */
++ case 0x50: if (packet_len == 12) return ((IPP2P_EDK * 100) + 68);
++ break;
++ /* e4 40 xx xx | size == 48 */
++ case 0x40: if (packet_len == 56) return ((IPP2P_EDK * 100) + 69);
++ break;
++ }
++ break;
++ }
++ } /* end of switch (t[0]) */
++ return 0;
++}/*udp_search_edk*/
++
++
++/*Search for UDP Gnutella commands*/
++int
++udp_search_gnu (unsigned char *haystack, int packet_len)
++{
++ unsigned char *t = haystack;
++ t += 8;
++
++ if (memcmp(t, "GND", 3) == 0) return ((IPP2P_GNU * 100) + 51);
++ if (memcmp(t, "GNUTELLA ", 9) == 0) return ((IPP2P_GNU * 100) + 52);
++ return 0;
++}/*udp_search_gnu*/
++
++
++/*Search for UDP KaZaA commands*/
++int
++udp_search_kazaa (unsigned char *haystack, int packet_len)
++{
++ unsigned char *t = haystack;
++
++ if (t[packet_len-1] == 0x00){
++ t += (packet_len - 6);
++ if (memcmp(t, "KaZaA", 5) == 0) return (IPP2P_KAZAA * 100 +50);
++ }
++
++ return 0;
++}/*udp_search_kazaa*/
++
++/*Search for UDP DirectConnect commands*/
++int
++udp_search_directconnect (unsigned char *haystack, int packet_len)
++{
++ unsigned char *t = haystack;
++ if ((*(t + 8) == 0x24) && (*(t + packet_len - 1) == 0x7c)) {
++ t+=8;
++ if (memcmp(t, "SR ", 3) == 0) return ((IPP2P_DC * 100) + 60);
++ if (memcmp(t, "Ping ", 5) == 0) return ((IPP2P_DC * 100) + 61);
++ }
++ return 0;
++}/*udp_search_directconnect*/
++
++
++
++/*Search for UDP BitTorrent commands*/
++int
++udp_search_bit (unsigned char *haystack, int packet_len)
++{
++ switch(packet_len)
++ {
++ case 24:
++ /* ^ 00 00 04 17 27 10 19 80 */
++ if ((ntohl(get_u32(haystack, 8)) == 0x00000417) && (ntohl(get_u32(haystack, 12)) == 0x27101980))
++ return (IPP2P_BIT * 100 + 50);
++ break;
++ case 44:
++ if (get_u32(haystack, 16) == __constant_htonl(0x00000400) && get_u32(haystack, 36) == __constant_htonl(0x00000104))
++ return (IPP2P_BIT * 100 + 51);
++ if (get_u32(haystack, 16) == __constant_htonl(0x00000400))
++ return (IPP2P_BIT * 100 + 61);
++ break;
++ case 65:
++ if (get_u32(haystack, 16) == __constant_htonl(0x00000404) && get_u32(haystack, 36) == __constant_htonl(0x00000104))
++ return (IPP2P_BIT * 100 + 52);
++ if (get_u32(haystack, 16) == __constant_htonl(0x00000404))
++ return (IPP2P_BIT * 100 + 62);
++ break;
++ case 67:
++ if (get_u32(haystack, 16) == __constant_htonl(0x00000406) && get_u32(haystack, 36) == __constant_htonl(0x00000104))
++ return (IPP2P_BIT * 100 + 53);
++ if (get_u32(haystack, 16) == __constant_htonl(0x00000406))
++ return (IPP2P_BIT * 100 + 63);
++ break;
++ case 211:
++ if (get_u32(haystack, 8) == __constant_htonl(0x00000405))
++ return (IPP2P_BIT * 100 + 54);
++ break;
++ case 29:
++ if ((get_u32(haystack, 8) == __constant_htonl(0x00000401)))
++ return (IPP2P_BIT * 100 + 55);
++ break;
++ case 52:
++ if (get_u32(haystack,8) == __constant_htonl(0x00000827) &&
++ get_u32(haystack,12) == __constant_htonl(0x37502950))
++ return (IPP2P_BIT * 100 + 80);
++ break;
++ default:
++ /* this packet does not have a constant size */
++ if (packet_len >= 40 && get_u32(haystack, 16) == __constant_htonl(0x00000402) && get_u32(haystack, 36) == __constant_htonl(0x00000104))
++ return (IPP2P_BIT * 100 + 56);
++ break;
++ }
++
++ /* some extra-bitcomet rules:
++ * "d1:" [a|r] "d2:id20:"
++ */
++ if (packet_len > 30 && get_u8(haystack, 8) == 'd' && get_u8(haystack, 9) == '1' && get_u8(haystack, 10) == ':' )
++ {
++ if (get_u8(haystack, 11) == 'a' || get_u8(haystack, 11) == 'r')
++ {
++ if (memcmp(haystack+12,"d2:id20:",8)==0)
++ return (IPP2P_BIT * 100 + 57);
++ }
++ }
++
++#if 0
++ /* bitlord rules */
++ /* packetlen must be bigger than 40 */
++ /* first 4 bytes are zero */
++ if (packet_len > 40 && get_u32(haystack, 8) == 0x00000000)
++ {
++ /* first rule: 00 00 00 00 01 00 00 xx xx xx xx 00 00 00 00*/
++ if (get_u32(haystack, 12) == 0x00000000 &&
++ get_u32(haystack, 16) == 0x00010000 &&
++ get_u32(haystack, 24) == 0x00000000 )
++ return (IPP2P_BIT * 100 + 71);
++
++ /* 00 01 00 00 0d 00 00 xx xx xx xx 00 00 00 00*/
++ if (get_u32(haystack, 12) == 0x00000001 &&
++ get_u32(haystack, 16) == 0x000d0000 &&
++ get_u32(haystack, 24) == 0x00000000 )
++ return (IPP2P_BIT * 100 + 71);
++
++
++ }
++#endif
++
++ return 0;
++}/*udp_search_bit*/
++
++
++
++/*Search for Ares commands*/
++//#define IPP2P_DEBUG_ARES
++int
++search_ares (const unsigned char *payload, const u16 plen)
++//int search_ares (unsigned char *haystack, int packet_len, int head_len)
++{
++// const unsigned char *t = haystack + head_len;
++
++ /* all ares packets start with */
++ if (payload[1] == 0 && (plen - payload[0]) == 3)
++ {
++ switch (payload[2])
++ {
++ case 0x5a:
++ /* ares connect */
++ if ( plen == 6 && payload[5] == 0x05 ) return ((IPP2P_ARES * 100) + 1);
++ break;
++ case 0x09:
++ /* ares search, min 3 chars --> 14 bytes
++ * lets define a search can be up to 30 chars --> max 34 bytes
++ */
++ if ( plen >= 14 && plen <= 34 ) return ((IPP2P_ARES * 100) + 1);
++ break;
++#ifdef IPP2P_DEBUG_ARES
++ default:
++ printk(KERN_DEBUG "Unknown Ares command %x recognized, len: %u \n", (unsigned int) payload[2],plen);
++#endif /* IPP2P_DEBUG_ARES */
++ }
++ }
++
++#if 0
++ /* found connect packet: 03 00 5a 04 03 05 */
++ /* new version ares 1.8: 03 00 5a xx xx 05 */
++ if ((plen) == 6){ /* possible connect command*/
++ if ((payload[0] == 0x03) && (payload[1] == 0x00) && (payload[2] == 0x5a) && (payload[5] == 0x05))
++ return ((IPP2P_ARES * 100) + 1);
++ }
++ if ((plen) == 60){ /* possible download command*/
++ if ((payload[59] == 0x0a) && (payload[58] == 0x0a)){
++ if (memcmp(t, "PUSH SHA1:", 10) == 0) /* found download command */
++ return ((IPP2P_ARES * 100) + 2);
++ }
++ }
++#endif
++
++ return 0;
++} /*search_ares*/
++
++/*Search for SoulSeek commands*/
++int
++search_soul (const unsigned char *payload, const u16 plen)
++{
++//#define IPP2P_DEBUG_SOUL
++ /* match: xx xx xx xx | xx = sizeof(payload) - 4 */
++ if (get_u32(payload, 0) == (plen - 4)){
++ const __u32 m=get_u32(payload, 4);
++ /* match 00 yy yy 00, yy can be everything */
++ if ( get_u8(payload, 4) == 0x00 && get_u8(payload, 7) == 0x00 )
++ {
++#ifdef IPP2P_DEBUG_SOUL
++ printk(KERN_DEBUG "0: Soulseek command 0x%x recognized\n",get_u32(payload, 4));
++#endif /* IPP2P_DEBUG_SOUL */
++ return ((IPP2P_SOUL * 100) + 1);
++ }
++
++ /* next match: 01 yy 00 00 | yy can be everything */
++ if ( get_u8(payload, 4) == 0x01 && get_u16(payload, 6) == 0x0000 )
++ {
++#ifdef IPP2P_DEBUG_SOUL
++ printk(KERN_DEBUG "1: Soulseek command 0x%x recognized\n",get_u16(payload, 4));
++#endif /* IPP2P_DEBUG_SOUL */
++ return ((IPP2P_SOUL * 100) + 2);
++ }
++
++ /* other soulseek commandos are: 1-5,7,9,13-18,22,23,26,28,35-37,40-46,50,51,60,62-69,91,92,1001 */
++ /* try to do this in an intelligent way */
++ /* get all small commandos */
++ switch(m)
++ {
++ case 7:
++ case 9:
++ case 22:
++ case 23:
++ case 26:
++ case 28:
++ case 50:
++ case 51:
++ case 60:
++ case 91:
++ case 92:
++ case 1001:
++#ifdef IPP2P_DEBUG_SOUL
++ printk(KERN_DEBUG "2: Soulseek command 0x%x recognized\n",get_u16(payload, 4));
++#endif /* IPP2P_DEBUG_SOUL */
++ return ((IPP2P_SOUL * 100) + 3);
++ }
++
++ if (m > 0 && m < 6 )
++ {
++#ifdef IPP2P_DEBUG_SOUL
++ printk(KERN_DEBUG "3: Soulseek command 0x%x recognized\n",get_u16(payload, 4));
++#endif /* IPP2P_DEBUG_SOUL */
++ return ((IPP2P_SOUL * 100) + 4);
++ }
++ if (m > 12 && m < 19 )
++ {
++#ifdef IPP2P_DEBUG_SOUL
++ printk(KERN_DEBUG "4: Soulseek command 0x%x recognized\n",get_u16(payload, 4));
++#endif /* IPP2P_DEBUG_SOUL */
++ return ((IPP2P_SOUL * 100) + 5);
++ }
++
++ if (m > 34 && m < 38 )
++ {
++#ifdef IPP2P_DEBUG_SOUL
++ printk(KERN_DEBUG "5: Soulseek command 0x%x recognized\n",get_u16(payload, 4));
++#endif /* IPP2P_DEBUG_SOUL */
++ return ((IPP2P_SOUL * 100) + 6);
++ }
++
++ if (m > 39 && m < 47 )
++ {
++#ifdef IPP2P_DEBUG_SOUL
++ printk(KERN_DEBUG "6: Soulseek command 0x%x recognized\n",get_u16(payload, 4));
++#endif /* IPP2P_DEBUG_SOUL */
++ return ((IPP2P_SOUL * 100) + 7);
++ }
++
++ if (m > 61 && m < 70 )
++ {
++#ifdef IPP2P_DEBUG_SOUL
++ printk(KERN_DEBUG "7: Soulseek command 0x%x recognized\n",get_u16(payload, 4));
++#endif /* IPP2P_DEBUG_SOUL */
++ return ((IPP2P_SOUL * 100) + 8);
++ }
++
++#ifdef IPP2P_DEBUG_SOUL
++ printk(KERN_DEBUG "unknown SOULSEEK command: 0x%x, first 16 bit: 0x%x, first 8 bit: 0x%x ,soulseek ???\n",get_u32(payload, 4),get_u16(payload, 4) >> 16,get_u8(payload, 4) >> 24);
++#endif /* IPP2P_DEBUG_SOUL */
++ }
++
++ /* match 14 00 00 00 01 yy 00 00 00 STRING(YY) 01 00 00 00 00 46|50 00 00 00 00 */
++ /* without size at the beginning !!! */
++ if ( get_u32(payload, 0) == 0x14 && get_u8(payload, 4) == 0x01 )
++ {
++ __u32 y=get_u32(payload, 5);
++ /* we need 19 chars + string */
++ if ( (y + 19) <= (plen) )
++ {
++ const unsigned char *w=payload+9+y;
++ if (get_u32(w, 0) == 0x01 && ( get_u16(w, 4) == 0x4600 || get_u16(w, 4) == 0x5000) && get_u32(w, 6) == 0x00);
++#ifdef IPP2P_DEBUG_SOUL
++ printk(KERN_DEBUG "Soulssek special client command recognized\n");
++#endif /* IPP2P_DEBUG_SOUL */
++ return ((IPP2P_SOUL * 100) + 9);
++ }
++ }
++ return 0;
++}
++
++
++/*Search for WinMX commands*/
++int
++search_winmx (const unsigned char *payload, const u16 plen)
++{
++//#define IPP2P_DEBUG_WINMX
++ if (((plen) == 4) && (memcmp(payload, "SEND", 4) == 0)) return ((IPP2P_WINMX * 100) + 1);
++ if (((plen) == 3) && (memcmp(payload, "GET", 3) == 0)) return ((IPP2P_WINMX * 100) + 2);
++ //if (packet_len < (head_len + 10)) return 0;
++ if (plen < 10) return 0;
++
++ if ((memcmp(payload, "SEND", 4) == 0) || (memcmp(payload, "GET", 3) == 0)){
++ u16 c=4;
++ const u16 end=plen-2;
++ u8 count=0;
++ while (c < end)
++ {
++ if (payload[c]== 0x20 && payload[c+1] == 0x22)
++ {
++ c++;
++ count++;
++ if (count>=2) return ((IPP2P_WINMX * 100) + 3);
++ }
++ c++;
++ }
++ }
++
++ if ( plen == 149 && payload[0] == '8' )
++ {
++#ifdef IPP2P_DEBUG_WINMX
++ printk(KERN_INFO "maybe WinMX\n");
++#endif
++ if (get_u32(payload,17) == 0 && get_u32(payload,21) == 0 && get_u32(payload,25) == 0 &&
++// get_u32(payload,33) == __constant_htonl(0x71182b1a) && get_u32(payload,37) == __constant_htonl(0x05050000) &&
++// get_u32(payload,133) == __constant_htonl(0x31097edf) && get_u32(payload,145) == __constant_htonl(0xdcb8f792))
++ get_u16(payload,39) == 0 && get_u16(payload,135) == __constant_htons(0x7edf) && get_u16(payload,147) == __constant_htons(0xf792))
++
++ {
++#ifdef IPP2P_DEBUG_WINMX
++ printk(KERN_INFO "got WinMX\n");
++#endif
++ return ((IPP2P_WINMX * 100) + 4);
++ }
++ }
++ return 0;
++} /*search_winmx*/
++
++
++/*Search for appleJuice commands*/
++int
++search_apple (const unsigned char *payload, const u16 plen)
++{
++ if ( (plen > 7) && (payload[6] == 0x0d) && (payload[7] == 0x0a) && (memcmp(payload, "ajprot", 6) == 0)) return (IPP2P_APPLE * 100);
++
++ return 0;
++}
++
++
++/*Search for BitTorrent commands*/
++int
++search_bittorrent (const unsigned char *payload, const u16 plen)
++{
++ if (plen > 20)
++ {
++ /* test for match 0x13+"BitTorrent protocol" */
++ if (payload[0] == 0x13)
++ {
++ if (memcmp(payload+1, "BitTorrent protocol", 19) == 0) return (IPP2P_BIT * 100);
++ }
++
++ /* get tracker commandos, all starts with GET /
++ * then it can follow: scrape| announce
++ * and then ?hash_info=
++ */
++ if (memcmp(payload,"GET /",5) == 0)
++ {
++ /* message scrape */
++ if ( memcmp(payload+5,"scrape?info_hash=",17)==0 ) return (IPP2P_BIT * 100 + 1);
++ /* message announce */
++ if ( memcmp(payload+5,"announce?info_hash=",19)==0 ) return (IPP2P_BIT * 100 + 2);
++ }
++ }
++ else
++ {
++ /* bitcomet encryptes the first packet, so we have to detect another
++ * one later in the flow */
++ /* first try failed, too many missdetections */
++ //if ( size == 5 && get_u32(t,0) == __constant_htonl(1) && t[4] < 3) return (IPP2P_BIT * 100 + 3);
++
++ /* second try: block request packets */
++ if ( plen == 17 && get_u32(payload,0) == __constant_htonl(0x0d) && payload[4] == 0x06 && get_u32(payload,13) == __constant_htonl(0x4000) ) return (IPP2P_BIT * 100 + 3);
++ }
++
++ return 0;
++}
++
++
++
++/*check for Kazaa get command*/
++int
++search_kazaa (const unsigned char *payload, const u16 plen)
++
++{
++ if ((payload[plen-2] == 0x0d) && (payload[plen-1] == 0x0a) && memcmp(payload, "GET /.hash=", 11) == 0)
++ return (IPP2P_DATA_KAZAA * 100);
++
++ return 0;
++}
++
++
++/*check for gnutella get command*/
++int
++search_gnu (const unsigned char *payload, const u16 plen)
++{
++ if ((payload[plen-2] == 0x0d) && (payload[plen-1] == 0x0a))
++ {
++ if (memcmp(payload, "GET /get/", 9) == 0) return ((IPP2P_DATA_GNU * 100) + 1);
++ if (memcmp(payload, "GET /uri-res/", 13) == 0) return ((IPP2P_DATA_GNU * 100) + 2);
++ }
++ return 0;
++}
++
++
++/*check for gnutella get commands and other typical data*/
++int
++search_all_gnu (const unsigned char *payload, const u16 plen)
++{
++
++ if ((payload[plen-2] == 0x0d) && (payload[plen-1] == 0x0a))
++ {
++
++ if (memcmp(payload, "GNUTELLA CONNECT/", 17) == 0) return ((IPP2P_GNU * 100) + 1);
++ if (memcmp(payload, "GNUTELLA/", 9) == 0) return ((IPP2P_GNU * 100) + 2);
++
++
++ if ((memcmp(payload, "GET /get/", 9) == 0) || (memcmp(payload, "GET /uri-res/", 13) == 0))
++ {
++ u16 c=8;
++ const u16 end=plen-22;
++ while (c < end) {
++ if ( payload[c] == 0x0a && payload[c+1] == 0x0d && ((memcmp(&payload[c+2], "X-Gnutella-", 11) == 0) || (memcmp(&payload[c+2], "X-Queue:", 8) == 0)))
++ return ((IPP2P_GNU * 100) + 3);
++ c++;
++ }
++ }
++ }
++ return 0;
++}
++
++
++/*check for KaZaA download commands and other typical data*/
++int
++search_all_kazaa (const unsigned char *payload, const u16 plen)
++{
++ if ((payload[plen-2] == 0x0d) && (payload[plen-1] == 0x0a))
++ {
++
++ if (memcmp(payload, "GIVE ", 5) == 0) return ((IPP2P_KAZAA * 100) + 1);
++
++ if (memcmp(payload, "GET /", 5) == 0) {
++ u16 c = 8;
++ const u16 end=plen-22;
++ while (c < end) {
++ if ( payload[c] == 0x0a && payload[c+1] == 0x0d && ((memcmp(&payload[c+2], "X-Kazaa-Username: ", 18) == 0) || (memcmp(&payload[c+2], "User-Agent: PeerEnabler/", 24) == 0)))
++ return ((IPP2P_KAZAA * 100) + 2);
++ c++;
++ }
++ }
++ }
++ return 0;
++}
++
++/*fast check for edonkey file segment transfer command*/
++int
++search_edk (const unsigned char *payload, const u16 plen)
++{
++ if (payload[0] != 0xe3)
++ return 0;
++ else {
++ if (payload[5] == 0x47)
++ return (IPP2P_DATA_EDK * 100);
++ else
++ return 0;
++ }
++}
++
++
++
++/*intensive but slower search for some edonkey packets including size-check*/
++int
++search_all_edk (const unsigned char *payload, const u16 plen)
++{
++ if (payload[0] != 0xe3)
++ return 0;
++ else {
++ //t += head_len;
++ const u16 cmd = get_u16(payload, 1);
++ if (cmd == (plen - 5)) {
++ switch (payload[5]) {
++ case 0x01: return ((IPP2P_EDK * 100) + 1); /*Client: hello or Server:hello*/
++ case 0x4c: return ((IPP2P_EDK * 100) + 9); /*Client: Hello-Answer*/
++ }
++ }
++ return 0;
++ }
++}
++
++
++/*fast check for Direct Connect send command*/
++int
++search_dc (const unsigned char *payload, const u16 plen)
++{
++
++ if (payload[0] != 0x24 )
++ return 0;
++ else {
++ if (memcmp(&payload[1], "Send|", 5) == 0)
++ return (IPP2P_DATA_DC * 100);
++ else
++ return 0;
++ }
++
++}
++
++
++/*intensive but slower check for all direct connect packets*/
++int
++search_all_dc (const unsigned char *payload, const u16 plen)
++{
++// unsigned char *t = haystack;
++
++ if (payload[0] == 0x24 && payload[plen-1] == 0x7c)
++ {
++ const unsigned char *t=&payload[1];
++ /* Client-Hub-Protocol */
++ if (memcmp(t, "Lock ", 5) == 0) return ((IPP2P_DC * 100) + 1);
++ /* Client-Client-Protocol, some are already recognized by client-hub (like lock) */
++ if (memcmp(t, "MyNick ", 7) == 0) return ((IPP2P_DC * 100) + 38);
++ }
++ return 0;
++}
++
++/*check for mute*/
++int
++search_mute (const unsigned char *payload, const u16 plen)
++{
++ if ( plen == 209 || plen == 345 || plen == 473 || plen == 609 || plen == 1121 )
++ {
++ //printk(KERN_DEBUG "size hit: %u",size);
++ if (memcmp(payload,"PublicKey: ",11) == 0 )
++ {
++ return ((IPP2P_MUTE * 100) + 0);
++
++/* if (memcmp(t+size-14,"\x0aEndPublicKey\x0a",14) == 0)
++ {
++ printk(KERN_DEBUG "end pubic key hit: %u",size);
++
++ }*/
++ }
++ }
++ return 0;
++}
++
++
++/* check for xdcc */
++int
++search_xdcc (const unsigned char *payload, const u16 plen)
++{
++ /* search in small packets only */
++ if (plen > 20 && plen < 200 && payload[plen-1] == 0x0a && payload[plen-2] == 0x0d && memcmp(payload,"PRIVMSG ",8) == 0)
++ {
++
++ u16 x=10;
++ const u16 end=plen - 13;
++
++ /* is seems to be a irc private massage, chedck for xdcc command */
++ while (x < end)
++ {
++ if (payload[x] == ':')
++ {
++ if ( memcmp(&payload[x+1],"xdcc send #",11) == 0 )
++ return ((IPP2P_XDCC * 100) + 0);
++ }
++ x++;
++ }
++ }
++ return 0;
++}
++
++/* search for waste */
++int search_waste(const unsigned char *payload, const u16 plen)
++{
++ if ( plen >= 8 && memcmp(payload,"GET.sha1:",9) == 0)
++ return ((IPP2P_WASTE * 100) + 0);
++
++ return 0;
++}
++
++
++static struct {
++ int command;
++ __u8 short_hand; /*for fucntions included in short hands*/
++ int packet_len;
++ int (*function_name) (const unsigned char *, const u16);
++} matchlist[] = {
++ {IPP2P_EDK,SHORT_HAND_IPP2P,20, &search_all_edk},
++// {IPP2P_DATA_KAZAA,SHORT_HAND_DATA,200, &search_kazaa},
++// {IPP2P_DATA_EDK,SHORT_HAND_DATA,60, &search_edk},
++// {IPP2P_DATA_DC,SHORT_HAND_DATA,26, &search_dc},
++ {IPP2P_DC,SHORT_HAND_IPP2P,5, search_all_dc},
++// {IPP2P_DATA_GNU,SHORT_HAND_DATA,40, &search_gnu},
++ {IPP2P_GNU,SHORT_HAND_IPP2P,5, &search_all_gnu},
++ {IPP2P_KAZAA,SHORT_HAND_IPP2P,5, &search_all_kazaa},
++ {IPP2P_BIT,SHORT_HAND_IPP2P,20, &search_bittorrent},
++ {IPP2P_APPLE,SHORT_HAND_IPP2P,5, &search_apple},
++ {IPP2P_SOUL,SHORT_HAND_IPP2P,5, &search_soul},
++ {IPP2P_WINMX,SHORT_HAND_IPP2P,2, &search_winmx},
++ {IPP2P_ARES,SHORT_HAND_IPP2P,5, &search_ares},
++ {IPP2P_MUTE,SHORT_HAND_NONE,200, &search_mute},
++ {IPP2P_WASTE,SHORT_HAND_NONE,5, &search_waste},
++ {IPP2P_XDCC,SHORT_HAND_NONE,5, &search_xdcc},
++ {0,0,0,NULL}
++};
++
++
++static struct {
++ int command;
++ __u8 short_hand; /*for fucntions included in short hands*/
++ int packet_len;
++ int (*function_name) (unsigned char *, int);
++} udp_list[] = {
++ {IPP2P_KAZAA,SHORT_HAND_IPP2P,14, &udp_search_kazaa},
++ {IPP2P_BIT,SHORT_HAND_IPP2P,23, &udp_search_bit},
++ {IPP2P_GNU,SHORT_HAND_IPP2P,11, &udp_search_gnu},
++ {IPP2P_EDK,SHORT_HAND_IPP2P,9, &udp_search_edk},
++ {IPP2P_DC,SHORT_HAND_IPP2P,12, &udp_search_directconnect},
++ {0,0,0,NULL}
++};
++
++
++static int
++match(const struct sk_buff *skb,
++ const struct net_device *in,
++ const struct net_device *out,
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
++ const struct xt_match *match,
++#endif
++ const void *matchinfo,
++ int offset,
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
++ unsigned int protoff,
++#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
++ const void *hdr,
++ u_int16_t datalen,
++#endif
++ int *hotdrop)
++{
++ const struct ipt_p2p_info *info = matchinfo;
++ unsigned char *haystack;
++ struct iphdr *ip = skb->nh.iph;
++ int p2p_result = 0, i = 0;
++// int head_len;
++ int hlen = ntohs(ip->tot_len)-(ip->ihl*4); /*hlen = packet-data length*/
++
++ /*must not be a fragment*/
++ if (offset) {
++ if (info->debug) printk("IPP2P.match: offset found %i \n",offset);
++ return 0;
++ }
++
++ /*make sure that skb is linear*/
++ if(skb_is_nonlinear(skb)){
++ if (info->debug) printk("IPP2P.match: nonlinear skb found\n");
++ return 0;
++ }
++
++
++ haystack=(char *)ip+(ip->ihl*4); /*haystack = packet data*/
++
++ switch (ip->protocol){
++ case IPPROTO_TCP: /*what to do with a TCP packet*/
++ {
++ struct tcphdr *tcph = (void *) ip + ip->ihl * 4;
++
++ if (tcph->fin) return 0; /*if FIN bit is set bail out*/
++ if (tcph->syn) return 0; /*if SYN bit is set bail out*/
++ if (tcph->rst) return 0; /*if RST bit is set bail out*/
++
++ haystack += tcph->doff * 4; /*get TCP-Header-Size*/
++ hlen -= tcph->doff * 4;
++ while (matchlist[i].command) {
++ if ((((info->cmd & matchlist[i].command) == matchlist[i].command) ||
++ ((info->cmd & matchlist[i].short_hand) == matchlist[i].short_hand)) &&
++ (hlen > matchlist[i].packet_len)) {
++ p2p_result = matchlist[i].function_name(haystack, hlen);
++ if (p2p_result)
++ {
++ if (info->debug) printk("IPP2P.debug:TCP-match: %i from: %u.%u.%u.%u:%i to: %u.%u.%u.%u:%i Length: %i\n",
++ p2p_result, NIPQUAD(ip->saddr),ntohs(tcph->source), NIPQUAD(ip->daddr),ntohs(tcph->dest),hlen);
++ return p2p_result;
++ }
++ }
++ i++;
++ }
++ return p2p_result;
++ }
++
++ case IPPROTO_UDP: /*what to do with an UDP packet*/
++ {
++ struct udphdr *udph = (void *) ip + ip->ihl * 4;
++
++ while (udp_list[i].command){
++ if ((((info->cmd & udp_list[i].command) == udp_list[i].command) ||
++ ((info->cmd & udp_list[i].short_hand) == udp_list[i].short_hand)) &&
++ (hlen > udp_list[i].packet_len)) {
++ p2p_result = udp_list[i].function_name(haystack, hlen);
++ if (p2p_result){
++ if (info->debug) printk("IPP2P.debug:UDP-match: %i from: %u.%u.%u.%u:%i to: %u.%u.%u.%u:%i Length: %i\n",
++ p2p_result, NIPQUAD(ip->saddr),ntohs(udph->source), NIPQUAD(ip->daddr),ntohs(udph->dest),hlen);
++ return p2p_result;
++ }
++ }
++ i++;
++ }
++ return p2p_result;
++ }
++
++ default: return 0;
++ }
++}
++
++
++
++static int
++checkentry(const char *tablename,
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
++ const void *ip,
++ const struct xt_match *match,
++#else
++ const struct ipt_ip *ip,
++#endif
++ void *matchinfo,
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
++ unsigned int matchsize,
++#endif
++ unsigned int hook_mask)
++{
++ /* Must specify -p tcp */
++/* if (ip->proto != IPPROTO_TCP || (ip->invflags & IPT_INV_PROTO)) {
++ * printk("ipp2p: Only works on TCP packets, use -p tcp\n");
++ * return 0;
++ * }*/
++ return 1;
++}
++
++
++
++
++static struct ipt_match ipp2p_match = {
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
++ { NULL, NULL },
++ "ipp2p",
++ &match,
++ &checkentry,
++ NULL,
++ THIS_MODULE
++#endif
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ .name = "ipp2p",
++ .match = &match,
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
++ .matchsize = sizeof(struct ipt_p2p_info),
++#endif
++ .checkentry = &checkentry,
++ .me = THIS_MODULE,
++#endif
++};
++
++
++static int __init init(void)
++{
++ printk(KERN_INFO "IPP2P v%s loading\n", IPP2P_VERSION);
++ return ipt_register_match(&ipp2p_match);
++}
++
++static void __exit fini(void)
++{
++ ipt_unregister_match(&ipp2p_match);
++ printk(KERN_INFO "IPP2P v%s unloaded\n", IPP2P_VERSION);
++}
++
++module_init(init);
++module_exit(fini);
++
++
+diff -urN linux-2.6.19.old/net/ipv4/netfilter/Kconfig linux-2.6.19.dev/net/ipv4/netfilter/Kconfig
+--- linux-2.6.19.old/net/ipv4/netfilter/Kconfig 2006-12-14 03:13:39.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/netfilter/Kconfig 2006-12-14 03:13:39.000000000 +0100
+@@ -248,6 +248,12 @@
+
+ To compile it as a module, choose M here. If unsure, say N.
+
++config IP_NF_MATCH_IPP2P
++ tristate "IPP2P"
++ depends on IP_NF_IPTABLES
++ help
++ Module for matching traffic of various Peer-to-Peer applications
++
+ config IP_NF_MATCH_TOS
+ tristate "TOS match support"
+ depends on IP_NF_IPTABLES
+diff -urN linux-2.6.19.old/net/ipv4/netfilter/Makefile linux-2.6.19.dev/net/ipv4/netfilter/Makefile
+--- linux-2.6.19.old/net/ipv4/netfilter/Makefile 2006-12-14 03:13:39.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/netfilter/Makefile 2006-12-14 03:13:39.000000000 +0100
+@@ -62,7 +62,7 @@
+ obj-$(CONFIG_IP_NF_MATCH_AH) += ipt_ah.o
+ obj-$(CONFIG_IP_NF_MATCH_TTL) += ipt_ttl.o
+ obj-$(CONFIG_IP_NF_MATCH_ADDRTYPE) += ipt_addrtype.o
+-
++obj-$(CONFIG_IP_NF_MATCH_IPP2P) += ipt_ipp2p.o
+ obj-$(CONFIG_IP_NF_MATCH_LAYER7) += ipt_layer7.o
+
+ # targets
--- /dev/null
+diff -urN linux-2.6.19.old/include/net/xfrmudp.h linux-2.6.19.dev/include/net/xfrmudp.h
+--- linux-2.6.19.old/include/net/xfrmudp.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/include/net/xfrmudp.h 2006-12-14 03:13:41.000000000 +0100
+@@ -0,0 +1,10 @@
++/*
++ * pointer to function for type that xfrm4_input wants, to permit
++ * decoupling of XFRM from udp.c
++ */
++#define HAVE_XFRM4_UDP_REGISTER
++
++typedef int (*xfrm4_rcv_encap_t)(struct sk_buff *skb, __u16 encap_type);
++extern int udp4_register_esp_rcvencap(xfrm4_rcv_encap_t func
++ , xfrm4_rcv_encap_t *oldfunc);
++extern int udp4_unregister_esp_rcvencap(xfrm4_rcv_encap_t func);
+diff -urN linux-2.6.19.old/net/ipv4/Kconfig linux-2.6.19.dev/net/ipv4/Kconfig
+--- linux-2.6.19.old/net/ipv4/Kconfig 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/Kconfig 2006-12-14 03:13:41.000000000 +0100
+@@ -273,6 +273,12 @@
+ Network), but can be distributed all over the Internet. If you want
+ to do that, say Y here and to "IP multicast routing" below.
+
++config IPSEC_NAT_TRAVERSAL
++ bool "IPSEC NAT-Traversal (KLIPS compatible)"
++ depends on INET
++ ---help---
++ Includes support for RFC3947/RFC3948 NAT-Traversal of ESP over UDP.
++
+ config IP_MROUTE
+ bool "IP: multicast routing"
+ depends on IP_MULTICAST
+diff -urN linux-2.6.19.old/net/ipv4/udp.c linux-2.6.19.dev/net/ipv4/udp.c
+--- linux-2.6.19.old/net/ipv4/udp.c 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/udp.c 2006-12-14 03:13:41.000000000 +0100
+@@ -108,11 +108,14 @@
+ #include <net/inet_common.h>
+ #include <net/checksum.h>
+ #include <net/xfrm.h>
++#include <net/xfrmudp.h>
+
+ /*
+ * Snmp MIB for the UDP layer
+ */
+
++static xfrm4_rcv_encap_t xfrm4_rcv_encap_func;
++
+ DEFINE_SNMP_STAT(struct udp_mib, udp_statistics) __read_mostly;
+
+ struct hlist_head udp_hash[UDP_HTABLE_SIZE];
+@@ -917,6 +920,42 @@
+ sk_common_release(sk);
+ }
+
++#if defined(CONFIG_XFRM) || defined(CONFIG_IPSEC_NAT_TRAVERSAL)
++
++/* if XFRM isn't a module, then register it directly. */
++#if 0 && !defined(CONFIG_XFRM_MODULE) && !defined(CONFIG_IPSEC_NAT_TRAVERSAL)
++static xfrm4_rcv_encap_t xfrm4_rcv_encap_func = xfrm4_rcv_encap;
++#else
++static xfrm4_rcv_encap_t xfrm4_rcv_encap_func = NULL;
++#endif
++
++int udp4_register_esp_rcvencap(xfrm4_rcv_encap_t func
++ , xfrm4_rcv_encap_t *oldfunc)
++{
++ if(oldfunc != NULL) {
++ *oldfunc = xfrm4_rcv_encap_func;
++ }
++
++#if 0
++ if(xfrm4_rcv_encap_func != NULL)
++ return -1;
++#endif
++
++ xfrm4_rcv_encap_func = func;
++ return 0;
++}
++
++int udp4_unregister_esp_rcvencap(xfrm4_rcv_encap_t func)
++{
++ if(xfrm4_rcv_encap_func != func)
++ return -1;
++
++ xfrm4_rcv_encap_func = NULL;
++ return 0;
++}
++#endif /* CONFIG_XFRM_MODULE || CONFIG_IPSEC_NAT_TRAVERSAL */
++
++
+ /* return:
+ * 1 if the the UDP system should process it
+ * 0 if we should drop this packet
+@@ -924,9 +963,9 @@
+ */
+ static int udp_encap_rcv(struct sock * sk, struct sk_buff *skb)
+ {
+-#ifndef CONFIG_XFRM
++#if !defined(CONFIG_XFRM) && !defined(CONFIG_IPSEC_NAT_TRAVERSAL)
+ return 1;
+-#else
++#else /* either CONFIG_XFRM or CONFIG_IPSEC_NAT_TRAVERSAL */
+ struct udp_sock *up = udp_sk(sk);
+ struct udphdr *uh;
+ struct iphdr *iph;
+@@ -939,11 +978,11 @@
+ /* if we're overly short, let UDP handle it */
+ len = skb->len - sizeof(struct udphdr);
+ if (len <= 0)
+- return 1;
++ return 2;
+
+ /* if this is not encapsulated socket, then just return now */
+ if (!encap_type)
+- return 1;
++ return 3;
+
+ /* If this is a paged skb, make sure we pull up
+ * whatever data we need to look at. */
+@@ -966,7 +1005,7 @@
+ len = sizeof(struct udphdr);
+ } else
+ /* Must be an IKE packet.. pass it through */
+- return 1;
++ return 4;
+ break;
+ case UDP_ENCAP_ESPINUDP_NON_IKE:
+ /* Check if this is a keepalive packet. If so, eat it. */
+@@ -979,7 +1018,7 @@
+ len = sizeof(struct udphdr) + 2 * sizeof(u32);
+ } else
+ /* Must be an IKE packet.. pass it through */
+- return 1;
++ return 5;
+ break;
+ }
+
+@@ -990,6 +1029,8 @@
+ */
+ if (skb_cloned(skb) && pskb_expand_head(skb, 0, 0, GFP_ATOMIC))
+ return 0;
++ if (skb_cloned(skb) && pskb_expand_head(skb, 0, 0, GFP_ATOMIC))
++ return 0;
+
+ /* Now we can update and verify the packet length... */
+ iph = skb->nh.iph;
+@@ -1055,9 +1096,13 @@
+ return 0;
+ }
+ if (ret < 0) {
+- /* process the ESP packet */
+- ret = xfrm4_rcv_encap(skb, up->encap_type);
+- UDP_INC_STATS_BH(UDP_MIB_INDATAGRAMS);
++ if(xfrm4_rcv_encap_func != NULL) {
++ ret = (*xfrm4_rcv_encap_func)(skb, up->encap_type);
++ UDP_INC_STATS_BH(UDP_MIB_INDATAGRAMS);
++ } else {
++ UDP_INC_STATS_BH(UDP_MIB_INERRORS);
++ ret = 1;
++ }
+ return -ret;
+ }
+ /* FALLTHROUGH -- it's a UDP Packet */
+@@ -1639,3 +1684,9 @@
+ EXPORT_SYMBOL(udp_proc_register);
+ EXPORT_SYMBOL(udp_proc_unregister);
+ #endif
++
++#if defined(CONFIG_IPSEC_NAT_TRAVERSAL)
++EXPORT_SYMBOL(udp4_register_esp_rcvencap);
++EXPORT_SYMBOL(udp4_unregister_esp_rcvencap);
++#endif
++
--- /dev/null
+diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set.h
+--- linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set.h 2006-12-14 03:13:43.000000000 +0100
+@@ -0,0 +1,489 @@
++#ifndef _IP_SET_H
++#define _IP_SET_H
++
++/* Copyright (C) 2000-2002 Joakim Axelsson <gozem@linux.nu>
++ * Patrick Schaaf <bof@bof.de>
++ * Martin Josefsson <gandalf@wlug.westbo.se>
++ * Copyright (C) 2003-2004 Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++/*
++ * A sockopt of such quality has hardly ever been seen before on the open
++ * market! This little beauty, hardly ever used: above 64, so it's
++ * traditionally used for firewalling, not touched (even once!) by the
++ * 2.0, 2.2 and 2.4 kernels!
++ *
++ * Comes with its own certificate of authenticity, valid anywhere in the
++ * Free world!
++ *
++ * Rusty, 19.4.2000
++ */
++#define SO_IP_SET 83
++
++/*
++ * Heavily modify by Joakim Axelsson 08.03.2002
++ * - Made it more modulebased
++ *
++ * Additional heavy modifications by Jozsef Kadlecsik 22.02.2004
++ * - bindings added
++ * - in order to "deal with" backward compatibility, renamed to ipset
++ */
++
++/*
++ * Used so that the kernel module and ipset-binary can match their versions
++ */
++#define IP_SET_PROTOCOL_VERSION 2
++
++#define IP_SET_MAXNAMELEN 32 /* set names and set typenames */
++
++/* Lets work with our own typedef for representing an IP address.
++ * We hope to make the code more portable, possibly to IPv6...
++ *
++ * The representation works in HOST byte order, because most set types
++ * will perform arithmetic operations and compare operations.
++ *
++ * For now the type is an uint32_t.
++ *
++ * Make sure to ONLY use the functions when translating and parsing
++ * in order to keep the host byte order and make it more portable:
++ * parse_ip()
++ * parse_mask()
++ * parse_ipandmask()
++ * ip_tostring()
++ * (Joakim: where are they???)
++ */
++
++typedef uint32_t ip_set_ip_t;
++
++/* Sets are identified by an id in kernel space. Tweak with ip_set_id_t
++ * and IP_SET_INVALID_ID if you want to increase the max number of sets.
++ */
++typedef uint16_t ip_set_id_t;
++
++#define IP_SET_INVALID_ID 65535
++
++/* How deep we follow bindings */
++#define IP_SET_MAX_BINDINGS 6
++
++/*
++ * Option flags for kernel operations (ipt_set_info)
++ */
++#define IPSET_SRC 0x01 /* Source match/add */
++#define IPSET_DST 0x02 /* Destination match/add */
++#define IPSET_MATCH_INV 0x04 /* Inverse matching */
++
++/*
++ * Set types (flavours)
++ */
++#define IPSET_TYPE_IP 0 /* IP address type of set */
++#define IPSET_TYPE_PORT 1 /* Port type of set */
++
++/* Reserved keywords */
++#define IPSET_TOKEN_DEFAULT ":default:"
++#define IPSET_TOKEN_ALL ":all:"
++
++/* SO_IP_SET operation constants, and their request struct types.
++ *
++ * Operation ids:
++ * 0-99: commands with version checking
++ * 100-199: add/del/test/bind/unbind
++ * 200-299: list, save, restore
++ */
++
++/* Single shot operations:
++ * version, create, destroy, flush, rename and swap
++ *
++ * Sets are identified by name.
++ */
++
++#define IP_SET_REQ_STD \
++ unsigned op; \
++ unsigned version; \
++ char name[IP_SET_MAXNAMELEN]
++
++#define IP_SET_OP_CREATE 0x00000001 /* Create a new (empty) set */
++struct ip_set_req_create {
++ IP_SET_REQ_STD;
++ char typename[IP_SET_MAXNAMELEN];
++};
++
++#define IP_SET_OP_DESTROY 0x00000002 /* Remove a (empty) set */
++struct ip_set_req_std {
++ IP_SET_REQ_STD;
++};
++
++#define IP_SET_OP_FLUSH 0x00000003 /* Remove all IPs in a set */
++/* Uses ip_set_req_std */
++
++#define IP_SET_OP_RENAME 0x00000004 /* Rename a set */
++/* Uses ip_set_req_create */
++
++#define IP_SET_OP_SWAP 0x00000005 /* Swap two sets */
++/* Uses ip_set_req_create */
++
++union ip_set_name_index {
++ char name[IP_SET_MAXNAMELEN];
++ ip_set_id_t index;
++};
++
++#define IP_SET_OP_GET_BYNAME 0x00000006 /* Get set index by name */
++struct ip_set_req_get_set {
++ unsigned op;
++ unsigned version;
++ union ip_set_name_index set;
++};
++
++#define IP_SET_OP_GET_BYINDEX 0x00000007 /* Get set name by index */
++/* Uses ip_set_req_get_set */
++
++#define IP_SET_OP_VERSION 0x00000100 /* Ask kernel version */
++struct ip_set_req_version {
++ unsigned op;
++ unsigned version;
++};
++
++/* Double shots operations:
++ * add, del, test, bind and unbind.
++ *
++ * First we query the kernel to get the index and type of the target set,
++ * then issue the command. Validity of IP is checked in kernel in order
++ * to minimalize sockopt operations.
++ */
++
++/* Get minimal set data for add/del/test/bind/unbind IP */
++#define IP_SET_OP_ADT_GET 0x00000010 /* Get set and type */
++struct ip_set_req_adt_get {
++ unsigned op;
++ unsigned version;
++ union ip_set_name_index set;
++ char typename[IP_SET_MAXNAMELEN];
++};
++
++#define IP_SET_REQ_BYINDEX \
++ unsigned op; \
++ ip_set_id_t index;
++
++struct ip_set_req_adt {
++ IP_SET_REQ_BYINDEX;
++};
++
++#define IP_SET_OP_ADD_IP 0x00000101 /* Add an IP to a set */
++/* Uses ip_set_req_adt, with type specific addage */
++
++#define IP_SET_OP_DEL_IP 0x00000102 /* Remove an IP from a set */
++/* Uses ip_set_req_adt, with type specific addage */
++
++#define IP_SET_OP_TEST_IP 0x00000103 /* Test an IP in a set */
++/* Uses ip_set_req_adt, with type specific addage */
++
++#define IP_SET_OP_BIND_SET 0x00000104 /* Bind an IP to a set */
++/* Uses ip_set_req_bind, with type specific addage */
++struct ip_set_req_bind {
++ IP_SET_REQ_BYINDEX;
++ char binding[IP_SET_MAXNAMELEN];
++};
++
++#define IP_SET_OP_UNBIND_SET 0x00000105 /* Unbind an IP from a set */
++/* Uses ip_set_req_bind, with type speficic addage
++ * index = 0 means unbinding for all sets */
++
++#define IP_SET_OP_TEST_BIND_SET 0x00000106 /* Test binding an IP to a set */
++/* Uses ip_set_req_bind, with type specific addage */
++
++/* Multiple shots operations: list, save, restore.
++ *
++ * - check kernel version and query the max number of sets
++ * - get the basic information on all sets
++ * and size required for the next step
++ * - get actual set data: header, data, bindings
++ */
++
++/* Get max_sets and the index of a queried set
++ */
++#define IP_SET_OP_MAX_SETS 0x00000020
++struct ip_set_req_max_sets {
++ unsigned op;
++ unsigned version;
++ ip_set_id_t max_sets; /* max_sets */
++ ip_set_id_t sets; /* real number of sets */
++ union ip_set_name_index set; /* index of set if name used */
++};
++
++/* Get the id and name of the sets plus size for next step */
++#define IP_SET_OP_LIST_SIZE 0x00000201
++#define IP_SET_OP_SAVE_SIZE 0x00000202
++struct ip_set_req_setnames {
++ unsigned op;
++ ip_set_id_t index; /* set to list/save */
++ size_t size; /* size to get setdata/bindings */
++ /* followed by sets number of struct ip_set_name_list */
++};
++
++struct ip_set_name_list {
++ char name[IP_SET_MAXNAMELEN];
++ char typename[IP_SET_MAXNAMELEN];
++ ip_set_id_t index;
++ ip_set_id_t id;
++};
++
++/* The actual list operation */
++#define IP_SET_OP_LIST 0x00000203
++struct ip_set_req_list {
++ IP_SET_REQ_BYINDEX;
++ /* sets number of struct ip_set_list in reply */
++};
++
++struct ip_set_list {
++ ip_set_id_t index;
++ ip_set_id_t binding;
++ u_int32_t ref;
++ size_t header_size; /* Set header data of header_size */
++ size_t members_size; /* Set members data of members_size */
++ size_t bindings_size; /* Set bindings data of bindings_size */
++};
++
++struct ip_set_hash_list {
++ ip_set_ip_t ip;
++ ip_set_id_t binding;
++};
++
++/* The save operation */
++#define IP_SET_OP_SAVE 0x00000204
++/* Uses ip_set_req_list, in the reply replaced by
++ * sets number of struct ip_set_save plus a marker
++ * ip_set_save followed by ip_set_hash_save structures.
++ */
++struct ip_set_save {
++ ip_set_id_t index;
++ ip_set_id_t binding;
++ size_t header_size; /* Set header data of header_size */
++ size_t members_size; /* Set members data of members_size */
++};
++
++/* At restoring, ip == 0 means default binding for the given set: */
++struct ip_set_hash_save {
++ ip_set_ip_t ip;
++ ip_set_id_t id;
++ ip_set_id_t binding;
++};
++
++/* The restore operation */
++#define IP_SET_OP_RESTORE 0x00000205
++/* Uses ip_set_req_setnames followed by ip_set_restore structures
++ * plus a marker ip_set_restore, followed by ip_set_hash_save
++ * structures.
++ */
++struct ip_set_restore {
++ char name[IP_SET_MAXNAMELEN];
++ char typename[IP_SET_MAXNAMELEN];
++ ip_set_id_t index;
++ size_t header_size; /* Create data of header_size */
++ size_t members_size; /* Set members data of members_size */
++};
++
++static inline int bitmap_bytes(ip_set_ip_t a, ip_set_ip_t b)
++{
++ return 4 * ((((b - a + 8) / 8) + 3) / 4);
++}
++
++#ifdef __KERNEL__
++
++#define ip_set_printk(format, args...) \
++ do { \
++ printk("%s: %s: ", __FILE__, __FUNCTION__); \
++ printk(format "\n" , ## args); \
++ } while (0)
++
++#if defined(IP_SET_DEBUG)
++#define DP(format, args...) \
++ do { \
++ printk("%s: %s (DBG): ", __FILE__, __FUNCTION__);\
++ printk(format "\n" , ## args); \
++ } while (0)
++#define IP_SET_ASSERT(x) \
++ do { \
++ if (!(x)) \
++ printk("IP_SET_ASSERT: %s:%i(%s)\n", \
++ __FILE__, __LINE__, __FUNCTION__); \
++ } while (0)
++#else
++#define DP(format, args...)
++#define IP_SET_ASSERT(x)
++#endif
++
++struct ip_set;
++
++/*
++ * The ip_set_type definition - one per set type, e.g. "ipmap".
++ *
++ * Each individual set has a pointer, set->type, going to one
++ * of these structures. Function pointers inside the structure implement
++ * the real behaviour of the sets.
++ *
++ * If not mentioned differently, the implementation behind the function
++ * pointers of a set_type, is expected to return 0 if ok, and a negative
++ * errno (e.g. -EINVAL) on error.
++ */
++struct ip_set_type {
++ struct list_head list; /* next in list of set types */
++
++ /* test for IP in set (kernel: iptables -m set src|dst)
++ * return 0 if not in set, 1 if in set.
++ */
++ int (*testip_kernel) (struct ip_set *set,
++ const struct sk_buff * skb,
++ u_int32_t flags,
++ ip_set_ip_t *ip);
++
++ /* test for IP in set (userspace: ipset -T set IP)
++ * return 0 if not in set, 1 if in set.
++ */
++ int (*testip) (struct ip_set *set,
++ const void *data, size_t size,
++ ip_set_ip_t *ip);
++
++ /*
++ * Size of the data structure passed by when
++ * adding/deletin/testing an entry.
++ */
++ size_t reqsize;
++
++ /* Add IP into set (userspace: ipset -A set IP)
++ * Return -EEXIST if the address is already in the set,
++ * and -ERANGE if the address lies outside the set bounds.
++ * If the address was not already in the set, 0 is returned.
++ */
++ int (*addip) (struct ip_set *set,
++ const void *data, size_t size,
++ ip_set_ip_t *ip);
++
++ /* Add IP into set (kernel: iptables ... -j SET set src|dst)
++ * Return -EEXIST if the address is already in the set,
++ * and -ERANGE if the address lies outside the set bounds.
++ * If the address was not already in the set, 0 is returned.
++ */
++ int (*addip_kernel) (struct ip_set *set,
++ const struct sk_buff * skb,
++ u_int32_t flags,
++ ip_set_ip_t *ip);
++
++ /* remove IP from set (userspace: ipset -D set --entry x)
++ * Return -EEXIST if the address is NOT in the set,
++ * and -ERANGE if the address lies outside the set bounds.
++ * If the address really was in the set, 0 is returned.
++ */
++ int (*delip) (struct ip_set *set,
++ const void *data, size_t size,
++ ip_set_ip_t *ip);
++
++ /* remove IP from set (kernel: iptables ... -j SET --entry x)
++ * Return -EEXIST if the address is NOT in the set,
++ * and -ERANGE if the address lies outside the set bounds.
++ * If the address really was in the set, 0 is returned.
++ */
++ int (*delip_kernel) (struct ip_set *set,
++ const struct sk_buff * skb,
++ u_int32_t flags,
++ ip_set_ip_t *ip);
++
++ /* new set creation - allocated type specific items
++ */
++ int (*create) (struct ip_set *set,
++ const void *data, size_t size);
++
++ /* retry the operation after successfully tweaking the set
++ */
++ int (*retry) (struct ip_set *set);
++
++ /* set destruction - free type specific items
++ * There is no return value.
++ * Can be called only when child sets are destroyed.
++ */
++ void (*destroy) (struct ip_set *set);
++
++ /* set flushing - reset all bits in the set, or something similar.
++ * There is no return value.
++ */
++ void (*flush) (struct ip_set *set);
++
++ /* Listing: size needed for header
++ */
++ size_t header_size;
++
++ /* Listing: Get the header
++ *
++ * Fill in the information in "data".
++ * This function is always run after list_header_size() under a
++ * writelock on the set. Therefor is the length of "data" always
++ * correct.
++ */
++ void (*list_header) (const struct ip_set *set,
++ void *data);
++
++ /* Listing: Get the size for the set members
++ */
++ int (*list_members_size) (const struct ip_set *set);
++
++ /* Listing: Get the set members
++ *
++ * Fill in the information in "data".
++ * This function is always run after list_member_size() under a
++ * writelock on the set. Therefor is the length of "data" always
++ * correct.
++ */
++ void (*list_members) (const struct ip_set *set,
++ void *data);
++
++ char typename[IP_SET_MAXNAMELEN];
++ char typecode;
++ int protocol_version;
++
++ /* Set this to THIS_MODULE if you are a module, otherwise NULL */
++ struct module *me;
++};
++
++extern int ip_set_register_set_type(struct ip_set_type *set_type);
++extern void ip_set_unregister_set_type(struct ip_set_type *set_type);
++
++/* A generic ipset */
++struct ip_set {
++ char name[IP_SET_MAXNAMELEN]; /* the name of the set */
++ rwlock_t lock; /* lock for concurrency control */
++ ip_set_id_t id; /* set id for swapping */
++ ip_set_id_t binding; /* default binding for the set */
++ atomic_t ref; /* in kernel and in hash references */
++ struct ip_set_type *type; /* the set types */
++ void *data; /* pooltype specific data */
++};
++
++/* Structure to bind set elements to sets */
++struct ip_set_hash {
++ struct list_head list; /* list of clashing entries in hash */
++ ip_set_ip_t ip; /* ip from set */
++ ip_set_id_t id; /* set id */
++ ip_set_id_t binding; /* set we bind the element to */
++};
++
++/* register and unregister set references */
++extern ip_set_id_t ip_set_get_byname(const char name[IP_SET_MAXNAMELEN]);
++extern ip_set_id_t ip_set_get_byindex(ip_set_id_t id);
++extern void ip_set_put(ip_set_id_t id);
++
++/* API for iptables set match, and SET target */
++extern void ip_set_addip_kernel(ip_set_id_t id,
++ const struct sk_buff *skb,
++ const u_int32_t *flags);
++extern void ip_set_delip_kernel(ip_set_id_t id,
++ const struct sk_buff *skb,
++ const u_int32_t *flags);
++extern int ip_set_testip_kernel(ip_set_id_t id,
++ const struct sk_buff *skb,
++ const u_int32_t *flags);
++
++#endif /* __KERNEL__ */
++
++#endif /*_IP_SET_H*/
+diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_iphash.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_iphash.h
+--- linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_iphash.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_iphash.h 2006-12-14 03:13:43.000000000 +0100
+@@ -0,0 +1,30 @@
++#ifndef __IP_SET_IPHASH_H
++#define __IP_SET_IPHASH_H
++
++#include <linux/netfilter_ipv4/ip_set.h>
++
++#define SETTYPE_NAME "iphash"
++#define MAX_RANGE 0x0000FFFF
++
++struct ip_set_iphash {
++ ip_set_ip_t *members; /* the iphash proper */
++ uint32_t initval; /* initval for jhash_1word */
++ uint32_t prime; /* prime for double hashing */
++ uint32_t hashsize; /* hash size */
++ uint16_t probes; /* max number of probes */
++ uint16_t resize; /* resize factor in percent */
++ ip_set_ip_t netmask; /* netmask */
++};
++
++struct ip_set_req_iphash_create {
++ uint32_t hashsize;
++ uint16_t probes;
++ uint16_t resize;
++ ip_set_ip_t netmask;
++};
++
++struct ip_set_req_iphash {
++ ip_set_ip_t ip;
++};
++
++#endif /* __IP_SET_IPHASH_H */
+diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_ipmap.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_ipmap.h
+--- linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_ipmap.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_ipmap.h 2006-12-14 03:13:43.000000000 +0100
+@@ -0,0 +1,56 @@
++#ifndef __IP_SET_IPMAP_H
++#define __IP_SET_IPMAP_H
++
++#include <linux/netfilter_ipv4/ip_set.h>
++
++#define SETTYPE_NAME "ipmap"
++#define MAX_RANGE 0x0000FFFF
++
++struct ip_set_ipmap {
++ void *members; /* the ipmap proper */
++ ip_set_ip_t first_ip; /* host byte order, included in range */
++ ip_set_ip_t last_ip; /* host byte order, included in range */
++ ip_set_ip_t netmask; /* subnet netmask */
++ ip_set_ip_t sizeid; /* size of set in IPs */
++ u_int16_t hosts; /* number of hosts in a subnet */
++};
++
++struct ip_set_req_ipmap_create {
++ ip_set_ip_t from;
++ ip_set_ip_t to;
++ ip_set_ip_t netmask;
++};
++
++struct ip_set_req_ipmap {
++ ip_set_ip_t ip;
++};
++
++unsigned int
++mask_to_bits(ip_set_ip_t mask)
++{
++ unsigned int bits = 32;
++ ip_set_ip_t maskaddr;
++
++ if (mask == 0xFFFFFFFF)
++ return bits;
++
++ maskaddr = 0xFFFFFFFE;
++ while (--bits >= 0 && maskaddr != mask)
++ maskaddr <<= 1;
++
++ return bits;
++}
++
++ip_set_ip_t
++range_to_mask(ip_set_ip_t from, ip_set_ip_t to, unsigned int *bits)
++{
++ ip_set_ip_t mask = 0xFFFFFFFE;
++
++ *bits = 32;
++ while (--(*bits) >= 0 && mask && (to & mask) != from)
++ mask <<= 1;
++
++ return mask;
++}
++
++#endif /* __IP_SET_IPMAP_H */
+diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_iptree.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_iptree.h
+--- linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_iptree.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_iptree.h 2006-12-14 03:13:43.000000000 +0100
+@@ -0,0 +1,39 @@
++#ifndef __IP_SET_IPTREE_H
++#define __IP_SET_IPTREE_H
++
++#include <linux/netfilter_ipv4/ip_set.h>
++
++#define SETTYPE_NAME "iptree"
++#define MAX_RANGE 0x0000FFFF
++
++struct ip_set_iptreed {
++ unsigned long expires[255]; /* x.x.x.ADDR */
++};
++
++struct ip_set_iptreec {
++ struct ip_set_iptreed *tree[255]; /* x.x.ADDR.* */
++};
++
++struct ip_set_iptreeb {
++ struct ip_set_iptreec *tree[255]; /* x.ADDR.*.* */
++};
++
++struct ip_set_iptree {
++ unsigned int timeout;
++ unsigned int gc_interval;
++#ifdef __KERNEL__
++ struct timer_list gc;
++ struct ip_set_iptreeb *tree[255]; /* ADDR.*.*.* */
++#endif
++};
++
++struct ip_set_req_iptree_create {
++ unsigned int timeout;
++};
++
++struct ip_set_req_iptree {
++ ip_set_ip_t ip;
++ unsigned int timeout;
++};
++
++#endif /* __IP_SET_IPTREE_H */
+diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_jhash.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_jhash.h
+--- linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_jhash.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_jhash.h 2006-12-14 03:13:43.000000000 +0100
+@@ -0,0 +1,148 @@
++#ifndef _LINUX_IPSET_JHASH_H
++#define _LINUX_IPSET_JHASH_H
++
++/* This is a copy of linux/jhash.h but the types u32/u8 are changed
++ * to __u32/__u8 so that the header file can be included into
++ * userspace code as well. Jozsef Kadlecsik (kadlec@blackhole.kfki.hu)
++ */
++
++/* jhash.h: Jenkins hash support.
++ *
++ * Copyright (C) 1996 Bob Jenkins (bob_jenkins@burtleburtle.net)
++ *
++ * http://burtleburtle.net/bob/hash/
++ *
++ * These are the credits from Bob's sources:
++ *
++ * lookup2.c, by Bob Jenkins, December 1996, Public Domain.
++ * hash(), hash2(), hash3, and mix() are externally useful functions.
++ * Routines to test the hash are included if SELF_TEST is defined.
++ * You can use this free for any purpose. It has no warranty.
++ *
++ * Copyright (C) 2003 David S. Miller (davem@redhat.com)
++ *
++ * I've modified Bob's hash to be useful in the Linux kernel, and
++ * any bugs present are surely my fault. -DaveM
++ */
++
++/* NOTE: Arguments are modified. */
++#define __jhash_mix(a, b, c) \
++{ \
++ a -= b; a -= c; a ^= (c>>13); \
++ b -= c; b -= a; b ^= (a<<8); \
++ c -= a; c -= b; c ^= (b>>13); \
++ a -= b; a -= c; a ^= (c>>12); \
++ b -= c; b -= a; b ^= (a<<16); \
++ c -= a; c -= b; c ^= (b>>5); \
++ a -= b; a -= c; a ^= (c>>3); \
++ b -= c; b -= a; b ^= (a<<10); \
++ c -= a; c -= b; c ^= (b>>15); \
++}
++
++/* The golden ration: an arbitrary value */
++#define JHASH_GOLDEN_RATIO 0x9e3779b9
++
++/* The most generic version, hashes an arbitrary sequence
++ * of bytes. No alignment or length assumptions are made about
++ * the input key.
++ */
++static inline __u32 jhash(void *key, __u32 length, __u32 initval)
++{
++ __u32 a, b, c, len;
++ __u8 *k = key;
++
++ len = length;
++ a = b = JHASH_GOLDEN_RATIO;
++ c = initval;
++
++ while (len >= 12) {
++ a += (k[0] +((__u32)k[1]<<8) +((__u32)k[2]<<16) +((__u32)k[3]<<24));
++ b += (k[4] +((__u32)k[5]<<8) +((__u32)k[6]<<16) +((__u32)k[7]<<24));
++ c += (k[8] +((__u32)k[9]<<8) +((__u32)k[10]<<16)+((__u32)k[11]<<24));
++
++ __jhash_mix(a,b,c);
++
++ k += 12;
++ len -= 12;
++ }
++
++ c += length;
++ switch (len) {
++ case 11: c += ((__u32)k[10]<<24);
++ case 10: c += ((__u32)k[9]<<16);
++ case 9 : c += ((__u32)k[8]<<8);
++ case 8 : b += ((__u32)k[7]<<24);
++ case 7 : b += ((__u32)k[6]<<16);
++ case 6 : b += ((__u32)k[5]<<8);
++ case 5 : b += k[4];
++ case 4 : a += ((__u32)k[3]<<24);
++ case 3 : a += ((__u32)k[2]<<16);
++ case 2 : a += ((__u32)k[1]<<8);
++ case 1 : a += k[0];
++ };
++
++ __jhash_mix(a,b,c);
++
++ return c;
++}
++
++/* A special optimized version that handles 1 or more of __u32s.
++ * The length parameter here is the number of __u32s in the key.
++ */
++static inline __u32 jhash2(__u32 *k, __u32 length, __u32 initval)
++{
++ __u32 a, b, c, len;
++
++ a = b = JHASH_GOLDEN_RATIO;
++ c = initval;
++ len = length;
++
++ while (len >= 3) {
++ a += k[0];
++ b += k[1];
++ c += k[2];
++ __jhash_mix(a, b, c);
++ k += 3; len -= 3;
++ }
++
++ c += length * 4;
++
++ switch (len) {
++ case 2 : b += k[1];
++ case 1 : a += k[0];
++ };
++
++ __jhash_mix(a,b,c);
++
++ return c;
++}
++
++
++/* A special ultra-optimized versions that knows they are hashing exactly
++ * 3, 2 or 1 word(s).
++ *
++ * NOTE: In partilar the "c += length; __jhash_mix(a,b,c);" normally
++ * done at the end is not done here.
++ */
++static inline __u32 jhash_3words(__u32 a, __u32 b, __u32 c, __u32 initval)
++{
++ a += JHASH_GOLDEN_RATIO;
++ b += JHASH_GOLDEN_RATIO;
++ c += initval;
++
++ __jhash_mix(a, b, c);
++
++ return c;
++}
++
++static inline __u32 jhash_2words(__u32 a, __u32 b, __u32 initval)
++{
++ return jhash_3words(a, b, 0, initval);
++}
++
++static inline __u32 jhash_1word(__u32 a, __u32 initval)
++{
++ return jhash_3words(a, 0, 0, initval);
++}
++
++#endif /* _LINUX_IPSET_JHASH_H */
+diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_macipmap.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_macipmap.h
+--- linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_macipmap.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_macipmap.h 2006-12-14 03:13:43.000000000 +0100
+@@ -0,0 +1,38 @@
++#ifndef __IP_SET_MACIPMAP_H
++#define __IP_SET_MACIPMAP_H
++
++#include <linux/netfilter_ipv4/ip_set.h>
++
++#define SETTYPE_NAME "macipmap"
++#define MAX_RANGE 0x0000FFFF
++
++/* general flags */
++#define IPSET_MACIP_MATCHUNSET 1
++
++/* per ip flags */
++#define IPSET_MACIP_ISSET 1
++
++struct ip_set_macipmap {
++ void *members; /* the macipmap proper */
++ ip_set_ip_t first_ip; /* host byte order, included in range */
++ ip_set_ip_t last_ip; /* host byte order, included in range */
++ u_int32_t flags;
++};
++
++struct ip_set_req_macipmap_create {
++ ip_set_ip_t from;
++ ip_set_ip_t to;
++ u_int32_t flags;
++};
++
++struct ip_set_req_macipmap {
++ ip_set_ip_t ip;
++ unsigned char ethernet[ETH_ALEN];
++};
++
++struct ip_set_macip {
++ unsigned short flags;
++ unsigned char ethernet[ETH_ALEN];
++};
++
++#endif /* __IP_SET_MACIPMAP_H */
+diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_malloc.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_malloc.h
+--- linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_malloc.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_malloc.h 2006-12-14 03:13:43.000000000 +0100
+@@ -0,0 +1,42 @@
++#ifndef _IP_SET_MALLOC_H
++#define _IP_SET_MALLOC_H
++
++#ifdef __KERNEL__
++
++/* Memory allocation and deallocation */
++static size_t max_malloc_size = 0;
++
++static inline void init_max_malloc_size(void)
++{
++#define CACHE(x) max_malloc_size = x;
++#include <linux/kmalloc_sizes.h>
++#undef CACHE
++}
++
++static inline void * ip_set_malloc_atomic(size_t bytes)
++{
++ if (bytes > max_malloc_size)
++ return __vmalloc(bytes, GFP_ATOMIC, PAGE_KERNEL);
++ else
++ return kmalloc(bytes, GFP_ATOMIC);
++}
++
++static inline void * ip_set_malloc(size_t bytes)
++{
++ if (bytes > max_malloc_size)
++ return vmalloc(bytes);
++ else
++ return kmalloc(bytes, GFP_KERNEL);
++}
++
++static inline void ip_set_free(void * data, size_t bytes)
++{
++ if (bytes > max_malloc_size)
++ vfree(data);
++ else
++ kfree(data);
++}
++
++#endif /* __KERNEL__ */
++
++#endif /*_IP_SET_MALLOC_H*/
+diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_nethash.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_nethash.h
+--- linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_nethash.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_nethash.h 2006-12-14 03:13:43.000000000 +0100
+@@ -0,0 +1,55 @@
++#ifndef __IP_SET_NETHASH_H
++#define __IP_SET_NETHASH_H
++
++#include <linux/netfilter_ipv4/ip_set.h>
++
++#define SETTYPE_NAME "nethash"
++#define MAX_RANGE 0x0000FFFF
++
++struct ip_set_nethash {
++ ip_set_ip_t *members; /* the nethash proper */
++ uint32_t initval; /* initval for jhash_1word */
++ uint32_t prime; /* prime for double hashing */
++ uint32_t hashsize; /* hash size */
++ uint16_t probes; /* max number of probes */
++ uint16_t resize; /* resize factor in percent */
++ unsigned char cidr[30]; /* CIDR sizes */
++};
++
++struct ip_set_req_nethash_create {
++ uint32_t hashsize;
++ uint16_t probes;
++ uint16_t resize;
++};
++
++struct ip_set_req_nethash {
++ ip_set_ip_t ip;
++ unsigned char cidr;
++};
++
++static unsigned char shifts[] = {255, 253, 249, 241, 225, 193, 129, 1};
++
++static inline ip_set_ip_t
++pack(ip_set_ip_t ip, unsigned char cidr)
++{
++ ip_set_ip_t addr, *paddr = &addr;
++ unsigned char n, t, *a;
++
++ addr = htonl(ip & (0xFFFFFFFF << (32 - (cidr))));
++#ifdef __KERNEL__
++ DP("ip:%u.%u.%u.%u/%u", NIPQUAD(addr), cidr);
++#endif
++ n = cidr / 8;
++ t = cidr % 8;
++ a = &((unsigned char *)paddr)[n];
++ *a = *a /(1 << (8 - t)) + shifts[t];
++#ifdef __KERNEL__
++ DP("n: %u, t: %u, a: %u", n, t, *a);
++ DP("ip:%u.%u.%u.%u/%u, %u.%u.%u.%u",
++ HIPQUAD(ip), cidr, NIPQUAD(addr));
++#endif
++
++ return ntohl(addr);
++}
++
++#endif /* __IP_SET_NETHASH_H */
+diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_portmap.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_portmap.h
+--- linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_portmap.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_portmap.h 2006-12-14 03:13:43.000000000 +0100
+@@ -0,0 +1,25 @@
++#ifndef __IP_SET_PORTMAP_H
++#define __IP_SET_PORTMAP_H
++
++#include <linux/netfilter_ipv4/ip_set.h>
++
++#define SETTYPE_NAME "portmap"
++#define MAX_RANGE 0x0000FFFF
++#define INVALID_PORT (MAX_RANGE + 1)
++
++struct ip_set_portmap {
++ void *members; /* the portmap proper */
++ ip_set_ip_t first_port; /* host byte order, included in range */
++ ip_set_ip_t last_port; /* host byte order, included in range */
++};
++
++struct ip_set_req_portmap_create {
++ ip_set_ip_t from;
++ ip_set_ip_t to;
++};
++
++struct ip_set_req_portmap {
++ ip_set_ip_t port;
++};
++
++#endif /* __IP_SET_PORTMAP_H */
+diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_prime.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_prime.h
+--- linux-2.6.19.old/include/linux/netfilter_ipv4/ip_set_prime.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_set_prime.h 2006-12-14 03:13:43.000000000 +0100
+@@ -0,0 +1,34 @@
++#ifndef __IP_SET_PRIME_H
++#define __IP_SET_PRIME_H
++
++static inline unsigned make_prime_bound(unsigned nr)
++{
++ unsigned long long nr64 = nr;
++ unsigned long long x = 1;
++ nr = 1;
++ while (x <= nr64) { x <<= 2; nr <<= 1; }
++ return nr;
++}
++
++static inline int make_prime_check(unsigned nr)
++{
++ unsigned x = 3;
++ unsigned b = make_prime_bound(nr);
++ while (x <= b) {
++ if (0 == (nr % x)) return 0;
++ x += 2;
++ }
++ return 1;
++}
++
++static unsigned make_prime(unsigned nr)
++{
++ if (0 == (nr & 1)) nr--;
++ while (nr > 1) {
++ if (make_prime_check(nr)) return nr;
++ nr -= 2;
++ }
++ return 2;
++}
++
++#endif /* __IP_SET_PRIME_H */
+diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ipt_set.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ipt_set.h
+--- linux-2.6.19.old/include/linux/netfilter_ipv4/ipt_set.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ipt_set.h 2006-12-14 03:13:43.000000000 +0100
+@@ -0,0 +1,21 @@
++#ifndef _IPT_SET_H
++#define _IPT_SET_H
++
++#include <linux/netfilter_ipv4/ip_set.h>
++
++struct ipt_set_info {
++ ip_set_id_t index;
++ u_int32_t flags[IP_SET_MAX_BINDINGS + 1];
++};
++
++/* match info */
++struct ipt_set_info_match {
++ struct ipt_set_info match_set;
++};
++
++struct ipt_set_info_target {
++ struct ipt_set_info add_set;
++ struct ipt_set_info del_set;
++};
++
++#endif /*_IPT_SET_H*/
+diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/listhelp.h linux-2.6.19.dev/include/linux/netfilter_ipv4/listhelp.h
+--- linux-2.6.19.old/include/linux/netfilter_ipv4/listhelp.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/include/linux/netfilter_ipv4/listhelp.h 2006-12-14 03:13:43.000000000 +0100
+@@ -0,0 +1,123 @@
++#ifndef _LISTHELP_H
++#define _LISTHELP_H
++#include <linux/list.h>
++
++/* Header to do more comprehensive job than linux/list.h; assume list
++ is first entry in structure. */
++
++/* Return pointer to first true entry, if any, or NULL. A macro
++ required to allow inlining of cmpfn. */
++#define LIST_FIND(head, cmpfn, type, args...) \
++({ \
++ const struct list_head *__i, *__j = NULL; \
++ \
++ ASSERT_READ_LOCK(head); \
++ list_for_each(__i, (head)) \
++ if (cmpfn((const type)__i , ## args)) { \
++ __j = __i; \
++ break; \
++ } \
++ (type)__j; \
++})
++
++#define LIST_FIND_W(head, cmpfn, type, args...) \
++({ \
++ const struct list_head *__i, *__j = NULL; \
++ \
++ ASSERT_WRITE_LOCK(head); \
++ list_for_each(__i, (head)) \
++ if (cmpfn((type)__i , ## args)) { \
++ __j = __i; \
++ break; \
++ } \
++ (type)__j; \
++})
++
++/* Just like LIST_FIND but we search backwards */
++#define LIST_FIND_B(head, cmpfn, type, args...) \
++({ \
++ const struct list_head *__i, *__j = NULL; \
++ \
++ ASSERT_READ_LOCK(head); \
++ list_for_each_prev(__i, (head)) \
++ if (cmpfn((const type)__i , ## args)) { \
++ __j = __i; \
++ break; \
++ } \
++ (type)__j; \
++})
++
++static inline int
++__list_cmp_same(const void *p1, const void *p2) { return p1 == p2; }
++
++/* Is this entry in the list? */
++static inline int
++list_inlist(struct list_head *head, const void *entry)
++{
++ return LIST_FIND(head, __list_cmp_same, void *, entry) != NULL;
++}
++
++/* Delete from list. */
++#ifdef CONFIG_NETFILTER_DEBUG
++#define LIST_DELETE(head, oldentry) \
++do { \
++ ASSERT_WRITE_LOCK(head); \
++ if (!list_inlist(head, oldentry)) \
++ printk("LIST_DELETE: %s:%u `%s'(%p) not in %s.\n", \
++ __FILE__, __LINE__, #oldentry, oldentry, #head); \
++ else list_del((struct list_head *)oldentry); \
++} while(0)
++#else
++#define LIST_DELETE(head, oldentry) list_del((struct list_head *)oldentry)
++#endif
++
++/* Append. */
++static inline void
++list_append(struct list_head *head, void *new)
++{
++ ASSERT_WRITE_LOCK(head);
++ list_add((new), (head)->prev);
++}
++
++/* Prepend. */
++static inline void
++list_prepend(struct list_head *head, void *new)
++{
++ ASSERT_WRITE_LOCK(head);
++ list_add(new, head);
++}
++
++/* Insert according to ordering function; insert before first true. */
++#define LIST_INSERT(head, new, cmpfn) \
++do { \
++ struct list_head *__i; \
++ ASSERT_WRITE_LOCK(head); \
++ list_for_each(__i, (head)) \
++ if ((new), (typeof (new))__i) \
++ break; \
++ list_add((struct list_head *)(new), __i->prev); \
++} while(0)
++
++/* If the field after the list_head is a nul-terminated string, you
++ can use these functions. */
++static inline int __list_cmp_name(const void *i, const char *name)
++{
++ return strcmp(name, i+sizeof(struct list_head)) == 0;
++}
++
++/* Returns false if same name already in list, otherwise does insert. */
++static inline int
++list_named_insert(struct list_head *head, void *new)
++{
++ if (LIST_FIND(head, __list_cmp_name, void *,
++ new + sizeof(struct list_head)))
++ return 0;
++ list_prepend(head, new);
++ return 1;
++}
++
++/* Find this named element in the list. */
++#define list_named_find(head, name) \
++LIST_FIND(head, __list_cmp_name, void *, name)
++
++#endif /*_LISTHELP_H*/
+diff -urN linux-2.6.19.old/net/ipv4/netfilter/ip_set.c linux-2.6.19.dev/net/ipv4/netfilter/ip_set.c
+--- linux-2.6.19.old/net/ipv4/netfilter/ip_set.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/netfilter/ip_set.c 2006-12-14 03:13:43.000000000 +0100
+@@ -0,0 +1,1989 @@
++/* Copyright (C) 2000-2002 Joakim Axelsson <gozem@linux.nu>
++ * Patrick Schaaf <bof@bof.de>
++ * Copyright (C) 2003-2004 Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++/* Kernel module for IP set management */
++
++#include <linux/autoconf.h>
++#include <linux/module.h>
++#include <linux/moduleparam.h>
++#include <linux/kmod.h>
++#include <linux/ip.h>
++#include <linux/skbuff.h>
++#include <linux/random.h>
++#include <linux/jhash.h>
++#include <linux/netfilter_ipv4/ip_tables.h>
++#include <linux/errno.h>
++#include <asm/uaccess.h>
++#include <asm/bitops.h>
++#include <asm/semaphore.h>
++#include <linux/spinlock.h>
++#include <linux/vmalloc.h>
++
++#define ASSERT_READ_LOCK(x) /* dont use that */
++#define ASSERT_WRITE_LOCK(x)
++#include <linux/netfilter_ipv4/listhelp.h>
++#include <linux/netfilter_ipv4/ip_set.h>
++
++static struct list_head set_type_list; /* all registered sets */
++static struct ip_set **ip_set_list; /* all individual sets */
++static DEFINE_RWLOCK(ip_set_lock); /* protects the lists and the hash */
++static DECLARE_MUTEX(ip_set_app_mutex); /* serializes user access */
++static ip_set_id_t ip_set_max = CONFIG_IP_NF_SET_MAX;
++static ip_set_id_t ip_set_bindings_hash_size = CONFIG_IP_NF_SET_HASHSIZE;
++static struct list_head *ip_set_hash; /* hash of bindings */
++static unsigned int ip_set_hash_random; /* random seed */
++
++/*
++ * Sets are identified either by the index in ip_set_list or by id.
++ * The id never changes and is used to find a key in the hash.
++ * The index may change by swapping and used at all other places
++ * (set/SET netfilter modules, binding value, etc.)
++ *
++ * Userspace requests are serialized by ip_set_mutex and sets can
++ * be deleted only from userspace. Therefore ip_set_list locking
++ * must obey the following rules:
++ *
++ * - kernel requests: read and write locking mandatory
++ * - user requests: read locking optional, write locking mandatory
++ */
++
++static inline void
++__ip_set_get(ip_set_id_t index)
++{
++ atomic_inc(&ip_set_list[index]->ref);
++}
++
++static inline void
++__ip_set_put(ip_set_id_t index)
++{
++ atomic_dec(&ip_set_list[index]->ref);
++}
++
++/*
++ * Binding routines
++ */
++
++static inline int
++ip_hash_cmp(const struct ip_set_hash *set_hash,
++ ip_set_id_t id, ip_set_ip_t ip)
++{
++ return set_hash->id == id && set_hash->ip == ip;
++}
++
++static ip_set_id_t
++ip_set_find_in_hash(ip_set_id_t id, ip_set_ip_t ip)
++{
++ u_int32_t key = jhash_2words(id, ip, ip_set_hash_random)
++ % ip_set_bindings_hash_size;
++ struct ip_set_hash *set_hash;
++
++ ASSERT_READ_LOCK(&ip_set_lock);
++ IP_SET_ASSERT(ip_set_list[id]);
++ DP("set: %s, ip: %u.%u.%u.%u", ip_set_list[id]->name, HIPQUAD(ip));
++
++ set_hash = LIST_FIND(&ip_set_hash[key], ip_hash_cmp,
++ struct ip_set_hash *, id, ip);
++
++ DP("set: %s, ip: %u.%u.%u.%u, binding: %s", ip_set_list[id]->name,
++ HIPQUAD(ip),
++ set_hash != NULL ? ip_set_list[set_hash->binding]->name : "");
++
++ return (set_hash != NULL ? set_hash->binding : IP_SET_INVALID_ID);
++}
++
++static inline void
++__set_hash_del(struct ip_set_hash *set_hash)
++{
++ ASSERT_WRITE_LOCK(&ip_set_lock);
++ IP_SET_ASSERT(ip_set_list[set_hash->binding]);
++
++ __ip_set_put(set_hash->binding);
++ list_del(&set_hash->list);
++ kfree(set_hash);
++}
++
++static int
++ip_set_hash_del(ip_set_id_t id, ip_set_ip_t ip)
++{
++ u_int32_t key = jhash_2words(id, ip, ip_set_hash_random)
++ % ip_set_bindings_hash_size;
++ struct ip_set_hash *set_hash;
++
++ IP_SET_ASSERT(ip_set_list[id]);
++ DP("set: %s, ip: %u.%u.%u.%u", ip_set_list[id]->name, HIPQUAD(ip));
++ write_lock_bh(&ip_set_lock);
++ set_hash = LIST_FIND(&ip_set_hash[key], ip_hash_cmp,
++ struct ip_set_hash *, id, ip);
++ DP("set: %s, ip: %u.%u.%u.%u, binding: %s", ip_set_list[id]->name,
++ HIPQUAD(ip),
++ set_hash != NULL ? ip_set_list[set_hash->binding]->name : "");
++
++ if (set_hash != NULL)
++ __set_hash_del(set_hash);
++ write_unlock_bh(&ip_set_lock);
++ return 0;
++}
++
++static int
++ip_set_hash_add(ip_set_id_t id, ip_set_ip_t ip, ip_set_id_t binding)
++{
++ u_int32_t key = jhash_2words(id, ip, ip_set_hash_random)
++ % ip_set_bindings_hash_size;
++ struct ip_set_hash *set_hash;
++ int ret = 0;
++
++ IP_SET_ASSERT(ip_set_list[id]);
++ IP_SET_ASSERT(ip_set_list[binding]);
++ DP("set: %s, ip: %u.%u.%u.%u, binding: %s", ip_set_list[id]->name,
++ HIPQUAD(ip), ip_set_list[binding]->name);
++ write_lock_bh(&ip_set_lock);
++ set_hash = LIST_FIND(&ip_set_hash[key], ip_hash_cmp,
++ struct ip_set_hash *, id, ip);
++ if (!set_hash) {
++ set_hash = kmalloc(sizeof(struct ip_set_hash), GFP_KERNEL);
++ if (!set_hash) {
++ ret = -ENOMEM;
++ goto unlock;
++ }
++ INIT_LIST_HEAD(&set_hash->list);
++ set_hash->id = id;
++ set_hash->ip = ip;
++ list_add(&ip_set_hash[key], &set_hash->list);
++ } else {
++ IP_SET_ASSERT(ip_set_list[set_hash->binding]);
++ DP("overwrite binding: %s",
++ ip_set_list[set_hash->binding]->name);
++ __ip_set_put(set_hash->binding);
++ }
++ set_hash->binding = binding;
++ __ip_set_get(set_hash->binding);
++ unlock:
++ write_unlock_bh(&ip_set_lock);
++ return ret;
++}
++
++#define FOREACH_HASH_DO(fn, args...) \
++({ \
++ ip_set_id_t __key; \
++ struct ip_set_hash *__set_hash; \
++ \
++ for (__key = 0; __key < ip_set_bindings_hash_size; __key++) { \
++ list_for_each_entry(__set_hash, &ip_set_hash[__key], list) \
++ fn(__set_hash , ## args); \
++ } \
++})
++
++#define FOREACH_HASH_RW_DO(fn, args...) \
++({ \
++ ip_set_id_t __key; \
++ struct ip_set_hash *__set_hash, *__n; \
++ \
++ ASSERT_WRITE_LOCK(&ip_set_lock); \
++ for (__key = 0; __key < ip_set_bindings_hash_size; __key++) { \
++ list_for_each_entry_safe(__set_hash, __n, &ip_set_hash[__key], list)\
++ fn(__set_hash , ## args); \
++ } \
++})
++
++/* Add, del and test set entries from kernel */
++
++#define follow_bindings(index, set, ip) \
++((index = ip_set_find_in_hash((set)->id, ip)) != IP_SET_INVALID_ID \
++ || (index = (set)->binding) != IP_SET_INVALID_ID)
++
++int
++ip_set_testip_kernel(ip_set_id_t index,
++ const struct sk_buff *skb,
++ const u_int32_t *flags)
++{
++ struct ip_set *set;
++ ip_set_ip_t ip;
++ int res, i = 0;
++
++ IP_SET_ASSERT(flags[i]);
++ read_lock_bh(&ip_set_lock);
++ do {
++ set = ip_set_list[index];
++ IP_SET_ASSERT(set);
++ DP("set %s, index %u", set->name, index);
++ read_lock_bh(&set->lock);
++ res = set->type->testip_kernel(set, skb, flags[i], &ip);
++ read_unlock_bh(&set->lock);
++ } while (res > 0
++ && flags[++i]
++ && follow_bindings(index, set, ip));
++ read_unlock_bh(&ip_set_lock);
++
++ return res;
++}
++
++void
++ip_set_addip_kernel(ip_set_id_t index,
++ const struct sk_buff *skb,
++ const u_int32_t *flags)
++{
++ struct ip_set *set;
++ ip_set_ip_t ip;
++ int res, i= 0;
++
++ IP_SET_ASSERT(flags[i]);
++ retry:
++ read_lock_bh(&ip_set_lock);
++ do {
++ set = ip_set_list[index];
++ IP_SET_ASSERT(set);
++ DP("set %s, index %u", set->name, index);
++ write_lock_bh(&set->lock);
++ res = set->type->addip_kernel(set, skb, flags[i], &ip);
++ write_unlock_bh(&set->lock);
++ } while ((res == 0 || res == -EEXIST)
++ && flags[++i]
++ && follow_bindings(index, set, ip));
++ read_unlock_bh(&ip_set_lock);
++
++ if (res == -EAGAIN
++ && set->type->retry
++ && (res = set->type->retry(set)) == 0)
++ goto retry;
++}
++
++void
++ip_set_delip_kernel(ip_set_id_t index,
++ const struct sk_buff *skb,
++ const u_int32_t *flags)
++{
++ struct ip_set *set;
++ ip_set_ip_t ip;
++ int res, i = 0;
++
++ IP_SET_ASSERT(flags[i]);
++ read_lock_bh(&ip_set_lock);
++ do {
++ set = ip_set_list[index];
++ IP_SET_ASSERT(set);
++ DP("set %s, index %u", set->name, index);
++ write_lock_bh(&set->lock);
++ res = set->type->delip_kernel(set, skb, flags[i], &ip);
++ write_unlock_bh(&set->lock);
++ } while ((res == 0 || res == -EEXIST)
++ && flags[++i]
++ && follow_bindings(index, set, ip));
++ read_unlock_bh(&ip_set_lock);
++}
++
++/* Register and deregister settype */
++
++static inline int
++set_type_equal(const struct ip_set_type *set_type, const char *str2)
++{
++ return !strncmp(set_type->typename, str2, IP_SET_MAXNAMELEN - 1);
++}
++
++static inline struct ip_set_type *
++find_set_type(const char *name)
++{
++ return LIST_FIND(&set_type_list,
++ set_type_equal,
++ struct ip_set_type *,
++ name);
++}
++
++int
++ip_set_register_set_type(struct ip_set_type *set_type)
++{
++ int ret = 0;
++
++ if (set_type->protocol_version != IP_SET_PROTOCOL_VERSION) {
++ ip_set_printk("'%s' uses wrong protocol version %u (want %u)",
++ set_type->typename,
++ set_type->protocol_version,
++ IP_SET_PROTOCOL_VERSION);
++ return -EINVAL;
++ }
++
++ write_lock_bh(&ip_set_lock);
++ if (find_set_type(set_type->typename)) {
++ /* Duplicate! */
++ ip_set_printk("'%s' already registered!",
++ set_type->typename);
++ ret = -EINVAL;
++ goto unlock;
++ }
++ if (!try_module_get(THIS_MODULE)) {
++ ret = -EFAULT;
++ goto unlock;
++ }
++ list_append(&set_type_list, set_type);
++ DP("'%s' registered.", set_type->typename);
++ unlock:
++ write_unlock_bh(&ip_set_lock);
++ return ret;
++}
++
++void
++ip_set_unregister_set_type(struct ip_set_type *set_type)
++{
++ write_lock_bh(&ip_set_lock);
++ if (!find_set_type(set_type->typename)) {
++ ip_set_printk("'%s' not registered?",
++ set_type->typename);
++ goto unlock;
++ }
++ LIST_DELETE(&set_type_list, set_type);
++ module_put(THIS_MODULE);
++ DP("'%s' unregistered.", set_type->typename);
++ unlock:
++ write_unlock_bh(&ip_set_lock);
++
++}
++
++/*
++ * Userspace routines
++ */
++
++/*
++ * Find set by name, reference it once. The reference makes sure the
++ * thing pointed to, does not go away under our feet. Drop the reference
++ * later, using ip_set_put().
++ */
++ip_set_id_t
++ip_set_get_byname(const char *name)
++{
++ ip_set_id_t i, index = IP_SET_INVALID_ID;
++
++ down(&ip_set_app_mutex);
++ for (i = 0; i < ip_set_max; i++) {
++ if (ip_set_list[i] != NULL
++ && strcmp(ip_set_list[i]->name, name) == 0) {
++ __ip_set_get(i);
++ index = i;
++ break;
++ }
++ }
++ up(&ip_set_app_mutex);
++ return index;
++}
++
++/*
++ * Find set by index, reference it once. The reference makes sure the
++ * thing pointed to, does not go away under our feet. Drop the reference
++ * later, using ip_set_put().
++ */
++ip_set_id_t
++ip_set_get_byindex(ip_set_id_t index)
++{
++ down(&ip_set_app_mutex);
++
++ if (index >= ip_set_max)
++ return IP_SET_INVALID_ID;
++
++ if (ip_set_list[index])
++ __ip_set_get(index);
++ else
++ index = IP_SET_INVALID_ID;
++
++ up(&ip_set_app_mutex);
++ return index;
++}
++
++/*
++ * If the given set pointer points to a valid set, decrement
++ * reference count by 1. The caller shall not assume the index
++ * to be valid, after calling this function.
++ */
++void ip_set_put(ip_set_id_t index)
++{
++ down(&ip_set_app_mutex);
++ if (ip_set_list[index])
++ __ip_set_put(index);
++ up(&ip_set_app_mutex);
++}
++
++/* Find a set by name or index */
++static ip_set_id_t
++ip_set_find_byname(const char *name)
++{
++ ip_set_id_t i, index = IP_SET_INVALID_ID;
++
++ for (i = 0; i < ip_set_max; i++) {
++ if (ip_set_list[i] != NULL
++ && strcmp(ip_set_list[i]->name, name) == 0) {
++ index = i;
++ break;
++ }
++ }
++ return index;
++}
++
++static ip_set_id_t
++ip_set_find_byindex(ip_set_id_t index)
++{
++ if (index >= ip_set_max || ip_set_list[index] == NULL)
++ index = IP_SET_INVALID_ID;
++
++ return index;
++}
++
++/*
++ * Add, del, test, bind and unbind
++ */
++
++static inline int
++__ip_set_testip(struct ip_set *set,
++ const void *data,
++ size_t size,
++ ip_set_ip_t *ip)
++{
++ int res;
++
++ read_lock_bh(&set->lock);
++ res = set->type->testip(set, data, size, ip);
++ read_unlock_bh(&set->lock);
++
++ return res;
++}
++
++static int
++__ip_set_addip(ip_set_id_t index,
++ const void *data,
++ size_t size)
++{
++ struct ip_set *set = ip_set_list[index];
++ ip_set_ip_t ip;
++ int res;
++
++ IP_SET_ASSERT(set);
++ do {
++ write_lock_bh(&set->lock);
++ res = set->type->addip(set, data, size, &ip);
++ write_unlock_bh(&set->lock);
++ } while (res == -EAGAIN
++ && set->type->retry
++ && (res = set->type->retry(set)) == 0);
++
++ return res;
++}
++
++static int
++ip_set_addip(ip_set_id_t index,
++ const void *data,
++ size_t size)
++{
++
++ return __ip_set_addip(index,
++ data + sizeof(struct ip_set_req_adt),
++ size - sizeof(struct ip_set_req_adt));
++}
++
++static int
++ip_set_delip(ip_set_id_t index,
++ const void *data,
++ size_t size)
++{
++ struct ip_set *set = ip_set_list[index];
++ ip_set_ip_t ip;
++ int res;
++
++ IP_SET_ASSERT(set);
++ write_lock_bh(&set->lock);
++ res = set->type->delip(set,
++ data + sizeof(struct ip_set_req_adt),
++ size - sizeof(struct ip_set_req_adt),
++ &ip);
++ write_unlock_bh(&set->lock);
++
++ return res;
++}
++
++static int
++ip_set_testip(ip_set_id_t index,
++ const void *data,
++ size_t size)
++{
++ struct ip_set *set = ip_set_list[index];
++ ip_set_ip_t ip;
++ int res;
++
++ IP_SET_ASSERT(set);
++ res = __ip_set_testip(set,
++ data + sizeof(struct ip_set_req_adt),
++ size - sizeof(struct ip_set_req_adt),
++ &ip);
++
++ return (res > 0 ? -EEXIST : res);
++}
++
++static int
++ip_set_bindip(ip_set_id_t index,
++ const void *data,
++ size_t size)
++{
++ struct ip_set *set = ip_set_list[index];
++ struct ip_set_req_bind *req_bind;
++ ip_set_id_t binding;
++ ip_set_ip_t ip;
++ int res;
++
++ IP_SET_ASSERT(set);
++ if (size < sizeof(struct ip_set_req_bind))
++ return -EINVAL;
++
++ req_bind = (struct ip_set_req_bind *) data;
++ req_bind->binding[IP_SET_MAXNAMELEN - 1] = '\0';
++
++ if (strcmp(req_bind->binding, IPSET_TOKEN_DEFAULT) == 0) {
++ /* Default binding of a set */
++ char *binding_name;
++
++ if (size != sizeof(struct ip_set_req_bind) + IP_SET_MAXNAMELEN)
++ return -EINVAL;
++
++ binding_name = (char *)(data + sizeof(struct ip_set_req_bind));
++ binding_name[IP_SET_MAXNAMELEN - 1] = '\0';
++
++ binding = ip_set_find_byname(binding_name);
++ if (binding == IP_SET_INVALID_ID)
++ return -ENOENT;
++
++ write_lock_bh(&ip_set_lock);
++ /* Sets as binding values are referenced */
++ if (set->binding != IP_SET_INVALID_ID)
++ __ip_set_put(set->binding);
++ set->binding = binding;
++ __ip_set_get(set->binding);
++ write_unlock_bh(&ip_set_lock);
++
++ return 0;
++ }
++ binding = ip_set_find_byname(req_bind->binding);
++ if (binding == IP_SET_INVALID_ID)
++ return -ENOENT;
++
++ res = __ip_set_testip(set,
++ data + sizeof(struct ip_set_req_bind),
++ size - sizeof(struct ip_set_req_bind),
++ &ip);
++ DP("set %s, ip: %u.%u.%u.%u, binding %s",
++ set->name, HIPQUAD(ip), ip_set_list[binding]->name);
++
++ if (res >= 0)
++ res = ip_set_hash_add(set->id, ip, binding);
++
++ return res;
++}
++
++#define FOREACH_SET_DO(fn, args...) \
++({ \
++ ip_set_id_t __i; \
++ struct ip_set *__set; \
++ \
++ for (__i = 0; __i < ip_set_max; __i++) { \
++ __set = ip_set_list[__i]; \
++ if (__set != NULL) \
++ fn(__set , ##args); \
++ } \
++})
++
++static inline void
++__set_hash_del_byid(struct ip_set_hash *set_hash, ip_set_id_t id)
++{
++ if (set_hash->id == id)
++ __set_hash_del(set_hash);
++}
++
++static inline void
++__unbind_default(struct ip_set *set)
++{
++ if (set->binding != IP_SET_INVALID_ID) {
++ /* Sets as binding values are referenced */
++ __ip_set_put(set->binding);
++ set->binding = IP_SET_INVALID_ID;
++ }
++}
++
++static int
++ip_set_unbindip(ip_set_id_t index,
++ const void *data,
++ size_t size)
++{
++ struct ip_set *set;
++ struct ip_set_req_bind *req_bind;
++ ip_set_ip_t ip;
++ int res;
++
++ DP("");
++ if (size < sizeof(struct ip_set_req_bind))
++ return -EINVAL;
++
++ req_bind = (struct ip_set_req_bind *) data;
++ req_bind->binding[IP_SET_MAXNAMELEN - 1] = '\0';
++
++ DP("%u %s", index, req_bind->binding);
++ if (index == IP_SET_INVALID_ID) {
++ /* unbind :all: */
++ if (strcmp(req_bind->binding, IPSET_TOKEN_DEFAULT) == 0) {
++ /* Default binding of sets */
++ write_lock_bh(&ip_set_lock);
++ FOREACH_SET_DO(__unbind_default);
++ write_unlock_bh(&ip_set_lock);
++ return 0;
++ } else if (strcmp(req_bind->binding, IPSET_TOKEN_ALL) == 0) {
++ /* Flush all bindings of all sets*/
++ write_lock_bh(&ip_set_lock);
++ FOREACH_HASH_RW_DO(__set_hash_del);
++ write_unlock_bh(&ip_set_lock);
++ return 0;
++ }
++ DP("unreachable reached!");
++ return -EINVAL;
++ }
++
++ set = ip_set_list[index];
++ IP_SET_ASSERT(set);
++ if (strcmp(req_bind->binding, IPSET_TOKEN_DEFAULT) == 0) {
++ /* Default binding of set */
++ ip_set_id_t binding = ip_set_find_byindex(set->binding);
++
++ if (binding == IP_SET_INVALID_ID)
++ return -ENOENT;
++
++ write_lock_bh(&ip_set_lock);
++ /* Sets in hash values are referenced */
++ __ip_set_put(set->binding);
++ set->binding = IP_SET_INVALID_ID;
++ write_unlock_bh(&ip_set_lock);
++
++ return 0;
++ } else if (strcmp(req_bind->binding, IPSET_TOKEN_ALL) == 0) {
++ /* Flush all bindings */
++
++ write_lock_bh(&ip_set_lock);
++ FOREACH_HASH_RW_DO(__set_hash_del_byid, set->id);
++ write_unlock_bh(&ip_set_lock);
++ return 0;
++ }
++
++ res = __ip_set_testip(set,
++ data + sizeof(struct ip_set_req_bind),
++ size - sizeof(struct ip_set_req_bind),
++ &ip);
++
++ DP("set %s, ip: %u.%u.%u.%u", set->name, HIPQUAD(ip));
++ if (res >= 0)
++ res = ip_set_hash_del(set->id, ip);
++
++ return res;
++}
++
++static int
++ip_set_testbind(ip_set_id_t index,
++ const void *data,
++ size_t size)
++{
++ struct ip_set *set = ip_set_list[index];
++ struct ip_set_req_bind *req_bind;
++ ip_set_id_t binding;
++ ip_set_ip_t ip;
++ int res;
++
++ IP_SET_ASSERT(set);
++ if (size < sizeof(struct ip_set_req_bind))
++ return -EINVAL;
++
++ req_bind = (struct ip_set_req_bind *) data;
++ req_bind->binding[IP_SET_MAXNAMELEN - 1] = '\0';
++
++ if (strcmp(req_bind->binding, IPSET_TOKEN_DEFAULT) == 0) {
++ /* Default binding of set */
++ char *binding_name;
++
++ if (size != sizeof(struct ip_set_req_bind) + IP_SET_MAXNAMELEN)
++ return -EINVAL;
++
++ binding_name = (char *)(data + sizeof(struct ip_set_req_bind));
++ binding_name[IP_SET_MAXNAMELEN - 1] = '\0';
++
++ binding = ip_set_find_byname(binding_name);
++ if (binding == IP_SET_INVALID_ID)
++ return -ENOENT;
++
++ res = (set->binding == binding) ? -EEXIST : 0;
++
++ return res;
++ }
++ binding = ip_set_find_byname(req_bind->binding);
++ if (binding == IP_SET_INVALID_ID)
++ return -ENOENT;
++
++
++ res = __ip_set_testip(set,
++ data + sizeof(struct ip_set_req_bind),
++ size - sizeof(struct ip_set_req_bind),
++ &ip);
++ DP("set %s, ip: %u.%u.%u.%u, binding %s",
++ set->name, HIPQUAD(ip), ip_set_list[binding]->name);
++
++ if (res >= 0)
++ res = (ip_set_find_in_hash(set->id, ip) == binding)
++ ? -EEXIST : 0;
++
++ return res;
++}
++
++static struct ip_set_type *
++find_set_type_rlock(const char *typename)
++{
++ struct ip_set_type *type;
++
++ read_lock_bh(&ip_set_lock);
++ type = find_set_type(typename);
++ if (type == NULL)
++ read_unlock_bh(&ip_set_lock);
++
++ return type;
++}
++
++static int
++find_free_id(const char *name,
++ ip_set_id_t *index,
++ ip_set_id_t *id)
++{
++ ip_set_id_t i;
++
++ *id = IP_SET_INVALID_ID;
++ for (i = 0; i < ip_set_max; i++) {
++ if (ip_set_list[i] == NULL) {
++ if (*id == IP_SET_INVALID_ID)
++ *id = *index = i;
++ } else if (strcmp(name, ip_set_list[i]->name) == 0)
++ /* Name clash */
++ return -EEXIST;
++ }
++ if (*id == IP_SET_INVALID_ID)
++ /* No free slot remained */
++ return -ERANGE;
++ /* Check that index is usable as id (swapping) */
++ check:
++ for (i = 0; i < ip_set_max; i++) {
++ if (ip_set_list[i] != NULL
++ && ip_set_list[i]->id == *id) {
++ *id = i;
++ goto check;
++ }
++ }
++ return 0;
++}
++
++/*
++ * Create a set
++ */
++static int
++ip_set_create(const char *name,
++ const char *typename,
++ ip_set_id_t restore,
++ const void *data,
++ size_t size)
++{
++ struct ip_set *set;
++ ip_set_id_t index, id;
++ int res = 0;
++
++ DP("setname: %s, typename: %s, id: %u", name, typename, restore);
++ /*
++ * First, and without any locks, allocate and initialize
++ * a normal base set structure.
++ */
++ set = kmalloc(sizeof(struct ip_set), GFP_KERNEL);
++ if (!set)
++ return -ENOMEM;
++ set->lock = RW_LOCK_UNLOCKED;
++ strncpy(set->name, name, IP_SET_MAXNAMELEN);
++ set->binding = IP_SET_INVALID_ID;
++ atomic_set(&set->ref, 0);
++
++ /*
++ * Next, take the &ip_set_lock, check that we know the type,
++ * and take a reference on the type, to make sure it
++ * stays available while constructing our new set.
++ *
++ * After referencing the type, we drop the &ip_set_lock,
++ * and let the new set construction run without locks.
++ */
++ set->type = find_set_type_rlock(typename);
++ if (set->type == NULL) {
++ /* Try loading the module */
++ char modulename[IP_SET_MAXNAMELEN + strlen("ip_set_") + 1];
++ strcpy(modulename, "ip_set_");
++ strcat(modulename, typename);
++ DP("try to load %s", modulename);
++ request_module(modulename);
++ set->type = find_set_type_rlock(typename);
++ }
++ if (set->type == NULL) {
++ ip_set_printk("no set type '%s', set '%s' not created",
++ typename, name);
++ res = -ENOENT;
++ goto out;
++ }
++ if (!try_module_get(set->type->me)) {
++ read_unlock_bh(&ip_set_lock);
++ res = -EFAULT;
++ goto out;
++ }
++ read_unlock_bh(&ip_set_lock);
++
++ /*
++ * Without holding any locks, create private part.
++ */
++ res = set->type->create(set, data, size);
++ if (res != 0)
++ goto put_out;
++
++ /* BTW, res==0 here. */
++
++ /*
++ * Here, we have a valid, constructed set. &ip_set_lock again,
++ * find free id/index and check that it is not already in
++ * ip_set_list.
++ */
++ write_lock_bh(&ip_set_lock);
++ if ((res = find_free_id(set->name, &index, &id)) != 0) {
++ DP("no free id!");
++ goto cleanup;
++ }
++
++ /* Make sure restore gets the same index */
++ if (restore != IP_SET_INVALID_ID && index != restore) {
++ DP("Can't restore, sets are screwed up");
++ res = -ERANGE;
++ goto cleanup;
++ }
++
++ /*
++ * Finally! Add our shiny new set to the list, and be done.
++ */
++ DP("create: '%s' created with index %u, id %u!", set->name, index, id);
++ set->id = id;
++ ip_set_list[index] = set;
++ write_unlock_bh(&ip_set_lock);
++ return res;
++
++ cleanup:
++ write_unlock_bh(&ip_set_lock);
++ set->type->destroy(set);
++ put_out:
++ module_put(set->type->me);
++ out:
++ kfree(set);
++ return res;
++}
++
++/*
++ * Destroy a given existing set
++ */
++static void
++ip_set_destroy_set(ip_set_id_t index)
++{
++ struct ip_set *set = ip_set_list[index];
++
++ IP_SET_ASSERT(set);
++ DP("set: %s", set->name);
++ write_lock_bh(&ip_set_lock);
++ FOREACH_HASH_RW_DO(__set_hash_del_byid, set->id);
++ if (set->binding != IP_SET_INVALID_ID)
++ __ip_set_put(set->binding);
++ ip_set_list[index] = NULL;
++ write_unlock_bh(&ip_set_lock);
++
++ /* Must call it without holding any lock */
++ set->type->destroy(set);
++ module_put(set->type->me);
++ kfree(set);
++}
++
++/*
++ * Destroy a set - or all sets
++ * Sets must not be referenced/used.
++ */
++static int
++ip_set_destroy(ip_set_id_t index)
++{
++ ip_set_id_t i;
++
++ /* ref modification always protected by the mutex */
++ if (index != IP_SET_INVALID_ID) {
++ if (atomic_read(&ip_set_list[index]->ref))
++ return -EBUSY;
++ ip_set_destroy_set(index);
++ } else {
++ for (i = 0; i < ip_set_max; i++) {
++ if (ip_set_list[i] != NULL
++ && (atomic_read(&ip_set_list[i]->ref)))
++ return -EBUSY;
++ }
++
++ for (i = 0; i < ip_set_max; i++) {
++ if (ip_set_list[i] != NULL)
++ ip_set_destroy_set(i);
++ }
++ }
++ return 0;
++}
++
++static void
++ip_set_flush_set(struct ip_set *set)
++{
++ DP("set: %s %u", set->name, set->id);
++
++ write_lock_bh(&set->lock);
++ set->type->flush(set);
++ write_unlock_bh(&set->lock);
++}
++
++/*
++ * Flush data in a set - or in all sets
++ */
++static int
++ip_set_flush(ip_set_id_t index)
++{
++ if (index != IP_SET_INVALID_ID) {
++ IP_SET_ASSERT(ip_set_list[index]);
++ ip_set_flush_set(ip_set_list[index]);
++ } else
++ FOREACH_SET_DO(ip_set_flush_set);
++
++ return 0;
++}
++
++/* Rename a set */
++static int
++ip_set_rename(ip_set_id_t index, const char *name)
++{
++ struct ip_set *set = ip_set_list[index];
++ ip_set_id_t i;
++ int res = 0;
++
++ DP("set: %s to %s", set->name, name);
++ write_lock_bh(&ip_set_lock);
++ for (i = 0; i < ip_set_max; i++) {
++ if (ip_set_list[i] != NULL
++ && strncmp(ip_set_list[i]->name,
++ name,
++ IP_SET_MAXNAMELEN - 1) == 0) {
++ res = -EEXIST;
++ goto unlock;
++ }
++ }
++ strncpy(set->name, name, IP_SET_MAXNAMELEN);
++ unlock:
++ write_unlock_bh(&ip_set_lock);
++ return res;
++}
++
++/*
++ * Swap two sets so that name/index points to the other.
++ * References are also swapped.
++ */
++static int
++ip_set_swap(ip_set_id_t from_index, ip_set_id_t to_index)
++{
++ struct ip_set *from = ip_set_list[from_index];
++ struct ip_set *to = ip_set_list[to_index];
++ char from_name[IP_SET_MAXNAMELEN];
++ u_int32_t from_ref;
++
++ DP("set: %s to %s", from->name, to->name);
++ /* Type can't be changed. Artifical restriction. */
++ if (from->type->typecode != to->type->typecode)
++ return -ENOEXEC;
++
++ /* No magic here: ref munging protected by the mutex */
++ write_lock_bh(&ip_set_lock);
++ strncpy(from_name, from->name, IP_SET_MAXNAMELEN);
++ from_ref = atomic_read(&from->ref);
++
++ strncpy(from->name, to->name, IP_SET_MAXNAMELEN);
++ atomic_set(&from->ref, atomic_read(&to->ref));
++ strncpy(to->name, from_name, IP_SET_MAXNAMELEN);
++ atomic_set(&to->ref, from_ref);
++
++ ip_set_list[from_index] = to;
++ ip_set_list[to_index] = from;
++
++ write_unlock_bh(&ip_set_lock);
++ return 0;
++}
++
++/*
++ * List set data
++ */
++
++static inline void
++__set_hash_bindings_size_list(struct ip_set_hash *set_hash,
++ ip_set_id_t id, size_t *size)
++{
++ if (set_hash->id == id)
++ *size += sizeof(struct ip_set_hash_list);
++}
++
++static inline void
++__set_hash_bindings_size_save(struct ip_set_hash *set_hash,
++ ip_set_id_t id, size_t *size)
++{
++ if (set_hash->id == id)
++ *size += sizeof(struct ip_set_hash_save);
++}
++
++static inline void
++__set_hash_bindings(struct ip_set_hash *set_hash,
++ ip_set_id_t id, void *data, int *used)
++{
++ if (set_hash->id == id) {
++ struct ip_set_hash_list *hash_list =
++ (struct ip_set_hash_list *)(data + *used);
++
++ hash_list->ip = set_hash->ip;
++ hash_list->binding = set_hash->binding;
++ *used += sizeof(struct ip_set_hash_list);
++ }
++}
++
++static int ip_set_list_set(ip_set_id_t index,
++ void *data,
++ int *used,
++ int len)
++{
++ struct ip_set *set = ip_set_list[index];
++ struct ip_set_list *set_list;
++
++ /* Pointer to our header */
++ set_list = (struct ip_set_list *) (data + *used);
++
++ DP("set: %s, used: %d %p %p", set->name, *used, data, data + *used);
++
++ /* Get and ensure header size */
++ if (*used + sizeof(struct ip_set_list) > len)
++ goto not_enough_mem;
++ *used += sizeof(struct ip_set_list);
++
++ read_lock_bh(&set->lock);
++ /* Get and ensure set specific header size */
++ set_list->header_size = set->type->header_size;
++ if (*used + set_list->header_size > len)
++ goto unlock_set;
++
++ /* Fill in the header */
++ set_list->index = index;
++ set_list->binding = set->binding;
++ set_list->ref = atomic_read(&set->ref);
++
++ /* Fill in set spefific header data */
++ set->type->list_header(set, data + *used);
++ *used += set_list->header_size;
++
++ /* Get and ensure set specific members size */
++ set_list->members_size = set->type->list_members_size(set);
++ if (*used + set_list->members_size > len)
++ goto unlock_set;
++
++ /* Fill in set spefific members data */
++ set->type->list_members(set, data + *used);
++ *used += set_list->members_size;
++ read_unlock_bh(&set->lock);
++
++ /* Bindings */
++
++ /* Get and ensure set specific bindings size */
++ set_list->bindings_size = 0;
++ FOREACH_HASH_DO(__set_hash_bindings_size_list,
++ set->id, &set_list->bindings_size);
++ if (*used + set_list->bindings_size > len)
++ goto not_enough_mem;
++
++ /* Fill in set spefific bindings data */
++ FOREACH_HASH_DO(__set_hash_bindings, set->id, data, used);
++
++ return 0;
++
++ unlock_set:
++ read_unlock_bh(&set->lock);
++ not_enough_mem:
++ DP("not enough mem, try again");
++ return -EAGAIN;
++}
++
++/*
++ * Save sets
++ */
++static int ip_set_save_set(ip_set_id_t index,
++ void *data,
++ int *used,
++ int len)
++{
++ struct ip_set *set;
++ struct ip_set_save *set_save;
++
++ /* Pointer to our header */
++ set_save = (struct ip_set_save *) (data + *used);
++
++ /* Get and ensure header size */
++ if (*used + sizeof(struct ip_set_save) > len)
++ goto not_enough_mem;
++ *used += sizeof(struct ip_set_save);
++
++ set = ip_set_list[index];
++ DP("set: %s, used: %u(%u) %p %p", set->name, *used, len,
++ data, data + *used);
++
++ read_lock_bh(&set->lock);
++ /* Get and ensure set specific header size */
++ set_save->header_size = set->type->header_size;
++ if (*used + set_save->header_size > len)
++ goto unlock_set;
++
++ /* Fill in the header */
++ set_save->index = index;
++ set_save->binding = set->binding;
++
++ /* Fill in set spefific header data */
++ set->type->list_header(set, data + *used);
++ *used += set_save->header_size;
++
++ DP("set header filled: %s, used: %u %p %p", set->name, *used,
++ data, data + *used);
++ /* Get and ensure set specific members size */
++ set_save->members_size = set->type->list_members_size(set);
++ if (*used + set_save->members_size > len)
++ goto unlock_set;
++
++ /* Fill in set spefific members data */
++ set->type->list_members(set, data + *used);
++ *used += set_save->members_size;
++ read_unlock_bh(&set->lock);
++ DP("set members filled: %s, used: %u %p %p", set->name, *used,
++ data, data + *used);
++ return 0;
++
++ unlock_set:
++ read_unlock_bh(&set->lock);
++ not_enough_mem:
++ DP("not enough mem, try again");
++ return -EAGAIN;
++}
++
++static inline void
++__set_hash_save_bindings(struct ip_set_hash *set_hash,
++ ip_set_id_t id,
++ void *data,
++ int *used,
++ int len,
++ int *res)
++{
++ if (*res == 0
++ && (id == IP_SET_INVALID_ID || set_hash->id == id)) {
++ struct ip_set_hash_save *hash_save =
++ (struct ip_set_hash_save *)(data + *used);
++ /* Ensure bindings size */
++ if (*used + sizeof(struct ip_set_hash_save) > len) {
++ *res = -ENOMEM;
++ return;
++ }
++ hash_save->id = set_hash->id;
++ hash_save->ip = set_hash->ip;
++ hash_save->binding = set_hash->binding;
++ *used += sizeof(struct ip_set_hash_save);
++ }
++}
++
++static int ip_set_save_bindings(ip_set_id_t index,
++ void *data,
++ int *used,
++ int len)
++{
++ int res = 0;
++ struct ip_set_save *set_save;
++
++ DP("used %u, len %u", *used, len);
++ /* Get and ensure header size */
++ if (*used + sizeof(struct ip_set_save) > len)
++ return -ENOMEM;
++
++ /* Marker */
++ set_save = (struct ip_set_save *) (data + *used);
++ set_save->index = IP_SET_INVALID_ID;
++ *used += sizeof(struct ip_set_save);
++
++ DP("marker added used %u, len %u", *used, len);
++ /* Fill in bindings data */
++ if (index != IP_SET_INVALID_ID)
++ /* Sets are identified by id in hash */
++ index = ip_set_list[index]->id;
++ FOREACH_HASH_DO(__set_hash_save_bindings, index, data, used, len, &res);
++
++ return res;
++}
++
++/*
++ * Restore sets
++ */
++static int ip_set_restore(void *data,
++ int len)
++{
++ int res = 0;
++ int line = 0, used = 0, members_size;
++ struct ip_set *set;
++ struct ip_set_hash_save *hash_save;
++ struct ip_set_restore *set_restore;
++ ip_set_id_t index;
++
++ /* Loop to restore sets */
++ while (1) {
++ line++;
++
++ DP("%u %u %u", used, sizeof(struct ip_set_restore), len);
++ /* Get and ensure header size */
++ if (used + sizeof(struct ip_set_restore) > len)
++ return line;
++ set_restore = (struct ip_set_restore *) (data + used);
++ used += sizeof(struct ip_set_restore);
++
++ /* Ensure data size */
++ if (used
++ + set_restore->header_size
++ + set_restore->members_size > len)
++ return line;
++
++ /* Check marker */
++ if (set_restore->index == IP_SET_INVALID_ID) {
++ line--;
++ goto bindings;
++ }
++
++ /* Try to create the set */
++ DP("restore %s %s", set_restore->name, set_restore->typename);
++ res = ip_set_create(set_restore->name,
++ set_restore->typename,
++ set_restore->index,
++ data + used,
++ set_restore->header_size);
++
++ if (res != 0)
++ return line;
++ used += set_restore->header_size;
++
++ index = ip_set_find_byindex(set_restore->index);
++ DP("index %u, restore_index %u", index, set_restore->index);
++ if (index != set_restore->index)
++ return line;
++ /* Try to restore members data */
++ set = ip_set_list[index];
++ members_size = 0;
++ DP("members_size %u reqsize %u",
++ set_restore->members_size, set->type->reqsize);
++ while (members_size + set->type->reqsize <=
++ set_restore->members_size) {
++ line++;
++ DP("members: %u, line %u", members_size, line);
++ res = __ip_set_addip(index,
++ data + used + members_size,
++ set->type->reqsize);
++ if (!(res == 0 || res == -EEXIST))
++ return line;
++ members_size += set->type->reqsize;
++ }
++
++ DP("members_size %u %u",
++ set_restore->members_size, members_size);
++ if (members_size != set_restore->members_size)
++ return line++;
++ used += set_restore->members_size;
++ }
++
++ bindings:
++ /* Loop to restore bindings */
++ while (used < len) {
++ line++;
++
++ DP("restore binding, line %u", line);
++ /* Get and ensure size */
++ if (used + sizeof(struct ip_set_hash_save) > len)
++ return line;
++ hash_save = (struct ip_set_hash_save *) (data + used);
++ used += sizeof(struct ip_set_hash_save);
++
++ /* hash_save->id is used to store the index */
++ index = ip_set_find_byindex(hash_save->id);
++ DP("restore binding index %u, id %u, %u -> %u",
++ index, hash_save->id, hash_save->ip, hash_save->binding);
++ if (index != hash_save->id)
++ return line;
++
++ set = ip_set_list[hash_save->id];
++ /* Null valued IP means default binding */
++ if (hash_save->ip)
++ res = ip_set_hash_add(set->id,
++ hash_save->ip,
++ hash_save->binding);
++ else {
++ IP_SET_ASSERT(set->binding == IP_SET_INVALID_ID);
++ write_lock_bh(&ip_set_lock);
++ set->binding = hash_save->binding;
++ __ip_set_get(set->binding);
++ write_unlock_bh(&ip_set_lock);
++ DP("default binding: %u", set->binding);
++ }
++ if (res != 0)
++ return line;
++ }
++ if (used != len)
++ return line;
++
++ return 0;
++}
++
++static int
++ip_set_sockfn_set(struct sock *sk, int optval, void *user, unsigned int len)
++{
++ void *data;
++ int res = 0; /* Assume OK */
++ unsigned *op;
++ struct ip_set_req_adt *req_adt;
++ ip_set_id_t index = IP_SET_INVALID_ID;
++ int (*adtfn)(ip_set_id_t index,
++ const void *data, size_t size);
++ struct fn_table {
++ int (*fn)(ip_set_id_t index,
++ const void *data, size_t size);
++ } adtfn_table[] =
++ { { ip_set_addip }, { ip_set_delip }, { ip_set_testip},
++ { ip_set_bindip}, { ip_set_unbindip }, { ip_set_testbind },
++ };
++
++ DP("optval=%d, user=%p, len=%d", optval, user, len);
++ if (!capable(CAP_NET_ADMIN))
++ return -EPERM;
++ if (optval != SO_IP_SET)
++ return -EBADF;
++ if (len <= sizeof(unsigned)) {
++ ip_set_printk("short userdata (want >%zu, got %u)",
++ sizeof(unsigned), len);
++ return -EINVAL;
++ }
++ data = vmalloc(len);
++ if (!data) {
++ DP("out of mem for %u bytes", len);
++ return -ENOMEM;
++ }
++ if (copy_from_user(data, user, len) != 0) {
++ res = -EFAULT;
++ goto done;
++ }
++ if (down_interruptible(&ip_set_app_mutex)) {
++ res = -EINTR;
++ goto done;
++ }
++
++ op = (unsigned *)data;
++ DP("op=%x", *op);
++
++ if (*op < IP_SET_OP_VERSION) {
++ /* Check the version at the beginning of operations */
++ struct ip_set_req_version *req_version =
++ (struct ip_set_req_version *) data;
++ if (req_version->version != IP_SET_PROTOCOL_VERSION) {
++ res = -EPROTO;
++ goto done;
++ }
++ }
++
++ switch (*op) {
++ case IP_SET_OP_CREATE:{
++ struct ip_set_req_create *req_create
++ = (struct ip_set_req_create *) data;
++
++ if (len <= sizeof(struct ip_set_req_create)) {
++ ip_set_printk("short CREATE data (want >%zu, got %u)",
++ sizeof(struct ip_set_req_create), len);
++ res = -EINVAL;
++ goto done;
++ }
++ req_create->name[IP_SET_MAXNAMELEN - 1] = '\0';
++ req_create->typename[IP_SET_MAXNAMELEN - 1] = '\0';
++ res = ip_set_create(req_create->name,
++ req_create->typename,
++ IP_SET_INVALID_ID,
++ data + sizeof(struct ip_set_req_create),
++ len - sizeof(struct ip_set_req_create));
++ goto done;
++ }
++ case IP_SET_OP_DESTROY:{
++ struct ip_set_req_std *req_destroy
++ = (struct ip_set_req_std *) data;
++
++ if (len != sizeof(struct ip_set_req_std)) {
++ ip_set_printk("invalid DESTROY data (want %zu, got %u)",
++ sizeof(struct ip_set_req_std), len);
++ res = -EINVAL;
++ goto done;
++ }
++ if (strcmp(req_destroy->name, IPSET_TOKEN_ALL) == 0) {
++ /* Destroy all sets */
++ index = IP_SET_INVALID_ID;
++ } else {
++ req_destroy->name[IP_SET_MAXNAMELEN - 1] = '\0';
++ index = ip_set_find_byname(req_destroy->name);
++
++ if (index == IP_SET_INVALID_ID) {
++ res = -ENOENT;
++ goto done;
++ }
++ }
++
++ res = ip_set_destroy(index);
++ goto done;
++ }
++ case IP_SET_OP_FLUSH:{
++ struct ip_set_req_std *req_flush =
++ (struct ip_set_req_std *) data;
++
++ if (len != sizeof(struct ip_set_req_std)) {
++ ip_set_printk("invalid FLUSH data (want %zu, got %u)",
++ sizeof(struct ip_set_req_std), len);
++ res = -EINVAL;
++ goto done;
++ }
++ if (strcmp(req_flush->name, IPSET_TOKEN_ALL) == 0) {
++ /* Flush all sets */
++ index = IP_SET_INVALID_ID;
++ } else {
++ req_flush->name[IP_SET_MAXNAMELEN - 1] = '\0';
++ index = ip_set_find_byname(req_flush->name);
++
++ if (index == IP_SET_INVALID_ID) {
++ res = -ENOENT;
++ goto done;
++ }
++ }
++ res = ip_set_flush(index);
++ goto done;
++ }
++ case IP_SET_OP_RENAME:{
++ struct ip_set_req_create *req_rename
++ = (struct ip_set_req_create *) data;
++
++ if (len != sizeof(struct ip_set_req_create)) {
++ ip_set_printk("invalid RENAME data (want %zu, got %u)",
++ sizeof(struct ip_set_req_create), len);
++ res = -EINVAL;
++ goto done;
++ }
++
++ req_rename->name[IP_SET_MAXNAMELEN - 1] = '\0';
++ req_rename->typename[IP_SET_MAXNAMELEN - 1] = '\0';
++
++ index = ip_set_find_byname(req_rename->name);
++ if (index == IP_SET_INVALID_ID) {
++ res = -ENOENT;
++ goto done;
++ }
++ res = ip_set_rename(index, req_rename->typename);
++ goto done;
++ }
++ case IP_SET_OP_SWAP:{
++ struct ip_set_req_create *req_swap
++ = (struct ip_set_req_create *) data;
++ ip_set_id_t to_index;
++
++ if (len != sizeof(struct ip_set_req_create)) {
++ ip_set_printk("invalid SWAP data (want %zu, got %u)",
++ sizeof(struct ip_set_req_create), len);
++ res = -EINVAL;
++ goto done;
++ }
++
++ req_swap->name[IP_SET_MAXNAMELEN - 1] = '\0';
++ req_swap->typename[IP_SET_MAXNAMELEN - 1] = '\0';
++
++ index = ip_set_find_byname(req_swap->name);
++ if (index == IP_SET_INVALID_ID) {
++ res = -ENOENT;
++ goto done;
++ }
++ to_index = ip_set_find_byname(req_swap->typename);
++ if (to_index == IP_SET_INVALID_ID) {
++ res = -ENOENT;
++ goto done;
++ }
++ res = ip_set_swap(index, to_index);
++ goto done;
++ }
++ default:
++ break; /* Set identified by id */
++ }
++
++ /* There we may have add/del/test/bind/unbind/test_bind operations */
++ if (*op < IP_SET_OP_ADD_IP || *op > IP_SET_OP_TEST_BIND_SET) {
++ res = -EBADMSG;
++ goto done;
++ }
++ adtfn = adtfn_table[*op - IP_SET_OP_ADD_IP].fn;
++
++ if (len < sizeof(struct ip_set_req_adt)) {
++ ip_set_printk("short data in adt request (want >=%zu, got %u)",
++ sizeof(struct ip_set_req_adt), len);
++ res = -EINVAL;
++ goto done;
++ }
++ req_adt = (struct ip_set_req_adt *) data;
++
++ /* -U :all: :all:|:default: uses IP_SET_INVALID_ID */
++ if (!(*op == IP_SET_OP_UNBIND_SET
++ && req_adt->index == IP_SET_INVALID_ID)) {
++ index = ip_set_find_byindex(req_adt->index);
++ if (index == IP_SET_INVALID_ID) {
++ res = -ENOENT;
++ goto done;
++ }
++ }
++ res = adtfn(index, data, len);
++
++ done:
++ up(&ip_set_app_mutex);
++ vfree(data);
++ if (res > 0)
++ res = 0;
++ DP("final result %d", res);
++ return res;
++}
++
++static int
++ip_set_sockfn_get(struct sock *sk, int optval, void *user, int *len)
++{
++ int res = 0;
++ unsigned *op;
++ ip_set_id_t index = IP_SET_INVALID_ID;
++ void *data;
++ int copylen = *len;
++
++ DP("optval=%d, user=%p, len=%d", optval, user, *len);
++ if (!capable(CAP_NET_ADMIN))
++ return -EPERM;
++ if (optval != SO_IP_SET)
++ return -EBADF;
++ if (*len < sizeof(unsigned)) {
++ ip_set_printk("short userdata (want >=%zu, got %d)",
++ sizeof(unsigned), *len);
++ return -EINVAL;
++ }
++ data = vmalloc(*len);
++ if (!data) {
++ DP("out of mem for %d bytes", *len);
++ return -ENOMEM;
++ }
++ if (copy_from_user(data, user, *len) != 0) {
++ res = -EFAULT;
++ goto done;
++ }
++ if (down_interruptible(&ip_set_app_mutex)) {
++ res = -EINTR;
++ goto done;
++ }
++
++ op = (unsigned *) data;
++ DP("op=%x", *op);
++
++ if (*op < IP_SET_OP_VERSION) {
++ /* Check the version at the beginning of operations */
++ struct ip_set_req_version *req_version =
++ (struct ip_set_req_version *) data;
++ if (req_version->version != IP_SET_PROTOCOL_VERSION) {
++ res = -EPROTO;
++ goto done;
++ }
++ }
++
++ switch (*op) {
++ case IP_SET_OP_VERSION: {
++ struct ip_set_req_version *req_version =
++ (struct ip_set_req_version *) data;
++
++ if (*len != sizeof(struct ip_set_req_version)) {
++ ip_set_printk("invalid VERSION (want %zu, got %d)",
++ sizeof(struct ip_set_req_version),
++ *len);
++ res = -EINVAL;
++ goto done;
++ }
++
++ req_version->version = IP_SET_PROTOCOL_VERSION;
++ res = copy_to_user(user, req_version,
++ sizeof(struct ip_set_req_version));
++ goto done;
++ }
++ case IP_SET_OP_GET_BYNAME: {
++ struct ip_set_req_get_set *req_get
++ = (struct ip_set_req_get_set *) data;
++
++ if (*len != sizeof(struct ip_set_req_get_set)) {
++ ip_set_printk("invalid GET_BYNAME (want %zu, got %d)",
++ sizeof(struct ip_set_req_get_set), *len);
++ res = -EINVAL;
++ goto done;
++ }
++ req_get->set.name[IP_SET_MAXNAMELEN - 1] = '\0';
++ index = ip_set_find_byname(req_get->set.name);
++ req_get->set.index = index;
++ goto copy;
++ }
++ case IP_SET_OP_GET_BYINDEX: {
++ struct ip_set_req_get_set *req_get
++ = (struct ip_set_req_get_set *) data;
++
++ if (*len != sizeof(struct ip_set_req_get_set)) {
++ ip_set_printk("invalid GET_BYINDEX (want %zu, got %d)",
++ sizeof(struct ip_set_req_get_set), *len);
++ res = -EINVAL;
++ goto done;
++ }
++ req_get->set.name[IP_SET_MAXNAMELEN - 1] = '\0';
++ index = ip_set_find_byindex(req_get->set.index);
++ strncpy(req_get->set.name,
++ index == IP_SET_INVALID_ID ? ""
++ : ip_set_list[index]->name, IP_SET_MAXNAMELEN);
++ goto copy;
++ }
++ case IP_SET_OP_ADT_GET: {
++ struct ip_set_req_adt_get *req_get
++ = (struct ip_set_req_adt_get *) data;
++
++ if (*len != sizeof(struct ip_set_req_adt_get)) {
++ ip_set_printk("invalid ADT_GET (want %zu, got %d)",
++ sizeof(struct ip_set_req_adt_get), *len);
++ res = -EINVAL;
++ goto done;
++ }
++ req_get->set.name[IP_SET_MAXNAMELEN - 1] = '\0';
++ index = ip_set_find_byname(req_get->set.name);
++ if (index != IP_SET_INVALID_ID) {
++ req_get->set.index = index;
++ strncpy(req_get->typename,
++ ip_set_list[index]->type->typename,
++ IP_SET_MAXNAMELEN - 1);
++ } else {
++ res = -ENOENT;
++ goto done;
++ }
++ goto copy;
++ }
++ case IP_SET_OP_MAX_SETS: {
++ struct ip_set_req_max_sets *req_max_sets
++ = (struct ip_set_req_max_sets *) data;
++ ip_set_id_t i;
++
++ if (*len != sizeof(struct ip_set_req_max_sets)) {
++ ip_set_printk("invalid MAX_SETS (want %zu, got %d)",
++ sizeof(struct ip_set_req_max_sets), *len);
++ res = -EINVAL;
++ goto done;
++ }
++
++ if (strcmp(req_max_sets->set.name, IPSET_TOKEN_ALL) == 0) {
++ req_max_sets->set.index = IP_SET_INVALID_ID;
++ } else {
++ req_max_sets->set.name[IP_SET_MAXNAMELEN - 1] = '\0';
++ req_max_sets->set.index =
++ ip_set_find_byname(req_max_sets->set.name);
++ if (req_max_sets->set.index == IP_SET_INVALID_ID) {
++ res = -ENOENT;
++ goto done;
++ }
++ }
++ req_max_sets->max_sets = ip_set_max;
++ req_max_sets->sets = 0;
++ for (i = 0; i < ip_set_max; i++) {
++ if (ip_set_list[i] != NULL)
++ req_max_sets->sets++;
++ }
++ goto copy;
++ }
++ case IP_SET_OP_LIST_SIZE:
++ case IP_SET_OP_SAVE_SIZE: {
++ struct ip_set_req_setnames *req_setnames
++ = (struct ip_set_req_setnames *) data;
++ struct ip_set_name_list *name_list;
++ struct ip_set *set;
++ ip_set_id_t i;
++ int used;
++
++ if (*len < sizeof(struct ip_set_req_setnames)) {
++ ip_set_printk("short LIST_SIZE (want >=%zu, got %d)",
++ sizeof(struct ip_set_req_setnames), *len);
++ res = -EINVAL;
++ goto done;
++ }
++
++ req_setnames->size = 0;
++ used = sizeof(struct ip_set_req_setnames);
++ for (i = 0; i < ip_set_max; i++) {
++ if (ip_set_list[i] == NULL)
++ continue;
++ name_list = (struct ip_set_name_list *)
++ (data + used);
++ used += sizeof(struct ip_set_name_list);
++ if (used > copylen) {
++ res = -EAGAIN;
++ goto done;
++ }
++ set = ip_set_list[i];
++ /* Fill in index, name, etc. */
++ name_list->index = i;
++ name_list->id = set->id;
++ strncpy(name_list->name,
++ set->name,
++ IP_SET_MAXNAMELEN - 1);
++ strncpy(name_list->typename,
++ set->type->typename,
++ IP_SET_MAXNAMELEN - 1);
++ DP("filled %s of type %s, index %u\n",
++ name_list->name, name_list->typename,
++ name_list->index);
++ if (!(req_setnames->index == IP_SET_INVALID_ID
++ || req_setnames->index == i))
++ continue;
++ /* Update size */
++ switch (*op) {
++ case IP_SET_OP_LIST_SIZE: {
++ req_setnames->size += sizeof(struct ip_set_list)
++ + set->type->header_size
++ + set->type->list_members_size(set);
++ FOREACH_HASH_DO(__set_hash_bindings_size_list,
++ i, &req_setnames->size);
++ break;
++ }
++ case IP_SET_OP_SAVE_SIZE: {
++ req_setnames->size += sizeof(struct ip_set_save)
++ + set->type->header_size
++ + set->type->list_members_size(set);
++ FOREACH_HASH_DO(__set_hash_bindings_size_save,
++ i, &req_setnames->size);
++ break;
++ }
++ default:
++ break;
++ }
++ }
++ if (copylen != used) {
++ res = -EAGAIN;
++ goto done;
++ }
++ goto copy;
++ }
++ case IP_SET_OP_LIST: {
++ struct ip_set_req_list *req_list
++ = (struct ip_set_req_list *) data;
++ ip_set_id_t i;
++ int used;
++
++ if (*len < sizeof(struct ip_set_req_list)) {
++ ip_set_printk("short LIST (want >=%zu, got %d)",
++ sizeof(struct ip_set_req_list), *len);
++ res = -EINVAL;
++ goto done;
++ }
++ index = req_list->index;
++ if (index != IP_SET_INVALID_ID
++ && ip_set_find_byindex(index) != index) {
++ res = -ENOENT;
++ goto done;
++ }
++ used = 0;
++ if (index == IP_SET_INVALID_ID) {
++ /* List all sets */
++ for (i = 0; i < ip_set_max && res == 0; i++) {
++ if (ip_set_list[i] != NULL)
++ res = ip_set_list_set(i, data, &used, *len);
++ }
++ } else {
++ /* List an individual set */
++ res = ip_set_list_set(index, data, &used, *len);
++ }
++ if (res != 0)
++ goto done;
++ else if (copylen != used) {
++ res = -EAGAIN;
++ goto done;
++ }
++ goto copy;
++ }
++ case IP_SET_OP_SAVE: {
++ struct ip_set_req_list *req_save
++ = (struct ip_set_req_list *) data;
++ ip_set_id_t i;
++ int used;
++
++ if (*len < sizeof(struct ip_set_req_list)) {
++ ip_set_printk("short SAVE (want >=%zu, got %d)",
++ sizeof(struct ip_set_req_list), *len);
++ res = -EINVAL;
++ goto done;
++ }
++ index = req_save->index;
++ if (index != IP_SET_INVALID_ID
++ && ip_set_find_byindex(index) != index) {
++ res = -ENOENT;
++ goto done;
++ }
++ used = 0;
++ if (index == IP_SET_INVALID_ID) {
++ /* Save all sets */
++ for (i = 0; i < ip_set_max && res == 0; i++) {
++ if (ip_set_list[i] != NULL)
++ res = ip_set_save_set(i, data, &used, *len);
++ }
++ } else {
++ /* Save an individual set */
++ res = ip_set_save_set(index, data, &used, *len);
++ }
++ if (res == 0)
++ res = ip_set_save_bindings(index, data, &used, *len);
++
++ if (res != 0)
++ goto done;
++ else if (copylen != used) {
++ res = -EAGAIN;
++ goto done;
++ }
++ goto copy;
++ }
++ case IP_SET_OP_RESTORE: {
++ struct ip_set_req_setnames *req_restore
++ = (struct ip_set_req_setnames *) data;
++ int line;
++
++ if (*len < sizeof(struct ip_set_req_setnames)
++ || *len != req_restore->size) {
++ ip_set_printk("invalid RESTORE (want =%zu, got %d)",
++ req_restore->size, *len);
++ res = -EINVAL;
++ goto done;
++ }
++ line = ip_set_restore(data + sizeof(struct ip_set_req_setnames),
++ req_restore->size - sizeof(struct ip_set_req_setnames));
++ DP("ip_set_restore: %u", line);
++ if (line != 0) {
++ res = -EAGAIN;
++ req_restore->size = line;
++ copylen = sizeof(struct ip_set_req_setnames);
++ goto copy;
++ }
++ goto done;
++ }
++ default:
++ res = -EBADMSG;
++ goto done;
++ } /* end of switch(op) */
++
++ copy:
++ DP("set %s, copylen %u", index != IP_SET_INVALID_ID
++ && ip_set_list[index]
++ ? ip_set_list[index]->name
++ : ":all:", copylen);
++ if (res == 0)
++ res = copy_to_user(user, data, copylen);
++ else
++ copy_to_user(user, data, copylen);
++
++ done:
++ up(&ip_set_app_mutex);
++ vfree(data);
++ if (res > 0)
++ res = 0;
++ DP("final result %d", res);
++ return res;
++}
++
++static struct nf_sockopt_ops so_set = {
++ .pf = PF_INET,
++ .set_optmin = SO_IP_SET,
++ .set_optmax = SO_IP_SET + 1,
++ .set = &ip_set_sockfn_set,
++ .get_optmin = SO_IP_SET,
++ .get_optmax = SO_IP_SET + 1,
++ .get = &ip_set_sockfn_get,
++ .use = 0
++};
++
++static int max_sets, hash_size;
++module_param(max_sets, int, 0600);
++MODULE_PARM_DESC(max_sets, "maximal number of sets");
++module_param(hash_size, int, 0600);
++MODULE_PARM_DESC(hash_size, "hash size for bindings");
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>");
++MODULE_DESCRIPTION("module implementing core IP set support");
++
++static int __init init(void)
++{
++ int res;
++ ip_set_id_t i;
++
++ get_random_bytes(&ip_set_hash_random, 4);
++ if (max_sets)
++ ip_set_max = max_sets;
++ ip_set_list = vmalloc(sizeof(struct ip_set *) * ip_set_max);
++ if (!ip_set_list) {
++ printk(KERN_ERR "Unable to create ip_set_list\n");
++ return -ENOMEM;
++ }
++ memset(ip_set_list, 0, sizeof(struct ip_set *) * ip_set_max);
++ if (hash_size)
++ ip_set_bindings_hash_size = hash_size;
++ ip_set_hash = vmalloc(sizeof(struct list_head) * ip_set_bindings_hash_size);
++ if (!ip_set_hash) {
++ printk(KERN_ERR "Unable to create ip_set_hash\n");
++ vfree(ip_set_list);
++ return -ENOMEM;
++ }
++ for (i = 0; i < ip_set_bindings_hash_size; i++)
++ INIT_LIST_HEAD(&ip_set_hash[i]);
++
++ INIT_LIST_HEAD(&set_type_list);
++
++ res = nf_register_sockopt(&so_set);
++ if (res != 0) {
++ ip_set_printk("SO_SET registry failed: %d", res);
++ vfree(ip_set_list);
++ vfree(ip_set_hash);
++ return res;
++ }
++ return 0;
++}
++
++static void __exit fini(void)
++{
++ /* There can't be any existing set or binding */
++ nf_unregister_sockopt(&so_set);
++ vfree(ip_set_list);
++ vfree(ip_set_hash);
++ DP("these are the famous last words");
++}
++
++EXPORT_SYMBOL(ip_set_register_set_type);
++EXPORT_SYMBOL(ip_set_unregister_set_type);
++
++EXPORT_SYMBOL(ip_set_get_byname);
++EXPORT_SYMBOL(ip_set_get_byindex);
++EXPORT_SYMBOL(ip_set_put);
++
++EXPORT_SYMBOL(ip_set_addip_kernel);
++EXPORT_SYMBOL(ip_set_delip_kernel);
++EXPORT_SYMBOL(ip_set_testip_kernel);
++
++module_init(init);
++module_exit(fini);
+diff -urN linux-2.6.19.old/net/ipv4/netfilter/ip_set_iphash.c linux-2.6.19.dev/net/ipv4/netfilter/ip_set_iphash.c
+--- linux-2.6.19.old/net/ipv4/netfilter/ip_set_iphash.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/netfilter/ip_set_iphash.c 2006-12-14 03:13:43.000000000 +0100
+@@ -0,0 +1,379 @@
++/* Copyright (C) 2003-2004 Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++/* Kernel module implementing an ip hash set */
++
++#include <linux/module.h>
++#include <linux/ip.h>
++#include <linux/skbuff.h>
++#include <linux/netfilter_ipv4/ip_tables.h>
++#include <linux/netfilter_ipv4/ip_set.h>
++#include <linux/errno.h>
++#include <asm/uaccess.h>
++#include <asm/bitops.h>
++#include <linux/spinlock.h>
++#include <linux/vmalloc.h>
++#include <linux/random.h>
++
++#include <net/ip.h>
++
++#include <linux/netfilter_ipv4/ip_set_malloc.h>
++#include <linux/netfilter_ipv4/ip_set_iphash.h>
++#include <linux/netfilter_ipv4/ip_set_jhash.h>
++#include <linux/netfilter_ipv4/ip_set_prime.h>
++
++static inline __u32
++jhash_ip(const struct ip_set_iphash *map, ip_set_ip_t ip)
++{
++ return jhash_1word(ip, map->initval);
++}
++
++static inline __u32
++randhash_ip(const struct ip_set_iphash *map, ip_set_ip_t ip)
++{
++ return (1 + ip % map->prime);
++}
++
++static inline __u32
++hash_id(struct ip_set *set, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
++{
++ struct ip_set_iphash *map = (struct ip_set_iphash *) set->data;
++ __u32 jhash, randhash, id;
++ u_int16_t i;
++
++ *hash_ip = ip & map->netmask;
++ jhash = jhash_ip(map, *hash_ip);
++ randhash = randhash_ip(map, *hash_ip);
++ DP("set: %s, ip:%u.%u.%u.%u, %u.%u.%u.%u, %u.%u.%u.%u",
++ set->name, HIPQUAD(ip), HIPQUAD(*hash_ip), HIPQUAD(map->netmask));
++
++ for (i = 0; i < map->probes; i++) {
++ id = (jhash + i * randhash) % map->hashsize;
++ DP("hash key: %u", id);
++ if (map->members[id] == *hash_ip)
++ return id;
++ /* No shortcut at testing - there can be deleted
++ * entries. */
++ }
++ return UINT_MAX;
++}
++
++static inline int
++__testip(struct ip_set *set, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
++{
++ return (hash_id(set, ip, hash_ip) != UINT_MAX);
++}
++
++static int
++testip(struct ip_set *set, const void *data, size_t size,
++ ip_set_ip_t *hash_ip)
++{
++ struct ip_set_req_iphash *req =
++ (struct ip_set_req_iphash *) data;
++
++ if (size != sizeof(struct ip_set_req_iphash)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_iphash),
++ size);
++ return -EINVAL;
++ }
++ return __testip(set, req->ip, hash_ip);
++}
++
++static int
++testip_kernel(struct ip_set *set, const struct sk_buff *skb,
++ u_int32_t flags, ip_set_ip_t *hash_ip)
++{
++ return __testip(set,
++ ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
++ : skb->nh.iph->daddr),
++ hash_ip);
++}
++
++static inline int
++__addip(struct ip_set_iphash *map, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
++{
++ __u32 jhash, randhash, probe;
++ u_int16_t i;
++
++ *hash_ip = ip & map->netmask;
++ jhash = jhash_ip(map, *hash_ip);
++ randhash = randhash_ip(map, *hash_ip);
++
++ for (i = 0; i < map->probes; i++) {
++ probe = (jhash + i * randhash) % map->hashsize;
++ if (map->members[probe] == *hash_ip)
++ return -EEXIST;
++ if (!map->members[probe]) {
++ map->members[probe] = *hash_ip;
++ return 0;
++ }
++ }
++ /* Trigger rehashing */
++ return -EAGAIN;
++}
++
++static int
++addip(struct ip_set *set, const void *data, size_t size,
++ ip_set_ip_t *hash_ip)
++{
++ struct ip_set_req_iphash *req =
++ (struct ip_set_req_iphash *) data;
++
++ if (size != sizeof(struct ip_set_req_iphash)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_iphash),
++ size);
++ return -EINVAL;
++ }
++ return __addip((struct ip_set_iphash *) set->data, req->ip, hash_ip);
++}
++
++static int
++addip_kernel(struct ip_set *set, const struct sk_buff *skb,
++ u_int32_t flags, ip_set_ip_t *hash_ip)
++{
++ return __addip((struct ip_set_iphash *) set->data,
++ ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
++ : skb->nh.iph->daddr),
++ hash_ip);
++}
++
++static int retry(struct ip_set *set)
++{
++ struct ip_set_iphash *map = (struct ip_set_iphash *) set->data;
++ ip_set_ip_t hash_ip, *members;
++ u_int32_t i, hashsize;
++ unsigned newbytes;
++ int res;
++ struct ip_set_iphash tmp = {
++ .hashsize = map->hashsize,
++ .probes = map->probes,
++ .resize = map->resize,
++ .netmask = map->netmask,
++ };
++
++ if (map->resize == 0)
++ return -ERANGE;
++
++ again:
++ res = 0;
++
++ /* Calculate new parameters */
++ get_random_bytes(&tmp.initval, 4);
++ hashsize = tmp.hashsize + (tmp.hashsize * map->resize)/100;
++ if (hashsize == tmp.hashsize)
++ hashsize++;
++ tmp.prime = make_prime(hashsize);
++
++ ip_set_printk("rehashing of set %s triggered: "
++ "hashsize grows from %u to %u",
++ set->name, tmp.hashsize, hashsize);
++ tmp.hashsize = hashsize;
++
++ newbytes = hashsize * sizeof(ip_set_ip_t);
++ tmp.members = ip_set_malloc_atomic(newbytes);
++ if (!tmp.members) {
++ DP("out of memory for %d bytes", newbytes);
++ return -ENOMEM;
++ }
++ memset(tmp.members, 0, newbytes);
++
++ write_lock_bh(&set->lock);
++ map = (struct ip_set_iphash *) set->data; /* Play safe */
++ for (i = 0; i < map->hashsize && res == 0; i++) {
++ if (map->members[i])
++ res = __addip(&tmp, map->members[i], &hash_ip);
++ }
++ if (res) {
++ /* Failure, try again */
++ write_unlock_bh(&set->lock);
++ ip_set_free(tmp.members, newbytes);
++ goto again;
++ }
++
++ /* Success at resizing! */
++ members = map->members;
++ hashsize = map->hashsize;
++
++ map->initval = tmp.initval;
++ map->prime = tmp.prime;
++ map->hashsize = tmp.hashsize;
++ map->members = tmp.members;
++ write_unlock_bh(&set->lock);
++
++ ip_set_free(members, hashsize * sizeof(ip_set_ip_t));
++
++ return 0;
++}
++
++static inline int
++__delip(struct ip_set *set, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
++{
++ struct ip_set_iphash *map = (struct ip_set_iphash *) set->data;
++ ip_set_ip_t id = hash_id(set, ip, hash_ip);
++
++ if (id == UINT_MAX)
++ return -EEXIST;
++
++ map->members[id] = 0;
++ return 0;
++}
++
++static int
++delip(struct ip_set *set, const void *data, size_t size,
++ ip_set_ip_t *hash_ip)
++{
++ struct ip_set_req_iphash *req =
++ (struct ip_set_req_iphash *) data;
++
++ if (size != sizeof(struct ip_set_req_iphash)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_iphash),
++ size);
++ return -EINVAL;
++ }
++ return __delip(set, req->ip, hash_ip);
++}
++
++static int
++delip_kernel(struct ip_set *set, const struct sk_buff *skb,
++ u_int32_t flags, ip_set_ip_t *hash_ip)
++{
++ return __delip(set,
++ ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
++ : skb->nh.iph->daddr),
++ hash_ip);
++}
++
++static int create(struct ip_set *set, const void *data, size_t size)
++{
++ unsigned newbytes;
++ struct ip_set_req_iphash_create *req =
++ (struct ip_set_req_iphash_create *) data;
++ struct ip_set_iphash *map;
++
++ if (size != sizeof(struct ip_set_req_iphash_create)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_iphash_create),
++ size);
++ return -EINVAL;
++ }
++
++ if (req->hashsize < 1) {
++ ip_set_printk("hashsize too small");
++ return -ENOEXEC;
++ }
++
++ map = kmalloc(sizeof(struct ip_set_iphash), GFP_KERNEL);
++ if (!map) {
++ DP("out of memory for %d bytes",
++ sizeof(struct ip_set_iphash));
++ return -ENOMEM;
++ }
++ get_random_bytes(&map->initval, 4);
++ map->prime = make_prime(req->hashsize);
++ map->hashsize = req->hashsize;
++ map->probes = req->probes;
++ map->resize = req->resize;
++ map->netmask = req->netmask;
++ newbytes = map->hashsize * sizeof(ip_set_ip_t);
++ map->members = ip_set_malloc(newbytes);
++ if (!map->members) {
++ DP("out of memory for %d bytes", newbytes);
++ kfree(map);
++ return -ENOMEM;
++ }
++ memset(map->members, 0, newbytes);
++
++ set->data = map;
++ return 0;
++}
++
++static void destroy(struct ip_set *set)
++{
++ struct ip_set_iphash *map = (struct ip_set_iphash *) set->data;
++
++ ip_set_free(map->members, map->hashsize * sizeof(ip_set_ip_t));
++ kfree(map);
++
++ set->data = NULL;
++}
++
++static void flush(struct ip_set *set)
++{
++ struct ip_set_iphash *map = (struct ip_set_iphash *) set->data;
++ memset(map->members, 0, map->hashsize * sizeof(ip_set_ip_t));
++}
++
++static void list_header(const struct ip_set *set, void *data)
++{
++ struct ip_set_iphash *map = (struct ip_set_iphash *) set->data;
++ struct ip_set_req_iphash_create *header =
++ (struct ip_set_req_iphash_create *) data;
++
++ header->hashsize = map->hashsize;
++ header->probes = map->probes;
++ header->resize = map->resize;
++ header->netmask = map->netmask;
++}
++
++static int list_members_size(const struct ip_set *set)
++{
++ struct ip_set_iphash *map = (struct ip_set_iphash *) set->data;
++
++ return (map->hashsize * sizeof(ip_set_ip_t));
++}
++
++static void list_members(const struct ip_set *set, void *data)
++{
++ struct ip_set_iphash *map = (struct ip_set_iphash *) set->data;
++ int bytes = map->hashsize * sizeof(ip_set_ip_t);
++
++ memcpy(data, map->members, bytes);
++}
++
++static struct ip_set_type ip_set_iphash = {
++ .typename = SETTYPE_NAME,
++ .typecode = IPSET_TYPE_IP,
++ .protocol_version = IP_SET_PROTOCOL_VERSION,
++ .create = &create,
++ .destroy = &destroy,
++ .flush = &flush,
++ .reqsize = sizeof(struct ip_set_req_iphash),
++ .addip = &addip,
++ .addip_kernel = &addip_kernel,
++ .retry = &retry,
++ .delip = &delip,
++ .delip_kernel = &delip_kernel,
++ .testip = &testip,
++ .testip_kernel = &testip_kernel,
++ .header_size = sizeof(struct ip_set_req_iphash_create),
++ .list_header = &list_header,
++ .list_members_size = &list_members_size,
++ .list_members = &list_members,
++ .me = THIS_MODULE,
++};
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>");
++MODULE_DESCRIPTION("iphash type of IP sets");
++
++static int __init init(void)
++{
++ init_max_malloc_size();
++ return ip_set_register_set_type(&ip_set_iphash);
++}
++
++static void __exit fini(void)
++{
++ /* FIXME: possible race with ip_set_create() */
++ ip_set_unregister_set_type(&ip_set_iphash);
++}
++
++module_init(init);
++module_exit(fini);
+diff -urN linux-2.6.19.old/net/ipv4/netfilter/ip_set_ipmap.c linux-2.6.19.dev/net/ipv4/netfilter/ip_set_ipmap.c
+--- linux-2.6.19.old/net/ipv4/netfilter/ip_set_ipmap.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/netfilter/ip_set_ipmap.c 2006-12-14 03:13:43.000000000 +0100
+@@ -0,0 +1,313 @@
++/* Copyright (C) 2000-2002 Joakim Axelsson <gozem@linux.nu>
++ * Patrick Schaaf <bof@bof.de>
++ * Copyright (C) 2003-2004 Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++/* Kernel module implementing an IP set type: the single bitmap type */
++
++#include <linux/module.h>
++#include <linux/ip.h>
++#include <linux/skbuff.h>
++#include <linux/netfilter_ipv4/ip_tables.h>
++#include <linux/netfilter_ipv4/ip_set.h>
++#include <linux/errno.h>
++#include <asm/uaccess.h>
++#include <asm/bitops.h>
++#include <linux/spinlock.h>
++
++#include <linux/netfilter_ipv4/ip_set_ipmap.h>
++
++static inline ip_set_ip_t
++ip_to_id(const struct ip_set_ipmap *map, ip_set_ip_t ip)
++{
++ return (ip - map->first_ip)/map->hosts;
++}
++
++static inline int
++__testip(struct ip_set *set, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
++{
++ struct ip_set_ipmap *map = (struct ip_set_ipmap *) set->data;
++
++ if (ip < map->first_ip || ip > map->last_ip)
++ return -ERANGE;
++
++ *hash_ip = ip & map->netmask;
++ DP("set: %s, ip:%u.%u.%u.%u, %u.%u.%u.%u",
++ set->name, HIPQUAD(ip), HIPQUAD(*hash_ip));
++ return !!test_bit(ip_to_id(map, *hash_ip), map->members);
++}
++
++static int
++testip(struct ip_set *set, const void *data, size_t size,
++ ip_set_ip_t *hash_ip)
++{
++ struct ip_set_req_ipmap *req =
++ (struct ip_set_req_ipmap *) data;
++
++ if (size != sizeof(struct ip_set_req_ipmap)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_ipmap),
++ size);
++ return -EINVAL;
++ }
++ return __testip(set, req->ip, hash_ip);
++}
++
++static int
++testip_kernel(struct ip_set *set,
++ const struct sk_buff *skb,
++ u_int32_t flags,
++ ip_set_ip_t *hash_ip)
++{
++ int res;
++
++ DP("flag: %s src: %u.%u.%u.%u dst: %u.%u.%u.%u",
++ flags & IPSET_SRC ? "SRC" : "DST",
++ NIPQUAD(skb->nh.iph->saddr),
++ NIPQUAD(skb->nh.iph->daddr));
++
++ res = __testip(set,
++ ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
++ : skb->nh.iph->daddr),
++ hash_ip);
++ return (res < 0 ? 0 : res);
++}
++
++static inline int
++__addip(struct ip_set *set, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
++{
++ struct ip_set_ipmap *map = (struct ip_set_ipmap *) set->data;
++
++ if (ip < map->first_ip || ip > map->last_ip)
++ return -ERANGE;
++
++ *hash_ip = ip & map->netmask;
++ DP("%u.%u.%u.%u, %u.%u.%u.%u", HIPQUAD(ip), HIPQUAD(*hash_ip));
++ if (test_and_set_bit(ip_to_id(map, *hash_ip), map->members))
++ return -EEXIST;
++
++ return 0;
++}
++
++static int
++addip(struct ip_set *set, const void *data, size_t size,
++ ip_set_ip_t *hash_ip)
++{
++ struct ip_set_req_ipmap *req =
++ (struct ip_set_req_ipmap *) data;
++
++ if (size != sizeof(struct ip_set_req_ipmap)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_ipmap),
++ size);
++ return -EINVAL;
++ }
++ DP("%u.%u.%u.%u", HIPQUAD(req->ip));
++ return __addip(set, req->ip, hash_ip);
++}
++
++static int
++addip_kernel(struct ip_set *set, const struct sk_buff *skb,
++ u_int32_t flags, ip_set_ip_t *hash_ip)
++{
++ return __addip(set,
++ ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
++ : skb->nh.iph->daddr),
++ hash_ip);
++}
++
++static inline int
++__delip(struct ip_set *set, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
++{
++ struct ip_set_ipmap *map = (struct ip_set_ipmap *) set->data;
++
++ if (ip < map->first_ip || ip > map->last_ip)
++ return -ERANGE;
++
++ *hash_ip = ip & map->netmask;
++ DP("%u.%u.%u.%u, %u.%u.%u.%u", HIPQUAD(ip), HIPQUAD(*hash_ip));
++ if (!test_and_clear_bit(ip_to_id(map, *hash_ip), map->members))
++ return -EEXIST;
++
++ return 0;
++}
++
++static int
++delip(struct ip_set *set, const void *data, size_t size,
++ ip_set_ip_t *hash_ip)
++{
++ struct ip_set_req_ipmap *req =
++ (struct ip_set_req_ipmap *) data;
++
++ if (size != sizeof(struct ip_set_req_ipmap)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_ipmap),
++ size);
++ return -EINVAL;
++ }
++ return __delip(set, req->ip, hash_ip);
++}
++
++static int
++delip_kernel(struct ip_set *set, const struct sk_buff *skb,
++ u_int32_t flags, ip_set_ip_t *hash_ip)
++{
++ return __delip(set,
++ ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
++ : skb->nh.iph->daddr),
++ hash_ip);
++}
++
++static int create(struct ip_set *set, const void *data, size_t size)
++{
++ int newbytes;
++ struct ip_set_req_ipmap_create *req =
++ (struct ip_set_req_ipmap_create *) data;
++ struct ip_set_ipmap *map;
++
++ if (size != sizeof(struct ip_set_req_ipmap_create)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_ipmap_create),
++ size);
++ return -EINVAL;
++ }
++
++ DP("from %u.%u.%u.%u to %u.%u.%u.%u",
++ HIPQUAD(req->from), HIPQUAD(req->to));
++
++ if (req->from > req->to) {
++ DP("bad ip range");
++ return -ENOEXEC;
++ }
++
++ if (req->to - req->from > MAX_RANGE) {
++ ip_set_printk("range too big (max %d addresses)",
++ MAX_RANGE);
++ return -ENOEXEC;
++ }
++
++ map = kmalloc(sizeof(struct ip_set_ipmap), GFP_KERNEL);
++ if (!map) {
++ DP("out of memory for %d bytes",
++ sizeof(struct ip_set_ipmap));
++ return -ENOMEM;
++ }
++ map->first_ip = req->from;
++ map->last_ip = req->to;
++ map->netmask = req->netmask;
++
++ if (req->netmask == 0xFFFFFFFF) {
++ map->hosts = 1;
++ map->sizeid = map->last_ip - map->first_ip + 1;
++ } else {
++ unsigned int mask_bits, netmask_bits;
++ ip_set_ip_t mask;
++
++ map->first_ip &= map->netmask; /* Should we better bark? */
++
++ mask = range_to_mask(map->first_ip, map->last_ip, &mask_bits);
++ netmask_bits = mask_to_bits(map->netmask);
++
++ if (!mask || netmask_bits <= mask_bits)
++ return -ENOEXEC;
++
++ map->hosts = 2 << (32 - netmask_bits - 1);
++ map->sizeid = 2 << (netmask_bits - mask_bits - 1);
++ }
++ newbytes = bitmap_bytes(0, map->sizeid - 1);
++ map->members = kmalloc(newbytes, GFP_KERNEL);
++ if (!map->members) {
++ DP("out of memory for %d bytes", newbytes);
++ kfree(map);
++ return -ENOMEM;
++ }
++ memset(map->members, 0, newbytes);
++
++ set->data = map;
++ return 0;
++}
++
++static void destroy(struct ip_set *set)
++{
++ struct ip_set_ipmap *map = (struct ip_set_ipmap *) set->data;
++
++ kfree(map->members);
++ kfree(map);
++
++ set->data = NULL;
++}
++
++static void flush(struct ip_set *set)
++{
++ struct ip_set_ipmap *map = (struct ip_set_ipmap *) set->data;
++ memset(map->members, 0, bitmap_bytes(0, map->sizeid - 1));
++}
++
++static void list_header(const struct ip_set *set, void *data)
++{
++ struct ip_set_ipmap *map = (struct ip_set_ipmap *) set->data;
++ struct ip_set_req_ipmap_create *header =
++ (struct ip_set_req_ipmap_create *) data;
++
++ header->from = map->first_ip;
++ header->to = map->last_ip;
++ header->netmask = map->netmask;
++}
++
++static int list_members_size(const struct ip_set *set)
++{
++ struct ip_set_ipmap *map = (struct ip_set_ipmap *) set->data;
++
++ return bitmap_bytes(0, map->sizeid - 1);
++}
++
++static void list_members(const struct ip_set *set, void *data)
++{
++ struct ip_set_ipmap *map = (struct ip_set_ipmap *) set->data;
++ int bytes = bitmap_bytes(0, map->sizeid - 1);
++
++ memcpy(data, map->members, bytes);
++}
++
++static struct ip_set_type ip_set_ipmap = {
++ .typename = SETTYPE_NAME,
++ .typecode = IPSET_TYPE_IP,
++ .protocol_version = IP_SET_PROTOCOL_VERSION,
++ .create = &create,
++ .destroy = &destroy,
++ .flush = &flush,
++ .reqsize = sizeof(struct ip_set_req_ipmap),
++ .addip = &addip,
++ .addip_kernel = &addip_kernel,
++ .delip = &delip,
++ .delip_kernel = &delip_kernel,
++ .testip = &testip,
++ .testip_kernel = &testip_kernel,
++ .header_size = sizeof(struct ip_set_req_ipmap_create),
++ .list_header = &list_header,
++ .list_members_size = &list_members_size,
++ .list_members = &list_members,
++ .me = THIS_MODULE,
++};
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>");
++MODULE_DESCRIPTION("ipmap type of IP sets");
++
++static int __init init(void)
++{
++ return ip_set_register_set_type(&ip_set_ipmap);
++}
++
++static void __exit fini(void)
++{
++ /* FIXME: possible race with ip_set_create() */
++ ip_set_unregister_set_type(&ip_set_ipmap);
++}
++
++module_init(init);
++module_exit(fini);
+diff -urN linux-2.6.19.old/net/ipv4/netfilter/ip_set_iptree.c linux-2.6.19.dev/net/ipv4/netfilter/ip_set_iptree.c
+--- linux-2.6.19.old/net/ipv4/netfilter/ip_set_iptree.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/netfilter/ip_set_iptree.c 2006-12-14 03:13:43.000000000 +0100
+@@ -0,0 +1,510 @@
++/* Copyright (C) 2005 Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++/* Kernel module implementing an IP set type: the iptree type */
++
++#include <linux/module.h>
++#include <linux/ip.h>
++#include <linux/skbuff.h>
++#include <linux/slab.h>
++#include <linux/delay.h>
++#include <linux/netfilter_ipv4/ip_tables.h>
++#include <linux/netfilter_ipv4/ip_set.h>
++#include <linux/errno.h>
++#include <asm/uaccess.h>
++#include <asm/bitops.h>
++#include <linux/spinlock.h>
++
++#include <linux/netfilter_ipv4/ip_set_iptree.h>
++
++/* Garbage collection interval in seconds: */
++#define IPTREE_GC_TIME 5*60
++/* Sleep so many milliseconds before trying again
++ * to delete the gc timer at destroying a set */
++#define IPTREE_DESTROY_SLEEP 100
++
++static kmem_cache_t *branch_cachep;
++static kmem_cache_t *leaf_cachep;
++
++#define ABCD(a,b,c,d,addrp) do { \
++ a = ((unsigned char *)addrp)[3]; \
++ b = ((unsigned char *)addrp)[2]; \
++ c = ((unsigned char *)addrp)[1]; \
++ d = ((unsigned char *)addrp)[0]; \
++} while (0)
++
++#define TESTIP_WALK(map, elem, branch) do { \
++ if ((map)->tree[elem]) { \
++ branch = (map)->tree[elem]; \
++ } else \
++ return 0; \
++} while (0)
++
++static inline int
++__testip(struct ip_set *set, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
++{
++ struct ip_set_iptree *map = (struct ip_set_iptree *) set->data;
++ struct ip_set_iptreeb *btree;
++ struct ip_set_iptreec *ctree;
++ struct ip_set_iptreed *dtree;
++ unsigned char a,b,c,d;
++
++ *hash_ip = ip;
++ ABCD(a, b, c, d, hash_ip);
++ DP("%u %u %u %u timeout %u", a, b, c, d, map->timeout);
++ TESTIP_WALK(map, a, btree);
++ TESTIP_WALK(btree, b, ctree);
++ TESTIP_WALK(ctree, c, dtree);
++ DP("%lu %lu", dtree->expires[d], jiffies);
++ return !!(map->timeout ? (time_after(dtree->expires[d], jiffies))
++ : dtree->expires[d]);
++}
++
++static int
++testip(struct ip_set *set, const void *data, size_t size,
++ ip_set_ip_t *hash_ip)
++{
++ struct ip_set_req_iptree *req =
++ (struct ip_set_req_iptree *) data;
++
++ if (size != sizeof(struct ip_set_req_iptree)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_iptree),
++ size);
++ return -EINVAL;
++ }
++ return __testip(set, req->ip, hash_ip);
++}
++
++static int
++testip_kernel(struct ip_set *set,
++ const struct sk_buff *skb,
++ u_int32_t flags,
++ ip_set_ip_t *hash_ip)
++{
++ int res;
++
++ DP("flag: %s src: %u.%u.%u.%u dst: %u.%u.%u.%u",
++ flags & IPSET_SRC ? "SRC" : "DST",
++ NIPQUAD(skb->nh.iph->saddr),
++ NIPQUAD(skb->nh.iph->daddr));
++
++ res = __testip(set,
++ ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
++ : skb->nh.iph->daddr),
++ hash_ip);
++ return (res < 0 ? 0 : res);
++}
++
++#define ADDIP_WALK(map, elem, branch, type, cachep) do { \
++ if ((map)->tree[elem]) { \
++ DP("found %u", elem); \
++ branch = (map)->tree[elem]; \
++ } else { \
++ branch = (type *) \
++ kmem_cache_alloc(cachep, GFP_KERNEL); \
++ if (branch == NULL) \
++ return -ENOMEM; \
++ memset(branch, 0, sizeof(*branch)); \
++ (map)->tree[elem] = branch; \
++ DP("alloc %u", elem); \
++ } \
++} while (0)
++
++static inline int
++__addip(struct ip_set *set, ip_set_ip_t ip, unsigned int timeout,
++ ip_set_ip_t *hash_ip)
++{
++ struct ip_set_iptree *map = (struct ip_set_iptree *) set->data;
++ struct ip_set_iptreeb *btree;
++ struct ip_set_iptreec *ctree;
++ struct ip_set_iptreed *dtree;
++ unsigned char a,b,c,d;
++ int ret = 0;
++
++ *hash_ip = ip;
++ ABCD(a, b, c, d, hash_ip);
++ DP("%u %u %u %u timeout %u", a, b, c, d, timeout);
++ ADDIP_WALK(map, a, btree, struct ip_set_iptreeb, branch_cachep);
++ ADDIP_WALK(btree, b, ctree, struct ip_set_iptreec, branch_cachep);
++ ADDIP_WALK(ctree, c, dtree, struct ip_set_iptreed, leaf_cachep);
++ if (dtree->expires[d]
++ && (!map->timeout || time_after(dtree->expires[d], jiffies)))
++ ret = -EEXIST;
++ dtree->expires[d] = map->timeout ? (timeout * HZ + jiffies) : 1;
++ DP("%u %lu", d, dtree->expires[d]);
++ return ret;
++}
++
++static int
++addip(struct ip_set *set, const void *data, size_t size,
++ ip_set_ip_t *hash_ip)
++{
++ struct ip_set_iptree *map = (struct ip_set_iptree *) set->data;
++ struct ip_set_req_iptree *req =
++ (struct ip_set_req_iptree *) data;
++
++ if (size != sizeof(struct ip_set_req_iptree)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_iptree),
++ size);
++ return -EINVAL;
++ }
++ DP("%u.%u.%u.%u %u", HIPQUAD(req->ip), req->timeout);
++ return __addip(set, req->ip,
++ req->timeout ? req->timeout : map->timeout,
++ hash_ip);
++}
++
++static int
++addip_kernel(struct ip_set *set, const struct sk_buff *skb,
++ u_int32_t flags, ip_set_ip_t *hash_ip)
++{
++ struct ip_set_iptree *map = (struct ip_set_iptree *) set->data;
++
++ return __addip(set,
++ ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
++ : skb->nh.iph->daddr),
++ map->timeout,
++ hash_ip);
++}
++
++#define DELIP_WALK(map, elem, branch) do { \
++ if ((map)->tree[elem]) { \
++ branch = (map)->tree[elem]; \
++ } else \
++ return -EEXIST; \
++} while (0)
++
++static inline int
++__delip(struct ip_set *set, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
++{
++ struct ip_set_iptree *map = (struct ip_set_iptree *) set->data;
++ struct ip_set_iptreeb *btree;
++ struct ip_set_iptreec *ctree;
++ struct ip_set_iptreed *dtree;
++ unsigned char a,b,c,d;
++
++ *hash_ip = ip;
++ ABCD(a, b, c, d, hash_ip);
++ DELIP_WALK(map, a, btree);
++ DELIP_WALK(btree, b, ctree);
++ DELIP_WALK(ctree, c, dtree);
++
++ if (dtree->expires[d]) {
++ dtree->expires[d] = 0;
++ return 0;
++ }
++ return -EEXIST;
++}
++
++static int
++delip(struct ip_set *set, const void *data, size_t size,
++ ip_set_ip_t *hash_ip)
++{
++ struct ip_set_req_iptree *req =
++ (struct ip_set_req_iptree *) data;
++
++ if (size != sizeof(struct ip_set_req_iptree)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_iptree),
++ size);
++ return -EINVAL;
++ }
++ return __delip(set, req->ip, hash_ip);
++}
++
++static int
++delip_kernel(struct ip_set *set, const struct sk_buff *skb,
++ u_int32_t flags, ip_set_ip_t *hash_ip)
++{
++ return __delip(set,
++ ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
++ : skb->nh.iph->daddr),
++ hash_ip);
++}
++
++#define LOOP_WALK_BEGIN(map, i, branch) \
++ for (i = 0; i < 255; i++) { \
++ if (!(map)->tree[i]) \
++ continue; \
++ branch = (map)->tree[i]
++
++#define LOOP_WALK_END }
++
++static void ip_tree_gc(unsigned long ul_set)
++{
++ struct ip_set *set = (void *) ul_set;
++ struct ip_set_iptree *map = (struct ip_set_iptree *) set->data;
++ struct ip_set_iptreeb *btree;
++ struct ip_set_iptreec *ctree;
++ struct ip_set_iptreed *dtree;
++ unsigned char a,b,c,d;
++ unsigned char i,j,k;
++
++ i = j = k = 0;
++ DP("gc: %s", set->name);
++ write_lock_bh(&set->lock);
++ LOOP_WALK_BEGIN(map, a, btree);
++ LOOP_WALK_BEGIN(btree, b, ctree);
++ LOOP_WALK_BEGIN(ctree, c, dtree);
++ for (d = 0; d < 255; d++) {
++ if (dtree->expires[d]) {
++ DP("gc: %u %u %u %u: expires %lu jiffies %lu",
++ a, b, c, d,
++ dtree->expires[d], jiffies);
++ if (map->timeout
++ && time_before(dtree->expires[d], jiffies))
++ dtree->expires[d] = 0;
++ else
++ k = 1;
++ }
++ }
++ if (k == 0) {
++ DP("gc: %s: leaf %u %u %u empty",
++ set->name, a, b, c);
++ kmem_cache_free(leaf_cachep, dtree);
++ ctree->tree[c] = NULL;
++ } else {
++ DP("gc: %s: leaf %u %u %u not empty",
++ set->name, a, b, c);
++ j = 1;
++ k = 0;
++ }
++ LOOP_WALK_END;
++ if (j == 0) {
++ DP("gc: %s: branch %u %u empty",
++ set->name, a, b);
++ kmem_cache_free(branch_cachep, ctree);
++ btree->tree[b] = NULL;
++ } else {
++ DP("gc: %s: branch %u %u not empty",
++ set->name, a, b);
++ i = 1;
++ j = k = 0;
++ }
++ LOOP_WALK_END;
++ if (i == 0) {
++ DP("gc: %s: branch %u empty",
++ set->name, a);
++ kmem_cache_free(branch_cachep, btree);
++ map->tree[a] = NULL;
++ } else {
++ DP("gc: %s: branch %u not empty",
++ set->name, a);
++ i = j = k = 0;
++ }
++ LOOP_WALK_END;
++ write_unlock_bh(&set->lock);
++
++ map->gc.expires = jiffies + map->gc_interval * HZ;
++ add_timer(&map->gc);
++}
++
++static int create(struct ip_set *set, const void *data, size_t size)
++{
++ struct ip_set_req_iptree_create *req =
++ (struct ip_set_req_iptree_create *) data;
++ struct ip_set_iptree *map;
++
++ if (size != sizeof(struct ip_set_req_iptree_create)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_iptree_create),
++ size);
++ return -EINVAL;
++ }
++
++ map = kmalloc(sizeof(struct ip_set_iptree), GFP_KERNEL);
++ if (!map) {
++ DP("out of memory for %d bytes",
++ sizeof(struct ip_set_iptree));
++ return -ENOMEM;
++ }
++ memset(map, 0, sizeof(*map));
++ map->timeout = req->timeout;
++ set->data = map;
++
++ /* If there is no timeout for the entries,
++ * we still have to call gc because delete
++ * do not clean up empty branches */
++ map->gc_interval = IPTREE_GC_TIME;
++ init_timer(&map->gc);
++ map->gc.data = (unsigned long) set;
++ map->gc.function = ip_tree_gc;
++ map->gc.expires = jiffies + map->gc_interval * HZ;
++ add_timer(&map->gc);
++
++ return 0;
++}
++
++static void __flush(struct ip_set_iptree *map)
++{
++ struct ip_set_iptreeb *btree;
++ struct ip_set_iptreec *ctree;
++ struct ip_set_iptreed *dtree;
++ unsigned int a,b,c;
++
++ LOOP_WALK_BEGIN(map, a, btree);
++ LOOP_WALK_BEGIN(btree, b, ctree);
++ LOOP_WALK_BEGIN(ctree, c, dtree);
++ kmem_cache_free(leaf_cachep, dtree);
++ LOOP_WALK_END;
++ kmem_cache_free(branch_cachep, ctree);
++ LOOP_WALK_END;
++ kmem_cache_free(branch_cachep, btree);
++ LOOP_WALK_END;
++}
++
++static void destroy(struct ip_set *set)
++{
++ struct ip_set_iptree *map = (struct ip_set_iptree *) set->data;
++
++ while (!del_timer(&map->gc))
++ msleep(IPTREE_DESTROY_SLEEP);
++ __flush(map);
++ kfree(map);
++ set->data = NULL;
++}
++
++static void flush(struct ip_set *set)
++{
++ struct ip_set_iptree *map = (struct ip_set_iptree *) set->data;
++ unsigned int timeout = map->timeout;
++
++ __flush(map);
++ memset(map, 0, sizeof(*map));
++ map->timeout = timeout;
++}
++
++static void list_header(const struct ip_set *set, void *data)
++{
++ struct ip_set_iptree *map = (struct ip_set_iptree *) set->data;
++ struct ip_set_req_iptree_create *header =
++ (struct ip_set_req_iptree_create *) data;
++
++ header->timeout = map->timeout;
++}
++
++static int list_members_size(const struct ip_set *set)
++{
++ struct ip_set_iptree *map = (struct ip_set_iptree *) set->data;
++ struct ip_set_iptreeb *btree;
++ struct ip_set_iptreec *ctree;
++ struct ip_set_iptreed *dtree;
++ unsigned char a,b,c,d;
++ unsigned int count = 0;
++
++ LOOP_WALK_BEGIN(map, a, btree);
++ LOOP_WALK_BEGIN(btree, b, ctree);
++ LOOP_WALK_BEGIN(ctree, c, dtree);
++ for (d = 0; d < 255; d++) {
++ if (dtree->expires[d]
++ && (!map->timeout || time_after(dtree->expires[d], jiffies)))
++ count++;
++ }
++ LOOP_WALK_END;
++ LOOP_WALK_END;
++ LOOP_WALK_END;
++
++ DP("members %u", count);
++ return (count * sizeof(struct ip_set_req_iptree));
++}
++
++static void list_members(const struct ip_set *set, void *data)
++{
++ struct ip_set_iptree *map = (struct ip_set_iptree *) set->data;
++ struct ip_set_iptreeb *btree;
++ struct ip_set_iptreec *ctree;
++ struct ip_set_iptreed *dtree;
++ unsigned char a,b,c,d;
++ size_t offset = 0;
++ struct ip_set_req_iptree *entry;
++
++ LOOP_WALK_BEGIN(map, a, btree);
++ LOOP_WALK_BEGIN(btree, b, ctree);
++ LOOP_WALK_BEGIN(ctree, c, dtree);
++ for (d = 0; d < 255; d++) {
++ if (dtree->expires[d]
++ && (!map->timeout || time_after(dtree->expires[d], jiffies))) {
++ entry = (struct ip_set_req_iptree *)(data + offset);
++ entry->ip = ((a << 24) | (b << 16) | (c << 8) | d);
++ entry->timeout = !map->timeout ? 0
++ : (dtree->expires[d] - jiffies)/HZ;
++ offset += sizeof(struct ip_set_req_iptree);
++ }
++ }
++ LOOP_WALK_END;
++ LOOP_WALK_END;
++ LOOP_WALK_END;
++}
++
++static struct ip_set_type ip_set_iptree = {
++ .typename = SETTYPE_NAME,
++ .typecode = IPSET_TYPE_IP,
++ .protocol_version = IP_SET_PROTOCOL_VERSION,
++ .create = &create,
++ .destroy = &destroy,
++ .flush = &flush,
++ .reqsize = sizeof(struct ip_set_req_iptree),
++ .addip = &addip,
++ .addip_kernel = &addip_kernel,
++ .delip = &delip,
++ .delip_kernel = &delip_kernel,
++ .testip = &testip,
++ .testip_kernel = &testip_kernel,
++ .header_size = sizeof(struct ip_set_req_iptree_create),
++ .list_header = &list_header,
++ .list_members_size = &list_members_size,
++ .list_members = &list_members,
++ .me = THIS_MODULE,
++};
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>");
++MODULE_DESCRIPTION("iptree type of IP sets");
++
++static int __init init(void)
++{
++ int ret;
++
++ branch_cachep = kmem_cache_create("ip_set_iptreeb",
++ sizeof(struct ip_set_iptreeb),
++ 0, 0, NULL, NULL);
++ if (!branch_cachep) {
++ printk(KERN_ERR "Unable to create ip_set_iptreeb slab cache\n");
++ ret = -ENOMEM;
++ goto out;
++ }
++ leaf_cachep = kmem_cache_create("ip_set_iptreed",
++ sizeof(struct ip_set_iptreed),
++ 0, 0, NULL, NULL);
++ if (!leaf_cachep) {
++ printk(KERN_ERR "Unable to create ip_set_iptreed slab cache\n");
++ ret = -ENOMEM;
++ goto free_branch;
++ }
++ ret = ip_set_register_set_type(&ip_set_iptree);
++ if (ret == 0)
++ goto out;
++
++ kmem_cache_destroy(leaf_cachep);
++ free_branch:
++ kmem_cache_destroy(branch_cachep);
++ out:
++ return ret;
++}
++
++static void __exit fini(void)
++{
++ /* FIXME: possible race with ip_set_create() */
++ ip_set_unregister_set_type(&ip_set_iptree);
++ kmem_cache_destroy(leaf_cachep);
++ kmem_cache_destroy(branch_cachep);
++}
++
++module_init(init);
++module_exit(fini);
+diff -urN linux-2.6.19.old/net/ipv4/netfilter/ip_set_macipmap.c linux-2.6.19.dev/net/ipv4/netfilter/ip_set_macipmap.c
+--- linux-2.6.19.old/net/ipv4/netfilter/ip_set_macipmap.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/netfilter/ip_set_macipmap.c 2006-12-14 03:13:43.000000000 +0100
+@@ -0,0 +1,338 @@
++/* Copyright (C) 2000-2002 Joakim Axelsson <gozem@linux.nu>
++ * Patrick Schaaf <bof@bof.de>
++ * Martin Josefsson <gandalf@wlug.westbo.se>
++ * Copyright (C) 2003-2004 Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++/* Kernel module implementing an IP set type: the macipmap type */
++
++#include <linux/module.h>
++#include <linux/ip.h>
++#include <linux/skbuff.h>
++#include <linux/netfilter_ipv4/ip_tables.h>
++#include <linux/netfilter_ipv4/ip_set.h>
++#include <linux/errno.h>
++#include <asm/uaccess.h>
++#include <asm/bitops.h>
++#include <linux/spinlock.h>
++#include <linux/if_ether.h>
++#include <linux/vmalloc.h>
++
++#include <linux/netfilter_ipv4/ip_set_malloc.h>
++#include <linux/netfilter_ipv4/ip_set_macipmap.h>
++
++static int
++testip(struct ip_set *set, const void *data, size_t size, ip_set_ip_t *hash_ip)
++{
++ struct ip_set_macipmap *map = (struct ip_set_macipmap *) set->data;
++ struct ip_set_macip *table = (struct ip_set_macip *) map->members;
++ struct ip_set_req_macipmap *req = (struct ip_set_req_macipmap *) data;
++
++ if (size != sizeof(struct ip_set_req_macipmap)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_macipmap),
++ size);
++ return -EINVAL;
++ }
++
++ if (req->ip < map->first_ip || req->ip > map->last_ip)
++ return -ERANGE;
++
++ *hash_ip = req->ip;
++ DP("set: %s, ip:%u.%u.%u.%u, %u.%u.%u.%u",
++ set->name, HIPQUAD(req->ip), HIPQUAD(*hash_ip));
++ if (test_bit(IPSET_MACIP_ISSET,
++ (void *) &table[req->ip - map->first_ip].flags)) {
++ return (memcmp(req->ethernet,
++ &table[req->ip - map->first_ip].ethernet,
++ ETH_ALEN) == 0);
++ } else {
++ return (map->flags & IPSET_MACIP_MATCHUNSET ? 1 : 0);
++ }
++}
++
++static int
++testip_kernel(struct ip_set *set, const struct sk_buff *skb,
++ u_int32_t flags, ip_set_ip_t *hash_ip)
++{
++ struct ip_set_macipmap *map =
++ (struct ip_set_macipmap *) set->data;
++ struct ip_set_macip *table =
++ (struct ip_set_macip *) map->members;
++ ip_set_ip_t ip;
++
++ ip = ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
++ : skb->nh.iph->daddr);
++ DP("flag: %s src: %u.%u.%u.%u dst: %u.%u.%u.%u",
++ flags & IPSET_SRC ? "SRC" : "DST",
++ NIPQUAD(skb->nh.iph->saddr),
++ NIPQUAD(skb->nh.iph->daddr));
++
++ if (ip < map->first_ip || ip > map->last_ip)
++ return 0;
++
++ *hash_ip = ip;
++ DP("set: %s, ip:%u.%u.%u.%u, %u.%u.%u.%u",
++ set->name, HIPQUAD(ip), HIPQUAD(*hash_ip));
++ if (test_bit(IPSET_MACIP_ISSET,
++ (void *) &table[ip - map->first_ip].flags)) {
++ /* Is mac pointer valid?
++ * If so, compare... */
++ return (skb->mac.raw >= skb->head
++ && (skb->mac.raw + ETH_HLEN) <= skb->data
++ && (memcmp(eth_hdr(skb)->h_source,
++ &table[ip - map->first_ip].ethernet,
++ ETH_ALEN) == 0));
++ } else {
++ return (map->flags & IPSET_MACIP_MATCHUNSET ? 1 : 0);
++ }
++}
++
++/* returns 0 on success */
++static inline int
++__addip(struct ip_set *set,
++ ip_set_ip_t ip, unsigned char *ethernet, ip_set_ip_t *hash_ip)
++{
++ struct ip_set_macipmap *map =
++ (struct ip_set_macipmap *) set->data;
++ struct ip_set_macip *table =
++ (struct ip_set_macip *) map->members;
++
++ if (ip < map->first_ip || ip > map->last_ip)
++ return -ERANGE;
++ if (test_and_set_bit(IPSET_MACIP_ISSET,
++ (void *) &table[ip - map->first_ip].flags))
++ return -EEXIST;
++
++ *hash_ip = ip;
++ DP("%u.%u.%u.%u, %u.%u.%u.%u", HIPQUAD(ip), HIPQUAD(*hash_ip));
++ memcpy(&table[ip - map->first_ip].ethernet, ethernet, ETH_ALEN);
++ return 0;
++}
++
++static int
++addip(struct ip_set *set, const void *data, size_t size,
++ ip_set_ip_t *hash_ip)
++{
++ struct ip_set_req_macipmap *req =
++ (struct ip_set_req_macipmap *) data;
++
++ if (size != sizeof(struct ip_set_req_macipmap)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_macipmap),
++ size);
++ return -EINVAL;
++ }
++ return __addip(set, req->ip, req->ethernet, hash_ip);
++}
++
++static int
++addip_kernel(struct ip_set *set, const struct sk_buff *skb,
++ u_int32_t flags, ip_set_ip_t *hash_ip)
++{
++ ip_set_ip_t ip;
++
++ ip = ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
++ : skb->nh.iph->daddr);
++
++ if (!(skb->mac.raw >= skb->head
++ && (skb->mac.raw + ETH_HLEN) <= skb->data))
++ return -EINVAL;
++
++ return __addip(set, ip, eth_hdr(skb)->h_source, hash_ip);
++}
++
++static inline int
++__delip(struct ip_set *set, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
++{
++ struct ip_set_macipmap *map =
++ (struct ip_set_macipmap *) set->data;
++ struct ip_set_macip *table =
++ (struct ip_set_macip *) map->members;
++
++ if (ip < map->first_ip || ip > map->last_ip)
++ return -ERANGE;
++ if (!test_and_clear_bit(IPSET_MACIP_ISSET,
++ (void *)&table[ip - map->first_ip].flags))
++ return -EEXIST;
++
++ *hash_ip = ip;
++ DP("%u.%u.%u.%u, %u.%u.%u.%u", HIPQUAD(ip), HIPQUAD(*hash_ip));
++ return 0;
++}
++
++static int
++delip(struct ip_set *set, const void *data, size_t size,
++ ip_set_ip_t *hash_ip)
++{
++ struct ip_set_req_macipmap *req =
++ (struct ip_set_req_macipmap *) data;
++
++ if (size != sizeof(struct ip_set_req_macipmap)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_macipmap),
++ size);
++ return -EINVAL;
++ }
++ return __delip(set, req->ip, hash_ip);
++}
++
++static int
++delip_kernel(struct ip_set *set, const struct sk_buff *skb,
++ u_int32_t flags, ip_set_ip_t *hash_ip)
++{
++ return __delip(set,
++ ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
++ : skb->nh.iph->daddr),
++ hash_ip);
++}
++
++static inline size_t members_size(ip_set_id_t from, ip_set_id_t to)
++{
++ return (size_t)((to - from + 1) * sizeof(struct ip_set_macip));
++}
++
++static int create(struct ip_set *set, const void *data, size_t size)
++{
++ int newbytes;
++ struct ip_set_req_macipmap_create *req =
++ (struct ip_set_req_macipmap_create *) data;
++ struct ip_set_macipmap *map;
++
++ if (size != sizeof(struct ip_set_req_macipmap_create)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_macipmap_create),
++ size);
++ return -EINVAL;
++ }
++
++ DP("from %u.%u.%u.%u to %u.%u.%u.%u",
++ HIPQUAD(req->from), HIPQUAD(req->to));
++
++ if (req->from > req->to) {
++ DP("bad ip range");
++ return -ENOEXEC;
++ }
++
++ if (req->to - req->from > MAX_RANGE) {
++ ip_set_printk("range too big (max %d addresses)",
++ MAX_RANGE);
++ return -ENOEXEC;
++ }
++
++ map = kmalloc(sizeof(struct ip_set_macipmap), GFP_KERNEL);
++ if (!map) {
++ DP("out of memory for %d bytes",
++ sizeof(struct ip_set_macipmap));
++ return -ENOMEM;
++ }
++ map->flags = req->flags;
++ map->first_ip = req->from;
++ map->last_ip = req->to;
++ newbytes = members_size(map->first_ip, map->last_ip);
++ map->members = ip_set_malloc(newbytes);
++ if (!map->members) {
++ DP("out of memory for %d bytes", newbytes);
++ kfree(map);
++ return -ENOMEM;
++ }
++ memset(map->members, 0, newbytes);
++
++ set->data = map;
++ return 0;
++}
++
++static void destroy(struct ip_set *set)
++{
++ struct ip_set_macipmap *map =
++ (struct ip_set_macipmap *) set->data;
++
++ ip_set_free(map->members, members_size(map->first_ip, map->last_ip));
++ kfree(map);
++
++ set->data = NULL;
++}
++
++static void flush(struct ip_set *set)
++{
++ struct ip_set_macipmap *map =
++ (struct ip_set_macipmap *) set->data;
++ memset(map->members, 0, members_size(map->first_ip, map->last_ip));
++}
++
++static void list_header(const struct ip_set *set, void *data)
++{
++ struct ip_set_macipmap *map =
++ (struct ip_set_macipmap *) set->data;
++ struct ip_set_req_macipmap_create *header =
++ (struct ip_set_req_macipmap_create *) data;
++
++ DP("list_header %x %x %u", map->first_ip, map->last_ip,
++ map->flags);
++
++ header->from = map->first_ip;
++ header->to = map->last_ip;
++ header->flags = map->flags;
++}
++
++static int list_members_size(const struct ip_set *set)
++{
++ struct ip_set_macipmap *map =
++ (struct ip_set_macipmap *) set->data;
++
++ return members_size(map->first_ip, map->last_ip);
++}
++
++static void list_members(const struct ip_set *set, void *data)
++{
++ struct ip_set_macipmap *map =
++ (struct ip_set_macipmap *) set->data;
++
++ int bytes = members_size(map->first_ip, map->last_ip);
++
++ memcpy(data, map->members, bytes);
++}
++
++static struct ip_set_type ip_set_macipmap = {
++ .typename = SETTYPE_NAME,
++ .typecode = IPSET_TYPE_IP,
++ .protocol_version = IP_SET_PROTOCOL_VERSION,
++ .create = &create,
++ .destroy = &destroy,
++ .flush = &flush,
++ .reqsize = sizeof(struct ip_set_req_macipmap),
++ .addip = &addip,
++ .addip_kernel = &addip_kernel,
++ .delip = &delip,
++ .delip_kernel = &delip_kernel,
++ .testip = &testip,
++ .testip_kernel = &testip_kernel,
++ .header_size = sizeof(struct ip_set_req_macipmap_create),
++ .list_header = &list_header,
++ .list_members_size = &list_members_size,
++ .list_members = &list_members,
++ .me = THIS_MODULE,
++};
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>");
++MODULE_DESCRIPTION("macipmap type of IP sets");
++
++static int __init init(void)
++{
++ init_max_malloc_size();
++ return ip_set_register_set_type(&ip_set_macipmap);
++}
++
++static void __exit fini(void)
++{
++ /* FIXME: possible race with ip_set_create() */
++ ip_set_unregister_set_type(&ip_set_macipmap);
++}
++
++module_init(init);
++module_exit(fini);
+diff -urN linux-2.6.19.old/net/ipv4/netfilter/ip_set_nethash.c linux-2.6.19.dev/net/ipv4/netfilter/ip_set_nethash.c
+--- linux-2.6.19.old/net/ipv4/netfilter/ip_set_nethash.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/netfilter/ip_set_nethash.c 2006-12-14 03:13:43.000000000 +0100
+@@ -0,0 +1,449 @@
++/* Copyright (C) 2003-2004 Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++/* Kernel module implementing a cidr nethash set */
++
++#include <linux/module.h>
++#include <linux/ip.h>
++#include <linux/skbuff.h>
++#include <linux/netfilter_ipv4/ip_tables.h>
++#include <linux/netfilter_ipv4/ip_set.h>
++#include <linux/errno.h>
++#include <asm/uaccess.h>
++#include <asm/bitops.h>
++#include <linux/spinlock.h>
++#include <linux/vmalloc.h>
++#include <linux/random.h>
++
++#include <net/ip.h>
++
++#include <linux/netfilter_ipv4/ip_set_malloc.h>
++#include <linux/netfilter_ipv4/ip_set_nethash.h>
++#include <linux/netfilter_ipv4/ip_set_jhash.h>
++#include <linux/netfilter_ipv4/ip_set_prime.h>
++
++static inline __u32
++jhash_ip(const struct ip_set_nethash *map, ip_set_ip_t ip)
++{
++ return jhash_1word(ip, map->initval);
++}
++
++static inline __u32
++randhash_ip(const struct ip_set_nethash *map, ip_set_ip_t ip)
++{
++ return (1 + ip % map->prime);
++}
++
++static inline __u32
++hash_id_cidr(struct ip_set_nethash *map,
++ ip_set_ip_t ip,
++ unsigned char cidr,
++ ip_set_ip_t *hash_ip)
++{
++ __u32 jhash, randhash, id;
++ u_int16_t i;
++
++ *hash_ip = pack(ip, cidr);
++ jhash = jhash_ip(map, *hash_ip);
++ randhash = randhash_ip(map, *hash_ip);
++
++ for (i = 0; i < map->probes; i++) {
++ id = (jhash + i * randhash) % map->hashsize;
++ DP("hash key: %u", id);
++ if (map->members[id] == *hash_ip)
++ return id;
++ }
++ return UINT_MAX;
++}
++
++static inline __u32
++hash_id(struct ip_set *set, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
++{
++ struct ip_set_nethash *map = (struct ip_set_nethash *) set->data;
++ __u32 id = UINT_MAX;
++ int i;
++
++ for (i = 0; i < 30 && map->cidr[i]; i++) {
++ id = hash_id_cidr(map, ip, map->cidr[i], hash_ip);
++ if (id != UINT_MAX)
++ break;
++ }
++ return id;
++}
++
++static inline int
++__testip_cidr(struct ip_set *set, ip_set_ip_t ip, unsigned char cidr,
++ ip_set_ip_t *hash_ip)
++{
++ struct ip_set_nethash *map = (struct ip_set_nethash *) set->data;
++
++ return (hash_id_cidr(map, ip, cidr, hash_ip) != UINT_MAX);
++}
++
++static inline int
++__testip(struct ip_set *set, ip_set_ip_t ip, ip_set_ip_t *hash_ip)
++{
++ return (hash_id(set, ip, hash_ip) != UINT_MAX);
++}
++
++static int
++testip(struct ip_set *set, const void *data, size_t size,
++ ip_set_ip_t *hash_ip)
++{
++ struct ip_set_req_nethash *req =
++ (struct ip_set_req_nethash *) data;
++
++ if (size != sizeof(struct ip_set_req_nethash)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_nethash),
++ size);
++ return -EINVAL;
++ }
++ return (req->cidr == 32 ? __testip(set, req->ip, hash_ip)
++ : __testip_cidr(set, req->ip, req->cidr, hash_ip));
++}
++
++static int
++testip_kernel(struct ip_set *set, const struct sk_buff *skb,
++ u_int32_t flags, ip_set_ip_t *hash_ip)
++{
++ return __testip(set,
++ ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
++ : skb->nh.iph->daddr),
++ hash_ip);
++}
++
++static inline int
++__addip_base(struct ip_set_nethash *map, ip_set_ip_t ip)
++{
++ __u32 jhash, randhash, probe;
++ u_int16_t i;
++
++ jhash = jhash_ip(map, ip);
++ randhash = randhash_ip(map, ip);
++
++ for (i = 0; i < map->probes; i++) {
++ probe = (jhash + i * randhash) % map->hashsize;
++ if (map->members[probe] == ip)
++ return -EEXIST;
++ if (!map->members[probe]) {
++ map->members[probe] = ip;
++ return 0;
++ }
++ }
++ /* Trigger rehashing */
++ return -EAGAIN;
++}
++
++static inline int
++__addip(struct ip_set_nethash *map, ip_set_ip_t ip, unsigned char cidr,
++ ip_set_ip_t *hash_ip)
++{
++ *hash_ip = pack(ip, cidr);
++ DP("%u.%u.%u.%u/%u, %u.%u.%u.%u", HIPQUAD(ip), cidr, HIPQUAD(*hash_ip));
++
++ return __addip_base(map, *hash_ip);
++}
++
++static void
++update_cidr_sizes(struct ip_set_nethash *map, unsigned char cidr)
++{
++ unsigned char next;
++ int i;
++
++ for (i = 0; i < 30 && map->cidr[i]; i++) {
++ if (map->cidr[i] == cidr) {
++ return;
++ } else if (map->cidr[i] < cidr) {
++ next = map->cidr[i];
++ map->cidr[i] = cidr;
++ cidr = next;
++ }
++ }
++ if (i < 30)
++ map->cidr[i] = cidr;
++}
++
++static int
++addip(struct ip_set *set, const void *data, size_t size,
++ ip_set_ip_t *hash_ip)
++{
++ struct ip_set_req_nethash *req =
++ (struct ip_set_req_nethash *) data;
++ int ret;
++
++ if (size != sizeof(struct ip_set_req_nethash)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_nethash),
++ size);
++ return -EINVAL;
++ }
++ ret = __addip((struct ip_set_nethash *) set->data,
++ req->ip, req->cidr, hash_ip);
++
++ if (ret == 0)
++ update_cidr_sizes((struct ip_set_nethash *) set->data,
++ req->cidr);
++
++ return ret;
++}
++
++static int
++addip_kernel(struct ip_set *set, const struct sk_buff *skb,
++ u_int32_t flags, ip_set_ip_t *hash_ip)
++{
++ struct ip_set_nethash *map = (struct ip_set_nethash *) set->data;
++ int ret = -ERANGE;
++ ip_set_ip_t ip = ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
++ : skb->nh.iph->daddr);
++
++ if (map->cidr[0])
++ ret = __addip(map, ip, map->cidr[0], hash_ip);
++
++ return ret;
++}
++
++static int retry(struct ip_set *set)
++{
++ struct ip_set_nethash *map = (struct ip_set_nethash *) set->data;
++ ip_set_ip_t *members;
++ u_int32_t i, hashsize;
++ unsigned newbytes;
++ int res;
++ struct ip_set_nethash tmp = {
++ .hashsize = map->hashsize,
++ .probes = map->probes,
++ .resize = map->resize
++ };
++
++ if (map->resize == 0)
++ return -ERANGE;
++
++ memcpy(tmp.cidr, map->cidr, 30 * sizeof(unsigned char));
++ again:
++ res = 0;
++
++ /* Calculate new parameters */
++ get_random_bytes(&tmp.initval, 4);
++ hashsize = tmp.hashsize + (tmp.hashsize * map->resize)/100;
++ if (hashsize == tmp.hashsize)
++ hashsize++;
++ tmp.prime = make_prime(hashsize);
++
++ ip_set_printk("rehashing of set %s triggered: "
++ "hashsize grows from %u to %u",
++ set->name, tmp.hashsize, hashsize);
++ tmp.hashsize = hashsize;
++
++ newbytes = hashsize * sizeof(ip_set_ip_t);
++ tmp.members = ip_set_malloc_atomic(newbytes);
++ if (!tmp.members) {
++ DP("out of memory for %d bytes", newbytes);
++ return -ENOMEM;
++ }
++ memset(tmp.members, 0, newbytes);
++
++ write_lock_bh(&set->lock);
++ map = (struct ip_set_nethash *) set->data; /* Play safe */
++ for (i = 0; i < map->hashsize && res == 0; i++) {
++ if (map->members[i])
++ res = __addip_base(&tmp, map->members[i]);
++ }
++ if (res) {
++ /* Failure, try again */
++ write_unlock_bh(&set->lock);
++ ip_set_free(tmp.members, newbytes);
++ goto again;
++ }
++
++ /* Success at resizing! */
++ members = map->members;
++ hashsize = map->hashsize;
++
++ map->initval = tmp.initval;
++ map->prime = tmp.prime;
++ map->hashsize = tmp.hashsize;
++ map->members = tmp.members;
++ write_unlock_bh(&set->lock);
++
++ ip_set_free(members, hashsize * sizeof(ip_set_ip_t));
++
++ return 0;
++}
++
++static inline int
++__delip(struct ip_set_nethash *map, ip_set_ip_t ip, unsigned char cidr,
++ ip_set_ip_t *hash_ip)
++{
++ ip_set_ip_t id = hash_id_cidr(map, ip, cidr, hash_ip);
++
++ if (id == UINT_MAX)
++ return -EEXIST;
++
++ map->members[id] = 0;
++ return 0;
++}
++
++static int
++delip(struct ip_set *set, const void *data, size_t size,
++ ip_set_ip_t *hash_ip)
++{
++ struct ip_set_req_nethash *req =
++ (struct ip_set_req_nethash *) data;
++
++ if (size != sizeof(struct ip_set_req_nethash)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_nethash),
++ size);
++ return -EINVAL;
++ }
++ /* TODO: no garbage collection in map->cidr */
++ return __delip((struct ip_set_nethash *) set->data,
++ req->ip, req->cidr, hash_ip);
++}
++
++static int
++delip_kernel(struct ip_set *set, const struct sk_buff *skb,
++ u_int32_t flags, ip_set_ip_t *hash_ip)
++{
++ struct ip_set_nethash *map = (struct ip_set_nethash *) set->data;
++ int ret = -ERANGE;
++ ip_set_ip_t ip = ntohl(flags & IPSET_SRC ? skb->nh.iph->saddr
++ : skb->nh.iph->daddr);
++
++ if (map->cidr[0])
++ ret = __delip(map, ip, map->cidr[0], hash_ip);
++
++ return ret;
++}
++
++static int create(struct ip_set *set, const void *data, size_t size)
++{
++ unsigned newbytes;
++ struct ip_set_req_nethash_create *req =
++ (struct ip_set_req_nethash_create *) data;
++ struct ip_set_nethash *map;
++
++ if (size != sizeof(struct ip_set_req_nethash_create)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_nethash_create),
++ size);
++ return -EINVAL;
++ }
++
++ if (req->hashsize < 1) {
++ ip_set_printk("hashsize too small");
++ return -ENOEXEC;
++ }
++
++ map = kmalloc(sizeof(struct ip_set_nethash), GFP_KERNEL);
++ if (!map) {
++ DP("out of memory for %d bytes",
++ sizeof(struct ip_set_nethash));
++ return -ENOMEM;
++ }
++ get_random_bytes(&map->initval, 4);
++ map->prime = make_prime(req->hashsize);
++ map->hashsize = req->hashsize;
++ map->probes = req->probes;
++ map->resize = req->resize;
++ memset(map->cidr, 0, 30 * sizeof(unsigned char));
++ newbytes = map->hashsize * sizeof(ip_set_ip_t);
++ map->members = ip_set_malloc(newbytes);
++ if (!map->members) {
++ DP("out of memory for %d bytes", newbytes);
++ kfree(map);
++ return -ENOMEM;
++ }
++ memset(map->members, 0, newbytes);
++
++ set->data = map;
++ return 0;
++}
++
++static void destroy(struct ip_set *set)
++{
++ struct ip_set_nethash *map = (struct ip_set_nethash *) set->data;
++
++ ip_set_free(map->members, map->hashsize * sizeof(ip_set_ip_t));
++ kfree(map);
++
++ set->data = NULL;
++}
++
++static void flush(struct ip_set *set)
++{
++ struct ip_set_nethash *map = (struct ip_set_nethash *) set->data;
++ memset(map->members, 0, map->hashsize * sizeof(ip_set_ip_t));
++ memset(map->cidr, 0, 30 * sizeof(unsigned char));
++}
++
++static void list_header(const struct ip_set *set, void *data)
++{
++ struct ip_set_nethash *map = (struct ip_set_nethash *) set->data;
++ struct ip_set_req_nethash_create *header =
++ (struct ip_set_req_nethash_create *) data;
++
++ header->hashsize = map->hashsize;
++ header->probes = map->probes;
++ header->resize = map->resize;
++}
++
++static int list_members_size(const struct ip_set *set)
++{
++ struct ip_set_nethash *map = (struct ip_set_nethash *) set->data;
++
++ return (map->hashsize * sizeof(ip_set_ip_t));
++}
++
++static void list_members(const struct ip_set *set, void *data)
++{
++ struct ip_set_nethash *map = (struct ip_set_nethash *) set->data;
++ int bytes = map->hashsize * sizeof(ip_set_ip_t);
++
++ memcpy(data, map->members, bytes);
++}
++
++static struct ip_set_type ip_set_nethash = {
++ .typename = SETTYPE_NAME,
++ .typecode = IPSET_TYPE_IP,
++ .protocol_version = IP_SET_PROTOCOL_VERSION,
++ .create = &create,
++ .destroy = &destroy,
++ .flush = &flush,
++ .reqsize = sizeof(struct ip_set_req_nethash),
++ .addip = &addip,
++ .addip_kernel = &addip_kernel,
++ .retry = &retry,
++ .delip = &delip,
++ .delip_kernel = &delip_kernel,
++ .testip = &testip,
++ .testip_kernel = &testip_kernel,
++ .header_size = sizeof(struct ip_set_req_nethash_create),
++ .list_header = &list_header,
++ .list_members_size = &list_members_size,
++ .list_members = &list_members,
++ .me = THIS_MODULE,
++};
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>");
++MODULE_DESCRIPTION("nethash type of IP sets");
++
++static int __init init(void)
++{
++ return ip_set_register_set_type(&ip_set_nethash);
++}
++
++static void __exit fini(void)
++{
++ /* FIXME: possible race with ip_set_create() */
++ ip_set_unregister_set_type(&ip_set_nethash);
++}
++
++module_init(init);
++module_exit(fini);
+diff -urN linux-2.6.19.old/net/ipv4/netfilter/ip_set_portmap.c linux-2.6.19.dev/net/ipv4/netfilter/ip_set_portmap.c
+--- linux-2.6.19.old/net/ipv4/netfilter/ip_set_portmap.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/netfilter/ip_set_portmap.c 2006-12-14 03:13:43.000000000 +0100
+@@ -0,0 +1,325 @@
++/* Copyright (C) 2003-2004 Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++/* Kernel module implementing a port set type as a bitmap */
++
++#include <linux/module.h>
++#include <linux/ip.h>
++#include <linux/tcp.h>
++#include <linux/udp.h>
++#include <linux/skbuff.h>
++#include <linux/netfilter_ipv4/ip_tables.h>
++#include <linux/netfilter_ipv4/ip_set.h>
++#include <linux/errno.h>
++#include <asm/uaccess.h>
++#include <asm/bitops.h>
++#include <linux/spinlock.h>
++
++#include <net/ip.h>
++
++#include <linux/netfilter_ipv4/ip_set_portmap.h>
++
++/* We must handle non-linear skbs */
++static inline ip_set_ip_t
++get_port(const struct sk_buff *skb, u_int32_t flags)
++{
++ struct iphdr *iph = skb->nh.iph;
++ u_int16_t offset = ntohs(iph->frag_off) & IP_OFFSET;
++
++ switch (iph->protocol) {
++ case IPPROTO_TCP: {
++ struct tcphdr tcph;
++
++ /* See comments at tcp_match in ip_tables.c */
++ if (offset)
++ return INVALID_PORT;
++
++ if (skb_copy_bits(skb, skb->nh.iph->ihl*4, &tcph, sizeof(tcph)) < 0)
++ /* No choice either */
++ return INVALID_PORT;
++
++ return ntohs(flags & IPSET_SRC ?
++ tcph.source : tcph.dest);
++ }
++ case IPPROTO_UDP: {
++ struct udphdr udph;
++
++ if (offset)
++ return INVALID_PORT;
++
++ if (skb_copy_bits(skb, skb->nh.iph->ihl*4, &udph, sizeof(udph)) < 0)
++ /* No choice either */
++ return INVALID_PORT;
++
++ return ntohs(flags & IPSET_SRC ?
++ udph.source : udph.dest);
++ }
++ default:
++ return INVALID_PORT;
++ }
++}
++
++static inline int
++__testport(struct ip_set *set, ip_set_ip_t port, ip_set_ip_t *hash_port)
++{
++ struct ip_set_portmap *map = (struct ip_set_portmap *) set->data;
++
++ if (port < map->first_port || port > map->last_port)
++ return -ERANGE;
++
++ *hash_port = port;
++ DP("set: %s, port:%u, %u", set->name, port, *hash_port);
++ return !!test_bit(port - map->first_port, map->members);
++}
++
++static int
++testport(struct ip_set *set, const void *data, size_t size,
++ ip_set_ip_t *hash_port)
++{
++ struct ip_set_req_portmap *req =
++ (struct ip_set_req_portmap *) data;
++
++ if (size != sizeof(struct ip_set_req_portmap)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_portmap),
++ size);
++ return -EINVAL;
++ }
++ return __testport(set, req->port, hash_port);
++}
++
++static int
++testport_kernel(struct ip_set *set, const struct sk_buff *skb,
++ u_int32_t flags, ip_set_ip_t *hash_port)
++{
++ int res;
++ ip_set_ip_t port = get_port(skb, flags);
++
++ DP("flag %s port %u", flags & IPSET_SRC ? "SRC" : "DST", port);
++ if (port == INVALID_PORT)
++ return 0;
++
++ res = __testport(set, port, hash_port);
++
++ return (res < 0 ? 0 : res);
++}
++
++static inline int
++__addport(struct ip_set *set, ip_set_ip_t port, ip_set_ip_t *hash_port)
++{
++ struct ip_set_portmap *map = (struct ip_set_portmap *) set->data;
++
++ if (port < map->first_port || port > map->last_port)
++ return -ERANGE;
++ if (test_and_set_bit(port - map->first_port, map->members))
++ return -EEXIST;
++
++ *hash_port = port;
++ DP("port %u", port);
++ return 0;
++}
++
++static int
++addport(struct ip_set *set, const void *data, size_t size,
++ ip_set_ip_t *hash_port)
++{
++ struct ip_set_req_portmap *req =
++ (struct ip_set_req_portmap *) data;
++
++ if (size != sizeof(struct ip_set_req_portmap)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_portmap),
++ size);
++ return -EINVAL;
++ }
++ return __addport(set, req->port, hash_port);
++}
++
++static int
++addport_kernel(struct ip_set *set, const struct sk_buff *skb,
++ u_int32_t flags, ip_set_ip_t *hash_port)
++{
++ ip_set_ip_t port = get_port(skb, flags);
++
++ if (port == INVALID_PORT)
++ return -EINVAL;
++
++ return __addport(set, port, hash_port);
++}
++
++static inline int
++__delport(struct ip_set *set, ip_set_ip_t port, ip_set_ip_t *hash_port)
++{
++ struct ip_set_portmap *map = (struct ip_set_portmap *) set->data;
++
++ if (port < map->first_port || port > map->last_port)
++ return -ERANGE;
++ if (!test_and_clear_bit(port - map->first_port, map->members))
++ return -EEXIST;
++
++ *hash_port = port;
++ DP("port %u", port);
++ return 0;
++}
++
++static int
++delport(struct ip_set *set, const void *data, size_t size,
++ ip_set_ip_t *hash_port)
++{
++ struct ip_set_req_portmap *req =
++ (struct ip_set_req_portmap *) data;
++
++ if (size != sizeof(struct ip_set_req_portmap)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_portmap),
++ size);
++ return -EINVAL;
++ }
++ return __delport(set, req->port, hash_port);
++}
++
++static int
++delport_kernel(struct ip_set *set, const struct sk_buff *skb,
++ u_int32_t flags, ip_set_ip_t *hash_port)
++{
++ ip_set_ip_t port = get_port(skb, flags);
++
++ if (port == INVALID_PORT)
++ return -EINVAL;
++
++ return __delport(set, port, hash_port);
++}
++
++static int create(struct ip_set *set, const void *data, size_t size)
++{
++ int newbytes;
++ struct ip_set_req_portmap_create *req =
++ (struct ip_set_req_portmap_create *) data;
++ struct ip_set_portmap *map;
++
++ if (size != sizeof(struct ip_set_req_portmap_create)) {
++ ip_set_printk("data length wrong (want %zu, have %zu)",
++ sizeof(struct ip_set_req_portmap_create),
++ size);
++ return -EINVAL;
++ }
++
++ DP("from %u to %u", req->from, req->to);
++
++ if (req->from > req->to) {
++ DP("bad port range");
++ return -ENOEXEC;
++ }
++
++ if (req->to - req->from > MAX_RANGE) {
++ ip_set_printk("range too big (max %d ports)",
++ MAX_RANGE);
++ return -ENOEXEC;
++ }
++
++ map = kmalloc(sizeof(struct ip_set_portmap), GFP_KERNEL);
++ if (!map) {
++ DP("out of memory for %d bytes",
++ sizeof(struct ip_set_portmap));
++ return -ENOMEM;
++ }
++ map->first_port = req->from;
++ map->last_port = req->to;
++ newbytes = bitmap_bytes(req->from, req->to);
++ map->members = kmalloc(newbytes, GFP_KERNEL);
++ if (!map->members) {
++ DP("out of memory for %d bytes", newbytes);
++ kfree(map);
++ return -ENOMEM;
++ }
++ memset(map->members, 0, newbytes);
++
++ set->data = map;
++ return 0;
++}
++
++static void destroy(struct ip_set *set)
++{
++ struct ip_set_portmap *map = (struct ip_set_portmap *) set->data;
++
++ kfree(map->members);
++ kfree(map);
++
++ set->data = NULL;
++}
++
++static void flush(struct ip_set *set)
++{
++ struct ip_set_portmap *map = (struct ip_set_portmap *) set->data;
++ memset(map->members, 0, bitmap_bytes(map->first_port, map->last_port));
++}
++
++static void list_header(const struct ip_set *set, void *data)
++{
++ struct ip_set_portmap *map = (struct ip_set_portmap *) set->data;
++ struct ip_set_req_portmap_create *header =
++ (struct ip_set_req_portmap_create *) data;
++
++ DP("list_header %u %u", map->first_port, map->last_port);
++
++ header->from = map->first_port;
++ header->to = map->last_port;
++}
++
++static int list_members_size(const struct ip_set *set)
++{
++ struct ip_set_portmap *map = (struct ip_set_portmap *) set->data;
++
++ return bitmap_bytes(map->first_port, map->last_port);
++}
++
++static void list_members(const struct ip_set *set, void *data)
++{
++ struct ip_set_portmap *map = (struct ip_set_portmap *) set->data;
++ int bytes = bitmap_bytes(map->first_port, map->last_port);
++
++ memcpy(data, map->members, bytes);
++}
++
++static struct ip_set_type ip_set_portmap = {
++ .typename = SETTYPE_NAME,
++ .typecode = IPSET_TYPE_PORT,
++ .protocol_version = IP_SET_PROTOCOL_VERSION,
++ .create = &create,
++ .destroy = &destroy,
++ .flush = &flush,
++ .reqsize = sizeof(struct ip_set_req_portmap),
++ .addip = &addport,
++ .addip_kernel = &addport_kernel,
++ .delip = &delport,
++ .delip_kernel = &delport_kernel,
++ .testip = &testport,
++ .testip_kernel = &testport_kernel,
++ .header_size = sizeof(struct ip_set_req_portmap_create),
++ .list_header = &list_header,
++ .list_members_size = &list_members_size,
++ .list_members = &list_members,
++ .me = THIS_MODULE,
++};
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>");
++MODULE_DESCRIPTION("portmap type of IP sets");
++
++static int __init init(void)
++{
++ return ip_set_register_set_type(&ip_set_portmap);
++}
++
++static void __exit fini(void)
++{
++ /* FIXME: possible race with ip_set_create() */
++ ip_set_unregister_set_type(&ip_set_portmap);
++}
++
++module_init(init);
++module_exit(fini);
+diff -urN linux-2.6.19.old/net/ipv4/netfilter/ipt_set.c linux-2.6.19.dev/net/ipv4/netfilter/ipt_set.c
+--- linux-2.6.19.old/net/ipv4/netfilter/ipt_set.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/netfilter/ipt_set.c 2006-12-14 03:13:43.000000000 +0100
+@@ -0,0 +1,105 @@
++/* Copyright (C) 2000-2002 Joakim Axelsson <gozem@linux.nu>
++ * Patrick Schaaf <bof@bof.de>
++ * Martin Josefsson <gandalf@wlug.westbo.se>
++ * Copyright (C) 2003-2004 Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++/* Kernel module to match an IP set. */
++
++#include <linux/module.h>
++#include <linux/ip.h>
++#include <linux/skbuff.h>
++
++#include <linux/netfilter_ipv4/ip_tables.h>
++#include <linux/netfilter_ipv4/ip_set.h>
++#include <linux/netfilter_ipv4/ipt_set.h>
++
++static inline int
++match_set(const struct ipt_set_info *info,
++ const struct sk_buff *skb,
++ int inv)
++{
++ if (ip_set_testip_kernel(info->index, skb, info->flags))
++ inv = !inv;
++ return inv;
++}
++
++static int
++match(const struct sk_buff *skb,
++ const struct net_device *in,
++ const struct net_device *out,
++ const struct xt_match *match,
++ const void *matchinfo,
++ int offset,
++ unsigned int protoff,
++ int *hotdrop)
++{
++ const struct ipt_set_info_match *info = matchinfo;
++
++ return match_set(&info->match_set,
++ skb,
++ info->match_set.flags[0] & IPSET_MATCH_INV);
++}
++
++static int
++checkentry(const char *tablename,
++ const void *ip,
++ const struct xt_match *match,
++ void *matchinfo,
++ unsigned int hook_mask)
++{
++ struct ipt_set_info_match *info =
++ (struct ipt_set_info_match *) matchinfo;
++ ip_set_id_t index;
++
++ index = ip_set_get_byindex(info->match_set.index);
++
++ if (index == IP_SET_INVALID_ID) {
++ ip_set_printk("Cannot find set indentified by id %u to match",
++ info->match_set.index);
++ return 0; /* error */
++ }
++ if (info->match_set.flags[IP_SET_MAX_BINDINGS] != 0) {
++ ip_set_printk("That's nasty!");
++ return 0; /* error */
++ }
++
++ return 1;
++}
++
++static void destroy(const struct xt_match *match, void *matchinfo)
++{
++ struct ipt_set_info_match *info = matchinfo;
++
++ ip_set_put(info->match_set.index);
++}
++
++static struct ipt_match set_match = {
++ .name = "set",
++ .match = &match,
++ .matchsize = sizeof(struct ipt_set_info_match),
++ .checkentry = &checkentry,
++ .destroy = &destroy,
++ .me = THIS_MODULE
++};
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>");
++MODULE_DESCRIPTION("iptables IP set match module");
++
++static int __init init(void)
++{
++ return ipt_register_match(&set_match);
++}
++
++static void __exit fini(void)
++{
++ ipt_unregister_match(&set_match);
++}
++
++module_init(init);
++module_exit(fini);
+diff -urN linux-2.6.19.old/net/ipv4/netfilter/ipt_SET.c linux-2.6.19.dev/net/ipv4/netfilter/ipt_SET.c
+--- linux-2.6.19.old/net/ipv4/netfilter/ipt_SET.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/netfilter/ipt_SET.c 2006-12-14 03:13:43.000000000 +0100
+@@ -0,0 +1,120 @@
++/* Copyright (C) 2000-2002 Joakim Axelsson <gozem@linux.nu>
++ * Patrick Schaaf <bof@bof.de>
++ * Martin Josefsson <gandalf@wlug.westbo.se>
++ * Copyright (C) 2003-2004 Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++/* ipt_SET.c - netfilter target to manipulate IP sets */
++
++#include <linux/types.h>
++#include <linux/ip.h>
++#include <linux/timer.h>
++#include <linux/module.h>
++#include <linux/netfilter.h>
++#include <linux/netdevice.h>
++#include <linux/if.h>
++#include <linux/inetdevice.h>
++#include <net/protocol.h>
++#include <net/checksum.h>
++#include <linux/netfilter_ipv4.h>
++#include <linux/netfilter_ipv4/ip_nat_rule.h>
++#include <linux/netfilter_ipv4/ipt_set.h>
++
++static unsigned int
++target(struct sk_buff **pskb,
++ const struct net_device *in,
++ const struct net_device *out,
++ unsigned int hooknum,
++ const struct xt_target *target,
++ const void *targinfo)
++{
++ const struct ipt_set_info_target *info = targinfo;
++
++ if (info->add_set.index != IP_SET_INVALID_ID)
++ ip_set_addip_kernel(info->add_set.index,
++ *pskb,
++ info->add_set.flags);
++ if (info->del_set.index != IP_SET_INVALID_ID)
++ ip_set_delip_kernel(info->del_set.index,
++ *pskb,
++ info->del_set.flags);
++
++ return IPT_CONTINUE;
++}
++
++static int
++checkentry(const char *tablename,
++ const void *e,
++ const struct xt_target *target,
++ void *targinfo,
++ unsigned int hook_mask)
++{
++ struct ipt_set_info_target *info =
++ (struct ipt_set_info_target *) targinfo;
++ ip_set_id_t index;
++
++ if (info->add_set.index != IP_SET_INVALID_ID) {
++ index = ip_set_get_byindex(info->add_set.index);
++ if (index == IP_SET_INVALID_ID) {
++ ip_set_printk("cannot find add_set index %u as target",
++ info->add_set.index);
++ return 0; /* error */
++ }
++ }
++
++ if (info->del_set.index != IP_SET_INVALID_ID) {
++ index = ip_set_get_byindex(info->del_set.index);
++ if (index == IP_SET_INVALID_ID) {
++ ip_set_printk("cannot find del_set index %u as target",
++ info->del_set.index);
++ return 0; /* error */
++ }
++ }
++ if (info->add_set.flags[IP_SET_MAX_BINDINGS] != 0
++ || info->del_set.flags[IP_SET_MAX_BINDINGS] != 0) {
++ ip_set_printk("That's nasty!");
++ return 0; /* error */
++ }
++
++ return 1;
++}
++
++static void destroy(const struct xt_target *target, void *targetinfo)
++{
++ struct ipt_set_info_target *info = targetinfo;
++
++ if (info->add_set.index != IP_SET_INVALID_ID)
++ ip_set_put(info->add_set.index);
++ if (info->del_set.index != IP_SET_INVALID_ID)
++ ip_set_put(info->del_set.index);
++}
++
++static struct ipt_target SET_target = {
++ .name = "SET",
++ .target = target,
++ .targetsize = sizeof(struct ipt_set_info_target),
++ .checkentry = checkentry,
++ .destroy = destroy,
++ .me = THIS_MODULE
++};
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>");
++MODULE_DESCRIPTION("iptables IP set target module");
++
++static int __init init(void)
++{
++ return ipt_register_target(&SET_target);
++}
++
++static void __exit fini(void)
++{
++ ipt_unregister_target(&SET_target);
++}
++
++module_init(init);
++module_exit(fini);
+diff -urN linux-2.6.19.old/net/ipv4/netfilter/Kconfig linux-2.6.19.dev/net/ipv4/netfilter/Kconfig
+--- linux-2.6.19.old/net/ipv4/netfilter/Kconfig 2006-12-14 03:13:41.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/netfilter/Kconfig 2006-12-14 03:13:43.000000000 +0100
+@@ -647,5 +647,106 @@
+ Allows altering the ARP packet payload: source and destination
+ hardware and network addresses.
+
++config IP_NF_SET
++ tristate "IP set support"
++ depends on INET && NETFILTER
++ help
++ This option adds IP set support to the kernel.
++ In order to define and use sets, you need the userspace utility
++ ipset(8).
++
++ To compile it as a module, choose M here. If unsure, say N.
++
++config IP_NF_SET_MAX
++ int "Maximum number of IP sets"
++ default 256
++ range 2 65534
++ depends on IP_NF_SET
++ help
++ You can define here default value of the maximum number
++ of IP sets for the kernel.
++
++ The value can be overriden by the 'max_sets' module
++ parameter of the 'ip_set' module.
++
++config IP_NF_SET_HASHSIZE
++ int "Hash size for bindings of IP sets"
++ default 1024
++ depends on IP_NF_SET
++ help
++ You can define here default value of the hash size for
++ bindings of IP sets.
++
++ The value can be overriden by the 'hash_size' module
++ parameter of the 'ip_set' module.
++
++config IP_NF_SET_IPMAP
++ tristate "ipmap set support"
++ depends on IP_NF_SET
++ help
++ This option adds the ipmap set type support.
++
++ To compile it as a module, choose M here. If unsure, say N.
++
++config IP_NF_SET_MACIPMAP
++ tristate "macipmap set support"
++ depends on IP_NF_SET
++ help
++ This option adds the macipmap set type support.
++
++ To compile it as a module, choose M here. If unsure, say N.
++
++config IP_NF_SET_PORTMAP
++ tristate "portmap set support"
++ depends on IP_NF_SET
++ help
++ This option adds the portmap set type support.
++
++ To compile it as a module, choose M here. If unsure, say N.
++
++config IP_NF_SET_IPHASH
++ tristate "iphash set support"
++ depends on IP_NF_SET
++ help
++ This option adds the iphash set type support.
++
++ To compile it as a module, choose M here. If unsure, say N.
++
++config IP_NF_SET_NETHASH
++ tristate "nethash set support"
++ depends on IP_NF_SET
++ help
++ This option adds the nethash set type support.
++
++ To compile it as a module, choose M here. If unsure, say N.
++
++config IP_NF_SET_IPTREE
++ tristate "iptree set support"
++ depends on IP_NF_SET
++ help
++ This option adds the iptree set type support.
++
++ To compile it as a module, choose M here. If unsure, say N.
++
++config IP_NF_MATCH_SET
++ tristate "set match support"
++ depends on IP_NF_SET
++ help
++ Set matching matches against given IP sets.
++ You need the ipset utility to create and set up the sets.
++
++ To compile it as a module, choose M here. If unsure, say N.
++
++config IP_NF_TARGET_SET
++ tristate "SET target support"
++ depends on IP_NF_SET
++ help
++ The SET target makes possible to add/delete entries
++ in IP sets.
++ You need the ipset utility to create and set up the sets.
++
++ To compile it as a module, choose M here. If unsure, say N.
++
++
+ endmenu
+
+diff -urN linux-2.6.19.old/net/ipv4/netfilter/Makefile linux-2.6.19.dev/net/ipv4/netfilter/Makefile
+--- linux-2.6.19.old/net/ipv4/netfilter/Makefile 2006-12-14 03:13:41.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/netfilter/Makefile 2006-12-14 03:13:43.000000000 +0100
+@@ -54,6 +54,7 @@
+
+ # matches
+ obj-$(CONFIG_IP_NF_MATCH_HASHLIMIT) += ipt_hashlimit.o
++obj-$(CONFIG_IP_NF_MATCH_SET) += ipt_set.o
+ obj-$(CONFIG_IP_NF_MATCH_IPRANGE) += ipt_iprange.o
+ obj-$(CONFIG_IP_NF_MATCH_OWNER) += ipt_owner.o
+ obj-$(CONFIG_IP_NF_MATCH_TOS) += ipt_tos.o
+@@ -77,6 +78,17 @@
+ obj-$(CONFIG_IP_NF_TARGET_LOG) += ipt_LOG.o
+ obj-$(CONFIG_IP_NF_TARGET_ULOG) += ipt_ULOG.o
+ obj-$(CONFIG_IP_NF_TARGET_TCPMSS) += ipt_TCPMSS.o
++obj-$(CONFIG_IP_NF_TARGET_SET) += ipt_SET.o
++
++# sets
++obj-$(CONFIG_IP_NF_SET) += ip_set.o
++obj-$(CONFIG_IP_NF_SET_IPMAP) += ip_set_ipmap.o
++obj-$(CONFIG_IP_NF_SET_PORTMAP) += ip_set_portmap.o
++obj-$(CONFIG_IP_NF_SET_MACIPMAP) += ip_set_macipmap.o
++obj-$(CONFIG_IP_NF_SET_IPHASH) += ip_set_iphash.o
++obj-$(CONFIG_IP_NF_SET_NETHASH) += ip_set_nethash.o
++obj-$(CONFIG_IP_NF_SET_IPTREE) += ip_set_iptree.o
++
+ obj-$(CONFIG_IP_NF_TARGET_CLUSTERIP) += ipt_CLUSTERIP.o
+ obj-$(CONFIG_IP_NF_TARGET_TTL) += ipt_TTL.o
+
--- /dev/null
+diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ipt_time.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ipt_time.h
+--- linux-2.6.19.old/include/linux/netfilter_ipv4/ipt_time.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ipt_time.h 2006-12-14 03:13:45.000000000 +0100
+@@ -0,0 +1,18 @@
++#ifndef __ipt_time_h_included__
++#define __ipt_time_h_included__
++
++
++struct ipt_time_info {
++ u_int8_t days_match; /* 1 bit per day. -SMTWTFS */
++ u_int16_t time_start; /* 0 < time_start < 23*60+59 = 1439 */
++ u_int16_t time_stop; /* 0:0 < time_stat < 23:59 */
++
++ /* FIXME: Keep this one for userspace iptables binary compability: */
++ u_int8_t kerneltime; /* ignore skb time (and use kerneltime) or not. */
++
++ time_t date_start;
++ time_t date_stop;
++};
++
++
++#endif /* __ipt_time_h_included__ */
+diff -urN linux-2.6.19.old/net/ipv4/netfilter/ipt_time.c linux-2.6.19.dev/net/ipv4/netfilter/ipt_time.c
+--- linux-2.6.19.old/net/ipv4/netfilter/ipt_time.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/netfilter/ipt_time.c 2006-12-14 03:13:45.000000000 +0100
+@@ -0,0 +1,178 @@
++/*
++ This is a module which is used for time matching
++ It is using some modified code from dietlibc (localtime() function)
++ that you can find at http://www.fefe.de/dietlibc/
++ This file is distributed under the terms of the GNU General Public
++ License (GPL). Copies of the GPL can be obtained from: ftp://prep.ai.mit.edu/pub/gnu/GPL
++ 2001-05-04 Fabrice MARIE <fabrice@netfilter.org> : initial development.
++ 2001-21-05 Fabrice MARIE <fabrice@netfilter.org> : bug fix in the match code,
++ thanks to "Zeng Yu" <zengy@capitel.com.cn> for bug report.
++ 2001-26-09 Fabrice MARIE <fabrice@netfilter.org> : force the match to be in LOCAL_IN or PRE_ROUTING only.
++ 2001-30-11 Fabrice : added the possibility to use the match in FORWARD/OUTPUT with a little hack,
++ added Nguyen Dang Phuoc Dong <dongnd@tlnet.com.vn> patch to support timezones.
++ 2004-05-02 Fabrice : added support for date matching, from an idea of Fabien COELHO.
++*/
++
++#include <linux/module.h>
++#include <linux/skbuff.h>
++#include <linux/netfilter_ipv4/ip_tables.h>
++#include <linux/netfilter_ipv4/ipt_time.h>
++#include <linux/time.h>
++
++MODULE_AUTHOR("Fabrice MARIE <fabrice@netfilter.org>");
++MODULE_DESCRIPTION("Match arrival timestamp/date");
++MODULE_LICENSE("GPL");
++
++struct tm
++{
++ int tm_sec; /* Seconds. [0-60] (1 leap second) */
++ int tm_min; /* Minutes. [0-59] */
++ int tm_hour; /* Hours. [0-23] */
++ int tm_mday; /* Day. [1-31] */
++ int tm_mon; /* Month. [0-11] */
++ int tm_year; /* Year - 1900. */
++ int tm_wday; /* Day of week. [0-6] */
++ int tm_yday; /* Days in year.[0-365] */
++ int tm_isdst; /* DST. [-1/0/1]*/
++
++ long int tm_gmtoff; /* we don't care, we count from GMT */
++ const char *tm_zone; /* we don't care, we count from GMT */
++};
++
++void
++localtime(const u32 time, struct tm *r);
++
++static int
++match(const struct sk_buff *skb,
++ const struct net_device *in,
++ const struct net_device *out,
++ const struct xt_match *match,
++ const void *matchinfo,
++ int offset,
++ unsigned int protoff,
++ int *hotdrop)
++{
++ const struct ipt_time_info *info = matchinfo; /* match info for rule */
++ struct tm currenttime; /* time human readable */
++ u_int8_t days_of_week[7] = {64, 32, 16, 8, 4, 2, 1};
++ u_int16_t packet_time;
++
++ /* We might not have a timestamp, get one */
++ if (skb->tstamp.off_sec == 0)
++ __net_timestamp((struct sk_buff *)skb);
++
++ /* First we make sure we are in the date start-stop boundaries */
++ if ((skb->tstamp.off_sec < info->date_start) || (skb->tstamp.off_sec > info->date_stop))
++ return 0; /* We are outside the date boundaries */
++
++ /* Transform the timestamp of the packet, in a human readable form */
++ localtime(skb->tstamp.off_sec, ¤ttime);
++
++ /* check if we match this timestamp, we start by the days... */
++ if ((days_of_week[currenttime.tm_wday] & info->days_match) != days_of_week[currenttime.tm_wday])
++ return 0; /* the day doesn't match */
++
++ /* ... check the time now */
++ packet_time = (currenttime.tm_hour * 60) + currenttime.tm_min;
++ if ((packet_time < info->time_start) || (packet_time > info->time_stop))
++ return 0;
++
++ /* here we match ! */
++ return 1;
++}
++
++static int
++checkentry(const char *tablename,
++ const void *ip,
++ const struct xt_match *match,
++ void *matchinfo,
++ unsigned int hook_mask)
++{
++ struct ipt_time_info *info = matchinfo; /* match info for rule */
++
++ /* First, check that we are in the correct hooks */
++ if (hook_mask
++ & ~((1 << NF_IP_PRE_ROUTING) | (1 << NF_IP_LOCAL_IN) | (1 << NF_IP_FORWARD) | (1 << NF_IP_LOCAL_OUT)))
++ {
++ printk("ipt_time: error, only valid for PRE_ROUTING, LOCAL_IN, FORWARD and OUTPUT)\n");
++ return 0;
++ }
++
++ /* Now check the coherence of the data ... */
++ if ((info->time_start > 1439) || /* 23*60+59 = 1439*/
++ (info->time_stop > 1439))
++ {
++ printk(KERN_WARNING "ipt_time: invalid argument\n");
++ return 0;
++ }
++
++ return 1;
++}
++
++static struct ipt_match time_match = {
++ .name = "time",
++ .match = &match,
++ .matchsize = sizeof(struct ipt_time_info),
++ .checkentry = &checkentry,
++ .me = THIS_MODULE
++};
++
++static int __init init(void)
++{
++ printk("ipt_time loading\n");
++ return ipt_register_match(&time_match);
++}
++
++static void __exit fini(void)
++{
++ ipt_unregister_match(&time_match);
++ printk("ipt_time unloaded\n");
++}
++
++module_init(init);
++module_exit(fini);
++
++
++/* The part below is borowed and modified from dietlibc */
++
++/* seconds per day */
++#define SPD 24*60*60
++
++void
++localtime(const u32 time, struct tm *r) {
++ u32 i, timep;
++ extern struct timezone sys_tz;
++ const unsigned int __spm[12] =
++ { 0,
++ (31),
++ (31+28),
++ (31+28+31),
++ (31+28+31+30),
++ (31+28+31+30+31),
++ (31+28+31+30+31+30),
++ (31+28+31+30+31+30+31),
++ (31+28+31+30+31+30+31+31),
++ (31+28+31+30+31+30+31+31+30),
++ (31+28+31+30+31+30+31+31+30+31),
++ (31+28+31+30+31+30+31+31+30+31+30),
++ };
++ register u32 work;
++
++ timep = time - (sys_tz.tz_minuteswest * 60);
++ work=timep%(SPD);
++ r->tm_sec=work%60; work/=60;
++ r->tm_min=work%60; r->tm_hour=work/60;
++ work=timep/(SPD);
++ r->tm_wday=(4+work)%7;
++ for (i=1970; ; ++i) {
++ register time_t k= (!(i%4) && ((i%100) || !(i%400)))?366:365;
++ if (work>k)
++ work-=k;
++ else
++ break;
++ }
++ r->tm_year=i-1900;
++ for (i=11; i && __spm[i]>work; --i) ;
++ r->tm_mon=i;
++ r->tm_mday=work-__spm[i]+1;
++}
+diff -urN linux-2.6.19.old/net/ipv4/netfilter/Kconfig linux-2.6.19.dev/net/ipv4/netfilter/Kconfig
+--- linux-2.6.19.old/net/ipv4/netfilter/Kconfig 2006-12-14 03:13:45.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/netfilter/Kconfig 2006-12-14 03:13:45.000000000 +0100
+@@ -263,6 +263,22 @@
+
+ To compile it as a module, choose M here. If unsure, say N.
+
++
++config IP_NF_MATCH_TIME
++ tristate 'TIME match support'
++ depends on IP_NF_IPTABLES
++ help
++ This option adds a `time' match, which allows you
++ to match based on the packet arrival time/date
++ (arrival time/date at the machine which netfilter is running on) or
++ departure time/date (for locally generated packets).
++
++ If you say Y here, try iptables -m time --help for more information.
++ If you want to compile it as a module, say M here and read
++
++ Documentation/modules.txt. If unsure, say `N'.
++
++
+ config IP_NF_MATCH_RECENT
+ tristate "recent match support"
+ depends on IP_NF_IPTABLES
+diff -urN linux-2.6.19.old/net/ipv4/netfilter/Makefile linux-2.6.19.dev/net/ipv4/netfilter/Makefile
+--- linux-2.6.19.old/net/ipv4/netfilter/Makefile 2006-12-14 03:13:45.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/netfilter/Makefile 2006-12-14 03:13:45.000000000 +0100
+@@ -58,6 +58,7 @@
+ obj-$(CONFIG_IP_NF_MATCH_IPRANGE) += ipt_iprange.o
+ obj-$(CONFIG_IP_NF_MATCH_OWNER) += ipt_owner.o
+ obj-$(CONFIG_IP_NF_MATCH_TOS) += ipt_tos.o
++obj-$(CONFIG_IP_NF_MATCH_TIME) += ipt_time.o
+ obj-$(CONFIG_IP_NF_MATCH_RECENT) += ipt_recent.o
+ obj-$(CONFIG_IP_NF_MATCH_ECN) += ipt_ecn.o
+ obj-$(CONFIG_IP_NF_MATCH_AH) += ipt_ah.o
--- /dev/null
+diff -urN linux-2.6.19/drivers/net/imq.c linux-2.6.19+imq/drivers/net/imq.c
+--- linux-2.6.19/drivers/net/imq.c 1970-01-01 09:30:00.000000000 +0930
++++ linux-2.6.19+imq/drivers/net/imq.c 2006-12-05 23:01:02.000000000 +1030
+@@ -0,0 +1,402 @@
++/*
++ * Pseudo-driver for the intermediate queue device.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ *
++ * Authors: Patrick McHardy, <kaber@trash.net>
++ *
++ * The first version was written by Martin Devera, <devik@cdi.cz>
++ *
++ * Credits: Jan Rafaj <imq2t@cedric.vabo.cz>
++ * - Update patch to 2.4.21
++ * Sebastian Strollo <sstrollo@nortelnetworks.com>
++ * - Fix "Dead-loop on netdevice imq"-issue
++ * Marcel Sebek <sebek64@post.cz>
++ * - Update to 2.6.2-rc1
++ *
++ * After some time of inactivity there is a group taking care
++ * of IMQ again: http://www.linuximq.net
++ *
++ *
++ * 2004/06/30 - New version of IMQ patch to kernels <=2.6.7 including
++ * the following changes:
++ *
++ * - Correction of ipv6 support "+"s issue (Hasso Tepper)
++ * - Correction of imq_init_devs() issue that resulted in
++ * kernel OOPS unloading IMQ as module (Norbert Buchmuller)
++ * - Addition of functionality to choose number of IMQ devices
++ * during kernel config (Andre Correa)
++ * - Addition of functionality to choose how IMQ hooks on
++ * PRE and POSTROUTING (after or before NAT) (Andre Correa)
++ * - Cosmetic corrections (Norbert Buchmuller) (Andre Correa)
++ *
++ *
++ * 2005/12/16 - IMQ versions between 2.6.7 and 2.6.13 were
++ * released with almost no problems. 2.6.14-x was released
++ * with some important changes: nfcache was removed; After
++ * some weeks of trouble we figured out that some IMQ fields
++ * in skb were missing in skbuff.c - skb_clone and copy_skb_header.
++ * These functions are correctly patched by this new patch version.
++ *
++ * Thanks for all who helped to figure out all the problems with
++ * 2.6.14.x: Patrick McHardy, Rune Kock, VeNoMouS, Max CtRiX,
++ * Kevin Shanahan, Richard Lucassen, Valery Dachev (hopefully
++ * I didn't forget anybody). I apologize again for my lack of time.
++ *
++ * More info at: http://www.linuximq.net/ (Andre Correa)
++ */
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/moduleparam.h>
++#include <linux/skbuff.h>
++#include <linux/netdevice.h>
++#include <linux/rtnetlink.h>
++#include <linux/if_arp.h>
++#include <linux/netfilter.h>
++#include <linux/netfilter_ipv4.h>
++#if defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE)
++ #include <linux/netfilter_ipv6.h>
++#endif
++#include <linux/imq.h>
++#include <net/pkt_sched.h>
++
++extern int qdisc_restart1(struct net_device *dev);
++
++static nf_hookfn imq_nf_hook;
++
++static struct nf_hook_ops imq_ingress_ipv4 = {
++ .hook = imq_nf_hook,
++ .owner = THIS_MODULE,
++ .pf = PF_INET,
++ .hooknum = NF_IP_PRE_ROUTING,
++#if defined(CONFIG_IMQ_BEHAVIOR_BA) || defined(CONFIG_IMQ_BEHAVIOR_BB)
++ .priority = NF_IP_PRI_MANGLE + 1
++#else
++ .priority = NF_IP_PRI_NAT_DST + 1
++#endif
++};
++
++static struct nf_hook_ops imq_egress_ipv4 = {
++ .hook = imq_nf_hook,
++ .owner = THIS_MODULE,
++ .pf = PF_INET,
++ .hooknum = NF_IP_POST_ROUTING,
++#if defined(CONFIG_IMQ_BEHAVIOR_AA) || defined(CONFIG_IMQ_BEHAVIOR_BA)
++ .priority = NF_IP_PRI_LAST
++#else
++ .priority = NF_IP_PRI_NAT_SRC - 1
++#endif
++};
++
++#if defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE)
++static struct nf_hook_ops imq_ingress_ipv6 = {
++ .hook = imq_nf_hook,
++ .owner = THIS_MODULE,
++ .pf = PF_INET6,
++ .hooknum = NF_IP6_PRE_ROUTING,
++#if defined(CONFIG_IMQ_BEHAVIOR_BA) || defined(CONFIG_IMQ_BEHAVIOR_BB)
++ .priority = NF_IP6_PRI_MANGLE + 1
++#else
++ .priority = NF_IP6_PRI_NAT_DST + 1
++#endif
++};
++
++static struct nf_hook_ops imq_egress_ipv6 = {
++ .hook = imq_nf_hook,
++ .owner = THIS_MODULE,
++ .pf = PF_INET6,
++ .hooknum = NF_IP6_POST_ROUTING,
++#if defined(CONFIG_IMQ_BEHAVIOR_AA) || defined(CONFIG_IMQ_BEHAVIOR_BA)
++ .priority = NF_IP6_PRI_LAST
++#else
++ .priority = NF_IP6_PRI_NAT_SRC - 1
++#endif
++};
++#endif
++
++#if defined(CONFIG_IMQ_NUM_DEVS)
++static unsigned int numdevs = CONFIG_IMQ_NUM_DEVS;
++#else
++static unsigned int numdevs = 2;
++#endif
++
++static struct net_device *imq_devs;
++
++static struct net_device_stats *imq_get_stats(struct net_device *dev)
++{
++ return (struct net_device_stats *)dev->priv;
++}
++
++/* called for packets kfree'd in qdiscs at places other than enqueue */
++static void imq_skb_destructor(struct sk_buff *skb)
++{
++ struct nf_info *info = skb->nf_info;
++
++ if (info) {
++ if (info->indev)
++ dev_put(info->indev);
++ if (info->outdev)
++ dev_put(info->outdev);
++ kfree(info);
++ }
++}
++
++static int imq_dev_xmit(struct sk_buff *skb, struct net_device *dev)
++{
++ struct net_device_stats *stats = (struct net_device_stats*) dev->priv;
++
++ stats->tx_bytes += skb->len;
++ stats->tx_packets++;
++
++ skb->imq_flags = 0;
++ skb->destructor = NULL;
++
++ dev->trans_start = jiffies;
++ nf_reinject(skb, skb->nf_info, NF_ACCEPT);
++ return 0;
++}
++
++static int imq_nf_queue(struct sk_buff *skb, struct nf_info *info, unsigned queue_num, void *data)
++{
++ struct net_device *dev;
++ struct net_device_stats *stats;
++ struct sk_buff *skb2 = NULL;
++ struct Qdisc *q;
++ unsigned int index = skb->imq_flags&IMQ_F_IFMASK;
++ int ret = -1;
++
++ if (index > numdevs)
++ return -1;
++
++ dev = imq_devs + index;
++ if (!(dev->flags & IFF_UP)) {
++ skb->imq_flags = 0;
++ nf_reinject(skb, info, NF_ACCEPT);
++ return 0;
++ }
++ dev->last_rx = jiffies;
++
++ if (skb->destructor) {
++ skb2 = skb;
++ skb = skb_clone(skb, GFP_ATOMIC);
++ if (!skb)
++ return -1;
++ }
++ skb->nf_info = info;
++
++ stats = (struct net_device_stats *)dev->priv;
++ stats->rx_bytes+= skb->len;
++ stats->rx_packets++;
++
++ spin_lock_bh(&dev->queue_lock);
++ q = dev->qdisc;
++ if (q->enqueue) {
++ q->enqueue(skb_get(skb), q);
++ if (skb_shared(skb)) {
++ skb->destructor = imq_skb_destructor;
++ kfree_skb(skb);
++ ret = 0;
++ }
++ }
++ if (spin_is_locked(&dev->_xmit_lock))
++ netif_schedule(dev);
++ else
++ while (!netif_queue_stopped(dev) && qdisc_restart1(dev) < 0)
++ /* NOTHING */;
++
++ spin_unlock_bh(&dev->queue_lock);
++
++ if (skb2)
++ kfree_skb(ret ? skb : skb2);
++
++ return ret;
++}
++
++static struct nf_queue_handler nfqh = {
++ .name = "imq",
++ .outfn = imq_nf_queue,
++};
++
++static unsigned int imq_nf_hook(unsigned int hook, struct sk_buff **pskb,
++ const struct net_device *indev,
++ const struct net_device *outdev,
++ int (*okfn)(struct sk_buff *))
++{
++ if ((*pskb)->imq_flags & IMQ_F_ENQUEUE)
++ return NF_QUEUE;
++
++ return NF_ACCEPT;
++}
++
++
++static int __init imq_init_hooks(void)
++{
++ int err;
++
++ err = nf_register_queue_handler(PF_INET, &nfqh);
++ if (err > 0)
++ goto err1;
++ if ((err = nf_register_hook(&imq_ingress_ipv4)))
++ goto err2;
++ if ((err = nf_register_hook(&imq_egress_ipv4)))
++ goto err3;
++#if defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE)
++ if ((err = nf_register_queue_handler(PF_INET6, &nfqh)))
++ goto err4;
++ if ((err = nf_register_hook(&imq_ingress_ipv6)))
++ goto err5;
++ if ((err = nf_register_hook(&imq_egress_ipv6)))
++ goto err6;
++#endif
++
++ return 0;
++
++#if defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE)
++err6:
++ nf_unregister_hook(&imq_ingress_ipv6);
++err5:
++ nf_unregister_queue_handler(PF_INET6);
++err4:
++ nf_unregister_hook(&imq_egress_ipv6);
++#endif
++err3:
++ nf_unregister_hook(&imq_ingress_ipv4);
++err2:
++ nf_unregister_queue_handler(PF_INET);
++err1:
++ return err;
++}
++
++static void __exit imq_unhook(void)
++{
++ nf_unregister_hook(&imq_ingress_ipv4);
++ nf_unregister_hook(&imq_egress_ipv4);
++ nf_unregister_queue_handler(PF_INET);
++#if defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE)
++ nf_unregister_hook(&imq_ingress_ipv6);
++ nf_unregister_hook(&imq_egress_ipv6);
++ nf_unregister_queue_handler(PF_INET6);
++#endif
++}
++
++static int __init imq_dev_init(struct net_device *dev)
++{
++ dev->hard_start_xmit = imq_dev_xmit;
++ dev->type = ARPHRD_VOID;
++ dev->mtu = 1500;
++ dev->tx_queue_len = 30;
++ dev->flags = IFF_NOARP;
++ dev->priv = kmalloc(sizeof(struct net_device_stats), GFP_KERNEL);
++ if (dev->priv == NULL)
++ return -ENOMEM;
++ memset(dev->priv, 0, sizeof(struct net_device_stats));
++ dev->get_stats = imq_get_stats;
++
++ return 0;
++}
++
++static void imq_dev_uninit(struct net_device *dev)
++{
++ kfree(dev->priv);
++}
++
++static int __init imq_init_devs(void)
++{
++ struct net_device *dev;
++ int i,j;
++ j = numdevs;
++
++ if (!numdevs || numdevs > IMQ_MAX_DEVS) {
++ printk(KERN_ERR "IMQ: numdevs has to be betweed 1 and %u\n",
++ IMQ_MAX_DEVS);
++ return -EINVAL;
++ }
++
++ imq_devs = kmalloc(sizeof(struct net_device) * numdevs, GFP_KERNEL);
++ if (!imq_devs)
++ return -ENOMEM;
++ memset(imq_devs, 0, sizeof(struct net_device) * numdevs);
++
++ /* we start counting at zero */
++ numdevs--;
++
++ for (i = 0, dev = imq_devs; i <= numdevs; i++, dev++) {
++ SET_MODULE_OWNER(dev);
++ strcpy(dev->name, "imq%d");
++ dev->init = imq_dev_init;
++ dev->uninit = imq_dev_uninit;
++
++ if (register_netdev(dev) < 0)
++ goto err_register;
++ }
++ printk(KERN_INFO "IMQ starting with %u devices...\n", j);
++ return 0;
++
++err_register:
++ for (; i; i--)
++ unregister_netdev(--dev);
++ kfree(imq_devs);
++ return -EIO;
++}
++
++static void imq_cleanup_devs(void)
++{
++ int i;
++ struct net_device *dev = imq_devs;
++
++ for (i = 0; i <= numdevs; i++)
++ unregister_netdev(dev++);
++
++ kfree(imq_devs);
++}
++
++static int __init imq_init_module(void)
++{
++ int err;
++
++ if ((err = imq_init_devs())) {
++ printk(KERN_ERR "IMQ: Error trying imq_init_devs()\n");
++ return err;
++ }
++ if ((err = imq_init_hooks())) {
++ printk(KERN_ERR "IMQ: Error trying imq_init_hooks()\n");
++ imq_cleanup_devs();
++ return err;
++ }
++
++ printk(KERN_INFO "IMQ driver loaded successfully.\n");
++
++#if defined(CONFIG_IMQ_BEHAVIOR_BA) || defined(CONFIG_IMQ_BEHAVIOR_BB)
++ printk(KERN_INFO "\tHooking IMQ before NAT on PREROUTING.\n");
++#else
++ printk(KERN_INFO "\tHooking IMQ after NAT on PREROUTING.\n");
++#endif
++#if defined(CONFIG_IMQ_BEHAVIOR_AB) || defined(CONFIG_IMQ_BEHAVIOR_BB)
++ printk(KERN_INFO "\tHooking IMQ before NAT on POSTROUTING.\n");
++#else
++ printk(KERN_INFO "\tHooking IMQ after NAT on POSTROUTING.\n");
++#endif
++
++ return 0;
++}
++
++static void __exit imq_cleanup_module(void)
++{
++ imq_unhook();
++ imq_cleanup_devs();
++ printk(KERN_INFO "IMQ driver unloaded successfully.\n");
++}
++
++
++module_init(imq_init_module);
++module_exit(imq_cleanup_module);
++
++module_param(numdevs, int, 0);
++MODULE_PARM_DESC(numdevs, "number of IMQ devices (how many imq* devices will be created)");
++MODULE_AUTHOR("http://www.linuximq.net");
++MODULE_DESCRIPTION("Pseudo-driver for the intermediate queue device. See http://www.linuximq.net/ for more information.");
++MODULE_LICENSE("GPL");
+diff -urN linux-2.6.19/drivers/net/Kconfig linux-2.6.19+imq/drivers/net/Kconfig
+--- linux-2.6.19/drivers/net/Kconfig 2006-12-01 14:05:30.000000000 +1030
++++ linux-2.6.19+imq/drivers/net/Kconfig 2006-12-05 23:03:52.000000000 +1030
+@@ -96,6 +96,129 @@
+ To compile this driver as a module, choose M here: the module
+ will be called eql. If unsure, say N.
+
++config IMQ
++ tristate "IMQ (intermediate queueing device) support"
++ depends on NETDEVICES && NETFILTER
++ ---help---
++ The IMQ device(s) is used as placeholder for QoS queueing
++ disciplines. Every packet entering/leaving the IP stack can be
++ directed through the IMQ device where it's enqueued/dequeued to the
++ attached qdisc. This allows you to treat network devices as classes
++ and distribute bandwidth among them. Iptables is used to specify
++ through which IMQ device, if any, packets travel.
++
++ More information at: http://www.linuximq.net/
++
++ To compile this driver as a module, choose M here: the module
++ will be called imq. If unsure, say N.
++
++choice
++ prompt "IMQ behavior (PRE/POSTROUTING)"
++ depends on IMQ
++ default IMQ_BEHAVIOR_BA
++ help
++
++ This settings defines how IMQ behaves in respect to its
++ hooking in PREROUTING and POSTROUTING.
++
++ IMQ can work in any of the following ways:
++
++ PREROUTING | POSTROUTING
++ -----------------|-------------------
++ #1 After NAT | After NAT
++ #2 After NAT | Before NAT
++ #3 Before NAT | After NAT
++ #4 Before NAT | Before NAT
++
++ The default behavior is to hook before NAT on PREROUTING
++ and after NAT on POSTROUTING (#3).
++
++ This settings are specially usefull when trying to use IMQ
++ to shape NATed clients.
++
++ More information can be found at: www.linuximq.net
++
++ If not sure leave the default settings alone.
++
++config IMQ_BEHAVIOR_AA
++ bool "IMQ AA"
++ help
++ This settings defines how IMQ behaves in respect to its
++ hooking in PREROUTING and POSTROUTING.
++
++ Choosing this option will make IMQ hook like this:
++
++ PREROUTING: After NAT
++ POSTROUTING: After NAT
++
++ More information can be found at: www.linuximq.net
++
++ If not sure leave the default settings alone.
++
++config IMQ_BEHAVIOR_AB
++ bool "IMQ AB"
++ help
++ This settings defines how IMQ behaves in respect to its
++ hooking in PREROUTING and POSTROUTING.
++
++ Choosing this option will make IMQ hook like this:
++
++ PREROUTING: After NAT
++ POSTROUTING: Before NAT
++
++ More information can be found at: www.linuximq.net
++
++ If not sure leave the default settings alone.
++
++config IMQ_BEHAVIOR_BA
++ bool "IMQ BA"
++ help
++ This settings defines how IMQ behaves in respect to its
++ hooking in PREROUTING and POSTROUTING.
++
++ Choosing this option will make IMQ hook like this:
++
++ PREROUTING: Before NAT
++ POSTROUTING: After NAT
++
++ More information can be found at: www.linuximq.net
++
++ If not sure leave the default settings alone.
++
++config IMQ_BEHAVIOR_BB
++ bool "IMQ BB"
++ help
++ This settings defines how IMQ behaves in respect to its
++ hooking in PREROUTING and POSTROUTING.
++
++ Choosing this option will make IMQ hook like this:
++
++ PREROUTING: Before NAT
++ POSTROUTING: Before NAT
++
++ More information can be found at: www.linuximq.net
++
++ If not sure leave the default settings alone.
++
++endchoice
++
++config IMQ_NUM_DEVS
++
++ int "Number of IMQ devices"
++ range 2 8
++ depends on IMQ
++ default "2"
++ help
++
++ This settings defines how many IMQ devices will be
++ created.
++
++ The default value is 2.
++
++ More information can be found at: www.linuximq.net
++
++ If not sure leave the default settings alone.
++
+ config TUN
+ tristate "Universal TUN/TAP device driver support"
+ select CRC32
+diff -urN linux-2.6.19/drivers/net/Makefile linux-2.6.19+imq/drivers/net/Makefile
+--- linux-2.6.19/drivers/net/Makefile 2006-12-01 14:05:30.000000000 +1030
++++ linux-2.6.19+imq/drivers/net/Makefile 2006-12-04 12:41:01.000000000 +1030
+@@ -124,6 +124,7 @@
+ obj-$(CONFIG_SLHC) += slhc.o
+
+ obj-$(CONFIG_DUMMY) += dummy.o
++obj-$(CONFIG_IMQ) += imq.o
+ obj-$(CONFIG_IFB) += ifb.o
+ obj-$(CONFIG_DE600) += de600.o
+ obj-$(CONFIG_DE620) += de620.o
+diff -urN linux-2.6.19/include/linux/imq.h linux-2.6.19+imq/include/linux/imq.h
+--- linux-2.6.19/include/linux/imq.h 1970-01-01 09:30:00.000000000 +0930
++++ linux-2.6.19+imq/include/linux/imq.h 2006-12-04 12:41:01.000000000 +1030
+@@ -0,0 +1,9 @@
++#ifndef _IMQ_H
++#define _IMQ_H
++
++#define IMQ_MAX_DEVS 16
++
++#define IMQ_F_IFMASK 0x7f
++#define IMQ_F_ENQUEUE 0x80
++
++#endif /* _IMQ_H */
+diff -urN linux-2.6.19/include/linux/netfilter_ipv4/ipt_IMQ.h linux-2.6.19+imq/include/linux/netfilter_ipv4/ipt_IMQ.h
+--- linux-2.6.19/include/linux/netfilter_ipv4/ipt_IMQ.h 1970-01-01 09:30:00.000000000 +0930
++++ linux-2.6.19+imq/include/linux/netfilter_ipv4/ipt_IMQ.h 2006-12-05 23:04:22.000000000 +1030
+@@ -0,0 +1,8 @@
++#ifndef _IPT_IMQ_H
++#define _IPT_IMQ_H
++
++struct ipt_imq_info {
++ unsigned int todev; /* target imq device */
++};
++
++#endif /* _IPT_IMQ_H */
+diff -urN linux-2.6.19/include/linux/netfilter_ipv6/ip6t_IMQ.h linux-2.6.19+imq/include/linux/netfilter_ipv6/ip6t_IMQ.h
+--- linux-2.6.19/include/linux/netfilter_ipv6/ip6t_IMQ.h 1970-01-01 09:30:00.000000000 +0930
++++ linux-2.6.19+imq/include/linux/netfilter_ipv6/ip6t_IMQ.h 2006-12-05 23:04:32.000000000 +1030
+@@ -0,0 +1,8 @@
++#ifndef _IP6T_IMQ_H
++#define _IP6T_IMQ_H
++
++struct ip6t_imq_info {
++ unsigned int todev; /* target imq device */
++};
++
++#endif /* _IP6T_IMQ_H */
+diff -urN linux-2.6.19/include/linux/skbuff.h linux-2.6.19+imq/include/linux/skbuff.h
+--- linux-2.6.19/include/linux/skbuff.h 2006-12-01 14:05:44.000000000 +1030
++++ linux-2.6.19+imq/include/linux/skbuff.h 2006-12-05 23:05:06.000000000 +1030
+@@ -292,6 +292,10 @@
+ #if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE)
+ struct sk_buff *nfct_reasm;
+ #endif
++#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE)
++ unsigned char imq_flags;
++ struct nf_info *nf_info;
++#endif
+ #ifdef CONFIG_BRIDGE_NETFILTER
+ struct nf_bridge_info *nf_bridge;
+ #endif
+diff -urN linux-2.6.19/net/core/dev.c linux-2.6.19+imq/net/core/dev.c
+--- linux-2.6.19/net/core/dev.c 2006-12-01 14:05:45.000000000 +1030
++++ linux-2.6.19+imq/net/core/dev.c 2006-12-05 23:05:40.000000000 +1030
+@@ -94,6 +94,9 @@
+ #include <linux/skbuff.h>
+ #include <net/sock.h>
+ #include <linux/rtnetlink.h>
++#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE)
++#include <linux/imq.h>
++#endif
+ #include <linux/proc_fs.h>
+ #include <linux/seq_file.h>
+ #include <linux/stat.h>
+@@ -1344,7 +1347,11 @@
+ int dev_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
+ {
+ if (likely(!skb->next)) {
+- if (netdev_nit)
++ if (netdev_nit
++#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE)
++ && !(skb->imq_flags & IMQ_F_ENQUEUE)
++#endif
++ )
+ dev_queue_xmit_nit(skb, dev);
+
+ if (netif_needs_gso(dev, skb)) {
+diff -urN linux-2.6.19/net/core/skbuff.c linux-2.6.19+imq/net/core/skbuff.c
+--- linux-2.6.19/net/core/skbuff.c 2006-12-01 14:05:45.000000000 +1030
++++ linux-2.6.19+imq/net/core/skbuff.c 2006-12-04 12:41:01.000000000 +1030
+@@ -482,6 +482,10 @@
+ C(nfct_reasm);
+ nf_conntrack_get_reasm(skb->nfct_reasm);
+ #endif
++#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE)
++ C(imq_flags);
++ C(nf_info);
++#endif /*CONFIG_IMQ*/
+ #ifdef CONFIG_BRIDGE_NETFILTER
+ C(nf_bridge);
+ nf_bridge_get(skb->nf_bridge);
+@@ -546,6 +550,10 @@
+ #if defined(CONFIG_IP_VS) || defined(CONFIG_IP_VS_MODULE)
+ new->ipvs_property = old->ipvs_property;
+ #endif
++#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE)
++ new->imq_flags = old->imq_flags;
++ new->nf_info = old->nf_info;
++#endif /*CONFIG_IMQ*/
+ #ifdef CONFIG_BRIDGE_NETFILTER
+ new->nf_bridge = old->nf_bridge;
+ nf_bridge_get(old->nf_bridge);
+diff -urN linux-2.6.19/net/ipv4/netfilter/ipt_IMQ.c linux-2.6.19+imq/net/ipv4/netfilter/ipt_IMQ.c
+--- linux-2.6.19/net/ipv4/netfilter/ipt_IMQ.c 1970-01-01 09:30:00.000000000 +0930
++++ linux-2.6.19.2/net/ipv4/netfilter/ipt_IMQ.c 2007-01-25 09:59:34.000000000 +0100
+@@ -0,0 +1,71 @@
++/*
++ * This target marks packets to be enqueued to an imq device
++ */
++#include <linux/module.h>
++#include <linux/skbuff.h>
++#include <linux/netfilter_ipv4/ip_tables.h>
++#include <linux/netfilter_ipv4/ipt_IMQ.h>
++#include <linux/imq.h>
++
++static unsigned int imq_target(struct sk_buff **pskb,
++ const struct net_device *in,
++ const struct net_device *out,
++ unsigned int hooknum,
++ const struct xt_target *target,
++ const void *targinfo)
++{
++ struct ipt_imq_info *mr = (struct ipt_imq_info*)targinfo;
++
++ (*pskb)->imq_flags = mr->todev | IMQ_F_ENQUEUE;
++
++ return IPT_CONTINUE;
++}
++
++static int imq_checkentry(const char *tablename,
++ const void *e,
++ const struct xt_target *target,
++ void *targinfo,
++ unsigned int hook_mask)
++{
++ struct ipt_imq_info *mr;
++
++ mr = (struct ipt_imq_info*)targinfo;
++
++ if (mr->todev > IMQ_MAX_DEVS) {
++ printk(KERN_WARNING
++ "IMQ: invalid device specified, highest is %u\n",
++ IMQ_MAX_DEVS);
++ return 0;
++ }
++
++ return 1;
++}
++
++static struct ipt_target ipt_imq_reg = {
++ .name = "IMQ",
++ .target = imq_target,
++ .targetsize = sizeof(struct ipt_imq_info),
++ .checkentry = imq_checkentry,
++ .me = THIS_MODULE,
++ .table = "mangle"
++};
++
++static int __init init(void)
++{
++ if (ipt_register_target(&ipt_imq_reg))
++ return -EINVAL;
++
++ return 0;
++}
++
++static void __exit fini(void)
++{
++ ipt_unregister_target(&ipt_imq_reg);
++}
++
++module_init(init);
++module_exit(fini);
++
++MODULE_AUTHOR("http://www.linuximq.net");
++MODULE_DESCRIPTION("Pseudo-driver for the intermediate queue device. See http://www.linuximq.net/ for more information.");
++MODULE_LICENSE("GPL");
+diff -urN linux-2.6.19/net/ipv4/netfilter/Kconfig linux-2.6.19+imq/net/ipv4/netfilter/Kconfig
+--- linux-2.6.19/net/ipv4/netfilter/Kconfig 2006-12-01 14:05:45.000000000 +1030
++++ linux-2.6.19+imq/net/ipv4/netfilter/Kconfig 2006-12-04 12:41:01.000000000 +1030
+@@ -533,6 +533,17 @@
+
+ To compile it as a module, choose M here. If unsure, say N.
+
++config IP_NF_TARGET_IMQ
++ tristate "IMQ target support"
++ depends on IP_NF_MANGLE
++ help
++ This option adds a `IMQ' target which is used to specify if and
++ to which IMQ device packets should get enqueued/dequeued.
++
++ For more information visit: http://www.linuximq.net/
++
++ To compile it as a module, choose M here. If unsure, say N.
++
+ config IP_NF_TARGET_TOS
+ tristate "TOS target support"
+ depends on IP_NF_MANGLE
+diff -urN linux-2.6.19/net/ipv4/netfilter/Makefile linux-2.6.19+imq/net/ipv4/netfilter/Makefile
+--- linux-2.6.19/net/ipv4/netfilter/Makefile 2006-12-01 14:05:45.000000000 +1030
++++ linux-2.6.19+imq/net/ipv4/netfilter/Makefile 2006-12-04 12:41:01.000000000 +1030
+@@ -67,6 +67,7 @@
+ obj-$(CONFIG_IP_NF_TARGET_REJECT) += ipt_REJECT.o
+ obj-$(CONFIG_IP_NF_TARGET_TOS) += ipt_TOS.o
+ obj-$(CONFIG_IP_NF_TARGET_ECN) += ipt_ECN.o
++obj-$(CONFIG_IP_NF_TARGET_IMQ) += ipt_IMQ.o
+ obj-$(CONFIG_IP_NF_TARGET_MASQUERADE) += ipt_MASQUERADE.o
+ obj-$(CONFIG_IP_NF_TARGET_REDIRECT) += ipt_REDIRECT.o
+ obj-$(CONFIG_IP_NF_TARGET_NETMAP) += ipt_NETMAP.o
+diff -urN linux-2.6.19/net/ipv6/netfilter/ip6t_IMQ.c linux-2.6.19+imq/net/ipv6/netfilter/ip6t_IMQ.c
+--- linux-2.6.19/net/ipv6/netfilter/ip6t_IMQ.c 1970-01-01 09:30:00.000000000 +0930
++++ linux-2.6.19.2/net/ipv6/netfilter/ip6t_IMQ.c 2007-01-25 10:06:41.000000000 +0100
+@@ -0,0 +1,71 @@
++/*
++ * This target marks packets to be enqueued to an imq device
++ */
++#include <linux/module.h>
++#include <linux/skbuff.h>
++#include <linux/netfilter_ipv6/ip6_tables.h>
++#include <linux/netfilter_ipv6/ip6t_IMQ.h>
++#include <linux/imq.h>
++
++static unsigned int imq_target(struct sk_buff **pskb,
++ const struct net_device *in,
++ const struct net_device *out,
++ unsigned int hooknum,
++ const struct xt_target *target,
++ const void *targinfo)
++{
++ struct ip6t_imq_info *mr = (struct ip6t_imq_info*)targinfo;
++
++ (*pskb)->imq_flags = mr->todev | IMQ_F_ENQUEUE;
++
++ return IP6T_CONTINUE;
++}
++
++static int imq_checkentry(const char *tablename,
++ const void *entry,
++ const struct xt_target *target,
++ void *targinfo,
++ unsigned int hook_mask)
++{
++ struct ip6t_imq_info *mr;
++
++ mr = (struct ip6t_imq_info*)targinfo;
++
++ if (mr->todev > IMQ_MAX_DEVS) {
++ printk(KERN_WARNING
++ "IMQ: invalid device specified, highest is %u\n",
++ IMQ_MAX_DEVS);
++ return 0;
++ }
++
++ return 1;
++}
++
++static struct ip6t_target ip6t_imq_reg = {
++ .name = "IMQ",
++ .target = imq_target,
++ .targetsize = sizeof(struct ip6t_imq_info),
++ .table = "mangle",
++ .checkentry = imq_checkentry,
++ .me = THIS_MODULE
++};
++
++static int __init init(void)
++{
++ if (ip6t_register_target(&ip6t_imq_reg))
++ return -EINVAL;
++
++ return 0;
++}
++
++static void __exit fini(void)
++{
++ ip6t_unregister_target(&ip6t_imq_reg);
++}
++
++module_init(init);
++module_exit(fini);
++
++MODULE_AUTHOR("http://www.linuximq.net");
++MODULE_DESCRIPTION("Pseudo-driver for the intermediate queue device. See http://www.linuximq.net/ for more information.");
++MODULE_LICENSE("GPL");
+diff -urN linux-2.6.19/net/ipv6/netfilter/Kconfig linux-2.6.19+imq/net/ipv6/netfilter/Kconfig
+--- linux-2.6.19/net/ipv6/netfilter/Kconfig 2006-12-01 14:05:46.000000000 +1030
++++ linux-2.6.19+imq/net/ipv6/netfilter/Kconfig 2006-12-04 12:41:01.000000000 +1030
+@@ -163,6 +163,15 @@
+
+ To compile it as a module, choose M here. If unsure, say N.
+
++config IP6_NF_TARGET_IMQ
++ tristate "IMQ target support"
++ depends on IP6_NF_MANGLE
++ help
++ This option adds a `IMQ' target which is used to specify if and
++ to which imq device packets should get enqueued/dequeued.
++
++ To compile it as a module, choose M here. If unsure, say N.
++
+ config IP6_NF_TARGET_HL
+ tristate 'HL (hoplimit) target support'
+ depends on IP6_NF_MANGLE
+diff -urN linux-2.6.19/net/ipv6/netfilter/Makefile linux-2.6.19+imq/net/ipv6/netfilter/Makefile
+--- linux-2.6.19/net/ipv6/netfilter/Makefile 2006-12-01 14:05:46.000000000 +1030
++++ linux-2.6.19+imq/net/ipv6/netfilter/Makefile 2006-12-04 12:41:01.000000000 +1030
+@@ -13,6 +13,7 @@
+ obj-$(CONFIG_IP6_NF_MATCH_OWNER) += ip6t_owner.o
+ obj-$(CONFIG_IP6_NF_FILTER) += ip6table_filter.o
+ obj-$(CONFIG_IP6_NF_MANGLE) += ip6table_mangle.o
++obj-$(CONFIG_IP6_NF_TARGET_IMQ) += ip6t_IMQ.o
+ obj-$(CONFIG_IP6_NF_TARGET_HL) += ip6t_HL.o
+ obj-$(CONFIG_IP6_NF_QUEUE) += ip6_queue.o
+ obj-$(CONFIG_IP6_NF_TARGET_LOG) += ip6t_LOG.o
+diff -urN linux-2.6.19/net/sched/sch_generic.c linux-2.6.19+imq/net/sched/sch_generic.c
+--- linux-2.6.19/net/sched/sch_generic.c 2006-12-01 14:05:46.000000000 +1030
++++ linux-2.6.19+imq/net/sched/sch_generic.c 2006-12-05 23:08:54.000000000 +1030
+@@ -87,7 +87,6 @@
+
+ NOTE: Called under dev->queue_lock with locally disabled BH.
+ */
+-
+ static inline int qdisc_restart(struct net_device *dev)
+ {
+ struct Qdisc *q = dev->qdisc;
+@@ -181,6 +180,11 @@
+ return q->q.qlen;
+ }
+
++int qdisc_restart1(struct net_device *dev)
++{
++ return qdisc_restart(dev);
++}
++
+ void __qdisc_run(struct net_device *dev)
+ {
+ if (unlikely(dev->qdisc == &noop_qdisc))
+@@ -617,3 +621,4 @@
+ EXPORT_SYMBOL(qdisc_reset);
+ EXPORT_SYMBOL(qdisc_lock_tree);
+ EXPORT_SYMBOL(qdisc_unlock_tree);
++EXPORT_SYMBOL(qdisc_restart1);
--- /dev/null
+diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ipt_ROUTE.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ipt_ROUTE.h
+--- linux-2.6.19.old/include/linux/netfilter_ipv4/ipt_ROUTE.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ipt_ROUTE.h 2006-12-14 03:13:49.000000000 +0100
+@@ -0,0 +1,23 @@
++/* Header file for iptables ipt_ROUTE target
++ *
++ * (C) 2002 by Cédric de Launois <delaunois@info.ucl.ac.be>
++ *
++ * This software is distributed under GNU GPL v2, 1991
++ */
++#ifndef _IPT_ROUTE_H_target
++#define _IPT_ROUTE_H_target
++
++#define IPT_ROUTE_IFNAMSIZ 16
++
++struct ipt_route_target_info {
++ char oif[IPT_ROUTE_IFNAMSIZ]; /* Output Interface Name */
++ char iif[IPT_ROUTE_IFNAMSIZ]; /* Input Interface Name */
++ u_int32_t gw; /* IP address of gateway */
++ u_int8_t flags;
++};
++
++/* Values for "flags" field */
++#define IPT_ROUTE_CONTINUE 0x01
++#define IPT_ROUTE_TEE 0x02
++
++#endif /*_IPT_ROUTE_H_target*/
+diff -urN linux-2.6.19.old/include/linux/netfilter_ipv6/ip6t_ROUTE.h linux-2.6.19.dev/include/linux/netfilter_ipv6/ip6t_ROUTE.h
+--- linux-2.6.19.old/include/linux/netfilter_ipv6/ip6t_ROUTE.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/include/linux/netfilter_ipv6/ip6t_ROUTE.h 2006-12-14 03:13:49.000000000 +0100
+@@ -0,0 +1,23 @@
++/* Header file for iptables ip6t_ROUTE target
++ *
++ * (C) 2003 by Cédric de Launois <delaunois@info.ucl.ac.be>
++ *
++ * This software is distributed under GNU GPL v2, 1991
++ */
++#ifndef _IPT_ROUTE_H_target
++#define _IPT_ROUTE_H_target
++
++#define IP6T_ROUTE_IFNAMSIZ 16
++
++struct ip6t_route_target_info {
++ char oif[IP6T_ROUTE_IFNAMSIZ]; /* Output Interface Name */
++ char iif[IP6T_ROUTE_IFNAMSIZ]; /* Input Interface Name */
++ u_int32_t gw[4]; /* IPv6 address of gateway */
++ u_int8_t flags;
++};
++
++/* Values for "flags" field */
++#define IP6T_ROUTE_CONTINUE 0x01
++#define IP6T_ROUTE_TEE 0x02
++
++#endif /*_IP6T_ROUTE_H_target*/
+diff -urN linux-2.6.19.old/net/ipv4/netfilter/ipt_ROUTE.c linux-2.6.19.dev/net/ipv4/netfilter/ipt_ROUTE.c
+--- linux-2.6.19.old/net/ipv4/netfilter/ipt_ROUTE.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/netfilter/ipt_ROUTE.c 2006-12-14 03:13:49.000000000 +0100
+@@ -0,0 +1,455 @@
++/*
++ * This implements the ROUTE target, which enables you to setup unusual
++ * routes not supported by the standard kernel routing table.
++ *
++ * Copyright (C) 2002 Cedric de Launois <delaunois@info.ucl.ac.be>
++ *
++ * v 1.11 2004/11/23
++ *
++ * This software is distributed under GNU GPL v2, 1991
++ */
++
++#include <linux/module.h>
++#include <linux/skbuff.h>
++#include <linux/ip.h>
++#include <linux/netfilter_ipv4/ip_tables.h>
++#include <linux/netfilter_ipv4/ip_conntrack.h>
++#include <linux/netfilter_ipv4/ipt_ROUTE.h>
++#include <linux/netdevice.h>
++#include <linux/route.h>
++#include <linux/if_arp.h>
++#include <net/ip.h>
++#include <net/route.h>
++#include <net/icmp.h>
++#include <net/checksum.h>
++
++#if 0
++#define DEBUGP printk
++#else
++#define DEBUGP(format, args...)
++#endif
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Cedric de Launois <delaunois@info.ucl.ac.be>");
++MODULE_DESCRIPTION("iptables ROUTE target module");
++
++/* Try to route the packet according to the routing keys specified in
++ * route_info. Keys are :
++ * - ifindex :
++ * 0 if no oif preferred,
++ * otherwise set to the index of the desired oif
++ * - route_info->gw :
++ * 0 if no gateway specified,
++ * otherwise set to the next host to which the pkt must be routed
++ * If success, skb->dev is the output device to which the packet must
++ * be sent and skb->dst is not NULL
++ *
++ * RETURN: -1 if an error occured
++ * 1 if the packet was succesfully routed to the
++ * destination desired
++ * 0 if the kernel routing table could not route the packet
++ * according to the keys specified
++ */
++static int route(struct sk_buff *skb,
++ unsigned int ifindex,
++ const struct ipt_route_target_info *route_info)
++{
++ int err;
++ struct rtable *rt;
++ struct iphdr *iph = skb->nh.iph;
++ struct flowi fl = {
++ .oif = ifindex,
++ .nl_u = {
++ .ip4_u = {
++ .daddr = iph->daddr,
++ .saddr = 0,
++ .tos = RT_TOS(iph->tos),
++ .scope = RT_SCOPE_UNIVERSE,
++ }
++ }
++ };
++
++ /* The destination address may be overloaded by the target */
++ if (route_info->gw)
++ fl.fl4_dst = route_info->gw;
++
++ /* Trying to route the packet using the standard routing table. */
++ if ((err = ip_route_output_key(&rt, &fl))) {
++ if (net_ratelimit())
++ DEBUGP("ipt_ROUTE: couldn't route pkt (err: %i)",err);
++ return -1;
++ }
++
++ /* Drop old route. */
++ dst_release(skb->dst);
++ skb->dst = NULL;
++
++ /* Success if no oif specified or if the oif correspond to the
++ * one desired */
++ if (!ifindex || rt->u.dst.dev->ifindex == ifindex) {
++ skb->dst = &rt->u.dst;
++ skb->dev = skb->dst->dev;
++ skb->protocol = htons(ETH_P_IP);
++ return 1;
++ }
++
++ /* The interface selected by the routing table is not the one
++ * specified by the user. This may happen because the dst address
++ * is one of our own addresses.
++ */
++ if (net_ratelimit())
++ DEBUGP("ipt_ROUTE: failed to route as desired gw=%u.%u.%u.%u oif=%i (got oif=%i)\n",
++ NIPQUAD(route_info->gw), ifindex, rt->u.dst.dev->ifindex);
++
++ return 0;
++}
++
++
++/* Stolen from ip_finish_output2
++ * PRE : skb->dev is set to the device we are leaving by
++ * skb->dst is not NULL
++ * POST: the packet is sent with the link layer header pushed
++ * the packet is destroyed
++ */
++static void ip_direct_send(struct sk_buff *skb)
++{
++ struct dst_entry *dst = skb->dst;
++ struct hh_cache *hh = dst->hh;
++ struct net_device *dev = dst->dev;
++ int hh_len = LL_RESERVED_SPACE(dev);
++
++ /* Be paranoid, rather than too clever. */
++ if (unlikely(skb_headroom(skb) < hh_len && dev->hard_header)) {
++ struct sk_buff *skb2;
++
++ skb2 = skb_realloc_headroom(skb, LL_RESERVED_SPACE(dev));
++ if (skb2 == NULL) {
++ kfree_skb(skb);
++ return;
++ }
++ if (skb->sk)
++ skb_set_owner_w(skb2, skb->sk);
++ kfree_skb(skb);
++ skb = skb2;
++ }
++
++ if (hh) {
++ int hh_alen;
++
++ read_lock_bh(&hh->hh_lock);
++ hh_alen = HH_DATA_ALIGN(hh->hh_len);
++ memcpy(skb->data - hh_alen, hh->hh_data, hh_alen);
++ read_unlock_bh(&hh->hh_lock);
++ skb_push(skb, hh->hh_len);
++ hh->hh_output(skb);
++ } else if (dst->neighbour)
++ dst->neighbour->output(skb);
++ else {
++ if (net_ratelimit())
++ DEBUGP(KERN_DEBUG "ipt_ROUTE: no hdr & no neighbour cache!\n");
++ kfree_skb(skb);
++ }
++}
++
++
++/* PRE : skb->dev is set to the device we are leaving by
++ * POST: - the packet is directly sent to the skb->dev device, without
++ * pushing the link layer header.
++ * - the packet is destroyed
++ */
++static inline int dev_direct_send(struct sk_buff *skb)
++{
++ return dev_queue_xmit(skb);
++}
++
++
++static unsigned int route_oif(const struct ipt_route_target_info *route_info,
++ struct sk_buff *skb)
++{
++ unsigned int ifindex = 0;
++ struct net_device *dev_out = NULL;
++
++ /* The user set the interface name to use.
++ * Getting the current interface index.
++ */
++ if ((dev_out = dev_get_by_name(route_info->oif))) {
++ ifindex = dev_out->ifindex;
++ } else {
++ /* Unknown interface name : packet dropped */
++ if (net_ratelimit())
++ DEBUGP("ipt_ROUTE: oif interface %s not found\n", route_info->oif);
++ return NF_DROP;
++ }
++
++ /* Trying the standard way of routing packets */
++ switch (route(skb, ifindex, route_info)) {
++ case 1:
++ dev_put(dev_out);
++ if (route_info->flags & IPT_ROUTE_CONTINUE)
++ return IPT_CONTINUE;
++
++ ip_direct_send(skb);
++ return NF_STOLEN;
++
++ case 0:
++ /* Failed to send to oif. Trying the hard way */
++ if (route_info->flags & IPT_ROUTE_CONTINUE)
++ return NF_DROP;
++
++ if (net_ratelimit())
++ DEBUGP("ipt_ROUTE: forcing the use of %i\n",
++ ifindex);
++
++ /* We have to force the use of an interface.
++ * This interface must be a tunnel interface since
++ * otherwise we can't guess the hw address for
++ * the packet. For a tunnel interface, no hw address
++ * is needed.
++ */
++ if ((dev_out->type != ARPHRD_TUNNEL)
++ && (dev_out->type != ARPHRD_IPGRE)) {
++ if (net_ratelimit())
++ DEBUGP("ipt_ROUTE: can't guess the hw addr !\n");
++ dev_put(dev_out);
++ return NF_DROP;
++ }
++
++ /* Send the packet. This will also free skb
++ * Do not go through the POST_ROUTING hook because
++ * skb->dst is not set and because it will probably
++ * get confused by the destination IP address.
++ */
++ skb->dev = dev_out;
++ dev_direct_send(skb);
++ dev_put(dev_out);
++ return NF_STOLEN;
++
++ default:
++ /* Unexpected error */
++ dev_put(dev_out);
++ return NF_DROP;
++ }
++}
++
++
++static unsigned int route_iif(const struct ipt_route_target_info *route_info,
++ struct sk_buff *skb)
++{
++ struct net_device *dev_in = NULL;
++
++ /* Getting the current interface index. */
++ if (!(dev_in = dev_get_by_name(route_info->iif))) {
++ if (net_ratelimit())
++ DEBUGP("ipt_ROUTE: iif interface %s not found\n", route_info->iif);
++ return NF_DROP;
++ }
++
++ skb->dev = dev_in;
++ dst_release(skb->dst);
++ skb->dst = NULL;
++
++ netif_rx(skb);
++ dev_put(dev_in);
++ return NF_STOLEN;
++}
++
++
++static unsigned int route_gw(const struct ipt_route_target_info *route_info,
++ struct sk_buff *skb)
++{
++ if (route(skb, 0, route_info)!=1)
++ return NF_DROP;
++
++ if (route_info->flags & IPT_ROUTE_CONTINUE)
++ return IPT_CONTINUE;
++
++ ip_direct_send(skb);
++ return NF_STOLEN;
++}
++
++
++/* To detect and deter routed packet loopback when using the --tee option,
++ * we take a page out of the raw.patch book: on the copied skb, we set up
++ * a fake ->nfct entry, pointing to the local &route_tee_track. We skip
++ * routing packets when we see they already have that ->nfct.
++ */
++
++static struct ip_conntrack route_tee_track;
++
++static unsigned int ipt_route_target(struct sk_buff **pskb,
++ const struct net_device *in,
++ const struct net_device *out,
++ unsigned int hooknum,
++ const struct xt_target *target,
++ const void *targinfo)
++{
++ const struct ipt_route_target_info *route_info = targinfo;
++ struct sk_buff *skb = *pskb;
++ unsigned int res;
++
++ if (skb->nfct == &route_tee_track.ct_general) {
++ /* Loopback - a packet we already routed, is to be
++ * routed another time. Avoid that, now.
++ */
++ if (net_ratelimit())
++ DEBUGP(KERN_DEBUG "ipt_ROUTE: loopback - DROP!\n");
++ return NF_DROP;
++ }
++
++ /* If we are at PREROUTING or INPUT hook
++ * the TTL isn't decreased by the IP stack
++ */
++ if (hooknum == NF_IP_PRE_ROUTING ||
++ hooknum == NF_IP_LOCAL_IN) {
++
++ struct iphdr *iph = skb->nh.iph;
++
++ if (iph->ttl <= 1) {
++ struct rtable *rt;
++ struct flowi fl = {
++ .oif = 0,
++ .nl_u = {
++ .ip4_u = {
++ .daddr = iph->daddr,
++ .saddr = iph->saddr,
++ .tos = RT_TOS(iph->tos),
++ .scope = ((iph->tos & RTO_ONLINK) ?
++ RT_SCOPE_LINK :
++ RT_SCOPE_UNIVERSE)
++ }
++ }
++ };
++
++ if (ip_route_output_key(&rt, &fl)) {
++ return NF_DROP;
++ }
++
++ if (skb->dev == rt->u.dst.dev) {
++ /* Drop old route. */
++ dst_release(skb->dst);
++ skb->dst = &rt->u.dst;
++
++ /* this will traverse normal stack, and
++ * thus call conntrack on the icmp packet */
++ icmp_send(skb, ICMP_TIME_EXCEEDED,
++ ICMP_EXC_TTL, 0);
++ }
++
++ return NF_DROP;
++ }
++
++ /*
++ * If we are at INPUT the checksum must be recalculated since
++ * the length could change as the result of a defragmentation.
++ */
++ if(hooknum == NF_IP_LOCAL_IN) {
++ iph->ttl = iph->ttl - 1;
++ iph->check = 0;
++ iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl);
++ } else {
++ ip_decrease_ttl(iph);
++ }
++ }
++
++ if ((route_info->flags & IPT_ROUTE_TEE)) {
++ /*
++ * Copy the *pskb, and route the copy. Will later return
++ * IPT_CONTINUE for the original skb, which should continue
++ * on its way as if nothing happened. The copy should be
++ * independantly delivered to the ROUTE --gw.
++ */
++ skb = skb_copy(*pskb, GFP_ATOMIC);
++ if (!skb) {
++ if (net_ratelimit())
++ DEBUGP(KERN_DEBUG "ipt_ROUTE: copy failed!\n");
++ return IPT_CONTINUE;
++ }
++ }
++
++ /* Tell conntrack to forget this packet since it may get confused
++ * when a packet is leaving with dst address == our address.
++ * Good idea ? Dunno. Need advice.
++ *
++ * NEW: mark the skb with our &route_tee_track, so we avoid looping
++ * on any already routed packet.
++ */
++ if (!(route_info->flags & IPT_ROUTE_CONTINUE)) {
++ nf_conntrack_put(skb->nfct);
++ skb->nfct = &route_tee_track.ct_general;
++ skb->nfctinfo = IP_CT_NEW;
++ nf_conntrack_get(skb->nfct);
++ }
++
++ if (route_info->oif[0] != '\0') {
++ res = route_oif(route_info, skb);
++ } else if (route_info->iif[0] != '\0') {
++ res = route_iif(route_info, skb);
++ } else if (route_info->gw) {
++ res = route_gw(route_info, skb);
++ } else {
++ if (net_ratelimit())
++ DEBUGP(KERN_DEBUG "ipt_ROUTE: no parameter !\n");
++ res = IPT_CONTINUE;
++ }
++
++ if ((route_info->flags & IPT_ROUTE_TEE))
++ res = IPT_CONTINUE;
++
++ return res;
++}
++
++
++static int ipt_route_checkentry(const char *tablename,
++ const void *e,
++ const struct xt_target *target,
++ void *targinfo,
++ unsigned int hook_mask)
++{
++ if (strcmp(tablename, "mangle") != 0) {
++ printk("ipt_ROUTE: bad table `%s', use the `mangle' table.\n",
++ tablename);
++ return 0;
++ }
++
++ if (hook_mask & ~( (1 << NF_IP_PRE_ROUTING)
++ | (1 << NF_IP_LOCAL_IN)
++ | (1 << NF_IP_FORWARD)
++ | (1 << NF_IP_LOCAL_OUT)
++ | (1 << NF_IP_POST_ROUTING))) {
++ printk("ipt_ROUTE: bad hook\n");
++ return 0;
++ }
++
++ return 1;
++}
++
++
++static struct ipt_target ipt_route_reg = {
++ .name = "ROUTE",
++ .target = ipt_route_target,
++ .targetsize = sizeof(struct ipt_route_target_info),
++ .checkentry = ipt_route_checkentry,
++ .me = THIS_MODULE,
++};
++
++static int __init init(void)
++{
++ /* Set up fake conntrack (stolen from raw.patch):
++ - to never be deleted, not in any hashes */
++ atomic_set(&route_tee_track.ct_general.use, 1);
++ /* - and look it like as a confirmed connection */
++ set_bit(IPS_CONFIRMED_BIT, &route_tee_track.status);
++ /* Initialize fake conntrack so that NAT will skip it */
++ route_tee_track.status |= IPS_NAT_DONE_MASK;
++
++ return ipt_register_target(&ipt_route_reg);
++}
++
++
++static void __exit fini(void)
++{
++ ipt_unregister_target(&ipt_route_reg);
++}
++
++module_init(init);
++module_exit(fini);
+diff -urN linux-2.6.19.old/net/ipv4/netfilter/Kconfig linux-2.6.19.dev/net/ipv4/netfilter/Kconfig
+--- linux-2.6.19.old/net/ipv4/netfilter/Kconfig 2006-12-14 03:13:49.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/netfilter/Kconfig 2006-12-14 03:13:49.000000000 +0100
+@@ -494,6 +494,23 @@
+
+ To compile it as a module, choose M here. If unsure, say N.
+
++config IP_NF_TARGET_ROUTE
++ tristate 'ROUTE target support'
++ depends on IP_NF_MANGLE
++ help
++ This option adds a `ROUTE' target, which enables you to setup unusual
++ routes. For example, the ROUTE lets you route a received packet through
++ an interface or towards a host, even if the regular destination of the
++ packet is the router itself. The ROUTE target is also able to change the
++ incoming interface of a packet.
++
++ The target can be or not a final target. It has to be used inside the
++ mangle table.
++
++ If you want to compile it as a module, say M here and read
++ Documentation/modules.txt. The module will be called ipt_ROUTE.o.
++ If unsure, say `N'.
++
+ config IP_NF_TARGET_NETMAP
+ tristate "NETMAP target support"
+ depends on IP_NF_NAT
+diff -urN linux-2.6.19.old/net/ipv4/netfilter/Makefile linux-2.6.19.dev/net/ipv4/netfilter/Makefile
+--- linux-2.6.19.old/net/ipv4/netfilter/Makefile 2006-12-14 03:13:49.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/netfilter/Makefile 2006-12-14 03:13:49.000000000 +0100
+@@ -74,6 +74,7 @@
+ obj-$(CONFIG_IP_NF_TARGET_IMQ) += ipt_IMQ.o
+ obj-$(CONFIG_IP_NF_TARGET_MASQUERADE) += ipt_MASQUERADE.o
+ obj-$(CONFIG_IP_NF_TARGET_REDIRECT) += ipt_REDIRECT.o
++obj-$(CONFIG_IP_NF_TARGET_ROUTE) += ipt_ROUTE.o
+ obj-$(CONFIG_IP_NF_TARGET_NETMAP) += ipt_NETMAP.o
+ obj-$(CONFIG_IP_NF_TARGET_SAME) += ipt_SAME.o
+ obj-$(CONFIG_IP_NF_NAT_SNMP_BASIC) += ip_nat_snmp_basic.o
+diff -urN linux-2.6.19.old/net/ipv6/ipv6_syms.c linux-2.6.19.dev/net/ipv6/ipv6_syms.c
+--- linux-2.6.19.old/net/ipv6/ipv6_syms.c 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/net/ipv6/ipv6_syms.c 2006-12-14 03:13:49.000000000 +0100
+@@ -11,6 +11,7 @@
+ EXPORT_SYMBOL(icmpv6_statistics);
+ EXPORT_SYMBOL(icmpv6_err_convert);
+ EXPORT_SYMBOL(ndisc_mc_map);
++EXPORT_SYMBOL(nd_tbl);
+ EXPORT_SYMBOL(register_inet6addr_notifier);
+ EXPORT_SYMBOL(unregister_inet6addr_notifier);
+ EXPORT_SYMBOL(ip6_route_output);
+diff -urN linux-2.6.19.old/net/ipv6/netfilter/ip6t_ROUTE.c linux-2.6.19.dev/net/ipv6/netfilter/ip6t_ROUTE.c
+--- linux-2.6.19.old/net/ipv6/netfilter/ip6t_ROUTE.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/net/ipv6/netfilter/ip6t_ROUTE.c 2006-12-14 03:13:49.000000000 +0100
+@@ -0,0 +1,302 @@
++/*
++ * This implements the ROUTE v6 target, which enables you to setup unusual
++ * routes not supported by the standard kernel routing table.
++ *
++ * Copyright (C) 2003 Cedric de Launois <delaunois@info.ucl.ac.be>
++ *
++ * v 1.1 2004/11/23
++ *
++ * This software is distributed under GNU GPL v2, 1991
++ */
++
++#include <linux/module.h>
++#include <linux/skbuff.h>
++#include <linux/ipv6.h>
++#include <linux/netfilter_ipv6/ip6_tables.h>
++#include <linux/netfilter_ipv6/ip6t_ROUTE.h>
++#include <linux/netdevice.h>
++#include <net/ipv6.h>
++#include <net/ndisc.h>
++#include <net/ip6_route.h>
++#include <linux/icmpv6.h>
++
++#if 1
++#define DEBUGP printk
++#else
++#define DEBUGP(format, args...)
++#endif
++
++#define NIP6(addr) \
++ ntohs((addr).s6_addr16[0]), \
++ ntohs((addr).s6_addr16[1]), \
++ ntohs((addr).s6_addr16[2]), \
++ ntohs((addr).s6_addr16[3]), \
++ ntohs((addr).s6_addr16[4]), \
++ ntohs((addr).s6_addr16[5]), \
++ ntohs((addr).s6_addr16[6]), \
++ ntohs((addr).s6_addr16[7])
++
++/* Route the packet according to the routing keys specified in
++ * route_info. Keys are :
++ * - ifindex :
++ * 0 if no oif preferred,
++ * otherwise set to the index of the desired oif
++ * - route_info->gw :
++ * 0 if no gateway specified,
++ * otherwise set to the next host to which the pkt must be routed
++ * If success, skb->dev is the output device to which the packet must
++ * be sent and skb->dst is not NULL
++ *
++ * RETURN: 1 if the packet was succesfully routed to the
++ * destination desired
++ * 0 if the kernel routing table could not route the packet
++ * according to the keys specified
++ */
++static int
++route6(struct sk_buff *skb,
++ unsigned int ifindex,
++ const struct ip6t_route_target_info *route_info)
++{
++ struct rt6_info *rt = NULL;
++ struct ipv6hdr *ipv6h = skb->nh.ipv6h;
++ struct in6_addr *gw = (struct in6_addr*)&route_info->gw;
++
++ DEBUGP("ip6t_ROUTE: called with: ");
++ DEBUGP("DST=%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x ", NIP6(ipv6h->daddr));
++ DEBUGP("GATEWAY=%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x ", NIP6(*gw));
++ DEBUGP("OUT=%s\n", route_info->oif);
++
++ if (ipv6_addr_any(gw))
++ rt = rt6_lookup(&ipv6h->daddr, &ipv6h->saddr, ifindex, 1);
++ else
++ rt = rt6_lookup(gw, &ipv6h->saddr, ifindex, 1);
++
++ if (!rt)
++ goto no_route;
++
++ DEBUGP("ip6t_ROUTE: routing gives: ");
++ DEBUGP("DST=%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x ", NIP6(rt->rt6i_dst.addr));
++ DEBUGP("GATEWAY=%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x ", NIP6(rt->rt6i_gateway));
++ DEBUGP("OUT=%s\n", rt->rt6i_dev->name);
++
++ if (ifindex && rt->rt6i_dev->ifindex!=ifindex)
++ goto wrong_route;
++
++ if (!rt->rt6i_nexthop) {
++ DEBUGP("ip6t_ROUTE: discovering neighbour\n");
++ rt->rt6i_nexthop = ndisc_get_neigh(rt->rt6i_dev, &rt->rt6i_dst.addr);
++ }
++
++ /* Drop old route. */
++ dst_release(skb->dst);
++ skb->dst = &rt->u.dst;
++ skb->dev = rt->rt6i_dev;
++ return 1;
++
++ wrong_route:
++ dst_release(&rt->u.dst);
++ no_route:
++ if (!net_ratelimit())
++ return 0;
++
++ printk("ip6t_ROUTE: no explicit route found ");
++ if (ifindex)
++ printk("via interface %s ", route_info->oif);
++ if (!ipv6_addr_any(gw))
++ printk("via gateway %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x", NIP6(*gw));
++ printk("\n");
++ return 0;
++}
++
++
++/* Stolen from ip6_output_finish
++ * PRE : skb->dev is set to the device we are leaving by
++ * skb->dst is not NULL
++ * POST: the packet is sent with the link layer header pushed
++ * the packet is destroyed
++ */
++static void ip_direct_send(struct sk_buff *skb)
++{
++ struct dst_entry *dst = skb->dst;
++ struct hh_cache *hh = dst->hh;
++
++ if (hh) {
++ read_lock_bh(&hh->hh_lock);
++ memcpy(skb->data - 16, hh->hh_data, 16);
++ read_unlock_bh(&hh->hh_lock);
++ skb_push(skb, hh->hh_len);
++ hh->hh_output(skb);
++ } else if (dst->neighbour)
++ dst->neighbour->output(skb);
++ else {
++ if (net_ratelimit())
++ DEBUGP(KERN_DEBUG "ip6t_ROUTE: no hdr & no neighbour cache!\n");
++ kfree_skb(skb);
++ }
++}
++
++
++static unsigned int
++route6_oif(const struct ip6t_route_target_info *route_info,
++ struct sk_buff *skb)
++{
++ unsigned int ifindex = 0;
++ struct net_device *dev_out = NULL;
++
++ /* The user set the interface name to use.
++ * Getting the current interface index.
++ */
++ if ((dev_out = dev_get_by_name(route_info->oif))) {
++ ifindex = dev_out->ifindex;
++ } else {
++ /* Unknown interface name : packet dropped */
++ if (net_ratelimit())
++ DEBUGP("ip6t_ROUTE: oif interface %s not found\n", route_info->oif);
++
++ if (route_info->flags & IP6T_ROUTE_CONTINUE)
++ return IP6T_CONTINUE;
++ else
++ return NF_DROP;
++ }
++
++ /* Trying the standard way of routing packets */
++ if (route6(skb, ifindex, route_info)) {
++ dev_put(dev_out);
++ if (route_info->flags & IP6T_ROUTE_CONTINUE)
++ return IP6T_CONTINUE;
++
++ ip_direct_send(skb);
++ return NF_STOLEN;
++ } else
++ return NF_DROP;
++}
++
++
++static unsigned int
++route6_gw(const struct ip6t_route_target_info *route_info,
++ struct sk_buff *skb)
++{
++ if (route6(skb, 0, route_info)) {
++ if (route_info->flags & IP6T_ROUTE_CONTINUE)
++ return IP6T_CONTINUE;
++
++ ip_direct_send(skb);
++ return NF_STOLEN;
++ } else
++ return NF_DROP;
++}
++
++
++static unsigned int
++ip6t_route_target(struct sk_buff **pskb,
++ const struct net_device *in,
++ const struct net_device *out,
++ unsigned int hooknum,
++ const struct xt_target *target,
++ const void *targinfo)
++{
++ const struct ip6t_route_target_info *route_info = targinfo;
++ struct sk_buff *skb = *pskb;
++ struct in6_addr *gw = (struct in6_addr*)&route_info->gw;
++ unsigned int res;
++
++ if (route_info->flags & IP6T_ROUTE_CONTINUE)
++ goto do_it;
++
++ /* If we are at PREROUTING or INPUT hook
++ * the TTL isn't decreased by the IP stack
++ */
++ if (hooknum == NF_IP6_PRE_ROUTING ||
++ hooknum == NF_IP6_LOCAL_IN) {
++
++ struct ipv6hdr *ipv6h = skb->nh.ipv6h;
++
++ if (ipv6h->hop_limit <= 1) {
++ /* Force OUTPUT device used as source address */
++ skb->dev = skb->dst->dev;
++
++ icmpv6_send(skb, ICMPV6_TIME_EXCEED,
++ ICMPV6_EXC_HOPLIMIT, 0, skb->dev);
++
++ return NF_DROP;
++ }
++
++ ipv6h->hop_limit--;
++ }
++
++ if ((route_info->flags & IP6T_ROUTE_TEE)) {
++ /*
++ * Copy the *pskb, and route the copy. Will later return
++ * IP6T_CONTINUE for the original skb, which should continue
++ * on its way as if nothing happened. The copy should be
++ * independantly delivered to the ROUTE --gw.
++ */
++ skb = skb_copy(*pskb, GFP_ATOMIC);
++ if (!skb) {
++ if (net_ratelimit())
++ DEBUGP(KERN_DEBUG "ip6t_ROUTE: copy failed!\n");
++ return IP6T_CONTINUE;
++ }
++ }
++
++do_it:
++ if (route_info->oif[0]) {
++ res = route6_oif(route_info, skb);
++ } else if (!ipv6_addr_any(gw)) {
++ res = route6_gw(route_info, skb);
++ } else {
++ if (net_ratelimit())
++ DEBUGP(KERN_DEBUG "ip6t_ROUTE: no parameter !\n");
++ res = IP6T_CONTINUE;
++ }
++
++ if ((route_info->flags & IP6T_ROUTE_TEE))
++ res = IP6T_CONTINUE;
++
++ return res;
++}
++
++
++static int
++ip6t_route_checkentry(const char *tablename,
++ const void *e,
++ const struct xt_target *target,
++ void *targinfo,
++ unsigned int hook_mask)
++{
++ if (strcmp(tablename, "mangle") != 0) {
++ printk("ip6t_ROUTE: can only be called from \"mangle\" table.\n");
++ return 0;
++ }
++
++ return 1;
++}
++
++
++static struct ip6t_target ip6t_route_reg = {
++ .name = "ROUTE",
++ .target = ip6t_route_target,
++ .targetsize = sizeof(struct ip6t_route_target_info),
++ .checkentry = ip6t_route_checkentry,
++ .me = THIS_MODULE
++};
++
++
++static int __init init(void)
++{
++ printk(KERN_DEBUG "registering ipv6 ROUTE target\n");
++ if (ip6t_register_target(&ip6t_route_reg))
++ return -EINVAL;
++
++ return 0;
++}
++
++
++static void __exit fini(void)
++{
++ ip6t_unregister_target(&ip6t_route_reg);
++}
++
++module_init(init);
++module_exit(fini);
++MODULE_LICENSE("GPL");
+diff -urN linux-2.6.19.old/net/ipv6/netfilter/Kconfig linux-2.6.19.dev/net/ipv6/netfilter/Kconfig
+--- linux-2.6.19.old/net/ipv6/netfilter/Kconfig 2006-12-14 03:13:49.000000000 +0100
++++ linux-2.6.19.dev/net/ipv6/netfilter/Kconfig 2006-12-14 03:13:49.000000000 +0100
+@@ -162,6 +162,19 @@
+
+ To compile it as a module, choose M here. If unsure, say N.
+
++config IP6_NF_TARGET_ROUTE
++ tristate "ROUTE target support"
++ depends on IP6_NF_MANGLE
++ help
++ This option adds a `ROUTE' target, which enables you to setup unusual
++ routes. The ROUTE target is also able to change the incoming interface
++ of a packet.
++
++ The target can be or not a final target. It has to be used inside the
++ mangle table.
++
++ Not working as a module.
++
+ config IP6_NF_MANGLE
+ tristate "Packet mangling"
+ depends on IP6_NF_IPTABLES
+diff -urN linux-2.6.19.old/net/ipv6/netfilter/Makefile linux-2.6.19.dev/net/ipv6/netfilter/Makefile
+--- linux-2.6.19.old/net/ipv6/netfilter/Makefile 2006-12-14 03:13:49.000000000 +0100
++++ linux-2.6.19.dev/net/ipv6/netfilter/Makefile 2006-12-14 03:13:49.000000000 +0100
+@@ -20,6 +20,7 @@
+ obj-$(CONFIG_IP6_NF_RAW) += ip6table_raw.o
+ obj-$(CONFIG_IP6_NF_MATCH_HL) += ip6t_hl.o
+ obj-$(CONFIG_IP6_NF_TARGET_REJECT) += ip6t_REJECT.o
++obj-$(CONFIG_IP6_NF_TARGET_ROUTE) += ip6t_ROUTE.o
+
+ # objects for l3 independent conntrack
+ nf_conntrack_ipv6-objs := nf_conntrack_l3proto_ipv6.o nf_conntrack_proto_icmpv6.o nf_conntrack_reasm.o
--- /dev/null
+diff -ruN linux-2.6.19.1.orig/include/linux/netfilter/xt_CHAOS.h linux-2.6.19.1/include/linux/netfilter/xt_CHAOS.h
+--- linux-2.6.19.1.orig/include/linux/netfilter/xt_CHAOS.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.1/include/linux/netfilter/xt_CHAOS.h 2007-01-11 13:28:07.656144799 +0100
+@@ -0,0 +1,14 @@
++#ifndef _LINUX_XT_CHAOS_H
++#define _LINUX_XT_CHAOS_H 1
++
++enum xt_chaos_variant {
++ XTCHAOS_NORMAL,
++ XTCHAOS_TARPIT,
++ XTCHAOS_DELUDE,
++};
++
++struct xt_chaos_info {
++ enum xt_chaos_variant variant;
++};
++
++#endif /* _LINUX_XT_CHAOS_H */
+diff -ruN linux-2.6.19.1.orig/include/linux/netfilter/xt_portscan.h linux-2.6.19.1/include/linux/netfilter/xt_portscan.h
+--- linux-2.6.19.1.orig/include/linux/netfilter/xt_portscan.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.1/include/linux/netfilter/xt_portscan.h 2007-01-11 13:28:07.656144799 +0100
+@@ -0,0 +1,8 @@
++#ifndef _LINUX_XT_PORTSCAN_H
++#define _LINUX_XT_PORTSCAN_H 1
++
++struct xt_portscan_info {
++ unsigned int match_stealth, match_syn, match_cn, match_gr;
++};
++
++#endif /* _LINUX_XT_PORTSCAN_H */
+diff -ruN linux-2.6.19.1.orig/net/netfilter/find_match.c linux-2.6.19.1/net/netfilter/find_match.c
+--- linux-2.6.19.1.orig/net/netfilter/find_match.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.1/net/netfilter/find_match.c 2007-01-11 13:28:12.191994379 +0100
+@@ -0,0 +1,37 @@
++/*
++ xt_request_find_match
++ by Jan Engelhardt <jengelh [at] gmx de>, 2006 - 2007
++
++ Based upon linux-2.6.18.5/net/netfilter/x_tables.c:
++ Copyright (C) 2006-2006 Harald Welte <laforge@netfilter.org>
++ This program is free software; you can redistribute it and/or modify
++ it under the terms of the GNU General Public License version 2 as
++ published by the Free Software Foundation.
++*/
++
++#include <linux/err.h>
++#include <linux/netfilter_arp.h>
++#include <linux/socket.h>
++#include <linux/netfilter/x_tables.h>
++
++/*
++ * Yeah this code is sub-optimal, but the function is missing in
++ * mainline so far. -jengelh
++ */
++static struct xt_match *xt_request_find_match(int af, const char *name,
++ u8 revision)
++{
++ static const char *const xt_prefix[] = {
++ [AF_INET] = "ip",
++ [AF_INET6] = "ip6",
++ [NF_ARP] = "arp",
++ };
++ struct xt_match *match;
++
++ match = try_then_request_module(xt_find_match(af, name, revision),
++ "%st_%s", xt_prefix[af], name);
++ if(IS_ERR(match) || match == NULL)
++ return NULL;
++
++ return match;
++}
+diff -ruN linux-2.6.19.1.orig/net/netfilter/Kconfig linux-2.6.19.1/net/netfilter/Kconfig
+--- linux-2.6.19.1.orig/net/netfilter/Kconfig 2007-01-11 13:27:24.445577700 +0100
++++ linux-2.6.19.1/net/netfilter/Kconfig 2007-01-11 13:28:09.092097179 +0100
+@@ -122,6 +122,14 @@
+
+ # alphabetically ordered list of targets
+
++config NETFILTER_XT_TARGET_CHAOS
++ tristate '"CHAOS" target support'
++ depends on NETFILTER_XTABLES
++ help
++ This option adds a `CHAOS' target.
++
++ To compile it as a module, choose M here. If unsure, say N.
++
+ config NETFILTER_XT_TARGET_CLASSIFY
+ tristate '"CLASSIFY" target support'
+ depends on NETFILTER_XTABLES
+@@ -148,6 +156,14 @@
+ <file:Documentation/modules.txt>. The module will be called
+ ipt_CONNMARK.o. If unsure, say `N'.
+
++config NETFILTER_XT_TARGET_DELUDE
++ tristate '"DELUDE" target support'
++ depends on NETFILTER_XTABLES
++ help
++ This option adds a `DELUDE' target.
++
++ To compile it as a module, choose M here. If unsure, say N.
++
+ config NETFILTER_XT_TARGET_DSCP
+ tristate '"DSCP" target support'
+ depends on NETFILTER_XTABLES
+@@ -355,6 +371,14 @@
+
+ To compile it as a module, choose M here. If unsure, say N.
+
++config NETFILTER_XT_MATCH_PORTSCAN
++ tristate '"portscan" match support'
++ depends on NETFILTER_XTABLES
++ help
++ This option adds a 'portscan' match support.
++
++ To compile it as a module, choose M here. If unsure, say N.
++
+ config NETFILTER_XT_MATCH_MULTIPORT
+ tristate "Multiple port match support"
+ depends on NETFILTER_XTABLES
+diff -ruN linux-2.6.19.1.orig/net/netfilter/Makefile linux-2.6.19.1/net/netfilter/Makefile
+--- linux-2.6.19.1.orig/net/netfilter/Makefile 2007-01-11 13:27:24.445577700 +0100
++++ linux-2.6.19.1/net/netfilter/Makefile 2007-01-11 13:28:07.656144799 +0100
+@@ -23,8 +23,10 @@
+ obj-$(CONFIG_NETFILTER_XTABLES) += x_tables.o xt_tcpudp.o
+
+ # targets
++obj-$(CONFIG_NETFILTER_XT_TARGET_CHAOS) += xt_CHAOS.o
+ obj-$(CONFIG_NETFILTER_XT_TARGET_CLASSIFY) += xt_CLASSIFY.o
+ obj-$(CONFIG_NETFILTER_XT_TARGET_CONNMARK) += xt_CONNMARK.o
++obj-$(CONFIG_NETFILTER_XT_TARGET_DELUDE) += xt_DELUDE.o
+ obj-$(CONFIG_NETFILTER_XT_TARGET_DSCP) += xt_DSCP.o
+ obj-$(CONFIG_NETFILTER_XT_TARGET_MARK) += xt_MARK.o
+ obj-$(CONFIG_NETFILTER_XT_TARGET_NFQUEUE) += xt_NFQUEUE.o
+@@ -47,6 +49,7 @@
+ obj-$(CONFIG_NETFILTER_XT_MATCH_MARK) += xt_mark.o
+ obj-$(CONFIG_NETFILTER_XT_MATCH_MULTIPORT) += xt_multiport.o
+ obj-$(CONFIG_NETFILTER_XT_MATCH_POLICY) += xt_policy.o
++obj-$(CONFIG_NETFILTER_XT_MATCH_PORTSCAN) += xt_portscan.o
+ obj-$(CONFIG_NETFILTER_XT_MATCH_PKTTYPE) += xt_pkttype.o
+ obj-$(CONFIG_NETFILTER_XT_MATCH_QUOTA) += xt_quota.o
+ obj-$(CONFIG_NETFILTER_XT_MATCH_REALM) += xt_realm.o
+diff -ruN linux-2.6.19.1.orig/net/netfilter/xt_CHAOS.c linux-2.6.19.1/net/netfilter/xt_CHAOS.c
+--- linux-2.6.19.1.orig/net/netfilter/xt_CHAOS.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.1/net/netfilter/xt_CHAOS.c 2007-01-11 13:28:14.407920893 +0100
+@@ -0,0 +1,180 @@
++/*
++ CHAOS target for netfilter
++
++ Copyright © Jan Engelhardt <jengelh [at] gmx de>, 2006 - 2007
++ released under the terms of the GNU General Public
++ License version 2.x and only versions 2.x.
++*/
++#include <linux/icmp.h>
++#include <linux/in.h>
++#include <linux/ip.h>
++#include <linux/module.h>
++#include <linux/skbuff.h>
++#include <linux/stat.h>
++#include <linux/netfilter/x_tables.h>
++#include <linux/netfilter/xt_tcpudp.h>
++#include <linux/netfilter_ipv4/ipt_REJECT.h>
++#include <net/ip.h>
++#include <linux/netfilter/xt_CHAOS.h>
++#include "find_match.c"
++#define PFX KBUILD_MODNAME ": "
++
++/* Out of tree workarounds */
++#include <linux/version.h>
++#if LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 18)
++# define HAVE_TARGUSERINFO 1
++#endif
++
++/* Module parameters */
++static unsigned int reject_percentage = ~0U * .01;
++static unsigned int delude_percentage = ~0U * .0101;
++module_param(reject_percentage, uint, S_IRUGO | S_IWUSR);
++module_param(delude_percentage, uint, S_IRUGO | S_IWUSR);
++
++/* References to other matches/targets */
++static struct xt_match *xm_tcp;
++static struct xt_target *xt_delude, *xt_reject, *xt_tarpit;
++
++/* Static data for other matches/targets */
++static const struct ipt_reject_info reject_params = {
++ .with = ICMP_HOST_UNREACH,
++};
++
++static const struct xt_tcp tcp_params = {
++ .spts = {0, ~0},
++ .dpts = {0, ~0},
++};
++
++/* CHAOS functions */
++static void xt_chaos_total(const struct xt_chaos_info *info,
++ struct sk_buff **pskb, const struct net_device *in,
++ const struct net_device *out, unsigned int hooknum)
++{
++ const int protoff = 4 * (*pskb)->nh.iph->ihl;
++ const int offset = ntohs((*pskb)->nh.iph->frag_off) & IP_OFFSET;
++ const struct xt_target *destiny;
++ int hotdrop = 0, ret;
++
++ ret = xm_tcp->match(*pskb, in, out, xm_tcp, &tcp_params,
++ offset, protoff, &hotdrop);
++ if(!ret || hotdrop || (unsigned int)net_random() > delude_percentage)
++ return;
++
++ destiny = (info->variant == XTCHAOS_TARPIT) ? xt_tarpit : xt_delude;
++#ifdef HAVE_TARGUSERINFO
++ destiny->target(pskb, in, out, hooknum, destiny, NULL, NULL);
++#else
++ destiny->target(pskb, in, out, hooknum, destiny, NULL);
++#endif
++ return;
++}
++
++static unsigned int xt_chaos_target(struct sk_buff **pskb,
++ const struct net_device *in, const struct net_device *out,
++ unsigned int hooknum, const struct xt_target *target, const void *targinfo
++#ifdef HAVE_TARGUSERINFO
++ ,
++ void *userinfo
++#endif
++ )
++{
++ /* Equivalent to:
++ * -A chaos -m statistic --mode random --probability \
++ * $reject_percentage -j REJECT --reject-with host-unreach;
++ * -A chaos -m statistic --mode random --probability \
++ * $delude_percentage -j DELUDE;
++ * -A chaos -j DROP;
++ */
++ const struct xt_chaos_info *info = targinfo;
++
++ if((unsigned int)net_random() <= reject_percentage)
++#ifdef HAVE_TARGUSERINFO
++ return xt_reject->target(pskb, in, out, hooknum, target,
++ &reject_params, userinfo);
++#else
++ return xt_reject->target(pskb, in, out, hooknum, target,
++ &reject_params);
++#endif
++
++ /* TARPIT/DELUDE may not be called from the OUTPUT chain */
++ if((*pskb)->nh.iph->protocol == IPPROTO_TCP &&
++ info->variant != XTCHAOS_NORMAL && hooknum != NF_IP_LOCAL_OUT)
++ xt_chaos_total(info, pskb, in, out, hooknum);
++
++ return NF_DROP;
++}
++
++static struct xt_target xt_chaos_info = {
++ .name = "CHAOS",
++ .target = xt_chaos_target,
++ .table = "filter",
++ .targetsize = sizeof(struct xt_chaos_info),
++ .hooks = (1 << NF_IP_LOCAL_IN) | (1 << NF_IP_FORWARD) |
++ (1 << NF_IP_LOCAL_OUT),
++ .family = AF_INET,
++ .me = THIS_MODULE,
++};
++
++static int __init xt_chaos_init(void)
++{
++ int ret = -EINVAL;
++
++ xm_tcp = xt_request_find_match(AF_INET, "tcp", 0);
++ if(xm_tcp == NULL) {
++ printk(KERN_WARNING PFX "Could not find \"tcp\" match\n");
++ return -EINVAL;
++ }
++
++ xt_reject = xt_request_find_target(AF_INET, "REJECT", 0);
++ if(xt_reject == NULL) {
++ printk(KERN_WARNING PFX "Could not find \"REJECT\" target\n");
++ goto out2;
++ }
++
++ xt_tarpit = xt_request_find_target(AF_INET, "TARPIT", 0);
++ if(xt_tarpit == NULL) {
++ printk(KERN_WARNING PFX "Could not find \"TARPIT\" target\n");
++ goto out3;
++ }
++
++ xt_delude = xt_request_find_target(AF_INET, "DELUDE", 0);
++ if(xt_delude == NULL) {
++ printk(KERN_WARNING PFX "Could not find \"DELUDE\" target\n");
++ goto out4;
++ }
++
++ if((ret = xt_register_target(&xt_chaos_info)) != 0) {
++ printk(KERN_WARNING PFX "xt_register_target returned "
++ "error %d\n", ret);
++ goto out5;
++ }
++
++ return 0;
++
++ out5:
++ module_put(xt_delude->me);
++ out4:
++ module_put(xt_tarpit->me);
++ out3:
++ module_put(xt_reject->me);
++ out2:
++ module_put(xm_tcp->me);
++ return ret;
++}
++
++static void __exit xt_chaos_exit(void)
++{
++ xt_unregister_target(&xt_chaos_info);
++ module_put(xm_tcp->me);
++ module_put(xt_reject->me);
++ module_put(xt_delude->me);
++ module_put(xt_tarpit->me);
++ return;
++}
++
++module_init(xt_chaos_init);
++module_exit(xt_chaos_exit);
++MODULE_AUTHOR("Jan Engelhardt <jengelh@gmx.de>");
++MODULE_DESCRIPTION("netfilter CHAOS target");
++MODULE_LICENSE("GPL");
++MODULE_ALIAS("ipt_CHAOS");
+diff -ruN linux-2.6.19.1.orig/net/netfilter/xt_DELUDE.c linux-2.6.19.1/net/netfilter/xt_DELUDE.c
+--- linux-2.6.19.1.orig/net/netfilter/xt_DELUDE.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.1/net/netfilter/xt_DELUDE.c 2007-01-11 13:28:07.656144799 +0100
+@@ -0,0 +1,265 @@
++/*
++ DELUDE target
++ Copyright © Jan Engelhardt <jengelh [at] gmx de>, 2007
++
++ Based upon linux-2.6.18.5/net/ipv4/netfilter/ipt_REJECT.c:
++ (C) 1999-2001 Paul `Rusty' Russell
++ (C) 2002-2004 Netfilter Core Team <coreteam@netfilter.org>
++
++ This program is free software; you can redistribute it and/or modify
++ it under the terms of the GNU General Public License version 2 as
++ published by the Free Software Foundation.
++*/
++
++#include <linux/module.h>
++#include <linux/skbuff.h>
++#include <linux/ip.h>
++#include <linux/tcp.h>
++#include <linux/udp.h>
++#include <linux/icmp.h>
++#include <net/icmp.h>
++#include <net/ip.h>
++#include <net/tcp.h>
++#include <net/route.h>
++#include <net/dst.h>
++#include <linux/netfilter_ipv4/ip_tables.h>
++#ifdef CONFIG_BRIDGE_NETFILTER
++#include <linux/netfilter_bridge.h>
++#endif
++#define PFX KBUILD_MODNAME ": "
++
++/* Out of tree workarounds */
++#include <linux/version.h>
++#if LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 18)
++# define HAVE_TARGINFOSIZE 1
++# define HAVE_TARGUSERINFO 1
++#endif
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20)
++# define nfmark mark
++#endif
++
++static inline struct rtable *route_reverse(struct sk_buff *skb,
++ struct tcphdr *tcph, int hook)
++{
++ struct iphdr *iph = skb->nh.iph;
++ struct dst_entry *odst;
++ struct flowi fl = {};
++ struct rtable *rt;
++
++ /* We don't require ip forwarding to be enabled to be able to
++ * send a RST reply for bridged traffic. */
++ if (hook != NF_IP_FORWARD
++#ifdef CONFIG_BRIDGE_NETFILTER
++ || (skb->nf_bridge && skb->nf_bridge->mask & BRNF_BRIDGED)
++#endif
++ ) {
++ fl.nl_u.ip4_u.daddr = iph->saddr;
++ if (hook == NF_IP_LOCAL_IN)
++ fl.nl_u.ip4_u.saddr = iph->daddr;
++ fl.nl_u.ip4_u.tos = RT_TOS(iph->tos);
++
++ if (ip_route_output_key(&rt, &fl) != 0)
++ return NULL;
++ } else {
++ /* non-local src, find valid iif to satisfy
++ * rp-filter when calling ip_route_input. */
++ fl.nl_u.ip4_u.daddr = iph->daddr;
++ if (ip_route_output_key(&rt, &fl) != 0)
++ return NULL;
++
++ odst = skb->dst;
++ if (ip_route_input(skb, iph->saddr, iph->daddr,
++ RT_TOS(iph->tos), rt->u.dst.dev) != 0) {
++ dst_release(&rt->u.dst);
++ return NULL;
++ }
++ dst_release(&rt->u.dst);
++ rt = (struct rtable *)skb->dst;
++ skb->dst = odst;
++
++ fl.nl_u.ip4_u.daddr = iph->saddr;
++ fl.nl_u.ip4_u.saddr = iph->daddr;
++ fl.nl_u.ip4_u.tos = RT_TOS(iph->tos);
++ }
++
++ if (rt->u.dst.error) {
++ dst_release(&rt->u.dst);
++ return NULL;
++ }
++
++ fl.proto = IPPROTO_TCP;
++ fl.fl_ip_sport = tcph->dest;
++ fl.fl_ip_dport = tcph->source;
++
++ xfrm_lookup((struct dst_entry **)&rt, &fl, NULL, 0);
++
++ return rt;
++}
++
++static void send_reset(struct sk_buff *oldskb, int hook)
++{
++ struct sk_buff *nskb;
++ struct iphdr *iph = oldskb->nh.iph;
++ struct tcphdr _otcph, *oth, *tcph;
++ struct rtable *rt;
++ u_int16_t tmp_port;
++ u_int32_t tmp_addr;
++ int hh_len;
++
++ /* IP header checks: fragment. */
++ if (oldskb->nh.iph->frag_off & htons(IP_OFFSET))
++ return;
++
++ oth = skb_header_pointer(oldskb, oldskb->nh.iph->ihl * 4,
++ sizeof(_otcph), &_otcph);
++ if (oth == NULL)
++ return;
++
++ /* DELUDE only answers SYN. */
++ if(!oth->syn || oth->ack || oth->fin || oth->rst)
++ return;
++
++ /* Check checksum */
++ if (nf_ip_checksum(oldskb, hook, iph->ihl * 4, IPPROTO_TCP))
++ return;
++
++ if ((rt = route_reverse(oldskb, oth, hook)) == NULL)
++ return;
++
++ hh_len = LL_RESERVED_SPACE(rt->u.dst.dev);
++
++ /* We need a linear, writeable skb. We also need to expand
++ headroom in case hh_len of incoming interface < hh_len of
++ outgoing interface */
++ nskb = skb_copy_expand(oldskb, hh_len, skb_tailroom(oldskb),
++ GFP_ATOMIC);
++ if (!nskb) {
++ dst_release(&rt->u.dst);
++ return;
++ }
++
++ dst_release(nskb->dst);
++ nskb->dst = &rt->u.dst;
++
++ /* This packet will not be the same as the other: clear nf fields */
++ nf_reset(nskb);
++ nskb->nfmark = 0;
++ skb_init_secmark(nskb);
++
++ tcph = (struct tcphdr *)((u_int32_t*)nskb->nh.iph + nskb->nh.iph->ihl);
++
++ /* Swap source and dest */
++ tmp_addr = nskb->nh.iph->saddr;
++ nskb->nh.iph->saddr = nskb->nh.iph->daddr;
++ nskb->nh.iph->daddr = tmp_addr;
++ tmp_port = tcph->source;
++ tcph->source = tcph->dest;
++ tcph->dest = tmp_port;
++
++ /* Truncate to length (no data) */
++ tcph->doff = sizeof(struct tcphdr)/4;
++ skb_trim(nskb, nskb->nh.iph->ihl*4 + sizeof(struct tcphdr));
++ nskb->nh.iph->tot_len = htons(nskb->len);
++
++ tcph->seq = oth->ack_seq;
++ tcph->ack_seq = 0;
++
++ /* Reset flags */
++ ((u_int8_t *)tcph)[13] = 0;
++ tcph->syn = tcph->ack = 1;
++
++ tcph->window = 0;
++ tcph->urg_ptr = 0;
++
++ /* Adjust TCP checksum */
++ tcph->check = 0;
++ tcph->check = tcp_v4_check(tcph, sizeof(struct tcphdr),
++ nskb->nh.iph->saddr,
++ nskb->nh.iph->daddr,
++ csum_partial((char *)tcph,
++ sizeof(struct tcphdr), 0));
++
++ /* Adjust IP TTL, DF */
++ nskb->nh.iph->ttl = dst_metric(nskb->dst, RTAX_HOPLIMIT);
++ /* Set DF, id = 0 */
++ nskb->nh.iph->frag_off = htons(IP_DF);
++ nskb->nh.iph->id = 0;
++
++ /* Adjust IP checksum */
++ nskb->nh.iph->check = 0;
++ nskb->nh.iph->check = ip_fast_csum((unsigned char *)nskb->nh.iph,
++ nskb->nh.iph->ihl);
++
++ /* "Never happens" */
++ if (nskb->len > dst_mtu(nskb->dst))
++ goto free_nskb;
++
++ nf_ct_attach(nskb, oldskb);
++
++ NF_HOOK(PF_INET, NF_IP_LOCAL_OUT, nskb, NULL, nskb->dst->dev,
++ dst_output);
++ return;
++
++ free_nskb:
++ kfree_skb(nskb);
++ return;
++}
++
++static unsigned int xt_delude_target(struct sk_buff **pskb,
++ const struct net_device *in, const struct net_device *out,
++ unsigned int hooknum, const struct xt_target *target, const void *targinfo
++#ifdef HAVE_TARGUSERINFO
++ ,
++ void *userinfo
++#endif
++ )
++{
++ /* WARNING: This code causes reentry within iptables.
++ This means that the iptables jump stack is now crap. We
++ must return an absolute verdict. --RR */
++ send_reset(*pskb, hooknum);
++ return NF_DROP;
++}
++
++static int xt_delude_check(const char *tablename, const void *e_void,
++ const struct xt_target *target, void *targinfo,
++#ifdef HAVE_TARGINFOSIZE
++ unsigned int targinfosize,
++#endif
++ unsigned int hook_mask)
++{
++ if(hook_mask & ~((1 << NF_IP_LOCAL_IN) | (1 << NF_IP_FORWARD))) {
++ printk(KERN_WARNING PFX "DELUDE may not be used in chains "
++ "other than INPUT and FORWARD\n");
++ return 0;
++ }
++ return 1;
++}
++
++static struct xt_target xt_delude_info = {
++ .name = "DELUDE",
++ .target = xt_delude_target,
++ .checkentry = xt_delude_check,
++ .table = "filter",
++ .hooks = (1 << NF_IP_LOCAL_IN) | (1 << NF_IP_FORWARD) |
++ (1 << NF_IP_LOCAL_OUT),
++ .proto = IPPROTO_TCP,
++ .family = AF_INET,
++ .me = THIS_MODULE,
++};
++
++static int __init xt_delude_init(void)
++{
++ return xt_register_target(&xt_delude_info);
++}
++
++static void __exit xt_delude_exit(void)
++{
++ xt_unregister_target(&xt_delude_info);
++}
++
++module_init(xt_delude_init);
++module_exit(xt_delude_exit);
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Jan Engelhardt <jengelh@gmx.de>");
++MODULE_DESCRIPTION("netfilter DELUDE target");
+diff -ruN linux-2.6.19.1.orig/net/netfilter/xt_portscan.c linux-2.6.19.1/net/netfilter/xt_portscan.c
+--- linux-2.6.19.1.orig/net/netfilter/xt_portscan.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.1/net/netfilter/xt_portscan.c 2007-01-11 13:28:14.407920893 +0100
+@@ -0,0 +1,282 @@
++/*
++ portscan match for netfilter
++
++ Written by Jan Engelhardt, 2006 - 2007
++ released under the terms of the GNU General Public
++ License version 2.x and only versions 2.x.
++*/
++#include <linux/in.h>
++#include <linux/ip.h>
++#include <linux/module.h>
++#include <linux/moduleparam.h>
++#include <linux/skbuff.h>
++#include <linux/stat.h>
++#include <linux/tcp.h>
++#include <linux/types.h>
++#include <linux/version.h>
++#include <linux/netfilter/x_tables.h>
++#include <linux/netfilter/xt_tcpudp.h>
++#if defined(CONFIG_IP_NF_CONNTRACK) || defined(CONFIG_IP_NF_CONNTRACK_MODULE)
++# include <linux/netfilter_ipv4/ip_conntrack.h>
++#else /* linux-2.6.20+ */
++# include <net/netfilter/nf_nat_rule.h>
++#endif
++#include <linux/netfilter/xt_portscan.h>
++#define PFX KBUILD_MODNAME ": "
++
++/* Out of tree workarounds */
++#if LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 18)
++# define HAVE_MATCHINFOSIZE 1
++#endif
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20)
++# define nfmark mark
++#endif
++
++enum {
++ TCP_FLAGS_ALL3 = TCP_FLAG_FIN | TCP_FLAG_RST | TCP_FLAG_SYN,
++ TCP_FLAGS_ALL4 = TCP_FLAGS_ALL3 | TCP_FLAG_ACK,
++ TCP_FLAGS_ALL6 = TCP_FLAGS_ALL4 | TCP_FLAG_PSH | TCP_FLAG_URG,
++};
++
++/* Module parameters */
++static unsigned int
++ connmark_mask = ~0,
++ packet_mask = ~0,
++ mark_seen = 0x9,
++ mark_synrcv = 0x1,
++ mark_closed = 0x2,
++ mark_synscan = 0x3,
++ mark_estab1 = 0x4,
++ mark_estab2 = 0x5,
++ mark_cnscan = 0x6,
++ mark_grscan = 0x7,
++ mark_valid = 0x8;
++
++module_param(connmark_mask, uint, S_IRUGO | S_IWUSR);
++module_param(packet_mask, uint, S_IRUGO | S_IWUSR);
++module_param(mark_seen, uint, S_IRUGO | S_IWUSR);
++module_param(mark_synrcv, uint, S_IRUGO | S_IWUSR);
++module_param(mark_closed, uint, S_IRUGO | S_IWUSR);
++module_param(mark_synscan, uint, S_IRUGO | S_IWUSR);
++module_param(mark_estab1, uint, S_IRUGO | S_IWUSR);
++module_param(mark_estab2, uint, S_IRUGO | S_IWUSR);
++module_param(mark_cnscan, uint, S_IRUGO | S_IWUSR);
++module_param(mark_grscan, uint, S_IRUGO | S_IWUSR);
++module_param(mark_valid, uint, S_IRUGO | S_IWUSR);
++MODULE_PARM_DESC(connmark_mask, "only set specified bits in connection mark");
++MODULE_PARM_DESC(packet_mask, "only set specified bits in packet mark");
++MODULE_PARM_DESC(mark_seen, "nfmark value for packet-seen state");
++MODULE_PARM_DESC(mark_synrcv, "connmark value for SYN Received state");
++MODULE_PARM_DESC(mark_closed, "connmark value for closed state");
++MODULE_PARM_DESC(mark_synscan, "connmark value for SYN Scan state");
++MODULE_PARM_DESC(mark_estab1, "connmark value for Established-1 state");
++MODULE_PARM_DESC(mark_estab2, "connmark value for Established-2 state");
++MODULE_PARM_DESC(mark_cnscan, "connmark value for Connect Scan state");
++MODULE_PARM_DESC(mark_grscan, "connmark value for Grab Scan state");
++MODULE_PARM_DESC(mark_valid, "connmark value for Valid state");
++
++/* TCP flag functions */
++static inline int tflg_ack4(const struct tcphdr *th)
++{
++ return (tcp_flag_word(th) & TCP_FLAGS_ALL4) == TCP_FLAG_ACK;
++}
++
++static inline int tflg_ack6(const struct tcphdr *th)
++{
++ return (tcp_flag_word(th) & TCP_FLAGS_ALL6) == TCP_FLAG_ACK;
++}
++
++static inline int tflg_fin(const struct tcphdr *th)
++{
++ return (tcp_flag_word(th) & TCP_FLAGS_ALL3) == TCP_FLAG_FIN;
++}
++
++static inline int tflg_rst(const struct tcphdr *th)
++{
++ return (tcp_flag_word(th) & TCP_FLAGS_ALL3) == TCP_FLAG_RST;
++}
++
++static inline int tflg_rstack(const struct tcphdr *th)
++{
++ return (tcp_flag_word(th) & TCP_FLAGS_ALL4) ==
++ (TCP_FLAG_ACK | TCP_FLAG_RST);
++}
++
++static inline int tflg_syn(const struct tcphdr *th)
++{
++ return (tcp_flag_word(th) & TCP_FLAGS_ALL4) == TCP_FLAG_SYN;
++}
++
++static inline int tflg_synack(const struct tcphdr *th)
++{
++ return (tcp_flag_word(th) & TCP_FLAGS_ALL4) ==
++ (TCP_FLAG_SYN | TCP_FLAG_ACK);
++}
++
++/* portscan functions */
++static inline int xt_portscan_stealth(const struct tcphdr *th)
++{
++ /*
++ * "Connection refused" replies to our own probes must not be matched.
++ */
++ if(tflg_rstack(th))
++ return 0;
++
++ if(tflg_rst(th) && printk_ratelimit()) {
++ printk(KERN_WARNING PFX "Warning: Pure RST received\n");
++ return 0;
++ }
++
++ /*
++ * -p tcp ! --syn -m conntrack --ctstate INVALID: Looking for non-start
++ * packets that are not associated with any connection -- this will
++ * match most scan types (NULL, XMAS, FIN) and ridiculous flag
++ * combinations (SYN-RST, SYN-FIN, SYN-FIN-RST, FIN-RST, etc.).
++ */
++ return !tflg_syn(th);
++}
++
++static inline int xt_portscan_full(int mark, enum ip_conntrack_info ctstate,
++ int loopback, const struct tcphdr *tcph, int payload_len)
++{
++ if(mark == mark_estab2) {
++ /*
++ * -m connmark --mark $ESTAB2
++ */
++ if(tflg_ack4(tcph) && payload_len == 0)
++ return mark; /* keep mark */
++ else if(tflg_rst(tcph) || tflg_fin(tcph))
++ return mark_grscan;
++ else
++ return mark_valid;
++ } else if(mark == mark_estab1) {
++ /*
++ * -m connmark --mark $ESTAB1
++ */
++ if(tflg_rst(tcph) || tflg_fin(tcph))
++ return mark_cnscan;
++ else if(!loopback && tflg_ack4(tcph) && payload_len == 0)
++ return mark_estab2;
++ else
++ return mark_valid;
++ } else if(mark == mark_synrcv) {
++ /*
++ * -m connmark --mark $SYN
++ */
++ if(loopback && tflg_synack(tcph))
++ return mark; /* keep mark */
++ else if(loopback && tflg_rstack(tcph))
++ return mark_closed;
++ else if(tflg_ack6(tcph))
++ return mark_estab1;
++ else
++ return mark_synscan;
++ } else if(ctstate == IP_CT_NEW && tflg_syn(tcph)) {
++ /*
++ * -p tcp --syn --ctstate NEW
++ */
++ return mark_synrcv;
++ }
++ return mark;
++}
++
++static int xt_portscan_match(const struct sk_buff *skb,
++ const struct net_device *in, const struct net_device *out,
++ const struct xt_match *match, const void *matchinfo, int offset,
++ unsigned int protoff, int *hotdrop)
++{
++ const struct xt_portscan_info *info = matchinfo;
++ enum ip_conntrack_info ctstate;
++ struct ip_conntrack *ctdata;
++ const struct tcphdr *tcph;
++ struct tcphdr tcph_buf;
++
++ tcph = skb_header_pointer(skb, protoff, sizeof(tcph_buf), &tcph_buf);
++ if(tcph == NULL)
++ return 0;
++
++ /* Check for invalid packets: -m conntrack --ctstate INVALID */
++ if((ctdata = ip_conntrack_get(skb, &ctstate)) == NULL) {
++ if(info->match_stealth)
++ return xt_portscan_stealth(tcph);
++ /*
++ * If @ctdata is NULL, we cannot match the other scan
++ * types, return.
++ */
++ return 0;
++ }
++
++ /*
++ * If -m portscan was previously applied to this packet, the rules we
++ * simulate must not be run through again. And for speedup, do not call
++ * it either when the connection is already VALID.
++ */
++ if((ctdata->mark & connmark_mask) == mark_valid ||
++ (skb->nfmark & packet_mask) != mark_seen)
++ {
++ unsigned int n;
++ n = xt_portscan_full(ctdata->mark & connmark_mask, ctstate,
++ in == &loopback_dev, tcph,
++ skb->len - protoff - 4 * tcph->doff);
++
++ ctdata->mark = (ctdata->mark & ~connmark_mask) | n;
++ ((struct sk_buff *)skb)->nfmark =
++ (skb->nfmark & ~packet_mask) | mark_seen;
++ }
++
++ return (info->match_syn && ctdata->mark == mark_synscan) ||
++ (info->match_cn && ctdata->mark == mark_cnscan) ||
++ (info->match_gr && ctdata->mark == mark_grscan);
++}
++
++static int xt_portscan_checkentry(const char *tablename, const void *entry,
++ const struct xt_match *match, void *matchinfo,
++#ifdef HAVE_MATCHINFOSIZE
++ unsigned int matchinfosize,
++#endif
++ unsigned int hook_mask)
++{
++ const struct xt_portscan_info *info = matchinfo;
++#ifdef HAVE_MATCHINFOSIZE
++ if(matchinfosize != XT_ALIGN(sizeof(struct xt_portscan_info))) {
++ printk(KERN_WARNING PFX "matchinfosize %u != %Zu\n",
++ matchinfosize,
++ XT_ALIGN(sizeof(struct xt_portscan_info)));
++ return 0;
++ }
++#endif
++ if((info->match_stealth & ~1) || (info->match_syn & ~1) ||
++ (info->match_cn & ~1) || (info->match_gr & ~1)) {
++ printk(KERN_WARNING PFX "Invalid flags\n");
++ return 0;
++ }
++ return 1;
++}
++
++static struct xt_match xt_portscan = {
++ .name = "portscan",
++ .match = xt_portscan_match,
++ .checkentry = xt_portscan_checkentry,
++ .matchsize = sizeof(struct xt_portscan_info),
++ .proto = IPPROTO_TCP,
++ .family = AF_INET,
++ .me = THIS_MODULE,
++};
++
++static int __init xt_portscan_init(void)
++{
++ return xt_register_match(&xt_portscan);
++}
++
++static void __exit xt_portscan_exit(void)
++{
++ xt_unregister_match(&xt_portscan);
++ return;
++}
++
++module_init(xt_portscan_init);
++module_exit(xt_portscan_exit);
++MODULE_AUTHOR("Jan Engelhardt <jengelh@gmx.de>");
++MODULE_DESCRIPTION("netfilter portscan match module");
++MODULE_LICENSE("GPL");
++MODULE_ALIAS("ipt_portscan");
--- /dev/null
+diff -urN linux-2.6.19.old/include/linux/pkt_sched.h linux-2.6.19.dev/include/linux/pkt_sched.h
+--- linux-2.6.19.old/include/linux/pkt_sched.h 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/include/linux/pkt_sched.h 2006-12-14 03:13:51.000000000 +0100
+@@ -146,8 +146,35 @@
+ *
+ * The only reason for this is efficiency, it is possible
+ * to change these parameters in compile time.
++ *
++ * If you need to play with these values use esfq instead.
+ */
+
++/* ESFQ section */
++
++enum
++{
++ /* traditional */
++ TCA_SFQ_HASH_CLASSIC,
++ TCA_SFQ_HASH_DST,
++ TCA_SFQ_HASH_SRC,
++ TCA_SFQ_HASH_FWMARK,
++ /* direct */
++ TCA_SFQ_HASH_DSTDIR,
++ TCA_SFQ_HASH_SRCDIR,
++ TCA_SFQ_HASH_FWMARKDIR,
++};
++
++struct tc_esfq_qopt
++{
++ unsigned quantum; /* Bytes per round allocated to flow */
++ int perturb_period; /* Period of hash perturbation */
++ __u32 limit; /* Maximal packets in queue */
++ unsigned divisor; /* Hash divisor */
++ unsigned flows; /* Maximal number of flows */
++ unsigned hash_kind; /* Hash function to use for flow identification */
++};
++
+ /* RED section */
+
+ enum
+diff -urN linux-2.6.19.old/net/sched/Kconfig linux-2.6.19.dev/net/sched/Kconfig
+--- linux-2.6.19.old/net/sched/Kconfig 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/net/sched/Kconfig 2006-12-14 03:13:51.000000000 +0100
+@@ -185,6 +185,28 @@
+ To compile this code as a module, choose M here: the
+ module will be called sch_sfq.
+
++config NET_SCH_ESFQ
++ tristate "ESFQ queue"
++ depends on NET_SCHED
++ ---help---
++ Say Y here if you want to use the Enhanced Stochastic Fairness
++ Queueing (ESFQ) packet scheduling algorithm for some of your network
++ devices or as a leaf discipline for a classful qdisc such as HTB or
++ CBQ (see the top of <file:net/sched/sch_esfq.c> for details and
++ references to the SFQ algorithm).
++
++ This is an enchanced SFQ version which allows you to control some
++ hardcoded values in the SFQ scheduler: queue depth, hash table size,
++ and queues limit.
++
++ ESFQ also adds control to the hash function used to identify packet
++ flows. The original SFQ hashes by individual flow (TCP session or UDP
++ stream); ESFQ can hash by src or dst IP as well, which can be more
++ fair to users in some networking situations.
++
++ To compile this code as a module, choose M here: the
++ module will be called sch_esfq.
++
+ config NET_SCH_TEQL
+ tristate "True Link Equalizer (TEQL)"
+ ---help---
+diff -urN linux-2.6.19.old/net/sched/Makefile linux-2.6.19.dev/net/sched/Makefile
+--- linux-2.6.19.old/net/sched/Makefile 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/net/sched/Makefile 2006-12-14 03:13:51.000000000 +0100
+@@ -23,6 +23,7 @@
+ obj-$(CONFIG_NET_SCH_INGRESS) += sch_ingress.o
+ obj-$(CONFIG_NET_SCH_DSMARK) += sch_dsmark.o
+ obj-$(CONFIG_NET_SCH_SFQ) += sch_sfq.o
++obj-$(CONFIG_NET_SCH_ESFQ) += sch_esfq.o
+ obj-$(CONFIG_NET_SCH_TBF) += sch_tbf.o
+ obj-$(CONFIG_NET_SCH_TEQL) += sch_teql.o
+ obj-$(CONFIG_NET_SCH_PRIO) += sch_prio.o
+diff -urN linux-2.6.19.old/net/sched/sch_esfq.c linux-2.6.19.dev/net/sched/sch_esfq.c
+--- linux-2.6.19.old/net/sched/sch_esfq.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/net/sched/sch_esfq.c 2006-12-14 03:13:51.000000000 +0100
+@@ -0,0 +1,644 @@
++/*
++ * net/sched/sch_esfq.c Extended Stochastic Fairness Queueing discipline.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ *
++ * Authors: Alexey Kuznetsov, <kuznet@ms2.inr.ac.ru>
++ *
++ * Changes: Alexander Atanasov, <alex@ssi.bg>
++ * Added dynamic depth,limit,divisor,hash_kind options.
++ * Added dst and src hashes.
++ *
++ * Alexander Clouter, <alex@digriz.org.uk>
++ * Ported ESFQ to Linux 2.6.
++ *
++ * Corey Hickey, <bugfood-c@fatooh.org>
++ * Maintenance of the Linux 2.6 port.
++ * Added fwmark hash (thanks to Robert Kurjata)
++ * Added direct hashing for src, dst, and fwmark.
++ *
++ */
++
++#include <linux/autoconf.h>
++#include <linux/module.h>
++#include <asm/uaccess.h>
++#include <asm/system.h>
++#include <linux/bitops.h>
++#include <linux/types.h>
++#include <linux/kernel.h>
++#include <linux/jiffies.h>
++#include <linux/string.h>
++#include <linux/mm.h>
++#include <linux/socket.h>
++#include <linux/sockios.h>
++#include <linux/in.h>
++#include <linux/errno.h>
++#include <linux/interrupt.h>
++#include <linux/if_ether.h>
++#include <linux/inet.h>
++#include <linux/netdevice.h>
++#include <linux/etherdevice.h>
++#include <linux/notifier.h>
++#include <linux/init.h>
++#include <net/ip.h>
++#include <linux/ipv6.h>
++#include <net/route.h>
++#include <linux/skbuff.h>
++#include <net/sock.h>
++#include <net/pkt_sched.h>
++
++
++/* Stochastic Fairness Queuing algorithm.
++ For more comments look at sch_sfq.c.
++ The difference is that you can change limit, depth,
++ hash table size and choose 7 hash types.
++
++ classic: same as in sch_sfq.c
++ dst: destination IP address
++ src: source IP address
++ fwmark: netfilter mark value
++ dst_direct:
++ src_direct:
++ fwmark_direct: direct hashing of the above sources
++
++ TODO:
++ make sfq_change work.
++*/
++
++
++/* This type should contain at least SFQ_DEPTH*2 values */
++typedef unsigned int esfq_index;
++
++struct esfq_head
++{
++ esfq_index next;
++ esfq_index prev;
++};
++
++struct esfq_sched_data
++{
++/* Parameters */
++ int perturb_period;
++ unsigned quantum; /* Allotment per round: MUST BE >= MTU */
++ int limit;
++ unsigned depth;
++ unsigned hash_divisor;
++ unsigned hash_kind;
++/* Variables */
++ struct timer_list perturb_timer;
++ int perturbation;
++ esfq_index tail; /* Index of current slot in round */
++ esfq_index max_depth; /* Maximal depth */
++
++ esfq_index *ht; /* Hash table */
++ esfq_index *next; /* Active slots link */
++ short *allot; /* Current allotment per slot */
++ unsigned short *hash; /* Hash value indexed by slots */
++ struct sk_buff_head *qs; /* Slot queue */
++ struct esfq_head *dep; /* Linked list of slots, indexed by depth */
++ unsigned dyn_min; /* For dynamic divisor adjustment; minimum value seen */
++ unsigned dyn_max; /* maximum value seen */
++ unsigned dyn_range; /* saved range */
++};
++
++static __inline__ unsigned esfq_hash_u32(struct esfq_sched_data *q,u32 h)
++{
++ int pert = q->perturbation;
++
++ if (pert)
++ h = (h<<pert) ^ (h>>(0x1F - pert));
++
++ h = ntohl(h) * 2654435761UL;
++ return h & (q->hash_divisor-1);
++}
++
++/* Hash input values directly into the "nearest" slot, taking into account the
++ * range of input values seen. This is most useful when the hash table is at
++ * least as large as the range of possible values. */
++static __inline__ unsigned esfq_hash_direct(struct esfq_sched_data *q, u32 h)
++{
++ /* adjust minimum and maximum */
++ if (h < q->dyn_min || h > q->dyn_max) {
++ q->dyn_min = h < q->dyn_min ? h : q->dyn_min;
++ q->dyn_max = h > q->dyn_max ? h : q->dyn_max;
++
++ /* find new range */
++ if ((q->dyn_range = q->dyn_max - q->dyn_min) >= q->hash_divisor)
++ printk(KERN_WARNING "ESFQ: (direct hash) Input range %u is larger than hash "
++ "table. See ESFQ README for details.\n", q->dyn_range);
++ }
++
++ /* hash input values into slot numbers */
++ if (q->dyn_min == q->dyn_max)
++ return 0; /* only one value seen; avoid division by 0 */
++ else
++ return (h - q->dyn_min) * (q->hash_divisor - 1) / q->dyn_range;
++}
++
++static __inline__ unsigned esfq_fold_hash_classic(struct esfq_sched_data *q, u32 h, u32 h1)
++{
++ int pert = q->perturbation;
++
++ /* Have we any rotation primitives? If not, WHY? */
++ h ^= (h1<<pert) ^ (h1>>(0x1F - pert));
++ h ^= h>>10;
++ return h & (q->hash_divisor-1);
++}
++
++static unsigned esfq_hash(struct esfq_sched_data *q, struct sk_buff *skb)
++{
++ u32 h, h2;
++ u32 hs;
++ u32 nfm;
++
++ switch (skb->protocol) {
++ case __constant_htons(ETH_P_IP):
++ {
++ struct iphdr *iph = skb->nh.iph;
++ h = iph->daddr;
++ hs = iph->saddr;
++ nfm = skb->nfmark;
++ h2 = hs^iph->protocol;
++ if (!(iph->frag_off&htons(IP_MF|IP_OFFSET)) &&
++ (iph->protocol == IPPROTO_TCP ||
++ iph->protocol == IPPROTO_UDP ||
++ iph->protocol == IPPROTO_SCTP ||
++ iph->protocol == IPPROTO_DCCP ||
++ iph->protocol == IPPROTO_ESP))
++ h2 ^= *(((u32*)iph) + iph->ihl);
++ break;
++ }
++ case __constant_htons(ETH_P_IPV6):
++ {
++ struct ipv6hdr *iph = skb->nh.ipv6h;
++ h = iph->daddr.s6_addr32[3];
++ hs = iph->saddr.s6_addr32[3];
++ nfm = skb->nfmark;
++ h2 = hs^iph->nexthdr;
++ if (iph->nexthdr == IPPROTO_TCP ||
++ iph->nexthdr == IPPROTO_UDP ||
++ iph->nexthdr == IPPROTO_SCTP ||
++ iph->nexthdr == IPPROTO_DCCP ||
++ iph->nexthdr == IPPROTO_ESP)
++ h2 ^= *(u32*)&iph[1];
++ break;
++ }
++ default:
++ h = (u32)(unsigned long)skb->dst;
++ hs = (u32)(unsigned long)skb->sk;
++ nfm = skb->nfmark;
++ h2 = hs^skb->protocol;
++ }
++ switch(q->hash_kind)
++ {
++ case TCA_SFQ_HASH_CLASSIC:
++ return esfq_fold_hash_classic(q, h, h2);
++ case TCA_SFQ_HASH_DST:
++ return esfq_hash_u32(q,h);
++ case TCA_SFQ_HASH_DSTDIR:
++ return esfq_hash_direct(q, ntohl(h));
++ case TCA_SFQ_HASH_SRC:
++ return esfq_hash_u32(q,hs);
++ case TCA_SFQ_HASH_SRCDIR:
++ return esfq_hash_direct(q, ntohl(hs));
++#ifdef CONFIG_NETFILTER
++ case TCA_SFQ_HASH_FWMARK:
++ return esfq_hash_u32(q,nfm);
++ case TCA_SFQ_HASH_FWMARKDIR:
++ return esfq_hash_direct(q,nfm);
++#endif
++ default:
++ if (net_ratelimit())
++ printk(KERN_WARNING "ESFQ: Unknown hash method. Falling back to classic.\n");
++ }
++ return esfq_fold_hash_classic(q, h, h2);
++}
++
++static inline void esfq_link(struct esfq_sched_data *q, esfq_index x)
++{
++ esfq_index p, n;
++ int d = q->qs[x].qlen + q->depth;
++
++ p = d;
++ n = q->dep[d].next;
++ q->dep[x].next = n;
++ q->dep[x].prev = p;
++ q->dep[p].next = q->dep[n].prev = x;
++}
++
++static inline void esfq_dec(struct esfq_sched_data *q, esfq_index x)
++{
++ esfq_index p, n;
++
++ n = q->dep[x].next;
++ p = q->dep[x].prev;
++ q->dep[p].next = n;
++ q->dep[n].prev = p;
++
++ if (n == p && q->max_depth == q->qs[x].qlen + 1)
++ q->max_depth--;
++
++ esfq_link(q, x);
++}
++
++static inline void esfq_inc(struct esfq_sched_data *q, esfq_index x)
++{
++ esfq_index p, n;
++ int d;
++
++ n = q->dep[x].next;
++ p = q->dep[x].prev;
++ q->dep[p].next = n;
++ q->dep[n].prev = p;
++ d = q->qs[x].qlen;
++ if (q->max_depth < d)
++ q->max_depth = d;
++
++ esfq_link(q, x);
++}
++
++static unsigned int esfq_drop(struct Qdisc *sch)
++{
++ struct esfq_sched_data *q = qdisc_priv(sch);
++ esfq_index d = q->max_depth;
++ struct sk_buff *skb;
++ unsigned int len;
++
++ /* Queue is full! Find the longest slot and
++ drop a packet from it */
++
++ if (d > 1) {
++ esfq_index x = q->dep[d+q->depth].next;
++ skb = q->qs[x].prev;
++ len = skb->len;
++ __skb_unlink(skb, &q->qs[x]);
++ kfree_skb(skb);
++ esfq_dec(q, x);
++ sch->q.qlen--;
++ sch->qstats.drops++;
++ return len;
++ }
++
++ if (d == 1) {
++ /* It is difficult to believe, but ALL THE SLOTS HAVE LENGTH 1. */
++ d = q->next[q->tail];
++ q->next[q->tail] = q->next[d];
++ q->allot[q->next[d]] += q->quantum;
++ skb = q->qs[d].prev;
++ len = skb->len;
++ __skb_unlink(skb, &q->qs[d]);
++ kfree_skb(skb);
++ esfq_dec(q, d);
++ sch->q.qlen--;
++ q->ht[q->hash[d]] = q->depth;
++ sch->qstats.drops++;
++ return len;
++ }
++
++ return 0;
++}
++
++static int
++esfq_enqueue(struct sk_buff *skb, struct Qdisc* sch)
++{
++ struct esfq_sched_data *q = qdisc_priv(sch);
++ unsigned hash = esfq_hash(q, skb);
++ unsigned depth = q->depth;
++ esfq_index x;
++
++ x = q->ht[hash];
++ if (x == depth) {
++ q->ht[hash] = x = q->dep[depth].next;
++ q->hash[x] = hash;
++ }
++ __skb_queue_tail(&q->qs[x], skb);
++ esfq_inc(q, x);
++ if (q->qs[x].qlen == 1) { /* The flow is new */
++ if (q->tail == depth) { /* It is the first flow */
++ q->tail = x;
++ q->next[x] = x;
++ q->allot[x] = q->quantum;
++ } else {
++ q->next[x] = q->next[q->tail];
++ q->next[q->tail] = x;
++ q->tail = x;
++ }
++ }
++ if (++sch->q.qlen < q->limit-1) {
++ sch->bstats.bytes += skb->len;
++ sch->bstats.packets++;
++ return 0;
++ }
++
++ esfq_drop(sch);
++ return NET_XMIT_CN;
++}
++
++static int
++esfq_requeue(struct sk_buff *skb, struct Qdisc* sch)
++{
++ struct esfq_sched_data *q = qdisc_priv(sch);
++ unsigned hash = esfq_hash(q, skb);
++ unsigned depth = q->depth;
++ esfq_index x;
++
++ x = q->ht[hash];
++ if (x == depth) {
++ q->ht[hash] = x = q->dep[depth].next;
++ q->hash[x] = hash;
++ }
++ __skb_queue_head(&q->qs[x], skb);
++ esfq_inc(q, x);
++ if (q->qs[x].qlen == 1) { /* The flow is new */
++ if (q->tail == depth) { /* It is the first flow */
++ q->tail = x;
++ q->next[x] = x;
++ q->allot[x] = q->quantum;
++ } else {
++ q->next[x] = q->next[q->tail];
++ q->next[q->tail] = x;
++ q->tail = x;
++ }
++ }
++ if (++sch->q.qlen < q->limit - 1) {
++ sch->qstats.requeues++;
++ return 0;
++ }
++
++ sch->qstats.drops++;
++ esfq_drop(sch);
++ return NET_XMIT_CN;
++}
++
++
++
++
++static struct sk_buff *
++esfq_dequeue(struct Qdisc* sch)
++{
++ struct esfq_sched_data *q = qdisc_priv(sch);
++ struct sk_buff *skb;
++ unsigned depth = q->depth;
++ esfq_index a, old_a;
++
++ /* No active slots */
++ if (q->tail == depth)
++ return NULL;
++
++ a = old_a = q->next[q->tail];
++
++ /* Grab packet */
++ skb = __skb_dequeue(&q->qs[a]);
++ esfq_dec(q, a);
++ sch->q.qlen--;
++
++ /* Is the slot empty? */
++ if (q->qs[a].qlen == 0) {
++ q->ht[q->hash[a]] = depth;
++ a = q->next[a];
++ if (a == old_a) {
++ q->tail = depth;
++ return skb;
++ }
++ q->next[q->tail] = a;
++ q->allot[a] += q->quantum;
++ } else if ((q->allot[a] -= skb->len) <= 0) {
++ q->tail = a;
++ a = q->next[a];
++ q->allot[a] += q->quantum;
++ }
++
++ return skb;
++}
++
++static void
++esfq_reset(struct Qdisc* sch)
++{
++ struct sk_buff *skb;
++
++ while ((skb = esfq_dequeue(sch)) != NULL)
++ kfree_skb(skb);
++}
++
++static void esfq_perturbation(unsigned long arg)
++{
++ struct Qdisc *sch = (struct Qdisc*)arg;
++ struct esfq_sched_data *q = qdisc_priv(sch);
++
++ q->perturbation = net_random()&0x1F;
++
++ if (q->perturb_period) {
++ q->perturb_timer.expires = jiffies + q->perturb_period;
++ add_timer(&q->perturb_timer);
++ }
++}
++
++static int esfq_change(struct Qdisc *sch, struct rtattr *opt)
++{
++ struct esfq_sched_data *q = qdisc_priv(sch);
++ struct tc_esfq_qopt *ctl = RTA_DATA(opt);
++ int old_perturb = q->perturb_period;
++
++ if (opt->rta_len < RTA_LENGTH(sizeof(*ctl)))
++ return -EINVAL;
++
++ sch_tree_lock(sch);
++ q->quantum = ctl->quantum ? : psched_mtu(sch->dev);
++ q->perturb_period = ctl->perturb_period*HZ;
++// q->hash_divisor = ctl->divisor;
++// q->tail = q->limit = q->depth = ctl->flows;
++
++ if (ctl->limit)
++ q->limit = min_t(u32, ctl->limit, q->depth);
++
++ if (ctl->hash_kind) {
++ q->hash_kind = ctl->hash_kind;
++ if (q->hash_kind != TCA_SFQ_HASH_CLASSIC)
++ q->perturb_period = 0;
++ }
++
++ // is sch_tree_lock enough to do this ?
++ while (sch->q.qlen >= q->limit-1)
++ esfq_drop(sch);
++
++ if (old_perturb)
++ del_timer(&q->perturb_timer);
++ if (q->perturb_period) {
++ q->perturb_timer.expires = jiffies + q->perturb_period;
++ add_timer(&q->perturb_timer);
++ } else {
++ q->perturbation = 0;
++ }
++ sch_tree_unlock(sch);
++ return 0;
++}
++
++static int esfq_init(struct Qdisc *sch, struct rtattr *opt)
++{
++ struct esfq_sched_data *q = qdisc_priv(sch);
++ struct tc_esfq_qopt *ctl;
++ esfq_index p = ~0UL/2;
++ int i;
++
++ if (opt && opt->rta_len < RTA_LENGTH(sizeof(*ctl)))
++ return -EINVAL;
++
++ init_timer(&q->perturb_timer);
++ q->perturb_timer.data = (unsigned long)sch;
++ q->perturb_timer.function = esfq_perturbation;
++ q->perturbation = 0;
++ q->hash_kind = TCA_SFQ_HASH_CLASSIC;
++ q->max_depth = 0;
++ q->dyn_min = ~0U; /* maximum value for this type */
++ q->dyn_max = 0; /* dyn_min/dyn_max will be set properly upon first packet */
++ if (opt == NULL) {
++ q->quantum = psched_mtu(sch->dev);
++ q->perturb_period = 0;
++ q->hash_divisor = 1024;
++ q->tail = q->limit = q->depth = 128;
++
++ } else {
++ ctl = RTA_DATA(opt);
++ q->quantum = ctl->quantum ? : psched_mtu(sch->dev);
++ q->perturb_period = ctl->perturb_period*HZ;
++ q->hash_divisor = ctl->divisor ? : 1024;
++ q->tail = q->limit = q->depth = ctl->flows ? : 128;
++
++ if ( q->depth > p - 1 )
++ return -EINVAL;
++
++ if (ctl->limit)
++ q->limit = min_t(u32, ctl->limit, q->depth);
++
++ if (ctl->hash_kind) {
++ q->hash_kind = ctl->hash_kind;
++ }
++
++ if (q->perturb_period) {
++ q->perturb_timer.expires = jiffies + q->perturb_period;
++ add_timer(&q->perturb_timer);
++ }
++ }
++
++ q->ht = kmalloc(q->hash_divisor*sizeof(esfq_index), GFP_KERNEL);
++ if (!q->ht)
++ goto err_case;
++
++ q->dep = kmalloc((1+q->depth*2)*sizeof(struct esfq_head), GFP_KERNEL);
++ if (!q->dep)
++ goto err_case;
++ q->next = kmalloc(q->depth*sizeof(esfq_index), GFP_KERNEL);
++ if (!q->next)
++ goto err_case;
++
++ q->allot = kmalloc(q->depth*sizeof(short), GFP_KERNEL);
++ if (!q->allot)
++ goto err_case;
++ q->hash = kmalloc(q->depth*sizeof(unsigned short), GFP_KERNEL);
++ if (!q->hash)
++ goto err_case;
++ q->qs = kmalloc(q->depth*sizeof(struct sk_buff_head), GFP_KERNEL);
++ if (!q->qs)
++ goto err_case;
++
++ for (i=0; i< q->hash_divisor; i++)
++ q->ht[i] = q->depth;
++ for (i=0; i<q->depth; i++) {
++ skb_queue_head_init(&q->qs[i]);
++ q->dep[i+q->depth].next = i+q->depth;
++ q->dep[i+q->depth].prev = i+q->depth;
++ }
++
++ for (i=0; i<q->depth; i++)
++ esfq_link(q, i);
++ return 0;
++err_case:
++ del_timer(&q->perturb_timer);
++ if (q->ht)
++ kfree(q->ht);
++ if (q->dep)
++ kfree(q->dep);
++ if (q->next)
++ kfree(q->next);
++ if (q->allot)
++ kfree(q->allot);
++ if (q->hash)
++ kfree(q->hash);
++ if (q->qs)
++ kfree(q->qs);
++ return -ENOBUFS;
++}
++
++static void esfq_destroy(struct Qdisc *sch)
++{
++ struct esfq_sched_data *q = qdisc_priv(sch);
++ del_timer(&q->perturb_timer);
++ if(q->ht)
++ kfree(q->ht);
++ if(q->dep)
++ kfree(q->dep);
++ if(q->next)
++ kfree(q->next);
++ if(q->allot)
++ kfree(q->allot);
++ if(q->hash)
++ kfree(q->hash);
++ if(q->qs)
++ kfree(q->qs);
++}
++
++static int esfq_dump(struct Qdisc *sch, struct sk_buff *skb)
++{
++ struct esfq_sched_data *q = qdisc_priv(sch);
++ unsigned char *b = skb->tail;
++ struct tc_esfq_qopt opt;
++
++ opt.quantum = q->quantum;
++ opt.perturb_period = q->perturb_period/HZ;
++
++ opt.limit = q->limit;
++ opt.divisor = q->hash_divisor;
++ opt.flows = q->depth;
++ opt.hash_kind = q->hash_kind;
++
++ RTA_PUT(skb, TCA_OPTIONS, sizeof(opt), &opt);
++
++ return skb->len;
++
++rtattr_failure:
++ skb_trim(skb, b - skb->data);
++ return -1;
++}
++
++static struct Qdisc_ops esfq_qdisc_ops =
++{
++ .next = NULL,
++ .cl_ops = NULL,
++ .id = "esfq",
++ .priv_size = sizeof(struct esfq_sched_data),
++ .enqueue = esfq_enqueue,
++ .dequeue = esfq_dequeue,
++ .requeue = esfq_requeue,
++ .drop = esfq_drop,
++ .init = esfq_init,
++ .reset = esfq_reset,
++ .destroy = esfq_destroy,
++ .change = NULL, /* esfq_change - needs more work */
++ .dump = esfq_dump,
++ .owner = THIS_MODULE,
++};
++
++static int __init esfq_module_init(void)
++{
++ return register_qdisc(&esfq_qdisc_ops);
++}
++static void __exit esfq_module_exit(void)
++{
++ unregister_qdisc(&esfq_qdisc_ops);
++}
++module_init(esfq_module_init)
++module_exit(esfq_module_exit)
++MODULE_LICENSE("GPL");
--- /dev/null
+diff -urN linux-2.6.19.old/include/linux/netfilter_ipv4/ip_nat.h linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_nat.h
+--- linux-2.6.19.old/include/linux/netfilter_ipv4/ip_nat.h 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/include/linux/netfilter_ipv4/ip_nat.h 2006-12-14 03:13:53.000000000 +0100
+@@ -63,6 +63,13 @@
+
+ struct ip_conntrack;
+
++/* Call input routing for SNAT-ed traffic */
++extern unsigned int ip_nat_route_input(unsigned int hooknum,
++ struct sk_buff **pskb,
++ const struct net_device *in,
++ const struct net_device *out,
++ int (*okfn)(struct sk_buff *));
++
+ /* Set up the info structure to map into this range. */
+ extern unsigned int ip_nat_setup_info(struct ip_conntrack *conntrack,
+ const struct ip_nat_range *range,
+diff -urN linux-2.6.19.old/include/linux/rtnetlink.h linux-2.6.19.dev/include/linux/rtnetlink.h
+--- linux-2.6.19.old/include/linux/rtnetlink.h 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/include/linux/rtnetlink.h 2006-12-14 03:13:53.000000000 +0100
+@@ -293,6 +293,8 @@
+ #define RTNH_F_DEAD 1 /* Nexthop is dead (used by multipath) */
+ #define RTNH_F_PERVASIVE 2 /* Do recursive gateway lookup */
+ #define RTNH_F_ONLINK 4 /* Gateway is forced on link */
++#define RTNH_F_SUSPECT 8 /* We don't know the real state */
++#define RTNH_F_BADSTATE (RTNH_F_DEAD | RTNH_F_SUSPECT)
+
+ /* Macros to handle hexthops */
+
+diff -urN linux-2.6.19.old/include/net/flow.h linux-2.6.19.dev/include/net/flow.h
+--- linux-2.6.19.old/include/net/flow.h 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/include/net/flow.h 2006-12-14 03:13:53.000000000 +0100
+@@ -19,6 +19,8 @@
+ __be32 daddr;
+ __be32 saddr;
+ __u32 fwmark;
++ __u32 lsrc;
++ __u32 gw;
+ __u8 tos;
+ __u8 scope;
+ } ip4_u;
+@@ -48,6 +50,8 @@
+ #define fl4_dst nl_u.ip4_u.daddr
+ #define fl4_src nl_u.ip4_u.saddr
+ #define fl4_fwmark nl_u.ip4_u.fwmark
++#define fl4_lsrc nl_u.ip4_u.lsrc
++#define fl4_gw nl_u.ip4_u.gw
+ #define fl4_tos nl_u.ip4_u.tos
+ #define fl4_scope nl_u.ip4_u.scope
+
+diff -urN linux-2.6.19.old/include/net/ip_fib.h linux-2.6.19.dev/include/net/ip_fib.h
+--- linux-2.6.19.old/include/net/ip_fib.h 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/include/net/ip_fib.h 2006-12-14 03:13:53.000000000 +0100
+@@ -196,7 +196,8 @@
+
+ static inline void fib_select_default(const struct flowi *flp, struct fib_result *res)
+ {
+- if (FIB_RES_GW(*res) && FIB_RES_NH(*res).nh_scope == RT_SCOPE_LINK)
++ if ((FIB_RES_GW(*res) && FIB_RES_NH(*res).nh_scope == RT_SCOPE_LINK) ||
++ FIB_RES_NH(*res).nh_scope == RT_SCOPE_HOST)
+ ip_fib_main_table->tb_select_default(ip_fib_main_table, flp, res);
+ }
+
+@@ -212,6 +213,8 @@
+
+ #endif /* CONFIG_IP_MULTIPLE_TABLES */
+
++extern int fib_result_table(struct fib_result *res);
++
+ /* Exported by fib_frontend.c */
+ extern struct nla_policy rtm_ipv4_policy[];
+ extern void ip_fib_init(void);
+@@ -284,4 +287,6 @@
+ extern void fib_proc_exit(void);
+ #endif
+
++extern rwlock_t fib_nhflags_lock;
++
+ #endif /* _NET_FIB_H */
+diff -urN linux-2.6.19.old/include/net/route.h linux-2.6.19.dev/include/net/route.h
+--- linux-2.6.19.old/include/net/route.h 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/include/net/route.h 2006-12-14 03:13:53.000000000 +0100
+@@ -117,6 +117,7 @@
+ extern int ip_route_output_key(struct rtable **, struct flowi *flp);
+ extern int ip_route_output_flow(struct rtable **rp, struct flowi *flp, struct sock *sk, int flags);
+ extern int ip_route_input(struct sk_buff*, __be32 dst, __be32 src, u8 tos, struct net_device *devin);
++extern int ip_route_input_lookup(struct sk_buff*, u32 dst, u32 src, u8 tos, struct net_device *devin, u32 lsrc);
+ extern unsigned short ip_rt_frag_needed(struct iphdr *iph, unsigned short new_mtu);
+ extern void ip_rt_send_redirect(struct sk_buff *skb);
+
+diff -urN linux-2.6.19.old/net/ipv4/fib_frontend.c linux-2.6.19.dev/net/ipv4/fib_frontend.c
+--- linux-2.6.19.old/net/ipv4/fib_frontend.c 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/fib_frontend.c 2006-12-14 03:13:53.000000000 +0100
+@@ -58,6 +58,8 @@
+ #define FIB_TABLE_HASHSZ 1
+ static struct hlist_head fib_table_hash[FIB_TABLE_HASHSZ];
+
++#define FIB_RES_TABLE(r) (RT_TABLE_MAIN)
++
+ #else
+
+ #define FIB_TABLE_HASHSZ 256
+@@ -100,6 +102,9 @@
+ rcu_read_unlock();
+ return NULL;
+ }
++
++#define FIB_RES_TABLE(r) (fib_result_table(r))
++
+ #endif /* CONFIG_IP_MULTIPLE_TABLES */
+
+ static void fib_flush(void)
+@@ -190,6 +195,9 @@
+ .tos = tos } },
+ .iif = oif };
+ struct fib_result res;
++ int table;
++ unsigned char prefixlen;
++ unsigned char scope;
+ int no_addr, rpf;
+ int ret;
+
+@@ -211,31 +219,35 @@
+ goto e_inval_res;
+ *spec_dst = FIB_RES_PREFSRC(res);
+ fib_combine_itag(itag, &res);
+-#ifdef CONFIG_IP_ROUTE_MULTIPATH
+- if (FIB_RES_DEV(res) == dev || res.fi->fib_nhs > 1)
+-#else
+ if (FIB_RES_DEV(res) == dev)
+-#endif
+ {
+ ret = FIB_RES_NH(res).nh_scope >= RT_SCOPE_HOST;
+ fib_res_put(&res);
+ return ret;
+ }
++ table = FIB_RES_TABLE(&res);
++ prefixlen = res.prefixlen;
++ scope = res.scope;
+ fib_res_put(&res);
+ if (no_addr)
+ goto last_resort;
+- if (rpf)
+- goto e_inval;
+ fl.oif = dev->ifindex;
+
+ ret = 0;
+ if (fib_lookup(&fl, &res) == 0) {
+- if (res.type == RTN_UNICAST) {
++ if (res.type == RTN_UNICAST &&
++ ((table == FIB_RES_TABLE(&res) &&
++ res.prefixlen >= prefixlen && res.scope >= scope) ||
++ !rpf)) {
+ *spec_dst = FIB_RES_PREFSRC(res);
+ ret = FIB_RES_NH(res).nh_scope >= RT_SCOPE_HOST;
++ fib_res_put(&res);
++ return ret;
+ }
+ fib_res_put(&res);
+ }
++ if (rpf)
++ goto e_inval;
+ return ret;
+
+ last_resort:
+@@ -836,9 +848,7 @@
+ switch (event) {
+ case NETDEV_UP:
+ fib_add_ifaddr(ifa);
+-#ifdef CONFIG_IP_ROUTE_MULTIPATH
+ fib_sync_up(ifa->ifa_dev->dev);
+-#endif
+ rt_cache_flush(-1);
+ break;
+ case NETDEV_DOWN:
+@@ -874,9 +884,7 @@
+ for_ifa(in_dev) {
+ fib_add_ifaddr(ifa);
+ } endfor_ifa(in_dev);
+-#ifdef CONFIG_IP_ROUTE_MULTIPATH
+ fib_sync_up(dev);
+-#endif
+ rt_cache_flush(-1);
+ break;
+ case NETDEV_DOWN:
+diff -urN linux-2.6.19.old/net/ipv4/fib_hash.c linux-2.6.19.dev/net/ipv4/fib_hash.c
+--- linux-2.6.19.old/net/ipv4/fib_hash.c 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/fib_hash.c 2006-12-14 03:13:53.000000000 +0100
+@@ -275,30 +275,38 @@
+ return err;
+ }
+
+-static int fn_hash_last_dflt=-1;
+-
+ static void
+ fn_hash_select_default(struct fib_table *tb, const struct flowi *flp, struct fib_result *res)
+ {
+- int order, last_idx;
++ int order, last_idx, last_dflt, last_nhsel;
++ struct fib_alias *first_fa = NULL;
++ struct hlist_head *head;
+ struct hlist_node *node;
+ struct fib_node *f;
+ struct fib_info *fi = NULL;
+ struct fib_info *last_resort;
+ struct fn_hash *t = (struct fn_hash*)tb->tb_data;
+- struct fn_zone *fz = t->fn_zones[0];
++ struct fn_zone *fz = t->fn_zones[res->prefixlen];
++ u32 k;
+
+ if (fz == NULL)
+ return;
+
++ k = fz_key(flp->fl4_dst, fz);
++ last_dflt = -2;
++ last_nhsel = 0;
+ last_idx = -1;
+ last_resort = NULL;
+ order = -1;
+
+ read_lock(&fib_hash_lock);
+- hlist_for_each_entry(f, node, &fz->fz_hash[0], fn_hash) {
++ head = &fz->fz_hash[fn_hash(k, fz)];
++ hlist_for_each_entry(f, node, head, fn_hash) {
+ struct fib_alias *fa;
+
++ if (f->fn_key != k)
++ continue;
++
+ list_for_each_entry(fa, &f->fn_alias, fa_list) {
+ struct fib_info *next_fi = fa->fa_info;
+
+@@ -306,41 +314,52 @@
+ fa->fa_type != RTN_UNICAST)
+ continue;
+
++ if (fa->fa_tos &&
++ fa->fa_tos != flp->fl4_tos)
++ continue;
+ if (next_fi->fib_priority > res->fi->fib_priority)
+ break;
+- if (!next_fi->fib_nh[0].nh_gw ||
+- next_fi->fib_nh[0].nh_scope != RT_SCOPE_LINK)
+- continue;
+ fa->fa_state |= FA_S_ACCESSED;
+
+- if (fi == NULL) {
+- if (next_fi != res->fi)
+- break;
+- } else if (!fib_detect_death(fi, order, &last_resort,
+- &last_idx, &fn_hash_last_dflt)) {
++ if (!first_fa) {
++ last_dflt = fa->fa_last_dflt;
++ first_fa = fa;
++ }
++ if (fi && !fib_detect_death(fi, order, &last_resort,
++ &last_idx, &last_dflt, &last_nhsel, flp)) {
+ if (res->fi)
+ fib_info_put(res->fi);
+ res->fi = fi;
+ atomic_inc(&fi->fib_clntref);
+- fn_hash_last_dflt = order;
++ first_fa->fa_last_dflt = order;
+ goto out;
+ }
+ fi = next_fi;
+ order++;
+ }
++ break;
+ }
+
+ if (order <= 0 || fi == NULL) {
+- fn_hash_last_dflt = -1;
++ if (fi && fi->fib_nhs > 1 &&
++ fib_detect_death(fi, order, &last_resort, &last_idx,
++ &last_dflt, &last_nhsel, flp) &&
++ last_resort == fi) {
++ read_lock_bh(&fib_nhflags_lock);
++ fi->fib_nh[last_nhsel].nh_flags &= ~RTNH_F_SUSPECT;
++ read_unlock_bh(&fib_nhflags_lock);
++ }
++ if (first_fa) first_fa->fa_last_dflt = -1;
+ goto out;
+ }
+
+- if (!fib_detect_death(fi, order, &last_resort, &last_idx, &fn_hash_last_dflt)) {
++ if (!fib_detect_death(fi, order, &last_resort, &last_idx,
++ &last_dflt, &last_nhsel, flp)) {
+ if (res->fi)
+ fib_info_put(res->fi);
+ res->fi = fi;
+ atomic_inc(&fi->fib_clntref);
+- fn_hash_last_dflt = order;
++ first_fa->fa_last_dflt = order;
+ goto out;
+ }
+
+@@ -350,8 +369,11 @@
+ res->fi = last_resort;
+ if (last_resort)
+ atomic_inc(&last_resort->fib_clntref);
++ read_lock_bh(&fib_nhflags_lock);
++ last_resort->fib_nh[last_nhsel].nh_flags &= ~RTNH_F_SUSPECT;
++ read_unlock_bh(&fib_nhflags_lock);
++ first_fa->fa_last_dflt = last_idx;
+ }
+- fn_hash_last_dflt = last_idx;
+ out:
+ read_unlock(&fib_hash_lock);
+ }
+@@ -447,6 +469,7 @@
+ write_lock_bh(&fib_hash_lock);
+ fi_drop = fa->fa_info;
+ fa->fa_info = fi;
++ fa->fa_last_dflt = -1;
+ fa->fa_type = cfg->fc_type;
+ fa->fa_scope = cfg->fc_scope;
+ state = fa->fa_state;
+@@ -506,6 +529,7 @@
+ new_fa->fa_type = cfg->fc_type;
+ new_fa->fa_scope = cfg->fc_scope;
+ new_fa->fa_state = 0;
++ new_fa->fa_last_dflt = -1;
+
+ /*
+ * Insert new entry to the list.
+diff -urN linux-2.6.19.old/net/ipv4/fib_lookup.h linux-2.6.19.dev/net/ipv4/fib_lookup.h
+--- linux-2.6.19.old/net/ipv4/fib_lookup.h 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/fib_lookup.h 2006-12-14 03:13:53.000000000 +0100
+@@ -9,6 +9,7 @@
+ struct list_head fa_list;
+ struct rcu_head rcu;
+ struct fib_info *fa_info;
++ int fa_last_dflt;
+ u8 fa_tos;
+ u8 fa_type;
+ u8 fa_scope;
+@@ -35,6 +36,7 @@
+ u8 tos, u32 prio);
+ extern int fib_detect_death(struct fib_info *fi, int order,
+ struct fib_info **last_resort,
+- int *last_idx, int *dflt);
++ int *last_idx, int *dflt, int *last_nhsel,
++ const struct flowi *flp);
+
+ #endif /* _FIB_LOOKUP_H */
+diff -urN linux-2.6.19.old/net/ipv4/fib_rules.c linux-2.6.19.dev/net/ipv4/fib_rules.c
+--- linux-2.6.19.old/net/ipv4/fib_rules.c 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/fib_rules.c 2006-12-14 03:13:53.000000000 +0100
+@@ -89,6 +89,11 @@
+ }
+ #endif
+
++int fib_result_table(struct fib_result *res)
++{
++ return res->r->table;
++}
++
+ int fib_lookup(struct flowi *flp, struct fib_result *res)
+ {
+ struct fib_lookup_arg arg = {
+@@ -140,7 +145,8 @@
+ void fib_select_default(const struct flowi *flp, struct fib_result *res)
+ {
+ if (res->r && res->r->action == FR_ACT_TO_TBL &&
+- FIB_RES_GW(*res) && FIB_RES_NH(*res).nh_scope == RT_SCOPE_LINK) {
++ ((FIB_RES_GW(*res) && FIB_RES_NH(*res).nh_scope == RT_SCOPE_LINK) ||
++ FIB_RES_NH(*res).nh_scope == RT_SCOPE_HOST)) {
+ struct fib_table *tb;
+ if ((tb = fib_get_table(res->r->table)) != NULL)
+ tb->tb_select_default(tb, flp, res);
+diff -urN linux-2.6.19.old/net/ipv4/fib_semantics.c linux-2.6.19.dev/net/ipv4/fib_semantics.c
+--- linux-2.6.19.old/net/ipv4/fib_semantics.c 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/fib_semantics.c 2006-12-14 03:13:53.000000000 +0100
+@@ -55,6 +55,7 @@
+ static struct hlist_head *fib_info_laddrhash;
+ static unsigned int fib_hash_size;
+ static unsigned int fib_info_cnt;
++rwlock_t fib_nhflags_lock = RW_LOCK_UNLOCKED;
+
+ #define DEVINDEX_HASHBITS 8
+ #define DEVINDEX_HASHSIZE (1U << DEVINDEX_HASHBITS)
+@@ -190,7 +191,7 @@
+ #ifdef CONFIG_NET_CLS_ROUTE
+ nh->nh_tclassid != onh->nh_tclassid ||
+ #endif
+- ((nh->nh_flags^onh->nh_flags)&~RTNH_F_DEAD))
++ ((nh->nh_flags^onh->nh_flags)&~RTNH_F_BADSTATE))
+ return -1;
+ onh++;
+ } endfor_nexthops(fi);
+@@ -227,7 +228,7 @@
+ nfi->fib_priority == fi->fib_priority &&
+ memcmp(nfi->fib_metrics, fi->fib_metrics,
+ sizeof(fi->fib_metrics)) == 0 &&
+- ((nfi->fib_flags^fi->fib_flags)&~RTNH_F_DEAD) == 0 &&
++ ((nfi->fib_flags^fi->fib_flags)&~RTNH_F_BADSTATE) == 0 &&
+ (nfi->fib_nhs == 0 || nh_comp(fi, nfi) == 0))
+ return fi;
+ }
+@@ -319,26 +320,70 @@
+ }
+
+ int fib_detect_death(struct fib_info *fi, int order,
+- struct fib_info **last_resort, int *last_idx, int *dflt)
++ struct fib_info **last_resort, int *last_idx, int *dflt,
++ int *last_nhsel, const struct flowi *flp)
+ {
+ struct neighbour *n;
+- int state = NUD_NONE;
++ int nhsel;
++ int state;
++ struct fib_nh * nh;
++ u32 dst;
++ int flag, dead = 1;
++
++ /* change_nexthops(fi) { */
++ for (nhsel = 0, nh = fi->fib_nh; nhsel < fi->fib_nhs; nh++, nhsel++) {
++ if (flp->oif && flp->oif != nh->nh_oif)
++ continue;
++ if (flp->fl4_gw && flp->fl4_gw != nh->nh_gw && nh->nh_gw &&
++ nh->nh_scope == RT_SCOPE_LINK)
++ continue;
++ if (nh->nh_flags & RTNH_F_DEAD)
++ continue;
+
+- n = neigh_lookup(&arp_tbl, &fi->fib_nh[0].nh_gw, fi->fib_dev);
+- if (n) {
+- state = n->nud_state;
+- neigh_release(n);
+- }
+- if (state==NUD_REACHABLE)
+- return 0;
+- if ((state&NUD_VALID) && order != *dflt)
+- return 0;
+- if ((state&NUD_VALID) ||
+- (*last_idx<0 && order > *dflt)) {
+- *last_resort = fi;
+- *last_idx = order;
++ flag = 0;
++ if (nh->nh_dev->flags & IFF_NOARP) {
++ dead = 0;
++ goto setfl;
++ }
++
++ dst = nh->nh_gw;
++ if (!nh->nh_gw || nh->nh_scope != RT_SCOPE_LINK)
++ dst = flp->fl4_dst;
++
++ state = NUD_NONE;
++ n = neigh_lookup(&arp_tbl, &dst, nh->nh_dev);
++ if (n) {
++ state = n->nud_state;
++ neigh_release(n);
++ }
++ if (state==NUD_REACHABLE ||
++ ((state&NUD_VALID) && order != *dflt)) {
++ dead = 0;
++ goto setfl;
++ }
++ if (!(state&NUD_VALID))
++ flag = 1;
++ if (!dead)
++ goto setfl;
++ if ((state&NUD_VALID) ||
++ (*last_idx<0 && order >= *dflt)) {
++ *last_resort = fi;
++ *last_idx = order;
++ *last_nhsel = nhsel;
++ }
++
++ setfl:
++
++ read_lock_bh(&fib_nhflags_lock);
++ if (flag)
++ nh->nh_flags |= RTNH_F_SUSPECT;
++ else
++ nh->nh_flags &= ~RTNH_F_SUSPECT;
++ read_unlock_bh(&fib_nhflags_lock);
+ }
+- return 1;
++ /* } endfor_nexthops(fi) */
++
++ return dead;
+ }
+
+ #ifdef CONFIG_IP_ROUTE_MULTIPATH
+@@ -508,8 +553,11 @@
+ return -EINVAL;
+ if ((dev = __dev_get_by_index(nh->nh_oif)) == NULL)
+ return -ENODEV;
+- if (!(dev->flags&IFF_UP))
+- return -ENETDOWN;
++ if (!(dev->flags&IFF_UP)) {
++ if (fi->fib_protocol != RTPROT_STATIC)
++ return -ENETDOWN;
++ nh->nh_flags |= RTNH_F_DEAD;
++ }
+ nh->nh_dev = dev;
+ dev_hold(dev);
+ nh->nh_scope = RT_SCOPE_LINK;
+@@ -529,24 +577,48 @@
+ /* It is not necessary, but requires a bit of thinking */
+ if (fl.fl4_scope < RT_SCOPE_LINK)
+ fl.fl4_scope = RT_SCOPE_LINK;
+- if ((err = fib_lookup(&fl, &res)) != 0)
+- return err;
++ err = fib_lookup(&fl, &res);
+ }
+- err = -EINVAL;
+- if (res.type != RTN_UNICAST && res.type != RTN_LOCAL)
+- goto out;
+- nh->nh_scope = res.scope;
+- nh->nh_oif = FIB_RES_OIF(res);
+- if ((nh->nh_dev = FIB_RES_DEV(res)) == NULL)
+- goto out;
+- dev_hold(nh->nh_dev);
+- err = -ENETDOWN;
+- if (!(nh->nh_dev->flags & IFF_UP))
+- goto out;
+- err = 0;
++ if (err) {
++ struct in_device *in_dev;
++
++ if (err != -ENETUNREACH ||
++ fi->fib_protocol != RTPROT_STATIC)
++ return err;
++
++ in_dev = inetdev_by_index(nh->nh_oif);
++ if (in_dev == NULL ||
++ in_dev->dev->flags & IFF_UP) {
++ if (in_dev)
++ in_dev_put(in_dev);
++ return err;
++ }
++ nh->nh_flags |= RTNH_F_DEAD;
++ nh->nh_scope = RT_SCOPE_LINK;
++ nh->nh_dev = in_dev->dev;
++ dev_hold(nh->nh_dev);
++ in_dev_put(in_dev);
++ } else {
++ err = -EINVAL;
++ if (res.type != RTN_UNICAST && res.type != RTN_LOCAL)
++ goto out;
++ nh->nh_scope = res.scope;
++ nh->nh_oif = FIB_RES_OIF(res);
++ if ((nh->nh_dev = FIB_RES_DEV(res)) == NULL)
++ goto out;
++ dev_hold(nh->nh_dev);
++ if (!(nh->nh_dev->flags & IFF_UP)) {
++ if (fi->fib_protocol != RTPROT_STATIC) {
++ err = -ENETDOWN;
++ goto out;
++ }
++ nh->nh_flags |= RTNH_F_DEAD;
++ }
++ err = 0;
+ out:
+- fib_res_put(&res);
+- return err;
++ fib_res_put(&res);
++ return err;
++ }
+ } else {
+ struct in_device *in_dev;
+
+@@ -557,8 +629,11 @@
+ if (in_dev == NULL)
+ return -ENODEV;
+ if (!(in_dev->dev->flags&IFF_UP)) {
+- in_dev_put(in_dev);
+- return -ENETDOWN;
++ if (fi->fib_protocol != RTPROT_STATIC) {
++ in_dev_put(in_dev);
++ return -ENETDOWN;
++ }
++ nh->nh_flags |= RTNH_F_DEAD;
+ }
+ nh->nh_dev = in_dev->dev;
+ dev_hold(nh->nh_dev);
+@@ -881,8 +956,12 @@
+ for_nexthops(fi) {
+ if (nh->nh_flags&RTNH_F_DEAD)
+ continue;
+- if (!flp->oif || flp->oif == nh->nh_oif)
+- break;
++ if (flp->oif && flp->oif != nh->nh_oif)
++ continue;
++ if (flp->fl4_gw && flp->fl4_gw != nh->nh_gw &&
++ nh->nh_gw && nh->nh_scope == RT_SCOPE_LINK)
++ continue;
++ break;
+ }
+ #ifdef CONFIG_IP_ROUTE_MULTIPATH
+ if (nhsel < fi->fib_nhs) {
+@@ -1056,18 +1135,29 @@
+ prev_fi = fi;
+ dead = 0;
+ change_nexthops(fi) {
+- if (nh->nh_flags&RTNH_F_DEAD)
+- dead++;
+- else if (nh->nh_dev == dev &&
+- nh->nh_scope != scope) {
+- nh->nh_flags |= RTNH_F_DEAD;
++ if (nh->nh_flags&RTNH_F_DEAD) {
++ if (fi->fib_protocol!=RTPROT_STATIC ||
++ nh->nh_dev == NULL ||
++ __in_dev_get_rtnl(nh->nh_dev) == NULL ||
++ nh->nh_dev->flags&IFF_UP)
++ dead++;
++ } else if (nh->nh_dev == dev &&
++ nh->nh_scope != scope) {
++ write_lock_bh(&fib_nhflags_lock);
+ #ifdef CONFIG_IP_ROUTE_MULTIPATH
+- spin_lock_bh(&fib_multipath_lock);
++ spin_lock(&fib_multipath_lock);
++ nh->nh_flags |= RTNH_F_DEAD;
+ fi->fib_power -= nh->nh_power;
+ nh->nh_power = 0;
+- spin_unlock_bh(&fib_multipath_lock);
++ spin_unlock(&fib_multipath_lock);
++#else
++ nh->nh_flags |= RTNH_F_DEAD;
+ #endif
+- dead++;
++ write_unlock_bh(&fib_nhflags_lock);
++ if (fi->fib_protocol!=RTPROT_STATIC ||
++ force ||
++ __in_dev_get_rtnl(dev) == NULL)
++ dead++;
+ }
+ #ifdef CONFIG_IP_ROUTE_MULTIPATH
+ if (force > 1 && nh->nh_dev == dev) {
+@@ -1086,11 +1176,8 @@
+ return ret;
+ }
+
+-#ifdef CONFIG_IP_ROUTE_MULTIPATH
+-
+ /*
+- Dead device goes up. We wake up dead nexthops.
+- It takes sense only on multipath routes.
++ Dead device goes up or new address is added. We wake up dead nexthops.
+ */
+
+ int fib_sync_up(struct net_device *dev)
+@@ -1100,8 +1187,10 @@
+ struct hlist_head *head;
+ struct hlist_node *node;
+ struct fib_nh *nh;
+- int ret;
++ struct fib_result res;
++ int ret, rep;
+
++repeat:
+ if (!(dev->flags&IFF_UP))
+ return 0;
+
+@@ -1109,6 +1198,7 @@
+ hash = fib_devindex_hashfn(dev->ifindex);
+ head = &fib_info_devhash[hash];
+ ret = 0;
++ rep = 0;
+
+ hlist_for_each_entry(nh, node, head, nh_hash) {
+ struct fib_info *fi = nh->nh_parent;
+@@ -1121,19 +1211,37 @@
+ prev_fi = fi;
+ alive = 0;
+ change_nexthops(fi) {
+- if (!(nh->nh_flags&RTNH_F_DEAD)) {
+- alive++;
++ if (!(nh->nh_flags&RTNH_F_DEAD))
+ continue;
+- }
+ if (nh->nh_dev == NULL || !(nh->nh_dev->flags&IFF_UP))
+ continue;
+ if (nh->nh_dev != dev || !__in_dev_get_rtnl(dev))
+ continue;
++ if (nh->nh_gw && fi->fib_protocol == RTPROT_STATIC) {
++ struct flowi fl = {
++ .nl_u = { .ip4_u =
++ { .daddr = nh->nh_gw,
++ .scope = nh->nh_scope } },
++ .oif = nh->nh_oif,
++ };
++ if (fib_lookup(&fl, &res) != 0)
++ continue;
++ if (res.type != RTN_UNICAST &&
++ res.type != RTN_LOCAL) {
++ fib_res_put(&res);
++ continue;
++ }
++ nh->nh_scope = res.scope;
++ fib_res_put(&res);
++ rep = 1;
++ }
+ alive++;
++#ifdef CONFIG_IP_ROUTE_MULTIPATH
+ spin_lock_bh(&fib_multipath_lock);
+ nh->nh_power = 0;
+ nh->nh_flags &= ~RTNH_F_DEAD;
+ spin_unlock_bh(&fib_multipath_lock);
++#endif
+ } endfor_nexthops(fi)
+
+ if (alive > 0) {
+@@ -1141,10 +1249,14 @@
+ ret++;
+ }
+ }
++ if (rep)
++ goto repeat;
+
+ return ret;
+ }
+
++#ifdef CONFIG_IP_ROUTE_MULTIPATH
++
+ /*
+ The algorithm is suboptimal, but it provides really
+ fair weighted route distribution.
+@@ -1153,24 +1265,45 @@
+ void fib_select_multipath(const struct flowi *flp, struct fib_result *res)
+ {
+ struct fib_info *fi = res->fi;
+- int w;
++ int w, alive;
+
+ spin_lock_bh(&fib_multipath_lock);
++ if (flp->oif) {
++ int sel = -1;
++ w = -1;
++ change_nexthops(fi) {
++ if (flp->oif != nh->nh_oif)
++ continue;
++ if (flp->fl4_gw && flp->fl4_gw != nh->nh_gw &&
++ nh->nh_gw && nh->nh_scope == RT_SCOPE_LINK)
++ continue;
++ if (!(nh->nh_flags&RTNH_F_BADSTATE)) {
++ if (nh->nh_power > w) {
++ w = nh->nh_power;
++ sel = nhsel;
++ }
++ }
++ } endfor_nexthops(fi);
++ if (sel >= 0) {
++ spin_unlock_bh(&fib_multipath_lock);
++ res->nh_sel = sel;
++ return;
++ }
++ goto last_resort;
++ }
++
++repeat:
+ if (fi->fib_power <= 0) {
+ int power = 0;
+ change_nexthops(fi) {
+- if (!(nh->nh_flags&RTNH_F_DEAD)) {
++ if (!(nh->nh_flags&RTNH_F_BADSTATE)) {
+ power += nh->nh_weight;
+ nh->nh_power = nh->nh_weight;
+ }
+ } endfor_nexthops(fi);
+ fi->fib_power = power;
+- if (power <= 0) {
+- spin_unlock_bh(&fib_multipath_lock);
+- /* Race condition: route has just become dead. */
+- res->nh_sel = 0;
+- return;
+- }
++ if (power <= 0)
++ goto last_resort;
+ }
+
+
+@@ -1180,20 +1313,40 @@
+
+ w = jiffies % fi->fib_power;
+
++ alive = 0;
+ change_nexthops(fi) {
+- if (!(nh->nh_flags&RTNH_F_DEAD) && nh->nh_power) {
++ if (!(nh->nh_flags&RTNH_F_BADSTATE) && nh->nh_power) {
+ if ((w -= nh->nh_power) <= 0) {
+ nh->nh_power--;
+ fi->fib_power--;
+- res->nh_sel = nhsel;
+ spin_unlock_bh(&fib_multipath_lock);
++ res->nh_sel = nhsel;
+ return;
+ }
++ alive = 1;
++ }
++ } endfor_nexthops(fi);
++ if (alive) {
++ fi->fib_power = 0;
++ goto repeat;
++ }
++
++last_resort:
++
++ for_nexthops(fi) {
++ if (!(nh->nh_flags&RTNH_F_DEAD)) {
++ if (flp->oif && flp->oif != nh->nh_oif)
++ continue;
++ if (flp->fl4_gw && flp->fl4_gw != nh->nh_gw &&
++ nh->nh_gw && nh->nh_scope == RT_SCOPE_LINK)
++ continue;
++ spin_unlock_bh(&fib_multipath_lock);
++ res->nh_sel = nhsel;
++ return;
+ }
+ } endfor_nexthops(fi);
+
+ /* Race condition: route has just become dead. */
+- res->nh_sel = 0;
+ spin_unlock_bh(&fib_multipath_lock);
+ }
+ #endif
+diff -urN linux-2.6.19.old/net/ipv4/netfilter/ip_nat_core.c linux-2.6.19.dev/net/ipv4/netfilter/ip_nat_core.c
+--- linux-2.6.19.old/net/ipv4/netfilter/ip_nat_core.c 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/netfilter/ip_nat_core.c 2006-12-14 03:13:53.000000000 +0100
+@@ -573,6 +573,53 @@
+ EXPORT_SYMBOL_GPL(ip_nat_port_range_to_nfattr);
+ #endif
+
++unsigned int
++ip_nat_route_input(unsigned int hooknum,
++ struct sk_buff **pskb,
++ const struct net_device *in,
++ const struct net_device *out,
++ int (*okfn)(struct sk_buff *))
++{
++ struct sk_buff *skb = *pskb;
++ struct iphdr *iph;
++ struct ip_conntrack *conn;
++ enum ip_conntrack_info ctinfo;
++ enum ip_conntrack_dir dir;
++ unsigned long statusbit;
++ u32 saddr;
++
++ if (!(conn = ip_conntrack_get(skb, &ctinfo)))
++ return NF_ACCEPT;
++
++ if (!(conn->status & IPS_NAT_DONE_MASK))
++ return NF_ACCEPT;
++ dir = CTINFO2DIR(ctinfo);
++ statusbit = IPS_SRC_NAT;
++ if (dir == IP_CT_DIR_REPLY)
++ statusbit ^= IPS_NAT_MASK;
++ if (!(conn->status & statusbit))
++ return NF_ACCEPT;
++
++ if (skb->dst)
++ return NF_ACCEPT;
++
++ if (skb->len < sizeof(struct iphdr))
++ return NF_ACCEPT;
++
++ /* use daddr in other direction as masquerade address (lsrc) */
++ iph = skb->nh.iph;
++ saddr = conn->tuplehash[!dir].tuple.dst.ip;
++ if (saddr == iph->saddr)
++ return NF_ACCEPT;
++
++ if (ip_route_input_lookup(skb, iph->daddr, iph->saddr, iph->tos,
++ skb->dev, saddr))
++ return NF_DROP;
++
++ return NF_ACCEPT;
++}
++EXPORT_SYMBOL_GPL(ip_nat_route_input);
++
+ static int __init ip_nat_init(void)
+ {
+ size_t i;
+diff -urN linux-2.6.19.old/net/ipv4/netfilter/ip_nat_standalone.c linux-2.6.19.dev/net/ipv4/netfilter/ip_nat_standalone.c
+--- linux-2.6.19.old/net/ipv4/netfilter/ip_nat_standalone.c 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/netfilter/ip_nat_standalone.c 2006-12-14 03:13:53.000000000 +0100
+@@ -325,6 +325,14 @@
+ .hooknum = NF_IP_LOCAL_OUT,
+ .priority = NF_IP_PRI_NAT_DST,
+ },
++ /* Before routing, route before mangling */
++ {
++ .hook = ip_nat_route_input,
++ .owner = THIS_MODULE,
++ .pf = PF_INET,
++ .hooknum = NF_IP_PRE_ROUTING,
++ .priority = NF_IP_PRI_LAST-1,
++ },
+ /* After packet filtering, change source */
+ {
+ .hook = ip_nat_fn,
+diff -urN linux-2.6.19.old/net/ipv4/netfilter/ipt_MASQUERADE.c linux-2.6.19.dev/net/ipv4/netfilter/ipt_MASQUERADE.c
+--- linux-2.6.19.old/net/ipv4/netfilter/ipt_MASQUERADE.c 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/netfilter/ipt_MASQUERADE.c 2006-12-14 03:13:53.000000000 +0100
+@@ -85,13 +85,31 @@
+ return NF_ACCEPT;
+
+ mr = targinfo;
+- rt = (struct rtable *)(*pskb)->dst;
+- newsrc = inet_select_addr(out, rt->rt_gateway, RT_SCOPE_UNIVERSE);
+- if (!newsrc) {
+- printk("MASQUERADE: %s ate my IP address\n", out->name);
+- return NF_DROP;
++
++ {
++ struct flowi fl = { .nl_u = { .ip4_u =
++ { .daddr = (*pskb)->nh.iph->daddr,
++ .tos = (RT_TOS((*pskb)->nh.iph->tos) |
++ RTO_CONN),
++ .gw = ((struct rtable *) (*pskb)->dst)->rt_gateway,
++#ifdef CONFIG_IP_ROUTE_FWMARK
++ .fwmark = (*pskb)->nfmark
++#endif
++ } },
++ .oif = out->ifindex };
++ if (ip_route_output_key(&rt, &fl) != 0) {
++ /* Funky routing can do this. */
++ if (net_ratelimit())
++ printk("MASQUERADE:"
++ " No route: Rusty's brain broke!\n");
++ return NF_DROP;
++ }
+ }
+
++ newsrc = rt->rt_src;
++ DEBUGP("newsrc = %u.%u.%u.%u\n", NIPQUAD(newsrc));
++ ip_rt_put(rt);
++
+ write_lock_bh(&masq_lock);
+ ct->nat.masq_index = out->ifindex;
+ write_unlock_bh(&masq_lock);
+diff -urN linux-2.6.19.old/net/ipv4/route.c linux-2.6.19.dev/net/ipv4/route.c
+--- linux-2.6.19.old/net/ipv4/route.c 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/net/ipv4/route.c 2006-12-14 03:13:53.000000000 +0100
+@@ -1211,6 +1211,7 @@
+
+ /* Gateway is different ... */
+ rt->rt_gateway = new_gw;
++ if (rt->fl.fl4_gw) rt->fl.fl4_gw = new_gw;
+
+ /* Redirect received -> path was valid */
+ dst_confirm(&rth->u.dst);
+@@ -1647,6 +1648,7 @@
+ rth->fl.fl4_fwmark= skb->nfmark;
+ #endif
+ rth->fl.fl4_src = saddr;
++ rth->fl.fl4_lsrc = 0;
+ rth->rt_src = saddr;
+ #ifdef CONFIG_NET_CLS_ROUTE
+ rth->u.dst.tclassid = itag;
+@@ -1657,6 +1659,7 @@
+ dev_hold(rth->u.dst.dev);
+ rth->idev = in_dev_get(rth->u.dst.dev);
+ rth->fl.oif = 0;
++ rth->fl.fl4_gw = 0;
+ rth->rt_gateway = daddr;
+ rth->rt_spec_dst= spec_dst;
+ rth->rt_type = RTN_MULTICAST;
+@@ -1721,7 +1724,7 @@
+ struct fib_result* res,
+ struct in_device *in_dev,
+ __be32 daddr, __be32 saddr, u32 tos,
+- struct rtable **result)
++ u32 lsrc, struct rtable **result)
+ {
+
+ struct rtable *rth;
+@@ -1755,6 +1758,7 @@
+ flags |= RTCF_DIRECTSRC;
+
+ if (out_dev == in_dev && err && !(flags & (RTCF_NAT | RTCF_MASQ)) &&
++ !lsrc &&
+ (IN_DEV_SHARED_MEDIA(out_dev) ||
+ inet_addr_onlink(out_dev, saddr, FIB_RES_GW(*res))))
+ flags |= RTCF_DOREDIRECT;
+@@ -1794,6 +1798,7 @@
+ #endif
+ rth->fl.fl4_src = saddr;
+ rth->rt_src = saddr;
++ rth->fl.fl4_lsrc = lsrc;
+ rth->rt_gateway = daddr;
+ rth->rt_iif =
+ rth->fl.iif = in_dev->dev->ifindex;
+@@ -1801,6 +1806,7 @@
+ dev_hold(rth->u.dst.dev);
+ rth->idev = in_dev_get(rth->u.dst.dev);
+ rth->fl.oif = 0;
++ rth->fl.fl4_gw = 0;
+ rth->rt_spec_dst= spec_dst;
+
+ rth->u.dst.input = ip_forward;
+@@ -1822,19 +1828,21 @@
+ struct fib_result* res,
+ const struct flowi *fl,
+ struct in_device *in_dev,
+- __be32 daddr, __be32 saddr, u32 tos)
++ __be32 daddr, __be32 saddr, u32 tos,
++ u32 lsrc)
+ {
+ struct rtable* rth = NULL;
+ int err;
+ unsigned hash;
+
++ fib_select_default(fl, res);
+ #ifdef CONFIG_IP_ROUTE_MULTIPATH
+- if (res->fi && res->fi->fib_nhs > 1 && fl->oif == 0)
++ if (res->fi && res->fi->fib_nhs > 1)
+ fib_select_multipath(fl, res);
+ #endif
+
+ /* create a routing cache entry */
+- err = __mkroute_input(skb, res, in_dev, daddr, saddr, tos, &rth);
++ err = __mkroute_input(skb, res, in_dev, daddr, saddr, tos, lsrc, &rth);
+ if (err)
+ return err;
+
+@@ -1847,7 +1855,8 @@
+ struct fib_result* res,
+ const struct flowi *fl,
+ struct in_device *in_dev,
+- __be32 daddr, __be32 saddr, u32 tos)
++ __be32 daddr, __be32 saddr, u32 tos,
++ u32 lsrc)
+ {
+ #ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED
+ struct rtable* rth = NULL, *rtres;
+@@ -1863,7 +1872,7 @@
+ /* distinguish between multipath and singlepath */
+ if (hopcount < 2)
+ return ip_mkroute_input_def(skb, res, fl, in_dev, daddr,
+- saddr, tos);
++ saddr, tos, 0);
+
+ /* add all alternatives to the routing cache */
+ for (hop = 0; hop < hopcount; hop++) {
+@@ -1875,7 +1884,7 @@
+
+ /* create a routing cache entry */
+ err = __mkroute_input(skb, res, in_dev, daddr, saddr, tos,
+- &rth);
++ 0, &rth);
+ if (err)
+ return err;
+
+@@ -1895,7 +1904,7 @@
+ skb->dst = &rtres->u.dst;
+ return err;
+ #else /* CONFIG_IP_ROUTE_MULTIPATH_CACHED */
+- return ip_mkroute_input_def(skb, res, fl, in_dev, daddr, saddr, tos);
++ return ip_mkroute_input_def(skb, res, fl, in_dev, daddr, saddr, tos, lsrc);
+ #endif /* CONFIG_IP_ROUTE_MULTIPATH_CACHED */
+ }
+
+@@ -1911,20 +1920,20 @@
+ */
+
+ static int ip_route_input_slow(struct sk_buff *skb, __be32 daddr, __be32 saddr,
+- u8 tos, struct net_device *dev)
++ u8 tos, struct net_device *dev, u32 lsrc)
+ {
+ struct fib_result res;
+ struct in_device *in_dev = in_dev_get(dev);
+ struct flowi fl = { .nl_u = { .ip4_u =
+ { .daddr = daddr,
+- .saddr = saddr,
++ .saddr = lsrc? : saddr,
+ .tos = tos,
+ .scope = RT_SCOPE_UNIVERSE,
+ #ifdef CONFIG_IP_ROUTE_FWMARK
+ .fwmark = skb->nfmark
+ #endif
+ } },
+- .iif = dev->ifindex };
++ .iif = lsrc? loopback_dev.ifindex : dev->ifindex };
+ unsigned flags = 0;
+ u32 itag = 0;
+ struct rtable * rth;
+@@ -1957,6 +1966,12 @@
+ if (BADCLASS(daddr) || ZERONET(daddr) || LOOPBACK(daddr))
+ goto martian_destination;
+
++ if (lsrc) {
++ if (MULTICAST(lsrc) || BADCLASS(lsrc) ||
++ ZERONET(lsrc) || LOOPBACK(lsrc))
++ goto e_inval;
++ }
++
+ /*
+ * Now we are ready to route packet.
+ */
+@@ -1966,6 +1981,10 @@
+ goto no_route;
+ }
+ free_res = 1;
++ if (lsrc && res.type != RTN_UNICAST && res.type != RTN_NAT)
++ goto e_inval;
++ fl.iif = dev->ifindex;
++ fl.fl4_src = saddr;
+
+ RT_CACHE_STAT_INC(in_slow_tot);
+
+@@ -1990,7 +2009,7 @@
+ if (res.type != RTN_UNICAST)
+ goto martian_destination;
+
+- err = ip_mkroute_input(skb, &res, &fl, in_dev, daddr, saddr, tos);
++ err = ip_mkroute_input(skb, &res, &fl, in_dev, daddr, saddr, tos, lsrc);
+ if (err == -ENOBUFS)
+ goto e_nobufs;
+ if (err == -EINVAL)
+@@ -2005,6 +2024,8 @@
+ brd_input:
+ if (skb->protocol != htons(ETH_P_IP))
+ goto e_inval;
++ if (lsrc)
++ goto e_inval;
+
+ if (ZERONET(saddr))
+ spec_dst = inet_select_addr(dev, 0, RT_SCOPE_LINK);
+@@ -2047,6 +2068,7 @@
+ rth->u.dst.dev = &loopback_dev;
+ dev_hold(rth->u.dst.dev);
+ rth->idev = in_dev_get(rth->u.dst.dev);
++ rth->fl.fl4_gw = 0;
+ rth->rt_gateway = daddr;
+ rth->rt_spec_dst= spec_dst;
+ rth->u.dst.input= ip_local_deliver;
+@@ -2096,8 +2118,9 @@
+ goto e_inval;
+ }
+
+-int ip_route_input(struct sk_buff *skb, __be32 daddr, __be32 saddr,
+- u8 tos, struct net_device *dev)
++static inline int
++ip_route_input_cached(struct sk_buff *skb, __be32 daddr, __be32 saddr,
++ u8 tos, struct net_device *dev, u32 lsrc)
+ {
+ struct rtable * rth;
+ unsigned hash;
+@@ -2112,6 +2135,7 @@
+ if (rth->fl.fl4_dst == daddr &&
+ rth->fl.fl4_src == saddr &&
+ rth->fl.iif == iif &&
++ rth->fl.fl4_lsrc == lsrc &&
+ rth->fl.oif == 0 &&
+ #ifdef CONFIG_IP_ROUTE_FWMARK
+ rth->fl.fl4_fwmark == skb->nfmark &&
+@@ -2160,7 +2184,19 @@
+ rcu_read_unlock();
+ return -EINVAL;
+ }
+- return ip_route_input_slow(skb, daddr, saddr, tos, dev);
++ return ip_route_input_slow(skb, daddr, saddr, tos, dev, lsrc);
++}
++
++int ip_route_input(struct sk_buff *skb, u32 daddr, u32 saddr,
++ u8 tos, struct net_device *dev)
++{
++ return ip_route_input_cached(skb, daddr, saddr, tos, dev, 0);
++}
++
++int ip_route_input_lookup(struct sk_buff *skb, u32 daddr, u32 saddr,
++ u8 tos, struct net_device *dev, u32 lsrc)
++{
++ return ip_route_input_cached(skb, daddr, saddr, tos, dev, lsrc);
+ }
+
+ static inline int __mkroute_output(struct rtable **result,
+@@ -2239,6 +2275,7 @@
+ rth->fl.fl4_tos = tos;
+ rth->fl.fl4_src = oldflp->fl4_src;
+ rth->fl.oif = oldflp->oif;
++ rth->fl.fl4_gw = oldflp->fl4_gw;
+ #ifdef CONFIG_IP_ROUTE_FWMARK
+ rth->fl.fl4_fwmark= oldflp->fl4_fwmark;
+ #endif
+@@ -2381,6 +2418,7 @@
+ struct flowi fl = { .nl_u = { .ip4_u =
+ { .daddr = oldflp->fl4_dst,
+ .saddr = oldflp->fl4_src,
++ .gw = oldflp->fl4_gw,
+ .tos = tos & IPTOS_RT_MASK,
+ .scope = ((tos & RTO_ONLINK) ?
+ RT_SCOPE_LINK :
+@@ -2486,6 +2524,7 @@
+ dev_out = &loopback_dev;
+ dev_hold(dev_out);
+ fl.oif = loopback_dev.ifindex;
++ fl.fl4_gw = 0;
+ res.type = RTN_LOCAL;
+ flags |= RTCF_LOCAL;
+ goto make_route;
+@@ -2493,7 +2532,7 @@
+
+ if (fib_lookup(&fl, &res)) {
+ res.fi = NULL;
+- if (oldflp->oif) {
++ if (oldflp->oif && dev_out->flags & IFF_UP) {
+ /* Apparently, routing tables are wrong. Assume,
+ that the destination is on link.
+
+@@ -2533,6 +2572,7 @@
+ dev_out = &loopback_dev;
+ dev_hold(dev_out);
+ fl.oif = dev_out->ifindex;
++ fl.fl4_gw = 0;
+ if (res.fi)
+ fib_info_put(res.fi);
+ res.fi = NULL;
+@@ -2540,13 +2580,12 @@
+ goto make_route;
+ }
+
++ if (res.type == RTN_UNICAST)
++ fib_select_default(&fl, &res);
+ #ifdef CONFIG_IP_ROUTE_MULTIPATH
+- if (res.fi->fib_nhs > 1 && fl.oif == 0)
++ if (res.fi->fib_nhs > 1)
+ fib_select_multipath(&fl, &res);
+- else
+ #endif
+- if (!res.prefixlen && res.type == RTN_UNICAST && !fl.oif)
+- fib_select_default(&fl, &res);
+
+ if (!fl.fl4_src)
+ fl.fl4_src = FIB_RES_PREFSRC(res);
+@@ -2583,6 +2622,7 @@
+ rth->fl.fl4_src == flp->fl4_src &&
+ rth->fl.iif == 0 &&
+ rth->fl.oif == flp->oif &&
++ rth->fl.fl4_gw == flp->fl4_gw &&
+ #ifdef CONFIG_IP_ROUTE_FWMARK
+ rth->fl.fl4_fwmark == flp->fl4_fwmark &&
+ #endif
+@@ -3221,3 +3261,4 @@
+ EXPORT_SYMBOL(__ip_select_ident);
+ EXPORT_SYMBOL(ip_route_input);
+ EXPORT_SYMBOL(ip_route_output_key);
++EXPORT_SYMBOL(ip_route_input_lookup);
--- /dev/null
+diff -urN linux-2.6.19.old/fs/jffs2/build.c linux-2.6.19.dev/fs/jffs2/build.c
+--- linux-2.6.19.old/fs/jffs2/build.c 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/fs/jffs2/build.c 2006-12-14 03:13:57.000000000 +0100
+@@ -107,6 +107,17 @@
+ dbg_fsbuild("scanned flash completely\n");
+ jffs2_dbg_dump_block_lists_nolock(c);
+
++ if (c->flags & (1 << 7)) {
++ printk("%s(): unlocking the mtd device... ", __func__);
++ if (c->mtd->unlock)
++ c->mtd->unlock(c->mtd, 0, c->mtd->size);
++ printk("done.\n");
++
++ printk("%s(): erasing all blocks after the end marker... ", __func__);
++ jffs2_erase_pending_blocks(c, -1);
++ printk("done.\n");
++ }
++
+ dbg_fsbuild("pass 1 starting\n");
+ c->flags |= JFFS2_SB_FLAG_BUILDING;
+ /* Now scan the directory tree, increasing nlink according to every dirent found. */
+diff -urN linux-2.6.19.old/fs/jffs2/scan.c linux-2.6.19.dev/fs/jffs2/scan.c
+--- linux-2.6.19.old/fs/jffs2/scan.c 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/fs/jffs2/scan.c 2006-12-14 03:13:57.000000000 +0100
+@@ -141,9 +141,12 @@
+
+ /* reset summary info for next eraseblock scan */
+ jffs2_sum_reset_collected(s);
+-
+- ret = jffs2_scan_eraseblock(c, jeb, buf_size?flashbuf:(flashbuf+jeb->offset),
+- buf_size, s);
++
++ if (c->flags & (1 << 7))
++ ret = BLK_STATE_ALLFF;
++ else
++ ret = jffs2_scan_eraseblock(c, jeb, buf_size?flashbuf:(flashbuf+jeb->offset),
++ buf_size, s);
+
+ if (ret < 0)
+ goto out;
+@@ -540,6 +543,17 @@
+ return err;
+ }
+
++ if ((buf[0] == 0xde) &&
++ (buf[1] == 0xad) &&
++ (buf[2] == 0xc0) &&
++ (buf[3] == 0xde)) {
++ /* end of filesystem. erase everything after this point */
++ printk("%s(): End of filesystem marker found at 0x%x\n", __func__, jeb->offset);
++ c->flags |= (1 << 7);
++
++ return BLK_STATE_ALLFF;
++ }
++
+ /* We temporarily use 'ofs' as a pointer into the buffer/jeb */
+ ofs = 0;
+
--- /dev/null
+diff -urN linux-2.6.19.old/drivers/net/r8169.c linux-2.6.19.dev/drivers/net/r8169.c
+--- linux-2.6.19.old/drivers/net/r8169.c 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/drivers/net/r8169.c 2006-12-14 03:14:01.000000000 +0100
+@@ -491,7 +491,7 @@
+ #endif
+
+ static const u16 rtl8169_intr_mask =
+- SYSErr | LinkChg | RxOverflow | RxFIFOOver | TxErr | TxOK | RxErr | RxOK;
++ LinkChg | RxOverflow | RxFIFOOver | TxErr | TxOK | RxErr | RxOK;
+ static const u16 rtl8169_napi_event =
+ RxOK | RxOverflow | RxFIFOOver | TxOK | TxErr;
+ static const unsigned int rtl8169_rx_config =
+@@ -2584,10 +2584,12 @@
+ if (!(status & rtl8169_intr_mask))
+ break;
+
++#if 0
+ if (unlikely(status & SYSErr)) {
+ rtl8169_pcierr_interrupt(dev);
+ break;
+ }
++#endif
+
+ if (status & LinkChg)
+ rtl8169_check_link_status(dev, tp, ioaddr);
--- /dev/null
+diff -urN linux-2.6.19.old/fs/Kconfig linux-2.6.19.dev/fs/Kconfig
+--- linux-2.6.19.old/fs/Kconfig 2006-12-14 03:13:20.000000000 +0100
++++ linux-2.6.19.dev/fs/Kconfig 2006-12-14 03:14:03.000000000 +0100
+@@ -468,6 +468,9 @@
+ This option will enlarge your kernel, but it allows debugging of
+ ocfs2 filesystem issues.
+
++config MINI_FO
++ tristate "Mini fanout overlay filesystem"
++
+ config MINIX_FS
+ tristate "Minix fs support"
+ help
+diff -urN linux-2.6.19.old/fs/Makefile linux-2.6.19.dev/fs/Makefile
+--- linux-2.6.19.old/fs/Makefile 2006-12-14 03:13:20.000000000 +0100
++++ linux-2.6.19.dev/fs/Makefile 2006-12-14 03:14:03.000000000 +0100
+@@ -71,6 +71,7 @@
+ obj-$(CONFIG_RAMFS) += ramfs/
+ obj-$(CONFIG_HUGETLBFS) += hugetlbfs/
+ obj-$(CONFIG_CODA_FS) += coda/
++obj-$(CONFIG_MINI_FO) += mini_fo/
+ obj-$(CONFIG_MINIX_FS) += minix/
+ obj-$(CONFIG_FAT_FS) += fat/
+ obj-$(CONFIG_MSDOS_FS) += msdos/
+diff -urN linux-2.6.19.old/fs/mini_fo/aux.c linux-2.6.19.dev/fs/mini_fo/aux.c
+--- linux-2.6.19.old/fs/mini_fo/aux.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/fs/mini_fo/aux.c 2006-12-14 03:14:03.000000000 +0100
+@@ -0,0 +1,580 @@
++/*
++ * Copyright (c) 1997-2003 Erez Zadok
++ * Copyright (c) 2001-2003 Stony Brook University
++ *
++ * For specific licensing information, see the COPYING file distributed with
++ * this package, or get one from ftp://ftp.filesystems.org/pub/fist/COPYING.
++ *
++ * This Copyright notice must be kept intact and distributed with all
++ * fistgen sources INCLUDING sources generated by fistgen.
++ */
++/*
++ * Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++/*
++ * $Id$
++ */
++
++#ifdef HAVE_CONFIG_H
++# include <config.h>
++#endif
++
++#include "fist.h"
++#include "mini_fo.h"
++
++/* check if file exists in storage */
++int exists_in_storage(dentry_t *dentry)
++{
++ check_mini_fo_dentry(dentry);
++ if(dtost(dentry) == MODIFIED || dtost(dentry) == CREATED || dtost(dentry) == DEL_REWRITTEN)
++ return 1;
++ return 0;
++}
++
++/* check if dentry is in an existing state */
++int is_mini_fo_existant(dentry_t *dentry)
++{
++ check_mini_fo_dentry(dentry);
++
++ if(dtost(dentry) == DELETED || dtost(dentry) == NON_EXISTANT)
++ return 0;
++ else
++ return 1;
++}
++
++/*
++ * This function will create a negative storage dentry for
++ * dentry, what is required for many create like options.
++ * It will create the storage structure if necessary.
++ */
++int get_neg_sto_dentry(dentry_t *dentry)
++{
++ int err = 0;
++ unsigned int len;
++ const unsigned char *name;
++
++ if(!dentry ||
++ !dtopd(dentry) ||
++ !(dtost(dentry) == UNMODIFIED ||
++ dtost(dentry) == NON_EXISTANT ||
++ dtost(dentry) == DELETED)) {
++ printk(KERN_CRIT "mini_fo: get_neg_sto_dentry: invalid dentry passed.\n");
++ err = -1;
++ goto out;
++ }
++ /* Have we got a neg. dentry already? */
++ if(dtohd2(dentry)) {
++ err = 0;
++ goto out;
++ }
++ if(dtost(dentry->d_parent) == UNMODIFIED) {
++ /* build sto struct */
++ err = build_sto_structure(dentry->d_parent->d_parent, dentry->d_parent);
++ if(err ||
++ dtost(dentry->d_parent) != MODIFIED) {
++ printk(KERN_CRIT "mini_fo: get_neg_sto_dentry: ERROR building sto structure.\n");
++ err = -1;
++ goto out;
++ }
++ }
++
++ len = dentry->d_name.len;
++ name = dentry->d_name.name;
++
++ dtohd2(dentry) =
++ lookup_one_len(name, dtohd2(dentry->d_parent), len);
++
++ out:
++ return err;
++}
++
++int check_mini_fo_dentry(dentry_t *dentry)
++{
++ ASSERT(dentry != NULL);
++ ASSERT(dtopd(dentry) != NULL);
++ ASSERT((dtohd(dentry) != NULL) || (dtohd2(dentry) != NULL));
++
++/* if(dtost(dentry) == MODIFIED) { */
++/* ASSERT(dentry->d_inode != NULL); */
++/* ASSERT(dtohd(dentry) != NULL); */
++/* ASSERT(dtohd(dentry)->d_inode != NULL); */
++/* ASSERT(dtohd2(dentry) != NULL); */
++/* ASSERT(dtohd2(dentry)->d_inode != NULL); */
++/* } */
++/* else if(dtost(dentry) == UNMODIFIED) { */
++/* ASSERT(dentry->d_inode != NULL); */
++/* ASSERT( */
++/* } */
++ return 0;
++}
++
++int check_mini_fo_file(file_t *file)
++{
++ ASSERT(file != NULL);
++ ASSERT(ftopd(file) != NULL);
++ ASSERT(file->f_dentry != NULL);
++
++ /* violent checking, check depending of state and type
++ * if(S_ISDIR(file->f_dentry->d_inode->i_mode)) {}
++ */
++ ASSERT((ftohf(file) != NULL) || (ftohf2(file) != NULL));
++ return 0;
++}
++
++int check_mini_fo_inode(inode_t *inode)
++{
++ ASSERT(inode != NULL);
++ ASSERT(itopd(inode) != NULL);
++ ASSERT((itohi(inode) != NULL) || (itohi2(inode) != NULL));
++ return 0;
++}
++
++/*
++ * will walk a base path as provided by get_mini_fo_bpath and return
++ * the (hopefully ;-) ) positive dentry of the renamed base dir.
++ *
++ * This does some work of path_init.
++ */
++dentry_t *bpath_walk(super_block_t *sb, char *bpath)
++{
++ int err;
++ struct nameidata nd;
++
++ /* be paranoid */
++ if(!bpath || bpath[0] != '/') {
++ printk(KERN_CRIT "mini_fo: bpath_walk: Invalid string.\n");
++ return NULL;
++ }
++ if(!sb || !stopd(sb)) {
++ printk(KERN_CRIT "mini_fo: bpath_walk: Invalid sb.\n");
++ return NULL;
++ }
++
++ /* setup nd as path_init does */
++ nd.last_type = LAST_ROOT; /* if there are only slashes... */
++ nd.flags = LOOKUP_FOLLOW;
++ /* fix this: how do I reach this lock?
++ * read_lock(¤t->fs->lock); */
++ nd.mnt = mntget(stopd(sb)->hidden_mnt);
++ nd.dentry = dget(stopd(sb)->base_dir_dentry);
++ /* read_unlock(¤t->fs->lock); */
++
++ err = path_walk(bpath+1, &nd);
++
++ /* validate */
++ if (err || !nd.dentry || !nd.dentry->d_inode) {
++ printk(KERN_CRIT "mini_fo: bpath_walk: path_walk failed.\n");
++ return NULL;
++ }
++ return nd.dentry;
++}
++
++
++/* returns the full path of the basefile incl. its name */
++int get_mini_fo_bpath(dentry_t *dentry, char **bpath, int *bpath_len)
++{
++ char *buf_walker;
++ int len = 0;
++ dentry_t *sky_walker;
++
++ if(!dentry || !dtohd(dentry)) {
++ printk(KERN_CRIT "mini_fo: get_mini_fo_bpath: invalid dentry passed.\n");
++ return -1;
++ }
++ sky_walker = dtohd(dentry);
++
++ do {
++ len += sky_walker->d_name.len + 1 ; /* 1 for '/' */
++ sky_walker = sky_walker->d_parent;
++ } while(sky_walker != stopd(dentry->d_inode->i_sb)->base_dir_dentry);
++
++ /* 1 to oil the loop */
++ *bpath = (char*) kmalloc(len + 1, GFP_KERNEL);
++ if(!*bpath) {
++ printk(KERN_CRIT "mini_fo: get_mini_fo_bpath: out of mem.\n");
++ return -1;
++ }
++ buf_walker = *bpath+len; /* put it on last char */
++ *buf_walker = '\n';
++ sky_walker = dtohd(dentry);
++
++ do {
++ buf_walker -= sky_walker->d_name.len;
++ strncpy(buf_walker,
++ sky_walker->d_name.name,
++ sky_walker->d_name.len);
++ *(--buf_walker) = '/';
++ sky_walker = sky_walker->d_parent;
++ } while(sky_walker != stopd(dentry->d_inode->i_sb)->base_dir_dentry);
++
++ /* bpath_len doesn't count newline! */
++ *bpath_len = len;
++ return 0;
++}
++
++int mini_fo_cp_cont(dentry_t *tgt_dentry, struct vfsmount *tgt_mnt,
++ dentry_t *src_dentry, struct vfsmount *src_mnt)
++{
++ void *buf;
++ mm_segment_t old_fs;
++ file_t *tgt_file;
++ file_t *src_file;
++ int bytes, len, tmp, err;
++ err = 0;
++
++ if(!(tgt_dentry->d_inode && src_dentry->d_inode)) {
++ printk(KERN_CRIT "mini_fo_cp_cont: ERROR, neg. dentry passed.\n");
++ err = -EINVAL;
++ goto out;
++ }
++
++ dget(tgt_dentry);
++ dget(src_dentry);
++ mntget(tgt_mnt);
++ mntget(src_mnt);
++
++ /* open file write only */
++ tgt_file = dentry_open(tgt_dentry, tgt_mnt, 0x1);
++ if(!tgt_file || IS_ERR(tgt_file)) {
++ printk(KERN_CRIT "mini_fo_cp_cont: ERROR opening target file.\n");
++ err = PTR_ERR(tgt_file);
++ goto out_err;
++ }
++
++ /* open file read only */
++ src_file = dentry_open(src_dentry, src_mnt, 0x0);
++ if(!src_file || IS_ERR(src_file)) {
++ printk(KERN_CRIT "mini_fo_cp_cont: ERROR opening source file.\n");
++ err = PTR_ERR(src_file);
++
++ /* close target file */
++ fput(tgt_file);
++ goto out_err;
++ }
++
++ /* check if the filesystem(s) support read respective write */
++ if(!src_file->f_op->read || !tgt_file->f_op->write) {
++ printk(KERN_CRIT "mini_fo_cp_cont: ERROR, no fs read or write support.\n");
++ err = -EPERM;
++ goto out_close;
++ }
++
++ /* allocate a page for transfering the data */
++ buf = (void *) __get_free_page(GFP_KERNEL);
++ if(!buf) {
++ printk(KERN_CRIT "mini_fo_cp_cont: ERROR, out of kernel mem.\n");
++ goto out_err;
++ }
++
++ tgt_file->f_pos = 0;
++ src_file->f_pos = 0;
++
++ old_fs = get_fs();
++ set_fs(KERNEL_DS);
++
++ /* Doing this I assume that a read operation will return a full
++ * buffer while there is still data to read, and a less than
++ * full buffer when all data has been read.
++ */
++ bytes = len = PAGE_SIZE;
++ while(bytes == len) {
++ bytes = src_file->f_op->read(src_file, buf, len,
++ &src_file->f_pos);
++ tmp = tgt_file->f_op->write(tgt_file, buf, bytes,
++ &tgt_file->f_pos);
++ if(tmp != bytes) {
++ printk(KERN_CRIT "mini_fo_cp_cont: ERROR writing.\n");
++ goto out_close_unset;
++ }
++ }
++
++ free_page((unsigned long) buf);
++ set_fs(old_fs);
++ fput(tgt_file);
++ fput(src_file);
++ goto out;
++
++ out_close_unset:
++ free_page((unsigned long) buf);
++ set_fs(old_fs);
++
++ out_close:
++ fput(tgt_file);
++ fput(src_file);
++
++ out_err:
++ dput(tgt_dentry);
++ dput(src_dentry);
++
++ /* mk: not sure if this need to be done */
++ mntput(tgt_mnt);
++ mntput(src_mnt);
++
++ out:
++ return err;
++}
++
++/* mk:
++ * ndl (no-duplicate list) stuff
++ * This is used in mini_fo_readdir, to save the storage directory contents
++ * and later when reading base, match them against the list in order
++ * to avoid duplicates.
++ */
++
++/* add a file specified by name and len to the ndl
++ * Return values: 0 on success, <0 on failure.
++ */
++int ndl_add_entry(struct readdir_data *rd, const char *name, int len)
++{
++ struct ndl_entry *tmp_entry;
++
++ tmp_entry = (struct ndl_entry *)
++ kmalloc(sizeof(struct ndl_entry), GFP_KERNEL);
++ if(!tmp_entry) {
++ printk(KERN_CRIT "mini_fo: ndl_add_entry: out of mem.\n");
++ return -ENOMEM;
++ }
++ tmp_entry->name = (char*) kmalloc(len, GFP_KERNEL);
++ if(!tmp_entry->name) {
++ printk(KERN_CRIT "mini_fo: ndl_add_entry: out of mem.\n");
++ return -ENOMEM;
++ }
++ strncpy(tmp_entry->name, name, len);
++ tmp_entry->len = len;
++
++ list_add(&tmp_entry->list, &rd->ndl_list);
++ rd->ndl_size++;
++ return 0;
++}
++
++/* delete all list entries and free memory */
++void ndl_put_list(struct readdir_data *rd)
++{
++ struct list_head *tmp;
++ struct ndl_entry *tmp_entry;
++
++ if(rd->ndl_size <= 0)
++ return;
++ while(!list_empty(&rd->ndl_list)) {
++ tmp = rd->ndl_list.next;
++ list_del(tmp);
++ tmp_entry = list_entry(tmp, struct ndl_entry, list);
++ kfree(tmp_entry->name);
++ kfree(tmp_entry);
++ }
++ rd->ndl_size = 0;
++}
++
++/* Check if a file specified by name and len is in the ndl
++ * Return value: 0 if not in list, 1 if file is found in ndl.
++ */
++int ndl_check_entry(struct readdir_data *rd, const char *name, int len)
++{
++ struct list_head *tmp;
++ struct ndl_entry *tmp_entry;
++
++ if(rd->ndl_size <= 0)
++ return 0;
++
++ list_for_each(tmp, &rd->ndl_list) {
++ tmp_entry = list_entry(tmp, struct ndl_entry, list);
++ if(tmp_entry->len != len)
++ continue;
++ if(!strncmp(tmp_entry->name, name, len))
++ return 1;
++ }
++ return 0;
++}
++
++/* mk:
++ * Recursive function to create corresponding directorys in the storage fs.
++ * The function will build the storage directorys up to dentry.
++ */
++int build_sto_structure(dentry_t *dir, dentry_t *dentry)
++{
++ int err;
++ dentry_t *hidden_sto_dentry;
++ dentry_t *hidden_sto_dir_dentry;
++
++ if(dentry->d_parent != dir) {
++ printk(KERN_CRIT "mini_fo: build_sto_structure: invalid parameter or meta data corruption [1].\n");
++ return 1;
++ }
++
++ if(dtost(dir) != MODIFIED) {
++ err = build_sto_structure(dir->d_parent, dentry->d_parent);
++ if(err)
++ return err;
++ }
++
++ /* ok, coming back again. */
++ check_mini_fo_dentry(dentry);
++ hidden_sto_dentry = dtohd2(dentry);
++
++ if(!hidden_sto_dentry) {
++ /*
++ * This is the case after creating the first
++ * hidden_sto_dentry.
++ * After one negative storage_dentry, all pointers to
++ * hidden_storage dentries are set to NULL. We need to
++ * create the negative dentry before we create the storage
++ * file.
++ */
++ unsigned int len;
++ const unsigned char *name;
++ len = dtohd(dentry)->d_name.len;
++ name = dtohd(dentry)->d_name.name;
++ hidden_sto_dentry = lookup_one_len(name, dtohd2(dir), len);
++ dtohd2(dentry) = hidden_sto_dentry;
++ }
++
++ /* was: hidden_sto_dir_dentry = lock_parent(hidden_sto_dentry); */
++ hidden_sto_dir_dentry = dget(hidden_sto_dentry->d_parent);
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_lock(&hidden_sto_dir_dentry->d_inode->i_mutex);
++#else
++ down(&hidden_sto_dir_dentry->d_inode->i_sem);
++#endif
++ /* lets be safe */
++ if(dtohd2(dir) != hidden_sto_dir_dentry) {
++ printk(KERN_CRIT "mini_fo: build_sto_structure: invalid parameter or meta data corruption [2].\n");
++ return 1;
++ }
++
++ /* check for errors in lock_parent */
++ err = PTR_ERR(hidden_sto_dir_dentry);
++ if(IS_ERR(hidden_sto_dir_dentry)) {
++ printk(KERN_CRIT "mini_fo: build_sto_structure: lock_parent failed.\n");
++ return err;
++ }
++
++ err = vfs_mkdir(hidden_sto_dir_dentry->d_inode,
++ hidden_sto_dentry,
++ dir->d_inode->i_mode);
++
++ if(err) {
++ printk(KERN_CRIT "mini_fo: build_sto_structure: failed to create storage dir [1].\n");
++ /* was: unlock_dir(dir); */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_unlock(&dir->d_inode->i_mutex);
++#else
++ up(&dir->d_inode->i_sem);
++#endif
++ dput(dir);
++ return err;
++ }
++
++ /* everything ok! */
++ if(!dtohd2(dentry)->d_inode) {
++ printk(KERN_CRIT "mini_fo: build_sto_structure: failed to create storage dir [2].\n");
++ /* was: unlock_dir(dir); */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_unlock(&dir->d_inode->i_mutex);
++#else
++ up(&dir->d_inode->i_sem);
++#endif
++ dput(dir);
++ return 1;
++ }
++
++ /* interpose the new inode and set new state */
++ itohi2(dentry->d_inode) = igrab(dtohd2(dentry)->d_inode);
++ dtopd(dentry)->state = MODIFIED;
++
++ /* initalize the wol list */
++ itopd(dentry->d_inode)->deleted_list_size = -1;
++ itopd(dentry->d_inode)->renamed_list_size = -1;
++ meta_build_lists(dentry);
++
++ fist_copy_attr_all(dentry->d_inode, itohi2(dentry->d_inode));
++ fist_copy_attr_timesizes(dir->d_inode,
++ hidden_sto_dir_dentry->d_inode);
++ dir->d_inode->i_nlink++;
++ /* was: unlock_dir(hidden_sto_dir_dentry); */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
++#else
++ up(&hidden_sto_dir_dentry->d_inode->i_sem);
++#endif
++ dput(hidden_sto_dir_dentry);
++ return 0;
++}
++
++
++#if 0 /* unused */
++
++/*
++ * Read "len" bytes from "filename" into "buf".
++ * "buf" is in kernel space.
++ */
++int
++mini_fo_read_file(const char *filename, void *buf, int len)
++{
++ file_t *filp;
++ mm_segment_t oldfs;
++ int bytes;
++ /* Chroot? Maybe NULL isn't right here */
++ filp = filp_open(filename, O_RDONLY, 0);
++ if (!filp || IS_ERR(filp)) {
++ printk("mini_fo_read_file err %d\n", (int) PTR_ERR(filp));
++ return -1; /* or do something else */
++ }
++
++ if (!filp->f_op->read)
++ return -2; /* file(system) doesn't allow reads */
++
++ /* now read len bytes from offset 0 */
++ filp->f_pos = 0; /* start offset */
++ oldfs = get_fs();
++ set_fs(KERNEL_DS);
++ bytes = filp->f_op->read(filp, buf, len, &filp->f_pos);
++ set_fs(oldfs);
++
++ /* close the file */
++ fput(filp);
++
++ return bytes;
++}
++
++
++
++/*
++ * Write "len" bytes from "buf" to "filename"
++ * "buf" is in kernel space.
++ */
++int
++mini_fo_write_file(const char *filename, void *buf, int len)
++{
++ file_t *filp;
++ mm_segment_t oldfs;
++ int bytes;
++ /* Chroot? Maybe NULL isn't right here */
++ filp = filp_open(filename, O_RDWR|O_CREAT, 0640);
++ if (!filp || IS_ERR(filp)) {
++ printk("mini_fo_write_file err %d\n", (int) PTR_ERR(filp));
++ return -1; /* or do something else */
++ }
++
++ if (!filp->f_op->write)
++ return -2; /* file(system) doesn't allow writes */
++
++ /* now write len bytes from offset 0 */
++ filp->f_pos = 0; /* start offset */
++ oldfs = get_fs();
++ set_fs(KERNEL_DS);
++ bytes = filp->f_op->write(filp, buf, len, &filp->f_pos);
++ set_fs(oldfs);
++
++ /* close the file */
++ fput(filp);
++
++ return bytes;
++}
++
++#endif /* unused */
++
+diff -urN linux-2.6.19.old/fs/mini_fo/ChangeLog linux-2.6.19.dev/fs/mini_fo/ChangeLog
+--- linux-2.6.19.old/fs/mini_fo/ChangeLog 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/fs/mini_fo/ChangeLog 2006-12-14 03:14:03.000000000 +0100
+@@ -0,0 +1,281 @@
++2006-01-24 Markus Klotzbuecher <mk@mary.denx.de>
++
++ * Add tons of ugly ifdefs to Ed L. Cashin's mutex patch to
++ retain backwards compatibility.
++
++2006-01-24 Ed L. Cashin <ecashin@coraid.com>
++
++ * Support for the new mutex infrastructure
++ (7892f2f48d165a34b0b8130c8a195dfd807b8cb6)
++
++2005-10-15 Markus Klotzbuecher <mk@localhost.localdomain>
++
++ * Bugfix for a serious memory leak in mini_fo_follow_link.
++
++2005-09-21 Markus Klotzbuecher <mk@mary>
++
++ * new release 0.6.1
++
++ * fix of a compiler warning due to changes in 2.6.13
++
++2005-09-21 Klaus Wenninger <klaus.wenninger@siemens.com>
++
++ * file.c: readdir: fix for a bug that caused directory entries
++ to show up twice when using storage filesystems such as
++ minixfs or pramfs.
++
++2005-06-30 Eric Lammerts <eric@lammerts.org>
++
++ * fix for an oops when overwriting a binary thats beeing
++ executed.
++
++2005-06-09 <mk@mary>
++
++ * Renamed overlay to mini_fo-overlay.
++
++ * Added mini_fo-merge script to allow merging of storage and base
++ after making modifications.
++
++2005-05-22 root <mk@mary>
++
++ * Added overlay script that allows to easily mount mini_fo ontop
++ of a given base directory
++
++2005-05-10 <mk@mary>
++
++ * inode.c: xattr functions return -EOPNOSUPP instead of
++ -ENOSUPP, what confuses "ls -l"
++
++ * Changed license from LGPL to GPL.
++
++2005-05-08 root <mk@mary>
++
++ * Makefile: clean it up and added make install and make
++ uninstall.
++
++2005-05-06 <mk@mary>
++
++ * merged devel branch back to main. [v0-6-0-pre3]
++
++ * removed unused files print.c and fist_ioctl. [devel-0-0-18]
++
++ * ioctl: removed fist_ioctl stuff, that is not needed for
++ now.
++
++2005-05-03 <mk@mary>
++
++ * file.c: simplified mini_fo_open and mini_fo_setattr using
++ new state changing functions. [devel-0-0-17]
++
++ * inode.c: Fixed getattr state bug (see below) in 2.4 function
++ mini_fo_inode revalidate.
++
++ * inode.c: found an other bug in mini_fo_getattr. States are not
++ reliable in this function, as a file can be opened, unlinked and
++ the getattr function called. This results in a deleted dentry
++ with an inode. Fix is to ignore states and simply use the inode
++ available.
++
++2005-04-29 <mk@mary>
++
++ * file.c: Bugfix and cleanup in fasync and fsync. [devel-0-0-16]
++
++ * file.c: do not use mini_fo_lock so the generic version is
++ used (I guess).
++
++ * inode.c: getattr, never call getattr on lower files, as this
++ will cause the inum to change.
++
++ * inode.c: rename_reg_file renamed to rename_nondir, as it
++ doesn't matter as long it't not a dir. Removed all
++ rename_dev_file etc.
++
++ * tagged as devel-0-0-15
++
++ * inode.c: added support for chosing support for extended
++ attrs at compile time by XATTR define in mini_fo.h .
++
++ * inode.c: fixed mini_fo_getattr to use mini_fo inode and not
++ lower again, what avoids inode number changes that confused
++ rm again. This is the proper solution.
++
++2005-04-24 <mk@mary>
++
++ * all files: updated Copyright notive to 2005. [devel-0-0-14]
++
++ * inode.c: fixed mini_fo_getattr to not change the inode
++ number, even if lower files change.
++
++ * super.c: fixed a bug that caused deleted base file to show
++ up suddenly after some time, or after creating a special
++ file. The problem was that after some time or after special
++ file creating sync_sb_inodes is called by the vfs, that
++ called our mini_fo_put_inode. There was (wrongly) called
++ __meta_put_lists, that nuked the lists, although the inode
++ was going to continue its life. Moving __meta_put_lists to
++ mini_fo_clear_inode, where an inode is really destroyed,
++ solved the problem.
++
++
++2005-04-23 <mk@mary>
++
++ * state.c, aux.c: more cleaning up and
++ simplifications. [devel-0-0-13]
++
++ * inode.c: implemented mini_fo_getattr, that was required for
++ 2.6 because inode_revalidate has been remove there, and the
++ old "du" bug returned.
++
++
++2005-04-20 <mk@mary>
++
++ * aux.c: get_neg_sto_dentry(): allow to be called for dentries
++ in state UNMODIFIED, NON_EXISTANT _and_ DELETED.
++
++2005-04-19 <mk@mary>
++
++ * Fixed a bug under 2.6 that caused files deleted via mini_fo
++ not to be deleted properly and therefore the fs filled up
++ untill no memory was left. [devel-0-0-12]
++
++ * Added basic hard link support. This means that creating
++ hardlinks will work, but existing ones will be treated as
++ individual files. [devel-0-0-11]
++
++2005-04-17 <mk@mary>
++
++ * Bugfixes
++
++2005-04-13 root <mk@mary>
++
++ * Added file state.c for the state transition
++ functions. Doesn't work very well yet, though...
++
++2005-04-12 <mk@mary>
++
++ * Porting to 2.6 started, which is easier than expected, also
++ due to Olivier previous work.
++
++2005-04-08 <mk@mary>
++
++ * Fixed the bug that caused du to return invalid sizes of
++ directory trees. The problem was that
++ mini_fo_inode_revalidate didn't always copy the attributes
++ from the base inode properly.
++
++2005-04-01 Markus Klotzbuecher <mk@chasey>
++
++ * Merged devel branch back to main trunk and updated the
++ RELEASE notes. This will be 0-6-0-pre1.
++
++2005-03-31 Markus Klotzbuecher <mk@chasey>
++
++ * Fixed some bugs in rename_reg_file, that only showed up in
++ the kernel compile test. Kernel compiles cleanly ontop of
++ mini_fo, now also make mrproper etc. work. Seems pretty stable.
++
++2005-03-28 Markus Klotzbuecher <mk@chasey>
++
++ * Many, many directory renaming bugfixes and a lot of other
++ cleanup. Dir renaming seems to work relatively stable.
++
++2005-03-22 Markus Klotzbuecher <mk@chasey>
++
++ * Finished implementing lightweight directory renaming. Some
++ basic testing indicates it works fine.
++ Next is to implement testcases for the testsuite and confirm
++ everything is really working ok.
++
++2005-03-18 Markus Klotzbuecher <mk@chasey>
++
++ * Finished implementing meta.c stuff required for directory
++ renaming.
++
++2005-03-17 Markus Klotzbuecher <mk@chasey>
++
++ * Fixed all compile warnings + an extremly old bug that
++ somehow crept in while reworking the wol stuff to the META
++ system. Turning on -Werror again... :-)
++
++ * Fixed some bugs in the new rename_reg_file function.
++
++ * Rewrote mini_fo rename and split it into several
++ subfunctions, that handle the different types
++ seperately. Rewrote the regular file function aswell, as it
++ was implemented somewhat inefficient.
++
++2005-03-16 Markus Klotzbuecher <mk@chasey>
++
++ * Implemented new META subsystem, removed old WOL stuff in favor
++ if it.
++
++ * After some basic testing everything seems ok...
++
++2005-03-11 Markus Klotzbuecher <mk@chasey>
++
++ * Renaming a non regular file caused trouble because I always
++ tried to copy the contents. Now I only do this for regular
++ files. mini_fo_rename still isn't implemented properly, renaming
++ of device files, symlinks etc. results in a empty regular file
++ instead of the proper type.
++
++ * Directory renaming suddenly works! What a surprise! I guess
++ this is because renaming is implemented as making a copy and
++ removing the original. Still this might not work
++ everywhere...
++
++2005-03-09 Markus Klotzbuecher <mk@chasey>
++
++ * Bugfix, when a mini_fo directory that exists in storage
++ (state: MODIFIED, CREATED and DEL_REWRITTEN) is deleted, a
++ possibly existing WOL file contained in it needs to be
++ deleted too.
++
++ * Starting cleanup: defined state names in order to get rid of
++ the state numbers.
++
++2005-03-08 Markus Klotzbuecher <mk@chasey>
++
++ * Makefile fix, fist_ioctl was built against wrong sources if ARCH=um
++
++ * Fixed a bug in dentry.c, mini_fo_d_hash. In state 4 =
++ DEL_REWRITTEN the hash was calculated from the base dentry,
++ which was wrong and and caused assertions in
++ __mini_fo_hidden_dentry to fail.
++
++2005-02-21 <mk@mary>
++
++ * Implemented directory deleting (inode.c)
++
++ * main.c: made mini_fo_parse_options a little more robust.
++
++2004-12-22 <mk@mary>
++
++ * Makefile cleanup and uml stuff, removed unneccessary files
++
++ * Created a new and hopefully more informative README
++
++ * CHANGELOG: created a new CHANGELOG and added old entries reversely
++
++
++2004-10-24 Gleb Natapov <gleb@nbase.co.il>
++
++ * Fix: owner and group where not correctly copied from base to
++ storage.
++
++
++2004-10-05 Gleb Natapov <gleb@nbase.co.il>
++
++ * Implementation of fsync, fasync and lock mini_fo functions.
++
++
++2004-09-29 Bob Lee <bob@pantasys.com>
++
++ * Fix of a serious pointer bug
++
++
++2004-09-28 Gleb Natapov <gleb@nbase.co.il>
++
++ * Implementation of mini_fo_mknod and mini_fo_rename, support
++ for device files.
++
+diff -urN linux-2.6.19.old/fs/mini_fo/dentry.c linux-2.6.19.dev/fs/mini_fo/dentry.c
+--- linux-2.6.19.old/fs/mini_fo/dentry.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/fs/mini_fo/dentry.c 2006-12-14 03:14:03.000000000 +0100
+@@ -0,0 +1,244 @@
++/*
++ * Copyright (c) 1997-2003 Erez Zadok
++ * Copyright (c) 2001-2003 Stony Brook University
++ *
++ * For specific licensing information, see the COPYING file distributed with
++ * this package, or get one from ftp://ftp.filesystems.org/pub/fist/COPYING.
++ *
++ * This Copyright notice must be kept intact and distributed with all
++ * fistgen sources INCLUDING sources generated by fistgen.
++ */
++/*
++ * Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++
++/*
++ * $Id$
++ */
++
++#ifdef HAVE_CONFIG_H
++# include <config.h>
++#endif
++
++#include "fist.h"
++#include "mini_fo.h"
++
++/*
++ * THIS IS A BOOLEAN FUNCTION: returns 1 if valid, 0 otherwise.
++ */
++STATIC int
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++mini_fo_d_revalidate(dentry_t *dentry, struct nameidata *nd)
++#else
++mini_fo_d_revalidate(dentry_t *dentry, int flags)
++#endif
++{
++ int err1 = 1; /* valid = 1, invalid = 0 */
++ int err2 = 1;
++ dentry_t *hidden_dentry;
++ dentry_t *hidden_sto_dentry;
++
++
++ check_mini_fo_dentry(dentry);
++
++ hidden_dentry = dtohd(dentry);
++ hidden_sto_dentry = dtohd2(dentry);
++
++ if(hidden_dentry &&
++ hidden_dentry->d_op &&
++ hidden_dentry->d_op->d_revalidate) {
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ err1 = hidden_dentry->d_op->d_revalidate(hidden_dentry, nd);
++#else
++ err1 = hidden_dentry->d_op->d_revalidate(hidden_dentry, flags);
++#endif
++ }
++ if(hidden_sto_dentry &&
++ hidden_sto_dentry->d_op &&
++ hidden_sto_dentry->d_op->d_revalidate) {
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ err2 = hidden_sto_dentry->d_op->d_revalidate(hidden_sto_dentry,
++ nd);
++#else
++ err2 = hidden_sto_dentry->d_op->d_revalidate(hidden_sto_dentry,
++ flags);
++#endif
++ }
++
++ /* mk: if one of the lower level dentries are valid,
++ * the mini_fo dentry is too.
++ */
++ return (err1 || err2);
++}
++
++
++STATIC int
++mini_fo_d_hash(dentry_t *dentry, qstr_t *name)
++{
++ int err = 0;
++ dentry_t *hidden_dentry;
++ dentry_t *hidden_sto_dentry;
++
++ /* hidden_dentry = mini_fo_hidden_dentry(dentry);
++ * hidden_sto_dentry = mini_fo_hidden_sto_dentry(dentry); */
++
++ /* state 1, 3, 4, 5: build the hash for the storage dentry */
++ if((dtopd(dentry)->state == MODIFIED) ||
++ (dtopd(dentry)->state == CREATED) ||
++ (dtopd(dentry)->state == DEL_REWRITTEN) ||
++ (dtopd(dentry)->state == DELETED)) {
++ hidden_sto_dentry = dtohd2(dentry);
++ if(hidden_sto_dentry &&
++ hidden_sto_dentry->d_op &&
++ hidden_sto_dentry->d_op->d_hash) {
++ err = hidden_sto_dentry->d_op->d_hash(hidden_sto_dentry, name);
++ }
++ goto out;
++ }
++ /* state 2: build the hash for the base dentry */
++ if(dtopd(dentry)->state == UNMODIFIED) {
++ hidden_dentry = dtohd(dentry);
++ if(hidden_dentry &&
++ hidden_dentry->d_op &&
++ hidden_dentry->d_op->d_hash) {
++ err = hidden_dentry->d_op->d_hash(hidden_dentry, name);
++ }
++ goto out;
++ }
++ /* state 6: build hash for the dentry that exists */
++ if(dtopd(dentry)->state == NON_EXISTANT) {
++ hidden_sto_dentry = dtohd2(dentry);
++ if(hidden_sto_dentry &&
++ hidden_sto_dentry->d_op &&
++ hidden_sto_dentry->d_op->d_hash) {
++ err = hidden_sto_dentry->d_op->d_hash(hidden_sto_dentry, name);
++ goto out;
++ }
++ hidden_dentry = dtohd(dentry);
++ if(hidden_dentry &&
++ hidden_dentry->d_op &&
++ hidden_dentry->d_op->d_hash) {
++ err = hidden_dentry->d_op->d_hash(hidden_dentry, name);
++ goto out;
++ }
++ }
++
++ printk(KERN_CRIT "mini_fo: d_hash: invalid state detected.\n");
++
++ out:
++ return err;
++}
++
++
++STATIC int
++mini_fo_d_compare(dentry_t *dentry, qstr_t *a, qstr_t *b)
++{
++ int err;
++ dentry_t *hidden_dentry=NULL;
++
++ /* hidden_dentry = mini_fo_hidden_dentry(dentry); */
++ if(dtohd2(dentry))
++ hidden_dentry = dtohd2(dentry);
++ else if(dtohd(dentry))
++ hidden_dentry = dtohd(dentry);
++
++ if (hidden_dentry && hidden_dentry->d_op && hidden_dentry->d_op->d_compare) {
++ err = hidden_dentry->d_op->d_compare(hidden_dentry, a, b);
++ } else {
++ err = ((a->len != b->len) || memcmp(a->name, b->name, b->len));
++ }
++
++ return err;
++}
++
++
++int
++mini_fo_d_delete(dentry_t *dentry)
++{
++ dentry_t *hidden_dentry;
++ dentry_t *hidden_sto_dentry;
++ int err = 0;
++
++ /* this could be a negative dentry, so check first */
++ if (!dtopd(dentry)) {
++ printk(KERN_CRIT "mini_fo_d_delete: negative dentry passed.\n");
++ goto out;
++ }
++ hidden_dentry = dtohd(dentry);
++ hidden_sto_dentry = dtohd2(dentry);
++
++ if(hidden_dentry) {
++ if(hidden_dentry->d_op &&
++ hidden_dentry->d_op->d_delete) {
++ err = hidden_dentry->d_op->d_delete(hidden_dentry);
++ }
++ }
++ if(hidden_sto_dentry) {
++ if(hidden_sto_dentry->d_op &&
++ hidden_sto_dentry->d_op->d_delete) {
++ err = hidden_sto_dentry->d_op->d_delete(hidden_sto_dentry);
++ }
++ }
++
++ out:
++ return err;
++}
++
++
++void
++mini_fo_d_release(dentry_t *dentry)
++{
++ dentry_t *hidden_dentry;
++ dentry_t *hidden_sto_dentry;
++
++
++ /* this could be a negative dentry, so check first */
++ if (!dtopd(dentry)) {
++ printk(KERN_CRIT "mini_fo_d_release: no private data.\n");
++ goto out;
++ }
++ hidden_dentry = dtohd(dentry);
++ hidden_sto_dentry = dtohd2(dentry);
++
++ if(hidden_dentry) {
++ /* decrement hidden dentry's counter and free its inode */
++ dput(hidden_dentry);
++ }
++ if(hidden_sto_dentry) {
++ /* decrement hidden dentry's counter and free its inode */
++ dput(hidden_sto_dentry);
++ }
++
++ /* free private data (mini_fo_dentry_info) here */
++ kfree(dtopd(dentry));
++ __dtopd(dentry) = NULL; /* just to be safe */
++ out:
++ return;
++}
++
++
++/*
++ * we don't really need mini_fo_d_iput, because dentry_iput will call iput() if
++ * mini_fo_d_iput is not defined. We left this implemented for ease of
++ * tracing/debugging.
++ */
++void
++mini_fo_d_iput(dentry_t *dentry, inode_t *inode)
++{
++ iput(inode);
++}
++
++
++struct dentry_operations mini_fo_dops = {
++ d_revalidate: mini_fo_d_revalidate,
++ d_hash: mini_fo_d_hash,
++ d_compare: mini_fo_d_compare,
++ d_release: mini_fo_d_release,
++ d_delete: mini_fo_d_delete,
++ d_iput: mini_fo_d_iput,
++};
+diff -urN linux-2.6.19.old/fs/mini_fo/file.c linux-2.6.19.dev/fs/mini_fo/file.c
+--- linux-2.6.19.old/fs/mini_fo/file.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/fs/mini_fo/file.c 2006-12-14 03:14:03.000000000 +0100
+@@ -0,0 +1,713 @@
++/*
++ * Copyright (c) 1997-2003 Erez Zadok
++ * Copyright (c) 2001-2003 Stony Brook University
++ *
++ * For specific licensing information, see the COPYING file distributed with
++ * this package, or get one from ftp://ftp.filesystems.org/pub/fist/COPYING.
++ *
++ * This Copyright notice must be kept intact and distributed with all
++ * fistgen sources INCLUDING sources generated by fistgen.
++ */
++/*
++ * Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++
++/*
++ * $Id$
++ */
++
++#ifdef HAVE_CONFIG_H
++# include <config.h>
++#endif
++
++#include "fist.h"
++#include "mini_fo.h"
++#define ROUND_UP(x) (((x)+sizeof(long)-1) & ~(sizeof(long)-1))
++
++/*******************
++ * File Operations *
++ *******************/
++
++STATIC loff_t
++mini_fo_llseek(file_t *file, loff_t offset, int origin)
++{
++ loff_t err;
++ file_t *hidden_file = NULL;
++
++ if(S_ISDIR(file->f_dentry->d_inode->i_mode)) {
++ /* Check if trying to llseek from a directory */
++ err = -EISDIR;
++ goto out;
++ }
++ if (ftopd(file) != NULL) {
++ if(ftohf2(file)) {
++ hidden_file = ftohf2(file);
++ } else {
++ hidden_file = ftohf(file);
++ }
++ }
++
++ /* always set hidden position to this one */
++ hidden_file->f_pos = file->f_pos;
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ memcpy(&(hidden_file->f_ra),
++ &(file->f_ra),
++ sizeof(struct file_ra_state));
++#else
++ if (file->f_reada) { /* update readahead information if needed */
++ hidden_file->f_reada = file->f_reada;
++ hidden_file->f_ramax = file->f_ramax;
++ hidden_file->f_raend = file->f_raend;
++ hidden_file->f_ralen = file->f_ralen;
++ hidden_file->f_rawin = file->f_rawin;
++ }
++#endif
++ if (hidden_file->f_op && hidden_file->f_op->llseek)
++ err = hidden_file->f_op->llseek(hidden_file, offset, origin);
++ else
++ err = generic_file_llseek(hidden_file, offset, origin);
++
++ if (err < 0)
++ goto out;
++
++ if (err != file->f_pos) {
++ file->f_pos = err;
++ // ION maybe this?
++ // file->f_pos = hidden_file->f_pos;
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
++ file->f_reada = 0;
++#endif
++ file->f_version++;
++ }
++
++ out:
++ return err;
++}
++
++
++/* mk: fanout capable */
++STATIC ssize_t
++mini_fo_read(file_t *file, char *buf, size_t count, loff_t *ppos)
++{
++ int err = -EINVAL;
++ file_t *hidden_file = NULL;
++ loff_t pos = *ppos;
++
++ if(S_ISDIR(file->f_dentry->d_inode->i_mode)) {
++ /* Check if trying to read from a directory */
++ /* printk(KERN_CRIT "mini_fo_read: ERROR: trying to read data from a directory.\n"); */
++ err = -EISDIR;
++ goto out;
++ }
++
++ if (ftopd(file) != NULL) {
++ if(ftohf2(file)) {
++ hidden_file = ftohf2(file);
++ } else {
++ hidden_file = ftohf(file);
++ }
++ }
++
++ if (!hidden_file->f_op || !hidden_file->f_op->read)
++ goto out;
++
++ err = hidden_file->f_op->read(hidden_file, buf, count, &pos);
++ *ppos = pos;
++
++ if (err >= 0) {
++ /* atime should also be updated for reads of size zero or more */
++ fist_copy_attr_atime(file->f_dentry->d_inode,
++ hidden_file->f_dentry->d_inode);
++ }
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
++ /*
++ * MAJOR HACK
++ * because pread() does not have any way to tell us that it is
++ * our caller, then we don't know for sure if we have to update
++ * the file positions. This hack relies on read() having passed us
++ * the "real" pointer of its struct file's f_pos field.
++ */
++ if (ppos == &file->f_pos)
++ hidden_file->f_pos = *ppos = pos;
++ if (hidden_file->f_reada) { /* update readahead information if needed */
++ file->f_reada = hidden_file->f_reada;
++ file->f_ramax = hidden_file->f_ramax;
++ file->f_raend = hidden_file->f_raend;
++ file->f_ralen = hidden_file->f_ralen;
++ file->f_rawin = hidden_file->f_rawin;
++ }
++#else
++ memcpy(&(file->f_ra),&(hidden_file->f_ra),sizeof(struct file_ra_state));
++#endif
++
++ out:
++ return err;
++}
++
++
++/* this mini_fo_write() does not modify data pages! */
++STATIC ssize_t
++mini_fo_write(file_t *file, const char *buf, size_t count, loff_t *ppos)
++{
++ int err = -EINVAL;
++ file_t *hidden_file = NULL;
++ inode_t *inode;
++ inode_t *hidden_inode;
++ loff_t pos = *ppos;
++
++ /* mk: fan out: */
++ if (ftopd(file) != NULL) {
++ if(ftohf2(file)) {
++ hidden_file = ftohf2(file);
++ } else {
++ /* This is bad! We have no storage file to write to. This
++ * should never happen because if a file is opened for
++ * writing, a copy should have been made earlier.
++ */
++ printk(KERN_CRIT "mini_fo: write : ERROR, no storage file to write.\n");
++ err = -EINVAL;
++ goto out;
++ }
++ }
++
++ inode = file->f_dentry->d_inode;
++ hidden_inode = itohi2(inode);
++ if(!hidden_inode) {
++ printk(KERN_CRIT "mini_fo: write: no sto inode found, not good.\n");
++ goto out;
++ }
++
++ if (!hidden_file->f_op || !hidden_file->f_op->write)
++ goto out;
++
++ /* adjust for append -- seek to the end of the file */
++ if (file->f_flags & O_APPEND)
++ pos = inode->i_size;
++
++ err = hidden_file->f_op->write(hidden_file, buf, count, &pos);
++
++ /*
++ * copy ctime and mtime from lower layer attributes
++ * atime is unchanged for both layers
++ */
++ if (err >= 0)
++ fist_copy_attr_times(inode, hidden_inode);
++
++ *ppos = pos;
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
++ /*
++ * XXX: MAJOR HACK
++ *
++ * because pwrite() does not have any way to tell us that it is
++ * our caller, then we don't know for sure if we have to update
++ * the file positions. This hack relies on write() having passed us
++ * the "real" pointer of its struct file's f_pos field.
++ */
++ if (ppos == &file->f_pos)
++ hidden_file->f_pos = *ppos = pos;
++#endif
++ /* update this inode's size */
++ if (pos > inode->i_size)
++ inode->i_size = pos;
++
++ out:
++ return err;
++}
++
++/* Global variable to hold a file_t pointer.
++ * This serves to allow mini_fo_filldir function to know which file is
++ * beeing read, which is required for two reasons:
++ *
++ * - be able to call wol functions in order to avoid listing deleted
++ * base files.
++ * - if we're reading a directory which is in state 1, we need to
++ * maintain a list (in mini_fo_filldir) of which files allready
++ * have been copied to userspace,to detect files existing in base
++ * and storage and not list them twice.
++ */
++filldir_t mini_fo_filldir_orig;
++file_t *mini_fo_filldir_file;
++
++/* mainly copied from fs/readdir.c */
++STATIC int
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
++mini_fo_filldir(void * __buf, const char * name, int namlen, loff_t offset,
++ u64 ino, unsigned int d_type)
++#else
++mini_fo_filldir(void * __buf, const char * name, int namlen, loff_t offset,
++ ino_t ino, unsigned int d_type)
++#endif
++{
++ struct getdents_callback * buf = (struct getdents_callback *) __buf;
++ file_t* file = mini_fo_filldir_file;
++
++ /* In theses states we filter meta files in storage (WOL) */
++ if(file && (dtopd(file->f_dentry)->state == MODIFIED ||
++ dtopd(file->f_dentry)->state == CREATED ||
++ dtopd(file->f_dentry)->state == DEL_REWRITTEN)) {
++
++ int tmp = strlen(META_FILENAME);
++ if(tmp == namlen) {
++ if(!strncmp(name, META_FILENAME, namlen))
++ return 0;
++ }
++ }
++
++ /* check if we are merging the contents of storage and base */
++ if(file && dtopd(file->f_dentry)->state == MODIFIED) {
++ /* check if we are still reading storage contents, if
++ * yes, we just save the name of the file for duplicate
++ * checking later. */
++
++ if(!ftopd(file)->rd.sto_done) {
++ /* put file into ndl list */
++ if(ndl_add_entry(&ftopd(file)->rd, name, namlen))
++ printk(KERN_CRIT "mini_fo_filldir: Error adding to ndl.\n");
++ } else {
++ /* check if file has been deleted */
++ if(meta_check_d_entry(file->f_dentry, name, namlen))
++ return 0;
++
++ /* do duplicate checking */
++ if(ndl_check_entry(&ftopd(file)->rd, name, namlen))
++ return 0;
++ }
++ }
++
++ return mini_fo_filldir_orig(buf, name, namlen, offset, ino, d_type);
++}
++
++
++STATIC int
++mini_fo_readdir(file_t *file, void *dirent, filldir_t filldir)
++{
++ int err = 0;/* mk: ??? -ENOTDIR; */
++ file_t *hidden_file = NULL;
++ file_t *hidden_sto_file = NULL;
++ inode_t *inode;
++ struct getdents_callback *buf;
++ int oldcount;
++
++#if defined(FIST_FILTER_NAME) || defined(FIST_FILTER_SCA)
++ struct mini_fo_getdents_callback buf;
++#endif /* FIST_FILTER_NAME || FIST_FILTER_SCA */
++
++ buf = (struct getdents_callback *) dirent;
++ oldcount = buf->count;
++ inode = file->f_dentry->d_inode;
++ mini_fo_filldir_file = file;
++ mini_fo_filldir_orig = filldir;
++
++ ftopd(file)->rd.sto_done = 0;
++ do {
++ if (ftopd(file) != NULL) {
++ if(ftohf2(file)) {
++ hidden_sto_file = ftohf2(file);
++ err = vfs_readdir(hidden_sto_file, mini_fo_filldir, dirent);
++ file->f_pos = hidden_sto_file->f_pos;
++ if (err > 0)
++ fist_copy_attr_atime(inode, hidden_sto_file->f_dentry->d_inode);
++ /* not finshed yet, we'll be called again */
++ if (buf->count != oldcount)
++ break;
++ }
++
++ ftopd(file)->rd.sto_done = 1;
++
++ if(ftohf(file)) {
++ hidden_file = ftohf(file);
++ err = vfs_readdir(hidden_file, mini_fo_filldir, dirent);
++ file->f_pos = hidden_file->f_pos;
++ if (err > 0)
++ fist_copy_attr_atime(inode, hidden_file->f_dentry->d_inode);
++ }
++
++ }
++ } while (0);
++
++ /* mk:
++ * we need to check if all the directory data has been copied to userspace,
++ * or if we will be called again by userspace to complete the operation.
++ */
++ if(buf->count == oldcount) {
++ ndl_put_list(&ftopd(file)->rd);
++ }
++
++ /* unset this, safe */
++ mini_fo_filldir_file = NULL;
++ return err;
++}
++
++
++STATIC unsigned int
++mini_fo_poll(file_t *file, poll_table *wait)
++{
++ unsigned int mask = DEFAULT_POLLMASK;
++ file_t *hidden_file = NULL;
++
++ if (ftopd(file) != NULL) {
++ if(ftohf2(file)) {
++ hidden_file = ftohf2(file);
++ } else {
++ hidden_file = ftohf(file);
++ }
++ }
++
++ if (!hidden_file->f_op || !hidden_file->f_op->poll)
++ goto out;
++
++ mask = hidden_file->f_op->poll(hidden_file, wait);
++
++ out:
++ return mask;
++}
++
++/* FIST-LITE special version of mmap */
++STATIC int
++mini_fo_mmap(file_t *file, vm_area_t *vma)
++{
++ int err = 0;
++ file_t *hidden_file = NULL;
++
++ /* fanout capability */
++ if (ftopd(file) != NULL) {
++ if(ftohf2(file)) {
++ hidden_file = ftohf2(file);
++ } else {
++ hidden_file = ftohf(file);
++ }
++ }
++
++ ASSERT(hidden_file != NULL);
++ ASSERT(hidden_file->f_op != NULL);
++ ASSERT(hidden_file->f_op->mmap != NULL);
++
++ vma->vm_file = hidden_file;
++ err = hidden_file->f_op->mmap(hidden_file, vma);
++ get_file(hidden_file); /* make sure it doesn't get freed on us */
++ fput(file); /* no need to keep extra ref on ours */
++
++ return err;
++}
++
++
++
++STATIC int
++mini_fo_open(inode_t *inode, file_t *file)
++{
++ int err = 0;
++ int hidden_flags;
++ file_t *hidden_file = NULL;
++ dentry_t *hidden_dentry = NULL;
++
++ /* fanout stuff */
++ file_t *hidden_sto_file = NULL;
++ dentry_t *hidden_sto_dentry = NULL;
++
++ __ftopd(file) =
++ kmalloc(sizeof(struct mini_fo_file_info), GFP_KERNEL);
++ if (!ftopd(file)) {
++ err = -ENOMEM;
++ goto out;
++ }
++
++ /* init the readdir_helper structure */
++ INIT_LIST_HEAD(&ftopd(file)->rd.ndl_list);
++ ftopd(file)->rd.ndl_size = 0;
++
++ /* In certain paths this could stay uninitalized and cause trouble */
++ ftohf(file) = NULL;
++ ftohf2(file) = NULL;
++ hidden_flags = file->f_flags;
++
++ /* create storage files? */
++ if(dtost(file->f_dentry) == UNMODIFIED) {
++ if(!IS_WRITE_FLAG(file->f_flags)) {
++ hidden_dentry = dtohd(file->f_dentry);
++ dget(hidden_dentry);
++ /* dentry_open will decrement mnt refcnt if err.
++ * otherwise fput() will do an mntput() for us upon file close. */
++ mntget(stopd(inode->i_sb)->hidden_mnt);
++ hidden_file = dentry_open(hidden_dentry,
++ stopd(inode->i_sb)->hidden_mnt,
++ hidden_flags);
++ if (IS_ERR(hidden_file)) {
++ err = PTR_ERR(hidden_file);
++ dput(hidden_dentry);
++ goto out;
++ }
++ ftohf(file) = hidden_file; /* link two files */
++ goto out;
++ }
++ else {
++ if(S_ISDIR(file->f_dentry->d_inode->i_mode)) {
++ err = dir_unmod_to_mod(file->f_dentry);
++ } else
++ err = nondir_unmod_to_mod(file->f_dentry, 1);
++
++ if (err) {
++ printk("mini_fo_open: ERROR creating storage file.\n");
++ goto out;
++ }
++ }
++ }
++ hidden_sto_dentry = dtohd2(file->f_dentry);
++ dget(hidden_sto_dentry);
++
++ if(dtopd(file->f_dentry)->state == MODIFIED) {
++ /* Directorys are special, interpose on both lower level files */
++ if(S_ISDIR(itohi(inode)->i_mode)) {
++ /* check for invalid file types of lower level files */
++ if(!(S_ISDIR(itohi(inode)->i_mode) && S_ISDIR(itohi2(inode)->i_mode))) {
++ printk(KERN_CRIT "mini_fo_open: meta data corruption detected.\n");
++ dput(hidden_sto_dentry);
++ err = -EINVAL;
++ goto out;
++ }
++
++ /* lower level directorys are ok, open the base file */
++ hidden_dentry = dtohd(file->f_dentry);
++ dget(hidden_dentry);
++
++ mntget(stopd(inode->i_sb)->hidden_mnt);
++ hidden_file = dentry_open(hidden_dentry,
++ stopd(inode->i_sb)->hidden_mnt,
++ hidden_flags);
++ if (IS_ERR(hidden_file)) {
++ err = PTR_ERR(hidden_file);
++ dput(hidden_dentry);
++ dput(hidden_sto_dentry);
++ goto out;
++ }
++ ftohf(file) = hidden_file; /* link the two files */
++ }
++ }
++
++ if(!exists_in_storage(file->f_dentry)) {
++ printk(KERN_CRIT "mini_fo_open: invalid file state detected.\n");
++ err = -EINVAL;
++ dput(hidden_sto_dentry);
++
++ /* If the base file has been opened, we need to close it here */
++ if(ftohf(file)) {
++ if (hidden_file->f_op && hidden_file->f_op->flush)
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
++ hidden_file->f_op->flush(hidden_file, NULL);
++#else
++ hidden_file->f_op->flush(hidden_file);
++#endif
++ dput(hidden_dentry);
++ }
++ goto out;
++ }
++
++ /* ok, now we can safely open the storage file */
++ mntget(stopd(inode->i_sb)->hidden_mnt2);
++ hidden_sto_file = dentry_open(hidden_sto_dentry,
++ stopd(inode->i_sb)->hidden_mnt2,
++ hidden_flags);
++
++ /* dentry_open dputs the dentry if it fails */
++ if (IS_ERR(hidden_sto_file)) {
++ err = PTR_ERR(hidden_sto_file);
++ /* close base file if open */
++ if(ftohf(file)) {
++ if (hidden_file->f_op && hidden_file->f_op->flush)
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
++ hidden_file->f_op->flush(hidden_file, NULL);
++#else
++ hidden_file->f_op->flush(hidden_file);
++#endif
++ dput(hidden_dentry);
++ }
++ goto out;
++ }
++ ftohf2(file) = hidden_sto_file; /* link storage file */
++
++ out:
++ if (err < 0 && ftopd(file)) {
++ kfree(ftopd(file));
++ }
++ return err;
++}
++
++STATIC int
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
++mini_fo_flush(file_t *file, fl_owner_t id)
++#else
++mini_fo_flush(file_t *file)
++#endif
++{
++ int err1 = 0; /* assume ok (see open.c:close_fp) */
++ int err2 = 0;
++ file_t *hidden_file = NULL;
++
++ check_mini_fo_file(file);
++
++ /* mk: we don't do any state checking here, as its not worth the time.
++ * Just flush the lower level files if they exist.
++ */
++ if(ftopd(file) != NULL) {
++ if(ftohf(file) != NULL) {
++ hidden_file = ftohf(file);
++ if (hidden_file->f_op && hidden_file->f_op->flush)
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
++ err1 = hidden_file->f_op->flush(hidden_file, id);
++#else
++ err1 = hidden_file->f_op->flush(hidden_file);
++#endif
++ }
++ if(ftohf2(file) != NULL) {
++ hidden_file = ftohf2(file);
++ if (hidden_file->f_op && hidden_file->f_op->flush)
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
++ err2 = hidden_file->f_op->flush(hidden_file, id);
++#else
++ err2 = hidden_file->f_op->flush(hidden_file);
++#endif
++ }
++ }
++ return (err1 | err2);
++}
++
++
++STATIC int
++mini_fo_release(inode_t *inode, file_t *file)
++{
++ int err = 0;
++ file_t *hidden_file = NULL;
++
++ if (ftopd(file) != NULL) {
++ if(ftohf(file)) {
++ hidden_file = ftohf(file);
++ fput(hidden_file);
++ }
++ if(ftohf2(file)) {
++ hidden_file = ftohf2(file);
++ fput(hidden_file);
++ }
++ kfree(ftopd(file));
++ }
++ return err;
++}
++
++STATIC int
++mini_fo_fsync(file_t *file, dentry_t *dentry, int datasync)
++{
++ int err1 = 0;
++ int err2 = 0;
++ file_t *hidden_file = NULL;
++ dentry_t *hidden_dentry;
++
++ check_mini_fo_file(file);
++
++ if ((hidden_file = ftohf(file)) != NULL) {
++ hidden_dentry = dtohd(dentry);
++ if (hidden_file->f_op && hidden_file->f_op->fsync) {
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_lock(&hidden_dentry->d_inode->i_mutex);
++#else
++ down(&hidden_dentry->d_inode->i_sem);
++#endif
++ err1 = hidden_file->f_op->fsync(hidden_file, hidden_dentry, datasync);
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_unlock(&hidden_dentry->d_inode->i_mutex);
++#else
++ up(&hidden_dentry->d_inode->i_sem);
++#endif
++ }
++ }
++
++ if ((hidden_file = ftohf2(file)) != NULL) {
++ hidden_dentry = dtohd2(dentry);
++ if (hidden_file->f_op && hidden_file->f_op->fsync) {
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_lock(&hidden_dentry->d_inode->i_mutex);
++#else
++ down(&hidden_dentry->d_inode->i_sem);
++#endif
++ err2 = hidden_file->f_op->fsync(hidden_file, hidden_dentry, datasync);
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_unlock(&hidden_dentry->d_inode->i_mutex);
++#else
++ up(&hidden_dentry->d_inode->i_sem);
++#endif
++ }
++ }
++ else
++ goto err;
++
++err:
++ return (err1 || err2);
++}
++
++
++STATIC int
++mini_fo_fasync(int fd, file_t *file, int flag)
++{
++ int err1 = 0;
++ int err2 = 0;
++
++ file_t *hidden_file = NULL;
++
++ check_mini_fo_file(file);
++
++ if((hidden_file = ftohf(file)) != NULL) {
++ err1 = hidden_file->f_op->fasync(fd, hidden_file, flag);
++ }
++ if((hidden_file = ftohf2(file)) != NULL) {
++ err2 = hidden_file->f_op->fasync(fd, hidden_file, flag);
++ }
++
++ return (err1 || err2);
++}
++
++
++
++struct file_operations mini_fo_dir_fops =
++ {
++ read: generic_read_dir,
++ write: mini_fo_write,
++ readdir: mini_fo_readdir,
++ poll: mini_fo_poll,
++ /* ioctl: mini_fo_ioctl, */
++ mmap: mini_fo_mmap,
++ open: mini_fo_open,
++ flush: mini_fo_flush,
++ release: mini_fo_release,
++ fsync: mini_fo_fsync,
++ fasync: mini_fo_fasync,
++ /* not needed lock: mini_fo_lock, */
++ /* not needed: readv */
++ /* not needed: writev */
++ /* not implemented: sendpage */
++ /* not implemented: get_unmapped_area */
++ };
++
++struct file_operations mini_fo_main_fops =
++ {
++ llseek: mini_fo_llseek,
++ read: mini_fo_read,
++ write: mini_fo_write,
++ readdir: mini_fo_readdir,
++ poll: mini_fo_poll,
++ /* ioctl: mini_fo_ioctl, */
++ mmap: mini_fo_mmap,
++ open: mini_fo_open,
++ flush: mini_fo_flush,
++ release: mini_fo_release,
++ fsync: mini_fo_fsync,
++ fasync: mini_fo_fasync,
++ /* not needed: lock: mini_fo_lock, */
++ /* not needed: readv */
++ /* not needed: writev */
++ /* not implemented: sendpage */
++ /* not implemented: get_unmapped_area */
++ };
+diff -urN linux-2.6.19.old/fs/mini_fo/fist.h linux-2.6.19.dev/fs/mini_fo/fist.h
+--- linux-2.6.19.old/fs/mini_fo/fist.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/fs/mini_fo/fist.h 2006-12-14 03:14:03.000000000 +0100
+@@ -0,0 +1,252 @@
++/*
++ * Copyright (c) 1997-2003 Erez Zadok
++ * Copyright (c) 2001-2003 Stony Brook University
++ *
++ * For specific licensing information, see the COPYING file distributed with
++ * this package, or get one from ftp://ftp.filesystems.org/pub/fist/COPYING.
++ *
++ * This Copyright notice must be kept intact and distributed with all
++ * fistgen sources INCLUDING sources generated by fistgen.
++ */
++/*
++ * Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++
++
++/*
++ * $Id$
++ */
++
++#ifndef __FIST_H_
++#define __FIST_H_
++
++/*
++ * KERNEL ONLY CODE:
++ */
++#ifdef __KERNEL__
++#include <linux/version.h>
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19)
++#include <linux/autoconf.h>
++#else
++#include <linux/config.h>
++#endif
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
++#ifdef CONFIG_MODVERSIONS
++# define MODVERSIONS
++# include <linux/modversions.h>
++#endif /* CONFIG_MODVERSIONS */
++#endif /* KERNEL_VERSION < 2.6.0 */
++#include <linux/sched.h>
++#include <linux/kernel.h>
++#include <linux/mm.h>
++#include <linux/string.h>
++#include <linux/stat.h>
++#include <linux/errno.h>
++#include <linux/wait.h>
++#include <linux/limits.h>
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
++#include <linux/locks.h>
++#else
++#include <linux/buffer_head.h>
++#include <linux/pagemap.h>
++#include <linux/namei.h>
++#include <linux/module.h>
++#include <linux/mount.h>
++#include <linux/page-flags.h>
++#include <linux/writeback.h>
++#include <linux/statfs.h>
++#endif
++#include <linux/smp.h>
++#include <linux/smp_lock.h>
++#include <linux/file.h>
++#include <linux/slab.h>
++#include <linux/vmalloc.h>
++#include <linux/poll.h>
++#include <linux/list.h>
++#include <linux/init.h>
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20)
++#include <linux/xattr.h>
++#endif
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++#include <linux/security.h>
++#endif
++
++#include <linux/swap.h>
++
++#include <asm/system.h>
++#include <asm/segment.h>
++#include <asm/mman.h>
++#include <linux/seq_file.h>
++
++/*
++ * MACROS:
++ */
++
++/* those mapped to ATTR_* were copied from linux/fs.h */
++#define FA_MODE ATTR_MODE
++#define FA_UID ATTR_UID
++#define FA_GID ATTR_GID
++#define FA_SIZE ATTR_SIZE
++#define FA_ATIME ATTR_ATIME
++#define FA_MTIME ATTR_MTIME
++#define FA_CTIME ATTR_CTIME
++#define FA_ATIME_SET ATTR_ATIME_SET
++#define FA_MTIME_SET ATTR_MTIME_SET
++#define FA_FORCE ATTR_FORCE
++#define FA_ATTR_FLAGS ATTR_ATTR_FLAG
++
++/* must be greater than all other ATTR_* flags! */
++#define FA_NLINK 2048
++#define FA_BLKSIZE 4096
++#define FA_BLOCKS 8192
++#define FA_TIMES (FA_ATIME|FA_MTIME|FA_CTIME)
++#define FA_ALL 0
++
++/* macros to manage changes between kernels */
++#define INODE_DATA(i) (&(i)->i_data)
++
++#define MIN(x,y) ((x < y) ? (x) : (y))
++#define MAX(x,y) ((x > y) ? (x) : (y))
++#define MAXPATHLEN PATH_MAX
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,5)
++# define lookup_one_len(a,b,c) lookup_one(a,b)
++#endif /* LINUX_VERSION_CODE < KERNEL_VERSION(2,4,5) */
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,8)
++# define generic_file_llseek default_llseek
++#endif /* LINUX_VERSION_CODE < KERNEL_VERSION(2,4,8) */
++
++#ifndef SEEK_SET
++# define SEEK_SET 0
++#endif /* not SEEK_SET */
++
++#ifndef SEEK_CUR
++# define SEEK_CUR 1
++#endif /* not SEEK_CUR */
++
++#ifndef SEEK_END
++# define SEEK_END 2
++#endif /* not SEEK_END */
++
++#ifndef DEFAULT_POLLMASK
++# define DEFAULT_POLLMASK (POLLIN | POLLOUT | POLLRDNORM | POLLWRNORM)
++#endif /* not DEFAULT_POLLMASK */
++
++/* XXX: fix this so fistgen generates kfree() code directly */
++#define kfree_s(a,b) kfree(a)
++
++/*
++ * TYPEDEFS:
++ */
++typedef struct dentry dentry_t;
++typedef struct file file_t;
++typedef struct inode inode_t;
++typedef inode_t vnode_t;
++typedef struct page page_t;
++typedef struct qstr qstr_t;
++typedef struct super_block super_block_t;
++typedef super_block_t vfs_t;
++typedef struct vm_area_struct vm_area_t;
++
++
++/*
++ * EXTERNALS:
++ */
++
++#define FPPF(str,page) printk("PPF %s 0x%x/%d: Lck:%d Err:%d Ref:%d Upd:%d Other::%d:%d:%d:%d:\n", \
++ str, \
++ (int) page, \
++ (int) page->index, \
++ (PageLocked(page) ? 1 : 0), \
++ (PageError(page) ? 1 : 0), \
++ (PageReferenced(page) ? 1 : 0), \
++ (Page_Uptodate(page) ? 1 : 0), \
++ (PageDecrAfter(page) ? 1 : 0), \
++ (PageSlab(page) ? 1 : 0), \
++ (PageSwapCache(page) ? 1 : 0), \
++ (PageReserved(page) ? 1 : 0) \
++ )
++#define EZKDBG printk("EZK %s:%d:%s\n",__FILE__,__LINE__,__FUNCTION__)
++#if 0
++# define EZKDBG1 printk("EZK %s:%d\n",__FILE__,__LINE__)
++#else
++# define EZKDBG1
++#endif
++
++extern int fist_get_debug_value(void);
++extern int fist_set_debug_value(int val);
++#if 0 /* mini_fo doesn't need these */
++extern void fist_dprint_internal(int level, char *str,...);
++extern void fist_print_dentry(char *str, const dentry_t *dentry);
++extern void fist_print_inode(char *str, const inode_t *inode);
++extern void fist_print_file(char *str, const file_t *file);
++extern void fist_print_buffer_flags(char *str, struct buffer_head *buffer);
++extern void fist_print_page_flags(char *str, page_t *page);
++extern void fist_print_page_bytes(char *str, page_t *page);
++extern void fist_print_pte_flags(char *str, const page_t *page);
++extern void fist_checkinode(inode_t *inode, char *msg);
++extern void fist_print_sb(char *str, const super_block_t *sb);
++
++/* §$% by mk: special debug functions */
++extern void fist_mk_print_dentry(char *str, const dentry_t *dentry);
++extern void fist_mk_print_inode(char *str, const inode_t *inode);
++
++extern char *add_indent(void);
++extern char *del_indent(void);
++#endif/* mini_fo doesn't need these */
++
++
++#define STATIC
++#define ASSERT(EX) \
++do { \
++ if (!(EX)) { \
++ printk(KERN_CRIT "ASSERTION FAILED: %s at %s:%d (%s)\n", #EX, \
++ __FILE__, __LINE__, __FUNCTION__); \
++ (*((char *)0))=0; \
++ } \
++} while (0)
++/* same ASSERT, but tell me who was the caller of the function */
++#define ASSERT2(EX) \
++do { \
++ if (!(EX)) { \
++ printk(KERN_CRIT "ASSERTION FAILED (caller): %s at %s:%d (%s)\n", #EX, \
++ file, line, func); \
++ (*((char *)0))=0; \
++ } \
++} while (0)
++
++#if 0 /* mini_fo doesn't need these */
++#define dprintk(format, args...) printk(KERN_DEBUG format, ##args)
++#define fist_dprint(level, str, args...) fist_dprint_internal(level, KERN_DEBUG str, ## args)
++#define print_entry_location() fist_dprint(4, "%sIN: %s %s:%d\n", add_indent(), __FUNCTION__, __FILE__, __LINE__)
++#define print_exit_location() fist_dprint(4, "%s OUT: %s %s:%d\n", del_indent(), __FUNCTION__, __FILE__, __LINE__)
++#define print_exit_status(status) fist_dprint(4, "%s OUT: %s %s:%d, STATUS: %d\n", del_indent(), __FUNCTION__, __FILE__, __LINE__, status)
++#define print_exit_pointer(status) \
++do { \
++ if (IS_ERR(status)) \
++ fist_dprint(4, "%s OUT: %s %s:%d, RESULT: %ld\n", del_indent(), __FUNCTION__, __FILE__, __LINE__, PTR_ERR(status)); \
++ else \
++ fist_dprint(4, "%s OUT: %s %s:%d, RESULT: 0x%x\n", del_indent(), __FUNCTION__, __FILE__, __LINE__, PTR_ERR(status)); \
++} while (0)
++#endif/* mini_fo doesn't need these */
++
++#endif /* __KERNEL__ */
++
++
++/*
++ * DEFINITIONS FOR USER AND KERNEL CODE:
++ * (Note: ioctl numbers 1--9 are reserved for fistgen, the rest
++ * are auto-generated automatically based on the user's .fist file.)
++ */
++# define FIST_IOCTL_GET_DEBUG_VALUE _IOR(0x15, 1, int)
++# define FIST_IOCTL_SET_DEBUG_VALUE _IOW(0x15, 2, int)
++
++#endif /* not __FIST_H_ */
+diff -urN linux-2.6.19.old/fs/mini_fo/inode.c linux-2.6.19.dev/fs/mini_fo/inode.c
+--- linux-2.6.19.old/fs/mini_fo/inode.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/fs/mini_fo/inode.c 2006-12-14 03:14:03.000000000 +0100
+@@ -0,0 +1,1573 @@
++/*
++ * Copyright (c) 1997-2003 Erez Zadok
++ * Copyright (c) 2001-2003 Stony Brook University
++ *
++ * For specific licensing information, see the COPYING file distributed with
++ * this package, or get one from ftp://ftp.filesystems.org/pub/fist/COPYING.
++ *
++ * This Copyright notice must be kept intact and distributed with all
++ * fistgen sources INCLUDING sources generated by fistgen.
++ */
++/*
++ * Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++
++/*
++ * $Id$
++ */
++
++#ifdef HAVE_CONFIG_H
++# include <config.h>
++#endif
++
++#include "fist.h"
++#include "mini_fo.h"
++
++STATIC int
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++mini_fo_create(inode_t *dir, dentry_t *dentry, int mode, struct nameidata *nd)
++#else
++mini_fo_create(inode_t *dir, dentry_t *dentry, int mode)
++#endif
++{
++ int err = 0;
++
++ check_mini_fo_dentry(dentry);
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ err = create_sto_reg_file(dentry, mode, nd);
++#else
++ err = create_sto_reg_file(dentry, mode);
++#endif
++ check_mini_fo_dentry(dentry);
++ return err;
++}
++
++
++STATIC dentry_t *
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++mini_fo_lookup(inode_t *dir, dentry_t *dentry, struct nameidata* nd)
++#else
++mini_fo_lookup(inode_t *dir, dentry_t *dentry)
++#endif
++{
++ int err = 0;
++ dentry_t *hidden_dir_dentry;
++ dentry_t *hidden_dentry = NULL;
++
++ dentry_t *hidden_sto_dir_dentry;
++ dentry_t *hidden_sto_dentry = NULL;
++
++ /* whiteout flag */
++ int del_flag = 0;
++ char *bpath = NULL;
++
++ const char *name;
++ unsigned int namelen;
++
++ /* Don't allow lookups of META-files */
++ namelen = strlen(META_FILENAME);
++ if(namelen == dentry->d_name.len) {
++ if(!strncmp(dentry->d_name.name, META_FILENAME, namelen)) {
++ err = -ENOENT;
++ goto out;
++ }
++ }
++
++ hidden_dir_dentry = dtohd(dentry->d_parent);
++ hidden_sto_dir_dentry = dtohd2(dentry->d_parent);
++
++ name = dentry->d_name.name;
++ namelen = dentry->d_name.len;
++
++ /* must initialize dentry operations */
++ dentry->d_op = &mini_fo_dops;
++
++ /* setup the del_flag */
++ del_flag = __meta_check_d_entry(dir, name, namelen);
++ bpath = __meta_check_r_entry(dir, name, namelen);
++
++ /* perform the lookups of base and storage files:
++ *
++ * This caused some serious trouble, as a lookup_one_len passing
++ * a negative dentry oopses. Solution is to only do the lookup
++ * if the dentry is positive, else we set it to NULL
++ * More trouble, who said a *_dir_dentry can't be NULL?
++ */
++ if(bpath) {
++ /* Cross-Interposing (C), yeah! */
++ hidden_dentry = bpath_walk(dir->i_sb, bpath);
++ if(!hidden_dentry || !hidden_dentry->d_inode) {
++ printk(KERN_CRIT "mini_fo_lookup: bpath_walk failed.\n");
++ err= -EINVAL;
++ goto out;
++ }
++
++ /* this can be set up safely without fear of spaghetti
++ * interposing as it is only used for copying times */
++ hidden_dir_dentry = hidden_dentry->d_parent;
++ kfree(bpath);
++ }
++ else if(hidden_dir_dentry && hidden_dir_dentry->d_inode)
++ hidden_dentry =
++ lookup_one_len(name, hidden_dir_dentry, namelen);
++ else
++ hidden_dentry = NULL;
++
++ if(hidden_sto_dir_dentry && hidden_sto_dir_dentry->d_inode)
++ hidden_sto_dentry =
++ lookup_one_len(name, hidden_sto_dir_dentry, namelen);
++ else
++ hidden_sto_dentry = NULL;
++
++ /* catch error in lookup */
++ if (IS_ERR(hidden_dentry) || IS_ERR(hidden_sto_dentry)) {
++ /* mk: we need to call dput on the dentry, whose
++ * lookup_one_len operation failed, in order to avoid
++ * unmount trouble.
++ */
++ if(IS_ERR(hidden_dentry)) {
++ printk(KERN_CRIT "mini_fo_lookup: ERR from base dentry, lookup failed.\n");
++ err = PTR_ERR(hidden_dentry);
++ } else {
++ dput(hidden_dentry);
++ }
++ if(IS_ERR(hidden_sto_dentry)) {
++ printk(KERN_CRIT "mini_fo_lookup: ERR from storage dentry, lookup failed.\n");
++ err = PTR_ERR(hidden_sto_dentry);
++ } else {
++ dput(hidden_sto_dentry);
++ }
++ goto out;
++ }
++
++ /* allocate dentry private data */
++ __dtopd(dentry) = (struct mini_fo_dentry_info *)
++ kmalloc(sizeof(struct mini_fo_dentry_info), GFP_KERNEL);
++
++ if (!dtopd(dentry)) {
++ err = -ENOMEM;
++ goto out_dput;
++ }
++
++ /* check for different states of the mini_fo file to be looked up. */
++
++ /* state 1, file has been modified */
++ if(hidden_dentry && hidden_sto_dentry &&
++ hidden_dentry->d_inode && hidden_sto_dentry->d_inode && !del_flag) {
++
++ /* update parent directory's atime */
++ fist_copy_attr_atime(dir, hidden_sto_dir_dentry->d_inode);
++
++ dtopd(dentry)->state = MODIFIED;
++ dtohd(dentry) = hidden_dentry;
++ dtohd2(dentry) = hidden_sto_dentry;
++
++ err = mini_fo_tri_interpose(hidden_dentry,
++ hidden_sto_dentry,
++ dentry, dir->i_sb, 1);
++ if (err) {
++ printk(KERN_CRIT "mini_fo_lookup: error interposing (state1).\n");
++ goto out_free;
++ }
++ goto out;
++ }
++ /* state 2, file is unmodified */
++ if(hidden_dentry && hidden_dentry->d_inode && !del_flag) {
++
++ fist_copy_attr_atime(dir, hidden_dir_dentry->d_inode);
++
++ dtopd(dentry)->state = UNMODIFIED;
++ dtohd(dentry) = hidden_dentry;
++ dtohd2(dentry) = hidden_sto_dentry; /* could be negative */
++
++ err = mini_fo_tri_interpose(hidden_dentry,
++ hidden_sto_dentry,
++ dentry, dir->i_sb, 1);
++ if (err) {
++ printk(KERN_CRIT "mini_fo_lookup: error interposing (state2).\n");
++ goto out_free;
++ }
++ goto out;
++ }
++ /* state 3, file has been newly created */
++ if(hidden_sto_dentry && hidden_sto_dentry->d_inode && !del_flag) {
++
++ fist_copy_attr_atime(dir, hidden_sto_dir_dentry->d_inode);
++ dtopd(dentry)->state = CREATED;
++ dtohd(dentry) = hidden_dentry; /* could be negative */
++ dtohd2(dentry) = hidden_sto_dentry;
++
++ err = mini_fo_tri_interpose(hidden_dentry,
++ hidden_sto_dentry,
++ dentry, dir->i_sb, 1);
++ if (err) {
++ printk(KERN_CRIT "mini_fo_lookup: error interposing (state3).\n");
++ goto out_free;
++ }
++ goto out;
++ }
++
++ /* state 4, file has deleted and created again. */
++ if(hidden_dentry && hidden_sto_dentry &&
++ hidden_dentry->d_inode &&
++ hidden_sto_dentry->d_inode && del_flag) {
++
++ fist_copy_attr_atime(dir, hidden_sto_dir_dentry->d_inode);
++ dtopd(dentry)->state = DEL_REWRITTEN;
++ dtohd(dentry) = NULL;
++ dtohd2(dentry) = hidden_sto_dentry;
++
++ err = mini_fo_tri_interpose(NULL,
++ hidden_sto_dentry,
++ dentry, dir->i_sb, 1);
++ if (err) {
++ printk(KERN_CRIT "mini_fo_lookup: error interposing (state4).\n");
++ goto out_free;
++ }
++ /* We will never need this dentry again, as the file has been
++ * deleted from base */
++ dput(hidden_dentry);
++ goto out;
++ }
++ /* state 5, file has been deleted in base */
++ if(hidden_dentry && hidden_sto_dentry &&
++ hidden_dentry->d_inode &&
++ !hidden_sto_dentry->d_inode && del_flag) {
++
++ /* check which parents atime we need for updating */
++ if(hidden_sto_dir_dentry->d_inode)
++ fist_copy_attr_atime(dir,
++ hidden_sto_dir_dentry->d_inode);
++ else
++ fist_copy_attr_atime(dir,
++ hidden_dir_dentry->d_inode);
++
++ dtopd(dentry)->state = DELETED;
++ dtohd(dentry) = NULL;
++ dtohd2(dentry) = hidden_sto_dentry;
++
++ /* add negative dentry to dcache to speed up lookups */
++ d_add(dentry, NULL);
++ dput(hidden_dentry);
++ goto out;
++ }
++ /* state 6, file does not exist */
++ if(((hidden_dentry && !hidden_dentry->d_inode) ||
++ (hidden_sto_dentry && !hidden_sto_dentry->d_inode)) && !del_flag)
++ {
++ /* check which parents atime we need for updating */
++ if(hidden_sto_dir_dentry && hidden_sto_dir_dentry->d_inode)
++ fist_copy_attr_atime(dir, hidden_sto_dir_dentry->d_inode);
++ else
++ fist_copy_attr_atime(dir, hidden_dir_dentry->d_inode);
++
++ dtopd(dentry)->state = NON_EXISTANT;
++ dtohd(dentry) = hidden_dentry;
++ dtohd2(dentry) = hidden_sto_dentry;
++ d_add(dentry, NULL);
++ goto out;
++ }
++
++ /* if we get to here, were in an invalid state. bad. */
++ printk(KERN_CRIT "mini_fo_lookup: ERROR, meta data corruption detected.\n");
++
++ /* end state checking */
++ out_free:
++ d_drop(dentry); /* so that our bad dentry will get destroyed */
++ kfree(dtopd(dentry));
++ __dtopd(dentry) = NULL; /* be safe */
++
++ out_dput:
++ if(hidden_dentry)
++ dput(hidden_dentry);
++ if(hidden_sto_dentry)
++ dput(hidden_sto_dentry); /* drops usage count and marks for release */
++
++ out:
++ /* initalize wol if file exists and is directory */
++ if(dentry->d_inode) {
++ if(S_ISDIR(dentry->d_inode->i_mode)) {
++ itopd(dentry->d_inode)->deleted_list_size = -1;
++ itopd(dentry->d_inode)->renamed_list_size = -1;
++ meta_build_lists(dentry);
++ }
++ }
++ return ERR_PTR(err);
++}
++
++
++STATIC int
++mini_fo_link(dentry_t *old_dentry, inode_t *dir, dentry_t *new_dentry)
++{
++ int err;
++ dentry_t *hidden_old_dentry;
++ dentry_t *hidden_new_dentry;
++ dentry_t *hidden_dir_dentry;
++
++
++ check_mini_fo_dentry(old_dentry);
++ check_mini_fo_dentry(new_dentry);
++ check_mini_fo_inode(dir);
++
++ /* no links to directorys and existing targets target allowed */
++ if(S_ISDIR(old_dentry->d_inode->i_mode) ||
++ is_mini_fo_existant(new_dentry)) {
++ err = -EPERM;
++ goto out;
++ }
++
++ /* bring it directly from unmod to del_rew */
++ if(dtost(old_dentry) == UNMODIFIED) {
++ err = nondir_unmod_to_mod(old_dentry, 1);
++ if(err) {
++ err = -EINVAL;
++ goto out;
++ }
++ err = meta_add_d_entry(old_dentry->d_parent,
++ old_dentry->d_name.name,
++ old_dentry->d_name.len);
++ if(err) {
++ err = -EINVAL;
++ goto out;
++ }
++ dput(dtohd(old_dentry));
++ dtohd(old_dentry) = NULL;
++ dtost(old_dentry) = DEL_REWRITTEN;
++ }
++
++ err = get_neg_sto_dentry(new_dentry);
++ if(err) {
++ err = -EINVAL;
++ goto out;
++ }
++
++ hidden_old_dentry = dtohd2(old_dentry);
++ hidden_new_dentry = dtohd2(new_dentry);
++
++ dget(hidden_old_dentry);
++ dget(hidden_new_dentry);
++
++ /* was: hidden_dir_dentry = lock_parent(hidden_new_dentry); */
++ hidden_dir_dentry = dget(hidden_new_dentry->d_parent);
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_lock(&hidden_dir_dentry->d_inode->i_mutex);
++#else
++ down(&hidden_dir_dentry->d_inode->i_sem);
++#endif
++
++ err = vfs_link(hidden_old_dentry,
++ hidden_dir_dentry->d_inode,
++ hidden_new_dentry);
++ if (err || !hidden_new_dentry->d_inode)
++ goto out_lock;
++
++ dtost(new_dentry) = CREATED;
++ err = mini_fo_tri_interpose(NULL, hidden_new_dentry, new_dentry, dir->i_sb, 0);
++ if (err)
++ goto out_lock;
++
++ fist_copy_attr_timesizes(dir, hidden_new_dentry->d_inode);
++ /* propagate number of hard-links */
++ old_dentry->d_inode->i_nlink = itohi2(old_dentry->d_inode)->i_nlink;
++
++ out_lock:
++ /* was: unlock_dir(hidden_dir_dentry); */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_unlock(&hidden_dir_dentry->d_inode->i_mutex);
++#else
++ up(&hidden_dir_dentry->d_inode->i_sem);
++#endif
++ dput(hidden_dir_dentry);
++
++ dput(hidden_new_dentry);
++ dput(hidden_old_dentry);
++ if (!new_dentry->d_inode)
++ d_drop(new_dentry);
++
++ out:
++ return err;
++}
++
++
++STATIC int
++mini_fo_unlink(inode_t *dir, dentry_t *dentry)
++{
++ int err = 0;
++
++ dget(dentry);
++ if(dtopd(dentry)->state == MODIFIED) {
++ err = nondir_mod_to_del(dentry);
++ goto out;
++ }
++ else if(dtopd(dentry)->state == UNMODIFIED) {
++ err = nondir_unmod_to_del(dentry);
++ goto out;
++ }
++ else if(dtopd(dentry)->state == CREATED) {
++ err = nondir_creat_to_del(dentry);
++ goto out;
++ }
++ else if(dtopd(dentry)->state == DEL_REWRITTEN) {
++ err = nondir_del_rew_to_del(dentry);
++ goto out;
++ }
++
++ printk(KERN_CRIT "mini_fo_unlink: ERROR, invalid state detected.\n");
++
++ out:
++ fist_copy_attr_times(dir, itohi2(dentry->d_parent->d_inode));
++
++ if(!err) {
++ /* is this causing my pain? d_delete(dentry); */
++ d_drop(dentry);
++ }
++
++ dput(dentry);
++ return err;
++}
++
++
++STATIC int
++mini_fo_symlink(inode_t *dir, dentry_t *dentry, const char *symname)
++{
++ int err=0;
++ dentry_t *hidden_sto_dentry;
++ dentry_t *hidden_sto_dir_dentry;
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ umode_t mode;
++#endif
++
++ /* Fail if the symlink file exists */
++ if(!(dtost(dentry) == DELETED ||
++ dtost(dentry) == NON_EXISTANT)) {
++ err = -EEXIST;
++ goto out;
++ }
++
++ err = get_neg_sto_dentry(dentry);
++ if(err) {
++ err = -EINVAL;
++ goto out;
++ }
++ hidden_sto_dentry = dtohd2(dentry);
++
++ dget(hidden_sto_dentry);
++ /* was: hidden_sto_dir_dentry = lock_parent(hidden_sto_dentry); */
++ hidden_sto_dir_dentry = dget(hidden_sto_dentry->d_parent);
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_lock(&hidden_sto_dir_dentry->d_inode->i_mutex);
++#else
++ down(&hidden_sto_dir_dentry->d_inode->i_sem);
++#endif
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ mode = S_IALLUGO;
++ err = vfs_symlink(hidden_sto_dir_dentry->d_inode,
++ hidden_sto_dentry, symname, mode);
++#else
++ err = vfs_symlink(hidden_sto_dir_dentry->d_inode,
++ hidden_sto_dentry,
++ symname);
++#endif
++ if (err || !hidden_sto_dentry->d_inode)
++ goto out_lock;
++
++ if(dtost(dentry) == DELETED) {
++ dtost(dentry) = DEL_REWRITTEN;
++ err = mini_fo_tri_interpose(NULL, hidden_sto_dentry, dentry, dir->i_sb, 0);
++ if(err)
++ goto out_lock;
++ } else if(dtost(dentry) == NON_EXISTANT) {
++ dtost(dentry) = CREATED;
++ err = mini_fo_tri_interpose(dtohd(dentry), hidden_sto_dentry, dentry, dir->i_sb, 0);
++ if(err)
++ goto out_lock;
++ }
++ fist_copy_attr_timesizes(dir, hidden_sto_dir_dentry->d_inode);
++
++ out_lock:
++ /* was: unlock_dir(hidden_sto_dir_dentry); */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
++#else
++ up(&hidden_sto_dir_dentry->d_inode->i_sem);
++#endif
++ dput(hidden_sto_dir_dentry);
++
++ dput(hidden_sto_dentry);
++ if (!dentry->d_inode)
++ d_drop(dentry);
++ out:
++ return err;
++}
++
++STATIC int
++mini_fo_mkdir(inode_t *dir, dentry_t *dentry, int mode)
++{
++ int err;
++
++ err = create_sto_dir(dentry, mode);
++
++ check_mini_fo_dentry(dentry);
++
++ return err;
++}
++
++
++STATIC int
++mini_fo_rmdir(inode_t *dir, dentry_t *dentry)
++{
++ int err = 0;
++
++ dentry_t *hidden_sto_dentry;
++ dentry_t *hidden_sto_dir_dentry;
++ dentry_t *meta_dentry;
++ inode_t *hidden_sto_dir = NULL;
++
++ check_mini_fo_dentry(dentry);
++ check_mini_fo_inode(dir);
++
++ dget(dentry);
++ if(dtopd(dentry)->state == MODIFIED) {
++ /* XXX: disabled, because it does not bother to check files on
++ * the original filesystem - just a hack, but better than simply
++ * removing it without testing */
++ err = -EINVAL;
++ goto out;
++
++ hidden_sto_dir = itohi2(dir);
++ hidden_sto_dentry = dtohd2(dentry);
++
++ /* was:hidden_sto_dir_dentry = lock_parent(hidden_sto_dentry); */
++ hidden_sto_dir_dentry = dget(hidden_sto_dentry->d_parent);
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_lock(&hidden_sto_dir_dentry->d_inode->i_mutex);
++#else
++ down(&hidden_sto_dir_dentry->d_inode->i_sem);
++#endif
++
++ /* avoid destroying the hidden inode if the file is in use */
++ dget(hidden_sto_dentry);
++
++ /* Delete an old WOL file contained in the storage dir */
++ meta_dentry = lookup_one_len(META_FILENAME,
++ hidden_sto_dentry,
++ strlen(META_FILENAME));
++ if(meta_dentry->d_inode) {
++ err = vfs_unlink(hidden_sto_dentry->d_inode, meta_dentry);
++ dput(meta_dentry);
++ if(!err)
++ d_delete(meta_dentry);
++ }
++
++ err = vfs_rmdir(hidden_sto_dir, hidden_sto_dentry);
++ dput(hidden_sto_dentry);
++ if(!err)
++ d_delete(hidden_sto_dentry);
++
++ /* propagate number of hard-links */
++ dentry->d_inode->i_nlink = itohi2(dentry->d_inode)->i_nlink;
++
++ dput(dtohd(dentry));
++
++ dtohd(dentry) = NULL;
++ dtopd(dentry)->state = DELETED;
++
++ /* carefull with R files */
++ if( __meta_is_r_entry(dir,
++ dentry->d_name.name,
++ dentry->d_name.len) == 1) {
++ err = meta_remove_r_entry(dentry->d_parent,
++ dentry->d_name.name,
++ dentry->d_name.len);
++ if(err) {
++ printk(KERN_CRIT "mini_fo: rmdir: meta_remove_r_entry failed.\n");
++ goto out;
++ }
++ }
++ else {
++ /* ok, add deleted file to META */
++ meta_add_d_entry(dentry->d_parent,
++ dentry->d_name.name,
++ dentry->d_name.len);
++ }
++ /* was: unlock_dir(hidden_sto_dir_dentry); */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
++#else
++ up(&hidden_sto_dir_dentry->d_inode->i_sem);
++#endif
++ dput(hidden_sto_dir_dentry);
++ goto out;
++ }
++ else if(dtopd(dentry)->state == UNMODIFIED) {
++ /* XXX: simply adding it to the delete list here is fscking dangerous!
++ * as a temporary hack, i will disable rmdir on unmodified directories
++ * for now.
++ */
++ err = -EINVAL;
++ goto out;
++
++ err = get_neg_sto_dentry(dentry);
++ if(err) {
++ err = -EINVAL;
++ goto out;
++ }
++
++ /* dput base dentry, this will relase the inode and free the
++ * dentry, as we will never need it again. */
++ dput(dtohd(dentry));
++ dtohd(dentry) = NULL;
++ dtopd(dentry)->state = DELETED;
++
++ /* add deleted file to META-file */
++ meta_add_d_entry(dentry->d_parent,
++ dentry->d_name.name,
++ dentry->d_name.len);
++ goto out;
++ }
++ else if(dtopd(dentry)->state == CREATED) {
++ hidden_sto_dir = itohi2(dir);
++ hidden_sto_dentry = dtohd2(dentry);
++
++ /* was: hidden_sto_dir_dentry = lock_parent(hidden_sto_dentry);*/
++ hidden_sto_dir_dentry = dget(hidden_sto_dentry->d_parent);
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_lock(&hidden_sto_dir_dentry->d_inode->i_mutex);
++#else
++ down(&hidden_sto_dir_dentry->d_inode->i_sem);
++#endif
++
++ /* avoid destroying the hidden inode if the file is in use */
++ dget(hidden_sto_dentry);
++
++ /* Delete an old WOL file contained in the storage dir */
++ meta_dentry = lookup_one_len(META_FILENAME,
++ hidden_sto_dentry,
++ strlen(META_FILENAME));
++ if(meta_dentry->d_inode) {
++ /* is this necessary? dget(meta_dentry); */
++ err = vfs_unlink(hidden_sto_dentry->d_inode,
++ meta_dentry);
++ dput(meta_dentry);
++ if(!err)
++ d_delete(meta_dentry);
++ }
++
++ err = vfs_rmdir(hidden_sto_dir, hidden_sto_dentry);
++ dput(hidden_sto_dentry);
++ if(!err)
++ d_delete(hidden_sto_dentry);
++
++ /* propagate number of hard-links */
++ dentry->d_inode->i_nlink = itohi2(dentry->d_inode)->i_nlink;
++ dtopd(dentry)->state = NON_EXISTANT;
++
++ /* was: unlock_dir(hidden_sto_dir_dentry); */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
++#else
++ up(&hidden_sto_dir_dentry->d_inode->i_sem);
++#endif
++ dput(hidden_sto_dir_dentry);
++
++ goto out;
++ }
++ else if(dtopd(dentry)->state == DEL_REWRITTEN) {
++ hidden_sto_dir = itohi2(dir);
++ hidden_sto_dentry = dtohd2(dentry);
++
++ /* was: hidden_sto_dir_dentry = lock_parent(hidden_sto_dentry);*/
++ hidden_sto_dir_dentry = dget(hidden_sto_dentry->d_parent);
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_lock(&hidden_sto_dir_dentry->d_inode->i_mutex);
++#else
++ down(&hidden_sto_dir_dentry->d_inode->i_sem);
++#endif
++
++ /* avoid destroying the hidden inode if the file is in use */
++ dget(hidden_sto_dentry);
++
++ /* Delete an old WOL file contained in the storage dir */
++ meta_dentry = lookup_one_len(META_FILENAME,
++ hidden_sto_dentry,
++ strlen(META_FILENAME));
++ if(meta_dentry->d_inode) {
++ /* is this necessary? dget(meta_dentry); */
++ err = vfs_unlink(hidden_sto_dentry->d_inode,
++ meta_dentry);
++ dput(meta_dentry);
++ if(!err)
++ d_delete(meta_dentry);
++ }
++
++ err = vfs_rmdir(hidden_sto_dir, hidden_sto_dentry);
++ dput(hidden_sto_dentry);
++ if(!err)
++ d_delete(hidden_sto_dentry);
++
++ /* propagate number of hard-links */
++ dentry->d_inode->i_nlink = itohi2(dentry->d_inode)->i_nlink;
++ dtopd(dentry)->state = DELETED;
++ /* was: unlock_dir(hidden_sto_dir_dentry); */
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
++#else
++ up(&hidden_sto_dir_dentry->d_inode->i_sem);
++#endif
++ dput(hidden_sto_dir_dentry);
++ goto out;
++ }
++
++ printk(KERN_CRIT "mini_fo_rmdir: ERROR, invalid state detected.\n");
++
++ out:
++ if(!err) {
++ d_drop(dentry);
++ }
++
++ fist_copy_attr_times(dir, itohi2(dentry->d_parent->d_inode));
++ dput(dentry);
++
++ return err;
++}
++
++
++STATIC int
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++mini_fo_mknod(inode_t *dir, dentry_t *dentry, int mode, dev_t dev)
++#else
++mini_fo_mknod(inode_t *dir, dentry_t *dentry, int mode, int dev)
++#endif
++{
++ int err = 0;
++
++ check_mini_fo_dentry(dentry);
++
++ err = create_sto_nod(dentry, mode, dev);
++ if(err) {
++ printk(KERN_CRIT "mini_fo_mknod: creating sto nod failed.\n");
++ err = -EINVAL;
++ }
++
++ check_mini_fo_dentry(dentry);
++ return err;
++}
++
++
++STATIC int
++mini_fo_rename(inode_t *old_dir, dentry_t *old_dentry,
++ inode_t *new_dir, dentry_t *new_dentry)
++{
++ /* dispatch */
++ if(S_ISDIR(old_dentry->d_inode->i_mode))
++ return rename_directory(old_dir, old_dentry, new_dir, new_dentry);
++ return rename_nondir(old_dir, old_dentry, new_dir, new_dentry);
++
++}
++
++int rename_directory(inode_t *old_dir, dentry_t *old_dentry,
++ inode_t *new_dir, dentry_t *new_dentry)
++{
++ int err, bpath_len;
++ char *bpath;
++
++ dentry_t *hidden_old_dentry;
++ dentry_t *hidden_new_dentry;
++ dentry_t *hidden_old_dir_dentry;
++ dentry_t *hidden_new_dir_dentry;
++
++ err = 0;
++ bpath = NULL;
++ bpath_len = 0;
++
++ /* this is a test, chuck out if it works */
++ if(!(dtopd(new_dentry)->state == DELETED ||
++ dtopd(new_dentry)->state == NON_EXISTANT)) {
++ printk(KERN_CRIT "mini_fo: rename_directory: \
++ uh, ah, new_dentry not negative.\n");
++ /* return -1; */
++ }
++
++ /* state = UNMODIFIED */
++ if(dtopd(old_dentry)->state == UNMODIFIED) {
++ err = dir_unmod_to_mod(old_dentry);
++ if (err)
++ goto out;
++ }
++
++ /* state = MODIFIED */
++ if(dtopd(old_dentry)->state == MODIFIED) {
++ bpath = meta_check_r_entry(old_dentry->d_parent,
++ old_dentry->d_name.name,
++ old_dentry->d_name.len);
++ if(bpath) {
++ err = meta_remove_r_entry(old_dentry->d_parent,
++ old_dentry->d_name.name,
++ old_dentry->d_name.len);
++ if(err) {
++ printk(KERN_CRIT "mini_fo: rename_directory:\
++ meta_remove_r_entry \
++ failed.\n");
++ goto out;
++ }
++ err = meta_add_r_entry(new_dentry->d_parent,
++ bpath,
++ strlen(bpath),
++ new_dentry->d_name.name,
++ new_dentry->d_name.len);
++ kfree(bpath);
++ }
++ else {/* wol it */
++ err = meta_add_d_entry(old_dentry->d_parent,
++ old_dentry->d_name.name,
++ old_dentry->d_name.len);
++ if (err)
++ goto out;
++ /* put it on rename list */
++ err = get_mini_fo_bpath(old_dentry,
++ &bpath,
++ &bpath_len);
++ if (err)
++ goto out;
++ err = meta_add_r_entry(new_dentry->d_parent,
++ bpath, bpath_len,
++ new_dentry->d_name.name,
++ new_dentry->d_name.len);
++ if (err)
++ goto out;
++ }
++ /* no state change, MODIFIED stays MODIFIED */
++ }
++ /* state = CREATED */
++ if(dtopd(old_dentry)->state == CREATED ||
++ dtopd(old_dentry)->state == DEL_REWRITTEN) {
++ if(dtohd(old_dentry))
++ dput(dtohd(old_dentry));
++
++ if(dtopd(new_dentry)->state == DELETED) {
++ dtopd(old_dentry)->state = DEL_REWRITTEN;
++ dtohd(old_dentry) = NULL;
++ }
++ else if(dtopd(new_dentry)->state == NON_EXISTANT) {
++ dtopd(old_dentry)->state = CREATED;
++ /* steal new dentry's neg. base dentry */
++ dtohd(old_dentry) = dtohd(new_dentry);
++ dtohd(new_dentry) = NULL;
++ }
++ }
++ if(dtopd(new_dentry)->state == UNMODIFIED ||
++ dtopd(new_dentry)->state == NON_EXISTANT) {
++ err = get_neg_sto_dentry(new_dentry);
++ if(err)
++ goto out;
++ }
++
++ /* now move sto file */
++ hidden_old_dentry = dtohd2(old_dentry);
++ hidden_new_dentry = dtohd2(new_dentry);
++
++ dget(hidden_old_dentry);
++ dget(hidden_new_dentry);
++
++ hidden_old_dir_dentry = dget(hidden_old_dentry->d_parent);
++ hidden_new_dir_dentry = dget(hidden_new_dentry->d_parent);
++ double_lock(hidden_old_dir_dentry, hidden_new_dir_dentry);
++
++ err = vfs_rename(hidden_old_dir_dentry->d_inode, hidden_old_dentry,
++ hidden_new_dir_dentry->d_inode, hidden_new_dentry);
++ if(err)
++ goto out_lock;
++
++ fist_copy_attr_all(new_dir, hidden_new_dir_dentry->d_inode);
++ if (new_dir != old_dir)
++ fist_copy_attr_all(old_dir,
++ hidden_old_dir_dentry->d_inode);
++
++ out_lock:
++ /* double_unlock will dput the new/old parent dentries
++ * whose refcnts were incremented via get_parent above. */
++ double_unlock(hidden_old_dir_dentry, hidden_new_dir_dentry);
++ dput(hidden_new_dentry);
++ dput(hidden_old_dentry);
++
++ out:
++ return err;
++}
++
++int rename_nondir(inode_t *old_dir, dentry_t *old_dentry,
++ inode_t *new_dir, dentry_t *new_dentry)
++{
++ int err=0;
++
++ check_mini_fo_dentry(old_dentry);
++ check_mini_fo_dentry(new_dentry);
++ check_mini_fo_inode(old_dir);
++ check_mini_fo_inode(new_dir);
++
++ /* state: UNMODIFIED */
++ if(dtost(old_dentry) == UNMODIFIED) {
++ err = nondir_unmod_to_mod(old_dentry, 1);
++ if(err) {
++ err = -EINVAL;
++ goto out;
++ }
++ }
++
++ /* the easy states */
++ if(exists_in_storage(old_dentry)) {
++
++ dentry_t *hidden_old_dentry;
++ dentry_t *hidden_new_dentry;
++ dentry_t *hidden_old_dir_dentry;
++ dentry_t *hidden_new_dir_dentry;
++
++ /* if old file is MODIFIED, add it to the deleted_list */
++ if(dtopd(old_dentry)->state == MODIFIED) {
++ meta_add_d_entry(old_dentry->d_parent,
++ old_dentry->d_name.name,
++ old_dentry->d_name.len);
++
++ dput(dtohd(old_dentry));
++ }
++ /* if old file is CREATED, we only release the base dentry */
++ if(dtopd(old_dentry)->state == CREATED) {
++ if(dtohd(old_dentry))
++ dput(dtohd(old_dentry));
++ }
++
++ /* now setup the new states (depends on new_dentry state) */
++ /* new dentry state = MODIFIED */
++ if(dtopd(new_dentry)->state == MODIFIED) {
++ meta_add_d_entry(new_dentry->d_parent,
++ new_dentry->d_name.name,
++ new_dentry->d_name.len);
++
++ /* new dentry will be d_put'ed later by the vfs
++ * so don't do it here
++ * dput(dtohd(new_dentry));
++ */
++ dtohd(old_dentry) = NULL;
++ dtopd(old_dentry)->state = DEL_REWRITTEN;
++ }
++ /* new dentry state = UNMODIFIED */
++ else if(dtopd(new_dentry)->state == UNMODIFIED) {
++ if(get_neg_sto_dentry(new_dentry))
++ return -EINVAL;
++
++ meta_add_d_entry(new_dentry->d_parent,
++ new_dentry->d_name.name,
++ new_dentry->d_name.len);
++
++ /* is this right??? */
++ /*dput(dtohd(new_dentry));*/
++ dtohd(old_dentry) = NULL;
++ dtopd(old_dentry)->state = DEL_REWRITTEN;
++ }
++ /* new dentry state = CREATED */
++ else if(dtopd(new_dentry)->state == CREATED) {
++ /* we keep the neg. base dentry (if exists) */
++ dtohd(old_dentry) = dtohd(new_dentry);
++ /* ...and set it to Null, or we'll get
++ * dcache.c:345 if it gets dput twice... */
++ dtohd(new_dentry) = NULL;
++ dtopd(old_dentry)->state = CREATED;
++ }
++ /* new dentry state = NON_EXISTANT */
++ else if(dtopd(new_dentry)->state == NON_EXISTANT) {
++ if(get_neg_sto_dentry(new_dentry))
++ return -EINVAL;
++
++ /* we keep the neg. base dentry (if exists) */
++ dtohd(old_dentry) = dtohd(new_dentry);
++ /* ...and set it to Null, or we'll get
++ * Dr. dcache.c:345 if it gets dput twice... */
++ dtohd(new_dentry) = NULL;
++ dtopd(old_dentry)->state = CREATED;
++ }
++ /* new dentry state = DEL_REWRITTEN or DELETED */
++ else if(dtopd(new_dentry)->state == DEL_REWRITTEN ||
++ dtopd(new_dentry)->state == DELETED) {
++ dtohd(old_dentry) = NULL;
++ dtopd(old_dentry)->state = DEL_REWRITTEN;
++ }
++ else { /* not possible, uhh, ahh */
++ printk(KERN_CRIT
++ "mini_fo: rename_reg_file: invalid state detected [1].\n");
++ return -1;
++ }
++
++ /* now we definitely have a sto file */
++ hidden_old_dentry = dtohd2(old_dentry);
++ hidden_new_dentry = dtohd2(new_dentry);
++
++ dget(hidden_old_dentry);
++ dget(hidden_new_dentry);
++
++ hidden_old_dir_dentry = dget(hidden_old_dentry->d_parent);
++ hidden_new_dir_dentry = dget(hidden_new_dentry->d_parent);
++ double_lock(hidden_old_dir_dentry, hidden_new_dir_dentry);
++
++ err = vfs_rename(hidden_old_dir_dentry->d_inode,
++ hidden_old_dentry,
++ hidden_new_dir_dentry->d_inode,
++ hidden_new_dentry);
++ if(err)
++ goto out_lock;
++
++ fist_copy_attr_all(new_dir, hidden_new_dir_dentry->d_inode);
++ if (new_dir != old_dir)
++ fist_copy_attr_all(old_dir, hidden_old_dir_dentry->d_inode);
++
++ out_lock:
++ /* double_unlock will dput the new/old parent dentries
++ * whose refcnts were incremented via get_parent above.
++ */
++ double_unlock(hidden_old_dir_dentry, hidden_new_dir_dentry);
++ dput(hidden_new_dentry);
++ dput(hidden_old_dentry);
++ out:
++ return err;
++ }
++ else { /* invalid state */
++ printk(KERN_CRIT "mini_fo: rename_reg_file: ERROR: invalid state detected [2].\n");
++ return -1;
++ }
++}
++
++
++STATIC int
++mini_fo_readlink(dentry_t *dentry, char *buf, int bufsiz)
++{
++ int err=0;
++ dentry_t *hidden_dentry = NULL;
++
++ if(dtohd2(dentry) && dtohd2(dentry)->d_inode) {
++ hidden_dentry = dtohd2(dentry);
++ } else if(dtohd(dentry) && dtohd(dentry)->d_inode) {
++ hidden_dentry = dtohd(dentry);
++ } else {
++ goto out;
++ }
++
++ if (!hidden_dentry->d_inode->i_op ||
++ !hidden_dentry->d_inode->i_op->readlink) {
++ err = -EINVAL; goto out;
++ }
++
++ err = hidden_dentry->d_inode->i_op->readlink(hidden_dentry,
++ buf,
++ bufsiz);
++ if (err > 0)
++ fist_copy_attr_atime(dentry->d_inode, hidden_dentry->d_inode);
++
++ out:
++ return err;
++}
++
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13)
++static int mini_fo_follow_link(dentry_t *dentry, struct nameidata *nd)
++#else
++static void* mini_fo_follow_link(dentry_t *dentry, struct nameidata *nd)
++#endif
++{
++ char *buf;
++ int len = PAGE_SIZE, err;
++ mm_segment_t old_fs;
++
++ /* in 2.6 this is freed by mini_fo_put_link called by __do_follow_link */
++ buf = kmalloc(len, GFP_KERNEL);
++ if (!buf) {
++ err = -ENOMEM;
++ goto out;
++ }
++
++ /* read the symlink, and then we will follow it */
++ old_fs = get_fs();
++ set_fs(KERNEL_DS);
++ err = dentry->d_inode->i_op->readlink(dentry, buf, len);
++ set_fs(old_fs);
++ if (err < 0) {
++ kfree(buf);
++ buf = NULL;
++ goto out;
++ }
++ buf[err] = 0;
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ nd_set_link(nd, buf);
++ err = 0;
++#else
++ err = vfs_follow_link(nd, buf);
++#endif
++
++ out:
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
++ kfree(buf);
++#endif
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13)
++ return err;
++#else
++ return ERR_PTR(err);
++#endif
++}
++
++STATIC
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13)
++void mini_fo_put_link(struct dentry *dentry, struct nameidata *nd)
++#else
++void mini_fo_put_link(struct dentry *dentry, struct nameidata *nd, void *cookie)
++#endif
++{
++ char *link;
++ link = nd_get_link(nd);
++ kfree(link);
++}
++#endif
++
++STATIC int
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++mini_fo_permission(inode_t *inode, int mask, struct nameidata *nd)
++#else
++mini_fo_permission(inode_t *inode, int mask)
++#endif
++{
++ inode_t *hidden_inode;
++ int mode;
++ int err;
++
++ if(itohi2(inode)) {
++ hidden_inode = itohi2(inode);
++ } else {
++ hidden_inode = itohi(inode);
++ }
++ mode = inode->i_mode;
++
++ /* not really needed, as permission handles everything:
++ * err = vfs_permission(inode, mask);
++ * if (err)
++ * goto out;
++ */
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ err = permission(hidden_inode, mask, nd);
++#else
++ err = permission(hidden_inode, mask);
++#endif
++
++ /* out: */
++ return err;
++}
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
++STATIC int
++mini_fo_inode_revalidate(dentry_t *dentry)
++{
++ int err = 0;
++ dentry_t *hidden_dentry;
++ inode_t *hidden_inode;
++
++ ASSERT(dentry->d_inode);
++ ASSERT(itopd(dentry->d_inode));
++
++ if(itohi2(dentry->d_inode)) {
++ hidden_dentry = dtohd2(dentry);
++ hidden_inode = hidden_dentry->d_inode;
++ } else if(itohi(dentry->d_inode)) {
++ hidden_dentry = dtohd(dentry);
++ hidden_inode = hidden_dentry->d_inode;
++ } else {
++ printk(KERN_CRIT "mini_fo_inode_revalidate: ERROR, invalid state detected.\n");
++ err = -ENOENT;
++ goto out;
++ }
++ if (hidden_inode && hidden_inode->i_op && hidden_inode->i_op->revalidate){
++ err = hidden_inode->i_op->revalidate(hidden_dentry);
++ if (err)
++ goto out;
++ }
++ fist_copy_attr_all(dentry->d_inode, hidden_inode);
++ out:
++ return err;
++}
++#endif
++
++STATIC int
++mini_fo_setattr(dentry_t *dentry, struct iattr *ia)
++{
++ int err = 0;
++
++ check_mini_fo_dentry(dentry);
++
++ if(!is_mini_fo_existant(dentry)) {
++ printk(KERN_CRIT "mini_fo_setattr: ERROR, invalid state detected [1].\n");
++ goto out;
++ }
++
++ if(dtost(dentry) == UNMODIFIED) {
++ if(!IS_COPY_FLAG(ia->ia_valid))
++ goto out; /* we ignore these changes to base */
++
++ if(S_ISDIR(dentry->d_inode->i_mode)) {
++ err = dir_unmod_to_mod(dentry);
++ } else {
++ /* we copy contents if file is not beeing truncated */
++ if(S_ISREG(dentry->d_inode->i_mode) &&
++ !(ia->ia_size == 0 && (ia->ia_valid & ATTR_SIZE))) {
++ err = nondir_unmod_to_mod(dentry, 1);
++ } else
++ err = nondir_unmod_to_mod(dentry, 0);
++ }
++ if(err) {
++ err = -EINVAL;
++ printk(KERN_CRIT "mini_fo_setattr: ERROR changing states.\n");
++ goto out;
++ }
++ }
++ if(!exists_in_storage(dentry)) {
++ printk(KERN_CRIT "mini_fo_setattr: ERROR, invalid state detected [2].\n");
++ err = -EINVAL;
++ goto out;
++ }
++ ASSERT(dentry->d_inode);
++ ASSERT(dtohd2(dentry));
++ ASSERT(itopd(dentry->d_inode));
++ ASSERT(itohi2(dentry->d_inode));
++
++ err = notify_change(dtohd2(dentry), ia);
++ fist_copy_attr_all(dentry->d_inode, itohi2(dentry->d_inode));
++ out:
++ return err;
++}
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++STATIC int
++mini_fo_getattr(struct vfsmount *mnt, struct dentry *dentry, struct kstat *stat)
++{
++ int err = 0;
++ dentry_t *hidden_dentry;
++
++ ASSERT(dentry->d_inode);
++ ASSERT(itopd(dentry->d_inode));
++
++ if(itohi2(dentry->d_inode)) {
++ hidden_dentry = dtohd2(dentry);
++ } else if(itohi(dentry->d_inode)) {
++ hidden_dentry = dtohd(dentry);
++ } else {
++ printk(KERN_CRIT "mini_fo_getattr: ERROR, invalid state detected.\n");
++ err = -ENOENT;
++ goto out;
++ }
++ fist_copy_attr_all(dentry->d_inode, hidden_dentry->d_inode);
++
++ ASSERT(hidden_dentry);
++ ASSERT(hidden_dentry->d_inode);
++ ASSERT(hidden_dentry->d_inode->i_op);
++
++ generic_fillattr(dentry->d_inode, stat);
++ if (!stat->blksize) {
++ struct super_block *s = hidden_dentry->d_inode->i_sb;
++ unsigned blocks;
++ blocks = (stat->size+s->s_blocksize-1) >> s->s_blocksize_bits;
++ stat->blocks = (s->s_blocksize / 512) * blocks;
++ stat->blksize = s->s_blocksize;
++ }
++ out:
++ return err;
++}
++#endif
++
++#if defined(XATTR) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20))
++#if 0 /* no xattr_alloc() and xattr_free() */
++/* This is lifted from fs/xattr.c */
++static void *
++xattr_alloc(size_t size, size_t limit)
++{
++ void *ptr;
++
++ if (size > limit)
++ return ERR_PTR(-E2BIG);
++
++ if (!size) /* size request, no buffer is needed */
++ return NULL;
++ else if (size <= PAGE_SIZE)
++ ptr = kmalloc((unsigned long) size, GFP_KERNEL);
++ else
++ ptr = vmalloc((unsigned long) size);
++ if (!ptr)
++ return ERR_PTR(-ENOMEM);
++ return ptr;
++}
++
++static void
++xattr_free(void *ptr, size_t size)
++{
++ if (!size) /* size request, no buffer was needed */
++ return;
++ else if (size <= PAGE_SIZE)
++ kfree(ptr);
++ else
++ vfree(ptr);
++}
++#endif /* no xattr_alloc() and xattr_free() */
++
++/* BKL held by caller.
++ * dentry->d_inode->i_sem down
++ */
++STATIC int
++mini_fo_getxattr(struct dentry *dentry, const char *name, void *value, size_t size) {
++ struct dentry *hidden_dentry = NULL;
++ int err = -EOPNOTSUPP;
++ /* Define these anyway so we don't need as much ifdef'ed code. */
++ char *encoded_name = NULL;
++ char *encoded_value = NULL;
++
++ check_mini_fo_dentry(dentry);
++
++ if(exists_in_storage(dentry))
++ hidden_dentry = dtohd2(dentry);
++ else
++ hidden_dentry = dtohd(dentry);
++
++ ASSERT(hidden_dentry);
++ ASSERT(hidden_dentry->d_inode);
++ ASSERT(hidden_dentry->d_inode->i_op);
++
++ if (hidden_dentry->d_inode->i_op->getxattr) {
++ encoded_name = (char *)name;
++ encoded_value = (char *)value;
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_lock(&hidden_dentry->d_inode->i_mutex);
++#else
++ down(&hidden_dentry->d_inode->i_sem);
++#endif
++ /* lock_kernel() already done by caller. */
++ err = hidden_dentry->d_inode->i_op->getxattr(hidden_dentry, encoded_name, encoded_value, size);
++ /* unlock_kernel() will be done by caller. */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_lock(&hidden_dentry->d_inode->i_mutex);
++#else
++ up(&hidden_dentry->d_inode->i_sem);
++#endif
++ }
++ return err;
++}
++
++/* BKL held by caller.
++ * dentry->d_inode->i_sem down
++ */
++STATIC int
++#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,21) \
++ && LINUX_VERSION_CODE <= KERNEL_VERSION(2,4,23)) \
++ || LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
++mini_fo_setxattr(struct dentry *dentry, const char *name,
++ const void *value, size_t size, int flags)
++#else
++mini_fo_setxattr(struct dentry *dentry, const char *name,
++ void *value, size_t size, int flags)
++#endif
++
++{
++ struct dentry *hidden_dentry = NULL;
++ int err = -EOPNOTSUPP;
++
++ /* Define these anyway, so we don't have as much ifdef'ed code. */
++ char *encoded_value = NULL;
++ char *encoded_name = NULL;
++
++ check_mini_fo_dentry(dentry);
++
++ if(exists_in_storage(dentry))
++ hidden_dentry = dtohd2(dentry);
++ else
++ hidden_dentry = dtohd(dentry);
++
++ ASSERT(hidden_dentry);
++ ASSERT(hidden_dentry->d_inode);
++ ASSERT(hidden_dentry->d_inode->i_op);
++
++ if (hidden_dentry->d_inode->i_op->setxattr) {
++ encoded_name = (char *)name;
++ encoded_value = (char *)value;
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_lock(&hidden_dentry->d_inode->i_mutex);
++#else
++ down(&hidden_dentry->d_inode->i_sem);
++#endif
++ /* lock_kernel() already done by caller. */
++ err = hidden_dentry->d_inode->i_op->setxattr(hidden_dentry, encoded_name, encoded_value, size, flags);
++ /* unlock_kernel() will be done by caller. */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_unlock(&hidden_dentry->d_inode->i_mutex);
++#else
++ up(&hidden_dentry->d_inode->i_sem);
++#endif
++ }
++ return err;
++}
++
++/* BKL held by caller.
++ * dentry->d_inode->i_sem down
++ */
++STATIC int
++mini_fo_removexattr(struct dentry *dentry, const char *name) {
++ struct dentry *hidden_dentry = NULL;
++ int err = -EOPNOTSUPP;
++ char *encoded_name;
++
++ check_mini_fo_dentry(dentry);
++
++ if(exists_in_storage(dentry))
++ hidden_dentry = dtohd2(dentry);
++ else
++ hidden_dentry = dtohd(dentry);
++
++ ASSERT(hidden_dentry);
++ ASSERT(hidden_dentry->d_inode);
++ ASSERT(hidden_dentry->d_inode->i_op);
++
++ if (hidden_dentry->d_inode->i_op->removexattr) {
++ encoded_name = (char *)name;
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_lock(&hidden_dentry->d_inode->i_mutex);
++#else
++ down(&hidden_dentry->d_inode->i_sem);
++#endif
++ /* lock_kernel() already done by caller. */
++ err = hidden_dentry->d_inode->i_op->removexattr(hidden_dentry, encoded_name);
++ /* unlock_kernel() will be done by caller. */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_unlock(&hidden_dentry->d_inode->i_mutex);
++#else
++ up(&hidden_dentry->d_inode->i_sem);
++#endif
++ }
++ return err;
++}
++
++/* BKL held by caller.
++ * dentry->d_inode->i_sem down
++ */
++STATIC int
++mini_fo_listxattr(struct dentry *dentry, char *list, size_t size) {
++ struct dentry *hidden_dentry = NULL;
++ int err = -EOPNOTSUPP;
++ char *encoded_list = NULL;
++
++ check_mini_fo_dentry(dentry);
++
++ if(exists_in_storage(dentry))
++ hidden_dentry = dtohd2(dentry);
++ else
++ hidden_dentry = dtohd(dentry);
++
++ ASSERT(hidden_dentry);
++ ASSERT(hidden_dentry->d_inode);
++ ASSERT(hidden_dentry->d_inode->i_op);
++
++ if (hidden_dentry->d_inode->i_op->listxattr) {
++ encoded_list = list;
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_lock(&hidden_dentry->d_inode->i_mutex);
++#else
++ down(&hidden_dentry->d_inode->i_sem);
++#endif
++ /* lock_kernel() already done by caller. */
++ err = hidden_dentry->d_inode->i_op->listxattr(hidden_dentry, encoded_list, size);
++ /* unlock_kernel() will be done by caller. */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_unlock(&hidden_dentry->d_inode->i_mutex);
++#else
++ up(&hidden_dentry->d_inode->i_sem);
++#endif
++ }
++ return err;
++}
++# endif /* defined(XATTR) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20)) */
++
++struct inode_operations mini_fo_symlink_iops =
++ {
++ readlink: mini_fo_readlink,
++ follow_link: mini_fo_follow_link,
++ /* mk: permission: mini_fo_permission, */
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
++ revalidate: mini_fo_inode_revalidate,
++#endif
++ setattr: mini_fo_setattr,
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ getattr: mini_fo_getattr,
++ put_link: mini_fo_put_link,
++#endif
++
++#if defined(XATTR) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20))
++ setxattr: mini_fo_setxattr,
++ getxattr: mini_fo_getxattr,
++ listxattr: mini_fo_listxattr,
++ removexattr: mini_fo_removexattr
++# endif /* defined(XATTR) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20)) */
++ };
++
++struct inode_operations mini_fo_dir_iops =
++ {
++ create: mini_fo_create,
++ lookup: mini_fo_lookup,
++ link: mini_fo_link,
++ unlink: mini_fo_unlink,
++ symlink: mini_fo_symlink,
++ mkdir: mini_fo_mkdir,
++ rmdir: mini_fo_rmdir,
++ mknod: mini_fo_mknod,
++ rename: mini_fo_rename,
++ /* no readlink/follow_link for non-symlinks */
++ // off because we have setattr
++ // truncate: mini_fo_truncate,
++ /* mk:permission: mini_fo_permission, */
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
++ revalidate: mini_fo_inode_revalidate,
++#endif
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ getattr: mini_fo_getattr,
++#endif
++ setattr: mini_fo_setattr,
++#if defined(XATTR) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20))
++ setxattr: mini_fo_setxattr,
++ getxattr: mini_fo_getxattr,
++ listxattr: mini_fo_listxattr,
++ removexattr: mini_fo_removexattr
++# endif /* XATTR && LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20) */
++ };
++
++struct inode_operations mini_fo_main_iops =
++ {
++ /* permission: mini_fo_permission, */
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
++ revalidate: mini_fo_inode_revalidate,
++#endif
++ setattr: mini_fo_setattr,
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ getattr: mini_fo_getattr,
++#endif
++#if defined(XATTR) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20))
++ setxattr: mini_fo_setxattr,
++ getxattr: mini_fo_getxattr,
++ listxattr: mini_fo_listxattr,
++ removexattr: mini_fo_removexattr
++# endif /* XATTR && LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,20) */
++ };
+diff -urN linux-2.6.19.old/fs/mini_fo/main.c linux-2.6.19.dev/fs/mini_fo/main.c
+--- linux-2.6.19.old/fs/mini_fo/main.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/fs/mini_fo/main.c 2006-12-14 03:14:03.000000000 +0100
+@@ -0,0 +1,423 @@
++/*
++ * Copyright (c) 1997-2003 Erez Zadok
++ * Copyright (c) 2001-2003 Stony Brook University
++ *
++ * For specific licensing information, see the COPYING file distributed with
++ * this package, or get one from ftp://ftp.filesystems.org/pub/fist/COPYING.
++ *
++ * This Copyright notice must be kept intact and distributed with all
++ * fistgen sources INCLUDING sources generated by fistgen.
++ */
++/*
++ * Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++
++/*
++ * $Id$
++ */
++
++#ifdef HAVE_CONFIG_H
++# include <config.h>
++#endif
++
++#include "fist.h"
++#include "mini_fo.h"
++#include <linux/module.h>
++
++/* This definition must only appear after we include <linux/module.h> */
++#ifndef MODULE_LICENSE
++# define MODULE_LICENSE(bison)
++#endif /* not MODULE_LICENSE */
++
++/*
++ * This is the mini_fo tri interpose function, which extends the
++ * functionality of the regular interpose by interposing a higher
++ * level inode on top of two lower level ones: the base filesystem
++ * inode and the storage filesystem inode.
++ *
++ * sb we pass is mini_fo's super_block
++ */
++int
++mini_fo_tri_interpose(dentry_t *hidden_dentry,
++ dentry_t *hidden_sto_dentry,
++ dentry_t *dentry, super_block_t *sb, int flag)
++{
++ inode_t *hidden_inode = NULL;
++ inode_t *hidden_sto_inode = NULL; /* store corresponding storage inode */
++ int err = 0;
++ inode_t *inode;
++
++ /* Pointer to hidden_sto_inode if exists, else to hidden_inode.
++ * This is used to copy the attributes of the correct inode. */
++ inode_t *master_inode;
++
++ if(hidden_dentry)
++ hidden_inode = hidden_dentry->d_inode;
++ if(hidden_sto_dentry)
++ hidden_sto_inode = hidden_sto_dentry->d_inode;
++
++ ASSERT(dentry->d_inode == NULL);
++
++ /* mk: One of the inodes associated with the dentrys is likely to
++ * be NULL, so carefull:
++ */
++ ASSERT((hidden_inode != NULL) || (hidden_sto_inode != NULL));
++
++ if(hidden_sto_inode)
++ master_inode = hidden_sto_inode;
++ else
++ master_inode = hidden_inode;
++
++ /*
++ * We allocate our new inode below, by calling iget.
++ * iget will call our read_inode which will initialize some
++ * of the new inode's fields
++ */
++
++ /*
++ * original: inode = iget(sb, hidden_inode->i_ino);
++ */
++ inode = iget(sb, iunique(sb, 25));
++ if (!inode) {
++ err = -EACCES; /* should be impossible??? */
++ goto out;
++ }
++
++ /*
++ * interpose the inode if not already interposed
++ * this is possible if the inode is being reused
++ * XXX: what happens if we get_empty_inode() but there's another already?
++ * for now, ASSERT() that this can't happen; fix later.
++ */
++ if (itohi(inode) != NULL) {
++ printk(KERN_CRIT "mini_fo_tri_interpose: itohi(inode) != NULL.\n");
++ }
++ if (itohi2(inode) != NULL) {
++ printk(KERN_CRIT "mini_fo_tri_interpose: itohi2(inode) != NULL.\n");
++ }
++
++ /* mk: Carefull, igrab can't handle NULL inodes (ok, why should it?), so
++ * we need to check here:
++ */
++ if(hidden_inode)
++ itohi(inode) = igrab(hidden_inode);
++ else
++ itohi(inode) = NULL;
++
++ if(hidden_sto_inode)
++ itohi2(inode) = igrab(hidden_sto_inode);
++ else
++ itohi2(inode) = NULL;
++
++
++ /* Use different set of inode ops for symlinks & directories*/
++ if (S_ISLNK(master_inode->i_mode))
++ inode->i_op = &mini_fo_symlink_iops;
++ else if (S_ISDIR(master_inode->i_mode))
++ inode->i_op = &mini_fo_dir_iops;
++
++ /* Use different set of file ops for directories */
++ if (S_ISDIR(master_inode->i_mode))
++ inode->i_fop = &mini_fo_dir_fops;
++
++ /* properly initialize special inodes */
++ if (S_ISBLK(master_inode->i_mode) || S_ISCHR(master_inode->i_mode) ||
++ S_ISFIFO(master_inode->i_mode) || S_ISSOCK(master_inode->i_mode)) {
++ init_special_inode(inode, master_inode->i_mode, master_inode->i_rdev);
++ }
++
++ /* Fix our inode's address operations to that of the lower inode */
++ if (inode->i_mapping->a_ops != master_inode->i_mapping->a_ops) {
++ inode->i_mapping->a_ops = master_inode->i_mapping->a_ops;
++ }
++
++ /* only (our) lookup wants to do a d_add */
++ if (flag)
++ d_add(dentry, inode);
++ else
++ d_instantiate(dentry, inode);
++
++ ASSERT(dtopd(dentry) != NULL);
++
++ /* all well, copy inode attributes */
++ fist_copy_attr_all(inode, master_inode);
++
++ out:
++ return err;
++}
++
++/* parse mount options "base=" and "sto=" */
++dentry_t *
++mini_fo_parse_options(super_block_t *sb, char *options)
++{
++ dentry_t *hidden_root = ERR_PTR(-EINVAL);
++ dentry_t *hidden_root2 = ERR_PTR(-EINVAL);
++ struct nameidata nd, nd2;
++ char *name, *tmp, *end;
++ int err = 0;
++
++ /* We don't want to go off the end of our arguments later on. */
++ for (end = options; *end; end++);
++
++ while (options < end) {
++ tmp = options;
++ while (*tmp && *tmp != ',')
++ tmp++;
++ *tmp = '\0';
++ if (!strncmp("base=", options, 5)) {
++ name = options + 5;
++ printk(KERN_INFO "mini_fo: using base directory: %s\n", name);
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
++ if (path_init(name, LOOKUP_FOLLOW, &nd))
++ err = path_walk(name, &nd);
++#else
++ err = path_lookup(name, LOOKUP_FOLLOW, &nd);
++#endif
++ if (err) {
++ printk(KERN_CRIT "mini_fo: error accessing hidden directory '%s'\n", name);
++ hidden_root = ERR_PTR(err);
++ goto out;
++ }
++ hidden_root = nd.dentry;
++ stopd(sb)->base_dir_dentry = nd.dentry;
++ stopd(sb)->hidden_mnt = nd.mnt;
++
++ } else if(!strncmp("sto=", options, 4)) {
++ /* parse the storage dir */
++ name = options + 4;
++ printk(KERN_INFO "mini_fo: using storage directory: %s\n", name);
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
++ if(path_init(name, LOOKUP_FOLLOW, &nd2))
++ err = path_walk(name, &nd2);
++#else
++ err = path_lookup(name, LOOKUP_FOLLOW, &nd2);
++#endif
++ if(err) {
++ printk(KERN_CRIT "mini_fo: error accessing hidden storage directory '%s'\n", name);
++
++ hidden_root2 = ERR_PTR(err);
++ goto out;
++ }
++ hidden_root2 = nd2.dentry;
++ stopd(sb)->storage_dir_dentry = nd2.dentry;
++ stopd(sb)->hidden_mnt2 = nd2.mnt;
++ stohs2(sb) = hidden_root2->d_sb;
++
++ /* validate storage dir, this is done in
++ * mini_fo_read_super for the base directory.
++ */
++ if (IS_ERR(hidden_root2)) {
++ printk(KERN_WARNING "mini_fo_parse_options: storage dentry lookup failed (err = %ld)\n", PTR_ERR(hidden_root2));
++ goto out;
++ }
++ if (!hidden_root2->d_inode) {
++ printk(KERN_WARNING "mini_fo_parse_options: no storage dir to interpose on.\n");
++ goto out;
++ }
++ stohs2(sb) = hidden_root2->d_sb;
++ } else {
++ printk(KERN_WARNING "mini_fo: unrecognized option '%s'\n", options);
++ hidden_root = ERR_PTR(-EINVAL);
++ goto out;
++ }
++ options = tmp + 1;
++ }
++
++ out:
++ if(IS_ERR(hidden_root2))
++ return hidden_root2;
++ return hidden_root;
++}
++
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++static int
++#else
++super_block_t *
++#endif
++mini_fo_read_super(super_block_t *sb, void *raw_data, int silent)
++{
++ dentry_t *hidden_root;
++ int err = 0;
++
++ if (!raw_data) {
++ printk(KERN_WARNING "mini_fo_read_super: missing argument\n");
++ err = -EINVAL;
++ goto out;
++ }
++ /*
++ * Allocate superblock private data
++ */
++ __stopd(sb) = kmalloc(sizeof(struct mini_fo_sb_info), GFP_KERNEL);
++ if (!stopd(sb)) {
++ printk(KERN_WARNING "%s: out of memory\n", __FUNCTION__);
++ err = -ENOMEM;
++ goto out;
++ }
++ stohs(sb) = NULL;
++
++ hidden_root = mini_fo_parse_options(sb, raw_data);
++ if (IS_ERR(hidden_root)) {
++ printk(KERN_WARNING "mini_fo_read_super: lookup_dentry failed (err = %ld)\n", PTR_ERR(hidden_root));
++ err = PTR_ERR(hidden_root);
++ goto out_free;
++ }
++ if (!hidden_root->d_inode) {
++ printk(KERN_WARNING "mini_fo_read_super: no directory to interpose on\n");
++ goto out_free;
++ }
++ stohs(sb) = hidden_root->d_sb;
++
++ /*
++ * Linux 2.4.2-ac3 and beyond has code in
++ * mm/filemap.c:generic_file_write() that requires sb->s_maxbytes
++ * to be populated. If not set, all write()s under that sb will
++ * return 0.
++ *
++ * Linux 2.4.4+ automatically sets s_maxbytes to MAX_NON_LFS;
++ * the filesystem should override it only if it supports LFS.
++ */
++ /* non-SCA code is good to go with LFS */
++ sb->s_maxbytes = hidden_root->d_sb->s_maxbytes;
++
++ sb->s_op = &mini_fo_sops;
++ /*
++ * we can't use d_alloc_root if we want to use
++ * our own interpose function unchanged,
++ * so we simply replicate *most* of the code in d_alloc_root here
++ */
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
++ sb->s_root = d_alloc(NULL, &(const struct qstr) { "/", 1, 0 });
++#else
++ sb->s_root = d_alloc(NULL, &(const struct qstr){hash: 0, name: "/", len : 1});
++#endif
++ if (IS_ERR(sb->s_root)) {
++ printk(KERN_WARNING "mini_fo_read_super: d_alloc failed\n");
++ err = -ENOMEM;
++ goto out_dput;
++ }
++
++ sb->s_root->d_op = &mini_fo_dops;
++ sb->s_root->d_sb = sb;
++ sb->s_root->d_parent = sb->s_root;
++
++ /* link the upper and lower dentries */
++ __dtopd(sb->s_root) = (struct mini_fo_dentry_info *)
++ kmalloc(sizeof(struct mini_fo_dentry_info), GFP_KERNEL);
++ if (!dtopd(sb->s_root)) {
++ err = -ENOMEM;
++ goto out_dput2;
++ }
++ dtopd(sb->s_root)->state = MODIFIED;
++ dtohd(sb->s_root) = hidden_root;
++
++ /* fanout relevant, interpose on storage root dentry too */
++ dtohd2(sb->s_root) = stopd(sb)->storage_dir_dentry;
++
++ /* ...and call tri-interpose to interpose root dir inodes
++ * if (mini_fo_interpose(hidden_root, sb->s_root, sb, 0))
++ */
++ if(mini_fo_tri_interpose(hidden_root, dtohd2(sb->s_root), sb->s_root, sb, 0))
++ goto out_dput2;
++
++ /* initalize the wol list */
++ itopd(sb->s_root->d_inode)->deleted_list_size = -1;
++ itopd(sb->s_root->d_inode)->renamed_list_size = -1;
++ meta_build_lists(sb->s_root);
++
++ goto out;
++
++ out_dput2:
++ dput(sb->s_root);
++ out_dput:
++ dput(hidden_root);
++ dput(dtohd2(sb->s_root)); /* release the hidden_sto_dentry too */
++ out_free:
++ kfree(stopd(sb));
++ __stopd(sb) = NULL;
++ out:
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ return err;
++#else
++ if (err) {
++ return ERR_PTR(err);
++ } else {
++ return sb;
++ }
++#endif
++}
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
++static int mini_fo_get_sb(struct file_system_type *fs_type,
++ int flags, const char *dev_name,
++ void *raw_data, struct vfsmount *mnt)
++{
++ return get_sb_nodev(fs_type, flags, raw_data, mini_fo_read_super, mnt);
++}
++#else
++static struct super_block *mini_fo_get_sb(struct file_system_type *fs_type,
++ int flags, const char *dev_name,
++ void *raw_data)
++{
++ return get_sb_nodev(fs_type, flags, raw_data, mini_fo_read_super);
++}
++#endif
++
++void mini_fo_kill_block_super(struct super_block *sb)
++{
++ generic_shutdown_super(sb);
++ /*
++ * XXX: BUG: Halcrow: Things get unstable sometime after this point:
++ * lib/rwsem-spinlock.c:127: spin_is_locked on uninitialized
++ * fs/fs-writeback.c:402: spin_lock(fs/super.c:a0381828) already
++ * locked by fs/fs-writeback.c/402
++ *
++ * Apparently, someone's not releasing a lock on sb_lock...
++ */
++}
++
++static struct file_system_type mini_fo_fs_type = {
++ .owner = THIS_MODULE,
++ .name = "mini_fo",
++ .get_sb = mini_fo_get_sb,
++ .kill_sb = mini_fo_kill_block_super,
++ .fs_flags = 0,
++};
++
++
++#else
++static DECLARE_FSTYPE(mini_fo_fs_type, "mini_fo", mini_fo_read_super, 0);
++#endif
++
++static int __init init_mini_fo_fs(void)
++{
++ printk("Registering mini_fo version $Id$\n");
++ return register_filesystem(&mini_fo_fs_type);
++}
++static void __exit exit_mini_fo_fs(void)
++{
++ printk("Unregistering mini_fo version $Id$\n");
++ unregister_filesystem(&mini_fo_fs_type);
++}
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
++EXPORT_NO_SYMBOLS;
++#endif
++
++MODULE_AUTHOR("Erez Zadok <ezk@cs.sunysb.edu>");
++MODULE_DESCRIPTION("FiST-generated mini_fo filesystem");
++MODULE_LICENSE("GPL");
++
++/* MODULE_PARM(fist_debug_var, "i"); */
++/* MODULE_PARM_DESC(fist_debug_var, "Debug level"); */
++
++module_init(init_mini_fo_fs)
++module_exit(exit_mini_fo_fs)
+diff -urN linux-2.6.19.old/fs/mini_fo/Makefile linux-2.6.19.dev/fs/mini_fo/Makefile
+--- linux-2.6.19.old/fs/mini_fo/Makefile 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/fs/mini_fo/Makefile 2006-12-14 03:14:03.000000000 +0100
+@@ -0,0 +1,17 @@
++#
++# Makefile for mini_fo 2.4 and 2.6 Linux kernels
++#
++# Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
++#
++# This program is free software; you can redistribute it and/or
++# modify it under the terms of the GNU General Public License
++# as published by the Free Software Foundation; either version
++# 2 of the License, or (at your option) any later version.
++#
++
++obj-$(CONFIG_MINI_FO) := mini_fo.o
++mini_fo-objs := meta.o dentry.o file.o inode.o main.o super.o state.o aux.o
++
++# dependencies
++${mini_fo-objs}: mini_fo.h fist.h
++
+diff -urN linux-2.6.19.old/fs/mini_fo/meta.c linux-2.6.19.dev/fs/mini_fo/meta.c
+--- linux-2.6.19.old/fs/mini_fo/meta.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/fs/mini_fo/meta.c 2006-12-14 03:14:03.000000000 +0100
+@@ -0,0 +1,1000 @@
++/*
++ * Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++
++#ifdef HAVE_CONFIG_H
++# include <config.h>
++#endif /* HAVE_CONFIG_H */
++#include "fist.h"
++#include "mini_fo.h"
++
++int meta_build_lists(dentry_t *dentry)
++{
++ struct mini_fo_inode_info *inode_info;
++
++ dentry_t *meta_dentry = 0;
++ file_t *meta_file = 0;
++ mm_segment_t old_fs;
++ void *buf;
++
++ int bytes, len;
++ struct vfsmount *meta_mnt;
++ char *entry;
++
++ inode_info = itopd(dentry->d_inode);
++ if(!(inode_info->deleted_list_size == -1 &&
++ inode_info->renamed_list_size == -1)) {
++ printk(KERN_CRIT "mini_fo: meta_build_lists: \
++ Error, list(s) not virgin.\n");
++ return -1;
++ }
++
++ /* init our meta lists */
++ INIT_LIST_HEAD(&inode_info->deleted_list);
++ inode_info->deleted_list_size = 0;
++
++ INIT_LIST_HEAD(&inode_info->renamed_list);
++ inode_info->renamed_list_size = 0;
++
++ /* might there be a META-file? */
++ if(dtohd2(dentry) && dtohd2(dentry)->d_inode) {
++ meta_dentry = lookup_one_len(META_FILENAME,
++ dtohd2(dentry),
++ strlen(META_FILENAME));
++ if(!meta_dentry->d_inode) {
++ dput(meta_dentry);
++ goto out_ok;
++ }
++ /* $%& err, is this correct? */
++ meta_mnt = stopd(dentry->d_inode->i_sb)->hidden_mnt2;
++ mntget(meta_mnt);
++
++
++ /* open META-file for reading */
++ meta_file = dentry_open(meta_dentry, meta_mnt, 0x0);
++ if(!meta_file || IS_ERR(meta_file)) {
++ printk(KERN_CRIT "mini_fo: meta_build_lists: \
++ ERROR opening META file.\n");
++ goto out_err;
++ }
++
++ /* check if fs supports reading */
++ if(!meta_file->f_op->read) {
++ printk(KERN_CRIT "mini_fo: meta_build_lists: \
++ ERROR, fs does not support reading.\n");
++ goto out_err_close;
++ }
++
++ /* allocate a page for transfering the data */
++ buf = (void *) __get_free_page(GFP_KERNEL);
++ if(!buf) {
++ printk(KERN_CRIT "mini_fo: meta_build_lists: \
++ ERROR, out of mem.\n");
++ goto out_err_close;
++ }
++ meta_file->f_pos = 0;
++ old_fs = get_fs();
++ set_fs(KERNEL_DS);
++ do {
++ char *c;
++ bytes = meta_file->f_op->read(meta_file, buf, PAGE_SIZE, &meta_file->f_pos);
++ if(bytes == PAGE_SIZE) {
++ /* trim a cut off filename and adjust f_pos to get it next time */
++ for(c = (char*) buf+PAGE_SIZE;
++ *c != '\n';
++ c--, bytes--, meta_file->f_pos--);
++ }
++ entry = (char *) buf;
++ while(entry < (char *) buf+bytes) {
++
++ char *old_path;
++ char *dir_name;
++ int old_len, new_len;
++
++ /* len without '\n'*/
++ len = (int) (strchr(entry, '\n') - entry);
++ switch (*entry) {
++ case 'D':
++ /* format: "D filename" */
++ meta_list_add_d_entry(dentry,
++ entry+2,
++ len-2);
++ break;
++ case 'R':
++ /* format: "R path/xy/dir newDir" */
++ old_path = entry+2;
++ dir_name = strchr(old_path, ' ') + 1;
++ old_len = dir_name - old_path - 1;
++ new_len = ((int) entry) + len - ((int ) dir_name);
++ meta_list_add_r_entry(dentry,
++ old_path,
++ old_len,
++ dir_name,
++ new_len);
++ break;
++ default:
++ /* unknown entry type detected */
++ break;
++ }
++ entry += len+1;
++ }
++
++ } while(meta_file->f_pos < meta_dentry->d_inode->i_size);
++
++ free_page((unsigned long) buf);
++ set_fs(old_fs);
++ fput(meta_file);
++ }
++ goto out_ok;
++
++ out_err_close:
++ fput(meta_file);
++ out_err:
++ mntput(meta_mnt);
++ dput(meta_dentry);
++ return -1;
++ out_ok:
++ return 1; /* check this!!! inode_info->wol_size; */
++}
++
++/* cleanups up all lists and free's the mem by dentry */
++int meta_put_lists(dentry_t *dentry)
++{
++ if(!dentry || !dentry->d_inode) {
++ printk("mini_fo: meta_put_lists: invalid dentry passed.\n");
++ return -1;
++ }
++ return __meta_put_lists(dentry->d_inode);
++}
++
++/* cleanups up all lists and free's the mem by inode */
++int __meta_put_lists(inode_t *inode)
++{
++ int err = 0;
++ if(!inode || !itopd(inode)) {
++ printk("mini_fo: __meta_put_lists: invalid inode passed.\n");
++ return -1;
++ }
++ err = __meta_put_d_list(inode);
++ err |= __meta_put_r_list(inode);
++ return err;
++}
++
++int meta_sync_lists(dentry_t *dentry)
++{
++ int err = 0;
++ if(!dentry || !dentry->d_inode) {
++ printk("mini_fo: meta_sync_lists: \
++ invalid dentry passed.\n");
++ return -1;
++ }
++ err = meta_sync_d_list(dentry, 0);
++ err |= meta_sync_r_list(dentry, 1);
++ return err;
++}
++
++
++/* remove all D entries from the renamed list and free the mem */
++int __meta_put_d_list(inode_t *inode)
++{
++ struct list_head *tmp;
++ struct deleted_entry *del_entry;
++ struct mini_fo_inode_info *inode_info;
++
++ if(!inode || !itopd(inode)) {
++ printk(KERN_CRIT "mini_fo: __meta_put_d_list: \
++ invalid inode passed.\n");
++ return -1;
++ }
++ inode_info = itopd(inode);
++
++ /* nuke the DELETED-list */
++ if(inode_info->deleted_list_size <= 0)
++ return 0;
++
++ while(!list_empty(&inode_info->deleted_list)) {
++ tmp = inode_info->deleted_list.next;
++ list_del(tmp);
++ del_entry = list_entry(tmp, struct deleted_entry, list);
++ kfree(del_entry->name);
++ kfree(del_entry);
++ }
++ inode_info->deleted_list_size = 0;
++
++ return 0;
++}
++
++/* remove all R entries from the renamed list and free the mem */
++int __meta_put_r_list(inode_t *inode)
++{
++ struct list_head *tmp;
++ struct renamed_entry *ren_entry;
++ struct mini_fo_inode_info *inode_info;
++
++ if(!inode || !itopd(inode)) {
++ printk(KERN_CRIT "mini_fo: meta_put_r_list: invalid inode.\n");
++ return -1;
++ }
++ inode_info = itopd(inode);
++
++ /* nuke the RENAMED-list */
++ if(inode_info->renamed_list_size <= 0)
++ return 0;
++
++ while(!list_empty(&inode_info->renamed_list)) {
++ tmp = inode_info->renamed_list.next;
++ list_del(tmp);
++ ren_entry = list_entry(tmp, struct renamed_entry, list);
++ kfree(ren_entry->new_name);
++ kfree(ren_entry->old_name);
++ kfree(ren_entry);
++ }
++ inode_info->renamed_list_size = 0;
++
++ return 0;
++}
++
++int meta_add_d_entry(dentry_t *dentry, const char *name, int len)
++{
++ int err = 0;
++ err = meta_list_add_d_entry(dentry, name, len);
++ err |= meta_write_d_entry(dentry,name,len);
++ return err;
++}
++
++/* add a D entry to the deleted list */
++int meta_list_add_d_entry(dentry_t *dentry, const char *name, int len)
++{
++ struct deleted_entry *del_entry;
++ struct mini_fo_inode_info *inode_info;
++
++ if(!dentry || !dentry->d_inode) {
++ printk(KERN_CRIT "mini_fo: meta_list_add_d_entry: \
++ invalid dentry passed.\n");
++ return -1;
++ }
++ inode_info = itopd(dentry->d_inode);
++
++ if(inode_info->deleted_list_size < 0)
++ return -1;
++
++ del_entry = (struct deleted_entry *)
++ kmalloc(sizeof(struct deleted_entry), GFP_KERNEL);
++ del_entry->name = (char*) kmalloc(len, GFP_KERNEL);
++ if(!del_entry || !del_entry->name) {
++ printk(KERN_CRIT "mini_fo: meta_list_add_d_entry: \
++ out of mem.\n");
++ kfree(del_entry->name);
++ kfree(del_entry);
++ return -ENOMEM;
++ }
++
++ strncpy(del_entry->name, name, len);
++ del_entry->len = len;
++
++ list_add(&del_entry->list, &inode_info->deleted_list);
++ inode_info->deleted_list_size++;
++ return 0;
++}
++
++int meta_add_r_entry(dentry_t *dentry,
++ const char *old_name, int old_len,
++ const char *new_name, int new_len)
++{
++ int err = 0;
++ err = meta_list_add_r_entry(dentry,
++ old_name, old_len,
++ new_name, new_len);
++ err |= meta_write_r_entry(dentry,
++ old_name, old_len,
++ new_name, new_len);
++ return err;
++}
++
++/* add a R entry to the renamed list */
++int meta_list_add_r_entry(dentry_t *dentry,
++ const char *old_name, int old_len,
++ const char *new_name, int new_len)
++{
++ struct renamed_entry *ren_entry;
++ struct mini_fo_inode_info *inode_info;
++
++ if(!dentry || !dentry->d_inode) {
++ printk(KERN_CRIT "mini_fo: meta_list_add_r_entry: \
++ invalid dentry passed.\n");
++ return -1;
++ }
++ inode_info = itopd(dentry->d_inode);
++
++ if(inode_info->renamed_list_size < 0)
++ return -1;
++
++ ren_entry = (struct renamed_entry *)
++ kmalloc(sizeof(struct renamed_entry), GFP_KERNEL);
++ ren_entry->old_name = (char*) kmalloc(old_len, GFP_KERNEL);
++ ren_entry->new_name = (char*) kmalloc(new_len, GFP_KERNEL);
++
++ if(!ren_entry || !ren_entry->old_name || !ren_entry->new_name) {
++ printk(KERN_CRIT "mini_fo: meta_list_add_r_entry: \
++ out of mem.\n");
++ kfree(ren_entry->new_name);
++ kfree(ren_entry->old_name);
++ kfree(ren_entry);
++ return -ENOMEM;
++ }
++
++ strncpy(ren_entry->old_name, old_name, old_len);
++ ren_entry->old_len = old_len;
++ strncpy(ren_entry->new_name, new_name, new_len);
++ ren_entry->new_len = new_len;
++
++ list_add(&ren_entry->list, &inode_info->renamed_list);
++ inode_info->renamed_list_size++;
++ return 0;
++}
++
++
++int meta_remove_r_entry(dentry_t *dentry, const char *name, int len)
++{
++ int err = 0;
++ if(!dentry || !dentry->d_inode) {
++ printk(KERN_CRIT
++ "mini_fo: meta_remove_r_entry: \
++ invalid dentry passed.\n");
++ return -1;
++ }
++
++ err = meta_list_remove_r_entry(dentry, name, len);
++ err |= meta_sync_lists(dentry);
++ return err;
++}
++
++int meta_list_remove_r_entry(dentry_t *dentry, const char *name, int len)
++{
++ if(!dentry || !dentry->d_inode) {
++ printk(KERN_CRIT
++ "mini_fo: meta_list_remove_r_entry: \
++ invalid dentry passed.\n");
++ return -1;
++ }
++ return __meta_list_remove_r_entry(dentry->d_inode, name, len);
++}
++
++int __meta_list_remove_r_entry(inode_t *inode, const char *name, int len)
++{
++ struct list_head *tmp;
++ struct renamed_entry *ren_entry;
++ struct mini_fo_inode_info *inode_info;
++
++ if(!inode || !itopd(inode))
++ printk(KERN_CRIT
++ "mini_fo: __meta_list_remove_r_entry: \
++ invalid inode passed.\n");
++ inode_info = itopd(inode);
++
++ if(inode_info->renamed_list_size < 0)
++ return -1;
++ if(inode_info->renamed_list_size == 0)
++ return 1;
++
++ list_for_each(tmp, &inode_info->renamed_list) {
++ ren_entry = list_entry(tmp, struct renamed_entry, list);
++ if(ren_entry->new_len != len)
++ continue;
++
++ if(!strncmp(ren_entry->new_name, name, len)) {
++ list_del(tmp);
++ kfree(ren_entry->new_name);
++ kfree(ren_entry->old_name);
++ kfree(ren_entry);
++ inode_info->renamed_list_size--;
++ return 0;
++ }
++ }
++ return 1;
++}
++
++
++/* append a single D entry to the meta file */
++int meta_write_d_entry(dentry_t *dentry, const char *name, int len)
++{
++ dentry_t *meta_dentry = 0;
++ file_t *meta_file = 0;
++ mm_segment_t old_fs;
++
++ int bytes, err;
++ struct vfsmount *meta_mnt = 0;
++ char *buf;
++
++ err = 0;
++
++ if(itopd(dentry->d_inode)->deleted_list_size < 0) {
++ err = -1;
++ goto out;
++ }
++
++ if(dtopd(dentry)->state == UNMODIFIED) {
++ err = build_sto_structure(dentry->d_parent, dentry);
++ if(err) {
++ printk(KERN_CRIT "mini_fo: meta_write_d_entry: \
++ build_sto_structure failed.\n");
++ goto out;
++ }
++ }
++ meta_dentry = lookup_one_len(META_FILENAME,
++ dtohd2(dentry), strlen (META_FILENAME));
++
++ /* We need to create a META-file */
++ if(!meta_dentry->d_inode) {
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ vfs_create(dtohd2(dentry)->d_inode,
++ meta_dentry,
++ S_IRUSR | S_IWUSR,
++ NULL);
++#else
++ vfs_create(dtohd2(dentry)->d_inode,
++ meta_dentry,
++ S_IRUSR | S_IWUSR);
++#endif
++ }
++ /* open META-file for writing */
++ meta_file = dentry_open(meta_dentry, meta_mnt, 0x1);
++ if(!meta_file || IS_ERR(meta_file)) {
++ printk(KERN_CRIT "mini_fo: meta_write_d_entry: \
++ ERROR opening meta file.\n");
++ mntput(meta_mnt); /* $%& is this necessary? */
++ dput(meta_dentry);
++ err = -1;
++ goto out;
++ }
++
++ /* check if fs supports writing */
++ if(!meta_file->f_op->write) {
++ printk(KERN_CRIT "mini_fo: meta_write_d_entry: \
++ ERROR, fs does not support writing.\n");
++ goto out_err_close;
++ }
++
++ meta_file->f_pos = meta_dentry->d_inode->i_size; /* append */
++ old_fs = get_fs();
++ set_fs(KERNEL_DS);
++
++ /* size: len for name, 1 for \n and 2 for "D " */
++ buf = (char *) kmalloc(len+3, GFP_KERNEL);
++ if (!buf) {
++ printk(KERN_CRIT "mini_fo: meta_write_d_entry: \
++ out of mem.\n");
++ return -ENOMEM;
++ }
++
++ buf[0] = 'D';
++ buf[1] = ' ';
++ strncpy(buf+2, name, len);
++ buf[len+2] = '\n';
++ bytes = meta_file->f_op->write(meta_file, buf, len+3,
++ &meta_file->f_pos);
++ if(bytes != len+3) {
++ printk(KERN_CRIT "mini_fo: meta_write_d_entry: \
++ ERROR writing.\n");
++ err = -1;
++ }
++ kfree(buf);
++ set_fs(old_fs);
++
++ out_err_close:
++ fput(meta_file);
++ out:
++ return err;
++}
++
++/* append a single R entry to the meta file */
++int meta_write_r_entry(dentry_t *dentry,
++ const char *old_name, int old_len,
++ const char *new_name, int new_len)
++{
++ dentry_t *meta_dentry = 0;
++ file_t *meta_file = 0;
++ mm_segment_t old_fs;
++
++ int bytes, err, buf_len;
++ struct vfsmount *meta_mnt = 0;
++ char *buf;
++
++
++ err = 0;
++
++ if(itopd(dentry->d_inode)->renamed_list_size < 0) {
++ err = -1;
++ goto out;
++ }
++
++ /* build the storage structure? */
++ if(dtopd(dentry)->state == UNMODIFIED) {
++ err = build_sto_structure(dentry->d_parent, dentry);
++ if(err) {
++ printk(KERN_CRIT "mini_fo: meta_write_r_entry: \
++ build_sto_structure failed.\n");
++ goto out;
++ }
++ }
++ meta_dentry = lookup_one_len(META_FILENAME,
++ dtohd2(dentry),
++ strlen (META_FILENAME));
++ if(!meta_dentry->d_inode) {
++ /* We need to create a META-file */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ vfs_create(dtohd2(dentry)->d_inode,
++ meta_dentry, S_IRUSR | S_IWUSR, NULL);
++#else
++ vfs_create(dtohd2(dentry)->d_inode,
++ meta_dentry, S_IRUSR | S_IWUSR);
++#endif
++ }
++ /* open META-file for writing */
++ meta_file = dentry_open(meta_dentry, meta_mnt, 0x1);
++ if(!meta_file || IS_ERR(meta_file)) {
++ printk(KERN_CRIT "mini_fo: meta_write_r_entry: \
++ ERROR opening meta file.\n");
++ mntput(meta_mnt);
++ dput(meta_dentry);
++ err = -1;
++ goto out;
++ }
++
++ /* check if fs supports writing */
++ if(!meta_file->f_op->write) {
++ printk(KERN_CRIT "mini_fo: meta_write_r_entry: \
++ ERROR, fs does not support writing.\n");
++ goto out_err_close;
++ }
++
++ meta_file->f_pos = meta_dentry->d_inode->i_size; /* append */
++ old_fs = get_fs();
++ set_fs(KERNEL_DS);
++
++ /* size: 2 for "R ", old_len+new_len for names, 1 blank+1 \n */
++ buf_len = old_len + new_len + 4;
++ buf = (char *) kmalloc(buf_len, GFP_KERNEL);
++ if (!buf) {
++ printk(KERN_CRIT "mini_fo: meta_write_r_entry: out of mem.\n");
++ return -ENOMEM;
++ }
++
++ buf[0] = 'R';
++ buf[1] = ' ';
++ strncpy(buf + 2, old_name, old_len);
++ buf[old_len + 2] = ' ';
++ strncpy(buf + old_len + 3, new_name, new_len);
++ buf[buf_len -1] = '\n';
++ bytes = meta_file->f_op->write(meta_file, buf, buf_len, &meta_file->f_pos);
++ if(bytes != buf_len) {
++ printk(KERN_CRIT "mini_fo: meta_write_r_entry: ERROR writing.\n");
++ err = -1;
++ }
++
++ kfree(buf);
++ set_fs(old_fs);
++
++ out_err_close:
++ fput(meta_file);
++ out:
++ return err;
++}
++
++/* sync D list to disk, append data if app_flag is 1 */
++/* check the meta_mnt, which seems not to be used (properly) */
++
++int meta_sync_d_list(dentry_t *dentry, int app_flag)
++{
++ dentry_t *meta_dentry;
++ file_t *meta_file;
++ mm_segment_t old_fs;
++
++ int bytes, err;
++ struct vfsmount *meta_mnt;
++ char *buf;
++
++ struct list_head *tmp;
++ struct deleted_entry *del_entry;
++ struct mini_fo_inode_info *inode_info;
++
++ err = 0;
++ meta_file=0;
++ meta_mnt=0;
++
++ if(!dentry || !dentry->d_inode) {
++ printk(KERN_CRIT "mini_fo: meta_sync_d_list: \
++ invalid inode passed.\n");
++ err = -1;
++ goto out;
++ }
++ inode_info = itopd(dentry->d_inode);
++
++ if(inode_info->deleted_list_size < 0) {
++ err = -1;
++ goto out;
++ }
++
++ /* ok, there is something to sync */
++
++ /* build the storage structure? */
++ if(!dtohd2(dentry) && !itohi2(dentry->d_inode)) {
++ err = build_sto_structure(dentry->d_parent, dentry);
++ if(err) {
++ printk(KERN_CRIT "mini_fo: meta_sync_d_list: \
++ build_sto_structure failed.\n");
++ goto out;
++ }
++ }
++ meta_dentry = lookup_one_len(META_FILENAME,
++ dtohd2(dentry),
++ strlen(META_FILENAME));
++ if(!meta_dentry->d_inode) {
++ /* We need to create a META-file */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ vfs_create(dtohd2(dentry)->d_inode,
++ meta_dentry, S_IRUSR | S_IWUSR, NULL);
++#else
++ vfs_create(dtohd2(dentry)->d_inode,
++ meta_dentry, S_IRUSR | S_IWUSR);
++#endif
++ app_flag = 0;
++ }
++ /* need we truncate the meta file? */
++ if(!app_flag) {
++ struct iattr newattrs;
++ newattrs.ia_size = 0;
++ newattrs.ia_valid = ATTR_SIZE | ATTR_CTIME;
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_lock(&meta_dentry->d_inode->i_mutex);
++#else
++ down(&meta_dentry->d_inode->i_sem);
++#endif
++ err = notify_change(meta_dentry, &newattrs);
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_unlock(&meta_dentry->d_inode->i_mutex);
++#else
++ up(&meta_dentry->d_inode->i_sem);
++#endif
++
++ if(err || meta_dentry->d_inode->i_size != 0) {
++ printk(KERN_CRIT "mini_fo: meta_sync_d_list: \
++ ERROR truncating meta file.\n");
++ goto out_err_close;
++ }
++ }
++
++ /* open META-file for writing */
++ meta_file = dentry_open(meta_dentry, meta_mnt, 0x1);
++ if(!meta_file || IS_ERR(meta_file)) {
++ printk(KERN_CRIT "mini_fo: meta_sync_d_list: \
++ ERROR opening meta file.\n");
++ /* we don't mntget so we dont't mntput (for now)
++ * mntput(meta_mnt);
++ */
++ dput(meta_dentry);
++ err = -1;
++ goto out;
++ }
++
++ /* check if fs supports writing */
++ if(!meta_file->f_op->write) {
++ printk(KERN_CRIT "mini_fo: meta_sync_d_list: \
++ ERROR, fs does not support writing.\n");
++ goto out_err_close;
++ }
++
++ meta_file->f_pos = meta_dentry->d_inode->i_size; /* append */
++ old_fs = get_fs();
++ set_fs(KERNEL_DS);
++
++ /* here we go... */
++ list_for_each(tmp, &inode_info->deleted_list) {
++ del_entry = list_entry(tmp, struct deleted_entry, list);
++
++ /* size: len for name, 1 for \n and 2 for "D " */
++ buf = (char *) kmalloc(del_entry->len+3, GFP_KERNEL);
++ if (!buf) {
++ printk(KERN_CRIT "mini_fo: meta_sync_d_list: \
++ out of mem.\n");
++ return -ENOMEM;
++ }
++
++ buf[0] = 'D';
++ buf[1] = ' ';
++ strncpy(buf+2, del_entry->name, del_entry->len);
++ buf[del_entry->len+2] = '\n';
++ bytes = meta_file->f_op->write(meta_file, buf,
++ del_entry->len+3,
++ &meta_file->f_pos);
++ if(bytes != del_entry->len+3) {
++ printk(KERN_CRIT "mini_fo: meta_sync_d_list: \
++ ERROR writing.\n");
++ err |= -1;
++ }
++ kfree(buf);
++ }
++ set_fs(old_fs);
++
++ out_err_close:
++ fput(meta_file);
++ out:
++ return err;
++
++}
++
++int meta_sync_r_list(dentry_t *dentry, int app_flag)
++{
++ dentry_t *meta_dentry;
++ file_t *meta_file;
++ mm_segment_t old_fs;
++
++ int bytes, err, buf_len;
++ struct vfsmount *meta_mnt;
++ char *buf;
++
++ struct list_head *tmp;
++ struct renamed_entry *ren_entry;
++ struct mini_fo_inode_info *inode_info;
++
++ err = 0;
++ meta_file=0;
++ meta_mnt=0;
++
++ if(!dentry || !dentry->d_inode) {
++ printk(KERN_CRIT "mini_fo: meta_sync_r_list: \
++ invalid dentry passed.\n");
++ err = -1;
++ goto out;
++ }
++ inode_info = itopd(dentry->d_inode);
++
++ if(inode_info->deleted_list_size < 0) {
++ err = -1;
++ goto out;
++ }
++
++ /* ok, there is something to sync */
++
++ /* build the storage structure? */
++ if(!dtohd2(dentry) && !itohi2(dentry->d_inode)) {
++ err = build_sto_structure(dentry->d_parent, dentry);
++ if(err) {
++ printk(KERN_CRIT "mini_fo: meta_sync_r_list: \
++ build_sto_structure failed.\n");
++ goto out;
++ }
++ }
++ meta_dentry = lookup_one_len(META_FILENAME,
++ dtohd2(dentry),
++ strlen(META_FILENAME));
++ if(!meta_dentry->d_inode) {
++ /* We need to create a META-file */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ vfs_create(dtohd2(dentry)->d_inode,
++ meta_dentry, S_IRUSR | S_IWUSR, NULL);
++#else
++ vfs_create(dtohd2(dentry)->d_inode,
++ meta_dentry, S_IRUSR | S_IWUSR);
++#endif
++ app_flag = 0;
++ }
++ /* need we truncate the meta file? */
++ if(!app_flag) {
++ struct iattr newattrs;
++ newattrs.ia_size = 0;
++ newattrs.ia_valid = ATTR_SIZE | ATTR_CTIME;
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_lock(&meta_dentry->d_inode->i_mutex);
++#else
++ down(&meta_dentry->d_inode->i_sem);
++#endif
++ err = notify_change(meta_dentry, &newattrs);
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_unlock(&meta_dentry->d_inode->i_mutex);
++#else
++ up(&meta_dentry->d_inode->i_sem);
++#endif
++ if(err || meta_dentry->d_inode->i_size != 0) {
++ printk(KERN_CRIT "mini_fo: meta_sync_r_list: \
++ ERROR truncating meta file.\n");
++ goto out_err_close;
++ }
++ }
++
++ /* open META-file for writing */
++ meta_file = dentry_open(meta_dentry, meta_mnt, 0x1);
++ if(!meta_file || IS_ERR(meta_file)) {
++ printk(KERN_CRIT "mini_fo: meta_sync_r_list: \
++ ERROR opening meta file.\n");
++ /* we don't mntget so we dont't mntput (for now)
++ * mntput(meta_mnt);
++ */
++ dput(meta_dentry);
++ err = -1;
++ goto out;
++ }
++
++ /* check if fs supports writing */
++ if(!meta_file->f_op->write) {
++ printk(KERN_CRIT "mini_fo: meta_sync_r_list: \
++ ERROR, fs does not support writing.\n");
++ goto out_err_close;
++ }
++
++ meta_file->f_pos = meta_dentry->d_inode->i_size; /* append */
++ old_fs = get_fs();
++ set_fs(KERNEL_DS);
++
++ /* here we go... */
++ list_for_each(tmp, &inode_info->renamed_list) {
++ ren_entry = list_entry(tmp, struct renamed_entry, list);
++ /* size:
++ * 2 for "R ", old_len+new_len for names, 1 blank+1 \n */
++ buf_len = ren_entry->old_len + ren_entry->new_len + 4;
++ buf = (char *) kmalloc(buf_len, GFP_KERNEL);
++ if (!buf) {
++ printk(KERN_CRIT "mini_fo: meta_sync_r_list: \
++ out of mem.\n");
++ return -ENOMEM;
++ }
++ buf[0] = 'R';
++ buf[1] = ' ';
++ strncpy(buf + 2, ren_entry->old_name, ren_entry->old_len);
++ buf[ren_entry->old_len + 2] = ' ';
++ strncpy(buf + ren_entry->old_len + 3,
++ ren_entry->new_name, ren_entry->new_len);
++ buf[buf_len - 1] = '\n';
++ bytes = meta_file->f_op->write(meta_file, buf,
++ buf_len, &meta_file->f_pos);
++ if(bytes != buf_len) {
++ printk(KERN_CRIT "mini_fo: meta_sync_r_list: \
++ ERROR writing.\n");
++ err |= -1;
++ }
++ kfree(buf);
++ }
++ set_fs(old_fs);
++
++ out_err_close:
++ fput(meta_file);
++ out:
++ return err;
++}
++
++int meta_check_d_entry(dentry_t *dentry, const char *name, int len)
++{
++ if(!dentry || !dentry->d_inode)
++ printk(KERN_CRIT "mini_fo: meta_check_d_dentry: \
++ invalid dentry passed.\n");
++ return __meta_check_d_entry(dentry->d_inode, name, len);
++}
++
++int __meta_check_d_entry(inode_t *inode, const char *name, int len)
++{
++ struct list_head *tmp;
++ struct deleted_entry *del_entry;
++ struct mini_fo_inode_info *inode_info;
++
++ if(!inode || !itopd(inode))
++ printk(KERN_CRIT "mini_fo: __meta_check_d_dentry: \
++ invalid inode passed.\n");
++
++ inode_info = itopd(inode);
++
++ if(inode_info->deleted_list_size <= 0)
++ return 0;
++
++ list_for_each(tmp, &inode_info->deleted_list) {
++ del_entry = list_entry(tmp, struct deleted_entry, list);
++ if(del_entry->len != len)
++ continue;
++
++ if(!strncmp(del_entry->name, name, len))
++ return 1;
++ }
++ return 0;
++}
++
++/*
++ * check if file has been renamed and return path to orig. base dir.
++ * Implements no error return values so far, what of course sucks.
++ * String is null terminated.'
++ */
++char* meta_check_r_entry(dentry_t *dentry, const char *name, int len)
++{
++ if(!dentry || !dentry->d_inode) {
++ printk(KERN_CRIT "mini_fo: meta_check_r_dentry: \
++ invalid dentry passed.\n");
++ return NULL;
++ }
++ return __meta_check_r_entry(dentry->d_inode, name, len);
++}
++
++char* __meta_check_r_entry(inode_t *inode, const char *name, int len)
++{
++ struct list_head *tmp;
++ struct renamed_entry *ren_entry;
++ struct mini_fo_inode_info *inode_info;
++ char *old_path;
++
++ if(!inode || !itopd(inode)) {
++ printk(KERN_CRIT "mini_fo: meta_check_r_dentry: \
++ invalid inode passed.\n");
++ return NULL;
++ }
++ inode_info = itopd(inode);
++
++ if(inode_info->renamed_list_size <= 0)
++ return NULL;
++
++ list_for_each(tmp, &inode_info->renamed_list) {
++ ren_entry = list_entry(tmp, struct renamed_entry, list);
++ if(ren_entry->new_len != len)
++ continue;
++
++ if(!strncmp(ren_entry->new_name, name, len)) {
++ old_path = (char *)
++ kmalloc(ren_entry->old_len+1, GFP_KERNEL);
++ strncpy(old_path,
++ ren_entry->old_name,
++ ren_entry->old_len);
++ old_path[ren_entry->old_len]='\0';
++ return old_path;
++ }
++ }
++ return NULL;
++}
++
++/*
++ * This version only checks if entry exists and return:
++ * 1 if exists,
++ * 0 if not,
++ * -1 if error.
++ */
++int meta_is_r_entry(dentry_t *dentry, const char *name, int len)
++{
++ if(!dentry || !dentry->d_inode) {
++ printk(KERN_CRIT "mini_fo: meta_check_r_dentry [2]: \
++ invalid dentry passed.\n");
++ return -1;
++ }
++ return __meta_is_r_entry(dentry->d_inode, name, len);
++}
++
++int __meta_is_r_entry(inode_t *inode, const char *name, int len)
++{
++ struct list_head *tmp;
++ struct renamed_entry *ren_entry;
++ struct mini_fo_inode_info *inode_info;
++
++ if(!inode || !itopd(inode)) {
++ printk(KERN_CRIT "mini_fo: meta_check_r_dentry [2]: \
++ invalid inode passed.\n");
++ return -1;
++ }
++ inode_info = itopd(inode);
++
++ if(inode_info->renamed_list_size <= 0)
++ return -1;
++
++ list_for_each(tmp, &inode_info->renamed_list) {
++ ren_entry = list_entry(tmp, struct renamed_entry, list);
++ if(ren_entry->new_len != len)
++ continue;
++
++ if(!strncmp(ren_entry->new_name, name, len))
++ return 1;
++ }
++ return 0;
++}
++
+diff -urN linux-2.6.19.old/fs/mini_fo/mini_fo.h linux-2.6.19.dev/fs/mini_fo/mini_fo.h
+--- linux-2.6.19.old/fs/mini_fo/mini_fo.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/fs/mini_fo/mini_fo.h 2006-12-14 03:14:03.000000000 +0100
+@@ -0,0 +1,510 @@
++/*
++ * Copyright (c) 1997-2003 Erez Zadok
++ * Copyright (c) 2001-2003 Stony Brook University
++ *
++ * For specific licensing information, see the COPYING file distributed with
++ * this package, or get one from ftp://ftp.filesystems.org/pub/fist/COPYING.
++ *
++ * This Copyright notice must be kept intact and distributed with all
++ * fistgen sources INCLUDING sources generated by fistgen.
++ */
++/*
++ * Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++
++/*
++ * $Id$
++ */
++
++#ifndef __MINI_FO_H_
++#define __MINI_FO_H_
++
++#ifdef __KERNEL__
++
++/* META stuff */
++#define META_FILENAME "META_dAfFgHE39ktF3HD2sr"
++
++/* use xattrs? */
++#define XATTR
++
++/* File attributes that when changed, result in a file beeing copied to storage */
++#define COPY_FLAGS ATTR_MODE | ATTR_UID | ATTR_GID | ATTR_SIZE
++
++/*
++ * mini_fo filestates
++ */
++#define MODIFIED 1
++#define UNMODIFIED 2
++#define CREATED 3
++#define DEL_REWRITTEN 4
++#define DELETED 5
++#define NON_EXISTANT 6
++
++/* fist file systems superblock magic */
++# define MINI_FO_SUPER_MAGIC 0xf15f
++
++/*
++ * STRUCTURES:
++ */
++
++/* mini_fo inode data in memory */
++struct mini_fo_inode_info {
++ inode_t *wii_inode;
++ inode_t *wii_inode2; /* pointer to storage inode */
++
++ /* META-data lists */
++ /* deleted list, ex wol */
++ struct list_head deleted_list;
++ int deleted_list_size;
++
++ /* renamed list */
++ struct list_head renamed_list;
++ int renamed_list_size;
++
++ /* add other lists here ... */
++};
++
++/* mini_fo dentry data in memory */
++struct mini_fo_dentry_info {
++ dentry_t *wdi_dentry;
++ dentry_t *wdi_dentry2; /* pointer to storage dentry */
++ unsigned int state; /* state of the mini_fo dentry */
++};
++
++
++/* mini_fo super-block data in memory */
++struct mini_fo_sb_info {
++ super_block_t *wsi_sb, *wsi_sb2; /* mk: might point to the same sb */
++ struct vfsmount *hidden_mnt, *hidden_mnt2;
++ dentry_t *base_dir_dentry;
++ dentry_t *storage_dir_dentry;
++ ;
++};
++
++/* readdir_data, readdir helper struct */
++struct readdir_data {
++ struct list_head ndl_list; /* linked list head ptr */
++ int ndl_size; /* list size */
++ int sto_done; /* flag to show that the storage dir entries have
++ * all been read an now follow base entries */
++};
++
++/* file private data. */
++struct mini_fo_file_info {
++ struct file *wfi_file;
++ struct file *wfi_file2; /* pointer to storage file */
++ struct readdir_data rd;
++};
++
++/* struct ndl_entry */
++struct ndl_entry {
++ struct list_head list;
++ char *name;
++ int len;
++};
++
++/********************************
++ * META-data structures
++ ********************************/
++
++/* deleted entry */
++struct deleted_entry {
++ struct list_head list;
++ char *name;
++ int len;
++};
++
++/* renamed entry */
++struct renamed_entry {
++ struct list_head list;
++ char *old_name; /* old directory with full path */
++ int old_len; /* length of above string */
++ char *new_name; /* new directory name */
++ int new_len; /* length of above string */
++};
++
++/* attr_change entry */
++struct attr_change_entry {
++ struct list_head list;
++ char *name;
++ int len;
++};
++
++/* link entry */
++struct link_entry {
++ struct list_head list;
++ int links_moved;
++ int inum_base;
++ int inum_sto;
++ char *weird_name;
++ int weird_name_len;
++};
++
++
++/* Some other stuff required for mini_fo_filldir64, copied from
++ * fs/readdir.c
++ */
++
++#define ROUND_UP64(x) (((x)+sizeof(u64)-1) & ~(sizeof(u64)-1))
++#define NAME_OFFSET(de) ((int) ((de)->d_name - (char *) (de)))
++
++
++struct linux_dirent64 {
++ u64 d_ino;
++ s64 d_off;
++ unsigned short d_reclen;
++ unsigned char d_type;
++ char d_name[0];
++};
++
++
++struct getdents_callback64 {
++ struct linux_dirent64 * current_dir;
++ struct linux_dirent64 * previous;
++ int count;
++ int error;
++};
++
++struct linux_dirent {
++ unsigned long d_ino;
++ unsigned long d_off;
++ unsigned short d_reclen;
++ char d_name[1];
++};
++
++struct getdents_callback {
++ struct linux_dirent * current_dir;
++ struct linux_dirent * previous;
++ int count;
++ int error;
++};
++
++
++/*
++ * MACROS:
++ */
++
++/* file TO private_data */
++# define ftopd(file) ((struct mini_fo_file_info *)((file)->private_data))
++# define __ftopd(file) ((file)->private_data)
++/* file TO hidden_file */
++# define ftohf(file) ((ftopd(file))->wfi_file)
++# define ftohf2(file) ((ftopd(file))->wfi_file2)
++
++/* inode TO private_data */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
++# define itopd(ino) ((struct mini_fo_inode_info *)(ino)->i_private)
++# define __itopd(ino) ((ino)->i_private)
++#else
++# define itopd(ino) ((struct mini_fo_inode_info *)(ino)->u.generic_ip)
++# define __itopd(ino) ((ino)->u.generic_ip)
++#endif
++/* inode TO hidden_inode */
++# define itohi(ino) (itopd(ino)->wii_inode)
++# define itohi2(ino) (itopd(ino)->wii_inode2)
++
++/* superblock TO private_data */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++# define stopd(super) ((struct mini_fo_sb_info *)(super)->s_fs_info)
++# define __stopd(super) ((super)->s_fs_info)
++#else
++# define stopd(super) ((struct mini_fo_sb_info *)(super)->u.generic_sbp)
++# define __stopd(super) ((super)->u.generic_sbp)
++#endif
++
++/* unused? # define vfs2priv stopd */
++/* superblock TO hidden_superblock */
++
++# define stohs(super) (stopd(super)->wsi_sb)
++# define stohs2(super) (stopd(super)->wsi_sb2)
++
++/* dentry TO private_data */
++# define dtopd(dentry) ((struct mini_fo_dentry_info *)(dentry)->d_fsdata)
++# define __dtopd(dentry) ((dentry)->d_fsdata)
++/* dentry TO hidden_dentry */
++# define dtohd(dent) (dtopd(dent)->wdi_dentry)
++# define dtohd2(dent) (dtopd(dent)->wdi_dentry2)
++
++/* dentry to state */
++# define dtost(dent) (dtopd(dent)->state)
++# define sbt(sb) ((sb)->s_type->name)
++
++#define IS_WRITE_FLAG(flag) (flag & (O_RDWR | O_WRONLY | O_APPEND))
++#define IS_COPY_FLAG(flag) (flag & (COPY_FLAGS))
++
++/* macros to simplify non-SCA code */
++# define MALLOC_PAGE_POINTERS(hidden_pages, num_hidden_pages)
++# define MALLOC_PAGEDATA_POINTERS(hidden_pages_data, num_hidden_pages)
++# define FREE_PAGE_POINTERS(hidden_pages, num)
++# define FREE_PAGEDATA_POINTERS(hidden_pages_data, num)
++# define FOR_EACH_PAGE
++# define CURRENT_HIDDEN_PAGE hidden_page
++# define CURRENT_HIDDEN_PAGEDATA hidden_page_data
++# define CURRENT_HIDDEN_PAGEINDEX page->index
++
++/*
++ * EXTERNALS:
++ */
++extern struct file_operations mini_fo_main_fops;
++extern struct file_operations mini_fo_dir_fops;
++extern struct inode_operations mini_fo_main_iops;
++extern struct inode_operations mini_fo_dir_iops;
++extern struct inode_operations mini_fo_symlink_iops;
++extern struct super_operations mini_fo_sops;
++extern struct dentry_operations mini_fo_dops;
++extern struct vm_operations_struct mini_fo_shared_vmops;
++extern struct vm_operations_struct mini_fo_private_vmops;
++extern struct address_space_operations mini_fo_aops;
++
++#if 0 /* unused by mini_fo */
++extern int mini_fo_interpose(dentry_t *hidden_dentry, dentry_t *this_dentry, super_block_t *sb, int flag);
++#if defined(FIST_FILTER_DATA) || defined(FIST_FILTER_SCA)
++extern page_t *mini_fo_get1page(file_t *file, int index);
++extern int mini_fo_fill_zeros(file_t *file, page_t *page, unsigned from);
++# endif /* FIST_FILTER_DATA || FIST_FILTER_SCA */
++
++
++# define mini_fo_hidden_dentry(d) __mini_fo_hidden_dentry(__FILE__,__FUNCTION__,__LINE__,(d))
++# define mini_fo_hidden_sto_dentry(d) __mini_fo_hidden_sto_dentry(__FILE__,__FUNCTION__,__LINE__,(d))
++
++extern dentry_t *__mini_fo_hidden_dentry(char *file, char *func, int line, dentry_t *this_dentry);
++extern dentry_t *__mini_fo_hidden_sto_dentry(char *file, char *func, int line, dentry_t *this_dentry);
++
++extern int mini_fo_read_file(const char *filename, void *buf, int len);
++extern int mini_fo_write_file(const char *filename, void *buf, int len);
++extern dentry_t *fist_lookup(dentry_t *dir, const char *name, vnode_t **out, uid_t uid, gid_t gid);
++#endif /* unused by mini_fo */
++
++/* state transition functions */
++extern int nondir_unmod_to_mod(dentry_t *dentry, int cp_flag);
++extern int nondir_del_rew_to_del(dentry_t *dentry);
++extern int nondir_creat_to_del(dentry_t *dentry);
++extern int nondir_mod_to_del(dentry_t *dentry);
++extern int nondir_unmod_to_del(dentry_t *dentry);
++
++extern int dir_unmod_to_mod(dentry_t *dentry);
++
++/* rename specials */
++extern int rename_directory(inode_t *old_dir, dentry_t *old_dentry, inode_t *new_dir, dentry_t *new_dentry);
++extern int rename_nondir(inode_t *old_dir, dentry_t *old_dentry, inode_t *new_dir, dentry_t *new_dentry);
++
++/* misc stuff */
++extern int mini_fo_tri_interpose(dentry_t *hidden_dentry,
++ dentry_t *hidden_sto_dentry,
++ dentry_t *dentry,
++ super_block_t *sb, int flag);
++
++extern int mini_fo_cp_cont(dentry_t *tgt_dentry, struct vfsmount *tgt_mnt,
++ dentry_t *src_dentry, struct vfsmount *src_mnt);
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++extern int mini_fo_create(inode_t *dir, dentry_t *dentry, int mode, struct nameidata *nd);
++
++extern int create_sto_nod(dentry_t *dentry, int mode, dev_t dev);
++extern int create_sto_reg_file(dentry_t *dentry, int mode, struct nameidata *nd);
++#else
++extern int mini_fo_create(inode_t *dir, dentry_t *dentry, int mode);
++
++extern int create_sto_nod(dentry_t *dentry, int mode, int dev);
++extern int create_sto_reg_file(dentry_t *dentry, int mode);
++#endif
++
++extern int create_sto_dir(dentry_t *dentry, int mode);
++
++extern int exists_in_storage(dentry_t *dentry);
++extern int is_mini_fo_existant(dentry_t *dentry);
++extern int get_neg_sto_dentry(dentry_t *dentry);
++extern int build_sto_structure(dentry_t *dir, dentry_t *dentry);
++extern int get_mini_fo_bpath(dentry_t *dentry, char **bpath, int *bpath_len);
++extern dentry_t *bpath_walk(super_block_t *sb, char *bpath);
++extern int bpath_put(dentry_t *dentry);
++
++/* check_mini_fo types functions */
++extern int check_mini_fo_dentry(dentry_t *dentry);
++extern int check_mini_fo_file(file_t *file);
++extern int check_mini_fo_inode(inode_t *inode);
++
++/* General meta functions, can be called from outside of meta.c */
++extern int meta_build_lists(dentry_t *dentry);
++extern int meta_put_lists(dentry_t *dentry);
++extern int __meta_put_lists(inode_t *inode);
++
++extern int meta_add_d_entry(dentry_t *dentry, const char *name, int len);
++extern int meta_add_r_entry(dentry_t *dentry,
++ const char *old_name, int old_len,
++ const char *new_name, int new_len);
++
++extern int meta_remove_r_entry(dentry_t *dentry, const char *name, int len);
++
++extern int meta_check_d_entry(dentry_t *dentry, const char *name, int len);
++extern int __meta_check_d_entry(inode_t *inode, const char *name, int len);
++
++extern char* meta_check_r_entry(dentry_t *dentry, const char *name, int len);
++extern char* __meta_check_r_entry(inode_t *inode, const char *name, int len);
++extern int meta_is_r_entry(dentry_t *dentry, const char *name, int len);
++extern int __meta_is_r_entry(inode_t *inode, const char *name, int len);
++
++/* Specific meta functions, should be called only inside meta.c */
++extern int __meta_put_d_list(inode_t *inode);
++extern int __meta_put_r_list(inode_t *inode);
++
++extern int meta_list_add_d_entry(dentry_t *dentry,
++ const char *name, int len);
++extern int meta_list_add_r_entry(dentry_t *dentry,
++ const char *old_name, int old_len,
++ const char *new_name, int new_len);
++
++extern int meta_list_remove_r_entry(dentry_t *dentry,
++ const char *name, int len);
++
++extern int __meta_list_remove_r_entry(inode_t *inode,
++ const char *name, int len);
++
++extern int meta_write_d_entry(dentry_t *dentry, const char *name, int len);
++extern int meta_write_r_entry(dentry_t *dentry,
++ const char *old_name, int old_len,
++ const char *new_name, int new_len);
++
++extern int meta_sync_lists(dentry_t *dentry);
++extern int meta_sync_d_list(dentry_t *dentry, int app_flag);
++extern int meta_sync_r_list(dentry_t *dentry, int app_flag);
++
++/* ndl stuff */
++extern int ndl_add_entry(struct readdir_data *rd, const char *name, int len);
++extern void ndl_put_list(struct readdir_data *rd);
++extern int ndl_check_entry(struct readdir_data *rd,
++ const char *name, int len);
++
++
++# define copy_inode_size(dst, src) \
++ dst->i_size = src->i_size; \
++ dst->i_blocks = src->i_blocks;
++
++static inline void
++fist_copy_attr_atime(inode_t *dest, const inode_t *src)
++{
++ ASSERT(dest != NULL);
++ ASSERT(src != NULL);
++ dest->i_atime = src->i_atime;
++}
++static inline void
++fist_copy_attr_times(inode_t *dest, const inode_t *src)
++{
++ ASSERT(dest != NULL);
++ ASSERT(src != NULL);
++ dest->i_atime = src->i_atime;
++ dest->i_mtime = src->i_mtime;
++ dest->i_ctime = src->i_ctime;
++}
++static inline void
++fist_copy_attr_timesizes(inode_t *dest, const inode_t *src)
++{
++ ASSERT(dest != NULL);
++ ASSERT(src != NULL);
++ dest->i_atime = src->i_atime;
++ dest->i_mtime = src->i_mtime;
++ dest->i_ctime = src->i_ctime;
++ copy_inode_size(dest, src);
++}
++static inline void
++fist_copy_attr_all(inode_t *dest, const inode_t *src)
++{
++ ASSERT(dest != NULL);
++ ASSERT(src != NULL);
++ dest->i_mode = src->i_mode;
++ dest->i_nlink = src->i_nlink;
++ dest->i_uid = src->i_uid;
++ dest->i_gid = src->i_gid;
++ dest->i_rdev = src->i_rdev;
++ dest->i_atime = src->i_atime;
++ dest->i_mtime = src->i_mtime;
++ dest->i_ctime = src->i_ctime;
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
++ dest->i_blksize = src->i_blksize;
++#endif
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,12)
++ dest->i_blkbits = src->i_blkbits;
++# endif /* linux 2.4.12 and newer */
++ copy_inode_size(dest, src);
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
++ dest->i_attr_flags = src->i_attr_flags;
++#else
++ dest->i_flags = src->i_flags;
++#endif
++}
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++/* copied from linux/fs.h */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++static inline void double_lock(struct dentry *d1, struct dentry *d2)
++{
++ struct mutex *m1 = &d1->d_inode->i_mutex;
++ struct mutex *m2 = &d2->d_inode->i_mutex;
++ if (m1 != m2) {
++ if ((unsigned long) m1 < (unsigned long) m2) {
++ struct mutex *tmp = m2;
++ m2 = m1; m1 = tmp;
++ }
++ mutex_lock(m1);
++ }
++ mutex_lock(m2);
++}
++
++static inline void double_unlock(struct dentry *d1, struct dentry *d2)
++{
++ struct mutex *m1 = &d1->d_inode->i_mutex;
++ struct mutex *m2 = &d2->d_inode->i_mutex;
++ mutex_unlock(m1);
++ if (m1 != m2)
++ mutex_unlock(m2);
++ dput(d1);
++ dput(d2);
++}
++
++#else
++static inline void double_down(struct semaphore *s1, struct semaphore *s2)
++{
++ if (s1 != s2) {
++ if ((unsigned long) s1 < (unsigned long) s2) {
++ struct semaphore *tmp = s2;
++ s2 = s1; s1 = tmp;
++ }
++ down(s1);
++ }
++ down(s2);
++}
++
++static inline void double_up(struct semaphore *s1, struct semaphore *s2)
++{
++ up(s1);
++ if (s1 != s2)
++ up(s2);
++}
++
++static inline void double_lock(struct dentry *d1, struct dentry *d2)
++{
++ double_down(&d1->d_inode->i_sem, &d2->d_inode->i_sem);
++}
++
++static inline void double_unlock(struct dentry *d1, struct dentry *d2)
++{
++ double_up(&d1->d_inode->i_sem,&d2->d_inode->i_sem);
++ dput(d1);
++ dput(d2);
++}
++#endif /* if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16) */
++#endif /* if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) */
++#endif /* __KERNEL__ */
++
++/*
++ * Definitions for user and kernel code
++ */
++
++/* ioctls */
++
++#endif /* not __MINI_FO_H_ */
+diff -urN linux-2.6.19.old/fs/mini_fo/mini_fo-merge linux-2.6.19.dev/fs/mini_fo/mini_fo-merge
+--- linux-2.6.19.old/fs/mini_fo/mini_fo-merge 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/fs/mini_fo/mini_fo-merge 2006-12-14 03:14:03.000000000 +0100
+@@ -0,0 +1,180 @@
++#!/bin/bash
++#
++# Copyright (C) 2005 Markus Klotzbuecher <mk@creamnet.de>
++# This program is free software; you can redistribute it and/or
++# modify it under the terms of the GNU General Public License
++# as published by the Free Software Foundation; either version
++# 2 of the License, or (at your option) any later version.
++#
++
++BASE=
++STO=
++HELP=
++DRYRUN=
++VERBOSE=
++TMP="/tmp/"
++META_NAME="META_dAfFgHE39ktF3HD2sr"
++SKIP_DEL_LIST="skip-delete-list.mini_fo-merge"
++
++COMMAND=
++exec_command()
++{
++ if [ x$DRYRUN == "xset" ]; then
++ echo " would run: $COMMAND"
++ elif ! [ x$DRYRUN == "xset" ]; then
++ if [ x$VERBOSE == "xset" ]; then
++ echo " running: $COMMAND"
++ fi
++ eval $COMMAND
++ fi
++}
++
++usage()
++{
++cat <<EOF
++
++USAGE: $0 -b <base dir> -s <storage dir>
++Version 0.1
++
++This script merges the contents of a mini_fo storage file system back
++to the base file system.
++
++!!! Warning: This will modify the base filesystem and can destroy data
++ if used wrongly.
++
++Options:
++ -b <base dir>
++ the directory of the base file system.
++
++ -s <storage dir>
++ the directory of the storage file system.
++
++ -d dry run, will not change anything and print the commands that
++ would be executed.
++
++ -t tmp dir for storing temporary file. default: $TMP
++
++ -v show what operations are performed.
++
++ -h displays this message.
++
++EOF
++}
++
++# parse parameters
++while getopts hdvt:b:s: OPTS
++ do
++ case $OPTS in
++ h) HELP="set";;
++ d) DRYRUN="set";;
++ v) VERBOSE="set";;
++ b) BASE="$OPTARG";;
++ s) STO="$OPTARG";;
++ t) TMP="$OPTARG";;
++ ?) usage
++ exit 1;;
++ esac
++done
++
++if [ "x$HELP" == "xset" ]; then
++ usage
++ exit -1
++fi
++
++if ! [ -d "$BASE" ] || ! [ -d "$STO" ]; then
++ echo -e "$0:\n Error, -s and/or -b argument missing. type $0 -h for help."
++ exit -1;
++fi
++
++# get full paths
++pushd $STO; STO=`pwd`; popd
++pushd $BASE; BASE=`pwd`; popd
++TMP=${TMP%/}
++
++
++cat<<EOF
++###############################################################################
++# mini_fo-merge
++#
++# base dir: $BASE
++# storage dir: $STO
++# meta filename: $META_NAME
++# dry run: $DRYRUN
++# verbose: $VERBOSE
++# tmp files: $TMP
++###############################################################################
++
++EOF
++
++rm $TMP/$SKIP_DEL_LIST
++
++# first process all renamed dirs
++echo "Merging renamed directories..."
++pushd $STO &> /dev/null
++find . -name $META_NAME -type f -print0 | xargs -0 -e grep -e '^R ' | tr -s ':R' ' ' | while read ENTRY; do
++ echo "entry: $ENTRY"
++ META_FILE=`echo $ENTRY | cut -d ' ' -f 1`
++ OLD_B_DIR=`echo $ENTRY | cut -d ' ' -f 2 | sed -e 's/\///'`
++ NEW_NAME=`echo $ENTRY | cut -d ' ' -f 3`
++ NEW_B_DIR=`echo $META_FILE | sed -e "s/$META_NAME/$NEW_NAME/" | sed -e 's/^\.\///'`
++ echo "META_FILE: $META_FILE"
++ echo "OLD_B_DIR: $OLD_B_DIR"
++ echo "NEW_NAME: $NEW_NAME"
++ echo "NEW_B_DIR: $NEW_B_DIR"
++
++ pushd $BASE &> /dev/null
++ # remove an existing dir in storage
++ COMMAND="rm -rf $NEW_B_DIR"; exec_command
++ COMMAND="cp -R $OLD_B_DIR $NEW_B_DIR"; exec_command
++ echo ""
++ popd &> /dev/null
++
++ # remember this dir to exclude it from deleting later
++ echo $NEW_B_DIR >> $TMP/$SKIP_DEL_LIST
++done
++
++# delete all whiteouted files from base
++echo -e "\nDeleting whiteout'ed files from base file system..."
++find . -name $META_NAME -type f -print0 | xargs -0 -e grep -e '^D ' | sed -e 's/:D//' | while read ENTRY; do
++ META_FILE=`echo $ENTRY | cut -d ' ' -f 1`
++ DEL_NAME=`echo $ENTRY | cut -d ' ' -f 2`
++ DEL_FILE=`echo $META_FILE | sed -e "s/$META_NAME/$DEL_NAME/" | sed -e 's/^\.\///'`
++ grep -x $DEL_FILE $TMP/$SKIP_DEL_LIST &> /dev/null
++ if [ $? -ne 0 ]; then
++ pushd $BASE &> /dev/null
++ COMMAND="rm -rf $DEL_FILE"; exec_command
++ popd &> /dev/null
++ else
++ echo " excluding: $DEL_FILE as in skip-del-list."
++ fi
++done
++
++# create all dirs and update permissions
++echo -e "\nSetting up directory structures in base file system..."
++find . -type d | sed -e 's/^\.\///' | while read DIR; do
++ PERMS=`stat -c %a $DIR`
++ DIR_UID=`stat -c %u $DIR`
++ DIR_GID=`stat -c %g $DIR`
++ pushd $BASE &> /dev/null
++ if ! [ -d $DIR ]; then
++ COMMAND="mkdir -p $DIR"; exec_command
++ fi
++ COMMAND="chmod $PERMS $DIR"; exec_command
++ COMMAND="chown $DIR_UID:$DIR_GID $DIR"; exec_command
++ popd &> /dev/null
++done
++
++# merge all non-directory files
++echo -e "\nMerging all non-directory files...."
++for i in b c p f l s; do
++ find . -type $i | sed -e 's/^\.\///' | grep -v "$META_NAME" | while read FILE; do
++ pushd $BASE #&> /dev/null
++ COMMAND="cp -df $STO/$FILE $BASE/$FILE"; exec_command
++ popd &> /dev/null
++ done
++done
++popd &> /dev/null
++
++#rm $TMP/$SKIP_DEL_LIST
++
++echo "Done!"
+diff -urN linux-2.6.19.old/fs/mini_fo/mini_fo-overlay linux-2.6.19.dev/fs/mini_fo/mini_fo-overlay
+--- linux-2.6.19.old/fs/mini_fo/mini_fo-overlay 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/fs/mini_fo/mini_fo-overlay 2006-12-14 03:14:03.000000000 +0100
+@@ -0,0 +1,130 @@
++#!/bin/bash
++#
++# Copyright (C) 2005 Markus Klotzbuecher <mk@creamnet.de>
++# This program is free software; you can redistribute it and/or
++# modify it under the terms of the GNU General Public License
++# as published by the Free Software Foundation; either version
++# 2 of the License, or (at your option) any later version.
++#
++
++HELP=
++SUFF=
++MNTP=
++MNT_DIR="/mnt"
++STO=
++STO_DIR="/tmp"
++BASE=
++
++usage()
++{
++cat <<EOF
++
++Usage: $0 [-s suffix] [-d sto_dir_dir] [-m mount point] base_dir
++Version 0.1
++
++This script overlays the given base directory using the mini_fo file
++system. If only the base directory base_dir is given, $0
++will use a storage directory called "sto-<base_dir_name>" in $STO_DIR,
++and mount point "mini_fo-<base_dir_dir>" in $MNT_DIR.
++
++Options:
++ -s <suffix>
++ add given suffix to storage directory and the mount
++ point. This is usefull for overlaying one base directory
++ several times and avoiding conflicts with storage directory
++ names and mount points.
++
++ -d <sto_dir_dir>
++ change the directory in which the storage directory will be
++ created (default is currently "$STO_DIR".
++
++ -m <mount point>
++ use an alternative directory to create the mini_fo
++ mountpoint (default is currently "$MNT_DIR".
++
++ -h displays this message.
++
++EOF
++exit 1;
++}
++
++while getopts hm:s:d: OPTS
++ do
++ case $OPTS in
++ s) SUFF="$OPTARG";;
++ d) STO_DIR="$OPTARG";;
++ m) MNT_DIR="$OPTARG";;
++ h) HELP="set";;
++ ?) usage
++ exit 1;;
++ esac
++done
++shift $(($OPTIND - 1))
++
++BASE="$1"
++
++if [ "x$HELP" == "xset" ]; then
++ usage
++ exit -1
++fi
++
++# fix suffix
++if [ "x$SUFF" != "x" ]; then
++ SUFF="-$SUFF"
++fi
++
++# kill trailing slashes
++MNT_DIR=${MNT_DIR%/}
++STO_DIR=${STO_DIR%/}
++BASE=${BASE%/}
++
++
++if ! [ -d "$BASE" ]; then
++ echo "invalid base dir $BASE, run $0 -h for help."
++ exit -1
++fi
++
++# check opts
++if ! [ -d "$MNT_DIR" ]; then
++ echo "invalid mount dir $MNT_DIR, run $0 -h for help."
++ exit -1
++fi
++
++if ! [ -d "$STO_DIR" ]; then
++ echo "invalid sto_dir_dir $STO_DIR, run $0 -h for help."
++ exit -1
++fi
++
++MNTP="$MNT_DIR/mini_fo-`basename $BASE`$SUFF"
++STO="$STO_DIR/sto-`basename $BASE`$SUFF"
++
++# create the mount point if it doesn't exist
++mkdir -p $MNTP
++if [ $? -ne 0 ]; then
++ echo "Error, failed to create mount point $MNTP"
++fi
++
++mkdir -p $STO
++if [ $? -ne 0 ]; then
++ echo "Error, failed to create storage dir $STO"
++fi
++
++# check if fs is already mounted
++mount | grep mini_fo | grep $MNTP &> /dev/null
++if [ $? -eq 0 ]; then
++ echo "Error, existing mini_fo mount at $MNTP."
++ exit -1
++fi
++
++mount | grep mini_fo | grep $STO &> /dev/null
++if [ $? -eq 0 ]; then
++ echo "Error, $STO seems to be used already."
++ exit -1
++fi
++
++# mount
++mount -t mini_fo -o base=$BASE,sto=$STO $BASE $MNTP
++
++if [ $? -ne 0 ]; then
++ echo "Error, mounting failed, maybe no permisson to mount?"
++fi
+diff -urN linux-2.6.19.old/fs/mini_fo/mmap.c linux-2.6.19.dev/fs/mini_fo/mmap.c
+--- linux-2.6.19.old/fs/mini_fo/mmap.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/fs/mini_fo/mmap.c 2006-12-14 03:14:03.000000000 +0100
+@@ -0,0 +1,637 @@
++/*
++ * Copyright (c) 1997-2003 Erez Zadok
++ * Copyright (c) 2001-2003 Stony Brook University
++ *
++ * For specific licensing information, see the COPYING file distributed with
++ * this package, or get one from ftp://ftp.filesystems.org/pub/fist/COPYING.
++ *
++ * This Copyright notice must be kept intact and distributed with all
++ * fistgen sources INCLUDING sources generated by fistgen.
++ */
++/*
++ * Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++
++/*
++ * $Id$
++ */
++
++#ifdef HAVE_CONFIG_H
++# include <config.h>
++#endif /* HAVE_CONFIG_H */
++
++#include "fist.h"
++#include "mini_fo.h"
++
++
++#ifdef FIST_COUNT_WRITES
++/* for counting writes in the middle vs. regular writes */
++unsigned long count_writes = 0, count_writes_middle = 0;
++#endif /* FIST_COUNT_WRITES */
++
++/* forward declaration of commit write and prepare write */
++STATIC int mini_fo_commit_write(file_t *file, page_t *page, unsigned from, unsigned to);
++STATIC int mini_fo_prepare_write(file_t *file, page_t *page, unsigned from, unsigned to);
++
++
++/*
++ * Function for handling creation of holes when lseek-ing past the
++ * end of the file and then writing some data.
++ */
++int
++mini_fo_fill_zeros(file_t* file, page_t *page, unsigned from)
++{
++ int err = 0;
++ dentry_t *dentry = file->f_dentry;
++ inode_t *inode = dentry->d_inode;
++ page_t *tmp_page;
++ int index;
++
++ print_entry_location();
++
++ for (index = inode->i_size >> PAGE_CACHE_SHIFT; index < page->index; index++) {
++ tmp_page = mini_fo_get1page(file, index);
++ if (IS_ERR(tmp_page)) {
++ err = PTR_ERR(tmp_page);
++ goto out;
++ }
++
++ /*
++ * zero out rest of the contents of the page between the appropriate
++ * offsets.
++ */
++ memset((char*)page_address(tmp_page) + (inode->i_size & ~PAGE_CACHE_MASK), 0, PAGE_CACHE_SIZE - (inode->i_size & ~PAGE_CACHE_MASK));
++
++ if (! (err = mini_fo_prepare_write(file, tmp_page, 0, PAGE_CACHE_SIZE)))
++ err = mini_fo_commit_write(file, tmp_page, 0, PAGE_CACHE_SIZE);
++
++ page_cache_release(tmp_page);
++ if (err < 0)
++ goto out;
++ if (current->need_resched)
++ schedule();
++ }
++
++ /* zero out appropriate parts of last page */
++
++ /*
++ * if the encoding type is block, then adjust the 'from' (where the
++ * zeroing will start) offset appropriately
++ */
++ from = from & (~(FIST_ENCODING_BLOCKSIZE - 1));
++
++ if ((from - (inode->i_size & ~PAGE_CACHE_MASK)) > 0) {
++
++ memset((char*)page_address(page) + (inode->i_size & ~PAGE_CACHE_MASK), 0, from - (inode->i_size & ~PAGE_CACHE_MASK));
++ if (! (err = mini_fo_prepare_write(file, page, 0, PAGE_CACHE_SIZE)))
++ err = mini_fo_commit_write(file, page, 0, PAGE_CACHE_SIZE);
++
++ if (err < 0)
++ goto out;
++ if (current->need_resched)
++ schedule();
++ }
++
++ out:
++ print_exit_status(err);
++ return err;
++}
++
++
++
++STATIC int
++mini_fo_writepage(page_t *page)
++{
++ int err = -EIO;
++ inode_t *inode;
++ inode_t *hidden_inode;
++ page_t *hidden_page;
++ char *kaddr, *hidden_kaddr;
++
++ print_entry_location();
++
++ inode = page->mapping->host;
++ hidden_inode = itohi(inode);
++
++ /*
++ * writepage is called when shared mmap'ed files need to write
++ * their pages, while prepare/commit_write are called from the
++ * non-paged write() interface. (However, in 2.3 the two interfaces
++ * share the same cache, while in 2.2 they didn't.)
++ *
++ * So we pretty much have to duplicate much of what commit_write does.
++ */
++
++ /* find lower page (returns a locked page) */
++ hidden_page = grab_cache_page(hidden_inode->i_mapping, page->index);
++ if (!hidden_page)
++ goto out;
++
++ /* get page address, and encode it */
++ kaddr = (char *) kmap(page);
++ hidden_kaddr = (char*) kmap(hidden_page);
++ mini_fo_encode_block(kaddr, hidden_kaddr, PAGE_CACHE_SIZE, inode, inode->i_sb, page->index);
++ /* if encode_block could fail, then return error */
++ kunmap(page);
++ kunmap(hidden_page);
++
++ /* call lower writepage (expects locked page) */
++ err = hidden_inode->i_mapping->a_ops->writepage(hidden_page);
++
++ /*
++ * update mtime and ctime of lower level file system
++ * mini_fo' mtime and ctime are updated by generic_file_write
++ */
++ hidden_inode->i_mtime = hidden_inode->i_ctime = CURRENT_TIME;
++
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,1)
++ UnlockPage(hidden_page); /* b/c grab_cache_page locked it */
++# endif /* kernel older than 2.4.1 */
++ page_cache_release(hidden_page); /* b/c grab_cache_page increased refcnt */
++
++ if (err)
++ ClearPageUptodate(page);
++ else
++ SetPageUptodate(page);
++ out:
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,1)
++ UnlockPage(page);
++# endif /* kernel 2.4.1 and newer */
++ print_exit_status(err);
++ return err;
++}
++
++
++/*
++ * get one page from cache or lower f/s, return error otherwise.
++ * returns unlocked, up-to-date page (if ok), with increased refcnt.
++ */
++page_t *
++mini_fo_get1page(file_t *file, int index)
++{
++ page_t *page;
++ dentry_t *dentry;
++ inode_t *inode;
++ struct address_space *mapping;
++ int err;
++
++ print_entry_location();
++
++ dentry = file->f_dentry; /* CPW: Moved below print_entry_location */
++ inode = dentry->d_inode;
++ mapping = inode->i_mapping;
++
++ fist_dprint(8, "%s: read page index %d pid %d\n", __FUNCTION__, index, current->pid);
++ if (index < 0) {
++ printk("%s BUG: index=%d\n", __FUNCTION__, index);
++ page = ERR_PTR(-EIO);
++ goto out;
++ }
++ page = read_cache_page(mapping,
++ index,
++ (filler_t *) mapping->a_ops->readpage,
++ (void *) file);
++ if (IS_ERR(page))
++ goto out;
++ wait_on_page(page);
++ if (!Page_Uptodate(page)) {
++ lock_page(page);
++ err = mapping->a_ops->readpage(file, page);
++ if (err) {
++ page = ERR_PTR(err);
++ goto out;
++ }
++ wait_on_page(page);
++ if (!Page_Uptodate(page)) {
++ page = ERR_PTR(-EIO);
++ goto out;
++ }
++ }
++
++ out:
++ print_exit_pointer(page);
++ return page;
++}
++
++
++/*
++ * get one page from cache or lower f/s, return error otherwise.
++ * similar to get1page, but doesn't guarantee that it will return
++ * an unlocked page.
++ */
++page_t *
++mini_fo_get1page_cached(file_t *file, int index)
++{
++ page_t *page;
++ dentry_t *dentry;
++ inode_t *inode;
++ struct address_space *mapping;
++ int err;
++
++ print_entry_location();
++
++ dentry = file->f_dentry; /* CPW: Moved below print_entry_location */
++ inode = dentry->d_inode;
++ mapping = inode->i_mapping;
++
++ fist_dprint(8, "%s: read page index %d pid %d\n", __FUNCTION__, index, current->pid);
++ if (index < 0) {
++ printk("%s BUG: index=%d\n", __FUNCTION__, index);
++ page = ERR_PTR(-EIO);
++ goto out;
++ }
++ page = read_cache_page(mapping,
++ index,
++ (filler_t *) mapping->a_ops->readpage,
++ (void *) file);
++ if (IS_ERR(page))
++ goto out;
++
++ out:
++ print_exit_pointer(page);
++ return page;
++}
++
++
++/*
++ * readpage is called from generic_page_read and the fault handler.
++ * If your file system uses generic_page_read for the read op, it
++ * must implement readpage.
++ *
++ * Readpage expects a locked page, and must unlock it.
++ */
++STATIC int
++mini_fo_do_readpage(file_t *file, page_t *page)
++{
++ int err = -EIO;
++ dentry_t *dentry;
++ file_t *hidden_file = NULL;
++ dentry_t *hidden_dentry;
++ inode_t *inode;
++ inode_t *hidden_inode;
++ char *page_data;
++ page_t *hidden_page;
++ char *hidden_page_data;
++ int real_size;
++
++ print_entry_location();
++
++ dentry = file->f_dentry; /* CPW: Moved below print_entry_location */
++ if (ftopd(file) != NULL)
++ hidden_file = ftohf(file);
++ hidden_dentry = dtohd(dentry);
++ inode = dentry->d_inode;
++ hidden_inode = itohi(inode);
++
++ fist_dprint(7, "%s: requesting page %d from file %s\n", __FUNCTION__, page->index, dentry->d_name.name);
++
++ MALLOC_PAGE_POINTERS(hidden_pages, num_hidden_pages);
++ MALLOC_PAGEDATA_POINTERS(hidden_pages_data, num_hidden_pages);
++ FOR_EACH_PAGE
++ CURRENT_HIDDEN_PAGE = NULL;
++
++ /* find lower page (returns a locked page) */
++ FOR_EACH_PAGE {
++ fist_dprint(8, "%s: Current page index = %d\n", __FUNCTION__, CURRENT_HIDDEN_PAGEINDEX);
++ CURRENT_HIDDEN_PAGE = read_cache_page(hidden_inode->i_mapping,
++ CURRENT_HIDDEN_PAGEINDEX,
++ (filler_t *) hidden_inode->i_mapping->a_ops->readpage,
++ (void *) hidden_file);
++ if (IS_ERR(CURRENT_HIDDEN_PAGE)) {
++ err = PTR_ERR(CURRENT_HIDDEN_PAGE);
++ CURRENT_HIDDEN_PAGE = NULL;
++ goto out_release;
++ }
++ }
++
++ /*
++ * wait for the page data to show up
++ * (signaled by readpage as unlocking the page)
++ */
++ FOR_EACH_PAGE {
++ wait_on_page(CURRENT_HIDDEN_PAGE);
++ if (!Page_Uptodate(CURRENT_HIDDEN_PAGE)) {
++ /*
++ * call readpage() again if we returned from wait_on_page with a
++ * page that's not up-to-date; that can happen when a partial
++ * page has a few buffers which are ok, but not the whole
++ * page.
++ */
++ lock_page(CURRENT_HIDDEN_PAGE);
++ err = hidden_inode->i_mapping->a_ops->readpage(hidden_file,
++ CURRENT_HIDDEN_PAGE);
++ if (err) {
++ CURRENT_HIDDEN_PAGE = NULL;
++ goto out_release;
++ }
++ wait_on_page(CURRENT_HIDDEN_PAGE);
++ if (!Page_Uptodate(CURRENT_HIDDEN_PAGE)) {
++ err = -EIO;
++ goto out_release;
++ }
++ }
++ }
++
++ /* map pages, get their addresses */
++ page_data = (char *) kmap(page);
++ FOR_EACH_PAGE
++ CURRENT_HIDDEN_PAGEDATA = (char *) kmap(CURRENT_HIDDEN_PAGE);
++
++ /* if decode_block could fail, then return error */
++ err = 0;
++ real_size = hidden_inode->i_size - (page->index << PAGE_CACHE_SHIFT);
++ if (real_size <= 0)
++ memset(page_data, 0, PAGE_CACHE_SIZE);
++ else if (real_size < PAGE_CACHE_SIZE) {
++ mini_fo_decode_block(hidden_page_data, page_data, real_size, inode, inode->i_sb, page->index);
++ memset(page_data + real_size, 0, PAGE_CACHE_SIZE - real_size);
++ } else
++ mini_fo_decode_block(hidden_page_data, page_data, PAGE_CACHE_SIZE, inode, inode->i_sb, page->index);
++
++ FOR_EACH_PAGE
++ kunmap(CURRENT_HIDDEN_PAGE);
++ kunmap(page);
++
++ out_release:
++ FOR_EACH_PAGE
++ if (CURRENT_HIDDEN_PAGE)
++ page_cache_release(CURRENT_HIDDEN_PAGE); /* undo read_cache_page */
++
++ FREE_PAGE_POINTERS(hidden_pages, num_hidden_pages);
++ FREE_PAGEDATA_POINTERS(hidden_pages_data, num_hidden_pages);
++
++ out:
++ if (err == 0)
++ SetPageUptodate(page);
++ else
++ ClearPageUptodate(page);
++
++ print_exit_status(err);
++ return err;
++}
++
++
++STATIC int
++mini_fo_readpage(file_t *file, page_t *page)
++{
++ int err;
++ print_entry_location();
++
++ err = mini_fo_do_readpage(file, page);
++
++ /*
++ * we have to unlock our page, b/c we _might_ have gotten a locked page.
++ * but we no longer have to wakeup on our page here, b/c UnlockPage does
++ * it
++ */
++ UnlockPage(page);
++
++ print_exit_status(err);
++ return err;
++}
++
++
++STATIC int
++mini_fo_prepare_write(file_t *file, page_t *page, unsigned from, unsigned to)
++{
++ int err = 0;
++
++ print_entry_location();
++
++ /*
++ * we call kmap(page) only here, and do the kunmap
++ * and the actual downcalls, including unlockpage and uncache
++ * in commit_write.
++ */
++ kmap(page);
++
++ /* fast path for whole page writes */
++ if (from == 0 && to == PAGE_CACHE_SIZE)
++ goto out;
++ /* read the page to "revalidate" our data */
++ /* call the helper function which doesn't unlock the page */
++ if (!Page_Uptodate(page))
++ err = mini_fo_do_readpage(file, page);
++
++ out:
++ print_exit_status(err);
++ return err;
++}
++
++
++
++STATIC int
++mini_fo_commit_write(file_t *file, page_t *page, unsigned from, unsigned to)
++{
++ int err = -ENOMEM;
++ inode_t *inode;
++ inode_t *hidden_inode;
++ page_t *hidden_page;
++ file_t *hidden_file = NULL;
++ loff_t pos;
++ unsigned bytes = to - from;
++ unsigned hidden_from, hidden_to, hidden_bytes;
++
++ print_entry_location();
++
++ inode = page->mapping->host; /* CPW: Moved below print_entry_location */
++ hidden_inode = itohi(inode);
++
++ ASSERT(file != NULL);
++ /*
++ * here we have a kmapped page, with data from the user copied
++ * into it. we need to encode_block it, and then call the lower
++ * commit_write. We also need to simulate same behavior of
++ * generic_file_write, and call prepare_write on the lower f/s first.
++ */
++#ifdef FIST_COUNT_WRITES
++ count_writes++;
++# endif /* FIST_COUNT_WRITES */
++
++ /* this is append and/or extend -- we can't have holes so fill them in */
++ if (page->index > (hidden_inode->i_size >> PAGE_CACHE_SHIFT)) {
++ page_t *tmp_page;
++ int index;
++ for (index = hidden_inode->i_size >> PAGE_CACHE_SHIFT; index < page->index; index++) {
++ tmp_page = mini_fo_get1page(file, index);
++ if (IS_ERR(tmp_page)) {
++ err = PTR_ERR(tmp_page);
++ goto out;
++ }
++ /* zero out the contents of the page at the appropriate offsets */
++ memset((char*)page_address(tmp_page) + (inode->i_size & ~PAGE_CACHE_MASK), 0, PAGE_CACHE_SIZE - (inode->i_size & ~PAGE_CACHE_MASK));
++ if (!(err = mini_fo_prepare_write(file, tmp_page, 0, PAGE_CACHE_SIZE)))
++ err = mini_fo_commit_write(file, tmp_page, 0, PAGE_CACHE_SIZE);
++ page_cache_release(tmp_page);
++ if (err < 0)
++ goto out;
++ if (current->need_resched)
++ schedule();
++ }
++ }
++
++ if (ftopd(file) != NULL)
++ hidden_file = ftohf(file);
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_lock(&hidden_inode->i_mutex);
++#else
++ down(&hidden_inode->i_sem);
++#endif
++ /* find lower page (returns a locked page) */
++ hidden_page = grab_cache_page(hidden_inode->i_mapping, page->index);
++ if (!hidden_page)
++ goto out;
++
++#if FIST_ENCODING_BLOCKSIZE > 1
++# error encoding_blocksize greater than 1 is not yet supported
++# endif /* FIST_ENCODING_BLOCKSIZE > 1 */
++
++ hidden_from = from & (~(FIST_ENCODING_BLOCKSIZE - 1));
++ hidden_to = ((to + FIST_ENCODING_BLOCKSIZE - 1) & (~(FIST_ENCODING_BLOCKSIZE - 1)));
++ if ((page->index << PAGE_CACHE_SHIFT) + to > hidden_inode->i_size) {
++
++ /*
++ * if this call to commit_write had introduced holes and the code
++ * for handling holes was invoked, then the beginning of this page
++ * must be zeroed out
++ * zero out bytes from 'size_of_file%pagesize' to 'from'.
++ */
++ if ((hidden_from - (inode->i_size & ~PAGE_CACHE_MASK)) > 0)
++ memset((char*)page_address(page) + (inode->i_size & ~PAGE_CACHE_MASK), 0, hidden_from - (inode->i_size & ~PAGE_CACHE_MASK));
++
++ }
++ hidden_bytes = hidden_to - hidden_from;
++
++ /* call lower prepare_write */
++ err = -EINVAL;
++ if (hidden_inode->i_mapping &&
++ hidden_inode->i_mapping->a_ops &&
++ hidden_inode->i_mapping->a_ops->prepare_write)
++ err = hidden_inode->i_mapping->a_ops->prepare_write(hidden_file,
++ hidden_page,
++ hidden_from,
++ hidden_to);
++ if (err)
++ /* don't leave locked pages behind, esp. on an ENOSPC */
++ goto out_unlock;
++
++ fist_dprint(8, "%s: encoding %d bytes\n", __FUNCTION__, hidden_bytes);
++ mini_fo_encode_block((char *) page_address(page) + hidden_from, (char*) page_address(hidden_page) + hidden_from, hidden_bytes, inode, inode->i_sb, page->index);
++ /* if encode_block could fail, then goto unlock and return error */
++
++ /* call lower commit_write */
++ err = hidden_inode->i_mapping->a_ops->commit_write(hidden_file,
++ hidden_page,
++ hidden_from,
++ hidden_to);
++
++ if (err < 0)
++ goto out_unlock;
++
++ err = bytes; /* convert error to no. of bytes */
++
++ inode->i_blocks = hidden_inode->i_blocks;
++ /* we may have to update i_size */
++ pos = (page->index << PAGE_CACHE_SHIFT) + to;
++ if (pos > inode->i_size)
++ inode->i_size = pos;
++
++ /*
++ * update mtime and ctime of lower level file system
++ * mini_fo' mtime and ctime are updated by generic_file_write
++ */
++ hidden_inode->i_mtime = hidden_inode->i_ctime = CURRENT_TIME;
++
++ mark_inode_dirty_sync(inode);
++
++ out_unlock:
++ UnlockPage(hidden_page);
++ page_cache_release(hidden_page);
++ kunmap(page); /* kmap was done in prepare_write */
++ out:
++ /* we must set our page as up-to-date */
++ if (err < 0)
++ ClearPageUptodate(page);
++ else
++ SetPageUptodate(page);
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_unlock(&hidden_inode->i_mutex);
++#else
++ up(&hidden_inode->i_sem);
++#endif
++ print_exit_status(err);
++ return err; /* assume all is ok */
++}
++
++
++STATIC int
++mini_fo_bmap(struct address_space *mapping, long block)
++{
++ int err = 0;
++ inode_t *inode;
++ inode_t *hidden_inode;
++
++ print_entry_location();
++
++ inode = (inode_t *) mapping->host;
++ hidden_inode = itohi(inode);
++
++ if (hidden_inode->i_mapping->a_ops->bmap)
++ err = hidden_inode->i_mapping->a_ops->bmap(hidden_inode->i_mapping, block);
++ print_exit_location();
++ return err;
++}
++
++
++/*
++ * This function is copied verbatim from mm/filemap.c.
++ * XXX: It should be simply moved to some header file instead -- bug Al about it!
++ */
++static inline int sync_page(struct page *page)
++{
++ struct address_space *mapping = page->mapping;
++
++ if (mapping && mapping->a_ops && mapping->a_ops->sync_page)
++ return mapping->a_ops->sync_page(page);
++ return 0;
++}
++
++
++/*
++ * XXX: we may not need this function if not FIST_FILTER_DATA.
++ * FIXME: for FIST_FILTER_SCA, get all lower pages and sync them each.
++ */
++STATIC int
++mini_fo_sync_page(page_t *page)
++{
++ int err = 0;
++ inode_t *inode;
++ inode_t *hidden_inode;
++ page_t *hidden_page;
++
++ print_entry_location();
++
++ inode = page->mapping->host; /* CPW: Moved below print_entry_location */
++ hidden_inode = itohi(inode);
++
++ /* find lower page (returns a locked page) */
++ hidden_page = grab_cache_page(hidden_inode->i_mapping, page->index);
++ if (!hidden_page)
++ goto out;
++
++ err = sync_page(hidden_page);
++
++ UnlockPage(hidden_page); /* b/c grab_cache_page locked it */
++ page_cache_release(hidden_page); /* b/c grab_cache_page increased refcnt */
++
++ out:
++ print_exit_status(err);
++ return err;
++}
+diff -urN linux-2.6.19.old/fs/mini_fo/README linux-2.6.19.dev/fs/mini_fo/README
+--- linux-2.6.19.old/fs/mini_fo/README 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/fs/mini_fo/README 2006-12-14 03:14:03.000000000 +0100
+@@ -0,0 +1,163 @@
++README for the mini_fo overlay file system
++=========================================
++
++
++WHAT IS MINI_FO?
++----------------
++
++mini_fo is a virtual kernel file system that can make read-only
++file systems writable. This is done by redirecting modifying operations
++to a writeable location called "storage directory", and leaving the
++original data in the "base directory" untouched. When reading, the
++file system merges the modifed and original data so that only the
++newest versions will appear. This occurs transparently to the user,
++who can access the data like on any other read-write file system.
++
++Base and storage directories may be located on the same or on
++different partitions and may be of different file system types. While
++the storage directory obviously needs to be writable, the base may or
++may not be writable, what doesn't matter as it will no be modified
++anyway.
++
++
++WHAT IS GOOD FOR?
++-----------------
++
++The primary purpose of the mini_fo file system is to allow easy
++software updates to embedded systems, that often store their root
++file system in a read-only flash file system, but there are many
++more as for example sandboxing, or for allowing live-cds to
++permanently store information.
++
++
++BUILDING
++--------
++This should be simple. Adjust the Makefile to point to the correct
++kernel headers you want to build the module for. Then:
++
++ # make
++
++should build "mini_fo.o" for a 2.4 kernel or "mini_fo.ko" for a 2.6
++kernel.
++
++If you are building the module for you current kernel, you can install
++the module (as root):
++
++ # make install
++
++or uninstall with
++
++ # make uninstall
++
++
++USING THE FILE SYSTEM
++--------------------
++
++the general mount syntax is:
++
++ mount -t mini_fo -o base=<base directory>,sto=<storage directory>\
++ <base directory> <mount point>
++
++Example:
++
++You have mounted a cdrom to /mnt/cdrom and want to modifiy some files
++on it:
++
++load the module (as root)
++
++ # insmod mini_fo.o for a 2.4 kernel or
++
++ # insmod mini_fo.ko for a 2.6 kernel
++
++
++create a storage dir in tmp and a mountpoint for mini_fo:
++
++ # mkdir /tmp/sto
++ # mkdir /mnt/mini_fo
++
++and mount the mini_fo file system:
++
++ # mount -t mini_fo -o base=/mnt/cdrom,sto=/tmp/sto /mnt/cdrom /mnt/mini_fo
++
++
++Now the data stored on the cd can be accessed via the mini_fo
++mountpoint just like any read-write file system, files can be modified
++and deleted, new ones can be created and so on. When done unmount the
++file system:
++
++ # unmount /mnt/mini_fo
++
++Note that if the file system is mounted again using the same storage
++file system, of course it will appear in the modified state again. If
++you remount it using an new empty storage directory, it will be
++unmodified. Therefore by executing:
++
++ # cd /tmp/sto
++ # rm -rf *
++
++you can nuke all the changes you made to the original file system. But
++ remember NEVER do this while the mini_fo file system is mounted!
++
++
++Alternatively you can use the mini_fo-overlay bash script, that
++simplifies managing mini_fo mounts. See TOOLS Section.
++
++
++TOOLS
++-----
++
++mini_fo-merge (experimental):
++
++This is a bash script that will merge changes contained in the storage
++directory back to the base directory. This allows mini_fo to function
++as a cache file system by overlaying a slow (network, ...) file system
++and using a fast (ramdisk, ...) as storage. When done, changes can be
++merged back to the (slow) base with mini_fo-merge. See "mini_fo-merge
++-h" for details.
++
++It can be usefull for merging changes back after a successfull test
++(patches, software updates...)
++
++
++mini_fo-overlay:
++
++This bash script simplifies managing one or more mini_fo mounts. For
++overlaying a directory called "basedir1", you can just call:
++
++ # mini_fo-overlay basedir1
++
++This will mount mini_fo with "basedir1" as base, "/tmp/sto-basedir1/"
++as storage to "/mnt/mini_fo-basedir1/". It has more options though,
++type "mini_fo-overlay -h" for details.
++
++
++DOCUMENTATION, REPORTING BUGS, GETTING HELP
++-------------------------------------------
++
++Please visit the mini_fo project page at:
++
++http://www.denx.de/twiki/bin/view/Know/MiniFOHome
++
++
++WARNINGS
++--------
++
++Never modify the base or the storage directorys while the mini_fo
++file system is mounted, or you might crash you system. Simply accessing
++and reading should not cause any trouble.
++
++Exporting a mini_fo mount point via NFS has not been tested, and may
++or may not work.
++
++Check the RELEASE_NOTES for details on bugs and features.
++
++
++
++Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
++
++This program is free software; you can redistribute it and/or
++modify it under the terms of the GNU General Public License
++as published by the Free Software Foundation; either version
++2 of the License, or (at your option) any later version.
++
++
+diff -urN linux-2.6.19.old/fs/mini_fo/RELEASE_NOTES linux-2.6.19.dev/fs/mini_fo/RELEASE_NOTES
+--- linux-2.6.19.old/fs/mini_fo/RELEASE_NOTES 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/fs/mini_fo/RELEASE_NOTES 2006-12-14 03:14:03.000000000 +0100
+@@ -0,0 +1,111 @@
++Release: mini_fo-0.6.1 (v0-6-1)
++Date: 21.09.2005
++
++
++Changes:
++--------
++v0-6-1:
++
++- bugfixes (see ChangeLog)
++
++- two helper scripts "mini_fo_merge" and "mini_fo_overlay" (see
++ README for details).
++
++v0-6-0:
++
++- Support for 2.4 and 2.6 (see Makefile)
++
++- Partial hard link support (creating works as expected, but already
++ existing links in the base file system will be treated as if they
++ were individual files).
++
++- Various bugfixes and cleanups.
++
++
++v0-6-0-pre1:
++
++- This is mini_fo-0-6-0-pre1! This release is a complete rewrite of
++ many vital mini_fo parts such as the old whiteout list code which
++ has been replaced by the new META subsystem.
++
++- Light weight directory renaming implemented. This means if a
++ directory is renamed via the mini_fo filesystem this will no longer
++ result in a complete copy in storage, instead only one empty
++ directory will be created. All base filed contained in the original
++ directory stay there until modified.
++
++- Special files (creating, renaming, deleting etc.) now working.
++
++- Many bugfixes and cleanup, mini_fo is now a lot more stable.
++
++
++v0-5-10:
++
++- Final release of the 0-5-* versions. Next will be a complete rewrite
++ of many features. This release contains several bugfixes related to
++ directory renaming.
++
++
++v0-5-10-pre6:
++
++- Lots of cleanup and several bugfixes related to directory deleting
++
++- Directory renaming suddenly works, what is most likely due to the
++ fact tha that "mv" is smart: if the classic rename doesn't work it
++ will assume that source and target file are on different fs and will
++ copy the directory and try to remove the source directory. Until
++ directory removing wasn't implemented, it would fail to do this and
++ rollback.
++ So, directory renaming works for now, but it doesn't yet do what you
++ would expect from a overlay fs, so use with care.
++
++
++v0-5-10-pre5:
++
++- implemented directory deleting
++- made parsing of mount options more stable
++- New format of mount options! (See README)
++- I can't reproduce the unknown panic with 2.4.25 anymore, so I'll
++ happily assume it never existed!
++
++
++Implemented features:
++---------------------
++
++- creating hard links (see BUGS on already existing hard links)
++- lightweight directory renaming
++- renaming device files, pipes, sockets, etc.
++- creating, renaming, deleting of special files
++- deleting directorys
++- general directory reading (simple "ls" )
++- creating files in existing directorys
++- creating directorys
++- renaming files.
++- reading and writing files (involves opening)
++- appending to files (creates copy in storage)
++- deleting files
++- llseek works too, what allows editors to work
++- persistency (a deleted file stay deleted over remounts)
++- use of symbolic links
++- creating of device files
++
++
++Not (yet) implemented features:
++-------------------------------
++
++- full hard link support.
++
++
++
++BUGS:
++-----
++
++Hard links in the base file system will be treated as individual
++files, not as links to one inode.
++
++The main problem with hard links isn't allowing to create them, but
++their pure existence. If you modify a base hard link, the changes made
++will only show up on this link, the other link will remain in the
++original state. I hope to fix this someday. Please note that this does
++not effect the special hard links '.' and '..', that are handled
++seperately by the lower fs.
+diff -urN linux-2.6.19.old/fs/mini_fo/state.c linux-2.6.19.dev/fs/mini_fo/state.c
+--- linux-2.6.19.old/fs/mini_fo/state.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/fs/mini_fo/state.c 2006-12-14 03:14:03.000000000 +0100
+@@ -0,0 +1,620 @@
++/*
++ * Copyright (C) 2005 Markus Klotzbuecher <mk@creamnet.de>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++
++#ifdef HAVE_CONFIG_H
++# include <config.h>
++#endif /* HAVE_CONFIG_H */
++
++#include "fist.h"
++#include "mini_fo.h"
++
++
++/* create the storage file, setup new states */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++int create_sto_reg_file(dentry_t *dentry, int mode, struct nameidata *nd)
++#else
++int create_sto_reg_file(dentry_t *dentry, int mode)
++#endif
++{
++ int err = 0;
++ inode_t *dir;
++ dentry_t *hidden_sto_dentry;
++ dentry_t *hidden_sto_dir_dentry;
++
++ if(exists_in_storage(dentry)) {
++ printk(KERN_CRIT "mini_fo: create_sto_file: wrong type or state.\n");
++ err = -EINVAL;
++ goto out;
++ }
++ err = get_neg_sto_dentry(dentry);
++
++ if (err) {
++ printk(KERN_CRIT "mini_fo: create_sto_file: ERROR getting neg. sto dentry.\n");
++ goto out;
++ }
++
++ dir = dentry->d_parent->d_inode;
++ hidden_sto_dentry = dtohd2(dentry);
++
++ /* lock parent */
++ hidden_sto_dir_dentry = dget(hidden_sto_dentry->d_parent);
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_lock(&hidden_sto_dir_dentry->d_inode->i_mutex);
++#else
++ down(&hidden_sto_dir_dentry->d_inode->i_sem);
++#endif
++
++ err = PTR_ERR(hidden_sto_dir_dentry);
++ if (IS_ERR(hidden_sto_dir_dentry))
++ goto out;
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ err = vfs_create(hidden_sto_dir_dentry->d_inode,
++ hidden_sto_dentry,
++ mode, nd);
++#else
++ err = vfs_create(hidden_sto_dir_dentry->d_inode,
++ hidden_sto_dentry,
++ mode);
++#endif
++ if(err) {
++ printk(KERN_CRIT "mini_fo: create_sto_file: ERROR creating sto file.\n");
++ goto out_lock;
++ }
++
++ if(!dtohd2(dentry)->d_inode) {
++ printk(KERN_CRIT "mini_fo: create_sto_file: ERROR creating sto file [2].\n");
++ err = -EINVAL;
++ goto out_lock;
++ }
++
++ /* interpose the new inode */
++ if(dtost(dentry) == DELETED) {
++ dtost(dentry) = DEL_REWRITTEN;
++ err = mini_fo_tri_interpose(NULL, hidden_sto_dentry, dentry, dir->i_sb, 0);
++ if(err)
++ goto out_lock;
++ }
++ else if(dtost(dentry) == NON_EXISTANT) {
++ dtost(dentry) = CREATED;
++ err = mini_fo_tri_interpose(dtohd(dentry), hidden_sto_dentry, dentry, dir->i_sb, 0);
++ if(err)
++ goto out_lock;
++ }
++ else if(dtost(dentry) == UNMODIFIED) {
++ dtost(dentry) = MODIFIED;
++ /* interpose on new inode */
++ if(itohi2(dentry->d_inode) != NULL) {
++ printk(KERN_CRIT "mini_fo: create_sto_file: invalid inode detected.\n");
++ err = -EINVAL;
++ goto out_lock;
++ }
++ itohi2(dentry->d_inode) = igrab(dtohd2(dentry)->d_inode);
++ }
++ fist_copy_attr_timesizes(dentry->d_parent->d_inode,
++ hidden_sto_dir_dentry->d_inode);
++
++ out_lock:
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
++#else
++ up(&hidden_sto_dir_dentry->d_inode->i_sem);
++#endif
++ dput(hidden_sto_dir_dentry);
++ out:
++ return err;
++}
++
++/* create the sto dir, setup states */
++int create_sto_dir(dentry_t *dentry, int mode)
++{
++ int err = 0;
++ inode_t *dir;
++ dentry_t *hidden_sto_dentry;
++ dentry_t *hidden_sto_dir_dentry;
++
++ /* had to take the "!S_ISDIR(mode))" check out, because it failed */
++ if(exists_in_storage(dentry)) {
++ printk(KERN_CRIT "mini_fo: create_sto_dir: wrong type or state.\\
++n");
++ err = -EINVAL;
++ goto out;
++ }
++
++ err = get_neg_sto_dentry(dentry);
++ if(err) {
++ err = -EINVAL;
++ goto out;
++ }
++
++ dir = dentry->d_parent->d_inode;
++ hidden_sto_dentry = dtohd2(dentry);
++
++ /* was: hidden_sto_dir_dentry = lock_parent(hidden_sto_dentry); */
++ hidden_sto_dir_dentry = dget(hidden_sto_dentry->d_parent);
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_lock(&hidden_sto_dir_dentry->d_inode->i_mutex);
++#else
++ down(&hidden_sto_dir_dentry->d_inode->i_sem);
++#endif
++
++ err = PTR_ERR(hidden_sto_dir_dentry);
++ if (IS_ERR(hidden_sto_dir_dentry))
++ goto out;
++
++ err = vfs_mkdir(hidden_sto_dir_dentry->d_inode,
++ hidden_sto_dentry,
++ mode);
++ if(err) {
++ printk(KERN_CRIT "mini_fo: create_sto_dir: ERROR creating sto dir.\n");
++ goto out_lock;
++ }
++
++ if(!dtohd2(dentry)->d_inode) {
++ printk(KERN_CRIT "mini_fo: create_sto_dir: ERROR creating sto dir [2].\n");
++ err = -EINVAL;
++ goto out_lock;
++ }
++
++ /* interpose the new inode */
++ if(dtost(dentry) == DELETED) {
++ dtost(dentry) = DEL_REWRITTEN;
++ err = mini_fo_tri_interpose(NULL, hidden_sto_dentry, dentry, dir->i_sb, 0);
++ if(err)
++ goto out_lock;
++ }
++ else if(dtopd(dentry)->state == NON_EXISTANT) {
++ dtopd(dentry)->state = CREATED;
++ err = mini_fo_tri_interpose(dtohd(dentry), hidden_sto_dentry, dentry, dir->i_sb, 0);
++ if(err)
++ goto out_lock;
++ }
++ else if(dtopd(dentry)->state == UNMODIFIED) {
++ dtopd(dentry)->state = MODIFIED;
++ /* interpose on new inode */
++ if(itohi2(dentry->d_inode) != NULL) {
++ printk(KERN_CRIT "mini_fo: create_sto_dir: ERROR, invalid inode detected.\n");
++ err = -EINVAL;
++ goto out_lock;
++ }
++ itohi2(dentry->d_inode) = igrab(dtohd2(dentry)->d_inode);
++ }
++
++ fist_copy_attr_timesizes(dir, hidden_sto_dir_dentry->d_inode);
++
++ /* initalize the wol list */
++ itopd(dentry->d_inode)->deleted_list_size = -1;
++ itopd(dentry->d_inode)->renamed_list_size = -1;
++ meta_build_lists(dentry);
++
++
++ out_lock:
++ /* was: unlock_dir(hidden_sto_dir_dentry); */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
++#else
++ up(&hidden_sto_dir_dentry->d_inode->i_sem);
++#endif
++ dput(hidden_sto_dir_dentry);
++ out:
++ return err;
++}
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++int create_sto_nod(dentry_t *dentry, int mode, dev_t dev)
++#else
++int create_sto_nod(dentry_t *dentry, int mode, int dev)
++#endif
++{
++ int err = 0;
++ inode_t *dir;
++ dentry_t *hidden_sto_dentry;
++ dentry_t *hidden_sto_dir_dentry;
++
++ if(exists_in_storage(dentry)) {
++ err = -EEXIST;
++ goto out;
++ }
++ err = get_neg_sto_dentry(dentry);
++
++ if (err) {
++ printk(KERN_CRIT "mini_fo: create_sto_nod: ERROR getting neg. sto dentry.\n");
++ goto out;
++ }
++
++ dir = dentry->d_parent->d_inode;
++ hidden_sto_dentry = dtohd2(dentry);
++
++ /* lock parent */
++ hidden_sto_dir_dentry = dget(hidden_sto_dentry->d_parent);
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_lock(&hidden_sto_dir_dentry->d_inode->i_mutex);
++#else
++ down(&hidden_sto_dir_dentry->d_inode->i_sem);
++#endif
++
++ err = PTR_ERR(hidden_sto_dir_dentry);
++ if (IS_ERR(hidden_sto_dir_dentry))
++ goto out;
++
++ err = vfs_mknod(hidden_sto_dir_dentry->d_inode, hidden_sto_dentry, mode, dev);
++ if(err)
++ goto out_lock;
++
++ if(!dtohd2(dentry)->d_inode) {
++ printk(KERN_CRIT "mini_fo: create_sto_nod: creating storage inode failed [1].\n");
++ err = -EINVAL; /* return something indicating failure */
++ goto out_lock;
++ }
++
++ /* interpose the new inode */
++ if(dtost(dentry) == DELETED) {
++ dtost(dentry) = DEL_REWRITTEN;
++ err = mini_fo_tri_interpose(NULL, hidden_sto_dentry, dentry, dir->i_sb, 0);
++ if(err)
++ goto out_lock;
++ }
++ else if(dtost(dentry) == NON_EXISTANT) {
++ dtost(dentry) = CREATED;
++ err = mini_fo_tri_interpose(dtohd(dentry), hidden_sto_dentry, dentry, dir->i_sb, 0);
++ if(err)
++ goto out_lock;
++ }
++ else if(dtost(dentry) == UNMODIFIED) {
++ dtost(dentry) = MODIFIED;
++ /* interpose on new inode */
++ if(itohi2(dentry->d_inode) != NULL) {
++ printk(KERN_CRIT "mini_fo: create_sto_nod: error, invalid inode detected.\n");
++ err = -EINVAL;
++ goto out_lock;
++ }
++ itohi2(dentry->d_inode) = igrab(dtohd2(dentry)->d_inode);
++ }
++
++ fist_copy_attr_timesizes(dir, hidden_sto_dir_dentry->d_inode);
++
++ out_lock:
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
++#else
++ up(&hidden_sto_dir_dentry->d_inode->i_sem);
++#endif
++ dput(hidden_sto_dir_dentry);
++ out:
++ return err;
++}
++
++
++/* unimplemented (and possibly not usefull):
++
++ nondir-del_to_del_rew
++ nondir-non_exist_to_creat
++
++ dir-unmod_to_del
++ dir-mod_to_del
++ dir-creat_to_del
++ dir-del_rew_to_del
++ dir-del_to_del_rew
++ dir-non_exist_to_creat
++*/
++
++
++/* bring a file of any type from state UNMODIFIED to MODIFIED */
++int nondir_unmod_to_mod(dentry_t *dentry, int cp_flag)
++{
++ int err = 0;
++ struct vfsmount *tgt_mnt;
++ struct vfsmount *src_mnt;
++ dentry_t *tgt_dentry;
++ dentry_t *src_dentry;
++ dentry_t *hidden_sto_dentry;
++ dentry_t *hidden_sto_dir_dentry;
++
++ check_mini_fo_dentry(dentry);
++
++ if((dtost(dentry) != UNMODIFIED) ||
++ S_ISDIR(dentry->d_inode->i_mode)) {
++ printk(KERN_CRIT "mini_fo: nondir_unmod_to_mod: \
++ wrong type or state.\n");
++ err = -1;
++ goto out;
++ }
++ err = get_neg_sto_dentry(dentry);
++
++ if (err) {
++ printk(KERN_CRIT "mini_fo: nondir_unmod_to_mod: \
++ ERROR getting neg. sto dentry.\n");
++ goto out;
++ }
++
++ /* create sto file */
++ hidden_sto_dentry = dtohd2(dentry);
++
++ /* lock parent */
++ hidden_sto_dir_dentry = dget(hidden_sto_dentry->d_parent);
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_lock(&hidden_sto_dir_dentry->d_inode->i_mutex);
++#else
++ down(&hidden_sto_dir_dentry->d_inode->i_sem);
++#endif
++
++ err = PTR_ERR(hidden_sto_dir_dentry);
++ if (IS_ERR(hidden_sto_dir_dentry))
++ goto out;
++
++ /* handle different types of nondirs */
++ if(S_ISCHR(dentry->d_inode->i_mode) ||
++ S_ISBLK(dentry->d_inode->i_mode)) {
++ err = vfs_mknod(hidden_sto_dir_dentry->d_inode,
++ hidden_sto_dentry,
++ dtohd(dentry)->d_inode->i_mode,
++ dtohd(dentry)->d_inode->i_rdev);
++ }
++
++ else if(S_ISREG(dentry->d_inode->i_mode)) {
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ err = vfs_create(hidden_sto_dir_dentry->d_inode,
++ hidden_sto_dentry,
++ dtohd(dentry)->d_inode->i_mode, NULL);
++#else
++ err = vfs_create(hidden_sto_dir_dentry->d_inode,
++ hidden_sto_dentry,
++ dtohd(dentry)->d_inode->i_mode);
++#endif
++ }
++ if(err) {
++ printk(KERN_CRIT "mini_fo: nondir_unmod_to_mod: \
++ ERROR creating sto file.\n");
++ goto out_lock;
++ }
++
++ /* interpose on new inode */
++ if(itohi2(dentry->d_inode) != NULL) {
++ printk(KERN_CRIT "mini_fo: nondir_unmod_to_mod: \
++ ERROR, invalid inode detected.\n");
++ err = -EINVAL;
++ goto out_lock;
++ }
++
++ itohi2(dentry->d_inode) = igrab(dtohd2(dentry)->d_inode);
++
++ fist_copy_attr_timesizes(dentry->d_parent->d_inode,
++ hidden_sto_dir_dentry->d_inode);
++ dtost(dentry) = MODIFIED;
++
++ /* copy contents if regular file and cp_flag = 1 */
++ if((cp_flag == 1) && S_ISREG(dentry->d_inode->i_mode)) {
++
++ /* unlock first */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
++#else
++ up(&hidden_sto_dir_dentry->d_inode->i_sem);
++#endif
++
++ dput(hidden_sto_dir_dentry);
++
++ tgt_dentry = dtohd2(dentry);
++ tgt_mnt = stopd(dentry->d_inode->i_sb)->hidden_mnt2;
++ src_dentry = dtohd(dentry);
++ src_mnt = stopd(dentry->d_inode->i_sb)->hidden_mnt;
++
++ err = mini_fo_cp_cont(tgt_dentry, tgt_mnt,
++ src_dentry, src_mnt);
++ if(err) {
++ printk(KERN_CRIT "mini_fo: nondir_unmod_to_mod: \
++ ERROR copying contents.\n");
++ }
++ goto out;
++ }
++
++ out_lock:
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
++#else
++ up(&hidden_sto_dir_dentry->d_inode->i_sem);
++#endif
++ dput(hidden_sto_dir_dentry);
++ out:
++ return err;
++}
++
++/* this function is currently identical to nondir_creat_to_del */
++int nondir_del_rew_to_del(dentry_t *dentry)
++{
++ return nondir_creat_to_del(dentry);
++}
++
++int nondir_creat_to_del(dentry_t *dentry)
++{
++ int err = 0;
++
++ inode_t *hidden_sto_dir_inode;
++ dentry_t *hidden_sto_dir_dentry;
++ dentry_t *hidden_sto_dentry;
++
++ check_mini_fo_dentry(dentry);
++
++ /* for now this function serves for both state DEL_REWRITTEN and
++ * CREATED */
++ if(!(dtost(dentry) == CREATED || (dtost(dentry) == DEL_REWRITTEN)) ||
++ S_ISDIR(dentry->d_inode->i_mode)) {
++ printk(KERN_CRIT "mini_fo: nondir_mod_to_del/del_rew_to_del: \
++ wrong type or state.\n");
++ err = -1;
++ goto out;
++ }
++
++ hidden_sto_dir_inode = itohi2(dentry->d_parent->d_inode);
++ hidden_sto_dentry = dtohd2(dentry);
++
++ /* was: hidden_sto_dir_dentry = lock_parent(hidden_sto_dentry);*/
++ hidden_sto_dir_dentry = dget(hidden_sto_dentry->d_parent);
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_lock(&hidden_sto_dir_dentry->d_inode->i_mutex);
++#else
++ down(&hidden_sto_dir_dentry->d_inode->i_sem);
++#endif
++
++ /* avoid destroying the hidden inode if the file is in use */
++ dget(hidden_sto_dentry);
++ err = vfs_unlink(hidden_sto_dir_inode, hidden_sto_dentry);
++ dput(hidden_sto_dentry);
++ if(!err)
++ d_delete(hidden_sto_dentry);
++
++ /* propagate number of hard-links */
++ dentry->d_inode->i_nlink = itohi2(dentry->d_inode)->i_nlink;
++
++ dtost(dentry) = NON_EXISTANT;
++
++ /* was: unlock_dir(hidden_sto_dir_dentry); */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
++#else
++ up(&hidden_sto_dir_dentry->d_inode->i_sem);
++#endif
++ dput(hidden_sto_dir_dentry);
++
++ out:
++ return err;
++}
++
++int nondir_mod_to_del(dentry_t *dentry)
++{
++ int err;
++ dentry_t *hidden_sto_dentry;
++ inode_t *hidden_sto_dir_inode;
++ dentry_t *hidden_sto_dir_dentry;
++
++ check_mini_fo_dentry(dentry);
++
++ if(dtost(dentry) != MODIFIED ||
++ S_ISDIR(dentry->d_inode->i_mode)) {
++ printk(KERN_CRIT "mini_fo: nondir_mod_to_del: \
++ wrong type or state.\n");
++ err = -1;
++ goto out;
++ }
++
++ hidden_sto_dir_inode = itohi2(dentry->d_parent->d_inode);
++ hidden_sto_dentry = dtohd2(dentry);
++
++ /* was hidden_sto_dir_dentry = lock_parent(hidden_sto_dentry); */
++ hidden_sto_dir_dentry = dget(hidden_sto_dentry->d_parent);
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_lock(&hidden_sto_dir_dentry->d_inode->i_mutex);
++#else
++ down(&hidden_sto_dir_dentry->d_inode->i_sem);
++#endif
++
++ /* avoid destroying the hidden inode if the file is in use */
++ dget(hidden_sto_dentry);
++ err = vfs_unlink(hidden_sto_dir_inode, hidden_sto_dentry);
++ dput(hidden_sto_dentry);
++ if(!err)
++ d_delete(hidden_sto_dentry);
++
++ /* propagate number of hard-links */
++ dentry->d_inode->i_nlink = itohi2(dentry->d_inode)->i_nlink;
++
++ /* dput base dentry, this will relase the inode and free the
++ * dentry, as we will never need it again. */
++ dput(dtohd(dentry));
++ dtohd(dentry) = NULL;
++ dtost(dentry) = DELETED;
++
++ /* add deleted file to META-file */
++ meta_add_d_entry(dentry->d_parent,
++ dentry->d_name.name,
++ dentry->d_name.len);
++
++ /* was: unlock_dir(hidden_sto_dir_dentry); */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
++ mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
++#else
++ up(&hidden_sto_dir_dentry->d_inode->i_sem);
++#endif
++ dput(hidden_sto_dir_dentry);
++
++ out:
++ return err;
++}
++
++int nondir_unmod_to_del(dentry_t *dentry)
++{
++ int err = 0;
++
++ check_mini_fo_dentry(dentry);
++
++ if(dtost(dentry) != UNMODIFIED ||
++ S_ISDIR(dentry->d_inode->i_mode)) {
++ printk(KERN_CRIT "mini_fo: nondir_unmod_to_del: \
++ wrong type or state.\n");
++ err = -1;
++ goto out;
++ }
++
++ /* next we have to get a negative dentry for the storage file */
++ err = get_neg_sto_dentry(dentry);
++
++ if(err)
++ goto out;
++
++ /* add deleted file to META lists */
++ err = meta_add_d_entry(dentry->d_parent,
++ dentry->d_name.name,
++ dentry->d_name.len);
++
++ if(err)
++ goto out;
++
++ /* dput base dentry, this will relase the inode and free the
++ * dentry, as we will never need it again. */
++ dput(dtohd(dentry));
++ dtohd(dentry) = NULL;
++ dtost(dentry) = DELETED;
++
++ out:
++ return err;
++}
++
++/* bring a dir from state UNMODIFIED to MODIFIED */
++int dir_unmod_to_mod(dentry_t *dentry)
++{
++ int err;
++
++ check_mini_fo_dentry(dentry);
++
++ if(dtost(dentry) != UNMODIFIED ||
++ !S_ISDIR(dentry->d_inode->i_mode)) {
++ printk(KERN_CRIT "mini_fo: dir_unmod_to_mod: \
++ wrong type or state.\n");
++ err = -1;
++ goto out;
++ }
++
++ /* this creates our dir incl. sto. structure */
++ err = build_sto_structure(dentry->d_parent, dentry);
++ if(err) {
++ printk(KERN_CRIT "mini_fo: dir_unmod_to_mod: \
++ build_sto_structure failed.\n");
++ goto out;
++ }
++ out:
++ return err;
++}
++
+diff -urN linux-2.6.19.old/fs/mini_fo/super.c linux-2.6.19.dev/fs/mini_fo/super.c
+--- linux-2.6.19.old/fs/mini_fo/super.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.19.dev/fs/mini_fo/super.c 2006-12-14 03:14:03.000000000 +0100
+@@ -0,0 +1,281 @@
++/*
++ * Copyright (c) 1997-2003 Erez Zadok
++ * Copyright (c) 2001-2003 Stony Brook University
++ *
++ * For specific licensing information, see the COPYING file distributed with
++ * this package, or get one from ftp://ftp.filesystems.org/pub/fist/COPYING.
++ *
++ * This Copyright notice must be kept intact and distributed with all
++ * fistgen sources INCLUDING sources generated by fistgen.
++ */
++/*
++ * Copyright (C) 2004, 2005 Markus Klotzbuecher <mk@creamnet.de>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++
++/*
++ * $Id$
++ */
++
++#ifdef HAVE_CONFIG_H
++# include <config.h>
++#endif
++
++#include "fist.h"
++#include "mini_fo.h"
++
++
++STATIC void
++mini_fo_read_inode(inode_t *inode)
++{
++ static struct address_space_operations mini_fo_empty_aops;
++
++ __itopd(inode) = kmalloc(sizeof(struct mini_fo_inode_info), GFP_KERNEL);
++ if (!itopd(inode)) {
++ printk("<0>%s:%s:%d: No kernel memory!\n", __FILE__, __FUNCTION__, __LINE__);
++ ASSERT(NULL);
++ }
++ itohi(inode) = NULL;
++ itohi2(inode) = NULL;
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++ inode->i_version++;
++#else
++ inode->i_version = ++event; /* increment inode version */
++#endif
++ inode->i_op = &mini_fo_main_iops;
++ inode->i_fop = &mini_fo_main_fops;
++#if 0
++ /*
++ * XXX: To export a file system via NFS, it has to have the
++ * FS_REQUIRES_DEV flag, so turn it on. But should we inherit it from
++ * the lower file system, or can we allow our file system to be exported
++ * even if the lower one cannot be natively exported.
++ */
++ inode->i_sb->s_type->fs_flags |= FS_REQUIRES_DEV;
++ /*
++ * OK, the above was a hack, which is now turned off because it may
++ * cause a panic/oops on some systems. The correct way to export a
++ * "nodev" filesystem is via using nfs-utils > 1.0 and the "fsid=" export
++ * parameter, which requires 2.4.20 or later.
++ */
++#endif
++ /* I don't think ->a_ops is ever allowed to be NULL */
++ inode->i_mapping->a_ops = &mini_fo_empty_aops;
++}
++
++
++#if defined(FIST_DEBUG) || defined(FIST_FILTER_SCA)
++/*
++ * No need to call write_inode() on the lower inode, as it
++ * will have been marked 'dirty' anyway. But we might need
++ * to write some of our own stuff to disk.
++ */
++STATIC void
++mini_fo_write_inode(inode_t *inode, int sync)
++{
++ print_entry_location();
++ print_exit_location();
++}
++#endif /* defined(FIST_DEBUG) || defined(FIST_FILTER_SCA) */
++
++
++STATIC void
++mini_fo_put_inode(inode_t *inode)
++{
++ /*
++ * This is really funky stuff:
++ * Basically, if i_count == 1, iput will then decrement it and this inode will be destroyed.
++ * It is currently holding a reference to the hidden inode.
++ * Therefore, it needs to release that reference by calling iput on the hidden inode.
++ * iput() _will_ do it for us (by calling our clear_inode), but _only_ if i_nlink == 0.
++ * The problem is, NFS keeps i_nlink == 1 for silly_rename'd files.
++ * So we must for our i_nlink to 0 here to trick iput() into calling our clear_inode.
++ */
++ if (atomic_read(&inode->i_count) == 1)
++ inode->i_nlink = 0;
++}
++
++
++#if defined(FIST_DEBUG) || defined(FIST_FILTER_SCA)
++/*
++ * we now define delete_inode, because there are two VFS paths that may
++ * destroy an inode: one of them calls clear inode before doing everything
++ * else that's needed, and the other is fine. This way we truncate the inode
++ * size (and its pages) and then clear our own inode, which will do an iput
++ * on our and the lower inode.
++ */
++STATIC void
++mini_fo_delete_inode(inode_t *inode)
++{
++ print_entry_location();
++
++ fist_checkinode(inode, "mini_fo_delete_inode IN");
++ inode->i_size = 0; /* every f/s seems to do that */
++ clear_inode(inode);
++
++ print_exit_location();
++}
++#endif /* defined(FIST_DEBUG) || defined(FIST_FILTER_SCA) */
++
++
++/* final actions when unmounting a file system */
++STATIC void
++mini_fo_put_super(super_block_t *sb)
++{
++ if (stopd(sb)) {
++ mntput(stopd(sb)->hidden_mnt);
++ mntput(stopd(sb)->hidden_mnt2);
++
++ /* mk: no! dput(stopd(sb)->base_dir_dentry);
++ dput(stopd(sb)->storage_dir_dentry); */
++
++ kfree(stopd(sb));
++ __stopd(sb) = NULL;
++ }
++}
++
++
++#ifdef NOT_NEEDED
++/*
++ * This is called in do_umount before put_super.
++ * The superblock lock is not held yet.
++ * We probably do not need to define this or call write_super
++ * on the hidden_sb, because sync_supers() will get to hidden_sb
++ * sooner or later. But it is also called from file_fsync()...
++ */
++STATIC void
++mini_fo_write_super(super_block_t *sb)
++{
++ return;
++}
++#endif /* NOT_NEEDED */
++
++
++STATIC int
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
++mini_fo_statfs(struct dentry *d, struct kstatfs *buf)
++#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++mini_fo_statfs(super_block_t *sb, struct kstatfs *buf)
++#else
++mini_fo_statfs(super_block_t *sb, struct statfs *buf)
++#endif
++{
++ int err = 0;
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
++ struct dentry *hidden_d;
++
++ hidden_d = dtohd(d);
++ err = vfs_statfs(hidden_d, buf);
++#else
++ super_block_t *hidden_sb;
++
++ hidden_sb = stohs(sb);
++ err = vfs_statfs(hidden_sb, buf);
++#endif
++
++ return err;
++}
++
++
++/*
++ * XXX: not implemented. This is not allowed yet.
++ * Should we call this on the hidden_sb? Probably not.
++ */
++STATIC int
++mini_fo_remount_fs(super_block_t *sb, int *flags, char *data)
++{
++ //printk(KERN_CRIT "mini_fo_remount_fs: WARNING, this function is umimplemented.\n");
++ return -ENOSYS;
++}
++
++
++/*
++ * Called by iput() when the inode reference count reached zero
++ * and the inode is not hashed anywhere. Used to clear anything
++ * that needs to be, before the inode is completely destroyed and put
++ * on the inode free list.
++ */
++STATIC void
++mini_fo_clear_inode(inode_t *inode)
++{
++ /*
++ * Decrement a reference to a hidden_inode, which was incremented
++ * by our read_inode when it was created initially.
++ */
++
++ /* release the wol_list */
++ if(S_ISDIR(inode->i_mode)) {
++ __meta_put_lists(inode);
++ }
++
++ /* mk: fan out fun */
++ if(itohi(inode))
++ iput(itohi(inode));
++ if(itohi2(inode))
++ iput(itohi2(inode));
++
++ // XXX: why this assertion fails?
++ // because it doesn't like us
++ // ASSERT((inode->i_state & I_DIRTY) == 0);
++ kfree(itopd(inode));
++ __itopd(inode) = NULL;
++}
++
++
++/*
++ * Called in do_umount() if the MNT_FORCE flag was used and this
++ * function is defined. See comment in linux/fs/super.c:do_umount().
++ * Used only in nfs, to kill any pending RPC tasks, so that subsequent
++ * code can actually succeed and won't leave tasks that need handling.
++ *
++ * PS. I wonder if this is somehow useful to undo damage that was
++ * left in the kernel after a user level file server (such as amd)
++ * dies.
++ */
++STATIC void
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
++mini_fo_umount_begin(struct vfsmount *mnt, int flags)
++{
++ struct vfsmount *hidden_mnt;
++
++ hidden_mnt = stopd(mnt->mnt_sb)->hidden_mnt;
++
++ if (hidden_mnt->mnt_sb->s_op->umount_begin)
++ hidden_mnt->mnt_sb->s_op->umount_begin(hidden_mnt, flags);
++
++}
++#else
++mini_fo_umount_begin(super_block_t *sb)
++{
++ super_block_t *hidden_sb;
++
++ hidden_sb = stohs(sb);
++
++ if (hidden_sb->s_op->umount_begin)
++ hidden_sb->s_op->umount_begin(hidden_sb);
++
++}
++#endif
++
++
++struct super_operations mini_fo_sops =
++{
++ read_inode: mini_fo_read_inode,
++#if defined(FIST_DEBUG) || defined(FIST_FILTER_SCA)
++ write_inode: mini_fo_write_inode,
++#endif /* defined(FIST_DEBUG) || defined(FIST_FILTER_SCA) */
++ put_inode: mini_fo_put_inode,
++#if defined(FIST_DEBUG) || defined(FIST_FILTER_SCA)
++ delete_inode: mini_fo_delete_inode,
++#endif /* defined(FIST_DEBUG) || defined(FIST_FILTER_SCA) */
++ put_super: mini_fo_put_super,
++ statfs: mini_fo_statfs,
++ remount_fs: mini_fo_remount_fs,
++ clear_inode: mini_fo_clear_inode,
++ umount_begin: mini_fo_umount_begin,
++};
--- /dev/null
+--- linux.old/include/linux/netdevice.h 2006-12-30 18:49:37.916951328 +0100
++++ linux.dev/include/linux/netdevice.h 2006-12-30 18:49:49.573179312 +0100
+@@ -526,6 +526,8 @@
+ struct class_device class_dev;
+ /* space for optional statistics and wireless sysfs groups */
+ struct attribute_group *sysfs_groups[3];
++
++ void *ieee80211_ptr;
+ };
+
+ #define NETDEV_ALIGN 32
--- /dev/null
+--- linux.old/drivers/mtd/devices/block2mtd.c 2007-02-01 20:13:47.147274772 +0100
++++ linux/drivers/mtd/devices/block2mtd.c 2007-02-01 20:19:59.753034993 +0100
+@@ -40,7 +40,7 @@
+ static LIST_HEAD(blkmtd_device_list);
+
+
+-#define PAGE_READAHEAD 64
++#define PAGE_READAHEAD 0
+ static void cache_readahead(struct address_space *mapping, int index)
+ {
+ filler_t *filler = (filler_t*)mapping->a_ops->readpage;
--- /dev/null
+--- linux.dev/drivers/mtd/devices/block2mtd.c.old 2007-02-18 14:08:59.519952312 +0100
++++ linux.dev/drivers/mtd/devices/block2mtd.c 2007-02-18 14:09:04.219237912 +0100
+@@ -111,7 +111,7 @@
+ if (IS_ERR(page))
+ return PTR_ERR(page);
+
+- max = (u_long*)page_address(page) + PAGE_SIZE;
++ max = (u_long*) ((u8 *) page_address(page) + PAGE_SIZE);
+ for (p=(u_long*)page_address(page); p<max; p++)
+ if (*p != -1UL) {
+ lock_page(page);
--- /dev/null
+diff -urN linux.old/fs/Kconfig linux.dev/fs/Kconfig
+--- linux.old/fs/Kconfig 2006-11-29 22:57:37.000000000 +0100
++++ linux.dev/fs/Kconfig 2006-12-14 04:21:47.000000000 +0100
+@@ -1202,6 +1202,8 @@
+ To compile the EFS file system support as a module, choose M here: the
+ module will be called efs.
+
++source "fs/yaffs2/Kconfig"
++
+ config JFFS_FS
+ tristate "Journalling Flash File System (JFFS) support"
+ depends on MTD && BLOCK
+diff -urN linux.old/fs/Makefile linux.dev/fs/Makefile
+--- linux.old/fs/Makefile 2006-11-29 22:57:37.000000000 +0100
++++ linux.dev/fs/Makefile 2006-12-14 04:21:47.000000000 +0100
+@@ -114,3 +114,4 @@
+ obj-$(CONFIG_DEBUG_FS) += debugfs/
+ obj-$(CONFIG_OCFS2_FS) += ocfs2/
+ obj-$(CONFIG_GFS2_FS) += gfs2/
++obj-$(CONFIG_YAFFS_FS) += yaffs2/
+diff -urN linux.old/fs/yaffs2/devextras.h linux.dev/fs/yaffs2/devextras.h
+--- linux.old/fs/yaffs2/devextras.h 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/devextras.h 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,265 @@
++/*
++ * YAFFS: Yet another FFS. A NAND-flash specific file system.
++ * devextras.h
++ *
++ * Copyright (C) 2002 Aleph One Ltd.
++ * for Toby Churchill Ltd and Brightstar Engineering
++ *
++ * Created by Charles Manning <charles@aleph1.co.uk>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU Lesser General Public License version 2.1 as
++ * published by the Free Software Foundation.
++ *
++ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
++ *
++ * This file is just holds extra declarations used during development.
++ * Most of these are from kernel includes placed here so we can use them in
++ * applications.
++ *
++ * $Id: devextras.h,v 1.2 2005/08/11 02:37:49 marty Exp $
++ *
++ */
++
++#ifndef __EXTRAS_H__
++#define __EXTRAS_H__
++
++#if defined WIN32
++#define __inline__ __inline
++#define new newHack
++#endif
++
++#if !(defined __KERNEL__) || (defined WIN32)
++
++/* User space defines */
++
++typedef unsigned char __u8;
++typedef unsigned short __u16;
++typedef unsigned __u32;
++
++/*
++ * Simple doubly linked list implementation.
++ *
++ * Some of the internal functions ("__xxx") are useful when
++ * manipulating whole lists rather than single entries, as
++ * sometimes we already know the next/prev entries and we can
++ * generate better code by using them directly rather than
++ * using the generic single-entry routines.
++ */
++
++#define prefetch(x) 1
++
++struct list_head {
++ struct list_head *next, *prev;
++};
++
++#define LIST_HEAD_INIT(name) { &(name), &(name) }
++
++#define LIST_HEAD(name) \
++ struct list_head name = LIST_HEAD_INIT(name)
++
++#define INIT_LIST_HEAD(ptr) do { \
++ (ptr)->next = (ptr); (ptr)->prev = (ptr); \
++} while (0)
++
++/*
++ * Insert a new entry between two known consecutive entries.
++ *
++ * This is only for internal list manipulation where we know
++ * the prev/next entries already!
++ */
++static __inline__ void __list_add(struct list_head *new,
++ struct list_head *prev,
++ struct list_head *next)
++{
++ next->prev = new;
++ new->next = next;
++ new->prev = prev;
++ prev->next = new;
++}
++
++/**
++ * list_add - add a new entry
++ * @new: new entry to be added
++ * @head: list head to add it after
++ *
++ * Insert a new entry after the specified head.
++ * This is good for implementing stacks.
++ */
++static __inline__ void list_add(struct list_head *new, struct list_head *head)
++{
++ __list_add(new, head, head->next);
++}
++
++/**
++ * list_add_tail - add a new entry
++ * @new: new entry to be added
++ * @head: list head to add it before
++ *
++ * Insert a new entry before the specified head.
++ * This is useful for implementing queues.
++ */
++static __inline__ void list_add_tail(struct list_head *new,
++ struct list_head *head)
++{
++ __list_add(new, head->prev, head);
++}
++
++/*
++ * Delete a list entry by making the prev/next entries
++ * point to each other.
++ *
++ * This is only for internal list manipulation where we know
++ * the prev/next entries already!
++ */
++static __inline__ void __list_del(struct list_head *prev,
++ struct list_head *next)
++{
++ next->prev = prev;
++ prev->next = next;
++}
++
++/**
++ * list_del - deletes entry from list.
++ * @entry: the element to delete from the list.
++ * Note: list_empty on entry does not return true after this, the entry is
++ * in an undefined state.
++ */
++static __inline__ void list_del(struct list_head *entry)
++{
++ __list_del(entry->prev, entry->next);
++}
++
++/**
++ * list_del_init - deletes entry from list and reinitialize it.
++ * @entry: the element to delete from the list.
++ */
++static __inline__ void list_del_init(struct list_head *entry)
++{
++ __list_del(entry->prev, entry->next);
++ INIT_LIST_HEAD(entry);
++}
++
++/**
++ * list_empty - tests whether a list is empty
++ * @head: the list to test.
++ */
++static __inline__ int list_empty(struct list_head *head)
++{
++ return head->next == head;
++}
++
++/**
++ * list_splice - join two lists
++ * @list: the new list to add.
++ * @head: the place to add it in the first list.
++ */
++static __inline__ void list_splice(struct list_head *list,
++ struct list_head *head)
++{
++ struct list_head *first = list->next;
++
++ if (first != list) {
++ struct list_head *last = list->prev;
++ struct list_head *at = head->next;
++
++ first->prev = head;
++ head->next = first;
++
++ last->next = at;
++ at->prev = last;
++ }
++}
++
++/**
++ * list_entry - get the struct for this entry
++ * @ptr: the &struct list_head pointer.
++ * @type: the type of the struct this is embedded in.
++ * @member: the name of the list_struct within the struct.
++ */
++#define list_entry(ptr, type, member) \
++ ((type *)((char *)(ptr)-(unsigned long)(&((type *)0)->member)))
++
++/**
++ * list_for_each - iterate over a list
++ * @pos: the &struct list_head to use as a loop counter.
++ * @head: the head for your list.
++ */
++#define list_for_each(pos, head) \
++ for (pos = (head)->next, prefetch(pos->next); pos != (head); \
++ pos = pos->next, prefetch(pos->next))
++
++/**
++ * list_for_each_safe - iterate over a list safe against removal
++ * of list entry
++ * @pos: the &struct list_head to use as a loop counter.
++ * @n: another &struct list_head to use as temporary storage
++ * @head: the head for your list.
++ */
++#define list_for_each_safe(pos, n, head) \
++ for (pos = (head)->next, n = pos->next; pos != (head); \
++ pos = n, n = pos->next)
++
++/*
++ * File types
++ */
++#define DT_UNKNOWN 0
++#define DT_FIFO 1
++#define DT_CHR 2
++#define DT_DIR 4
++#define DT_BLK 6
++#define DT_REG 8
++#define DT_LNK 10
++#define DT_SOCK 12
++#define DT_WHT 14
++
++#ifndef WIN32
++#include <sys/stat.h>
++#endif
++
++/*
++ * Attribute flags. These should be or-ed together to figure out what
++ * has been changed!
++ */
++#define ATTR_MODE 1
++#define ATTR_UID 2
++#define ATTR_GID 4
++#define ATTR_SIZE 8
++#define ATTR_ATIME 16
++#define ATTR_MTIME 32
++#define ATTR_CTIME 64
++#define ATTR_ATIME_SET 128
++#define ATTR_MTIME_SET 256
++#define ATTR_FORCE 512 /* Not a change, but a change it */
++#define ATTR_ATTR_FLAG 1024
++
++struct iattr {
++ unsigned int ia_valid;
++ unsigned ia_mode;
++ unsigned ia_uid;
++ unsigned ia_gid;
++ unsigned ia_size;
++ unsigned ia_atime;
++ unsigned ia_mtime;
++ unsigned ia_ctime;
++ unsigned int ia_attr_flags;
++};
++
++#define KERN_DEBUG
++
++#else
++
++#ifndef WIN32
++#include <linux/types.h>
++#include <linux/list.h>
++#include <linux/fs.h>
++#include <linux/stat.h>
++#endif
++
++#endif
++
++#if defined WIN32
++#undef new
++#endif
++
++#endif
+diff -urN linux.old/fs/yaffs2/Kconfig linux.dev/fs/yaffs2/Kconfig
+--- linux.old/fs/yaffs2/Kconfig 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/Kconfig 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,135 @@
++#
++# YAFFS file system configurations
++#
++
++config YAFFS_FS
++ tristate "YAFFS2 file system support"
++ default n
++ depends on MTD
++ select YAFFS_YAFFS1
++ select YAFFS_YAFFS2
++ help
++ YAFFS2, or Yet Another Flash Filing System, is a filing system
++ optimised for NAND Flash chips.
++
++ To compile the YAFFS2 file system support as a module, choose M here:
++ the module will be called yaffs2.
++
++ If unsure, say N.
++
++ Further information on YAFFS2 is available at
++ <http://www.aleph1.co.uk/yaffs/>.
++
++config YAFFS_YAFFS1
++ bool "512 byte / page devices"
++ depends on YAFFS_FS
++ default y
++ help
++ Enable YAFFS1 support -- yaffs for 512 byte / page devices
++
++ If unsure, say Y.
++
++config YAFFS_DOES_ECC
++ bool "Lets Yaffs do its own ECC"
++ depends on YAFFS_FS && YAFFS_YAFFS1
++ default n
++ help
++ This enables Yaffs to use its own ECC functions instead of using
++ the ones from the generic MTD-NAND driver.
++
++ If unsure, say N.
++
++config YAFFS_ECC_WRONG_ORDER
++ bool "Use the same ecc byte order as Steven Hill's nand_ecc.c"
++ depends on YAFFS_FS && YAFFS_DOES_ECC
++ default n
++ help
++ This makes yaffs_ecc.c use the same ecc byte order as
++ Steven Hill's nand_ecc.c. If not set, then you get the
++ same ecc byte order as SmartMedia.
++
++ If unsure, say N.
++
++config YAFFS_YAFFS2
++ bool "2048 byte (or larger) / page devices"
++ depends on YAFFS_FS
++ default y
++ help
++ Enable YAFFS2 support -- yaffs for >= 2048 byte / page larger devices
++
++ If unsure, say Y.
++
++config YAFFS_AUTO_YAFFS2
++ bool "Autoselect yaffs2 format"
++ depends on YAFFS_YAFFS2
++ default y
++ help
++ Without this, you need to explicitely use yaffs2 as the file
++ system type. With this, you can say "yaffs" and yaffs or yaffs2
++ will be used depending on the device page size.
++
++ If unsure, say Y.
++
++config YAFFS_DISABLE_LAZY_LOAD
++ bool "Disable lazy loading"
++ depends on YAFFS_YAFFS2
++ default n
++ help
++ "Lazy loading" defers loading file details until they are
++ required. This saves mount time, but makes the first look-up
++ a bit longer.
++
++ Lazy loading will only happen if enabled by this option being 'n'
++ and if the appropriate tags are available, else yaffs2 will
++ automatically fall back to immediate loading and do the right
++ thing.
++
++ Lazy laoding will be required by checkpointing.
++
++ Setting this to 'y' will disable lazy loading.
++
++ If unsure, say N.
++
++config YAFFS_DISABLE_WIDE_TNODES
++ bool "Turn off wide tnodes"
++ depends on YAFFS_FS
++ default n
++ help
++ Wide tnodes are only used for large NAND arrays (>=32MB for
++ 512-byte page devices and >=128MB for 2k page devices). They use
++ slightly more RAM but are faster since they eliminate chunk group
++ searching.
++
++ Setting this to 'y' will force tnode width to 16 bits and make
++ large arrays slower.
++
++ If unsure, say N.
++
++config YAFFS_ALWAYS_CHECK_CHUNK_ERASED
++ bool "Force chunk erase check"
++ depends on YAFFS_FS
++ default n
++ help
++ Normally YAFFS only checks chunks before writing until an erased
++ chunk is found. This helps to detect any partially written chunks
++ that might have happened due to power loss.
++
++ Enabling this forces on the test that chunks are erased in flash
++ before writing to them. This takes more time but is potentially a
++ bit more secure.
++
++ Suggest setting Y during development and ironing out driver issues
++ etc. Suggest setting to N if you want faster writing.
++
++ If unsure, say Y.
++
++config YAFFS_SHORT_NAMES_IN_RAM
++ bool "Cache short names in RAM"
++ depends on YAFFS_FS
++ default y
++ help
++ If this config is set, then short names are stored with the
++ yaffs_Object. This costs an extra 16 bytes of RAM per object,
++ but makes look-ups faster.
++
++ If unsure, say Y.
+diff -urN linux.old/fs/yaffs2/Makefile linux.dev/fs/yaffs2/Makefile
+--- linux.old/fs/yaffs2/Makefile 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/Makefile 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,10 @@
++#
++# Makefile for the linux YAFFS filesystem routines.
++#
++
++obj-$(CONFIG_YAFFS_FS) += yaffs.o
++
++yaffs-y := yaffs_ecc.o yaffs_fs.o yaffs_guts.o yaffs_checkptrw.o
++yaffs-y += yaffs_packedtags2.o yaffs_nand.o yaffs_qsort.o
++yaffs-y += yaffs_tagscompat.o yaffs_tagsvalidity.o
++yaffs-y += yaffs_mtdif.o yaffs_mtdif2.o
+diff -urN linux.old/fs/yaffs2/moduleconfig.h linux.dev/fs/yaffs2/moduleconfig.h
+--- linux.old/fs/yaffs2/moduleconfig.h 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/moduleconfig.h 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,32 @@
++#ifndef __YAFFS_CONFIG_H__
++#define __YAFFS_CONFIG_H__
++
++#ifdef YAFFS_OUT_OF_TREE
++
++/* DO NOT UNSET THESE THREE. YAFFS2 will not compile if you do. */
++#define CONFIG_YAFFS_FS
++#define CONFIG_YAFFS_YAFFS1
++#define CONFIG_YAFFS_YAFFS2
++
++/* These options are independent of each other. Select those that matter. */
++
++/* Default: Not selected */
++/* Meaning: Yaffs does its own ECC, rather than using MTD ECC */
++//#define CONFIG_YAFFS_DOES_ECC
++
++/* Default: Not selected */
++/* Meaning: ECC byte order is 'wrong'. Only meaningful if */
++/* CONFIG_YAFFS_DOES_ECC is set */
++//#define CONFIG_YAFFS_ECC_WRONG_ORDER
++
++/* Default: Selected */
++/* Meaning: Disables testing whether chunks are erased before writing to them*/
++#define CONFIG_YAFFS_DISABLE_CHUNK_ERASED_CHECK
++
++/* Default: Selected */
++/* Meaning: Cache short names, taking more RAM, but faster look-ups */
++#define CONFIG_YAFFS_SHORT_NAMES_IN_RAM
++
++#endif /* YAFFS_OUT_OF_TREE */
++
++#endif /* __YAFFS_CONFIG_H__ */
+diff -urN linux.old/fs/yaffs2/yaffs_checkptrw.c linux.dev/fs/yaffs2/yaffs_checkptrw.c
+--- linux.old/fs/yaffs2/yaffs_checkptrw.c 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_checkptrw.c 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,384 @@
++/* YAFFS: Yet another FFS. A NAND-flash specific file system.
++ *
++ * Copyright (C) 2002 Aleph One Ltd.
++ * for Toby Churchill Ltd and Brightstar Engineering
++ *
++ * Created by Charles Manning <charles@aleph1.co.uk>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++const char *yaffs_checkptrw_c_version =
++ "$Id: yaffs_checkptrw.c,v 1.11 2006/11/11 23:27:04 charles Exp $";
++
++
++#include "yaffs_checkptrw.h"
++
++
++static int yaffs_CheckpointSpaceOk(yaffs_Device *dev)
++{
++
++ int blocksAvailable = dev->nErasedBlocks - dev->nReservedBlocks;
++
++ T(YAFFS_TRACE_CHECKPOINT,
++ (TSTR("checkpt blocks available = %d" TENDSTR),
++ blocksAvailable));
++
++
++ return (blocksAvailable <= 0) ? 0 : 1;
++}
++
++
++
++static int yaffs_CheckpointErase(yaffs_Device *dev)
++{
++
++ int i;
++
++
++ if(!dev->eraseBlockInNAND)
++ return 0;
++ T(YAFFS_TRACE_CHECKPOINT,(TSTR("checking blocks %d to %d"TENDSTR),
++ dev->internalStartBlock,dev->internalEndBlock));
++
++ for(i = dev->internalStartBlock; i <= dev->internalEndBlock; i++) {
++ yaffs_BlockInfo *bi = yaffs_GetBlockInfo(dev,i);
++ if(bi->blockState == YAFFS_BLOCK_STATE_CHECKPOINT){
++ T(YAFFS_TRACE_CHECKPOINT,(TSTR("erasing checkpt block %d"TENDSTR),i));
++ if(dev->eraseBlockInNAND(dev,i- dev->blockOffset /* realign */)){
++ bi->blockState = YAFFS_BLOCK_STATE_EMPTY;
++ dev->nErasedBlocks++;
++ dev->nFreeChunks += dev->nChunksPerBlock;
++ }
++ else {
++ dev->markNANDBlockBad(dev,i);
++ bi->blockState = YAFFS_BLOCK_STATE_DEAD;
++ }
++ }
++ }
++
++ dev->blocksInCheckpoint = 0;
++
++ return 1;
++}
++
++
++static void yaffs_CheckpointFindNextErasedBlock(yaffs_Device *dev)
++{
++ int i;
++ int blocksAvailable = dev->nErasedBlocks - dev->nReservedBlocks;
++ T(YAFFS_TRACE_CHECKPOINT,
++ (TSTR("allocating checkpt block: erased %d reserved %d avail %d next %d "TENDSTR),
++ dev->nErasedBlocks,dev->nReservedBlocks,blocksAvailable,dev->checkpointNextBlock));
++
++ if(dev->checkpointNextBlock >= 0 &&
++ dev->checkpointNextBlock <= dev->internalEndBlock &&
++ blocksAvailable > 0){
++
++ for(i = dev->checkpointNextBlock; i <= dev->internalEndBlock; i++){
++ yaffs_BlockInfo *bi = yaffs_GetBlockInfo(dev,i);
++ if(bi->blockState == YAFFS_BLOCK_STATE_EMPTY){
++ dev->checkpointNextBlock = i + 1;
++ dev->checkpointCurrentBlock = i;
++ T(YAFFS_TRACE_CHECKPOINT,(TSTR("allocating checkpt block %d"TENDSTR),i));
++ return;
++ }
++ }
++ }
++ T(YAFFS_TRACE_CHECKPOINT,(TSTR("out of checkpt blocks"TENDSTR)));
++
++ dev->checkpointNextBlock = -1;
++ dev->checkpointCurrentBlock = -1;
++}
++
++static void yaffs_CheckpointFindNextCheckpointBlock(yaffs_Device *dev)
++{
++ int i;
++ yaffs_ExtendedTags tags;
++
++ T(YAFFS_TRACE_CHECKPOINT,(TSTR("find next checkpt block: start: blocks %d next %d" TENDSTR),
++ dev->blocksInCheckpoint, dev->checkpointNextBlock));
++
++ if(dev->blocksInCheckpoint < dev->checkpointMaxBlocks)
++ for(i = dev->checkpointNextBlock; i <= dev->internalEndBlock; i++){
++ int chunk = i * dev->nChunksPerBlock;
++ int realignedChunk = chunk - dev->chunkOffset;
++
++ dev->readChunkWithTagsFromNAND(dev,realignedChunk,NULL,&tags);
++ T(YAFFS_TRACE_CHECKPOINT,(TSTR("find next checkpt block: search: block %d oid %d seq %d eccr %d" TENDSTR),
++ i, tags.objectId,tags.sequenceNumber,tags.eccResult));
++
++ if(tags.sequenceNumber == YAFFS_SEQUENCE_CHECKPOINT_DATA){
++ /* Right kind of block */
++ dev->checkpointNextBlock = tags.objectId;
++ dev->checkpointCurrentBlock = i;
++ dev->checkpointBlockList[dev->blocksInCheckpoint] = i;
++ dev->blocksInCheckpoint++;
++ T(YAFFS_TRACE_CHECKPOINT,(TSTR("found checkpt block %d"TENDSTR),i));
++ return;
++ }
++ }
++
++ T(YAFFS_TRACE_CHECKPOINT,(TSTR("found no more checkpt blocks"TENDSTR)));
++
++ dev->checkpointNextBlock = -1;
++ dev->checkpointCurrentBlock = -1;
++}
++
++
++int yaffs_CheckpointOpen(yaffs_Device *dev, int forWriting)
++{
++
++ /* Got the functions we need? */
++ if (!dev->writeChunkWithTagsToNAND ||
++ !dev->readChunkWithTagsFromNAND ||
++ !dev->eraseBlockInNAND ||
++ !dev->markNANDBlockBad)
++ return 0;
++
++ if(forWriting && !yaffs_CheckpointSpaceOk(dev))
++ return 0;
++
++ if(!dev->checkpointBuffer)
++ dev->checkpointBuffer = YMALLOC_DMA(dev->nDataBytesPerChunk);
++ if(!dev->checkpointBuffer)
++ return 0;
++
++
++ dev->checkpointPageSequence = 0;
++
++ dev->checkpointOpenForWrite = forWriting;
++
++ dev->checkpointByteCount = 0;
++ dev->checkpointCurrentBlock = -1;
++ dev->checkpointCurrentChunk = -1;
++ dev->checkpointNextBlock = dev->internalStartBlock;
++
++ /* Erase all the blocks in the checkpoint area */
++ if(forWriting){
++ memset(dev->checkpointBuffer,0,dev->nDataBytesPerChunk);
++ dev->checkpointByteOffset = 0;
++ return yaffs_CheckpointErase(dev);
++
++
++ } else {
++ int i;
++ /* Set to a value that will kick off a read */
++ dev->checkpointByteOffset = dev->nDataBytesPerChunk;
++ /* A checkpoint block list of 1 checkpoint block per 16 block is (hopefully)
++ * going to be way more than we need */
++ dev->blocksInCheckpoint = 0;
++ dev->checkpointMaxBlocks = (dev->internalEndBlock - dev->internalStartBlock)/16 + 2;
++ dev->checkpointBlockList = YMALLOC(sizeof(int) * dev->checkpointMaxBlocks);
++ for(i = 0; i < dev->checkpointMaxBlocks; i++)
++ dev->checkpointBlockList[i] = -1;
++ }
++
++ return 1;
++}
++
++static int yaffs_CheckpointFlushBuffer(yaffs_Device *dev)
++{
++
++ int chunk;
++ int realignedChunk;
++
++ yaffs_ExtendedTags tags;
++
++ if(dev->checkpointCurrentBlock < 0){
++ yaffs_CheckpointFindNextErasedBlock(dev);
++ dev->checkpointCurrentChunk = 0;
++ }
++
++ if(dev->checkpointCurrentBlock < 0)
++ return 0;
++
++ tags.chunkDeleted = 0;
++ tags.objectId = dev->checkpointNextBlock; /* Hint to next place to look */
++ tags.chunkId = dev->checkpointPageSequence + 1;
++ tags.sequenceNumber = YAFFS_SEQUENCE_CHECKPOINT_DATA;
++ tags.byteCount = dev->nDataBytesPerChunk;
++ if(dev->checkpointCurrentChunk == 0){
++ /* First chunk we write for the block? Set block state to
++ checkpoint */
++ yaffs_BlockInfo *bi = yaffs_GetBlockInfo(dev,dev->checkpointCurrentBlock);
++ bi->blockState = YAFFS_BLOCK_STATE_CHECKPOINT;
++ dev->blocksInCheckpoint++;
++ }
++
++ chunk = dev->checkpointCurrentBlock * dev->nChunksPerBlock + dev->checkpointCurrentChunk;
++
++
++ T(YAFFS_TRACE_CHECKPOINT,(TSTR("checkpoint wite buffer nand %d(%d:%d) objid %d chId %d" TENDSTR),
++ chunk, dev->checkpointCurrentBlock, dev->checkpointCurrentChunk,tags.objectId,tags.chunkId));
++
++ realignedChunk = chunk - dev->chunkOffset;
++
++ dev->writeChunkWithTagsToNAND(dev,realignedChunk,dev->checkpointBuffer,&tags);
++ dev->checkpointByteOffset = 0;
++ dev->checkpointPageSequence++;
++ dev->checkpointCurrentChunk++;
++ if(dev->checkpointCurrentChunk >= dev->nChunksPerBlock){
++ dev->checkpointCurrentChunk = 0;
++ dev->checkpointCurrentBlock = -1;
++ }
++ memset(dev->checkpointBuffer,0,dev->nDataBytesPerChunk);
++
++ return 1;
++}
++
++
++int yaffs_CheckpointWrite(yaffs_Device *dev,const void *data, int nBytes)
++{
++ int i=0;
++ int ok = 1;
++
++
++ __u8 * dataBytes = (__u8 *)data;
++
++
++
++ if(!dev->checkpointBuffer)
++ return 0;
++
++ while(i < nBytes && ok) {
++
++
++
++ dev->checkpointBuffer[dev->checkpointByteOffset] = *dataBytes ;
++ dev->checkpointByteOffset++;
++ i++;
++ dataBytes++;
++ dev->checkpointByteCount++;
++
++
++ if(dev->checkpointByteOffset < 0 ||
++ dev->checkpointByteOffset >= dev->nDataBytesPerChunk)
++ ok = yaffs_CheckpointFlushBuffer(dev);
++
++ }
++
++ return i;
++}
++
++int yaffs_CheckpointRead(yaffs_Device *dev, void *data, int nBytes)
++{
++ int i=0;
++ int ok = 1;
++ yaffs_ExtendedTags tags;
++
++
++ int chunk;
++ int realignedChunk;
++
++ __u8 *dataBytes = (__u8 *)data;
++
++ if(!dev->checkpointBuffer)
++ return 0;
++
++ while(i < nBytes && ok) {
++
++
++ if(dev->checkpointByteOffset < 0 ||
++ dev->checkpointByteOffset >= dev->nDataBytesPerChunk) {
++
++ if(dev->checkpointCurrentBlock < 0){
++ yaffs_CheckpointFindNextCheckpointBlock(dev);
++ dev->checkpointCurrentChunk = 0;
++ }
++
++ if(dev->checkpointCurrentBlock < 0)
++ ok = 0;
++ else {
++
++ chunk = dev->checkpointCurrentBlock * dev->nChunksPerBlock +
++ dev->checkpointCurrentChunk;
++
++ realignedChunk = chunk - dev->chunkOffset;
++
++ /* read in the next chunk */
++ /* printf("read checkpoint page %d\n",dev->checkpointPage); */
++ dev->readChunkWithTagsFromNAND(dev, realignedChunk,
++ dev->checkpointBuffer,
++ &tags);
++
++ if(tags.chunkId != (dev->checkpointPageSequence + 1) ||
++ tags.sequenceNumber != YAFFS_SEQUENCE_CHECKPOINT_DATA)
++ ok = 0;
++
++ dev->checkpointByteOffset = 0;
++ dev->checkpointPageSequence++;
++ dev->checkpointCurrentChunk++;
++
++ if(dev->checkpointCurrentChunk >= dev->nChunksPerBlock)
++ dev->checkpointCurrentBlock = -1;
++ }
++ }
++
++ if(ok){
++ *dataBytes = dev->checkpointBuffer[dev->checkpointByteOffset];
++ dev->checkpointByteOffset++;
++ i++;
++ dataBytes++;
++ dev->checkpointByteCount++;
++ }
++ }
++
++ return i;
++}
++
++int yaffs_CheckpointClose(yaffs_Device *dev)
++{
++
++ if(dev->checkpointOpenForWrite){
++ if(dev->checkpointByteOffset != 0)
++ yaffs_CheckpointFlushBuffer(dev);
++ } else {
++ int i;
++ for(i = 0; i < dev->blocksInCheckpoint && dev->checkpointBlockList[i] >= 0; i++){
++ yaffs_BlockInfo *bi = yaffs_GetBlockInfo(dev,dev->checkpointBlockList[i]);
++ if(bi->blockState == YAFFS_BLOCK_STATE_EMPTY)
++ bi->blockState = YAFFS_BLOCK_STATE_CHECKPOINT;
++ else {
++ // Todo this looks odd...
++ }
++ }
++ YFREE(dev->checkpointBlockList);
++ dev->checkpointBlockList = NULL;
++ }
++
++ dev->nFreeChunks -= dev->blocksInCheckpoint * dev->nChunksPerBlock;
++ dev->nErasedBlocks -= dev->blocksInCheckpoint;
++
++
++ T(YAFFS_TRACE_CHECKPOINT,(TSTR("checkpoint byte count %d" TENDSTR),
++ dev->checkpointByteCount));
++
++ if(dev->checkpointBuffer){
++ /* free the buffer */
++ YFREE(dev->checkpointBuffer);
++ dev->checkpointBuffer = NULL;
++ return 1;
++ }
++ else
++ return 0;
++
++}
++
++int yaffs_CheckpointInvalidateStream(yaffs_Device *dev)
++{
++ /* Erase the first checksum block */
++
++ T(YAFFS_TRACE_CHECKPOINT,(TSTR("checkpoint invalidate"TENDSTR)));
++
++ if(!yaffs_CheckpointSpaceOk(dev))
++ return 0;
++
++ return yaffs_CheckpointErase(dev);
++}
++
++
++
+diff -urN linux.old/fs/yaffs2/yaffs_checkptrw.h linux.dev/fs/yaffs2/yaffs_checkptrw.h
+--- linux.old/fs/yaffs2/yaffs_checkptrw.h 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_checkptrw.h 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,18 @@
++#ifndef __YAFFS_CHECKPTRW_H__
++#define __YAFFS_CHECKPTRW_H__
++
++#include "yaffs_guts.h"
++
++int yaffs_CheckpointOpen(yaffs_Device *dev, int forWriting);
++
++int yaffs_CheckpointWrite(yaffs_Device *dev,const void *data, int nBytes);
++
++int yaffs_CheckpointRead(yaffs_Device *dev,void *data, int nBytes);
++
++int yaffs_CheckpointClose(yaffs_Device *dev);
++
++int yaffs_CheckpointInvalidateStream(yaffs_Device *dev);
++
++
++#endif
++
+diff -urN linux.old/fs/yaffs2/yaffs_ecc.c linux.dev/fs/yaffs2/yaffs_ecc.c
+--- linux.old/fs/yaffs2/yaffs_ecc.c 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_ecc.c 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,333 @@
++/*
++ * YAFFS: Yet another FFS. A NAND-flash specific file system.
++ *
++ * yaffs_ecc.c: ECC generation/correction algorithms.
++ *
++ * Copyright (C) 2002 Aleph One Ltd.
++ *
++ * Created by Charles Manning <charles@aleph1.co.uk>
++ *
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU Lesser General Public License
++ * version 2.1 as published by the Free Software Foundation.
++ */
++
++ /*
++ * This code implements the ECC algorithm used in SmartMedia.
++ *
++ * The ECC comprises 22 bits of parity information and is stuffed into 3 bytes.
++ * The two unused bit are set to 1.
++ * The ECC can correct single bit errors in a 256-byte page of data. Thus, two such ECC
++ * blocks are used on a 512-byte NAND page.
++ *
++ */
++
++/* Table generated by gen-ecc.c
++ * Using a table means we do not have to calculate p1..p4 and p1'..p4'
++ * for each byte of data. These are instead provided in a table in bits7..2.
++ * Bit 0 of each entry indicates whether the entry has an odd or even parity, and therefore
++ * this bytes influence on the line parity.
++ */
++
++const char *yaffs_ecc_c_version =
++ "$Id: yaffs_ecc.c,v 1.7 2006/09/14 22:02:46 charles Exp $";
++
++#include "yportenv.h"
++
++#include "yaffs_ecc.h"
++
++static const unsigned char column_parity_table[] = {
++ 0x00, 0x55, 0x59, 0x0c, 0x65, 0x30, 0x3c, 0x69,
++ 0x69, 0x3c, 0x30, 0x65, 0x0c, 0x59, 0x55, 0x00,
++ 0x95, 0xc0, 0xcc, 0x99, 0xf0, 0xa5, 0xa9, 0xfc,
++ 0xfc, 0xa9, 0xa5, 0xf0, 0x99, 0xcc, 0xc0, 0x95,
++ 0x99, 0xcc, 0xc0, 0x95, 0xfc, 0xa9, 0xa5, 0xf0,
++ 0xf0, 0xa5, 0xa9, 0xfc, 0x95, 0xc0, 0xcc, 0x99,
++ 0x0c, 0x59, 0x55, 0x00, 0x69, 0x3c, 0x30, 0x65,
++ 0x65, 0x30, 0x3c, 0x69, 0x00, 0x55, 0x59, 0x0c,
++ 0xa5, 0xf0, 0xfc, 0xa9, 0xc0, 0x95, 0x99, 0xcc,
++ 0xcc, 0x99, 0x95, 0xc0, 0xa9, 0xfc, 0xf0, 0xa5,
++ 0x30, 0x65, 0x69, 0x3c, 0x55, 0x00, 0x0c, 0x59,
++ 0x59, 0x0c, 0x00, 0x55, 0x3c, 0x69, 0x65, 0x30,
++ 0x3c, 0x69, 0x65, 0x30, 0x59, 0x0c, 0x00, 0x55,
++ 0x55, 0x00, 0x0c, 0x59, 0x30, 0x65, 0x69, 0x3c,
++ 0xa9, 0xfc, 0xf0, 0xa5, 0xcc, 0x99, 0x95, 0xc0,
++ 0xc0, 0x95, 0x99, 0xcc, 0xa5, 0xf0, 0xfc, 0xa9,
++ 0xa9, 0xfc, 0xf0, 0xa5, 0xcc, 0x99, 0x95, 0xc0,
++ 0xc0, 0x95, 0x99, 0xcc, 0xa5, 0xf0, 0xfc, 0xa9,
++ 0x3c, 0x69, 0x65, 0x30, 0x59, 0x0c, 0x00, 0x55,
++ 0x55, 0x00, 0x0c, 0x59, 0x30, 0x65, 0x69, 0x3c,
++ 0x30, 0x65, 0x69, 0x3c, 0x55, 0x00, 0x0c, 0x59,
++ 0x59, 0x0c, 0x00, 0x55, 0x3c, 0x69, 0x65, 0x30,
++ 0xa5, 0xf0, 0xfc, 0xa9, 0xc0, 0x95, 0x99, 0xcc,
++ 0xcc, 0x99, 0x95, 0xc0, 0xa9, 0xfc, 0xf0, 0xa5,
++ 0x0c, 0x59, 0x55, 0x00, 0x69, 0x3c, 0x30, 0x65,
++ 0x65, 0x30, 0x3c, 0x69, 0x00, 0x55, 0x59, 0x0c,
++ 0x99, 0xcc, 0xc0, 0x95, 0xfc, 0xa9, 0xa5, 0xf0,
++ 0xf0, 0xa5, 0xa9, 0xfc, 0x95, 0xc0, 0xcc, 0x99,
++ 0x95, 0xc0, 0xcc, 0x99, 0xf0, 0xa5, 0xa9, 0xfc,
++ 0xfc, 0xa9, 0xa5, 0xf0, 0x99, 0xcc, 0xc0, 0x95,
++ 0x00, 0x55, 0x59, 0x0c, 0x65, 0x30, 0x3c, 0x69,
++ 0x69, 0x3c, 0x30, 0x65, 0x0c, 0x59, 0x55, 0x00,
++};
++
++/* Count the bits in an unsigned char or a U32 */
++
++static int yaffs_CountBits(unsigned char x)
++{
++ int r = 0;
++ while (x) {
++ if (x & 1)
++ r++;
++ x >>= 1;
++ }
++ return r;
++}
++
++static int yaffs_CountBits32(unsigned x)
++{
++ int r = 0;
++ while (x) {
++ if (x & 1)
++ r++;
++ x >>= 1;
++ }
++ return r;
++}
++
++/* Calculate the ECC for a 256-byte block of data */
++void yaffs_ECCCalculate(const unsigned char *data, unsigned char *ecc)
++{
++ unsigned int i;
++
++ unsigned char col_parity = 0;
++ unsigned char line_parity = 0;
++ unsigned char line_parity_prime = 0;
++ unsigned char t;
++ unsigned char b;
++
++ for (i = 0; i < 256; i++) {
++ b = column_parity_table[*data++];
++ col_parity ^= b;
++
++ if (b & 0x01) // odd number of bits in the byte
++ {
++ line_parity ^= i;
++ line_parity_prime ^= ~i;
++ }
++
++ }
++
++ ecc[2] = (~col_parity) | 0x03;
++
++ t = 0;
++ if (line_parity & 0x80)
++ t |= 0x80;
++ if (line_parity_prime & 0x80)
++ t |= 0x40;
++ if (line_parity & 0x40)
++ t |= 0x20;
++ if (line_parity_prime & 0x40)
++ t |= 0x10;
++ if (line_parity & 0x20)
++ t |= 0x08;
++ if (line_parity_prime & 0x20)
++ t |= 0x04;
++ if (line_parity & 0x10)
++ t |= 0x02;
++ if (line_parity_prime & 0x10)
++ t |= 0x01;
++ ecc[1] = ~t;
++
++ t = 0;
++ if (line_parity & 0x08)
++ t |= 0x80;
++ if (line_parity_prime & 0x08)
++ t |= 0x40;
++ if (line_parity & 0x04)
++ t |= 0x20;
++ if (line_parity_prime & 0x04)
++ t |= 0x10;
++ if (line_parity & 0x02)
++ t |= 0x08;
++ if (line_parity_prime & 0x02)
++ t |= 0x04;
++ if (line_parity & 0x01)
++ t |= 0x02;
++ if (line_parity_prime & 0x01)
++ t |= 0x01;
++ ecc[0] = ~t;
++
++#ifdef CONFIG_YAFFS_ECC_WRONG_ORDER
++ // Swap the bytes into the wrong order
++ t = ecc[0];
++ ecc[0] = ecc[1];
++ ecc[1] = t;
++#endif
++}
++
++
++/* Correct the ECC on a 256 byte block of data */
++
++int yaffs_ECCCorrect(unsigned char *data, unsigned char *read_ecc,
++ const unsigned char *test_ecc)
++{
++ unsigned char d0, d1, d2; /* deltas */
++
++ d0 = read_ecc[0] ^ test_ecc[0];
++ d1 = read_ecc[1] ^ test_ecc[1];
++ d2 = read_ecc[2] ^ test_ecc[2];
++
++ if ((d0 | d1 | d2) == 0)
++ return 0; /* no error */
++
++ if (((d0 ^ (d0 >> 1)) & 0x55) == 0x55 &&
++ ((d1 ^ (d1 >> 1)) & 0x55) == 0x55 &&
++ ((d2 ^ (d2 >> 1)) & 0x54) == 0x54) {
++ /* Single bit (recoverable) error in data */
++
++ unsigned byte;
++ unsigned bit;
++
++#ifdef CONFIG_YAFFS_ECC_WRONG_ORDER
++ // swap the bytes to correct for the wrong order
++ unsigned char t;
++
++ t = d0;
++ d0 = d1;
++ d1 = t;
++#endif
++
++ bit = byte = 0;
++
++ if (d1 & 0x80)
++ byte |= 0x80;
++ if (d1 & 0x20)
++ byte |= 0x40;
++ if (d1 & 0x08)
++ byte |= 0x20;
++ if (d1 & 0x02)
++ byte |= 0x10;
++ if (d0 & 0x80)
++ byte |= 0x08;
++ if (d0 & 0x20)
++ byte |= 0x04;
++ if (d0 & 0x08)
++ byte |= 0x02;
++ if (d0 & 0x02)
++ byte |= 0x01;
++
++ if (d2 & 0x80)
++ bit |= 0x04;
++ if (d2 & 0x20)
++ bit |= 0x02;
++ if (d2 & 0x08)
++ bit |= 0x01;
++
++ data[byte] ^= (1 << bit);
++
++ return 1; /* Corrected the error */
++ }
++
++ if ((yaffs_CountBits(d0) +
++ yaffs_CountBits(d1) +
++ yaffs_CountBits(d2)) == 1) {
++ /* Reccoverable error in ecc */
++
++ read_ecc[0] = test_ecc[0];
++ read_ecc[1] = test_ecc[1];
++ read_ecc[2] = test_ecc[2];
++
++ return 1; /* Corrected the error */
++ }
++
++ /* Unrecoverable error */
++
++ return -1;
++
++}
++
++
++/*
++ * ECCxxxOther does ECC calcs on arbitrary n bytes of data
++ */
++void yaffs_ECCCalculateOther(const unsigned char *data, unsigned nBytes,
++ yaffs_ECCOther * eccOther)
++{
++ unsigned int i;
++
++ unsigned char col_parity = 0;
++ unsigned line_parity = 0;
++ unsigned line_parity_prime = 0;
++ unsigned char b;
++
++ for (i = 0; i < nBytes; i++) {
++ b = column_parity_table[*data++];
++ col_parity ^= b;
++
++ if (b & 0x01) {
++ /* odd number of bits in the byte */
++ line_parity ^= i;
++ line_parity_prime ^= ~i;
++ }
++
++ }
++
++ eccOther->colParity = (col_parity >> 2) & 0x3f;
++ eccOther->lineParity = line_parity;
++ eccOther->lineParityPrime = line_parity_prime;
++}
++
++int yaffs_ECCCorrectOther(unsigned char *data, unsigned nBytes,
++ yaffs_ECCOther * read_ecc,
++ const yaffs_ECCOther * test_ecc)
++{
++ unsigned char cDelta; /* column parity delta */
++ unsigned lDelta; /* line parity delta */
++ unsigned lDeltaPrime; /* line parity delta */
++ unsigned bit;
++
++ cDelta = read_ecc->colParity ^ test_ecc->colParity;
++ lDelta = read_ecc->lineParity ^ test_ecc->lineParity;
++ lDeltaPrime = read_ecc->lineParityPrime ^ test_ecc->lineParityPrime;
++
++ if ((cDelta | lDelta | lDeltaPrime) == 0)
++ return 0; /* no error */
++
++ if (lDelta == ~lDeltaPrime &&
++ (((cDelta ^ (cDelta >> 1)) & 0x15) == 0x15))
++ {
++ /* Single bit (recoverable) error in data */
++
++ bit = 0;
++
++ if (cDelta & 0x20)
++ bit |= 0x04;
++ if (cDelta & 0x08)
++ bit |= 0x02;
++ if (cDelta & 0x02)
++ bit |= 0x01;
++
++ if(lDelta >= nBytes)
++ return -1;
++
++ data[lDelta] ^= (1 << bit);
++
++ return 1; /* corrected */
++ }
++
++ if ((yaffs_CountBits32(lDelta) + yaffs_CountBits32(lDeltaPrime) +
++ yaffs_CountBits(cDelta)) == 1) {
++ /* Reccoverable error in ecc */
++
++ *read_ecc = *test_ecc;
++ return 1; /* corrected */
++ }
++
++ /* Unrecoverable error */
++
++ return -1;
++
++}
++
+diff -urN linux.old/fs/yaffs2/yaffs_ecc.h linux.dev/fs/yaffs2/yaffs_ecc.h
+--- linux.old/fs/yaffs2/yaffs_ecc.h 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_ecc.h 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,44 @@
++/*
++ * YAFFS: Yet another FFS. A NAND-flash specific file system.
++ *
++ * yaffs_ecc.c: ECC generation/correction algorithms.
++ *
++ * Copyright (C) 2002 Aleph One Ltd.
++ *
++ * Created by Charles Manning <charles@aleph1.co.uk>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++ /*
++ * This code implements the ECC algorithm used in SmartMedia.
++ *
++ * The ECC comprises 22 bits of parity information and is stuffed into 3 bytes.
++ * The two unused bit are set to 1.
++ * The ECC can correct single bit errors in a 256-byte page of data. Thus, two such ECC
++ * blocks are used on a 512-byte NAND page.
++ *
++ */
++
++#ifndef __YAFFS_ECC_H__
++#define __YAFFS_ECC_H__
++
++typedef struct {
++ unsigned char colParity;
++ unsigned lineParity;
++ unsigned lineParityPrime;
++} yaffs_ECCOther;
++
++void yaffs_ECCCalculate(const unsigned char *data, unsigned char *ecc);
++int yaffs_ECCCorrect(unsigned char *data, unsigned char *read_ecc,
++ const unsigned char *test_ecc);
++
++void yaffs_ECCCalculateOther(const unsigned char *data, unsigned nBytes,
++ yaffs_ECCOther * ecc);
++int yaffs_ECCCorrectOther(unsigned char *data, unsigned nBytes,
++ yaffs_ECCOther * read_ecc,
++ const yaffs_ECCOther * test_ecc);
++#endif
+diff -urN linux.old/fs/yaffs2/yaffs_fs.c linux.dev/fs/yaffs2/yaffs_fs.c
+--- linux.old/fs/yaffs2/yaffs_fs.c 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_fs.c 2006-12-14 04:33:02.000000000 +0100
+@@ -0,0 +1,2136 @@
++/*
++ * YAFFS: Yet another FFS. A NAND-flash specific file system.
++ * yaffs_fs.c
++ *
++ * Copyright (C) 2002 Aleph One Ltd.
++ * for Toby Churchill Ltd and Brightstar Engineering
++ *
++ * Created by Charles Manning <charles@aleph1.co.uk>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * This is the file system front-end to YAFFS that hooks it up to
++ * the VFS.
++ *
++ * Special notes:
++ * >> 2.4: sb->u.generic_sbp points to the yaffs_Device associated with
++ * this superblock
++ * >> 2.6: sb->s_fs_info points to the yaffs_Device associated with this
++ * superblock
++ * >> inode->u.generic_ip points to the associated yaffs_Object.
++ *
++ * Acknowledgements:
++ * * Luc van OostenRyck for numerous patches.
++ * * Nick Bane for numerous patches.
++ * * Nick Bane for 2.5/2.6 integration.
++ * * Andras Toth for mknod rdev issue.
++ * * Michael Fischer for finding the problem with inode inconsistency.
++ * * Some code bodily lifted from JFFS2.
++ */
++
++const char *yaffs_fs_c_version =
++ "$Id: yaffs_fs.c,v 1.54 2006/10/24 18:09:15 charles Exp $";
++extern const char *yaffs_guts_c_version;
++
++#include <linux/autoconf.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/version.h>
++#include <linux/slab.h>
++#include <linux/init.h>
++#include <linux/list.h>
++#include <linux/fs.h>
++#include <linux/proc_fs.h>
++#include <linux/smp_lock.h>
++#include <linux/pagemap.h>
++#include <linux/mtd/mtd.h>
++#include <linux/interrupt.h>
++#include <linux/string.h>
++#include <linux/ctype.h>
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++
++#include <linux/statfs.h> /* Added NCB 15-8-2003 */
++#include <asm/statfs.h>
++#define UnlockPage(p) unlock_page(p)
++#define Page_Uptodate(page) test_bit(PG_uptodate, &(page)->flags)
++
++/* FIXME: use sb->s_id instead ? */
++#define yaffs_devname(sb, buf) bdevname(sb->s_bdev, buf)
++
++#else
++
++#include <linux/locks.h>
++#define BDEVNAME_SIZE 0
++#define yaffs_devname(sb, buf) kdevname(sb->s_dev)
++
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0))
++/* added NCB 26/5/2006 for 2.4.25-vrs2-tcl1 kernel */
++#define __user
++#endif
++
++#endif
++
++#include <asm/uaccess.h>
++
++#include "yportenv.h"
++#include "yaffs_guts.h"
++
++unsigned yaffs_traceMask = YAFFS_TRACE_ALWAYS |
++ YAFFS_TRACE_BAD_BLOCKS
++ /* | 0xFFFFFFFF */;
++
++#include <linux/mtd/mtd.h>
++#include "yaffs_mtdif.h"
++#include "yaffs_mtdif2.h"
++
++/*#define T(x) printk x */
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
++#define yaffs_InodeToObject(iptr) ((yaffs_Object *)((iptr)->i_private))
++#else
++#define yaffs_InodeToObject(iptr) ((yaffs_Object *)((iptr)->u.generic_ip))
++#endif
++#define yaffs_DentryToObject(dptr) yaffs_InodeToObject((dptr)->d_inode)
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++#define yaffs_SuperToDevice(sb) ((yaffs_Device *)sb->s_fs_info)
++#else
++#define yaffs_SuperToDevice(sb) ((yaffs_Device *)sb->u.generic_sbp)
++#endif
++
++static void yaffs_put_super(struct super_block *sb);
++
++static ssize_t yaffs_file_write(struct file *f, const char *buf, size_t n,
++ loff_t * pos);
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++static int yaffs_file_flush(struct file *file, fl_owner_t id);
++#else
++static int yaffs_file_flush(struct file *file);
++#endif
++
++static int yaffs_sync_object(struct file *file, struct dentry *dentry,
++ int datasync);
++
++static int yaffs_readdir(struct file *f, void *dirent, filldir_t filldir);
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++static int yaffs_create(struct inode *dir, struct dentry *dentry, int mode,
++ struct nameidata *n);
++static struct dentry *yaffs_lookup(struct inode *dir, struct dentry *dentry,
++ struct nameidata *n);
++#else
++static int yaffs_create(struct inode *dir, struct dentry *dentry, int mode);
++static struct dentry *yaffs_lookup(struct inode *dir, struct dentry *dentry);
++#endif
++static int yaffs_link(struct dentry *old_dentry, struct inode *dir,
++ struct dentry *dentry);
++static int yaffs_unlink(struct inode *dir, struct dentry *dentry);
++static int yaffs_symlink(struct inode *dir, struct dentry *dentry,
++ const char *symname);
++static int yaffs_mkdir(struct inode *dir, struct dentry *dentry, int mode);
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++static int yaffs_mknod(struct inode *dir, struct dentry *dentry, int mode,
++ dev_t dev);
++#else
++static int yaffs_mknod(struct inode *dir, struct dentry *dentry, int mode,
++ int dev);
++#endif
++static int yaffs_rename(struct inode *old_dir, struct dentry *old_dentry,
++ struct inode *new_dir, struct dentry *new_dentry);
++static int yaffs_setattr(struct dentry *dentry, struct iattr *attr);
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++static int yaffs_sync_fs(struct super_block *sb, int wait);
++static void yaffs_write_super(struct super_block *sb);
++#else
++static int yaffs_sync_fs(struct super_block *sb);
++static int yaffs_write_super(struct super_block *sb);
++#endif
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++static int yaffs_statfs(struct dentry *dentry, struct kstatfs *buf);
++#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++static int yaffs_statfs(struct super_block *sb, struct kstatfs *buf);
++#else
++static int yaffs_statfs(struct super_block *sb, struct statfs *buf);
++#endif
++static void yaffs_read_inode(struct inode *inode);
++
++static void yaffs_put_inode(struct inode *inode);
++static void yaffs_delete_inode(struct inode *);
++static void yaffs_clear_inode(struct inode *);
++
++static int yaffs_readpage(struct file *file, struct page *page);
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++static int yaffs_writepage(struct page *page, struct writeback_control *wbc);
++#else
++static int yaffs_writepage(struct page *page);
++#endif
++static int yaffs_prepare_write(struct file *f, struct page *pg,
++ unsigned offset, unsigned to);
++static int yaffs_commit_write(struct file *f, struct page *pg, unsigned offset,
++ unsigned to);
++
++static int yaffs_readlink(struct dentry *dentry, char __user * buffer,
++ int buflen);
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13))
++static void *yaffs_follow_link(struct dentry *dentry, struct nameidata *nd);
++#else
++static int yaffs_follow_link(struct dentry *dentry, struct nameidata *nd);
++#endif
++
++static struct address_space_operations yaffs_file_address_operations = {
++ .readpage = yaffs_readpage,
++ .writepage = yaffs_writepage,
++ .prepare_write = yaffs_prepare_write,
++ .commit_write = yaffs_commit_write,
++};
++
++static struct file_operations yaffs_file_operations = {
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
++ .read = do_sync_read,
++ .write = do_sync_write,
++ .aio_read = generic_file_aio_read,
++ .aio_write = generic_file_aio_write,
++#else
++ .read = generic_file_read,
++ .write = generic_file_write,
++#endif
++ .mmap = generic_file_mmap,
++ .flush = yaffs_file_flush,
++ .fsync = yaffs_sync_object,
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++ .sendfile = generic_file_sendfile,
++#endif
++
++};
++
++static struct inode_operations yaffs_file_inode_operations = {
++ .setattr = yaffs_setattr,
++};
++
++static struct inode_operations yaffs_symlink_inode_operations = {
++ .readlink = yaffs_readlink,
++ .follow_link = yaffs_follow_link,
++ .setattr = yaffs_setattr,
++};
++
++static struct inode_operations yaffs_dir_inode_operations = {
++ .create = yaffs_create,
++ .lookup = yaffs_lookup,
++ .link = yaffs_link,
++ .unlink = yaffs_unlink,
++ .symlink = yaffs_symlink,
++ .mkdir = yaffs_mkdir,
++ .rmdir = yaffs_unlink,
++ .mknod = yaffs_mknod,
++ .rename = yaffs_rename,
++ .setattr = yaffs_setattr,
++};
++
++static struct file_operations yaffs_dir_operations = {
++ .read = generic_read_dir,
++ .readdir = yaffs_readdir,
++ .fsync = yaffs_sync_object,
++};
++
++static struct super_operations yaffs_super_ops = {
++ .statfs = yaffs_statfs,
++ .read_inode = yaffs_read_inode,
++ .put_inode = yaffs_put_inode,
++ .put_super = yaffs_put_super,
++ .delete_inode = yaffs_delete_inode,
++ .clear_inode = yaffs_clear_inode,
++ .sync_fs = yaffs_sync_fs,
++ .write_super = yaffs_write_super,
++};
++
++static void yaffs_GrossLock(yaffs_Device * dev)
++{
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs locking\n"));
++
++ down(&dev->grossLock);
++}
++
++static void yaffs_GrossUnlock(yaffs_Device * dev)
++{
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs unlocking\n"));
++ up(&dev->grossLock);
++
++}
++
++static int yaffs_readlink(struct dentry *dentry, char __user * buffer,
++ int buflen)
++{
++ unsigned char *alias;
++ int ret;
++
++ yaffs_Device *dev = yaffs_DentryToObject(dentry)->myDev;
++
++ yaffs_GrossLock(dev);
++
++ alias = yaffs_GetSymlinkAlias(yaffs_DentryToObject(dentry));
++
++ yaffs_GrossUnlock(dev);
++
++ if (!alias)
++ return -ENOMEM;
++
++ ret = vfs_readlink(dentry, buffer, buflen, alias);
++ kfree(alias);
++ return ret;
++}
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13))
++static void *yaffs_follow_link(struct dentry *dentry, struct nameidata *nd)
++#else
++static int yaffs_follow_link(struct dentry *dentry, struct nameidata *nd)
++#endif
++{
++ unsigned char *alias;
++ int ret;
++ yaffs_Device *dev = yaffs_DentryToObject(dentry)->myDev;
++
++ yaffs_GrossLock(dev);
++
++ alias = yaffs_GetSymlinkAlias(yaffs_DentryToObject(dentry));
++
++ yaffs_GrossUnlock(dev);
++
++ if (!alias)
++ {
++ ret = -ENOMEM;
++ goto out;
++ }
++
++ ret = vfs_follow_link(nd, alias);
++ kfree(alias);
++out:
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13))
++ return ERR_PTR (ret);
++#else
++ return ret;
++#endif
++}
++
++struct inode *yaffs_get_inode(struct super_block *sb, int mode, int dev,
++ yaffs_Object * obj);
++
++/*
++ * Lookup is used to find objects in the fs
++ */
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++
++static struct dentry *yaffs_lookup(struct inode *dir, struct dentry *dentry,
++ struct nameidata *n)
++#else
++static struct dentry *yaffs_lookup(struct inode *dir, struct dentry *dentry)
++#endif
++{
++ yaffs_Object *obj;
++ struct inode *inode = NULL; /* NCB 2.5/2.6 needs NULL here */
++
++ yaffs_Device *dev = yaffs_InodeToObject(dir)->myDev;
++
++ yaffs_GrossLock(dev);
++
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_lookup for %d:%s\n",
++ yaffs_InodeToObject(dir)->objectId, dentry->d_name.name));
++
++ obj =
++ yaffs_FindObjectByName(yaffs_InodeToObject(dir),
++ dentry->d_name.name);
++
++ obj = yaffs_GetEquivalentObject(obj); /* in case it was a hardlink */
++
++ /* Can't hold gross lock when calling yaffs_get_inode() */
++ yaffs_GrossUnlock(dev);
++
++ if (obj) {
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_lookup found %d\n", obj->objectId));
++
++ inode = yaffs_get_inode(dir->i_sb, obj->yst_mode, 0, obj);
++
++ if (inode) {
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_loookup dentry \n"));
++/* #if 0 asserted by NCB for 2.5/6 compatability - falls through to
++ * d_add even if NULL inode */
++#if 0
++ /*dget(dentry); // try to solve directory bug */
++ d_add(dentry, inode);
++
++ /* return dentry; */
++ return NULL;
++#endif
++ }
++
++ } else {
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_lookup not found\n"));
++
++ }
++
++/* added NCB for 2.5/6 compatability - forces add even if inode is
++ * NULL which creates dentry hash */
++ d_add(dentry, inode);
++
++ return NULL;
++ /* return (ERR_PTR(-EIO)); */
++
++}
++
++/* For now put inode is just for debugging
++ * Put inode is called when the inode **structure** is put.
++ */
++static void yaffs_put_inode(struct inode *inode)
++{
++ T(YAFFS_TRACE_OS,
++ ("yaffs_put_inode: ino %d, count %d\n", (int)inode->i_ino,
++ atomic_read(&inode->i_count)));
++
++}
++
++/* clear is called to tell the fs to release any per-inode data it holds */
++static void yaffs_clear_inode(struct inode *inode)
++{
++ yaffs_Object *obj;
++ yaffs_Device *dev;
++
++ obj = yaffs_InodeToObject(inode);
++
++ T(YAFFS_TRACE_OS,
++ ("yaffs_clear_inode: ino %d, count %d %s\n", (int)inode->i_ino,
++ atomic_read(&inode->i_count),
++ obj ? "object exists" : "null object"));
++
++ if (obj) {
++ dev = obj->myDev;
++ yaffs_GrossLock(dev);
++
++ /* Clear the association between the inode and
++ * the yaffs_Object.
++ */
++ obj->myInode = NULL;
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
++ inode->i_private = NULL;
++#else
++ inode->u.generic_ip = NULL;
++#endif
++
++ /* If the object freeing was deferred, then the real
++ * free happens now.
++ * This should fix the inode inconsistency problem.
++ */
++
++ yaffs_HandleDeferedFree(obj);
++
++ yaffs_GrossUnlock(dev);
++ }
++
++}
++
++/* delete is called when the link count is zero and the inode
++ * is put (ie. nobody wants to know about it anymore, time to
++ * delete the file).
++ * NB Must call clear_inode()
++ */
++static void yaffs_delete_inode(struct inode *inode)
++{
++ yaffs_Object *obj = yaffs_InodeToObject(inode);
++ yaffs_Device *dev;
++
++ T(YAFFS_TRACE_OS,
++ ("yaffs_delete_inode: ino %d, count %d %s\n", (int)inode->i_ino,
++ atomic_read(&inode->i_count),
++ obj ? "object exists" : "null object"));
++
++ if (obj) {
++ dev = obj->myDev;
++ yaffs_GrossLock(dev);
++ yaffs_DeleteFile(obj);
++ yaffs_GrossUnlock(dev);
++ }
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13))
++ truncate_inode_pages (&inode->i_data, 0);
++#endif
++ clear_inode(inode);
++}
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++static int yaffs_file_flush(struct file *file, fl_owner_t id)
++#else
++static int yaffs_file_flush(struct file *file)
++#endif
++{
++ yaffs_Object *obj = yaffs_DentryToObject(file->f_dentry);
++
++ yaffs_Device *dev = obj->myDev;
++
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_file_flush object %d (%s)\n", obj->objectId,
++ obj->dirty ? "dirty" : "clean"));
++
++ yaffs_GrossLock(dev);
++
++ yaffs_FlushFile(obj, 1);
++
++ yaffs_GrossUnlock(dev);
++
++ return 0;
++}
++
++static int yaffs_readpage_nolock(struct file *f, struct page *pg)
++{
++ /* Lifted from jffs2 */
++
++ yaffs_Object *obj;
++ unsigned char *pg_buf;
++ int ret;
++
++ yaffs_Device *dev;
++
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_readpage at %08x, size %08x\n",
++ (unsigned)(pg->index << PAGE_CACHE_SHIFT),
++ (unsigned)PAGE_CACHE_SIZE));
++
++ obj = yaffs_DentryToObject(f->f_dentry);
++
++ dev = obj->myDev;
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++ BUG_ON(!PageLocked(pg));
++#else
++ if (!PageLocked(pg))
++ PAGE_BUG(pg);
++#endif
++
++ pg_buf = kmap(pg);
++ /* FIXME: Can kmap fail? */
++
++ yaffs_GrossLock(dev);
++
++ ret =
++ yaffs_ReadDataFromFile(obj, pg_buf, pg->index << PAGE_CACHE_SHIFT,
++ PAGE_CACHE_SIZE);
++
++ yaffs_GrossUnlock(dev);
++
++ if (ret >= 0)
++ ret = 0;
++
++ if (ret) {
++ ClearPageUptodate(pg);
++ SetPageError(pg);
++ } else {
++ SetPageUptodate(pg);
++ ClearPageError(pg);
++ }
++
++ flush_dcache_page(pg);
++ kunmap(pg);
++
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_readpage done\n"));
++ return ret;
++}
++
++static int yaffs_readpage_unlock(struct file *f, struct page *pg)
++{
++ int ret = yaffs_readpage_nolock(f, pg);
++ UnlockPage(pg);
++ return ret;
++}
++
++static int yaffs_readpage(struct file *f, struct page *pg)
++{
++ return yaffs_readpage_unlock(f, pg);
++}
++
++/* writepage inspired by/stolen from smbfs */
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++static int yaffs_writepage(struct page *page, struct writeback_control *wbc)
++#else
++static int yaffs_writepage(struct page *page)
++#endif
++{
++ struct address_space *mapping = page->mapping;
++ loff_t offset = (loff_t) page->index << PAGE_CACHE_SHIFT;
++ struct inode *inode;
++ unsigned long end_index;
++ char *buffer;
++ yaffs_Object *obj;
++ int nWritten = 0;
++ unsigned nBytes;
++
++ if (!mapping)
++ BUG();
++ inode = mapping->host;
++ if (!inode)
++ BUG();
++
++ if (offset > inode->i_size) {
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG
++ "yaffs_writepage at %08x, inode size = %08x!!!\n",
++ (unsigned)(page->index << PAGE_CACHE_SHIFT),
++ (unsigned)inode->i_size));
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG " -> don't care!!\n"));
++ unlock_page(page);
++ return 0;
++ }
++
++ end_index = inode->i_size >> PAGE_CACHE_SHIFT;
++
++ /* easy case */
++ if (page->index < end_index) {
++ nBytes = PAGE_CACHE_SIZE;
++ } else {
++ nBytes = inode->i_size & (PAGE_CACHE_SIZE - 1);
++ }
++
++ get_page(page);
++
++ buffer = kmap(page);
++
++ obj = yaffs_InodeToObject(inode);
++ yaffs_GrossLock(obj->myDev);
++
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_writepage at %08x, size %08x\n",
++ (unsigned)(page->index << PAGE_CACHE_SHIFT), nBytes));
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "writepag0: obj = %05x, ino = %05x\n",
++ (int)obj->variant.fileVariant.fileSize, (int)inode->i_size));
++
++ nWritten =
++ yaffs_WriteDataToFile(obj, buffer, page->index << PAGE_CACHE_SHIFT,
++ nBytes, 0);
++
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "writepag1: obj = %05x, ino = %05x\n",
++ (int)obj->variant.fileVariant.fileSize, (int)inode->i_size));
++
++ yaffs_GrossUnlock(obj->myDev);
++
++ kunmap(page);
++ SetPageUptodate(page);
++ UnlockPage(page);
++ put_page(page);
++
++ return (nWritten == nBytes) ? 0 : -ENOSPC;
++}
++
++static int yaffs_prepare_write(struct file *f, struct page *pg,
++ unsigned offset, unsigned to)
++{
++
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_prepair_write\n"));
++ if (!Page_Uptodate(pg) && (offset || to < PAGE_CACHE_SIZE))
++ return yaffs_readpage_nolock(f, pg);
++
++ return 0;
++
++}
++
++static int yaffs_commit_write(struct file *f, struct page *pg, unsigned offset,
++ unsigned to)
++{
++
++ void *addr = page_address(pg) + offset;
++ loff_t pos = (((loff_t) pg->index) << PAGE_CACHE_SHIFT) + offset;
++ int nBytes = to - offset;
++ int nWritten;
++
++ unsigned spos = pos;
++ unsigned saddr = (unsigned)addr;
++
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_commit_write addr %x pos %x nBytes %d\n", saddr,
++ spos, nBytes));
++
++ nWritten = yaffs_file_write(f, addr, nBytes, &pos);
++
++ if (nWritten != nBytes) {
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG
++ "yaffs_commit_write not same size nWritten %d nBytes %d\n",
++ nWritten, nBytes));
++ SetPageError(pg);
++ ClearPageUptodate(pg);
++ } else {
++ SetPageUptodate(pg);
++ }
++
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_commit_write returning %d\n",
++ nWritten == nBytes ? 0 : nWritten));
++
++ return nWritten == nBytes ? 0 : nWritten;
++
++}
++
++static void yaffs_FillInodeFromObject(struct inode *inode, yaffs_Object * obj)
++{
++ if (inode && obj) {
++
++
++ /* Check mode against the variant type and attempt to repair if broken. */
++ __u32 mode = obj->yst_mode;
++ switch( obj->variantType ){
++ case YAFFS_OBJECT_TYPE_FILE :
++ if( ! S_ISREG(mode) ){
++ obj->yst_mode &= ~S_IFMT;
++ obj->yst_mode |= S_IFREG;
++ }
++
++ break;
++ case YAFFS_OBJECT_TYPE_SYMLINK :
++ if( ! S_ISLNK(mode) ){
++ obj->yst_mode &= ~S_IFMT;
++ obj->yst_mode |= S_IFLNK;
++ }
++
++ break;
++ case YAFFS_OBJECT_TYPE_DIRECTORY :
++ if( ! S_ISDIR(mode) ){
++ obj->yst_mode &= ~S_IFMT;
++ obj->yst_mode |= S_IFDIR;
++ }
++
++ break;
++ case YAFFS_OBJECT_TYPE_UNKNOWN :
++ case YAFFS_OBJECT_TYPE_HARDLINK :
++ case YAFFS_OBJECT_TYPE_SPECIAL :
++ default:
++ /* TODO? */
++ break;
++ }
++
++ inode->i_ino = obj->objectId;
++ inode->i_mode = obj->yst_mode;
++ inode->i_uid = obj->yst_uid;
++ inode->i_gid = obj->yst_gid;
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19))
++ inode->i_blksize = inode->i_sb->s_blocksize;
++#endif
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++
++ inode->i_rdev = old_decode_dev(obj->yst_rdev);
++ inode->i_atime.tv_sec = (time_t) (obj->yst_atime);
++ inode->i_atime.tv_nsec = 0;
++ inode->i_mtime.tv_sec = (time_t) obj->yst_mtime;
++ inode->i_mtime.tv_nsec = 0;
++ inode->i_ctime.tv_sec = (time_t) obj->yst_ctime;
++ inode->i_ctime.tv_nsec = 0;
++#else
++ inode->i_rdev = obj->yst_rdev;
++ inode->i_atime = obj->yst_atime;
++ inode->i_mtime = obj->yst_mtime;
++ inode->i_ctime = obj->yst_ctime;
++#endif
++ inode->i_size = yaffs_GetObjectFileLength(obj);
++ inode->i_blocks = (inode->i_size + 511) >> 9;
++
++ inode->i_nlink = yaffs_GetObjectLinkCount(obj);
++
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG
++ "yaffs_FillInode mode %x uid %d gid %d size %d count %d\n",
++ inode->i_mode, inode->i_uid, inode->i_gid,
++ (int)inode->i_size, atomic_read(&inode->i_count)));
++
++ switch (obj->yst_mode & S_IFMT) {
++ default: /* fifo, device or socket */
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++ init_special_inode(inode, obj->yst_mode,
++ old_decode_dev(obj->yst_rdev));
++#else
++ init_special_inode(inode, obj->yst_mode,
++ (dev_t) (obj->yst_rdev));
++#endif
++ break;
++ case S_IFREG: /* file */
++ inode->i_op = &yaffs_file_inode_operations;
++ inode->i_fop = &yaffs_file_operations;
++ inode->i_mapping->a_ops =
++ &yaffs_file_address_operations;
++ break;
++ case S_IFDIR: /* directory */
++ inode->i_op = &yaffs_dir_inode_operations;
++ inode->i_fop = &yaffs_dir_operations;
++ break;
++ case S_IFLNK: /* symlink */
++ inode->i_op = &yaffs_symlink_inode_operations;
++ break;
++ }
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18))
++ inode->i_private = obj;
++#else
++ inode->u.generic_ip = obj;
++#endif
++ obj->myInode = inode;
++
++ } else {
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_FileInode invalid parameters\n"));
++ }
++
++}
++
++struct inode *yaffs_get_inode(struct super_block *sb, int mode, int dev,
++ yaffs_Object * obj)
++{
++ struct inode *inode;
++
++ if (!sb) {
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_get_inode for NULL super_block!!\n"));
++ return NULL;
++
++ }
++
++ if (!obj) {
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_get_inode for NULL object!!\n"));
++ return NULL;
++
++ }
++
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_get_inode for object %d\n", obj->objectId));
++
++ inode = iget(sb, obj->objectId);
++
++ /* NB Side effect: iget calls back to yaffs_read_inode(). */
++ /* iget also increments the inode's i_count */
++ /* NB You can't be holding grossLock or deadlock will happen! */
++
++ return inode;
++}
++
++static ssize_t yaffs_file_write(struct file *f, const char *buf, size_t n,
++ loff_t * pos)
++{
++ yaffs_Object *obj;
++ int nWritten, ipos;
++ struct inode *inode;
++ yaffs_Device *dev;
++
++ obj = yaffs_DentryToObject(f->f_dentry);
++
++ dev = obj->myDev;
++
++ yaffs_GrossLock(dev);
++
++ inode = f->f_dentry->d_inode;
++
++ if (!S_ISBLK(inode->i_mode) && f->f_flags & O_APPEND) {
++ ipos = inode->i_size;
++ } else {
++ ipos = *pos;
++ }
++
++ if (!obj) {
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_file_write: hey obj is null!\n"));
++ } else {
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG
++ "yaffs_file_write about to write writing %d bytes"
++ "to object %d at %d\n",
++ n, obj->objectId, ipos));
++ }
++
++ nWritten = yaffs_WriteDataToFile(obj, buf, ipos, n, 0);
++
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_file_write writing %d bytes, %d written at %d\n",
++ n, nWritten, ipos));
++ if (nWritten > 0) {
++ ipos += nWritten;
++ *pos = ipos;
++ if (ipos > inode->i_size) {
++ inode->i_size = ipos;
++ inode->i_blocks = (ipos + 511) >> 9;
++
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG
++ "yaffs_file_write size updated to %d bytes, "
++ "%d blocks\n",
++ ipos, (int)(inode->i_blocks)));
++ }
++
++ }
++ yaffs_GrossUnlock(dev);
++ return nWritten == 0 ? -ENOSPC : nWritten;
++}
++
++static int yaffs_readdir(struct file *f, void *dirent, filldir_t filldir)
++{
++ yaffs_Object *obj;
++ yaffs_Device *dev;
++ struct inode *inode = f->f_dentry->d_inode;
++ unsigned long offset, curoffs;
++ struct list_head *i;
++ yaffs_Object *l;
++
++ char name[YAFFS_MAX_NAME_LENGTH + 1];
++
++ obj = yaffs_DentryToObject(f->f_dentry);
++ dev = obj->myDev;
++
++ yaffs_GrossLock(dev);
++
++ offset = f->f_pos;
++
++ T(YAFFS_TRACE_OS, ("yaffs_readdir: starting at %d\n", (int)offset));
++
++ if (offset == 0) {
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_readdir: entry . ino %d \n",
++ (int)inode->i_ino));
++ if (filldir(dirent, ".", 1, offset, inode->i_ino, DT_DIR)
++ < 0) {
++ goto out;
++ }
++ offset++;
++ f->f_pos++;
++ }
++ if (offset == 1) {
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_readdir: entry .. ino %d \n",
++ (int)f->f_dentry->d_parent->d_inode->i_ino));
++ if (filldir
++ (dirent, "..", 2, offset,
++ f->f_dentry->d_parent->d_inode->i_ino, DT_DIR) < 0) {
++ goto out;
++ }
++ offset++;
++ f->f_pos++;
++ }
++
++ curoffs = 1;
++
++ /* If the directory has changed since the open or last call to
++ readdir, rewind to after the 2 canned entries. */
++
++ if (f->f_version != inode->i_version) {
++ offset = 2;
++ f->f_pos = offset;
++ f->f_version = inode->i_version;
++ }
++
++ list_for_each(i, &obj->variant.directoryVariant.children) {
++ curoffs++;
++ if (curoffs >= offset) {
++ l = list_entry(i, yaffs_Object, siblings);
++
++ yaffs_GetObjectName(l, name,
++ YAFFS_MAX_NAME_LENGTH + 1);
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_readdir: %s inode %d\n", name,
++ yaffs_GetObjectInode(l)));
++
++ if (filldir(dirent,
++ name,
++ strlen(name),
++ offset,
++ yaffs_GetObjectInode(l),
++ yaffs_GetObjectType(l))
++ < 0) {
++ goto up_and_out;
++ }
++
++ offset++;
++ f->f_pos++;
++ }
++ }
++
++ up_and_out:
++ out:
++
++ yaffs_GrossUnlock(dev);
++
++ return 0;
++}
++
++/*
++ * File creation. Allocate an inode, and we're done..
++ */
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++static int yaffs_mknod(struct inode *dir, struct dentry *dentry, int mode,
++ dev_t rdev)
++#else
++static int yaffs_mknod(struct inode *dir, struct dentry *dentry, int mode,
++ int rdev)
++#endif
++{
++ struct inode *inode;
++
++ yaffs_Object *obj = NULL;
++ yaffs_Device *dev;
++
++ yaffs_Object *parent = yaffs_InodeToObject(dir);
++
++ int error = -ENOSPC;
++ uid_t uid = current->fsuid;
++ gid_t gid = (dir->i_mode & S_ISGID) ? dir->i_gid : current->fsgid;
++
++ if((dir->i_mode & S_ISGID) && S_ISDIR(mode))
++ mode |= S_ISGID;
++
++ if (parent) {
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_mknod: parent object %d type %d\n",
++ parent->objectId, parent->variantType));
++ } else {
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_mknod: could not get parent object\n"));
++ return -EPERM;
++ }
++
++ T(YAFFS_TRACE_OS, ("yaffs_mknod: making oject for %s, "
++ "mode %x dev %x\n",
++ dentry->d_name.name, mode, rdev));
++
++ dev = parent->myDev;
++
++ yaffs_GrossLock(dev);
++
++ switch (mode & S_IFMT) {
++ default:
++ /* Special (socket, fifo, device...) */
++ T(YAFFS_TRACE_OS, (KERN_DEBUG
++ "yaffs_mknod: making special\n"));
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++ obj =
++ yaffs_MknodSpecial(parent, dentry->d_name.name, mode, uid,
++ gid, old_encode_dev(rdev));
++#else
++ obj =
++ yaffs_MknodSpecial(parent, dentry->d_name.name, mode, uid,
++ gid, rdev);
++#endif
++ break;
++ case S_IFREG: /* file */
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_mknod: making file\n"));
++ obj =
++ yaffs_MknodFile(parent, dentry->d_name.name, mode, uid,
++ gid);
++ break;
++ case S_IFDIR: /* directory */
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_mknod: making directory\n"));
++ obj =
++ yaffs_MknodDirectory(parent, dentry->d_name.name, mode,
++ uid, gid);
++ break;
++ case S_IFLNK: /* symlink */
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_mknod: making file\n"));
++ obj = NULL; /* Do we ever get here? */
++ break;
++ }
++
++ /* Can not call yaffs_get_inode() with gross lock held */
++ yaffs_GrossUnlock(dev);
++
++ if (obj) {
++ inode = yaffs_get_inode(dir->i_sb, mode, rdev, obj);
++ d_instantiate(dentry, inode);
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_mknod created object %d count = %d\n",
++ obj->objectId, atomic_read(&inode->i_count)));
++ error = 0;
++ } else {
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_mknod failed making object\n"));
++ error = -ENOMEM;
++ }
++
++ return error;
++}
++
++static int yaffs_mkdir(struct inode *dir, struct dentry *dentry, int mode)
++{
++ int retVal;
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_mkdir\n"));
++ retVal = yaffs_mknod(dir, dentry, mode | S_IFDIR, 0);
++#if 0
++ /* attempt to fix dir bug - didn't work */
++ if (!retVal) {
++ dget(dentry);
++ }
++#endif
++ return retVal;
++}
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++static int yaffs_create(struct inode *dir, struct dentry *dentry, int mode,
++ struct nameidata *n)
++#else
++static int yaffs_create(struct inode *dir, struct dentry *dentry, int mode)
++#endif
++{
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_create\n"));
++ return yaffs_mknod(dir, dentry, mode | S_IFREG, 0);
++}
++
++static int yaffs_unlink(struct inode *dir, struct dentry *dentry)
++{
++ int retVal;
++
++ yaffs_Device *dev;
++
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_unlink %d:%s\n", (int)(dir->i_ino),
++ dentry->d_name.name));
++
++ dev = yaffs_InodeToObject(dir)->myDev;
++
++ yaffs_GrossLock(dev);
++
++ retVal = yaffs_Unlink(yaffs_InodeToObject(dir), dentry->d_name.name);
++
++ if (retVal == YAFFS_OK) {
++ dentry->d_inode->i_nlink--;
++ dir->i_version++;
++ yaffs_GrossUnlock(dev);
++ mark_inode_dirty(dentry->d_inode);
++ return 0;
++ }
++ yaffs_GrossUnlock(dev);
++ return -ENOTEMPTY;
++}
++
++/*
++ * Create a link...
++ */
++static int yaffs_link(struct dentry *old_dentry, struct inode *dir,
++ struct dentry *dentry)
++{
++ struct inode *inode = old_dentry->d_inode;
++ yaffs_Object *obj = NULL;
++ yaffs_Object *link = NULL;
++ yaffs_Device *dev;
++
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_link\n"));
++
++ obj = yaffs_InodeToObject(inode);
++ dev = obj->myDev;
++
++ yaffs_GrossLock(dev);
++
++ if (!S_ISDIR(inode->i_mode)) /* Don't link directories */
++ {
++ link =
++ yaffs_Link(yaffs_InodeToObject(dir), dentry->d_name.name,
++ obj);
++ }
++
++ if (link) {
++ old_dentry->d_inode->i_nlink = yaffs_GetObjectLinkCount(obj);
++ d_instantiate(dentry, old_dentry->d_inode);
++ atomic_inc(&old_dentry->d_inode->i_count);
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_link link count %d i_count %d\n",
++ old_dentry->d_inode->i_nlink,
++ atomic_read(&old_dentry->d_inode->i_count)));
++
++ }
++
++ yaffs_GrossUnlock(dev);
++
++ if (link) {
++
++ return 0;
++ }
++
++ return -EPERM;
++}
++
++static int yaffs_symlink(struct inode *dir, struct dentry *dentry,
++ const char *symname)
++{
++ yaffs_Object *obj;
++ yaffs_Device *dev;
++ uid_t uid = current->fsuid;
++ gid_t gid = (dir->i_mode & S_ISGID) ? dir->i_gid : current->fsgid;
++
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_symlink\n"));
++
++ dev = yaffs_InodeToObject(dir)->myDev;
++ yaffs_GrossLock(dev);
++ obj = yaffs_MknodSymLink(yaffs_InodeToObject(dir), dentry->d_name.name,
++ S_IFLNK | S_IRWXUGO, uid, gid, symname);
++ yaffs_GrossUnlock(dev);
++
++ if (obj) {
++
++ struct inode *inode;
++
++ inode = yaffs_get_inode(dir->i_sb, obj->yst_mode, 0, obj);
++ d_instantiate(dentry, inode);
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "symlink created OK\n"));
++ return 0;
++ } else {
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "symlink not created\n"));
++
++ }
++
++ return -ENOMEM;
++}
++
++static int yaffs_sync_object(struct file *file, struct dentry *dentry,
++ int datasync)
++{
++
++ yaffs_Object *obj;
++ yaffs_Device *dev;
++
++ obj = yaffs_DentryToObject(dentry);
++
++ dev = obj->myDev;
++
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_sync_object\n"));
++ yaffs_GrossLock(dev);
++ yaffs_FlushFile(obj, 1);
++ yaffs_GrossUnlock(dev);
++ return 0;
++}
++
++/*
++ * The VFS layer already does all the dentry stuff for rename.
++ *
++ * NB: POSIX says you can rename an object over an old object of the same name
++ */
++static int yaffs_rename(struct inode *old_dir, struct dentry *old_dentry,
++ struct inode *new_dir, struct dentry *new_dentry)
++{
++ yaffs_Device *dev;
++ int retVal = YAFFS_FAIL;
++ yaffs_Object *target;
++
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_rename\n"));
++ dev = yaffs_InodeToObject(old_dir)->myDev;
++
++ yaffs_GrossLock(dev);
++
++ /* Check if the target is an existing directory that is not empty. */
++ target =
++ yaffs_FindObjectByName(yaffs_InodeToObject(new_dir),
++ new_dentry->d_name.name);
++
++
++
++ if (target &&
++ target->variantType == YAFFS_OBJECT_TYPE_DIRECTORY &&
++ !list_empty(&target->variant.directoryVariant.children)) {
++
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "target is non-empty dir\n"));
++
++ retVal = YAFFS_FAIL;
++ } else {
++
++ /* Now does unlinking internally using shadowing mechanism */
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "calling yaffs_RenameObject\n"));
++
++ retVal =
++ yaffs_RenameObject(yaffs_InodeToObject(old_dir),
++ old_dentry->d_name.name,
++ yaffs_InodeToObject(new_dir),
++ new_dentry->d_name.name);
++
++ }
++ yaffs_GrossUnlock(dev);
++
++ if (retVal == YAFFS_OK) {
++ if(target) {
++ new_dentry->d_inode->i_nlink--;
++ mark_inode_dirty(new_dentry->d_inode);
++ }
++
++ return 0;
++ } else {
++ return -ENOTEMPTY;
++ }
++
++}
++
++static int yaffs_setattr(struct dentry *dentry, struct iattr *attr)
++{
++ struct inode *inode = dentry->d_inode;
++ int error;
++ yaffs_Device *dev;
++
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_setattr of object %d\n",
++ yaffs_InodeToObject(inode)->objectId));
++
++ if ((error = inode_change_ok(inode, attr)) == 0) {
++
++ dev = yaffs_InodeToObject(inode)->myDev;
++ yaffs_GrossLock(dev);
++ if (yaffs_SetAttributes(yaffs_InodeToObject(inode), attr) ==
++ YAFFS_OK) {
++ error = 0;
++ } else {
++ error = -EPERM;
++ }
++ yaffs_GrossUnlock(dev);
++ if (!error)
++ error = inode_setattr(inode, attr);
++ }
++ return error;
++}
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++static int yaffs_statfs(struct dentry *dentry, struct kstatfs *buf)
++{
++ yaffs_Device *dev = yaffs_DentryToObject(dentry)->myDev;
++ struct super_block *sb = dentry->d_sb;
++#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++static int yaffs_statfs(struct super_block *sb, struct kstatfs *buf)
++{
++ yaffs_Device *dev = yaffs_SuperToDevice(sb);
++#else
++static int yaffs_statfs(struct super_block *sb, struct statfs *buf)
++{
++ yaffs_Device *dev = yaffs_SuperToDevice(sb);
++#endif
++
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_statfs\n"));
++
++ yaffs_GrossLock(dev);
++
++ buf->f_type = YAFFS_MAGIC;
++ buf->f_bsize = sb->s_blocksize;
++ buf->f_namelen = 255;
++ if (sb->s_blocksize > dev->nDataBytesPerChunk) {
++
++ buf->f_blocks =
++ (dev->endBlock - dev->startBlock +
++ 1) * dev->nChunksPerBlock / (sb->s_blocksize /
++ dev->nDataBytesPerChunk);
++ buf->f_bfree =
++ yaffs_GetNumberOfFreeChunks(dev) / (sb->s_blocksize /
++ dev->nDataBytesPerChunk);
++ } else {
++
++ buf->f_blocks =
++ (dev->endBlock - dev->startBlock +
++ 1) * dev->nChunksPerBlock * (dev->nDataBytesPerChunk /
++ sb->s_blocksize);
++ buf->f_bfree =
++ yaffs_GetNumberOfFreeChunks(dev) * (dev->nDataBytesPerChunk /
++ sb->s_blocksize);
++ }
++ buf->f_files = 0;
++ buf->f_ffree = 0;
++ buf->f_bavail = buf->f_bfree;
++
++ yaffs_GrossUnlock(dev);
++ return 0;
++}
++
++
++
++static int yaffs_do_sync_fs(struct super_block *sb)
++{
++
++ yaffs_Device *dev = yaffs_SuperToDevice(sb);
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_do_sync_fs\n"));
++
++ if(sb->s_dirt) {
++ yaffs_GrossLock(dev);
++
++ if(dev)
++ yaffs_CheckpointSave(dev);
++
++ yaffs_GrossUnlock(dev);
++
++ sb->s_dirt = 0;
++ }
++ return 0;
++}
++
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++static void yaffs_write_super(struct super_block *sb)
++#else
++static int yaffs_write_super(struct super_block *sb)
++#endif
++{
++
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_write_super\n"));
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18))
++ return 0; /* yaffs_do_sync_fs(sb);*/
++#endif
++}
++
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++static int yaffs_sync_fs(struct super_block *sb, int wait)
++#else
++static int yaffs_sync_fs(struct super_block *sb)
++#endif
++{
++
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_sync_fs\n"));
++
++ return 0; /* yaffs_do_sync_fs(sb);*/
++
++}
++
++
++static void yaffs_read_inode(struct inode *inode)
++{
++ /* NB This is called as a side effect of other functions, but
++ * we had to release the lock to prevent deadlocks, so
++ * need to lock again.
++ */
++
++ yaffs_Object *obj;
++ yaffs_Device *dev = yaffs_SuperToDevice(inode->i_sb);
++
++ T(YAFFS_TRACE_OS,
++ (KERN_DEBUG "yaffs_read_inode for %d\n", (int)inode->i_ino));
++
++ yaffs_GrossLock(dev);
++
++ obj = yaffs_FindObjectByNumber(dev, inode->i_ino);
++
++ yaffs_FillInodeFromObject(inode, obj);
++
++ yaffs_GrossUnlock(dev);
++}
++
++static LIST_HEAD(yaffs_dev_list);
++
++static void yaffs_put_super(struct super_block *sb)
++{
++ yaffs_Device *dev = yaffs_SuperToDevice(sb);
++
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_put_super\n"));
++
++ yaffs_GrossLock(dev);
++
++ yaffs_FlushEntireDeviceCache(dev);
++
++ if (dev->putSuperFunc) {
++ dev->putSuperFunc(sb);
++ }
++
++ yaffs_CheckpointSave(dev);
++ yaffs_Deinitialise(dev);
++
++ yaffs_GrossUnlock(dev);
++
++ /* we assume this is protected by lock_kernel() in mount/umount */
++ list_del(&dev->devList);
++
++ if(dev->spareBuffer){
++ YFREE(dev->spareBuffer);
++ dev->spareBuffer = NULL;
++ }
++
++ kfree(dev);
++}
++
++
++static void yaffs_MTDPutSuper(struct super_block *sb)
++{
++
++ struct mtd_info *mtd = yaffs_SuperToDevice(sb)->genericDevice;
++
++ if (mtd->sync) {
++ mtd->sync(mtd);
++ }
++
++ put_mtd_device(mtd);
++}
++
++
++static void yaffs_MarkSuperBlockDirty(void *vsb)
++{
++ struct super_block *sb = (struct super_block *)vsb;
++
++ T(YAFFS_TRACE_OS, (KERN_DEBUG "yaffs_MarkSuperBlockDirty() sb = %p\n",sb));
++// if(sb)
++// sb->s_dirt = 1;
++}
++
++static struct super_block *yaffs_internal_read_super(int yaffsVersion,
++ struct super_block *sb,
++ void *data, int silent)
++{
++ int nBlocks;
++ struct inode *inode = NULL;
++ struct dentry *root;
++ yaffs_Device *dev = 0;
++ char devname_buf[BDEVNAME_SIZE + 1];
++ struct mtd_info *mtd;
++ int err;
++
++ sb->s_magic = YAFFS_MAGIC;
++ sb->s_op = &yaffs_super_ops;
++
++ if (!sb)
++ printk(KERN_INFO "yaffs: sb is NULL\n");
++ else if (!sb->s_dev)
++ printk(KERN_INFO "yaffs: sb->s_dev is NULL\n");
++ else if (!yaffs_devname(sb, devname_buf))
++ printk(KERN_INFO "yaffs: devname is NULL\n");
++ else
++ printk(KERN_INFO "yaffs: dev is %d name is \"%s\"\n",
++ sb->s_dev,
++ yaffs_devname(sb, devname_buf));
++
++ sb->s_blocksize = PAGE_CACHE_SIZE;
++ sb->s_blocksize_bits = PAGE_CACHE_SHIFT;
++ T(YAFFS_TRACE_OS, ("yaffs_read_super: Using yaffs%d\n", yaffsVersion));
++ T(YAFFS_TRACE_OS,
++ ("yaffs_read_super: block size %d\n", (int)(sb->s_blocksize)));
++
++#ifdef CONFIG_YAFFS_DISABLE_WRITE_VERIFY
++ T(YAFFS_TRACE_OS,
++ ("yaffs: Write verification disabled. All guarantees "
++ "null and void\n"));
++#endif
++
++ T(YAFFS_TRACE_ALWAYS, ("yaffs: Attempting MTD mount on %u.%u, "
++ "\"%s\"\n",
++ MAJOR(sb->s_dev), MINOR(sb->s_dev),
++ yaffs_devname(sb, devname_buf)));
++
++ /* Check it's an mtd device..... */
++ if (MAJOR(sb->s_dev) != MTD_BLOCK_MAJOR) {
++ return NULL; /* This isn't an mtd device */
++ }
++ /* Get the device */
++ mtd = get_mtd_device(NULL, MINOR(sb->s_dev));
++ if (!mtd) {
++ T(YAFFS_TRACE_ALWAYS,
++ ("yaffs: MTD device #%u doesn't appear to exist\n",
++ MINOR(sb->s_dev)));
++ return NULL;
++ }
++ /* Check it's NAND */
++ if (mtd->type != MTD_NANDFLASH) {
++ T(YAFFS_TRACE_ALWAYS,
++ ("yaffs: MTD device is not NAND it's type %d\n", mtd->type));
++ return NULL;
++ }
++
++ T(YAFFS_TRACE_OS, (" erase %p\n", mtd->erase));
++ T(YAFFS_TRACE_OS, (" read %p\n", mtd->read));
++ T(YAFFS_TRACE_OS, (" write %p\n", mtd->write));
++ T(YAFFS_TRACE_OS, (" readoob %p\n", mtd->read_oob));
++ T(YAFFS_TRACE_OS, (" writeoob %p\n", mtd->write_oob));
++ T(YAFFS_TRACE_OS, (" block_isbad %p\n", mtd->block_isbad));
++ T(YAFFS_TRACE_OS, (" block_markbad %p\n", mtd->block_markbad));
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++ T(YAFFS_TRACE_OS, (" writesize %d\n", mtd->writesize));
++#else
++ T(YAFFS_TRACE_OS, (" oobblock %d\n", mtd->oobblock));
++#endif
++ T(YAFFS_TRACE_OS, (" oobsize %d\n", mtd->oobsize));
++ T(YAFFS_TRACE_OS, (" erasesize %d\n", mtd->erasesize));
++ T(YAFFS_TRACE_OS, (" size %d\n", mtd->size));
++
++#ifdef CONFIG_YAFFS_AUTO_YAFFS2
++
++ if (yaffsVersion == 1 &&
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++ mtd->writesize >= 2048) {
++#else
++ mtd->oobblock >= 2048) {
++#endif
++ T(YAFFS_TRACE_ALWAYS,("yaffs: auto selecting yaffs2\n"));
++ yaffsVersion = 2;
++ }
++
++ /* Added NCB 26/5/2006 for completeness */
++ if (yaffsVersion == 2 &&
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++ mtd->writesize == 512) {
++#else
++ mtd->oobblock == 512) {
++#endif
++ T(YAFFS_TRACE_ALWAYS,("yaffs: auto selecting yaffs1\n"));
++ yaffsVersion = 1;
++ }
++
++#endif
++
++ if (yaffsVersion == 2) {
++ /* Check for version 2 style functions */
++ if (!mtd->erase ||
++ !mtd->block_isbad ||
++ !mtd->block_markbad ||
++ !mtd->read ||
++ !mtd->write ||
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++ !mtd->read_oob || !mtd->write_oob) {
++#else
++ !mtd->write_ecc ||
++ !mtd->read_ecc || !mtd->read_oob || !mtd->write_oob) {
++#endif
++ T(YAFFS_TRACE_ALWAYS,
++ ("yaffs: MTD device does not support required "
++ "functions\n"));;
++ return NULL;
++ }
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++ if (mtd->writesize < YAFFS_MIN_YAFFS2_CHUNK_SIZE ||
++#else
++ if (mtd->oobblock < YAFFS_MIN_YAFFS2_CHUNK_SIZE ||
++#endif
++ mtd->oobsize < YAFFS_MIN_YAFFS2_SPARE_SIZE) {
++ T(YAFFS_TRACE_ALWAYS,
++ ("yaffs: MTD device does not have the "
++ "right page sizes\n"));
++ return NULL;
++ }
++ } else {
++ /* Check for V1 style functions */
++ if (!mtd->erase ||
++ !mtd->read ||
++ !mtd->write ||
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++ !mtd->read_oob || !mtd->write_oob) {
++#else
++ !mtd->write_ecc ||
++ !mtd->read_ecc || !mtd->read_oob || !mtd->write_oob) {
++#endif
++ T(YAFFS_TRACE_ALWAYS,
++ ("yaffs: MTD device does not support required "
++ "functions\n"));;
++ return NULL;
++ }
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++ if (mtd->writesize < YAFFS_BYTES_PER_CHUNK ||
++#else
++ if (mtd->oobblock < YAFFS_BYTES_PER_CHUNK ||
++#endif
++ mtd->oobsize != YAFFS_BYTES_PER_SPARE) {
++ T(YAFFS_TRACE_ALWAYS,
++ ("yaffs: MTD device does not support have the "
++ "right page sizes\n"));
++ return NULL;
++ }
++ }
++
++ /* OK, so if we got here, we have an MTD that's NAND and looks
++ * like it has the right capabilities
++ * Set the yaffs_Device up for mtd
++ */
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++ sb->s_fs_info = dev = kmalloc(sizeof(yaffs_Device), GFP_KERNEL);
++#else
++ sb->u.generic_sbp = dev = kmalloc(sizeof(yaffs_Device), GFP_KERNEL);
++#endif
++ if (!dev) {
++ /* Deep shit could not allocate device structure */
++ T(YAFFS_TRACE_ALWAYS,
++ ("yaffs_read_super: Failed trying to allocate "
++ "yaffs_Device. \n"));
++ return NULL;
++ }
++
++ memset(dev, 0, sizeof(yaffs_Device));
++ dev->genericDevice = mtd;
++ dev->name = mtd->name;
++
++ /* Set up the memory size parameters.... */
++
++ nBlocks = mtd->size / (YAFFS_CHUNKS_PER_BLOCK * YAFFS_BYTES_PER_CHUNK);
++ dev->startBlock = 0;
++ dev->endBlock = nBlocks - 1;
++ dev->nChunksPerBlock = YAFFS_CHUNKS_PER_BLOCK;
++ dev->nDataBytesPerChunk = YAFFS_BYTES_PER_CHUNK;
++ dev->nReservedBlocks = 5;
++ dev->nShortOpCaches = 10; /* Enable short op caching */
++
++ /* ... and the functions. */
++ if (yaffsVersion == 2) {
++ dev->writeChunkWithTagsToNAND =
++ nandmtd2_WriteChunkWithTagsToNAND;
++ dev->readChunkWithTagsFromNAND =
++ nandmtd2_ReadChunkWithTagsFromNAND;
++ dev->markNANDBlockBad = nandmtd2_MarkNANDBlockBad;
++ dev->queryNANDBlock = nandmtd2_QueryNANDBlock;
++ dev->spareBuffer = YMALLOC(mtd->oobsize);
++ dev->isYaffs2 = 1;
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++ dev->nDataBytesPerChunk = mtd->writesize;
++ dev->nChunksPerBlock = mtd->erasesize / mtd->writesize;
++#else
++ dev->nDataBytesPerChunk = mtd->oobblock;
++ dev->nChunksPerBlock = mtd->erasesize / mtd->oobblock;
++#endif
++ nBlocks = mtd->size / mtd->erasesize;
++
++ dev->nCheckpointReservedBlocks = 0;
++ dev->startBlock = 0;
++ dev->endBlock = nBlocks - 1;
++ } else {
++ dev->writeChunkToNAND = nandmtd_WriteChunkToNAND;
++ dev->readChunkFromNAND = nandmtd_ReadChunkFromNAND;
++ dev->isYaffs2 = 0;
++ }
++ /* ... and common functions */
++ dev->eraseBlockInNAND = nandmtd_EraseBlockInNAND;
++ dev->initialiseNAND = nandmtd_InitialiseNAND;
++
++ dev->putSuperFunc = yaffs_MTDPutSuper;
++
++ dev->superBlock = (void *)sb;
++ dev->markSuperBlockDirty = yaffs_MarkSuperBlockDirty;
++
++
++#ifndef CONFIG_YAFFS_DOES_ECC
++ dev->useNANDECC = 1;
++#endif
++
++#ifdef CONFIG_YAFFS_DISABLE_WIDE_TNODES
++ dev->wideTnodesDisabled = 1;
++#endif
++
++ /* we assume this is protected by lock_kernel() in mount/umount */
++ list_add_tail(&dev->devList, &yaffs_dev_list);
++
++ init_MUTEX(&dev->grossLock);
++
++ yaffs_GrossLock(dev);
++
++ err = yaffs_GutsInitialise(dev);
++
++ T(YAFFS_TRACE_OS,
++ ("yaffs_read_super: guts initialised %s\n",
++ (err == YAFFS_OK) ? "OK" : "FAILED"));
++
++ /* Release lock before yaffs_get_inode() */
++ yaffs_GrossUnlock(dev);
++
++ /* Create root inode */
++ if (err == YAFFS_OK)
++ inode = yaffs_get_inode(sb, S_IFDIR | 0755, 0,
++ yaffs_Root(dev));
++
++ if (!inode)
++ return NULL;
++
++ inode->i_op = &yaffs_dir_inode_operations;
++ inode->i_fop = &yaffs_dir_operations;
++
++ T(YAFFS_TRACE_OS, ("yaffs_read_super: got root inode\n"));
++
++ root = d_alloc_root(inode);
++
++ T(YAFFS_TRACE_OS, ("yaffs_read_super: d_alloc_root done\n"));
++
++ if (!root) {
++ iput(inode);
++ return NULL;
++ }
++ sb->s_root = root;
++
++ T(YAFFS_TRACE_OS, ("yaffs_read_super: done\n"));
++ return sb;
++}
++
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++static int yaffs_internal_read_super_mtd(struct super_block *sb, void *data,
++ int silent)
++{
++ return yaffs_internal_read_super(1, sb, data, silent) ? 0 : -EINVAL;
++}
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++static int yaffs_read_super(struct file_system_type *fs,
++ int flags, const char *dev_name,
++ void *data, struct vfsmount *mnt)
++{
++
++ return get_sb_bdev(fs, flags, dev_name, data,
++ yaffs_internal_read_super_mtd, mnt);
++}
++#else
++static struct super_block *yaffs_read_super(struct file_system_type *fs,
++ int flags, const char *dev_name,
++ void *data)
++{
++
++ return get_sb_bdev(fs, flags, dev_name, data,
++ yaffs_internal_read_super_mtd);
++}
++#endif
++
++static struct file_system_type yaffs_fs_type = {
++ .owner = THIS_MODULE,
++ .name = "yaffs",
++ .get_sb = yaffs_read_super,
++ .kill_sb = kill_block_super,
++ .fs_flags = FS_REQUIRES_DEV,
++};
++#else
++static struct super_block *yaffs_read_super(struct super_block *sb, void *data,
++ int silent)
++{
++ return yaffs_internal_read_super(1, sb, data, silent);
++}
++
++static DECLARE_FSTYPE(yaffs_fs_type, "yaffs", yaffs_read_super,
++ FS_REQUIRES_DEV);
++#endif
++
++
++#ifdef CONFIG_YAFFS_YAFFS2
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++static int yaffs2_internal_read_super_mtd(struct super_block *sb, void *data,
++ int silent)
++{
++ return yaffs_internal_read_super(2, sb, data, silent) ? 0 : -EINVAL;
++}
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++static int yaffs2_read_super(struct file_system_type *fs,
++ int flags, const char *dev_name, void *data,
++ struct vfsmount *mnt)
++{
++ return get_sb_bdev(fs, flags, dev_name, data,
++ yaffs2_internal_read_super_mtd, mnt);
++}
++#else
++static struct super_block *yaffs2_read_super(struct file_system_type *fs,
++ int flags, const char *dev_name,
++ void *data)
++{
++
++ return get_sb_bdev(fs, flags, dev_name, data,
++ yaffs2_internal_read_super_mtd);
++}
++#endif
++
++static struct file_system_type yaffs2_fs_type = {
++ .owner = THIS_MODULE,
++ .name = "yaffs2",
++ .get_sb = yaffs2_read_super,
++ .kill_sb = kill_block_super,
++ .fs_flags = FS_REQUIRES_DEV,
++};
++#else
++static struct super_block *yaffs2_read_super(struct super_block *sb,
++ void *data, int silent)
++{
++ return yaffs_internal_read_super(2, sb, data, silent);
++}
++
++static DECLARE_FSTYPE(yaffs2_fs_type, "yaffs2", yaffs2_read_super,
++ FS_REQUIRES_DEV);
++#endif
++
++#endif /* CONFIG_YAFFS_YAFFS2 */
++
++static struct proc_dir_entry *my_proc_entry;
++
++static char *yaffs_dump_dev(char *buf, yaffs_Device * dev)
++{
++ buf += sprintf(buf, "startBlock......... %d\n", dev->startBlock);
++ buf += sprintf(buf, "endBlock........... %d\n", dev->endBlock);
++ buf += sprintf(buf, "chunkGroupBits..... %d\n", dev->chunkGroupBits);
++ buf += sprintf(buf, "chunkGroupSize..... %d\n", dev->chunkGroupSize);
++ buf += sprintf(buf, "nErasedBlocks...... %d\n", dev->nErasedBlocks);
++ buf += sprintf(buf, "nTnodesCreated..... %d\n", dev->nTnodesCreated);
++ buf += sprintf(buf, "nFreeTnodes........ %d\n", dev->nFreeTnodes);
++ buf += sprintf(buf, "nObjectsCreated.... %d\n", dev->nObjectsCreated);
++ buf += sprintf(buf, "nFreeObjects....... %d\n", dev->nFreeObjects);
++ buf += sprintf(buf, "nFreeChunks........ %d\n", dev->nFreeChunks);
++ buf += sprintf(buf, "nPageWrites........ %d\n", dev->nPageWrites);
++ buf += sprintf(buf, "nPageReads......... %d\n", dev->nPageReads);
++ buf += sprintf(buf, "nBlockErasures..... %d\n", dev->nBlockErasures);
++ buf += sprintf(buf, "nGCCopies.......... %d\n", dev->nGCCopies);
++ buf +=
++ sprintf(buf, "garbageCollections. %d\n", dev->garbageCollections);
++ buf +=
++ sprintf(buf, "passiveGCs......... %d\n",
++ dev->passiveGarbageCollections);
++ buf += sprintf(buf, "nRetriedWrites..... %d\n", dev->nRetriedWrites);
++ buf += sprintf(buf, "nRetireBlocks...... %d\n", dev->nRetiredBlocks);
++ buf += sprintf(buf, "eccFixed........... %d\n", dev->eccFixed);
++ buf += sprintf(buf, "eccUnfixed......... %d\n", dev->eccUnfixed);
++ buf += sprintf(buf, "tagsEccFixed....... %d\n", dev->tagsEccFixed);
++ buf += sprintf(buf, "tagsEccUnfixed..... %d\n", dev->tagsEccUnfixed);
++ buf += sprintf(buf, "cacheHits.......... %d\n", dev->cacheHits);
++ buf += sprintf(buf, "nDeletedFiles...... %d\n", dev->nDeletedFiles);
++ buf += sprintf(buf, "nUnlinkedFiles..... %d\n", dev->nUnlinkedFiles);
++ buf +=
++ sprintf(buf, "nBackgroudDeletions %d\n", dev->nBackgroundDeletions);
++ buf += sprintf(buf, "useNANDECC......... %d\n", dev->useNANDECC);
++ buf += sprintf(buf, "isYaffs2........... %d\n", dev->isYaffs2);
++
++ return buf;
++}
++
++static int yaffs_proc_read(char *page,
++ char **start,
++ off_t offset, int count, int *eof, void *data)
++{
++ struct list_head *item;
++ char *buf = page;
++ int step = offset;
++ int n = 0;
++
++ /* Get proc_file_read() to step 'offset' by one on each sucessive call.
++ * We use 'offset' (*ppos) to indicate where we are in devList.
++ * This also assumes the user has posted a read buffer large
++ * enough to hold the complete output; but that's life in /proc.
++ */
++
++ *(int *)start = 1;
++
++ /* Print header first */
++ if (step == 0) {
++ buf += sprintf(buf, "YAFFS built:" __DATE__ " " __TIME__
++ "\n%s\n%s\n", yaffs_fs_c_version,
++ yaffs_guts_c_version);
++ }
++
++ /* hold lock_kernel while traversing yaffs_dev_list */
++ lock_kernel();
++
++ /* Locate and print the Nth entry. Order N-squared but N is small. */
++ list_for_each(item, &yaffs_dev_list) {
++ yaffs_Device *dev = list_entry(item, yaffs_Device, devList);
++ if (n < step) {
++ n++;
++ continue;
++ }
++ buf += sprintf(buf, "\nDevice %d \"%s\"\n", n, dev->name);
++ buf = yaffs_dump_dev(buf, dev);
++ break;
++ }
++ unlock_kernel();
++
++ return buf - page < count ? buf - page : count;
++}
++
++/**
++ * Set the verbosity of the warnings and error messages.
++ *
++ */
++
++static struct {
++ char *mask_name;
++ unsigned mask_bitfield;
++} mask_flags[] = {
++ {"allocate", YAFFS_TRACE_ALLOCATE},
++ {"always", YAFFS_TRACE_ALWAYS},
++ {"bad_blocks", YAFFS_TRACE_BAD_BLOCKS},
++ {"buffers", YAFFS_TRACE_BUFFERS},
++ {"bug", YAFFS_TRACE_BUG},
++ {"deletion", YAFFS_TRACE_DELETION},
++ {"erase", YAFFS_TRACE_ERASE},
++ {"error", YAFFS_TRACE_ERROR},
++ {"gc_detail", YAFFS_TRACE_GC_DETAIL},
++ {"gc", YAFFS_TRACE_GC},
++ {"mtd", YAFFS_TRACE_MTD},
++ {"nandaccess", YAFFS_TRACE_NANDACCESS},
++ {"os", YAFFS_TRACE_OS},
++ {"scan_debug", YAFFS_TRACE_SCAN_DEBUG},
++ {"scan", YAFFS_TRACE_SCAN},
++ {"tracing", YAFFS_TRACE_TRACING},
++ {"write", YAFFS_TRACE_WRITE},
++ {"all", 0xffffffff},
++ {"none", 0},
++ {NULL, 0},
++};
++
++static int yaffs_proc_write(struct file *file, const char *buf,
++ unsigned long count, void *data)
++{
++ unsigned rg = 0, mask_bitfield;
++ char *end, *mask_name;
++ int i;
++ int done = 0;
++ int add, len;
++ int pos = 0;
++
++ rg = yaffs_traceMask;
++
++ while (!done && (pos < count)) {
++ done = 1;
++ while ((pos < count) && isspace(buf[pos])) {
++ pos++;
++ }
++
++ switch (buf[pos]) {
++ case '+':
++ case '-':
++ case '=':
++ add = buf[pos];
++ pos++;
++ break;
++
++ default:
++ add = ' ';
++ break;
++ }
++ mask_name = NULL;
++ mask_bitfield = simple_strtoul(buf + pos, &end, 0);
++ if (end > buf + pos) {
++ mask_name = "numeral";
++ len = end - (buf + pos);
++ done = 0;
++ } else {
++
++ for (i = 0; mask_flags[i].mask_name != NULL; i++) {
++ len = strlen(mask_flags[i].mask_name);
++ if (strncmp(buf + pos, mask_flags[i].mask_name, len) == 0) {
++ mask_name = mask_flags[i].mask_name;
++ mask_bitfield = mask_flags[i].mask_bitfield;
++ done = 0;
++ break;
++ }
++ }
++ }
++
++ if (mask_name != NULL) {
++ pos += len;
++ done = 0;
++ switch(add) {
++ case '-':
++ rg &= ~mask_bitfield;
++ break;
++ case '+':
++ rg |= mask_bitfield;
++ break;
++ case '=':
++ rg = mask_bitfield;
++ break;
++ default:
++ rg |= mask_bitfield;
++ break;
++ }
++ }
++ }
++
++ yaffs_traceMask = rg;
++ if (rg & YAFFS_TRACE_ALWAYS) {
++ for (i = 0; mask_flags[i].mask_name != NULL; i++) {
++ char flag;
++ flag = ((rg & mask_flags[i].mask_bitfield) == mask_flags[i].mask_bitfield) ? '+' : '-';
++ printk("%c%s\n", flag, mask_flags[i].mask_name);
++ }
++ }
++
++ return count;
++}
++
++/* Stuff to handle installation of file systems */
++struct file_system_to_install {
++ struct file_system_type *fst;
++ int installed;
++};
++
++static struct file_system_to_install fs_to_install[] = {
++//#ifdef CONFIG_YAFFS_YAFFS1
++ {&yaffs_fs_type, 0},
++//#endif
++//#ifdef CONFIG_YAFFS_YAFFS2
++ {&yaffs2_fs_type, 0},
++//#endif
++ {NULL, 0}
++};
++
++static int __init init_yaffs_fs(void)
++{
++ int error = 0;
++ struct file_system_to_install *fsinst;
++
++ T(YAFFS_TRACE_ALWAYS,
++ ("yaffs " __DATE__ " " __TIME__ " Installing. \n"));
++
++ /* Install the proc_fs entry */
++ my_proc_entry = create_proc_entry("yaffs",
++ S_IRUGO | S_IFREG,
++ &proc_root);
++
++ if (my_proc_entry) {
++ my_proc_entry->write_proc = yaffs_proc_write;
++ my_proc_entry->read_proc = yaffs_proc_read;
++ my_proc_entry->data = NULL;
++ } else {
++ return -ENOMEM;
++ }
++
++ /* Now add the file system entries */
++
++ fsinst = fs_to_install;
++
++ while (fsinst->fst && !error) {
++ error = register_filesystem(fsinst->fst);
++ if (!error) {
++ fsinst->installed = 1;
++ }
++ fsinst++;
++ }
++
++ /* Any errors? uninstall */
++ if (error) {
++ fsinst = fs_to_install;
++
++ while (fsinst->fst) {
++ if (fsinst->installed) {
++ unregister_filesystem(fsinst->fst);
++ fsinst->installed = 0;
++ }
++ fsinst++;
++ }
++ }
++
++ return error;
++}
++
++static void __exit exit_yaffs_fs(void)
++{
++
++ struct file_system_to_install *fsinst;
++
++ T(YAFFS_TRACE_ALWAYS, ("yaffs " __DATE__ " " __TIME__
++ " removing. \n"));
++
++ remove_proc_entry("yaffs", &proc_root);
++
++ fsinst = fs_to_install;
++
++ while (fsinst->fst) {
++ if (fsinst->installed) {
++ unregister_filesystem(fsinst->fst);
++ fsinst->installed = 0;
++ }
++ fsinst++;
++ }
++
++}
++
++module_init(init_yaffs_fs)
++module_exit(exit_yaffs_fs)
++
++MODULE_DESCRIPTION("YAFFS2 - a NAND specific flash file system");
++MODULE_AUTHOR("Charles Manning, Aleph One Ltd., 2002-2006");
++MODULE_LICENSE("GPL");
+diff -urN linux.old/fs/yaffs2/yaffs_guts.c linux.dev/fs/yaffs2/yaffs_guts.c
+--- linux.old/fs/yaffs2/yaffs_guts.c 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_guts.c 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,6675 @@
++/*
++ * YAFFS: Yet another FFS. A NAND-flash specific file system.
++ *
++ * Copyright (C) 2002 Aleph One Ltd.
++ * for Toby Churchill Ltd and Brightstar Engineering
++ *
++ * Created by Charles Manning <charles@aleph1.co.uk>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++const char *yaffs_guts_c_version =
++ "$Id: yaffs_guts.c,v 1.45 2006/11/14 03:07:17 charles Exp $";
++
++#include "yportenv.h"
++
++#include "yaffsinterface.h"
++#include "yaffs_guts.h"
++#include "yaffs_tagsvalidity.h"
++
++#include "yaffs_tagscompat.h"
++#ifndef CONFIG_YAFFS_OWN_SORT
++#include "yaffs_qsort.h"
++#endif
++#include "yaffs_nand.h"
++
++#include "yaffs_checkptrw.h"
++
++#include "yaffs_nand.h"
++#include "yaffs_packedtags2.h"
++
++
++#ifdef CONFIG_YAFFS_WINCE
++void yfsd_LockYAFFS(BOOL fsLockOnly);
++void yfsd_UnlockYAFFS(BOOL fsLockOnly);
++#endif
++
++#define YAFFS_PASSIVE_GC_CHUNKS 2
++
++#include "yaffs_ecc.h"
++
++
++/* Robustification (if it ever comes about...) */
++static void yaffs_RetireBlock(yaffs_Device * dev, int blockInNAND);
++static void yaffs_HandleWriteChunkError(yaffs_Device * dev, int chunkInNAND, int erasedOk);
++static void yaffs_HandleWriteChunkOk(yaffs_Device * dev, int chunkInNAND,
++ const __u8 * data,
++ const yaffs_ExtendedTags * tags);
++static void yaffs_HandleUpdateChunk(yaffs_Device * dev, int chunkInNAND,
++ const yaffs_ExtendedTags * tags);
++
++/* Other local prototypes */
++static int yaffs_UnlinkObject( yaffs_Object *obj);
++static int yaffs_ObjectHasCachedWriteData(yaffs_Object *obj);
++
++static void yaffs_HardlinkFixup(yaffs_Device *dev, yaffs_Object *hardList);
++
++static int yaffs_WriteNewChunkWithTagsToNAND(yaffs_Device * dev,
++ const __u8 * buffer,
++ yaffs_ExtendedTags * tags,
++ int useReserve);
++static int yaffs_PutChunkIntoFile(yaffs_Object * in, int chunkInInode,
++ int chunkInNAND, int inScan);
++
++static yaffs_Object *yaffs_CreateNewObject(yaffs_Device * dev, int number,
++ yaffs_ObjectType type);
++static void yaffs_AddObjectToDirectory(yaffs_Object * directory,
++ yaffs_Object * obj);
++static int yaffs_UpdateObjectHeader(yaffs_Object * in, const YCHAR * name,
++ int force, int isShrink, int shadows);
++static void yaffs_RemoveObjectFromDirectory(yaffs_Object * obj);
++static int yaffs_CheckStructures(void);
++static int yaffs_DeleteWorker(yaffs_Object * in, yaffs_Tnode * tn, __u32 level,
++ int chunkOffset, int *limit);
++static int yaffs_DoGenericObjectDeletion(yaffs_Object * in);
++
++static yaffs_BlockInfo *yaffs_GetBlockInfo(yaffs_Device * dev, int blockNo);
++
++static __u8 *yaffs_GetTempBuffer(yaffs_Device * dev, int lineNo);
++static void yaffs_ReleaseTempBuffer(yaffs_Device * dev, __u8 * buffer,
++ int lineNo);
++
++static int yaffs_CheckChunkErased(struct yaffs_DeviceStruct *dev,
++ int chunkInNAND);
++
++static int yaffs_UnlinkWorker(yaffs_Object * obj);
++static void yaffs_DestroyObject(yaffs_Object * obj);
++
++static int yaffs_TagsMatch(const yaffs_ExtendedTags * tags, int objectId,
++ int chunkInObject);
++
++loff_t yaffs_GetFileSize(yaffs_Object * obj);
++
++static int yaffs_AllocateChunk(yaffs_Device * dev, int useReserve, yaffs_BlockInfo **blockUsedPtr);
++
++static void yaffs_VerifyFreeChunks(yaffs_Device * dev);
++
++#ifdef YAFFS_PARANOID
++static int yaffs_CheckFileSanity(yaffs_Object * in);
++#else
++#define yaffs_CheckFileSanity(in)
++#endif
++
++static void yaffs_InvalidateWholeChunkCache(yaffs_Object * in);
++static void yaffs_InvalidateChunkCache(yaffs_Object * object, int chunkId);
++
++static void yaffs_InvalidateCheckpoint(yaffs_Device *dev);
++
++
++
++/* Function to calculate chunk and offset */
++
++static void yaffs_AddrToChunk(yaffs_Device *dev, loff_t addr, __u32 *chunk, __u32 *offset)
++{
++ if(dev->chunkShift){
++ /* Easy-peasy power of 2 case */
++ *chunk = (__u32)(addr >> dev->chunkShift);
++ *offset = (__u32)(addr & dev->chunkMask);
++ }
++ else if(dev->crumbsPerChunk)
++ {
++ /* Case where we're using "crumbs" */
++ *offset = (__u32)(addr & dev->crumbMask);
++ addr >>= dev->crumbShift;
++ *chunk = ((__u32)addr)/dev->crumbsPerChunk;
++ *offset += ((addr - (*chunk * dev->crumbsPerChunk)) << dev->crumbShift);
++ }
++ else
++ YBUG();
++}
++
++/* Function to return the number of shifts for a power of 2 greater than or equal
++ * to the given number
++ * Note we don't try to cater for all possible numbers and this does not have to
++ * be hellishly efficient.
++ */
++
++static __u32 ShiftsGE(__u32 x)
++{
++ int extraBits;
++ int nShifts;
++
++ nShifts = extraBits = 0;
++
++ while(x>1){
++ if(x & 1) extraBits++;
++ x>>=1;
++ nShifts++;
++ }
++
++ if(extraBits)
++ nShifts++;
++
++ return nShifts;
++}
++
++/* Function to return the number of shifts to get a 1 in bit 0
++ */
++
++static __u32 ShiftDiv(__u32 x)
++{
++ int nShifts;
++
++ nShifts = 0;
++
++ if(!x) return 0;
++
++ while( !(x&1)){
++ x>>=1;
++ nShifts++;
++ }
++
++ return nShifts;
++}
++
++
++
++/*
++ * Temporary buffer manipulations.
++ */
++
++static __u8 *yaffs_GetTempBuffer(yaffs_Device * dev, int lineNo)
++{
++ int i, j;
++ for (i = 0; i < YAFFS_N_TEMP_BUFFERS; i++) {
++ if (dev->tempBuffer[i].line == 0) {
++ dev->tempBuffer[i].line = lineNo;
++ if ((i + 1) > dev->maxTemp) {
++ dev->maxTemp = i + 1;
++ for (j = 0; j <= i; j++)
++ dev->tempBuffer[j].maxLine =
++ dev->tempBuffer[j].line;
++ }
++
++ return dev->tempBuffer[i].buffer;
++ }
++ }
++
++ T(YAFFS_TRACE_BUFFERS,
++ (TSTR("Out of temp buffers at line %d, other held by lines:"),
++ lineNo));
++ for (i = 0; i < YAFFS_N_TEMP_BUFFERS; i++) {
++ T(YAFFS_TRACE_BUFFERS, (TSTR(" %d "), dev->tempBuffer[i].line));
++ }
++ T(YAFFS_TRACE_BUFFERS, (TSTR(" " TENDSTR)));
++
++ /*
++ * If we got here then we have to allocate an unmanaged one
++ * This is not good.
++ */
++
++ dev->unmanagedTempAllocations++;
++ return YMALLOC(dev->nDataBytesPerChunk);
++
++}
++
++static void yaffs_ReleaseTempBuffer(yaffs_Device * dev, __u8 * buffer,
++ int lineNo)
++{
++ int i;
++ for (i = 0; i < YAFFS_N_TEMP_BUFFERS; i++) {
++ if (dev->tempBuffer[i].buffer == buffer) {
++ dev->tempBuffer[i].line = 0;
++ return;
++ }
++ }
++
++ if (buffer) {
++ /* assume it is an unmanaged one. */
++ T(YAFFS_TRACE_BUFFERS,
++ (TSTR("Releasing unmanaged temp buffer in line %d" TENDSTR),
++ lineNo));
++ YFREE(buffer);
++ dev->unmanagedTempDeallocations++;
++ }
++
++}
++
++/*
++ * Determine if we have a managed buffer.
++ */
++int yaffs_IsManagedTempBuffer(yaffs_Device * dev, const __u8 * buffer)
++{
++ int i;
++ for (i = 0; i < YAFFS_N_TEMP_BUFFERS; i++) {
++ if (dev->tempBuffer[i].buffer == buffer)
++ return 1;
++
++ }
++
++ for (i = 0; i < dev->nShortOpCaches; i++) {
++ if( dev->srCache[i].data == buffer )
++ return 1;
++
++ }
++
++ if (buffer == dev->checkpointBuffer)
++ return 1;
++
++ T(YAFFS_TRACE_ALWAYS,
++ (TSTR("yaffs: unmaged buffer detected.\n" TENDSTR)));
++ return 0;
++}
++
++/*
++ * Chunk bitmap manipulations
++ */
++
++static Y_INLINE __u8 *yaffs_BlockBits(yaffs_Device * dev, int blk)
++{
++ if (blk < dev->internalStartBlock || blk > dev->internalEndBlock) {
++ T(YAFFS_TRACE_ERROR,
++ (TSTR("**>> yaffs: BlockBits block %d is not valid" TENDSTR),
++ blk));
++ YBUG();
++ }
++ return dev->chunkBits +
++ (dev->chunkBitmapStride * (blk - dev->internalStartBlock));
++}
++
++static Y_INLINE void yaffs_ClearChunkBits(yaffs_Device * dev, int blk)
++{
++ __u8 *blkBits = yaffs_BlockBits(dev, blk);
++
++ memset(blkBits, 0, dev->chunkBitmapStride);
++}
++
++static Y_INLINE void yaffs_ClearChunkBit(yaffs_Device * dev, int blk, int chunk)
++{
++ __u8 *blkBits = yaffs_BlockBits(dev, blk);
++
++ blkBits[chunk / 8] &= ~(1 << (chunk & 7));
++}
++
++static Y_INLINE void yaffs_SetChunkBit(yaffs_Device * dev, int blk, int chunk)
++{
++ __u8 *blkBits = yaffs_BlockBits(dev, blk);
++
++ blkBits[chunk / 8] |= (1 << (chunk & 7));
++}
++
++static Y_INLINE int yaffs_CheckChunkBit(yaffs_Device * dev, int blk, int chunk)
++{
++ __u8 *blkBits = yaffs_BlockBits(dev, blk);
++ return (blkBits[chunk / 8] & (1 << (chunk & 7))) ? 1 : 0;
++}
++
++static Y_INLINE int yaffs_StillSomeChunkBits(yaffs_Device * dev, int blk)
++{
++ __u8 *blkBits = yaffs_BlockBits(dev, blk);
++ int i;
++ for (i = 0; i < dev->chunkBitmapStride; i++) {
++ if (*blkBits)
++ return 1;
++ blkBits++;
++ }
++ return 0;
++}
++
++/*
++ * Simple hash function. Needs to have a reasonable spread
++ */
++
++static Y_INLINE int yaffs_HashFunction(int n)
++{
++ n = abs(n);
++ return (n % YAFFS_NOBJECT_BUCKETS);
++}
++
++/*
++ * Access functions to useful fake objects
++ */
++
++yaffs_Object *yaffs_Root(yaffs_Device * dev)
++{
++ return dev->rootDir;
++}
++
++yaffs_Object *yaffs_LostNFound(yaffs_Device * dev)
++{
++ return dev->lostNFoundDir;
++}
++
++
++/*
++ * Erased NAND checking functions
++ */
++
++int yaffs_CheckFF(__u8 * buffer, int nBytes)
++{
++ /* Horrible, slow implementation */
++ while (nBytes--) {
++ if (*buffer != 0xFF)
++ return 0;
++ buffer++;
++ }
++ return 1;
++}
++
++static int yaffs_CheckChunkErased(struct yaffs_DeviceStruct *dev,
++ int chunkInNAND)
++{
++
++ int retval = YAFFS_OK;
++ __u8 *data = yaffs_GetTempBuffer(dev, __LINE__);
++ yaffs_ExtendedTags tags;
++ int result;
++
++ result = yaffs_ReadChunkWithTagsFromNAND(dev, chunkInNAND, data, &tags);
++
++ if(tags.eccResult > YAFFS_ECC_RESULT_NO_ERROR)
++ retval = YAFFS_FAIL;
++
++
++ if (!yaffs_CheckFF(data, dev->nDataBytesPerChunk) || tags.chunkUsed) {
++ T(YAFFS_TRACE_NANDACCESS,
++ (TSTR("Chunk %d not erased" TENDSTR), chunkInNAND));
++ retval = YAFFS_FAIL;
++ }
++
++ yaffs_ReleaseTempBuffer(dev, data, __LINE__);
++
++ return retval;
++
++}
++
++static int yaffs_WriteNewChunkWithTagsToNAND(struct yaffs_DeviceStruct *dev,
++ const __u8 * data,
++ yaffs_ExtendedTags * tags,
++ int useReserve)
++{
++ int chunk;
++
++ int writeOk = 0;
++ int erasedOk = 1;
++ int attempts = 0;
++ yaffs_BlockInfo *bi;
++
++ yaffs_InvalidateCheckpoint(dev);
++
++ do {
++ chunk = yaffs_AllocateChunk(dev, useReserve,&bi);
++
++ if (chunk >= 0) {
++ /* First check this chunk is erased, if it needs checking.
++ * The checking policy (unless forced always on) is as follows:
++ * Check the first page we try to write in a block.
++ * - If the check passes then we don't need to check any more.
++ * - If the check fails, we check again...
++ * If the block has been erased, we don't need to check.
++ *
++ * However, if the block has been prioritised for gc, then
++ * we think there might be something odd about this block
++ * and stop using it.
++ *
++ * Rationale:
++ * We should only ever see chunks that have not been erased
++ * if there was a partially written chunk due to power loss
++ * This checking policy should catch that case with very
++ * few checks and thus save a lot of checks that are most likely not
++ * needed.
++ */
++
++ if(bi->gcPrioritise){
++ yaffs_DeleteChunk(dev, chunk, 1, __LINE__);
++ } else {
++#ifdef CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED
++
++ bi->skipErasedCheck = 0;
++
++#endif
++ if(!bi->skipErasedCheck){
++ erasedOk = yaffs_CheckChunkErased(dev, chunk);
++ if(erasedOk && !bi->gcPrioritise)
++ bi->skipErasedCheck = 1;
++ }
++
++ if (!erasedOk) {
++ T(YAFFS_TRACE_ERROR,
++ (TSTR
++ ("**>> yaffs chunk %d was not erased"
++ TENDSTR), chunk));
++ } else {
++ writeOk =
++ yaffs_WriteChunkWithTagsToNAND(dev, chunk,
++ data, tags);
++ }
++
++ attempts++;
++
++ if (writeOk) {
++ /*
++ * Copy the data into the robustification buffer.
++ * NB We do this at the end to prevent duplicates in the case of a write error.
++ * Todo
++ */
++ yaffs_HandleWriteChunkOk(dev, chunk, data, tags);
++
++ } else {
++ /* The erased check or write failed */
++ yaffs_HandleWriteChunkError(dev, chunk, erasedOk);
++ }
++ }
++ }
++
++ } while (chunk >= 0 && !writeOk);
++
++ if (attempts > 1) {
++ T(YAFFS_TRACE_ERROR,
++ (TSTR("**>> yaffs write required %d attempts" TENDSTR),
++ attempts));
++ dev->nRetriedWrites += (attempts - 1);
++ }
++
++ return chunk;
++}
++
++/*
++ * Block retiring for handling a broken block.
++ */
++
++static void yaffs_RetireBlock(yaffs_Device * dev, int blockInNAND)
++{
++ yaffs_BlockInfo *bi = yaffs_GetBlockInfo(dev, blockInNAND);
++
++ yaffs_InvalidateCheckpoint(dev);
++
++ yaffs_MarkBlockBad(dev, blockInNAND);
++
++ bi->blockState = YAFFS_BLOCK_STATE_DEAD;
++ bi->gcPrioritise = 0;
++ bi->needsRetiring = 0;
++
++ dev->nRetiredBlocks++;
++}
++
++/*
++ * Functions for robustisizing TODO
++ *
++ */
++
++static void yaffs_HandleWriteChunkOk(yaffs_Device * dev, int chunkInNAND,
++ const __u8 * data,
++ const yaffs_ExtendedTags * tags)
++{
++}
++
++static void yaffs_HandleUpdateChunk(yaffs_Device * dev, int chunkInNAND,
++ const yaffs_ExtendedTags * tags)
++{
++}
++
++void yaffs_HandleChunkError(yaffs_Device *dev, yaffs_BlockInfo *bi)
++{
++ if(!bi->gcPrioritise){
++ bi->gcPrioritise = 1;
++ dev->hasPendingPrioritisedGCs = 1;
++ bi->chunkErrorStrikes ++;
++
++ if(bi->chunkErrorStrikes > 3){
++ bi->needsRetiring = 1; /* Too many stikes, so retire this */
++ T(YAFFS_TRACE_ALWAYS, (TSTR("yaffs: Block struck out" TENDSTR)));
++
++ }
++
++ }
++}
++
++static void yaffs_ReportOddballBlocks(yaffs_Device *dev)
++{
++ int i;
++
++ for(i = dev->internalStartBlock; i <= dev->internalEndBlock && (yaffs_traceMask & YAFFS_TRACE_BAD_BLOCKS); i++){
++ yaffs_BlockInfo *bi = yaffs_GetBlockInfo(dev,i);
++ if(bi->needsRetiring || bi->gcPrioritise)
++ T(YAFFS_TRACE_BAD_BLOCKS,(TSTR("yaffs block %d%s%s" TENDSTR),
++ i,
++ bi->needsRetiring ? " needs retiring" : "",
++ bi->gcPrioritise ? " gc prioritised" : ""));
++
++ }
++}
++
++static void yaffs_HandleWriteChunkError(yaffs_Device * dev, int chunkInNAND, int erasedOk)
++{
++
++ int blockInNAND = chunkInNAND / dev->nChunksPerBlock;
++ yaffs_BlockInfo *bi = yaffs_GetBlockInfo(dev, blockInNAND);
++
++ yaffs_HandleChunkError(dev,bi);
++
++
++ if(erasedOk ) {
++ /* Was an actual write failure, so mark the block for retirement */
++ bi->needsRetiring = 1;
++ T(YAFFS_TRACE_ERROR | YAFFS_TRACE_BAD_BLOCKS,
++ (TSTR("**>> Block %d needs retiring" TENDSTR), blockInNAND));
++
++
++ }
++
++ /* Delete the chunk */
++ yaffs_DeleteChunk(dev, chunkInNAND, 1, __LINE__);
++}
++
++
++/*---------------- Name handling functions ------------*/
++
++static __u16 yaffs_CalcNameSum(const YCHAR * name)
++{
++ __u16 sum = 0;
++ __u16 i = 1;
++
++ YUCHAR *bname = (YUCHAR *) name;
++ if (bname) {
++ while ((*bname) && (i <= YAFFS_MAX_NAME_LENGTH)) {
++
++#ifdef CONFIG_YAFFS_CASE_INSENSITIVE
++ sum += yaffs_toupper(*bname) * i;
++#else
++ sum += (*bname) * i;
++#endif
++ i++;
++ bname++;
++ }
++ }
++ return sum;
++}
++
++static void yaffs_SetObjectName(yaffs_Object * obj, const YCHAR * name)
++{
++#ifdef CONFIG_YAFFS_SHORT_NAMES_IN_RAM
++ if (name && yaffs_strlen(name) <= YAFFS_SHORT_NAME_LENGTH) {
++ yaffs_strcpy(obj->shortName, name);
++ } else {
++ obj->shortName[0] = _Y('\0');
++ }
++#endif
++ obj->sum = yaffs_CalcNameSum(name);
++}
++
++/*-------------------- TNODES -------------------
++
++ * List of spare tnodes
++ * The list is hooked together using the first pointer
++ * in the tnode.
++ */
++
++/* yaffs_CreateTnodes creates a bunch more tnodes and
++ * adds them to the tnode free list.
++ * Don't use this function directly
++ */
++
++static int yaffs_CreateTnodes(yaffs_Device * dev, int nTnodes)
++{
++ int i;
++ int tnodeSize;
++ yaffs_Tnode *newTnodes;
++ __u8 *mem;
++ yaffs_Tnode *curr;
++ yaffs_Tnode *next;
++ yaffs_TnodeList *tnl;
++
++ if (nTnodes < 1)
++ return YAFFS_OK;
++
++ /* Calculate the tnode size in bytes for variable width tnode support.
++ * Must be a multiple of 32-bits */
++ tnodeSize = (dev->tnodeWidth * YAFFS_NTNODES_LEVEL0)/8;
++
++ /* make these things */
++
++ newTnodes = YMALLOC(nTnodes * tnodeSize);
++ mem = (__u8 *)newTnodes;
++
++ if (!newTnodes) {
++ T(YAFFS_TRACE_ERROR,
++ (TSTR("yaffs: Could not allocate Tnodes" TENDSTR)));
++ return YAFFS_FAIL;
++ }
++
++ /* Hook them into the free list */
++#if 0
++ for (i = 0; i < nTnodes - 1; i++) {
++ newTnodes[i].internal[0] = &newTnodes[i + 1];
++#ifdef CONFIG_YAFFS_TNODE_LIST_DEBUG
++ newTnodes[i].internal[YAFFS_NTNODES_INTERNAL] = (void *)1;
++#endif
++ }
++
++ newTnodes[nTnodes - 1].internal[0] = dev->freeTnodes;
++#ifdef CONFIG_YAFFS_TNODE_LIST_DEBUG
++ newTnodes[nTnodes - 1].internal[YAFFS_NTNODES_INTERNAL] = (void *)1;
++#endif
++ dev->freeTnodes = newTnodes;
++#else
++ /* New hookup for wide tnodes */
++ for(i = 0; i < nTnodes -1; i++) {
++ curr = (yaffs_Tnode *) &mem[i * tnodeSize];
++ next = (yaffs_Tnode *) &mem[(i+1) * tnodeSize];
++ curr->internal[0] = next;
++ }
++
++ curr = (yaffs_Tnode *) &mem[(nTnodes - 1) * tnodeSize];
++ curr->internal[0] = dev->freeTnodes;
++ dev->freeTnodes = (yaffs_Tnode *)mem;
++
++#endif
++
++
++ dev->nFreeTnodes += nTnodes;
++ dev->nTnodesCreated += nTnodes;
++
++ /* Now add this bunch of tnodes to a list for freeing up.
++ * NB If we can't add this to the management list it isn't fatal
++ * but it just means we can't free this bunch of tnodes later.
++ */
++
++ tnl = YMALLOC(sizeof(yaffs_TnodeList));
++ if (!tnl) {
++ T(YAFFS_TRACE_ERROR,
++ (TSTR
++ ("yaffs: Could not add tnodes to management list" TENDSTR)));
++
++ } else {
++ tnl->tnodes = newTnodes;
++ tnl->next = dev->allocatedTnodeList;
++ dev->allocatedTnodeList = tnl;
++ }
++
++ T(YAFFS_TRACE_ALLOCATE, (TSTR("yaffs: Tnodes added" TENDSTR)));
++
++ return YAFFS_OK;
++}
++
++/* GetTnode gets us a clean tnode. Tries to make allocate more if we run out */
++
++static yaffs_Tnode *yaffs_GetTnodeRaw(yaffs_Device * dev)
++{
++ yaffs_Tnode *tn = NULL;
++
++ /* If there are none left make more */
++ if (!dev->freeTnodes) {
++ yaffs_CreateTnodes(dev, YAFFS_ALLOCATION_NTNODES);
++ }
++
++ if (dev->freeTnodes) {
++ tn = dev->freeTnodes;
++#ifdef CONFIG_YAFFS_TNODE_LIST_DEBUG
++ if (tn->internal[YAFFS_NTNODES_INTERNAL] != (void *)1) {
++ /* Hoosterman, this thing looks like it isn't in the list */
++ T(YAFFS_TRACE_ALWAYS,
++ (TSTR("yaffs: Tnode list bug 1" TENDSTR)));
++ }
++#endif
++ dev->freeTnodes = dev->freeTnodes->internal[0];
++ dev->nFreeTnodes--;
++ }
++
++ return tn;
++}
++
++static yaffs_Tnode *yaffs_GetTnode(yaffs_Device * dev)
++{
++ yaffs_Tnode *tn = yaffs_GetTnodeRaw(dev);
++
++ if(tn)
++ memset(tn, 0, (dev->tnodeWidth * YAFFS_NTNODES_LEVEL0)/8);
++
++ return tn;
++}
++
++/* FreeTnode frees up a tnode and puts it back on the free list */
++static void yaffs_FreeTnode(yaffs_Device * dev, yaffs_Tnode * tn)
++{
++ if (tn) {
++#ifdef CONFIG_YAFFS_TNODE_LIST_DEBUG
++ if (tn->internal[YAFFS_NTNODES_INTERNAL] != 0) {
++ /* Hoosterman, this thing looks like it is already in the list */
++ T(YAFFS_TRACE_ALWAYS,
++ (TSTR("yaffs: Tnode list bug 2" TENDSTR)));
++ }
++ tn->internal[YAFFS_NTNODES_INTERNAL] = (void *)1;
++#endif
++ tn->internal[0] = dev->freeTnodes;
++ dev->freeTnodes = tn;
++ dev->nFreeTnodes++;
++ }
++}
++
++static void yaffs_DeinitialiseTnodes(yaffs_Device * dev)
++{
++ /* Free the list of allocated tnodes */
++ yaffs_TnodeList *tmp;
++
++ while (dev->allocatedTnodeList) {
++ tmp = dev->allocatedTnodeList->next;
++
++ YFREE(dev->allocatedTnodeList->tnodes);
++ YFREE(dev->allocatedTnodeList);
++ dev->allocatedTnodeList = tmp;
++
++ }
++
++ dev->freeTnodes = NULL;
++ dev->nFreeTnodes = 0;
++}
++
++static void yaffs_InitialiseTnodes(yaffs_Device * dev)
++{
++ dev->allocatedTnodeList = NULL;
++ dev->freeTnodes = NULL;
++ dev->nFreeTnodes = 0;
++ dev->nTnodesCreated = 0;
++
++}
++
++
++void yaffs_PutLevel0Tnode(yaffs_Device *dev, yaffs_Tnode *tn, unsigned pos, unsigned val)
++{
++ __u32 *map = (__u32 *)tn;
++ __u32 bitInMap;
++ __u32 bitInWord;
++ __u32 wordInMap;
++ __u32 mask;
++
++ pos &= YAFFS_TNODES_LEVEL0_MASK;
++ val >>= dev->chunkGroupBits;
++
++ bitInMap = pos * dev->tnodeWidth;
++ wordInMap = bitInMap /32;
++ bitInWord = bitInMap & (32 -1);
++
++ mask = dev->tnodeMask << bitInWord;
++
++ map[wordInMap] &= ~mask;
++ map[wordInMap] |= (mask & (val << bitInWord));
++
++ if(dev->tnodeWidth > (32-bitInWord)) {
++ bitInWord = (32 - bitInWord);
++ wordInMap++;;
++ mask = dev->tnodeMask >> (/*dev->tnodeWidth -*/ bitInWord);
++ map[wordInMap] &= ~mask;
++ map[wordInMap] |= (mask & (val >> bitInWord));
++ }
++}
++
++__u32 yaffs_GetChunkGroupBase(yaffs_Device *dev, yaffs_Tnode *tn, unsigned pos)
++{
++ __u32 *map = (__u32 *)tn;
++ __u32 bitInMap;
++ __u32 bitInWord;
++ __u32 wordInMap;
++ __u32 val;
++
++ pos &= YAFFS_TNODES_LEVEL0_MASK;
++
++ bitInMap = pos * dev->tnodeWidth;
++ wordInMap = bitInMap /32;
++ bitInWord = bitInMap & (32 -1);
++
++ val = map[wordInMap] >> bitInWord;
++
++ if(dev->tnodeWidth > (32-bitInWord)) {
++ bitInWord = (32 - bitInWord);
++ wordInMap++;;
++ val |= (map[wordInMap] << bitInWord);
++ }
++
++ val &= dev->tnodeMask;
++ val <<= dev->chunkGroupBits;
++
++ return val;
++}
++
++/* ------------------- End of individual tnode manipulation -----------------*/
++
++/* ---------Functions to manipulate the look-up tree (made up of tnodes) ------
++ * The look up tree is represented by the top tnode and the number of topLevel
++ * in the tree. 0 means only the level 0 tnode is in the tree.
++ */
++
++/* FindLevel0Tnode finds the level 0 tnode, if one exists. */
++static yaffs_Tnode *yaffs_FindLevel0Tnode(yaffs_Device * dev,
++ yaffs_FileStructure * fStruct,
++ __u32 chunkId)
++{
++
++ yaffs_Tnode *tn = fStruct->top;
++ __u32 i;
++ int requiredTallness;
++ int level = fStruct->topLevel;
++
++ /* Check sane level and chunk Id */
++ if (level < 0 || level > YAFFS_TNODES_MAX_LEVEL) {
++ return NULL;
++ }
++
++ if (chunkId > YAFFS_MAX_CHUNK_ID) {
++ return NULL;
++ }
++
++ /* First check we're tall enough (ie enough topLevel) */
++
++ i = chunkId >> YAFFS_TNODES_LEVEL0_BITS;
++ requiredTallness = 0;
++ while (i) {
++ i >>= YAFFS_TNODES_INTERNAL_BITS;
++ requiredTallness++;
++ }
++
++ if (requiredTallness > fStruct->topLevel) {
++ /* Not tall enough, so we can't find it, return NULL. */
++ return NULL;
++ }
++
++ /* Traverse down to level 0 */
++ while (level > 0 && tn) {
++ tn = tn->
++ internal[(chunkId >>
++ ( YAFFS_TNODES_LEVEL0_BITS +
++ (level - 1) *
++ YAFFS_TNODES_INTERNAL_BITS)
++ ) &
++ YAFFS_TNODES_INTERNAL_MASK];
++ level--;
++
++ }
++
++ return tn;
++}
++
++/* AddOrFindLevel0Tnode finds the level 0 tnode if it exists, otherwise first expands the tree.
++ * This happens in two steps:
++ * 1. If the tree isn't tall enough, then make it taller.
++ * 2. Scan down the tree towards the level 0 tnode adding tnodes if required.
++ *
++ * Used when modifying the tree.
++ *
++ * If the tn argument is NULL, then a fresh tnode will be added otherwise the specified tn will
++ * be plugged into the ttree.
++ */
++
++static yaffs_Tnode *yaffs_AddOrFindLevel0Tnode(yaffs_Device * dev,
++ yaffs_FileStructure * fStruct,
++ __u32 chunkId,
++ yaffs_Tnode *passedTn)
++{
++
++ int requiredTallness;
++ int i;
++ int l;
++ yaffs_Tnode *tn;
++
++ __u32 x;
++
++
++ /* Check sane level and page Id */
++ if (fStruct->topLevel < 0 || fStruct->topLevel > YAFFS_TNODES_MAX_LEVEL) {
++ return NULL;
++ }
++
++ if (chunkId > YAFFS_MAX_CHUNK_ID) {
++ return NULL;
++ }
++
++ /* First check we're tall enough (ie enough topLevel) */
++
++ x = chunkId >> YAFFS_TNODES_LEVEL0_BITS;
++ requiredTallness = 0;
++ while (x) {
++ x >>= YAFFS_TNODES_INTERNAL_BITS;
++ requiredTallness++;
++ }
++
++
++ if (requiredTallness > fStruct->topLevel) {
++ /* Not tall enough,gotta make the tree taller */
++ for (i = fStruct->topLevel; i < requiredTallness; i++) {
++
++ tn = yaffs_GetTnode(dev);
++
++ if (tn) {
++ tn->internal[0] = fStruct->top;
++ fStruct->top = tn;
++ } else {
++ T(YAFFS_TRACE_ERROR,
++ (TSTR("yaffs: no more tnodes" TENDSTR)));
++ }
++ }
++
++ fStruct->topLevel = requiredTallness;
++ }
++
++ /* Traverse down to level 0, adding anything we need */
++
++ l = fStruct->topLevel;
++ tn = fStruct->top;
++
++ if(l > 0) {
++ while (l > 0 && tn) {
++ x = (chunkId >>
++ ( YAFFS_TNODES_LEVEL0_BITS +
++ (l - 1) * YAFFS_TNODES_INTERNAL_BITS)) &
++ YAFFS_TNODES_INTERNAL_MASK;
++
++
++ if((l>1) && !tn->internal[x]){
++ /* Add missing non-level-zero tnode */
++ tn->internal[x] = yaffs_GetTnode(dev);
++
++ } else if(l == 1) {
++ /* Looking from level 1 at level 0 */
++ if (passedTn) {
++ /* If we already have one, then release it.*/
++ if(tn->internal[x])
++ yaffs_FreeTnode(dev,tn->internal[x]);
++ tn->internal[x] = passedTn;
++
++ } else if(!tn->internal[x]) {
++ /* Don't have one, none passed in */
++ tn->internal[x] = yaffs_GetTnode(dev);
++ }
++ }
++
++ tn = tn->internal[x];
++ l--;
++ }
++ } else {
++ /* top is level 0 */
++ if(passedTn) {
++ memcpy(tn,passedTn,(dev->tnodeWidth * YAFFS_NTNODES_LEVEL0)/8);
++ yaffs_FreeTnode(dev,passedTn);
++ }
++ }
++
++ return tn;
++}
++
++static int yaffs_FindChunkInGroup(yaffs_Device * dev, int theChunk,
++ yaffs_ExtendedTags * tags, int objectId,
++ int chunkInInode)
++{
++ int j;
++
++ for (j = 0; theChunk && j < dev->chunkGroupSize; j++) {
++ if (yaffs_CheckChunkBit
++ (dev, theChunk / dev->nChunksPerBlock,
++ theChunk % dev->nChunksPerBlock)) {
++ yaffs_ReadChunkWithTagsFromNAND(dev, theChunk, NULL,
++ tags);
++ if (yaffs_TagsMatch(tags, objectId, chunkInInode)) {
++ /* found it; */
++ return theChunk;
++
++ }
++ }
++ theChunk++;
++ }
++ return -1;
++}
++
++
++/* DeleteWorker scans backwards through the tnode tree and deletes all the
++ * chunks and tnodes in the file
++ * Returns 1 if the tree was deleted.
++ * Returns 0 if it stopped early due to hitting the limit and the delete is incomplete.
++ */
++
++static int yaffs_DeleteWorker(yaffs_Object * in, yaffs_Tnode * tn, __u32 level,
++ int chunkOffset, int *limit)
++{
++ int i;
++ int chunkInInode;
++ int theChunk;
++ yaffs_ExtendedTags tags;
++ int foundChunk;
++ yaffs_Device *dev = in->myDev;
++
++ int allDone = 1;
++
++ if (tn) {
++ if (level > 0) {
++
++ for (i = YAFFS_NTNODES_INTERNAL - 1; allDone && i >= 0;
++ i--) {
++ if (tn->internal[i]) {
++ if (limit && (*limit) < 0) {
++ allDone = 0;
++ } else {
++ allDone =
++ yaffs_DeleteWorker(in,
++ tn->
++ internal
++ [i],
++ level -
++ 1,
++ (chunkOffset
++ <<
++ YAFFS_TNODES_INTERNAL_BITS)
++ + i,
++ limit);
++ }
++ if (allDone) {
++ yaffs_FreeTnode(dev,
++ tn->
++ internal[i]);
++ tn->internal[i] = NULL;
++ }
++ }
++
++ }
++ return (allDone) ? 1 : 0;
++ } else if (level == 0) {
++ int hitLimit = 0;
++
++ for (i = YAFFS_NTNODES_LEVEL0 - 1; i >= 0 && !hitLimit;
++ i--) {
++ theChunk = yaffs_GetChunkGroupBase(dev,tn,i);
++ if (theChunk) {
++
++ chunkInInode =
++ (chunkOffset <<
++ YAFFS_TNODES_LEVEL0_BITS) + i;
++
++ foundChunk =
++ yaffs_FindChunkInGroup(dev,
++ theChunk,
++ &tags,
++ in->objectId,
++ chunkInInode);
++
++ if (foundChunk > 0) {
++ yaffs_DeleteChunk(dev,
++ foundChunk, 1,
++ __LINE__);
++ in->nDataChunks--;
++ if (limit) {
++ *limit = *limit - 1;
++ if (*limit <= 0) {
++ hitLimit = 1;
++ }
++ }
++
++ }
++
++ yaffs_PutLevel0Tnode(dev,tn,i,0);
++ }
++
++ }
++ return (i < 0) ? 1 : 0;
++
++ }
++
++ }
++
++ return 1;
++
++}
++
++static void yaffs_SoftDeleteChunk(yaffs_Device * dev, int chunk)
++{
++
++ yaffs_BlockInfo *theBlock;
++
++ T(YAFFS_TRACE_DELETION, (TSTR("soft delete chunk %d" TENDSTR), chunk));
++
++ theBlock = yaffs_GetBlockInfo(dev, chunk / dev->nChunksPerBlock);
++ if (theBlock) {
++ theBlock->softDeletions++;
++ dev->nFreeChunks++;
++ }
++}
++
++/* SoftDeleteWorker scans backwards through the tnode tree and soft deletes all the chunks in the file.
++ * All soft deleting does is increment the block's softdelete count and pulls the chunk out
++ * of the tnode.
++ * Thus, essentially this is the same as DeleteWorker except that the chunks are soft deleted.
++ */
++
++static int yaffs_SoftDeleteWorker(yaffs_Object * in, yaffs_Tnode * tn,
++ __u32 level, int chunkOffset)
++{
++ int i;
++ int theChunk;
++ int allDone = 1;
++ yaffs_Device *dev = in->myDev;
++
++ if (tn) {
++ if (level > 0) {
++
++ for (i = YAFFS_NTNODES_INTERNAL - 1; allDone && i >= 0;
++ i--) {
++ if (tn->internal[i]) {
++ allDone =
++ yaffs_SoftDeleteWorker(in,
++ tn->
++ internal[i],
++ level - 1,
++ (chunkOffset
++ <<
++ YAFFS_TNODES_INTERNAL_BITS)
++ + i);
++ if (allDone) {
++ yaffs_FreeTnode(dev,
++ tn->
++ internal[i]);
++ tn->internal[i] = NULL;
++ } else {
++ /* Hoosterman... how could this happen? */
++ }
++ }
++ }
++ return (allDone) ? 1 : 0;
++ } else if (level == 0) {
++
++ for (i = YAFFS_NTNODES_LEVEL0 - 1; i >= 0; i--) {
++ theChunk = yaffs_GetChunkGroupBase(dev,tn,i);
++ if (theChunk) {
++ /* Note this does not find the real chunk, only the chunk group.
++ * We make an assumption that a chunk group is not larger than
++ * a block.
++ */
++ yaffs_SoftDeleteChunk(dev, theChunk);
++ yaffs_PutLevel0Tnode(dev,tn,i,0);
++ }
++
++ }
++ return 1;
++
++ }
++
++ }
++
++ return 1;
++
++}
++
++static void yaffs_SoftDeleteFile(yaffs_Object * obj)
++{
++ if (obj->deleted &&
++ obj->variantType == YAFFS_OBJECT_TYPE_FILE && !obj->softDeleted) {
++ if (obj->nDataChunks <= 0) {
++ /* Empty file with no duplicate object headers, just delete it immediately */
++ yaffs_FreeTnode(obj->myDev,
++ obj->variant.fileVariant.top);
++ obj->variant.fileVariant.top = NULL;
++ T(YAFFS_TRACE_TRACING,
++ (TSTR("yaffs: Deleting empty file %d" TENDSTR),
++ obj->objectId));
++ yaffs_DoGenericObjectDeletion(obj);
++ } else {
++ yaffs_SoftDeleteWorker(obj,
++ obj->variant.fileVariant.top,
++ obj->variant.fileVariant.
++ topLevel, 0);
++ obj->softDeleted = 1;
++ }
++ }
++}
++
++/* Pruning removes any part of the file structure tree that is beyond the
++ * bounds of the file (ie that does not point to chunks).
++ *
++ * A file should only get pruned when its size is reduced.
++ *
++ * Before pruning, the chunks must be pulled from the tree and the
++ * level 0 tnode entries must be zeroed out.
++ * Could also use this for file deletion, but that's probably better handled
++ * by a special case.
++ */
++
++static yaffs_Tnode *yaffs_PruneWorker(yaffs_Device * dev, yaffs_Tnode * tn,
++ __u32 level, int del0)
++{
++ int i;
++ int hasData;
++
++ if (tn) {
++ hasData = 0;
++
++ for (i = 0; i < YAFFS_NTNODES_INTERNAL; i++) {
++ if (tn->internal[i] && level > 0) {
++ tn->internal[i] =
++ yaffs_PruneWorker(dev, tn->internal[i],
++ level - 1,
++ (i == 0) ? del0 : 1);
++ }
++
++ if (tn->internal[i]) {
++ hasData++;
++ }
++ }
++
++ if (hasData == 0 && del0) {
++ /* Free and return NULL */
++
++ yaffs_FreeTnode(dev, tn);
++ tn = NULL;
++ }
++
++ }
++
++ return tn;
++
++}
++
++static int yaffs_PruneFileStructure(yaffs_Device * dev,
++ yaffs_FileStructure * fStruct)
++{
++ int i;
++ int hasData;
++ int done = 0;
++ yaffs_Tnode *tn;
++
++ if (fStruct->topLevel > 0) {
++ fStruct->top =
++ yaffs_PruneWorker(dev, fStruct->top, fStruct->topLevel, 0);
++
++ /* Now we have a tree with all the non-zero branches NULL but the height
++ * is the same as it was.
++ * Let's see if we can trim internal tnodes to shorten the tree.
++ * We can do this if only the 0th element in the tnode is in use
++ * (ie all the non-zero are NULL)
++ */
++
++ while (fStruct->topLevel && !done) {
++ tn = fStruct->top;
++
++ hasData = 0;
++ for (i = 1; i < YAFFS_NTNODES_INTERNAL; i++) {
++ if (tn->internal[i]) {
++ hasData++;
++ }
++ }
++
++ if (!hasData) {
++ fStruct->top = tn->internal[0];
++ fStruct->topLevel--;
++ yaffs_FreeTnode(dev, tn);
++ } else {
++ done = 1;
++ }
++ }
++ }
++
++ return YAFFS_OK;
++}
++
++/*-------------------- End of File Structure functions.-------------------*/
++
++/* yaffs_CreateFreeObjects creates a bunch more objects and
++ * adds them to the object free list.
++ */
++static int yaffs_CreateFreeObjects(yaffs_Device * dev, int nObjects)
++{
++ int i;
++ yaffs_Object *newObjects;
++ yaffs_ObjectList *list;
++
++ if (nObjects < 1)
++ return YAFFS_OK;
++
++ /* make these things */
++ newObjects = YMALLOC(nObjects * sizeof(yaffs_Object));
++
++ if (!newObjects) {
++ T(YAFFS_TRACE_ALLOCATE,
++ (TSTR("yaffs: Could not allocate more objects" TENDSTR)));
++ return YAFFS_FAIL;
++ }
++
++ /* Hook them into the free list */
++ for (i = 0; i < nObjects - 1; i++) {
++ newObjects[i].siblings.next =
++ (struct list_head *)(&newObjects[i + 1]);
++ }
++
++ newObjects[nObjects - 1].siblings.next = (void *)dev->freeObjects;
++ dev->freeObjects = newObjects;
++ dev->nFreeObjects += nObjects;
++ dev->nObjectsCreated += nObjects;
++
++ /* Now add this bunch of Objects to a list for freeing up. */
++
++ list = YMALLOC(sizeof(yaffs_ObjectList));
++ if (!list) {
++ T(YAFFS_TRACE_ALLOCATE,
++ (TSTR("Could not add objects to management list" TENDSTR)));
++ } else {
++ list->objects = newObjects;
++ list->next = dev->allocatedObjectList;
++ dev->allocatedObjectList = list;
++ }
++
++ return YAFFS_OK;
++}
++
++
++/* AllocateEmptyObject gets us a clean Object. Tries to make allocate more if we run out */
++static yaffs_Object *yaffs_AllocateEmptyObject(yaffs_Device * dev)
++{
++ yaffs_Object *tn = NULL;
++
++ /* If there are none left make more */
++ if (!dev->freeObjects) {
++ yaffs_CreateFreeObjects(dev, YAFFS_ALLOCATION_NOBJECTS);
++ }
++
++ if (dev->freeObjects) {
++ tn = dev->freeObjects;
++ dev->freeObjects =
++ (yaffs_Object *) (dev->freeObjects->siblings.next);
++ dev->nFreeObjects--;
++
++ /* Now sweeten it up... */
++
++ memset(tn, 0, sizeof(yaffs_Object));
++ tn->myDev = dev;
++ tn->chunkId = -1;
++ tn->variantType = YAFFS_OBJECT_TYPE_UNKNOWN;
++ INIT_LIST_HEAD(&(tn->hardLinks));
++ INIT_LIST_HEAD(&(tn->hashLink));
++ INIT_LIST_HEAD(&tn->siblings);
++
++ /* Add it to the lost and found directory.
++ * NB Can't put root or lostNFound in lostNFound so
++ * check if lostNFound exists first
++ */
++ if (dev->lostNFoundDir) {
++ yaffs_AddObjectToDirectory(dev->lostNFoundDir, tn);
++ }
++ }
++
++ return tn;
++}
++
++static yaffs_Object *yaffs_CreateFakeDirectory(yaffs_Device * dev, int number,
++ __u32 mode)
++{
++
++ yaffs_Object *obj =
++ yaffs_CreateNewObject(dev, number, YAFFS_OBJECT_TYPE_DIRECTORY);
++ if (obj) {
++ obj->fake = 1; /* it is fake so it has no NAND presence... */
++ obj->renameAllowed = 0; /* ... and we're not allowed to rename it... */
++ obj->unlinkAllowed = 0; /* ... or unlink it */
++ obj->deleted = 0;
++ obj->unlinked = 0;
++ obj->yst_mode = mode;
++ obj->myDev = dev;
++ obj->chunkId = 0; /* Not a valid chunk. */
++ }
++
++ return obj;
++
++}
++
++static void yaffs_UnhashObject(yaffs_Object * tn)
++{
++ int bucket;
++ yaffs_Device *dev = tn->myDev;
++
++ /* If it is still linked into the bucket list, free from the list */
++ if (!list_empty(&tn->hashLink)) {
++ list_del_init(&tn->hashLink);
++ bucket = yaffs_HashFunction(tn->objectId);
++ dev->objectBucket[bucket].count--;
++ }
++
++}
++
++/* FreeObject frees up a Object and puts it back on the free list */
++static void yaffs_FreeObject(yaffs_Object * tn)
++{
++
++ yaffs_Device *dev = tn->myDev;
++
++#ifdef __KERNEL__
++ if (tn->myInode) {
++ /* We're still hooked up to a cached inode.
++ * Don't delete now, but mark for later deletion
++ */
++ tn->deferedFree = 1;
++ return;
++ }
++#endif
++
++ yaffs_UnhashObject(tn);
++
++ /* Link into the free list. */
++ tn->siblings.next = (struct list_head *)(dev->freeObjects);
++ dev->freeObjects = tn;
++ dev->nFreeObjects++;
++}
++
++#ifdef __KERNEL__
++
++void yaffs_HandleDeferedFree(yaffs_Object * obj)
++{
++ if (obj->deferedFree) {
++ yaffs_FreeObject(obj);
++ }
++}
++
++#endif
++
++static void yaffs_DeinitialiseObjects(yaffs_Device * dev)
++{
++ /* Free the list of allocated Objects */
++
++ yaffs_ObjectList *tmp;
++
++ while (dev->allocatedObjectList) {
++ tmp = dev->allocatedObjectList->next;
++ YFREE(dev->allocatedObjectList->objects);
++ YFREE(dev->allocatedObjectList);
++
++ dev->allocatedObjectList = tmp;
++ }
++
++ dev->freeObjects = NULL;
++ dev->nFreeObjects = 0;
++}
++
++static void yaffs_InitialiseObjects(yaffs_Device * dev)
++{
++ int i;
++
++ dev->allocatedObjectList = NULL;
++ dev->freeObjects = NULL;
++ dev->nFreeObjects = 0;
++
++ for (i = 0; i < YAFFS_NOBJECT_BUCKETS; i++) {
++ INIT_LIST_HEAD(&dev->objectBucket[i].list);
++ dev->objectBucket[i].count = 0;
++ }
++
++}
++
++static int yaffs_FindNiceObjectBucket(yaffs_Device * dev)
++{
++ static int x = 0;
++ int i;
++ int l = 999;
++ int lowest = 999999;
++
++ /* First let's see if we can find one that's empty. */
++
++ for (i = 0; i < 10 && lowest > 0; i++) {
++ x++;
++ x %= YAFFS_NOBJECT_BUCKETS;
++ if (dev->objectBucket[x].count < lowest) {
++ lowest = dev->objectBucket[x].count;
++ l = x;
++ }
++
++ }
++
++ /* If we didn't find an empty list, then try
++ * looking a bit further for a short one
++ */
++
++ for (i = 0; i < 10 && lowest > 3; i++) {
++ x++;
++ x %= YAFFS_NOBJECT_BUCKETS;
++ if (dev->objectBucket[x].count < lowest) {
++ lowest = dev->objectBucket[x].count;
++ l = x;
++ }
++
++ }
++
++ return l;
++}
++
++static int yaffs_CreateNewObjectNumber(yaffs_Device * dev)
++{
++ int bucket = yaffs_FindNiceObjectBucket(dev);
++
++ /* Now find an object value that has not already been taken
++ * by scanning the list.
++ */
++
++ int found = 0;
++ struct list_head *i;
++
++ __u32 n = (__u32) bucket;
++
++ /* yaffs_CheckObjectHashSanity(); */
++
++ while (!found) {
++ found = 1;
++ n += YAFFS_NOBJECT_BUCKETS;
++ if (1 || dev->objectBucket[bucket].count > 0) {
++ list_for_each(i, &dev->objectBucket[bucket].list) {
++ /* If there is already one in the list */
++ if (i
++ && list_entry(i, yaffs_Object,
++ hashLink)->objectId == n) {
++ found = 0;
++ }
++ }
++ }
++ }
++
++
++ return n;
++}
++
++static void yaffs_HashObject(yaffs_Object * in)
++{
++ int bucket = yaffs_HashFunction(in->objectId);
++ yaffs_Device *dev = in->myDev;
++
++ list_add(&in->hashLink, &dev->objectBucket[bucket].list);
++ dev->objectBucket[bucket].count++;
++
++}
++
++yaffs_Object *yaffs_FindObjectByNumber(yaffs_Device * dev, __u32 number)
++{
++ int bucket = yaffs_HashFunction(number);
++ struct list_head *i;
++ yaffs_Object *in;
++
++ list_for_each(i, &dev->objectBucket[bucket].list) {
++ /* Look if it is in the list */
++ if (i) {
++ in = list_entry(i, yaffs_Object, hashLink);
++ if (in->objectId == number) {
++#ifdef __KERNEL__
++ /* Don't tell the VFS about this one if it is defered free */
++ if (in->deferedFree)
++ return NULL;
++#endif
++
++ return in;
++ }
++ }
++ }
++
++ return NULL;
++}
++
++yaffs_Object *yaffs_CreateNewObject(yaffs_Device * dev, int number,
++ yaffs_ObjectType type)
++{
++
++ yaffs_Object *theObject;
++
++ if (number < 0) {
++ number = yaffs_CreateNewObjectNumber(dev);
++ }
++
++ theObject = yaffs_AllocateEmptyObject(dev);
++
++ if (theObject) {
++ theObject->fake = 0;
++ theObject->renameAllowed = 1;
++ theObject->unlinkAllowed = 1;
++ theObject->objectId = number;
++ yaffs_HashObject(theObject);
++ theObject->variantType = type;
++#ifdef CONFIG_YAFFS_WINCE
++ yfsd_WinFileTimeNow(theObject->win_atime);
++ theObject->win_ctime[0] = theObject->win_mtime[0] =
++ theObject->win_atime[0];
++ theObject->win_ctime[1] = theObject->win_mtime[1] =
++ theObject->win_atime[1];
++
++#else
++
++ theObject->yst_atime = theObject->yst_mtime =
++ theObject->yst_ctime = Y_CURRENT_TIME;
++#endif
++ switch (type) {
++ case YAFFS_OBJECT_TYPE_FILE:
++ theObject->variant.fileVariant.fileSize = 0;
++ theObject->variant.fileVariant.scannedFileSize = 0;
++ theObject->variant.fileVariant.shrinkSize = 0xFFFFFFFF; /* max __u32 */
++ theObject->variant.fileVariant.topLevel = 0;
++ theObject->variant.fileVariant.top =
++ yaffs_GetTnode(dev);
++ break;
++ case YAFFS_OBJECT_TYPE_DIRECTORY:
++ INIT_LIST_HEAD(&theObject->variant.directoryVariant.
++ children);
++ break;
++ case YAFFS_OBJECT_TYPE_SYMLINK:
++ case YAFFS_OBJECT_TYPE_HARDLINK:
++ case YAFFS_OBJECT_TYPE_SPECIAL:
++ /* No action required */
++ break;
++ case YAFFS_OBJECT_TYPE_UNKNOWN:
++ /* todo this should not happen */
++ break;
++ }
++ }
++
++ return theObject;
++}
++
++static yaffs_Object *yaffs_FindOrCreateObjectByNumber(yaffs_Device * dev,
++ int number,
++ yaffs_ObjectType type)
++{
++ yaffs_Object *theObject = NULL;
++
++ if (number > 0) {
++ theObject = yaffs_FindObjectByNumber(dev, number);
++ }
++
++ if (!theObject) {
++ theObject = yaffs_CreateNewObject(dev, number, type);
++ }
++
++ return theObject;
++
++}
++
++
++static YCHAR *yaffs_CloneString(const YCHAR * str)
++{
++ YCHAR *newStr = NULL;
++
++ if (str && *str) {
++ newStr = YMALLOC((yaffs_strlen(str) + 1) * sizeof(YCHAR));
++ yaffs_strcpy(newStr, str);
++ }
++
++ return newStr;
++
++}
++
++/*
++ * Mknod (create) a new object.
++ * equivalentObject only has meaning for a hard link;
++ * aliasString only has meaning for a sumlink.
++ * rdev only has meaning for devices (a subset of special objects)
++ */
++
++static yaffs_Object *yaffs_MknodObject(yaffs_ObjectType type,
++ yaffs_Object * parent,
++ const YCHAR * name,
++ __u32 mode,
++ __u32 uid,
++ __u32 gid,
++ yaffs_Object * equivalentObject,
++ const YCHAR * aliasString, __u32 rdev)
++{
++ yaffs_Object *in;
++
++ yaffs_Device *dev = parent->myDev;
++
++ /* Check if the entry exists. If it does then fail the call since we don't want a dup.*/
++ if (yaffs_FindObjectByName(parent, name)) {
++ return NULL;
++ }
++
++ in = yaffs_CreateNewObject(dev, -1, type);
++
++ if (in) {
++ in->chunkId = -1;
++ in->valid = 1;
++ in->variantType = type;
++
++ in->yst_mode = mode;
++
++#ifdef CONFIG_YAFFS_WINCE
++ yfsd_WinFileTimeNow(in->win_atime);
++ in->win_ctime[0] = in->win_mtime[0] = in->win_atime[0];
++ in->win_ctime[1] = in->win_mtime[1] = in->win_atime[1];
++
++#else
++ in->yst_atime = in->yst_mtime = in->yst_ctime = Y_CURRENT_TIME;
++
++ in->yst_rdev = rdev;
++ in->yst_uid = uid;
++ in->yst_gid = gid;
++#endif
++ in->nDataChunks = 0;
++
++ yaffs_SetObjectName(in, name);
++ in->dirty = 1;
++
++ yaffs_AddObjectToDirectory(parent, in);
++
++ in->myDev = parent->myDev;
++
++ switch (type) {
++ case YAFFS_OBJECT_TYPE_SYMLINK:
++ in->variant.symLinkVariant.alias =
++ yaffs_CloneString(aliasString);
++ break;
++ case YAFFS_OBJECT_TYPE_HARDLINK:
++ in->variant.hardLinkVariant.equivalentObject =
++ equivalentObject;
++ in->variant.hardLinkVariant.equivalentObjectId =
++ equivalentObject->objectId;
++ list_add(&in->hardLinks, &equivalentObject->hardLinks);
++ break;
++ case YAFFS_OBJECT_TYPE_FILE:
++ case YAFFS_OBJECT_TYPE_DIRECTORY:
++ case YAFFS_OBJECT_TYPE_SPECIAL:
++ case YAFFS_OBJECT_TYPE_UNKNOWN:
++ /* do nothing */
++ break;
++ }
++
++ if (yaffs_UpdateObjectHeader(in, name, 0, 0, 0) < 0) {
++ /* Could not create the object header, fail the creation */
++ yaffs_DestroyObject(in);
++ in = NULL;
++ }
++
++ }
++
++ return in;
++}
++
++yaffs_Object *yaffs_MknodFile(yaffs_Object * parent, const YCHAR * name,
++ __u32 mode, __u32 uid, __u32 gid)
++{
++ return yaffs_MknodObject(YAFFS_OBJECT_TYPE_FILE, parent, name, mode,
++ uid, gid, NULL, NULL, 0);
++}
++
++yaffs_Object *yaffs_MknodDirectory(yaffs_Object * parent, const YCHAR * name,
++ __u32 mode, __u32 uid, __u32 gid)
++{
++ return yaffs_MknodObject(YAFFS_OBJECT_TYPE_DIRECTORY, parent, name,
++ mode, uid, gid, NULL, NULL, 0);
++}
++
++yaffs_Object *yaffs_MknodSpecial(yaffs_Object * parent, const YCHAR * name,
++ __u32 mode, __u32 uid, __u32 gid, __u32 rdev)
++{
++ return yaffs_MknodObject(YAFFS_OBJECT_TYPE_SPECIAL, parent, name, mode,
++ uid, gid, NULL, NULL, rdev);
++}
++
++yaffs_Object *yaffs_MknodSymLink(yaffs_Object * parent, const YCHAR * name,
++ __u32 mode, __u32 uid, __u32 gid,
++ const YCHAR * alias)
++{
++ return yaffs_MknodObject(YAFFS_OBJECT_TYPE_SYMLINK, parent, name, mode,
++ uid, gid, NULL, alias, 0);
++}
++
++/* yaffs_Link returns the object id of the equivalent object.*/
++yaffs_Object *yaffs_Link(yaffs_Object * parent, const YCHAR * name,
++ yaffs_Object * equivalentObject)
++{
++ /* Get the real object in case we were fed a hard link as an equivalent object */
++ equivalentObject = yaffs_GetEquivalentObject(equivalentObject);
++
++ if (yaffs_MknodObject
++ (YAFFS_OBJECT_TYPE_HARDLINK, parent, name, 0, 0, 0,
++ equivalentObject, NULL, 0)) {
++ return equivalentObject;
++ } else {
++ return NULL;
++ }
++
++}
++
++static int yaffs_ChangeObjectName(yaffs_Object * obj, yaffs_Object * newDir,
++ const YCHAR * newName, int force, int shadows)
++{
++ int unlinkOp;
++ int deleteOp;
++
++ yaffs_Object *existingTarget;
++
++ if (newDir == NULL) {
++ newDir = obj->parent; /* use the old directory */
++ }
++
++ if (newDir->variantType != YAFFS_OBJECT_TYPE_DIRECTORY) {
++ T(YAFFS_TRACE_ALWAYS,
++ (TSTR
++ ("tragendy: yaffs_ChangeObjectName: newDir is not a directory"
++ TENDSTR)));
++ YBUG();
++ }
++
++ /* TODO: Do we need this different handling for YAFFS2 and YAFFS1?? */
++ if (obj->myDev->isYaffs2) {
++ unlinkOp = (newDir == obj->myDev->unlinkedDir);
++ } else {
++ unlinkOp = (newDir == obj->myDev->unlinkedDir
++ && obj->variantType == YAFFS_OBJECT_TYPE_FILE);
++ }
++
++ deleteOp = (newDir == obj->myDev->deletedDir);
++
++ existingTarget = yaffs_FindObjectByName(newDir, newName);
++
++ /* If the object is a file going into the unlinked directory,
++ * then it is OK to just stuff it in since duplicate names are allowed.
++ * else only proceed if the new name does not exist and if we're putting
++ * it into a directory.
++ */
++ if ((unlinkOp ||
++ deleteOp ||
++ force ||
++ (shadows > 0) ||
++ !existingTarget) &&
++ newDir->variantType == YAFFS_OBJECT_TYPE_DIRECTORY) {
++ yaffs_SetObjectName(obj, newName);
++ obj->dirty = 1;
++
++ yaffs_AddObjectToDirectory(newDir, obj);
++
++ if (unlinkOp)
++ obj->unlinked = 1;
++
++ /* If it is a deletion then we mark it as a shrink for gc purposes. */
++ if (yaffs_UpdateObjectHeader(obj, newName, 0, deleteOp, shadows)>= 0)
++ return YAFFS_OK;
++ }
++
++ return YAFFS_FAIL;
++}
++
++int yaffs_RenameObject(yaffs_Object * oldDir, const YCHAR * oldName,
++ yaffs_Object * newDir, const YCHAR * newName)
++{
++ yaffs_Object *obj;
++ yaffs_Object *existingTarget;
++ int force = 0;
++
++#ifdef CONFIG_YAFFS_CASE_INSENSITIVE
++ /* Special case for case insemsitive systems (eg. WinCE).
++ * While look-up is case insensitive, the name isn't.
++ * Therefore we might want to change x.txt to X.txt
++ */
++ if (oldDir == newDir && yaffs_strcmp(oldName, newName) == 0) {
++ force = 1;
++ }
++#endif
++
++ obj = yaffs_FindObjectByName(oldDir, oldName);
++ /* Check new name to long. */
++ if (obj->variantType == YAFFS_OBJECT_TYPE_SYMLINK &&
++ yaffs_strlen(newName) > YAFFS_MAX_ALIAS_LENGTH)
++ /* ENAMETOOLONG */
++ return YAFFS_FAIL;
++ else if (obj->variantType != YAFFS_OBJECT_TYPE_SYMLINK &&
++ yaffs_strlen(newName) > YAFFS_MAX_NAME_LENGTH)
++ /* ENAMETOOLONG */
++ return YAFFS_FAIL;
++
++ if (obj && obj->renameAllowed) {
++
++ /* Now do the handling for an existing target, if there is one */
++
++ existingTarget = yaffs_FindObjectByName(newDir, newName);
++ if (existingTarget &&
++ existingTarget->variantType == YAFFS_OBJECT_TYPE_DIRECTORY &&
++ !list_empty(&existingTarget->variant.directoryVariant.children)) {
++ /* There is a target that is a non-empty directory, so we fail */
++ return YAFFS_FAIL; /* EEXIST or ENOTEMPTY */
++ } else if (existingTarget && existingTarget != obj) {
++ /* Nuke the target first, using shadowing,
++ * but only if it isn't the same object
++ */
++ yaffs_ChangeObjectName(obj, newDir, newName, force,
++ existingTarget->objectId);
++ yaffs_UnlinkObject(existingTarget);
++ }
++
++ return yaffs_ChangeObjectName(obj, newDir, newName, 1, 0);
++ }
++ return YAFFS_FAIL;
++}
++
++/*------------------------- Block Management and Page Allocation ----------------*/
++
++static int yaffs_InitialiseBlocks(yaffs_Device * dev)
++{
++ int nBlocks = dev->internalEndBlock - dev->internalStartBlock + 1;
++
++ dev->allocationBlock = -1; /* force it to get a new one */
++
++ /* Todo we're assuming the malloc will pass. */
++ dev->blockInfo = YMALLOC(nBlocks * sizeof(yaffs_BlockInfo));
++ if(!dev->blockInfo){
++ dev->blockInfo = YMALLOC_ALT(nBlocks * sizeof(yaffs_BlockInfo));
++ dev->blockInfoAlt = 1;
++ }
++ else
++ dev->blockInfoAlt = 0;
++
++ /* Set up dynamic blockinfo stuff. */
++ dev->chunkBitmapStride = (dev->nChunksPerBlock + 7) / 8; /* round up bytes */
++ dev->chunkBits = YMALLOC(dev->chunkBitmapStride * nBlocks);
++ if(!dev->chunkBits){
++ dev->chunkBits = YMALLOC_ALT(dev->chunkBitmapStride * nBlocks);
++ dev->chunkBitsAlt = 1;
++ }
++ else
++ dev->chunkBitsAlt = 0;
++
++ if (dev->blockInfo && dev->chunkBits) {
++ memset(dev->blockInfo, 0, nBlocks * sizeof(yaffs_BlockInfo));
++ memset(dev->chunkBits, 0, dev->chunkBitmapStride * nBlocks);
++ return YAFFS_OK;
++ }
++
++ return YAFFS_FAIL;
++
++}
++
++static void yaffs_DeinitialiseBlocks(yaffs_Device * dev)
++{
++ if(dev->blockInfoAlt)
++ YFREE_ALT(dev->blockInfo);
++ else
++ YFREE(dev->blockInfo);
++ dev->blockInfoAlt = 0;
++
++ dev->blockInfo = NULL;
++
++ if(dev->chunkBitsAlt)
++ YFREE_ALT(dev->chunkBits);
++ else
++ YFREE(dev->chunkBits);
++ dev->chunkBitsAlt = 0;
++ dev->chunkBits = NULL;
++}
++
++static int yaffs_BlockNotDisqualifiedFromGC(yaffs_Device * dev,
++ yaffs_BlockInfo * bi)
++{
++ int i;
++ __u32 seq;
++ yaffs_BlockInfo *b;
++
++ if (!dev->isYaffs2)
++ return 1; /* disqualification only applies to yaffs2. */
++
++ if (!bi->hasShrinkHeader)
++ return 1; /* can gc */
++
++ /* Find the oldest dirty sequence number if we don't know it and save it
++ * so we don't have to keep recomputing it.
++ */
++ if (!dev->oldestDirtySequence) {
++ seq = dev->sequenceNumber;
++
++ for (i = dev->internalStartBlock; i <= dev->internalEndBlock;
++ i++) {
++ b = yaffs_GetBlockInfo(dev, i);
++ if (b->blockState == YAFFS_BLOCK_STATE_FULL &&
++ (b->pagesInUse - b->softDeletions) <
++ dev->nChunksPerBlock && b->sequenceNumber < seq) {
++ seq = b->sequenceNumber;
++ }
++ }
++ dev->oldestDirtySequence = seq;
++ }
++
++ /* Can't do gc of this block if there are any blocks older than this one that have
++ * discarded pages.
++ */
++ return (bi->sequenceNumber <= dev->oldestDirtySequence);
++
++}
++
++/* FindDiretiestBlock is used to select the dirtiest block (or close enough)
++ * for garbage collection.
++ */
++
++static int yaffs_FindBlockForGarbageCollection(yaffs_Device * dev,
++ int aggressive)
++{
++
++ int b = dev->currentDirtyChecker;
++
++ int i;
++ int iterations;
++ int dirtiest = -1;
++ int pagesInUse;
++ int prioritised=0;
++ yaffs_BlockInfo *bi;
++ static int nonAggressiveSkip = 0;
++ int pendingPrioritisedExist = 0;
++
++ /* First let's see if we need to grab a prioritised block */
++ if(dev->hasPendingPrioritisedGCs){
++ for(i = dev->internalStartBlock; i < dev->internalEndBlock && !prioritised; i++){
++
++ bi = yaffs_GetBlockInfo(dev, i);
++ if(bi->gcPrioritise) {
++ pendingPrioritisedExist = 1;
++ if(bi->blockState == YAFFS_BLOCK_STATE_FULL &&
++ yaffs_BlockNotDisqualifiedFromGC(dev, bi)){
++ pagesInUse = (bi->pagesInUse - bi->softDeletions);
++ dirtiest = i;
++ prioritised = 1;
++ aggressive = 1; /* Fool the non-aggressive skip logiv below */
++ }
++ }
++ }
++
++ if(!pendingPrioritisedExist) /* None found, so we can clear this */
++ dev->hasPendingPrioritisedGCs = 0;
++ }
++
++ /* If we're doing aggressive GC then we are happy to take a less-dirty block, and
++ * search harder.
++ * else (we're doing a leasurely gc), then we only bother to do this if the
++ * block has only a few pages in use.
++ */
++
++ nonAggressiveSkip--;
++
++ if (!aggressive && (nonAggressiveSkip > 0)) {
++ return -1;
++ }
++
++ if(!prioritised)
++ pagesInUse =
++ (aggressive) ? dev->nChunksPerBlock : YAFFS_PASSIVE_GC_CHUNKS + 1;
++
++ if (aggressive) {
++ iterations =
++ dev->internalEndBlock - dev->internalStartBlock + 1;
++ } else {
++ iterations =
++ dev->internalEndBlock - dev->internalStartBlock + 1;
++ iterations = iterations / 16;
++ if (iterations > 200) {
++ iterations = 200;
++ }
++ }
++
++ for (i = 0; i <= iterations && pagesInUse > 0 && !prioritised; i++) {
++ b++;
++ if (b < dev->internalStartBlock || b > dev->internalEndBlock) {
++ b = dev->internalStartBlock;
++ }
++
++ if (b < dev->internalStartBlock || b > dev->internalEndBlock) {
++ T(YAFFS_TRACE_ERROR,
++ (TSTR("**>> Block %d is not valid" TENDSTR), b));
++ YBUG();
++ }
++
++ bi = yaffs_GetBlockInfo(dev, b);
++
++#if 0
++ if (bi->blockState == YAFFS_BLOCK_STATE_CHECKPOINT) {
++ dirtiest = b;
++ pagesInUse = 0;
++ }
++ else
++#endif
++
++ if (bi->blockState == YAFFS_BLOCK_STATE_FULL &&
++ (bi->pagesInUse - bi->softDeletions) < pagesInUse &&
++ yaffs_BlockNotDisqualifiedFromGC(dev, bi)) {
++ dirtiest = b;
++ pagesInUse = (bi->pagesInUse - bi->softDeletions);
++ }
++ }
++
++ dev->currentDirtyChecker = b;
++
++ if (dirtiest > 0) {
++ T(YAFFS_TRACE_GC,
++ (TSTR("GC Selected block %d with %d free, prioritised:%d" TENDSTR), dirtiest,
++ dev->nChunksPerBlock - pagesInUse,prioritised));
++ }
++
++ dev->oldestDirtySequence = 0;
++
++ if (dirtiest > 0) {
++ nonAggressiveSkip = 4;
++ }
++
++ return dirtiest;
++}
++
++static void yaffs_BlockBecameDirty(yaffs_Device * dev, int blockNo)
++{
++ yaffs_BlockInfo *bi = yaffs_GetBlockInfo(dev, blockNo);
++
++ int erasedOk = 0;
++
++ /* If the block is still healthy erase it and mark as clean.
++ * If the block has had a data failure, then retire it.
++ */
++
++ T(YAFFS_TRACE_GC | YAFFS_TRACE_ERASE,
++ (TSTR("yaffs_BlockBecameDirty block %d state %d %s"TENDSTR),
++ blockNo, bi->blockState, (bi->needsRetiring) ? "needs retiring" : ""));
++
++ bi->blockState = YAFFS_BLOCK_STATE_DIRTY;
++
++ if (!bi->needsRetiring) {
++ yaffs_InvalidateCheckpoint(dev);
++ erasedOk = yaffs_EraseBlockInNAND(dev, blockNo);
++ if (!erasedOk) {
++ dev->nErasureFailures++;
++ T(YAFFS_TRACE_ERROR | YAFFS_TRACE_BAD_BLOCKS,
++ (TSTR("**>> Erasure failed %d" TENDSTR), blockNo));
++ }
++ }
++
++ if (erasedOk && (yaffs_traceMask & YAFFS_TRACE_ERASE)) {
++ int i;
++ for (i = 0; i < dev->nChunksPerBlock; i++) {
++ if (!yaffs_CheckChunkErased
++ (dev, blockNo * dev->nChunksPerBlock + i)) {
++ T(YAFFS_TRACE_ERROR,
++ (TSTR
++ (">>Block %d erasure supposedly OK, but chunk %d not erased"
++ TENDSTR), blockNo, i));
++ }
++ }
++ }
++
++ if (erasedOk) {
++ /* Clean it up... */
++ bi->blockState = YAFFS_BLOCK_STATE_EMPTY;
++ dev->nErasedBlocks++;
++ bi->pagesInUse = 0;
++ bi->softDeletions = 0;
++ bi->hasShrinkHeader = 0;
++ bi->skipErasedCheck = 1; /* This is clean, so no need to check */
++ bi->gcPrioritise = 0;
++ yaffs_ClearChunkBits(dev, blockNo);
++
++ T(YAFFS_TRACE_ERASE,
++ (TSTR("Erased block %d" TENDSTR), blockNo));
++ } else {
++ dev->nFreeChunks -= dev->nChunksPerBlock; /* We lost a block of free space */
++
++ yaffs_RetireBlock(dev, blockNo);
++ T(YAFFS_TRACE_ERROR | YAFFS_TRACE_BAD_BLOCKS,
++ (TSTR("**>> Block %d retired" TENDSTR), blockNo));
++ }
++}
++
++static int yaffs_FindBlockForAllocation(yaffs_Device * dev)
++{
++ int i;
++
++ yaffs_BlockInfo *bi;
++
++ if (dev->nErasedBlocks < 1) {
++ /* Hoosterman we've got a problem.
++ * Can't get space to gc
++ */
++ T(YAFFS_TRACE_ERROR,
++ (TSTR("yaffs tragedy: no more eraased blocks" TENDSTR)));
++
++ return -1;
++ }
++
++ /* Find an empty block. */
++
++ for (i = dev->internalStartBlock; i <= dev->internalEndBlock; i++) {
++ dev->allocationBlockFinder++;
++ if (dev->allocationBlockFinder < dev->internalStartBlock
++ || dev->allocationBlockFinder > dev->internalEndBlock) {
++ dev->allocationBlockFinder = dev->internalStartBlock;
++ }
++
++ bi = yaffs_GetBlockInfo(dev, dev->allocationBlockFinder);
++
++ if (bi->blockState == YAFFS_BLOCK_STATE_EMPTY) {
++ bi->blockState = YAFFS_BLOCK_STATE_ALLOCATING;
++ dev->sequenceNumber++;
++ bi->sequenceNumber = dev->sequenceNumber;
++ dev->nErasedBlocks--;
++ T(YAFFS_TRACE_ALLOCATE,
++ (TSTR("Allocated block %d, seq %d, %d left" TENDSTR),
++ dev->allocationBlockFinder, dev->sequenceNumber,
++ dev->nErasedBlocks));
++ return dev->allocationBlockFinder;
++ }
++ }
++
++ T(YAFFS_TRACE_ALWAYS,
++ (TSTR
++ ("yaffs tragedy: no more eraased blocks, but there should have been %d"
++ TENDSTR), dev->nErasedBlocks));
++
++ return -1;
++}
++
++
++// Check if there's space to allocate...
++// Thinks.... do we need top make this ths same as yaffs_GetFreeChunks()?
++static int yaffs_CheckSpaceForAllocation(yaffs_Device * dev)
++{
++ int reservedChunks;
++ int reservedBlocks = dev->nReservedBlocks;
++ int checkpointBlocks;
++
++ checkpointBlocks = dev->nCheckpointReservedBlocks - dev->blocksInCheckpoint;
++ if(checkpointBlocks < 0)
++ checkpointBlocks = 0;
++
++ reservedChunks = ((reservedBlocks + checkpointBlocks) * dev->nChunksPerBlock);
++
++ return (dev->nFreeChunks > reservedChunks);
++}
++
++static int yaffs_AllocateChunk(yaffs_Device * dev, int useReserve, yaffs_BlockInfo **blockUsedPtr)
++{
++ int retVal;
++ yaffs_BlockInfo *bi;
++
++ if (dev->allocationBlock < 0) {
++ /* Get next block to allocate off */
++ dev->allocationBlock = yaffs_FindBlockForAllocation(dev);
++ dev->allocationPage = 0;
++ }
++
++ if (!useReserve && !yaffs_CheckSpaceForAllocation(dev)) {
++ /* Not enough space to allocate unless we're allowed to use the reserve. */
++ return -1;
++ }
++
++ if (dev->nErasedBlocks < dev->nReservedBlocks
++ && dev->allocationPage == 0) {
++ T(YAFFS_TRACE_ALLOCATE, (TSTR("Allocating reserve" TENDSTR)));
++ }
++
++ /* Next page please.... */
++ if (dev->allocationBlock >= 0) {
++ bi = yaffs_GetBlockInfo(dev, dev->allocationBlock);
++
++ retVal = (dev->allocationBlock * dev->nChunksPerBlock) +
++ dev->allocationPage;
++ bi->pagesInUse++;
++ yaffs_SetChunkBit(dev, dev->allocationBlock,
++ dev->allocationPage);
++
++ dev->allocationPage++;
++
++ dev->nFreeChunks--;
++
++ /* If the block is full set the state to full */
++ if (dev->allocationPage >= dev->nChunksPerBlock) {
++ bi->blockState = YAFFS_BLOCK_STATE_FULL;
++ dev->allocationBlock = -1;
++ }
++
++ if(blockUsedPtr)
++ *blockUsedPtr = bi;
++
++ return retVal;
++ }
++
++ T(YAFFS_TRACE_ERROR,
++ (TSTR("!!!!!!!!! Allocator out !!!!!!!!!!!!!!!!!" TENDSTR)));
++
++ return -1;
++}
++
++static int yaffs_GetErasedChunks(yaffs_Device * dev)
++{
++ int n;
++
++ n = dev->nErasedBlocks * dev->nChunksPerBlock;
++
++ if (dev->allocationBlock > 0) {
++ n += (dev->nChunksPerBlock - dev->allocationPage);
++ }
++
++ return n;
++
++}
++
++static int yaffs_GarbageCollectBlock(yaffs_Device * dev, int block)
++{
++ int oldChunk;
++ int newChunk;
++ int chunkInBlock;
++ int markNAND;
++ int retVal = YAFFS_OK;
++ int cleanups = 0;
++ int i;
++ int isCheckpointBlock;
++
++ int chunksBefore = yaffs_GetErasedChunks(dev);
++ int chunksAfter;
++
++ yaffs_ExtendedTags tags;
++
++ yaffs_BlockInfo *bi = yaffs_GetBlockInfo(dev, block);
++
++ yaffs_Object *object;
++
++ isCheckpointBlock = (bi->blockState == YAFFS_BLOCK_STATE_CHECKPOINT);
++
++ bi->blockState = YAFFS_BLOCK_STATE_COLLECTING;
++
++ T(YAFFS_TRACE_TRACING,
++ (TSTR("Collecting block %d, in use %d, shrink %d, " TENDSTR), block,
++ bi->pagesInUse, bi->hasShrinkHeader));
++
++ /*yaffs_VerifyFreeChunks(dev); */
++
++ bi->hasShrinkHeader = 0; /* clear the flag so that the block can erase */
++
++ /* Take off the number of soft deleted entries because
++ * they're going to get really deleted during GC.
++ */
++ dev->nFreeChunks -= bi->softDeletions;
++
++ dev->isDoingGC = 1;
++
++ if (isCheckpointBlock ||
++ !yaffs_StillSomeChunkBits(dev, block)) {
++ T(YAFFS_TRACE_TRACING,
++ (TSTR
++ ("Collecting block %d that has no chunks in use" TENDSTR),
++ block));
++ yaffs_BlockBecameDirty(dev, block);
++ } else {
++
++ __u8 *buffer = yaffs_GetTempBuffer(dev, __LINE__);
++
++ for (chunkInBlock = 0, oldChunk = block * dev->nChunksPerBlock;
++ chunkInBlock < dev->nChunksPerBlock
++ && yaffs_StillSomeChunkBits(dev, block);
++ chunkInBlock++, oldChunk++) {
++ if (yaffs_CheckChunkBit(dev, block, chunkInBlock)) {
++
++ /* This page is in use and might need to be copied off */
++
++ markNAND = 1;
++
++ yaffs_InitialiseTags(&tags);
++
++ yaffs_ReadChunkWithTagsFromNAND(dev, oldChunk,
++ buffer, &tags);
++
++ object =
++ yaffs_FindObjectByNumber(dev,
++ tags.objectId);
++
++ T(YAFFS_TRACE_GC_DETAIL,
++ (TSTR
++ ("Collecting page %d, %d %d %d " TENDSTR),
++ chunkInBlock, tags.objectId, tags.chunkId,
++ tags.byteCount));
++
++ if (!object) {
++ T(YAFFS_TRACE_ERROR,
++ (TSTR
++ ("page %d in gc has no object "
++ TENDSTR), oldChunk));
++ }
++
++ if (object && object->deleted
++ && tags.chunkId != 0) {
++ /* Data chunk in a deleted file, throw it away
++ * It's a soft deleted data chunk,
++ * No need to copy this, just forget about it and
++ * fix up the object.
++ */
++
++ object->nDataChunks--;
++
++ if (object->nDataChunks <= 0) {
++ /* remeber to clean up the object */
++ dev->gcCleanupList[cleanups] =
++ tags.objectId;
++ cleanups++;
++ }
++ markNAND = 0;
++ } else if (0
++ /* Todo object && object->deleted && object->nDataChunks == 0 */
++ ) {
++ /* Deleted object header with no data chunks.
++ * Can be discarded and the file deleted.
++ */
++ object->chunkId = 0;
++ yaffs_FreeTnode(object->myDev,
++ object->variant.
++ fileVariant.top);
++ object->variant.fileVariant.top = NULL;
++ yaffs_DoGenericObjectDeletion(object);
++
++ } else if (object) {
++ /* It's either a data chunk in a live file or
++ * an ObjectHeader, so we're interested in it.
++ * NB Need to keep the ObjectHeaders of deleted files
++ * until the whole file has been deleted off
++ */
++ tags.serialNumber++;
++
++ dev->nGCCopies++;
++
++ if (tags.chunkId == 0) {
++ /* It is an object Id,
++ * We need to nuke the shrinkheader flags first
++ * We no longer want the shrinkHeader flag since its work is done
++ * and if it is left in place it will mess up scanning.
++ * Also, clear out any shadowing stuff
++ */
++
++ yaffs_ObjectHeader *oh;
++ oh = (yaffs_ObjectHeader *)buffer;
++ oh->isShrink = 0;
++ oh->shadowsObject = -1;
++ tags.extraShadows = 0;
++ tags.extraIsShrinkHeader = 0;
++ }
++
++ newChunk =
++ yaffs_WriteNewChunkWithTagsToNAND(dev, buffer, &tags, 1);
++
++ if (newChunk < 0) {
++ retVal = YAFFS_FAIL;
++ } else {
++
++ /* Ok, now fix up the Tnodes etc. */
++
++ if (tags.chunkId == 0) {
++ /* It's a header */
++ object->chunkId = newChunk;
++ object->serial = tags.serialNumber;
++ } else {
++ /* It's a data chunk */
++ yaffs_PutChunkIntoFile
++ (object,
++ tags.chunkId,
++ newChunk, 0);
++ }
++ }
++ }
++
++ yaffs_DeleteChunk(dev, oldChunk, markNAND, __LINE__);
++
++ }
++ }
++
++ yaffs_ReleaseTempBuffer(dev, buffer, __LINE__);
++
++
++ /* Do any required cleanups */
++ for (i = 0; i < cleanups; i++) {
++ /* Time to delete the file too */
++ object =
++ yaffs_FindObjectByNumber(dev,
++ dev->gcCleanupList[i]);
++ if (object) {
++ yaffs_FreeTnode(dev,
++ object->variant.fileVariant.
++ top);
++ object->variant.fileVariant.top = NULL;
++ T(YAFFS_TRACE_GC,
++ (TSTR
++ ("yaffs: About to finally delete object %d"
++ TENDSTR), object->objectId));
++ yaffs_DoGenericObjectDeletion(object);
++ object->myDev->nDeletedFiles--;
++ }
++
++ }
++
++ }
++
++ if (chunksBefore >= (chunksAfter = yaffs_GetErasedChunks(dev))) {
++ T(YAFFS_TRACE_GC,
++ (TSTR
++ ("gc did not increase free chunks before %d after %d"
++ TENDSTR), chunksBefore, chunksAfter));
++ }
++
++ dev->isDoingGC = 0;
++
++ return YAFFS_OK;
++}
++
++/* New garbage collector
++ * If we're very low on erased blocks then we do aggressive garbage collection
++ * otherwise we do "leasurely" garbage collection.
++ * Aggressive gc looks further (whole array) and will accept less dirty blocks.
++ * Passive gc only inspects smaller areas and will only accept more dirty blocks.
++ *
++ * The idea is to help clear out space in a more spread-out manner.
++ * Dunno if it really does anything useful.
++ */
++static int yaffs_CheckGarbageCollection(yaffs_Device * dev)
++{
++ int block;
++ int aggressive;
++ int gcOk = YAFFS_OK;
++ int maxTries = 0;
++
++ int checkpointBlockAdjust;
++
++ if (dev->isDoingGC) {
++ /* Bail out so we don't get recursive gc */
++ return YAFFS_OK;
++ }
++
++ /* This loop should pass the first time.
++ * We'll only see looping here if the erase of the collected block fails.
++ */
++
++ do {
++ maxTries++;
++
++ checkpointBlockAdjust = (dev->nCheckpointReservedBlocks - dev->blocksInCheckpoint);
++ if(checkpointBlockAdjust < 0)
++ checkpointBlockAdjust = 0;
++
++ if (dev->nErasedBlocks < (dev->nReservedBlocks + checkpointBlockAdjust)) {
++ /* We need a block soon...*/
++ aggressive = 1;
++ } else {
++ /* We're in no hurry */
++ aggressive = 0;
++ }
++
++ block = yaffs_FindBlockForGarbageCollection(dev, aggressive);
++
++ if (block > 0) {
++ dev->garbageCollections++;
++ if (!aggressive) {
++ dev->passiveGarbageCollections++;
++ }
++
++ T(YAFFS_TRACE_GC,
++ (TSTR
++ ("yaffs: GC erasedBlocks %d aggressive %d" TENDSTR),
++ dev->nErasedBlocks, aggressive));
++
++ gcOk = yaffs_GarbageCollectBlock(dev, block);
++ }
++
++ if (dev->nErasedBlocks < (dev->nReservedBlocks) && block > 0) {
++ T(YAFFS_TRACE_GC,
++ (TSTR
++ ("yaffs: GC !!!no reclaim!!! erasedBlocks %d after try %d block %d"
++ TENDSTR), dev->nErasedBlocks, maxTries, block));
++ }
++ } while ((dev->nErasedBlocks < dev->nReservedBlocks) && (block > 0)
++ && (maxTries < 2));
++
++ return aggressive ? gcOk : YAFFS_OK;
++}
++
++/*------------------------- TAGS --------------------------------*/
++
++static int yaffs_TagsMatch(const yaffs_ExtendedTags * tags, int objectId,
++ int chunkInObject)
++{
++ return (tags->chunkId == chunkInObject &&
++ tags->objectId == objectId && !tags->chunkDeleted) ? 1 : 0;
++
++}
++
++
++/*-------------------- Data file manipulation -----------------*/
++
++static int yaffs_FindChunkInFile(yaffs_Object * in, int chunkInInode,
++ yaffs_ExtendedTags * tags)
++{
++ /*Get the Tnode, then get the level 0 offset chunk offset */
++ yaffs_Tnode *tn;
++ int theChunk = -1;
++ yaffs_ExtendedTags localTags;
++ int retVal = -1;
++
++ yaffs_Device *dev = in->myDev;
++
++ if (!tags) {
++ /* Passed a NULL, so use our own tags space */
++ tags = &localTags;
++ }
++
++ tn = yaffs_FindLevel0Tnode(dev, &in->variant.fileVariant, chunkInInode);
++
++ if (tn) {
++ theChunk = yaffs_GetChunkGroupBase(dev,tn,chunkInInode);
++
++ retVal =
++ yaffs_FindChunkInGroup(dev, theChunk, tags, in->objectId,
++ chunkInInode);
++ }
++ return retVal;
++}
++
++static int yaffs_FindAndDeleteChunkInFile(yaffs_Object * in, int chunkInInode,
++ yaffs_ExtendedTags * tags)
++{
++ /* Get the Tnode, then get the level 0 offset chunk offset */
++ yaffs_Tnode *tn;
++ int theChunk = -1;
++ yaffs_ExtendedTags localTags;
++
++ yaffs_Device *dev = in->myDev;
++ int retVal = -1;
++
++ if (!tags) {
++ /* Passed a NULL, so use our own tags space */
++ tags = &localTags;
++ }
++
++ tn = yaffs_FindLevel0Tnode(dev, &in->variant.fileVariant, chunkInInode);
++
++ if (tn) {
++
++ theChunk = yaffs_GetChunkGroupBase(dev,tn,chunkInInode);
++
++ retVal =
++ yaffs_FindChunkInGroup(dev, theChunk, tags, in->objectId,
++ chunkInInode);
++
++ /* Delete the entry in the filestructure (if found) */
++ if (retVal != -1) {
++ yaffs_PutLevel0Tnode(dev,tn,chunkInInode,0);
++ }
++ } else {
++ /*T(("No level 0 found for %d\n", chunkInInode)); */
++ }
++
++ if (retVal == -1) {
++ /* T(("Could not find %d to delete\n",chunkInInode)); */
++ }
++ return retVal;
++}
++
++#ifdef YAFFS_PARANOID
++
++static int yaffs_CheckFileSanity(yaffs_Object * in)
++{
++ int chunk;
++ int nChunks;
++ int fSize;
++ int failed = 0;
++ int objId;
++ yaffs_Tnode *tn;
++ yaffs_Tags localTags;
++ yaffs_Tags *tags = &localTags;
++ int theChunk;
++ int chunkDeleted;
++
++ if (in->variantType != YAFFS_OBJECT_TYPE_FILE) {
++ /* T(("Object not a file\n")); */
++ return YAFFS_FAIL;
++ }
++
++ objId = in->objectId;
++ fSize = in->variant.fileVariant.fileSize;
++ nChunks =
++ (fSize + in->myDev->nDataBytesPerChunk - 1) / in->myDev->nDataBytesPerChunk;
++
++ for (chunk = 1; chunk <= nChunks; chunk++) {
++ tn = yaffs_FindLevel0Tnode(in->myDev, &in->variant.fileVariant,
++ chunk);
++
++ if (tn) {
++
++ theChunk = yaffs_GetChunkGroupBase(dev,tn,chunk);
++
++ if (yaffs_CheckChunkBits
++ (dev, theChunk / dev->nChunksPerBlock,
++ theChunk % dev->nChunksPerBlock)) {
++
++ yaffs_ReadChunkTagsFromNAND(in->myDev, theChunk,
++ tags,
++ &chunkDeleted);
++ if (yaffs_TagsMatch
++ (tags, in->objectId, chunk, chunkDeleted)) {
++ /* found it; */
++
++ }
++ } else {
++
++ failed = 1;
++ }
++
++ } else {
++ /* T(("No level 0 found for %d\n", chunk)); */
++ }
++ }
++
++ return failed ? YAFFS_FAIL : YAFFS_OK;
++}
++
++#endif
++
++static int yaffs_PutChunkIntoFile(yaffs_Object * in, int chunkInInode,
++ int chunkInNAND, int inScan)
++{
++ /* NB inScan is zero unless scanning.
++ * For forward scanning, inScan is > 0;
++ * for backward scanning inScan is < 0
++ */
++
++ yaffs_Tnode *tn;
++ yaffs_Device *dev = in->myDev;
++ int existingChunk;
++ yaffs_ExtendedTags existingTags;
++ yaffs_ExtendedTags newTags;
++ unsigned existingSerial, newSerial;
++
++ if (in->variantType != YAFFS_OBJECT_TYPE_FILE) {
++ /* Just ignore an attempt at putting a chunk into a non-file during scanning
++ * If it is not during Scanning then something went wrong!
++ */
++ if (!inScan) {
++ T(YAFFS_TRACE_ERROR,
++ (TSTR
++ ("yaffs tragedy:attempt to put data chunk into a non-file"
++ TENDSTR)));
++ YBUG();
++ }
++
++ yaffs_DeleteChunk(dev, chunkInNAND, 1, __LINE__);
++ return YAFFS_OK;
++ }
++
++ tn = yaffs_AddOrFindLevel0Tnode(dev,
++ &in->variant.fileVariant,
++ chunkInInode,
++ NULL);
++ if (!tn) {
++ return YAFFS_FAIL;
++ }
++
++ existingChunk = yaffs_GetChunkGroupBase(dev,tn,chunkInInode);
++
++ if (inScan != 0) {
++ /* If we're scanning then we need to test for duplicates
++ * NB This does not need to be efficient since it should only ever
++ * happen when the power fails during a write, then only one
++ * chunk should ever be affected.
++ *
++ * Correction for YAFFS2: This could happen quite a lot and we need to think about efficiency! TODO
++ * Update: For backward scanning we don't need to re-read tags so this is quite cheap.
++ */
++
++ if (existingChunk != 0) {
++ /* NB Right now existing chunk will not be real chunkId if the device >= 32MB
++ * thus we have to do a FindChunkInFile to get the real chunk id.
++ *
++ * We have a duplicate now we need to decide which one to use:
++ *
++ * Backwards scanning YAFFS2: The old one is what we use, dump the new one.
++ * Forward scanning YAFFS2: The new one is what we use, dump the old one.
++ * YAFFS1: Get both sets of tags and compare serial numbers.
++ */
++
++ if (inScan > 0) {
++ /* Only do this for forward scanning */
++ yaffs_ReadChunkWithTagsFromNAND(dev,
++ chunkInNAND,
++ NULL, &newTags);
++
++ /* Do a proper find */
++ existingChunk =
++ yaffs_FindChunkInFile(in, chunkInInode,
++ &existingTags);
++ }
++
++ if (existingChunk <= 0) {
++ /*Hoosterman - how did this happen? */
++
++ T(YAFFS_TRACE_ERROR,
++ (TSTR
++ ("yaffs tragedy: existing chunk < 0 in scan"
++ TENDSTR)));
++
++ }
++
++ /* NB The deleted flags should be false, otherwise the chunks will
++ * not be loaded during a scan
++ */
++
++ newSerial = newTags.serialNumber;
++ existingSerial = existingTags.serialNumber;
++
++ if ((inScan > 0) &&
++ (in->myDev->isYaffs2 ||
++ existingChunk <= 0 ||
++ ((existingSerial + 1) & 3) == newSerial)) {
++ /* Forward scanning.
++ * Use new
++ * Delete the old one and drop through to update the tnode
++ */
++ yaffs_DeleteChunk(dev, existingChunk, 1,
++ __LINE__);
++ } else {
++ /* Backward scanning or we want to use the existing one
++ * Use existing.
++ * Delete the new one and return early so that the tnode isn't changed
++ */
++ yaffs_DeleteChunk(dev, chunkInNAND, 1,
++ __LINE__);
++ return YAFFS_OK;
++ }
++ }
++
++ }
++
++ if (existingChunk == 0) {
++ in->nDataChunks++;
++ }
++
++ yaffs_PutLevel0Tnode(dev,tn,chunkInInode,chunkInNAND);
++
++ return YAFFS_OK;
++}
++
++static int yaffs_ReadChunkDataFromObject(yaffs_Object * in, int chunkInInode,
++ __u8 * buffer)
++{
++ int chunkInNAND = yaffs_FindChunkInFile(in, chunkInInode, NULL);
++
++ if (chunkInNAND >= 0) {
++ return yaffs_ReadChunkWithTagsFromNAND(in->myDev, chunkInNAND,
++ buffer,NULL);
++ } else {
++ T(YAFFS_TRACE_NANDACCESS,
++ (TSTR("Chunk %d not found zero instead" TENDSTR),
++ chunkInNAND));
++ /* get sane (zero) data if you read a hole */
++ memset(buffer, 0, in->myDev->nDataBytesPerChunk);
++ return 0;
++ }
++
++}
++
++void yaffs_DeleteChunk(yaffs_Device * dev, int chunkId, int markNAND, int lyn)
++{
++ int block;
++ int page;
++ yaffs_ExtendedTags tags;
++ yaffs_BlockInfo *bi;
++
++ if (chunkId <= 0)
++ return;
++
++ dev->nDeletions++;
++ block = chunkId / dev->nChunksPerBlock;
++ page = chunkId % dev->nChunksPerBlock;
++
++ bi = yaffs_GetBlockInfo(dev, block);
++
++ T(YAFFS_TRACE_DELETION,
++ (TSTR("line %d delete of chunk %d" TENDSTR), lyn, chunkId));
++
++ if (markNAND &&
++ bi->blockState != YAFFS_BLOCK_STATE_COLLECTING && !dev->isYaffs2) {
++
++ yaffs_InitialiseTags(&tags);
++
++ tags.chunkDeleted = 1;
++
++ yaffs_WriteChunkWithTagsToNAND(dev, chunkId, NULL, &tags);
++ yaffs_HandleUpdateChunk(dev, chunkId, &tags);
++ } else {
++ dev->nUnmarkedDeletions++;
++ }
++
++ /* Pull out of the management area.
++ * If the whole block became dirty, this will kick off an erasure.
++ */
++ if (bi->blockState == YAFFS_BLOCK_STATE_ALLOCATING ||
++ bi->blockState == YAFFS_BLOCK_STATE_FULL ||
++ bi->blockState == YAFFS_BLOCK_STATE_NEEDS_SCANNING ||
++ bi->blockState == YAFFS_BLOCK_STATE_COLLECTING) {
++ dev->nFreeChunks++;
++
++ yaffs_ClearChunkBit(dev, block, page);
++
++ bi->pagesInUse--;
++
++ if (bi->pagesInUse == 0 &&
++ !bi->hasShrinkHeader &&
++ bi->blockState != YAFFS_BLOCK_STATE_ALLOCATING &&
++ bi->blockState != YAFFS_BLOCK_STATE_NEEDS_SCANNING) {
++ yaffs_BlockBecameDirty(dev, block);
++ }
++
++ } else {
++ /* T(("Bad news deleting chunk %d\n",chunkId)); */
++ }
++
++}
++
++static int yaffs_WriteChunkDataToObject(yaffs_Object * in, int chunkInInode,
++ const __u8 * buffer, int nBytes,
++ int useReserve)
++{
++ /* Find old chunk Need to do this to get serial number
++ * Write new one and patch into tree.
++ * Invalidate old tags.
++ */
++
++ int prevChunkId;
++ yaffs_ExtendedTags prevTags;
++
++ int newChunkId;
++ yaffs_ExtendedTags newTags;
++
++ yaffs_Device *dev = in->myDev;
++
++ yaffs_CheckGarbageCollection(dev);
++
++ /* Get the previous chunk at this location in the file if it exists */
++ prevChunkId = yaffs_FindChunkInFile(in, chunkInInode, &prevTags);
++
++ /* Set up new tags */
++ yaffs_InitialiseTags(&newTags);
++
++ newTags.chunkId = chunkInInode;
++ newTags.objectId = in->objectId;
++ newTags.serialNumber =
++ (prevChunkId >= 0) ? prevTags.serialNumber + 1 : 1;
++ newTags.byteCount = nBytes;
++
++ newChunkId =
++ yaffs_WriteNewChunkWithTagsToNAND(dev, buffer, &newTags,
++ useReserve);
++
++ if (newChunkId >= 0) {
++ yaffs_PutChunkIntoFile(in, chunkInInode, newChunkId, 0);
++
++ if (prevChunkId >= 0) {
++ yaffs_DeleteChunk(dev, prevChunkId, 1, __LINE__);
++
++ }
++
++ yaffs_CheckFileSanity(in);
++ }
++ return newChunkId;
++
++}
++
++/* UpdateObjectHeader updates the header on NAND for an object.
++ * If name is not NULL, then that new name is used.
++ */
++int yaffs_UpdateObjectHeader(yaffs_Object * in, const YCHAR * name, int force,
++ int isShrink, int shadows)
++{
++
++ yaffs_BlockInfo *bi;
++
++ yaffs_Device *dev = in->myDev;
++
++ int prevChunkId;
++ int retVal = 0;
++ int result = 0;
++
++ int newChunkId;
++ yaffs_ExtendedTags newTags;
++
++ __u8 *buffer = NULL;
++ YCHAR oldName[YAFFS_MAX_NAME_LENGTH + 1];
++
++ yaffs_ObjectHeader *oh = NULL;
++
++ if (!in->fake || force) {
++
++ yaffs_CheckGarbageCollection(dev);
++
++ buffer = yaffs_GetTempBuffer(in->myDev, __LINE__);
++ oh = (yaffs_ObjectHeader *) buffer;
++
++ prevChunkId = in->chunkId;
++
++ if (prevChunkId >= 0) {
++ result = yaffs_ReadChunkWithTagsFromNAND(dev, prevChunkId,
++ buffer, NULL);
++ memcpy(oldName, oh->name, sizeof(oh->name));
++ }
++
++ memset(buffer, 0xFF, dev->nDataBytesPerChunk);
++
++ oh->type = in->variantType;
++ oh->yst_mode = in->yst_mode;
++ oh->shadowsObject = shadows;
++
++#ifdef CONFIG_YAFFS_WINCE
++ oh->win_atime[0] = in->win_atime[0];
++ oh->win_ctime[0] = in->win_ctime[0];
++ oh->win_mtime[0] = in->win_mtime[0];
++ oh->win_atime[1] = in->win_atime[1];
++ oh->win_ctime[1] = in->win_ctime[1];
++ oh->win_mtime[1] = in->win_mtime[1];
++#else
++ oh->yst_uid = in->yst_uid;
++ oh->yst_gid = in->yst_gid;
++ oh->yst_atime = in->yst_atime;
++ oh->yst_mtime = in->yst_mtime;
++ oh->yst_ctime = in->yst_ctime;
++ oh->yst_rdev = in->yst_rdev;
++#endif
++ if (in->parent) {
++ oh->parentObjectId = in->parent->objectId;
++ } else {
++ oh->parentObjectId = 0;
++ }
++
++ if (name && *name) {
++ memset(oh->name, 0, sizeof(oh->name));
++ yaffs_strncpy(oh->name, name, YAFFS_MAX_NAME_LENGTH);
++ } else if (prevChunkId) {
++ memcpy(oh->name, oldName, sizeof(oh->name));
++ } else {
++ memset(oh->name, 0, sizeof(oh->name));
++ }
++
++ oh->isShrink = isShrink;
++
++ switch (in->variantType) {
++ case YAFFS_OBJECT_TYPE_UNKNOWN:
++ /* Should not happen */
++ break;
++ case YAFFS_OBJECT_TYPE_FILE:
++ oh->fileSize =
++ (oh->parentObjectId == YAFFS_OBJECTID_DELETED
++ || oh->parentObjectId ==
++ YAFFS_OBJECTID_UNLINKED) ? 0 : in->variant.
++ fileVariant.fileSize;
++ break;
++ case YAFFS_OBJECT_TYPE_HARDLINK:
++ oh->equivalentObjectId =
++ in->variant.hardLinkVariant.equivalentObjectId;
++ break;
++ case YAFFS_OBJECT_TYPE_SPECIAL:
++ /* Do nothing */
++ break;
++ case YAFFS_OBJECT_TYPE_DIRECTORY:
++ /* Do nothing */
++ break;
++ case YAFFS_OBJECT_TYPE_SYMLINK:
++ yaffs_strncpy(oh->alias,
++ in->variant.symLinkVariant.alias,
++ YAFFS_MAX_ALIAS_LENGTH);
++ oh->alias[YAFFS_MAX_ALIAS_LENGTH] = 0;
++ break;
++ }
++
++ /* Tags */
++ yaffs_InitialiseTags(&newTags);
++ in->serial++;
++ newTags.chunkId = 0;
++ newTags.objectId = in->objectId;
++ newTags.serialNumber = in->serial;
++
++ /* Add extra info for file header */
++
++ newTags.extraHeaderInfoAvailable = 1;
++ newTags.extraParentObjectId = oh->parentObjectId;
++ newTags.extraFileLength = oh->fileSize;
++ newTags.extraIsShrinkHeader = oh->isShrink;
++ newTags.extraEquivalentObjectId = oh->equivalentObjectId;
++ newTags.extraShadows = (oh->shadowsObject > 0) ? 1 : 0;
++ newTags.extraObjectType = in->variantType;
++
++ /* Create new chunk in NAND */
++ newChunkId =
++ yaffs_WriteNewChunkWithTagsToNAND(dev, buffer, &newTags,
++ (prevChunkId >= 0) ? 1 : 0);
++
++ if (newChunkId >= 0) {
++
++ in->chunkId = newChunkId;
++
++ if (prevChunkId >= 0) {
++ yaffs_DeleteChunk(dev, prevChunkId, 1,
++ __LINE__);
++ }
++
++ if(!yaffs_ObjectHasCachedWriteData(in))
++ in->dirty = 0;
++
++ /* If this was a shrink, then mark the block that the chunk lives on */
++ if (isShrink) {
++ bi = yaffs_GetBlockInfo(in->myDev,
++ newChunkId /in->myDev-> nChunksPerBlock);
++ bi->hasShrinkHeader = 1;
++ }
++
++ }
++
++ retVal = newChunkId;
++
++ }
++
++ if (buffer)
++ yaffs_ReleaseTempBuffer(dev, buffer, __LINE__);
++
++ return retVal;
++}
++
++/*------------------------ Short Operations Cache ----------------------------------------
++ * In many situations where there is no high level buffering (eg WinCE) a lot of
++ * reads might be short sequential reads, and a lot of writes may be short
++ * sequential writes. eg. scanning/writing a jpeg file.
++ * In these cases, a short read/write cache can provide a huge perfomance benefit
++ * with dumb-as-a-rock code.
++ * In Linux, the page cache provides read buffering aand the short op cache provides write
++ * buffering.
++ *
++ * There are a limited number (~10) of cache chunks per device so that we don't
++ * need a very intelligent search.
++ */
++
++static int yaffs_ObjectHasCachedWriteData(yaffs_Object *obj)
++{
++ yaffs_Device *dev = obj->myDev;
++ int i;
++ yaffs_ChunkCache *cache;
++ int nCaches = obj->myDev->nShortOpCaches;
++
++ for(i = 0; i < nCaches; i++){
++ cache = &dev->srCache[i];
++ if (cache->object == obj &&
++ cache->dirty)
++ return 1;
++ }
++
++ return 0;
++}
++
++
++static void yaffs_FlushFilesChunkCache(yaffs_Object * obj)
++{
++ yaffs_Device *dev = obj->myDev;
++ int lowest = -99; /* Stop compiler whining. */
++ int i;
++ yaffs_ChunkCache *cache;
++ int chunkWritten = 0;
++ int nCaches = obj->myDev->nShortOpCaches;
++
++ if (nCaches > 0) {
++ do {
++ cache = NULL;
++
++ /* Find the dirty cache for this object with the lowest chunk id. */
++ for (i = 0; i < nCaches; i++) {
++ if (dev->srCache[i].object == obj &&
++ dev->srCache[i].dirty) {
++ if (!cache
++ || dev->srCache[i].chunkId <
++ lowest) {
++ cache = &dev->srCache[i];
++ lowest = cache->chunkId;
++ }
++ }
++ }
++
++ if (cache && !cache->locked) {
++ /* Write it out and free it up */
++
++ chunkWritten =
++ yaffs_WriteChunkDataToObject(cache->object,
++ cache->chunkId,
++ cache->data,
++ cache->nBytes,
++ 1);
++ cache->dirty = 0;
++ cache->object = NULL;
++ }
++
++ } while (cache && chunkWritten > 0);
++
++ if (cache) {
++ /* Hoosterman, disk full while writing cache out. */
++ T(YAFFS_TRACE_ERROR,
++ (TSTR("yaffs tragedy: no space during cache write" TENDSTR)));
++
++ }
++ }
++
++}
++
++/*yaffs_FlushEntireDeviceCache(dev)
++ *
++ *
++ */
++
++void yaffs_FlushEntireDeviceCache(yaffs_Device *dev)
++{
++ yaffs_Object *obj;
++ int nCaches = dev->nShortOpCaches;
++ int i;
++
++ /* Find a dirty object in the cache and flush it...
++ * until there are no further dirty objects.
++ */
++ do {
++ obj = NULL;
++ for( i = 0; i < nCaches && !obj; i++) {
++ if (dev->srCache[i].object &&
++ dev->srCache[i].dirty)
++ obj = dev->srCache[i].object;
++
++ }
++ if(obj)
++ yaffs_FlushFilesChunkCache(obj);
++
++ } while(obj);
++
++}
++
++
++/* Grab us a cache chunk for use.
++ * First look for an empty one.
++ * Then look for the least recently used non-dirty one.
++ * Then look for the least recently used dirty one...., flush and look again.
++ */
++static yaffs_ChunkCache *yaffs_GrabChunkCacheWorker(yaffs_Device * dev)
++{
++ int i;
++ int usage;
++ int theOne;
++
++ if (dev->nShortOpCaches > 0) {
++ for (i = 0; i < dev->nShortOpCaches; i++) {
++ if (!dev->srCache[i].object)
++ return &dev->srCache[i];
++ }
++
++ return NULL;
++
++ theOne = -1;
++ usage = 0; /* just to stop the compiler grizzling */
++
++ for (i = 0; i < dev->nShortOpCaches; i++) {
++ if (!dev->srCache[i].dirty &&
++ ((dev->srCache[i].lastUse < usage && theOne >= 0) ||
++ theOne < 0)) {
++ usage = dev->srCache[i].lastUse;
++ theOne = i;
++ }
++ }
++
++
++ return theOne >= 0 ? &dev->srCache[theOne] : NULL;
++ } else {
++ return NULL;
++ }
++
++}
++
++static yaffs_ChunkCache *yaffs_GrabChunkCache(yaffs_Device * dev)
++{
++ yaffs_ChunkCache *cache;
++ yaffs_Object *theObj;
++ int usage;
++ int i;
++ int pushout;
++
++ if (dev->nShortOpCaches > 0) {
++ /* Try find a non-dirty one... */
++
++ cache = yaffs_GrabChunkCacheWorker(dev);
++
++ if (!cache) {
++ /* They were all dirty, find the last recently used object and flush
++ * its cache, then find again.
++ * NB what's here is not very accurate, we actually flush the object
++ * the last recently used page.
++ */
++
++ /* With locking we can't assume we can use entry zero */
++
++ theObj = NULL;
++ usage = -1;
++ cache = NULL;
++ pushout = -1;
++
++ for (i = 0; i < dev->nShortOpCaches; i++) {
++ if (dev->srCache[i].object &&
++ !dev->srCache[i].locked &&
++ (dev->srCache[i].lastUse < usage || !cache))
++ {
++ usage = dev->srCache[i].lastUse;
++ theObj = dev->srCache[i].object;
++ cache = &dev->srCache[i];
++ pushout = i;
++ }
++ }
++
++ if (!cache || cache->dirty) {
++ /* Flush and try again */
++ yaffs_FlushFilesChunkCache(theObj);
++ cache = yaffs_GrabChunkCacheWorker(dev);
++ }
++
++ }
++ return cache;
++ } else
++ return NULL;
++
++}
++
++/* Find a cached chunk */
++static yaffs_ChunkCache *yaffs_FindChunkCache(const yaffs_Object * obj,
++ int chunkId)
++{
++ yaffs_Device *dev = obj->myDev;
++ int i;
++ if (dev->nShortOpCaches > 0) {
++ for (i = 0; i < dev->nShortOpCaches; i++) {
++ if (dev->srCache[i].object == obj &&
++ dev->srCache[i].chunkId == chunkId) {
++ dev->cacheHits++;
++
++ return &dev->srCache[i];
++ }
++ }
++ }
++ return NULL;
++}
++
++/* Mark the chunk for the least recently used algorithym */
++static void yaffs_UseChunkCache(yaffs_Device * dev, yaffs_ChunkCache * cache,
++ int isAWrite)
++{
++
++ if (dev->nShortOpCaches > 0) {
++ if (dev->srLastUse < 0 || dev->srLastUse > 100000000) {
++ /* Reset the cache usages */
++ int i;
++ for (i = 1; i < dev->nShortOpCaches; i++) {
++ dev->srCache[i].lastUse = 0;
++ }
++ dev->srLastUse = 0;
++ }
++
++ dev->srLastUse++;
++
++ cache->lastUse = dev->srLastUse;
++
++ if (isAWrite) {
++ cache->dirty = 1;
++ }
++ }
++}
++
++/* Invalidate a single cache page.
++ * Do this when a whole page gets written,
++ * ie the short cache for this page is no longer valid.
++ */
++static void yaffs_InvalidateChunkCache(yaffs_Object * object, int chunkId)
++{
++ if (object->myDev->nShortOpCaches > 0) {
++ yaffs_ChunkCache *cache = yaffs_FindChunkCache(object, chunkId);
++
++ if (cache) {
++ cache->object = NULL;
++ }
++ }
++}
++
++/* Invalidate all the cache pages associated with this object
++ * Do this whenever ther file is deleted or resized.
++ */
++static void yaffs_InvalidateWholeChunkCache(yaffs_Object * in)
++{
++ int i;
++ yaffs_Device *dev = in->myDev;
++
++ if (dev->nShortOpCaches > 0) {
++ /* Invalidate it. */
++ for (i = 0; i < dev->nShortOpCaches; i++) {
++ if (dev->srCache[i].object == in) {
++ dev->srCache[i].object = NULL;
++ }
++ }
++ }
++}
++
++/*--------------------- Checkpointing --------------------*/
++
++
++static int yaffs_WriteCheckpointValidityMarker(yaffs_Device *dev,int head)
++{
++ yaffs_CheckpointValidity cp;
++ cp.structType = sizeof(cp);
++ cp.magic = YAFFS_MAGIC;
++ cp.version = YAFFS_CHECKPOINT_VERSION;
++ cp.head = (head) ? 1 : 0;
++
++ return (yaffs_CheckpointWrite(dev,&cp,sizeof(cp)) == sizeof(cp))?
++ 1 : 0;
++}
++
++static int yaffs_ReadCheckpointValidityMarker(yaffs_Device *dev, int head)
++{
++ yaffs_CheckpointValidity cp;
++ int ok;
++
++ ok = (yaffs_CheckpointRead(dev,&cp,sizeof(cp)) == sizeof(cp));
++
++ if(ok)
++ ok = (cp.structType == sizeof(cp)) &&
++ (cp.magic == YAFFS_MAGIC) &&
++ (cp.version == YAFFS_CHECKPOINT_VERSION) &&
++ (cp.head == ((head) ? 1 : 0));
++ return ok ? 1 : 0;
++}
++
++static void yaffs_DeviceToCheckpointDevice(yaffs_CheckpointDevice *cp,
++ yaffs_Device *dev)
++{
++ cp->nErasedBlocks = dev->nErasedBlocks;
++ cp->allocationBlock = dev->allocationBlock;
++ cp->allocationPage = dev->allocationPage;
++ cp->nFreeChunks = dev->nFreeChunks;
++
++ cp->nDeletedFiles = dev->nDeletedFiles;
++ cp->nUnlinkedFiles = dev->nUnlinkedFiles;
++ cp->nBackgroundDeletions = dev->nBackgroundDeletions;
++ cp->sequenceNumber = dev->sequenceNumber;
++ cp->oldestDirtySequence = dev->oldestDirtySequence;
++
++}
++
++static void yaffs_CheckpointDeviceToDevice(yaffs_Device *dev,
++ yaffs_CheckpointDevice *cp)
++{
++ dev->nErasedBlocks = cp->nErasedBlocks;
++ dev->allocationBlock = cp->allocationBlock;
++ dev->allocationPage = cp->allocationPage;
++ dev->nFreeChunks = cp->nFreeChunks;
++
++ dev->nDeletedFiles = cp->nDeletedFiles;
++ dev->nUnlinkedFiles = cp->nUnlinkedFiles;
++ dev->nBackgroundDeletions = cp->nBackgroundDeletions;
++ dev->sequenceNumber = cp->sequenceNumber;
++ dev->oldestDirtySequence = cp->oldestDirtySequence;
++}
++
++
++static int yaffs_WriteCheckpointDevice(yaffs_Device *dev)
++{
++ yaffs_CheckpointDevice cp;
++ __u32 nBytes;
++ __u32 nBlocks = (dev->internalEndBlock - dev->internalStartBlock + 1);
++
++ int ok;
++
++ /* Write device runtime values*/
++ yaffs_DeviceToCheckpointDevice(&cp,dev);
++ cp.structType = sizeof(cp);
++
++ ok = (yaffs_CheckpointWrite(dev,&cp,sizeof(cp)) == sizeof(cp));
++
++ /* Write block info */
++ if(ok) {
++ nBytes = nBlocks * sizeof(yaffs_BlockInfo);
++ ok = (yaffs_CheckpointWrite(dev,dev->blockInfo,nBytes) == nBytes);
++ }
++
++ /* Write chunk bits */
++ if(ok) {
++ nBytes = nBlocks * dev->chunkBitmapStride;
++ ok = (yaffs_CheckpointWrite(dev,dev->chunkBits,nBytes) == nBytes);
++ }
++ return ok ? 1 : 0;
++
++}
++
++static int yaffs_ReadCheckpointDevice(yaffs_Device *dev)
++{
++ yaffs_CheckpointDevice cp;
++ __u32 nBytes;
++ __u32 nBlocks = (dev->internalEndBlock - dev->internalStartBlock + 1);
++
++ int ok;
++
++ ok = (yaffs_CheckpointRead(dev,&cp,sizeof(cp)) == sizeof(cp));
++ if(!ok)
++ return 0;
++
++ if(cp.structType != sizeof(cp))
++ return 0;
++
++
++ yaffs_CheckpointDeviceToDevice(dev,&cp);
++
++ nBytes = nBlocks * sizeof(yaffs_BlockInfo);
++
++ ok = (yaffs_CheckpointRead(dev,dev->blockInfo,nBytes) == nBytes);
++
++ if(!ok)
++ return 0;
++ nBytes = nBlocks * dev->chunkBitmapStride;
++
++ ok = (yaffs_CheckpointRead(dev,dev->chunkBits,nBytes) == nBytes);
++
++ return ok ? 1 : 0;
++}
++
++static void yaffs_ObjectToCheckpointObject(yaffs_CheckpointObject *cp,
++ yaffs_Object *obj)
++{
++
++ cp->objectId = obj->objectId;
++ cp->parentId = (obj->parent) ? obj->parent->objectId : 0;
++ cp->chunkId = obj->chunkId;
++ cp->variantType = obj->variantType;
++ cp->deleted = obj->deleted;
++ cp->softDeleted = obj->softDeleted;
++ cp->unlinked = obj->unlinked;
++ cp->fake = obj->fake;
++ cp->renameAllowed = obj->renameAllowed;
++ cp->unlinkAllowed = obj->unlinkAllowed;
++ cp->serial = obj->serial;
++ cp->nDataChunks = obj->nDataChunks;
++
++ if(obj->variantType == YAFFS_OBJECT_TYPE_FILE)
++ cp->fileSizeOrEquivalentObjectId = obj->variant.fileVariant.fileSize;
++ else if(obj->variantType == YAFFS_OBJECT_TYPE_HARDLINK)
++ cp->fileSizeOrEquivalentObjectId = obj->variant.hardLinkVariant.equivalentObjectId;
++}
++
++static void yaffs_CheckpointObjectToObject( yaffs_Object *obj,yaffs_CheckpointObject *cp)
++{
++
++ yaffs_Object *parent;
++
++ obj->objectId = cp->objectId;
++
++ if(cp->parentId)
++ parent = yaffs_FindOrCreateObjectByNumber(
++ obj->myDev,
++ cp->parentId,
++ YAFFS_OBJECT_TYPE_DIRECTORY);
++ else
++ parent = NULL;
++
++ if(parent)
++ yaffs_AddObjectToDirectory(parent, obj);
++
++ obj->chunkId = cp->chunkId;
++ obj->variantType = cp->variantType;
++ obj->deleted = cp->deleted;
++ obj->softDeleted = cp->softDeleted;
++ obj->unlinked = cp->unlinked;
++ obj->fake = cp->fake;
++ obj->renameAllowed = cp->renameAllowed;
++ obj->unlinkAllowed = cp->unlinkAllowed;
++ obj->serial = cp->serial;
++ obj->nDataChunks = cp->nDataChunks;
++
++ if(obj->variantType == YAFFS_OBJECT_TYPE_FILE)
++ obj->variant.fileVariant.fileSize = cp->fileSizeOrEquivalentObjectId;
++ else if(obj->variantType == YAFFS_OBJECT_TYPE_HARDLINK)
++ obj->variant.hardLinkVariant.equivalentObjectId = cp->fileSizeOrEquivalentObjectId;
++
++ if(obj->objectId >= YAFFS_NOBJECT_BUCKETS)
++ obj->lazyLoaded = 1;
++}
++
++
++
++static int yaffs_CheckpointTnodeWorker(yaffs_Object * in, yaffs_Tnode * tn,
++ __u32 level, int chunkOffset)
++{
++ int i;
++ yaffs_Device *dev = in->myDev;
++ int ok = 1;
++ int nTnodeBytes = (dev->tnodeWidth * YAFFS_NTNODES_LEVEL0)/8;
++
++ if (tn) {
++ if (level > 0) {
++
++ for (i = 0; i < YAFFS_NTNODES_INTERNAL && ok; i++){
++ if (tn->internal[i]) {
++ ok = yaffs_CheckpointTnodeWorker(in,
++ tn->internal[i],
++ level - 1,
++ (chunkOffset<<YAFFS_TNODES_INTERNAL_BITS) + i);
++ }
++ }
++ } else if (level == 0) {
++ __u32 baseOffset = chunkOffset << YAFFS_TNODES_LEVEL0_BITS;
++ /* printf("write tnode at %d\n",baseOffset); */
++ ok = (yaffs_CheckpointWrite(dev,&baseOffset,sizeof(baseOffset)) == sizeof(baseOffset));
++ if(ok)
++ ok = (yaffs_CheckpointWrite(dev,tn,nTnodeBytes) == nTnodeBytes);
++ }
++ }
++
++ return ok;
++
++}
++
++static int yaffs_WriteCheckpointTnodes(yaffs_Object *obj)
++{
++ __u32 endMarker = ~0;
++ int ok = 1;
++
++ if(obj->variantType == YAFFS_OBJECT_TYPE_FILE){
++ ok = yaffs_CheckpointTnodeWorker(obj,
++ obj->variant.fileVariant.top,
++ obj->variant.fileVariant.topLevel,
++ 0);
++ if(ok)
++ ok = (yaffs_CheckpointWrite(obj->myDev,&endMarker,sizeof(endMarker)) ==
++ sizeof(endMarker));
++ }
++
++ return ok ? 1 : 0;
++}
++
++static int yaffs_ReadCheckpointTnodes(yaffs_Object *obj)
++{
++ __u32 baseChunk;
++ int ok = 1;
++ yaffs_Device *dev = obj->myDev;
++ yaffs_FileStructure *fileStructPtr = &obj->variant.fileVariant;
++ yaffs_Tnode *tn;
++
++ ok = (yaffs_CheckpointRead(dev,&baseChunk,sizeof(baseChunk)) == sizeof(baseChunk));
++
++ while(ok && (~baseChunk)){
++ /* Read level 0 tnode */
++
++ /* printf("read tnode at %d\n",baseChunk); */
++ tn = yaffs_GetTnodeRaw(dev);
++ if(tn)
++ ok = (yaffs_CheckpointRead(dev,tn,(dev->tnodeWidth * YAFFS_NTNODES_LEVEL0)/8) ==
++ (dev->tnodeWidth * YAFFS_NTNODES_LEVEL0)/8);
++ else
++ ok = 0;
++
++ if(tn && ok){
++ ok = yaffs_AddOrFindLevel0Tnode(dev,
++ fileStructPtr,
++ baseChunk,
++ tn) ? 1 : 0;
++ }
++
++ if(ok)
++ ok = (yaffs_CheckpointRead(dev,&baseChunk,sizeof(baseChunk)) == sizeof(baseChunk));
++
++ }
++
++ return ok ? 1 : 0;
++}
++
++
++static int yaffs_WriteCheckpointObjects(yaffs_Device *dev)
++{
++ yaffs_Object *obj;
++ yaffs_CheckpointObject cp;
++ int i;
++ int ok = 1;
++ struct list_head *lh;
++
++
++ /* Iterate through the objects in each hash entry,
++ * dumping them to the checkpointing stream.
++ */
++
++ for(i = 0; ok && i < YAFFS_NOBJECT_BUCKETS; i++){
++ list_for_each(lh, &dev->objectBucket[i].list) {
++ if (lh) {
++ obj = list_entry(lh, yaffs_Object, hashLink);
++ if (!obj->deferedFree) {
++ yaffs_ObjectToCheckpointObject(&cp,obj);
++ cp.structType = sizeof(cp);
++
++ T(YAFFS_TRACE_CHECKPOINT,(
++ TSTR("Checkpoint write object %d parent %d type %d chunk %d obj addr %x" TENDSTR),
++ cp.objectId,cp.parentId,cp.variantType,cp.chunkId,(unsigned) obj));
++
++ ok = (yaffs_CheckpointWrite(dev,&cp,sizeof(cp)) == sizeof(cp));
++
++ if(ok && obj->variantType == YAFFS_OBJECT_TYPE_FILE){
++ ok = yaffs_WriteCheckpointTnodes(obj);
++ }
++ }
++ }
++ }
++ }
++
++ /* Dump end of list */
++ memset(&cp,0xFF,sizeof(yaffs_CheckpointObject));
++ cp.structType = sizeof(cp);
++
++ if(ok)
++ ok = (yaffs_CheckpointWrite(dev,&cp,sizeof(cp)) == sizeof(cp));
++
++ return ok ? 1 : 0;
++}
++
++static int yaffs_ReadCheckpointObjects(yaffs_Device *dev)
++{
++ yaffs_Object *obj;
++ yaffs_CheckpointObject cp;
++ int ok = 1;
++ int done = 0;
++ yaffs_Object *hardList = NULL;
++
++ while(ok && !done) {
++ ok = (yaffs_CheckpointRead(dev,&cp,sizeof(cp)) == sizeof(cp));
++ if(cp.structType != sizeof(cp)) {
++ /* printf("structure parsing failed\n"); */
++ ok = 0;
++ }
++
++ if(ok && cp.objectId == ~0)
++ done = 1;
++ else if(ok){
++ obj = yaffs_FindOrCreateObjectByNumber(dev,cp.objectId, cp.variantType);
++ T(YAFFS_TRACE_CHECKPOINT,(TSTR("Checkpoint read object %d parent %d type %d chunk %d obj addr %x" TENDSTR),
++ cp.objectId,cp.parentId,cp.variantType,cp.chunkId,(unsigned) obj));
++ if(obj) {
++ yaffs_CheckpointObjectToObject(obj,&cp);
++ if(obj->variantType == YAFFS_OBJECT_TYPE_FILE) {
++ ok = yaffs_ReadCheckpointTnodes(obj);
++ } else if(obj->variantType == YAFFS_OBJECT_TYPE_HARDLINK) {
++ obj->hardLinks.next =
++ (struct list_head *)
++ hardList;
++ hardList = obj;
++ }
++
++ }
++ }
++ }
++
++ if(ok)
++ yaffs_HardlinkFixup(dev,hardList);
++
++ return ok ? 1 : 0;
++}
++
++static int yaffs_WriteCheckpointData(yaffs_Device *dev)
++{
++
++ int ok;
++
++ ok = yaffs_CheckpointOpen(dev,1);
++
++ if(ok)
++ ok = yaffs_WriteCheckpointValidityMarker(dev,1);
++ if(ok)
++ ok = yaffs_WriteCheckpointDevice(dev);
++ if(ok)
++ ok = yaffs_WriteCheckpointObjects(dev);
++ if(ok)
++ ok = yaffs_WriteCheckpointValidityMarker(dev,0);
++
++ if(!yaffs_CheckpointClose(dev))
++ ok = 0;
++
++ if(ok)
++ dev->isCheckpointed = 1;
++ else
++ dev->isCheckpointed = 0;
++
++ return dev->isCheckpointed;
++}
++
++static int yaffs_ReadCheckpointData(yaffs_Device *dev)
++{
++ int ok;
++
++ ok = yaffs_CheckpointOpen(dev,0); /* open for read */
++
++ if(ok)
++ ok = yaffs_ReadCheckpointValidityMarker(dev,1);
++ if(ok)
++ ok = yaffs_ReadCheckpointDevice(dev);
++ if(ok)
++ ok = yaffs_ReadCheckpointObjects(dev);
++ if(ok)
++ ok = yaffs_ReadCheckpointValidityMarker(dev,0);
++
++
++
++ if(!yaffs_CheckpointClose(dev))
++ ok = 0;
++
++ if(ok)
++ dev->isCheckpointed = 1;
++ else
++ dev->isCheckpointed = 0;
++
++ return ok ? 1 : 0;
++
++}
++
++static void yaffs_InvalidateCheckpoint(yaffs_Device *dev)
++{
++ if(dev->isCheckpointed ||
++ dev->blocksInCheckpoint > 0){
++ dev->isCheckpointed = 0;
++ yaffs_CheckpointInvalidateStream(dev);
++ if(dev->superBlock && dev->markSuperBlockDirty)
++ dev->markSuperBlockDirty(dev->superBlock);
++ }
++}
++
++
++int yaffs_CheckpointSave(yaffs_Device *dev)
++{
++ yaffs_ReportOddballBlocks(dev);
++ T(YAFFS_TRACE_CHECKPOINT,(TSTR("save entry: isCheckpointed %d"TENDSTR),dev->isCheckpointed));
++
++ if(!dev->isCheckpointed)
++ yaffs_WriteCheckpointData(dev);
++
++ T(YAFFS_TRACE_CHECKPOINT,(TSTR("save exit: isCheckpointed %d"TENDSTR),dev->isCheckpointed));
++
++ return dev->isCheckpointed;
++}
++
++int yaffs_CheckpointRestore(yaffs_Device *dev)
++{
++ int retval;
++ T(YAFFS_TRACE_CHECKPOINT,(TSTR("restore entry: isCheckpointed %d"TENDSTR),dev->isCheckpointed));
++
++ retval = yaffs_ReadCheckpointData(dev);
++
++ T(YAFFS_TRACE_CHECKPOINT,(TSTR("restore exit: isCheckpointed %d"TENDSTR),dev->isCheckpointed));
++
++ yaffs_ReportOddballBlocks(dev);
++
++ return retval;
++}
++
++/*--------------------- File read/write ------------------------
++ * Read and write have very similar structures.
++ * In general the read/write has three parts to it
++ * An incomplete chunk to start with (if the read/write is not chunk-aligned)
++ * Some complete chunks
++ * An incomplete chunk to end off with
++ *
++ * Curve-balls: the first chunk might also be the last chunk.
++ */
++
++int yaffs_ReadDataFromFile(yaffs_Object * in, __u8 * buffer, loff_t offset,
++ int nBytes)
++{
++
++ int chunk;
++ int start;
++ int nToCopy;
++ int n = nBytes;
++ int nDone = 0;
++ yaffs_ChunkCache *cache;
++
++ yaffs_Device *dev;
++
++ dev = in->myDev;
++
++ while (n > 0) {
++ //chunk = offset / dev->nDataBytesPerChunk + 1;
++ //start = offset % dev->nDataBytesPerChunk;
++ yaffs_AddrToChunk(dev,offset,&chunk,&start);
++ chunk++;
++
++ /* OK now check for the curveball where the start and end are in
++ * the same chunk.
++ */
++ if ((start + n) < dev->nDataBytesPerChunk) {
++ nToCopy = n;
++ } else {
++ nToCopy = dev->nDataBytesPerChunk - start;
++ }
++
++ cache = yaffs_FindChunkCache(in, chunk);
++
++ /* If the chunk is already in the cache or it is less than a whole chunk
++ * then use the cache (if there is caching)
++ * else bypass the cache.
++ */
++ if (cache || nToCopy != dev->nDataBytesPerChunk) {
++ if (dev->nShortOpCaches > 0) {
++
++ /* If we can't find the data in the cache, then load it up. */
++
++ if (!cache) {
++ cache = yaffs_GrabChunkCache(in->myDev);
++ cache->object = in;
++ cache->chunkId = chunk;
++ cache->dirty = 0;
++ cache->locked = 0;
++ yaffs_ReadChunkDataFromObject(in, chunk,
++ cache->
++ data);
++ cache->nBytes = 0;
++ }
++
++ yaffs_UseChunkCache(dev, cache, 0);
++
++ cache->locked = 1;
++
++#ifdef CONFIG_YAFFS_WINCE
++ yfsd_UnlockYAFFS(TRUE);
++#endif
++ memcpy(buffer, &cache->data[start], nToCopy);
++
++#ifdef CONFIG_YAFFS_WINCE
++ yfsd_LockYAFFS(TRUE);
++#endif
++ cache->locked = 0;
++ } else {
++ /* Read into the local buffer then copy..*/
++
++ __u8 *localBuffer =
++ yaffs_GetTempBuffer(dev, __LINE__);
++ yaffs_ReadChunkDataFromObject(in, chunk,
++ localBuffer);
++#ifdef CONFIG_YAFFS_WINCE
++ yfsd_UnlockYAFFS(TRUE);
++#endif
++ memcpy(buffer, &localBuffer[start], nToCopy);
++
++#ifdef CONFIG_YAFFS_WINCE
++ yfsd_LockYAFFS(TRUE);
++#endif
++ yaffs_ReleaseTempBuffer(dev, localBuffer,
++ __LINE__);
++ }
++
++ } else {
++#ifdef CONFIG_YAFFS_WINCE
++ __u8 *localBuffer = yaffs_GetTempBuffer(dev, __LINE__);
++
++ /* Under WinCE can't do direct transfer. Need to use a local buffer.
++ * This is because we otherwise screw up WinCE's memory mapper
++ */
++ yaffs_ReadChunkDataFromObject(in, chunk, localBuffer);
++
++#ifdef CONFIG_YAFFS_WINCE
++ yfsd_UnlockYAFFS(TRUE);
++#endif
++ memcpy(buffer, localBuffer, dev->nDataBytesPerChunk);
++
++#ifdef CONFIG_YAFFS_WINCE
++ yfsd_LockYAFFS(TRUE);
++ yaffs_ReleaseTempBuffer(dev, localBuffer, __LINE__);
++#endif
++
++#else
++ /* A full chunk. Read directly into the supplied buffer. */
++ yaffs_ReadChunkDataFromObject(in, chunk, buffer);
++#endif
++ }
++
++ n -= nToCopy;
++ offset += nToCopy;
++ buffer += nToCopy;
++ nDone += nToCopy;
++
++ }
++
++ return nDone;
++}
++
++int yaffs_WriteDataToFile(yaffs_Object * in, const __u8 * buffer, loff_t offset,
++ int nBytes, int writeThrough)
++{
++
++ int chunk;
++ int start;
++ int nToCopy;
++ int n = nBytes;
++ int nDone = 0;
++ int nToWriteBack;
++ int startOfWrite = offset;
++ int chunkWritten = 0;
++ int nBytesRead;
++
++ yaffs_Device *dev;
++
++ dev = in->myDev;
++
++ while (n > 0 && chunkWritten >= 0) {
++ //chunk = offset / dev->nDataBytesPerChunk + 1;
++ //start = offset % dev->nDataBytesPerChunk;
++ yaffs_AddrToChunk(dev,offset,&chunk,&start);
++ chunk++;
++
++ /* OK now check for the curveball where the start and end are in
++ * the same chunk.
++ */
++
++ if ((start + n) < dev->nDataBytesPerChunk) {
++ nToCopy = n;
++
++ /* Now folks, to calculate how many bytes to write back....
++ * If we're overwriting and not writing to then end of file then
++ * we need to write back as much as was there before.
++ */
++
++ nBytesRead =
++ in->variant.fileVariant.fileSize -
++ ((chunk - 1) * dev->nDataBytesPerChunk);
++
++ if (nBytesRead > dev->nDataBytesPerChunk) {
++ nBytesRead = dev->nDataBytesPerChunk;
++ }
++
++ nToWriteBack =
++ (nBytesRead >
++ (start + n)) ? nBytesRead : (start + n);
++
++ } else {
++ nToCopy = dev->nDataBytesPerChunk - start;
++ nToWriteBack = dev->nDataBytesPerChunk;
++ }
++
++ if (nToCopy != dev->nDataBytesPerChunk) {
++ /* An incomplete start or end chunk (or maybe both start and end chunk) */
++ if (dev->nShortOpCaches > 0) {
++ yaffs_ChunkCache *cache;
++ /* If we can't find the data in the cache, then load the cache */
++ cache = yaffs_FindChunkCache(in, chunk);
++
++ if (!cache
++ && yaffs_CheckSpaceForAllocation(in->
++ myDev)) {
++ cache = yaffs_GrabChunkCache(in->myDev);
++ cache->object = in;
++ cache->chunkId = chunk;
++ cache->dirty = 0;
++ cache->locked = 0;
++ yaffs_ReadChunkDataFromObject(in, chunk,
++ cache->
++ data);
++ }
++ else if(cache &&
++ !cache->dirty &&
++ !yaffs_CheckSpaceForAllocation(in->myDev)){
++ /* Drop the cache if it was a read cache item and
++ * no space check has been made for it.
++ */
++ cache = NULL;
++ }
++
++ if (cache) {
++ yaffs_UseChunkCache(dev, cache, 1);
++ cache->locked = 1;
++#ifdef CONFIG_YAFFS_WINCE
++ yfsd_UnlockYAFFS(TRUE);
++#endif
++
++ memcpy(&cache->data[start], buffer,
++ nToCopy);
++
++#ifdef CONFIG_YAFFS_WINCE
++ yfsd_LockYAFFS(TRUE);
++#endif
++ cache->locked = 0;
++ cache->nBytes = nToWriteBack;
++
++ if (writeThrough) {
++ chunkWritten =
++ yaffs_WriteChunkDataToObject
++ (cache->object,
++ cache->chunkId,
++ cache->data, cache->nBytes,
++ 1);
++ cache->dirty = 0;
++ }
++
++ } else {
++ chunkWritten = -1; /* fail the write */
++ }
++ } else {
++ /* An incomplete start or end chunk (or maybe both start and end chunk)
++ * Read into the local buffer then copy, then copy over and write back.
++ */
++
++ __u8 *localBuffer =
++ yaffs_GetTempBuffer(dev, __LINE__);
++
++ yaffs_ReadChunkDataFromObject(in, chunk,
++ localBuffer);
++
++#ifdef CONFIG_YAFFS_WINCE
++ yfsd_UnlockYAFFS(TRUE);
++#endif
++
++ memcpy(&localBuffer[start], buffer, nToCopy);
++
++#ifdef CONFIG_YAFFS_WINCE
++ yfsd_LockYAFFS(TRUE);
++#endif
++ chunkWritten =
++ yaffs_WriteChunkDataToObject(in, chunk,
++ localBuffer,
++ nToWriteBack,
++ 0);
++
++ yaffs_ReleaseTempBuffer(dev, localBuffer,
++ __LINE__);
++
++ }
++
++ } else {
++
++#ifdef CONFIG_YAFFS_WINCE
++ /* Under WinCE can't do direct transfer. Need to use a local buffer.
++ * This is because we otherwise screw up WinCE's memory mapper
++ */
++ __u8 *localBuffer = yaffs_GetTempBuffer(dev, __LINE__);
++#ifdef CONFIG_YAFFS_WINCE
++ yfsd_UnlockYAFFS(TRUE);
++#endif
++ memcpy(localBuffer, buffer, dev->nDataBytesPerChunk);
++#ifdef CONFIG_YAFFS_WINCE
++ yfsd_LockYAFFS(TRUE);
++#endif
++ chunkWritten =
++ yaffs_WriteChunkDataToObject(in, chunk, localBuffer,
++ dev->nDataBytesPerChunk,
++ 0);
++ yaffs_ReleaseTempBuffer(dev, localBuffer, __LINE__);
++#else
++ /* A full chunk. Write directly from the supplied buffer. */
++ chunkWritten =
++ yaffs_WriteChunkDataToObject(in, chunk, buffer,
++ dev->nDataBytesPerChunk,
++ 0);
++#endif
++ /* Since we've overwritten the cached data, we better invalidate it. */
++ yaffs_InvalidateChunkCache(in, chunk);
++ }
++
++ if (chunkWritten >= 0) {
++ n -= nToCopy;
++ offset += nToCopy;
++ buffer += nToCopy;
++ nDone += nToCopy;
++ }
++
++ }
++
++ /* Update file object */
++
++ if ((startOfWrite + nDone) > in->variant.fileVariant.fileSize) {
++ in->variant.fileVariant.fileSize = (startOfWrite + nDone);
++ }
++
++ in->dirty = 1;
++
++ return nDone;
++}
++
++
++/* ---------------------- File resizing stuff ------------------ */
++
++static void yaffs_PruneResizedChunks(yaffs_Object * in, int newSize)
++{
++
++ yaffs_Device *dev = in->myDev;
++ int oldFileSize = in->variant.fileVariant.fileSize;
++
++ int lastDel = 1 + (oldFileSize - 1) / dev->nDataBytesPerChunk;
++
++ int startDel = 1 + (newSize + dev->nDataBytesPerChunk - 1) /
++ dev->nDataBytesPerChunk;
++ int i;
++ int chunkId;
++
++ /* Delete backwards so that we don't end up with holes if
++ * power is lost part-way through the operation.
++ */
++ for (i = lastDel; i >= startDel; i--) {
++ /* NB this could be optimised somewhat,
++ * eg. could retrieve the tags and write them without
++ * using yaffs_DeleteChunk
++ */
++
++ chunkId = yaffs_FindAndDeleteChunkInFile(in, i, NULL);
++ if (chunkId > 0) {
++ if (chunkId <
++ (dev->internalStartBlock * dev->nChunksPerBlock)
++ || chunkId >=
++ ((dev->internalEndBlock +
++ 1) * dev->nChunksPerBlock)) {
++ T(YAFFS_TRACE_ALWAYS,
++ (TSTR("Found daft chunkId %d for %d" TENDSTR),
++ chunkId, i));
++ } else {
++ in->nDataChunks--;
++ yaffs_DeleteChunk(dev, chunkId, 1, __LINE__);
++ }
++ }
++ }
++
++}
++
++int yaffs_ResizeFile(yaffs_Object * in, loff_t newSize)
++{
++
++ int oldFileSize = in->variant.fileVariant.fileSize;
++ int newSizeOfPartialChunk;
++ int newFullChunks;
++
++ yaffs_Device *dev = in->myDev;
++
++ yaffs_AddrToChunk(dev, newSize, &newFullChunks, &newSizeOfPartialChunk);
++
++ yaffs_FlushFilesChunkCache(in);
++ yaffs_InvalidateWholeChunkCache(in);
++
++ yaffs_CheckGarbageCollection(dev);
++
++ if (in->variantType != YAFFS_OBJECT_TYPE_FILE) {
++ return yaffs_GetFileSize(in);
++ }
++
++ if (newSize == oldFileSize) {
++ return oldFileSize;
++ }
++
++ if (newSize < oldFileSize) {
++
++ yaffs_PruneResizedChunks(in, newSize);
++
++ if (newSizeOfPartialChunk != 0) {
++ int lastChunk = 1 + newFullChunks;
++
++ __u8 *localBuffer = yaffs_GetTempBuffer(dev, __LINE__);
++
++ /* Got to read and rewrite the last chunk with its new size and zero pad */
++ yaffs_ReadChunkDataFromObject(in, lastChunk,
++ localBuffer);
++
++ memset(localBuffer + newSizeOfPartialChunk, 0,
++ dev->nDataBytesPerChunk - newSizeOfPartialChunk);
++
++ yaffs_WriteChunkDataToObject(in, lastChunk, localBuffer,
++ newSizeOfPartialChunk, 1);
++
++ yaffs_ReleaseTempBuffer(dev, localBuffer, __LINE__);
++ }
++
++ in->variant.fileVariant.fileSize = newSize;
++
++ yaffs_PruneFileStructure(dev, &in->variant.fileVariant);
++ }
++ /* Write a new object header.
++ * show we've shrunk the file, if need be
++ * Do this only if the file is not in the deleted directories.
++ */
++ if (in->parent->objectId != YAFFS_OBJECTID_UNLINKED &&
++ in->parent->objectId != YAFFS_OBJECTID_DELETED) {
++ yaffs_UpdateObjectHeader(in, NULL, 0,
++ (newSize < oldFileSize) ? 1 : 0, 0);
++ }
++
++ return newSize;
++}
++
++loff_t yaffs_GetFileSize(yaffs_Object * obj)
++{
++ obj = yaffs_GetEquivalentObject(obj);
++
++ switch (obj->variantType) {
++ case YAFFS_OBJECT_TYPE_FILE:
++ return obj->variant.fileVariant.fileSize;
++ case YAFFS_OBJECT_TYPE_SYMLINK:
++ return yaffs_strlen(obj->variant.symLinkVariant.alias);
++ default:
++ return 0;
++ }
++}
++
++
++
++int yaffs_FlushFile(yaffs_Object * in, int updateTime)
++{
++ int retVal;
++ if (in->dirty) {
++ yaffs_FlushFilesChunkCache(in);
++ if (updateTime) {
++#ifdef CONFIG_YAFFS_WINCE
++ yfsd_WinFileTimeNow(in->win_mtime);
++#else
++
++ in->yst_mtime = Y_CURRENT_TIME;
++
++#endif
++ }
++
++ retVal =
++ (yaffs_UpdateObjectHeader(in, NULL, 0, 0, 0) >=
++ 0) ? YAFFS_OK : YAFFS_FAIL;
++ } else {
++ retVal = YAFFS_OK;
++ }
++
++ return retVal;
++
++}
++
++static int yaffs_DoGenericObjectDeletion(yaffs_Object * in)
++{
++
++ /* First off, invalidate the file's data in the cache, without flushing. */
++ yaffs_InvalidateWholeChunkCache(in);
++
++ if (in->myDev->isYaffs2 && (in->parent != in->myDev->deletedDir)) {
++ /* Move to the unlinked directory so we have a record that it was deleted. */
++ yaffs_ChangeObjectName(in, in->myDev->deletedDir, NULL, 0, 0);
++
++ }
++
++ yaffs_RemoveObjectFromDirectory(in);
++ yaffs_DeleteChunk(in->myDev, in->chunkId, 1, __LINE__);
++ in->chunkId = -1;
++
++ yaffs_FreeObject(in);
++ return YAFFS_OK;
++
++}
++
++/* yaffs_DeleteFile deletes the whole file data
++ * and the inode associated with the file.
++ * It does not delete the links associated with the file.
++ */
++static int yaffs_UnlinkFile(yaffs_Object * in)
++{
++
++ int retVal;
++ int immediateDeletion = 0;
++
++ if (1) {
++#ifdef __KERNEL__
++ if (!in->myInode) {
++ immediateDeletion = 1;
++
++ }
++#else
++ if (in->inUse <= 0) {
++ immediateDeletion = 1;
++
++ }
++#endif
++ if (immediateDeletion) {
++ retVal =
++ yaffs_ChangeObjectName(in, in->myDev->deletedDir,
++ NULL, 0, 0);
++ T(YAFFS_TRACE_TRACING,
++ (TSTR("yaffs: immediate deletion of file %d" TENDSTR),
++ in->objectId));
++ in->deleted = 1;
++ in->myDev->nDeletedFiles++;
++ if (0 && in->myDev->isYaffs2) {
++ yaffs_ResizeFile(in, 0);
++ }
++ yaffs_SoftDeleteFile(in);
++ } else {
++ retVal =
++ yaffs_ChangeObjectName(in, in->myDev->unlinkedDir,
++ NULL, 0, 0);
++ }
++
++ }
++ return retVal;
++}
++
++int yaffs_DeleteFile(yaffs_Object * in)
++{
++ int retVal = YAFFS_OK;
++
++ if (in->nDataChunks > 0) {
++ /* Use soft deletion if there is data in the file */
++ if (!in->unlinked) {
++ retVal = yaffs_UnlinkFile(in);
++ }
++ if (retVal == YAFFS_OK && in->unlinked && !in->deleted) {
++ in->deleted = 1;
++ in->myDev->nDeletedFiles++;
++ yaffs_SoftDeleteFile(in);
++ }
++ return in->deleted ? YAFFS_OK : YAFFS_FAIL;
++ } else {
++ /* The file has no data chunks so we toss it immediately */
++ yaffs_FreeTnode(in->myDev, in->variant.fileVariant.top);
++ in->variant.fileVariant.top = NULL;
++ yaffs_DoGenericObjectDeletion(in);
++
++ return YAFFS_OK;
++ }
++}
++
++static int yaffs_DeleteDirectory(yaffs_Object * in)
++{
++ /* First check that the directory is empty. */
++ if (list_empty(&in->variant.directoryVariant.children)) {
++ return yaffs_DoGenericObjectDeletion(in);
++ }
++
++ return YAFFS_FAIL;
++
++}
++
++static int yaffs_DeleteSymLink(yaffs_Object * in)
++{
++ YFREE(in->variant.symLinkVariant.alias);
++
++ return yaffs_DoGenericObjectDeletion(in);
++}
++
++static int yaffs_DeleteHardLink(yaffs_Object * in)
++{
++ /* remove this hardlink from the list assocaited with the equivalent
++ * object
++ */
++ list_del(&in->hardLinks);
++ return yaffs_DoGenericObjectDeletion(in);
++}
++
++static void yaffs_DestroyObject(yaffs_Object * obj)
++{
++ switch (obj->variantType) {
++ case YAFFS_OBJECT_TYPE_FILE:
++ yaffs_DeleteFile(obj);
++ break;
++ case YAFFS_OBJECT_TYPE_DIRECTORY:
++ yaffs_DeleteDirectory(obj);
++ break;
++ case YAFFS_OBJECT_TYPE_SYMLINK:
++ yaffs_DeleteSymLink(obj);
++ break;
++ case YAFFS_OBJECT_TYPE_HARDLINK:
++ yaffs_DeleteHardLink(obj);
++ break;
++ case YAFFS_OBJECT_TYPE_SPECIAL:
++ yaffs_DoGenericObjectDeletion(obj);
++ break;
++ case YAFFS_OBJECT_TYPE_UNKNOWN:
++ break; /* should not happen. */
++ }
++}
++
++static int yaffs_UnlinkWorker(yaffs_Object * obj)
++{
++
++ if (obj->variantType == YAFFS_OBJECT_TYPE_HARDLINK) {
++ return yaffs_DeleteHardLink(obj);
++ } else if (!list_empty(&obj->hardLinks)) {
++ /* Curve ball: We're unlinking an object that has a hardlink.
++ *
++ * This problem arises because we are not strictly following
++ * The Linux link/inode model.
++ *
++ * We can't really delete the object.
++ * Instead, we do the following:
++ * - Select a hardlink.
++ * - Unhook it from the hard links
++ * - Unhook it from its parent directory (so that the rename can work)
++ * - Rename the object to the hardlink's name.
++ * - Delete the hardlink
++ */
++
++ yaffs_Object *hl;
++ int retVal;
++ YCHAR name[YAFFS_MAX_NAME_LENGTH + 1];
++
++ hl = list_entry(obj->hardLinks.next, yaffs_Object, hardLinks);
++
++ list_del_init(&hl->hardLinks);
++ list_del_init(&hl->siblings);
++
++ yaffs_GetObjectName(hl, name, YAFFS_MAX_NAME_LENGTH + 1);
++
++ retVal = yaffs_ChangeObjectName(obj, hl->parent, name, 0, 0);
++
++ if (retVal == YAFFS_OK) {
++ retVal = yaffs_DoGenericObjectDeletion(hl);
++ }
++ return retVal;
++
++ } else {
++ switch (obj->variantType) {
++ case YAFFS_OBJECT_TYPE_FILE:
++ return yaffs_UnlinkFile(obj);
++ break;
++ case YAFFS_OBJECT_TYPE_DIRECTORY:
++ return yaffs_DeleteDirectory(obj);
++ break;
++ case YAFFS_OBJECT_TYPE_SYMLINK:
++ return yaffs_DeleteSymLink(obj);
++ break;
++ case YAFFS_OBJECT_TYPE_SPECIAL:
++ return yaffs_DoGenericObjectDeletion(obj);
++ break;
++ case YAFFS_OBJECT_TYPE_HARDLINK:
++ case YAFFS_OBJECT_TYPE_UNKNOWN:
++ default:
++ return YAFFS_FAIL;
++ }
++ }
++}
++
++
++static int yaffs_UnlinkObject( yaffs_Object *obj)
++{
++
++ if (obj && obj->unlinkAllowed) {
++ return yaffs_UnlinkWorker(obj);
++ }
++
++ return YAFFS_FAIL;
++
++}
++int yaffs_Unlink(yaffs_Object * dir, const YCHAR * name)
++{
++ yaffs_Object *obj;
++
++ obj = yaffs_FindObjectByName(dir, name);
++ return yaffs_UnlinkObject(obj);
++}
++
++/*----------------------- Initialisation Scanning ---------------------- */
++
++static void yaffs_HandleShadowedObject(yaffs_Device * dev, int objId,
++ int backwardScanning)
++{
++ yaffs_Object *obj;
++
++ if (!backwardScanning) {
++ /* Handle YAFFS1 forward scanning case
++ * For YAFFS1 we always do the deletion
++ */
++
++ } else {
++ /* Handle YAFFS2 case (backward scanning)
++ * If the shadowed object exists then ignore.
++ */
++ if (yaffs_FindObjectByNumber(dev, objId)) {
++ return;
++ }
++ }
++
++ /* Let's create it (if it does not exist) assuming it is a file so that it can do shrinking etc.
++ * We put it in unlinked dir to be cleaned up after the scanning
++ */
++ obj =
++ yaffs_FindOrCreateObjectByNumber(dev, objId,
++ YAFFS_OBJECT_TYPE_FILE);
++ yaffs_AddObjectToDirectory(dev->unlinkedDir, obj);
++ obj->variant.fileVariant.shrinkSize = 0;
++ obj->valid = 1; /* So that we don't read any other info for this file */
++
++}
++
++typedef struct {
++ int seq;
++ int block;
++} yaffs_BlockIndex;
++
++
++static void yaffs_HardlinkFixup(yaffs_Device *dev, yaffs_Object *hardList)
++{
++ yaffs_Object *hl;
++ yaffs_Object *in;
++
++ while (hardList) {
++ hl = hardList;
++ hardList = (yaffs_Object *) (hardList->hardLinks.next);
++
++ in = yaffs_FindObjectByNumber(dev,
++ hl->variant.hardLinkVariant.
++ equivalentObjectId);
++
++ if (in) {
++ /* Add the hardlink pointers */
++ hl->variant.hardLinkVariant.equivalentObject = in;
++ list_add(&hl->hardLinks, &in->hardLinks);
++ } else {
++ /* Todo Need to report/handle this better.
++ * Got a problem... hardlink to a non-existant object
++ */
++ hl->variant.hardLinkVariant.equivalentObject = NULL;
++ INIT_LIST_HEAD(&hl->hardLinks);
++
++ }
++
++ }
++
++}
++
++
++
++
++
++static int ybicmp(const void *a, const void *b){
++ register int aseq = ((yaffs_BlockIndex *)a)->seq;
++ register int bseq = ((yaffs_BlockIndex *)b)->seq;
++ register int ablock = ((yaffs_BlockIndex *)a)->block;
++ register int bblock = ((yaffs_BlockIndex *)b)->block;
++ if( aseq == bseq )
++ return ablock - bblock;
++ else
++ return aseq - bseq;
++
++}
++
++static int yaffs_Scan(yaffs_Device * dev)
++{
++ yaffs_ExtendedTags tags;
++ int blk;
++ int blockIterator;
++ int startIterator;
++ int endIterator;
++ int nBlocksToScan = 0;
++ int result;
++
++ int chunk;
++ int c;
++ int deleted;
++ yaffs_BlockState state;
++ yaffs_Object *hardList = NULL;
++ yaffs_Object *hl;
++ yaffs_BlockInfo *bi;
++ int sequenceNumber;
++ yaffs_ObjectHeader *oh;
++ yaffs_Object *in;
++ yaffs_Object *parent;
++ int nBlocks = dev->internalEndBlock - dev->internalStartBlock + 1;
++
++ __u8 *chunkData;
++
++ yaffs_BlockIndex *blockIndex = NULL;
++
++ if (dev->isYaffs2) {
++ T(YAFFS_TRACE_SCAN,
++ (TSTR("yaffs_Scan is not for YAFFS2!" TENDSTR)));
++ return YAFFS_FAIL;
++ }
++
++ //TODO Throw all the yaffs2 stuuf out of yaffs_Scan since it is only for yaffs1 format.
++
++ T(YAFFS_TRACE_SCAN,
++ (TSTR("yaffs_Scan starts intstartblk %d intendblk %d..." TENDSTR),
++ dev->internalStartBlock, dev->internalEndBlock));
++
++ chunkData = yaffs_GetTempBuffer(dev, __LINE__);
++
++ dev->sequenceNumber = YAFFS_LOWEST_SEQUENCE_NUMBER;
++
++ if (dev->isYaffs2) {
++ blockIndex = YMALLOC(nBlocks * sizeof(yaffs_BlockIndex));
++ }
++
++ /* Scan all the blocks to determine their state */
++ for (blk = dev->internalStartBlock; blk <= dev->internalEndBlock; blk++) {
++ bi = yaffs_GetBlockInfo(dev, blk);
++ yaffs_ClearChunkBits(dev, blk);
++ bi->pagesInUse = 0;
++ bi->softDeletions = 0;
++
++ yaffs_QueryInitialBlockState(dev, blk, &state, &sequenceNumber);
++
++ bi->blockState = state;
++ bi->sequenceNumber = sequenceNumber;
++
++ T(YAFFS_TRACE_SCAN_DEBUG,
++ (TSTR("Block scanning block %d state %d seq %d" TENDSTR), blk,
++ state, sequenceNumber));
++
++ if (state == YAFFS_BLOCK_STATE_DEAD) {
++ T(YAFFS_TRACE_BAD_BLOCKS,
++ (TSTR("block %d is bad" TENDSTR), blk));
++ } else if (state == YAFFS_BLOCK_STATE_EMPTY) {
++ T(YAFFS_TRACE_SCAN_DEBUG,
++ (TSTR("Block empty " TENDSTR)));
++ dev->nErasedBlocks++;
++ dev->nFreeChunks += dev->nChunksPerBlock;
++ } else if (state == YAFFS_BLOCK_STATE_NEEDS_SCANNING) {
++
++ /* Determine the highest sequence number */
++ if (dev->isYaffs2 &&
++ sequenceNumber >= YAFFS_LOWEST_SEQUENCE_NUMBER &&
++ sequenceNumber < YAFFS_HIGHEST_SEQUENCE_NUMBER) {
++
++ blockIndex[nBlocksToScan].seq = sequenceNumber;
++ blockIndex[nBlocksToScan].block = blk;
++
++ nBlocksToScan++;
++
++ if (sequenceNumber >= dev->sequenceNumber) {
++ dev->sequenceNumber = sequenceNumber;
++ }
++ } else if (dev->isYaffs2) {
++ /* TODO: Nasty sequence number! */
++ T(YAFFS_TRACE_SCAN,
++ (TSTR
++ ("Block scanning block %d has bad sequence number %d"
++ TENDSTR), blk, sequenceNumber));
++
++ }
++ }
++ }
++
++ /* Sort the blocks
++ * Dungy old bubble sort for now...
++ */
++ if (dev->isYaffs2) {
++ yaffs_BlockIndex temp;
++ int i;
++ int j;
++
++ for (i = 0; i < nBlocksToScan; i++)
++ for (j = i + 1; j < nBlocksToScan; j++)
++ if (blockIndex[i].seq > blockIndex[j].seq) {
++ temp = blockIndex[j];
++ blockIndex[j] = blockIndex[i];
++ blockIndex[i] = temp;
++ }
++ }
++
++ /* Now scan the blocks looking at the data. */
++ if (dev->isYaffs2) {
++ startIterator = 0;
++ endIterator = nBlocksToScan - 1;
++ T(YAFFS_TRACE_SCAN_DEBUG,
++ (TSTR("%d blocks to be scanned" TENDSTR), nBlocksToScan));
++ } else {
++ startIterator = dev->internalStartBlock;
++ endIterator = dev->internalEndBlock;
++ }
++
++ /* For each block.... */
++ for (blockIterator = startIterator; blockIterator <= endIterator;
++ blockIterator++) {
++
++ if (dev->isYaffs2) {
++ /* get the block to scan in the correct order */
++ blk = blockIndex[blockIterator].block;
++ } else {
++ blk = blockIterator;
++ }
++
++ bi = yaffs_GetBlockInfo(dev, blk);
++ state = bi->blockState;
++
++ deleted = 0;
++
++ /* For each chunk in each block that needs scanning....*/
++ for (c = 0; c < dev->nChunksPerBlock &&
++ state == YAFFS_BLOCK_STATE_NEEDS_SCANNING; c++) {
++ /* Read the tags and decide what to do */
++ chunk = blk * dev->nChunksPerBlock + c;
++
++ result = yaffs_ReadChunkWithTagsFromNAND(dev, chunk, NULL,
++ &tags);
++
++ /* Let's have a good look at this chunk... */
++
++ if (!dev->isYaffs2 && tags.chunkDeleted) {
++ /* YAFFS1 only...
++ * A deleted chunk
++ */
++ deleted++;
++ dev->nFreeChunks++;
++ /*T((" %d %d deleted\n",blk,c)); */
++ } else if (!tags.chunkUsed) {
++ /* An unassigned chunk in the block
++ * This means that either the block is empty or
++ * this is the one being allocated from
++ */
++
++ if (c == 0) {
++ /* We're looking at the first chunk in the block so the block is unused */
++ state = YAFFS_BLOCK_STATE_EMPTY;
++ dev->nErasedBlocks++;
++ } else {
++ /* this is the block being allocated from */
++ T(YAFFS_TRACE_SCAN,
++ (TSTR
++ (" Allocating from %d %d" TENDSTR),
++ blk, c));
++ state = YAFFS_BLOCK_STATE_ALLOCATING;
++ dev->allocationBlock = blk;
++ dev->allocationPage = c;
++ dev->allocationBlockFinder = blk;
++ /* Set it to here to encourage the allocator to go forth from here. */
++
++ /* Yaffs2 sanity check:
++ * This should be the one with the highest sequence number
++ */
++ if (dev->isYaffs2
++ && (dev->sequenceNumber !=
++ bi->sequenceNumber)) {
++ T(YAFFS_TRACE_ALWAYS,
++ (TSTR
++ ("yaffs: Allocation block %d was not highest sequence id:"
++ " block seq = %d, dev seq = %d"
++ TENDSTR), blk,bi->sequenceNumber,dev->sequenceNumber));
++ }
++ }
++
++ dev->nFreeChunks += (dev->nChunksPerBlock - c);
++ } else if (tags.chunkId > 0) {
++ /* chunkId > 0 so it is a data chunk... */
++ unsigned int endpos;
++
++ yaffs_SetChunkBit(dev, blk, c);
++ bi->pagesInUse++;
++
++ in = yaffs_FindOrCreateObjectByNumber(dev,
++ tags.
++ objectId,
++ YAFFS_OBJECT_TYPE_FILE);
++ /* PutChunkIntoFile checks for a clash (two data chunks with
++ * the same chunkId).
++ */
++ yaffs_PutChunkIntoFile(in, tags.chunkId, chunk,
++ 1);
++ endpos =
++ (tags.chunkId - 1) * dev->nDataBytesPerChunk +
++ tags.byteCount;
++ if (in->variantType == YAFFS_OBJECT_TYPE_FILE
++ && in->variant.fileVariant.scannedFileSize <
++ endpos) {
++ in->variant.fileVariant.
++ scannedFileSize = endpos;
++ if (!dev->useHeaderFileSize) {
++ in->variant.fileVariant.
++ fileSize =
++ in->variant.fileVariant.
++ scannedFileSize;
++ }
++
++ }
++ /* T((" %d %d data %d %d\n",blk,c,tags.objectId,tags.chunkId)); */
++ } else {
++ /* chunkId == 0, so it is an ObjectHeader.
++ * Thus, we read in the object header and make the object
++ */
++ yaffs_SetChunkBit(dev, blk, c);
++ bi->pagesInUse++;
++
++ result = yaffs_ReadChunkWithTagsFromNAND(dev, chunk,
++ chunkData,
++ NULL);
++
++ oh = (yaffs_ObjectHeader *) chunkData;
++
++ in = yaffs_FindObjectByNumber(dev,
++ tags.objectId);
++ if (in && in->variantType != oh->type) {
++ /* This should not happen, but somehow
++ * Wev'e ended up with an objectId that has been reused but not yet
++ * deleted, and worse still it has changed type. Delete the old object.
++ */
++
++ yaffs_DestroyObject(in);
++
++ in = 0;
++ }
++
++ in = yaffs_FindOrCreateObjectByNumber(dev,
++ tags.
++ objectId,
++ oh->type);
++
++ if (oh->shadowsObject > 0) {
++ yaffs_HandleShadowedObject(dev,
++ oh->
++ shadowsObject,
++ 0);
++ }
++
++ if (in->valid) {
++ /* We have already filled this one. We have a duplicate and need to resolve it. */
++
++ unsigned existingSerial = in->serial;
++ unsigned newSerial = tags.serialNumber;
++
++ if (dev->isYaffs2 ||
++ ((existingSerial + 1) & 3) ==
++ newSerial) {
++ /* Use new one - destroy the exisiting one */
++ yaffs_DeleteChunk(dev,
++ in->chunkId,
++ 1, __LINE__);
++ in->valid = 0;
++ } else {
++ /* Use existing - destroy this one. */
++ yaffs_DeleteChunk(dev, chunk, 1,
++ __LINE__);
++ }
++ }
++
++ if (!in->valid &&
++ (tags.objectId == YAFFS_OBJECTID_ROOT ||
++ tags.objectId == YAFFS_OBJECTID_LOSTNFOUND)) {
++ /* We only load some info, don't fiddle with directory structure */
++ in->valid = 1;
++ in->variantType = oh->type;
++
++ in->yst_mode = oh->yst_mode;
++#ifdef CONFIG_YAFFS_WINCE
++ in->win_atime[0] = oh->win_atime[0];
++ in->win_ctime[0] = oh->win_ctime[0];
++ in->win_mtime[0] = oh->win_mtime[0];
++ in->win_atime[1] = oh->win_atime[1];
++ in->win_ctime[1] = oh->win_ctime[1];
++ in->win_mtime[1] = oh->win_mtime[1];
++#else
++ in->yst_uid = oh->yst_uid;
++ in->yst_gid = oh->yst_gid;
++ in->yst_atime = oh->yst_atime;
++ in->yst_mtime = oh->yst_mtime;
++ in->yst_ctime = oh->yst_ctime;
++ in->yst_rdev = oh->yst_rdev;
++#endif
++ in->chunkId = chunk;
++
++ } else if (!in->valid) {
++ /* we need to load this info */
++
++ in->valid = 1;
++ in->variantType = oh->type;
++
++ in->yst_mode = oh->yst_mode;
++#ifdef CONFIG_YAFFS_WINCE
++ in->win_atime[0] = oh->win_atime[0];
++ in->win_ctime[0] = oh->win_ctime[0];
++ in->win_mtime[0] = oh->win_mtime[0];
++ in->win_atime[1] = oh->win_atime[1];
++ in->win_ctime[1] = oh->win_ctime[1];
++ in->win_mtime[1] = oh->win_mtime[1];
++#else
++ in->yst_uid = oh->yst_uid;
++ in->yst_gid = oh->yst_gid;
++ in->yst_atime = oh->yst_atime;
++ in->yst_mtime = oh->yst_mtime;
++ in->yst_ctime = oh->yst_ctime;
++ in->yst_rdev = oh->yst_rdev;
++#endif
++ in->chunkId = chunk;
++
++ yaffs_SetObjectName(in, oh->name);
++ in->dirty = 0;
++
++ /* directory stuff...
++ * hook up to parent
++ */
++
++ parent =
++ yaffs_FindOrCreateObjectByNumber
++ (dev, oh->parentObjectId,
++ YAFFS_OBJECT_TYPE_DIRECTORY);
++ if (parent->variantType ==
++ YAFFS_OBJECT_TYPE_UNKNOWN) {
++ /* Set up as a directory */
++ parent->variantType =
++ YAFFS_OBJECT_TYPE_DIRECTORY;
++ INIT_LIST_HEAD(&parent->variant.
++ directoryVariant.
++ children);
++ } else if (parent->variantType !=
++ YAFFS_OBJECT_TYPE_DIRECTORY)
++ {
++ /* Hoosterman, another problem....
++ * We're trying to use a non-directory as a directory
++ */
++
++ T(YAFFS_TRACE_ERROR,
++ (TSTR
++ ("yaffs tragedy: attempting to use non-directory as"
++ " a directory in scan. Put in lost+found."
++ TENDSTR)));
++ parent = dev->lostNFoundDir;
++ }
++
++ yaffs_AddObjectToDirectory(parent, in);
++
++ if (0 && (parent == dev->deletedDir ||
++ parent == dev->unlinkedDir)) {
++ in->deleted = 1; /* If it is unlinked at start up then it wants deleting */
++ dev->nDeletedFiles++;
++ }
++ /* Note re hardlinks.
++ * Since we might scan a hardlink before its equivalent object is scanned
++ * we put them all in a list.
++ * After scanning is complete, we should have all the objects, so we run through this
++ * list and fix up all the chains.
++ */
++
++ switch (in->variantType) {
++ case YAFFS_OBJECT_TYPE_UNKNOWN:
++ /* Todo got a problem */
++ break;
++ case YAFFS_OBJECT_TYPE_FILE:
++ if (dev->isYaffs2
++ && oh->isShrink) {
++ /* Prune back the shrunken chunks */
++ yaffs_PruneResizedChunks
++ (in, oh->fileSize);
++ /* Mark the block as having a shrinkHeader */
++ bi->hasShrinkHeader = 1;
++ }
++
++ if (dev->useHeaderFileSize)
++
++ in->variant.fileVariant.
++ fileSize =
++ oh->fileSize;
++
++ break;
++ case YAFFS_OBJECT_TYPE_HARDLINK:
++ in->variant.hardLinkVariant.
++ equivalentObjectId =
++ oh->equivalentObjectId;
++ in->hardLinks.next =
++ (struct list_head *)
++ hardList;
++ hardList = in;
++ break;
++ case YAFFS_OBJECT_TYPE_DIRECTORY:
++ /* Do nothing */
++ break;
++ case YAFFS_OBJECT_TYPE_SPECIAL:
++ /* Do nothing */
++ break;
++ case YAFFS_OBJECT_TYPE_SYMLINK:
++ in->variant.symLinkVariant.
++ alias =
++ yaffs_CloneString(oh->alias);
++ break;
++ }
++
++ if (parent == dev->deletedDir) {
++ yaffs_DestroyObject(in);
++ bi->hasShrinkHeader = 1;
++ }
++ }
++ }
++ }
++
++ if (state == YAFFS_BLOCK_STATE_NEEDS_SCANNING) {
++ /* If we got this far while scanning, then the block is fully allocated.*/
++ state = YAFFS_BLOCK_STATE_FULL;
++ }
++
++ bi->blockState = state;
++
++ /* Now let's see if it was dirty */
++ if (bi->pagesInUse == 0 &&
++ !bi->hasShrinkHeader &&
++ bi->blockState == YAFFS_BLOCK_STATE_FULL) {
++ yaffs_BlockBecameDirty(dev, blk);
++ }
++
++ }
++
++ if (blockIndex) {
++ YFREE(blockIndex);
++ }
++
++
++ /* Ok, we've done all the scanning.
++ * Fix up the hard link chains.
++ * We should now have scanned all the objects, now it's time to add these
++ * hardlinks.
++ */
++
++ yaffs_HardlinkFixup(dev,hardList);
++
++ /* Handle the unlinked files. Since they were left in an unlinked state we should
++ * just delete them.
++ */
++ {
++ struct list_head *i;
++ struct list_head *n;
++
++ yaffs_Object *l;
++ /* Soft delete all the unlinked files */
++ list_for_each_safe(i, n,
++ &dev->unlinkedDir->variant.directoryVariant.
++ children) {
++ if (i) {
++ l = list_entry(i, yaffs_Object, siblings);
++ yaffs_DestroyObject(l);
++ }
++ }
++ }
++
++ yaffs_ReleaseTempBuffer(dev, chunkData, __LINE__);
++
++ T(YAFFS_TRACE_SCAN, (TSTR("yaffs_Scan ends" TENDSTR)));
++
++ return YAFFS_OK;
++}
++
++static void yaffs_CheckObjectDetailsLoaded(yaffs_Object *in)
++{
++ __u8 *chunkData;
++ yaffs_ObjectHeader *oh;
++ yaffs_Device *dev = in->myDev;
++ yaffs_ExtendedTags tags;
++ int result;
++
++#if 0
++ T(YAFFS_TRACE_SCAN,(TSTR("details for object %d %s loaded" TENDSTR),
++ in->objectId,
++ in->lazyLoaded ? "not yet" : "already"));
++#endif
++
++ if(in->lazyLoaded){
++ in->lazyLoaded = 0;
++ chunkData = yaffs_GetTempBuffer(dev, __LINE__);
++
++ result = yaffs_ReadChunkWithTagsFromNAND(dev,in->chunkId,chunkData,&tags);
++ oh = (yaffs_ObjectHeader *) chunkData;
++
++ in->yst_mode = oh->yst_mode;
++#ifdef CONFIG_YAFFS_WINCE
++ in->win_atime[0] = oh->win_atime[0];
++ in->win_ctime[0] = oh->win_ctime[0];
++ in->win_mtime[0] = oh->win_mtime[0];
++ in->win_atime[1] = oh->win_atime[1];
++ in->win_ctime[1] = oh->win_ctime[1];
++ in->win_mtime[1] = oh->win_mtime[1];
++#else
++ in->yst_uid = oh->yst_uid;
++ in->yst_gid = oh->yst_gid;
++ in->yst_atime = oh->yst_atime;
++ in->yst_mtime = oh->yst_mtime;
++ in->yst_ctime = oh->yst_ctime;
++ in->yst_rdev = oh->yst_rdev;
++
++#endif
++ yaffs_SetObjectName(in, oh->name);
++
++ if(in->variantType == YAFFS_OBJECT_TYPE_SYMLINK)
++ in->variant.symLinkVariant.alias =
++ yaffs_CloneString(oh->alias);
++
++ yaffs_ReleaseTempBuffer(dev,chunkData, __LINE__);
++ }
++}
++
++static int yaffs_ScanBackwards(yaffs_Device * dev)
++{
++ yaffs_ExtendedTags tags;
++ int blk;
++ int blockIterator;
++ int startIterator;
++ int endIterator;
++ int nBlocksToScan = 0;
++
++ int chunk;
++ int result;
++ int c;
++ int deleted;
++ yaffs_BlockState state;
++ yaffs_Object *hardList = NULL;
++ yaffs_BlockInfo *bi;
++ int sequenceNumber;
++ yaffs_ObjectHeader *oh;
++ yaffs_Object *in;
++ yaffs_Object *parent;
++ int nBlocks = dev->internalEndBlock - dev->internalStartBlock + 1;
++ int itsUnlinked;
++ __u8 *chunkData;
++
++ int fileSize;
++ int isShrink;
++ int foundChunksInBlock;
++ int equivalentObjectId;
++
++
++ yaffs_BlockIndex *blockIndex = NULL;
++ int altBlockIndex = 0;
++
++ if (!dev->isYaffs2) {
++ T(YAFFS_TRACE_SCAN,
++ (TSTR("yaffs_ScanBackwards is only for YAFFS2!" TENDSTR)));
++ return YAFFS_FAIL;
++ }
++
++ T(YAFFS_TRACE_SCAN,
++ (TSTR
++ ("yaffs_ScanBackwards starts intstartblk %d intendblk %d..."
++ TENDSTR), dev->internalStartBlock, dev->internalEndBlock));
++
++
++ dev->sequenceNumber = YAFFS_LOWEST_SEQUENCE_NUMBER;
++
++ blockIndex = YMALLOC(nBlocks * sizeof(yaffs_BlockIndex));
++
++ if(!blockIndex) {
++ blockIndex = YMALLOC_ALT(nBlocks * sizeof(yaffs_BlockIndex));
++ altBlockIndex = 1;
++ }
++
++ if(!blockIndex) {
++ T(YAFFS_TRACE_SCAN,
++ (TSTR("yaffs_Scan() could not allocate block index!" TENDSTR)));
++ return YAFFS_FAIL;
++ }
++
++ chunkData = yaffs_GetTempBuffer(dev, __LINE__);
++
++ /* Scan all the blocks to determine their state */
++ for (blk = dev->internalStartBlock; blk <= dev->internalEndBlock; blk++) {
++ bi = yaffs_GetBlockInfo(dev, blk);
++ yaffs_ClearChunkBits(dev, blk);
++ bi->pagesInUse = 0;
++ bi->softDeletions = 0;
++
++ yaffs_QueryInitialBlockState(dev, blk, &state, &sequenceNumber);
++
++ bi->blockState = state;
++ bi->sequenceNumber = sequenceNumber;
++
++ if(bi->sequenceNumber == YAFFS_SEQUENCE_CHECKPOINT_DATA)
++ bi->blockState = state = YAFFS_BLOCK_STATE_CHECKPOINT;
++
++ T(YAFFS_TRACE_SCAN_DEBUG,
++ (TSTR("Block scanning block %d state %d seq %d" TENDSTR), blk,
++ state, sequenceNumber));
++
++
++ if(state == YAFFS_BLOCK_STATE_CHECKPOINT){
++ /* todo .. fix free space ? */
++
++ } else if (state == YAFFS_BLOCK_STATE_DEAD) {
++ T(YAFFS_TRACE_BAD_BLOCKS,
++ (TSTR("block %d is bad" TENDSTR), blk));
++ } else if (state == YAFFS_BLOCK_STATE_EMPTY) {
++ T(YAFFS_TRACE_SCAN_DEBUG,
++ (TSTR("Block empty " TENDSTR)));
++ dev->nErasedBlocks++;
++ dev->nFreeChunks += dev->nChunksPerBlock;
++ } else if (state == YAFFS_BLOCK_STATE_NEEDS_SCANNING) {
++
++ /* Determine the highest sequence number */
++ if (dev->isYaffs2 &&
++ sequenceNumber >= YAFFS_LOWEST_SEQUENCE_NUMBER &&
++ sequenceNumber < YAFFS_HIGHEST_SEQUENCE_NUMBER) {
++
++ blockIndex[nBlocksToScan].seq = sequenceNumber;
++ blockIndex[nBlocksToScan].block = blk;
++
++ nBlocksToScan++;
++
++ if (sequenceNumber >= dev->sequenceNumber) {
++ dev->sequenceNumber = sequenceNumber;
++ }
++ } else if (dev->isYaffs2) {
++ /* TODO: Nasty sequence number! */
++ T(YAFFS_TRACE_SCAN,
++ (TSTR
++ ("Block scanning block %d has bad sequence number %d"
++ TENDSTR), blk, sequenceNumber));
++
++ }
++ }
++ }
++
++ T(YAFFS_TRACE_SCAN,
++ (TSTR("%d blocks to be sorted..." TENDSTR), nBlocksToScan));
++
++
++
++ YYIELD();
++
++ /* Sort the blocks */
++#ifndef CONFIG_YAFFS_USE_OWN_SORT
++ {
++ /* Use qsort now. */
++ qsort(blockIndex, nBlocksToScan, sizeof(yaffs_BlockIndex), ybicmp);
++ }
++#else
++ {
++ /* Dungy old bubble sort... */
++
++ yaffs_BlockIndex temp;
++ int i;
++ int j;
++
++ for (i = 0; i < nBlocksToScan; i++)
++ for (j = i + 1; j < nBlocksToScan; j++)
++ if (blockIndex[i].seq > blockIndex[j].seq) {
++ temp = blockIndex[j];
++ blockIndex[j] = blockIndex[i];
++ blockIndex[i] = temp;
++ }
++ }
++#endif
++
++ YYIELD();
++
++ T(YAFFS_TRACE_SCAN, (TSTR("...done" TENDSTR)));
++
++ /* Now scan the blocks looking at the data. */
++ startIterator = 0;
++ endIterator = nBlocksToScan - 1;
++ T(YAFFS_TRACE_SCAN_DEBUG,
++ (TSTR("%d blocks to be scanned" TENDSTR), nBlocksToScan));
++
++ /* For each block.... backwards */
++ for (blockIterator = endIterator; blockIterator >= startIterator;
++ blockIterator--) {
++ /* Cooperative multitasking! This loop can run for so
++ long that watchdog timers expire. */
++ YYIELD();
++
++ /* get the block to scan in the correct order */
++ blk = blockIndex[blockIterator].block;
++
++ bi = yaffs_GetBlockInfo(dev, blk);
++ state = bi->blockState;
++
++ deleted = 0;
++
++ /* For each chunk in each block that needs scanning.... */
++ foundChunksInBlock = 0;
++ for (c = dev->nChunksPerBlock - 1; c >= 0 &&
++ (state == YAFFS_BLOCK_STATE_NEEDS_SCANNING ||
++ state == YAFFS_BLOCK_STATE_ALLOCATING); c--) {
++ /* Scan backwards...
++ * Read the tags and decide what to do
++ */
++ chunk = blk * dev->nChunksPerBlock + c;
++
++ result = yaffs_ReadChunkWithTagsFromNAND(dev, chunk, NULL,
++ &tags);
++
++ /* Let's have a good look at this chunk... */
++
++ if (!tags.chunkUsed) {
++ /* An unassigned chunk in the block.
++ * If there are used chunks after this one, then
++ * it is a chunk that was skipped due to failing the erased
++ * check. Just skip it so that it can be deleted.
++ * But, more typically, We get here when this is an unallocated
++ * chunk and his means that either the block is empty or
++ * this is the one being allocated from
++ */
++
++ if(foundChunksInBlock)
++ {
++ /* This is a chunk that was skipped due to failing the erased check */
++
++ } else if (c == 0) {
++ /* We're looking at the first chunk in the block so the block is unused */
++ state = YAFFS_BLOCK_STATE_EMPTY;
++ dev->nErasedBlocks++;
++ } else {
++ if (state == YAFFS_BLOCK_STATE_NEEDS_SCANNING ||
++ state == YAFFS_BLOCK_STATE_ALLOCATING) {
++ if(dev->sequenceNumber == bi->sequenceNumber) {
++ /* this is the block being allocated from */
++
++ T(YAFFS_TRACE_SCAN,
++ (TSTR
++ (" Allocating from %d %d"
++ TENDSTR), blk, c));
++
++ state = YAFFS_BLOCK_STATE_ALLOCATING;
++ dev->allocationBlock = blk;
++ dev->allocationPage = c;
++ dev->allocationBlockFinder = blk;
++ }
++ else {
++ /* This is a partially written block that is not
++ * the current allocation block. This block must have
++ * had a write failure, so set up for retirement.
++ */
++
++ bi->needsRetiring = 1;
++ bi->gcPrioritise = 1;
++
++ T(YAFFS_TRACE_ALWAYS,
++ (TSTR("Partially written block %d being set for retirement" TENDSTR),
++ blk));
++ }
++
++ }
++
++ }
++
++ dev->nFreeChunks++;
++
++ } else if (tags.chunkId > 0) {
++ /* chunkId > 0 so it is a data chunk... */
++ unsigned int endpos;
++ __u32 chunkBase =
++ (tags.chunkId - 1) * dev->nDataBytesPerChunk;
++
++ foundChunksInBlock = 1;
++
++
++ yaffs_SetChunkBit(dev, blk, c);
++ bi->pagesInUse++;
++
++ in = yaffs_FindOrCreateObjectByNumber(dev,
++ tags.
++ objectId,
++ YAFFS_OBJECT_TYPE_FILE);
++ if (in->variantType == YAFFS_OBJECT_TYPE_FILE
++ && chunkBase <
++ in->variant.fileVariant.shrinkSize) {
++ /* This has not been invalidated by a resize */
++ yaffs_PutChunkIntoFile(in, tags.chunkId,
++ chunk, -1);
++
++ /* File size is calculated by looking at the data chunks if we have not
++ * seen an object header yet. Stop this practice once we find an object header.
++ */
++ endpos =
++ (tags.chunkId -
++ 1) * dev->nDataBytesPerChunk +
++ tags.byteCount;
++
++ if (!in->valid && /* have not got an object header yet */
++ in->variant.fileVariant.
++ scannedFileSize < endpos) {
++ in->variant.fileVariant.
++ scannedFileSize = endpos;
++ in->variant.fileVariant.
++ fileSize =
++ in->variant.fileVariant.
++ scannedFileSize;
++ }
++
++ } else {
++ /* This chunk has been invalidated by a resize, so delete */
++ yaffs_DeleteChunk(dev, chunk, 1, __LINE__);
++
++ }
++ } else {
++ /* chunkId == 0, so it is an ObjectHeader.
++ * Thus, we read in the object header and make the object
++ */
++ foundChunksInBlock = 1;
++
++ yaffs_SetChunkBit(dev, blk, c);
++ bi->pagesInUse++;
++
++ oh = NULL;
++ in = NULL;
++
++ if (tags.extraHeaderInfoAvailable) {
++ in = yaffs_FindOrCreateObjectByNumber
++ (dev, tags.objectId,
++ tags.extraObjectType);
++ }
++
++ if (!in ||
++#ifdef CONFIG_YAFFS_DISABLE_LAZY_LOAD
++ !in->valid ||
++#endif
++ tags.extraShadows ||
++ (!in->valid &&
++ (tags.objectId == YAFFS_OBJECTID_ROOT ||
++ tags.objectId == YAFFS_OBJECTID_LOSTNFOUND))
++ ) {
++
++ /* If we don't have valid info then we need to read the chunk
++ * TODO In future we can probably defer reading the chunk and
++ * living with invalid data until needed.
++ */
++
++ result = yaffs_ReadChunkWithTagsFromNAND(dev,
++ chunk,
++ chunkData,
++ NULL);
++
++ oh = (yaffs_ObjectHeader *) chunkData;
++
++ if (!in)
++ in = yaffs_FindOrCreateObjectByNumber(dev, tags.objectId, oh->type);
++
++ }
++
++ if (!in) {
++ /* TODO Hoosterman we have a problem! */
++ T(YAFFS_TRACE_ERROR,
++ (TSTR
++ ("yaffs tragedy: Could not make object for object %d "
++ "at chunk %d during scan"
++ TENDSTR), tags.objectId, chunk));
++
++ }
++
++ if (in->valid) {
++ /* We have already filled this one.
++ * We have a duplicate that will be discarded, but
++ * we first have to suck out resize info if it is a file.
++ */
++
++ if ((in->variantType == YAFFS_OBJECT_TYPE_FILE) &&
++ ((oh &&
++ oh-> type == YAFFS_OBJECT_TYPE_FILE)||
++ (tags.extraHeaderInfoAvailable &&
++ tags.extraObjectType == YAFFS_OBJECT_TYPE_FILE))
++ ) {
++ __u32 thisSize =
++ (oh) ? oh->fileSize : tags.
++ extraFileLength;
++ __u32 parentObjectId =
++ (oh) ? oh->
++ parentObjectId : tags.
++ extraParentObjectId;
++ unsigned isShrink =
++ (oh) ? oh->isShrink : tags.
++ extraIsShrinkHeader;
++
++ /* If it is deleted (unlinked at start also means deleted)
++ * we treat the file size as being zeroed at this point.
++ */
++ if (parentObjectId ==
++ YAFFS_OBJECTID_DELETED
++ || parentObjectId ==
++ YAFFS_OBJECTID_UNLINKED) {
++ thisSize = 0;
++ isShrink = 1;
++ }
++
++ if (isShrink &&
++ in->variant.fileVariant.
++ shrinkSize > thisSize) {
++ in->variant.fileVariant.
++ shrinkSize =
++ thisSize;
++ }
++
++ if (isShrink) {
++ bi->hasShrinkHeader = 1;
++ }
++
++ }
++ /* Use existing - destroy this one. */
++ yaffs_DeleteChunk(dev, chunk, 1, __LINE__);
++
++ }
++
++ if (!in->valid &&
++ (tags.objectId == YAFFS_OBJECTID_ROOT ||
++ tags.objectId ==
++ YAFFS_OBJECTID_LOSTNFOUND)) {
++ /* We only load some info, don't fiddle with directory structure */
++ in->valid = 1;
++
++ if(oh) {
++ in->variantType = oh->type;
++
++ in->yst_mode = oh->yst_mode;
++#ifdef CONFIG_YAFFS_WINCE
++ in->win_atime[0] = oh->win_atime[0];
++ in->win_ctime[0] = oh->win_ctime[0];
++ in->win_mtime[0] = oh->win_mtime[0];
++ in->win_atime[1] = oh->win_atime[1];
++ in->win_ctime[1] = oh->win_ctime[1];
++ in->win_mtime[1] = oh->win_mtime[1];
++#else
++ in->yst_uid = oh->yst_uid;
++ in->yst_gid = oh->yst_gid;
++ in->yst_atime = oh->yst_atime;
++ in->yst_mtime = oh->yst_mtime;
++ in->yst_ctime = oh->yst_ctime;
++ in->yst_rdev = oh->yst_rdev;
++
++#endif
++ } else {
++ in->variantType = tags.extraObjectType;
++ in->lazyLoaded = 1;
++ }
++
++ in->chunkId = chunk;
++
++ } else if (!in->valid) {
++ /* we need to load this info */
++
++ in->valid = 1;
++ in->chunkId = chunk;
++
++ if(oh) {
++ in->variantType = oh->type;
++
++ in->yst_mode = oh->yst_mode;
++#ifdef CONFIG_YAFFS_WINCE
++ in->win_atime[0] = oh->win_atime[0];
++ in->win_ctime[0] = oh->win_ctime[0];
++ in->win_mtime[0] = oh->win_mtime[0];
++ in->win_atime[1] = oh->win_atime[1];
++ in->win_ctime[1] = oh->win_ctime[1];
++ in->win_mtime[1] = oh->win_mtime[1];
++#else
++ in->yst_uid = oh->yst_uid;
++ in->yst_gid = oh->yst_gid;
++ in->yst_atime = oh->yst_atime;
++ in->yst_mtime = oh->yst_mtime;
++ in->yst_ctime = oh->yst_ctime;
++ in->yst_rdev = oh->yst_rdev;
++#endif
++
++ if (oh->shadowsObject > 0)
++ yaffs_HandleShadowedObject(dev,
++ oh->
++ shadowsObject,
++ 1);
++
++
++ yaffs_SetObjectName(in, oh->name);
++ parent =
++ yaffs_FindOrCreateObjectByNumber
++ (dev, oh->parentObjectId,
++ YAFFS_OBJECT_TYPE_DIRECTORY);
++
++ fileSize = oh->fileSize;
++ isShrink = oh->isShrink;
++ equivalentObjectId = oh->equivalentObjectId;
++
++ }
++ else {
++ in->variantType = tags.extraObjectType;
++ parent =
++ yaffs_FindOrCreateObjectByNumber
++ (dev, tags.extraParentObjectId,
++ YAFFS_OBJECT_TYPE_DIRECTORY);
++ fileSize = tags.extraFileLength;
++ isShrink = tags.extraIsShrinkHeader;
++ equivalentObjectId = tags.extraEquivalentObjectId;
++ in->lazyLoaded = 1;
++
++ }
++ in->dirty = 0;
++
++ /* directory stuff...
++ * hook up to parent
++ */
++
++ if (parent->variantType ==
++ YAFFS_OBJECT_TYPE_UNKNOWN) {
++ /* Set up as a directory */
++ parent->variantType =
++ YAFFS_OBJECT_TYPE_DIRECTORY;
++ INIT_LIST_HEAD(&parent->variant.
++ directoryVariant.
++ children);
++ } else if (parent->variantType !=
++ YAFFS_OBJECT_TYPE_DIRECTORY)
++ {
++ /* Hoosterman, another problem....
++ * We're trying to use a non-directory as a directory
++ */
++
++ T(YAFFS_TRACE_ERROR,
++ (TSTR
++ ("yaffs tragedy: attempting to use non-directory as"
++ " a directory in scan. Put in lost+found."
++ TENDSTR)));
++ parent = dev->lostNFoundDir;
++ }
++
++ yaffs_AddObjectToDirectory(parent, in);
++
++ itsUnlinked = (parent == dev->deletedDir) ||
++ (parent == dev->unlinkedDir);
++
++ if (isShrink) {
++ /* Mark the block as having a shrinkHeader */
++ bi->hasShrinkHeader = 1;
++ }
++
++ /* Note re hardlinks.
++ * Since we might scan a hardlink before its equivalent object is scanned
++ * we put them all in a list.
++ * After scanning is complete, we should have all the objects, so we run
++ * through this list and fix up all the chains.
++ */
++
++ switch (in->variantType) {
++ case YAFFS_OBJECT_TYPE_UNKNOWN:
++ /* Todo got a problem */
++ break;
++ case YAFFS_OBJECT_TYPE_FILE:
++
++ if (in->variant.fileVariant.
++ scannedFileSize < fileSize) {
++ /* This covers the case where the file size is greater
++ * than where the data is
++ * This will happen if the file is resized to be larger
++ * than its current data extents.
++ */
++ in->variant.fileVariant.fileSize = fileSize;
++ in->variant.fileVariant.scannedFileSize =
++ in->variant.fileVariant.fileSize;
++ }
++
++ if (isShrink &&
++ in->variant.fileVariant.shrinkSize > fileSize) {
++ in->variant.fileVariant.shrinkSize = fileSize;
++ }
++
++ break;
++ case YAFFS_OBJECT_TYPE_HARDLINK:
++ if(!itsUnlinked) {
++ in->variant.hardLinkVariant.equivalentObjectId =
++ equivalentObjectId;
++ in->hardLinks.next =
++ (struct list_head *) hardList;
++ hardList = in;
++ }
++ break;
++ case YAFFS_OBJECT_TYPE_DIRECTORY:
++ /* Do nothing */
++ break;
++ case YAFFS_OBJECT_TYPE_SPECIAL:
++ /* Do nothing */
++ break;
++ case YAFFS_OBJECT_TYPE_SYMLINK:
++ if(oh)
++ in->variant.symLinkVariant.alias =
++ yaffs_CloneString(oh->
++ alias);
++ break;
++ }
++
++ }
++ }
++ }
++
++ if (state == YAFFS_BLOCK_STATE_NEEDS_SCANNING) {
++ /* If we got this far while scanning, then the block is fully allocated. */
++ state = YAFFS_BLOCK_STATE_FULL;
++ }
++
++ bi->blockState = state;
++
++ /* Now let's see if it was dirty */
++ if (bi->pagesInUse == 0 &&
++ !bi->hasShrinkHeader &&
++ bi->blockState == YAFFS_BLOCK_STATE_FULL) {
++ yaffs_BlockBecameDirty(dev, blk);
++ }
++
++ }
++
++ if (altBlockIndex)
++ YFREE_ALT(blockIndex);
++ else
++ YFREE(blockIndex);
++
++ /* Ok, we've done all the scanning.
++ * Fix up the hard link chains.
++ * We should now have scanned all the objects, now it's time to add these
++ * hardlinks.
++ */
++ yaffs_HardlinkFixup(dev,hardList);
++
++
++ /*
++ * Sort out state of unlinked and deleted objects.
++ */
++ {
++ struct list_head *i;
++ struct list_head *n;
++
++ yaffs_Object *l;
++
++ /* Soft delete all the unlinked files */
++ list_for_each_safe(i, n,
++ &dev->unlinkedDir->variant.directoryVariant.
++ children) {
++ if (i) {
++ l = list_entry(i, yaffs_Object, siblings);
++ yaffs_DestroyObject(l);
++ }
++ }
++
++ /* Soft delete all the deletedDir files */
++ list_for_each_safe(i, n,
++ &dev->deletedDir->variant.directoryVariant.
++ children) {
++ if (i) {
++ l = list_entry(i, yaffs_Object, siblings);
++ yaffs_DestroyObject(l);
++
++ }
++ }
++ }
++
++ yaffs_ReleaseTempBuffer(dev, chunkData, __LINE__);
++
++ T(YAFFS_TRACE_SCAN, (TSTR("yaffs_ScanBackwards ends" TENDSTR)));
++
++ return YAFFS_OK;
++}
++
++/*------------------------------ Directory Functions ----------------------------- */
++
++static void yaffs_RemoveObjectFromDirectory(yaffs_Object * obj)
++{
++ yaffs_Device *dev = obj->myDev;
++
++ if(dev && dev->removeObjectCallback)
++ dev->removeObjectCallback(obj);
++
++ list_del_init(&obj->siblings);
++ obj->parent = NULL;
++}
++
++
++static void yaffs_AddObjectToDirectory(yaffs_Object * directory,
++ yaffs_Object * obj)
++{
++
++ if (!directory) {
++ T(YAFFS_TRACE_ALWAYS,
++ (TSTR
++ ("tragedy: Trying to add an object to a null pointer directory"
++ TENDSTR)));
++ YBUG();
++ }
++ if (directory->variantType != YAFFS_OBJECT_TYPE_DIRECTORY) {
++ T(YAFFS_TRACE_ALWAYS,
++ (TSTR
++ ("tragedy: Trying to add an object to a non-directory"
++ TENDSTR)));
++ YBUG();
++ }
++
++ if (obj->siblings.prev == NULL) {
++ /* Not initialised */
++ INIT_LIST_HEAD(&obj->siblings);
++
++ } else if (!list_empty(&obj->siblings)) {
++ /* If it is holed up somewhere else, un hook it */
++ yaffs_RemoveObjectFromDirectory(obj);
++ }
++ /* Now add it */
++ list_add(&obj->siblings, &directory->variant.directoryVariant.children);
++ obj->parent = directory;
++
++ if (directory == obj->myDev->unlinkedDir
++ || directory == obj->myDev->deletedDir) {
++ obj->unlinked = 1;
++ obj->myDev->nUnlinkedFiles++;
++ obj->renameAllowed = 0;
++ }
++}
++
++yaffs_Object *yaffs_FindObjectByName(yaffs_Object * directory,
++ const YCHAR * name)
++{
++ int sum;
++
++ struct list_head *i;
++ YCHAR buffer[YAFFS_MAX_NAME_LENGTH + 1];
++
++ yaffs_Object *l;
++
++ if (!name) {
++ return NULL;
++ }
++
++ if (!directory) {
++ T(YAFFS_TRACE_ALWAYS,
++ (TSTR
++ ("tragedy: yaffs_FindObjectByName: null pointer directory"
++ TENDSTR)));
++ YBUG();
++ }
++ if (directory->variantType != YAFFS_OBJECT_TYPE_DIRECTORY) {
++ T(YAFFS_TRACE_ALWAYS,
++ (TSTR
++ ("tragedy: yaffs_FindObjectByName: non-directory" TENDSTR)));
++ YBUG();
++ }
++
++ sum = yaffs_CalcNameSum(name);
++
++ list_for_each(i, &directory->variant.directoryVariant.children) {
++ if (i) {
++ l = list_entry(i, yaffs_Object, siblings);
++
++ yaffs_CheckObjectDetailsLoaded(l);
++
++ /* Special case for lost-n-found */
++ if (l->objectId == YAFFS_OBJECTID_LOSTNFOUND) {
++ if (yaffs_strcmp(name, YAFFS_LOSTNFOUND_NAME) == 0) {
++ return l;
++ }
++ } else if (yaffs_SumCompare(l->sum, sum) || l->chunkId <= 0)
++ {
++ /* LostnFound cunk called Objxxx
++ * Do a real check
++ */
++ yaffs_GetObjectName(l, buffer,
++ YAFFS_MAX_NAME_LENGTH);
++ if (yaffs_strcmp(name, buffer) == 0) {
++ return l;
++ }
++
++ }
++ }
++ }
++
++ return NULL;
++}
++
++
++#if 0
++int yaffs_ApplyToDirectoryChildren(yaffs_Object * theDir,
++ int (*fn) (yaffs_Object *))
++{
++ struct list_head *i;
++ yaffs_Object *l;
++
++ if (!theDir) {
++ T(YAFFS_TRACE_ALWAYS,
++ (TSTR
++ ("tragedy: yaffs_FindObjectByName: null pointer directory"
++ TENDSTR)));
++ YBUG();
++ }
++ if (theDir->variantType != YAFFS_OBJECT_TYPE_DIRECTORY) {
++ T(YAFFS_TRACE_ALWAYS,
++ (TSTR
++ ("tragedy: yaffs_FindObjectByName: non-directory" TENDSTR)));
++ YBUG();
++ }
++
++ list_for_each(i, &theDir->variant.directoryVariant.children) {
++ if (i) {
++ l = list_entry(i, yaffs_Object, siblings);
++ if (l && !fn(l)) {
++ return YAFFS_FAIL;
++ }
++ }
++ }
++
++ return YAFFS_OK;
++
++}
++#endif
++
++/* GetEquivalentObject dereferences any hard links to get to the
++ * actual object.
++ */
++
++yaffs_Object *yaffs_GetEquivalentObject(yaffs_Object * obj)
++{
++ if (obj && obj->variantType == YAFFS_OBJECT_TYPE_HARDLINK) {
++ /* We want the object id of the equivalent object, not this one */
++ obj = obj->variant.hardLinkVariant.equivalentObject;
++ }
++ return obj;
++
++}
++
++int yaffs_GetObjectName(yaffs_Object * obj, YCHAR * name, int buffSize)
++{
++ memset(name, 0, buffSize * sizeof(YCHAR));
++
++ yaffs_CheckObjectDetailsLoaded(obj);
++
++ if (obj->objectId == YAFFS_OBJECTID_LOSTNFOUND) {
++ yaffs_strncpy(name, YAFFS_LOSTNFOUND_NAME, buffSize - 1);
++ } else if (obj->chunkId <= 0) {
++ YCHAR locName[20];
++ /* make up a name */
++ yaffs_sprintf(locName, _Y("%s%d"), YAFFS_LOSTNFOUND_PREFIX,
++ obj->objectId);
++ yaffs_strncpy(name, locName, buffSize - 1);
++
++ }
++#ifdef CONFIG_YAFFS_SHORT_NAMES_IN_RAM
++ else if (obj->shortName[0]) {
++ yaffs_strcpy(name, obj->shortName);
++ }
++#endif
++ else {
++ int result;
++ __u8 *buffer = yaffs_GetTempBuffer(obj->myDev, __LINE__);
++
++ yaffs_ObjectHeader *oh = (yaffs_ObjectHeader *) buffer;
++
++ memset(buffer, 0, obj->myDev->nDataBytesPerChunk);
++
++ if (obj->chunkId >= 0) {
++ result = yaffs_ReadChunkWithTagsFromNAND(obj->myDev,
++ obj->chunkId, buffer,
++ NULL);
++ }
++ yaffs_strncpy(name, oh->name, buffSize - 1);
++
++ yaffs_ReleaseTempBuffer(obj->myDev, buffer, __LINE__);
++ }
++
++ return yaffs_strlen(name);
++}
++
++int yaffs_GetObjectFileLength(yaffs_Object * obj)
++{
++
++ /* Dereference any hard linking */
++ obj = yaffs_GetEquivalentObject(obj);
++
++ if (obj->variantType == YAFFS_OBJECT_TYPE_FILE) {
++ return obj->variant.fileVariant.fileSize;
++ }
++ if (obj->variantType == YAFFS_OBJECT_TYPE_SYMLINK) {
++ return yaffs_strlen(obj->variant.symLinkVariant.alias);
++ } else {
++ /* Only a directory should drop through to here */
++ return obj->myDev->nDataBytesPerChunk;
++ }
++}
++
++int yaffs_GetObjectLinkCount(yaffs_Object * obj)
++{
++ int count = 0;
++ struct list_head *i;
++
++ if (!obj->unlinked) {
++ count++; /* the object itself */
++ }
++ list_for_each(i, &obj->hardLinks) {
++ count++; /* add the hard links; */
++ }
++ return count;
++
++}
++
++int yaffs_GetObjectInode(yaffs_Object * obj)
++{
++ obj = yaffs_GetEquivalentObject(obj);
++
++ return obj->objectId;
++}
++
++unsigned yaffs_GetObjectType(yaffs_Object * obj)
++{
++ obj = yaffs_GetEquivalentObject(obj);
++
++ switch (obj->variantType) {
++ case YAFFS_OBJECT_TYPE_FILE:
++ return DT_REG;
++ break;
++ case YAFFS_OBJECT_TYPE_DIRECTORY:
++ return DT_DIR;
++ break;
++ case YAFFS_OBJECT_TYPE_SYMLINK:
++ return DT_LNK;
++ break;
++ case YAFFS_OBJECT_TYPE_HARDLINK:
++ return DT_REG;
++ break;
++ case YAFFS_OBJECT_TYPE_SPECIAL:
++ if (S_ISFIFO(obj->yst_mode))
++ return DT_FIFO;
++ if (S_ISCHR(obj->yst_mode))
++ return DT_CHR;
++ if (S_ISBLK(obj->yst_mode))
++ return DT_BLK;
++ if (S_ISSOCK(obj->yst_mode))
++ return DT_SOCK;
++ default:
++ return DT_REG;
++ break;
++ }
++}
++
++YCHAR *yaffs_GetSymlinkAlias(yaffs_Object * obj)
++{
++ obj = yaffs_GetEquivalentObject(obj);
++ if (obj->variantType == YAFFS_OBJECT_TYPE_SYMLINK) {
++ return yaffs_CloneString(obj->variant.symLinkVariant.alias);
++ } else {
++ return yaffs_CloneString(_Y(""));
++ }
++}
++
++#ifndef CONFIG_YAFFS_WINCE
++
++int yaffs_SetAttributes(yaffs_Object * obj, struct iattr *attr)
++{
++ unsigned int valid = attr->ia_valid;
++
++ if (valid & ATTR_MODE)
++ obj->yst_mode = attr->ia_mode;
++ if (valid & ATTR_UID)
++ obj->yst_uid = attr->ia_uid;
++ if (valid & ATTR_GID)
++ obj->yst_gid = attr->ia_gid;
++
++ if (valid & ATTR_ATIME)
++ obj->yst_atime = Y_TIME_CONVERT(attr->ia_atime);
++ if (valid & ATTR_CTIME)
++ obj->yst_ctime = Y_TIME_CONVERT(attr->ia_ctime);
++ if (valid & ATTR_MTIME)
++ obj->yst_mtime = Y_TIME_CONVERT(attr->ia_mtime);
++
++ if (valid & ATTR_SIZE)
++ yaffs_ResizeFile(obj, attr->ia_size);
++
++ yaffs_UpdateObjectHeader(obj, NULL, 1, 0, 0);
++
++ return YAFFS_OK;
++
++}
++int yaffs_GetAttributes(yaffs_Object * obj, struct iattr *attr)
++{
++ unsigned int valid = 0;
++
++ attr->ia_mode = obj->yst_mode;
++ valid |= ATTR_MODE;
++ attr->ia_uid = obj->yst_uid;
++ valid |= ATTR_UID;
++ attr->ia_gid = obj->yst_gid;
++ valid |= ATTR_GID;
++
++ Y_TIME_CONVERT(attr->ia_atime) = obj->yst_atime;
++ valid |= ATTR_ATIME;
++ Y_TIME_CONVERT(attr->ia_ctime) = obj->yst_ctime;
++ valid |= ATTR_CTIME;
++ Y_TIME_CONVERT(attr->ia_mtime) = obj->yst_mtime;
++ valid |= ATTR_MTIME;
++
++ attr->ia_size = yaffs_GetFileSize(obj);
++ valid |= ATTR_SIZE;
++
++ attr->ia_valid = valid;
++
++ return YAFFS_OK;
++
++}
++
++#endif
++
++#if 0
++int yaffs_DumpObject(yaffs_Object * obj)
++{
++ YCHAR name[257];
++
++ yaffs_GetObjectName(obj, name, 256);
++
++ T(YAFFS_TRACE_ALWAYS,
++ (TSTR
++ ("Object %d, inode %d \"%s\"\n dirty %d valid %d serial %d sum %d"
++ " chunk %d type %d size %d\n"
++ TENDSTR), obj->objectId, yaffs_GetObjectInode(obj), name,
++ obj->dirty, obj->valid, obj->serial, obj->sum, obj->chunkId,
++ yaffs_GetObjectType(obj), yaffs_GetObjectFileLength(obj)));
++
++ return YAFFS_OK;
++}
++#endif
++
++/*---------------------------- Initialisation code -------------------------------------- */
++
++static int yaffs_CheckDevFunctions(const yaffs_Device * dev)
++{
++
++ /* Common functions, gotta have */
++ if (!dev->eraseBlockInNAND || !dev->initialiseNAND)
++ return 0;
++
++#ifdef CONFIG_YAFFS_YAFFS2
++
++ /* Can use the "with tags" style interface for yaffs1 or yaffs2 */
++ if (dev->writeChunkWithTagsToNAND &&
++ dev->readChunkWithTagsFromNAND &&
++ !dev->writeChunkToNAND &&
++ !dev->readChunkFromNAND &&
++ dev->markNANDBlockBad && dev->queryNANDBlock)
++ return 1;
++#endif
++
++ /* Can use the "spare" style interface for yaffs1 */
++ if (!dev->isYaffs2 &&
++ !dev->writeChunkWithTagsToNAND &&
++ !dev->readChunkWithTagsFromNAND &&
++ dev->writeChunkToNAND &&
++ dev->readChunkFromNAND &&
++ !dev->markNANDBlockBad && !dev->queryNANDBlock)
++ return 1;
++
++ return 0; /* bad */
++}
++
++
++static void yaffs_CreateInitialDirectories(yaffs_Device *dev)
++{
++ /* Initialise the unlinked, deleted, root and lost and found directories */
++
++ dev->lostNFoundDir = dev->rootDir = NULL;
++ dev->unlinkedDir = dev->deletedDir = NULL;
++
++ dev->unlinkedDir =
++ yaffs_CreateFakeDirectory(dev, YAFFS_OBJECTID_UNLINKED, S_IFDIR);
++ dev->deletedDir =
++ yaffs_CreateFakeDirectory(dev, YAFFS_OBJECTID_DELETED, S_IFDIR);
++
++ dev->rootDir =
++ yaffs_CreateFakeDirectory(dev, YAFFS_OBJECTID_ROOT,
++ YAFFS_ROOT_MODE | S_IFDIR);
++ dev->lostNFoundDir =
++ yaffs_CreateFakeDirectory(dev, YAFFS_OBJECTID_LOSTNFOUND,
++ YAFFS_LOSTNFOUND_MODE | S_IFDIR);
++ yaffs_AddObjectToDirectory(dev->rootDir, dev->lostNFoundDir);
++}
++
++int yaffs_GutsInitialise(yaffs_Device * dev)
++{
++ unsigned x;
++ int bits;
++
++ T(YAFFS_TRACE_TRACING, (TSTR("yaffs: yaffs_GutsInitialise()" TENDSTR)));
++
++ /* Check stuff that must be set */
++
++ if (!dev) {
++ T(YAFFS_TRACE_ALWAYS, (TSTR("yaffs: Need a device" TENDSTR)));
++ return YAFFS_FAIL;
++ }
++
++ dev->internalStartBlock = dev->startBlock;
++ dev->internalEndBlock = dev->endBlock;
++ dev->blockOffset = 0;
++ dev->chunkOffset = 0;
++ dev->nFreeChunks = 0;
++
++ if (dev->startBlock == 0) {
++ dev->internalStartBlock = dev->startBlock + 1;
++ dev->internalEndBlock = dev->endBlock + 1;
++ dev->blockOffset = 1;
++ dev->chunkOffset = dev->nChunksPerBlock;
++ }
++
++ /* Check geometry parameters. */
++
++ if ((dev->isYaffs2 && dev->nDataBytesPerChunk < 1024) ||
++ (!dev->isYaffs2 && dev->nDataBytesPerChunk != 512) ||
++ dev->nChunksPerBlock < 2 ||
++ dev->nReservedBlocks < 2 ||
++ dev->internalStartBlock <= 0 ||
++ dev->internalEndBlock <= 0 ||
++ dev->internalEndBlock <= (dev->internalStartBlock + dev->nReservedBlocks + 2) // otherwise it is too small
++ ) {
++ T(YAFFS_TRACE_ALWAYS,
++ (TSTR
++ ("yaffs: NAND geometry problems: chunk size %d, type is yaffs%s "
++ TENDSTR), dev->nDataBytesPerChunk, dev->isYaffs2 ? "2" : ""));
++ return YAFFS_FAIL;
++ }
++
++ if (yaffs_InitialiseNAND(dev) != YAFFS_OK) {
++ T(YAFFS_TRACE_ALWAYS,
++ (TSTR("yaffs: InitialiseNAND failed" TENDSTR)));
++ return YAFFS_FAIL;
++ }
++
++ /* Got the right mix of functions? */
++ if (!yaffs_CheckDevFunctions(dev)) {
++ /* Function missing */
++ T(YAFFS_TRACE_ALWAYS,
++ (TSTR
++ ("yaffs: device function(s) missing or wrong\n" TENDSTR)));
++
++ return YAFFS_FAIL;
++ }
++
++ /* This is really a compilation check. */
++ if (!yaffs_CheckStructures()) {
++ T(YAFFS_TRACE_ALWAYS,
++ (TSTR("yaffs_CheckStructures failed\n" TENDSTR)));
++ return YAFFS_FAIL;
++ }
++
++ if (dev->isMounted) {
++ T(YAFFS_TRACE_ALWAYS,
++ (TSTR("yaffs: device already mounted\n" TENDSTR)));
++ return YAFFS_FAIL;
++ }
++
++ /* Finished with most checks. One or two more checks happen later on too. */
++
++ dev->isMounted = 1;
++
++
++
++ /* OK now calculate a few things for the device */
++
++ /*
++ * Calculate all the chunk size manipulation numbers:
++ */
++ /* Start off assuming it is a power of 2 */
++ dev->chunkShift = ShiftDiv(dev->nDataBytesPerChunk);
++ dev->chunkMask = (1<<dev->chunkShift) - 1;
++
++ if(dev->nDataBytesPerChunk == (dev->chunkMask + 1)){
++ /* Yes it is a power of 2, disable crumbs */
++ dev->crumbMask = 0;
++ dev->crumbShift = 0;
++ dev->crumbsPerChunk = 0;
++ } else {
++ /* Not a power of 2, use crumbs instead */
++ dev->crumbShift = ShiftDiv(sizeof(yaffs_PackedTags2TagsPart));
++ dev->crumbMask = (1<<dev->crumbShift)-1;
++ dev->crumbsPerChunk = dev->nDataBytesPerChunk/(1 << dev->crumbShift);
++ dev->chunkShift = 0;
++ dev->chunkMask = 0;
++ }
++
++
++ /*
++ * Calculate chunkGroupBits.
++ * We need to find the next power of 2 > than internalEndBlock
++ */
++
++ x = dev->nChunksPerBlock * (dev->internalEndBlock + 1);
++
++ bits = ShiftsGE(x);
++
++ /* Set up tnode width if wide tnodes are enabled. */
++ if(!dev->wideTnodesDisabled){
++ /* bits must be even so that we end up with 32-bit words */
++ if(bits & 1)
++ bits++;
++ if(bits < 16)
++ dev->tnodeWidth = 16;
++ else
++ dev->tnodeWidth = bits;
++ }
++ else
++ dev->tnodeWidth = 16;
++
++ dev->tnodeMask = (1<<dev->tnodeWidth)-1;
++
++ /* Level0 Tnodes are 16 bits or wider (if wide tnodes are enabled),
++ * so if the bitwidth of the
++ * chunk range we're using is greater than 16 we need
++ * to figure out chunk shift and chunkGroupSize
++ */
++
++ if (bits <= dev->tnodeWidth)
++ dev->chunkGroupBits = 0;
++ else
++ dev->chunkGroupBits = bits - dev->tnodeWidth;
++
++
++ dev->chunkGroupSize = 1 << dev->chunkGroupBits;
++
++ if (dev->nChunksPerBlock < dev->chunkGroupSize) {
++ /* We have a problem because the soft delete won't work if
++ * the chunk group size > chunks per block.
++ * This can be remedied by using larger "virtual blocks".
++ */
++ T(YAFFS_TRACE_ALWAYS,
++ (TSTR("yaffs: chunk group too large\n" TENDSTR)));
++
++ return YAFFS_FAIL;
++ }
++
++ /* OK, we've finished verifying the device, lets continue with initialisation */
++
++ /* More device initialisation */
++ dev->garbageCollections = 0;
++ dev->passiveGarbageCollections = 0;
++ dev->currentDirtyChecker = 0;
++ dev->bufferedBlock = -1;
++ dev->doingBufferedBlockRewrite = 0;
++ dev->nDeletedFiles = 0;
++ dev->nBackgroundDeletions = 0;
++ dev->nUnlinkedFiles = 0;
++ dev->eccFixed = 0;
++ dev->eccUnfixed = 0;
++ dev->tagsEccFixed = 0;
++ dev->tagsEccUnfixed = 0;
++ dev->nErasureFailures = 0;
++ dev->nErasedBlocks = 0;
++ dev->isDoingGC = 0;
++ dev->hasPendingPrioritisedGCs = 1; /* Assume the worst for now, will get fixed on first GC */
++
++ /* Initialise temporary buffers and caches. */
++ {
++ int i;
++ for (i = 0; i < YAFFS_N_TEMP_BUFFERS; i++) {
++ dev->tempBuffer[i].line = 0; /* not in use */
++ dev->tempBuffer[i].buffer =
++ YMALLOC_DMA(dev->nDataBytesPerChunk);
++ }
++ }
++
++ if (dev->nShortOpCaches > 0) {
++ int i;
++
++ if (dev->nShortOpCaches > YAFFS_MAX_SHORT_OP_CACHES) {
++ dev->nShortOpCaches = YAFFS_MAX_SHORT_OP_CACHES;
++ }
++
++ dev->srCache =
++ YMALLOC(dev->nShortOpCaches * sizeof(yaffs_ChunkCache));
++
++ for (i = 0; i < dev->nShortOpCaches; i++) {
++ dev->srCache[i].object = NULL;
++ dev->srCache[i].lastUse = 0;
++ dev->srCache[i].dirty = 0;
++ dev->srCache[i].data = YMALLOC_DMA(dev->nDataBytesPerChunk);
++ }
++ dev->srLastUse = 0;
++ }
++
++ dev->cacheHits = 0;
++
++ dev->gcCleanupList = YMALLOC(dev->nChunksPerBlock * sizeof(__u32));
++
++ if (dev->isYaffs2) {
++ dev->useHeaderFileSize = 1;
++ }
++
++ yaffs_InitialiseBlocks(dev);
++ yaffs_InitialiseTnodes(dev);
++ yaffs_InitialiseObjects(dev);
++
++ yaffs_CreateInitialDirectories(dev);
++
++
++ /* Now scan the flash. */
++ if (dev->isYaffs2) {
++ if(yaffs_CheckpointRestore(dev)) {
++ T(YAFFS_TRACE_CHECKPOINT,
++ (TSTR("yaffs: restored from checkpoint" TENDSTR)));
++ } else {
++
++ /* Clean up the mess caused by an aborted checkpoint load
++ * and scan backwards.
++ */
++ yaffs_DeinitialiseBlocks(dev);
++ yaffs_DeinitialiseTnodes(dev);
++ yaffs_DeinitialiseObjects(dev);
++ yaffs_InitialiseBlocks(dev);
++ yaffs_InitialiseTnodes(dev);
++ yaffs_InitialiseObjects(dev);
++ yaffs_CreateInitialDirectories(dev);
++
++ yaffs_ScanBackwards(dev);
++ }
++ }else
++ yaffs_Scan(dev);
++
++ /* Zero out stats */
++ dev->nPageReads = 0;
++ dev->nPageWrites = 0;
++ dev->nBlockErasures = 0;
++ dev->nGCCopies = 0;
++ dev->nRetriedWrites = 0;
++
++ dev->nRetiredBlocks = 0;
++
++ yaffs_VerifyFreeChunks(dev);
++
++ T(YAFFS_TRACE_TRACING,
++ (TSTR("yaffs: yaffs_GutsInitialise() done.\n" TENDSTR)));
++ return YAFFS_OK;
++
++}
++
++void yaffs_Deinitialise(yaffs_Device * dev)
++{
++ if (dev->isMounted) {
++ int i;
++
++ yaffs_DeinitialiseBlocks(dev);
++ yaffs_DeinitialiseTnodes(dev);
++ yaffs_DeinitialiseObjects(dev);
++ if (dev->nShortOpCaches > 0) {
++
++ for (i = 0; i < dev->nShortOpCaches; i++) {
++ YFREE(dev->srCache[i].data);
++ }
++
++ YFREE(dev->srCache);
++ }
++
++ YFREE(dev->gcCleanupList);
++
++ for (i = 0; i < YAFFS_N_TEMP_BUFFERS; i++) {
++ YFREE(dev->tempBuffer[i].buffer);
++ }
++
++ dev->isMounted = 0;
++ }
++
++}
++
++static int yaffs_CountFreeChunks(yaffs_Device * dev)
++{
++ int nFree;
++ int b;
++
++ yaffs_BlockInfo *blk;
++
++ for (nFree = 0, b = dev->internalStartBlock; b <= dev->internalEndBlock;
++ b++) {
++ blk = yaffs_GetBlockInfo(dev, b);
++
++ switch (blk->blockState) {
++ case YAFFS_BLOCK_STATE_EMPTY:
++ case YAFFS_BLOCK_STATE_ALLOCATING:
++ case YAFFS_BLOCK_STATE_COLLECTING:
++ case YAFFS_BLOCK_STATE_FULL:
++ nFree +=
++ (dev->nChunksPerBlock - blk->pagesInUse +
++ blk->softDeletions);
++ break;
++ default:
++ break;
++ }
++
++ }
++
++ return nFree;
++}
++
++int yaffs_GetNumberOfFreeChunks(yaffs_Device * dev)
++{
++ /* This is what we report to the outside world */
++
++ int nFree;
++ int nDirtyCacheChunks;
++ int blocksForCheckpoint;
++
++#if 1
++ nFree = dev->nFreeChunks;
++#else
++ nFree = yaffs_CountFreeChunks(dev);
++#endif
++
++ nFree += dev->nDeletedFiles;
++
++ /* Now count the number of dirty chunks in the cache and subtract those */
++
++ {
++ int i;
++ for (nDirtyCacheChunks = 0, i = 0; i < dev->nShortOpCaches; i++) {
++ if (dev->srCache[i].dirty)
++ nDirtyCacheChunks++;
++ }
++ }
++
++ nFree -= nDirtyCacheChunks;
++
++ nFree -= ((dev->nReservedBlocks + 1) * dev->nChunksPerBlock);
++
++ /* Now we figure out how much to reserve for the checkpoint and report that... */
++ blocksForCheckpoint = dev->nCheckpointReservedBlocks - dev->blocksInCheckpoint;
++ if(blocksForCheckpoint < 0)
++ blocksForCheckpoint = 0;
++
++ nFree -= (blocksForCheckpoint * dev->nChunksPerBlock);
++
++ if (nFree < 0)
++ nFree = 0;
++
++ return nFree;
++
++}
++
++static int yaffs_freeVerificationFailures;
++
++static void yaffs_VerifyFreeChunks(yaffs_Device * dev)
++{
++ int counted = yaffs_CountFreeChunks(dev);
++
++ int difference = dev->nFreeChunks - counted;
++
++ if (difference) {
++ T(YAFFS_TRACE_ALWAYS,
++ (TSTR("Freechunks verification failure %d %d %d" TENDSTR),
++ dev->nFreeChunks, counted, difference));
++ yaffs_freeVerificationFailures++;
++ }
++}
++
++/*---------------------------------------- YAFFS test code ----------------------*/
++
++#define yaffs_CheckStruct(structure,syze, name) \
++ if(sizeof(structure) != syze) \
++ { \
++ T(YAFFS_TRACE_ALWAYS,(TSTR("%s should be %d but is %d\n" TENDSTR),\
++ name,syze,sizeof(structure))); \
++ return YAFFS_FAIL; \
++ }
++
++static int yaffs_CheckStructures(void)
++{
++/* yaffs_CheckStruct(yaffs_Tags,8,"yaffs_Tags") */
++/* yaffs_CheckStruct(yaffs_TagsUnion,8,"yaffs_TagsUnion") */
++/* yaffs_CheckStruct(yaffs_Spare,16,"yaffs_Spare") */
++#ifndef CONFIG_YAFFS_TNODE_LIST_DEBUG
++ yaffs_CheckStruct(yaffs_Tnode, 2 * YAFFS_NTNODES_LEVEL0, "yaffs_Tnode")
++#endif
++ yaffs_CheckStruct(yaffs_ObjectHeader, 512, "yaffs_ObjectHeader")
++
++ return YAFFS_OK;
++}
+diff -urN linux.old/fs/yaffs2/yaffs_guts.h linux.dev/fs/yaffs2/yaffs_guts.h
+--- linux.old/fs/yaffs2/yaffs_guts.h 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_guts.h 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,893 @@
++/*
++ * YAFFS: Yet another FFS. A NAND-flash specific file system.
++ * yaffs_guts.h: Configuration etc for yaffs_guts
++ *
++ * Copyright (C) 2002 Aleph One Ltd.
++ * for Toby Churchill Ltd and Brightstar Engineering
++ *
++ * Created by Charles Manning <charles@aleph1.co.uk>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU Lesser General Public License version 2.1 as
++ * published by the Free Software Foundation.
++ *
++ *
++ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
++ *
++ * $Id: yaffs_guts.h,v 1.25 2006/10/13 08:52:49 charles Exp $
++ */
++
++#ifndef __YAFFS_GUTS_H__
++#define __YAFFS_GUTS_H__
++
++#include "devextras.h"
++#include "yportenv.h"
++
++#define YAFFS_OK 1
++#define YAFFS_FAIL 0
++
++/* Give us a Y=0x59,
++ * Give us an A=0x41,
++ * Give us an FF=0xFF
++ * Give us an S=0x53
++ * And what have we got...
++ */
++#define YAFFS_MAGIC 0x5941FF53
++
++#define YAFFS_NTNODES_LEVEL0 16
++#define YAFFS_TNODES_LEVEL0_BITS 4
++#define YAFFS_TNODES_LEVEL0_MASK 0xf
++
++#define YAFFS_NTNODES_INTERNAL (YAFFS_NTNODES_LEVEL0 / 2)
++#define YAFFS_TNODES_INTERNAL_BITS (YAFFS_TNODES_LEVEL0_BITS - 1)
++#define YAFFS_TNODES_INTERNAL_MASK 0x7
++#define YAFFS_TNODES_MAX_LEVEL 6
++
++#ifndef CONFIG_YAFFS_NO_YAFFS1
++#define YAFFS_BYTES_PER_SPARE 16
++#define YAFFS_BYTES_PER_CHUNK 512
++#define YAFFS_CHUNK_SIZE_SHIFT 9
++#define YAFFS_CHUNKS_PER_BLOCK 32
++#define YAFFS_BYTES_PER_BLOCK (YAFFS_CHUNKS_PER_BLOCK*YAFFS_BYTES_PER_CHUNK)
++#endif
++
++#define YAFFS_MIN_YAFFS2_CHUNK_SIZE 1024
++#define YAFFS_MIN_YAFFS2_SPARE_SIZE 32
++
++#define YAFFS_MAX_CHUNK_ID 0x000FFFFF
++
++#define YAFFS_UNUSED_OBJECT_ID 0x0003FFFF
++
++#define YAFFS_ALLOCATION_NOBJECTS 100
++#define YAFFS_ALLOCATION_NTNODES 100
++#define YAFFS_ALLOCATION_NLINKS 100
++
++#define YAFFS_NOBJECT_BUCKETS 256
++
++
++#define YAFFS_OBJECT_SPACE 0x40000
++
++#define YAFFS_NCHECKPOINT_OBJECTS 5000
++
++#define YAFFS_CHECKPOINT_VERSION 2
++
++#ifdef CONFIG_YAFFS_UNICODE
++#define YAFFS_MAX_NAME_LENGTH 127
++#define YAFFS_MAX_ALIAS_LENGTH 79
++#else
++#define YAFFS_MAX_NAME_LENGTH 255
++#define YAFFS_MAX_ALIAS_LENGTH 159
++#endif
++
++#define YAFFS_SHORT_NAME_LENGTH 15
++
++/* Some special object ids for pseudo objects */
++#define YAFFS_OBJECTID_ROOT 1
++#define YAFFS_OBJECTID_LOSTNFOUND 2
++#define YAFFS_OBJECTID_UNLINKED 3
++#define YAFFS_OBJECTID_DELETED 4
++
++/* Sseudo object ids for checkpointing */
++#define YAFFS_OBJECTID_SB_HEADER 0x10
++#define YAFFS_OBJECTID_CHECKPOINT_DATA 0x20
++#define YAFFS_SEQUENCE_CHECKPOINT_DATA 0x21
++
++/* */
++
++#define YAFFS_MAX_SHORT_OP_CACHES 20
++
++#define YAFFS_N_TEMP_BUFFERS 4
++
++/* Sequence numbers are used in YAFFS2 to determine block allocation order.
++ * The range is limited slightly to help distinguish bad numbers from good.
++ * This also allows us to perhaps in the future use special numbers for
++ * special purposes.
++ * EFFFFF00 allows the allocation of 8 blocks per second (~1Mbytes) for 15 years,
++ * and is a larger number than the lifetime of a 2GB device.
++ */
++#define YAFFS_LOWEST_SEQUENCE_NUMBER 0x00001000
++#define YAFFS_HIGHEST_SEQUENCE_NUMBER 0xEFFFFF00
++
++/* ChunkCache is used for short read/write operations.*/
++typedef struct {
++ struct yaffs_ObjectStruct *object;
++ int chunkId;
++ int lastUse;
++ int dirty;
++ int nBytes; /* Only valid if the cache is dirty */
++ int locked; /* Can't push out or flush while locked. */
++#ifdef CONFIG_YAFFS_YAFFS2
++ __u8 *data;
++#else
++ __u8 data[YAFFS_BYTES_PER_CHUNK];
++#endif
++} yaffs_ChunkCache;
++
++
++
++/* Tags structures in RAM
++ * NB This uses bitfield. Bitfields should not straddle a u32 boundary otherwise
++ * the structure size will get blown out.
++ */
++
++#ifndef CONFIG_YAFFS_NO_YAFFS1
++typedef struct {
++ unsigned chunkId:20;
++ unsigned serialNumber:2;
++ unsigned byteCount:10;
++ unsigned objectId:18;
++ unsigned ecc:12;
++ unsigned unusedStuff:2;
++
++} yaffs_Tags;
++
++typedef union {
++ yaffs_Tags asTags;
++ __u8 asBytes[8];
++} yaffs_TagsUnion;
++
++#endif
++
++/* Stuff used for extended tags in YAFFS2 */
++
++typedef enum {
++ YAFFS_ECC_RESULT_UNKNOWN,
++ YAFFS_ECC_RESULT_NO_ERROR,
++ YAFFS_ECC_RESULT_FIXED,
++ YAFFS_ECC_RESULT_UNFIXED
++} yaffs_ECCResult;
++
++typedef enum {
++ YAFFS_OBJECT_TYPE_UNKNOWN,
++ YAFFS_OBJECT_TYPE_FILE,
++ YAFFS_OBJECT_TYPE_SYMLINK,
++ YAFFS_OBJECT_TYPE_DIRECTORY,
++ YAFFS_OBJECT_TYPE_HARDLINK,
++ YAFFS_OBJECT_TYPE_SPECIAL
++} yaffs_ObjectType;
++
++typedef struct {
++
++ unsigned validMarker0;
++ unsigned chunkUsed; /* Status of the chunk: used or unused */
++ unsigned objectId; /* If 0 then this is not part of an object (unused) */
++ unsigned chunkId; /* If 0 then this is a header, else a data chunk */
++ unsigned byteCount; /* Only valid for data chunks */
++
++ /* The following stuff only has meaning when we read */
++ yaffs_ECCResult eccResult;
++ unsigned blockBad;
++
++ /* YAFFS 1 stuff */
++ unsigned chunkDeleted; /* The chunk is marked deleted */
++ unsigned serialNumber; /* Yaffs1 2-bit serial number */
++
++ /* YAFFS2 stuff */
++ unsigned sequenceNumber; /* The sequence number of this block */
++
++ /* Extra info if this is an object header (YAFFS2 only) */
++
++ unsigned extraHeaderInfoAvailable; /* There is extra info available if this is not zero */
++ unsigned extraParentObjectId; /* The parent object */
++ unsigned extraIsShrinkHeader; /* Is it a shrink header? */
++ unsigned extraShadows; /* Does this shadow another object? */
++
++ yaffs_ObjectType extraObjectType; /* What object type? */
++
++ unsigned extraFileLength; /* Length if it is a file */
++ unsigned extraEquivalentObjectId; /* Equivalent object Id if it is a hard link */
++
++ unsigned validMarker1;
++
++} yaffs_ExtendedTags;
++
++/* Spare structure for YAFFS1 */
++typedef struct {
++ __u8 tagByte0;
++ __u8 tagByte1;
++ __u8 tagByte2;
++ __u8 tagByte3;
++ __u8 pageStatus; /* set to 0 to delete the chunk */
++ __u8 blockStatus;
++ __u8 tagByte4;
++ __u8 tagByte5;
++ __u8 ecc1[3];
++ __u8 tagByte6;
++ __u8 tagByte7;
++ __u8 ecc2[3];
++} yaffs_Spare;
++
++/*Special structure for passing through to mtd */
++struct yaffs_NANDSpare {
++ yaffs_Spare spare;
++ int eccres1;
++ int eccres2;
++};
++
++/* Block data in RAM */
++
++typedef enum {
++ YAFFS_BLOCK_STATE_UNKNOWN = 0,
++
++ YAFFS_BLOCK_STATE_SCANNING,
++ YAFFS_BLOCK_STATE_NEEDS_SCANNING,
++ /* The block might have something on it (ie it is allocating or full, perhaps empty)
++ * but it needs to be scanned to determine its true state.
++ * This state is only valid during yaffs_Scan.
++ * NB We tolerate empty because the pre-scanner might be incapable of deciding
++ * However, if this state is returned on a YAFFS2 device, then we expect a sequence number
++ */
++
++ YAFFS_BLOCK_STATE_EMPTY,
++ /* This block is empty */
++
++ YAFFS_BLOCK_STATE_ALLOCATING,
++ /* This block is partially allocated.
++ * At least one page holds valid data.
++ * This is the one currently being used for page
++ * allocation. Should never be more than one of these
++ */
++
++ YAFFS_BLOCK_STATE_FULL,
++ /* All the pages in this block have been allocated.
++ */
++
++ YAFFS_BLOCK_STATE_DIRTY,
++ /* All pages have been allocated and deleted.
++ * Erase me, reuse me.
++ */
++
++ YAFFS_BLOCK_STATE_CHECKPOINT,
++ /* This block is assigned to holding checkpoint data.
++ */
++
++ YAFFS_BLOCK_STATE_COLLECTING,
++ /* This block is being garbage collected */
++
++ YAFFS_BLOCK_STATE_DEAD
++ /* This block has failed and is not in use */
++} yaffs_BlockState;
++
++typedef struct {
++
++ int softDeletions:10; /* number of soft deleted pages */
++ int pagesInUse:10; /* number of pages in use */
++ yaffs_BlockState blockState:4; /* One of the above block states */
++ __u32 needsRetiring:1; /* Data has failed on this block, need to get valid data off */
++ /* and retire the block. */
++ __u32 skipErasedCheck: 1; /* If this is set we can skip the erased check on this block */
++ __u32 gcPrioritise: 1; /* An ECC check or bank check has failed on this block.
++ It should be prioritised for GC */
++ __u32 chunkErrorStrikes:3; /* How many times we've had ecc etc failures on this block and tried to reuse it */
++
++#ifdef CONFIG_YAFFS_YAFFS2
++ __u32 hasShrinkHeader:1; /* This block has at least one shrink object header */
++ __u32 sequenceNumber; /* block sequence number for yaffs2 */
++#endif
++
++} yaffs_BlockInfo;
++
++/* -------------------------- Object structure -------------------------------*/
++/* This is the object structure as stored on NAND */
++
++typedef struct {
++ yaffs_ObjectType type;
++
++ /* Apply to everything */
++ int parentObjectId;
++ __u16 sum__NoLongerUsed; /* checksum of name. No longer used */
++ YCHAR name[YAFFS_MAX_NAME_LENGTH + 1];
++
++ /* Thes following apply to directories, files, symlinks - not hard links */
++ __u32 yst_mode; /* protection */
++
++#ifdef CONFIG_YAFFS_WINCE
++ __u32 notForWinCE[5];
++#else
++ __u32 yst_uid;
++ __u32 yst_gid;
++ __u32 yst_atime;
++ __u32 yst_mtime;
++ __u32 yst_ctime;
++#endif
++
++ /* File size applies to files only */
++ int fileSize;
++
++ /* Equivalent object id applies to hard links only. */
++ int equivalentObjectId;
++
++ /* Alias is for symlinks only. */
++ YCHAR alias[YAFFS_MAX_ALIAS_LENGTH + 1];
++
++ __u32 yst_rdev; /* device stuff for block and char devices (major/min) */
++
++#ifdef CONFIG_YAFFS_WINCE
++ __u32 win_ctime[2];
++ __u32 win_atime[2];
++ __u32 win_mtime[2];
++ __u32 roomToGrow[4];
++#else
++ __u32 roomToGrow[10];
++#endif
++
++ int shadowsObject; /* This object header shadows the specified object if > 0 */
++
++ /* isShrink applies to object headers written when we shrink the file (ie resize) */
++ __u32 isShrink;
++
++} yaffs_ObjectHeader;
++
++/*--------------------------- Tnode -------------------------- */
++
++union yaffs_Tnode_union {
++#ifdef CONFIG_YAFFS_TNODE_LIST_DEBUG
++ union yaffs_Tnode_union *internal[YAFFS_NTNODES_INTERNAL + 1];
++#else
++ union yaffs_Tnode_union *internal[YAFFS_NTNODES_INTERNAL];
++#endif
++/* __u16 level0[YAFFS_NTNODES_LEVEL0]; */
++
++};
++
++typedef union yaffs_Tnode_union yaffs_Tnode;
++
++struct yaffs_TnodeList_struct {
++ struct yaffs_TnodeList_struct *next;
++ yaffs_Tnode *tnodes;
++};
++
++typedef struct yaffs_TnodeList_struct yaffs_TnodeList;
++
++/*------------------------ Object -----------------------------*/
++/* An object can be one of:
++ * - a directory (no data, has children links
++ * - a regular file (data.... not prunes :->).
++ * - a symlink [symbolic link] (the alias).
++ * - a hard link
++ */
++
++typedef struct {
++ __u32 fileSize;
++ __u32 scannedFileSize;
++ __u32 shrinkSize;
++ int topLevel;
++ yaffs_Tnode *top;
++} yaffs_FileStructure;
++
++typedef struct {
++ struct list_head children; /* list of child links */
++} yaffs_DirectoryStructure;
++
++typedef struct {
++ YCHAR *alias;
++} yaffs_SymLinkStructure;
++
++typedef struct {
++ struct yaffs_ObjectStruct *equivalentObject;
++ __u32 equivalentObjectId;
++} yaffs_HardLinkStructure;
++
++typedef union {
++ yaffs_FileStructure fileVariant;
++ yaffs_DirectoryStructure directoryVariant;
++ yaffs_SymLinkStructure symLinkVariant;
++ yaffs_HardLinkStructure hardLinkVariant;
++} yaffs_ObjectVariant;
++
++struct yaffs_ObjectStruct {
++ __u8 deleted:1; /* This should only apply to unlinked files. */
++ __u8 softDeleted:1; /* it has also been soft deleted */
++ __u8 unlinked:1; /* An unlinked file. The file should be in the unlinked directory.*/
++ __u8 fake:1; /* A fake object has no presence on NAND. */
++ __u8 renameAllowed:1; /* Some objects are not allowed to be renamed. */
++ __u8 unlinkAllowed:1;
++ __u8 dirty:1; /* the object needs to be written to flash */
++ __u8 valid:1; /* When the file system is being loaded up, this
++ * object might be created before the data
++ * is available (ie. file data records appear before the header).
++ */
++ __u8 lazyLoaded:1; /* This object has been lazy loaded and is missing some detail */
++
++ __u8 deferedFree:1; /* For Linux kernel. Object is removed from NAND, but is
++ * still in the inode cache. Free of object is defered.
++ * until the inode is released.
++ */
++
++ __u8 serial; /* serial number of chunk in NAND. Cached here */
++ __u16 sum; /* sum of the name to speed searching */
++
++ struct yaffs_DeviceStruct *myDev; /* The device I'm on */
++
++ struct list_head hashLink; /* list of objects in this hash bucket */
++
++ struct list_head hardLinks; /* all the equivalent hard linked objects */
++
++ /* directory structure stuff */
++ /* also used for linking up the free list */
++ struct yaffs_ObjectStruct *parent;
++ struct list_head siblings;
++
++ /* Where's my object header in NAND? */
++ int chunkId;
++
++ int nDataChunks; /* Number of data chunks attached to the file. */
++
++ __u32 objectId; /* the object id value */
++
++ __u32 yst_mode;
++
++#ifdef CONFIG_YAFFS_SHORT_NAMES_IN_RAM
++ YCHAR shortName[YAFFS_SHORT_NAME_LENGTH + 1];
++#endif
++
++#ifndef __KERNEL__
++ __u32 inUse;
++#endif
++
++#ifdef CONFIG_YAFFS_WINCE
++ __u32 win_ctime[2];
++ __u32 win_mtime[2];
++ __u32 win_atime[2];
++#else
++ __u32 yst_uid;
++ __u32 yst_gid;
++ __u32 yst_atime;
++ __u32 yst_mtime;
++ __u32 yst_ctime;
++#endif
++
++ __u32 yst_rdev;
++
++#ifdef __KERNEL__
++ struct inode *myInode;
++
++#endif
++
++ yaffs_ObjectType variantType;
++
++ yaffs_ObjectVariant variant;
++
++};
++
++typedef struct yaffs_ObjectStruct yaffs_Object;
++
++struct yaffs_ObjectList_struct {
++ yaffs_Object *objects;
++ struct yaffs_ObjectList_struct *next;
++};
++
++typedef struct yaffs_ObjectList_struct yaffs_ObjectList;
++
++typedef struct {
++ struct list_head list;
++ int count;
++} yaffs_ObjectBucket;
++
++
++/* yaffs_CheckpointObject holds the definition of an object as dumped
++ * by checkpointing.
++ */
++
++typedef struct {
++ int structType;
++ __u32 objectId;
++ __u32 parentId;
++ int chunkId;
++
++ yaffs_ObjectType variantType:3;
++ __u8 deleted:1;
++ __u8 softDeleted:1;
++ __u8 unlinked:1;
++ __u8 fake:1;
++ __u8 renameAllowed:1;
++ __u8 unlinkAllowed:1;
++ __u8 serial;
++
++ int nDataChunks;
++ __u32 fileSizeOrEquivalentObjectId;
++
++}yaffs_CheckpointObject;
++
++/*--------------------- Temporary buffers ----------------
++ *
++ * These are chunk-sized working buffers. Each device has a few
++ */
++
++typedef struct {
++ __u8 *buffer;
++ int line; /* track from whence this buffer was allocated */
++ int maxLine;
++} yaffs_TempBuffer;
++
++/*----------------- Device ---------------------------------*/
++
++struct yaffs_DeviceStruct {
++ struct list_head devList;
++ const char *name;
++
++ /* Entry parameters set up way early. Yaffs sets up the rest.*/
++ int nDataBytesPerChunk; /* Should be a power of 2 >= 512 */
++ int nChunksPerBlock; /* does not need to be a power of 2 */
++ int nBytesPerSpare; /* spare area size */
++ int startBlock; /* Start block we're allowed to use */
++ int endBlock; /* End block we're allowed to use */
++ int nReservedBlocks; /* We want this tuneable so that we can reduce */
++ /* reserved blocks on NOR and RAM. */
++
++ /* Stuff used by the partitioned checkpointing mechanism */
++ int checkpointStartBlock;
++ int checkpointEndBlock;
++
++ /* Stuff used by the shared space checkpointing mechanism */
++ /* If this value is zero, then this mechanism is disabled */
++
++ int nCheckpointReservedBlocks; /* Blocks to reserve for checkpoint data */
++
++
++
++
++ int nShortOpCaches; /* If <= 0, then short op caching is disabled, else
++ * the number of short op caches (don't use too many)
++ */
++
++ int useHeaderFileSize; /* Flag to determine if we should use file sizes from the header */
++
++ int useNANDECC; /* Flag to decide whether or not to use NANDECC */
++
++ void *genericDevice; /* Pointer to device context
++ * On an mtd this holds the mtd pointer.
++ */
++ void *superBlock;
++
++ /* NAND access functions (Must be set before calling YAFFS)*/
++
++ int (*writeChunkToNAND) (struct yaffs_DeviceStruct * dev,
++ int chunkInNAND, const __u8 * data,
++ const yaffs_Spare * spare);
++ int (*readChunkFromNAND) (struct yaffs_DeviceStruct * dev,
++ int chunkInNAND, __u8 * data,
++ yaffs_Spare * spare);
++ int (*eraseBlockInNAND) (struct yaffs_DeviceStruct * dev,
++ int blockInNAND);
++ int (*initialiseNAND) (struct yaffs_DeviceStruct * dev);
++
++#ifdef CONFIG_YAFFS_YAFFS2
++ int (*writeChunkWithTagsToNAND) (struct yaffs_DeviceStruct * dev,
++ int chunkInNAND, const __u8 * data,
++ const yaffs_ExtendedTags * tags);
++ int (*readChunkWithTagsFromNAND) (struct yaffs_DeviceStruct * dev,
++ int chunkInNAND, __u8 * data,
++ yaffs_ExtendedTags * tags);
++ int (*markNANDBlockBad) (struct yaffs_DeviceStruct * dev, int blockNo);
++ int (*queryNANDBlock) (struct yaffs_DeviceStruct * dev, int blockNo,
++ yaffs_BlockState * state, int *sequenceNumber);
++#endif
++
++ int isYaffs2;
++
++ /* The removeObjectCallback function must be supplied by OS flavours that
++ * need it. The Linux kernel does not use this, but yaffs direct does use
++ * it to implement the faster readdir
++ */
++ void (*removeObjectCallback)(struct yaffs_ObjectStruct *obj);
++
++ /* Callback to mark the superblock dirsty */
++ void (*markSuperBlockDirty)(void * superblock);
++
++ int wideTnodesDisabled; /* Set to disable wide tnodes */
++
++
++ /* End of stuff that must be set before initialisation. */
++
++ /* Runtime parameters. Set up by YAFFS. */
++
++ __u16 chunkGroupBits; /* 0 for devices <= 32MB. else log2(nchunks) - 16 */
++ __u16 chunkGroupSize; /* == 2^^chunkGroupBits */
++
++ /* Stuff to support wide tnodes */
++ __u32 tnodeWidth;
++ __u32 tnodeMask;
++
++ /* Stuff to support various file offses to chunk/offset translations */
++ /* "Crumbs" for nDataBytesPerChunk not being a power of 2 */
++ __u32 crumbMask;
++ __u32 crumbShift;
++ __u32 crumbsPerChunk;
++
++ /* Straight shifting for nDataBytesPerChunk being a power of 2 */
++ __u32 chunkShift;
++ __u32 chunkMask;
++
++
++#ifdef __KERNEL__
++
++ struct semaphore sem; /* Semaphore for waiting on erasure.*/
++ struct semaphore grossLock; /* Gross locking semaphore */
++ __u8 *spareBuffer; /* For mtdif2 use. Don't know the size of the buffer
++ * at compile time so we have to allocate it.
++ */
++ void (*putSuperFunc) (struct super_block * sb);
++#endif
++
++ int isMounted;
++
++ int isCheckpointed;
++
++
++ /* Stuff to support block offsetting to support start block zero */
++ int internalStartBlock;
++ int internalEndBlock;
++ int blockOffset;
++ int chunkOffset;
++
++
++ /* Runtime checkpointing stuff */
++ int checkpointPageSequence; /* running sequence number of checkpoint pages */
++ int checkpointByteCount;
++ int checkpointByteOffset;
++ __u8 *checkpointBuffer;
++ int checkpointOpenForWrite;
++ int blocksInCheckpoint;
++ int checkpointCurrentChunk;
++ int checkpointCurrentBlock;
++ int checkpointNextBlock;
++ int *checkpointBlockList;
++ int checkpointMaxBlocks;
++
++ /* Block Info */
++ yaffs_BlockInfo *blockInfo;
++ __u8 *chunkBits; /* bitmap of chunks in use */
++ unsigned blockInfoAlt:1; /* was allocated using alternative strategy */
++ unsigned chunkBitsAlt:1; /* was allocated using alternative strategy */
++ int chunkBitmapStride; /* Number of bytes of chunkBits per block.
++ * Must be consistent with nChunksPerBlock.
++ */
++
++ int nErasedBlocks;
++ int allocationBlock; /* Current block being allocated off */
++ __u32 allocationPage;
++ int allocationBlockFinder; /* Used to search for next allocation block */
++
++ /* Runtime state */
++ int nTnodesCreated;
++ yaffs_Tnode *freeTnodes;
++ int nFreeTnodes;
++ yaffs_TnodeList *allocatedTnodeList;
++
++ int isDoingGC;
++
++ int nObjectsCreated;
++ yaffs_Object *freeObjects;
++ int nFreeObjects;
++
++ yaffs_ObjectList *allocatedObjectList;
++
++ yaffs_ObjectBucket objectBucket[YAFFS_NOBJECT_BUCKETS];
++
++ int nFreeChunks;
++
++ int currentDirtyChecker; /* Used to find current dirtiest block */
++
++ __u32 *gcCleanupList; /* objects to delete at the end of a GC. */
++
++ /* Statistcs */
++ int nPageWrites;
++ int nPageReads;
++ int nBlockErasures;
++ int nErasureFailures;
++ int nGCCopies;
++ int garbageCollections;
++ int passiveGarbageCollections;
++ int nRetriedWrites;
++ int nRetiredBlocks;
++ int eccFixed;
++ int eccUnfixed;
++ int tagsEccFixed;
++ int tagsEccUnfixed;
++ int nDeletions;
++ int nUnmarkedDeletions;
++
++ int hasPendingPrioritisedGCs; /* We think this device might have pending prioritised gcs */
++
++ /* Special directories */
++ yaffs_Object *rootDir;
++ yaffs_Object *lostNFoundDir;
++
++ /* Buffer areas for storing data to recover from write failures TODO
++ * __u8 bufferedData[YAFFS_CHUNKS_PER_BLOCK][YAFFS_BYTES_PER_CHUNK];
++ * yaffs_Spare bufferedSpare[YAFFS_CHUNKS_PER_BLOCK];
++ */
++
++ int bufferedBlock; /* Which block is buffered here? */
++ int doingBufferedBlockRewrite;
++
++ yaffs_ChunkCache *srCache;
++ int srLastUse;
++
++ int cacheHits;
++
++ /* Stuff for background deletion and unlinked files.*/
++ yaffs_Object *unlinkedDir; /* Directory where unlinked and deleted files live. */
++ yaffs_Object *deletedDir; /* Directory where deleted objects are sent to disappear. */
++ yaffs_Object *unlinkedDeletion; /* Current file being background deleted.*/
++ int nDeletedFiles; /* Count of files awaiting deletion;*/
++ int nUnlinkedFiles; /* Count of unlinked files. */
++ int nBackgroundDeletions; /* Count of background deletions. */
++
++
++ yaffs_TempBuffer tempBuffer[YAFFS_N_TEMP_BUFFERS];
++ int maxTemp;
++ int unmanagedTempAllocations;
++ int unmanagedTempDeallocations;
++
++ /* yaffs2 runtime stuff */
++ unsigned sequenceNumber; /* Sequence number of currently allocating block */
++ unsigned oldestDirtySequence;
++
++};
++
++typedef struct yaffs_DeviceStruct yaffs_Device;
++
++/* The static layout of bllock usage etc is stored in the super block header */
++typedef struct {
++ int StructType;
++ int version;
++ int checkpointStartBlock;
++ int checkpointEndBlock;
++ int startBlock;
++ int endBlock;
++ int rfu[100];
++} yaffs_SuperBlockHeader;
++
++/* The CheckpointDevice structure holds the device information that changes at runtime and
++ * must be preserved over unmount/mount cycles.
++ */
++typedef struct {
++ int structType;
++ int nErasedBlocks;
++ int allocationBlock; /* Current block being allocated off */
++ __u32 allocationPage;
++ int nFreeChunks;
++
++ int nDeletedFiles; /* Count of files awaiting deletion;*/
++ int nUnlinkedFiles; /* Count of unlinked files. */
++ int nBackgroundDeletions; /* Count of background deletions. */
++
++ /* yaffs2 runtime stuff */
++ unsigned sequenceNumber; /* Sequence number of currently allocating block */
++ unsigned oldestDirtySequence;
++
++} yaffs_CheckpointDevice;
++
++
++typedef struct {
++ int structType;
++ __u32 magic;
++ __u32 version;
++ __u32 head;
++} yaffs_CheckpointValidity;
++
++/* Function to manipulate block info */
++static Y_INLINE yaffs_BlockInfo *yaffs_GetBlockInfo(yaffs_Device * dev, int blk)
++{
++ if (blk < dev->internalStartBlock || blk > dev->internalEndBlock) {
++ T(YAFFS_TRACE_ERROR,
++ (TSTR
++ ("**>> yaffs: getBlockInfo block %d is not valid" TENDSTR),
++ blk));
++ YBUG();
++ }
++ return &dev->blockInfo[blk - dev->internalStartBlock];
++}
++
++/*----------------------- YAFFS Functions -----------------------*/
++
++int yaffs_GutsInitialise(yaffs_Device * dev);
++void yaffs_Deinitialise(yaffs_Device * dev);
++
++int yaffs_GetNumberOfFreeChunks(yaffs_Device * dev);
++
++int yaffs_RenameObject(yaffs_Object * oldDir, const YCHAR * oldName,
++ yaffs_Object * newDir, const YCHAR * newName);
++
++int yaffs_Unlink(yaffs_Object * dir, const YCHAR * name);
++int yaffs_DeleteFile(yaffs_Object * obj);
++
++int yaffs_GetObjectName(yaffs_Object * obj, YCHAR * name, int buffSize);
++int yaffs_GetObjectFileLength(yaffs_Object * obj);
++int yaffs_GetObjectInode(yaffs_Object * obj);
++unsigned yaffs_GetObjectType(yaffs_Object * obj);
++int yaffs_GetObjectLinkCount(yaffs_Object * obj);
++
++int yaffs_SetAttributes(yaffs_Object * obj, struct iattr *attr);
++int yaffs_GetAttributes(yaffs_Object * obj, struct iattr *attr);
++
++/* File operations */
++int yaffs_ReadDataFromFile(yaffs_Object * obj, __u8 * buffer, loff_t offset,
++ int nBytes);
++int yaffs_WriteDataToFile(yaffs_Object * obj, const __u8 * buffer, loff_t offset,
++ int nBytes, int writeThrough);
++int yaffs_ResizeFile(yaffs_Object * obj, loff_t newSize);
++
++yaffs_Object *yaffs_MknodFile(yaffs_Object * parent, const YCHAR * name,
++ __u32 mode, __u32 uid, __u32 gid);
++int yaffs_FlushFile(yaffs_Object * obj, int updateTime);
++
++/* Flushing and checkpointing */
++void yaffs_FlushEntireDeviceCache(yaffs_Device *dev);
++
++int yaffs_CheckpointSave(yaffs_Device *dev);
++int yaffs_CheckpointRestore(yaffs_Device *dev);
++
++/* Directory operations */
++yaffs_Object *yaffs_MknodDirectory(yaffs_Object * parent, const YCHAR * name,
++ __u32 mode, __u32 uid, __u32 gid);
++yaffs_Object *yaffs_FindObjectByName(yaffs_Object * theDir, const YCHAR * name);
++int yaffs_ApplyToDirectoryChildren(yaffs_Object * theDir,
++ int (*fn) (yaffs_Object *));
++
++yaffs_Object *yaffs_FindObjectByNumber(yaffs_Device * dev, __u32 number);
++
++/* Link operations */
++yaffs_Object *yaffs_Link(yaffs_Object * parent, const YCHAR * name,
++ yaffs_Object * equivalentObject);
++
++yaffs_Object *yaffs_GetEquivalentObject(yaffs_Object * obj);
++
++/* Symlink operations */
++yaffs_Object *yaffs_MknodSymLink(yaffs_Object * parent, const YCHAR * name,
++ __u32 mode, __u32 uid, __u32 gid,
++ const YCHAR * alias);
++YCHAR *yaffs_GetSymlinkAlias(yaffs_Object * obj);
++
++/* Special inodes (fifos, sockets and devices) */
++yaffs_Object *yaffs_MknodSpecial(yaffs_Object * parent, const YCHAR * name,
++ __u32 mode, __u32 uid, __u32 gid, __u32 rdev);
++
++/* Special directories */
++yaffs_Object *yaffs_Root(yaffs_Device * dev);
++yaffs_Object *yaffs_LostNFound(yaffs_Device * dev);
++
++#ifdef CONFIG_YAFFS_WINCE
++/* CONFIG_YAFFS_WINCE special stuff */
++void yfsd_WinFileTimeNow(__u32 target[2]);
++#endif
++
++#ifdef __KERNEL__
++
++void yaffs_HandleDeferedFree(yaffs_Object * obj);
++#endif
++
++/* Debug dump */
++int yaffs_DumpObject(yaffs_Object * obj);
++
++void yaffs_GutsTest(yaffs_Device * dev);
++
++/* A few useful functions */
++void yaffs_InitialiseTags(yaffs_ExtendedTags * tags);
++void yaffs_DeleteChunk(yaffs_Device * dev, int chunkId, int markNAND, int lyn);
++int yaffs_CheckFF(__u8 * buffer, int nBytes);
++void yaffs_HandleChunkError(yaffs_Device *dev, yaffs_BlockInfo *bi);
++
++#endif
+diff -urN linux.old/fs/yaffs2/yaffsinterface.h linux.dev/fs/yaffs2/yaffsinterface.h
+--- linux.old/fs/yaffs2/yaffsinterface.h 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffsinterface.h 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,23 @@
++/*
++ * YAFFS: Yet another FFS. A NAND-flash specific file system.
++ * yaffsinterface.h: Interface to the guts of yaffs.
++ *
++ * Copyright (C) 2002 Aleph One Ltd.
++ * for Toby Churchill Ltd and Brightstar Engineering
++ *
++ * Created by Charles Manning <charles@aleph1.co.uk>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU Lesser General Public License version 2.1 as
++ * published by the Free Software Foundation.
++ *
++ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
++ *
++ */
++
++#ifndef __YAFFSINTERFACE_H__
++#define __YAFFSINTERFACE_H__
++
++int yaffs_Initialise(unsigned nBlocks);
++
++#endif
+diff -urN linux.old/fs/yaffs2/yaffs_mtdif2.c linux.dev/fs/yaffs2/yaffs_mtdif2.c
+--- linux.old/fs/yaffs2/yaffs_mtdif2.c 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_mtdif2.c 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,234 @@
++/*
++ * YAFFS: Yet another FFS. A NAND-flash specific file system.
++ * yaffs_mtdif.c NAND mtd wrapper functions.
++ *
++ * Copyright (C) 2002 Aleph One Ltd.
++ * for Toby Churchill Ltd and Brightstar Engineering
++ *
++ * Created by Charles Manning <charles@aleph1.co.uk>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++/* mtd interface for YAFFS2 */
++
++const char *yaffs_mtdif2_c_version =
++ "$Id: yaffs_mtdif2.c,v 1.15 2006/11/08 06:24:34 charles Exp $";
++
++#include "yportenv.h"
++
++
++#include "yaffs_mtdif2.h"
++
++#include "linux/mtd/mtd.h"
++#include "linux/types.h"
++#include "linux/time.h"
++
++#include "yaffs_packedtags2.h"
++
++int nandmtd2_WriteChunkWithTagsToNAND(yaffs_Device * dev, int chunkInNAND,
++ const __u8 * data,
++ const yaffs_ExtendedTags * tags)
++{
++ struct mtd_info *mtd = (struct mtd_info *)(dev->genericDevice);
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++ struct mtd_oob_ops ops;
++#else
++ size_t dummy;
++#endif
++ int retval = 0;
++
++ loff_t addr = ((loff_t) chunkInNAND) * dev->nDataBytesPerChunk;
++
++ yaffs_PackedTags2 pt;
++
++ T(YAFFS_TRACE_MTD,
++ (TSTR
++ ("nandmtd2_WriteChunkWithTagsToNAND chunk %d data %p tags %p"
++ TENDSTR), chunkInNAND, data, tags));
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++ if (tags)
++ yaffs_PackTags2(&pt, tags);
++ else
++ BUG(); /* both tags and data should always be present */
++
++ if (data) {
++ ops.mode = MTD_OOB_AUTO;
++ ops.ooblen = sizeof(pt);
++ ops.len = dev->nDataBytesPerChunk;
++ ops.ooboffs = 0;
++ ops.datbuf = (__u8 *)data;
++ ops.oobbuf = (void *)&pt;
++ retval = mtd->write_oob(mtd, addr, &ops);
++ } else
++ BUG(); /* both tags and data should always be present */
++#else
++ if (tags) {
++ yaffs_PackTags2(&pt, tags);
++ }
++
++ if (data && tags) {
++ if (dev->useNANDECC)
++ retval =
++ mtd->write_ecc(mtd, addr, dev->nDataBytesPerChunk,
++ &dummy, data, (__u8 *) & pt, NULL);
++ else
++ retval =
++ mtd->write_ecc(mtd, addr, dev->nDataBytesPerChunk,
++ &dummy, data, (__u8 *) & pt, NULL);
++ } else {
++ if (data)
++ retval =
++ mtd->write(mtd, addr, dev->nDataBytesPerChunk, &dummy,
++ data);
++ if (tags)
++ retval =
++ mtd->write_oob(mtd, addr, mtd->oobsize, &dummy,
++ (__u8 *) & pt);
++
++ }
++#endif
++
++ if (retval == 0)
++ return YAFFS_OK;
++ else
++ return YAFFS_FAIL;
++}
++
++int nandmtd2_ReadChunkWithTagsFromNAND(yaffs_Device * dev, int chunkInNAND,
++ __u8 * data, yaffs_ExtendedTags * tags)
++{
++ struct mtd_info *mtd = (struct mtd_info *)(dev->genericDevice);
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++ struct mtd_oob_ops ops;
++#endif
++ size_t dummy;
++ int retval = 0;
++
++ loff_t addr = ((loff_t) chunkInNAND) * dev->nDataBytesPerChunk;
++
++ yaffs_PackedTags2 pt;
++
++ T(YAFFS_TRACE_MTD,
++ (TSTR
++ ("nandmtd2_ReadChunkWithTagsFromNAND chunk %d data %p tags %p"
++ TENDSTR), chunkInNAND, data, tags));
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++ if (data && !tags)
++ retval = mtd->read(mtd, addr, dev->nDataBytesPerChunk,
++ &dummy, data);
++ else if (tags) {
++ ops.mode = MTD_OOB_AUTO;
++ ops.ooblen = sizeof(pt);
++ ops.len = data ? dev->nDataBytesPerChunk : sizeof(pt);
++ ops.ooboffs = 0;
++ ops.datbuf = data;
++ ops.oobbuf = dev->spareBuffer;
++ retval = mtd->read_oob(mtd, addr, &ops);
++ }
++#else
++ if (data && tags) {
++ if (dev->useNANDECC) {
++ retval =
++ mtd->read_ecc(mtd, addr, dev->nDataBytesPerChunk,
++ &dummy, data, dev->spareBuffer,
++ NULL);
++ } else {
++ retval =
++ mtd->read_ecc(mtd, addr, dev->nDataBytesPerChunk,
++ &dummy, data, dev->spareBuffer,
++ NULL);
++ }
++ } else {
++ if (data)
++ retval =
++ mtd->read(mtd, addr, dev->nDataBytesPerChunk, &dummy,
++ data);
++ if (tags)
++ retval =
++ mtd->read_oob(mtd, addr, mtd->oobsize, &dummy,
++ dev->spareBuffer);
++ }
++#endif
++
++ memcpy(&pt, dev->spareBuffer, sizeof(pt));
++
++ if (tags)
++ yaffs_UnpackTags2(tags, &pt);
++
++ if(tags && retval == -EBADMSG && tags->eccResult == YAFFS_ECC_RESULT_NO_ERROR)
++ tags->eccResult = YAFFS_ECC_RESULT_UNFIXED;
++
++ if (retval == 0)
++ return YAFFS_OK;
++ else
++ return YAFFS_FAIL;
++}
++
++int nandmtd2_MarkNANDBlockBad(struct yaffs_DeviceStruct *dev, int blockNo)
++{
++ struct mtd_info *mtd = (struct mtd_info *)(dev->genericDevice);
++ int retval;
++ T(YAFFS_TRACE_MTD,
++ (TSTR("nandmtd2_MarkNANDBlockBad %d" TENDSTR), blockNo));
++
++ retval =
++ mtd->block_markbad(mtd,
++ blockNo * dev->nChunksPerBlock *
++ dev->nDataBytesPerChunk);
++
++ if (retval == 0)
++ return YAFFS_OK;
++ else
++ return YAFFS_FAIL;
++
++}
++
++int nandmtd2_QueryNANDBlock(struct yaffs_DeviceStruct *dev, int blockNo,
++ yaffs_BlockState * state, int *sequenceNumber)
++{
++ struct mtd_info *mtd = (struct mtd_info *)(dev->genericDevice);
++ int retval;
++
++ T(YAFFS_TRACE_MTD,
++ (TSTR("nandmtd2_QueryNANDBlock %d" TENDSTR), blockNo));
++ retval =
++ mtd->block_isbad(mtd,
++ blockNo * dev->nChunksPerBlock *
++ dev->nDataBytesPerChunk);
++
++ if (retval) {
++ T(YAFFS_TRACE_MTD, (TSTR("block is bad" TENDSTR)));
++
++ *state = YAFFS_BLOCK_STATE_DEAD;
++ *sequenceNumber = 0;
++ } else {
++ yaffs_ExtendedTags t;
++ nandmtd2_ReadChunkWithTagsFromNAND(dev,
++ blockNo *
++ dev->nChunksPerBlock, NULL,
++ &t);
++
++ if (t.chunkUsed) {
++ *sequenceNumber = t.sequenceNumber;
++ *state = YAFFS_BLOCK_STATE_NEEDS_SCANNING;
++ } else {
++ *sequenceNumber = 0;
++ *state = YAFFS_BLOCK_STATE_EMPTY;
++ }
++ }
++ T(YAFFS_TRACE_MTD,
++ (TSTR("block is bad seq %d state %d" TENDSTR), *sequenceNumber,
++ *state));
++
++ if (retval == 0)
++ return YAFFS_OK;
++ else
++ return YAFFS_FAIL;
++}
++
+diff -urN linux.old/fs/yaffs2/yaffs_mtdif2.h linux.dev/fs/yaffs2/yaffs_mtdif2.h
+--- linux.old/fs/yaffs2/yaffs_mtdif2.h 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_mtdif2.h 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,29 @@
++/*
++ * YAFFS: Yet another FFS. A NAND-flash specific file system.
++ * yaffs_mtdif.c NAND mtd wrapper functions.
++ *
++ * Copyright (C) 2002 Aleph One Ltd.
++ * for Toby Churchill Ltd and Brightstar Engineering
++ *
++ * Created by Charles Manning <charles@aleph1.co.uk>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++#ifndef __YAFFS_MTDIF2_H__
++#define __YAFFS_MTDIF2_H__
++
++#include "yaffs_guts.h"
++int nandmtd2_WriteChunkWithTagsToNAND(yaffs_Device * dev, int chunkInNAND,
++ const __u8 * data,
++ const yaffs_ExtendedTags * tags);
++int nandmtd2_ReadChunkWithTagsFromNAND(yaffs_Device * dev, int chunkInNAND,
++ __u8 * data, yaffs_ExtendedTags * tags);
++int nandmtd2_MarkNANDBlockBad(struct yaffs_DeviceStruct *dev, int blockNo);
++int nandmtd2_QueryNANDBlock(struct yaffs_DeviceStruct *dev, int blockNo,
++ yaffs_BlockState * state, int *sequenceNumber);
++
++#endif
+diff -urN linux.old/fs/yaffs2/yaffs_mtdif.c linux.dev/fs/yaffs2/yaffs_mtdif.c
+--- linux.old/fs/yaffs2/yaffs_mtdif.c 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_mtdif.c 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,243 @@
++/*
++ * YAFFS: Yet another FFS. A NAND-flash specific file system.
++ * yaffs_mtdif.c NAND mtd wrapper functions.
++ *
++ * Copyright (C) 2002 Aleph One Ltd.
++ * for Toby Churchill Ltd and Brightstar Engineering
++ *
++ * Created by Charles Manning <charles@aleph1.co.uk>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++const char *yaffs_mtdif_c_version =
++ "$Id: yaffs_mtdif.c,v 1.17 2006/11/29 20:21:12 charles Exp $";
++
++#include "yportenv.h"
++
++
++#include "yaffs_mtdif.h"
++
++#include "linux/mtd/mtd.h"
++#include "linux/types.h"
++#include "linux/time.h"
++#include "linux/mtd/nand.h"
++
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18))
++static struct nand_oobinfo yaffs_oobinfo = {
++ .useecc = 1,
++ .eccbytes = 6,
++ .eccpos = {8, 9, 10, 13, 14, 15}
++};
++
++static struct nand_oobinfo yaffs_noeccinfo = {
++ .useecc = 0,
++};
++#endif
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++static inline void translate_spare2oob(const yaffs_Spare *spare, __u8 *oob)
++{
++ oob[0] = spare->tagByte0;
++ oob[1] = spare->tagByte1;
++ oob[2] = spare->tagByte2;
++ oob[3] = spare->tagByte3;
++ oob[4] = spare->tagByte4;
++ oob[5] = spare->tagByte5 & 0x3f;
++ oob[5] |= spare->blockStatus == 'Y' ? 0: 0x80;
++ oob[5] |= spare->pageStatus == 0 ? 0: 0x40;
++ oob[6] = spare->tagByte6;
++ oob[7] = spare->tagByte7;
++}
++
++static inline void translate_oob2spare(yaffs_Spare *spare, __u8 *oob)
++{
++ struct yaffs_NANDSpare *nspare = (struct yaffs_NANDSpare *)spare;
++ spare->tagByte0 = oob[0];
++ spare->tagByte1 = oob[1];
++ spare->tagByte2 = oob[2];
++ spare->tagByte3 = oob[3];
++ spare->tagByte4 = oob[4];
++ spare->tagByte5 = oob[5] == 0xff ? 0xff : oob[5] & 0x3f;
++ spare->blockStatus = oob[5] & 0x80 ? 0xff : 'Y';
++ spare->pageStatus = oob[5] & 0x40 ? 0xff : 0;
++ spare->ecc1[0] = spare->ecc1[1] = spare->ecc1[2] = 0xff;
++ spare->tagByte6 = oob[6];
++ spare->tagByte7 = oob[7];
++ spare->ecc2[0] = spare->ecc2[1] = spare->ecc2[2] = 0xff;
++
++ nspare->eccres1 = nspare->eccres2 = 0; /* FIXME */
++}
++#endif
++
++int nandmtd_WriteChunkToNAND(yaffs_Device * dev, int chunkInNAND,
++ const __u8 * data, const yaffs_Spare * spare)
++{
++ struct mtd_info *mtd = (struct mtd_info *)(dev->genericDevice);
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++ struct mtd_oob_ops ops;
++#endif
++ size_t dummy;
++ int retval = 0;
++
++ loff_t addr = ((loff_t) chunkInNAND) * dev->nDataBytesPerChunk;
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++ __u8 spareAsBytes[8]; /* OOB */
++
++ if (data && !spare)
++ retval = mtd->write(mtd, addr, dev->nDataBytesPerChunk,
++ &dummy, data);
++ else if (spare) {
++ if (dev->useNANDECC) {
++ translate_spare2oob(spare, spareAsBytes);
++ ops.mode = MTD_OOB_AUTO;
++ ops.ooblen = 8; /* temp hack */
++ } else {
++ ops.mode = MTD_OOB_RAW;
++ ops.ooblen = YAFFS_BYTES_PER_SPARE;
++ }
++ ops.len = data ? dev->nDataBytesPerChunk : ops.ooblen;
++ ops.datbuf = (u8 *)data;
++ ops.ooboffs = 0;
++ ops.oobbuf = spareAsBytes;
++ retval = mtd->write_oob(mtd, addr, &ops);
++ }
++#else
++ __u8 *spareAsBytes = (__u8 *) spare;
++
++ if (data && spare) {
++ if (dev->useNANDECC)
++ retval =
++ mtd->write_ecc(mtd, addr, dev->nDataBytesPerChunk,
++ &dummy, data, spareAsBytes,
++ &yaffs_oobinfo);
++ else
++ retval =
++ mtd->write_ecc(mtd, addr, dev->nDataBytesPerChunk,
++ &dummy, data, spareAsBytes,
++ &yaffs_noeccinfo);
++ } else {
++ if (data)
++ retval =
++ mtd->write(mtd, addr, dev->nDataBytesPerChunk, &dummy,
++ data);
++ if (spare)
++ retval =
++ mtd->write_oob(mtd, addr, YAFFS_BYTES_PER_SPARE,
++ &dummy, spareAsBytes);
++ }
++#endif
++
++ if (retval == 0)
++ return YAFFS_OK;
++ else
++ return YAFFS_FAIL;
++}
++
++int nandmtd_ReadChunkFromNAND(yaffs_Device * dev, int chunkInNAND, __u8 * data,
++ yaffs_Spare * spare)
++{
++ struct mtd_info *mtd = (struct mtd_info *)(dev->genericDevice);
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++ struct mtd_oob_ops ops;
++#endif
++ size_t dummy;
++ int retval = 0;
++
++ loff_t addr = ((loff_t) chunkInNAND) * dev->nDataBytesPerChunk;
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17))
++ __u8 spareAsBytes[8]; /* OOB */
++
++ if (data && !spare)
++ retval = mtd->read(mtd, addr, dev->nDataBytesPerChunk,
++ &dummy, data);
++ else if (spare) {
++ if (dev->useNANDECC) {
++ ops.mode = MTD_OOB_AUTO;
++ ops.ooblen = 8; /* temp hack */
++ } else {
++ ops.mode = MTD_OOB_RAW;
++ ops.ooblen = YAFFS_BYTES_PER_SPARE;
++ }
++ ops.len = data ? dev->nDataBytesPerChunk : ops.ooblen;
++ ops.datbuf = data;
++ ops.ooboffs = 0;
++ ops.oobbuf = spareAsBytes;
++ retval = mtd->read_oob(mtd, addr, &ops);
++ if (dev->useNANDECC)
++ translate_oob2spare(spare, spareAsBytes);
++ }
++#else
++ __u8 *spareAsBytes = (__u8 *) spare;
++
++ if (data && spare) {
++ if (dev->useNANDECC) {
++ /* Careful, this call adds 2 ints */
++ /* to the end of the spare data. Calling function */
++ /* should allocate enough memory for spare, */
++ /* i.e. [YAFFS_BYTES_PER_SPARE+2*sizeof(int)]. */
++ retval =
++ mtd->read_ecc(mtd, addr, dev->nDataBytesPerChunk,
++ &dummy, data, spareAsBytes,
++ &yaffs_oobinfo);
++ } else {
++ retval =
++ mtd->read_ecc(mtd, addr, dev->nDataBytesPerChunk,
++ &dummy, data, spareAsBytes,
++ &yaffs_noeccinfo);
++ }
++ } else {
++ if (data)
++ retval =
++ mtd->read(mtd, addr, dev->nDataBytesPerChunk, &dummy,
++ data);
++ if (spare)
++ retval =
++ mtd->read_oob(mtd, addr, YAFFS_BYTES_PER_SPARE,
++ &dummy, spareAsBytes);
++ }
++#endif
++
++ if (retval == 0)
++ return YAFFS_OK;
++ else
++ return YAFFS_FAIL;
++}
++
++int nandmtd_EraseBlockInNAND(yaffs_Device * dev, int blockNumber)
++{
++ struct mtd_info *mtd = (struct mtd_info *)(dev->genericDevice);
++ __u32 addr =
++ ((loff_t) blockNumber) * dev->nDataBytesPerChunk
++ * dev->nChunksPerBlock;
++ struct erase_info ei;
++ int retval = 0;
++
++ ei.mtd = mtd;
++ ei.addr = addr;
++ ei.len = dev->nDataBytesPerChunk * dev->nChunksPerBlock;
++ ei.time = 1000;
++ ei.retries = 2;
++ ei.callback = NULL;
++ ei.priv = (u_long) dev;
++
++ /* Todo finish off the ei if required */
++
++ sema_init(&dev->sem, 0);
++
++ retval = mtd->erase(mtd, &ei);
++
++ if (retval == 0)
++ return YAFFS_OK;
++ else
++ return YAFFS_FAIL;
++}
++
++int nandmtd_InitialiseNAND(yaffs_Device * dev)
++{
++ return YAFFS_OK;
++}
++
+diff -urN linux.old/fs/yaffs2/yaffs_mtdif.h linux.dev/fs/yaffs2/yaffs_mtdif.h
+--- linux.old/fs/yaffs2/yaffs_mtdif.h 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_mtdif.h 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,31 @@
++/*
++ * YAFFS: Yet another FFS. A NAND-flash specific file system.
++ * yaffs_mtdif.h NAND mtd interface wrappers
++ *
++ * Copyright (C) 2002 Aleph One Ltd.
++ * for Toby Churchill Ltd and Brightstar Engineering
++ *
++ * Created by Charles Manning <charles@aleph1.co.uk>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU Lesser General Public License version 2.1 as
++ * published by the Free Software Foundation.
++ *
++ *
++ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
++ *
++ * $Id: yaffs_mtdif.h,v 1.3 2005/08/11 01:07:43 marty Exp $
++ */
++
++#ifndef __YAFFS_MTDIF_H__
++#define __YAFFS_MTDIF_H__
++
++#include "yaffs_guts.h"
++
++int nandmtd_WriteChunkToNAND(yaffs_Device * dev, int chunkInNAND,
++ const __u8 * data, const yaffs_Spare * spare);
++int nandmtd_ReadChunkFromNAND(yaffs_Device * dev, int chunkInNAND, __u8 * data,
++ yaffs_Spare * spare);
++int nandmtd_EraseBlockInNAND(yaffs_Device * dev, int blockNumber);
++int nandmtd_InitialiseNAND(yaffs_Device * dev);
++#endif
+diff -urN linux.old/fs/yaffs2/yaffs_nand.c linux.dev/fs/yaffs2/yaffs_nand.c
+--- linux.old/fs/yaffs2/yaffs_nand.c 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_nand.c 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,135 @@
++/*
++ * YAFFS: Yet another FFS. A NAND-flash specific file system.
++ *
++ * Copyright (C) 2002 Aleph One Ltd.
++ * for Toby Churchill Ltd and Brightstar Engineering
++ *
++ * Created by Charles Manning <charles@aleph1.co.uk>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++const char *yaffs_nand_c_version =
++ "$Id: yaffs_nand.c,v 1.5 2006/11/08 09:52:12 charles Exp $";
++
++#include "yaffs_nand.h"
++#include "yaffs_tagscompat.h"
++#include "yaffs_tagsvalidity.h"
++
++
++int yaffs_ReadChunkWithTagsFromNAND(yaffs_Device * dev, int chunkInNAND,
++ __u8 * buffer,
++ yaffs_ExtendedTags * tags)
++{
++ int result;
++ yaffs_ExtendedTags localTags;
++
++ int realignedChunkInNAND = chunkInNAND - dev->chunkOffset;
++
++ /* If there are no tags provided, use local tags to get prioritised gc working */
++ if(!tags)
++ tags = &localTags;
++
++ if (dev->readChunkWithTagsFromNAND)
++ result = dev->readChunkWithTagsFromNAND(dev, realignedChunkInNAND, buffer,
++ tags);
++ else
++ result = yaffs_TagsCompatabilityReadChunkWithTagsFromNAND(dev,
++ realignedChunkInNAND,
++ buffer,
++ tags);
++ if(tags &&
++ tags->eccResult > YAFFS_ECC_RESULT_NO_ERROR){
++
++ yaffs_BlockInfo *bi = yaffs_GetBlockInfo(dev, chunkInNAND/dev->nChunksPerBlock);
++ yaffs_HandleChunkError(dev,bi);
++ }
++
++ return result;
++}
++
++int yaffs_WriteChunkWithTagsToNAND(yaffs_Device * dev,
++ int chunkInNAND,
++ const __u8 * buffer,
++ yaffs_ExtendedTags * tags)
++{
++ chunkInNAND -= dev->chunkOffset;
++
++
++ if (tags) {
++ tags->sequenceNumber = dev->sequenceNumber;
++ tags->chunkUsed = 1;
++ if (!yaffs_ValidateTags(tags)) {
++ T(YAFFS_TRACE_ERROR,
++ (TSTR("Writing uninitialised tags" TENDSTR)));
++ YBUG();
++ }
++ T(YAFFS_TRACE_WRITE,
++ (TSTR("Writing chunk %d tags %d %d" TENDSTR), chunkInNAND,
++ tags->objectId, tags->chunkId));
++ } else {
++ T(YAFFS_TRACE_ERROR, (TSTR("Writing with no tags" TENDSTR)));
++ YBUG();
++ }
++
++ if (dev->writeChunkWithTagsToNAND)
++ return dev->writeChunkWithTagsToNAND(dev, chunkInNAND, buffer,
++ tags);
++ else
++ return yaffs_TagsCompatabilityWriteChunkWithTagsToNAND(dev,
++ chunkInNAND,
++ buffer,
++ tags);
++}
++
++int yaffs_MarkBlockBad(yaffs_Device * dev, int blockNo)
++{
++ blockNo -= dev->blockOffset;
++
++;
++ if (dev->markNANDBlockBad)
++ return dev->markNANDBlockBad(dev, blockNo);
++ else
++ return yaffs_TagsCompatabilityMarkNANDBlockBad(dev, blockNo);
++}
++
++int yaffs_QueryInitialBlockState(yaffs_Device * dev,
++ int blockNo,
++ yaffs_BlockState * state,
++ unsigned *sequenceNumber)
++{
++ blockNo -= dev->blockOffset;
++
++ if (dev->queryNANDBlock)
++ return dev->queryNANDBlock(dev, blockNo, state, sequenceNumber);
++ else
++ return yaffs_TagsCompatabilityQueryNANDBlock(dev, blockNo,
++ state,
++ sequenceNumber);
++}
++
++
++int yaffs_EraseBlockInNAND(struct yaffs_DeviceStruct *dev,
++ int blockInNAND)
++{
++ int result;
++
++ blockInNAND -= dev->blockOffset;
++
++
++ dev->nBlockErasures++;
++ result = dev->eraseBlockInNAND(dev, blockInNAND);
++
++ return result;
++}
++
++int yaffs_InitialiseNAND(struct yaffs_DeviceStruct *dev)
++{
++ return dev->initialiseNAND(dev);
++}
++
++
++
+diff -urN linux.old/fs/yaffs2/yaffs_nandemul2k.h linux.dev/fs/yaffs2/yaffs_nandemul2k.h
+--- linux.old/fs/yaffs2/yaffs_nandemul2k.h 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_nandemul2k.h 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,42 @@
++/*
++ * YAFFS: Yet another FFS. A NAND-flash specific file system.
++ *
++ * Copyright (C) 2002 Aleph One Ltd.
++ * for Toby Churchill Ltd and Brightstar Engineering
++ *
++ * Created by Charles Manning <charles@aleph1.co.uk>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU Lesser General Public License version 2.1 as
++ * published by the Free Software Foundation.
++ *
++ *
++ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
++ *
++ * yaffs_nandemul2k.h: Interface to emulated NAND functions (2k page size)
++ *
++ * $Id: yaffs_nandemul2k.h,v 1.2 2005/08/11 02:37:49 marty Exp $
++ */
++
++#ifndef __YAFFS_NANDEMUL2K_H__
++#define __YAFFS_NANDEMUL2K_H__
++
++#include "yaffs_guts.h"
++
++int nandemul2k_WriteChunkWithTagsToNAND(struct yaffs_DeviceStruct *dev,
++ int chunkInNAND, const __u8 * data,
++ yaffs_ExtendedTags * tags);
++int nandemul2k_ReadChunkWithTagsFromNAND(struct yaffs_DeviceStruct *dev,
++ int chunkInNAND, __u8 * data,
++ yaffs_ExtendedTags * tags);
++int nandemul2k_MarkNANDBlockBad(struct yaffs_DeviceStruct *dev, int blockNo);
++int nandemul2k_QueryNANDBlock(struct yaffs_DeviceStruct *dev, int blockNo,
++ yaffs_BlockState * state, int *sequenceNumber);
++int nandemul2k_EraseBlockInNAND(struct yaffs_DeviceStruct *dev,
++ int blockInNAND);
++int nandemul2k_InitialiseNAND(struct yaffs_DeviceStruct *dev);
++int nandemul2k_GetBytesPerChunk(void);
++int nandemul2k_GetChunksPerBlock(void);
++int nandemul2k_GetNumberOfBlocks(void);
++
++#endif
+diff -urN linux.old/fs/yaffs2/yaffs_nand.h linux.dev/fs/yaffs2/yaffs_nand.h
+--- linux.old/fs/yaffs2/yaffs_nand.h 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_nand.h 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,43 @@
++/*
++ * YAFFS: Yet another FFS. A NAND-flash specific file system.
++ *
++ * Copyright (C) 2002 Aleph One Ltd.
++ * for Toby Churchill Ltd and Brightstar Engineering
++ *
++ * Created by Charles Manning <charles@aleph1.co.uk>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++#ifndef __YAFFS_NAND_H__
++#define __YAFFS_NAND_H__
++#include "yaffs_guts.h"
++
++
++
++int yaffs_ReadChunkWithTagsFromNAND(yaffs_Device * dev, int chunkInNAND,
++ __u8 * buffer,
++ yaffs_ExtendedTags * tags);
++
++int yaffs_WriteChunkWithTagsToNAND(yaffs_Device * dev,
++ int chunkInNAND,
++ const __u8 * buffer,
++ yaffs_ExtendedTags * tags);
++
++int yaffs_MarkBlockBad(yaffs_Device * dev, int blockNo);
++
++int yaffs_QueryInitialBlockState(yaffs_Device * dev,
++ int blockNo,
++ yaffs_BlockState * state,
++ unsigned *sequenceNumber);
++
++int yaffs_EraseBlockInNAND(struct yaffs_DeviceStruct *dev,
++ int blockInNAND);
++
++int yaffs_InitialiseNAND(struct yaffs_DeviceStruct *dev);
++
++#endif
++
+diff -urN linux.old/fs/yaffs2/yaffs_packedtags1.c linux.dev/fs/yaffs2/yaffs_packedtags1.c
+--- linux.old/fs/yaffs2/yaffs_packedtags1.c 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_packedtags1.c 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,39 @@
++#include "yaffs_packedtags1.h"
++#include "yportenv.h"
++
++void yaffs_PackTags1(yaffs_PackedTags1 * pt, const yaffs_ExtendedTags * t)
++{
++ pt->chunkId = t->chunkId;
++ pt->serialNumber = t->serialNumber;
++ pt->byteCount = t->byteCount;
++ pt->objectId = t->objectId;
++ pt->ecc = 0;
++ pt->deleted = (t->chunkDeleted) ? 0 : 1;
++ pt->unusedStuff = 0;
++ pt->shouldBeFF = 0xFFFFFFFF;
++
++}
++
++void yaffs_UnpackTags1(yaffs_ExtendedTags * t, const yaffs_PackedTags1 * pt)
++{
++ static const __u8 allFF[] =
++ { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
++0xff };
++
++ if (memcmp(allFF, pt, sizeof(yaffs_PackedTags1))) {
++ t->blockBad = 0;
++ if (pt->shouldBeFF != 0xFFFFFFFF) {
++ t->blockBad = 1;
++ }
++ t->chunkUsed = 1;
++ t->objectId = pt->objectId;
++ t->chunkId = pt->chunkId;
++ t->byteCount = pt->byteCount;
++ t->eccResult = YAFFS_ECC_RESULT_NO_ERROR;
++ t->chunkDeleted = (pt->deleted) ? 0 : 1;
++ t->serialNumber = pt->serialNumber;
++ } else {
++ memset(t, 0, sizeof(yaffs_ExtendedTags));
++
++ }
++}
+diff -urN linux.old/fs/yaffs2/yaffs_packedtags1.h linux.dev/fs/yaffs2/yaffs_packedtags1.h
+--- linux.old/fs/yaffs2/yaffs_packedtags1.h 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_packedtags1.h 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,22 @@
++// This is used to pack YAFFS1 tags, not YAFFS2 tags.
++
++#ifndef __YAFFS_PACKEDTAGS1_H__
++#define __YAFFS_PACKEDTAGS1_H__
++
++#include "yaffs_guts.h"
++
++typedef struct {
++ unsigned chunkId:20;
++ unsigned serialNumber:2;
++ unsigned byteCount:10;
++ unsigned objectId:18;
++ unsigned ecc:12;
++ unsigned deleted:1;
++ unsigned unusedStuff:1;
++ unsigned shouldBeFF;
++
++} yaffs_PackedTags1;
++
++void yaffs_PackTags1(yaffs_PackedTags1 * pt, const yaffs_ExtendedTags * t);
++void yaffs_UnpackTags1(yaffs_ExtendedTags * t, const yaffs_PackedTags1 * pt);
++#endif
+diff -urN linux.old/fs/yaffs2/yaffs_packedtags2.c linux.dev/fs/yaffs2/yaffs_packedtags2.c
+--- linux.old/fs/yaffs2/yaffs_packedtags2.c 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_packedtags2.c 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,184 @@
++/*
++ * YAFFS: Yet another FFS. A NAND-flash specific file system.
++ *
++ * yaffs_packedtags2.c: Tags packing for YAFFS2
++ *
++ * Copyright (C) 2002 Aleph One Ltd.
++ *
++ * Created by Charles Manning <charles@aleph1.co.uk>
++ *
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU Lesser General Public License
++ * version 2.1 as published by the Free Software Foundation.
++ */
++
++#include "yaffs_packedtags2.h"
++#include "yportenv.h"
++#include "yaffs_tagsvalidity.h"
++
++/* This code packs a set of extended tags into a binary structure for
++ * NAND storage
++ */
++
++/* Some of the information is "extra" struff which can be packed in to
++ * speed scanning
++ * This is defined by having the EXTRA_HEADER_INFO_FLAG set.
++ */
++
++/* Extra flags applied to chunkId */
++
++#define EXTRA_HEADER_INFO_FLAG 0x80000000
++#define EXTRA_SHRINK_FLAG 0x40000000
++#define EXTRA_SHADOWS_FLAG 0x20000000
++#define EXTRA_SPARE_FLAGS 0x10000000
++
++#define ALL_EXTRA_FLAGS 0xF0000000
++
++/* Also, the top 4 bits of the object Id are set to the object type. */
++#define EXTRA_OBJECT_TYPE_SHIFT (28)
++#define EXTRA_OBJECT_TYPE_MASK ((0x0F) << EXTRA_OBJECT_TYPE_SHIFT)
++
++static void yaffs_DumpPackedTags2(const yaffs_PackedTags2 * pt)
++{
++ T(YAFFS_TRACE_MTD,
++ (TSTR("packed tags obj %d chunk %d byte %d seq %d" TENDSTR),
++ pt->t.objectId, pt->t.chunkId, pt->t.byteCount,
++ pt->t.sequenceNumber));
++}
++
++static void yaffs_DumpTags2(const yaffs_ExtendedTags * t)
++{
++ T(YAFFS_TRACE_MTD,
++ (TSTR
++ ("ext.tags eccres %d blkbad %d chused %d obj %d chunk%d byte "
++ "%d del %d ser %d seq %d"
++ TENDSTR), t->eccResult, t->blockBad, t->chunkUsed, t->objectId,
++ t->chunkId, t->byteCount, t->chunkDeleted, t->serialNumber,
++ t->sequenceNumber));
++
++}
++
++void yaffs_PackTags2(yaffs_PackedTags2 * pt, const yaffs_ExtendedTags * t)
++{
++ pt->t.chunkId = t->chunkId;
++ pt->t.sequenceNumber = t->sequenceNumber;
++ pt->t.byteCount = t->byteCount;
++ pt->t.objectId = t->objectId;
++
++ if (t->chunkId == 0 && t->extraHeaderInfoAvailable) {
++ /* Store the extra header info instead */
++ /* We save the parent object in the chunkId */
++ pt->t.chunkId = EXTRA_HEADER_INFO_FLAG
++ | t->extraParentObjectId;
++ if (t->extraIsShrinkHeader) {
++ pt->t.chunkId |= EXTRA_SHRINK_FLAG;
++ }
++ if (t->extraShadows) {
++ pt->t.chunkId |= EXTRA_SHADOWS_FLAG;
++ }
++
++ pt->t.objectId &= ~EXTRA_OBJECT_TYPE_MASK;
++ pt->t.objectId |=
++ (t->extraObjectType << EXTRA_OBJECT_TYPE_SHIFT);
++
++ if (t->extraObjectType == YAFFS_OBJECT_TYPE_HARDLINK) {
++ pt->t.byteCount = t->extraEquivalentObjectId;
++ } else if (t->extraObjectType == YAFFS_OBJECT_TYPE_FILE) {
++ pt->t.byteCount = t->extraFileLength;
++ } else {
++ pt->t.byteCount = 0;
++ }
++ }
++
++ yaffs_DumpPackedTags2(pt);
++ yaffs_DumpTags2(t);
++
++#ifndef YAFFS_IGNORE_TAGS_ECC
++ {
++ yaffs_ECCCalculateOther((unsigned char *)&pt->t,
++ sizeof(yaffs_PackedTags2TagsPart),
++ &pt->ecc);
++ }
++#endif
++}
++
++void yaffs_UnpackTags2(yaffs_ExtendedTags * t, yaffs_PackedTags2 * pt)
++{
++
++ memset(t, 0, sizeof(yaffs_ExtendedTags));
++
++ yaffs_InitialiseTags(t);
++
++ if (pt->t.sequenceNumber != 0xFFFFFFFF) {
++ /* Page is in use */
++#ifdef YAFFS_IGNORE_TAGS_ECC
++ {
++ t->eccResult = YAFFS_ECC_RESULT_NO_ERROR;
++ }
++#else
++ {
++ yaffs_ECCOther ecc;
++ int result;
++ yaffs_ECCCalculateOther((unsigned char *)&pt->t,
++ sizeof
++ (yaffs_PackedTags2TagsPart),
++ &ecc);
++ result =
++ yaffs_ECCCorrectOther((unsigned char *)&pt->t,
++ sizeof
++ (yaffs_PackedTags2TagsPart),
++ &pt->ecc, &ecc);
++ switch(result){
++ case 0:
++ t->eccResult = YAFFS_ECC_RESULT_NO_ERROR;
++ break;
++ case 1:
++ t->eccResult = YAFFS_ECC_RESULT_FIXED;
++ break;
++ case -1:
++ t->eccResult = YAFFS_ECC_RESULT_UNFIXED;
++ break;
++ default:
++ t->eccResult = YAFFS_ECC_RESULT_UNKNOWN;
++ }
++ }
++#endif
++ t->blockBad = 0;
++ t->chunkUsed = 1;
++ t->objectId = pt->t.objectId;
++ t->chunkId = pt->t.chunkId;
++ t->byteCount = pt->t.byteCount;
++ t->chunkDeleted = 0;
++ t->serialNumber = 0;
++ t->sequenceNumber = pt->t.sequenceNumber;
++
++ /* Do extra header info stuff */
++
++ if (pt->t.chunkId & EXTRA_HEADER_INFO_FLAG) {
++ t->chunkId = 0;
++ t->byteCount = 0;
++
++ t->extraHeaderInfoAvailable = 1;
++ t->extraParentObjectId =
++ pt->t.chunkId & (~(ALL_EXTRA_FLAGS));
++ t->extraIsShrinkHeader =
++ (pt->t.chunkId & EXTRA_SHRINK_FLAG) ? 1 : 0;
++ t->extraShadows =
++ (pt->t.chunkId & EXTRA_SHADOWS_FLAG) ? 1 : 0;
++ t->extraObjectType =
++ pt->t.objectId >> EXTRA_OBJECT_TYPE_SHIFT;
++ t->objectId &= ~EXTRA_OBJECT_TYPE_MASK;
++
++ if (t->extraObjectType == YAFFS_OBJECT_TYPE_HARDLINK) {
++ t->extraEquivalentObjectId = pt->t.byteCount;
++ } else {
++ t->extraFileLength = pt->t.byteCount;
++ }
++ }
++ }
++
++ yaffs_DumpPackedTags2(pt);
++ yaffs_DumpTags2(t);
++
++}
+diff -urN linux.old/fs/yaffs2/yaffs_packedtags2.h linux.dev/fs/yaffs2/yaffs_packedtags2.h
+--- linux.old/fs/yaffs2/yaffs_packedtags2.h 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_packedtags2.h 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,23 @@
++/* This is used to pack YAFFS2 tags, not YAFFS1tags. */
++
++#ifndef __YAFFS_PACKEDTAGS2_H__
++#define __YAFFS_PACKEDTAGS2_H__
++
++#include "yaffs_guts.h"
++#include "yaffs_ecc.h"
++
++typedef struct {
++ unsigned sequenceNumber;
++ unsigned objectId;
++ unsigned chunkId;
++ unsigned byteCount;
++} yaffs_PackedTags2TagsPart;
++
++typedef struct {
++ yaffs_PackedTags2TagsPart t;
++ yaffs_ECCOther ecc;
++} yaffs_PackedTags2;
++
++void yaffs_PackTags2(yaffs_PackedTags2 * pt, const yaffs_ExtendedTags * t);
++void yaffs_UnpackTags2(yaffs_ExtendedTags * t, yaffs_PackedTags2 * pt);
++#endif
+diff -urN linux.old/fs/yaffs2/yaffs_qsort.c linux.dev/fs/yaffs2/yaffs_qsort.c
+--- linux.old/fs/yaffs2/yaffs_qsort.c 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_qsort.c 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,156 @@
++/*
++ * Copyright (c) 1992, 1993
++ * The Regents of the University of California. All rights reserved.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions
++ * are met:
++ * 1. Redistributions of source code must retain the above copyright
++ * notice, this list of conditions and the following disclaimer.
++ * 2. Redistributions in binary form must reproduce the above copyright
++ * notice, this list of conditions and the following disclaimer in the
++ * documentation and/or other materials provided with the distribution.
++ * 3. Neither the name of the University nor the names of its contributors
++ * may be used to endorse or promote products derived from this software
++ * without specific prior written permission.
++ *
++ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
++ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
++ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
++ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
++ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
++ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
++ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
++ * SUCH DAMAGE.
++ */
++
++#include "yportenv.h"
++//#include <linux/string.h>
++
++/*
++ * Qsort routine from Bentley & McIlroy's "Engineering a Sort Function".
++ */
++#define swapcode(TYPE, parmi, parmj, n) { \
++ long i = (n) / sizeof (TYPE); \
++ register TYPE *pi = (TYPE *) (parmi); \
++ register TYPE *pj = (TYPE *) (parmj); \
++ do { \
++ register TYPE t = *pi; \
++ *pi++ = *pj; \
++ *pj++ = t; \
++ } while (--i > 0); \
++}
++
++#define SWAPINIT(a, es) swaptype = ((char *)a - (char *)0) % sizeof(long) || \
++ es % sizeof(long) ? 2 : es == sizeof(long)? 0 : 1;
++
++static __inline void
++swapfunc(char *a, char *b, int n, int swaptype)
++{
++ if (swaptype <= 1)
++ swapcode(long, a, b, n)
++ else
++ swapcode(char, a, b, n)
++}
++
++#define swap(a, b) \
++ if (swaptype == 0) { \
++ long t = *(long *)(a); \
++ *(long *)(a) = *(long *)(b); \
++ *(long *)(b) = t; \
++ } else \
++ swapfunc(a, b, es, swaptype)
++
++#define vecswap(a, b, n) if ((n) > 0) swapfunc(a, b, n, swaptype)
++
++static __inline char *
++med3(char *a, char *b, char *c, int (*cmp)(const void *, const void *))
++{
++ return cmp(a, b) < 0 ?
++ (cmp(b, c) < 0 ? b : (cmp(a, c) < 0 ? c : a ))
++ :(cmp(b, c) > 0 ? b : (cmp(a, c) < 0 ? a : c ));
++}
++
++#define min(a,b) (((a) < (b)) ? (a) : (b))
++void
++qsort(void *aa, size_t n, size_t es, int (*cmp)(const void *, const void *))
++{
++ char *pa, *pb, *pc, *pd, *pl, *pm, *pn;
++ int d, r, swaptype, swap_cnt;
++ register char *a = aa;
++
++loop: SWAPINIT(a, es);
++ swap_cnt = 0;
++ if (n < 7) {
++ for (pm = (char *)a + es; pm < (char *) a + n * es; pm += es)
++ for (pl = pm; pl > (char *) a && cmp(pl - es, pl) > 0;
++ pl -= es)
++ swap(pl, pl - es);
++ return;
++ }
++ pm = (char *)a + (n / 2) * es;
++ if (n > 7) {
++ pl = (char *)a;
++ pn = (char *)a + (n - 1) * es;
++ if (n > 40) {
++ d = (n / 8) * es;
++ pl = med3(pl, pl + d, pl + 2 * d, cmp);
++ pm = med3(pm - d, pm, pm + d, cmp);
++ pn = med3(pn - 2 * d, pn - d, pn, cmp);
++ }
++ pm = med3(pl, pm, pn, cmp);
++ }
++ swap(a, pm);
++ pa = pb = (char *)a + es;
++
++ pc = pd = (char *)a + (n - 1) * es;
++ for (;;) {
++ while (pb <= pc && (r = cmp(pb, a)) <= 0) {
++ if (r == 0) {
++ swap_cnt = 1;
++ swap(pa, pb);
++ pa += es;
++ }
++ pb += es;
++ }
++ while (pb <= pc && (r = cmp(pc, a)) >= 0) {
++ if (r == 0) {
++ swap_cnt = 1;
++ swap(pc, pd);
++ pd -= es;
++ }
++ pc -= es;
++ }
++ if (pb > pc)
++ break;
++ swap(pb, pc);
++ swap_cnt = 1;
++ pb += es;
++ pc -= es;
++ }
++ if (swap_cnt == 0) { /* Switch to insertion sort */
++ for (pm = (char *) a + es; pm < (char *) a + n * es; pm += es)
++ for (pl = pm; pl > (char *) a && cmp(pl - es, pl) > 0;
++ pl -= es)
++ swap(pl, pl - es);
++ return;
++ }
++
++ pn = (char *)a + n * es;
++ r = min(pa - (char *)a, pb - pa);
++ vecswap(a, pb - r, r);
++ r = min((long)(pd - pc), (long)(pn - pd - es));
++ vecswap(pb, pn - r, r);
++ if ((r = pb - pa) > es)
++ qsort(a, r / es, es, cmp);
++ if ((r = pd - pc) > es) {
++ /* Iterate rather than recurse to save stack space */
++ a = pn - r;
++ n = r / es;
++ goto loop;
++ }
++/* qsort(pn - r, r / es, es, cmp);*/
++}
+diff -urN linux.old/fs/yaffs2/yaffs_qsort.h linux.dev/fs/yaffs2/yaffs_qsort.h
+--- linux.old/fs/yaffs2/yaffs_qsort.h 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_qsort.h 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,23 @@
++/*
++ * YAFFS: Yet another FFS. A NAND-flash specific file system.
++ * yaffs_qsort.h: Interface to BSD-licensed qsort routine.
++ *
++ * Copyright (C) 2002 Aleph One Ltd.
++ * for Toby Churchill Ltd and Brightstar Engineering
++ *
++ * Created by Charles Manning <charles@aleph1.co.uk>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU Lesser General Public License version 2.1 as
++ * published by the Free Software Foundation.
++ *
++ * $Id: yaffs_qsort.h,v 1.2 2006/11/07 23:20:09 charles Exp $
++ */
++
++#ifndef __YAFFS_QSORT_H__
++#define __YAFFS_QSORT_H__
++
++extern void qsort (void *const base, size_t total_elems, size_t size,
++ int (*cmp)(const void *, const void *));
++
++#endif
+diff -urN linux.old/fs/yaffs2/yaffs_tagscompat.c linux.dev/fs/yaffs2/yaffs_tagscompat.c
+--- linux.old/fs/yaffs2/yaffs_tagscompat.c 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_tagscompat.c 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,532 @@
++/*
++ * YAFFS: Yet another FFS. A NAND-flash specific file system.
++ * yaffs_tagscompat.h: Tags compatability layer to use YAFFS1 formatted NAND.
++ *
++ * Copyright (C) 2002 Aleph One Ltd.
++ *
++ * Created by Charles Manning <charles@aleph1.co.uk>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * $Id: yaffs_tagscompat.c,v 1.8 2005/11/29 20:54:32 marty Exp $
++ */
++
++#include "yaffs_guts.h"
++#include "yaffs_tagscompat.h"
++#include "yaffs_ecc.h"
++
++static void yaffs_HandleReadDataError(yaffs_Device * dev, int chunkInNAND);
++#ifdef NOTYET
++static void yaffs_CheckWrittenBlock(yaffs_Device * dev, int chunkInNAND);
++static void yaffs_HandleWriteChunkOk(yaffs_Device * dev, int chunkInNAND,
++ const __u8 * data,
++ const yaffs_Spare * spare);
++static void yaffs_HandleUpdateChunk(yaffs_Device * dev, int chunkInNAND,
++ const yaffs_Spare * spare);
++static void yaffs_HandleWriteChunkError(yaffs_Device * dev, int chunkInNAND);
++#endif
++
++static const char yaffs_countBitsTable[256] = {
++ 0, 1, 1, 2, 1, 2, 2, 3, 1, 2, 2, 3, 2, 3, 3, 4,
++ 1, 2, 2, 3, 2, 3, 3, 4, 2, 3, 3, 4, 3, 4, 4, 5,
++ 1, 2, 2, 3, 2, 3, 3, 4, 2, 3, 3, 4, 3, 4, 4, 5,
++ 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6,
++ 1, 2, 2, 3, 2, 3, 3, 4, 2, 3, 3, 4, 3, 4, 4, 5,
++ 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6,
++ 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6,
++ 3, 4, 4, 5, 4, 5, 5, 6, 4, 5, 5, 6, 5, 6, 6, 7,
++ 1, 2, 2, 3, 2, 3, 3, 4, 2, 3, 3, 4, 3, 4, 4, 5,
++ 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6,
++ 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6,
++ 3, 4, 4, 5, 4, 5, 5, 6, 4, 5, 5, 6, 5, 6, 6, 7,
++ 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6,
++ 3, 4, 4, 5, 4, 5, 5, 6, 4, 5, 5, 6, 5, 6, 6, 7,
++ 3, 4, 4, 5, 4, 5, 5, 6, 4, 5, 5, 6, 5, 6, 6, 7,
++ 4, 5, 5, 6, 5, 6, 6, 7, 5, 6, 6, 7, 6, 7, 7, 8
++};
++
++static int yaffs_CountBits(__u8 x)
++{
++ int retVal;
++ retVal = yaffs_countBitsTable[x];
++ return retVal;
++}
++
++/********** Tags ECC calculations *********/
++
++void yaffs_CalcECC(const __u8 * data, yaffs_Spare * spare)
++{
++ yaffs_ECCCalculate(data, spare->ecc1);
++ yaffs_ECCCalculate(&data[256], spare->ecc2);
++}
++
++void yaffs_CalcTagsECC(yaffs_Tags * tags)
++{
++ /* Calculate an ecc */
++
++ unsigned char *b = ((yaffs_TagsUnion *) tags)->asBytes;
++ unsigned i, j;
++ unsigned ecc = 0;
++ unsigned bit = 0;
++
++ tags->ecc = 0;
++
++ for (i = 0; i < 8; i++) {
++ for (j = 1; j & 0xff; j <<= 1) {
++ bit++;
++ if (b[i] & j) {
++ ecc ^= bit;
++ }
++ }
++ }
++
++ tags->ecc = ecc;
++
++}
++
++int yaffs_CheckECCOnTags(yaffs_Tags * tags)
++{
++ unsigned ecc = tags->ecc;
++
++ yaffs_CalcTagsECC(tags);
++
++ ecc ^= tags->ecc;
++
++ if (ecc && ecc <= 64) {
++ /* TODO: Handle the failure better. Retire? */
++ unsigned char *b = ((yaffs_TagsUnion *) tags)->asBytes;
++
++ ecc--;
++
++ b[ecc / 8] ^= (1 << (ecc & 7));
++
++ /* Now recvalc the ecc */
++ yaffs_CalcTagsECC(tags);
++
++ return 1; /* recovered error */
++ } else if (ecc) {
++ /* Wierd ecc failure value */
++ /* TODO Need to do somethiong here */
++ return -1; /* unrecovered error */
++ }
++
++ return 0;
++}
++
++/********** Tags **********/
++
++static void yaffs_LoadTagsIntoSpare(yaffs_Spare * sparePtr,
++ yaffs_Tags * tagsPtr)
++{
++ yaffs_TagsUnion *tu = (yaffs_TagsUnion *) tagsPtr;
++
++ yaffs_CalcTagsECC(tagsPtr);
++
++ sparePtr->tagByte0 = tu->asBytes[0];
++ sparePtr->tagByte1 = tu->asBytes[1];
++ sparePtr->tagByte2 = tu->asBytes[2];
++ sparePtr->tagByte3 = tu->asBytes[3];
++ sparePtr->tagByte4 = tu->asBytes[4];
++ sparePtr->tagByte5 = tu->asBytes[5];
++ sparePtr->tagByte6 = tu->asBytes[6];
++ sparePtr->tagByte7 = tu->asBytes[7];
++}
++
++static void yaffs_GetTagsFromSpare(yaffs_Device * dev, yaffs_Spare * sparePtr,
++ yaffs_Tags * tagsPtr)
++{
++ yaffs_TagsUnion *tu = (yaffs_TagsUnion *) tagsPtr;
++ int result;
++
++ tu->asBytes[0] = sparePtr->tagByte0;
++ tu->asBytes[1] = sparePtr->tagByte1;
++ tu->asBytes[2] = sparePtr->tagByte2;
++ tu->asBytes[3] = sparePtr->tagByte3;
++ tu->asBytes[4] = sparePtr->tagByte4;
++ tu->asBytes[5] = sparePtr->tagByte5;
++ tu->asBytes[6] = sparePtr->tagByte6;
++ tu->asBytes[7] = sparePtr->tagByte7;
++
++ result = yaffs_CheckECCOnTags(tagsPtr);
++ if (result > 0) {
++ dev->tagsEccFixed++;
++ } else if (result < 0) {
++ dev->tagsEccUnfixed++;
++ }
++}
++
++static void yaffs_SpareInitialise(yaffs_Spare * spare)
++{
++ memset(spare, 0xFF, sizeof(yaffs_Spare));
++}
++
++static int yaffs_WriteChunkToNAND(struct yaffs_DeviceStruct *dev,
++ int chunkInNAND, const __u8 * data,
++ yaffs_Spare * spare)
++{
++ if (chunkInNAND < dev->startBlock * dev->nChunksPerBlock) {
++ T(YAFFS_TRACE_ERROR,
++ (TSTR("**>> yaffs chunk %d is not valid" TENDSTR),
++ chunkInNAND));
++ return YAFFS_FAIL;
++ }
++
++ dev->nPageWrites++;
++ return dev->writeChunkToNAND(dev, chunkInNAND, data, spare);
++}
++
++static int yaffs_ReadChunkFromNAND(struct yaffs_DeviceStruct *dev,
++ int chunkInNAND,
++ __u8 * data,
++ yaffs_Spare * spare,
++ yaffs_ECCResult * eccResult,
++ int doErrorCorrection)
++{
++ int retVal;
++ yaffs_Spare localSpare;
++
++ dev->nPageReads++;
++
++ if (!spare && data) {
++ /* If we don't have a real spare, then we use a local one. */
++ /* Need this for the calculation of the ecc */
++ spare = &localSpare;
++ }
++
++ if (!dev->useNANDECC) {
++ retVal = dev->readChunkFromNAND(dev, chunkInNAND, data, spare);
++ if (data && doErrorCorrection) {
++ /* Do ECC correction */
++ /* Todo handle any errors */
++ int eccResult1, eccResult2;
++ __u8 calcEcc[3];
++
++ yaffs_ECCCalculate(data, calcEcc);
++ eccResult1 =
++ yaffs_ECCCorrect(data, spare->ecc1, calcEcc);
++ yaffs_ECCCalculate(&data[256], calcEcc);
++ eccResult2 =
++ yaffs_ECCCorrect(&data[256], spare->ecc2, calcEcc);
++
++ if (eccResult1 > 0) {
++ T(YAFFS_TRACE_ERROR,
++ (TSTR
++ ("**>>yaffs ecc error fix performed on chunk %d:0"
++ TENDSTR), chunkInNAND));
++ dev->eccFixed++;
++ } else if (eccResult1 < 0) {
++ T(YAFFS_TRACE_ERROR,
++ (TSTR
++ ("**>>yaffs ecc error unfixed on chunk %d:0"
++ TENDSTR), chunkInNAND));
++ dev->eccUnfixed++;
++ }
++
++ if (eccResult2 > 0) {
++ T(YAFFS_TRACE_ERROR,
++ (TSTR
++ ("**>>yaffs ecc error fix performed on chunk %d:1"
++ TENDSTR), chunkInNAND));
++ dev->eccFixed++;
++ } else if (eccResult2 < 0) {
++ T(YAFFS_TRACE_ERROR,
++ (TSTR
++ ("**>>yaffs ecc error unfixed on chunk %d:1"
++ TENDSTR), chunkInNAND));
++ dev->eccUnfixed++;
++ }
++
++ if (eccResult1 || eccResult2) {
++ /* We had a data problem on this page */
++ yaffs_HandleReadDataError(dev, chunkInNAND);
++ }
++
++ if (eccResult1 < 0 || eccResult2 < 0)
++ *eccResult = YAFFS_ECC_RESULT_UNFIXED;
++ else if (eccResult1 > 0 || eccResult2 > 0)
++ *eccResult = YAFFS_ECC_RESULT_FIXED;
++ else
++ *eccResult = YAFFS_ECC_RESULT_NO_ERROR;
++ }
++ } else {
++ /* Must allocate enough memory for spare+2*sizeof(int) */
++ /* for ecc results from device. */
++ struct yaffs_NANDSpare nspare;
++ retVal =
++ dev->readChunkFromNAND(dev, chunkInNAND, data,
++ (yaffs_Spare *) & nspare);
++ memcpy(spare, &nspare, sizeof(yaffs_Spare));
++ if (data && doErrorCorrection) {
++ if (nspare.eccres1 > 0) {
++ T(YAFFS_TRACE_ERROR,
++ (TSTR
++ ("**>>mtd ecc error fix performed on chunk %d:0"
++ TENDSTR), chunkInNAND));
++ } else if (nspare.eccres1 < 0) {
++ T(YAFFS_TRACE_ERROR,
++ (TSTR
++ ("**>>mtd ecc error unfixed on chunk %d:0"
++ TENDSTR), chunkInNAND));
++ }
++
++ if (nspare.eccres2 > 0) {
++ T(YAFFS_TRACE_ERROR,
++ (TSTR
++ ("**>>mtd ecc error fix performed on chunk %d:1"
++ TENDSTR), chunkInNAND));
++ } else if (nspare.eccres2 < 0) {
++ T(YAFFS_TRACE_ERROR,
++ (TSTR
++ ("**>>mtd ecc error unfixed on chunk %d:1"
++ TENDSTR), chunkInNAND));
++ }
++
++ if (nspare.eccres1 || nspare.eccres2) {
++ /* We had a data problem on this page */
++ yaffs_HandleReadDataError(dev, chunkInNAND);
++ }
++
++ if (nspare.eccres1 < 0 || nspare.eccres2 < 0)
++ *eccResult = YAFFS_ECC_RESULT_UNFIXED;
++ else if (nspare.eccres1 > 0 || nspare.eccres2 > 0)
++ *eccResult = YAFFS_ECC_RESULT_FIXED;
++ else
++ *eccResult = YAFFS_ECC_RESULT_NO_ERROR;
++
++ }
++ }
++ return retVal;
++}
++
++#ifdef NOTYET
++static int yaffs_CheckChunkErased(struct yaffs_DeviceStruct *dev,
++ int chunkInNAND)
++{
++
++ static int init = 0;
++ static __u8 cmpbuf[YAFFS_BYTES_PER_CHUNK];
++ static __u8 data[YAFFS_BYTES_PER_CHUNK];
++ /* Might as well always allocate the larger size for */
++ /* dev->useNANDECC == true; */
++ static __u8 spare[sizeof(struct yaffs_NANDSpare)];
++
++ dev->readChunkFromNAND(dev, chunkInNAND, data, (yaffs_Spare *) spare);
++
++ if (!init) {
++ memset(cmpbuf, 0xff, YAFFS_BYTES_PER_CHUNK);
++ init = 1;
++ }
++
++ if (memcmp(cmpbuf, data, YAFFS_BYTES_PER_CHUNK))
++ return YAFFS_FAIL;
++ if (memcmp(cmpbuf, spare, 16))
++ return YAFFS_FAIL;
++
++ return YAFFS_OK;
++
++}
++#endif
++
++/*
++ * Functions for robustisizing
++ */
++
++static void yaffs_HandleReadDataError(yaffs_Device * dev, int chunkInNAND)
++{
++ int blockInNAND = chunkInNAND / dev->nChunksPerBlock;
++
++ /* Mark the block for retirement */
++ yaffs_GetBlockInfo(dev, blockInNAND)->needsRetiring = 1;
++ T(YAFFS_TRACE_ERROR | YAFFS_TRACE_BAD_BLOCKS,
++ (TSTR("**>>Block %d marked for retirement" TENDSTR), blockInNAND));
++
++ /* TODO:
++ * Just do a garbage collection on the affected block
++ * then retire the block
++ * NB recursion
++ */
++}
++
++#ifdef NOTYET
++static void yaffs_CheckWrittenBlock(yaffs_Device * dev, int chunkInNAND)
++{
++}
++
++static void yaffs_HandleWriteChunkOk(yaffs_Device * dev, int chunkInNAND,
++ const __u8 * data,
++ const yaffs_Spare * spare)
++{
++}
++
++static void yaffs_HandleUpdateChunk(yaffs_Device * dev, int chunkInNAND,
++ const yaffs_Spare * spare)
++{
++}
++
++static void yaffs_HandleWriteChunkError(yaffs_Device * dev, int chunkInNAND)
++{
++ int blockInNAND = chunkInNAND / dev->nChunksPerBlock;
++
++ /* Mark the block for retirement */
++ yaffs_GetBlockInfo(dev, blockInNAND)->needsRetiring = 1;
++ /* Delete the chunk */
++ yaffs_DeleteChunk(dev, chunkInNAND, 1, __LINE__);
++}
++
++static int yaffs_VerifyCompare(const __u8 * d0, const __u8 * d1,
++ const yaffs_Spare * s0, const yaffs_Spare * s1)
++{
++
++ if (memcmp(d0, d1, YAFFS_BYTES_PER_CHUNK) != 0 ||
++ s0->tagByte0 != s1->tagByte0 ||
++ s0->tagByte1 != s1->tagByte1 ||
++ s0->tagByte2 != s1->tagByte2 ||
++ s0->tagByte3 != s1->tagByte3 ||
++ s0->tagByte4 != s1->tagByte4 ||
++ s0->tagByte5 != s1->tagByte5 ||
++ s0->tagByte6 != s1->tagByte6 ||
++ s0->tagByte7 != s1->tagByte7 ||
++ s0->ecc1[0] != s1->ecc1[0] ||
++ s0->ecc1[1] != s1->ecc1[1] ||
++ s0->ecc1[2] != s1->ecc1[2] ||
++ s0->ecc2[0] != s1->ecc2[0] ||
++ s0->ecc2[1] != s1->ecc2[1] || s0->ecc2[2] != s1->ecc2[2]) {
++ return 0;
++ }
++
++ return 1;
++}
++#endif /* NOTYET */
++
++int yaffs_TagsCompatabilityWriteChunkWithTagsToNAND(yaffs_Device * dev,
++ int chunkInNAND,
++ const __u8 * data,
++ const yaffs_ExtendedTags *
++ eTags)
++{
++ yaffs_Spare spare;
++ yaffs_Tags tags;
++
++ yaffs_SpareInitialise(&spare);
++
++ if (eTags->chunkDeleted) {
++ spare.pageStatus = 0;
++ } else {
++ tags.objectId = eTags->objectId;
++ tags.chunkId = eTags->chunkId;
++ tags.byteCount = eTags->byteCount;
++ tags.serialNumber = eTags->serialNumber;
++
++ if (!dev->useNANDECC && data) {
++ yaffs_CalcECC(data, &spare);
++ }
++ yaffs_LoadTagsIntoSpare(&spare, &tags);
++
++ }
++
++ return yaffs_WriteChunkToNAND(dev, chunkInNAND, data, &spare);
++}
++
++int yaffs_TagsCompatabilityReadChunkWithTagsFromNAND(yaffs_Device * dev,
++ int chunkInNAND,
++ __u8 * data,
++ yaffs_ExtendedTags * eTags)
++{
++
++ yaffs_Spare spare;
++ yaffs_Tags tags;
++ yaffs_ECCResult eccResult;
++
++ static yaffs_Spare spareFF;
++ static int init;
++
++ if (!init) {
++ memset(&spareFF, 0xFF, sizeof(spareFF));
++ init = 1;
++ }
++
++ if (yaffs_ReadChunkFromNAND
++ (dev, chunkInNAND, data, &spare, &eccResult, 1)) {
++ /* eTags may be NULL */
++ if (eTags) {
++
++ int deleted =
++ (yaffs_CountBits(spare.pageStatus) < 7) ? 1 : 0;
++
++ eTags->chunkDeleted = deleted;
++ eTags->eccResult = eccResult;
++ eTags->blockBad = 0; /* We're reading it */
++ /* therefore it is not a bad block */
++ eTags->chunkUsed =
++ (memcmp(&spareFF, &spare, sizeof(spareFF)) !=
++ 0) ? 1 : 0;
++
++ if (eTags->chunkUsed) {
++ yaffs_GetTagsFromSpare(dev, &spare, &tags);
++
++ eTags->objectId = tags.objectId;
++ eTags->chunkId = tags.chunkId;
++ eTags->byteCount = tags.byteCount;
++ eTags->serialNumber = tags.serialNumber;
++ }
++ }
++
++ return YAFFS_OK;
++ } else {
++ return YAFFS_FAIL;
++ }
++}
++
++int yaffs_TagsCompatabilityMarkNANDBlockBad(struct yaffs_DeviceStruct *dev,
++ int blockInNAND)
++{
++
++ yaffs_Spare spare;
++
++ memset(&spare, 0xff, sizeof(yaffs_Spare));
++
++ spare.blockStatus = 'Y';
++
++ yaffs_WriteChunkToNAND(dev, blockInNAND * dev->nChunksPerBlock, NULL,
++ &spare);
++ yaffs_WriteChunkToNAND(dev, blockInNAND * dev->nChunksPerBlock + 1,
++ NULL, &spare);
++
++ return YAFFS_OK;
++
++}
++
++int yaffs_TagsCompatabilityQueryNANDBlock(struct yaffs_DeviceStruct *dev,
++ int blockNo, yaffs_BlockState *
++ state,
++ int *sequenceNumber)
++{
++
++ yaffs_Spare spare0, spare1;
++ static yaffs_Spare spareFF;
++ static int init;
++ yaffs_ECCResult dummy;
++
++ if (!init) {
++ memset(&spareFF, 0xFF, sizeof(spareFF));
++ init = 1;
++ }
++
++ *sequenceNumber = 0;
++
++ yaffs_ReadChunkFromNAND(dev, blockNo * dev->nChunksPerBlock, NULL,
++ &spare0, &dummy, 1);
++ yaffs_ReadChunkFromNAND(dev, blockNo * dev->nChunksPerBlock + 1, NULL,
++ &spare1, &dummy, 1);
++
++ if (yaffs_CountBits(spare0.blockStatus & spare1.blockStatus) < 7)
++ *state = YAFFS_BLOCK_STATE_DEAD;
++ else if (memcmp(&spareFF, &spare0, sizeof(spareFF)) == 0)
++ *state = YAFFS_BLOCK_STATE_EMPTY;
++ else
++ *state = YAFFS_BLOCK_STATE_NEEDS_SCANNING;
++
++ return YAFFS_OK;
++}
+diff -urN linux.old/fs/yaffs2/yaffs_tagscompat.h linux.dev/fs/yaffs2/yaffs_tagscompat.h
+--- linux.old/fs/yaffs2/yaffs_tagscompat.h 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_tagscompat.h 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,40 @@
++/*
++ * YAFFS: Yet another FFS. A NAND-flash specific file system.
++ * yaffs_ramdisk.h: yaffs ram disk component
++ *
++ * Copyright (C) 2002 Aleph One Ltd.
++ *
++ * Created by Charles Manning <charles@aleph1.co.uk>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * $Id: yaffs_tagscompat.h,v 1.2 2005/08/11 02:33:03 marty Exp $
++ */
++
++/* This provides a ram disk under yaffs.
++ * NB this is not intended for NAND emulation.
++ * Use this with dev->useNANDECC enabled, then ECC overheads are not required.
++ */
++#ifndef __YAFFS_TAGSCOMPAT_H__
++#define __YAFFS_TAGSCOMPAT_H__
++
++#include "yaffs_guts.h"
++int yaffs_TagsCompatabilityWriteChunkWithTagsToNAND(yaffs_Device * dev,
++ int chunkInNAND,
++ const __u8 * data,
++ const yaffs_ExtendedTags *
++ tags);
++int yaffs_TagsCompatabilityReadChunkWithTagsFromNAND(yaffs_Device * dev,
++ int chunkInNAND,
++ __u8 * data,
++ yaffs_ExtendedTags *
++ tags);
++int yaffs_TagsCompatabilityMarkNANDBlockBad(struct yaffs_DeviceStruct *dev,
++ int blockNo);
++int yaffs_TagsCompatabilityQueryNANDBlock(struct yaffs_DeviceStruct *dev,
++ int blockNo, yaffs_BlockState *
++ state, int *sequenceNumber);
++
++#endif
+diff -urN linux.old/fs/yaffs2/yaffs_tagsvalidity.c linux.dev/fs/yaffs2/yaffs_tagsvalidity.c
+--- linux.old/fs/yaffs2/yaffs_tagsvalidity.c 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_tagsvalidity.c 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,31 @@
++
++/*
++ * YAFFS: Yet another FFS. A NAND-flash specific file system.
++ *
++ * Copyright (C) 2002 Aleph One Ltd.
++ * for Toby Churchill Ltd and Brightstar Engineering
++ *
++ * Created by Charles Manning <charles@aleph1.co.uk>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * $Id: yaffs_tagsvalidity.c,v 1.2 2005/08/11 02:33:03 marty Exp $
++ */
++
++#include "yaffs_tagsvalidity.h"
++
++void yaffs_InitialiseTags(yaffs_ExtendedTags * tags)
++{
++ memset(tags, 0, sizeof(yaffs_ExtendedTags));
++ tags->validMarker0 = 0xAAAAAAAA;
++ tags->validMarker1 = 0x55555555;
++}
++
++int yaffs_ValidateTags(yaffs_ExtendedTags * tags)
++{
++ return (tags->validMarker0 == 0xAAAAAAAA &&
++ tags->validMarker1 == 0x55555555);
++
++}
+diff -urN linux.old/fs/yaffs2/yaffs_tagsvalidity.h linux.dev/fs/yaffs2/yaffs_tagsvalidity.h
+--- linux.old/fs/yaffs2/yaffs_tagsvalidity.h 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yaffs_tagsvalidity.h 2006-12-14 04:21:47.000000000 +0100
+@@ -0,0 +1,25 @@
++
++/*
++ * YAFFS: Yet another FFS. A NAND-flash specific file system.
++ *
++ * Copyright (C) 2002 Aleph One Ltd.
++ * for Toby Churchill Ltd and Brightstar Engineering
++ *
++ * Created by Charles Manning <charles@aleph1.co.uk>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * $Id: yaffs_tagsvalidity.h,v 1.2 2005/08/11 02:33:03 marty Exp $
++ */
++//yaffs_tagsvalidity.h
++
++#ifndef __YAFFS_TAGS_VALIDITY_H__
++#define __YAFFS_TAGS_VALIDITY_H__
++
++#include "yaffs_guts.h"
++
++void yaffs_InitialiseTags(yaffs_ExtendedTags * tags);
++int yaffs_ValidateTags(yaffs_ExtendedTags * tags);
++#endif
+diff -urN linux.old/fs/yaffs2/yportenv.h linux.dev/fs/yaffs2/yportenv.h
+--- linux.old/fs/yaffs2/yportenv.h 1970-01-01 01:00:00.000000000 +0100
++++ linux.dev/fs/yaffs2/yportenv.h 2006-12-14 04:26:06.000000000 +0100
+@@ -0,0 +1,165 @@
++/*
++ * YAFFS: Yet another FFS. A NAND-flash specific file system.
++ * yportenv.h: Portable services used by yaffs. This is done to allow
++ * simple migration from kernel space into app space for testing.
++ *
++ * Copyright (C) 2002 Aleph One Ltd.
++ * for Toby Churchill Ltd and Brightstar Engineering
++ *
++ * Created by Charles Manning <charles@aleph1.co.uk>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU Lesser General Public License version 2.1 as
++ * published by the Free Software Foundation.
++ *
++ *
++ * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL.
++ *
++ * $Id: yportenv.h,v 1.11 2006/05/21 09:39:12 charles Exp $
++ *
++ */
++
++#ifndef __YPORTENV_H__
++#define __YPORTENV_H__
++
++#if defined CONFIG_YAFFS_WINCE
++
++#include "ywinceenv.h"
++
++#elif defined __KERNEL__
++
++#include "moduleconfig.h"
++
++/* Linux kernel */
++#include <linux/autoconf.h>
++#include <linux/kernel.h>
++#include <linux/version.h>
++#include <linux/mm.h>
++#include <linux/string.h>
++#include <linux/slab.h>
++#include <linux/vmalloc.h>
++
++#define YCHAR char
++#define YUCHAR unsigned char
++#define _Y(x) x
++#define yaffs_strcpy(a,b) strcpy(a,b)
++#define yaffs_strncpy(a,b,c) strncpy(a,b,c)
++#define yaffs_strlen(s) strlen(s)
++#define yaffs_sprintf sprintf
++#define yaffs_toupper(a) toupper(a)
++
++#define Y_INLINE inline
++
++#define YAFFS_LOSTNFOUND_NAME "lost+found"
++#define YAFFS_LOSTNFOUND_PREFIX "obj"
++
++/* #define YPRINTF(x) printk x */
++#define YMALLOC(x) kmalloc(x,GFP_KERNEL)
++#define YFREE(x) kfree(x)
++#define YMALLOC_ALT(x) vmalloc(x)
++#define YFREE_ALT(x) vfree(x)
++#define YMALLOC_DMA(x) YMALLOC(x)
++
++// KR - added for use in scan so processes aren't blocked indefinitely.
++#define YYIELD() schedule()
++
++#define YAFFS_ROOT_MODE 0666
++#define YAFFS_LOSTNFOUND_MODE 0666
++
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
++#define Y_CURRENT_TIME CURRENT_TIME.tv_sec
++#define Y_TIME_CONVERT(x) (x).tv_sec
++#else
++#define Y_CURRENT_TIME CURRENT_TIME
++#define Y_TIME_CONVERT(x) (x)
++#endif
++
++#define yaffs_SumCompare(x,y) ((x) == (y))
++#define yaffs_strcmp(a,b) strcmp(a,b)
++
++#define TENDSTR "\n"
++#define TSTR(x) KERN_WARNING x
++#define TOUT(p) printk p
++
++#elif defined CONFIG_YAFFS_DIRECT
++
++/* Direct interface */
++#include "ydirectenv.h"
++
++#elif defined CONFIG_YAFFS_UTIL
++
++/* Stuff for YAFFS utilities */
++
++#include "stdlib.h"
++#include "stdio.h"
++#include "string.h"
++
++#include "devextras.h"
++
++#define YMALLOC(x) malloc(x)
++#define YFREE(x) free(x)
++#define YMALLOC_ALT(x) malloc(x)
++#define YFREE_ALT(x) free(x)
++
++#define YCHAR char
++#define YUCHAR unsigned char
++#define _Y(x) x
++#define yaffs_strcpy(a,b) strcpy(a,b)
++#define yaffs_strncpy(a,b,c) strncpy(a,b,c)
++#define yaffs_strlen(s) strlen(s)
++#define yaffs_sprintf sprintf
++#define yaffs_toupper(a) toupper(a)
++
++#define Y_INLINE inline
++
++/* #define YINFO(s) YPRINTF(( __FILE__ " %d %s\n",__LINE__,s)) */
++/* #define YALERT(s) YINFO(s) */
++
++#define TENDSTR "\n"
++#define TSTR(x) x
++#define TOUT(p) printf p
++
++#define YAFFS_LOSTNFOUND_NAME "lost+found"
++#define YAFFS_LOSTNFOUND_PREFIX "obj"
++/* #define YPRINTF(x) printf x */
++
++#define YAFFS_ROOT_MODE 0666
++#define YAFFS_LOSTNFOUND_MODE 0666
++
++#define yaffs_SumCompare(x,y) ((x) == (y))
++#define yaffs_strcmp(a,b) strcmp(a,b)
++
++#else
++/* Should have specified a configuration type */
++#error Unknown configuration
++
++#endif
++
++extern unsigned yaffs_traceMask;
++
++#define YAFFS_TRACE_ERROR 0x00000001
++#define YAFFS_TRACE_OS 0x00000002
++#define YAFFS_TRACE_ALLOCATE 0x00000004
++#define YAFFS_TRACE_SCAN 0x00000008
++#define YAFFS_TRACE_BAD_BLOCKS 0x00000010
++#define YAFFS_TRACE_ERASE 0x00000020
++#define YAFFS_TRACE_GC 0x00000040
++#define YAFFS_TRACE_WRITE 0x00000080
++#define YAFFS_TRACE_TRACING 0x00000100
++#define YAFFS_TRACE_DELETION 0x00000200
++#define YAFFS_TRACE_BUFFERS 0x00000400
++#define YAFFS_TRACE_NANDACCESS 0x00000800
++#define YAFFS_TRACE_GC_DETAIL 0x00001000
++#define YAFFS_TRACE_SCAN_DEBUG 0x00002000
++#define YAFFS_TRACE_MTD 0x00004000
++#define YAFFS_TRACE_CHECKPOINT 0x00008000
++#define YAFFS_TRACE_ALWAYS 0x40000000
++#define YAFFS_TRACE_BUG 0x80000000
++
++#define T(mask,p) do{ if((mask) & (yaffs_traceMask | YAFFS_TRACE_ERROR)) TOUT(p);} while(0)
++
++#ifndef CONFIG_YAFFS_WINCE
++#define YBUG() T(YAFFS_TRACE_BUG,(TSTR("==>> yaffs bug: " __FILE__ " %d" TENDSTR),__LINE__))
++#endif
++
++#endif
--- /dev/null
+diff -urN linux-2.6.19.2-old/drivers/usb/serial/airprime.c linux-2.6.19.2-dev/drivers/usb/serial/airprime.c
+--- linux-2.6.19.2-old/drivers/usb/serial/airprime.c 2007-05-01 14:11:28.000000000 -0700
++++ linux-2.6.19.2-dev/drivers/usb/serial/airprime.c 2007-05-01 14:12:03.000000000 -0700
+@@ -20,6 +20,8 @@
+ { USB_DEVICE(0x0c88, 0x17da) }, /* Kyocera Wireless KPC650/Passport */
+ { USB_DEVICE(0x1410, 0x1110) }, /* Novatel Wireless Merlin CDMA */
+ { USB_DEVICE(0x1410, 0x1100) }, /* ExpressCard34 Qualcomm 3G CDMA */
++ { USB_DEVICE(0x1410, 0x1130) }, /* Novatel Wireless S720 CDMA/EV-DO */
++ { USB_DEVICE(0x1410, 0x2110) }, /* Novatel Wireless U720 CDMA/EV-DO */
+ { },
+ };
+ MODULE_DEVICE_TABLE(usb, id_table);
--- /dev/null
+diff -urN linux-2.6.19.old/include/linux/time.h linux-2.6.19.dev/include/linux/time.h
+--- linux-2.6.19.old/include/linux/time.h 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/include/linux/time.h 2006-12-14 03:14:05.000000000 +0100
+@@ -1,6 +1,10 @@
+ #ifndef _LINUX_TIME_H
+ #define _LINUX_TIME_H
+
++#ifndef __KERNEL__
++#include <time.h>
++#else
++
+ #include <linux/types.h>
+
+ #ifdef __KERNEL__
+@@ -223,4 +227,6 @@
+ */
+ #define TIMER_ABSTIME 0x01
+
++#endif /* __KERNEL__ DEBIAN */
++
+ #endif
+diff -urN linux-2.6.19.old/include/linux/types.h linux-2.6.19.dev/include/linux/types.h
+--- linux-2.6.19.old/include/linux/types.h 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/include/linux/types.h 2006-12-14 03:14:05.000000000 +0100
+@@ -1,6 +1,14 @@
+ #ifndef _LINUX_TYPES_H
+ #define _LINUX_TYPES_H
+
++/* Debian: Use userland types instead. */
++#ifndef __KERNEL__
++# include <sys/types.h>
++/* For other kernel headers. */
++# include <linux/posix_types.h>
++# include <asm/types.h>
++#else
++
+ #ifdef __KERNEL__
+
+ #define BITS_TO_LONGS(bits) \
+@@ -156,6 +164,8 @@
+
+ #endif /* __KERNEL_STRICT_NAMES */
+
++#endif /* __KERNEL__ DEBIAN */
++
+ /*
+ * Below are truly Linux-specific types that should never collide with
+ * any application/library that wants linux/types.h.
--- /dev/null
+diff -urN linux-2.6.19.old/include/asm-mips/bitops.h linux-2.6.19.dev/include/asm-mips/bitops.h
+--- linux-2.6.19.old/include/asm-mips/bitops.h 2006-11-29 22:57:37.000000000 +0100
++++ linux-2.6.19.dev/include/asm-mips/bitops.h 2006-12-14 03:14:07.000000000 +0100
+@@ -11,6 +11,7 @@
+
+ #include <linux/compiler.h>
+ #include <linux/types.h>
++#include <asm/war.h>
+ #include <asm/bug.h>
+ #include <asm/byteorder.h> /* sigh ... */
+ #include <asm/cpu-features.h>
--- /dev/null
+diff -urN linux-2.6.19.1/scripts/mod/file2alias.c linux-2.6.19.1.new/scripts/mod/file2alias.c
+--- linux-2.6.19.1/scripts/mod/file2alias.c 2006-12-11 20:32:53.000000000 +0100
++++ linux-2.6.19.1.new/scripts/mod/file2alias.c 2007-01-02 15:28:47.000000000 +0100
+@@ -37,7 +37,21 @@
+ * even potentially has different endianness and word sizes, since
+ * we handle those differences explicitly below */
+ #include "../../include/linux/mod_devicetable.h"
++#ifndef __APPLE__
+ #include "../../include/linux/input.h"
++#else
++#define EV_MAX 0x1f
++#define KEY_MUTE 113
++#define KEY_MIN_INTERESTING KEY_MUTE
++#define KEY_MAX 0x1ff
++#define REL_MAX 0x0f
++#define ABS_MAX 0x3f
++#define MSC_MAX 0x07
++#define LED_MAX 0x0f
++#define SND_MAX 0x07
++#define FF_MAX 0x7f
++#define SW_MAX 0x0f
++#endif
+
+ #define ADD(str, sep, cond, field) \
+ do { \
+diff -urN linux-2.6.19.1/scripts/mod/mk_elfconfig.c linux-2.6.19.1.new/scripts/mod/mk_elfconfig.c
+--- linux-2.6.19.1/scripts/mod/mk_elfconfig.c 2006-12-11 20:32:53.000000000 +0100
++++ linux-2.6.19.1.new/scripts/mod/mk_elfconfig.c 2007-01-02 15:43:57.000000000 +0100
+@@ -1,7 +1,11 @@
+ #include <stdio.h>
+ #include <stdlib.h>
+ #include <string.h>
++#ifndef __APPLE__
+ #include <elf.h>
++#else
++#include "../../../../../tools/sstrip/include/elf.h"
++#endif
+
+ int
+ main(int argc, char **argv)
+diff -urN linux-2.6.19.1/scripts/mod/modpost.h linux-2.6.19.1.new/scripts/mod/modpost.h
+--- linux-2.6.19.1/scripts/mod/modpost.h 2006-12-11 20:32:53.000000000 +0100
++++ linux-2.6.19.1.new/scripts/mod/modpost.h 2007-01-02 15:40:55.000000000 +0100
+@@ -7,7 +7,11 @@
+ #include <sys/mman.h>
+ #include <fcntl.h>
+ #include <unistd.h>
++#ifndef __APPLE__
+ #include <elf.h>
++#else
++#include "../../../../../tools/sstrip/include/elf.h"
++#endif
+
+ #include "elfconfig.h"
+
+diff -urN linux-2.6.19.1/scripts/mod/sumversion.c linux-2.6.19.1.new/scripts/mod/sumversion.c
+--- linux-2.6.19.1/scripts/mod/sumversion.c 2006-12-11 20:32:53.000000000 +0100
++++ linux-2.6.19.1.new/scripts/mod/sumversion.c 2007-01-02 15:30:23.000000000 +0100
+@@ -8,6 +8,9 @@
+ #include <errno.h>
+ #include <string.h>
+ #include "modpost.h"
++#ifdef __APPLE__
++#include <limits.h>
++#endif
+
+ /*
+ * Stolen form Cryptographic API.
+diff -urN linux-2.6.19.1/scripts/kconfig linux-2.6.19.1.new/scripts/kconfig/Makefile
+--- linux-2.6.19.1/scripts/kconfig/Makefile 2007-01-04 17:49:35.000000000 +0100
++++ linux-2.6.19.1.new/scripts/kconfig/Makefile 2007-01-04 17:50:37.000000000 +0100
+@@ -87,6 +87,9 @@
+ # we really need to do so. (Do not call gcc as part of make mrproper)
+ HOST_EXTRACFLAGS = $(shell $(CONFIG_SHELL) $(check-lxdialog) -ccflags)
+ HOST_LOADLIBES = $(shell $(CONFIG_SHELL) $(check-lxdialog) -ldflags $(HOSTCC))
++ifeq ($(shell uname -s),Darwin)
++HOST_LOADLIBES += -lncurses
++endif
+
+ HOST_EXTRACFLAGS += -DLOCALE
+
+diff -urN linux-2.6.19.1/scripts/genksyms/parse.y linux-2.6.19.1.new/scripts/genksyms/parse.y
+--- linux-2.6.19.1/scripts/genksyms/parse.y 2006-12-11 20:32:53.000000000 +0100
++++ linux-2.6.19.1.new/scripts/genksyms/parse.y 2007-01-04 19:20:55.000000000 +0100
+@@ -24,7 +24,9 @@
+ %{
+
+ #include <assert.h>
++#ifndef __APPLE__
+ #include <malloc.h>
++#endif
+ #include "genksyms.h"
+
+ static int is_typedef;
+diff -urN linux-2.6.19.1/scripts/genksyms/parse.c_shipped linux-2.6.19.1.new/scripts/genksyms/parse.c_shipped
+--- linux-2.6.19.1/scripts/genksyms/parse.c_shipped 2007-01-04 19:34:09.000000000 +0100
++++ linux-2.6.19.1.new/scripts/genksyms/parse.c_shipped 2007-01-04 19:34:02.000000000 +0100
+@@ -144,7 +144,9 @@
+
+
+ #include <assert.h>
++#ifndef __APPLE__
+ #include <malloc.h>
++#endif
+ #include "genksyms.h"
+
+ static int is_typedef;
+--- linux-2.6.19.1/scripts/kallsyms.c 2006-12-11 20:32:53.000000000 +0100
++++ linux-2.6.19.1.new/scripts/kallsyms.c 2007-01-04 19:46:38.000000000 +0100
+@@ -30,6 +30,35 @@
+ #include <stdlib.h>
+ #include <string.h>
+ #include <ctype.h>
++#ifdef __APPLE__
++/* Darwin has no memmem implementation, this one is ripped of the uClibc-0.9.28 source */
++void *memmem (const void *haystack, size_t haystack_len,
++ const void *needle, size_t needle_len)
++{
++ const char *begin;
++ const char *const last_possible
++ = (const char *) haystack + haystack_len - needle_len;
++
++ if (needle_len == 0)
++ /* The first occurrence of the empty string is deemed to occur at
++ the beginning of the string. */
++ return (void *) haystack;
++
++ /* Sanity check, otherwise the loop might search through the whole
++ memory. */
++ if (__builtin_expect (haystack_len < needle_len, 0))
++ return NULL;
++
++ for (begin = (const char *) haystack; begin <= last_possible; ++begin)
++ if (begin[0] == ((const char *) needle)[0] &&
++ !memcmp ((const void *) &begin[1],
++ (const void *) ((const char *) needle + 1),
++ needle_len - 1))
++ return (void *) begin;
++
++ return NULL;
++}
++#endif
+
+ #define KSYM_NAME_LEN 127
+
--- /dev/null
+--- linux-2.6.19.2/include/linux/stddef.h.old 2007-02-14 03:34:54.861805424 +0100
++++ linux-2.6.19.2/include/linux/stddef.h 2007-02-14 03:35:06.331061832 +0100
+@@ -16,6 +16,7 @@
+ false = 0,
+ true = 1
+ };
++#endif /* __KERNEL__ */
+
+ #undef offsetof
+ #ifdef __compiler_offsetof
+@@ -23,6 +24,5 @@
+ #else
+ #define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
+ #endif
+-#endif /* __KERNEL__ */
+
+ #endif
--- /dev/null
+diff -urN linux-2.6.19.2/scripts/gen_initramfs_list.sh linux-2.6.19.2.new/scripts/gen_initramfs_list.sh
+--- linux-2.6.19.2/scripts/gen_initramfs_list.sh 2007-01-10 20:10:37.000000000 +0100
++++ linux-2.6.19.2.new/scripts/gen_initramfs_list.sh 2007-05-03 16:25:06.000000000 +0200
+@@ -120,9 +120,9 @@
+ ;;
+ "nod")
+ local dev_type=
+- local maj=$(LC_ALL=C ls -l "${location}" | \
++ local maj=$(LC_ALL=C ls --time-style=locale -l "${location}" | \
+ gawk '{sub(/,/, "", $5); print $5}')
+- local min=$(LC_ALL=C ls -l "${location}" | \
++ local min=$(LC_ALL=C ls --time-style=locale -l "${location}" | \
+ gawk '{print $6}')
+
+ if [ -b "${location}" ]; then
+@@ -133,7 +133,7 @@
+ str="${ftype} ${name} ${str} ${dev_type} ${maj} ${min}"
+ ;;
+ "slink")
+- local target=$(LC_ALL=C ls -l "${location}" | \
++ local target=$(LC_ALL=C ls --time-style=locale -l "${location}" | \
+ gawk '{print $11}')
+ str="${ftype} ${name} ${target} ${str}"
+ ;;
config LARGEFILE
bool
prompt "Enable large file (files > 2 GB) support?" if TOOLCHAINOPTS
- depends on !cris
default y
help
Enable large file (files > 2 GB) support
PKG_BUILD_DIR:=$(TOOLCHAIN_BUILD_DIR)/linux-$(PKG_VERSION)
+LINUX_DIR:=$(PKG_BUILD_DIR)/linux-$(LINUX_VERSION)
+KERNEL_BUILD_DIR:=$(PKG_BUILD_DIR)
+include $(INCLUDE_DIR)/kernel-defaults.mk
+
include $(INCLUDE_DIR)/host-build.mk
-define Build/Prepare
+define Build/Prepare/cris
mkdir -p $(TOOLCHAIN_BUILD_DIR)
bzcat $(DL_DIR)/$(PKG_SOURCE) | $(HOST_TAR) -C $(TOOLCHAIN_BUILD_DIR) $(TAR_OPTIONS)
- $(PATCH) $(PKG_BUILD_DIR) $(TOPDIR)/target/linux/generic-$(KERNEL)/patches
+ $(PATCH) $(PKG_BUILD_DIR) $(TOPDIR)/target/linux/etrax-2.6/patches/generic_2.6
+ $(PATCH) $(PKG_BUILD_DIR) $(TOPDIR)/target/linux/etrax-2.6/patches/cris
+ ln -sf $(PKG_BUILD_DIR)/include/asm-cris/arch-v10 $(PKG_BUILD_DIR)/include/asm-cris/arch
+ ln -sf $(PKG_BUILD_DIR)/arch/cris/arch-v10 $(PKG_BUILD_DIR)/arch/cris/arch
$(SED) 's/@expr length/@-expr length/' $(PKG_BUILD_DIR)/Makefile
ln -sf $(PKG_BUILD_DIR) $(LINUX_HEADERS_DIR)
endef
+ifdef Build/Prepare/$(ARCH)
+define Build/Prepare
+ $(call Build/Prepare/$(ARCH))
+endef
+else
+define Build/Prepare
+ $(call Kernel/Prepare/Default)
+endef
+endif
+
define Build/Configure/powerpc
$(CP) $(PKG_BUILD_DIR)/include/asm-ppc/* $(PKG_BUILD_DIR)/include/asm-powerpc/
rm -rf $(PKG_BUILD_DIR)/include/asm-ppc
--- /dev/null
+#
+# Automatically generated make config: don't edit
+#
+# TARGET_alpha is not set
+# TARGET_arm is not set
+# TARGET_bfin is not set
+TARGET_cris=y
+# TARGET_e1 is not set
+# TARGET_frv is not set
+# TARGET_h8300 is not set
+# TARGET_i386 is not set
+# TARGET_i960 is not set
+# TARGET_m68k is not set
+# TARGET_microblaze is not set
+# TARGET_mips is not set
+# TARGET_nios is not set
+# TARGET_nios2 is not set
+# TARGET_powerpc is not set
+# TARGET_sh is not set
+# TARGET_sh64 is not set
+# TARGET_sparc is not set
+# TARGET_v850 is not set
+# TARGET_x86_64 is not set
+
+#
+# Target Architecture Features and Options
+#
+HAVE_ELF=y
+ARCH_SUPPORTS_LITTLE_ENDIAN=y
+TARGET_ARCH="cris"
+CONFIG_CRIS=y
+ARCH_LITTLE_ENDIAN=y
+# ARCH_BIG_ENDIAN is not set
+# ARCH_HAS_NO_MMU is not set
+ARCH_HAS_MMU=y
+UCLIBC_HAS_FLOATS=y
+# HAS_FPU is not set
+UCLIBC_HAS_SOFT_FLOAT=y
+# DO_C99_MATH is not set
+KERNEL_SOURCE="/raid/trunk/toolchain_build_cris/linux"
+C_SYMBOL_PREFIX=""
+HAVE_DOT_CONFIG=y
+
+#
+# General Library Settings
+#
+# HAVE_NO_PIC is not set
+DOPIC=y
+# HAVE_NO_SHARED is not set
+HAVE_SHARED=y
+# ARCH_HAS_NO_LDSO is not set
+BUILD_UCLIBC_LDSO=y
+# FORCE_SHAREABLE_TEXT_SEGMENTS is not set
+LDSO_LDD_SUPPORT=y
+LDSO_CACHE_SUPPORT=y
+# LDSO_PRELOAD_FILE_SUPPORT is not set
+LDSO_BASE_FILENAME="ld.so"
+# LDSO_RUNPATH is not set
+# DL_FINI_CRT_COMPAT is not set
+# UCLIBC_CTOR_DTOR is not set
+# HAS_NO_THREADS is not set
+UCLIBC_HAS_THREADS=y
+# PTHREADS_DEBUG_SUPPORT is not set
+UCLIBC_HAS_LFS=y
+# UCLIBC_STATIC_LDCONFIG is not set
+# MALLOC is not set
+# MALLOC_SIMPLE is not set
+MALLOC_STANDARD=y
+MALLOC_GLIBC_COMPAT=y
+UCLIBC_DYNAMIC_ATEXIT=y
+HAS_SHADOW=y
+# UNIX98PTY_ONLY is not set
+ASSUME_DEVPTS=y
+UCLIBC_HAS_TM_EXTENSIONS=y
+UCLIBC_HAS_TZ_CACHING=y
+UCLIBC_HAS_TZ_FILE=y
+UCLIBC_HAS_TZ_FILE_READ_MANY=y
+UCLIBC_TZ_FILE_PATH="/etc/TZ"
+
+#
+# Networking Support
+#
+UCLIBC_HAS_IPV6=y
+UCLIBC_HAS_RPC=y
+UCLIBC_HAS_FULL_RPC=y
+
+#
+# String and Stdio Support
+#
+UCLIBC_HAS_STRING_GENERIC_OPT=y
+UCLIBC_HAS_STRING_ARCH_OPT=y
+UCLIBC_HAS_CTYPE_TABLES=y
+UCLIBC_HAS_CTYPE_SIGNED=y
+# UCLIBC_HAS_CTYPE_UNSAFE is not set
+UCLIBC_HAS_CTYPE_CHECKED=y
+# UCLIBC_HAS_CTYPE_ENFORCED is not set
+UCLIBC_HAS_WCHAR=y
+# UCLIBC_HAS_LOCALE is not set
+UCLIBC_HAS_HEXADECIMAL_FLOATS=y
+UCLIBC_HAS_GLIBC_CUSTOM_PRINTF=y
+UCLIBC_PRINTF_SCANF_POSITIONAL_ARGS=9
+UCLIBC_HAS_SCANF_GLIBC_A_FLAG=y
+# UCLIBC_HAS_STDIO_BUFSIZ_NONE is not set
+# UCLIBC_HAS_STDIO_BUFSIZ_256 is not set
+# UCLIBC_HAS_STDIO_BUFSIZ_512 is not set
+# UCLIBC_HAS_STDIO_BUFSIZ_1024 is not set
+# UCLIBC_HAS_STDIO_BUFSIZ_2048 is not set
+UCLIBC_HAS_STDIO_BUFSIZ_4096=y
+# UCLIBC_HAS_STDIO_BUFSIZ_8192 is not set
+UCLIBC_HAS_STDIO_BUILTIN_BUFFER_NONE=y
+# UCLIBC_HAS_STDIO_BUILTIN_BUFFER_4 is not set
+# UCLIBC_HAS_STDIO_BUILTIN_BUFFER_8 is not set
+# UCLIBC_HAS_STDIO_SHUTDOWN_ON_ABORT is not set
+UCLIBC_HAS_STDIO_GETC_MACRO=y
+UCLIBC_HAS_STDIO_PUTC_MACRO=y
+UCLIBC_HAS_STDIO_AUTO_RW_TRANSITION=y
+# UCLIBC_HAS_FOPEN_LARGEFILE_MODE is not set
+UCLIBC_HAS_FOPEN_EXCLUSIVE_MODE=y
+UCLIBC_HAS_GLIBC_CUSTOM_STREAMS=y
+UCLIBC_HAS_PRINTF_M_SPEC=y
+UCLIBC_HAS_ERRNO_MESSAGES=y
+# UCLIBC_HAS_SYS_ERRLIST is not set
+UCLIBC_HAS_SIGNUM_MESSAGES=y
+# UCLIBC_HAS_SYS_SIGLIST is not set
+UCLIBC_HAS_GNU_GETOPT=y
+
+#
+# Big and Tall
+#
+UCLIBC_HAS_REGEX=y
+UCLIBC_HAS_WORDEXP=y
+UCLIBC_HAS_FTW=y
+UCLIBC_HAS_GLOB=y
+
+#
+# Library Installation Options
+#
+SHARED_LIB_LOADER_PREFIX="/lib"
+RUNTIME_PREFIX="/"
+DEVEL_PREFIX="/usr/"
+
+#
+# uClibc security related options
+#
+# UCLIBC_SECURITY is not set
+
+#
+# uClibc development/debugging options
+#
+CROSS_COMPILER_PREFIX=""
+# DODEBUG is not set
+# DODEBUG_PT is not set
+# DOASSERTS is not set
+# SUPPORT_LD_DEBUG is not set
+# SUPPORT_LD_DEBUG_EARLY is not set
+WARNINGS="-Wall"
+# UCLIBC_MJN3_ONLY is not set
--- /dev/null
+diff -urN uClibc-0.9.28.2.orig/libc/sysdeps/linux/cris/bits/syscalls.h uClibc-0.9.28.2/libc/sysdeps/linux/cris/bits/syscalls.h
+--- uClibc-0.9.28.2.orig/libc/sysdeps/linux/cris/bits/syscalls.h 2007-05-15 19:45:43.000000000 +0200
++++ uClibc-0.9.28.2/libc/sysdeps/linux/cris/bits/syscalls.h 2007-05-15 19:47:20.000000000 +0200
+@@ -62,6 +62,30 @@
+ return (type) (INLINE_SYSCALL(name, 5, arg1, arg2, arg3, arg4, arg5)); \
+ }
+
++#define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \
++ type5,arg5,type6,arg6) \
++type name (type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5,type6 arg6) \
++{ \
++ register long __a __asm__ ("r10") = (long) arg1; \
++ register long __b __asm__ ("r11") = (long) arg2; \
++ register long __c __asm__ ("r12") = (long) arg3; \
++ register long __d __asm__ ("r13") = (long) arg4; \
++ register long __n_ __asm__ ("r9") = (__NR_##name); \
++ __asm__ __volatile__ (".ifnc %0%1%3%4%5,$r10$r9$r11$r12$r13\n\t" \
++ ".err\n\t" \
++ ".endif\n\t" \
++ "move %6,$mof\n\tmove %7,$srp\n\t" \
++ "break 13" \
++ : "=r" (__a) \
++ : "r" (__n_), "0" (__a), "r" (__b), \
++ "r" (__c), "r" (__d), "g" (arg5), "g" (arg6)\
++ : "srp"); \
++ if (__a >= 0) \
++ return (type) __a; \
++ __set_errno ( -__a); \
++ return (type) -1; \
++}
++
+ #undef INLINE_SYSCALL
+ #define INLINE_SYSCALL(name, nr, args...) \
+ ({ \
--- /dev/null
+diff -urN uClibc-0.9.28.2.orig/ldso/include/dl-syscall.h uClibc-0.9.28.2/ldso/include/dl-syscall.h
+--- uClibc-0.9.28.2.orig/ldso/include/dl-syscall.h 2007-05-22 20:39:28.000000000 +0200
++++ uClibc-0.9.28.2/ldso/include/dl-syscall.h 2007-05-22 20:41:30.000000000 +0200
+@@ -155,8 +155,9 @@
+ static inline void * _dl_mmap(void * addr, unsigned long size, int prot,
+ int flags, int fd, unsigned long offset)
+ {
+- if (offset & ((1 << MMAP2_PAGE_SHIFT) - 1))
++ if (offset & ((1 << MMAP2_PAGE_SHIFT) - 1)){
+ return MAP_FAILED;
++ }
+ return __syscall_mmap2(addr, size, prot, flags,
+ fd, (off_t) (offset >> MMAP2_PAGE_SHIFT));
+ }
+diff -urN uClibc-0.9.28.2.orig/libc/sysdeps/linux/cris/bits/uClibc_page.h uClibc-0.9.28.2/libc/sysdeps/linux/cris/bits/uClibc_page.h
+--- uClibc-0.9.28.2.orig/libc/sysdeps/linux/cris/bits/uClibc_page.h 2007-05-22 20:39:28.000000000 +0200
++++ uClibc-0.9.28.2/libc/sysdeps/linux/cris/bits/uClibc_page.h 2007-05-22 20:42:25.000000000 +0200
+@@ -24,5 +24,5 @@
+ #define PAGE_SHIFT 13
+ #define PAGE_SIZE (1UL << PAGE_SHIFT)
+ #define PAGE_MASK (~(PAGE_SIZE-1))
+-
++#define MMAP2_PAGE_SHIFT PAGE_SHIFT
+ #endif /* _UCLIBC_PAGE_H */
--- /dev/null
+diff -urN uClibc-0.9.28.2.orig/libc/sysdeps/linux/cris/crt0.c uClibc-0.9.28.2/libc/sysdeps/linux/cris/crt0.c
+--- uClibc-0.9.28.2.orig/libc/sysdeps/linux/cris/crt0.c 2007-05-18 00:27:56.000000000 +0200
++++ uClibc-0.9.28.2/libc/sysdeps/linux/cris/crt0.c 2007-05-18 00:32:08.000000000 +0200
+@@ -31,11 +31,10 @@
+
+ #include <features.h>
+
+-extern void __uClibc_main(int argc, char **argv, char **envp)
+- __attribute__ ((__noreturn__));
+-extern void __uClibc_start_main(int argc, char **argv, char **envp,
+- void (*app_init)(void), void (*app_fini)(void))
+- __attribute__ ((__noreturn__));
++extern void __uClibc_main(int (*main)(int, char **, char **), int argc,
++ char **argv, void (*app_init)(void), void (*app_fini)(void),
++ void (*rtld_fini)(void), void *stack_end) __attribute__ ((__noreturn__));
++
+ extern void weak_function _init(void);
+ extern void weak_function _fini(void);
+
+@@ -64,10 +63,5 @@
+ */
+ --environ;
+
+-#if defined L_crt0 || ! defined __UCLIBC_CTOR_DTOR__
+- /* Leave control to the libc */
+- __uClibc_main(argc, argv, environ);
+-#else
+- __uClibc_start_main(argc, argv, environ, _init, _fini);
+-#endif
++ __uClibc_main(__mainp, argc, argv, 0, 0, 0, 0);
+ }
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