ramips: fix some clocks in mt7621.dtsi
authorWeijie Gao <hackpascal@gmail.com>
Sun, 18 Nov 2018 16:07:01 +0000 (00:07 +0800)
committerJohn Crispin <john@phrozen.org>
Mon, 26 Nov 2018 11:13:52 +0000 (12:13 +0100)
As the cpu clock calculation has been fixed, the clock for gic and spi
should be also fixed.

Signed-off-by: Weijie Gao <hackpascal@gmail.com>
target/linux/ramips/dts/mt7621.dtsi

index 89f3f6f..3c610e4 100644 (file)
                clock-output-names = "cpu", "bus";
        };
 
-       cpuclock: cpuclock {
-               #clock-cells = <0>;
-               compatible = "fixed-clock";
-
-               /* FIXME: there should be way to detect this */
-               clock-frequency = <880000000>;
-       };
-
        sysclock: sysclock {
                #clock-cells = <0>;
                compatible = "fixed-clock";
                        compatible = "ns16550a";
                        reg = <0xc00 0x100>;
 
-                       clocks = <&sysclock>;
                        clock-frequency = <50000000>;
 
                        interrupt-parent = <&gic>;
                        compatible = "ralink,mt7621-spi";
                        reg = <0xb00 0x100>;
 
-                       clocks = <&sysclock>;
+                       clocks = <&pll MT7621_CLK_BUS>;
 
                        resets = <&rstctrl 18>;
                        reset-names = "spi";
                timer {
                        compatible = "mti,gic-timer";
                        interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
-                       clocks = <&cpuclock>;
+                       clocks = <&pll MT7621_CLK_CPU>;
                };
        };