ralink: fix the 10mbit bug on mt7621

a missing "val =" caused the AN bit in the phy0 reg to be flushed.

Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 43246

diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620a.c b/target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620a.c
index 58c209857ee15d17fb40e0109155b8f8d026aba2..df85929d6de0ce0105382165afbbace404dd92eb 100644 (file)
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620a.c
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620a.c
@@ -596,7 +596,7 @@ static void gsw_hw_init_mt7621(struct mt7620_gsw *gsw, struct device_node *np)
 
        /* turn off all PHYs */
        for (i = 0; i <= 4; i++) {
 
        /* turn off all PHYs */
        for (i = 0; i <= 4; i++) {

-               _mt7620_mii_read(gsw, i, 0x0);
+               val = _mt7620_mii_read(gsw, i, 0x0);

                val |= (0x1 << 11);
                _mt7620_mii_write(gsw, i, 0x0, val);
        }
                val |= (0x1 << 11);
                _mt7620_mii_write(gsw, i, 0x0, val);
        }