target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi

   1 /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
   2  * Copyright (c) 2018, David Bauer <mail@david-bauer.net>
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  *
  16  */
  17
  18 #include "qcom-ipq4019.dtsi"
  19 #include <dt-bindings/gpio/gpio.h>
  20 #include <dt-bindings/input/input.h>
  21 #include <dt-bindings/soc/qcom,tcsr.h>
  22
  23 / {
  24         model = "Netgear EX61X0v2";
  25         compatible = "netgear,ex61x0v2", "qcom,ipq4019";
  26
  27         soc {
  28                 mdio@90000 {
  29                         status = "okay";
  30                 };
  31
  32                 ess-psgmii@98000 {
  33                         status = "okay";
  34                 };
  35
  36                 tcsr@1949000 {
  37                         compatible = "qcom,tcsr";
  38                         reg = <0x1949000 0x100>;
  39                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  40                 };
  41
  42                 ess_tcsr@1953000 {
  43                         compatible = "qcom,tcsr";
  44                         reg = <0x1953000 0x1000>;
  45                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  46                 };
  47
  48                 tcsr@1957000 {
  49                         compatible = "qcom,tcsr";
  50                         reg = <0x1957000 0x100>;
  51                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  52                 };
  53
  54                 crypto@8e3a000 {
  55                         status = "okay";
  56                 };
  57
  58                 watchdog@b017000 {
  59                         status = "okay";
  60                 };
  61
  62                 ess-switch@c000000 {
  63                         status = "okay";
  64                 };
  65
  66                 edma@c080000 {
  67                         status = "okay";
  68                         qcom,num_gmac = <1>;
  69                 };
  70         };
  71
  72         aliases {
  73                 led-boot = &power_amber;
  74                 led-failsafe = &power_amber;
  75                 led-running = &power_green;
  76                 led-upgrade = &power_amber;
  77         };
  78
  79         gpio-keys {
  80                 compatible = "gpio-keys";
  81
  82                 wps {
  83                         label = "wps";
  84                         gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;
  85                         linux,code = <KEY_WPS_BUTTON>;
  86                 };
  87
  88                 reset {
  89                         label = "reset";
  90                         gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  91                         linux,code = <KEY_RESTART>;
  92                 };
  93         };
  94
  95         led_spi {
  96                 compatible = "spi-gpio";
  97                 #address-cells = <1>;
  98                 #size-cells = <0>;
  99
 100                 gpio-sck = <&tlmm 5 GPIO_ACTIVE_HIGH>;
 101                 gpio-mosi = <&tlmm 4 GPIO_ACTIVE_HIGH>;
 102                 num-chipselects = <0>;
 103
 104                 led_gpio: led_gpio@0 {
 105                         compatible = "fairchild,74hc595";
 106                         reg = <0>;
 107                         gpio-controller;
 108                         #gpio-cells = <2>;
 109                         registers-number = <1>;
 110                         spi-max-frequency = <1000000>;
 111                 };
 112         };
 113
 114         gpio-leds {
 115                 compatible = "gpio-leds";
 116
 117                 power_amber: power_amber {
 118                         label = "ex61x0v2:amber:power";
 119                         gpios = <&led_gpio 7 GPIO_ACTIVE_LOW>;
 120                 };
 121
 122                 power_green: power_green {
 123                         label = "ex61x0v2:green:power";
 124                         gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
 125                 };
 126
 127                 right {
 128                         label = "ex61x0v2:blue:right";
 129                         gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>;
 130                 };
 131
 132                 left {
 133                         label = "ex61x0v2:blue:left";
 134                         gpios = <&led_gpio 4 GPIO_ACTIVE_LOW>;
 135                 };
 136
 137                 client_green {
 138                         label = "ex61x0v2:green:client";
 139                         gpios = <&led_gpio 3 GPIO_ACTIVE_LOW>;
 140                 };
 141
 142                 client_red {
 143                         label = "ex61x0v2:red:client";
 144                         gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>;
 145                 };
 146
 147                 router_green {
 148                         label = "ex61x0v2:green:router";
 149                         gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>;
 150                 };
 151
 152                 router_red {
 153                         label = "ex61x0v2:red:router";
 154                         gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>;
 155                 };
 156
 157                 wps {
 158                         label = "ex61x0v2:green:wps";
 159                         gpios = <&tlmm 1 GPIO_ACTIVE_LOW>;
 160                 };
 161         };
 162 };
 163
 164 &tlmm {
 165         serial_pins: serial_pinmux {
 166                 mux {
 167                         pins = "gpio60", "gpio61";
 168                         function = "blsp_uart0";
 169                         bias-disable;
 170                 };
 171         };
 172
 173         spi_0_pins: spi_0_pinmux {
 174                 pin {
 175                         function = "blsp_spi0";
 176                         pins = "gpio55", "gpio56", "gpio57";
 177                         drive-strength = <12>;
 178                         bias-disable;
 179                 };
 180                 pin_cs {
 181                         function = "gpio";
 182                         pins = "gpio54";
 183                         drive-strength = <2>;
 184                         bias-disable;
 185                         output-high;
 186                 };
 187         };
 188 };
 189
 190 &blsp1_spi1 {
 191         pinctrl-0 = <&spi_0_pins>;
 192         pinctrl-names = "default";
 193         status = "okay";
 194         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
 195
 196         mx25l12805d@0 {
 197                 compatible = "jedec,spi-nor";
 198                 reg = <0>;
 199                 spi-max-frequency = <24000000>;
 200
 201                 partitions {
 202                         compatible = "fixed-partitions";
 203                         #address-cells = <1>;
 204                         #size-cells = <1>;
 205
 206                         partition0@0 {
 207                                 label = "SBL1";
 208                                 reg = <0x00000000 0x00040000>;
 209                                 read-only;
 210                         };
 211
 212                         partition1@40000 {
 213                                 label = "MIBIB";
 214                                 reg = <0x00040000 0x00020000>;
 215                                 read-only;
 216                         };
 217
 218                         partition2@60000 {
 219                                 label = "QSEE";
 220                                 reg = <0x00060000 0x00060000>;
 221                                 read-only;
 222                         };
 223
 224                         partition3@c0000 {
 225                                 label = "CDT";
 226                                 reg = <0x000c0000 0x00010000>;
 227                                 read-only;
 228                         };
 229
 230                         partition4@d0000 {
 231                                 label = "DDRPARAMS";
 232                                 reg = <0x000d0000 0x00010000>;
 233                                 read-only;
 234                         };
 235
 236                         partition5@E0000 {
 237                                 label = "APPSBLENV";
 238                                 reg = <0x000e0000 0x00010000>;
 239                                 read-only;
 240                         };
 241
 242                         partition6@F0000 {
 243                                 label = "APPSBL";
 244                                 reg = <0x000f0000 0x00080000>;
 245                                 read-only;
 246                         };
 247
 248                         partition7@170000 {
 249                                 label = "ART";
 250                                 reg = <0x00170000 0x00010000>;
 251                                 read-only;
 252                         };
 253
 254                         partition8@180000 {
 255                                 label = "config";
 256                                 reg = <0x00180000 0x00010000>;
 257                                 read-only;
 258                         };
 259
 260                         partition9@190000 {
 261                                 label = "pot";
 262                                 reg = <0x00190000 0x00010000>;
 263                                 read-only;
 264                         };
 265
 266                         partition10@1a0000 {
 267                                 label = "dnidata";
 268                                 reg = <0x001a0000 0x00010000>;
 269                                 read-only;
 270                         };
 271
 272                         partition11@1b0000 {
 273                                 compatible = "denx,fit";
 274                                 label = "firmware";
 275                                 reg = <0x001b0000 0x00e10000>;
 276                         };
 277
 278                         partition12@fc0000 {
 279                                 label = "language";
 280                                 reg = <0x00fc0000 0x00040000>;
 281                                 read-only;
 282                         };
 283                 };
 284         };
 285 };
 286
 287 &blsp1_uart1 {
 288         pinctrl-0 = <&serial_pins>;
 289         pinctrl-names = "default";
 290         status = "okay";
 291 };
 292
 293 &blsp_dma {
 294         status = "okay";
 295 };
 296
 297 &cryptobam {
 298         status = "okay";
 299 };
 300
 301 &wifi0 {
 302         status = "okay";
 303 };
 304
 305 &wifi1 {
 306         status = "okay";
 307 };