target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4029-mr33.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for Meraki MR33 (Stinkbug)
   4  *
   5  * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
   6  * Copyright (C) 2017 Christian Lamparter <chunkeey@googlemail.com>
   7  *
   8  * Based on Cisco Meraki DTS from GPL release r25-linux-3.14-20170427
   9  *
  10  * This file is licensed under the terms of the GNU General Public
  11  * License version 2.  This program is licensed "as is" without
  12  * any warranty of any kind, whether express or implied.
  13  */
  14
  15 #include "qcom-ipq4019.dtsi"
  16 #include <dt-bindings/gpio/gpio.h>
  17 #include <dt-bindings/input/input.h>
  18 #include <dt-bindings/soc/qcom,tcsr.h>
  19
  20 / {
  21         model = "Meraki MR33 Access Point";
  22         compatible = "meraki,mr33", "qcom,ipq4019";
  23
  24         aliases {
  25                 led-boot = &status_green;
  26                 led-failsafe = &status_red;
  27                 led-running = &status_green;
  28                 led-upgrade = &power_orange;
  29         };
  30
  31         /* Do we really need this defined? */
  32         memory {
  33                 device_type = "memory";
  34                 reg = <0x80000000 0x10000000>;
  35         };
  36
  37         soc {
  38                 mdio@90000 {
  39                         status = "okay";
  40                         pinctrl-0 = <&mdio_pins>;
  41                         pinctrl-names = "default";
  42                         /delete-node/ ethernet-phy@0;
  43                         /delete-node/ ethernet-phy@2;
  44                         /delete-node/ ethernet-phy@3;
  45                         /delete-node/ ethernet-phy@4;
  46                 };
  47
  48                 /* It is a 56-bit counter that supplies the count to the ARM arch
  49                    timers and without upstream driver */
  50                 counter@4a1000 {
  51                         compatible = "qcom,qca-gcnt";
  52                         reg = <0x4a1000 0x4>;
  53                 };
  54
  55                 ess_tcsr@1953000 {
  56                         compatible = "qcom,tcsr";
  57                         reg = <0x1953000 0x1000>;
  58                         qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
  59                 };
  60
  61                 tcsr@1949000 {
  62                         compatible = "qcom,tcsr";
  63                         reg = <0x1949000 0x100>;
  64                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  65                 };
  66
  67                 tcsr@1957000 {
  68                         compatible = "qcom,tcsr";
  69                         reg = <0x1957000 0x100>;
  70                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  71                 };
  72
  73                 serial@78b0000 {
  74                         pinctrl-0 = <&serial_1_pins>;
  75                         pinctrl-names = "default";
  76                         status = "okay";
  77
  78                         bluetooth {
  79                                 compatible = "ti,cc2650";
  80                                 enable-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
  81                         };
  82                 };
  83
  84                 crypto@8e3a000 {
  85                         status = "okay";
  86                 };
  87
  88                 watchdog@b017000 {
  89                         status = "okay";
  90                 };
  91
  92                 ess-switch@c000000 {
  93                         switch_mac_mode = <0x3>; /* mac mode for RGMII RMII */
  94                         switch_lan_bmp = <0x0>; /* lan port bitmap */
  95                         switch_wan_bmp = <0x10>; /* wan port bitmap */
  96                 };
  97
  98                 edma@c080000 {
  99                         qcom,single-phy;
 100                         qcom,num_gmac = <1>;
 101                         phy-mode = "rgmii-rxid";
 102                         status = "okay";
 103                 };
 104         };
 105
 106         keys {
 107                 compatible = "gpio-keys";
 108
 109                 reset {
 110                         label = "reset";
 111                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
 112                         linux,code = <KEY_RESTART>;
 113                 };
 114         };
 115
 116         leds {
 117                 compatible = "gpio-leds";
 118
 119                 power_orange: power {
 120                         label = "mr33:orange:power";
 121                         gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
 122                         panic-indicator;
 123                 };
 124         };
 125 };
 126
 127 &blsp_dma {
 128         status = "okay";
 129 };
 130
 131 &blsp1_uart1 {
 132         pinctrl-0 = <&serial_0_pins>;
 133         pinctrl-names = "default";
 134         status = "okay";
 135 };
 136
 137 &cryptobam {
 138         status = "okay";
 139 };
 140
 141 &gmac0 {
 142         qcom,phy_mdio_addr = <1>;
 143         qcom,poll_required = <1>;
 144         vlan_tag = <0 0x20>;
 145 };
 146
 147 &blsp1_i2c3{
 148         pinctrl-0 = <&i2c_0_pins>;
 149         pinctrl-names = "default";
 150         status = "okay";
 151         at24@50 {
 152                 compatible = "atmel,24c64";
 153                 pagesize = <32>;
 154                 reg = <0x50>;
 155                 read-only; /* This holds our MAC & Meraki board-data */
 156         };
 157 };
 158
 159 &blsp1_i2c4{
 160         pinctrl-0 = <&i2c_1_pins>;
 161         pinctrl-names = "default";
 162         status = "okay";
 163
 164         led-controller@30 {
 165                 compatible = "ti,lp5562";
 166                 reg = <0x30>;
 167                 clock-mode = /bits/8 <2>;
 168                 enable-gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>;
 169
 170                 /* RGB led */
 171                 status_red: chan0 {
 172                         chan-name = "mr33:red:status";
 173                         led-cur = /bits/ 8 <0x20>;
 174                         max-cur = /bits/ 8 <0x60>;
 175                 };
 176
 177                 status_green: chan1 {
 178                         chan-name = "mr33:green:status";
 179                         led-cur = /bits/ 8 <0x20>;
 180                         max-cur = /bits/ 8 <0x60>;
 181                 };
 182
 183                 chan2 {
 184                         chan-name = "mr33:blue:status";
 185                         led-cur = /bits/ 8 <0x20>;
 186                         max-cur = /bits/ 8 <0x60>;
 187                 };
 188
 189                 chan3 {
 190                         chan-name = "mr33:white:status";
 191                         led-cur = /bits/ 8 <0x20>;
 192                         max-cur = /bits/ 8 <0x60>;
 193                 };
 194         };
 195 };
 196
 197 &nand {
 198         pinctrl-0 = <&nand_pins>;
 199         pinctrl-names = "default";
 200         status = "okay";
 201
 202         nand@0 {
 203                 partitions {
 204                         compatible = "fixed-partitions";
 205                         #address-cells = <1>;
 206                         #size-cells = <1>;
 207
 208                         partition@0 {
 209                                 label = "sbl1";
 210                                 reg = <0x000000000000 0x000000100000>;
 211                                 read-only;
 212                         };
 213                         partition@1 {
 214                                 label = "mibib";
 215                                 reg = <0x000000100000 0x000000100000>;
 216                                 read-only;
 217                         };
 218                         partition@2 {
 219                                 label = "bootconfig";
 220                                 reg = <0x000000200000 0x000000100000>;
 221                                 read-only;
 222                         };
 223                         partition@3 {
 224                                 label = "qsee";
 225                                 reg = <0x000000300000 0x000000100000>;
 226                                 read-only;
 227                         };
 228                         partition@4 {
 229                                 label = "qsee_alt";
 230                                 reg = <0x000000400000 0x000000100000>;
 231                                 read-only;
 232                         };
 233                         partition@5 {
 234                                 label = "cdt";
 235                                 reg = <0x000000500000 0x000000080000>;
 236                                 read-only;
 237                         };
 238                         partition@6 {
 239                                 label = "cdt_alt";
 240                                 reg = <0x000000580000 0x000000080000>;
 241                                 read-only;
 242                         };
 243                         partition@7 {
 244                                 label = "ddrparams";
 245                                 reg = <0x000000600000 0x000000080000>;
 246                                 read-only;
 247                         };
 248                         partition@8 {
 249                                 label = "u-boot";
 250                                 reg = <0x000000700000 0x000000200000>;
 251                                 read-only;
 252                         };
 253                         partition@9 {
 254                                 label = "u-boot-backup";
 255                                 reg = <0x000000900000 0x000000200000>;
 256                                 read-only;
 257                         };
 258                         partition@10 {
 259                                 label = "ART";
 260                                 reg = <0x000000b00000 0x000000080000>;
 261                                 read-only;
 262                         };
 263                         partition@11 {
 264                                 label = "ubi";
 265                                 reg = <0x000000c00000 0x000007000000>;
 266                         };
 267                 };
 268         };
 269 };
 270
 271 &pcie0 {
 272         status = "okay";
 273         perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
 274         wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
 275
 276         bridge@0,0 {
 277                 reg = <0x00000000 0 0 0 0>;
 278                 #address-cells = <3>;
 279                 #size-cells = <2>;
 280                 ranges;
 281
 282                 wifi2: wifi@0,0 {
 283                         compatible = "qcom,ath10k";
 284                         status = "okay";
 285                         reg = <0x00010000 0 0 0 0>;
 286                 };
 287         };
 288 };
 289
 290 &qpic_bam {
 291         status = "okay";
 292 };
 293
 294 &tlmm {
 295         /*
 296          * GPIO43 should be 0/1 whenever the unit is
 297          * powered through PoE or AC-Adapter.
 298          * That said, playing with this seems to
 299          * reset the AP.
 300          */
 301
 302         mdio_pins: mdio_pinmux {
 303                 mux_1 {
 304                         pins = "gpio6";
 305                         function = "mdio";
 306                         bias-pull-up;
 307                 };
 308                 mux_2 {
 309                         pins = "gpio7";
 310                         function = "mdc";
 311                         bias-pull-up;
 312                 };
 313         };
 314
 315         serial_0_pins: serial_pinmux {
 316                 mux {
 317                         pins = "gpio16", "gpio17";
 318                         function = "blsp_uart0";
 319                         bias-disable;
 320                 };
 321         };
 322
 323         serial_1_pins: serial1_pinmux {
 324                 mux {
 325                         /* We use the i2c-0 pins for serial_1 */
 326                         pins = "gpio8", "gpio9";
 327                         function = "blsp_uart1";
 328                         bias-disable;
 329                 };
 330         };
 331
 332         i2c_0_pins: i2c_0_pinmux {
 333                 pinmux {
 334                         function = "blsp_i2c0";
 335                         pins = "gpio20", "gpio21";
 336                 };
 337                 pinconf {
 338                         pins = "gpio20", "gpio21";
 339                         drive-strength = <16>;
 340                         bias-disable;
 341                 };
 342         };
 343
 344         i2c_1_pins: i2c_1_pinmux {
 345                 pinmux {
 346                         function = "blsp_i2c1";
 347                         pins = "gpio34", "gpio35";
 348                 };
 349                 pinconf {
 350                         pins = "gpio34", "gpio35";
 351                         drive-strength = <16>;
 352                         bias-disable;
 353                 };
 354         };
 355
 356         nand_pins: nand_pins {
 357                 /*
 358                  * There are 18 pins. 15 pins are common between LCD and NAND.
 359                  * The QPIC controller arbitrates between LCD and NAND. Of the
 360                  * remaining 4, 2 are for NAND and 2 are for LCD exclusively.
 361                  *
 362                  * The meraki source hints that the bluetooth module claims
 363                  * pin 52 as well. But sadly, there's no data whenever this
 364                  * is a NAND or LCD exclusive pin or not.
 365                  */
 366
 367                 pullups {
 368                         pins = "gpio52", "gpio53", "gpio58",
 369                                 "gpio59";
 370                         function = "qpic";
 371                         bias-pull-up;
 372                 };
 373
 374                 pulldowns {
 375                         pins = "gpio54", "gpio55", "gpio56",
 376                                 "gpio57", "gpio60", "gpio61",
 377                                 "gpio62", "gpio63", "gpio64",
 378                                 "gpio65", "gpio66", "gpio67",
 379                                 "gpio68", "gpio69";
 380                         function = "qpic";
 381                         bias-pull-down;
 382                 };
 383         };
 384 };
 385
 386 &wifi0 {
 387         status = "okay";
 388         qcom,ath10k-calibration-variant = "Meraki-MR33";
 389 };
 390
 391 &wifi1 {
 392         status = "okay";
 393         qcom,ath10k-calibration-variant = "Meraki-MR33";
 394 };