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upgrade AVR32 to 2.6.24 - sync with 2.6.24.atmel.1
[openwrt/staging/mkresin.git] / target / linux / avr32 / patches / 100-git_sync.patch
1 Documentation/kernel-parameters.txt | 5 +
2 MAINTAINERS | 6 +
3 Makefile | 2 +-
4 arch/arm/mach-at91/at91sam9261_devices.c | 14 +
5 arch/arm/mach-at91/at91sam9rl_devices.c | 14 +
6 arch/arm/mach-at91/board-sam9261ek.c | 1 +
7 arch/arm/mach-at91/board-sam9263ek.c | 1 +
8 arch/avr32/Kconfig | 54 +-
9 arch/avr32/Kconfig.debug | 10 -
10 arch/avr32/Makefile | 4 +-
11 arch/avr32/boards/atngw100/Kconfig | 12 +
12 arch/avr32/boards/atngw100/setup.c | 14 +-
13 arch/avr32/boards/atstk1000/Kconfig | 101 ++-
14 arch/avr32/boards/atstk1000/Makefile | 2 +
15 arch/avr32/boards/atstk1000/atstk1000.h | 2 +
16 arch/avr32/boards/atstk1000/atstk1002.c | 129 +--
17 arch/avr32/boards/atstk1000/atstk1003.c | 181 +++
18 arch/avr32/boards/atstk1000/atstk1004.c | 152 +++
19 arch/avr32/boards/atstk1000/setup.c | 64 +
20 arch/avr32/configs/atngw100_defconfig | 423 +++++---
21 arch/avr32/configs/atstk1002_defconfig | 661 ++++++++---
22 arch/avr32/configs/atstk1003_defconfig | 1032 ++++++++++++++++
23 arch/avr32/configs/atstk1004_defconfig | 627 ++++++++++
24 arch/avr32/drivers/Makefile | 1 +
25 arch/avr32/drivers/dw-dmac.c | 761 ++++++++++++
26 arch/avr32/drivers/dw-dmac.h | 42 +
27 arch/avr32/kernel/Makefile | 4 +-
28 arch/avr32/kernel/cpu.c | 96 ++-
29 arch/avr32/kernel/dma-controller.c | 34 +
30 arch/avr32/kernel/irq.c | 11 +
31 arch/avr32/kernel/kprobes.c | 5 +-
32 arch/avr32/kernel/nmi_debug.c | 82 ++
33 arch/avr32/kernel/ocd.c | 163 +++
34 arch/avr32/kernel/process.c | 5 +-
35 arch/avr32/kernel/ptrace.c | 5 +-
36 arch/avr32/kernel/setup.c | 2 +
37 arch/avr32/kernel/signal.c | 7 -
38 arch/avr32/kernel/traps.c | 21 +-
39 arch/avr32/mach-at32ap/Kconfig | 19 +-
40 arch/avr32/mach-at32ap/Makefile | 5 +-
41 arch/avr32/mach-at32ap/at32ap7000.c | 1730 --------------------------
42 arch/avr32/mach-at32ap/at32ap700x.c | 1809 ++++++++++++++++++++++++++++
43 arch/avr32/mach-at32ap/extint.c | 59 +-
44 arch/avr32/mach-at32ap/gpio-dev.c | 573 +++++++++
45 arch/avr32/mach-at32ap/pio.c | 76 ++
46 arch/avr32/mm/dma-coherent.c | 7 +
47 arch/avr32/mm/tlb.c | 2 +-
48 arch/avr32/oprofile/Makefile | 8 +
49 arch/avr32/oprofile/op_model_avr32.c | 235 ++++
50 drivers/i2c/busses/Kconfig | 8 +
51 drivers/i2c/busses/Makefile | 1 +
52 drivers/i2c/busses/i2c-atmeltwi.c | 436 +++++++
53 drivers/i2c/busses/i2c-atmeltwi.h | 117 ++
54 drivers/leds/Kconfig | 7 +
55 drivers/leds/Makefile | 1 +
56 drivers/leds/leds-atmel-pwm.c | 155 +++
57 drivers/misc/Kconfig | 9 +
58 drivers/misc/Makefile | 1 +
59 drivers/misc/atmel_pwm.c | 409 +++++++
60 drivers/mmc/host/Kconfig | 10 +
61 drivers/mmc/host/Makefile | 1 +
62 drivers/mmc/host/atmel-mci.c | 1176 ++++++++++++++++++
63 drivers/mmc/host/atmel-mci.h | 192 +++
64 drivers/mtd/chips/cfi_cmdset_0001.c | 43 +
65 drivers/mtd/chips/cfi_cmdset_0002.c | 6 +-
66 drivers/pcmcia/Kconfig | 7 +
67 drivers/pcmcia/Makefile | 1 +
68 drivers/pcmcia/at32_cf.c | 533 ++++++++
69 drivers/serial/Kconfig | 15 +
70 drivers/serial/atmel_serial.c | 884 +++++++++++---
71 drivers/spi/atmel_spi.c | 173 ++-
72 drivers/video/atmel_lcdfb.c | 149 +++-
73 drivers/video/backlight/Kconfig | 13 +
74 drivers/video/console/Kconfig | 2 +-
75 drivers/watchdog/Kconfig | 2 +-
76 include/asm-avr32/arch-at32ap/at32ap7000.h | 35 -
77 include/asm-avr32/arch-at32ap/at32ap700x.h | 35 +
78 include/asm-avr32/arch-at32ap/board.h | 11 +-
79 include/asm-avr32/arch-at32ap/cpu.h | 2 +-
80 include/asm-avr32/arch-at32ap/io.h | 4 +-
81 include/asm-avr32/arch-at32ap/portmux.h | 12 +
82 include/asm-avr32/dma-controller.h | 166 +++
83 include/asm-avr32/irq.h | 5 +
84 include/asm-avr32/kdebug.h | 1 +
85 include/asm-avr32/ocd.h | 5 +
86 include/asm-avr32/processor.h | 14 +
87 include/asm-avr32/ptrace.h | 13 +-
88 include/asm-avr32/thread_info.h | 1 +
89 include/linux/atmel_pwm.h | 70 ++
90 include/video/atmel_lcdc.h | 25 +-
91 kernel/ptrace.c | 2 +
92 sound/Kconfig | 2 +
93 sound/Makefile | 2 +-
94 sound/avr32/Kconfig | 11 +
95 sound/avr32/Makefile | 3 +
96 sound/avr32/ac97c.c | 914 ++++++++++++++
97 sound/avr32/ac97c.h | 71 ++
98 sound/oss/Kconfig | 4 +
99 sound/oss/Makefile | 1 +
100 sound/oss/at32_abdac.c | 722 +++++++++++
101 sound/oss/at32_abdac.h | 59 +
102 101 files changed, 13294 insertions(+), 2520 deletions(-)
103 create mode 100644 arch/avr32/boards/atngw100/Kconfig
104 create mode 100644 arch/avr32/boards/atstk1000/atstk1003.c
105 create mode 100644 arch/avr32/boards/atstk1000/atstk1004.c
106 create mode 100644 arch/avr32/configs/atstk1003_defconfig
107 create mode 100644 arch/avr32/configs/atstk1004_defconfig
108 create mode 100644 arch/avr32/drivers/Makefile
109 create mode 100644 arch/avr32/drivers/dw-dmac.c
110 create mode 100644 arch/avr32/drivers/dw-dmac.h
111 create mode 100644 arch/avr32/kernel/dma-controller.c
112 create mode 100644 arch/avr32/kernel/nmi_debug.c
113 create mode 100644 arch/avr32/kernel/ocd.c
114 delete mode 100644 arch/avr32/mach-at32ap/at32ap7000.c
115 create mode 100644 arch/avr32/mach-at32ap/at32ap700x.c
116 create mode 100644 arch/avr32/mach-at32ap/gpio-dev.c
117 create mode 100644 arch/avr32/oprofile/Makefile
118 create mode 100644 arch/avr32/oprofile/op_model_avr32.c
119 create mode 100644 drivers/i2c/busses/i2c-atmeltwi.c
120 create mode 100644 drivers/i2c/busses/i2c-atmeltwi.h
121 create mode 100644 drivers/leds/leds-atmel-pwm.c
122 create mode 100644 drivers/misc/atmel_pwm.c
123 create mode 100644 drivers/mmc/host/atmel-mci.c
124 create mode 100644 drivers/mmc/host/atmel-mci.h
125 create mode 100644 drivers/pcmcia/at32_cf.c
126 delete mode 100644 include/asm-avr32/arch-at32ap/at32ap7000.h
127 create mode 100644 include/asm-avr32/arch-at32ap/at32ap700x.h
128 create mode 100644 include/asm-avr32/dma-controller.h
129 create mode 100644 include/linux/atmel_pwm.h
130 create mode 100644 sound/avr32/Kconfig
131 create mode 100644 sound/avr32/Makefile
132 create mode 100644 sound/avr32/ac97c.c
133 create mode 100644 sound/avr32/ac97c.h
134 create mode 100644 sound/oss/at32_abdac.c
135 create mode 100644 sound/oss/at32_abdac.h
136
137 diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
138 index c417877..17fc60e 100644
139 --- a/Documentation/kernel-parameters.txt
140 +++ b/Documentation/kernel-parameters.txt
141 @@ -34,6 +34,7 @@ parameter is applicable:
142 ALSA ALSA sound support is enabled.
143 APIC APIC support is enabled.
144 APM Advanced Power Management support is enabled.
145 + AVR32 AVR32 architecture is enabled.
146 AX25 Appropriate AX.25 support is enabled.
147 BLACKFIN Blackfin architecture is enabled.
148 DRM Direct Rendering Management support is enabled.
149 @@ -1123,6 +1124,10 @@ and is between 256 and 4096 characters. It is defined in the file
150 of returning the full 64-bit number.
151 The default is to return 64-bit inode numbers.
152
153 + nmi_debug= [KNL,AVR32] Specify one or more actions to take
154 + when a NMI is triggered.
155 + Format: [state][,regs][,debounce][,die]
156 +
157 nmi_watchdog= [KNL,BUGS=X86-32] Debugging features for SMP kernels
158
159 no387 [BUGS=X86-32] Tells the kernel to use the 387 maths
160 diff --git a/MAINTAINERS b/MAINTAINERS
161 index 2340cfb..e349a9e 100644
162 --- a/MAINTAINERS
163 +++ b/MAINTAINERS
164 @@ -671,6 +671,12 @@ W: http://www.atmel.com/products/AT91/
165 W: http://www.at91.com/
166 S: Maintained
167
168 +ATMEL AT91 / AT32 SERIAL DRIVER
169 +P: Haavard Skinnemoen
170 +M: hskinnemoen@atmel.com
171 +L: linux-kernel@vger.kernel.org
172 +S: Supported
173 +
174 ATMEL LCDFB DRIVER
175 P: Nicolas Ferre
176 M: nicolas.ferre@atmel.com
177 diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
178 index 64979a9..bfa3d18 100644
179 --- a/arch/arm/mach-at91/at91sam9261_devices.c
180 +++ b/arch/arm/mach-at91/at91sam9261_devices.c
181 @@ -530,6 +530,20 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
182 at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */
183 at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */
184
185 +#ifdef CONFIG_FB_INTSRAM
186 + {
187 + void __iomem *fb;
188 + struct resource *fb_res = &lcdc_resources[2];
189 + size_t fb_len = fb_res->end - fb_res->start + 1;
190 +
191 + fb = ioremap_writecombine(fb_res->start, fb_len);
192 + if (fb) {
193 + memset(fb, 0, fb_len);
194 + iounmap(fb, fb_len);
195 + }
196 + }
197 +#endif
198 +
199 lcdc_data = *data;
200 platform_device_register(&at91_lcdc_device);
201 }
202 diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
203 index 2bd60a3..84ee029 100644
204 --- a/arch/arm/mach-at91/at91sam9rl_devices.c
205 +++ b/arch/arm/mach-at91/at91sam9rl_devices.c
206 @@ -375,6 +375,20 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
207 at91_set_B_periph(AT91_PIN_PC24, 0); /* LCDD22 */
208 at91_set_B_periph(AT91_PIN_PC25, 0); /* LCDD23 */
209
210 +#ifdef CONFIG_FB_INTSRAM
211 + {
212 + void __iomem *fb;
213 + struct resource *fb_res = &lcdc_resources[2];
214 + size_t fb_len = fb_res->end - fb_res->start + 1;
215 +
216 + fb = ioremap_writecombine(fb_res->start, fb_len);
217 + if (fb) {
218 + memset(fb, 0, fb_len);
219 + iounmap(fb, fb_len);
220 + }
221 + }
222 +#endif
223 +
224 lcdc_data = *data;
225 platform_device_register(&at91_lcdc_device);
226 }
227 diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
228 index 550ae59..0d275bb 100644
229 --- a/arch/arm/mach-at91/board-sam9261ek.c
230 +++ b/arch/arm/mach-at91/board-sam9261ek.c
231 @@ -322,6 +322,7 @@ static void at91_lcdc_power_control(int on)
232
233 /* Driver datas */
234 static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
235 + .lcdcon_is_backlight = true,
236 .default_bpp = 16,
237 .default_dmacon = ATMEL_LCDC_DMAEN,
238 .default_lcdcon2 = AT91SAM9261_DEFAULT_LCDCON2,
239 diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
240 index ab9dcc0..39bded2 100644
241 --- a/arch/arm/mach-at91/board-sam9263ek.c
242 +++ b/arch/arm/mach-at91/board-sam9263ek.c
243 @@ -250,6 +250,7 @@ static void at91_lcdc_power_control(int on)
244
245 /* Driver datas */
246 static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
247 + .lcdcon_is_backlight = true,
248 .default_bpp = 16,
249 .default_dmacon = ATMEL_LCDC_DMAEN,
250 .default_lcdcon2 = AT91SAM9263_DEFAULT_LCDCON2,
251 diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig
252 index b77abce..3f09270 100644
253 --- a/arch/avr32/Kconfig
254 +++ b/arch/avr32/Kconfig
255 @@ -54,6 +54,9 @@ config ARCH_HAS_ILOG2_U32
256 config ARCH_HAS_ILOG2_U64
257 def_bool n
258
259 +config ARCH_SUPPORTS_OPROFILE
260 + def_bool y
261 +
262 config GENERIC_HWEIGHT
263 def_bool y
264
265 @@ -81,19 +84,23 @@ config PLATFORM_AT32AP
266 select MMU
267 select PERFORMANCE_COUNTERS
268
269 -choice
270 - prompt "AVR32 CPU type"
271 - default CPU_AT32AP7000
272 +#
273 +# CPU types
274 +#
275
276 -config CPU_AT32AP7000
277 - bool "AT32AP7000"
278 +# AP7000 derivatives
279 +config CPU_AT32AP700X
280 + bool
281 select PLATFORM_AT32AP
282 -endchoice
283 -
284 -#
285 -# CPU Daughterboards for ATSTK1000
286 -config BOARD_ATSTK1002
287 +config CPU_AT32AP7000
288 + bool
289 + select CPU_AT32AP700X
290 +config CPU_AT32AP7001
291 + bool
292 + select CPU_AT32AP700X
293 +config CPU_AT32AP7002
294 bool
295 + select CPU_AT32AP700X
296
297 choice
298 prompt "AVR32 board type"
299 @@ -101,15 +108,18 @@ choice
300
301 config BOARD_ATSTK1000
302 bool "ATSTK1000 evaluation board"
303 - select BOARD_ATSTK1002 if CPU_AT32AP7000
304
305 config BOARD_ATNGW100
306 bool "ATNGW100 Network Gateway"
307 + select CPU_AT32AP7000
308 endchoice
309
310 if BOARD_ATSTK1000
311 source "arch/avr32/boards/atstk1000/Kconfig"
312 endif
313 +if BOARD_ATNGW100
314 +source "arch/avr32/boards/atngw100/Kconfig"
315 +endif
316
317 choice
318 prompt "Boot loader type"
319 @@ -123,15 +133,15 @@ source "arch/avr32/mach-at32ap/Kconfig"
320
321 config LOAD_ADDRESS
322 hex
323 - default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
324 + default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
325
326 config ENTRY_ADDRESS
327 hex
328 - default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
329 + default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
330
331 config PHYS_OFFSET
332 hex
333 - default 0x10000000 if CPU_AT32AP7000=y
334 + default 0x10000000 if CPU_AT32AP700X=y
335
336 source "kernel/Kconfig.preempt"
337
338 @@ -163,6 +173,20 @@ config OWNERSHIP_TRACE
339 enabling Nexus-compliant debuggers to keep track of the PID of the
340 currently executing task.
341
342 +config NMI_DEBUGGING
343 + bool "NMI Debugging"
344 + default n
345 + help
346 + Say Y here and pass the nmi_debug command-line parameter to
347 + the kernel to turn on NMI debugging. Depending on the value
348 + of the nmi_debug option, various pieces of information will
349 + be dumped to the console when a Non-Maskable Interrupt
350 + happens.
351 +
352 +config DW_DMAC
353 + tristate "Synopsys DesignWare DMA Controller support"
354 + default y if CPU_AT32AP7000
355 +
356 # FPU emulation goes here
357
358 source "kernel/Kconfig.hz"
359 @@ -219,6 +243,8 @@ source "drivers/Kconfig"
360
361 source "fs/Kconfig"
362
363 +source "kernel/Kconfig.instrumentation"
364 +
365 source "arch/avr32/Kconfig.debug"
366
367 source "security/Kconfig"
368 diff --git a/arch/avr32/Kconfig.debug b/arch/avr32/Kconfig.debug
369 index 64ace00..2283933 100644
370 --- a/arch/avr32/Kconfig.debug
371 +++ b/arch/avr32/Kconfig.debug
372 @@ -6,14 +6,4 @@ config TRACE_IRQFLAGS_SUPPORT
373
374 source "lib/Kconfig.debug"
375
376 -config KPROBES
377 - bool "Kprobes"
378 - depends on DEBUG_KERNEL
379 - help
380 - Kprobes allows you to trap at almost any kernel address and
381 - execute a callback function. register_kprobe() establishes
382 - a probepoint and specifies the callback. Kprobes is useful
383 - for kernel debugging, non-intrusive instrumentation and testing.
384 - If in doubt, say "N".
385 -
386 endmenu
387 diff --git a/arch/avr32/Makefile b/arch/avr32/Makefile
388 index 8791864..2d7bacd 100644
389 --- a/arch/avr32/Makefile
390 +++ b/arch/avr32/Makefile
391 @@ -16,7 +16,7 @@ KBUILD_AFLAGS += -mrelax -mno-pic
392 CFLAGS_MODULE += -mno-relax
393 LDFLAGS_vmlinux += --relax
394
395 -cpuflags-$(CONFIG_CPU_AT32AP7000) += -mcpu=ap7000
396 +cpuflags-$(CONFIG_PLATFORM_AT32AP) += -march=ap
397
398 KBUILD_CFLAGS += $(cpuflags-y)
399 KBUILD_AFLAGS += $(cpuflags-y)
400 @@ -31,6 +31,8 @@ core-$(CONFIG_BOARD_ATNGW100) += arch/avr32/boards/atngw100/
401 core-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/
402 core-y += arch/avr32/kernel/
403 core-y += arch/avr32/mm/
404 +drivers-$(CONFIG_OPROFILE) += arch/avr32/oprofile/
405 +drivers-y += arch/avr32/drivers/
406 libs-y += arch/avr32/lib/
407
408 archincdir-$(CONFIG_PLATFORM_AT32AP) := arch-at32ap
409 diff --git a/arch/avr32/boards/atngw100/Kconfig b/arch/avr32/boards/atngw100/Kconfig
410 new file mode 100644
411 index 0000000..5d922df
412 --- /dev/null
413 +++ b/arch/avr32/boards/atngw100/Kconfig
414 @@ -0,0 +1,12 @@
415 +# NGW100 customization
416 +
417 +config BOARD_ATNGW100_I2C_GPIO
418 + bool "Use GPIO for i2c instead of built-in TWI module"
419 + help
420 + The driver for the built-in TWI module has been plagued by
421 + various problems, while the i2c-gpio driver is based on the
422 + trusty old i2c-algo-bit bitbanging engine, making it work
423 + on pretty much any setup.
424 +
425 + Choose 'Y' here if you're having i2c-related problems and
426 + want to rule out the i2c bus driver.
427 diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c
428 index 52987c8..383b825 100644
429 --- a/arch/avr32/boards/atngw100/setup.c
430 +++ b/arch/avr32/boards/atngw100/setup.c
431 @@ -20,7 +20,7 @@
432 #include <asm/io.h>
433 #include <asm/setup.h>
434
435 -#include <asm/arch/at32ap7000.h>
436 +#include <asm/arch/at32ap700x.h>
437 #include <asm/arch/board.h>
438 #include <asm/arch/init.h>
439 #include <asm/arch/portmux.h>
440 @@ -42,6 +42,11 @@ static struct spi_board_info spi0_board_info[] __initdata = {
441 },
442 };
443
444 +static struct mci_platform_data __initdata mci0_data = {
445 + .detect_pin = GPIO_PIN_PC(25),
446 + .wp_pin = GPIO_PIN_PE(0),
447 +};
448 +
449 /*
450 * The next two functions should go away as the boot loader is
451 * supposed to initialize the macb address registers with a valid
452 @@ -124,6 +129,7 @@ static struct platform_device ngw_gpio_leds = {
453 }
454 };
455
456 +#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
457 static struct i2c_gpio_platform_data i2c_gpio_data = {
458 .sda_pin = GPIO_PIN_PA(6),
459 .scl_pin = GPIO_PIN_PA(7),
460 @@ -139,6 +145,7 @@ static struct platform_device i2c_gpio_device = {
461 .platform_data = &i2c_gpio_data,
462 },
463 };
464 +#endif
465
466 static int __init atngw100_init(void)
467 {
468 @@ -157,6 +164,7 @@ static int __init atngw100_init(void)
469 set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
470
471 at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
472 + at32_add_device_mci(0, &mci0_data);
473 at32_add_device_usba(0, NULL);
474
475 for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
476 @@ -165,11 +173,15 @@ static int __init atngw100_init(void)
477 }
478 platform_device_register(&ngw_gpio_leds);
479
480 +#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
481 at32_select_gpio(i2c_gpio_data.sda_pin,
482 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
483 at32_select_gpio(i2c_gpio_data.scl_pin,
484 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
485 platform_device_register(&i2c_gpio_device);
486 +#else
487 + at32_add_device_twi(0);
488 +#endif
489
490 return 0;
491 }
492 diff --git a/arch/avr32/boards/atstk1000/Kconfig b/arch/avr32/boards/atstk1000/Kconfig
493 index 718578f..56a8d8e 100644
494 --- a/arch/avr32/boards/atstk1000/Kconfig
495 +++ b/arch/avr32/boards/atstk1000/Kconfig
496 @@ -1,34 +1,53 @@
497 # STK1000 customization
498
499 -if BOARD_ATSTK1002
500 +if BOARD_ATSTK1000
501
502 -config BOARD_ATSTK1002_CUSTOM
503 - bool "Non-default STK-1002 jumper settings"
504 +choice
505 + prompt "ATSTK1000 CPU daughterboard type"
506 + default BOARD_ATSTK1002
507 +
508 +config BOARD_ATSTK1002
509 + bool "ATSTK1002"
510 + select CPU_AT32AP7000
511 +
512 +config BOARD_ATSTK1003
513 + bool "ATSTK1003"
514 + select CPU_AT32AP7001
515 +
516 +config BOARD_ATSTK1004
517 + bool "ATSTK1004"
518 + select CPU_AT32AP7002
519 +
520 +endchoice
521 +
522 +
523 +config BOARD_ATSTK100X_CUSTOM
524 + bool "Non-default STK1002/STK1003/STK1004 jumper settings"
525 help
526 You will normally leave the jumpers on the CPU card at their
527 default settings. If you need to use certain peripherals,
528 you will need to change some of those jumpers.
529
530 -if BOARD_ATSTK1002_CUSTOM
531 +if BOARD_ATSTK100X_CUSTOM
532
533 -config BOARD_ATSTK1002_SW1_CUSTOM
534 +config BOARD_ATSTK100X_SW1_CUSTOM
535 bool "SW1: use SSC1 (not SPI0)"
536 help
537 This also prevents using the external DAC as an audio interface,
538 and means you can't initialize the on-board QVGA display.
539
540 -config BOARD_ATSTK1002_SW2_CUSTOM
541 +config BOARD_ATSTK100X_SW2_CUSTOM
542 bool "SW2: use IRDA or TIMER0 (not UART-A, MMC/SD, and PS2-A)"
543 help
544 If you change this you'll want an updated boot loader putting
545 the console on UART-C not UART-A.
546
547 -config BOARD_ATSTK1002_SW3_CUSTOM
548 +config BOARD_ATSTK100X_SW3_CUSTOM
549 bool "SW3: use TIMER1 (not SSC0 and GCLK)"
550 help
551 This also prevents using the external DAC as an audio interface.
552
553 -config BOARD_ATSTK1002_SW4_CUSTOM
554 +config BOARD_ATSTK100X_SW4_CUSTOM
555 bool "SW4: use ISI/Camera (not GPIOs, SPI1, and PS2-B)"
556 help
557 To use the camera interface you'll need a custom card (on the
558 @@ -36,27 +55,29 @@ config BOARD_ATSTK1002_SW4_CUSTOM
559
560 config BOARD_ATSTK1002_SW5_CUSTOM
561 bool "SW5: use MACB1 (not LCDC)"
562 + depends on BOARD_ATSTK1002
563
564 config BOARD_ATSTK1002_SW6_CUSTOM
565 bool "SW6: more GPIOs (not MACB0)"
566 + depends on BOARD_ATSTK1002
567
568 endif # custom
569
570 -config BOARD_ATSTK1002_SPI1
571 +config BOARD_ATSTK100X_SPI1
572 bool "Configure SPI1 controller"
573 - depends on !BOARD_ATSTK1002_SW4_CUSTOM
574 + depends on !BOARD_ATSTK100X_SW4_CUSTOM
575 help
576 All the signals for the second SPI controller are available on
577 GPIO lines and accessed through the J1 jumper block. Say "y"
578 here to configure that SPI controller.
579
580 -config BOARD_ATSTK1002_J2_LED
581 +config BOARD_ATSTK1000_J2_LED
582 bool
583 - default BOARD_ATSTK1002_J2_LED8 || BOARD_ATSTK1002_J2_RGB
584 + default BOARD_ATSTK1000_J2_LED8 || BOARD_ATSTK1000_J2_RGB
585
586 choice
587 prompt "LEDs connected to J2:"
588 - depends on LEDS_GPIO && !BOARD_ATSTK1002_SW4_CUSTOM
589 + depends on LEDS_GPIO && !BOARD_ATSTK100X_SW4_CUSTOM
590 optional
591 help
592 Select this if you have jumpered the J2 jumper block to the
593 @@ -64,16 +85,64 @@ choice
594 IDC cable. A default "heartbeat" trigger is provided, but
595 you can of course override this.
596
597 -config BOARD_ATSTK1002_J2_LED8
598 +config BOARD_ATSTK1000_J2_LED8
599 bool "LED0..LED7"
600 help
601 Select this if J2 is jumpered to LED0..LED7 amber leds.
602
603 -config BOARD_ATSTK1002_J2_RGB
604 +config BOARD_ATSTK1000_J2_RGB
605 bool "RGB leds"
606 help
607 Select this if J2 is jumpered to the RGB leds.
608
609 endchoice
610
611 -endif # stk 1002
612 +config BOARD_ATSTK1000_EXTDAC
613 + bool
614 + depends on !BOARD_ATSTK100X_SW1_CUSTOM && !BOARD_ATSTK100X_SW3_CUSTOM
615 + default y
616 +
617 +config BOARD_ATSTK100X_ENABLE_AC97
618 + bool "Use AC97C instead of ABDAC"
619 + help
620 + Select this if you want to use the built-in AC97 controller
621 + instead of the built-in Audio Bitstream DAC. These share
622 + the same I/O pins on the AP7000, so both can't be enabled
623 + at the same time.
624 +
625 + Note that the STK1000 kit doesn't ship with an AC97 codec on
626 + board, so say N unless you've got an expansion board with an
627 + AC97 codec on it that you want to use.
628 +
629 +config BOARD_ATSTK1000_CF_HACKS
630 + bool "ATSTK1000 CompactFlash hacks"
631 + depends on !BOARD_ATSTK100X_SW4_CUSTOM
632 + help
633 + Select this if you have re-routed the CompactFlash RESET and
634 + CD signals to GPIOs on your STK1000. This is necessary for
635 + reset and card detection to work properly, although some CF
636 + cards may be able to cope without reset.
637 +
638 +config BOARD_ATSTK1000_CF_RESET_PIN
639 + hex "CompactFlash RESET pin"
640 + default 0x30
641 + depends on BOARD_ATSTK1000_CF_HACKS
642 + help
643 + Select which GPIO pin to use for the CompactFlash RESET
644 + signal. This is specified as a hexadecimal number and should
645 + be defined as 0x20 * gpio_port + pin.
646 +
647 + The default is 0x30, which is pin 16 on PIOB, aka GPIO14.
648 +
649 +config BOARD_ATSTK1000_CF_DETECT_PIN
650 + hex "CompactFlash DETECT pin"
651 + default 0x3e
652 + depends on BOARD_ATSTK1000_CF_HACKS
653 + help
654 + Select which GPIO pin to use for the CompactFlash CD
655 + signal. This is specified as a hexadecimal number and should
656 + be defined as 0x20 * gpio_port + pin.
657 +
658 + The default is 0x3e, which is pin 30 on PIOB, aka GPIO15.
659 +
660 +endif # stk 1000
661 diff --git a/arch/avr32/boards/atstk1000/Makefile b/arch/avr32/boards/atstk1000/Makefile
662 index 8e09922..beead86 100644
663 --- a/arch/avr32/boards/atstk1000/Makefile
664 +++ b/arch/avr32/boards/atstk1000/Makefile
665 @@ -1,2 +1,4 @@
666 obj-y += setup.o flash.o
667 obj-$(CONFIG_BOARD_ATSTK1002) += atstk1002.o
668 +obj-$(CONFIG_BOARD_ATSTK1003) += atstk1003.o
669 +obj-$(CONFIG_BOARD_ATSTK1004) += atstk1004.o
670 diff --git a/arch/avr32/boards/atstk1000/atstk1000.h b/arch/avr32/boards/atstk1000/atstk1000.h
671 index 9a49ed0..9392d32 100644
672 --- a/arch/avr32/boards/atstk1000/atstk1000.h
673 +++ b/arch/avr32/boards/atstk1000/atstk1000.h
674 @@ -12,4 +12,6 @@
675
676 extern struct atmel_lcdfb_info atstk1000_lcdc_data;
677
678 +void atstk1000_setup_j2_leds(void);
679 +
680 #endif /* __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H */
681 diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
682 index 5be0d13..90436fa 100644
683 --- a/arch/avr32/boards/atstk1000/atstk1002.c
684 +++ b/arch/avr32/boards/atstk1000/atstk1002.c
685 @@ -11,7 +11,6 @@
686 #include <linux/etherdevice.h>
687 #include <linux/init.h>
688 #include <linux/kernel.h>
689 -#include <linux/leds.h>
690 #include <linux/platform_device.h>
691 #include <linux/string.h>
692 #include <linux/types.h>
693 @@ -22,7 +21,7 @@
694
695 #include <asm/io.h>
696 #include <asm/setup.h>
697 -#include <asm/arch/at32ap7000.h>
698 +#include <asm/arch/at32ap700x.h>
699 #include <asm/arch/board.h>
700 #include <asm/arch/init.h>
701 #include <asm/arch/portmux.h>
702 @@ -49,18 +48,16 @@ static struct eth_platform_data __initdata eth_data[2] = {
703 },
704 };
705
706 -#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
707 -#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
708 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
709 static struct at73c213_board_info at73c213_data = {
710 .ssc_id = 0,
711 .shortname = "AVR32 STK1000 external DAC",
712 };
713 #endif
714 -#endif
715
716 -#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
717 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
718 static struct spi_board_info spi0_board_info[] __initdata = {
719 -#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
720 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
721 {
722 /* AT73C213 */
723 .modalias = "at73c213",
724 @@ -80,12 +77,25 @@ static struct spi_board_info spi0_board_info[] __initdata = {
725 };
726 #endif
727
728 -#ifdef CONFIG_BOARD_ATSTK1002_SPI1
729 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
730 static struct spi_board_info spi1_board_info[] __initdata = { {
731 /* patch in custom entries here */
732 } };
733 #endif
734
735 +static struct cf_platform_data __initdata cf0_data = {
736 +#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS
737 + .detect_pin = CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN,
738 + .reset_pin = CONFIG_BOARD_ATSTK1000_CF_RESET_PIN,
739 +#else
740 + .detect_pin = GPIO_PIN_NONE,
741 + .reset_pin = GPIO_PIN_NONE,
742 +#endif
743 + .vcc_pin = GPIO_PIN_NONE,
744 + .ready_pin = GPIO_PIN_PB(27),
745 + .cs = 4,
746 +};
747 +
748 /*
749 * The next two functions should go away as the boot loader is
750 * supposed to initialize the macb address registers with a valid
751 @@ -141,68 +151,8 @@ static void __init set_hw_addr(struct platform_device *pdev)
752 clk_put(pclk);
753 }
754
755 -#ifdef CONFIG_BOARD_ATSTK1002_J2_LED
756 -
757 -static struct gpio_led stk_j2_led[] = {
758 -#ifdef CONFIG_BOARD_ATSTK1002_J2_LED8
759 -#define LEDSTRING "J2 jumpered to LED8"
760 - { .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
761 - { .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
762 - { .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
763 - { .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
764 - { .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
765 - { .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
766 - { .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
767 - { .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
768 - .default_trigger = "heartbeat", },
769 -#else /* RGB */
770 -#define LEDSTRING "J2 jumpered to RGB LEDs"
771 - { .name = "r1:red", .gpio = GPIO_PIN_PB( 8), },
772 - { .name = "g1:green", .gpio = GPIO_PIN_PB(10), },
773 - { .name = "b1:blue", .gpio = GPIO_PIN_PB(14), },
774 -
775 - { .name = "r2:red", .gpio = GPIO_PIN_PB( 9),
776 - .default_trigger = "heartbeat", },
777 - { .name = "g2:green", .gpio = GPIO_PIN_PB(13), },
778 - { .name = "b2:blue", .gpio = GPIO_PIN_PB(15),
779 - .default_trigger = "heartbeat", },
780 - /* PB16, PB30 unused */
781 -#endif
782 -};
783 -
784 -static struct gpio_led_platform_data stk_j2_led_data = {
785 - .num_leds = ARRAY_SIZE(stk_j2_led),
786 - .leds = stk_j2_led,
787 -};
788 -
789 -static struct platform_device stk_j2_led_dev = {
790 - .name = "leds-gpio",
791 - .id = 2, /* gpio block J2 */
792 - .dev = {
793 - .platform_data = &stk_j2_led_data,
794 - },
795 -};
796 -
797 -static void setup_j2_leds(void)
798 -{
799 - unsigned i;
800 -
801 - for (i = 0; i < ARRAY_SIZE(stk_j2_led); i++)
802 - at32_select_gpio(stk_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
803 -
804 - printk("STK1002: " LEDSTRING "\n");
805 - platform_device_register(&stk_j2_led_dev);
806 -}
807 -
808 -#else
809 -static void setup_j2_leds(void)
810 -{
811 -}
812 -#endif
813 -
814 -#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
815 -#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
816 -static void __init at73c213_set_clk(struct at73c213_board_info *info)
817 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
818 +static void __init atstk1002_setup_extdac(void)
819 {
820 struct clk *gclk;
821 struct clk *pll;
822 @@ -220,7 +170,7 @@ static void __init at73c213_set_clk(struct at73c213_board_info *info)
823 }
824
825 at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
826 - info->dac_clk = gclk;
827 + at73c213_data.dac_clk = gclk;
828
829 err_set_clk:
830 clk_put(pll);
831 @@ -229,12 +179,16 @@ err_pll:
832 err_gclk:
833 return;
834 }
835 -#endif
836 -#endif
837 +#else
838 +static void __init atstk1002_setup_extdac(void)
839 +{
840 +
841 +}
842 +#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
843
844 void __init setup_board(void)
845 {
846 -#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
847 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
848 at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */
849 #else
850 at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */
851 @@ -271,7 +225,7 @@ static int __init atstk1002_init(void)
852
853 at32_add_system_devices();
854
855 -#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
856 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
857 at32_add_device_usart(1);
858 #else
859 at32_add_device_usart(0);
860 @@ -281,12 +235,16 @@ static int __init atstk1002_init(void)
861 #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
862 set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
863 #endif
864 -#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
865 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
866 at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
867 #endif
868 -#ifdef CONFIG_BOARD_ATSTK1002_SPI1
869 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
870 at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
871 #endif
872 + at32_add_device_twi(0);
873 +#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
874 + at32_add_device_mci(0, NULL);
875 +#endif
876 #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
877 set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
878 #else
879 @@ -294,17 +252,18 @@ static int __init atstk1002_init(void)
880 fbmem_start, fbmem_size);
881 #endif
882 at32_add_device_usba(0, NULL);
883 -#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
884 +#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
885 + at32_add_device_ac97c(0);
886 +#else
887 + at32_add_device_abdac(0);
888 +#endif
889 +#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
890 at32_add_device_ssc(0, ATMEL_SSC_TX);
891 #endif
892 + at32_add_device_cf(0, 2, &cf0_data);
893
894 - setup_j2_leds();
895 -
896 -#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
897 -#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
898 - at73c213_set_clk(&at73c213_data);
899 -#endif
900 -#endif
901 + atstk1000_setup_j2_leds();
902 + atstk1002_setup_extdac();
903
904 return 0;
905 }
906 diff --git a/arch/avr32/boards/atstk1000/atstk1003.c b/arch/avr32/boards/atstk1000/atstk1003.c
907 new file mode 100644
908 index 0000000..768d204
909 --- /dev/null
910 +++ b/arch/avr32/boards/atstk1000/atstk1003.c
911 @@ -0,0 +1,181 @@
912 +/*
913 + * ATSTK1003 daughterboard-specific init code
914 + *
915 + * Copyright (C) 2007 Atmel Corporation
916 + *
917 + * This program is free software; you can redistribute it and/or modify
918 + * it under the terms of the GNU General Public License version 2 as
919 + * published by the Free Software Foundation.
920 + */
921 +#include <linux/clk.h>
922 +#include <linux/err.h>
923 +#include <linux/init.h>
924 +#include <linux/kernel.h>
925 +#include <linux/platform_device.h>
926 +#include <linux/string.h>
927 +#include <linux/types.h>
928 +
929 +#include <linux/spi/at73c213.h>
930 +#include <linux/spi/spi.h>
931 +
932 +#include <asm/setup.h>
933 +
934 +#include <asm/arch/at32ap700x.h>
935 +#include <asm/arch/board.h>
936 +#include <asm/arch/init.h>
937 +#include <asm/arch/portmux.h>
938 +
939 +#include "atstk1000.h"
940 +
941 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
942 +static struct at73c213_board_info at73c213_data = {
943 + .ssc_id = 0,
944 + .shortname = "AVR32 STK1000 external DAC",
945 +};
946 +#endif
947 +
948 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
949 +static struct spi_board_info spi0_board_info[] __initdata = {
950 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
951 + {
952 + /* AT73C213 */
953 + .modalias = "at73c213",
954 + .max_speed_hz = 200000,
955 + .chip_select = 0,
956 + .mode = SPI_MODE_1,
957 + .platform_data = &at73c213_data,
958 + },
959 +#endif
960 + /*
961 + * We can control the LTV350QV LCD panel, but it isn't much
962 + * point since we don't have an LCD controller...
963 + */
964 +};
965 +#endif
966 +
967 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
968 +static struct spi_board_info spi1_board_info[] __initdata = { {
969 + /* patch in custom entries here */
970 +} };
971 +#endif
972 +
973 +static struct cf_platform_data __initdata cf0_data = {
974 +#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS
975 + .detect_pin = CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN,
976 + .reset_pin = CONFIG_BOARD_ATSTK1000_CF_RESET_PIN,
977 +#else
978 + .detect_pin = GPIO_PIN_NONE,
979 + .reset_pin = GPIO_PIN_NONE,
980 +#endif
981 + .vcc_pin = GPIO_PIN_NONE,
982 + .ready_pin = GPIO_PIN_PB(27),
983 + .cs = 4,
984 +};
985 +
986 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
987 +static void __init atstk1003_setup_extdac(void)
988 +{
989 + struct clk *gclk;
990 + struct clk *pll;
991 +
992 + gclk = clk_get(NULL, "gclk0");
993 + if (IS_ERR(gclk))
994 + goto err_gclk;
995 + pll = clk_get(NULL, "pll0");
996 + if (IS_ERR(pll))
997 + goto err_pll;
998 +
999 + if (clk_set_parent(gclk, pll)) {
1000 + pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
1001 + goto err_set_clk;
1002 + }
1003 +
1004 + at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
1005 + at73c213_data.dac_clk = gclk;
1006 +
1007 +err_set_clk:
1008 + clk_put(pll);
1009 +err_pll:
1010 + clk_put(gclk);
1011 +err_gclk:
1012 + return;
1013 +}
1014 +#else
1015 +static void __init atstk1003_setup_extdac(void)
1016 +{
1017 +
1018 +}
1019 +#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
1020 +
1021 +void __init setup_board(void)
1022 +{
1023 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
1024 + at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */
1025 +#else
1026 + at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */
1027 +#endif
1028 + /* USART 2/unused: expansion connector */
1029 + at32_map_usart(3, 2); /* USART 3/C: /dev/ttyS2, DB9 */
1030 +
1031 + at32_setup_serial_console(0);
1032 +}
1033 +
1034 +static int __init atstk1003_init(void)
1035 +{
1036 + /*
1037 + * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
1038 + * SDRAM-specific pins so that nobody messes with them.
1039 + */
1040 + at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */
1041 + at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */
1042 + at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */
1043 + at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */
1044 + at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */
1045 + at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */
1046 + at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */
1047 + at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */
1048 + at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */
1049 + at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */
1050 + at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */
1051 + at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */
1052 + at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */
1053 + at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */
1054 + at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */
1055 + at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */
1056 + at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */
1057 +
1058 + at32_add_system_devices();
1059 +
1060 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
1061 + at32_add_device_usart(1);
1062 +#else
1063 + at32_add_device_usart(0);
1064 +#endif
1065 + at32_add_device_usart(2);
1066 +
1067 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
1068 + at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
1069 +#endif
1070 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
1071 + at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
1072 +#endif
1073 +#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
1074 + at32_add_device_mci(0, NULL);
1075 +#endif
1076 + at32_add_device_usba(0, NULL);
1077 +#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
1078 + at32_add_device_ac97c(0);
1079 +#else
1080 + at32_add_device_abdac(0);
1081 +#endif
1082 +#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
1083 + at32_add_device_ssc(0, ATMEL_SSC_TX);
1084 +#endif
1085 + at32_add_device_cf(0, 2, &cf0_data);
1086 +
1087 + atstk1000_setup_j2_leds();
1088 + atstk1003_setup_extdac();
1089 +
1090 + return 0;
1091 +}
1092 +postcore_initcall(atstk1003_init);
1093 diff --git a/arch/avr32/boards/atstk1000/atstk1004.c b/arch/avr32/boards/atstk1000/atstk1004.c
1094 new file mode 100644
1095 index 0000000..96015dd
1096 --- /dev/null
1097 +++ b/arch/avr32/boards/atstk1000/atstk1004.c
1098 @@ -0,0 +1,152 @@
1099 +/*
1100 + * ATSTK1003 daughterboard-specific init code
1101 + *
1102 + * Copyright (C) 2007 Atmel Corporation
1103 + *
1104 + * This program is free software; you can redistribute it and/or modify
1105 + * it under the terms of the GNU General Public License version 2 as
1106 + * published by the Free Software Foundation.
1107 + */
1108 +#include <linux/clk.h>
1109 +#include <linux/err.h>
1110 +#include <linux/init.h>
1111 +#include <linux/kernel.h>
1112 +#include <linux/platform_device.h>
1113 +#include <linux/string.h>
1114 +#include <linux/types.h>
1115 +
1116 +#include <linux/spi/at73c213.h>
1117 +#include <linux/spi/spi.h>
1118 +
1119 +#include <video/atmel_lcdc.h>
1120 +
1121 +#include <asm/setup.h>
1122 +
1123 +#include <asm/arch/at32ap700x.h>
1124 +#include <asm/arch/board.h>
1125 +#include <asm/arch/init.h>
1126 +#include <asm/arch/portmux.h>
1127 +
1128 +#include "atstk1000.h"
1129 +
1130 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
1131 +static struct at73c213_board_info at73c213_data = {
1132 + .ssc_id = 0,
1133 + .shortname = "AVR32 STK1000 external DAC",
1134 +};
1135 +#endif
1136 +
1137 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
1138 +static struct spi_board_info spi0_board_info[] __initdata = {
1139 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
1140 + {
1141 + /* AT73C213 */
1142 + .modalias = "at73c213",
1143 + .max_speed_hz = 200000,
1144 + .chip_select = 0,
1145 + .mode = SPI_MODE_1,
1146 + .platform_data = &at73c213_data,
1147 + },
1148 +#endif
1149 + {
1150 + /* QVGA display */
1151 + .modalias = "ltv350qv",
1152 + .max_speed_hz = 16000000,
1153 + .chip_select = 1,
1154 + .mode = SPI_MODE_3,
1155 + },
1156 +};
1157 +#endif
1158 +
1159 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
1160 +static struct spi_board_info spi1_board_info[] __initdata = { {
1161 + /* patch in custom entries here */
1162 +} };
1163 +#endif
1164 +
1165 +#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
1166 +static void __init atstk1004_setup_extdac(void)
1167 +{
1168 + struct clk *gclk;
1169 + struct clk *pll;
1170 +
1171 + gclk = clk_get(NULL, "gclk0");
1172 + if (IS_ERR(gclk))
1173 + goto err_gclk;
1174 + pll = clk_get(NULL, "pll0");
1175 + if (IS_ERR(pll))
1176 + goto err_pll;
1177 +
1178 + if (clk_set_parent(gclk, pll)) {
1179 + pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
1180 + goto err_set_clk;
1181 + }
1182 +
1183 + at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
1184 + at73c213_data.dac_clk = gclk;
1185 +
1186 +err_set_clk:
1187 + clk_put(pll);
1188 +err_pll:
1189 + clk_put(gclk);
1190 +err_gclk:
1191 + return;
1192 +}
1193 +#else
1194 +static void __init atstk1004_setup_extdac(void)
1195 +{
1196 +
1197 +}
1198 +#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
1199 +
1200 +void __init setup_board(void)
1201 +{
1202 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
1203 + at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */
1204 +#else
1205 + at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */
1206 +#endif
1207 + /* USART 2/unused: expansion connector */
1208 + at32_map_usart(3, 2); /* USART 3/C: /dev/ttyS2, DB9 */
1209 +
1210 + at32_setup_serial_console(0);
1211 +}
1212 +
1213 +static int __init atstk1004_init(void)
1214 +{
1215 + at32_add_system_devices();
1216 +
1217 +#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
1218 + at32_add_device_usart(1);
1219 +#else
1220 + at32_add_device_usart(0);
1221 +#endif
1222 + at32_add_device_usart(2);
1223 +
1224 +#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
1225 + at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
1226 +#endif
1227 +#ifdef CONFIG_BOARD_ATSTK100X_SPI1
1228 + at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
1229 +#endif
1230 +#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
1231 + at32_add_device_mci(0, NULL);
1232 +#endif
1233 + at32_add_device_lcdc(0, &atstk1000_lcdc_data,
1234 + fbmem_start, fbmem_size);
1235 + at32_add_device_usba(0, NULL);
1236 +#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
1237 + at32_add_device_ac97c(0);
1238 +#else
1239 + at32_add_device_abdac(0);
1240 +#endif
1241 +#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
1242 + at32_add_device_ssc(0, ATMEL_SSC_TX);
1243 +#endif
1244 +
1245 + atstk1000_setup_j2_leds();
1246 + atstk1004_setup_extdac();
1247 +
1248 + return 0;
1249 +}
1250 +postcore_initcall(atstk1004_init);
1251 diff --git a/arch/avr32/boards/atstk1000/setup.c b/arch/avr32/boards/atstk1000/setup.c
1252 index c9af409..8bedf93 100644
1253 --- a/arch/avr32/boards/atstk1000/setup.c
1254 +++ b/arch/avr32/boards/atstk1000/setup.c
1255 @@ -10,13 +10,17 @@
1256 #include <linux/bootmem.h>
1257 #include <linux/fb.h>
1258 #include <linux/init.h>
1259 +#include <linux/platform_device.h>
1260 #include <linux/types.h>
1261 #include <linux/linkage.h>
1262
1263 #include <video/atmel_lcdc.h>
1264
1265 #include <asm/setup.h>
1266 +
1267 +#include <asm/arch/at32ap700x.h>
1268 #include <asm/arch/board.h>
1269 +#include <asm/arch/portmux.h>
1270
1271 #include "atstk1000.h"
1272
1273 @@ -61,3 +65,63 @@ struct atmel_lcdfb_info __initdata atstk1000_lcdc_data = {
1274 .default_monspecs = &atstk1000_default_monspecs,
1275 .guard_time = 2,
1276 };
1277 +
1278 +#ifdef CONFIG_BOARD_ATSTK1000_J2_LED
1279 +#include <linux/leds.h>
1280 +
1281 +static struct gpio_led stk1000_j2_led[] = {
1282 +#ifdef CONFIG_BOARD_ATSTK1000_J2_LED8
1283 +#define LEDSTRING "J2 jumpered to LED8"
1284 + { .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
1285 + { .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
1286 + { .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
1287 + { .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
1288 + { .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
1289 + { .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
1290 + { .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
1291 + { .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
1292 + .default_trigger = "heartbeat", },
1293 +#else /* RGB */
1294 +#define LEDSTRING "J2 jumpered to RGB LEDs"
1295 + { .name = "r1:red", .gpio = GPIO_PIN_PB( 8), },
1296 + { .name = "g1:green", .gpio = GPIO_PIN_PB(10), },
1297 + { .name = "b1:blue", .gpio = GPIO_PIN_PB(14), },
1298 +
1299 + { .name = "r2:red", .gpio = GPIO_PIN_PB( 9),
1300 + .default_trigger = "heartbeat", },
1301 + { .name = "g2:green", .gpio = GPIO_PIN_PB(13), },
1302 + { .name = "b2:blue", .gpio = GPIO_PIN_PB(15),
1303 + .default_trigger = "heartbeat", },
1304 + /* PB16, PB30 unused */
1305 +#endif
1306 +};
1307 +
1308 +static struct gpio_led_platform_data stk1000_j2_led_data = {
1309 + .num_leds = ARRAY_SIZE(stk1000_j2_led),
1310 + .leds = stk1000_j2_led,
1311 +};
1312 +
1313 +static struct platform_device stk1000_j2_led_dev = {
1314 + .name = "leds-gpio",
1315 + .id = 2, /* gpio block J2 */
1316 + .dev = {
1317 + .platform_data = &stk1000_j2_led_data,
1318 + },
1319 +};
1320 +
1321 +void __init atstk1000_setup_j2_leds(void)
1322 +{
1323 + unsigned i;
1324 +
1325 + for (i = 0; i < ARRAY_SIZE(stk1000_j2_led); i++)
1326 + at32_select_gpio(stk1000_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
1327 +
1328 + printk("STK1000: " LEDSTRING "\n");
1329 + platform_device_register(&stk1000_j2_led_dev);
1330 +}
1331 +#else /* CONFIG_BOARD_ATSTK1000_J2_LED */
1332 +void __init atstk1000_setup_j2_leds(void)
1333 +{
1334 +
1335 +}
1336 +#endif /* CONFIG_BOARD_ATSTK1000_J2_LED */
1337 diff --git a/arch/avr32/configs/atngw100_defconfig b/arch/avr32/configs/atngw100_defconfig
1338 index b799a68..2ddc6f5 100644
1339 --- a/arch/avr32/configs/atngw100_defconfig
1340 +++ b/arch/avr32/configs/atngw100_defconfig
1341 @@ -1,46 +1,51 @@
1342 #
1343 # Automatically generated make config: don't edit
1344 -# Linux kernel version: 2.6.22-rc5
1345 -# Sat Jun 23 15:40:05 2007
1346 +# Linux kernel version: 2.6.24
1347 +# Tue Feb 5 16:37:27 2008
1348 #
1349 CONFIG_AVR32=y
1350 CONFIG_GENERIC_GPIO=y
1351 CONFIG_GENERIC_HARDIRQS=y
1352 +CONFIG_STACKTRACE_SUPPORT=y
1353 +CONFIG_LOCKDEP_SUPPORT=y
1354 +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1355 CONFIG_HARDIRQS_SW_RESEND=y
1356 CONFIG_GENERIC_IRQ_PROBE=y
1357 CONFIG_RWSEM_GENERIC_SPINLOCK=y
1358 CONFIG_GENERIC_TIME=y
1359 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
1360 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
1361 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
1362 +CONFIG_ARCH_SUPPORTS_OPROFILE=y
1363 CONFIG_GENERIC_HWEIGHT=y
1364 CONFIG_GENERIC_CALIBRATE_DELAY=y
1365 CONFIG_GENERIC_BUG=y
1366 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
1367
1368 #
1369 -# Code maturity level options
1370 +# General setup
1371 #
1372 CONFIG_EXPERIMENTAL=y
1373 CONFIG_BROKEN_ON_SMP=y
1374 CONFIG_INIT_ENV_ARG_LIMIT=32
1375 -
1376 -#
1377 -# General setup
1378 -#
1379 CONFIG_LOCALVERSION=""
1380 # CONFIG_LOCALVERSION_AUTO is not set
1381 CONFIG_SWAP=y
1382 CONFIG_SYSVIPC=y
1383 -# CONFIG_IPC_NS is not set
1384 CONFIG_SYSVIPC_SYSCTL=y
1385 CONFIG_POSIX_MQUEUE=y
1386 CONFIG_BSD_PROCESS_ACCT=y
1387 CONFIG_BSD_PROCESS_ACCT_V3=y
1388 # CONFIG_TASKSTATS is not set
1389 -# CONFIG_UTS_NS is not set
1390 +# CONFIG_USER_NS is not set
1391 +# CONFIG_PID_NS is not set
1392 # CONFIG_AUDIT is not set
1393 # CONFIG_IKCONFIG is not set
1394 CONFIG_LOG_BUF_SHIFT=14
1395 +# CONFIG_CGROUPS is not set
1396 +CONFIG_FAIR_GROUP_SCHED=y
1397 +CONFIG_FAIR_USER_SCHED=y
1398 +# CONFIG_FAIR_CGROUP_SCHED is not set
1399 CONFIG_SYSFS_DEPRECATED=y
1400 # CONFIG_RELAY is not set
1401 CONFIG_BLK_DEV_INITRD=y
1402 @@ -61,35 +66,28 @@ CONFIG_FUTEX=y
1403 CONFIG_ANON_INODES=y
1404 CONFIG_EPOLL=y
1405 CONFIG_SIGNALFD=y
1406 -CONFIG_TIMERFD=y
1407 CONFIG_EVENTFD=y
1408 CONFIG_SHMEM=y
1409 CONFIG_VM_EVENT_COUNTERS=y
1410 -# CONFIG_SLUB_DEBUG is not set
1411 +CONFIG_SLUB_DEBUG=y
1412 # CONFIG_SLAB is not set
1413 CONFIG_SLUB=y
1414 # CONFIG_SLOB is not set
1415 +CONFIG_SLABINFO=y
1416 CONFIG_RT_MUTEXES=y
1417 # CONFIG_TINY_SHMEM is not set
1418 CONFIG_BASE_SMALL=1
1419 -
1420 -#
1421 -# Loadable module support
1422 -#
1423 CONFIG_MODULES=y
1424 CONFIG_MODULE_UNLOAD=y
1425 CONFIG_MODULE_FORCE_UNLOAD=y
1426 # CONFIG_MODVERSIONS is not set
1427 # CONFIG_MODULE_SRCVERSION_ALL is not set
1428 CONFIG_KMOD=y
1429 -
1430 -#
1431 -# Block layer
1432 -#
1433 CONFIG_BLOCK=y
1434 # CONFIG_LBD is not set
1435 # CONFIG_BLK_DEV_IO_TRACE is not set
1436 # CONFIG_LSF is not set
1437 +# CONFIG_BLK_DEV_BSG is not set
1438
1439 #
1440 # IO Schedulers
1441 @@ -111,17 +109,20 @@ CONFIG_SUBARCH_AVR32B=y
1442 CONFIG_MMU=y
1443 CONFIG_PERFORMANCE_COUNTERS=y
1444 CONFIG_PLATFORM_AT32AP=y
1445 +CONFIG_CPU_AT32AP700X=y
1446 CONFIG_CPU_AT32AP7000=y
1447 # CONFIG_BOARD_ATSTK1000 is not set
1448 CONFIG_BOARD_ATNGW100=y
1449 +CONFIG_BOARD_ATNGW100_I2C_GPIO=y
1450 CONFIG_LOADER_U_BOOT=y
1451
1452 #
1453 # Atmel AVR32 AP options
1454 #
1455 -# CONFIG_AP7000_32_BIT_SMC is not set
1456 -CONFIG_AP7000_16_BIT_SMC=y
1457 -# CONFIG_AP7000_8_BIT_SMC is not set
1458 +# CONFIG_AP700X_32_BIT_SMC is not set
1459 +CONFIG_AP700X_16_BIT_SMC=y
1460 +# CONFIG_AP700X_8_BIT_SMC is not set
1461 +CONFIG_GPIO_DEV=y
1462 CONFIG_LOAD_ADDRESS=0x10000000
1463 CONFIG_ENTRY_ADDRESS=0x90000000
1464 CONFIG_PHYS_OFFSET=0x10000000
1465 @@ -141,10 +142,14 @@ CONFIG_FLATMEM_MANUAL=y
1466 CONFIG_FLATMEM=y
1467 CONFIG_FLAT_NODE_MEM_MAP=y
1468 # CONFIG_SPARSEMEM_STATIC is not set
1469 +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
1470 CONFIG_SPLIT_PTLOCK_CPUS=4
1471 # CONFIG_RESOURCES_64BIT is not set
1472 CONFIG_ZONE_DMA_FLAG=0
1473 +CONFIG_VIRT_TO_BUS=y
1474 # CONFIG_OWNERSHIP_TRACE is not set
1475 +# CONFIG_NMI_DEBUGGING is not set
1476 +CONFIG_DW_DMAC=y
1477 # CONFIG_HZ_100 is not set
1478 CONFIG_HZ_250=y
1479 # CONFIG_HZ_300 is not set
1480 @@ -153,13 +158,31 @@ CONFIG_HZ=250
1481 CONFIG_CMDLINE=""
1482
1483 #
1484 -# Bus options
1485 +# Power management options
1486 #
1487 -# CONFIG_ARCH_SUPPORTS_MSI is not set
1488
1489 #
1490 -# PCCARD (PCMCIA/CardBus) support
1491 +# CPU Frequency scaling
1492 #
1493 +CONFIG_CPU_FREQ=y
1494 +CONFIG_CPU_FREQ_TABLE=y
1495 +# CONFIG_CPU_FREQ_DEBUG is not set
1496 +# CONFIG_CPU_FREQ_STAT is not set
1497 +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
1498 +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
1499 +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
1500 +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
1501 +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
1502 +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
1503 +CONFIG_CPU_FREQ_GOV_USERSPACE=y
1504 +CONFIG_CPU_FREQ_GOV_ONDEMAND=y
1505 +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
1506 +CONFIG_CPU_FREQ_AT32AP=y
1507 +
1508 +#
1509 +# Bus options
1510 +#
1511 +# CONFIG_ARCH_SUPPORTS_MSI is not set
1512 # CONFIG_PCCARD is not set
1513
1514 #
1515 @@ -213,6 +236,7 @@ CONFIG_INET_TUNNEL=y
1516 CONFIG_INET_XFRM_MODE_TRANSPORT=y
1517 CONFIG_INET_XFRM_MODE_TUNNEL=y
1518 CONFIG_INET_XFRM_MODE_BEET=y
1519 +# CONFIG_INET_LRO is not set
1520 CONFIG_INET_DIAG=y
1521 CONFIG_INET_TCP_DIAG=y
1522 # CONFIG_TCP_CONG_ADVANCED is not set
1523 @@ -240,6 +264,7 @@ CONFIG_IPV6_SIT=y
1524 # CONFIG_NETWORK_SECMARK is not set
1525 CONFIG_NETFILTER=y
1526 # CONFIG_NETFILTER_DEBUG is not set
1527 +CONFIG_BRIDGE_NETFILTER=y
1528
1529 #
1530 # Core Netfilter Configuration
1531 @@ -252,6 +277,7 @@ CONFIG_NF_CONNTRACK_MARK=y
1532 # CONFIG_NF_CONNTRACK_EVENTS is not set
1533 CONFIG_NF_CT_PROTO_GRE=m
1534 # CONFIG_NF_CT_PROTO_SCTP is not set
1535 +# CONFIG_NF_CT_PROTO_UDPLITE is not set
1536 CONFIG_NF_CONNTRACK_AMANDA=m
1537 CONFIG_NF_CONNTRACK_FTP=m
1538 CONFIG_NF_CONNTRACK_H323=m
1539 @@ -269,9 +295,11 @@ CONFIG_NETFILTER_XT_TARGET_MARK=m
1540 CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
1541 CONFIG_NETFILTER_XT_TARGET_NFLOG=m
1542 # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
1543 +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
1544 CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
1545 CONFIG_NETFILTER_XT_MATCH_COMMENT=m
1546 CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
1547 +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
1548 CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
1549 CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
1550 # CONFIG_NETFILTER_XT_MATCH_DCCP is not set
1551 @@ -284,6 +312,7 @@ CONFIG_NETFILTER_XT_MATCH_MAC=m
1552 CONFIG_NETFILTER_XT_MATCH_MARK=m
1553 CONFIG_NETFILTER_XT_MATCH_POLICY=m
1554 CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
1555 +# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
1556 CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
1557 CONFIG_NETFILTER_XT_MATCH_QUOTA=m
1558 CONFIG_NETFILTER_XT_MATCH_REALM=m
1559 @@ -292,6 +321,8 @@ CONFIG_NETFILTER_XT_MATCH_STATE=m
1560 CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
1561 CONFIG_NETFILTER_XT_MATCH_STRING=m
1562 CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
1563 +# CONFIG_NETFILTER_XT_MATCH_TIME is not set
1564 +# CONFIG_NETFILTER_XT_MATCH_U32 is not set
1565 CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
1566
1567 #
1568 @@ -359,13 +390,19 @@ CONFIG_IP6_NF_TARGET_REJECT=m
1569 CONFIG_IP6_NF_MANGLE=m
1570 CONFIG_IP6_NF_TARGET_HL=m
1571 CONFIG_IP6_NF_RAW=m
1572 +
1573 +#
1574 +# Bridge: Netfilter Configuration
1575 +#
1576 +# CONFIG_BRIDGE_NF_EBTABLES is not set
1577 # CONFIG_IP_DCCP is not set
1578 # CONFIG_IP_SCTP is not set
1579 # CONFIG_TIPC is not set
1580 # CONFIG_ATM is not set
1581 -# CONFIG_BRIDGE is not set
1582 +CONFIG_BRIDGE=m
1583 CONFIG_VLAN_8021Q=m
1584 # CONFIG_DECNET is not set
1585 +CONFIG_LLC=m
1586 # CONFIG_LLC2 is not set
1587 # CONFIG_IPX is not set
1588 # CONFIG_ATALK is not set
1589 @@ -373,10 +410,6 @@ CONFIG_VLAN_8021Q=m
1590 # CONFIG_LAPB is not set
1591 # CONFIG_ECONET is not set
1592 # CONFIG_WAN_ROUTER is not set
1593 -
1594 -#
1595 -# QoS and/or fair queueing
1596 -#
1597 # CONFIG_NET_SCHED is not set
1598 CONFIG_NET_CLS_ROUTE=y
1599
1600 @@ -384,6 +417,7 @@ CONFIG_NET_CLS_ROUTE=y
1601 # Network testing
1602 #
1603 # CONFIG_NET_PKTGEN is not set
1604 +# CONFIG_NET_TCPPROBE is not set
1605 # CONFIG_HAMRADIO is not set
1606 # CONFIG_IRDA is not set
1607 # CONFIG_BT is not set
1608 @@ -397,6 +431,7 @@ CONFIG_NET_CLS_ROUTE=y
1609 # CONFIG_MAC80211 is not set
1610 # CONFIG_IEEE80211 is not set
1611 # CONFIG_RFKILL is not set
1612 +# CONFIG_NET_9P is not set
1613
1614 #
1615 # Device Drivers
1616 @@ -405,16 +440,13 @@ CONFIG_NET_CLS_ROUTE=y
1617 #
1618 # Generic Driver Options
1619 #
1620 +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
1621 CONFIG_STANDALONE=y
1622 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
1623 # CONFIG_FW_LOADER is not set
1624 # CONFIG_DEBUG_DRIVER is not set
1625 # CONFIG_DEBUG_DEVRES is not set
1626 # CONFIG_SYS_HYPERVISOR is not set
1627 -
1628 -#
1629 -# Connector - unified userspace <-> kernelspace linker
1630 -#
1631 # CONFIG_CONNECTOR is not set
1632 CONFIG_MTD=y
1633 # CONFIG_MTD_DEBUG is not set
1634 @@ -434,6 +466,7 @@ CONFIG_MTD_BLOCK=y
1635 # CONFIG_INFTL is not set
1636 # CONFIG_RFD_FTL is not set
1637 # CONFIG_SSFDC is not set
1638 +# CONFIG_MTD_OOPS is not set
1639
1640 #
1641 # RAM/ROM/Flash chip drivers
1642 @@ -493,20 +526,8 @@ CONFIG_MTD_DATAFLASH=y
1643 # UBI - Unsorted block images
1644 #
1645 # CONFIG_MTD_UBI is not set
1646 -
1647 -#
1648 -# Parallel port support
1649 -#
1650 # CONFIG_PARPORT is not set
1651 -
1652 -#
1653 -# Plug and Play support
1654 -#
1655 -# CONFIG_PNPACPI is not set
1656 -
1657 -#
1658 -# Block devices
1659 -#
1660 +CONFIG_BLK_DEV=y
1661 # CONFIG_BLK_DEV_COW_COMMON is not set
1662 CONFIG_BLK_DEV_LOOP=m
1663 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
1664 @@ -517,11 +538,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
1665 CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
1666 # CONFIG_CDROM_PKTCDVD is not set
1667 # CONFIG_ATA_OVER_ETH is not set
1668 -
1669 -#
1670 -# Misc devices
1671 -#
1672 -# CONFIG_BLINK is not set
1673 +# CONFIG_MISC_DEVICES is not set
1674 # CONFIG_IDE is not set
1675
1676 #
1677 @@ -529,30 +546,42 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
1678 #
1679 # CONFIG_RAID_ATTRS is not set
1680 # CONFIG_SCSI is not set
1681 +# CONFIG_SCSI_DMA is not set
1682 # CONFIG_SCSI_NETLINK is not set
1683 # CONFIG_ATA is not set
1684 -
1685 -#
1686 -# Multi-device support (RAID and LVM)
1687 -#
1688 # CONFIG_MD is not set
1689 -
1690 -#
1691 -# Network device support
1692 -#
1693 CONFIG_NETDEVICES=y
1694 +# CONFIG_NETDEVICES_MULTIQUEUE is not set
1695 # CONFIG_DUMMY is not set
1696 # CONFIG_BONDING is not set
1697 +# CONFIG_MACVLAN is not set
1698 # CONFIG_EQUALIZER is not set
1699 CONFIG_TUN=m
1700 -# CONFIG_PHYLIB is not set
1701 -
1702 -#
1703 -# Ethernet (10 or 100Mbit)
1704 -#
1705 +# CONFIG_VETH is not set
1706 +CONFIG_PHYLIB=y
1707 +
1708 +#
1709 +# MII PHY device drivers
1710 +#
1711 +# CONFIG_MARVELL_PHY is not set
1712 +# CONFIG_DAVICOM_PHY is not set
1713 +# CONFIG_QSEMI_PHY is not set
1714 +# CONFIG_LXT_PHY is not set
1715 +# CONFIG_CICADA_PHY is not set
1716 +# CONFIG_VITESSE_PHY is not set
1717 +# CONFIG_SMSC_PHY is not set
1718 +# CONFIG_BROADCOM_PHY is not set
1719 +# CONFIG_ICPLUS_PHY is not set
1720 +# CONFIG_FIXED_PHY is not set
1721 +# CONFIG_MDIO_BITBANG is not set
1722 CONFIG_NET_ETHERNET=y
1723 -CONFIG_MII=y
1724 +# CONFIG_MII is not set
1725 CONFIG_MACB=y
1726 +# CONFIG_IBM_NEW_EMAC_ZMII is not set
1727 +# CONFIG_IBM_NEW_EMAC_RGMII is not set
1728 +# CONFIG_IBM_NEW_EMAC_TAH is not set
1729 +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
1730 +# CONFIG_B44 is not set
1731 # CONFIG_NETDEV_1000 is not set
1732 # CONFIG_NETDEV_10000 is not set
1733
1734 @@ -571,21 +600,14 @@ CONFIG_PPP_DEFLATE=m
1735 CONFIG_PPP_BSDCOMP=m
1736 CONFIG_PPP_MPPE=m
1737 CONFIG_PPPOE=m
1738 +# CONFIG_PPPOL2TP is not set
1739 # CONFIG_SLIP is not set
1740 CONFIG_SLHC=m
1741 # CONFIG_SHAPER is not set
1742 # CONFIG_NETCONSOLE is not set
1743 # CONFIG_NETPOLL is not set
1744 # CONFIG_NET_POLL_CONTROLLER is not set
1745 -
1746 -#
1747 -# ISDN subsystem
1748 -#
1749 # CONFIG_ISDN is not set
1750 -
1751 -#
1752 -# Telephony Support
1753 -#
1754 # CONFIG_PHONE is not set
1755
1756 #
1757 @@ -615,28 +637,57 @@ CONFIG_SLHC=m
1758 #
1759 CONFIG_SERIAL_ATMEL=y
1760 CONFIG_SERIAL_ATMEL_CONSOLE=y
1761 +CONFIG_SERIAL_ATMEL_PDC=y
1762 # CONFIG_SERIAL_ATMEL_TTYAT is not set
1763 CONFIG_SERIAL_CORE=y
1764 CONFIG_SERIAL_CORE_CONSOLE=y
1765 CONFIG_UNIX98_PTYS=y
1766 # CONFIG_LEGACY_PTYS is not set
1767 -
1768 -#
1769 -# IPMI
1770 -#
1771 # CONFIG_IPMI_HANDLER is not set
1772 -# CONFIG_WATCHDOG is not set
1773 # CONFIG_HW_RANDOM is not set
1774 # CONFIG_RTC is not set
1775 # CONFIG_GEN_RTC is not set
1776 # CONFIG_R3964 is not set
1777 # CONFIG_RAW_DRIVER is not set
1778 +# CONFIG_TCG_TPM is not set
1779 +CONFIG_I2C=m
1780 +CONFIG_I2C_BOARDINFO=y
1781 +CONFIG_I2C_CHARDEV=m
1782
1783 #
1784 -# TPM devices
1785 +# I2C Algorithms
1786 #
1787 -# CONFIG_TCG_TPM is not set
1788 -# CONFIG_I2C is not set
1789 +CONFIG_I2C_ALGOBIT=m
1790 +# CONFIG_I2C_ALGOPCF is not set
1791 +# CONFIG_I2C_ALGOPCA is not set
1792 +
1793 +#
1794 +# I2C Hardware Bus support
1795 +#
1796 +CONFIG_I2C_ATMELTWI=m
1797 +CONFIG_I2C_GPIO=m
1798 +# CONFIG_I2C_OCORES is not set
1799 +# CONFIG_I2C_PARPORT_LIGHT is not set
1800 +# CONFIG_I2C_SIMTEC is not set
1801 +# CONFIG_I2C_TAOS_EVM is not set
1802 +# CONFIG_I2C_STUB is not set
1803 +
1804 +#
1805 +# Miscellaneous I2C Chip support
1806 +#
1807 +# CONFIG_SENSORS_DS1337 is not set
1808 +# CONFIG_SENSORS_DS1374 is not set
1809 +# CONFIG_DS1682 is not set
1810 +# CONFIG_SENSORS_EEPROM is not set
1811 +# CONFIG_SENSORS_PCF8574 is not set
1812 +# CONFIG_SENSORS_PCA9539 is not set
1813 +# CONFIG_SENSORS_PCF8591 is not set
1814 +# CONFIG_SENSORS_MAX6875 is not set
1815 +# CONFIG_SENSORS_TSL2550 is not set
1816 +# CONFIG_I2C_DEBUG_CORE is not set
1817 +# CONFIG_I2C_DEBUG_ALGO is not set
1818 +# CONFIG_I2C_DEBUG_BUS is not set
1819 +# CONFIG_I2C_DEBUG_CHIP is not set
1820
1821 #
1822 # SPI support
1823 @@ -655,13 +706,25 @@ CONFIG_SPI_ATMEL=y
1824 # SPI Protocol Masters
1825 #
1826 # CONFIG_SPI_AT25 is not set
1827 -# CONFIG_SPI_SPIDEV is not set
1828 +CONFIG_SPI_SPIDEV=m
1829 +# CONFIG_SPI_TLE62X0 is not set
1830 +# CONFIG_W1 is not set
1831 +# CONFIG_POWER_SUPPLY is not set
1832 +# CONFIG_HWMON is not set
1833 +CONFIG_WATCHDOG=y
1834 +# CONFIG_WATCHDOG_NOWAYOUT is not set
1835
1836 #
1837 -# Dallas's 1-wire bus
1838 +# Watchdog Device Drivers
1839 #
1840 -# CONFIG_W1 is not set
1841 -# CONFIG_HWMON is not set
1842 +# CONFIG_SOFT_WATCHDOG is not set
1843 +CONFIG_AT32AP700X_WDT=y
1844 +
1845 +#
1846 +# Sonics Silicon Backplane
1847 +#
1848 +CONFIG_SSB_POSSIBLE=y
1849 +# CONFIG_SSB is not set
1850
1851 #
1852 # Multifunction device drivers
1853 @@ -678,23 +741,21 @@ CONFIG_SPI_ATMEL=y
1854 #
1855 # Graphics support
1856 #
1857 +# CONFIG_VGASTATE is not set
1858 +# CONFIG_VIDEO_OUTPUT_CONTROL is not set
1859 +# CONFIG_FB is not set
1860 # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
1861
1862 #
1863 # Display device support
1864 #
1865 # CONFIG_DISPLAY_SUPPORT is not set
1866 -# CONFIG_VGASTATE is not set
1867 -# CONFIG_FB is not set
1868
1869 #
1870 # Sound
1871 #
1872 # CONFIG_SOUND is not set
1873 -
1874 -#
1875 -# USB support
1876 -#
1877 +CONFIG_USB_SUPPORT=y
1878 # CONFIG_USB_ARCH_HAS_HCD is not set
1879 # CONFIG_USB_ARCH_HAS_OHCI is not set
1880 # CONFIG_USB_ARCH_HAS_EHCI is not set
1881 @@ -706,12 +767,48 @@ CONFIG_SPI_ATMEL=y
1882 #
1883 # USB Gadget Support
1884 #
1885 -# CONFIG_USB_GADGET is not set
1886 -# CONFIG_MMC is not set
1887 -
1888 -#
1889 -# LED devices
1890 -#
1891 +CONFIG_USB_GADGET=y
1892 +# CONFIG_USB_GADGET_DEBUG is not set
1893 +# CONFIG_USB_GADGET_DEBUG_FILES is not set
1894 +CONFIG_USB_GADGET_SELECTED=y
1895 +# CONFIG_USB_GADGET_AMD5536UDC is not set
1896 +CONFIG_USB_GADGET_ATMEL_USBA=y
1897 +CONFIG_USB_ATMEL_USBA=y
1898 +# CONFIG_USB_GADGET_FSL_USB2 is not set
1899 +# CONFIG_USB_GADGET_NET2280 is not set
1900 +# CONFIG_USB_GADGET_PXA2XX is not set
1901 +# CONFIG_USB_GADGET_M66592 is not set
1902 +# CONFIG_USB_GADGET_GOKU is not set
1903 +# CONFIG_USB_GADGET_LH7A40X is not set
1904 +# CONFIG_USB_GADGET_OMAP is not set
1905 +# CONFIG_USB_GADGET_S3C2410 is not set
1906 +# CONFIG_USB_GADGET_AT91 is not set
1907 +# CONFIG_USB_GADGET_DUMMY_HCD is not set
1908 +CONFIG_USB_GADGET_DUALSPEED=y
1909 +CONFIG_USB_ZERO=m
1910 +CONFIG_USB_ETH=m
1911 +CONFIG_USB_ETH_RNDIS=y
1912 +CONFIG_USB_GADGETFS=m
1913 +CONFIG_USB_FILE_STORAGE=m
1914 +# CONFIG_USB_FILE_STORAGE_TEST is not set
1915 +CONFIG_USB_G_SERIAL=m
1916 +# CONFIG_USB_MIDI_GADGET is not set
1917 +CONFIG_MMC=y
1918 +# CONFIG_MMC_DEBUG is not set
1919 +# CONFIG_MMC_UNSAFE_RESUME is not set
1920 +
1921 +#
1922 +# MMC/SD Card Drivers
1923 +#
1924 +CONFIG_MMC_BLOCK=y
1925 +# CONFIG_MMC_BLOCK_BOUNCE is not set
1926 +# CONFIG_SDIO_UART is not set
1927 +
1928 +#
1929 +# MMC/SD Host Controller Drivers
1930 +#
1931 +CONFIG_MMC_ATMELMCI=y
1932 +CONFIG_MMC_SPI=m
1933 CONFIG_NEW_LEDS=y
1934 CONFIG_LEDS_CLASS=y
1935
1936 @@ -726,53 +823,71 @@ CONFIG_LEDS_GPIO=y
1937 CONFIG_LEDS_TRIGGERS=y
1938 CONFIG_LEDS_TRIGGER_TIMER=y
1939 CONFIG_LEDS_TRIGGER_HEARTBEAT=y
1940 -
1941 -
1942 -#
1943 -# LED drivers
1944 -#
1945 +CONFIG_RTC_LIB=y
1946 +CONFIG_RTC_CLASS=y
1947 +CONFIG_RTC_HCTOSYS=y
1948 +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1949 +# CONFIG_RTC_DEBUG is not set
1950
1951 #
1952 -# LED Triggers
1953 -#
1954 -
1955 -#
1956 -# InfiniBand support
1957 +# RTC interfaces
1958 #
1959 +CONFIG_RTC_INTF_SYSFS=y
1960 +CONFIG_RTC_INTF_PROC=y
1961 +CONFIG_RTC_INTF_DEV=y
1962 +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1963 +# CONFIG_RTC_DRV_TEST is not set
1964
1965 #
1966 -# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
1967 +# I2C RTC drivers
1968 #
1969 +# CONFIG_RTC_DRV_DS1307 is not set
1970 +# CONFIG_RTC_DRV_DS1374 is not set
1971 +# CONFIG_RTC_DRV_DS1672 is not set
1972 +# CONFIG_RTC_DRV_MAX6900 is not set
1973 +# CONFIG_RTC_DRV_RS5C372 is not set
1974 +# CONFIG_RTC_DRV_ISL1208 is not set
1975 +# CONFIG_RTC_DRV_X1205 is not set
1976 +# CONFIG_RTC_DRV_PCF8563 is not set
1977 +# CONFIG_RTC_DRV_PCF8583 is not set
1978 +# CONFIG_RTC_DRV_M41T80 is not set
1979
1980 #
1981 -# Real Time Clock
1982 +# SPI RTC drivers
1983 #
1984 -# CONFIG_RTC_CLASS is not set
1985 +# CONFIG_RTC_DRV_RS5C348 is not set
1986 +# CONFIG_RTC_DRV_MAX6902 is not set
1987
1988 #
1989 -# DMA Engine support
1990 +# Platform RTC drivers
1991 #
1992 -# CONFIG_DMA_ENGINE is not set
1993 +# CONFIG_RTC_DRV_DS1553 is not set
1994 +# CONFIG_RTC_DRV_STK17TA8 is not set
1995 +# CONFIG_RTC_DRV_DS1742 is not set
1996 +# CONFIG_RTC_DRV_M48T86 is not set
1997 +# CONFIG_RTC_DRV_M48T59 is not set
1998 +# CONFIG_RTC_DRV_V3020 is not set
1999
2000 #
2001 -# DMA Clients
2002 +# on-CPU RTC drivers
2003 #
2004 +CONFIG_RTC_DRV_AT32AP700X=y
2005
2006 #
2007 -# DMA Devices
2008 +# Userspace I/O
2009 #
2010 +# CONFIG_UIO is not set
2011
2012 #
2013 # File systems
2014 #
2015 -CONFIG_EXT2_FS=y
2016 +CONFIG_EXT2_FS=m
2017 # CONFIG_EXT2_FS_XATTR is not set
2018 # CONFIG_EXT2_FS_XIP is not set
2019 -CONFIG_EXT3_FS=y
2020 +CONFIG_EXT3_FS=m
2021 # CONFIG_EXT3_FS_XATTR is not set
2022 # CONFIG_EXT4DEV_FS is not set
2023 -CONFIG_JBD=y
2024 -# CONFIG_JBD_DEBUG is not set
2025 +CONFIG_JBD=m
2026 # CONFIG_REISERFS_FS is not set
2027 # CONFIG_JFS_FS is not set
2028 # CONFIG_FS_POSIX_ACL is not set
2029 @@ -781,7 +896,8 @@ CONFIG_JBD=y
2030 # CONFIG_OCFS2_FS is not set
2031 # CONFIG_MINIX_FS is not set
2032 # CONFIG_ROMFS_FS is not set
2033 -# CONFIG_INOTIFY is not set
2034 +CONFIG_INOTIFY=y
2035 +CONFIG_INOTIFY_USER=y
2036 # CONFIG_QUOTA is not set
2037 # CONFIG_DNOTIFY is not set
2038 # CONFIG_AUTOFS_FS is not set
2039 @@ -814,7 +930,6 @@ CONFIG_SYSFS=y
2040 CONFIG_TMPFS=y
2041 # CONFIG_TMPFS_POSIX_ACL is not set
2042 # CONFIG_HUGETLB_PAGE is not set
2043 -CONFIG_RAMFS=y
2044 CONFIG_CONFIGFS_FS=y
2045
2046 #
2047 @@ -830,10 +945,12 @@ CONFIG_CONFIGFS_FS=y
2048 CONFIG_JFFS2_FS=y
2049 CONFIG_JFFS2_FS_DEBUG=0
2050 CONFIG_JFFS2_FS_WRITEBUFFER=y
2051 +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
2052 # CONFIG_JFFS2_SUMMARY is not set
2053 # CONFIG_JFFS2_FS_XATTR is not set
2054 # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
2055 CONFIG_JFFS2_ZLIB=y
2056 +# CONFIG_JFFS2_LZO is not set
2057 CONFIG_JFFS2_RTIME=y
2058 # CONFIG_JFFS2_RUBIN is not set
2059 # CONFIG_CRAMFS is not set
2060 @@ -842,19 +959,21 @@ CONFIG_JFFS2_RTIME=y
2061 # CONFIG_QNX4FS_FS is not set
2062 # CONFIG_SYSV_FS is not set
2063 # CONFIG_UFS_FS is not set
2064 -
2065 -#
2066 -# Network File Systems
2067 -#
2068 +CONFIG_NETWORK_FILESYSTEMS=y
2069 CONFIG_NFS_FS=y
2070 CONFIG_NFS_V3=y
2071 # CONFIG_NFS_V3_ACL is not set
2072 # CONFIG_NFS_V4 is not set
2073 # CONFIG_NFS_DIRECTIO is not set
2074 -# CONFIG_NFSD is not set
2075 +CONFIG_NFSD=m
2076 +CONFIG_NFSD_V3=y
2077 +# CONFIG_NFSD_V3_ACL is not set
2078 +# CONFIG_NFSD_V4 is not set
2079 +CONFIG_NFSD_TCP=y
2080 CONFIG_ROOT_NFS=y
2081 CONFIG_LOCKD=y
2082 CONFIG_LOCKD_V4=y
2083 +CONFIG_EXPORTFS=m
2084 CONFIG_NFS_COMMON=y
2085 CONFIG_SUNRPC=y
2086 # CONFIG_SUNRPC_BIND34 is not set
2087 @@ -871,23 +990,18 @@ CONFIG_CIFS=m
2088 # CONFIG_NCP_FS is not set
2089 # CONFIG_CODA_FS is not set
2090 # CONFIG_AFS_FS is not set
2091 -# CONFIG_9P_FS is not set
2092
2093 #
2094 # Partition Types
2095 #
2096 # CONFIG_PARTITION_ADVANCED is not set
2097 CONFIG_MSDOS_PARTITION=y
2098 -
2099 -#
2100 -# Native Language Support
2101 -#
2102 -CONFIG_NLS=y
2103 +CONFIG_NLS=m
2104 CONFIG_NLS_DEFAULT="iso8859-1"
2105 -# CONFIG_NLS_CODEPAGE_437 is not set
2106 +CONFIG_NLS_CODEPAGE_437=m
2107 # CONFIG_NLS_CODEPAGE_737 is not set
2108 # CONFIG_NLS_CODEPAGE_775 is not set
2109 -CONFIG_NLS_CODEPAGE_850=y
2110 +CONFIG_NLS_CODEPAGE_850=m
2111 # CONFIG_NLS_CODEPAGE_852 is not set
2112 # CONFIG_NLS_CODEPAGE_855 is not set
2113 # CONFIG_NLS_CODEPAGE_857 is not set
2114 @@ -908,7 +1022,7 @@ CONFIG_NLS_CODEPAGE_850=y
2115 # CONFIG_NLS_CODEPAGE_1250 is not set
2116 # CONFIG_NLS_CODEPAGE_1251 is not set
2117 # CONFIG_NLS_ASCII is not set
2118 -CONFIG_NLS_ISO8859_1=y
2119 +CONFIG_NLS_ISO8859_1=m
2120 # CONFIG_NLS_ISO8859_2 is not set
2121 # CONFIG_NLS_ISO8859_3 is not set
2122 # CONFIG_NLS_ISO8859_4 is not set
2123 @@ -921,18 +1035,19 @@ CONFIG_NLS_ISO8859_1=y
2124 # CONFIG_NLS_ISO8859_15 is not set
2125 # CONFIG_NLS_KOI8_R is not set
2126 # CONFIG_NLS_KOI8_U is not set
2127 -CONFIG_NLS_UTF8=y
2128 -
2129 -#
2130 -# Distributed Lock Manager
2131 -#
2132 +CONFIG_NLS_UTF8=m
2133 # CONFIG_DLM is not set
2134 +CONFIG_INSTRUMENTATION=y
2135 +CONFIG_PROFILING=y
2136 +CONFIG_OPROFILE=m
2137 +CONFIG_KPROBES=y
2138 +# CONFIG_MARKERS is not set
2139
2140 #
2141 # Kernel hacking
2142 #
2143 -CONFIG_TRACE_IRQFLAGS_SUPPORT=y
2144 # CONFIG_PRINTK_TIME is not set
2145 +CONFIG_ENABLE_WARN_DEPRECATED=y
2146 CONFIG_ENABLE_MUST_CHECK=y
2147 CONFIG_MAGIC_SYSRQ=y
2148 # CONFIG_UNUSED_SYMBOLS is not set
2149 @@ -941,12 +1056,17 @@ CONFIG_MAGIC_SYSRQ=y
2150 CONFIG_DEBUG_KERNEL=y
2151 # CONFIG_DEBUG_SHIRQ is not set
2152 CONFIG_DETECT_SOFTLOCKUP=y
2153 +CONFIG_SCHED_DEBUG=y
2154 # CONFIG_SCHEDSTATS is not set
2155 # CONFIG_TIMER_STATS is not set
2156 +# CONFIG_SLUB_DEBUG_ON is not set
2157 # CONFIG_DEBUG_RT_MUTEXES is not set
2158 # CONFIG_RT_MUTEX_TESTER is not set
2159 # CONFIG_DEBUG_SPINLOCK is not set
2160 # CONFIG_DEBUG_MUTEXES is not set
2161 +# CONFIG_DEBUG_LOCK_ALLOC is not set
2162 +# CONFIG_PROVE_LOCKING is not set
2163 +# CONFIG_LOCK_STAT is not set
2164 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
2165 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
2166 # CONFIG_DEBUG_KOBJECT is not set
2167 @@ -954,21 +1074,21 @@ CONFIG_DEBUG_BUGVERBOSE=y
2168 # CONFIG_DEBUG_INFO is not set
2169 # CONFIG_DEBUG_VM is not set
2170 # CONFIG_DEBUG_LIST is not set
2171 +# CONFIG_DEBUG_SG is not set
2172 CONFIG_FRAME_POINTER=y
2173 # CONFIG_FORCED_INLINING is not set
2174 +# CONFIG_BOOT_PRINTK_DELAY is not set
2175 # CONFIG_RCU_TORTURE_TEST is not set
2176 +# CONFIG_LKDTM is not set
2177 # CONFIG_FAULT_INJECTION is not set
2178 -# CONFIG_KPROBES is not set
2179 +# CONFIG_SAMPLES is not set
2180
2181 #
2182 # Security options
2183 #
2184 # CONFIG_KEYS is not set
2185 # CONFIG_SECURITY is not set
2186 -
2187 -#
2188 -# Cryptographic options
2189 -#
2190 +# CONFIG_SECURITY_FILE_CAPABILITIES is not set
2191 CONFIG_CRYPTO=y
2192 CONFIG_CRYPTO_ALGAPI=y
2193 CONFIG_CRYPTO_BLKCIPHER=y
2194 @@ -989,6 +1109,7 @@ CONFIG_CRYPTO_ECB=m
2195 CONFIG_CRYPTO_CBC=y
2196 CONFIG_CRYPTO_PCBC=m
2197 # CONFIG_CRYPTO_LRW is not set
2198 +# CONFIG_CRYPTO_XTS is not set
2199 # CONFIG_CRYPTO_CRYPTD is not set
2200 CONFIG_CRYPTO_DES=y
2201 # CONFIG_CRYPTO_FCRYPT is not set
2202 @@ -1002,15 +1123,14 @@ CONFIG_CRYPTO_DES=y
2203 CONFIG_CRYPTO_ARC4=m
2204 # CONFIG_CRYPTO_KHAZAD is not set
2205 # CONFIG_CRYPTO_ANUBIS is not set
2206 +# CONFIG_CRYPTO_SEED is not set
2207 CONFIG_CRYPTO_DEFLATE=y
2208 # CONFIG_CRYPTO_MICHAEL_MIC is not set
2209 # CONFIG_CRYPTO_CRC32C is not set
2210 # CONFIG_CRYPTO_CAMELLIA is not set
2211 # CONFIG_CRYPTO_TEST is not set
2212 -
2213 -#
2214 -# Hardware crypto devices
2215 -#
2216 +# CONFIG_CRYPTO_AUTHENC is not set
2217 +CONFIG_CRYPTO_HW=y
2218
2219 #
2220 # Library routines
2221 @@ -1018,8 +1138,9 @@ CONFIG_CRYPTO_DEFLATE=y
2222 CONFIG_BITREVERSE=y
2223 CONFIG_CRC_CCITT=m
2224 # CONFIG_CRC16 is not set
2225 -# CONFIG_CRC_ITU_T is not set
2226 +CONFIG_CRC_ITU_T=m
2227 CONFIG_CRC32=y
2228 +CONFIG_CRC7=m
2229 # CONFIG_LIBCRC32C is not set
2230 CONFIG_ZLIB_INFLATE=y
2231 CONFIG_ZLIB_DEFLATE=y
2232 diff --git a/arch/avr32/configs/atstk1002_defconfig b/arch/avr32/configs/atstk1002_defconfig
2233 index 3b977fd..46e1c78 100644
2234 --- a/arch/avr32/configs/atstk1002_defconfig
2235 +++ b/arch/avr32/configs/atstk1002_defconfig
2236 @@ -1,48 +1,48 @@
2237 #
2238 # Automatically generated make config: don't edit
2239 -# Linux kernel version: 2.6.22-rc5
2240 -# Sat Jun 23 15:32:08 2007
2241 +# Linux kernel version: 2.6.24
2242 +# Tue Feb 5 18:00:06 2008
2243 #
2244 CONFIG_AVR32=y
2245 CONFIG_GENERIC_GPIO=y
2246 CONFIG_GENERIC_HARDIRQS=y
2247 +CONFIG_STACKTRACE_SUPPORT=y
2248 +CONFIG_LOCKDEP_SUPPORT=y
2249 +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
2250 CONFIG_HARDIRQS_SW_RESEND=y
2251 CONFIG_GENERIC_IRQ_PROBE=y
2252 CONFIG_RWSEM_GENERIC_SPINLOCK=y
2253 CONFIG_GENERIC_TIME=y
2254 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
2255 # CONFIG_ARCH_HAS_ILOG2_U32 is not set
2256 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
2257 +CONFIG_ARCH_SUPPORTS_OPROFILE=y
2258 CONFIG_GENERIC_HWEIGHT=y
2259 CONFIG_GENERIC_CALIBRATE_DELAY=y
2260 CONFIG_GENERIC_BUG=y
2261 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
2262
2263 #
2264 -# Code maturity level options
2265 +# General setup
2266 #
2267 CONFIG_EXPERIMENTAL=y
2268 CONFIG_BROKEN_ON_SMP=y
2269 CONFIG_INIT_ENV_ARG_LIMIT=32
2270 -
2271 -#
2272 -# General setup
2273 -#
2274 CONFIG_LOCALVERSION=""
2275 # CONFIG_LOCALVERSION_AUTO is not set
2276 CONFIG_SWAP=y
2277 CONFIG_SYSVIPC=y
2278 -# CONFIG_IPC_NS is not set
2279 CONFIG_SYSVIPC_SYSCTL=y
2280 CONFIG_POSIX_MQUEUE=y
2281 -CONFIG_BSD_PROCESS_ACCT=y
2282 -CONFIG_BSD_PROCESS_ACCT_V3=y
2283 -CONFIG_TASKSTATS=y
2284 -CONFIG_TASK_DELAY_ACCT=y
2285 -# CONFIG_TASK_XACCT is not set
2286 -# CONFIG_UTS_NS is not set
2287 -CONFIG_AUDIT=y
2288 +# CONFIG_BSD_PROCESS_ACCT is not set
2289 +# CONFIG_TASKSTATS is not set
2290 +# CONFIG_USER_NS is not set
2291 +# CONFIG_PID_NS is not set
2292 +# CONFIG_AUDIT is not set
2293 # CONFIG_IKCONFIG is not set
2294 CONFIG_LOG_BUF_SHIFT=14
2295 +# CONFIG_CGROUPS is not set
2296 +# CONFIG_FAIR_GROUP_SCHED is not set
2297 CONFIG_SYSFS_DEPRECATED=y
2298 CONFIG_RELAY=y
2299 CONFIG_BLK_DEV_INITRD=y
2300 @@ -63,35 +63,28 @@ CONFIG_FUTEX=y
2301 CONFIG_ANON_INODES=y
2302 CONFIG_EPOLL=y
2303 CONFIG_SIGNALFD=y
2304 -CONFIG_TIMERFD=y
2305 CONFIG_EVENTFD=y
2306 CONFIG_SHMEM=y
2307 CONFIG_VM_EVENT_COUNTERS=y
2308 -# CONFIG_SLUB_DEBUG is not set
2309 +CONFIG_SLUB_DEBUG=y
2310 # CONFIG_SLAB is not set
2311 CONFIG_SLUB=y
2312 # CONFIG_SLOB is not set
2313 +CONFIG_SLABINFO=y
2314 CONFIG_RT_MUTEXES=y
2315 # CONFIG_TINY_SHMEM is not set
2316 CONFIG_BASE_SMALL=1
2317 -
2318 -#
2319 -# Loadable module support
2320 -#
2321 CONFIG_MODULES=y
2322 CONFIG_MODULE_UNLOAD=y
2323 # CONFIG_MODULE_FORCE_UNLOAD is not set
2324 # CONFIG_MODVERSIONS is not set
2325 # CONFIG_MODULE_SRCVERSION_ALL is not set
2326 # CONFIG_KMOD is not set
2327 -
2328 -#
2329 -# Block layer
2330 -#
2331 CONFIG_BLOCK=y
2332 # CONFIG_LBD is not set
2333 # CONFIG_BLK_DEV_IO_TRACE is not set
2334 # CONFIG_LSF is not set
2335 +# CONFIG_BLK_DEV_BSG is not set
2336
2337 #
2338 # IO Schedulers
2339 @@ -99,12 +92,12 @@ CONFIG_BLOCK=y
2340 CONFIG_IOSCHED_NOOP=y
2341 # CONFIG_IOSCHED_AS is not set
2342 # CONFIG_IOSCHED_DEADLINE is not set
2343 -# CONFIG_IOSCHED_CFQ is not set
2344 +CONFIG_IOSCHED_CFQ=y
2345 # CONFIG_DEFAULT_AS is not set
2346 # CONFIG_DEFAULT_DEADLINE is not set
2347 -# CONFIG_DEFAULT_CFQ is not set
2348 -CONFIG_DEFAULT_NOOP=y
2349 -CONFIG_DEFAULT_IOSCHED="noop"
2350 +CONFIG_DEFAULT_CFQ=y
2351 +# CONFIG_DEFAULT_NOOP is not set
2352 +CONFIG_DEFAULT_IOSCHED="cfq"
2353
2354 #
2355 # System Type and features
2356 @@ -113,18 +106,30 @@ CONFIG_SUBARCH_AVR32B=y
2357 CONFIG_MMU=y
2358 CONFIG_PERFORMANCE_COUNTERS=y
2359 CONFIG_PLATFORM_AT32AP=y
2360 +CONFIG_CPU_AT32AP700X=y
2361 CONFIG_CPU_AT32AP7000=y
2362 -CONFIG_BOARD_ATSTK1002=y
2363 CONFIG_BOARD_ATSTK1000=y
2364 # CONFIG_BOARD_ATNGW100 is not set
2365 +CONFIG_BOARD_ATSTK1002=y
2366 +# CONFIG_BOARD_ATSTK1003 is not set
2367 +# CONFIG_BOARD_ATSTK1004 is not set
2368 +# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
2369 +# CONFIG_BOARD_ATSTK100X_SPI1 is not set
2370 +# CONFIG_BOARD_ATSTK1000_J2_LED is not set
2371 +# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
2372 +# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
2373 +CONFIG_BOARD_ATSTK1000_EXTDAC=y
2374 +# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set
2375 +# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set
2376 CONFIG_LOADER_U_BOOT=y
2377
2378 #
2379 # Atmel AVR32 AP options
2380 #
2381 -# CONFIG_AP7000_32_BIT_SMC is not set
2382 -CONFIG_AP7000_16_BIT_SMC=y
2383 -# CONFIG_AP7000_8_BIT_SMC is not set
2384 +# CONFIG_AP700X_32_BIT_SMC is not set
2385 +CONFIG_AP700X_16_BIT_SMC=y
2386 +# CONFIG_AP700X_8_BIT_SMC is not set
2387 +CONFIG_GPIO_DEV=y
2388 CONFIG_LOAD_ADDRESS=0x10000000
2389 CONFIG_ENTRY_ADDRESS=0x90000000
2390 CONFIG_PHYS_OFFSET=0x10000000
2391 @@ -144,10 +149,14 @@ CONFIG_FLATMEM_MANUAL=y
2392 CONFIG_FLATMEM=y
2393 CONFIG_FLAT_NODE_MEM_MAP=y
2394 # CONFIG_SPARSEMEM_STATIC is not set
2395 +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
2396 CONFIG_SPLIT_PTLOCK_CPUS=4
2397 # CONFIG_RESOURCES_64BIT is not set
2398 CONFIG_ZONE_DMA_FLAG=0
2399 +CONFIG_VIRT_TO_BUS=y
2400 # CONFIG_OWNERSHIP_TRACE is not set
2401 +CONFIG_NMI_DEBUGGING=y
2402 +CONFIG_DW_DMAC=y
2403 # CONFIG_HZ_100 is not set
2404 CONFIG_HZ_250=y
2405 # CONFIG_HZ_300 is not set
2406 @@ -156,13 +165,31 @@ CONFIG_HZ=250
2407 CONFIG_CMDLINE=""
2408
2409 #
2410 -# Bus options
2411 +# Power management options
2412 #
2413 -# CONFIG_ARCH_SUPPORTS_MSI is not set
2414
2415 #
2416 -# PCCARD (PCMCIA/CardBus) support
2417 +# CPU Frequency scaling
2418 +#
2419 +CONFIG_CPU_FREQ=y
2420 +CONFIG_CPU_FREQ_TABLE=y
2421 +# CONFIG_CPU_FREQ_DEBUG is not set
2422 +# CONFIG_CPU_FREQ_STAT is not set
2423 +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
2424 +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
2425 +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
2426 +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
2427 +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
2428 +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
2429 +CONFIG_CPU_FREQ_GOV_USERSPACE=y
2430 +CONFIG_CPU_FREQ_GOV_ONDEMAND=y
2431 +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
2432 +CONFIG_CPU_FREQ_AT32AP=y
2433 +
2434 #
2435 +# Bus options
2436 +#
2437 +# CONFIG_ARCH_SUPPORTS_MSI is not set
2438 # CONFIG_PCCARD is not set
2439
2440 #
2441 @@ -182,7 +209,12 @@ CONFIG_NET=y
2442 CONFIG_PACKET=y
2443 CONFIG_PACKET_MMAP=y
2444 CONFIG_UNIX=y
2445 -# CONFIG_NET_KEY is not set
2446 +CONFIG_XFRM=y
2447 +CONFIG_XFRM_USER=m
2448 +# CONFIG_XFRM_SUB_POLICY is not set
2449 +# CONFIG_XFRM_MIGRATE is not set
2450 +CONFIG_NET_KEY=m
2451 +# CONFIG_NET_KEY_MIGRATE is not set
2452 CONFIG_INET=y
2453 # CONFIG_IP_MULTICAST is not set
2454 # CONFIG_IP_ADVANCED_ROUTER is not set
2455 @@ -191,36 +223,52 @@ CONFIG_IP_PNP=y
2456 CONFIG_IP_PNP_DHCP=y
2457 # CONFIG_IP_PNP_BOOTP is not set
2458 # CONFIG_IP_PNP_RARP is not set
2459 -# CONFIG_NET_IPIP is not set
2460 -# CONFIG_NET_IPGRE is not set
2461 +CONFIG_NET_IPIP=m
2462 +CONFIG_NET_IPGRE=m
2463 # CONFIG_ARPD is not set
2464 # CONFIG_SYN_COOKIES is not set
2465 -# CONFIG_INET_AH is not set
2466 -# CONFIG_INET_ESP is not set
2467 +CONFIG_INET_AH=m
2468 +CONFIG_INET_ESP=m
2469 # CONFIG_INET_IPCOMP is not set
2470 # CONFIG_INET_XFRM_TUNNEL is not set
2471 -# CONFIG_INET_TUNNEL is not set
2472 -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
2473 -# CONFIG_INET_XFRM_MODE_TUNNEL is not set
2474 -# CONFIG_INET_XFRM_MODE_BEET is not set
2475 +CONFIG_INET_TUNNEL=m
2476 +CONFIG_INET_XFRM_MODE_TRANSPORT=m
2477 +CONFIG_INET_XFRM_MODE_TUNNEL=m
2478 +CONFIG_INET_XFRM_MODE_BEET=m
2479 +# CONFIG_INET_LRO is not set
2480 CONFIG_INET_DIAG=y
2481 CONFIG_INET_TCP_DIAG=y
2482 # CONFIG_TCP_CONG_ADVANCED is not set
2483 CONFIG_TCP_CONG_CUBIC=y
2484 CONFIG_DEFAULT_TCP_CONG="cubic"
2485 # CONFIG_TCP_MD5SIG is not set
2486 -# CONFIG_IPV6 is not set
2487 -# CONFIG_INET6_XFRM_TUNNEL is not set
2488 -# CONFIG_INET6_TUNNEL is not set
2489 +CONFIG_IPV6=m
2490 +# CONFIG_IPV6_PRIVACY is not set
2491 +# CONFIG_IPV6_ROUTER_PREF is not set
2492 +# CONFIG_IPV6_OPTIMISTIC_DAD is not set
2493 +CONFIG_INET6_AH=m
2494 +CONFIG_INET6_ESP=m
2495 +CONFIG_INET6_IPCOMP=m
2496 +# CONFIG_IPV6_MIP6 is not set
2497 +CONFIG_INET6_XFRM_TUNNEL=m
2498 +CONFIG_INET6_TUNNEL=m
2499 +CONFIG_INET6_XFRM_MODE_TRANSPORT=m
2500 +CONFIG_INET6_XFRM_MODE_TUNNEL=m
2501 +CONFIG_INET6_XFRM_MODE_BEET=m
2502 +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
2503 +CONFIG_IPV6_SIT=m
2504 +CONFIG_IPV6_TUNNEL=m
2505 +# CONFIG_IPV6_MULTIPLE_TABLES is not set
2506 # CONFIG_NETWORK_SECMARK is not set
2507 # CONFIG_NETFILTER is not set
2508 # CONFIG_IP_DCCP is not set
2509 # CONFIG_IP_SCTP is not set
2510 # CONFIG_TIPC is not set
2511 # CONFIG_ATM is not set
2512 -# CONFIG_BRIDGE is not set
2513 +CONFIG_BRIDGE=m
2514 # CONFIG_VLAN_8021Q is not set
2515 # CONFIG_DECNET is not set
2516 +CONFIG_LLC=m
2517 # CONFIG_LLC2 is not set
2518 # CONFIG_IPX is not set
2519 # CONFIG_ATALK is not set
2520 @@ -228,16 +276,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
2521 # CONFIG_LAPB is not set
2522 # CONFIG_ECONET is not set
2523 # CONFIG_WAN_ROUTER is not set
2524 -
2525 -#
2526 -# QoS and/or fair queueing
2527 -#
2528 # CONFIG_NET_SCHED is not set
2529
2530 #
2531 # Network testing
2532 #
2533 # CONFIG_NET_PKTGEN is not set
2534 +# CONFIG_NET_TCPPROBE is not set
2535 # CONFIG_HAMRADIO is not set
2536 # CONFIG_IRDA is not set
2537 # CONFIG_BT is not set
2538 @@ -251,6 +296,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
2539 # CONFIG_MAC80211 is not set
2540 # CONFIG_IEEE80211 is not set
2541 # CONFIG_RFKILL is not set
2542 +# CONFIG_NET_9P is not set
2543
2544 #
2545 # Device Drivers
2546 @@ -259,16 +305,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
2547 #
2548 # Generic Driver Options
2549 #
2550 +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
2551 CONFIG_STANDALONE=y
2552 # CONFIG_PREVENT_FIRMWARE_BUILD is not set
2553 # CONFIG_FW_LOADER is not set
2554 # CONFIG_DEBUG_DRIVER is not set
2555 # CONFIG_DEBUG_DEVRES is not set
2556 # CONFIG_SYS_HYPERVISOR is not set
2557 -
2558 -#
2559 -# Connector - unified userspace <-> kernelspace linker
2560 -#
2561 # CONFIG_CONNECTOR is not set
2562 CONFIG_MTD=y
2563 # CONFIG_MTD_DEBUG is not set
2564 @@ -288,6 +331,7 @@ CONFIG_MTD_BLOCK=y
2565 # CONFIG_INFTL is not set
2566 # CONFIG_RFD_FTL is not set
2567 # CONFIG_SSFDC is not set
2568 +# CONFIG_MTD_OOPS is not set
2569
2570 #
2571 # RAM/ROM/Flash chip drivers
2572 @@ -327,6 +371,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
2573 #
2574 # Self-contained MTD device drivers
2575 #
2576 +CONFIG_MTD_DATAFLASH=m
2577 +CONFIG_MTD_M25P80=m
2578 # CONFIG_MTD_SLRAM is not set
2579 # CONFIG_MTD_PHRAM is not set
2580 # CONFIG_MTD_MTDRAM is not set
2581 @@ -345,20 +391,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
2582 # UBI - Unsorted block images
2583 #
2584 # CONFIG_MTD_UBI is not set
2585 -
2586 -#
2587 -# Parallel port support
2588 -#
2589 # CONFIG_PARPORT is not set
2590 -
2591 -#
2592 -# Plug and Play support
2593 -#
2594 -# CONFIG_PNPACPI is not set
2595 -
2596 -#
2597 -# Block devices
2598 -#
2599 +CONFIG_BLK_DEV=y
2600 # CONFIG_BLK_DEV_COW_COMMON is not set
2601 CONFIG_BLK_DEV_LOOP=m
2602 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
2603 @@ -369,42 +403,88 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
2604 CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
2605 # CONFIG_CDROM_PKTCDVD is not set
2606 # CONFIG_ATA_OVER_ETH is not set
2607 -
2608 -#
2609 -# Misc devices
2610 -#
2611 -# CONFIG_BLINK is not set
2612 +CONFIG_MISC_DEVICES=y
2613 +CONFIG_ATMEL_PWM=m
2614 +# CONFIG_EEPROM_93CX6 is not set
2615 +CONFIG_ATMEL_SSC=m
2616 # CONFIG_IDE is not set
2617
2618 #
2619 # SCSI device support
2620 #
2621 # CONFIG_RAID_ATTRS is not set
2622 -# CONFIG_SCSI is not set
2623 +CONFIG_SCSI=m
2624 +CONFIG_SCSI_DMA=y
2625 +# CONFIG_SCSI_TGT is not set
2626 # CONFIG_SCSI_NETLINK is not set
2627 -# CONFIG_ATA is not set
2628 +# CONFIG_SCSI_PROC_FS is not set
2629
2630 #
2631 -# Multi-device support (RAID and LVM)
2632 +# SCSI support type (disk, tape, CD-ROM)
2633 #
2634 -# CONFIG_MD is not set
2635 +CONFIG_BLK_DEV_SD=m
2636 +# CONFIG_CHR_DEV_ST is not set
2637 +# CONFIG_CHR_DEV_OSST is not set
2638 +CONFIG_BLK_DEV_SR=m
2639 +# CONFIG_BLK_DEV_SR_VENDOR is not set
2640 +# CONFIG_CHR_DEV_SG is not set
2641 +# CONFIG_CHR_DEV_SCH is not set
2642
2643 #
2644 -# Network device support
2645 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
2646 +#
2647 +# CONFIG_SCSI_MULTI_LUN is not set
2648 +# CONFIG_SCSI_CONSTANTS is not set
2649 +# CONFIG_SCSI_LOGGING is not set
2650 +# CONFIG_SCSI_SCAN_ASYNC is not set
2651 +CONFIG_SCSI_WAIT_SCAN=m
2652 +
2653 #
2654 +# SCSI Transports
2655 +#
2656 +# CONFIG_SCSI_SPI_ATTRS is not set
2657 +# CONFIG_SCSI_FC_ATTRS is not set
2658 +# CONFIG_SCSI_ISCSI_ATTRS is not set
2659 +# CONFIG_SCSI_SAS_LIBSAS is not set
2660 +# CONFIG_SCSI_SRP_ATTRS is not set
2661 +# CONFIG_SCSI_LOWLEVEL is not set
2662 +CONFIG_ATA=m
2663 +# CONFIG_ATA_NONSTANDARD is not set
2664 +CONFIG_PATA_AT32=m
2665 +# CONFIG_PATA_PLATFORM is not set
2666 +# CONFIG_MD is not set
2667 CONFIG_NETDEVICES=y
2668 -CONFIG_DUMMY=y
2669 +# CONFIG_NETDEVICES_MULTIQUEUE is not set
2670 +# CONFIG_DUMMY is not set
2671 # CONFIG_BONDING is not set
2672 +# CONFIG_MACVLAN is not set
2673 # CONFIG_EQUALIZER is not set
2674 CONFIG_TUN=m
2675 -# CONFIG_PHYLIB is not set
2676 -
2677 -#
2678 -# Ethernet (10 or 100Mbit)
2679 -#
2680 +# CONFIG_VETH is not set
2681 +CONFIG_PHYLIB=y
2682 +
2683 +#
2684 +# MII PHY device drivers
2685 +#
2686 +# CONFIG_MARVELL_PHY is not set
2687 +# CONFIG_DAVICOM_PHY is not set
2688 +# CONFIG_QSEMI_PHY is not set
2689 +# CONFIG_LXT_PHY is not set
2690 +# CONFIG_CICADA_PHY is not set
2691 +# CONFIG_VITESSE_PHY is not set
2692 +# CONFIG_SMSC_PHY is not set
2693 +# CONFIG_BROADCOM_PHY is not set
2694 +# CONFIG_ICPLUS_PHY is not set
2695 +# CONFIG_FIXED_PHY is not set
2696 +# CONFIG_MDIO_BITBANG is not set
2697 CONFIG_NET_ETHERNET=y
2698 -CONFIG_MII=y
2699 +# CONFIG_MII is not set
2700 CONFIG_MACB=y
2701 +# CONFIG_IBM_NEW_EMAC_ZMII is not set
2702 +# CONFIG_IBM_NEW_EMAC_RGMII is not set
2703 +# CONFIG_IBM_NEW_EMAC_TAH is not set
2704 +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
2705 +# CONFIG_B44 is not set
2706 # CONFIG_NETDEV_1000 is not set
2707 # CONFIG_NETDEV_10000 is not set
2708
2709 @@ -423,27 +503,54 @@ CONFIG_PPP_DEFLATE=m
2710 CONFIG_PPP_BSDCOMP=m
2711 # CONFIG_PPP_MPPE is not set
2712 # CONFIG_PPPOE is not set
2713 +# CONFIG_PPPOL2TP is not set
2714 # CONFIG_SLIP is not set
2715 CONFIG_SLHC=m
2716 # CONFIG_SHAPER is not set
2717 # CONFIG_NETCONSOLE is not set
2718 # CONFIG_NETPOLL is not set
2719 # CONFIG_NET_POLL_CONTROLLER is not set
2720 +# CONFIG_ISDN is not set
2721 +# CONFIG_PHONE is not set
2722
2723 #
2724 -# ISDN subsystem
2725 +# Input device support
2726 #
2727 -# CONFIG_ISDN is not set
2728 +CONFIG_INPUT=m
2729 +# CONFIG_INPUT_FF_MEMLESS is not set
2730 +CONFIG_INPUT_POLLDEV=m
2731
2732 #
2733 -# Telephony Support
2734 +# Userland interfaces
2735 #
2736 -# CONFIG_PHONE is not set
2737 +CONFIG_INPUT_MOUSEDEV=m
2738 +CONFIG_INPUT_MOUSEDEV_PSAUX=y
2739 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
2740 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
2741 +# CONFIG_INPUT_JOYDEV is not set
2742 +CONFIG_INPUT_EVDEV=m
2743 +# CONFIG_INPUT_EVBUG is not set
2744
2745 #
2746 -# Input device support
2747 +# Input Device Drivers
2748 #
2749 -# CONFIG_INPUT is not set
2750 +CONFIG_INPUT_KEYBOARD=y
2751 +# CONFIG_KEYBOARD_ATKBD is not set
2752 +# CONFIG_KEYBOARD_SUNKBD is not set
2753 +# CONFIG_KEYBOARD_LKKBD is not set
2754 +# CONFIG_KEYBOARD_XTKBD is not set
2755 +# CONFIG_KEYBOARD_NEWTON is not set
2756 +# CONFIG_KEYBOARD_STOWAWAY is not set
2757 +CONFIG_KEYBOARD_GPIO=m
2758 +CONFIG_INPUT_MOUSE=y
2759 +# CONFIG_MOUSE_PS2 is not set
2760 +# CONFIG_MOUSE_SERIAL is not set
2761 +# CONFIG_MOUSE_VSXXXAA is not set
2762 +CONFIG_MOUSE_GPIO=m
2763 +# CONFIG_INPUT_JOYSTICK is not set
2764 +# CONFIG_INPUT_TABLET is not set
2765 +# CONFIG_INPUT_TOUCHSCREEN is not set
2766 +# CONFIG_INPUT_MISC is not set
2767
2768 #
2769 # Hardware I/O ports
2770 @@ -467,40 +574,94 @@ CONFIG_SLHC=m
2771 #
2772 CONFIG_SERIAL_ATMEL=y
2773 CONFIG_SERIAL_ATMEL_CONSOLE=y
2774 +CONFIG_SERIAL_ATMEL_PDC=y
2775 # CONFIG_SERIAL_ATMEL_TTYAT is not set
2776 CONFIG_SERIAL_CORE=y
2777 CONFIG_SERIAL_CORE_CONSOLE=y
2778 CONFIG_UNIX98_PTYS=y
2779 # CONFIG_LEGACY_PTYS is not set
2780 -
2781 -#
2782 -# IPMI
2783 -#
2784 # CONFIG_IPMI_HANDLER is not set
2785 -# CONFIG_WATCHDOG is not set
2786 # CONFIG_HW_RANDOM is not set
2787 # CONFIG_RTC is not set
2788 # CONFIG_GEN_RTC is not set
2789 # CONFIG_R3964 is not set
2790 # CONFIG_RAW_DRIVER is not set
2791 +# CONFIG_TCG_TPM is not set
2792 +CONFIG_I2C=m
2793 +CONFIG_I2C_BOARDINFO=y
2794 +CONFIG_I2C_CHARDEV=m
2795
2796 #
2797 -# TPM devices
2798 +# I2C Algorithms
2799 #
2800 -# CONFIG_TCG_TPM is not set
2801 -# CONFIG_I2C is not set
2802 +CONFIG_I2C_ALGOBIT=m
2803 +# CONFIG_I2C_ALGOPCF is not set
2804 +# CONFIG_I2C_ALGOPCA is not set
2805 +
2806 +#
2807 +# I2C Hardware Bus support
2808 +#
2809 +CONFIG_I2C_ATMELTWI=m
2810 +CONFIG_I2C_GPIO=m
2811 +# CONFIG_I2C_OCORES is not set
2812 +# CONFIG_I2C_PARPORT_LIGHT is not set
2813 +# CONFIG_I2C_SIMTEC is not set
2814 +# CONFIG_I2C_TAOS_EVM is not set
2815 +# CONFIG_I2C_STUB is not set
2816 +
2817 +#
2818 +# Miscellaneous I2C Chip support
2819 +#
2820 +# CONFIG_SENSORS_DS1337 is not set
2821 +# CONFIG_SENSORS_DS1374 is not set
2822 +# CONFIG_DS1682 is not set
2823 +# CONFIG_SENSORS_EEPROM is not set
2824 +# CONFIG_SENSORS_PCF8574 is not set
2825 +# CONFIG_SENSORS_PCA9539 is not set
2826 +# CONFIG_SENSORS_PCF8591 is not set
2827 +# CONFIG_SENSORS_MAX6875 is not set
2828 +# CONFIG_SENSORS_TSL2550 is not set
2829 +# CONFIG_I2C_DEBUG_CORE is not set
2830 +# CONFIG_I2C_DEBUG_ALGO is not set
2831 +# CONFIG_I2C_DEBUG_BUS is not set
2832 +# CONFIG_I2C_DEBUG_CHIP is not set
2833
2834 #
2835 # SPI support
2836 #
2837 -# CONFIG_SPI is not set
2838 -# CONFIG_SPI_MASTER is not set
2839 +CONFIG_SPI=y
2840 +# CONFIG_SPI_DEBUG is not set
2841 +CONFIG_SPI_MASTER=y
2842
2843 #
2844 -# Dallas's 1-wire bus
2845 +# SPI Master Controller Drivers
2846 +#
2847 +CONFIG_SPI_ATMEL=y
2848 +# CONFIG_SPI_BITBANG is not set
2849 +
2850 #
2851 +# SPI Protocol Masters
2852 +#
2853 +# CONFIG_SPI_AT25 is not set
2854 +CONFIG_SPI_SPIDEV=m
2855 +# CONFIG_SPI_TLE62X0 is not set
2856 # CONFIG_W1 is not set
2857 +# CONFIG_POWER_SUPPLY is not set
2858 # CONFIG_HWMON is not set
2859 +CONFIG_WATCHDOG=y
2860 +# CONFIG_WATCHDOG_NOWAYOUT is not set
2861 +
2862 +#
2863 +# Watchdog Device Drivers
2864 +#
2865 +# CONFIG_SOFT_WATCHDOG is not set
2866 +CONFIG_AT32AP700X_WDT=y
2867 +
2868 +#
2869 +# Sonics Silicon Backplane
2870 +#
2871 +CONFIG_SSB_POSSIBLE=y
2872 +# CONFIG_SSB is not set
2873
2874 #
2875 # Multifunction device drivers
2876 @@ -517,23 +678,104 @@ CONFIG_UNIX98_PTYS=y
2877 #
2878 # Graphics support
2879 #
2880 -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
2881 +# CONFIG_VGASTATE is not set
2882 +# CONFIG_VIDEO_OUTPUT_CONTROL is not set
2883 +CONFIG_FB=y
2884 +# CONFIG_FIRMWARE_EDID is not set
2885 +# CONFIG_FB_DDC is not set
2886 +CONFIG_FB_CFB_FILLRECT=y
2887 +CONFIG_FB_CFB_COPYAREA=y
2888 +CONFIG_FB_CFB_IMAGEBLIT=y
2889 +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
2890 +# CONFIG_FB_SYS_FILLRECT is not set
2891 +# CONFIG_FB_SYS_COPYAREA is not set
2892 +# CONFIG_FB_SYS_IMAGEBLIT is not set
2893 +# CONFIG_FB_SYS_FOPS is not set
2894 +CONFIG_FB_DEFERRED_IO=y
2895 +# CONFIG_FB_SVGALIB is not set
2896 +# CONFIG_FB_MACMODES is not set
2897 +# CONFIG_FB_BACKLIGHT is not set
2898 +# CONFIG_FB_MODE_HELPERS is not set
2899 +# CONFIG_FB_TILEBLITTING is not set
2900 +
2901 +#
2902 +# Frame buffer hardware drivers
2903 +#
2904 +# CONFIG_FB_S1D13XXX is not set
2905 +CONFIG_FB_ATMEL=y
2906 +# CONFIG_FB_VIRTUAL is not set
2907 +CONFIG_BACKLIGHT_LCD_SUPPORT=y
2908 +CONFIG_LCD_CLASS_DEVICE=y
2909 +CONFIG_LCD_LTV350QV=y
2910 +# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
2911
2912 #
2913 # Display device support
2914 #
2915 # CONFIG_DISPLAY_SUPPORT is not set
2916 -# CONFIG_VGASTATE is not set
2917 -# CONFIG_FB is not set
2918 +# CONFIG_LOGO is not set
2919
2920 #
2921 # Sound
2922 #
2923 -# CONFIG_SOUND is not set
2924 +CONFIG_SOUND=m
2925 +
2926 +#
2927 +# Advanced Linux Sound Architecture
2928 +#
2929 +CONFIG_SND=m
2930 +CONFIG_SND_TIMER=m
2931 +CONFIG_SND_PCM=m
2932 +# CONFIG_SND_SEQUENCER is not set
2933 +CONFIG_SND_OSSEMUL=y
2934 +CONFIG_SND_MIXER_OSS=m
2935 +CONFIG_SND_PCM_OSS=m
2936 +CONFIG_SND_PCM_OSS_PLUGINS=y
2937 +# CONFIG_SND_DYNAMIC_MINORS is not set
2938 +# CONFIG_SND_SUPPORT_OLD_API is not set
2939 +# CONFIG_SND_VERBOSE_PROCFS is not set
2940 +# CONFIG_SND_VERBOSE_PRINTK is not set
2941 +# CONFIG_SND_DEBUG is not set
2942 +
2943 +#
2944 +# Generic devices
2945 +#
2946 +CONFIG_SND_AC97_CODEC=m
2947 +# CONFIG_SND_DUMMY is not set
2948 +# CONFIG_SND_MTPAV is not set
2949 +# CONFIG_SND_SERIAL_U16550 is not set
2950 +# CONFIG_SND_MPU401 is not set
2951 +
2952 +#
2953 +# AVR32 devices
2954 +#
2955 +CONFIG_SND_ATMEL_AC97=m
2956 +
2957 +#
2958 +# SPI devices
2959 +#
2960 +CONFIG_SND_AT73C213=m
2961 +CONFIG_SND_AT73C213_TARGET_BITRATE=48000
2962 +
2963 +#
2964 +# System on Chip audio support
2965 +#
2966 +# CONFIG_SND_SOC is not set
2967 +
2968 +#
2969 +# SoC Audio support for SuperH
2970 +#
2971
2972 #
2973 -# USB support
2974 +# Open Sound System
2975 #
2976 +CONFIG_SOUND_PRIME=m
2977 +# CONFIG_SOUND_MSNDCLAS is not set
2978 +# CONFIG_SOUND_MSNDPIN is not set
2979 +CONFIG_SOUND_AT32_ABDAC=m
2980 +CONFIG_AC97_BUS=m
2981 +# CONFIG_HID_SUPPORT is not set
2982 +CONFIG_USB_SUPPORT=y
2983 # CONFIG_USB_ARCH_HAS_HCD is not set
2984 # CONFIG_USB_ARCH_HAS_OHCI is not set
2985 # CONFIG_USB_ARCH_HAS_EHCI is not set
2986 @@ -545,63 +787,137 @@ CONFIG_UNIX98_PTYS=y
2987 #
2988 # USB Gadget Support
2989 #
2990 -# CONFIG_USB_GADGET is not set
2991 -# CONFIG_MMC is not set
2992 -
2993 -#
2994 -# LED devices
2995 -#
2996 -# CONFIG_NEW_LEDS is not set
2997 +CONFIG_USB_GADGET=y
2998 +# CONFIG_USB_GADGET_DEBUG is not set
2999 +# CONFIG_USB_GADGET_DEBUG_FILES is not set
3000 +# CONFIG_USB_GADGET_DEBUG_FS is not set
3001 +CONFIG_USB_GADGET_SELECTED=y
3002 +# CONFIG_USB_GADGET_AMD5536UDC is not set
3003 +CONFIG_USB_GADGET_ATMEL_USBA=y
3004 +CONFIG_USB_ATMEL_USBA=y
3005 +# CONFIG_USB_GADGET_FSL_USB2 is not set
3006 +# CONFIG_USB_GADGET_NET2280 is not set
3007 +# CONFIG_USB_GADGET_PXA2XX is not set
3008 +# CONFIG_USB_GADGET_M66592 is not set
3009 +# CONFIG_USB_GADGET_GOKU is not set
3010 +# CONFIG_USB_GADGET_LH7A40X is not set
3011 +# CONFIG_USB_GADGET_OMAP is not set
3012 +# CONFIG_USB_GADGET_S3C2410 is not set
3013 +# CONFIG_USB_GADGET_AT91 is not set
3014 +# CONFIG_USB_GADGET_DUMMY_HCD is not set
3015 +CONFIG_USB_GADGET_DUALSPEED=y
3016 +CONFIG_USB_ZERO=m
3017 +CONFIG_USB_ETH=m
3018 +CONFIG_USB_ETH_RNDIS=y
3019 +CONFIG_USB_GADGETFS=m
3020 +CONFIG_USB_FILE_STORAGE=m
3021 +# CONFIG_USB_FILE_STORAGE_TEST is not set
3022 +CONFIG_USB_G_SERIAL=m
3023 +# CONFIG_USB_MIDI_GADGET is not set
3024 +CONFIG_MMC=y
3025 +# CONFIG_MMC_DEBUG is not set
3026 +# CONFIG_MMC_UNSAFE_RESUME is not set
3027 +
3028 +#
3029 +# MMC/SD Card Drivers
3030 +#
3031 +CONFIG_MMC_BLOCK=y
3032 +# CONFIG_MMC_BLOCK_BOUNCE is not set
3033 +# CONFIG_SDIO_UART is not set
3034 +
3035 +#
3036 +# MMC/SD Host Controller Drivers
3037 +#
3038 +CONFIG_MMC_ATMELMCI=y
3039 +CONFIG_MMC_SPI=m
3040 +CONFIG_NEW_LEDS=y
3041 +CONFIG_LEDS_CLASS=m
3042
3043 #
3044 # LED drivers
3045 #
3046 +CONFIG_LEDS_ATMEL_PWM=m
3047 +CONFIG_LEDS_GPIO=m
3048
3049 #
3050 # LED Triggers
3051 #
3052 +CONFIG_LEDS_TRIGGERS=y
3053 +CONFIG_LEDS_TRIGGER_TIMER=m
3054 +CONFIG_LEDS_TRIGGER_HEARTBEAT=m
3055 +CONFIG_RTC_LIB=y
3056 +CONFIG_RTC_CLASS=y
3057 +CONFIG_RTC_HCTOSYS=y
3058 +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
3059 +# CONFIG_RTC_DEBUG is not set
3060
3061 #
3062 -# InfiniBand support
3063 +# RTC interfaces
3064 #
3065 +CONFIG_RTC_INTF_SYSFS=y
3066 +CONFIG_RTC_INTF_PROC=y
3067 +CONFIG_RTC_INTF_DEV=y
3068 +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
3069 +# CONFIG_RTC_DRV_TEST is not set
3070
3071 #
3072 -# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
3073 +# I2C RTC drivers
3074 #
3075 +# CONFIG_RTC_DRV_DS1307 is not set
3076 +# CONFIG_RTC_DRV_DS1374 is not set
3077 +# CONFIG_RTC_DRV_DS1672 is not set
3078 +# CONFIG_RTC_DRV_MAX6900 is not set
3079 +# CONFIG_RTC_DRV_RS5C372 is not set
3080 +# CONFIG_RTC_DRV_ISL1208 is not set
3081 +# CONFIG_RTC_DRV_X1205 is not set
3082 +# CONFIG_RTC_DRV_PCF8563 is not set
3083 +# CONFIG_RTC_DRV_PCF8583 is not set
3084 +# CONFIG_RTC_DRV_M41T80 is not set
3085
3086 #
3087 -# Real Time Clock
3088 +# SPI RTC drivers
3089 #
3090 -# CONFIG_RTC_CLASS is not set
3091 +# CONFIG_RTC_DRV_RS5C348 is not set
3092 +# CONFIG_RTC_DRV_MAX6902 is not set
3093
3094 #
3095 -# DMA Engine support
3096 +# Platform RTC drivers
3097 #
3098 -# CONFIG_DMA_ENGINE is not set
3099 +# CONFIG_RTC_DRV_DS1553 is not set
3100 +# CONFIG_RTC_DRV_STK17TA8 is not set
3101 +# CONFIG_RTC_DRV_DS1742 is not set
3102 +# CONFIG_RTC_DRV_M48T86 is not set
3103 +# CONFIG_RTC_DRV_M48T59 is not set
3104 +# CONFIG_RTC_DRV_V3020 is not set
3105
3106 #
3107 -# DMA Clients
3108 +# on-CPU RTC drivers
3109 #
3110 +CONFIG_RTC_DRV_AT32AP700X=y
3111
3112 #
3113 -# DMA Devices
3114 +# Userspace I/O
3115 #
3116 +# CONFIG_UIO is not set
3117
3118 #
3119 # File systems
3120 #
3121 -CONFIG_EXT2_FS=m
3122 +CONFIG_EXT2_FS=y
3123 # CONFIG_EXT2_FS_XATTR is not set
3124 # CONFIG_EXT2_FS_XIP is not set
3125 -# CONFIG_EXT3_FS is not set
3126 +CONFIG_EXT3_FS=y
3127 +# CONFIG_EXT3_FS_XATTR is not set
3128 # CONFIG_EXT4DEV_FS is not set
3129 +CONFIG_JBD=y
3130 +# CONFIG_JBD_DEBUG is not set
3131 # CONFIG_REISERFS_FS is not set
3132 # CONFIG_JFS_FS is not set
3133 # CONFIG_FS_POSIX_ACL is not set
3134 # CONFIG_XFS_FS is not set
3135 # CONFIG_GFS2_FS is not set
3136 # CONFIG_OCFS2_FS is not set
3137 -CONFIG_MINIX_FS=m
3138 +# CONFIG_MINIX_FS is not set
3139 # CONFIG_ROMFS_FS is not set
3140 CONFIG_INOTIFY=y
3141 CONFIG_INOTIFY_USER=y
3142 @@ -609,7 +925,7 @@ CONFIG_INOTIFY_USER=y
3143 # CONFIG_DNOTIFY is not set
3144 # CONFIG_AUTOFS_FS is not set
3145 # CONFIG_AUTOFS4_FS is not set
3146 -# CONFIG_FUSE_FS is not set
3147 +CONFIG_FUSE_FS=m
3148
3149 #
3150 # CD-ROM/DVD Filesystems
3151 @@ -637,8 +953,7 @@ CONFIG_SYSFS=y
3152 CONFIG_TMPFS=y
3153 # CONFIG_TMPFS_POSIX_ACL is not set
3154 # CONFIG_HUGETLB_PAGE is not set
3155 -CONFIG_RAMFS=y
3156 -CONFIG_CONFIGFS_FS=m
3157 +CONFIG_CONFIGFS_FS=y
3158
3159 #
3160 # Miscellaneous filesystems
3161 @@ -652,11 +967,12 @@ CONFIG_CONFIGFS_FS=m
3162 # CONFIG_EFS_FS is not set
3163 CONFIG_JFFS2_FS=y
3164 CONFIG_JFFS2_FS_DEBUG=0
3165 -CONFIG_JFFS2_FS_WRITEBUFFER=y
3166 +# CONFIG_JFFS2_FS_WRITEBUFFER is not set
3167 # CONFIG_JFFS2_SUMMARY is not set
3168 # CONFIG_JFFS2_FS_XATTR is not set
3169 # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
3170 CONFIG_JFFS2_ZLIB=y
3171 +# CONFIG_JFFS2_LZO is not set
3172 CONFIG_JFFS2_RTIME=y
3173 # CONFIG_JFFS2_RUBIN is not set
3174 # CONFIG_CRAMFS is not set
3175 @@ -665,10 +981,7 @@ CONFIG_JFFS2_RTIME=y
3176 # CONFIG_QNX4FS_FS is not set
3177 # CONFIG_SYSV_FS is not set
3178 # CONFIG_UFS_FS is not set
3179 -
3180 -#
3181 -# Network File Systems
3182 -#
3183 +CONFIG_NETWORK_FILESYSTEMS=y
3184 CONFIG_NFS_FS=y
3185 CONFIG_NFS_V3=y
3186 # CONFIG_NFS_V3_ACL is not set
3187 @@ -688,17 +1001,12 @@ CONFIG_SUNRPC=y
3188 # CONFIG_NCP_FS is not set
3189 # CONFIG_CODA_FS is not set
3190 # CONFIG_AFS_FS is not set
3191 -# CONFIG_9P_FS is not set
3192
3193 #
3194 # Partition Types
3195 #
3196 # CONFIG_PARTITION_ADVANCED is not set
3197 CONFIG_MSDOS_PARTITION=y
3198 -
3199 -#
3200 -# Native Language Support
3201 -#
3202 CONFIG_NLS=m
3203 CONFIG_NLS_DEFAULT="iso8859-1"
3204 CONFIG_NLS_CODEPAGE_437=m
3205 @@ -739,17 +1047,18 @@ CONFIG_NLS_ISO8859_1=m
3206 # CONFIG_NLS_KOI8_R is not set
3207 # CONFIG_NLS_KOI8_U is not set
3208 CONFIG_NLS_UTF8=m
3209 -
3210 -#
3211 -# Distributed Lock Manager
3212 -#
3213 # CONFIG_DLM is not set
3214 +CONFIG_INSTRUMENTATION=y
3215 +CONFIG_PROFILING=y
3216 +CONFIG_OPROFILE=m
3217 +CONFIG_KPROBES=y
3218 +# CONFIG_MARKERS is not set
3219
3220 #
3221 # Kernel hacking
3222 #
3223 -CONFIG_TRACE_IRQFLAGS_SUPPORT=y
3224 # CONFIG_PRINTK_TIME is not set
3225 +CONFIG_ENABLE_WARN_DEPRECATED=y
3226 CONFIG_ENABLE_MUST_CHECK=y
3227 CONFIG_MAGIC_SYSRQ=y
3228 # CONFIG_UNUSED_SYMBOLS is not set
3229 @@ -758,12 +1067,17 @@ CONFIG_DEBUG_FS=y
3230 CONFIG_DEBUG_KERNEL=y
3231 # CONFIG_DEBUG_SHIRQ is not set
3232 CONFIG_DETECT_SOFTLOCKUP=y
3233 +CONFIG_SCHED_DEBUG=y
3234 # CONFIG_SCHEDSTATS is not set
3235 # CONFIG_TIMER_STATS is not set
3236 +# CONFIG_SLUB_DEBUG_ON is not set
3237 # CONFIG_DEBUG_RT_MUTEXES is not set
3238 # CONFIG_RT_MUTEX_TESTER is not set
3239 # CONFIG_DEBUG_SPINLOCK is not set
3240 # CONFIG_DEBUG_MUTEXES is not set
3241 +# CONFIG_DEBUG_LOCK_ALLOC is not set
3242 +# CONFIG_PROVE_LOCKING is not set
3243 +# CONFIG_LOCK_STAT is not set
3244 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
3245 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
3246 # CONFIG_DEBUG_KOBJECT is not set
3247 @@ -771,22 +1085,63 @@ CONFIG_DEBUG_BUGVERBOSE=y
3248 # CONFIG_DEBUG_INFO is not set
3249 # CONFIG_DEBUG_VM is not set
3250 # CONFIG_DEBUG_LIST is not set
3251 +# CONFIG_DEBUG_SG is not set
3252 CONFIG_FRAME_POINTER=y
3253 CONFIG_FORCED_INLINING=y
3254 +# CONFIG_BOOT_PRINTK_DELAY is not set
3255 # CONFIG_RCU_TORTURE_TEST is not set
3256 +# CONFIG_LKDTM is not set
3257 # CONFIG_FAULT_INJECTION is not set
3258 -# CONFIG_KPROBES is not set
3259 +# CONFIG_SAMPLES is not set
3260
3261 #
3262 # Security options
3263 #
3264 # CONFIG_KEYS is not set
3265 # CONFIG_SECURITY is not set
3266 -
3267 -#
3268 -# Cryptographic options
3269 -#
3270 -# CONFIG_CRYPTO is not set
3271 +# CONFIG_SECURITY_FILE_CAPABILITIES is not set
3272 +CONFIG_CRYPTO=y
3273 +CONFIG_CRYPTO_ALGAPI=m
3274 +CONFIG_CRYPTO_BLKCIPHER=m
3275 +CONFIG_CRYPTO_HASH=m
3276 +CONFIG_CRYPTO_MANAGER=m
3277 +CONFIG_CRYPTO_HMAC=m
3278 +# CONFIG_CRYPTO_XCBC is not set
3279 +# CONFIG_CRYPTO_NULL is not set
3280 +# CONFIG_CRYPTO_MD4 is not set
3281 +CONFIG_CRYPTO_MD5=m
3282 +CONFIG_CRYPTO_SHA1=m
3283 +# CONFIG_CRYPTO_SHA256 is not set
3284 +# CONFIG_CRYPTO_SHA512 is not set
3285 +# CONFIG_CRYPTO_WP512 is not set
3286 +# CONFIG_CRYPTO_TGR192 is not set
3287 +# CONFIG_CRYPTO_GF128MUL is not set
3288 +# CONFIG_CRYPTO_ECB is not set
3289 +CONFIG_CRYPTO_CBC=m
3290 +# CONFIG_CRYPTO_PCBC is not set
3291 +# CONFIG_CRYPTO_LRW is not set
3292 +# CONFIG_CRYPTO_XTS is not set
3293 +# CONFIG_CRYPTO_CRYPTD is not set
3294 +CONFIG_CRYPTO_DES=m
3295 +# CONFIG_CRYPTO_FCRYPT is not set
3296 +# CONFIG_CRYPTO_BLOWFISH is not set
3297 +# CONFIG_CRYPTO_TWOFISH is not set
3298 +# CONFIG_CRYPTO_SERPENT is not set
3299 +# CONFIG_CRYPTO_AES is not set
3300 +# CONFIG_CRYPTO_CAST5 is not set
3301 +# CONFIG_CRYPTO_CAST6 is not set
3302 +# CONFIG_CRYPTO_TEA is not set
3303 +# CONFIG_CRYPTO_ARC4 is not set
3304 +# CONFIG_CRYPTO_KHAZAD is not set
3305 +# CONFIG_CRYPTO_ANUBIS is not set
3306 +# CONFIG_CRYPTO_SEED is not set
3307 +CONFIG_CRYPTO_DEFLATE=m
3308 +# CONFIG_CRYPTO_MICHAEL_MIC is not set
3309 +# CONFIG_CRYPTO_CRC32C is not set
3310 +# CONFIG_CRYPTO_CAMELLIA is not set
3311 +# CONFIG_CRYPTO_TEST is not set
3312 +# CONFIG_CRYPTO_AUTHENC is not set
3313 +# CONFIG_CRYPTO_HW is not set
3314
3315 #
3316 # Library routines
3317 @@ -794,10 +1149,10 @@ CONFIG_FORCED_INLINING=y
3318 CONFIG_BITREVERSE=y
3319 CONFIG_CRC_CCITT=m
3320 # CONFIG_CRC16 is not set
3321 -# CONFIG_CRC_ITU_T is not set
3322 +CONFIG_CRC_ITU_T=m
3323 CONFIG_CRC32=y
3324 +CONFIG_CRC7=m
3325 # CONFIG_LIBCRC32C is not set
3326 -CONFIG_AUDIT_GENERIC=y
3327 CONFIG_ZLIB_INFLATE=y
3328 CONFIG_ZLIB_DEFLATE=y
3329 CONFIG_PLIST=y
3330 diff --git a/arch/avr32/configs/atstk1003_defconfig b/arch/avr32/configs/atstk1003_defconfig
3331 new file mode 100644
3332 index 0000000..d8a6595
3333 --- /dev/null
3334 +++ b/arch/avr32/configs/atstk1003_defconfig
3335 @@ -0,0 +1,1032 @@
3336 +#
3337 +# Automatically generated make config: don't edit
3338 +# Linux kernel version: 2.6.24
3339 +# Tue Feb 5 18:08:36 2008
3340 +#
3341 +CONFIG_AVR32=y
3342 +CONFIG_GENERIC_GPIO=y
3343 +CONFIG_GENERIC_HARDIRQS=y
3344 +CONFIG_STACKTRACE_SUPPORT=y
3345 +CONFIG_LOCKDEP_SUPPORT=y
3346 +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
3347 +CONFIG_HARDIRQS_SW_RESEND=y
3348 +CONFIG_GENERIC_IRQ_PROBE=y
3349 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
3350 +CONFIG_GENERIC_TIME=y
3351 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
3352 +# CONFIG_ARCH_HAS_ILOG2_U32 is not set
3353 +# CONFIG_ARCH_HAS_ILOG2_U64 is not set
3354 +CONFIG_ARCH_SUPPORTS_OPROFILE=y
3355 +CONFIG_GENERIC_HWEIGHT=y
3356 +CONFIG_GENERIC_CALIBRATE_DELAY=y
3357 +CONFIG_GENERIC_BUG=y
3358 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
3359 +
3360 +#
3361 +# General setup
3362 +#
3363 +CONFIG_EXPERIMENTAL=y
3364 +CONFIG_BROKEN_ON_SMP=y
3365 +CONFIG_INIT_ENV_ARG_LIMIT=32
3366 +CONFIG_LOCALVERSION=""
3367 +# CONFIG_LOCALVERSION_AUTO is not set
3368 +CONFIG_SWAP=y
3369 +CONFIG_SYSVIPC=y
3370 +CONFIG_SYSVIPC_SYSCTL=y
3371 +CONFIG_POSIX_MQUEUE=y
3372 +CONFIG_BSD_PROCESS_ACCT=y
3373 +CONFIG_BSD_PROCESS_ACCT_V3=y
3374 +CONFIG_TASKSTATS=y
3375 +CONFIG_TASK_DELAY_ACCT=y
3376 +# CONFIG_TASK_XACCT is not set
3377 +# CONFIG_USER_NS is not set
3378 +# CONFIG_PID_NS is not set
3379 +CONFIG_AUDIT=y
3380 +# CONFIG_IKCONFIG is not set
3381 +CONFIG_LOG_BUF_SHIFT=14
3382 +# CONFIG_CGROUPS is not set
3383 +CONFIG_FAIR_GROUP_SCHED=y
3384 +CONFIG_FAIR_USER_SCHED=y
3385 +# CONFIG_FAIR_CGROUP_SCHED is not set
3386 +CONFIG_SYSFS_DEPRECATED=y
3387 +CONFIG_RELAY=y
3388 +CONFIG_BLK_DEV_INITRD=y
3389 +CONFIG_INITRAMFS_SOURCE=""
3390 +CONFIG_CC_OPTIMIZE_FOR_SIZE=y
3391 +CONFIG_SYSCTL=y
3392 +CONFIG_EMBEDDED=y
3393 +# CONFIG_SYSCTL_SYSCALL is not set
3394 +CONFIG_KALLSYMS=y
3395 +# CONFIG_KALLSYMS_ALL is not set
3396 +# CONFIG_KALLSYMS_EXTRA_PASS is not set
3397 +CONFIG_HOTPLUG=y
3398 +CONFIG_PRINTK=y
3399 +CONFIG_BUG=y
3400 +CONFIG_ELF_CORE=y
3401 +# CONFIG_BASE_FULL is not set
3402 +CONFIG_FUTEX=y
3403 +CONFIG_ANON_INODES=y
3404 +CONFIG_EPOLL=y
3405 +CONFIG_SIGNALFD=y
3406 +CONFIG_EVENTFD=y
3407 +CONFIG_SHMEM=y
3408 +CONFIG_VM_EVENT_COUNTERS=y
3409 +# CONFIG_SLUB_DEBUG is not set
3410 +# CONFIG_SLAB is not set
3411 +CONFIG_SLUB=y
3412 +# CONFIG_SLOB is not set
3413 +CONFIG_SLABINFO=y
3414 +CONFIG_RT_MUTEXES=y
3415 +# CONFIG_TINY_SHMEM is not set
3416 +CONFIG_BASE_SMALL=1
3417 +CONFIG_MODULES=y
3418 +CONFIG_MODULE_UNLOAD=y
3419 +# CONFIG_MODULE_FORCE_UNLOAD is not set
3420 +# CONFIG_MODVERSIONS is not set
3421 +# CONFIG_MODULE_SRCVERSION_ALL is not set
3422 +# CONFIG_KMOD is not set
3423 +CONFIG_BLOCK=y
3424 +# CONFIG_LBD is not set
3425 +# CONFIG_BLK_DEV_IO_TRACE is not set
3426 +# CONFIG_LSF is not set
3427 +# CONFIG_BLK_DEV_BSG is not set
3428 +
3429 +#
3430 +# IO Schedulers
3431 +#
3432 +CONFIG_IOSCHED_NOOP=y
3433 +# CONFIG_IOSCHED_AS is not set
3434 +# CONFIG_IOSCHED_DEADLINE is not set
3435 +CONFIG_IOSCHED_CFQ=y
3436 +# CONFIG_DEFAULT_AS is not set
3437 +# CONFIG_DEFAULT_DEADLINE is not set
3438 +CONFIG_DEFAULT_CFQ=y
3439 +# CONFIG_DEFAULT_NOOP is not set
3440 +CONFIG_DEFAULT_IOSCHED="cfq"
3441 +
3442 +#
3443 +# System Type and features
3444 +#
3445 +CONFIG_SUBARCH_AVR32B=y
3446 +CONFIG_MMU=y
3447 +CONFIG_PERFORMANCE_COUNTERS=y
3448 +CONFIG_PLATFORM_AT32AP=y
3449 +CONFIG_CPU_AT32AP700X=y
3450 +CONFIG_CPU_AT32AP7001=y
3451 +CONFIG_BOARD_ATSTK1000=y
3452 +# CONFIG_BOARD_ATNGW100 is not set
3453 +# CONFIG_BOARD_ATSTK1002 is not set
3454 +CONFIG_BOARD_ATSTK1003=y
3455 +# CONFIG_BOARD_ATSTK1004 is not set
3456 +# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
3457 +# CONFIG_BOARD_ATSTK100X_SPI1 is not set
3458 +# CONFIG_BOARD_ATSTK1000_J2_LED is not set
3459 +# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
3460 +# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
3461 +CONFIG_BOARD_ATSTK1000_EXTDAC=y
3462 +# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set
3463 +# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set
3464 +CONFIG_LOADER_U_BOOT=y
3465 +
3466 +#
3467 +# Atmel AVR32 AP options
3468 +#
3469 +# CONFIG_AP700X_32_BIT_SMC is not set
3470 +CONFIG_AP700X_16_BIT_SMC=y
3471 +# CONFIG_AP700X_8_BIT_SMC is not set
3472 +CONFIG_GPIO_DEV=y
3473 +CONFIG_LOAD_ADDRESS=0x10000000
3474 +CONFIG_ENTRY_ADDRESS=0x90000000
3475 +CONFIG_PHYS_OFFSET=0x10000000
3476 +CONFIG_PREEMPT_NONE=y
3477 +# CONFIG_PREEMPT_VOLUNTARY is not set
3478 +# CONFIG_PREEMPT is not set
3479 +# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
3480 +# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
3481 +# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
3482 +CONFIG_ARCH_FLATMEM_ENABLE=y
3483 +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
3484 +# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
3485 +CONFIG_SELECT_MEMORY_MODEL=y
3486 +CONFIG_FLATMEM_MANUAL=y
3487 +# CONFIG_DISCONTIGMEM_MANUAL is not set
3488 +# CONFIG_SPARSEMEM_MANUAL is not set
3489 +CONFIG_FLATMEM=y
3490 +CONFIG_FLAT_NODE_MEM_MAP=y
3491 +# CONFIG_SPARSEMEM_STATIC is not set
3492 +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
3493 +CONFIG_SPLIT_PTLOCK_CPUS=4
3494 +# CONFIG_RESOURCES_64BIT is not set
3495 +CONFIG_ZONE_DMA_FLAG=0
3496 +CONFIG_VIRT_TO_BUS=y
3497 +# CONFIG_OWNERSHIP_TRACE is not set
3498 +CONFIG_NMI_DEBUGGING=y
3499 +CONFIG_DW_DMAC=y
3500 +# CONFIG_HZ_100 is not set
3501 +CONFIG_HZ_250=y
3502 +# CONFIG_HZ_300 is not set
3503 +# CONFIG_HZ_1000 is not set
3504 +CONFIG_HZ=250
3505 +CONFIG_CMDLINE=""
3506 +
3507 +#
3508 +# Power management options
3509 +#
3510 +
3511 +#
3512 +# CPU Frequency scaling
3513 +#
3514 +CONFIG_CPU_FREQ=y
3515 +CONFIG_CPU_FREQ_TABLE=y
3516 +# CONFIG_CPU_FREQ_DEBUG is not set
3517 +# CONFIG_CPU_FREQ_STAT is not set
3518 +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
3519 +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
3520 +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
3521 +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
3522 +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
3523 +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
3524 +CONFIG_CPU_FREQ_GOV_USERSPACE=y
3525 +CONFIG_CPU_FREQ_GOV_ONDEMAND=y
3526 +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
3527 +CONFIG_CPU_FREQ_AT32AP=y
3528 +
3529 +#
3530 +# Bus options
3531 +#
3532 +# CONFIG_ARCH_SUPPORTS_MSI is not set
3533 +# CONFIG_PCCARD is not set
3534 +
3535 +#
3536 +# Executable file formats
3537 +#
3538 +CONFIG_BINFMT_ELF=y
3539 +# CONFIG_BINFMT_MISC is not set
3540 +
3541 +#
3542 +# Networking
3543 +#
3544 +CONFIG_NET=y
3545 +
3546 +#
3547 +# Networking options
3548 +#
3549 +CONFIG_PACKET=y
3550 +CONFIG_PACKET_MMAP=y
3551 +CONFIG_UNIX=y
3552 +# CONFIG_NET_KEY is not set
3553 +CONFIG_INET=y
3554 +# CONFIG_IP_MULTICAST is not set
3555 +# CONFIG_IP_ADVANCED_ROUTER is not set
3556 +CONFIG_IP_FIB_HASH=y
3557 +# CONFIG_IP_PNP is not set
3558 +# CONFIG_NET_IPIP is not set
3559 +# CONFIG_NET_IPGRE is not set
3560 +# CONFIG_ARPD is not set
3561 +# CONFIG_SYN_COOKIES is not set
3562 +# CONFIG_INET_AH is not set
3563 +# CONFIG_INET_ESP is not set
3564 +# CONFIG_INET_IPCOMP is not set
3565 +# CONFIG_INET_XFRM_TUNNEL is not set
3566 +# CONFIG_INET_TUNNEL is not set
3567 +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
3568 +# CONFIG_INET_XFRM_MODE_TUNNEL is not set
3569 +# CONFIG_INET_XFRM_MODE_BEET is not set
3570 +# CONFIG_INET_LRO is not set
3571 +# CONFIG_INET_DIAG is not set
3572 +# CONFIG_TCP_CONG_ADVANCED is not set
3573 +CONFIG_TCP_CONG_CUBIC=y
3574 +CONFIG_DEFAULT_TCP_CONG="cubic"
3575 +# CONFIG_TCP_MD5SIG is not set
3576 +# CONFIG_IPV6 is not set
3577 +# CONFIG_INET6_XFRM_TUNNEL is not set
3578 +# CONFIG_INET6_TUNNEL is not set
3579 +# CONFIG_NETWORK_SECMARK is not set
3580 +# CONFIG_NETFILTER is not set
3581 +# CONFIG_IP_DCCP is not set
3582 +# CONFIG_IP_SCTP is not set
3583 +# CONFIG_TIPC is not set
3584 +# CONFIG_ATM is not set
3585 +# CONFIG_BRIDGE is not set
3586 +# CONFIG_VLAN_8021Q is not set
3587 +# CONFIG_DECNET is not set
3588 +# CONFIG_LLC2 is not set
3589 +# CONFIG_IPX is not set
3590 +# CONFIG_ATALK is not set
3591 +# CONFIG_X25 is not set
3592 +# CONFIG_LAPB is not set
3593 +# CONFIG_ECONET is not set
3594 +# CONFIG_WAN_ROUTER is not set
3595 +# CONFIG_NET_SCHED is not set
3596 +
3597 +#
3598 +# Network testing
3599 +#
3600 +# CONFIG_NET_PKTGEN is not set
3601 +# CONFIG_NET_TCPPROBE is not set
3602 +# CONFIG_HAMRADIO is not set
3603 +# CONFIG_IRDA is not set
3604 +# CONFIG_BT is not set
3605 +# CONFIG_AF_RXRPC is not set
3606 +
3607 +#
3608 +# Wireless
3609 +#
3610 +# CONFIG_CFG80211 is not set
3611 +# CONFIG_WIRELESS_EXT is not set
3612 +# CONFIG_MAC80211 is not set
3613 +# CONFIG_IEEE80211 is not set
3614 +# CONFIG_RFKILL is not set
3615 +# CONFIG_NET_9P is not set
3616 +
3617 +#
3618 +# Device Drivers
3619 +#
3620 +
3621 +#
3622 +# Generic Driver Options
3623 +#
3624 +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
3625 +CONFIG_STANDALONE=y
3626 +# CONFIG_PREVENT_FIRMWARE_BUILD is not set
3627 +# CONFIG_FW_LOADER is not set
3628 +# CONFIG_DEBUG_DRIVER is not set
3629 +# CONFIG_DEBUG_DEVRES is not set
3630 +# CONFIG_SYS_HYPERVISOR is not set
3631 +# CONFIG_CONNECTOR is not set
3632 +CONFIG_MTD=y
3633 +# CONFIG_MTD_DEBUG is not set
3634 +# CONFIG_MTD_CONCAT is not set
3635 +CONFIG_MTD_PARTITIONS=y
3636 +# CONFIG_MTD_REDBOOT_PARTS is not set
3637 +CONFIG_MTD_CMDLINE_PARTS=y
3638 +
3639 +#
3640 +# User Modules And Translation Layers
3641 +#
3642 +CONFIG_MTD_CHAR=y
3643 +CONFIG_MTD_BLKDEVS=y
3644 +CONFIG_MTD_BLOCK=y
3645 +# CONFIG_FTL is not set
3646 +# CONFIG_NFTL is not set
3647 +# CONFIG_INFTL is not set
3648 +# CONFIG_RFD_FTL is not set
3649 +# CONFIG_SSFDC is not set
3650 +# CONFIG_MTD_OOPS is not set
3651 +
3652 +#
3653 +# RAM/ROM/Flash chip drivers
3654 +#
3655 +CONFIG_MTD_CFI=y
3656 +# CONFIG_MTD_JEDECPROBE is not set
3657 +CONFIG_MTD_GEN_PROBE=y
3658 +# CONFIG_MTD_CFI_ADV_OPTIONS is not set
3659 +CONFIG_MTD_MAP_BANK_WIDTH_1=y
3660 +CONFIG_MTD_MAP_BANK_WIDTH_2=y
3661 +CONFIG_MTD_MAP_BANK_WIDTH_4=y
3662 +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
3663 +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
3664 +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
3665 +CONFIG_MTD_CFI_I1=y
3666 +CONFIG_MTD_CFI_I2=y
3667 +# CONFIG_MTD_CFI_I4 is not set
3668 +# CONFIG_MTD_CFI_I8 is not set
3669 +# CONFIG_MTD_CFI_INTELEXT is not set
3670 +CONFIG_MTD_CFI_AMDSTD=y
3671 +# CONFIG_MTD_CFI_STAA is not set
3672 +CONFIG_MTD_CFI_UTIL=y
3673 +# CONFIG_MTD_RAM is not set
3674 +# CONFIG_MTD_ROM is not set
3675 +# CONFIG_MTD_ABSENT is not set
3676 +
3677 +#
3678 +# Mapping drivers for chip access
3679 +#
3680 +# CONFIG_MTD_COMPLEX_MAPPINGS is not set
3681 +CONFIG_MTD_PHYSMAP=y
3682 +CONFIG_MTD_PHYSMAP_START=0x8000000
3683 +CONFIG_MTD_PHYSMAP_LEN=0x0
3684 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2
3685 +# CONFIG_MTD_PLATRAM is not set
3686 +
3687 +#
3688 +# Self-contained MTD device drivers
3689 +#
3690 +CONFIG_MTD_DATAFLASH=m
3691 +CONFIG_MTD_M25P80=m
3692 +# CONFIG_MTD_SLRAM is not set
3693 +# CONFIG_MTD_PHRAM is not set
3694 +# CONFIG_MTD_MTDRAM is not set
3695 +# CONFIG_MTD_BLOCK2MTD is not set
3696 +
3697 +#
3698 +# Disk-On-Chip Device Drivers
3699 +#
3700 +# CONFIG_MTD_DOC2000 is not set
3701 +# CONFIG_MTD_DOC2001 is not set
3702 +# CONFIG_MTD_DOC2001PLUS is not set
3703 +# CONFIG_MTD_NAND is not set
3704 +# CONFIG_MTD_ONENAND is not set
3705 +
3706 +#
3707 +# UBI - Unsorted block images
3708 +#
3709 +# CONFIG_MTD_UBI is not set
3710 +# CONFIG_PARPORT is not set
3711 +CONFIG_BLK_DEV=y
3712 +# CONFIG_BLK_DEV_COW_COMMON is not set
3713 +CONFIG_BLK_DEV_LOOP=m
3714 +# CONFIG_BLK_DEV_CRYPTOLOOP is not set
3715 +CONFIG_BLK_DEV_NBD=m
3716 +CONFIG_BLK_DEV_RAM=m
3717 +CONFIG_BLK_DEV_RAM_COUNT=16
3718 +CONFIG_BLK_DEV_RAM_SIZE=4096
3719 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
3720 +# CONFIG_CDROM_PKTCDVD is not set
3721 +# CONFIG_ATA_OVER_ETH is not set
3722 +CONFIG_MISC_DEVICES=y
3723 +CONFIG_ATMEL_PWM=m
3724 +# CONFIG_EEPROM_93CX6 is not set
3725 +CONFIG_ATMEL_SSC=m
3726 +# CONFIG_IDE is not set
3727 +
3728 +#
3729 +# SCSI device support
3730 +#
3731 +# CONFIG_RAID_ATTRS is not set
3732 +CONFIG_SCSI=m
3733 +CONFIG_SCSI_DMA=y
3734 +# CONFIG_SCSI_TGT is not set
3735 +# CONFIG_SCSI_NETLINK is not set
3736 +# CONFIG_SCSI_PROC_FS is not set
3737 +
3738 +#
3739 +# SCSI support type (disk, tape, CD-ROM)
3740 +#
3741 +CONFIG_BLK_DEV_SD=m
3742 +# CONFIG_CHR_DEV_ST is not set
3743 +# CONFIG_CHR_DEV_OSST is not set
3744 +CONFIG_BLK_DEV_SR=m
3745 +# CONFIG_BLK_DEV_SR_VENDOR is not set
3746 +# CONFIG_CHR_DEV_SG is not set
3747 +# CONFIG_CHR_DEV_SCH is not set
3748 +
3749 +#
3750 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
3751 +#
3752 +# CONFIG_SCSI_MULTI_LUN is not set
3753 +# CONFIG_SCSI_CONSTANTS is not set
3754 +# CONFIG_SCSI_LOGGING is not set
3755 +# CONFIG_SCSI_SCAN_ASYNC is not set
3756 +CONFIG_SCSI_WAIT_SCAN=m
3757 +
3758 +#
3759 +# SCSI Transports
3760 +#
3761 +# CONFIG_SCSI_SPI_ATTRS is not set
3762 +# CONFIG_SCSI_FC_ATTRS is not set
3763 +# CONFIG_SCSI_ISCSI_ATTRS is not set
3764 +# CONFIG_SCSI_SAS_LIBSAS is not set
3765 +# CONFIG_SCSI_SRP_ATTRS is not set
3766 +CONFIG_SCSI_LOWLEVEL=y
3767 +# CONFIG_ISCSI_TCP is not set
3768 +# CONFIG_SCSI_DEBUG is not set
3769 +CONFIG_ATA=m
3770 +# CONFIG_ATA_NONSTANDARD is not set
3771 +CONFIG_PATA_AT32=m
3772 +# CONFIG_PATA_PLATFORM is not set
3773 +# CONFIG_MD is not set
3774 +CONFIG_NETDEVICES=y
3775 +# CONFIG_NETDEVICES_MULTIQUEUE is not set
3776 +# CONFIG_DUMMY is not set
3777 +# CONFIG_BONDING is not set
3778 +# CONFIG_MACVLAN is not set
3779 +# CONFIG_EQUALIZER is not set
3780 +# CONFIG_TUN is not set
3781 +# CONFIG_VETH is not set
3782 +# CONFIG_NET_ETHERNET is not set
3783 +# CONFIG_NETDEV_1000 is not set
3784 +# CONFIG_NETDEV_10000 is not set
3785 +
3786 +#
3787 +# Wireless LAN
3788 +#
3789 +# CONFIG_WLAN_PRE80211 is not set
3790 +# CONFIG_WLAN_80211 is not set
3791 +# CONFIG_WAN is not set
3792 +CONFIG_PPP=m
3793 +# CONFIG_PPP_MULTILINK is not set
3794 +# CONFIG_PPP_FILTER is not set
3795 +CONFIG_PPP_ASYNC=m
3796 +# CONFIG_PPP_SYNC_TTY is not set
3797 +CONFIG_PPP_DEFLATE=m
3798 +CONFIG_PPP_BSDCOMP=m
3799 +# CONFIG_PPP_MPPE is not set
3800 +# CONFIG_PPPOE is not set
3801 +# CONFIG_PPPOL2TP is not set
3802 +# CONFIG_SLIP is not set
3803 +CONFIG_SLHC=m
3804 +# CONFIG_SHAPER is not set
3805 +# CONFIG_NETCONSOLE is not set
3806 +# CONFIG_NETPOLL is not set
3807 +# CONFIG_NET_POLL_CONTROLLER is not set
3808 +# CONFIG_ISDN is not set
3809 +# CONFIG_PHONE is not set
3810 +
3811 +#
3812 +# Input device support
3813 +#
3814 +CONFIG_INPUT=m
3815 +# CONFIG_INPUT_FF_MEMLESS is not set
3816 +CONFIG_INPUT_POLLDEV=m
3817 +
3818 +#
3819 +# Userland interfaces
3820 +#
3821 +CONFIG_INPUT_MOUSEDEV=m
3822 +CONFIG_INPUT_MOUSEDEV_PSAUX=y
3823 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
3824 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
3825 +# CONFIG_INPUT_JOYDEV is not set
3826 +# CONFIG_INPUT_EVDEV is not set
3827 +# CONFIG_INPUT_EVBUG is not set
3828 +
3829 +#
3830 +# Input Device Drivers
3831 +#
3832 +CONFIG_INPUT_KEYBOARD=y
3833 +# CONFIG_KEYBOARD_ATKBD is not set
3834 +# CONFIG_KEYBOARD_SUNKBD is not set
3835 +# CONFIG_KEYBOARD_LKKBD is not set
3836 +# CONFIG_KEYBOARD_XTKBD is not set
3837 +# CONFIG_KEYBOARD_NEWTON is not set
3838 +# CONFIG_KEYBOARD_STOWAWAY is not set
3839 +CONFIG_KEYBOARD_GPIO=m
3840 +CONFIG_INPUT_MOUSE=y
3841 +# CONFIG_MOUSE_PS2 is not set
3842 +# CONFIG_MOUSE_SERIAL is not set
3843 +# CONFIG_MOUSE_VSXXXAA is not set
3844 +CONFIG_MOUSE_GPIO=m
3845 +# CONFIG_INPUT_JOYSTICK is not set
3846 +# CONFIG_INPUT_TABLET is not set
3847 +# CONFIG_INPUT_TOUCHSCREEN is not set
3848 +# CONFIG_INPUT_MISC is not set
3849 +
3850 +#
3851 +# Hardware I/O ports
3852 +#
3853 +# CONFIG_SERIO is not set
3854 +# CONFIG_GAMEPORT is not set
3855 +
3856 +#
3857 +# Character devices
3858 +#
3859 +# CONFIG_VT is not set
3860 +# CONFIG_SERIAL_NONSTANDARD is not set
3861 +
3862 +#
3863 +# Serial drivers
3864 +#
3865 +# CONFIG_SERIAL_8250 is not set
3866 +
3867 +#
3868 +# Non-8250 serial port support
3869 +#
3870 +CONFIG_SERIAL_ATMEL=y
3871 +CONFIG_SERIAL_ATMEL_CONSOLE=y
3872 +CONFIG_SERIAL_ATMEL_PDC=y
3873 +# CONFIG_SERIAL_ATMEL_TTYAT is not set
3874 +CONFIG_SERIAL_CORE=y
3875 +CONFIG_SERIAL_CORE_CONSOLE=y
3876 +CONFIG_UNIX98_PTYS=y
3877 +# CONFIG_LEGACY_PTYS is not set
3878 +# CONFIG_IPMI_HANDLER is not set
3879 +# CONFIG_HW_RANDOM is not set
3880 +# CONFIG_RTC is not set
3881 +# CONFIG_GEN_RTC is not set
3882 +# CONFIG_R3964 is not set
3883 +# CONFIG_RAW_DRIVER is not set
3884 +# CONFIG_TCG_TPM is not set
3885 +CONFIG_I2C=m
3886 +CONFIG_I2C_BOARDINFO=y
3887 +CONFIG_I2C_CHARDEV=m
3888 +
3889 +#
3890 +# I2C Algorithms
3891 +#
3892 +CONFIG_I2C_ALGOBIT=m
3893 +# CONFIG_I2C_ALGOPCF is not set
3894 +# CONFIG_I2C_ALGOPCA is not set
3895 +
3896 +#
3897 +# I2C Hardware Bus support
3898 +#
3899 +CONFIG_I2C_ATMELTWI=m
3900 +CONFIG_I2C_GPIO=m
3901 +# CONFIG_I2C_OCORES is not set
3902 +# CONFIG_I2C_PARPORT_LIGHT is not set
3903 +# CONFIG_I2C_SIMTEC is not set
3904 +# CONFIG_I2C_TAOS_EVM is not set
3905 +# CONFIG_I2C_STUB is not set
3906 +
3907 +#
3908 +# Miscellaneous I2C Chip support
3909 +#
3910 +# CONFIG_SENSORS_DS1337 is not set
3911 +# CONFIG_SENSORS_DS1374 is not set
3912 +# CONFIG_DS1682 is not set
3913 +# CONFIG_SENSORS_EEPROM is not set
3914 +# CONFIG_SENSORS_PCF8574 is not set
3915 +# CONFIG_SENSORS_PCA9539 is not set
3916 +# CONFIG_SENSORS_PCF8591 is not set
3917 +# CONFIG_SENSORS_MAX6875 is not set
3918 +# CONFIG_SENSORS_TSL2550 is not set
3919 +# CONFIG_I2C_DEBUG_CORE is not set
3920 +# CONFIG_I2C_DEBUG_ALGO is not set
3921 +# CONFIG_I2C_DEBUG_BUS is not set
3922 +# CONFIG_I2C_DEBUG_CHIP is not set
3923 +
3924 +#
3925 +# SPI support
3926 +#
3927 +CONFIG_SPI=y
3928 +# CONFIG_SPI_DEBUG is not set
3929 +CONFIG_SPI_MASTER=y
3930 +
3931 +#
3932 +# SPI Master Controller Drivers
3933 +#
3934 +CONFIG_SPI_ATMEL=y
3935 +# CONFIG_SPI_BITBANG is not set
3936 +
3937 +#
3938 +# SPI Protocol Masters
3939 +#
3940 +# CONFIG_SPI_AT25 is not set
3941 +CONFIG_SPI_SPIDEV=m
3942 +# CONFIG_SPI_TLE62X0 is not set
3943 +# CONFIG_W1 is not set
3944 +# CONFIG_POWER_SUPPLY is not set
3945 +# CONFIG_HWMON is not set
3946 +CONFIG_WATCHDOG=y
3947 +# CONFIG_WATCHDOG_NOWAYOUT is not set
3948 +
3949 +#
3950 +# Watchdog Device Drivers
3951 +#
3952 +# CONFIG_SOFT_WATCHDOG is not set
3953 +CONFIG_AT32AP700X_WDT=y
3954 +
3955 +#
3956 +# Sonics Silicon Backplane
3957 +#
3958 +CONFIG_SSB_POSSIBLE=y
3959 +# CONFIG_SSB is not set
3960 +
3961 +#
3962 +# Multifunction device drivers
3963 +#
3964 +# CONFIG_MFD_SM501 is not set
3965 +
3966 +#
3967 +# Multimedia devices
3968 +#
3969 +# CONFIG_VIDEO_DEV is not set
3970 +# CONFIG_DVB_CORE is not set
3971 +# CONFIG_DAB is not set
3972 +
3973 +#
3974 +# Graphics support
3975 +#
3976 +# CONFIG_VGASTATE is not set
3977 +# CONFIG_VIDEO_OUTPUT_CONTROL is not set
3978 +# CONFIG_FB is not set
3979 +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
3980 +
3981 +#
3982 +# Display device support
3983 +#
3984 +# CONFIG_DISPLAY_SUPPORT is not set
3985 +
3986 +#
3987 +# Sound
3988 +#
3989 +CONFIG_SOUND=m
3990 +
3991 +#
3992 +# Advanced Linux Sound Architecture
3993 +#
3994 +CONFIG_SND=m
3995 +CONFIG_SND_TIMER=m
3996 +CONFIG_SND_PCM=m
3997 +# CONFIG_SND_SEQUENCER is not set
3998 +CONFIG_SND_OSSEMUL=y
3999 +CONFIG_SND_MIXER_OSS=m
4000 +CONFIG_SND_PCM_OSS=m
4001 +CONFIG_SND_PCM_OSS_PLUGINS=y
4002 +# CONFIG_SND_DYNAMIC_MINORS is not set
4003 +CONFIG_SND_SUPPORT_OLD_API=y
4004 +CONFIG_SND_VERBOSE_PROCFS=y
4005 +# CONFIG_SND_VERBOSE_PRINTK is not set
4006 +# CONFIG_SND_DEBUG is not set
4007 +
4008 +#
4009 +# Generic devices
4010 +#
4011 +CONFIG_SND_AC97_CODEC=m
4012 +# CONFIG_SND_DUMMY is not set
4013 +# CONFIG_SND_MTPAV is not set
4014 +# CONFIG_SND_SERIAL_U16550 is not set
4015 +# CONFIG_SND_MPU401 is not set
4016 +
4017 +#
4018 +# AVR32 devices
4019 +#
4020 +CONFIG_SND_ATMEL_AC97=m
4021 +
4022 +#
4023 +# SPI devices
4024 +#
4025 +CONFIG_SND_AT73C213=m
4026 +CONFIG_SND_AT73C213_TARGET_BITRATE=48000
4027 +
4028 +#
4029 +# System on Chip audio support
4030 +#
4031 +# CONFIG_SND_SOC is not set
4032 +
4033 +#
4034 +# SoC Audio support for SuperH
4035 +#
4036 +
4037 +#
4038 +# Open Sound System
4039 +#
4040 +# CONFIG_SOUND_PRIME is not set
4041 +CONFIG_AC97_BUS=m
4042 +# CONFIG_HID_SUPPORT is not set
4043 +CONFIG_USB_SUPPORT=y
4044 +# CONFIG_USB_ARCH_HAS_HCD is not set
4045 +# CONFIG_USB_ARCH_HAS_OHCI is not set
4046 +# CONFIG_USB_ARCH_HAS_EHCI is not set
4047 +
4048 +#
4049 +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
4050 +#
4051 +
4052 +#
4053 +# USB Gadget Support
4054 +#
4055 +CONFIG_USB_GADGET=y
4056 +# CONFIG_USB_GADGET_DEBUG is not set
4057 +# CONFIG_USB_GADGET_DEBUG_FILES is not set
4058 +CONFIG_USB_GADGET_DEBUG_FS=y
4059 +CONFIG_USB_GADGET_SELECTED=y
4060 +# CONFIG_USB_GADGET_AMD5536UDC is not set
4061 +CONFIG_USB_GADGET_ATMEL_USBA=y
4062 +CONFIG_USB_ATMEL_USBA=y
4063 +# CONFIG_USB_GADGET_FSL_USB2 is not set
4064 +# CONFIG_USB_GADGET_NET2280 is not set
4065 +# CONFIG_USB_GADGET_PXA2XX is not set
4066 +# CONFIG_USB_GADGET_M66592 is not set
4067 +# CONFIG_USB_GADGET_GOKU is not set
4068 +# CONFIG_USB_GADGET_LH7A40X is not set
4069 +# CONFIG_USB_GADGET_OMAP is not set
4070 +# CONFIG_USB_GADGET_S3C2410 is not set
4071 +# CONFIG_USB_GADGET_AT91 is not set
4072 +# CONFIG_USB_GADGET_DUMMY_HCD is not set
4073 +CONFIG_USB_GADGET_DUALSPEED=y
4074 +CONFIG_USB_ZERO=m
4075 +CONFIG_USB_ETH=m
4076 +CONFIG_USB_ETH_RNDIS=y
4077 +CONFIG_USB_GADGETFS=m
4078 +CONFIG_USB_FILE_STORAGE=m
4079 +# CONFIG_USB_FILE_STORAGE_TEST is not set
4080 +CONFIG_USB_G_SERIAL=m
4081 +# CONFIG_USB_MIDI_GADGET is not set
4082 +CONFIG_MMC=y
4083 +# CONFIG_MMC_DEBUG is not set
4084 +# CONFIG_MMC_UNSAFE_RESUME is not set
4085 +
4086 +#
4087 +# MMC/SD Card Drivers
4088 +#
4089 +CONFIG_MMC_BLOCK=y
4090 +# CONFIG_MMC_BLOCK_BOUNCE is not set
4091 +# CONFIG_SDIO_UART is not set
4092 +
4093 +#
4094 +# MMC/SD Host Controller Drivers
4095 +#
4096 +CONFIG_MMC_ATMELMCI=y
4097 +CONFIG_MMC_SPI=m
4098 +CONFIG_NEW_LEDS=y
4099 +CONFIG_LEDS_CLASS=y
4100 +
4101 +#
4102 +# LED drivers
4103 +#
4104 +CONFIG_LEDS_ATMEL_PWM=m
4105 +CONFIG_LEDS_GPIO=y
4106 +
4107 +#
4108 +# LED Triggers
4109 +#
4110 +CONFIG_LEDS_TRIGGERS=y
4111 +CONFIG_LEDS_TRIGGER_TIMER=y
4112 +CONFIG_LEDS_TRIGGER_HEARTBEAT=y
4113 +CONFIG_RTC_LIB=y
4114 +CONFIG_RTC_CLASS=y
4115 +CONFIG_RTC_HCTOSYS=y
4116 +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
4117 +# CONFIG_RTC_DEBUG is not set
4118 +
4119 +#
4120 +# RTC interfaces
4121 +#
4122 +CONFIG_RTC_INTF_SYSFS=y
4123 +CONFIG_RTC_INTF_PROC=y
4124 +CONFIG_RTC_INTF_DEV=y
4125 +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
4126 +# CONFIG_RTC_DRV_TEST is not set
4127 +
4128 +#
4129 +# I2C RTC drivers
4130 +#
4131 +# CONFIG_RTC_DRV_DS1307 is not set
4132 +# CONFIG_RTC_DRV_DS1374 is not set
4133 +# CONFIG_RTC_DRV_DS1672 is not set
4134 +# CONFIG_RTC_DRV_MAX6900 is not set
4135 +# CONFIG_RTC_DRV_RS5C372 is not set
4136 +# CONFIG_RTC_DRV_ISL1208 is not set
4137 +# CONFIG_RTC_DRV_X1205 is not set
4138 +# CONFIG_RTC_DRV_PCF8563 is not set
4139 +# CONFIG_RTC_DRV_PCF8583 is not set
4140 +# CONFIG_RTC_DRV_M41T80 is not set
4141 +
4142 +#
4143 +# SPI RTC drivers
4144 +#
4145 +# CONFIG_RTC_DRV_RS5C348 is not set
4146 +# CONFIG_RTC_DRV_MAX6902 is not set
4147 +
4148 +#
4149 +# Platform RTC drivers
4150 +#
4151 +# CONFIG_RTC_DRV_DS1553 is not set
4152 +# CONFIG_RTC_DRV_STK17TA8 is not set
4153 +# CONFIG_RTC_DRV_DS1742 is not set
4154 +# CONFIG_RTC_DRV_M48T86 is not set
4155 +# CONFIG_RTC_DRV_M48T59 is not set
4156 +# CONFIG_RTC_DRV_V3020 is not set
4157 +
4158 +#
4159 +# on-CPU RTC drivers
4160 +#
4161 +CONFIG_RTC_DRV_AT32AP700X=y
4162 +
4163 +#
4164 +# Userspace I/O
4165 +#
4166 +CONFIG_UIO=m
4167 +
4168 +#
4169 +# File systems
4170 +#
4171 +CONFIG_EXT2_FS=m
4172 +# CONFIG_EXT2_FS_XATTR is not set
4173 +# CONFIG_EXT2_FS_XIP is not set
4174 +CONFIG_EXT3_FS=m
4175 +# CONFIG_EXT3_FS_XATTR is not set
4176 +# CONFIG_EXT4DEV_FS is not set
4177 +CONFIG_JBD=m
4178 +# CONFIG_JBD_DEBUG is not set
4179 +# CONFIG_REISERFS_FS is not set
4180 +# CONFIG_JFS_FS is not set
4181 +# CONFIG_FS_POSIX_ACL is not set
4182 +# CONFIG_XFS_FS is not set
4183 +# CONFIG_GFS2_FS is not set
4184 +# CONFIG_OCFS2_FS is not set
4185 +# CONFIG_MINIX_FS is not set
4186 +# CONFIG_ROMFS_FS is not set
4187 +CONFIG_INOTIFY=y
4188 +CONFIG_INOTIFY_USER=y
4189 +# CONFIG_QUOTA is not set
4190 +# CONFIG_DNOTIFY is not set
4191 +# CONFIG_AUTOFS_FS is not set
4192 +# CONFIG_AUTOFS4_FS is not set
4193 +CONFIG_FUSE_FS=m
4194 +
4195 +#
4196 +# CD-ROM/DVD Filesystems
4197 +#
4198 +# CONFIG_ISO9660_FS is not set
4199 +# CONFIG_UDF_FS is not set
4200 +
4201 +#
4202 +# DOS/FAT/NT Filesystems
4203 +#
4204 +CONFIG_FAT_FS=m
4205 +CONFIG_MSDOS_FS=m
4206 +CONFIG_VFAT_FS=m
4207 +CONFIG_FAT_DEFAULT_CODEPAGE=437
4208 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
4209 +# CONFIG_NTFS_FS is not set
4210 +
4211 +#
4212 +# Pseudo filesystems
4213 +#
4214 +CONFIG_PROC_FS=y
4215 +CONFIG_PROC_KCORE=y
4216 +CONFIG_PROC_SYSCTL=y
4217 +CONFIG_SYSFS=y
4218 +CONFIG_TMPFS=y
4219 +# CONFIG_TMPFS_POSIX_ACL is not set
4220 +# CONFIG_HUGETLB_PAGE is not set
4221 +CONFIG_CONFIGFS_FS=y
4222 +
4223 +#
4224 +# Miscellaneous filesystems
4225 +#
4226 +# CONFIG_ADFS_FS is not set
4227 +# CONFIG_AFFS_FS is not set
4228 +# CONFIG_HFS_FS is not set
4229 +# CONFIG_HFSPLUS_FS is not set
4230 +# CONFIG_BEFS_FS is not set
4231 +# CONFIG_BFS_FS is not set
4232 +# CONFIG_EFS_FS is not set
4233 +CONFIG_JFFS2_FS=y
4234 +CONFIG_JFFS2_FS_DEBUG=0
4235 +CONFIG_JFFS2_FS_WRITEBUFFER=y
4236 +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
4237 +# CONFIG_JFFS2_SUMMARY is not set
4238 +# CONFIG_JFFS2_FS_XATTR is not set
4239 +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
4240 +CONFIG_JFFS2_ZLIB=y
4241 +# CONFIG_JFFS2_LZO is not set
4242 +CONFIG_JFFS2_RTIME=y
4243 +# CONFIG_JFFS2_RUBIN is not set
4244 +# CONFIG_CRAMFS is not set
4245 +# CONFIG_VXFS_FS is not set
4246 +# CONFIG_HPFS_FS is not set
4247 +# CONFIG_QNX4FS_FS is not set
4248 +# CONFIG_SYSV_FS is not set
4249 +# CONFIG_UFS_FS is not set
4250 +# CONFIG_NETWORK_FILESYSTEMS is not set
4251 +
4252 +#
4253 +# Partition Types
4254 +#
4255 +# CONFIG_PARTITION_ADVANCED is not set
4256 +CONFIG_MSDOS_PARTITION=y
4257 +CONFIG_NLS=m
4258 +CONFIG_NLS_DEFAULT="iso8859-1"
4259 +CONFIG_NLS_CODEPAGE_437=m
4260 +# CONFIG_NLS_CODEPAGE_737 is not set
4261 +# CONFIG_NLS_CODEPAGE_775 is not set
4262 +# CONFIG_NLS_CODEPAGE_850 is not set
4263 +# CONFIG_NLS_CODEPAGE_852 is not set
4264 +# CONFIG_NLS_CODEPAGE_855 is not set
4265 +# CONFIG_NLS_CODEPAGE_857 is not set
4266 +# CONFIG_NLS_CODEPAGE_860 is not set
4267 +# CONFIG_NLS_CODEPAGE_861 is not set
4268 +# CONFIG_NLS_CODEPAGE_862 is not set
4269 +# CONFIG_NLS_CODEPAGE_863 is not set
4270 +# CONFIG_NLS_CODEPAGE_864 is not set
4271 +# CONFIG_NLS_CODEPAGE_865 is not set
4272 +# CONFIG_NLS_CODEPAGE_866 is not set
4273 +# CONFIG_NLS_CODEPAGE_869 is not set
4274 +# CONFIG_NLS_CODEPAGE_936 is not set
4275 +# CONFIG_NLS_CODEPAGE_950 is not set
4276 +# CONFIG_NLS_CODEPAGE_932 is not set
4277 +# CONFIG_NLS_CODEPAGE_949 is not set
4278 +# CONFIG_NLS_CODEPAGE_874 is not set
4279 +# CONFIG_NLS_ISO8859_8 is not set
4280 +# CONFIG_NLS_CODEPAGE_1250 is not set
4281 +# CONFIG_NLS_CODEPAGE_1251 is not set
4282 +# CONFIG_NLS_ASCII is not set
4283 +CONFIG_NLS_ISO8859_1=m
4284 +# CONFIG_NLS_ISO8859_2 is not set
4285 +# CONFIG_NLS_ISO8859_3 is not set
4286 +# CONFIG_NLS_ISO8859_4 is not set
4287 +# CONFIG_NLS_ISO8859_5 is not set
4288 +# CONFIG_NLS_ISO8859_6 is not set
4289 +# CONFIG_NLS_ISO8859_7 is not set
4290 +# CONFIG_NLS_ISO8859_9 is not set
4291 +# CONFIG_NLS_ISO8859_13 is not set
4292 +# CONFIG_NLS_ISO8859_14 is not set
4293 +# CONFIG_NLS_ISO8859_15 is not set
4294 +# CONFIG_NLS_KOI8_R is not set
4295 +# CONFIG_NLS_KOI8_U is not set
4296 +CONFIG_NLS_UTF8=m
4297 +# CONFIG_DLM is not set
4298 +CONFIG_INSTRUMENTATION=y
4299 +CONFIG_PROFILING=y
4300 +CONFIG_OPROFILE=m
4301 +CONFIG_KPROBES=y
4302 +# CONFIG_MARKERS is not set
4303 +
4304 +#
4305 +# Kernel hacking
4306 +#
4307 +# CONFIG_PRINTK_TIME is not set
4308 +CONFIG_ENABLE_WARN_DEPRECATED=y
4309 +CONFIG_ENABLE_MUST_CHECK=y
4310 +CONFIG_MAGIC_SYSRQ=y
4311 +# CONFIG_UNUSED_SYMBOLS is not set
4312 +CONFIG_DEBUG_FS=y
4313 +# CONFIG_HEADERS_CHECK is not set
4314 +CONFIG_DEBUG_KERNEL=y
4315 +# CONFIG_DEBUG_SHIRQ is not set
4316 +CONFIG_DETECT_SOFTLOCKUP=y
4317 +CONFIG_SCHED_DEBUG=y
4318 +# CONFIG_SCHEDSTATS is not set
4319 +# CONFIG_TIMER_STATS is not set
4320 +# CONFIG_DEBUG_RT_MUTEXES is not set
4321 +# CONFIG_RT_MUTEX_TESTER is not set
4322 +# CONFIG_DEBUG_SPINLOCK is not set
4323 +# CONFIG_DEBUG_MUTEXES is not set
4324 +# CONFIG_DEBUG_LOCK_ALLOC is not set
4325 +# CONFIG_PROVE_LOCKING is not set
4326 +# CONFIG_LOCK_STAT is not set
4327 +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
4328 +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
4329 +# CONFIG_DEBUG_KOBJECT is not set
4330 +CONFIG_DEBUG_BUGVERBOSE=y
4331 +# CONFIG_DEBUG_INFO is not set
4332 +# CONFIG_DEBUG_VM is not set
4333 +# CONFIG_DEBUG_LIST is not set
4334 +# CONFIG_DEBUG_SG is not set
4335 +CONFIG_FRAME_POINTER=y
4336 +CONFIG_FORCED_INLINING=y
4337 +# CONFIG_BOOT_PRINTK_DELAY is not set
4338 +# CONFIG_RCU_TORTURE_TEST is not set
4339 +# CONFIG_LKDTM is not set
4340 +# CONFIG_FAULT_INJECTION is not set
4341 +# CONFIG_SAMPLES is not set
4342 +
4343 +#
4344 +# Security options
4345 +#
4346 +# CONFIG_KEYS is not set
4347 +# CONFIG_SECURITY is not set
4348 +# CONFIG_SECURITY_FILE_CAPABILITIES is not set
4349 +# CONFIG_CRYPTO is not set
4350 +
4351 +#
4352 +# Library routines
4353 +#
4354 +CONFIG_BITREVERSE=y
4355 +CONFIG_CRC_CCITT=m
4356 +# CONFIG_CRC16 is not set
4357 +CONFIG_CRC_ITU_T=m
4358 +CONFIG_CRC32=y
4359 +CONFIG_CRC7=m
4360 +# CONFIG_LIBCRC32C is not set
4361 +CONFIG_AUDIT_GENERIC=y
4362 +CONFIG_ZLIB_INFLATE=y
4363 +CONFIG_ZLIB_DEFLATE=y
4364 +CONFIG_PLIST=y
4365 +CONFIG_HAS_IOMEM=y
4366 +CONFIG_HAS_IOPORT=y
4367 +CONFIG_HAS_DMA=y
4368 diff --git a/arch/avr32/configs/atstk1004_defconfig b/arch/avr32/configs/atstk1004_defconfig
4369 new file mode 100644
4370 index 0000000..559b065
4371 --- /dev/null
4372 +++ b/arch/avr32/configs/atstk1004_defconfig
4373 @@ -0,0 +1,627 @@
4374 +#
4375 +# Automatically generated make config: don't edit
4376 +# Linux kernel version: 2.6.24
4377 +# Tue Feb 5 18:13:33 2008
4378 +#
4379 +CONFIG_AVR32=y
4380 +CONFIG_GENERIC_GPIO=y
4381 +CONFIG_GENERIC_HARDIRQS=y
4382 +CONFIG_STACKTRACE_SUPPORT=y
4383 +CONFIG_LOCKDEP_SUPPORT=y
4384 +CONFIG_TRACE_IRQFLAGS_SUPPORT=y
4385 +CONFIG_HARDIRQS_SW_RESEND=y
4386 +CONFIG_GENERIC_IRQ_PROBE=y
4387 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
4388 +CONFIG_GENERIC_TIME=y
4389 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
4390 +# CONFIG_ARCH_HAS_ILOG2_U32 is not set
4391 +# CONFIG_ARCH_HAS_ILOG2_U64 is not set
4392 +CONFIG_ARCH_SUPPORTS_OPROFILE=y
4393 +CONFIG_GENERIC_HWEIGHT=y
4394 +CONFIG_GENERIC_CALIBRATE_DELAY=y
4395 +CONFIG_GENERIC_BUG=y
4396 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
4397 +
4398 +#
4399 +# General setup
4400 +#
4401 +CONFIG_EXPERIMENTAL=y
4402 +CONFIG_BROKEN_ON_SMP=y
4403 +CONFIG_INIT_ENV_ARG_LIMIT=32
4404 +CONFIG_LOCALVERSION=""
4405 +# CONFIG_LOCALVERSION_AUTO is not set
4406 +# CONFIG_SYSVIPC is not set
4407 +# CONFIG_POSIX_MQUEUE is not set
4408 +# CONFIG_BSD_PROCESS_ACCT is not set
4409 +# CONFIG_TASKSTATS is not set
4410 +# CONFIG_USER_NS is not set
4411 +# CONFIG_PID_NS is not set
4412 +# CONFIG_AUDIT is not set
4413 +# CONFIG_IKCONFIG is not set
4414 +CONFIG_LOG_BUF_SHIFT=14
4415 +# CONFIG_CGROUPS is not set
4416 +# CONFIG_FAIR_GROUP_SCHED is not set
4417 +CONFIG_SYSFS_DEPRECATED=y
4418 +# CONFIG_RELAY is not set
4419 +# CONFIG_BLK_DEV_INITRD is not set
4420 +CONFIG_CC_OPTIMIZE_FOR_SIZE=y
4421 +CONFIG_SYSCTL=y
4422 +CONFIG_EMBEDDED=y
4423 +# CONFIG_SYSCTL_SYSCALL is not set
4424 +CONFIG_KALLSYMS=y
4425 +# CONFIG_KALLSYMS_EXTRA_PASS is not set
4426 +CONFIG_HOTPLUG=y
4427 +CONFIG_PRINTK=y
4428 +CONFIG_BUG=y
4429 +CONFIG_ELF_CORE=y
4430 +# CONFIG_BASE_FULL is not set
4431 +# CONFIG_FUTEX is not set
4432 +# CONFIG_EPOLL is not set
4433 +# CONFIG_SIGNALFD is not set
4434 +# CONFIG_EVENTFD is not set
4435 +CONFIG_SHMEM=y
4436 +CONFIG_VM_EVENT_COUNTERS=y
4437 +# CONFIG_SLAB is not set
4438 +# CONFIG_SLUB is not set
4439 +CONFIG_SLOB=y
4440 +# CONFIG_TINY_SHMEM is not set
4441 +CONFIG_BASE_SMALL=1
4442 +# CONFIG_MODULES is not set
4443 +# CONFIG_BLOCK is not set
4444 +
4445 +#
4446 +# System Type and features
4447 +#
4448 +CONFIG_SUBARCH_AVR32B=y
4449 +CONFIG_MMU=y
4450 +CONFIG_PERFORMANCE_COUNTERS=y
4451 +CONFIG_PLATFORM_AT32AP=y
4452 +CONFIG_CPU_AT32AP700X=y
4453 +CONFIG_CPU_AT32AP7002=y
4454 +CONFIG_BOARD_ATSTK1000=y
4455 +# CONFIG_BOARD_ATNGW100 is not set
4456 +# CONFIG_BOARD_ATSTK1002 is not set
4457 +# CONFIG_BOARD_ATSTK1003 is not set
4458 +CONFIG_BOARD_ATSTK1004=y
4459 +# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
4460 +# CONFIG_BOARD_ATSTK100X_SPI1 is not set
4461 +# CONFIG_BOARD_ATSTK1000_J2_LED is not set
4462 +CONFIG_BOARD_ATSTK1000_EXTDAC=y
4463 +# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set
4464 +# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set
4465 +CONFIG_LOADER_U_BOOT=y
4466 +
4467 +#
4468 +# Atmel AVR32 AP options
4469 +#
4470 +# CONFIG_AP700X_32_BIT_SMC is not set
4471 +CONFIG_AP700X_16_BIT_SMC=y
4472 +# CONFIG_AP700X_8_BIT_SMC is not set
4473 +# CONFIG_GPIO_DEV is not set
4474 +CONFIG_LOAD_ADDRESS=0x10000000
4475 +CONFIG_ENTRY_ADDRESS=0x90000000
4476 +CONFIG_PHYS_OFFSET=0x10000000
4477 +CONFIG_PREEMPT_NONE=y
4478 +# CONFIG_PREEMPT_VOLUNTARY is not set
4479 +# CONFIG_PREEMPT is not set
4480 +# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
4481 +# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
4482 +# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
4483 +CONFIG_ARCH_FLATMEM_ENABLE=y
4484 +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
4485 +# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
4486 +CONFIG_SELECT_MEMORY_MODEL=y
4487 +CONFIG_FLATMEM_MANUAL=y
4488 +# CONFIG_DISCONTIGMEM_MANUAL is not set
4489 +# CONFIG_SPARSEMEM_MANUAL is not set
4490 +CONFIG_FLATMEM=y
4491 +CONFIG_FLAT_NODE_MEM_MAP=y
4492 +# CONFIG_SPARSEMEM_STATIC is not set
4493 +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
4494 +CONFIG_SPLIT_PTLOCK_CPUS=4
4495 +# CONFIG_RESOURCES_64BIT is not set
4496 +CONFIG_ZONE_DMA_FLAG=0
4497 +CONFIG_VIRT_TO_BUS=y
4498 +# CONFIG_OWNERSHIP_TRACE is not set
4499 +# CONFIG_NMI_DEBUGGING is not set
4500 +# CONFIG_DW_DMAC is not set
4501 +# CONFIG_HZ_100 is not set
4502 +CONFIG_HZ_250=y
4503 +# CONFIG_HZ_300 is not set
4504 +# CONFIG_HZ_1000 is not set
4505 +CONFIG_HZ=250
4506 +CONFIG_CMDLINE=""
4507 +
4508 +#
4509 +# Power management options
4510 +#
4511 +
4512 +#
4513 +# CPU Frequency scaling
4514 +#
4515 +CONFIG_CPU_FREQ=y
4516 +CONFIG_CPU_FREQ_TABLE=y
4517 +# CONFIG_CPU_FREQ_DEBUG is not set
4518 +# CONFIG_CPU_FREQ_STAT is not set
4519 +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
4520 +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
4521 +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
4522 +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
4523 +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
4524 +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
4525 +CONFIG_CPU_FREQ_GOV_USERSPACE=y
4526 +CONFIG_CPU_FREQ_GOV_ONDEMAND=y
4527 +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
4528 +CONFIG_CPU_FREQ_AT32AP=y
4529 +
4530 +#
4531 +# Bus options
4532 +#
4533 +# CONFIG_ARCH_SUPPORTS_MSI is not set
4534 +# CONFIG_PCCARD is not set
4535 +
4536 +#
4537 +# Executable file formats
4538 +#
4539 +CONFIG_BINFMT_ELF=y
4540 +# CONFIG_BINFMT_MISC is not set
4541 +
4542 +#
4543 +# Networking
4544 +#
4545 +CONFIG_NET=y
4546 +
4547 +#
4548 +# Networking options
4549 +#
4550 +CONFIG_PACKET=y
4551 +CONFIG_PACKET_MMAP=y
4552 +CONFIG_UNIX=y
4553 +# CONFIG_NET_KEY is not set
4554 +CONFIG_INET=y
4555 +# CONFIG_IP_MULTICAST is not set
4556 +# CONFIG_IP_ADVANCED_ROUTER is not set
4557 +CONFIG_IP_FIB_HASH=y
4558 +# CONFIG_IP_PNP is not set
4559 +# CONFIG_NET_IPIP is not set
4560 +# CONFIG_NET_IPGRE is not set
4561 +# CONFIG_ARPD is not set
4562 +# CONFIG_SYN_COOKIES is not set
4563 +# CONFIG_INET_AH is not set
4564 +# CONFIG_INET_ESP is not set
4565 +# CONFIG_INET_IPCOMP is not set
4566 +# CONFIG_INET_XFRM_TUNNEL is not set
4567 +# CONFIG_INET_TUNNEL is not set
4568 +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
4569 +# CONFIG_INET_XFRM_MODE_TUNNEL is not set
4570 +# CONFIG_INET_XFRM_MODE_BEET is not set
4571 +# CONFIG_INET_LRO is not set
4572 +# CONFIG_INET_DIAG is not set
4573 +# CONFIG_TCP_CONG_ADVANCED is not set
4574 +CONFIG_TCP_CONG_CUBIC=y
4575 +CONFIG_DEFAULT_TCP_CONG="cubic"
4576 +# CONFIG_TCP_MD5SIG is not set
4577 +# CONFIG_IPV6 is not set
4578 +# CONFIG_INET6_XFRM_TUNNEL is not set
4579 +# CONFIG_INET6_TUNNEL is not set
4580 +# CONFIG_NETWORK_SECMARK is not set
4581 +# CONFIG_NETFILTER is not set
4582 +# CONFIG_IP_DCCP is not set
4583 +# CONFIG_IP_SCTP is not set
4584 +# CONFIG_TIPC is not set
4585 +# CONFIG_ATM is not set
4586 +# CONFIG_BRIDGE is not set
4587 +# CONFIG_VLAN_8021Q is not set
4588 +# CONFIG_DECNET is not set
4589 +# CONFIG_LLC2 is not set
4590 +# CONFIG_IPX is not set
4591 +# CONFIG_ATALK is not set
4592 +# CONFIG_X25 is not set
4593 +# CONFIG_LAPB is not set
4594 +# CONFIG_ECONET is not set
4595 +# CONFIG_WAN_ROUTER is not set
4596 +# CONFIG_NET_SCHED is not set
4597 +
4598 +#
4599 +# Network testing
4600 +#
4601 +# CONFIG_NET_PKTGEN is not set
4602 +# CONFIG_HAMRADIO is not set
4603 +# CONFIG_IRDA is not set
4604 +# CONFIG_BT is not set
4605 +# CONFIG_AF_RXRPC is not set
4606 +
4607 +#
4608 +# Wireless
4609 +#
4610 +# CONFIG_CFG80211 is not set
4611 +# CONFIG_WIRELESS_EXT is not set
4612 +# CONFIG_MAC80211 is not set
4613 +# CONFIG_IEEE80211 is not set
4614 +# CONFIG_RFKILL is not set
4615 +# CONFIG_NET_9P is not set
4616 +
4617 +#
4618 +# Device Drivers
4619 +#
4620 +
4621 +#
4622 +# Generic Driver Options
4623 +#
4624 +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
4625 +CONFIG_STANDALONE=y
4626 +# CONFIG_PREVENT_FIRMWARE_BUILD is not set
4627 +# CONFIG_FW_LOADER is not set
4628 +# CONFIG_SYS_HYPERVISOR is not set
4629 +# CONFIG_CONNECTOR is not set
4630 +CONFIG_MTD=y
4631 +# CONFIG_MTD_DEBUG is not set
4632 +# CONFIG_MTD_CONCAT is not set
4633 +CONFIG_MTD_PARTITIONS=y
4634 +# CONFIG_MTD_REDBOOT_PARTS is not set
4635 +CONFIG_MTD_CMDLINE_PARTS=y
4636 +
4637 +#
4638 +# User Modules And Translation Layers
4639 +#
4640 +CONFIG_MTD_CHAR=y
4641 +# CONFIG_MTD_OOPS is not set
4642 +
4643 +#
4644 +# RAM/ROM/Flash chip drivers
4645 +#
4646 +CONFIG_MTD_CFI=y
4647 +# CONFIG_MTD_JEDECPROBE is not set
4648 +CONFIG_MTD_GEN_PROBE=y
4649 +# CONFIG_MTD_CFI_ADV_OPTIONS is not set
4650 +CONFIG_MTD_MAP_BANK_WIDTH_1=y
4651 +CONFIG_MTD_MAP_BANK_WIDTH_2=y
4652 +CONFIG_MTD_MAP_BANK_WIDTH_4=y
4653 +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
4654 +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
4655 +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
4656 +CONFIG_MTD_CFI_I1=y
4657 +CONFIG_MTD_CFI_I2=y
4658 +# CONFIG_MTD_CFI_I4 is not set
4659 +# CONFIG_MTD_CFI_I8 is not set
4660 +# CONFIG_MTD_CFI_INTELEXT is not set
4661 +CONFIG_MTD_CFI_AMDSTD=y
4662 +# CONFIG_MTD_CFI_STAA is not set
4663 +CONFIG_MTD_CFI_UTIL=y
4664 +# CONFIG_MTD_RAM is not set
4665 +# CONFIG_MTD_ROM is not set
4666 +# CONFIG_MTD_ABSENT is not set
4667 +
4668 +#
4669 +# Mapping drivers for chip access
4670 +#
4671 +# CONFIG_MTD_COMPLEX_MAPPINGS is not set
4672 +CONFIG_MTD_PHYSMAP=y
4673 +CONFIG_MTD_PHYSMAP_START=0x8000000
4674 +CONFIG_MTD_PHYSMAP_LEN=0x0
4675 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2
4676 +# CONFIG_MTD_PLATRAM is not set
4677 +
4678 +#
4679 +# Self-contained MTD device drivers
4680 +#
4681 +# CONFIG_MTD_DATAFLASH is not set
4682 +# CONFIG_MTD_M25P80 is not set
4683 +# CONFIG_MTD_SLRAM is not set
4684 +# CONFIG_MTD_PHRAM is not set
4685 +# CONFIG_MTD_MTDRAM is not set
4686 +
4687 +#
4688 +# Disk-On-Chip Device Drivers
4689 +#
4690 +# CONFIG_MTD_DOC2000 is not set
4691 +# CONFIG_MTD_DOC2001 is not set
4692 +# CONFIG_MTD_DOC2001PLUS is not set
4693 +# CONFIG_MTD_NAND is not set
4694 +# CONFIG_MTD_ONENAND is not set
4695 +
4696 +#
4697 +# UBI - Unsorted block images
4698 +#
4699 +# CONFIG_MTD_UBI is not set
4700 +# CONFIG_PARPORT is not set
4701 +# CONFIG_MISC_DEVICES is not set
4702 +
4703 +#
4704 +# SCSI device support
4705 +#
4706 +# CONFIG_SCSI_DMA is not set
4707 +# CONFIG_SCSI_NETLINK is not set
4708 +# CONFIG_NETDEVICES is not set
4709 +# CONFIG_ISDN is not set
4710 +# CONFIG_PHONE is not set
4711 +
4712 +#
4713 +# Input device support
4714 +#
4715 +# CONFIG_INPUT is not set
4716 +
4717 +#
4718 +# Hardware I/O ports
4719 +#
4720 +# CONFIG_SERIO is not set
4721 +# CONFIG_GAMEPORT is not set
4722 +
4723 +#
4724 +# Character devices
4725 +#
4726 +# CONFIG_VT is not set
4727 +# CONFIG_SERIAL_NONSTANDARD is not set
4728 +
4729 +#
4730 +# Serial drivers
4731 +#
4732 +# CONFIG_SERIAL_8250 is not set
4733 +
4734 +#
4735 +# Non-8250 serial port support
4736 +#
4737 +CONFIG_SERIAL_ATMEL=y
4738 +CONFIG_SERIAL_ATMEL_CONSOLE=y
4739 +# CONFIG_SERIAL_ATMEL_PDC is not set
4740 +# CONFIG_SERIAL_ATMEL_TTYAT is not set
4741 +CONFIG_SERIAL_CORE=y
4742 +CONFIG_SERIAL_CORE_CONSOLE=y
4743 +CONFIG_UNIX98_PTYS=y
4744 +# CONFIG_LEGACY_PTYS is not set
4745 +# CONFIG_IPMI_HANDLER is not set
4746 +# CONFIG_HW_RANDOM is not set
4747 +# CONFIG_RTC is not set
4748 +# CONFIG_GEN_RTC is not set
4749 +# CONFIG_R3964 is not set
4750 +# CONFIG_TCG_TPM is not set
4751 +# CONFIG_I2C is not set
4752 +
4753 +#
4754 +# SPI support
4755 +#
4756 +CONFIG_SPI=y
4757 +CONFIG_SPI_MASTER=y
4758 +
4759 +#
4760 +# SPI Master Controller Drivers
4761 +#
4762 +CONFIG_SPI_ATMEL=y
4763 +# CONFIG_SPI_BITBANG is not set
4764 +
4765 +#
4766 +# SPI Protocol Masters
4767 +#
4768 +# CONFIG_SPI_AT25 is not set
4769 +# CONFIG_SPI_SPIDEV is not set
4770 +# CONFIG_SPI_TLE62X0 is not set
4771 +# CONFIG_W1 is not set
4772 +# CONFIG_POWER_SUPPLY is not set
4773 +# CONFIG_HWMON is not set
4774 +CONFIG_WATCHDOG=y
4775 +# CONFIG_WATCHDOG_NOWAYOUT is not set
4776 +
4777 +#
4778 +# Watchdog Device Drivers
4779 +#
4780 +# CONFIG_SOFT_WATCHDOG is not set
4781 +CONFIG_AT32AP700X_WDT=y
4782 +
4783 +#
4784 +# Sonics Silicon Backplane
4785 +#
4786 +CONFIG_SSB_POSSIBLE=y
4787 +# CONFIG_SSB is not set
4788 +
4789 +#
4790 +# Multifunction device drivers
4791 +#
4792 +# CONFIG_MFD_SM501 is not set
4793 +
4794 +#
4795 +# Multimedia devices
4796 +#
4797 +# CONFIG_VIDEO_DEV is not set
4798 +# CONFIG_DVB_CORE is not set
4799 +# CONFIG_DAB is not set
4800 +
4801 +#
4802 +# Graphics support
4803 +#
4804 +# CONFIG_VGASTATE is not set
4805 +# CONFIG_VIDEO_OUTPUT_CONTROL is not set
4806 +CONFIG_FB=y
4807 +# CONFIG_FIRMWARE_EDID is not set
4808 +# CONFIG_FB_DDC is not set
4809 +CONFIG_FB_CFB_FILLRECT=y
4810 +CONFIG_FB_CFB_COPYAREA=y
4811 +CONFIG_FB_CFB_IMAGEBLIT=y
4812 +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
4813 +# CONFIG_FB_SYS_FILLRECT is not set
4814 +# CONFIG_FB_SYS_COPYAREA is not set
4815 +# CONFIG_FB_SYS_IMAGEBLIT is not set
4816 +# CONFIG_FB_SYS_FOPS is not set
4817 +CONFIG_FB_DEFERRED_IO=y
4818 +# CONFIG_FB_SVGALIB is not set
4819 +# CONFIG_FB_MACMODES is not set
4820 +# CONFIG_FB_BACKLIGHT is not set
4821 +# CONFIG_FB_MODE_HELPERS is not set
4822 +# CONFIG_FB_TILEBLITTING is not set
4823 +
4824 +#
4825 +# Frame buffer hardware drivers
4826 +#
4827 +# CONFIG_FB_S1D13XXX is not set
4828 +CONFIG_FB_ATMEL=y
4829 +# CONFIG_FB_VIRTUAL is not set
4830 +CONFIG_BACKLIGHT_LCD_SUPPORT=y
4831 +CONFIG_LCD_CLASS_DEVICE=y
4832 +CONFIG_LCD_LTV350QV=y
4833 +# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
4834 +
4835 +#
4836 +# Display device support
4837 +#
4838 +# CONFIG_DISPLAY_SUPPORT is not set
4839 +# CONFIG_LOGO is not set
4840 +
4841 +#
4842 +# Sound
4843 +#
4844 +# CONFIG_SOUND is not set
4845 +CONFIG_USB_SUPPORT=y
4846 +# CONFIG_USB_ARCH_HAS_HCD is not set
4847 +# CONFIG_USB_ARCH_HAS_OHCI is not set
4848 +# CONFIG_USB_ARCH_HAS_EHCI is not set
4849 +
4850 +#
4851 +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
4852 +#
4853 +
4854 +#
4855 +# USB Gadget Support
4856 +#
4857 +CONFIG_USB_GADGET=y
4858 +# CONFIG_USB_GADGET_DEBUG_FILES is not set
4859 +CONFIG_USB_GADGET_SELECTED=y
4860 +# CONFIG_USB_GADGET_AMD5536UDC is not set
4861 +CONFIG_USB_GADGET_ATMEL_USBA=y
4862 +CONFIG_USB_ATMEL_USBA=y
4863 +# CONFIG_USB_GADGET_FSL_USB2 is not set
4864 +# CONFIG_USB_GADGET_NET2280 is not set
4865 +# CONFIG_USB_GADGET_PXA2XX is not set
4866 +# CONFIG_USB_GADGET_M66592 is not set
4867 +# CONFIG_USB_GADGET_GOKU is not set
4868 +# CONFIG_USB_GADGET_LH7A40X is not set
4869 +# CONFIG_USB_GADGET_OMAP is not set
4870 +# CONFIG_USB_GADGET_S3C2410 is not set
4871 +# CONFIG_USB_GADGET_AT91 is not set
4872 +# CONFIG_USB_GADGET_DUMMY_HCD is not set
4873 +CONFIG_USB_GADGET_DUALSPEED=y
4874 +# CONFIG_USB_ZERO is not set
4875 +CONFIG_USB_ETH=y
4876 +# CONFIG_USB_ETH_RNDIS is not set
4877 +# CONFIG_USB_GADGETFS is not set
4878 +# CONFIG_USB_FILE_STORAGE is not set
4879 +# CONFIG_USB_G_SERIAL is not set
4880 +# CONFIG_USB_MIDI_GADGET is not set
4881 +# CONFIG_MMC is not set
4882 +# CONFIG_NEW_LEDS is not set
4883 +CONFIG_RTC_LIB=y
4884 +CONFIG_RTC_CLASS=y
4885 +CONFIG_RTC_HCTOSYS=y
4886 +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
4887 +# CONFIG_RTC_DEBUG is not set
4888 +
4889 +#
4890 +# RTC interfaces
4891 +#
4892 +CONFIG_RTC_INTF_SYSFS=y
4893 +# CONFIG_RTC_INTF_PROC is not set
4894 +CONFIG_RTC_INTF_DEV=y
4895 +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
4896 +# CONFIG_RTC_DRV_TEST is not set
4897 +
4898 +#
4899 +# SPI RTC drivers
4900 +#
4901 +# CONFIG_RTC_DRV_RS5C348 is not set
4902 +# CONFIG_RTC_DRV_MAX6902 is not set
4903 +
4904 +#
4905 +# Platform RTC drivers
4906 +#
4907 +# CONFIG_RTC_DRV_DS1553 is not set
4908 +# CONFIG_RTC_DRV_STK17TA8 is not set
4909 +# CONFIG_RTC_DRV_DS1742 is not set
4910 +# CONFIG_RTC_DRV_M48T86 is not set
4911 +# CONFIG_RTC_DRV_M48T59 is not set
4912 +# CONFIG_RTC_DRV_V3020 is not set
4913 +
4914 +#
4915 +# on-CPU RTC drivers
4916 +#
4917 +CONFIG_RTC_DRV_AT32AP700X=y
4918 +
4919 +#
4920 +# Userspace I/O
4921 +#
4922 +# CONFIG_UIO is not set
4923 +
4924 +#
4925 +# File systems
4926 +#
4927 +# CONFIG_INOTIFY is not set
4928 +# CONFIG_QUOTA is not set
4929 +# CONFIG_DNOTIFY is not set
4930 +# CONFIG_AUTOFS_FS is not set
4931 +# CONFIG_AUTOFS4_FS is not set
4932 +# CONFIG_FUSE_FS is not set
4933 +
4934 +#
4935 +# Pseudo filesystems
4936 +#
4937 +CONFIG_PROC_FS=y
4938 +CONFIG_PROC_KCORE=y
4939 +CONFIG_PROC_SYSCTL=y
4940 +CONFIG_SYSFS=y
4941 +CONFIG_TMPFS=y
4942 +# CONFIG_TMPFS_POSIX_ACL is not set
4943 +# CONFIG_HUGETLB_PAGE is not set
4944 +# CONFIG_CONFIGFS_FS is not set
4945 +
4946 +#
4947 +# Miscellaneous filesystems
4948 +#
4949 +CONFIG_JFFS2_FS=y
4950 +CONFIG_JFFS2_FS_DEBUG=0
4951 +# CONFIG_JFFS2_FS_WRITEBUFFER is not set
4952 +# CONFIG_JFFS2_SUMMARY is not set
4953 +# CONFIG_JFFS2_FS_XATTR is not set
4954 +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
4955 +CONFIG_JFFS2_ZLIB=y
4956 +# CONFIG_JFFS2_LZO is not set
4957 +CONFIG_JFFS2_RTIME=y
4958 +# CONFIG_JFFS2_RUBIN is not set
4959 +# CONFIG_NETWORK_FILESYSTEMS is not set
4960 +# CONFIG_NLS is not set
4961 +# CONFIG_DLM is not set
4962 +# CONFIG_INSTRUMENTATION is not set
4963 +
4964 +#
4965 +# Kernel hacking
4966 +#
4967 +# CONFIG_PRINTK_TIME is not set
4968 +CONFIG_ENABLE_WARN_DEPRECATED=y
4969 +CONFIG_ENABLE_MUST_CHECK=y
4970 +CONFIG_MAGIC_SYSRQ=y
4971 +# CONFIG_UNUSED_SYMBOLS is not set
4972 +# CONFIG_DEBUG_FS is not set
4973 +# CONFIG_HEADERS_CHECK is not set
4974 +# CONFIG_DEBUG_KERNEL is not set
4975 +# CONFIG_DEBUG_BUGVERBOSE is not set
4976 +# CONFIG_SAMPLES is not set
4977 +
4978 +#
4979 +# Security options
4980 +#
4981 +# CONFIG_KEYS is not set
4982 +# CONFIG_SECURITY is not set
4983 +# CONFIG_SECURITY_FILE_CAPABILITIES is not set
4984 +# CONFIG_CRYPTO is not set
4985 +
4986 +#
4987 +# Library routines
4988 +#
4989 +CONFIG_BITREVERSE=y
4990 +# CONFIG_CRC_CCITT is not set
4991 +# CONFIG_CRC16 is not set
4992 +# CONFIG_CRC_ITU_T is not set
4993 +CONFIG_CRC32=y
4994 +# CONFIG_CRC7 is not set
4995 +# CONFIG_LIBCRC32C is not set
4996 +CONFIG_ZLIB_INFLATE=y
4997 +CONFIG_ZLIB_DEFLATE=y
4998 +CONFIG_HAS_IOMEM=y
4999 +CONFIG_HAS_IOPORT=y
5000 +CONFIG_HAS_DMA=y
5001 diff --git a/arch/avr32/drivers/Makefile b/arch/avr32/drivers/Makefile
5002 new file mode 100644
5003 index 0000000..b429b75
5004 --- /dev/null
5005 +++ b/arch/avr32/drivers/Makefile
5006 @@ -0,0 +1 @@
5007 +obj-$(CONFIG_DW_DMAC) += dw-dmac.o
5008 diff --git a/arch/avr32/drivers/dw-dmac.c b/arch/avr32/drivers/dw-dmac.c
5009 new file mode 100644
5010 index 0000000..224eb30
5011 --- /dev/null
5012 +++ b/arch/avr32/drivers/dw-dmac.c
5013 @@ -0,0 +1,761 @@
5014 +/*
5015 + * Driver for the Synopsys DesignWare DMA Controller
5016 + *
5017 + * Copyright (C) 2005-2006 Atmel Corporation
5018 + *
5019 + * This program is free software; you can redistribute it and/or modify
5020 + * it under the terms of the GNU General Public License version 2 as
5021 + * published by the Free Software Foundation.
5022 + */
5023 +#include <linux/clk.h>
5024 +#include <linux/device.h>
5025 +#include <linux/dma-mapping.h>
5026 +#include <linux/dmapool.h>
5027 +#include <linux/init.h>
5028 +#include <linux/interrupt.h>
5029 +#include <linux/module.h>
5030 +#include <linux/platform_device.h>
5031 +
5032 +#include <asm/dma-controller.h>
5033 +#include <asm/io.h>
5034 +
5035 +#include "dw-dmac.h"
5036 +
5037 +#define DMAC_NR_CHANNELS 3
5038 +#define DMAC_MAX_BLOCKSIZE 4095
5039 +
5040 +enum {
5041 + CH_STATE_FREE = 0,
5042 + CH_STATE_ALLOCATED,
5043 + CH_STATE_BUSY,
5044 +};
5045 +
5046 +struct dw_dma_lli {
5047 + dma_addr_t sar;
5048 + dma_addr_t dar;
5049 + dma_addr_t llp;
5050 + u32 ctllo;
5051 + u32 ctlhi;
5052 + u32 sstat;
5053 + u32 dstat;
5054 +};
5055 +
5056 +struct dw_dma_block {
5057 + struct dw_dma_lli *lli_vaddr;
5058 + dma_addr_t lli_dma_addr;
5059 +};
5060 +
5061 +struct dw_dma_channel {
5062 + unsigned int state;
5063 + int is_cyclic;
5064 + struct dma_request_sg *req_sg;
5065 + struct dma_request_cyclic *req_cyclic;
5066 + unsigned int nr_blocks;
5067 + int direction;
5068 + struct dw_dma_block *block;
5069 +};
5070 +
5071 +struct dw_dma_controller {
5072 + spinlock_t lock;
5073 + void * __iomem regs;
5074 + struct dma_pool *lli_pool;
5075 + struct clk *hclk;
5076 + struct dma_controller dma;
5077 + struct dw_dma_channel channel[DMAC_NR_CHANNELS];
5078 +};
5079 +#define to_dw_dmac(dmac) container_of(dmac, struct dw_dma_controller, dma)
5080 +
5081 +#define dmac_writel_hi(dmac, reg, value) \
5082 + __raw_writel((value), (dmac)->regs + DW_DMAC_##reg + 4)
5083 +#define dmac_readl_hi(dmac, reg) \
5084 + __raw_readl((dmac)->regs + DW_DMAC_##reg + 4)
5085 +#define dmac_writel_lo(dmac, reg, value) \
5086 + __raw_writel((value), (dmac)->regs + DW_DMAC_##reg)
5087 +#define dmac_readl_lo(dmac, reg) \
5088 + __raw_readl((dmac)->regs + DW_DMAC_##reg)
5089 +#define dmac_chan_writel_hi(dmac, chan, reg, value) \
5090 + __raw_writel((value), ((dmac)->regs + 0x58 * (chan) \
5091 + + DW_DMAC_CHAN_##reg + 4))
5092 +#define dmac_chan_readl_hi(dmac, chan, reg) \
5093 + __raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg + 4)
5094 +#define dmac_chan_writel_lo(dmac, chan, reg, value) \
5095 + __raw_writel((value), (dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
5096 +#define dmac_chan_readl_lo(dmac, chan, reg) \
5097 + __raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
5098 +#define set_channel_bit(dmac, reg, chan) \
5099 + dmac_writel_lo(dmac, reg, (1 << (chan)) | (1 << ((chan) + 8)))
5100 +#define clear_channel_bit(dmac, reg, chan) \
5101 + dmac_writel_lo(dmac, reg, (0 << (chan)) | (1 << ((chan) + 8)))
5102 +
5103 +static int dmac_alloc_channel(struct dma_controller *_dmac)
5104 +{
5105 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
5106 + struct dw_dma_channel *chan;
5107 + unsigned long flags;
5108 + int i;
5109 +
5110 + spin_lock_irqsave(&dmac->lock, flags);
5111 + for (i = 0; i < DMAC_NR_CHANNELS; i++)
5112 + if (dmac->channel[i].state == CH_STATE_FREE)
5113 + break;
5114 +
5115 + if (i < DMAC_NR_CHANNELS) {
5116 + chan = &dmac->channel[i];
5117 + chan->state = CH_STATE_ALLOCATED;
5118 + } else {
5119 + i = -EBUSY;
5120 + }
5121 +
5122 + spin_unlock_irqrestore(&dmac->lock, flags);
5123 +
5124 + return i;
5125 +}
5126 +
5127 +static void dmac_release_channel(struct dma_controller *_dmac, int channel)
5128 +{
5129 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
5130 +
5131 + BUG_ON(channel >= DMAC_NR_CHANNELS
5132 + || dmac->channel[channel].state != CH_STATE_ALLOCATED);
5133 +
5134 + dmac->channel[channel].state = CH_STATE_FREE;
5135 +}
5136 +
5137 +static struct dw_dma_block *allocate_blocks(struct dw_dma_controller *dmac,
5138 + unsigned int nr_blocks)
5139 +{
5140 + struct dw_dma_block *block;
5141 + void *p;
5142 + unsigned int i;
5143 +
5144 + block = kmalloc(nr_blocks * sizeof(*block),
5145 + GFP_KERNEL);
5146 + if (unlikely(!block))
5147 + return NULL;
5148 +
5149 + for (i = 0; i < nr_blocks; i++) {
5150 + p = dma_pool_alloc(dmac->lli_pool, GFP_KERNEL,
5151 + &block[i].lli_dma_addr);
5152 + block[i].lli_vaddr = p;
5153 + if (unlikely(!p))
5154 + goto fail;
5155 + }
5156 +
5157 + return block;
5158 +
5159 +fail:
5160 + for (i = 0; i < nr_blocks; i++) {
5161 + if (!block[i].lli_vaddr)
5162 + break;
5163 + dma_pool_free(dmac->lli_pool, block[i].lli_vaddr,
5164 + block[i].lli_dma_addr);
5165 + }
5166 + kfree(block);
5167 + return NULL;
5168 +}
5169 +
5170 +static void cleanup_channel(struct dw_dma_controller *dmac,
5171 + struct dw_dma_channel *chan)
5172 +{
5173 + unsigned int i;
5174 +
5175 + if (chan->nr_blocks > 1) {
5176 + for (i = 0; i < chan->nr_blocks; i++)
5177 + dma_pool_free(dmac->lli_pool, chan->block[i].lli_vaddr,
5178 + chan->block[i].lli_dma_addr);
5179 + kfree(chan->block);
5180 + }
5181 +
5182 + chan->state = CH_STATE_ALLOCATED;
5183 +}
5184 +
5185 +static int dmac_prepare_request_sg(struct dma_controller *_dmac,
5186 + struct dma_request_sg *req)
5187 +{
5188 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
5189 + struct dw_dma_channel *chan;
5190 + unsigned long ctlhi, ctllo, cfghi, cfglo;
5191 + unsigned long block_size;
5192 + unsigned int nr_blocks;
5193 + int ret, i, direction;
5194 + unsigned long flags;
5195 +
5196 + spin_lock_irqsave(&dmac->lock, flags);
5197 +
5198 + ret = -EINVAL;
5199 + if (req->req.channel >= DMAC_NR_CHANNELS
5200 + || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
5201 + || req->block_size > DMAC_MAX_BLOCKSIZE) {
5202 + spin_unlock_irqrestore(&dmac->lock, flags);
5203 + return -EINVAL;
5204 + }
5205 +
5206 + chan = &dmac->channel[req->req.channel];
5207 + chan->state = CH_STATE_BUSY;
5208 + chan->req_sg = req;
5209 + chan->is_cyclic = 0;
5210 +
5211 + /*
5212 + * We have marked the channel as busy, so no need to keep the
5213 + * lock as long as we only touch the channel-specific
5214 + * registers
5215 + */
5216 + spin_unlock_irqrestore(&dmac->lock, flags);
5217 +
5218 + /*
5219 + * There may be limitations in the driver and/or the DMA
5220 + * controller that prevents us from sending a whole
5221 + * scatterlist item in one go. Taking this into account,
5222 + * calculate the number of block transfers we need to set up.
5223 + *
5224 + * FIXME: Let the peripheral driver know about the maximum
5225 + * block size we support. We really don't want to use a
5226 + * different block size than what was suggested by the
5227 + * peripheral.
5228 + *
5229 + * Each block will get its own Linked List Item (LLI) below.
5230 + */
5231 + block_size = req->block_size;
5232 + nr_blocks = req->nr_blocks;
5233 + pr_debug("block_size %lu, nr_blocks %u nr_sg = %u\n",
5234 + block_size, nr_blocks, req->nr_sg);
5235 +
5236 + BUG_ON(nr_blocks == 0);
5237 + chan->nr_blocks = nr_blocks;
5238 +
5239 + ret = -EINVAL;
5240 + cfglo = cfghi = 0;
5241 + switch (req->direction) {
5242 + case DMA_DIR_MEM_TO_PERIPH:
5243 + direction = DMA_TO_DEVICE;
5244 + cfghi = req->periph_id << (43 - 32);
5245 + break;
5246 +
5247 + case DMA_DIR_PERIPH_TO_MEM:
5248 + direction = DMA_FROM_DEVICE;
5249 + cfghi = req->periph_id << (39 - 32);
5250 + break;
5251 + default:
5252 + goto out_unclaim_channel;
5253 + }
5254 +
5255 + chan->direction = direction;
5256 +
5257 + dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
5258 + dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
5259 +
5260 + ctlhi = block_size >> req->width;
5261 + ctllo = ((req->direction << 20)
5262 + // | (1 << 14) | (1 << 11) // source/dest burst trans len
5263 + | (req->width << 4) | (req->width << 1)
5264 + | (1 << 0)); // interrupt enable
5265 +
5266 + if (nr_blocks == 1) {
5267 + /* Only one block: No need to use block chaining */
5268 + if (direction == DMA_TO_DEVICE) {
5269 + dmac_chan_writel_lo(dmac, req->req.channel, SAR,
5270 + req->sg->dma_address);
5271 + dmac_chan_writel_lo(dmac, req->req.channel, DAR,
5272 + req->data_reg);
5273 + ctllo |= 2 << 7; // no dst increment
5274 + } else {
5275 + dmac_chan_writel_lo(dmac, req->req.channel, SAR,
5276 + req->data_reg);
5277 + dmac_chan_writel_lo(dmac, req->req.channel, DAR,
5278 + req->sg->dma_address);
5279 + ctllo |= 2 << 9; // no src increment
5280 + }
5281 + dmac_chan_writel_lo(dmac, req->req.channel, CTL, ctllo);
5282 + dmac_chan_writel_hi(dmac, req->req.channel, CTL, ctlhi);
5283 + pr_debug("ctl hi:lo 0x%lx:%lx\n", ctlhi, ctllo);
5284 + } else {
5285 + struct dw_dma_lli *lli, *lli_prev = NULL;
5286 + int j = 0, offset = 0;
5287 +
5288 + ret = -ENOMEM;
5289 + chan->block = allocate_blocks(dmac, nr_blocks);
5290 + if (!chan->block)
5291 + goto out_unclaim_channel;
5292 +
5293 + if (direction == DMA_TO_DEVICE)
5294 + ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
5295 + else
5296 + ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
5297 +
5298 + /*
5299 + * Map scatterlist items to blocks. One scatterlist
5300 + * item may need more than one block for the reasons
5301 + * mentioned above.
5302 + */
5303 + for (i = 0; i < nr_blocks; i++) {
5304 + lli = chan->block[i].lli_vaddr;
5305 + if (lli_prev) {
5306 + lli_prev->llp = chan->block[i].lli_dma_addr;
5307 + pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
5308 + i - 1, chan->block[i - 1].lli_vaddr,
5309 + chan->block[i - 1].lli_dma_addr,
5310 + lli_prev->sar, lli_prev->dar, lli_prev->llp,
5311 + lli_prev->ctllo, lli_prev->ctlhi);
5312 + }
5313 + lli->llp = 0;
5314 + lli->ctllo = ctllo;
5315 + lli->ctlhi = ctlhi;
5316 + if (direction == DMA_TO_DEVICE) {
5317 + lli->sar = req->sg[j].dma_address + offset;
5318 + lli->dar = req->data_reg;
5319 + } else {
5320 + lli->sar = req->data_reg;
5321 + lli->dar = req->sg[j].dma_address + offset;
5322 + }
5323 + lli_prev = lli;
5324 +
5325 + offset += block_size;
5326 + if (offset > req->sg[j].length) {
5327 + j++;
5328 + offset = 0;
5329 + }
5330 + }
5331 +
5332 + pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
5333 + i - 1, chan->block[i - 1].lli_vaddr,
5334 + chan->block[i - 1].lli_dma_addr, lli_prev->sar,
5335 + lli_prev->dar, lli_prev->llp,
5336 + lli_prev->ctllo, lli_prev->ctlhi);
5337 +
5338 + /*
5339 + * SAR, DAR and CTL are initialized from the LLI. We
5340 + * only have to enable the LLI bits in CTL.
5341 + */
5342 + dmac_chan_writel_hi(dmac, req->req.channel, CTL, 0);
5343 + dmac_chan_writel_lo(dmac, req->req.channel, LLP,
5344 + chan->block[0].lli_dma_addr);
5345 + dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
5346 + }
5347 +
5348 + set_channel_bit(dmac, MASK_XFER, req->req.channel);
5349 + set_channel_bit(dmac, MASK_ERROR, req->req.channel);
5350 + if (req->req.block_complete)
5351 + set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
5352 + else
5353 + clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
5354 +
5355 + return 0;
5356 +
5357 +out_unclaim_channel:
5358 + chan->state = CH_STATE_ALLOCATED;
5359 + return ret;
5360 +}
5361 +
5362 +static int dmac_prepare_request_cyclic(struct dma_controller *_dmac,
5363 + struct dma_request_cyclic *req)
5364 +{
5365 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
5366 + struct dw_dma_channel *chan;
5367 + unsigned long ctlhi, ctllo, cfghi, cfglo;
5368 + unsigned long block_size;
5369 + int ret, i, direction;
5370 + unsigned long flags;
5371 +
5372 + spin_lock_irqsave(&dmac->lock, flags);
5373 +
5374 + block_size = (req->buffer_size/req->periods) >> req->width;
5375 +
5376 + ret = -EINVAL;
5377 + if (req->req.channel >= DMAC_NR_CHANNELS
5378 + || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
5379 + || (req->periods == 0)
5380 + || block_size > DMAC_MAX_BLOCKSIZE) {
5381 + spin_unlock_irqrestore(&dmac->lock, flags);
5382 + return -EINVAL;
5383 + }
5384 +
5385 + chan = &dmac->channel[req->req.channel];
5386 + chan->state = CH_STATE_BUSY;
5387 + chan->is_cyclic = 1;
5388 + chan->req_cyclic = req;
5389 +
5390 + /*
5391 + * We have marked the channel as busy, so no need to keep the
5392 + * lock as long as we only touch the channel-specific
5393 + * registers
5394 + */
5395 + spin_unlock_irqrestore(&dmac->lock, flags);
5396 +
5397 + /*
5398 + Setup
5399 + */
5400 + BUG_ON(req->buffer_size % req->periods);
5401 + /* printk(KERN_INFO "block_size = %lu, periods = %u\n", block_size, req->periods); */
5402 +
5403 + chan->nr_blocks = req->periods;
5404 +
5405 + ret = -EINVAL;
5406 + cfglo = cfghi = 0;
5407 + switch (req->direction) {
5408 + case DMA_DIR_MEM_TO_PERIPH:
5409 + direction = DMA_TO_DEVICE;
5410 + cfghi = req->periph_id << (43 - 32);
5411 + break;
5412 +
5413 + case DMA_DIR_PERIPH_TO_MEM:
5414 + direction = DMA_FROM_DEVICE;
5415 + cfghi = req->periph_id << (39 - 32);
5416 + break;
5417 + default:
5418 + goto out_unclaim_channel;
5419 + }
5420 +
5421 + chan->direction = direction;
5422 +
5423 + dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
5424 + dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
5425 +
5426 + ctlhi = block_size;
5427 + ctllo = ((req->direction << 20)
5428 + | (req->width << 4) | (req->width << 1)
5429 + | (1 << 0)); // interrupt enable
5430 +
5431 + {
5432 + struct dw_dma_lli *lli = NULL, *lli_prev = NULL;
5433 +
5434 + ret = -ENOMEM;
5435 + chan->block = allocate_blocks(dmac, req->periods);
5436 + if (!chan->block)
5437 + goto out_unclaim_channel;
5438 +
5439 + if (direction == DMA_TO_DEVICE)
5440 + ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
5441 + else
5442 + ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
5443 +
5444 + /*
5445 + * Set up a linked list items where each period gets
5446 + * an item. The linked list item for the last period
5447 + * points back to the star of the buffer making a
5448 + * cyclic buffer.
5449 + */
5450 + for (i = 0; i < req->periods; i++) {
5451 + lli = chan->block[i].lli_vaddr;
5452 + if (lli_prev) {
5453 + lli_prev->llp = chan->block[i].lli_dma_addr;
5454 + /* printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
5455 + i - 1, chan->block[i - 1].lli_vaddr,
5456 + chan->block[i - 1].lli_dma_addr,
5457 + lli_prev->sar, lli_prev->dar, lli_prev->llp,
5458 + lli_prev->ctllo, lli_prev->ctlhi);*/
5459 + }
5460 + lli->llp = 0;
5461 + lli->ctllo = ctllo;
5462 + lli->ctlhi = ctlhi;
5463 + if (direction == DMA_TO_DEVICE) {
5464 + lli->sar = req->buffer_start + i*(block_size << req->width);
5465 + lli->dar = req->data_reg;
5466 + } else {
5467 + lli->sar = req->data_reg;
5468 + lli->dar = req->buffer_start + i*(block_size << req->width);
5469 + }
5470 + lli_prev = lli;
5471 + }
5472 + lli->llp = chan->block[0].lli_dma_addr;
5473 +
5474 + /*printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
5475 + i - 1, chan->block[i - 1].lli_vaddr,
5476 + chan->block[i - 1].lli_dma_addr, lli_prev->sar,
5477 + lli_prev->dar, lli_prev->llp,
5478 + lli_prev->ctllo, lli_prev->ctlhi); */
5479 +
5480 + /*
5481 + * SAR, DAR and CTL are initialized from the LLI. We
5482 + * only have to enable the LLI bits in CTL.
5483 + */
5484 + dmac_chan_writel_lo(dmac, req->req.channel, LLP,
5485 + chan->block[0].lli_dma_addr);
5486 + dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
5487 + }
5488 +
5489 + clear_channel_bit(dmac, MASK_XFER, req->req.channel);
5490 + set_channel_bit(dmac, MASK_ERROR, req->req.channel);
5491 + if (req->req.block_complete)
5492 + set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
5493 + else
5494 + clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
5495 +
5496 + return 0;
5497 +
5498 +out_unclaim_channel:
5499 + chan->state = CH_STATE_ALLOCATED;
5500 + return ret;
5501 +}
5502 +
5503 +static int dmac_start_request(struct dma_controller *_dmac,
5504 + unsigned int channel)
5505 +{
5506 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
5507 +
5508 + BUG_ON(channel >= DMAC_NR_CHANNELS);
5509 +
5510 + set_channel_bit(dmac, CH_EN, channel);
5511 +
5512 + return 0;
5513 +}
5514 +
5515 +static dma_addr_t dmac_get_current_pos(struct dma_controller *_dmac,
5516 + unsigned int channel)
5517 +{
5518 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
5519 + struct dw_dma_channel *chan;
5520 + dma_addr_t current_pos;
5521 +
5522 + BUG_ON(channel >= DMAC_NR_CHANNELS);
5523 +
5524 + chan = &dmac->channel[channel];
5525 +
5526 + switch (chan->direction) {
5527 + case DMA_TO_DEVICE:
5528 + current_pos = dmac_chan_readl_lo(dmac, channel, SAR);
5529 + break;
5530 + case DMA_FROM_DEVICE:
5531 + current_pos = dmac_chan_readl_lo(dmac, channel, DAR);
5532 + break;
5533 + default:
5534 + return 0;
5535 + }
5536 +
5537 +
5538 + if (!current_pos) {
5539 + if (chan->is_cyclic) {
5540 + current_pos = chan->req_cyclic->buffer_start;
5541 + } else {
5542 + current_pos = chan->req_sg->sg->dma_address;
5543 + }
5544 + }
5545 +
5546 + return current_pos;
5547 +}
5548 +
5549 +
5550 +static int dmac_stop_request(struct dma_controller *_dmac,
5551 + unsigned int channel)
5552 +{
5553 + struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
5554 + struct dw_dma_channel *chan;
5555 +
5556 + BUG_ON(channel >= DMAC_NR_CHANNELS);
5557 +
5558 + chan = &dmac->channel[channel];
5559 + pr_debug("stop: st%u s%08x d%08x l%08x ctl0x%08x:0x%08x\n",
5560 + chan->state, dmac_chan_readl_lo(dmac, channel, SAR),
5561 + dmac_chan_readl_lo(dmac, channel, DAR),
5562 + dmac_chan_readl_lo(dmac, channel, LLP),
5563 + dmac_chan_readl_hi(dmac, channel, CTL),
5564 + dmac_chan_readl_lo(dmac, channel, CTL));
5565 +
5566 + if (chan->state == CH_STATE_BUSY) {
5567 + clear_channel_bit(dmac, CH_EN, channel);
5568 + cleanup_channel(dmac, &dmac->channel[channel]);
5569 + }
5570 +
5571 + return 0;
5572 +}
5573 +
5574 +
5575 +static void dmac_block_complete(struct dw_dma_controller *dmac)
5576 +{
5577 + struct dw_dma_channel *chan;
5578 + unsigned long status, chanid;
5579 +
5580 + status = dmac_readl_lo(dmac, STATUS_BLOCK);
5581 +
5582 + while (status) {
5583 + struct dma_request *req;
5584 + chanid = __ffs(status);
5585 + chan = &dmac->channel[chanid];
5586 +
5587 + if (chan->is_cyclic) {
5588 + BUG_ON(!chan->req_cyclic
5589 + || !chan->req_cyclic->req.block_complete);
5590 + req = &chan->req_cyclic->req;
5591 + } else {
5592 + BUG_ON(!chan->req_sg || !chan->req_sg->req.block_complete);
5593 + req = &chan->req_sg->req;
5594 + }
5595 + dmac_writel_lo(dmac, CLEAR_BLOCK, 1 << chanid);
5596 + req->block_complete(req);
5597 + status = dmac_readl_lo(dmac, STATUS_BLOCK);
5598 + }
5599 +}
5600 +
5601 +static void dmac_xfer_complete(struct dw_dma_controller *dmac)
5602 +{
5603 + struct dw_dma_channel *chan;
5604 + struct dma_request *req;
5605 + unsigned long status, chanid;
5606 +
5607 + status = dmac_readl_lo(dmac, STATUS_XFER);
5608 +
5609 + while (status) {
5610 + chanid = __ffs(status);
5611 + chan = &dmac->channel[chanid];
5612 +
5613 + dmac_writel_lo(dmac, CLEAR_XFER, 1 << chanid);
5614 +
5615 + req = &chan->req_sg->req;
5616 + BUG_ON(!req);
5617 + cleanup_channel(dmac, chan);
5618 + if (req->xfer_complete)
5619 + req->xfer_complete(req);
5620 +
5621 + status = dmac_readl_lo(dmac, STATUS_XFER);
5622 + }
5623 +}
5624 +
5625 +static void dmac_error(struct dw_dma_controller *dmac)
5626 +{
5627 + struct dw_dma_channel *chan;
5628 + unsigned long status, chanid;
5629 +
5630 + status = dmac_readl_lo(dmac, STATUS_ERROR);
5631 +
5632 + while (status) {
5633 + struct dma_request *req;
5634 +
5635 + chanid = __ffs(status);
5636 + chan = &dmac->channel[chanid];
5637 +
5638 + dmac_writel_lo(dmac, CLEAR_ERROR, 1 << chanid);
5639 + clear_channel_bit(dmac, CH_EN, chanid);
5640 +
5641 + if (chan->is_cyclic) {
5642 + BUG_ON(!chan->req_cyclic);
5643 + req = &chan->req_cyclic->req;
5644 + } else {
5645 + BUG_ON(!chan->req_sg);
5646 + req = &chan->req_sg->req;
5647 + }
5648 +
5649 + cleanup_channel(dmac, chan);
5650 + if (req->error)
5651 + req->error(req);
5652 +
5653 + status = dmac_readl_lo(dmac, STATUS_XFER);
5654 + }
5655 +}
5656 +
5657 +static irqreturn_t dmac_interrupt(int irq, void *dev_id)
5658 +{
5659 + struct dw_dma_controller *dmac = dev_id;
5660 + unsigned long status;
5661 + int ret = IRQ_NONE;
5662 +
5663 + spin_lock(&dmac->lock);
5664 +
5665 + status = dmac_readl_lo(dmac, STATUS_INT);
5666 +
5667 + while (status) {
5668 + ret = IRQ_HANDLED;
5669 + if (status & 0x10)
5670 + dmac_error(dmac);
5671 + if (status & 0x02)
5672 + dmac_block_complete(dmac);
5673 + if (status & 0x01)
5674 + dmac_xfer_complete(dmac);
5675 +
5676 + status = dmac_readl_lo(dmac, STATUS_INT);
5677 + }
5678 +
5679 + spin_unlock(&dmac->lock);
5680 + return ret;
5681 +}
5682 +
5683 +static int __devinit dmac_probe(struct platform_device *pdev)
5684 +{
5685 + struct dw_dma_controller *dmac;
5686 + struct resource *regs;
5687 + int ret;
5688 +
5689 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
5690 + if (!regs)
5691 + return -ENXIO;
5692 +
5693 + dmac = kmalloc(sizeof(*dmac), GFP_KERNEL);
5694 + if (!dmac)
5695 + return -ENOMEM;
5696 + memset(dmac, 0, sizeof(*dmac));
5697 +
5698 + dmac->hclk = clk_get(&pdev->dev, "hclk");
5699 + if (IS_ERR(dmac->hclk)) {
5700 + ret = PTR_ERR(dmac->hclk);
5701 + goto out_free_dmac;
5702 + }
5703 + clk_enable(dmac->hclk);
5704 +
5705 + ret = -ENOMEM;
5706 + dmac->lli_pool = dma_pool_create("dmac", &pdev->dev,
5707 + sizeof(struct dw_dma_lli), 4, 0);
5708 + if (!dmac->lli_pool)
5709 + goto out_disable_clk;
5710 +
5711 + spin_lock_init(&dmac->lock);
5712 + dmac->dma.dev = &pdev->dev;
5713 + dmac->dma.alloc_channel = dmac_alloc_channel;
5714 + dmac->dma.release_channel = dmac_release_channel;
5715 + dmac->dma.prepare_request_sg = dmac_prepare_request_sg;
5716 + dmac->dma.prepare_request_cyclic = dmac_prepare_request_cyclic;
5717 + dmac->dma.start_request = dmac_start_request;
5718 + dmac->dma.stop_request = dmac_stop_request;
5719 + dmac->dma.get_current_pos = dmac_get_current_pos;
5720 +
5721 + dmac->regs = ioremap(regs->start, regs->end - regs->start + 1);
5722 + if (!dmac->regs)
5723 + goto out_free_pool;
5724 +
5725 + ret = request_irq(platform_get_irq(pdev, 0), dmac_interrupt,
5726 + IRQF_SAMPLE_RANDOM, pdev->name, dmac);
5727 + if (ret)
5728 + goto out_unmap_regs;
5729 +
5730 + /* Enable the DMA controller */
5731 + dmac_writel_lo(dmac, CFG, 1);
5732 +
5733 + register_dma_controller(&dmac->dma);
5734 +
5735 + printk(KERN_INFO
5736 + "dmac%d: DesignWare DMA controller at 0x%p irq %d\n",
5737 + dmac->dma.id, dmac->regs, platform_get_irq(pdev, 0));
5738 +
5739 + return 0;
5740 +
5741 +out_unmap_regs:
5742 + iounmap(dmac->regs);
5743 +out_free_pool:
5744 + dma_pool_destroy(dmac->lli_pool);
5745 +out_disable_clk:
5746 + clk_disable(dmac->hclk);
5747 + clk_put(dmac->hclk);
5748 +out_free_dmac:
5749 + kfree(dmac);
5750 + return ret;
5751 +}
5752 +
5753 +static struct platform_driver dmac_driver = {
5754 + .probe = dmac_probe,
5755 + .driver = {
5756 + .name = "dmaca",
5757 + },
5758 +};
5759 +
5760 +static int __init dmac_init(void)
5761 +{
5762 + return platform_driver_register(&dmac_driver);
5763 +}
5764 +subsys_initcall(dmac_init);
5765 +
5766 +static void __exit dmac_exit(void)
5767 +{
5768 + platform_driver_unregister(&dmac_driver);
5769 +}
5770 +module_exit(dmac_exit);
5771 +
5772 +MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver");
5773 +MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
5774 +MODULE_LICENSE("GPL");
5775 diff --git a/arch/avr32/drivers/dw-dmac.h b/arch/avr32/drivers/dw-dmac.h
5776 new file mode 100644
5777 index 0000000..1f67921
5778 --- /dev/null
5779 +++ b/arch/avr32/drivers/dw-dmac.h
5780 @@ -0,0 +1,42 @@
5781 +/*
5782 + * Driver for the Synopsys DesignWare DMA Controller
5783 + *
5784 + * Copyright (C) 2005-2006 Atmel Corporation
5785 + *
5786 + * This program is free software; you can redistribute it and/or modify
5787 + * it under the terms of the GNU General Public License version 2 as
5788 + * published by the Free Software Foundation.
5789 + */
5790 +#ifndef __AVR32_DW_DMAC_H__
5791 +#define __AVR32_DW_DMAC_H__
5792 +
5793 +#define DW_DMAC_CFG 0x398
5794 +#define DW_DMAC_CH_EN 0x3a0
5795 +
5796 +#define DW_DMAC_STATUS_XFER 0x2e8
5797 +#define DW_DMAC_STATUS_BLOCK 0x2f0
5798 +#define DW_DMAC_STATUS_ERROR 0x308
5799 +
5800 +#define DW_DMAC_MASK_XFER 0x310
5801 +#define DW_DMAC_MASK_BLOCK 0x318
5802 +#define DW_DMAC_MASK_ERROR 0x330
5803 +
5804 +#define DW_DMAC_CLEAR_XFER 0x338
5805 +#define DW_DMAC_CLEAR_BLOCK 0x340
5806 +#define DW_DMAC_CLEAR_ERROR 0x358
5807 +
5808 +#define DW_DMAC_STATUS_INT 0x360
5809 +
5810 +#define DW_DMAC_CHAN_SAR 0x000
5811 +#define DW_DMAC_CHAN_DAR 0x008
5812 +#define DW_DMAC_CHAN_LLP 0x010
5813 +#define DW_DMAC_CHAN_CTL 0x018
5814 +#define DW_DMAC_CHAN_SSTAT 0x020
5815 +#define DW_DMAC_CHAN_DSTAT 0x028
5816 +#define DW_DMAC_CHAN_SSTATAR 0x030
5817 +#define DW_DMAC_CHAN_DSTATAR 0x038
5818 +#define DW_DMAC_CHAN_CFG 0x040
5819 +#define DW_DMAC_CHAN_SGR 0x048
5820 +#define DW_DMAC_CHAN_DSR 0x050
5821 +
5822 +#endif /* __AVR32_DW_DMAC_H__ */
5823 diff --git a/arch/avr32/kernel/Makefile b/arch/avr32/kernel/Makefile
5824 index 2d6d48f..88226b6 100644
5825 --- a/arch/avr32/kernel/Makefile
5826 +++ b/arch/avr32/kernel/Makefile
5827 @@ -6,9 +6,11 @@ extra-y := head.o vmlinux.lds
5828
5829 obj-$(CONFIG_SUBARCH_AVR32B) += entry-avr32b.o
5830 obj-y += syscall_table.o syscall-stubs.o irq.o
5831 -obj-y += setup.o traps.o semaphore.o ptrace.o
5832 +obj-y += setup.o traps.o semaphore.o ocd.o ptrace.o
5833 obj-y += signal.o sys_avr32.o process.o time.o
5834 obj-y += init_task.o switch_to.o cpu.o
5835 +obj-y += dma-controller.o
5836 obj-$(CONFIG_MODULES) += module.o avr32_ksyms.o
5837 obj-$(CONFIG_KPROBES) += kprobes.o
5838 obj-$(CONFIG_STACKTRACE) += stacktrace.o
5839 +obj-$(CONFIG_NMI_DEBUGGING) += nmi_debug.o
5840 diff --git a/arch/avr32/kernel/cpu.c b/arch/avr32/kernel/cpu.c
5841 index 2714cf6..b8409ca 100644
5842 --- a/arch/avr32/kernel/cpu.c
5843 +++ b/arch/avr32/kernel/cpu.c
5844 @@ -13,6 +13,7 @@
5845 #include <linux/percpu.h>
5846 #include <linux/param.h>
5847 #include <linux/errno.h>
5848 +#include <linux/clk.h>
5849
5850 #include <asm/setup.h>
5851 #include <asm/sysreg.h>
5852 @@ -187,9 +188,20 @@ static int __init topology_init(void)
5853
5854 subsys_initcall(topology_init);
5855
5856 +struct chip_id_map {
5857 + u16 mid;
5858 + u16 pn;
5859 + const char *name;
5860 +};
5861 +
5862 +static const struct chip_id_map chip_names[] = {
5863 + { .mid = 0x1f, .pn = 0x1e82, .name = "AT32AP700x" },
5864 +};
5865 +#define NR_CHIP_NAMES ARRAY_SIZE(chip_names)
5866 +
5867 static const char *cpu_names[] = {
5868 "Morgan",
5869 - "AP7000",
5870 + "AP7",
5871 };
5872 #define NR_CPU_NAMES ARRAY_SIZE(cpu_names)
5873
5874 @@ -206,12 +218,32 @@ static const char *mmu_types[] = {
5875 "MPU"
5876 };
5877
5878 +static const char *cpu_feature_flags[] = {
5879 + "rmw", "dsp", "simd", "ocd", "perfctr", "java", "fpu",
5880 +};
5881 +
5882 +static const char *get_chip_name(struct avr32_cpuinfo *cpu)
5883 +{
5884 + unsigned int i;
5885 + unsigned int mid = avr32_get_manufacturer_id(cpu);
5886 + unsigned int pn = avr32_get_product_number(cpu);
5887 +
5888 + for (i = 0; i < NR_CHIP_NAMES; i++) {
5889 + if (chip_names[i].mid == mid && chip_names[i].pn == pn)
5890 + return chip_names[i].name;
5891 + }
5892 +
5893 + return "(unknown)";
5894 +}
5895 +
5896 void __init setup_processor(void)
5897 {
5898 unsigned long config0, config1;
5899 unsigned long features;
5900 unsigned cpu_id, cpu_rev, arch_id, arch_rev, mmu_type;
5901 + unsigned device_id;
5902 unsigned tmp;
5903 + unsigned i;
5904
5905 config0 = sysreg_read(CONFIG0);
5906 config1 = sysreg_read(CONFIG1);
5907 @@ -221,11 +253,14 @@ void __init setup_processor(void)
5908 arch_rev = SYSREG_BFEXT(AR, config0);
5909 mmu_type = SYSREG_BFEXT(MMUT, config0);
5910
5911 + device_id = ocd_read(DID);
5912 +
5913 boot_cpu_data.arch_type = arch_id;
5914 boot_cpu_data.cpu_type = cpu_id;
5915 boot_cpu_data.arch_revision = arch_rev;
5916 boot_cpu_data.cpu_revision = cpu_rev;
5917 boot_cpu_data.tlb_config = mmu_type;
5918 + boot_cpu_data.device_id = device_id;
5919
5920 tmp = SYSREG_BFEXT(ILSZ, config1);
5921 if (tmp) {
5922 @@ -247,41 +282,34 @@ void __init setup_processor(void)
5923 return;
5924 }
5925
5926 - printk ("CPU: %s [%02x] revision %d (%s revision %d)\n",
5927 + printk ("CPU: %s chip revision %c\n", get_chip_name(&boot_cpu_data),
5928 + avr32_get_chip_revision(&boot_cpu_data) + 'A');
5929 + printk ("CPU: %s [%02x] core revision %d (%s arch revision %d)\n",
5930 cpu_names[cpu_id], cpu_id, cpu_rev,
5931 arch_names[arch_id], arch_rev);
5932 printk ("CPU: MMU configuration: %s\n", mmu_types[mmu_type]);
5933
5934 printk ("CPU: features:");
5935 features = 0;
5936 - if (config0 & SYSREG_BIT(CONFIG0_R)) {
5937 + if (config0 & SYSREG_BIT(CONFIG0_R))
5938 features |= AVR32_FEATURE_RMW;
5939 - printk(" rmw");
5940 - }
5941 - if (config0 & SYSREG_BIT(CONFIG0_D)) {
5942 + if (config0 & SYSREG_BIT(CONFIG0_D))
5943 features |= AVR32_FEATURE_DSP;
5944 - printk(" dsp");
5945 - }
5946 - if (config0 & SYSREG_BIT(CONFIG0_S)) {
5947 + if (config0 & SYSREG_BIT(CONFIG0_S))
5948 features |= AVR32_FEATURE_SIMD;
5949 - printk(" simd");
5950 - }
5951 - if (config0 & SYSREG_BIT(CONFIG0_O)) {
5952 + if (config0 & SYSREG_BIT(CONFIG0_O))
5953 features |= AVR32_FEATURE_OCD;
5954 - printk(" ocd");
5955 - }
5956 - if (config0 & SYSREG_BIT(CONFIG0_P)) {
5957 + if (config0 & SYSREG_BIT(CONFIG0_P))
5958 features |= AVR32_FEATURE_PCTR;
5959 - printk(" perfctr");
5960 - }
5961 - if (config0 & SYSREG_BIT(CONFIG0_J)) {
5962 + if (config0 & SYSREG_BIT(CONFIG0_J))
5963 features |= AVR32_FEATURE_JAVA;
5964 - printk(" java");
5965 - }
5966 - if (config0 & SYSREG_BIT(CONFIG0_F)) {
5967 + if (config0 & SYSREG_BIT(CONFIG0_F))
5968 features |= AVR32_FEATURE_FPU;
5969 - printk(" fpu");
5970 - }
5971 +
5972 + for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++)
5973 + if (features & (1 << i))
5974 + printk(" %s", cpu_feature_flags[i]);
5975 +
5976 printk("\n");
5977 boot_cpu_data.features = features;
5978 }
5979 @@ -291,6 +319,8 @@ static int c_show(struct seq_file *m, void *v)
5980 {
5981 unsigned int icache_size, dcache_size;
5982 unsigned int cpu = smp_processor_id();
5983 + unsigned int freq;
5984 + unsigned int i;
5985
5986 icache_size = boot_cpu_data.icache.ways *
5987 boot_cpu_data.icache.sets *
5988 @@ -301,15 +331,21 @@ static int c_show(struct seq_file *m, void *v)
5989
5990 seq_printf(m, "processor\t: %d\n", cpu);
5991
5992 + seq_printf(m, "chip type\t: %s revision %c\n",
5993 + get_chip_name(&boot_cpu_data),
5994 + avr32_get_chip_revision(&boot_cpu_data) + 'A');
5995 if (boot_cpu_data.arch_type < NR_ARCH_NAMES)
5996 - seq_printf(m, "cpu family\t: %s revision %d\n",
5997 + seq_printf(m, "cpu arch\t: %s revision %d\n",
5998 arch_names[boot_cpu_data.arch_type],
5999 boot_cpu_data.arch_revision);
6000 if (boot_cpu_data.cpu_type < NR_CPU_NAMES)
6001 - seq_printf(m, "cpu type\t: %s revision %d\n",
6002 + seq_printf(m, "cpu core\t: %s revision %d\n",
6003 cpu_names[boot_cpu_data.cpu_type],
6004 boot_cpu_data.cpu_revision);
6005
6006 + freq = (clk_get_rate(boot_cpu_data.clk) + 500) / 1000;
6007 + seq_printf(m, "cpu MHz\t\t: %u.%03u\n", freq / 1000, freq % 1000);
6008 +
6009 seq_printf(m, "i-cache\t\t: %dK (%u ways x %u sets x %u)\n",
6010 icache_size >> 10,
6011 boot_cpu_data.icache.ways,
6012 @@ -320,7 +356,13 @@ static int c_show(struct seq_file *m, void *v)
6013 boot_cpu_data.dcache.ways,
6014 boot_cpu_data.dcache.sets,
6015 boot_cpu_data.dcache.linesz);
6016 - seq_printf(m, "bogomips\t: %lu.%02lu\n",
6017 +
6018 + seq_printf(m, "features\t:");
6019 + for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++)
6020 + if (boot_cpu_data.features & (1 << i))
6021 + seq_printf(m, " %s", cpu_feature_flags[i]);
6022 +
6023 + seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
6024 boot_cpu_data.loops_per_jiffy / (500000/HZ),
6025 (boot_cpu_data.loops_per_jiffy / (5000/HZ)) % 100);
6026
6027 @@ -343,7 +385,7 @@ static void c_stop(struct seq_file *m, void *v)
6028
6029 }
6030
6031 -struct seq_operations cpuinfo_op = {
6032 +const struct seq_operations cpuinfo_op = {
6033 .start = c_start,
6034 .next = c_next,
6035 .stop = c_stop,
6036 diff --git a/arch/avr32/kernel/dma-controller.c b/arch/avr32/kernel/dma-controller.c
6037 new file mode 100644
6038 index 0000000..fb654b3
6039 --- /dev/null
6040 +++ b/arch/avr32/kernel/dma-controller.c
6041 @@ -0,0 +1,34 @@
6042 +/*
6043 + * Preliminary DMA controller framework for AVR32
6044 + *
6045 + * Copyright (C) 2005-2006 Atmel Corporation
6046 + *
6047 + * This program is free software; you can redistribute it and/or modify
6048 + * it under the terms of the GNU General Public License version 2 as
6049 + * published by the Free Software Foundation.
6050 + */
6051 +#include <asm/dma-controller.h>
6052 +
6053 +static LIST_HEAD(controllers);
6054 +
6055 +int register_dma_controller(struct dma_controller *dmac)
6056 +{
6057 + static int next_id;
6058 +
6059 + dmac->id = next_id++;
6060 + list_add_tail(&dmac->list, &controllers);
6061 +
6062 + return 0;
6063 +}
6064 +EXPORT_SYMBOL(register_dma_controller);
6065 +
6066 +struct dma_controller *find_dma_controller(int id)
6067 +{
6068 + struct dma_controller *dmac;
6069 +
6070 + list_for_each_entry(dmac, &controllers, list)
6071 + if (dmac->id == id)
6072 + return dmac;
6073 + return NULL;
6074 +}
6075 +EXPORT_SYMBOL(find_dma_controller);
6076 diff --git a/arch/avr32/kernel/irq.c b/arch/avr32/kernel/irq.c
6077 index 61f2de2..a8e767d 100644
6078 --- a/arch/avr32/kernel/irq.c
6079 +++ b/arch/avr32/kernel/irq.c
6080 @@ -25,6 +25,17 @@ void ack_bad_irq(unsigned int irq)
6081 printk("unexpected IRQ %u\n", irq);
6082 }
6083
6084 +/* May be overridden by platform code */
6085 +int __weak nmi_enable(void)
6086 +{
6087 + return -ENOSYS;
6088 +}
6089 +
6090 +void __weak nmi_disable(void)
6091 +{
6092 +
6093 +}
6094 +
6095 #ifdef CONFIG_PROC_FS
6096 int show_interrupts(struct seq_file *p, void *v)
6097 {
6098 diff --git a/arch/avr32/kernel/kprobes.c b/arch/avr32/kernel/kprobes.c
6099 index 799ba89..f820e9f 100644
6100 --- a/arch/avr32/kernel/kprobes.c
6101 +++ b/arch/avr32/kernel/kprobes.c
6102 @@ -48,6 +48,7 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
6103 void __kprobes arch_arm_kprobe(struct kprobe *p)
6104 {
6105 pr_debug("arming kprobe at %p\n", p->addr);
6106 + ocd_enable(NULL);
6107 *p->addr = BREAKPOINT_INSTRUCTION;
6108 flush_icache_range((unsigned long)p->addr,
6109 (unsigned long)p->addr + sizeof(kprobe_opcode_t));
6110 @@ -56,6 +57,7 @@ void __kprobes arch_arm_kprobe(struct kprobe *p)
6111 void __kprobes arch_disarm_kprobe(struct kprobe *p)
6112 {
6113 pr_debug("disarming kprobe at %p\n", p->addr);
6114 + ocd_disable(NULL);
6115 *p->addr = p->opcode;
6116 flush_icache_range((unsigned long)p->addr,
6117 (unsigned long)p->addr + sizeof(kprobe_opcode_t));
6118 @@ -260,9 +262,6 @@ int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
6119
6120 int __init arch_init_kprobes(void)
6121 {
6122 - printk("KPROBES: Enabling monitor mode (MM|DBE)...\n");
6123 - ocd_write(DC, (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT));
6124 -
6125 /* TODO: Register kretprobe trampoline */
6126 return 0;
6127 }
6128 diff --git a/arch/avr32/kernel/nmi_debug.c b/arch/avr32/kernel/nmi_debug.c
6129 new file mode 100644
6130 index 0000000..3414b85
6131 --- /dev/null
6132 +++ b/arch/avr32/kernel/nmi_debug.c
6133 @@ -0,0 +1,82 @@
6134 +/*
6135 + * Copyright (C) 2007 Atmel Corporation
6136 + *
6137 + * This program is free software; you can redistribute it and/or modify
6138 + * it under the terms of the GNU General Public License version 2 as
6139 + * published by the Free Software Foundation.
6140 + */
6141 +#include <linux/delay.h>
6142 +#include <linux/kdebug.h>
6143 +#include <linux/notifier.h>
6144 +#include <linux/sched.h>
6145 +
6146 +#include <asm/irq.h>
6147 +
6148 +enum nmi_action {
6149 + NMI_SHOW_STATE = 1 << 0,
6150 + NMI_SHOW_REGS = 1 << 1,
6151 + NMI_DIE = 1 << 2,
6152 + NMI_DEBOUNCE = 1 << 3,
6153 +};
6154 +
6155 +static unsigned long nmi_actions;
6156 +
6157 +static int nmi_debug_notify(struct notifier_block *self,
6158 + unsigned long val, void *data)
6159 +{
6160 + struct die_args *args = data;
6161 +
6162 + if (likely(val != DIE_NMI))
6163 + return NOTIFY_DONE;
6164 +
6165 + if (nmi_actions & NMI_SHOW_STATE)
6166 + show_state();
6167 + if (nmi_actions & NMI_SHOW_REGS)
6168 + show_regs(args->regs);
6169 + if (nmi_actions & NMI_DEBOUNCE)
6170 + mdelay(10);
6171 + if (nmi_actions & NMI_DIE)
6172 + return NOTIFY_BAD;
6173 +
6174 + return NOTIFY_OK;
6175 +}
6176 +
6177 +static struct notifier_block nmi_debug_nb = {
6178 + .notifier_call = nmi_debug_notify,
6179 +};
6180 +
6181 +static int __init nmi_debug_setup(char *str)
6182 +{
6183 + char *p, *sep;
6184 +
6185 + register_die_notifier(&nmi_debug_nb);
6186 + if (nmi_enable()) {
6187 + printk(KERN_WARNING "Unable to enable NMI.\n");
6188 + return 0;
6189 + }
6190 +
6191 + if (*str != '=')
6192 + return 0;
6193 +
6194 + for (p = str + 1; *p; p = sep + 1) {
6195 + sep = strchr(p, ',');
6196 + if (sep)
6197 + *sep = 0;
6198 + if (strcmp(p, "state") == 0)
6199 + nmi_actions |= NMI_SHOW_STATE;
6200 + else if (strcmp(p, "regs") == 0)
6201 + nmi_actions |= NMI_SHOW_REGS;
6202 + else if (strcmp(p, "debounce") == 0)
6203 + nmi_actions |= NMI_DEBOUNCE;
6204 + else if (strcmp(p, "die") == 0)
6205 + nmi_actions |= NMI_DIE;
6206 + else
6207 + printk(KERN_WARNING "NMI: Unrecognized action `%s'\n",
6208 + p);
6209 + if (!sep)
6210 + break;
6211 + }
6212 +
6213 + return 0;
6214 +}
6215 +__setup("nmi_debug", nmi_debug_setup);
6216 diff --git a/arch/avr32/kernel/ocd.c b/arch/avr32/kernel/ocd.c
6217 new file mode 100644
6218 index 0000000..c4f0232
6219 --- /dev/null
6220 +++ b/arch/avr32/kernel/ocd.c
6221 @@ -0,0 +1,163 @@
6222 +/*
6223 + * Copyright (C) 2007 Atmel Corporation
6224 + *
6225 + * This program is free software; you can redistribute it and/or modify
6226 + * it under the terms of the GNU General Public License version 2 as
6227 + * published by the Free Software Foundation.
6228 + */
6229 +#include <linux/init.h>
6230 +#include <linux/sched.h>
6231 +#include <linux/spinlock.h>
6232 +
6233 +#include <asm/ocd.h>
6234 +
6235 +static long ocd_count;
6236 +static spinlock_t ocd_lock;
6237 +
6238 +/**
6239 + * ocd_enable - enable on-chip debugging
6240 + * @child: task to be debugged
6241 + *
6242 + * If @child is non-NULL, ocd_enable() first checks if debugging has
6243 + * already been enabled for @child, and if it has, does nothing.
6244 + *
6245 + * If @child is NULL (e.g. when debugging the kernel), or debugging
6246 + * has not already been enabled for it, ocd_enable() increments the
6247 + * reference count and enables the debugging hardware.
6248 + */
6249 +void ocd_enable(struct task_struct *child)
6250 +{
6251 + u32 dc;
6252 +
6253 + if (child)
6254 + pr_debug("ocd_enable: child=%s [%u]\n",
6255 + child->comm, child->pid);
6256 + else
6257 + pr_debug("ocd_enable (no child)\n");
6258 +
6259 + if (!child || !test_and_set_tsk_thread_flag(child, TIF_DEBUG)) {
6260 + spin_lock(&ocd_lock);
6261 + ocd_count++;
6262 + dc = ocd_read(DC);
6263 + dc |= (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT);
6264 + ocd_write(DC, dc);
6265 + spin_unlock(&ocd_lock);
6266 + }
6267 +}
6268 +
6269 +/**
6270 + * ocd_disable - disable on-chip debugging
6271 + * @child: task that was being debugged, but isn't anymore
6272 + *
6273 + * If @child is non-NULL, ocd_disable() checks if debugging is enabled
6274 + * for @child, and if it isn't, does nothing.
6275 + *
6276 + * If @child is NULL (e.g. when debugging the kernel), or debugging is
6277 + * enabled, ocd_disable() decrements the reference count, and if it
6278 + * reaches zero, disables the debugging hardware.
6279 + */
6280 +void ocd_disable(struct task_struct *child)
6281 +{
6282 + u32 dc;
6283 +
6284 + if (!child)
6285 + pr_debug("ocd_disable (no child)\n");
6286 + else if (test_tsk_thread_flag(child, TIF_DEBUG))
6287 + pr_debug("ocd_disable: child=%s [%u]\n",
6288 + child->comm, child->pid);
6289 +
6290 + if (!child || test_and_clear_tsk_thread_flag(child, TIF_DEBUG)) {
6291 + spin_lock(&ocd_lock);
6292 + ocd_count--;
6293 +
6294 + WARN_ON(ocd_count < 0);
6295 +
6296 + if (ocd_count <= 0) {
6297 + dc = ocd_read(DC);
6298 + dc &= ~((1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT));
6299 + ocd_write(DC, dc);
6300 + }
6301 + spin_unlock(&ocd_lock);
6302 + }
6303 +}
6304 +
6305 +#ifdef CONFIG_DEBUG_FS
6306 +#include <linux/debugfs.h>
6307 +#include <linux/module.h>
6308 +
6309 +static struct dentry *ocd_debugfs_root;
6310 +static struct dentry *ocd_debugfs_DC;
6311 +static struct dentry *ocd_debugfs_DS;
6312 +static struct dentry *ocd_debugfs_count;
6313 +
6314 +static u64 ocd_DC_get(void *data)
6315 +{
6316 + return ocd_read(DC);
6317 +}
6318 +static void ocd_DC_set(void *data, u64 val)
6319 +{
6320 + ocd_write(DC, val);
6321 +}
6322 +DEFINE_SIMPLE_ATTRIBUTE(fops_DC, ocd_DC_get, ocd_DC_set, "0x%08llx\n");
6323 +
6324 +static u64 ocd_DS_get(void *data)
6325 +{
6326 + return ocd_read(DS);
6327 +}
6328 +DEFINE_SIMPLE_ATTRIBUTE(fops_DS, ocd_DS_get, NULL, "0x%08llx\n");
6329 +
6330 +static u64 ocd_count_get(void *data)
6331 +{
6332 + return ocd_count;
6333 +}
6334 +DEFINE_SIMPLE_ATTRIBUTE(fops_count, ocd_count_get, NULL, "%lld\n");
6335 +
6336 +static void ocd_debugfs_init(void)
6337 +{
6338 + struct dentry *root;
6339 +
6340 + root = debugfs_create_dir("ocd", NULL);
6341 + if (IS_ERR(root) || !root)
6342 + goto err_root;
6343 + ocd_debugfs_root = root;
6344 +
6345 + ocd_debugfs_DC = debugfs_create_file("DC", S_IRUSR | S_IWUSR,
6346 + root, NULL, &fops_DC);
6347 + if (!ocd_debugfs_DC)
6348 + goto err_DC;
6349 +
6350 + ocd_debugfs_DS = debugfs_create_file("DS", S_IRUSR, root,
6351 + NULL, &fops_DS);
6352 + if (!ocd_debugfs_DS)
6353 + goto err_DS;
6354 +
6355 + ocd_debugfs_count = debugfs_create_file("count", S_IRUSR, root,
6356 + NULL, &fops_count);
6357 + if (!ocd_debugfs_count)
6358 + goto err_count;
6359 +
6360 + return;
6361 +
6362 +err_count:
6363 + debugfs_remove(ocd_debugfs_DS);
6364 +err_DS:
6365 + debugfs_remove(ocd_debugfs_DC);
6366 +err_DC:
6367 + debugfs_remove(ocd_debugfs_root);
6368 +err_root:
6369 + printk(KERN_WARNING "OCD: Failed to create debugfs entries\n");
6370 +}
6371 +#else
6372 +static inline void ocd_debugfs_init(void)
6373 +{
6374 +
6375 +}
6376 +#endif
6377 +
6378 +static int __init ocd_init(void)
6379 +{
6380 + spin_lock_init(&ocd_lock);
6381 + ocd_debugfs_init();
6382 + return 0;
6383 +}
6384 +arch_initcall(ocd_init);
6385 diff --git a/arch/avr32/kernel/process.c b/arch/avr32/kernel/process.c
6386 index 9d6dac8..eaaa69b 100644
6387 --- a/arch/avr32/kernel/process.c
6388 +++ b/arch/avr32/kernel/process.c
6389 @@ -103,7 +103,7 @@ EXPORT_SYMBOL(kernel_thread);
6390 */
6391 void exit_thread(void)
6392 {
6393 - /* nothing to do */
6394 + ocd_disable(current);
6395 }
6396
6397 void flush_thread(void)
6398 @@ -345,6 +345,9 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
6399 p->thread.cpu_context.ksp = (unsigned long)childregs;
6400 p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
6401
6402 + if ((clone_flags & CLONE_PTRACE) && test_thread_flag(TIF_DEBUG))
6403 + ocd_enable(p);
6404 +
6405 return 0;
6406 }
6407
6408 diff --git a/arch/avr32/kernel/ptrace.c b/arch/avr32/kernel/ptrace.c
6409 index 002369e..1fed38f 100644
6410 --- a/arch/avr32/kernel/ptrace.c
6411 +++ b/arch/avr32/kernel/ptrace.c
6412 @@ -58,6 +58,7 @@ void ptrace_disable(struct task_struct *child)
6413 {
6414 clear_tsk_thread_flag(child, TIF_SINGLE_STEP);
6415 clear_tsk_thread_flag(child, TIF_BREAKPOINT);
6416 + ocd_disable(child);
6417 }
6418
6419 /*
6420 @@ -144,10 +145,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
6421 {
6422 int ret;
6423
6424 - pr_debug("ptrace: Enabling monitor mode...\n");
6425 - ocd_write(DC, ocd_read(DC) | (1 << OCD_DC_MM_BIT)
6426 - | (1 << OCD_DC_DBE_BIT));
6427 -
6428 switch (request) {
6429 /* Read the word at location addr in the child process */
6430 case PTRACE_PEEKTEXT:
6431 diff --git a/arch/avr32/kernel/setup.c b/arch/avr32/kernel/setup.c
6432 index 4b4c188..488078d 100644
6433 --- a/arch/avr32/kernel/setup.c
6434 +++ b/arch/avr32/kernel/setup.c
6435 @@ -273,6 +273,8 @@ static int __init early_parse_fbmem(char *p)
6436 printk(KERN_WARNING
6437 "Failed to allocate framebuffer memory\n");
6438 fbmem_size = 0;
6439 + } else {
6440 + memset(__va(fbmem_start), 0, fbmem_size);
6441 }
6442 }
6443
6444 diff --git a/arch/avr32/kernel/signal.c b/arch/avr32/kernel/signal.c
6445 index 0ec1485..5616a00 100644
6446 --- a/arch/avr32/kernel/signal.c
6447 +++ b/arch/avr32/kernel/signal.c
6448 @@ -270,19 +270,12 @@ int do_signal(struct pt_regs *regs, sigset_t *oldset, int syscall)
6449 if (!user_mode(regs))
6450 return 0;
6451
6452 - if (try_to_freeze()) {
6453 - signr = 0;
6454 - if (!signal_pending(current))
6455 - goto no_signal;
6456 - }
6457 -
6458 if (test_thread_flag(TIF_RESTORE_SIGMASK))
6459 oldset = &current->saved_sigmask;
6460 else if (!oldset)
6461 oldset = &current->blocked;
6462
6463 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
6464 -no_signal:
6465 if (syscall) {
6466 switch (regs->r12) {
6467 case -ERESTART_RESTARTBLOCK:
6468 diff --git a/arch/avr32/kernel/traps.c b/arch/avr32/kernel/traps.c
6469 index 870c075..cf6f686 100644
6470 --- a/arch/avr32/kernel/traps.c
6471 +++ b/arch/avr32/kernel/traps.c
6472 @@ -9,6 +9,7 @@
6473 #include <linux/bug.h>
6474 #include <linux/init.h>
6475 #include <linux/kallsyms.h>
6476 +#include <linux/kdebug.h>
6477 #include <linux/module.h>
6478 #include <linux/notifier.h>
6479 #include <linux/sched.h>
6480 @@ -107,9 +108,23 @@ void _exception(long signr, struct pt_regs *regs, int code,
6481
6482 asmlinkage void do_nmi(unsigned long ecr, struct pt_regs *regs)
6483 {
6484 - printk(KERN_ALERT "Got Non-Maskable Interrupt, dumping regs\n");
6485 - show_regs_log_lvl(regs, KERN_ALERT);
6486 - show_stack_log_lvl(current, regs->sp, regs, KERN_ALERT);
6487 + int ret;
6488 +
6489 + nmi_enter();
6490 +
6491 + ret = notify_die(DIE_NMI, "NMI", regs, 0, ecr, SIGINT);
6492 + switch (ret) {
6493 + case NOTIFY_OK:
6494 + case NOTIFY_STOP:
6495 + return;
6496 + case NOTIFY_BAD:
6497 + die("Fatal Non-Maskable Interrupt", regs, SIGINT);
6498 + default:
6499 + break;
6500 + }
6501 +
6502 + printk(KERN_ALERT "Got NMI, but nobody cared. Disabling...\n");
6503 + nmi_disable();
6504 }
6505
6506 asmlinkage void do_critical_exception(unsigned long ecr, struct pt_regs *regs)
6507 diff --git a/arch/avr32/mach-at32ap/Kconfig b/arch/avr32/mach-at32ap/Kconfig
6508 index eb30783..0eb590a 100644
6509 --- a/arch/avr32/mach-at32ap/Kconfig
6510 +++ b/arch/avr32/mach-at32ap/Kconfig
6511 @@ -3,9 +3,9 @@ if PLATFORM_AT32AP
6512 menu "Atmel AVR32 AP options"
6513
6514 choice
6515 - prompt "AT32AP7000 static memory bus width"
6516 - depends on CPU_AT32AP7000
6517 - default AP7000_16_BIT_SMC
6518 + prompt "AT32AP700x static memory bus width"
6519 + depends on CPU_AT32AP700X
6520 + default AP700X_16_BIT_SMC
6521 help
6522 Define the width of the AP7000 external static memory interface.
6523 This is used to determine how to mangle the address and/or data
6524 @@ -15,17 +15,24 @@ choice
6525 width for all chip selects, excluding the flash (which is using
6526 raw access and is thus not affected by any of this.)
6527
6528 -config AP7000_32_BIT_SMC
6529 +config AP700X_32_BIT_SMC
6530 bool "32 bit"
6531
6532 -config AP7000_16_BIT_SMC
6533 +config AP700X_16_BIT_SMC
6534 bool "16 bit"
6535
6536 -config AP7000_8_BIT_SMC
6537 +config AP700X_8_BIT_SMC
6538 bool "8 bit"
6539
6540 endchoice
6541
6542 +config GPIO_DEV
6543 + bool "GPIO /dev interface"
6544 + select CONFIGFS_FS
6545 + default n
6546 + help
6547 + Say `Y' to enable a /dev interface to the GPIO pins.
6548 +
6549 endmenu
6550
6551 endif # PLATFORM_AT32AP
6552 diff --git a/arch/avr32/mach-at32ap/Makefile b/arch/avr32/mach-at32ap/Makefile
6553 index a8b4450..0f6162e 100644
6554 --- a/arch/avr32/mach-at32ap/Makefile
6555 +++ b/arch/avr32/mach-at32ap/Makefile
6556 @@ -1,4 +1,5 @@
6557 obj-y += at32ap.o clock.o intc.o extint.o pio.o hsmc.o
6558 -obj-$(CONFIG_CPU_AT32AP7000) += at32ap7000.o
6559 -obj-$(CONFIG_CPU_AT32AP7000) += time-tc.o
6560 +obj-$(CONFIG_CPU_AT32AP700X) += at32ap700x.o
6561 +obj-$(CONFIG_CPU_AT32AP700X) += time-tc.o
6562 obj-$(CONFIG_CPU_FREQ_AT32AP) += cpufreq.o
6563 +obj-$(CONFIG_GPIO_DEV) += gpio-dev.o
6564 diff --git a/arch/avr32/mach-at32ap/at32ap7000.c b/arch/avr32/mach-at32ap/at32ap7000.c
6565 deleted file mode 100644
6566 index 7c4388f..0000000
6567 --- a/arch/avr32/mach-at32ap/at32ap7000.c
6568 +++ /dev/null
6569 @@ -1,1730 +0,0 @@
6570 -/*
6571 - * Copyright (C) 2005-2006 Atmel Corporation
6572 - *
6573 - * This program is free software; you can redistribute it and/or modify
6574 - * it under the terms of the GNU General Public License version 2 as
6575 - * published by the Free Software Foundation.
6576 - */
6577 -#include <linux/clk.h>
6578 -#include <linux/fb.h>
6579 -#include <linux/init.h>
6580 -#include <linux/platform_device.h>
6581 -#include <linux/dma-mapping.h>
6582 -#include <linux/spi/spi.h>
6583 -
6584 -#include <asm/io.h>
6585 -
6586 -#include <asm/arch/at32ap7000.h>
6587 -#include <asm/arch/board.h>
6588 -#include <asm/arch/portmux.h>
6589 -
6590 -#include <video/atmel_lcdc.h>
6591 -
6592 -#include "clock.h"
6593 -#include "hmatrix.h"
6594 -#include "pio.h"
6595 -#include "pm.h"
6596 -
6597 -
6598 -#define PBMEM(base) \
6599 - { \
6600 - .start = base, \
6601 - .end = base + 0x3ff, \
6602 - .flags = IORESOURCE_MEM, \
6603 - }
6604 -#define IRQ(num) \
6605 - { \
6606 - .start = num, \
6607 - .end = num, \
6608 - .flags = IORESOURCE_IRQ, \
6609 - }
6610 -#define NAMED_IRQ(num, _name) \
6611 - { \
6612 - .start = num, \
6613 - .end = num, \
6614 - .name = _name, \
6615 - .flags = IORESOURCE_IRQ, \
6616 - }
6617 -
6618 -/* REVISIT these assume *every* device supports DMA, but several
6619 - * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
6620 - */
6621 -#define DEFINE_DEV(_name, _id) \
6622 -static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \
6623 -static struct platform_device _name##_id##_device = { \
6624 - .name = #_name, \
6625 - .id = _id, \
6626 - .dev = { \
6627 - .dma_mask = &_name##_id##_dma_mask, \
6628 - .coherent_dma_mask = DMA_32BIT_MASK, \
6629 - }, \
6630 - .resource = _name##_id##_resource, \
6631 - .num_resources = ARRAY_SIZE(_name##_id##_resource), \
6632 -}
6633 -#define DEFINE_DEV_DATA(_name, _id) \
6634 -static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \
6635 -static struct platform_device _name##_id##_device = { \
6636 - .name = #_name, \
6637 - .id = _id, \
6638 - .dev = { \
6639 - .dma_mask = &_name##_id##_dma_mask, \
6640 - .platform_data = &_name##_id##_data, \
6641 - .coherent_dma_mask = DMA_32BIT_MASK, \
6642 - }, \
6643 - .resource = _name##_id##_resource, \
6644 - .num_resources = ARRAY_SIZE(_name##_id##_resource), \
6645 -}
6646 -
6647 -#define select_peripheral(pin, periph, flags) \
6648 - at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
6649 -
6650 -#define DEV_CLK(_name, devname, bus, _index) \
6651 -static struct clk devname##_##_name = { \
6652 - .name = #_name, \
6653 - .dev = &devname##_device.dev, \
6654 - .parent = &bus##_clk, \
6655 - .mode = bus##_clk_mode, \
6656 - .get_rate = bus##_clk_get_rate, \
6657 - .index = _index, \
6658 -}
6659 -
6660 -static DEFINE_SPINLOCK(pm_lock);
6661 -
6662 -unsigned long at32ap7000_osc_rates[3] = {
6663 - [0] = 32768,
6664 - /* FIXME: these are ATSTK1002-specific */
6665 - [1] = 20000000,
6666 - [2] = 12000000,
6667 -};
6668 -
6669 -static unsigned long osc_get_rate(struct clk *clk)
6670 -{
6671 - return at32ap7000_osc_rates[clk->index];
6672 -}
6673 -
6674 -static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
6675 -{
6676 - unsigned long div, mul, rate;
6677 -
6678 - if (!(control & PM_BIT(PLLEN)))
6679 - return 0;
6680 -
6681 - div = PM_BFEXT(PLLDIV, control) + 1;
6682 - mul = PM_BFEXT(PLLMUL, control) + 1;
6683 -
6684 - rate = clk->parent->get_rate(clk->parent);
6685 - rate = (rate + div / 2) / div;
6686 - rate *= mul;
6687 -
6688 - return rate;
6689 -}
6690 -
6691 -static unsigned long pll0_get_rate(struct clk *clk)
6692 -{
6693 - u32 control;
6694 -
6695 - control = pm_readl(PLL0);
6696 -
6697 - return pll_get_rate(clk, control);
6698 -}
6699 -
6700 -static unsigned long pll1_get_rate(struct clk *clk)
6701 -{
6702 - u32 control;
6703 -
6704 - control = pm_readl(PLL1);
6705 -
6706 - return pll_get_rate(clk, control);
6707 -}
6708 -
6709 -/*
6710 - * The AT32AP7000 has five primary clock sources: One 32kHz
6711 - * oscillator, two crystal oscillators and two PLLs.
6712 - */
6713 -static struct clk osc32k = {
6714 - .name = "osc32k",
6715 - .get_rate = osc_get_rate,
6716 - .users = 1,
6717 - .index = 0,
6718 -};
6719 -static struct clk osc0 = {
6720 - .name = "osc0",
6721 - .get_rate = osc_get_rate,
6722 - .users = 1,
6723 - .index = 1,
6724 -};
6725 -static struct clk osc1 = {
6726 - .name = "osc1",
6727 - .get_rate = osc_get_rate,
6728 - .index = 2,
6729 -};
6730 -static struct clk pll0 = {
6731 - .name = "pll0",
6732 - .get_rate = pll0_get_rate,
6733 - .parent = &osc0,
6734 -};
6735 -static struct clk pll1 = {
6736 - .name = "pll1",
6737 - .get_rate = pll1_get_rate,
6738 - .parent = &osc0,
6739 -};
6740 -
6741 -/*
6742 - * The main clock can be either osc0 or pll0. The boot loader may
6743 - * have chosen one for us, so we don't really know which one until we
6744 - * have a look at the SM.
6745 - */
6746 -static struct clk *main_clock;
6747 -
6748 -/*
6749 - * Synchronous clocks are generated from the main clock. The clocks
6750 - * must satisfy the constraint
6751 - * fCPU >= fHSB >= fPB
6752 - * i.e. each clock must not be faster than its parent.
6753 - */
6754 -static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
6755 -{
6756 - return main_clock->get_rate(main_clock) >> shift;
6757 -};
6758 -
6759 -static void cpu_clk_mode(struct clk *clk, int enabled)
6760 -{
6761 - unsigned long flags;
6762 - u32 mask;
6763 -
6764 - spin_lock_irqsave(&pm_lock, flags);
6765 - mask = pm_readl(CPU_MASK);
6766 - if (enabled)
6767 - mask |= 1 << clk->index;
6768 - else
6769 - mask &= ~(1 << clk->index);
6770 - pm_writel(CPU_MASK, mask);
6771 - spin_unlock_irqrestore(&pm_lock, flags);
6772 -}
6773 -
6774 -static unsigned long cpu_clk_get_rate(struct clk *clk)
6775 -{
6776 - unsigned long cksel, shift = 0;
6777 -
6778 - cksel = pm_readl(CKSEL);
6779 - if (cksel & PM_BIT(CPUDIV))
6780 - shift = PM_BFEXT(CPUSEL, cksel) + 1;
6781 -
6782 - return bus_clk_get_rate(clk, shift);
6783 -}
6784 -
6785 -static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
6786 -{
6787 - u32 control;
6788 - unsigned long parent_rate, child_div, actual_rate, div;
6789 -
6790 - parent_rate = clk->parent->get_rate(clk->parent);
6791 - control = pm_readl(CKSEL);
6792 -
6793 - if (control & PM_BIT(HSBDIV))
6794 - child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
6795 - else
6796 - child_div = 1;
6797 -
6798 - if (rate > 3 * (parent_rate / 4) || child_div == 1) {
6799 - actual_rate = parent_rate;
6800 - control &= ~PM_BIT(CPUDIV);
6801 - } else {
6802 - unsigned int cpusel;
6803 - div = (parent_rate + rate / 2) / rate;
6804 - if (div > child_div)
6805 - div = child_div;
6806 - cpusel = (div > 1) ? (fls(div) - 2) : 0;
6807 - control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
6808 - actual_rate = parent_rate / (1 << (cpusel + 1));
6809 - }
6810 -
6811 - pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
6812 - clk->name, rate, actual_rate);
6813 -
6814 - if (apply)
6815 - pm_writel(CKSEL, control);
6816 -
6817 - return actual_rate;
6818 -}
6819 -
6820 -static void hsb_clk_mode(struct clk *clk, int enabled)
6821 -{
6822 - unsigned long flags;
6823 - u32 mask;
6824 -
6825 - spin_lock_irqsave(&pm_lock, flags);
6826 - mask = pm_readl(HSB_MASK);
6827 - if (enabled)
6828 - mask |= 1 << clk->index;
6829 - else
6830 - mask &= ~(1 << clk->index);
6831 - pm_writel(HSB_MASK, mask);
6832 - spin_unlock_irqrestore(&pm_lock, flags);
6833 -}
6834 -
6835 -static unsigned long hsb_clk_get_rate(struct clk *clk)
6836 -{
6837 - unsigned long cksel, shift = 0;
6838 -
6839 - cksel = pm_readl(CKSEL);
6840 - if (cksel & PM_BIT(HSBDIV))
6841 - shift = PM_BFEXT(HSBSEL, cksel) + 1;
6842 -
6843 - return bus_clk_get_rate(clk, shift);
6844 -}
6845 -
6846 -static void pba_clk_mode(struct clk *clk, int enabled)
6847 -{
6848 - unsigned long flags;
6849 - u32 mask;
6850 -
6851 - spin_lock_irqsave(&pm_lock, flags);
6852 - mask = pm_readl(PBA_MASK);
6853 - if (enabled)
6854 - mask |= 1 << clk->index;
6855 - else
6856 - mask &= ~(1 << clk->index);
6857 - pm_writel(PBA_MASK, mask);
6858 - spin_unlock_irqrestore(&pm_lock, flags);
6859 -}
6860 -
6861 -static unsigned long pba_clk_get_rate(struct clk *clk)
6862 -{
6863 - unsigned long cksel, shift = 0;
6864 -
6865 - cksel = pm_readl(CKSEL);
6866 - if (cksel & PM_BIT(PBADIV))
6867 - shift = PM_BFEXT(PBASEL, cksel) + 1;
6868 -
6869 - return bus_clk_get_rate(clk, shift);
6870 -}
6871 -
6872 -static void pbb_clk_mode(struct clk *clk, int enabled)
6873 -{
6874 - unsigned long flags;
6875 - u32 mask;
6876 -
6877 - spin_lock_irqsave(&pm_lock, flags);
6878 - mask = pm_readl(PBB_MASK);
6879 - if (enabled)
6880 - mask |= 1 << clk->index;
6881 - else
6882 - mask &= ~(1 << clk->index);
6883 - pm_writel(PBB_MASK, mask);
6884 - spin_unlock_irqrestore(&pm_lock, flags);
6885 -}
6886 -
6887 -static unsigned long pbb_clk_get_rate(struct clk *clk)
6888 -{
6889 - unsigned long cksel, shift = 0;
6890 -
6891 - cksel = pm_readl(CKSEL);
6892 - if (cksel & PM_BIT(PBBDIV))
6893 - shift = PM_BFEXT(PBBSEL, cksel) + 1;
6894 -
6895 - return bus_clk_get_rate(clk, shift);
6896 -}
6897 -
6898 -static struct clk cpu_clk = {
6899 - .name = "cpu",
6900 - .get_rate = cpu_clk_get_rate,
6901 - .set_rate = cpu_clk_set_rate,
6902 - .users = 1,
6903 -};
6904 -static struct clk hsb_clk = {
6905 - .name = "hsb",
6906 - .parent = &cpu_clk,
6907 - .get_rate = hsb_clk_get_rate,
6908 -};
6909 -static struct clk pba_clk = {
6910 - .name = "pba",
6911 - .parent = &hsb_clk,
6912 - .mode = hsb_clk_mode,
6913 - .get_rate = pba_clk_get_rate,
6914 - .index = 1,
6915 -};
6916 -static struct clk pbb_clk = {
6917 - .name = "pbb",
6918 - .parent = &hsb_clk,
6919 - .mode = hsb_clk_mode,
6920 - .get_rate = pbb_clk_get_rate,
6921 - .users = 1,
6922 - .index = 2,
6923 -};
6924 -
6925 -/* --------------------------------------------------------------------
6926 - * Generic Clock operations
6927 - * -------------------------------------------------------------------- */
6928 -
6929 -static void genclk_mode(struct clk *clk, int enabled)
6930 -{
6931 - u32 control;
6932 -
6933 - control = pm_readl(GCCTRL(clk->index));
6934 - if (enabled)
6935 - control |= PM_BIT(CEN);
6936 - else
6937 - control &= ~PM_BIT(CEN);
6938 - pm_writel(GCCTRL(clk->index), control);
6939 -}
6940 -
6941 -static unsigned long genclk_get_rate(struct clk *clk)
6942 -{
6943 - u32 control;
6944 - unsigned long div = 1;
6945 -
6946 - control = pm_readl(GCCTRL(clk->index));
6947 - if (control & PM_BIT(DIVEN))
6948 - div = 2 * (PM_BFEXT(DIV, control) + 1);
6949 -
6950 - return clk->parent->get_rate(clk->parent) / div;
6951 -}
6952 -
6953 -static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
6954 -{
6955 - u32 control;
6956 - unsigned long parent_rate, actual_rate, div;
6957 -
6958 - parent_rate = clk->parent->get_rate(clk->parent);
6959 - control = pm_readl(GCCTRL(clk->index));
6960 -
6961 - if (rate > 3 * parent_rate / 4) {
6962 - actual_rate = parent_rate;
6963 - control &= ~PM_BIT(DIVEN);
6964 - } else {
6965 - div = (parent_rate + rate) / (2 * rate) - 1;
6966 - control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
6967 - actual_rate = parent_rate / (2 * (div + 1));
6968 - }
6969 -
6970 - dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
6971 - clk->name, rate, actual_rate);
6972 -
6973 - if (apply)
6974 - pm_writel(GCCTRL(clk->index), control);
6975 -
6976 - return actual_rate;
6977 -}
6978 -
6979 -int genclk_set_parent(struct clk *clk, struct clk *parent)
6980 -{
6981 - u32 control;
6982 -
6983 - dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
6984 - clk->name, parent->name, clk->parent->name);
6985 -
6986 - control = pm_readl(GCCTRL(clk->index));
6987 -
6988 - if (parent == &osc1 || parent == &pll1)
6989 - control |= PM_BIT(OSCSEL);
6990 - else if (parent == &osc0 || parent == &pll0)
6991 - control &= ~PM_BIT(OSCSEL);
6992 - else
6993 - return -EINVAL;
6994 -
6995 - if (parent == &pll0 || parent == &pll1)
6996 - control |= PM_BIT(PLLSEL);
6997 - else
6998 - control &= ~PM_BIT(PLLSEL);
6999 -
7000 - pm_writel(GCCTRL(clk->index), control);
7001 - clk->parent = parent;
7002 -
7003 - return 0;
7004 -}
7005 -
7006 -static void __init genclk_init_parent(struct clk *clk)
7007 -{
7008 - u32 control;
7009 - struct clk *parent;
7010 -
7011 - BUG_ON(clk->index > 7);
7012 -
7013 - control = pm_readl(GCCTRL(clk->index));
7014 - if (control & PM_BIT(OSCSEL))
7015 - parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
7016 - else
7017 - parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
7018 -
7019 - clk->parent = parent;
7020 -}
7021 -
7022 -/* --------------------------------------------------------------------
7023 - * System peripherals
7024 - * -------------------------------------------------------------------- */
7025 -static struct resource at32_pm0_resource[] = {
7026 - {
7027 - .start = 0xfff00000,
7028 - .end = 0xfff0007f,
7029 - .flags = IORESOURCE_MEM,
7030 - },
7031 - IRQ(20),
7032 -};
7033 -
7034 -static struct resource at32ap700x_rtc0_resource[] = {
7035 - {
7036 - .start = 0xfff00080,
7037 - .end = 0xfff000af,
7038 - .flags = IORESOURCE_MEM,
7039 - },
7040 - IRQ(21),
7041 -};
7042 -
7043 -static struct resource at32_wdt0_resource[] = {
7044 - {
7045 - .start = 0xfff000b0,
7046 - .end = 0xfff000cf,
7047 - .flags = IORESOURCE_MEM,
7048 - },
7049 -};
7050 -
7051 -static struct resource at32_eic0_resource[] = {
7052 - {
7053 - .start = 0xfff00100,
7054 - .end = 0xfff0013f,
7055 - .flags = IORESOURCE_MEM,
7056 - },
7057 - IRQ(19),
7058 -};
7059 -
7060 -DEFINE_DEV(at32_pm, 0);
7061 -DEFINE_DEV(at32ap700x_rtc, 0);
7062 -DEFINE_DEV(at32_wdt, 0);
7063 -DEFINE_DEV(at32_eic, 0);
7064 -
7065 -/*
7066 - * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
7067 - * is always running.
7068 - */
7069 -static struct clk at32_pm_pclk = {
7070 - .name = "pclk",
7071 - .dev = &at32_pm0_device.dev,
7072 - .parent = &pbb_clk,
7073 - .mode = pbb_clk_mode,
7074 - .get_rate = pbb_clk_get_rate,
7075 - .users = 1,
7076 - .index = 0,
7077 -};
7078 -
7079 -static struct resource intc0_resource[] = {
7080 - PBMEM(0xfff00400),
7081 -};
7082 -struct platform_device at32_intc0_device = {
7083 - .name = "intc",
7084 - .id = 0,
7085 - .resource = intc0_resource,
7086 - .num_resources = ARRAY_SIZE(intc0_resource),
7087 -};
7088 -DEV_CLK(pclk, at32_intc0, pbb, 1);
7089 -
7090 -static struct clk ebi_clk = {
7091 - .name = "ebi",
7092 - .parent = &hsb_clk,
7093 - .mode = hsb_clk_mode,
7094 - .get_rate = hsb_clk_get_rate,
7095 - .users = 1,
7096 -};
7097 -static struct clk hramc_clk = {
7098 - .name = "hramc",
7099 - .parent = &hsb_clk,
7100 - .mode = hsb_clk_mode,
7101 - .get_rate = hsb_clk_get_rate,
7102 - .users = 1,
7103 - .index = 3,
7104 -};
7105 -
7106 -static struct resource smc0_resource[] = {
7107 - PBMEM(0xfff03400),
7108 -};
7109 -DEFINE_DEV(smc, 0);
7110 -DEV_CLK(pclk, smc0, pbb, 13);
7111 -DEV_CLK(mck, smc0, hsb, 0);
7112 -
7113 -static struct platform_device pdc_device = {
7114 - .name = "pdc",
7115 - .id = 0,
7116 -};
7117 -DEV_CLK(hclk, pdc, hsb, 4);
7118 -DEV_CLK(pclk, pdc, pba, 16);
7119 -
7120 -static struct clk pico_clk = {
7121 - .name = "pico",
7122 - .parent = &cpu_clk,
7123 - .mode = cpu_clk_mode,
7124 - .get_rate = cpu_clk_get_rate,
7125 - .users = 1,
7126 -};
7127 -
7128 -static struct resource dmaca0_resource[] = {
7129 - {
7130 - .start = 0xff200000,
7131 - .end = 0xff20ffff,
7132 - .flags = IORESOURCE_MEM,
7133 - },
7134 - IRQ(2),
7135 -};
7136 -DEFINE_DEV(dmaca, 0);
7137 -DEV_CLK(hclk, dmaca0, hsb, 10);
7138 -
7139 -/* --------------------------------------------------------------------
7140 - * HMATRIX
7141 - * -------------------------------------------------------------------- */
7142 -
7143 -static struct clk hmatrix_clk = {
7144 - .name = "hmatrix_clk",
7145 - .parent = &pbb_clk,
7146 - .mode = pbb_clk_mode,
7147 - .get_rate = pbb_clk_get_rate,
7148 - .index = 2,
7149 - .users = 1,
7150 -};
7151 -#define HMATRIX_BASE ((void __iomem *)0xfff00800)
7152 -
7153 -#define hmatrix_readl(reg) \
7154 - __raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
7155 -#define hmatrix_writel(reg,value) \
7156 - __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
7157 -
7158 -/*
7159 - * Set bits in the HMATRIX Special Function Register (SFR) used by the
7160 - * External Bus Interface (EBI). This can be used to enable special
7161 - * features like CompactFlash support, NAND Flash support, etc. on
7162 - * certain chipselects.
7163 - */
7164 -static inline void set_ebi_sfr_bits(u32 mask)
7165 -{
7166 - u32 sfr;
7167 -
7168 - clk_enable(&hmatrix_clk);
7169 - sfr = hmatrix_readl(SFR4);
7170 - sfr |= mask;
7171 - hmatrix_writel(SFR4, sfr);
7172 - clk_disable(&hmatrix_clk);
7173 -}
7174 -
7175 -/* --------------------------------------------------------------------
7176 - * System Timer/Counter (TC)
7177 - * -------------------------------------------------------------------- */
7178 -static struct resource at32_systc0_resource[] = {
7179 - PBMEM(0xfff00c00),
7180 - IRQ(22),
7181 -};
7182 -struct platform_device at32_systc0_device = {
7183 - .name = "systc",
7184 - .id = 0,
7185 - .resource = at32_systc0_resource,
7186 - .num_resources = ARRAY_SIZE(at32_systc0_resource),
7187 -};
7188 -DEV_CLK(pclk, at32_systc0, pbb, 3);
7189 -
7190 -/* --------------------------------------------------------------------
7191 - * PIO
7192 - * -------------------------------------------------------------------- */
7193 -
7194 -static struct resource pio0_resource[] = {
7195 - PBMEM(0xffe02800),
7196 - IRQ(13),
7197 -};
7198 -DEFINE_DEV(pio, 0);
7199 -DEV_CLK(mck, pio0, pba, 10);
7200 -
7201 -static struct resource pio1_resource[] = {
7202 - PBMEM(0xffe02c00),
7203 - IRQ(14),
7204 -};
7205 -DEFINE_DEV(pio, 1);
7206 -DEV_CLK(mck, pio1, pba, 11);
7207 -
7208 -static struct resource pio2_resource[] = {
7209 - PBMEM(0xffe03000),
7210 - IRQ(15),
7211 -};
7212 -DEFINE_DEV(pio, 2);
7213 -DEV_CLK(mck, pio2, pba, 12);
7214 -
7215 -static struct resource pio3_resource[] = {
7216 - PBMEM(0xffe03400),
7217 - IRQ(16),
7218 -};
7219 -DEFINE_DEV(pio, 3);
7220 -DEV_CLK(mck, pio3, pba, 13);
7221 -
7222 -static struct resource pio4_resource[] = {
7223 - PBMEM(0xffe03800),
7224 - IRQ(17),
7225 -};
7226 -DEFINE_DEV(pio, 4);
7227 -DEV_CLK(mck, pio4, pba, 14);
7228 -
7229 -void __init at32_add_system_devices(void)
7230 -{
7231 - platform_device_register(&at32_pm0_device);
7232 - platform_device_register(&at32_intc0_device);
7233 - platform_device_register(&at32ap700x_rtc0_device);
7234 - platform_device_register(&at32_wdt0_device);
7235 - platform_device_register(&at32_eic0_device);
7236 - platform_device_register(&smc0_device);
7237 - platform_device_register(&pdc_device);
7238 - platform_device_register(&dmaca0_device);
7239 -
7240 - platform_device_register(&at32_systc0_device);
7241 -
7242 - platform_device_register(&pio0_device);
7243 - platform_device_register(&pio1_device);
7244 - platform_device_register(&pio2_device);
7245 - platform_device_register(&pio3_device);
7246 - platform_device_register(&pio4_device);
7247 -}
7248 -
7249 -/* --------------------------------------------------------------------
7250 - * USART
7251 - * -------------------------------------------------------------------- */
7252 -
7253 -static struct atmel_uart_data atmel_usart0_data = {
7254 - .use_dma_tx = 1,
7255 - .use_dma_rx = 1,
7256 -};
7257 -static struct resource atmel_usart0_resource[] = {
7258 - PBMEM(0xffe00c00),
7259 - IRQ(6),
7260 -};
7261 -DEFINE_DEV_DATA(atmel_usart, 0);
7262 -DEV_CLK(usart, atmel_usart0, pba, 3);
7263 -
7264 -static struct atmel_uart_data atmel_usart1_data = {
7265 - .use_dma_tx = 1,
7266 - .use_dma_rx = 1,
7267 -};
7268 -static struct resource atmel_usart1_resource[] = {
7269 - PBMEM(0xffe01000),
7270 - IRQ(7),
7271 -};
7272 -DEFINE_DEV_DATA(atmel_usart, 1);
7273 -DEV_CLK(usart, atmel_usart1, pba, 4);
7274 -
7275 -static struct atmel_uart_data atmel_usart2_data = {
7276 - .use_dma_tx = 1,
7277 - .use_dma_rx = 1,
7278 -};
7279 -static struct resource atmel_usart2_resource[] = {
7280 - PBMEM(0xffe01400),
7281 - IRQ(8),
7282 -};
7283 -DEFINE_DEV_DATA(atmel_usart, 2);
7284 -DEV_CLK(usart, atmel_usart2, pba, 5);
7285 -
7286 -static struct atmel_uart_data atmel_usart3_data = {
7287 - .use_dma_tx = 1,
7288 - .use_dma_rx = 1,
7289 -};
7290 -static struct resource atmel_usart3_resource[] = {
7291 - PBMEM(0xffe01800),
7292 - IRQ(9),
7293 -};
7294 -DEFINE_DEV_DATA(atmel_usart, 3);
7295 -DEV_CLK(usart, atmel_usart3, pba, 6);
7296 -
7297 -static inline void configure_usart0_pins(void)
7298 -{
7299 - select_peripheral(PA(8), PERIPH_B, 0); /* RXD */
7300 - select_peripheral(PA(9), PERIPH_B, 0); /* TXD */
7301 -}
7302 -
7303 -static inline void configure_usart1_pins(void)
7304 -{
7305 - select_peripheral(PA(17), PERIPH_A, 0); /* RXD */
7306 - select_peripheral(PA(18), PERIPH_A, 0); /* TXD */
7307 -}
7308 -
7309 -static inline void configure_usart2_pins(void)
7310 -{
7311 - select_peripheral(PB(26), PERIPH_B, 0); /* RXD */
7312 - select_peripheral(PB(27), PERIPH_B, 0); /* TXD */
7313 -}
7314 -
7315 -static inline void configure_usart3_pins(void)
7316 -{
7317 - select_peripheral(PB(18), PERIPH_B, 0); /* RXD */
7318 - select_peripheral(PB(17), PERIPH_B, 0); /* TXD */
7319 -}
7320 -
7321 -static struct platform_device *__initdata at32_usarts[4];
7322 -
7323 -void __init at32_map_usart(unsigned int hw_id, unsigned int line)
7324 -{
7325 - struct platform_device *pdev;
7326 -
7327 - switch (hw_id) {
7328 - case 0:
7329 - pdev = &atmel_usart0_device;
7330 - configure_usart0_pins();
7331 - break;
7332 - case 1:
7333 - pdev = &atmel_usart1_device;
7334 - configure_usart1_pins();
7335 - break;
7336 - case 2:
7337 - pdev = &atmel_usart2_device;
7338 - configure_usart2_pins();
7339 - break;
7340 - case 3:
7341 - pdev = &atmel_usart3_device;
7342 - configure_usart3_pins();
7343 - break;
7344 - default:
7345 - return;
7346 - }
7347 -
7348 - if (PXSEG(pdev->resource[0].start) == P4SEG) {
7349 - /* Addresses in the P4 segment are permanently mapped 1:1 */
7350 - struct atmel_uart_data *data = pdev->dev.platform_data;
7351 - data->regs = (void __iomem *)pdev->resource[0].start;
7352 - }
7353 -
7354 - pdev->id = line;
7355 - at32_usarts[line] = pdev;
7356 -}
7357 -
7358 -struct platform_device *__init at32_add_device_usart(unsigned int id)
7359 -{
7360 - platform_device_register(at32_usarts[id]);
7361 - return at32_usarts[id];
7362 -}
7363 -
7364 -struct platform_device *atmel_default_console_device;
7365 -
7366 -void __init at32_setup_serial_console(unsigned int usart_id)
7367 -{
7368 - atmel_default_console_device = at32_usarts[usart_id];
7369 -}
7370 -
7371 -/* --------------------------------------------------------------------
7372 - * Ethernet
7373 - * -------------------------------------------------------------------- */
7374 -
7375 -static struct eth_platform_data macb0_data;
7376 -static struct resource macb0_resource[] = {
7377 - PBMEM(0xfff01800),
7378 - IRQ(25),
7379 -};
7380 -DEFINE_DEV_DATA(macb, 0);
7381 -DEV_CLK(hclk, macb0, hsb, 8);
7382 -DEV_CLK(pclk, macb0, pbb, 6);
7383 -
7384 -static struct eth_platform_data macb1_data;
7385 -static struct resource macb1_resource[] = {
7386 - PBMEM(0xfff01c00),
7387 - IRQ(26),
7388 -};
7389 -DEFINE_DEV_DATA(macb, 1);
7390 -DEV_CLK(hclk, macb1, hsb, 9);
7391 -DEV_CLK(pclk, macb1, pbb, 7);
7392 -
7393 -struct platform_device *__init
7394 -at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
7395 -{
7396 - struct platform_device *pdev;
7397 -
7398 - switch (id) {
7399 - case 0:
7400 - pdev = &macb0_device;
7401 -
7402 - select_peripheral(PC(3), PERIPH_A, 0); /* TXD0 */
7403 - select_peripheral(PC(4), PERIPH_A, 0); /* TXD1 */
7404 - select_peripheral(PC(7), PERIPH_A, 0); /* TXEN */
7405 - select_peripheral(PC(8), PERIPH_A, 0); /* TXCK */
7406 - select_peripheral(PC(9), PERIPH_A, 0); /* RXD0 */
7407 - select_peripheral(PC(10), PERIPH_A, 0); /* RXD1 */
7408 - select_peripheral(PC(13), PERIPH_A, 0); /* RXER */
7409 - select_peripheral(PC(15), PERIPH_A, 0); /* RXDV */
7410 - select_peripheral(PC(16), PERIPH_A, 0); /* MDC */
7411 - select_peripheral(PC(17), PERIPH_A, 0); /* MDIO */
7412 -
7413 - if (!data->is_rmii) {
7414 - select_peripheral(PC(0), PERIPH_A, 0); /* COL */
7415 - select_peripheral(PC(1), PERIPH_A, 0); /* CRS */
7416 - select_peripheral(PC(2), PERIPH_A, 0); /* TXER */
7417 - select_peripheral(PC(5), PERIPH_A, 0); /* TXD2 */
7418 - select_peripheral(PC(6), PERIPH_A, 0); /* TXD3 */
7419 - select_peripheral(PC(11), PERIPH_A, 0); /* RXD2 */
7420 - select_peripheral(PC(12), PERIPH_A, 0); /* RXD3 */
7421 - select_peripheral(PC(14), PERIPH_A, 0); /* RXCK */
7422 - select_peripheral(PC(18), PERIPH_A, 0); /* SPD */
7423 - }
7424 - break;
7425 -
7426 - case 1:
7427 - pdev = &macb1_device;
7428 -
7429 - select_peripheral(PD(13), PERIPH_B, 0); /* TXD0 */
7430 - select_peripheral(PD(14), PERIPH_B, 0); /* TXD1 */
7431 - select_peripheral(PD(11), PERIPH_B, 0); /* TXEN */
7432 - select_peripheral(PD(12), PERIPH_B, 0); /* TXCK */
7433 - select_peripheral(PD(10), PERIPH_B, 0); /* RXD0 */
7434 - select_peripheral(PD(6), PERIPH_B, 0); /* RXD1 */
7435 - select_peripheral(PD(5), PERIPH_B, 0); /* RXER */
7436 - select_peripheral(PD(4), PERIPH_B, 0); /* RXDV */
7437 - select_peripheral(PD(3), PERIPH_B, 0); /* MDC */
7438 - select_peripheral(PD(2), PERIPH_B, 0); /* MDIO */
7439 -
7440 - if (!data->is_rmii) {
7441 - select_peripheral(PC(19), PERIPH_B, 0); /* COL */
7442 - select_peripheral(PC(23), PERIPH_B, 0); /* CRS */
7443 - select_peripheral(PC(26), PERIPH_B, 0); /* TXER */
7444 - select_peripheral(PC(27), PERIPH_B, 0); /* TXD2 */
7445 - select_peripheral(PC(28), PERIPH_B, 0); /* TXD3 */
7446 - select_peripheral(PC(29), PERIPH_B, 0); /* RXD2 */
7447 - select_peripheral(PC(30), PERIPH_B, 0); /* RXD3 */
7448 - select_peripheral(PC(24), PERIPH_B, 0); /* RXCK */
7449 - select_peripheral(PD(15), PERIPH_B, 0); /* SPD */
7450 - }
7451 - break;
7452 -
7453 - default:
7454 - return NULL;
7455 - }
7456 -
7457 - memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
7458 - platform_device_register(pdev);
7459 -
7460 - return pdev;
7461 -}
7462 -
7463 -/* --------------------------------------------------------------------
7464 - * SPI
7465 - * -------------------------------------------------------------------- */
7466 -static struct resource atmel_spi0_resource[] = {
7467 - PBMEM(0xffe00000),
7468 - IRQ(3),
7469 -};
7470 -DEFINE_DEV(atmel_spi, 0);
7471 -DEV_CLK(spi_clk, atmel_spi0, pba, 0);
7472 -
7473 -static struct resource atmel_spi1_resource[] = {
7474 - PBMEM(0xffe00400),
7475 - IRQ(4),
7476 -};
7477 -DEFINE_DEV(atmel_spi, 1);
7478 -DEV_CLK(spi_clk, atmel_spi1, pba, 1);
7479 -
7480 -static void __init
7481 -at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
7482 - unsigned int n, const u8 *pins)
7483 -{
7484 - unsigned int pin, mode;
7485 -
7486 - for (; n; n--, b++) {
7487 - b->bus_num = bus_num;
7488 - if (b->chip_select >= 4)
7489 - continue;
7490 - pin = (unsigned)b->controller_data;
7491 - if (!pin) {
7492 - pin = pins[b->chip_select];
7493 - b->controller_data = (void *)pin;
7494 - }
7495 - mode = AT32_GPIOF_OUTPUT;
7496 - if (!(b->mode & SPI_CS_HIGH))
7497 - mode |= AT32_GPIOF_HIGH;
7498 - at32_select_gpio(pin, mode);
7499 - }
7500 -}
7501 -
7502 -struct platform_device *__init
7503 -at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
7504 -{
7505 - /*
7506 - * Manage the chipselects as GPIOs, normally using the same pins
7507 - * the SPI controller expects; but boards can use other pins.
7508 - */
7509 - static u8 __initdata spi0_pins[] =
7510 - { GPIO_PIN_PA(3), GPIO_PIN_PA(4),
7511 - GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
7512 - static u8 __initdata spi1_pins[] =
7513 - { GPIO_PIN_PB(2), GPIO_PIN_PB(3),
7514 - GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
7515 - struct platform_device *pdev;
7516 -
7517 - switch (id) {
7518 - case 0:
7519 - pdev = &atmel_spi0_device;
7520 - select_peripheral(PA(0), PERIPH_A, 0); /* MISO */
7521 - select_peripheral(PA(1), PERIPH_A, 0); /* MOSI */
7522 - select_peripheral(PA(2), PERIPH_A, 0); /* SCK */
7523 - at32_spi_setup_slaves(0, b, n, spi0_pins);
7524 - break;
7525 -
7526 - case 1:
7527 - pdev = &atmel_spi1_device;
7528 - select_peripheral(PB(0), PERIPH_B, 0); /* MISO */
7529 - select_peripheral(PB(1), PERIPH_B, 0); /* MOSI */
7530 - select_peripheral(PB(5), PERIPH_B, 0); /* SCK */
7531 - at32_spi_setup_slaves(1, b, n, spi1_pins);
7532 - break;
7533 -
7534 - default:
7535 - return NULL;
7536 - }
7537 -
7538 - spi_register_board_info(b, n);
7539 - platform_device_register(pdev);
7540 - return pdev;
7541 -}
7542 -
7543 -/* --------------------------------------------------------------------
7544 - * TWI
7545 - * -------------------------------------------------------------------- */
7546 -static struct resource atmel_twi0_resource[] __initdata = {
7547 - PBMEM(0xffe00800),
7548 - IRQ(5),
7549 -};
7550 -static struct clk atmel_twi0_pclk = {
7551 - .name = "twi_pclk",
7552 - .parent = &pba_clk,
7553 - .mode = pba_clk_mode,
7554 - .get_rate = pba_clk_get_rate,
7555 - .index = 2,
7556 -};
7557 -
7558 -struct platform_device *__init at32_add_device_twi(unsigned int id)
7559 -{
7560 - struct platform_device *pdev;
7561 -
7562 - if (id != 0)
7563 - return NULL;
7564 -
7565 - pdev = platform_device_alloc("atmel_twi", id);
7566 - if (!pdev)
7567 - return NULL;
7568 -
7569 - if (platform_device_add_resources(pdev, atmel_twi0_resource,
7570 - ARRAY_SIZE(atmel_twi0_resource)))
7571 - goto err_add_resources;
7572 -
7573 - select_peripheral(PA(6), PERIPH_A, 0); /* SDA */
7574 - select_peripheral(PA(7), PERIPH_A, 0); /* SDL */
7575 -
7576 - atmel_twi0_pclk.dev = &pdev->dev;
7577 -
7578 - platform_device_add(pdev);
7579 - return pdev;
7580 -
7581 -err_add_resources:
7582 - platform_device_put(pdev);
7583 - return NULL;
7584 -}
7585 -
7586 -/* --------------------------------------------------------------------
7587 - * MMC
7588 - * -------------------------------------------------------------------- */
7589 -static struct resource atmel_mci0_resource[] __initdata = {
7590 - PBMEM(0xfff02400),
7591 - IRQ(28),
7592 -};
7593 -static struct clk atmel_mci0_pclk = {
7594 - .name = "mci_clk",
7595 - .parent = &pbb_clk,
7596 - .mode = pbb_clk_mode,
7597 - .get_rate = pbb_clk_get_rate,
7598 - .index = 9,
7599 -};
7600 -
7601 -struct platform_device *__init at32_add_device_mci(unsigned int id)
7602 -{
7603 - struct platform_device *pdev;
7604 -
7605 - if (id != 0)
7606 - return NULL;
7607 -
7608 - pdev = platform_device_alloc("atmel_mci", id);
7609 - if (!pdev)
7610 - return NULL;
7611 -
7612 - if (platform_device_add_resources(pdev, atmel_mci0_resource,
7613 - ARRAY_SIZE(atmel_mci0_resource)))
7614 - goto err_add_resources;
7615 -
7616 - select_peripheral(PA(10), PERIPH_A, 0); /* CLK */
7617 - select_peripheral(PA(11), PERIPH_A, 0); /* CMD */
7618 - select_peripheral(PA(12), PERIPH_A, 0); /* DATA0 */
7619 - select_peripheral(PA(13), PERIPH_A, 0); /* DATA1 */
7620 - select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */
7621 - select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */
7622 -
7623 - atmel_mci0_pclk.dev = &pdev->dev;
7624 -
7625 - platform_device_add(pdev);
7626 - return pdev;
7627 -
7628 -err_add_resources:
7629 - platform_device_put(pdev);
7630 - return NULL;
7631 -}
7632 -
7633 -/* --------------------------------------------------------------------
7634 - * LCDC
7635 - * -------------------------------------------------------------------- */
7636 -static struct atmel_lcdfb_info atmel_lcdfb0_data;
7637 -static struct resource atmel_lcdfb0_resource[] = {
7638 - {
7639 - .start = 0xff000000,
7640 - .end = 0xff000fff,
7641 - .flags = IORESOURCE_MEM,
7642 - },
7643 - IRQ(1),
7644 - {
7645 - /* Placeholder for pre-allocated fb memory */
7646 - .start = 0x00000000,
7647 - .end = 0x00000000,
7648 - .flags = 0,
7649 - },
7650 -};
7651 -DEFINE_DEV_DATA(atmel_lcdfb, 0);
7652 -DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
7653 -static struct clk atmel_lcdfb0_pixclk = {
7654 - .name = "lcdc_clk",
7655 - .dev = &atmel_lcdfb0_device.dev,
7656 - .mode = genclk_mode,
7657 - .get_rate = genclk_get_rate,
7658 - .set_rate = genclk_set_rate,
7659 - .set_parent = genclk_set_parent,
7660 - .index = 7,
7661 -};
7662 -
7663 -struct platform_device *__init
7664 -at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
7665 - unsigned long fbmem_start, unsigned long fbmem_len)
7666 -{
7667 - struct platform_device *pdev;
7668 - struct atmel_lcdfb_info *info;
7669 - struct fb_monspecs *monspecs;
7670 - struct fb_videomode *modedb;
7671 - unsigned int modedb_size;
7672 -
7673 - /*
7674 - * Do a deep copy of the fb data, monspecs and modedb. Make
7675 - * sure all allocations are done before setting up the
7676 - * portmux.
7677 - */
7678 - monspecs = kmemdup(data->default_monspecs,
7679 - sizeof(struct fb_monspecs), GFP_KERNEL);
7680 - if (!monspecs)
7681 - return NULL;
7682 -
7683 - modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
7684 - modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
7685 - if (!modedb)
7686 - goto err_dup_modedb;
7687 - monspecs->modedb = modedb;
7688 -
7689 - switch (id) {
7690 - case 0:
7691 - pdev = &atmel_lcdfb0_device;
7692 - select_peripheral(PC(19), PERIPH_A, 0); /* CC */
7693 - select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */
7694 - select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */
7695 - select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */
7696 - select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */
7697 - select_peripheral(PC(24), PERIPH_A, 0); /* MODE */
7698 - select_peripheral(PC(25), PERIPH_A, 0); /* PWR */
7699 - select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */
7700 - select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */
7701 - select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */
7702 - select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */
7703 - select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */
7704 - select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */
7705 - select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */
7706 - select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */
7707 - select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */
7708 - select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */
7709 - select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */
7710 - select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */
7711 - select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */
7712 - select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */
7713 - select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */
7714 - select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */
7715 - select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */
7716 - select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */
7717 - select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */
7718 - select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */
7719 - select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */
7720 - select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */
7721 - select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */
7722 - select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */
7723 -
7724 - clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
7725 - clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
7726 - break;
7727 -
7728 - default:
7729 - goto err_invalid_id;
7730 - }
7731 -
7732 - if (fbmem_len) {
7733 - pdev->resource[2].start = fbmem_start;
7734 - pdev->resource[2].end = fbmem_start + fbmem_len - 1;
7735 - pdev->resource[2].flags = IORESOURCE_MEM;
7736 - }
7737 -
7738 - info = pdev->dev.platform_data;
7739 - memcpy(info, data, sizeof(struct atmel_lcdfb_info));
7740 - info->default_monspecs = monspecs;
7741 -
7742 - platform_device_register(pdev);
7743 - return pdev;
7744 -
7745 -err_invalid_id:
7746 - kfree(modedb);
7747 -err_dup_modedb:
7748 - kfree(monspecs);
7749 - return NULL;
7750 -}
7751 -
7752 -/* --------------------------------------------------------------------
7753 - * SSC
7754 - * -------------------------------------------------------------------- */
7755 -static struct resource ssc0_resource[] = {
7756 - PBMEM(0xffe01c00),
7757 - IRQ(10),
7758 -};
7759 -DEFINE_DEV(ssc, 0);
7760 -DEV_CLK(pclk, ssc0, pba, 7);
7761 -
7762 -static struct resource ssc1_resource[] = {
7763 - PBMEM(0xffe02000),
7764 - IRQ(11),
7765 -};
7766 -DEFINE_DEV(ssc, 1);
7767 -DEV_CLK(pclk, ssc1, pba, 8);
7768 -
7769 -static struct resource ssc2_resource[] = {
7770 - PBMEM(0xffe02400),
7771 - IRQ(12),
7772 -};
7773 -DEFINE_DEV(ssc, 2);
7774 -DEV_CLK(pclk, ssc2, pba, 9);
7775 -
7776 -struct platform_device *__init
7777 -at32_add_device_ssc(unsigned int id, unsigned int flags)
7778 -{
7779 - struct platform_device *pdev;
7780 -
7781 - switch (id) {
7782 - case 0:
7783 - pdev = &ssc0_device;
7784 - if (flags & ATMEL_SSC_RF)
7785 - select_peripheral(PA(21), PERIPH_A, 0); /* RF */
7786 - if (flags & ATMEL_SSC_RK)
7787 - select_peripheral(PA(22), PERIPH_A, 0); /* RK */
7788 - if (flags & ATMEL_SSC_TK)
7789 - select_peripheral(PA(23), PERIPH_A, 0); /* TK */
7790 - if (flags & ATMEL_SSC_TF)
7791 - select_peripheral(PA(24), PERIPH_A, 0); /* TF */
7792 - if (flags & ATMEL_SSC_TD)
7793 - select_peripheral(PA(25), PERIPH_A, 0); /* TD */
7794 - if (flags & ATMEL_SSC_RD)
7795 - select_peripheral(PA(26), PERIPH_A, 0); /* RD */
7796 - break;
7797 - case 1:
7798 - pdev = &ssc1_device;
7799 - if (flags & ATMEL_SSC_RF)
7800 - select_peripheral(PA(0), PERIPH_B, 0); /* RF */
7801 - if (flags & ATMEL_SSC_RK)
7802 - select_peripheral(PA(1), PERIPH_B, 0); /* RK */
7803 - if (flags & ATMEL_SSC_TK)
7804 - select_peripheral(PA(2), PERIPH_B, 0); /* TK */
7805 - if (flags & ATMEL_SSC_TF)
7806 - select_peripheral(PA(3), PERIPH_B, 0); /* TF */
7807 - if (flags & ATMEL_SSC_TD)
7808 - select_peripheral(PA(4), PERIPH_B, 0); /* TD */
7809 - if (flags & ATMEL_SSC_RD)
7810 - select_peripheral(PA(5), PERIPH_B, 0); /* RD */
7811 - break;
7812 - case 2:
7813 - pdev = &ssc2_device;
7814 - if (flags & ATMEL_SSC_TD)
7815 - select_peripheral(PB(13), PERIPH_A, 0); /* TD */
7816 - if (flags & ATMEL_SSC_RD)
7817 - select_peripheral(PB(14), PERIPH_A, 0); /* RD */
7818 - if (flags & ATMEL_SSC_TK)
7819 - select_peripheral(PB(15), PERIPH_A, 0); /* TK */
7820 - if (flags & ATMEL_SSC_TF)
7821 - select_peripheral(PB(16), PERIPH_A, 0); /* TF */
7822 - if (flags & ATMEL_SSC_RF)
7823 - select_peripheral(PB(17), PERIPH_A, 0); /* RF */
7824 - if (flags & ATMEL_SSC_RK)
7825 - select_peripheral(PB(18), PERIPH_A, 0); /* RK */
7826 - break;
7827 - default:
7828 - return NULL;
7829 - }
7830 -
7831 - platform_device_register(pdev);
7832 - return pdev;
7833 -}
7834 -
7835 -/* --------------------------------------------------------------------
7836 - * USB Device Controller
7837 - * -------------------------------------------------------------------- */
7838 -static struct resource usba0_resource[] __initdata = {
7839 - {
7840 - .start = 0xff300000,
7841 - .end = 0xff3fffff,
7842 - .flags = IORESOURCE_MEM,
7843 - }, {
7844 - .start = 0xfff03000,
7845 - .end = 0xfff033ff,
7846 - .flags = IORESOURCE_MEM,
7847 - },
7848 - IRQ(31),
7849 -};
7850 -static struct clk usba0_pclk = {
7851 - .name = "pclk",
7852 - .parent = &pbb_clk,
7853 - .mode = pbb_clk_mode,
7854 - .get_rate = pbb_clk_get_rate,
7855 - .index = 12,
7856 -};
7857 -static struct clk usba0_hclk = {
7858 - .name = "hclk",
7859 - .parent = &hsb_clk,
7860 - .mode = hsb_clk_mode,
7861 - .get_rate = hsb_clk_get_rate,
7862 - .index = 6,
7863 -};
7864 -
7865 -struct platform_device *__init
7866 -at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
7867 -{
7868 - struct platform_device *pdev;
7869 -
7870 - if (id != 0)
7871 - return NULL;
7872 -
7873 - pdev = platform_device_alloc("atmel_usba_udc", 0);
7874 - if (!pdev)
7875 - return NULL;
7876 -
7877 - if (platform_device_add_resources(pdev, usba0_resource,
7878 - ARRAY_SIZE(usba0_resource)))
7879 - goto out_free_pdev;
7880 -
7881 - if (data) {
7882 - if (platform_device_add_data(pdev, data, sizeof(*data)))
7883 - goto out_free_pdev;
7884 -
7885 - if (data->vbus_pin != GPIO_PIN_NONE)
7886 - at32_select_gpio(data->vbus_pin, 0);
7887 - }
7888 -
7889 - usba0_pclk.dev = &pdev->dev;
7890 - usba0_hclk.dev = &pdev->dev;
7891 -
7892 - platform_device_add(pdev);
7893 -
7894 - return pdev;
7895 -
7896 -out_free_pdev:
7897 - platform_device_put(pdev);
7898 - return NULL;
7899 -}
7900 -
7901 -/* --------------------------------------------------------------------
7902 - * IDE / CompactFlash
7903 - * -------------------------------------------------------------------- */
7904 -static struct resource at32_smc_cs4_resource[] __initdata = {
7905 - {
7906 - .start = 0x04000000,
7907 - .end = 0x07ffffff,
7908 - .flags = IORESOURCE_MEM,
7909 - },
7910 - IRQ(~0UL), /* Magic IRQ will be overridden */
7911 -};
7912 -static struct resource at32_smc_cs5_resource[] __initdata = {
7913 - {
7914 - .start = 0x20000000,
7915 - .end = 0x23ffffff,
7916 - .flags = IORESOURCE_MEM,
7917 - },
7918 - IRQ(~0UL), /* Magic IRQ will be overridden */
7919 -};
7920 -
7921 -static int __init at32_init_ide_or_cf(struct platform_device *pdev,
7922 - unsigned int cs, unsigned int extint)
7923 -{
7924 - static unsigned int extint_pin_map[4] __initdata = {
7925 - GPIO_PIN_PB(25),
7926 - GPIO_PIN_PB(26),
7927 - GPIO_PIN_PB(27),
7928 - GPIO_PIN_PB(28),
7929 - };
7930 - static bool common_pins_initialized __initdata = false;
7931 - unsigned int extint_pin;
7932 - int ret;
7933 -
7934 - if (extint >= ARRAY_SIZE(extint_pin_map))
7935 - return -EINVAL;
7936 - extint_pin = extint_pin_map[extint];
7937 -
7938 - switch (cs) {
7939 - case 4:
7940 - ret = platform_device_add_resources(pdev,
7941 - at32_smc_cs4_resource,
7942 - ARRAY_SIZE(at32_smc_cs4_resource));
7943 - if (ret)
7944 - return ret;
7945 -
7946 - select_peripheral(PE(21), PERIPH_A, 0); /* NCS4 -> OE_N */
7947 - set_ebi_sfr_bits(HMATRIX_BIT(CS4A));
7948 - break;
7949 - case 5:
7950 - ret = platform_device_add_resources(pdev,
7951 - at32_smc_cs5_resource,
7952 - ARRAY_SIZE(at32_smc_cs5_resource));
7953 - if (ret)
7954 - return ret;
7955 -
7956 - select_peripheral(PE(22), PERIPH_A, 0); /* NCS5 -> OE_N */
7957 - set_ebi_sfr_bits(HMATRIX_BIT(CS5A));
7958 - break;
7959 - default:
7960 - return -EINVAL;
7961 - }
7962 -
7963 - if (!common_pins_initialized) {
7964 - select_peripheral(PE(19), PERIPH_A, 0); /* CFCE1 -> CS0_N */
7965 - select_peripheral(PE(20), PERIPH_A, 0); /* CFCE2 -> CS1_N */
7966 - select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW -> DIR */
7967 - select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT <- IORDY */
7968 - common_pins_initialized = true;
7969 - }
7970 -
7971 - at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
7972 -
7973 - pdev->resource[1].start = EIM_IRQ_BASE + extint;
7974 - pdev->resource[1].end = pdev->resource[1].start;
7975 -
7976 - return 0;
7977 -}
7978 -
7979 -struct platform_device *__init
7980 -at32_add_device_ide(unsigned int id, unsigned int extint,
7981 - struct ide_platform_data *data)
7982 -{
7983 - struct platform_device *pdev;
7984 -
7985 - pdev = platform_device_alloc("at32_ide", id);
7986 - if (!pdev)
7987 - goto fail;
7988 -
7989 - if (platform_device_add_data(pdev, data,
7990 - sizeof(struct ide_platform_data)))
7991 - goto fail;
7992 -
7993 - if (at32_init_ide_or_cf(pdev, data->cs, extint))
7994 - goto fail;
7995 -
7996 - platform_device_add(pdev);
7997 - return pdev;
7998 -
7999 -fail:
8000 - platform_device_put(pdev);
8001 - return NULL;
8002 -}
8003 -
8004 -struct platform_device *__init
8005 -at32_add_device_cf(unsigned int id, unsigned int extint,
8006 - struct cf_platform_data *data)
8007 -{
8008 - struct platform_device *pdev;
8009 -
8010 - pdev = platform_device_alloc("at32_cf", id);
8011 - if (!pdev)
8012 - goto fail;
8013 -
8014 - if (platform_device_add_data(pdev, data,
8015 - sizeof(struct cf_platform_data)))
8016 - goto fail;
8017 -
8018 - if (at32_init_ide_or_cf(pdev, data->cs, extint))
8019 - goto fail;
8020 -
8021 - if (data->detect_pin != GPIO_PIN_NONE)
8022 - at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH);
8023 - if (data->reset_pin != GPIO_PIN_NONE)
8024 - at32_select_gpio(data->reset_pin, 0);
8025 - if (data->vcc_pin != GPIO_PIN_NONE)
8026 - at32_select_gpio(data->vcc_pin, 0);
8027 - /* READY is used as extint, so we can't select it as gpio */
8028 -
8029 - platform_device_add(pdev);
8030 - return pdev;
8031 -
8032 -fail:
8033 - platform_device_put(pdev);
8034 - return NULL;
8035 -}
8036 -
8037 -/* --------------------------------------------------------------------
8038 - * AC97C
8039 - * -------------------------------------------------------------------- */
8040 -static struct resource atmel_ac97c0_resource[] __initdata = {
8041 - PBMEM(0xfff02800),
8042 - IRQ(29),
8043 -};
8044 -static struct clk atmel_ac97c0_pclk = {
8045 - .name = "pclk",
8046 - .parent = &pbb_clk,
8047 - .mode = pbb_clk_mode,
8048 - .get_rate = pbb_clk_get_rate,
8049 - .index = 10,
8050 -};
8051 -
8052 -struct platform_device *__init at32_add_device_ac97c(unsigned int id)
8053 -{
8054 - struct platform_device *pdev;
8055 -
8056 - if (id != 0)
8057 - return NULL;
8058 -
8059 - pdev = platform_device_alloc("atmel_ac97c", id);
8060 - if (!pdev)
8061 - return NULL;
8062 -
8063 - if (platform_device_add_resources(pdev, atmel_ac97c0_resource,
8064 - ARRAY_SIZE(atmel_ac97c0_resource)))
8065 - goto err_add_resources;
8066 -
8067 - select_peripheral(PB(20), PERIPH_B, 0); /* SYNC */
8068 - select_peripheral(PB(21), PERIPH_B, 0); /* SDO */
8069 - select_peripheral(PB(22), PERIPH_B, 0); /* SDI */
8070 - select_peripheral(PB(23), PERIPH_B, 0); /* SCLK */
8071 -
8072 - atmel_ac97c0_pclk.dev = &pdev->dev;
8073 -
8074 - platform_device_add(pdev);
8075 - return pdev;
8076 -
8077 -err_add_resources:
8078 - platform_device_put(pdev);
8079 - return NULL;
8080 -}
8081 -
8082 -/* --------------------------------------------------------------------
8083 - * ABDAC
8084 - * -------------------------------------------------------------------- */
8085 -static struct resource abdac0_resource[] __initdata = {
8086 - PBMEM(0xfff02000),
8087 - IRQ(27),
8088 -};
8089 -static struct clk abdac0_pclk = {
8090 - .name = "pclk",
8091 - .parent = &pbb_clk,
8092 - .mode = pbb_clk_mode,
8093 - .get_rate = pbb_clk_get_rate,
8094 - .index = 8,
8095 -};
8096 -static struct clk abdac0_sample_clk = {
8097 - .name = "sample_clk",
8098 - .mode = genclk_mode,
8099 - .get_rate = genclk_get_rate,
8100 - .set_rate = genclk_set_rate,
8101 - .set_parent = genclk_set_parent,
8102 - .index = 6,
8103 -};
8104 -
8105 -struct platform_device *__init at32_add_device_abdac(unsigned int id)
8106 -{
8107 - struct platform_device *pdev;
8108 -
8109 - if (id != 0)
8110 - return NULL;
8111 -
8112 - pdev = platform_device_alloc("abdac", id);
8113 - if (!pdev)
8114 - return NULL;
8115 -
8116 - if (platform_device_add_resources(pdev, abdac0_resource,
8117 - ARRAY_SIZE(abdac0_resource)))
8118 - goto err_add_resources;
8119 -
8120 - select_peripheral(PB(20), PERIPH_A, 0); /* DATA1 */
8121 - select_peripheral(PB(21), PERIPH_A, 0); /* DATA0 */
8122 - select_peripheral(PB(22), PERIPH_A, 0); /* DATAN1 */
8123 - select_peripheral(PB(23), PERIPH_A, 0); /* DATAN0 */
8124 -
8125 - abdac0_pclk.dev = &pdev->dev;
8126 - abdac0_sample_clk.dev = &pdev->dev;
8127 -
8128 - platform_device_add(pdev);
8129 - return pdev;
8130 -
8131 -err_add_resources:
8132 - platform_device_put(pdev);
8133 - return NULL;
8134 -}
8135 -
8136 -/* --------------------------------------------------------------------
8137 - * GCLK
8138 - * -------------------------------------------------------------------- */
8139 -static struct clk gclk0 = {
8140 - .name = "gclk0",
8141 - .mode = genclk_mode,
8142 - .get_rate = genclk_get_rate,
8143 - .set_rate = genclk_set_rate,
8144 - .set_parent = genclk_set_parent,
8145 - .index = 0,
8146 -};
8147 -static struct clk gclk1 = {
8148 - .name = "gclk1",
8149 - .mode = genclk_mode,
8150 - .get_rate = genclk_get_rate,
8151 - .set_rate = genclk_set_rate,
8152 - .set_parent = genclk_set_parent,
8153 - .index = 1,
8154 -};
8155 -static struct clk gclk2 = {
8156 - .name = "gclk2",
8157 - .mode = genclk_mode,
8158 - .get_rate = genclk_get_rate,
8159 - .set_rate = genclk_set_rate,
8160 - .set_parent = genclk_set_parent,
8161 - .index = 2,
8162 -};
8163 -static struct clk gclk3 = {
8164 - .name = "gclk3",
8165 - .mode = genclk_mode,
8166 - .get_rate = genclk_get_rate,
8167 - .set_rate = genclk_set_rate,
8168 - .set_parent = genclk_set_parent,
8169 - .index = 3,
8170 -};
8171 -static struct clk gclk4 = {
8172 - .name = "gclk4",
8173 - .mode = genclk_mode,
8174 - .get_rate = genclk_get_rate,
8175 - .set_rate = genclk_set_rate,
8176 - .set_parent = genclk_set_parent,
8177 - .index = 4,
8178 -};
8179 -
8180 -struct clk *at32_clock_list[] = {
8181 - &osc32k,
8182 - &osc0,
8183 - &osc1,
8184 - &pll0,
8185 - &pll1,
8186 - &cpu_clk,
8187 - &hsb_clk,
8188 - &pba_clk,
8189 - &pbb_clk,
8190 - &at32_pm_pclk,
8191 - &at32_intc0_pclk,
8192 - &hmatrix_clk,
8193 - &ebi_clk,
8194 - &hramc_clk,
8195 - &smc0_pclk,
8196 - &smc0_mck,
8197 - &pdc_hclk,
8198 - &pdc_pclk,
8199 - &dmaca0_hclk,
8200 - &pico_clk,
8201 - &pio0_mck,
8202 - &pio1_mck,
8203 - &pio2_mck,
8204 - &pio3_mck,
8205 - &pio4_mck,
8206 - &at32_systc0_pclk,
8207 - &atmel_usart0_usart,
8208 - &atmel_usart1_usart,
8209 - &atmel_usart2_usart,
8210 - &atmel_usart3_usart,
8211 - &macb0_hclk,
8212 - &macb0_pclk,
8213 - &macb1_hclk,
8214 - &macb1_pclk,
8215 - &atmel_spi0_spi_clk,
8216 - &atmel_spi1_spi_clk,
8217 - &atmel_twi0_pclk,
8218 - &atmel_mci0_pclk,
8219 - &atmel_lcdfb0_hck1,
8220 - &atmel_lcdfb0_pixclk,
8221 - &ssc0_pclk,
8222 - &ssc1_pclk,
8223 - &ssc2_pclk,
8224 - &usba0_hclk,
8225 - &usba0_pclk,
8226 - &atmel_ac97c0_pclk,
8227 - &abdac0_pclk,
8228 - &abdac0_sample_clk,
8229 - &gclk0,
8230 - &gclk1,
8231 - &gclk2,
8232 - &gclk3,
8233 - &gclk4,
8234 -};
8235 -unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
8236 -
8237 -void __init at32_portmux_init(void)
8238 -{
8239 - at32_init_pio(&pio0_device);
8240 - at32_init_pio(&pio1_device);
8241 - at32_init_pio(&pio2_device);
8242 - at32_init_pio(&pio3_device);
8243 - at32_init_pio(&pio4_device);
8244 -}
8245 -
8246 -void __init at32_clock_init(void)
8247 -{
8248 - u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
8249 - int i;
8250 -
8251 - if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
8252 - main_clock = &pll0;
8253 - cpu_clk.parent = &pll0;
8254 - } else {
8255 - main_clock = &osc0;
8256 - cpu_clk.parent = &osc0;
8257 - }
8258 -
8259 - if (pm_readl(PLL0) & PM_BIT(PLLOSC))
8260 - pll0.parent = &osc1;
8261 - if (pm_readl(PLL1) & PM_BIT(PLLOSC))
8262 - pll1.parent = &osc1;
8263 -
8264 - genclk_init_parent(&gclk0);
8265 - genclk_init_parent(&gclk1);
8266 - genclk_init_parent(&gclk2);
8267 - genclk_init_parent(&gclk3);
8268 - genclk_init_parent(&gclk4);
8269 - genclk_init_parent(&atmel_lcdfb0_pixclk);
8270 - genclk_init_parent(&abdac0_sample_clk);
8271 -
8272 - /*
8273 - * Turn on all clocks that have at least one user already, and
8274 - * turn off everything else. We only do this for module
8275 - * clocks, and even though it isn't particularly pretty to
8276 - * check the address of the mode function, it should do the
8277 - * trick...
8278 - */
8279 - for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
8280 - struct clk *clk = at32_clock_list[i];
8281 -
8282 - if (clk->users == 0)
8283 - continue;
8284 -
8285 - if (clk->mode == &cpu_clk_mode)
8286 - cpu_mask |= 1 << clk->index;
8287 - else if (clk->mode == &hsb_clk_mode)
8288 - hsb_mask |= 1 << clk->index;
8289 - else if (clk->mode == &pba_clk_mode)
8290 - pba_mask |= 1 << clk->index;
8291 - else if (clk->mode == &pbb_clk_mode)
8292 - pbb_mask |= 1 << clk->index;
8293 - }
8294 -
8295 - pm_writel(CPU_MASK, cpu_mask);
8296 - pm_writel(HSB_MASK, hsb_mask);
8297 - pm_writel(PBA_MASK, pba_mask);
8298 - pm_writel(PBB_MASK, pbb_mask);
8299 -}
8300 diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
8301 new file mode 100644
8302 index 0000000..06795d0
8303 --- /dev/null
8304 +++ b/arch/avr32/mach-at32ap/at32ap700x.c
8305 @@ -0,0 +1,1809 @@
8306 +/*
8307 + * Copyright (C) 2005-2006 Atmel Corporation
8308 + *
8309 + * This program is free software; you can redistribute it and/or modify
8310 + * it under the terms of the GNU General Public License version 2 as
8311 + * published by the Free Software Foundation.
8312 + */
8313 +#include <linux/clk.h>
8314 +#include <linux/fb.h>
8315 +#include <linux/init.h>
8316 +#include <linux/platform_device.h>
8317 +#include <linux/dma-mapping.h>
8318 +#include <linux/spi/spi.h>
8319 +
8320 +#include <asm/io.h>
8321 +#include <asm/irq.h>
8322 +
8323 +#include <asm/arch/at32ap700x.h>
8324 +#include <asm/arch/board.h>
8325 +#include <asm/arch/portmux.h>
8326 +
8327 +#include <video/atmel_lcdc.h>
8328 +
8329 +#include "clock.h"
8330 +#include "hmatrix.h"
8331 +#include "pio.h"
8332 +#include "pm.h"
8333 +
8334 +
8335 +#define PBMEM(base) \
8336 + { \
8337 + .start = base, \
8338 + .end = base + 0x3ff, \
8339 + .flags = IORESOURCE_MEM, \
8340 + }
8341 +#define IRQ(num) \
8342 + { \
8343 + .start = num, \
8344 + .end = num, \
8345 + .flags = IORESOURCE_IRQ, \
8346 + }
8347 +#define NAMED_IRQ(num, _name) \
8348 + { \
8349 + .start = num, \
8350 + .end = num, \
8351 + .name = _name, \
8352 + .flags = IORESOURCE_IRQ, \
8353 + }
8354 +
8355 +/* REVISIT these assume *every* device supports DMA, but several
8356 + * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
8357 + */
8358 +#define DEFINE_DEV(_name, _id) \
8359 +static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \
8360 +static struct platform_device _name##_id##_device = { \
8361 + .name = #_name, \
8362 + .id = _id, \
8363 + .dev = { \
8364 + .dma_mask = &_name##_id##_dma_mask, \
8365 + .coherent_dma_mask = DMA_32BIT_MASK, \
8366 + }, \
8367 + .resource = _name##_id##_resource, \
8368 + .num_resources = ARRAY_SIZE(_name##_id##_resource), \
8369 +}
8370 +#define DEFINE_DEV_DATA(_name, _id) \
8371 +static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \
8372 +static struct platform_device _name##_id##_device = { \
8373 + .name = #_name, \
8374 + .id = _id, \
8375 + .dev = { \
8376 + .dma_mask = &_name##_id##_dma_mask, \
8377 + .platform_data = &_name##_id##_data, \
8378 + .coherent_dma_mask = DMA_32BIT_MASK, \
8379 + }, \
8380 + .resource = _name##_id##_resource, \
8381 + .num_resources = ARRAY_SIZE(_name##_id##_resource), \
8382 +}
8383 +
8384 +#define select_peripheral(pin, periph, flags) \
8385 + at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
8386 +
8387 +#define DEV_CLK(_name, devname, bus, _index) \
8388 +static struct clk devname##_##_name = { \
8389 + .name = #_name, \
8390 + .dev = &devname##_device.dev, \
8391 + .parent = &bus##_clk, \
8392 + .mode = bus##_clk_mode, \
8393 + .get_rate = bus##_clk_get_rate, \
8394 + .index = _index, \
8395 +}
8396 +
8397 +static DEFINE_SPINLOCK(pm_lock);
8398 +
8399 +unsigned long at32ap7000_osc_rates[3] = {
8400 + [0] = 32768,
8401 + /* FIXME: these are ATSTK1002-specific */
8402 + [1] = 20000000,
8403 + [2] = 12000000,
8404 +};
8405 +
8406 +static unsigned long osc_get_rate(struct clk *clk)
8407 +{
8408 + return at32ap7000_osc_rates[clk->index];
8409 +}
8410 +
8411 +static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
8412 +{
8413 + unsigned long div, mul, rate;
8414 +
8415 + if (!(control & PM_BIT(PLLEN)))
8416 + return 0;
8417 +
8418 + div = PM_BFEXT(PLLDIV, control) + 1;
8419 + mul = PM_BFEXT(PLLMUL, control) + 1;
8420 +
8421 + rate = clk->parent->get_rate(clk->parent);
8422 + rate = (rate + div / 2) / div;
8423 + rate *= mul;
8424 +
8425 + return rate;
8426 +}
8427 +
8428 +static unsigned long pll0_get_rate(struct clk *clk)
8429 +{
8430 + u32 control;
8431 +
8432 + control = pm_readl(PLL0);
8433 +
8434 + return pll_get_rate(clk, control);
8435 +}
8436 +
8437 +static unsigned long pll1_get_rate(struct clk *clk)
8438 +{
8439 + u32 control;
8440 +
8441 + control = pm_readl(PLL1);
8442 +
8443 + return pll_get_rate(clk, control);
8444 +}
8445 +
8446 +/*
8447 + * The AT32AP7000 has five primary clock sources: One 32kHz
8448 + * oscillator, two crystal oscillators and two PLLs.
8449 + */
8450 +static struct clk osc32k = {
8451 + .name = "osc32k",
8452 + .get_rate = osc_get_rate,
8453 + .users = 1,
8454 + .index = 0,
8455 +};
8456 +static struct clk osc0 = {
8457 + .name = "osc0",
8458 + .get_rate = osc_get_rate,
8459 + .users = 1,
8460 + .index = 1,
8461 +};
8462 +static struct clk osc1 = {
8463 + .name = "osc1",
8464 + .get_rate = osc_get_rate,
8465 + .index = 2,
8466 +};
8467 +static struct clk pll0 = {
8468 + .name = "pll0",
8469 + .get_rate = pll0_get_rate,
8470 + .parent = &osc0,
8471 +};
8472 +static struct clk pll1 = {
8473 + .name = "pll1",
8474 + .get_rate = pll1_get_rate,
8475 + .parent = &osc0,
8476 +};
8477 +
8478 +/*
8479 + * The main clock can be either osc0 or pll0. The boot loader may
8480 + * have chosen one for us, so we don't really know which one until we
8481 + * have a look at the SM.
8482 + */
8483 +static struct clk *main_clock;
8484 +
8485 +/*
8486 + * Synchronous clocks are generated from the main clock. The clocks
8487 + * must satisfy the constraint
8488 + * fCPU >= fHSB >= fPB
8489 + * i.e. each clock must not be faster than its parent.
8490 + */
8491 +static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
8492 +{
8493 + return main_clock->get_rate(main_clock) >> shift;
8494 +};
8495 +
8496 +static void cpu_clk_mode(struct clk *clk, int enabled)
8497 +{
8498 + unsigned long flags;
8499 + u32 mask;
8500 +
8501 + spin_lock_irqsave(&pm_lock, flags);
8502 + mask = pm_readl(CPU_MASK);
8503 + if (enabled)
8504 + mask |= 1 << clk->index;
8505 + else
8506 + mask &= ~(1 << clk->index);
8507 + pm_writel(CPU_MASK, mask);
8508 + spin_unlock_irqrestore(&pm_lock, flags);
8509 +}
8510 +
8511 +static unsigned long cpu_clk_get_rate(struct clk *clk)
8512 +{
8513 + unsigned long cksel, shift = 0;
8514 +
8515 + cksel = pm_readl(CKSEL);
8516 + if (cksel & PM_BIT(CPUDIV))
8517 + shift = PM_BFEXT(CPUSEL, cksel) + 1;
8518 +
8519 + return bus_clk_get_rate(clk, shift);
8520 +}
8521 +
8522 +static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
8523 +{
8524 + u32 control;
8525 + unsigned long parent_rate, child_div, actual_rate, div;
8526 +
8527 + parent_rate = clk->parent->get_rate(clk->parent);
8528 + control = pm_readl(CKSEL);
8529 +
8530 + if (control & PM_BIT(HSBDIV))
8531 + child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
8532 + else
8533 + child_div = 1;
8534 +
8535 + if (rate > 3 * (parent_rate / 4) || child_div == 1) {
8536 + actual_rate = parent_rate;
8537 + control &= ~PM_BIT(CPUDIV);
8538 + } else {
8539 + unsigned int cpusel;
8540 + div = (parent_rate + rate / 2) / rate;
8541 + if (div > child_div)
8542 + div = child_div;
8543 + cpusel = (div > 1) ? (fls(div) - 2) : 0;
8544 + control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
8545 + actual_rate = parent_rate / (1 << (cpusel + 1));
8546 + }
8547 +
8548 + pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
8549 + clk->name, rate, actual_rate);
8550 +
8551 + if (apply)
8552 + pm_writel(CKSEL, control);
8553 +
8554 + return actual_rate;
8555 +}
8556 +
8557 +static void hsb_clk_mode(struct clk *clk, int enabled)
8558 +{
8559 + unsigned long flags;
8560 + u32 mask;
8561 +
8562 + spin_lock_irqsave(&pm_lock, flags);
8563 + mask = pm_readl(HSB_MASK);
8564 + if (enabled)
8565 + mask |= 1 << clk->index;
8566 + else
8567 + mask &= ~(1 << clk->index);
8568 + pm_writel(HSB_MASK, mask);
8569 + spin_unlock_irqrestore(&pm_lock, flags);
8570 +}
8571 +
8572 +static unsigned long hsb_clk_get_rate(struct clk *clk)
8573 +{
8574 + unsigned long cksel, shift = 0;
8575 +
8576 + cksel = pm_readl(CKSEL);
8577 + if (cksel & PM_BIT(HSBDIV))
8578 + shift = PM_BFEXT(HSBSEL, cksel) + 1;
8579 +
8580 + return bus_clk_get_rate(clk, shift);
8581 +}
8582 +
8583 +static void pba_clk_mode(struct clk *clk, int enabled)
8584 +{
8585 + unsigned long flags;
8586 + u32 mask;
8587 +
8588 + spin_lock_irqsave(&pm_lock, flags);
8589 + mask = pm_readl(PBA_MASK);
8590 + if (enabled)
8591 + mask |= 1 << clk->index;
8592 + else
8593 + mask &= ~(1 << clk->index);
8594 + pm_writel(PBA_MASK, mask);
8595 + spin_unlock_irqrestore(&pm_lock, flags);
8596 +}
8597 +
8598 +static unsigned long pba_clk_get_rate(struct clk *clk)
8599 +{
8600 + unsigned long cksel, shift = 0;
8601 +
8602 + cksel = pm_readl(CKSEL);
8603 + if (cksel & PM_BIT(PBADIV))
8604 + shift = PM_BFEXT(PBASEL, cksel) + 1;
8605 +
8606 + return bus_clk_get_rate(clk, shift);
8607 +}
8608 +
8609 +static void pbb_clk_mode(struct clk *clk, int enabled)
8610 +{
8611 + unsigned long flags;
8612 + u32 mask;
8613 +
8614 + spin_lock_irqsave(&pm_lock, flags);
8615 + mask = pm_readl(PBB_MASK);
8616 + if (enabled)
8617 + mask |= 1 << clk->index;
8618 + else
8619 + mask &= ~(1 << clk->index);
8620 + pm_writel(PBB_MASK, mask);
8621 + spin_unlock_irqrestore(&pm_lock, flags);
8622 +}
8623 +
8624 +static unsigned long pbb_clk_get_rate(struct clk *clk)
8625 +{
8626 + unsigned long cksel, shift = 0;
8627 +
8628 + cksel = pm_readl(CKSEL);
8629 + if (cksel & PM_BIT(PBBDIV))
8630 + shift = PM_BFEXT(PBBSEL, cksel) + 1;
8631 +
8632 + return bus_clk_get_rate(clk, shift);
8633 +}
8634 +
8635 +static struct clk cpu_clk = {
8636 + .name = "cpu",
8637 + .get_rate = cpu_clk_get_rate,
8638 + .set_rate = cpu_clk_set_rate,
8639 + .users = 1,
8640 +};
8641 +static struct clk hsb_clk = {
8642 + .name = "hsb",
8643 + .parent = &cpu_clk,
8644 + .get_rate = hsb_clk_get_rate,
8645 +};
8646 +static struct clk pba_clk = {
8647 + .name = "pba",
8648 + .parent = &hsb_clk,
8649 + .mode = hsb_clk_mode,
8650 + .get_rate = pba_clk_get_rate,
8651 + .index = 1,
8652 +};
8653 +static struct clk pbb_clk = {
8654 + .name = "pbb",
8655 + .parent = &hsb_clk,
8656 + .mode = hsb_clk_mode,
8657 + .get_rate = pbb_clk_get_rate,
8658 + .users = 1,
8659 + .index = 2,
8660 +};
8661 +
8662 +/* --------------------------------------------------------------------
8663 + * Generic Clock operations
8664 + * -------------------------------------------------------------------- */
8665 +
8666 +static void genclk_mode(struct clk *clk, int enabled)
8667 +{
8668 + u32 control;
8669 +
8670 + control = pm_readl(GCCTRL(clk->index));
8671 + if (enabled)
8672 + control |= PM_BIT(CEN);
8673 + else
8674 + control &= ~PM_BIT(CEN);
8675 + pm_writel(GCCTRL(clk->index), control);
8676 +}
8677 +
8678 +static unsigned long genclk_get_rate(struct clk *clk)
8679 +{
8680 + u32 control;
8681 + unsigned long div = 1;
8682 +
8683 + control = pm_readl(GCCTRL(clk->index));
8684 + if (control & PM_BIT(DIVEN))
8685 + div = 2 * (PM_BFEXT(DIV, control) + 1);
8686 +
8687 + return clk->parent->get_rate(clk->parent) / div;
8688 +}
8689 +
8690 +static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
8691 +{
8692 + u32 control;
8693 + unsigned long parent_rate, actual_rate, div;
8694 +
8695 + parent_rate = clk->parent->get_rate(clk->parent);
8696 + control = pm_readl(GCCTRL(clk->index));
8697 +
8698 + if (rate > 3 * parent_rate / 4) {
8699 + actual_rate = parent_rate;
8700 + control &= ~PM_BIT(DIVEN);
8701 + } else {
8702 + div = (parent_rate + rate) / (2 * rate) - 1;
8703 + control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
8704 + actual_rate = parent_rate / (2 * (div + 1));
8705 + }
8706 +
8707 + dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
8708 + clk->name, rate, actual_rate);
8709 +
8710 + if (apply)
8711 + pm_writel(GCCTRL(clk->index), control);
8712 +
8713 + return actual_rate;
8714 +}
8715 +
8716 +int genclk_set_parent(struct clk *clk, struct clk *parent)
8717 +{
8718 + u32 control;
8719 +
8720 + dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
8721 + clk->name, parent->name, clk->parent->name);
8722 +
8723 + control = pm_readl(GCCTRL(clk->index));
8724 +
8725 + if (parent == &osc1 || parent == &pll1)
8726 + control |= PM_BIT(OSCSEL);
8727 + else if (parent == &osc0 || parent == &pll0)
8728 + control &= ~PM_BIT(OSCSEL);
8729 + else
8730 + return -EINVAL;
8731 +
8732 + if (parent == &pll0 || parent == &pll1)
8733 + control |= PM_BIT(PLLSEL);
8734 + else
8735 + control &= ~PM_BIT(PLLSEL);
8736 +
8737 + pm_writel(GCCTRL(clk->index), control);
8738 + clk->parent = parent;
8739 +
8740 + return 0;
8741 +}
8742 +
8743 +static void __init genclk_init_parent(struct clk *clk)
8744 +{
8745 + u32 control;
8746 + struct clk *parent;
8747 +
8748 + BUG_ON(clk->index > 7);
8749 +
8750 + control = pm_readl(GCCTRL(clk->index));
8751 + if (control & PM_BIT(OSCSEL))
8752 + parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
8753 + else
8754 + parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
8755 +
8756 + clk->parent = parent;
8757 +}
8758 +
8759 +/* --------------------------------------------------------------------
8760 + * System peripherals
8761 + * -------------------------------------------------------------------- */
8762 +static struct resource at32_pm0_resource[] = {
8763 + {
8764 + .start = 0xfff00000,
8765 + .end = 0xfff0007f,
8766 + .flags = IORESOURCE_MEM,
8767 + },
8768 + IRQ(20),
8769 +};
8770 +
8771 +static struct resource at32ap700x_rtc0_resource[] = {
8772 + {
8773 + .start = 0xfff00080,
8774 + .end = 0xfff000af,
8775 + .flags = IORESOURCE_MEM,
8776 + },
8777 + IRQ(21),
8778 +};
8779 +
8780 +static struct resource at32_wdt0_resource[] = {
8781 + {
8782 + .start = 0xfff000b0,
8783 + .end = 0xfff000cf,
8784 + .flags = IORESOURCE_MEM,
8785 + },
8786 +};
8787 +
8788 +static struct resource at32_eic0_resource[] = {
8789 + {
8790 + .start = 0xfff00100,
8791 + .end = 0xfff0013f,
8792 + .flags = IORESOURCE_MEM,
8793 + },
8794 + IRQ(19),
8795 +};
8796 +
8797 +DEFINE_DEV(at32_pm, 0);
8798 +DEFINE_DEV(at32ap700x_rtc, 0);
8799 +DEFINE_DEV(at32_wdt, 0);
8800 +DEFINE_DEV(at32_eic, 0);
8801 +
8802 +/*
8803 + * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
8804 + * is always running.
8805 + */
8806 +static struct clk at32_pm_pclk = {
8807 + .name = "pclk",
8808 + .dev = &at32_pm0_device.dev,
8809 + .parent = &pbb_clk,
8810 + .mode = pbb_clk_mode,
8811 + .get_rate = pbb_clk_get_rate,
8812 + .users = 1,
8813 + .index = 0,
8814 +};
8815 +
8816 +static struct resource intc0_resource[] = {
8817 + PBMEM(0xfff00400),
8818 +};
8819 +struct platform_device at32_intc0_device = {
8820 + .name = "intc",
8821 + .id = 0,
8822 + .resource = intc0_resource,
8823 + .num_resources = ARRAY_SIZE(intc0_resource),
8824 +};
8825 +DEV_CLK(pclk, at32_intc0, pbb, 1);
8826 +
8827 +static struct clk ebi_clk = {
8828 + .name = "ebi",
8829 + .parent = &hsb_clk,
8830 + .mode = hsb_clk_mode,
8831 + .get_rate = hsb_clk_get_rate,
8832 + .users = 1,
8833 +};
8834 +static struct clk hramc_clk = {
8835 + .name = "hramc",
8836 + .parent = &hsb_clk,
8837 + .mode = hsb_clk_mode,
8838 + .get_rate = hsb_clk_get_rate,
8839 + .users = 1,
8840 + .index = 3,
8841 +};
8842 +
8843 +static struct resource smc0_resource[] = {
8844 + PBMEM(0xfff03400),
8845 +};
8846 +DEFINE_DEV(smc, 0);
8847 +DEV_CLK(pclk, smc0, pbb, 13);
8848 +DEV_CLK(mck, smc0, hsb, 0);
8849 +
8850 +static struct platform_device pdc_device = {
8851 + .name = "pdc",
8852 + .id = 0,
8853 +};
8854 +DEV_CLK(hclk, pdc, hsb, 4);
8855 +DEV_CLK(pclk, pdc, pba, 16);
8856 +
8857 +static struct clk pico_clk = {
8858 + .name = "pico",
8859 + .parent = &cpu_clk,
8860 + .mode = cpu_clk_mode,
8861 + .get_rate = cpu_clk_get_rate,
8862 + .users = 1,
8863 +};
8864 +
8865 +static struct resource dmaca0_resource[] = {
8866 + {
8867 + .start = 0xff200000,
8868 + .end = 0xff20ffff,
8869 + .flags = IORESOURCE_MEM,
8870 + },
8871 + IRQ(2),
8872 +};
8873 +DEFINE_DEV(dmaca, 0);
8874 +DEV_CLK(hclk, dmaca0, hsb, 10);
8875 +
8876 +/* --------------------------------------------------------------------
8877 + * HMATRIX
8878 + * -------------------------------------------------------------------- */
8879 +
8880 +static struct clk hmatrix_clk = {
8881 + .name = "hmatrix_clk",
8882 + .parent = &pbb_clk,
8883 + .mode = pbb_clk_mode,
8884 + .get_rate = pbb_clk_get_rate,
8885 + .index = 2,
8886 + .users = 1,
8887 +};
8888 +#define HMATRIX_BASE ((void __iomem *)0xfff00800)
8889 +
8890 +#define hmatrix_readl(reg) \
8891 + __raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
8892 +#define hmatrix_writel(reg,value) \
8893 + __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
8894 +
8895 +/*
8896 + * Set bits in the HMATRIX Special Function Register (SFR) used by the
8897 + * External Bus Interface (EBI). This can be used to enable special
8898 + * features like CompactFlash support, NAND Flash support, etc. on
8899 + * certain chipselects.
8900 + */
8901 +static inline void set_ebi_sfr_bits(u32 mask)
8902 +{
8903 + u32 sfr;
8904 +
8905 + clk_enable(&hmatrix_clk);
8906 + sfr = hmatrix_readl(SFR4);
8907 + sfr |= mask;
8908 + hmatrix_writel(SFR4, sfr);
8909 + clk_disable(&hmatrix_clk);
8910 +}
8911 +
8912 +/* --------------------------------------------------------------------
8913 + * System Timer/Counter (TC)
8914 + * -------------------------------------------------------------------- */
8915 +static struct resource at32_systc0_resource[] = {
8916 + PBMEM(0xfff00c00),
8917 + IRQ(22),
8918 +};
8919 +struct platform_device at32_systc0_device = {
8920 + .name = "systc",
8921 + .id = 0,
8922 + .resource = at32_systc0_resource,
8923 + .num_resources = ARRAY_SIZE(at32_systc0_resource),
8924 +};
8925 +DEV_CLK(pclk, at32_systc0, pbb, 3);
8926 +
8927 +/* --------------------------------------------------------------------
8928 + * PIO
8929 + * -------------------------------------------------------------------- */
8930 +
8931 +static struct resource pio0_resource[] = {
8932 + PBMEM(0xffe02800),
8933 + IRQ(13),
8934 +};
8935 +DEFINE_DEV(pio, 0);
8936 +DEV_CLK(mck, pio0, pba, 10);
8937 +
8938 +static struct resource pio1_resource[] = {
8939 + PBMEM(0xffe02c00),
8940 + IRQ(14),
8941 +};
8942 +DEFINE_DEV(pio, 1);
8943 +DEV_CLK(mck, pio1, pba, 11);
8944 +
8945 +static struct resource pio2_resource[] = {
8946 + PBMEM(0xffe03000),
8947 + IRQ(15),
8948 +};
8949 +DEFINE_DEV(pio, 2);
8950 +DEV_CLK(mck, pio2, pba, 12);
8951 +
8952 +static struct resource pio3_resource[] = {
8953 + PBMEM(0xffe03400),
8954 + IRQ(16),
8955 +};
8956 +DEFINE_DEV(pio, 3);
8957 +DEV_CLK(mck, pio3, pba, 13);
8958 +
8959 +static struct resource pio4_resource[] = {
8960 + PBMEM(0xffe03800),
8961 + IRQ(17),
8962 +};
8963 +DEFINE_DEV(pio, 4);
8964 +DEV_CLK(mck, pio4, pba, 14);
8965 +
8966 +void __init at32_add_system_devices(void)
8967 +{
8968 + platform_device_register(&at32_pm0_device);
8969 + platform_device_register(&at32_intc0_device);
8970 + platform_device_register(&at32ap700x_rtc0_device);
8971 + platform_device_register(&at32_wdt0_device);
8972 + platform_device_register(&at32_eic0_device);
8973 + platform_device_register(&smc0_device);
8974 + platform_device_register(&pdc_device);
8975 + platform_device_register(&dmaca0_device);
8976 +
8977 + platform_device_register(&at32_systc0_device);
8978 +
8979 + platform_device_register(&pio0_device);
8980 + platform_device_register(&pio1_device);
8981 + platform_device_register(&pio2_device);
8982 + platform_device_register(&pio3_device);
8983 + platform_device_register(&pio4_device);
8984 +}
8985 +
8986 +/* --------------------------------------------------------------------
8987 + * USART
8988 + * -------------------------------------------------------------------- */
8989 +
8990 +static struct atmel_uart_data atmel_usart0_data = {
8991 + .use_dma_tx = 1,
8992 + .use_dma_rx = 1,
8993 +};
8994 +static struct resource atmel_usart0_resource[] = {
8995 + PBMEM(0xffe00c00),
8996 + IRQ(6),
8997 +};
8998 +DEFINE_DEV_DATA(atmel_usart, 0);
8999 +DEV_CLK(usart, atmel_usart0, pba, 3);
9000 +
9001 +static struct atmel_uart_data atmel_usart1_data = {
9002 + .use_dma_tx = 1,
9003 + .use_dma_rx = 1,
9004 +};
9005 +static struct resource atmel_usart1_resource[] = {
9006 + PBMEM(0xffe01000),
9007 + IRQ(7),
9008 +};
9009 +DEFINE_DEV_DATA(atmel_usart, 1);
9010 +DEV_CLK(usart, atmel_usart1, pba, 4);
9011 +
9012 +static struct atmel_uart_data atmel_usart2_data = {
9013 + .use_dma_tx = 1,
9014 + .use_dma_rx = 1,
9015 +};
9016 +static struct resource atmel_usart2_resource[] = {
9017 + PBMEM(0xffe01400),
9018 + IRQ(8),
9019 +};
9020 +DEFINE_DEV_DATA(atmel_usart, 2);
9021 +DEV_CLK(usart, atmel_usart2, pba, 5);
9022 +
9023 +static struct atmel_uart_data atmel_usart3_data = {
9024 + .use_dma_tx = 1,
9025 + .use_dma_rx = 1,
9026 +};
9027 +static struct resource atmel_usart3_resource[] = {
9028 + PBMEM(0xffe01800),
9029 + IRQ(9),
9030 +};
9031 +DEFINE_DEV_DATA(atmel_usart, 3);
9032 +DEV_CLK(usart, atmel_usart3, pba, 6);
9033 +
9034 +static inline void configure_usart0_pins(void)
9035 +{
9036 + select_peripheral(PA(8), PERIPH_B, 0); /* RXD */
9037 + select_peripheral(PA(9), PERIPH_B, 0); /* TXD */
9038 +}
9039 +
9040 +static inline void configure_usart1_pins(void)
9041 +{
9042 + select_peripheral(PA(17), PERIPH_A, 0); /* RXD */
9043 + select_peripheral(PA(18), PERIPH_A, 0); /* TXD */
9044 +}
9045 +
9046 +static inline void configure_usart2_pins(void)
9047 +{
9048 + select_peripheral(PB(26), PERIPH_B, 0); /* RXD */
9049 + select_peripheral(PB(27), PERIPH_B, 0); /* TXD */
9050 +}
9051 +
9052 +static inline void configure_usart3_pins(void)
9053 +{
9054 + select_peripheral(PB(18), PERIPH_B, 0); /* RXD */
9055 + select_peripheral(PB(17), PERIPH_B, 0); /* TXD */
9056 +}
9057 +
9058 +static struct platform_device *__initdata at32_usarts[4];
9059 +
9060 +void __init at32_map_usart(unsigned int hw_id, unsigned int line)
9061 +{
9062 + struct platform_device *pdev;
9063 +
9064 + switch (hw_id) {
9065 + case 0:
9066 + pdev = &atmel_usart0_device;
9067 + configure_usart0_pins();
9068 + break;
9069 + case 1:
9070 + pdev = &atmel_usart1_device;
9071 + configure_usart1_pins();
9072 + break;
9073 + case 2:
9074 + pdev = &atmel_usart2_device;
9075 + configure_usart2_pins();
9076 + break;
9077 + case 3:
9078 + pdev = &atmel_usart3_device;
9079 + configure_usart3_pins();
9080 + break;
9081 + default:
9082 + return;
9083 + }
9084 +
9085 + if (PXSEG(pdev->resource[0].start) == P4SEG) {
9086 + /* Addresses in the P4 segment are permanently mapped 1:1 */
9087 + struct atmel_uart_data *data = pdev->dev.platform_data;
9088 + data->regs = (void __iomem *)pdev->resource[0].start;
9089 + }
9090 +
9091 + pdev->id = line;
9092 + at32_usarts[line] = pdev;
9093 +}
9094 +
9095 +struct platform_device *__init at32_add_device_usart(unsigned int id)
9096 +{
9097 + platform_device_register(at32_usarts[id]);
9098 + return at32_usarts[id];
9099 +}
9100 +
9101 +struct platform_device *atmel_default_console_device;
9102 +
9103 +void __init at32_setup_serial_console(unsigned int usart_id)
9104 +{
9105 + atmel_default_console_device = at32_usarts[usart_id];
9106 +}
9107 +
9108 +/* --------------------------------------------------------------------
9109 + * Ethernet
9110 + * -------------------------------------------------------------------- */
9111 +
9112 +#ifdef CONFIG_CPU_AT32AP7000
9113 +static struct eth_platform_data macb0_data;
9114 +static struct resource macb0_resource[] = {
9115 + PBMEM(0xfff01800),
9116 + IRQ(25),
9117 +};
9118 +DEFINE_DEV_DATA(macb, 0);
9119 +DEV_CLK(hclk, macb0, hsb, 8);
9120 +DEV_CLK(pclk, macb0, pbb, 6);
9121 +
9122 +static struct eth_platform_data macb1_data;
9123 +static struct resource macb1_resource[] = {
9124 + PBMEM(0xfff01c00),
9125 + IRQ(26),
9126 +};
9127 +DEFINE_DEV_DATA(macb, 1);
9128 +DEV_CLK(hclk, macb1, hsb, 9);
9129 +DEV_CLK(pclk, macb1, pbb, 7);
9130 +
9131 +struct platform_device *__init
9132 +at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
9133 +{
9134 + struct platform_device *pdev;
9135 +
9136 + switch (id) {
9137 + case 0:
9138 + pdev = &macb0_device;
9139 +
9140 + select_peripheral(PC(3), PERIPH_A, 0); /* TXD0 */
9141 + select_peripheral(PC(4), PERIPH_A, 0); /* TXD1 */
9142 + select_peripheral(PC(7), PERIPH_A, 0); /* TXEN */
9143 + select_peripheral(PC(8), PERIPH_A, 0); /* TXCK */
9144 + select_peripheral(PC(9), PERIPH_A, 0); /* RXD0 */
9145 + select_peripheral(PC(10), PERIPH_A, 0); /* RXD1 */
9146 + select_peripheral(PC(13), PERIPH_A, 0); /* RXER */
9147 + select_peripheral(PC(15), PERIPH_A, 0); /* RXDV */
9148 + select_peripheral(PC(16), PERIPH_A, 0); /* MDC */
9149 + select_peripheral(PC(17), PERIPH_A, 0); /* MDIO */
9150 +
9151 + if (!data->is_rmii) {
9152 + select_peripheral(PC(0), PERIPH_A, 0); /* COL */
9153 + select_peripheral(PC(1), PERIPH_A, 0); /* CRS */
9154 + select_peripheral(PC(2), PERIPH_A, 0); /* TXER */
9155 + select_peripheral(PC(5), PERIPH_A, 0); /* TXD2 */
9156 + select_peripheral(PC(6), PERIPH_A, 0); /* TXD3 */
9157 + select_peripheral(PC(11), PERIPH_A, 0); /* RXD2 */
9158 + select_peripheral(PC(12), PERIPH_A, 0); /* RXD3 */
9159 + select_peripheral(PC(14), PERIPH_A, 0); /* RXCK */
9160 + select_peripheral(PC(18), PERIPH_A, 0); /* SPD */
9161 + }
9162 + break;
9163 +
9164 + case 1:
9165 + pdev = &macb1_device;
9166 +
9167 + select_peripheral(PD(13), PERIPH_B, 0); /* TXD0 */
9168 + select_peripheral(PD(14), PERIPH_B, 0); /* TXD1 */
9169 + select_peripheral(PD(11), PERIPH_B, 0); /* TXEN */
9170 + select_peripheral(PD(12), PERIPH_B, 0); /* TXCK */
9171 + select_peripheral(PD(10), PERIPH_B, 0); /* RXD0 */
9172 + select_peripheral(PD(6), PERIPH_B, 0); /* RXD1 */
9173 + select_peripheral(PD(5), PERIPH_B, 0); /* RXER */
9174 + select_peripheral(PD(4), PERIPH_B, 0); /* RXDV */
9175 + select_peripheral(PD(3), PERIPH_B, 0); /* MDC */
9176 + select_peripheral(PD(2), PERIPH_B, 0); /* MDIO */
9177 +
9178 + if (!data->is_rmii) {
9179 + select_peripheral(PC(19), PERIPH_B, 0); /* COL */
9180 + select_peripheral(PC(23), PERIPH_B, 0); /* CRS */
9181 + select_peripheral(PC(26), PERIPH_B, 0); /* TXER */
9182 + select_peripheral(PC(27), PERIPH_B, 0); /* TXD2 */
9183 + select_peripheral(PC(28), PERIPH_B, 0); /* TXD3 */
9184 + select_peripheral(PC(29), PERIPH_B, 0); /* RXD2 */
9185 + select_peripheral(PC(30), PERIPH_B, 0); /* RXD3 */
9186 + select_peripheral(PC(24), PERIPH_B, 0); /* RXCK */
9187 + select_peripheral(PD(15), PERIPH_B, 0); /* SPD */
9188 + }
9189 + break;
9190 +
9191 + default:
9192 + return NULL;
9193 + }
9194 +
9195 + memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
9196 + platform_device_register(pdev);
9197 +
9198 + return pdev;
9199 +}
9200 +#endif
9201 +
9202 +/* --------------------------------------------------------------------
9203 + * SPI
9204 + * -------------------------------------------------------------------- */
9205 +static struct resource atmel_spi0_resource[] = {
9206 + PBMEM(0xffe00000),
9207 + IRQ(3),
9208 +};
9209 +DEFINE_DEV(atmel_spi, 0);
9210 +DEV_CLK(spi_clk, atmel_spi0, pba, 0);
9211 +
9212 +static struct resource atmel_spi1_resource[] = {
9213 + PBMEM(0xffe00400),
9214 + IRQ(4),
9215 +};
9216 +DEFINE_DEV(atmel_spi, 1);
9217 +DEV_CLK(spi_clk, atmel_spi1, pba, 1);
9218 +
9219 +static void __init
9220 +at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
9221 + unsigned int n, const u8 *pins)
9222 +{
9223 + unsigned int pin, mode;
9224 +
9225 + for (; n; n--, b++) {
9226 + b->bus_num = bus_num;
9227 + if (b->chip_select >= 4)
9228 + continue;
9229 + pin = (unsigned)b->controller_data;
9230 + if (!pin) {
9231 + pin = pins[b->chip_select];
9232 + b->controller_data = (void *)pin;
9233 + }
9234 + mode = AT32_GPIOF_OUTPUT;
9235 + if (!(b->mode & SPI_CS_HIGH))
9236 + mode |= AT32_GPIOF_HIGH;
9237 + at32_select_gpio(pin, mode);
9238 + }
9239 +}
9240 +
9241 +struct platform_device *__init
9242 +at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
9243 +{
9244 + /*
9245 + * Manage the chipselects as GPIOs, normally using the same pins
9246 + * the SPI controller expects; but boards can use other pins.
9247 + */
9248 + static u8 __initdata spi0_pins[] =
9249 + { GPIO_PIN_PA(3), GPIO_PIN_PA(4),
9250 + GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
9251 + static u8 __initdata spi1_pins[] =
9252 + { GPIO_PIN_PB(2), GPIO_PIN_PB(3),
9253 + GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
9254 + struct platform_device *pdev;
9255 +
9256 + switch (id) {
9257 + case 0:
9258 + pdev = &atmel_spi0_device;
9259 + select_peripheral(PA(0), PERIPH_A, 0); /* MISO */
9260 + select_peripheral(PA(1), PERIPH_A, 0); /* MOSI */
9261 + select_peripheral(PA(2), PERIPH_A, 0); /* SCK */
9262 + at32_spi_setup_slaves(0, b, n, spi0_pins);
9263 + break;
9264 +
9265 + case 1:
9266 + pdev = &atmel_spi1_device;
9267 + select_peripheral(PB(0), PERIPH_B, 0); /* MISO */
9268 + select_peripheral(PB(1), PERIPH_B, 0); /* MOSI */
9269 + select_peripheral(PB(5), PERIPH_B, 0); /* SCK */
9270 + at32_spi_setup_slaves(1, b, n, spi1_pins);
9271 + break;
9272 +
9273 + default:
9274 + return NULL;
9275 + }
9276 +
9277 + spi_register_board_info(b, n);
9278 + platform_device_register(pdev);
9279 + return pdev;
9280 +}
9281 +
9282 +/* --------------------------------------------------------------------
9283 + * TWI
9284 + * -------------------------------------------------------------------- */
9285 +static struct resource atmel_twi0_resource[] __initdata = {
9286 + PBMEM(0xffe00800),
9287 + IRQ(5),
9288 +};
9289 +static struct clk atmel_twi0_pclk = {
9290 + .name = "twi_pclk",
9291 + .parent = &pba_clk,
9292 + .mode = pba_clk_mode,
9293 + .get_rate = pba_clk_get_rate,
9294 + .index = 2,
9295 +};
9296 +
9297 +struct platform_device *__init at32_add_device_twi(unsigned int id)
9298 +{
9299 + struct platform_device *pdev;
9300 +
9301 + if (id != 0)
9302 + return NULL;
9303 +
9304 + pdev = platform_device_alloc("atmel_twi", id);
9305 + if (!pdev)
9306 + return NULL;
9307 +
9308 + if (platform_device_add_resources(pdev, atmel_twi0_resource,
9309 + ARRAY_SIZE(atmel_twi0_resource)))
9310 + goto err_add_resources;
9311 +
9312 + select_peripheral(PA(6), PERIPH_A, 0); /* SDA */
9313 + select_peripheral(PA(7), PERIPH_A, 0); /* SDL */
9314 +
9315 + atmel_twi0_pclk.dev = &pdev->dev;
9316 +
9317 + platform_device_add(pdev);
9318 + return pdev;
9319 +
9320 +err_add_resources:
9321 + platform_device_put(pdev);
9322 + return NULL;
9323 +}
9324 +
9325 +/* --------------------------------------------------------------------
9326 + * MMC
9327 + * -------------------------------------------------------------------- */
9328 +static struct resource atmel_mci0_resource[] __initdata = {
9329 + PBMEM(0xfff02400),
9330 + IRQ(28),
9331 +};
9332 +static struct clk atmel_mci0_pclk = {
9333 + .name = "mci_clk",
9334 + .parent = &pbb_clk,
9335 + .mode = pbb_clk_mode,
9336 + .get_rate = pbb_clk_get_rate,
9337 + .index = 9,
9338 +};
9339 +
9340 +struct platform_device *__init
9341 +at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
9342 +{
9343 + struct platform_device *pdev;
9344 +
9345 + if (id != 0)
9346 + return NULL;
9347 +
9348 + pdev = platform_device_alloc("atmel_mci", id);
9349 + if (!pdev)
9350 + goto fail;
9351 +
9352 + if (platform_device_add_resources(pdev, atmel_mci0_resource,
9353 + ARRAY_SIZE(atmel_mci0_resource)))
9354 + goto fail;
9355 +
9356 + if (data && platform_device_add_data(pdev, data,
9357 + sizeof(struct mci_platform_data)))
9358 + goto fail;
9359 +
9360 + select_peripheral(PA(10), PERIPH_A, 0); /* CLK */
9361 + select_peripheral(PA(11), PERIPH_A, 0); /* CMD */
9362 + select_peripheral(PA(12), PERIPH_A, 0); /* DATA0 */
9363 + select_peripheral(PA(13), PERIPH_A, 0); /* DATA1 */
9364 + select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */
9365 + select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */
9366 +
9367 + if (data) {
9368 + if (data->detect_pin != GPIO_PIN_NONE)
9369 + at32_select_gpio(data->detect_pin, 0);
9370 + if (data->wp_pin != GPIO_PIN_NONE)
9371 + at32_select_gpio(data->wp_pin, 0);
9372 + }
9373 +
9374 + atmel_mci0_pclk.dev = &pdev->dev;
9375 +
9376 + platform_device_add(pdev);
9377 + return pdev;
9378 +
9379 +fail:
9380 + platform_device_put(pdev);
9381 + return NULL;
9382 +}
9383 +
9384 +/* --------------------------------------------------------------------
9385 + * LCDC
9386 + * -------------------------------------------------------------------- */
9387 +#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
9388 +static struct atmel_lcdfb_info atmel_lcdfb0_data;
9389 +static struct resource atmel_lcdfb0_resource[] = {
9390 + {
9391 + .start = 0xff000000,
9392 + .end = 0xff000fff,
9393 + .flags = IORESOURCE_MEM,
9394 + },
9395 + IRQ(1),
9396 + {
9397 + /* Placeholder for pre-allocated fb memory */
9398 + .start = 0x00000000,
9399 + .end = 0x00000000,
9400 + .flags = 0,
9401 + },
9402 +};
9403 +DEFINE_DEV_DATA(atmel_lcdfb, 0);
9404 +DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
9405 +static struct clk atmel_lcdfb0_pixclk = {
9406 + .name = "lcdc_clk",
9407 + .dev = &atmel_lcdfb0_device.dev,
9408 + .mode = genclk_mode,
9409 + .get_rate = genclk_get_rate,
9410 + .set_rate = genclk_set_rate,
9411 + .set_parent = genclk_set_parent,
9412 + .index = 7,
9413 +};
9414 +
9415 +struct platform_device *__init
9416 +at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
9417 + unsigned long fbmem_start, unsigned long fbmem_len)
9418 +{
9419 + struct platform_device *pdev;
9420 + struct atmel_lcdfb_info *info;
9421 + struct fb_monspecs *monspecs;
9422 + struct fb_videomode *modedb;
9423 + unsigned int modedb_size;
9424 +
9425 + /*
9426 + * Do a deep copy of the fb data, monspecs and modedb. Make
9427 + * sure all allocations are done before setting up the
9428 + * portmux.
9429 + */
9430 + monspecs = kmemdup(data->default_monspecs,
9431 + sizeof(struct fb_monspecs), GFP_KERNEL);
9432 + if (!monspecs)
9433 + return NULL;
9434 +
9435 + modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
9436 + modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
9437 + if (!modedb)
9438 + goto err_dup_modedb;
9439 + monspecs->modedb = modedb;
9440 +
9441 + switch (id) {
9442 + case 0:
9443 + pdev = &atmel_lcdfb0_device;
9444 + select_peripheral(PC(19), PERIPH_A, 0); /* CC */
9445 + select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */
9446 + select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */
9447 + select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */
9448 + select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */
9449 + select_peripheral(PC(24), PERIPH_A, 0); /* MODE */
9450 + select_peripheral(PC(25), PERIPH_A, 0); /* PWR */
9451 + select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */
9452 + select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */
9453 + select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */
9454 + select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */
9455 + select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */
9456 + select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */
9457 + select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */
9458 + select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */
9459 + select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */
9460 + select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */
9461 + select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */
9462 + select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */
9463 + select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */
9464 + select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */
9465 + select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */
9466 + select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */
9467 + select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */
9468 + select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */
9469 + select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */
9470 + select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */
9471 + select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */
9472 + select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */
9473 + select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */
9474 + select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */
9475 +
9476 + clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
9477 + clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
9478 + break;
9479 +
9480 + default:
9481 + goto err_invalid_id;
9482 + }
9483 +
9484 + if (fbmem_len) {
9485 + pdev->resource[2].start = fbmem_start;
9486 + pdev->resource[2].end = fbmem_start + fbmem_len - 1;
9487 + pdev->resource[2].flags = IORESOURCE_MEM;
9488 + }
9489 +
9490 + info = pdev->dev.platform_data;
9491 + memcpy(info, data, sizeof(struct atmel_lcdfb_info));
9492 + info->default_monspecs = monspecs;
9493 +
9494 + platform_device_register(pdev);
9495 + return pdev;
9496 +
9497 +err_invalid_id:
9498 + kfree(modedb);
9499 +err_dup_modedb:
9500 + kfree(monspecs);
9501 + return NULL;
9502 +}
9503 +#endif
9504 +
9505 +/* --------------------------------------------------------------------
9506 + * PWM
9507 + * -------------------------------------------------------------------- */
9508 +static struct resource atmel_pwm0_resource[] __initdata = {
9509 + PBMEM(0xfff01400),
9510 + IRQ(24),
9511 +};
9512 +static struct clk atmel_pwm0_mck = {
9513 + .name = "mck",
9514 + .parent = &pbb_clk,
9515 + .mode = pbb_clk_mode,
9516 + .get_rate = pbb_clk_get_rate,
9517 + .index = 5,
9518 +};
9519 +
9520 +struct platform_device *__init at32_add_device_pwm(u32 mask)
9521 +{
9522 + struct platform_device *pdev;
9523 +
9524 + if (!mask)
9525 + return NULL;
9526 +
9527 + pdev = platform_device_alloc("atmel_pwm", 0);
9528 + if (!pdev)
9529 + return NULL;
9530 +
9531 + if (platform_device_add_resources(pdev, atmel_pwm0_resource,
9532 + ARRAY_SIZE(atmel_pwm0_resource)))
9533 + goto out_free_pdev;
9534 +
9535 + if (platform_device_add_data(pdev, &mask, sizeof(mask)))
9536 + goto out_free_pdev;
9537 +
9538 + if (mask & (1 << 0))
9539 + select_peripheral(PA(28), PERIPH_A, 0);
9540 + if (mask & (1 << 1))
9541 + select_peripheral(PA(29), PERIPH_A, 0);
9542 + if (mask & (1 << 2))
9543 + select_peripheral(PA(21), PERIPH_B, 0);
9544 + if (mask & (1 << 3))
9545 + select_peripheral(PA(22), PERIPH_B, 0);
9546 +
9547 + atmel_pwm0_mck.dev = &pdev->dev;
9548 +
9549 + platform_device_add(pdev);
9550 +
9551 + return pdev;
9552 +
9553 +out_free_pdev:
9554 + platform_device_put(pdev);
9555 + return NULL;
9556 +}
9557 +
9558 +/* --------------------------------------------------------------------
9559 + * SSC
9560 + * -------------------------------------------------------------------- */
9561 +static struct resource ssc0_resource[] = {
9562 + PBMEM(0xffe01c00),
9563 + IRQ(10),
9564 +};
9565 +DEFINE_DEV(ssc, 0);
9566 +DEV_CLK(pclk, ssc0, pba, 7);
9567 +
9568 +static struct resource ssc1_resource[] = {
9569 + PBMEM(0xffe02000),
9570 + IRQ(11),
9571 +};
9572 +DEFINE_DEV(ssc, 1);
9573 +DEV_CLK(pclk, ssc1, pba, 8);
9574 +
9575 +static struct resource ssc2_resource[] = {
9576 + PBMEM(0xffe02400),
9577 + IRQ(12),
9578 +};
9579 +DEFINE_DEV(ssc, 2);
9580 +DEV_CLK(pclk, ssc2, pba, 9);
9581 +
9582 +struct platform_device *__init
9583 +at32_add_device_ssc(unsigned int id, unsigned int flags)
9584 +{
9585 + struct platform_device *pdev;
9586 +
9587 + switch (id) {
9588 + case 0:
9589 + pdev = &ssc0_device;
9590 + if (flags & ATMEL_SSC_RF)
9591 + select_peripheral(PA(21), PERIPH_A, 0); /* RF */
9592 + if (flags & ATMEL_SSC_RK)
9593 + select_peripheral(PA(22), PERIPH_A, 0); /* RK */
9594 + if (flags & ATMEL_SSC_TK)
9595 + select_peripheral(PA(23), PERIPH_A, 0); /* TK */
9596 + if (flags & ATMEL_SSC_TF)
9597 + select_peripheral(PA(24), PERIPH_A, 0); /* TF */
9598 + if (flags & ATMEL_SSC_TD)
9599 + select_peripheral(PA(25), PERIPH_A, 0); /* TD */
9600 + if (flags & ATMEL_SSC_RD)
9601 + select_peripheral(PA(26), PERIPH_A, 0); /* RD */
9602 + break;
9603 + case 1:
9604 + pdev = &ssc1_device;
9605 + if (flags & ATMEL_SSC_RF)
9606 + select_peripheral(PA(0), PERIPH_B, 0); /* RF */
9607 + if (flags & ATMEL_SSC_RK)
9608 + select_peripheral(PA(1), PERIPH_B, 0); /* RK */
9609 + if (flags & ATMEL_SSC_TK)
9610 + select_peripheral(PA(2), PERIPH_B, 0); /* TK */
9611 + if (flags & ATMEL_SSC_TF)
9612 + select_peripheral(PA(3), PERIPH_B, 0); /* TF */
9613 + if (flags & ATMEL_SSC_TD)
9614 + select_peripheral(PA(4), PERIPH_B, 0); /* TD */
9615 + if (flags & ATMEL_SSC_RD)
9616 + select_peripheral(PA(5), PERIPH_B, 0); /* RD */
9617 + break;
9618 + case 2:
9619 + pdev = &ssc2_device;
9620 + if (flags & ATMEL_SSC_TD)
9621 + select_peripheral(PB(13), PERIPH_A, 0); /* TD */
9622 + if (flags & ATMEL_SSC_RD)
9623 + select_peripheral(PB(14), PERIPH_A, 0); /* RD */
9624 + if (flags & ATMEL_SSC_TK)
9625 + select_peripheral(PB(15), PERIPH_A, 0); /* TK */
9626 + if (flags & ATMEL_SSC_TF)
9627 + select_peripheral(PB(16), PERIPH_A, 0); /* TF */
9628 + if (flags & ATMEL_SSC_RF)
9629 + select_peripheral(PB(17), PERIPH_A, 0); /* RF */
9630 + if (flags & ATMEL_SSC_RK)
9631 + select_peripheral(PB(18), PERIPH_A, 0); /* RK */
9632 + break;
9633 + default:
9634 + return NULL;
9635 + }
9636 +
9637 + platform_device_register(pdev);
9638 + return pdev;
9639 +}
9640 +
9641 +/* --------------------------------------------------------------------
9642 + * USB Device Controller
9643 + * -------------------------------------------------------------------- */
9644 +static struct resource usba0_resource[] __initdata = {
9645 + {
9646 + .start = 0xff300000,
9647 + .end = 0xff3fffff,
9648 + .flags = IORESOURCE_MEM,
9649 + }, {
9650 + .start = 0xfff03000,
9651 + .end = 0xfff033ff,
9652 + .flags = IORESOURCE_MEM,
9653 + },
9654 + IRQ(31),
9655 +};
9656 +static struct clk usba0_pclk = {
9657 + .name = "pclk",
9658 + .parent = &pbb_clk,
9659 + .mode = pbb_clk_mode,
9660 + .get_rate = pbb_clk_get_rate,
9661 + .index = 12,
9662 +};
9663 +static struct clk usba0_hclk = {
9664 + .name = "hclk",
9665 + .parent = &hsb_clk,
9666 + .mode = hsb_clk_mode,
9667 + .get_rate = hsb_clk_get_rate,
9668 + .index = 6,
9669 +};
9670 +
9671 +struct platform_device *__init
9672 +at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
9673 +{
9674 + struct platform_device *pdev;
9675 +
9676 + if (id != 0)
9677 + return NULL;
9678 +
9679 + pdev = platform_device_alloc("atmel_usba_udc", 0);
9680 + if (!pdev)
9681 + return NULL;
9682 +
9683 + if (platform_device_add_resources(pdev, usba0_resource,
9684 + ARRAY_SIZE(usba0_resource)))
9685 + goto out_free_pdev;
9686 +
9687 + if (data) {
9688 + if (platform_device_add_data(pdev, data, sizeof(*data)))
9689 + goto out_free_pdev;
9690 +
9691 + if (data->vbus_pin != GPIO_PIN_NONE)
9692 + at32_select_gpio(data->vbus_pin, 0);
9693 + }
9694 +
9695 + usba0_pclk.dev = &pdev->dev;
9696 + usba0_hclk.dev = &pdev->dev;
9697 +
9698 + platform_device_add(pdev);
9699 +
9700 + return pdev;
9701 +
9702 +out_free_pdev:
9703 + platform_device_put(pdev);
9704 + return NULL;
9705 +}
9706 +
9707 +/* --------------------------------------------------------------------
9708 + * IDE / CompactFlash
9709 + * -------------------------------------------------------------------- */
9710 +#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7001)
9711 +static struct resource at32_smc_cs4_resource[] __initdata = {
9712 + {
9713 + .start = 0x04000000,
9714 + .end = 0x07ffffff,
9715 + .flags = IORESOURCE_MEM,
9716 + },
9717 + IRQ(~0UL), /* Magic IRQ will be overridden */
9718 +};
9719 +static struct resource at32_smc_cs5_resource[] __initdata = {
9720 + {
9721 + .start = 0x20000000,
9722 + .end = 0x23ffffff,
9723 + .flags = IORESOURCE_MEM,
9724 + },
9725 + IRQ(~0UL), /* Magic IRQ will be overridden */
9726 +};
9727 +
9728 +static int __init at32_init_ide_or_cf(struct platform_device *pdev,
9729 + unsigned int cs, unsigned int extint)
9730 +{
9731 + static unsigned int extint_pin_map[4] __initdata = {
9732 + GPIO_PIN_PB(25),
9733 + GPIO_PIN_PB(26),
9734 + GPIO_PIN_PB(27),
9735 + GPIO_PIN_PB(28),
9736 + };
9737 + static bool common_pins_initialized __initdata = false;
9738 + unsigned int extint_pin;
9739 + int ret;
9740 +
9741 + if (extint >= ARRAY_SIZE(extint_pin_map))
9742 + return -EINVAL;
9743 + extint_pin = extint_pin_map[extint];
9744 +
9745 + switch (cs) {
9746 + case 4:
9747 + ret = platform_device_add_resources(pdev,
9748 + at32_smc_cs4_resource,
9749 + ARRAY_SIZE(at32_smc_cs4_resource));
9750 + if (ret)
9751 + return ret;
9752 +
9753 + select_peripheral(PE(21), PERIPH_A, 0); /* NCS4 -> OE_N */
9754 + set_ebi_sfr_bits(HMATRIX_BIT(CS4A));
9755 + break;
9756 + case 5:
9757 + ret = platform_device_add_resources(pdev,
9758 + at32_smc_cs5_resource,
9759 + ARRAY_SIZE(at32_smc_cs5_resource));
9760 + if (ret)
9761 + return ret;
9762 +
9763 + select_peripheral(PE(22), PERIPH_A, 0); /* NCS5 -> OE_N */
9764 + set_ebi_sfr_bits(HMATRIX_BIT(CS5A));
9765 + break;
9766 + default:
9767 + return -EINVAL;
9768 + }
9769 +
9770 + if (!common_pins_initialized) {
9771 + select_peripheral(PE(19), PERIPH_A, 0); /* CFCE1 -> CS0_N */
9772 + select_peripheral(PE(20), PERIPH_A, 0); /* CFCE2 -> CS1_N */
9773 + select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW -> DIR */
9774 + select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT <- IORDY */
9775 + common_pins_initialized = true;
9776 + }
9777 +
9778 + at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
9779 +
9780 + pdev->resource[1].start = EIM_IRQ_BASE + extint;
9781 + pdev->resource[1].end = pdev->resource[1].start;
9782 +
9783 + return 0;
9784 +}
9785 +
9786 +struct platform_device *__init
9787 +at32_add_device_ide(unsigned int id, unsigned int extint,
9788 + struct ide_platform_data *data)
9789 +{
9790 + struct platform_device *pdev;
9791 +
9792 + pdev = platform_device_alloc("at32_ide", id);
9793 + if (!pdev)
9794 + goto fail;
9795 +
9796 + if (platform_device_add_data(pdev, data,
9797 + sizeof(struct ide_platform_data)))
9798 + goto fail;
9799 +
9800 + if (at32_init_ide_or_cf(pdev, data->cs, extint))
9801 + goto fail;
9802 +
9803 + platform_device_add(pdev);
9804 + return pdev;
9805 +
9806 +fail:
9807 + platform_device_put(pdev);
9808 + return NULL;
9809 +}
9810 +
9811 +struct platform_device *__init
9812 +at32_add_device_cf(unsigned int id, unsigned int extint,
9813 + struct cf_platform_data *data)
9814 +{
9815 + struct platform_device *pdev;
9816 +
9817 + pdev = platform_device_alloc("at32_cf", id);
9818 + if (!pdev)
9819 + goto fail;
9820 +
9821 + if (platform_device_add_data(pdev, data,
9822 + sizeof(struct cf_platform_data)))
9823 + goto fail;
9824 +
9825 + if (at32_init_ide_or_cf(pdev, data->cs, extint))
9826 + goto fail;
9827 +
9828 + if (data->detect_pin != GPIO_PIN_NONE)
9829 + at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH);
9830 + if (data->reset_pin != GPIO_PIN_NONE)
9831 + at32_select_gpio(data->reset_pin, 0);
9832 + if (data->vcc_pin != GPIO_PIN_NONE)
9833 + at32_select_gpio(data->vcc_pin, 0);
9834 + /* READY is used as extint, so we can't select it as gpio */
9835 +
9836 + platform_device_add(pdev);
9837 + return pdev;
9838 +
9839 +fail:
9840 + platform_device_put(pdev);
9841 + return NULL;
9842 +}
9843 +#endif
9844 +
9845 +/* --------------------------------------------------------------------
9846 + * AC97C
9847 + * -------------------------------------------------------------------- */
9848 +static struct resource atmel_ac97c0_resource[] __initdata = {
9849 + PBMEM(0xfff02800),
9850 + IRQ(29),
9851 +};
9852 +static struct clk atmel_ac97c0_pclk = {
9853 + .name = "pclk",
9854 + .parent = &pbb_clk,
9855 + .mode = pbb_clk_mode,
9856 + .get_rate = pbb_clk_get_rate,
9857 + .index = 10,
9858 +};
9859 +
9860 +struct platform_device *__init at32_add_device_ac97c(unsigned int id)
9861 +{
9862 + struct platform_device *pdev;
9863 +
9864 + if (id != 0)
9865 + return NULL;
9866 +
9867 + pdev = platform_device_alloc("atmel_ac97c", id);
9868 + if (!pdev)
9869 + return NULL;
9870 +
9871 + if (platform_device_add_resources(pdev, atmel_ac97c0_resource,
9872 + ARRAY_SIZE(atmel_ac97c0_resource)))
9873 + goto err_add_resources;
9874 +
9875 + select_peripheral(PB(20), PERIPH_B, 0); /* SYNC */
9876 + select_peripheral(PB(21), PERIPH_B, 0); /* SDO */
9877 + select_peripheral(PB(22), PERIPH_B, 0); /* SDI */
9878 + select_peripheral(PB(23), PERIPH_B, 0); /* SCLK */
9879 +
9880 + atmel_ac97c0_pclk.dev = &pdev->dev;
9881 +
9882 + platform_device_add(pdev);
9883 + return pdev;
9884 +
9885 +err_add_resources:
9886 + platform_device_put(pdev);
9887 + return NULL;
9888 +}
9889 +
9890 +/* --------------------------------------------------------------------
9891 + * ABDAC
9892 + * -------------------------------------------------------------------- */
9893 +static struct resource abdac0_resource[] __initdata = {
9894 + PBMEM(0xfff02000),
9895 + IRQ(27),
9896 +};
9897 +static struct clk abdac0_pclk = {
9898 + .name = "pclk",
9899 + .parent = &pbb_clk,
9900 + .mode = pbb_clk_mode,
9901 + .get_rate = pbb_clk_get_rate,
9902 + .index = 8,
9903 +};
9904 +static struct clk abdac0_sample_clk = {
9905 + .name = "sample_clk",
9906 + .mode = genclk_mode,
9907 + .get_rate = genclk_get_rate,
9908 + .set_rate = genclk_set_rate,
9909 + .set_parent = genclk_set_parent,
9910 + .index = 6,
9911 +};
9912 +
9913 +struct platform_device *__init at32_add_device_abdac(unsigned int id)
9914 +{
9915 + struct platform_device *pdev;
9916 +
9917 + if (id != 0)
9918 + return NULL;
9919 +
9920 + pdev = platform_device_alloc("abdac", id);
9921 + if (!pdev)
9922 + return NULL;
9923 +
9924 + if (platform_device_add_resources(pdev, abdac0_resource,
9925 + ARRAY_SIZE(abdac0_resource)))
9926 + goto err_add_resources;
9927 +
9928 + select_peripheral(PB(20), PERIPH_A, 0); /* DATA1 */
9929 + select_peripheral(PB(21), PERIPH_A, 0); /* DATA0 */
9930 + select_peripheral(PB(22), PERIPH_A, 0); /* DATAN1 */
9931 + select_peripheral(PB(23), PERIPH_A, 0); /* DATAN0 */
9932 +
9933 + abdac0_pclk.dev = &pdev->dev;
9934 + abdac0_sample_clk.dev = &pdev->dev;
9935 +
9936 + platform_device_add(pdev);
9937 + return pdev;
9938 +
9939 +err_add_resources:
9940 + platform_device_put(pdev);
9941 + return NULL;
9942 +}
9943 +
9944 +/* --------------------------------------------------------------------
9945 + * GCLK
9946 + * -------------------------------------------------------------------- */
9947 +static struct clk gclk0 = {
9948 + .name = "gclk0",
9949 + .mode = genclk_mode,
9950 + .get_rate = genclk_get_rate,
9951 + .set_rate = genclk_set_rate,
9952 + .set_parent = genclk_set_parent,
9953 + .index = 0,
9954 +};
9955 +static struct clk gclk1 = {
9956 + .name = "gclk1",
9957 + .mode = genclk_mode,
9958 + .get_rate = genclk_get_rate,
9959 + .set_rate = genclk_set_rate,
9960 + .set_parent = genclk_set_parent,
9961 + .index = 1,
9962 +};
9963 +static struct clk gclk2 = {
9964 + .name = "gclk2",
9965 + .mode = genclk_mode,
9966 + .get_rate = genclk_get_rate,
9967 + .set_rate = genclk_set_rate,
9968 + .set_parent = genclk_set_parent,
9969 + .index = 2,
9970 +};
9971 +static struct clk gclk3 = {
9972 + .name = "gclk3",
9973 + .mode = genclk_mode,
9974 + .get_rate = genclk_get_rate,
9975 + .set_rate = genclk_set_rate,
9976 + .set_parent = genclk_set_parent,
9977 + .index = 3,
9978 +};
9979 +static struct clk gclk4 = {
9980 + .name = "gclk4",
9981 + .mode = genclk_mode,
9982 + .get_rate = genclk_get_rate,
9983 + .set_rate = genclk_set_rate,
9984 + .set_parent = genclk_set_parent,
9985 + .index = 4,
9986 +};
9987 +
9988 +struct clk *at32_clock_list[] = {
9989 + &osc32k,
9990 + &osc0,
9991 + &osc1,
9992 + &pll0,
9993 + &pll1,
9994 + &cpu_clk,
9995 + &hsb_clk,
9996 + &pba_clk,
9997 + &pbb_clk,
9998 + &at32_pm_pclk,
9999 + &at32_intc0_pclk,
10000 + &hmatrix_clk,
10001 + &ebi_clk,
10002 + &hramc_clk,
10003 + &smc0_pclk,
10004 + &smc0_mck,
10005 + &pdc_hclk,
10006 + &pdc_pclk,
10007 + &dmaca0_hclk,
10008 + &pico_clk,
10009 + &pio0_mck,
10010 + &pio1_mck,
10011 + &pio2_mck,
10012 + &pio3_mck,
10013 + &pio4_mck,
10014 + &at32_systc0_pclk,
10015 + &atmel_usart0_usart,
10016 + &atmel_usart1_usart,
10017 + &atmel_usart2_usart,
10018 + &atmel_usart3_usart,
10019 + &atmel_pwm0_mck,
10020 +#if defined(CONFIG_CPU_AT32AP7000)
10021 + &macb0_hclk,
10022 + &macb0_pclk,
10023 + &macb1_hclk,
10024 + &macb1_pclk,
10025 +#endif
10026 + &atmel_spi0_spi_clk,
10027 + &atmel_spi1_spi_clk,
10028 + &atmel_twi0_pclk,
10029 + &atmel_mci0_pclk,
10030 +#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
10031 + &atmel_lcdfb0_hck1,
10032 + &atmel_lcdfb0_pixclk,
10033 +#endif
10034 + &ssc0_pclk,
10035 + &ssc1_pclk,
10036 + &ssc2_pclk,
10037 + &usba0_hclk,
10038 + &usba0_pclk,
10039 + &atmel_ac97c0_pclk,
10040 + &abdac0_pclk,
10041 + &abdac0_sample_clk,
10042 + &gclk0,
10043 + &gclk1,
10044 + &gclk2,
10045 + &gclk3,
10046 + &gclk4,
10047 +};
10048 +unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
10049 +
10050 +void __init at32_portmux_init(void)
10051 +{
10052 + at32_init_pio(&pio0_device);
10053 + at32_init_pio(&pio1_device);
10054 + at32_init_pio(&pio2_device);
10055 + at32_init_pio(&pio3_device);
10056 + at32_init_pio(&pio4_device);
10057 +}
10058 +
10059 +void __init at32_clock_init(void)
10060 +{
10061 + u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
10062 + int i;
10063 +
10064 + if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
10065 + main_clock = &pll0;
10066 + cpu_clk.parent = &pll0;
10067 + } else {
10068 + main_clock = &osc0;
10069 + cpu_clk.parent = &osc0;
10070 + }
10071 +
10072 + if (pm_readl(PLL0) & PM_BIT(PLLOSC))
10073 + pll0.parent = &osc1;
10074 + if (pm_readl(PLL1) & PM_BIT(PLLOSC))
10075 + pll1.parent = &osc1;
10076 +
10077 + genclk_init_parent(&gclk0);
10078 + genclk_init_parent(&gclk1);
10079 + genclk_init_parent(&gclk2);
10080 + genclk_init_parent(&gclk3);
10081 + genclk_init_parent(&gclk4);
10082 +#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
10083 + genclk_init_parent(&atmel_lcdfb0_pixclk);
10084 +#endif
10085 + genclk_init_parent(&abdac0_sample_clk);
10086 +
10087 + /*
10088 + * Turn on all clocks that have at least one user already, and
10089 + * turn off everything else. We only do this for module
10090 + * clocks, and even though it isn't particularly pretty to
10091 + * check the address of the mode function, it should do the
10092 + * trick...
10093 + */
10094 + for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
10095 + struct clk *clk = at32_clock_list[i];
10096 +
10097 + if (clk->users == 0)
10098 + continue;
10099 +
10100 + if (clk->mode == &cpu_clk_mode)
10101 + cpu_mask |= 1 << clk->index;
10102 + else if (clk->mode == &hsb_clk_mode)
10103 + hsb_mask |= 1 << clk->index;
10104 + else if (clk->mode == &pba_clk_mode)
10105 + pba_mask |= 1 << clk->index;
10106 + else if (clk->mode == &pbb_clk_mode)
10107 + pbb_mask |= 1 << clk->index;
10108 + }
10109 +
10110 + pm_writel(CPU_MASK, cpu_mask);
10111 + pm_writel(HSB_MASK, hsb_mask);
10112 + pm_writel(PBA_MASK, pba_mask);
10113 + pm_writel(PBB_MASK, pbb_mask);
10114 +}
10115 diff --git a/arch/avr32/mach-at32ap/extint.c b/arch/avr32/mach-at32ap/extint.c
10116 index f5bfd4c..c36a6d5 100644
10117 --- a/arch/avr32/mach-at32ap/extint.c
10118 +++ b/arch/avr32/mach-at32ap/extint.c
10119 @@ -26,16 +26,10 @@
10120 #define EIC_MODE 0x0014
10121 #define EIC_EDGE 0x0018
10122 #define EIC_LEVEL 0x001c
10123 -#define EIC_TEST 0x0020
10124 #define EIC_NMIC 0x0024
10125
10126 -/* Bitfields in TEST */
10127 -#define EIC_TESTEN_OFFSET 31
10128 -#define EIC_TESTEN_SIZE 1
10129 -
10130 /* Bitfields in NMIC */
10131 -#define EIC_EN_OFFSET 0
10132 -#define EIC_EN_SIZE 1
10133 +#define EIC_NMIC_ENABLE (1 << 0)
10134
10135 /* Bit manipulation macros */
10136 #define EIC_BIT(name) \
10137 @@ -63,6 +57,9 @@ struct eic {
10138 unsigned int first_irq;
10139 };
10140
10141 +static struct eic *nmi_eic;
10142 +static bool nmi_enabled;
10143 +
10144 static void eic_ack_irq(unsigned int irq)
10145 {
10146 struct eic *eic = get_irq_chip_data(irq);
10147 @@ -133,8 +130,11 @@ static int eic_set_irq_type(unsigned int irq, unsigned int flow_type)
10148 eic_writel(eic, EDGE, edge);
10149 eic_writel(eic, LEVEL, level);
10150
10151 - if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
10152 + if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) {
10153 flow_type |= IRQ_LEVEL;
10154 + __set_irq_handler_unlocked(irq, handle_level_irq);
10155 + } else
10156 + __set_irq_handler_unlocked(irq, handle_edge_irq);
10157 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
10158 desc->status |= flow_type;
10159 }
10160 @@ -154,9 +154,8 @@ static struct irq_chip eic_chip = {
10161 static void demux_eic_irq(unsigned int irq, struct irq_desc *desc)
10162 {
10163 struct eic *eic = desc->handler_data;
10164 - struct irq_desc *ext_desc;
10165 unsigned long status, pending;
10166 - unsigned int i, ext_irq;
10167 + unsigned int i;
10168
10169 status = eic_readl(eic, ISR);
10170 pending = status & eic_readl(eic, IMR);
10171 @@ -165,15 +164,28 @@ static void demux_eic_irq(unsigned int irq, struct irq_desc *desc)
10172 i = fls(pending) - 1;
10173 pending &= ~(1 << i);
10174
10175 - ext_irq = i + eic->first_irq;
10176 - ext_desc = irq_desc + ext_irq;
10177 - if (ext_desc->status & IRQ_LEVEL)
10178 - handle_level_irq(ext_irq, ext_desc);
10179 - else
10180 - handle_edge_irq(ext_irq, ext_desc);
10181 + generic_handle_irq(i + eic->first_irq);
10182 }
10183 }
10184
10185 +int nmi_enable(void)
10186 +{
10187 + nmi_enabled = true;
10188 +
10189 + if (nmi_eic)
10190 + eic_writel(nmi_eic, NMIC, EIC_NMIC_ENABLE);
10191 +
10192 + return 0;
10193 +}
10194 +
10195 +void nmi_disable(void)
10196 +{
10197 + if (nmi_eic)
10198 + eic_writel(nmi_eic, NMIC, 0);
10199 +
10200 + nmi_enabled = false;
10201 +}
10202 +
10203 static int __init eic_probe(struct platform_device *pdev)
10204 {
10205 struct eic *eic;
10206 @@ -214,14 +226,13 @@ static int __init eic_probe(struct platform_device *pdev)
10207 pattern = eic_readl(eic, MODE);
10208 nr_irqs = fls(pattern);
10209
10210 - /* Trigger on falling edge unless overridden by driver */
10211 - eic_writel(eic, MODE, 0UL);
10212 + /* Trigger on low level unless overridden by driver */
10213 eic_writel(eic, EDGE, 0UL);
10214 + eic_writel(eic, LEVEL, 0UL);
10215
10216 eic->chip = &eic_chip;
10217
10218 for (i = 0; i < nr_irqs; i++) {
10219 - /* NOTE the handler we set here is ignored by the demux */
10220 set_irq_chip_and_handler(eic->first_irq + i, &eic_chip,
10221 handle_level_irq);
10222 set_irq_chip_data(eic->first_irq + i, eic);
10223 @@ -230,6 +241,16 @@ static int __init eic_probe(struct platform_device *pdev)
10224 set_irq_chained_handler(int_irq, demux_eic_irq);
10225 set_irq_data(int_irq, eic);
10226
10227 + if (pdev->id == 0) {
10228 + nmi_eic = eic;
10229 + if (nmi_enabled)
10230 + /*
10231 + * Someone tried to enable NMI before we were
10232 + * ready. Do it now.
10233 + */
10234 + nmi_enable();
10235 + }
10236 +
10237 dev_info(&pdev->dev,
10238 "External Interrupt Controller at 0x%p, IRQ %u\n",
10239 eic->regs, int_irq);
10240 diff --git a/arch/avr32/mach-at32ap/gpio-dev.c b/arch/avr32/mach-at32ap/gpio-dev.c
10241 new file mode 100644
10242 index 0000000..8cf6d11
10243 --- /dev/null
10244 +++ b/arch/avr32/mach-at32ap/gpio-dev.c
10245 @@ -0,0 +1,573 @@
10246 +/*
10247 + * GPIO /dev and configfs interface
10248 + *
10249 + * Copyright (C) 2006-2007 Atmel Corporation
10250 + *
10251 + * This program is free software; you can redistribute it and/or modify
10252 + * it under the terms of the GNU General Public License version 2 as
10253 + * published by the Free Software Foundation.
10254 + */
10255 +#include <linux/kernel.h>
10256 +#include <linux/configfs.h>
10257 +#include <linux/cdev.h>
10258 +#include <linux/device.h>
10259 +#include <linux/fs.h>
10260 +#include <linux/interrupt.h>
10261 +#include <linux/module.h>
10262 +#include <linux/poll.h>
10263 +#include <linux/uaccess.h>
10264 +#include <linux/wait.h>
10265 +
10266 +#include <asm/gpio.h>
10267 +#include <asm/arch/portmux.h>
10268 +
10269 +#define GPIO_DEV_MAX 8
10270 +
10271 +static struct class *gpio_dev_class;
10272 +static dev_t gpio_devt;
10273 +
10274 +struct gpio_item {
10275 + spinlock_t lock;
10276 +
10277 + int enabled;
10278 + int initialized;
10279 + int port;
10280 + u32 pin_mask;
10281 + u32 oe_mask;
10282 +
10283 + /* Pin state last time we read it (for blocking reads) */
10284 + u32 pin_state;
10285 + int changed;
10286 +
10287 + wait_queue_head_t change_wq;
10288 + struct fasync_struct *async_queue;
10289 +
10290 + int id;
10291 + struct class_device *gpio_dev;
10292 + struct cdev char_dev;
10293 + struct config_item item;
10294 +};
10295 +
10296 +struct gpio_attribute {
10297 + struct configfs_attribute attr;
10298 + ssize_t (*show)(struct gpio_item *, char *);
10299 + ssize_t (*store)(struct gpio_item *, const char *, size_t);
10300 +};
10301 +
10302 +static irqreturn_t gpio_dev_interrupt(int irq, void *dev_id)
10303 +{
10304 + struct gpio_item *gpio = dev_id;
10305 + u32 old_state, new_state;
10306 +
10307 + old_state = gpio->pin_state;
10308 + new_state = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
10309 + gpio->pin_state = new_state;
10310 +
10311 + if (new_state != old_state) {
10312 + gpio->changed = 1;
10313 + wake_up_interruptible(&gpio->change_wq);
10314 +
10315 + if (gpio->async_queue)
10316 + kill_fasync(&gpio->async_queue, SIGIO, POLL_IN);
10317 + }
10318 +
10319 + return IRQ_HANDLED;
10320 +}
10321 +
10322 +static int gpio_dev_open(struct inode *inode, struct file *file)
10323 +{
10324 + struct gpio_item *gpio = container_of(inode->i_cdev,
10325 + struct gpio_item,
10326 + char_dev);
10327 + unsigned int irq;
10328 + unsigned int i;
10329 + int ret;
10330 +
10331 + nonseekable_open(inode, file);
10332 + config_item_get(&gpio->item);
10333 + file->private_data = gpio;
10334 +
10335 + gpio->pin_state = at32_gpio_get_value_multiple(gpio->port,
10336 + gpio->pin_mask);
10337 + gpio->changed = 1;
10338 +
10339 + for (i = 0; i < 32; i++) {
10340 + if (gpio->pin_mask & (1 << i)) {
10341 + irq = gpio_to_irq(32 * gpio->port + i);
10342 + ret = request_irq(irq, gpio_dev_interrupt, 0,
10343 + "gpio-dev", gpio);
10344 + if (ret)
10345 + goto err_irq;
10346 + }
10347 + }
10348 +
10349 + return 0;
10350 +
10351 +err_irq:
10352 + while (i--) {
10353 + if (gpio->pin_mask & (1 << i)) {
10354 + irq = gpio_to_irq(32 * gpio->port + i);
10355 + free_irq(irq, gpio);
10356 + }
10357 + }
10358 +
10359 + config_item_put(&gpio->item);
10360 +
10361 + return ret;
10362 +}
10363 +
10364 +static int gpio_dev_fasync(int fd, struct file *file, int mode)
10365 +{
10366 + struct gpio_item *gpio = file->private_data;
10367 +
10368 + return fasync_helper(fd, file, mode, &gpio->async_queue);
10369 +}
10370 +
10371 +static int gpio_dev_release(struct inode *inode, struct file *file)
10372 +{
10373 + struct gpio_item *gpio = file->private_data;
10374 + unsigned int irq;
10375 + unsigned int i;
10376 +
10377 + gpio_dev_fasync(-1, file, 0);
10378 +
10379 + for (i = 0; i < 32; i++) {
10380 + if (gpio->pin_mask & (1 << i)) {
10381 + irq = gpio_to_irq(32 * gpio->port + i);
10382 + free_irq(irq, gpio);
10383 + }
10384 + }
10385 +
10386 + config_item_put(&gpio->item);
10387 +
10388 + return 0;
10389 +}
10390 +
10391 +static unsigned int gpio_dev_poll(struct file *file, poll_table *wait)
10392 +{
10393 + struct gpio_item *gpio = file->private_data;
10394 + unsigned int mask = 0;
10395 +
10396 + poll_wait(file, &gpio->change_wq, wait);
10397 + if (gpio->changed)
10398 + mask |= POLLIN | POLLRDNORM;
10399 +
10400 + return mask;
10401 +}
10402 +
10403 +static ssize_t gpio_dev_read(struct file *file, char __user *buf,
10404 + size_t count, loff_t *offset)
10405 +{
10406 + struct gpio_item *gpio = file->private_data;
10407 + u32 value;
10408 +
10409 + spin_lock_irq(&gpio->lock);
10410 + while (!gpio->changed) {
10411 + spin_unlock_irq(&gpio->lock);
10412 +
10413 + if (file->f_flags & O_NONBLOCK)
10414 + return -EAGAIN;
10415 +
10416 + if (wait_event_interruptible(gpio->change_wq, gpio->changed))
10417 + return -ERESTARTSYS;
10418 +
10419 + spin_lock_irq(&gpio->lock);
10420 + }
10421 +
10422 + gpio->changed = 0;
10423 + value = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
10424 +
10425 + spin_unlock_irq(&gpio->lock);
10426 +
10427 + count = min(count, (size_t)4);
10428 + if (copy_to_user(buf, &value, count))
10429 + return -EFAULT;
10430 +
10431 + return count;
10432 +}
10433 +
10434 +static ssize_t gpio_dev_write(struct file *file, const char __user *buf,
10435 + size_t count, loff_t *offset)
10436 +{
10437 + struct gpio_item *gpio = file->private_data;
10438 + u32 value = 0;
10439 + u32 mask = ~0UL;
10440 +
10441 + count = min(count, (size_t)4);
10442 + if (copy_from_user(&value, buf, count))
10443 + return -EFAULT;
10444 +
10445 + /* Assuming big endian */
10446 + mask <<= (4 - count) * 8;
10447 + mask &= gpio->pin_mask;
10448 +
10449 + at32_gpio_set_value_multiple(gpio->port, value, mask);
10450 +
10451 + return count;
10452 +}
10453 +
10454 +static struct file_operations gpio_dev_fops = {
10455 + .owner = THIS_MODULE,
10456 + .llseek = no_llseek,
10457 + .open = gpio_dev_open,
10458 + .release = gpio_dev_release,
10459 + .fasync = gpio_dev_fasync,
10460 + .poll = gpio_dev_poll,
10461 + .read = gpio_dev_read,
10462 + .write = gpio_dev_write,
10463 +};
10464 +
10465 +static struct gpio_item *to_gpio_item(struct config_item *item)
10466 +{
10467 + return item ? container_of(item, struct gpio_item, item) : NULL;
10468 +}
10469 +
10470 +static ssize_t gpio_show_gpio_id(struct gpio_item *gpio, char *page)
10471 +{
10472 + return sprintf(page, "%d\n", gpio->port);
10473 +}
10474 +
10475 +static ssize_t gpio_store_gpio_id(struct gpio_item *gpio,
10476 + const char *page, size_t count)
10477 +{
10478 + unsigned long id;
10479 + char *p = (char *)page;
10480 + ssize_t ret = -EINVAL;
10481 +
10482 + id = simple_strtoul(p, &p, 0);
10483 + if (!p || (*p && (*p != '\n')))
10484 + return -EINVAL;
10485 +
10486 + /* Switching PIO is not allowed when live... */
10487 + spin_lock(&gpio->lock);
10488 + if (!gpio->enabled) {
10489 + ret = -ENXIO;
10490 + if (at32_gpio_port_is_valid(id)) {
10491 + gpio->port = id;
10492 + ret = count;
10493 + }
10494 + }
10495 + spin_unlock(&gpio->lock);
10496 +
10497 + return ret;
10498 +}
10499 +
10500 +static ssize_t gpio_show_pin_mask(struct gpio_item *gpio, char *page)
10501 +{
10502 + return sprintf(page, "0x%08x\n", gpio->pin_mask);
10503 +}
10504 +
10505 +static ssize_t gpio_store_pin_mask(struct gpio_item *gpio,
10506 + const char *page, size_t count)
10507 +{
10508 + u32 new_mask;
10509 + char *p = (char *)page;
10510 + ssize_t ret = -EINVAL;
10511 +
10512 + new_mask = simple_strtoul(p, &p, 0);
10513 + if (!p || (*p && (*p != '\n')))
10514 + return -EINVAL;
10515 +
10516 + /* Can't update the pin mask while live. */
10517 + spin_lock(&gpio->lock);
10518 + if (!gpio->enabled) {
10519 + gpio->oe_mask &= new_mask;
10520 + gpio->pin_mask = new_mask;
10521 + ret = count;
10522 + }
10523 + spin_unlock(&gpio->lock);
10524 +
10525 + return ret;
10526 +}
10527 +
10528 +static ssize_t gpio_show_oe_mask(struct gpio_item *gpio, char *page)
10529 +{
10530 + return sprintf(page, "0x%08x\n", gpio->oe_mask);
10531 +}
10532 +
10533 +static ssize_t gpio_store_oe_mask(struct gpio_item *gpio,
10534 + const char *page, size_t count)
10535 +{
10536 + u32 mask;
10537 + char *p = (char *)page;
10538 + ssize_t ret = -EINVAL;
10539 +
10540 + mask = simple_strtoul(p, &p, 0);
10541 + if (!p || (*p && (*p != '\n')))
10542 + return -EINVAL;
10543 +
10544 + spin_lock(&gpio->lock);
10545 + if (!gpio->enabled) {
10546 + gpio->oe_mask = mask & gpio->pin_mask;
10547 + ret = count;
10548 + }
10549 + spin_unlock(&gpio->lock);
10550 +
10551 + return ret;
10552 +}
10553 +
10554 +static ssize_t gpio_show_enabled(struct gpio_item *gpio, char *page)
10555 +{
10556 + return sprintf(page, "%d\n", gpio->enabled);
10557 +}
10558 +
10559 +static ssize_t gpio_store_enabled(struct gpio_item *gpio,
10560 + const char *page, size_t count)
10561 +{
10562 + char *p = (char *)page;
10563 + int enabled;
10564 + int ret;
10565 +
10566 + enabled = simple_strtoul(p, &p, 0);
10567 + if (!p || (*p && (*p != '\n')))
10568 + return -EINVAL;
10569 +
10570 + /* make it a boolean value */
10571 + enabled = !!enabled;
10572 +
10573 + if (gpio->enabled == enabled)
10574 + /* No change; do nothing. */
10575 + return count;
10576 +
10577 + BUG_ON(gpio->id >= GPIO_DEV_MAX);
10578 +
10579 + if (!enabled) {
10580 + class_device_unregister(gpio->gpio_dev);
10581 + cdev_del(&gpio->char_dev);
10582 + at32_deselect_pins(gpio->port, gpio->pin_mask);
10583 + gpio->initialized = 0;
10584 + } else {
10585 + if (gpio->port < 0 || !gpio->pin_mask)
10586 + return -ENODEV;
10587 + }
10588 +
10589 + /* Disallow any updates to gpio_id or pin_mask */
10590 + spin_lock(&gpio->lock);
10591 + gpio->enabled = enabled;
10592 + spin_unlock(&gpio->lock);
10593 +
10594 + if (!enabled)
10595 + return count;
10596 +
10597 + /* Now, try to allocate the pins */
10598 + ret = at32_select_gpio_pins(gpio->port, gpio->pin_mask, gpio->oe_mask);
10599 + if (ret)
10600 + goto err_alloc_pins;
10601 +
10602 + gpio->initialized = 1;
10603 +
10604 + cdev_init(&gpio->char_dev, &gpio_dev_fops);
10605 + gpio->char_dev.owner = THIS_MODULE;
10606 + ret = cdev_add(&gpio->char_dev, MKDEV(MAJOR(gpio_devt), gpio->id), 1);
10607 + if (ret < 0)
10608 + goto err_cdev_add;
10609 + gpio->gpio_dev = class_device_create(gpio_dev_class, NULL,
10610 + MKDEV(MAJOR(gpio_devt), gpio->id),
10611 + NULL,
10612 + "gpio%d", gpio->id);
10613 + if (IS_ERR(gpio->gpio_dev)) {
10614 + printk(KERN_ERR "failed to create gpio%d\n", gpio->id);
10615 + ret = PTR_ERR(gpio->gpio_dev);
10616 + goto err_class_dev;
10617 + }
10618 +
10619 + printk(KERN_INFO "created gpio%d (port%d/0x%08x) as (%d:%d)\n",
10620 + gpio->id, gpio->port, gpio->pin_mask,
10621 + MAJOR(gpio->gpio_dev->devt), MINOR(gpio->gpio_dev->devt));
10622 +
10623 + return 0;
10624 +
10625 +err_class_dev:
10626 + cdev_del(&gpio->char_dev);
10627 +err_cdev_add:
10628 + at32_deselect_pins(gpio->port, gpio->pin_mask);
10629 + gpio->initialized = 0;
10630 +err_alloc_pins:
10631 + spin_lock(&gpio->lock);
10632 + gpio->enabled = 0;
10633 + spin_unlock(&gpio->lock);
10634 +
10635 + return ret;
10636 +}
10637 +
10638 +static struct gpio_attribute gpio_item_attr_gpio_id = {
10639 + .attr = {
10640 + .ca_owner = THIS_MODULE,
10641 + .ca_name = "gpio_id",
10642 + .ca_mode = S_IRUGO | S_IWUSR,
10643 + },
10644 + .show = gpio_show_gpio_id,
10645 + .store = gpio_store_gpio_id,
10646 +};
10647 +static struct gpio_attribute gpio_item_attr_pin_mask = {
10648 + .attr = {
10649 + .ca_owner = THIS_MODULE,
10650 + .ca_name = "pin_mask",
10651 + .ca_mode = S_IRUGO | S_IWUSR,
10652 + },
10653 + .show = gpio_show_pin_mask,
10654 + .store = gpio_store_pin_mask,
10655 +};
10656 +static struct gpio_attribute gpio_item_attr_oe_mask = {
10657 + .attr = {
10658 + .ca_owner = THIS_MODULE,
10659 + .ca_name = "oe_mask",
10660 + .ca_mode = S_IRUGO | S_IWUSR,
10661 + },
10662 + .show = gpio_show_oe_mask,
10663 + .store = gpio_store_oe_mask,
10664 +};
10665 +static struct gpio_attribute gpio_item_attr_enabled = {
10666 + .attr = {
10667 + .ca_owner = THIS_MODULE,
10668 + .ca_name = "enabled",
10669 + .ca_mode = S_IRUGO | S_IWUSR,
10670 + },
10671 + .show = gpio_show_enabled,
10672 + .store = gpio_store_enabled,
10673 +};
10674 +
10675 +static struct configfs_attribute *gpio_item_attrs[] = {
10676 + &gpio_item_attr_gpio_id.attr,
10677 + &gpio_item_attr_pin_mask.attr,
10678 + &gpio_item_attr_oe_mask.attr,
10679 + &gpio_item_attr_enabled.attr,
10680 + NULL,
10681 +};
10682 +
10683 +static ssize_t gpio_show_attr(struct config_item *item,
10684 + struct configfs_attribute *attr,
10685 + char *page)
10686 +{
10687 + struct gpio_item *gpio_item = to_gpio_item(item);
10688 + struct gpio_attribute *gpio_attr
10689 + = container_of(attr, struct gpio_attribute, attr);
10690 + ssize_t ret = 0;
10691 +
10692 + if (gpio_attr->show)
10693 + ret = gpio_attr->show(gpio_item, page);
10694 + return ret;
10695 +}
10696 +
10697 +static ssize_t gpio_store_attr(struct config_item *item,
10698 + struct configfs_attribute *attr,
10699 + const char *page, size_t count)
10700 +{
10701 + struct gpio_item *gpio_item = to_gpio_item(item);
10702 + struct gpio_attribute *gpio_attr
10703 + = container_of(attr, struct gpio_attribute, attr);
10704 + ssize_t ret = -EINVAL;
10705 +
10706 + if (gpio_attr->store)
10707 + ret = gpio_attr->store(gpio_item, page, count);
10708 + return ret;
10709 +}
10710 +
10711 +static void gpio_release(struct config_item *item)
10712 +{
10713 + kfree(to_gpio_item(item));
10714 +}
10715 +
10716 +static struct configfs_item_operations gpio_item_ops = {
10717 + .release = gpio_release,
10718 + .show_attribute = gpio_show_attr,
10719 + .store_attribute = gpio_store_attr,
10720 +};
10721 +
10722 +static struct config_item_type gpio_item_type = {
10723 + .ct_item_ops = &gpio_item_ops,
10724 + .ct_attrs = gpio_item_attrs,
10725 + .ct_owner = THIS_MODULE,
10726 +};
10727 +
10728 +static struct config_item *gpio_make_item(struct config_group *group,
10729 + const char *name)
10730 +{
10731 + static int next_id;
10732 + struct gpio_item *gpio;
10733 +
10734 + if (next_id >= GPIO_DEV_MAX)
10735 + return NULL;
10736 +
10737 + gpio = kzalloc(sizeof(struct gpio_item), GFP_KERNEL);
10738 + if (!gpio)
10739 + return NULL;
10740 +
10741 + gpio->id = next_id++;
10742 + config_item_init_type_name(&gpio->item, name, &gpio_item_type);
10743 + spin_lock_init(&gpio->lock);
10744 + init_waitqueue_head(&gpio->change_wq);
10745 +
10746 + return &gpio->item;
10747 +}
10748 +
10749 +static void gpio_drop_item(struct config_group *group,
10750 + struct config_item *item)
10751 +{
10752 + struct gpio_item *gpio = to_gpio_item(item);
10753 +
10754 + spin_lock(&gpio->lock);
10755 + if (gpio->enabled) {
10756 + class_device_unregister(gpio->gpio_dev);
10757 + cdev_del(&gpio->char_dev);
10758 + }
10759 +
10760 + if (gpio->initialized) {
10761 + at32_deselect_pins(gpio->port, gpio->pin_mask);
10762 + gpio->initialized = 0;
10763 + gpio->enabled = 0;
10764 + }
10765 + spin_unlock(&gpio->lock);
10766 +}
10767 +
10768 +static struct configfs_group_operations gpio_group_ops = {
10769 + .make_item = gpio_make_item,
10770 + .drop_item = gpio_drop_item,
10771 +};
10772 +
10773 +static struct config_item_type gpio_group_type = {
10774 + .ct_group_ops = &gpio_group_ops,
10775 + .ct_owner = THIS_MODULE,
10776 +};
10777 +
10778 +static struct configfs_subsystem gpio_subsys = {
10779 + .su_group = {
10780 + .cg_item = {
10781 + .ci_namebuf = "gpio",
10782 + .ci_type = &gpio_group_type,
10783 + },
10784 + },
10785 +};
10786 +
10787 +static int __init gpio_dev_init(void)
10788 +{
10789 + int err;
10790 +
10791 + gpio_dev_class = class_create(THIS_MODULE, "gpio-dev");
10792 + if (IS_ERR(gpio_dev_class)) {
10793 + err = PTR_ERR(gpio_dev_class);
10794 + goto err_class_create;
10795 + }
10796 +
10797 + err = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpio");
10798 + if (err < 0)
10799 + goto err_alloc_chrdev;
10800 +
10801 + /* Configfs initialization */
10802 + config_group_init(&gpio_subsys.su_group);
10803 + mutex_init(&gpio_subsys.su_mutex);
10804 + err = configfs_register_subsystem(&gpio_subsys);
10805 + if (err)
10806 + goto err_register_subsys;
10807 +
10808 + return 0;
10809 +
10810 +err_register_subsys:
10811 + unregister_chrdev_region(gpio_devt, GPIO_DEV_MAX);
10812 +err_alloc_chrdev:
10813 + class_destroy(gpio_dev_class);
10814 +err_class_create:
10815 + printk(KERN_WARNING "Failed to initialize gpio /dev interface\n");
10816 + return err;
10817 +}
10818 +late_initcall(gpio_dev_init);
10819 diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c
10820 index d61a02d..c978c36 100644
10821 --- a/arch/avr32/mach-at32ap/pio.c
10822 +++ b/arch/avr32/mach-at32ap/pio.c
10823 @@ -162,6 +162,82 @@ fail:
10824 dump_stack();
10825 }
10826
10827 +#ifdef CONFIG_GPIO_DEV
10828 +
10829 +/* Gang allocators and accessors; used by the GPIO /dev driver */
10830 +int at32_gpio_port_is_valid(unsigned int port)
10831 +{
10832 + return port < MAX_NR_PIO_DEVICES && pio_dev[port].regs != NULL;
10833 +}
10834 +
10835 +int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask)
10836 +{
10837 + struct pio_device *pio;
10838 + u32 old, new;
10839 +
10840 + pio = &pio_dev[port];
10841 + BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs || (oe_mask & ~pins));
10842 +
10843 + /* Try to allocate the pins */
10844 + do {
10845 + old = pio->pinmux_mask;
10846 + if (old & pins)
10847 + return -EBUSY;
10848 +
10849 + new = old | pins;
10850 + } while (cmpxchg(&pio->pinmux_mask, old, new) != old);
10851 +
10852 + /* That went well, now configure the port */
10853 + pio_writel(pio, OER, oe_mask);
10854 + pio_writel(pio, PER, pins);
10855 +
10856 + return 0;
10857 +}
10858 +
10859 +void at32_deselect_pins(unsigned int port, u32 pins)
10860 +{
10861 + struct pio_device *pio;
10862 + u32 old, new;
10863 +
10864 + pio = &pio_dev[port];
10865 + BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
10866 +
10867 + /* Return to a "safe" mux configuration */
10868 + pio_writel(pio, PUER, pins);
10869 + pio_writel(pio, ODR, pins);
10870 +
10871 + /* Deallocate the pins */
10872 + do {
10873 + old = pio->pinmux_mask;
10874 + new = old & ~pins;
10875 + } while (cmpxchg(&pio->pinmux_mask, old, new) != old);
10876 +}
10877 +
10878 +u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins)
10879 +{
10880 + struct pio_device *pio;
10881 +
10882 + pio = &pio_dev[port];
10883 + BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
10884 +
10885 + return pio_readl(pio, PDSR) & pins;
10886 +}
10887 +
10888 +void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask)
10889 +{
10890 + struct pio_device *pio;
10891 +
10892 + pio = &pio_dev[port];
10893 + BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
10894 +
10895 + /* No atomic updates for now... */
10896 + pio_writel(pio, CODR, ~value & mask);
10897 + pio_writel(pio, SODR, value & mask);
10898 +}
10899 +
10900 +#endif /* CONFIG_GPIO_DEV */
10901 +
10902 +
10903 /*--------------------------------------------------------------------------*/
10904
10905 /* GPIO API */
10906 diff --git a/arch/avr32/mm/dma-coherent.c b/arch/avr32/mm/dma-coherent.c
10907 index 177fea8..6d8c794 100644
10908 --- a/arch/avr32/mm/dma-coherent.c
10909 +++ b/arch/avr32/mm/dma-coherent.c
10910 @@ -41,6 +41,13 @@ static struct page *__dma_alloc(struct device *dev, size_t size,
10911 struct page *page, *free, *end;
10912 int order;
10913
10914 + /* Following is a work-around (a.k.a. hack) to prevent pages
10915 + * with __GFP_COMP being passed to split_page() which cannot
10916 + * handle them. The real problem is that this flag probably
10917 + * should be 0 on AVR32 as it is not supported on this
10918 + * platform--see CONFIG_HUGETLB_PAGE. */
10919 + gfp &= ~(__GFP_COMP);
10920 +
10921 size = PAGE_ALIGN(size);
10922 order = get_order(size);
10923
10924 diff --git a/arch/avr32/mm/tlb.c b/arch/avr32/mm/tlb.c
10925 index 5667201..b835257 100644
10926 --- a/arch/avr32/mm/tlb.c
10927 +++ b/arch/avr32/mm/tlb.c
10928 @@ -348,7 +348,7 @@ static int tlb_show(struct seq_file *tlb, void *v)
10929 return 0;
10930 }
10931
10932 -static struct seq_operations tlb_ops = {
10933 +static const struct seq_operations tlb_ops = {
10934 .start = tlb_start,
10935 .next = tlb_next,
10936 .stop = tlb_stop,
10937 diff --git a/arch/avr32/oprofile/Makefile b/arch/avr32/oprofile/Makefile
10938 new file mode 100644
10939 index 0000000..1fe81c3
10940 --- /dev/null
10941 +++ b/arch/avr32/oprofile/Makefile
10942 @@ -0,0 +1,8 @@
10943 +obj-$(CONFIG_OPROFILE) += oprofile.o
10944 +
10945 +oprofile-y := $(addprefix ../../../drivers/oprofile/, \
10946 + oprof.o cpu_buffer.o buffer_sync.o \
10947 + event_buffer.o oprofile_files.o \
10948 + oprofilefs.o oprofile_stats.o \
10949 + timer_int.o)
10950 +oprofile-y += op_model_avr32.o
10951 diff --git a/arch/avr32/oprofile/op_model_avr32.c b/arch/avr32/oprofile/op_model_avr32.c
10952 new file mode 100644
10953 index 0000000..e2f876b
10954 --- /dev/null
10955 +++ b/arch/avr32/oprofile/op_model_avr32.c
10956 @@ -0,0 +1,235 @@
10957 +/*
10958 + * AVR32 Performance Counter Driver
10959 + *
10960 + * Copyright (C) 2005-2007 Atmel Corporation
10961 + *
10962 + * This program is free software; you can redistribute it and/or modify
10963 + * it under the terms of the GNU General Public License version 2 as
10964 + * published by the Free Software Foundation.
10965 + *
10966 + * Author: Ronny Pedersen
10967 + */
10968 +#include <linux/errno.h>
10969 +#include <linux/interrupt.h>
10970 +#include <linux/irq.h>
10971 +#include <linux/oprofile.h>
10972 +#include <linux/sched.h>
10973 +#include <linux/types.h>
10974 +
10975 +#include <asm/intc.h>
10976 +#include <asm/sysreg.h>
10977 +#include <asm/system.h>
10978 +
10979 +#define AVR32_PERFCTR_IRQ_GROUP 0
10980 +#define AVR32_PERFCTR_IRQ_LINE 1
10981 +
10982 +enum { PCCNT, PCNT0, PCNT1, NR_counter };
10983 +
10984 +struct avr32_perf_counter {
10985 + unsigned long enabled;
10986 + unsigned long event;
10987 + unsigned long count;
10988 + unsigned long unit_mask;
10989 + unsigned long kernel;
10990 + unsigned long user;
10991 +
10992 + u32 ie_mask;
10993 + u32 flag_mask;
10994 +};
10995 +
10996 +static struct avr32_perf_counter counter[NR_counter] = {
10997 + {
10998 + .ie_mask = SYSREG_BIT(IEC),
10999 + .flag_mask = SYSREG_BIT(FC),
11000 + }, {
11001 + .ie_mask = SYSREG_BIT(IE0),
11002 + .flag_mask = SYSREG_BIT(F0),
11003 + }, {
11004 + .ie_mask = SYSREG_BIT(IE1),
11005 + .flag_mask = SYSREG_BIT(F1),
11006 + },
11007 +};
11008 +
11009 +static void avr32_perf_counter_reset(void)
11010 +{
11011 + /* Reset all counter and disable/clear all interrupts */
11012 + sysreg_write(PCCR, (SYSREG_BIT(PCCR_R)
11013 + | SYSREG_BIT(PCCR_C)
11014 + | SYSREG_BIT(FC)
11015 + | SYSREG_BIT(F0)
11016 + | SYSREG_BIT(F1)));
11017 +}
11018 +
11019 +static irqreturn_t avr32_perf_counter_interrupt(int irq, void *dev_id)
11020 +{
11021 + struct avr32_perf_counter *ctr = dev_id;
11022 + struct pt_regs *regs;
11023 + u32 pccr;
11024 +
11025 + if (likely(!(intc_get_pending(AVR32_PERFCTR_IRQ_GROUP)
11026 + & (1 << AVR32_PERFCTR_IRQ_LINE))))
11027 + return IRQ_NONE;
11028 +
11029 + regs = get_irq_regs();
11030 + pccr = sysreg_read(PCCR);
11031 +
11032 + /* Clear the interrupt flags we're about to handle */
11033 + sysreg_write(PCCR, pccr);
11034 +
11035 + /* PCCNT */
11036 + if (ctr->enabled && (pccr & ctr->flag_mask)) {
11037 + sysreg_write(PCCNT, -ctr->count);
11038 + oprofile_add_sample(regs, PCCNT);
11039 + }
11040 + ctr++;
11041 + /* PCNT0 */
11042 + if (ctr->enabled && (pccr & ctr->flag_mask)) {
11043 + sysreg_write(PCNT0, -ctr->count);
11044 + oprofile_add_sample(regs, PCNT0);
11045 + }
11046 + ctr++;
11047 + /* PCNT1 */
11048 + if (ctr->enabled && (pccr & ctr->flag_mask)) {
11049 + sysreg_write(PCNT1, -ctr->count);
11050 + oprofile_add_sample(regs, PCNT1);
11051 + }
11052 +
11053 + return IRQ_HANDLED;
11054 +}
11055 +
11056 +static int avr32_perf_counter_create_files(struct super_block *sb,
11057 + struct dentry *root)
11058 +{
11059 + struct dentry *dir;
11060 + unsigned int i;
11061 + char filename[4];
11062 +
11063 + for (i = 0; i < NR_counter; i++) {
11064 + snprintf(filename, sizeof(filename), "%u", i);
11065 + dir = oprofilefs_mkdir(sb, root, filename);
11066 +
11067 + oprofilefs_create_ulong(sb, dir, "enabled",
11068 + &counter[i].enabled);
11069 + oprofilefs_create_ulong(sb, dir, "event",
11070 + &counter[i].event);
11071 + oprofilefs_create_ulong(sb, dir, "count",
11072 + &counter[i].count);
11073 +
11074 + /* Dummy entries */
11075 + oprofilefs_create_ulong(sb, dir, "kernel",
11076 + &counter[i].kernel);
11077 + oprofilefs_create_ulong(sb, dir, "user",
11078 + &counter[i].user);
11079 + oprofilefs_create_ulong(sb, dir, "unit_mask",
11080 + &counter[i].unit_mask);
11081 + }
11082 +
11083 + return 0;
11084 +}
11085 +
11086 +static int avr32_perf_counter_setup(void)
11087 +{
11088 + struct avr32_perf_counter *ctr;
11089 + u32 pccr;
11090 + int ret;
11091 + int i;
11092 +
11093 + pr_debug("avr32_perf_counter_setup\n");
11094 +
11095 + if (sysreg_read(PCCR) & SYSREG_BIT(PCCR_E)) {
11096 + printk(KERN_ERR
11097 + "oprofile: setup: perf counter already enabled\n");
11098 + return -EBUSY;
11099 + }
11100 +
11101 + ret = request_irq(AVR32_PERFCTR_IRQ_GROUP,
11102 + avr32_perf_counter_interrupt, IRQF_SHARED,
11103 + "oprofile", counter);
11104 + if (ret)
11105 + return ret;
11106 +
11107 + avr32_perf_counter_reset();
11108 +
11109 + pccr = 0;
11110 + for (i = PCCNT; i < NR_counter; i++) {
11111 + ctr = &counter[i];
11112 + if (!ctr->enabled)
11113 + continue;
11114 +
11115 + pr_debug("enabling counter %d...\n", i);
11116 +
11117 + pccr |= ctr->ie_mask;
11118 +
11119 + switch (i) {
11120 + case PCCNT:
11121 + /* PCCNT always counts cycles, so no events */
11122 + sysreg_write(PCCNT, -ctr->count);
11123 + break;
11124 + case PCNT0:
11125 + pccr |= SYSREG_BF(CONF0, ctr->event);
11126 + sysreg_write(PCNT0, -ctr->count);
11127 + break;
11128 + case PCNT1:
11129 + pccr |= SYSREG_BF(CONF1, ctr->event);
11130 + sysreg_write(PCNT1, -ctr->count);
11131 + break;
11132 + }
11133 + }
11134 +
11135 + pr_debug("oprofile: writing 0x%x to PCCR...\n", pccr);
11136 +
11137 + sysreg_write(PCCR, pccr);
11138 +
11139 + return 0;
11140 +}
11141 +
11142 +static void avr32_perf_counter_shutdown(void)
11143 +{
11144 + pr_debug("avr32_perf_counter_shutdown\n");
11145 +
11146 + avr32_perf_counter_reset();
11147 + free_irq(AVR32_PERFCTR_IRQ_GROUP, counter);
11148 +}
11149 +
11150 +static int avr32_perf_counter_start(void)
11151 +{
11152 + pr_debug("avr32_perf_counter_start\n");
11153 +
11154 + sysreg_write(PCCR, sysreg_read(PCCR) | SYSREG_BIT(PCCR_E));
11155 +
11156 + return 0;
11157 +}
11158 +
11159 +static void avr32_perf_counter_stop(void)
11160 +{
11161 + pr_debug("avr32_perf_counter_stop\n");
11162 +
11163 + sysreg_write(PCCR, sysreg_read(PCCR) & ~SYSREG_BIT(PCCR_E));
11164 +}
11165 +
11166 +static struct oprofile_operations avr32_perf_counter_ops __initdata = {
11167 + .create_files = avr32_perf_counter_create_files,
11168 + .setup = avr32_perf_counter_setup,
11169 + .shutdown = avr32_perf_counter_shutdown,
11170 + .start = avr32_perf_counter_start,
11171 + .stop = avr32_perf_counter_stop,
11172 + .cpu_type = "avr32",
11173 +};
11174 +
11175 +int __init oprofile_arch_init(struct oprofile_operations *ops)
11176 +{
11177 + if (!(current_cpu_data.features & AVR32_FEATURE_PCTR))
11178 + return -ENODEV;
11179 +
11180 + memcpy(ops, &avr32_perf_counter_ops,
11181 + sizeof(struct oprofile_operations));
11182 +
11183 + printk(KERN_INFO "oprofile: using AVR32 performance monitoring.\n");
11184 +
11185 + return 0;
11186 +}
11187 +
11188 +void oprofile_arch_exit(void)
11189 +{
11190 +
11191 +}
11192 diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
11193 index c466c6c..0bb2052 100644
11194 --- a/drivers/i2c/busses/Kconfig
11195 +++ b/drivers/i2c/busses/Kconfig
11196 @@ -88,6 +88,14 @@ config I2C_AT91
11197 to support combined I2C messages. Use the i2c-gpio driver
11198 unless your system can cope with those limitations.
11199
11200 +config I2C_ATMELTWI
11201 + tristate "Atmel Two-Wire Interface (TWI)"
11202 + depends on I2C && (ARCH_AT91 || PLATFORM_AT32AP)
11203 + help
11204 + Atmel on-chip TWI controller. Say Y if you have an AT32 or
11205 + AT91-based device and want to use its built-in TWI
11206 + functionality.
11207 +
11208 config I2C_AU1550
11209 tristate "Au1550/Au1200 SMBus interface"
11210 depends on SOC_AU1550 || SOC_AU1200
11211 diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
11212 index 81d43c2..af3f350 100644
11213 --- a/drivers/i2c/busses/Makefile
11214 +++ b/drivers/i2c/busses/Makefile
11215 @@ -53,6 +53,7 @@ obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o
11216 obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o
11217 obj-$(CONFIG_SCx200_ACB) += scx200_acb.o
11218 obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o
11219 +obj-$(CONFIG_I2C_ATMELTWI) += i2c-atmeltwi.o
11220
11221 ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
11222 EXTRA_CFLAGS += -DDEBUG
11223 diff --git a/drivers/i2c/busses/i2c-atmeltwi.c b/drivers/i2c/busses/i2c-atmeltwi.c
11224 new file mode 100644
11225 index 0000000..70c719a
11226 --- /dev/null
11227 +++ b/drivers/i2c/busses/i2c-atmeltwi.c
11228 @@ -0,0 +1,436 @@
11229 +/*
11230 + * i2c Support for Atmel's Two-Wire Interface (TWI)
11231 + *
11232 + * Based on the work of Copyright (C) 2004 Rick Bronson
11233 + * Converted to 2.6 by Andrew Victor <andrew at sanpeople.com>
11234 + * Ported to AVR32 and heavily modified by Espen Krangnes
11235 + * <ekrangnes at atmel.com>
11236 + *
11237 + * Copyright (C) 2006 Atmel Corporation
11238 + *
11239 + * Borrowed heavily from the original work by:
11240 + * Copyright (C) 2000 Philip Edelbrock <phil at stimpy.netroedge.com>
11241 + *
11242 + * Partialy rewriten by Karel Hojdar <cmkaho at seznam.cz>
11243 + * bugs removed, interrupt routine markedly rewritten
11244 + *
11245 + * This program is free software; you can redistribute it and/or modify
11246 + * it under the terms of the GNU General Public License as published by
11247 + * the Free Software Foundation; either version 2 of the License, or
11248 + * (at your option) any later version.
11249 + */
11250 +#undef VERBOSE_DEBUG
11251 +
11252 +#include <linux/module.h>
11253 +#include <linux/slab.h>
11254 +#include <linux/i2c.h>
11255 +#include <linux/init.h>
11256 +#include <linux/clk.h>
11257 +#include <linux/err.h>
11258 +#include <linux/interrupt.h>
11259 +#include <linux/platform_device.h>
11260 +#include <linux/completion.h>
11261 +#include <linux/io.h>
11262 +
11263 +#include "i2c-atmeltwi.h"
11264 +
11265 +static unsigned int baudrate = 100 * 1000;
11266 +module_param(baudrate, uint, S_IRUGO);
11267 +MODULE_PARM_DESC(baudrate, "The TWI baudrate");
11268 +
11269 +
11270 +struct atmel_twi {
11271 + void __iomem *regs;
11272 + struct i2c_adapter adapter;
11273 + struct clk *pclk;
11274 + struct completion comp;
11275 + u32 mask;
11276 + u8 *buf;
11277 + u16 len;
11278 + u16 acks_left;
11279 + int status;
11280 + unsigned int irq;
11281 +
11282 +};
11283 +#define to_atmel_twi(adap) container_of(adap, struct atmel_twi, adapter)
11284 +
11285 +/*
11286 + * (Re)Initialize the TWI hardware registers.
11287 + */
11288 +static int twi_hwinit(struct atmel_twi *twi)
11289 +{
11290 + unsigned long cdiv, ckdiv = 0;
11291 +
11292 + /* REVISIT: wait till SCL is high before resetting; otherwise,
11293 + * some versions will wedge forever.
11294 + */
11295 +
11296 + twi_writel(twi, IDR, ~0UL);
11297 + twi_writel(twi, CR, TWI_BIT(SWRST)); /*Reset peripheral*/
11298 + twi_readl(twi, SR);
11299 +
11300 + cdiv = (clk_get_rate(twi->pclk) / (2 * baudrate)) - 4;
11301 +
11302 + while (cdiv > 255) {
11303 + ckdiv++;
11304 + cdiv = cdiv >> 1;
11305 + }
11306 +
11307 + /* REVISIT: there are various errata to consider re CDIV and CHDIV
11308 + * here, at least on at91 parts.
11309 + */
11310 +
11311 + if (ckdiv > 7)
11312 + return -EINVAL;
11313 + else
11314 + twi_writel(twi, CWGR, TWI_BF(CKDIV, ckdiv)
11315 + | TWI_BF(CHDIV, cdiv)
11316 + | TWI_BF(CLDIV, cdiv));
11317 + return 0;
11318 +}
11319 +
11320 +/*
11321 + * Waits for the i2c status register to set the specified bitmask
11322 + * Returns 0 if timed out ... ~100ms is much longer than the SMBus
11323 + * limit, but I2C has no limit at all.
11324 + */
11325 +static int twi_complete(struct atmel_twi *twi, u32 mask)
11326 +{
11327 + int timeout = msecs_to_jiffies(100);
11328 +
11329 + mask |= TWI_BIT(TXCOMP);
11330 + twi->mask = mask | TWI_BIT(NACK) | TWI_BIT(OVRE);
11331 + init_completion(&twi->comp);
11332 +
11333 + twi_writel(twi, IER, mask);
11334 +
11335 + if (!wait_for_completion_timeout(&twi->comp, timeout)) {
11336 + /* RESET TWI interface */
11337 + twi_writel(twi, CR, TWI_BIT(SWRST));
11338 +
11339 + /* Reinitialize TWI */
11340 + twi_hwinit(twi);
11341 +
11342 + return -ETIMEDOUT;
11343 + }
11344 + return 0;
11345 +}
11346 +
11347 +/*
11348 + * Generic i2c master transfer entrypoint.
11349 + */
11350 +static int twi_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num)
11351 +{
11352 + struct atmel_twi *twi = to_atmel_twi(adap);
11353 + int i;
11354 +
11355 + dev_dbg(&adap->dev, "twi_xfer: processing %d messages:\n", num);
11356 +
11357 + twi->status = 0;
11358 + for (i = 0; i < num; i++, pmsg++) {
11359 + twi->len = pmsg->len;
11360 + twi->buf = pmsg->buf;
11361 + twi->acks_left = pmsg->len;
11362 + twi_writel(twi, MMR, TWI_BF(DADR, pmsg->addr) |
11363 + (pmsg->flags & I2C_M_RD ? TWI_BIT(MREAD) : 0));
11364 + twi_writel(twi, IADR, TWI_BF(IADR, pmsg->addr));
11365 +
11366 + dev_dbg(&adap->dev,
11367 + "#%d: %s %d byte%s %s dev 0x%02x\n",
11368 + i,
11369 + pmsg->flags & I2C_M_RD ? "reading" : "writing",
11370 + pmsg->len,
11371 + pmsg->len > 1 ? "s" : "",
11372 + pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
11373 +
11374 + /* enable */
11375 + twi_writel(twi, CR, TWI_BIT(MSEN));
11376 +
11377 + if (pmsg->flags & I2C_M_RD) {
11378 + /* cleanup after previous RX overruns */
11379 + while (twi_readl(twi, SR) & TWI_BIT(RXRDY))
11380 + twi_readl(twi, RHR);
11381 +
11382 + if (twi->len == 1)
11383 + twi_writel(twi, CR,
11384 + TWI_BIT(START) | TWI_BIT(STOP));
11385 + else
11386 + twi_writel(twi, CR, TWI_BIT(START));
11387 +
11388 + if (twi_complete(twi, TWI_BIT(RXRDY)) == -ETIMEDOUT) {
11389 + dev_dbg(&adap->dev, "RX[%d] timeout. "
11390 + "Stopped with %d bytes left\n",
11391 + i, twi->acks_left);
11392 + return -ETIMEDOUT;
11393 + }
11394 + } else {
11395 + twi_writel(twi, THR, twi->buf[0]);
11396 + twi->acks_left--;
11397 + /* REVISIT: some chips don't start automagically:
11398 + * twi_writel(twi, CR, TWI_BIT(START));
11399 + */
11400 + if (twi_complete(twi, TWI_BIT(TXRDY)) == -ETIMEDOUT) {
11401 + dev_dbg(&adap->dev, "TX[%d] timeout. "
11402 + "Stopped with %d bytes left\n",
11403 + i, twi->acks_left);
11404 + return -ETIMEDOUT;
11405 + }
11406 + /* REVISIT: an erratum workaround may be needed here;
11407 + * see sam9261 "STOP not generated" (START either).
11408 + */
11409 + }
11410 +
11411 + /* Disable TWI interface */
11412 + twi_writel(twi, CR, TWI_BIT(MSDIS));
11413 +
11414 + if (twi->status)
11415 + return twi->status;
11416 +
11417 + /* WARNING: This driver lies about properly supporting
11418 + * repeated start, or it would *ALWAYS* return here. It
11419 + * has issued a STOP. Continuing is a false claim -- that
11420 + * a second (or third, etc.) message is part of the same
11421 + * "combined" (no STOPs between parts) message.
11422 + */
11423 +
11424 + } /* end cur msg */
11425 +
11426 + return i;
11427 +}
11428 +
11429 +
11430 +static irqreturn_t twi_interrupt(int irq, void *dev_id)
11431 +{
11432 + struct atmel_twi *twi = dev_id;
11433 + int status = twi_readl(twi, SR);
11434 +
11435 + /* Save state for later debug prints */
11436 + int old_status = status;
11437 +
11438 + if (twi->mask & status) {
11439 +
11440 + status &= twi->mask;
11441 +
11442 + if (status & TWI_BIT(RXRDY)) {
11443 + if ((status & TWI_BIT(OVRE)) && twi->acks_left) {
11444 + /* Note weakness in fault reporting model:
11445 + * we can't say "the first N of these data
11446 + * bytes are valid".
11447 + */
11448 + dev_err(&twi->adapter.dev,
11449 + "OVERRUN RX! %04x, lost %d\n",
11450 + old_status, twi->acks_left);
11451 + twi->acks_left = 0;
11452 + twi_writel(twi, CR, TWI_BIT(STOP));
11453 + twi->status = -EOVERFLOW;
11454 + } else if (twi->acks_left > 0) {
11455 + twi->buf[twi->len - twi->acks_left] =
11456 + twi_readl(twi, RHR);
11457 + twi->acks_left--;
11458 + }
11459 + if (status & TWI_BIT(TXCOMP))
11460 + goto done;
11461 + if (twi->acks_left == 1)
11462 + twi_writel(twi, CR, TWI_BIT(STOP));
11463 +
11464 + } else if (status & (TWI_BIT(NACK) | TWI_BIT(TXCOMP))) {
11465 + goto done;
11466 +
11467 + } else if (status & TWI_BIT(TXRDY)) {
11468 + if (twi->acks_left > 0) {
11469 + twi->acks_left--;
11470 + twi_writel(twi, THR,
11471 + twi->buf[twi->len - twi->acks_left]);
11472 + } else
11473 + twi_writel(twi, CR, TWI_BIT(STOP));
11474 + }
11475 +
11476 + if (twi->acks_left == 0)
11477 + twi_writel(twi, IDR, ~TWI_BIT(TXCOMP));
11478 + }
11479 +
11480 + /* enabling this message helps trigger overruns/underruns ... */
11481 + dev_vdbg(&twi->adapter.dev,
11482 + "ISR: SR 0x%04X, mask 0x%04X, acks %i\n",
11483 + old_status,
11484 + twi->acks_left ? twi->mask : TWI_BIT(TXCOMP),
11485 + twi->acks_left);
11486 +
11487 + return IRQ_HANDLED;
11488 +
11489 +done:
11490 + /* Note weak fault reporting model: we can't report how many
11491 + * bytes we sent before the NAK, or let upper layers choose
11492 + * whether to continue. The I2C stack doesn't allow that...
11493 + */
11494 + if (status & TWI_BIT(NACK)) {
11495 + dev_dbg(&twi->adapter.dev, "NACK received! %d to go\n",
11496 + twi->acks_left);
11497 + twi->status = -EPIPE;
11498 +
11499 + /* TX underrun morphs automagically into a premature STOP;
11500 + * we'll probably observe UVRE even when it's not documented.
11501 + */
11502 + } else if (twi->acks_left && (twi->mask & TWI_BIT(TXRDY))) {
11503 + dev_err(&twi->adapter.dev, "UNDERRUN TX! %04x, %d to go\n",
11504 + old_status, twi->acks_left);
11505 + twi->status = -ENOSR;
11506 + }
11507 +
11508 + twi_writel(twi, IDR, ~0UL);
11509 + complete(&twi->comp);
11510 +
11511 + dev_dbg(&twi->adapter.dev, "ISR: SR 0x%04X, acks %i --> %d\n",
11512 + old_status, twi->acks_left, twi->status);
11513 +
11514 + return IRQ_HANDLED;
11515 +}
11516 +
11517 +
11518 +/*
11519 + * Return list of supported functionality.
11520 + *
11521 + * NOTE: see warning above about repeated starts; this driver is falsely
11522 + * claiming to support "combined" transfers. The mid-message STOPs mean
11523 + * some slaves will never work with this driver. (Use i2c-gpio...)
11524 + */
11525 +static u32 twi_func(struct i2c_adapter *adapter)
11526 +{
11527 + return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL)
11528 + & ~I2C_FUNC_SMBUS_QUICK;
11529 +}
11530 +
11531 +static struct i2c_algorithm twi_algorithm = {
11532 + .master_xfer = twi_xfer,
11533 + .functionality = twi_func,
11534 +};
11535 +
11536 +/*
11537 + * Main initialization routine.
11538 + */
11539 +static int __init twi_probe(struct platform_device *pdev)
11540 +{
11541 + struct atmel_twi *twi;
11542 + struct resource *regs;
11543 + struct clk *pclk;
11544 + struct i2c_adapter *adapter;
11545 + int rc, irq;
11546 +
11547 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
11548 + if (!regs)
11549 + return -ENXIO;
11550 +
11551 + pclk = clk_get(&pdev->dev, "twi_pclk");
11552 + if (IS_ERR(pclk))
11553 + return PTR_ERR(pclk);
11554 + clk_enable(pclk);
11555 +
11556 + rc = -ENOMEM;
11557 + twi = kzalloc(sizeof(struct atmel_twi), GFP_KERNEL);
11558 + if (!twi) {
11559 + dev_dbg(&pdev->dev, "can't allocate interface!\n");
11560 + goto err_alloc_twi;
11561 + }
11562 +
11563 + twi->pclk = pclk;
11564 + twi->regs = ioremap(regs->start, regs->end - regs->start + 1);
11565 + if (!twi->regs)
11566 + goto err_ioremap;
11567 +
11568 + irq = platform_get_irq(pdev, 0);
11569 + rc = request_irq(irq, twi_interrupt, 0, "twi", twi);
11570 + if (rc) {
11571 + dev_dbg(&pdev->dev, "can't bind irq!\n");
11572 + goto err_irq;
11573 + }
11574 + twi->irq = irq;
11575 +
11576 + rc = twi_hwinit(twi);
11577 + if (rc) {
11578 + dev_err(&pdev->dev, "Unable to set baudrate\n");
11579 + goto err_hw_init;
11580 + }
11581 +
11582 + adapter = &twi->adapter;
11583 + sprintf(adapter->name, "TWI");
11584 + adapter->algo = &twi_algorithm;
11585 + adapter->class = I2C_CLASS_ALL;
11586 + adapter->nr = pdev->id;
11587 + adapter->dev.parent = &pdev->dev;
11588 +
11589 + platform_set_drvdata(pdev, twi);
11590 +
11591 + rc = i2c_add_numbered_adapter(adapter);
11592 + if (rc) {
11593 + dev_dbg(&pdev->dev, "Adapter %s registration failed\n",
11594 + adapter->name);
11595 + goto err_register;
11596 + }
11597 +
11598 + dev_info(&pdev->dev,
11599 + "Atmel TWI/I2C adapter (baudrate %dk) at 0x%08lx.\n",
11600 + baudrate/1000, (unsigned long)regs->start);
11601 +
11602 + return 0;
11603 +
11604 +
11605 +err_register:
11606 + platform_set_drvdata(pdev, NULL);
11607 +
11608 +err_hw_init:
11609 + free_irq(irq, twi);
11610 +
11611 +err_irq:
11612 + iounmap(twi->regs);
11613 +
11614 +err_ioremap:
11615 + kfree(twi);
11616 +
11617 +err_alloc_twi:
11618 + clk_disable(pclk);
11619 + clk_put(pclk);
11620 +
11621 + return rc;
11622 +}
11623 +
11624 +static int __exit twi_remove(struct platform_device *pdev)
11625 +{
11626 + struct atmel_twi *twi = platform_get_drvdata(pdev);
11627 + int res;
11628 +
11629 + platform_set_drvdata(pdev, NULL);
11630 + res = i2c_del_adapter(&twi->adapter);
11631 + twi_writel(twi, CR, TWI_BIT(MSDIS));
11632 + iounmap(twi->regs);
11633 + clk_disable(twi->pclk);
11634 + clk_put(twi->pclk);
11635 + free_irq(twi->irq, twi);
11636 + kfree(twi);
11637 +
11638 + return res;
11639 +}
11640 +
11641 +static struct platform_driver twi_driver = {
11642 + .remove = __exit_p(twi_remove),
11643 + .driver = {
11644 + .name = "atmel_twi",
11645 + .owner = THIS_MODULE,
11646 + },
11647 +};
11648 +
11649 +static int __init atmel_twi_init(void)
11650 +{
11651 + return platform_driver_probe(&twi_driver, twi_probe);
11652 +}
11653 +
11654 +static void __exit atmel_twi_exit(void)
11655 +{
11656 + platform_driver_unregister(&twi_driver);
11657 +}
11658 +
11659 +module_init(atmel_twi_init);
11660 +module_exit(atmel_twi_exit);
11661 +
11662 +MODULE_AUTHOR("Espen Krangnes");
11663 +MODULE_DESCRIPTION("I2C driver for Atmel TWI");
11664 +MODULE_LICENSE("GPL");
11665 diff --git a/drivers/i2c/busses/i2c-atmeltwi.h b/drivers/i2c/busses/i2c-atmeltwi.h
11666 new file mode 100644
11667 index 0000000..1aca065
11668 --- /dev/null
11669 +++ b/drivers/i2c/busses/i2c-atmeltwi.h
11670 @@ -0,0 +1,117 @@
11671 +/*
11672 + * Register definitions for the Atmel Two-Wire Interface
11673 + */
11674 +
11675 +#ifndef __ATMELTWI_H__
11676 +#define __ATMELTWI_H__
11677 +
11678 +/* TWI register offsets */
11679 +#define TWI_CR 0x0000
11680 +#define TWI_MMR 0x0004
11681 +#define TWI_SMR 0x0008
11682 +#define TWI_IADR 0x000c
11683 +#define TWI_CWGR 0x0010
11684 +#define TWI_SR 0x0020
11685 +#define TWI_IER 0x0024
11686 +#define TWI_IDR 0x0028
11687 +#define TWI_IMR 0x002c
11688 +#define TWI_RHR 0x0030
11689 +#define TWI_THR 0x0034
11690 +
11691 +/* Bitfields in CR */
11692 +#define TWI_START_OFFSET 0
11693 +#define TWI_START_SIZE 1
11694 +#define TWI_STOP_OFFSET 1
11695 +#define TWI_STOP_SIZE 1
11696 +#define TWI_MSEN_OFFSET 2
11697 +#define TWI_MSEN_SIZE 1
11698 +#define TWI_MSDIS_OFFSET 3
11699 +#define TWI_MSDIS_SIZE 1
11700 +#define TWI_SVEN_OFFSET 4
11701 +#define TWI_SVEN_SIZE 1
11702 +#define TWI_SVDIS_OFFSET 5
11703 +#define TWI_SVDIS_SIZE 1
11704 +#define TWI_SWRST_OFFSET 7
11705 +#define TWI_SWRST_SIZE 1
11706 +
11707 +/* Bitfields in MMR */
11708 +#define TWI_IADRSZ_OFFSET 8
11709 +#define TWI_IADRSZ_SIZE 2
11710 +#define TWI_MREAD_OFFSET 12
11711 +#define TWI_MREAD_SIZE 1
11712 +#define TWI_DADR_OFFSET 16
11713 +#define TWI_DADR_SIZE 7
11714 +
11715 +/* Bitfields in SMR */
11716 +#define TWI_SADR_OFFSET 16
11717 +#define TWI_SADR_SIZE 7
11718 +
11719 +/* Bitfields in IADR */
11720 +#define TWI_IADR_OFFSET 0
11721 +#define TWI_IADR_SIZE 24
11722 +
11723 +/* Bitfields in CWGR */
11724 +#define TWI_CLDIV_OFFSET 0
11725 +#define TWI_CLDIV_SIZE 8
11726 +#define TWI_CHDIV_OFFSET 8
11727 +#define TWI_CHDIV_SIZE 8
11728 +#define TWI_CKDIV_OFFSET 16
11729 +#define TWI_CKDIV_SIZE 3
11730 +
11731 +/* Bitfields in SR */
11732 +#define TWI_TXCOMP_OFFSET 0
11733 +#define TWI_TXCOMP_SIZE 1
11734 +#define TWI_RXRDY_OFFSET 1
11735 +#define TWI_RXRDY_SIZE 1
11736 +#define TWI_TXRDY_OFFSET 2
11737 +#define TWI_TXRDY_SIZE 1
11738 +#define TWI_SVDIR_OFFSET 3
11739 +#define TWI_SVDIR_SIZE 1
11740 +#define TWI_SVACC_OFFSET 4
11741 +#define TWI_SVACC_SIZE 1
11742 +#define TWI_GCACC_OFFSET 5
11743 +#define TWI_GCACC_SIZE 1
11744 +#define TWI_OVRE_OFFSET 6
11745 +#define TWI_OVRE_SIZE 1
11746 +#define TWI_UNRE_OFFSET 7
11747 +#define TWI_UNRE_SIZE 1
11748 +#define TWI_NACK_OFFSET 8
11749 +#define TWI_NACK_SIZE 1
11750 +#define TWI_ARBLST_OFFSET 9
11751 +#define TWI_ARBLST_SIZE 1
11752 +
11753 +/* Bitfields in RHR */
11754 +#define TWI_RXDATA_OFFSET 0
11755 +#define TWI_RXDATA_SIZE 8
11756 +
11757 +/* Bitfields in THR */
11758 +#define TWI_TXDATA_OFFSET 0
11759 +#define TWI_TXDATA_SIZE 8
11760 +
11761 +/* Constants for IADRSZ */
11762 +#define TWI_IADRSZ_NO_ADDR 0
11763 +#define TWI_IADRSZ_ONE_BYTE 1
11764 +#define TWI_IADRSZ_TWO_BYTES 2
11765 +#define TWI_IADRSZ_THREE_BYTES 3
11766 +
11767 +/* Bit manipulation macros */
11768 +#define TWI_BIT(name) \
11769 + (1 << TWI_##name##_OFFSET)
11770 +#define TWI_BF(name, value) \
11771 + (((value) & ((1 << TWI_##name##_SIZE) - 1)) \
11772 + << TWI_##name##_OFFSET)
11773 +#define TWI_BFEXT(name, value) \
11774 + (((value) >> TWI_##name##_OFFSET) \
11775 + & ((1 << TWI_##name##_SIZE) - 1))
11776 +#define TWI_BFINS(name, value, old) \
11777 + (((old) & ~(((1 << TWI_##name##_SIZE) - 1) \
11778 + << TWI_##name##_OFFSET)) \
11779 + | TWI_BF(name, (value)))
11780 +
11781 +/* Register access macros */
11782 +#define twi_readl(port, reg) \
11783 + __raw_readl((port)->regs + TWI_##reg)
11784 +#define twi_writel(port, reg, value) \
11785 + __raw_writel((value), (port)->regs + TWI_##reg)
11786 +
11787 +#endif /* __ATMELTWI_H__ */
11788 diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
11789 index ec568fa..4e1db3b 100644
11790 --- a/drivers/leds/Kconfig
11791 +++ b/drivers/leds/Kconfig
11792 @@ -18,6 +18,13 @@ config LEDS_CLASS
11793
11794 comment "LED drivers"
11795
11796 +config LEDS_ATMEL_PWM
11797 + tristate "LED Support using Atmel PWM outputs"
11798 + depends on LEDS_CLASS && ATMEL_PWM
11799 + help
11800 + This option enables support for LEDs driven using outputs
11801 + of the dedicated PWM controller found on newer Atmel SOCs.
11802 +
11803 config LEDS_CORGI
11804 tristate "LED Support for the Sharp SL-C7x0 series"
11805 depends on LEDS_CLASS && PXA_SHARP_C7xx
11806 diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile
11807 index a60de1b..04bc850 100644
11808 --- a/drivers/leds/Makefile
11809 +++ b/drivers/leds/Makefile
11810 @@ -5,6 +5,7 @@ obj-$(CONFIG_LEDS_CLASS) += led-class.o
11811 obj-$(CONFIG_LEDS_TRIGGERS) += led-triggers.o
11812
11813 # LED Platform Drivers
11814 +obj-$(CONFIG_LEDS_ATMEL_PWM) += leds-atmel-pwm.o
11815 obj-$(CONFIG_LEDS_CORGI) += leds-corgi.o
11816 obj-$(CONFIG_LEDS_LOCOMO) += leds-locomo.o
11817 obj-$(CONFIG_LEDS_SPITZ) += leds-spitz.o
11818 diff --git a/drivers/leds/leds-atmel-pwm.c b/drivers/leds/leds-atmel-pwm.c
11819 new file mode 100644
11820 index 0000000..187031c
11821 --- /dev/null
11822 +++ b/drivers/leds/leds-atmel-pwm.c
11823 @@ -0,0 +1,155 @@
11824 +#include <linux/kernel.h>
11825 +#include <linux/platform_device.h>
11826 +#include <linux/leds.h>
11827 +#include <linux/io.h>
11828 +#include <linux/atmel_pwm.h>
11829 +
11830 +
11831 +struct pwmled {
11832 + struct led_classdev cdev;
11833 + struct pwm_channel pwmc;
11834 + struct gpio_led *desc;
11835 + u32 mult;
11836 + u8 active_low;
11837 +};
11838 +
11839 +
11840 +/*
11841 + * For simplicity, we use "brightness" as if it were a linear function
11842 + * of PWM duty cycle. However, a logarithmic function of duty cycle is
11843 + * probably a better match for perceived brightness: two is half as bright
11844 + * as four, four is half as bright as eight, etc
11845 + */
11846 +static void pwmled_brightness(struct led_classdev *cdev, enum led_brightness b)
11847 +{
11848 + struct pwmled *led;
11849 +
11850 + /* update the duty cycle for the *next* period */
11851 + led = container_of(cdev, struct pwmled, cdev);
11852 + pwm_channel_writel(&led->pwmc, PWM_CUPD, led->mult * (unsigned) b);
11853 +}
11854 +
11855 +/*
11856 + * NOTE: we reuse the platform_data structure of GPIO leds,
11857 + * but repurpose its "gpio" number as a PWM channel number.
11858 + */
11859 +static int __init pwmled_probe(struct platform_device *pdev)
11860 +{
11861 + const struct gpio_led_platform_data *pdata;
11862 + struct pwmled *leds;
11863 + unsigned i;
11864 + int status;
11865 +
11866 + pdata = pdev->dev.platform_data;
11867 + if (!pdata || pdata->num_leds < 1)
11868 + return -ENODEV;
11869 +
11870 + leds = kcalloc(pdata->num_leds, sizeof(*leds), GFP_KERNEL);
11871 + if (!leds)
11872 + return -ENOMEM;
11873 +
11874 + for (i = 0; i < pdata->num_leds; i++) {
11875 + struct pwmled *led = leds + i;
11876 + const struct gpio_led *dat = pdata->leds + i;
11877 + u32 tmp;
11878 +
11879 + led->cdev.name = dat->name;
11880 + led->cdev.brightness = LED_OFF;
11881 + led->cdev.brightness_set = pwmled_brightness;
11882 + led->cdev.default_trigger = dat->default_trigger;
11883 +
11884 + led->active_low = dat->active_low;
11885 +
11886 + status = pwm_channel_alloc(dat->gpio, &led->pwmc);
11887 + if (status < 0)
11888 + goto err;
11889 +
11890 + /*
11891 + * Prescale clock by 2^x, so PWM counts in low MHz.
11892 + * Start each cycle with the LED active, so increasing
11893 + * the duty cycle gives us more time on (== brighter).
11894 + */
11895 + tmp = 5;
11896 + if (!led->active_low)
11897 + tmp |= PWM_CPR_CPOL;
11898 + pwm_channel_writel(&led->pwmc, PWM_CMR, tmp);
11899 +
11900 + /*
11901 + * Pick a period so PWM cycles at 100+ Hz; and a multiplier
11902 + * for scaling duty cycle: brightness * mult.
11903 + */
11904 + tmp = (led->pwmc.mck / (1 << 5)) / 100;
11905 + tmp /= 255;
11906 + led->mult = tmp;
11907 + pwm_channel_writel(&led->pwmc, PWM_CDTY,
11908 + led->cdev.brightness * 255);
11909 + pwm_channel_writel(&led->pwmc, PWM_CPRD,
11910 + LED_FULL * tmp);
11911 +
11912 + pwm_channel_enable(&led->pwmc);
11913 +
11914 + /* Hand it over to the LED framework */
11915 + status = led_classdev_register(&pdev->dev, &led->cdev);
11916 + if (status < 0) {
11917 + pwm_channel_free(&led->pwmc);
11918 + goto err;
11919 + }
11920 + }
11921 +
11922 + platform_set_drvdata(pdev, leds);
11923 + return 0;
11924 +
11925 +err:
11926 + while (i-- > 0) {
11927 + led_classdev_unregister(&leds[i].cdev);
11928 + pwm_channel_free(&leds[i].pwmc);
11929 + }
11930 + kfree(leds);
11931 +
11932 + return status;
11933 +}
11934 +
11935 +static int __exit pwmled_remove(struct platform_device *pdev)
11936 +{
11937 + const struct gpio_led_platform_data *pdata;
11938 + struct pwmled *leds;
11939 + unsigned i;
11940 +
11941 + pdata = pdev->dev.platform_data;
11942 + leds = platform_get_drvdata(pdev);
11943 +
11944 + for (i = 0; i < pdata->num_leds; i++) {
11945 + struct pwmled *led = leds + i;
11946 +
11947 + led_classdev_unregister(&led->cdev);
11948 + pwm_channel_free(&led->pwmc);
11949 + }
11950 +
11951 + kfree(leds);
11952 + platform_set_drvdata(pdev, NULL);
11953 + return 0;
11954 +}
11955 +
11956 +static struct platform_driver pwmled_driver = {
11957 + .driver = {
11958 + .name = "leds-atmel-pwm",
11959 + .owner = THIS_MODULE,
11960 + },
11961 + /* REVISIT add suspend() and resume() methods */
11962 + .remove = __exit_p(pwmled_remove),
11963 +};
11964 +
11965 +static int __init modinit(void)
11966 +{
11967 + return platform_driver_probe(&pwmled_driver, pwmled_probe);
11968 +}
11969 +module_init(modinit);
11970 +
11971 +static void __exit modexit(void)
11972 +{
11973 + platform_driver_unregister(&pwmled_driver);
11974 +}
11975 +module_exit(modexit);
11976 +
11977 +MODULE_DESCRIPTION("Driver for LEDs with PWM-controlled brightness");
11978 +MODULE_LICENSE("GPL");
11979 diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
11980 index b5e67c0..23a9231 100644
11981 --- a/drivers/misc/Kconfig
11982 +++ b/drivers/misc/Kconfig
11983 @@ -13,6 +13,15 @@ menuconfig MISC_DEVICES
11984
11985 if MISC_DEVICES
11986
11987 +config ATMEL_PWM
11988 + tristate "Atmel AT32/AT91 PWM support"
11989 + depends on AVR32 || ARCH_AT91
11990 + help
11991 + This option enables device driver support for the PWM channels
11992 + on certain Atmel prcoessors. Pulse Width Modulation is used for
11993 + purposes including software controlled power-efficent backlights
11994 + on LCD displays, motor control, and waveform generation.
11995 +
11996 config IBM_ASM
11997 tristate "Device driver for IBM RSA service processor"
11998 depends on X86 && PCI && INPUT && EXPERIMENTAL
11999 diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
12000 index 87f2685..b4674c6 100644
12001 --- a/drivers/misc/Makefile
12002 +++ b/drivers/misc/Makefile
12003 @@ -7,6 +7,7 @@ obj-$(CONFIG_IBM_ASM) += ibmasm/
12004 obj-$(CONFIG_HDPU_FEATURES) += hdpuftrs/
12005 obj-$(CONFIG_MSI_LAPTOP) += msi-laptop.o
12006 obj-$(CONFIG_ASUS_LAPTOP) += asus-laptop.o
12007 +obj-$(CONFIG_ATMEL_PWM) += atmel_pwm.o
12008 obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o
12009 obj-$(CONFIG_LKDTM) += lkdtm.o
12010 obj-$(CONFIG_TIFM_CORE) += tifm_core.o
12011 diff --git a/drivers/misc/atmel_pwm.c b/drivers/misc/atmel_pwm.c
12012 new file mode 100644
12013 index 0000000..f8d3b9a
12014 --- /dev/null
12015 +++ b/drivers/misc/atmel_pwm.c
12016 @@ -0,0 +1,409 @@
12017 +#include <linux/module.h>
12018 +#include <linux/clk.h>
12019 +#include <linux/err.h>
12020 +#include <linux/io.h>
12021 +#include <linux/interrupt.h>
12022 +#include <linux/platform_device.h>
12023 +#include <linux/atmel_pwm.h>
12024 +
12025 +
12026 +/*
12027 + * This is a simple driver for the PWM controller found in various newer
12028 + * Atmel SOCs, including the AVR32 series and the AT91sam9263.
12029 + *
12030 + * Chips with current Linux ports have only 4 PWM channels, out of max 32.
12031 + * AT32UC3A and AT32UC3B chips have 7 channels (but currently no Linux).
12032 + * Docs are inconsistent about the width of the channel counter registers;
12033 + * it's at least 16 bits, but several places say 20 bits.
12034 + */
12035 +#define PWM_NCHAN 4 /* max 32 */
12036 +
12037 +struct pwm {
12038 + spinlock_t lock;
12039 + struct platform_device *pdev;
12040 + u32 mask;
12041 + int irq;
12042 + void __iomem *base;
12043 + struct clk *clk;
12044 + struct pwm_channel *channel[PWM_NCHAN];
12045 + void (*handler[PWM_NCHAN])(struct pwm_channel *);
12046 +};
12047 +
12048 +
12049 +/* global PWM controller registers */
12050 +#define PWM_MR 0x00
12051 +#define PWM_ENA 0x04
12052 +#define PWM_DIS 0x08
12053 +#define PWM_SR 0x0c
12054 +#define PWM_IER 0x10
12055 +#define PWM_IDR 0x14
12056 +#define PWM_IMR 0x18
12057 +#define PWM_ISR 0x1c
12058 +
12059 +static inline void pwm_writel(const struct pwm *p, unsigned offset, u32 val)
12060 +{
12061 + __raw_writel(val, p->base + offset);
12062 +}
12063 +
12064 +static inline u32 pwm_readl(const struct pwm *p, unsigned offset)
12065 +{
12066 + return __raw_readl(p->base + offset);
12067 +}
12068 +
12069 +static inline void __iomem *pwmc_regs(const struct pwm *p, int index)
12070 +{
12071 + return p->base + 0x200 + index * 0x20;
12072 +}
12073 +
12074 +static struct pwm *pwm;
12075 +
12076 +static void pwm_dumpregs(struct pwm_channel *ch, char *tag)
12077 +{
12078 + struct device *dev = &pwm->pdev->dev;
12079 +
12080 + dev_dbg(dev, "%s: mr %08x, sr %08x, imr %08x\n",
12081 + tag,
12082 + pwm_readl(pwm, PWM_MR),
12083 + pwm_readl(pwm, PWM_SR),
12084 + pwm_readl(pwm, PWM_IMR));
12085 + dev_dbg(dev,
12086 + "pwm ch%d - mr %08x, dty %u, prd %u, cnt %u\n",
12087 + ch->index,
12088 + pwm_channel_readl(ch, PWM_CMR),
12089 + pwm_channel_readl(ch, PWM_CDTY),
12090 + pwm_channel_readl(ch, PWM_CPRD),
12091 + pwm_channel_readl(ch, PWM_CCNT));
12092 +}
12093 +
12094 +
12095 +/**
12096 + * pwm_channel_alloc - allocate an unused PWM channel
12097 + * @index: identifies the channel
12098 + * @ch: structure to be initialized
12099 + *
12100 + * Drivers allocate PWM channels according to the board's wiring, and
12101 + * matching board-specific setup code. Returns zero or negative errno.
12102 + */
12103 +int pwm_channel_alloc(int index, struct pwm_channel *ch)
12104 +{
12105 + unsigned long flags;
12106 + int status = 0;
12107 +
12108 + /* insist on PWM init, with this signal pinned out */
12109 + if (!pwm || !(pwm->mask & 1 << index))
12110 + return -ENODEV;
12111 +
12112 + if (index < 0 || index >= PWM_NCHAN || !ch)
12113 + return -EINVAL;
12114 + memset(ch, 0, sizeof *ch);
12115 +
12116 + spin_lock_irqsave(&pwm->lock, flags);
12117 + if (pwm->channel[index])
12118 + status = -EBUSY;
12119 + else {
12120 + clk_enable(pwm->clk);
12121 +
12122 + ch->regs = pwmc_regs(pwm, index);
12123 + ch->index = index;
12124 +
12125 + /* REVISIT: ap7000 seems to go 2x as fast as we expect!! */
12126 + ch->mck = clk_get_rate(pwm->clk);
12127 +
12128 + pwm->channel[index] = ch;
12129 + pwm->handler[index] = NULL;
12130 +
12131 + /* channel and irq are always disabled when we return */
12132 + pwm_writel(pwm, PWM_DIS, 1 << index);
12133 + pwm_writel(pwm, PWM_IDR, 1 << index);
12134 + }
12135 + spin_unlock_irqrestore(&pwm->lock, flags);
12136 + return status;
12137 +}
12138 +EXPORT_SYMBOL(pwm_channel_alloc);
12139 +
12140 +static int pwmcheck(struct pwm_channel *ch)
12141 +{
12142 + int index;
12143 +
12144 + if (!pwm)
12145 + return -ENODEV;
12146 + if (!ch)
12147 + return -EINVAL;
12148 + index = ch->index;
12149 + if (index < 0 || index >= PWM_NCHAN || pwm->channel[index] != ch)
12150 + return -EINVAL;
12151 +
12152 + return index;
12153 +}
12154 +
12155 +/**
12156 + * pwm_channel_free - release a previously allocated channel
12157 + * @ch: the channel being released
12158 + *
12159 + * The channel is completely shut down (counter and IRQ disabled),
12160 + * and made available for re-use. Returns zero, or negative errno.
12161 + */
12162 +int pwm_channel_free(struct pwm_channel *ch)
12163 +{
12164 + unsigned long flags;
12165 + int t;
12166 +
12167 + spin_lock_irqsave(&pwm->lock, flags);
12168 + t = pwmcheck(ch);
12169 + if (t >= 0) {
12170 + pwm->channel[t] = NULL;
12171 + pwm->handler[t] = NULL;
12172 +
12173 + /* channel and irq are always disabled when we return */
12174 + pwm_writel(pwm, PWM_DIS, 1 << t);
12175 + pwm_writel(pwm, PWM_IDR, 1 << t);
12176 +
12177 + clk_disable(pwm->clk);
12178 + t = 0;
12179 + }
12180 + spin_unlock_irqrestore(&pwm->lock, flags);
12181 + return t;
12182 +}
12183 +EXPORT_SYMBOL(pwm_channel_free);
12184 +
12185 +int __pwm_channel_onoff(struct pwm_channel *ch, int enabled)
12186 +{
12187 + unsigned long flags;
12188 + int t;
12189 +
12190 + /* OMITTED FUNCTIONALITY: starting several channels in synch */
12191 +
12192 + spin_lock_irqsave(&pwm->lock, flags);
12193 + t = pwmcheck(ch);
12194 + if (t >= 0) {
12195 + pwm_writel(pwm, enabled ? PWM_ENA : PWM_DIS, 1 << t);
12196 + t = 0;
12197 + pwm_dumpregs(ch, enabled ? "enable" : "disable");
12198 + }
12199 + spin_unlock_irqrestore(&pwm->lock, flags);
12200 +
12201 + return t;
12202 +}
12203 +EXPORT_SYMBOL(__pwm_channel_onoff);
12204 +
12205 +/**
12206 + * pwm_clk_alloc - allocate and configure CLKA or CLKB
12207 + * @prescale: from 0..10, the power of two used to divide MCK
12208 + * @div: from 1..255, the linear divisor to use
12209 + *
12210 + * Returns PWM_CPR_CLKA, PWM_CPR_CLKB, or negative errno. The allocated
12211 + * clock will run with a period of (2^prescale * div) / MCK, or twice as
12212 + * long if center aligned PWM output is used. The clock must later be
12213 + * deconfigured using pwm_clk_free().
12214 + */
12215 +int pwm_clk_alloc(unsigned prescale, unsigned div)
12216 +{
12217 + unsigned long flags;
12218 + u32 mr;
12219 + u32 val = (prescale << 8) | div;
12220 + int ret = -EBUSY;
12221 +
12222 + if (prescale >= 10 || div == 0 || div > 255)
12223 + return -EINVAL;
12224 +
12225 + spin_lock_irqsave(&pwm->lock, flags);
12226 + mr = pwm_readl(pwm, PWM_MR);
12227 + if ((mr & 0xffff) == 0) {
12228 + mr |= val;
12229 + ret = PWM_CPR_CLKA;
12230 + }
12231 + if ((mr & (0xffff << 16)) == 0) {
12232 + mr |= val << 16;
12233 + ret = PWM_CPR_CLKB;
12234 + }
12235 + if (ret > 0)
12236 + pwm_writel(pwm, PWM_MR, mr);
12237 + spin_unlock_irqrestore(&pwm->lock, flags);
12238 + return ret;
12239 +}
12240 +EXPORT_SYMBOL(pwm_clk_alloc);
12241 +
12242 +/**
12243 + * pwm_clk_free - deconfigure and release CLKA or CLKB
12244 + *
12245 + * Reverses the effect of pwm_clk_alloc().
12246 + */
12247 +void pwm_clk_free(unsigned clk)
12248 +{
12249 + unsigned long flags;
12250 + u32 mr;
12251 +
12252 + spin_lock_irqsave(&pwm->lock, flags);
12253 + mr = pwm_readl(pwm, PWM_MR);
12254 + if (clk == PWM_CPR_CLKA)
12255 + pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 0));
12256 + if (clk == PWM_CPR_CLKB)
12257 + pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 16));
12258 + spin_unlock_irqrestore(&pwm->lock, flags);
12259 +}
12260 +EXPORT_SYMBOL(pwm_clk_free);
12261 +
12262 +/**
12263 + * pwm_channel_handler - manage channel's IRQ handler
12264 + * @ch: the channel
12265 + * @handler: the handler to use, possibly NULL
12266 + *
12267 + * If the handler is non-null, the handler will be called after every
12268 + * period of this PWM channel. If the handler is null, this channel
12269 + * won't generate an IRQ.
12270 + */
12271 +int pwm_channel_handler(struct pwm_channel *ch,
12272 + void (*handler)(struct pwm_channel *ch))
12273 +{
12274 + unsigned long flags;
12275 + int t;
12276 +
12277 + spin_lock_irqsave(&pwm->lock, flags);
12278 + t = pwmcheck(ch);
12279 + if (t >= 0) {
12280 + pwm->handler[t] = handler;
12281 + pwm_writel(pwm, handler ? PWM_IER : PWM_IDR, 1 << t);
12282 + t = 0;
12283 + }
12284 + spin_unlock_irqrestore(&pwm->lock, flags);
12285 +
12286 + return t;
12287 +}
12288 +EXPORT_SYMBOL(pwm_channel_handler);
12289 +
12290 +static irqreturn_t pwm_irq(int id, void *_pwm)
12291 +{
12292 + struct pwm *p = _pwm;
12293 + irqreturn_t handled = IRQ_NONE;
12294 + u32 irqstat;
12295 + int index;
12296 +
12297 + spin_lock(&p->lock);
12298 +
12299 + /* ack irqs, then handle them */
12300 + irqstat = pwm_readl(pwm, PWM_ISR);
12301 +
12302 + while (irqstat) {
12303 + struct pwm_channel *ch;
12304 + void (*handler)(struct pwm_channel *ch);
12305 +
12306 + index = ffs(irqstat) - 1;
12307 + irqstat &= ~(1 << index);
12308 + ch = pwm->channel[index];
12309 + handler = pwm->handler[index];
12310 + if (handler && ch) {
12311 + spin_unlock(&p->lock);
12312 + handler(ch);
12313 + spin_lock(&p->lock);
12314 + handled = IRQ_HANDLED;
12315 + }
12316 + }
12317 +
12318 + spin_unlock(&p->lock);
12319 + return handled;
12320 +}
12321 +
12322 +static int __init pwm_probe(struct platform_device *pdev)
12323 +{
12324 + struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
12325 + int irq = platform_get_irq(pdev, 0);
12326 + u32 *mp = pdev->dev.platform_data;
12327 + struct pwm *p;
12328 + int status = -EIO;
12329 +
12330 + if (pwm)
12331 + return -EBUSY;
12332 + if (!r || irq < 0 || !mp || !*mp)
12333 + return -ENODEV;
12334 + if (*mp & ~((1<<PWM_NCHAN)-1)) {
12335 + dev_warn(&pdev->dev, "mask 0x%x ... more than %d channels\n",
12336 + *mp, PWM_NCHAN);
12337 + return -EINVAL;
12338 + }
12339 +
12340 + p = kzalloc(sizeof(*p), GFP_KERNEL);
12341 + if (!p)
12342 + return -ENOMEM;
12343 +
12344 + spin_lock_init(&p->lock);
12345 + p->pdev = pdev;
12346 + p->mask = *mp;
12347 + p->irq = irq;
12348 + p->base = ioremap(r->start, r->end - r->start + 1);
12349 + if (!p->base)
12350 + goto fail;
12351 + p->clk = clk_get(&pdev->dev, "mck");
12352 + if (IS_ERR(p->clk)) {
12353 + status = PTR_ERR(p->clk);
12354 + p->clk = NULL;
12355 + goto fail;
12356 + }
12357 +
12358 + status = request_irq(irq, pwm_irq, 0, pdev->name, p);
12359 + if (status < 0)
12360 + goto fail;
12361 +
12362 + pwm = p;
12363 + platform_set_drvdata(pdev, p);
12364 +
12365 + return 0;
12366 +
12367 +fail:
12368 + if (p->clk)
12369 + clk_put(p->clk);
12370 + if (p->base)
12371 + iounmap(p->base);
12372 +
12373 + kfree(p);
12374 + return status;
12375 +}
12376 +
12377 +static int __exit pwm_remove(struct platform_device *pdev)
12378 +{
12379 + struct pwm *p = platform_get_drvdata(pdev);
12380 +
12381 + if (p != pwm)
12382 + return -EINVAL;
12383 +
12384 + clk_enable(pwm->clk);
12385 + pwm_writel(pwm, PWM_DIS, (1 << PWM_NCHAN) - 1);
12386 + pwm_writel(pwm, PWM_IDR, (1 << PWM_NCHAN) - 1);
12387 + clk_disable(pwm->clk);
12388 +
12389 + pwm = NULL;
12390 +
12391 + free_irq(p->irq, p);
12392 + clk_put(p->clk);
12393 + iounmap(p->base);
12394 + kfree(p);
12395 +
12396 + return 0;
12397 +}
12398 +
12399 +static struct platform_driver atmel_pwm_driver = {
12400 + .driver = {
12401 + .name = "atmel_pwm",
12402 + .owner = THIS_MODULE,
12403 + },
12404 + .remove = __exit_p(pwm_remove),
12405 +
12406 + /* NOTE: PWM can keep running in AVR32 "idle" and "frozen" states;
12407 + * and all AT91sam9263 states, albeit at reduced clock rate if
12408 + * MCK becomes the slow clock (i.e. what Linux labels STR).
12409 + */
12410 +};
12411 +
12412 +static int __init pwm_init(void)
12413 +{
12414 + return platform_driver_probe(&atmel_pwm_driver, pwm_probe);
12415 +}
12416 +module_init(pwm_init);
12417 +
12418 +static void __exit pwm_exit(void)
12419 +{
12420 + platform_driver_unregister(&atmel_pwm_driver);
12421 +}
12422 +module_exit(pwm_exit);
12423 +
12424 +MODULE_DESCRIPTION("Driver for AT32/AT91 PWM module");
12425 +MODULE_LICENSE("GPL");
12426 diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
12427 index 5fef678..4970b53 100644
12428 --- a/drivers/mmc/host/Kconfig
12429 +++ b/drivers/mmc/host/Kconfig
12430 @@ -91,6 +91,16 @@ config MMC_AT91
12431
12432 If unsure, say N.
12433
12434 +config MMC_ATMELMCI
12435 + tristate "Atmel Multimedia Card Interface support"
12436 + depends on AVR32 && MMC
12437 + help
12438 + This selects the Atmel Multimedia Card Interface. If you have
12439 + a AT91 (ARM) or AT32 (AVR32) platform with a Multimedia Card
12440 + slot, say Y or M here.
12441 +
12442 + If unsure, say N.
12443 +
12444 config MMC_IMX
12445 tristate "Motorola i.MX Multimedia Card Interface support"
12446 depends on ARCH_IMX
12447 diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
12448 index 3877c87..e80ea72 100644
12449 --- a/drivers/mmc/host/Makefile
12450 +++ b/drivers/mmc/host/Makefile
12451 @@ -15,6 +15,7 @@ obj-$(CONFIG_MMC_WBSD) += wbsd.o
12452 obj-$(CONFIG_MMC_AU1X) += au1xmmc.o
12453 obj-$(CONFIG_MMC_OMAP) += omap.o
12454 obj-$(CONFIG_MMC_AT91) += at91_mci.o
12455 +obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o
12456 obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o
12457 obj-$(CONFIG_MMC_SPI) += mmc_spi.o
12458
12459 diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c
12460 new file mode 100644
12461 index 0000000..0b5ec58
12462 --- /dev/null
12463 +++ b/drivers/mmc/host/atmel-mci.c
12464 @@ -0,0 +1,1176 @@
12465 +/*
12466 + * Atmel MultiMedia Card Interface driver
12467 + *
12468 + * Copyright (C) 2004-2006 Atmel Corporation
12469 + *
12470 + * This program is free software; you can redistribute it and/or modify
12471 + * it under the terms of the GNU General Public License version 2 as
12472 + * published by the Free Software Foundation.
12473 + */
12474 +#include <linux/blkdev.h>
12475 +#include <linux/clk.h>
12476 +#include <linux/device.h>
12477 +#include <linux/dma-mapping.h>
12478 +#include <linux/init.h>
12479 +#include <linux/interrupt.h>
12480 +#include <linux/ioport.h>
12481 +#include <linux/module.h>
12482 +#include <linux/platform_device.h>
12483 +
12484 +#include <linux/mmc/host.h>
12485 +
12486 +#include <asm/dma-controller.h>
12487 +#include <asm/io.h>
12488 +#include <asm/arch/board.h>
12489 +#include <asm/arch/gpio.h>
12490 +
12491 +#include "atmel-mci.h"
12492 +
12493 +#define DRIVER_NAME "atmel_mci"
12494 +
12495 +#define MCI_DATA_ERROR_FLAGS (MCI_BIT(DCRCE) | MCI_BIT(DTOE) | \
12496 + MCI_BIT(OVRE) | MCI_BIT(UNRE))
12497 +
12498 +enum {
12499 + EVENT_CMD_COMPLETE = 0,
12500 + EVENT_DATA_COMPLETE,
12501 + EVENT_DATA_ERROR,
12502 + EVENT_STOP_SENT,
12503 + EVENT_STOP_COMPLETE,
12504 + EVENT_DMA_COMPLETE,
12505 + EVENT_DMA_ERROR,
12506 + EVENT_CARD_DETECT,
12507 +};
12508 +
12509 +struct atmel_mci_dma {
12510 + struct dma_request_sg req;
12511 + unsigned short rx_periph_id;
12512 + unsigned short tx_periph_id;
12513 +};
12514 +
12515 +struct atmel_mci {
12516 + struct mmc_host *mmc;
12517 + void __iomem *regs;
12518 + struct atmel_mci_dma dma;
12519 +
12520 + struct mmc_request *mrq;
12521 + struct mmc_command *cmd;
12522 + struct mmc_data *data;
12523 +
12524 + u32 cmd_status;
12525 + u32 data_status;
12526 + u32 stop_status;
12527 + u32 stop_cmdr;
12528 +
12529 + struct tasklet_struct tasklet;
12530 + unsigned long pending_events;
12531 + unsigned long completed_events;
12532 +
12533 + int present;
12534 + int detect_pin;
12535 + int wp_pin;
12536 +
12537 + unsigned long bus_hz;
12538 + unsigned long mapbase;
12539 + struct clk *mck;
12540 + struct platform_device *pdev;
12541 +
12542 +#ifdef CONFIG_DEBUG_FS
12543 + struct dentry *debugfs_root;
12544 + struct dentry *debugfs_regs;
12545 + struct dentry *debugfs_req;
12546 + struct dentry *debugfs_pending_events;
12547 + struct dentry *debugfs_completed_events;
12548 +#endif
12549 +};
12550 +
12551 +/* Those printks take an awful lot of time... */
12552 +#ifndef DEBUG
12553 +static unsigned int fmax = 15000000U;
12554 +#else
12555 +static unsigned int fmax = 1000000U;
12556 +#endif
12557 +module_param(fmax, uint, 0444);
12558 +MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
12559 +
12560 +/* Test bit macros for completed events */
12561 +#define mci_cmd_is_complete(host) \
12562 + test_bit(EVENT_CMD_COMPLETE, &host->completed_events)
12563 +#define mci_data_is_complete(host) \
12564 + test_bit(EVENT_DATA_COMPLETE, &host->completed_events)
12565 +#define mci_data_error_is_complete(host) \
12566 + test_bit(EVENT_DATA_ERROR, &host->completed_events)
12567 +#define mci_stop_sent_is_complete(host) \
12568 + test_bit(EVENT_STOP_SENT, &host->completed_events)
12569 +#define mci_stop_is_complete(host) \
12570 + test_bit(EVENT_STOP_COMPLETE, &host->completed_events)
12571 +#define mci_dma_is_complete(host) \
12572 + test_bit(EVENT_DMA_COMPLETE, &host->completed_events)
12573 +#define mci_dma_error_is_complete(host) \
12574 + test_bit(EVENT_DMA_ERROR, &host->completed_events)
12575 +#define mci_card_detect_is_complete(host) \
12576 + test_bit(EVENT_CARD_DETECT, &host->completed_events)
12577 +
12578 +/* Test and clear bit macros for pending events */
12579 +#define mci_clear_cmd_is_pending(host) \
12580 + test_and_clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
12581 +#define mci_clear_data_is_pending(host) \
12582 + test_and_clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
12583 +#define mci_clear_data_error_is_pending(host) \
12584 + test_and_clear_bit(EVENT_DATA_ERROR, &host->pending_events)
12585 +#define mci_clear_stop_sent_is_pending(host) \
12586 + test_and_clear_bit(EVENT_STOP_SENT, &host->pending_events)
12587 +#define mci_clear_stop_is_pending(host) \
12588 + test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
12589 +#define mci_clear_dma_error_is_pending(host) \
12590 + test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events)
12591 +#define mci_clear_card_detect_is_pending(host) \
12592 + test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events)
12593 +
12594 +/* Test and set bit macros for completed events */
12595 +#define mci_set_cmd_is_completed(host) \
12596 + test_and_set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
12597 +#define mci_set_data_is_completed(host) \
12598 + test_and_set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
12599 +#define mci_set_data_error_is_completed(host) \
12600 + test_and_set_bit(EVENT_DATA_ERROR, &host->completed_events)
12601 +#define mci_set_stop_sent_is_completed(host) \
12602 + test_and_set_bit(EVENT_STOP_SENT, &host->completed_events)
12603 +#define mci_set_stop_is_completed(host) \
12604 + test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
12605 +#define mci_set_dma_error_is_completed(host) \
12606 + test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events)
12607 +#define mci_set_card_detect_is_completed(host) \
12608 + test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events)
12609 +
12610 +/* Set bit macros for completed events */
12611 +#define mci_set_cmd_complete(host) \
12612 + set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
12613 +#define mci_set_data_complete(host) \
12614 + set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
12615 +#define mci_set_data_error_complete(host) \
12616 + set_bit(EVENT_DATA_ERROR, &host->completed_events)
12617 +#define mci_set_stop_sent_complete(host) \
12618 + set_bit(EVENT_STOP_SENT, &host->completed_events)
12619 +#define mci_set_stop_complete(host) \
12620 + set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
12621 +#define mci_set_dma_complete(host) \
12622 + set_bit(EVENT_DMA_COMPLETE, &host->completed_events)
12623 +#define mci_set_dma_error_complete(host) \
12624 + set_bit(EVENT_DMA_ERROR, &host->completed_events)
12625 +#define mci_set_card_detect_complete(host) \
12626 + set_bit(EVENT_CARD_DETECT, &host->completed_events)
12627 +
12628 +/* Set bit macros for pending events */
12629 +#define mci_set_cmd_pending(host) \
12630 + set_bit(EVENT_CMD_COMPLETE, &host->pending_events)
12631 +#define mci_set_data_pending(host) \
12632 + set_bit(EVENT_DATA_COMPLETE, &host->pending_events)
12633 +#define mci_set_data_error_pending(host) \
12634 + set_bit(EVENT_DATA_ERROR, &host->pending_events)
12635 +#define mci_set_stop_sent_pending(host) \
12636 + set_bit(EVENT_STOP_SENT, &host->pending_events)
12637 +#define mci_set_stop_pending(host) \
12638 + set_bit(EVENT_STOP_COMPLETE, &host->pending_events)
12639 +#define mci_set_dma_error_pending(host) \
12640 + set_bit(EVENT_DMA_ERROR, &host->pending_events)
12641 +#define mci_set_card_detect_pending(host) \
12642 + set_bit(EVENT_CARD_DETECT, &host->pending_events)
12643 +
12644 +/* Clear bit macros for pending events */
12645 +#define mci_clear_cmd_pending(host) \
12646 + clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
12647 +#define mci_clear_data_pending(host) \
12648 + clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
12649 +#define mci_clear_data_error_pending(host) \
12650 + clear_bit(EVENT_DATA_ERROR, &host->pending_events)
12651 +#define mci_clear_stop_sent_pending(host) \
12652 + clear_bit(EVENT_STOP_SENT, &host->pending_events)
12653 +#define mci_clear_stop_pending(host) \
12654 + clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
12655 +#define mci_clear_dma_error_pending(host) \
12656 + clear_bit(EVENT_DMA_ERROR, &host->pending_events)
12657 +#define mci_clear_card_detect_pending(host) \
12658 + clear_bit(EVENT_CARD_DETECT, &host->pending_events)
12659 +
12660 +
12661 +#ifdef CONFIG_DEBUG_FS
12662 +#include <linux/debugfs.h>
12663 +
12664 +#define DBG_REQ_BUF_SIZE (4096 - sizeof(unsigned int))
12665 +
12666 +struct req_dbg_data {
12667 + unsigned int nbytes;
12668 + char str[DBG_REQ_BUF_SIZE];
12669 +};
12670 +
12671 +static int req_dbg_open(struct inode *inode, struct file *file)
12672 +{
12673 + struct atmel_mci *host;
12674 + struct mmc_request *mrq;
12675 + struct mmc_command *cmd, *stop;
12676 + struct mmc_data *data;
12677 + struct req_dbg_data *priv;
12678 + char *str;
12679 + unsigned long n = 0;
12680 +
12681 + priv = kzalloc(DBG_REQ_BUF_SIZE, GFP_KERNEL);
12682 + if (!priv)
12683 + return -ENOMEM;
12684 + str = priv->str;
12685 +
12686 + mutex_lock(&inode->i_mutex);
12687 + host = inode->i_private;
12688 +
12689 + spin_lock_irq(&host->mmc->lock);
12690 + mrq = host->mrq;
12691 + if (mrq) {
12692 + cmd = mrq->cmd;
12693 + data = mrq->data;
12694 + stop = mrq->stop;
12695 + n = snprintf(str, DBG_REQ_BUF_SIZE,
12696 + "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
12697 + cmd->opcode, cmd->arg, cmd->flags,
12698 + cmd->resp[0], cmd->resp[1], cmd->resp[2],
12699 + cmd->resp[3], cmd->error);
12700 + if (n < DBG_REQ_BUF_SIZE && data)
12701 + n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
12702 + "DATA %u * %u (%u) %x (err %u)\n",
12703 + data->blocks, data->blksz,
12704 + data->bytes_xfered, data->flags,
12705 + data->error);
12706 + if (n < DBG_REQ_BUF_SIZE && stop)
12707 + n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
12708 + "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
12709 + stop->opcode, stop->arg, stop->flags,
12710 + stop->resp[0], stop->resp[1],
12711 + stop->resp[2], stop->resp[3],
12712 + stop->error);
12713 + }
12714 + spin_unlock_irq(&host->mmc->lock);
12715 + mutex_unlock(&inode->i_mutex);
12716 +
12717 + priv->nbytes = min(n, DBG_REQ_BUF_SIZE);
12718 + file->private_data = priv;
12719 +
12720 + return 0;
12721 +}
12722 +
12723 +static ssize_t req_dbg_read(struct file *file, char __user *buf,
12724 + size_t nbytes, loff_t *ppos)
12725 +{
12726 + struct req_dbg_data *priv = file->private_data;
12727 +
12728 + return simple_read_from_buffer(buf, nbytes, ppos,
12729 + priv->str, priv->nbytes);
12730 +}
12731 +
12732 +static int req_dbg_release(struct inode *inode, struct file *file)
12733 +{
12734 + kfree(file->private_data);
12735 + return 0;
12736 +}
12737 +
12738 +static const struct file_operations req_dbg_fops = {
12739 + .owner = THIS_MODULE,
12740 + .open = req_dbg_open,
12741 + .llseek = no_llseek,
12742 + .read = req_dbg_read,
12743 + .release = req_dbg_release,
12744 +};
12745 +
12746 +static int regs_dbg_open(struct inode *inode, struct file *file)
12747 +{
12748 + struct atmel_mci *host;
12749 + unsigned int i;
12750 + u32 *data;
12751 + int ret = -ENOMEM;
12752 +
12753 + mutex_lock(&inode->i_mutex);
12754 + host = inode->i_private;
12755 + data = kmalloc(inode->i_size, GFP_KERNEL);
12756 + if (!data)
12757 + goto out;
12758 +
12759 + spin_lock_irq(&host->mmc->lock);
12760 + for (i = 0; i < inode->i_size / 4; i++)
12761 + data[i] = __raw_readl(host->regs + i * 4);
12762 + spin_unlock_irq(&host->mmc->lock);
12763 +
12764 + file->private_data = data;
12765 + ret = 0;
12766 +
12767 +out:
12768 + mutex_unlock(&inode->i_mutex);
12769 +
12770 + return ret;
12771 +}
12772 +
12773 +static ssize_t regs_dbg_read(struct file *file, char __user *buf,
12774 + size_t nbytes, loff_t *ppos)
12775 +{
12776 + struct inode *inode = file->f_dentry->d_inode;
12777 + int ret;
12778 +
12779 + mutex_lock(&inode->i_mutex);
12780 + ret = simple_read_from_buffer(buf, nbytes, ppos,
12781 + file->private_data,
12782 + file->f_dentry->d_inode->i_size);
12783 + mutex_unlock(&inode->i_mutex);
12784 +
12785 + return ret;
12786 +}
12787 +
12788 +static int regs_dbg_release(struct inode *inode, struct file *file)
12789 +{
12790 + kfree(file->private_data);
12791 + return 0;
12792 +}
12793 +
12794 +static const struct file_operations regs_dbg_fops = {
12795 + .owner = THIS_MODULE,
12796 + .open = regs_dbg_open,
12797 + .llseek = generic_file_llseek,
12798 + .read = regs_dbg_read,
12799 + .release = regs_dbg_release,
12800 +};
12801 +
12802 +static void atmci_init_debugfs(struct atmel_mci *host)
12803 +{
12804 + struct mmc_host *mmc;
12805 + struct dentry *root, *regs;
12806 + struct resource *res;
12807 +
12808 + mmc = host->mmc;
12809 + root = debugfs_create_dir(mmc_hostname(mmc), NULL);
12810 + if (IS_ERR(root) || !root)
12811 + goto err_root;
12812 + host->debugfs_root = root;
12813 +
12814 + regs = debugfs_create_file("regs", 0400, root, host, &regs_dbg_fops);
12815 + if (!regs)
12816 + goto err_regs;
12817 +
12818 + res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
12819 + regs->d_inode->i_size = res->end - res->start + 1;
12820 + host->debugfs_regs = regs;
12821 +
12822 + host->debugfs_req = debugfs_create_file("req", 0400, root,
12823 + host, &req_dbg_fops);
12824 + if (!host->debugfs_req)
12825 + goto err_req;
12826 +
12827 + host->debugfs_pending_events
12828 + = debugfs_create_u32("pending_events", 0400, root,
12829 + (u32 *)&host->pending_events);
12830 + if (!host->debugfs_pending_events)
12831 + goto err_pending_events;
12832 +
12833 + host->debugfs_completed_events
12834 + = debugfs_create_u32("completed_events", 0400, root,
12835 + (u32 *)&host->completed_events);
12836 + if (!host->debugfs_completed_events)
12837 + goto err_completed_events;
12838 +
12839 + return;
12840 +
12841 +err_completed_events:
12842 + debugfs_remove(host->debugfs_pending_events);
12843 +err_pending_events:
12844 + debugfs_remove(host->debugfs_req);
12845 +err_req:
12846 + debugfs_remove(host->debugfs_regs);
12847 +err_regs:
12848 + debugfs_remove(host->debugfs_root);
12849 +err_root:
12850 + host->debugfs_root = NULL;
12851 + dev_err(&host->pdev->dev,
12852 + "failed to initialize debugfs for %s\n",
12853 + mmc_hostname(mmc));
12854 +}
12855 +
12856 +static void atmci_cleanup_debugfs(struct atmel_mci *host)
12857 +{
12858 + if (host->debugfs_root) {
12859 + debugfs_remove(host->debugfs_completed_events);
12860 + debugfs_remove(host->debugfs_pending_events);
12861 + debugfs_remove(host->debugfs_req);
12862 + debugfs_remove(host->debugfs_regs);
12863 + debugfs_remove(host->debugfs_root);
12864 + host->debugfs_root = NULL;
12865 + }
12866 +}
12867 +#else
12868 +static inline void atmci_init_debugfs(struct atmel_mci *host)
12869 +{
12870 +
12871 +}
12872 +
12873 +static inline void atmci_cleanup_debugfs(struct atmel_mci *host)
12874 +{
12875 +
12876 +}
12877 +#endif /* CONFIG_DEBUG_FS */
12878 +
12879 +static inline unsigned int ns_to_clocks(struct atmel_mci *host,
12880 + unsigned int ns)
12881 +{
12882 + return (ns * (host->bus_hz / 1000000) + 999) / 1000;
12883 +}
12884 +
12885 +static void atmci_set_timeout(struct atmel_mci *host,
12886 + struct mmc_data *data)
12887 +{
12888 + static unsigned dtomul_to_shift[] = {
12889 + 0, 4, 7, 8, 10, 12, 16, 20
12890 + };
12891 + unsigned timeout;
12892 + unsigned dtocyc, dtomul;
12893 +
12894 + timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
12895 +
12896 + for (dtomul = 0; dtomul < 8; dtomul++) {
12897 + unsigned shift = dtomul_to_shift[dtomul];
12898 + dtocyc = (timeout + (1 << shift) - 1) >> shift;
12899 + if (dtocyc < 15)
12900 + break;
12901 + }
12902 +
12903 + if (dtomul >= 8) {
12904 + dtomul = 7;
12905 + dtocyc = 15;
12906 + }
12907 +
12908 + dev_dbg(&host->mmc->class_dev, "setting timeout to %u cycles\n",
12909 + dtocyc << dtomul_to_shift[dtomul]);
12910 + mci_writel(host, DTOR, (MCI_BF(DTOMUL, dtomul)
12911 + | MCI_BF(DTOCYC, dtocyc)));
12912 +}
12913 +
12914 +/*
12915 + * Return mask with command flags to be enabled for this command.
12916 + */
12917 +static u32 atmci_prepare_command(struct mmc_host *mmc,
12918 + struct mmc_command *cmd)
12919 +{
12920 + u32 cmdr;
12921 +
12922 + cmd->error = 0;
12923 +
12924 + cmdr = MCI_BF(CMDNB, cmd->opcode);
12925 +
12926 + if (cmd->flags & MMC_RSP_PRESENT) {
12927 + if (cmd->flags & MMC_RSP_136)
12928 + cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_136_BIT);
12929 + else
12930 + cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_48_BIT);
12931 + }
12932 +
12933 + /*
12934 + * This should really be MAXLAT_5 for CMD2 and ACMD41, but
12935 + * it's too difficult to determine whether this is an ACMD or
12936 + * not. Better make it 64.
12937 + */
12938 + cmdr |= MCI_BIT(MAXLAT);
12939 +
12940 + if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
12941 + cmdr |= MCI_BIT(OPDCMD);
12942 +
12943 + dev_dbg(&mmc->class_dev,
12944 + "cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n",
12945 + cmd->opcode, cmd->arg, cmd->flags, (unsigned long)cmdr);
12946 +
12947 + return cmdr;
12948 +}
12949 +
12950 +static void atmci_start_command(struct atmel_mci *host,
12951 + struct mmc_command *cmd,
12952 + u32 cmd_flags)
12953 +{
12954 + WARN_ON(host->cmd);
12955 + host->cmd = cmd;
12956 +
12957 + mci_writel(host, ARGR, cmd->arg);
12958 + mci_writel(host, CMDR, cmd_flags);
12959 +
12960 + if (cmd->data)
12961 + dma_start_request(host->dma.req.req.dmac,
12962 + host->dma.req.req.channel);
12963 +}
12964 +
12965 +/*
12966 + * Returns a mask of flags to be set in the command register when the
12967 + * command to start the transfer is to be sent.
12968 + */
12969 +static u32 atmci_prepare_data(struct mmc_host *mmc, struct mmc_data *data)
12970 +{
12971 + struct atmel_mci *host = mmc_priv(mmc);
12972 + u32 cmd_flags;
12973 +
12974 + WARN_ON(host->data);
12975 + host->data = data;
12976 +
12977 + atmci_set_timeout(host, data);
12978 + mci_writel(host, BLKR, (MCI_BF(BCNT, data->blocks)
12979 + | MCI_BF(BLKLEN, data->blksz)));
12980 + host->dma.req.block_size = data->blksz;
12981 + host->dma.req.nr_blocks = data->blocks;
12982 +
12983 + cmd_flags = MCI_BF(TRCMD, MCI_TRCMD_START_TRANS);
12984 + if (data->flags & MMC_DATA_STREAM)
12985 + cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
12986 + else if (data->blocks > 1)
12987 + cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
12988 + else
12989 + cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_BLOCK);
12990 +
12991 + if (data->flags & MMC_DATA_READ) {
12992 + cmd_flags |= MCI_BIT(TRDIR);
12993 + host->dma.req.nr_sg
12994 + = dma_map_sg(&host->pdev->dev, data->sg,
12995 + data->sg_len, DMA_FROM_DEVICE);
12996 + host->dma.req.periph_id = host->dma.rx_periph_id;
12997 + host->dma.req.direction = DMA_DIR_PERIPH_TO_MEM;
12998 + host->dma.req.data_reg = host->mapbase + MCI_RDR;
12999 + } else {
13000 + host->dma.req.nr_sg
13001 + = dma_map_sg(&host->pdev->dev, data->sg,
13002 + data->sg_len, DMA_TO_DEVICE);
13003 + host->dma.req.periph_id = host->dma.tx_periph_id;
13004 + host->dma.req.direction = DMA_DIR_MEM_TO_PERIPH;
13005 + host->dma.req.data_reg = host->mapbase + MCI_TDR;
13006 + }
13007 + host->dma.req.sg = data->sg;
13008 +
13009 + dma_prepare_request_sg(host->dma.req.req.dmac, &host->dma.req);
13010 +
13011 + return cmd_flags;
13012 +}
13013 +
13014 +static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
13015 +{
13016 + struct atmel_mci *host = mmc_priv(mmc);
13017 + struct mmc_data *data = mrq->data;
13018 + u32 iflags;
13019 + u32 cmdflags = 0;
13020 +
13021 + iflags = mci_readl(host, IMR);
13022 + if (iflags)
13023 + dev_warn(&mmc->class_dev, "WARNING: IMR=0x%08x\n",
13024 + mci_readl(host, IMR));
13025 +
13026 + WARN_ON(host->mrq != NULL);
13027 + host->mrq = mrq;
13028 + host->pending_events = 0;
13029 + host->completed_events = 0;
13030 +
13031 + iflags = MCI_BIT(CMDRDY);
13032 + cmdflags = atmci_prepare_command(mmc, mrq->cmd);
13033 +
13034 + if (mrq->stop) {
13035 + WARN_ON(!data);
13036 +
13037 + host->stop_cmdr = atmci_prepare_command(mmc, mrq->stop);
13038 + host->stop_cmdr |= MCI_BF(TRCMD, MCI_TRCMD_STOP_TRANS);
13039 + if (!(data->flags & MMC_DATA_WRITE))
13040 + host->stop_cmdr |= MCI_BIT(TRDIR);
13041 + if (data->flags & MMC_DATA_STREAM)
13042 + host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
13043 + else
13044 + host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
13045 + }
13046 + if (data) {
13047 + cmdflags |= atmci_prepare_data(mmc, data);
13048 + iflags |= MCI_DATA_ERROR_FLAGS;
13049 + }
13050 +
13051 + atmci_start_command(host, mrq->cmd, cmdflags);
13052 + mci_writel(host, IER, iflags);
13053 +}
13054 +
13055 +static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
13056 +{
13057 + struct atmel_mci *host = mmc_priv(mmc);
13058 + u32 mr;
13059 +
13060 + if (ios->clock) {
13061 + u32 clkdiv;
13062 +
13063 + /* Set clock rate */
13064 + clkdiv = host->bus_hz / (2 * ios->clock) - 1;
13065 + if (clkdiv > 255) {
13066 + dev_warn(&mmc->class_dev,
13067 + "clock %u too slow; using %lu\n",
13068 + ios->clock, host->bus_hz / (2 * 256));
13069 + clkdiv = 255;
13070 + }
13071 +
13072 + mr = mci_readl(host, MR);
13073 + mr = MCI_BFINS(CLKDIV, clkdiv, mr)
13074 + | MCI_BIT(WRPROOF) | MCI_BIT(RDPROOF);
13075 + mci_writel(host, MR, mr);
13076 +
13077 + /* Enable the MCI controller */
13078 + mci_writel(host, CR, MCI_BIT(MCIEN));
13079 + } else {
13080 + /* Disable the MCI controller */
13081 + mci_writel(host, CR, MCI_BIT(MCIDIS));
13082 + }
13083 +
13084 + switch (ios->bus_width) {
13085 + case MMC_BUS_WIDTH_1:
13086 + mci_writel(host, SDCR, 0);
13087 + break;
13088 + case MMC_BUS_WIDTH_4:
13089 + mci_writel(host, SDCR, MCI_BIT(SDCBUS));
13090 + break;
13091 + }
13092 +
13093 + switch (ios->power_mode) {
13094 + case MMC_POWER_ON:
13095 + /* Send init sequence (74 clock cycles) */
13096 + mci_writel(host, IDR, ~0UL);
13097 + mci_writel(host, CMDR, MCI_BF(SPCMD, MCI_SPCMD_INIT_CMD));
13098 + while (!(mci_readl(host, SR) & MCI_BIT(CMDRDY)))
13099 + cpu_relax();
13100 + break;
13101 + default:
13102 + /*
13103 + * TODO: None of the currently available AVR32-based
13104 + * boards allow MMC power to be turned off. Implement
13105 + * power control when this can be tested properly.
13106 + */
13107 + break;
13108 + }
13109 +}
13110 +
13111 +static int atmci_get_ro(struct mmc_host *mmc)
13112 +{
13113 + int read_only = 0;
13114 + struct atmel_mci *host = mmc_priv(mmc);
13115 +
13116 + if (host->wp_pin >= 0) {
13117 + read_only = gpio_get_value(host->wp_pin);
13118 + dev_dbg(&mmc->class_dev, "card is %s\n",
13119 + read_only ? "read-only" : "read-write");
13120 + } else {
13121 + dev_dbg(&mmc->class_dev,
13122 + "no pin for checking read-only switch."
13123 + " Assuming write-enable.\n");
13124 + }
13125 +
13126 + return read_only;
13127 +}
13128 +
13129 +static struct mmc_host_ops atmci_ops = {
13130 + .request = atmci_request,
13131 + .set_ios = atmci_set_ios,
13132 + .get_ro = atmci_get_ro,
13133 +};
13134 +
13135 +static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq)
13136 +{
13137 + struct atmel_mci *host = mmc_priv(mmc);
13138 +
13139 + WARN_ON(host->cmd || host->data);
13140 + host->mrq = NULL;
13141 +
13142 + mmc_request_done(mmc, mrq);
13143 +}
13144 +
13145 +static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data,
13146 + u32 flags)
13147 +{
13148 + struct atmel_mci *host = mmc_priv(mmc);
13149 +
13150 + atmci_start_command(host, data->stop, host->stop_cmdr | flags);
13151 + mci_writel(host, IER, MCI_BIT(CMDRDY));
13152 +}
13153 +
13154 +static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data)
13155 +{
13156 + host->data = NULL;
13157 + dma_unmap_sg(&host->pdev->dev, data->sg, host->dma.req.nr_sg,
13158 + ((data->flags & MMC_DATA_WRITE)
13159 + ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
13160 +
13161 + /*
13162 + * Data might complete before command for very short transfers
13163 + * (like READ_SCR)
13164 + */
13165 + if (mci_cmd_is_complete(host)
13166 + && (!data->stop || mci_stop_is_complete(host)))
13167 + atmci_request_end(host->mmc, data->mrq);
13168 +}
13169 +
13170 +static void atmci_command_complete(struct atmel_mci *host,
13171 + struct mmc_command *cmd, u32 status)
13172 +{
13173 + if (status & MCI_BIT(RTOE))
13174 + cmd->error = -ETIMEDOUT;
13175 + else if ((cmd->flags & MMC_RSP_CRC)
13176 + && (status & MCI_BIT(RCRCE)))
13177 + cmd->error = -EILSEQ;
13178 + else if (status & (MCI_BIT(RINDE) | MCI_BIT(RDIRE) | MCI_BIT(RENDE)))
13179 + cmd->error = -EIO;
13180 +
13181 + if (cmd->error) {
13182 + dev_dbg(&host->mmc->class_dev,
13183 + "command error: op=0x%x status=0x%08x\n",
13184 + cmd->opcode, status);
13185 +
13186 + if (cmd->data) {
13187 + dma_stop_request(host->dma.req.req.dmac,
13188 + host->dma.req.req.channel);
13189 + mci_writel(host, IDR, MCI_BIT(NOTBUSY)
13190 + | MCI_DATA_ERROR_FLAGS);
13191 + host->data = NULL;
13192 + }
13193 + }
13194 +}
13195 +
13196 +static void atmci_tasklet_func(unsigned long priv)
13197 +{
13198 + struct mmc_host *mmc = (struct mmc_host *)priv;
13199 + struct atmel_mci *host = mmc_priv(mmc);
13200 + struct mmc_request *mrq = host->mrq;
13201 + struct mmc_data *data = host->data;
13202 +
13203 + dev_vdbg(&mmc->class_dev,
13204 + "tasklet: pending/completed/mask %lx/%lx/%x\n",
13205 + host->pending_events, host->completed_events,
13206 + mci_readl(host, IMR));
13207 +
13208 + if (mci_clear_cmd_is_pending(host)) {
13209 + mci_set_cmd_complete(host);
13210 + atmci_command_complete(host, mrq->cmd, host->cmd_status);
13211 + if (!host->data || mci_data_is_complete(host)
13212 + || mci_data_error_is_complete(host))
13213 + atmci_request_end(mmc, mrq);
13214 + }
13215 + if (mci_clear_stop_is_pending(host)) {
13216 + mci_set_stop_complete(host);
13217 + atmci_command_complete(host, mrq->stop, host->stop_status);
13218 + if (mci_data_is_complete(host)
13219 + || mci_data_error_is_complete(host))
13220 + atmci_request_end(mmc, mrq);
13221 + }
13222 + if (mci_clear_dma_error_is_pending(host)) {
13223 + mci_set_dma_error_complete(host);
13224 + mci_clear_data_pending(host);
13225 +
13226 + /* DMA controller got bus error => invalid address */
13227 + data->error = -EIO;
13228 +
13229 + dev_dbg(&mmc->class_dev, "dma error after %u bytes xfered\n",
13230 + host->data->bytes_xfered);
13231 +
13232 + if (data->stop
13233 + && !mci_set_stop_sent_is_completed(host))
13234 + /* TODO: Check if card is still present */
13235 + send_stop_cmd(host->mmc, data, 0);
13236 +
13237 + atmci_data_complete(host, data);
13238 + }
13239 + if (mci_clear_data_error_is_pending(host)) {
13240 + u32 status = host->data_status;
13241 +
13242 + mci_set_data_error_complete(host);
13243 + mci_clear_data_pending(host);
13244 +
13245 + dma_stop_request(host->dma.req.req.dmac,
13246 + host->dma.req.req.channel);
13247 +
13248 + if (status & MCI_BIT(DCRCE)) {
13249 + dev_dbg(&mmc->class_dev, "data CRC error\n");
13250 + data->error = -EILSEQ;
13251 + } else if (status & MCI_BIT(DTOE)) {
13252 + dev_dbg(&mmc->class_dev, "data timeout error\n");
13253 + data->error = -ETIMEDOUT;
13254 + } else {
13255 + dev_dbg(&mmc->class_dev, "data FIFO error\n");
13256 + data->error = -EIO;
13257 + }
13258 + dev_dbg(&mmc->class_dev, "bytes xfered: %u\n",
13259 + data->bytes_xfered);
13260 +
13261 + if (data->stop
13262 + && !mci_set_stop_sent_is_completed(host))
13263 + /* TODO: Check if card is still present */
13264 + send_stop_cmd(host->mmc, data, 0);
13265 +
13266 + atmci_data_complete(host, data);
13267 + }
13268 + if (mci_clear_data_is_pending(host)) {
13269 + mci_set_data_complete(host);
13270 + data->bytes_xfered = data->blocks * data->blksz;
13271 + atmci_data_complete(host, data);
13272 + }
13273 + if (mci_clear_card_detect_is_pending(host)) {
13274 + /* Reset controller if card is gone */
13275 + if (!host->present) {
13276 + mci_writel(host, CR, MCI_BIT(SWRST));
13277 + mci_writel(host, IDR, ~0UL);
13278 + mci_writel(host, CR, MCI_BIT(MCIEN));
13279 + }
13280 +
13281 + /* Clean up queue if present */
13282 + if (mrq) {
13283 + if (!mci_cmd_is_complete(host))
13284 + mrq->cmd->error = -ETIMEDOUT;
13285 + if (mrq->data && !mci_data_is_complete(host)
13286 + && !mci_data_error_is_complete(host)) {
13287 + dma_stop_request(host->dma.req.req.dmac,
13288 + host->dma.req.req.channel);
13289 + host->data->error = -ETIMEDOUT;
13290 + atmci_data_complete(host, data);
13291 + }
13292 + if (mrq->stop && !mci_stop_is_complete(host))
13293 + mrq->stop->error = -ETIMEDOUT;
13294 +
13295 + host->cmd = NULL;
13296 + atmci_request_end(mmc, mrq);
13297 + }
13298 + mmc_detect_change(host->mmc, msecs_to_jiffies(100));
13299 + }
13300 +}
13301 +
13302 +static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status)
13303 +{
13304 + struct atmel_mci *host = mmc_priv(mmc);
13305 + struct mmc_command *cmd = host->cmd;
13306 +
13307 + /*
13308 + * Read the response now so that we're free to send a new
13309 + * command immediately.
13310 + */
13311 + cmd->resp[0] = mci_readl(host, RSPR);
13312 + cmd->resp[1] = mci_readl(host, RSPR);
13313 + cmd->resp[2] = mci_readl(host, RSPR);
13314 + cmd->resp[3] = mci_readl(host, RSPR);
13315 +
13316 + mci_writel(host, IDR, MCI_BIT(CMDRDY));
13317 + host->cmd = NULL;
13318 +
13319 + if (mci_stop_sent_is_complete(host)) {
13320 + host->stop_status = status;
13321 + mci_set_stop_pending(host);
13322 + } else {
13323 + if (host->mrq->stop && mci_dma_is_complete(host)
13324 + && !mci_set_stop_sent_is_completed(host))
13325 + send_stop_cmd(host->mmc, host->data, 0);
13326 + host->cmd_status = status;
13327 + mci_set_cmd_pending(host);
13328 + }
13329 +
13330 + tasklet_schedule(&host->tasklet);
13331 +}
13332 +
13333 +static void atmci_xfer_complete(struct dma_request *_req)
13334 +{
13335 + struct dma_request_sg *req = to_dma_request_sg(_req);
13336 + struct atmel_mci_dma *dma;
13337 + struct atmel_mci *host;
13338 + struct mmc_data *data;
13339 +
13340 + dma = container_of(req, struct atmel_mci_dma, req);
13341 + host = container_of(dma, struct atmel_mci, dma);
13342 + data = host->data;
13343 +
13344 + /*
13345 + * This callback may be called before we see the CMDRDY
13346 + * interrupt under heavy irq load (possibly caused by other
13347 + * drivers) or when interrupts are disabled for a long time.
13348 + */
13349 + mci_set_dma_complete(host);
13350 + if (data->stop && mci_cmd_is_complete(host)
13351 + && !mci_set_stop_sent_is_completed(host))
13352 + send_stop_cmd(host->mmc, data, 0);
13353 +
13354 + /*
13355 + * Regardless of what the documentation says, we have to wait
13356 + * for NOTBUSY even after block read operations.
13357 + *
13358 + * When the DMA transfer is complete, the controller may still
13359 + * be reading the CRC from the card, i.e. the data transfer is
13360 + * still in progress and we haven't seen all the potential
13361 + * error bits yet.
13362 + */
13363 + mci_writel(host, IER, MCI_BIT(NOTBUSY));
13364 +}
13365 +
13366 +static void atmci_dma_error(struct dma_request *_req)
13367 +{
13368 + struct dma_request_sg *req = to_dma_request_sg(_req);
13369 + struct atmel_mci_dma *dma;
13370 + struct atmel_mci *host;
13371 +
13372 + dma = container_of(req, struct atmel_mci_dma, req);
13373 + host = container_of(dma, struct atmel_mci, dma);
13374 +
13375 + mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
13376 + | MCI_DATA_ERROR_FLAGS));
13377 +
13378 + mci_set_dma_error_pending(host);
13379 + tasklet_schedule(&host->tasklet);
13380 +}
13381 +
13382 +static irqreturn_t atmci_interrupt(int irq, void *dev_id)
13383 +{
13384 + struct mmc_host *mmc = dev_id;
13385 + struct atmel_mci *host = mmc_priv(mmc);
13386 + u32 status, mask, pending;
13387 +
13388 + spin_lock(&mmc->lock);
13389 +
13390 + status = mci_readl(host, SR);
13391 + mask = mci_readl(host, IMR);
13392 + pending = status & mask;
13393 +
13394 + do {
13395 + if (pending & MCI_DATA_ERROR_FLAGS) {
13396 + mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
13397 + | MCI_DATA_ERROR_FLAGS));
13398 + host->data_status = status;
13399 + mci_set_data_error_pending(host);
13400 + tasklet_schedule(&host->tasklet);
13401 + break;
13402 + }
13403 + if (pending & MCI_BIT(CMDRDY))
13404 + atmci_cmd_interrupt(mmc, status);
13405 + if (pending & MCI_BIT(NOTBUSY)) {
13406 + mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
13407 + | MCI_DATA_ERROR_FLAGS));
13408 + mci_set_data_pending(host);
13409 + tasklet_schedule(&host->tasklet);
13410 + }
13411 +
13412 + status = mci_readl(host, SR);
13413 + mask = mci_readl(host, IMR);
13414 + pending = status & mask;
13415 + } while (pending);
13416 +
13417 + spin_unlock(&mmc->lock);
13418 +
13419 + return IRQ_HANDLED;
13420 +}
13421 +
13422 +static irqreturn_t atmci_detect_change(int irq, void *dev_id)
13423 +{
13424 + struct mmc_host *mmc = dev_id;
13425 + struct atmel_mci *host = mmc_priv(mmc);
13426 +
13427 + int present = !gpio_get_value(irq_to_gpio(irq));
13428 +
13429 + if (present != host->present) {
13430 + dev_dbg(&mmc->class_dev, "card %s\n",
13431 + present ? "inserted" : "removed");
13432 + host->present = present;
13433 + mci_set_card_detect_pending(host);
13434 + tasklet_schedule(&host->tasklet);
13435 + }
13436 + return IRQ_HANDLED;
13437 +}
13438 +
13439 +static int __devinit atmci_probe(struct platform_device *pdev)
13440 +{
13441 + struct mci_platform_data *board;
13442 + struct atmel_mci *host;
13443 + struct mmc_host *mmc;
13444 + struct resource *regs;
13445 + int irq;
13446 + int ret;
13447 +
13448 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
13449 + if (!regs)
13450 + return -ENXIO;
13451 + irq = platform_get_irq(pdev, 0);
13452 + if (irq < 0)
13453 + return irq;
13454 +
13455 + board = pdev->dev.platform_data;
13456 +
13457 + mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev);
13458 + if (!mmc)
13459 + return -ENOMEM;
13460 +
13461 + host = mmc_priv(mmc);
13462 + host->pdev = pdev;
13463 + host->mmc = mmc;
13464 + if (board) {
13465 + host->detect_pin = board->detect_pin;
13466 + host->wp_pin = board->wp_pin;
13467 + } else {
13468 + host->detect_pin = -1;
13469 + host->detect_pin = -1;
13470 + }
13471 +
13472 + host->mck = clk_get(&pdev->dev, "mci_clk");
13473 + if (IS_ERR(host->mck)) {
13474 + ret = PTR_ERR(host->mck);
13475 + goto out_free_host;
13476 + }
13477 + clk_enable(host->mck);
13478 +
13479 + ret = -ENOMEM;
13480 + host->regs = ioremap(regs->start, regs->end - regs->start + 1);
13481 + if (!host->regs)
13482 + goto out_disable_clk;
13483 +
13484 + host->bus_hz = clk_get_rate(host->mck);
13485 + host->mapbase = regs->start;
13486 +
13487 + mmc->ops = &atmci_ops;
13488 + mmc->f_min = (host->bus_hz + 511) / 512;
13489 + mmc->f_max = min((unsigned int)(host->bus_hz / 2), fmax);
13490 + mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
13491 + mmc->caps |= MMC_CAP_4_BIT_DATA;
13492 +
13493 + tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc);
13494 +
13495 + ret = request_irq(irq, atmci_interrupt, 0, "mmci", mmc);
13496 + if (ret)
13497 + goto out_unmap;
13498 +
13499 + /* Assume card is present if we don't have a detect pin */
13500 + host->present = 1;
13501 + if (host->detect_pin >= 0) {
13502 + if (gpio_request(host->detect_pin, "mmc_detect")) {
13503 + dev_dbg(&mmc->class_dev, "no detect pin available\n");
13504 + host->detect_pin = -1;
13505 + } else {
13506 + host->present = !gpio_get_value(host->detect_pin);
13507 + }
13508 + }
13509 + if (host->wp_pin >= 0) {
13510 + if (gpio_request(host->wp_pin, "mmc_wp")) {
13511 + dev_dbg(&mmc->class_dev, "no WP pin available\n");
13512 + host->wp_pin = -1;
13513 + }
13514 + }
13515 +
13516 + /* TODO: Get this information from platform data */
13517 + ret = -ENOMEM;
13518 + host->dma.req.req.dmac = find_dma_controller(0);
13519 + if (!host->dma.req.req.dmac) {
13520 + dev_dbg(&mmc->class_dev, "no DMA controller available\n");
13521 + goto out_free_irq;
13522 + }
13523 + ret = dma_alloc_channel(host->dma.req.req.dmac);
13524 + if (ret < 0) {
13525 + dev_dbg(&mmc->class_dev, "unable to allocate DMA channel\n");
13526 + goto out_free_irq;
13527 + }
13528 + host->dma.req.req.channel = ret;
13529 + host->dma.req.width = DMA_WIDTH_32BIT;
13530 + host->dma.req.req.xfer_complete = atmci_xfer_complete;
13531 + host->dma.req.req.block_complete = NULL; // atmci_block_complete;
13532 + host->dma.req.req.error = atmci_dma_error;
13533 + host->dma.rx_periph_id = 0;
13534 + host->dma.tx_periph_id = 1;
13535 +
13536 + mci_writel(host, CR, MCI_BIT(SWRST));
13537 + mci_writel(host, IDR, ~0UL);
13538 +
13539 + platform_set_drvdata(pdev, host);
13540 +
13541 + mmc_add_host(mmc);
13542 +
13543 + if (host->detect_pin >= 0) {
13544 + ret = request_irq(gpio_to_irq(host->detect_pin),
13545 + atmci_detect_change,
13546 + IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
13547 + DRIVER_NAME, mmc);
13548 + if (ret) {
13549 + dev_dbg(&mmc->class_dev,
13550 + "could not request IRQ %d for detect pin\n",
13551 + gpio_to_irq(host->detect_pin));
13552 + gpio_free(host->detect_pin);
13553 + host->detect_pin = -1;
13554 + }
13555 + }
13556 +
13557 + dev_info(&mmc->class_dev, "Atmel MCI controller at 0x%08lx irq %d\n",
13558 + host->mapbase, irq);
13559 +
13560 + atmci_init_debugfs(host);
13561 +
13562 + return 0;
13563 +
13564 +out_free_irq:
13565 + if (host->detect_pin >= 0)
13566 + gpio_free(host->detect_pin);
13567 + if (host->wp_pin >= 0)
13568 + gpio_free(host->wp_pin);
13569 + free_irq(irq, mmc);
13570 +out_unmap:
13571 + iounmap(host->regs);
13572 +out_disable_clk:
13573 + clk_disable(host->mck);
13574 + clk_put(host->mck);
13575 +out_free_host:
13576 + mmc_free_host(mmc);
13577 + return ret;
13578 +}
13579 +
13580 +static int __devexit atmci_remove(struct platform_device *pdev)
13581 +{
13582 + struct atmel_mci *host = platform_get_drvdata(pdev);
13583 +
13584 + platform_set_drvdata(pdev, NULL);
13585 +
13586 + if (host) {
13587 + atmci_cleanup_debugfs(host);
13588 +
13589 + if (host->detect_pin >= 0) {
13590 + free_irq(gpio_to_irq(host->detect_pin), host->mmc);
13591 + cancel_delayed_work(&host->mmc->detect);
13592 + gpio_free(host->detect_pin);
13593 + }
13594 +
13595 + mmc_remove_host(host->mmc);
13596 +
13597 + mci_writel(host, IDR, ~0UL);
13598 + mci_writel(host, CR, MCI_BIT(MCIDIS));
13599 + mci_readl(host, SR);
13600 +
13601 + dma_release_channel(host->dma.req.req.dmac,
13602 + host->dma.req.req.channel);
13603 +
13604 + if (host->wp_pin >= 0)
13605 + gpio_free(host->wp_pin);
13606 +
13607 + free_irq(platform_get_irq(pdev, 0), host->mmc);
13608 + iounmap(host->regs);
13609 +
13610 + clk_disable(host->mck);
13611 + clk_put(host->mck);
13612 +
13613 + mmc_free_host(host->mmc);
13614 + }
13615 + return 0;
13616 +}
13617 +
13618 +static struct platform_driver atmci_driver = {
13619 + .probe = atmci_probe,
13620 + .remove = __devexit_p(atmci_remove),
13621 + .driver = {
13622 + .name = DRIVER_NAME,
13623 + },
13624 +};
13625 +
13626 +static int __init atmci_init(void)
13627 +{
13628 + return platform_driver_register(&atmci_driver);
13629 +}
13630 +
13631 +static void __exit atmci_exit(void)
13632 +{
13633 + platform_driver_unregister(&atmci_driver);
13634 +}
13635 +
13636 +module_init(atmci_init);
13637 +module_exit(atmci_exit);
13638 +
13639 +MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
13640 +MODULE_LICENSE("GPL");
13641 diff --git a/drivers/mmc/host/atmel-mci.h b/drivers/mmc/host/atmel-mci.h
13642 new file mode 100644
13643 index 0000000..60d15c4
13644 --- /dev/null
13645 +++ b/drivers/mmc/host/atmel-mci.h
13646 @@ -0,0 +1,192 @@
13647 +/*
13648 + * Atmel MultiMedia Card Interface driver
13649 + *
13650 + * Copyright (C) 2004-2006 Atmel Corporation
13651 + *
13652 + * This program is free software; you can redistribute it and/or modify
13653 + * it under the terms of the GNU General Public License version 2 as
13654 + * published by the Free Software Foundation.
13655 + */
13656 +#ifndef __DRIVERS_MMC_ATMEL_MCI_H__
13657 +#define __DRIVERS_MMC_ATMEL_MCI_H__
13658 +
13659 +/* MCI register offsets */
13660 +#define MCI_CR 0x0000
13661 +#define MCI_MR 0x0004
13662 +#define MCI_DTOR 0x0008
13663 +#define MCI_SDCR 0x000c
13664 +#define MCI_ARGR 0x0010
13665 +#define MCI_CMDR 0x0014
13666 +#define MCI_BLKR 0x0018
13667 +#define MCI_RSPR 0x0020
13668 +#define MCI_RSPR1 0x0024
13669 +#define MCI_RSPR2 0x0028
13670 +#define MCI_RSPR3 0x002c
13671 +#define MCI_RDR 0x0030
13672 +#define MCI_TDR 0x0034
13673 +#define MCI_SR 0x0040
13674 +#define MCI_IER 0x0044
13675 +#define MCI_IDR 0x0048
13676 +#define MCI_IMR 0x004c
13677 +
13678 +/* Bitfields in CR */
13679 +#define MCI_MCIEN_OFFSET 0
13680 +#define MCI_MCIEN_SIZE 1
13681 +#define MCI_MCIDIS_OFFSET 1
13682 +#define MCI_MCIDIS_SIZE 1
13683 +#define MCI_PWSEN_OFFSET 2
13684 +#define MCI_PWSEN_SIZE 1
13685 +#define MCI_PWSDIS_OFFSET 3
13686 +#define MCI_PWSDIS_SIZE 1
13687 +#define MCI_SWRST_OFFSET 7
13688 +#define MCI_SWRST_SIZE 1
13689 +
13690 +/* Bitfields in MR */
13691 +#define MCI_CLKDIV_OFFSET 0
13692 +#define MCI_CLKDIV_SIZE 8
13693 +#define MCI_PWSDIV_OFFSET 8
13694 +#define MCI_PWSDIV_SIZE 3
13695 +#define MCI_RDPROOF_OFFSET 11
13696 +#define MCI_RDPROOF_SIZE 1
13697 +#define MCI_WRPROOF_OFFSET 12
13698 +#define MCI_WRPROOF_SIZE 1
13699 +#define MCI_DMAPADV_OFFSET 14
13700 +#define MCI_DMAPADV_SIZE 1
13701 +#define MCI_BLKLEN_OFFSET 16
13702 +#define MCI_BLKLEN_SIZE 16
13703 +
13704 +/* Bitfields in DTOR */
13705 +#define MCI_DTOCYC_OFFSET 0
13706 +#define MCI_DTOCYC_SIZE 4
13707 +#define MCI_DTOMUL_OFFSET 4
13708 +#define MCI_DTOMUL_SIZE 3
13709 +
13710 +/* Bitfields in SDCR */
13711 +#define MCI_SDCSEL_OFFSET 0
13712 +#define MCI_SDCSEL_SIZE 4
13713 +#define MCI_SDCBUS_OFFSET 7
13714 +#define MCI_SDCBUS_SIZE 1
13715 +
13716 +/* Bitfields in ARGR */
13717 +#define MCI_ARG_OFFSET 0
13718 +#define MCI_ARG_SIZE 32
13719 +
13720 +/* Bitfields in CMDR */
13721 +#define MCI_CMDNB_OFFSET 0
13722 +#define MCI_CMDNB_SIZE 6
13723 +#define MCI_RSPTYP_OFFSET 6
13724 +#define MCI_RSPTYP_SIZE 2
13725 +#define MCI_SPCMD_OFFSET 8
13726 +#define MCI_SPCMD_SIZE 3
13727 +#define MCI_OPDCMD_OFFSET 11
13728 +#define MCI_OPDCMD_SIZE 1
13729 +#define MCI_MAXLAT_OFFSET 12
13730 +#define MCI_MAXLAT_SIZE 1
13731 +#define MCI_TRCMD_OFFSET 16
13732 +#define MCI_TRCMD_SIZE 2
13733 +#define MCI_TRDIR_OFFSET 18
13734 +#define MCI_TRDIR_SIZE 1
13735 +#define MCI_TRTYP_OFFSET 19
13736 +#define MCI_TRTYP_SIZE 2
13737 +
13738 +/* Bitfields in BLKR */
13739 +#define MCI_BCNT_OFFSET 0
13740 +#define MCI_BCNT_SIZE 16
13741 +
13742 +/* Bitfields in RSPRn */
13743 +#define MCI_RSP_OFFSET 0
13744 +#define MCI_RSP_SIZE 32
13745 +
13746 +/* Bitfields in SR/IER/IDR/IMR */
13747 +#define MCI_CMDRDY_OFFSET 0
13748 +#define MCI_CMDRDY_SIZE 1
13749 +#define MCI_RXRDY_OFFSET 1
13750 +#define MCI_RXRDY_SIZE 1
13751 +#define MCI_TXRDY_OFFSET 2
13752 +#define MCI_TXRDY_SIZE 1
13753 +#define MCI_BLKE_OFFSET 3
13754 +#define MCI_BLKE_SIZE 1
13755 +#define MCI_DTIP_OFFSET 4
13756 +#define MCI_DTIP_SIZE 1
13757 +#define MCI_NOTBUSY_OFFSET 5
13758 +#define MCI_NOTBUSY_SIZE 1
13759 +#define MCI_ENDRX_OFFSET 6
13760 +#define MCI_ENDRX_SIZE 1
13761 +#define MCI_ENDTX_OFFSET 7
13762 +#define MCI_ENDTX_SIZE 1
13763 +#define MCI_RXBUFF_OFFSET 14
13764 +#define MCI_RXBUFF_SIZE 1
13765 +#define MCI_TXBUFE_OFFSET 15
13766 +#define MCI_TXBUFE_SIZE 1
13767 +#define MCI_RINDE_OFFSET 16
13768 +#define MCI_RINDE_SIZE 1
13769 +#define MCI_RDIRE_OFFSET 17
13770 +#define MCI_RDIRE_SIZE 1
13771 +#define MCI_RCRCE_OFFSET 18
13772 +#define MCI_RCRCE_SIZE 1
13773 +#define MCI_RENDE_OFFSET 19
13774 +#define MCI_RENDE_SIZE 1
13775 +#define MCI_RTOE_OFFSET 20
13776 +#define MCI_RTOE_SIZE 1
13777 +#define MCI_DCRCE_OFFSET 21
13778 +#define MCI_DCRCE_SIZE 1
13779 +#define MCI_DTOE_OFFSET 22
13780 +#define MCI_DTOE_SIZE 1
13781 +#define MCI_OVRE_OFFSET 30
13782 +#define MCI_OVRE_SIZE 1
13783 +#define MCI_UNRE_OFFSET 31
13784 +#define MCI_UNRE_SIZE 1
13785 +
13786 +/* Constants for DTOMUL */
13787 +#define MCI_DTOMUL_1_CYCLE 0
13788 +#define MCI_DTOMUL_16_CYCLES 1
13789 +#define MCI_DTOMUL_128_CYCLES 2
13790 +#define MCI_DTOMUL_256_CYCLES 3
13791 +#define MCI_DTOMUL_1024_CYCLES 4
13792 +#define MCI_DTOMUL_4096_CYCLES 5
13793 +#define MCI_DTOMUL_65536_CYCLES 6
13794 +#define MCI_DTOMUL_1048576_CYCLES 7
13795 +
13796 +/* Constants for RSPTYP */
13797 +#define MCI_RSPTYP_NO_RESP 0
13798 +#define MCI_RSPTYP_48_BIT 1
13799 +#define MCI_RSPTYP_136_BIT 2
13800 +
13801 +/* Constants for SPCMD */
13802 +#define MCI_SPCMD_NO_SPEC_CMD 0
13803 +#define MCI_SPCMD_INIT_CMD 1
13804 +#define MCI_SPCMD_SYNC_CMD 2
13805 +#define MCI_SPCMD_INT_CMD 4
13806 +#define MCI_SPCMD_INT_RESP 5
13807 +
13808 +/* Constants for TRCMD */
13809 +#define MCI_TRCMD_NO_TRANS 0
13810 +#define MCI_TRCMD_START_TRANS 1
13811 +#define MCI_TRCMD_STOP_TRANS 2
13812 +
13813 +/* Constants for TRTYP */
13814 +#define MCI_TRTYP_BLOCK 0
13815 +#define MCI_TRTYP_MULTI_BLOCK 1
13816 +#define MCI_TRTYP_STREAM 2
13817 +
13818 +/* Bit manipulation macros */
13819 +#define MCI_BIT(name) \
13820 + (1 << MCI_##name##_OFFSET)
13821 +#define MCI_BF(name,value) \
13822 + (((value) & ((1 << MCI_##name##_SIZE) - 1)) \
13823 + << MCI_##name##_OFFSET)
13824 +#define MCI_BFEXT(name,value) \
13825 + (((value) >> MCI_##name##_OFFSET) \
13826 + & ((1 << MCI_##name##_SIZE) - 1))
13827 +#define MCI_BFINS(name,value,old) \
13828 + (((old) & ~(((1 << MCI_##name##_SIZE) - 1) \
13829 + << MCI_##name##_OFFSET)) \
13830 + | MCI_BF(name,value))
13831 +
13832 +/* Register access macros */
13833 +#define mci_readl(port,reg) \
13834 + __raw_readl((port)->regs + MCI_##reg)
13835 +#define mci_writel(port,reg,value) \
13836 + __raw_writel((value), (port)->regs + MCI_##reg)
13837 +
13838 +#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */
13839 diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c
13840 index 1707f98..d2ec6eb 100644
13841 --- a/drivers/mtd/chips/cfi_cmdset_0001.c
13842 +++ b/drivers/mtd/chips/cfi_cmdset_0001.c
13843 @@ -50,6 +50,7 @@
13844 #define I82802AC 0x00ac
13845 #define MANUFACTURER_ST 0x0020
13846 #define M50LPW080 0x002F
13847 +#define AT49BV640D 0x02de
13848
13849 static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
13850 static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
13851 @@ -157,6 +158,47 @@ static void cfi_tell_features(struct cfi_pri_intelext *extp)
13852 }
13853 #endif
13854
13855 +/* Atmel chips don't use the same PRI format as Intel chips */
13856 +static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
13857 +{
13858 + struct map_info *map = mtd->priv;
13859 + struct cfi_private *cfi = map->fldrv_priv;
13860 + struct cfi_pri_intelext *extp = cfi->cmdset_priv;
13861 + struct cfi_pri_atmel atmel_pri;
13862 + uint32_t features = 0;
13863 +
13864 + /* Reverse byteswapping */
13865 + extp->FeatureSupport = cpu_to_le32(extp->FeatureSupport);
13866 + extp->BlkStatusRegMask = cpu_to_le16(extp->BlkStatusRegMask);
13867 + extp->ProtRegAddr = cpu_to_le16(extp->ProtRegAddr);
13868 +
13869 + memcpy(&atmel_pri, extp, sizeof(atmel_pri));
13870 + memset((char *)extp + 5, 0, sizeof(*extp) - 5);
13871 +
13872 + printk(KERN_ERR "atmel Features: %02x\n", atmel_pri.Features);
13873 +
13874 + if (atmel_pri.Features & 0x01) /* chip erase supported */
13875 + features |= (1<<0);
13876 + if (atmel_pri.Features & 0x02) /* erase suspend supported */
13877 + features |= (1<<1);
13878 + if (atmel_pri.Features & 0x04) /* program suspend supported */
13879 + features |= (1<<2);
13880 + if (atmel_pri.Features & 0x08) /* simultaneous operations supported */
13881 + features |= (1<<9);
13882 + if (atmel_pri.Features & 0x20) /* page mode read supported */
13883 + features |= (1<<7);
13884 + if (atmel_pri.Features & 0x40) /* queued erase supported */
13885 + features |= (1<<4);
13886 + if (atmel_pri.Features & 0x80) /* Protection bits supported */
13887 + features |= (1<<6);
13888 +
13889 + extp->FeatureSupport = features;
13890 +
13891 + /* burst write mode not supported */
13892 + cfi->cfiq->BufWriteTimeoutTyp = 0;
13893 + cfi->cfiq->BufWriteTimeoutMax = 0;
13894 +}
13895 +
13896 #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
13897 /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */
13898 static void fixup_intel_strataflash(struct mtd_info *mtd, void* param)
13899 @@ -234,6 +276,7 @@ static void fixup_use_powerup_lock(struct mtd_info *mtd, void *param)
13900 }
13901
13902 static struct cfi_fixup cfi_fixup_table[] = {
13903 + { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
13904 #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
13905 { CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL },
13906 #endif
13907 diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
13908 index 389acc6..571226e 100644
13909 --- a/drivers/mtd/chips/cfi_cmdset_0002.c
13910 +++ b/drivers/mtd/chips/cfi_cmdset_0002.c
13911 @@ -185,6 +185,10 @@ static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
13912 extp->TopBottom = 2;
13913 else
13914 extp->TopBottom = 3;
13915 +
13916 + /* burst write mode not supported */
13917 + cfi->cfiq->BufWriteTimeoutTyp = 0;
13918 + cfi->cfiq->BufWriteTimeoutMax = 0;
13919 }
13920
13921 static void fixup_use_secsi(struct mtd_info *mtd, void *param)
13922 @@ -217,6 +221,7 @@ static void fixup_use_atmel_lock(struct mtd_info *mtd, void *param)
13923 }
13924
13925 static struct cfi_fixup cfi_fixup_table[] = {
13926 + { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
13927 #ifdef AMD_BOOTLOC_BUG
13928 { CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL },
13929 #endif
13930 @@ -229,7 +234,6 @@ static struct cfi_fixup cfi_fixup_table[] = {
13931 #if !FORCE_WORD_WRITE
13932 { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, },
13933 #endif
13934 - { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
13935 { 0, 0, NULL, NULL }
13936 };
13937 static struct cfi_fixup jedec_fixup_table[] = {
13938 diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig
13939 index 519b4ff..847f983 100644
13940 --- a/drivers/pcmcia/Kconfig
13941 +++ b/drivers/pcmcia/Kconfig
13942 @@ -276,6 +276,13 @@ config ELECTRA_CF
13943 Say Y here to support the CompactFlash controller on the
13944 PA Semi Electra eval board.
13945
13946 +config AT32_CF
13947 + tristate "AT32AP CompactFlash Controller"
13948 + depends on PCMCIA && AVR32 && PLATFORM_AT32AP
13949 + help
13950 + Say Y here to support the CompactFlash controller on AT32 chips.
13951 + Or choose M to compile the driver as a module named "at32_cf".
13952 +
13953 config PCCARD_NONSTATIC
13954 tristate
13955
13956 diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile
13957 index 6f6478b..3526fd8 100644
13958 --- a/drivers/pcmcia/Makefile
13959 +++ b/drivers/pcmcia/Makefile
13960 @@ -38,6 +38,7 @@ obj-$(CONFIG_PCMCIA_VRC4173) += vrc4173_cardu.o
13961 obj-$(CONFIG_OMAP_CF) += omap_cf.o
13962 obj-$(CONFIG_AT91_CF) += at91_cf.o
13963 obj-$(CONFIG_ELECTRA_CF) += electra_cf.o
13964 +obj-$(CONFIG_AT32_CF) += at32_cf.o
13965
13966 sa11xx_core-y += soc_common.o sa11xx_base.o
13967 pxa2xx_core-y += soc_common.o pxa2xx_base.o
13968 diff --git a/drivers/pcmcia/at32_cf.c b/drivers/pcmcia/at32_cf.c
13969 new file mode 100644
13970 index 0000000..010bdfd
13971 --- /dev/null
13972 +++ b/drivers/pcmcia/at32_cf.c
13973 @@ -0,0 +1,533 @@
13974 +/*
13975 + * Driver for AVR32 Static Memory Controller: CompactFlash support
13976 + *
13977 + * Copyright (C) 2006 Atmel Norway
13978 + *
13979 + * This program is free software; you can redistribute it and/or
13980 + * modify it under the terms of the GNU General Public License as
13981 + * published by the Free Software Foundation; either version 2 of the
13982 + * License, or (at your option) any later version.
13983 + *
13984 + * This program is distributed in the hope that it will be useful, but
13985 + * WITHOUT ANY WARRANTY; without even the implied warranty of
13986 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13987 + * General Public License for more details.
13988 + *
13989 + * You should have received a copy of the GNU General Public License
13990 + * along with this program; if not, write to the Free Software
13991 + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
13992 + * 02111-1307, USA.
13993 + *
13994 + * The full GNU General Public License is included in this
13995 + * distribution in the file called COPYING.
13996 + */
13997 +#include <linux/module.h>
13998 +#include <linux/kernel.h>
13999 +#include <linux/platform_device.h>
14000 +#include <linux/init.h>
14001 +#include <linux/device.h>
14002 +#include <linux/delay.h>
14003 +#include <linux/interrupt.h>
14004 +#include <linux/err.h>
14005 +#include <linux/clk.h>
14006 +#include <linux/dma-mapping.h>
14007 +
14008 +#include <pcmcia/ss.h>
14009 +
14010 +#include <asm/gpio.h>
14011 +#include <asm/io.h>
14012 +#include <asm/arch/board.h>
14013 +
14014 +#include <asm/arch/smc.h>
14015 +
14016 +struct at32_cf_socket {
14017 + struct pcmcia_socket socket;
14018 + int detect_pin;
14019 + int reset_pin;
14020 + int vcc_pin;
14021 + int ready_pin;
14022 + struct resource res_attr;
14023 + struct resource res_mem;
14024 + struct resource res_io;
14025 + struct smc_config smc;
14026 + unsigned int irq;
14027 + unsigned int cf_cs;
14028 + socket_state_t state;
14029 + unsigned present:1;
14030 +};
14031 +#define to_at32_cf(sock) container_of(sock, struct at32_cf_socket, socket)
14032 +
14033 +/*
14034 + * We have the following memory layout relative to the base address:
14035 + *
14036 + * Alt IDE Mode: 00e0 0000 -> 00ff ffff
14037 + * True IDE Mode: 00c0 0000 -> 00df ffff
14038 + * I/O memory: 0080 0000 -> 00bf ffff
14039 + * Common memory: 0040 0000 -> 007f ffff
14040 + * Attribute memory: 0000 0000 -> 003f ffff
14041 + */
14042 +#define CF_ATTR_OFFSET 0x00000000
14043 +#define CF_MEM_OFFSET 0x00400000
14044 +#define CF_IO_OFFSET 0x00800000
14045 +#define CF_RES_SIZE 4096
14046 +
14047 +#ifdef DEBUG
14048 +
14049 +static int pc_debug;
14050 +module_param(pc_debug, int, 0644);
14051 +
14052 +static void at32_cf_debug(struct at32_cf_socket *cf, const char *func,
14053 + int level, const char *fmt, ...)
14054 +{
14055 + va_list args;
14056 +
14057 + if (pc_debug > level) {
14058 + printk(KERN_DEBUG "at32_cf/%u: %s: ", cf->cf_cs, func);
14059 + va_start(args, fmt);
14060 + vprintk(fmt, args);
14061 + va_end(args);
14062 + }
14063 +}
14064 +
14065 +#define debug(cf, lvl, fmt, arg...) \
14066 + at32_cf_debug(cf, __func__, lvl, fmt, ##arg)
14067 +
14068 +#else
14069 +#define debug(cf, lvl, fmt, arg...) do { } while (0)
14070 +#endif
14071 +
14072 +static inline int at32_cf_present(struct at32_cf_socket *cf)
14073 +{
14074 + int present = 1;
14075 +
14076 + /* If we don't have a detect pin, assume the card is present */
14077 + if (cf->detect_pin >= 0)
14078 + present = !gpio_get_value(cf->detect_pin);
14079 +
14080 + return present;
14081 +}
14082 +
14083 +static irqreturn_t at32_cf_irq(int irq, void *dev_id)
14084 +{
14085 + struct at32_cf_socket *cf = dev_id;
14086 + unsigned int present;
14087 +
14088 + present = at32_cf_present(cf);
14089 + if (present != cf->present) {
14090 + cf->present = present;
14091 + debug(cf, 3, "card %s\n", present ? "present" : "gone");
14092 + pcmcia_parse_events(&cf->socket, SS_DETECT);
14093 + }
14094 +
14095 + return IRQ_HANDLED;
14096 +}
14097 +
14098 +static int at32_cf_get_status(struct pcmcia_socket *sock, u_int *value)
14099 +{
14100 + struct at32_cf_socket *cf;
14101 + u_int status = 0;
14102 +
14103 + cf = container_of(sock, struct at32_cf_socket, socket);
14104 +
14105 + if (at32_cf_present(cf)) {
14106 + /* NOTE: gpio on AP7xxx is 3.3V */
14107 + status = SS_DETECT | SS_3VCARD;
14108 + if (cf->ready_pin < 0 || gpio_get_value(cf->ready_pin))
14109 + status |= SS_READY;
14110 + if (cf->vcc_pin < 0 || gpio_get_value(cf->vcc_pin))
14111 + status |= SS_POWERON;
14112 + }
14113 +
14114 + *value = status;
14115 + return 0;
14116 +}
14117 +
14118 +static int at32_cf_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
14119 +{
14120 + struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
14121 +
14122 + debug(cf, 2, "mask: %s%s%s%s%s%sflags: %s%s%s%s%s%sVcc %d Vpp %d irq %d\n",
14123 + (state->csc_mask==0)?"<NONE> ":"",
14124 + (state->csc_mask&SS_DETECT)?"DETECT ":"",
14125 + (state->csc_mask&SS_READY)?"READY ":"",
14126 + (state->csc_mask&SS_BATDEAD)?"BATDEAD ":"",
14127 + (state->csc_mask&SS_BATWARN)?"BATWARN ":"",
14128 + (state->csc_mask&SS_STSCHG)?"STSCHG ":"",
14129 + (state->flags==0)?"<NONE> ":"",
14130 + (state->flags&SS_PWR_AUTO)?"PWR_AUTO ":"",
14131 + (state->flags&SS_IOCARD)?"IOCARD ":"",
14132 + (state->flags&SS_RESET)?"RESET ":"",
14133 + (state->flags&SS_SPKR_ENA)?"SPKR_ENA ":"",
14134 + (state->flags&SS_OUTPUT_ENA)?"OUTPUT_ENA ":"",
14135 + state->Vcc, state->Vpp, state->io_irq);
14136 +
14137 + /*
14138 + * TODO: Allow boards to override this in case they have level
14139 + * converters.
14140 + */
14141 + switch (state->Vcc) {
14142 + case 0:
14143 + if (cf->vcc_pin >= 0)
14144 + gpio_set_value(cf->vcc_pin, 0);
14145 + break;
14146 + case 33:
14147 + if (cf->vcc_pin >= 0)
14148 + gpio_set_value(cf->vcc_pin, 1);
14149 + break;
14150 + default:
14151 + return -EINVAL;
14152 + }
14153 +
14154 + if (cf->reset_pin >= 0)
14155 + gpio_set_value(cf->reset_pin, state->flags & SS_RESET);
14156 +
14157 + cf->state = *state;
14158 +
14159 + return 0;
14160 +}
14161 +
14162 +static int at32_cf_socket_init(struct pcmcia_socket *sock)
14163 +{
14164 + debug(to_at32_cf(sock), 2, "called\n");
14165 +
14166 + return 0;
14167 +}
14168 +
14169 +static int at32_cf_suspend(struct pcmcia_socket *sock)
14170 +{
14171 + debug(to_at32_cf(sock), 2, "called\n");
14172 +
14173 + at32_cf_set_socket(sock, &dead_socket);
14174 +
14175 + return 0;
14176 +}
14177 +
14178 +static int at32_cf_set_io_map(struct pcmcia_socket *sock,
14179 + struct pccard_io_map *map)
14180 +{
14181 + struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
14182 + int retval;
14183 +
14184 + debug(cf, 2, "map %u speed %u start 0x%08x stop 0x%08x\n",
14185 + map->map, map->speed, map->start, map->stop);
14186 + debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
14187 + (map->flags == 0) ? "<NONE>":"",
14188 + (map->flags & MAP_ACTIVE) ? "ACTIVE " : "",
14189 + (map->flags & MAP_16BIT) ? "16BIT " : "",
14190 + (map->flags & MAP_AUTOSZ) ? "AUTOSZ " : "",
14191 + (map->flags & MAP_0WS) ? "0WS " : "",
14192 + (map->flags & MAP_WRPROT) ? "WRPROT " : "",
14193 + (map->flags & MAP_USE_WAIT) ? "USE_WAIT " : "",
14194 + (map->flags & MAP_PREFETCH) ? "PREFETCH " : "");
14195 +
14196 + map->flags &= MAP_ACTIVE | MAP_16BIT | MAP_USE_WAIT;
14197 +
14198 + if (map->flags & MAP_16BIT)
14199 + cf->smc.bus_width = 2;
14200 + else
14201 + cf->smc.bus_width = 1;
14202 +
14203 + if (map->flags & MAP_USE_WAIT)
14204 + cf->smc.nwait_mode = 3;
14205 + else
14206 + cf->smc.nwait_mode = 0;
14207 +
14208 + retval = smc_set_configuration(cf->cf_cs, &cf->smc);
14209 + if (retval) {
14210 + printk(KERN_ERR "at32_cf: could not set up SMC for I/O\n");
14211 + return retval;
14212 + }
14213 +
14214 + map->start = cf->socket.io_offset;
14215 + map->stop = map->start + CF_RES_SIZE - 1;
14216 +
14217 + return 0;
14218 +}
14219 +
14220 +static int
14221 +at32_cf_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *map)
14222 +{
14223 + struct at32_cf_socket *cf;
14224 + struct resource *res;
14225 + int retval;
14226 +
14227 + cf = container_of(sock, struct at32_cf_socket, socket);
14228 +
14229 + debug(cf, 2, "map %u speed %u card_start %08x\n",
14230 + map->map, map->speed, map->card_start);
14231 + debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
14232 + (map->flags==0)?"<NONE>":"",
14233 + (map->flags&MAP_ACTIVE)?"ACTIVE ":"",
14234 + (map->flags&MAP_16BIT)?"16BIT ":"",
14235 + (map->flags&MAP_AUTOSZ)?"AUTOSZ ":"",
14236 + (map->flags&MAP_0WS)?"0WS ":"",
14237 + (map->flags&MAP_WRPROT)?"WRPROT ":"",
14238 + (map->flags&MAP_ATTRIB)?"ATTRIB ":"",
14239 + (map->flags&MAP_USE_WAIT)?"USE_WAIT ":"");
14240 +
14241 + if (map->card_start)
14242 + return -EINVAL;
14243 +
14244 + map->flags &= MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT | MAP_USE_WAIT;
14245 +
14246 + if (map->flags & MAP_ATTRIB) {
14247 + res = &cf->res_attr;
14248 +
14249 + /* Linksys WCF12 seems to use WAIT when reading CIS */
14250 + map->flags |= MAP_USE_WAIT;
14251 + } else {
14252 + res = &cf->res_mem;
14253 + }
14254 +
14255 + if (map->flags & MAP_USE_WAIT)
14256 + cf->smc.nwait_mode = 3;
14257 + else
14258 + cf->smc.nwait_mode = 0;
14259 +
14260 + retval = smc_set_configuration(cf->cf_cs, &cf->smc);
14261 + if (retval) {
14262 + printk(KERN_ERR "at32_cf: could not set up SMC for mem\n");
14263 + return retval;
14264 + }
14265 +
14266 + map->static_start = res->start;
14267 +
14268 + return 0;
14269 +}
14270 +
14271 +static struct pccard_operations at32_cf_ops = {
14272 + .init = at32_cf_socket_init,
14273 + .suspend = at32_cf_suspend,
14274 + .get_status = at32_cf_get_status,
14275 + .set_socket = at32_cf_set_socket,
14276 + .set_io_map = at32_cf_set_io_map,
14277 + .set_mem_map = at32_cf_set_mem_map,
14278 +};
14279 +
14280 +static int __init request_pin(struct platform_device *pdev,
14281 + unsigned int pin, const char *name)
14282 +{
14283 + if (gpio_request(pin, name)) {
14284 + dev_warn(&pdev->dev, "failed to request %s pin\n", name);
14285 + return -1;
14286 + }
14287 +
14288 + return pin;
14289 +}
14290 +
14291 +static struct smc_timing at32_cf_timing __initdata = {
14292 + .ncs_read_setup = 30,
14293 + .nrd_setup = 100,
14294 + .ncs_write_setup = 30,
14295 + .nwe_setup = 100,
14296 +
14297 + .ncs_read_pulse = 360,
14298 + .nrd_pulse = 290,
14299 + .ncs_write_pulse = 360,
14300 + .nwe_pulse = 290,
14301 +
14302 + .read_cycle = 420,
14303 + .write_cycle = 420,
14304 +};
14305 +
14306 +static int __init at32_cf_probe(struct platform_device *pdev)
14307 +{
14308 + struct at32_cf_socket *cf;
14309 + struct cf_platform_data *board = pdev->dev.platform_data;
14310 + struct resource *res_skt;
14311 + int irq;
14312 + int ret;
14313 +
14314 + dev_dbg(&pdev->dev, "probe");
14315 +
14316 + if (!board)
14317 + return -ENXIO;
14318 +
14319 + res_skt = platform_get_resource(pdev, IORESOURCE_MEM, 0);
14320 + if (!res_skt)
14321 + return -ENXIO;
14322 +
14323 + irq = platform_get_irq(pdev, 0);
14324 + if (irq < 0)
14325 + return irq;
14326 +
14327 + cf = kzalloc(sizeof(struct at32_cf_socket), GFP_KERNEL);
14328 + if (!cf)
14329 + return -ENOMEM;
14330 +
14331 + cf->detect_pin = -1;
14332 + cf->reset_pin = -1;
14333 + cf->vcc_pin = -1;
14334 + cf->ready_pin = -1;
14335 + cf->cf_cs = board->cs;
14336 +
14337 + if (board->detect_pin != GPIO_PIN_NONE)
14338 + cf->detect_pin = request_pin(pdev, board->detect_pin,
14339 + "cf_detect");
14340 + if (board->reset_pin != GPIO_PIN_NONE)
14341 + cf->reset_pin = request_pin(pdev, board->reset_pin,
14342 + "cf_reset");
14343 + if (board->vcc_pin != GPIO_PIN_NONE)
14344 + cf->vcc_pin = request_pin(pdev, board->vcc_pin,
14345 + "cf_vcc");
14346 + if (board->ready_pin != GPIO_PIN_NONE)
14347 + /* READY is also used for irq through EIM */
14348 + cf->ready_pin = board->ready_pin;
14349 +
14350 + debug(cf, 2, "pins: detect=%d reset=%d vcc=%d\n",
14351 + cf->detect_pin, cf->reset_pin, cf->vcc_pin);
14352 +
14353 + cf->socket.pci_irq = irq;
14354 + cf->socket.ops = &at32_cf_ops;
14355 + cf->socket.resource_ops = &pccard_static_ops;
14356 + cf->socket.dev.parent = &pdev->dev;
14357 + cf->socket.owner = THIS_MODULE;
14358 + cf->socket.features =
14359 + SS_CAP_MEM_ALIGN | SS_CAP_STATIC_MAP | SS_CAP_PCCARD;
14360 + cf->socket.map_size = CF_RES_SIZE;
14361 +
14362 + cf->res_attr.start = res_skt->start + CF_ATTR_OFFSET;
14363 + cf->res_attr.end = cf->res_attr.start + CF_RES_SIZE - 1;
14364 + cf->res_attr.name = "attribute";
14365 + cf->res_attr.flags = IORESOURCE_MEM;
14366 + ret = request_resource(res_skt, &cf->res_attr);
14367 + if (ret)
14368 + goto err_request_res_attr;
14369 +
14370 + cf->res_mem.start = res_skt->start + CF_MEM_OFFSET;
14371 + cf->res_mem.end = cf->res_mem.start + CF_RES_SIZE - 1;
14372 + cf->res_mem.name = "memory";
14373 + cf->res_mem.flags = IORESOURCE_MEM;
14374 + ret = request_resource(res_skt, &cf->res_mem);
14375 + if (ret)
14376 + goto err_request_res_mem;
14377 +
14378 + cf->res_io.start = res_skt->start + CF_IO_OFFSET;
14379 + cf->res_io.end = cf->res_io.start + CF_RES_SIZE - 1;
14380 + cf->res_io.name = "io";
14381 + cf->res_io.flags = IORESOURCE_MEM;
14382 + ret = request_resource(res_skt, &cf->res_io);
14383 + if (ret)
14384 + goto err_request_res_io;
14385 +
14386 + cf->socket.io_offset = cf->res_io.start;
14387 +
14388 + if (cf->detect_pin >= 0) {
14389 + ret = request_irq(gpio_to_irq(cf->detect_pin), at32_cf_irq,
14390 + IRQF_SHARED, "cf_detect", cf);
14391 + if (ret) {
14392 + debug(cf, 1,
14393 + "failed to request cf_detect interrupt\n");
14394 + goto err_detect_irq;
14395 + }
14396 + }
14397 +
14398 + cf->present = at32_cf_present(cf);
14399 +
14400 + /* Setup SMC timings */
14401 + smc_set_timing(&cf->smc, &at32_cf_timing);
14402 +
14403 + cf->smc.bus_width = 2;
14404 + cf->smc.nrd_controlled = 1;
14405 + cf->smc.nwe_controlled = 1;
14406 + cf->smc.nwait_mode = 0;
14407 + cf->smc.byte_write = 0;
14408 + cf->smc.tdf_cycles = 8;
14409 + cf->smc.tdf_mode = 0;
14410 +
14411 + ret = smc_set_configuration(cf->cf_cs, &cf->smc);
14412 + if (ret) {
14413 + debug(cf, 1, "failed to configure SMC\n", ret);
14414 + goto err_smc;
14415 + }
14416 +
14417 + ret = pcmcia_register_socket(&cf->socket);
14418 + if (ret) {
14419 + debug(cf, 1, "failed to register socket: %d\n", ret);
14420 + goto err_register_socket;
14421 + }
14422 +
14423 + if (cf->reset_pin >= 0)
14424 + gpio_direction_output(cf->reset_pin, 0);
14425 +
14426 + platform_set_drvdata(pdev, cf);
14427 +
14428 + dev_info(&pdev->dev, "Atmel SMC CF interface at 0x%08lx\n",
14429 + (unsigned long)res_skt->start);
14430 +
14431 + return 0;
14432 +
14433 +err_register_socket:
14434 +err_smc:
14435 + if (cf->detect_pin >= 0)
14436 + free_irq(gpio_to_irq(cf->detect_pin), cf);
14437 +err_detect_irq:
14438 + release_resource(&cf->res_io);
14439 +err_request_res_io:
14440 + release_resource(&cf->res_mem);
14441 +err_request_res_mem:
14442 + release_resource(&cf->res_attr);
14443 +err_request_res_attr:
14444 + if (cf->vcc_pin >= 0)
14445 + gpio_free(cf->vcc_pin);
14446 + if (cf->reset_pin >= 0)
14447 + gpio_free(cf->reset_pin);
14448 + if (cf->detect_pin >= 0)
14449 + gpio_free(cf->detect_pin);
14450 + kfree(cf);
14451 +
14452 + return ret;
14453 +}
14454 +
14455 +static int __exit at32_cf_remove(struct platform_device *pdev)
14456 +{
14457 + struct at32_cf_socket *cf = platform_get_drvdata(pdev);
14458 +
14459 + pcmcia_unregister_socket(&cf->socket);
14460 + if (cf->detect_pin >= 0) {
14461 + free_irq(gpio_to_irq(cf->detect_pin), cf);
14462 + gpio_free(cf->detect_pin);
14463 + }
14464 + if (cf->vcc_pin >= 0)
14465 + gpio_free(cf->vcc_pin);
14466 + if (cf->reset_pin >= 0)
14467 + gpio_free(cf->reset_pin);
14468 +
14469 + release_resource(&cf->res_io);
14470 + release_resource(&cf->res_mem);
14471 + release_resource(&cf->res_attr);
14472 + kfree(cf);
14473 + platform_set_drvdata(pdev, NULL);
14474 +
14475 + return 0;
14476 +}
14477 +
14478 +static struct platform_driver at32_cf_driver = {
14479 + .remove = __exit_p(at32_cf_remove),
14480 + .driver = {
14481 + .name = "at32_cf",
14482 + .owner = THIS_MODULE,
14483 + },
14484 +};
14485 +
14486 +static int __init at32_cf_init(void)
14487 +{
14488 + int ret;
14489 +
14490 + ret = platform_driver_probe(&at32_cf_driver, at32_cf_probe);
14491 + if (ret)
14492 + printk(KERN_ERR "at32_cf: probe failed: %d\n", ret);
14493 + return ret;
14494 +}
14495 +
14496 +static void __exit at32_cf_exit(void)
14497 +{
14498 + platform_driver_unregister(&at32_cf_driver);
14499 +}
14500 +
14501 +module_init(at32_cf_init);
14502 +module_exit(at32_cf_exit);
14503 +
14504 +MODULE_LICENSE("GPL");
14505 +MODULE_DESCRIPTION("Driver for SMC PCMCIA interface");
14506 +MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
14507 diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
14508 index d7e1996..67bfbb0 100644
14509 --- a/drivers/serial/Kconfig
14510 +++ b/drivers/serial/Kconfig
14511 @@ -380,6 +380,21 @@ config SERIAL_ATMEL_CONSOLE
14512 console is the device which receives all kernel messages and
14513 warnings and which allows logins in single user mode).
14514
14515 +config SERIAL_ATMEL_PDC
14516 + bool "Support DMA transfers on AT91 / AT32 serial port"
14517 + depends on SERIAL_ATMEL
14518 + default y
14519 + help
14520 + Say Y here if you wish to use the PDC to do DMA transfers to
14521 + and from the Atmel AT91 / AT32 serial port. In order to
14522 + actually use DMA transfers, make sure that the use_dma_tx
14523 + and use_dma_rx members in the atmel_uart_data struct is set
14524 + appropriately for each port.
14525 +
14526 + Note that break and error handling currently doesn't work
14527 + properly when DMA is enabled. Make sure that ports where
14528 + this matters don't use DMA.
14529 +
14530 config SERIAL_ATMEL_TTYAT
14531 bool "Install as device ttyATn instead of ttySn"
14532 depends on SERIAL_ATMEL=y
14533 diff --git a/drivers/serial/atmel_serial.c b/drivers/serial/atmel_serial.c
14534 index 111da57..477950f 100644
14535 --- a/drivers/serial/atmel_serial.c
14536 +++ b/drivers/serial/atmel_serial.c
14537 @@ -7,6 +7,8 @@
14538 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
14539 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
14540 *
14541 + * DMA support added by Chip Coldwell.
14542 + *
14543 * This program is free software; you can redistribute it and/or modify
14544 * it under the terms of the GNU General Public License as published by
14545 * the Free Software Foundation; either version 2 of the License, or
14546 @@ -33,6 +35,7 @@
14547 #include <linux/sysrq.h>
14548 #include <linux/tty_flip.h>
14549 #include <linux/platform_device.h>
14550 +#include <linux/dma-mapping.h>
14551 #include <linux/atmel_pdc.h>
14552
14553 #include <asm/io.h>
14554 @@ -47,6 +50,10 @@
14555
14556 #include "atmel_serial.h"
14557
14558 +#define PDC_BUFFER_SIZE 512
14559 +/* Revisit: We should calculate this based on the actual port settings */
14560 +#define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
14561 +
14562 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
14563 #define SUPPORT_SYSRQ
14564 #endif
14565 @@ -74,6 +81,7 @@
14566
14567 #define ATMEL_ISR_PASS_LIMIT 256
14568
14569 +/* UART registers. CR is write-only, hence no GET macro */
14570 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
14571 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
14572 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
14573 @@ -87,8 +95,6 @@
14574 #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
14575 #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
14576
14577 -// #define UART_GET_CR(port) __raw_readl((port)->membase + ATMEL_US_CR) // is write-only
14578 -
14579 /* PDC registers */
14580 #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
14581 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
14582 @@ -101,12 +107,24 @@
14583
14584 #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
14585 #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
14586 -//#define UART_PUT_TNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNPR)
14587 -//#define UART_PUT_TNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNCR)
14588
14589 static int (*atmel_open_hook)(struct uart_port *);
14590 static void (*atmel_close_hook)(struct uart_port *);
14591
14592 +struct atmel_dma_buffer {
14593 + unsigned char *buf;
14594 + dma_addr_t dma_addr;
14595 + unsigned int dma_size;
14596 + unsigned int ofs;
14597 +};
14598 +
14599 +struct atmel_uart_char {
14600 + u16 status;
14601 + u16 ch;
14602 +};
14603 +
14604 +#define ATMEL_SERIAL_RINGSIZE 1024
14605 +
14606 /*
14607 * We wrap our port structure around the generic uart_port.
14608 */
14609 @@ -115,6 +133,19 @@ struct atmel_uart_port {
14610 struct clk *clk; /* uart clock */
14611 unsigned short suspended; /* is port suspended? */
14612 int break_active; /* break being received */
14613 +
14614 + short use_dma_rx; /* enable PDC receiver */
14615 + short pdc_rx_idx; /* current PDC RX buffer */
14616 + struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
14617 +
14618 + short use_dma_tx; /* enable PDC transmitter */
14619 + struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
14620 +
14621 + struct tasklet_struct tasklet;
14622 + unsigned int irq_status;
14623 + unsigned int irq_status_prev;
14624 +
14625 + struct circ_buf rx_ring;
14626 };
14627
14628 static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
14629 @@ -123,6 +154,38 @@ static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
14630 static struct console atmel_console;
14631 #endif
14632
14633 +static inline struct atmel_uart_port *
14634 +to_atmel_uart_port(struct uart_port *uart)
14635 +{
14636 + return container_of(uart, struct atmel_uart_port, uart);
14637 +}
14638 +
14639 +#ifdef CONFIG_SERIAL_ATMEL_PDC
14640 +static bool atmel_use_dma_rx(struct uart_port *port)
14641 +{
14642 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
14643 +
14644 + return atmel_port->use_dma_rx;
14645 +}
14646 +
14647 +static bool atmel_use_dma_tx(struct uart_port *port)
14648 +{
14649 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
14650 +
14651 + return atmel_port->use_dma_tx;
14652 +}
14653 +#else
14654 +static bool atmel_use_dma_rx(struct uart_port *port)
14655 +{
14656 + return false;
14657 +}
14658 +
14659 +static bool atmel_use_dma_tx(struct uart_port *port)
14660 +{
14661 + return false;
14662 +}
14663 +#endif
14664 +
14665 /*
14666 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
14667 */
14668 @@ -142,8 +205,8 @@ static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
14669 #ifdef CONFIG_ARCH_AT91RM9200
14670 if (cpu_is_at91rm9200()) {
14671 /*
14672 - * AT91RM9200 Errata #39: RTS0 is not internally connected to PA21.
14673 - * We need to drive the pin manually.
14674 + * AT91RM9200 Errata #39: RTS0 is not internally connected
14675 + * to PA21. We need to drive the pin manually.
14676 */
14677 if (port->mapbase == AT91RM9200_BASE_US0) {
14678 if (mctrl & TIOCM_RTS)
14679 @@ -204,7 +267,12 @@ static u_int atmel_get_mctrl(struct uart_port *port)
14680 */
14681 static void atmel_stop_tx(struct uart_port *port)
14682 {
14683 - UART_PUT_IDR(port, ATMEL_US_TXRDY);
14684 + if (atmel_use_dma_tx(port)) {
14685 + /* disable PDC transmit */
14686 + UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
14687 + UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
14688 + } else
14689 + UART_PUT_IDR(port, ATMEL_US_TXRDY);
14690 }
14691
14692 /*
14693 @@ -212,7 +280,17 @@ static void atmel_stop_tx(struct uart_port *port)
14694 */
14695 static void atmel_start_tx(struct uart_port *port)
14696 {
14697 - UART_PUT_IER(port, ATMEL_US_TXRDY);
14698 + if (atmel_use_dma_tx(port)) {
14699 + if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
14700 + /* The transmitter is already running. Yes, we
14701 + really need this.*/
14702 + return;
14703 +
14704 + UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
14705 + /* re-enable PDC transmit */
14706 + UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
14707 + } else
14708 + UART_PUT_IER(port, ATMEL_US_TXRDY);
14709 }
14710
14711 /*
14712 @@ -220,7 +298,12 @@ static void atmel_start_tx(struct uart_port *port)
14713 */
14714 static void atmel_stop_rx(struct uart_port *port)
14715 {
14716 - UART_PUT_IDR(port, ATMEL_US_RXRDY);
14717 + if (atmel_use_dma_rx(port)) {
14718 + /* disable PDC receive */
14719 + UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
14720 + UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
14721 + } else
14722 + UART_PUT_IDR(port, ATMEL_US_RXRDY);
14723 }
14724
14725 /*
14726 @@ -228,7 +311,8 @@ static void atmel_stop_rx(struct uart_port *port)
14727 */
14728 static void atmel_enable_ms(struct uart_port *port)
14729 {
14730 - UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
14731 + UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC
14732 + | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
14733 }
14734
14735 /*
14736 @@ -243,22 +327,63 @@ static void atmel_break_ctl(struct uart_port *port, int break_state)
14737 }
14738
14739 /*
14740 + * Stores the incoming character in the ring buffer
14741 + */
14742 +static void
14743 +atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
14744 + unsigned int ch)
14745 +{
14746 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
14747 + struct circ_buf *ring = &atmel_port->rx_ring;
14748 + struct atmel_uart_char *c;
14749 +
14750 + if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
14751 + /* Buffer overflow, ignore char */
14752 + return;
14753 +
14754 + c = &((struct atmel_uart_char *)ring->buf)[ring->head];
14755 + c->status = status;
14756 + c->ch = ch;
14757 +
14758 + /* Make sure the character is stored before we update head. */
14759 + smp_wmb();
14760 +
14761 + ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
14762 +}
14763 +
14764 +/*
14765 + * Deal with parity, framing and overrun errors.
14766 + */
14767 +static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
14768 +{
14769 + /* clear error */
14770 + UART_PUT_CR(port, ATMEL_US_RSTSTA);
14771 +
14772 + if (status & ATMEL_US_RXBRK) {
14773 + /* ignore side-effect */
14774 + status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
14775 + port->icount.brk++;
14776 + }
14777 + if (status & ATMEL_US_PARE)
14778 + port->icount.parity++;
14779 + if (status & ATMEL_US_FRAME)
14780 + port->icount.frame++;
14781 + if (status & ATMEL_US_OVRE)
14782 + port->icount.overrun++;
14783 +}
14784 +
14785 +/*
14786 * Characters received (called from interrupt handler)
14787 */
14788 static void atmel_rx_chars(struct uart_port *port)
14789 {
14790 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
14791 - struct tty_struct *tty = port->info->tty;
14792 - unsigned int status, ch, flg;
14793 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
14794 + unsigned int status, ch;
14795
14796 status = UART_GET_CSR(port);
14797 while (status & ATMEL_US_RXRDY) {
14798 ch = UART_GET_CHAR(port);
14799
14800 - port->icount.rx++;
14801 -
14802 - flg = TTY_NORMAL;
14803 -
14804 /*
14805 * note that the error handling code is
14806 * out of the main execution path
14807 @@ -266,15 +391,14 @@ static void atmel_rx_chars(struct uart_port *port)
14808 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
14809 | ATMEL_US_OVRE | ATMEL_US_RXBRK)
14810 || atmel_port->break_active)) {
14811 - UART_PUT_CR(port, ATMEL_US_RSTSTA); /* clear error */
14812 +
14813 + /* clear error */
14814 + UART_PUT_CR(port, ATMEL_US_RSTSTA);
14815 +
14816 if (status & ATMEL_US_RXBRK
14817 && !atmel_port->break_active) {
14818 - status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); /* ignore side-effect */
14819 - port->icount.brk++;
14820 atmel_port->break_active = 1;
14821 UART_PUT_IER(port, ATMEL_US_RXBRK);
14822 - if (uart_handle_break(port))
14823 - goto ignore_char;
14824 } else {
14825 /*
14826 * This is either the end-of-break
14827 @@ -287,52 +411,30 @@ static void atmel_rx_chars(struct uart_port *port)
14828 status &= ~ATMEL_US_RXBRK;
14829 atmel_port->break_active = 0;
14830 }
14831 - if (status & ATMEL_US_PARE)
14832 - port->icount.parity++;
14833 - if (status & ATMEL_US_FRAME)
14834 - port->icount.frame++;
14835 - if (status & ATMEL_US_OVRE)
14836 - port->icount.overrun++;
14837 -
14838 - status &= port->read_status_mask;
14839 -
14840 - if (status & ATMEL_US_RXBRK)
14841 - flg = TTY_BREAK;
14842 - else if (status & ATMEL_US_PARE)
14843 - flg = TTY_PARITY;
14844 - else if (status & ATMEL_US_FRAME)
14845 - flg = TTY_FRAME;
14846 }
14847
14848 - if (uart_handle_sysrq_char(port, ch))
14849 - goto ignore_char;
14850 -
14851 - uart_insert_char(port, status, ATMEL_US_OVRE, ch, flg);
14852 -
14853 - ignore_char:
14854 + atmel_buffer_rx_char(port, status, ch);
14855 status = UART_GET_CSR(port);
14856 }
14857
14858 - tty_flip_buffer_push(tty);
14859 + tasklet_schedule(&atmel_port->tasklet);
14860 }
14861
14862 /*
14863 - * Transmit characters (called from interrupt handler)
14864 + * Transmit characters (called from tasklet with TXRDY interrupt
14865 + * disabled)
14866 */
14867 static void atmel_tx_chars(struct uart_port *port)
14868 {
14869 struct circ_buf *xmit = &port->info->xmit;
14870
14871 - if (port->x_char) {
14872 + if (port->x_char && UART_GET_CSR(port) & ATMEL_US_TXRDY) {
14873 UART_PUT_CHAR(port, port->x_char);
14874 port->icount.tx++;
14875 port->x_char = 0;
14876 - return;
14877 }
14878 - if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
14879 - atmel_stop_tx(port);
14880 + if (uart_circ_empty(xmit) || uart_tx_stopped(port))
14881 return;
14882 - }
14883
14884 while (UART_GET_CSR(port) & ATMEL_US_TXRDY) {
14885 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
14886 @@ -345,8 +447,88 @@ static void atmel_tx_chars(struct uart_port *port)
14887 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
14888 uart_write_wakeup(port);
14889
14890 - if (uart_circ_empty(xmit))
14891 - atmel_stop_tx(port);
14892 + if (!uart_circ_empty(xmit))
14893 + UART_PUT_IER(port, ATMEL_US_TXRDY);
14894 +}
14895 +
14896 +/*
14897 + * receive interrupt handler.
14898 + */
14899 +static void
14900 +atmel_handle_receive(struct uart_port *port, unsigned int pending)
14901 +{
14902 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
14903 +
14904 + if (atmel_use_dma_rx(port)) {
14905 + /*
14906 + * PDC receive. Just schedule the tasklet and let it
14907 + * figure out the details.
14908 + *
14909 + * TODO: We're not handling error flags correctly at
14910 + * the moment.
14911 + */
14912 + if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
14913 + UART_PUT_IDR(port, (ATMEL_US_ENDRX
14914 + | ATMEL_US_TIMEOUT));
14915 + tasklet_schedule(&atmel_port->tasklet);
14916 + }
14917 +
14918 + if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
14919 + ATMEL_US_FRAME | ATMEL_US_PARE))
14920 + atmel_pdc_rxerr(port, pending);
14921 + }
14922 +
14923 + /* Interrupt receive */
14924 + if (pending & ATMEL_US_RXRDY)
14925 + atmel_rx_chars(port);
14926 + else if (pending & ATMEL_US_RXBRK) {
14927 + /*
14928 + * End of break detected. If it came along with a
14929 + * character, atmel_rx_chars will handle it.
14930 + */
14931 + UART_PUT_CR(port, ATMEL_US_RSTSTA);
14932 + UART_PUT_IDR(port, ATMEL_US_RXBRK);
14933 + atmel_port->break_active = 0;
14934 + }
14935 +}
14936 +
14937 +/*
14938 + * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
14939 + */
14940 +static void
14941 +atmel_handle_transmit(struct uart_port *port, unsigned int pending)
14942 +{
14943 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
14944 +
14945 + if (atmel_use_dma_tx(port)) {
14946 + /* PDC transmit */
14947 + if (pending & (ATMEL_US_ENDTX | ATMEL_US_TXBUFE)) {
14948 + UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
14949 + tasklet_schedule(&atmel_port->tasklet);
14950 + }
14951 + } else {
14952 + /* Interrupt transmit */
14953 + if (pending & ATMEL_US_TXRDY) {
14954 + UART_PUT_IDR(port, ATMEL_US_TXRDY);
14955 + tasklet_schedule(&atmel_port->tasklet);
14956 + }
14957 + }
14958 +}
14959 +
14960 +/*
14961 + * status flags interrupt handler.
14962 + */
14963 +static void
14964 +atmel_handle_status(struct uart_port *port, unsigned int pending,
14965 + unsigned int status)
14966 +{
14967 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
14968 +
14969 + if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
14970 + | ATMEL_US_CTSIC)) {
14971 + atmel_port->irq_status = status;
14972 + tasklet_schedule(&atmel_port->tasklet);
14973 + }
14974 }
14975
14976 /*
14977 @@ -355,47 +537,255 @@ static void atmel_tx_chars(struct uart_port *port)
14978 static irqreturn_t atmel_interrupt(int irq, void *dev_id)
14979 {
14980 struct uart_port *port = dev_id;
14981 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
14982 unsigned int status, pending, pass_counter = 0;
14983
14984 - status = UART_GET_CSR(port);
14985 - pending = status & UART_GET_IMR(port);
14986 - while (pending) {
14987 - /* Interrupt receive */
14988 - if (pending & ATMEL_US_RXRDY)
14989 - atmel_rx_chars(port);
14990 - else if (pending & ATMEL_US_RXBRK) {
14991 + do {
14992 + status = UART_GET_CSR(port);
14993 + pending = status & UART_GET_IMR(port);
14994 + if (!pending)
14995 + break;
14996 +
14997 + atmel_handle_receive(port, pending);
14998 + atmel_handle_status(port, pending, status);
14999 + atmel_handle_transmit(port, pending);
15000 + } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
15001 +
15002 + return IRQ_HANDLED;
15003 +}
15004 +
15005 +/*
15006 + * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
15007 + */
15008 +static void atmel_tx_dma(struct uart_port *port)
15009 +{
15010 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
15011 + struct circ_buf *xmit = &port->info->xmit;
15012 + struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
15013 + int count;
15014 +
15015 + xmit->tail += pdc->ofs;
15016 + xmit->tail &= UART_XMIT_SIZE - 1;
15017 +
15018 + port->icount.tx += pdc->ofs;
15019 + pdc->ofs = 0;
15020 +
15021 + if (!uart_circ_empty(xmit)) {
15022 + /* more to transmit - setup next transfer */
15023 +
15024 + /* disable PDC transmit */
15025 + UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
15026 + dma_sync_single_for_device(port->dev,
15027 + pdc->dma_addr,
15028 + pdc->dma_size,
15029 + DMA_TO_DEVICE);
15030 +
15031 + count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
15032 + pdc->ofs = count;
15033 +
15034 + UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
15035 + UART_PUT_TCR(port, count);
15036 + /* re-enable PDC transmit and interrupts */
15037 + UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
15038 + UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
15039 + } else {
15040 + /* nothing left to transmit - disable the transmitter */
15041 +
15042 + /* disable PDC transmit */
15043 + UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
15044 + }
15045 +
15046 + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
15047 + uart_write_wakeup(port);
15048 +}
15049 +
15050 +static void atmel_rx_from_ring(struct uart_port *port)
15051 +{
15052 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
15053 + struct circ_buf *ring = &atmel_port->rx_ring;
15054 + unsigned int flg;
15055 + unsigned int status;
15056 +
15057 + while (ring->head != ring->tail) {
15058 + struct atmel_uart_char c;
15059 +
15060 + /* Make sure c is loaded after head. */
15061 + smp_rmb();
15062 +
15063 + c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
15064 +
15065 + ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
15066 +
15067 + port->icount.rx++;
15068 + status = c.status;
15069 + flg = TTY_NORMAL;
15070 +
15071 + /*
15072 + * note that the error handling code is
15073 + * out of the main execution path
15074 + */
15075 + if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
15076 + | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
15077 + if (status & ATMEL_US_RXBRK) {
15078 + /* ignore side-effect */
15079 + status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
15080 +
15081 + port->icount.brk++;
15082 + if (uart_handle_break(port))
15083 + continue;
15084 + }
15085 + if (status & ATMEL_US_PARE)
15086 + port->icount.parity++;
15087 + if (status & ATMEL_US_FRAME)
15088 + port->icount.frame++;
15089 + if (status & ATMEL_US_OVRE)
15090 + port->icount.overrun++;
15091 +
15092 + status &= port->read_status_mask;
15093 +
15094 + if (status & ATMEL_US_RXBRK)
15095 + flg = TTY_BREAK;
15096 + else if (status & ATMEL_US_PARE)
15097 + flg = TTY_PARITY;
15098 + else if (status & ATMEL_US_FRAME)
15099 + flg = TTY_FRAME;
15100 + }
15101 +
15102 +
15103 + if (uart_handle_sysrq_char(port, c.ch))
15104 + continue;
15105 +
15106 + uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
15107 + }
15108 +
15109 + /*
15110 + * Drop the lock here since it might end up calling
15111 + * uart_start(), which takes the lock.
15112 + */
15113 + spin_unlock(&port->lock);
15114 + tty_flip_buffer_push(port->info->tty);
15115 + spin_lock(&port->lock);
15116 +}
15117 +
15118 +static void atmel_rx_from_dma(struct uart_port *port)
15119 +{
15120 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
15121 + struct tty_struct *tty = port->info->tty;
15122 + struct atmel_dma_buffer *pdc;
15123 + int rx_idx = atmel_port->pdc_rx_idx;
15124 + unsigned int head;
15125 + unsigned int tail;
15126 + unsigned int count;
15127 +
15128 + do {
15129 + /* Reset the UART timeout early so that we don't miss one */
15130 + UART_PUT_CR(port, ATMEL_US_STTTO);
15131 +
15132 + pdc = &atmel_port->pdc_rx[rx_idx];
15133 + head = UART_GET_RPR(port) - pdc->dma_addr;
15134 + tail = pdc->ofs;
15135 +
15136 + /* If the PDC has switched buffers, RPR won't contain
15137 + * any address within the current buffer. Since head
15138 + * is unsigned, we just need a one-way comparison to
15139 + * find out.
15140 + *
15141 + * In this case, we just need to consume the entire
15142 + * buffer and resubmit it for DMA. This will clear the
15143 + * ENDRX bit as well, so that we can safely re-enable
15144 + * all interrupts below.
15145 + */
15146 + head = min(head, pdc->dma_size);
15147 +
15148 + if (likely(head != tail)) {
15149 + dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
15150 + pdc->dma_size, DMA_FROM_DEVICE);
15151 +
15152 /*
15153 - * End of break detected. If it came along
15154 - * with a character, atmel_rx_chars will
15155 - * handle it.
15156 + * head will only wrap around when we recycle
15157 + * the DMA buffer, and when that happens, we
15158 + * explicitly set tail to 0. So head will
15159 + * always be greater than tail.
15160 */
15161 - UART_PUT_CR(port, ATMEL_US_RSTSTA);
15162 - UART_PUT_IDR(port, ATMEL_US_RXBRK);
15163 - atmel_port->break_active = 0;
15164 + count = head - tail;
15165 +
15166 + tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
15167 +
15168 + dma_sync_single_for_device(port->dev, pdc->dma_addr,
15169 + pdc->dma_size, DMA_FROM_DEVICE);
15170 +
15171 + port->icount.rx += count;
15172 + pdc->ofs = head;
15173 }
15174
15175 - // TODO: All reads to CSR will clear these interrupts!
15176 - if (pending & ATMEL_US_RIIC) port->icount.rng++;
15177 - if (pending & ATMEL_US_DSRIC) port->icount.dsr++;
15178 - if (pending & ATMEL_US_DCDIC)
15179 + /*
15180 + * If the current buffer is full, we need to check if
15181 + * the next one contains any additional data.
15182 + */
15183 + if (head >= pdc->dma_size) {
15184 + pdc->ofs = 0;
15185 + UART_PUT_RNPR(port, pdc->dma_addr);
15186 + UART_PUT_RNCR(port, pdc->dma_size);
15187 +
15188 + rx_idx = !rx_idx;
15189 + atmel_port->pdc_rx_idx = rx_idx;
15190 + }
15191 + } while (head >= pdc->dma_size);
15192 +
15193 + /*
15194 + * Drop the lock here since it might end up calling
15195 + * uart_start(), which takes the lock.
15196 + */
15197 + spin_unlock(&port->lock);
15198 + tty_flip_buffer_push(tty);
15199 + spin_lock(&port->lock);
15200 +
15201 + UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
15202 +}
15203 +
15204 +/*
15205 + * tasklet handling tty stuff outside the interrupt handler.
15206 + */
15207 +static void atmel_tasklet_func(unsigned long data)
15208 +{
15209 + struct uart_port *port = (struct uart_port *)data;
15210 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
15211 + unsigned int status;
15212 + unsigned int status_change;
15213 +
15214 + /* The interrupt handler does not take the lock */
15215 + spin_lock(&port->lock);
15216 +
15217 + if (atmel_use_dma_tx(port))
15218 + atmel_tx_dma(port);
15219 + else
15220 + atmel_tx_chars(port);
15221 +
15222 + status = atmel_port->irq_status;
15223 + status_change = status ^ atmel_port->irq_status_prev;
15224 +
15225 + if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
15226 + | ATMEL_US_DCD | ATMEL_US_CTS)) {
15227 + /* TODO: All reads to CSR will clear these interrupts! */
15228 + if (status_change & ATMEL_US_RI)
15229 + port->icount.rng++;
15230 + if (status_change & ATMEL_US_DSR)
15231 + port->icount.dsr++;
15232 + if (status_change & ATMEL_US_DCD)
15233 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
15234 - if (pending & ATMEL_US_CTSIC)
15235 + if (status_change & ATMEL_US_CTS)
15236 uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
15237 - if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC))
15238 - wake_up_interruptible(&port->info->delta_msr_wait);
15239
15240 - /* Interrupt transmit */
15241 - if (pending & ATMEL_US_TXRDY)
15242 - atmel_tx_chars(port);
15243 + wake_up_interruptible(&port->info->delta_msr_wait);
15244
15245 - if (pass_counter++ > ATMEL_ISR_PASS_LIMIT)
15246 - break;
15247 -
15248 - status = UART_GET_CSR(port);
15249 - pending = status & UART_GET_IMR(port);
15250 + atmel_port->irq_status_prev = status;
15251 }
15252 - return IRQ_HANDLED;
15253 +
15254 + if (atmel_use_dma_rx(port))
15255 + atmel_rx_from_dma(port);
15256 + else
15257 + atmel_rx_from_ring(port);
15258 +
15259 + spin_unlock(&port->lock);
15260 }
15261
15262 /*
15263 @@ -403,6 +793,8 @@ static irqreturn_t atmel_interrupt(int irq, void *dev_id)
15264 */
15265 static int atmel_startup(struct uart_port *port)
15266 {
15267 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
15268 + struct tty_struct *tty = port->info->tty;
15269 int retval;
15270
15271 /*
15272 @@ -415,13 +807,64 @@ static int atmel_startup(struct uart_port *port)
15273 /*
15274 * Allocate the IRQ
15275 */
15276 - retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED, "atmel_serial", port);
15277 + retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
15278 + tty ? tty->name : "atmel_serial", port);
15279 if (retval) {
15280 printk("atmel_serial: atmel_startup - Can't get irq\n");
15281 return retval;
15282 }
15283
15284 /*
15285 + * Initialize DMA (if necessary)
15286 + */
15287 + if (atmel_use_dma_rx(port)) {
15288 + int i;
15289 +
15290 + for (i = 0; i < 2; i++) {
15291 + struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
15292 +
15293 + pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
15294 + if (pdc->buf == NULL) {
15295 + if (i != 0) {
15296 + dma_unmap_single(port->dev,
15297 + atmel_port->pdc_rx[0].dma_addr,
15298 + PDC_BUFFER_SIZE,
15299 + DMA_FROM_DEVICE);
15300 + kfree(atmel_port->pdc_rx[0].buf);
15301 + }
15302 + free_irq(port->irq, port);
15303 + return -ENOMEM;
15304 + }
15305 + pdc->dma_addr = dma_map_single(port->dev,
15306 + pdc->buf,
15307 + PDC_BUFFER_SIZE,
15308 + DMA_FROM_DEVICE);
15309 + pdc->dma_size = PDC_BUFFER_SIZE;
15310 + pdc->ofs = 0;
15311 + }
15312 +
15313 + atmel_port->pdc_rx_idx = 0;
15314 +
15315 + UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
15316 + UART_PUT_RCR(port, PDC_BUFFER_SIZE);
15317 +
15318 + UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
15319 + UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
15320 + }
15321 + if (atmel_use_dma_tx(port)) {
15322 + struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
15323 + struct circ_buf *xmit = &port->info->xmit;
15324 +
15325 + pdc->buf = xmit->buf;
15326 + pdc->dma_addr = dma_map_single(port->dev,
15327 + pdc->buf,
15328 + UART_XMIT_SIZE,
15329 + DMA_TO_DEVICE);
15330 + pdc->dma_size = UART_XMIT_SIZE;
15331 + pdc->ofs = 0;
15332 + }
15333 +
15334 + /*
15335 * If there is a specific "open" function (to register
15336 * control line interrupts)
15337 */
15338 @@ -437,9 +880,21 @@ static int atmel_startup(struct uart_port *port)
15339 * Finally, enable the serial port
15340 */
15341 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
15342 - UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); /* enable xmit & rcvr */
15343 + /* enable xmit & rcvr */
15344 + UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
15345
15346 - UART_PUT_IER(port, ATMEL_US_RXRDY); /* enable receive only */
15347 + if (atmel_use_dma_rx(port)) {
15348 + /* set UART timeout */
15349 + UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
15350 + UART_PUT_CR(port, ATMEL_US_STTTO);
15351 +
15352 + UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
15353 + /* enable PDC controller */
15354 + UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
15355 + } else {
15356 + /* enable receive only */
15357 + UART_PUT_IER(port, ATMEL_US_RXRDY);
15358 + }
15359
15360 return 0;
15361 }
15362 @@ -449,6 +904,38 @@ static int atmel_startup(struct uart_port *port)
15363 */
15364 static void atmel_shutdown(struct uart_port *port)
15365 {
15366 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
15367 + /*
15368 + * Ensure everything is stopped.
15369 + */
15370 + atmel_stop_rx(port);
15371 + atmel_stop_tx(port);
15372 +
15373 + /*
15374 + * Shut-down the DMA.
15375 + */
15376 + if (atmel_use_dma_rx(port)) {
15377 + int i;
15378 +
15379 + for (i = 0; i < 2; i++) {
15380 + struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
15381 +
15382 + dma_unmap_single(port->dev,
15383 + pdc->dma_addr,
15384 + pdc->dma_size,
15385 + DMA_FROM_DEVICE);
15386 + kfree(pdc->buf);
15387 + }
15388 + }
15389 + if (atmel_use_dma_tx(port)) {
15390 + struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
15391 +
15392 + dma_unmap_single(port->dev,
15393 + pdc->dma_addr,
15394 + pdc->dma_size,
15395 + DMA_TO_DEVICE);
15396 + }
15397 +
15398 /*
15399 * Disable all interrupts, port and break condition.
15400 */
15401 @@ -471,45 +958,48 @@ static void atmel_shutdown(struct uart_port *port)
15402 /*
15403 * Power / Clock management.
15404 */
15405 -static void atmel_serial_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
15406 +static void atmel_serial_pm(struct uart_port *port, unsigned int state,
15407 + unsigned int oldstate)
15408 {
15409 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
15410 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
15411
15412 switch (state) {
15413 - case 0:
15414 - /*
15415 - * Enable the peripheral clock for this serial port.
15416 - * This is called on uart_open() or a resume event.
15417 - */
15418 - clk_enable(atmel_port->clk);
15419 - break;
15420 - case 3:
15421 - /*
15422 - * Disable the peripheral clock for this serial port.
15423 - * This is called on uart_close() or a suspend event.
15424 - */
15425 - clk_disable(atmel_port->clk);
15426 - break;
15427 - default:
15428 - printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
15429 + case 0:
15430 + /*
15431 + * Enable the peripheral clock for this serial port.
15432 + * This is called on uart_open() or a resume event.
15433 + */
15434 + clk_enable(atmel_port->clk);
15435 + break;
15436 + case 3:
15437 + /*
15438 + * Disable the peripheral clock for this serial port.
15439 + * This is called on uart_close() or a suspend event.
15440 + */
15441 + clk_disable(atmel_port->clk);
15442 + break;
15443 + default:
15444 + printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
15445 }
15446 }
15447
15448 /*
15449 * Change the port parameters
15450 */
15451 -static void atmel_set_termios(struct uart_port *port, struct ktermios * termios, struct ktermios * old)
15452 +static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
15453 + struct ktermios *old)
15454 {
15455 unsigned long flags;
15456 unsigned int mode, imr, quot, baud;
15457
15458 /* Get current mode register */
15459 - mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL | ATMEL_US_NBSTOP | ATMEL_US_PAR);
15460 + mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
15461 + | ATMEL_US_NBSTOP | ATMEL_US_PAR);
15462
15463 - baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
15464 + baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
15465 quot = uart_get_divisor(port, baud);
15466
15467 - if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
15468 + if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
15469 quot /= 8;
15470 mode |= ATMEL_US_USCLKS_MCK_DIV8;
15471 }
15472 @@ -536,18 +1026,17 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios * termios,
15473
15474 /* parity */
15475 if (termios->c_cflag & PARENB) {
15476 - if (termios->c_cflag & CMSPAR) { /* Mark or Space parity */
15477 + /* Mark or Space parity */
15478 + if (termios->c_cflag & CMSPAR) {
15479 if (termios->c_cflag & PARODD)
15480 mode |= ATMEL_US_PAR_MARK;
15481 else
15482 mode |= ATMEL_US_PAR_SPACE;
15483 - }
15484 - else if (termios->c_cflag & PARODD)
15485 + } else if (termios->c_cflag & PARODD)
15486 mode |= ATMEL_US_PAR_ODD;
15487 else
15488 mode |= ATMEL_US_PAR_EVEN;
15489 - }
15490 - else
15491 + } else
15492 mode |= ATMEL_US_PAR_NONE;
15493
15494 spin_lock_irqsave(&port->lock, flags);
15495 @@ -558,6 +1047,10 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios * termios,
15496 if (termios->c_iflag & (BRKINT | PARMRK))
15497 port->read_status_mask |= ATMEL_US_RXBRK;
15498
15499 + if (atmel_use_dma_rx(port))
15500 + /* need to enable error interrupts */
15501 + UART_PUT_IER(port, port->read_status_mask);
15502 +
15503 /*
15504 * Characters to ignore
15505 */
15506 @@ -573,16 +1066,16 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios * termios,
15507 if (termios->c_iflag & IGNPAR)
15508 port->ignore_status_mask |= ATMEL_US_OVRE;
15509 }
15510 -
15511 - // TODO: Ignore all characters if CREAD is set.
15512 + /* TODO: Ignore all characters if CREAD is set.*/
15513
15514 /* update the per-port timeout */
15515 uart_update_timeout(port, termios->c_cflag, baud);
15516
15517 - /* disable interrupts and drain transmitter */
15518 - imr = UART_GET_IMR(port); /* get interrupt mask */
15519 - UART_PUT_IDR(port, -1); /* disable all interrupts */
15520 - while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY)) { barrier(); }
15521 + /* save/disable interrupts and drain transmitter */
15522 + imr = UART_GET_IMR(port);
15523 + UART_PUT_IDR(port, -1);
15524 + while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
15525 + cpu_relax();
15526
15527 /* disable receiver and transmitter */
15528 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
15529 @@ -708,7 +1201,8 @@ static struct uart_ops atmel_pops = {
15530 /*
15531 * Configure the port from the platform device resource info.
15532 */
15533 -static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, struct platform_device *pdev)
15534 +static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
15535 + struct platform_device *pdev)
15536 {
15537 struct uart_port *port = &atmel_port->uart;
15538 struct atmel_uart_data *data = pdev->dev.platform_data;
15539 @@ -723,6 +1217,11 @@ static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, struct
15540 port->mapbase = pdev->resource[0].start;
15541 port->irq = pdev->resource[1].start;
15542
15543 + tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
15544 + (unsigned long)port);
15545 +
15546 + memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
15547 +
15548 if (data->regs)
15549 /* Already mapped by setup code */
15550 port->membase = data->regs;
15551 @@ -731,11 +1230,17 @@ static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, struct
15552 port->membase = NULL;
15553 }
15554
15555 - if (!atmel_port->clk) { /* for console, the clock could already be configured */
15556 + /* for console, the clock could already be configured */
15557 + if (!atmel_port->clk) {
15558 atmel_port->clk = clk_get(&pdev->dev, "usart");
15559 clk_enable(atmel_port->clk);
15560 port->uartclk = clk_get_rate(atmel_port->clk);
15561 }
15562 +
15563 + atmel_port->use_dma_rx = data->use_dma_rx;
15564 + atmel_port->use_dma_tx = data->use_dma_tx;
15565 + if (atmel_use_dma_tx(port))
15566 + port->fifosize = PDC_BUFFER_SIZE;
15567 }
15568
15569 /*
15570 @@ -755,12 +1260,11 @@ void __init atmel_register_uart_fns(struct atmel_port_fns *fns)
15571 atmel_pops.set_wake = fns->set_wake;
15572 }
15573
15574 -
15575 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
15576 static void atmel_console_putchar(struct uart_port *port, int ch)
15577 {
15578 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
15579 - barrier();
15580 + cpu_relax();
15581 UART_PUT_CHAR(port, ch);
15582 }
15583
15584 @@ -773,38 +1277,40 @@ static void atmel_console_write(struct console *co, const char *s, u_int count)
15585 unsigned int status, imr;
15586
15587 /*
15588 - * First, save IMR and then disable interrupts
15589 + * First, save IMR and then disable interrupts
15590 */
15591 - imr = UART_GET_IMR(port); /* get interrupt mask */
15592 + imr = UART_GET_IMR(port);
15593 UART_PUT_IDR(port, ATMEL_US_RXRDY | ATMEL_US_TXRDY);
15594
15595 uart_console_write(port, s, count, atmel_console_putchar);
15596
15597 /*
15598 - * Finally, wait for transmitter to become empty
15599 - * and restore IMR
15600 + * Finally, wait for transmitter to become empty
15601 + * and restore IMR
15602 */
15603 do {
15604 status = UART_GET_CSR(port);
15605 } while (!(status & ATMEL_US_TXRDY));
15606 - UART_PUT_IER(port, imr); /* set interrupts back the way they were */
15607 + /* set interrupts back the way they were */
15608 + UART_PUT_IER(port, imr);
15609 }
15610
15611 /*
15612 - * If the port was already initialised (eg, by a boot loader), try to determine
15613 - * the current setup.
15614 + * If the port was already initialised (eg, by a boot loader),
15615 + * try to determine the current setup.
15616 */
15617 -static void __init atmel_console_get_options(struct uart_port *port, int *baud, int *parity, int *bits)
15618 +static void __init atmel_console_get_options(struct uart_port *port, int *baud,
15619 + int *parity, int *bits)
15620 {
15621 unsigned int mr, quot;
15622
15623 -// TODO: CR is a write-only register
15624 -// unsigned int cr;
15625 -//
15626 -// cr = UART_GET_CR(port) & (ATMEL_US_RXEN | ATMEL_US_TXEN);
15627 -// if (cr == (ATMEL_US_RXEN | ATMEL_US_TXEN)) {
15628 -// /* ok, the port was enabled */
15629 -// }
15630 + /*
15631 + * If the baud rate generator isn't running, the port wasn't
15632 + * initialized by the boot loader.
15633 + */
15634 + quot = UART_GET_BRGR(port);
15635 + if (!quot)
15636 + return;
15637
15638 mr = UART_GET_MR(port) & ATMEL_US_CHRL;
15639 if (mr == ATMEL_US_CHRL_8)
15640 @@ -824,7 +1330,6 @@ static void __init atmel_console_get_options(struct uart_port *port, int *baud,
15641 * lower than one of those, as it would make us fall through
15642 * to a much lower baud rate than we really want.
15643 */
15644 - quot = UART_GET_BRGR(port);
15645 *baud = port->uartclk / (16 * (quot - 1));
15646 }
15647
15648 @@ -836,10 +1341,12 @@ static int __init atmel_console_setup(struct console *co, char *options)
15649 int parity = 'n';
15650 int flow = 'n';
15651
15652 - if (port->membase == 0) /* Port not initialized yet - delay setup */
15653 + if (port->membase == NULL) {
15654 + /* Port not initialized yet - delay setup */
15655 return -ENODEV;
15656 + }
15657
15658 - UART_PUT_IDR(port, -1); /* disable interrupts */
15659 + UART_PUT_IDR(port, -1);
15660 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
15661 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
15662
15663 @@ -871,13 +1378,16 @@ static struct console atmel_console = {
15664 static int __init atmel_console_init(void)
15665 {
15666 if (atmel_default_console_device) {
15667 - add_preferred_console(ATMEL_DEVICENAME, atmel_default_console_device->id, NULL);
15668 - atmel_init_port(&(atmel_ports[atmel_default_console_device->id]), atmel_default_console_device);
15669 + add_preferred_console(ATMEL_DEVICENAME,
15670 + atmel_default_console_device->id, NULL);
15671 + atmel_init_port(&atmel_ports[atmel_default_console_device->id],
15672 + atmel_default_console_device);
15673 register_console(&atmel_console);
15674 }
15675
15676 return 0;
15677 }
15678 +
15679 console_initcall(atmel_console_init);
15680
15681 /*
15682 @@ -885,34 +1395,48 @@ console_initcall(atmel_console_init);
15683 */
15684 static int __init atmel_late_console_init(void)
15685 {
15686 - if (atmel_default_console_device && !(atmel_console.flags & CON_ENABLED))
15687 + if (atmel_default_console_device
15688 + && !(atmel_console.flags & CON_ENABLED))
15689 register_console(&atmel_console);
15690
15691 return 0;
15692 }
15693 +
15694 core_initcall(atmel_late_console_init);
15695
15696 +static inline bool atmel_is_console_port(struct uart_port *port)
15697 +{
15698 + return port->cons && port->cons->index == port->line;
15699 +}
15700 +
15701 #else
15702 #define ATMEL_CONSOLE_DEVICE NULL
15703 +
15704 +static inline bool atmel_is_console_port(struct uart_port *port)
15705 +{
15706 + return false;
15707 +}
15708 #endif
15709
15710 static struct uart_driver atmel_uart = {
15711 - .owner = THIS_MODULE,
15712 - .driver_name = "atmel_serial",
15713 - .dev_name = ATMEL_DEVICENAME,
15714 - .major = SERIAL_ATMEL_MAJOR,
15715 - .minor = MINOR_START,
15716 - .nr = ATMEL_MAX_UART,
15717 - .cons = ATMEL_CONSOLE_DEVICE,
15718 + .owner = THIS_MODULE,
15719 + .driver_name = "atmel_serial",
15720 + .dev_name = ATMEL_DEVICENAME,
15721 + .major = SERIAL_ATMEL_MAJOR,
15722 + .minor = MINOR_START,
15723 + .nr = ATMEL_MAX_UART,
15724 + .cons = ATMEL_CONSOLE_DEVICE,
15725 };
15726
15727 #ifdef CONFIG_PM
15728 -static int atmel_serial_suspend(struct platform_device *pdev, pm_message_t state)
15729 +static int atmel_serial_suspend(struct platform_device *pdev,
15730 + pm_message_t state)
15731 {
15732 struct uart_port *port = platform_get_drvdata(pdev);
15733 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
15734 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
15735
15736 - if (device_may_wakeup(&pdev->dev) && !at91_suspend_entering_slow_clock())
15737 + if (device_may_wakeup(&pdev->dev)
15738 + && !at91_suspend_entering_slow_clock())
15739 enable_irq_wake(port->irq);
15740 else {
15741 uart_suspend_port(&atmel_uart, port);
15742 @@ -925,13 +1449,12 @@ static int atmel_serial_suspend(struct platform_device *pdev, pm_message_t state
15743 static int atmel_serial_resume(struct platform_device *pdev)
15744 {
15745 struct uart_port *port = platform_get_drvdata(pdev);
15746 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
15747 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
15748
15749 if (atmel_port->suspended) {
15750 uart_resume_port(&atmel_uart, port);
15751 atmel_port->suspended = 0;
15752 - }
15753 - else
15754 + } else
15755 disable_irq_wake(port->irq);
15756
15757 return 0;
15758 @@ -944,15 +1467,40 @@ static int atmel_serial_resume(struct platform_device *pdev)
15759 static int __devinit atmel_serial_probe(struct platform_device *pdev)
15760 {
15761 struct atmel_uart_port *port;
15762 + void *data;
15763 int ret;
15764
15765 + BUILD_BUG_ON(!is_power_of_2(ATMEL_SERIAL_RINGSIZE));
15766 +
15767 port = &atmel_ports[pdev->id];
15768 atmel_init_port(port, pdev);
15769
15770 + if (!atmel_use_dma_rx(&port->uart)) {
15771 + ret = -ENOMEM;
15772 + data = kmalloc(sizeof(struct atmel_uart_char)
15773 + * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
15774 + if (!data)
15775 + goto err_alloc_ring;
15776 + port->rx_ring.buf = data;
15777 + }
15778 +
15779 ret = uart_add_one_port(&atmel_uart, &port->uart);
15780 - if (!ret) {
15781 - device_init_wakeup(&pdev->dev, 1);
15782 - platform_set_drvdata(pdev, port);
15783 + if (ret)
15784 + goto err_add_port;
15785 +
15786 + device_init_wakeup(&pdev->dev, 1);
15787 + platform_set_drvdata(pdev, port);
15788 +
15789 + return 0;
15790 +
15791 +err_add_port:
15792 + kfree(port->rx_ring.buf);
15793 + port->rx_ring.buf = NULL;
15794 +err_alloc_ring:
15795 + if (!atmel_is_console_port(&port->uart)) {
15796 + clk_disable(port->clk);
15797 + clk_put(port->clk);
15798 + port->clk = NULL;
15799 }
15800
15801 return ret;
15802 @@ -961,19 +1509,21 @@ static int __devinit atmel_serial_probe(struct platform_device *pdev)
15803 static int __devexit atmel_serial_remove(struct platform_device *pdev)
15804 {
15805 struct uart_port *port = platform_get_drvdata(pdev);
15806 - struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
15807 + struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
15808 int ret = 0;
15809
15810 - clk_disable(atmel_port->clk);
15811 - clk_put(atmel_port->clk);
15812 -
15813 device_init_wakeup(&pdev->dev, 0);
15814 platform_set_drvdata(pdev, NULL);
15815
15816 - if (port) {
15817 - ret = uart_remove_one_port(&atmel_uart, port);
15818 - kfree(port);
15819 - }
15820 + ret = uart_remove_one_port(&atmel_uart, port);
15821 +
15822 + tasklet_kill(&atmel_port->tasklet);
15823 + kfree(atmel_port->rx_ring.buf);
15824 +
15825 + /* "port" is allocated statically, so we shouldn't free it */
15826 +
15827 + clk_disable(atmel_port->clk);
15828 + clk_put(atmel_port->clk);
15829
15830 return ret;
15831 }
15832 diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
15833 index ff10808..293b7ca 100644
15834 --- a/drivers/spi/atmel_spi.c
15835 +++ b/drivers/spi/atmel_spi.c
15836 @@ -51,7 +51,9 @@ struct atmel_spi {
15837 u8 stopping;
15838 struct list_head queue;
15839 struct spi_transfer *current_transfer;
15840 - unsigned long remaining_bytes;
15841 + unsigned long current_remaining_bytes;
15842 + struct spi_transfer *next_transfer;
15843 + unsigned long next_remaining_bytes;
15844
15845 void *buffer;
15846 dma_addr_t buffer_dma;
15847 @@ -121,6 +123,48 @@ static void cs_deactivate(struct atmel_spi *as, struct spi_device *spi)
15848 gpio_set_value(gpio, !active);
15849 }
15850
15851 +static inline int atmel_spi_xfer_is_last(struct spi_message *msg,
15852 + struct spi_transfer *xfer)
15853 +{
15854 + return msg->transfers.prev == &xfer->transfer_list;
15855 +}
15856 +
15857 +static inline int atmel_spi_xfer_can_be_chained(struct spi_transfer *xfer)
15858 +{
15859 + return xfer->delay_usecs == 0 && !xfer->cs_change;
15860 +}
15861 +
15862 +static void atmel_spi_next_xfer_data(struct spi_master *master,
15863 + struct spi_transfer *xfer,
15864 + dma_addr_t *tx_dma,
15865 + dma_addr_t *rx_dma,
15866 + u32 *plen)
15867 +{
15868 + struct atmel_spi *as = spi_master_get_devdata(master);
15869 + u32 len = *plen;
15870 +
15871 + /* use scratch buffer only when rx or tx data is unspecified */
15872 + if (xfer->rx_buf)
15873 + *rx_dma = xfer->rx_dma + xfer->len - len;
15874 + else {
15875 + *rx_dma = as->buffer_dma;
15876 + if (len > BUFFER_SIZE)
15877 + len = BUFFER_SIZE;
15878 + }
15879 + if (xfer->tx_buf)
15880 + *tx_dma = xfer->tx_dma + xfer->len - len;
15881 + else {
15882 + *tx_dma = as->buffer_dma;
15883 + if (len > BUFFER_SIZE)
15884 + len = BUFFER_SIZE;
15885 + memset(as->buffer, 0, len);
15886 + dma_sync_single_for_device(&as->pdev->dev,
15887 + as->buffer_dma, len, DMA_TO_DEVICE);
15888 + }
15889 +
15890 + *plen = len;
15891 +}
15892 +
15893 /*
15894 * Submit next transfer for DMA.
15895 * lock is held, spi irq is blocked
15896 @@ -130,53 +174,78 @@ static void atmel_spi_next_xfer(struct spi_master *master,
15897 {
15898 struct atmel_spi *as = spi_master_get_devdata(master);
15899 struct spi_transfer *xfer;
15900 - u32 len;
15901 + u32 len, remaining, total;
15902 dma_addr_t tx_dma, rx_dma;
15903
15904 - xfer = as->current_transfer;
15905 - if (!xfer || as->remaining_bytes == 0) {
15906 - if (xfer)
15907 - xfer = list_entry(xfer->transfer_list.next,
15908 - struct spi_transfer, transfer_list);
15909 - else
15910 - xfer = list_entry(msg->transfers.next,
15911 - struct spi_transfer, transfer_list);
15912 - as->remaining_bytes = xfer->len;
15913 - as->current_transfer = xfer;
15914 - }
15915 + if (!as->current_transfer)
15916 + xfer = list_entry(msg->transfers.next,
15917 + struct spi_transfer, transfer_list);
15918 + else if (!as->next_transfer)
15919 + xfer = list_entry(as->current_transfer->transfer_list.next,
15920 + struct spi_transfer, transfer_list);
15921 + else
15922 + xfer = NULL;
15923
15924 - len = as->remaining_bytes;
15925 + if (xfer) {
15926 + len = xfer->len;
15927 + atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
15928 + remaining = xfer->len - len;
15929
15930 - tx_dma = xfer->tx_dma + xfer->len - len;
15931 - rx_dma = xfer->rx_dma + xfer->len - len;
15932 + spi_writel(as, RPR, rx_dma);
15933 + spi_writel(as, TPR, tx_dma);
15934
15935 - /* use scratch buffer only when rx or tx data is unspecified */
15936 - if (!xfer->rx_buf) {
15937 - rx_dma = as->buffer_dma;
15938 - if (len > BUFFER_SIZE)
15939 - len = BUFFER_SIZE;
15940 - }
15941 - if (!xfer->tx_buf) {
15942 - tx_dma = as->buffer_dma;
15943 - if (len > BUFFER_SIZE)
15944 - len = BUFFER_SIZE;
15945 - memset(as->buffer, 0, len);
15946 - dma_sync_single_for_device(&as->pdev->dev,
15947 - as->buffer_dma, len, DMA_TO_DEVICE);
15948 + if (msg->spi->bits_per_word > 8)
15949 + len >>= 1;
15950 + spi_writel(as, RCR, len);
15951 + spi_writel(as, TCR, len);
15952 +
15953 + dev_dbg(&msg->spi->dev,
15954 + " start xfer %p: len %u tx %p/%08x rx %p/%08x\n",
15955 + xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
15956 + xfer->rx_buf, xfer->rx_dma);
15957 + } else {
15958 + xfer = as->next_transfer;
15959 + remaining = as->next_remaining_bytes;
15960 }
15961
15962 - spi_writel(as, RPR, rx_dma);
15963 - spi_writel(as, TPR, tx_dma);
15964 + as->current_transfer = xfer;
15965 + as->current_remaining_bytes = remaining;
15966
15967 - as->remaining_bytes -= len;
15968 - if (msg->spi->bits_per_word > 8)
15969 - len >>= 1;
15970 + if (remaining > 0)
15971 + len = remaining;
15972 + else if (!atmel_spi_xfer_is_last(msg, xfer)
15973 + && atmel_spi_xfer_can_be_chained(xfer)) {
15974 + xfer = list_entry(xfer->transfer_list.next,
15975 + struct spi_transfer, transfer_list);
15976 + len = xfer->len;
15977 + } else
15978 + xfer = NULL;
15979
15980 - /* REVISIT: when xfer->delay_usecs == 0, the PDC "next transfer"
15981 - * mechanism might help avoid the IRQ latency between transfers
15982 - * (and improve the nCS0 errata handling on at91rm9200 chips)
15983 - *
15984 - * We're also waiting for ENDRX before we start the next
15985 + as->next_transfer = xfer;
15986 +
15987 + if (xfer) {
15988 + total = len;
15989 + atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
15990 + as->next_remaining_bytes = total - len;
15991 +
15992 + spi_writel(as, RNPR, rx_dma);
15993 + spi_writel(as, TNPR, tx_dma);
15994 +
15995 + if (msg->spi->bits_per_word > 8)
15996 + len >>= 1;
15997 + spi_writel(as, RNCR, len);
15998 + spi_writel(as, TNCR, len);
15999 +
16000 + dev_dbg(&msg->spi->dev,
16001 + " next xfer %p: len %u tx %p/%08x rx %p/%08x\n",
16002 + xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
16003 + xfer->rx_buf, xfer->rx_dma);
16004 + } else {
16005 + spi_writel(as, RNCR, 0);
16006 + spi_writel(as, TNCR, 0);
16007 + }
16008 +
16009 + /* REVISIT: We're waiting for ENDRX before we start the next
16010 * transfer because we need to handle some difficult timing
16011 * issues otherwise. If we wait for ENDTX in one transfer and
16012 * then starts waiting for ENDRX in the next, it's difficult
16013 @@ -186,17 +255,7 @@ static void atmel_spi_next_xfer(struct spi_master *master,
16014 *
16015 * It should be doable, though. Just not now...
16016 */
16017 - spi_writel(as, TNCR, 0);
16018 - spi_writel(as, RNCR, 0);
16019 spi_writel(as, IER, SPI_BIT(ENDRX) | SPI_BIT(OVRES));
16020 -
16021 - dev_dbg(&msg->spi->dev,
16022 - " start xfer %p: len %u tx %p/%08x rx %p/%08x imr %03x\n",
16023 - xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
16024 - xfer->rx_buf, xfer->rx_dma, spi_readl(as, IMR));
16025 -
16026 - spi_writel(as, RCR, len);
16027 - spi_writel(as, TCR, len);
16028 spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN));
16029 }
16030
16031 @@ -294,6 +353,7 @@ atmel_spi_msg_done(struct spi_master *master, struct atmel_spi *as,
16032 spin_lock(&as->lock);
16033
16034 as->current_transfer = NULL;
16035 + as->next_transfer = NULL;
16036
16037 /* continue if needed */
16038 if (list_empty(&as->queue) || as->stopping)
16039 @@ -377,7 +437,7 @@ atmel_spi_interrupt(int irq, void *dev_id)
16040
16041 spi_writel(as, IDR, pending);
16042
16043 - if (as->remaining_bytes == 0) {
16044 + if (as->current_remaining_bytes == 0) {
16045 msg->actual_length += xfer->len;
16046
16047 if (!msg->is_dma_mapped)
16048 @@ -387,7 +447,7 @@ atmel_spi_interrupt(int irq, void *dev_id)
16049 if (xfer->delay_usecs)
16050 udelay(xfer->delay_usecs);
16051
16052 - if (msg->transfers.prev == &xfer->transfer_list) {
16053 + if (atmel_spi_xfer_is_last(msg, xfer)) {
16054 /* report completed message */
16055 atmel_spi_msg_done(master, as, msg, 0,
16056 xfer->cs_change);
16057 @@ -490,9 +550,14 @@ static int atmel_spi_setup(struct spi_device *spi)
16058 if (!(spi->mode & SPI_CPHA))
16059 csr |= SPI_BIT(NCPHA);
16060
16061 - /* TODO: DLYBS and DLYBCT */
16062 - csr |= SPI_BF(DLYBS, 10);
16063 - csr |= SPI_BF(DLYBCT, 10);
16064 + /* DLYBS is mostly irrelevant since we manage chipselect using GPIOs.
16065 + *
16066 + * DLYBCT would add delays between words, slowing down transfers.
16067 + * It could potentially be useful to cope with DMA bottlenecks, but
16068 + * in those cases it's probably best to just use a lower bitrate.
16069 + */
16070 + csr |= SPI_BF(DLYBS, 0);
16071 + csr |= SPI_BF(DLYBCT, 0);
16072
16073 /* chipselect must have been muxed as GPIO (e.g. in board setup) */
16074 npcs_pin = (unsigned int)spi->controller_data;
16075 diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c
16076 index 7c30cc8..5e99671 100644
16077 --- a/drivers/video/atmel_lcdfb.c
16078 +++ b/drivers/video/atmel_lcdfb.c
16079 @@ -16,6 +16,7 @@
16080 #include <linux/fb.h>
16081 #include <linux/init.h>
16082 #include <linux/delay.h>
16083 +#include <linux/backlight.h>
16084
16085 #include <asm/arch/board.h>
16086 #include <asm/arch/cpu.h>
16087 @@ -37,7 +38,9 @@
16088 #endif
16089
16090 #if defined(CONFIG_ARCH_AT91)
16091 -#define ATMEL_LCDFB_FBINFO_DEFAULT FBINFO_DEFAULT
16092 +#define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
16093 + | FBINFO_PARTIAL_PAN_OK \
16094 + | FBINFO_HWACCEL_YPAN)
16095
16096 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
16097 struct fb_var_screeninfo *var)
16098 @@ -69,12 +72,113 @@ static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
16099 }
16100 #endif
16101
16102 +static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
16103 + | ATMEL_LCDC_POL_POSITIVE
16104 + | ATMEL_LCDC_ENA_PWMENABLE;
16105 +
16106 +#ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
16107 +
16108 +/* some bl->props field just changed */
16109 +static int atmel_bl_update_status(struct backlight_device *bl)
16110 +{
16111 + struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
16112 + int power = sinfo->bl_power;
16113 + int brightness = bl->props.brightness;
16114 +
16115 + /* REVISIT there may be a meaningful difference between
16116 + * fb_blank and power ... there seem to be some cases
16117 + * this doesn't handle correctly.
16118 + */
16119 + if (bl->props.fb_blank != sinfo->bl_power)
16120 + power = bl->props.fb_blank;
16121 + else if (bl->props.power != sinfo->bl_power)
16122 + power = bl->props.power;
16123 +
16124 + if (brightness < 0 && power == FB_BLANK_UNBLANK)
16125 + brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
16126 + else if (power != FB_BLANK_UNBLANK)
16127 + brightness = 0;
16128 +
16129 + lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
16130 + lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
16131 + brightness ? contrast_ctr : 0);
16132 +
16133 + bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
16134 +
16135 + return 0;
16136 +}
16137 +
16138 +static int atmel_bl_get_brightness(struct backlight_device *bl)
16139 +{
16140 + struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
16141 +
16142 + return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
16143 +}
16144 +
16145 +static struct backlight_ops atmel_lcdc_bl_ops = {
16146 + .update_status = atmel_bl_update_status,
16147 + .get_brightness = atmel_bl_get_brightness,
16148 +};
16149 +
16150 +static void init_backlight(struct atmel_lcdfb_info *sinfo)
16151 +{
16152 + struct backlight_device *bl;
16153 +
16154 + sinfo->bl_power = FB_BLANK_UNBLANK;
16155 +
16156 + if (sinfo->backlight)
16157 + return;
16158 +
16159 + bl = backlight_device_register("backlight", &sinfo->pdev->dev,
16160 + sinfo, &atmel_lcdc_bl_ops);
16161 + if (IS_ERR(sinfo->backlight)) {
16162 + dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
16163 + PTR_ERR(bl));
16164 + return;
16165 + }
16166 + sinfo->backlight = bl;
16167 +
16168 + bl->props.power = FB_BLANK_UNBLANK;
16169 + bl->props.fb_blank = FB_BLANK_UNBLANK;
16170 + bl->props.max_brightness = 0xff;
16171 + bl->props.brightness = atmel_bl_get_brightness(bl);
16172 +}
16173 +
16174 +static void exit_backlight(struct atmel_lcdfb_info *sinfo)
16175 +{
16176 + if (sinfo->backlight)
16177 + backlight_device_unregister(sinfo->backlight);
16178 +}
16179 +
16180 +#else
16181 +
16182 +static void init_backlight(struct atmel_lcdfb_info *sinfo)
16183 +{
16184 + dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
16185 +}
16186 +
16187 +static void exit_backlight(struct atmel_lcdfb_info *sinfo)
16188 +{
16189 +}
16190 +
16191 +#endif
16192 +
16193 +static void init_contrast(struct atmel_lcdfb_info *sinfo)
16194 +{
16195 + /* have some default contrast/backlight settings */
16196 + lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
16197 + lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
16198 +
16199 + if (sinfo->lcdcon_is_backlight)
16200 + init_backlight(sinfo);
16201 +}
16202 +
16203
16204 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
16205 .type = FB_TYPE_PACKED_PIXELS,
16206 .visual = FB_VISUAL_TRUECOLOR,
16207 .xpanstep = 0,
16208 - .ypanstep = 0,
16209 + .ypanstep = 1,
16210 .ywrapstep = 0,
16211 .accel = FB_ACCEL_NONE,
16212 };
16213 @@ -148,6 +252,8 @@ static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
16214 return -ENOMEM;
16215 }
16216
16217 + memset(info->screen_base, 0, info->fix.smem_len);
16218 +
16219 return 0;
16220 }
16221
16222 @@ -203,6 +309,26 @@ static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
16223 var->transp.offset = var->transp.length = 0;
16224 var->xoffset = var->yoffset = 0;
16225
16226 + /* Saturate vertical and horizontal timings at maximum values */
16227 + var->vsync_len = min_t(u32, var->vsync_len,
16228 + (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
16229 + var->upper_margin = min_t(u32, var->upper_margin,
16230 + ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
16231 + var->lower_margin = min_t(u32, var->lower_margin,
16232 + ATMEL_LCDC_VFP);
16233 + var->right_margin = min_t(u32, var->right_margin,
16234 + (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
16235 + var->hsync_len = min_t(u32, var->hsync_len,
16236 + (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
16237 + var->left_margin = min_t(u32, var->left_margin,
16238 + ATMEL_LCDC_HBP + 1);
16239 +
16240 + /* Some parameters can't be zero */
16241 + var->vsync_len = max_t(u32, var->vsync_len, 1);
16242 + var->right_margin = max_t(u32, var->right_margin, 1);
16243 + var->hsync_len = max_t(u32, var->hsync_len, 1);
16244 + var->left_margin = max_t(u32, var->left_margin, 1);
16245 +
16246 switch (var->bits_per_pixel) {
16247 case 1:
16248 case 2:
16249 @@ -370,10 +496,6 @@ static int atmel_lcdfb_set_par(struct fb_info *info)
16250 /* Disable all interrupts */
16251 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
16252
16253 - /* Set contrast */
16254 - value = ATMEL_LCDC_PS_DIV8 | ATMEL_LCDC_POL_POSITIVE | ATMEL_LCDC_ENA_PWMENABLE;
16255 - lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, value);
16256 - lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
16257 /* ...wait for DMA engine to become idle... */
16258 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
16259 msleep(10);
16260 @@ -516,7 +638,6 @@ static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
16261 struct fb_info *info = sinfo->info;
16262 int ret = 0;
16263
16264 - memset_io(info->screen_base, 0, info->fix.smem_len);
16265 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
16266
16267 dev_info(info->device,
16268 @@ -577,6 +698,7 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev)
16269 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
16270 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
16271 sinfo->guard_time = pdata_sinfo->guard_time;
16272 + sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
16273 } else {
16274 dev_err(dev, "cannot get default configuration\n");
16275 goto free_info;
16276 @@ -645,6 +767,11 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev)
16277 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
16278 if (!info->screen_base)
16279 goto release_intmem;
16280 +
16281 + /*
16282 + * Don't clear the framebuffer -- someone may have set
16283 + * up a splash image.
16284 + */
16285 } else {
16286 /* alocate memory buffer */
16287 ret = atmel_lcdfb_alloc_video_memory(sinfo);
16288 @@ -670,6 +797,9 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev)
16289 goto release_mem;
16290 }
16291
16292 + /* Initialize PWM for contrast or backlight ("off") */
16293 + init_contrast(sinfo);
16294 +
16295 /* interrupt */
16296 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
16297 if (ret) {
16298 @@ -721,6 +851,7 @@ free_cmap:
16299 unregister_irqs:
16300 free_irq(sinfo->irq_base, info);
16301 unmap_mmio:
16302 + exit_backlight(sinfo);
16303 iounmap(sinfo->mmio);
16304 release_mem:
16305 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
16306 @@ -755,6 +886,7 @@ static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
16307 if (!sinfo)
16308 return 0;
16309
16310 + exit_backlight(sinfo);
16311 if (sinfo->atmel_lcdfb_power_control)
16312 sinfo->atmel_lcdfb_power_control(0);
16313 unregister_framebuffer(info);
16314 @@ -781,6 +913,9 @@ static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
16315
16316 static struct platform_driver atmel_lcdfb_driver = {
16317 .remove = __exit_p(atmel_lcdfb_remove),
16318 +
16319 +// FIXME need suspend, resume
16320 +
16321 .driver = {
16322 .name = "atmel_lcdfb",
16323 .owner = THIS_MODULE,
16324 diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
16325 index 9609a6c..924e255 100644
16326 --- a/drivers/video/backlight/Kconfig
16327 +++ b/drivers/video/backlight/Kconfig
16328 @@ -50,6 +50,19 @@ config BACKLIGHT_CLASS_DEVICE
16329 To have support for your specific LCD panel you will have to
16330 select the proper drivers which depend on this option.
16331
16332 +config BACKLIGHT_ATMEL_LCDC
16333 + bool "Atmel LCDC Contrast-as-Backlight control"
16334 + depends on BACKLIGHT_CLASS_DEVICE && FB_ATMEL
16335 + default y if MACH_SAM9261EK || MACH_SAM9263EK
16336 + help
16337 + This provides a backlight control internal to the Atmel LCDC
16338 + driver. If the LCD "contrast control" on your board is wired
16339 + so it controls the backlight brightness, select this option to
16340 + export this as a PWM-based backlight control.
16341 +
16342 + If in doubt, it's safe to enable this option; it doesn't kick
16343 + in unless the board's description says it's wired that way.
16344 +
16345 config BACKLIGHT_CORGI
16346 tristate "Generic (aka Sharp Corgi) Backlight Driver"
16347 depends on BACKLIGHT_CLASS_DEVICE
16348 diff --git a/drivers/video/console/Kconfig b/drivers/video/console/Kconfig
16349 index b87ed37..2b53d1f 100644
16350 --- a/drivers/video/console/Kconfig
16351 +++ b/drivers/video/console/Kconfig
16352 @@ -6,7 +6,7 @@ menu "Console display driver support"
16353
16354 config VGA_CONSOLE
16355 bool "VGA text console" if EMBEDDED || !X86
16356 - depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN
16357 + depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN && !AVR32
16358 default y
16359 help
16360 Saying Y here will allow you to use Linux in text mode through a
16361 diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
16362 index 52dff40..fbd6112 100644
16363 --- a/drivers/watchdog/Kconfig
16364 +++ b/drivers/watchdog/Kconfig
16365 @@ -223,7 +223,7 @@ config DAVINCI_WATCHDOG
16366
16367 config AT32AP700X_WDT
16368 tristate "AT32AP700x watchdog"
16369 - depends on CPU_AT32AP7000
16370 + depends on CPU_AT32AP700X
16371 help
16372 Watchdog timer embedded into AT32AP700x devices. This will reboot
16373 your system when the timeout is reached.
16374 diff --git a/include/asm-avr32/arch-at32ap/at32ap7000.h b/include/asm-avr32/arch-at32ap/at32ap7000.h
16375 deleted file mode 100644
16376 index 3914d7b..0000000
16377 --- a/include/asm-avr32/arch-at32ap/at32ap7000.h
16378 +++ /dev/null
16379 @@ -1,35 +0,0 @@
16380 -/*
16381 - * Pin definitions for AT32AP7000.
16382 - *
16383 - * Copyright (C) 2006 Atmel Corporation
16384 - *
16385 - * This program is free software; you can redistribute it and/or modify
16386 - * it under the terms of the GNU General Public License version 2 as
16387 - * published by the Free Software Foundation.
16388 - */
16389 -#ifndef __ASM_ARCH_AT32AP7000_H__
16390 -#define __ASM_ARCH_AT32AP7000_H__
16391 -
16392 -#define GPIO_PERIPH_A 0
16393 -#define GPIO_PERIPH_B 1
16394 -
16395 -#define NR_GPIO_CONTROLLERS 4
16396 -
16397 -/*
16398 - * Pin numbers identifying specific GPIO pins on the chip. They can
16399 - * also be converted to IRQ numbers by passing them through
16400 - * gpio_to_irq().
16401 - */
16402 -#define GPIO_PIOA_BASE (0)
16403 -#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32)
16404 -#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32)
16405 -#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32)
16406 -#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32)
16407 -
16408 -#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N))
16409 -#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N))
16410 -#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N))
16411 -#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N))
16412 -#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N))
16413 -
16414 -#endif /* __ASM_ARCH_AT32AP7000_H__ */
16415 diff --git a/include/asm-avr32/arch-at32ap/at32ap700x.h b/include/asm-avr32/arch-at32ap/at32ap700x.h
16416 new file mode 100644
16417 index 0000000..99684d6
16418 --- /dev/null
16419 +++ b/include/asm-avr32/arch-at32ap/at32ap700x.h
16420 @@ -0,0 +1,35 @@
16421 +/*
16422 + * Pin definitions for AT32AP7000.
16423 + *
16424 + * Copyright (C) 2006 Atmel Corporation
16425 + *
16426 + * This program is free software; you can redistribute it and/or modify
16427 + * it under the terms of the GNU General Public License version 2 as
16428 + * published by the Free Software Foundation.
16429 + */
16430 +#ifndef __ASM_ARCH_AT32AP700X_H__
16431 +#define __ASM_ARCH_AT32AP700X_H__
16432 +
16433 +#define GPIO_PERIPH_A 0
16434 +#define GPIO_PERIPH_B 1
16435 +
16436 +#define NR_GPIO_CONTROLLERS 4
16437 +
16438 +/*
16439 + * Pin numbers identifying specific GPIO pins on the chip. They can
16440 + * also be converted to IRQ numbers by passing them through
16441 + * gpio_to_irq().
16442 + */
16443 +#define GPIO_PIOA_BASE (0)
16444 +#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32)
16445 +#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32)
16446 +#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32)
16447 +#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32)
16448 +
16449 +#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N))
16450 +#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N))
16451 +#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N))
16452 +#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N))
16453 +#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N))
16454 +
16455 +#endif /* __ASM_ARCH_AT32AP700X_H__ */
16456 diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h
16457 index d6993a6..8816b66 100644
16458 --- a/include/asm-avr32/arch-at32ap/board.h
16459 +++ b/include/asm-avr32/arch-at32ap/board.h
16460 @@ -51,6 +51,9 @@ struct platform_device *
16461 at32_add_device_ide(unsigned int id, unsigned int extint,
16462 struct ide_platform_data *data);
16463
16464 +/* mask says which PWM channels to mux */
16465 +struct platform_device *at32_add_device_pwm(u32 mask);
16466 +
16467 /* depending on what's hooked up, not all SSC pins will be used */
16468 #define ATMEL_SSC_TK 0x01
16469 #define ATMEL_SSC_TF 0x02
16470 @@ -66,7 +69,13 @@ struct platform_device *
16471 at32_add_device_ssc(unsigned int id, unsigned int flags);
16472
16473 struct platform_device *at32_add_device_twi(unsigned int id);
16474 -struct platform_device *at32_add_device_mci(unsigned int id);
16475 +
16476 +struct mci_platform_data {
16477 + int detect_pin;
16478 + int wp_pin;
16479 +};
16480 +struct platform_device *
16481 +at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
16482 struct platform_device *at32_add_device_ac97c(unsigned int id);
16483 struct platform_device *at32_add_device_abdac(unsigned int id);
16484
16485 diff --git a/include/asm-avr32/arch-at32ap/cpu.h b/include/asm-avr32/arch-at32ap/cpu.h
16486 index a762f42..0dc2026 100644
16487 --- a/include/asm-avr32/arch-at32ap/cpu.h
16488 +++ b/include/asm-avr32/arch-at32ap/cpu.h
16489 @@ -14,7 +14,7 @@
16490 * Only AT32AP7000 is defined for now. We can identify the specific
16491 * chip at runtime, but I'm not sure if it's really worth it.
16492 */
16493 -#ifdef CONFIG_CPU_AT32AP7000
16494 +#ifdef CONFIG_CPU_AT32AP700X
16495 # define cpu_is_at32ap7000() (1)
16496 #else
16497 # define cpu_is_at32ap7000() (0)
16498 diff --git a/include/asm-avr32/arch-at32ap/io.h b/include/asm-avr32/arch-at32ap/io.h
16499 index ee59e40..4ec6abc 100644
16500 --- a/include/asm-avr32/arch-at32ap/io.h
16501 +++ b/include/asm-avr32/arch-at32ap/io.h
16502 @@ -4,7 +4,7 @@
16503 /* For "bizarre" halfword swapping */
16504 #include <linux/byteorder/swabb.h>
16505
16506 -#if defined(CONFIG_AP7000_32_BIT_SMC)
16507 +#if defined(CONFIG_AP700X_32_BIT_SMC)
16508 # define __swizzle_addr_b(addr) (addr ^ 3UL)
16509 # define __swizzle_addr_w(addr) (addr ^ 2UL)
16510 # define __swizzle_addr_l(addr) (addr)
16511 @@ -14,7 +14,7 @@
16512 # define __mem_ioswabb(a, x) (x)
16513 # define __mem_ioswabw(a, x) swab16(x)
16514 # define __mem_ioswabl(a, x) swab32(x)
16515 -#elif defined(CONFIG_AP7000_16_BIT_SMC)
16516 +#elif defined(CONFIG_AP700X_16_BIT_SMC)
16517 # define __swizzle_addr_b(addr) (addr ^ 1UL)
16518 # define __swizzle_addr_w(addr) (addr)
16519 # define __swizzle_addr_l(addr) (addr)
16520 diff --git a/include/asm-avr32/arch-at32ap/portmux.h b/include/asm-avr32/arch-at32ap/portmux.h
16521 index b1abe6b..135e034 100644
16522 --- a/include/asm-avr32/arch-at32ap/portmux.h
16523 +++ b/include/asm-avr32/arch-at32ap/portmux.h
16524 @@ -26,4 +26,16 @@ void at32_select_periph(unsigned int pin, unsigned int periph,
16525 void at32_select_gpio(unsigned int pin, unsigned long flags);
16526 void at32_reserve_pin(unsigned int pin);
16527
16528 +#ifdef CONFIG_GPIO_DEV
16529 +
16530 +/* Gang allocators and accessors; used by the GPIO /dev driver */
16531 +int at32_gpio_port_is_valid(unsigned int port);
16532 +int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask);
16533 +void at32_deselect_pins(unsigned int port, u32 pins);
16534 +
16535 +u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins);
16536 +void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask);
16537 +
16538 +#endif /* CONFIG_GPIO_DEV */
16539 +
16540 #endif /* __ASM_ARCH_PORTMUX_H__ */
16541 diff --git a/include/asm-avr32/dma-controller.h b/include/asm-avr32/dma-controller.h
16542 new file mode 100644
16543 index 0000000..56a4965
16544 --- /dev/null
16545 +++ b/include/asm-avr32/dma-controller.h
16546 @@ -0,0 +1,166 @@
16547 +/*
16548 + * Copyright (C) 2005-2006 Atmel Corporation
16549 + *
16550 + * This program is free software; you can redistribute it and/or modify
16551 + * it under the terms of the GNU General Public License version 2 as
16552 + * published by the Free Software Foundation.
16553 + */
16554 +#ifndef __ASM_AVR32_DMA_CONTROLLER_H
16555 +#define __ASM_AVR32_DMA_CONTROLLER_H
16556 +
16557 +#include <linux/device.h>
16558 +
16559 +#define DMA_DIR_MEM_TO_MEM 0x0000
16560 +#define DMA_DIR_MEM_TO_PERIPH 0x0001
16561 +#define DMA_DIR_PERIPH_TO_MEM 0x0002
16562 +#define DMA_DIR_PERIPH_TO_PERIPH 0x0003
16563 +
16564 +#define DMA_WIDTH_8BIT 0
16565 +#define DMA_WIDTH_16BIT 1
16566 +#define DMA_WIDTH_32BIT 2
16567 +
16568 +struct dma_request {
16569 + struct dma_controller *dmac;
16570 + struct list_head list;
16571 +
16572 + unsigned short channel;
16573 +
16574 + void (*xfer_complete)(struct dma_request *req);
16575 + void (*block_complete)(struct dma_request *req);
16576 + void (*error)(struct dma_request *req);
16577 +};
16578 +
16579 +struct dma_request_sg {
16580 + struct dma_request req;
16581 +
16582 + int nr_sg;
16583 + struct scatterlist *sg;
16584 + unsigned long block_size;
16585 + unsigned int nr_blocks;
16586 +
16587 + dma_addr_t data_reg;
16588 + unsigned short periph_id;
16589 +
16590 + unsigned char direction;
16591 + unsigned char width;
16592 +};
16593 +#define to_dma_request_sg(_req) \
16594 + container_of(_req, struct dma_request_sg, req)
16595 +
16596 +struct dma_request_cyclic {
16597 + struct dma_request req;
16598 +
16599 + int periods;
16600 + unsigned long buffer_size;
16601 +
16602 + dma_addr_t buffer_start;
16603 + dma_addr_t data_reg;
16604 +
16605 + unsigned short periph_id;
16606 + unsigned char direction;
16607 + unsigned char width;
16608 +
16609 + void *dev_id;
16610 +};
16611 +#define to_dma_request_cyclic(_req) \
16612 + container_of(_req, struct dma_request_cyclic, req)
16613 +
16614 +struct dma_request_memcpy {
16615 + struct dma_request req;
16616 +
16617 + dma_addr_t src_addr;
16618 + unsigned int src_width;
16619 + unsigned int src_stride;
16620 +
16621 + dma_addr_t dst_addr;
16622 + unsigned int dst_width;
16623 + unsigned int dst_stride;
16624 +
16625 + size_t length;
16626 +
16627 + unsigned short src_reverse:1;
16628 + unsigned short dst_reverse:1;
16629 +};
16630 +#define to_dma_request_memcpy(_req) \
16631 + container_of(_req, struct dma_request_memcpy, req)
16632 +
16633 +struct dma_controller {
16634 + struct list_head list;
16635 + int id;
16636 + struct device *dev;
16637 +
16638 + int (*alloc_channel)(struct dma_controller *dmac);
16639 + void (*release_channel)(struct dma_controller *dmac,
16640 + int channel);
16641 + int (*prepare_request_sg)(struct dma_controller *dmac,
16642 + struct dma_request_sg *req);
16643 + int (*prepare_request_cyclic)(struct dma_controller *dmac,
16644 + struct dma_request_cyclic *req);
16645 + int (*prepare_request_memcpy)(struct dma_controller *dmac,
16646 + struct dma_request_memcpy *req);
16647 + int (*start_request)(struct dma_controller *dmac,
16648 + unsigned int channel);
16649 + int (*stop_request)(struct dma_controller *dmac,
16650 + unsigned int channel);
16651 + dma_addr_t (*get_current_pos)(struct dma_controller *dmac,
16652 + unsigned int channel);
16653 +};
16654 +
16655 +static inline int
16656 +dma_alloc_channel(struct dma_controller *dmac)
16657 +{
16658 + return dmac->alloc_channel(dmac);
16659 +}
16660 +
16661 +static inline void
16662 +dma_release_channel(struct dma_controller *dmac, int chan)
16663 +{
16664 + dmac->release_channel(dmac, chan);
16665 +}
16666 +
16667 +static inline int
16668 +dma_prepare_request_sg(struct dma_controller *dmac,
16669 + struct dma_request_sg *req)
16670 +{
16671 + return dmac->prepare_request_sg(dmac, req);
16672 +}
16673 +
16674 +static inline int
16675 +dma_prepare_request_cyclic(struct dma_controller *dmac,
16676 + struct dma_request_cyclic *req)
16677 +{
16678 + return dmac->prepare_request_cyclic(dmac, req);
16679 +}
16680 +
16681 +static inline int
16682 +dma_prepare_request_memcpy(struct dma_controller *dmac,
16683 + struct dma_request_memcpy *req)
16684 +{
16685 + return dmac->prepare_request_memcpy(dmac, req);
16686 +}
16687 +
16688 +static inline int
16689 +dma_start_request(struct dma_controller *dmac,
16690 + unsigned int channel)
16691 +{
16692 + return dmac->start_request(dmac, channel);
16693 +}
16694 +
16695 +static inline int
16696 +dma_stop_request(struct dma_controller *dmac,
16697 + unsigned int channel)
16698 +{
16699 + return dmac->stop_request(dmac, channel);
16700 +}
16701 +
16702 +static inline dma_addr_t
16703 +dma_get_current_pos(struct dma_controller *dmac,
16704 + unsigned int channel)
16705 +{
16706 + return dmac->get_current_pos(dmac, channel);
16707 +}
16708 +
16709 +extern int register_dma_controller(struct dma_controller *dmac);
16710 +extern struct dma_controller *find_dma_controller(int id);
16711 +
16712 +#endif /* __ASM_AVR32_DMA_CONTROLLER_H */
16713 diff --git a/include/asm-avr32/irq.h b/include/asm-avr32/irq.h
16714 index 83e6549..9315724 100644
16715 --- a/include/asm-avr32/irq.h
16716 +++ b/include/asm-avr32/irq.h
16717 @@ -11,4 +11,9 @@
16718
16719 #define irq_canonicalize(i) (i)
16720
16721 +#ifndef __ASSEMBLER__
16722 +int nmi_enable(void);
16723 +void nmi_disable(void);
16724 +#endif
16725 +
16726 #endif /* __ASM_AVR32_IOCTLS_H */
16727 diff --git a/include/asm-avr32/kdebug.h b/include/asm-avr32/kdebug.h
16728 index fd7e990..ca4f954 100644
16729 --- a/include/asm-avr32/kdebug.h
16730 +++ b/include/asm-avr32/kdebug.h
16731 @@ -5,6 +5,7 @@
16732 enum die_val {
16733 DIE_BREAKPOINT,
16734 DIE_SSTEP,
16735 + DIE_NMI,
16736 };
16737
16738 #endif /* __ASM_AVR32_KDEBUG_H */
16739 diff --git a/include/asm-avr32/ocd.h b/include/asm-avr32/ocd.h
16740 index 996405e..6bef094 100644
16741 --- a/include/asm-avr32/ocd.h
16742 +++ b/include/asm-avr32/ocd.h
16743 @@ -533,6 +533,11 @@ static inline void __ocd_write(unsigned int reg, unsigned long value)
16744 #define ocd_read(reg) __ocd_read(OCD_##reg)
16745 #define ocd_write(reg, value) __ocd_write(OCD_##reg, value)
16746
16747 +struct task_struct;
16748 +
16749 +void ocd_enable(struct task_struct *child);
16750 +void ocd_disable(struct task_struct *child);
16751 +
16752 #endif /* !__ASSEMBLER__ */
16753
16754 #endif /* __ASM_AVR32_OCD_H */
16755 diff --git a/include/asm-avr32/processor.h b/include/asm-avr32/processor.h
16756 index a52576b..4212551 100644
16757 --- a/include/asm-avr32/processor.h
16758 +++ b/include/asm-avr32/processor.h
16759 @@ -57,11 +57,25 @@ struct avr32_cpuinfo {
16760 unsigned short cpu_revision;
16761 enum tlb_config tlb_config;
16762 unsigned long features;
16763 + u32 device_id;
16764
16765 struct cache_info icache;
16766 struct cache_info dcache;
16767 };
16768
16769 +static inline unsigned int avr32_get_manufacturer_id(struct avr32_cpuinfo *cpu)
16770 +{
16771 + return (cpu->device_id >> 1) & 0x7f;
16772 +}
16773 +static inline unsigned int avr32_get_product_number(struct avr32_cpuinfo *cpu)
16774 +{
16775 + return (cpu->device_id >> 12) & 0xffff;
16776 +}
16777 +static inline unsigned int avr32_get_chip_revision(struct avr32_cpuinfo *cpu)
16778 +{
16779 + return (cpu->device_id >> 28) & 0x0f;
16780 +}
16781 +
16782 extern struct avr32_cpuinfo boot_cpu_data;
16783
16784 #ifdef CONFIG_SMP
16785 diff --git a/include/asm-avr32/ptrace.h b/include/asm-avr32/ptrace.h
16786 index 8c5dba5..9e2d44f 100644
16787 --- a/include/asm-avr32/ptrace.h
16788 +++ b/include/asm-avr32/ptrace.h
16789 @@ -121,7 +121,15 @@ struct pt_regs {
16790 };
16791
16792 #ifdef __KERNEL__
16793 -# define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER)
16794 +
16795 +#include <asm/ocd.h>
16796 +
16797 +#define arch_ptrace_attach(child) ocd_enable(child)
16798 +
16799 +#define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER)
16800 +#define instruction_pointer(regs) ((regs)->pc)
16801 +#define profile_pc(regs) instruction_pointer(regs)
16802 +
16803 extern void show_regs (struct pt_regs *);
16804
16805 static __inline__ int valid_user_regs(struct pt_regs *regs)
16806 @@ -141,9 +149,6 @@ static __inline__ int valid_user_regs(struct pt_regs *regs)
16807 return 0;
16808 }
16809
16810 -#define instruction_pointer(regs) ((regs)->pc)
16811 -
16812 -#define profile_pc(regs) instruction_pointer(regs)
16813
16814 #endif /* __KERNEL__ */
16815
16816 diff --git a/include/asm-avr32/thread_info.h b/include/asm-avr32/thread_info.h
16817 index 184b574..07049f6 100644
16818 --- a/include/asm-avr32/thread_info.h
16819 +++ b/include/asm-avr32/thread_info.h
16820 @@ -88,6 +88,7 @@ static inline struct thread_info *current_thread_info(void)
16821 #define TIF_MEMDIE 6
16822 #define TIF_RESTORE_SIGMASK 7 /* restore signal mask in do_signal */
16823 #define TIF_CPU_GOING_TO_SLEEP 8 /* CPU is entering sleep 0 mode */
16824 +#define TIF_DEBUG 30 /* debugging enabled */
16825 #define TIF_USERSPACE 31 /* true if FS sets userspace */
16826
16827 #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
16828 diff --git a/include/linux/atmel_pwm.h b/include/linux/atmel_pwm.h
16829 new file mode 100644
16830 index 0000000..ea04abb
16831 --- /dev/null
16832 +++ b/include/linux/atmel_pwm.h
16833 @@ -0,0 +1,70 @@
16834 +#ifndef __LINUX_ATMEL_PWM_H
16835 +#define __LINUX_ATMEL_PWM_H
16836 +
16837 +/**
16838 + * struct pwm_channel - driver handle to a PWM channel
16839 + * @regs: base of this channel's registers
16840 + * @index: number of this channel (0..31)
16841 + * @mck: base clock rate, which can be prescaled and maybe subdivided
16842 + *
16843 + * Drivers initialize a pwm_channel structure using pwm_channel_alloc().
16844 + * Then they configure its clock rate (derived from MCK), alignment,
16845 + * polarity, and duty cycle by writing directly to the channel registers,
16846 + * before enabling the channel by calling pwm_channel_enable().
16847 + *
16848 + * After emitting a PWM signal for the desired length of time, drivers
16849 + * may then pwm_channel_disable() or pwm_channel_free(). Both of these
16850 + * disable the channel, but when it's freed the IRQ is deconfigured and
16851 + * the channel must later be re-allocated and reconfigured.
16852 + *
16853 + * Note that if the period or duty cycle need to be changed while the
16854 + * PWM channel is operating, drivers must use the PWM_CUPD double buffer
16855 + * mechanism, either polling until they change or getting implicitly
16856 + * notified through a once-per-period interrupt handler.
16857 + */
16858 +struct pwm_channel {
16859 + void __iomem *regs;
16860 + unsigned index;
16861 + unsigned long mck;
16862 +};
16863 +
16864 +extern int pwm_channel_alloc(int index, struct pwm_channel *ch);
16865 +extern int pwm_channel_free(struct pwm_channel *ch);
16866 +
16867 +extern int pwm_clk_alloc(unsigned prescale, unsigned div);
16868 +extern void pwm_clk_free(unsigned clk);
16869 +
16870 +extern int __pwm_channel_onoff(struct pwm_channel *ch, int enabled);
16871 +
16872 +#define pwm_channel_enable(ch) __pwm_channel_onoff((ch), 1)
16873 +#define pwm_channel_disable(ch) __pwm_channel_onoff((ch), 0)
16874 +
16875 +/* periodic interrupts, mostly for CUPD changes to period or cycle */
16876 +extern int pwm_channel_handler(struct pwm_channel *ch,
16877 + void (*handler)(struct pwm_channel *ch));
16878 +
16879 +/* per-channel registers (banked at pwm_channel->regs) */
16880 +#define PWM_CMR 0x00 /* mode register */
16881 +#define PWM_CPR_CPD (1 << 10) /* set: CUPD modifies period */
16882 +#define PWM_CPR_CPOL (1 << 9) /* set: idle high */
16883 +#define PWM_CPR_CALG (1 << 8) /* set: center align */
16884 +#define PWM_CPR_CPRE (0xf << 0) /* mask: rate is mck/(2^pre) */
16885 +#define PWM_CPR_CLKA (0xb << 0) /* rate CLKA */
16886 +#define PWM_CPR_CLKB (0xc << 0) /* rate CLKB */
16887 +#define PWM_CDTY 0x04 /* duty cycle (max of CPRD) */
16888 +#define PWM_CPRD 0x08 /* period (count up from zero) */
16889 +#define PWM_CCNT 0x0c /* counter (20 bits?) */
16890 +#define PWM_CUPD 0x10 /* update CPRD (or CDTY) next period */
16891 +
16892 +static inline void
16893 +pwm_channel_writel(struct pwm_channel *pwmc, unsigned offset, u32 val)
16894 +{
16895 + __raw_writel(val, pwmc->regs + offset);
16896 +}
16897 +
16898 +static inline u32 pwm_channel_readl(struct pwm_channel *pwmc, unsigned offset)
16899 +{
16900 + return __raw_readl(pwmc->regs + offset);
16901 +}
16902 +
16903 +#endif /* __LINUX_ATMEL_PWM_H */
16904 diff --git a/include/video/atmel_lcdc.h b/include/video/atmel_lcdc.h
16905 index 4eea637..336c20d 100644
16906 --- a/include/video/atmel_lcdc.h
16907 +++ b/include/video/atmel_lcdc.h
16908 @@ -22,7 +22,7 @@
16909 #ifndef __ATMEL_LCDC_H__
16910 #define __ATMEL_LCDC_H__
16911
16912 - /* LCD Controller info data structure */
16913 + /* LCD Controller info data structure, stored in device platform_data */
16914 struct atmel_lcdfb_info {
16915 spinlock_t lock;
16916 struct fb_info *info;
16917 @@ -33,7 +33,14 @@ struct atmel_lcdfb_info {
16918 struct platform_device *pdev;
16919 struct clk *bus_clk;
16920 struct clk *lcdc_clk;
16921 - unsigned int default_bpp;
16922 +
16923 +#ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
16924 + struct backlight_device *backlight;
16925 + u8 bl_power;
16926 +#endif
16927 + bool lcdcon_is_backlight;
16928 +
16929 + u8 default_bpp;
16930 unsigned int default_lcdcon2;
16931 unsigned int default_dmacon;
16932 void (*atmel_lcdfb_power_control)(int on);
16933 @@ -115,20 +122,20 @@ struct atmel_lcdfb_info {
16934 #define ATMEL_LCDC_MEMOR_LITTLE (1 << 31)
16935
16936 #define ATMEL_LCDC_TIM1 0x0808
16937 -#define ATMEL_LCDC_VFP (0xff << 0)
16938 +#define ATMEL_LCDC_VFP (0xffU << 0)
16939 #define ATMEL_LCDC_VBP_OFFSET 8
16940 -#define ATMEL_LCDC_VBP (0xff << ATMEL_LCDC_VBP_OFFSET)
16941 +#define ATMEL_LCDC_VBP (0xffU << ATMEL_LCDC_VBP_OFFSET)
16942 #define ATMEL_LCDC_VPW_OFFSET 16
16943 -#define ATMEL_LCDC_VPW (0x3f << ATMEL_LCDC_VPW_OFFSET)
16944 +#define ATMEL_LCDC_VPW (0x3fU << ATMEL_LCDC_VPW_OFFSET)
16945 #define ATMEL_LCDC_VHDLY_OFFSET 24
16946 -#define ATMEL_LCDC_VHDLY (0xf << ATMEL_LCDC_VHDLY_OFFSET)
16947 +#define ATMEL_LCDC_VHDLY (0xfU << ATMEL_LCDC_VHDLY_OFFSET)
16948
16949 #define ATMEL_LCDC_TIM2 0x080c
16950 -#define ATMEL_LCDC_HBP (0xff << 0)
16951 +#define ATMEL_LCDC_HBP (0xffU << 0)
16952 #define ATMEL_LCDC_HPW_OFFSET 8
16953 -#define ATMEL_LCDC_HPW (0x3f << ATMEL_LCDC_HPW_OFFSET)
16954 +#define ATMEL_LCDC_HPW (0x3fU << ATMEL_LCDC_HPW_OFFSET)
16955 #define ATMEL_LCDC_HFP_OFFSET 21
16956 -#define ATMEL_LCDC_HFP (0x7ff << ATMEL_LCDC_HFP_OFFSET)
16957 +#define ATMEL_LCDC_HFP (0x7ffU << ATMEL_LCDC_HFP_OFFSET)
16958
16959 #define ATMEL_LCDC_LCDFRMCFG 0x0810
16960 #define ATMEL_LCDC_LINEVAL (0x7ff << 0)
16961 diff --git a/kernel/ptrace.c b/kernel/ptrace.c
16962 index c25db86..c719bb9 100644
16963 --- a/kernel/ptrace.c
16964 +++ b/kernel/ptrace.c
16965 @@ -470,6 +470,8 @@ asmlinkage long sys_ptrace(long request, long pid, long addr, long data)
16966 lock_kernel();
16967 if (request == PTRACE_TRACEME) {
16968 ret = ptrace_traceme();
16969 + if (!ret)
16970 + arch_ptrace_attach(current);
16971 goto out;
16972 }
16973
16974 diff --git a/sound/Kconfig b/sound/Kconfig
16975 index b2a2db4..29a9979 100644
16976 --- a/sound/Kconfig
16977 +++ b/sound/Kconfig
16978 @@ -63,6 +63,8 @@ source "sound/aoa/Kconfig"
16979
16980 source "sound/arm/Kconfig"
16981
16982 +source "sound/avr32/Kconfig"
16983 +
16984 if SPI
16985 source "sound/spi/Kconfig"
16986 endif
16987 diff --git a/sound/Makefile b/sound/Makefile
16988 index c76d707..a52b236 100644
16989 --- a/sound/Makefile
16990 +++ b/sound/Makefile
16991 @@ -6,7 +6,7 @@ obj-$(CONFIG_SOUND_PRIME) += sound_firmware.o
16992 obj-$(CONFIG_SOUND_PRIME) += oss/
16993 obj-$(CONFIG_DMASOUND) += oss/
16994 obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ sh/ synth/ usb/ \
16995 - sparc/ spi/ parisc/ pcmcia/ mips/ soc/
16996 + sparc/ spi/ parisc/ pcmcia/ mips/ soc/ avr32/
16997 obj-$(CONFIG_SND_AOA) += aoa/
16998
16999 # This one must be compilable even if sound is configured out
17000 diff --git a/sound/avr32/Kconfig b/sound/avr32/Kconfig
17001 new file mode 100644
17002 index 0000000..17d1d91
17003 --- /dev/null
17004 +++ b/sound/avr32/Kconfig
17005 @@ -0,0 +1,11 @@
17006 +menu "AVR32 devices"
17007 + depends on SND != n && AVR32
17008 +
17009 +config SND_ATMEL_AC97
17010 + tristate "Atmel AC97 Controller Driver"
17011 + select SND_PCM
17012 + select SND_AC97_CODEC
17013 + help
17014 + ALSA sound driver for the Atmel AC97 controller.
17015 +
17016 +endmenu
17017 diff --git a/sound/avr32/Makefile b/sound/avr32/Makefile
17018 new file mode 100644
17019 index 0000000..5d87d0e
17020 --- /dev/null
17021 +++ b/sound/avr32/Makefile
17022 @@ -0,0 +1,3 @@
17023 +snd-atmel-ac97-objs := ac97c.o
17024 +
17025 +obj-$(CONFIG_SND_ATMEL_AC97) += snd-atmel-ac97.o
17026 diff --git a/sound/avr32/ac97c.c b/sound/avr32/ac97c.c
17027 new file mode 100644
17028 index 0000000..0ec0b1c
17029 --- /dev/null
17030 +++ b/sound/avr32/ac97c.c
17031 @@ -0,0 +1,914 @@
17032 +/*
17033 + * Driver for the Atmel AC97 controller
17034 + *
17035 + * Copyright (C) 2005-2007 Atmel Corporation
17036 + *
17037 + * This program is free software; you can redistribute it and/or modify it
17038 + * under the terms of the GNU General Public License version 2 as published by
17039 + * the Free Software Foundation.
17040 + */
17041 +#include <linux/clk.h>
17042 +#include <linux/delay.h>
17043 +#include <linux/dma-mapping.h>
17044 +#include <linux/init.h>
17045 +#include <linux/interrupt.h>
17046 +#include <linux/module.h>
17047 +#include <linux/platform_device.h>
17048 +#include <linux/mutex.h>
17049 +#include <linux/io.h>
17050 +
17051 +#include <sound/driver.h>
17052 +#include <sound/core.h>
17053 +#include <sound/initval.h>
17054 +#include <sound/pcm.h>
17055 +#include <sound/pcm_params.h>
17056 +#include <sound/ac97_codec.h>
17057 +#include <sound/memalloc.h>
17058 +
17059 +#include <asm/dma-controller.h>
17060 +
17061 +#include "ac97c.h"
17062 +
17063 +/* Serialize access to opened */
17064 +static DEFINE_MUTEX(opened_mutex);
17065 +
17066 +struct atmel_ac97_dma_info {
17067 + struct dma_request_cyclic req_tx;
17068 + struct dma_request_cyclic req_rx;
17069 + unsigned short rx_periph_id;
17070 + unsigned short tx_periph_id;
17071 +};
17072 +
17073 +struct atmel_ac97 {
17074 + /* Serialize access to opened */
17075 + spinlock_t lock;
17076 + void __iomem *regs;
17077 + struct snd_pcm_substream *playback_substream;
17078 + struct snd_pcm_substream *capture_substream;
17079 + struct snd_card *card;
17080 + struct snd_pcm *pcm;
17081 + struct snd_ac97 *ac97;
17082 + struct snd_ac97_bus *ac97_bus;
17083 + int opened;
17084 + int period;
17085 + u64 cur_format;
17086 + unsigned int cur_rate;
17087 + struct clk *mck;
17088 + struct platform_device *pdev;
17089 + struct atmel_ac97_dma_info dma;
17090 +};
17091 +
17092 +#define get_chip(card) ((struct atmel_ac97 *)(card)->private_data)
17093 +
17094 +#define ac97c_writel(chip, reg, val) \
17095 + __raw_writel((val), (chip)->regs + AC97C_##reg)
17096 +#define ac97c_readl(chip, reg) \
17097 + __raw_readl((chip)->regs + AC97C_##reg)
17098 +
17099 +/*
17100 + * PCM part
17101 + */
17102 +static struct snd_pcm_hardware snd_atmel_ac97_playback_hw = {
17103 + .info = (SNDRV_PCM_INFO_INTERLEAVED
17104 + | SNDRV_PCM_INFO_MMAP
17105 + | SNDRV_PCM_INFO_MMAP_VALID
17106 + | SNDRV_PCM_INFO_BLOCK_TRANSFER
17107 + | SNDRV_PCM_INFO_JOINT_DUPLEX),
17108 + .formats = (SNDRV_PCM_FMTBIT_S16_BE
17109 + | SNDRV_PCM_FMTBIT_S16_LE),
17110 + .rates = (SNDRV_PCM_RATE_CONTINUOUS),
17111 + .rate_min = 4000,
17112 + .rate_max = 48000,
17113 + .channels_min = 1,
17114 + .channels_max = 6,
17115 + .buffer_bytes_max = 64*1024,
17116 + .period_bytes_min = 512,
17117 + .period_bytes_max = 4095,
17118 + .periods_min = 8,
17119 + .periods_max = 1024,
17120 +};
17121 +
17122 +static struct snd_pcm_hardware snd_atmel_ac97_capture_hw = {
17123 + .info = (SNDRV_PCM_INFO_INTERLEAVED
17124 + | SNDRV_PCM_INFO_MMAP
17125 + | SNDRV_PCM_INFO_MMAP_VALID
17126 + | SNDRV_PCM_INFO_BLOCK_TRANSFER
17127 + | SNDRV_PCM_INFO_JOINT_DUPLEX),
17128 + .formats = (SNDRV_PCM_FMTBIT_S16_BE
17129 + | SNDRV_PCM_FMTBIT_S16_LE),
17130 + .rates = (SNDRV_PCM_RATE_CONTINUOUS),
17131 + .rate_min = 4000,
17132 + .rate_max = 48000,
17133 + .channels_min = 1,
17134 + .channels_max = 2,
17135 + .buffer_bytes_max = 64*1024,
17136 + .period_bytes_min = 512,
17137 + .period_bytes_max = 4095,
17138 + .periods_min = 8,
17139 + .periods_max = 1024,
17140 +};
17141 +
17142 +/*
17143 + * PCM functions
17144 + */
17145 +static int
17146 +snd_atmel_ac97_playback_open(struct snd_pcm_substream *substream)
17147 +{
17148 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
17149 + struct snd_pcm_runtime *runtime = substream->runtime;
17150 +
17151 + mutex_lock(&opened_mutex);
17152 + chip->opened++;
17153 + runtime->hw = snd_atmel_ac97_playback_hw;
17154 + if (chip->cur_rate) {
17155 + runtime->hw.rate_min = chip->cur_rate;
17156 + runtime->hw.rate_max = chip->cur_rate;
17157 + }
17158 + if (chip->cur_format)
17159 + runtime->hw.formats = (1ULL << chip->cur_format);
17160 + mutex_unlock(&opened_mutex);
17161 + chip->playback_substream = substream;
17162 + chip->period = 0;
17163 + return 0;
17164 +}
17165 +
17166 +static int
17167 +snd_atmel_ac97_capture_open(struct snd_pcm_substream *substream)
17168 +{
17169 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
17170 + struct snd_pcm_runtime *runtime = substream->runtime;
17171 +
17172 + mutex_lock(&opened_mutex);
17173 + chip->opened++;
17174 + runtime->hw = snd_atmel_ac97_capture_hw;
17175 + if (chip->cur_rate) {
17176 + runtime->hw.rate_min = chip->cur_rate;
17177 + runtime->hw.rate_max = chip->cur_rate;
17178 + }
17179 + if (chip->cur_format)
17180 + runtime->hw.formats = (1ULL << chip->cur_format);
17181 + mutex_unlock(&opened_mutex);
17182 + chip->capture_substream = substream;
17183 + chip->period = 0;
17184 + return 0;
17185 +}
17186 +
17187 +static int snd_atmel_ac97_playback_close(struct snd_pcm_substream *substream)
17188 +{
17189 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
17190 + mutex_lock(&opened_mutex);
17191 + chip->opened--;
17192 + if (!chip->opened) {
17193 + chip->cur_rate = 0;
17194 + chip->cur_format = 0;
17195 + }
17196 + mutex_unlock(&opened_mutex);
17197 + return 0;
17198 +}
17199 +
17200 +static int snd_atmel_ac97_capture_close(struct snd_pcm_substream *substream)
17201 +{
17202 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
17203 + mutex_lock(&opened_mutex);
17204 + chip->opened--;
17205 + if (!chip->opened) {
17206 + chip->cur_rate = 0;
17207 + chip->cur_format = 0;
17208 + }
17209 + mutex_unlock(&opened_mutex);
17210 + return 0;
17211 +}
17212 +
17213 +static int
17214 +snd_atmel_ac97_playback_hw_params(struct snd_pcm_substream *substream,
17215 + struct snd_pcm_hw_params *hw_params)
17216 +{
17217 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
17218 + int err;
17219 +
17220 + err = snd_pcm_lib_malloc_pages(substream,
17221 + params_buffer_bytes(hw_params));
17222 + if (err < 0)
17223 + return err;
17224 +
17225 + /* Set restrictions to params */
17226 + mutex_lock(&opened_mutex);
17227 + chip->cur_rate = params_rate(hw_params);
17228 + chip->cur_format = params_format(hw_params);
17229 + mutex_unlock(&opened_mutex);
17230 +
17231 + return 0;
17232 +}
17233 +
17234 +static int
17235 +snd_atmel_ac97_capture_hw_params(struct snd_pcm_substream *substream,
17236 + struct snd_pcm_hw_params *hw_params)
17237 +{
17238 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
17239 + int err;
17240 +
17241 + err = snd_pcm_lib_malloc_pages(substream,
17242 + params_buffer_bytes(hw_params));
17243 + if (err < 0)
17244 + return err;
17245 +
17246 + /* Set restrictions to params */
17247 + mutex_lock(&opened_mutex);
17248 + chip->cur_rate = params_rate(hw_params);
17249 + chip->cur_format = params_format(hw_params);
17250 + mutex_unlock(&opened_mutex);
17251 +
17252 + return 0;
17253 +}
17254 +
17255 +static int snd_atmel_ac97_playback_hw_free(struct snd_pcm_substream *substream)
17256 +{
17257 + return snd_pcm_lib_free_pages(substream);
17258 +}
17259 +
17260 +static int snd_atmel_ac97_capture_hw_free(struct snd_pcm_substream *substream)
17261 +{
17262 +
17263 + return snd_pcm_lib_free_pages(substream);
17264 +}
17265 +
17266 +static int snd_atmel_ac97_playback_prepare(struct snd_pcm_substream *substream)
17267 +{
17268 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
17269 + struct platform_device *pdev = chip->pdev;
17270 + struct snd_pcm_runtime *runtime = substream->runtime;
17271 + int block_size = frames_to_bytes(runtime, runtime->period_size);
17272 + unsigned long word = 0;
17273 + unsigned long buffer_size = 0;
17274 +
17275 + dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
17276 + block_size * 2, DMA_TO_DEVICE);
17277 +
17278 + /* Assign slots to channels */
17279 + switch (substream->runtime->channels) {
17280 + case 1:
17281 + word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
17282 + break;
17283 + case 2:
17284 + /* Assign Left and Right slot to Channel A */
17285 + word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
17286 + | AC97C_CH_ASSIGN(PCM_RIGHT, A);
17287 + break;
17288 + default:
17289 + /* TODO: support more than two channels */
17290 + return -EINVAL;
17291 + break;
17292 + }
17293 + ac97c_writel(chip, OCA, word);
17294 +
17295 + /* Configure sample format and size */
17296 + word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
17297 +
17298 + switch (runtime->format) {
17299 + case SNDRV_PCM_FORMAT_S16_LE:
17300 + word |= AC97C_CMR_CEM_LITTLE;
17301 + break;
17302 + case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
17303 + default:
17304 + word &= ~AC97C_CMR_CEM_LITTLE;
17305 + break;
17306 + }
17307 +
17308 + ac97c_writel(chip, CAMR, word);
17309 +
17310 + /* Set variable rate if needed */
17311 + if (runtime->rate != 48000) {
17312 + word = ac97c_readl(chip, MR);
17313 + word |= AC97C_MR_VRA;
17314 + ac97c_writel(chip, MR, word);
17315 + } else {
17316 + /* Clear Variable Rate Bit */
17317 + word = ac97c_readl(chip, MR);
17318 + word &= ~AC97C_MR_VRA;
17319 + ac97c_writel(chip, MR, word);
17320 + }
17321 +
17322 + /* Set rate */
17323 + snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
17324 +
17325 + buffer_size = frames_to_bytes(runtime, runtime->period_size) *
17326 + runtime->periods;
17327 +
17328 + chip->dma.req_tx.buffer_size = buffer_size;
17329 + chip->dma.req_tx.periods = runtime->periods;
17330 +
17331 + BUG_ON(chip->dma.req_tx.buffer_size !=
17332 + (chip->dma.req_tx.periods *
17333 + frames_to_bytes(runtime, runtime->period_size)));
17334 +
17335 + chip->dma.req_tx.buffer_start = runtime->dma_addr;
17336 + chip->dma.req_tx.data_reg = (dma_addr_t)(chip->regs + AC97C_CATHR + 2);
17337 + chip->dma.req_tx.periph_id = chip->dma.tx_periph_id;
17338 + chip->dma.req_tx.direction = DMA_DIR_MEM_TO_PERIPH;
17339 + chip->dma.req_tx.width = DMA_WIDTH_16BIT;
17340 + chip->dma.req_tx.dev_id = chip;
17341 +
17342 + return 0;
17343 +}
17344 +
17345 +static int snd_atmel_ac97_capture_prepare(struct snd_pcm_substream *substream)
17346 +{
17347 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
17348 + struct platform_device *pdev = chip->pdev;
17349 + struct snd_pcm_runtime *runtime = substream->runtime;
17350 + int block_size = frames_to_bytes(runtime, runtime->period_size);
17351 + unsigned long word = 0;
17352 + unsigned long buffer_size = 0;
17353 +
17354 + dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
17355 + block_size * 2, DMA_FROM_DEVICE);
17356 +
17357 + /* Assign slots to channels */
17358 + switch (substream->runtime->channels) {
17359 + case 1:
17360 + word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
17361 + break;
17362 + case 2:
17363 + /* Assign Left and Right slot to Channel A */
17364 + word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
17365 + | AC97C_CH_ASSIGN(PCM_RIGHT, A);
17366 + break;
17367 + default:
17368 + /* TODO: support more than two channels */
17369 + return -EINVAL;
17370 + break;
17371 + }
17372 + ac97c_writel(chip, ICA, word);
17373 +
17374 + /* Configure sample format and size */
17375 + word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
17376 +
17377 + switch (runtime->format) {
17378 + case SNDRV_PCM_FORMAT_S16_LE:
17379 + word |= AC97C_CMR_CEM_LITTLE;
17380 + break;
17381 + case SNDRV_PCM_FORMAT_S16_BE:
17382 + default:
17383 + word &= ~(AC97C_CMR_CEM_LITTLE);
17384 + break;
17385 + }
17386 +
17387 + ac97c_writel(chip, CAMR, word);
17388 +
17389 + /* Set variable rate if needed */
17390 + if (runtime->rate != 48000) {
17391 + word = ac97c_readl(chip, MR);
17392 + word |= AC97C_MR_VRA;
17393 + ac97c_writel(chip, MR, word);
17394 + } else {
17395 + /* Clear Variable Rate Bit */
17396 + word = ac97c_readl(chip, MR);
17397 + word &= ~(AC97C_MR_VRA);
17398 + ac97c_writel(chip, MR, word);
17399 + }
17400 +
17401 + /* Set rate */
17402 + snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
17403 +
17404 + buffer_size = frames_to_bytes(runtime, runtime->period_size) *
17405 + runtime->periods;
17406 +
17407 + chip->dma.req_rx.buffer_size = buffer_size;
17408 + chip->dma.req_rx.periods = runtime->periods;
17409 +
17410 + BUG_ON(chip->dma.req_rx.buffer_size !=
17411 + (chip->dma.req_rx.periods *
17412 + frames_to_bytes(runtime, runtime->period_size)));
17413 +
17414 + chip->dma.req_rx.buffer_start = runtime->dma_addr;
17415 + chip->dma.req_rx.data_reg = (dma_addr_t)(chip->regs + AC97C_CARHR + 2);
17416 + chip->dma.req_rx.periph_id = chip->dma.rx_periph_id;
17417 + chip->dma.req_rx.direction = DMA_DIR_PERIPH_TO_MEM;
17418 + chip->dma.req_rx.width = DMA_WIDTH_16BIT;
17419 + chip->dma.req_rx.dev_id = chip;
17420 +
17421 + return 0;
17422 +}
17423 +
17424 + static int
17425 +snd_atmel_ac97_playback_trigger(struct snd_pcm_substream *substream, int cmd)
17426 +{
17427 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
17428 + unsigned long camr;
17429 + int flags, err = 0;
17430 +
17431 + spin_lock_irqsave(&chip->lock, flags);
17432 + camr = ac97c_readl(chip, CAMR);
17433 +
17434 + switch (cmd) {
17435 + case SNDRV_PCM_TRIGGER_START:
17436 + err = dma_prepare_request_cyclic(chip->dma.req_tx.req.dmac,
17437 + &chip->dma.req_tx);
17438 + dma_start_request(chip->dma.req_tx.req.dmac,
17439 + chip->dma.req_tx.req.channel);
17440 + camr |= AC97C_CMR_CENA;
17441 + break;
17442 + case SNDRV_PCM_TRIGGER_STOP:
17443 + err = dma_stop_request(chip->dma.req_tx.req.dmac,
17444 + chip->dma.req_tx.req.channel);
17445 + if (chip->opened <= 1)
17446 + camr &= ~AC97C_CMR_CENA;
17447 + break;
17448 + default:
17449 + err = -EINVAL;
17450 + break;
17451 + }
17452 +
17453 + ac97c_writel(chip, CAMR, camr);
17454 +
17455 + spin_unlock_irqrestore(&chip->lock, flags);
17456 + return err;
17457 +}
17458 +
17459 + static int
17460 +snd_atmel_ac97_capture_trigger(struct snd_pcm_substream *substream, int cmd)
17461 +{
17462 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
17463 + unsigned long camr;
17464 + int flags, err = 0;
17465 +
17466 + spin_lock_irqsave(&chip->lock, flags);
17467 + camr = ac97c_readl(chip, CAMR);
17468 +
17469 + switch (cmd) {
17470 + case SNDRV_PCM_TRIGGER_START:
17471 + err = dma_prepare_request_cyclic(chip->dma.req_rx.req.dmac,
17472 + &chip->dma.req_rx);
17473 + dma_start_request(chip->dma.req_rx.req.dmac,
17474 + chip->dma.req_rx.req.channel);
17475 + camr |= AC97C_CMR_CENA;
17476 + break;
17477 + case SNDRV_PCM_TRIGGER_STOP:
17478 + err = dma_stop_request(chip->dma.req_rx.req.dmac,
17479 + chip->dma.req_rx.req.channel);
17480 + mutex_lock(&opened_mutex);
17481 + if (chip->opened <= 1)
17482 + camr &= ~AC97C_CMR_CENA;
17483 + mutex_unlock(&opened_mutex);
17484 + break;
17485 + default:
17486 + err = -EINVAL;
17487 + break;
17488 + }
17489 +
17490 + ac97c_writel(chip, CAMR, camr);
17491 +
17492 + spin_unlock_irqrestore(&chip->lock, flags);
17493 + return err;
17494 +}
17495 +
17496 + static snd_pcm_uframes_t
17497 +snd_atmel_ac97_playback_pointer(struct snd_pcm_substream *substream)
17498 +{
17499 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
17500 + struct snd_pcm_runtime *runtime = substream->runtime;
17501 + snd_pcm_uframes_t pos;
17502 + unsigned long bytes;
17503 +
17504 + bytes = (dma_get_current_pos
17505 + (chip->dma.req_tx.req.dmac,
17506 + chip->dma.req_tx.req.channel) - runtime->dma_addr);
17507 + pos = bytes_to_frames(runtime, bytes);
17508 + if (pos >= runtime->buffer_size)
17509 + pos -= runtime->buffer_size;
17510 +
17511 + return pos;
17512 +}
17513 +
17514 + static snd_pcm_uframes_t
17515 +snd_atmel_ac97_capture_pointer(struct snd_pcm_substream *substream)
17516 +{
17517 + struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
17518 + struct snd_pcm_runtime *runtime = substream->runtime;
17519 + snd_pcm_uframes_t pos;
17520 + unsigned long bytes;
17521 +
17522 + bytes = (dma_get_current_pos
17523 + (chip->dma.req_rx.req.dmac,
17524 + chip->dma.req_rx.req.channel)
17525 + - runtime->dma_addr);
17526 + pos = bytes_to_frames(runtime, bytes);
17527 + if (pos >= runtime->buffer_size)
17528 + pos -= runtime->buffer_size;
17529 +
17530 +
17531 + return pos;
17532 +}
17533 +
17534 +static struct snd_pcm_ops atmel_ac97_playback_ops = {
17535 + .open = snd_atmel_ac97_playback_open,
17536 + .close = snd_atmel_ac97_playback_close,
17537 + .ioctl = snd_pcm_lib_ioctl,
17538 + .hw_params = snd_atmel_ac97_playback_hw_params,
17539 + .hw_free = snd_atmel_ac97_playback_hw_free,
17540 + .prepare = snd_atmel_ac97_playback_prepare,
17541 + .trigger = snd_atmel_ac97_playback_trigger,
17542 + .pointer = snd_atmel_ac97_playback_pointer,
17543 +};
17544 +
17545 +static struct snd_pcm_ops atmel_ac97_capture_ops = {
17546 + .open = snd_atmel_ac97_capture_open,
17547 + .close = snd_atmel_ac97_capture_close,
17548 + .ioctl = snd_pcm_lib_ioctl,
17549 + .hw_params = snd_atmel_ac97_capture_hw_params,
17550 + .hw_free = snd_atmel_ac97_capture_hw_free,
17551 + .prepare = snd_atmel_ac97_capture_prepare,
17552 + .trigger = snd_atmel_ac97_capture_trigger,
17553 + .pointer = snd_atmel_ac97_capture_pointer,
17554 +};
17555 +
17556 +static struct ac97_pcm atmel_ac97_pcm_defs[] __devinitdata = {
17557 + /* Playback */
17558 + {
17559 + .exclusive = 1,
17560 + .r = { {
17561 + .slots = ((1 << AC97_SLOT_PCM_LEFT)
17562 + | (1 << AC97_SLOT_PCM_RIGHT)
17563 + | (1 << AC97_SLOT_PCM_CENTER)
17564 + | (1 << AC97_SLOT_PCM_SLEFT)
17565 + | (1 << AC97_SLOT_PCM_SRIGHT)
17566 + | (1 << AC97_SLOT_LFE)),
17567 + } }
17568 + },
17569 + /* PCM in */
17570 + {
17571 + .stream = 1,
17572 + .exclusive = 1,
17573 + .r = { {
17574 + .slots = ((1 << AC97_SLOT_PCM_LEFT)
17575 + | (1 << AC97_SLOT_PCM_RIGHT)),
17576 + } }
17577 + },
17578 + /* Mic in */
17579 + {
17580 + .stream = 1,
17581 + .exclusive = 1,
17582 + .r = { {
17583 + .slots = (1<<AC97_SLOT_MIC),
17584 + } }
17585 + },
17586 +};
17587 +
17588 +static int __devinit snd_atmel_ac97_pcm_new(struct atmel_ac97 *chip)
17589 +{
17590 + struct snd_pcm *pcm;
17591 + int err;
17592 +
17593 + err = snd_ac97_pcm_assign(chip->ac97_bus,
17594 + ARRAY_SIZE(atmel_ac97_pcm_defs),
17595 + atmel_ac97_pcm_defs);
17596 + if (err)
17597 + return err;
17598 +
17599 + err = snd_pcm_new(chip->card, "Atmel-AC97", 0, 1, 1, &pcm);
17600 + if (err)
17601 + return err;
17602 +
17603 + snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
17604 + &atmel_ac97_playback_ops);
17605 +
17606 + snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
17607 + &atmel_ac97_capture_ops);
17608 +
17609 + snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
17610 + &chip->pdev->dev,
17611 + 128 * 1024, 128 * 1024);
17612 +
17613 + pcm->private_data = chip;
17614 + pcm->info_flags = 0;
17615 + strcpy(pcm->name, "Atmel-AC97");
17616 + chip->pcm = pcm;
17617 +
17618 + return 0;
17619 +}
17620 +
17621 +/*
17622 + * Mixer part.
17623 + */
17624 +static int snd_atmel_ac97_mixer_new(struct atmel_ac97 *chip)
17625 +{
17626 + int err;
17627 + struct snd_ac97_template template;
17628 +
17629 + memset(&template, 0, sizeof(template));
17630 + template.private_data = chip;
17631 + err = snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
17632 +
17633 + return err;
17634 +}
17635 +
17636 +static void atmel_ac97_error(struct dma_request *_req)
17637 +{
17638 + struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
17639 + struct atmel_ac97 *chip = req->dev_id;
17640 +
17641 + dev_dbg(&chip->pdev->dev, "DMA Controller error, channel %d\n",
17642 + req->req.channel);
17643 +}
17644 +
17645 +static void atmel_ac97_block_complete(struct dma_request *_req)
17646 +{
17647 + struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
17648 + struct atmel_ac97 *chip = req->dev_id;
17649 + if (req->periph_id == chip->dma.tx_periph_id)
17650 + snd_pcm_period_elapsed(chip->playback_substream);
17651 + else
17652 + snd_pcm_period_elapsed(chip->capture_substream);
17653 +}
17654 +
17655 +/*
17656 + * Codec part.
17657 + */
17658 +static void snd_atmel_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
17659 + unsigned short val)
17660 +{
17661 + struct atmel_ac97 *chip = get_chip(ac97);
17662 + unsigned long word;
17663 + int timeout = 40;
17664 +
17665 + word = (reg & 0x7f) << 16 | val;
17666 +
17667 + do {
17668 + if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
17669 + ac97c_writel(chip, COTHR, word);
17670 + return;
17671 + }
17672 + udelay(1);
17673 + } while (--timeout);
17674 +
17675 + dev_dbg(&chip->pdev->dev, "codec write timeout\n");
17676 +}
17677 +
17678 +static unsigned short snd_atmel_ac97_read(struct snd_ac97 *ac97,
17679 + unsigned short reg)
17680 +{
17681 + struct atmel_ac97 *chip = get_chip(ac97);
17682 + unsigned long word;
17683 + int timeout = 40;
17684 + int write = 10;
17685 +
17686 + word = (0x80 | (reg & 0x7f)) << 16;
17687 +
17688 + if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
17689 + ac97c_readl(chip, CORHR);
17690 +
17691 +retry_write:
17692 + timeout = 40;
17693 +
17694 + do {
17695 + if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
17696 + ac97c_writel(chip, COTHR, word);
17697 + goto read_reg;
17698 + }
17699 + mdelay(10);
17700 + } while (--timeout);
17701 +
17702 + if (!--write)
17703 + goto timed_out;
17704 + goto retry_write;
17705 +
17706 +read_reg:
17707 + do {
17708 + if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
17709 + unsigned short val = ac97c_readl(chip, CORHR);
17710 + return val;
17711 + }
17712 + mdelay(10);
17713 + } while (--timeout);
17714 +
17715 + if (!--write)
17716 + goto timed_out;
17717 + goto retry_write;
17718 +
17719 +timed_out:
17720 + dev_dbg(&chip->pdev->dev, "codec read timeout\n");
17721 + return 0xffff;
17722 +}
17723 +
17724 +static void snd_atmel_ac97_reset(struct atmel_ac97 *chip)
17725 +{
17726 + ac97c_writel(chip, MR, AC97C_MR_WRST);
17727 + mdelay(1);
17728 + ac97c_writel(chip, MR, AC97C_MR_ENA);
17729 +}
17730 +
17731 +static void snd_atmel_ac97_destroy(struct snd_card *card)
17732 +{
17733 + struct atmel_ac97 *chip = get_chip(card);
17734 +
17735 + if (chip->regs)
17736 + iounmap(chip->regs);
17737 +
17738 + if (chip->mck) {
17739 + clk_disable(chip->mck);
17740 + clk_put(chip->mck);
17741 + }
17742 +
17743 + if (chip->dma.req_tx.req.dmac) {
17744 + dma_release_channel(chip->dma.req_tx.req.dmac,
17745 + chip->dma.req_tx.req.channel);
17746 + }
17747 + if (chip->dma.req_rx.req.dmac) {
17748 + dma_release_channel(chip->dma.req_rx.req.dmac,
17749 + chip->dma.req_rx.req.channel);
17750 + }
17751 +}
17752 +
17753 +static int __devinit snd_atmel_ac97_create(struct snd_card *card,
17754 + struct platform_device *pdev)
17755 +{
17756 + static struct snd_ac97_bus_ops ops = {
17757 + .write = snd_atmel_ac97_write,
17758 + .read = snd_atmel_ac97_read,
17759 + };
17760 + struct atmel_ac97 *chip = get_chip(card);
17761 + struct resource *regs;
17762 + struct clk *mck;
17763 + int err;
17764 +
17765 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
17766 + if (!regs)
17767 + return -ENXIO;
17768 +
17769 + mck = clk_get(&pdev->dev, "pclk");
17770 + if (IS_ERR(mck))
17771 + return PTR_ERR(mck);
17772 + clk_enable(mck);
17773 + chip->mck = mck;
17774 +
17775 + card->private_free = snd_atmel_ac97_destroy;
17776 +
17777 + spin_lock_init(&chip->lock);
17778 + chip->card = card;
17779 + chip->pdev = pdev;
17780 +
17781 + chip->regs = ioremap(regs->start, regs->end - regs->start + 1);
17782 + if (!chip->regs)
17783 + return -ENOMEM;
17784 +
17785 + snd_card_set_dev(card, &pdev->dev);
17786 +
17787 + err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
17788 +
17789 + return err;
17790 +}
17791 +
17792 +static int __devinit snd_atmel_ac97_probe(struct platform_device *pdev)
17793 +{
17794 + static int dev;
17795 + struct snd_card *card;
17796 + struct atmel_ac97 *chip;
17797 + int err;
17798 + int ch;
17799 +
17800 + mutex_init(&opened_mutex);
17801 +
17802 + err = -ENOMEM;
17803 + card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
17804 + THIS_MODULE, sizeof(struct atmel_ac97));
17805 + if (!card)
17806 + goto out;
17807 + chip = get_chip(card);
17808 +
17809 + err = snd_atmel_ac97_create(card, pdev);
17810 + if (err)
17811 + goto out_free_card;
17812 +
17813 + snd_atmel_ac97_reset(chip);
17814 +
17815 + err = snd_atmel_ac97_mixer_new(chip);
17816 + if (err)
17817 + goto out_free_card;
17818 +
17819 + err = snd_atmel_ac97_pcm_new(chip);
17820 + if (err)
17821 + goto out_free_card;
17822 +
17823 + /* TODO: Get this information from the platform device */
17824 + chip->dma.req_tx.req.dmac = find_dma_controller(0);
17825 + if (!chip->dma.req_tx.req.dmac) {
17826 + dev_dbg(&chip->pdev->dev, "DMA controller for TX missing\n");
17827 + err = -ENODEV;
17828 + goto out_free_card;
17829 + }
17830 + chip->dma.req_rx.req.dmac = find_dma_controller(0);
17831 + if (!chip->dma.req_rx.req.dmac) {
17832 + dev_dbg(&chip->pdev->dev, "DMA controller for RX missing\n");
17833 + err = -ENODEV;
17834 + goto out_free_card;
17835 + }
17836 +
17837 + chip->dma.rx_periph_id = 3;
17838 + chip->dma.tx_periph_id = 4;
17839 +
17840 + ch = dma_alloc_channel(chip->dma.req_tx.req.dmac);
17841 + if (ch < 0) {
17842 + dev_dbg(&chip->pdev->dev,
17843 + "could not allocate TX DMA channel\n");
17844 + err = ch;
17845 + goto out_free_card;
17846 + }
17847 + chip->dma.req_tx.req.channel = ch;
17848 + chip->dma.req_tx.width = DMA_WIDTH_16BIT;
17849 + chip->dma.req_tx.req.block_complete = atmel_ac97_block_complete;
17850 + chip->dma.req_tx.req.error = atmel_ac97_error;
17851 +
17852 + ch = dma_alloc_channel(chip->dma.req_rx.req.dmac);
17853 + if (ch < 0) {
17854 + dev_dbg(&chip->pdev->dev,
17855 + "could not allocate RX DMA channel\n");
17856 + err = ch;
17857 + goto out_free_card;
17858 + }
17859 + chip->dma.req_rx.req.channel = ch;
17860 + chip->dma.req_rx.width = DMA_WIDTH_16BIT;
17861 + chip->dma.req_rx.req.block_complete = atmel_ac97_block_complete;
17862 + chip->dma.req_rx.req.error = atmel_ac97_error;
17863 +
17864 + strcpy(card->driver, "atmel_ac97c");
17865 + strcpy(card->shortname, "atmel_ac97c");
17866 + sprintf(card->longname, "Atmel AVR32 AC97 controller");
17867 +
17868 + err = snd_card_register(card);
17869 + if (err)
17870 + goto out_free_card;
17871 +
17872 + platform_set_drvdata(pdev, card);
17873 + dev++;
17874 +
17875 + dev_info(&pdev->dev, "Atmel AVR32 AC97 controller at 0x%p\n",
17876 + chip->regs);
17877 +
17878 + return 0;
17879 +
17880 +out_free_card:
17881 + snd_card_free(card);
17882 +out:
17883 + return err;
17884 +}
17885 +
17886 +#ifdef CONFIG_PM
17887 + static int
17888 +snd_atmel_ac97_suspend(struct platform_device *pdev, pm_message_t msg)
17889 +{
17890 + struct snd_card *card = platform_get_drvdata(pdev);
17891 + struct atmel_ac97 *chip = card->private_data;
17892 +
17893 + clk_disable(chip->mck);
17894 +
17895 + return 0;
17896 +}
17897 +
17898 +static int snd_atmel_ac97_resume(struct platform_device *pdev)
17899 +{
17900 + struct snd_card *card = dev_get_drvdata(pdev);
17901 + struct atmel_ac97 *chip = card->private_data;
17902 +
17903 + clk_enable(chip->mck);
17904 +
17905 + return 0;
17906 +}
17907 +#else
17908 +#define snd_atmel_ac97_suspend NULL
17909 +#define snd_atmel_ac97_resume NULL
17910 +#endif
17911 +
17912 +static int __devexit snd_atmel_ac97_remove(struct platform_device *pdev)
17913 +{
17914 + struct snd_card *card = platform_get_drvdata(pdev);
17915 +
17916 + snd_card_free(card);
17917 + platform_set_drvdata(pdev, NULL);
17918 + return 0;
17919 +}
17920 +
17921 +static struct platform_driver atmel_ac97_driver = {
17922 + .remove = __devexit_p(snd_atmel_ac97_remove),
17923 + .driver = {
17924 + .name = "atmel_ac97c",
17925 + },
17926 + .suspend = snd_atmel_ac97_suspend,
17927 + .resume = snd_atmel_ac97_resume,
17928 +};
17929 +
17930 +static int __init atmel_ac97_init(void)
17931 +{
17932 + return platform_driver_probe(&atmel_ac97_driver,
17933 + snd_atmel_ac97_probe);
17934 +}
17935 +module_init(atmel_ac97_init);
17936 +
17937 +static void __exit atmel_ac97_exit(void)
17938 +{
17939 + platform_driver_unregister(&atmel_ac97_driver);
17940 +}
17941 +module_exit(atmel_ac97_exit);
17942 +
17943 +MODULE_LICENSE("GPL");
17944 +MODULE_DESCRIPTION("Driver for Atmel AC97 Controller");
17945 +MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
17946 diff --git a/sound/avr32/ac97c.h b/sound/avr32/ac97c.h
17947 new file mode 100644
17948 index 0000000..96246e7
17949 --- /dev/null
17950 +++ b/sound/avr32/ac97c.h
17951 @@ -0,0 +1,71 @@
17952 +/*
17953 + * Register definitions for the Atmel AC97 Controller.
17954 + *
17955 + * Copyright (C) 2005-2006 Atmel Corporation
17956 + *
17957 + * This program is free software; you can redistribute it and/or modify
17958 + * it under the terms of the GNU General Public License version 2 as
17959 + * published by the Free Software Foundation.
17960 + */
17961 +#ifndef __SOUND_AVR32_AC97C_H
17962 +#define __SOUND_AVR32_AC97C_H
17963 +
17964 +#define AC97C_MR 0x08
17965 +#define AC97C_ICA 0x10
17966 +#define AC97C_OCA 0x14
17967 +#define AC97C_CARHR 0x20
17968 +#define AC97C_CATHR 0x24
17969 +#define AC97C_CASR 0x28
17970 +#define AC97C_CAMR 0x2c
17971 +#define AC97C_CBRHR 0x30
17972 +#define AC97C_CBTHR 0x34
17973 +#define AC97C_CBSR 0x38
17974 +#define AC97C_CBMR 0x3c
17975 +#define AC97C_CORHR 0x40
17976 +#define AC97C_COTHR 0x44
17977 +#define AC97C_COSR 0x48
17978 +#define AC97C_COMR 0x4c
17979 +#define AC97C_SR 0x50
17980 +#define AC97C_IER 0x54
17981 +#define AC97C_IDR 0x58
17982 +#define AC97C_IMR 0x5c
17983 +#define AC97C_VERSION 0xfc
17984 +
17985 +#define AC97C_CATPR PDC_TPR
17986 +#define AC97C_CATCR PDC_TCR
17987 +#define AC97C_CATNPR PDC_TNPR
17988 +#define AC97C_CATNCR PDC_TNCR
17989 +#define AC97C_CARPR PDC_RPR
17990 +#define AC97C_CARCR PDC_RCR
17991 +#define AC97C_CARNPR PDC_RNPR
17992 +#define AC97C_CARNCR PDC_RNCR
17993 +#define AC97C_PTCR PDC_PTCR
17994 +
17995 +#define AC97C_MR_ENA (1 << 0)
17996 +#define AC97C_MR_WRST (1 << 1)
17997 +#define AC97C_MR_VRA (1 << 2)
17998 +
17999 +#define AC97C_CSR_TXRDY (1 << 0)
18000 +#define AC97C_CSR_UNRUN (1 << 2)
18001 +#define AC97C_CSR_RXRDY (1 << 4)
18002 +#define AC97C_CSR_ENDTX (1 << 10)
18003 +#define AC97C_CSR_ENDRX (1 << 14)
18004 +
18005 +#define AC97C_CMR_SIZE_20 (0 << 16)
18006 +#define AC97C_CMR_SIZE_18 (1 << 16)
18007 +#define AC97C_CMR_SIZE_16 (2 << 16)
18008 +#define AC97C_CMR_SIZE_10 (3 << 16)
18009 +#define AC97C_CMR_CEM_LITTLE (1 << 18)
18010 +#define AC97C_CMR_CEM_BIG (0 << 18)
18011 +#define AC97C_CMR_CENA (1 << 21)
18012 +#define AC97C_CMR_PDCEN (1 << 22)
18013 +
18014 +#define AC97C_SR_CAEVT (1 << 3)
18015 +
18016 +#define AC97C_CH_ASSIGN(slot, channel) \
18017 + (AC97C_CHANNEL_##channel << (3 * (AC97_SLOT_##slot - 3)))
18018 +#define AC97C_CHANNEL_NONE 0x0
18019 +#define AC97C_CHANNEL_A 0x1
18020 +#define AC97C_CHANNEL_B 0x2
18021 +
18022 +#endif /* __SOUND_AVR32_AC97C_H */
18023 diff --git a/sound/oss/Kconfig b/sound/oss/Kconfig
18024 index 857008b..db69a17 100644
18025 --- a/sound/oss/Kconfig
18026 +++ b/sound/oss/Kconfig
18027 @@ -654,3 +654,7 @@ config SOUND_SH_DAC_AUDIO_CHANNEL
18028 int "DAC channel"
18029 default "1"
18030 depends on SOUND_SH_DAC_AUDIO
18031 +
18032 +config SOUND_AT32_ABDAC
18033 + tristate "Atmel AT32 Audio Bitstream DAC (ABDAC) support"
18034 + depends on SOUND_PRIME && AVR32
18035 diff --git a/sound/oss/Makefile b/sound/oss/Makefile
18036 index f883c4b..a41853b 100644
18037 --- a/sound/oss/Makefile
18038 +++ b/sound/oss/Makefile
18039 @@ -10,6 +10,7 @@ obj-$(CONFIG_SOUND_CS4232) += cs4232.o ad1848.o
18040
18041 # Please leave it as is, cause the link order is significant !
18042
18043 +obj-$(CONFIG_SOUND_AT32_ABDAC) += at32_abdac.o
18044 obj-$(CONFIG_SOUND_SH_DAC_AUDIO) += sh_dac_audio.o
18045 obj-$(CONFIG_SOUND_HAL2) += hal2.o
18046 obj-$(CONFIG_SOUND_AEDSP16) += aedsp16.o
18047 diff --git a/sound/oss/at32_abdac.c b/sound/oss/at32_abdac.c
18048 new file mode 100644
18049 index 0000000..cb997d7
18050 --- /dev/null
18051 +++ b/sound/oss/at32_abdac.c
18052 @@ -0,0 +1,722 @@
18053 +/*
18054 + * OSS Sound Driver for the Atmel AT32 on-chip DAC.
18055 + *
18056 + * Copyright (C) 2006 Atmel Corporation
18057 + *
18058 + * This program is free software; you can redistribute it and/or modify
18059 + * it under the terms of the GNU General Public License version 2 as
18060 + * published by the Free Software Foundation.
18061 + */
18062 +#include <linux/clk.h>
18063 +#include <linux/dma-mapping.h>
18064 +#include <linux/fs.h>
18065 +#include <linux/init.h>
18066 +#include <linux/interrupt.h>
18067 +#include <linux/kernel.h>
18068 +#include <linux/module.h>
18069 +#include <linux/platform_device.h>
18070 +#include <linux/sound.h>
18071 +#include <linux/soundcard.h>
18072 +
18073 +#include <asm/byteorder.h>
18074 +#include <asm/dma-controller.h>
18075 +#include <asm/io.h>
18076 +#include <asm/uaccess.h>
18077 +
18078 +/* We want to use the "bizarre" swap-bytes-in-each-halfword macro */
18079 +#include <linux/byteorder/swabb.h>
18080 +
18081 +#include "at32_abdac.h"
18082 +
18083 +#define DMA_BUFFER_SIZE 32768
18084 +#define DMA_PERIOD_SHIFT 10
18085 +#define DMA_PERIOD_SIZE (1 << DMA_PERIOD_SHIFT)
18086 +#define DMA_WRITE_THRESHOLD DMA_PERIOD_SIZE
18087 +
18088 +struct sound_settings {
18089 + unsigned int format;
18090 + unsigned int channels;
18091 + unsigned int sample_rate;
18092 + /* log2(bytes per sample) */
18093 + unsigned int input_order;
18094 +};
18095 +
18096 +struct at32_dac {
18097 + spinlock_t lock;
18098 + void __iomem *regs;
18099 +
18100 + /* head and tail refer to number of words */
18101 + struct {
18102 + u32 *buf;
18103 + int head;
18104 + int tail;
18105 + } dma;
18106 +
18107 + struct semaphore sem;
18108 + wait_queue_head_t write_wait;
18109 +
18110 + /*
18111 + * Read at most ucount bytes from ubuf, translate to 2-channel
18112 + * signed 16-bit big endian format and write to the DMA buffer
18113 + * as long as there is room left. Return the number of bytes
18114 + * successfully copied from ubuf, or -EFAULT if the first
18115 + * sample from ubuf couldn't be read. This function is not
18116 + * called unless there is room for at least one sample (4
18117 + * bytes) in the DMA buffer.
18118 + */
18119 + ssize_t (*trans)(struct at32_dac *dac, const char __user *ubuf,
18120 + size_t ucount);
18121 +
18122 + struct sound_settings dsp_settings;
18123 + struct dma_request_cyclic req;
18124 +
18125 + struct clk *mck;
18126 + struct clk *sample_clk;
18127 + struct platform_device *pdev;
18128 + int busy;
18129 + int playing;
18130 + int dev_dsp;
18131 +};
18132 +static struct at32_dac *the_dac;
18133 +
18134 +static inline unsigned int abdac_get_head(struct at32_dac *dac)
18135 +{
18136 + return dac->dma.head & ((DMA_BUFFER_SIZE / 4) - 1);
18137 +}
18138 +
18139 +static inline unsigned int abdac_get_tail(struct at32_dac *dac)
18140 +{
18141 + return dac->dma.tail & ((DMA_BUFFER_SIZE / 4) - 1);
18142 +}
18143 +
18144 +static inline unsigned int abdac_dma_space(struct at32_dac *dac)
18145 +{
18146 + unsigned int space;
18147 +
18148 + space = ((dac->dma.tail - dac->dma.head - 1)
18149 + & ((DMA_BUFFER_SIZE / 4) - 1));
18150 + return space;
18151 +}
18152 +
18153 +static void abdac_update_dma_tail(struct at32_dac *dac)
18154 +{
18155 + dma_addr_t dma_addr;
18156 + unsigned int new_tail;
18157 +
18158 + if (dac->playing) {
18159 + dma_addr = dma_get_current_pos(dac->req.req.dmac,
18160 + dac->req.req.channel);
18161 + new_tail = (dma_addr - dac->req.buffer_start) / 4;
18162 + if (new_tail >= dac->dma.head
18163 + && (dac->dma.tail < dac->dma.head
18164 + || dac->dma.tail > new_tail))
18165 + dev_notice(&dac->pdev->dev, "DMA underrun detected!\n");
18166 + dac->dma.tail = new_tail;
18167 + dev_dbg(&dac->pdev->dev, "update tail: 0x%x - 0x%x = %u\n",
18168 + dma_addr, dac->req.buffer_start, dac->dma.tail);
18169 + }
18170 +}
18171 +
18172 +static int abdac_start(struct at32_dac *dac)
18173 +{
18174 + int ret;
18175 +
18176 + if (dac->playing)
18177 + return 0;
18178 +
18179 + memset(dac->dma.buf, 0, DMA_BUFFER_SIZE);
18180 +
18181 + clk_enable(dac->sample_clk);
18182 +
18183 + ret = dma_prepare_request_cyclic(dac->req.req.dmac, &dac->req);
18184 + if (ret)
18185 + goto out_stop_clock;
18186 +
18187 + dev_dbg(&dac->pdev->dev, "starting DMA...\n");
18188 + ret = dma_start_request(dac->req.req.dmac, dac->req.req.channel);
18189 + if (ret)
18190 + goto out_stop_request;
18191 +
18192 + dac_writel(dac, CTRL, DAC_BIT(EN));
18193 + dac->playing = 1;
18194 +
18195 + return 0;
18196 +
18197 +out_stop_request:
18198 + dma_stop_request(dac->req.req.dmac,
18199 + dac->req.req.channel);
18200 +out_stop_clock:
18201 + clk_disable(dac->sample_clk);
18202 + return ret;
18203 +}
18204 +
18205 +static int abdac_stop(struct at32_dac *dac)
18206 +{
18207 + if (dac->playing) {
18208 + dma_stop_request(dac->req.req.dmac, dac->req.req.channel);
18209 + dac_writel(dac, DATA, 0);
18210 + dac_writel(dac, CTRL, 0);
18211 + dac->playing = 0;
18212 + clk_disable(dac->sample_clk);
18213 + }
18214 +
18215 + return 0;
18216 +}
18217 +
18218 +static int abdac_dma_prepare(struct at32_dac *dac)
18219 +{
18220 + dac->dma.buf = dma_alloc_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
18221 + &dac->req.buffer_start, GFP_KERNEL);
18222 + if (!dac->dma.buf)
18223 + return -ENOMEM;
18224 +
18225 + dac->dma.head = dac->dma.tail = 0;
18226 + dac->req.periods = DMA_BUFFER_SIZE / DMA_PERIOD_SIZE;
18227 + dac->req.buffer_size = DMA_BUFFER_SIZE;
18228 +
18229 + return 0;
18230 +}
18231 +
18232 +static void abdac_dma_cleanup(struct at32_dac *dac)
18233 +{
18234 + if (dac->dma.buf)
18235 + dma_free_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
18236 + dac->dma.buf, dac->req.buffer_start);
18237 + dac->dma.buf = NULL;
18238 +}
18239 +
18240 +static void abdac_dma_block_complete(struct dma_request *req)
18241 +{
18242 + struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
18243 + struct at32_dac *dac = container_of(creq, struct at32_dac, req);
18244 +
18245 + wake_up(&dac->write_wait);
18246 +}
18247 +
18248 +static void abdac_dma_error(struct dma_request *req)
18249 +{
18250 + struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
18251 + struct at32_dac *dac = container_of(creq, struct at32_dac, req);
18252 +
18253 + dev_err(&dac->pdev->dev, "DMA error\n");
18254 +}
18255 +
18256 +static irqreturn_t abdac_interrupt(int irq, void *dev_id)
18257 +{
18258 + struct at32_dac *dac = dev_id;
18259 + u32 status;
18260 +
18261 + status = dac_readl(dac, INT_STATUS);
18262 + if (status & DAC_BIT(UNDERRUN)) {
18263 + dev_err(&dac->pdev->dev, "Underrun detected!\n");
18264 + dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN));
18265 + } else {
18266 + dev_err(&dac->pdev->dev, "Spurious interrupt (status=0x%x)\n",
18267 + status);
18268 + dac_writel(dac, INT_CLR, status);
18269 + }
18270 +
18271 + return IRQ_HANDLED;
18272 +}
18273 +
18274 +static ssize_t trans_s16be(struct at32_dac *dac, const char __user *ubuf,
18275 + size_t ucount)
18276 +{
18277 + ssize_t ret;
18278 +
18279 + if (dac->dsp_settings.channels == 2) {
18280 + const u32 __user *up = (const u32 __user *)ubuf;
18281 + u32 sample;
18282 +
18283 + for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
18284 + if (!abdac_dma_space(dac))
18285 + break;
18286 +
18287 + if (unlikely(__get_user(sample, up++))) {
18288 + if (ret == 0)
18289 + ret = -EFAULT;
18290 + break;
18291 + }
18292 + dac->dma.buf[abdac_get_head(dac)] = sample;
18293 + dac->dma.head++;
18294 + }
18295 + } else {
18296 + const u16 __user *up = (const u16 __user *)ubuf;
18297 + u16 sample;
18298 +
18299 + for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
18300 + if (!abdac_dma_space(dac))
18301 + break;
18302 +
18303 + if (unlikely(__get_user(sample, up++))) {
18304 + if (ret == 0)
18305 + ret = -EFAULT;
18306 + break;
18307 + }
18308 + dac->dma.buf[abdac_get_head(dac)]
18309 + = (sample << 16) | sample;
18310 + dac->dma.head++;
18311 + }
18312 + }
18313 +
18314 + return ret;
18315 +}
18316 +
18317 +static ssize_t trans_s16le(struct at32_dac *dac, const char __user *ubuf,
18318 + size_t ucount)
18319 +{
18320 + ssize_t ret;
18321 +
18322 + if (dac->dsp_settings.channels == 2) {
18323 + const u32 __user *up = (const u32 __user *)ubuf;
18324 + u32 sample;
18325 +
18326 + for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
18327 + if (!abdac_dma_space(dac))
18328 + break;
18329 +
18330 + if (unlikely(__get_user(sample, up++))) {
18331 + if (ret == 0)
18332 + ret = -EFAULT;
18333 + break;
18334 + }
18335 + /* Swap bytes in each halfword */
18336 + dac->dma.buf[abdac_get_head(dac)] = swahb32(sample);
18337 + dac->dma.head++;
18338 + }
18339 + } else {
18340 + const u16 __user *up = (const u16 __user *)ubuf;
18341 + u16 sample;
18342 +
18343 + for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
18344 + if (!abdac_dma_space(dac))
18345 + break;
18346 +
18347 + if (unlikely(__get_user(sample, up++))) {
18348 + if (ret == 0)
18349 + ret = -EFAULT;
18350 + break;
18351 + }
18352 + sample = swab16(sample);
18353 + dac->dma.buf[abdac_get_head(dac)]
18354 + = (sample << 16) | sample;
18355 + dac->dma.head++;
18356 + }
18357 + }
18358 +
18359 + return ret;
18360 +}
18361 +
18362 +static ssize_t abdac_dma_translate_from_user(struct at32_dac *dac,
18363 + const char __user *buffer,
18364 + size_t count)
18365 +{
18366 + /* At least one buffer must be available at this point */
18367 + dev_dbg(&dac->pdev->dev, "copying %zu bytes from user...\n", count);
18368 +
18369 + return dac->trans(dac, buffer, count);
18370 +}
18371 +
18372 +static int abdac_set_format(struct at32_dac *dac, int format)
18373 +{
18374 + unsigned int order;
18375 +
18376 + switch (format) {
18377 + case AFMT_S16_BE:
18378 + order = 1;
18379 + dac->trans = trans_s16be;
18380 + break;
18381 + case AFMT_S16_LE:
18382 + order = 1;
18383 + dac->trans = trans_s16le;
18384 + break;
18385 + default:
18386 + dev_dbg(&dac->pdev->dev, "unsupported format: %d\n", format);
18387 + return -EINVAL;
18388 + }
18389 +
18390 + if (dac->dsp_settings.channels == 2)
18391 + order++;
18392 +
18393 + dac->dsp_settings.input_order = order;
18394 + dac->dsp_settings.format = format;
18395 + return 0;
18396 +}
18397 +
18398 +static int abdac_set_sample_rate(struct at32_dac *dac, unsigned long rate)
18399 +{
18400 + unsigned long new_rate;
18401 + int ret;
18402 +
18403 + ret = clk_set_rate(dac->sample_clk, 256 * rate);
18404 + if (ret < 0)
18405 + return ret;
18406 +
18407 + /* TODO: mplayer seems to have a problem with this */
18408 +#if 0
18409 + new_rate = clk_get_rate(dac->sample_clk);
18410 + dac->dsp_settings.sample_rate = new_rate / 256;
18411 +#else
18412 + dac->dsp_settings.sample_rate = rate;
18413 +#endif
18414 +
18415 + return 0;
18416 +}
18417 +
18418 +static ssize_t abdac_dsp_write(struct file *file,
18419 + const char __user *buffer,
18420 + size_t count, loff_t *ppos)
18421 +{
18422 + struct at32_dac *dac = file->private_data;
18423 + DECLARE_WAITQUEUE(wait, current);
18424 + unsigned int avail;
18425 + ssize_t copied;
18426 + ssize_t ret;
18427 +
18428 + /* Avoid address space checking in the translation functions */
18429 + if (!access_ok(buffer, count, VERIFY_READ))
18430 + return -EFAULT;
18431 +
18432 + down(&dac->sem);
18433 +
18434 + if (!dac->dma.buf) {
18435 + ret = abdac_dma_prepare(dac);
18436 + if (ret)
18437 + goto out;
18438 + }
18439 +
18440 + add_wait_queue(&dac->write_wait, &wait);
18441 + ret = 0;
18442 + while (count > 0) {
18443 + do {
18444 + abdac_update_dma_tail(dac);
18445 + avail = abdac_dma_space(dac);
18446 + set_current_state(TASK_INTERRUPTIBLE);
18447 + if (avail >= DMA_WRITE_THRESHOLD)
18448 + break;
18449 +
18450 + if (file->f_flags & O_NONBLOCK) {
18451 + if (!ret)
18452 + ret = -EAGAIN;
18453 + goto out;
18454 + }
18455 +
18456 + pr_debug("Going to wait (avail = %u, count = %zu)\n",
18457 + avail, count);
18458 +
18459 + up(&dac->sem);
18460 + schedule();
18461 + if (signal_pending(current)) {
18462 + if (!ret)
18463 + ret = -ERESTARTSYS;
18464 + goto out_nosem;
18465 + }
18466 + down(&dac->sem);
18467 + } while (1);
18468 +
18469 + copied = abdac_dma_translate_from_user(dac, buffer, count);
18470 + if (copied < 0) {
18471 + if (!ret)
18472 + ret = -EFAULT;
18473 + goto out;
18474 + }
18475 +
18476 + abdac_start(dac);
18477 +
18478 + count -= copied;
18479 + ret += copied;
18480 + }
18481 +
18482 +out:
18483 + up(&dac->sem);
18484 +out_nosem:
18485 + remove_wait_queue(&dac->write_wait, &wait);
18486 + set_current_state(TASK_RUNNING);
18487 + return ret;
18488 +}
18489 +
18490 +static int abdac_dsp_ioctl(struct inode *inode, struct file *file,
18491 + unsigned int cmd, unsigned long arg)
18492 +{
18493 + struct at32_dac *dac = file->private_data;
18494 + int __user *up = (int __user *)arg;
18495 + struct audio_buf_info abinfo;
18496 + int val, ret;
18497 +
18498 + switch (cmd) {
18499 + case OSS_GETVERSION:
18500 + return put_user(SOUND_VERSION, up);
18501 +
18502 + case SNDCTL_DSP_SPEED:
18503 + if (get_user(val, up))
18504 + return -EFAULT;
18505 + if (val >= 0) {
18506 + abdac_stop(dac);
18507 + ret = abdac_set_sample_rate(dac, val);
18508 + if (ret)
18509 + return ret;
18510 + }
18511 + return put_user(dac->dsp_settings.sample_rate, up);
18512 +
18513 + case SNDCTL_DSP_STEREO:
18514 + if (get_user(val, up))
18515 + return -EFAULT;
18516 + abdac_stop(dac);
18517 + if (val && dac->dsp_settings.channels == 1)
18518 + dac->dsp_settings.input_order++;
18519 + else if (!val && dac->dsp_settings.channels != 1)
18520 + dac->dsp_settings.input_order--;
18521 + dac->dsp_settings.channels = val ? 2 : 1;
18522 + return 0;
18523 +
18524 + case SNDCTL_DSP_CHANNELS:
18525 + if (get_user(val, up))
18526 + return -EFAULT;
18527 +
18528 + if (val) {
18529 + if (val < 0 || val > 2)
18530 + return -EINVAL;
18531 +
18532 + abdac_stop(dac);
18533 + dac->dsp_settings.input_order
18534 + += val - dac->dsp_settings.channels;
18535 + dac->dsp_settings.channels = val;
18536 + }
18537 + return put_user(val, (int *)arg);
18538 +
18539 + case SNDCTL_DSP_GETFMTS:
18540 + return put_user(AFMT_S16_BE | AFMT_S16_BE, up);
18541 +
18542 + case SNDCTL_DSP_SETFMT:
18543 + if (get_user(val, up))
18544 + return -EFAULT;
18545 +
18546 + if (val == AFMT_QUERY) {
18547 + val = dac->dsp_settings.format;
18548 + } else {
18549 + ret = abdac_set_format(dac, val);
18550 + if (ret)
18551 + return ret;
18552 + }
18553 + return put_user(val, up);
18554 +
18555 + case SNDCTL_DSP_GETOSPACE:
18556 + abdac_update_dma_tail(dac);
18557 + abinfo.fragsize = ((1 << dac->dsp_settings.input_order)
18558 + * (DMA_PERIOD_SIZE / 4));
18559 + abinfo.bytes = (abdac_dma_space(dac)
18560 + << dac->dsp_settings.input_order);
18561 + abinfo.fragstotal = ((DMA_BUFFER_SIZE * 4)
18562 + >> (DMA_PERIOD_SHIFT
18563 + + dac->dsp_settings.input_order));
18564 + abinfo.fragments = ((abinfo.bytes
18565 + >> dac->dsp_settings.input_order)
18566 + / (DMA_PERIOD_SIZE / 4));
18567 + pr_debug("fragments=%d fragstotal=%d fragsize=%d bytes=%d\n",
18568 + abinfo.fragments, abinfo.fragstotal, abinfo.fragsize,
18569 + abinfo.bytes);
18570 + return copy_to_user(up, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
18571 +
18572 + default:
18573 + dev_dbg(&dac->pdev->dev, "Unimplemented ioctl cmd: 0x%x\n", cmd);
18574 + return -EINVAL;
18575 + }
18576 +}
18577 +
18578 +static int abdac_dsp_open(struct inode *inode, struct file *file)
18579 +{
18580 + struct at32_dac *dac = the_dac;
18581 + int ret;
18582 +
18583 + if (file->f_mode & FMODE_READ)
18584 + return -ENXIO;
18585 +
18586 + down(&dac->sem);
18587 + ret = -EBUSY;
18588 + if (dac->busy)
18589 + goto out;
18590 +
18591 + dac->dma.head = dac->dma.tail = 0;
18592 +
18593 + /* FIXME: What are the correct defaults? */
18594 + dac->dsp_settings.channels = 2;
18595 + abdac_set_format(dac, AFMT_S16_BE);
18596 + ret = abdac_set_sample_rate(dac, 8000);
18597 + if (ret)
18598 + goto out;
18599 +
18600 + file->private_data = dac;
18601 + dac->busy = 1;
18602 +
18603 + ret = 0;
18604 +
18605 +out:
18606 + up(&dac->sem);
18607 + return ret;
18608 +}
18609 +
18610 +static int abdac_dsp_release(struct inode *inode, struct file *file)
18611 +{
18612 + struct at32_dac *dac = file->private_data;
18613 +
18614 + down(&dac->sem);
18615 +
18616 + abdac_stop(dac);
18617 + abdac_dma_cleanup(dac);
18618 + dac->busy = 0;
18619 +
18620 + up(&dac->sem);
18621 +
18622 + return 0;
18623 +}
18624 +
18625 +static struct file_operations abdac_dsp_fops = {
18626 + .owner = THIS_MODULE,
18627 + .llseek = no_llseek,
18628 + .write = abdac_dsp_write,
18629 + .ioctl = abdac_dsp_ioctl,
18630 + .open = abdac_dsp_open,
18631 + .release = abdac_dsp_release,
18632 +};
18633 +
18634 +static int __init abdac_probe(struct platform_device *pdev)
18635 +{
18636 + struct at32_dac *dac;
18637 + struct resource *regs;
18638 + struct clk *mck;
18639 + struct clk *sample_clk;
18640 + int irq;
18641 + int ret;
18642 +
18643 + if (the_dac)
18644 + return -EBUSY;
18645 +
18646 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
18647 + if (!regs)
18648 + return -ENXIO;
18649 + irq = platform_get_irq(pdev, 0);
18650 + if (irq < 0)
18651 + return irq;
18652 +
18653 + mck = clk_get(&pdev->dev, "pclk");
18654 + if (IS_ERR(mck))
18655 + return PTR_ERR(mck);
18656 + sample_clk = clk_get(&pdev->dev, "sample_clk");
18657 + if (IS_ERR(sample_clk)) {
18658 + ret = PTR_ERR(sample_clk);
18659 + goto out_put_mck;
18660 + }
18661 + clk_enable(mck);
18662 +
18663 + ret = -ENOMEM;
18664 + dac = kzalloc(sizeof(struct at32_dac), GFP_KERNEL);
18665 + if (!dac)
18666 + goto out_disable_clk;
18667 +
18668 + spin_lock_init(&dac->lock);
18669 + init_MUTEX(&dac->sem);
18670 + init_waitqueue_head(&dac->write_wait);
18671 + dac->pdev = pdev;
18672 + dac->mck = mck;
18673 + dac->sample_clk = sample_clk;
18674 +
18675 + dac->regs = ioremap(regs->start, regs->end - regs->start + 1);
18676 + if (!dac->regs)
18677 + goto out_free_dac;
18678 +
18679 + ret = request_irq(irq, abdac_interrupt, 0, "dac", dac);
18680 + if (ret)
18681 + goto out_unmap_regs;
18682 +
18683 + /* FIXME */
18684 + dac->req.req.dmac = find_dma_controller(0);
18685 + if (!dac->req.req.dmac)
18686 + goto out_free_irq;
18687 +
18688 + ret = dma_alloc_channel(dac->req.req.dmac);
18689 + if (ret < 0)
18690 + goto out_free_irq;
18691 +
18692 + dac->req.req.channel = ret;
18693 + dac->req.req.block_complete = abdac_dma_block_complete;
18694 + dac->req.req.error = abdac_dma_error;
18695 + dac->req.data_reg = regs->start + DAC_DATA;
18696 + dac->req.periph_id = 2; /* FIXME */
18697 + dac->req.direction = DMA_DIR_MEM_TO_PERIPH;
18698 + dac->req.width = DMA_WIDTH_32BIT;
18699 +
18700 + /* Make sure the DAC is silent and disabled */
18701 + dac_writel(dac, DATA, 0);
18702 + dac_writel(dac, CTRL, 0);
18703 +
18704 + ret = register_sound_dsp(&abdac_dsp_fops, -1);
18705 + if (ret < 0)
18706 + goto out_free_dma;
18707 + dac->dev_dsp = ret;
18708 +
18709 + /* TODO: Register mixer */
18710 +
18711 + the_dac = dac;
18712 + platform_set_drvdata(pdev, dac);
18713 +
18714 + return 0;
18715 +
18716 +out_free_dma:
18717 + dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
18718 +out_free_irq:
18719 + free_irq(irq, dac);
18720 +out_unmap_regs:
18721 + iounmap(dac->regs);
18722 +out_free_dac:
18723 + kfree(dac);
18724 +out_disable_clk:
18725 + clk_disable(mck);
18726 + clk_put(sample_clk);
18727 +out_put_mck:
18728 + clk_put(mck);
18729 + return ret;
18730 +}
18731 +
18732 +static int __exit abdac_remove(struct platform_device *pdev)
18733 +{
18734 + struct at32_dac *dac;
18735 +
18736 + dac = platform_get_drvdata(pdev);
18737 + if (dac) {
18738 + unregister_sound_dsp(dac->dev_dsp);
18739 + dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
18740 + free_irq(platform_get_irq(pdev, 0), dac);
18741 + iounmap(dac->regs);
18742 + clk_disable(dac->mck);
18743 + clk_put(dac->sample_clk);
18744 + clk_put(dac->mck);
18745 + kfree(dac);
18746 + platform_set_drvdata(pdev, NULL);
18747 + the_dac = NULL;
18748 + }
18749 +
18750 + return 0;
18751 +}
18752 +
18753 +static struct platform_driver abdac_driver = {
18754 + .remove = __exit_p(abdac_remove),
18755 + .driver = {
18756 + .name = "abdac",
18757 + },
18758 +};
18759 +
18760 +static int __init abdac_init(void)
18761 +{
18762 + return platform_driver_probe(&abdac_driver, abdac_probe);
18763 +}
18764 +module_init(abdac_init);
18765 +
18766 +static void __exit abdac_exit(void)
18767 +{
18768 + platform_driver_unregister(&abdac_driver);
18769 +}
18770 +module_exit(abdac_exit);
18771 +
18772 +MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
18773 +MODULE_DESCRIPTION("Sound Driver for the Atmel AT32 ABDAC");
18774 +MODULE_LICENSE("GPL");
18775 diff --git a/sound/oss/at32_abdac.h b/sound/oss/at32_abdac.h
18776 new file mode 100644
18777 index 0000000..3c88e25
18778 --- /dev/null
18779 +++ b/sound/oss/at32_abdac.h
18780 @@ -0,0 +1,59 @@
18781 +/*
18782 + * Register definitions for the Atmel AT32 on-chip DAC.
18783 + *
18784 + * Copyright (C) 2006 Atmel Corporation
18785 + *
18786 + * This program is free software; you can redistribute it and/or modify
18787 + * it under the terms of the GNU General Public License version 2 as
18788 + * published by the Free Software Foundation.
18789 + */
18790 +#ifndef __SOUND_OSS_AT32_ABDAC_H__
18791 +#define __SOUND_OSS_AT32_ABDAC_H__
18792 +
18793 +/* DAC register offsets */
18794 +#define DAC_DATA 0x0000
18795 +#define DAC_CTRL 0x0008
18796 +#define DAC_INT_MASK 0x000c
18797 +#define DAC_INT_EN 0x0010
18798 +#define DAC_INT_DIS 0x0014
18799 +#define DAC_INT_CLR 0x0018
18800 +#define DAC_INT_STATUS 0x001c
18801 +#define DAC_PDC_DATA 0x0020
18802 +
18803 +/* Bitfields in CTRL */
18804 +#define DAC_SWAP_OFFSET 30
18805 +#define DAC_SWAP_SIZE 1
18806 +#define DAC_EN_OFFSET 31
18807 +#define DAC_EN_SIZE 1
18808 +
18809 +/* Bitfields in INT_MASK/INT_EN/INT_DIS/INT_STATUS/INT_CLR */
18810 +#define DAC_UNDERRUN_OFFSET 28
18811 +#define DAC_UNDERRUN_SIZE 1
18812 +#define DAC_TX_READY_OFFSET 29
18813 +#define DAC_TX_READY_SIZE 1
18814 +#define DAC_TX_BUFFER_EMPTY_OFFSET 30
18815 +#define DAC_TX_BUFFER_EMPTY_SIZE 1
18816 +#define DAC_CHANNEL_TX_END_OFFSET 31
18817 +#define DAC_CHANNEL_TX_END_SIZE 1
18818 +
18819 +/* Bit manipulation macros */
18820 +#define DAC_BIT(name) \
18821 + (1 << DAC_##name##_OFFSET)
18822 +#define DAC_BF(name, value) \
18823 + (((value) & ((1 << DAC_##name##_SIZE) - 1)) \
18824 + << DAC_##name##_OFFSET)
18825 +#define DAC_BFEXT(name, value) \
18826 + (((value) >> DAC_##name##_OFFSET) \
18827 + & ((1 << DAC_##name##_SIZE) - 1))
18828 +#define DAC_BFINS(name, value, old) \
18829 + (((old) & ~(((1 << DAC_##name##_SIZE) - 1) \
18830 + << DAC_##name##_OFFSET)) \
18831 + | DAC_BF(name,value))
18832 +
18833 +/* Register access macros */
18834 +#define dac_readl(port, reg) \
18835 + __raw_readl((port)->regs + DAC_##reg)
18836 +#define dac_writel(port, reg, value) \
18837 + __raw_writel((value), (port)->regs + DAC_##reg)
18838 +
18839 +#endif /* __SOUND_OSS_AT32_ABDAC_H__ */
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