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[openwrt/staging/mkresin.git] / target / linux / bcm63xx / patches-5.4 / 512-board_bcm6328.patch
1 --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
2 +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
3 @@ -348,6 +348,525 @@ static struct board_info __initdata boar
4 },
5 },
6 };
7 +
8 +static struct board_info __initdata board_963281TAN = {
9 + .name = "963281TAN",
10 + .expected_cpu_id = 0x6328,
11 +
12 + .has_pci = 1,
13 +
14 + .has_enetsw = 1,
15 + .enetsw = {
16 + .used_ports = {
17 + [0] = {
18 + .used = 1,
19 + .phy_id = 1,
20 + .name = "Port 1",
21 + },
22 + [1] = {
23 + .used = 1,
24 + .phy_id = 2,
25 + .name = "Port 2",
26 + },
27 + [2] = {
28 + .used = 1,
29 + .phy_id = 3,
30 + .name = "Port 3",
31 + },
32 + [3] = {
33 + .used = 1,
34 + .phy_id = 4,
35 + .name = "Port 4",
36 + },
37 + },
38 + },
39 +};
40 +
41 +static struct board_info __initdata board_A4001N = {
42 + .name = "96328dg2x2",
43 + .expected_cpu_id = 0x6328,
44 +
45 + .has_pci = 1,
46 + .has_ohci0 = 1,
47 + .has_ehci0 = 1,
48 + .num_usbh_ports = 1,
49 +
50 + .has_enetsw = 1,
51 + .enetsw = {
52 + .used_ports = {
53 + [0] = {
54 + .used = 1,
55 + .phy_id = 1,
56 + .name = "Port 1",
57 + },
58 + [1] = {
59 + .used = 1,
60 + .phy_id = 2,
61 + .name = "Port 2",
62 + },
63 + [2] = {
64 + .used = 1,
65 + .phy_id = 3,
66 + .name = "Port 3",
67 + },
68 + [3] = {
69 + .used = 1,
70 + .phy_id = 4,
71 + .name = "Port 4",
72 + },
73 + },
74 + },
75 +
76 + .use_fallback_sprom = 1,
77 + .fallback_sprom = {
78 + .type = SPROM_BCM43225,
79 + .pci_bus = 1,
80 + .pci_dev = 0,
81 + },
82 +};
83 +
84 +static struct board_info __initdata board_A4001N1 = {
85 + .name = "963281T_TEF",
86 + .expected_cpu_id = 0x6328,
87 +
88 + .has_pci = 1,
89 + .has_ohci0 = 1,
90 + .has_ehci0 = 1,
91 + .num_usbh_ports = 1,
92 +
93 + .has_enetsw = 1,
94 + .enetsw = {
95 + .used_ports = {
96 + [0] = {
97 + .used = 1,
98 + .phy_id = 1,
99 + .name = "Port 1",
100 + },
101 + [1] = {
102 + .used = 1,
103 + .phy_id = 2,
104 + .name = "Port 2",
105 + },
106 + [2] = {
107 + .used = 1,
108 + .phy_id = 3,
109 + .name = "Port 3",
110 + },
111 + [3] = {
112 + .used = 1,
113 + .phy_id = 4,
114 + .name = "Port 4",
115 + },
116 + },
117 + },
118 +
119 + .use_fallback_sprom = 1,
120 + .fallback_sprom = {
121 + .type = SPROM_BCM43225,
122 + .pci_bus = 1,
123 + .pci_dev = 0,
124 + },
125 +};
126 +
127 +static struct sprom_fixup __initdata ad1018_fixups[] = {
128 + { .offset = 6, .value = 0x1c00 },
129 + { .offset = 65, .value = 0x1256 },
130 + { .offset = 96, .value = 0x2046 },
131 + { .offset = 97, .value = 0xfe69 },
132 + { .offset = 98, .value = 0x1726 },
133 + { .offset = 99, .value = 0xfa5c },
134 + { .offset = 112, .value = 0x2046 },
135 + { .offset = 113, .value = 0xfea8 },
136 + { .offset = 114, .value = 0x1978 },
137 + { .offset = 115, .value = 0xfa26 },
138 + { .offset = 161, .value = 0x2222 },
139 + { .offset = 169, .value = 0x2222 },
140 + { .offset = 171, .value = 0x2222 },
141 + { .offset = 173, .value = 0x2222 },
142 + { .offset = 174, .value = 0x4444 },
143 + { .offset = 175, .value = 0x2222 },
144 + { .offset = 176, .value = 0x4444 },
145 +};
146 +
147 +static struct board_info __initdata board_AD1018 = {
148 + .name = "96328avngr",
149 + .expected_cpu_id = 0x6328,
150 +
151 + .has_pci = 1,
152 + .has_ohci0 = 1,
153 + .has_ehci0 = 1,
154 + .num_usbh_ports = 1,
155 +
156 + .has_enetsw = 1,
157 + .enetsw = {
158 + .used_ports = {
159 + [0] = {
160 + .used = 1,
161 + .phy_id = 1,
162 + .name = "FIBRE",
163 + },
164 + [1] = {
165 + .used = 1,
166 + .phy_id = 2,
167 + .name = "LAN3",
168 + },
169 + [2] = {
170 + .used = 1,
171 + .phy_id = 3,
172 + .name = "LAN2",
173 + },
174 + [3] = {
175 + .used = 1,
176 + .phy_id = 4,
177 + .name = "LAN1",
178 + },
179 + },
180 + },
181 +
182 + .use_fallback_sprom = 1,
183 + .fallback_sprom = {
184 + .type = SPROM_BCM43217,
185 + .pci_bus = 1,
186 + .pci_dev = 0,
187 + .board_fixups = ad1018_fixups,
188 + .num_board_fixups = ARRAY_SIZE(ad1018_fixups),
189 + },
190 +};
191 +
192 +static struct sprom_fixup __initdata ar5381u_fixups[] = {
193 + { .offset = 97, .value = 0xfee5 },
194 + { .offset = 98, .value = 0x157c },
195 + { .offset = 99, .value = 0xfae7 },
196 + { .offset = 113, .value = 0xfefa },
197 + { .offset = 114, .value = 0x15d6 },
198 + { .offset = 115, .value = 0xfaf8 },
199 +};
200 +
201 +static struct board_info __initdata board_AR5381u = {
202 + .name = "96328A-1241N",
203 + .expected_cpu_id = 0x6328,
204 +
205 + .has_pci = 1,
206 + .has_ohci0 = 1,
207 + .has_ehci0 = 1,
208 + .num_usbh_ports = 1,
209 +
210 + .has_enetsw = 1,
211 + .enetsw = {
212 + .used_ports = {
213 + [0] = {
214 + .used = 1,
215 + .phy_id = 1,
216 + .name = "Port 1",
217 + },
218 + [1] = {
219 + .used = 1,
220 + .phy_id = 2,
221 + .name = "Port 2",
222 + },
223 + [2] = {
224 + .used = 1,
225 + .phy_id = 3,
226 + .name = "Port 3",
227 + },
228 + [3] = {
229 + .used = 1,
230 + .phy_id = 4,
231 + .name = "Port 4",
232 + },
233 + },
234 + },
235 +
236 + .use_fallback_sprom = 1,
237 + .fallback_sprom = {
238 + .type = SPROM_BCM43225,
239 + .pci_bus = 1,
240 + .pci_dev = 0,
241 + .board_fixups = ar5381u_fixups,
242 + .num_board_fixups = ARRAY_SIZE(ar5381u_fixups),
243 + },
244 +};
245 +
246 +static struct sprom_fixup __initdata ar5387un_fixups[] = {
247 + { .offset = 2, .value = 0x05bb },
248 + { .offset = 65, .value = 0x1204 },
249 + { .offset = 78, .value = 0x0303 },
250 + { .offset = 79, .value = 0x0202 },
251 + { .offset = 80, .value = 0xff02 },
252 + { .offset = 87, .value = 0x0315 },
253 + { .offset = 88, .value = 0x0315 },
254 + { .offset = 96, .value = 0x2048 },
255 + { .offset = 97, .value = 0xff11 },
256 + { .offset = 98, .value = 0x1567 },
257 + { .offset = 99, .value = 0xfb24 },
258 + { .offset = 100, .value = 0x3e3c },
259 + { .offset = 101, .value = 0x4038 },
260 + { .offset = 102, .value = 0xfe7f },
261 + { .offset = 103, .value = 0x1279 },
262 + { .offset = 112, .value = 0x2048 },
263 + { .offset = 113, .value = 0xff03 },
264 + { .offset = 114, .value = 0x154c },
265 + { .offset = 115, .value = 0xfb27 },
266 + { .offset = 116, .value = 0x3e3c },
267 + { .offset = 117, .value = 0x4038 },
268 + { .offset = 118, .value = 0xfe87 },
269 + { .offset = 119, .value = 0x1233 },
270 + { .offset = 203, .value = 0x2226 },
271 +};
272 +
273 +static struct board_info __initdata board_AR5387un = {
274 + .name = "96328A-1441N1",
275 + .expected_cpu_id = 0x6328,
276 +
277 + .has_pci = 1,
278 + .has_ohci0 = 1,
279 + .has_ehci0 = 1,
280 + .num_usbh_ports = 1,
281 +
282 + .has_enetsw = 1,
283 + .enetsw = {
284 + .used_ports = {
285 + [0] = {
286 + .used = 1,
287 + .phy_id = 1,
288 + .name = "Port 1",
289 + },
290 + [1] = {
291 + .used = 1,
292 + .phy_id = 2,
293 + .name = "Port 2",
294 + },
295 + [2] = {
296 + .used = 1,
297 + .phy_id = 3,
298 + .name = "Port 3",
299 + },
300 + [3] = {
301 + .used = 1,
302 + .phy_id = 4,
303 + .name = "Port 4",
304 + },
305 + },
306 + },
307 +
308 + .use_fallback_sprom = 1,
309 + .fallback_sprom = {
310 + .type = SPROM_BCM43225,
311 + .pci_bus = 1,
312 + .pci_dev = 0,
313 + .board_fixups = ar5387un_fixups,
314 + .num_board_fixups = ARRAY_SIZE(ar5387un_fixups),
315 + },
316 +};
317 +
318 +static struct board_info __initdata board_dsl_274xb_f1 = {
319 + .name = "AW4339U",
320 + .expected_cpu_id = 0x6328,
321 +
322 + .has_pci = 1,
323 +
324 + .has_caldata = 1,
325 + .caldata = {
326 + {
327 + .vendor = PCI_VENDOR_ID_ATHEROS,
328 + .caldata_offset = 0x7d1000,
329 + .slot = 0,
330 + .led_pin = -1,
331 + .led_active_high = 1,
332 + },
333 + },
334 +
335 + .has_enetsw = 1,
336 + .enetsw = {
337 + .used_ports = {
338 + [0] = {
339 + .used = 1,
340 + .phy_id = 1,
341 + .name = "Port 4",
342 + },
343 + [1] = {
344 + .used = 1,
345 + .phy_id = 2,
346 + .name = "Port 3",
347 + },
348 + [2] = {
349 + .used = 1,
350 + .phy_id = 3,
351 + .name = "Port 2",
352 + },
353 + [3] = {
354 + .used = 1,
355 + .phy_id = 4,
356 + .name = "Port 1",
357 + },
358 + },
359 + },
360 +};
361 +
362 +static struct board_info __initdata board_FAST2704V2 = {
363 + .name = "F@ST2704V2",
364 + .expected_cpu_id = 0x6328,
365 +
366 + .has_pci = 1,
367 + .has_ohci0 = 1,
368 + .has_ehci0 = 1,
369 + .has_usbd = 1,
370 +
371 + .has_enetsw = 1,
372 + .enetsw = {
373 + .used_ports = {
374 + [0] = {
375 + .used = 1,
376 + .phy_id = 1,
377 + .name = "Port 1",
378 + },
379 + [1] = {
380 + .used = 1,
381 + .phy_id = 2,
382 + .name = "Port 2",
383 + },
384 + [2] = {
385 + .used = 1,
386 + .phy_id = 3,
387 + .name = "Port 3",
388 + },
389 + [3] = {
390 + .used = 1,
391 + .phy_id = 4,
392 + .name = "Port 4",
393 + },
394 + },
395 + },
396 +};
397 +
398 +static struct board_info __initdata board_PDG_A4001N_A_000_1A1_AX = {
399 + .name = "96328avng",
400 + .expected_cpu_id = 0x6328,
401 +
402 + .has_pci = 1,
403 + .has_ohci0 = 1,
404 + .has_ehci0 = 1,
405 + .num_usbh_ports = 1,
406 +
407 + .has_enetsw = 1,
408 + .enetsw = {
409 + .used_ports = {
410 + [0] = {
411 + .used = 1,
412 + .phy_id = 1,
413 + .name = "Port 1",
414 + },
415 + [1] = {
416 + .used = 1,
417 + .phy_id = 2,
418 + .name = "Port 2",
419 + },
420 + [2] = {
421 + .used = 1,
422 + .phy_id = 3,
423 + .name = "Port 3",
424 + },
425 + [3] = {
426 + .used = 1,
427 + .phy_id = 4,
428 + .name = "Port 4",
429 + },
430 + },
431 + },
432 +
433 + .use_fallback_sprom = 1,
434 + .fallback_sprom = {
435 + .type = SPROM_BCM43225,
436 + .pci_bus = 1,
437 + .pci_dev = 0,
438 + },
439 +};
440 +
441 +static struct board_info __initdata board_PDG_A4101N_A_000_1A1_AE = {
442 + .name = "96328avngv",
443 + .expected_cpu_id = 0x6328,
444 +
445 + .has_pci = 1,
446 + .has_ohci0 = 1,
447 + .has_ehci0 = 1,
448 + .num_usbh_ports = 1,
449 +
450 + .has_enetsw = 1,
451 + .enetsw = {
452 + .used_ports = {
453 + [0] = {
454 + .used = 1,
455 + .phy_id = 1,
456 + .name = "Port 1",
457 + },
458 + [1] = {
459 + .used = 1,
460 + .phy_id = 2,
461 + .name = "Port 2",
462 + },
463 + [2] = {
464 + .used = 1,
465 + .phy_id = 3,
466 + .name = "Port 3",
467 + },
468 + [3] = {
469 + .used = 1,
470 + .phy_id = 4,
471 + .name = "Port 4",
472 + },
473 + },
474 + },
475 +
476 + .use_fallback_sprom = 1,
477 + .fallback_sprom = {
478 + .type = SPROM_BCM43225,
479 + .pci_bus = 1,
480 + .pci_dev = 0,
481 + },
482 +};
483 +
484 +static struct board_info __initdata board_R5010UNV2 = {
485 + .name = "96328ang",
486 + .expected_cpu_id = 0x6328,
487 +
488 + .has_pci = 1,
489 + .has_ohci0 = 1,
490 + .has_ehci0 = 1,
491 + .num_usbh_ports = 1,
492 +
493 + .has_enetsw = 1,
494 + .enetsw = {
495 + .used_ports = {
496 + [0] = {
497 + .used = 1,
498 + .phy_id = 1,
499 + .name = "Port 1",
500 + },
501 + [1] = {
502 + .used = 1,
503 + .phy_id = 2,
504 + .name = "Port 2",
505 + },
506 + [2] = {
507 + .used = 1,
508 + .phy_id = 3,
509 + .name = "Port 3",
510 + },
511 + [3] = {
512 + .used = 1,
513 + .phy_id = 4,
514 + .name = "Port 4",
515 + },
516 + },
517 + },
518 +
519 + .use_fallback_sprom = 1,
520 + .fallback_sprom = {
521 + .type = SPROM_BCM43217,
522 + .pci_bus = 1,
523 + .pci_dev = 0,
524 + },
525 +};
526 #endif /* CONFIG_BCM63XX_CPU_6328 */
527
528 /*
529 @@ -703,6 +1222,17 @@ static const struct board_info __initcon
530 #endif /* CONFIG_BCM63XX_CPU_6318 */
531 #ifdef CONFIG_BCM63XX_CPU_6328
532 &board_96328avng,
533 + &board_963281TAN,
534 + &board_A4001N,
535 + &board_A4001N1,
536 + &board_AD1018,
537 + &board_AR5381u,
538 + &board_AR5387un,
539 + &board_dsl_274xb_f1,
540 + &board_FAST2704V2,
541 + &board_PDG_A4001N_A_000_1A1_AX,
542 + &board_PDG_A4101N_A_000_1A1_AE,
543 + &board_R5010UNV2,
544 #endif /* CONFIG_BCM63XX_CPU_6328 */
545 #ifdef CONFIG_BCM63XX_CPU_6338
546 &board_96338gw,
547 @@ -742,7 +1272,20 @@ static struct of_device_id const bcm963x
548 { .compatible = "sagem,fast-2704n", .data = &board_FAST2704N, },
549 #endif /* CONFIG_BCM63XX_CPU_6318 */
550 #ifdef CONFIG_BCM63XX_CPU_6328
551 + { .compatible = "adb,a4001n", .data = &board_A4001N, },
552 + { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
553 + { .compatible = "adb,pdg-a4001n-a-000-1a1-ax", .data = &board_PDG_A4001N_A_000_1A1_AX, },
554 + { .compatible = "adb,pdg-a4101n-a-000-1a1-ae", .data = &board_PDG_A4101N_A_000_1A1_AE, },
555 { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
556 + { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
557 + { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
558 + { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
559 + { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
560 + { .compatible = "d-link,dsl-2750u-c1", .data = &board_A4001N, },
561 + { .compatible = "nucom,r5010un-v2", .data = &board_R5010UNV2, },
562 + { .compatible = "sagem,fast-2704-v2", .data = &board_FAST2704V2, },
563 + { .compatible = "sercomm,ad1018", .data = &board_AD1018, },
564 + { .compatible = "sercomm,ad1018-nor", .data = &board_AD1018, },
565 #endif /* CONFIG_BCM63XX_CPU_6328 */
566 #ifdef CONFIG_BCM63XX_CPU_6338
567 { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
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