brcm63xx: update irq affinity code to latest version
[openwrt/staging/mkresin.git] / target / linux / brcm63xx / patches-3.14 / 322-MIPS-BCM63XX-populate-irq_-stat-mask-_addr-for-secon.patch
1 From ff61c72a7a260ab4c4abbddb72c3cd2aea5e0687 Mon Sep 17 00:00:00 2001
2 From: Jonas Gorski <jogo@openwrt.org>
3 Date: Thu, 25 Apr 2013 00:31:29 +0200
4 Subject: [PATCH 05/10] MIPS: BCM63XX: populate irq_{stat,mask}_addr for second
5 cpu
6
7 Set it to zero if there is no second set.
8
9 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
10 ---
11 arch/mips/bcm63xx/irq.c | 18 ++++++++++++++++++
12 1 file changed, 18 insertions(+)
13
14 --- a/arch/mips/bcm63xx/irq.c
15 +++ b/arch/mips/bcm63xx/irq.c
16 @@ -342,11 +342,15 @@ static void bcm63xx_init_irq(void)
17
18 irq_stat_addr[0] = bcm63xx_regset_address(RSET_PERF);
19 irq_mask_addr[0] = bcm63xx_regset_address(RSET_PERF);
20 + irq_stat_addr[1] = bcm63xx_regset_address(RSET_PERF);
21 + irq_mask_addr[1] = bcm63xx_regset_address(RSET_PERF);
22
23 switch (bcm63xx_get_cpu_id()) {
24 case BCM3368_CPU_ID:
25 irq_stat_addr[0] += PERF_IRQSTAT_3368_REG;
26 irq_mask_addr[0] += PERF_IRQMASK_3368_REG;
27 + irq_stat_addr[1] = 0;
28 + irq_stat_addr[1] = 0;
29 irq_bits = 32;
30 ext_irq_count = 4;
31 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
32 @@ -354,6 +358,8 @@ static void bcm63xx_init_irq(void)
33 case BCM6328_CPU_ID:
34 irq_stat_addr[0] += PERF_IRQSTAT_6328_REG(0);
35 irq_mask_addr[0] += PERF_IRQMASK_6328_REG(0);
36 + irq_stat_addr[1] += PERF_IRQSTAT_6328_REG(1);
37 + irq_stat_addr[1] += PERF_IRQMASK_6328_REG(1);
38 irq_bits = 64;
39 ext_irq_count = 4;
40 is_ext_irq_cascaded = 1;
41 @@ -364,6 +370,8 @@ static void bcm63xx_init_irq(void)
42 case BCM6338_CPU_ID:
43 irq_stat_addr[0] += PERF_IRQSTAT_6338_REG;
44 irq_mask_addr[0] += PERF_IRQMASK_6338_REG;
45 + irq_stat_addr[1] = 0;
46 + irq_mask_addr[1] = 0;
47 irq_bits = 32;
48 ext_irq_count = 4;
49 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
50 @@ -371,6 +379,8 @@ static void bcm63xx_init_irq(void)
51 case BCM6345_CPU_ID:
52 irq_stat_addr[0] += PERF_IRQSTAT_6345_REG;
53 irq_mask_addr[0] += PERF_IRQMASK_6345_REG;
54 + irq_stat_addr[1] = 0;
55 + irq_mask_addr[1] = 0;
56 irq_bits = 32;
57 ext_irq_count = 4;
58 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
59 @@ -378,6 +388,8 @@ static void bcm63xx_init_irq(void)
60 case BCM6348_CPU_ID:
61 irq_stat_addr[0] += PERF_IRQSTAT_6348_REG;
62 irq_mask_addr[0] += PERF_IRQMASK_6348_REG;
63 + irq_stat_addr[1] = 0;
64 + irq_mask_addr[1] = 0;
65 irq_bits = 32;
66 ext_irq_count = 4;
67 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
68 @@ -385,6 +397,8 @@ static void bcm63xx_init_irq(void)
69 case BCM6358_CPU_ID:
70 irq_stat_addr[0] += PERF_IRQSTAT_6358_REG(0);
71 irq_mask_addr[0] += PERF_IRQMASK_6358_REG(0);
72 + irq_stat_addr[1] += PERF_IRQSTAT_6358_REG(1);
73 + irq_mask_addr[1] += PERF_IRQMASK_6358_REG(1);
74 irq_bits = 32;
75 ext_irq_count = 4;
76 is_ext_irq_cascaded = 1;
77 @@ -395,6 +409,8 @@ static void bcm63xx_init_irq(void)
78 case BCM6362_CPU_ID:
79 irq_stat_addr[0] += PERF_IRQSTAT_6362_REG(0);
80 irq_mask_addr[0] += PERF_IRQMASK_6362_REG(0);
81 + irq_stat_addr[1] += PERF_IRQSTAT_6362_REG(1);
82 + irq_mask_addr[1] += PERF_IRQMASK_6362_REG(1);
83 irq_bits = 64;
84 ext_irq_count = 4;
85 is_ext_irq_cascaded = 1;
86 @@ -405,6 +421,8 @@ static void bcm63xx_init_irq(void)
87 case BCM6368_CPU_ID:
88 irq_stat_addr[0] += PERF_IRQSTAT_6368_REG(0);
89 irq_mask_addr[0] += PERF_IRQMASK_6368_REG(0);
90 + irq_stat_addr[1] += PERF_IRQSTAT_6368_REG(1);
91 + irq_mask_addr[1] += PERF_IRQMASK_6368_REG(1);
92 irq_bits = 64;
93 ext_irq_count = 6;
94 is_ext_irq_cascaded = 1;