generic: ar8216: move ar8216_id_chip function
[openwrt/staging/mkresin.git] / target / linux / generic / files / drivers / net / phy / ar8216.c
1 /*
2 * ar8216.c: AR8216 switch driver
3 *
4 * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17 #include <linux/if.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/list.h>
21 #include <linux/if_ether.h>
22 #include <linux/skbuff.h>
23 #include <linux/netdevice.h>
24 #include <linux/netlink.h>
25 #include <linux/bitops.h>
26 #include <net/genetlink.h>
27 #include <linux/switch.h>
28 #include <linux/delay.h>
29 #include <linux/phy.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
32 #include <linux/lockdep.h>
33 #include "ar8216.h"
34
35 /* size of the vlan table */
36 #define AR8X16_MAX_VLANS 128
37 #define AR8X16_PROBE_RETRIES 10
38
39 struct ar8216_priv {
40 struct switch_dev dev;
41 struct phy_device *phy;
42 u32 (*read)(struct ar8216_priv *priv, int reg);
43 void (*write)(struct ar8216_priv *priv, int reg, u32 val);
44 const struct net_device_ops *ndo_old;
45 struct net_device_ops ndo;
46 struct mutex reg_mutex;
47 int chip;
48 bool initialized;
49 bool port4_phy;
50 char buf[80];
51
52 bool init;
53
54 /* all fields below are cleared on reset */
55 bool vlan;
56 u16 vlan_id[AR8X16_MAX_VLANS];
57 u8 vlan_table[AR8X16_MAX_VLANS];
58 u8 vlan_tagged;
59 u16 pvid[AR8216_NUM_PORTS];
60 };
61
62 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
63
64 static inline void
65 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
66 {
67 regaddr >>= 1;
68 *r1 = regaddr & 0x1e;
69
70 regaddr >>= 5;
71 *r2 = regaddr & 0x7;
72
73 regaddr >>= 3;
74 *page = regaddr & 0x1ff;
75 }
76
77 static u32
78 ar8216_mii_read(struct ar8216_priv *priv, int reg)
79 {
80 struct phy_device *phy = priv->phy;
81 struct mii_bus *bus = phy->bus;
82 u16 r1, r2, page;
83 u16 lo, hi;
84
85 split_addr((u32) reg, &r1, &r2, &page);
86
87 mutex_lock(&bus->mdio_lock);
88
89 bus->write(bus, 0x18, 0, page);
90 usleep_range(1000, 2000); /* wait for the page switch to propagate */
91 lo = bus->read(bus, 0x10 | r2, r1);
92 hi = bus->read(bus, 0x10 | r2, r1 + 1);
93
94 mutex_unlock(&bus->mdio_lock);
95
96 return (hi << 16) | lo;
97 }
98
99 static void
100 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
101 {
102 struct phy_device *phy = priv->phy;
103 struct mii_bus *bus = phy->bus;
104 u16 r1, r2, r3;
105 u16 lo, hi;
106
107 split_addr((u32) reg, &r1, &r2, &r3);
108 lo = val & 0xffff;
109 hi = (u16) (val >> 16);
110
111 mutex_lock(&bus->mdio_lock);
112
113 bus->write(bus, 0x18, 0, r3);
114 usleep_range(1000, 2000); /* wait for the page switch to propagate */
115 bus->write(bus, 0x10 | r2, r1 + 1, hi);
116 bus->write(bus, 0x10 | r2, r1, lo);
117
118 mutex_unlock(&bus->mdio_lock);
119 }
120
121 static void
122 ar8216_phy_dbg_write(struct ar8216_priv *priv, int phy_addr,
123 u16 dbg_addr, u16 dbg_data)
124 {
125 struct mii_bus *bus = priv->phy->bus;
126
127 mutex_lock(&bus->mdio_lock);
128 bus->write(bus, phy_addr, MII_ATH_DBG_ADDR, dbg_addr);
129 bus->write(bus, phy_addr, MII_ATH_DBG_DATA, dbg_data);
130 mutex_unlock(&bus->mdio_lock);
131 }
132
133 static u32
134 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
135 {
136 u32 v;
137
138 lockdep_assert_held(&priv->reg_mutex);
139
140 v = priv->read(priv, reg);
141 v &= ~mask;
142 v |= val;
143 priv->write(priv, reg, v);
144
145 return v;
146 }
147
148 static void
149 ar8216_read_port_link(struct ar8216_priv *priv, int port,
150 struct switch_port_link *link)
151 {
152 u32 status;
153 u32 speed;
154
155 memset(link, '\0', sizeof(*link));
156
157 status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
158
159 link->aneg = !!(status & AR8216_PORT_STATUS_LINK_AUTO);
160 if (link->aneg) {
161 link->link = !!(status & AR8216_PORT_STATUS_LINK_UP);
162 if (!link->link)
163 return;
164 } else {
165 link->link = true;
166 }
167
168 link->duplex = !!(status & AR8216_PORT_STATUS_DUPLEX);
169 link->tx_flow = !!(status & AR8216_PORT_STATUS_TXFLOW);
170 link->rx_flow = !!(status & AR8216_PORT_STATUS_RXFLOW);
171
172 speed = (status & AR8216_PORT_STATUS_SPEED) >>
173 AR8216_PORT_STATUS_SPEED_S;
174
175 switch (speed) {
176 case AR8216_PORT_SPEED_10M:
177 link->speed = SWITCH_PORT_SPEED_10;
178 break;
179 case AR8216_PORT_SPEED_100M:
180 link->speed = SWITCH_PORT_SPEED_100;
181 break;
182 case AR8216_PORT_SPEED_1000M:
183 link->speed = SWITCH_PORT_SPEED_1000;
184 break;
185 default:
186 link->speed = SWITCH_PORT_SPEED_UNKNOWN;
187 break;
188 }
189 }
190
191 static int
192 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
193 struct switch_val *val)
194 {
195 struct ar8216_priv *priv = to_ar8216(dev);
196 priv->vlan = !!val->value.i;
197 return 0;
198 }
199
200 static int
201 ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
202 struct switch_val *val)
203 {
204 struct ar8216_priv *priv = to_ar8216(dev);
205 val->value.i = priv->vlan;
206 return 0;
207 }
208
209
210 static int
211 ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
212 {
213 struct ar8216_priv *priv = to_ar8216(dev);
214
215 /* make sure no invalid PVIDs get set */
216
217 if (vlan >= dev->vlans)
218 return -EINVAL;
219
220 priv->pvid[port] = vlan;
221 return 0;
222 }
223
224 static int
225 ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
226 {
227 struct ar8216_priv *priv = to_ar8216(dev);
228 *vlan = priv->pvid[port];
229 return 0;
230 }
231
232 static int
233 ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
234 struct switch_val *val)
235 {
236 struct ar8216_priv *priv = to_ar8216(dev);
237 priv->vlan_id[val->port_vlan] = val->value.i;
238 return 0;
239 }
240
241 static int
242 ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
243 struct switch_val *val)
244 {
245 struct ar8216_priv *priv = to_ar8216(dev);
246 val->value.i = priv->vlan_id[val->port_vlan];
247 return 0;
248 }
249
250 static int
251 ar8216_get_port_link(struct switch_dev *dev, int port,
252 struct switch_port_link *link)
253 {
254 struct ar8216_priv *priv = to_ar8216(dev);
255
256 ar8216_read_port_link(priv, port, link);
257 return 0;
258 }
259
260 static int
261 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
262 {
263 struct ar8216_priv *priv = dev->phy_ptr;
264 unsigned char *buf;
265
266 if (unlikely(!priv))
267 goto error;
268
269 if (!priv->vlan)
270 goto send;
271
272 if (unlikely(skb_headroom(skb) < 2)) {
273 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
274 goto error;
275 }
276
277 buf = skb_push(skb, 2);
278 buf[0] = 0x10;
279 buf[1] = 0x80;
280
281 send:
282 return priv->ndo_old->ndo_start_xmit(skb, dev);
283
284 error:
285 dev_kfree_skb_any(skb);
286 return 0;
287 }
288
289 static int
290 ar8216_mangle_rx(struct sk_buff *skb, int napi)
291 {
292 struct ar8216_priv *priv;
293 struct net_device *dev;
294 unsigned char *buf;
295 int port, vlan;
296
297 dev = skb->dev;
298 if (!dev)
299 goto error;
300
301 priv = dev->phy_ptr;
302 if (!priv)
303 goto error;
304
305 /* don't strip the header if vlan mode is disabled */
306 if (!priv->vlan)
307 goto recv;
308
309 /* strip header, get vlan id */
310 buf = skb->data;
311 skb_pull(skb, 2);
312
313 /* check for vlan header presence */
314 if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
315 goto recv;
316
317 port = buf[0] & 0xf;
318
319 /* no need to fix up packets coming from a tagged source */
320 if (priv->vlan_tagged & (1 << port))
321 goto recv;
322
323 /* lookup port vid from local table, the switch passes an invalid vlan id */
324 vlan = priv->vlan_id[priv->pvid[port]];
325
326 buf[14 + 2] &= 0xf0;
327 buf[14 + 2] |= vlan >> 8;
328 buf[15 + 2] = vlan & 0xff;
329
330 recv:
331 skb->protocol = eth_type_trans(skb, skb->dev);
332
333 if (napi)
334 return netif_receive_skb(skb);
335 else
336 return netif_rx(skb);
337
338 error:
339 /* no vlan? eat the packet! */
340 dev_kfree_skb_any(skb);
341 return NET_RX_DROP;
342 }
343
344 static int
345 ar8216_netif_rx(struct sk_buff *skb)
346 {
347 return ar8216_mangle_rx(skb, 0);
348 }
349
350 static int
351 ar8216_netif_receive_skb(struct sk_buff *skb)
352 {
353 return ar8216_mangle_rx(skb, 1);
354 }
355
356
357 static struct switch_attr ar8216_globals[] = {
358 {
359 .type = SWITCH_TYPE_INT,
360 .name = "enable_vlan",
361 .description = "Enable VLAN mode",
362 .set = ar8216_set_vlan,
363 .get = ar8216_get_vlan,
364 .max = 1
365 },
366 };
367
368 static struct switch_attr ar8216_port[] = {
369 };
370
371 static struct switch_attr ar8216_vlan[] = {
372 {
373 .type = SWITCH_TYPE_INT,
374 .name = "vid",
375 .description = "VLAN ID (0-4094)",
376 .set = ar8216_set_vid,
377 .get = ar8216_get_vid,
378 .max = 4094,
379 },
380 };
381
382
383 static int
384 ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
385 {
386 struct ar8216_priv *priv = to_ar8216(dev);
387 u8 ports = priv->vlan_table[val->port_vlan];
388 int i;
389
390 val->len = 0;
391 for (i = 0; i < AR8216_NUM_PORTS; i++) {
392 struct switch_port *p;
393
394 if (!(ports & (1 << i)))
395 continue;
396
397 p = &val->value.ports[val->len++];
398 p->id = i;
399 if (priv->vlan_tagged & (1 << i))
400 p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
401 else
402 p->flags = 0;
403 }
404 return 0;
405 }
406
407 static int
408 ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
409 {
410 struct ar8216_priv *priv = to_ar8216(dev);
411 u8 *vt = &priv->vlan_table[val->port_vlan];
412 int i, j;
413
414 *vt = 0;
415 for (i = 0; i < val->len; i++) {
416 struct switch_port *p = &val->value.ports[i];
417
418 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
419 priv->vlan_tagged |= (1 << p->id);
420 } else {
421 priv->vlan_tagged &= ~(1 << p->id);
422 priv->pvid[p->id] = val->port_vlan;
423
424 /* make sure that an untagged port does not
425 * appear in other vlans */
426 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
427 if (j == val->port_vlan)
428 continue;
429 priv->vlan_table[j] &= ~(1 << p->id);
430 }
431 }
432
433 *vt |= 1 << p->id;
434 }
435 return 0;
436 }
437
438 static int
439 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
440 {
441 int timeout = 20;
442 u32 t = 0;
443
444 while (1) {
445 t = priv->read(priv, reg);
446 if ((t & mask) == val)
447 return 0;
448
449 if (timeout-- <= 0)
450 break;
451
452 udelay(10);
453 }
454
455 pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
456 (unsigned int) reg, t, mask, val);
457 return -ETIMEDOUT;
458 }
459
460 static void
461 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
462 {
463 if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
464 return;
465 if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
466 val &= AR8216_VTUDATA_MEMBER;
467 val |= AR8216_VTUDATA_VALID;
468 priv->write(priv, AR8216_REG_VTU_DATA, val);
469 }
470 op |= AR8216_VTU_ACTIVE;
471 priv->write(priv, AR8216_REG_VTU, op);
472 }
473
474 static void
475 ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
476 u32 members, u32 pvid)
477 {
478 u32 header;
479
480 if (priv->vlan && port == AR8216_PORT_CPU && priv->chip == AR8216)
481 header = AR8216_PORT_CTRL_HEADER;
482 else
483 header = 0;
484
485 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
486 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
487 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
488 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
489 AR8216_PORT_CTRL_LEARN | header |
490 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
491 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
492
493 ar8216_rmw(priv, AR8216_REG_PORT_VLAN(port),
494 AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
495 AR8216_PORT_VLAN_DEFAULT_ID,
496 (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
497 (ingress << AR8216_PORT_VLAN_MODE_S) |
498 (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
499 }
500
501 static void
502 ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
503 u32 members, u32 pvid)
504 {
505 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
506 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
507 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
508 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
509 AR8216_PORT_CTRL_LEARN |
510 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
511 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
512
513 ar8216_rmw(priv, AR8236_REG_PORT_VLAN(port),
514 AR8236_PORT_VLAN_DEFAULT_ID,
515 (pvid << AR8236_PORT_VLAN_DEFAULT_ID_S));
516
517 ar8216_rmw(priv, AR8236_REG_PORT_VLAN2(port),
518 AR8236_PORT_VLAN2_VLAN_MODE |
519 AR8236_PORT_VLAN2_MEMBER,
520 (ingress << AR8236_PORT_VLAN2_VLAN_MODE_S) |
521 (members << AR8236_PORT_VLAN2_MEMBER_S));
522 }
523
524 static int
525 ar8216_hw_apply(struct switch_dev *dev)
526 {
527 struct ar8216_priv *priv = to_ar8216(dev);
528 u8 portmask[AR8216_NUM_PORTS];
529 int i, j;
530
531 mutex_lock(&priv->reg_mutex);
532 /* flush all vlan translation unit entries */
533 ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
534
535 memset(portmask, 0, sizeof(portmask));
536 if (!priv->init) {
537 /* calculate the port destination masks and load vlans
538 * into the vlan translation unit */
539 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
540 u8 vp = priv->vlan_table[j];
541
542 if (!vp)
543 continue;
544
545 for (i = 0; i < AR8216_NUM_PORTS; i++) {
546 u8 mask = (1 << i);
547 if (vp & mask)
548 portmask[i] |= vp & ~mask;
549 }
550
551 ar8216_vtu_op(priv,
552 AR8216_VTU_OP_LOAD |
553 (priv->vlan_id[j] << AR8216_VTU_VID_S),
554 priv->vlan_table[j]);
555 }
556 } else {
557 /* vlan disabled:
558 * isolate all ports, but connect them to the cpu port */
559 for (i = 0; i < AR8216_NUM_PORTS; i++) {
560 if (i == AR8216_PORT_CPU)
561 continue;
562
563 portmask[i] = 1 << AR8216_PORT_CPU;
564 portmask[AR8216_PORT_CPU] |= (1 << i);
565 }
566 }
567
568 /* update the port destination mask registers and tag settings */
569 for (i = 0; i < AR8216_NUM_PORTS; i++) {
570 int egress, ingress;
571 int pvid;
572
573 if (priv->vlan) {
574 pvid = priv->vlan_id[priv->pvid[i]];
575 if (priv->vlan_tagged & (1 << i))
576 egress = AR8216_OUT_ADD_VLAN;
577 else
578 egress = AR8216_OUT_STRIP_VLAN;
579 ingress = AR8216_IN_SECURE;
580 } else {
581 pvid = i;
582 egress = AR8216_OUT_KEEP;
583 ingress = AR8216_IN_PORT_ONLY;
584 }
585
586 if (priv->chip == AR8236)
587 ar8236_setup_port(priv, i, egress, ingress, portmask[i],
588 pvid);
589 else
590 ar8216_setup_port(priv, i, egress, ingress, portmask[i],
591 pvid);
592 }
593 mutex_unlock(&priv->reg_mutex);
594 return 0;
595 }
596
597 static int
598 ar8216_hw_init(struct ar8216_priv *priv)
599 {
600 return 0;
601 }
602
603 static int
604 ar8236_hw_init(struct ar8216_priv *priv)
605 {
606 int i;
607 struct mii_bus *bus;
608
609 if (priv->initialized)
610 return 0;
611
612 /* Initialize the PHYs */
613 bus = priv->phy->bus;
614 for (i = 0; i < 5; i++) {
615 mdiobus_write(bus, i, MII_ADVERTISE,
616 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
617 ADVERTISE_PAUSE_ASYM);
618 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
619 }
620 msleep(1000);
621
622 priv->initialized = true;
623 return 0;
624 }
625
626 static int
627 ar8316_hw_init(struct ar8216_priv *priv)
628 {
629 int i;
630 u32 val, newval;
631 struct mii_bus *bus;
632
633 val = priv->read(priv, 0x8);
634
635 if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
636 if (priv->port4_phy) {
637 /* value taken from Ubiquiti RouterStation Pro */
638 newval = 0x81461bea;
639 printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
640 } else {
641 newval = 0x01261be2;
642 printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
643 }
644 } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
645 /* value taken from AVM Fritz!Box 7390 sources */
646 newval = 0x010e5b71;
647 } else {
648 /* no known value for phy interface */
649 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
650 priv->phy->interface);
651 return -EINVAL;
652 }
653
654 if (val == newval)
655 goto out;
656
657 priv->write(priv, 0x8, newval);
658
659 /* Initialize the ports */
660 bus = priv->phy->bus;
661 for (i = 0; i < 5; i++) {
662 if ((i == 4) && priv->port4_phy &&
663 priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
664 /* work around for phy4 rgmii mode */
665 ar8216_phy_dbg_write(priv, i, 0x12, 0x480c);
666 /* rx delay */
667 ar8216_phy_dbg_write(priv, i, 0x0, 0x824e);
668 /* tx delay */
669 ar8216_phy_dbg_write(priv, i, 0x5, 0x3d47);
670 msleep(1000);
671 }
672
673 /* initialize the port itself */
674 mdiobus_write(bus, i, MII_ADVERTISE,
675 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
676 mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
677 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
678 msleep(1000);
679 }
680
681 out:
682 priv->initialized = true;
683 return 0;
684 }
685
686 static void
687 ar8216_init_globals(struct ar8216_priv *priv)
688 {
689 switch (priv->chip) {
690 case AR8216:
691 /* standard atheros magic */
692 priv->write(priv, 0x38, 0xc000050e);
693
694 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
695 AR8216_GCTRL_MTU, 1518 + 8 + 2);
696 break;
697 case AR8316:
698 /* standard atheros magic */
699 priv->write(priv, 0x38, 0xc000050e);
700
701 /* enable cpu port to receive multicast and broadcast frames */
702 priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
703
704 /* fall through */
705 case AR8236:
706 /* enable jumbo frames */
707 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
708 AR8316_GCTRL_MTU, 9018 + 8 + 2);
709 break;
710 }
711 }
712
713 static void
714 ar8216_init_port(struct ar8216_priv *priv, int port)
715 {
716 /* Enable port learning and tx */
717 priv->write(priv, AR8216_REG_PORT_CTRL(port),
718 AR8216_PORT_CTRL_LEARN |
719 (4 << AR8216_PORT_CTRL_STATE_S));
720
721 priv->write(priv, AR8216_REG_PORT_VLAN(port), 0);
722
723 if (port == AR8216_PORT_CPU) {
724 priv->write(priv, AR8216_REG_PORT_STATUS(port),
725 AR8216_PORT_STATUS_LINK_UP |
726 ((priv->chip == AR8316) ?
727 AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
728 AR8216_PORT_STATUS_TXMAC |
729 AR8216_PORT_STATUS_RXMAC |
730 ((priv->chip == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
731 ((priv->chip == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
732 AR8216_PORT_STATUS_DUPLEX);
733 } else {
734 priv->write(priv, AR8216_REG_PORT_STATUS(port),
735 AR8216_PORT_STATUS_LINK_AUTO);
736 }
737 }
738
739 static int
740 ar8216_reset_switch(struct switch_dev *dev)
741 {
742 struct ar8216_priv *priv = to_ar8216(dev);
743 int i;
744
745 mutex_lock(&priv->reg_mutex);
746 memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
747 offsetof(struct ar8216_priv, vlan));
748
749 for (i = 0; i < AR8X16_MAX_VLANS; i++)
750 priv->vlan_id[i] = i;
751
752 /* Configure all ports */
753 for (i = 0; i < AR8216_NUM_PORTS; i++)
754 ar8216_init_port(priv, i);
755
756 ar8216_init_globals(priv);
757 mutex_unlock(&priv->reg_mutex);
758
759 return ar8216_hw_apply(dev);
760 }
761
762 static const struct switch_dev_ops ar8216_sw_ops = {
763 .attr_global = {
764 .attr = ar8216_globals,
765 .n_attr = ARRAY_SIZE(ar8216_globals),
766 },
767 .attr_port = {
768 .attr = ar8216_port,
769 .n_attr = ARRAY_SIZE(ar8216_port),
770 },
771 .attr_vlan = {
772 .attr = ar8216_vlan,
773 .n_attr = ARRAY_SIZE(ar8216_vlan),
774 },
775 .get_port_pvid = ar8216_get_pvid,
776 .set_port_pvid = ar8216_set_pvid,
777 .get_vlan_ports = ar8216_get_ports,
778 .set_vlan_ports = ar8216_set_ports,
779 .apply_config = ar8216_hw_apply,
780 .reset_switch = ar8216_reset_switch,
781 .get_port_link = ar8216_get_port_link,
782 };
783
784 static int
785 ar8216_id_chip(struct ar8216_priv *priv)
786 {
787 u32 val;
788 u16 id;
789 int i;
790
791 priv->chip = UNKNOWN;
792
793 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
794 if (val == ~0)
795 return -ENODEV;
796
797 id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
798 for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
799 u16 t;
800
801 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
802 if (val == ~0)
803 return -ENODEV;
804
805 t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
806 if (t != id)
807 return -ENODEV;
808 }
809
810 switch (id) {
811 case 0x0101:
812 priv->chip = AR8216;
813 break;
814 case 0x0301:
815 priv->chip = AR8236;
816 break;
817 case 0x1000:
818 case 0x1001:
819 priv->chip = AR8316;
820 break;
821 default:
822 printk(KERN_DEBUG
823 "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
824 (int)(id >> AR8216_CTRL_VERSION_S),
825 (int)(id & AR8216_CTRL_REVISION),
826 mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
827 mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
828
829 return -ENODEV;
830 }
831
832 return 0;
833 }
834
835 static int
836 ar8216_config_init(struct phy_device *pdev)
837 {
838 struct ar8216_priv *priv = pdev->priv;
839 struct net_device *dev = pdev->attached_dev;
840 struct switch_dev *swdev;
841 int ret;
842
843 if (!priv) {
844 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
845 if (priv == NULL)
846 return -ENOMEM;
847 }
848
849 priv->phy = pdev;
850
851 ret = ar8216_id_chip(priv);
852 if (ret)
853 goto err_free_priv;
854
855 if (pdev->addr != 0) {
856 if (priv->chip == AR8316) {
857 pdev->supported |= SUPPORTED_1000baseT_Full;
858 pdev->advertising |= ADVERTISED_1000baseT_Full;
859
860 /* check if we're attaching to the switch twice */
861 pdev = pdev->bus->phy_map[0];
862 if (!pdev) {
863 kfree(priv);
864 return 0;
865 }
866
867 /* switch device has not been initialized, reuse priv */
868 if (!pdev->priv) {
869 priv->port4_phy = true;
870 pdev->priv = priv;
871 return 0;
872 }
873
874 kfree(priv);
875
876 /* switch device has been initialized, reinit */
877 priv = pdev->priv;
878 priv->dev.ports = (AR8216_NUM_PORTS - 1);
879 priv->initialized = false;
880 priv->port4_phy = true;
881 ar8316_hw_init(priv);
882 return 0;
883 }
884
885 kfree(priv);
886 return 0;
887 }
888
889 printk(KERN_INFO "%s: AR%d switch driver attached.\n",
890 pdev->attached_dev->name, priv->chip);
891
892 pdev->supported = priv->chip == AR8316 ?
893 SUPPORTED_1000baseT_Full : SUPPORTED_100baseT_Full;
894 pdev->advertising = pdev->supported;
895
896 mutex_init(&priv->reg_mutex);
897 priv->read = ar8216_mii_read;
898 priv->write = ar8216_mii_write;
899
900 pdev->priv = priv;
901
902 swdev = &priv->dev;
903 swdev->cpu_port = AR8216_PORT_CPU;
904 swdev->ops = &ar8216_sw_ops;
905 swdev->ports = AR8216_NUM_PORTS;
906
907 if (priv->chip == AR8316) {
908 swdev->name = "Atheros AR8316";
909 swdev->vlans = AR8X16_MAX_VLANS;
910
911 if (priv->port4_phy) {
912 /* port 5 connected to the other mac, therefore unusable */
913 swdev->ports = (AR8216_NUM_PORTS - 1);
914 }
915 } else if (priv->chip == AR8236) {
916 swdev->name = "Atheros AR8236";
917 swdev->vlans = AR8216_NUM_VLANS;
918 swdev->ports = AR8216_NUM_PORTS;
919 } else {
920 swdev->name = "Atheros AR8216";
921 swdev->vlans = AR8216_NUM_VLANS;
922 }
923
924 ret = register_switch(&priv->dev, pdev->attached_dev);
925 if (ret)
926 goto err_free_priv;
927
928 priv->init = true;
929
930 ret = 0;
931 if (priv->chip == AR8216)
932 ret = ar8216_hw_init(priv);
933 else if (priv->chip == AR8236)
934 ret = ar8236_hw_init(priv);
935 else if (priv->chip == AR8316)
936 ret = ar8316_hw_init(priv);
937
938 if (ret)
939 goto err_free_priv;
940
941 ret = ar8216_reset_switch(&priv->dev);
942 if (ret)
943 goto err_free_priv;
944
945 dev->phy_ptr = priv;
946
947 /* VID fixup only needed on ar8216 */
948 if (pdev->addr == 0 && priv->chip == AR8216) {
949 pdev->pkt_align = 2;
950 pdev->netif_receive_skb = ar8216_netif_receive_skb;
951 pdev->netif_rx = ar8216_netif_rx;
952 priv->ndo_old = dev->netdev_ops;
953 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
954 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
955 dev->netdev_ops = &priv->ndo;
956 }
957
958 priv->init = false;
959
960 return 0;
961
962 err_free_priv:
963 kfree(priv);
964 return ret;
965 }
966
967 static int
968 ar8216_read_status(struct phy_device *phydev)
969 {
970 struct ar8216_priv *priv = phydev->priv;
971 struct switch_port_link link;
972 int ret;
973
974 if (phydev->addr != 0)
975 return genphy_read_status(phydev);
976
977 ar8216_read_port_link(priv, phydev->addr, &link);
978 phydev->link = !!link.link;
979 if (!phydev->link)
980 return 0;
981
982 switch (link.speed) {
983 case SWITCH_PORT_SPEED_10:
984 phydev->speed = SPEED_10;
985 break;
986 case SWITCH_PORT_SPEED_100:
987 phydev->speed = SPEED_100;
988 break;
989 case SWITCH_PORT_SPEED_1000:
990 phydev->speed = SPEED_1000;
991 break;
992 default:
993 phydev->speed = 0;
994 }
995 phydev->duplex = link.duplex ? DUPLEX_FULL : DUPLEX_HALF;
996
997 /* flush the address translation unit */
998 mutex_lock(&priv->reg_mutex);
999 ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
1000 if (!ret)
1001 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
1002 mutex_unlock(&priv->reg_mutex);
1003
1004 phydev->state = PHY_RUNNING;
1005 netif_carrier_on(phydev->attached_dev);
1006 phydev->adjust_link(phydev->attached_dev);
1007
1008 return ret;
1009 }
1010
1011 static int
1012 ar8216_config_aneg(struct phy_device *phydev)
1013 {
1014 if (phydev->addr == 0)
1015 return 0;
1016
1017 return genphy_config_aneg(phydev);
1018 }
1019
1020 static int
1021 ar8216_probe(struct phy_device *pdev)
1022 {
1023 struct ar8216_priv priv;
1024
1025 priv.phy = pdev;
1026 return ar8216_id_chip(&priv);
1027 }
1028
1029 static void
1030 ar8216_remove(struct phy_device *pdev)
1031 {
1032 struct ar8216_priv *priv = pdev->priv;
1033 struct net_device *dev = pdev->attached_dev;
1034
1035 if (!priv)
1036 return;
1037
1038 if (priv->ndo_old && dev)
1039 dev->netdev_ops = priv->ndo_old;
1040 if (pdev->addr == 0)
1041 unregister_switch(&priv->dev);
1042 kfree(priv);
1043 }
1044
1045 static struct phy_driver ar8216_driver = {
1046 .phy_id = 0x004d0000,
1047 .name = "Atheros AR8216/AR8236/AR8316",
1048 .phy_id_mask = 0xffff0000,
1049 .features = PHY_BASIC_FEATURES,
1050 .probe = ar8216_probe,
1051 .remove = ar8216_remove,
1052 .config_init = &ar8216_config_init,
1053 .config_aneg = &ar8216_config_aneg,
1054 .read_status = &ar8216_read_status,
1055 .driver = { .owner = THIS_MODULE },
1056 };
1057
1058 int __init
1059 ar8216_init(void)
1060 {
1061 return phy_driver_register(&ar8216_driver);
1062 }
1063
1064 void __exit
1065 ar8216_exit(void)
1066 {
1067 phy_driver_unregister(&ar8216_driver);
1068 }
1069
1070 module_init(ar8216_init);
1071 module_exit(ar8216_exit);
1072 MODULE_LICENSE("GPL");
1073