lantiq: dts: drop superfluous address and size cells
[openwrt/staging/mkresin.git] / target / linux / lantiq / files / arch / mips / boot / dts / FRITZ7412.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3
4 #include "vr9.dtsi"
5
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
8
9 / {
10 compatible = "avm,fritz7412", "lantiq,xway", "lantiq,vr9";
11 model = "AVM FRITZ!Box 7412";
12
13 chosen {
14 bootargs = "console=ttyLTQ0,115200 mem=126M vpe1_load_addr=0x87e00000 vpe1_mem=2M maxvpes=1 maxtcs=1 nosmp";
15 };
16
17 aliases {
18 led-boot = &power_green;
19 led-failsafe = &power_red;
20 led-running = &power_green;
21
22 led-dsl = &info;
23 led-wifi = &wifi;
24 };
25
26 memory@0 {
27 device_type = "memory";
28 reg = <0x0 0x8000000>;
29 };
30
31 keys {
32 compatible = "gpio-keys-polled";
33 poll-interval = <100>;
34
35 wps {
36 label = "wps";
37 gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
38 linux,code = <KEY_WPS_BUTTON>;
39 };
40
41 dect {
42 label = "dect";
43 gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
44 linux,code = <KEY_PHONE>;
45 };
46 };
47
48 leds {
49 compatible = "gpio-leds";
50
51 power_green: power_green {
52 label = "fritz7412:green:power";
53 gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
54 default-state = "keep";
55 };
56
57 power_red: power_red {
58 label = "fritz7412:red:power";
59 gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
60 };
61
62 fon {
63 label = "fritz7412:green:fon";
64 gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
65 };
66
67 dect {
68 label = "fritz7412:green:dect";
69 gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
70 };
71
72 wifi: wifi {
73 label = "fritz7412:green:wifi";
74 gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
75 };
76
77 info: info {
78 label = "fritz7412:green:info";
79 gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
80 };
81 };
82 };
83
84 &localbus {
85 nand@0 {
86 compatible = "lantiq,nand-xway";
87 bank-width = <2>;
88 reg = <0 0x0 0x2000000>;
89 lantiq,cs = <1>;
90
91 partitions {
92 compatible = "fixed-partitions";
93 #address-cells = <1>;
94 #size-cells = <1>;
95
96 partition@0 {
97 label = "urlader";
98 reg = <0x0 0x40000>;
99 read-only;
100 };
101
102 partition@40000 {
103 label = "nand-tffs";
104 reg = <0x40000 0x400000>;
105 read-only;
106 };
107
108 partition@440000 {
109 label = "kernel";
110 reg = <0x440000 0x400000>;
111 };
112
113 partition@840000 {
114 label = "ubi";
115 reg = <0x840000 0x3000000>;
116 };
117
118 partition@3840000 {
119 label = "reserved-kernel";
120 reg = <0x3840000 0x400000>;
121 read-only;
122 };
123
124 partition@3c40000 {
125 label = "reserved-filesystem";
126 reg = <0x3c40000 0x3000000>;
127 read-only;
128 };
129
130 partition@6c40000 {
131 label = "config";
132 reg = <0x6c40000 0x400000>;
133 read-only;
134 };
135
136 partition@6e40000 {
137 label = "nand-filesystem";
138 reg = <0x6e40000 0x400000>;
139 read-only;
140 };
141 };
142 };
143 };
144
145 &pcie0 {
146 status = "okay";
147 gpio-reset = <&gpio 11 GPIO_ACTIVE_HIGH>;
148
149 pcie@0 {
150 reg = <0 0 0 0 0>;
151 #interrupt-cells = <1>;
152 #size-cells = <2>;
153 #address-cells = <3>;
154 device_type = "pci";
155
156 wifi@168c,002e {
157 compatible = "pci168c,002e";
158 reg = <0 0 0 0 0>;
159 qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
160 };
161 };
162 };
163
164 &gpio {
165 pinctrl-names = "default";
166 pinctrl-0 = <&state_default>;
167
168 state_default: pinmux {
169 mdio {
170 lantiq,groups = "mdio";
171 lantiq,function = "mdio";
172 };
173 pcie-rst {
174 lantiq,pins = "io11";
175 lantiq,open-drain = <1>;
176 lantiq,output = <1>;
177 };
178 nand-mux {
179 lantiq,groups = "nand cle", "nand ale",
180 "nand rd", "nand cs1",
181 "nand rdy";
182 lantiq,function = "ebu";
183 };
184 nand-pins {
185 lantiq,pins = "io13", "io24", "io49";
186 lantiq,pull = <1>;
187 };
188 };
189 };
190
191 &gphy0 {
192 lantiq,gphy-mode = <GPHY_MODE_FE>;
193 };
194
195 &eth0 {
196 lantiq,phys = <&gphy0>;
197
198 interface@0 {
199 compatible = "lantiq,xrx200-pdi";
200 #address-cells = <1>;
201 #size-cells = <0>;
202 reg = <0>;
203 mac-address = [ 00 11 22 33 44 55 ];
204 lantiq,switch;
205
206 ethernet@2 {
207 compatible = "lantiq,xrx200-pdi-port";
208 reg = <2>;
209 phy-mode = "gmii";
210 phy-handle = <&phy11>;
211 };
212 };
213
214 mdio {
215 #address-cells = <1>;
216 #size-cells = <0>;
217 compatible = "lantiq,xrx200-mdio";
218
219 phy11: ethernet-phy@11 {
220 reg = <0x11>;
221 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
222 };
223 };
224 };
225
226 &vmmc {
227 status = "okay";
228 };