40b8667ca3386c84394fb9fbd25e702e9ae67dbd
[openwrt/staging/mkresin.git] / target / linux / lantiq / patches-3.2 / 0014-MIPS-lantiq-fix-pull-gpio-up-resistors-usage.patch
1 From e97f45d255f4a223d38e2f39c1ddf7a3e0766527 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Thu, 27 Oct 2011 20:06:30 +0200
4 Subject: [PATCH 14/70] MIPS: lantiq: fix pull gpio up resistors usage
5
6 The register that enables a gpios internal pullups was not used. This patch
7 makes sure the pullups are activated correctly.
8
9 Signed-off-by: Matti Laakso <malaakso@elisanet.fi>
10 Signed-off-by: John Crispin <blogic@openwrt.org>
11 ---
12 arch/mips/lantiq/xway/gpio.c | 6 ++++++
13 1 files changed, 6 insertions(+), 0 deletions(-)
14
15 diff --git a/arch/mips/lantiq/xway/gpio.c b/arch/mips/lantiq/xway/gpio.c
16 index f204f6c..14ff7c7 100644
17 --- a/arch/mips/lantiq/xway/gpio.c
18 +++ b/arch/mips/lantiq/xway/gpio.c
19 @@ -21,6 +21,8 @@
20 #define LTQ_GPIO_ALTSEL0 0x0C
21 #define LTQ_GPIO_ALTSEL1 0x10
22 #define LTQ_GPIO_OD 0x14
23 +#define LTQ_GPIO_PUDSEL 0x1C
24 +#define LTQ_GPIO_PUDEN 0x20
25
26 #define PINS_PER_PORT 16
27 #define MAX_PORTS 3
28 @@ -106,6 +108,8 @@ static int ltq_gpio_direction_input(struct gpio_chip *chip, unsigned int offset)
29
30 ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_OD, offset);
31 ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_DIR, offset);
32 + ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_PUDSEL, offset);
33 + ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_PUDEN, offset);
34
35 return 0;
36 }
37 @@ -117,6 +121,8 @@ static int ltq_gpio_direction_output(struct gpio_chip *chip,
38
39 ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_OD, offset);
40 ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_DIR, offset);
41 + ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_PUDSEL, offset);
42 + ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_PUDEN, offset);
43 ltq_gpio_set(chip, offset, value);
44
45 return 0;
46 --
47 1.7.7.1
48