lantiq: Add support for loading athxk eeproms through mtd
[openwrt/staging/mkresin.git] / target / linux / lantiq / patches-3.8 / 0037-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch
1 From 0c9b05716ac0e597ae0f81a96ff68e54716decc9 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Wed, 13 Mar 2013 10:02:58 +0100
4 Subject: [PATCH 37/40] owrt: lantiq: wifi and ethernet eeprom handling
5
6 ---
7 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h | 6 +
8 .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 3 +
9 arch/mips/lantiq/xway/Makefile | 3 +
10 arch/mips/lantiq/xway/ath_eep.c | 206 ++++++++++++++++++++
11 arch/mips/lantiq/xway/eth_mac.c | 76 ++++++++
12 arch/mips/lantiq/xway/pci-ath-fixup.c | 109 +++++++++++
13 arch/mips/lantiq/xway/rt_eep.c | 60 ++++++
14 drivers/net/ethernet/lantiq_etop.c | 10 +-
15 8 files changed, 469 insertions(+), 4 deletions(-)
16 create mode 100644 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
17 create mode 100644 arch/mips/lantiq/xway/ath_eep.c
18 create mode 100644 arch/mips/lantiq/xway/eth_mac.c
19 create mode 100644 arch/mips/lantiq/xway/pci-ath-fixup.c
20 create mode 100644 arch/mips/lantiq/xway/rt_eep.c
21
22 --- /dev/null
23 +++ b/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
24 @@ -0,0 +1,6 @@
25 +#ifndef _PCI_ATH_FIXUP
26 +#define _PCI_ATH_FIXUP
27 +
28 +void ltq_pci_ath_fixup(unsigned slot, u16 *cal_data) __init;
29 +
30 +#endif /* _PCI_ATH_FIXUP */
31 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
32 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
33 @@ -90,5 +90,8 @@ int xrx200_gphy_boot(struct device *dev,
34 extern void ltq_pmu_enable(unsigned int module);
35 extern void ltq_pmu_disable(unsigned int module);
36
37 +/* allow the ethernet driver to load a flash mapped mac addr */
38 +const u8* ltq_get_eth_mac(void);
39 +
40 #endif /* CONFIG_SOC_TYPE_XWAY */
41 #endif /* _LTQ_XWAY_H__ */
42 --- a/arch/mips/lantiq/xway/Makefile
43 +++ b/arch/mips/lantiq/xway/Makefile
44 @@ -1,3 +1,6 @@
45 obj-y := prom.o sysctrl.o clk.o reset.o dma.o gptu.o dcdc.o
46
47 +obj-y += eth_mac.o
48 +obj-$(CONFIG_PCI) += ath_eep.o rt_eep.o pci-ath-fixup.o
49 +
50 obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
51 --- /dev/null
52 +++ b/arch/mips/lantiq/xway/ath_eep.c
53 @@ -0,0 +1,248 @@
54 +/*
55 + * Copyright (C) 2011 Luca Olivetti <luca@ventoso.org>
56 + * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
57 + * Copyright (C) 2011 Andrej Vlašić <andrej.vlasic0@gmail.com>
58 + * Copyright (C) 2013 Álvaro Fernández Rojas <noltari@gmail.com>
59 + * Copyright (C) 2013 Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
60 + *
61 + * This program is free software; you can redistribute it and/or modify it
62 + * under the terms of the GNU General Public License version 2 as published
63 + * by the Free Software Foundation.
64 + */
65 +
66 +#include <linux/init.h>
67 +#include <linux/module.h>
68 +#include <linux/platform_device.h>
69 +#include <linux/etherdevice.h>
70 +#include <linux/ath5k_platform.h>
71 +#include <linux/ath9k_platform.h>
72 +#include <linux/pci.h>
73 +#include <linux/err.h>
74 +#include <linux/mtd/mtd.h>
75 +#include <pci-ath-fixup.h>
76 +#include <lantiq_soc.h>
77 +
78 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
79 +struct ath5k_platform_data ath5k_pdata;
80 +struct ath9k_platform_data ath9k_pdata = {
81 + .led_pin = -1,
82 +};
83 +static u8 athxk_eeprom_mac[6];
84 +
85 +static int ath9k_pci_plat_dev_init(struct pci_dev *dev)
86 +{
87 + dev->dev.platform_data = &ath9k_pdata;
88 + return 0;
89 +}
90 +
91 +int __init of_ath9k_eeprom_probe(struct platform_device *pdev)
92 +{
93 + struct device_node *np = pdev->dev.of_node, *mtd_np;
94 + struct resource *eep_res, *mac_res = NULL;
95 + void __iomem *eep, *mac;
96 + int mac_offset;
97 + u32 mac_inc = 0, pci_slot = 0;
98 + int i;
99 + struct mtd_info *the_mtd;
100 + size_t flash_readlen;
101 + const __be32 *list;
102 + const char *part;
103 + phandle phandle;
104 +
105 + if ((list = of_get_property(np, "ath,eep-flash", &i)) && i == 2 *
106 + sizeof(*list) && (phandle = be32_to_cpup(list++)) &&
107 + (mtd_np = of_find_node_by_phandle(phandle)) && ((part =
108 + of_get_property(mtd_np, "label", NULL)) || (part =
109 + mtd_np->name)) && (the_mtd = get_mtd_device_nm(part))
110 + != ERR_PTR(-ENODEV)) {
111 + i = mtd_read(the_mtd, be32_to_cpup(list),
112 + ATH9K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
113 + (void *) ath9k_pdata.eeprom_data);
114 + put_mtd_device(the_mtd);
115 + if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
116 + dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
117 + return -ENODEV;
118 + }
119 + } else {
120 + eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
121 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
122 +
123 + if (!eep_res) {
124 + dev_err(&pdev->dev, "failed to load eeprom address\n");
125 + return -ENODEV;
126 + }
127 + if (resource_size(eep_res) != ATH9K_PLAT_EEP_MAX_WORDS << 1) {
128 + dev_err(&pdev->dev, "eeprom has an invalid size\n");
129 + return -EINVAL;
130 + }
131 +
132 + eep = ioremap(eep_res->start, resource_size(eep_res));
133 + memcpy_fromio(ath9k_pdata.eeprom_data, eep,
134 + ATH9K_PLAT_EEP_MAX_WORDS << 1);
135 + }
136 +
137 + if (of_find_property(np, "ath,eep-swap", NULL))
138 + for (i = 0; i < ATH9K_PLAT_EEP_MAX_WORDS; i++)
139 + ath9k_pdata.eeprom_data[i] = swab16(ath9k_pdata.eeprom_data[i]);
140 +
141 + if (of_find_property(np, "ath,eep-endian", NULL)) {
142 + ath9k_pdata.endian_check = true;
143 +
144 + dev_info(&pdev->dev, "endian check enabled.\n");
145 + }
146 +
147 + if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
148 + memcpy_fromio(athxk_eeprom_mac, (void*) ath9k_pdata.eeprom_data + mac_offset, 6);
149 + } else if (mac_res) {
150 + if (resource_size(mac_res) != 6) {
151 + dev_err(&pdev->dev, "mac has an invalid size\n");
152 + return -EINVAL;
153 + }
154 + mac = ioremap(mac_res->start, resource_size(mac_res));
155 + memcpy_fromio(athxk_eeprom_mac, mac, 6);
156 + } else if (ltq_get_eth_mac())
157 + memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
158 + else {
159 + dev_warn(&pdev->dev, "using random mac\n");
160 + random_ether_addr(athxk_eeprom_mac);
161 + }
162 +
163 + if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
164 + athxk_eeprom_mac[5] += mac_inc;
165 +
166 + ath9k_pdata.macaddr = athxk_eeprom_mac;
167 + ltq_pci_plat_dev_init = ath9k_pci_plat_dev_init;
168 +
169 + if (!of_property_read_u32(np, "ath,pci-slot", &pci_slot)) {
170 + ltq_pci_ath_fixup(pci_slot, ath9k_pdata.eeprom_data);
171 +
172 + dev_info(&pdev->dev, "pci slot: %u\n", pci_slot);
173 + }
174 +
175 + dev_info(&pdev->dev, "loaded ath9k eeprom\n");
176 +
177 + return 0;
178 +}
179 +
180 +static struct of_device_id ath9k_eeprom_ids[] = {
181 + { .compatible = "ath9k,eeprom" },
182 + { }
183 +};
184 +
185 +static struct platform_driver ath9k_eeprom_driver = {
186 + .driver = {
187 + .name = "ath9k,eeprom",
188 + .owner = THIS_MODULE,
189 + .of_match_table = of_match_ptr(ath9k_eeprom_ids),
190 + },
191 +};
192 +
193 +static int __init of_ath9k_eeprom_init(void)
194 +{
195 + return platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
196 +}
197 +late_initcall(of_ath9k_eeprom_init);
198 +
199 +
200 +static int ath5k_pci_plat_dev_init(struct pci_dev *dev)
201 +{
202 + dev->dev.platform_data = &ath5k_pdata;
203 + return 0;
204 +}
205 +
206 +int __init of_ath5k_eeprom_probe(struct platform_device *pdev)
207 +{
208 + struct device_node *np = pdev->dev.of_node, *mtd_np;
209 + struct resource *eep_res, *mac_res = NULL;
210 + void __iomem *eep, *mac;
211 + int mac_offset;
212 + u32 mac_inc = 0;
213 + int i;
214 + struct mtd_info *the_mtd;
215 + size_t flash_readlen;
216 + const __be32 *list;
217 + const char *part;
218 + phandle phandle;
219 +
220 + if ((list = of_get_property(np, "ath,eep-flash", &i)) && i == 2 *
221 + sizeof(*list) && (phandle = be32_to_cpup(list++)) &&
222 + (mtd_np = of_find_node_by_phandle(phandle)) && ((part =
223 + of_get_property(mtd_np, "label", NULL)) || (part =
224 + mtd_np->name)) && (the_mtd = get_mtd_device_nm(part))
225 + != ERR_PTR(-ENODEV)) {
226 + i = mtd_read(the_mtd, be32_to_cpup(list),
227 + ATH5K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
228 + (void *) ath5k_pdata.eeprom_data);
229 + put_mtd_device(the_mtd);
230 + if ((sizeof(ATH5K_PLAT_EEP_MAX_WORDS << 1) != flash_readlen)
231 + || i) {
232 + dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
233 + return -ENODEV;
234 + }
235 + } else {
236 + eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
237 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
238 +
239 + if (!eep_res) {
240 + dev_err(&pdev->dev, "failed to load eeprom address\n");
241 + return -ENODEV;
242 + }
243 + if (resource_size(eep_res) != ATH5K_PLAT_EEP_MAX_WORDS << 1) {
244 + dev_err(&pdev->dev, "eeprom has an invalid size\n");
245 + return -EINVAL;
246 + }
247 +
248 + eep = ioremap(eep_res->start, resource_size(eep_res));
249 + memcpy_fromio(ath5k_pdata.eeprom_data, eep,
250 + ATH5K_PLAT_EEP_MAX_WORDS << 1);
251 + }
252 +
253 + if (of_find_property(np, "ath,eep-swap", NULL))
254 + for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS; i++)
255 + ath5k_pdata.eeprom_data[i] = swab16(ath5k_pdata.eeprom_data[i]);
256 +
257 + if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
258 + memcpy_fromio(athxk_eeprom_mac, (void*) ath5k_pdata.eeprom_data + mac_offset, 6);
259 + } else if (mac_res) {
260 + if (resource_size(mac_res) != 6) {
261 + dev_err(&pdev->dev, "mac has an invalid size\n");
262 + return -EINVAL;
263 + }
264 + mac = ioremap(mac_res->start, resource_size(mac_res));
265 + memcpy_fromio(athxk_eeprom_mac, mac, 6);
266 + } else if (ltq_get_eth_mac())
267 + memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
268 + else {
269 + dev_warn(&pdev->dev, "using random mac\n");
270 + random_ether_addr(athxk_eeprom_mac);
271 + }
272 +
273 + if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
274 + athxk_eeprom_mac[5] += mac_inc;
275 +
276 + ath5k_pdata.macaddr = athxk_eeprom_mac;
277 + ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init;
278 +
279 + dev_info(&pdev->dev, "loaded ath5k eeprom\n");
280 +
281 + return 0;
282 +}
283 +
284 +static struct of_device_id ath5k_eeprom_ids[] = {
285 + { .compatible = "ath5k,eeprom" },
286 + { }
287 +};
288 +
289 +static struct platform_driver ath5k_eeprom_driver = {
290 + .driver = {
291 + .name = "ath5k,eeprom",
292 + .owner = THIS_MODULE,
293 + .of_match_table = of_match_ptr(ath5k_eeprom_ids),
294 + },
295 +};
296 +
297 +static int __init of_ath5k_eeprom_init(void)
298 +{
299 + return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
300 +}
301 +late_initcall(of_ath5k_eeprom_init);
302 --- /dev/null
303 +++ b/arch/mips/lantiq/xway/eth_mac.c
304 @@ -0,0 +1,76 @@
305 +/*
306 + * Copyright (C) 2012 John Crispin <blogic@openwrt.org>
307 + *
308 + * This program is free software; you can redistribute it and/or modify it
309 + * under the terms of the GNU General Public License version 2 as published
310 + * by the Free Software Foundation.
311 + */
312 +
313 +#include <linux/init.h>
314 +#include <linux/module.h>
315 +#include <linux/of_platform.h>
316 +#include <linux/if_ether.h>
317 +
318 +static u8 eth_mac[6];
319 +static int eth_mac_set;
320 +
321 +const u8* ltq_get_eth_mac(void)
322 +{
323 + return eth_mac;
324 +}
325 +
326 +static int __init setup_ethaddr(char *str)
327 +{
328 + eth_mac_set = mac_pton(str, eth_mac);
329 + return !eth_mac_set;
330 +}
331 +__setup("ethaddr=", setup_ethaddr);
332 +
333 +int __init of_eth_mac_probe(struct platform_device *pdev)
334 +{
335 + struct device_node *np = pdev->dev.of_node;
336 + struct resource *mac_res;
337 + void __iomem *mac;
338 + u32 mac_inc = 0;
339 +
340 + if (eth_mac_set) {
341 + dev_err(&pdev->dev, "mac was already set by bootloader\n");
342 + return -EINVAL;
343 + }
344 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
345 +
346 + if (!mac_res) {
347 + dev_err(&pdev->dev, "failed to load mac\n");
348 + return -EINVAL;
349 + }
350 + if (resource_size(mac_res) != 6) {
351 + dev_err(&pdev->dev, "mac has an invalid size\n");
352 + return -EINVAL;
353 + }
354 + mac = ioremap(mac_res->start, resource_size(mac_res));
355 + memcpy_fromio(eth_mac, mac, 6);
356 +
357 + if (!of_property_read_u32(np, "mac-increment", &mac_inc))
358 + eth_mac[5] += mac_inc;
359 +
360 + return 0;
361 +}
362 +
363 +static struct of_device_id eth_mac_ids[] = {
364 + { .compatible = "lantiq,eth-mac" },
365 + { /* sentinel */ }
366 +};
367 +
368 +static struct platform_driver eth_mac_driver = {
369 + .driver = {
370 + .name = "lantiq,eth-mac",
371 + .owner = THIS_MODULE,
372 + .of_match_table = of_match_ptr(eth_mac_ids),
373 + },
374 +};
375 +
376 +static int __init of_eth_mac_init(void)
377 +{
378 + return platform_driver_probe(&eth_mac_driver, of_eth_mac_probe);
379 +}
380 +device_initcall(of_eth_mac_init);
381 --- /dev/null
382 +++ b/arch/mips/lantiq/xway/pci-ath-fixup.c
383 @@ -0,0 +1,109 @@
384 +/*
385 + * Atheros AP94 reference board PCI initialization
386 + *
387 + * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
388 + *
389 + * This program is free software; you can redistribute it and/or modify it
390 + * under the terms of the GNU General Public License version 2 as published
391 + * by the Free Software Foundation.
392 + */
393 +
394 +#include <linux/pci.h>
395 +#include <linux/init.h>
396 +#include <linux/delay.h>
397 +#include <lantiq_soc.h>
398 +
399 +#define LTQ_PCI_MEM_BASE 0x18000000
400 +
401 +struct ath_fixup {
402 + u16 *cal_data;
403 + unsigned slot;
404 +};
405 +
406 +static int ath_num_fixups;
407 +static struct ath_fixup ath_fixups[2];
408 +
409 +static void ath_pci_fixup(struct pci_dev *dev)
410 +{
411 + void __iomem *mem;
412 + u16 *cal_data = NULL;
413 + u16 cmd;
414 + u32 bar0;
415 + u32 val;
416 + unsigned i;
417 +
418 + for (i = 0; i < ath_num_fixups; i++) {
419 + if (ath_fixups[i].cal_data == NULL)
420 + continue;
421 +
422 + if (ath_fixups[i].slot != PCI_SLOT(dev->devfn))
423 + continue;
424 +
425 + cal_data = ath_fixups[i].cal_data;
426 + break;
427 + }
428 +
429 + if (cal_data == NULL)
430 + return;
431 +
432 + if (*cal_data != 0xa55a) {
433 + pr_err("pci %s: invalid calibration data\n", pci_name(dev));
434 + return;
435 + }
436 +
437 + pr_info("pci %s: fixup device configuration\n", pci_name(dev));
438 +
439 + mem = ioremap(LTQ_PCI_MEM_BASE, 0x10000);
440 + if (!mem) {
441 + pr_err("pci %s: ioremap error\n", pci_name(dev));
442 + return;
443 + }
444 +
445 + pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
446 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, LTQ_PCI_MEM_BASE);
447 + pci_read_config_word(dev, PCI_COMMAND, &cmd);
448 + cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
449 + pci_write_config_word(dev, PCI_COMMAND, cmd);
450 +
451 + /* set pointer to first reg address */
452 + cal_data += 3;
453 + while (*cal_data != 0xffff) {
454 + u32 reg;
455 + reg = *cal_data++;
456 + val = *cal_data++;
457 + val |= (*cal_data++) << 16;
458 +
459 + ltq_w32(swab32(val), mem + reg);
460 + udelay(100);
461 + }
462 +
463 + pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
464 + dev->vendor = val & 0xffff;
465 + dev->device = (val >> 16) & 0xffff;
466 +
467 + pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
468 + dev->revision = val & 0xff;
469 + dev->class = val >> 8; /* upper 3 bytes */
470 +
471 + pr_info("pci %s: fixup info: [%04x:%04x] revision %02x class %#08x\n",
472 + pci_name(dev), dev->vendor, dev->device, dev->revision, dev->class);
473 +
474 + pci_read_config_word(dev, PCI_COMMAND, &cmd);
475 + cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
476 + pci_write_config_word(dev, PCI_COMMAND, cmd);
477 +
478 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
479 +
480 + iounmap(mem);
481 +}
482 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath_pci_fixup);
483 +
484 +void __init ltq_pci_ath_fixup(unsigned slot, u16 *cal_data)
485 +{
486 + if (ath_num_fixups >= ARRAY_SIZE(ath_fixups))
487 + return;
488 +
489 + ath_fixups[ath_num_fixups].slot = slot;
490 + ath_fixups[ath_num_fixups].cal_data = cal_data;
491 + ath_num_fixups++;
492 +}
493 --- /dev/null
494 +++ b/arch/mips/lantiq/xway/rt_eep.c
495 @@ -0,0 +1,60 @@
496 +/*
497 + * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
498 + *
499 + * This program is free software; you can redistribute it and/or modify it
500 + * under the terms of the GNU General Public License version 2 as published
501 + * by the Free Software Foundation.
502 + */
503 +
504 +#include <linux/init.h>
505 +#include <linux/module.h>
506 +#include <linux/pci.h>
507 +#include <linux/platform_device.h>
508 +#include <linux/rt2x00_platform.h>
509 +
510 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
511 +static struct rt2x00_platform_data rt2x00_pdata;
512 +
513 +static int rt2x00_pci_plat_dev_init(struct pci_dev *dev)
514 +{
515 + dev->dev.platform_data = &rt2x00_pdata;
516 + return 0;
517 +}
518 +
519 +int __init of_ralink_eeprom_probe(struct platform_device *pdev)
520 +{
521 + struct device_node *np = pdev->dev.of_node;
522 + const char *eeprom;
523 +
524 + if (of_property_read_string(np, "ralink,eeprom", &eeprom)) {
525 + dev_err(&pdev->dev, "failed to load eeprom filename\n");
526 + return 0;
527 + }
528 +
529 + rt2x00_pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
530 +// rt2x00_pdata.mac_address = mac;
531 + ltq_pci_plat_dev_init = rt2x00_pci_plat_dev_init;
532 +
533 + dev_info(&pdev->dev, "using %s as eeprom\n", eeprom);
534 +
535 + return 0;
536 +}
537 +
538 +static struct of_device_id ralink_eeprom_ids[] = {
539 + { .compatible = "ralink,eeprom" },
540 + { }
541 +};
542 +
543 +static struct platform_driver ralink_eeprom_driver = {
544 + .driver = {
545 + .name = "ralink,eeprom",
546 + .owner = THIS_MODULE,
547 + .of_match_table = of_match_ptr(ralink_eeprom_ids),
548 + },
549 +};
550 +
551 +static int __init of_ralink_eeprom_init(void)
552 +{
553 + return platform_driver_probe(&ralink_eeprom_driver, of_ralink_eeprom_probe);
554 +}
555 +device_initcall(of_ralink_eeprom_init);
556 --- a/drivers/net/ethernet/lantiq_etop.c
557 +++ b/drivers/net/ethernet/lantiq_etop.c
558 @@ -826,7 +826,8 @@ ltq_etop_init(struct net_device *dev)
559
560 ltq_etop_change_mtu(dev, 1500);
561
562 - memcpy(&mac.sa_data, priv->mac, ETH_ALEN);
563 + if (priv->mac)
564 + memcpy(&mac.sa_data, priv->mac, ETH_ALEN);
565 if (!is_valid_ether_addr(mac.sa_data)) {
566 pr_warn("etop: invalid MAC, using random\n");
567 random_ether_addr(mac.sa_data);
568 @@ -885,8 +886,7 @@ static const struct net_device_ops ltq_e
569 .ndo_tx_timeout = ltq_etop_tx_timeout,
570 };
571
572 -static int __devinit
573 -ltq_etop_probe(struct platform_device *pdev)
574 +static int ltq_etop_probe(struct platform_device *pdev)
575 {
576 struct net_device *dev;
577 struct ltq_etop_priv *priv;
578 @@ -950,7 +950,9 @@ ltq_etop_probe(struct platform_device *p
579 priv->tx_irq = irqres[0].start;
580 priv->rx_irq = irqres[1].start;
581 priv->mii_mode = of_get_phy_mode(pdev->dev.of_node);
582 - priv->mac = of_get_mac_address(pdev->dev.of_node);
583 + priv->mac = ltq_get_eth_mac();
584 + if (!priv->mac)
585 + priv->mac = of_get_mac_address(pdev->dev.of_node);
586
587 priv->clk_ppe = clk_get(&pdev->dev, NULL);
588 if (IS_ERR(priv->clk_ppe))
589 --- a/arch/mips/pci/pci-lantiq.c
590 +++ b/arch/mips/pci/pci-lantiq.c
591 @@ -260,4 +260,4 @@ int __init pcibios_init(void)
592 return ret;
593 }
594
595 -arch_initcall(pcibios_init);
596 +late_initcall(pcibios_init);