target/linux/mcs814x/files-3.3/arch/arm/boot/dts/mcs8140.dtsi

   1 /*
   2  * mcs8140.dtsi - Device Tree Include file for Moschip MCS8140 family SoC
   3  *
   4  * Copyright (C) 2012, Florian Fainelli <florian@openwrt.org>
   5  *
   6  * Licensed under GPLv2.
   7  */
   8
   9 /include/ "skeleton.dtsi"
  10
  11 / {
  12         model = "Moschip MCS8140 family SoC";
  13         compatible = "moschip,mcs8140";
  14         interrupt-parent = <&intc>;
  15
  16         aliases {
  17                 serial0 = &uart0;
  18                 eth0 = &eth0;
  19         };
  20
  21         cpus {
  22                 cpu@0 {
  23                         compatible = "arm,arm926ejs";
  24                 };
  25         };
  26
  27         ahb {
  28                 compatible = "simple-bus";
  29                 #address-cells = <1>;
  30                 #size-cells = <1>;
  31                 ranges;
  32
  33                 vci {
  34                         compatible = "simple-bus";
  35                         #address-cells = <1>;
  36                         #size-cells = <1>;
  37                         ranges;
  38
  39                         eth0: ethernet@40084000 {
  40                                 #address-cells = <1>;
  41                                 #size-cells = <0>;
  42
  43                                 compatible = "moschip,nuport-mac";
  44                                 reg = <0x40084000 0xd8          // mac
  45                                         0x40080000 0x58>;       // dma channels
  46                                 interrupts = <4 5 29>;  /* tx, rx, link */
  47                                 nuport-mac,buffer-shifting;
  48                                 nuport-mac,link-activity = <0>;
  49                         };
  50
  51                         tso@40088000 {
  52                                 reg = <0x40088000 0x1c>;
  53                                 interrupts = <7>;
  54                         };
  55
  56                         i2s@4008c000 {
  57                                 compatible = "moschip,mcs814x-i2s";
  58                                 reg = <0x4008c000 0x18>;
  59                                 interrupts = <8>;
  60                         };
  61
  62                         ipsec@40094000 {
  63                                 compatible = "moschip,mcs814x-ipsec";
  64                                 reg = <0x40094000 0x1d8>;
  65                                 interrupts = <16>;
  66                         };
  67
  68                         rng@4009c000 {
  69                                 compatible = "moschip,mcs814x-rng";
  70                                 reg = <0x4009c000 0x8>;
  71                         };
  72
  73                         memc@400a8000 {
  74                                 reg = <0x400a8000 0x58>;
  75                         };
  76
  77                         list-proc@400ac0c0 {
  78                                 reg = <0x400ac0c0 0x38>;
  79                                 interrupts = <19 27>;           // done, error
  80                         };
  81
  82                         pci@400b0000 {
  83                                 compatible = "moschip,mcs8140-pci", "moschip,mcs814x-pci";
  84                                 reg = <0x400b0000 0x44          // PCI master
  85                                         0x400d8000 0xe4>;       // EEPROM emulator
  86                                 interrupts = <25>;              // abort interrupt
  87                                 status = "disabled";
  88                                 #address-cells = <3>;
  89                                 #size-cells = <2>;
  90
  91                                 ranges = <0x01000000 0 0x80000000 0x80000000 0 0x04000000   // IO
  92                                           0x42000000 0 0x90000000 0x90000000 0 0x20000000   // non-prefetch
  93                                           0x02000000 0 0xb0000000 0xb0000000 0 0x10000000>; // prefecth
  94
  95                                 #interrupt-cells = <1>;
  96                                 interrupt-map-mask = <>;
  97                                 interrupt-map = <0 0 0 1 &intc 22 0
  98                                                  0 0 0 2 &intc 23 0
  99                                                  0 0 0 3 &intc 24 0
 100                                                  0 0 0 4 &intc 26 0>;
 101                         };
 102
 103                         gpio: gpio@400d0000 {
 104                                 compatible = "moschip,mcs814x-gpio";
 105                                 reg = <0x400d0000 0x670>;
 106                                 interrupts = <10>;
 107                                 #gpio-cells = <2>;
 108                                 gpio-controller;
 109                                 num-gpios = <20>;
 110                         };
 111
 112                         eepio: gpio@400d4000 {
 113                                 compatible = "moschip,mcs814x-gpio";
 114                                 reg = <0x400d4000 0x470>;
 115                                 #gpio-cells = <2>;
 116                                 gpio-controller;
 117                                 num-gpios = <4>;
 118                         };
 119
 120                         uart0: serial@400dc000 {
 121                                 compatible = "ns16550";
 122                                 reg = <0x400dc000 0x20>;
 123                                 clock-frequency = <50000000>;
 124                                 reg-shift = <2>;
 125                                 interrupts = <21>;
 126                                 status = "okay";
 127                         };
 128
 129                         intc: interrupt-controller@400e4000 {
 130                                 #interrupt-cells = <1>;
 131                                 compatible = "moschip,mcs814x-intc";
 132                                 interrupt-controller;
 133                                 interrupt-parent;
 134                                 reg = <0x400e4000 0x48>;
 135                         };
 136
 137                         m2m@400e8000 {
 138                                 reg = <0x400e8000 0x24>;
 139                                 interrupts = <17>;
 140                         };
 141
 142                         eth-filters@400ec000 {
 143                                 reg = <0x400ec000 0x80>;
 144                         };
 145
 146                         timer: timer@400f800c {
 147                                 compatible = "moschip,mcs814x-timer";
 148                                 interrupts = <0>;
 149                                 reg = <0x400f800c 0x8>;
 150                         };
 151
 152                         watchdog@400f8014 {
 153                                 compatible = "moschip,mcs814x-wdt";
 154                                 reg = <0x400f8014 0x8>;
 155                         };
 156
 157                         adc {
 158                                 compatible = "simple-bus";
 159                                 #address-cells = <2>;
 160                                 #size-cells = <1>;
 161                                 // 8 64MB chip-selects
 162                                 ranges = <0 0 0x00000000 0x4000000      // sdram
 163                                           1 0 0x04000000 0x4000000      // sdram
 164                                           2 0 0x08000000 0x4000000      // reserved
 165                                           3 0 0x0c000000 0x4000000      // flash/localbus
 166                                           4 0 0x10000000 0x4000000      // flash/localbus
 167                                           5 0 0x14000000 0x4000000      // flash/localbus
 168                                           6 0 0x18000000 0x4000000      // flash/localbus
 169                                           7 0 0x1c000000 0x4000000>;    // flash/localbus
 170
 171                                 sdram: memory@0,0 {
 172                                         reg = <0 0 0>;
 173                                 };
 174
 175                                 nor: flash@7,0 {
 176                                         reg = <7 0 0x4000000>;
 177                                         compatible = "cfi-flash";
 178                                         bank-width = <1>;               // 8-bit external flash
 179                                         #address-cells = <1>;
 180                                         #size-cells = <1>;
 181                                 };
 182                         };
 183
 184                         usb0: ehci@400fc000 {
 185                                 compatible = "moschip,mcs814x-ehci", "usb-ehci";
 186                                 reg = <0x400fc000 0x74>;
 187                                 interrupts = <2>;
 188                         };
 189
 190                         usb1: ohci@400fd000 {
 191                                 compatible = "moschip,mcs814x-ohci", "ohci-le";
 192                                 reg = <0x400fd000 0x74>;
 193                                 interrupts = <11>;
 194                         };
 195
 196                         usb2: ohci@400fe000 {
 197                                 compatible = "moschip,mcs814x-ohci", "ohci-le";
 198                                 reg = <0x400fe000 0x74>;
 199                                 interrupts = <12>;
 200                         };
 201
 202                         usb3: otg@400ff000 {
 203                                 compatible = "moschip,msc814x-otg", "usb-otg";
 204                                 reg = <0x400ff000 0x1000>;
 205                                 interrupts = <13>;
 206                         };
 207                 };
 208
 209         };
 210 };