ramips: mt7620: power up ephy port 4
[openwrt/staging/mkresin.git] / target / linux / ramips / dts / CS-QR10.dts
1 /dts-v1/;
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "planex,cs-qr10", "ralink,mt7620a-soc";
10 model = "Planex CS-QR10";
11
12 gpio-leds {
13 compatible = "gpio-leds";
14
15 power {
16 label = "cs-qr10:red:power";
17 gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
18 };
19 };
20
21 gpio-keys-polled {
22 compatible = "gpio-keys-polled";
23 #address-cells = <1>;
24 #size-cells = <0>;
25 poll-interval = <20>;
26
27 s1 {
28 label = "reset";
29 gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
30 linux,code = <KEY_RESTART>;
31 };
32
33 s2 {
34 label = "wps";
35 gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
36 linux,code = <KEY_WPS_BUTTON>;
37 };
38 };
39 };
40
41 &gpio0 {
42 status = "okay";
43 };
44
45 &gpio1 {
46 status = "okay";
47 };
48
49 &gpio2 {
50 status = "okay";
51 };
52
53 &gpio3 {
54 status = "okay";
55 };
56
57 &i2c {
58 status = "okay";
59 };
60
61 &i2s {
62 status = "okay";
63 pinctrl-names = "default";
64 pinctrl-0 = <&pcm_i2s_pins>;
65 };
66
67 &spi0 {
68 status = "okay";
69
70 m25p80@0 {
71 #address-cells = <1>;
72 #size-cells = <1>;
73 compatible = "jedec,spi-nor";
74 reg = <0>;
75 spi-max-frequency = <10000000>;
76
77 partition@0 {
78 label = "u-boot";
79 reg = <0x0 0x30000>;
80 read-only;
81 };
82
83 partition@30000 {
84 label = "u-boot-env";
85 reg = <0x30000 0x10000>;
86 read-only;
87 };
88
89 factory: partition@40000 {
90 label = "factory";
91 reg = <0x40000 0x10000>;
92 read-only;
93 };
94
95 partition@50000 {
96 label = "firmware";
97 reg = <0x50000 0x7b0000>;
98 };
99 };
100 };
101
102 &pcm {
103 status = "okay";
104 };
105
106 &gdma {
107 status = "okay";
108 };
109
110 &pinctrl {
111 state_default: pinctrl0 {
112 gpio {
113 ralink,group = "spi refclk", "rgmii1";
114 ralink,function = "gpio";
115 };
116 wdt {
117 ralink,group = "wdt";
118 ralink,function = "wdt refclk";
119 };
120 };
121 };
122
123 &ethernet {
124 pinctrl-names = "default";
125 pinctrl-0 = <&ephy_pins>;
126 mtd-mac-address = <&factory 0x4>;
127 mediatek,portmap = "llllw";
128 };
129
130 &gsw {
131 ralink,port4 = "ephy";
132 };
133
134 &sdhci {
135 status = "okay";
136 };
137
138 &ehci {
139 status = "okay";
140 };
141
142 &ohci {
143 status = "okay";
144 };
145
146 &wmac {
147 ralink,mtd-eeprom = <&factory 0>;
148 };
149
150 &pcie {
151 status = "okay";
152 };