729173bdd640075d83823205922c4bc2e935c717
[openwrt/staging/mkresin.git] / target / linux / ramips / dts / EX6150.dts
1 /dts-v1/;
2
3 #include "mt7621.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "netgear,ex6150", "mediatek,mt7621-soc";
10 model = "Netgear EX6150";
11
12 aliases {
13 led-boot = &power_green;
14 led-failsafe = &power_amber;
15 led-running = &power_green;
16 led-upgrade = &power_amber;
17 };
18
19 memory@0 {
20 device_type = "memory";
21 reg = <0x0 0x4000000>;
22 };
23
24 chosen {
25 bootargs = "console=ttyS0,57600";
26 };
27
28 leds {
29 compatible = "gpio-leds";
30
31 power_amber: power_amber {
32 label = "ex6150:amber:power";
33 gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
34 };
35
36 power_green: power_green {
37 label = "ex6150:green:power";
38 gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
39 };
40
41 wps {
42 label = "ex6150:green:wps";
43 gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
44 };
45
46 rightarrow {
47 label = "ex6150:blue:rightarrow";
48 gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
49 };
50
51 leftarrow {
52 label = "ex6150:blue:leftarrow";
53 gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
54 };
55
56 router_green {
57 label = "ex6150:green:router";
58 gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
59 linux,default-trigger = "phy1tpt";
60 };
61
62 router_red {
63 label = "ex6150:red:router";
64 gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
65 };
66
67 client_green {
68 label = "ex6150:green:client";
69 gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
70 linux,default-trigger = "phy0tpt";
71 };
72
73 client_red {
74 label = "ex6150:red:client";
75 gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
76 };
77 };
78
79 keys {
80 compatible = "gpio-keys-polled";
81 poll-interval = <20>;
82
83 wps {
84 label = "wps";
85 gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
86 linux,code = <KEY_WPS_BUTTON>;
87 };
88
89 reset {
90 label = "reset";
91 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
92 linux,code = <KEY_RESTART>;
93 };
94
95 toggle {
96 label = "AP/Extender toggle";
97 gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
98 linux,code = <BTN_0>;
99 /* Active when switch is set to "Access Point" */
100 };
101 };
102 };
103
104 &spi0 {
105 status = "okay";
106
107 flash@0 {
108 compatible = "jedec,spi-nor";
109 reg = <0>;
110 spi-max-frequency = <10000000>;
111
112 partitions {
113 compatible = "fixed-partitions";
114 #address-cells = <1>;
115 #size-cells = <1>;
116
117 partition@0 {
118 label = "u-boot";
119 reg = <0x0 0x30000>;
120 read-only;
121 };
122
123 partition@30000 {
124 label = "config";
125 reg = <0x30000 0x10000>;
126 read-only;
127 };
128
129 factory: partition@40000 {
130 label = "factory";
131 reg = <0x40000 0x10000>;
132 read-only;
133 };
134
135 partition@50000 {
136 compatible = "denx,uimage";
137 label = "firmware";
138 reg = <0x50000 0xe80000>;
139 };
140
141 partition@ed0000 {
142 label = "ML1";
143 reg = <0xed0000 0x10000>;
144 read-only;
145 };
146
147 partition@ef0000 {
148 label = "ML2";
149 reg = <0xef0000 0x20000>;
150 read-only;
151 };
152
153 partition@f10000 {
154 label = "ML3";
155 reg = <0xf10000 0x20000>;
156 read-only;
157 };
158
159 partition@f30000 {
160 label = "ML4";
161 reg = <0xf30000 0x20000>;
162 read-only;
163 };
164
165 partition@f50000 {
166 label = "ML5";
167 reg = <0xf50000 0x20000>;
168 read-only;
169 };
170
171 partition@f70000 {
172 label = "ML6";
173 reg = <0xf70000 0x20000>;
174 read-only;
175 };
176
177 partition@f90000 {
178 label = "ML7";
179 reg = <0xf90000 0x20000>;
180 read-only;
181 };
182
183 partition@fb0000 {
184 label = "T_Meter1";
185 reg = <0xfb0000 0x10000>;
186 read-only;
187 };
188
189 partition@fc0000 {
190 label = "T_Meter2";
191 reg = <0xfc0000 0x10000>;
192 read-only;
193 };
194
195 partition@fd0000 {
196 label = "POT";
197 reg = <0xfd0000 0x10000>;
198 read-only;
199 };
200
201 partition@fe0000 {
202 label = "board_data";
203 reg = <0xfe0000 0x10000>;
204 read-only;
205 };
206
207 partition@ff0000 {
208 label = "nvram";
209 reg = <0xff0000 0x10000>;
210 read-only;
211 };
212 };
213 };
214 };
215
216 &pcie {
217 status = "okay";
218 };
219
220 &pcie0 {
221 wifi@0,0 {
222 reg = <0x0000 0 0 0 0>;
223 mediatek,mtd-eeprom = <&factory 0x8000>;
224 ieee80211-freq-limit = <5000000 6000000>;
225 };
226 };
227
228 &pcie1 {
229 wifi@0,0 {
230 reg = <0x0000 0 0 0 0>;
231 mediatek,mtd-eeprom = <&factory 0x0000>;
232 ieee80211-freq-limit = <2400000 2500000>;
233 };
234 };
235
236 &ethernet {
237 mtd-mac-address = <&factory 0x00000004>;
238 };
239
240 &pinctrl {
241 state_default: pinctrl0 {
242 gpio {
243 ralink,group = "sdhci", "rgmii2", "jtag";
244 ralink,function = "gpio";
245 };
246 };
247 };