ramips: mt7620: power up ephy port 4
[openwrt/staging/mkresin.git] / target / linux / ramips / dts / NA930.dts
1 /dts-v1/;
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "sercomm,na930", "ralink,mt7620a-soc";
10 model = "Sercomm NA930";
11
12 chosen {
13 bootargs = "console=ttyS1,57600";
14 };
15
16 nand {
17 #address-cells = <1>;
18 #size-cells = <1>;
19 compatible = "mtk,mt7620-nand";
20
21 partition@0 {
22 label = "u-boot";
23 reg = <0x0 0x20000>;
24 read-only;
25 };
26
27 partition@200000 {
28 label = "factory";
29 reg = <0x200000 0x40000>;
30 read-only;
31 };
32
33 partition@240000 {
34 label = "Config";
35 reg = <0x240000 0x400000>;
36 read-only;
37 };
38
39 partition@640000 {
40 label = "firmware";
41 reg = <0x640000 0x1400000>;
42 };
43 };
44
45 gpio-keys-polled {
46 compatible = "gpio-keys-polled";
47 #address-cells = <1>;
48 #size-cells = <0>;
49 poll-interval = <20>;
50
51 reset {
52 label = "reset";
53 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
54 linux,code = <KEY_RESTART>;
55 };
56
57 zwave {
58 label = "zwave";
59 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
60 linux,code = <BTN_0>;
61 };
62
63 wps {
64 label = "wps";
65 gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
66 linux,code = <KEY_WPS_BUTTON>;
67 };
68 };
69
70 gpio-leds {
71 compatible = "gpio-leds";
72
73 zwave {
74 label = "na930:blue:zwave";
75 gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
76 };
77
78 status {
79 label = "na930:blue:status";
80 gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
81 };
82
83 service {
84 label = "na930:blue:service";
85 gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
86 };
87
88 power {
89 label = "na930:blue:power";
90 gpios = <&gpio2 29 GPIO_ACTIVE_LOW>;
91 };
92 };
93
94 gpio_export {
95 compatible = "gpio-export";
96 #size-cells = <0>;
97
98 telit {
99 gpio-export,name = "telit";
100 gpio-export,output = <1>;
101 gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
102 };
103 };
104 };
105
106 &pinctrl {
107 state_default: pinctrl0 {
108 gpio {
109 ralink,group = "i2c", "rgmii2", "spi", "ephy";
110 ralink,function = "gpio";
111 };
112
113 uartf_gpio {
114 ralink,group = "uartf";
115 ralink,function = "gpio uartf";
116 };
117 };
118 };
119
120 &uart {
121 status = "okay";
122 };
123
124 &gpio1 {
125 status = "okay";
126 };
127
128 &gpio2 {
129 status = "okay";
130 };
131
132 &ethernet {
133 status = "okay";
134 pinctrl-names = "default";
135 pinctrl-0 = <&rgmii1_pins &mdio_pins>;
136 mediatek,portmap = "llllw";
137
138 port@4 {
139 status = "okay";
140 phy-handle = <&phy4>;
141 phy-mode = "rgmii";
142 };
143
144 port@5 {
145 status = "okay";
146 phy-handle = <&phy5>;
147 phy-mode = "rgmii";
148 };
149
150 mdio-bus {
151 status = "okay";
152
153 phy4: ethernet-phy@4 {
154 reg = <4>;
155 phy-mode = "rgmii";
156 };
157
158 phy5: ethernet-phy@5 {
159 reg = <5>;
160 phy-mode = "rgmii";
161 };
162 };
163 };
164
165 &gsw {
166 mediatek,port4 = "gmac";
167 };
168
169 &ehci {
170 status = "okay";
171 };
172
173 &ohci {
174 status = "okay";
175 };