ramips: mt7620: power up ephy port 4
[openwrt/staging/mkresin.git] / target / linux / ramips / dts / rt3352.dtsi
1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "ralink,rt3352-soc";
5
6 cpus {
7 cpu@0 {
8 compatible = "mips,mips24KEc";
9 };
10 };
11
12 chosen {
13 bootargs = "console=ttyS0,57600";
14 };
15
16 cpuintc: cpuintc@0 {
17 #address-cells = <0>;
18 #interrupt-cells = <1>;
19 interrupt-controller;
20 compatible = "mti,cpu-interrupt-controller";
21 };
22
23 aliases {
24 spi0 = &spi0;
25 spi1 = &spi1;
26 serial0 = &uartlite;
27 };
28
29 palmbus: palmbus@10000000 {
30 compatible = "palmbus";
31 reg = <0x10000000 0x200000>;
32 ranges = <0x0 0x10000000 0x1FFFFF>;
33
34 #address-cells = <1>;
35 #size-cells = <1>;
36
37 sysc: sysc@0 {
38 compatible = "ralink,rt3352-sysc", "ralink,rt3050-sysc";
39 reg = <0x0 0x100>;
40 };
41
42 timer: timer@100 {
43 compatible = "ralink,rt3352-timer", "ralink,rt2880-timer";
44 reg = <0x100 0x20>;
45
46 interrupt-parent = <&intc>;
47 interrupts = <1>;
48 };
49
50 watchdog: watchdog@120 {
51 compatible = "ralink,rt3352-wdt", "ralink,rt2880-wdt";
52 reg = <0x120 0x10>;
53
54 resets = <&rstctrl 8>;
55 reset-names = "wdt";
56
57 interrupt-parent = <&intc>;
58 interrupts = <1>;
59 };
60
61 intc: intc@200 {
62 compatible = "ralink,rt3352-intc", "ralink,rt2880-intc";
63 reg = <0x200 0x100>;
64
65 interrupt-controller;
66 #interrupt-cells = <1>;
67
68 interrupt-parent = <&cpuintc>;
69 interrupts = <2>;
70 };
71
72 memc: memc@300 {
73 compatible = "ralink,rt3352-memc", "ralink,rt3050-memc";
74 reg = <0x300 0x100>;
75
76 resets = <&rstctrl 20>;
77 reset-names = "mc";
78
79 interrupt-parent = <&intc>;
80 interrupts = <3>;
81 };
82
83 uart: uart@500 {
84 compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
85 reg = <0x500 0x100>;
86
87 resets = <&rstctrl 12>;
88 reset-names = "uart";
89
90 interrupt-parent = <&intc>;
91 interrupts = <5>;
92
93 reg-shift = <2>;
94
95 status = "disabled";
96 };
97
98 gpio0: gpio@600 {
99 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
100 reg = <0x600 0x34>;
101
102 gpio-controller;
103 #gpio-cells = <2>;
104
105 ralink,gpio-base = <0>;
106 ralink,num-gpios = <24>;
107 ralink,register-map = [ 00 04 08 0c
108 20 24 28 2c
109 30 34 ];
110 resets = <&rstctrl 13>;
111 reset-names = "pio";
112
113 interrupt-parent = <&intc>;
114 interrupts = <6>;
115 };
116
117 gpio1: gpio@638 {
118 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
119 reg = <0x638 0x24>;
120
121 gpio-controller;
122 #gpio-cells = <2>;
123
124 ralink,gpio-base = <24>;
125 ralink,num-gpios = <16>;
126 ralink,register-map = [ 00 04 08 0c
127 10 14 18 1c
128 20 24 ];
129
130 status = "disabled";
131 };
132
133 gpio2: gpio@660 {
134 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
135 reg = <0x660 0x24>;
136
137 gpio-controller;
138 #gpio-cells = <2>;
139
140 ralink,gpio-base = <40>;
141 ralink,num-gpios = <6>;
142 ralink,register-map = [ 00 04 08 0c
143 10 14 18 1c
144 20 24 ];
145
146 status = "disabled";
147 };
148
149 i2c@900 {
150 compatible = "ralink,rt2880-i2c";
151 reg = <0x900 0x100>;
152
153 resets = <&rstctrl 16>;
154 reset-names = "i2c";
155
156 #address-cells = <1>;
157 #size-cells = <0>;
158
159 status = "disabled";
160
161 pinctrl-names = "default";
162 pinctrl-0 = <&i2c_pins>;
163 };
164
165 i2s@a00 {
166 compatible = "ralink,rt3352-i2s";
167 reg = <0xa00 0x100>;
168
169 resets = <&rstctrl 17>;
170 reset-names = "i2s";
171
172 interrupt-parent = <&intc>;
173 interrupts = <10>;
174
175 txdma-req = <2>;
176 rxdma-req = <3>;
177
178 dmas = <&gdma 4>,
179 <&gdma 6>;
180 dma-names = "tx", "rx";
181
182 status = "disabled";
183 };
184
185 spi0: spi@b00 {
186 compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
187 reg = <0xb00 0x40>;
188 #address-cells = <1>;
189 #size-cells = <0>;
190
191 resets = <&rstctrl 18>;
192 reset-names = "spi";
193
194 pinctrl-names = "default";
195 pinctrl-0 = <&spi_pins>;
196
197 status = "disabled";
198 };
199
200 spi1: spi@b40 {
201 compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
202 reg = <0xb40 0x60>;
203 #address-cells = <1>;
204 #size-cells = <0>;
205
206 resets = <&rstctrl 18>;
207 reset-names = "spi";
208
209 pinctrl-names = "default";
210 pinctrl-0 = <&spi_cs1>;
211
212 status = "disabled";
213 };
214
215 uartlite: uartlite@c00 {
216 compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
217 reg = <0xc00 0x100>;
218
219 resets = <&rstctrl 19>;
220 reset-names = "uartl";
221
222 interrupt-parent = <&intc>;
223 interrupts = <12>;
224
225 reg-shift = <2>;
226
227 pinctrl-names = "default";
228 pinctrl-0 = <&uartlite_pins>;
229 };
230
231 gdma: gdma@2800 {
232 compatible = "ralink,rt3883-gdma";
233 reg = <0x2800 0x800>;
234
235 resets = <&rstctrl 14>;
236 reset-names = "dma";
237
238 interrupt-parent = <&intc>;
239 interrupts = <7>;
240
241 #dma-cells = <1>;
242 #dma-channels = <16>;
243 #dma-requests = <16>;
244
245 status = "disabled";
246 };
247 };
248
249 pinctrl: pinctrl {
250 compatible = "ralink,rt2880-pinmux";
251
252 pinctrl-names = "default";
253 pinctrl-0 = <&state_default>;
254
255 state_default: pinctrl0 {
256 };
257
258 i2c_pins: i2c {
259 i2c {
260 ralink,group = "i2c";
261 ralink,function = "i2c";
262 };
263 };
264
265 mdio_pins: mdio {
266 mdio {
267 ralink,group = "mdio";
268 ralink,function = "mdio";
269 };
270 };
271
272 rgmii_pins: rgmii {
273 rgmii {
274 ralink,group = "rgmii";
275 ralink,function = "rgmii";
276 };
277 };
278
279 spi_pins: spi {
280 spi {
281 ralink,group = "spi";
282 ralink,function = "spi";
283 };
284 };
285
286 spi_cs1: spi1 {
287 spi1 {
288 ralink,group = "spi_cs1";
289 ralink,function = "spi_cs1";
290 };
291 };
292
293 uartlite_pins: uartlite {
294 uart {
295 ralink,group = "uartlite";
296 ralink,function = "uartlite";
297 };
298 };
299 };
300
301 rstctrl: rstctrl {
302 compatible = "ralink,rt3352-reset", "ralink,rt2880-reset";
303 #reset-cells = <1>;
304 };
305
306 clkctrl: clkctrl {
307 compatible = "ralink,rt2880-clock";
308 #clock-cells = <1>;
309 };
310
311 ethernet: ethernet@10100000 {
312 compatible = "ralink,rt3352-eth", "ralink,rt3050-eth";
313 reg = <0x10100000 0x10000>;
314
315 resets = <&rstctrl 21>;
316 reset-names = "fe";
317
318 interrupt-parent = <&cpuintc>;
319 interrupts = <5>;
320
321 mediatek,switch = <&esw>;
322 };
323
324 esw: esw@10110000 {
325 compatible = "ralink,rt3352-esw", "ralink,rt3050-esw";
326 reg = <0x10110000 0x8000>;
327
328 resets = <&rstctrl 23>;
329 reset-names = "esw";
330
331 interrupt-parent = <&intc>;
332 interrupts = <17>;
333 };
334
335 usbphy: usbphy {
336 compatible = "ralink,rt3352-usbphy";
337 #phy-cells = <1>;
338
339 resets = <&rstctrl 22 &rstctrl 25>;
340 reset-names = "host", "device";
341 clocks = <&clkctrl 18 &clkctrl 20>;
342 clock-names = "host", "device";
343 };
344
345 wmac: wmac@10180000 {
346 compatible = "ralink,rt3352-wmac", "ralink,rt2880-wmac";
347 reg = <0x10180000 0x40000>;
348
349 interrupt-parent = <&cpuintc>;
350 interrupts = <6>;
351
352 ralink,eeprom = "soc_wmac.eeprom";
353 };
354
355 ehci: ehci@101c0000 {
356 compatible = "generic-ehci";
357 reg = <0x101c0000 0x1000>;
358
359 phys = <&usbphy 1>;
360 phy-names = "usb";
361
362 interrupt-parent = <&intc>;
363 interrupts = <18>;
364
365 status = "disabled";
366 };
367
368 ohci: ohci@101c1000 {
369 compatible = "generic-ohci";
370 reg = <0x101c1000 0x1000>;
371
372 phys = <&usbphy 1>;
373 phy-names = "usb";
374
375 interrupt-parent = <&intc>;
376 interrupts = <18>;
377
378 status = "disabled";
379 };
380 };