ramips: clean up and refresh kernel patches
[openwrt/staging/mkresin.git] / target / linux / ramips / patches-4.3 / 0020-arch-mips-ralink-mt7628-fixes.patch
1 From 0315355131c46c42164a4b180363bc79728f7015 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Mon, 7 Dec 2015 17:27:15 +0100
4 Subject: [PATCH 20/53] arch: mips: ralink: mt7628 fixes
5
6 Signed-off-by: John Crispin <blogic@openwrt.org>
7 ---
8 arch/mips/ralink/mt7620.c | 76 +++++++++++++++++++++++++++++----------------
9 1 file changed, 50 insertions(+), 26 deletions(-)
10
11 --- a/arch/mips/ralink/mt7620.c
12 +++ b/arch/mips/ralink/mt7620.c
13 @@ -104,28 +104,28 @@ static struct rt2880_pmx_group mt7620a_p
14 };
15
16 static struct rt2880_pmx_func pwm1_grp_mt7628[] = {
17 - FUNC("sdcx", 3, 19, 1),
18 + FUNC("sdcx d6", 3, 19, 1),
19 FUNC("utif", 2, 19, 1),
20 FUNC("gpio", 1, 19, 1),
21 - FUNC("pwm", 0, 19, 1),
22 + FUNC("pwm1", 0, 19, 1),
23 };
24
25 static struct rt2880_pmx_func pwm0_grp_mt7628[] = {
26 - FUNC("sdcx", 3, 18, 1),
27 + FUNC("sdcx d7", 3, 18, 1),
28 FUNC("utif", 2, 18, 1),
29 FUNC("gpio", 1, 18, 1),
30 - FUNC("pwm", 0, 18, 1),
31 + FUNC("pwm0", 0, 18, 1),
32 };
33
34 static struct rt2880_pmx_func uart2_grp_mt7628[] = {
35 - FUNC("sdcx", 3, 20, 2),
36 + FUNC("sdcx d5 d4", 3, 20, 2),
37 FUNC("pwm", 2, 20, 2),
38 FUNC("gpio", 1, 20, 2),
39 FUNC("uart", 0, 20, 2),
40 };
41
42 static struct rt2880_pmx_func uart1_grp_mt7628[] = {
43 - FUNC("sdcx", 3, 45, 2),
44 + FUNC("sw_r", 3, 45, 2),
45 FUNC("pwm", 2, 45, 2),
46 FUNC("gpio", 1, 45, 2),
47 FUNC("uart", 0, 45, 2),
48 @@ -168,7 +168,7 @@ static struct rt2880_pmx_func spi_cs1_gr
49 FUNC("-", 3, 6, 1),
50 FUNC("refclk", 2, 6, 1),
51 FUNC("gpio", 1, 6, 1),
52 - FUNC("spi", 0, 6, 1),
53 + FUNC("spi cs1", 0, 6, 1),
54 };
55
56 static struct rt2880_pmx_func spis_grp_mt7628[] = {
57 @@ -185,28 +185,44 @@ static struct rt2880_pmx_func gpio_grp_m
58 FUNC("gpio", 0, 11, 1),
59 };
60
61 -#define MT7628_GPIO_MODE_MASK 0x3
62 -
63 -#define MT7628_GPIO_MODE_PWM1 30
64 -#define MT7628_GPIO_MODE_PWM0 28
65 -#define MT7628_GPIO_MODE_UART2 26
66 -#define MT7628_GPIO_MODE_UART1 24
67 -#define MT7628_GPIO_MODE_I2C 20
68 -#define MT7628_GPIO_MODE_REFCLK 18
69 -#define MT7628_GPIO_MODE_PERST 16
70 -#define MT7628_GPIO_MODE_WDT 14
71 -#define MT7628_GPIO_MODE_SPI 12
72 -#define MT7628_GPIO_MODE_SDMODE 10
73 -#define MT7628_GPIO_MODE_UART0 8
74 -#define MT7628_GPIO_MODE_I2S 6
75 -#define MT7628_GPIO_MODE_CS1 4
76 -#define MT7628_GPIO_MODE_SPIS 2
77 -#define MT7628_GPIO_MODE_GPIO 0
78 +static struct rt2880_pmx_func wled_kn_grp_mt7628[] = {
79 + FUNC("rsvd", 3, 35, 1),
80 + FUNC("rsvd", 2, 35, 1),
81 + FUNC("gpio", 1, 35, 1),
82 + FUNC("wled_kn", 0, 35, 1),
83 +};
84 +
85 +static struct rt2880_pmx_func wled_an_grp_mt7628[] = {
86 + FUNC("rsvd", 3, 35, 1),
87 + FUNC("rsvd", 2, 35, 1),
88 + FUNC("gpio", 1, 35, 1),
89 + FUNC("wled_an", 0, 35, 1),
90 +};
91 +
92 +#define MT7628_GPIO_MODE_MASK 0x3
93 +
94 +#define MT7628_GPIO_MODE_WLED_KN 48
95 +#define MT7628_GPIO_MODE_WLED_AN 32
96 +#define MT7628_GPIO_MODE_PWM1 30
97 +#define MT7628_GPIO_MODE_PWM0 28
98 +#define MT7628_GPIO_MODE_UART2 26
99 +#define MT7628_GPIO_MODE_UART1 24
100 +#define MT7628_GPIO_MODE_I2C 20
101 +#define MT7628_GPIO_MODE_REFCLK 18
102 +#define MT7628_GPIO_MODE_PERST 16
103 +#define MT7628_GPIO_MODE_WDT 14
104 +#define MT7628_GPIO_MODE_SPI 12
105 +#define MT7628_GPIO_MODE_SDMODE 10
106 +#define MT7628_GPIO_MODE_UART0 8
107 +#define MT7628_GPIO_MODE_I2S 6
108 +#define MT7628_GPIO_MODE_CS1 4
109 +#define MT7628_GPIO_MODE_SPIS 2
110 +#define MT7628_GPIO_MODE_GPIO 0
111
112 static struct rt2880_pmx_group mt7628an_pinmux_data[] = {
113 GRP_G("pmw1", pwm1_grp_mt7628, MT7628_GPIO_MODE_MASK,
114 1, MT7628_GPIO_MODE_PWM1),
115 - GRP_G("pmw1", pwm0_grp_mt7628, MT7628_GPIO_MODE_MASK,
116 + GRP_G("pmw0", pwm0_grp_mt7628, MT7628_GPIO_MODE_MASK,
117 1, MT7628_GPIO_MODE_PWM0),
118 GRP_G("uart2", uart2_grp_mt7628, MT7628_GPIO_MODE_MASK,
119 1, MT7628_GPIO_MODE_UART2),
120 @@ -230,6 +246,10 @@ static struct rt2880_pmx_group mt7628an_
121 1, MT7628_GPIO_MODE_SPIS),
122 GRP_G("gpio", gpio_grp_mt7628, MT7628_GPIO_MODE_MASK,
123 1, MT7628_GPIO_MODE_GPIO),
124 + GRP_G("wled_an", wled_an_grp_mt7628, MT7628_GPIO_MODE_MASK,
125 + 1, MT7628_GPIO_MODE_WLED_AN),
126 + GRP_G("wled_kn", wled_kn_grp_mt7628, MT7628_GPIO_MODE_MASK,
127 + 1, MT7628_GPIO_MODE_WLED_KN),
128 { 0 }
129 };
130
131 @@ -542,7 +562,11 @@ void prom_soc_init(struct ralink_soc_inf
132 (rev & CHIP_REV_ECO_MASK));
133
134 cfg0 = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG0);
135 - dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & SYSCFG0_DRAM_TYPE_MASK;
136 +
137 + if (ralink_soc == MT762X_SOC_MT7628AN)
138 + dram_type = ((cfg0&0x00000001) == 0x00000001)?SYSCFG0_DRAM_TYPE_DDR1_MT7628:SYSCFG0_DRAM_TYPE_DDR2_MT7628;
139 + else
140 + dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & SYSCFG0_DRAM_TYPE_MASK;
141
142 soc_info->mem_base = MT7620_DRAM_BASE;
143 if (mt762x_soc == MT762X_SOC_MT7628AN)