target/linux/ath79/dts/qca9533.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 #include <dt-bindings/clock/ath79-clk.h>
   3 #include "ath79.dtsi"
   4
   5 / {
   6         compatible = "qca,qca9533";
   7
   8         #address-cells = <1>;
   9         #size-cells = <1>;
  10
  11         cpus {
  12                 #address-cells = <1>;
  13                 #size-cells = <0>;
  14
  15                 cpu@0 {
  16                         device_type = "cpu";
  17                         compatible = "mips,mips24Kc";
  18                         clocks = <&pll ATH79_CLK_CPU>;
  19                         reg = <0>;
  20                 };
  21         };
  22
  23         ref: ref {
  24                 compatible = "fixed-clock";
  25                 #clock-cells = <0>;
  26         };
  27
  28         ahb {
  29                 apb {
  30                         ddr_ctrl: memory-controller@18000000 {
  31                                 compatible = "qca,ar9530-ddr-controller",
  32                                                 "qca,ar7240-ddr-controller";
  33                                 reg = <0x18000000 0x128>;
  34
  35                                 #qca,ddr-wb-channel-cells = <1>;
  36                         };
  37
  38                         uart: uart@18020000 {
  39                                 compatible = "ns16550a";
  40                                 reg = <0x18020000 0x20>;
  41
  42                                 interrupts = <3>;
  43
  44                                 clocks = <&pll ATH79_CLK_REF>;
  45                                 clock-names = "uart";
  46
  47                                 reg-io-width = <4>;
  48                                 reg-shift = <2>;
  49                                 no-loopback-test;
  50
  51                                 status = "disabled";
  52                         };
  53
  54                         usb_phy: usb-phy@18030000 {
  55                                 compatible = "qca,ar7200-usb-phy";
  56                                 reg = <0x18030000 0x100>;
  57                                 #phy-cells = <0>;
  58
  59                                 reset-names = "usb-phy", "usb-suspend-override";
  60                                 resets = <&rst 4>, <&rst 3>;
  61
  62                                 status = "disabled";
  63                         };
  64
  65                         gpio: gpio@18040000 {
  66                                 compatible = "qca,ar9530-gpio",
  67                                                 "qca,ar9340-gpio";
  68                                 reg = <0x18040000 0x28>;
  69
  70                                 interrupts = <2>;
  71                                 ngpios = <20>;
  72
  73                                 gpio-controller;
  74                                 #gpio-cells = <2>;
  75
  76                                 interrupt-controller;
  77                                 #interrupt-cells = <2>;
  78                         };
  79
  80                         pinmux: pinmux@1804002c {
  81                                 compatible = "pinctrl-single";
  82
  83                                 reg = <0x1804002c 0x48>;
  84
  85                                 #size-cells = <0>;
  86
  87                                 pinctrl-single,bit-per-mux;
  88                                 pinctrl-single,register-width = <32>;
  89                                 pinctrl-single,function-mask = <0x1>;
  90                                 #pinctrl-cells = <2>;
  91
  92                                 jtag_disable_pins: pinmux_jtag_disable_pins {
  93                                         pinctrl-single,bits = <
  94                                                 0x40 0x2 0x2
  95                                                 >;
  96                                 };
  97                         };
  98
  99                         pll: pll-controller@18050000 {
 100                                 compatible = "qca,qca9530-pll", "syscon";
 101                                 reg = <0x18050000 0x48>;
 102
 103                                 #clock-cells = <1>;
 104                                 clocks = <&ref>;
 105                                 clock-names = "ref";
 106                                 clock-output-names = "cpu", "ddr", "ahb";
 107                         };
 108
 109                         wdt: wdt@18060008 {
 110                                 compatible = "qca,qca9530-wdt", "qca,ar7130-wdt";
 111                                 reg = <0x18060008 0x8>;
 112
 113                                 interrupts = <4>;
 114
 115                                 clocks = <&pll ATH79_CLK_AHB>;
 116                                 clock-names = "wdt";
 117                         };
 118
 119                         rst: reset-controller@1806001c {
 120                                 compatible = "qca,qca9530-reset",
 121                                                 "qca,ar7100-reset";
 122                                 reg = <0x1806001c 0xac>;
 123
 124                                 #reset-cells = <1>;
 125
 126                                 intc2: interrupt-controller@2 {
 127                                         compatible = "qcom,qca9556-intc";
 128
 129                                         interrupts = <2>;
 130
 131                                         interrupt-controller;
 132                                         #interrupt-cells = <1>;
 133
 134                                         qcom,pending-bits = <0x1f0>,    /* pcie rc1 */
 135                                                             <0xf>;      /* wmac */
 136                                 };
 137                         };
 138
 139                         pcie0: pcie-controller@180c0000 {
 140                                 compatible = "qcom,ar7240-pci";
 141                                 #address-cells = <3>;
 142                                 #size-cells = <2>;
 143                                 bus-range = <0x0 0x0>;
 144                                 reg = <0x180c0000 0x1000>, /* CRP */
 145                                       <0x180f0000 0x100>,  /* CTRL */
 146                                       <0x14000000 0x1000>; /* CFG */
 147                                 reg-names = "crp_base", "ctrl_base", "cfg_base";
 148                                 ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000        /* pci memory */
 149                                           0x1000000 0 0x00000000 0x0000000 0 0x000001>;         /* io space */
 150                                 interrupt-parent = <&intc2>;
 151                                 interrupts = <0>;
 152
 153                                 interrupt-controller;
 154                                 #interrupt-cells = <1>;
 155
 156                                 interrupt-map-mask = <0 0 0 1>;
 157                                 interrupt-map = <0 0 0 0 &pcie0 0>;
 158                                 status = "disabled";
 159                         };
 160
 161                         wmac: gmac@18100000 {
 162                                 compatible = "qca,qca9530-wmac";
 163                                 reg = <0x18100000 0x230000>;
 164
 165                                 interrupt-parent = <&cpuintc>;
 166                                 interrupts = <2>;
 167
 168                                 status = "disabled";
 169                         };
 170                 };
 171
 172                 usb0: usb@1b000000 {
 173                         compatible = "generic-ehci";
 174                         reg = <0x1b000000 0x1000>;
 175
 176                         interrupts = <3>;
 177                         resets = <&rst 5>;
 178                         reset-names = "usb-host";
 179                         dr_mode = "host";
 180
 181                         has-transaction-translator;
 182                         caps-offset = <0x100>;
 183
 184                         phy-names = "usb-phy";
 185                         phys = <&usb_phy>;
 186
 187                         status = "disabled";
 188                 };
 189
 190                 spi: spi@1f000000 {
 191                         compatible = "qca,ar9530-spi", "qca,ar7100-spi";
 192                         reg = <0x1f000000 0x10>;
 193
 194                         clocks = <&pll ATH79_CLK_AHB>;
 195                         clock-names = "ahb";
 196
 197                         status = "disabled";
 198
 199                         #address-cells = <1>;
 200                         #size-cells = <0>;
 201                 };
 202
 203         };
 204
 205 };
 206
 207 &mdio0 {
 208         resets = <&rst 22>;
 209         reset-names = "mdio";
 210 };
 211
 212 &eth0 {
 213         compatible = "qca,qca9530-eth", "syscon";
 214         pll-data = <0x82000101 0x80000101 0x80001313>;
 215         reg = <0x19000000 0x200
 216                 0x18070000 0x4>;
 217         pll-reg = <0x4 0x2c 17>;
 218         pll-handle = <&pll>;
 219
 220         reset-names = "mac";
 221         resets = <&rst 9>;
 222 };
 223
 224
 225 &mdio1 {
 226         resets = <&rst 23>;
 227         reset-names = "mdio";
 228         builtin-switch;
 229 };
 230
 231 &eth1 {
 232         compatible = "qca,qca9530-eth", "syscon";
 233         resets = <&rst 13>;
 234         reset-names = "mac";
 235 };