package/ifxmips-dsl-api/patches/300-atm_compat.patch

   1 Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.c
   2 ===================================================================
   3 --- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_core.c    2009-11-01 14:29:05.000000000 +0100
   4 +++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.c 2009-11-01 16:07:46.000000000 +0100
   5 @@ -58,9 +58,8 @@
   6  /*
   7   *  Chip Specific Head File
   8   */
   9 -#include <asm/ifx/ifx_types.h>
  10 -#include <asm/ifx/ifx_regs.h>
  11 -#include <asm/ifx/common_routines.h>
  12 +#include <ifxmips.h>
  13 +#include <ifxmips_cgu.h>
  14  #include "ifxmips_atm_core.h"
  15
  16
  17 @@ -1146,7 +1145,7 @@
  18
  19  static void set_qsb(struct atm_vcc *vcc, struct atm_qos *qos, unsigned int queue)
  20  {
  21 -    unsigned int qsb_clk = ifx_get_fpi_hz();
  22 +    unsigned int qsb_clk = ifxmips_get_fpi_hz();
  23      unsigned int qsb_qid = queue + FIRST_QSB_QID;
  24      union qsb_queue_parameter_table qsb_queue_parameter_table = {{0}};
  25      union qsb_queue_vbr_parameter_table qsb_queue_vbr_parameter_table = {{0}};
  26 @@ -1318,7 +1317,7 @@
  27
  28  static void qsb_global_set(void)
  29  {
  30 -    unsigned int qsb_clk = ifx_get_fpi_hz();
  31 +    unsigned int qsb_clk = ifxmips_get_fpi_hz();
  32      int i;
  33      unsigned int tmp1, tmp2, tmp3;
  34
  35 @@ -2505,3 +2504,4 @@
  36
  37  module_init(ifx_atm_init);
  38  module_exit(ifx_atm_exit);
  39 +MODULE_LICENSE("Dual BSD/GPL");
  40 Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_common.h
  41 ===================================================================
  42 --- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_ppe_common.h      2009-11-01 14:30:55.000000000 +0100
  43 +++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_common.h   2009-11-01 15:58:50.000000000 +0100
  44 @@ -1,9 +1,10 @@
  45  #ifndef IFXMIPS_ATM_PPE_COMMON_H
  46  #define IFXMIPS_ATM_PPE_COMMON_H
  47
  48 -
  49 -
  50 -#if defined(CONFIG_DANUBE)
  51 +#if defined(CONFIG_IFXMIPS)
  52 +  #include "ifxmips_atm_ppe_danube.h"
  53 +  #define CONFIG_DANUBE
  54 +#elif defined(CONFIG_DANUBE)
  55    #include "ifxmips_atm_ppe_danube.h"
  56  #elif defined(CONFIG_AMAZON_SE)
  57    #include "ifxmips_atm_ppe_amazon_se.h"
  58 @@ -16,7 +17,6 @@
  59  #endif
  60
  61
  62 -
  63  /*
  64   *  Code/Data Memory (CDM) Interface Configuration Register
  65   */
  66 Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.h
  67 ===================================================================
  68 --- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_core.h    2009-11-01 14:30:55.000000000 +0100
  69 +++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.h 2009-11-01 15:58:50.000000000 +0100
  70 @@ -25,8 +25,8 @@
  71  #define IFXMIPS_ATM_CORE_H
  72
  73
  74 -
  75 -#include <asm/ifx/ifx_atm.h>
  76 +#include "ifxmips_compat.h"
  77 +#include "ifx_atm.h"
  78  #include "ifxmips_atm_ppe_common.h"
  79  #include "ifxmips_atm_fw_regs_common.h"
  80
  81 Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_compat.h
  82 ===================================================================
  83 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
  84 +++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_compat.h   2009-11-01 15:58:50.000000000 +0100
  85 @@ -0,0 +1,43 @@
  86 +#ifndef _IFXMIPS_COMPAT_H__
  87 +#define _IFXMIPS_COMPAT_H__
  88 +
  89 +#define        IFX_SUCCESS     0
  90 +#define IFX_ERROR      (-1)
  91 +
  92 +#define ATM_VBR_NRT     ATM_VBR
  93 +#define ATM_VBR_RT      6
  94 +#define ATM_UBR_PLUS    7
  95 +#define ATM_GFR         8
  96 +
  97 +#define NUM_ENTITY(x)  (sizeof(x) / sizeof(*(x)))
  98 +
  99 +#define SET_BITS(x, msb, lsb, value)   \
 100 +    (((x) & ~(((1 << ((msb) + 1)) - 1) ^ ((1 << (lsb)) - 1))) | (((value) & ((1 << (1 + (msb) - (lsb))) - 1)) << (lsb)))
 101 +
 102 +
 103 +#define IFX_PMU_ENABLE    1
 104 +#define IFX_PMU_DISABLE   0
 105 +
 106 +#define IFX_PMU_MODULE_DSL_DFE    (1 << 9)
 107 +#define IFX_PMU_MODULE_AHBS              (1 << 13)
 108 +#define IFX_PMU_MODULE_PPE_QSB    (1 << 18)
 109 +#define IFX_PMU_MODULE_PPE_SLL01  (1 << 19)
 110 +#define IFX_PMU_MODULE_PPE_TC     (1 << 21)
 111 +#define IFX_PMU_MODULE_PPE_EMA    (1 << 22)
 112 +#define IFX_PMU_MODULE_PPE_TOP    (1 << 29)
 113 +
 114 +#define ifx_pmu_set(a,b)       {if(a == IFX_PMU_ENABLE) ifxmips_pmu_enable(b); else ifxmips_pmu_disable(b);}
 115 +
 116 +#define PPE_TOP_PMU_SETUP(__x)    ifx_pmu_set(IFX_PMU_MODULE_PPE_TOP, (__x))
 117 +#define PPE_SLL01_PMU_SETUP(__x)  ifx_pmu_set(IFX_PMU_MODULE_PPE_SLL01, (__x))
 118 +#define PPE_TC_PMU_SETUP(__x)     ifx_pmu_set(IFX_PMU_MODULE_PPE_TC, (__x))
 119 +#define PPE_EMA_PMU_SETUP(__x)    ifx_pmu_set(IFX_PMU_MODULE_PPE_EMA, (__x))
 120 +#define PPE_QSB_PMU_SETUP(__x)    ifx_pmu_set(IFX_PMU_MODULE_PPE_QSB, (__x))
 121 +#define PPE_TPE_PMU_SETUP(__x)    ifx_pmu_set(IFX_PMU_MODULE_AHBS, (__x))
 122 +#define DSL_DFE_PMU_SETUP(__x)    ifx_pmu_set(IFX_PMU_MODULE_DSL_DFE, (__x))
 123 +
 124 +#define IFX_REG_W32(_v, _r)               __raw_writel((_v), (_r))
 125 +
 126 +#define CONFIG_IFXMIPS_DSL_CPE_MEI     y
 127 +
 128 +#endif
 129 Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_danube.h
 130 ===================================================================
 131 --- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_ppe_danube.h      2009-11-01 14:30:55.000000000 +0100
 132 +++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_danube.h   2009-11-01 15:58:50.000000000 +0100
 133 @@ -1,7 +1,7 @@
 134  #ifndef IFXMIPS_ATM_PPE_DANUBE_H
 135  #define IFXMIPS_ATM_PPE_DANUBE_H
 136
 137 -
 138 +#include <ifxmips_irq.h>
 139
 140  /*
 141   *  FPI Configuration Bus Register and Memory Address Mapping
 142 @@ -93,7 +93,7 @@
 143  /*
 144   *  Mailbox IGU1 Interrupt
 145   */
 146 -#define PPE_MAILBOX_IGU1_INT            INT_NUM_IM2_IRL24
 147 +#define PPE_MAILBOX_IGU1_INT            IFXMIPS_PPE_MBOX_INT
 148
 149
 150
 151 Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_danube.c
 152 ===================================================================
 153 --- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_danube.c  2009-11-01 14:29:18.000000000 +0100
 154 +++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_danube.c       2009-11-01 15:58:50.000000000 +0100
 155 @@ -45,10 +45,9 @@
 156  /*
 157   *  Chip Specific Head File
 158   */
 159 -#include <asm/ifx/ifx_types.h>
 160 -#include <asm/ifx/ifx_regs.h>
 161 -#include <asm/ifx/common_routines.h>
 162 -#include <asm/ifx/ifx_pmu.h>
 163 +#include <ifxmips.h>
 164 +#include <ifxmips_pmu.h>
 165 +#include "ifxmips_compat.h"
 166  #include "ifxmips_atm_core.h"
 167  #include "ifxmips_atm_fw_danube.h"
 168