ar71xx: add support for D-Link DIR-615 rev. Ix board
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / patches-3.18 / 739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch
1 --- a/arch/mips/ath79/gpio.c
2 +++ b/arch/mips/ath79/gpio.c
3 @@ -185,15 +185,24 @@ void __init ath79_gpio_output_select(uns
4 {
5 void __iomem *base = ath79_gpio_base;
6 unsigned long flags;
7 - unsigned int reg;
8 + unsigned int reg, reg_base;
9 + unsigned long gpio_count;
10 u32 t, s;
11
12 - BUG_ON(!soc_is_ar934x());
13 + if (soc_is_ar934x()) {
14 + gpio_count = AR934X_GPIO_COUNT;
15 + reg_base = AR934X_GPIO_REG_OUT_FUNC0;
16 + } else if (soc_is_qca955x()) {
17 + gpio_count = QCA955X_GPIO_COUNT;
18 + reg_base = QCA955X_GPIO_REG_OUT_FUNC0;
19 + } else {
20 + BUG();
21 + }
22
23 - if (gpio >= AR934X_GPIO_COUNT)
24 + if (gpio >= gpio_count)
25 return;
26
27 - reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4);
28 + reg = reg_base + 4 * (gpio / 4);
29 s = 8 * (gpio % 4);
30
31 spin_lock_irqsave(&ath79_gpio_lock, flags);
32 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
33 +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
34 @@ -786,6 +786,14 @@
35 #define AR934X_GPIO_REG_OUT_FUNC5 0x40
36 #define AR934X_GPIO_REG_FUNC 0x6c
37
38 +#define QCA955X_GPIO_REG_OUT_FUNC0 0x2c
39 +#define QCA955X_GPIO_REG_OUT_FUNC1 0x30
40 +#define QCA955X_GPIO_REG_OUT_FUNC2 0x34
41 +#define QCA955X_GPIO_REG_OUT_FUNC3 0x38
42 +#define QCA955X_GPIO_REG_OUT_FUNC4 0x3c
43 +#define QCA955X_GPIO_REG_OUT_FUNC5 0x40
44 +#define QCA955X_GPIO_REG_FUNC 0x6c
45 +
46 #define QCA956X_GPIO_REG_OUT_FUNC0 0x2c
47 #define QCA956X_GPIO_REG_OUT_FUNC1 0x30
48 #define QCA956X_GPIO_REG_OUT_FUNC2 0x34
49 @@ -907,6 +915,8 @@
50 #define AR934X_GPIO_OUT_EXT_LNA0 46
51 #define AR934X_GPIO_OUT_EXT_LNA1 47
52
53 +#define QCA955X_GPIO_OUT_GPIO 0
54 +
55 /*
56 * MII_CTRL block
57 */